| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
|---|---|
| 2 | |* *| |
| 3 | |* Target Instruction Enum Values and Descriptors *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #ifdef GET_INSTRINFO_ENUM |
| 10 | #undef GET_INSTRINFO_ENUM |
| 11 | namespace llvm { |
| 12 | |
| 13 | namespace X86 { |
| 14 | enum { |
| 15 | PHI = 0, |
| 16 | INLINEASM = 1, |
| 17 | INLINEASM_BR = 2, |
| 18 | CFI_INSTRUCTION = 3, |
| 19 | EH_LABEL = 4, |
| 20 | GC_LABEL = 5, |
| 21 | ANNOTATION_LABEL = 6, |
| 22 | KILL = 7, |
| 23 | EXTRACT_SUBREG = 8, |
| 24 | INSERT_SUBREG = 9, |
| 25 | IMPLICIT_DEF = 10, |
| 26 | SUBREG_TO_REG = 11, |
| 27 | COPY_TO_REGCLASS = 12, |
| 28 | DBG_VALUE = 13, |
| 29 | DBG_VALUE_LIST = 14, |
| 30 | DBG_INSTR_REF = 15, |
| 31 | DBG_PHI = 16, |
| 32 | DBG_LABEL = 17, |
| 33 | REG_SEQUENCE = 18, |
| 34 | COPY = 19, |
| 35 | BUNDLE = 20, |
| 36 | LIFETIME_START = 21, |
| 37 | LIFETIME_END = 22, |
| 38 | PSEUDO_PROBE = 23, |
| 39 | ARITH_FENCE = 24, |
| 40 | STACKMAP = 25, |
| 41 | FENTRY_CALL = 26, |
| 42 | PATCHPOINT = 27, |
| 43 | LOAD_STACK_GUARD = 28, |
| 44 | PREALLOCATED_SETUP = 29, |
| 45 | PREALLOCATED_ARG = 30, |
| 46 | STATEPOINT = 31, |
| 47 | LOCAL_ESCAPE = 32, |
| 48 | FAULTING_OP = 33, |
| 49 | PATCHABLE_OP = 34, |
| 50 | PATCHABLE_FUNCTION_ENTER = 35, |
| 51 | PATCHABLE_RET = 36, |
| 52 | PATCHABLE_FUNCTION_EXIT = 37, |
| 53 | PATCHABLE_TAIL_CALL = 38, |
| 54 | PATCHABLE_EVENT_CALL = 39, |
| 55 | PATCHABLE_TYPED_EVENT_CALL = 40, |
| 56 | ICALL_BRANCH_FUNNEL = 41, |
| 57 | MEMBARRIER = 42, |
| 58 | JUMP_TABLE_DEBUG_INFO = 43, |
| 59 | CONVERGENCECTRL_ENTRY = 44, |
| 60 | CONVERGENCECTRL_ANCHOR = 45, |
| 61 | CONVERGENCECTRL_LOOP = 46, |
| 62 | CONVERGENCECTRL_GLUE = 47, |
| 63 | G_ASSERT_SEXT = 48, |
| 64 | G_ASSERT_ZEXT = 49, |
| 65 | G_ASSERT_ALIGN = 50, |
| 66 | G_ADD = 51, |
| 67 | G_SUB = 52, |
| 68 | G_MUL = 53, |
| 69 | G_SDIV = 54, |
| 70 | G_UDIV = 55, |
| 71 | G_SREM = 56, |
| 72 | G_UREM = 57, |
| 73 | G_SDIVREM = 58, |
| 74 | G_UDIVREM = 59, |
| 75 | G_AND = 60, |
| 76 | G_OR = 61, |
| 77 | G_XOR = 62, |
| 78 | G_IMPLICIT_DEF = 63, |
| 79 | G_PHI = 64, |
| 80 | G_FRAME_INDEX = 65, |
| 81 | G_GLOBAL_VALUE = 66, |
| 82 | G_PTRAUTH_GLOBAL_VALUE = 67, |
| 83 | G_CONSTANT_POOL = 68, |
| 84 | G_EXTRACT = 69, |
| 85 | G_UNMERGE_VALUES = 70, |
| 86 | G_INSERT = 71, |
| 87 | G_MERGE_VALUES = 72, |
| 88 | G_BUILD_VECTOR = 73, |
| 89 | G_BUILD_VECTOR_TRUNC = 74, |
| 90 | G_CONCAT_VECTORS = 75, |
| 91 | G_PTRTOINT = 76, |
| 92 | G_INTTOPTR = 77, |
| 93 | G_BITCAST = 78, |
| 94 | G_FREEZE = 79, |
| 95 | G_CONSTANT_FOLD_BARRIER = 80, |
| 96 | G_INTRINSIC_FPTRUNC_ROUND = 81, |
| 97 | G_INTRINSIC_TRUNC = 82, |
| 98 | G_INTRINSIC_ROUND = 83, |
| 99 | G_INTRINSIC_LRINT = 84, |
| 100 | G_INTRINSIC_LLRINT = 85, |
| 101 | G_INTRINSIC_ROUNDEVEN = 86, |
| 102 | G_READCYCLECOUNTER = 87, |
| 103 | G_READSTEADYCOUNTER = 88, |
| 104 | G_LOAD = 89, |
| 105 | G_SEXTLOAD = 90, |
| 106 | G_ZEXTLOAD = 91, |
| 107 | G_INDEXED_LOAD = 92, |
| 108 | G_INDEXED_SEXTLOAD = 93, |
| 109 | G_INDEXED_ZEXTLOAD = 94, |
| 110 | G_STORE = 95, |
| 111 | G_INDEXED_STORE = 96, |
| 112 | G_ATOMIC_CMPXCHG_WITH_SUCCESS = 97, |
| 113 | G_ATOMIC_CMPXCHG = 98, |
| 114 | G_ATOMICRMW_XCHG = 99, |
| 115 | G_ATOMICRMW_ADD = 100, |
| 116 | G_ATOMICRMW_SUB = 101, |
| 117 | G_ATOMICRMW_AND = 102, |
| 118 | G_ATOMICRMW_NAND = 103, |
| 119 | G_ATOMICRMW_OR = 104, |
| 120 | G_ATOMICRMW_XOR = 105, |
| 121 | G_ATOMICRMW_MAX = 106, |
| 122 | G_ATOMICRMW_MIN = 107, |
| 123 | G_ATOMICRMW_UMAX = 108, |
| 124 | G_ATOMICRMW_UMIN = 109, |
| 125 | G_ATOMICRMW_FADD = 110, |
| 126 | G_ATOMICRMW_FSUB = 111, |
| 127 | G_ATOMICRMW_FMAX = 112, |
| 128 | G_ATOMICRMW_FMIN = 113, |
| 129 | G_ATOMICRMW_UINC_WRAP = 114, |
| 130 | G_ATOMICRMW_UDEC_WRAP = 115, |
| 131 | G_FENCE = 116, |
| 132 | G_PREFETCH = 117, |
| 133 | G_BRCOND = 118, |
| 134 | G_BRINDIRECT = 119, |
| 135 | G_INVOKE_REGION_START = 120, |
| 136 | G_INTRINSIC = 121, |
| 137 | G_INTRINSIC_W_SIDE_EFFECTS = 122, |
| 138 | G_INTRINSIC_CONVERGENT = 123, |
| 139 | G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 124, |
| 140 | G_ANYEXT = 125, |
| 141 | G_TRUNC = 126, |
| 142 | G_CONSTANT = 127, |
| 143 | G_FCONSTANT = 128, |
| 144 | G_VASTART = 129, |
| 145 | G_VAARG = 130, |
| 146 | G_SEXT = 131, |
| 147 | G_SEXT_INREG = 132, |
| 148 | G_ZEXT = 133, |
| 149 | G_SHL = 134, |
| 150 | G_LSHR = 135, |
| 151 | G_ASHR = 136, |
| 152 | G_FSHL = 137, |
| 153 | G_FSHR = 138, |
| 154 | G_ROTR = 139, |
| 155 | G_ROTL = 140, |
| 156 | G_ICMP = 141, |
| 157 | G_FCMP = 142, |
| 158 | G_SCMP = 143, |
| 159 | G_UCMP = 144, |
| 160 | G_SELECT = 145, |
| 161 | G_UADDO = 146, |
| 162 | G_UADDE = 147, |
| 163 | G_USUBO = 148, |
| 164 | G_USUBE = 149, |
| 165 | G_SADDO = 150, |
| 166 | G_SADDE = 151, |
| 167 | G_SSUBO = 152, |
| 168 | G_SSUBE = 153, |
| 169 | G_UMULO = 154, |
| 170 | G_SMULO = 155, |
| 171 | G_UMULH = 156, |
| 172 | G_SMULH = 157, |
| 173 | G_UADDSAT = 158, |
| 174 | G_SADDSAT = 159, |
| 175 | G_USUBSAT = 160, |
| 176 | G_SSUBSAT = 161, |
| 177 | G_USHLSAT = 162, |
| 178 | G_SSHLSAT = 163, |
| 179 | G_SMULFIX = 164, |
| 180 | G_UMULFIX = 165, |
| 181 | G_SMULFIXSAT = 166, |
| 182 | G_UMULFIXSAT = 167, |
| 183 | G_SDIVFIX = 168, |
| 184 | G_UDIVFIX = 169, |
| 185 | G_SDIVFIXSAT = 170, |
| 186 | G_UDIVFIXSAT = 171, |
| 187 | G_FADD = 172, |
| 188 | G_FSUB = 173, |
| 189 | G_FMUL = 174, |
| 190 | G_FMA = 175, |
| 191 | G_FMAD = 176, |
| 192 | G_FDIV = 177, |
| 193 | G_FREM = 178, |
| 194 | G_FPOW = 179, |
| 195 | G_FPOWI = 180, |
| 196 | G_FEXP = 181, |
| 197 | G_FEXP2 = 182, |
| 198 | G_FEXP10 = 183, |
| 199 | G_FLOG = 184, |
| 200 | G_FLOG2 = 185, |
| 201 | G_FLOG10 = 186, |
| 202 | G_FLDEXP = 187, |
| 203 | G_FFREXP = 188, |
| 204 | G_FNEG = 189, |
| 205 | G_FPEXT = 190, |
| 206 | G_FPTRUNC = 191, |
| 207 | G_FPTOSI = 192, |
| 208 | G_FPTOUI = 193, |
| 209 | G_SITOFP = 194, |
| 210 | G_UITOFP = 195, |
| 211 | G_FABS = 196, |
| 212 | G_FCOPYSIGN = 197, |
| 213 | G_IS_FPCLASS = 198, |
| 214 | G_FCANONICALIZE = 199, |
| 215 | G_FMINNUM = 200, |
| 216 | G_FMAXNUM = 201, |
| 217 | G_FMINNUM_IEEE = 202, |
| 218 | G_FMAXNUM_IEEE = 203, |
| 219 | G_FMINIMUM = 204, |
| 220 | G_FMAXIMUM = 205, |
| 221 | G_GET_FPENV = 206, |
| 222 | G_SET_FPENV = 207, |
| 223 | G_RESET_FPENV = 208, |
| 224 | G_GET_FPMODE = 209, |
| 225 | G_SET_FPMODE = 210, |
| 226 | G_RESET_FPMODE = 211, |
| 227 | G_PTR_ADD = 212, |
| 228 | G_PTRMASK = 213, |
| 229 | G_SMIN = 214, |
| 230 | G_SMAX = 215, |
| 231 | G_UMIN = 216, |
| 232 | G_UMAX = 217, |
| 233 | G_ABS = 218, |
| 234 | G_LROUND = 219, |
| 235 | G_LLROUND = 220, |
| 236 | G_BR = 221, |
| 237 | G_BRJT = 222, |
| 238 | G_VSCALE = 223, |
| 239 | G_INSERT_SUBVECTOR = 224, |
| 240 | G_EXTRACT_SUBVECTOR = 225, |
| 241 | G_INSERT_VECTOR_ELT = 226, |
| 242 | G_EXTRACT_VECTOR_ELT = 227, |
| 243 | G_SHUFFLE_VECTOR = 228, |
| 244 | G_SPLAT_VECTOR = 229, |
| 245 | G_VECTOR_COMPRESS = 230, |
| 246 | G_CTTZ = 231, |
| 247 | G_CTTZ_ZERO_UNDEF = 232, |
| 248 | G_CTLZ = 233, |
| 249 | G_CTLZ_ZERO_UNDEF = 234, |
| 250 | G_CTPOP = 235, |
| 251 | G_BSWAP = 236, |
| 252 | G_BITREVERSE = 237, |
| 253 | G_FCEIL = 238, |
| 254 | G_FCOS = 239, |
| 255 | G_FSIN = 240, |
| 256 | G_FTAN = 241, |
| 257 | G_FACOS = 242, |
| 258 | G_FASIN = 243, |
| 259 | G_FATAN = 244, |
| 260 | G_FCOSH = 245, |
| 261 | G_FSINH = 246, |
| 262 | G_FTANH = 247, |
| 263 | G_FSQRT = 248, |
| 264 | G_FFLOOR = 249, |
| 265 | G_FRINT = 250, |
| 266 | G_FNEARBYINT = 251, |
| 267 | G_ADDRSPACE_CAST = 252, |
| 268 | G_BLOCK_ADDR = 253, |
| 269 | G_JUMP_TABLE = 254, |
| 270 | G_DYN_STACKALLOC = 255, |
| 271 | G_STACKSAVE = 256, |
| 272 | G_STACKRESTORE = 257, |
| 273 | G_STRICT_FADD = 258, |
| 274 | G_STRICT_FSUB = 259, |
| 275 | G_STRICT_FMUL = 260, |
| 276 | G_STRICT_FDIV = 261, |
| 277 | G_STRICT_FREM = 262, |
| 278 | G_STRICT_FMA = 263, |
| 279 | G_STRICT_FSQRT = 264, |
| 280 | G_STRICT_FLDEXP = 265, |
| 281 | G_READ_REGISTER = 266, |
| 282 | G_WRITE_REGISTER = 267, |
| 283 | G_MEMCPY = 268, |
| 284 | G_MEMCPY_INLINE = 269, |
| 285 | G_MEMMOVE = 270, |
| 286 | G_MEMSET = 271, |
| 287 | G_BZERO = 272, |
| 288 | G_TRAP = 273, |
| 289 | G_DEBUGTRAP = 274, |
| 290 | G_UBSANTRAP = 275, |
| 291 | G_VECREDUCE_SEQ_FADD = 276, |
| 292 | G_VECREDUCE_SEQ_FMUL = 277, |
| 293 | G_VECREDUCE_FADD = 278, |
| 294 | G_VECREDUCE_FMUL = 279, |
| 295 | G_VECREDUCE_FMAX = 280, |
| 296 | G_VECREDUCE_FMIN = 281, |
| 297 | G_VECREDUCE_FMAXIMUM = 282, |
| 298 | G_VECREDUCE_FMINIMUM = 283, |
| 299 | G_VECREDUCE_ADD = 284, |
| 300 | G_VECREDUCE_MUL = 285, |
| 301 | G_VECREDUCE_AND = 286, |
| 302 | G_VECREDUCE_OR = 287, |
| 303 | G_VECREDUCE_XOR = 288, |
| 304 | G_VECREDUCE_SMAX = 289, |
| 305 | G_VECREDUCE_SMIN = 290, |
| 306 | G_VECREDUCE_UMAX = 291, |
| 307 | G_VECREDUCE_UMIN = 292, |
| 308 | G_SBFX = 293, |
| 309 | G_UBFX = 294, |
| 310 | ADD16ri_DB = 295, |
| 311 | ADD16rr_DB = 296, |
| 312 | ADD32ri_DB = 297, |
| 313 | ADD32rr_DB = 298, |
| 314 | ADD64ri32_DB = 299, |
| 315 | ADD64rr_DB = 300, |
| 316 | ADD8ri_DB = 301, |
| 317 | ADD8rr_DB = 302, |
| 318 | AVX1_SETALLONES = 303, |
| 319 | AVX2_SETALLONES = 304, |
| 320 | AVX512_128_SET0 = 305, |
| 321 | AVX512_256_SET0 = 306, |
| 322 | AVX512_512_SET0 = 307, |
| 323 | AVX512_512_SETALLONES = 308, |
| 324 | AVX512_512_SEXT_MASK_32 = 309, |
| 325 | AVX512_512_SEXT_MASK_64 = 310, |
| 326 | AVX512_FsFLD0F128 = 311, |
| 327 | AVX512_FsFLD0SD = 312, |
| 328 | AVX512_FsFLD0SH = 313, |
| 329 | AVX512_FsFLD0SS = 314, |
| 330 | AVX_SET0 = 315, |
| 331 | CALL64m_RVMARKER = 316, |
| 332 | CALL64pcrel32_RVMARKER = 317, |
| 333 | CALL64r_RVMARKER = 318, |
| 334 | FsFLD0F128 = 319, |
| 335 | FsFLD0SD = 320, |
| 336 | FsFLD0SH = 321, |
| 337 | FsFLD0SS = 322, |
| 338 | INDIRECT_THUNK_CALL32 = 323, |
| 339 | INDIRECT_THUNK_CALL64 = 324, |
| 340 | INDIRECT_THUNK_TCRETURN32 = 325, |
| 341 | INDIRECT_THUNK_TCRETURN64 = 326, |
| 342 | KSET0D = 327, |
| 343 | KSET0Q = 328, |
| 344 | KSET0W = 329, |
| 345 | KSET1D = 330, |
| 346 | KSET1Q = 331, |
| 347 | KSET1W = 332, |
| 348 | LCMPXCHG16B_NO_RBX = 333, |
| 349 | LCMPXCHG16B_SAVE_RBX = 334, |
| 350 | MMX_SET0 = 335, |
| 351 | MORESTACK_RET = 336, |
| 352 | MORESTACK_RET_RESTORE_R10 = 337, |
| 353 | MOV32ImmSExti8 = 338, |
| 354 | MOV32r0 = 339, |
| 355 | MOV32r1 = 340, |
| 356 | MOV32r_1 = 341, |
| 357 | MOV32ri64 = 342, |
| 358 | MOV64ImmSExti8 = 343, |
| 359 | MWAITX = 344, |
| 360 | MWAITX_SAVE_RBX = 345, |
| 361 | PLDTILECFGV = 346, |
| 362 | PLEA32r = 347, |
| 363 | PLEA64r = 348, |
| 364 | PTDPBF16PSV = 349, |
| 365 | PTDPBSSDV = 350, |
| 366 | PTDPBSUDV = 351, |
| 367 | PTDPBUSDV = 352, |
| 368 | PTDPBUUDV = 353, |
| 369 | PTDPFP16PSV = 354, |
| 370 | PTILELOADDT1V = 355, |
| 371 | PTILELOADDV = 356, |
| 372 | PTILESTOREDV = 357, |
| 373 | PTILEZEROV = 358, |
| 374 | RDFLAGS32 = 359, |
| 375 | RDFLAGS64 = 360, |
| 376 | SEH_EndPrologue = 361, |
| 377 | SEH_Epilogue = 362, |
| 378 | SEH_PushFrame = 363, |
| 379 | SEH_PushReg = 364, |
| 380 | SEH_SaveReg = 365, |
| 381 | SEH_SaveXMM = 366, |
| 382 | SEH_SetFrame = 367, |
| 383 | SEH_StackAlign = 368, |
| 384 | SEH_StackAlloc = 369, |
| 385 | SETB_C32r = 370, |
| 386 | SETB_C64r = 371, |
| 387 | SHLDROT32ri = 372, |
| 388 | SHLDROT64ri = 373, |
| 389 | SHRDROT32ri = 374, |
| 390 | SHRDROT64ri = 375, |
| 391 | VMOVAPSZ128mr_NOVLX = 376, |
| 392 | VMOVAPSZ128rm_NOVLX = 377, |
| 393 | VMOVAPSZ256mr_NOVLX = 378, |
| 394 | VMOVAPSZ256rm_NOVLX = 379, |
| 395 | VMOVUPSZ128mr_NOVLX = 380, |
| 396 | VMOVUPSZ128rm_NOVLX = 381, |
| 397 | VMOVUPSZ256mr_NOVLX = 382, |
| 398 | VMOVUPSZ256rm_NOVLX = 383, |
| 399 | V_SET0 = 384, |
| 400 | V_SETALLONES = 385, |
| 401 | WRFLAGS32 = 386, |
| 402 | WRFLAGS64 = 387, |
| 403 | XABORT_DEF = 388, |
| 404 | XOR32_FP = 389, |
| 405 | XOR64_FP = 390, |
| 406 | AAA = 391, |
| 407 | AAD8i8 = 392, |
| 408 | AADD32mr = 393, |
| 409 | AADD32mr_EVEX = 394, |
| 410 | AADD64mr = 395, |
| 411 | AADD64mr_EVEX = 396, |
| 412 | AAM8i8 = 397, |
| 413 | AAND32mr = 398, |
| 414 | AAND32mr_EVEX = 399, |
| 415 | AAND64mr = 400, |
| 416 | AAND64mr_EVEX = 401, |
| 417 | AAS = 402, |
| 418 | ABS_F = 403, |
| 419 | ABS_Fp32 = 404, |
| 420 | ABS_Fp64 = 405, |
| 421 | ABS_Fp80 = 406, |
| 422 | ADC16i16 = 407, |
| 423 | ADC16mi = 408, |
| 424 | ADC16mi8 = 409, |
| 425 | ADC16mi8_EVEX = 410, |
| 426 | ADC16mi8_ND = 411, |
| 427 | ADC16mi_EVEX = 412, |
| 428 | ADC16mi_ND = 413, |
| 429 | ADC16mr = 414, |
| 430 | ADC16mr_EVEX = 415, |
| 431 | ADC16mr_ND = 416, |
| 432 | ADC16ri = 417, |
| 433 | ADC16ri8 = 418, |
| 434 | ADC16ri8_EVEX = 419, |
| 435 | ADC16ri8_ND = 420, |
| 436 | ADC16ri_EVEX = 421, |
| 437 | ADC16ri_ND = 422, |
| 438 | ADC16rm = 423, |
| 439 | ADC16rm_EVEX = 424, |
| 440 | ADC16rm_ND = 425, |
| 441 | ADC16rr = 426, |
| 442 | ADC16rr_EVEX = 427, |
| 443 | ADC16rr_EVEX_REV = 428, |
| 444 | ADC16rr_ND = 429, |
| 445 | ADC16rr_ND_REV = 430, |
| 446 | ADC16rr_REV = 431, |
| 447 | ADC32i32 = 432, |
| 448 | ADC32mi = 433, |
| 449 | ADC32mi8 = 434, |
| 450 | ADC32mi8_EVEX = 435, |
| 451 | ADC32mi8_ND = 436, |
| 452 | ADC32mi_EVEX = 437, |
| 453 | ADC32mi_ND = 438, |
| 454 | ADC32mr = 439, |
| 455 | ADC32mr_EVEX = 440, |
| 456 | ADC32mr_ND = 441, |
| 457 | ADC32ri = 442, |
| 458 | ADC32ri8 = 443, |
| 459 | ADC32ri8_EVEX = 444, |
| 460 | ADC32ri8_ND = 445, |
| 461 | ADC32ri_EVEX = 446, |
| 462 | ADC32ri_ND = 447, |
| 463 | ADC32rm = 448, |
| 464 | ADC32rm_EVEX = 449, |
| 465 | ADC32rm_ND = 450, |
| 466 | ADC32rr = 451, |
| 467 | ADC32rr_EVEX = 452, |
| 468 | ADC32rr_EVEX_REV = 453, |
| 469 | ADC32rr_ND = 454, |
| 470 | ADC32rr_ND_REV = 455, |
| 471 | ADC32rr_REV = 456, |
| 472 | ADC64i32 = 457, |
| 473 | ADC64mi32 = 458, |
| 474 | ADC64mi32_EVEX = 459, |
| 475 | ADC64mi32_ND = 460, |
| 476 | ADC64mi8 = 461, |
| 477 | ADC64mi8_EVEX = 462, |
| 478 | ADC64mi8_ND = 463, |
| 479 | ADC64mr = 464, |
| 480 | ADC64mr_EVEX = 465, |
| 481 | ADC64mr_ND = 466, |
| 482 | ADC64ri32 = 467, |
| 483 | ADC64ri32_EVEX = 468, |
| 484 | ADC64ri32_ND = 469, |
| 485 | ADC64ri8 = 470, |
| 486 | ADC64ri8_EVEX = 471, |
| 487 | ADC64ri8_ND = 472, |
| 488 | ADC64rm = 473, |
| 489 | ADC64rm_EVEX = 474, |
| 490 | ADC64rm_ND = 475, |
| 491 | ADC64rr = 476, |
| 492 | ADC64rr_EVEX = 477, |
| 493 | ADC64rr_EVEX_REV = 478, |
| 494 | ADC64rr_ND = 479, |
| 495 | ADC64rr_ND_REV = 480, |
| 496 | ADC64rr_REV = 481, |
| 497 | ADC8i8 = 482, |
| 498 | ADC8mi = 483, |
| 499 | ADC8mi8 = 484, |
| 500 | ADC8mi_EVEX = 485, |
| 501 | ADC8mi_ND = 486, |
| 502 | ADC8mr = 487, |
| 503 | ADC8mr_EVEX = 488, |
| 504 | ADC8mr_ND = 489, |
| 505 | ADC8ri = 490, |
| 506 | ADC8ri8 = 491, |
| 507 | ADC8ri_EVEX = 492, |
| 508 | ADC8ri_ND = 493, |
| 509 | ADC8rm = 494, |
| 510 | ADC8rm_EVEX = 495, |
| 511 | ADC8rm_ND = 496, |
| 512 | ADC8rr = 497, |
| 513 | ADC8rr_EVEX = 498, |
| 514 | ADC8rr_EVEX_REV = 499, |
| 515 | ADC8rr_ND = 500, |
| 516 | ADC8rr_ND_REV = 501, |
| 517 | ADC8rr_REV = 502, |
| 518 | ADCX32rm = 503, |
| 519 | ADCX32rm_EVEX = 504, |
| 520 | ADCX32rm_ND = 505, |
| 521 | ADCX32rr = 506, |
| 522 | ADCX32rr_EVEX = 507, |
| 523 | ADCX32rr_ND = 508, |
| 524 | ADCX64rm = 509, |
| 525 | ADCX64rm_EVEX = 510, |
| 526 | ADCX64rm_ND = 511, |
| 527 | ADCX64rr = 512, |
| 528 | ADCX64rr_EVEX = 513, |
| 529 | ADCX64rr_ND = 514, |
| 530 | ADD16i16 = 515, |
| 531 | ADD16mi = 516, |
| 532 | ADD16mi8 = 517, |
| 533 | ADD16mi8_EVEX = 518, |
| 534 | ADD16mi8_ND = 519, |
| 535 | ADD16mi8_NF = 520, |
| 536 | ADD16mi8_NF_ND = 521, |
| 537 | ADD16mi_EVEX = 522, |
| 538 | ADD16mi_ND = 523, |
| 539 | ADD16mi_NF = 524, |
| 540 | ADD16mi_NF_ND = 525, |
| 541 | ADD16mr = 526, |
| 542 | ADD16mr_EVEX = 527, |
| 543 | ADD16mr_ND = 528, |
| 544 | ADD16mr_NF = 529, |
| 545 | ADD16mr_NF_ND = 530, |
| 546 | ADD16ri = 531, |
| 547 | ADD16ri8 = 532, |
| 548 | ADD16ri8_EVEX = 533, |
| 549 | ADD16ri8_ND = 534, |
| 550 | ADD16ri8_NF = 535, |
| 551 | ADD16ri8_NF_ND = 536, |
| 552 | ADD16ri_EVEX = 537, |
| 553 | ADD16ri_ND = 538, |
| 554 | ADD16ri_NF = 539, |
| 555 | ADD16ri_NF_ND = 540, |
| 556 | ADD16rm = 541, |
| 557 | ADD16rm_EVEX = 542, |
| 558 | ADD16rm_ND = 543, |
| 559 | ADD16rm_NF = 544, |
| 560 | ADD16rm_NF_ND = 545, |
| 561 | ADD16rr = 546, |
| 562 | ADD16rr_EVEX = 547, |
| 563 | ADD16rr_EVEX_REV = 548, |
| 564 | ADD16rr_ND = 549, |
| 565 | ADD16rr_ND_REV = 550, |
| 566 | ADD16rr_NF = 551, |
| 567 | ADD16rr_NF_ND = 552, |
| 568 | ADD16rr_NF_ND_REV = 553, |
| 569 | ADD16rr_NF_REV = 554, |
| 570 | ADD16rr_REV = 555, |
| 571 | ADD32i32 = 556, |
| 572 | ADD32mi = 557, |
| 573 | ADD32mi8 = 558, |
| 574 | ADD32mi8_EVEX = 559, |
| 575 | ADD32mi8_ND = 560, |
| 576 | ADD32mi8_NF = 561, |
| 577 | ADD32mi8_NF_ND = 562, |
| 578 | ADD32mi_EVEX = 563, |
| 579 | ADD32mi_ND = 564, |
| 580 | ADD32mi_NF = 565, |
| 581 | ADD32mi_NF_ND = 566, |
| 582 | ADD32mr = 567, |
| 583 | ADD32mr_EVEX = 568, |
| 584 | ADD32mr_ND = 569, |
| 585 | ADD32mr_NF = 570, |
| 586 | ADD32mr_NF_ND = 571, |
| 587 | ADD32ri = 572, |
| 588 | ADD32ri8 = 573, |
| 589 | ADD32ri8_EVEX = 574, |
| 590 | ADD32ri8_ND = 575, |
| 591 | ADD32ri8_NF = 576, |
| 592 | ADD32ri8_NF_ND = 577, |
| 593 | ADD32ri_EVEX = 578, |
| 594 | ADD32ri_ND = 579, |
| 595 | ADD32ri_NF = 580, |
| 596 | ADD32ri_NF_ND = 581, |
| 597 | ADD32rm = 582, |
| 598 | ADD32rm_EVEX = 583, |
| 599 | ADD32rm_ND = 584, |
| 600 | ADD32rm_NF = 585, |
| 601 | ADD32rm_NF_ND = 586, |
| 602 | ADD32rr = 587, |
| 603 | ADD32rr_EVEX = 588, |
| 604 | ADD32rr_EVEX_REV = 589, |
| 605 | ADD32rr_ND = 590, |
| 606 | ADD32rr_ND_REV = 591, |
| 607 | ADD32rr_NF = 592, |
| 608 | ADD32rr_NF_ND = 593, |
| 609 | ADD32rr_NF_ND_REV = 594, |
| 610 | ADD32rr_NF_REV = 595, |
| 611 | ADD32rr_REV = 596, |
| 612 | ADD64i32 = 597, |
| 613 | ADD64mi32 = 598, |
| 614 | ADD64mi32_EVEX = 599, |
| 615 | ADD64mi32_ND = 600, |
| 616 | ADD64mi32_NF = 601, |
| 617 | ADD64mi32_NF_ND = 602, |
| 618 | ADD64mi8 = 603, |
| 619 | ADD64mi8_EVEX = 604, |
| 620 | ADD64mi8_ND = 605, |
| 621 | ADD64mi8_NF = 606, |
| 622 | ADD64mi8_NF_ND = 607, |
| 623 | ADD64mr = 608, |
| 624 | ADD64mr_EVEX = 609, |
| 625 | ADD64mr_ND = 610, |
| 626 | ADD64mr_NF = 611, |
| 627 | ADD64mr_NF_ND = 612, |
| 628 | ADD64ri32 = 613, |
| 629 | ADD64ri32_EVEX = 614, |
| 630 | ADD64ri32_ND = 615, |
| 631 | ADD64ri32_NF = 616, |
| 632 | ADD64ri32_NF_ND = 617, |
| 633 | ADD64ri8 = 618, |
| 634 | ADD64ri8_EVEX = 619, |
| 635 | ADD64ri8_ND = 620, |
| 636 | ADD64ri8_NF = 621, |
| 637 | ADD64ri8_NF_ND = 622, |
| 638 | ADD64rm = 623, |
| 639 | ADD64rm_EVEX = 624, |
| 640 | ADD64rm_ND = 625, |
| 641 | ADD64rm_NF = 626, |
| 642 | ADD64rm_NF_ND = 627, |
| 643 | ADD64rr = 628, |
| 644 | ADD64rr_EVEX = 629, |
| 645 | ADD64rr_EVEX_REV = 630, |
| 646 | ADD64rr_ND = 631, |
| 647 | ADD64rr_ND_REV = 632, |
| 648 | ADD64rr_NF = 633, |
| 649 | ADD64rr_NF_ND = 634, |
| 650 | ADD64rr_NF_ND_REV = 635, |
| 651 | ADD64rr_NF_REV = 636, |
| 652 | ADD64rr_REV = 637, |
| 653 | ADD8i8 = 638, |
| 654 | ADD8mi = 639, |
| 655 | ADD8mi8 = 640, |
| 656 | ADD8mi_EVEX = 641, |
| 657 | ADD8mi_ND = 642, |
| 658 | ADD8mi_NF = 643, |
| 659 | ADD8mi_NF_ND = 644, |
| 660 | ADD8mr = 645, |
| 661 | ADD8mr_EVEX = 646, |
| 662 | ADD8mr_ND = 647, |
| 663 | ADD8mr_NF = 648, |
| 664 | ADD8mr_NF_ND = 649, |
| 665 | ADD8ri = 650, |
| 666 | ADD8ri8 = 651, |
| 667 | ADD8ri_EVEX = 652, |
| 668 | ADD8ri_ND = 653, |
| 669 | ADD8ri_NF = 654, |
| 670 | ADD8ri_NF_ND = 655, |
| 671 | ADD8rm = 656, |
| 672 | ADD8rm_EVEX = 657, |
| 673 | ADD8rm_ND = 658, |
| 674 | ADD8rm_NF = 659, |
| 675 | ADD8rm_NF_ND = 660, |
| 676 | ADD8rr = 661, |
| 677 | ADD8rr_EVEX = 662, |
| 678 | ADD8rr_EVEX_REV = 663, |
| 679 | ADD8rr_ND = 664, |
| 680 | ADD8rr_ND_REV = 665, |
| 681 | ADD8rr_NF = 666, |
| 682 | ADD8rr_NF_ND = 667, |
| 683 | ADD8rr_NF_ND_REV = 668, |
| 684 | ADD8rr_NF_REV = 669, |
| 685 | ADD8rr_REV = 670, |
| 686 | ADDPDrm = 671, |
| 687 | ADDPDrr = 672, |
| 688 | ADDPSrm = 673, |
| 689 | ADDPSrr = 674, |
| 690 | ADDR16_PREFIX = 675, |
| 691 | ADDR32_PREFIX = 676, |
| 692 | ADDSDrm = 677, |
| 693 | ADDSDrm_Int = 678, |
| 694 | ADDSDrr = 679, |
| 695 | ADDSDrr_Int = 680, |
| 696 | ADDSSrm = 681, |
| 697 | ADDSSrm_Int = 682, |
| 698 | ADDSSrr = 683, |
| 699 | ADDSSrr_Int = 684, |
| 700 | ADDSUBPDrm = 685, |
| 701 | ADDSUBPDrr = 686, |
| 702 | ADDSUBPSrm = 687, |
| 703 | ADDSUBPSrr = 688, |
| 704 | ADD_F32m = 689, |
| 705 | ADD_F64m = 690, |
| 706 | ADD_FI16m = 691, |
| 707 | ADD_FI32m = 692, |
| 708 | ADD_FPrST0 = 693, |
| 709 | ADD_FST0r = 694, |
| 710 | ADD_Fp32 = 695, |
| 711 | ADD_Fp32m = 696, |
| 712 | ADD_Fp64 = 697, |
| 713 | ADD_Fp64m = 698, |
| 714 | ADD_Fp64m32 = 699, |
| 715 | ADD_Fp80 = 700, |
| 716 | ADD_Fp80m32 = 701, |
| 717 | ADD_Fp80m64 = 702, |
| 718 | ADD_FpI16m32 = 703, |
| 719 | ADD_FpI16m64 = 704, |
| 720 | ADD_FpI16m80 = 705, |
| 721 | ADD_FpI32m32 = 706, |
| 722 | ADD_FpI32m64 = 707, |
| 723 | ADD_FpI32m80 = 708, |
| 724 | ADD_FrST0 = 709, |
| 725 | ADJCALLSTACKDOWN32 = 710, |
| 726 | ADJCALLSTACKDOWN64 = 711, |
| 727 | ADJCALLSTACKUP32 = 712, |
| 728 | ADJCALLSTACKUP64 = 713, |
| 729 | ADOX32rm = 714, |
| 730 | ADOX32rm_EVEX = 715, |
| 731 | ADOX32rm_ND = 716, |
| 732 | ADOX32rr = 717, |
| 733 | ADOX32rr_EVEX = 718, |
| 734 | ADOX32rr_ND = 719, |
| 735 | ADOX64rm = 720, |
| 736 | ADOX64rm_EVEX = 721, |
| 737 | ADOX64rm_ND = 722, |
| 738 | ADOX64rr = 723, |
| 739 | ADOX64rr_EVEX = 724, |
| 740 | ADOX64rr_ND = 725, |
| 741 | AESDEC128KL = 726, |
| 742 | AESDEC256KL = 727, |
| 743 | AESDECLASTrm = 728, |
| 744 | AESDECLASTrr = 729, |
| 745 | AESDECWIDE128KL = 730, |
| 746 | AESDECWIDE256KL = 731, |
| 747 | AESDECrm = 732, |
| 748 | AESDECrr = 733, |
| 749 | AESENC128KL = 734, |
| 750 | AESENC256KL = 735, |
| 751 | AESENCLASTrm = 736, |
| 752 | AESENCLASTrr = 737, |
| 753 | AESENCWIDE128KL = 738, |
| 754 | AESENCWIDE256KL = 739, |
| 755 | AESENCrm = 740, |
| 756 | AESENCrr = 741, |
| 757 | AESIMCrm = 742, |
| 758 | AESIMCrr = 743, |
| 759 | AESKEYGENASSIST128rm = 744, |
| 760 | AESKEYGENASSIST128rr = 745, |
| 761 | AND16i16 = 746, |
| 762 | AND16mi = 747, |
| 763 | AND16mi8 = 748, |
| 764 | AND16mi8_EVEX = 749, |
| 765 | AND16mi8_ND = 750, |
| 766 | AND16mi8_NF = 751, |
| 767 | AND16mi8_NF_ND = 752, |
| 768 | AND16mi_EVEX = 753, |
| 769 | AND16mi_ND = 754, |
| 770 | AND16mi_NF = 755, |
| 771 | AND16mi_NF_ND = 756, |
| 772 | AND16mr = 757, |
| 773 | AND16mr_EVEX = 758, |
| 774 | AND16mr_ND = 759, |
| 775 | AND16mr_NF = 760, |
| 776 | AND16mr_NF_ND = 761, |
| 777 | AND16ri = 762, |
| 778 | AND16ri8 = 763, |
| 779 | AND16ri8_EVEX = 764, |
| 780 | AND16ri8_ND = 765, |
| 781 | AND16ri8_NF = 766, |
| 782 | AND16ri8_NF_ND = 767, |
| 783 | AND16ri_EVEX = 768, |
| 784 | AND16ri_ND = 769, |
| 785 | AND16ri_NF = 770, |
| 786 | AND16ri_NF_ND = 771, |
| 787 | AND16rm = 772, |
| 788 | AND16rm_EVEX = 773, |
| 789 | AND16rm_ND = 774, |
| 790 | AND16rm_NF = 775, |
| 791 | AND16rm_NF_ND = 776, |
| 792 | AND16rr = 777, |
| 793 | AND16rr_EVEX = 778, |
| 794 | AND16rr_EVEX_REV = 779, |
| 795 | AND16rr_ND = 780, |
| 796 | AND16rr_ND_REV = 781, |
| 797 | AND16rr_NF = 782, |
| 798 | AND16rr_NF_ND = 783, |
| 799 | AND16rr_NF_ND_REV = 784, |
| 800 | AND16rr_NF_REV = 785, |
| 801 | AND16rr_REV = 786, |
| 802 | AND32i32 = 787, |
| 803 | AND32mi = 788, |
| 804 | AND32mi8 = 789, |
| 805 | AND32mi8_EVEX = 790, |
| 806 | AND32mi8_ND = 791, |
| 807 | AND32mi8_NF = 792, |
| 808 | AND32mi8_NF_ND = 793, |
| 809 | AND32mi_EVEX = 794, |
| 810 | AND32mi_ND = 795, |
| 811 | AND32mi_NF = 796, |
| 812 | AND32mi_NF_ND = 797, |
| 813 | AND32mr = 798, |
| 814 | AND32mr_EVEX = 799, |
| 815 | AND32mr_ND = 800, |
| 816 | AND32mr_NF = 801, |
| 817 | AND32mr_NF_ND = 802, |
| 818 | AND32ri = 803, |
| 819 | AND32ri8 = 804, |
| 820 | AND32ri8_EVEX = 805, |
| 821 | AND32ri8_ND = 806, |
| 822 | AND32ri8_NF = 807, |
| 823 | AND32ri8_NF_ND = 808, |
| 824 | AND32ri_EVEX = 809, |
| 825 | AND32ri_ND = 810, |
| 826 | AND32ri_NF = 811, |
| 827 | AND32ri_NF_ND = 812, |
| 828 | AND32rm = 813, |
| 829 | AND32rm_EVEX = 814, |
| 830 | AND32rm_ND = 815, |
| 831 | AND32rm_NF = 816, |
| 832 | AND32rm_NF_ND = 817, |
| 833 | AND32rr = 818, |
| 834 | AND32rr_EVEX = 819, |
| 835 | AND32rr_EVEX_REV = 820, |
| 836 | AND32rr_ND = 821, |
| 837 | AND32rr_ND_REV = 822, |
| 838 | AND32rr_NF = 823, |
| 839 | AND32rr_NF_ND = 824, |
| 840 | AND32rr_NF_ND_REV = 825, |
| 841 | AND32rr_NF_REV = 826, |
| 842 | AND32rr_REV = 827, |
| 843 | AND64i32 = 828, |
| 844 | AND64mi32 = 829, |
| 845 | AND64mi32_EVEX = 830, |
| 846 | AND64mi32_ND = 831, |
| 847 | AND64mi32_NF = 832, |
| 848 | AND64mi32_NF_ND = 833, |
| 849 | AND64mi8 = 834, |
| 850 | AND64mi8_EVEX = 835, |
| 851 | AND64mi8_ND = 836, |
| 852 | AND64mi8_NF = 837, |
| 853 | AND64mi8_NF_ND = 838, |
| 854 | AND64mr = 839, |
| 855 | AND64mr_EVEX = 840, |
| 856 | AND64mr_ND = 841, |
| 857 | AND64mr_NF = 842, |
| 858 | AND64mr_NF_ND = 843, |
| 859 | AND64ri32 = 844, |
| 860 | AND64ri32_EVEX = 845, |
| 861 | AND64ri32_ND = 846, |
| 862 | AND64ri32_NF = 847, |
| 863 | AND64ri32_NF_ND = 848, |
| 864 | AND64ri8 = 849, |
| 865 | AND64ri8_EVEX = 850, |
| 866 | AND64ri8_ND = 851, |
| 867 | AND64ri8_NF = 852, |
| 868 | AND64ri8_NF_ND = 853, |
| 869 | AND64rm = 854, |
| 870 | AND64rm_EVEX = 855, |
| 871 | AND64rm_ND = 856, |
| 872 | AND64rm_NF = 857, |
| 873 | AND64rm_NF_ND = 858, |
| 874 | AND64rr = 859, |
| 875 | AND64rr_EVEX = 860, |
| 876 | AND64rr_EVEX_REV = 861, |
| 877 | AND64rr_ND = 862, |
| 878 | AND64rr_ND_REV = 863, |
| 879 | AND64rr_NF = 864, |
| 880 | AND64rr_NF_ND = 865, |
| 881 | AND64rr_NF_ND_REV = 866, |
| 882 | AND64rr_NF_REV = 867, |
| 883 | AND64rr_REV = 868, |
| 884 | AND8i8 = 869, |
| 885 | AND8mi = 870, |
| 886 | AND8mi8 = 871, |
| 887 | AND8mi_EVEX = 872, |
| 888 | AND8mi_ND = 873, |
| 889 | AND8mi_NF = 874, |
| 890 | AND8mi_NF_ND = 875, |
| 891 | AND8mr = 876, |
| 892 | AND8mr_EVEX = 877, |
| 893 | AND8mr_ND = 878, |
| 894 | AND8mr_NF = 879, |
| 895 | AND8mr_NF_ND = 880, |
| 896 | AND8ri = 881, |
| 897 | AND8ri8 = 882, |
| 898 | AND8ri_EVEX = 883, |
| 899 | AND8ri_ND = 884, |
| 900 | AND8ri_NF = 885, |
| 901 | AND8ri_NF_ND = 886, |
| 902 | AND8rm = 887, |
| 903 | AND8rm_EVEX = 888, |
| 904 | AND8rm_ND = 889, |
| 905 | AND8rm_NF = 890, |
| 906 | AND8rm_NF_ND = 891, |
| 907 | AND8rr = 892, |
| 908 | AND8rr_EVEX = 893, |
| 909 | AND8rr_EVEX_REV = 894, |
| 910 | AND8rr_ND = 895, |
| 911 | AND8rr_ND_REV = 896, |
| 912 | AND8rr_NF = 897, |
| 913 | AND8rr_NF_ND = 898, |
| 914 | AND8rr_NF_ND_REV = 899, |
| 915 | AND8rr_NF_REV = 900, |
| 916 | AND8rr_REV = 901, |
| 917 | ANDN32rm = 902, |
| 918 | ANDN32rm_EVEX = 903, |
| 919 | ANDN32rm_NF = 904, |
| 920 | ANDN32rr = 905, |
| 921 | ANDN32rr_EVEX = 906, |
| 922 | ANDN32rr_NF = 907, |
| 923 | ANDN64rm = 908, |
| 924 | ANDN64rm_EVEX = 909, |
| 925 | ANDN64rm_NF = 910, |
| 926 | ANDN64rr = 911, |
| 927 | ANDN64rr_EVEX = 912, |
| 928 | ANDN64rr_NF = 913, |
| 929 | ANDNPDrm = 914, |
| 930 | ANDNPDrr = 915, |
| 931 | ANDNPSrm = 916, |
| 932 | ANDNPSrr = 917, |
| 933 | ANDPDrm = 918, |
| 934 | ANDPDrr = 919, |
| 935 | ANDPSrm = 920, |
| 936 | ANDPSrr = 921, |
| 937 | AOR32mr = 922, |
| 938 | AOR32mr_EVEX = 923, |
| 939 | AOR64mr = 924, |
| 940 | AOR64mr_EVEX = 925, |
| 941 | ARPL16mr = 926, |
| 942 | ARPL16rr = 927, |
| 943 | ASAN_CHECK_MEMACCESS = 928, |
| 944 | AXOR32mr = 929, |
| 945 | AXOR32mr_EVEX = 930, |
| 946 | AXOR64mr = 931, |
| 947 | AXOR64mr_EVEX = 932, |
| 948 | BEXTR32rm = 933, |
| 949 | BEXTR32rm_EVEX = 934, |
| 950 | BEXTR32rm_NF = 935, |
| 951 | BEXTR32rr = 936, |
| 952 | BEXTR32rr_EVEX = 937, |
| 953 | BEXTR32rr_NF = 938, |
| 954 | BEXTR64rm = 939, |
| 955 | BEXTR64rm_EVEX = 940, |
| 956 | BEXTR64rm_NF = 941, |
| 957 | BEXTR64rr = 942, |
| 958 | BEXTR64rr_EVEX = 943, |
| 959 | BEXTR64rr_NF = 944, |
| 960 | BEXTRI32mi = 945, |
| 961 | BEXTRI32ri = 946, |
| 962 | BEXTRI64mi = 947, |
| 963 | BEXTRI64ri = 948, |
| 964 | BLCFILL32rm = 949, |
| 965 | BLCFILL32rr = 950, |
| 966 | BLCFILL64rm = 951, |
| 967 | BLCFILL64rr = 952, |
| 968 | BLCI32rm = 953, |
| 969 | BLCI32rr = 954, |
| 970 | BLCI64rm = 955, |
| 971 | BLCI64rr = 956, |
| 972 | BLCIC32rm = 957, |
| 973 | BLCIC32rr = 958, |
| 974 | BLCIC64rm = 959, |
| 975 | BLCIC64rr = 960, |
| 976 | BLCMSK32rm = 961, |
| 977 | BLCMSK32rr = 962, |
| 978 | BLCMSK64rm = 963, |
| 979 | BLCMSK64rr = 964, |
| 980 | BLCS32rm = 965, |
| 981 | BLCS32rr = 966, |
| 982 | BLCS64rm = 967, |
| 983 | BLCS64rr = 968, |
| 984 | BLENDPDrmi = 969, |
| 985 | BLENDPDrri = 970, |
| 986 | BLENDPSrmi = 971, |
| 987 | BLENDPSrri = 972, |
| 988 | BLENDVPDrm0 = 973, |
| 989 | BLENDVPDrr0 = 974, |
| 990 | BLENDVPSrm0 = 975, |
| 991 | BLENDVPSrr0 = 976, |
| 992 | BLSFILL32rm = 977, |
| 993 | BLSFILL32rr = 978, |
| 994 | BLSFILL64rm = 979, |
| 995 | BLSFILL64rr = 980, |
| 996 | BLSI32rm = 981, |
| 997 | BLSI32rm_EVEX = 982, |
| 998 | BLSI32rm_NF = 983, |
| 999 | BLSI32rr = 984, |
| 1000 | BLSI32rr_EVEX = 985, |
| 1001 | BLSI32rr_NF = 986, |
| 1002 | BLSI64rm = 987, |
| 1003 | BLSI64rm_EVEX = 988, |
| 1004 | BLSI64rm_NF = 989, |
| 1005 | BLSI64rr = 990, |
| 1006 | BLSI64rr_EVEX = 991, |
| 1007 | BLSI64rr_NF = 992, |
| 1008 | BLSIC32rm = 993, |
| 1009 | BLSIC32rr = 994, |
| 1010 | BLSIC64rm = 995, |
| 1011 | BLSIC64rr = 996, |
| 1012 | BLSMSK32rm = 997, |
| 1013 | BLSMSK32rm_EVEX = 998, |
| 1014 | BLSMSK32rm_NF = 999, |
| 1015 | BLSMSK32rr = 1000, |
| 1016 | BLSMSK32rr_EVEX = 1001, |
| 1017 | BLSMSK32rr_NF = 1002, |
| 1018 | BLSMSK64rm = 1003, |
| 1019 | BLSMSK64rm_EVEX = 1004, |
| 1020 | BLSMSK64rm_NF = 1005, |
| 1021 | BLSMSK64rr = 1006, |
| 1022 | BLSMSK64rr_EVEX = 1007, |
| 1023 | BLSMSK64rr_NF = 1008, |
| 1024 | BLSR32rm = 1009, |
| 1025 | BLSR32rm_EVEX = 1010, |
| 1026 | BLSR32rm_NF = 1011, |
| 1027 | BLSR32rr = 1012, |
| 1028 | BLSR32rr_EVEX = 1013, |
| 1029 | BLSR32rr_NF = 1014, |
| 1030 | BLSR64rm = 1015, |
| 1031 | BLSR64rm_EVEX = 1016, |
| 1032 | BLSR64rm_NF = 1017, |
| 1033 | BLSR64rr = 1018, |
| 1034 | BLSR64rr_EVEX = 1019, |
| 1035 | BLSR64rr_NF = 1020, |
| 1036 | BOUNDS16rm = 1021, |
| 1037 | BOUNDS32rm = 1022, |
| 1038 | BSF16rm = 1023, |
| 1039 | BSF16rr = 1024, |
| 1040 | BSF32rm = 1025, |
| 1041 | BSF32rr = 1026, |
| 1042 | BSF64rm = 1027, |
| 1043 | BSF64rr = 1028, |
| 1044 | BSR16rm = 1029, |
| 1045 | BSR16rr = 1030, |
| 1046 | BSR32rm = 1031, |
| 1047 | BSR32rr = 1032, |
| 1048 | BSR64rm = 1033, |
| 1049 | BSR64rr = 1034, |
| 1050 | BSWAP16r_BAD = 1035, |
| 1051 | BSWAP32r = 1036, |
| 1052 | BSWAP64r = 1037, |
| 1053 | BT16mi8 = 1038, |
| 1054 | BT16mr = 1039, |
| 1055 | BT16ri8 = 1040, |
| 1056 | BT16rr = 1041, |
| 1057 | BT32mi8 = 1042, |
| 1058 | BT32mr = 1043, |
| 1059 | BT32ri8 = 1044, |
| 1060 | BT32rr = 1045, |
| 1061 | BT64mi8 = 1046, |
| 1062 | BT64mr = 1047, |
| 1063 | BT64ri8 = 1048, |
| 1064 | BT64rr = 1049, |
| 1065 | BTC16mi8 = 1050, |
| 1066 | BTC16mr = 1051, |
| 1067 | BTC16ri8 = 1052, |
| 1068 | BTC16rr = 1053, |
| 1069 | BTC32mi8 = 1054, |
| 1070 | BTC32mr = 1055, |
| 1071 | BTC32ri8 = 1056, |
| 1072 | BTC32rr = 1057, |
| 1073 | BTC64mi8 = 1058, |
| 1074 | BTC64mr = 1059, |
| 1075 | BTC64ri8 = 1060, |
| 1076 | BTC64rr = 1061, |
| 1077 | BTR16mi8 = 1062, |
| 1078 | BTR16mr = 1063, |
| 1079 | BTR16ri8 = 1064, |
| 1080 | BTR16rr = 1065, |
| 1081 | BTR32mi8 = 1066, |
| 1082 | BTR32mr = 1067, |
| 1083 | BTR32ri8 = 1068, |
| 1084 | BTR32rr = 1069, |
| 1085 | BTR64mi8 = 1070, |
| 1086 | BTR64mr = 1071, |
| 1087 | BTR64ri8 = 1072, |
| 1088 | BTR64rr = 1073, |
| 1089 | BTS16mi8 = 1074, |
| 1090 | BTS16mr = 1075, |
| 1091 | BTS16ri8 = 1076, |
| 1092 | BTS16rr = 1077, |
| 1093 | BTS32mi8 = 1078, |
| 1094 | BTS32mr = 1079, |
| 1095 | BTS32ri8 = 1080, |
| 1096 | BTS32rr = 1081, |
| 1097 | BTS64mi8 = 1082, |
| 1098 | BTS64mr = 1083, |
| 1099 | BTS64ri8 = 1084, |
| 1100 | BTS64rr = 1085, |
| 1101 | BZHI32rm = 1086, |
| 1102 | BZHI32rm_EVEX = 1087, |
| 1103 | BZHI32rm_NF = 1088, |
| 1104 | BZHI32rr = 1089, |
| 1105 | BZHI32rr_EVEX = 1090, |
| 1106 | BZHI32rr_NF = 1091, |
| 1107 | BZHI64rm = 1092, |
| 1108 | BZHI64rm_EVEX = 1093, |
| 1109 | BZHI64rm_NF = 1094, |
| 1110 | BZHI64rr = 1095, |
| 1111 | BZHI64rr_EVEX = 1096, |
| 1112 | BZHI64rr_NF = 1097, |
| 1113 | CALL16m = 1098, |
| 1114 | CALL16m_NT = 1099, |
| 1115 | CALL16r = 1100, |
| 1116 | CALL16r_NT = 1101, |
| 1117 | CALL32m = 1102, |
| 1118 | CALL32m_NT = 1103, |
| 1119 | CALL32r = 1104, |
| 1120 | CALL32r_NT = 1105, |
| 1121 | CALL64m = 1106, |
| 1122 | CALL64m_NT = 1107, |
| 1123 | CALL64pcrel32 = 1108, |
| 1124 | CALL64r = 1109, |
| 1125 | CALL64r_NT = 1110, |
| 1126 | CALLpcrel16 = 1111, |
| 1127 | CALLpcrel32 = 1112, |
| 1128 | CATCHRET = 1113, |
| 1129 | CBW = 1114, |
| 1130 | CCMP16mi = 1115, |
| 1131 | CCMP16mi8 = 1116, |
| 1132 | CCMP16mr = 1117, |
| 1133 | CCMP16ri = 1118, |
| 1134 | CCMP16ri8 = 1119, |
| 1135 | CCMP16rm = 1120, |
| 1136 | CCMP16rr = 1121, |
| 1137 | CCMP16rr_REV = 1122, |
| 1138 | CCMP32mi = 1123, |
| 1139 | CCMP32mi8 = 1124, |
| 1140 | CCMP32mr = 1125, |
| 1141 | CCMP32ri = 1126, |
| 1142 | CCMP32ri8 = 1127, |
| 1143 | CCMP32rm = 1128, |
| 1144 | CCMP32rr = 1129, |
| 1145 | CCMP32rr_REV = 1130, |
| 1146 | CCMP64mi32 = 1131, |
| 1147 | CCMP64mi8 = 1132, |
| 1148 | CCMP64mr = 1133, |
| 1149 | CCMP64ri32 = 1134, |
| 1150 | CCMP64ri8 = 1135, |
| 1151 | CCMP64rm = 1136, |
| 1152 | CCMP64rr = 1137, |
| 1153 | CCMP64rr_REV = 1138, |
| 1154 | CCMP8mi = 1139, |
| 1155 | CCMP8mr = 1140, |
| 1156 | CCMP8ri = 1141, |
| 1157 | CCMP8rm = 1142, |
| 1158 | CCMP8rr = 1143, |
| 1159 | CCMP8rr_REV = 1144, |
| 1160 | CDQ = 1145, |
| 1161 | CDQE = 1146, |
| 1162 | CFCMOV16mr = 1147, |
| 1163 | CFCMOV16rm = 1148, |
| 1164 | CFCMOV16rm_ND = 1149, |
| 1165 | CFCMOV16rr = 1150, |
| 1166 | CFCMOV16rr_ND = 1151, |
| 1167 | CFCMOV16rr_REV = 1152, |
| 1168 | CFCMOV32mr = 1153, |
| 1169 | CFCMOV32rm = 1154, |
| 1170 | CFCMOV32rm_ND = 1155, |
| 1171 | CFCMOV32rr = 1156, |
| 1172 | CFCMOV32rr_ND = 1157, |
| 1173 | CFCMOV32rr_REV = 1158, |
| 1174 | CFCMOV64mr = 1159, |
| 1175 | CFCMOV64rm = 1160, |
| 1176 | CFCMOV64rm_ND = 1161, |
| 1177 | CFCMOV64rr = 1162, |
| 1178 | CFCMOV64rr_ND = 1163, |
| 1179 | CFCMOV64rr_REV = 1164, |
| 1180 | CHS_F = 1165, |
| 1181 | CHS_Fp32 = 1166, |
| 1182 | CHS_Fp64 = 1167, |
| 1183 | CHS_Fp80 = 1168, |
| 1184 | CLAC = 1169, |
| 1185 | CLC = 1170, |
| 1186 | CLD = 1171, |
| 1187 | CLDEMOTE = 1172, |
| 1188 | CLEANUPRET = 1173, |
| 1189 | CLFLUSH = 1174, |
| 1190 | CLFLUSHOPT = 1175, |
| 1191 | CLGI = 1176, |
| 1192 | CLI = 1177, |
| 1193 | CLRSSBSY = 1178, |
| 1194 | CLTS = 1179, |
| 1195 | CLUI = 1180, |
| 1196 | CLWB = 1181, |
| 1197 | CLZERO32r = 1182, |
| 1198 | CLZERO64r = 1183, |
| 1199 | CMC = 1184, |
| 1200 | CMOV16rm = 1185, |
| 1201 | CMOV16rm_ND = 1186, |
| 1202 | CMOV16rr = 1187, |
| 1203 | CMOV16rr_ND = 1188, |
| 1204 | CMOV32rm = 1189, |
| 1205 | CMOV32rm_ND = 1190, |
| 1206 | CMOV32rr = 1191, |
| 1207 | CMOV32rr_ND = 1192, |
| 1208 | CMOV64rm = 1193, |
| 1209 | CMOV64rm_ND = 1194, |
| 1210 | CMOV64rr = 1195, |
| 1211 | CMOV64rr_ND = 1196, |
| 1212 | CMOVBE_F = 1197, |
| 1213 | CMOVBE_Fp32 = 1198, |
| 1214 | CMOVBE_Fp64 = 1199, |
| 1215 | CMOVBE_Fp80 = 1200, |
| 1216 | CMOVB_F = 1201, |
| 1217 | CMOVB_Fp32 = 1202, |
| 1218 | CMOVB_Fp64 = 1203, |
| 1219 | CMOVB_Fp80 = 1204, |
| 1220 | CMOVE_F = 1205, |
| 1221 | CMOVE_Fp32 = 1206, |
| 1222 | CMOVE_Fp64 = 1207, |
| 1223 | CMOVE_Fp80 = 1208, |
| 1224 | CMOVNBE_F = 1209, |
| 1225 | CMOVNBE_Fp32 = 1210, |
| 1226 | CMOVNBE_Fp64 = 1211, |
| 1227 | CMOVNBE_Fp80 = 1212, |
| 1228 | CMOVNB_F = 1213, |
| 1229 | CMOVNB_Fp32 = 1214, |
| 1230 | CMOVNB_Fp64 = 1215, |
| 1231 | CMOVNB_Fp80 = 1216, |
| 1232 | CMOVNE_F = 1217, |
| 1233 | CMOVNE_Fp32 = 1218, |
| 1234 | CMOVNE_Fp64 = 1219, |
| 1235 | CMOVNE_Fp80 = 1220, |
| 1236 | CMOVNP_F = 1221, |
| 1237 | CMOVNP_Fp32 = 1222, |
| 1238 | CMOVNP_Fp64 = 1223, |
| 1239 | CMOVNP_Fp80 = 1224, |
| 1240 | CMOVP_F = 1225, |
| 1241 | CMOVP_Fp32 = 1226, |
| 1242 | CMOVP_Fp64 = 1227, |
| 1243 | CMOVP_Fp80 = 1228, |
| 1244 | CMOV_FR16 = 1229, |
| 1245 | CMOV_FR16X = 1230, |
| 1246 | CMOV_FR32 = 1231, |
| 1247 | CMOV_FR32X = 1232, |
| 1248 | CMOV_FR64 = 1233, |
| 1249 | CMOV_FR64X = 1234, |
| 1250 | CMOV_GR16 = 1235, |
| 1251 | CMOV_GR32 = 1236, |
| 1252 | CMOV_GR8 = 1237, |
| 1253 | CMOV_RFP32 = 1238, |
| 1254 | CMOV_RFP64 = 1239, |
| 1255 | CMOV_RFP80 = 1240, |
| 1256 | CMOV_VK1 = 1241, |
| 1257 | CMOV_VK16 = 1242, |
| 1258 | CMOV_VK2 = 1243, |
| 1259 | CMOV_VK32 = 1244, |
| 1260 | CMOV_VK4 = 1245, |
| 1261 | CMOV_VK64 = 1246, |
| 1262 | CMOV_VK8 = 1247, |
| 1263 | CMOV_VR128 = 1248, |
| 1264 | CMOV_VR128X = 1249, |
| 1265 | CMOV_VR256 = 1250, |
| 1266 | CMOV_VR256X = 1251, |
| 1267 | CMOV_VR512 = 1252, |
| 1268 | CMOV_VR64 = 1253, |
| 1269 | CMP16i16 = 1254, |
| 1270 | CMP16mi = 1255, |
| 1271 | CMP16mi8 = 1256, |
| 1272 | CMP16mr = 1257, |
| 1273 | CMP16ri = 1258, |
| 1274 | CMP16ri8 = 1259, |
| 1275 | CMP16rm = 1260, |
| 1276 | CMP16rr = 1261, |
| 1277 | CMP16rr_REV = 1262, |
| 1278 | CMP32i32 = 1263, |
| 1279 | CMP32mi = 1264, |
| 1280 | CMP32mi8 = 1265, |
| 1281 | CMP32mr = 1266, |
| 1282 | CMP32ri = 1267, |
| 1283 | CMP32ri8 = 1268, |
| 1284 | CMP32rm = 1269, |
| 1285 | CMP32rr = 1270, |
| 1286 | CMP32rr_REV = 1271, |
| 1287 | CMP64i32 = 1272, |
| 1288 | CMP64mi32 = 1273, |
| 1289 | CMP64mi8 = 1274, |
| 1290 | CMP64mr = 1275, |
| 1291 | CMP64ri32 = 1276, |
| 1292 | CMP64ri8 = 1277, |
| 1293 | CMP64rm = 1278, |
| 1294 | CMP64rr = 1279, |
| 1295 | CMP64rr_REV = 1280, |
| 1296 | CMP8i8 = 1281, |
| 1297 | CMP8mi = 1282, |
| 1298 | CMP8mi8 = 1283, |
| 1299 | CMP8mr = 1284, |
| 1300 | CMP8ri = 1285, |
| 1301 | CMP8ri8 = 1286, |
| 1302 | CMP8rm = 1287, |
| 1303 | CMP8rr = 1288, |
| 1304 | CMP8rr_REV = 1289, |
| 1305 | CMPCCXADDmr32 = 1290, |
| 1306 | CMPCCXADDmr32_EVEX = 1291, |
| 1307 | CMPCCXADDmr64 = 1292, |
| 1308 | CMPCCXADDmr64_EVEX = 1293, |
| 1309 | CMPPDrmi = 1294, |
| 1310 | CMPPDrri = 1295, |
| 1311 | CMPPSrmi = 1296, |
| 1312 | CMPPSrri = 1297, |
| 1313 | CMPSB = 1298, |
| 1314 | CMPSDrmi = 1299, |
| 1315 | CMPSDrmi_Int = 1300, |
| 1316 | CMPSDrri = 1301, |
| 1317 | CMPSDrri_Int = 1302, |
| 1318 | CMPSL = 1303, |
| 1319 | CMPSQ = 1304, |
| 1320 | CMPSSrmi = 1305, |
| 1321 | CMPSSrmi_Int = 1306, |
| 1322 | CMPSSrri = 1307, |
| 1323 | CMPSSrri_Int = 1308, |
| 1324 | CMPSW = 1309, |
| 1325 | CMPXCHG16B = 1310, |
| 1326 | CMPXCHG16rm = 1311, |
| 1327 | CMPXCHG16rr = 1312, |
| 1328 | CMPXCHG32rm = 1313, |
| 1329 | CMPXCHG32rr = 1314, |
| 1330 | CMPXCHG64rm = 1315, |
| 1331 | CMPXCHG64rr = 1316, |
| 1332 | CMPXCHG8B = 1317, |
| 1333 | CMPXCHG8rm = 1318, |
| 1334 | CMPXCHG8rr = 1319, |
| 1335 | COMISDrm = 1320, |
| 1336 | COMISDrm_Int = 1321, |
| 1337 | COMISDrr = 1322, |
| 1338 | COMISDrr_Int = 1323, |
| 1339 | COMISSrm = 1324, |
| 1340 | COMISSrm_Int = 1325, |
| 1341 | COMISSrr = 1326, |
| 1342 | COMISSrr_Int = 1327, |
| 1343 | COMP_FST0r = 1328, |
| 1344 | COM_FIPr = 1329, |
| 1345 | COM_FIr = 1330, |
| 1346 | COM_FST0r = 1331, |
| 1347 | COM_FpIr32 = 1332, |
| 1348 | COM_FpIr64 = 1333, |
| 1349 | COM_FpIr80 = 1334, |
| 1350 | COM_Fpr32 = 1335, |
| 1351 | COM_Fpr64 = 1336, |
| 1352 | COM_Fpr80 = 1337, |
| 1353 | CPUID = 1338, |
| 1354 | CQO = 1339, |
| 1355 | CRC32r32m16 = 1340, |
| 1356 | CRC32r32m16_EVEX = 1341, |
| 1357 | CRC32r32m32 = 1342, |
| 1358 | CRC32r32m32_EVEX = 1343, |
| 1359 | CRC32r32m8 = 1344, |
| 1360 | CRC32r32m8_EVEX = 1345, |
| 1361 | CRC32r32r16 = 1346, |
| 1362 | CRC32r32r16_EVEX = 1347, |
| 1363 | CRC32r32r32 = 1348, |
| 1364 | CRC32r32r32_EVEX = 1349, |
| 1365 | CRC32r32r8 = 1350, |
| 1366 | CRC32r32r8_EVEX = 1351, |
| 1367 | CRC32r64m64 = 1352, |
| 1368 | CRC32r64m64_EVEX = 1353, |
| 1369 | CRC32r64m8 = 1354, |
| 1370 | CRC32r64m8_EVEX = 1355, |
| 1371 | CRC32r64r64 = 1356, |
| 1372 | CRC32r64r64_EVEX = 1357, |
| 1373 | CRC32r64r8 = 1358, |
| 1374 | CRC32r64r8_EVEX = 1359, |
| 1375 | CS_PREFIX = 1360, |
| 1376 | CTEST16mi = 1361, |
| 1377 | CTEST16mr = 1362, |
| 1378 | CTEST16ri = 1363, |
| 1379 | CTEST16rr = 1364, |
| 1380 | CTEST32mi = 1365, |
| 1381 | CTEST32mr = 1366, |
| 1382 | CTEST32ri = 1367, |
| 1383 | CTEST32rr = 1368, |
| 1384 | CTEST64mi32 = 1369, |
| 1385 | CTEST64mr = 1370, |
| 1386 | CTEST64ri32 = 1371, |
| 1387 | CTEST64rr = 1372, |
| 1388 | CTEST8mi = 1373, |
| 1389 | CTEST8mr = 1374, |
| 1390 | CTEST8ri = 1375, |
| 1391 | CTEST8rr = 1376, |
| 1392 | CVTDQ2PDrm = 1377, |
| 1393 | CVTDQ2PDrr = 1378, |
| 1394 | CVTDQ2PSrm = 1379, |
| 1395 | CVTDQ2PSrr = 1380, |
| 1396 | CVTPD2DQrm = 1381, |
| 1397 | CVTPD2DQrr = 1382, |
| 1398 | CVTPD2PSrm = 1383, |
| 1399 | CVTPD2PSrr = 1384, |
| 1400 | CVTPS2DQrm = 1385, |
| 1401 | CVTPS2DQrr = 1386, |
| 1402 | CVTPS2PDrm = 1387, |
| 1403 | CVTPS2PDrr = 1388, |
| 1404 | CVTSD2SI64rm = 1389, |
| 1405 | CVTSD2SI64rm_Int = 1390, |
| 1406 | CVTSD2SI64rr = 1391, |
| 1407 | CVTSD2SI64rr_Int = 1392, |
| 1408 | CVTSD2SIrm = 1393, |
| 1409 | CVTSD2SIrm_Int = 1394, |
| 1410 | CVTSD2SIrr = 1395, |
| 1411 | CVTSD2SIrr_Int = 1396, |
| 1412 | CVTSD2SSrm = 1397, |
| 1413 | CVTSD2SSrm_Int = 1398, |
| 1414 | CVTSD2SSrr = 1399, |
| 1415 | CVTSD2SSrr_Int = 1400, |
| 1416 | CVTSI2SDrm = 1401, |
| 1417 | CVTSI2SDrm_Int = 1402, |
| 1418 | CVTSI2SDrr = 1403, |
| 1419 | CVTSI2SDrr_Int = 1404, |
| 1420 | CVTSI2SSrm = 1405, |
| 1421 | CVTSI2SSrm_Int = 1406, |
| 1422 | CVTSI2SSrr = 1407, |
| 1423 | CVTSI2SSrr_Int = 1408, |
| 1424 | CVTSI642SDrm = 1409, |
| 1425 | CVTSI642SDrm_Int = 1410, |
| 1426 | CVTSI642SDrr = 1411, |
| 1427 | CVTSI642SDrr_Int = 1412, |
| 1428 | CVTSI642SSrm = 1413, |
| 1429 | CVTSI642SSrm_Int = 1414, |
| 1430 | CVTSI642SSrr = 1415, |
| 1431 | CVTSI642SSrr_Int = 1416, |
| 1432 | CVTSS2SDrm = 1417, |
| 1433 | CVTSS2SDrm_Int = 1418, |
| 1434 | CVTSS2SDrr = 1419, |
| 1435 | CVTSS2SDrr_Int = 1420, |
| 1436 | CVTSS2SI64rm = 1421, |
| 1437 | CVTSS2SI64rm_Int = 1422, |
| 1438 | CVTSS2SI64rr = 1423, |
| 1439 | CVTSS2SI64rr_Int = 1424, |
| 1440 | CVTSS2SIrm = 1425, |
| 1441 | CVTSS2SIrm_Int = 1426, |
| 1442 | CVTSS2SIrr = 1427, |
| 1443 | CVTSS2SIrr_Int = 1428, |
| 1444 | CVTTPD2DQrm = 1429, |
| 1445 | CVTTPD2DQrr = 1430, |
| 1446 | CVTTPS2DQrm = 1431, |
| 1447 | CVTTPS2DQrr = 1432, |
| 1448 | CVTTSD2SI64rm = 1433, |
| 1449 | CVTTSD2SI64rm_Int = 1434, |
| 1450 | CVTTSD2SI64rr = 1435, |
| 1451 | CVTTSD2SI64rr_Int = 1436, |
| 1452 | CVTTSD2SIrm = 1437, |
| 1453 | CVTTSD2SIrm_Int = 1438, |
| 1454 | CVTTSD2SIrr = 1439, |
| 1455 | CVTTSD2SIrr_Int = 1440, |
| 1456 | CVTTSS2SI64rm = 1441, |
| 1457 | CVTTSS2SI64rm_Int = 1442, |
| 1458 | CVTTSS2SI64rr = 1443, |
| 1459 | CVTTSS2SI64rr_Int = 1444, |
| 1460 | CVTTSS2SIrm = 1445, |
| 1461 | CVTTSS2SIrm_Int = 1446, |
| 1462 | CVTTSS2SIrr = 1447, |
| 1463 | CVTTSS2SIrr_Int = 1448, |
| 1464 | CWD = 1449, |
| 1465 | CWDE = 1450, |
| 1466 | DAA = 1451, |
| 1467 | DAS = 1452, |
| 1468 | DATA16_PREFIX = 1453, |
| 1469 | DEC16m = 1454, |
| 1470 | DEC16m_EVEX = 1455, |
| 1471 | DEC16m_ND = 1456, |
| 1472 | DEC16m_NF = 1457, |
| 1473 | DEC16m_NF_ND = 1458, |
| 1474 | DEC16r = 1459, |
| 1475 | DEC16r_EVEX = 1460, |
| 1476 | DEC16r_ND = 1461, |
| 1477 | DEC16r_NF = 1462, |
| 1478 | DEC16r_NF_ND = 1463, |
| 1479 | DEC16r_alt = 1464, |
| 1480 | DEC32m = 1465, |
| 1481 | DEC32m_EVEX = 1466, |
| 1482 | DEC32m_ND = 1467, |
| 1483 | DEC32m_NF = 1468, |
| 1484 | DEC32m_NF_ND = 1469, |
| 1485 | DEC32r = 1470, |
| 1486 | DEC32r_EVEX = 1471, |
| 1487 | DEC32r_ND = 1472, |
| 1488 | DEC32r_NF = 1473, |
| 1489 | DEC32r_NF_ND = 1474, |
| 1490 | DEC32r_alt = 1475, |
| 1491 | DEC64m = 1476, |
| 1492 | DEC64m_EVEX = 1477, |
| 1493 | DEC64m_ND = 1478, |
| 1494 | DEC64m_NF = 1479, |
| 1495 | DEC64m_NF_ND = 1480, |
| 1496 | DEC64r = 1481, |
| 1497 | DEC64r_EVEX = 1482, |
| 1498 | DEC64r_ND = 1483, |
| 1499 | DEC64r_NF = 1484, |
| 1500 | DEC64r_NF_ND = 1485, |
| 1501 | DEC8m = 1486, |
| 1502 | DEC8m_EVEX = 1487, |
| 1503 | DEC8m_ND = 1488, |
| 1504 | DEC8m_NF = 1489, |
| 1505 | DEC8m_NF_ND = 1490, |
| 1506 | DEC8r = 1491, |
| 1507 | DEC8r_EVEX = 1492, |
| 1508 | DEC8r_ND = 1493, |
| 1509 | DEC8r_NF = 1494, |
| 1510 | DEC8r_NF_ND = 1495, |
| 1511 | DIV16m = 1496, |
| 1512 | DIV16m_EVEX = 1497, |
| 1513 | DIV16m_NF = 1498, |
| 1514 | DIV16r = 1499, |
| 1515 | DIV16r_EVEX = 1500, |
| 1516 | DIV16r_NF = 1501, |
| 1517 | DIV32m = 1502, |
| 1518 | DIV32m_EVEX = 1503, |
| 1519 | DIV32m_NF = 1504, |
| 1520 | DIV32r = 1505, |
| 1521 | DIV32r_EVEX = 1506, |
| 1522 | DIV32r_NF = 1507, |
| 1523 | DIV64m = 1508, |
| 1524 | DIV64m_EVEX = 1509, |
| 1525 | DIV64m_NF = 1510, |
| 1526 | DIV64r = 1511, |
| 1527 | DIV64r_EVEX = 1512, |
| 1528 | DIV64r_NF = 1513, |
| 1529 | DIV8m = 1514, |
| 1530 | DIV8m_EVEX = 1515, |
| 1531 | DIV8m_NF = 1516, |
| 1532 | DIV8r = 1517, |
| 1533 | DIV8r_EVEX = 1518, |
| 1534 | DIV8r_NF = 1519, |
| 1535 | DIVPDrm = 1520, |
| 1536 | DIVPDrr = 1521, |
| 1537 | DIVPSrm = 1522, |
| 1538 | DIVPSrr = 1523, |
| 1539 | DIVR_F32m = 1524, |
| 1540 | DIVR_F64m = 1525, |
| 1541 | DIVR_FI16m = 1526, |
| 1542 | DIVR_FI32m = 1527, |
| 1543 | DIVR_FPrST0 = 1528, |
| 1544 | DIVR_FST0r = 1529, |
| 1545 | DIVR_Fp32m = 1530, |
| 1546 | DIVR_Fp64m = 1531, |
| 1547 | DIVR_Fp64m32 = 1532, |
| 1548 | DIVR_Fp80m32 = 1533, |
| 1549 | DIVR_Fp80m64 = 1534, |
| 1550 | DIVR_FpI16m32 = 1535, |
| 1551 | DIVR_FpI16m64 = 1536, |
| 1552 | DIVR_FpI16m80 = 1537, |
| 1553 | DIVR_FpI32m32 = 1538, |
| 1554 | DIVR_FpI32m64 = 1539, |
| 1555 | DIVR_FpI32m80 = 1540, |
| 1556 | DIVR_FrST0 = 1541, |
| 1557 | DIVSDrm = 1542, |
| 1558 | DIVSDrm_Int = 1543, |
| 1559 | DIVSDrr = 1544, |
| 1560 | DIVSDrr_Int = 1545, |
| 1561 | DIVSSrm = 1546, |
| 1562 | DIVSSrm_Int = 1547, |
| 1563 | DIVSSrr = 1548, |
| 1564 | DIVSSrr_Int = 1549, |
| 1565 | DIV_F32m = 1550, |
| 1566 | DIV_F64m = 1551, |
| 1567 | DIV_FI16m = 1552, |
| 1568 | DIV_FI32m = 1553, |
| 1569 | DIV_FPrST0 = 1554, |
| 1570 | DIV_FST0r = 1555, |
| 1571 | DIV_Fp32 = 1556, |
| 1572 | DIV_Fp32m = 1557, |
| 1573 | DIV_Fp64 = 1558, |
| 1574 | DIV_Fp64m = 1559, |
| 1575 | DIV_Fp64m32 = 1560, |
| 1576 | DIV_Fp80 = 1561, |
| 1577 | DIV_Fp80m32 = 1562, |
| 1578 | DIV_Fp80m64 = 1563, |
| 1579 | DIV_FpI16m32 = 1564, |
| 1580 | DIV_FpI16m64 = 1565, |
| 1581 | DIV_FpI16m80 = 1566, |
| 1582 | DIV_FpI32m32 = 1567, |
| 1583 | DIV_FpI32m64 = 1568, |
| 1584 | DIV_FpI32m80 = 1569, |
| 1585 | DIV_FrST0 = 1570, |
| 1586 | DPPDrmi = 1571, |
| 1587 | DPPDrri = 1572, |
| 1588 | DPPSrmi = 1573, |
| 1589 | DPPSrri = 1574, |
| 1590 | DS_PREFIX = 1575, |
| 1591 | DYN_ALLOCA_32 = 1576, |
| 1592 | DYN_ALLOCA_64 = 1577, |
| 1593 | EH_RETURN = 1578, |
| 1594 | EH_RETURN64 = 1579, |
| 1595 | EH_SjLj_LongJmp32 = 1580, |
| 1596 | EH_SjLj_LongJmp64 = 1581, |
| 1597 | EH_SjLj_SetJmp32 = 1582, |
| 1598 | EH_SjLj_SetJmp64 = 1583, |
| 1599 | EH_SjLj_Setup = 1584, |
| 1600 | ENCLS = 1585, |
| 1601 | ENCLU = 1586, |
| 1602 | ENCLV = 1587, |
| 1603 | ENCODEKEY128 = 1588, |
| 1604 | ENCODEKEY256 = 1589, |
| 1605 | ENDBR32 = 1590, |
| 1606 | ENDBR64 = 1591, |
| 1607 | ENQCMD16 = 1592, |
| 1608 | ENQCMD32 = 1593, |
| 1609 | ENQCMD32_EVEX = 1594, |
| 1610 | ENQCMD64 = 1595, |
| 1611 | ENQCMD64_EVEX = 1596, |
| 1612 | ENQCMDS16 = 1597, |
| 1613 | ENQCMDS32 = 1598, |
| 1614 | ENQCMDS32_EVEX = 1599, |
| 1615 | ENQCMDS64 = 1600, |
| 1616 | ENQCMDS64_EVEX = 1601, |
| 1617 | ENTER = 1602, |
| 1618 | ERETS = 1603, |
| 1619 | ERETU = 1604, |
| 1620 | ES_PREFIX = 1605, |
| 1621 | EXTRACTPSmr = 1606, |
| 1622 | EXTRACTPSrr = 1607, |
| 1623 | EXTRQ = 1608, |
| 1624 | EXTRQI = 1609, |
| 1625 | F2XM1 = 1610, |
| 1626 | FARCALL16i = 1611, |
| 1627 | FARCALL16m = 1612, |
| 1628 | FARCALL32i = 1613, |
| 1629 | FARCALL32m = 1614, |
| 1630 | FARCALL64m = 1615, |
| 1631 | FARJMP16i = 1616, |
| 1632 | FARJMP16m = 1617, |
| 1633 | FARJMP32i = 1618, |
| 1634 | FARJMP32m = 1619, |
| 1635 | FARJMP64m = 1620, |
| 1636 | FBLDm = 1621, |
| 1637 | FBSTPm = 1622, |
| 1638 | FCOM32m = 1623, |
| 1639 | FCOM64m = 1624, |
| 1640 | FCOMP32m = 1625, |
| 1641 | FCOMP64m = 1626, |
| 1642 | FCOMPP = 1627, |
| 1643 | FCOS = 1628, |
| 1644 | FDECSTP = 1629, |
| 1645 | FEMMS = 1630, |
| 1646 | FFREE = 1631, |
| 1647 | FFREEP = 1632, |
| 1648 | FICOM16m = 1633, |
| 1649 | FICOM32m = 1634, |
| 1650 | FICOMP16m = 1635, |
| 1651 | FICOMP32m = 1636, |
| 1652 | FINCSTP = 1637, |
| 1653 | FLDCW16m = 1638, |
| 1654 | FLDENVm = 1639, |
| 1655 | FLDL2E = 1640, |
| 1656 | FLDL2T = 1641, |
| 1657 | FLDLG2 = 1642, |
| 1658 | FLDLN2 = 1643, |
| 1659 | FLDPI = 1644, |
| 1660 | FNCLEX = 1645, |
| 1661 | FNINIT = 1646, |
| 1662 | FNOP = 1647, |
| 1663 | FNSTCW16m = 1648, |
| 1664 | FNSTSW16r = 1649, |
| 1665 | FNSTSWm = 1650, |
| 1666 | FP32_TO_INT16_IN_MEM = 1651, |
| 1667 | FP32_TO_INT32_IN_MEM = 1652, |
| 1668 | FP32_TO_INT64_IN_MEM = 1653, |
| 1669 | FP64_TO_INT16_IN_MEM = 1654, |
| 1670 | FP64_TO_INT32_IN_MEM = 1655, |
| 1671 | FP64_TO_INT64_IN_MEM = 1656, |
| 1672 | FP80_ADDm32 = 1657, |
| 1673 | FP80_ADDr = 1658, |
| 1674 | FP80_TO_INT16_IN_MEM = 1659, |
| 1675 | FP80_TO_INT32_IN_MEM = 1660, |
| 1676 | FP80_TO_INT64_IN_MEM = 1661, |
| 1677 | FPATAN = 1662, |
| 1678 | FPREM = 1663, |
| 1679 | FPREM1 = 1664, |
| 1680 | FPTAN = 1665, |
| 1681 | FRNDINT = 1666, |
| 1682 | FRSTORm = 1667, |
| 1683 | FSAVEm = 1668, |
| 1684 | FSCALE = 1669, |
| 1685 | FSIN = 1670, |
| 1686 | FSINCOS = 1671, |
| 1687 | FSTENVm = 1672, |
| 1688 | FS_PREFIX = 1673, |
| 1689 | FXRSTOR = 1674, |
| 1690 | FXRSTOR64 = 1675, |
| 1691 | FXSAVE = 1676, |
| 1692 | FXSAVE64 = 1677, |
| 1693 | FXTRACT = 1678, |
| 1694 | FYL2X = 1679, |
| 1695 | FYL2XP1 = 1680, |
| 1696 | GETSEC = 1681, |
| 1697 | GF2P8AFFINEINVQBrmi = 1682, |
| 1698 | GF2P8AFFINEINVQBrri = 1683, |
| 1699 | GF2P8AFFINEQBrmi = 1684, |
| 1700 | GF2P8AFFINEQBrri = 1685, |
| 1701 | GF2P8MULBrm = 1686, |
| 1702 | GF2P8MULBrr = 1687, |
| 1703 | GS_PREFIX = 1688, |
| 1704 | HADDPDrm = 1689, |
| 1705 | HADDPDrr = 1690, |
| 1706 | HADDPSrm = 1691, |
| 1707 | HADDPSrr = 1692, |
| 1708 | HLT = 1693, |
| 1709 | HRESET = 1694, |
| 1710 | HSUBPDrm = 1695, |
| 1711 | HSUBPDrr = 1696, |
| 1712 | HSUBPSrm = 1697, |
| 1713 | HSUBPSrr = 1698, |
| 1714 | IDIV16m = 1699, |
| 1715 | IDIV16m_EVEX = 1700, |
| 1716 | IDIV16m_NF = 1701, |
| 1717 | IDIV16r = 1702, |
| 1718 | IDIV16r_EVEX = 1703, |
| 1719 | IDIV16r_NF = 1704, |
| 1720 | IDIV32m = 1705, |
| 1721 | IDIV32m_EVEX = 1706, |
| 1722 | IDIV32m_NF = 1707, |
| 1723 | IDIV32r = 1708, |
| 1724 | IDIV32r_EVEX = 1709, |
| 1725 | IDIV32r_NF = 1710, |
| 1726 | IDIV64m = 1711, |
| 1727 | IDIV64m_EVEX = 1712, |
| 1728 | IDIV64m_NF = 1713, |
| 1729 | IDIV64r = 1714, |
| 1730 | IDIV64r_EVEX = 1715, |
| 1731 | IDIV64r_NF = 1716, |
| 1732 | IDIV8m = 1717, |
| 1733 | IDIV8m_EVEX = 1718, |
| 1734 | IDIV8m_NF = 1719, |
| 1735 | IDIV8r = 1720, |
| 1736 | IDIV8r_EVEX = 1721, |
| 1737 | IDIV8r_NF = 1722, |
| 1738 | ILD_F16m = 1723, |
| 1739 | ILD_F32m = 1724, |
| 1740 | ILD_F64m = 1725, |
| 1741 | ILD_Fp16m32 = 1726, |
| 1742 | ILD_Fp16m64 = 1727, |
| 1743 | ILD_Fp16m80 = 1728, |
| 1744 | ILD_Fp32m32 = 1729, |
| 1745 | ILD_Fp32m64 = 1730, |
| 1746 | ILD_Fp32m80 = 1731, |
| 1747 | ILD_Fp64m32 = 1732, |
| 1748 | ILD_Fp64m64 = 1733, |
| 1749 | ILD_Fp64m80 = 1734, |
| 1750 | IMUL16m = 1735, |
| 1751 | IMUL16m_EVEX = 1736, |
| 1752 | IMUL16m_NF = 1737, |
| 1753 | IMUL16r = 1738, |
| 1754 | IMUL16r_EVEX = 1739, |
| 1755 | IMUL16r_NF = 1740, |
| 1756 | IMUL16rm = 1741, |
| 1757 | IMUL16rm_EVEX = 1742, |
| 1758 | IMUL16rm_ND = 1743, |
| 1759 | IMUL16rm_NF = 1744, |
| 1760 | IMUL16rm_NF_ND = 1745, |
| 1761 | IMUL16rmi = 1746, |
| 1762 | IMUL16rmi8 = 1747, |
| 1763 | IMUL16rmi8_EVEX = 1748, |
| 1764 | IMUL16rmi8_NF = 1749, |
| 1765 | IMUL16rmi_EVEX = 1750, |
| 1766 | IMUL16rmi_NF = 1751, |
| 1767 | IMUL16rr = 1752, |
| 1768 | IMUL16rr_EVEX = 1753, |
| 1769 | IMUL16rr_ND = 1754, |
| 1770 | IMUL16rr_NF = 1755, |
| 1771 | IMUL16rr_NF_ND = 1756, |
| 1772 | IMUL16rri = 1757, |
| 1773 | IMUL16rri8 = 1758, |
| 1774 | IMUL16rri8_EVEX = 1759, |
| 1775 | IMUL16rri8_NF = 1760, |
| 1776 | IMUL16rri_EVEX = 1761, |
| 1777 | IMUL16rri_NF = 1762, |
| 1778 | IMUL32m = 1763, |
| 1779 | IMUL32m_EVEX = 1764, |
| 1780 | IMUL32m_NF = 1765, |
| 1781 | IMUL32r = 1766, |
| 1782 | IMUL32r_EVEX = 1767, |
| 1783 | IMUL32r_NF = 1768, |
| 1784 | IMUL32rm = 1769, |
| 1785 | IMUL32rm_EVEX = 1770, |
| 1786 | IMUL32rm_ND = 1771, |
| 1787 | IMUL32rm_NF = 1772, |
| 1788 | IMUL32rm_NF_ND = 1773, |
| 1789 | IMUL32rmi = 1774, |
| 1790 | IMUL32rmi8 = 1775, |
| 1791 | IMUL32rmi8_EVEX = 1776, |
| 1792 | IMUL32rmi8_NF = 1777, |
| 1793 | IMUL32rmi_EVEX = 1778, |
| 1794 | IMUL32rmi_NF = 1779, |
| 1795 | IMUL32rr = 1780, |
| 1796 | IMUL32rr_EVEX = 1781, |
| 1797 | IMUL32rr_ND = 1782, |
| 1798 | IMUL32rr_NF = 1783, |
| 1799 | IMUL32rr_NF_ND = 1784, |
| 1800 | IMUL32rri = 1785, |
| 1801 | IMUL32rri8 = 1786, |
| 1802 | IMUL32rri8_EVEX = 1787, |
| 1803 | IMUL32rri8_NF = 1788, |
| 1804 | IMUL32rri_EVEX = 1789, |
| 1805 | IMUL32rri_NF = 1790, |
| 1806 | IMUL64m = 1791, |
| 1807 | IMUL64m_EVEX = 1792, |
| 1808 | IMUL64m_NF = 1793, |
| 1809 | IMUL64r = 1794, |
| 1810 | IMUL64r_EVEX = 1795, |
| 1811 | IMUL64r_NF = 1796, |
| 1812 | IMUL64rm = 1797, |
| 1813 | IMUL64rm_EVEX = 1798, |
| 1814 | IMUL64rm_ND = 1799, |
| 1815 | IMUL64rm_NF = 1800, |
| 1816 | IMUL64rm_NF_ND = 1801, |
| 1817 | IMUL64rmi32 = 1802, |
| 1818 | IMUL64rmi32_EVEX = 1803, |
| 1819 | IMUL64rmi32_NF = 1804, |
| 1820 | IMUL64rmi8 = 1805, |
| 1821 | IMUL64rmi8_EVEX = 1806, |
| 1822 | IMUL64rmi8_NF = 1807, |
| 1823 | IMUL64rr = 1808, |
| 1824 | IMUL64rr_EVEX = 1809, |
| 1825 | IMUL64rr_ND = 1810, |
| 1826 | IMUL64rr_NF = 1811, |
| 1827 | IMUL64rr_NF_ND = 1812, |
| 1828 | IMUL64rri32 = 1813, |
| 1829 | IMUL64rri32_EVEX = 1814, |
| 1830 | IMUL64rri32_NF = 1815, |
| 1831 | IMUL64rri8 = 1816, |
| 1832 | IMUL64rri8_EVEX = 1817, |
| 1833 | IMUL64rri8_NF = 1818, |
| 1834 | IMUL8m = 1819, |
| 1835 | IMUL8m_EVEX = 1820, |
| 1836 | IMUL8m_NF = 1821, |
| 1837 | IMUL8r = 1822, |
| 1838 | IMUL8r_EVEX = 1823, |
| 1839 | IMUL8r_NF = 1824, |
| 1840 | IMULZU16rmi = 1825, |
| 1841 | IMULZU16rmi8 = 1826, |
| 1842 | IMULZU16rri = 1827, |
| 1843 | IMULZU16rri8 = 1828, |
| 1844 | IMULZU32rmi = 1829, |
| 1845 | IMULZU32rmi8 = 1830, |
| 1846 | IMULZU32rri = 1831, |
| 1847 | IMULZU32rri8 = 1832, |
| 1848 | IMULZU64rmi32 = 1833, |
| 1849 | IMULZU64rmi8 = 1834, |
| 1850 | IMULZU64rri32 = 1835, |
| 1851 | IMULZU64rri8 = 1836, |
| 1852 | IN16ri = 1837, |
| 1853 | IN16rr = 1838, |
| 1854 | IN32ri = 1839, |
| 1855 | IN32rr = 1840, |
| 1856 | IN8ri = 1841, |
| 1857 | IN8rr = 1842, |
| 1858 | INC16m = 1843, |
| 1859 | INC16m_EVEX = 1844, |
| 1860 | INC16m_ND = 1845, |
| 1861 | INC16m_NF = 1846, |
| 1862 | INC16m_NF_ND = 1847, |
| 1863 | INC16r = 1848, |
| 1864 | INC16r_EVEX = 1849, |
| 1865 | INC16r_ND = 1850, |
| 1866 | INC16r_NF = 1851, |
| 1867 | INC16r_NF_ND = 1852, |
| 1868 | INC16r_alt = 1853, |
| 1869 | INC32m = 1854, |
| 1870 | INC32m_EVEX = 1855, |
| 1871 | INC32m_ND = 1856, |
| 1872 | INC32m_NF = 1857, |
| 1873 | INC32m_NF_ND = 1858, |
| 1874 | INC32r = 1859, |
| 1875 | INC32r_EVEX = 1860, |
| 1876 | INC32r_ND = 1861, |
| 1877 | INC32r_NF = 1862, |
| 1878 | INC32r_NF_ND = 1863, |
| 1879 | INC32r_alt = 1864, |
| 1880 | INC64m = 1865, |
| 1881 | INC64m_EVEX = 1866, |
| 1882 | INC64m_ND = 1867, |
| 1883 | INC64m_NF = 1868, |
| 1884 | INC64m_NF_ND = 1869, |
| 1885 | INC64r = 1870, |
| 1886 | INC64r_EVEX = 1871, |
| 1887 | INC64r_ND = 1872, |
| 1888 | INC64r_NF = 1873, |
| 1889 | INC64r_NF_ND = 1874, |
| 1890 | INC8m = 1875, |
| 1891 | INC8m_EVEX = 1876, |
| 1892 | INC8m_ND = 1877, |
| 1893 | INC8m_NF = 1878, |
| 1894 | INC8m_NF_ND = 1879, |
| 1895 | INC8r = 1880, |
| 1896 | INC8r_EVEX = 1881, |
| 1897 | INC8r_ND = 1882, |
| 1898 | INC8r_NF = 1883, |
| 1899 | INC8r_NF_ND = 1884, |
| 1900 | INCSSPD = 1885, |
| 1901 | INCSSPQ = 1886, |
| 1902 | INSB = 1887, |
| 1903 | INSERTPSrm = 1888, |
| 1904 | INSERTPSrr = 1889, |
| 1905 | INSERTQ = 1890, |
| 1906 | INSERTQI = 1891, |
| 1907 | INSL = 1892, |
| 1908 | INSW = 1893, |
| 1909 | INT = 1894, |
| 1910 | INT3 = 1895, |
| 1911 | INTO = 1896, |
| 1912 | INVD = 1897, |
| 1913 | INVEPT32 = 1898, |
| 1914 | INVEPT64 = 1899, |
| 1915 | INVEPT64_EVEX = 1900, |
| 1916 | INVLPG = 1901, |
| 1917 | INVLPGA32 = 1902, |
| 1918 | INVLPGA64 = 1903, |
| 1919 | INVLPGB32 = 1904, |
| 1920 | INVLPGB64 = 1905, |
| 1921 | INVPCID32 = 1906, |
| 1922 | INVPCID64 = 1907, |
| 1923 | INVPCID64_EVEX = 1908, |
| 1924 | INVVPID32 = 1909, |
| 1925 | INVVPID64 = 1910, |
| 1926 | INVVPID64_EVEX = 1911, |
| 1927 | IRET = 1912, |
| 1928 | IRET16 = 1913, |
| 1929 | IRET32 = 1914, |
| 1930 | IRET64 = 1915, |
| 1931 | ISTT_FP16m = 1916, |
| 1932 | ISTT_FP32m = 1917, |
| 1933 | ISTT_FP64m = 1918, |
| 1934 | ISTT_Fp16m32 = 1919, |
| 1935 | ISTT_Fp16m64 = 1920, |
| 1936 | ISTT_Fp16m80 = 1921, |
| 1937 | ISTT_Fp32m32 = 1922, |
| 1938 | ISTT_Fp32m64 = 1923, |
| 1939 | ISTT_Fp32m80 = 1924, |
| 1940 | ISTT_Fp64m32 = 1925, |
| 1941 | ISTT_Fp64m64 = 1926, |
| 1942 | ISTT_Fp64m80 = 1927, |
| 1943 | IST_F16m = 1928, |
| 1944 | IST_F32m = 1929, |
| 1945 | IST_FP16m = 1930, |
| 1946 | IST_FP32m = 1931, |
| 1947 | IST_FP64m = 1932, |
| 1948 | IST_Fp16m32 = 1933, |
| 1949 | IST_Fp16m64 = 1934, |
| 1950 | IST_Fp16m80 = 1935, |
| 1951 | IST_Fp32m32 = 1936, |
| 1952 | IST_Fp32m64 = 1937, |
| 1953 | IST_Fp32m80 = 1938, |
| 1954 | IST_Fp64m32 = 1939, |
| 1955 | IST_Fp64m64 = 1940, |
| 1956 | IST_Fp64m80 = 1941, |
| 1957 | Int_eh_sjlj_setup_dispatch = 1942, |
| 1958 | JCC_1 = 1943, |
| 1959 | JCC_2 = 1944, |
| 1960 | JCC_4 = 1945, |
| 1961 | JCXZ = 1946, |
| 1962 | JECXZ = 1947, |
| 1963 | JMP16m = 1948, |
| 1964 | JMP16m_NT = 1949, |
| 1965 | JMP16r = 1950, |
| 1966 | JMP16r_NT = 1951, |
| 1967 | JMP32m = 1952, |
| 1968 | JMP32m_NT = 1953, |
| 1969 | JMP32r = 1954, |
| 1970 | JMP32r_NT = 1955, |
| 1971 | JMP64m = 1956, |
| 1972 | JMP64m_NT = 1957, |
| 1973 | JMP64m_REX = 1958, |
| 1974 | JMP64r = 1959, |
| 1975 | JMP64r_NT = 1960, |
| 1976 | JMP64r_REX = 1961, |
| 1977 | JMPABS64i = 1962, |
| 1978 | JMP_1 = 1963, |
| 1979 | JMP_2 = 1964, |
| 1980 | JMP_4 = 1965, |
| 1981 | JRCXZ = 1966, |
| 1982 | KADDBrr = 1967, |
| 1983 | KADDDrr = 1968, |
| 1984 | KADDQrr = 1969, |
| 1985 | KADDWrr = 1970, |
| 1986 | KANDBrr = 1971, |
| 1987 | KANDDrr = 1972, |
| 1988 | KANDNBrr = 1973, |
| 1989 | KANDNDrr = 1974, |
| 1990 | KANDNQrr = 1975, |
| 1991 | KANDNWrr = 1976, |
| 1992 | KANDQrr = 1977, |
| 1993 | KANDWrr = 1978, |
| 1994 | KCFI_CHECK = 1979, |
| 1995 | KMOVBkk = 1980, |
| 1996 | KMOVBkk_EVEX = 1981, |
| 1997 | KMOVBkm = 1982, |
| 1998 | KMOVBkm_EVEX = 1983, |
| 1999 | KMOVBkr = 1984, |
| 2000 | KMOVBkr_EVEX = 1985, |
| 2001 | KMOVBmk = 1986, |
| 2002 | KMOVBmk_EVEX = 1987, |
| 2003 | KMOVBrk = 1988, |
| 2004 | KMOVBrk_EVEX = 1989, |
| 2005 | KMOVDkk = 1990, |
| 2006 | KMOVDkk_EVEX = 1991, |
| 2007 | KMOVDkm = 1992, |
| 2008 | KMOVDkm_EVEX = 1993, |
| 2009 | KMOVDkr = 1994, |
| 2010 | KMOVDkr_EVEX = 1995, |
| 2011 | KMOVDmk = 1996, |
| 2012 | KMOVDmk_EVEX = 1997, |
| 2013 | KMOVDrk = 1998, |
| 2014 | KMOVDrk_EVEX = 1999, |
| 2015 | KMOVQkk = 2000, |
| 2016 | KMOVQkk_EVEX = 2001, |
| 2017 | KMOVQkm = 2002, |
| 2018 | KMOVQkm_EVEX = 2003, |
| 2019 | KMOVQkr = 2004, |
| 2020 | KMOVQkr_EVEX = 2005, |
| 2021 | KMOVQmk = 2006, |
| 2022 | KMOVQmk_EVEX = 2007, |
| 2023 | KMOVQrk = 2008, |
| 2024 | KMOVQrk_EVEX = 2009, |
| 2025 | KMOVWkk = 2010, |
| 2026 | KMOVWkk_EVEX = 2011, |
| 2027 | KMOVWkm = 2012, |
| 2028 | KMOVWkm_EVEX = 2013, |
| 2029 | KMOVWkr = 2014, |
| 2030 | KMOVWkr_EVEX = 2015, |
| 2031 | KMOVWmk = 2016, |
| 2032 | KMOVWmk_EVEX = 2017, |
| 2033 | KMOVWrk = 2018, |
| 2034 | KMOVWrk_EVEX = 2019, |
| 2035 | KNOTBrr = 2020, |
| 2036 | KNOTDrr = 2021, |
| 2037 | KNOTQrr = 2022, |
| 2038 | KNOTWrr = 2023, |
| 2039 | KORBrr = 2024, |
| 2040 | KORDrr = 2025, |
| 2041 | KORQrr = 2026, |
| 2042 | KORTESTBrr = 2027, |
| 2043 | KORTESTDrr = 2028, |
| 2044 | KORTESTQrr = 2029, |
| 2045 | KORTESTWrr = 2030, |
| 2046 | KORWrr = 2031, |
| 2047 | KSHIFTLBri = 2032, |
| 2048 | KSHIFTLDri = 2033, |
| 2049 | KSHIFTLQri = 2034, |
| 2050 | KSHIFTLWri = 2035, |
| 2051 | KSHIFTRBri = 2036, |
| 2052 | KSHIFTRDri = 2037, |
| 2053 | KSHIFTRQri = 2038, |
| 2054 | KSHIFTRWri = 2039, |
| 2055 | KTESTBrr = 2040, |
| 2056 | KTESTDrr = 2041, |
| 2057 | KTESTQrr = 2042, |
| 2058 | KTESTWrr = 2043, |
| 2059 | KUNPCKBWrr = 2044, |
| 2060 | KUNPCKDQrr = 2045, |
| 2061 | KUNPCKWDrr = 2046, |
| 2062 | KXNORBrr = 2047, |
| 2063 | KXNORDrr = 2048, |
| 2064 | KXNORQrr = 2049, |
| 2065 | KXNORWrr = 2050, |
| 2066 | KXORBrr = 2051, |
| 2067 | KXORDrr = 2052, |
| 2068 | KXORQrr = 2053, |
| 2069 | KXORWrr = 2054, |
| 2070 | LAHF = 2055, |
| 2071 | LAR16rm = 2056, |
| 2072 | LAR16rr = 2057, |
| 2073 | LAR32rm = 2058, |
| 2074 | LAR32rr = 2059, |
| 2075 | LAR64rm = 2060, |
| 2076 | LAR64rr = 2061, |
| 2077 | LCMPXCHG16 = 2062, |
| 2078 | LCMPXCHG16B = 2063, |
| 2079 | LCMPXCHG32 = 2064, |
| 2080 | LCMPXCHG64 = 2065, |
| 2081 | LCMPXCHG8 = 2066, |
| 2082 | LCMPXCHG8B = 2067, |
| 2083 | LDDQUrm = 2068, |
| 2084 | LDMXCSR = 2069, |
| 2085 | LDS16rm = 2070, |
| 2086 | LDS32rm = 2071, |
| 2087 | LDTILECFG = 2072, |
| 2088 | LDTILECFG_EVEX = 2073, |
| 2089 | LD_F0 = 2074, |
| 2090 | LD_F1 = 2075, |
| 2091 | LD_F32m = 2076, |
| 2092 | LD_F64m = 2077, |
| 2093 | LD_F80m = 2078, |
| 2094 | LD_Fp032 = 2079, |
| 2095 | LD_Fp064 = 2080, |
| 2096 | LD_Fp080 = 2081, |
| 2097 | LD_Fp132 = 2082, |
| 2098 | LD_Fp164 = 2083, |
| 2099 | LD_Fp180 = 2084, |
| 2100 | LD_Fp32m = 2085, |
| 2101 | LD_Fp32m64 = 2086, |
| 2102 | LD_Fp32m80 = 2087, |
| 2103 | LD_Fp64m = 2088, |
| 2104 | LD_Fp64m80 = 2089, |
| 2105 | LD_Fp80m = 2090, |
| 2106 | LD_Frr = 2091, |
| 2107 | LEA16r = 2092, |
| 2108 | LEA32r = 2093, |
| 2109 | LEA64_32r = 2094, |
| 2110 | LEA64r = 2095, |
| 2111 | LEAVE = 2096, |
| 2112 | LEAVE64 = 2097, |
| 2113 | LES16rm = 2098, |
| 2114 | LES32rm = 2099, |
| 2115 | LFENCE = 2100, |
| 2116 | LFS16rm = 2101, |
| 2117 | LFS32rm = 2102, |
| 2118 | LFS64rm = 2103, |
| 2119 | LGDT16m = 2104, |
| 2120 | LGDT32m = 2105, |
| 2121 | LGDT64m = 2106, |
| 2122 | LGS16rm = 2107, |
| 2123 | LGS32rm = 2108, |
| 2124 | LGS64rm = 2109, |
| 2125 | LIDT16m = 2110, |
| 2126 | LIDT32m = 2111, |
| 2127 | LIDT64m = 2112, |
| 2128 | LKGS16m = 2113, |
| 2129 | LKGS16r = 2114, |
| 2130 | LLDT16m = 2115, |
| 2131 | LLDT16r = 2116, |
| 2132 | LLWPCB = 2117, |
| 2133 | LLWPCB64 = 2118, |
| 2134 | LMSW16m = 2119, |
| 2135 | LMSW16r = 2120, |
| 2136 | LOADIWKEY = 2121, |
| 2137 | LOCK_ADD16mi = 2122, |
| 2138 | LOCK_ADD16mi8 = 2123, |
| 2139 | LOCK_ADD16mr = 2124, |
| 2140 | LOCK_ADD32mi = 2125, |
| 2141 | LOCK_ADD32mi8 = 2126, |
| 2142 | LOCK_ADD32mr = 2127, |
| 2143 | LOCK_ADD64mi32 = 2128, |
| 2144 | LOCK_ADD64mi8 = 2129, |
| 2145 | LOCK_ADD64mr = 2130, |
| 2146 | LOCK_ADD8mi = 2131, |
| 2147 | LOCK_ADD8mr = 2132, |
| 2148 | LOCK_AND16mi = 2133, |
| 2149 | LOCK_AND16mi8 = 2134, |
| 2150 | LOCK_AND16mr = 2135, |
| 2151 | LOCK_AND32mi = 2136, |
| 2152 | LOCK_AND32mi8 = 2137, |
| 2153 | LOCK_AND32mr = 2138, |
| 2154 | LOCK_AND64mi32 = 2139, |
| 2155 | LOCK_AND64mi8 = 2140, |
| 2156 | LOCK_AND64mr = 2141, |
| 2157 | LOCK_AND8mi = 2142, |
| 2158 | LOCK_AND8mr = 2143, |
| 2159 | LOCK_BTC16m = 2144, |
| 2160 | LOCK_BTC32m = 2145, |
| 2161 | LOCK_BTC64m = 2146, |
| 2162 | LOCK_BTC_RM16rm = 2147, |
| 2163 | LOCK_BTC_RM32rm = 2148, |
| 2164 | LOCK_BTC_RM64rm = 2149, |
| 2165 | LOCK_BTR16m = 2150, |
| 2166 | LOCK_BTR32m = 2151, |
| 2167 | LOCK_BTR64m = 2152, |
| 2168 | LOCK_BTR_RM16rm = 2153, |
| 2169 | LOCK_BTR_RM32rm = 2154, |
| 2170 | LOCK_BTR_RM64rm = 2155, |
| 2171 | LOCK_BTS16m = 2156, |
| 2172 | LOCK_BTS32m = 2157, |
| 2173 | LOCK_BTS64m = 2158, |
| 2174 | LOCK_BTS_RM16rm = 2159, |
| 2175 | LOCK_BTS_RM32rm = 2160, |
| 2176 | LOCK_BTS_RM64rm = 2161, |
| 2177 | LOCK_DEC16m = 2162, |
| 2178 | LOCK_DEC32m = 2163, |
| 2179 | LOCK_DEC64m = 2164, |
| 2180 | LOCK_DEC8m = 2165, |
| 2181 | LOCK_INC16m = 2166, |
| 2182 | LOCK_INC32m = 2167, |
| 2183 | LOCK_INC64m = 2168, |
| 2184 | LOCK_INC8m = 2169, |
| 2185 | LOCK_OR16mi = 2170, |
| 2186 | LOCK_OR16mi8 = 2171, |
| 2187 | LOCK_OR16mr = 2172, |
| 2188 | LOCK_OR32mi = 2173, |
| 2189 | LOCK_OR32mi8 = 2174, |
| 2190 | LOCK_OR32mr = 2175, |
| 2191 | LOCK_OR64mi32 = 2176, |
| 2192 | LOCK_OR64mi8 = 2177, |
| 2193 | LOCK_OR64mr = 2178, |
| 2194 | LOCK_OR8mi = 2179, |
| 2195 | LOCK_OR8mr = 2180, |
| 2196 | LOCK_PREFIX = 2181, |
| 2197 | LOCK_SUB16mi = 2182, |
| 2198 | LOCK_SUB16mi8 = 2183, |
| 2199 | LOCK_SUB16mr = 2184, |
| 2200 | LOCK_SUB32mi = 2185, |
| 2201 | LOCK_SUB32mi8 = 2186, |
| 2202 | LOCK_SUB32mr = 2187, |
| 2203 | LOCK_SUB64mi32 = 2188, |
| 2204 | LOCK_SUB64mi8 = 2189, |
| 2205 | LOCK_SUB64mr = 2190, |
| 2206 | LOCK_SUB8mi = 2191, |
| 2207 | LOCK_SUB8mr = 2192, |
| 2208 | LOCK_XOR16mi = 2193, |
| 2209 | LOCK_XOR16mi8 = 2194, |
| 2210 | LOCK_XOR16mr = 2195, |
| 2211 | LOCK_XOR32mi = 2196, |
| 2212 | LOCK_XOR32mi8 = 2197, |
| 2213 | LOCK_XOR32mr = 2198, |
| 2214 | LOCK_XOR64mi32 = 2199, |
| 2215 | LOCK_XOR64mi8 = 2200, |
| 2216 | LOCK_XOR64mr = 2201, |
| 2217 | LOCK_XOR8mi = 2202, |
| 2218 | LOCK_XOR8mr = 2203, |
| 2219 | LODSB = 2204, |
| 2220 | LODSL = 2205, |
| 2221 | LODSQ = 2206, |
| 2222 | LODSW = 2207, |
| 2223 | LOOP = 2208, |
| 2224 | LOOPE = 2209, |
| 2225 | LOOPNE = 2210, |
| 2226 | LRET16 = 2211, |
| 2227 | LRET32 = 2212, |
| 2228 | LRET64 = 2213, |
| 2229 | LRETI16 = 2214, |
| 2230 | LRETI32 = 2215, |
| 2231 | LRETI64 = 2216, |
| 2232 | LSL16rm = 2217, |
| 2233 | LSL16rr = 2218, |
| 2234 | LSL32rm = 2219, |
| 2235 | LSL32rr = 2220, |
| 2236 | LSL64rm = 2221, |
| 2237 | LSL64rr = 2222, |
| 2238 | LSS16rm = 2223, |
| 2239 | LSS32rm = 2224, |
| 2240 | LSS64rm = 2225, |
| 2241 | LTRm = 2226, |
| 2242 | LTRr = 2227, |
| 2243 | LWPINS32rmi = 2228, |
| 2244 | LWPINS32rri = 2229, |
| 2245 | LWPINS64rmi = 2230, |
| 2246 | LWPINS64rri = 2231, |
| 2247 | LWPVAL32rmi = 2232, |
| 2248 | LWPVAL32rri = 2233, |
| 2249 | LWPVAL64rmi = 2234, |
| 2250 | LWPVAL64rri = 2235, |
| 2251 | LXADD16 = 2236, |
| 2252 | LXADD32 = 2237, |
| 2253 | LXADD64 = 2238, |
| 2254 | LXADD8 = 2239, |
| 2255 | LZCNT16rm = 2240, |
| 2256 | LZCNT16rm_EVEX = 2241, |
| 2257 | LZCNT16rm_NF = 2242, |
| 2258 | LZCNT16rr = 2243, |
| 2259 | LZCNT16rr_EVEX = 2244, |
| 2260 | LZCNT16rr_NF = 2245, |
| 2261 | LZCNT32rm = 2246, |
| 2262 | LZCNT32rm_EVEX = 2247, |
| 2263 | LZCNT32rm_NF = 2248, |
| 2264 | LZCNT32rr = 2249, |
| 2265 | LZCNT32rr_EVEX = 2250, |
| 2266 | LZCNT32rr_NF = 2251, |
| 2267 | LZCNT64rm = 2252, |
| 2268 | LZCNT64rm_EVEX = 2253, |
| 2269 | LZCNT64rm_NF = 2254, |
| 2270 | LZCNT64rr = 2255, |
| 2271 | LZCNT64rr_EVEX = 2256, |
| 2272 | LZCNT64rr_NF = 2257, |
| 2273 | MASKMOVDQU = 2258, |
| 2274 | MASKMOVDQU64 = 2259, |
| 2275 | MASKPAIR16LOAD = 2260, |
| 2276 | MASKPAIR16STORE = 2261, |
| 2277 | MAXCPDrm = 2262, |
| 2278 | MAXCPDrr = 2263, |
| 2279 | MAXCPSrm = 2264, |
| 2280 | MAXCPSrr = 2265, |
| 2281 | MAXCSDrm = 2266, |
| 2282 | MAXCSDrr = 2267, |
| 2283 | MAXCSSrm = 2268, |
| 2284 | MAXCSSrr = 2269, |
| 2285 | MAXPDrm = 2270, |
| 2286 | MAXPDrr = 2271, |
| 2287 | MAXPSrm = 2272, |
| 2288 | MAXPSrr = 2273, |
| 2289 | MAXSDrm = 2274, |
| 2290 | MAXSDrm_Int = 2275, |
| 2291 | MAXSDrr = 2276, |
| 2292 | MAXSDrr_Int = 2277, |
| 2293 | MAXSSrm = 2278, |
| 2294 | MAXSSrm_Int = 2279, |
| 2295 | MAXSSrr = 2280, |
| 2296 | MAXSSrr_Int = 2281, |
| 2297 | MFENCE = 2282, |
| 2298 | MINCPDrm = 2283, |
| 2299 | MINCPDrr = 2284, |
| 2300 | MINCPSrm = 2285, |
| 2301 | MINCPSrr = 2286, |
| 2302 | MINCSDrm = 2287, |
| 2303 | MINCSDrr = 2288, |
| 2304 | MINCSSrm = 2289, |
| 2305 | MINCSSrr = 2290, |
| 2306 | MINPDrm = 2291, |
| 2307 | MINPDrr = 2292, |
| 2308 | MINPSrm = 2293, |
| 2309 | MINPSrr = 2294, |
| 2310 | MINSDrm = 2295, |
| 2311 | MINSDrm_Int = 2296, |
| 2312 | MINSDrr = 2297, |
| 2313 | MINSDrr_Int = 2298, |
| 2314 | MINSSrm = 2299, |
| 2315 | MINSSrm_Int = 2300, |
| 2316 | MINSSrr = 2301, |
| 2317 | MINSSrr_Int = 2302, |
| 2318 | MMX_CVTPD2PIrm = 2303, |
| 2319 | MMX_CVTPD2PIrr = 2304, |
| 2320 | MMX_CVTPI2PDrm = 2305, |
| 2321 | MMX_CVTPI2PDrr = 2306, |
| 2322 | MMX_CVTPI2PSrm = 2307, |
| 2323 | MMX_CVTPI2PSrr = 2308, |
| 2324 | MMX_CVTPS2PIrm = 2309, |
| 2325 | MMX_CVTPS2PIrr = 2310, |
| 2326 | MMX_CVTTPD2PIrm = 2311, |
| 2327 | MMX_CVTTPD2PIrr = 2312, |
| 2328 | MMX_CVTTPS2PIrm = 2313, |
| 2329 | MMX_CVTTPS2PIrr = 2314, |
| 2330 | MMX_EMMS = 2315, |
| 2331 | MMX_MASKMOVQ = 2316, |
| 2332 | MMX_MASKMOVQ64 = 2317, |
| 2333 | MMX_MOVD64from64mr = 2318, |
| 2334 | MMX_MOVD64from64rr = 2319, |
| 2335 | MMX_MOVD64grr = 2320, |
| 2336 | MMX_MOVD64mr = 2321, |
| 2337 | MMX_MOVD64rm = 2322, |
| 2338 | MMX_MOVD64rr = 2323, |
| 2339 | MMX_MOVD64to64rm = 2324, |
| 2340 | MMX_MOVD64to64rr = 2325, |
| 2341 | MMX_MOVDQ2Qrr = 2326, |
| 2342 | MMX_MOVFR642Qrr = 2327, |
| 2343 | MMX_MOVNTQmr = 2328, |
| 2344 | MMX_MOVQ2DQrr = 2329, |
| 2345 | MMX_MOVQ2FR64rr = 2330, |
| 2346 | MMX_MOVQ64mr = 2331, |
| 2347 | MMX_MOVQ64rm = 2332, |
| 2348 | MMX_MOVQ64rr = 2333, |
| 2349 | MMX_MOVQ64rr_REV = 2334, |
| 2350 | MMX_PABSBrm = 2335, |
| 2351 | MMX_PABSBrr = 2336, |
| 2352 | MMX_PABSDrm = 2337, |
| 2353 | MMX_PABSDrr = 2338, |
| 2354 | MMX_PABSWrm = 2339, |
| 2355 | MMX_PABSWrr = 2340, |
| 2356 | MMX_PACKSSDWrm = 2341, |
| 2357 | MMX_PACKSSDWrr = 2342, |
| 2358 | MMX_PACKSSWBrm = 2343, |
| 2359 | MMX_PACKSSWBrr = 2344, |
| 2360 | MMX_PACKUSWBrm = 2345, |
| 2361 | MMX_PACKUSWBrr = 2346, |
| 2362 | MMX_PADDBrm = 2347, |
| 2363 | MMX_PADDBrr = 2348, |
| 2364 | MMX_PADDDrm = 2349, |
| 2365 | MMX_PADDDrr = 2350, |
| 2366 | MMX_PADDQrm = 2351, |
| 2367 | MMX_PADDQrr = 2352, |
| 2368 | MMX_PADDSBrm = 2353, |
| 2369 | MMX_PADDSBrr = 2354, |
| 2370 | MMX_PADDSWrm = 2355, |
| 2371 | MMX_PADDSWrr = 2356, |
| 2372 | MMX_PADDUSBrm = 2357, |
| 2373 | MMX_PADDUSBrr = 2358, |
| 2374 | MMX_PADDUSWrm = 2359, |
| 2375 | MMX_PADDUSWrr = 2360, |
| 2376 | MMX_PADDWrm = 2361, |
| 2377 | MMX_PADDWrr = 2362, |
| 2378 | MMX_PALIGNRrmi = 2363, |
| 2379 | MMX_PALIGNRrri = 2364, |
| 2380 | MMX_PANDNrm = 2365, |
| 2381 | MMX_PANDNrr = 2366, |
| 2382 | MMX_PANDrm = 2367, |
| 2383 | MMX_PANDrr = 2368, |
| 2384 | MMX_PAVGBrm = 2369, |
| 2385 | MMX_PAVGBrr = 2370, |
| 2386 | MMX_PAVGWrm = 2371, |
| 2387 | MMX_PAVGWrr = 2372, |
| 2388 | MMX_PCMPEQBrm = 2373, |
| 2389 | MMX_PCMPEQBrr = 2374, |
| 2390 | MMX_PCMPEQDrm = 2375, |
| 2391 | MMX_PCMPEQDrr = 2376, |
| 2392 | MMX_PCMPEQWrm = 2377, |
| 2393 | MMX_PCMPEQWrr = 2378, |
| 2394 | MMX_PCMPGTBrm = 2379, |
| 2395 | MMX_PCMPGTBrr = 2380, |
| 2396 | MMX_PCMPGTDrm = 2381, |
| 2397 | MMX_PCMPGTDrr = 2382, |
| 2398 | MMX_PCMPGTWrm = 2383, |
| 2399 | MMX_PCMPGTWrr = 2384, |
| 2400 | MMX_PEXTRWrr = 2385, |
| 2401 | MMX_PHADDDrm = 2386, |
| 2402 | MMX_PHADDDrr = 2387, |
| 2403 | MMX_PHADDSWrm = 2388, |
| 2404 | MMX_PHADDSWrr = 2389, |
| 2405 | MMX_PHADDWrm = 2390, |
| 2406 | MMX_PHADDWrr = 2391, |
| 2407 | MMX_PHSUBDrm = 2392, |
| 2408 | MMX_PHSUBDrr = 2393, |
| 2409 | MMX_PHSUBSWrm = 2394, |
| 2410 | MMX_PHSUBSWrr = 2395, |
| 2411 | MMX_PHSUBWrm = 2396, |
| 2412 | MMX_PHSUBWrr = 2397, |
| 2413 | MMX_PINSRWrm = 2398, |
| 2414 | MMX_PINSRWrr = 2399, |
| 2415 | MMX_PMADDUBSWrm = 2400, |
| 2416 | MMX_PMADDUBSWrr = 2401, |
| 2417 | MMX_PMADDWDrm = 2402, |
| 2418 | MMX_PMADDWDrr = 2403, |
| 2419 | MMX_PMAXSWrm = 2404, |
| 2420 | MMX_PMAXSWrr = 2405, |
| 2421 | MMX_PMAXUBrm = 2406, |
| 2422 | MMX_PMAXUBrr = 2407, |
| 2423 | MMX_PMINSWrm = 2408, |
| 2424 | MMX_PMINSWrr = 2409, |
| 2425 | MMX_PMINUBrm = 2410, |
| 2426 | MMX_PMINUBrr = 2411, |
| 2427 | MMX_PMOVMSKBrr = 2412, |
| 2428 | MMX_PMULHRSWrm = 2413, |
| 2429 | MMX_PMULHRSWrr = 2414, |
| 2430 | MMX_PMULHUWrm = 2415, |
| 2431 | MMX_PMULHUWrr = 2416, |
| 2432 | MMX_PMULHWrm = 2417, |
| 2433 | MMX_PMULHWrr = 2418, |
| 2434 | MMX_PMULLWrm = 2419, |
| 2435 | MMX_PMULLWrr = 2420, |
| 2436 | MMX_PMULUDQrm = 2421, |
| 2437 | MMX_PMULUDQrr = 2422, |
| 2438 | MMX_PORrm = 2423, |
| 2439 | MMX_PORrr = 2424, |
| 2440 | MMX_PSADBWrm = 2425, |
| 2441 | MMX_PSADBWrr = 2426, |
| 2442 | MMX_PSHUFBrm = 2427, |
| 2443 | MMX_PSHUFBrr = 2428, |
| 2444 | MMX_PSHUFWmi = 2429, |
| 2445 | MMX_PSHUFWri = 2430, |
| 2446 | MMX_PSIGNBrm = 2431, |
| 2447 | MMX_PSIGNBrr = 2432, |
| 2448 | MMX_PSIGNDrm = 2433, |
| 2449 | MMX_PSIGNDrr = 2434, |
| 2450 | MMX_PSIGNWrm = 2435, |
| 2451 | MMX_PSIGNWrr = 2436, |
| 2452 | MMX_PSLLDri = 2437, |
| 2453 | MMX_PSLLDrm = 2438, |
| 2454 | MMX_PSLLDrr = 2439, |
| 2455 | MMX_PSLLQri = 2440, |
| 2456 | MMX_PSLLQrm = 2441, |
| 2457 | MMX_PSLLQrr = 2442, |
| 2458 | MMX_PSLLWri = 2443, |
| 2459 | MMX_PSLLWrm = 2444, |
| 2460 | MMX_PSLLWrr = 2445, |
| 2461 | MMX_PSRADri = 2446, |
| 2462 | MMX_PSRADrm = 2447, |
| 2463 | MMX_PSRADrr = 2448, |
| 2464 | MMX_PSRAWri = 2449, |
| 2465 | MMX_PSRAWrm = 2450, |
| 2466 | MMX_PSRAWrr = 2451, |
| 2467 | MMX_PSRLDri = 2452, |
| 2468 | MMX_PSRLDrm = 2453, |
| 2469 | MMX_PSRLDrr = 2454, |
| 2470 | MMX_PSRLQri = 2455, |
| 2471 | MMX_PSRLQrm = 2456, |
| 2472 | MMX_PSRLQrr = 2457, |
| 2473 | MMX_PSRLWri = 2458, |
| 2474 | MMX_PSRLWrm = 2459, |
| 2475 | MMX_PSRLWrr = 2460, |
| 2476 | MMX_PSUBBrm = 2461, |
| 2477 | MMX_PSUBBrr = 2462, |
| 2478 | MMX_PSUBDrm = 2463, |
| 2479 | MMX_PSUBDrr = 2464, |
| 2480 | MMX_PSUBQrm = 2465, |
| 2481 | MMX_PSUBQrr = 2466, |
| 2482 | MMX_PSUBSBrm = 2467, |
| 2483 | MMX_PSUBSBrr = 2468, |
| 2484 | MMX_PSUBSWrm = 2469, |
| 2485 | MMX_PSUBSWrr = 2470, |
| 2486 | MMX_PSUBUSBrm = 2471, |
| 2487 | MMX_PSUBUSBrr = 2472, |
| 2488 | MMX_PSUBUSWrm = 2473, |
| 2489 | MMX_PSUBUSWrr = 2474, |
| 2490 | MMX_PSUBWrm = 2475, |
| 2491 | MMX_PSUBWrr = 2476, |
| 2492 | MMX_PUNPCKHBWrm = 2477, |
| 2493 | MMX_PUNPCKHBWrr = 2478, |
| 2494 | MMX_PUNPCKHDQrm = 2479, |
| 2495 | MMX_PUNPCKHDQrr = 2480, |
| 2496 | MMX_PUNPCKHWDrm = 2481, |
| 2497 | MMX_PUNPCKHWDrr = 2482, |
| 2498 | MMX_PUNPCKLBWrm = 2483, |
| 2499 | MMX_PUNPCKLBWrr = 2484, |
| 2500 | MMX_PUNPCKLDQrm = 2485, |
| 2501 | MMX_PUNPCKLDQrr = 2486, |
| 2502 | MMX_PUNPCKLWDrm = 2487, |
| 2503 | MMX_PUNPCKLWDrr = 2488, |
| 2504 | MMX_PXORrm = 2489, |
| 2505 | MMX_PXORrr = 2490, |
| 2506 | MONITOR32rrr = 2491, |
| 2507 | MONITOR64rrr = 2492, |
| 2508 | MONITORX32rrr = 2493, |
| 2509 | MONITORX64rrr = 2494, |
| 2510 | MONTMUL = 2495, |
| 2511 | MOV16ao16 = 2496, |
| 2512 | MOV16ao32 = 2497, |
| 2513 | MOV16ao64 = 2498, |
| 2514 | MOV16mi = 2499, |
| 2515 | MOV16mr = 2500, |
| 2516 | MOV16ms = 2501, |
| 2517 | MOV16o16a = 2502, |
| 2518 | MOV16o32a = 2503, |
| 2519 | MOV16o64a = 2504, |
| 2520 | MOV16ri = 2505, |
| 2521 | MOV16ri_alt = 2506, |
| 2522 | MOV16rm = 2507, |
| 2523 | MOV16rr = 2508, |
| 2524 | MOV16rr_REV = 2509, |
| 2525 | MOV16rs = 2510, |
| 2526 | MOV16sm = 2511, |
| 2527 | MOV16sr = 2512, |
| 2528 | MOV32ao16 = 2513, |
| 2529 | MOV32ao32 = 2514, |
| 2530 | MOV32ao64 = 2515, |
| 2531 | MOV32cr = 2516, |
| 2532 | MOV32dr = 2517, |
| 2533 | MOV32mi = 2518, |
| 2534 | MOV32mr = 2519, |
| 2535 | MOV32o16a = 2520, |
| 2536 | MOV32o32a = 2521, |
| 2537 | MOV32o64a = 2522, |
| 2538 | MOV32rc = 2523, |
| 2539 | MOV32rd = 2524, |
| 2540 | MOV32ri = 2525, |
| 2541 | MOV32ri_alt = 2526, |
| 2542 | MOV32rm = 2527, |
| 2543 | MOV32rr = 2528, |
| 2544 | MOV32rr_REV = 2529, |
| 2545 | MOV32rs = 2530, |
| 2546 | MOV32sr = 2531, |
| 2547 | MOV64ao32 = 2532, |
| 2548 | MOV64ao64 = 2533, |
| 2549 | MOV64cr = 2534, |
| 2550 | MOV64dr = 2535, |
| 2551 | MOV64mi32 = 2536, |
| 2552 | MOV64mr = 2537, |
| 2553 | MOV64o32a = 2538, |
| 2554 | MOV64o64a = 2539, |
| 2555 | MOV64rc = 2540, |
| 2556 | MOV64rd = 2541, |
| 2557 | MOV64ri = 2542, |
| 2558 | MOV64ri32 = 2543, |
| 2559 | MOV64rm = 2544, |
| 2560 | MOV64rr = 2545, |
| 2561 | MOV64rr_REV = 2546, |
| 2562 | MOV64rs = 2547, |
| 2563 | MOV64sr = 2548, |
| 2564 | MOV64toPQIrm = 2549, |
| 2565 | MOV64toPQIrr = 2550, |
| 2566 | MOV64toSDrr = 2551, |
| 2567 | MOV8ao16 = 2552, |
| 2568 | MOV8ao32 = 2553, |
| 2569 | MOV8ao64 = 2554, |
| 2570 | MOV8mi = 2555, |
| 2571 | MOV8mr = 2556, |
| 2572 | MOV8mr_NOREX = 2557, |
| 2573 | MOV8o16a = 2558, |
| 2574 | MOV8o32a = 2559, |
| 2575 | MOV8o64a = 2560, |
| 2576 | MOV8ri = 2561, |
| 2577 | MOV8ri_alt = 2562, |
| 2578 | MOV8rm = 2563, |
| 2579 | MOV8rm_NOREX = 2564, |
| 2580 | MOV8rr = 2565, |
| 2581 | MOV8rr_NOREX = 2566, |
| 2582 | MOV8rr_REV = 2567, |
| 2583 | MOVAPDmr = 2568, |
| 2584 | MOVAPDrm = 2569, |
| 2585 | MOVAPDrr = 2570, |
| 2586 | MOVAPDrr_REV = 2571, |
| 2587 | MOVAPSmr = 2572, |
| 2588 | MOVAPSrm = 2573, |
| 2589 | MOVAPSrr = 2574, |
| 2590 | MOVAPSrr_REV = 2575, |
| 2591 | MOVBE16mr = 2576, |
| 2592 | MOVBE16mr_EVEX = 2577, |
| 2593 | MOVBE16rm = 2578, |
| 2594 | MOVBE16rm_EVEX = 2579, |
| 2595 | MOVBE16rr = 2580, |
| 2596 | MOVBE16rr_REV = 2581, |
| 2597 | MOVBE32mr = 2582, |
| 2598 | MOVBE32mr_EVEX = 2583, |
| 2599 | MOVBE32rm = 2584, |
| 2600 | MOVBE32rm_EVEX = 2585, |
| 2601 | MOVBE32rr = 2586, |
| 2602 | MOVBE32rr_REV = 2587, |
| 2603 | MOVBE64mr = 2588, |
| 2604 | MOVBE64mr_EVEX = 2589, |
| 2605 | MOVBE64rm = 2590, |
| 2606 | MOVBE64rm_EVEX = 2591, |
| 2607 | MOVBE64rr = 2592, |
| 2608 | MOVBE64rr_REV = 2593, |
| 2609 | MOVDDUPrm = 2594, |
| 2610 | MOVDDUPrr = 2595, |
| 2611 | MOVDI2PDIrm = 2596, |
| 2612 | MOVDI2PDIrr = 2597, |
| 2613 | MOVDI2SSrr = 2598, |
| 2614 | MOVDIR64B16 = 2599, |
| 2615 | MOVDIR64B32 = 2600, |
| 2616 | MOVDIR64B32_EVEX = 2601, |
| 2617 | MOVDIR64B64 = 2602, |
| 2618 | MOVDIR64B64_EVEX = 2603, |
| 2619 | MOVDIRI32 = 2604, |
| 2620 | MOVDIRI32_EVEX = 2605, |
| 2621 | MOVDIRI64 = 2606, |
| 2622 | MOVDIRI64_EVEX = 2607, |
| 2623 | MOVDQAmr = 2608, |
| 2624 | MOVDQArm = 2609, |
| 2625 | MOVDQArr = 2610, |
| 2626 | MOVDQArr_REV = 2611, |
| 2627 | MOVDQUmr = 2612, |
| 2628 | MOVDQUrm = 2613, |
| 2629 | MOVDQUrr = 2614, |
| 2630 | MOVDQUrr_REV = 2615, |
| 2631 | MOVHLPSrr = 2616, |
| 2632 | MOVHPDmr = 2617, |
| 2633 | MOVHPDrm = 2618, |
| 2634 | MOVHPSmr = 2619, |
| 2635 | MOVHPSrm = 2620, |
| 2636 | MOVLHPSrr = 2621, |
| 2637 | MOVLPDmr = 2622, |
| 2638 | MOVLPDrm = 2623, |
| 2639 | MOVLPSmr = 2624, |
| 2640 | MOVLPSrm = 2625, |
| 2641 | MOVMSKPDrr = 2626, |
| 2642 | MOVMSKPSrr = 2627, |
| 2643 | MOVNTDQArm = 2628, |
| 2644 | MOVNTDQmr = 2629, |
| 2645 | MOVNTI_64mr = 2630, |
| 2646 | MOVNTImr = 2631, |
| 2647 | MOVNTPDmr = 2632, |
| 2648 | MOVNTPSmr = 2633, |
| 2649 | MOVNTSD = 2634, |
| 2650 | MOVNTSS = 2635, |
| 2651 | MOVPC32r = 2636, |
| 2652 | MOVPDI2DImr = 2637, |
| 2653 | MOVPDI2DIrr = 2638, |
| 2654 | MOVPQI2QImr = 2639, |
| 2655 | MOVPQI2QIrr = 2640, |
| 2656 | MOVPQIto64mr = 2641, |
| 2657 | MOVPQIto64rr = 2642, |
| 2658 | MOVQI2PQIrm = 2643, |
| 2659 | MOVSB = 2644, |
| 2660 | MOVSDmr = 2645, |
| 2661 | MOVSDrm = 2646, |
| 2662 | MOVSDrm_alt = 2647, |
| 2663 | MOVSDrr = 2648, |
| 2664 | MOVSDrr_REV = 2649, |
| 2665 | MOVSDto64rr = 2650, |
| 2666 | MOVSHDUPrm = 2651, |
| 2667 | MOVSHDUPrr = 2652, |
| 2668 | MOVSL = 2653, |
| 2669 | MOVSLDUPrm = 2654, |
| 2670 | MOVSLDUPrr = 2655, |
| 2671 | MOVSQ = 2656, |
| 2672 | MOVSS2DIrr = 2657, |
| 2673 | MOVSSmr = 2658, |
| 2674 | MOVSSrm = 2659, |
| 2675 | MOVSSrm_alt = 2660, |
| 2676 | MOVSSrr = 2661, |
| 2677 | MOVSSrr_REV = 2662, |
| 2678 | MOVSW = 2663, |
| 2679 | MOVSX16rm16 = 2664, |
| 2680 | MOVSX16rm32 = 2665, |
| 2681 | MOVSX16rm8 = 2666, |
| 2682 | MOVSX16rr16 = 2667, |
| 2683 | MOVSX16rr32 = 2668, |
| 2684 | MOVSX16rr8 = 2669, |
| 2685 | MOVSX32rm16 = 2670, |
| 2686 | MOVSX32rm32 = 2671, |
| 2687 | MOVSX32rm8 = 2672, |
| 2688 | MOVSX32rm8_NOREX = 2673, |
| 2689 | MOVSX32rr16 = 2674, |
| 2690 | MOVSX32rr32 = 2675, |
| 2691 | MOVSX32rr8 = 2676, |
| 2692 | MOVSX32rr8_NOREX = 2677, |
| 2693 | MOVSX64rm16 = 2678, |
| 2694 | MOVSX64rm32 = 2679, |
| 2695 | MOVSX64rm8 = 2680, |
| 2696 | MOVSX64rr16 = 2681, |
| 2697 | MOVSX64rr32 = 2682, |
| 2698 | MOVSX64rr8 = 2683, |
| 2699 | MOVUPDmr = 2684, |
| 2700 | MOVUPDrm = 2685, |
| 2701 | MOVUPDrr = 2686, |
| 2702 | MOVUPDrr_REV = 2687, |
| 2703 | MOVUPSmr = 2688, |
| 2704 | MOVUPSrm = 2689, |
| 2705 | MOVUPSrr = 2690, |
| 2706 | MOVUPSrr_REV = 2691, |
| 2707 | MOVZPQILo2PQIrr = 2692, |
| 2708 | MOVZX16rm16 = 2693, |
| 2709 | MOVZX16rm8 = 2694, |
| 2710 | MOVZX16rr16 = 2695, |
| 2711 | MOVZX16rr8 = 2696, |
| 2712 | MOVZX32rm16 = 2697, |
| 2713 | MOVZX32rm8 = 2698, |
| 2714 | MOVZX32rm8_NOREX = 2699, |
| 2715 | MOVZX32rr16 = 2700, |
| 2716 | MOVZX32rr8 = 2701, |
| 2717 | MOVZX32rr8_NOREX = 2702, |
| 2718 | MOVZX64rm16 = 2703, |
| 2719 | MOVZX64rm8 = 2704, |
| 2720 | MOVZX64rr16 = 2705, |
| 2721 | MOVZX64rr8 = 2706, |
| 2722 | MPSADBWrmi = 2707, |
| 2723 | MPSADBWrri = 2708, |
| 2724 | MUL16m = 2709, |
| 2725 | MUL16m_EVEX = 2710, |
| 2726 | MUL16m_NF = 2711, |
| 2727 | MUL16r = 2712, |
| 2728 | MUL16r_EVEX = 2713, |
| 2729 | MUL16r_NF = 2714, |
| 2730 | MUL32m = 2715, |
| 2731 | MUL32m_EVEX = 2716, |
| 2732 | MUL32m_NF = 2717, |
| 2733 | MUL32r = 2718, |
| 2734 | MUL32r_EVEX = 2719, |
| 2735 | MUL32r_NF = 2720, |
| 2736 | MUL64m = 2721, |
| 2737 | MUL64m_EVEX = 2722, |
| 2738 | MUL64m_NF = 2723, |
| 2739 | MUL64r = 2724, |
| 2740 | MUL64r_EVEX = 2725, |
| 2741 | MUL64r_NF = 2726, |
| 2742 | MUL8m = 2727, |
| 2743 | MUL8m_EVEX = 2728, |
| 2744 | MUL8m_NF = 2729, |
| 2745 | MUL8r = 2730, |
| 2746 | MUL8r_EVEX = 2731, |
| 2747 | MUL8r_NF = 2732, |
| 2748 | MULPDrm = 2733, |
| 2749 | MULPDrr = 2734, |
| 2750 | MULPSrm = 2735, |
| 2751 | MULPSrr = 2736, |
| 2752 | MULSDrm = 2737, |
| 2753 | MULSDrm_Int = 2738, |
| 2754 | MULSDrr = 2739, |
| 2755 | MULSDrr_Int = 2740, |
| 2756 | MULSSrm = 2741, |
| 2757 | MULSSrm_Int = 2742, |
| 2758 | MULSSrr = 2743, |
| 2759 | MULSSrr_Int = 2744, |
| 2760 | MULX32Hrm = 2745, |
| 2761 | MULX32Hrr = 2746, |
| 2762 | MULX32rm = 2747, |
| 2763 | MULX32rm_EVEX = 2748, |
| 2764 | MULX32rr = 2749, |
| 2765 | MULX32rr_EVEX = 2750, |
| 2766 | MULX64Hrm = 2751, |
| 2767 | MULX64Hrr = 2752, |
| 2768 | MULX64rm = 2753, |
| 2769 | MULX64rm_EVEX = 2754, |
| 2770 | MULX64rr = 2755, |
| 2771 | MULX64rr_EVEX = 2756, |
| 2772 | MUL_F32m = 2757, |
| 2773 | MUL_F64m = 2758, |
| 2774 | MUL_FI16m = 2759, |
| 2775 | MUL_FI32m = 2760, |
| 2776 | MUL_FPrST0 = 2761, |
| 2777 | MUL_FST0r = 2762, |
| 2778 | MUL_Fp32 = 2763, |
| 2779 | MUL_Fp32m = 2764, |
| 2780 | MUL_Fp64 = 2765, |
| 2781 | MUL_Fp64m = 2766, |
| 2782 | MUL_Fp64m32 = 2767, |
| 2783 | MUL_Fp80 = 2768, |
| 2784 | MUL_Fp80m32 = 2769, |
| 2785 | MUL_Fp80m64 = 2770, |
| 2786 | MUL_FpI16m32 = 2771, |
| 2787 | MUL_FpI16m64 = 2772, |
| 2788 | MUL_FpI16m80 = 2773, |
| 2789 | MUL_FpI32m32 = 2774, |
| 2790 | MUL_FpI32m64 = 2775, |
| 2791 | MUL_FpI32m80 = 2776, |
| 2792 | MUL_FrST0 = 2777, |
| 2793 | MWAITXrrr = 2778, |
| 2794 | MWAITrr = 2779, |
| 2795 | NEG16m = 2780, |
| 2796 | NEG16m_EVEX = 2781, |
| 2797 | NEG16m_ND = 2782, |
| 2798 | NEG16m_NF = 2783, |
| 2799 | NEG16m_NF_ND = 2784, |
| 2800 | NEG16r = 2785, |
| 2801 | NEG16r_EVEX = 2786, |
| 2802 | NEG16r_ND = 2787, |
| 2803 | NEG16r_NF = 2788, |
| 2804 | NEG16r_NF_ND = 2789, |
| 2805 | NEG32m = 2790, |
| 2806 | NEG32m_EVEX = 2791, |
| 2807 | NEG32m_ND = 2792, |
| 2808 | NEG32m_NF = 2793, |
| 2809 | NEG32m_NF_ND = 2794, |
| 2810 | NEG32r = 2795, |
| 2811 | NEG32r_EVEX = 2796, |
| 2812 | NEG32r_ND = 2797, |
| 2813 | NEG32r_NF = 2798, |
| 2814 | NEG32r_NF_ND = 2799, |
| 2815 | NEG64m = 2800, |
| 2816 | NEG64m_EVEX = 2801, |
| 2817 | NEG64m_ND = 2802, |
| 2818 | NEG64m_NF = 2803, |
| 2819 | NEG64m_NF_ND = 2804, |
| 2820 | NEG64r = 2805, |
| 2821 | NEG64r_EVEX = 2806, |
| 2822 | NEG64r_ND = 2807, |
| 2823 | NEG64r_NF = 2808, |
| 2824 | NEG64r_NF_ND = 2809, |
| 2825 | NEG8m = 2810, |
| 2826 | NEG8m_EVEX = 2811, |
| 2827 | NEG8m_ND = 2812, |
| 2828 | NEG8m_NF = 2813, |
| 2829 | NEG8m_NF_ND = 2814, |
| 2830 | NEG8r = 2815, |
| 2831 | NEG8r_EVEX = 2816, |
| 2832 | NEG8r_ND = 2817, |
| 2833 | NEG8r_NF = 2818, |
| 2834 | NEG8r_NF_ND = 2819, |
| 2835 | NOOP = 2820, |
| 2836 | NOOPL = 2821, |
| 2837 | NOOPLr = 2822, |
| 2838 | NOOPQ = 2823, |
| 2839 | NOOPQr = 2824, |
| 2840 | NOOPW = 2825, |
| 2841 | NOOPWr = 2826, |
| 2842 | NOT16m = 2827, |
| 2843 | NOT16m_EVEX = 2828, |
| 2844 | NOT16m_ND = 2829, |
| 2845 | NOT16r = 2830, |
| 2846 | NOT16r_EVEX = 2831, |
| 2847 | NOT16r_ND = 2832, |
| 2848 | NOT32m = 2833, |
| 2849 | NOT32m_EVEX = 2834, |
| 2850 | NOT32m_ND = 2835, |
| 2851 | NOT32r = 2836, |
| 2852 | NOT32r_EVEX = 2837, |
| 2853 | NOT32r_ND = 2838, |
| 2854 | NOT64m = 2839, |
| 2855 | NOT64m_EVEX = 2840, |
| 2856 | NOT64m_ND = 2841, |
| 2857 | NOT64r = 2842, |
| 2858 | NOT64r_EVEX = 2843, |
| 2859 | NOT64r_ND = 2844, |
| 2860 | NOT8m = 2845, |
| 2861 | NOT8m_EVEX = 2846, |
| 2862 | NOT8m_ND = 2847, |
| 2863 | NOT8r = 2848, |
| 2864 | NOT8r_EVEX = 2849, |
| 2865 | NOT8r_ND = 2850, |
| 2866 | OR16i16 = 2851, |
| 2867 | OR16mi = 2852, |
| 2868 | OR16mi8 = 2853, |
| 2869 | OR16mi8_EVEX = 2854, |
| 2870 | OR16mi8_ND = 2855, |
| 2871 | OR16mi8_NF = 2856, |
| 2872 | OR16mi8_NF_ND = 2857, |
| 2873 | OR16mi_EVEX = 2858, |
| 2874 | OR16mi_ND = 2859, |
| 2875 | OR16mi_NF = 2860, |
| 2876 | OR16mi_NF_ND = 2861, |
| 2877 | OR16mr = 2862, |
| 2878 | OR16mr_EVEX = 2863, |
| 2879 | OR16mr_ND = 2864, |
| 2880 | OR16mr_NF = 2865, |
| 2881 | OR16mr_NF_ND = 2866, |
| 2882 | OR16ri = 2867, |
| 2883 | OR16ri8 = 2868, |
| 2884 | OR16ri8_EVEX = 2869, |
| 2885 | OR16ri8_ND = 2870, |
| 2886 | OR16ri8_NF = 2871, |
| 2887 | OR16ri8_NF_ND = 2872, |
| 2888 | OR16ri_EVEX = 2873, |
| 2889 | OR16ri_ND = 2874, |
| 2890 | OR16ri_NF = 2875, |
| 2891 | OR16ri_NF_ND = 2876, |
| 2892 | OR16rm = 2877, |
| 2893 | OR16rm_EVEX = 2878, |
| 2894 | OR16rm_ND = 2879, |
| 2895 | OR16rm_NF = 2880, |
| 2896 | OR16rm_NF_ND = 2881, |
| 2897 | OR16rr = 2882, |
| 2898 | OR16rr_EVEX = 2883, |
| 2899 | OR16rr_EVEX_REV = 2884, |
| 2900 | OR16rr_ND = 2885, |
| 2901 | OR16rr_ND_REV = 2886, |
| 2902 | OR16rr_NF = 2887, |
| 2903 | OR16rr_NF_ND = 2888, |
| 2904 | OR16rr_NF_ND_REV = 2889, |
| 2905 | OR16rr_NF_REV = 2890, |
| 2906 | OR16rr_REV = 2891, |
| 2907 | OR32i32 = 2892, |
| 2908 | OR32mi = 2893, |
| 2909 | OR32mi8 = 2894, |
| 2910 | OR32mi8Locked = 2895, |
| 2911 | OR32mi8_EVEX = 2896, |
| 2912 | OR32mi8_ND = 2897, |
| 2913 | OR32mi8_NF = 2898, |
| 2914 | OR32mi8_NF_ND = 2899, |
| 2915 | OR32mi_EVEX = 2900, |
| 2916 | OR32mi_ND = 2901, |
| 2917 | OR32mi_NF = 2902, |
| 2918 | OR32mi_NF_ND = 2903, |
| 2919 | OR32mr = 2904, |
| 2920 | OR32mr_EVEX = 2905, |
| 2921 | OR32mr_ND = 2906, |
| 2922 | OR32mr_NF = 2907, |
| 2923 | OR32mr_NF_ND = 2908, |
| 2924 | OR32ri = 2909, |
| 2925 | OR32ri8 = 2910, |
| 2926 | OR32ri8_EVEX = 2911, |
| 2927 | OR32ri8_ND = 2912, |
| 2928 | OR32ri8_NF = 2913, |
| 2929 | OR32ri8_NF_ND = 2914, |
| 2930 | OR32ri_EVEX = 2915, |
| 2931 | OR32ri_ND = 2916, |
| 2932 | OR32ri_NF = 2917, |
| 2933 | OR32ri_NF_ND = 2918, |
| 2934 | OR32rm = 2919, |
| 2935 | OR32rm_EVEX = 2920, |
| 2936 | OR32rm_ND = 2921, |
| 2937 | OR32rm_NF = 2922, |
| 2938 | OR32rm_NF_ND = 2923, |
| 2939 | OR32rr = 2924, |
| 2940 | OR32rr_EVEX = 2925, |
| 2941 | OR32rr_EVEX_REV = 2926, |
| 2942 | OR32rr_ND = 2927, |
| 2943 | OR32rr_ND_REV = 2928, |
| 2944 | OR32rr_NF = 2929, |
| 2945 | OR32rr_NF_ND = 2930, |
| 2946 | OR32rr_NF_ND_REV = 2931, |
| 2947 | OR32rr_NF_REV = 2932, |
| 2948 | OR32rr_REV = 2933, |
| 2949 | OR64i32 = 2934, |
| 2950 | OR64mi32 = 2935, |
| 2951 | OR64mi32_EVEX = 2936, |
| 2952 | OR64mi32_ND = 2937, |
| 2953 | OR64mi32_NF = 2938, |
| 2954 | OR64mi32_NF_ND = 2939, |
| 2955 | OR64mi8 = 2940, |
| 2956 | OR64mi8_EVEX = 2941, |
| 2957 | OR64mi8_ND = 2942, |
| 2958 | OR64mi8_NF = 2943, |
| 2959 | OR64mi8_NF_ND = 2944, |
| 2960 | OR64mr = 2945, |
| 2961 | OR64mr_EVEX = 2946, |
| 2962 | OR64mr_ND = 2947, |
| 2963 | OR64mr_NF = 2948, |
| 2964 | OR64mr_NF_ND = 2949, |
| 2965 | OR64ri32 = 2950, |
| 2966 | OR64ri32_EVEX = 2951, |
| 2967 | OR64ri32_ND = 2952, |
| 2968 | OR64ri32_NF = 2953, |
| 2969 | OR64ri32_NF_ND = 2954, |
| 2970 | OR64ri8 = 2955, |
| 2971 | OR64ri8_EVEX = 2956, |
| 2972 | OR64ri8_ND = 2957, |
| 2973 | OR64ri8_NF = 2958, |
| 2974 | OR64ri8_NF_ND = 2959, |
| 2975 | OR64rm = 2960, |
| 2976 | OR64rm_EVEX = 2961, |
| 2977 | OR64rm_ND = 2962, |
| 2978 | OR64rm_NF = 2963, |
| 2979 | OR64rm_NF_ND = 2964, |
| 2980 | OR64rr = 2965, |
| 2981 | OR64rr_EVEX = 2966, |
| 2982 | OR64rr_EVEX_REV = 2967, |
| 2983 | OR64rr_ND = 2968, |
| 2984 | OR64rr_ND_REV = 2969, |
| 2985 | OR64rr_NF = 2970, |
| 2986 | OR64rr_NF_ND = 2971, |
| 2987 | OR64rr_NF_ND_REV = 2972, |
| 2988 | OR64rr_NF_REV = 2973, |
| 2989 | OR64rr_REV = 2974, |
| 2990 | OR8i8 = 2975, |
| 2991 | OR8mi = 2976, |
| 2992 | OR8mi8 = 2977, |
| 2993 | OR8mi_EVEX = 2978, |
| 2994 | OR8mi_ND = 2979, |
| 2995 | OR8mi_NF = 2980, |
| 2996 | OR8mi_NF_ND = 2981, |
| 2997 | OR8mr = 2982, |
| 2998 | OR8mr_EVEX = 2983, |
| 2999 | OR8mr_ND = 2984, |
| 3000 | OR8mr_NF = 2985, |
| 3001 | OR8mr_NF_ND = 2986, |
| 3002 | OR8ri = 2987, |
| 3003 | OR8ri8 = 2988, |
| 3004 | OR8ri_EVEX = 2989, |
| 3005 | OR8ri_ND = 2990, |
| 3006 | OR8ri_NF = 2991, |
| 3007 | OR8ri_NF_ND = 2992, |
| 3008 | OR8rm = 2993, |
| 3009 | OR8rm_EVEX = 2994, |
| 3010 | OR8rm_ND = 2995, |
| 3011 | OR8rm_NF = 2996, |
| 3012 | OR8rm_NF_ND = 2997, |
| 3013 | OR8rr = 2998, |
| 3014 | OR8rr_EVEX = 2999, |
| 3015 | OR8rr_EVEX_REV = 3000, |
| 3016 | OR8rr_ND = 3001, |
| 3017 | OR8rr_ND_REV = 3002, |
| 3018 | OR8rr_NF = 3003, |
| 3019 | OR8rr_NF_ND = 3004, |
| 3020 | OR8rr_NF_ND_REV = 3005, |
| 3021 | OR8rr_NF_REV = 3006, |
| 3022 | OR8rr_REV = 3007, |
| 3023 | ORPDrm = 3008, |
| 3024 | ORPDrr = 3009, |
| 3025 | ORPSrm = 3010, |
| 3026 | ORPSrr = 3011, |
| 3027 | OUT16ir = 3012, |
| 3028 | OUT16rr = 3013, |
| 3029 | OUT32ir = 3014, |
| 3030 | OUT32rr = 3015, |
| 3031 | OUT8ir = 3016, |
| 3032 | OUT8rr = 3017, |
| 3033 | OUTSB = 3018, |
| 3034 | OUTSL = 3019, |
| 3035 | OUTSW = 3020, |
| 3036 | PABSBrm = 3021, |
| 3037 | PABSBrr = 3022, |
| 3038 | PABSDrm = 3023, |
| 3039 | PABSDrr = 3024, |
| 3040 | PABSWrm = 3025, |
| 3041 | PABSWrr = 3026, |
| 3042 | PACKSSDWrm = 3027, |
| 3043 | PACKSSDWrr = 3028, |
| 3044 | PACKSSWBrm = 3029, |
| 3045 | PACKSSWBrr = 3030, |
| 3046 | PACKUSDWrm = 3031, |
| 3047 | PACKUSDWrr = 3032, |
| 3048 | PACKUSWBrm = 3033, |
| 3049 | PACKUSWBrr = 3034, |
| 3050 | PADDBrm = 3035, |
| 3051 | PADDBrr = 3036, |
| 3052 | PADDDrm = 3037, |
| 3053 | PADDDrr = 3038, |
| 3054 | PADDQrm = 3039, |
| 3055 | PADDQrr = 3040, |
| 3056 | PADDSBrm = 3041, |
| 3057 | PADDSBrr = 3042, |
| 3058 | PADDSWrm = 3043, |
| 3059 | PADDSWrr = 3044, |
| 3060 | PADDUSBrm = 3045, |
| 3061 | PADDUSBrr = 3046, |
| 3062 | PADDUSWrm = 3047, |
| 3063 | PADDUSWrr = 3048, |
| 3064 | PADDWrm = 3049, |
| 3065 | PADDWrr = 3050, |
| 3066 | PALIGNRrmi = 3051, |
| 3067 | PALIGNRrri = 3052, |
| 3068 | PANDNrm = 3053, |
| 3069 | PANDNrr = 3054, |
| 3070 | PANDrm = 3055, |
| 3071 | PANDrr = 3056, |
| 3072 | PAUSE = 3057, |
| 3073 | PAVGBrm = 3058, |
| 3074 | PAVGBrr = 3059, |
| 3075 | PAVGUSBrm = 3060, |
| 3076 | PAVGUSBrr = 3061, |
| 3077 | PAVGWrm = 3062, |
| 3078 | PAVGWrr = 3063, |
| 3079 | PBLENDVBrm0 = 3064, |
| 3080 | PBLENDVBrr0 = 3065, |
| 3081 | PBLENDWrmi = 3066, |
| 3082 | PBLENDWrri = 3067, |
| 3083 | PBNDKB = 3068, |
| 3084 | PCLMULQDQrmi = 3069, |
| 3085 | PCLMULQDQrri = 3070, |
| 3086 | PCMPEQBrm = 3071, |
| 3087 | PCMPEQBrr = 3072, |
| 3088 | PCMPEQDrm = 3073, |
| 3089 | PCMPEQDrr = 3074, |
| 3090 | PCMPEQQrm = 3075, |
| 3091 | PCMPEQQrr = 3076, |
| 3092 | PCMPEQWrm = 3077, |
| 3093 | PCMPEQWrr = 3078, |
| 3094 | PCMPESTRIrmi = 3079, |
| 3095 | PCMPESTRIrri = 3080, |
| 3096 | PCMPESTRMrmi = 3081, |
| 3097 | PCMPESTRMrri = 3082, |
| 3098 | PCMPGTBrm = 3083, |
| 3099 | PCMPGTBrr = 3084, |
| 3100 | PCMPGTDrm = 3085, |
| 3101 | PCMPGTDrr = 3086, |
| 3102 | PCMPGTQrm = 3087, |
| 3103 | PCMPGTQrr = 3088, |
| 3104 | PCMPGTWrm = 3089, |
| 3105 | PCMPGTWrr = 3090, |
| 3106 | PCMPISTRIrmi = 3091, |
| 3107 | PCMPISTRIrri = 3092, |
| 3108 | PCMPISTRMrmi = 3093, |
| 3109 | PCMPISTRMrri = 3094, |
| 3110 | PCONFIG = 3095, |
| 3111 | PDEP32rm = 3096, |
| 3112 | PDEP32rm_EVEX = 3097, |
| 3113 | PDEP32rr = 3098, |
| 3114 | PDEP32rr_EVEX = 3099, |
| 3115 | PDEP64rm = 3100, |
| 3116 | PDEP64rm_EVEX = 3101, |
| 3117 | PDEP64rr = 3102, |
| 3118 | PDEP64rr_EVEX = 3103, |
| 3119 | PEXT32rm = 3104, |
| 3120 | PEXT32rm_EVEX = 3105, |
| 3121 | PEXT32rr = 3106, |
| 3122 | PEXT32rr_EVEX = 3107, |
| 3123 | PEXT64rm = 3108, |
| 3124 | PEXT64rm_EVEX = 3109, |
| 3125 | PEXT64rr = 3110, |
| 3126 | PEXT64rr_EVEX = 3111, |
| 3127 | PEXTRBmr = 3112, |
| 3128 | PEXTRBrr = 3113, |
| 3129 | PEXTRDmr = 3114, |
| 3130 | PEXTRDrr = 3115, |
| 3131 | PEXTRQmr = 3116, |
| 3132 | PEXTRQrr = 3117, |
| 3133 | PEXTRWmr = 3118, |
| 3134 | PEXTRWrr = 3119, |
| 3135 | PEXTRWrr_REV = 3120, |
| 3136 | PF2IDrm = 3121, |
| 3137 | PF2IDrr = 3122, |
| 3138 | PF2IWrm = 3123, |
| 3139 | PF2IWrr = 3124, |
| 3140 | PFACCrm = 3125, |
| 3141 | PFACCrr = 3126, |
| 3142 | PFADDrm = 3127, |
| 3143 | PFADDrr = 3128, |
| 3144 | PFCMPEQrm = 3129, |
| 3145 | PFCMPEQrr = 3130, |
| 3146 | PFCMPGErm = 3131, |
| 3147 | PFCMPGErr = 3132, |
| 3148 | PFCMPGTrm = 3133, |
| 3149 | PFCMPGTrr = 3134, |
| 3150 | PFMAXrm = 3135, |
| 3151 | PFMAXrr = 3136, |
| 3152 | PFMINrm = 3137, |
| 3153 | PFMINrr = 3138, |
| 3154 | PFMULrm = 3139, |
| 3155 | PFMULrr = 3140, |
| 3156 | PFNACCrm = 3141, |
| 3157 | PFNACCrr = 3142, |
| 3158 | PFPNACCrm = 3143, |
| 3159 | PFPNACCrr = 3144, |
| 3160 | PFRCPIT1rm = 3145, |
| 3161 | PFRCPIT1rr = 3146, |
| 3162 | PFRCPIT2rm = 3147, |
| 3163 | PFRCPIT2rr = 3148, |
| 3164 | PFRCPrm = 3149, |
| 3165 | PFRCPrr = 3150, |
| 3166 | PFRSQIT1rm = 3151, |
| 3167 | PFRSQIT1rr = 3152, |
| 3168 | PFRSQRTrm = 3153, |
| 3169 | PFRSQRTrr = 3154, |
| 3170 | PFSUBRrm = 3155, |
| 3171 | PFSUBRrr = 3156, |
| 3172 | PFSUBrm = 3157, |
| 3173 | PFSUBrr = 3158, |
| 3174 | PHADDDrm = 3159, |
| 3175 | PHADDDrr = 3160, |
| 3176 | PHADDSWrm = 3161, |
| 3177 | PHADDSWrr = 3162, |
| 3178 | PHADDWrm = 3163, |
| 3179 | PHADDWrr = 3164, |
| 3180 | PHMINPOSUWrm = 3165, |
| 3181 | PHMINPOSUWrr = 3166, |
| 3182 | PHSUBDrm = 3167, |
| 3183 | PHSUBDrr = 3168, |
| 3184 | PHSUBSWrm = 3169, |
| 3185 | PHSUBSWrr = 3170, |
| 3186 | PHSUBWrm = 3171, |
| 3187 | PHSUBWrr = 3172, |
| 3188 | PI2FDrm = 3173, |
| 3189 | PI2FDrr = 3174, |
| 3190 | PI2FWrm = 3175, |
| 3191 | PI2FWrr = 3176, |
| 3192 | PINSRBrm = 3177, |
| 3193 | PINSRBrr = 3178, |
| 3194 | PINSRDrm = 3179, |
| 3195 | PINSRDrr = 3180, |
| 3196 | PINSRQrm = 3181, |
| 3197 | PINSRQrr = 3182, |
| 3198 | PINSRWrm = 3183, |
| 3199 | PINSRWrr = 3184, |
| 3200 | PMADDUBSWrm = 3185, |
| 3201 | PMADDUBSWrr = 3186, |
| 3202 | PMADDWDrm = 3187, |
| 3203 | PMADDWDrr = 3188, |
| 3204 | PMAXSBrm = 3189, |
| 3205 | PMAXSBrr = 3190, |
| 3206 | PMAXSDrm = 3191, |
| 3207 | PMAXSDrr = 3192, |
| 3208 | PMAXSWrm = 3193, |
| 3209 | PMAXSWrr = 3194, |
| 3210 | PMAXUBrm = 3195, |
| 3211 | PMAXUBrr = 3196, |
| 3212 | PMAXUDrm = 3197, |
| 3213 | PMAXUDrr = 3198, |
| 3214 | PMAXUWrm = 3199, |
| 3215 | PMAXUWrr = 3200, |
| 3216 | PMINSBrm = 3201, |
| 3217 | PMINSBrr = 3202, |
| 3218 | PMINSDrm = 3203, |
| 3219 | PMINSDrr = 3204, |
| 3220 | PMINSWrm = 3205, |
| 3221 | PMINSWrr = 3206, |
| 3222 | PMINUBrm = 3207, |
| 3223 | PMINUBrr = 3208, |
| 3224 | PMINUDrm = 3209, |
| 3225 | PMINUDrr = 3210, |
| 3226 | PMINUWrm = 3211, |
| 3227 | PMINUWrr = 3212, |
| 3228 | PMOVMSKBrr = 3213, |
| 3229 | PMOVSXBDrm = 3214, |
| 3230 | PMOVSXBDrr = 3215, |
| 3231 | PMOVSXBQrm = 3216, |
| 3232 | PMOVSXBQrr = 3217, |
| 3233 | PMOVSXBWrm = 3218, |
| 3234 | PMOVSXBWrr = 3219, |
| 3235 | PMOVSXDQrm = 3220, |
| 3236 | PMOVSXDQrr = 3221, |
| 3237 | PMOVSXWDrm = 3222, |
| 3238 | PMOVSXWDrr = 3223, |
| 3239 | PMOVSXWQrm = 3224, |
| 3240 | PMOVSXWQrr = 3225, |
| 3241 | PMOVZXBDrm = 3226, |
| 3242 | PMOVZXBDrr = 3227, |
| 3243 | PMOVZXBQrm = 3228, |
| 3244 | PMOVZXBQrr = 3229, |
| 3245 | PMOVZXBWrm = 3230, |
| 3246 | PMOVZXBWrr = 3231, |
| 3247 | PMOVZXDQrm = 3232, |
| 3248 | PMOVZXDQrr = 3233, |
| 3249 | PMOVZXWDrm = 3234, |
| 3250 | PMOVZXWDrr = 3235, |
| 3251 | PMOVZXWQrm = 3236, |
| 3252 | PMOVZXWQrr = 3237, |
| 3253 | PMULDQrm = 3238, |
| 3254 | PMULDQrr = 3239, |
| 3255 | PMULHRSWrm = 3240, |
| 3256 | PMULHRSWrr = 3241, |
| 3257 | PMULHRWrm = 3242, |
| 3258 | PMULHRWrr = 3243, |
| 3259 | PMULHUWrm = 3244, |
| 3260 | PMULHUWrr = 3245, |
| 3261 | PMULHWrm = 3246, |
| 3262 | PMULHWrr = 3247, |
| 3263 | PMULLDrm = 3248, |
| 3264 | PMULLDrr = 3249, |
| 3265 | PMULLWrm = 3250, |
| 3266 | PMULLWrr = 3251, |
| 3267 | PMULUDQrm = 3252, |
| 3268 | PMULUDQrr = 3253, |
| 3269 | POP16r = 3254, |
| 3270 | POP16rmm = 3255, |
| 3271 | POP16rmr = 3256, |
| 3272 | POP2 = 3257, |
| 3273 | POP2P = 3258, |
| 3274 | POP32r = 3259, |
| 3275 | POP32rmm = 3260, |
| 3276 | POP32rmr = 3261, |
| 3277 | POP64r = 3262, |
| 3278 | POP64rmm = 3263, |
| 3279 | POP64rmr = 3264, |
| 3280 | POPA16 = 3265, |
| 3281 | POPA32 = 3266, |
| 3282 | POPCNT16rm = 3267, |
| 3283 | POPCNT16rm_EVEX = 3268, |
| 3284 | POPCNT16rm_NF = 3269, |
| 3285 | POPCNT16rr = 3270, |
| 3286 | POPCNT16rr_EVEX = 3271, |
| 3287 | POPCNT16rr_NF = 3272, |
| 3288 | POPCNT32rm = 3273, |
| 3289 | POPCNT32rm_EVEX = 3274, |
| 3290 | POPCNT32rm_NF = 3275, |
| 3291 | POPCNT32rr = 3276, |
| 3292 | POPCNT32rr_EVEX = 3277, |
| 3293 | POPCNT32rr_NF = 3278, |
| 3294 | POPCNT64rm = 3279, |
| 3295 | POPCNT64rm_EVEX = 3280, |
| 3296 | POPCNT64rm_NF = 3281, |
| 3297 | POPCNT64rr = 3282, |
| 3298 | POPCNT64rr_EVEX = 3283, |
| 3299 | POPCNT64rr_NF = 3284, |
| 3300 | POPDS16 = 3285, |
| 3301 | POPDS32 = 3286, |
| 3302 | POPES16 = 3287, |
| 3303 | POPES32 = 3288, |
| 3304 | POPF16 = 3289, |
| 3305 | POPF32 = 3290, |
| 3306 | POPF64 = 3291, |
| 3307 | POPFS16 = 3292, |
| 3308 | POPFS32 = 3293, |
| 3309 | POPFS64 = 3294, |
| 3310 | POPGS16 = 3295, |
| 3311 | POPGS32 = 3296, |
| 3312 | POPGS64 = 3297, |
| 3313 | POPP64r = 3298, |
| 3314 | POPSS16 = 3299, |
| 3315 | POPSS32 = 3300, |
| 3316 | PORrm = 3301, |
| 3317 | PORrr = 3302, |
| 3318 | PREFETCH = 3303, |
| 3319 | PREFETCHIT0 = 3304, |
| 3320 | PREFETCHIT1 = 3305, |
| 3321 | PREFETCHNTA = 3306, |
| 3322 | PREFETCHT0 = 3307, |
| 3323 | PREFETCHT1 = 3308, |
| 3324 | PREFETCHT2 = 3309, |
| 3325 | PREFETCHW = 3310, |
| 3326 | PREFETCHWT1 = 3311, |
| 3327 | PROBED_ALLOCA_32 = 3312, |
| 3328 | PROBED_ALLOCA_64 = 3313, |
| 3329 | PSADBWrm = 3314, |
| 3330 | PSADBWrr = 3315, |
| 3331 | PSHUFBrm = 3316, |
| 3332 | PSHUFBrr = 3317, |
| 3333 | PSHUFDmi = 3318, |
| 3334 | PSHUFDri = 3319, |
| 3335 | PSHUFHWmi = 3320, |
| 3336 | PSHUFHWri = 3321, |
| 3337 | PSHUFLWmi = 3322, |
| 3338 | PSHUFLWri = 3323, |
| 3339 | PSIGNBrm = 3324, |
| 3340 | PSIGNBrr = 3325, |
| 3341 | PSIGNDrm = 3326, |
| 3342 | PSIGNDrr = 3327, |
| 3343 | PSIGNWrm = 3328, |
| 3344 | PSIGNWrr = 3329, |
| 3345 | PSLLDQri = 3330, |
| 3346 | PSLLDri = 3331, |
| 3347 | PSLLDrm = 3332, |
| 3348 | PSLLDrr = 3333, |
| 3349 | PSLLQri = 3334, |
| 3350 | PSLLQrm = 3335, |
| 3351 | PSLLQrr = 3336, |
| 3352 | PSLLWri = 3337, |
| 3353 | PSLLWrm = 3338, |
| 3354 | PSLLWrr = 3339, |
| 3355 | PSMASH = 3340, |
| 3356 | PSRADri = 3341, |
| 3357 | PSRADrm = 3342, |
| 3358 | PSRADrr = 3343, |
| 3359 | PSRAWri = 3344, |
| 3360 | PSRAWrm = 3345, |
| 3361 | PSRAWrr = 3346, |
| 3362 | PSRLDQri = 3347, |
| 3363 | PSRLDri = 3348, |
| 3364 | PSRLDrm = 3349, |
| 3365 | PSRLDrr = 3350, |
| 3366 | PSRLQri = 3351, |
| 3367 | PSRLQrm = 3352, |
| 3368 | PSRLQrr = 3353, |
| 3369 | PSRLWri = 3354, |
| 3370 | PSRLWrm = 3355, |
| 3371 | PSRLWrr = 3356, |
| 3372 | PSUBBrm = 3357, |
| 3373 | PSUBBrr = 3358, |
| 3374 | PSUBDrm = 3359, |
| 3375 | PSUBDrr = 3360, |
| 3376 | PSUBQrm = 3361, |
| 3377 | PSUBQrr = 3362, |
| 3378 | PSUBSBrm = 3363, |
| 3379 | PSUBSBrr = 3364, |
| 3380 | PSUBSWrm = 3365, |
| 3381 | PSUBSWrr = 3366, |
| 3382 | PSUBUSBrm = 3367, |
| 3383 | PSUBUSBrr = 3368, |
| 3384 | PSUBUSWrm = 3369, |
| 3385 | PSUBUSWrr = 3370, |
| 3386 | PSUBWrm = 3371, |
| 3387 | PSUBWrr = 3372, |
| 3388 | PSWAPDrm = 3373, |
| 3389 | PSWAPDrr = 3374, |
| 3390 | PTCMMIMFP16PS = 3375, |
| 3391 | PTCMMIMFP16PSV = 3376, |
| 3392 | PTCMMRLFP16PS = 3377, |
| 3393 | PTCMMRLFP16PSV = 3378, |
| 3394 | PTDPBF16PS = 3379, |
| 3395 | PTDPBSSD = 3380, |
| 3396 | PTDPBSUD = 3381, |
| 3397 | PTDPBUSD = 3382, |
| 3398 | PTDPBUUD = 3383, |
| 3399 | PTDPFP16PS = 3384, |
| 3400 | PTESTrm = 3385, |
| 3401 | PTESTrr = 3386, |
| 3402 | PTILELOADD = 3387, |
| 3403 | PTILELOADDT1 = 3388, |
| 3404 | PTILESTORED = 3389, |
| 3405 | PTILEZERO = 3390, |
| 3406 | PTWRITE64m = 3391, |
| 3407 | PTWRITE64r = 3392, |
| 3408 | PTWRITEm = 3393, |
| 3409 | PTWRITEr = 3394, |
| 3410 | PUNPCKHBWrm = 3395, |
| 3411 | PUNPCKHBWrr = 3396, |
| 3412 | PUNPCKHDQrm = 3397, |
| 3413 | PUNPCKHDQrr = 3398, |
| 3414 | PUNPCKHQDQrm = 3399, |
| 3415 | PUNPCKHQDQrr = 3400, |
| 3416 | PUNPCKHWDrm = 3401, |
| 3417 | PUNPCKHWDrr = 3402, |
| 3418 | PUNPCKLBWrm = 3403, |
| 3419 | PUNPCKLBWrr = 3404, |
| 3420 | PUNPCKLDQrm = 3405, |
| 3421 | PUNPCKLDQrr = 3406, |
| 3422 | PUNPCKLQDQrm = 3407, |
| 3423 | PUNPCKLQDQrr = 3408, |
| 3424 | PUNPCKLWDrm = 3409, |
| 3425 | PUNPCKLWDrr = 3410, |
| 3426 | PUSH16i = 3411, |
| 3427 | PUSH16i8 = 3412, |
| 3428 | PUSH16r = 3413, |
| 3429 | PUSH16rmm = 3414, |
| 3430 | PUSH16rmr = 3415, |
| 3431 | PUSH2 = 3416, |
| 3432 | PUSH2P = 3417, |
| 3433 | PUSH32i = 3418, |
| 3434 | PUSH32i8 = 3419, |
| 3435 | PUSH32r = 3420, |
| 3436 | PUSH32rmm = 3421, |
| 3437 | PUSH32rmr = 3422, |
| 3438 | PUSH64i32 = 3423, |
| 3439 | PUSH64i8 = 3424, |
| 3440 | PUSH64r = 3425, |
| 3441 | PUSH64rmm = 3426, |
| 3442 | PUSH64rmr = 3427, |
| 3443 | PUSHA16 = 3428, |
| 3444 | PUSHA32 = 3429, |
| 3445 | PUSHCS16 = 3430, |
| 3446 | PUSHCS32 = 3431, |
| 3447 | PUSHDS16 = 3432, |
| 3448 | PUSHDS32 = 3433, |
| 3449 | PUSHES16 = 3434, |
| 3450 | PUSHES32 = 3435, |
| 3451 | PUSHF16 = 3436, |
| 3452 | PUSHF32 = 3437, |
| 3453 | PUSHF64 = 3438, |
| 3454 | PUSHFS16 = 3439, |
| 3455 | PUSHFS32 = 3440, |
| 3456 | PUSHFS64 = 3441, |
| 3457 | PUSHGS16 = 3442, |
| 3458 | PUSHGS32 = 3443, |
| 3459 | PUSHGS64 = 3444, |
| 3460 | PUSHP64r = 3445, |
| 3461 | PUSHSS16 = 3446, |
| 3462 | PUSHSS32 = 3447, |
| 3463 | PVALIDATE32 = 3448, |
| 3464 | PVALIDATE64 = 3449, |
| 3465 | PXORrm = 3450, |
| 3466 | PXORrr = 3451, |
| 3467 | RCL16m1 = 3452, |
| 3468 | RCL16m1_EVEX = 3453, |
| 3469 | RCL16m1_ND = 3454, |
| 3470 | RCL16mCL = 3455, |
| 3471 | RCL16mCL_EVEX = 3456, |
| 3472 | RCL16mCL_ND = 3457, |
| 3473 | RCL16mi = 3458, |
| 3474 | RCL16mi_EVEX = 3459, |
| 3475 | RCL16mi_ND = 3460, |
| 3476 | RCL16r1 = 3461, |
| 3477 | RCL16r1_EVEX = 3462, |
| 3478 | RCL16r1_ND = 3463, |
| 3479 | RCL16rCL = 3464, |
| 3480 | RCL16rCL_EVEX = 3465, |
| 3481 | RCL16rCL_ND = 3466, |
| 3482 | RCL16ri = 3467, |
| 3483 | RCL16ri_EVEX = 3468, |
| 3484 | RCL16ri_ND = 3469, |
| 3485 | RCL32m1 = 3470, |
| 3486 | RCL32m1_EVEX = 3471, |
| 3487 | RCL32m1_ND = 3472, |
| 3488 | RCL32mCL = 3473, |
| 3489 | RCL32mCL_EVEX = 3474, |
| 3490 | RCL32mCL_ND = 3475, |
| 3491 | RCL32mi = 3476, |
| 3492 | RCL32mi_EVEX = 3477, |
| 3493 | RCL32mi_ND = 3478, |
| 3494 | RCL32r1 = 3479, |
| 3495 | RCL32r1_EVEX = 3480, |
| 3496 | RCL32r1_ND = 3481, |
| 3497 | RCL32rCL = 3482, |
| 3498 | RCL32rCL_EVEX = 3483, |
| 3499 | RCL32rCL_ND = 3484, |
| 3500 | RCL32ri = 3485, |
| 3501 | RCL32ri_EVEX = 3486, |
| 3502 | RCL32ri_ND = 3487, |
| 3503 | RCL64m1 = 3488, |
| 3504 | RCL64m1_EVEX = 3489, |
| 3505 | RCL64m1_ND = 3490, |
| 3506 | RCL64mCL = 3491, |
| 3507 | RCL64mCL_EVEX = 3492, |
| 3508 | RCL64mCL_ND = 3493, |
| 3509 | RCL64mi = 3494, |
| 3510 | RCL64mi_EVEX = 3495, |
| 3511 | RCL64mi_ND = 3496, |
| 3512 | RCL64r1 = 3497, |
| 3513 | RCL64r1_EVEX = 3498, |
| 3514 | RCL64r1_ND = 3499, |
| 3515 | RCL64rCL = 3500, |
| 3516 | RCL64rCL_EVEX = 3501, |
| 3517 | RCL64rCL_ND = 3502, |
| 3518 | RCL64ri = 3503, |
| 3519 | RCL64ri_EVEX = 3504, |
| 3520 | RCL64ri_ND = 3505, |
| 3521 | RCL8m1 = 3506, |
| 3522 | RCL8m1_EVEX = 3507, |
| 3523 | RCL8m1_ND = 3508, |
| 3524 | RCL8mCL = 3509, |
| 3525 | RCL8mCL_EVEX = 3510, |
| 3526 | RCL8mCL_ND = 3511, |
| 3527 | RCL8mi = 3512, |
| 3528 | RCL8mi_EVEX = 3513, |
| 3529 | RCL8mi_ND = 3514, |
| 3530 | RCL8r1 = 3515, |
| 3531 | RCL8r1_EVEX = 3516, |
| 3532 | RCL8r1_ND = 3517, |
| 3533 | RCL8rCL = 3518, |
| 3534 | RCL8rCL_EVEX = 3519, |
| 3535 | RCL8rCL_ND = 3520, |
| 3536 | RCL8ri = 3521, |
| 3537 | RCL8ri_EVEX = 3522, |
| 3538 | RCL8ri_ND = 3523, |
| 3539 | RCPPSm = 3524, |
| 3540 | RCPPSr = 3525, |
| 3541 | RCPSSm = 3526, |
| 3542 | RCPSSm_Int = 3527, |
| 3543 | RCPSSr = 3528, |
| 3544 | RCPSSr_Int = 3529, |
| 3545 | RCR16m1 = 3530, |
| 3546 | RCR16m1_EVEX = 3531, |
| 3547 | RCR16m1_ND = 3532, |
| 3548 | RCR16mCL = 3533, |
| 3549 | RCR16mCL_EVEX = 3534, |
| 3550 | RCR16mCL_ND = 3535, |
| 3551 | RCR16mi = 3536, |
| 3552 | RCR16mi_EVEX = 3537, |
| 3553 | RCR16mi_ND = 3538, |
| 3554 | RCR16r1 = 3539, |
| 3555 | RCR16r1_EVEX = 3540, |
| 3556 | RCR16r1_ND = 3541, |
| 3557 | RCR16rCL = 3542, |
| 3558 | RCR16rCL_EVEX = 3543, |
| 3559 | RCR16rCL_ND = 3544, |
| 3560 | RCR16ri = 3545, |
| 3561 | RCR16ri_EVEX = 3546, |
| 3562 | RCR16ri_ND = 3547, |
| 3563 | RCR32m1 = 3548, |
| 3564 | RCR32m1_EVEX = 3549, |
| 3565 | RCR32m1_ND = 3550, |
| 3566 | RCR32mCL = 3551, |
| 3567 | RCR32mCL_EVEX = 3552, |
| 3568 | RCR32mCL_ND = 3553, |
| 3569 | RCR32mi = 3554, |
| 3570 | RCR32mi_EVEX = 3555, |
| 3571 | RCR32mi_ND = 3556, |
| 3572 | RCR32r1 = 3557, |
| 3573 | RCR32r1_EVEX = 3558, |
| 3574 | RCR32r1_ND = 3559, |
| 3575 | RCR32rCL = 3560, |
| 3576 | RCR32rCL_EVEX = 3561, |
| 3577 | RCR32rCL_ND = 3562, |
| 3578 | RCR32ri = 3563, |
| 3579 | RCR32ri_EVEX = 3564, |
| 3580 | RCR32ri_ND = 3565, |
| 3581 | RCR64m1 = 3566, |
| 3582 | RCR64m1_EVEX = 3567, |
| 3583 | RCR64m1_ND = 3568, |
| 3584 | RCR64mCL = 3569, |
| 3585 | RCR64mCL_EVEX = 3570, |
| 3586 | RCR64mCL_ND = 3571, |
| 3587 | RCR64mi = 3572, |
| 3588 | RCR64mi_EVEX = 3573, |
| 3589 | RCR64mi_ND = 3574, |
| 3590 | RCR64r1 = 3575, |
| 3591 | RCR64r1_EVEX = 3576, |
| 3592 | RCR64r1_ND = 3577, |
| 3593 | RCR64rCL = 3578, |
| 3594 | RCR64rCL_EVEX = 3579, |
| 3595 | RCR64rCL_ND = 3580, |
| 3596 | RCR64ri = 3581, |
| 3597 | RCR64ri_EVEX = 3582, |
| 3598 | RCR64ri_ND = 3583, |
| 3599 | RCR8m1 = 3584, |
| 3600 | RCR8m1_EVEX = 3585, |
| 3601 | RCR8m1_ND = 3586, |
| 3602 | RCR8mCL = 3587, |
| 3603 | RCR8mCL_EVEX = 3588, |
| 3604 | RCR8mCL_ND = 3589, |
| 3605 | RCR8mi = 3590, |
| 3606 | RCR8mi_EVEX = 3591, |
| 3607 | RCR8mi_ND = 3592, |
| 3608 | RCR8r1 = 3593, |
| 3609 | RCR8r1_EVEX = 3594, |
| 3610 | RCR8r1_ND = 3595, |
| 3611 | RCR8rCL = 3596, |
| 3612 | RCR8rCL_EVEX = 3597, |
| 3613 | RCR8rCL_ND = 3598, |
| 3614 | RCR8ri = 3599, |
| 3615 | RCR8ri_EVEX = 3600, |
| 3616 | RCR8ri_ND = 3601, |
| 3617 | RDFSBASE = 3602, |
| 3618 | RDFSBASE64 = 3603, |
| 3619 | RDGSBASE = 3604, |
| 3620 | RDGSBASE64 = 3605, |
| 3621 | RDMSR = 3606, |
| 3622 | RDMSRLIST = 3607, |
| 3623 | RDPID32 = 3608, |
| 3624 | RDPID64 = 3609, |
| 3625 | RDPKRUr = 3610, |
| 3626 | RDPMC = 3611, |
| 3627 | RDPRU = 3612, |
| 3628 | RDRAND16r = 3613, |
| 3629 | RDRAND32r = 3614, |
| 3630 | RDRAND64r = 3615, |
| 3631 | RDSEED16r = 3616, |
| 3632 | RDSEED32r = 3617, |
| 3633 | RDSEED64r = 3618, |
| 3634 | RDSSPD = 3619, |
| 3635 | RDSSPQ = 3620, |
| 3636 | RDTSC = 3621, |
| 3637 | RDTSCP = 3622, |
| 3638 | REPNE_PREFIX = 3623, |
| 3639 | REP_MOVSB_32 = 3624, |
| 3640 | REP_MOVSB_64 = 3625, |
| 3641 | REP_MOVSD_32 = 3626, |
| 3642 | REP_MOVSD_64 = 3627, |
| 3643 | REP_MOVSQ_32 = 3628, |
| 3644 | REP_MOVSQ_64 = 3629, |
| 3645 | REP_MOVSW_32 = 3630, |
| 3646 | REP_MOVSW_64 = 3631, |
| 3647 | REP_PREFIX = 3632, |
| 3648 | REP_STOSB_32 = 3633, |
| 3649 | REP_STOSB_64 = 3634, |
| 3650 | REP_STOSD_32 = 3635, |
| 3651 | REP_STOSD_64 = 3636, |
| 3652 | REP_STOSQ_32 = 3637, |
| 3653 | REP_STOSQ_64 = 3638, |
| 3654 | REP_STOSW_32 = 3639, |
| 3655 | REP_STOSW_64 = 3640, |
| 3656 | RET = 3641, |
| 3657 | RET16 = 3642, |
| 3658 | RET32 = 3643, |
| 3659 | RET64 = 3644, |
| 3660 | RETI16 = 3645, |
| 3661 | RETI32 = 3646, |
| 3662 | RETI64 = 3647, |
| 3663 | REX64_PREFIX = 3648, |
| 3664 | RMPADJUST = 3649, |
| 3665 | RMPQUERY = 3650, |
| 3666 | RMPUPDATE = 3651, |
| 3667 | ROL16m1 = 3652, |
| 3668 | ROL16m1_EVEX = 3653, |
| 3669 | ROL16m1_ND = 3654, |
| 3670 | ROL16m1_NF = 3655, |
| 3671 | ROL16m1_NF_ND = 3656, |
| 3672 | ROL16mCL = 3657, |
| 3673 | ROL16mCL_EVEX = 3658, |
| 3674 | ROL16mCL_ND = 3659, |
| 3675 | ROL16mCL_NF = 3660, |
| 3676 | ROL16mCL_NF_ND = 3661, |
| 3677 | ROL16mi = 3662, |
| 3678 | ROL16mi_EVEX = 3663, |
| 3679 | ROL16mi_ND = 3664, |
| 3680 | ROL16mi_NF = 3665, |
| 3681 | ROL16mi_NF_ND = 3666, |
| 3682 | ROL16r1 = 3667, |
| 3683 | ROL16r1_EVEX = 3668, |
| 3684 | ROL16r1_ND = 3669, |
| 3685 | ROL16r1_NF = 3670, |
| 3686 | ROL16r1_NF_ND = 3671, |
| 3687 | ROL16rCL = 3672, |
| 3688 | ROL16rCL_EVEX = 3673, |
| 3689 | ROL16rCL_ND = 3674, |
| 3690 | ROL16rCL_NF = 3675, |
| 3691 | ROL16rCL_NF_ND = 3676, |
| 3692 | ROL16ri = 3677, |
| 3693 | ROL16ri_EVEX = 3678, |
| 3694 | ROL16ri_ND = 3679, |
| 3695 | ROL16ri_NF = 3680, |
| 3696 | ROL16ri_NF_ND = 3681, |
| 3697 | ROL32m1 = 3682, |
| 3698 | ROL32m1_EVEX = 3683, |
| 3699 | ROL32m1_ND = 3684, |
| 3700 | ROL32m1_NF = 3685, |
| 3701 | ROL32m1_NF_ND = 3686, |
| 3702 | ROL32mCL = 3687, |
| 3703 | ROL32mCL_EVEX = 3688, |
| 3704 | ROL32mCL_ND = 3689, |
| 3705 | ROL32mCL_NF = 3690, |
| 3706 | ROL32mCL_NF_ND = 3691, |
| 3707 | ROL32mi = 3692, |
| 3708 | ROL32mi_EVEX = 3693, |
| 3709 | ROL32mi_ND = 3694, |
| 3710 | ROL32mi_NF = 3695, |
| 3711 | ROL32mi_NF_ND = 3696, |
| 3712 | ROL32r1 = 3697, |
| 3713 | ROL32r1_EVEX = 3698, |
| 3714 | ROL32r1_ND = 3699, |
| 3715 | ROL32r1_NF = 3700, |
| 3716 | ROL32r1_NF_ND = 3701, |
| 3717 | ROL32rCL = 3702, |
| 3718 | ROL32rCL_EVEX = 3703, |
| 3719 | ROL32rCL_ND = 3704, |
| 3720 | ROL32rCL_NF = 3705, |
| 3721 | ROL32rCL_NF_ND = 3706, |
| 3722 | ROL32ri = 3707, |
| 3723 | ROL32ri_EVEX = 3708, |
| 3724 | ROL32ri_ND = 3709, |
| 3725 | ROL32ri_NF = 3710, |
| 3726 | ROL32ri_NF_ND = 3711, |
| 3727 | ROL64m1 = 3712, |
| 3728 | ROL64m1_EVEX = 3713, |
| 3729 | ROL64m1_ND = 3714, |
| 3730 | ROL64m1_NF = 3715, |
| 3731 | ROL64m1_NF_ND = 3716, |
| 3732 | ROL64mCL = 3717, |
| 3733 | ROL64mCL_EVEX = 3718, |
| 3734 | ROL64mCL_ND = 3719, |
| 3735 | ROL64mCL_NF = 3720, |
| 3736 | ROL64mCL_NF_ND = 3721, |
| 3737 | ROL64mi = 3722, |
| 3738 | ROL64mi_EVEX = 3723, |
| 3739 | ROL64mi_ND = 3724, |
| 3740 | ROL64mi_NF = 3725, |
| 3741 | ROL64mi_NF_ND = 3726, |
| 3742 | ROL64r1 = 3727, |
| 3743 | ROL64r1_EVEX = 3728, |
| 3744 | ROL64r1_ND = 3729, |
| 3745 | ROL64r1_NF = 3730, |
| 3746 | ROL64r1_NF_ND = 3731, |
| 3747 | ROL64rCL = 3732, |
| 3748 | ROL64rCL_EVEX = 3733, |
| 3749 | ROL64rCL_ND = 3734, |
| 3750 | ROL64rCL_NF = 3735, |
| 3751 | ROL64rCL_NF_ND = 3736, |
| 3752 | ROL64ri = 3737, |
| 3753 | ROL64ri_EVEX = 3738, |
| 3754 | ROL64ri_ND = 3739, |
| 3755 | ROL64ri_NF = 3740, |
| 3756 | ROL64ri_NF_ND = 3741, |
| 3757 | ROL8m1 = 3742, |
| 3758 | ROL8m1_EVEX = 3743, |
| 3759 | ROL8m1_ND = 3744, |
| 3760 | ROL8m1_NF = 3745, |
| 3761 | ROL8m1_NF_ND = 3746, |
| 3762 | ROL8mCL = 3747, |
| 3763 | ROL8mCL_EVEX = 3748, |
| 3764 | ROL8mCL_ND = 3749, |
| 3765 | ROL8mCL_NF = 3750, |
| 3766 | ROL8mCL_NF_ND = 3751, |
| 3767 | ROL8mi = 3752, |
| 3768 | ROL8mi_EVEX = 3753, |
| 3769 | ROL8mi_ND = 3754, |
| 3770 | ROL8mi_NF = 3755, |
| 3771 | ROL8mi_NF_ND = 3756, |
| 3772 | ROL8r1 = 3757, |
| 3773 | ROL8r1_EVEX = 3758, |
| 3774 | ROL8r1_ND = 3759, |
| 3775 | ROL8r1_NF = 3760, |
| 3776 | ROL8r1_NF_ND = 3761, |
| 3777 | ROL8rCL = 3762, |
| 3778 | ROL8rCL_EVEX = 3763, |
| 3779 | ROL8rCL_ND = 3764, |
| 3780 | ROL8rCL_NF = 3765, |
| 3781 | ROL8rCL_NF_ND = 3766, |
| 3782 | ROL8ri = 3767, |
| 3783 | ROL8ri_EVEX = 3768, |
| 3784 | ROL8ri_ND = 3769, |
| 3785 | ROL8ri_NF = 3770, |
| 3786 | ROL8ri_NF_ND = 3771, |
| 3787 | ROR16m1 = 3772, |
| 3788 | ROR16m1_EVEX = 3773, |
| 3789 | ROR16m1_ND = 3774, |
| 3790 | ROR16m1_NF = 3775, |
| 3791 | ROR16m1_NF_ND = 3776, |
| 3792 | ROR16mCL = 3777, |
| 3793 | ROR16mCL_EVEX = 3778, |
| 3794 | ROR16mCL_ND = 3779, |
| 3795 | ROR16mCL_NF = 3780, |
| 3796 | ROR16mCL_NF_ND = 3781, |
| 3797 | ROR16mi = 3782, |
| 3798 | ROR16mi_EVEX = 3783, |
| 3799 | ROR16mi_ND = 3784, |
| 3800 | ROR16mi_NF = 3785, |
| 3801 | ROR16mi_NF_ND = 3786, |
| 3802 | ROR16r1 = 3787, |
| 3803 | ROR16r1_EVEX = 3788, |
| 3804 | ROR16r1_ND = 3789, |
| 3805 | ROR16r1_NF = 3790, |
| 3806 | ROR16r1_NF_ND = 3791, |
| 3807 | ROR16rCL = 3792, |
| 3808 | ROR16rCL_EVEX = 3793, |
| 3809 | ROR16rCL_ND = 3794, |
| 3810 | ROR16rCL_NF = 3795, |
| 3811 | ROR16rCL_NF_ND = 3796, |
| 3812 | ROR16ri = 3797, |
| 3813 | ROR16ri_EVEX = 3798, |
| 3814 | ROR16ri_ND = 3799, |
| 3815 | ROR16ri_NF = 3800, |
| 3816 | ROR16ri_NF_ND = 3801, |
| 3817 | ROR32m1 = 3802, |
| 3818 | ROR32m1_EVEX = 3803, |
| 3819 | ROR32m1_ND = 3804, |
| 3820 | ROR32m1_NF = 3805, |
| 3821 | ROR32m1_NF_ND = 3806, |
| 3822 | ROR32mCL = 3807, |
| 3823 | ROR32mCL_EVEX = 3808, |
| 3824 | ROR32mCL_ND = 3809, |
| 3825 | ROR32mCL_NF = 3810, |
| 3826 | ROR32mCL_NF_ND = 3811, |
| 3827 | ROR32mi = 3812, |
| 3828 | ROR32mi_EVEX = 3813, |
| 3829 | ROR32mi_ND = 3814, |
| 3830 | ROR32mi_NF = 3815, |
| 3831 | ROR32mi_NF_ND = 3816, |
| 3832 | ROR32r1 = 3817, |
| 3833 | ROR32r1_EVEX = 3818, |
| 3834 | ROR32r1_ND = 3819, |
| 3835 | ROR32r1_NF = 3820, |
| 3836 | ROR32r1_NF_ND = 3821, |
| 3837 | ROR32rCL = 3822, |
| 3838 | ROR32rCL_EVEX = 3823, |
| 3839 | ROR32rCL_ND = 3824, |
| 3840 | ROR32rCL_NF = 3825, |
| 3841 | ROR32rCL_NF_ND = 3826, |
| 3842 | ROR32ri = 3827, |
| 3843 | ROR32ri_EVEX = 3828, |
| 3844 | ROR32ri_ND = 3829, |
| 3845 | ROR32ri_NF = 3830, |
| 3846 | ROR32ri_NF_ND = 3831, |
| 3847 | ROR64m1 = 3832, |
| 3848 | ROR64m1_EVEX = 3833, |
| 3849 | ROR64m1_ND = 3834, |
| 3850 | ROR64m1_NF = 3835, |
| 3851 | ROR64m1_NF_ND = 3836, |
| 3852 | ROR64mCL = 3837, |
| 3853 | ROR64mCL_EVEX = 3838, |
| 3854 | ROR64mCL_ND = 3839, |
| 3855 | ROR64mCL_NF = 3840, |
| 3856 | ROR64mCL_NF_ND = 3841, |
| 3857 | ROR64mi = 3842, |
| 3858 | ROR64mi_EVEX = 3843, |
| 3859 | ROR64mi_ND = 3844, |
| 3860 | ROR64mi_NF = 3845, |
| 3861 | ROR64mi_NF_ND = 3846, |
| 3862 | ROR64r1 = 3847, |
| 3863 | ROR64r1_EVEX = 3848, |
| 3864 | ROR64r1_ND = 3849, |
| 3865 | ROR64r1_NF = 3850, |
| 3866 | ROR64r1_NF_ND = 3851, |
| 3867 | ROR64rCL = 3852, |
| 3868 | ROR64rCL_EVEX = 3853, |
| 3869 | ROR64rCL_ND = 3854, |
| 3870 | ROR64rCL_NF = 3855, |
| 3871 | ROR64rCL_NF_ND = 3856, |
| 3872 | ROR64ri = 3857, |
| 3873 | ROR64ri_EVEX = 3858, |
| 3874 | ROR64ri_ND = 3859, |
| 3875 | ROR64ri_NF = 3860, |
| 3876 | ROR64ri_NF_ND = 3861, |
| 3877 | ROR8m1 = 3862, |
| 3878 | ROR8m1_EVEX = 3863, |
| 3879 | ROR8m1_ND = 3864, |
| 3880 | ROR8m1_NF = 3865, |
| 3881 | ROR8m1_NF_ND = 3866, |
| 3882 | ROR8mCL = 3867, |
| 3883 | ROR8mCL_EVEX = 3868, |
| 3884 | ROR8mCL_ND = 3869, |
| 3885 | ROR8mCL_NF = 3870, |
| 3886 | ROR8mCL_NF_ND = 3871, |
| 3887 | ROR8mi = 3872, |
| 3888 | ROR8mi_EVEX = 3873, |
| 3889 | ROR8mi_ND = 3874, |
| 3890 | ROR8mi_NF = 3875, |
| 3891 | ROR8mi_NF_ND = 3876, |
| 3892 | ROR8r1 = 3877, |
| 3893 | ROR8r1_EVEX = 3878, |
| 3894 | ROR8r1_ND = 3879, |
| 3895 | ROR8r1_NF = 3880, |
| 3896 | ROR8r1_NF_ND = 3881, |
| 3897 | ROR8rCL = 3882, |
| 3898 | ROR8rCL_EVEX = 3883, |
| 3899 | ROR8rCL_ND = 3884, |
| 3900 | ROR8rCL_NF = 3885, |
| 3901 | ROR8rCL_NF_ND = 3886, |
| 3902 | ROR8ri = 3887, |
| 3903 | ROR8ri_EVEX = 3888, |
| 3904 | ROR8ri_ND = 3889, |
| 3905 | ROR8ri_NF = 3890, |
| 3906 | ROR8ri_NF_ND = 3891, |
| 3907 | RORX32mi = 3892, |
| 3908 | RORX32mi_EVEX = 3893, |
| 3909 | RORX32ri = 3894, |
| 3910 | RORX32ri_EVEX = 3895, |
| 3911 | RORX64mi = 3896, |
| 3912 | RORX64mi_EVEX = 3897, |
| 3913 | RORX64ri = 3898, |
| 3914 | RORX64ri_EVEX = 3899, |
| 3915 | ROUNDPDmi = 3900, |
| 3916 | ROUNDPDri = 3901, |
| 3917 | ROUNDPSmi = 3902, |
| 3918 | ROUNDPSri = 3903, |
| 3919 | ROUNDSDmi = 3904, |
| 3920 | ROUNDSDmi_Int = 3905, |
| 3921 | ROUNDSDri = 3906, |
| 3922 | ROUNDSDri_Int = 3907, |
| 3923 | ROUNDSSmi = 3908, |
| 3924 | ROUNDSSmi_Int = 3909, |
| 3925 | ROUNDSSri = 3910, |
| 3926 | ROUNDSSri_Int = 3911, |
| 3927 | RSM = 3912, |
| 3928 | RSQRTPSm = 3913, |
| 3929 | RSQRTPSr = 3914, |
| 3930 | RSQRTSSm = 3915, |
| 3931 | RSQRTSSm_Int = 3916, |
| 3932 | RSQRTSSr = 3917, |
| 3933 | RSQRTSSr_Int = 3918, |
| 3934 | RSTORSSP = 3919, |
| 3935 | SAHF = 3920, |
| 3936 | SALC = 3921, |
| 3937 | SAR16m1 = 3922, |
| 3938 | SAR16m1_EVEX = 3923, |
| 3939 | SAR16m1_ND = 3924, |
| 3940 | SAR16m1_NF = 3925, |
| 3941 | SAR16m1_NF_ND = 3926, |
| 3942 | SAR16mCL = 3927, |
| 3943 | SAR16mCL_EVEX = 3928, |
| 3944 | SAR16mCL_ND = 3929, |
| 3945 | SAR16mCL_NF = 3930, |
| 3946 | SAR16mCL_NF_ND = 3931, |
| 3947 | SAR16mi = 3932, |
| 3948 | SAR16mi_EVEX = 3933, |
| 3949 | SAR16mi_ND = 3934, |
| 3950 | SAR16mi_NF = 3935, |
| 3951 | SAR16mi_NF_ND = 3936, |
| 3952 | SAR16r1 = 3937, |
| 3953 | SAR16r1_EVEX = 3938, |
| 3954 | SAR16r1_ND = 3939, |
| 3955 | SAR16r1_NF = 3940, |
| 3956 | SAR16r1_NF_ND = 3941, |
| 3957 | SAR16rCL = 3942, |
| 3958 | SAR16rCL_EVEX = 3943, |
| 3959 | SAR16rCL_ND = 3944, |
| 3960 | SAR16rCL_NF = 3945, |
| 3961 | SAR16rCL_NF_ND = 3946, |
| 3962 | SAR16ri = 3947, |
| 3963 | SAR16ri_EVEX = 3948, |
| 3964 | SAR16ri_ND = 3949, |
| 3965 | SAR16ri_NF = 3950, |
| 3966 | SAR16ri_NF_ND = 3951, |
| 3967 | SAR32m1 = 3952, |
| 3968 | SAR32m1_EVEX = 3953, |
| 3969 | SAR32m1_ND = 3954, |
| 3970 | SAR32m1_NF = 3955, |
| 3971 | SAR32m1_NF_ND = 3956, |
| 3972 | SAR32mCL = 3957, |
| 3973 | SAR32mCL_EVEX = 3958, |
| 3974 | SAR32mCL_ND = 3959, |
| 3975 | SAR32mCL_NF = 3960, |
| 3976 | SAR32mCL_NF_ND = 3961, |
| 3977 | SAR32mi = 3962, |
| 3978 | SAR32mi_EVEX = 3963, |
| 3979 | SAR32mi_ND = 3964, |
| 3980 | SAR32mi_NF = 3965, |
| 3981 | SAR32mi_NF_ND = 3966, |
| 3982 | SAR32r1 = 3967, |
| 3983 | SAR32r1_EVEX = 3968, |
| 3984 | SAR32r1_ND = 3969, |
| 3985 | SAR32r1_NF = 3970, |
| 3986 | SAR32r1_NF_ND = 3971, |
| 3987 | SAR32rCL = 3972, |
| 3988 | SAR32rCL_EVEX = 3973, |
| 3989 | SAR32rCL_ND = 3974, |
| 3990 | SAR32rCL_NF = 3975, |
| 3991 | SAR32rCL_NF_ND = 3976, |
| 3992 | SAR32ri = 3977, |
| 3993 | SAR32ri_EVEX = 3978, |
| 3994 | SAR32ri_ND = 3979, |
| 3995 | SAR32ri_NF = 3980, |
| 3996 | SAR32ri_NF_ND = 3981, |
| 3997 | SAR64m1 = 3982, |
| 3998 | SAR64m1_EVEX = 3983, |
| 3999 | SAR64m1_ND = 3984, |
| 4000 | SAR64m1_NF = 3985, |
| 4001 | SAR64m1_NF_ND = 3986, |
| 4002 | SAR64mCL = 3987, |
| 4003 | SAR64mCL_EVEX = 3988, |
| 4004 | SAR64mCL_ND = 3989, |
| 4005 | SAR64mCL_NF = 3990, |
| 4006 | SAR64mCL_NF_ND = 3991, |
| 4007 | SAR64mi = 3992, |
| 4008 | SAR64mi_EVEX = 3993, |
| 4009 | SAR64mi_ND = 3994, |
| 4010 | SAR64mi_NF = 3995, |
| 4011 | SAR64mi_NF_ND = 3996, |
| 4012 | SAR64r1 = 3997, |
| 4013 | SAR64r1_EVEX = 3998, |
| 4014 | SAR64r1_ND = 3999, |
| 4015 | SAR64r1_NF = 4000, |
| 4016 | SAR64r1_NF_ND = 4001, |
| 4017 | SAR64rCL = 4002, |
| 4018 | SAR64rCL_EVEX = 4003, |
| 4019 | SAR64rCL_ND = 4004, |
| 4020 | SAR64rCL_NF = 4005, |
| 4021 | SAR64rCL_NF_ND = 4006, |
| 4022 | SAR64ri = 4007, |
| 4023 | SAR64ri_EVEX = 4008, |
| 4024 | SAR64ri_ND = 4009, |
| 4025 | SAR64ri_NF = 4010, |
| 4026 | SAR64ri_NF_ND = 4011, |
| 4027 | SAR8m1 = 4012, |
| 4028 | SAR8m1_EVEX = 4013, |
| 4029 | SAR8m1_ND = 4014, |
| 4030 | SAR8m1_NF = 4015, |
| 4031 | SAR8m1_NF_ND = 4016, |
| 4032 | SAR8mCL = 4017, |
| 4033 | SAR8mCL_EVEX = 4018, |
| 4034 | SAR8mCL_ND = 4019, |
| 4035 | SAR8mCL_NF = 4020, |
| 4036 | SAR8mCL_NF_ND = 4021, |
| 4037 | SAR8mi = 4022, |
| 4038 | SAR8mi_EVEX = 4023, |
| 4039 | SAR8mi_ND = 4024, |
| 4040 | SAR8mi_NF = 4025, |
| 4041 | SAR8mi_NF_ND = 4026, |
| 4042 | SAR8r1 = 4027, |
| 4043 | SAR8r1_EVEX = 4028, |
| 4044 | SAR8r1_ND = 4029, |
| 4045 | SAR8r1_NF = 4030, |
| 4046 | SAR8r1_NF_ND = 4031, |
| 4047 | SAR8rCL = 4032, |
| 4048 | SAR8rCL_EVEX = 4033, |
| 4049 | SAR8rCL_ND = 4034, |
| 4050 | SAR8rCL_NF = 4035, |
| 4051 | SAR8rCL_NF_ND = 4036, |
| 4052 | SAR8ri = 4037, |
| 4053 | SAR8ri_EVEX = 4038, |
| 4054 | SAR8ri_ND = 4039, |
| 4055 | SAR8ri_NF = 4040, |
| 4056 | SAR8ri_NF_ND = 4041, |
| 4057 | SARX32rm = 4042, |
| 4058 | SARX32rm_EVEX = 4043, |
| 4059 | SARX32rr = 4044, |
| 4060 | SARX32rr_EVEX = 4045, |
| 4061 | SARX64rm = 4046, |
| 4062 | SARX64rm_EVEX = 4047, |
| 4063 | SARX64rr = 4048, |
| 4064 | SARX64rr_EVEX = 4049, |
| 4065 | SAVEPREVSSP = 4050, |
| 4066 | SBB16i16 = 4051, |
| 4067 | SBB16mi = 4052, |
| 4068 | SBB16mi8 = 4053, |
| 4069 | SBB16mi8_EVEX = 4054, |
| 4070 | SBB16mi8_ND = 4055, |
| 4071 | SBB16mi_EVEX = 4056, |
| 4072 | SBB16mi_ND = 4057, |
| 4073 | SBB16mr = 4058, |
| 4074 | SBB16mr_EVEX = 4059, |
| 4075 | SBB16mr_ND = 4060, |
| 4076 | SBB16ri = 4061, |
| 4077 | SBB16ri8 = 4062, |
| 4078 | SBB16ri8_EVEX = 4063, |
| 4079 | SBB16ri8_ND = 4064, |
| 4080 | SBB16ri_EVEX = 4065, |
| 4081 | SBB16ri_ND = 4066, |
| 4082 | SBB16rm = 4067, |
| 4083 | SBB16rm_EVEX = 4068, |
| 4084 | SBB16rm_ND = 4069, |
| 4085 | SBB16rr = 4070, |
| 4086 | SBB16rr_EVEX = 4071, |
| 4087 | SBB16rr_EVEX_REV = 4072, |
| 4088 | SBB16rr_ND = 4073, |
| 4089 | SBB16rr_ND_REV = 4074, |
| 4090 | SBB16rr_REV = 4075, |
| 4091 | SBB32i32 = 4076, |
| 4092 | SBB32mi = 4077, |
| 4093 | SBB32mi8 = 4078, |
| 4094 | SBB32mi8_EVEX = 4079, |
| 4095 | SBB32mi8_ND = 4080, |
| 4096 | SBB32mi_EVEX = 4081, |
| 4097 | SBB32mi_ND = 4082, |
| 4098 | SBB32mr = 4083, |
| 4099 | SBB32mr_EVEX = 4084, |
| 4100 | SBB32mr_ND = 4085, |
| 4101 | SBB32ri = 4086, |
| 4102 | SBB32ri8 = 4087, |
| 4103 | SBB32ri8_EVEX = 4088, |
| 4104 | SBB32ri8_ND = 4089, |
| 4105 | SBB32ri_EVEX = 4090, |
| 4106 | SBB32ri_ND = 4091, |
| 4107 | SBB32rm = 4092, |
| 4108 | SBB32rm_EVEX = 4093, |
| 4109 | SBB32rm_ND = 4094, |
| 4110 | SBB32rr = 4095, |
| 4111 | SBB32rr_EVEX = 4096, |
| 4112 | SBB32rr_EVEX_REV = 4097, |
| 4113 | SBB32rr_ND = 4098, |
| 4114 | SBB32rr_ND_REV = 4099, |
| 4115 | SBB32rr_REV = 4100, |
| 4116 | SBB64i32 = 4101, |
| 4117 | SBB64mi32 = 4102, |
| 4118 | SBB64mi32_EVEX = 4103, |
| 4119 | SBB64mi32_ND = 4104, |
| 4120 | SBB64mi8 = 4105, |
| 4121 | SBB64mi8_EVEX = 4106, |
| 4122 | SBB64mi8_ND = 4107, |
| 4123 | SBB64mr = 4108, |
| 4124 | SBB64mr_EVEX = 4109, |
| 4125 | SBB64mr_ND = 4110, |
| 4126 | SBB64ri32 = 4111, |
| 4127 | SBB64ri32_EVEX = 4112, |
| 4128 | SBB64ri32_ND = 4113, |
| 4129 | SBB64ri8 = 4114, |
| 4130 | SBB64ri8_EVEX = 4115, |
| 4131 | SBB64ri8_ND = 4116, |
| 4132 | SBB64rm = 4117, |
| 4133 | SBB64rm_EVEX = 4118, |
| 4134 | SBB64rm_ND = 4119, |
| 4135 | SBB64rr = 4120, |
| 4136 | SBB64rr_EVEX = 4121, |
| 4137 | SBB64rr_EVEX_REV = 4122, |
| 4138 | SBB64rr_ND = 4123, |
| 4139 | SBB64rr_ND_REV = 4124, |
| 4140 | SBB64rr_REV = 4125, |
| 4141 | SBB8i8 = 4126, |
| 4142 | SBB8mi = 4127, |
| 4143 | SBB8mi8 = 4128, |
| 4144 | SBB8mi_EVEX = 4129, |
| 4145 | SBB8mi_ND = 4130, |
| 4146 | SBB8mr = 4131, |
| 4147 | SBB8mr_EVEX = 4132, |
| 4148 | SBB8mr_ND = 4133, |
| 4149 | SBB8ri = 4134, |
| 4150 | SBB8ri8 = 4135, |
| 4151 | SBB8ri_EVEX = 4136, |
| 4152 | SBB8ri_ND = 4137, |
| 4153 | SBB8rm = 4138, |
| 4154 | SBB8rm_EVEX = 4139, |
| 4155 | SBB8rm_ND = 4140, |
| 4156 | SBB8rr = 4141, |
| 4157 | SBB8rr_EVEX = 4142, |
| 4158 | SBB8rr_EVEX_REV = 4143, |
| 4159 | SBB8rr_ND = 4144, |
| 4160 | SBB8rr_ND_REV = 4145, |
| 4161 | SBB8rr_REV = 4146, |
| 4162 | SCASB = 4147, |
| 4163 | SCASL = 4148, |
| 4164 | SCASQ = 4149, |
| 4165 | SCASW = 4150, |
| 4166 | SEAMCALL = 4151, |
| 4167 | SEAMOPS = 4152, |
| 4168 | SEAMRET = 4153, |
| 4169 | SEG_ALLOCA_32 = 4154, |
| 4170 | SEG_ALLOCA_64 = 4155, |
| 4171 | SENDUIPI = 4156, |
| 4172 | SERIALIZE = 4157, |
| 4173 | SETCCm = 4158, |
| 4174 | SETCCm_EVEX = 4159, |
| 4175 | SETCCr = 4160, |
| 4176 | SETCCr_EVEX = 4161, |
| 4177 | SETSSBSY = 4162, |
| 4178 | SETZUCCm = 4163, |
| 4179 | SETZUCCr = 4164, |
| 4180 | SFENCE = 4165, |
| 4181 | SGDT16m = 4166, |
| 4182 | SGDT32m = 4167, |
| 4183 | SGDT64m = 4168, |
| 4184 | SHA1MSG1rm = 4169, |
| 4185 | SHA1MSG1rr = 4170, |
| 4186 | SHA1MSG2rm = 4171, |
| 4187 | SHA1MSG2rr = 4172, |
| 4188 | SHA1NEXTErm = 4173, |
| 4189 | SHA1NEXTErr = 4174, |
| 4190 | SHA1RNDS4rmi = 4175, |
| 4191 | SHA1RNDS4rri = 4176, |
| 4192 | SHA256MSG1rm = 4177, |
| 4193 | SHA256MSG1rr = 4178, |
| 4194 | SHA256MSG2rm = 4179, |
| 4195 | SHA256MSG2rr = 4180, |
| 4196 | SHA256RNDS2rm = 4181, |
| 4197 | SHA256RNDS2rr = 4182, |
| 4198 | SHL16m1 = 4183, |
| 4199 | SHL16m1_EVEX = 4184, |
| 4200 | SHL16m1_ND = 4185, |
| 4201 | SHL16m1_NF = 4186, |
| 4202 | SHL16m1_NF_ND = 4187, |
| 4203 | SHL16mCL = 4188, |
| 4204 | SHL16mCL_EVEX = 4189, |
| 4205 | SHL16mCL_ND = 4190, |
| 4206 | SHL16mCL_NF = 4191, |
| 4207 | SHL16mCL_NF_ND = 4192, |
| 4208 | SHL16mi = 4193, |
| 4209 | SHL16mi_EVEX = 4194, |
| 4210 | SHL16mi_ND = 4195, |
| 4211 | SHL16mi_NF = 4196, |
| 4212 | SHL16mi_NF_ND = 4197, |
| 4213 | SHL16r1 = 4198, |
| 4214 | SHL16r1_EVEX = 4199, |
| 4215 | SHL16r1_ND = 4200, |
| 4216 | SHL16r1_NF = 4201, |
| 4217 | SHL16r1_NF_ND = 4202, |
| 4218 | SHL16rCL = 4203, |
| 4219 | SHL16rCL_EVEX = 4204, |
| 4220 | SHL16rCL_ND = 4205, |
| 4221 | SHL16rCL_NF = 4206, |
| 4222 | SHL16rCL_NF_ND = 4207, |
| 4223 | SHL16ri = 4208, |
| 4224 | SHL16ri_EVEX = 4209, |
| 4225 | SHL16ri_ND = 4210, |
| 4226 | SHL16ri_NF = 4211, |
| 4227 | SHL16ri_NF_ND = 4212, |
| 4228 | SHL32m1 = 4213, |
| 4229 | SHL32m1_EVEX = 4214, |
| 4230 | SHL32m1_ND = 4215, |
| 4231 | SHL32m1_NF = 4216, |
| 4232 | SHL32m1_NF_ND = 4217, |
| 4233 | SHL32mCL = 4218, |
| 4234 | SHL32mCL_EVEX = 4219, |
| 4235 | SHL32mCL_ND = 4220, |
| 4236 | SHL32mCL_NF = 4221, |
| 4237 | SHL32mCL_NF_ND = 4222, |
| 4238 | SHL32mi = 4223, |
| 4239 | SHL32mi_EVEX = 4224, |
| 4240 | SHL32mi_ND = 4225, |
| 4241 | SHL32mi_NF = 4226, |
| 4242 | SHL32mi_NF_ND = 4227, |
| 4243 | SHL32r1 = 4228, |
| 4244 | SHL32r1_EVEX = 4229, |
| 4245 | SHL32r1_ND = 4230, |
| 4246 | SHL32r1_NF = 4231, |
| 4247 | SHL32r1_NF_ND = 4232, |
| 4248 | SHL32rCL = 4233, |
| 4249 | SHL32rCL_EVEX = 4234, |
| 4250 | SHL32rCL_ND = 4235, |
| 4251 | SHL32rCL_NF = 4236, |
| 4252 | SHL32rCL_NF_ND = 4237, |
| 4253 | SHL32ri = 4238, |
| 4254 | SHL32ri_EVEX = 4239, |
| 4255 | SHL32ri_ND = 4240, |
| 4256 | SHL32ri_NF = 4241, |
| 4257 | SHL32ri_NF_ND = 4242, |
| 4258 | SHL64m1 = 4243, |
| 4259 | SHL64m1_EVEX = 4244, |
| 4260 | SHL64m1_ND = 4245, |
| 4261 | SHL64m1_NF = 4246, |
| 4262 | SHL64m1_NF_ND = 4247, |
| 4263 | SHL64mCL = 4248, |
| 4264 | SHL64mCL_EVEX = 4249, |
| 4265 | SHL64mCL_ND = 4250, |
| 4266 | SHL64mCL_NF = 4251, |
| 4267 | SHL64mCL_NF_ND = 4252, |
| 4268 | SHL64mi = 4253, |
| 4269 | SHL64mi_EVEX = 4254, |
| 4270 | SHL64mi_ND = 4255, |
| 4271 | SHL64mi_NF = 4256, |
| 4272 | SHL64mi_NF_ND = 4257, |
| 4273 | SHL64r1 = 4258, |
| 4274 | SHL64r1_EVEX = 4259, |
| 4275 | SHL64r1_ND = 4260, |
| 4276 | SHL64r1_NF = 4261, |
| 4277 | SHL64r1_NF_ND = 4262, |
| 4278 | SHL64rCL = 4263, |
| 4279 | SHL64rCL_EVEX = 4264, |
| 4280 | SHL64rCL_ND = 4265, |
| 4281 | SHL64rCL_NF = 4266, |
| 4282 | SHL64rCL_NF_ND = 4267, |
| 4283 | SHL64ri = 4268, |
| 4284 | SHL64ri_EVEX = 4269, |
| 4285 | SHL64ri_ND = 4270, |
| 4286 | SHL64ri_NF = 4271, |
| 4287 | SHL64ri_NF_ND = 4272, |
| 4288 | SHL8m1 = 4273, |
| 4289 | SHL8m1_EVEX = 4274, |
| 4290 | SHL8m1_ND = 4275, |
| 4291 | SHL8m1_NF = 4276, |
| 4292 | SHL8m1_NF_ND = 4277, |
| 4293 | SHL8mCL = 4278, |
| 4294 | SHL8mCL_EVEX = 4279, |
| 4295 | SHL8mCL_ND = 4280, |
| 4296 | SHL8mCL_NF = 4281, |
| 4297 | SHL8mCL_NF_ND = 4282, |
| 4298 | SHL8mi = 4283, |
| 4299 | SHL8mi_EVEX = 4284, |
| 4300 | SHL8mi_ND = 4285, |
| 4301 | SHL8mi_NF = 4286, |
| 4302 | SHL8mi_NF_ND = 4287, |
| 4303 | SHL8r1 = 4288, |
| 4304 | SHL8r1_EVEX = 4289, |
| 4305 | SHL8r1_ND = 4290, |
| 4306 | SHL8r1_NF = 4291, |
| 4307 | SHL8r1_NF_ND = 4292, |
| 4308 | SHL8rCL = 4293, |
| 4309 | SHL8rCL_EVEX = 4294, |
| 4310 | SHL8rCL_ND = 4295, |
| 4311 | SHL8rCL_NF = 4296, |
| 4312 | SHL8rCL_NF_ND = 4297, |
| 4313 | SHL8ri = 4298, |
| 4314 | SHL8ri_EVEX = 4299, |
| 4315 | SHL8ri_ND = 4300, |
| 4316 | SHL8ri_NF = 4301, |
| 4317 | SHL8ri_NF_ND = 4302, |
| 4318 | SHLD16mrCL = 4303, |
| 4319 | SHLD16mrCL_EVEX = 4304, |
| 4320 | SHLD16mrCL_ND = 4305, |
| 4321 | SHLD16mrCL_NF = 4306, |
| 4322 | SHLD16mrCL_NF_ND = 4307, |
| 4323 | SHLD16mri8 = 4308, |
| 4324 | SHLD16mri8_EVEX = 4309, |
| 4325 | SHLD16mri8_ND = 4310, |
| 4326 | SHLD16mri8_NF = 4311, |
| 4327 | SHLD16mri8_NF_ND = 4312, |
| 4328 | SHLD16rrCL = 4313, |
| 4329 | SHLD16rrCL_EVEX = 4314, |
| 4330 | SHLD16rrCL_ND = 4315, |
| 4331 | SHLD16rrCL_NF = 4316, |
| 4332 | SHLD16rrCL_NF_ND = 4317, |
| 4333 | SHLD16rri8 = 4318, |
| 4334 | SHLD16rri8_EVEX = 4319, |
| 4335 | SHLD16rri8_ND = 4320, |
| 4336 | SHLD16rri8_NF = 4321, |
| 4337 | SHLD16rri8_NF_ND = 4322, |
| 4338 | SHLD32mrCL = 4323, |
| 4339 | SHLD32mrCL_EVEX = 4324, |
| 4340 | SHLD32mrCL_ND = 4325, |
| 4341 | SHLD32mrCL_NF = 4326, |
| 4342 | SHLD32mrCL_NF_ND = 4327, |
| 4343 | SHLD32mri8 = 4328, |
| 4344 | SHLD32mri8_EVEX = 4329, |
| 4345 | SHLD32mri8_ND = 4330, |
| 4346 | SHLD32mri8_NF = 4331, |
| 4347 | SHLD32mri8_NF_ND = 4332, |
| 4348 | SHLD32rrCL = 4333, |
| 4349 | SHLD32rrCL_EVEX = 4334, |
| 4350 | SHLD32rrCL_ND = 4335, |
| 4351 | SHLD32rrCL_NF = 4336, |
| 4352 | SHLD32rrCL_NF_ND = 4337, |
| 4353 | SHLD32rri8 = 4338, |
| 4354 | SHLD32rri8_EVEX = 4339, |
| 4355 | SHLD32rri8_ND = 4340, |
| 4356 | SHLD32rri8_NF = 4341, |
| 4357 | SHLD32rri8_NF_ND = 4342, |
| 4358 | SHLD64mrCL = 4343, |
| 4359 | SHLD64mrCL_EVEX = 4344, |
| 4360 | SHLD64mrCL_ND = 4345, |
| 4361 | SHLD64mrCL_NF = 4346, |
| 4362 | SHLD64mrCL_NF_ND = 4347, |
| 4363 | SHLD64mri8 = 4348, |
| 4364 | SHLD64mri8_EVEX = 4349, |
| 4365 | SHLD64mri8_ND = 4350, |
| 4366 | SHLD64mri8_NF = 4351, |
| 4367 | SHLD64mri8_NF_ND = 4352, |
| 4368 | SHLD64rrCL = 4353, |
| 4369 | SHLD64rrCL_EVEX = 4354, |
| 4370 | SHLD64rrCL_ND = 4355, |
| 4371 | SHLD64rrCL_NF = 4356, |
| 4372 | SHLD64rrCL_NF_ND = 4357, |
| 4373 | SHLD64rri8 = 4358, |
| 4374 | SHLD64rri8_EVEX = 4359, |
| 4375 | SHLD64rri8_ND = 4360, |
| 4376 | SHLD64rri8_NF = 4361, |
| 4377 | SHLD64rri8_NF_ND = 4362, |
| 4378 | SHLX32rm = 4363, |
| 4379 | SHLX32rm_EVEX = 4364, |
| 4380 | SHLX32rr = 4365, |
| 4381 | SHLX32rr_EVEX = 4366, |
| 4382 | SHLX64rm = 4367, |
| 4383 | SHLX64rm_EVEX = 4368, |
| 4384 | SHLX64rr = 4369, |
| 4385 | SHLX64rr_EVEX = 4370, |
| 4386 | SHR16m1 = 4371, |
| 4387 | SHR16m1_EVEX = 4372, |
| 4388 | SHR16m1_ND = 4373, |
| 4389 | SHR16m1_NF = 4374, |
| 4390 | SHR16m1_NF_ND = 4375, |
| 4391 | SHR16mCL = 4376, |
| 4392 | SHR16mCL_EVEX = 4377, |
| 4393 | SHR16mCL_ND = 4378, |
| 4394 | SHR16mCL_NF = 4379, |
| 4395 | SHR16mCL_NF_ND = 4380, |
| 4396 | SHR16mi = 4381, |
| 4397 | SHR16mi_EVEX = 4382, |
| 4398 | SHR16mi_ND = 4383, |
| 4399 | SHR16mi_NF = 4384, |
| 4400 | SHR16mi_NF_ND = 4385, |
| 4401 | SHR16r1 = 4386, |
| 4402 | SHR16r1_EVEX = 4387, |
| 4403 | SHR16r1_ND = 4388, |
| 4404 | SHR16r1_NF = 4389, |
| 4405 | SHR16r1_NF_ND = 4390, |
| 4406 | SHR16rCL = 4391, |
| 4407 | SHR16rCL_EVEX = 4392, |
| 4408 | SHR16rCL_ND = 4393, |
| 4409 | SHR16rCL_NF = 4394, |
| 4410 | SHR16rCL_NF_ND = 4395, |
| 4411 | SHR16ri = 4396, |
| 4412 | SHR16ri_EVEX = 4397, |
| 4413 | SHR16ri_ND = 4398, |
| 4414 | SHR16ri_NF = 4399, |
| 4415 | SHR16ri_NF_ND = 4400, |
| 4416 | SHR32m1 = 4401, |
| 4417 | SHR32m1_EVEX = 4402, |
| 4418 | SHR32m1_ND = 4403, |
| 4419 | SHR32m1_NF = 4404, |
| 4420 | SHR32m1_NF_ND = 4405, |
| 4421 | SHR32mCL = 4406, |
| 4422 | SHR32mCL_EVEX = 4407, |
| 4423 | SHR32mCL_ND = 4408, |
| 4424 | SHR32mCL_NF = 4409, |
| 4425 | SHR32mCL_NF_ND = 4410, |
| 4426 | SHR32mi = 4411, |
| 4427 | SHR32mi_EVEX = 4412, |
| 4428 | SHR32mi_ND = 4413, |
| 4429 | SHR32mi_NF = 4414, |
| 4430 | SHR32mi_NF_ND = 4415, |
| 4431 | SHR32r1 = 4416, |
| 4432 | SHR32r1_EVEX = 4417, |
| 4433 | SHR32r1_ND = 4418, |
| 4434 | SHR32r1_NF = 4419, |
| 4435 | SHR32r1_NF_ND = 4420, |
| 4436 | SHR32rCL = 4421, |
| 4437 | SHR32rCL_EVEX = 4422, |
| 4438 | SHR32rCL_ND = 4423, |
| 4439 | SHR32rCL_NF = 4424, |
| 4440 | SHR32rCL_NF_ND = 4425, |
| 4441 | SHR32ri = 4426, |
| 4442 | SHR32ri_EVEX = 4427, |
| 4443 | SHR32ri_ND = 4428, |
| 4444 | SHR32ri_NF = 4429, |
| 4445 | SHR32ri_NF_ND = 4430, |
| 4446 | SHR64m1 = 4431, |
| 4447 | SHR64m1_EVEX = 4432, |
| 4448 | SHR64m1_ND = 4433, |
| 4449 | SHR64m1_NF = 4434, |
| 4450 | SHR64m1_NF_ND = 4435, |
| 4451 | SHR64mCL = 4436, |
| 4452 | SHR64mCL_EVEX = 4437, |
| 4453 | SHR64mCL_ND = 4438, |
| 4454 | SHR64mCL_NF = 4439, |
| 4455 | SHR64mCL_NF_ND = 4440, |
| 4456 | SHR64mi = 4441, |
| 4457 | SHR64mi_EVEX = 4442, |
| 4458 | SHR64mi_ND = 4443, |
| 4459 | SHR64mi_NF = 4444, |
| 4460 | SHR64mi_NF_ND = 4445, |
| 4461 | SHR64r1 = 4446, |
| 4462 | SHR64r1_EVEX = 4447, |
| 4463 | SHR64r1_ND = 4448, |
| 4464 | SHR64r1_NF = 4449, |
| 4465 | SHR64r1_NF_ND = 4450, |
| 4466 | SHR64rCL = 4451, |
| 4467 | SHR64rCL_EVEX = 4452, |
| 4468 | SHR64rCL_ND = 4453, |
| 4469 | SHR64rCL_NF = 4454, |
| 4470 | SHR64rCL_NF_ND = 4455, |
| 4471 | SHR64ri = 4456, |
| 4472 | SHR64ri_EVEX = 4457, |
| 4473 | SHR64ri_ND = 4458, |
| 4474 | SHR64ri_NF = 4459, |
| 4475 | SHR64ri_NF_ND = 4460, |
| 4476 | SHR8m1 = 4461, |
| 4477 | SHR8m1_EVEX = 4462, |
| 4478 | SHR8m1_ND = 4463, |
| 4479 | SHR8m1_NF = 4464, |
| 4480 | SHR8m1_NF_ND = 4465, |
| 4481 | SHR8mCL = 4466, |
| 4482 | SHR8mCL_EVEX = 4467, |
| 4483 | SHR8mCL_ND = 4468, |
| 4484 | SHR8mCL_NF = 4469, |
| 4485 | SHR8mCL_NF_ND = 4470, |
| 4486 | SHR8mi = 4471, |
| 4487 | SHR8mi_EVEX = 4472, |
| 4488 | SHR8mi_ND = 4473, |
| 4489 | SHR8mi_NF = 4474, |
| 4490 | SHR8mi_NF_ND = 4475, |
| 4491 | SHR8r1 = 4476, |
| 4492 | SHR8r1_EVEX = 4477, |
| 4493 | SHR8r1_ND = 4478, |
| 4494 | SHR8r1_NF = 4479, |
| 4495 | SHR8r1_NF_ND = 4480, |
| 4496 | SHR8rCL = 4481, |
| 4497 | SHR8rCL_EVEX = 4482, |
| 4498 | SHR8rCL_ND = 4483, |
| 4499 | SHR8rCL_NF = 4484, |
| 4500 | SHR8rCL_NF_ND = 4485, |
| 4501 | SHR8ri = 4486, |
| 4502 | SHR8ri_EVEX = 4487, |
| 4503 | SHR8ri_ND = 4488, |
| 4504 | SHR8ri_NF = 4489, |
| 4505 | SHR8ri_NF_ND = 4490, |
| 4506 | SHRD16mrCL = 4491, |
| 4507 | SHRD16mrCL_EVEX = 4492, |
| 4508 | SHRD16mrCL_ND = 4493, |
| 4509 | SHRD16mrCL_NF = 4494, |
| 4510 | SHRD16mrCL_NF_ND = 4495, |
| 4511 | SHRD16mri8 = 4496, |
| 4512 | SHRD16mri8_EVEX = 4497, |
| 4513 | SHRD16mri8_ND = 4498, |
| 4514 | SHRD16mri8_NF = 4499, |
| 4515 | SHRD16mri8_NF_ND = 4500, |
| 4516 | SHRD16rrCL = 4501, |
| 4517 | SHRD16rrCL_EVEX = 4502, |
| 4518 | SHRD16rrCL_ND = 4503, |
| 4519 | SHRD16rrCL_NF = 4504, |
| 4520 | SHRD16rrCL_NF_ND = 4505, |
| 4521 | SHRD16rri8 = 4506, |
| 4522 | SHRD16rri8_EVEX = 4507, |
| 4523 | SHRD16rri8_ND = 4508, |
| 4524 | SHRD16rri8_NF = 4509, |
| 4525 | SHRD16rri8_NF_ND = 4510, |
| 4526 | SHRD32mrCL = 4511, |
| 4527 | SHRD32mrCL_EVEX = 4512, |
| 4528 | SHRD32mrCL_ND = 4513, |
| 4529 | SHRD32mrCL_NF = 4514, |
| 4530 | SHRD32mrCL_NF_ND = 4515, |
| 4531 | SHRD32mri8 = 4516, |
| 4532 | SHRD32mri8_EVEX = 4517, |
| 4533 | SHRD32mri8_ND = 4518, |
| 4534 | SHRD32mri8_NF = 4519, |
| 4535 | SHRD32mri8_NF_ND = 4520, |
| 4536 | SHRD32rrCL = 4521, |
| 4537 | SHRD32rrCL_EVEX = 4522, |
| 4538 | SHRD32rrCL_ND = 4523, |
| 4539 | SHRD32rrCL_NF = 4524, |
| 4540 | SHRD32rrCL_NF_ND = 4525, |
| 4541 | SHRD32rri8 = 4526, |
| 4542 | SHRD32rri8_EVEX = 4527, |
| 4543 | SHRD32rri8_ND = 4528, |
| 4544 | SHRD32rri8_NF = 4529, |
| 4545 | SHRD32rri8_NF_ND = 4530, |
| 4546 | SHRD64mrCL = 4531, |
| 4547 | SHRD64mrCL_EVEX = 4532, |
| 4548 | SHRD64mrCL_ND = 4533, |
| 4549 | SHRD64mrCL_NF = 4534, |
| 4550 | SHRD64mrCL_NF_ND = 4535, |
| 4551 | SHRD64mri8 = 4536, |
| 4552 | SHRD64mri8_EVEX = 4537, |
| 4553 | SHRD64mri8_ND = 4538, |
| 4554 | SHRD64mri8_NF = 4539, |
| 4555 | SHRD64mri8_NF_ND = 4540, |
| 4556 | SHRD64rrCL = 4541, |
| 4557 | SHRD64rrCL_EVEX = 4542, |
| 4558 | SHRD64rrCL_ND = 4543, |
| 4559 | SHRD64rrCL_NF = 4544, |
| 4560 | SHRD64rrCL_NF_ND = 4545, |
| 4561 | SHRD64rri8 = 4546, |
| 4562 | SHRD64rri8_EVEX = 4547, |
| 4563 | SHRD64rri8_ND = 4548, |
| 4564 | SHRD64rri8_NF = 4549, |
| 4565 | SHRD64rri8_NF_ND = 4550, |
| 4566 | SHRX32rm = 4551, |
| 4567 | SHRX32rm_EVEX = 4552, |
| 4568 | SHRX32rr = 4553, |
| 4569 | SHRX32rr_EVEX = 4554, |
| 4570 | SHRX64rm = 4555, |
| 4571 | SHRX64rm_EVEX = 4556, |
| 4572 | SHRX64rr = 4557, |
| 4573 | SHRX64rr_EVEX = 4558, |
| 4574 | SHUFPDrmi = 4559, |
| 4575 | SHUFPDrri = 4560, |
| 4576 | SHUFPSrmi = 4561, |
| 4577 | SHUFPSrri = 4562, |
| 4578 | SIDT16m = 4563, |
| 4579 | SIDT32m = 4564, |
| 4580 | SIDT64m = 4565, |
| 4581 | SKINIT = 4566, |
| 4582 | SLDT16m = 4567, |
| 4583 | SLDT16r = 4568, |
| 4584 | SLDT32r = 4569, |
| 4585 | SLDT64r = 4570, |
| 4586 | SLWPCB = 4571, |
| 4587 | SLWPCB64 = 4572, |
| 4588 | SMSW16m = 4573, |
| 4589 | SMSW16r = 4574, |
| 4590 | SMSW32r = 4575, |
| 4591 | SMSW64r = 4576, |
| 4592 | SQRTPDm = 4577, |
| 4593 | SQRTPDr = 4578, |
| 4594 | SQRTPSm = 4579, |
| 4595 | SQRTPSr = 4580, |
| 4596 | SQRTSDm = 4581, |
| 4597 | SQRTSDm_Int = 4582, |
| 4598 | SQRTSDr = 4583, |
| 4599 | SQRTSDr_Int = 4584, |
| 4600 | SQRTSSm = 4585, |
| 4601 | SQRTSSm_Int = 4586, |
| 4602 | SQRTSSr = 4587, |
| 4603 | SQRTSSr_Int = 4588, |
| 4604 | SQRT_F = 4589, |
| 4605 | SQRT_Fp32 = 4590, |
| 4606 | SQRT_Fp64 = 4591, |
| 4607 | SQRT_Fp80 = 4592, |
| 4608 | SS_PREFIX = 4593, |
| 4609 | STAC = 4594, |
| 4610 | STACKALLOC_W_PROBING = 4595, |
| 4611 | STC = 4596, |
| 4612 | STD = 4597, |
| 4613 | STGI = 4598, |
| 4614 | STI = 4599, |
| 4615 | STMXCSR = 4600, |
| 4616 | STOSB = 4601, |
| 4617 | STOSL = 4602, |
| 4618 | STOSQ = 4603, |
| 4619 | STOSW = 4604, |
| 4620 | STR16r = 4605, |
| 4621 | STR32r = 4606, |
| 4622 | STR64r = 4607, |
| 4623 | STRm = 4608, |
| 4624 | STTILECFG = 4609, |
| 4625 | STTILECFG_EVEX = 4610, |
| 4626 | STUI = 4611, |
| 4627 | ST_F32m = 4612, |
| 4628 | ST_F64m = 4613, |
| 4629 | ST_FP32m = 4614, |
| 4630 | ST_FP64m = 4615, |
| 4631 | ST_FP80m = 4616, |
| 4632 | ST_FPrr = 4617, |
| 4633 | ST_Fp32m = 4618, |
| 4634 | ST_Fp64m = 4619, |
| 4635 | ST_Fp64m32 = 4620, |
| 4636 | ST_Fp80m32 = 4621, |
| 4637 | ST_Fp80m64 = 4622, |
| 4638 | ST_FpP32m = 4623, |
| 4639 | ST_FpP64m = 4624, |
| 4640 | ST_FpP64m32 = 4625, |
| 4641 | ST_FpP80m = 4626, |
| 4642 | ST_FpP80m32 = 4627, |
| 4643 | ST_FpP80m64 = 4628, |
| 4644 | ST_Frr = 4629, |
| 4645 | SUB16i16 = 4630, |
| 4646 | SUB16mi = 4631, |
| 4647 | SUB16mi8 = 4632, |
| 4648 | SUB16mi8_EVEX = 4633, |
| 4649 | SUB16mi8_ND = 4634, |
| 4650 | SUB16mi8_NF = 4635, |
| 4651 | SUB16mi8_NF_ND = 4636, |
| 4652 | SUB16mi_EVEX = 4637, |
| 4653 | SUB16mi_ND = 4638, |
| 4654 | SUB16mi_NF = 4639, |
| 4655 | SUB16mi_NF_ND = 4640, |
| 4656 | SUB16mr = 4641, |
| 4657 | SUB16mr_EVEX = 4642, |
| 4658 | SUB16mr_ND = 4643, |
| 4659 | SUB16mr_NF = 4644, |
| 4660 | SUB16mr_NF_ND = 4645, |
| 4661 | SUB16ri = 4646, |
| 4662 | SUB16ri8 = 4647, |
| 4663 | SUB16ri8_EVEX = 4648, |
| 4664 | SUB16ri8_ND = 4649, |
| 4665 | SUB16ri8_NF = 4650, |
| 4666 | SUB16ri8_NF_ND = 4651, |
| 4667 | SUB16ri_EVEX = 4652, |
| 4668 | SUB16ri_ND = 4653, |
| 4669 | SUB16ri_NF = 4654, |
| 4670 | SUB16ri_NF_ND = 4655, |
| 4671 | SUB16rm = 4656, |
| 4672 | SUB16rm_EVEX = 4657, |
| 4673 | SUB16rm_ND = 4658, |
| 4674 | SUB16rm_NF = 4659, |
| 4675 | SUB16rm_NF_ND = 4660, |
| 4676 | SUB16rr = 4661, |
| 4677 | SUB16rr_EVEX = 4662, |
| 4678 | SUB16rr_EVEX_REV = 4663, |
| 4679 | SUB16rr_ND = 4664, |
| 4680 | SUB16rr_ND_REV = 4665, |
| 4681 | SUB16rr_NF = 4666, |
| 4682 | SUB16rr_NF_ND = 4667, |
| 4683 | SUB16rr_NF_ND_REV = 4668, |
| 4684 | SUB16rr_NF_REV = 4669, |
| 4685 | SUB16rr_REV = 4670, |
| 4686 | SUB32i32 = 4671, |
| 4687 | SUB32mi = 4672, |
| 4688 | SUB32mi8 = 4673, |
| 4689 | SUB32mi8_EVEX = 4674, |
| 4690 | SUB32mi8_ND = 4675, |
| 4691 | SUB32mi8_NF = 4676, |
| 4692 | SUB32mi8_NF_ND = 4677, |
| 4693 | SUB32mi_EVEX = 4678, |
| 4694 | SUB32mi_ND = 4679, |
| 4695 | SUB32mi_NF = 4680, |
| 4696 | SUB32mi_NF_ND = 4681, |
| 4697 | SUB32mr = 4682, |
| 4698 | SUB32mr_EVEX = 4683, |
| 4699 | SUB32mr_ND = 4684, |
| 4700 | SUB32mr_NF = 4685, |
| 4701 | SUB32mr_NF_ND = 4686, |
| 4702 | SUB32ri = 4687, |
| 4703 | SUB32ri8 = 4688, |
| 4704 | SUB32ri8_EVEX = 4689, |
| 4705 | SUB32ri8_ND = 4690, |
| 4706 | SUB32ri8_NF = 4691, |
| 4707 | SUB32ri8_NF_ND = 4692, |
| 4708 | SUB32ri_EVEX = 4693, |
| 4709 | SUB32ri_ND = 4694, |
| 4710 | SUB32ri_NF = 4695, |
| 4711 | SUB32ri_NF_ND = 4696, |
| 4712 | SUB32rm = 4697, |
| 4713 | SUB32rm_EVEX = 4698, |
| 4714 | SUB32rm_ND = 4699, |
| 4715 | SUB32rm_NF = 4700, |
| 4716 | SUB32rm_NF_ND = 4701, |
| 4717 | SUB32rr = 4702, |
| 4718 | SUB32rr_EVEX = 4703, |
| 4719 | SUB32rr_EVEX_REV = 4704, |
| 4720 | SUB32rr_ND = 4705, |
| 4721 | SUB32rr_ND_REV = 4706, |
| 4722 | SUB32rr_NF = 4707, |
| 4723 | SUB32rr_NF_ND = 4708, |
| 4724 | SUB32rr_NF_ND_REV = 4709, |
| 4725 | SUB32rr_NF_REV = 4710, |
| 4726 | SUB32rr_REV = 4711, |
| 4727 | SUB64i32 = 4712, |
| 4728 | SUB64mi32 = 4713, |
| 4729 | SUB64mi32_EVEX = 4714, |
| 4730 | SUB64mi32_ND = 4715, |
| 4731 | SUB64mi32_NF = 4716, |
| 4732 | SUB64mi32_NF_ND = 4717, |
| 4733 | SUB64mi8 = 4718, |
| 4734 | SUB64mi8_EVEX = 4719, |
| 4735 | SUB64mi8_ND = 4720, |
| 4736 | SUB64mi8_NF = 4721, |
| 4737 | SUB64mi8_NF_ND = 4722, |
| 4738 | SUB64mr = 4723, |
| 4739 | SUB64mr_EVEX = 4724, |
| 4740 | SUB64mr_ND = 4725, |
| 4741 | SUB64mr_NF = 4726, |
| 4742 | SUB64mr_NF_ND = 4727, |
| 4743 | SUB64ri32 = 4728, |
| 4744 | SUB64ri32_EVEX = 4729, |
| 4745 | SUB64ri32_ND = 4730, |
| 4746 | SUB64ri32_NF = 4731, |
| 4747 | SUB64ri32_NF_ND = 4732, |
| 4748 | SUB64ri8 = 4733, |
| 4749 | SUB64ri8_EVEX = 4734, |
| 4750 | SUB64ri8_ND = 4735, |
| 4751 | SUB64ri8_NF = 4736, |
| 4752 | SUB64ri8_NF_ND = 4737, |
| 4753 | SUB64rm = 4738, |
| 4754 | SUB64rm_EVEX = 4739, |
| 4755 | SUB64rm_ND = 4740, |
| 4756 | SUB64rm_NF = 4741, |
| 4757 | SUB64rm_NF_ND = 4742, |
| 4758 | SUB64rr = 4743, |
| 4759 | SUB64rr_EVEX = 4744, |
| 4760 | SUB64rr_EVEX_REV = 4745, |
| 4761 | SUB64rr_ND = 4746, |
| 4762 | SUB64rr_ND_REV = 4747, |
| 4763 | SUB64rr_NF = 4748, |
| 4764 | SUB64rr_NF_ND = 4749, |
| 4765 | SUB64rr_NF_ND_REV = 4750, |
| 4766 | SUB64rr_NF_REV = 4751, |
| 4767 | SUB64rr_REV = 4752, |
| 4768 | SUB8i8 = 4753, |
| 4769 | SUB8mi = 4754, |
| 4770 | SUB8mi8 = 4755, |
| 4771 | SUB8mi_EVEX = 4756, |
| 4772 | SUB8mi_ND = 4757, |
| 4773 | SUB8mi_NF = 4758, |
| 4774 | SUB8mi_NF_ND = 4759, |
| 4775 | SUB8mr = 4760, |
| 4776 | SUB8mr_EVEX = 4761, |
| 4777 | SUB8mr_ND = 4762, |
| 4778 | SUB8mr_NF = 4763, |
| 4779 | SUB8mr_NF_ND = 4764, |
| 4780 | SUB8ri = 4765, |
| 4781 | SUB8ri8 = 4766, |
| 4782 | SUB8ri_EVEX = 4767, |
| 4783 | SUB8ri_ND = 4768, |
| 4784 | SUB8ri_NF = 4769, |
| 4785 | SUB8ri_NF_ND = 4770, |
| 4786 | SUB8rm = 4771, |
| 4787 | SUB8rm_EVEX = 4772, |
| 4788 | SUB8rm_ND = 4773, |
| 4789 | SUB8rm_NF = 4774, |
| 4790 | SUB8rm_NF_ND = 4775, |
| 4791 | SUB8rr = 4776, |
| 4792 | SUB8rr_EVEX = 4777, |
| 4793 | SUB8rr_EVEX_REV = 4778, |
| 4794 | SUB8rr_ND = 4779, |
| 4795 | SUB8rr_ND_REV = 4780, |
| 4796 | SUB8rr_NF = 4781, |
| 4797 | SUB8rr_NF_ND = 4782, |
| 4798 | SUB8rr_NF_ND_REV = 4783, |
| 4799 | SUB8rr_NF_REV = 4784, |
| 4800 | SUB8rr_REV = 4785, |
| 4801 | SUBPDrm = 4786, |
| 4802 | SUBPDrr = 4787, |
| 4803 | SUBPSrm = 4788, |
| 4804 | SUBPSrr = 4789, |
| 4805 | SUBR_F32m = 4790, |
| 4806 | SUBR_F64m = 4791, |
| 4807 | SUBR_FI16m = 4792, |
| 4808 | SUBR_FI32m = 4793, |
| 4809 | SUBR_FPrST0 = 4794, |
| 4810 | SUBR_FST0r = 4795, |
| 4811 | SUBR_Fp32m = 4796, |
| 4812 | SUBR_Fp64m = 4797, |
| 4813 | SUBR_Fp64m32 = 4798, |
| 4814 | SUBR_Fp80m32 = 4799, |
| 4815 | SUBR_Fp80m64 = 4800, |
| 4816 | SUBR_FpI16m32 = 4801, |
| 4817 | SUBR_FpI16m64 = 4802, |
| 4818 | SUBR_FpI16m80 = 4803, |
| 4819 | SUBR_FpI32m32 = 4804, |
| 4820 | SUBR_FpI32m64 = 4805, |
| 4821 | SUBR_FpI32m80 = 4806, |
| 4822 | SUBR_FrST0 = 4807, |
| 4823 | SUBSDrm = 4808, |
| 4824 | SUBSDrm_Int = 4809, |
| 4825 | SUBSDrr = 4810, |
| 4826 | SUBSDrr_Int = 4811, |
| 4827 | SUBSSrm = 4812, |
| 4828 | SUBSSrm_Int = 4813, |
| 4829 | SUBSSrr = 4814, |
| 4830 | SUBSSrr_Int = 4815, |
| 4831 | SUB_F32m = 4816, |
| 4832 | SUB_F64m = 4817, |
| 4833 | SUB_FI16m = 4818, |
| 4834 | SUB_FI32m = 4819, |
| 4835 | SUB_FPrST0 = 4820, |
| 4836 | SUB_FST0r = 4821, |
| 4837 | SUB_Fp32 = 4822, |
| 4838 | SUB_Fp32m = 4823, |
| 4839 | SUB_Fp64 = 4824, |
| 4840 | SUB_Fp64m = 4825, |
| 4841 | SUB_Fp64m32 = 4826, |
| 4842 | SUB_Fp80 = 4827, |
| 4843 | SUB_Fp80m32 = 4828, |
| 4844 | SUB_Fp80m64 = 4829, |
| 4845 | SUB_FpI16m32 = 4830, |
| 4846 | SUB_FpI16m64 = 4831, |
| 4847 | SUB_FpI16m80 = 4832, |
| 4848 | SUB_FpI32m32 = 4833, |
| 4849 | SUB_FpI32m64 = 4834, |
| 4850 | SUB_FpI32m80 = 4835, |
| 4851 | SUB_FrST0 = 4836, |
| 4852 | SWAPGS = 4837, |
| 4853 | SYSCALL = 4838, |
| 4854 | SYSENTER = 4839, |
| 4855 | SYSEXIT = 4840, |
| 4856 | SYSEXIT64 = 4841, |
| 4857 | SYSRET = 4842, |
| 4858 | SYSRET64 = 4843, |
| 4859 | T1MSKC32rm = 4844, |
| 4860 | T1MSKC32rr = 4845, |
| 4861 | T1MSKC64rm = 4846, |
| 4862 | T1MSKC64rr = 4847, |
| 4863 | TAILJMPd = 4848, |
| 4864 | TAILJMPd64 = 4849, |
| 4865 | TAILJMPd64_CC = 4850, |
| 4866 | TAILJMPd_CC = 4851, |
| 4867 | TAILJMPm = 4852, |
| 4868 | TAILJMPm64 = 4853, |
| 4869 | TAILJMPm64_REX = 4854, |
| 4870 | TAILJMPr = 4855, |
| 4871 | TAILJMPr64 = 4856, |
| 4872 | TAILJMPr64_REX = 4857, |
| 4873 | TCMMIMFP16PS = 4858, |
| 4874 | TCMMRLFP16PS = 4859, |
| 4875 | TCRETURNdi = 4860, |
| 4876 | TCRETURNdi64 = 4861, |
| 4877 | TCRETURNdi64cc = 4862, |
| 4878 | TCRETURNdicc = 4863, |
| 4879 | TCRETURNmi = 4864, |
| 4880 | TCRETURNmi64 = 4865, |
| 4881 | TCRETURNri = 4866, |
| 4882 | TCRETURNri64 = 4867, |
| 4883 | TDCALL = 4868, |
| 4884 | TDPBF16PS = 4869, |
| 4885 | TDPBSSD = 4870, |
| 4886 | TDPBSUD = 4871, |
| 4887 | TDPBUSD = 4872, |
| 4888 | TDPBUUD = 4873, |
| 4889 | TDPFP16PS = 4874, |
| 4890 | TEST16i16 = 4875, |
| 4891 | TEST16mi = 4876, |
| 4892 | TEST16mr = 4877, |
| 4893 | TEST16ri = 4878, |
| 4894 | TEST16rr = 4879, |
| 4895 | TEST32i32 = 4880, |
| 4896 | TEST32mi = 4881, |
| 4897 | TEST32mr = 4882, |
| 4898 | TEST32ri = 4883, |
| 4899 | TEST32rr = 4884, |
| 4900 | TEST64i32 = 4885, |
| 4901 | TEST64mi32 = 4886, |
| 4902 | TEST64mr = 4887, |
| 4903 | TEST64ri32 = 4888, |
| 4904 | TEST64rr = 4889, |
| 4905 | TEST8i8 = 4890, |
| 4906 | TEST8mi = 4891, |
| 4907 | TEST8mr = 4892, |
| 4908 | TEST8ri = 4893, |
| 4909 | TEST8rr = 4894, |
| 4910 | TESTUI = 4895, |
| 4911 | TILELOADD = 4896, |
| 4912 | TILELOADDT1 = 4897, |
| 4913 | TILELOADDT1_EVEX = 4898, |
| 4914 | TILELOADD_EVEX = 4899, |
| 4915 | TILERELEASE = 4900, |
| 4916 | TILESTORED = 4901, |
| 4917 | TILESTORED_EVEX = 4902, |
| 4918 | TILEZERO = 4903, |
| 4919 | TLBSYNC = 4904, |
| 4920 | TLSCall_32 = 4905, |
| 4921 | TLSCall_64 = 4906, |
| 4922 | TLS_addr32 = 4907, |
| 4923 | TLS_addr64 = 4908, |
| 4924 | TLS_addrX32 = 4909, |
| 4925 | TLS_base_addr32 = 4910, |
| 4926 | TLS_base_addr64 = 4911, |
| 4927 | TLS_base_addrX32 = 4912, |
| 4928 | TLS_desc32 = 4913, |
| 4929 | TLS_desc64 = 4914, |
| 4930 | TPAUSE = 4915, |
| 4931 | TRAP = 4916, |
| 4932 | TST_F = 4917, |
| 4933 | TST_Fp32 = 4918, |
| 4934 | TST_Fp64 = 4919, |
| 4935 | TST_Fp80 = 4920, |
| 4936 | TZCNT16rm = 4921, |
| 4937 | TZCNT16rm_EVEX = 4922, |
| 4938 | TZCNT16rm_NF = 4923, |
| 4939 | TZCNT16rr = 4924, |
| 4940 | TZCNT16rr_EVEX = 4925, |
| 4941 | TZCNT16rr_NF = 4926, |
| 4942 | TZCNT32rm = 4927, |
| 4943 | TZCNT32rm_EVEX = 4928, |
| 4944 | TZCNT32rm_NF = 4929, |
| 4945 | TZCNT32rr = 4930, |
| 4946 | TZCNT32rr_EVEX = 4931, |
| 4947 | TZCNT32rr_NF = 4932, |
| 4948 | TZCNT64rm = 4933, |
| 4949 | TZCNT64rm_EVEX = 4934, |
| 4950 | TZCNT64rm_NF = 4935, |
| 4951 | TZCNT64rr = 4936, |
| 4952 | TZCNT64rr_EVEX = 4937, |
| 4953 | TZCNT64rr_NF = 4938, |
| 4954 | TZMSK32rm = 4939, |
| 4955 | TZMSK32rr = 4940, |
| 4956 | TZMSK64rm = 4941, |
| 4957 | TZMSK64rr = 4942, |
| 4958 | UBSAN_UD1 = 4943, |
| 4959 | UCOMISDrm = 4944, |
| 4960 | UCOMISDrm_Int = 4945, |
| 4961 | UCOMISDrr = 4946, |
| 4962 | UCOMISDrr_Int = 4947, |
| 4963 | UCOMISSrm = 4948, |
| 4964 | UCOMISSrm_Int = 4949, |
| 4965 | UCOMISSrr = 4950, |
| 4966 | UCOMISSrr_Int = 4951, |
| 4967 | UCOM_FIPr = 4952, |
| 4968 | UCOM_FIr = 4953, |
| 4969 | UCOM_FPPr = 4954, |
| 4970 | UCOM_FPr = 4955, |
| 4971 | UCOM_FpIr32 = 4956, |
| 4972 | UCOM_FpIr64 = 4957, |
| 4973 | UCOM_FpIr80 = 4958, |
| 4974 | UCOM_Fpr32 = 4959, |
| 4975 | UCOM_Fpr64 = 4960, |
| 4976 | UCOM_Fpr80 = 4961, |
| 4977 | UCOM_Fr = 4962, |
| 4978 | UD1Lm = 4963, |
| 4979 | UD1Lr = 4964, |
| 4980 | UD1Qm = 4965, |
| 4981 | UD1Qr = 4966, |
| 4982 | UD1Wm = 4967, |
| 4983 | UD1Wr = 4968, |
| 4984 | UIRET = 4969, |
| 4985 | UMONITOR16 = 4970, |
| 4986 | UMONITOR32 = 4971, |
| 4987 | UMONITOR64 = 4972, |
| 4988 | UMWAIT = 4973, |
| 4989 | UNPCKHPDrm = 4974, |
| 4990 | UNPCKHPDrr = 4975, |
| 4991 | UNPCKHPSrm = 4976, |
| 4992 | UNPCKHPSrr = 4977, |
| 4993 | UNPCKLPDrm = 4978, |
| 4994 | UNPCKLPDrr = 4979, |
| 4995 | UNPCKLPSrm = 4980, |
| 4996 | UNPCKLPSrr = 4981, |
| 4997 | URDMSRri = 4982, |
| 4998 | URDMSRri_EVEX = 4983, |
| 4999 | URDMSRrr = 4984, |
| 5000 | URDMSRrr_EVEX = 4985, |
| 5001 | UWRMSRir = 4986, |
| 5002 | UWRMSRir_EVEX = 4987, |
| 5003 | UWRMSRrr = 4988, |
| 5004 | UWRMSRrr_EVEX = 4989, |
| 5005 | V4FMADDPSrm = 4990, |
| 5006 | V4FMADDPSrmk = 4991, |
| 5007 | V4FMADDPSrmkz = 4992, |
| 5008 | V4FMADDSSrm = 4993, |
| 5009 | V4FMADDSSrmk = 4994, |
| 5010 | V4FMADDSSrmkz = 4995, |
| 5011 | V4FNMADDPSrm = 4996, |
| 5012 | V4FNMADDPSrmk = 4997, |
| 5013 | V4FNMADDPSrmkz = 4998, |
| 5014 | V4FNMADDSSrm = 4999, |
| 5015 | V4FNMADDSSrmk = 5000, |
| 5016 | V4FNMADDSSrmkz = 5001, |
| 5017 | VAARG_64 = 5002, |
| 5018 | VAARG_X32 = 5003, |
| 5019 | VADDPDYrm = 5004, |
| 5020 | VADDPDYrr = 5005, |
| 5021 | VADDPDZ128rm = 5006, |
| 5022 | VADDPDZ128rmb = 5007, |
| 5023 | VADDPDZ128rmbk = 5008, |
| 5024 | VADDPDZ128rmbkz = 5009, |
| 5025 | VADDPDZ128rmk = 5010, |
| 5026 | VADDPDZ128rmkz = 5011, |
| 5027 | VADDPDZ128rr = 5012, |
| 5028 | VADDPDZ128rrk = 5013, |
| 5029 | VADDPDZ128rrkz = 5014, |
| 5030 | VADDPDZ256rm = 5015, |
| 5031 | VADDPDZ256rmb = 5016, |
| 5032 | VADDPDZ256rmbk = 5017, |
| 5033 | VADDPDZ256rmbkz = 5018, |
| 5034 | VADDPDZ256rmk = 5019, |
| 5035 | VADDPDZ256rmkz = 5020, |
| 5036 | VADDPDZ256rr = 5021, |
| 5037 | VADDPDZ256rrk = 5022, |
| 5038 | VADDPDZ256rrkz = 5023, |
| 5039 | VADDPDZrm = 5024, |
| 5040 | VADDPDZrmb = 5025, |
| 5041 | VADDPDZrmbk = 5026, |
| 5042 | VADDPDZrmbkz = 5027, |
| 5043 | VADDPDZrmk = 5028, |
| 5044 | VADDPDZrmkz = 5029, |
| 5045 | VADDPDZrr = 5030, |
| 5046 | VADDPDZrrb = 5031, |
| 5047 | VADDPDZrrbk = 5032, |
| 5048 | VADDPDZrrbkz = 5033, |
| 5049 | VADDPDZrrk = 5034, |
| 5050 | VADDPDZrrkz = 5035, |
| 5051 | VADDPDrm = 5036, |
| 5052 | VADDPDrr = 5037, |
| 5053 | VADDPHZ128rm = 5038, |
| 5054 | VADDPHZ128rmb = 5039, |
| 5055 | VADDPHZ128rmbk = 5040, |
| 5056 | VADDPHZ128rmbkz = 5041, |
| 5057 | VADDPHZ128rmk = 5042, |
| 5058 | VADDPHZ128rmkz = 5043, |
| 5059 | VADDPHZ128rr = 5044, |
| 5060 | VADDPHZ128rrk = 5045, |
| 5061 | VADDPHZ128rrkz = 5046, |
| 5062 | VADDPHZ256rm = 5047, |
| 5063 | VADDPHZ256rmb = 5048, |
| 5064 | VADDPHZ256rmbk = 5049, |
| 5065 | VADDPHZ256rmbkz = 5050, |
| 5066 | VADDPHZ256rmk = 5051, |
| 5067 | VADDPHZ256rmkz = 5052, |
| 5068 | VADDPHZ256rr = 5053, |
| 5069 | VADDPHZ256rrk = 5054, |
| 5070 | VADDPHZ256rrkz = 5055, |
| 5071 | VADDPHZrm = 5056, |
| 5072 | VADDPHZrmb = 5057, |
| 5073 | VADDPHZrmbk = 5058, |
| 5074 | VADDPHZrmbkz = 5059, |
| 5075 | VADDPHZrmk = 5060, |
| 5076 | VADDPHZrmkz = 5061, |
| 5077 | VADDPHZrr = 5062, |
| 5078 | VADDPHZrrb = 5063, |
| 5079 | VADDPHZrrbk = 5064, |
| 5080 | VADDPHZrrbkz = 5065, |
| 5081 | VADDPHZrrk = 5066, |
| 5082 | VADDPHZrrkz = 5067, |
| 5083 | VADDPSYrm = 5068, |
| 5084 | VADDPSYrr = 5069, |
| 5085 | VADDPSZ128rm = 5070, |
| 5086 | VADDPSZ128rmb = 5071, |
| 5087 | VADDPSZ128rmbk = 5072, |
| 5088 | VADDPSZ128rmbkz = 5073, |
| 5089 | VADDPSZ128rmk = 5074, |
| 5090 | VADDPSZ128rmkz = 5075, |
| 5091 | VADDPSZ128rr = 5076, |
| 5092 | VADDPSZ128rrk = 5077, |
| 5093 | VADDPSZ128rrkz = 5078, |
| 5094 | VADDPSZ256rm = 5079, |
| 5095 | VADDPSZ256rmb = 5080, |
| 5096 | VADDPSZ256rmbk = 5081, |
| 5097 | VADDPSZ256rmbkz = 5082, |
| 5098 | VADDPSZ256rmk = 5083, |
| 5099 | VADDPSZ256rmkz = 5084, |
| 5100 | VADDPSZ256rr = 5085, |
| 5101 | VADDPSZ256rrk = 5086, |
| 5102 | VADDPSZ256rrkz = 5087, |
| 5103 | VADDPSZrm = 5088, |
| 5104 | VADDPSZrmb = 5089, |
| 5105 | VADDPSZrmbk = 5090, |
| 5106 | VADDPSZrmbkz = 5091, |
| 5107 | VADDPSZrmk = 5092, |
| 5108 | VADDPSZrmkz = 5093, |
| 5109 | VADDPSZrr = 5094, |
| 5110 | VADDPSZrrb = 5095, |
| 5111 | VADDPSZrrbk = 5096, |
| 5112 | VADDPSZrrbkz = 5097, |
| 5113 | VADDPSZrrk = 5098, |
| 5114 | VADDPSZrrkz = 5099, |
| 5115 | VADDPSrm = 5100, |
| 5116 | VADDPSrr = 5101, |
| 5117 | VADDSDZrm = 5102, |
| 5118 | VADDSDZrm_Int = 5103, |
| 5119 | VADDSDZrm_Intk = 5104, |
| 5120 | VADDSDZrm_Intkz = 5105, |
| 5121 | VADDSDZrr = 5106, |
| 5122 | VADDSDZrr_Int = 5107, |
| 5123 | VADDSDZrr_Intk = 5108, |
| 5124 | VADDSDZrr_Intkz = 5109, |
| 5125 | VADDSDZrrb_Int = 5110, |
| 5126 | VADDSDZrrb_Intk = 5111, |
| 5127 | VADDSDZrrb_Intkz = 5112, |
| 5128 | VADDSDrm = 5113, |
| 5129 | VADDSDrm_Int = 5114, |
| 5130 | VADDSDrr = 5115, |
| 5131 | VADDSDrr_Int = 5116, |
| 5132 | VADDSHZrm = 5117, |
| 5133 | VADDSHZrm_Int = 5118, |
| 5134 | VADDSHZrm_Intk = 5119, |
| 5135 | VADDSHZrm_Intkz = 5120, |
| 5136 | VADDSHZrr = 5121, |
| 5137 | VADDSHZrr_Int = 5122, |
| 5138 | VADDSHZrr_Intk = 5123, |
| 5139 | VADDSHZrr_Intkz = 5124, |
| 5140 | VADDSHZrrb_Int = 5125, |
| 5141 | VADDSHZrrb_Intk = 5126, |
| 5142 | VADDSHZrrb_Intkz = 5127, |
| 5143 | VADDSSZrm = 5128, |
| 5144 | VADDSSZrm_Int = 5129, |
| 5145 | VADDSSZrm_Intk = 5130, |
| 5146 | VADDSSZrm_Intkz = 5131, |
| 5147 | VADDSSZrr = 5132, |
| 5148 | VADDSSZrr_Int = 5133, |
| 5149 | VADDSSZrr_Intk = 5134, |
| 5150 | VADDSSZrr_Intkz = 5135, |
| 5151 | VADDSSZrrb_Int = 5136, |
| 5152 | VADDSSZrrb_Intk = 5137, |
| 5153 | VADDSSZrrb_Intkz = 5138, |
| 5154 | VADDSSrm = 5139, |
| 5155 | VADDSSrm_Int = 5140, |
| 5156 | VADDSSrr = 5141, |
| 5157 | VADDSSrr_Int = 5142, |
| 5158 | VADDSUBPDYrm = 5143, |
| 5159 | VADDSUBPDYrr = 5144, |
| 5160 | VADDSUBPDrm = 5145, |
| 5161 | VADDSUBPDrr = 5146, |
| 5162 | VADDSUBPSYrm = 5147, |
| 5163 | VADDSUBPSYrr = 5148, |
| 5164 | VADDSUBPSrm = 5149, |
| 5165 | VADDSUBPSrr = 5150, |
| 5166 | VAESDECLASTYrm = 5151, |
| 5167 | VAESDECLASTYrr = 5152, |
| 5168 | VAESDECLASTZ128rm = 5153, |
| 5169 | VAESDECLASTZ128rr = 5154, |
| 5170 | VAESDECLASTZ256rm = 5155, |
| 5171 | VAESDECLASTZ256rr = 5156, |
| 5172 | VAESDECLASTZrm = 5157, |
| 5173 | VAESDECLASTZrr = 5158, |
| 5174 | VAESDECLASTrm = 5159, |
| 5175 | VAESDECLASTrr = 5160, |
| 5176 | VAESDECYrm = 5161, |
| 5177 | VAESDECYrr = 5162, |
| 5178 | VAESDECZ128rm = 5163, |
| 5179 | VAESDECZ128rr = 5164, |
| 5180 | VAESDECZ256rm = 5165, |
| 5181 | VAESDECZ256rr = 5166, |
| 5182 | VAESDECZrm = 5167, |
| 5183 | VAESDECZrr = 5168, |
| 5184 | VAESDECrm = 5169, |
| 5185 | VAESDECrr = 5170, |
| 5186 | VAESENCLASTYrm = 5171, |
| 5187 | VAESENCLASTYrr = 5172, |
| 5188 | VAESENCLASTZ128rm = 5173, |
| 5189 | VAESENCLASTZ128rr = 5174, |
| 5190 | VAESENCLASTZ256rm = 5175, |
| 5191 | VAESENCLASTZ256rr = 5176, |
| 5192 | VAESENCLASTZrm = 5177, |
| 5193 | VAESENCLASTZrr = 5178, |
| 5194 | VAESENCLASTrm = 5179, |
| 5195 | VAESENCLASTrr = 5180, |
| 5196 | VAESENCYrm = 5181, |
| 5197 | VAESENCYrr = 5182, |
| 5198 | VAESENCZ128rm = 5183, |
| 5199 | VAESENCZ128rr = 5184, |
| 5200 | VAESENCZ256rm = 5185, |
| 5201 | VAESENCZ256rr = 5186, |
| 5202 | VAESENCZrm = 5187, |
| 5203 | VAESENCZrr = 5188, |
| 5204 | VAESENCrm = 5189, |
| 5205 | VAESENCrr = 5190, |
| 5206 | VAESIMCrm = 5191, |
| 5207 | VAESIMCrr = 5192, |
| 5208 | VAESKEYGENASSIST128rm = 5193, |
| 5209 | VAESKEYGENASSIST128rr = 5194, |
| 5210 | VALIGNDZ128rmbi = 5195, |
| 5211 | VALIGNDZ128rmbik = 5196, |
| 5212 | VALIGNDZ128rmbikz = 5197, |
| 5213 | VALIGNDZ128rmi = 5198, |
| 5214 | VALIGNDZ128rmik = 5199, |
| 5215 | VALIGNDZ128rmikz = 5200, |
| 5216 | VALIGNDZ128rri = 5201, |
| 5217 | VALIGNDZ128rrik = 5202, |
| 5218 | VALIGNDZ128rrikz = 5203, |
| 5219 | VALIGNDZ256rmbi = 5204, |
| 5220 | VALIGNDZ256rmbik = 5205, |
| 5221 | VALIGNDZ256rmbikz = 5206, |
| 5222 | VALIGNDZ256rmi = 5207, |
| 5223 | VALIGNDZ256rmik = 5208, |
| 5224 | VALIGNDZ256rmikz = 5209, |
| 5225 | VALIGNDZ256rri = 5210, |
| 5226 | VALIGNDZ256rrik = 5211, |
| 5227 | VALIGNDZ256rrikz = 5212, |
| 5228 | VALIGNDZrmbi = 5213, |
| 5229 | VALIGNDZrmbik = 5214, |
| 5230 | VALIGNDZrmbikz = 5215, |
| 5231 | VALIGNDZrmi = 5216, |
| 5232 | VALIGNDZrmik = 5217, |
| 5233 | VALIGNDZrmikz = 5218, |
| 5234 | VALIGNDZrri = 5219, |
| 5235 | VALIGNDZrrik = 5220, |
| 5236 | VALIGNDZrrikz = 5221, |
| 5237 | VALIGNQZ128rmbi = 5222, |
| 5238 | VALIGNQZ128rmbik = 5223, |
| 5239 | VALIGNQZ128rmbikz = 5224, |
| 5240 | VALIGNQZ128rmi = 5225, |
| 5241 | VALIGNQZ128rmik = 5226, |
| 5242 | VALIGNQZ128rmikz = 5227, |
| 5243 | VALIGNQZ128rri = 5228, |
| 5244 | VALIGNQZ128rrik = 5229, |
| 5245 | VALIGNQZ128rrikz = 5230, |
| 5246 | VALIGNQZ256rmbi = 5231, |
| 5247 | VALIGNQZ256rmbik = 5232, |
| 5248 | VALIGNQZ256rmbikz = 5233, |
| 5249 | VALIGNQZ256rmi = 5234, |
| 5250 | VALIGNQZ256rmik = 5235, |
| 5251 | VALIGNQZ256rmikz = 5236, |
| 5252 | VALIGNQZ256rri = 5237, |
| 5253 | VALIGNQZ256rrik = 5238, |
| 5254 | VALIGNQZ256rrikz = 5239, |
| 5255 | VALIGNQZrmbi = 5240, |
| 5256 | VALIGNQZrmbik = 5241, |
| 5257 | VALIGNQZrmbikz = 5242, |
| 5258 | VALIGNQZrmi = 5243, |
| 5259 | VALIGNQZrmik = 5244, |
| 5260 | VALIGNQZrmikz = 5245, |
| 5261 | VALIGNQZrri = 5246, |
| 5262 | VALIGNQZrrik = 5247, |
| 5263 | VALIGNQZrrikz = 5248, |
| 5264 | VANDNPDYrm = 5249, |
| 5265 | VANDNPDYrr = 5250, |
| 5266 | VANDNPDZ128rm = 5251, |
| 5267 | VANDNPDZ128rmb = 5252, |
| 5268 | VANDNPDZ128rmbk = 5253, |
| 5269 | VANDNPDZ128rmbkz = 5254, |
| 5270 | VANDNPDZ128rmk = 5255, |
| 5271 | VANDNPDZ128rmkz = 5256, |
| 5272 | VANDNPDZ128rr = 5257, |
| 5273 | VANDNPDZ128rrk = 5258, |
| 5274 | VANDNPDZ128rrkz = 5259, |
| 5275 | VANDNPDZ256rm = 5260, |
| 5276 | VANDNPDZ256rmb = 5261, |
| 5277 | VANDNPDZ256rmbk = 5262, |
| 5278 | VANDNPDZ256rmbkz = 5263, |
| 5279 | VANDNPDZ256rmk = 5264, |
| 5280 | VANDNPDZ256rmkz = 5265, |
| 5281 | VANDNPDZ256rr = 5266, |
| 5282 | VANDNPDZ256rrk = 5267, |
| 5283 | VANDNPDZ256rrkz = 5268, |
| 5284 | VANDNPDZrm = 5269, |
| 5285 | VANDNPDZrmb = 5270, |
| 5286 | VANDNPDZrmbk = 5271, |
| 5287 | VANDNPDZrmbkz = 5272, |
| 5288 | VANDNPDZrmk = 5273, |
| 5289 | VANDNPDZrmkz = 5274, |
| 5290 | VANDNPDZrr = 5275, |
| 5291 | VANDNPDZrrk = 5276, |
| 5292 | VANDNPDZrrkz = 5277, |
| 5293 | VANDNPDrm = 5278, |
| 5294 | VANDNPDrr = 5279, |
| 5295 | VANDNPSYrm = 5280, |
| 5296 | VANDNPSYrr = 5281, |
| 5297 | VANDNPSZ128rm = 5282, |
| 5298 | VANDNPSZ128rmb = 5283, |
| 5299 | VANDNPSZ128rmbk = 5284, |
| 5300 | VANDNPSZ128rmbkz = 5285, |
| 5301 | VANDNPSZ128rmk = 5286, |
| 5302 | VANDNPSZ128rmkz = 5287, |
| 5303 | VANDNPSZ128rr = 5288, |
| 5304 | VANDNPSZ128rrk = 5289, |
| 5305 | VANDNPSZ128rrkz = 5290, |
| 5306 | VANDNPSZ256rm = 5291, |
| 5307 | VANDNPSZ256rmb = 5292, |
| 5308 | VANDNPSZ256rmbk = 5293, |
| 5309 | VANDNPSZ256rmbkz = 5294, |
| 5310 | VANDNPSZ256rmk = 5295, |
| 5311 | VANDNPSZ256rmkz = 5296, |
| 5312 | VANDNPSZ256rr = 5297, |
| 5313 | VANDNPSZ256rrk = 5298, |
| 5314 | VANDNPSZ256rrkz = 5299, |
| 5315 | VANDNPSZrm = 5300, |
| 5316 | VANDNPSZrmb = 5301, |
| 5317 | VANDNPSZrmbk = 5302, |
| 5318 | VANDNPSZrmbkz = 5303, |
| 5319 | VANDNPSZrmk = 5304, |
| 5320 | VANDNPSZrmkz = 5305, |
| 5321 | VANDNPSZrr = 5306, |
| 5322 | VANDNPSZrrk = 5307, |
| 5323 | VANDNPSZrrkz = 5308, |
| 5324 | VANDNPSrm = 5309, |
| 5325 | VANDNPSrr = 5310, |
| 5326 | VANDPDYrm = 5311, |
| 5327 | VANDPDYrr = 5312, |
| 5328 | VANDPDZ128rm = 5313, |
| 5329 | VANDPDZ128rmb = 5314, |
| 5330 | VANDPDZ128rmbk = 5315, |
| 5331 | VANDPDZ128rmbkz = 5316, |
| 5332 | VANDPDZ128rmk = 5317, |
| 5333 | VANDPDZ128rmkz = 5318, |
| 5334 | VANDPDZ128rr = 5319, |
| 5335 | VANDPDZ128rrk = 5320, |
| 5336 | VANDPDZ128rrkz = 5321, |
| 5337 | VANDPDZ256rm = 5322, |
| 5338 | VANDPDZ256rmb = 5323, |
| 5339 | VANDPDZ256rmbk = 5324, |
| 5340 | VANDPDZ256rmbkz = 5325, |
| 5341 | VANDPDZ256rmk = 5326, |
| 5342 | VANDPDZ256rmkz = 5327, |
| 5343 | VANDPDZ256rr = 5328, |
| 5344 | VANDPDZ256rrk = 5329, |
| 5345 | VANDPDZ256rrkz = 5330, |
| 5346 | VANDPDZrm = 5331, |
| 5347 | VANDPDZrmb = 5332, |
| 5348 | VANDPDZrmbk = 5333, |
| 5349 | VANDPDZrmbkz = 5334, |
| 5350 | VANDPDZrmk = 5335, |
| 5351 | VANDPDZrmkz = 5336, |
| 5352 | VANDPDZrr = 5337, |
| 5353 | VANDPDZrrk = 5338, |
| 5354 | VANDPDZrrkz = 5339, |
| 5355 | VANDPDrm = 5340, |
| 5356 | VANDPDrr = 5341, |
| 5357 | VANDPSYrm = 5342, |
| 5358 | VANDPSYrr = 5343, |
| 5359 | VANDPSZ128rm = 5344, |
| 5360 | VANDPSZ128rmb = 5345, |
| 5361 | VANDPSZ128rmbk = 5346, |
| 5362 | VANDPSZ128rmbkz = 5347, |
| 5363 | VANDPSZ128rmk = 5348, |
| 5364 | VANDPSZ128rmkz = 5349, |
| 5365 | VANDPSZ128rr = 5350, |
| 5366 | VANDPSZ128rrk = 5351, |
| 5367 | VANDPSZ128rrkz = 5352, |
| 5368 | VANDPSZ256rm = 5353, |
| 5369 | VANDPSZ256rmb = 5354, |
| 5370 | VANDPSZ256rmbk = 5355, |
| 5371 | VANDPSZ256rmbkz = 5356, |
| 5372 | VANDPSZ256rmk = 5357, |
| 5373 | VANDPSZ256rmkz = 5358, |
| 5374 | VANDPSZ256rr = 5359, |
| 5375 | VANDPSZ256rrk = 5360, |
| 5376 | VANDPSZ256rrkz = 5361, |
| 5377 | VANDPSZrm = 5362, |
| 5378 | VANDPSZrmb = 5363, |
| 5379 | VANDPSZrmbk = 5364, |
| 5380 | VANDPSZrmbkz = 5365, |
| 5381 | VANDPSZrmk = 5366, |
| 5382 | VANDPSZrmkz = 5367, |
| 5383 | VANDPSZrr = 5368, |
| 5384 | VANDPSZrrk = 5369, |
| 5385 | VANDPSZrrkz = 5370, |
| 5386 | VANDPSrm = 5371, |
| 5387 | VANDPSrr = 5372, |
| 5388 | VASTART_SAVE_XMM_REGS = 5373, |
| 5389 | VBCSTNEBF162PSYrm = 5374, |
| 5390 | VBCSTNEBF162PSrm = 5375, |
| 5391 | VBCSTNESH2PSYrm = 5376, |
| 5392 | VBCSTNESH2PSrm = 5377, |
| 5393 | VBLENDMPDZ128rm = 5378, |
| 5394 | VBLENDMPDZ128rmb = 5379, |
| 5395 | VBLENDMPDZ128rmbk = 5380, |
| 5396 | VBLENDMPDZ128rmbkz = 5381, |
| 5397 | VBLENDMPDZ128rmk = 5382, |
| 5398 | VBLENDMPDZ128rmkz = 5383, |
| 5399 | VBLENDMPDZ128rr = 5384, |
| 5400 | VBLENDMPDZ128rrk = 5385, |
| 5401 | VBLENDMPDZ128rrkz = 5386, |
| 5402 | VBLENDMPDZ256rm = 5387, |
| 5403 | VBLENDMPDZ256rmb = 5388, |
| 5404 | VBLENDMPDZ256rmbk = 5389, |
| 5405 | VBLENDMPDZ256rmbkz = 5390, |
| 5406 | VBLENDMPDZ256rmk = 5391, |
| 5407 | VBLENDMPDZ256rmkz = 5392, |
| 5408 | VBLENDMPDZ256rr = 5393, |
| 5409 | VBLENDMPDZ256rrk = 5394, |
| 5410 | VBLENDMPDZ256rrkz = 5395, |
| 5411 | VBLENDMPDZrm = 5396, |
| 5412 | VBLENDMPDZrmb = 5397, |
| 5413 | VBLENDMPDZrmbk = 5398, |
| 5414 | VBLENDMPDZrmbkz = 5399, |
| 5415 | VBLENDMPDZrmk = 5400, |
| 5416 | VBLENDMPDZrmkz = 5401, |
| 5417 | VBLENDMPDZrr = 5402, |
| 5418 | VBLENDMPDZrrk = 5403, |
| 5419 | VBLENDMPDZrrkz = 5404, |
| 5420 | VBLENDMPSZ128rm = 5405, |
| 5421 | VBLENDMPSZ128rmb = 5406, |
| 5422 | VBLENDMPSZ128rmbk = 5407, |
| 5423 | VBLENDMPSZ128rmbkz = 5408, |
| 5424 | VBLENDMPSZ128rmk = 5409, |
| 5425 | VBLENDMPSZ128rmkz = 5410, |
| 5426 | VBLENDMPSZ128rr = 5411, |
| 5427 | VBLENDMPSZ128rrk = 5412, |
| 5428 | VBLENDMPSZ128rrkz = 5413, |
| 5429 | VBLENDMPSZ256rm = 5414, |
| 5430 | VBLENDMPSZ256rmb = 5415, |
| 5431 | VBLENDMPSZ256rmbk = 5416, |
| 5432 | VBLENDMPSZ256rmbkz = 5417, |
| 5433 | VBLENDMPSZ256rmk = 5418, |
| 5434 | VBLENDMPSZ256rmkz = 5419, |
| 5435 | VBLENDMPSZ256rr = 5420, |
| 5436 | VBLENDMPSZ256rrk = 5421, |
| 5437 | VBLENDMPSZ256rrkz = 5422, |
| 5438 | VBLENDMPSZrm = 5423, |
| 5439 | VBLENDMPSZrmb = 5424, |
| 5440 | VBLENDMPSZrmbk = 5425, |
| 5441 | VBLENDMPSZrmbkz = 5426, |
| 5442 | VBLENDMPSZrmk = 5427, |
| 5443 | VBLENDMPSZrmkz = 5428, |
| 5444 | VBLENDMPSZrr = 5429, |
| 5445 | VBLENDMPSZrrk = 5430, |
| 5446 | VBLENDMPSZrrkz = 5431, |
| 5447 | VBLENDPDYrmi = 5432, |
| 5448 | VBLENDPDYrri = 5433, |
| 5449 | VBLENDPDrmi = 5434, |
| 5450 | VBLENDPDrri = 5435, |
| 5451 | VBLENDPSYrmi = 5436, |
| 5452 | VBLENDPSYrri = 5437, |
| 5453 | VBLENDPSrmi = 5438, |
| 5454 | VBLENDPSrri = 5439, |
| 5455 | VBLENDVPDYrmr = 5440, |
| 5456 | VBLENDVPDYrrr = 5441, |
| 5457 | VBLENDVPDrmr = 5442, |
| 5458 | VBLENDVPDrrr = 5443, |
| 5459 | VBLENDVPSYrmr = 5444, |
| 5460 | VBLENDVPSYrrr = 5445, |
| 5461 | VBLENDVPSrmr = 5446, |
| 5462 | VBLENDVPSrrr = 5447, |
| 5463 | VBROADCASTF128rm = 5448, |
| 5464 | VBROADCASTF32X2Z256rm = 5449, |
| 5465 | VBROADCASTF32X2Z256rmk = 5450, |
| 5466 | VBROADCASTF32X2Z256rmkz = 5451, |
| 5467 | VBROADCASTF32X2Z256rr = 5452, |
| 5468 | VBROADCASTF32X2Z256rrk = 5453, |
| 5469 | VBROADCASTF32X2Z256rrkz = 5454, |
| 5470 | VBROADCASTF32X2Zrm = 5455, |
| 5471 | VBROADCASTF32X2Zrmk = 5456, |
| 5472 | VBROADCASTF32X2Zrmkz = 5457, |
| 5473 | VBROADCASTF32X2Zrr = 5458, |
| 5474 | VBROADCASTF32X2Zrrk = 5459, |
| 5475 | VBROADCASTF32X2Zrrkz = 5460, |
| 5476 | VBROADCASTF32X4Z256rm = 5461, |
| 5477 | VBROADCASTF32X4Z256rmk = 5462, |
| 5478 | VBROADCASTF32X4Z256rmkz = 5463, |
| 5479 | VBROADCASTF32X4rm = 5464, |
| 5480 | VBROADCASTF32X4rmk = 5465, |
| 5481 | VBROADCASTF32X4rmkz = 5466, |
| 5482 | VBROADCASTF32X8rm = 5467, |
| 5483 | VBROADCASTF32X8rmk = 5468, |
| 5484 | VBROADCASTF32X8rmkz = 5469, |
| 5485 | VBROADCASTF64X2Z128rm = 5470, |
| 5486 | VBROADCASTF64X2Z128rmk = 5471, |
| 5487 | VBROADCASTF64X2Z128rmkz = 5472, |
| 5488 | VBROADCASTF64X2rm = 5473, |
| 5489 | VBROADCASTF64X2rmk = 5474, |
| 5490 | VBROADCASTF64X2rmkz = 5475, |
| 5491 | VBROADCASTF64X4rm = 5476, |
| 5492 | VBROADCASTF64X4rmk = 5477, |
| 5493 | VBROADCASTF64X4rmkz = 5478, |
| 5494 | VBROADCASTI128rm = 5479, |
| 5495 | VBROADCASTI32X2Z128rm = 5480, |
| 5496 | VBROADCASTI32X2Z128rmk = 5481, |
| 5497 | VBROADCASTI32X2Z128rmkz = 5482, |
| 5498 | VBROADCASTI32X2Z128rr = 5483, |
| 5499 | VBROADCASTI32X2Z128rrk = 5484, |
| 5500 | VBROADCASTI32X2Z128rrkz = 5485, |
| 5501 | VBROADCASTI32X2Z256rm = 5486, |
| 5502 | VBROADCASTI32X2Z256rmk = 5487, |
| 5503 | VBROADCASTI32X2Z256rmkz = 5488, |
| 5504 | VBROADCASTI32X2Z256rr = 5489, |
| 5505 | VBROADCASTI32X2Z256rrk = 5490, |
| 5506 | VBROADCASTI32X2Z256rrkz = 5491, |
| 5507 | VBROADCASTI32X2Zrm = 5492, |
| 5508 | VBROADCASTI32X2Zrmk = 5493, |
| 5509 | VBROADCASTI32X2Zrmkz = 5494, |
| 5510 | VBROADCASTI32X2Zrr = 5495, |
| 5511 | VBROADCASTI32X2Zrrk = 5496, |
| 5512 | VBROADCASTI32X2Zrrkz = 5497, |
| 5513 | VBROADCASTI32X4Z256rm = 5498, |
| 5514 | VBROADCASTI32X4Z256rmk = 5499, |
| 5515 | VBROADCASTI32X4Z256rmkz = 5500, |
| 5516 | VBROADCASTI32X4rm = 5501, |
| 5517 | VBROADCASTI32X4rmk = 5502, |
| 5518 | VBROADCASTI32X4rmkz = 5503, |
| 5519 | VBROADCASTI32X8rm = 5504, |
| 5520 | VBROADCASTI32X8rmk = 5505, |
| 5521 | VBROADCASTI32X8rmkz = 5506, |
| 5522 | VBROADCASTI64X2Z128rm = 5507, |
| 5523 | VBROADCASTI64X2Z128rmk = 5508, |
| 5524 | VBROADCASTI64X2Z128rmkz = 5509, |
| 5525 | VBROADCASTI64X2rm = 5510, |
| 5526 | VBROADCASTI64X2rmk = 5511, |
| 5527 | VBROADCASTI64X2rmkz = 5512, |
| 5528 | VBROADCASTI64X4rm = 5513, |
| 5529 | VBROADCASTI64X4rmk = 5514, |
| 5530 | VBROADCASTI64X4rmkz = 5515, |
| 5531 | VBROADCASTSDYrm = 5516, |
| 5532 | VBROADCASTSDYrr = 5517, |
| 5533 | VBROADCASTSDZ256rm = 5518, |
| 5534 | VBROADCASTSDZ256rmk = 5519, |
| 5535 | VBROADCASTSDZ256rmkz = 5520, |
| 5536 | VBROADCASTSDZ256rr = 5521, |
| 5537 | VBROADCASTSDZ256rrk = 5522, |
| 5538 | VBROADCASTSDZ256rrkz = 5523, |
| 5539 | VBROADCASTSDZrm = 5524, |
| 5540 | VBROADCASTSDZrmk = 5525, |
| 5541 | VBROADCASTSDZrmkz = 5526, |
| 5542 | VBROADCASTSDZrr = 5527, |
| 5543 | VBROADCASTSDZrrk = 5528, |
| 5544 | VBROADCASTSDZrrkz = 5529, |
| 5545 | VBROADCASTSSYrm = 5530, |
| 5546 | VBROADCASTSSYrr = 5531, |
| 5547 | VBROADCASTSSZ128rm = 5532, |
| 5548 | VBROADCASTSSZ128rmk = 5533, |
| 5549 | VBROADCASTSSZ128rmkz = 5534, |
| 5550 | VBROADCASTSSZ128rr = 5535, |
| 5551 | VBROADCASTSSZ128rrk = 5536, |
| 5552 | VBROADCASTSSZ128rrkz = 5537, |
| 5553 | VBROADCASTSSZ256rm = 5538, |
| 5554 | VBROADCASTSSZ256rmk = 5539, |
| 5555 | VBROADCASTSSZ256rmkz = 5540, |
| 5556 | VBROADCASTSSZ256rr = 5541, |
| 5557 | VBROADCASTSSZ256rrk = 5542, |
| 5558 | VBROADCASTSSZ256rrkz = 5543, |
| 5559 | VBROADCASTSSZrm = 5544, |
| 5560 | VBROADCASTSSZrmk = 5545, |
| 5561 | VBROADCASTSSZrmkz = 5546, |
| 5562 | VBROADCASTSSZrr = 5547, |
| 5563 | VBROADCASTSSZrrk = 5548, |
| 5564 | VBROADCASTSSZrrkz = 5549, |
| 5565 | VBROADCASTSSrm = 5550, |
| 5566 | VBROADCASTSSrr = 5551, |
| 5567 | VCMPPDYrmi = 5552, |
| 5568 | VCMPPDYrri = 5553, |
| 5569 | VCMPPDZ128rmbi = 5554, |
| 5570 | VCMPPDZ128rmbik = 5555, |
| 5571 | VCMPPDZ128rmi = 5556, |
| 5572 | VCMPPDZ128rmik = 5557, |
| 5573 | VCMPPDZ128rri = 5558, |
| 5574 | VCMPPDZ128rrik = 5559, |
| 5575 | VCMPPDZ256rmbi = 5560, |
| 5576 | VCMPPDZ256rmbik = 5561, |
| 5577 | VCMPPDZ256rmi = 5562, |
| 5578 | VCMPPDZ256rmik = 5563, |
| 5579 | VCMPPDZ256rri = 5564, |
| 5580 | VCMPPDZ256rrik = 5565, |
| 5581 | VCMPPDZrmbi = 5566, |
| 5582 | VCMPPDZrmbik = 5567, |
| 5583 | VCMPPDZrmi = 5568, |
| 5584 | VCMPPDZrmik = 5569, |
| 5585 | VCMPPDZrri = 5570, |
| 5586 | VCMPPDZrrib = 5571, |
| 5587 | VCMPPDZrribk = 5572, |
| 5588 | VCMPPDZrrik = 5573, |
| 5589 | VCMPPDrmi = 5574, |
| 5590 | VCMPPDrri = 5575, |
| 5591 | VCMPPHZ128rmbi = 5576, |
| 5592 | VCMPPHZ128rmbik = 5577, |
| 5593 | VCMPPHZ128rmi = 5578, |
| 5594 | VCMPPHZ128rmik = 5579, |
| 5595 | VCMPPHZ128rri = 5580, |
| 5596 | VCMPPHZ128rrik = 5581, |
| 5597 | VCMPPHZ256rmbi = 5582, |
| 5598 | VCMPPHZ256rmbik = 5583, |
| 5599 | VCMPPHZ256rmi = 5584, |
| 5600 | VCMPPHZ256rmik = 5585, |
| 5601 | VCMPPHZ256rri = 5586, |
| 5602 | VCMPPHZ256rrik = 5587, |
| 5603 | VCMPPHZrmbi = 5588, |
| 5604 | VCMPPHZrmbik = 5589, |
| 5605 | VCMPPHZrmi = 5590, |
| 5606 | VCMPPHZrmik = 5591, |
| 5607 | VCMPPHZrri = 5592, |
| 5608 | VCMPPHZrrib = 5593, |
| 5609 | VCMPPHZrribk = 5594, |
| 5610 | VCMPPHZrrik = 5595, |
| 5611 | VCMPPSYrmi = 5596, |
| 5612 | VCMPPSYrri = 5597, |
| 5613 | VCMPPSZ128rmbi = 5598, |
| 5614 | VCMPPSZ128rmbik = 5599, |
| 5615 | VCMPPSZ128rmi = 5600, |
| 5616 | VCMPPSZ128rmik = 5601, |
| 5617 | VCMPPSZ128rri = 5602, |
| 5618 | VCMPPSZ128rrik = 5603, |
| 5619 | VCMPPSZ256rmbi = 5604, |
| 5620 | VCMPPSZ256rmbik = 5605, |
| 5621 | VCMPPSZ256rmi = 5606, |
| 5622 | VCMPPSZ256rmik = 5607, |
| 5623 | VCMPPSZ256rri = 5608, |
| 5624 | VCMPPSZ256rrik = 5609, |
| 5625 | VCMPPSZrmbi = 5610, |
| 5626 | VCMPPSZrmbik = 5611, |
| 5627 | VCMPPSZrmi = 5612, |
| 5628 | VCMPPSZrmik = 5613, |
| 5629 | VCMPPSZrri = 5614, |
| 5630 | VCMPPSZrrib = 5615, |
| 5631 | VCMPPSZrribk = 5616, |
| 5632 | VCMPPSZrrik = 5617, |
| 5633 | VCMPPSrmi = 5618, |
| 5634 | VCMPPSrri = 5619, |
| 5635 | VCMPSDZrmi = 5620, |
| 5636 | VCMPSDZrmi_Int = 5621, |
| 5637 | VCMPSDZrmi_Intk = 5622, |
| 5638 | VCMPSDZrri = 5623, |
| 5639 | VCMPSDZrri_Int = 5624, |
| 5640 | VCMPSDZrri_Intk = 5625, |
| 5641 | VCMPSDZrrib_Int = 5626, |
| 5642 | VCMPSDZrrib_Intk = 5627, |
| 5643 | VCMPSDrmi = 5628, |
| 5644 | VCMPSDrmi_Int = 5629, |
| 5645 | VCMPSDrri = 5630, |
| 5646 | VCMPSDrri_Int = 5631, |
| 5647 | VCMPSHZrmi = 5632, |
| 5648 | VCMPSHZrmi_Int = 5633, |
| 5649 | VCMPSHZrmi_Intk = 5634, |
| 5650 | VCMPSHZrri = 5635, |
| 5651 | VCMPSHZrri_Int = 5636, |
| 5652 | VCMPSHZrri_Intk = 5637, |
| 5653 | VCMPSHZrrib_Int = 5638, |
| 5654 | VCMPSHZrrib_Intk = 5639, |
| 5655 | VCMPSSZrmi = 5640, |
| 5656 | VCMPSSZrmi_Int = 5641, |
| 5657 | VCMPSSZrmi_Intk = 5642, |
| 5658 | VCMPSSZrri = 5643, |
| 5659 | VCMPSSZrri_Int = 5644, |
| 5660 | VCMPSSZrri_Intk = 5645, |
| 5661 | VCMPSSZrrib_Int = 5646, |
| 5662 | VCMPSSZrrib_Intk = 5647, |
| 5663 | VCMPSSrmi = 5648, |
| 5664 | VCMPSSrmi_Int = 5649, |
| 5665 | VCMPSSrri = 5650, |
| 5666 | VCMPSSrri_Int = 5651, |
| 5667 | VCOMISDZrm = 5652, |
| 5668 | VCOMISDZrm_Int = 5653, |
| 5669 | VCOMISDZrr = 5654, |
| 5670 | VCOMISDZrr_Int = 5655, |
| 5671 | VCOMISDZrrb = 5656, |
| 5672 | VCOMISDrm = 5657, |
| 5673 | VCOMISDrm_Int = 5658, |
| 5674 | VCOMISDrr = 5659, |
| 5675 | VCOMISDrr_Int = 5660, |
| 5676 | VCOMISHZrm = 5661, |
| 5677 | VCOMISHZrm_Int = 5662, |
| 5678 | VCOMISHZrr = 5663, |
| 5679 | VCOMISHZrr_Int = 5664, |
| 5680 | VCOMISHZrrb = 5665, |
| 5681 | VCOMISSZrm = 5666, |
| 5682 | VCOMISSZrm_Int = 5667, |
| 5683 | VCOMISSZrr = 5668, |
| 5684 | VCOMISSZrr_Int = 5669, |
| 5685 | VCOMISSZrrb = 5670, |
| 5686 | VCOMISSrm = 5671, |
| 5687 | VCOMISSrm_Int = 5672, |
| 5688 | VCOMISSrr = 5673, |
| 5689 | VCOMISSrr_Int = 5674, |
| 5690 | VCOMPRESSPDZ128mr = 5675, |
| 5691 | VCOMPRESSPDZ128mrk = 5676, |
| 5692 | VCOMPRESSPDZ128rr = 5677, |
| 5693 | VCOMPRESSPDZ128rrk = 5678, |
| 5694 | VCOMPRESSPDZ128rrkz = 5679, |
| 5695 | VCOMPRESSPDZ256mr = 5680, |
| 5696 | VCOMPRESSPDZ256mrk = 5681, |
| 5697 | VCOMPRESSPDZ256rr = 5682, |
| 5698 | VCOMPRESSPDZ256rrk = 5683, |
| 5699 | VCOMPRESSPDZ256rrkz = 5684, |
| 5700 | VCOMPRESSPDZmr = 5685, |
| 5701 | VCOMPRESSPDZmrk = 5686, |
| 5702 | VCOMPRESSPDZrr = 5687, |
| 5703 | VCOMPRESSPDZrrk = 5688, |
| 5704 | VCOMPRESSPDZrrkz = 5689, |
| 5705 | VCOMPRESSPSZ128mr = 5690, |
| 5706 | VCOMPRESSPSZ128mrk = 5691, |
| 5707 | VCOMPRESSPSZ128rr = 5692, |
| 5708 | VCOMPRESSPSZ128rrk = 5693, |
| 5709 | VCOMPRESSPSZ128rrkz = 5694, |
| 5710 | VCOMPRESSPSZ256mr = 5695, |
| 5711 | VCOMPRESSPSZ256mrk = 5696, |
| 5712 | VCOMPRESSPSZ256rr = 5697, |
| 5713 | VCOMPRESSPSZ256rrk = 5698, |
| 5714 | VCOMPRESSPSZ256rrkz = 5699, |
| 5715 | VCOMPRESSPSZmr = 5700, |
| 5716 | VCOMPRESSPSZmrk = 5701, |
| 5717 | VCOMPRESSPSZrr = 5702, |
| 5718 | VCOMPRESSPSZrrk = 5703, |
| 5719 | VCOMPRESSPSZrrkz = 5704, |
| 5720 | VCVTDQ2PDYrm = 5705, |
| 5721 | VCVTDQ2PDYrr = 5706, |
| 5722 | VCVTDQ2PDZ128rm = 5707, |
| 5723 | VCVTDQ2PDZ128rmb = 5708, |
| 5724 | VCVTDQ2PDZ128rmbk = 5709, |
| 5725 | VCVTDQ2PDZ128rmbkz = 5710, |
| 5726 | VCVTDQ2PDZ128rmk = 5711, |
| 5727 | VCVTDQ2PDZ128rmkz = 5712, |
| 5728 | VCVTDQ2PDZ128rr = 5713, |
| 5729 | VCVTDQ2PDZ128rrk = 5714, |
| 5730 | VCVTDQ2PDZ128rrkz = 5715, |
| 5731 | VCVTDQ2PDZ256rm = 5716, |
| 5732 | VCVTDQ2PDZ256rmb = 5717, |
| 5733 | VCVTDQ2PDZ256rmbk = 5718, |
| 5734 | VCVTDQ2PDZ256rmbkz = 5719, |
| 5735 | VCVTDQ2PDZ256rmk = 5720, |
| 5736 | VCVTDQ2PDZ256rmkz = 5721, |
| 5737 | VCVTDQ2PDZ256rr = 5722, |
| 5738 | VCVTDQ2PDZ256rrk = 5723, |
| 5739 | VCVTDQ2PDZ256rrkz = 5724, |
| 5740 | VCVTDQ2PDZrm = 5725, |
| 5741 | VCVTDQ2PDZrmb = 5726, |
| 5742 | VCVTDQ2PDZrmbk = 5727, |
| 5743 | VCVTDQ2PDZrmbkz = 5728, |
| 5744 | VCVTDQ2PDZrmk = 5729, |
| 5745 | VCVTDQ2PDZrmkz = 5730, |
| 5746 | VCVTDQ2PDZrr = 5731, |
| 5747 | VCVTDQ2PDZrrk = 5732, |
| 5748 | VCVTDQ2PDZrrkz = 5733, |
| 5749 | VCVTDQ2PDrm = 5734, |
| 5750 | VCVTDQ2PDrr = 5735, |
| 5751 | VCVTDQ2PHZ128rm = 5736, |
| 5752 | VCVTDQ2PHZ128rmb = 5737, |
| 5753 | VCVTDQ2PHZ128rmbk = 5738, |
| 5754 | VCVTDQ2PHZ128rmbkz = 5739, |
| 5755 | VCVTDQ2PHZ128rmk = 5740, |
| 5756 | VCVTDQ2PHZ128rmkz = 5741, |
| 5757 | VCVTDQ2PHZ128rr = 5742, |
| 5758 | VCVTDQ2PHZ128rrk = 5743, |
| 5759 | VCVTDQ2PHZ128rrkz = 5744, |
| 5760 | VCVTDQ2PHZ256rm = 5745, |
| 5761 | VCVTDQ2PHZ256rmb = 5746, |
| 5762 | VCVTDQ2PHZ256rmbk = 5747, |
| 5763 | VCVTDQ2PHZ256rmbkz = 5748, |
| 5764 | VCVTDQ2PHZ256rmk = 5749, |
| 5765 | VCVTDQ2PHZ256rmkz = 5750, |
| 5766 | VCVTDQ2PHZ256rr = 5751, |
| 5767 | VCVTDQ2PHZ256rrk = 5752, |
| 5768 | VCVTDQ2PHZ256rrkz = 5753, |
| 5769 | VCVTDQ2PHZrm = 5754, |
| 5770 | VCVTDQ2PHZrmb = 5755, |
| 5771 | VCVTDQ2PHZrmbk = 5756, |
| 5772 | VCVTDQ2PHZrmbkz = 5757, |
| 5773 | VCVTDQ2PHZrmk = 5758, |
| 5774 | VCVTDQ2PHZrmkz = 5759, |
| 5775 | VCVTDQ2PHZrr = 5760, |
| 5776 | VCVTDQ2PHZrrb = 5761, |
| 5777 | VCVTDQ2PHZrrbk = 5762, |
| 5778 | VCVTDQ2PHZrrbkz = 5763, |
| 5779 | VCVTDQ2PHZrrk = 5764, |
| 5780 | VCVTDQ2PHZrrkz = 5765, |
| 5781 | VCVTDQ2PSYrm = 5766, |
| 5782 | VCVTDQ2PSYrr = 5767, |
| 5783 | VCVTDQ2PSZ128rm = 5768, |
| 5784 | VCVTDQ2PSZ128rmb = 5769, |
| 5785 | VCVTDQ2PSZ128rmbk = 5770, |
| 5786 | VCVTDQ2PSZ128rmbkz = 5771, |
| 5787 | VCVTDQ2PSZ128rmk = 5772, |
| 5788 | VCVTDQ2PSZ128rmkz = 5773, |
| 5789 | VCVTDQ2PSZ128rr = 5774, |
| 5790 | VCVTDQ2PSZ128rrk = 5775, |
| 5791 | VCVTDQ2PSZ128rrkz = 5776, |
| 5792 | VCVTDQ2PSZ256rm = 5777, |
| 5793 | VCVTDQ2PSZ256rmb = 5778, |
| 5794 | VCVTDQ2PSZ256rmbk = 5779, |
| 5795 | VCVTDQ2PSZ256rmbkz = 5780, |
| 5796 | VCVTDQ2PSZ256rmk = 5781, |
| 5797 | VCVTDQ2PSZ256rmkz = 5782, |
| 5798 | VCVTDQ2PSZ256rr = 5783, |
| 5799 | VCVTDQ2PSZ256rrk = 5784, |
| 5800 | VCVTDQ2PSZ256rrkz = 5785, |
| 5801 | VCVTDQ2PSZrm = 5786, |
| 5802 | VCVTDQ2PSZrmb = 5787, |
| 5803 | VCVTDQ2PSZrmbk = 5788, |
| 5804 | VCVTDQ2PSZrmbkz = 5789, |
| 5805 | VCVTDQ2PSZrmk = 5790, |
| 5806 | VCVTDQ2PSZrmkz = 5791, |
| 5807 | VCVTDQ2PSZrr = 5792, |
| 5808 | VCVTDQ2PSZrrb = 5793, |
| 5809 | VCVTDQ2PSZrrbk = 5794, |
| 5810 | VCVTDQ2PSZrrbkz = 5795, |
| 5811 | VCVTDQ2PSZrrk = 5796, |
| 5812 | VCVTDQ2PSZrrkz = 5797, |
| 5813 | VCVTDQ2PSrm = 5798, |
| 5814 | VCVTDQ2PSrr = 5799, |
| 5815 | VCVTNE2PS2BF16Z128rm = 5800, |
| 5816 | VCVTNE2PS2BF16Z128rmb = 5801, |
| 5817 | VCVTNE2PS2BF16Z128rmbk = 5802, |
| 5818 | VCVTNE2PS2BF16Z128rmbkz = 5803, |
| 5819 | VCVTNE2PS2BF16Z128rmk = 5804, |
| 5820 | VCVTNE2PS2BF16Z128rmkz = 5805, |
| 5821 | VCVTNE2PS2BF16Z128rr = 5806, |
| 5822 | VCVTNE2PS2BF16Z128rrk = 5807, |
| 5823 | VCVTNE2PS2BF16Z128rrkz = 5808, |
| 5824 | VCVTNE2PS2BF16Z256rm = 5809, |
| 5825 | VCVTNE2PS2BF16Z256rmb = 5810, |
| 5826 | VCVTNE2PS2BF16Z256rmbk = 5811, |
| 5827 | VCVTNE2PS2BF16Z256rmbkz = 5812, |
| 5828 | VCVTNE2PS2BF16Z256rmk = 5813, |
| 5829 | VCVTNE2PS2BF16Z256rmkz = 5814, |
| 5830 | VCVTNE2PS2BF16Z256rr = 5815, |
| 5831 | VCVTNE2PS2BF16Z256rrk = 5816, |
| 5832 | VCVTNE2PS2BF16Z256rrkz = 5817, |
| 5833 | VCVTNE2PS2BF16Zrm = 5818, |
| 5834 | VCVTNE2PS2BF16Zrmb = 5819, |
| 5835 | VCVTNE2PS2BF16Zrmbk = 5820, |
| 5836 | VCVTNE2PS2BF16Zrmbkz = 5821, |
| 5837 | VCVTNE2PS2BF16Zrmk = 5822, |
| 5838 | VCVTNE2PS2BF16Zrmkz = 5823, |
| 5839 | VCVTNE2PS2BF16Zrr = 5824, |
| 5840 | VCVTNE2PS2BF16Zrrk = 5825, |
| 5841 | VCVTNE2PS2BF16Zrrkz = 5826, |
| 5842 | VCVTNEEBF162PSYrm = 5827, |
| 5843 | VCVTNEEBF162PSrm = 5828, |
| 5844 | VCVTNEEPH2PSYrm = 5829, |
| 5845 | VCVTNEEPH2PSrm = 5830, |
| 5846 | VCVTNEOBF162PSYrm = 5831, |
| 5847 | VCVTNEOBF162PSrm = 5832, |
| 5848 | VCVTNEOPH2PSYrm = 5833, |
| 5849 | VCVTNEOPH2PSrm = 5834, |
| 5850 | VCVTNEPS2BF16Yrm = 5835, |
| 5851 | VCVTNEPS2BF16Yrr = 5836, |
| 5852 | VCVTNEPS2BF16Z128rm = 5837, |
| 5853 | VCVTNEPS2BF16Z128rmb = 5838, |
| 5854 | VCVTNEPS2BF16Z128rmbk = 5839, |
| 5855 | VCVTNEPS2BF16Z128rmbkz = 5840, |
| 5856 | VCVTNEPS2BF16Z128rmk = 5841, |
| 5857 | VCVTNEPS2BF16Z128rmkz = 5842, |
| 5858 | VCVTNEPS2BF16Z128rr = 5843, |
| 5859 | VCVTNEPS2BF16Z128rrk = 5844, |
| 5860 | VCVTNEPS2BF16Z128rrkz = 5845, |
| 5861 | VCVTNEPS2BF16Z256rm = 5846, |
| 5862 | VCVTNEPS2BF16Z256rmb = 5847, |
| 5863 | VCVTNEPS2BF16Z256rmbk = 5848, |
| 5864 | VCVTNEPS2BF16Z256rmbkz = 5849, |
| 5865 | VCVTNEPS2BF16Z256rmk = 5850, |
| 5866 | VCVTNEPS2BF16Z256rmkz = 5851, |
| 5867 | VCVTNEPS2BF16Z256rr = 5852, |
| 5868 | VCVTNEPS2BF16Z256rrk = 5853, |
| 5869 | VCVTNEPS2BF16Z256rrkz = 5854, |
| 5870 | VCVTNEPS2BF16Zrm = 5855, |
| 5871 | VCVTNEPS2BF16Zrmb = 5856, |
| 5872 | VCVTNEPS2BF16Zrmbk = 5857, |
| 5873 | VCVTNEPS2BF16Zrmbkz = 5858, |
| 5874 | VCVTNEPS2BF16Zrmk = 5859, |
| 5875 | VCVTNEPS2BF16Zrmkz = 5860, |
| 5876 | VCVTNEPS2BF16Zrr = 5861, |
| 5877 | VCVTNEPS2BF16Zrrk = 5862, |
| 5878 | VCVTNEPS2BF16Zrrkz = 5863, |
| 5879 | VCVTNEPS2BF16rm = 5864, |
| 5880 | VCVTNEPS2BF16rr = 5865, |
| 5881 | VCVTPD2DQYrm = 5866, |
| 5882 | VCVTPD2DQYrr = 5867, |
| 5883 | VCVTPD2DQZ128rm = 5868, |
| 5884 | VCVTPD2DQZ128rmb = 5869, |
| 5885 | VCVTPD2DQZ128rmbk = 5870, |
| 5886 | VCVTPD2DQZ128rmbkz = 5871, |
| 5887 | VCVTPD2DQZ128rmk = 5872, |
| 5888 | VCVTPD2DQZ128rmkz = 5873, |
| 5889 | VCVTPD2DQZ128rr = 5874, |
| 5890 | VCVTPD2DQZ128rrk = 5875, |
| 5891 | VCVTPD2DQZ128rrkz = 5876, |
| 5892 | VCVTPD2DQZ256rm = 5877, |
| 5893 | VCVTPD2DQZ256rmb = 5878, |
| 5894 | VCVTPD2DQZ256rmbk = 5879, |
| 5895 | VCVTPD2DQZ256rmbkz = 5880, |
| 5896 | VCVTPD2DQZ256rmk = 5881, |
| 5897 | VCVTPD2DQZ256rmkz = 5882, |
| 5898 | VCVTPD2DQZ256rr = 5883, |
| 5899 | VCVTPD2DQZ256rrk = 5884, |
| 5900 | VCVTPD2DQZ256rrkz = 5885, |
| 5901 | VCVTPD2DQZrm = 5886, |
| 5902 | VCVTPD2DQZrmb = 5887, |
| 5903 | VCVTPD2DQZrmbk = 5888, |
| 5904 | VCVTPD2DQZrmbkz = 5889, |
| 5905 | VCVTPD2DQZrmk = 5890, |
| 5906 | VCVTPD2DQZrmkz = 5891, |
| 5907 | VCVTPD2DQZrr = 5892, |
| 5908 | VCVTPD2DQZrrb = 5893, |
| 5909 | VCVTPD2DQZrrbk = 5894, |
| 5910 | VCVTPD2DQZrrbkz = 5895, |
| 5911 | VCVTPD2DQZrrk = 5896, |
| 5912 | VCVTPD2DQZrrkz = 5897, |
| 5913 | VCVTPD2DQrm = 5898, |
| 5914 | VCVTPD2DQrr = 5899, |
| 5915 | VCVTPD2PHZ128rm = 5900, |
| 5916 | VCVTPD2PHZ128rmb = 5901, |
| 5917 | VCVTPD2PHZ128rmbk = 5902, |
| 5918 | VCVTPD2PHZ128rmbkz = 5903, |
| 5919 | VCVTPD2PHZ128rmk = 5904, |
| 5920 | VCVTPD2PHZ128rmkz = 5905, |
| 5921 | VCVTPD2PHZ128rr = 5906, |
| 5922 | VCVTPD2PHZ128rrk = 5907, |
| 5923 | VCVTPD2PHZ128rrkz = 5908, |
| 5924 | VCVTPD2PHZ256rm = 5909, |
| 5925 | VCVTPD2PHZ256rmb = 5910, |
| 5926 | VCVTPD2PHZ256rmbk = 5911, |
| 5927 | VCVTPD2PHZ256rmbkz = 5912, |
| 5928 | VCVTPD2PHZ256rmk = 5913, |
| 5929 | VCVTPD2PHZ256rmkz = 5914, |
| 5930 | VCVTPD2PHZ256rr = 5915, |
| 5931 | VCVTPD2PHZ256rrk = 5916, |
| 5932 | VCVTPD2PHZ256rrkz = 5917, |
| 5933 | VCVTPD2PHZrm = 5918, |
| 5934 | VCVTPD2PHZrmb = 5919, |
| 5935 | VCVTPD2PHZrmbk = 5920, |
| 5936 | VCVTPD2PHZrmbkz = 5921, |
| 5937 | VCVTPD2PHZrmk = 5922, |
| 5938 | VCVTPD2PHZrmkz = 5923, |
| 5939 | VCVTPD2PHZrr = 5924, |
| 5940 | VCVTPD2PHZrrb = 5925, |
| 5941 | VCVTPD2PHZrrbk = 5926, |
| 5942 | VCVTPD2PHZrrbkz = 5927, |
| 5943 | VCVTPD2PHZrrk = 5928, |
| 5944 | VCVTPD2PHZrrkz = 5929, |
| 5945 | VCVTPD2PSYrm = 5930, |
| 5946 | VCVTPD2PSYrr = 5931, |
| 5947 | VCVTPD2PSZ128rm = 5932, |
| 5948 | VCVTPD2PSZ128rmb = 5933, |
| 5949 | VCVTPD2PSZ128rmbk = 5934, |
| 5950 | VCVTPD2PSZ128rmbkz = 5935, |
| 5951 | VCVTPD2PSZ128rmk = 5936, |
| 5952 | VCVTPD2PSZ128rmkz = 5937, |
| 5953 | VCVTPD2PSZ128rr = 5938, |
| 5954 | VCVTPD2PSZ128rrk = 5939, |
| 5955 | VCVTPD2PSZ128rrkz = 5940, |
| 5956 | VCVTPD2PSZ256rm = 5941, |
| 5957 | VCVTPD2PSZ256rmb = 5942, |
| 5958 | VCVTPD2PSZ256rmbk = 5943, |
| 5959 | VCVTPD2PSZ256rmbkz = 5944, |
| 5960 | VCVTPD2PSZ256rmk = 5945, |
| 5961 | VCVTPD2PSZ256rmkz = 5946, |
| 5962 | VCVTPD2PSZ256rr = 5947, |
| 5963 | VCVTPD2PSZ256rrk = 5948, |
| 5964 | VCVTPD2PSZ256rrkz = 5949, |
| 5965 | VCVTPD2PSZrm = 5950, |
| 5966 | VCVTPD2PSZrmb = 5951, |
| 5967 | VCVTPD2PSZrmbk = 5952, |
| 5968 | VCVTPD2PSZrmbkz = 5953, |
| 5969 | VCVTPD2PSZrmk = 5954, |
| 5970 | VCVTPD2PSZrmkz = 5955, |
| 5971 | VCVTPD2PSZrr = 5956, |
| 5972 | VCVTPD2PSZrrb = 5957, |
| 5973 | VCVTPD2PSZrrbk = 5958, |
| 5974 | VCVTPD2PSZrrbkz = 5959, |
| 5975 | VCVTPD2PSZrrk = 5960, |
| 5976 | VCVTPD2PSZrrkz = 5961, |
| 5977 | VCVTPD2PSrm = 5962, |
| 5978 | VCVTPD2PSrr = 5963, |
| 5979 | VCVTPD2QQZ128rm = 5964, |
| 5980 | VCVTPD2QQZ128rmb = 5965, |
| 5981 | VCVTPD2QQZ128rmbk = 5966, |
| 5982 | VCVTPD2QQZ128rmbkz = 5967, |
| 5983 | VCVTPD2QQZ128rmk = 5968, |
| 5984 | VCVTPD2QQZ128rmkz = 5969, |
| 5985 | VCVTPD2QQZ128rr = 5970, |
| 5986 | VCVTPD2QQZ128rrk = 5971, |
| 5987 | VCVTPD2QQZ128rrkz = 5972, |
| 5988 | VCVTPD2QQZ256rm = 5973, |
| 5989 | VCVTPD2QQZ256rmb = 5974, |
| 5990 | VCVTPD2QQZ256rmbk = 5975, |
| 5991 | VCVTPD2QQZ256rmbkz = 5976, |
| 5992 | VCVTPD2QQZ256rmk = 5977, |
| 5993 | VCVTPD2QQZ256rmkz = 5978, |
| 5994 | VCVTPD2QQZ256rr = 5979, |
| 5995 | VCVTPD2QQZ256rrk = 5980, |
| 5996 | VCVTPD2QQZ256rrkz = 5981, |
| 5997 | VCVTPD2QQZrm = 5982, |
| 5998 | VCVTPD2QQZrmb = 5983, |
| 5999 | VCVTPD2QQZrmbk = 5984, |
| 6000 | VCVTPD2QQZrmbkz = 5985, |
| 6001 | VCVTPD2QQZrmk = 5986, |
| 6002 | VCVTPD2QQZrmkz = 5987, |
| 6003 | VCVTPD2QQZrr = 5988, |
| 6004 | VCVTPD2QQZrrb = 5989, |
| 6005 | VCVTPD2QQZrrbk = 5990, |
| 6006 | VCVTPD2QQZrrbkz = 5991, |
| 6007 | VCVTPD2QQZrrk = 5992, |
| 6008 | VCVTPD2QQZrrkz = 5993, |
| 6009 | VCVTPD2UDQZ128rm = 5994, |
| 6010 | VCVTPD2UDQZ128rmb = 5995, |
| 6011 | VCVTPD2UDQZ128rmbk = 5996, |
| 6012 | VCVTPD2UDQZ128rmbkz = 5997, |
| 6013 | VCVTPD2UDQZ128rmk = 5998, |
| 6014 | VCVTPD2UDQZ128rmkz = 5999, |
| 6015 | VCVTPD2UDQZ128rr = 6000, |
| 6016 | VCVTPD2UDQZ128rrk = 6001, |
| 6017 | VCVTPD2UDQZ128rrkz = 6002, |
| 6018 | VCVTPD2UDQZ256rm = 6003, |
| 6019 | VCVTPD2UDQZ256rmb = 6004, |
| 6020 | VCVTPD2UDQZ256rmbk = 6005, |
| 6021 | VCVTPD2UDQZ256rmbkz = 6006, |
| 6022 | VCVTPD2UDQZ256rmk = 6007, |
| 6023 | VCVTPD2UDQZ256rmkz = 6008, |
| 6024 | VCVTPD2UDQZ256rr = 6009, |
| 6025 | VCVTPD2UDQZ256rrk = 6010, |
| 6026 | VCVTPD2UDQZ256rrkz = 6011, |
| 6027 | VCVTPD2UDQZrm = 6012, |
| 6028 | VCVTPD2UDQZrmb = 6013, |
| 6029 | VCVTPD2UDQZrmbk = 6014, |
| 6030 | VCVTPD2UDQZrmbkz = 6015, |
| 6031 | VCVTPD2UDQZrmk = 6016, |
| 6032 | VCVTPD2UDQZrmkz = 6017, |
| 6033 | VCVTPD2UDQZrr = 6018, |
| 6034 | VCVTPD2UDQZrrb = 6019, |
| 6035 | VCVTPD2UDQZrrbk = 6020, |
| 6036 | VCVTPD2UDQZrrbkz = 6021, |
| 6037 | VCVTPD2UDQZrrk = 6022, |
| 6038 | VCVTPD2UDQZrrkz = 6023, |
| 6039 | VCVTPD2UQQZ128rm = 6024, |
| 6040 | VCVTPD2UQQZ128rmb = 6025, |
| 6041 | VCVTPD2UQQZ128rmbk = 6026, |
| 6042 | VCVTPD2UQQZ128rmbkz = 6027, |
| 6043 | VCVTPD2UQQZ128rmk = 6028, |
| 6044 | VCVTPD2UQQZ128rmkz = 6029, |
| 6045 | VCVTPD2UQQZ128rr = 6030, |
| 6046 | VCVTPD2UQQZ128rrk = 6031, |
| 6047 | VCVTPD2UQQZ128rrkz = 6032, |
| 6048 | VCVTPD2UQQZ256rm = 6033, |
| 6049 | VCVTPD2UQQZ256rmb = 6034, |
| 6050 | VCVTPD2UQQZ256rmbk = 6035, |
| 6051 | VCVTPD2UQQZ256rmbkz = 6036, |
| 6052 | VCVTPD2UQQZ256rmk = 6037, |
| 6053 | VCVTPD2UQQZ256rmkz = 6038, |
| 6054 | VCVTPD2UQQZ256rr = 6039, |
| 6055 | VCVTPD2UQQZ256rrk = 6040, |
| 6056 | VCVTPD2UQQZ256rrkz = 6041, |
| 6057 | VCVTPD2UQQZrm = 6042, |
| 6058 | VCVTPD2UQQZrmb = 6043, |
| 6059 | VCVTPD2UQQZrmbk = 6044, |
| 6060 | VCVTPD2UQQZrmbkz = 6045, |
| 6061 | VCVTPD2UQQZrmk = 6046, |
| 6062 | VCVTPD2UQQZrmkz = 6047, |
| 6063 | VCVTPD2UQQZrr = 6048, |
| 6064 | VCVTPD2UQQZrrb = 6049, |
| 6065 | VCVTPD2UQQZrrbk = 6050, |
| 6066 | VCVTPD2UQQZrrbkz = 6051, |
| 6067 | VCVTPD2UQQZrrk = 6052, |
| 6068 | VCVTPD2UQQZrrkz = 6053, |
| 6069 | VCVTPH2DQZ128rm = 6054, |
| 6070 | VCVTPH2DQZ128rmb = 6055, |
| 6071 | VCVTPH2DQZ128rmbk = 6056, |
| 6072 | VCVTPH2DQZ128rmbkz = 6057, |
| 6073 | VCVTPH2DQZ128rmk = 6058, |
| 6074 | VCVTPH2DQZ128rmkz = 6059, |
| 6075 | VCVTPH2DQZ128rr = 6060, |
| 6076 | VCVTPH2DQZ128rrk = 6061, |
| 6077 | VCVTPH2DQZ128rrkz = 6062, |
| 6078 | VCVTPH2DQZ256rm = 6063, |
| 6079 | VCVTPH2DQZ256rmb = 6064, |
| 6080 | VCVTPH2DQZ256rmbk = 6065, |
| 6081 | VCVTPH2DQZ256rmbkz = 6066, |
| 6082 | VCVTPH2DQZ256rmk = 6067, |
| 6083 | VCVTPH2DQZ256rmkz = 6068, |
| 6084 | VCVTPH2DQZ256rr = 6069, |
| 6085 | VCVTPH2DQZ256rrk = 6070, |
| 6086 | VCVTPH2DQZ256rrkz = 6071, |
| 6087 | VCVTPH2DQZrm = 6072, |
| 6088 | VCVTPH2DQZrmb = 6073, |
| 6089 | VCVTPH2DQZrmbk = 6074, |
| 6090 | VCVTPH2DQZrmbkz = 6075, |
| 6091 | VCVTPH2DQZrmk = 6076, |
| 6092 | VCVTPH2DQZrmkz = 6077, |
| 6093 | VCVTPH2DQZrr = 6078, |
| 6094 | VCVTPH2DQZrrb = 6079, |
| 6095 | VCVTPH2DQZrrbk = 6080, |
| 6096 | VCVTPH2DQZrrbkz = 6081, |
| 6097 | VCVTPH2DQZrrk = 6082, |
| 6098 | VCVTPH2DQZrrkz = 6083, |
| 6099 | VCVTPH2PDZ128rm = 6084, |
| 6100 | VCVTPH2PDZ128rmb = 6085, |
| 6101 | VCVTPH2PDZ128rmbk = 6086, |
| 6102 | VCVTPH2PDZ128rmbkz = 6087, |
| 6103 | VCVTPH2PDZ128rmk = 6088, |
| 6104 | VCVTPH2PDZ128rmkz = 6089, |
| 6105 | VCVTPH2PDZ128rr = 6090, |
| 6106 | VCVTPH2PDZ128rrk = 6091, |
| 6107 | VCVTPH2PDZ128rrkz = 6092, |
| 6108 | VCVTPH2PDZ256rm = 6093, |
| 6109 | VCVTPH2PDZ256rmb = 6094, |
| 6110 | VCVTPH2PDZ256rmbk = 6095, |
| 6111 | VCVTPH2PDZ256rmbkz = 6096, |
| 6112 | VCVTPH2PDZ256rmk = 6097, |
| 6113 | VCVTPH2PDZ256rmkz = 6098, |
| 6114 | VCVTPH2PDZ256rr = 6099, |
| 6115 | VCVTPH2PDZ256rrk = 6100, |
| 6116 | VCVTPH2PDZ256rrkz = 6101, |
| 6117 | VCVTPH2PDZrm = 6102, |
| 6118 | VCVTPH2PDZrmb = 6103, |
| 6119 | VCVTPH2PDZrmbk = 6104, |
| 6120 | VCVTPH2PDZrmbkz = 6105, |
| 6121 | VCVTPH2PDZrmk = 6106, |
| 6122 | VCVTPH2PDZrmkz = 6107, |
| 6123 | VCVTPH2PDZrr = 6108, |
| 6124 | VCVTPH2PDZrrb = 6109, |
| 6125 | VCVTPH2PDZrrbk = 6110, |
| 6126 | VCVTPH2PDZrrbkz = 6111, |
| 6127 | VCVTPH2PDZrrk = 6112, |
| 6128 | VCVTPH2PDZrrkz = 6113, |
| 6129 | VCVTPH2PSXZ128rm = 6114, |
| 6130 | VCVTPH2PSXZ128rmb = 6115, |
| 6131 | VCVTPH2PSXZ128rmbk = 6116, |
| 6132 | VCVTPH2PSXZ128rmbkz = 6117, |
| 6133 | VCVTPH2PSXZ128rmk = 6118, |
| 6134 | VCVTPH2PSXZ128rmkz = 6119, |
| 6135 | VCVTPH2PSXZ128rr = 6120, |
| 6136 | VCVTPH2PSXZ128rrk = 6121, |
| 6137 | VCVTPH2PSXZ128rrkz = 6122, |
| 6138 | VCVTPH2PSXZ256rm = 6123, |
| 6139 | VCVTPH2PSXZ256rmb = 6124, |
| 6140 | VCVTPH2PSXZ256rmbk = 6125, |
| 6141 | VCVTPH2PSXZ256rmbkz = 6126, |
| 6142 | VCVTPH2PSXZ256rmk = 6127, |
| 6143 | VCVTPH2PSXZ256rmkz = 6128, |
| 6144 | VCVTPH2PSXZ256rr = 6129, |
| 6145 | VCVTPH2PSXZ256rrk = 6130, |
| 6146 | VCVTPH2PSXZ256rrkz = 6131, |
| 6147 | VCVTPH2PSXZrm = 6132, |
| 6148 | VCVTPH2PSXZrmb = 6133, |
| 6149 | VCVTPH2PSXZrmbk = 6134, |
| 6150 | VCVTPH2PSXZrmbkz = 6135, |
| 6151 | VCVTPH2PSXZrmk = 6136, |
| 6152 | VCVTPH2PSXZrmkz = 6137, |
| 6153 | VCVTPH2PSXZrr = 6138, |
| 6154 | VCVTPH2PSXZrrb = 6139, |
| 6155 | VCVTPH2PSXZrrbk = 6140, |
| 6156 | VCVTPH2PSXZrrbkz = 6141, |
| 6157 | VCVTPH2PSXZrrk = 6142, |
| 6158 | VCVTPH2PSXZrrkz = 6143, |
| 6159 | VCVTPH2PSYrm = 6144, |
| 6160 | VCVTPH2PSYrr = 6145, |
| 6161 | VCVTPH2PSZ128rm = 6146, |
| 6162 | VCVTPH2PSZ128rmk = 6147, |
| 6163 | VCVTPH2PSZ128rmkz = 6148, |
| 6164 | VCVTPH2PSZ128rr = 6149, |
| 6165 | VCVTPH2PSZ128rrk = 6150, |
| 6166 | VCVTPH2PSZ128rrkz = 6151, |
| 6167 | VCVTPH2PSZ256rm = 6152, |
| 6168 | VCVTPH2PSZ256rmk = 6153, |
| 6169 | VCVTPH2PSZ256rmkz = 6154, |
| 6170 | VCVTPH2PSZ256rr = 6155, |
| 6171 | VCVTPH2PSZ256rrk = 6156, |
| 6172 | VCVTPH2PSZ256rrkz = 6157, |
| 6173 | VCVTPH2PSZrm = 6158, |
| 6174 | VCVTPH2PSZrmk = 6159, |
| 6175 | VCVTPH2PSZrmkz = 6160, |
| 6176 | VCVTPH2PSZrr = 6161, |
| 6177 | VCVTPH2PSZrrb = 6162, |
| 6178 | VCVTPH2PSZrrbk = 6163, |
| 6179 | VCVTPH2PSZrrbkz = 6164, |
| 6180 | VCVTPH2PSZrrk = 6165, |
| 6181 | VCVTPH2PSZrrkz = 6166, |
| 6182 | VCVTPH2PSrm = 6167, |
| 6183 | VCVTPH2PSrr = 6168, |
| 6184 | VCVTPH2QQZ128rm = 6169, |
| 6185 | VCVTPH2QQZ128rmb = 6170, |
| 6186 | VCVTPH2QQZ128rmbk = 6171, |
| 6187 | VCVTPH2QQZ128rmbkz = 6172, |
| 6188 | VCVTPH2QQZ128rmk = 6173, |
| 6189 | VCVTPH2QQZ128rmkz = 6174, |
| 6190 | VCVTPH2QQZ128rr = 6175, |
| 6191 | VCVTPH2QQZ128rrk = 6176, |
| 6192 | VCVTPH2QQZ128rrkz = 6177, |
| 6193 | VCVTPH2QQZ256rm = 6178, |
| 6194 | VCVTPH2QQZ256rmb = 6179, |
| 6195 | VCVTPH2QQZ256rmbk = 6180, |
| 6196 | VCVTPH2QQZ256rmbkz = 6181, |
| 6197 | VCVTPH2QQZ256rmk = 6182, |
| 6198 | VCVTPH2QQZ256rmkz = 6183, |
| 6199 | VCVTPH2QQZ256rr = 6184, |
| 6200 | VCVTPH2QQZ256rrk = 6185, |
| 6201 | VCVTPH2QQZ256rrkz = 6186, |
| 6202 | VCVTPH2QQZrm = 6187, |
| 6203 | VCVTPH2QQZrmb = 6188, |
| 6204 | VCVTPH2QQZrmbk = 6189, |
| 6205 | VCVTPH2QQZrmbkz = 6190, |
| 6206 | VCVTPH2QQZrmk = 6191, |
| 6207 | VCVTPH2QQZrmkz = 6192, |
| 6208 | VCVTPH2QQZrr = 6193, |
| 6209 | VCVTPH2QQZrrb = 6194, |
| 6210 | VCVTPH2QQZrrbk = 6195, |
| 6211 | VCVTPH2QQZrrbkz = 6196, |
| 6212 | VCVTPH2QQZrrk = 6197, |
| 6213 | VCVTPH2QQZrrkz = 6198, |
| 6214 | VCVTPH2UDQZ128rm = 6199, |
| 6215 | VCVTPH2UDQZ128rmb = 6200, |
| 6216 | VCVTPH2UDQZ128rmbk = 6201, |
| 6217 | VCVTPH2UDQZ128rmbkz = 6202, |
| 6218 | VCVTPH2UDQZ128rmk = 6203, |
| 6219 | VCVTPH2UDQZ128rmkz = 6204, |
| 6220 | VCVTPH2UDQZ128rr = 6205, |
| 6221 | VCVTPH2UDQZ128rrk = 6206, |
| 6222 | VCVTPH2UDQZ128rrkz = 6207, |
| 6223 | VCVTPH2UDQZ256rm = 6208, |
| 6224 | VCVTPH2UDQZ256rmb = 6209, |
| 6225 | VCVTPH2UDQZ256rmbk = 6210, |
| 6226 | VCVTPH2UDQZ256rmbkz = 6211, |
| 6227 | VCVTPH2UDQZ256rmk = 6212, |
| 6228 | VCVTPH2UDQZ256rmkz = 6213, |
| 6229 | VCVTPH2UDQZ256rr = 6214, |
| 6230 | VCVTPH2UDQZ256rrk = 6215, |
| 6231 | VCVTPH2UDQZ256rrkz = 6216, |
| 6232 | VCVTPH2UDQZrm = 6217, |
| 6233 | VCVTPH2UDQZrmb = 6218, |
| 6234 | VCVTPH2UDQZrmbk = 6219, |
| 6235 | VCVTPH2UDQZrmbkz = 6220, |
| 6236 | VCVTPH2UDQZrmk = 6221, |
| 6237 | VCVTPH2UDQZrmkz = 6222, |
| 6238 | VCVTPH2UDQZrr = 6223, |
| 6239 | VCVTPH2UDQZrrb = 6224, |
| 6240 | VCVTPH2UDQZrrbk = 6225, |
| 6241 | VCVTPH2UDQZrrbkz = 6226, |
| 6242 | VCVTPH2UDQZrrk = 6227, |
| 6243 | VCVTPH2UDQZrrkz = 6228, |
| 6244 | VCVTPH2UQQZ128rm = 6229, |
| 6245 | VCVTPH2UQQZ128rmb = 6230, |
| 6246 | VCVTPH2UQQZ128rmbk = 6231, |
| 6247 | VCVTPH2UQQZ128rmbkz = 6232, |
| 6248 | VCVTPH2UQQZ128rmk = 6233, |
| 6249 | VCVTPH2UQQZ128rmkz = 6234, |
| 6250 | VCVTPH2UQQZ128rr = 6235, |
| 6251 | VCVTPH2UQQZ128rrk = 6236, |
| 6252 | VCVTPH2UQQZ128rrkz = 6237, |
| 6253 | VCVTPH2UQQZ256rm = 6238, |
| 6254 | VCVTPH2UQQZ256rmb = 6239, |
| 6255 | VCVTPH2UQQZ256rmbk = 6240, |
| 6256 | VCVTPH2UQQZ256rmbkz = 6241, |
| 6257 | VCVTPH2UQQZ256rmk = 6242, |
| 6258 | VCVTPH2UQQZ256rmkz = 6243, |
| 6259 | VCVTPH2UQQZ256rr = 6244, |
| 6260 | VCVTPH2UQQZ256rrk = 6245, |
| 6261 | VCVTPH2UQQZ256rrkz = 6246, |
| 6262 | VCVTPH2UQQZrm = 6247, |
| 6263 | VCVTPH2UQQZrmb = 6248, |
| 6264 | VCVTPH2UQQZrmbk = 6249, |
| 6265 | VCVTPH2UQQZrmbkz = 6250, |
| 6266 | VCVTPH2UQQZrmk = 6251, |
| 6267 | VCVTPH2UQQZrmkz = 6252, |
| 6268 | VCVTPH2UQQZrr = 6253, |
| 6269 | VCVTPH2UQQZrrb = 6254, |
| 6270 | VCVTPH2UQQZrrbk = 6255, |
| 6271 | VCVTPH2UQQZrrbkz = 6256, |
| 6272 | VCVTPH2UQQZrrk = 6257, |
| 6273 | VCVTPH2UQQZrrkz = 6258, |
| 6274 | VCVTPH2UWZ128rm = 6259, |
| 6275 | VCVTPH2UWZ128rmb = 6260, |
| 6276 | VCVTPH2UWZ128rmbk = 6261, |
| 6277 | VCVTPH2UWZ128rmbkz = 6262, |
| 6278 | VCVTPH2UWZ128rmk = 6263, |
| 6279 | VCVTPH2UWZ128rmkz = 6264, |
| 6280 | VCVTPH2UWZ128rr = 6265, |
| 6281 | VCVTPH2UWZ128rrk = 6266, |
| 6282 | VCVTPH2UWZ128rrkz = 6267, |
| 6283 | VCVTPH2UWZ256rm = 6268, |
| 6284 | VCVTPH2UWZ256rmb = 6269, |
| 6285 | VCVTPH2UWZ256rmbk = 6270, |
| 6286 | VCVTPH2UWZ256rmbkz = 6271, |
| 6287 | VCVTPH2UWZ256rmk = 6272, |
| 6288 | VCVTPH2UWZ256rmkz = 6273, |
| 6289 | VCVTPH2UWZ256rr = 6274, |
| 6290 | VCVTPH2UWZ256rrk = 6275, |
| 6291 | VCVTPH2UWZ256rrkz = 6276, |
| 6292 | VCVTPH2UWZrm = 6277, |
| 6293 | VCVTPH2UWZrmb = 6278, |
| 6294 | VCVTPH2UWZrmbk = 6279, |
| 6295 | VCVTPH2UWZrmbkz = 6280, |
| 6296 | VCVTPH2UWZrmk = 6281, |
| 6297 | VCVTPH2UWZrmkz = 6282, |
| 6298 | VCVTPH2UWZrr = 6283, |
| 6299 | VCVTPH2UWZrrb = 6284, |
| 6300 | VCVTPH2UWZrrbk = 6285, |
| 6301 | VCVTPH2UWZrrbkz = 6286, |
| 6302 | VCVTPH2UWZrrk = 6287, |
| 6303 | VCVTPH2UWZrrkz = 6288, |
| 6304 | VCVTPH2WZ128rm = 6289, |
| 6305 | VCVTPH2WZ128rmb = 6290, |
| 6306 | VCVTPH2WZ128rmbk = 6291, |
| 6307 | VCVTPH2WZ128rmbkz = 6292, |
| 6308 | VCVTPH2WZ128rmk = 6293, |
| 6309 | VCVTPH2WZ128rmkz = 6294, |
| 6310 | VCVTPH2WZ128rr = 6295, |
| 6311 | VCVTPH2WZ128rrk = 6296, |
| 6312 | VCVTPH2WZ128rrkz = 6297, |
| 6313 | VCVTPH2WZ256rm = 6298, |
| 6314 | VCVTPH2WZ256rmb = 6299, |
| 6315 | VCVTPH2WZ256rmbk = 6300, |
| 6316 | VCVTPH2WZ256rmbkz = 6301, |
| 6317 | VCVTPH2WZ256rmk = 6302, |
| 6318 | VCVTPH2WZ256rmkz = 6303, |
| 6319 | VCVTPH2WZ256rr = 6304, |
| 6320 | VCVTPH2WZ256rrk = 6305, |
| 6321 | VCVTPH2WZ256rrkz = 6306, |
| 6322 | VCVTPH2WZrm = 6307, |
| 6323 | VCVTPH2WZrmb = 6308, |
| 6324 | VCVTPH2WZrmbk = 6309, |
| 6325 | VCVTPH2WZrmbkz = 6310, |
| 6326 | VCVTPH2WZrmk = 6311, |
| 6327 | VCVTPH2WZrmkz = 6312, |
| 6328 | VCVTPH2WZrr = 6313, |
| 6329 | VCVTPH2WZrrb = 6314, |
| 6330 | VCVTPH2WZrrbk = 6315, |
| 6331 | VCVTPH2WZrrbkz = 6316, |
| 6332 | VCVTPH2WZrrk = 6317, |
| 6333 | VCVTPH2WZrrkz = 6318, |
| 6334 | VCVTPS2DQYrm = 6319, |
| 6335 | VCVTPS2DQYrr = 6320, |
| 6336 | VCVTPS2DQZ128rm = 6321, |
| 6337 | VCVTPS2DQZ128rmb = 6322, |
| 6338 | VCVTPS2DQZ128rmbk = 6323, |
| 6339 | VCVTPS2DQZ128rmbkz = 6324, |
| 6340 | VCVTPS2DQZ128rmk = 6325, |
| 6341 | VCVTPS2DQZ128rmkz = 6326, |
| 6342 | VCVTPS2DQZ128rr = 6327, |
| 6343 | VCVTPS2DQZ128rrk = 6328, |
| 6344 | VCVTPS2DQZ128rrkz = 6329, |
| 6345 | VCVTPS2DQZ256rm = 6330, |
| 6346 | VCVTPS2DQZ256rmb = 6331, |
| 6347 | VCVTPS2DQZ256rmbk = 6332, |
| 6348 | VCVTPS2DQZ256rmbkz = 6333, |
| 6349 | VCVTPS2DQZ256rmk = 6334, |
| 6350 | VCVTPS2DQZ256rmkz = 6335, |
| 6351 | VCVTPS2DQZ256rr = 6336, |
| 6352 | VCVTPS2DQZ256rrk = 6337, |
| 6353 | VCVTPS2DQZ256rrkz = 6338, |
| 6354 | VCVTPS2DQZrm = 6339, |
| 6355 | VCVTPS2DQZrmb = 6340, |
| 6356 | VCVTPS2DQZrmbk = 6341, |
| 6357 | VCVTPS2DQZrmbkz = 6342, |
| 6358 | VCVTPS2DQZrmk = 6343, |
| 6359 | VCVTPS2DQZrmkz = 6344, |
| 6360 | VCVTPS2DQZrr = 6345, |
| 6361 | VCVTPS2DQZrrb = 6346, |
| 6362 | VCVTPS2DQZrrbk = 6347, |
| 6363 | VCVTPS2DQZrrbkz = 6348, |
| 6364 | VCVTPS2DQZrrk = 6349, |
| 6365 | VCVTPS2DQZrrkz = 6350, |
| 6366 | VCVTPS2DQrm = 6351, |
| 6367 | VCVTPS2DQrr = 6352, |
| 6368 | VCVTPS2PDYrm = 6353, |
| 6369 | VCVTPS2PDYrr = 6354, |
| 6370 | VCVTPS2PDZ128rm = 6355, |
| 6371 | VCVTPS2PDZ128rmb = 6356, |
| 6372 | VCVTPS2PDZ128rmbk = 6357, |
| 6373 | VCVTPS2PDZ128rmbkz = 6358, |
| 6374 | VCVTPS2PDZ128rmk = 6359, |
| 6375 | VCVTPS2PDZ128rmkz = 6360, |
| 6376 | VCVTPS2PDZ128rr = 6361, |
| 6377 | VCVTPS2PDZ128rrk = 6362, |
| 6378 | VCVTPS2PDZ128rrkz = 6363, |
| 6379 | VCVTPS2PDZ256rm = 6364, |
| 6380 | VCVTPS2PDZ256rmb = 6365, |
| 6381 | VCVTPS2PDZ256rmbk = 6366, |
| 6382 | VCVTPS2PDZ256rmbkz = 6367, |
| 6383 | VCVTPS2PDZ256rmk = 6368, |
| 6384 | VCVTPS2PDZ256rmkz = 6369, |
| 6385 | VCVTPS2PDZ256rr = 6370, |
| 6386 | VCVTPS2PDZ256rrk = 6371, |
| 6387 | VCVTPS2PDZ256rrkz = 6372, |
| 6388 | VCVTPS2PDZrm = 6373, |
| 6389 | VCVTPS2PDZrmb = 6374, |
| 6390 | VCVTPS2PDZrmbk = 6375, |
| 6391 | VCVTPS2PDZrmbkz = 6376, |
| 6392 | VCVTPS2PDZrmk = 6377, |
| 6393 | VCVTPS2PDZrmkz = 6378, |
| 6394 | VCVTPS2PDZrr = 6379, |
| 6395 | VCVTPS2PDZrrb = 6380, |
| 6396 | VCVTPS2PDZrrbk = 6381, |
| 6397 | VCVTPS2PDZrrbkz = 6382, |
| 6398 | VCVTPS2PDZrrk = 6383, |
| 6399 | VCVTPS2PDZrrkz = 6384, |
| 6400 | VCVTPS2PDrm = 6385, |
| 6401 | VCVTPS2PDrr = 6386, |
| 6402 | VCVTPS2PHXZ128rm = 6387, |
| 6403 | VCVTPS2PHXZ128rmb = 6388, |
| 6404 | VCVTPS2PHXZ128rmbk = 6389, |
| 6405 | VCVTPS2PHXZ128rmbkz = 6390, |
| 6406 | VCVTPS2PHXZ128rmk = 6391, |
| 6407 | VCVTPS2PHXZ128rmkz = 6392, |
| 6408 | VCVTPS2PHXZ128rr = 6393, |
| 6409 | VCVTPS2PHXZ128rrk = 6394, |
| 6410 | VCVTPS2PHXZ128rrkz = 6395, |
| 6411 | VCVTPS2PHXZ256rm = 6396, |
| 6412 | VCVTPS2PHXZ256rmb = 6397, |
| 6413 | VCVTPS2PHXZ256rmbk = 6398, |
| 6414 | VCVTPS2PHXZ256rmbkz = 6399, |
| 6415 | VCVTPS2PHXZ256rmk = 6400, |
| 6416 | VCVTPS2PHXZ256rmkz = 6401, |
| 6417 | VCVTPS2PHXZ256rr = 6402, |
| 6418 | VCVTPS2PHXZ256rrk = 6403, |
| 6419 | VCVTPS2PHXZ256rrkz = 6404, |
| 6420 | VCVTPS2PHXZrm = 6405, |
| 6421 | VCVTPS2PHXZrmb = 6406, |
| 6422 | VCVTPS2PHXZrmbk = 6407, |
| 6423 | VCVTPS2PHXZrmbkz = 6408, |
| 6424 | VCVTPS2PHXZrmk = 6409, |
| 6425 | VCVTPS2PHXZrmkz = 6410, |
| 6426 | VCVTPS2PHXZrr = 6411, |
| 6427 | VCVTPS2PHXZrrb = 6412, |
| 6428 | VCVTPS2PHXZrrbk = 6413, |
| 6429 | VCVTPS2PHXZrrbkz = 6414, |
| 6430 | VCVTPS2PHXZrrk = 6415, |
| 6431 | VCVTPS2PHXZrrkz = 6416, |
| 6432 | VCVTPS2PHYmr = 6417, |
| 6433 | VCVTPS2PHYrr = 6418, |
| 6434 | VCVTPS2PHZ128mr = 6419, |
| 6435 | VCVTPS2PHZ128mrk = 6420, |
| 6436 | VCVTPS2PHZ128rr = 6421, |
| 6437 | VCVTPS2PHZ128rrk = 6422, |
| 6438 | VCVTPS2PHZ128rrkz = 6423, |
| 6439 | VCVTPS2PHZ256mr = 6424, |
| 6440 | VCVTPS2PHZ256mrk = 6425, |
| 6441 | VCVTPS2PHZ256rr = 6426, |
| 6442 | VCVTPS2PHZ256rrk = 6427, |
| 6443 | VCVTPS2PHZ256rrkz = 6428, |
| 6444 | VCVTPS2PHZmr = 6429, |
| 6445 | VCVTPS2PHZmrk = 6430, |
| 6446 | VCVTPS2PHZrr = 6431, |
| 6447 | VCVTPS2PHZrrb = 6432, |
| 6448 | VCVTPS2PHZrrbk = 6433, |
| 6449 | VCVTPS2PHZrrbkz = 6434, |
| 6450 | VCVTPS2PHZrrk = 6435, |
| 6451 | VCVTPS2PHZrrkz = 6436, |
| 6452 | VCVTPS2PHmr = 6437, |
| 6453 | VCVTPS2PHrr = 6438, |
| 6454 | VCVTPS2QQZ128rm = 6439, |
| 6455 | VCVTPS2QQZ128rmb = 6440, |
| 6456 | VCVTPS2QQZ128rmbk = 6441, |
| 6457 | VCVTPS2QQZ128rmbkz = 6442, |
| 6458 | VCVTPS2QQZ128rmk = 6443, |
| 6459 | VCVTPS2QQZ128rmkz = 6444, |
| 6460 | VCVTPS2QQZ128rr = 6445, |
| 6461 | VCVTPS2QQZ128rrk = 6446, |
| 6462 | VCVTPS2QQZ128rrkz = 6447, |
| 6463 | VCVTPS2QQZ256rm = 6448, |
| 6464 | VCVTPS2QQZ256rmb = 6449, |
| 6465 | VCVTPS2QQZ256rmbk = 6450, |
| 6466 | VCVTPS2QQZ256rmbkz = 6451, |
| 6467 | VCVTPS2QQZ256rmk = 6452, |
| 6468 | VCVTPS2QQZ256rmkz = 6453, |
| 6469 | VCVTPS2QQZ256rr = 6454, |
| 6470 | VCVTPS2QQZ256rrk = 6455, |
| 6471 | VCVTPS2QQZ256rrkz = 6456, |
| 6472 | VCVTPS2QQZrm = 6457, |
| 6473 | VCVTPS2QQZrmb = 6458, |
| 6474 | VCVTPS2QQZrmbk = 6459, |
| 6475 | VCVTPS2QQZrmbkz = 6460, |
| 6476 | VCVTPS2QQZrmk = 6461, |
| 6477 | VCVTPS2QQZrmkz = 6462, |
| 6478 | VCVTPS2QQZrr = 6463, |
| 6479 | VCVTPS2QQZrrb = 6464, |
| 6480 | VCVTPS2QQZrrbk = 6465, |
| 6481 | VCVTPS2QQZrrbkz = 6466, |
| 6482 | VCVTPS2QQZrrk = 6467, |
| 6483 | VCVTPS2QQZrrkz = 6468, |
| 6484 | VCVTPS2UDQZ128rm = 6469, |
| 6485 | VCVTPS2UDQZ128rmb = 6470, |
| 6486 | VCVTPS2UDQZ128rmbk = 6471, |
| 6487 | VCVTPS2UDQZ128rmbkz = 6472, |
| 6488 | VCVTPS2UDQZ128rmk = 6473, |
| 6489 | VCVTPS2UDQZ128rmkz = 6474, |
| 6490 | VCVTPS2UDQZ128rr = 6475, |
| 6491 | VCVTPS2UDQZ128rrk = 6476, |
| 6492 | VCVTPS2UDQZ128rrkz = 6477, |
| 6493 | VCVTPS2UDQZ256rm = 6478, |
| 6494 | VCVTPS2UDQZ256rmb = 6479, |
| 6495 | VCVTPS2UDQZ256rmbk = 6480, |
| 6496 | VCVTPS2UDQZ256rmbkz = 6481, |
| 6497 | VCVTPS2UDQZ256rmk = 6482, |
| 6498 | VCVTPS2UDQZ256rmkz = 6483, |
| 6499 | VCVTPS2UDQZ256rr = 6484, |
| 6500 | VCVTPS2UDQZ256rrk = 6485, |
| 6501 | VCVTPS2UDQZ256rrkz = 6486, |
| 6502 | VCVTPS2UDQZrm = 6487, |
| 6503 | VCVTPS2UDQZrmb = 6488, |
| 6504 | VCVTPS2UDQZrmbk = 6489, |
| 6505 | VCVTPS2UDQZrmbkz = 6490, |
| 6506 | VCVTPS2UDQZrmk = 6491, |
| 6507 | VCVTPS2UDQZrmkz = 6492, |
| 6508 | VCVTPS2UDQZrr = 6493, |
| 6509 | VCVTPS2UDQZrrb = 6494, |
| 6510 | VCVTPS2UDQZrrbk = 6495, |
| 6511 | VCVTPS2UDQZrrbkz = 6496, |
| 6512 | VCVTPS2UDQZrrk = 6497, |
| 6513 | VCVTPS2UDQZrrkz = 6498, |
| 6514 | VCVTPS2UQQZ128rm = 6499, |
| 6515 | VCVTPS2UQQZ128rmb = 6500, |
| 6516 | VCVTPS2UQQZ128rmbk = 6501, |
| 6517 | VCVTPS2UQQZ128rmbkz = 6502, |
| 6518 | VCVTPS2UQQZ128rmk = 6503, |
| 6519 | VCVTPS2UQQZ128rmkz = 6504, |
| 6520 | VCVTPS2UQQZ128rr = 6505, |
| 6521 | VCVTPS2UQQZ128rrk = 6506, |
| 6522 | VCVTPS2UQQZ128rrkz = 6507, |
| 6523 | VCVTPS2UQQZ256rm = 6508, |
| 6524 | VCVTPS2UQQZ256rmb = 6509, |
| 6525 | VCVTPS2UQQZ256rmbk = 6510, |
| 6526 | VCVTPS2UQQZ256rmbkz = 6511, |
| 6527 | VCVTPS2UQQZ256rmk = 6512, |
| 6528 | VCVTPS2UQQZ256rmkz = 6513, |
| 6529 | VCVTPS2UQQZ256rr = 6514, |
| 6530 | VCVTPS2UQQZ256rrk = 6515, |
| 6531 | VCVTPS2UQQZ256rrkz = 6516, |
| 6532 | VCVTPS2UQQZrm = 6517, |
| 6533 | VCVTPS2UQQZrmb = 6518, |
| 6534 | VCVTPS2UQQZrmbk = 6519, |
| 6535 | VCVTPS2UQQZrmbkz = 6520, |
| 6536 | VCVTPS2UQQZrmk = 6521, |
| 6537 | VCVTPS2UQQZrmkz = 6522, |
| 6538 | VCVTPS2UQQZrr = 6523, |
| 6539 | VCVTPS2UQQZrrb = 6524, |
| 6540 | VCVTPS2UQQZrrbk = 6525, |
| 6541 | VCVTPS2UQQZrrbkz = 6526, |
| 6542 | VCVTPS2UQQZrrk = 6527, |
| 6543 | VCVTPS2UQQZrrkz = 6528, |
| 6544 | VCVTQQ2PDZ128rm = 6529, |
| 6545 | VCVTQQ2PDZ128rmb = 6530, |
| 6546 | VCVTQQ2PDZ128rmbk = 6531, |
| 6547 | VCVTQQ2PDZ128rmbkz = 6532, |
| 6548 | VCVTQQ2PDZ128rmk = 6533, |
| 6549 | VCVTQQ2PDZ128rmkz = 6534, |
| 6550 | VCVTQQ2PDZ128rr = 6535, |
| 6551 | VCVTQQ2PDZ128rrk = 6536, |
| 6552 | VCVTQQ2PDZ128rrkz = 6537, |
| 6553 | VCVTQQ2PDZ256rm = 6538, |
| 6554 | VCVTQQ2PDZ256rmb = 6539, |
| 6555 | VCVTQQ2PDZ256rmbk = 6540, |
| 6556 | VCVTQQ2PDZ256rmbkz = 6541, |
| 6557 | VCVTQQ2PDZ256rmk = 6542, |
| 6558 | VCVTQQ2PDZ256rmkz = 6543, |
| 6559 | VCVTQQ2PDZ256rr = 6544, |
| 6560 | VCVTQQ2PDZ256rrk = 6545, |
| 6561 | VCVTQQ2PDZ256rrkz = 6546, |
| 6562 | VCVTQQ2PDZrm = 6547, |
| 6563 | VCVTQQ2PDZrmb = 6548, |
| 6564 | VCVTQQ2PDZrmbk = 6549, |
| 6565 | VCVTQQ2PDZrmbkz = 6550, |
| 6566 | VCVTQQ2PDZrmk = 6551, |
| 6567 | VCVTQQ2PDZrmkz = 6552, |
| 6568 | VCVTQQ2PDZrr = 6553, |
| 6569 | VCVTQQ2PDZrrb = 6554, |
| 6570 | VCVTQQ2PDZrrbk = 6555, |
| 6571 | VCVTQQ2PDZrrbkz = 6556, |
| 6572 | VCVTQQ2PDZrrk = 6557, |
| 6573 | VCVTQQ2PDZrrkz = 6558, |
| 6574 | VCVTQQ2PHZ128rm = 6559, |
| 6575 | VCVTQQ2PHZ128rmb = 6560, |
| 6576 | VCVTQQ2PHZ128rmbk = 6561, |
| 6577 | VCVTQQ2PHZ128rmbkz = 6562, |
| 6578 | VCVTQQ2PHZ128rmk = 6563, |
| 6579 | VCVTQQ2PHZ128rmkz = 6564, |
| 6580 | VCVTQQ2PHZ128rr = 6565, |
| 6581 | VCVTQQ2PHZ128rrk = 6566, |
| 6582 | VCVTQQ2PHZ128rrkz = 6567, |
| 6583 | VCVTQQ2PHZ256rm = 6568, |
| 6584 | VCVTQQ2PHZ256rmb = 6569, |
| 6585 | VCVTQQ2PHZ256rmbk = 6570, |
| 6586 | VCVTQQ2PHZ256rmbkz = 6571, |
| 6587 | VCVTQQ2PHZ256rmk = 6572, |
| 6588 | VCVTQQ2PHZ256rmkz = 6573, |
| 6589 | VCVTQQ2PHZ256rr = 6574, |
| 6590 | VCVTQQ2PHZ256rrk = 6575, |
| 6591 | VCVTQQ2PHZ256rrkz = 6576, |
| 6592 | VCVTQQ2PHZrm = 6577, |
| 6593 | VCVTQQ2PHZrmb = 6578, |
| 6594 | VCVTQQ2PHZrmbk = 6579, |
| 6595 | VCVTQQ2PHZrmbkz = 6580, |
| 6596 | VCVTQQ2PHZrmk = 6581, |
| 6597 | VCVTQQ2PHZrmkz = 6582, |
| 6598 | VCVTQQ2PHZrr = 6583, |
| 6599 | VCVTQQ2PHZrrb = 6584, |
| 6600 | VCVTQQ2PHZrrbk = 6585, |
| 6601 | VCVTQQ2PHZrrbkz = 6586, |
| 6602 | VCVTQQ2PHZrrk = 6587, |
| 6603 | VCVTQQ2PHZrrkz = 6588, |
| 6604 | VCVTQQ2PSZ128rm = 6589, |
| 6605 | VCVTQQ2PSZ128rmb = 6590, |
| 6606 | VCVTQQ2PSZ128rmbk = 6591, |
| 6607 | VCVTQQ2PSZ128rmbkz = 6592, |
| 6608 | VCVTQQ2PSZ128rmk = 6593, |
| 6609 | VCVTQQ2PSZ128rmkz = 6594, |
| 6610 | VCVTQQ2PSZ128rr = 6595, |
| 6611 | VCVTQQ2PSZ128rrk = 6596, |
| 6612 | VCVTQQ2PSZ128rrkz = 6597, |
| 6613 | VCVTQQ2PSZ256rm = 6598, |
| 6614 | VCVTQQ2PSZ256rmb = 6599, |
| 6615 | VCVTQQ2PSZ256rmbk = 6600, |
| 6616 | VCVTQQ2PSZ256rmbkz = 6601, |
| 6617 | VCVTQQ2PSZ256rmk = 6602, |
| 6618 | VCVTQQ2PSZ256rmkz = 6603, |
| 6619 | VCVTQQ2PSZ256rr = 6604, |
| 6620 | VCVTQQ2PSZ256rrk = 6605, |
| 6621 | VCVTQQ2PSZ256rrkz = 6606, |
| 6622 | VCVTQQ2PSZrm = 6607, |
| 6623 | VCVTQQ2PSZrmb = 6608, |
| 6624 | VCVTQQ2PSZrmbk = 6609, |
| 6625 | VCVTQQ2PSZrmbkz = 6610, |
| 6626 | VCVTQQ2PSZrmk = 6611, |
| 6627 | VCVTQQ2PSZrmkz = 6612, |
| 6628 | VCVTQQ2PSZrr = 6613, |
| 6629 | VCVTQQ2PSZrrb = 6614, |
| 6630 | VCVTQQ2PSZrrbk = 6615, |
| 6631 | VCVTQQ2PSZrrbkz = 6616, |
| 6632 | VCVTQQ2PSZrrk = 6617, |
| 6633 | VCVTQQ2PSZrrkz = 6618, |
| 6634 | VCVTSD2SHZrm = 6619, |
| 6635 | VCVTSD2SHZrm_Int = 6620, |
| 6636 | VCVTSD2SHZrm_Intk = 6621, |
| 6637 | VCVTSD2SHZrm_Intkz = 6622, |
| 6638 | VCVTSD2SHZrr = 6623, |
| 6639 | VCVTSD2SHZrr_Int = 6624, |
| 6640 | VCVTSD2SHZrr_Intk = 6625, |
| 6641 | VCVTSD2SHZrr_Intkz = 6626, |
| 6642 | VCVTSD2SHZrrb_Int = 6627, |
| 6643 | VCVTSD2SHZrrb_Intk = 6628, |
| 6644 | VCVTSD2SHZrrb_Intkz = 6629, |
| 6645 | VCVTSD2SI64Zrm = 6630, |
| 6646 | VCVTSD2SI64Zrm_Int = 6631, |
| 6647 | VCVTSD2SI64Zrr = 6632, |
| 6648 | VCVTSD2SI64Zrr_Int = 6633, |
| 6649 | VCVTSD2SI64Zrrb_Int = 6634, |
| 6650 | VCVTSD2SI64rm = 6635, |
| 6651 | VCVTSD2SI64rm_Int = 6636, |
| 6652 | VCVTSD2SI64rr = 6637, |
| 6653 | VCVTSD2SI64rr_Int = 6638, |
| 6654 | VCVTSD2SIZrm = 6639, |
| 6655 | VCVTSD2SIZrm_Int = 6640, |
| 6656 | VCVTSD2SIZrr = 6641, |
| 6657 | VCVTSD2SIZrr_Int = 6642, |
| 6658 | VCVTSD2SIZrrb_Int = 6643, |
| 6659 | VCVTSD2SIrm = 6644, |
| 6660 | VCVTSD2SIrm_Int = 6645, |
| 6661 | VCVTSD2SIrr = 6646, |
| 6662 | VCVTSD2SIrr_Int = 6647, |
| 6663 | VCVTSD2SSZrm = 6648, |
| 6664 | VCVTSD2SSZrm_Int = 6649, |
| 6665 | VCVTSD2SSZrm_Intk = 6650, |
| 6666 | VCVTSD2SSZrm_Intkz = 6651, |
| 6667 | VCVTSD2SSZrr = 6652, |
| 6668 | VCVTSD2SSZrr_Int = 6653, |
| 6669 | VCVTSD2SSZrr_Intk = 6654, |
| 6670 | VCVTSD2SSZrr_Intkz = 6655, |
| 6671 | VCVTSD2SSZrrb_Int = 6656, |
| 6672 | VCVTSD2SSZrrb_Intk = 6657, |
| 6673 | VCVTSD2SSZrrb_Intkz = 6658, |
| 6674 | VCVTSD2SSrm = 6659, |
| 6675 | VCVTSD2SSrm_Int = 6660, |
| 6676 | VCVTSD2SSrr = 6661, |
| 6677 | VCVTSD2SSrr_Int = 6662, |
| 6678 | VCVTSD2USI64Zrm_Int = 6663, |
| 6679 | VCVTSD2USI64Zrr_Int = 6664, |
| 6680 | VCVTSD2USI64Zrrb_Int = 6665, |
| 6681 | VCVTSD2USIZrm_Int = 6666, |
| 6682 | VCVTSD2USIZrr_Int = 6667, |
| 6683 | VCVTSD2USIZrrb_Int = 6668, |
| 6684 | VCVTSH2SDZrm = 6669, |
| 6685 | VCVTSH2SDZrm_Int = 6670, |
| 6686 | VCVTSH2SDZrm_Intk = 6671, |
| 6687 | VCVTSH2SDZrm_Intkz = 6672, |
| 6688 | VCVTSH2SDZrr = 6673, |
| 6689 | VCVTSH2SDZrr_Int = 6674, |
| 6690 | VCVTSH2SDZrr_Intk = 6675, |
| 6691 | VCVTSH2SDZrr_Intkz = 6676, |
| 6692 | VCVTSH2SDZrrb_Int = 6677, |
| 6693 | VCVTSH2SDZrrb_Intk = 6678, |
| 6694 | VCVTSH2SDZrrb_Intkz = 6679, |
| 6695 | VCVTSH2SI64Zrm_Int = 6680, |
| 6696 | VCVTSH2SI64Zrr_Int = 6681, |
| 6697 | VCVTSH2SI64Zrrb_Int = 6682, |
| 6698 | VCVTSH2SIZrm_Int = 6683, |
| 6699 | VCVTSH2SIZrr_Int = 6684, |
| 6700 | VCVTSH2SIZrrb_Int = 6685, |
| 6701 | VCVTSH2SSZrm = 6686, |
| 6702 | VCVTSH2SSZrm_Int = 6687, |
| 6703 | VCVTSH2SSZrm_Intk = 6688, |
| 6704 | VCVTSH2SSZrm_Intkz = 6689, |
| 6705 | VCVTSH2SSZrr = 6690, |
| 6706 | VCVTSH2SSZrr_Int = 6691, |
| 6707 | VCVTSH2SSZrr_Intk = 6692, |
| 6708 | VCVTSH2SSZrr_Intkz = 6693, |
| 6709 | VCVTSH2SSZrrb_Int = 6694, |
| 6710 | VCVTSH2SSZrrb_Intk = 6695, |
| 6711 | VCVTSH2SSZrrb_Intkz = 6696, |
| 6712 | VCVTSH2USI64Zrm_Int = 6697, |
| 6713 | VCVTSH2USI64Zrr_Int = 6698, |
| 6714 | VCVTSH2USI64Zrrb_Int = 6699, |
| 6715 | VCVTSH2USIZrm_Int = 6700, |
| 6716 | VCVTSH2USIZrr_Int = 6701, |
| 6717 | VCVTSH2USIZrrb_Int = 6702, |
| 6718 | VCVTSI2SDZrm = 6703, |
| 6719 | VCVTSI2SDZrm_Int = 6704, |
| 6720 | VCVTSI2SDZrr = 6705, |
| 6721 | VCVTSI2SDZrr_Int = 6706, |
| 6722 | VCVTSI2SDrm = 6707, |
| 6723 | VCVTSI2SDrm_Int = 6708, |
| 6724 | VCVTSI2SDrr = 6709, |
| 6725 | VCVTSI2SDrr_Int = 6710, |
| 6726 | VCVTSI2SHZrm = 6711, |
| 6727 | VCVTSI2SHZrm_Int = 6712, |
| 6728 | VCVTSI2SHZrr = 6713, |
| 6729 | VCVTSI2SHZrr_Int = 6714, |
| 6730 | VCVTSI2SHZrrb_Int = 6715, |
| 6731 | VCVTSI2SSZrm = 6716, |
| 6732 | VCVTSI2SSZrm_Int = 6717, |
| 6733 | VCVTSI2SSZrr = 6718, |
| 6734 | VCVTSI2SSZrr_Int = 6719, |
| 6735 | VCVTSI2SSZrrb_Int = 6720, |
| 6736 | VCVTSI2SSrm = 6721, |
| 6737 | VCVTSI2SSrm_Int = 6722, |
| 6738 | VCVTSI2SSrr = 6723, |
| 6739 | VCVTSI2SSrr_Int = 6724, |
| 6740 | VCVTSI642SDZrm = 6725, |
| 6741 | VCVTSI642SDZrm_Int = 6726, |
| 6742 | VCVTSI642SDZrr = 6727, |
| 6743 | VCVTSI642SDZrr_Int = 6728, |
| 6744 | VCVTSI642SDZrrb_Int = 6729, |
| 6745 | VCVTSI642SDrm = 6730, |
| 6746 | VCVTSI642SDrm_Int = 6731, |
| 6747 | VCVTSI642SDrr = 6732, |
| 6748 | VCVTSI642SDrr_Int = 6733, |
| 6749 | VCVTSI642SHZrm = 6734, |
| 6750 | VCVTSI642SHZrm_Int = 6735, |
| 6751 | VCVTSI642SHZrr = 6736, |
| 6752 | VCVTSI642SHZrr_Int = 6737, |
| 6753 | VCVTSI642SHZrrb_Int = 6738, |
| 6754 | VCVTSI642SSZrm = 6739, |
| 6755 | VCVTSI642SSZrm_Int = 6740, |
| 6756 | VCVTSI642SSZrr = 6741, |
| 6757 | VCVTSI642SSZrr_Int = 6742, |
| 6758 | VCVTSI642SSZrrb_Int = 6743, |
| 6759 | VCVTSI642SSrm = 6744, |
| 6760 | VCVTSI642SSrm_Int = 6745, |
| 6761 | VCVTSI642SSrr = 6746, |
| 6762 | VCVTSI642SSrr_Int = 6747, |
| 6763 | VCVTSS2SDZrm = 6748, |
| 6764 | VCVTSS2SDZrm_Int = 6749, |
| 6765 | VCVTSS2SDZrm_Intk = 6750, |
| 6766 | VCVTSS2SDZrm_Intkz = 6751, |
| 6767 | VCVTSS2SDZrr = 6752, |
| 6768 | VCVTSS2SDZrr_Int = 6753, |
| 6769 | VCVTSS2SDZrr_Intk = 6754, |
| 6770 | VCVTSS2SDZrr_Intkz = 6755, |
| 6771 | VCVTSS2SDZrrb_Int = 6756, |
| 6772 | VCVTSS2SDZrrb_Intk = 6757, |
| 6773 | VCVTSS2SDZrrb_Intkz = 6758, |
| 6774 | VCVTSS2SDrm = 6759, |
| 6775 | VCVTSS2SDrm_Int = 6760, |
| 6776 | VCVTSS2SDrr = 6761, |
| 6777 | VCVTSS2SDrr_Int = 6762, |
| 6778 | VCVTSS2SHZrm = 6763, |
| 6779 | VCVTSS2SHZrm_Int = 6764, |
| 6780 | VCVTSS2SHZrm_Intk = 6765, |
| 6781 | VCVTSS2SHZrm_Intkz = 6766, |
| 6782 | VCVTSS2SHZrr = 6767, |
| 6783 | VCVTSS2SHZrr_Int = 6768, |
| 6784 | VCVTSS2SHZrr_Intk = 6769, |
| 6785 | VCVTSS2SHZrr_Intkz = 6770, |
| 6786 | VCVTSS2SHZrrb_Int = 6771, |
| 6787 | VCVTSS2SHZrrb_Intk = 6772, |
| 6788 | VCVTSS2SHZrrb_Intkz = 6773, |
| 6789 | VCVTSS2SI64Zrm = 6774, |
| 6790 | VCVTSS2SI64Zrm_Int = 6775, |
| 6791 | VCVTSS2SI64Zrr = 6776, |
| 6792 | VCVTSS2SI64Zrr_Int = 6777, |
| 6793 | VCVTSS2SI64Zrrb_Int = 6778, |
| 6794 | VCVTSS2SI64rm = 6779, |
| 6795 | VCVTSS2SI64rm_Int = 6780, |
| 6796 | VCVTSS2SI64rr = 6781, |
| 6797 | VCVTSS2SI64rr_Int = 6782, |
| 6798 | VCVTSS2SIZrm = 6783, |
| 6799 | VCVTSS2SIZrm_Int = 6784, |
| 6800 | VCVTSS2SIZrr = 6785, |
| 6801 | VCVTSS2SIZrr_Int = 6786, |
| 6802 | VCVTSS2SIZrrb_Int = 6787, |
| 6803 | VCVTSS2SIrm = 6788, |
| 6804 | VCVTSS2SIrm_Int = 6789, |
| 6805 | VCVTSS2SIrr = 6790, |
| 6806 | VCVTSS2SIrr_Int = 6791, |
| 6807 | VCVTSS2USI64Zrm_Int = 6792, |
| 6808 | VCVTSS2USI64Zrr_Int = 6793, |
| 6809 | VCVTSS2USI64Zrrb_Int = 6794, |
| 6810 | VCVTSS2USIZrm_Int = 6795, |
| 6811 | VCVTSS2USIZrr_Int = 6796, |
| 6812 | VCVTSS2USIZrrb_Int = 6797, |
| 6813 | VCVTTPD2DQYrm = 6798, |
| 6814 | VCVTTPD2DQYrr = 6799, |
| 6815 | VCVTTPD2DQZ128rm = 6800, |
| 6816 | VCVTTPD2DQZ128rmb = 6801, |
| 6817 | VCVTTPD2DQZ128rmbk = 6802, |
| 6818 | VCVTTPD2DQZ128rmbkz = 6803, |
| 6819 | VCVTTPD2DQZ128rmk = 6804, |
| 6820 | VCVTTPD2DQZ128rmkz = 6805, |
| 6821 | VCVTTPD2DQZ128rr = 6806, |
| 6822 | VCVTTPD2DQZ128rrk = 6807, |
| 6823 | VCVTTPD2DQZ128rrkz = 6808, |
| 6824 | VCVTTPD2DQZ256rm = 6809, |
| 6825 | VCVTTPD2DQZ256rmb = 6810, |
| 6826 | VCVTTPD2DQZ256rmbk = 6811, |
| 6827 | VCVTTPD2DQZ256rmbkz = 6812, |
| 6828 | VCVTTPD2DQZ256rmk = 6813, |
| 6829 | VCVTTPD2DQZ256rmkz = 6814, |
| 6830 | VCVTTPD2DQZ256rr = 6815, |
| 6831 | VCVTTPD2DQZ256rrk = 6816, |
| 6832 | VCVTTPD2DQZ256rrkz = 6817, |
| 6833 | VCVTTPD2DQZrm = 6818, |
| 6834 | VCVTTPD2DQZrmb = 6819, |
| 6835 | VCVTTPD2DQZrmbk = 6820, |
| 6836 | VCVTTPD2DQZrmbkz = 6821, |
| 6837 | VCVTTPD2DQZrmk = 6822, |
| 6838 | VCVTTPD2DQZrmkz = 6823, |
| 6839 | VCVTTPD2DQZrr = 6824, |
| 6840 | VCVTTPD2DQZrrb = 6825, |
| 6841 | VCVTTPD2DQZrrbk = 6826, |
| 6842 | VCVTTPD2DQZrrbkz = 6827, |
| 6843 | VCVTTPD2DQZrrk = 6828, |
| 6844 | VCVTTPD2DQZrrkz = 6829, |
| 6845 | VCVTTPD2DQrm = 6830, |
| 6846 | VCVTTPD2DQrr = 6831, |
| 6847 | VCVTTPD2QQZ128rm = 6832, |
| 6848 | VCVTTPD2QQZ128rmb = 6833, |
| 6849 | VCVTTPD2QQZ128rmbk = 6834, |
| 6850 | VCVTTPD2QQZ128rmbkz = 6835, |
| 6851 | VCVTTPD2QQZ128rmk = 6836, |
| 6852 | VCVTTPD2QQZ128rmkz = 6837, |
| 6853 | VCVTTPD2QQZ128rr = 6838, |
| 6854 | VCVTTPD2QQZ128rrk = 6839, |
| 6855 | VCVTTPD2QQZ128rrkz = 6840, |
| 6856 | VCVTTPD2QQZ256rm = 6841, |
| 6857 | VCVTTPD2QQZ256rmb = 6842, |
| 6858 | VCVTTPD2QQZ256rmbk = 6843, |
| 6859 | VCVTTPD2QQZ256rmbkz = 6844, |
| 6860 | VCVTTPD2QQZ256rmk = 6845, |
| 6861 | VCVTTPD2QQZ256rmkz = 6846, |
| 6862 | VCVTTPD2QQZ256rr = 6847, |
| 6863 | VCVTTPD2QQZ256rrk = 6848, |
| 6864 | VCVTTPD2QQZ256rrkz = 6849, |
| 6865 | VCVTTPD2QQZrm = 6850, |
| 6866 | VCVTTPD2QQZrmb = 6851, |
| 6867 | VCVTTPD2QQZrmbk = 6852, |
| 6868 | VCVTTPD2QQZrmbkz = 6853, |
| 6869 | VCVTTPD2QQZrmk = 6854, |
| 6870 | VCVTTPD2QQZrmkz = 6855, |
| 6871 | VCVTTPD2QQZrr = 6856, |
| 6872 | VCVTTPD2QQZrrb = 6857, |
| 6873 | VCVTTPD2QQZrrbk = 6858, |
| 6874 | VCVTTPD2QQZrrbkz = 6859, |
| 6875 | VCVTTPD2QQZrrk = 6860, |
| 6876 | VCVTTPD2QQZrrkz = 6861, |
| 6877 | VCVTTPD2UDQZ128rm = 6862, |
| 6878 | VCVTTPD2UDQZ128rmb = 6863, |
| 6879 | VCVTTPD2UDQZ128rmbk = 6864, |
| 6880 | VCVTTPD2UDQZ128rmbkz = 6865, |
| 6881 | VCVTTPD2UDQZ128rmk = 6866, |
| 6882 | VCVTTPD2UDQZ128rmkz = 6867, |
| 6883 | VCVTTPD2UDQZ128rr = 6868, |
| 6884 | VCVTTPD2UDQZ128rrk = 6869, |
| 6885 | VCVTTPD2UDQZ128rrkz = 6870, |
| 6886 | VCVTTPD2UDQZ256rm = 6871, |
| 6887 | VCVTTPD2UDQZ256rmb = 6872, |
| 6888 | VCVTTPD2UDQZ256rmbk = 6873, |
| 6889 | VCVTTPD2UDQZ256rmbkz = 6874, |
| 6890 | VCVTTPD2UDQZ256rmk = 6875, |
| 6891 | VCVTTPD2UDQZ256rmkz = 6876, |
| 6892 | VCVTTPD2UDQZ256rr = 6877, |
| 6893 | VCVTTPD2UDQZ256rrk = 6878, |
| 6894 | VCVTTPD2UDQZ256rrkz = 6879, |
| 6895 | VCVTTPD2UDQZrm = 6880, |
| 6896 | VCVTTPD2UDQZrmb = 6881, |
| 6897 | VCVTTPD2UDQZrmbk = 6882, |
| 6898 | VCVTTPD2UDQZrmbkz = 6883, |
| 6899 | VCVTTPD2UDQZrmk = 6884, |
| 6900 | VCVTTPD2UDQZrmkz = 6885, |
| 6901 | VCVTTPD2UDQZrr = 6886, |
| 6902 | VCVTTPD2UDQZrrb = 6887, |
| 6903 | VCVTTPD2UDQZrrbk = 6888, |
| 6904 | VCVTTPD2UDQZrrbkz = 6889, |
| 6905 | VCVTTPD2UDQZrrk = 6890, |
| 6906 | VCVTTPD2UDQZrrkz = 6891, |
| 6907 | VCVTTPD2UQQZ128rm = 6892, |
| 6908 | VCVTTPD2UQQZ128rmb = 6893, |
| 6909 | VCVTTPD2UQQZ128rmbk = 6894, |
| 6910 | VCVTTPD2UQQZ128rmbkz = 6895, |
| 6911 | VCVTTPD2UQQZ128rmk = 6896, |
| 6912 | VCVTTPD2UQQZ128rmkz = 6897, |
| 6913 | VCVTTPD2UQQZ128rr = 6898, |
| 6914 | VCVTTPD2UQQZ128rrk = 6899, |
| 6915 | VCVTTPD2UQQZ128rrkz = 6900, |
| 6916 | VCVTTPD2UQQZ256rm = 6901, |
| 6917 | VCVTTPD2UQQZ256rmb = 6902, |
| 6918 | VCVTTPD2UQQZ256rmbk = 6903, |
| 6919 | VCVTTPD2UQQZ256rmbkz = 6904, |
| 6920 | VCVTTPD2UQQZ256rmk = 6905, |
| 6921 | VCVTTPD2UQQZ256rmkz = 6906, |
| 6922 | VCVTTPD2UQQZ256rr = 6907, |
| 6923 | VCVTTPD2UQQZ256rrk = 6908, |
| 6924 | VCVTTPD2UQQZ256rrkz = 6909, |
| 6925 | VCVTTPD2UQQZrm = 6910, |
| 6926 | VCVTTPD2UQQZrmb = 6911, |
| 6927 | VCVTTPD2UQQZrmbk = 6912, |
| 6928 | VCVTTPD2UQQZrmbkz = 6913, |
| 6929 | VCVTTPD2UQQZrmk = 6914, |
| 6930 | VCVTTPD2UQQZrmkz = 6915, |
| 6931 | VCVTTPD2UQQZrr = 6916, |
| 6932 | VCVTTPD2UQQZrrb = 6917, |
| 6933 | VCVTTPD2UQQZrrbk = 6918, |
| 6934 | VCVTTPD2UQQZrrbkz = 6919, |
| 6935 | VCVTTPD2UQQZrrk = 6920, |
| 6936 | VCVTTPD2UQQZrrkz = 6921, |
| 6937 | VCVTTPH2DQZ128rm = 6922, |
| 6938 | VCVTTPH2DQZ128rmb = 6923, |
| 6939 | VCVTTPH2DQZ128rmbk = 6924, |
| 6940 | VCVTTPH2DQZ128rmbkz = 6925, |
| 6941 | VCVTTPH2DQZ128rmk = 6926, |
| 6942 | VCVTTPH2DQZ128rmkz = 6927, |
| 6943 | VCVTTPH2DQZ128rr = 6928, |
| 6944 | VCVTTPH2DQZ128rrk = 6929, |
| 6945 | VCVTTPH2DQZ128rrkz = 6930, |
| 6946 | VCVTTPH2DQZ256rm = 6931, |
| 6947 | VCVTTPH2DQZ256rmb = 6932, |
| 6948 | VCVTTPH2DQZ256rmbk = 6933, |
| 6949 | VCVTTPH2DQZ256rmbkz = 6934, |
| 6950 | VCVTTPH2DQZ256rmk = 6935, |
| 6951 | VCVTTPH2DQZ256rmkz = 6936, |
| 6952 | VCVTTPH2DQZ256rr = 6937, |
| 6953 | VCVTTPH2DQZ256rrk = 6938, |
| 6954 | VCVTTPH2DQZ256rrkz = 6939, |
| 6955 | VCVTTPH2DQZrm = 6940, |
| 6956 | VCVTTPH2DQZrmb = 6941, |
| 6957 | VCVTTPH2DQZrmbk = 6942, |
| 6958 | VCVTTPH2DQZrmbkz = 6943, |
| 6959 | VCVTTPH2DQZrmk = 6944, |
| 6960 | VCVTTPH2DQZrmkz = 6945, |
| 6961 | VCVTTPH2DQZrr = 6946, |
| 6962 | VCVTTPH2DQZrrb = 6947, |
| 6963 | VCVTTPH2DQZrrbk = 6948, |
| 6964 | VCVTTPH2DQZrrbkz = 6949, |
| 6965 | VCVTTPH2DQZrrk = 6950, |
| 6966 | VCVTTPH2DQZrrkz = 6951, |
| 6967 | VCVTTPH2QQZ128rm = 6952, |
| 6968 | VCVTTPH2QQZ128rmb = 6953, |
| 6969 | VCVTTPH2QQZ128rmbk = 6954, |
| 6970 | VCVTTPH2QQZ128rmbkz = 6955, |
| 6971 | VCVTTPH2QQZ128rmk = 6956, |
| 6972 | VCVTTPH2QQZ128rmkz = 6957, |
| 6973 | VCVTTPH2QQZ128rr = 6958, |
| 6974 | VCVTTPH2QQZ128rrk = 6959, |
| 6975 | VCVTTPH2QQZ128rrkz = 6960, |
| 6976 | VCVTTPH2QQZ256rm = 6961, |
| 6977 | VCVTTPH2QQZ256rmb = 6962, |
| 6978 | VCVTTPH2QQZ256rmbk = 6963, |
| 6979 | VCVTTPH2QQZ256rmbkz = 6964, |
| 6980 | VCVTTPH2QQZ256rmk = 6965, |
| 6981 | VCVTTPH2QQZ256rmkz = 6966, |
| 6982 | VCVTTPH2QQZ256rr = 6967, |
| 6983 | VCVTTPH2QQZ256rrk = 6968, |
| 6984 | VCVTTPH2QQZ256rrkz = 6969, |
| 6985 | VCVTTPH2QQZrm = 6970, |
| 6986 | VCVTTPH2QQZrmb = 6971, |
| 6987 | VCVTTPH2QQZrmbk = 6972, |
| 6988 | VCVTTPH2QQZrmbkz = 6973, |
| 6989 | VCVTTPH2QQZrmk = 6974, |
| 6990 | VCVTTPH2QQZrmkz = 6975, |
| 6991 | VCVTTPH2QQZrr = 6976, |
| 6992 | VCVTTPH2QQZrrb = 6977, |
| 6993 | VCVTTPH2QQZrrbk = 6978, |
| 6994 | VCVTTPH2QQZrrbkz = 6979, |
| 6995 | VCVTTPH2QQZrrk = 6980, |
| 6996 | VCVTTPH2QQZrrkz = 6981, |
| 6997 | VCVTTPH2UDQZ128rm = 6982, |
| 6998 | VCVTTPH2UDQZ128rmb = 6983, |
| 6999 | VCVTTPH2UDQZ128rmbk = 6984, |
| 7000 | VCVTTPH2UDQZ128rmbkz = 6985, |
| 7001 | VCVTTPH2UDQZ128rmk = 6986, |
| 7002 | VCVTTPH2UDQZ128rmkz = 6987, |
| 7003 | VCVTTPH2UDQZ128rr = 6988, |
| 7004 | VCVTTPH2UDQZ128rrk = 6989, |
| 7005 | VCVTTPH2UDQZ128rrkz = 6990, |
| 7006 | VCVTTPH2UDQZ256rm = 6991, |
| 7007 | VCVTTPH2UDQZ256rmb = 6992, |
| 7008 | VCVTTPH2UDQZ256rmbk = 6993, |
| 7009 | VCVTTPH2UDQZ256rmbkz = 6994, |
| 7010 | VCVTTPH2UDQZ256rmk = 6995, |
| 7011 | VCVTTPH2UDQZ256rmkz = 6996, |
| 7012 | VCVTTPH2UDQZ256rr = 6997, |
| 7013 | VCVTTPH2UDQZ256rrk = 6998, |
| 7014 | VCVTTPH2UDQZ256rrkz = 6999, |
| 7015 | VCVTTPH2UDQZrm = 7000, |
| 7016 | VCVTTPH2UDQZrmb = 7001, |
| 7017 | VCVTTPH2UDQZrmbk = 7002, |
| 7018 | VCVTTPH2UDQZrmbkz = 7003, |
| 7019 | VCVTTPH2UDQZrmk = 7004, |
| 7020 | VCVTTPH2UDQZrmkz = 7005, |
| 7021 | VCVTTPH2UDQZrr = 7006, |
| 7022 | VCVTTPH2UDQZrrb = 7007, |
| 7023 | VCVTTPH2UDQZrrbk = 7008, |
| 7024 | VCVTTPH2UDQZrrbkz = 7009, |
| 7025 | VCVTTPH2UDQZrrk = 7010, |
| 7026 | VCVTTPH2UDQZrrkz = 7011, |
| 7027 | VCVTTPH2UQQZ128rm = 7012, |
| 7028 | VCVTTPH2UQQZ128rmb = 7013, |
| 7029 | VCVTTPH2UQQZ128rmbk = 7014, |
| 7030 | VCVTTPH2UQQZ128rmbkz = 7015, |
| 7031 | VCVTTPH2UQQZ128rmk = 7016, |
| 7032 | VCVTTPH2UQQZ128rmkz = 7017, |
| 7033 | VCVTTPH2UQQZ128rr = 7018, |
| 7034 | VCVTTPH2UQQZ128rrk = 7019, |
| 7035 | VCVTTPH2UQQZ128rrkz = 7020, |
| 7036 | VCVTTPH2UQQZ256rm = 7021, |
| 7037 | VCVTTPH2UQQZ256rmb = 7022, |
| 7038 | VCVTTPH2UQQZ256rmbk = 7023, |
| 7039 | VCVTTPH2UQQZ256rmbkz = 7024, |
| 7040 | VCVTTPH2UQQZ256rmk = 7025, |
| 7041 | VCVTTPH2UQQZ256rmkz = 7026, |
| 7042 | VCVTTPH2UQQZ256rr = 7027, |
| 7043 | VCVTTPH2UQQZ256rrk = 7028, |
| 7044 | VCVTTPH2UQQZ256rrkz = 7029, |
| 7045 | VCVTTPH2UQQZrm = 7030, |
| 7046 | VCVTTPH2UQQZrmb = 7031, |
| 7047 | VCVTTPH2UQQZrmbk = 7032, |
| 7048 | VCVTTPH2UQQZrmbkz = 7033, |
| 7049 | VCVTTPH2UQQZrmk = 7034, |
| 7050 | VCVTTPH2UQQZrmkz = 7035, |
| 7051 | VCVTTPH2UQQZrr = 7036, |
| 7052 | VCVTTPH2UQQZrrb = 7037, |
| 7053 | VCVTTPH2UQQZrrbk = 7038, |
| 7054 | VCVTTPH2UQQZrrbkz = 7039, |
| 7055 | VCVTTPH2UQQZrrk = 7040, |
| 7056 | VCVTTPH2UQQZrrkz = 7041, |
| 7057 | VCVTTPH2UWZ128rm = 7042, |
| 7058 | VCVTTPH2UWZ128rmb = 7043, |
| 7059 | VCVTTPH2UWZ128rmbk = 7044, |
| 7060 | VCVTTPH2UWZ128rmbkz = 7045, |
| 7061 | VCVTTPH2UWZ128rmk = 7046, |
| 7062 | VCVTTPH2UWZ128rmkz = 7047, |
| 7063 | VCVTTPH2UWZ128rr = 7048, |
| 7064 | VCVTTPH2UWZ128rrk = 7049, |
| 7065 | VCVTTPH2UWZ128rrkz = 7050, |
| 7066 | VCVTTPH2UWZ256rm = 7051, |
| 7067 | VCVTTPH2UWZ256rmb = 7052, |
| 7068 | VCVTTPH2UWZ256rmbk = 7053, |
| 7069 | VCVTTPH2UWZ256rmbkz = 7054, |
| 7070 | VCVTTPH2UWZ256rmk = 7055, |
| 7071 | VCVTTPH2UWZ256rmkz = 7056, |
| 7072 | VCVTTPH2UWZ256rr = 7057, |
| 7073 | VCVTTPH2UWZ256rrk = 7058, |
| 7074 | VCVTTPH2UWZ256rrkz = 7059, |
| 7075 | VCVTTPH2UWZrm = 7060, |
| 7076 | VCVTTPH2UWZrmb = 7061, |
| 7077 | VCVTTPH2UWZrmbk = 7062, |
| 7078 | VCVTTPH2UWZrmbkz = 7063, |
| 7079 | VCVTTPH2UWZrmk = 7064, |
| 7080 | VCVTTPH2UWZrmkz = 7065, |
| 7081 | VCVTTPH2UWZrr = 7066, |
| 7082 | VCVTTPH2UWZrrb = 7067, |
| 7083 | VCVTTPH2UWZrrbk = 7068, |
| 7084 | VCVTTPH2UWZrrbkz = 7069, |
| 7085 | VCVTTPH2UWZrrk = 7070, |
| 7086 | VCVTTPH2UWZrrkz = 7071, |
| 7087 | VCVTTPH2WZ128rm = 7072, |
| 7088 | VCVTTPH2WZ128rmb = 7073, |
| 7089 | VCVTTPH2WZ128rmbk = 7074, |
| 7090 | VCVTTPH2WZ128rmbkz = 7075, |
| 7091 | VCVTTPH2WZ128rmk = 7076, |
| 7092 | VCVTTPH2WZ128rmkz = 7077, |
| 7093 | VCVTTPH2WZ128rr = 7078, |
| 7094 | VCVTTPH2WZ128rrk = 7079, |
| 7095 | VCVTTPH2WZ128rrkz = 7080, |
| 7096 | VCVTTPH2WZ256rm = 7081, |
| 7097 | VCVTTPH2WZ256rmb = 7082, |
| 7098 | VCVTTPH2WZ256rmbk = 7083, |
| 7099 | VCVTTPH2WZ256rmbkz = 7084, |
| 7100 | VCVTTPH2WZ256rmk = 7085, |
| 7101 | VCVTTPH2WZ256rmkz = 7086, |
| 7102 | VCVTTPH2WZ256rr = 7087, |
| 7103 | VCVTTPH2WZ256rrk = 7088, |
| 7104 | VCVTTPH2WZ256rrkz = 7089, |
| 7105 | VCVTTPH2WZrm = 7090, |
| 7106 | VCVTTPH2WZrmb = 7091, |
| 7107 | VCVTTPH2WZrmbk = 7092, |
| 7108 | VCVTTPH2WZrmbkz = 7093, |
| 7109 | VCVTTPH2WZrmk = 7094, |
| 7110 | VCVTTPH2WZrmkz = 7095, |
| 7111 | VCVTTPH2WZrr = 7096, |
| 7112 | VCVTTPH2WZrrb = 7097, |
| 7113 | VCVTTPH2WZrrbk = 7098, |
| 7114 | VCVTTPH2WZrrbkz = 7099, |
| 7115 | VCVTTPH2WZrrk = 7100, |
| 7116 | VCVTTPH2WZrrkz = 7101, |
| 7117 | VCVTTPS2DQYrm = 7102, |
| 7118 | VCVTTPS2DQYrr = 7103, |
| 7119 | VCVTTPS2DQZ128rm = 7104, |
| 7120 | VCVTTPS2DQZ128rmb = 7105, |
| 7121 | VCVTTPS2DQZ128rmbk = 7106, |
| 7122 | VCVTTPS2DQZ128rmbkz = 7107, |
| 7123 | VCVTTPS2DQZ128rmk = 7108, |
| 7124 | VCVTTPS2DQZ128rmkz = 7109, |
| 7125 | VCVTTPS2DQZ128rr = 7110, |
| 7126 | VCVTTPS2DQZ128rrk = 7111, |
| 7127 | VCVTTPS2DQZ128rrkz = 7112, |
| 7128 | VCVTTPS2DQZ256rm = 7113, |
| 7129 | VCVTTPS2DQZ256rmb = 7114, |
| 7130 | VCVTTPS2DQZ256rmbk = 7115, |
| 7131 | VCVTTPS2DQZ256rmbkz = 7116, |
| 7132 | VCVTTPS2DQZ256rmk = 7117, |
| 7133 | VCVTTPS2DQZ256rmkz = 7118, |
| 7134 | VCVTTPS2DQZ256rr = 7119, |
| 7135 | VCVTTPS2DQZ256rrk = 7120, |
| 7136 | VCVTTPS2DQZ256rrkz = 7121, |
| 7137 | VCVTTPS2DQZrm = 7122, |
| 7138 | VCVTTPS2DQZrmb = 7123, |
| 7139 | VCVTTPS2DQZrmbk = 7124, |
| 7140 | VCVTTPS2DQZrmbkz = 7125, |
| 7141 | VCVTTPS2DQZrmk = 7126, |
| 7142 | VCVTTPS2DQZrmkz = 7127, |
| 7143 | VCVTTPS2DQZrr = 7128, |
| 7144 | VCVTTPS2DQZrrb = 7129, |
| 7145 | VCVTTPS2DQZrrbk = 7130, |
| 7146 | VCVTTPS2DQZrrbkz = 7131, |
| 7147 | VCVTTPS2DQZrrk = 7132, |
| 7148 | VCVTTPS2DQZrrkz = 7133, |
| 7149 | VCVTTPS2DQrm = 7134, |
| 7150 | VCVTTPS2DQrr = 7135, |
| 7151 | VCVTTPS2QQZ128rm = 7136, |
| 7152 | VCVTTPS2QQZ128rmb = 7137, |
| 7153 | VCVTTPS2QQZ128rmbk = 7138, |
| 7154 | VCVTTPS2QQZ128rmbkz = 7139, |
| 7155 | VCVTTPS2QQZ128rmk = 7140, |
| 7156 | VCVTTPS2QQZ128rmkz = 7141, |
| 7157 | VCVTTPS2QQZ128rr = 7142, |
| 7158 | VCVTTPS2QQZ128rrk = 7143, |
| 7159 | VCVTTPS2QQZ128rrkz = 7144, |
| 7160 | VCVTTPS2QQZ256rm = 7145, |
| 7161 | VCVTTPS2QQZ256rmb = 7146, |
| 7162 | VCVTTPS2QQZ256rmbk = 7147, |
| 7163 | VCVTTPS2QQZ256rmbkz = 7148, |
| 7164 | VCVTTPS2QQZ256rmk = 7149, |
| 7165 | VCVTTPS2QQZ256rmkz = 7150, |
| 7166 | VCVTTPS2QQZ256rr = 7151, |
| 7167 | VCVTTPS2QQZ256rrk = 7152, |
| 7168 | VCVTTPS2QQZ256rrkz = 7153, |
| 7169 | VCVTTPS2QQZrm = 7154, |
| 7170 | VCVTTPS2QQZrmb = 7155, |
| 7171 | VCVTTPS2QQZrmbk = 7156, |
| 7172 | VCVTTPS2QQZrmbkz = 7157, |
| 7173 | VCVTTPS2QQZrmk = 7158, |
| 7174 | VCVTTPS2QQZrmkz = 7159, |
| 7175 | VCVTTPS2QQZrr = 7160, |
| 7176 | VCVTTPS2QQZrrb = 7161, |
| 7177 | VCVTTPS2QQZrrbk = 7162, |
| 7178 | VCVTTPS2QQZrrbkz = 7163, |
| 7179 | VCVTTPS2QQZrrk = 7164, |
| 7180 | VCVTTPS2QQZrrkz = 7165, |
| 7181 | VCVTTPS2UDQZ128rm = 7166, |
| 7182 | VCVTTPS2UDQZ128rmb = 7167, |
| 7183 | VCVTTPS2UDQZ128rmbk = 7168, |
| 7184 | VCVTTPS2UDQZ128rmbkz = 7169, |
| 7185 | VCVTTPS2UDQZ128rmk = 7170, |
| 7186 | VCVTTPS2UDQZ128rmkz = 7171, |
| 7187 | VCVTTPS2UDQZ128rr = 7172, |
| 7188 | VCVTTPS2UDQZ128rrk = 7173, |
| 7189 | VCVTTPS2UDQZ128rrkz = 7174, |
| 7190 | VCVTTPS2UDQZ256rm = 7175, |
| 7191 | VCVTTPS2UDQZ256rmb = 7176, |
| 7192 | VCVTTPS2UDQZ256rmbk = 7177, |
| 7193 | VCVTTPS2UDQZ256rmbkz = 7178, |
| 7194 | VCVTTPS2UDQZ256rmk = 7179, |
| 7195 | VCVTTPS2UDQZ256rmkz = 7180, |
| 7196 | VCVTTPS2UDQZ256rr = 7181, |
| 7197 | VCVTTPS2UDQZ256rrk = 7182, |
| 7198 | VCVTTPS2UDQZ256rrkz = 7183, |
| 7199 | VCVTTPS2UDQZrm = 7184, |
| 7200 | VCVTTPS2UDQZrmb = 7185, |
| 7201 | VCVTTPS2UDQZrmbk = 7186, |
| 7202 | VCVTTPS2UDQZrmbkz = 7187, |
| 7203 | VCVTTPS2UDQZrmk = 7188, |
| 7204 | VCVTTPS2UDQZrmkz = 7189, |
| 7205 | VCVTTPS2UDQZrr = 7190, |
| 7206 | VCVTTPS2UDQZrrb = 7191, |
| 7207 | VCVTTPS2UDQZrrbk = 7192, |
| 7208 | VCVTTPS2UDQZrrbkz = 7193, |
| 7209 | VCVTTPS2UDQZrrk = 7194, |
| 7210 | VCVTTPS2UDQZrrkz = 7195, |
| 7211 | VCVTTPS2UQQZ128rm = 7196, |
| 7212 | VCVTTPS2UQQZ128rmb = 7197, |
| 7213 | VCVTTPS2UQQZ128rmbk = 7198, |
| 7214 | VCVTTPS2UQQZ128rmbkz = 7199, |
| 7215 | VCVTTPS2UQQZ128rmk = 7200, |
| 7216 | VCVTTPS2UQQZ128rmkz = 7201, |
| 7217 | VCVTTPS2UQQZ128rr = 7202, |
| 7218 | VCVTTPS2UQQZ128rrk = 7203, |
| 7219 | VCVTTPS2UQQZ128rrkz = 7204, |
| 7220 | VCVTTPS2UQQZ256rm = 7205, |
| 7221 | VCVTTPS2UQQZ256rmb = 7206, |
| 7222 | VCVTTPS2UQQZ256rmbk = 7207, |
| 7223 | VCVTTPS2UQQZ256rmbkz = 7208, |
| 7224 | VCVTTPS2UQQZ256rmk = 7209, |
| 7225 | VCVTTPS2UQQZ256rmkz = 7210, |
| 7226 | VCVTTPS2UQQZ256rr = 7211, |
| 7227 | VCVTTPS2UQQZ256rrk = 7212, |
| 7228 | VCVTTPS2UQQZ256rrkz = 7213, |
| 7229 | VCVTTPS2UQQZrm = 7214, |
| 7230 | VCVTTPS2UQQZrmb = 7215, |
| 7231 | VCVTTPS2UQQZrmbk = 7216, |
| 7232 | VCVTTPS2UQQZrmbkz = 7217, |
| 7233 | VCVTTPS2UQQZrmk = 7218, |
| 7234 | VCVTTPS2UQQZrmkz = 7219, |
| 7235 | VCVTTPS2UQQZrr = 7220, |
| 7236 | VCVTTPS2UQQZrrb = 7221, |
| 7237 | VCVTTPS2UQQZrrbk = 7222, |
| 7238 | VCVTTPS2UQQZrrbkz = 7223, |
| 7239 | VCVTTPS2UQQZrrk = 7224, |
| 7240 | VCVTTPS2UQQZrrkz = 7225, |
| 7241 | VCVTTSD2SI64Zrm = 7226, |
| 7242 | VCVTTSD2SI64Zrm_Int = 7227, |
| 7243 | VCVTTSD2SI64Zrr = 7228, |
| 7244 | VCVTTSD2SI64Zrr_Int = 7229, |
| 7245 | VCVTTSD2SI64Zrrb_Int = 7230, |
| 7246 | VCVTTSD2SI64rm = 7231, |
| 7247 | VCVTTSD2SI64rm_Int = 7232, |
| 7248 | VCVTTSD2SI64rr = 7233, |
| 7249 | VCVTTSD2SI64rr_Int = 7234, |
| 7250 | VCVTTSD2SIZrm = 7235, |
| 7251 | VCVTTSD2SIZrm_Int = 7236, |
| 7252 | VCVTTSD2SIZrr = 7237, |
| 7253 | VCVTTSD2SIZrr_Int = 7238, |
| 7254 | VCVTTSD2SIZrrb_Int = 7239, |
| 7255 | VCVTTSD2SIrm = 7240, |
| 7256 | VCVTTSD2SIrm_Int = 7241, |
| 7257 | VCVTTSD2SIrr = 7242, |
| 7258 | VCVTTSD2SIrr_Int = 7243, |
| 7259 | VCVTTSD2USI64Zrm = 7244, |
| 7260 | VCVTTSD2USI64Zrm_Int = 7245, |
| 7261 | VCVTTSD2USI64Zrr = 7246, |
| 7262 | VCVTTSD2USI64Zrr_Int = 7247, |
| 7263 | VCVTTSD2USI64Zrrb_Int = 7248, |
| 7264 | VCVTTSD2USIZrm = 7249, |
| 7265 | VCVTTSD2USIZrm_Int = 7250, |
| 7266 | VCVTTSD2USIZrr = 7251, |
| 7267 | VCVTTSD2USIZrr_Int = 7252, |
| 7268 | VCVTTSD2USIZrrb_Int = 7253, |
| 7269 | VCVTTSH2SI64Zrm = 7254, |
| 7270 | VCVTTSH2SI64Zrm_Int = 7255, |
| 7271 | VCVTTSH2SI64Zrr = 7256, |
| 7272 | VCVTTSH2SI64Zrr_Int = 7257, |
| 7273 | VCVTTSH2SI64Zrrb_Int = 7258, |
| 7274 | VCVTTSH2SIZrm = 7259, |
| 7275 | VCVTTSH2SIZrm_Int = 7260, |
| 7276 | VCVTTSH2SIZrr = 7261, |
| 7277 | VCVTTSH2SIZrr_Int = 7262, |
| 7278 | VCVTTSH2SIZrrb_Int = 7263, |
| 7279 | VCVTTSH2USI64Zrm = 7264, |
| 7280 | VCVTTSH2USI64Zrm_Int = 7265, |
| 7281 | VCVTTSH2USI64Zrr = 7266, |
| 7282 | VCVTTSH2USI64Zrr_Int = 7267, |
| 7283 | VCVTTSH2USI64Zrrb_Int = 7268, |
| 7284 | VCVTTSH2USIZrm = 7269, |
| 7285 | VCVTTSH2USIZrm_Int = 7270, |
| 7286 | VCVTTSH2USIZrr = 7271, |
| 7287 | VCVTTSH2USIZrr_Int = 7272, |
| 7288 | VCVTTSH2USIZrrb_Int = 7273, |
| 7289 | VCVTTSS2SI64Zrm = 7274, |
| 7290 | VCVTTSS2SI64Zrm_Int = 7275, |
| 7291 | VCVTTSS2SI64Zrr = 7276, |
| 7292 | VCVTTSS2SI64Zrr_Int = 7277, |
| 7293 | VCVTTSS2SI64Zrrb_Int = 7278, |
| 7294 | VCVTTSS2SI64rm = 7279, |
| 7295 | VCVTTSS2SI64rm_Int = 7280, |
| 7296 | VCVTTSS2SI64rr = 7281, |
| 7297 | VCVTTSS2SI64rr_Int = 7282, |
| 7298 | VCVTTSS2SIZrm = 7283, |
| 7299 | VCVTTSS2SIZrm_Int = 7284, |
| 7300 | VCVTTSS2SIZrr = 7285, |
| 7301 | VCVTTSS2SIZrr_Int = 7286, |
| 7302 | VCVTTSS2SIZrrb_Int = 7287, |
| 7303 | VCVTTSS2SIrm = 7288, |
| 7304 | VCVTTSS2SIrm_Int = 7289, |
| 7305 | VCVTTSS2SIrr = 7290, |
| 7306 | VCVTTSS2SIrr_Int = 7291, |
| 7307 | VCVTTSS2USI64Zrm = 7292, |
| 7308 | VCVTTSS2USI64Zrm_Int = 7293, |
| 7309 | VCVTTSS2USI64Zrr = 7294, |
| 7310 | VCVTTSS2USI64Zrr_Int = 7295, |
| 7311 | VCVTTSS2USI64Zrrb_Int = 7296, |
| 7312 | VCVTTSS2USIZrm = 7297, |
| 7313 | VCVTTSS2USIZrm_Int = 7298, |
| 7314 | VCVTTSS2USIZrr = 7299, |
| 7315 | VCVTTSS2USIZrr_Int = 7300, |
| 7316 | VCVTTSS2USIZrrb_Int = 7301, |
| 7317 | VCVTUDQ2PDZ128rm = 7302, |
| 7318 | VCVTUDQ2PDZ128rmb = 7303, |
| 7319 | VCVTUDQ2PDZ128rmbk = 7304, |
| 7320 | VCVTUDQ2PDZ128rmbkz = 7305, |
| 7321 | VCVTUDQ2PDZ128rmk = 7306, |
| 7322 | VCVTUDQ2PDZ128rmkz = 7307, |
| 7323 | VCVTUDQ2PDZ128rr = 7308, |
| 7324 | VCVTUDQ2PDZ128rrk = 7309, |
| 7325 | VCVTUDQ2PDZ128rrkz = 7310, |
| 7326 | VCVTUDQ2PDZ256rm = 7311, |
| 7327 | VCVTUDQ2PDZ256rmb = 7312, |
| 7328 | VCVTUDQ2PDZ256rmbk = 7313, |
| 7329 | VCVTUDQ2PDZ256rmbkz = 7314, |
| 7330 | VCVTUDQ2PDZ256rmk = 7315, |
| 7331 | VCVTUDQ2PDZ256rmkz = 7316, |
| 7332 | VCVTUDQ2PDZ256rr = 7317, |
| 7333 | VCVTUDQ2PDZ256rrk = 7318, |
| 7334 | VCVTUDQ2PDZ256rrkz = 7319, |
| 7335 | VCVTUDQ2PDZrm = 7320, |
| 7336 | VCVTUDQ2PDZrmb = 7321, |
| 7337 | VCVTUDQ2PDZrmbk = 7322, |
| 7338 | VCVTUDQ2PDZrmbkz = 7323, |
| 7339 | VCVTUDQ2PDZrmk = 7324, |
| 7340 | VCVTUDQ2PDZrmkz = 7325, |
| 7341 | VCVTUDQ2PDZrr = 7326, |
| 7342 | VCVTUDQ2PDZrrk = 7327, |
| 7343 | VCVTUDQ2PDZrrkz = 7328, |
| 7344 | VCVTUDQ2PHZ128rm = 7329, |
| 7345 | VCVTUDQ2PHZ128rmb = 7330, |
| 7346 | VCVTUDQ2PHZ128rmbk = 7331, |
| 7347 | VCVTUDQ2PHZ128rmbkz = 7332, |
| 7348 | VCVTUDQ2PHZ128rmk = 7333, |
| 7349 | VCVTUDQ2PHZ128rmkz = 7334, |
| 7350 | VCVTUDQ2PHZ128rr = 7335, |
| 7351 | VCVTUDQ2PHZ128rrk = 7336, |
| 7352 | VCVTUDQ2PHZ128rrkz = 7337, |
| 7353 | VCVTUDQ2PHZ256rm = 7338, |
| 7354 | VCVTUDQ2PHZ256rmb = 7339, |
| 7355 | VCVTUDQ2PHZ256rmbk = 7340, |
| 7356 | VCVTUDQ2PHZ256rmbkz = 7341, |
| 7357 | VCVTUDQ2PHZ256rmk = 7342, |
| 7358 | VCVTUDQ2PHZ256rmkz = 7343, |
| 7359 | VCVTUDQ2PHZ256rr = 7344, |
| 7360 | VCVTUDQ2PHZ256rrk = 7345, |
| 7361 | VCVTUDQ2PHZ256rrkz = 7346, |
| 7362 | VCVTUDQ2PHZrm = 7347, |
| 7363 | VCVTUDQ2PHZrmb = 7348, |
| 7364 | VCVTUDQ2PHZrmbk = 7349, |
| 7365 | VCVTUDQ2PHZrmbkz = 7350, |
| 7366 | VCVTUDQ2PHZrmk = 7351, |
| 7367 | VCVTUDQ2PHZrmkz = 7352, |
| 7368 | VCVTUDQ2PHZrr = 7353, |
| 7369 | VCVTUDQ2PHZrrb = 7354, |
| 7370 | VCVTUDQ2PHZrrbk = 7355, |
| 7371 | VCVTUDQ2PHZrrbkz = 7356, |
| 7372 | VCVTUDQ2PHZrrk = 7357, |
| 7373 | VCVTUDQ2PHZrrkz = 7358, |
| 7374 | VCVTUDQ2PSZ128rm = 7359, |
| 7375 | VCVTUDQ2PSZ128rmb = 7360, |
| 7376 | VCVTUDQ2PSZ128rmbk = 7361, |
| 7377 | VCVTUDQ2PSZ128rmbkz = 7362, |
| 7378 | VCVTUDQ2PSZ128rmk = 7363, |
| 7379 | VCVTUDQ2PSZ128rmkz = 7364, |
| 7380 | VCVTUDQ2PSZ128rr = 7365, |
| 7381 | VCVTUDQ2PSZ128rrk = 7366, |
| 7382 | VCVTUDQ2PSZ128rrkz = 7367, |
| 7383 | VCVTUDQ2PSZ256rm = 7368, |
| 7384 | VCVTUDQ2PSZ256rmb = 7369, |
| 7385 | VCVTUDQ2PSZ256rmbk = 7370, |
| 7386 | VCVTUDQ2PSZ256rmbkz = 7371, |
| 7387 | VCVTUDQ2PSZ256rmk = 7372, |
| 7388 | VCVTUDQ2PSZ256rmkz = 7373, |
| 7389 | VCVTUDQ2PSZ256rr = 7374, |
| 7390 | VCVTUDQ2PSZ256rrk = 7375, |
| 7391 | VCVTUDQ2PSZ256rrkz = 7376, |
| 7392 | VCVTUDQ2PSZrm = 7377, |
| 7393 | VCVTUDQ2PSZrmb = 7378, |
| 7394 | VCVTUDQ2PSZrmbk = 7379, |
| 7395 | VCVTUDQ2PSZrmbkz = 7380, |
| 7396 | VCVTUDQ2PSZrmk = 7381, |
| 7397 | VCVTUDQ2PSZrmkz = 7382, |
| 7398 | VCVTUDQ2PSZrr = 7383, |
| 7399 | VCVTUDQ2PSZrrb = 7384, |
| 7400 | VCVTUDQ2PSZrrbk = 7385, |
| 7401 | VCVTUDQ2PSZrrbkz = 7386, |
| 7402 | VCVTUDQ2PSZrrk = 7387, |
| 7403 | VCVTUDQ2PSZrrkz = 7388, |
| 7404 | VCVTUQQ2PDZ128rm = 7389, |
| 7405 | VCVTUQQ2PDZ128rmb = 7390, |
| 7406 | VCVTUQQ2PDZ128rmbk = 7391, |
| 7407 | VCVTUQQ2PDZ128rmbkz = 7392, |
| 7408 | VCVTUQQ2PDZ128rmk = 7393, |
| 7409 | VCVTUQQ2PDZ128rmkz = 7394, |
| 7410 | VCVTUQQ2PDZ128rr = 7395, |
| 7411 | VCVTUQQ2PDZ128rrk = 7396, |
| 7412 | VCVTUQQ2PDZ128rrkz = 7397, |
| 7413 | VCVTUQQ2PDZ256rm = 7398, |
| 7414 | VCVTUQQ2PDZ256rmb = 7399, |
| 7415 | VCVTUQQ2PDZ256rmbk = 7400, |
| 7416 | VCVTUQQ2PDZ256rmbkz = 7401, |
| 7417 | VCVTUQQ2PDZ256rmk = 7402, |
| 7418 | VCVTUQQ2PDZ256rmkz = 7403, |
| 7419 | VCVTUQQ2PDZ256rr = 7404, |
| 7420 | VCVTUQQ2PDZ256rrk = 7405, |
| 7421 | VCVTUQQ2PDZ256rrkz = 7406, |
| 7422 | VCVTUQQ2PDZrm = 7407, |
| 7423 | VCVTUQQ2PDZrmb = 7408, |
| 7424 | VCVTUQQ2PDZrmbk = 7409, |
| 7425 | VCVTUQQ2PDZrmbkz = 7410, |
| 7426 | VCVTUQQ2PDZrmk = 7411, |
| 7427 | VCVTUQQ2PDZrmkz = 7412, |
| 7428 | VCVTUQQ2PDZrr = 7413, |
| 7429 | VCVTUQQ2PDZrrb = 7414, |
| 7430 | VCVTUQQ2PDZrrbk = 7415, |
| 7431 | VCVTUQQ2PDZrrbkz = 7416, |
| 7432 | VCVTUQQ2PDZrrk = 7417, |
| 7433 | VCVTUQQ2PDZrrkz = 7418, |
| 7434 | VCVTUQQ2PHZ128rm = 7419, |
| 7435 | VCVTUQQ2PHZ128rmb = 7420, |
| 7436 | VCVTUQQ2PHZ128rmbk = 7421, |
| 7437 | VCVTUQQ2PHZ128rmbkz = 7422, |
| 7438 | VCVTUQQ2PHZ128rmk = 7423, |
| 7439 | VCVTUQQ2PHZ128rmkz = 7424, |
| 7440 | VCVTUQQ2PHZ128rr = 7425, |
| 7441 | VCVTUQQ2PHZ128rrk = 7426, |
| 7442 | VCVTUQQ2PHZ128rrkz = 7427, |
| 7443 | VCVTUQQ2PHZ256rm = 7428, |
| 7444 | VCVTUQQ2PHZ256rmb = 7429, |
| 7445 | VCVTUQQ2PHZ256rmbk = 7430, |
| 7446 | VCVTUQQ2PHZ256rmbkz = 7431, |
| 7447 | VCVTUQQ2PHZ256rmk = 7432, |
| 7448 | VCVTUQQ2PHZ256rmkz = 7433, |
| 7449 | VCVTUQQ2PHZ256rr = 7434, |
| 7450 | VCVTUQQ2PHZ256rrk = 7435, |
| 7451 | VCVTUQQ2PHZ256rrkz = 7436, |
| 7452 | VCVTUQQ2PHZrm = 7437, |
| 7453 | VCVTUQQ2PHZrmb = 7438, |
| 7454 | VCVTUQQ2PHZrmbk = 7439, |
| 7455 | VCVTUQQ2PHZrmbkz = 7440, |
| 7456 | VCVTUQQ2PHZrmk = 7441, |
| 7457 | VCVTUQQ2PHZrmkz = 7442, |
| 7458 | VCVTUQQ2PHZrr = 7443, |
| 7459 | VCVTUQQ2PHZrrb = 7444, |
| 7460 | VCVTUQQ2PHZrrbk = 7445, |
| 7461 | VCVTUQQ2PHZrrbkz = 7446, |
| 7462 | VCVTUQQ2PHZrrk = 7447, |
| 7463 | VCVTUQQ2PHZrrkz = 7448, |
| 7464 | VCVTUQQ2PSZ128rm = 7449, |
| 7465 | VCVTUQQ2PSZ128rmb = 7450, |
| 7466 | VCVTUQQ2PSZ128rmbk = 7451, |
| 7467 | VCVTUQQ2PSZ128rmbkz = 7452, |
| 7468 | VCVTUQQ2PSZ128rmk = 7453, |
| 7469 | VCVTUQQ2PSZ128rmkz = 7454, |
| 7470 | VCVTUQQ2PSZ128rr = 7455, |
| 7471 | VCVTUQQ2PSZ128rrk = 7456, |
| 7472 | VCVTUQQ2PSZ128rrkz = 7457, |
| 7473 | VCVTUQQ2PSZ256rm = 7458, |
| 7474 | VCVTUQQ2PSZ256rmb = 7459, |
| 7475 | VCVTUQQ2PSZ256rmbk = 7460, |
| 7476 | VCVTUQQ2PSZ256rmbkz = 7461, |
| 7477 | VCVTUQQ2PSZ256rmk = 7462, |
| 7478 | VCVTUQQ2PSZ256rmkz = 7463, |
| 7479 | VCVTUQQ2PSZ256rr = 7464, |
| 7480 | VCVTUQQ2PSZ256rrk = 7465, |
| 7481 | VCVTUQQ2PSZ256rrkz = 7466, |
| 7482 | VCVTUQQ2PSZrm = 7467, |
| 7483 | VCVTUQQ2PSZrmb = 7468, |
| 7484 | VCVTUQQ2PSZrmbk = 7469, |
| 7485 | VCVTUQQ2PSZrmbkz = 7470, |
| 7486 | VCVTUQQ2PSZrmk = 7471, |
| 7487 | VCVTUQQ2PSZrmkz = 7472, |
| 7488 | VCVTUQQ2PSZrr = 7473, |
| 7489 | VCVTUQQ2PSZrrb = 7474, |
| 7490 | VCVTUQQ2PSZrrbk = 7475, |
| 7491 | VCVTUQQ2PSZrrbkz = 7476, |
| 7492 | VCVTUQQ2PSZrrk = 7477, |
| 7493 | VCVTUQQ2PSZrrkz = 7478, |
| 7494 | VCVTUSI2SDZrm = 7479, |
| 7495 | VCVTUSI2SDZrm_Int = 7480, |
| 7496 | VCVTUSI2SDZrr = 7481, |
| 7497 | VCVTUSI2SDZrr_Int = 7482, |
| 7498 | VCVTUSI2SHZrm = 7483, |
| 7499 | VCVTUSI2SHZrm_Int = 7484, |
| 7500 | VCVTUSI2SHZrr = 7485, |
| 7501 | VCVTUSI2SHZrr_Int = 7486, |
| 7502 | VCVTUSI2SHZrrb_Int = 7487, |
| 7503 | VCVTUSI2SSZrm = 7488, |
| 7504 | VCVTUSI2SSZrm_Int = 7489, |
| 7505 | VCVTUSI2SSZrr = 7490, |
| 7506 | VCVTUSI2SSZrr_Int = 7491, |
| 7507 | VCVTUSI2SSZrrb_Int = 7492, |
| 7508 | VCVTUSI642SDZrm = 7493, |
| 7509 | VCVTUSI642SDZrm_Int = 7494, |
| 7510 | VCVTUSI642SDZrr = 7495, |
| 7511 | VCVTUSI642SDZrr_Int = 7496, |
| 7512 | VCVTUSI642SDZrrb_Int = 7497, |
| 7513 | VCVTUSI642SHZrm = 7498, |
| 7514 | VCVTUSI642SHZrm_Int = 7499, |
| 7515 | VCVTUSI642SHZrr = 7500, |
| 7516 | VCVTUSI642SHZrr_Int = 7501, |
| 7517 | VCVTUSI642SHZrrb_Int = 7502, |
| 7518 | VCVTUSI642SSZrm = 7503, |
| 7519 | VCVTUSI642SSZrm_Int = 7504, |
| 7520 | VCVTUSI642SSZrr = 7505, |
| 7521 | VCVTUSI642SSZrr_Int = 7506, |
| 7522 | VCVTUSI642SSZrrb_Int = 7507, |
| 7523 | VCVTUW2PHZ128rm = 7508, |
| 7524 | VCVTUW2PHZ128rmb = 7509, |
| 7525 | VCVTUW2PHZ128rmbk = 7510, |
| 7526 | VCVTUW2PHZ128rmbkz = 7511, |
| 7527 | VCVTUW2PHZ128rmk = 7512, |
| 7528 | VCVTUW2PHZ128rmkz = 7513, |
| 7529 | VCVTUW2PHZ128rr = 7514, |
| 7530 | VCVTUW2PHZ128rrk = 7515, |
| 7531 | VCVTUW2PHZ128rrkz = 7516, |
| 7532 | VCVTUW2PHZ256rm = 7517, |
| 7533 | VCVTUW2PHZ256rmb = 7518, |
| 7534 | VCVTUW2PHZ256rmbk = 7519, |
| 7535 | VCVTUW2PHZ256rmbkz = 7520, |
| 7536 | VCVTUW2PHZ256rmk = 7521, |
| 7537 | VCVTUW2PHZ256rmkz = 7522, |
| 7538 | VCVTUW2PHZ256rr = 7523, |
| 7539 | VCVTUW2PHZ256rrk = 7524, |
| 7540 | VCVTUW2PHZ256rrkz = 7525, |
| 7541 | VCVTUW2PHZrm = 7526, |
| 7542 | VCVTUW2PHZrmb = 7527, |
| 7543 | VCVTUW2PHZrmbk = 7528, |
| 7544 | VCVTUW2PHZrmbkz = 7529, |
| 7545 | VCVTUW2PHZrmk = 7530, |
| 7546 | VCVTUW2PHZrmkz = 7531, |
| 7547 | VCVTUW2PHZrr = 7532, |
| 7548 | VCVTUW2PHZrrb = 7533, |
| 7549 | VCVTUW2PHZrrbk = 7534, |
| 7550 | VCVTUW2PHZrrbkz = 7535, |
| 7551 | VCVTUW2PHZrrk = 7536, |
| 7552 | VCVTUW2PHZrrkz = 7537, |
| 7553 | VCVTW2PHZ128rm = 7538, |
| 7554 | VCVTW2PHZ128rmb = 7539, |
| 7555 | VCVTW2PHZ128rmbk = 7540, |
| 7556 | VCVTW2PHZ128rmbkz = 7541, |
| 7557 | VCVTW2PHZ128rmk = 7542, |
| 7558 | VCVTW2PHZ128rmkz = 7543, |
| 7559 | VCVTW2PHZ128rr = 7544, |
| 7560 | VCVTW2PHZ128rrk = 7545, |
| 7561 | VCVTW2PHZ128rrkz = 7546, |
| 7562 | VCVTW2PHZ256rm = 7547, |
| 7563 | VCVTW2PHZ256rmb = 7548, |
| 7564 | VCVTW2PHZ256rmbk = 7549, |
| 7565 | VCVTW2PHZ256rmbkz = 7550, |
| 7566 | VCVTW2PHZ256rmk = 7551, |
| 7567 | VCVTW2PHZ256rmkz = 7552, |
| 7568 | VCVTW2PHZ256rr = 7553, |
| 7569 | VCVTW2PHZ256rrk = 7554, |
| 7570 | VCVTW2PHZ256rrkz = 7555, |
| 7571 | VCVTW2PHZrm = 7556, |
| 7572 | VCVTW2PHZrmb = 7557, |
| 7573 | VCVTW2PHZrmbk = 7558, |
| 7574 | VCVTW2PHZrmbkz = 7559, |
| 7575 | VCVTW2PHZrmk = 7560, |
| 7576 | VCVTW2PHZrmkz = 7561, |
| 7577 | VCVTW2PHZrr = 7562, |
| 7578 | VCVTW2PHZrrb = 7563, |
| 7579 | VCVTW2PHZrrbk = 7564, |
| 7580 | VCVTW2PHZrrbkz = 7565, |
| 7581 | VCVTW2PHZrrk = 7566, |
| 7582 | VCVTW2PHZrrkz = 7567, |
| 7583 | VDBPSADBWZ128rmi = 7568, |
| 7584 | VDBPSADBWZ128rmik = 7569, |
| 7585 | VDBPSADBWZ128rmikz = 7570, |
| 7586 | VDBPSADBWZ128rri = 7571, |
| 7587 | VDBPSADBWZ128rrik = 7572, |
| 7588 | VDBPSADBWZ128rrikz = 7573, |
| 7589 | VDBPSADBWZ256rmi = 7574, |
| 7590 | VDBPSADBWZ256rmik = 7575, |
| 7591 | VDBPSADBWZ256rmikz = 7576, |
| 7592 | VDBPSADBWZ256rri = 7577, |
| 7593 | VDBPSADBWZ256rrik = 7578, |
| 7594 | VDBPSADBWZ256rrikz = 7579, |
| 7595 | VDBPSADBWZrmi = 7580, |
| 7596 | VDBPSADBWZrmik = 7581, |
| 7597 | VDBPSADBWZrmikz = 7582, |
| 7598 | VDBPSADBWZrri = 7583, |
| 7599 | VDBPSADBWZrrik = 7584, |
| 7600 | VDBPSADBWZrrikz = 7585, |
| 7601 | VDIVPDYrm = 7586, |
| 7602 | VDIVPDYrr = 7587, |
| 7603 | VDIVPDZ128rm = 7588, |
| 7604 | VDIVPDZ128rmb = 7589, |
| 7605 | VDIVPDZ128rmbk = 7590, |
| 7606 | VDIVPDZ128rmbkz = 7591, |
| 7607 | VDIVPDZ128rmk = 7592, |
| 7608 | VDIVPDZ128rmkz = 7593, |
| 7609 | VDIVPDZ128rr = 7594, |
| 7610 | VDIVPDZ128rrk = 7595, |
| 7611 | VDIVPDZ128rrkz = 7596, |
| 7612 | VDIVPDZ256rm = 7597, |
| 7613 | VDIVPDZ256rmb = 7598, |
| 7614 | VDIVPDZ256rmbk = 7599, |
| 7615 | VDIVPDZ256rmbkz = 7600, |
| 7616 | VDIVPDZ256rmk = 7601, |
| 7617 | VDIVPDZ256rmkz = 7602, |
| 7618 | VDIVPDZ256rr = 7603, |
| 7619 | VDIVPDZ256rrk = 7604, |
| 7620 | VDIVPDZ256rrkz = 7605, |
| 7621 | VDIVPDZrm = 7606, |
| 7622 | VDIVPDZrmb = 7607, |
| 7623 | VDIVPDZrmbk = 7608, |
| 7624 | VDIVPDZrmbkz = 7609, |
| 7625 | VDIVPDZrmk = 7610, |
| 7626 | VDIVPDZrmkz = 7611, |
| 7627 | VDIVPDZrr = 7612, |
| 7628 | VDIVPDZrrb = 7613, |
| 7629 | VDIVPDZrrbk = 7614, |
| 7630 | VDIVPDZrrbkz = 7615, |
| 7631 | VDIVPDZrrk = 7616, |
| 7632 | VDIVPDZrrkz = 7617, |
| 7633 | VDIVPDrm = 7618, |
| 7634 | VDIVPDrr = 7619, |
| 7635 | VDIVPHZ128rm = 7620, |
| 7636 | VDIVPHZ128rmb = 7621, |
| 7637 | VDIVPHZ128rmbk = 7622, |
| 7638 | VDIVPHZ128rmbkz = 7623, |
| 7639 | VDIVPHZ128rmk = 7624, |
| 7640 | VDIVPHZ128rmkz = 7625, |
| 7641 | VDIVPHZ128rr = 7626, |
| 7642 | VDIVPHZ128rrk = 7627, |
| 7643 | VDIVPHZ128rrkz = 7628, |
| 7644 | VDIVPHZ256rm = 7629, |
| 7645 | VDIVPHZ256rmb = 7630, |
| 7646 | VDIVPHZ256rmbk = 7631, |
| 7647 | VDIVPHZ256rmbkz = 7632, |
| 7648 | VDIVPHZ256rmk = 7633, |
| 7649 | VDIVPHZ256rmkz = 7634, |
| 7650 | VDIVPHZ256rr = 7635, |
| 7651 | VDIVPHZ256rrk = 7636, |
| 7652 | VDIVPHZ256rrkz = 7637, |
| 7653 | VDIVPHZrm = 7638, |
| 7654 | VDIVPHZrmb = 7639, |
| 7655 | VDIVPHZrmbk = 7640, |
| 7656 | VDIVPHZrmbkz = 7641, |
| 7657 | VDIVPHZrmk = 7642, |
| 7658 | VDIVPHZrmkz = 7643, |
| 7659 | VDIVPHZrr = 7644, |
| 7660 | VDIVPHZrrb = 7645, |
| 7661 | VDIVPHZrrbk = 7646, |
| 7662 | VDIVPHZrrbkz = 7647, |
| 7663 | VDIVPHZrrk = 7648, |
| 7664 | VDIVPHZrrkz = 7649, |
| 7665 | VDIVPSYrm = 7650, |
| 7666 | VDIVPSYrr = 7651, |
| 7667 | VDIVPSZ128rm = 7652, |
| 7668 | VDIVPSZ128rmb = 7653, |
| 7669 | VDIVPSZ128rmbk = 7654, |
| 7670 | VDIVPSZ128rmbkz = 7655, |
| 7671 | VDIVPSZ128rmk = 7656, |
| 7672 | VDIVPSZ128rmkz = 7657, |
| 7673 | VDIVPSZ128rr = 7658, |
| 7674 | VDIVPSZ128rrk = 7659, |
| 7675 | VDIVPSZ128rrkz = 7660, |
| 7676 | VDIVPSZ256rm = 7661, |
| 7677 | VDIVPSZ256rmb = 7662, |
| 7678 | VDIVPSZ256rmbk = 7663, |
| 7679 | VDIVPSZ256rmbkz = 7664, |
| 7680 | VDIVPSZ256rmk = 7665, |
| 7681 | VDIVPSZ256rmkz = 7666, |
| 7682 | VDIVPSZ256rr = 7667, |
| 7683 | VDIVPSZ256rrk = 7668, |
| 7684 | VDIVPSZ256rrkz = 7669, |
| 7685 | VDIVPSZrm = 7670, |
| 7686 | VDIVPSZrmb = 7671, |
| 7687 | VDIVPSZrmbk = 7672, |
| 7688 | VDIVPSZrmbkz = 7673, |
| 7689 | VDIVPSZrmk = 7674, |
| 7690 | VDIVPSZrmkz = 7675, |
| 7691 | VDIVPSZrr = 7676, |
| 7692 | VDIVPSZrrb = 7677, |
| 7693 | VDIVPSZrrbk = 7678, |
| 7694 | VDIVPSZrrbkz = 7679, |
| 7695 | VDIVPSZrrk = 7680, |
| 7696 | VDIVPSZrrkz = 7681, |
| 7697 | VDIVPSrm = 7682, |
| 7698 | VDIVPSrr = 7683, |
| 7699 | VDIVSDZrm = 7684, |
| 7700 | VDIVSDZrm_Int = 7685, |
| 7701 | VDIVSDZrm_Intk = 7686, |
| 7702 | VDIVSDZrm_Intkz = 7687, |
| 7703 | VDIVSDZrr = 7688, |
| 7704 | VDIVSDZrr_Int = 7689, |
| 7705 | VDIVSDZrr_Intk = 7690, |
| 7706 | VDIVSDZrr_Intkz = 7691, |
| 7707 | VDIVSDZrrb_Int = 7692, |
| 7708 | VDIVSDZrrb_Intk = 7693, |
| 7709 | VDIVSDZrrb_Intkz = 7694, |
| 7710 | VDIVSDrm = 7695, |
| 7711 | VDIVSDrm_Int = 7696, |
| 7712 | VDIVSDrr = 7697, |
| 7713 | VDIVSDrr_Int = 7698, |
| 7714 | VDIVSHZrm = 7699, |
| 7715 | VDIVSHZrm_Int = 7700, |
| 7716 | VDIVSHZrm_Intk = 7701, |
| 7717 | VDIVSHZrm_Intkz = 7702, |
| 7718 | VDIVSHZrr = 7703, |
| 7719 | VDIVSHZrr_Int = 7704, |
| 7720 | VDIVSHZrr_Intk = 7705, |
| 7721 | VDIVSHZrr_Intkz = 7706, |
| 7722 | VDIVSHZrrb_Int = 7707, |
| 7723 | VDIVSHZrrb_Intk = 7708, |
| 7724 | VDIVSHZrrb_Intkz = 7709, |
| 7725 | VDIVSSZrm = 7710, |
| 7726 | VDIVSSZrm_Int = 7711, |
| 7727 | VDIVSSZrm_Intk = 7712, |
| 7728 | VDIVSSZrm_Intkz = 7713, |
| 7729 | VDIVSSZrr = 7714, |
| 7730 | VDIVSSZrr_Int = 7715, |
| 7731 | VDIVSSZrr_Intk = 7716, |
| 7732 | VDIVSSZrr_Intkz = 7717, |
| 7733 | VDIVSSZrrb_Int = 7718, |
| 7734 | VDIVSSZrrb_Intk = 7719, |
| 7735 | VDIVSSZrrb_Intkz = 7720, |
| 7736 | VDIVSSrm = 7721, |
| 7737 | VDIVSSrm_Int = 7722, |
| 7738 | VDIVSSrr = 7723, |
| 7739 | VDIVSSrr_Int = 7724, |
| 7740 | VDPBF16PSZ128m = 7725, |
| 7741 | VDPBF16PSZ128mb = 7726, |
| 7742 | VDPBF16PSZ128mbk = 7727, |
| 7743 | VDPBF16PSZ128mbkz = 7728, |
| 7744 | VDPBF16PSZ128mk = 7729, |
| 7745 | VDPBF16PSZ128mkz = 7730, |
| 7746 | VDPBF16PSZ128r = 7731, |
| 7747 | VDPBF16PSZ128rk = 7732, |
| 7748 | VDPBF16PSZ128rkz = 7733, |
| 7749 | VDPBF16PSZ256m = 7734, |
| 7750 | VDPBF16PSZ256mb = 7735, |
| 7751 | VDPBF16PSZ256mbk = 7736, |
| 7752 | VDPBF16PSZ256mbkz = 7737, |
| 7753 | VDPBF16PSZ256mk = 7738, |
| 7754 | VDPBF16PSZ256mkz = 7739, |
| 7755 | VDPBF16PSZ256r = 7740, |
| 7756 | VDPBF16PSZ256rk = 7741, |
| 7757 | VDPBF16PSZ256rkz = 7742, |
| 7758 | VDPBF16PSZm = 7743, |
| 7759 | VDPBF16PSZmb = 7744, |
| 7760 | VDPBF16PSZmbk = 7745, |
| 7761 | VDPBF16PSZmbkz = 7746, |
| 7762 | VDPBF16PSZmk = 7747, |
| 7763 | VDPBF16PSZmkz = 7748, |
| 7764 | VDPBF16PSZr = 7749, |
| 7765 | VDPBF16PSZrk = 7750, |
| 7766 | VDPBF16PSZrkz = 7751, |
| 7767 | VDPPDrmi = 7752, |
| 7768 | VDPPDrri = 7753, |
| 7769 | VDPPSYrmi = 7754, |
| 7770 | VDPPSYrri = 7755, |
| 7771 | VDPPSrmi = 7756, |
| 7772 | VDPPSrri = 7757, |
| 7773 | VERRm = 7758, |
| 7774 | VERRr = 7759, |
| 7775 | VERWm = 7760, |
| 7776 | VERWr = 7761, |
| 7777 | VEXP2PDZm = 7762, |
| 7778 | VEXP2PDZmb = 7763, |
| 7779 | VEXP2PDZmbk = 7764, |
| 7780 | VEXP2PDZmbkz = 7765, |
| 7781 | VEXP2PDZmk = 7766, |
| 7782 | VEXP2PDZmkz = 7767, |
| 7783 | VEXP2PDZr = 7768, |
| 7784 | VEXP2PDZrb = 7769, |
| 7785 | VEXP2PDZrbk = 7770, |
| 7786 | VEXP2PDZrbkz = 7771, |
| 7787 | VEXP2PDZrk = 7772, |
| 7788 | VEXP2PDZrkz = 7773, |
| 7789 | VEXP2PSZm = 7774, |
| 7790 | VEXP2PSZmb = 7775, |
| 7791 | VEXP2PSZmbk = 7776, |
| 7792 | VEXP2PSZmbkz = 7777, |
| 7793 | VEXP2PSZmk = 7778, |
| 7794 | VEXP2PSZmkz = 7779, |
| 7795 | VEXP2PSZr = 7780, |
| 7796 | VEXP2PSZrb = 7781, |
| 7797 | VEXP2PSZrbk = 7782, |
| 7798 | VEXP2PSZrbkz = 7783, |
| 7799 | VEXP2PSZrk = 7784, |
| 7800 | VEXP2PSZrkz = 7785, |
| 7801 | VEXPANDPDZ128rm = 7786, |
| 7802 | VEXPANDPDZ128rmk = 7787, |
| 7803 | VEXPANDPDZ128rmkz = 7788, |
| 7804 | VEXPANDPDZ128rr = 7789, |
| 7805 | VEXPANDPDZ128rrk = 7790, |
| 7806 | VEXPANDPDZ128rrkz = 7791, |
| 7807 | VEXPANDPDZ256rm = 7792, |
| 7808 | VEXPANDPDZ256rmk = 7793, |
| 7809 | VEXPANDPDZ256rmkz = 7794, |
| 7810 | VEXPANDPDZ256rr = 7795, |
| 7811 | VEXPANDPDZ256rrk = 7796, |
| 7812 | VEXPANDPDZ256rrkz = 7797, |
| 7813 | VEXPANDPDZrm = 7798, |
| 7814 | VEXPANDPDZrmk = 7799, |
| 7815 | VEXPANDPDZrmkz = 7800, |
| 7816 | VEXPANDPDZrr = 7801, |
| 7817 | VEXPANDPDZrrk = 7802, |
| 7818 | VEXPANDPDZrrkz = 7803, |
| 7819 | VEXPANDPSZ128rm = 7804, |
| 7820 | VEXPANDPSZ128rmk = 7805, |
| 7821 | VEXPANDPSZ128rmkz = 7806, |
| 7822 | VEXPANDPSZ128rr = 7807, |
| 7823 | VEXPANDPSZ128rrk = 7808, |
| 7824 | VEXPANDPSZ128rrkz = 7809, |
| 7825 | VEXPANDPSZ256rm = 7810, |
| 7826 | VEXPANDPSZ256rmk = 7811, |
| 7827 | VEXPANDPSZ256rmkz = 7812, |
| 7828 | VEXPANDPSZ256rr = 7813, |
| 7829 | VEXPANDPSZ256rrk = 7814, |
| 7830 | VEXPANDPSZ256rrkz = 7815, |
| 7831 | VEXPANDPSZrm = 7816, |
| 7832 | VEXPANDPSZrmk = 7817, |
| 7833 | VEXPANDPSZrmkz = 7818, |
| 7834 | VEXPANDPSZrr = 7819, |
| 7835 | VEXPANDPSZrrk = 7820, |
| 7836 | VEXPANDPSZrrkz = 7821, |
| 7837 | VEXTRACTF128mr = 7822, |
| 7838 | VEXTRACTF128rr = 7823, |
| 7839 | VEXTRACTF32x4Z256mr = 7824, |
| 7840 | VEXTRACTF32x4Z256mrk = 7825, |
| 7841 | VEXTRACTF32x4Z256rr = 7826, |
| 7842 | VEXTRACTF32x4Z256rrk = 7827, |
| 7843 | VEXTRACTF32x4Z256rrkz = 7828, |
| 7844 | VEXTRACTF32x4Zmr = 7829, |
| 7845 | VEXTRACTF32x4Zmrk = 7830, |
| 7846 | VEXTRACTF32x4Zrr = 7831, |
| 7847 | VEXTRACTF32x4Zrrk = 7832, |
| 7848 | VEXTRACTF32x4Zrrkz = 7833, |
| 7849 | VEXTRACTF32x8Zmr = 7834, |
| 7850 | VEXTRACTF32x8Zmrk = 7835, |
| 7851 | VEXTRACTF32x8Zrr = 7836, |
| 7852 | VEXTRACTF32x8Zrrk = 7837, |
| 7853 | VEXTRACTF32x8Zrrkz = 7838, |
| 7854 | VEXTRACTF64x2Z256mr = 7839, |
| 7855 | VEXTRACTF64x2Z256mrk = 7840, |
| 7856 | VEXTRACTF64x2Z256rr = 7841, |
| 7857 | VEXTRACTF64x2Z256rrk = 7842, |
| 7858 | VEXTRACTF64x2Z256rrkz = 7843, |
| 7859 | VEXTRACTF64x2Zmr = 7844, |
| 7860 | VEXTRACTF64x2Zmrk = 7845, |
| 7861 | VEXTRACTF64x2Zrr = 7846, |
| 7862 | VEXTRACTF64x2Zrrk = 7847, |
| 7863 | VEXTRACTF64x2Zrrkz = 7848, |
| 7864 | VEXTRACTF64x4Zmr = 7849, |
| 7865 | VEXTRACTF64x4Zmrk = 7850, |
| 7866 | VEXTRACTF64x4Zrr = 7851, |
| 7867 | VEXTRACTF64x4Zrrk = 7852, |
| 7868 | VEXTRACTF64x4Zrrkz = 7853, |
| 7869 | VEXTRACTI128mr = 7854, |
| 7870 | VEXTRACTI128rr = 7855, |
| 7871 | VEXTRACTI32x4Z256mr = 7856, |
| 7872 | VEXTRACTI32x4Z256mrk = 7857, |
| 7873 | VEXTRACTI32x4Z256rr = 7858, |
| 7874 | VEXTRACTI32x4Z256rrk = 7859, |
| 7875 | VEXTRACTI32x4Z256rrkz = 7860, |
| 7876 | VEXTRACTI32x4Zmr = 7861, |
| 7877 | VEXTRACTI32x4Zmrk = 7862, |
| 7878 | VEXTRACTI32x4Zrr = 7863, |
| 7879 | VEXTRACTI32x4Zrrk = 7864, |
| 7880 | VEXTRACTI32x4Zrrkz = 7865, |
| 7881 | VEXTRACTI32x8Zmr = 7866, |
| 7882 | VEXTRACTI32x8Zmrk = 7867, |
| 7883 | VEXTRACTI32x8Zrr = 7868, |
| 7884 | VEXTRACTI32x8Zrrk = 7869, |
| 7885 | VEXTRACTI32x8Zrrkz = 7870, |
| 7886 | VEXTRACTI64x2Z256mr = 7871, |
| 7887 | VEXTRACTI64x2Z256mrk = 7872, |
| 7888 | VEXTRACTI64x2Z256rr = 7873, |
| 7889 | VEXTRACTI64x2Z256rrk = 7874, |
| 7890 | VEXTRACTI64x2Z256rrkz = 7875, |
| 7891 | VEXTRACTI64x2Zmr = 7876, |
| 7892 | VEXTRACTI64x2Zmrk = 7877, |
| 7893 | VEXTRACTI64x2Zrr = 7878, |
| 7894 | VEXTRACTI64x2Zrrk = 7879, |
| 7895 | VEXTRACTI64x2Zrrkz = 7880, |
| 7896 | VEXTRACTI64x4Zmr = 7881, |
| 7897 | VEXTRACTI64x4Zmrk = 7882, |
| 7898 | VEXTRACTI64x4Zrr = 7883, |
| 7899 | VEXTRACTI64x4Zrrk = 7884, |
| 7900 | VEXTRACTI64x4Zrrkz = 7885, |
| 7901 | VEXTRACTPSZmr = 7886, |
| 7902 | VEXTRACTPSZrr = 7887, |
| 7903 | VEXTRACTPSmr = 7888, |
| 7904 | VEXTRACTPSrr = 7889, |
| 7905 | VFCMADDCPHZ128m = 7890, |
| 7906 | VFCMADDCPHZ128mb = 7891, |
| 7907 | VFCMADDCPHZ128mbk = 7892, |
| 7908 | VFCMADDCPHZ128mbkz = 7893, |
| 7909 | VFCMADDCPHZ128mk = 7894, |
| 7910 | VFCMADDCPHZ128mkz = 7895, |
| 7911 | VFCMADDCPHZ128r = 7896, |
| 7912 | VFCMADDCPHZ128rk = 7897, |
| 7913 | VFCMADDCPHZ128rkz = 7898, |
| 7914 | VFCMADDCPHZ256m = 7899, |
| 7915 | VFCMADDCPHZ256mb = 7900, |
| 7916 | VFCMADDCPHZ256mbk = 7901, |
| 7917 | VFCMADDCPHZ256mbkz = 7902, |
| 7918 | VFCMADDCPHZ256mk = 7903, |
| 7919 | VFCMADDCPHZ256mkz = 7904, |
| 7920 | VFCMADDCPHZ256r = 7905, |
| 7921 | VFCMADDCPHZ256rk = 7906, |
| 7922 | VFCMADDCPHZ256rkz = 7907, |
| 7923 | VFCMADDCPHZm = 7908, |
| 7924 | VFCMADDCPHZmb = 7909, |
| 7925 | VFCMADDCPHZmbk = 7910, |
| 7926 | VFCMADDCPHZmbkz = 7911, |
| 7927 | VFCMADDCPHZmk = 7912, |
| 7928 | VFCMADDCPHZmkz = 7913, |
| 7929 | VFCMADDCPHZr = 7914, |
| 7930 | VFCMADDCPHZrb = 7915, |
| 7931 | VFCMADDCPHZrbk = 7916, |
| 7932 | VFCMADDCPHZrbkz = 7917, |
| 7933 | VFCMADDCPHZrk = 7918, |
| 7934 | VFCMADDCPHZrkz = 7919, |
| 7935 | VFCMADDCSHZm = 7920, |
| 7936 | VFCMADDCSHZmk = 7921, |
| 7937 | VFCMADDCSHZmkz = 7922, |
| 7938 | VFCMADDCSHZr = 7923, |
| 7939 | VFCMADDCSHZrb = 7924, |
| 7940 | VFCMADDCSHZrbk = 7925, |
| 7941 | VFCMADDCSHZrbkz = 7926, |
| 7942 | VFCMADDCSHZrk = 7927, |
| 7943 | VFCMADDCSHZrkz = 7928, |
| 7944 | VFCMULCPHZ128rm = 7929, |
| 7945 | VFCMULCPHZ128rmb = 7930, |
| 7946 | VFCMULCPHZ128rmbk = 7931, |
| 7947 | VFCMULCPHZ128rmbkz = 7932, |
| 7948 | VFCMULCPHZ128rmk = 7933, |
| 7949 | VFCMULCPHZ128rmkz = 7934, |
| 7950 | VFCMULCPHZ128rr = 7935, |
| 7951 | VFCMULCPHZ128rrk = 7936, |
| 7952 | VFCMULCPHZ128rrkz = 7937, |
| 7953 | VFCMULCPHZ256rm = 7938, |
| 7954 | VFCMULCPHZ256rmb = 7939, |
| 7955 | VFCMULCPHZ256rmbk = 7940, |
| 7956 | VFCMULCPHZ256rmbkz = 7941, |
| 7957 | VFCMULCPHZ256rmk = 7942, |
| 7958 | VFCMULCPHZ256rmkz = 7943, |
| 7959 | VFCMULCPHZ256rr = 7944, |
| 7960 | VFCMULCPHZ256rrk = 7945, |
| 7961 | VFCMULCPHZ256rrkz = 7946, |
| 7962 | VFCMULCPHZrm = 7947, |
| 7963 | VFCMULCPHZrmb = 7948, |
| 7964 | VFCMULCPHZrmbk = 7949, |
| 7965 | VFCMULCPHZrmbkz = 7950, |
| 7966 | VFCMULCPHZrmk = 7951, |
| 7967 | VFCMULCPHZrmkz = 7952, |
| 7968 | VFCMULCPHZrr = 7953, |
| 7969 | VFCMULCPHZrrb = 7954, |
| 7970 | VFCMULCPHZrrbk = 7955, |
| 7971 | VFCMULCPHZrrbkz = 7956, |
| 7972 | VFCMULCPHZrrk = 7957, |
| 7973 | VFCMULCPHZrrkz = 7958, |
| 7974 | VFCMULCSHZrm = 7959, |
| 7975 | VFCMULCSHZrmk = 7960, |
| 7976 | VFCMULCSHZrmkz = 7961, |
| 7977 | VFCMULCSHZrr = 7962, |
| 7978 | VFCMULCSHZrrb = 7963, |
| 7979 | VFCMULCSHZrrbk = 7964, |
| 7980 | VFCMULCSHZrrbkz = 7965, |
| 7981 | VFCMULCSHZrrk = 7966, |
| 7982 | VFCMULCSHZrrkz = 7967, |
| 7983 | VFIXUPIMMPDZ128rmbi = 7968, |
| 7984 | VFIXUPIMMPDZ128rmbik = 7969, |
| 7985 | VFIXUPIMMPDZ128rmbikz = 7970, |
| 7986 | VFIXUPIMMPDZ128rmi = 7971, |
| 7987 | VFIXUPIMMPDZ128rmik = 7972, |
| 7988 | VFIXUPIMMPDZ128rmikz = 7973, |
| 7989 | VFIXUPIMMPDZ128rri = 7974, |
| 7990 | VFIXUPIMMPDZ128rrik = 7975, |
| 7991 | VFIXUPIMMPDZ128rrikz = 7976, |
| 7992 | VFIXUPIMMPDZ256rmbi = 7977, |
| 7993 | VFIXUPIMMPDZ256rmbik = 7978, |
| 7994 | VFIXUPIMMPDZ256rmbikz = 7979, |
| 7995 | VFIXUPIMMPDZ256rmi = 7980, |
| 7996 | VFIXUPIMMPDZ256rmik = 7981, |
| 7997 | VFIXUPIMMPDZ256rmikz = 7982, |
| 7998 | VFIXUPIMMPDZ256rri = 7983, |
| 7999 | VFIXUPIMMPDZ256rrik = 7984, |
| 8000 | VFIXUPIMMPDZ256rrikz = 7985, |
| 8001 | VFIXUPIMMPDZrmbi = 7986, |
| 8002 | VFIXUPIMMPDZrmbik = 7987, |
| 8003 | VFIXUPIMMPDZrmbikz = 7988, |
| 8004 | VFIXUPIMMPDZrmi = 7989, |
| 8005 | VFIXUPIMMPDZrmik = 7990, |
| 8006 | VFIXUPIMMPDZrmikz = 7991, |
| 8007 | VFIXUPIMMPDZrri = 7992, |
| 8008 | VFIXUPIMMPDZrrib = 7993, |
| 8009 | VFIXUPIMMPDZrribk = 7994, |
| 8010 | VFIXUPIMMPDZrribkz = 7995, |
| 8011 | VFIXUPIMMPDZrrik = 7996, |
| 8012 | VFIXUPIMMPDZrrikz = 7997, |
| 8013 | VFIXUPIMMPSZ128rmbi = 7998, |
| 8014 | VFIXUPIMMPSZ128rmbik = 7999, |
| 8015 | VFIXUPIMMPSZ128rmbikz = 8000, |
| 8016 | VFIXUPIMMPSZ128rmi = 8001, |
| 8017 | VFIXUPIMMPSZ128rmik = 8002, |
| 8018 | VFIXUPIMMPSZ128rmikz = 8003, |
| 8019 | VFIXUPIMMPSZ128rri = 8004, |
| 8020 | VFIXUPIMMPSZ128rrik = 8005, |
| 8021 | VFIXUPIMMPSZ128rrikz = 8006, |
| 8022 | VFIXUPIMMPSZ256rmbi = 8007, |
| 8023 | VFIXUPIMMPSZ256rmbik = 8008, |
| 8024 | VFIXUPIMMPSZ256rmbikz = 8009, |
| 8025 | VFIXUPIMMPSZ256rmi = 8010, |
| 8026 | VFIXUPIMMPSZ256rmik = 8011, |
| 8027 | VFIXUPIMMPSZ256rmikz = 8012, |
| 8028 | VFIXUPIMMPSZ256rri = 8013, |
| 8029 | VFIXUPIMMPSZ256rrik = 8014, |
| 8030 | VFIXUPIMMPSZ256rrikz = 8015, |
| 8031 | VFIXUPIMMPSZrmbi = 8016, |
| 8032 | VFIXUPIMMPSZrmbik = 8017, |
| 8033 | VFIXUPIMMPSZrmbikz = 8018, |
| 8034 | VFIXUPIMMPSZrmi = 8019, |
| 8035 | VFIXUPIMMPSZrmik = 8020, |
| 8036 | VFIXUPIMMPSZrmikz = 8021, |
| 8037 | VFIXUPIMMPSZrri = 8022, |
| 8038 | VFIXUPIMMPSZrrib = 8023, |
| 8039 | VFIXUPIMMPSZrribk = 8024, |
| 8040 | VFIXUPIMMPSZrribkz = 8025, |
| 8041 | VFIXUPIMMPSZrrik = 8026, |
| 8042 | VFIXUPIMMPSZrrikz = 8027, |
| 8043 | VFIXUPIMMSDZrmi = 8028, |
| 8044 | VFIXUPIMMSDZrmik = 8029, |
| 8045 | VFIXUPIMMSDZrmikz = 8030, |
| 8046 | VFIXUPIMMSDZrri = 8031, |
| 8047 | VFIXUPIMMSDZrrib = 8032, |
| 8048 | VFIXUPIMMSDZrribk = 8033, |
| 8049 | VFIXUPIMMSDZrribkz = 8034, |
| 8050 | VFIXUPIMMSDZrrik = 8035, |
| 8051 | VFIXUPIMMSDZrrikz = 8036, |
| 8052 | VFIXUPIMMSSZrmi = 8037, |
| 8053 | VFIXUPIMMSSZrmik = 8038, |
| 8054 | VFIXUPIMMSSZrmikz = 8039, |
| 8055 | VFIXUPIMMSSZrri = 8040, |
| 8056 | VFIXUPIMMSSZrrib = 8041, |
| 8057 | VFIXUPIMMSSZrribk = 8042, |
| 8058 | VFIXUPIMMSSZrribkz = 8043, |
| 8059 | VFIXUPIMMSSZrrik = 8044, |
| 8060 | VFIXUPIMMSSZrrikz = 8045, |
| 8061 | VFMADD132PDYm = 8046, |
| 8062 | VFMADD132PDYr = 8047, |
| 8063 | VFMADD132PDZ128m = 8048, |
| 8064 | VFMADD132PDZ128mb = 8049, |
| 8065 | VFMADD132PDZ128mbk = 8050, |
| 8066 | VFMADD132PDZ128mbkz = 8051, |
| 8067 | VFMADD132PDZ128mk = 8052, |
| 8068 | VFMADD132PDZ128mkz = 8053, |
| 8069 | VFMADD132PDZ128r = 8054, |
| 8070 | VFMADD132PDZ128rk = 8055, |
| 8071 | VFMADD132PDZ128rkz = 8056, |
| 8072 | VFMADD132PDZ256m = 8057, |
| 8073 | VFMADD132PDZ256mb = 8058, |
| 8074 | VFMADD132PDZ256mbk = 8059, |
| 8075 | VFMADD132PDZ256mbkz = 8060, |
| 8076 | VFMADD132PDZ256mk = 8061, |
| 8077 | VFMADD132PDZ256mkz = 8062, |
| 8078 | VFMADD132PDZ256r = 8063, |
| 8079 | VFMADD132PDZ256rk = 8064, |
| 8080 | VFMADD132PDZ256rkz = 8065, |
| 8081 | VFMADD132PDZm = 8066, |
| 8082 | VFMADD132PDZmb = 8067, |
| 8083 | VFMADD132PDZmbk = 8068, |
| 8084 | VFMADD132PDZmbkz = 8069, |
| 8085 | VFMADD132PDZmk = 8070, |
| 8086 | VFMADD132PDZmkz = 8071, |
| 8087 | VFMADD132PDZr = 8072, |
| 8088 | VFMADD132PDZrb = 8073, |
| 8089 | VFMADD132PDZrbk = 8074, |
| 8090 | VFMADD132PDZrbkz = 8075, |
| 8091 | VFMADD132PDZrk = 8076, |
| 8092 | VFMADD132PDZrkz = 8077, |
| 8093 | VFMADD132PDm = 8078, |
| 8094 | VFMADD132PDr = 8079, |
| 8095 | VFMADD132PHZ128m = 8080, |
| 8096 | VFMADD132PHZ128mb = 8081, |
| 8097 | VFMADD132PHZ128mbk = 8082, |
| 8098 | VFMADD132PHZ128mbkz = 8083, |
| 8099 | VFMADD132PHZ128mk = 8084, |
| 8100 | VFMADD132PHZ128mkz = 8085, |
| 8101 | VFMADD132PHZ128r = 8086, |
| 8102 | VFMADD132PHZ128rk = 8087, |
| 8103 | VFMADD132PHZ128rkz = 8088, |
| 8104 | VFMADD132PHZ256m = 8089, |
| 8105 | VFMADD132PHZ256mb = 8090, |
| 8106 | VFMADD132PHZ256mbk = 8091, |
| 8107 | VFMADD132PHZ256mbkz = 8092, |
| 8108 | VFMADD132PHZ256mk = 8093, |
| 8109 | VFMADD132PHZ256mkz = 8094, |
| 8110 | VFMADD132PHZ256r = 8095, |
| 8111 | VFMADD132PHZ256rk = 8096, |
| 8112 | VFMADD132PHZ256rkz = 8097, |
| 8113 | VFMADD132PHZm = 8098, |
| 8114 | VFMADD132PHZmb = 8099, |
| 8115 | VFMADD132PHZmbk = 8100, |
| 8116 | VFMADD132PHZmbkz = 8101, |
| 8117 | VFMADD132PHZmk = 8102, |
| 8118 | VFMADD132PHZmkz = 8103, |
| 8119 | VFMADD132PHZr = 8104, |
| 8120 | VFMADD132PHZrb = 8105, |
| 8121 | VFMADD132PHZrbk = 8106, |
| 8122 | VFMADD132PHZrbkz = 8107, |
| 8123 | VFMADD132PHZrk = 8108, |
| 8124 | VFMADD132PHZrkz = 8109, |
| 8125 | VFMADD132PSYm = 8110, |
| 8126 | VFMADD132PSYr = 8111, |
| 8127 | VFMADD132PSZ128m = 8112, |
| 8128 | VFMADD132PSZ128mb = 8113, |
| 8129 | VFMADD132PSZ128mbk = 8114, |
| 8130 | VFMADD132PSZ128mbkz = 8115, |
| 8131 | VFMADD132PSZ128mk = 8116, |
| 8132 | VFMADD132PSZ128mkz = 8117, |
| 8133 | VFMADD132PSZ128r = 8118, |
| 8134 | VFMADD132PSZ128rk = 8119, |
| 8135 | VFMADD132PSZ128rkz = 8120, |
| 8136 | VFMADD132PSZ256m = 8121, |
| 8137 | VFMADD132PSZ256mb = 8122, |
| 8138 | VFMADD132PSZ256mbk = 8123, |
| 8139 | VFMADD132PSZ256mbkz = 8124, |
| 8140 | VFMADD132PSZ256mk = 8125, |
| 8141 | VFMADD132PSZ256mkz = 8126, |
| 8142 | VFMADD132PSZ256r = 8127, |
| 8143 | VFMADD132PSZ256rk = 8128, |
| 8144 | VFMADD132PSZ256rkz = 8129, |
| 8145 | VFMADD132PSZm = 8130, |
| 8146 | VFMADD132PSZmb = 8131, |
| 8147 | VFMADD132PSZmbk = 8132, |
| 8148 | VFMADD132PSZmbkz = 8133, |
| 8149 | VFMADD132PSZmk = 8134, |
| 8150 | VFMADD132PSZmkz = 8135, |
| 8151 | VFMADD132PSZr = 8136, |
| 8152 | VFMADD132PSZrb = 8137, |
| 8153 | VFMADD132PSZrbk = 8138, |
| 8154 | VFMADD132PSZrbkz = 8139, |
| 8155 | VFMADD132PSZrk = 8140, |
| 8156 | VFMADD132PSZrkz = 8141, |
| 8157 | VFMADD132PSm = 8142, |
| 8158 | VFMADD132PSr = 8143, |
| 8159 | VFMADD132SDZm = 8144, |
| 8160 | VFMADD132SDZm_Int = 8145, |
| 8161 | VFMADD132SDZm_Intk = 8146, |
| 8162 | VFMADD132SDZm_Intkz = 8147, |
| 8163 | VFMADD132SDZr = 8148, |
| 8164 | VFMADD132SDZr_Int = 8149, |
| 8165 | VFMADD132SDZr_Intk = 8150, |
| 8166 | VFMADD132SDZr_Intkz = 8151, |
| 8167 | VFMADD132SDZrb = 8152, |
| 8168 | VFMADD132SDZrb_Int = 8153, |
| 8169 | VFMADD132SDZrb_Intk = 8154, |
| 8170 | VFMADD132SDZrb_Intkz = 8155, |
| 8171 | VFMADD132SDm = 8156, |
| 8172 | VFMADD132SDm_Int = 8157, |
| 8173 | VFMADD132SDr = 8158, |
| 8174 | VFMADD132SDr_Int = 8159, |
| 8175 | VFMADD132SHZm = 8160, |
| 8176 | VFMADD132SHZm_Int = 8161, |
| 8177 | VFMADD132SHZm_Intk = 8162, |
| 8178 | VFMADD132SHZm_Intkz = 8163, |
| 8179 | VFMADD132SHZr = 8164, |
| 8180 | VFMADD132SHZr_Int = 8165, |
| 8181 | VFMADD132SHZr_Intk = 8166, |
| 8182 | VFMADD132SHZr_Intkz = 8167, |
| 8183 | VFMADD132SHZrb = 8168, |
| 8184 | VFMADD132SHZrb_Int = 8169, |
| 8185 | VFMADD132SHZrb_Intk = 8170, |
| 8186 | VFMADD132SHZrb_Intkz = 8171, |
| 8187 | VFMADD132SSZm = 8172, |
| 8188 | VFMADD132SSZm_Int = 8173, |
| 8189 | VFMADD132SSZm_Intk = 8174, |
| 8190 | VFMADD132SSZm_Intkz = 8175, |
| 8191 | VFMADD132SSZr = 8176, |
| 8192 | VFMADD132SSZr_Int = 8177, |
| 8193 | VFMADD132SSZr_Intk = 8178, |
| 8194 | VFMADD132SSZr_Intkz = 8179, |
| 8195 | VFMADD132SSZrb = 8180, |
| 8196 | VFMADD132SSZrb_Int = 8181, |
| 8197 | VFMADD132SSZrb_Intk = 8182, |
| 8198 | VFMADD132SSZrb_Intkz = 8183, |
| 8199 | VFMADD132SSm = 8184, |
| 8200 | VFMADD132SSm_Int = 8185, |
| 8201 | VFMADD132SSr = 8186, |
| 8202 | VFMADD132SSr_Int = 8187, |
| 8203 | VFMADD213PDYm = 8188, |
| 8204 | VFMADD213PDYr = 8189, |
| 8205 | VFMADD213PDZ128m = 8190, |
| 8206 | VFMADD213PDZ128mb = 8191, |
| 8207 | VFMADD213PDZ128mbk = 8192, |
| 8208 | VFMADD213PDZ128mbkz = 8193, |
| 8209 | VFMADD213PDZ128mk = 8194, |
| 8210 | VFMADD213PDZ128mkz = 8195, |
| 8211 | VFMADD213PDZ128r = 8196, |
| 8212 | VFMADD213PDZ128rk = 8197, |
| 8213 | VFMADD213PDZ128rkz = 8198, |
| 8214 | VFMADD213PDZ256m = 8199, |
| 8215 | VFMADD213PDZ256mb = 8200, |
| 8216 | VFMADD213PDZ256mbk = 8201, |
| 8217 | VFMADD213PDZ256mbkz = 8202, |
| 8218 | VFMADD213PDZ256mk = 8203, |
| 8219 | VFMADD213PDZ256mkz = 8204, |
| 8220 | VFMADD213PDZ256r = 8205, |
| 8221 | VFMADD213PDZ256rk = 8206, |
| 8222 | VFMADD213PDZ256rkz = 8207, |
| 8223 | VFMADD213PDZm = 8208, |
| 8224 | VFMADD213PDZmb = 8209, |
| 8225 | VFMADD213PDZmbk = 8210, |
| 8226 | VFMADD213PDZmbkz = 8211, |
| 8227 | VFMADD213PDZmk = 8212, |
| 8228 | VFMADD213PDZmkz = 8213, |
| 8229 | VFMADD213PDZr = 8214, |
| 8230 | VFMADD213PDZrb = 8215, |
| 8231 | VFMADD213PDZrbk = 8216, |
| 8232 | VFMADD213PDZrbkz = 8217, |
| 8233 | VFMADD213PDZrk = 8218, |
| 8234 | VFMADD213PDZrkz = 8219, |
| 8235 | VFMADD213PDm = 8220, |
| 8236 | VFMADD213PDr = 8221, |
| 8237 | VFMADD213PHZ128m = 8222, |
| 8238 | VFMADD213PHZ128mb = 8223, |
| 8239 | VFMADD213PHZ128mbk = 8224, |
| 8240 | VFMADD213PHZ128mbkz = 8225, |
| 8241 | VFMADD213PHZ128mk = 8226, |
| 8242 | VFMADD213PHZ128mkz = 8227, |
| 8243 | VFMADD213PHZ128r = 8228, |
| 8244 | VFMADD213PHZ128rk = 8229, |
| 8245 | VFMADD213PHZ128rkz = 8230, |
| 8246 | VFMADD213PHZ256m = 8231, |
| 8247 | VFMADD213PHZ256mb = 8232, |
| 8248 | VFMADD213PHZ256mbk = 8233, |
| 8249 | VFMADD213PHZ256mbkz = 8234, |
| 8250 | VFMADD213PHZ256mk = 8235, |
| 8251 | VFMADD213PHZ256mkz = 8236, |
| 8252 | VFMADD213PHZ256r = 8237, |
| 8253 | VFMADD213PHZ256rk = 8238, |
| 8254 | VFMADD213PHZ256rkz = 8239, |
| 8255 | VFMADD213PHZm = 8240, |
| 8256 | VFMADD213PHZmb = 8241, |
| 8257 | VFMADD213PHZmbk = 8242, |
| 8258 | VFMADD213PHZmbkz = 8243, |
| 8259 | VFMADD213PHZmk = 8244, |
| 8260 | VFMADD213PHZmkz = 8245, |
| 8261 | VFMADD213PHZr = 8246, |
| 8262 | VFMADD213PHZrb = 8247, |
| 8263 | VFMADD213PHZrbk = 8248, |
| 8264 | VFMADD213PHZrbkz = 8249, |
| 8265 | VFMADD213PHZrk = 8250, |
| 8266 | VFMADD213PHZrkz = 8251, |
| 8267 | VFMADD213PSYm = 8252, |
| 8268 | VFMADD213PSYr = 8253, |
| 8269 | VFMADD213PSZ128m = 8254, |
| 8270 | VFMADD213PSZ128mb = 8255, |
| 8271 | VFMADD213PSZ128mbk = 8256, |
| 8272 | VFMADD213PSZ128mbkz = 8257, |
| 8273 | VFMADD213PSZ128mk = 8258, |
| 8274 | VFMADD213PSZ128mkz = 8259, |
| 8275 | VFMADD213PSZ128r = 8260, |
| 8276 | VFMADD213PSZ128rk = 8261, |
| 8277 | VFMADD213PSZ128rkz = 8262, |
| 8278 | VFMADD213PSZ256m = 8263, |
| 8279 | VFMADD213PSZ256mb = 8264, |
| 8280 | VFMADD213PSZ256mbk = 8265, |
| 8281 | VFMADD213PSZ256mbkz = 8266, |
| 8282 | VFMADD213PSZ256mk = 8267, |
| 8283 | VFMADD213PSZ256mkz = 8268, |
| 8284 | VFMADD213PSZ256r = 8269, |
| 8285 | VFMADD213PSZ256rk = 8270, |
| 8286 | VFMADD213PSZ256rkz = 8271, |
| 8287 | VFMADD213PSZm = 8272, |
| 8288 | VFMADD213PSZmb = 8273, |
| 8289 | VFMADD213PSZmbk = 8274, |
| 8290 | VFMADD213PSZmbkz = 8275, |
| 8291 | VFMADD213PSZmk = 8276, |
| 8292 | VFMADD213PSZmkz = 8277, |
| 8293 | VFMADD213PSZr = 8278, |
| 8294 | VFMADD213PSZrb = 8279, |
| 8295 | VFMADD213PSZrbk = 8280, |
| 8296 | VFMADD213PSZrbkz = 8281, |
| 8297 | VFMADD213PSZrk = 8282, |
| 8298 | VFMADD213PSZrkz = 8283, |
| 8299 | VFMADD213PSm = 8284, |
| 8300 | VFMADD213PSr = 8285, |
| 8301 | VFMADD213SDZm = 8286, |
| 8302 | VFMADD213SDZm_Int = 8287, |
| 8303 | VFMADD213SDZm_Intk = 8288, |
| 8304 | VFMADD213SDZm_Intkz = 8289, |
| 8305 | VFMADD213SDZr = 8290, |
| 8306 | VFMADD213SDZr_Int = 8291, |
| 8307 | VFMADD213SDZr_Intk = 8292, |
| 8308 | VFMADD213SDZr_Intkz = 8293, |
| 8309 | VFMADD213SDZrb = 8294, |
| 8310 | VFMADD213SDZrb_Int = 8295, |
| 8311 | VFMADD213SDZrb_Intk = 8296, |
| 8312 | VFMADD213SDZrb_Intkz = 8297, |
| 8313 | VFMADD213SDm = 8298, |
| 8314 | VFMADD213SDm_Int = 8299, |
| 8315 | VFMADD213SDr = 8300, |
| 8316 | VFMADD213SDr_Int = 8301, |
| 8317 | VFMADD213SHZm = 8302, |
| 8318 | VFMADD213SHZm_Int = 8303, |
| 8319 | VFMADD213SHZm_Intk = 8304, |
| 8320 | VFMADD213SHZm_Intkz = 8305, |
| 8321 | VFMADD213SHZr = 8306, |
| 8322 | VFMADD213SHZr_Int = 8307, |
| 8323 | VFMADD213SHZr_Intk = 8308, |
| 8324 | VFMADD213SHZr_Intkz = 8309, |
| 8325 | VFMADD213SHZrb = 8310, |
| 8326 | VFMADD213SHZrb_Int = 8311, |
| 8327 | VFMADD213SHZrb_Intk = 8312, |
| 8328 | VFMADD213SHZrb_Intkz = 8313, |
| 8329 | VFMADD213SSZm = 8314, |
| 8330 | VFMADD213SSZm_Int = 8315, |
| 8331 | VFMADD213SSZm_Intk = 8316, |
| 8332 | VFMADD213SSZm_Intkz = 8317, |
| 8333 | VFMADD213SSZr = 8318, |
| 8334 | VFMADD213SSZr_Int = 8319, |
| 8335 | VFMADD213SSZr_Intk = 8320, |
| 8336 | VFMADD213SSZr_Intkz = 8321, |
| 8337 | VFMADD213SSZrb = 8322, |
| 8338 | VFMADD213SSZrb_Int = 8323, |
| 8339 | VFMADD213SSZrb_Intk = 8324, |
| 8340 | VFMADD213SSZrb_Intkz = 8325, |
| 8341 | VFMADD213SSm = 8326, |
| 8342 | VFMADD213SSm_Int = 8327, |
| 8343 | VFMADD213SSr = 8328, |
| 8344 | VFMADD213SSr_Int = 8329, |
| 8345 | VFMADD231PDYm = 8330, |
| 8346 | VFMADD231PDYr = 8331, |
| 8347 | VFMADD231PDZ128m = 8332, |
| 8348 | VFMADD231PDZ128mb = 8333, |
| 8349 | VFMADD231PDZ128mbk = 8334, |
| 8350 | VFMADD231PDZ128mbkz = 8335, |
| 8351 | VFMADD231PDZ128mk = 8336, |
| 8352 | VFMADD231PDZ128mkz = 8337, |
| 8353 | VFMADD231PDZ128r = 8338, |
| 8354 | VFMADD231PDZ128rk = 8339, |
| 8355 | VFMADD231PDZ128rkz = 8340, |
| 8356 | VFMADD231PDZ256m = 8341, |
| 8357 | VFMADD231PDZ256mb = 8342, |
| 8358 | VFMADD231PDZ256mbk = 8343, |
| 8359 | VFMADD231PDZ256mbkz = 8344, |
| 8360 | VFMADD231PDZ256mk = 8345, |
| 8361 | VFMADD231PDZ256mkz = 8346, |
| 8362 | VFMADD231PDZ256r = 8347, |
| 8363 | VFMADD231PDZ256rk = 8348, |
| 8364 | VFMADD231PDZ256rkz = 8349, |
| 8365 | VFMADD231PDZm = 8350, |
| 8366 | VFMADD231PDZmb = 8351, |
| 8367 | VFMADD231PDZmbk = 8352, |
| 8368 | VFMADD231PDZmbkz = 8353, |
| 8369 | VFMADD231PDZmk = 8354, |
| 8370 | VFMADD231PDZmkz = 8355, |
| 8371 | VFMADD231PDZr = 8356, |
| 8372 | VFMADD231PDZrb = 8357, |
| 8373 | VFMADD231PDZrbk = 8358, |
| 8374 | VFMADD231PDZrbkz = 8359, |
| 8375 | VFMADD231PDZrk = 8360, |
| 8376 | VFMADD231PDZrkz = 8361, |
| 8377 | VFMADD231PDm = 8362, |
| 8378 | VFMADD231PDr = 8363, |
| 8379 | VFMADD231PHZ128m = 8364, |
| 8380 | VFMADD231PHZ128mb = 8365, |
| 8381 | VFMADD231PHZ128mbk = 8366, |
| 8382 | VFMADD231PHZ128mbkz = 8367, |
| 8383 | VFMADD231PHZ128mk = 8368, |
| 8384 | VFMADD231PHZ128mkz = 8369, |
| 8385 | VFMADD231PHZ128r = 8370, |
| 8386 | VFMADD231PHZ128rk = 8371, |
| 8387 | VFMADD231PHZ128rkz = 8372, |
| 8388 | VFMADD231PHZ256m = 8373, |
| 8389 | VFMADD231PHZ256mb = 8374, |
| 8390 | VFMADD231PHZ256mbk = 8375, |
| 8391 | VFMADD231PHZ256mbkz = 8376, |
| 8392 | VFMADD231PHZ256mk = 8377, |
| 8393 | VFMADD231PHZ256mkz = 8378, |
| 8394 | VFMADD231PHZ256r = 8379, |
| 8395 | VFMADD231PHZ256rk = 8380, |
| 8396 | VFMADD231PHZ256rkz = 8381, |
| 8397 | VFMADD231PHZm = 8382, |
| 8398 | VFMADD231PHZmb = 8383, |
| 8399 | VFMADD231PHZmbk = 8384, |
| 8400 | VFMADD231PHZmbkz = 8385, |
| 8401 | VFMADD231PHZmk = 8386, |
| 8402 | VFMADD231PHZmkz = 8387, |
| 8403 | VFMADD231PHZr = 8388, |
| 8404 | VFMADD231PHZrb = 8389, |
| 8405 | VFMADD231PHZrbk = 8390, |
| 8406 | VFMADD231PHZrbkz = 8391, |
| 8407 | VFMADD231PHZrk = 8392, |
| 8408 | VFMADD231PHZrkz = 8393, |
| 8409 | VFMADD231PSYm = 8394, |
| 8410 | VFMADD231PSYr = 8395, |
| 8411 | VFMADD231PSZ128m = 8396, |
| 8412 | VFMADD231PSZ128mb = 8397, |
| 8413 | VFMADD231PSZ128mbk = 8398, |
| 8414 | VFMADD231PSZ128mbkz = 8399, |
| 8415 | VFMADD231PSZ128mk = 8400, |
| 8416 | VFMADD231PSZ128mkz = 8401, |
| 8417 | VFMADD231PSZ128r = 8402, |
| 8418 | VFMADD231PSZ128rk = 8403, |
| 8419 | VFMADD231PSZ128rkz = 8404, |
| 8420 | VFMADD231PSZ256m = 8405, |
| 8421 | VFMADD231PSZ256mb = 8406, |
| 8422 | VFMADD231PSZ256mbk = 8407, |
| 8423 | VFMADD231PSZ256mbkz = 8408, |
| 8424 | VFMADD231PSZ256mk = 8409, |
| 8425 | VFMADD231PSZ256mkz = 8410, |
| 8426 | VFMADD231PSZ256r = 8411, |
| 8427 | VFMADD231PSZ256rk = 8412, |
| 8428 | VFMADD231PSZ256rkz = 8413, |
| 8429 | VFMADD231PSZm = 8414, |
| 8430 | VFMADD231PSZmb = 8415, |
| 8431 | VFMADD231PSZmbk = 8416, |
| 8432 | VFMADD231PSZmbkz = 8417, |
| 8433 | VFMADD231PSZmk = 8418, |
| 8434 | VFMADD231PSZmkz = 8419, |
| 8435 | VFMADD231PSZr = 8420, |
| 8436 | VFMADD231PSZrb = 8421, |
| 8437 | VFMADD231PSZrbk = 8422, |
| 8438 | VFMADD231PSZrbkz = 8423, |
| 8439 | VFMADD231PSZrk = 8424, |
| 8440 | VFMADD231PSZrkz = 8425, |
| 8441 | VFMADD231PSm = 8426, |
| 8442 | VFMADD231PSr = 8427, |
| 8443 | VFMADD231SDZm = 8428, |
| 8444 | VFMADD231SDZm_Int = 8429, |
| 8445 | VFMADD231SDZm_Intk = 8430, |
| 8446 | VFMADD231SDZm_Intkz = 8431, |
| 8447 | VFMADD231SDZr = 8432, |
| 8448 | VFMADD231SDZr_Int = 8433, |
| 8449 | VFMADD231SDZr_Intk = 8434, |
| 8450 | VFMADD231SDZr_Intkz = 8435, |
| 8451 | VFMADD231SDZrb = 8436, |
| 8452 | VFMADD231SDZrb_Int = 8437, |
| 8453 | VFMADD231SDZrb_Intk = 8438, |
| 8454 | VFMADD231SDZrb_Intkz = 8439, |
| 8455 | VFMADD231SDm = 8440, |
| 8456 | VFMADD231SDm_Int = 8441, |
| 8457 | VFMADD231SDr = 8442, |
| 8458 | VFMADD231SDr_Int = 8443, |
| 8459 | VFMADD231SHZm = 8444, |
| 8460 | VFMADD231SHZm_Int = 8445, |
| 8461 | VFMADD231SHZm_Intk = 8446, |
| 8462 | VFMADD231SHZm_Intkz = 8447, |
| 8463 | VFMADD231SHZr = 8448, |
| 8464 | VFMADD231SHZr_Int = 8449, |
| 8465 | VFMADD231SHZr_Intk = 8450, |
| 8466 | VFMADD231SHZr_Intkz = 8451, |
| 8467 | VFMADD231SHZrb = 8452, |
| 8468 | VFMADD231SHZrb_Int = 8453, |
| 8469 | VFMADD231SHZrb_Intk = 8454, |
| 8470 | VFMADD231SHZrb_Intkz = 8455, |
| 8471 | VFMADD231SSZm = 8456, |
| 8472 | VFMADD231SSZm_Int = 8457, |
| 8473 | VFMADD231SSZm_Intk = 8458, |
| 8474 | VFMADD231SSZm_Intkz = 8459, |
| 8475 | VFMADD231SSZr = 8460, |
| 8476 | VFMADD231SSZr_Int = 8461, |
| 8477 | VFMADD231SSZr_Intk = 8462, |
| 8478 | VFMADD231SSZr_Intkz = 8463, |
| 8479 | VFMADD231SSZrb = 8464, |
| 8480 | VFMADD231SSZrb_Int = 8465, |
| 8481 | VFMADD231SSZrb_Intk = 8466, |
| 8482 | VFMADD231SSZrb_Intkz = 8467, |
| 8483 | VFMADD231SSm = 8468, |
| 8484 | VFMADD231SSm_Int = 8469, |
| 8485 | VFMADD231SSr = 8470, |
| 8486 | VFMADD231SSr_Int = 8471, |
| 8487 | VFMADDCPHZ128m = 8472, |
| 8488 | VFMADDCPHZ128mb = 8473, |
| 8489 | VFMADDCPHZ128mbk = 8474, |
| 8490 | VFMADDCPHZ128mbkz = 8475, |
| 8491 | VFMADDCPHZ128mk = 8476, |
| 8492 | VFMADDCPHZ128mkz = 8477, |
| 8493 | VFMADDCPHZ128r = 8478, |
| 8494 | VFMADDCPHZ128rk = 8479, |
| 8495 | VFMADDCPHZ128rkz = 8480, |
| 8496 | VFMADDCPHZ256m = 8481, |
| 8497 | VFMADDCPHZ256mb = 8482, |
| 8498 | VFMADDCPHZ256mbk = 8483, |
| 8499 | VFMADDCPHZ256mbkz = 8484, |
| 8500 | VFMADDCPHZ256mk = 8485, |
| 8501 | VFMADDCPHZ256mkz = 8486, |
| 8502 | VFMADDCPHZ256r = 8487, |
| 8503 | VFMADDCPHZ256rk = 8488, |
| 8504 | VFMADDCPHZ256rkz = 8489, |
| 8505 | VFMADDCPHZm = 8490, |
| 8506 | VFMADDCPHZmb = 8491, |
| 8507 | VFMADDCPHZmbk = 8492, |
| 8508 | VFMADDCPHZmbkz = 8493, |
| 8509 | VFMADDCPHZmk = 8494, |
| 8510 | VFMADDCPHZmkz = 8495, |
| 8511 | VFMADDCPHZr = 8496, |
| 8512 | VFMADDCPHZrb = 8497, |
| 8513 | VFMADDCPHZrbk = 8498, |
| 8514 | VFMADDCPHZrbkz = 8499, |
| 8515 | VFMADDCPHZrk = 8500, |
| 8516 | VFMADDCPHZrkz = 8501, |
| 8517 | VFMADDCSHZm = 8502, |
| 8518 | VFMADDCSHZmk = 8503, |
| 8519 | VFMADDCSHZmkz = 8504, |
| 8520 | VFMADDCSHZr = 8505, |
| 8521 | VFMADDCSHZrb = 8506, |
| 8522 | VFMADDCSHZrbk = 8507, |
| 8523 | VFMADDCSHZrbkz = 8508, |
| 8524 | VFMADDCSHZrk = 8509, |
| 8525 | VFMADDCSHZrkz = 8510, |
| 8526 | VFMADDPD4Ymr = 8511, |
| 8527 | VFMADDPD4Yrm = 8512, |
| 8528 | VFMADDPD4Yrr = 8513, |
| 8529 | VFMADDPD4Yrr_REV = 8514, |
| 8530 | VFMADDPD4mr = 8515, |
| 8531 | VFMADDPD4rm = 8516, |
| 8532 | VFMADDPD4rr = 8517, |
| 8533 | VFMADDPD4rr_REV = 8518, |
| 8534 | VFMADDPS4Ymr = 8519, |
| 8535 | VFMADDPS4Yrm = 8520, |
| 8536 | VFMADDPS4Yrr = 8521, |
| 8537 | VFMADDPS4Yrr_REV = 8522, |
| 8538 | VFMADDPS4mr = 8523, |
| 8539 | VFMADDPS4rm = 8524, |
| 8540 | VFMADDPS4rr = 8525, |
| 8541 | VFMADDPS4rr_REV = 8526, |
| 8542 | VFMADDSD4mr = 8527, |
| 8543 | VFMADDSD4mr_Int = 8528, |
| 8544 | VFMADDSD4rm = 8529, |
| 8545 | VFMADDSD4rm_Int = 8530, |
| 8546 | VFMADDSD4rr = 8531, |
| 8547 | VFMADDSD4rr_Int = 8532, |
| 8548 | VFMADDSD4rr_Int_REV = 8533, |
| 8549 | VFMADDSD4rr_REV = 8534, |
| 8550 | VFMADDSS4mr = 8535, |
| 8551 | VFMADDSS4mr_Int = 8536, |
| 8552 | VFMADDSS4rm = 8537, |
| 8553 | VFMADDSS4rm_Int = 8538, |
| 8554 | VFMADDSS4rr = 8539, |
| 8555 | VFMADDSS4rr_Int = 8540, |
| 8556 | VFMADDSS4rr_Int_REV = 8541, |
| 8557 | VFMADDSS4rr_REV = 8542, |
| 8558 | VFMADDSUB132PDYm = 8543, |
| 8559 | VFMADDSUB132PDYr = 8544, |
| 8560 | VFMADDSUB132PDZ128m = 8545, |
| 8561 | VFMADDSUB132PDZ128mb = 8546, |
| 8562 | VFMADDSUB132PDZ128mbk = 8547, |
| 8563 | VFMADDSUB132PDZ128mbkz = 8548, |
| 8564 | VFMADDSUB132PDZ128mk = 8549, |
| 8565 | VFMADDSUB132PDZ128mkz = 8550, |
| 8566 | VFMADDSUB132PDZ128r = 8551, |
| 8567 | VFMADDSUB132PDZ128rk = 8552, |
| 8568 | VFMADDSUB132PDZ128rkz = 8553, |
| 8569 | VFMADDSUB132PDZ256m = 8554, |
| 8570 | VFMADDSUB132PDZ256mb = 8555, |
| 8571 | VFMADDSUB132PDZ256mbk = 8556, |
| 8572 | VFMADDSUB132PDZ256mbkz = 8557, |
| 8573 | VFMADDSUB132PDZ256mk = 8558, |
| 8574 | VFMADDSUB132PDZ256mkz = 8559, |
| 8575 | VFMADDSUB132PDZ256r = 8560, |
| 8576 | VFMADDSUB132PDZ256rk = 8561, |
| 8577 | VFMADDSUB132PDZ256rkz = 8562, |
| 8578 | VFMADDSUB132PDZm = 8563, |
| 8579 | VFMADDSUB132PDZmb = 8564, |
| 8580 | VFMADDSUB132PDZmbk = 8565, |
| 8581 | VFMADDSUB132PDZmbkz = 8566, |
| 8582 | VFMADDSUB132PDZmk = 8567, |
| 8583 | VFMADDSUB132PDZmkz = 8568, |
| 8584 | VFMADDSUB132PDZr = 8569, |
| 8585 | VFMADDSUB132PDZrb = 8570, |
| 8586 | VFMADDSUB132PDZrbk = 8571, |
| 8587 | VFMADDSUB132PDZrbkz = 8572, |
| 8588 | VFMADDSUB132PDZrk = 8573, |
| 8589 | VFMADDSUB132PDZrkz = 8574, |
| 8590 | VFMADDSUB132PDm = 8575, |
| 8591 | VFMADDSUB132PDr = 8576, |
| 8592 | VFMADDSUB132PHZ128m = 8577, |
| 8593 | VFMADDSUB132PHZ128mb = 8578, |
| 8594 | VFMADDSUB132PHZ128mbk = 8579, |
| 8595 | VFMADDSUB132PHZ128mbkz = 8580, |
| 8596 | VFMADDSUB132PHZ128mk = 8581, |
| 8597 | VFMADDSUB132PHZ128mkz = 8582, |
| 8598 | VFMADDSUB132PHZ128r = 8583, |
| 8599 | VFMADDSUB132PHZ128rk = 8584, |
| 8600 | VFMADDSUB132PHZ128rkz = 8585, |
| 8601 | VFMADDSUB132PHZ256m = 8586, |
| 8602 | VFMADDSUB132PHZ256mb = 8587, |
| 8603 | VFMADDSUB132PHZ256mbk = 8588, |
| 8604 | VFMADDSUB132PHZ256mbkz = 8589, |
| 8605 | VFMADDSUB132PHZ256mk = 8590, |
| 8606 | VFMADDSUB132PHZ256mkz = 8591, |
| 8607 | VFMADDSUB132PHZ256r = 8592, |
| 8608 | VFMADDSUB132PHZ256rk = 8593, |
| 8609 | VFMADDSUB132PHZ256rkz = 8594, |
| 8610 | VFMADDSUB132PHZm = 8595, |
| 8611 | VFMADDSUB132PHZmb = 8596, |
| 8612 | VFMADDSUB132PHZmbk = 8597, |
| 8613 | VFMADDSUB132PHZmbkz = 8598, |
| 8614 | VFMADDSUB132PHZmk = 8599, |
| 8615 | VFMADDSUB132PHZmkz = 8600, |
| 8616 | VFMADDSUB132PHZr = 8601, |
| 8617 | VFMADDSUB132PHZrb = 8602, |
| 8618 | VFMADDSUB132PHZrbk = 8603, |
| 8619 | VFMADDSUB132PHZrbkz = 8604, |
| 8620 | VFMADDSUB132PHZrk = 8605, |
| 8621 | VFMADDSUB132PHZrkz = 8606, |
| 8622 | VFMADDSUB132PSYm = 8607, |
| 8623 | VFMADDSUB132PSYr = 8608, |
| 8624 | VFMADDSUB132PSZ128m = 8609, |
| 8625 | VFMADDSUB132PSZ128mb = 8610, |
| 8626 | VFMADDSUB132PSZ128mbk = 8611, |
| 8627 | VFMADDSUB132PSZ128mbkz = 8612, |
| 8628 | VFMADDSUB132PSZ128mk = 8613, |
| 8629 | VFMADDSUB132PSZ128mkz = 8614, |
| 8630 | VFMADDSUB132PSZ128r = 8615, |
| 8631 | VFMADDSUB132PSZ128rk = 8616, |
| 8632 | VFMADDSUB132PSZ128rkz = 8617, |
| 8633 | VFMADDSUB132PSZ256m = 8618, |
| 8634 | VFMADDSUB132PSZ256mb = 8619, |
| 8635 | VFMADDSUB132PSZ256mbk = 8620, |
| 8636 | VFMADDSUB132PSZ256mbkz = 8621, |
| 8637 | VFMADDSUB132PSZ256mk = 8622, |
| 8638 | VFMADDSUB132PSZ256mkz = 8623, |
| 8639 | VFMADDSUB132PSZ256r = 8624, |
| 8640 | VFMADDSUB132PSZ256rk = 8625, |
| 8641 | VFMADDSUB132PSZ256rkz = 8626, |
| 8642 | VFMADDSUB132PSZm = 8627, |
| 8643 | VFMADDSUB132PSZmb = 8628, |
| 8644 | VFMADDSUB132PSZmbk = 8629, |
| 8645 | VFMADDSUB132PSZmbkz = 8630, |
| 8646 | VFMADDSUB132PSZmk = 8631, |
| 8647 | VFMADDSUB132PSZmkz = 8632, |
| 8648 | VFMADDSUB132PSZr = 8633, |
| 8649 | VFMADDSUB132PSZrb = 8634, |
| 8650 | VFMADDSUB132PSZrbk = 8635, |
| 8651 | VFMADDSUB132PSZrbkz = 8636, |
| 8652 | VFMADDSUB132PSZrk = 8637, |
| 8653 | VFMADDSUB132PSZrkz = 8638, |
| 8654 | VFMADDSUB132PSm = 8639, |
| 8655 | VFMADDSUB132PSr = 8640, |
| 8656 | VFMADDSUB213PDYm = 8641, |
| 8657 | VFMADDSUB213PDYr = 8642, |
| 8658 | VFMADDSUB213PDZ128m = 8643, |
| 8659 | VFMADDSUB213PDZ128mb = 8644, |
| 8660 | VFMADDSUB213PDZ128mbk = 8645, |
| 8661 | VFMADDSUB213PDZ128mbkz = 8646, |
| 8662 | VFMADDSUB213PDZ128mk = 8647, |
| 8663 | VFMADDSUB213PDZ128mkz = 8648, |
| 8664 | VFMADDSUB213PDZ128r = 8649, |
| 8665 | VFMADDSUB213PDZ128rk = 8650, |
| 8666 | VFMADDSUB213PDZ128rkz = 8651, |
| 8667 | VFMADDSUB213PDZ256m = 8652, |
| 8668 | VFMADDSUB213PDZ256mb = 8653, |
| 8669 | VFMADDSUB213PDZ256mbk = 8654, |
| 8670 | VFMADDSUB213PDZ256mbkz = 8655, |
| 8671 | VFMADDSUB213PDZ256mk = 8656, |
| 8672 | VFMADDSUB213PDZ256mkz = 8657, |
| 8673 | VFMADDSUB213PDZ256r = 8658, |
| 8674 | VFMADDSUB213PDZ256rk = 8659, |
| 8675 | VFMADDSUB213PDZ256rkz = 8660, |
| 8676 | VFMADDSUB213PDZm = 8661, |
| 8677 | VFMADDSUB213PDZmb = 8662, |
| 8678 | VFMADDSUB213PDZmbk = 8663, |
| 8679 | VFMADDSUB213PDZmbkz = 8664, |
| 8680 | VFMADDSUB213PDZmk = 8665, |
| 8681 | VFMADDSUB213PDZmkz = 8666, |
| 8682 | VFMADDSUB213PDZr = 8667, |
| 8683 | VFMADDSUB213PDZrb = 8668, |
| 8684 | VFMADDSUB213PDZrbk = 8669, |
| 8685 | VFMADDSUB213PDZrbkz = 8670, |
| 8686 | VFMADDSUB213PDZrk = 8671, |
| 8687 | VFMADDSUB213PDZrkz = 8672, |
| 8688 | VFMADDSUB213PDm = 8673, |
| 8689 | VFMADDSUB213PDr = 8674, |
| 8690 | VFMADDSUB213PHZ128m = 8675, |
| 8691 | VFMADDSUB213PHZ128mb = 8676, |
| 8692 | VFMADDSUB213PHZ128mbk = 8677, |
| 8693 | VFMADDSUB213PHZ128mbkz = 8678, |
| 8694 | VFMADDSUB213PHZ128mk = 8679, |
| 8695 | VFMADDSUB213PHZ128mkz = 8680, |
| 8696 | VFMADDSUB213PHZ128r = 8681, |
| 8697 | VFMADDSUB213PHZ128rk = 8682, |
| 8698 | VFMADDSUB213PHZ128rkz = 8683, |
| 8699 | VFMADDSUB213PHZ256m = 8684, |
| 8700 | VFMADDSUB213PHZ256mb = 8685, |
| 8701 | VFMADDSUB213PHZ256mbk = 8686, |
| 8702 | VFMADDSUB213PHZ256mbkz = 8687, |
| 8703 | VFMADDSUB213PHZ256mk = 8688, |
| 8704 | VFMADDSUB213PHZ256mkz = 8689, |
| 8705 | VFMADDSUB213PHZ256r = 8690, |
| 8706 | VFMADDSUB213PHZ256rk = 8691, |
| 8707 | VFMADDSUB213PHZ256rkz = 8692, |
| 8708 | VFMADDSUB213PHZm = 8693, |
| 8709 | VFMADDSUB213PHZmb = 8694, |
| 8710 | VFMADDSUB213PHZmbk = 8695, |
| 8711 | VFMADDSUB213PHZmbkz = 8696, |
| 8712 | VFMADDSUB213PHZmk = 8697, |
| 8713 | VFMADDSUB213PHZmkz = 8698, |
| 8714 | VFMADDSUB213PHZr = 8699, |
| 8715 | VFMADDSUB213PHZrb = 8700, |
| 8716 | VFMADDSUB213PHZrbk = 8701, |
| 8717 | VFMADDSUB213PHZrbkz = 8702, |
| 8718 | VFMADDSUB213PHZrk = 8703, |
| 8719 | VFMADDSUB213PHZrkz = 8704, |
| 8720 | VFMADDSUB213PSYm = 8705, |
| 8721 | VFMADDSUB213PSYr = 8706, |
| 8722 | VFMADDSUB213PSZ128m = 8707, |
| 8723 | VFMADDSUB213PSZ128mb = 8708, |
| 8724 | VFMADDSUB213PSZ128mbk = 8709, |
| 8725 | VFMADDSUB213PSZ128mbkz = 8710, |
| 8726 | VFMADDSUB213PSZ128mk = 8711, |
| 8727 | VFMADDSUB213PSZ128mkz = 8712, |
| 8728 | VFMADDSUB213PSZ128r = 8713, |
| 8729 | VFMADDSUB213PSZ128rk = 8714, |
| 8730 | VFMADDSUB213PSZ128rkz = 8715, |
| 8731 | VFMADDSUB213PSZ256m = 8716, |
| 8732 | VFMADDSUB213PSZ256mb = 8717, |
| 8733 | VFMADDSUB213PSZ256mbk = 8718, |
| 8734 | VFMADDSUB213PSZ256mbkz = 8719, |
| 8735 | VFMADDSUB213PSZ256mk = 8720, |
| 8736 | VFMADDSUB213PSZ256mkz = 8721, |
| 8737 | VFMADDSUB213PSZ256r = 8722, |
| 8738 | VFMADDSUB213PSZ256rk = 8723, |
| 8739 | VFMADDSUB213PSZ256rkz = 8724, |
| 8740 | VFMADDSUB213PSZm = 8725, |
| 8741 | VFMADDSUB213PSZmb = 8726, |
| 8742 | VFMADDSUB213PSZmbk = 8727, |
| 8743 | VFMADDSUB213PSZmbkz = 8728, |
| 8744 | VFMADDSUB213PSZmk = 8729, |
| 8745 | VFMADDSUB213PSZmkz = 8730, |
| 8746 | VFMADDSUB213PSZr = 8731, |
| 8747 | VFMADDSUB213PSZrb = 8732, |
| 8748 | VFMADDSUB213PSZrbk = 8733, |
| 8749 | VFMADDSUB213PSZrbkz = 8734, |
| 8750 | VFMADDSUB213PSZrk = 8735, |
| 8751 | VFMADDSUB213PSZrkz = 8736, |
| 8752 | VFMADDSUB213PSm = 8737, |
| 8753 | VFMADDSUB213PSr = 8738, |
| 8754 | VFMADDSUB231PDYm = 8739, |
| 8755 | VFMADDSUB231PDYr = 8740, |
| 8756 | VFMADDSUB231PDZ128m = 8741, |
| 8757 | VFMADDSUB231PDZ128mb = 8742, |
| 8758 | VFMADDSUB231PDZ128mbk = 8743, |
| 8759 | VFMADDSUB231PDZ128mbkz = 8744, |
| 8760 | VFMADDSUB231PDZ128mk = 8745, |
| 8761 | VFMADDSUB231PDZ128mkz = 8746, |
| 8762 | VFMADDSUB231PDZ128r = 8747, |
| 8763 | VFMADDSUB231PDZ128rk = 8748, |
| 8764 | VFMADDSUB231PDZ128rkz = 8749, |
| 8765 | VFMADDSUB231PDZ256m = 8750, |
| 8766 | VFMADDSUB231PDZ256mb = 8751, |
| 8767 | VFMADDSUB231PDZ256mbk = 8752, |
| 8768 | VFMADDSUB231PDZ256mbkz = 8753, |
| 8769 | VFMADDSUB231PDZ256mk = 8754, |
| 8770 | VFMADDSUB231PDZ256mkz = 8755, |
| 8771 | VFMADDSUB231PDZ256r = 8756, |
| 8772 | VFMADDSUB231PDZ256rk = 8757, |
| 8773 | VFMADDSUB231PDZ256rkz = 8758, |
| 8774 | VFMADDSUB231PDZm = 8759, |
| 8775 | VFMADDSUB231PDZmb = 8760, |
| 8776 | VFMADDSUB231PDZmbk = 8761, |
| 8777 | VFMADDSUB231PDZmbkz = 8762, |
| 8778 | VFMADDSUB231PDZmk = 8763, |
| 8779 | VFMADDSUB231PDZmkz = 8764, |
| 8780 | VFMADDSUB231PDZr = 8765, |
| 8781 | VFMADDSUB231PDZrb = 8766, |
| 8782 | VFMADDSUB231PDZrbk = 8767, |
| 8783 | VFMADDSUB231PDZrbkz = 8768, |
| 8784 | VFMADDSUB231PDZrk = 8769, |
| 8785 | VFMADDSUB231PDZrkz = 8770, |
| 8786 | VFMADDSUB231PDm = 8771, |
| 8787 | VFMADDSUB231PDr = 8772, |
| 8788 | VFMADDSUB231PHZ128m = 8773, |
| 8789 | VFMADDSUB231PHZ128mb = 8774, |
| 8790 | VFMADDSUB231PHZ128mbk = 8775, |
| 8791 | VFMADDSUB231PHZ128mbkz = 8776, |
| 8792 | VFMADDSUB231PHZ128mk = 8777, |
| 8793 | VFMADDSUB231PHZ128mkz = 8778, |
| 8794 | VFMADDSUB231PHZ128r = 8779, |
| 8795 | VFMADDSUB231PHZ128rk = 8780, |
| 8796 | VFMADDSUB231PHZ128rkz = 8781, |
| 8797 | VFMADDSUB231PHZ256m = 8782, |
| 8798 | VFMADDSUB231PHZ256mb = 8783, |
| 8799 | VFMADDSUB231PHZ256mbk = 8784, |
| 8800 | VFMADDSUB231PHZ256mbkz = 8785, |
| 8801 | VFMADDSUB231PHZ256mk = 8786, |
| 8802 | VFMADDSUB231PHZ256mkz = 8787, |
| 8803 | VFMADDSUB231PHZ256r = 8788, |
| 8804 | VFMADDSUB231PHZ256rk = 8789, |
| 8805 | VFMADDSUB231PHZ256rkz = 8790, |
| 8806 | VFMADDSUB231PHZm = 8791, |
| 8807 | VFMADDSUB231PHZmb = 8792, |
| 8808 | VFMADDSUB231PHZmbk = 8793, |
| 8809 | VFMADDSUB231PHZmbkz = 8794, |
| 8810 | VFMADDSUB231PHZmk = 8795, |
| 8811 | VFMADDSUB231PHZmkz = 8796, |
| 8812 | VFMADDSUB231PHZr = 8797, |
| 8813 | VFMADDSUB231PHZrb = 8798, |
| 8814 | VFMADDSUB231PHZrbk = 8799, |
| 8815 | VFMADDSUB231PHZrbkz = 8800, |
| 8816 | VFMADDSUB231PHZrk = 8801, |
| 8817 | VFMADDSUB231PHZrkz = 8802, |
| 8818 | VFMADDSUB231PSYm = 8803, |
| 8819 | VFMADDSUB231PSYr = 8804, |
| 8820 | VFMADDSUB231PSZ128m = 8805, |
| 8821 | VFMADDSUB231PSZ128mb = 8806, |
| 8822 | VFMADDSUB231PSZ128mbk = 8807, |
| 8823 | VFMADDSUB231PSZ128mbkz = 8808, |
| 8824 | VFMADDSUB231PSZ128mk = 8809, |
| 8825 | VFMADDSUB231PSZ128mkz = 8810, |
| 8826 | VFMADDSUB231PSZ128r = 8811, |
| 8827 | VFMADDSUB231PSZ128rk = 8812, |
| 8828 | VFMADDSUB231PSZ128rkz = 8813, |
| 8829 | VFMADDSUB231PSZ256m = 8814, |
| 8830 | VFMADDSUB231PSZ256mb = 8815, |
| 8831 | VFMADDSUB231PSZ256mbk = 8816, |
| 8832 | VFMADDSUB231PSZ256mbkz = 8817, |
| 8833 | VFMADDSUB231PSZ256mk = 8818, |
| 8834 | VFMADDSUB231PSZ256mkz = 8819, |
| 8835 | VFMADDSUB231PSZ256r = 8820, |
| 8836 | VFMADDSUB231PSZ256rk = 8821, |
| 8837 | VFMADDSUB231PSZ256rkz = 8822, |
| 8838 | VFMADDSUB231PSZm = 8823, |
| 8839 | VFMADDSUB231PSZmb = 8824, |
| 8840 | VFMADDSUB231PSZmbk = 8825, |
| 8841 | VFMADDSUB231PSZmbkz = 8826, |
| 8842 | VFMADDSUB231PSZmk = 8827, |
| 8843 | VFMADDSUB231PSZmkz = 8828, |
| 8844 | VFMADDSUB231PSZr = 8829, |
| 8845 | VFMADDSUB231PSZrb = 8830, |
| 8846 | VFMADDSUB231PSZrbk = 8831, |
| 8847 | VFMADDSUB231PSZrbkz = 8832, |
| 8848 | VFMADDSUB231PSZrk = 8833, |
| 8849 | VFMADDSUB231PSZrkz = 8834, |
| 8850 | VFMADDSUB231PSm = 8835, |
| 8851 | VFMADDSUB231PSr = 8836, |
| 8852 | VFMADDSUBPD4Ymr = 8837, |
| 8853 | VFMADDSUBPD4Yrm = 8838, |
| 8854 | VFMADDSUBPD4Yrr = 8839, |
| 8855 | VFMADDSUBPD4Yrr_REV = 8840, |
| 8856 | VFMADDSUBPD4mr = 8841, |
| 8857 | VFMADDSUBPD4rm = 8842, |
| 8858 | VFMADDSUBPD4rr = 8843, |
| 8859 | VFMADDSUBPD4rr_REV = 8844, |
| 8860 | VFMADDSUBPS4Ymr = 8845, |
| 8861 | VFMADDSUBPS4Yrm = 8846, |
| 8862 | VFMADDSUBPS4Yrr = 8847, |
| 8863 | VFMADDSUBPS4Yrr_REV = 8848, |
| 8864 | VFMADDSUBPS4mr = 8849, |
| 8865 | VFMADDSUBPS4rm = 8850, |
| 8866 | VFMADDSUBPS4rr = 8851, |
| 8867 | VFMADDSUBPS4rr_REV = 8852, |
| 8868 | VFMSUB132PDYm = 8853, |
| 8869 | VFMSUB132PDYr = 8854, |
| 8870 | VFMSUB132PDZ128m = 8855, |
| 8871 | VFMSUB132PDZ128mb = 8856, |
| 8872 | VFMSUB132PDZ128mbk = 8857, |
| 8873 | VFMSUB132PDZ128mbkz = 8858, |
| 8874 | VFMSUB132PDZ128mk = 8859, |
| 8875 | VFMSUB132PDZ128mkz = 8860, |
| 8876 | VFMSUB132PDZ128r = 8861, |
| 8877 | VFMSUB132PDZ128rk = 8862, |
| 8878 | VFMSUB132PDZ128rkz = 8863, |
| 8879 | VFMSUB132PDZ256m = 8864, |
| 8880 | VFMSUB132PDZ256mb = 8865, |
| 8881 | VFMSUB132PDZ256mbk = 8866, |
| 8882 | VFMSUB132PDZ256mbkz = 8867, |
| 8883 | VFMSUB132PDZ256mk = 8868, |
| 8884 | VFMSUB132PDZ256mkz = 8869, |
| 8885 | VFMSUB132PDZ256r = 8870, |
| 8886 | VFMSUB132PDZ256rk = 8871, |
| 8887 | VFMSUB132PDZ256rkz = 8872, |
| 8888 | VFMSUB132PDZm = 8873, |
| 8889 | VFMSUB132PDZmb = 8874, |
| 8890 | VFMSUB132PDZmbk = 8875, |
| 8891 | VFMSUB132PDZmbkz = 8876, |
| 8892 | VFMSUB132PDZmk = 8877, |
| 8893 | VFMSUB132PDZmkz = 8878, |
| 8894 | VFMSUB132PDZr = 8879, |
| 8895 | VFMSUB132PDZrb = 8880, |
| 8896 | VFMSUB132PDZrbk = 8881, |
| 8897 | VFMSUB132PDZrbkz = 8882, |
| 8898 | VFMSUB132PDZrk = 8883, |
| 8899 | VFMSUB132PDZrkz = 8884, |
| 8900 | VFMSUB132PDm = 8885, |
| 8901 | VFMSUB132PDr = 8886, |
| 8902 | VFMSUB132PHZ128m = 8887, |
| 8903 | VFMSUB132PHZ128mb = 8888, |
| 8904 | VFMSUB132PHZ128mbk = 8889, |
| 8905 | VFMSUB132PHZ128mbkz = 8890, |
| 8906 | VFMSUB132PHZ128mk = 8891, |
| 8907 | VFMSUB132PHZ128mkz = 8892, |
| 8908 | VFMSUB132PHZ128r = 8893, |
| 8909 | VFMSUB132PHZ128rk = 8894, |
| 8910 | VFMSUB132PHZ128rkz = 8895, |
| 8911 | VFMSUB132PHZ256m = 8896, |
| 8912 | VFMSUB132PHZ256mb = 8897, |
| 8913 | VFMSUB132PHZ256mbk = 8898, |
| 8914 | VFMSUB132PHZ256mbkz = 8899, |
| 8915 | VFMSUB132PHZ256mk = 8900, |
| 8916 | VFMSUB132PHZ256mkz = 8901, |
| 8917 | VFMSUB132PHZ256r = 8902, |
| 8918 | VFMSUB132PHZ256rk = 8903, |
| 8919 | VFMSUB132PHZ256rkz = 8904, |
| 8920 | VFMSUB132PHZm = 8905, |
| 8921 | VFMSUB132PHZmb = 8906, |
| 8922 | VFMSUB132PHZmbk = 8907, |
| 8923 | VFMSUB132PHZmbkz = 8908, |
| 8924 | VFMSUB132PHZmk = 8909, |
| 8925 | VFMSUB132PHZmkz = 8910, |
| 8926 | VFMSUB132PHZr = 8911, |
| 8927 | VFMSUB132PHZrb = 8912, |
| 8928 | VFMSUB132PHZrbk = 8913, |
| 8929 | VFMSUB132PHZrbkz = 8914, |
| 8930 | VFMSUB132PHZrk = 8915, |
| 8931 | VFMSUB132PHZrkz = 8916, |
| 8932 | VFMSUB132PSYm = 8917, |
| 8933 | VFMSUB132PSYr = 8918, |
| 8934 | VFMSUB132PSZ128m = 8919, |
| 8935 | VFMSUB132PSZ128mb = 8920, |
| 8936 | VFMSUB132PSZ128mbk = 8921, |
| 8937 | VFMSUB132PSZ128mbkz = 8922, |
| 8938 | VFMSUB132PSZ128mk = 8923, |
| 8939 | VFMSUB132PSZ128mkz = 8924, |
| 8940 | VFMSUB132PSZ128r = 8925, |
| 8941 | VFMSUB132PSZ128rk = 8926, |
| 8942 | VFMSUB132PSZ128rkz = 8927, |
| 8943 | VFMSUB132PSZ256m = 8928, |
| 8944 | VFMSUB132PSZ256mb = 8929, |
| 8945 | VFMSUB132PSZ256mbk = 8930, |
| 8946 | VFMSUB132PSZ256mbkz = 8931, |
| 8947 | VFMSUB132PSZ256mk = 8932, |
| 8948 | VFMSUB132PSZ256mkz = 8933, |
| 8949 | VFMSUB132PSZ256r = 8934, |
| 8950 | VFMSUB132PSZ256rk = 8935, |
| 8951 | VFMSUB132PSZ256rkz = 8936, |
| 8952 | VFMSUB132PSZm = 8937, |
| 8953 | VFMSUB132PSZmb = 8938, |
| 8954 | VFMSUB132PSZmbk = 8939, |
| 8955 | VFMSUB132PSZmbkz = 8940, |
| 8956 | VFMSUB132PSZmk = 8941, |
| 8957 | VFMSUB132PSZmkz = 8942, |
| 8958 | VFMSUB132PSZr = 8943, |
| 8959 | VFMSUB132PSZrb = 8944, |
| 8960 | VFMSUB132PSZrbk = 8945, |
| 8961 | VFMSUB132PSZrbkz = 8946, |
| 8962 | VFMSUB132PSZrk = 8947, |
| 8963 | VFMSUB132PSZrkz = 8948, |
| 8964 | VFMSUB132PSm = 8949, |
| 8965 | VFMSUB132PSr = 8950, |
| 8966 | VFMSUB132SDZm = 8951, |
| 8967 | VFMSUB132SDZm_Int = 8952, |
| 8968 | VFMSUB132SDZm_Intk = 8953, |
| 8969 | VFMSUB132SDZm_Intkz = 8954, |
| 8970 | VFMSUB132SDZr = 8955, |
| 8971 | VFMSUB132SDZr_Int = 8956, |
| 8972 | VFMSUB132SDZr_Intk = 8957, |
| 8973 | VFMSUB132SDZr_Intkz = 8958, |
| 8974 | VFMSUB132SDZrb = 8959, |
| 8975 | VFMSUB132SDZrb_Int = 8960, |
| 8976 | VFMSUB132SDZrb_Intk = 8961, |
| 8977 | VFMSUB132SDZrb_Intkz = 8962, |
| 8978 | VFMSUB132SDm = 8963, |
| 8979 | VFMSUB132SDm_Int = 8964, |
| 8980 | VFMSUB132SDr = 8965, |
| 8981 | VFMSUB132SDr_Int = 8966, |
| 8982 | VFMSUB132SHZm = 8967, |
| 8983 | VFMSUB132SHZm_Int = 8968, |
| 8984 | VFMSUB132SHZm_Intk = 8969, |
| 8985 | VFMSUB132SHZm_Intkz = 8970, |
| 8986 | VFMSUB132SHZr = 8971, |
| 8987 | VFMSUB132SHZr_Int = 8972, |
| 8988 | VFMSUB132SHZr_Intk = 8973, |
| 8989 | VFMSUB132SHZr_Intkz = 8974, |
| 8990 | VFMSUB132SHZrb = 8975, |
| 8991 | VFMSUB132SHZrb_Int = 8976, |
| 8992 | VFMSUB132SHZrb_Intk = 8977, |
| 8993 | VFMSUB132SHZrb_Intkz = 8978, |
| 8994 | VFMSUB132SSZm = 8979, |
| 8995 | VFMSUB132SSZm_Int = 8980, |
| 8996 | VFMSUB132SSZm_Intk = 8981, |
| 8997 | VFMSUB132SSZm_Intkz = 8982, |
| 8998 | VFMSUB132SSZr = 8983, |
| 8999 | VFMSUB132SSZr_Int = 8984, |
| 9000 | VFMSUB132SSZr_Intk = 8985, |
| 9001 | VFMSUB132SSZr_Intkz = 8986, |
| 9002 | VFMSUB132SSZrb = 8987, |
| 9003 | VFMSUB132SSZrb_Int = 8988, |
| 9004 | VFMSUB132SSZrb_Intk = 8989, |
| 9005 | VFMSUB132SSZrb_Intkz = 8990, |
| 9006 | VFMSUB132SSm = 8991, |
| 9007 | VFMSUB132SSm_Int = 8992, |
| 9008 | VFMSUB132SSr = 8993, |
| 9009 | VFMSUB132SSr_Int = 8994, |
| 9010 | VFMSUB213PDYm = 8995, |
| 9011 | VFMSUB213PDYr = 8996, |
| 9012 | VFMSUB213PDZ128m = 8997, |
| 9013 | VFMSUB213PDZ128mb = 8998, |
| 9014 | VFMSUB213PDZ128mbk = 8999, |
| 9015 | VFMSUB213PDZ128mbkz = 9000, |
| 9016 | VFMSUB213PDZ128mk = 9001, |
| 9017 | VFMSUB213PDZ128mkz = 9002, |
| 9018 | VFMSUB213PDZ128r = 9003, |
| 9019 | VFMSUB213PDZ128rk = 9004, |
| 9020 | VFMSUB213PDZ128rkz = 9005, |
| 9021 | VFMSUB213PDZ256m = 9006, |
| 9022 | VFMSUB213PDZ256mb = 9007, |
| 9023 | VFMSUB213PDZ256mbk = 9008, |
| 9024 | VFMSUB213PDZ256mbkz = 9009, |
| 9025 | VFMSUB213PDZ256mk = 9010, |
| 9026 | VFMSUB213PDZ256mkz = 9011, |
| 9027 | VFMSUB213PDZ256r = 9012, |
| 9028 | VFMSUB213PDZ256rk = 9013, |
| 9029 | VFMSUB213PDZ256rkz = 9014, |
| 9030 | VFMSUB213PDZm = 9015, |
| 9031 | VFMSUB213PDZmb = 9016, |
| 9032 | VFMSUB213PDZmbk = 9017, |
| 9033 | VFMSUB213PDZmbkz = 9018, |
| 9034 | VFMSUB213PDZmk = 9019, |
| 9035 | VFMSUB213PDZmkz = 9020, |
| 9036 | VFMSUB213PDZr = 9021, |
| 9037 | VFMSUB213PDZrb = 9022, |
| 9038 | VFMSUB213PDZrbk = 9023, |
| 9039 | VFMSUB213PDZrbkz = 9024, |
| 9040 | VFMSUB213PDZrk = 9025, |
| 9041 | VFMSUB213PDZrkz = 9026, |
| 9042 | VFMSUB213PDm = 9027, |
| 9043 | VFMSUB213PDr = 9028, |
| 9044 | VFMSUB213PHZ128m = 9029, |
| 9045 | VFMSUB213PHZ128mb = 9030, |
| 9046 | VFMSUB213PHZ128mbk = 9031, |
| 9047 | VFMSUB213PHZ128mbkz = 9032, |
| 9048 | VFMSUB213PHZ128mk = 9033, |
| 9049 | VFMSUB213PHZ128mkz = 9034, |
| 9050 | VFMSUB213PHZ128r = 9035, |
| 9051 | VFMSUB213PHZ128rk = 9036, |
| 9052 | VFMSUB213PHZ128rkz = 9037, |
| 9053 | VFMSUB213PHZ256m = 9038, |
| 9054 | VFMSUB213PHZ256mb = 9039, |
| 9055 | VFMSUB213PHZ256mbk = 9040, |
| 9056 | VFMSUB213PHZ256mbkz = 9041, |
| 9057 | VFMSUB213PHZ256mk = 9042, |
| 9058 | VFMSUB213PHZ256mkz = 9043, |
| 9059 | VFMSUB213PHZ256r = 9044, |
| 9060 | VFMSUB213PHZ256rk = 9045, |
| 9061 | VFMSUB213PHZ256rkz = 9046, |
| 9062 | VFMSUB213PHZm = 9047, |
| 9063 | VFMSUB213PHZmb = 9048, |
| 9064 | VFMSUB213PHZmbk = 9049, |
| 9065 | VFMSUB213PHZmbkz = 9050, |
| 9066 | VFMSUB213PHZmk = 9051, |
| 9067 | VFMSUB213PHZmkz = 9052, |
| 9068 | VFMSUB213PHZr = 9053, |
| 9069 | VFMSUB213PHZrb = 9054, |
| 9070 | VFMSUB213PHZrbk = 9055, |
| 9071 | VFMSUB213PHZrbkz = 9056, |
| 9072 | VFMSUB213PHZrk = 9057, |
| 9073 | VFMSUB213PHZrkz = 9058, |
| 9074 | VFMSUB213PSYm = 9059, |
| 9075 | VFMSUB213PSYr = 9060, |
| 9076 | VFMSUB213PSZ128m = 9061, |
| 9077 | VFMSUB213PSZ128mb = 9062, |
| 9078 | VFMSUB213PSZ128mbk = 9063, |
| 9079 | VFMSUB213PSZ128mbkz = 9064, |
| 9080 | VFMSUB213PSZ128mk = 9065, |
| 9081 | VFMSUB213PSZ128mkz = 9066, |
| 9082 | VFMSUB213PSZ128r = 9067, |
| 9083 | VFMSUB213PSZ128rk = 9068, |
| 9084 | VFMSUB213PSZ128rkz = 9069, |
| 9085 | VFMSUB213PSZ256m = 9070, |
| 9086 | VFMSUB213PSZ256mb = 9071, |
| 9087 | VFMSUB213PSZ256mbk = 9072, |
| 9088 | VFMSUB213PSZ256mbkz = 9073, |
| 9089 | VFMSUB213PSZ256mk = 9074, |
| 9090 | VFMSUB213PSZ256mkz = 9075, |
| 9091 | VFMSUB213PSZ256r = 9076, |
| 9092 | VFMSUB213PSZ256rk = 9077, |
| 9093 | VFMSUB213PSZ256rkz = 9078, |
| 9094 | VFMSUB213PSZm = 9079, |
| 9095 | VFMSUB213PSZmb = 9080, |
| 9096 | VFMSUB213PSZmbk = 9081, |
| 9097 | VFMSUB213PSZmbkz = 9082, |
| 9098 | VFMSUB213PSZmk = 9083, |
| 9099 | VFMSUB213PSZmkz = 9084, |
| 9100 | VFMSUB213PSZr = 9085, |
| 9101 | VFMSUB213PSZrb = 9086, |
| 9102 | VFMSUB213PSZrbk = 9087, |
| 9103 | VFMSUB213PSZrbkz = 9088, |
| 9104 | VFMSUB213PSZrk = 9089, |
| 9105 | VFMSUB213PSZrkz = 9090, |
| 9106 | VFMSUB213PSm = 9091, |
| 9107 | VFMSUB213PSr = 9092, |
| 9108 | VFMSUB213SDZm = 9093, |
| 9109 | VFMSUB213SDZm_Int = 9094, |
| 9110 | VFMSUB213SDZm_Intk = 9095, |
| 9111 | VFMSUB213SDZm_Intkz = 9096, |
| 9112 | VFMSUB213SDZr = 9097, |
| 9113 | VFMSUB213SDZr_Int = 9098, |
| 9114 | VFMSUB213SDZr_Intk = 9099, |
| 9115 | VFMSUB213SDZr_Intkz = 9100, |
| 9116 | VFMSUB213SDZrb = 9101, |
| 9117 | VFMSUB213SDZrb_Int = 9102, |
| 9118 | VFMSUB213SDZrb_Intk = 9103, |
| 9119 | VFMSUB213SDZrb_Intkz = 9104, |
| 9120 | VFMSUB213SDm = 9105, |
| 9121 | VFMSUB213SDm_Int = 9106, |
| 9122 | VFMSUB213SDr = 9107, |
| 9123 | VFMSUB213SDr_Int = 9108, |
| 9124 | VFMSUB213SHZm = 9109, |
| 9125 | VFMSUB213SHZm_Int = 9110, |
| 9126 | VFMSUB213SHZm_Intk = 9111, |
| 9127 | VFMSUB213SHZm_Intkz = 9112, |
| 9128 | VFMSUB213SHZr = 9113, |
| 9129 | VFMSUB213SHZr_Int = 9114, |
| 9130 | VFMSUB213SHZr_Intk = 9115, |
| 9131 | VFMSUB213SHZr_Intkz = 9116, |
| 9132 | VFMSUB213SHZrb = 9117, |
| 9133 | VFMSUB213SHZrb_Int = 9118, |
| 9134 | VFMSUB213SHZrb_Intk = 9119, |
| 9135 | VFMSUB213SHZrb_Intkz = 9120, |
| 9136 | VFMSUB213SSZm = 9121, |
| 9137 | VFMSUB213SSZm_Int = 9122, |
| 9138 | VFMSUB213SSZm_Intk = 9123, |
| 9139 | VFMSUB213SSZm_Intkz = 9124, |
| 9140 | VFMSUB213SSZr = 9125, |
| 9141 | VFMSUB213SSZr_Int = 9126, |
| 9142 | VFMSUB213SSZr_Intk = 9127, |
| 9143 | VFMSUB213SSZr_Intkz = 9128, |
| 9144 | VFMSUB213SSZrb = 9129, |
| 9145 | VFMSUB213SSZrb_Int = 9130, |
| 9146 | VFMSUB213SSZrb_Intk = 9131, |
| 9147 | VFMSUB213SSZrb_Intkz = 9132, |
| 9148 | VFMSUB213SSm = 9133, |
| 9149 | VFMSUB213SSm_Int = 9134, |
| 9150 | VFMSUB213SSr = 9135, |
| 9151 | VFMSUB213SSr_Int = 9136, |
| 9152 | VFMSUB231PDYm = 9137, |
| 9153 | VFMSUB231PDYr = 9138, |
| 9154 | VFMSUB231PDZ128m = 9139, |
| 9155 | VFMSUB231PDZ128mb = 9140, |
| 9156 | VFMSUB231PDZ128mbk = 9141, |
| 9157 | VFMSUB231PDZ128mbkz = 9142, |
| 9158 | VFMSUB231PDZ128mk = 9143, |
| 9159 | VFMSUB231PDZ128mkz = 9144, |
| 9160 | VFMSUB231PDZ128r = 9145, |
| 9161 | VFMSUB231PDZ128rk = 9146, |
| 9162 | VFMSUB231PDZ128rkz = 9147, |
| 9163 | VFMSUB231PDZ256m = 9148, |
| 9164 | VFMSUB231PDZ256mb = 9149, |
| 9165 | VFMSUB231PDZ256mbk = 9150, |
| 9166 | VFMSUB231PDZ256mbkz = 9151, |
| 9167 | VFMSUB231PDZ256mk = 9152, |
| 9168 | VFMSUB231PDZ256mkz = 9153, |
| 9169 | VFMSUB231PDZ256r = 9154, |
| 9170 | VFMSUB231PDZ256rk = 9155, |
| 9171 | VFMSUB231PDZ256rkz = 9156, |
| 9172 | VFMSUB231PDZm = 9157, |
| 9173 | VFMSUB231PDZmb = 9158, |
| 9174 | VFMSUB231PDZmbk = 9159, |
| 9175 | VFMSUB231PDZmbkz = 9160, |
| 9176 | VFMSUB231PDZmk = 9161, |
| 9177 | VFMSUB231PDZmkz = 9162, |
| 9178 | VFMSUB231PDZr = 9163, |
| 9179 | VFMSUB231PDZrb = 9164, |
| 9180 | VFMSUB231PDZrbk = 9165, |
| 9181 | VFMSUB231PDZrbkz = 9166, |
| 9182 | VFMSUB231PDZrk = 9167, |
| 9183 | VFMSUB231PDZrkz = 9168, |
| 9184 | VFMSUB231PDm = 9169, |
| 9185 | VFMSUB231PDr = 9170, |
| 9186 | VFMSUB231PHZ128m = 9171, |
| 9187 | VFMSUB231PHZ128mb = 9172, |
| 9188 | VFMSUB231PHZ128mbk = 9173, |
| 9189 | VFMSUB231PHZ128mbkz = 9174, |
| 9190 | VFMSUB231PHZ128mk = 9175, |
| 9191 | VFMSUB231PHZ128mkz = 9176, |
| 9192 | VFMSUB231PHZ128r = 9177, |
| 9193 | VFMSUB231PHZ128rk = 9178, |
| 9194 | VFMSUB231PHZ128rkz = 9179, |
| 9195 | VFMSUB231PHZ256m = 9180, |
| 9196 | VFMSUB231PHZ256mb = 9181, |
| 9197 | VFMSUB231PHZ256mbk = 9182, |
| 9198 | VFMSUB231PHZ256mbkz = 9183, |
| 9199 | VFMSUB231PHZ256mk = 9184, |
| 9200 | VFMSUB231PHZ256mkz = 9185, |
| 9201 | VFMSUB231PHZ256r = 9186, |
| 9202 | VFMSUB231PHZ256rk = 9187, |
| 9203 | VFMSUB231PHZ256rkz = 9188, |
| 9204 | VFMSUB231PHZm = 9189, |
| 9205 | VFMSUB231PHZmb = 9190, |
| 9206 | VFMSUB231PHZmbk = 9191, |
| 9207 | VFMSUB231PHZmbkz = 9192, |
| 9208 | VFMSUB231PHZmk = 9193, |
| 9209 | VFMSUB231PHZmkz = 9194, |
| 9210 | VFMSUB231PHZr = 9195, |
| 9211 | VFMSUB231PHZrb = 9196, |
| 9212 | VFMSUB231PHZrbk = 9197, |
| 9213 | VFMSUB231PHZrbkz = 9198, |
| 9214 | VFMSUB231PHZrk = 9199, |
| 9215 | VFMSUB231PHZrkz = 9200, |
| 9216 | VFMSUB231PSYm = 9201, |
| 9217 | VFMSUB231PSYr = 9202, |
| 9218 | VFMSUB231PSZ128m = 9203, |
| 9219 | VFMSUB231PSZ128mb = 9204, |
| 9220 | VFMSUB231PSZ128mbk = 9205, |
| 9221 | VFMSUB231PSZ128mbkz = 9206, |
| 9222 | VFMSUB231PSZ128mk = 9207, |
| 9223 | VFMSUB231PSZ128mkz = 9208, |
| 9224 | VFMSUB231PSZ128r = 9209, |
| 9225 | VFMSUB231PSZ128rk = 9210, |
| 9226 | VFMSUB231PSZ128rkz = 9211, |
| 9227 | VFMSUB231PSZ256m = 9212, |
| 9228 | VFMSUB231PSZ256mb = 9213, |
| 9229 | VFMSUB231PSZ256mbk = 9214, |
| 9230 | VFMSUB231PSZ256mbkz = 9215, |
| 9231 | VFMSUB231PSZ256mk = 9216, |
| 9232 | VFMSUB231PSZ256mkz = 9217, |
| 9233 | VFMSUB231PSZ256r = 9218, |
| 9234 | VFMSUB231PSZ256rk = 9219, |
| 9235 | VFMSUB231PSZ256rkz = 9220, |
| 9236 | VFMSUB231PSZm = 9221, |
| 9237 | VFMSUB231PSZmb = 9222, |
| 9238 | VFMSUB231PSZmbk = 9223, |
| 9239 | VFMSUB231PSZmbkz = 9224, |
| 9240 | VFMSUB231PSZmk = 9225, |
| 9241 | VFMSUB231PSZmkz = 9226, |
| 9242 | VFMSUB231PSZr = 9227, |
| 9243 | VFMSUB231PSZrb = 9228, |
| 9244 | VFMSUB231PSZrbk = 9229, |
| 9245 | VFMSUB231PSZrbkz = 9230, |
| 9246 | VFMSUB231PSZrk = 9231, |
| 9247 | VFMSUB231PSZrkz = 9232, |
| 9248 | VFMSUB231PSm = 9233, |
| 9249 | VFMSUB231PSr = 9234, |
| 9250 | VFMSUB231SDZm = 9235, |
| 9251 | VFMSUB231SDZm_Int = 9236, |
| 9252 | VFMSUB231SDZm_Intk = 9237, |
| 9253 | VFMSUB231SDZm_Intkz = 9238, |
| 9254 | VFMSUB231SDZr = 9239, |
| 9255 | VFMSUB231SDZr_Int = 9240, |
| 9256 | VFMSUB231SDZr_Intk = 9241, |
| 9257 | VFMSUB231SDZr_Intkz = 9242, |
| 9258 | VFMSUB231SDZrb = 9243, |
| 9259 | VFMSUB231SDZrb_Int = 9244, |
| 9260 | VFMSUB231SDZrb_Intk = 9245, |
| 9261 | VFMSUB231SDZrb_Intkz = 9246, |
| 9262 | VFMSUB231SDm = 9247, |
| 9263 | VFMSUB231SDm_Int = 9248, |
| 9264 | VFMSUB231SDr = 9249, |
| 9265 | VFMSUB231SDr_Int = 9250, |
| 9266 | VFMSUB231SHZm = 9251, |
| 9267 | VFMSUB231SHZm_Int = 9252, |
| 9268 | VFMSUB231SHZm_Intk = 9253, |
| 9269 | VFMSUB231SHZm_Intkz = 9254, |
| 9270 | VFMSUB231SHZr = 9255, |
| 9271 | VFMSUB231SHZr_Int = 9256, |
| 9272 | VFMSUB231SHZr_Intk = 9257, |
| 9273 | VFMSUB231SHZr_Intkz = 9258, |
| 9274 | VFMSUB231SHZrb = 9259, |
| 9275 | VFMSUB231SHZrb_Int = 9260, |
| 9276 | VFMSUB231SHZrb_Intk = 9261, |
| 9277 | VFMSUB231SHZrb_Intkz = 9262, |
| 9278 | VFMSUB231SSZm = 9263, |
| 9279 | VFMSUB231SSZm_Int = 9264, |
| 9280 | VFMSUB231SSZm_Intk = 9265, |
| 9281 | VFMSUB231SSZm_Intkz = 9266, |
| 9282 | VFMSUB231SSZr = 9267, |
| 9283 | VFMSUB231SSZr_Int = 9268, |
| 9284 | VFMSUB231SSZr_Intk = 9269, |
| 9285 | VFMSUB231SSZr_Intkz = 9270, |
| 9286 | VFMSUB231SSZrb = 9271, |
| 9287 | VFMSUB231SSZrb_Int = 9272, |
| 9288 | VFMSUB231SSZrb_Intk = 9273, |
| 9289 | VFMSUB231SSZrb_Intkz = 9274, |
| 9290 | VFMSUB231SSm = 9275, |
| 9291 | VFMSUB231SSm_Int = 9276, |
| 9292 | VFMSUB231SSr = 9277, |
| 9293 | VFMSUB231SSr_Int = 9278, |
| 9294 | VFMSUBADD132PDYm = 9279, |
| 9295 | VFMSUBADD132PDYr = 9280, |
| 9296 | VFMSUBADD132PDZ128m = 9281, |
| 9297 | VFMSUBADD132PDZ128mb = 9282, |
| 9298 | VFMSUBADD132PDZ128mbk = 9283, |
| 9299 | VFMSUBADD132PDZ128mbkz = 9284, |
| 9300 | VFMSUBADD132PDZ128mk = 9285, |
| 9301 | VFMSUBADD132PDZ128mkz = 9286, |
| 9302 | VFMSUBADD132PDZ128r = 9287, |
| 9303 | VFMSUBADD132PDZ128rk = 9288, |
| 9304 | VFMSUBADD132PDZ128rkz = 9289, |
| 9305 | VFMSUBADD132PDZ256m = 9290, |
| 9306 | VFMSUBADD132PDZ256mb = 9291, |
| 9307 | VFMSUBADD132PDZ256mbk = 9292, |
| 9308 | VFMSUBADD132PDZ256mbkz = 9293, |
| 9309 | VFMSUBADD132PDZ256mk = 9294, |
| 9310 | VFMSUBADD132PDZ256mkz = 9295, |
| 9311 | VFMSUBADD132PDZ256r = 9296, |
| 9312 | VFMSUBADD132PDZ256rk = 9297, |
| 9313 | VFMSUBADD132PDZ256rkz = 9298, |
| 9314 | VFMSUBADD132PDZm = 9299, |
| 9315 | VFMSUBADD132PDZmb = 9300, |
| 9316 | VFMSUBADD132PDZmbk = 9301, |
| 9317 | VFMSUBADD132PDZmbkz = 9302, |
| 9318 | VFMSUBADD132PDZmk = 9303, |
| 9319 | VFMSUBADD132PDZmkz = 9304, |
| 9320 | VFMSUBADD132PDZr = 9305, |
| 9321 | VFMSUBADD132PDZrb = 9306, |
| 9322 | VFMSUBADD132PDZrbk = 9307, |
| 9323 | VFMSUBADD132PDZrbkz = 9308, |
| 9324 | VFMSUBADD132PDZrk = 9309, |
| 9325 | VFMSUBADD132PDZrkz = 9310, |
| 9326 | VFMSUBADD132PDm = 9311, |
| 9327 | VFMSUBADD132PDr = 9312, |
| 9328 | VFMSUBADD132PHZ128m = 9313, |
| 9329 | VFMSUBADD132PHZ128mb = 9314, |
| 9330 | VFMSUBADD132PHZ128mbk = 9315, |
| 9331 | VFMSUBADD132PHZ128mbkz = 9316, |
| 9332 | VFMSUBADD132PHZ128mk = 9317, |
| 9333 | VFMSUBADD132PHZ128mkz = 9318, |
| 9334 | VFMSUBADD132PHZ128r = 9319, |
| 9335 | VFMSUBADD132PHZ128rk = 9320, |
| 9336 | VFMSUBADD132PHZ128rkz = 9321, |
| 9337 | VFMSUBADD132PHZ256m = 9322, |
| 9338 | VFMSUBADD132PHZ256mb = 9323, |
| 9339 | VFMSUBADD132PHZ256mbk = 9324, |
| 9340 | VFMSUBADD132PHZ256mbkz = 9325, |
| 9341 | VFMSUBADD132PHZ256mk = 9326, |
| 9342 | VFMSUBADD132PHZ256mkz = 9327, |
| 9343 | VFMSUBADD132PHZ256r = 9328, |
| 9344 | VFMSUBADD132PHZ256rk = 9329, |
| 9345 | VFMSUBADD132PHZ256rkz = 9330, |
| 9346 | VFMSUBADD132PHZm = 9331, |
| 9347 | VFMSUBADD132PHZmb = 9332, |
| 9348 | VFMSUBADD132PHZmbk = 9333, |
| 9349 | VFMSUBADD132PHZmbkz = 9334, |
| 9350 | VFMSUBADD132PHZmk = 9335, |
| 9351 | VFMSUBADD132PHZmkz = 9336, |
| 9352 | VFMSUBADD132PHZr = 9337, |
| 9353 | VFMSUBADD132PHZrb = 9338, |
| 9354 | VFMSUBADD132PHZrbk = 9339, |
| 9355 | VFMSUBADD132PHZrbkz = 9340, |
| 9356 | VFMSUBADD132PHZrk = 9341, |
| 9357 | VFMSUBADD132PHZrkz = 9342, |
| 9358 | VFMSUBADD132PSYm = 9343, |
| 9359 | VFMSUBADD132PSYr = 9344, |
| 9360 | VFMSUBADD132PSZ128m = 9345, |
| 9361 | VFMSUBADD132PSZ128mb = 9346, |
| 9362 | VFMSUBADD132PSZ128mbk = 9347, |
| 9363 | VFMSUBADD132PSZ128mbkz = 9348, |
| 9364 | VFMSUBADD132PSZ128mk = 9349, |
| 9365 | VFMSUBADD132PSZ128mkz = 9350, |
| 9366 | VFMSUBADD132PSZ128r = 9351, |
| 9367 | VFMSUBADD132PSZ128rk = 9352, |
| 9368 | VFMSUBADD132PSZ128rkz = 9353, |
| 9369 | VFMSUBADD132PSZ256m = 9354, |
| 9370 | VFMSUBADD132PSZ256mb = 9355, |
| 9371 | VFMSUBADD132PSZ256mbk = 9356, |
| 9372 | VFMSUBADD132PSZ256mbkz = 9357, |
| 9373 | VFMSUBADD132PSZ256mk = 9358, |
| 9374 | VFMSUBADD132PSZ256mkz = 9359, |
| 9375 | VFMSUBADD132PSZ256r = 9360, |
| 9376 | VFMSUBADD132PSZ256rk = 9361, |
| 9377 | VFMSUBADD132PSZ256rkz = 9362, |
| 9378 | VFMSUBADD132PSZm = 9363, |
| 9379 | VFMSUBADD132PSZmb = 9364, |
| 9380 | VFMSUBADD132PSZmbk = 9365, |
| 9381 | VFMSUBADD132PSZmbkz = 9366, |
| 9382 | VFMSUBADD132PSZmk = 9367, |
| 9383 | VFMSUBADD132PSZmkz = 9368, |
| 9384 | VFMSUBADD132PSZr = 9369, |
| 9385 | VFMSUBADD132PSZrb = 9370, |
| 9386 | VFMSUBADD132PSZrbk = 9371, |
| 9387 | VFMSUBADD132PSZrbkz = 9372, |
| 9388 | VFMSUBADD132PSZrk = 9373, |
| 9389 | VFMSUBADD132PSZrkz = 9374, |
| 9390 | VFMSUBADD132PSm = 9375, |
| 9391 | VFMSUBADD132PSr = 9376, |
| 9392 | VFMSUBADD213PDYm = 9377, |
| 9393 | VFMSUBADD213PDYr = 9378, |
| 9394 | VFMSUBADD213PDZ128m = 9379, |
| 9395 | VFMSUBADD213PDZ128mb = 9380, |
| 9396 | VFMSUBADD213PDZ128mbk = 9381, |
| 9397 | VFMSUBADD213PDZ128mbkz = 9382, |
| 9398 | VFMSUBADD213PDZ128mk = 9383, |
| 9399 | VFMSUBADD213PDZ128mkz = 9384, |
| 9400 | VFMSUBADD213PDZ128r = 9385, |
| 9401 | VFMSUBADD213PDZ128rk = 9386, |
| 9402 | VFMSUBADD213PDZ128rkz = 9387, |
| 9403 | VFMSUBADD213PDZ256m = 9388, |
| 9404 | VFMSUBADD213PDZ256mb = 9389, |
| 9405 | VFMSUBADD213PDZ256mbk = 9390, |
| 9406 | VFMSUBADD213PDZ256mbkz = 9391, |
| 9407 | VFMSUBADD213PDZ256mk = 9392, |
| 9408 | VFMSUBADD213PDZ256mkz = 9393, |
| 9409 | VFMSUBADD213PDZ256r = 9394, |
| 9410 | VFMSUBADD213PDZ256rk = 9395, |
| 9411 | VFMSUBADD213PDZ256rkz = 9396, |
| 9412 | VFMSUBADD213PDZm = 9397, |
| 9413 | VFMSUBADD213PDZmb = 9398, |
| 9414 | VFMSUBADD213PDZmbk = 9399, |
| 9415 | VFMSUBADD213PDZmbkz = 9400, |
| 9416 | VFMSUBADD213PDZmk = 9401, |
| 9417 | VFMSUBADD213PDZmkz = 9402, |
| 9418 | VFMSUBADD213PDZr = 9403, |
| 9419 | VFMSUBADD213PDZrb = 9404, |
| 9420 | VFMSUBADD213PDZrbk = 9405, |
| 9421 | VFMSUBADD213PDZrbkz = 9406, |
| 9422 | VFMSUBADD213PDZrk = 9407, |
| 9423 | VFMSUBADD213PDZrkz = 9408, |
| 9424 | VFMSUBADD213PDm = 9409, |
| 9425 | VFMSUBADD213PDr = 9410, |
| 9426 | VFMSUBADD213PHZ128m = 9411, |
| 9427 | VFMSUBADD213PHZ128mb = 9412, |
| 9428 | VFMSUBADD213PHZ128mbk = 9413, |
| 9429 | VFMSUBADD213PHZ128mbkz = 9414, |
| 9430 | VFMSUBADD213PHZ128mk = 9415, |
| 9431 | VFMSUBADD213PHZ128mkz = 9416, |
| 9432 | VFMSUBADD213PHZ128r = 9417, |
| 9433 | VFMSUBADD213PHZ128rk = 9418, |
| 9434 | VFMSUBADD213PHZ128rkz = 9419, |
| 9435 | VFMSUBADD213PHZ256m = 9420, |
| 9436 | VFMSUBADD213PHZ256mb = 9421, |
| 9437 | VFMSUBADD213PHZ256mbk = 9422, |
| 9438 | VFMSUBADD213PHZ256mbkz = 9423, |
| 9439 | VFMSUBADD213PHZ256mk = 9424, |
| 9440 | VFMSUBADD213PHZ256mkz = 9425, |
| 9441 | VFMSUBADD213PHZ256r = 9426, |
| 9442 | VFMSUBADD213PHZ256rk = 9427, |
| 9443 | VFMSUBADD213PHZ256rkz = 9428, |
| 9444 | VFMSUBADD213PHZm = 9429, |
| 9445 | VFMSUBADD213PHZmb = 9430, |
| 9446 | VFMSUBADD213PHZmbk = 9431, |
| 9447 | VFMSUBADD213PHZmbkz = 9432, |
| 9448 | VFMSUBADD213PHZmk = 9433, |
| 9449 | VFMSUBADD213PHZmkz = 9434, |
| 9450 | VFMSUBADD213PHZr = 9435, |
| 9451 | VFMSUBADD213PHZrb = 9436, |
| 9452 | VFMSUBADD213PHZrbk = 9437, |
| 9453 | VFMSUBADD213PHZrbkz = 9438, |
| 9454 | VFMSUBADD213PHZrk = 9439, |
| 9455 | VFMSUBADD213PHZrkz = 9440, |
| 9456 | VFMSUBADD213PSYm = 9441, |
| 9457 | VFMSUBADD213PSYr = 9442, |
| 9458 | VFMSUBADD213PSZ128m = 9443, |
| 9459 | VFMSUBADD213PSZ128mb = 9444, |
| 9460 | VFMSUBADD213PSZ128mbk = 9445, |
| 9461 | VFMSUBADD213PSZ128mbkz = 9446, |
| 9462 | VFMSUBADD213PSZ128mk = 9447, |
| 9463 | VFMSUBADD213PSZ128mkz = 9448, |
| 9464 | VFMSUBADD213PSZ128r = 9449, |
| 9465 | VFMSUBADD213PSZ128rk = 9450, |
| 9466 | VFMSUBADD213PSZ128rkz = 9451, |
| 9467 | VFMSUBADD213PSZ256m = 9452, |
| 9468 | VFMSUBADD213PSZ256mb = 9453, |
| 9469 | VFMSUBADD213PSZ256mbk = 9454, |
| 9470 | VFMSUBADD213PSZ256mbkz = 9455, |
| 9471 | VFMSUBADD213PSZ256mk = 9456, |
| 9472 | VFMSUBADD213PSZ256mkz = 9457, |
| 9473 | VFMSUBADD213PSZ256r = 9458, |
| 9474 | VFMSUBADD213PSZ256rk = 9459, |
| 9475 | VFMSUBADD213PSZ256rkz = 9460, |
| 9476 | VFMSUBADD213PSZm = 9461, |
| 9477 | VFMSUBADD213PSZmb = 9462, |
| 9478 | VFMSUBADD213PSZmbk = 9463, |
| 9479 | VFMSUBADD213PSZmbkz = 9464, |
| 9480 | VFMSUBADD213PSZmk = 9465, |
| 9481 | VFMSUBADD213PSZmkz = 9466, |
| 9482 | VFMSUBADD213PSZr = 9467, |
| 9483 | VFMSUBADD213PSZrb = 9468, |
| 9484 | VFMSUBADD213PSZrbk = 9469, |
| 9485 | VFMSUBADD213PSZrbkz = 9470, |
| 9486 | VFMSUBADD213PSZrk = 9471, |
| 9487 | VFMSUBADD213PSZrkz = 9472, |
| 9488 | VFMSUBADD213PSm = 9473, |
| 9489 | VFMSUBADD213PSr = 9474, |
| 9490 | VFMSUBADD231PDYm = 9475, |
| 9491 | VFMSUBADD231PDYr = 9476, |
| 9492 | VFMSUBADD231PDZ128m = 9477, |
| 9493 | VFMSUBADD231PDZ128mb = 9478, |
| 9494 | VFMSUBADD231PDZ128mbk = 9479, |
| 9495 | VFMSUBADD231PDZ128mbkz = 9480, |
| 9496 | VFMSUBADD231PDZ128mk = 9481, |
| 9497 | VFMSUBADD231PDZ128mkz = 9482, |
| 9498 | VFMSUBADD231PDZ128r = 9483, |
| 9499 | VFMSUBADD231PDZ128rk = 9484, |
| 9500 | VFMSUBADD231PDZ128rkz = 9485, |
| 9501 | VFMSUBADD231PDZ256m = 9486, |
| 9502 | VFMSUBADD231PDZ256mb = 9487, |
| 9503 | VFMSUBADD231PDZ256mbk = 9488, |
| 9504 | VFMSUBADD231PDZ256mbkz = 9489, |
| 9505 | VFMSUBADD231PDZ256mk = 9490, |
| 9506 | VFMSUBADD231PDZ256mkz = 9491, |
| 9507 | VFMSUBADD231PDZ256r = 9492, |
| 9508 | VFMSUBADD231PDZ256rk = 9493, |
| 9509 | VFMSUBADD231PDZ256rkz = 9494, |
| 9510 | VFMSUBADD231PDZm = 9495, |
| 9511 | VFMSUBADD231PDZmb = 9496, |
| 9512 | VFMSUBADD231PDZmbk = 9497, |
| 9513 | VFMSUBADD231PDZmbkz = 9498, |
| 9514 | VFMSUBADD231PDZmk = 9499, |
| 9515 | VFMSUBADD231PDZmkz = 9500, |
| 9516 | VFMSUBADD231PDZr = 9501, |
| 9517 | VFMSUBADD231PDZrb = 9502, |
| 9518 | VFMSUBADD231PDZrbk = 9503, |
| 9519 | VFMSUBADD231PDZrbkz = 9504, |
| 9520 | VFMSUBADD231PDZrk = 9505, |
| 9521 | VFMSUBADD231PDZrkz = 9506, |
| 9522 | VFMSUBADD231PDm = 9507, |
| 9523 | VFMSUBADD231PDr = 9508, |
| 9524 | VFMSUBADD231PHZ128m = 9509, |
| 9525 | VFMSUBADD231PHZ128mb = 9510, |
| 9526 | VFMSUBADD231PHZ128mbk = 9511, |
| 9527 | VFMSUBADD231PHZ128mbkz = 9512, |
| 9528 | VFMSUBADD231PHZ128mk = 9513, |
| 9529 | VFMSUBADD231PHZ128mkz = 9514, |
| 9530 | VFMSUBADD231PHZ128r = 9515, |
| 9531 | VFMSUBADD231PHZ128rk = 9516, |
| 9532 | VFMSUBADD231PHZ128rkz = 9517, |
| 9533 | VFMSUBADD231PHZ256m = 9518, |
| 9534 | VFMSUBADD231PHZ256mb = 9519, |
| 9535 | VFMSUBADD231PHZ256mbk = 9520, |
| 9536 | VFMSUBADD231PHZ256mbkz = 9521, |
| 9537 | VFMSUBADD231PHZ256mk = 9522, |
| 9538 | VFMSUBADD231PHZ256mkz = 9523, |
| 9539 | VFMSUBADD231PHZ256r = 9524, |
| 9540 | VFMSUBADD231PHZ256rk = 9525, |
| 9541 | VFMSUBADD231PHZ256rkz = 9526, |
| 9542 | VFMSUBADD231PHZm = 9527, |
| 9543 | VFMSUBADD231PHZmb = 9528, |
| 9544 | VFMSUBADD231PHZmbk = 9529, |
| 9545 | VFMSUBADD231PHZmbkz = 9530, |
| 9546 | VFMSUBADD231PHZmk = 9531, |
| 9547 | VFMSUBADD231PHZmkz = 9532, |
| 9548 | VFMSUBADD231PHZr = 9533, |
| 9549 | VFMSUBADD231PHZrb = 9534, |
| 9550 | VFMSUBADD231PHZrbk = 9535, |
| 9551 | VFMSUBADD231PHZrbkz = 9536, |
| 9552 | VFMSUBADD231PHZrk = 9537, |
| 9553 | VFMSUBADD231PHZrkz = 9538, |
| 9554 | VFMSUBADD231PSYm = 9539, |
| 9555 | VFMSUBADD231PSYr = 9540, |
| 9556 | VFMSUBADD231PSZ128m = 9541, |
| 9557 | VFMSUBADD231PSZ128mb = 9542, |
| 9558 | VFMSUBADD231PSZ128mbk = 9543, |
| 9559 | VFMSUBADD231PSZ128mbkz = 9544, |
| 9560 | VFMSUBADD231PSZ128mk = 9545, |
| 9561 | VFMSUBADD231PSZ128mkz = 9546, |
| 9562 | VFMSUBADD231PSZ128r = 9547, |
| 9563 | VFMSUBADD231PSZ128rk = 9548, |
| 9564 | VFMSUBADD231PSZ128rkz = 9549, |
| 9565 | VFMSUBADD231PSZ256m = 9550, |
| 9566 | VFMSUBADD231PSZ256mb = 9551, |
| 9567 | VFMSUBADD231PSZ256mbk = 9552, |
| 9568 | VFMSUBADD231PSZ256mbkz = 9553, |
| 9569 | VFMSUBADD231PSZ256mk = 9554, |
| 9570 | VFMSUBADD231PSZ256mkz = 9555, |
| 9571 | VFMSUBADD231PSZ256r = 9556, |
| 9572 | VFMSUBADD231PSZ256rk = 9557, |
| 9573 | VFMSUBADD231PSZ256rkz = 9558, |
| 9574 | VFMSUBADD231PSZm = 9559, |
| 9575 | VFMSUBADD231PSZmb = 9560, |
| 9576 | VFMSUBADD231PSZmbk = 9561, |
| 9577 | VFMSUBADD231PSZmbkz = 9562, |
| 9578 | VFMSUBADD231PSZmk = 9563, |
| 9579 | VFMSUBADD231PSZmkz = 9564, |
| 9580 | VFMSUBADD231PSZr = 9565, |
| 9581 | VFMSUBADD231PSZrb = 9566, |
| 9582 | VFMSUBADD231PSZrbk = 9567, |
| 9583 | VFMSUBADD231PSZrbkz = 9568, |
| 9584 | VFMSUBADD231PSZrk = 9569, |
| 9585 | VFMSUBADD231PSZrkz = 9570, |
| 9586 | VFMSUBADD231PSm = 9571, |
| 9587 | VFMSUBADD231PSr = 9572, |
| 9588 | VFMSUBADDPD4Ymr = 9573, |
| 9589 | VFMSUBADDPD4Yrm = 9574, |
| 9590 | VFMSUBADDPD4Yrr = 9575, |
| 9591 | VFMSUBADDPD4Yrr_REV = 9576, |
| 9592 | VFMSUBADDPD4mr = 9577, |
| 9593 | VFMSUBADDPD4rm = 9578, |
| 9594 | VFMSUBADDPD4rr = 9579, |
| 9595 | VFMSUBADDPD4rr_REV = 9580, |
| 9596 | VFMSUBADDPS4Ymr = 9581, |
| 9597 | VFMSUBADDPS4Yrm = 9582, |
| 9598 | VFMSUBADDPS4Yrr = 9583, |
| 9599 | VFMSUBADDPS4Yrr_REV = 9584, |
| 9600 | VFMSUBADDPS4mr = 9585, |
| 9601 | VFMSUBADDPS4rm = 9586, |
| 9602 | VFMSUBADDPS4rr = 9587, |
| 9603 | VFMSUBADDPS4rr_REV = 9588, |
| 9604 | VFMSUBPD4Ymr = 9589, |
| 9605 | VFMSUBPD4Yrm = 9590, |
| 9606 | VFMSUBPD4Yrr = 9591, |
| 9607 | VFMSUBPD4Yrr_REV = 9592, |
| 9608 | VFMSUBPD4mr = 9593, |
| 9609 | VFMSUBPD4rm = 9594, |
| 9610 | VFMSUBPD4rr = 9595, |
| 9611 | VFMSUBPD4rr_REV = 9596, |
| 9612 | VFMSUBPS4Ymr = 9597, |
| 9613 | VFMSUBPS4Yrm = 9598, |
| 9614 | VFMSUBPS4Yrr = 9599, |
| 9615 | VFMSUBPS4Yrr_REV = 9600, |
| 9616 | VFMSUBPS4mr = 9601, |
| 9617 | VFMSUBPS4rm = 9602, |
| 9618 | VFMSUBPS4rr = 9603, |
| 9619 | VFMSUBPS4rr_REV = 9604, |
| 9620 | VFMSUBSD4mr = 9605, |
| 9621 | VFMSUBSD4mr_Int = 9606, |
| 9622 | VFMSUBSD4rm = 9607, |
| 9623 | VFMSUBSD4rm_Int = 9608, |
| 9624 | VFMSUBSD4rr = 9609, |
| 9625 | VFMSUBSD4rr_Int = 9610, |
| 9626 | VFMSUBSD4rr_Int_REV = 9611, |
| 9627 | VFMSUBSD4rr_REV = 9612, |
| 9628 | VFMSUBSS4mr = 9613, |
| 9629 | VFMSUBSS4mr_Int = 9614, |
| 9630 | VFMSUBSS4rm = 9615, |
| 9631 | VFMSUBSS4rm_Int = 9616, |
| 9632 | VFMSUBSS4rr = 9617, |
| 9633 | VFMSUBSS4rr_Int = 9618, |
| 9634 | VFMSUBSS4rr_Int_REV = 9619, |
| 9635 | VFMSUBSS4rr_REV = 9620, |
| 9636 | VFMULCPHZ128rm = 9621, |
| 9637 | VFMULCPHZ128rmb = 9622, |
| 9638 | VFMULCPHZ128rmbk = 9623, |
| 9639 | VFMULCPHZ128rmbkz = 9624, |
| 9640 | VFMULCPHZ128rmk = 9625, |
| 9641 | VFMULCPHZ128rmkz = 9626, |
| 9642 | VFMULCPHZ128rr = 9627, |
| 9643 | VFMULCPHZ128rrk = 9628, |
| 9644 | VFMULCPHZ128rrkz = 9629, |
| 9645 | VFMULCPHZ256rm = 9630, |
| 9646 | VFMULCPHZ256rmb = 9631, |
| 9647 | VFMULCPHZ256rmbk = 9632, |
| 9648 | VFMULCPHZ256rmbkz = 9633, |
| 9649 | VFMULCPHZ256rmk = 9634, |
| 9650 | VFMULCPHZ256rmkz = 9635, |
| 9651 | VFMULCPHZ256rr = 9636, |
| 9652 | VFMULCPHZ256rrk = 9637, |
| 9653 | VFMULCPHZ256rrkz = 9638, |
| 9654 | VFMULCPHZrm = 9639, |
| 9655 | VFMULCPHZrmb = 9640, |
| 9656 | VFMULCPHZrmbk = 9641, |
| 9657 | VFMULCPHZrmbkz = 9642, |
| 9658 | VFMULCPHZrmk = 9643, |
| 9659 | VFMULCPHZrmkz = 9644, |
| 9660 | VFMULCPHZrr = 9645, |
| 9661 | VFMULCPHZrrb = 9646, |
| 9662 | VFMULCPHZrrbk = 9647, |
| 9663 | VFMULCPHZrrbkz = 9648, |
| 9664 | VFMULCPHZrrk = 9649, |
| 9665 | VFMULCPHZrrkz = 9650, |
| 9666 | VFMULCSHZrm = 9651, |
| 9667 | VFMULCSHZrmk = 9652, |
| 9668 | VFMULCSHZrmkz = 9653, |
| 9669 | VFMULCSHZrr = 9654, |
| 9670 | VFMULCSHZrrb = 9655, |
| 9671 | VFMULCSHZrrbk = 9656, |
| 9672 | VFMULCSHZrrbkz = 9657, |
| 9673 | VFMULCSHZrrk = 9658, |
| 9674 | VFMULCSHZrrkz = 9659, |
| 9675 | VFNMADD132PDYm = 9660, |
| 9676 | VFNMADD132PDYr = 9661, |
| 9677 | VFNMADD132PDZ128m = 9662, |
| 9678 | VFNMADD132PDZ128mb = 9663, |
| 9679 | VFNMADD132PDZ128mbk = 9664, |
| 9680 | VFNMADD132PDZ128mbkz = 9665, |
| 9681 | VFNMADD132PDZ128mk = 9666, |
| 9682 | VFNMADD132PDZ128mkz = 9667, |
| 9683 | VFNMADD132PDZ128r = 9668, |
| 9684 | VFNMADD132PDZ128rk = 9669, |
| 9685 | VFNMADD132PDZ128rkz = 9670, |
| 9686 | VFNMADD132PDZ256m = 9671, |
| 9687 | VFNMADD132PDZ256mb = 9672, |
| 9688 | VFNMADD132PDZ256mbk = 9673, |
| 9689 | VFNMADD132PDZ256mbkz = 9674, |
| 9690 | VFNMADD132PDZ256mk = 9675, |
| 9691 | VFNMADD132PDZ256mkz = 9676, |
| 9692 | VFNMADD132PDZ256r = 9677, |
| 9693 | VFNMADD132PDZ256rk = 9678, |
| 9694 | VFNMADD132PDZ256rkz = 9679, |
| 9695 | VFNMADD132PDZm = 9680, |
| 9696 | VFNMADD132PDZmb = 9681, |
| 9697 | VFNMADD132PDZmbk = 9682, |
| 9698 | VFNMADD132PDZmbkz = 9683, |
| 9699 | VFNMADD132PDZmk = 9684, |
| 9700 | VFNMADD132PDZmkz = 9685, |
| 9701 | VFNMADD132PDZr = 9686, |
| 9702 | VFNMADD132PDZrb = 9687, |
| 9703 | VFNMADD132PDZrbk = 9688, |
| 9704 | VFNMADD132PDZrbkz = 9689, |
| 9705 | VFNMADD132PDZrk = 9690, |
| 9706 | VFNMADD132PDZrkz = 9691, |
| 9707 | VFNMADD132PDm = 9692, |
| 9708 | VFNMADD132PDr = 9693, |
| 9709 | VFNMADD132PHZ128m = 9694, |
| 9710 | VFNMADD132PHZ128mb = 9695, |
| 9711 | VFNMADD132PHZ128mbk = 9696, |
| 9712 | VFNMADD132PHZ128mbkz = 9697, |
| 9713 | VFNMADD132PHZ128mk = 9698, |
| 9714 | VFNMADD132PHZ128mkz = 9699, |
| 9715 | VFNMADD132PHZ128r = 9700, |
| 9716 | VFNMADD132PHZ128rk = 9701, |
| 9717 | VFNMADD132PHZ128rkz = 9702, |
| 9718 | VFNMADD132PHZ256m = 9703, |
| 9719 | VFNMADD132PHZ256mb = 9704, |
| 9720 | VFNMADD132PHZ256mbk = 9705, |
| 9721 | VFNMADD132PHZ256mbkz = 9706, |
| 9722 | VFNMADD132PHZ256mk = 9707, |
| 9723 | VFNMADD132PHZ256mkz = 9708, |
| 9724 | VFNMADD132PHZ256r = 9709, |
| 9725 | VFNMADD132PHZ256rk = 9710, |
| 9726 | VFNMADD132PHZ256rkz = 9711, |
| 9727 | VFNMADD132PHZm = 9712, |
| 9728 | VFNMADD132PHZmb = 9713, |
| 9729 | VFNMADD132PHZmbk = 9714, |
| 9730 | VFNMADD132PHZmbkz = 9715, |
| 9731 | VFNMADD132PHZmk = 9716, |
| 9732 | VFNMADD132PHZmkz = 9717, |
| 9733 | VFNMADD132PHZr = 9718, |
| 9734 | VFNMADD132PHZrb = 9719, |
| 9735 | VFNMADD132PHZrbk = 9720, |
| 9736 | VFNMADD132PHZrbkz = 9721, |
| 9737 | VFNMADD132PHZrk = 9722, |
| 9738 | VFNMADD132PHZrkz = 9723, |
| 9739 | VFNMADD132PSYm = 9724, |
| 9740 | VFNMADD132PSYr = 9725, |
| 9741 | VFNMADD132PSZ128m = 9726, |
| 9742 | VFNMADD132PSZ128mb = 9727, |
| 9743 | VFNMADD132PSZ128mbk = 9728, |
| 9744 | VFNMADD132PSZ128mbkz = 9729, |
| 9745 | VFNMADD132PSZ128mk = 9730, |
| 9746 | VFNMADD132PSZ128mkz = 9731, |
| 9747 | VFNMADD132PSZ128r = 9732, |
| 9748 | VFNMADD132PSZ128rk = 9733, |
| 9749 | VFNMADD132PSZ128rkz = 9734, |
| 9750 | VFNMADD132PSZ256m = 9735, |
| 9751 | VFNMADD132PSZ256mb = 9736, |
| 9752 | VFNMADD132PSZ256mbk = 9737, |
| 9753 | VFNMADD132PSZ256mbkz = 9738, |
| 9754 | VFNMADD132PSZ256mk = 9739, |
| 9755 | VFNMADD132PSZ256mkz = 9740, |
| 9756 | VFNMADD132PSZ256r = 9741, |
| 9757 | VFNMADD132PSZ256rk = 9742, |
| 9758 | VFNMADD132PSZ256rkz = 9743, |
| 9759 | VFNMADD132PSZm = 9744, |
| 9760 | VFNMADD132PSZmb = 9745, |
| 9761 | VFNMADD132PSZmbk = 9746, |
| 9762 | VFNMADD132PSZmbkz = 9747, |
| 9763 | VFNMADD132PSZmk = 9748, |
| 9764 | VFNMADD132PSZmkz = 9749, |
| 9765 | VFNMADD132PSZr = 9750, |
| 9766 | VFNMADD132PSZrb = 9751, |
| 9767 | VFNMADD132PSZrbk = 9752, |
| 9768 | VFNMADD132PSZrbkz = 9753, |
| 9769 | VFNMADD132PSZrk = 9754, |
| 9770 | VFNMADD132PSZrkz = 9755, |
| 9771 | VFNMADD132PSm = 9756, |
| 9772 | VFNMADD132PSr = 9757, |
| 9773 | VFNMADD132SDZm = 9758, |
| 9774 | VFNMADD132SDZm_Int = 9759, |
| 9775 | VFNMADD132SDZm_Intk = 9760, |
| 9776 | VFNMADD132SDZm_Intkz = 9761, |
| 9777 | VFNMADD132SDZr = 9762, |
| 9778 | VFNMADD132SDZr_Int = 9763, |
| 9779 | VFNMADD132SDZr_Intk = 9764, |
| 9780 | VFNMADD132SDZr_Intkz = 9765, |
| 9781 | VFNMADD132SDZrb = 9766, |
| 9782 | VFNMADD132SDZrb_Int = 9767, |
| 9783 | VFNMADD132SDZrb_Intk = 9768, |
| 9784 | VFNMADD132SDZrb_Intkz = 9769, |
| 9785 | VFNMADD132SDm = 9770, |
| 9786 | VFNMADD132SDm_Int = 9771, |
| 9787 | VFNMADD132SDr = 9772, |
| 9788 | VFNMADD132SDr_Int = 9773, |
| 9789 | VFNMADD132SHZm = 9774, |
| 9790 | VFNMADD132SHZm_Int = 9775, |
| 9791 | VFNMADD132SHZm_Intk = 9776, |
| 9792 | VFNMADD132SHZm_Intkz = 9777, |
| 9793 | VFNMADD132SHZr = 9778, |
| 9794 | VFNMADD132SHZr_Int = 9779, |
| 9795 | VFNMADD132SHZr_Intk = 9780, |
| 9796 | VFNMADD132SHZr_Intkz = 9781, |
| 9797 | VFNMADD132SHZrb = 9782, |
| 9798 | VFNMADD132SHZrb_Int = 9783, |
| 9799 | VFNMADD132SHZrb_Intk = 9784, |
| 9800 | VFNMADD132SHZrb_Intkz = 9785, |
| 9801 | VFNMADD132SSZm = 9786, |
| 9802 | VFNMADD132SSZm_Int = 9787, |
| 9803 | VFNMADD132SSZm_Intk = 9788, |
| 9804 | VFNMADD132SSZm_Intkz = 9789, |
| 9805 | VFNMADD132SSZr = 9790, |
| 9806 | VFNMADD132SSZr_Int = 9791, |
| 9807 | VFNMADD132SSZr_Intk = 9792, |
| 9808 | VFNMADD132SSZr_Intkz = 9793, |
| 9809 | VFNMADD132SSZrb = 9794, |
| 9810 | VFNMADD132SSZrb_Int = 9795, |
| 9811 | VFNMADD132SSZrb_Intk = 9796, |
| 9812 | VFNMADD132SSZrb_Intkz = 9797, |
| 9813 | VFNMADD132SSm = 9798, |
| 9814 | VFNMADD132SSm_Int = 9799, |
| 9815 | VFNMADD132SSr = 9800, |
| 9816 | VFNMADD132SSr_Int = 9801, |
| 9817 | VFNMADD213PDYm = 9802, |
| 9818 | VFNMADD213PDYr = 9803, |
| 9819 | VFNMADD213PDZ128m = 9804, |
| 9820 | VFNMADD213PDZ128mb = 9805, |
| 9821 | VFNMADD213PDZ128mbk = 9806, |
| 9822 | VFNMADD213PDZ128mbkz = 9807, |
| 9823 | VFNMADD213PDZ128mk = 9808, |
| 9824 | VFNMADD213PDZ128mkz = 9809, |
| 9825 | VFNMADD213PDZ128r = 9810, |
| 9826 | VFNMADD213PDZ128rk = 9811, |
| 9827 | VFNMADD213PDZ128rkz = 9812, |
| 9828 | VFNMADD213PDZ256m = 9813, |
| 9829 | VFNMADD213PDZ256mb = 9814, |
| 9830 | VFNMADD213PDZ256mbk = 9815, |
| 9831 | VFNMADD213PDZ256mbkz = 9816, |
| 9832 | VFNMADD213PDZ256mk = 9817, |
| 9833 | VFNMADD213PDZ256mkz = 9818, |
| 9834 | VFNMADD213PDZ256r = 9819, |
| 9835 | VFNMADD213PDZ256rk = 9820, |
| 9836 | VFNMADD213PDZ256rkz = 9821, |
| 9837 | VFNMADD213PDZm = 9822, |
| 9838 | VFNMADD213PDZmb = 9823, |
| 9839 | VFNMADD213PDZmbk = 9824, |
| 9840 | VFNMADD213PDZmbkz = 9825, |
| 9841 | VFNMADD213PDZmk = 9826, |
| 9842 | VFNMADD213PDZmkz = 9827, |
| 9843 | VFNMADD213PDZr = 9828, |
| 9844 | VFNMADD213PDZrb = 9829, |
| 9845 | VFNMADD213PDZrbk = 9830, |
| 9846 | VFNMADD213PDZrbkz = 9831, |
| 9847 | VFNMADD213PDZrk = 9832, |
| 9848 | VFNMADD213PDZrkz = 9833, |
| 9849 | VFNMADD213PDm = 9834, |
| 9850 | VFNMADD213PDr = 9835, |
| 9851 | VFNMADD213PHZ128m = 9836, |
| 9852 | VFNMADD213PHZ128mb = 9837, |
| 9853 | VFNMADD213PHZ128mbk = 9838, |
| 9854 | VFNMADD213PHZ128mbkz = 9839, |
| 9855 | VFNMADD213PHZ128mk = 9840, |
| 9856 | VFNMADD213PHZ128mkz = 9841, |
| 9857 | VFNMADD213PHZ128r = 9842, |
| 9858 | VFNMADD213PHZ128rk = 9843, |
| 9859 | VFNMADD213PHZ128rkz = 9844, |
| 9860 | VFNMADD213PHZ256m = 9845, |
| 9861 | VFNMADD213PHZ256mb = 9846, |
| 9862 | VFNMADD213PHZ256mbk = 9847, |
| 9863 | VFNMADD213PHZ256mbkz = 9848, |
| 9864 | VFNMADD213PHZ256mk = 9849, |
| 9865 | VFNMADD213PHZ256mkz = 9850, |
| 9866 | VFNMADD213PHZ256r = 9851, |
| 9867 | VFNMADD213PHZ256rk = 9852, |
| 9868 | VFNMADD213PHZ256rkz = 9853, |
| 9869 | VFNMADD213PHZm = 9854, |
| 9870 | VFNMADD213PHZmb = 9855, |
| 9871 | VFNMADD213PHZmbk = 9856, |
| 9872 | VFNMADD213PHZmbkz = 9857, |
| 9873 | VFNMADD213PHZmk = 9858, |
| 9874 | VFNMADD213PHZmkz = 9859, |
| 9875 | VFNMADD213PHZr = 9860, |
| 9876 | VFNMADD213PHZrb = 9861, |
| 9877 | VFNMADD213PHZrbk = 9862, |
| 9878 | VFNMADD213PHZrbkz = 9863, |
| 9879 | VFNMADD213PHZrk = 9864, |
| 9880 | VFNMADD213PHZrkz = 9865, |
| 9881 | VFNMADD213PSYm = 9866, |
| 9882 | VFNMADD213PSYr = 9867, |
| 9883 | VFNMADD213PSZ128m = 9868, |
| 9884 | VFNMADD213PSZ128mb = 9869, |
| 9885 | VFNMADD213PSZ128mbk = 9870, |
| 9886 | VFNMADD213PSZ128mbkz = 9871, |
| 9887 | VFNMADD213PSZ128mk = 9872, |
| 9888 | VFNMADD213PSZ128mkz = 9873, |
| 9889 | VFNMADD213PSZ128r = 9874, |
| 9890 | VFNMADD213PSZ128rk = 9875, |
| 9891 | VFNMADD213PSZ128rkz = 9876, |
| 9892 | VFNMADD213PSZ256m = 9877, |
| 9893 | VFNMADD213PSZ256mb = 9878, |
| 9894 | VFNMADD213PSZ256mbk = 9879, |
| 9895 | VFNMADD213PSZ256mbkz = 9880, |
| 9896 | VFNMADD213PSZ256mk = 9881, |
| 9897 | VFNMADD213PSZ256mkz = 9882, |
| 9898 | VFNMADD213PSZ256r = 9883, |
| 9899 | VFNMADD213PSZ256rk = 9884, |
| 9900 | VFNMADD213PSZ256rkz = 9885, |
| 9901 | VFNMADD213PSZm = 9886, |
| 9902 | VFNMADD213PSZmb = 9887, |
| 9903 | VFNMADD213PSZmbk = 9888, |
| 9904 | VFNMADD213PSZmbkz = 9889, |
| 9905 | VFNMADD213PSZmk = 9890, |
| 9906 | VFNMADD213PSZmkz = 9891, |
| 9907 | VFNMADD213PSZr = 9892, |
| 9908 | VFNMADD213PSZrb = 9893, |
| 9909 | VFNMADD213PSZrbk = 9894, |
| 9910 | VFNMADD213PSZrbkz = 9895, |
| 9911 | VFNMADD213PSZrk = 9896, |
| 9912 | VFNMADD213PSZrkz = 9897, |
| 9913 | VFNMADD213PSm = 9898, |
| 9914 | VFNMADD213PSr = 9899, |
| 9915 | VFNMADD213SDZm = 9900, |
| 9916 | VFNMADD213SDZm_Int = 9901, |
| 9917 | VFNMADD213SDZm_Intk = 9902, |
| 9918 | VFNMADD213SDZm_Intkz = 9903, |
| 9919 | VFNMADD213SDZr = 9904, |
| 9920 | VFNMADD213SDZr_Int = 9905, |
| 9921 | VFNMADD213SDZr_Intk = 9906, |
| 9922 | VFNMADD213SDZr_Intkz = 9907, |
| 9923 | VFNMADD213SDZrb = 9908, |
| 9924 | VFNMADD213SDZrb_Int = 9909, |
| 9925 | VFNMADD213SDZrb_Intk = 9910, |
| 9926 | VFNMADD213SDZrb_Intkz = 9911, |
| 9927 | VFNMADD213SDm = 9912, |
| 9928 | VFNMADD213SDm_Int = 9913, |
| 9929 | VFNMADD213SDr = 9914, |
| 9930 | VFNMADD213SDr_Int = 9915, |
| 9931 | VFNMADD213SHZm = 9916, |
| 9932 | VFNMADD213SHZm_Int = 9917, |
| 9933 | VFNMADD213SHZm_Intk = 9918, |
| 9934 | VFNMADD213SHZm_Intkz = 9919, |
| 9935 | VFNMADD213SHZr = 9920, |
| 9936 | VFNMADD213SHZr_Int = 9921, |
| 9937 | VFNMADD213SHZr_Intk = 9922, |
| 9938 | VFNMADD213SHZr_Intkz = 9923, |
| 9939 | VFNMADD213SHZrb = 9924, |
| 9940 | VFNMADD213SHZrb_Int = 9925, |
| 9941 | VFNMADD213SHZrb_Intk = 9926, |
| 9942 | VFNMADD213SHZrb_Intkz = 9927, |
| 9943 | VFNMADD213SSZm = 9928, |
| 9944 | VFNMADD213SSZm_Int = 9929, |
| 9945 | VFNMADD213SSZm_Intk = 9930, |
| 9946 | VFNMADD213SSZm_Intkz = 9931, |
| 9947 | VFNMADD213SSZr = 9932, |
| 9948 | VFNMADD213SSZr_Int = 9933, |
| 9949 | VFNMADD213SSZr_Intk = 9934, |
| 9950 | VFNMADD213SSZr_Intkz = 9935, |
| 9951 | VFNMADD213SSZrb = 9936, |
| 9952 | VFNMADD213SSZrb_Int = 9937, |
| 9953 | VFNMADD213SSZrb_Intk = 9938, |
| 9954 | VFNMADD213SSZrb_Intkz = 9939, |
| 9955 | VFNMADD213SSm = 9940, |
| 9956 | VFNMADD213SSm_Int = 9941, |
| 9957 | VFNMADD213SSr = 9942, |
| 9958 | VFNMADD213SSr_Int = 9943, |
| 9959 | VFNMADD231PDYm = 9944, |
| 9960 | VFNMADD231PDYr = 9945, |
| 9961 | VFNMADD231PDZ128m = 9946, |
| 9962 | VFNMADD231PDZ128mb = 9947, |
| 9963 | VFNMADD231PDZ128mbk = 9948, |
| 9964 | VFNMADD231PDZ128mbkz = 9949, |
| 9965 | VFNMADD231PDZ128mk = 9950, |
| 9966 | VFNMADD231PDZ128mkz = 9951, |
| 9967 | VFNMADD231PDZ128r = 9952, |
| 9968 | VFNMADD231PDZ128rk = 9953, |
| 9969 | VFNMADD231PDZ128rkz = 9954, |
| 9970 | VFNMADD231PDZ256m = 9955, |
| 9971 | VFNMADD231PDZ256mb = 9956, |
| 9972 | VFNMADD231PDZ256mbk = 9957, |
| 9973 | VFNMADD231PDZ256mbkz = 9958, |
| 9974 | VFNMADD231PDZ256mk = 9959, |
| 9975 | VFNMADD231PDZ256mkz = 9960, |
| 9976 | VFNMADD231PDZ256r = 9961, |
| 9977 | VFNMADD231PDZ256rk = 9962, |
| 9978 | VFNMADD231PDZ256rkz = 9963, |
| 9979 | VFNMADD231PDZm = 9964, |
| 9980 | VFNMADD231PDZmb = 9965, |
| 9981 | VFNMADD231PDZmbk = 9966, |
| 9982 | VFNMADD231PDZmbkz = 9967, |
| 9983 | VFNMADD231PDZmk = 9968, |
| 9984 | VFNMADD231PDZmkz = 9969, |
| 9985 | VFNMADD231PDZr = 9970, |
| 9986 | VFNMADD231PDZrb = 9971, |
| 9987 | VFNMADD231PDZrbk = 9972, |
| 9988 | VFNMADD231PDZrbkz = 9973, |
| 9989 | VFNMADD231PDZrk = 9974, |
| 9990 | VFNMADD231PDZrkz = 9975, |
| 9991 | VFNMADD231PDm = 9976, |
| 9992 | VFNMADD231PDr = 9977, |
| 9993 | VFNMADD231PHZ128m = 9978, |
| 9994 | VFNMADD231PHZ128mb = 9979, |
| 9995 | VFNMADD231PHZ128mbk = 9980, |
| 9996 | VFNMADD231PHZ128mbkz = 9981, |
| 9997 | VFNMADD231PHZ128mk = 9982, |
| 9998 | VFNMADD231PHZ128mkz = 9983, |
| 9999 | VFNMADD231PHZ128r = 9984, |
| 10000 | VFNMADD231PHZ128rk = 9985, |
| 10001 | VFNMADD231PHZ128rkz = 9986, |
| 10002 | VFNMADD231PHZ256m = 9987, |
| 10003 | VFNMADD231PHZ256mb = 9988, |
| 10004 | VFNMADD231PHZ256mbk = 9989, |
| 10005 | VFNMADD231PHZ256mbkz = 9990, |
| 10006 | VFNMADD231PHZ256mk = 9991, |
| 10007 | VFNMADD231PHZ256mkz = 9992, |
| 10008 | VFNMADD231PHZ256r = 9993, |
| 10009 | VFNMADD231PHZ256rk = 9994, |
| 10010 | VFNMADD231PHZ256rkz = 9995, |
| 10011 | VFNMADD231PHZm = 9996, |
| 10012 | VFNMADD231PHZmb = 9997, |
| 10013 | VFNMADD231PHZmbk = 9998, |
| 10014 | VFNMADD231PHZmbkz = 9999, |
| 10015 | VFNMADD231PHZmk = 10000, |
| 10016 | VFNMADD231PHZmkz = 10001, |
| 10017 | VFNMADD231PHZr = 10002, |
| 10018 | VFNMADD231PHZrb = 10003, |
| 10019 | VFNMADD231PHZrbk = 10004, |
| 10020 | VFNMADD231PHZrbkz = 10005, |
| 10021 | VFNMADD231PHZrk = 10006, |
| 10022 | VFNMADD231PHZrkz = 10007, |
| 10023 | VFNMADD231PSYm = 10008, |
| 10024 | VFNMADD231PSYr = 10009, |
| 10025 | VFNMADD231PSZ128m = 10010, |
| 10026 | VFNMADD231PSZ128mb = 10011, |
| 10027 | VFNMADD231PSZ128mbk = 10012, |
| 10028 | VFNMADD231PSZ128mbkz = 10013, |
| 10029 | VFNMADD231PSZ128mk = 10014, |
| 10030 | VFNMADD231PSZ128mkz = 10015, |
| 10031 | VFNMADD231PSZ128r = 10016, |
| 10032 | VFNMADD231PSZ128rk = 10017, |
| 10033 | VFNMADD231PSZ128rkz = 10018, |
| 10034 | VFNMADD231PSZ256m = 10019, |
| 10035 | VFNMADD231PSZ256mb = 10020, |
| 10036 | VFNMADD231PSZ256mbk = 10021, |
| 10037 | VFNMADD231PSZ256mbkz = 10022, |
| 10038 | VFNMADD231PSZ256mk = 10023, |
| 10039 | VFNMADD231PSZ256mkz = 10024, |
| 10040 | VFNMADD231PSZ256r = 10025, |
| 10041 | VFNMADD231PSZ256rk = 10026, |
| 10042 | VFNMADD231PSZ256rkz = 10027, |
| 10043 | VFNMADD231PSZm = 10028, |
| 10044 | VFNMADD231PSZmb = 10029, |
| 10045 | VFNMADD231PSZmbk = 10030, |
| 10046 | VFNMADD231PSZmbkz = 10031, |
| 10047 | VFNMADD231PSZmk = 10032, |
| 10048 | VFNMADD231PSZmkz = 10033, |
| 10049 | VFNMADD231PSZr = 10034, |
| 10050 | VFNMADD231PSZrb = 10035, |
| 10051 | VFNMADD231PSZrbk = 10036, |
| 10052 | VFNMADD231PSZrbkz = 10037, |
| 10053 | VFNMADD231PSZrk = 10038, |
| 10054 | VFNMADD231PSZrkz = 10039, |
| 10055 | VFNMADD231PSm = 10040, |
| 10056 | VFNMADD231PSr = 10041, |
| 10057 | VFNMADD231SDZm = 10042, |
| 10058 | VFNMADD231SDZm_Int = 10043, |
| 10059 | VFNMADD231SDZm_Intk = 10044, |
| 10060 | VFNMADD231SDZm_Intkz = 10045, |
| 10061 | VFNMADD231SDZr = 10046, |
| 10062 | VFNMADD231SDZr_Int = 10047, |
| 10063 | VFNMADD231SDZr_Intk = 10048, |
| 10064 | VFNMADD231SDZr_Intkz = 10049, |
| 10065 | VFNMADD231SDZrb = 10050, |
| 10066 | VFNMADD231SDZrb_Int = 10051, |
| 10067 | VFNMADD231SDZrb_Intk = 10052, |
| 10068 | VFNMADD231SDZrb_Intkz = 10053, |
| 10069 | VFNMADD231SDm = 10054, |
| 10070 | VFNMADD231SDm_Int = 10055, |
| 10071 | VFNMADD231SDr = 10056, |
| 10072 | VFNMADD231SDr_Int = 10057, |
| 10073 | VFNMADD231SHZm = 10058, |
| 10074 | VFNMADD231SHZm_Int = 10059, |
| 10075 | VFNMADD231SHZm_Intk = 10060, |
| 10076 | VFNMADD231SHZm_Intkz = 10061, |
| 10077 | VFNMADD231SHZr = 10062, |
| 10078 | VFNMADD231SHZr_Int = 10063, |
| 10079 | VFNMADD231SHZr_Intk = 10064, |
| 10080 | VFNMADD231SHZr_Intkz = 10065, |
| 10081 | VFNMADD231SHZrb = 10066, |
| 10082 | VFNMADD231SHZrb_Int = 10067, |
| 10083 | VFNMADD231SHZrb_Intk = 10068, |
| 10084 | VFNMADD231SHZrb_Intkz = 10069, |
| 10085 | VFNMADD231SSZm = 10070, |
| 10086 | VFNMADD231SSZm_Int = 10071, |
| 10087 | VFNMADD231SSZm_Intk = 10072, |
| 10088 | VFNMADD231SSZm_Intkz = 10073, |
| 10089 | VFNMADD231SSZr = 10074, |
| 10090 | VFNMADD231SSZr_Int = 10075, |
| 10091 | VFNMADD231SSZr_Intk = 10076, |
| 10092 | VFNMADD231SSZr_Intkz = 10077, |
| 10093 | VFNMADD231SSZrb = 10078, |
| 10094 | VFNMADD231SSZrb_Int = 10079, |
| 10095 | VFNMADD231SSZrb_Intk = 10080, |
| 10096 | VFNMADD231SSZrb_Intkz = 10081, |
| 10097 | VFNMADD231SSm = 10082, |
| 10098 | VFNMADD231SSm_Int = 10083, |
| 10099 | VFNMADD231SSr = 10084, |
| 10100 | VFNMADD231SSr_Int = 10085, |
| 10101 | VFNMADDPD4Ymr = 10086, |
| 10102 | VFNMADDPD4Yrm = 10087, |
| 10103 | VFNMADDPD4Yrr = 10088, |
| 10104 | VFNMADDPD4Yrr_REV = 10089, |
| 10105 | VFNMADDPD4mr = 10090, |
| 10106 | VFNMADDPD4rm = 10091, |
| 10107 | VFNMADDPD4rr = 10092, |
| 10108 | VFNMADDPD4rr_REV = 10093, |
| 10109 | VFNMADDPS4Ymr = 10094, |
| 10110 | VFNMADDPS4Yrm = 10095, |
| 10111 | VFNMADDPS4Yrr = 10096, |
| 10112 | VFNMADDPS4Yrr_REV = 10097, |
| 10113 | VFNMADDPS4mr = 10098, |
| 10114 | VFNMADDPS4rm = 10099, |
| 10115 | VFNMADDPS4rr = 10100, |
| 10116 | VFNMADDPS4rr_REV = 10101, |
| 10117 | VFNMADDSD4mr = 10102, |
| 10118 | VFNMADDSD4mr_Int = 10103, |
| 10119 | VFNMADDSD4rm = 10104, |
| 10120 | VFNMADDSD4rm_Int = 10105, |
| 10121 | VFNMADDSD4rr = 10106, |
| 10122 | VFNMADDSD4rr_Int = 10107, |
| 10123 | VFNMADDSD4rr_Int_REV = 10108, |
| 10124 | VFNMADDSD4rr_REV = 10109, |
| 10125 | VFNMADDSS4mr = 10110, |
| 10126 | VFNMADDSS4mr_Int = 10111, |
| 10127 | VFNMADDSS4rm = 10112, |
| 10128 | VFNMADDSS4rm_Int = 10113, |
| 10129 | VFNMADDSS4rr = 10114, |
| 10130 | VFNMADDSS4rr_Int = 10115, |
| 10131 | VFNMADDSS4rr_Int_REV = 10116, |
| 10132 | VFNMADDSS4rr_REV = 10117, |
| 10133 | VFNMSUB132PDYm = 10118, |
| 10134 | VFNMSUB132PDYr = 10119, |
| 10135 | VFNMSUB132PDZ128m = 10120, |
| 10136 | VFNMSUB132PDZ128mb = 10121, |
| 10137 | VFNMSUB132PDZ128mbk = 10122, |
| 10138 | VFNMSUB132PDZ128mbkz = 10123, |
| 10139 | VFNMSUB132PDZ128mk = 10124, |
| 10140 | VFNMSUB132PDZ128mkz = 10125, |
| 10141 | VFNMSUB132PDZ128r = 10126, |
| 10142 | VFNMSUB132PDZ128rk = 10127, |
| 10143 | VFNMSUB132PDZ128rkz = 10128, |
| 10144 | VFNMSUB132PDZ256m = 10129, |
| 10145 | VFNMSUB132PDZ256mb = 10130, |
| 10146 | VFNMSUB132PDZ256mbk = 10131, |
| 10147 | VFNMSUB132PDZ256mbkz = 10132, |
| 10148 | VFNMSUB132PDZ256mk = 10133, |
| 10149 | VFNMSUB132PDZ256mkz = 10134, |
| 10150 | VFNMSUB132PDZ256r = 10135, |
| 10151 | VFNMSUB132PDZ256rk = 10136, |
| 10152 | VFNMSUB132PDZ256rkz = 10137, |
| 10153 | VFNMSUB132PDZm = 10138, |
| 10154 | VFNMSUB132PDZmb = 10139, |
| 10155 | VFNMSUB132PDZmbk = 10140, |
| 10156 | VFNMSUB132PDZmbkz = 10141, |
| 10157 | VFNMSUB132PDZmk = 10142, |
| 10158 | VFNMSUB132PDZmkz = 10143, |
| 10159 | VFNMSUB132PDZr = 10144, |
| 10160 | VFNMSUB132PDZrb = 10145, |
| 10161 | VFNMSUB132PDZrbk = 10146, |
| 10162 | VFNMSUB132PDZrbkz = 10147, |
| 10163 | VFNMSUB132PDZrk = 10148, |
| 10164 | VFNMSUB132PDZrkz = 10149, |
| 10165 | VFNMSUB132PDm = 10150, |
| 10166 | VFNMSUB132PDr = 10151, |
| 10167 | VFNMSUB132PHZ128m = 10152, |
| 10168 | VFNMSUB132PHZ128mb = 10153, |
| 10169 | VFNMSUB132PHZ128mbk = 10154, |
| 10170 | VFNMSUB132PHZ128mbkz = 10155, |
| 10171 | VFNMSUB132PHZ128mk = 10156, |
| 10172 | VFNMSUB132PHZ128mkz = 10157, |
| 10173 | VFNMSUB132PHZ128r = 10158, |
| 10174 | VFNMSUB132PHZ128rk = 10159, |
| 10175 | VFNMSUB132PHZ128rkz = 10160, |
| 10176 | VFNMSUB132PHZ256m = 10161, |
| 10177 | VFNMSUB132PHZ256mb = 10162, |
| 10178 | VFNMSUB132PHZ256mbk = 10163, |
| 10179 | VFNMSUB132PHZ256mbkz = 10164, |
| 10180 | VFNMSUB132PHZ256mk = 10165, |
| 10181 | VFNMSUB132PHZ256mkz = 10166, |
| 10182 | VFNMSUB132PHZ256r = 10167, |
| 10183 | VFNMSUB132PHZ256rk = 10168, |
| 10184 | VFNMSUB132PHZ256rkz = 10169, |
| 10185 | VFNMSUB132PHZm = 10170, |
| 10186 | VFNMSUB132PHZmb = 10171, |
| 10187 | VFNMSUB132PHZmbk = 10172, |
| 10188 | VFNMSUB132PHZmbkz = 10173, |
| 10189 | VFNMSUB132PHZmk = 10174, |
| 10190 | VFNMSUB132PHZmkz = 10175, |
| 10191 | VFNMSUB132PHZr = 10176, |
| 10192 | VFNMSUB132PHZrb = 10177, |
| 10193 | VFNMSUB132PHZrbk = 10178, |
| 10194 | VFNMSUB132PHZrbkz = 10179, |
| 10195 | VFNMSUB132PHZrk = 10180, |
| 10196 | VFNMSUB132PHZrkz = 10181, |
| 10197 | VFNMSUB132PSYm = 10182, |
| 10198 | VFNMSUB132PSYr = 10183, |
| 10199 | VFNMSUB132PSZ128m = 10184, |
| 10200 | VFNMSUB132PSZ128mb = 10185, |
| 10201 | VFNMSUB132PSZ128mbk = 10186, |
| 10202 | VFNMSUB132PSZ128mbkz = 10187, |
| 10203 | VFNMSUB132PSZ128mk = 10188, |
| 10204 | VFNMSUB132PSZ128mkz = 10189, |
| 10205 | VFNMSUB132PSZ128r = 10190, |
| 10206 | VFNMSUB132PSZ128rk = 10191, |
| 10207 | VFNMSUB132PSZ128rkz = 10192, |
| 10208 | VFNMSUB132PSZ256m = 10193, |
| 10209 | VFNMSUB132PSZ256mb = 10194, |
| 10210 | VFNMSUB132PSZ256mbk = 10195, |
| 10211 | VFNMSUB132PSZ256mbkz = 10196, |
| 10212 | VFNMSUB132PSZ256mk = 10197, |
| 10213 | VFNMSUB132PSZ256mkz = 10198, |
| 10214 | VFNMSUB132PSZ256r = 10199, |
| 10215 | VFNMSUB132PSZ256rk = 10200, |
| 10216 | VFNMSUB132PSZ256rkz = 10201, |
| 10217 | VFNMSUB132PSZm = 10202, |
| 10218 | VFNMSUB132PSZmb = 10203, |
| 10219 | VFNMSUB132PSZmbk = 10204, |
| 10220 | VFNMSUB132PSZmbkz = 10205, |
| 10221 | VFNMSUB132PSZmk = 10206, |
| 10222 | VFNMSUB132PSZmkz = 10207, |
| 10223 | VFNMSUB132PSZr = 10208, |
| 10224 | VFNMSUB132PSZrb = 10209, |
| 10225 | VFNMSUB132PSZrbk = 10210, |
| 10226 | VFNMSUB132PSZrbkz = 10211, |
| 10227 | VFNMSUB132PSZrk = 10212, |
| 10228 | VFNMSUB132PSZrkz = 10213, |
| 10229 | VFNMSUB132PSm = 10214, |
| 10230 | VFNMSUB132PSr = 10215, |
| 10231 | VFNMSUB132SDZm = 10216, |
| 10232 | VFNMSUB132SDZm_Int = 10217, |
| 10233 | VFNMSUB132SDZm_Intk = 10218, |
| 10234 | VFNMSUB132SDZm_Intkz = 10219, |
| 10235 | VFNMSUB132SDZr = 10220, |
| 10236 | VFNMSUB132SDZr_Int = 10221, |
| 10237 | VFNMSUB132SDZr_Intk = 10222, |
| 10238 | VFNMSUB132SDZr_Intkz = 10223, |
| 10239 | VFNMSUB132SDZrb = 10224, |
| 10240 | VFNMSUB132SDZrb_Int = 10225, |
| 10241 | VFNMSUB132SDZrb_Intk = 10226, |
| 10242 | VFNMSUB132SDZrb_Intkz = 10227, |
| 10243 | VFNMSUB132SDm = 10228, |
| 10244 | VFNMSUB132SDm_Int = 10229, |
| 10245 | VFNMSUB132SDr = 10230, |
| 10246 | VFNMSUB132SDr_Int = 10231, |
| 10247 | VFNMSUB132SHZm = 10232, |
| 10248 | VFNMSUB132SHZm_Int = 10233, |
| 10249 | VFNMSUB132SHZm_Intk = 10234, |
| 10250 | VFNMSUB132SHZm_Intkz = 10235, |
| 10251 | VFNMSUB132SHZr = 10236, |
| 10252 | VFNMSUB132SHZr_Int = 10237, |
| 10253 | VFNMSUB132SHZr_Intk = 10238, |
| 10254 | VFNMSUB132SHZr_Intkz = 10239, |
| 10255 | VFNMSUB132SHZrb = 10240, |
| 10256 | VFNMSUB132SHZrb_Int = 10241, |
| 10257 | VFNMSUB132SHZrb_Intk = 10242, |
| 10258 | VFNMSUB132SHZrb_Intkz = 10243, |
| 10259 | VFNMSUB132SSZm = 10244, |
| 10260 | VFNMSUB132SSZm_Int = 10245, |
| 10261 | VFNMSUB132SSZm_Intk = 10246, |
| 10262 | VFNMSUB132SSZm_Intkz = 10247, |
| 10263 | VFNMSUB132SSZr = 10248, |
| 10264 | VFNMSUB132SSZr_Int = 10249, |
| 10265 | VFNMSUB132SSZr_Intk = 10250, |
| 10266 | VFNMSUB132SSZr_Intkz = 10251, |
| 10267 | VFNMSUB132SSZrb = 10252, |
| 10268 | VFNMSUB132SSZrb_Int = 10253, |
| 10269 | VFNMSUB132SSZrb_Intk = 10254, |
| 10270 | VFNMSUB132SSZrb_Intkz = 10255, |
| 10271 | VFNMSUB132SSm = 10256, |
| 10272 | VFNMSUB132SSm_Int = 10257, |
| 10273 | VFNMSUB132SSr = 10258, |
| 10274 | VFNMSUB132SSr_Int = 10259, |
| 10275 | VFNMSUB213PDYm = 10260, |
| 10276 | VFNMSUB213PDYr = 10261, |
| 10277 | VFNMSUB213PDZ128m = 10262, |
| 10278 | VFNMSUB213PDZ128mb = 10263, |
| 10279 | VFNMSUB213PDZ128mbk = 10264, |
| 10280 | VFNMSUB213PDZ128mbkz = 10265, |
| 10281 | VFNMSUB213PDZ128mk = 10266, |
| 10282 | VFNMSUB213PDZ128mkz = 10267, |
| 10283 | VFNMSUB213PDZ128r = 10268, |
| 10284 | VFNMSUB213PDZ128rk = 10269, |
| 10285 | VFNMSUB213PDZ128rkz = 10270, |
| 10286 | VFNMSUB213PDZ256m = 10271, |
| 10287 | VFNMSUB213PDZ256mb = 10272, |
| 10288 | VFNMSUB213PDZ256mbk = 10273, |
| 10289 | VFNMSUB213PDZ256mbkz = 10274, |
| 10290 | VFNMSUB213PDZ256mk = 10275, |
| 10291 | VFNMSUB213PDZ256mkz = 10276, |
| 10292 | VFNMSUB213PDZ256r = 10277, |
| 10293 | VFNMSUB213PDZ256rk = 10278, |
| 10294 | VFNMSUB213PDZ256rkz = 10279, |
| 10295 | VFNMSUB213PDZm = 10280, |
| 10296 | VFNMSUB213PDZmb = 10281, |
| 10297 | VFNMSUB213PDZmbk = 10282, |
| 10298 | VFNMSUB213PDZmbkz = 10283, |
| 10299 | VFNMSUB213PDZmk = 10284, |
| 10300 | VFNMSUB213PDZmkz = 10285, |
| 10301 | VFNMSUB213PDZr = 10286, |
| 10302 | VFNMSUB213PDZrb = 10287, |
| 10303 | VFNMSUB213PDZrbk = 10288, |
| 10304 | VFNMSUB213PDZrbkz = 10289, |
| 10305 | VFNMSUB213PDZrk = 10290, |
| 10306 | VFNMSUB213PDZrkz = 10291, |
| 10307 | VFNMSUB213PDm = 10292, |
| 10308 | VFNMSUB213PDr = 10293, |
| 10309 | VFNMSUB213PHZ128m = 10294, |
| 10310 | VFNMSUB213PHZ128mb = 10295, |
| 10311 | VFNMSUB213PHZ128mbk = 10296, |
| 10312 | VFNMSUB213PHZ128mbkz = 10297, |
| 10313 | VFNMSUB213PHZ128mk = 10298, |
| 10314 | VFNMSUB213PHZ128mkz = 10299, |
| 10315 | VFNMSUB213PHZ128r = 10300, |
| 10316 | VFNMSUB213PHZ128rk = 10301, |
| 10317 | VFNMSUB213PHZ128rkz = 10302, |
| 10318 | VFNMSUB213PHZ256m = 10303, |
| 10319 | VFNMSUB213PHZ256mb = 10304, |
| 10320 | VFNMSUB213PHZ256mbk = 10305, |
| 10321 | VFNMSUB213PHZ256mbkz = 10306, |
| 10322 | VFNMSUB213PHZ256mk = 10307, |
| 10323 | VFNMSUB213PHZ256mkz = 10308, |
| 10324 | VFNMSUB213PHZ256r = 10309, |
| 10325 | VFNMSUB213PHZ256rk = 10310, |
| 10326 | VFNMSUB213PHZ256rkz = 10311, |
| 10327 | VFNMSUB213PHZm = 10312, |
| 10328 | VFNMSUB213PHZmb = 10313, |
| 10329 | VFNMSUB213PHZmbk = 10314, |
| 10330 | VFNMSUB213PHZmbkz = 10315, |
| 10331 | VFNMSUB213PHZmk = 10316, |
| 10332 | VFNMSUB213PHZmkz = 10317, |
| 10333 | VFNMSUB213PHZr = 10318, |
| 10334 | VFNMSUB213PHZrb = 10319, |
| 10335 | VFNMSUB213PHZrbk = 10320, |
| 10336 | VFNMSUB213PHZrbkz = 10321, |
| 10337 | VFNMSUB213PHZrk = 10322, |
| 10338 | VFNMSUB213PHZrkz = 10323, |
| 10339 | VFNMSUB213PSYm = 10324, |
| 10340 | VFNMSUB213PSYr = 10325, |
| 10341 | VFNMSUB213PSZ128m = 10326, |
| 10342 | VFNMSUB213PSZ128mb = 10327, |
| 10343 | VFNMSUB213PSZ128mbk = 10328, |
| 10344 | VFNMSUB213PSZ128mbkz = 10329, |
| 10345 | VFNMSUB213PSZ128mk = 10330, |
| 10346 | VFNMSUB213PSZ128mkz = 10331, |
| 10347 | VFNMSUB213PSZ128r = 10332, |
| 10348 | VFNMSUB213PSZ128rk = 10333, |
| 10349 | VFNMSUB213PSZ128rkz = 10334, |
| 10350 | VFNMSUB213PSZ256m = 10335, |
| 10351 | VFNMSUB213PSZ256mb = 10336, |
| 10352 | VFNMSUB213PSZ256mbk = 10337, |
| 10353 | VFNMSUB213PSZ256mbkz = 10338, |
| 10354 | VFNMSUB213PSZ256mk = 10339, |
| 10355 | VFNMSUB213PSZ256mkz = 10340, |
| 10356 | VFNMSUB213PSZ256r = 10341, |
| 10357 | VFNMSUB213PSZ256rk = 10342, |
| 10358 | VFNMSUB213PSZ256rkz = 10343, |
| 10359 | VFNMSUB213PSZm = 10344, |
| 10360 | VFNMSUB213PSZmb = 10345, |
| 10361 | VFNMSUB213PSZmbk = 10346, |
| 10362 | VFNMSUB213PSZmbkz = 10347, |
| 10363 | VFNMSUB213PSZmk = 10348, |
| 10364 | VFNMSUB213PSZmkz = 10349, |
| 10365 | VFNMSUB213PSZr = 10350, |
| 10366 | VFNMSUB213PSZrb = 10351, |
| 10367 | VFNMSUB213PSZrbk = 10352, |
| 10368 | VFNMSUB213PSZrbkz = 10353, |
| 10369 | VFNMSUB213PSZrk = 10354, |
| 10370 | VFNMSUB213PSZrkz = 10355, |
| 10371 | VFNMSUB213PSm = 10356, |
| 10372 | VFNMSUB213PSr = 10357, |
| 10373 | VFNMSUB213SDZm = 10358, |
| 10374 | VFNMSUB213SDZm_Int = 10359, |
| 10375 | VFNMSUB213SDZm_Intk = 10360, |
| 10376 | VFNMSUB213SDZm_Intkz = 10361, |
| 10377 | VFNMSUB213SDZr = 10362, |
| 10378 | VFNMSUB213SDZr_Int = 10363, |
| 10379 | VFNMSUB213SDZr_Intk = 10364, |
| 10380 | VFNMSUB213SDZr_Intkz = 10365, |
| 10381 | VFNMSUB213SDZrb = 10366, |
| 10382 | VFNMSUB213SDZrb_Int = 10367, |
| 10383 | VFNMSUB213SDZrb_Intk = 10368, |
| 10384 | VFNMSUB213SDZrb_Intkz = 10369, |
| 10385 | VFNMSUB213SDm = 10370, |
| 10386 | VFNMSUB213SDm_Int = 10371, |
| 10387 | VFNMSUB213SDr = 10372, |
| 10388 | VFNMSUB213SDr_Int = 10373, |
| 10389 | VFNMSUB213SHZm = 10374, |
| 10390 | VFNMSUB213SHZm_Int = 10375, |
| 10391 | VFNMSUB213SHZm_Intk = 10376, |
| 10392 | VFNMSUB213SHZm_Intkz = 10377, |
| 10393 | VFNMSUB213SHZr = 10378, |
| 10394 | VFNMSUB213SHZr_Int = 10379, |
| 10395 | VFNMSUB213SHZr_Intk = 10380, |
| 10396 | VFNMSUB213SHZr_Intkz = 10381, |
| 10397 | VFNMSUB213SHZrb = 10382, |
| 10398 | VFNMSUB213SHZrb_Int = 10383, |
| 10399 | VFNMSUB213SHZrb_Intk = 10384, |
| 10400 | VFNMSUB213SHZrb_Intkz = 10385, |
| 10401 | VFNMSUB213SSZm = 10386, |
| 10402 | VFNMSUB213SSZm_Int = 10387, |
| 10403 | VFNMSUB213SSZm_Intk = 10388, |
| 10404 | VFNMSUB213SSZm_Intkz = 10389, |
| 10405 | VFNMSUB213SSZr = 10390, |
| 10406 | VFNMSUB213SSZr_Int = 10391, |
| 10407 | VFNMSUB213SSZr_Intk = 10392, |
| 10408 | VFNMSUB213SSZr_Intkz = 10393, |
| 10409 | VFNMSUB213SSZrb = 10394, |
| 10410 | VFNMSUB213SSZrb_Int = 10395, |
| 10411 | VFNMSUB213SSZrb_Intk = 10396, |
| 10412 | VFNMSUB213SSZrb_Intkz = 10397, |
| 10413 | VFNMSUB213SSm = 10398, |
| 10414 | VFNMSUB213SSm_Int = 10399, |
| 10415 | VFNMSUB213SSr = 10400, |
| 10416 | VFNMSUB213SSr_Int = 10401, |
| 10417 | VFNMSUB231PDYm = 10402, |
| 10418 | VFNMSUB231PDYr = 10403, |
| 10419 | VFNMSUB231PDZ128m = 10404, |
| 10420 | VFNMSUB231PDZ128mb = 10405, |
| 10421 | VFNMSUB231PDZ128mbk = 10406, |
| 10422 | VFNMSUB231PDZ128mbkz = 10407, |
| 10423 | VFNMSUB231PDZ128mk = 10408, |
| 10424 | VFNMSUB231PDZ128mkz = 10409, |
| 10425 | VFNMSUB231PDZ128r = 10410, |
| 10426 | VFNMSUB231PDZ128rk = 10411, |
| 10427 | VFNMSUB231PDZ128rkz = 10412, |
| 10428 | VFNMSUB231PDZ256m = 10413, |
| 10429 | VFNMSUB231PDZ256mb = 10414, |
| 10430 | VFNMSUB231PDZ256mbk = 10415, |
| 10431 | VFNMSUB231PDZ256mbkz = 10416, |
| 10432 | VFNMSUB231PDZ256mk = 10417, |
| 10433 | VFNMSUB231PDZ256mkz = 10418, |
| 10434 | VFNMSUB231PDZ256r = 10419, |
| 10435 | VFNMSUB231PDZ256rk = 10420, |
| 10436 | VFNMSUB231PDZ256rkz = 10421, |
| 10437 | VFNMSUB231PDZm = 10422, |
| 10438 | VFNMSUB231PDZmb = 10423, |
| 10439 | VFNMSUB231PDZmbk = 10424, |
| 10440 | VFNMSUB231PDZmbkz = 10425, |
| 10441 | VFNMSUB231PDZmk = 10426, |
| 10442 | VFNMSUB231PDZmkz = 10427, |
| 10443 | VFNMSUB231PDZr = 10428, |
| 10444 | VFNMSUB231PDZrb = 10429, |
| 10445 | VFNMSUB231PDZrbk = 10430, |
| 10446 | VFNMSUB231PDZrbkz = 10431, |
| 10447 | VFNMSUB231PDZrk = 10432, |
| 10448 | VFNMSUB231PDZrkz = 10433, |
| 10449 | VFNMSUB231PDm = 10434, |
| 10450 | VFNMSUB231PDr = 10435, |
| 10451 | VFNMSUB231PHZ128m = 10436, |
| 10452 | VFNMSUB231PHZ128mb = 10437, |
| 10453 | VFNMSUB231PHZ128mbk = 10438, |
| 10454 | VFNMSUB231PHZ128mbkz = 10439, |
| 10455 | VFNMSUB231PHZ128mk = 10440, |
| 10456 | VFNMSUB231PHZ128mkz = 10441, |
| 10457 | VFNMSUB231PHZ128r = 10442, |
| 10458 | VFNMSUB231PHZ128rk = 10443, |
| 10459 | VFNMSUB231PHZ128rkz = 10444, |
| 10460 | VFNMSUB231PHZ256m = 10445, |
| 10461 | VFNMSUB231PHZ256mb = 10446, |
| 10462 | VFNMSUB231PHZ256mbk = 10447, |
| 10463 | VFNMSUB231PHZ256mbkz = 10448, |
| 10464 | VFNMSUB231PHZ256mk = 10449, |
| 10465 | VFNMSUB231PHZ256mkz = 10450, |
| 10466 | VFNMSUB231PHZ256r = 10451, |
| 10467 | VFNMSUB231PHZ256rk = 10452, |
| 10468 | VFNMSUB231PHZ256rkz = 10453, |
| 10469 | VFNMSUB231PHZm = 10454, |
| 10470 | VFNMSUB231PHZmb = 10455, |
| 10471 | VFNMSUB231PHZmbk = 10456, |
| 10472 | VFNMSUB231PHZmbkz = 10457, |
| 10473 | VFNMSUB231PHZmk = 10458, |
| 10474 | VFNMSUB231PHZmkz = 10459, |
| 10475 | VFNMSUB231PHZr = 10460, |
| 10476 | VFNMSUB231PHZrb = 10461, |
| 10477 | VFNMSUB231PHZrbk = 10462, |
| 10478 | VFNMSUB231PHZrbkz = 10463, |
| 10479 | VFNMSUB231PHZrk = 10464, |
| 10480 | VFNMSUB231PHZrkz = 10465, |
| 10481 | VFNMSUB231PSYm = 10466, |
| 10482 | VFNMSUB231PSYr = 10467, |
| 10483 | VFNMSUB231PSZ128m = 10468, |
| 10484 | VFNMSUB231PSZ128mb = 10469, |
| 10485 | VFNMSUB231PSZ128mbk = 10470, |
| 10486 | VFNMSUB231PSZ128mbkz = 10471, |
| 10487 | VFNMSUB231PSZ128mk = 10472, |
| 10488 | VFNMSUB231PSZ128mkz = 10473, |
| 10489 | VFNMSUB231PSZ128r = 10474, |
| 10490 | VFNMSUB231PSZ128rk = 10475, |
| 10491 | VFNMSUB231PSZ128rkz = 10476, |
| 10492 | VFNMSUB231PSZ256m = 10477, |
| 10493 | VFNMSUB231PSZ256mb = 10478, |
| 10494 | VFNMSUB231PSZ256mbk = 10479, |
| 10495 | VFNMSUB231PSZ256mbkz = 10480, |
| 10496 | VFNMSUB231PSZ256mk = 10481, |
| 10497 | VFNMSUB231PSZ256mkz = 10482, |
| 10498 | VFNMSUB231PSZ256r = 10483, |
| 10499 | VFNMSUB231PSZ256rk = 10484, |
| 10500 | VFNMSUB231PSZ256rkz = 10485, |
| 10501 | VFNMSUB231PSZm = 10486, |
| 10502 | VFNMSUB231PSZmb = 10487, |
| 10503 | VFNMSUB231PSZmbk = 10488, |
| 10504 | VFNMSUB231PSZmbkz = 10489, |
| 10505 | VFNMSUB231PSZmk = 10490, |
| 10506 | VFNMSUB231PSZmkz = 10491, |
| 10507 | VFNMSUB231PSZr = 10492, |
| 10508 | VFNMSUB231PSZrb = 10493, |
| 10509 | VFNMSUB231PSZrbk = 10494, |
| 10510 | VFNMSUB231PSZrbkz = 10495, |
| 10511 | VFNMSUB231PSZrk = 10496, |
| 10512 | VFNMSUB231PSZrkz = 10497, |
| 10513 | VFNMSUB231PSm = 10498, |
| 10514 | VFNMSUB231PSr = 10499, |
| 10515 | VFNMSUB231SDZm = 10500, |
| 10516 | VFNMSUB231SDZm_Int = 10501, |
| 10517 | VFNMSUB231SDZm_Intk = 10502, |
| 10518 | VFNMSUB231SDZm_Intkz = 10503, |
| 10519 | VFNMSUB231SDZr = 10504, |
| 10520 | VFNMSUB231SDZr_Int = 10505, |
| 10521 | VFNMSUB231SDZr_Intk = 10506, |
| 10522 | VFNMSUB231SDZr_Intkz = 10507, |
| 10523 | VFNMSUB231SDZrb = 10508, |
| 10524 | VFNMSUB231SDZrb_Int = 10509, |
| 10525 | VFNMSUB231SDZrb_Intk = 10510, |
| 10526 | VFNMSUB231SDZrb_Intkz = 10511, |
| 10527 | VFNMSUB231SDm = 10512, |
| 10528 | VFNMSUB231SDm_Int = 10513, |
| 10529 | VFNMSUB231SDr = 10514, |
| 10530 | VFNMSUB231SDr_Int = 10515, |
| 10531 | VFNMSUB231SHZm = 10516, |
| 10532 | VFNMSUB231SHZm_Int = 10517, |
| 10533 | VFNMSUB231SHZm_Intk = 10518, |
| 10534 | VFNMSUB231SHZm_Intkz = 10519, |
| 10535 | VFNMSUB231SHZr = 10520, |
| 10536 | VFNMSUB231SHZr_Int = 10521, |
| 10537 | VFNMSUB231SHZr_Intk = 10522, |
| 10538 | VFNMSUB231SHZr_Intkz = 10523, |
| 10539 | VFNMSUB231SHZrb = 10524, |
| 10540 | VFNMSUB231SHZrb_Int = 10525, |
| 10541 | VFNMSUB231SHZrb_Intk = 10526, |
| 10542 | VFNMSUB231SHZrb_Intkz = 10527, |
| 10543 | VFNMSUB231SSZm = 10528, |
| 10544 | VFNMSUB231SSZm_Int = 10529, |
| 10545 | VFNMSUB231SSZm_Intk = 10530, |
| 10546 | VFNMSUB231SSZm_Intkz = 10531, |
| 10547 | VFNMSUB231SSZr = 10532, |
| 10548 | VFNMSUB231SSZr_Int = 10533, |
| 10549 | VFNMSUB231SSZr_Intk = 10534, |
| 10550 | VFNMSUB231SSZr_Intkz = 10535, |
| 10551 | VFNMSUB231SSZrb = 10536, |
| 10552 | VFNMSUB231SSZrb_Int = 10537, |
| 10553 | VFNMSUB231SSZrb_Intk = 10538, |
| 10554 | VFNMSUB231SSZrb_Intkz = 10539, |
| 10555 | VFNMSUB231SSm = 10540, |
| 10556 | VFNMSUB231SSm_Int = 10541, |
| 10557 | VFNMSUB231SSr = 10542, |
| 10558 | VFNMSUB231SSr_Int = 10543, |
| 10559 | VFNMSUBPD4Ymr = 10544, |
| 10560 | VFNMSUBPD4Yrm = 10545, |
| 10561 | VFNMSUBPD4Yrr = 10546, |
| 10562 | VFNMSUBPD4Yrr_REV = 10547, |
| 10563 | VFNMSUBPD4mr = 10548, |
| 10564 | VFNMSUBPD4rm = 10549, |
| 10565 | VFNMSUBPD4rr = 10550, |
| 10566 | VFNMSUBPD4rr_REV = 10551, |
| 10567 | VFNMSUBPS4Ymr = 10552, |
| 10568 | VFNMSUBPS4Yrm = 10553, |
| 10569 | VFNMSUBPS4Yrr = 10554, |
| 10570 | VFNMSUBPS4Yrr_REV = 10555, |
| 10571 | VFNMSUBPS4mr = 10556, |
| 10572 | VFNMSUBPS4rm = 10557, |
| 10573 | VFNMSUBPS4rr = 10558, |
| 10574 | VFNMSUBPS4rr_REV = 10559, |
| 10575 | VFNMSUBSD4mr = 10560, |
| 10576 | VFNMSUBSD4mr_Int = 10561, |
| 10577 | VFNMSUBSD4rm = 10562, |
| 10578 | VFNMSUBSD4rm_Int = 10563, |
| 10579 | VFNMSUBSD4rr = 10564, |
| 10580 | VFNMSUBSD4rr_Int = 10565, |
| 10581 | VFNMSUBSD4rr_Int_REV = 10566, |
| 10582 | VFNMSUBSD4rr_REV = 10567, |
| 10583 | VFNMSUBSS4mr = 10568, |
| 10584 | VFNMSUBSS4mr_Int = 10569, |
| 10585 | VFNMSUBSS4rm = 10570, |
| 10586 | VFNMSUBSS4rm_Int = 10571, |
| 10587 | VFNMSUBSS4rr = 10572, |
| 10588 | VFNMSUBSS4rr_Int = 10573, |
| 10589 | VFNMSUBSS4rr_Int_REV = 10574, |
| 10590 | VFNMSUBSS4rr_REV = 10575, |
| 10591 | VFPCLASSPDZ128rm = 10576, |
| 10592 | VFPCLASSPDZ128rmb = 10577, |
| 10593 | VFPCLASSPDZ128rmbk = 10578, |
| 10594 | VFPCLASSPDZ128rmk = 10579, |
| 10595 | VFPCLASSPDZ128rr = 10580, |
| 10596 | VFPCLASSPDZ128rrk = 10581, |
| 10597 | VFPCLASSPDZ256rm = 10582, |
| 10598 | VFPCLASSPDZ256rmb = 10583, |
| 10599 | VFPCLASSPDZ256rmbk = 10584, |
| 10600 | VFPCLASSPDZ256rmk = 10585, |
| 10601 | VFPCLASSPDZ256rr = 10586, |
| 10602 | VFPCLASSPDZ256rrk = 10587, |
| 10603 | VFPCLASSPDZrm = 10588, |
| 10604 | VFPCLASSPDZrmb = 10589, |
| 10605 | VFPCLASSPDZrmbk = 10590, |
| 10606 | VFPCLASSPDZrmk = 10591, |
| 10607 | VFPCLASSPDZrr = 10592, |
| 10608 | VFPCLASSPDZrrk = 10593, |
| 10609 | VFPCLASSPHZ128rm = 10594, |
| 10610 | VFPCLASSPHZ128rmb = 10595, |
| 10611 | VFPCLASSPHZ128rmbk = 10596, |
| 10612 | VFPCLASSPHZ128rmk = 10597, |
| 10613 | VFPCLASSPHZ128rr = 10598, |
| 10614 | VFPCLASSPHZ128rrk = 10599, |
| 10615 | VFPCLASSPHZ256rm = 10600, |
| 10616 | VFPCLASSPHZ256rmb = 10601, |
| 10617 | VFPCLASSPHZ256rmbk = 10602, |
| 10618 | VFPCLASSPHZ256rmk = 10603, |
| 10619 | VFPCLASSPHZ256rr = 10604, |
| 10620 | VFPCLASSPHZ256rrk = 10605, |
| 10621 | VFPCLASSPHZrm = 10606, |
| 10622 | VFPCLASSPHZrmb = 10607, |
| 10623 | VFPCLASSPHZrmbk = 10608, |
| 10624 | VFPCLASSPHZrmk = 10609, |
| 10625 | VFPCLASSPHZrr = 10610, |
| 10626 | VFPCLASSPHZrrk = 10611, |
| 10627 | VFPCLASSPSZ128rm = 10612, |
| 10628 | VFPCLASSPSZ128rmb = 10613, |
| 10629 | VFPCLASSPSZ128rmbk = 10614, |
| 10630 | VFPCLASSPSZ128rmk = 10615, |
| 10631 | VFPCLASSPSZ128rr = 10616, |
| 10632 | VFPCLASSPSZ128rrk = 10617, |
| 10633 | VFPCLASSPSZ256rm = 10618, |
| 10634 | VFPCLASSPSZ256rmb = 10619, |
| 10635 | VFPCLASSPSZ256rmbk = 10620, |
| 10636 | VFPCLASSPSZ256rmk = 10621, |
| 10637 | VFPCLASSPSZ256rr = 10622, |
| 10638 | VFPCLASSPSZ256rrk = 10623, |
| 10639 | VFPCLASSPSZrm = 10624, |
| 10640 | VFPCLASSPSZrmb = 10625, |
| 10641 | VFPCLASSPSZrmbk = 10626, |
| 10642 | VFPCLASSPSZrmk = 10627, |
| 10643 | VFPCLASSPSZrr = 10628, |
| 10644 | VFPCLASSPSZrrk = 10629, |
| 10645 | VFPCLASSSDZrm = 10630, |
| 10646 | VFPCLASSSDZrmk = 10631, |
| 10647 | VFPCLASSSDZrr = 10632, |
| 10648 | VFPCLASSSDZrrk = 10633, |
| 10649 | VFPCLASSSHZrm = 10634, |
| 10650 | VFPCLASSSHZrmk = 10635, |
| 10651 | VFPCLASSSHZrr = 10636, |
| 10652 | VFPCLASSSHZrrk = 10637, |
| 10653 | VFPCLASSSSZrm = 10638, |
| 10654 | VFPCLASSSSZrmk = 10639, |
| 10655 | VFPCLASSSSZrr = 10640, |
| 10656 | VFPCLASSSSZrrk = 10641, |
| 10657 | VFRCZPDYrm = 10642, |
| 10658 | VFRCZPDYrr = 10643, |
| 10659 | VFRCZPDrm = 10644, |
| 10660 | VFRCZPDrr = 10645, |
| 10661 | VFRCZPSYrm = 10646, |
| 10662 | VFRCZPSYrr = 10647, |
| 10663 | VFRCZPSrm = 10648, |
| 10664 | VFRCZPSrr = 10649, |
| 10665 | VFRCZSDrm = 10650, |
| 10666 | VFRCZSDrr = 10651, |
| 10667 | VFRCZSSrm = 10652, |
| 10668 | VFRCZSSrr = 10653, |
| 10669 | VGATHERDPDYrm = 10654, |
| 10670 | VGATHERDPDZ128rm = 10655, |
| 10671 | VGATHERDPDZ256rm = 10656, |
| 10672 | VGATHERDPDZrm = 10657, |
| 10673 | VGATHERDPDrm = 10658, |
| 10674 | VGATHERDPSYrm = 10659, |
| 10675 | VGATHERDPSZ128rm = 10660, |
| 10676 | VGATHERDPSZ256rm = 10661, |
| 10677 | VGATHERDPSZrm = 10662, |
| 10678 | VGATHERDPSrm = 10663, |
| 10679 | VGATHERPF0DPDm = 10664, |
| 10680 | VGATHERPF0DPSm = 10665, |
| 10681 | VGATHERPF0QPDm = 10666, |
| 10682 | VGATHERPF0QPSm = 10667, |
| 10683 | VGATHERPF1DPDm = 10668, |
| 10684 | VGATHERPF1DPSm = 10669, |
| 10685 | VGATHERPF1QPDm = 10670, |
| 10686 | VGATHERPF1QPSm = 10671, |
| 10687 | VGATHERQPDYrm = 10672, |
| 10688 | VGATHERQPDZ128rm = 10673, |
| 10689 | VGATHERQPDZ256rm = 10674, |
| 10690 | VGATHERQPDZrm = 10675, |
| 10691 | VGATHERQPDrm = 10676, |
| 10692 | VGATHERQPSYrm = 10677, |
| 10693 | VGATHERQPSZ128rm = 10678, |
| 10694 | VGATHERQPSZ256rm = 10679, |
| 10695 | VGATHERQPSZrm = 10680, |
| 10696 | VGATHERQPSrm = 10681, |
| 10697 | VGETEXPPDZ128m = 10682, |
| 10698 | VGETEXPPDZ128mb = 10683, |
| 10699 | VGETEXPPDZ128mbk = 10684, |
| 10700 | VGETEXPPDZ128mbkz = 10685, |
| 10701 | VGETEXPPDZ128mk = 10686, |
| 10702 | VGETEXPPDZ128mkz = 10687, |
| 10703 | VGETEXPPDZ128r = 10688, |
| 10704 | VGETEXPPDZ128rk = 10689, |
| 10705 | VGETEXPPDZ128rkz = 10690, |
| 10706 | VGETEXPPDZ256m = 10691, |
| 10707 | VGETEXPPDZ256mb = 10692, |
| 10708 | VGETEXPPDZ256mbk = 10693, |
| 10709 | VGETEXPPDZ256mbkz = 10694, |
| 10710 | VGETEXPPDZ256mk = 10695, |
| 10711 | VGETEXPPDZ256mkz = 10696, |
| 10712 | VGETEXPPDZ256r = 10697, |
| 10713 | VGETEXPPDZ256rk = 10698, |
| 10714 | VGETEXPPDZ256rkz = 10699, |
| 10715 | VGETEXPPDZm = 10700, |
| 10716 | VGETEXPPDZmb = 10701, |
| 10717 | VGETEXPPDZmbk = 10702, |
| 10718 | VGETEXPPDZmbkz = 10703, |
| 10719 | VGETEXPPDZmk = 10704, |
| 10720 | VGETEXPPDZmkz = 10705, |
| 10721 | VGETEXPPDZr = 10706, |
| 10722 | VGETEXPPDZrb = 10707, |
| 10723 | VGETEXPPDZrbk = 10708, |
| 10724 | VGETEXPPDZrbkz = 10709, |
| 10725 | VGETEXPPDZrk = 10710, |
| 10726 | VGETEXPPDZrkz = 10711, |
| 10727 | VGETEXPPHZ128m = 10712, |
| 10728 | VGETEXPPHZ128mb = 10713, |
| 10729 | VGETEXPPHZ128mbk = 10714, |
| 10730 | VGETEXPPHZ128mbkz = 10715, |
| 10731 | VGETEXPPHZ128mk = 10716, |
| 10732 | VGETEXPPHZ128mkz = 10717, |
| 10733 | VGETEXPPHZ128r = 10718, |
| 10734 | VGETEXPPHZ128rk = 10719, |
| 10735 | VGETEXPPHZ128rkz = 10720, |
| 10736 | VGETEXPPHZ256m = 10721, |
| 10737 | VGETEXPPHZ256mb = 10722, |
| 10738 | VGETEXPPHZ256mbk = 10723, |
| 10739 | VGETEXPPHZ256mbkz = 10724, |
| 10740 | VGETEXPPHZ256mk = 10725, |
| 10741 | VGETEXPPHZ256mkz = 10726, |
| 10742 | VGETEXPPHZ256r = 10727, |
| 10743 | VGETEXPPHZ256rk = 10728, |
| 10744 | VGETEXPPHZ256rkz = 10729, |
| 10745 | VGETEXPPHZm = 10730, |
| 10746 | VGETEXPPHZmb = 10731, |
| 10747 | VGETEXPPHZmbk = 10732, |
| 10748 | VGETEXPPHZmbkz = 10733, |
| 10749 | VGETEXPPHZmk = 10734, |
| 10750 | VGETEXPPHZmkz = 10735, |
| 10751 | VGETEXPPHZr = 10736, |
| 10752 | VGETEXPPHZrb = 10737, |
| 10753 | VGETEXPPHZrbk = 10738, |
| 10754 | VGETEXPPHZrbkz = 10739, |
| 10755 | VGETEXPPHZrk = 10740, |
| 10756 | VGETEXPPHZrkz = 10741, |
| 10757 | VGETEXPPSZ128m = 10742, |
| 10758 | VGETEXPPSZ128mb = 10743, |
| 10759 | VGETEXPPSZ128mbk = 10744, |
| 10760 | VGETEXPPSZ128mbkz = 10745, |
| 10761 | VGETEXPPSZ128mk = 10746, |
| 10762 | VGETEXPPSZ128mkz = 10747, |
| 10763 | VGETEXPPSZ128r = 10748, |
| 10764 | VGETEXPPSZ128rk = 10749, |
| 10765 | VGETEXPPSZ128rkz = 10750, |
| 10766 | VGETEXPPSZ256m = 10751, |
| 10767 | VGETEXPPSZ256mb = 10752, |
| 10768 | VGETEXPPSZ256mbk = 10753, |
| 10769 | VGETEXPPSZ256mbkz = 10754, |
| 10770 | VGETEXPPSZ256mk = 10755, |
| 10771 | VGETEXPPSZ256mkz = 10756, |
| 10772 | VGETEXPPSZ256r = 10757, |
| 10773 | VGETEXPPSZ256rk = 10758, |
| 10774 | VGETEXPPSZ256rkz = 10759, |
| 10775 | VGETEXPPSZm = 10760, |
| 10776 | VGETEXPPSZmb = 10761, |
| 10777 | VGETEXPPSZmbk = 10762, |
| 10778 | VGETEXPPSZmbkz = 10763, |
| 10779 | VGETEXPPSZmk = 10764, |
| 10780 | VGETEXPPSZmkz = 10765, |
| 10781 | VGETEXPPSZr = 10766, |
| 10782 | VGETEXPPSZrb = 10767, |
| 10783 | VGETEXPPSZrbk = 10768, |
| 10784 | VGETEXPPSZrbkz = 10769, |
| 10785 | VGETEXPPSZrk = 10770, |
| 10786 | VGETEXPPSZrkz = 10771, |
| 10787 | VGETEXPSDZm = 10772, |
| 10788 | VGETEXPSDZmk = 10773, |
| 10789 | VGETEXPSDZmkz = 10774, |
| 10790 | VGETEXPSDZr = 10775, |
| 10791 | VGETEXPSDZrb = 10776, |
| 10792 | VGETEXPSDZrbk = 10777, |
| 10793 | VGETEXPSDZrbkz = 10778, |
| 10794 | VGETEXPSDZrk = 10779, |
| 10795 | VGETEXPSDZrkz = 10780, |
| 10796 | VGETEXPSHZm = 10781, |
| 10797 | VGETEXPSHZmk = 10782, |
| 10798 | VGETEXPSHZmkz = 10783, |
| 10799 | VGETEXPSHZr = 10784, |
| 10800 | VGETEXPSHZrb = 10785, |
| 10801 | VGETEXPSHZrbk = 10786, |
| 10802 | VGETEXPSHZrbkz = 10787, |
| 10803 | VGETEXPSHZrk = 10788, |
| 10804 | VGETEXPSHZrkz = 10789, |
| 10805 | VGETEXPSSZm = 10790, |
| 10806 | VGETEXPSSZmk = 10791, |
| 10807 | VGETEXPSSZmkz = 10792, |
| 10808 | VGETEXPSSZr = 10793, |
| 10809 | VGETEXPSSZrb = 10794, |
| 10810 | VGETEXPSSZrbk = 10795, |
| 10811 | VGETEXPSSZrbkz = 10796, |
| 10812 | VGETEXPSSZrk = 10797, |
| 10813 | VGETEXPSSZrkz = 10798, |
| 10814 | VGETMANTPDZ128rmbi = 10799, |
| 10815 | VGETMANTPDZ128rmbik = 10800, |
| 10816 | VGETMANTPDZ128rmbikz = 10801, |
| 10817 | VGETMANTPDZ128rmi = 10802, |
| 10818 | VGETMANTPDZ128rmik = 10803, |
| 10819 | VGETMANTPDZ128rmikz = 10804, |
| 10820 | VGETMANTPDZ128rri = 10805, |
| 10821 | VGETMANTPDZ128rrik = 10806, |
| 10822 | VGETMANTPDZ128rrikz = 10807, |
| 10823 | VGETMANTPDZ256rmbi = 10808, |
| 10824 | VGETMANTPDZ256rmbik = 10809, |
| 10825 | VGETMANTPDZ256rmbikz = 10810, |
| 10826 | VGETMANTPDZ256rmi = 10811, |
| 10827 | VGETMANTPDZ256rmik = 10812, |
| 10828 | VGETMANTPDZ256rmikz = 10813, |
| 10829 | VGETMANTPDZ256rri = 10814, |
| 10830 | VGETMANTPDZ256rrik = 10815, |
| 10831 | VGETMANTPDZ256rrikz = 10816, |
| 10832 | VGETMANTPDZrmbi = 10817, |
| 10833 | VGETMANTPDZrmbik = 10818, |
| 10834 | VGETMANTPDZrmbikz = 10819, |
| 10835 | VGETMANTPDZrmi = 10820, |
| 10836 | VGETMANTPDZrmik = 10821, |
| 10837 | VGETMANTPDZrmikz = 10822, |
| 10838 | VGETMANTPDZrri = 10823, |
| 10839 | VGETMANTPDZrrib = 10824, |
| 10840 | VGETMANTPDZrribk = 10825, |
| 10841 | VGETMANTPDZrribkz = 10826, |
| 10842 | VGETMANTPDZrrik = 10827, |
| 10843 | VGETMANTPDZrrikz = 10828, |
| 10844 | VGETMANTPHZ128rmbi = 10829, |
| 10845 | VGETMANTPHZ128rmbik = 10830, |
| 10846 | VGETMANTPHZ128rmbikz = 10831, |
| 10847 | VGETMANTPHZ128rmi = 10832, |
| 10848 | VGETMANTPHZ128rmik = 10833, |
| 10849 | VGETMANTPHZ128rmikz = 10834, |
| 10850 | VGETMANTPHZ128rri = 10835, |
| 10851 | VGETMANTPHZ128rrik = 10836, |
| 10852 | VGETMANTPHZ128rrikz = 10837, |
| 10853 | VGETMANTPHZ256rmbi = 10838, |
| 10854 | VGETMANTPHZ256rmbik = 10839, |
| 10855 | VGETMANTPHZ256rmbikz = 10840, |
| 10856 | VGETMANTPHZ256rmi = 10841, |
| 10857 | VGETMANTPHZ256rmik = 10842, |
| 10858 | VGETMANTPHZ256rmikz = 10843, |
| 10859 | VGETMANTPHZ256rri = 10844, |
| 10860 | VGETMANTPHZ256rrik = 10845, |
| 10861 | VGETMANTPHZ256rrikz = 10846, |
| 10862 | VGETMANTPHZrmbi = 10847, |
| 10863 | VGETMANTPHZrmbik = 10848, |
| 10864 | VGETMANTPHZrmbikz = 10849, |
| 10865 | VGETMANTPHZrmi = 10850, |
| 10866 | VGETMANTPHZrmik = 10851, |
| 10867 | VGETMANTPHZrmikz = 10852, |
| 10868 | VGETMANTPHZrri = 10853, |
| 10869 | VGETMANTPHZrrib = 10854, |
| 10870 | VGETMANTPHZrribk = 10855, |
| 10871 | VGETMANTPHZrribkz = 10856, |
| 10872 | VGETMANTPHZrrik = 10857, |
| 10873 | VGETMANTPHZrrikz = 10858, |
| 10874 | VGETMANTPSZ128rmbi = 10859, |
| 10875 | VGETMANTPSZ128rmbik = 10860, |
| 10876 | VGETMANTPSZ128rmbikz = 10861, |
| 10877 | VGETMANTPSZ128rmi = 10862, |
| 10878 | VGETMANTPSZ128rmik = 10863, |
| 10879 | VGETMANTPSZ128rmikz = 10864, |
| 10880 | VGETMANTPSZ128rri = 10865, |
| 10881 | VGETMANTPSZ128rrik = 10866, |
| 10882 | VGETMANTPSZ128rrikz = 10867, |
| 10883 | VGETMANTPSZ256rmbi = 10868, |
| 10884 | VGETMANTPSZ256rmbik = 10869, |
| 10885 | VGETMANTPSZ256rmbikz = 10870, |
| 10886 | VGETMANTPSZ256rmi = 10871, |
| 10887 | VGETMANTPSZ256rmik = 10872, |
| 10888 | VGETMANTPSZ256rmikz = 10873, |
| 10889 | VGETMANTPSZ256rri = 10874, |
| 10890 | VGETMANTPSZ256rrik = 10875, |
| 10891 | VGETMANTPSZ256rrikz = 10876, |
| 10892 | VGETMANTPSZrmbi = 10877, |
| 10893 | VGETMANTPSZrmbik = 10878, |
| 10894 | VGETMANTPSZrmbikz = 10879, |
| 10895 | VGETMANTPSZrmi = 10880, |
| 10896 | VGETMANTPSZrmik = 10881, |
| 10897 | VGETMANTPSZrmikz = 10882, |
| 10898 | VGETMANTPSZrri = 10883, |
| 10899 | VGETMANTPSZrrib = 10884, |
| 10900 | VGETMANTPSZrribk = 10885, |
| 10901 | VGETMANTPSZrribkz = 10886, |
| 10902 | VGETMANTPSZrrik = 10887, |
| 10903 | VGETMANTPSZrrikz = 10888, |
| 10904 | VGETMANTSDZrmi = 10889, |
| 10905 | VGETMANTSDZrmik = 10890, |
| 10906 | VGETMANTSDZrmikz = 10891, |
| 10907 | VGETMANTSDZrri = 10892, |
| 10908 | VGETMANTSDZrrib = 10893, |
| 10909 | VGETMANTSDZrribk = 10894, |
| 10910 | VGETMANTSDZrribkz = 10895, |
| 10911 | VGETMANTSDZrrik = 10896, |
| 10912 | VGETMANTSDZrrikz = 10897, |
| 10913 | VGETMANTSHZrmi = 10898, |
| 10914 | VGETMANTSHZrmik = 10899, |
| 10915 | VGETMANTSHZrmikz = 10900, |
| 10916 | VGETMANTSHZrri = 10901, |
| 10917 | VGETMANTSHZrrib = 10902, |
| 10918 | VGETMANTSHZrribk = 10903, |
| 10919 | VGETMANTSHZrribkz = 10904, |
| 10920 | VGETMANTSHZrrik = 10905, |
| 10921 | VGETMANTSHZrrikz = 10906, |
| 10922 | VGETMANTSSZrmi = 10907, |
| 10923 | VGETMANTSSZrmik = 10908, |
| 10924 | VGETMANTSSZrmikz = 10909, |
| 10925 | VGETMANTSSZrri = 10910, |
| 10926 | VGETMANTSSZrrib = 10911, |
| 10927 | VGETMANTSSZrribk = 10912, |
| 10928 | VGETMANTSSZrribkz = 10913, |
| 10929 | VGETMANTSSZrrik = 10914, |
| 10930 | VGETMANTSSZrrikz = 10915, |
| 10931 | VGF2P8AFFINEINVQBYrmi = 10916, |
| 10932 | VGF2P8AFFINEINVQBYrri = 10917, |
| 10933 | VGF2P8AFFINEINVQBZ128rmbi = 10918, |
| 10934 | VGF2P8AFFINEINVQBZ128rmbik = 10919, |
| 10935 | VGF2P8AFFINEINVQBZ128rmbikz = 10920, |
| 10936 | VGF2P8AFFINEINVQBZ128rmi = 10921, |
| 10937 | VGF2P8AFFINEINVQBZ128rmik = 10922, |
| 10938 | VGF2P8AFFINEINVQBZ128rmikz = 10923, |
| 10939 | VGF2P8AFFINEINVQBZ128rri = 10924, |
| 10940 | VGF2P8AFFINEINVQBZ128rrik = 10925, |
| 10941 | VGF2P8AFFINEINVQBZ128rrikz = 10926, |
| 10942 | VGF2P8AFFINEINVQBZ256rmbi = 10927, |
| 10943 | VGF2P8AFFINEINVQBZ256rmbik = 10928, |
| 10944 | VGF2P8AFFINEINVQBZ256rmbikz = 10929, |
| 10945 | VGF2P8AFFINEINVQBZ256rmi = 10930, |
| 10946 | VGF2P8AFFINEINVQBZ256rmik = 10931, |
| 10947 | VGF2P8AFFINEINVQBZ256rmikz = 10932, |
| 10948 | VGF2P8AFFINEINVQBZ256rri = 10933, |
| 10949 | VGF2P8AFFINEINVQBZ256rrik = 10934, |
| 10950 | VGF2P8AFFINEINVQBZ256rrikz = 10935, |
| 10951 | VGF2P8AFFINEINVQBZrmbi = 10936, |
| 10952 | VGF2P8AFFINEINVQBZrmbik = 10937, |
| 10953 | VGF2P8AFFINEINVQBZrmbikz = 10938, |
| 10954 | VGF2P8AFFINEINVQBZrmi = 10939, |
| 10955 | VGF2P8AFFINEINVQBZrmik = 10940, |
| 10956 | VGF2P8AFFINEINVQBZrmikz = 10941, |
| 10957 | VGF2P8AFFINEINVQBZrri = 10942, |
| 10958 | VGF2P8AFFINEINVQBZrrik = 10943, |
| 10959 | VGF2P8AFFINEINVQBZrrikz = 10944, |
| 10960 | VGF2P8AFFINEINVQBrmi = 10945, |
| 10961 | VGF2P8AFFINEINVQBrri = 10946, |
| 10962 | VGF2P8AFFINEQBYrmi = 10947, |
| 10963 | VGF2P8AFFINEQBYrri = 10948, |
| 10964 | VGF2P8AFFINEQBZ128rmbi = 10949, |
| 10965 | VGF2P8AFFINEQBZ128rmbik = 10950, |
| 10966 | VGF2P8AFFINEQBZ128rmbikz = 10951, |
| 10967 | VGF2P8AFFINEQBZ128rmi = 10952, |
| 10968 | VGF2P8AFFINEQBZ128rmik = 10953, |
| 10969 | VGF2P8AFFINEQBZ128rmikz = 10954, |
| 10970 | VGF2P8AFFINEQBZ128rri = 10955, |
| 10971 | VGF2P8AFFINEQBZ128rrik = 10956, |
| 10972 | VGF2P8AFFINEQBZ128rrikz = 10957, |
| 10973 | VGF2P8AFFINEQBZ256rmbi = 10958, |
| 10974 | VGF2P8AFFINEQBZ256rmbik = 10959, |
| 10975 | VGF2P8AFFINEQBZ256rmbikz = 10960, |
| 10976 | VGF2P8AFFINEQBZ256rmi = 10961, |
| 10977 | VGF2P8AFFINEQBZ256rmik = 10962, |
| 10978 | VGF2P8AFFINEQBZ256rmikz = 10963, |
| 10979 | VGF2P8AFFINEQBZ256rri = 10964, |
| 10980 | VGF2P8AFFINEQBZ256rrik = 10965, |
| 10981 | VGF2P8AFFINEQBZ256rrikz = 10966, |
| 10982 | VGF2P8AFFINEQBZrmbi = 10967, |
| 10983 | VGF2P8AFFINEQBZrmbik = 10968, |
| 10984 | VGF2P8AFFINEQBZrmbikz = 10969, |
| 10985 | VGF2P8AFFINEQBZrmi = 10970, |
| 10986 | VGF2P8AFFINEQBZrmik = 10971, |
| 10987 | VGF2P8AFFINEQBZrmikz = 10972, |
| 10988 | VGF2P8AFFINEQBZrri = 10973, |
| 10989 | VGF2P8AFFINEQBZrrik = 10974, |
| 10990 | VGF2P8AFFINEQBZrrikz = 10975, |
| 10991 | VGF2P8AFFINEQBrmi = 10976, |
| 10992 | VGF2P8AFFINEQBrri = 10977, |
| 10993 | VGF2P8MULBYrm = 10978, |
| 10994 | VGF2P8MULBYrr = 10979, |
| 10995 | VGF2P8MULBZ128rm = 10980, |
| 10996 | VGF2P8MULBZ128rmk = 10981, |
| 10997 | VGF2P8MULBZ128rmkz = 10982, |
| 10998 | VGF2P8MULBZ128rr = 10983, |
| 10999 | VGF2P8MULBZ128rrk = 10984, |
| 11000 | VGF2P8MULBZ128rrkz = 10985, |
| 11001 | VGF2P8MULBZ256rm = 10986, |
| 11002 | VGF2P8MULBZ256rmk = 10987, |
| 11003 | VGF2P8MULBZ256rmkz = 10988, |
| 11004 | VGF2P8MULBZ256rr = 10989, |
| 11005 | VGF2P8MULBZ256rrk = 10990, |
| 11006 | VGF2P8MULBZ256rrkz = 10991, |
| 11007 | VGF2P8MULBZrm = 10992, |
| 11008 | VGF2P8MULBZrmk = 10993, |
| 11009 | VGF2P8MULBZrmkz = 10994, |
| 11010 | VGF2P8MULBZrr = 10995, |
| 11011 | VGF2P8MULBZrrk = 10996, |
| 11012 | VGF2P8MULBZrrkz = 10997, |
| 11013 | VGF2P8MULBrm = 10998, |
| 11014 | VGF2P8MULBrr = 10999, |
| 11015 | VHADDPDYrm = 11000, |
| 11016 | VHADDPDYrr = 11001, |
| 11017 | VHADDPDrm = 11002, |
| 11018 | VHADDPDrr = 11003, |
| 11019 | VHADDPSYrm = 11004, |
| 11020 | VHADDPSYrr = 11005, |
| 11021 | VHADDPSrm = 11006, |
| 11022 | VHADDPSrr = 11007, |
| 11023 | VHSUBPDYrm = 11008, |
| 11024 | VHSUBPDYrr = 11009, |
| 11025 | VHSUBPDrm = 11010, |
| 11026 | VHSUBPDrr = 11011, |
| 11027 | VHSUBPSYrm = 11012, |
| 11028 | VHSUBPSYrr = 11013, |
| 11029 | VHSUBPSrm = 11014, |
| 11030 | VHSUBPSrr = 11015, |
| 11031 | VINSERTF128rm = 11016, |
| 11032 | VINSERTF128rr = 11017, |
| 11033 | VINSERTF32x4Z256rm = 11018, |
| 11034 | VINSERTF32x4Z256rmk = 11019, |
| 11035 | VINSERTF32x4Z256rmkz = 11020, |
| 11036 | VINSERTF32x4Z256rr = 11021, |
| 11037 | VINSERTF32x4Z256rrk = 11022, |
| 11038 | VINSERTF32x4Z256rrkz = 11023, |
| 11039 | VINSERTF32x4Zrm = 11024, |
| 11040 | VINSERTF32x4Zrmk = 11025, |
| 11041 | VINSERTF32x4Zrmkz = 11026, |
| 11042 | VINSERTF32x4Zrr = 11027, |
| 11043 | VINSERTF32x4Zrrk = 11028, |
| 11044 | VINSERTF32x4Zrrkz = 11029, |
| 11045 | VINSERTF32x8Zrm = 11030, |
| 11046 | VINSERTF32x8Zrmk = 11031, |
| 11047 | VINSERTF32x8Zrmkz = 11032, |
| 11048 | VINSERTF32x8Zrr = 11033, |
| 11049 | VINSERTF32x8Zrrk = 11034, |
| 11050 | VINSERTF32x8Zrrkz = 11035, |
| 11051 | VINSERTF64x2Z256rm = 11036, |
| 11052 | VINSERTF64x2Z256rmk = 11037, |
| 11053 | VINSERTF64x2Z256rmkz = 11038, |
| 11054 | VINSERTF64x2Z256rr = 11039, |
| 11055 | VINSERTF64x2Z256rrk = 11040, |
| 11056 | VINSERTF64x2Z256rrkz = 11041, |
| 11057 | VINSERTF64x2Zrm = 11042, |
| 11058 | VINSERTF64x2Zrmk = 11043, |
| 11059 | VINSERTF64x2Zrmkz = 11044, |
| 11060 | VINSERTF64x2Zrr = 11045, |
| 11061 | VINSERTF64x2Zrrk = 11046, |
| 11062 | VINSERTF64x2Zrrkz = 11047, |
| 11063 | VINSERTF64x4Zrm = 11048, |
| 11064 | VINSERTF64x4Zrmk = 11049, |
| 11065 | VINSERTF64x4Zrmkz = 11050, |
| 11066 | VINSERTF64x4Zrr = 11051, |
| 11067 | VINSERTF64x4Zrrk = 11052, |
| 11068 | VINSERTF64x4Zrrkz = 11053, |
| 11069 | VINSERTI128rm = 11054, |
| 11070 | VINSERTI128rr = 11055, |
| 11071 | VINSERTI32x4Z256rm = 11056, |
| 11072 | VINSERTI32x4Z256rmk = 11057, |
| 11073 | VINSERTI32x4Z256rmkz = 11058, |
| 11074 | VINSERTI32x4Z256rr = 11059, |
| 11075 | VINSERTI32x4Z256rrk = 11060, |
| 11076 | VINSERTI32x4Z256rrkz = 11061, |
| 11077 | VINSERTI32x4Zrm = 11062, |
| 11078 | VINSERTI32x4Zrmk = 11063, |
| 11079 | VINSERTI32x4Zrmkz = 11064, |
| 11080 | VINSERTI32x4Zrr = 11065, |
| 11081 | VINSERTI32x4Zrrk = 11066, |
| 11082 | VINSERTI32x4Zrrkz = 11067, |
| 11083 | VINSERTI32x8Zrm = 11068, |
| 11084 | VINSERTI32x8Zrmk = 11069, |
| 11085 | VINSERTI32x8Zrmkz = 11070, |
| 11086 | VINSERTI32x8Zrr = 11071, |
| 11087 | VINSERTI32x8Zrrk = 11072, |
| 11088 | VINSERTI32x8Zrrkz = 11073, |
| 11089 | VINSERTI64x2Z256rm = 11074, |
| 11090 | VINSERTI64x2Z256rmk = 11075, |
| 11091 | VINSERTI64x2Z256rmkz = 11076, |
| 11092 | VINSERTI64x2Z256rr = 11077, |
| 11093 | VINSERTI64x2Z256rrk = 11078, |
| 11094 | VINSERTI64x2Z256rrkz = 11079, |
| 11095 | VINSERTI64x2Zrm = 11080, |
| 11096 | VINSERTI64x2Zrmk = 11081, |
| 11097 | VINSERTI64x2Zrmkz = 11082, |
| 11098 | VINSERTI64x2Zrr = 11083, |
| 11099 | VINSERTI64x2Zrrk = 11084, |
| 11100 | VINSERTI64x2Zrrkz = 11085, |
| 11101 | VINSERTI64x4Zrm = 11086, |
| 11102 | VINSERTI64x4Zrmk = 11087, |
| 11103 | VINSERTI64x4Zrmkz = 11088, |
| 11104 | VINSERTI64x4Zrr = 11089, |
| 11105 | VINSERTI64x4Zrrk = 11090, |
| 11106 | VINSERTI64x4Zrrkz = 11091, |
| 11107 | VINSERTPSZrm = 11092, |
| 11108 | VINSERTPSZrr = 11093, |
| 11109 | VINSERTPSrm = 11094, |
| 11110 | VINSERTPSrr = 11095, |
| 11111 | VLDDQUYrm = 11096, |
| 11112 | VLDDQUrm = 11097, |
| 11113 | VLDMXCSR = 11098, |
| 11114 | VMASKMOVDQU = 11099, |
| 11115 | VMASKMOVDQU64 = 11100, |
| 11116 | VMASKMOVPDYmr = 11101, |
| 11117 | VMASKMOVPDYrm = 11102, |
| 11118 | VMASKMOVPDmr = 11103, |
| 11119 | VMASKMOVPDrm = 11104, |
| 11120 | VMASKMOVPSYmr = 11105, |
| 11121 | VMASKMOVPSYrm = 11106, |
| 11122 | VMASKMOVPSmr = 11107, |
| 11123 | VMASKMOVPSrm = 11108, |
| 11124 | VMAXCPDYrm = 11109, |
| 11125 | VMAXCPDYrr = 11110, |
| 11126 | VMAXCPDZ128rm = 11111, |
| 11127 | VMAXCPDZ128rmb = 11112, |
| 11128 | VMAXCPDZ128rmbk = 11113, |
| 11129 | VMAXCPDZ128rmbkz = 11114, |
| 11130 | VMAXCPDZ128rmk = 11115, |
| 11131 | VMAXCPDZ128rmkz = 11116, |
| 11132 | VMAXCPDZ128rr = 11117, |
| 11133 | VMAXCPDZ128rrk = 11118, |
| 11134 | VMAXCPDZ128rrkz = 11119, |
| 11135 | VMAXCPDZ256rm = 11120, |
| 11136 | VMAXCPDZ256rmb = 11121, |
| 11137 | VMAXCPDZ256rmbk = 11122, |
| 11138 | VMAXCPDZ256rmbkz = 11123, |
| 11139 | VMAXCPDZ256rmk = 11124, |
| 11140 | VMAXCPDZ256rmkz = 11125, |
| 11141 | VMAXCPDZ256rr = 11126, |
| 11142 | VMAXCPDZ256rrk = 11127, |
| 11143 | VMAXCPDZ256rrkz = 11128, |
| 11144 | VMAXCPDZrm = 11129, |
| 11145 | VMAXCPDZrmb = 11130, |
| 11146 | VMAXCPDZrmbk = 11131, |
| 11147 | VMAXCPDZrmbkz = 11132, |
| 11148 | VMAXCPDZrmk = 11133, |
| 11149 | VMAXCPDZrmkz = 11134, |
| 11150 | VMAXCPDZrr = 11135, |
| 11151 | VMAXCPDZrrk = 11136, |
| 11152 | VMAXCPDZrrkz = 11137, |
| 11153 | VMAXCPDrm = 11138, |
| 11154 | VMAXCPDrr = 11139, |
| 11155 | VMAXCPHZ128rm = 11140, |
| 11156 | VMAXCPHZ128rmb = 11141, |
| 11157 | VMAXCPHZ128rmbk = 11142, |
| 11158 | VMAXCPHZ128rmbkz = 11143, |
| 11159 | VMAXCPHZ128rmk = 11144, |
| 11160 | VMAXCPHZ128rmkz = 11145, |
| 11161 | VMAXCPHZ128rr = 11146, |
| 11162 | VMAXCPHZ128rrk = 11147, |
| 11163 | VMAXCPHZ128rrkz = 11148, |
| 11164 | VMAXCPHZ256rm = 11149, |
| 11165 | VMAXCPHZ256rmb = 11150, |
| 11166 | VMAXCPHZ256rmbk = 11151, |
| 11167 | VMAXCPHZ256rmbkz = 11152, |
| 11168 | VMAXCPHZ256rmk = 11153, |
| 11169 | VMAXCPHZ256rmkz = 11154, |
| 11170 | VMAXCPHZ256rr = 11155, |
| 11171 | VMAXCPHZ256rrk = 11156, |
| 11172 | VMAXCPHZ256rrkz = 11157, |
| 11173 | VMAXCPHZrm = 11158, |
| 11174 | VMAXCPHZrmb = 11159, |
| 11175 | VMAXCPHZrmbk = 11160, |
| 11176 | VMAXCPHZrmbkz = 11161, |
| 11177 | VMAXCPHZrmk = 11162, |
| 11178 | VMAXCPHZrmkz = 11163, |
| 11179 | VMAXCPHZrr = 11164, |
| 11180 | VMAXCPHZrrk = 11165, |
| 11181 | VMAXCPHZrrkz = 11166, |
| 11182 | VMAXCPSYrm = 11167, |
| 11183 | VMAXCPSYrr = 11168, |
| 11184 | VMAXCPSZ128rm = 11169, |
| 11185 | VMAXCPSZ128rmb = 11170, |
| 11186 | VMAXCPSZ128rmbk = 11171, |
| 11187 | VMAXCPSZ128rmbkz = 11172, |
| 11188 | VMAXCPSZ128rmk = 11173, |
| 11189 | VMAXCPSZ128rmkz = 11174, |
| 11190 | VMAXCPSZ128rr = 11175, |
| 11191 | VMAXCPSZ128rrk = 11176, |
| 11192 | VMAXCPSZ128rrkz = 11177, |
| 11193 | VMAXCPSZ256rm = 11178, |
| 11194 | VMAXCPSZ256rmb = 11179, |
| 11195 | VMAXCPSZ256rmbk = 11180, |
| 11196 | VMAXCPSZ256rmbkz = 11181, |
| 11197 | VMAXCPSZ256rmk = 11182, |
| 11198 | VMAXCPSZ256rmkz = 11183, |
| 11199 | VMAXCPSZ256rr = 11184, |
| 11200 | VMAXCPSZ256rrk = 11185, |
| 11201 | VMAXCPSZ256rrkz = 11186, |
| 11202 | VMAXCPSZrm = 11187, |
| 11203 | VMAXCPSZrmb = 11188, |
| 11204 | VMAXCPSZrmbk = 11189, |
| 11205 | VMAXCPSZrmbkz = 11190, |
| 11206 | VMAXCPSZrmk = 11191, |
| 11207 | VMAXCPSZrmkz = 11192, |
| 11208 | VMAXCPSZrr = 11193, |
| 11209 | VMAXCPSZrrk = 11194, |
| 11210 | VMAXCPSZrrkz = 11195, |
| 11211 | VMAXCPSrm = 11196, |
| 11212 | VMAXCPSrr = 11197, |
| 11213 | VMAXCSDZrm = 11198, |
| 11214 | VMAXCSDZrr = 11199, |
| 11215 | VMAXCSDrm = 11200, |
| 11216 | VMAXCSDrr = 11201, |
| 11217 | VMAXCSHZrm = 11202, |
| 11218 | VMAXCSHZrr = 11203, |
| 11219 | VMAXCSSZrm = 11204, |
| 11220 | VMAXCSSZrr = 11205, |
| 11221 | VMAXCSSrm = 11206, |
| 11222 | VMAXCSSrr = 11207, |
| 11223 | VMAXPDYrm = 11208, |
| 11224 | VMAXPDYrr = 11209, |
| 11225 | VMAXPDZ128rm = 11210, |
| 11226 | VMAXPDZ128rmb = 11211, |
| 11227 | VMAXPDZ128rmbk = 11212, |
| 11228 | VMAXPDZ128rmbkz = 11213, |
| 11229 | VMAXPDZ128rmk = 11214, |
| 11230 | VMAXPDZ128rmkz = 11215, |
| 11231 | VMAXPDZ128rr = 11216, |
| 11232 | VMAXPDZ128rrk = 11217, |
| 11233 | VMAXPDZ128rrkz = 11218, |
| 11234 | VMAXPDZ256rm = 11219, |
| 11235 | VMAXPDZ256rmb = 11220, |
| 11236 | VMAXPDZ256rmbk = 11221, |
| 11237 | VMAXPDZ256rmbkz = 11222, |
| 11238 | VMAXPDZ256rmk = 11223, |
| 11239 | VMAXPDZ256rmkz = 11224, |
| 11240 | VMAXPDZ256rr = 11225, |
| 11241 | VMAXPDZ256rrk = 11226, |
| 11242 | VMAXPDZ256rrkz = 11227, |
| 11243 | VMAXPDZrm = 11228, |
| 11244 | VMAXPDZrmb = 11229, |
| 11245 | VMAXPDZrmbk = 11230, |
| 11246 | VMAXPDZrmbkz = 11231, |
| 11247 | VMAXPDZrmk = 11232, |
| 11248 | VMAXPDZrmkz = 11233, |
| 11249 | VMAXPDZrr = 11234, |
| 11250 | VMAXPDZrrb = 11235, |
| 11251 | VMAXPDZrrbk = 11236, |
| 11252 | VMAXPDZrrbkz = 11237, |
| 11253 | VMAXPDZrrk = 11238, |
| 11254 | VMAXPDZrrkz = 11239, |
| 11255 | VMAXPDrm = 11240, |
| 11256 | VMAXPDrr = 11241, |
| 11257 | VMAXPHZ128rm = 11242, |
| 11258 | VMAXPHZ128rmb = 11243, |
| 11259 | VMAXPHZ128rmbk = 11244, |
| 11260 | VMAXPHZ128rmbkz = 11245, |
| 11261 | VMAXPHZ128rmk = 11246, |
| 11262 | VMAXPHZ128rmkz = 11247, |
| 11263 | VMAXPHZ128rr = 11248, |
| 11264 | VMAXPHZ128rrk = 11249, |
| 11265 | VMAXPHZ128rrkz = 11250, |
| 11266 | VMAXPHZ256rm = 11251, |
| 11267 | VMAXPHZ256rmb = 11252, |
| 11268 | VMAXPHZ256rmbk = 11253, |
| 11269 | VMAXPHZ256rmbkz = 11254, |
| 11270 | VMAXPHZ256rmk = 11255, |
| 11271 | VMAXPHZ256rmkz = 11256, |
| 11272 | VMAXPHZ256rr = 11257, |
| 11273 | VMAXPHZ256rrk = 11258, |
| 11274 | VMAXPHZ256rrkz = 11259, |
| 11275 | VMAXPHZrm = 11260, |
| 11276 | VMAXPHZrmb = 11261, |
| 11277 | VMAXPHZrmbk = 11262, |
| 11278 | VMAXPHZrmbkz = 11263, |
| 11279 | VMAXPHZrmk = 11264, |
| 11280 | VMAXPHZrmkz = 11265, |
| 11281 | VMAXPHZrr = 11266, |
| 11282 | VMAXPHZrrb = 11267, |
| 11283 | VMAXPHZrrbk = 11268, |
| 11284 | VMAXPHZrrbkz = 11269, |
| 11285 | VMAXPHZrrk = 11270, |
| 11286 | VMAXPHZrrkz = 11271, |
| 11287 | VMAXPSYrm = 11272, |
| 11288 | VMAXPSYrr = 11273, |
| 11289 | VMAXPSZ128rm = 11274, |
| 11290 | VMAXPSZ128rmb = 11275, |
| 11291 | VMAXPSZ128rmbk = 11276, |
| 11292 | VMAXPSZ128rmbkz = 11277, |
| 11293 | VMAXPSZ128rmk = 11278, |
| 11294 | VMAXPSZ128rmkz = 11279, |
| 11295 | VMAXPSZ128rr = 11280, |
| 11296 | VMAXPSZ128rrk = 11281, |
| 11297 | VMAXPSZ128rrkz = 11282, |
| 11298 | VMAXPSZ256rm = 11283, |
| 11299 | VMAXPSZ256rmb = 11284, |
| 11300 | VMAXPSZ256rmbk = 11285, |
| 11301 | VMAXPSZ256rmbkz = 11286, |
| 11302 | VMAXPSZ256rmk = 11287, |
| 11303 | VMAXPSZ256rmkz = 11288, |
| 11304 | VMAXPSZ256rr = 11289, |
| 11305 | VMAXPSZ256rrk = 11290, |
| 11306 | VMAXPSZ256rrkz = 11291, |
| 11307 | VMAXPSZrm = 11292, |
| 11308 | VMAXPSZrmb = 11293, |
| 11309 | VMAXPSZrmbk = 11294, |
| 11310 | VMAXPSZrmbkz = 11295, |
| 11311 | VMAXPSZrmk = 11296, |
| 11312 | VMAXPSZrmkz = 11297, |
| 11313 | VMAXPSZrr = 11298, |
| 11314 | VMAXPSZrrb = 11299, |
| 11315 | VMAXPSZrrbk = 11300, |
| 11316 | VMAXPSZrrbkz = 11301, |
| 11317 | VMAXPSZrrk = 11302, |
| 11318 | VMAXPSZrrkz = 11303, |
| 11319 | VMAXPSrm = 11304, |
| 11320 | VMAXPSrr = 11305, |
| 11321 | VMAXSDZrm = 11306, |
| 11322 | VMAXSDZrm_Int = 11307, |
| 11323 | VMAXSDZrm_Intk = 11308, |
| 11324 | VMAXSDZrm_Intkz = 11309, |
| 11325 | VMAXSDZrr = 11310, |
| 11326 | VMAXSDZrr_Int = 11311, |
| 11327 | VMAXSDZrr_Intk = 11312, |
| 11328 | VMAXSDZrr_Intkz = 11313, |
| 11329 | VMAXSDZrrb_Int = 11314, |
| 11330 | VMAXSDZrrb_Intk = 11315, |
| 11331 | VMAXSDZrrb_Intkz = 11316, |
| 11332 | VMAXSDrm = 11317, |
| 11333 | VMAXSDrm_Int = 11318, |
| 11334 | VMAXSDrr = 11319, |
| 11335 | VMAXSDrr_Int = 11320, |
| 11336 | VMAXSHZrm = 11321, |
| 11337 | VMAXSHZrm_Int = 11322, |
| 11338 | VMAXSHZrm_Intk = 11323, |
| 11339 | VMAXSHZrm_Intkz = 11324, |
| 11340 | VMAXSHZrr = 11325, |
| 11341 | VMAXSHZrr_Int = 11326, |
| 11342 | VMAXSHZrr_Intk = 11327, |
| 11343 | VMAXSHZrr_Intkz = 11328, |
| 11344 | VMAXSHZrrb_Int = 11329, |
| 11345 | VMAXSHZrrb_Intk = 11330, |
| 11346 | VMAXSHZrrb_Intkz = 11331, |
| 11347 | VMAXSSZrm = 11332, |
| 11348 | VMAXSSZrm_Int = 11333, |
| 11349 | VMAXSSZrm_Intk = 11334, |
| 11350 | VMAXSSZrm_Intkz = 11335, |
| 11351 | VMAXSSZrr = 11336, |
| 11352 | VMAXSSZrr_Int = 11337, |
| 11353 | VMAXSSZrr_Intk = 11338, |
| 11354 | VMAXSSZrr_Intkz = 11339, |
| 11355 | VMAXSSZrrb_Int = 11340, |
| 11356 | VMAXSSZrrb_Intk = 11341, |
| 11357 | VMAXSSZrrb_Intkz = 11342, |
| 11358 | VMAXSSrm = 11343, |
| 11359 | VMAXSSrm_Int = 11344, |
| 11360 | VMAXSSrr = 11345, |
| 11361 | VMAXSSrr_Int = 11346, |
| 11362 | VMCALL = 11347, |
| 11363 | VMCLEARm = 11348, |
| 11364 | VMFUNC = 11349, |
| 11365 | VMINCPDYrm = 11350, |
| 11366 | VMINCPDYrr = 11351, |
| 11367 | VMINCPDZ128rm = 11352, |
| 11368 | VMINCPDZ128rmb = 11353, |
| 11369 | VMINCPDZ128rmbk = 11354, |
| 11370 | VMINCPDZ128rmbkz = 11355, |
| 11371 | VMINCPDZ128rmk = 11356, |
| 11372 | VMINCPDZ128rmkz = 11357, |
| 11373 | VMINCPDZ128rr = 11358, |
| 11374 | VMINCPDZ128rrk = 11359, |
| 11375 | VMINCPDZ128rrkz = 11360, |
| 11376 | VMINCPDZ256rm = 11361, |
| 11377 | VMINCPDZ256rmb = 11362, |
| 11378 | VMINCPDZ256rmbk = 11363, |
| 11379 | VMINCPDZ256rmbkz = 11364, |
| 11380 | VMINCPDZ256rmk = 11365, |
| 11381 | VMINCPDZ256rmkz = 11366, |
| 11382 | VMINCPDZ256rr = 11367, |
| 11383 | VMINCPDZ256rrk = 11368, |
| 11384 | VMINCPDZ256rrkz = 11369, |
| 11385 | VMINCPDZrm = 11370, |
| 11386 | VMINCPDZrmb = 11371, |
| 11387 | VMINCPDZrmbk = 11372, |
| 11388 | VMINCPDZrmbkz = 11373, |
| 11389 | VMINCPDZrmk = 11374, |
| 11390 | VMINCPDZrmkz = 11375, |
| 11391 | VMINCPDZrr = 11376, |
| 11392 | VMINCPDZrrk = 11377, |
| 11393 | VMINCPDZrrkz = 11378, |
| 11394 | VMINCPDrm = 11379, |
| 11395 | VMINCPDrr = 11380, |
| 11396 | VMINCPHZ128rm = 11381, |
| 11397 | VMINCPHZ128rmb = 11382, |
| 11398 | VMINCPHZ128rmbk = 11383, |
| 11399 | VMINCPHZ128rmbkz = 11384, |
| 11400 | VMINCPHZ128rmk = 11385, |
| 11401 | VMINCPHZ128rmkz = 11386, |
| 11402 | VMINCPHZ128rr = 11387, |
| 11403 | VMINCPHZ128rrk = 11388, |
| 11404 | VMINCPHZ128rrkz = 11389, |
| 11405 | VMINCPHZ256rm = 11390, |
| 11406 | VMINCPHZ256rmb = 11391, |
| 11407 | VMINCPHZ256rmbk = 11392, |
| 11408 | VMINCPHZ256rmbkz = 11393, |
| 11409 | VMINCPHZ256rmk = 11394, |
| 11410 | VMINCPHZ256rmkz = 11395, |
| 11411 | VMINCPHZ256rr = 11396, |
| 11412 | VMINCPHZ256rrk = 11397, |
| 11413 | VMINCPHZ256rrkz = 11398, |
| 11414 | VMINCPHZrm = 11399, |
| 11415 | VMINCPHZrmb = 11400, |
| 11416 | VMINCPHZrmbk = 11401, |
| 11417 | VMINCPHZrmbkz = 11402, |
| 11418 | VMINCPHZrmk = 11403, |
| 11419 | VMINCPHZrmkz = 11404, |
| 11420 | VMINCPHZrr = 11405, |
| 11421 | VMINCPHZrrk = 11406, |
| 11422 | VMINCPHZrrkz = 11407, |
| 11423 | VMINCPSYrm = 11408, |
| 11424 | VMINCPSYrr = 11409, |
| 11425 | VMINCPSZ128rm = 11410, |
| 11426 | VMINCPSZ128rmb = 11411, |
| 11427 | VMINCPSZ128rmbk = 11412, |
| 11428 | VMINCPSZ128rmbkz = 11413, |
| 11429 | VMINCPSZ128rmk = 11414, |
| 11430 | VMINCPSZ128rmkz = 11415, |
| 11431 | VMINCPSZ128rr = 11416, |
| 11432 | VMINCPSZ128rrk = 11417, |
| 11433 | VMINCPSZ128rrkz = 11418, |
| 11434 | VMINCPSZ256rm = 11419, |
| 11435 | VMINCPSZ256rmb = 11420, |
| 11436 | VMINCPSZ256rmbk = 11421, |
| 11437 | VMINCPSZ256rmbkz = 11422, |
| 11438 | VMINCPSZ256rmk = 11423, |
| 11439 | VMINCPSZ256rmkz = 11424, |
| 11440 | VMINCPSZ256rr = 11425, |
| 11441 | VMINCPSZ256rrk = 11426, |
| 11442 | VMINCPSZ256rrkz = 11427, |
| 11443 | VMINCPSZrm = 11428, |
| 11444 | VMINCPSZrmb = 11429, |
| 11445 | VMINCPSZrmbk = 11430, |
| 11446 | VMINCPSZrmbkz = 11431, |
| 11447 | VMINCPSZrmk = 11432, |
| 11448 | VMINCPSZrmkz = 11433, |
| 11449 | VMINCPSZrr = 11434, |
| 11450 | VMINCPSZrrk = 11435, |
| 11451 | VMINCPSZrrkz = 11436, |
| 11452 | VMINCPSrm = 11437, |
| 11453 | VMINCPSrr = 11438, |
| 11454 | VMINCSDZrm = 11439, |
| 11455 | VMINCSDZrr = 11440, |
| 11456 | VMINCSDrm = 11441, |
| 11457 | VMINCSDrr = 11442, |
| 11458 | VMINCSHZrm = 11443, |
| 11459 | VMINCSHZrr = 11444, |
| 11460 | VMINCSSZrm = 11445, |
| 11461 | VMINCSSZrr = 11446, |
| 11462 | VMINCSSrm = 11447, |
| 11463 | VMINCSSrr = 11448, |
| 11464 | VMINPDYrm = 11449, |
| 11465 | VMINPDYrr = 11450, |
| 11466 | VMINPDZ128rm = 11451, |
| 11467 | VMINPDZ128rmb = 11452, |
| 11468 | VMINPDZ128rmbk = 11453, |
| 11469 | VMINPDZ128rmbkz = 11454, |
| 11470 | VMINPDZ128rmk = 11455, |
| 11471 | VMINPDZ128rmkz = 11456, |
| 11472 | VMINPDZ128rr = 11457, |
| 11473 | VMINPDZ128rrk = 11458, |
| 11474 | VMINPDZ128rrkz = 11459, |
| 11475 | VMINPDZ256rm = 11460, |
| 11476 | VMINPDZ256rmb = 11461, |
| 11477 | VMINPDZ256rmbk = 11462, |
| 11478 | VMINPDZ256rmbkz = 11463, |
| 11479 | VMINPDZ256rmk = 11464, |
| 11480 | VMINPDZ256rmkz = 11465, |
| 11481 | VMINPDZ256rr = 11466, |
| 11482 | VMINPDZ256rrk = 11467, |
| 11483 | VMINPDZ256rrkz = 11468, |
| 11484 | VMINPDZrm = 11469, |
| 11485 | VMINPDZrmb = 11470, |
| 11486 | VMINPDZrmbk = 11471, |
| 11487 | VMINPDZrmbkz = 11472, |
| 11488 | VMINPDZrmk = 11473, |
| 11489 | VMINPDZrmkz = 11474, |
| 11490 | VMINPDZrr = 11475, |
| 11491 | VMINPDZrrb = 11476, |
| 11492 | VMINPDZrrbk = 11477, |
| 11493 | VMINPDZrrbkz = 11478, |
| 11494 | VMINPDZrrk = 11479, |
| 11495 | VMINPDZrrkz = 11480, |
| 11496 | VMINPDrm = 11481, |
| 11497 | VMINPDrr = 11482, |
| 11498 | VMINPHZ128rm = 11483, |
| 11499 | VMINPHZ128rmb = 11484, |
| 11500 | VMINPHZ128rmbk = 11485, |
| 11501 | VMINPHZ128rmbkz = 11486, |
| 11502 | VMINPHZ128rmk = 11487, |
| 11503 | VMINPHZ128rmkz = 11488, |
| 11504 | VMINPHZ128rr = 11489, |
| 11505 | VMINPHZ128rrk = 11490, |
| 11506 | VMINPHZ128rrkz = 11491, |
| 11507 | VMINPHZ256rm = 11492, |
| 11508 | VMINPHZ256rmb = 11493, |
| 11509 | VMINPHZ256rmbk = 11494, |
| 11510 | VMINPHZ256rmbkz = 11495, |
| 11511 | VMINPHZ256rmk = 11496, |
| 11512 | VMINPHZ256rmkz = 11497, |
| 11513 | VMINPHZ256rr = 11498, |
| 11514 | VMINPHZ256rrk = 11499, |
| 11515 | VMINPHZ256rrkz = 11500, |
| 11516 | VMINPHZrm = 11501, |
| 11517 | VMINPHZrmb = 11502, |
| 11518 | VMINPHZrmbk = 11503, |
| 11519 | VMINPHZrmbkz = 11504, |
| 11520 | VMINPHZrmk = 11505, |
| 11521 | VMINPHZrmkz = 11506, |
| 11522 | VMINPHZrr = 11507, |
| 11523 | VMINPHZrrb = 11508, |
| 11524 | VMINPHZrrbk = 11509, |
| 11525 | VMINPHZrrbkz = 11510, |
| 11526 | VMINPHZrrk = 11511, |
| 11527 | VMINPHZrrkz = 11512, |
| 11528 | VMINPSYrm = 11513, |
| 11529 | VMINPSYrr = 11514, |
| 11530 | VMINPSZ128rm = 11515, |
| 11531 | VMINPSZ128rmb = 11516, |
| 11532 | VMINPSZ128rmbk = 11517, |
| 11533 | VMINPSZ128rmbkz = 11518, |
| 11534 | VMINPSZ128rmk = 11519, |
| 11535 | VMINPSZ128rmkz = 11520, |
| 11536 | VMINPSZ128rr = 11521, |
| 11537 | VMINPSZ128rrk = 11522, |
| 11538 | VMINPSZ128rrkz = 11523, |
| 11539 | VMINPSZ256rm = 11524, |
| 11540 | VMINPSZ256rmb = 11525, |
| 11541 | VMINPSZ256rmbk = 11526, |
| 11542 | VMINPSZ256rmbkz = 11527, |
| 11543 | VMINPSZ256rmk = 11528, |
| 11544 | VMINPSZ256rmkz = 11529, |
| 11545 | VMINPSZ256rr = 11530, |
| 11546 | VMINPSZ256rrk = 11531, |
| 11547 | VMINPSZ256rrkz = 11532, |
| 11548 | VMINPSZrm = 11533, |
| 11549 | VMINPSZrmb = 11534, |
| 11550 | VMINPSZrmbk = 11535, |
| 11551 | VMINPSZrmbkz = 11536, |
| 11552 | VMINPSZrmk = 11537, |
| 11553 | VMINPSZrmkz = 11538, |
| 11554 | VMINPSZrr = 11539, |
| 11555 | VMINPSZrrb = 11540, |
| 11556 | VMINPSZrrbk = 11541, |
| 11557 | VMINPSZrrbkz = 11542, |
| 11558 | VMINPSZrrk = 11543, |
| 11559 | VMINPSZrrkz = 11544, |
| 11560 | VMINPSrm = 11545, |
| 11561 | VMINPSrr = 11546, |
| 11562 | VMINSDZrm = 11547, |
| 11563 | VMINSDZrm_Int = 11548, |
| 11564 | VMINSDZrm_Intk = 11549, |
| 11565 | VMINSDZrm_Intkz = 11550, |
| 11566 | VMINSDZrr = 11551, |
| 11567 | VMINSDZrr_Int = 11552, |
| 11568 | VMINSDZrr_Intk = 11553, |
| 11569 | VMINSDZrr_Intkz = 11554, |
| 11570 | VMINSDZrrb_Int = 11555, |
| 11571 | VMINSDZrrb_Intk = 11556, |
| 11572 | VMINSDZrrb_Intkz = 11557, |
| 11573 | VMINSDrm = 11558, |
| 11574 | VMINSDrm_Int = 11559, |
| 11575 | VMINSDrr = 11560, |
| 11576 | VMINSDrr_Int = 11561, |
| 11577 | VMINSHZrm = 11562, |
| 11578 | VMINSHZrm_Int = 11563, |
| 11579 | VMINSHZrm_Intk = 11564, |
| 11580 | VMINSHZrm_Intkz = 11565, |
| 11581 | VMINSHZrr = 11566, |
| 11582 | VMINSHZrr_Int = 11567, |
| 11583 | VMINSHZrr_Intk = 11568, |
| 11584 | VMINSHZrr_Intkz = 11569, |
| 11585 | VMINSHZrrb_Int = 11570, |
| 11586 | VMINSHZrrb_Intk = 11571, |
| 11587 | VMINSHZrrb_Intkz = 11572, |
| 11588 | VMINSSZrm = 11573, |
| 11589 | VMINSSZrm_Int = 11574, |
| 11590 | VMINSSZrm_Intk = 11575, |
| 11591 | VMINSSZrm_Intkz = 11576, |
| 11592 | VMINSSZrr = 11577, |
| 11593 | VMINSSZrr_Int = 11578, |
| 11594 | VMINSSZrr_Intk = 11579, |
| 11595 | VMINSSZrr_Intkz = 11580, |
| 11596 | VMINSSZrrb_Int = 11581, |
| 11597 | VMINSSZrrb_Intk = 11582, |
| 11598 | VMINSSZrrb_Intkz = 11583, |
| 11599 | VMINSSrm = 11584, |
| 11600 | VMINSSrm_Int = 11585, |
| 11601 | VMINSSrr = 11586, |
| 11602 | VMINSSrr_Int = 11587, |
| 11603 | VMLAUNCH = 11588, |
| 11604 | VMLOAD32 = 11589, |
| 11605 | VMLOAD64 = 11590, |
| 11606 | VMMCALL = 11591, |
| 11607 | VMOV64toPQIZrm = 11592, |
| 11608 | VMOV64toPQIZrr = 11593, |
| 11609 | VMOV64toPQIrm = 11594, |
| 11610 | VMOV64toPQIrr = 11595, |
| 11611 | VMOV64toSDZrr = 11596, |
| 11612 | VMOV64toSDrr = 11597, |
| 11613 | VMOVAPDYmr = 11598, |
| 11614 | VMOVAPDYrm = 11599, |
| 11615 | VMOVAPDYrr = 11600, |
| 11616 | VMOVAPDYrr_REV = 11601, |
| 11617 | VMOVAPDZ128mr = 11602, |
| 11618 | VMOVAPDZ128mrk = 11603, |
| 11619 | VMOVAPDZ128rm = 11604, |
| 11620 | VMOVAPDZ128rmk = 11605, |
| 11621 | VMOVAPDZ128rmkz = 11606, |
| 11622 | VMOVAPDZ128rr = 11607, |
| 11623 | VMOVAPDZ128rr_REV = 11608, |
| 11624 | VMOVAPDZ128rrk = 11609, |
| 11625 | VMOVAPDZ128rrk_REV = 11610, |
| 11626 | VMOVAPDZ128rrkz = 11611, |
| 11627 | VMOVAPDZ128rrkz_REV = 11612, |
| 11628 | VMOVAPDZ256mr = 11613, |
| 11629 | VMOVAPDZ256mrk = 11614, |
| 11630 | VMOVAPDZ256rm = 11615, |
| 11631 | VMOVAPDZ256rmk = 11616, |
| 11632 | VMOVAPDZ256rmkz = 11617, |
| 11633 | VMOVAPDZ256rr = 11618, |
| 11634 | VMOVAPDZ256rr_REV = 11619, |
| 11635 | VMOVAPDZ256rrk = 11620, |
| 11636 | VMOVAPDZ256rrk_REV = 11621, |
| 11637 | VMOVAPDZ256rrkz = 11622, |
| 11638 | VMOVAPDZ256rrkz_REV = 11623, |
| 11639 | VMOVAPDZmr = 11624, |
| 11640 | VMOVAPDZmrk = 11625, |
| 11641 | VMOVAPDZrm = 11626, |
| 11642 | VMOVAPDZrmk = 11627, |
| 11643 | VMOVAPDZrmkz = 11628, |
| 11644 | VMOVAPDZrr = 11629, |
| 11645 | VMOVAPDZrr_REV = 11630, |
| 11646 | VMOVAPDZrrk = 11631, |
| 11647 | VMOVAPDZrrk_REV = 11632, |
| 11648 | VMOVAPDZrrkz = 11633, |
| 11649 | VMOVAPDZrrkz_REV = 11634, |
| 11650 | VMOVAPDmr = 11635, |
| 11651 | VMOVAPDrm = 11636, |
| 11652 | VMOVAPDrr = 11637, |
| 11653 | VMOVAPDrr_REV = 11638, |
| 11654 | VMOVAPSYmr = 11639, |
| 11655 | VMOVAPSYrm = 11640, |
| 11656 | VMOVAPSYrr = 11641, |
| 11657 | VMOVAPSYrr_REV = 11642, |
| 11658 | VMOVAPSZ128mr = 11643, |
| 11659 | VMOVAPSZ128mrk = 11644, |
| 11660 | VMOVAPSZ128rm = 11645, |
| 11661 | VMOVAPSZ128rmk = 11646, |
| 11662 | VMOVAPSZ128rmkz = 11647, |
| 11663 | VMOVAPSZ128rr = 11648, |
| 11664 | VMOVAPSZ128rr_REV = 11649, |
| 11665 | VMOVAPSZ128rrk = 11650, |
| 11666 | VMOVAPSZ128rrk_REV = 11651, |
| 11667 | VMOVAPSZ128rrkz = 11652, |
| 11668 | VMOVAPSZ128rrkz_REV = 11653, |
| 11669 | VMOVAPSZ256mr = 11654, |
| 11670 | VMOVAPSZ256mrk = 11655, |
| 11671 | VMOVAPSZ256rm = 11656, |
| 11672 | VMOVAPSZ256rmk = 11657, |
| 11673 | VMOVAPSZ256rmkz = 11658, |
| 11674 | VMOVAPSZ256rr = 11659, |
| 11675 | VMOVAPSZ256rr_REV = 11660, |
| 11676 | VMOVAPSZ256rrk = 11661, |
| 11677 | VMOVAPSZ256rrk_REV = 11662, |
| 11678 | VMOVAPSZ256rrkz = 11663, |
| 11679 | VMOVAPSZ256rrkz_REV = 11664, |
| 11680 | VMOVAPSZmr = 11665, |
| 11681 | VMOVAPSZmrk = 11666, |
| 11682 | VMOVAPSZrm = 11667, |
| 11683 | VMOVAPSZrmk = 11668, |
| 11684 | VMOVAPSZrmkz = 11669, |
| 11685 | VMOVAPSZrr = 11670, |
| 11686 | VMOVAPSZrr_REV = 11671, |
| 11687 | VMOVAPSZrrk = 11672, |
| 11688 | VMOVAPSZrrk_REV = 11673, |
| 11689 | VMOVAPSZrrkz = 11674, |
| 11690 | VMOVAPSZrrkz_REV = 11675, |
| 11691 | VMOVAPSmr = 11676, |
| 11692 | VMOVAPSrm = 11677, |
| 11693 | VMOVAPSrr = 11678, |
| 11694 | VMOVAPSrr_REV = 11679, |
| 11695 | VMOVDDUPYrm = 11680, |
| 11696 | VMOVDDUPYrr = 11681, |
| 11697 | VMOVDDUPZ128rm = 11682, |
| 11698 | VMOVDDUPZ128rmk = 11683, |
| 11699 | VMOVDDUPZ128rmkz = 11684, |
| 11700 | VMOVDDUPZ128rr = 11685, |
| 11701 | VMOVDDUPZ128rrk = 11686, |
| 11702 | VMOVDDUPZ128rrkz = 11687, |
| 11703 | VMOVDDUPZ256rm = 11688, |
| 11704 | VMOVDDUPZ256rmk = 11689, |
| 11705 | VMOVDDUPZ256rmkz = 11690, |
| 11706 | VMOVDDUPZ256rr = 11691, |
| 11707 | VMOVDDUPZ256rrk = 11692, |
| 11708 | VMOVDDUPZ256rrkz = 11693, |
| 11709 | VMOVDDUPZrm = 11694, |
| 11710 | VMOVDDUPZrmk = 11695, |
| 11711 | VMOVDDUPZrmkz = 11696, |
| 11712 | VMOVDDUPZrr = 11697, |
| 11713 | VMOVDDUPZrrk = 11698, |
| 11714 | VMOVDDUPZrrkz = 11699, |
| 11715 | VMOVDDUPrm = 11700, |
| 11716 | VMOVDDUPrr = 11701, |
| 11717 | VMOVDI2PDIZrm = 11702, |
| 11718 | VMOVDI2PDIZrr = 11703, |
| 11719 | VMOVDI2PDIrm = 11704, |
| 11720 | VMOVDI2PDIrr = 11705, |
| 11721 | VMOVDI2SSZrr = 11706, |
| 11722 | VMOVDI2SSrr = 11707, |
| 11723 | VMOVDQA32Z128mr = 11708, |
| 11724 | VMOVDQA32Z128mrk = 11709, |
| 11725 | VMOVDQA32Z128rm = 11710, |
| 11726 | VMOVDQA32Z128rmk = 11711, |
| 11727 | VMOVDQA32Z128rmkz = 11712, |
| 11728 | VMOVDQA32Z128rr = 11713, |
| 11729 | VMOVDQA32Z128rr_REV = 11714, |
| 11730 | VMOVDQA32Z128rrk = 11715, |
| 11731 | VMOVDQA32Z128rrk_REV = 11716, |
| 11732 | VMOVDQA32Z128rrkz = 11717, |
| 11733 | VMOVDQA32Z128rrkz_REV = 11718, |
| 11734 | VMOVDQA32Z256mr = 11719, |
| 11735 | VMOVDQA32Z256mrk = 11720, |
| 11736 | VMOVDQA32Z256rm = 11721, |
| 11737 | VMOVDQA32Z256rmk = 11722, |
| 11738 | VMOVDQA32Z256rmkz = 11723, |
| 11739 | VMOVDQA32Z256rr = 11724, |
| 11740 | VMOVDQA32Z256rr_REV = 11725, |
| 11741 | VMOVDQA32Z256rrk = 11726, |
| 11742 | VMOVDQA32Z256rrk_REV = 11727, |
| 11743 | VMOVDQA32Z256rrkz = 11728, |
| 11744 | VMOVDQA32Z256rrkz_REV = 11729, |
| 11745 | VMOVDQA32Zmr = 11730, |
| 11746 | VMOVDQA32Zmrk = 11731, |
| 11747 | VMOVDQA32Zrm = 11732, |
| 11748 | VMOVDQA32Zrmk = 11733, |
| 11749 | VMOVDQA32Zrmkz = 11734, |
| 11750 | VMOVDQA32Zrr = 11735, |
| 11751 | VMOVDQA32Zrr_REV = 11736, |
| 11752 | VMOVDQA32Zrrk = 11737, |
| 11753 | VMOVDQA32Zrrk_REV = 11738, |
| 11754 | VMOVDQA32Zrrkz = 11739, |
| 11755 | VMOVDQA32Zrrkz_REV = 11740, |
| 11756 | VMOVDQA64Z128mr = 11741, |
| 11757 | VMOVDQA64Z128mrk = 11742, |
| 11758 | VMOVDQA64Z128rm = 11743, |
| 11759 | VMOVDQA64Z128rmk = 11744, |
| 11760 | VMOVDQA64Z128rmkz = 11745, |
| 11761 | VMOVDQA64Z128rr = 11746, |
| 11762 | VMOVDQA64Z128rr_REV = 11747, |
| 11763 | VMOVDQA64Z128rrk = 11748, |
| 11764 | VMOVDQA64Z128rrk_REV = 11749, |
| 11765 | VMOVDQA64Z128rrkz = 11750, |
| 11766 | VMOVDQA64Z128rrkz_REV = 11751, |
| 11767 | VMOVDQA64Z256mr = 11752, |
| 11768 | VMOVDQA64Z256mrk = 11753, |
| 11769 | VMOVDQA64Z256rm = 11754, |
| 11770 | VMOVDQA64Z256rmk = 11755, |
| 11771 | VMOVDQA64Z256rmkz = 11756, |
| 11772 | VMOVDQA64Z256rr = 11757, |
| 11773 | VMOVDQA64Z256rr_REV = 11758, |
| 11774 | VMOVDQA64Z256rrk = 11759, |
| 11775 | VMOVDQA64Z256rrk_REV = 11760, |
| 11776 | VMOVDQA64Z256rrkz = 11761, |
| 11777 | VMOVDQA64Z256rrkz_REV = 11762, |
| 11778 | VMOVDQA64Zmr = 11763, |
| 11779 | VMOVDQA64Zmrk = 11764, |
| 11780 | VMOVDQA64Zrm = 11765, |
| 11781 | VMOVDQA64Zrmk = 11766, |
| 11782 | VMOVDQA64Zrmkz = 11767, |
| 11783 | VMOVDQA64Zrr = 11768, |
| 11784 | VMOVDQA64Zrr_REV = 11769, |
| 11785 | VMOVDQA64Zrrk = 11770, |
| 11786 | VMOVDQA64Zrrk_REV = 11771, |
| 11787 | VMOVDQA64Zrrkz = 11772, |
| 11788 | VMOVDQA64Zrrkz_REV = 11773, |
| 11789 | VMOVDQAYmr = 11774, |
| 11790 | VMOVDQAYrm = 11775, |
| 11791 | VMOVDQAYrr = 11776, |
| 11792 | VMOVDQAYrr_REV = 11777, |
| 11793 | VMOVDQAmr = 11778, |
| 11794 | VMOVDQArm = 11779, |
| 11795 | VMOVDQArr = 11780, |
| 11796 | VMOVDQArr_REV = 11781, |
| 11797 | VMOVDQU16Z128mr = 11782, |
| 11798 | VMOVDQU16Z128mrk = 11783, |
| 11799 | VMOVDQU16Z128rm = 11784, |
| 11800 | VMOVDQU16Z128rmk = 11785, |
| 11801 | VMOVDQU16Z128rmkz = 11786, |
| 11802 | VMOVDQU16Z128rr = 11787, |
| 11803 | VMOVDQU16Z128rr_REV = 11788, |
| 11804 | VMOVDQU16Z128rrk = 11789, |
| 11805 | VMOVDQU16Z128rrk_REV = 11790, |
| 11806 | VMOVDQU16Z128rrkz = 11791, |
| 11807 | VMOVDQU16Z128rrkz_REV = 11792, |
| 11808 | VMOVDQU16Z256mr = 11793, |
| 11809 | VMOVDQU16Z256mrk = 11794, |
| 11810 | VMOVDQU16Z256rm = 11795, |
| 11811 | VMOVDQU16Z256rmk = 11796, |
| 11812 | VMOVDQU16Z256rmkz = 11797, |
| 11813 | VMOVDQU16Z256rr = 11798, |
| 11814 | VMOVDQU16Z256rr_REV = 11799, |
| 11815 | VMOVDQU16Z256rrk = 11800, |
| 11816 | VMOVDQU16Z256rrk_REV = 11801, |
| 11817 | VMOVDQU16Z256rrkz = 11802, |
| 11818 | VMOVDQU16Z256rrkz_REV = 11803, |
| 11819 | VMOVDQU16Zmr = 11804, |
| 11820 | VMOVDQU16Zmrk = 11805, |
| 11821 | VMOVDQU16Zrm = 11806, |
| 11822 | VMOVDQU16Zrmk = 11807, |
| 11823 | VMOVDQU16Zrmkz = 11808, |
| 11824 | VMOVDQU16Zrr = 11809, |
| 11825 | VMOVDQU16Zrr_REV = 11810, |
| 11826 | VMOVDQU16Zrrk = 11811, |
| 11827 | VMOVDQU16Zrrk_REV = 11812, |
| 11828 | VMOVDQU16Zrrkz = 11813, |
| 11829 | VMOVDQU16Zrrkz_REV = 11814, |
| 11830 | VMOVDQU32Z128mr = 11815, |
| 11831 | VMOVDQU32Z128mrk = 11816, |
| 11832 | VMOVDQU32Z128rm = 11817, |
| 11833 | VMOVDQU32Z128rmk = 11818, |
| 11834 | VMOVDQU32Z128rmkz = 11819, |
| 11835 | VMOVDQU32Z128rr = 11820, |
| 11836 | VMOVDQU32Z128rr_REV = 11821, |
| 11837 | VMOVDQU32Z128rrk = 11822, |
| 11838 | VMOVDQU32Z128rrk_REV = 11823, |
| 11839 | VMOVDQU32Z128rrkz = 11824, |
| 11840 | VMOVDQU32Z128rrkz_REV = 11825, |
| 11841 | VMOVDQU32Z256mr = 11826, |
| 11842 | VMOVDQU32Z256mrk = 11827, |
| 11843 | VMOVDQU32Z256rm = 11828, |
| 11844 | VMOVDQU32Z256rmk = 11829, |
| 11845 | VMOVDQU32Z256rmkz = 11830, |
| 11846 | VMOVDQU32Z256rr = 11831, |
| 11847 | VMOVDQU32Z256rr_REV = 11832, |
| 11848 | VMOVDQU32Z256rrk = 11833, |
| 11849 | VMOVDQU32Z256rrk_REV = 11834, |
| 11850 | VMOVDQU32Z256rrkz = 11835, |
| 11851 | VMOVDQU32Z256rrkz_REV = 11836, |
| 11852 | VMOVDQU32Zmr = 11837, |
| 11853 | VMOVDQU32Zmrk = 11838, |
| 11854 | VMOVDQU32Zrm = 11839, |
| 11855 | VMOVDQU32Zrmk = 11840, |
| 11856 | VMOVDQU32Zrmkz = 11841, |
| 11857 | VMOVDQU32Zrr = 11842, |
| 11858 | VMOVDQU32Zrr_REV = 11843, |
| 11859 | VMOVDQU32Zrrk = 11844, |
| 11860 | VMOVDQU32Zrrk_REV = 11845, |
| 11861 | VMOVDQU32Zrrkz = 11846, |
| 11862 | VMOVDQU32Zrrkz_REV = 11847, |
| 11863 | VMOVDQU64Z128mr = 11848, |
| 11864 | VMOVDQU64Z128mrk = 11849, |
| 11865 | VMOVDQU64Z128rm = 11850, |
| 11866 | VMOVDQU64Z128rmk = 11851, |
| 11867 | VMOVDQU64Z128rmkz = 11852, |
| 11868 | VMOVDQU64Z128rr = 11853, |
| 11869 | VMOVDQU64Z128rr_REV = 11854, |
| 11870 | VMOVDQU64Z128rrk = 11855, |
| 11871 | VMOVDQU64Z128rrk_REV = 11856, |
| 11872 | VMOVDQU64Z128rrkz = 11857, |
| 11873 | VMOVDQU64Z128rrkz_REV = 11858, |
| 11874 | VMOVDQU64Z256mr = 11859, |
| 11875 | VMOVDQU64Z256mrk = 11860, |
| 11876 | VMOVDQU64Z256rm = 11861, |
| 11877 | VMOVDQU64Z256rmk = 11862, |
| 11878 | VMOVDQU64Z256rmkz = 11863, |
| 11879 | VMOVDQU64Z256rr = 11864, |
| 11880 | VMOVDQU64Z256rr_REV = 11865, |
| 11881 | VMOVDQU64Z256rrk = 11866, |
| 11882 | VMOVDQU64Z256rrk_REV = 11867, |
| 11883 | VMOVDQU64Z256rrkz = 11868, |
| 11884 | VMOVDQU64Z256rrkz_REV = 11869, |
| 11885 | VMOVDQU64Zmr = 11870, |
| 11886 | VMOVDQU64Zmrk = 11871, |
| 11887 | VMOVDQU64Zrm = 11872, |
| 11888 | VMOVDQU64Zrmk = 11873, |
| 11889 | VMOVDQU64Zrmkz = 11874, |
| 11890 | VMOVDQU64Zrr = 11875, |
| 11891 | VMOVDQU64Zrr_REV = 11876, |
| 11892 | VMOVDQU64Zrrk = 11877, |
| 11893 | VMOVDQU64Zrrk_REV = 11878, |
| 11894 | VMOVDQU64Zrrkz = 11879, |
| 11895 | VMOVDQU64Zrrkz_REV = 11880, |
| 11896 | VMOVDQU8Z128mr = 11881, |
| 11897 | VMOVDQU8Z128mrk = 11882, |
| 11898 | VMOVDQU8Z128rm = 11883, |
| 11899 | VMOVDQU8Z128rmk = 11884, |
| 11900 | VMOVDQU8Z128rmkz = 11885, |
| 11901 | VMOVDQU8Z128rr = 11886, |
| 11902 | VMOVDQU8Z128rr_REV = 11887, |
| 11903 | VMOVDQU8Z128rrk = 11888, |
| 11904 | VMOVDQU8Z128rrk_REV = 11889, |
| 11905 | VMOVDQU8Z128rrkz = 11890, |
| 11906 | VMOVDQU8Z128rrkz_REV = 11891, |
| 11907 | VMOVDQU8Z256mr = 11892, |
| 11908 | VMOVDQU8Z256mrk = 11893, |
| 11909 | VMOVDQU8Z256rm = 11894, |
| 11910 | VMOVDQU8Z256rmk = 11895, |
| 11911 | VMOVDQU8Z256rmkz = 11896, |
| 11912 | VMOVDQU8Z256rr = 11897, |
| 11913 | VMOVDQU8Z256rr_REV = 11898, |
| 11914 | VMOVDQU8Z256rrk = 11899, |
| 11915 | VMOVDQU8Z256rrk_REV = 11900, |
| 11916 | VMOVDQU8Z256rrkz = 11901, |
| 11917 | VMOVDQU8Z256rrkz_REV = 11902, |
| 11918 | VMOVDQU8Zmr = 11903, |
| 11919 | VMOVDQU8Zmrk = 11904, |
| 11920 | VMOVDQU8Zrm = 11905, |
| 11921 | VMOVDQU8Zrmk = 11906, |
| 11922 | VMOVDQU8Zrmkz = 11907, |
| 11923 | VMOVDQU8Zrr = 11908, |
| 11924 | VMOVDQU8Zrr_REV = 11909, |
| 11925 | VMOVDQU8Zrrk = 11910, |
| 11926 | VMOVDQU8Zrrk_REV = 11911, |
| 11927 | VMOVDQU8Zrrkz = 11912, |
| 11928 | VMOVDQU8Zrrkz_REV = 11913, |
| 11929 | VMOVDQUYmr = 11914, |
| 11930 | VMOVDQUYrm = 11915, |
| 11931 | VMOVDQUYrr = 11916, |
| 11932 | VMOVDQUYrr_REV = 11917, |
| 11933 | VMOVDQUmr = 11918, |
| 11934 | VMOVDQUrm = 11919, |
| 11935 | VMOVDQUrr = 11920, |
| 11936 | VMOVDQUrr_REV = 11921, |
| 11937 | VMOVHLPSZrr = 11922, |
| 11938 | VMOVHLPSrr = 11923, |
| 11939 | VMOVHPDZ128mr = 11924, |
| 11940 | VMOVHPDZ128rm = 11925, |
| 11941 | VMOVHPDmr = 11926, |
| 11942 | VMOVHPDrm = 11927, |
| 11943 | VMOVHPSZ128mr = 11928, |
| 11944 | VMOVHPSZ128rm = 11929, |
| 11945 | VMOVHPSmr = 11930, |
| 11946 | VMOVHPSrm = 11931, |
| 11947 | VMOVLHPSZrr = 11932, |
| 11948 | VMOVLHPSrr = 11933, |
| 11949 | VMOVLPDZ128mr = 11934, |
| 11950 | VMOVLPDZ128rm = 11935, |
| 11951 | VMOVLPDmr = 11936, |
| 11952 | VMOVLPDrm = 11937, |
| 11953 | VMOVLPSZ128mr = 11938, |
| 11954 | VMOVLPSZ128rm = 11939, |
| 11955 | VMOVLPSmr = 11940, |
| 11956 | VMOVLPSrm = 11941, |
| 11957 | VMOVMSKPDYrr = 11942, |
| 11958 | VMOVMSKPDrr = 11943, |
| 11959 | VMOVMSKPSYrr = 11944, |
| 11960 | VMOVMSKPSrr = 11945, |
| 11961 | VMOVNTDQAYrm = 11946, |
| 11962 | VMOVNTDQAZ128rm = 11947, |
| 11963 | VMOVNTDQAZ256rm = 11948, |
| 11964 | VMOVNTDQAZrm = 11949, |
| 11965 | VMOVNTDQArm = 11950, |
| 11966 | VMOVNTDQYmr = 11951, |
| 11967 | VMOVNTDQZ128mr = 11952, |
| 11968 | VMOVNTDQZ256mr = 11953, |
| 11969 | VMOVNTDQZmr = 11954, |
| 11970 | VMOVNTDQmr = 11955, |
| 11971 | VMOVNTPDYmr = 11956, |
| 11972 | VMOVNTPDZ128mr = 11957, |
| 11973 | VMOVNTPDZ256mr = 11958, |
| 11974 | VMOVNTPDZmr = 11959, |
| 11975 | VMOVNTPDmr = 11960, |
| 11976 | VMOVNTPSYmr = 11961, |
| 11977 | VMOVNTPSZ128mr = 11962, |
| 11978 | VMOVNTPSZ256mr = 11963, |
| 11979 | VMOVNTPSZmr = 11964, |
| 11980 | VMOVNTPSmr = 11965, |
| 11981 | VMOVPDI2DIZmr = 11966, |
| 11982 | VMOVPDI2DIZrr = 11967, |
| 11983 | VMOVPDI2DImr = 11968, |
| 11984 | VMOVPDI2DIrr = 11969, |
| 11985 | VMOVPQI2QIZmr = 11970, |
| 11986 | VMOVPQI2QIZrr = 11971, |
| 11987 | VMOVPQI2QImr = 11972, |
| 11988 | VMOVPQI2QIrr = 11973, |
| 11989 | VMOVPQIto64Zmr = 11974, |
| 11990 | VMOVPQIto64Zrr = 11975, |
| 11991 | VMOVPQIto64mr = 11976, |
| 11992 | VMOVPQIto64rr = 11977, |
| 11993 | VMOVQI2PQIZrm = 11978, |
| 11994 | VMOVQI2PQIrm = 11979, |
| 11995 | VMOVSDZmr = 11980, |
| 11996 | VMOVSDZmrk = 11981, |
| 11997 | VMOVSDZrm = 11982, |
| 11998 | VMOVSDZrm_alt = 11983, |
| 11999 | VMOVSDZrmk = 11984, |
| 12000 | VMOVSDZrmkz = 11985, |
| 12001 | VMOVSDZrr = 11986, |
| 12002 | VMOVSDZrr_REV = 11987, |
| 12003 | VMOVSDZrrk = 11988, |
| 12004 | VMOVSDZrrk_REV = 11989, |
| 12005 | VMOVSDZrrkz = 11990, |
| 12006 | VMOVSDZrrkz_REV = 11991, |
| 12007 | VMOVSDmr = 11992, |
| 12008 | VMOVSDrm = 11993, |
| 12009 | VMOVSDrm_alt = 11994, |
| 12010 | VMOVSDrr = 11995, |
| 12011 | VMOVSDrr_REV = 11996, |
| 12012 | VMOVSDto64Zrr = 11997, |
| 12013 | VMOVSDto64rr = 11998, |
| 12014 | VMOVSH2Wrr = 11999, |
| 12015 | VMOVSHDUPYrm = 12000, |
| 12016 | VMOVSHDUPYrr = 12001, |
| 12017 | VMOVSHDUPZ128rm = 12002, |
| 12018 | VMOVSHDUPZ128rmk = 12003, |
| 12019 | VMOVSHDUPZ128rmkz = 12004, |
| 12020 | VMOVSHDUPZ128rr = 12005, |
| 12021 | VMOVSHDUPZ128rrk = 12006, |
| 12022 | VMOVSHDUPZ128rrkz = 12007, |
| 12023 | VMOVSHDUPZ256rm = 12008, |
| 12024 | VMOVSHDUPZ256rmk = 12009, |
| 12025 | VMOVSHDUPZ256rmkz = 12010, |
| 12026 | VMOVSHDUPZ256rr = 12011, |
| 12027 | VMOVSHDUPZ256rrk = 12012, |
| 12028 | VMOVSHDUPZ256rrkz = 12013, |
| 12029 | VMOVSHDUPZrm = 12014, |
| 12030 | VMOVSHDUPZrmk = 12015, |
| 12031 | VMOVSHDUPZrmkz = 12016, |
| 12032 | VMOVSHDUPZrr = 12017, |
| 12033 | VMOVSHDUPZrrk = 12018, |
| 12034 | VMOVSHDUPZrrkz = 12019, |
| 12035 | VMOVSHDUPrm = 12020, |
| 12036 | VMOVSHDUPrr = 12021, |
| 12037 | VMOVSHZmr = 12022, |
| 12038 | VMOVSHZmrk = 12023, |
| 12039 | VMOVSHZrm = 12024, |
| 12040 | VMOVSHZrm_alt = 12025, |
| 12041 | VMOVSHZrmk = 12026, |
| 12042 | VMOVSHZrmkz = 12027, |
| 12043 | VMOVSHZrr = 12028, |
| 12044 | VMOVSHZrr_REV = 12029, |
| 12045 | VMOVSHZrrk = 12030, |
| 12046 | VMOVSHZrrk_REV = 12031, |
| 12047 | VMOVSHZrrkz = 12032, |
| 12048 | VMOVSHZrrkz_REV = 12033, |
| 12049 | VMOVSHtoW64rr = 12034, |
| 12050 | VMOVSLDUPYrm = 12035, |
| 12051 | VMOVSLDUPYrr = 12036, |
| 12052 | VMOVSLDUPZ128rm = 12037, |
| 12053 | VMOVSLDUPZ128rmk = 12038, |
| 12054 | VMOVSLDUPZ128rmkz = 12039, |
| 12055 | VMOVSLDUPZ128rr = 12040, |
| 12056 | VMOVSLDUPZ128rrk = 12041, |
| 12057 | VMOVSLDUPZ128rrkz = 12042, |
| 12058 | VMOVSLDUPZ256rm = 12043, |
| 12059 | VMOVSLDUPZ256rmk = 12044, |
| 12060 | VMOVSLDUPZ256rmkz = 12045, |
| 12061 | VMOVSLDUPZ256rr = 12046, |
| 12062 | VMOVSLDUPZ256rrk = 12047, |
| 12063 | VMOVSLDUPZ256rrkz = 12048, |
| 12064 | VMOVSLDUPZrm = 12049, |
| 12065 | VMOVSLDUPZrmk = 12050, |
| 12066 | VMOVSLDUPZrmkz = 12051, |
| 12067 | VMOVSLDUPZrr = 12052, |
| 12068 | VMOVSLDUPZrrk = 12053, |
| 12069 | VMOVSLDUPZrrkz = 12054, |
| 12070 | VMOVSLDUPrm = 12055, |
| 12071 | VMOVSLDUPrr = 12056, |
| 12072 | VMOVSS2DIZrr = 12057, |
| 12073 | VMOVSS2DIrr = 12058, |
| 12074 | VMOVSSZmr = 12059, |
| 12075 | VMOVSSZmrk = 12060, |
| 12076 | VMOVSSZrm = 12061, |
| 12077 | VMOVSSZrm_alt = 12062, |
| 12078 | VMOVSSZrmk = 12063, |
| 12079 | VMOVSSZrmkz = 12064, |
| 12080 | VMOVSSZrr = 12065, |
| 12081 | VMOVSSZrr_REV = 12066, |
| 12082 | VMOVSSZrrk = 12067, |
| 12083 | VMOVSSZrrk_REV = 12068, |
| 12084 | VMOVSSZrrkz = 12069, |
| 12085 | VMOVSSZrrkz_REV = 12070, |
| 12086 | VMOVSSmr = 12071, |
| 12087 | VMOVSSrm = 12072, |
| 12088 | VMOVSSrm_alt = 12073, |
| 12089 | VMOVSSrr = 12074, |
| 12090 | VMOVSSrr_REV = 12075, |
| 12091 | VMOVUPDYmr = 12076, |
| 12092 | VMOVUPDYrm = 12077, |
| 12093 | VMOVUPDYrr = 12078, |
| 12094 | VMOVUPDYrr_REV = 12079, |
| 12095 | VMOVUPDZ128mr = 12080, |
| 12096 | VMOVUPDZ128mrk = 12081, |
| 12097 | VMOVUPDZ128rm = 12082, |
| 12098 | VMOVUPDZ128rmk = 12083, |
| 12099 | VMOVUPDZ128rmkz = 12084, |
| 12100 | VMOVUPDZ128rr = 12085, |
| 12101 | VMOVUPDZ128rr_REV = 12086, |
| 12102 | VMOVUPDZ128rrk = 12087, |
| 12103 | VMOVUPDZ128rrk_REV = 12088, |
| 12104 | VMOVUPDZ128rrkz = 12089, |
| 12105 | VMOVUPDZ128rrkz_REV = 12090, |
| 12106 | VMOVUPDZ256mr = 12091, |
| 12107 | VMOVUPDZ256mrk = 12092, |
| 12108 | VMOVUPDZ256rm = 12093, |
| 12109 | VMOVUPDZ256rmk = 12094, |
| 12110 | VMOVUPDZ256rmkz = 12095, |
| 12111 | VMOVUPDZ256rr = 12096, |
| 12112 | VMOVUPDZ256rr_REV = 12097, |
| 12113 | VMOVUPDZ256rrk = 12098, |
| 12114 | VMOVUPDZ256rrk_REV = 12099, |
| 12115 | VMOVUPDZ256rrkz = 12100, |
| 12116 | VMOVUPDZ256rrkz_REV = 12101, |
| 12117 | VMOVUPDZmr = 12102, |
| 12118 | VMOVUPDZmrk = 12103, |
| 12119 | VMOVUPDZrm = 12104, |
| 12120 | VMOVUPDZrmk = 12105, |
| 12121 | VMOVUPDZrmkz = 12106, |
| 12122 | VMOVUPDZrr = 12107, |
| 12123 | VMOVUPDZrr_REV = 12108, |
| 12124 | VMOVUPDZrrk = 12109, |
| 12125 | VMOVUPDZrrk_REV = 12110, |
| 12126 | VMOVUPDZrrkz = 12111, |
| 12127 | VMOVUPDZrrkz_REV = 12112, |
| 12128 | VMOVUPDmr = 12113, |
| 12129 | VMOVUPDrm = 12114, |
| 12130 | VMOVUPDrr = 12115, |
| 12131 | VMOVUPDrr_REV = 12116, |
| 12132 | VMOVUPSYmr = 12117, |
| 12133 | VMOVUPSYrm = 12118, |
| 12134 | VMOVUPSYrr = 12119, |
| 12135 | VMOVUPSYrr_REV = 12120, |
| 12136 | VMOVUPSZ128mr = 12121, |
| 12137 | VMOVUPSZ128mrk = 12122, |
| 12138 | VMOVUPSZ128rm = 12123, |
| 12139 | VMOVUPSZ128rmk = 12124, |
| 12140 | VMOVUPSZ128rmkz = 12125, |
| 12141 | VMOVUPSZ128rr = 12126, |
| 12142 | VMOVUPSZ128rr_REV = 12127, |
| 12143 | VMOVUPSZ128rrk = 12128, |
| 12144 | VMOVUPSZ128rrk_REV = 12129, |
| 12145 | VMOVUPSZ128rrkz = 12130, |
| 12146 | VMOVUPSZ128rrkz_REV = 12131, |
| 12147 | VMOVUPSZ256mr = 12132, |
| 12148 | VMOVUPSZ256mrk = 12133, |
| 12149 | VMOVUPSZ256rm = 12134, |
| 12150 | VMOVUPSZ256rmk = 12135, |
| 12151 | VMOVUPSZ256rmkz = 12136, |
| 12152 | VMOVUPSZ256rr = 12137, |
| 12153 | VMOVUPSZ256rr_REV = 12138, |
| 12154 | VMOVUPSZ256rrk = 12139, |
| 12155 | VMOVUPSZ256rrk_REV = 12140, |
| 12156 | VMOVUPSZ256rrkz = 12141, |
| 12157 | VMOVUPSZ256rrkz_REV = 12142, |
| 12158 | VMOVUPSZmr = 12143, |
| 12159 | VMOVUPSZmrk = 12144, |
| 12160 | VMOVUPSZrm = 12145, |
| 12161 | VMOVUPSZrmk = 12146, |
| 12162 | VMOVUPSZrmkz = 12147, |
| 12163 | VMOVUPSZrr = 12148, |
| 12164 | VMOVUPSZrr_REV = 12149, |
| 12165 | VMOVUPSZrrk = 12150, |
| 12166 | VMOVUPSZrrk_REV = 12151, |
| 12167 | VMOVUPSZrrkz = 12152, |
| 12168 | VMOVUPSZrrkz_REV = 12153, |
| 12169 | VMOVUPSmr = 12154, |
| 12170 | VMOVUPSrm = 12155, |
| 12171 | VMOVUPSrr = 12156, |
| 12172 | VMOVUPSrr_REV = 12157, |
| 12173 | VMOVW2SHrr = 12158, |
| 12174 | VMOVW64toSHrr = 12159, |
| 12175 | VMOVWmr = 12160, |
| 12176 | VMOVWrm = 12161, |
| 12177 | VMOVZPQILo2PQIZrr = 12162, |
| 12178 | VMOVZPQILo2PQIrr = 12163, |
| 12179 | VMPSADBWYrmi = 12164, |
| 12180 | VMPSADBWYrri = 12165, |
| 12181 | VMPSADBWrmi = 12166, |
| 12182 | VMPSADBWrri = 12167, |
| 12183 | VMPTRLDm = 12168, |
| 12184 | VMPTRSTm = 12169, |
| 12185 | VMREAD32mr = 12170, |
| 12186 | VMREAD32rr = 12171, |
| 12187 | VMREAD64mr = 12172, |
| 12188 | VMREAD64rr = 12173, |
| 12189 | VMRESUME = 12174, |
| 12190 | VMRUN32 = 12175, |
| 12191 | VMRUN64 = 12176, |
| 12192 | VMSAVE32 = 12177, |
| 12193 | VMSAVE64 = 12178, |
| 12194 | VMULPDYrm = 12179, |
| 12195 | VMULPDYrr = 12180, |
| 12196 | VMULPDZ128rm = 12181, |
| 12197 | VMULPDZ128rmb = 12182, |
| 12198 | VMULPDZ128rmbk = 12183, |
| 12199 | VMULPDZ128rmbkz = 12184, |
| 12200 | VMULPDZ128rmk = 12185, |
| 12201 | VMULPDZ128rmkz = 12186, |
| 12202 | VMULPDZ128rr = 12187, |
| 12203 | VMULPDZ128rrk = 12188, |
| 12204 | VMULPDZ128rrkz = 12189, |
| 12205 | VMULPDZ256rm = 12190, |
| 12206 | VMULPDZ256rmb = 12191, |
| 12207 | VMULPDZ256rmbk = 12192, |
| 12208 | VMULPDZ256rmbkz = 12193, |
| 12209 | VMULPDZ256rmk = 12194, |
| 12210 | VMULPDZ256rmkz = 12195, |
| 12211 | VMULPDZ256rr = 12196, |
| 12212 | VMULPDZ256rrk = 12197, |
| 12213 | VMULPDZ256rrkz = 12198, |
| 12214 | VMULPDZrm = 12199, |
| 12215 | VMULPDZrmb = 12200, |
| 12216 | VMULPDZrmbk = 12201, |
| 12217 | VMULPDZrmbkz = 12202, |
| 12218 | VMULPDZrmk = 12203, |
| 12219 | VMULPDZrmkz = 12204, |
| 12220 | VMULPDZrr = 12205, |
| 12221 | VMULPDZrrb = 12206, |
| 12222 | VMULPDZrrbk = 12207, |
| 12223 | VMULPDZrrbkz = 12208, |
| 12224 | VMULPDZrrk = 12209, |
| 12225 | VMULPDZrrkz = 12210, |
| 12226 | VMULPDrm = 12211, |
| 12227 | VMULPDrr = 12212, |
| 12228 | VMULPHZ128rm = 12213, |
| 12229 | VMULPHZ128rmb = 12214, |
| 12230 | VMULPHZ128rmbk = 12215, |
| 12231 | VMULPHZ128rmbkz = 12216, |
| 12232 | VMULPHZ128rmk = 12217, |
| 12233 | VMULPHZ128rmkz = 12218, |
| 12234 | VMULPHZ128rr = 12219, |
| 12235 | VMULPHZ128rrk = 12220, |
| 12236 | VMULPHZ128rrkz = 12221, |
| 12237 | VMULPHZ256rm = 12222, |
| 12238 | VMULPHZ256rmb = 12223, |
| 12239 | VMULPHZ256rmbk = 12224, |
| 12240 | VMULPHZ256rmbkz = 12225, |
| 12241 | VMULPHZ256rmk = 12226, |
| 12242 | VMULPHZ256rmkz = 12227, |
| 12243 | VMULPHZ256rr = 12228, |
| 12244 | VMULPHZ256rrk = 12229, |
| 12245 | VMULPHZ256rrkz = 12230, |
| 12246 | VMULPHZrm = 12231, |
| 12247 | VMULPHZrmb = 12232, |
| 12248 | VMULPHZrmbk = 12233, |
| 12249 | VMULPHZrmbkz = 12234, |
| 12250 | VMULPHZrmk = 12235, |
| 12251 | VMULPHZrmkz = 12236, |
| 12252 | VMULPHZrr = 12237, |
| 12253 | VMULPHZrrb = 12238, |
| 12254 | VMULPHZrrbk = 12239, |
| 12255 | VMULPHZrrbkz = 12240, |
| 12256 | VMULPHZrrk = 12241, |
| 12257 | VMULPHZrrkz = 12242, |
| 12258 | VMULPSYrm = 12243, |
| 12259 | VMULPSYrr = 12244, |
| 12260 | VMULPSZ128rm = 12245, |
| 12261 | VMULPSZ128rmb = 12246, |
| 12262 | VMULPSZ128rmbk = 12247, |
| 12263 | VMULPSZ128rmbkz = 12248, |
| 12264 | VMULPSZ128rmk = 12249, |
| 12265 | VMULPSZ128rmkz = 12250, |
| 12266 | VMULPSZ128rr = 12251, |
| 12267 | VMULPSZ128rrk = 12252, |
| 12268 | VMULPSZ128rrkz = 12253, |
| 12269 | VMULPSZ256rm = 12254, |
| 12270 | VMULPSZ256rmb = 12255, |
| 12271 | VMULPSZ256rmbk = 12256, |
| 12272 | VMULPSZ256rmbkz = 12257, |
| 12273 | VMULPSZ256rmk = 12258, |
| 12274 | VMULPSZ256rmkz = 12259, |
| 12275 | VMULPSZ256rr = 12260, |
| 12276 | VMULPSZ256rrk = 12261, |
| 12277 | VMULPSZ256rrkz = 12262, |
| 12278 | VMULPSZrm = 12263, |
| 12279 | VMULPSZrmb = 12264, |
| 12280 | VMULPSZrmbk = 12265, |
| 12281 | VMULPSZrmbkz = 12266, |
| 12282 | VMULPSZrmk = 12267, |
| 12283 | VMULPSZrmkz = 12268, |
| 12284 | VMULPSZrr = 12269, |
| 12285 | VMULPSZrrb = 12270, |
| 12286 | VMULPSZrrbk = 12271, |
| 12287 | VMULPSZrrbkz = 12272, |
| 12288 | VMULPSZrrk = 12273, |
| 12289 | VMULPSZrrkz = 12274, |
| 12290 | VMULPSrm = 12275, |
| 12291 | VMULPSrr = 12276, |
| 12292 | VMULSDZrm = 12277, |
| 12293 | VMULSDZrm_Int = 12278, |
| 12294 | VMULSDZrm_Intk = 12279, |
| 12295 | VMULSDZrm_Intkz = 12280, |
| 12296 | VMULSDZrr = 12281, |
| 12297 | VMULSDZrr_Int = 12282, |
| 12298 | VMULSDZrr_Intk = 12283, |
| 12299 | VMULSDZrr_Intkz = 12284, |
| 12300 | VMULSDZrrb_Int = 12285, |
| 12301 | VMULSDZrrb_Intk = 12286, |
| 12302 | VMULSDZrrb_Intkz = 12287, |
| 12303 | VMULSDrm = 12288, |
| 12304 | VMULSDrm_Int = 12289, |
| 12305 | VMULSDrr = 12290, |
| 12306 | VMULSDrr_Int = 12291, |
| 12307 | VMULSHZrm = 12292, |
| 12308 | VMULSHZrm_Int = 12293, |
| 12309 | VMULSHZrm_Intk = 12294, |
| 12310 | VMULSHZrm_Intkz = 12295, |
| 12311 | VMULSHZrr = 12296, |
| 12312 | VMULSHZrr_Int = 12297, |
| 12313 | VMULSHZrr_Intk = 12298, |
| 12314 | VMULSHZrr_Intkz = 12299, |
| 12315 | VMULSHZrrb_Int = 12300, |
| 12316 | VMULSHZrrb_Intk = 12301, |
| 12317 | VMULSHZrrb_Intkz = 12302, |
| 12318 | VMULSSZrm = 12303, |
| 12319 | VMULSSZrm_Int = 12304, |
| 12320 | VMULSSZrm_Intk = 12305, |
| 12321 | VMULSSZrm_Intkz = 12306, |
| 12322 | VMULSSZrr = 12307, |
| 12323 | VMULSSZrr_Int = 12308, |
| 12324 | VMULSSZrr_Intk = 12309, |
| 12325 | VMULSSZrr_Intkz = 12310, |
| 12326 | VMULSSZrrb_Int = 12311, |
| 12327 | VMULSSZrrb_Intk = 12312, |
| 12328 | VMULSSZrrb_Intkz = 12313, |
| 12329 | VMULSSrm = 12314, |
| 12330 | VMULSSrm_Int = 12315, |
| 12331 | VMULSSrr = 12316, |
| 12332 | VMULSSrr_Int = 12317, |
| 12333 | VMWRITE32rm = 12318, |
| 12334 | VMWRITE32rr = 12319, |
| 12335 | VMWRITE64rm = 12320, |
| 12336 | VMWRITE64rr = 12321, |
| 12337 | VMXOFF = 12322, |
| 12338 | VMXON = 12323, |
| 12339 | VORPDYrm = 12324, |
| 12340 | VORPDYrr = 12325, |
| 12341 | VORPDZ128rm = 12326, |
| 12342 | VORPDZ128rmb = 12327, |
| 12343 | VORPDZ128rmbk = 12328, |
| 12344 | VORPDZ128rmbkz = 12329, |
| 12345 | VORPDZ128rmk = 12330, |
| 12346 | VORPDZ128rmkz = 12331, |
| 12347 | VORPDZ128rr = 12332, |
| 12348 | VORPDZ128rrk = 12333, |
| 12349 | VORPDZ128rrkz = 12334, |
| 12350 | VORPDZ256rm = 12335, |
| 12351 | VORPDZ256rmb = 12336, |
| 12352 | VORPDZ256rmbk = 12337, |
| 12353 | VORPDZ256rmbkz = 12338, |
| 12354 | VORPDZ256rmk = 12339, |
| 12355 | VORPDZ256rmkz = 12340, |
| 12356 | VORPDZ256rr = 12341, |
| 12357 | VORPDZ256rrk = 12342, |
| 12358 | VORPDZ256rrkz = 12343, |
| 12359 | VORPDZrm = 12344, |
| 12360 | VORPDZrmb = 12345, |
| 12361 | VORPDZrmbk = 12346, |
| 12362 | VORPDZrmbkz = 12347, |
| 12363 | VORPDZrmk = 12348, |
| 12364 | VORPDZrmkz = 12349, |
| 12365 | VORPDZrr = 12350, |
| 12366 | VORPDZrrk = 12351, |
| 12367 | VORPDZrrkz = 12352, |
| 12368 | VORPDrm = 12353, |
| 12369 | VORPDrr = 12354, |
| 12370 | VORPSYrm = 12355, |
| 12371 | VORPSYrr = 12356, |
| 12372 | VORPSZ128rm = 12357, |
| 12373 | VORPSZ128rmb = 12358, |
| 12374 | VORPSZ128rmbk = 12359, |
| 12375 | VORPSZ128rmbkz = 12360, |
| 12376 | VORPSZ128rmk = 12361, |
| 12377 | VORPSZ128rmkz = 12362, |
| 12378 | VORPSZ128rr = 12363, |
| 12379 | VORPSZ128rrk = 12364, |
| 12380 | VORPSZ128rrkz = 12365, |
| 12381 | VORPSZ256rm = 12366, |
| 12382 | VORPSZ256rmb = 12367, |
| 12383 | VORPSZ256rmbk = 12368, |
| 12384 | VORPSZ256rmbkz = 12369, |
| 12385 | VORPSZ256rmk = 12370, |
| 12386 | VORPSZ256rmkz = 12371, |
| 12387 | VORPSZ256rr = 12372, |
| 12388 | VORPSZ256rrk = 12373, |
| 12389 | VORPSZ256rrkz = 12374, |
| 12390 | VORPSZrm = 12375, |
| 12391 | VORPSZrmb = 12376, |
| 12392 | VORPSZrmbk = 12377, |
| 12393 | VORPSZrmbkz = 12378, |
| 12394 | VORPSZrmk = 12379, |
| 12395 | VORPSZrmkz = 12380, |
| 12396 | VORPSZrr = 12381, |
| 12397 | VORPSZrrk = 12382, |
| 12398 | VORPSZrrkz = 12383, |
| 12399 | VORPSrm = 12384, |
| 12400 | VORPSrr = 12385, |
| 12401 | VP2INTERSECTDZ128rm = 12386, |
| 12402 | VP2INTERSECTDZ128rmb = 12387, |
| 12403 | VP2INTERSECTDZ128rr = 12388, |
| 12404 | VP2INTERSECTDZ256rm = 12389, |
| 12405 | VP2INTERSECTDZ256rmb = 12390, |
| 12406 | VP2INTERSECTDZ256rr = 12391, |
| 12407 | VP2INTERSECTDZrm = 12392, |
| 12408 | VP2INTERSECTDZrmb = 12393, |
| 12409 | VP2INTERSECTDZrr = 12394, |
| 12410 | VP2INTERSECTQZ128rm = 12395, |
| 12411 | VP2INTERSECTQZ128rmb = 12396, |
| 12412 | VP2INTERSECTQZ128rr = 12397, |
| 12413 | VP2INTERSECTQZ256rm = 12398, |
| 12414 | VP2INTERSECTQZ256rmb = 12399, |
| 12415 | VP2INTERSECTQZ256rr = 12400, |
| 12416 | VP2INTERSECTQZrm = 12401, |
| 12417 | VP2INTERSECTQZrmb = 12402, |
| 12418 | VP2INTERSECTQZrr = 12403, |
| 12419 | VP4DPWSSDSrm = 12404, |
| 12420 | VP4DPWSSDSrmk = 12405, |
| 12421 | VP4DPWSSDSrmkz = 12406, |
| 12422 | VP4DPWSSDrm = 12407, |
| 12423 | VP4DPWSSDrmk = 12408, |
| 12424 | VP4DPWSSDrmkz = 12409, |
| 12425 | VPABSBYrm = 12410, |
| 12426 | VPABSBYrr = 12411, |
| 12427 | VPABSBZ128rm = 12412, |
| 12428 | VPABSBZ128rmk = 12413, |
| 12429 | VPABSBZ128rmkz = 12414, |
| 12430 | VPABSBZ128rr = 12415, |
| 12431 | VPABSBZ128rrk = 12416, |
| 12432 | VPABSBZ128rrkz = 12417, |
| 12433 | VPABSBZ256rm = 12418, |
| 12434 | VPABSBZ256rmk = 12419, |
| 12435 | VPABSBZ256rmkz = 12420, |
| 12436 | VPABSBZ256rr = 12421, |
| 12437 | VPABSBZ256rrk = 12422, |
| 12438 | VPABSBZ256rrkz = 12423, |
| 12439 | VPABSBZrm = 12424, |
| 12440 | VPABSBZrmk = 12425, |
| 12441 | VPABSBZrmkz = 12426, |
| 12442 | VPABSBZrr = 12427, |
| 12443 | VPABSBZrrk = 12428, |
| 12444 | VPABSBZrrkz = 12429, |
| 12445 | VPABSBrm = 12430, |
| 12446 | VPABSBrr = 12431, |
| 12447 | VPABSDYrm = 12432, |
| 12448 | VPABSDYrr = 12433, |
| 12449 | VPABSDZ128rm = 12434, |
| 12450 | VPABSDZ128rmb = 12435, |
| 12451 | VPABSDZ128rmbk = 12436, |
| 12452 | VPABSDZ128rmbkz = 12437, |
| 12453 | VPABSDZ128rmk = 12438, |
| 12454 | VPABSDZ128rmkz = 12439, |
| 12455 | VPABSDZ128rr = 12440, |
| 12456 | VPABSDZ128rrk = 12441, |
| 12457 | VPABSDZ128rrkz = 12442, |
| 12458 | VPABSDZ256rm = 12443, |
| 12459 | VPABSDZ256rmb = 12444, |
| 12460 | VPABSDZ256rmbk = 12445, |
| 12461 | VPABSDZ256rmbkz = 12446, |
| 12462 | VPABSDZ256rmk = 12447, |
| 12463 | VPABSDZ256rmkz = 12448, |
| 12464 | VPABSDZ256rr = 12449, |
| 12465 | VPABSDZ256rrk = 12450, |
| 12466 | VPABSDZ256rrkz = 12451, |
| 12467 | VPABSDZrm = 12452, |
| 12468 | VPABSDZrmb = 12453, |
| 12469 | VPABSDZrmbk = 12454, |
| 12470 | VPABSDZrmbkz = 12455, |
| 12471 | VPABSDZrmk = 12456, |
| 12472 | VPABSDZrmkz = 12457, |
| 12473 | VPABSDZrr = 12458, |
| 12474 | VPABSDZrrk = 12459, |
| 12475 | VPABSDZrrkz = 12460, |
| 12476 | VPABSDrm = 12461, |
| 12477 | VPABSDrr = 12462, |
| 12478 | VPABSQZ128rm = 12463, |
| 12479 | VPABSQZ128rmb = 12464, |
| 12480 | VPABSQZ128rmbk = 12465, |
| 12481 | VPABSQZ128rmbkz = 12466, |
| 12482 | VPABSQZ128rmk = 12467, |
| 12483 | VPABSQZ128rmkz = 12468, |
| 12484 | VPABSQZ128rr = 12469, |
| 12485 | VPABSQZ128rrk = 12470, |
| 12486 | VPABSQZ128rrkz = 12471, |
| 12487 | VPABSQZ256rm = 12472, |
| 12488 | VPABSQZ256rmb = 12473, |
| 12489 | VPABSQZ256rmbk = 12474, |
| 12490 | VPABSQZ256rmbkz = 12475, |
| 12491 | VPABSQZ256rmk = 12476, |
| 12492 | VPABSQZ256rmkz = 12477, |
| 12493 | VPABSQZ256rr = 12478, |
| 12494 | VPABSQZ256rrk = 12479, |
| 12495 | VPABSQZ256rrkz = 12480, |
| 12496 | VPABSQZrm = 12481, |
| 12497 | VPABSQZrmb = 12482, |
| 12498 | VPABSQZrmbk = 12483, |
| 12499 | VPABSQZrmbkz = 12484, |
| 12500 | VPABSQZrmk = 12485, |
| 12501 | VPABSQZrmkz = 12486, |
| 12502 | VPABSQZrr = 12487, |
| 12503 | VPABSQZrrk = 12488, |
| 12504 | VPABSQZrrkz = 12489, |
| 12505 | VPABSWYrm = 12490, |
| 12506 | VPABSWYrr = 12491, |
| 12507 | VPABSWZ128rm = 12492, |
| 12508 | VPABSWZ128rmk = 12493, |
| 12509 | VPABSWZ128rmkz = 12494, |
| 12510 | VPABSWZ128rr = 12495, |
| 12511 | VPABSWZ128rrk = 12496, |
| 12512 | VPABSWZ128rrkz = 12497, |
| 12513 | VPABSWZ256rm = 12498, |
| 12514 | VPABSWZ256rmk = 12499, |
| 12515 | VPABSWZ256rmkz = 12500, |
| 12516 | VPABSWZ256rr = 12501, |
| 12517 | VPABSWZ256rrk = 12502, |
| 12518 | VPABSWZ256rrkz = 12503, |
| 12519 | VPABSWZrm = 12504, |
| 12520 | VPABSWZrmk = 12505, |
| 12521 | VPABSWZrmkz = 12506, |
| 12522 | VPABSWZrr = 12507, |
| 12523 | VPABSWZrrk = 12508, |
| 12524 | VPABSWZrrkz = 12509, |
| 12525 | VPABSWrm = 12510, |
| 12526 | VPABSWrr = 12511, |
| 12527 | VPACKSSDWYrm = 12512, |
| 12528 | VPACKSSDWYrr = 12513, |
| 12529 | VPACKSSDWZ128rm = 12514, |
| 12530 | VPACKSSDWZ128rmb = 12515, |
| 12531 | VPACKSSDWZ128rmbk = 12516, |
| 12532 | VPACKSSDWZ128rmbkz = 12517, |
| 12533 | VPACKSSDWZ128rmk = 12518, |
| 12534 | VPACKSSDWZ128rmkz = 12519, |
| 12535 | VPACKSSDWZ128rr = 12520, |
| 12536 | VPACKSSDWZ128rrk = 12521, |
| 12537 | VPACKSSDWZ128rrkz = 12522, |
| 12538 | VPACKSSDWZ256rm = 12523, |
| 12539 | VPACKSSDWZ256rmb = 12524, |
| 12540 | VPACKSSDWZ256rmbk = 12525, |
| 12541 | VPACKSSDWZ256rmbkz = 12526, |
| 12542 | VPACKSSDWZ256rmk = 12527, |
| 12543 | VPACKSSDWZ256rmkz = 12528, |
| 12544 | VPACKSSDWZ256rr = 12529, |
| 12545 | VPACKSSDWZ256rrk = 12530, |
| 12546 | VPACKSSDWZ256rrkz = 12531, |
| 12547 | VPACKSSDWZrm = 12532, |
| 12548 | VPACKSSDWZrmb = 12533, |
| 12549 | VPACKSSDWZrmbk = 12534, |
| 12550 | VPACKSSDWZrmbkz = 12535, |
| 12551 | VPACKSSDWZrmk = 12536, |
| 12552 | VPACKSSDWZrmkz = 12537, |
| 12553 | VPACKSSDWZrr = 12538, |
| 12554 | VPACKSSDWZrrk = 12539, |
| 12555 | VPACKSSDWZrrkz = 12540, |
| 12556 | VPACKSSDWrm = 12541, |
| 12557 | VPACKSSDWrr = 12542, |
| 12558 | VPACKSSWBYrm = 12543, |
| 12559 | VPACKSSWBYrr = 12544, |
| 12560 | VPACKSSWBZ128rm = 12545, |
| 12561 | VPACKSSWBZ128rmk = 12546, |
| 12562 | VPACKSSWBZ128rmkz = 12547, |
| 12563 | VPACKSSWBZ128rr = 12548, |
| 12564 | VPACKSSWBZ128rrk = 12549, |
| 12565 | VPACKSSWBZ128rrkz = 12550, |
| 12566 | VPACKSSWBZ256rm = 12551, |
| 12567 | VPACKSSWBZ256rmk = 12552, |
| 12568 | VPACKSSWBZ256rmkz = 12553, |
| 12569 | VPACKSSWBZ256rr = 12554, |
| 12570 | VPACKSSWBZ256rrk = 12555, |
| 12571 | VPACKSSWBZ256rrkz = 12556, |
| 12572 | VPACKSSWBZrm = 12557, |
| 12573 | VPACKSSWBZrmk = 12558, |
| 12574 | VPACKSSWBZrmkz = 12559, |
| 12575 | VPACKSSWBZrr = 12560, |
| 12576 | VPACKSSWBZrrk = 12561, |
| 12577 | VPACKSSWBZrrkz = 12562, |
| 12578 | VPACKSSWBrm = 12563, |
| 12579 | VPACKSSWBrr = 12564, |
| 12580 | VPACKUSDWYrm = 12565, |
| 12581 | VPACKUSDWYrr = 12566, |
| 12582 | VPACKUSDWZ128rm = 12567, |
| 12583 | VPACKUSDWZ128rmb = 12568, |
| 12584 | VPACKUSDWZ128rmbk = 12569, |
| 12585 | VPACKUSDWZ128rmbkz = 12570, |
| 12586 | VPACKUSDWZ128rmk = 12571, |
| 12587 | VPACKUSDWZ128rmkz = 12572, |
| 12588 | VPACKUSDWZ128rr = 12573, |
| 12589 | VPACKUSDWZ128rrk = 12574, |
| 12590 | VPACKUSDWZ128rrkz = 12575, |
| 12591 | VPACKUSDWZ256rm = 12576, |
| 12592 | VPACKUSDWZ256rmb = 12577, |
| 12593 | VPACKUSDWZ256rmbk = 12578, |
| 12594 | VPACKUSDWZ256rmbkz = 12579, |
| 12595 | VPACKUSDWZ256rmk = 12580, |
| 12596 | VPACKUSDWZ256rmkz = 12581, |
| 12597 | VPACKUSDWZ256rr = 12582, |
| 12598 | VPACKUSDWZ256rrk = 12583, |
| 12599 | VPACKUSDWZ256rrkz = 12584, |
| 12600 | VPACKUSDWZrm = 12585, |
| 12601 | VPACKUSDWZrmb = 12586, |
| 12602 | VPACKUSDWZrmbk = 12587, |
| 12603 | VPACKUSDWZrmbkz = 12588, |
| 12604 | VPACKUSDWZrmk = 12589, |
| 12605 | VPACKUSDWZrmkz = 12590, |
| 12606 | VPACKUSDWZrr = 12591, |
| 12607 | VPACKUSDWZrrk = 12592, |
| 12608 | VPACKUSDWZrrkz = 12593, |
| 12609 | VPACKUSDWrm = 12594, |
| 12610 | VPACKUSDWrr = 12595, |
| 12611 | VPACKUSWBYrm = 12596, |
| 12612 | VPACKUSWBYrr = 12597, |
| 12613 | VPACKUSWBZ128rm = 12598, |
| 12614 | VPACKUSWBZ128rmk = 12599, |
| 12615 | VPACKUSWBZ128rmkz = 12600, |
| 12616 | VPACKUSWBZ128rr = 12601, |
| 12617 | VPACKUSWBZ128rrk = 12602, |
| 12618 | VPACKUSWBZ128rrkz = 12603, |
| 12619 | VPACKUSWBZ256rm = 12604, |
| 12620 | VPACKUSWBZ256rmk = 12605, |
| 12621 | VPACKUSWBZ256rmkz = 12606, |
| 12622 | VPACKUSWBZ256rr = 12607, |
| 12623 | VPACKUSWBZ256rrk = 12608, |
| 12624 | VPACKUSWBZ256rrkz = 12609, |
| 12625 | VPACKUSWBZrm = 12610, |
| 12626 | VPACKUSWBZrmk = 12611, |
| 12627 | VPACKUSWBZrmkz = 12612, |
| 12628 | VPACKUSWBZrr = 12613, |
| 12629 | VPACKUSWBZrrk = 12614, |
| 12630 | VPACKUSWBZrrkz = 12615, |
| 12631 | VPACKUSWBrm = 12616, |
| 12632 | VPACKUSWBrr = 12617, |
| 12633 | VPADDBYrm = 12618, |
| 12634 | VPADDBYrr = 12619, |
| 12635 | VPADDBZ128rm = 12620, |
| 12636 | VPADDBZ128rmk = 12621, |
| 12637 | VPADDBZ128rmkz = 12622, |
| 12638 | VPADDBZ128rr = 12623, |
| 12639 | VPADDBZ128rrk = 12624, |
| 12640 | VPADDBZ128rrkz = 12625, |
| 12641 | VPADDBZ256rm = 12626, |
| 12642 | VPADDBZ256rmk = 12627, |
| 12643 | VPADDBZ256rmkz = 12628, |
| 12644 | VPADDBZ256rr = 12629, |
| 12645 | VPADDBZ256rrk = 12630, |
| 12646 | VPADDBZ256rrkz = 12631, |
| 12647 | VPADDBZrm = 12632, |
| 12648 | VPADDBZrmk = 12633, |
| 12649 | VPADDBZrmkz = 12634, |
| 12650 | VPADDBZrr = 12635, |
| 12651 | VPADDBZrrk = 12636, |
| 12652 | VPADDBZrrkz = 12637, |
| 12653 | VPADDBrm = 12638, |
| 12654 | VPADDBrr = 12639, |
| 12655 | VPADDDYrm = 12640, |
| 12656 | VPADDDYrr = 12641, |
| 12657 | VPADDDZ128rm = 12642, |
| 12658 | VPADDDZ128rmb = 12643, |
| 12659 | VPADDDZ128rmbk = 12644, |
| 12660 | VPADDDZ128rmbkz = 12645, |
| 12661 | VPADDDZ128rmk = 12646, |
| 12662 | VPADDDZ128rmkz = 12647, |
| 12663 | VPADDDZ128rr = 12648, |
| 12664 | VPADDDZ128rrk = 12649, |
| 12665 | VPADDDZ128rrkz = 12650, |
| 12666 | VPADDDZ256rm = 12651, |
| 12667 | VPADDDZ256rmb = 12652, |
| 12668 | VPADDDZ256rmbk = 12653, |
| 12669 | VPADDDZ256rmbkz = 12654, |
| 12670 | VPADDDZ256rmk = 12655, |
| 12671 | VPADDDZ256rmkz = 12656, |
| 12672 | VPADDDZ256rr = 12657, |
| 12673 | VPADDDZ256rrk = 12658, |
| 12674 | VPADDDZ256rrkz = 12659, |
| 12675 | VPADDDZrm = 12660, |
| 12676 | VPADDDZrmb = 12661, |
| 12677 | VPADDDZrmbk = 12662, |
| 12678 | VPADDDZrmbkz = 12663, |
| 12679 | VPADDDZrmk = 12664, |
| 12680 | VPADDDZrmkz = 12665, |
| 12681 | VPADDDZrr = 12666, |
| 12682 | VPADDDZrrk = 12667, |
| 12683 | VPADDDZrrkz = 12668, |
| 12684 | VPADDDrm = 12669, |
| 12685 | VPADDDrr = 12670, |
| 12686 | VPADDQYrm = 12671, |
| 12687 | VPADDQYrr = 12672, |
| 12688 | VPADDQZ128rm = 12673, |
| 12689 | VPADDQZ128rmb = 12674, |
| 12690 | VPADDQZ128rmbk = 12675, |
| 12691 | VPADDQZ128rmbkz = 12676, |
| 12692 | VPADDQZ128rmk = 12677, |
| 12693 | VPADDQZ128rmkz = 12678, |
| 12694 | VPADDQZ128rr = 12679, |
| 12695 | VPADDQZ128rrk = 12680, |
| 12696 | VPADDQZ128rrkz = 12681, |
| 12697 | VPADDQZ256rm = 12682, |
| 12698 | VPADDQZ256rmb = 12683, |
| 12699 | VPADDQZ256rmbk = 12684, |
| 12700 | VPADDQZ256rmbkz = 12685, |
| 12701 | VPADDQZ256rmk = 12686, |
| 12702 | VPADDQZ256rmkz = 12687, |
| 12703 | VPADDQZ256rr = 12688, |
| 12704 | VPADDQZ256rrk = 12689, |
| 12705 | VPADDQZ256rrkz = 12690, |
| 12706 | VPADDQZrm = 12691, |
| 12707 | VPADDQZrmb = 12692, |
| 12708 | VPADDQZrmbk = 12693, |
| 12709 | VPADDQZrmbkz = 12694, |
| 12710 | VPADDQZrmk = 12695, |
| 12711 | VPADDQZrmkz = 12696, |
| 12712 | VPADDQZrr = 12697, |
| 12713 | VPADDQZrrk = 12698, |
| 12714 | VPADDQZrrkz = 12699, |
| 12715 | VPADDQrm = 12700, |
| 12716 | VPADDQrr = 12701, |
| 12717 | VPADDSBYrm = 12702, |
| 12718 | VPADDSBYrr = 12703, |
| 12719 | VPADDSBZ128rm = 12704, |
| 12720 | VPADDSBZ128rmk = 12705, |
| 12721 | VPADDSBZ128rmkz = 12706, |
| 12722 | VPADDSBZ128rr = 12707, |
| 12723 | VPADDSBZ128rrk = 12708, |
| 12724 | VPADDSBZ128rrkz = 12709, |
| 12725 | VPADDSBZ256rm = 12710, |
| 12726 | VPADDSBZ256rmk = 12711, |
| 12727 | VPADDSBZ256rmkz = 12712, |
| 12728 | VPADDSBZ256rr = 12713, |
| 12729 | VPADDSBZ256rrk = 12714, |
| 12730 | VPADDSBZ256rrkz = 12715, |
| 12731 | VPADDSBZrm = 12716, |
| 12732 | VPADDSBZrmk = 12717, |
| 12733 | VPADDSBZrmkz = 12718, |
| 12734 | VPADDSBZrr = 12719, |
| 12735 | VPADDSBZrrk = 12720, |
| 12736 | VPADDSBZrrkz = 12721, |
| 12737 | VPADDSBrm = 12722, |
| 12738 | VPADDSBrr = 12723, |
| 12739 | VPADDSWYrm = 12724, |
| 12740 | VPADDSWYrr = 12725, |
| 12741 | VPADDSWZ128rm = 12726, |
| 12742 | VPADDSWZ128rmk = 12727, |
| 12743 | VPADDSWZ128rmkz = 12728, |
| 12744 | VPADDSWZ128rr = 12729, |
| 12745 | VPADDSWZ128rrk = 12730, |
| 12746 | VPADDSWZ128rrkz = 12731, |
| 12747 | VPADDSWZ256rm = 12732, |
| 12748 | VPADDSWZ256rmk = 12733, |
| 12749 | VPADDSWZ256rmkz = 12734, |
| 12750 | VPADDSWZ256rr = 12735, |
| 12751 | VPADDSWZ256rrk = 12736, |
| 12752 | VPADDSWZ256rrkz = 12737, |
| 12753 | VPADDSWZrm = 12738, |
| 12754 | VPADDSWZrmk = 12739, |
| 12755 | VPADDSWZrmkz = 12740, |
| 12756 | VPADDSWZrr = 12741, |
| 12757 | VPADDSWZrrk = 12742, |
| 12758 | VPADDSWZrrkz = 12743, |
| 12759 | VPADDSWrm = 12744, |
| 12760 | VPADDSWrr = 12745, |
| 12761 | VPADDUSBYrm = 12746, |
| 12762 | VPADDUSBYrr = 12747, |
| 12763 | VPADDUSBZ128rm = 12748, |
| 12764 | VPADDUSBZ128rmk = 12749, |
| 12765 | VPADDUSBZ128rmkz = 12750, |
| 12766 | VPADDUSBZ128rr = 12751, |
| 12767 | VPADDUSBZ128rrk = 12752, |
| 12768 | VPADDUSBZ128rrkz = 12753, |
| 12769 | VPADDUSBZ256rm = 12754, |
| 12770 | VPADDUSBZ256rmk = 12755, |
| 12771 | VPADDUSBZ256rmkz = 12756, |
| 12772 | VPADDUSBZ256rr = 12757, |
| 12773 | VPADDUSBZ256rrk = 12758, |
| 12774 | VPADDUSBZ256rrkz = 12759, |
| 12775 | VPADDUSBZrm = 12760, |
| 12776 | VPADDUSBZrmk = 12761, |
| 12777 | VPADDUSBZrmkz = 12762, |
| 12778 | VPADDUSBZrr = 12763, |
| 12779 | VPADDUSBZrrk = 12764, |
| 12780 | VPADDUSBZrrkz = 12765, |
| 12781 | VPADDUSBrm = 12766, |
| 12782 | VPADDUSBrr = 12767, |
| 12783 | VPADDUSWYrm = 12768, |
| 12784 | VPADDUSWYrr = 12769, |
| 12785 | VPADDUSWZ128rm = 12770, |
| 12786 | VPADDUSWZ128rmk = 12771, |
| 12787 | VPADDUSWZ128rmkz = 12772, |
| 12788 | VPADDUSWZ128rr = 12773, |
| 12789 | VPADDUSWZ128rrk = 12774, |
| 12790 | VPADDUSWZ128rrkz = 12775, |
| 12791 | VPADDUSWZ256rm = 12776, |
| 12792 | VPADDUSWZ256rmk = 12777, |
| 12793 | VPADDUSWZ256rmkz = 12778, |
| 12794 | VPADDUSWZ256rr = 12779, |
| 12795 | VPADDUSWZ256rrk = 12780, |
| 12796 | VPADDUSWZ256rrkz = 12781, |
| 12797 | VPADDUSWZrm = 12782, |
| 12798 | VPADDUSWZrmk = 12783, |
| 12799 | VPADDUSWZrmkz = 12784, |
| 12800 | VPADDUSWZrr = 12785, |
| 12801 | VPADDUSWZrrk = 12786, |
| 12802 | VPADDUSWZrrkz = 12787, |
| 12803 | VPADDUSWrm = 12788, |
| 12804 | VPADDUSWrr = 12789, |
| 12805 | VPADDWYrm = 12790, |
| 12806 | VPADDWYrr = 12791, |
| 12807 | VPADDWZ128rm = 12792, |
| 12808 | VPADDWZ128rmk = 12793, |
| 12809 | VPADDWZ128rmkz = 12794, |
| 12810 | VPADDWZ128rr = 12795, |
| 12811 | VPADDWZ128rrk = 12796, |
| 12812 | VPADDWZ128rrkz = 12797, |
| 12813 | VPADDWZ256rm = 12798, |
| 12814 | VPADDWZ256rmk = 12799, |
| 12815 | VPADDWZ256rmkz = 12800, |
| 12816 | VPADDWZ256rr = 12801, |
| 12817 | VPADDWZ256rrk = 12802, |
| 12818 | VPADDWZ256rrkz = 12803, |
| 12819 | VPADDWZrm = 12804, |
| 12820 | VPADDWZrmk = 12805, |
| 12821 | VPADDWZrmkz = 12806, |
| 12822 | VPADDWZrr = 12807, |
| 12823 | VPADDWZrrk = 12808, |
| 12824 | VPADDWZrrkz = 12809, |
| 12825 | VPADDWrm = 12810, |
| 12826 | VPADDWrr = 12811, |
| 12827 | VPALIGNRYrmi = 12812, |
| 12828 | VPALIGNRYrri = 12813, |
| 12829 | VPALIGNRZ128rmi = 12814, |
| 12830 | VPALIGNRZ128rmik = 12815, |
| 12831 | VPALIGNRZ128rmikz = 12816, |
| 12832 | VPALIGNRZ128rri = 12817, |
| 12833 | VPALIGNRZ128rrik = 12818, |
| 12834 | VPALIGNRZ128rrikz = 12819, |
| 12835 | VPALIGNRZ256rmi = 12820, |
| 12836 | VPALIGNRZ256rmik = 12821, |
| 12837 | VPALIGNRZ256rmikz = 12822, |
| 12838 | VPALIGNRZ256rri = 12823, |
| 12839 | VPALIGNRZ256rrik = 12824, |
| 12840 | VPALIGNRZ256rrikz = 12825, |
| 12841 | VPALIGNRZrmi = 12826, |
| 12842 | VPALIGNRZrmik = 12827, |
| 12843 | VPALIGNRZrmikz = 12828, |
| 12844 | VPALIGNRZrri = 12829, |
| 12845 | VPALIGNRZrrik = 12830, |
| 12846 | VPALIGNRZrrikz = 12831, |
| 12847 | VPALIGNRrmi = 12832, |
| 12848 | VPALIGNRrri = 12833, |
| 12849 | VPANDDZ128rm = 12834, |
| 12850 | VPANDDZ128rmb = 12835, |
| 12851 | VPANDDZ128rmbk = 12836, |
| 12852 | VPANDDZ128rmbkz = 12837, |
| 12853 | VPANDDZ128rmk = 12838, |
| 12854 | VPANDDZ128rmkz = 12839, |
| 12855 | VPANDDZ128rr = 12840, |
| 12856 | VPANDDZ128rrk = 12841, |
| 12857 | VPANDDZ128rrkz = 12842, |
| 12858 | VPANDDZ256rm = 12843, |
| 12859 | VPANDDZ256rmb = 12844, |
| 12860 | VPANDDZ256rmbk = 12845, |
| 12861 | VPANDDZ256rmbkz = 12846, |
| 12862 | VPANDDZ256rmk = 12847, |
| 12863 | VPANDDZ256rmkz = 12848, |
| 12864 | VPANDDZ256rr = 12849, |
| 12865 | VPANDDZ256rrk = 12850, |
| 12866 | VPANDDZ256rrkz = 12851, |
| 12867 | VPANDDZrm = 12852, |
| 12868 | VPANDDZrmb = 12853, |
| 12869 | VPANDDZrmbk = 12854, |
| 12870 | VPANDDZrmbkz = 12855, |
| 12871 | VPANDDZrmk = 12856, |
| 12872 | VPANDDZrmkz = 12857, |
| 12873 | VPANDDZrr = 12858, |
| 12874 | VPANDDZrrk = 12859, |
| 12875 | VPANDDZrrkz = 12860, |
| 12876 | VPANDNDZ128rm = 12861, |
| 12877 | VPANDNDZ128rmb = 12862, |
| 12878 | VPANDNDZ128rmbk = 12863, |
| 12879 | VPANDNDZ128rmbkz = 12864, |
| 12880 | VPANDNDZ128rmk = 12865, |
| 12881 | VPANDNDZ128rmkz = 12866, |
| 12882 | VPANDNDZ128rr = 12867, |
| 12883 | VPANDNDZ128rrk = 12868, |
| 12884 | VPANDNDZ128rrkz = 12869, |
| 12885 | VPANDNDZ256rm = 12870, |
| 12886 | VPANDNDZ256rmb = 12871, |
| 12887 | VPANDNDZ256rmbk = 12872, |
| 12888 | VPANDNDZ256rmbkz = 12873, |
| 12889 | VPANDNDZ256rmk = 12874, |
| 12890 | VPANDNDZ256rmkz = 12875, |
| 12891 | VPANDNDZ256rr = 12876, |
| 12892 | VPANDNDZ256rrk = 12877, |
| 12893 | VPANDNDZ256rrkz = 12878, |
| 12894 | VPANDNDZrm = 12879, |
| 12895 | VPANDNDZrmb = 12880, |
| 12896 | VPANDNDZrmbk = 12881, |
| 12897 | VPANDNDZrmbkz = 12882, |
| 12898 | VPANDNDZrmk = 12883, |
| 12899 | VPANDNDZrmkz = 12884, |
| 12900 | VPANDNDZrr = 12885, |
| 12901 | VPANDNDZrrk = 12886, |
| 12902 | VPANDNDZrrkz = 12887, |
| 12903 | VPANDNQZ128rm = 12888, |
| 12904 | VPANDNQZ128rmb = 12889, |
| 12905 | VPANDNQZ128rmbk = 12890, |
| 12906 | VPANDNQZ128rmbkz = 12891, |
| 12907 | VPANDNQZ128rmk = 12892, |
| 12908 | VPANDNQZ128rmkz = 12893, |
| 12909 | VPANDNQZ128rr = 12894, |
| 12910 | VPANDNQZ128rrk = 12895, |
| 12911 | VPANDNQZ128rrkz = 12896, |
| 12912 | VPANDNQZ256rm = 12897, |
| 12913 | VPANDNQZ256rmb = 12898, |
| 12914 | VPANDNQZ256rmbk = 12899, |
| 12915 | VPANDNQZ256rmbkz = 12900, |
| 12916 | VPANDNQZ256rmk = 12901, |
| 12917 | VPANDNQZ256rmkz = 12902, |
| 12918 | VPANDNQZ256rr = 12903, |
| 12919 | VPANDNQZ256rrk = 12904, |
| 12920 | VPANDNQZ256rrkz = 12905, |
| 12921 | VPANDNQZrm = 12906, |
| 12922 | VPANDNQZrmb = 12907, |
| 12923 | VPANDNQZrmbk = 12908, |
| 12924 | VPANDNQZrmbkz = 12909, |
| 12925 | VPANDNQZrmk = 12910, |
| 12926 | VPANDNQZrmkz = 12911, |
| 12927 | VPANDNQZrr = 12912, |
| 12928 | VPANDNQZrrk = 12913, |
| 12929 | VPANDNQZrrkz = 12914, |
| 12930 | VPANDNYrm = 12915, |
| 12931 | VPANDNYrr = 12916, |
| 12932 | VPANDNrm = 12917, |
| 12933 | VPANDNrr = 12918, |
| 12934 | VPANDQZ128rm = 12919, |
| 12935 | VPANDQZ128rmb = 12920, |
| 12936 | VPANDQZ128rmbk = 12921, |
| 12937 | VPANDQZ128rmbkz = 12922, |
| 12938 | VPANDQZ128rmk = 12923, |
| 12939 | VPANDQZ128rmkz = 12924, |
| 12940 | VPANDQZ128rr = 12925, |
| 12941 | VPANDQZ128rrk = 12926, |
| 12942 | VPANDQZ128rrkz = 12927, |
| 12943 | VPANDQZ256rm = 12928, |
| 12944 | VPANDQZ256rmb = 12929, |
| 12945 | VPANDQZ256rmbk = 12930, |
| 12946 | VPANDQZ256rmbkz = 12931, |
| 12947 | VPANDQZ256rmk = 12932, |
| 12948 | VPANDQZ256rmkz = 12933, |
| 12949 | VPANDQZ256rr = 12934, |
| 12950 | VPANDQZ256rrk = 12935, |
| 12951 | VPANDQZ256rrkz = 12936, |
| 12952 | VPANDQZrm = 12937, |
| 12953 | VPANDQZrmb = 12938, |
| 12954 | VPANDQZrmbk = 12939, |
| 12955 | VPANDQZrmbkz = 12940, |
| 12956 | VPANDQZrmk = 12941, |
| 12957 | VPANDQZrmkz = 12942, |
| 12958 | VPANDQZrr = 12943, |
| 12959 | VPANDQZrrk = 12944, |
| 12960 | VPANDQZrrkz = 12945, |
| 12961 | VPANDYrm = 12946, |
| 12962 | VPANDYrr = 12947, |
| 12963 | VPANDrm = 12948, |
| 12964 | VPANDrr = 12949, |
| 12965 | VPAVGBYrm = 12950, |
| 12966 | VPAVGBYrr = 12951, |
| 12967 | VPAVGBZ128rm = 12952, |
| 12968 | VPAVGBZ128rmk = 12953, |
| 12969 | VPAVGBZ128rmkz = 12954, |
| 12970 | VPAVGBZ128rr = 12955, |
| 12971 | VPAVGBZ128rrk = 12956, |
| 12972 | VPAVGBZ128rrkz = 12957, |
| 12973 | VPAVGBZ256rm = 12958, |
| 12974 | VPAVGBZ256rmk = 12959, |
| 12975 | VPAVGBZ256rmkz = 12960, |
| 12976 | VPAVGBZ256rr = 12961, |
| 12977 | VPAVGBZ256rrk = 12962, |
| 12978 | VPAVGBZ256rrkz = 12963, |
| 12979 | VPAVGBZrm = 12964, |
| 12980 | VPAVGBZrmk = 12965, |
| 12981 | VPAVGBZrmkz = 12966, |
| 12982 | VPAVGBZrr = 12967, |
| 12983 | VPAVGBZrrk = 12968, |
| 12984 | VPAVGBZrrkz = 12969, |
| 12985 | VPAVGBrm = 12970, |
| 12986 | VPAVGBrr = 12971, |
| 12987 | VPAVGWYrm = 12972, |
| 12988 | VPAVGWYrr = 12973, |
| 12989 | VPAVGWZ128rm = 12974, |
| 12990 | VPAVGWZ128rmk = 12975, |
| 12991 | VPAVGWZ128rmkz = 12976, |
| 12992 | VPAVGWZ128rr = 12977, |
| 12993 | VPAVGWZ128rrk = 12978, |
| 12994 | VPAVGWZ128rrkz = 12979, |
| 12995 | VPAVGWZ256rm = 12980, |
| 12996 | VPAVGWZ256rmk = 12981, |
| 12997 | VPAVGWZ256rmkz = 12982, |
| 12998 | VPAVGWZ256rr = 12983, |
| 12999 | VPAVGWZ256rrk = 12984, |
| 13000 | VPAVGWZ256rrkz = 12985, |
| 13001 | VPAVGWZrm = 12986, |
| 13002 | VPAVGWZrmk = 12987, |
| 13003 | VPAVGWZrmkz = 12988, |
| 13004 | VPAVGWZrr = 12989, |
| 13005 | VPAVGWZrrk = 12990, |
| 13006 | VPAVGWZrrkz = 12991, |
| 13007 | VPAVGWrm = 12992, |
| 13008 | VPAVGWrr = 12993, |
| 13009 | VPBLENDDYrmi = 12994, |
| 13010 | VPBLENDDYrri = 12995, |
| 13011 | VPBLENDDrmi = 12996, |
| 13012 | VPBLENDDrri = 12997, |
| 13013 | VPBLENDMBZ128rm = 12998, |
| 13014 | VPBLENDMBZ128rmk = 12999, |
| 13015 | VPBLENDMBZ128rmkz = 13000, |
| 13016 | VPBLENDMBZ128rr = 13001, |
| 13017 | VPBLENDMBZ128rrk = 13002, |
| 13018 | VPBLENDMBZ128rrkz = 13003, |
| 13019 | VPBLENDMBZ256rm = 13004, |
| 13020 | VPBLENDMBZ256rmk = 13005, |
| 13021 | VPBLENDMBZ256rmkz = 13006, |
| 13022 | VPBLENDMBZ256rr = 13007, |
| 13023 | VPBLENDMBZ256rrk = 13008, |
| 13024 | VPBLENDMBZ256rrkz = 13009, |
| 13025 | VPBLENDMBZrm = 13010, |
| 13026 | VPBLENDMBZrmk = 13011, |
| 13027 | VPBLENDMBZrmkz = 13012, |
| 13028 | VPBLENDMBZrr = 13013, |
| 13029 | VPBLENDMBZrrk = 13014, |
| 13030 | VPBLENDMBZrrkz = 13015, |
| 13031 | VPBLENDMDZ128rm = 13016, |
| 13032 | VPBLENDMDZ128rmb = 13017, |
| 13033 | VPBLENDMDZ128rmbk = 13018, |
| 13034 | VPBLENDMDZ128rmbkz = 13019, |
| 13035 | VPBLENDMDZ128rmk = 13020, |
| 13036 | VPBLENDMDZ128rmkz = 13021, |
| 13037 | VPBLENDMDZ128rr = 13022, |
| 13038 | VPBLENDMDZ128rrk = 13023, |
| 13039 | VPBLENDMDZ128rrkz = 13024, |
| 13040 | VPBLENDMDZ256rm = 13025, |
| 13041 | VPBLENDMDZ256rmb = 13026, |
| 13042 | VPBLENDMDZ256rmbk = 13027, |
| 13043 | VPBLENDMDZ256rmbkz = 13028, |
| 13044 | VPBLENDMDZ256rmk = 13029, |
| 13045 | VPBLENDMDZ256rmkz = 13030, |
| 13046 | VPBLENDMDZ256rr = 13031, |
| 13047 | VPBLENDMDZ256rrk = 13032, |
| 13048 | VPBLENDMDZ256rrkz = 13033, |
| 13049 | VPBLENDMDZrm = 13034, |
| 13050 | VPBLENDMDZrmb = 13035, |
| 13051 | VPBLENDMDZrmbk = 13036, |
| 13052 | VPBLENDMDZrmbkz = 13037, |
| 13053 | VPBLENDMDZrmk = 13038, |
| 13054 | VPBLENDMDZrmkz = 13039, |
| 13055 | VPBLENDMDZrr = 13040, |
| 13056 | VPBLENDMDZrrk = 13041, |
| 13057 | VPBLENDMDZrrkz = 13042, |
| 13058 | VPBLENDMQZ128rm = 13043, |
| 13059 | VPBLENDMQZ128rmb = 13044, |
| 13060 | VPBLENDMQZ128rmbk = 13045, |
| 13061 | VPBLENDMQZ128rmbkz = 13046, |
| 13062 | VPBLENDMQZ128rmk = 13047, |
| 13063 | VPBLENDMQZ128rmkz = 13048, |
| 13064 | VPBLENDMQZ128rr = 13049, |
| 13065 | VPBLENDMQZ128rrk = 13050, |
| 13066 | VPBLENDMQZ128rrkz = 13051, |
| 13067 | VPBLENDMQZ256rm = 13052, |
| 13068 | VPBLENDMQZ256rmb = 13053, |
| 13069 | VPBLENDMQZ256rmbk = 13054, |
| 13070 | VPBLENDMQZ256rmbkz = 13055, |
| 13071 | VPBLENDMQZ256rmk = 13056, |
| 13072 | VPBLENDMQZ256rmkz = 13057, |
| 13073 | VPBLENDMQZ256rr = 13058, |
| 13074 | VPBLENDMQZ256rrk = 13059, |
| 13075 | VPBLENDMQZ256rrkz = 13060, |
| 13076 | VPBLENDMQZrm = 13061, |
| 13077 | VPBLENDMQZrmb = 13062, |
| 13078 | VPBLENDMQZrmbk = 13063, |
| 13079 | VPBLENDMQZrmbkz = 13064, |
| 13080 | VPBLENDMQZrmk = 13065, |
| 13081 | VPBLENDMQZrmkz = 13066, |
| 13082 | VPBLENDMQZrr = 13067, |
| 13083 | VPBLENDMQZrrk = 13068, |
| 13084 | VPBLENDMQZrrkz = 13069, |
| 13085 | VPBLENDMWZ128rm = 13070, |
| 13086 | VPBLENDMWZ128rmk = 13071, |
| 13087 | VPBLENDMWZ128rmkz = 13072, |
| 13088 | VPBLENDMWZ128rr = 13073, |
| 13089 | VPBLENDMWZ128rrk = 13074, |
| 13090 | VPBLENDMWZ128rrkz = 13075, |
| 13091 | VPBLENDMWZ256rm = 13076, |
| 13092 | VPBLENDMWZ256rmk = 13077, |
| 13093 | VPBLENDMWZ256rmkz = 13078, |
| 13094 | VPBLENDMWZ256rr = 13079, |
| 13095 | VPBLENDMWZ256rrk = 13080, |
| 13096 | VPBLENDMWZ256rrkz = 13081, |
| 13097 | VPBLENDMWZrm = 13082, |
| 13098 | VPBLENDMWZrmk = 13083, |
| 13099 | VPBLENDMWZrmkz = 13084, |
| 13100 | VPBLENDMWZrr = 13085, |
| 13101 | VPBLENDMWZrrk = 13086, |
| 13102 | VPBLENDMWZrrkz = 13087, |
| 13103 | VPBLENDVBYrmr = 13088, |
| 13104 | VPBLENDVBYrrr = 13089, |
| 13105 | VPBLENDVBrmr = 13090, |
| 13106 | VPBLENDVBrrr = 13091, |
| 13107 | VPBLENDWYrmi = 13092, |
| 13108 | VPBLENDWYrri = 13093, |
| 13109 | VPBLENDWrmi = 13094, |
| 13110 | VPBLENDWrri = 13095, |
| 13111 | VPBROADCASTBYrm = 13096, |
| 13112 | VPBROADCASTBYrr = 13097, |
| 13113 | VPBROADCASTBZ128rm = 13098, |
| 13114 | VPBROADCASTBZ128rmk = 13099, |
| 13115 | VPBROADCASTBZ128rmkz = 13100, |
| 13116 | VPBROADCASTBZ128rr = 13101, |
| 13117 | VPBROADCASTBZ128rrk = 13102, |
| 13118 | VPBROADCASTBZ128rrkz = 13103, |
| 13119 | VPBROADCASTBZ256rm = 13104, |
| 13120 | VPBROADCASTBZ256rmk = 13105, |
| 13121 | VPBROADCASTBZ256rmkz = 13106, |
| 13122 | VPBROADCASTBZ256rr = 13107, |
| 13123 | VPBROADCASTBZ256rrk = 13108, |
| 13124 | VPBROADCASTBZ256rrkz = 13109, |
| 13125 | VPBROADCASTBZrm = 13110, |
| 13126 | VPBROADCASTBZrmk = 13111, |
| 13127 | VPBROADCASTBZrmkz = 13112, |
| 13128 | VPBROADCASTBZrr = 13113, |
| 13129 | VPBROADCASTBZrrk = 13114, |
| 13130 | VPBROADCASTBZrrkz = 13115, |
| 13131 | VPBROADCASTBrZ128rr = 13116, |
| 13132 | VPBROADCASTBrZ128rrk = 13117, |
| 13133 | VPBROADCASTBrZ128rrkz = 13118, |
| 13134 | VPBROADCASTBrZ256rr = 13119, |
| 13135 | VPBROADCASTBrZ256rrk = 13120, |
| 13136 | VPBROADCASTBrZ256rrkz = 13121, |
| 13137 | VPBROADCASTBrZrr = 13122, |
| 13138 | VPBROADCASTBrZrrk = 13123, |
| 13139 | VPBROADCASTBrZrrkz = 13124, |
| 13140 | VPBROADCASTBrm = 13125, |
| 13141 | VPBROADCASTBrr = 13126, |
| 13142 | VPBROADCASTDYrm = 13127, |
| 13143 | VPBROADCASTDYrr = 13128, |
| 13144 | VPBROADCASTDZ128rm = 13129, |
| 13145 | VPBROADCASTDZ128rmk = 13130, |
| 13146 | VPBROADCASTDZ128rmkz = 13131, |
| 13147 | VPBROADCASTDZ128rr = 13132, |
| 13148 | VPBROADCASTDZ128rrk = 13133, |
| 13149 | VPBROADCASTDZ128rrkz = 13134, |
| 13150 | VPBROADCASTDZ256rm = 13135, |
| 13151 | VPBROADCASTDZ256rmk = 13136, |
| 13152 | VPBROADCASTDZ256rmkz = 13137, |
| 13153 | VPBROADCASTDZ256rr = 13138, |
| 13154 | VPBROADCASTDZ256rrk = 13139, |
| 13155 | VPBROADCASTDZ256rrkz = 13140, |
| 13156 | VPBROADCASTDZrm = 13141, |
| 13157 | VPBROADCASTDZrmk = 13142, |
| 13158 | VPBROADCASTDZrmkz = 13143, |
| 13159 | VPBROADCASTDZrr = 13144, |
| 13160 | VPBROADCASTDZrrk = 13145, |
| 13161 | VPBROADCASTDZrrkz = 13146, |
| 13162 | VPBROADCASTDrZ128rr = 13147, |
| 13163 | VPBROADCASTDrZ128rrk = 13148, |
| 13164 | VPBROADCASTDrZ128rrkz = 13149, |
| 13165 | VPBROADCASTDrZ256rr = 13150, |
| 13166 | VPBROADCASTDrZ256rrk = 13151, |
| 13167 | VPBROADCASTDrZ256rrkz = 13152, |
| 13168 | VPBROADCASTDrZrr = 13153, |
| 13169 | VPBROADCASTDrZrrk = 13154, |
| 13170 | VPBROADCASTDrZrrkz = 13155, |
| 13171 | VPBROADCASTDrm = 13156, |
| 13172 | VPBROADCASTDrr = 13157, |
| 13173 | VPBROADCASTMB2QZ128rr = 13158, |
| 13174 | VPBROADCASTMB2QZ256rr = 13159, |
| 13175 | VPBROADCASTMB2QZrr = 13160, |
| 13176 | VPBROADCASTMW2DZ128rr = 13161, |
| 13177 | VPBROADCASTMW2DZ256rr = 13162, |
| 13178 | VPBROADCASTMW2DZrr = 13163, |
| 13179 | VPBROADCASTQYrm = 13164, |
| 13180 | VPBROADCASTQYrr = 13165, |
| 13181 | VPBROADCASTQZ128rm = 13166, |
| 13182 | VPBROADCASTQZ128rmk = 13167, |
| 13183 | VPBROADCASTQZ128rmkz = 13168, |
| 13184 | VPBROADCASTQZ128rr = 13169, |
| 13185 | VPBROADCASTQZ128rrk = 13170, |
| 13186 | VPBROADCASTQZ128rrkz = 13171, |
| 13187 | VPBROADCASTQZ256rm = 13172, |
| 13188 | VPBROADCASTQZ256rmk = 13173, |
| 13189 | VPBROADCASTQZ256rmkz = 13174, |
| 13190 | VPBROADCASTQZ256rr = 13175, |
| 13191 | VPBROADCASTQZ256rrk = 13176, |
| 13192 | VPBROADCASTQZ256rrkz = 13177, |
| 13193 | VPBROADCASTQZrm = 13178, |
| 13194 | VPBROADCASTQZrmk = 13179, |
| 13195 | VPBROADCASTQZrmkz = 13180, |
| 13196 | VPBROADCASTQZrr = 13181, |
| 13197 | VPBROADCASTQZrrk = 13182, |
| 13198 | VPBROADCASTQZrrkz = 13183, |
| 13199 | VPBROADCASTQrZ128rr = 13184, |
| 13200 | VPBROADCASTQrZ128rrk = 13185, |
| 13201 | VPBROADCASTQrZ128rrkz = 13186, |
| 13202 | VPBROADCASTQrZ256rr = 13187, |
| 13203 | VPBROADCASTQrZ256rrk = 13188, |
| 13204 | VPBROADCASTQrZ256rrkz = 13189, |
| 13205 | VPBROADCASTQrZrr = 13190, |
| 13206 | VPBROADCASTQrZrrk = 13191, |
| 13207 | VPBROADCASTQrZrrkz = 13192, |
| 13208 | VPBROADCASTQrm = 13193, |
| 13209 | VPBROADCASTQrr = 13194, |
| 13210 | VPBROADCASTWYrm = 13195, |
| 13211 | VPBROADCASTWYrr = 13196, |
| 13212 | VPBROADCASTWZ128rm = 13197, |
| 13213 | VPBROADCASTWZ128rmk = 13198, |
| 13214 | VPBROADCASTWZ128rmkz = 13199, |
| 13215 | VPBROADCASTWZ128rr = 13200, |
| 13216 | VPBROADCASTWZ128rrk = 13201, |
| 13217 | VPBROADCASTWZ128rrkz = 13202, |
| 13218 | VPBROADCASTWZ256rm = 13203, |
| 13219 | VPBROADCASTWZ256rmk = 13204, |
| 13220 | VPBROADCASTWZ256rmkz = 13205, |
| 13221 | VPBROADCASTWZ256rr = 13206, |
| 13222 | VPBROADCASTWZ256rrk = 13207, |
| 13223 | VPBROADCASTWZ256rrkz = 13208, |
| 13224 | VPBROADCASTWZrm = 13209, |
| 13225 | VPBROADCASTWZrmk = 13210, |
| 13226 | VPBROADCASTWZrmkz = 13211, |
| 13227 | VPBROADCASTWZrr = 13212, |
| 13228 | VPBROADCASTWZrrk = 13213, |
| 13229 | VPBROADCASTWZrrkz = 13214, |
| 13230 | VPBROADCASTWrZ128rr = 13215, |
| 13231 | VPBROADCASTWrZ128rrk = 13216, |
| 13232 | VPBROADCASTWrZ128rrkz = 13217, |
| 13233 | VPBROADCASTWrZ256rr = 13218, |
| 13234 | VPBROADCASTWrZ256rrk = 13219, |
| 13235 | VPBROADCASTWrZ256rrkz = 13220, |
| 13236 | VPBROADCASTWrZrr = 13221, |
| 13237 | VPBROADCASTWrZrrk = 13222, |
| 13238 | VPBROADCASTWrZrrkz = 13223, |
| 13239 | VPBROADCASTWrm = 13224, |
| 13240 | VPBROADCASTWrr = 13225, |
| 13241 | VPCLMULQDQYrmi = 13226, |
| 13242 | VPCLMULQDQYrri = 13227, |
| 13243 | VPCLMULQDQZ128rmi = 13228, |
| 13244 | VPCLMULQDQZ128rri = 13229, |
| 13245 | VPCLMULQDQZ256rmi = 13230, |
| 13246 | VPCLMULQDQZ256rri = 13231, |
| 13247 | VPCLMULQDQZrmi = 13232, |
| 13248 | VPCLMULQDQZrri = 13233, |
| 13249 | VPCLMULQDQrmi = 13234, |
| 13250 | VPCLMULQDQrri = 13235, |
| 13251 | VPCMOVYrmr = 13236, |
| 13252 | VPCMOVYrrm = 13237, |
| 13253 | VPCMOVYrrr = 13238, |
| 13254 | VPCMOVYrrr_REV = 13239, |
| 13255 | VPCMOVrmr = 13240, |
| 13256 | VPCMOVrrm = 13241, |
| 13257 | VPCMOVrrr = 13242, |
| 13258 | VPCMOVrrr_REV = 13243, |
| 13259 | VPCMPBZ128rmi = 13244, |
| 13260 | VPCMPBZ128rmik = 13245, |
| 13261 | VPCMPBZ128rri = 13246, |
| 13262 | VPCMPBZ128rrik = 13247, |
| 13263 | VPCMPBZ256rmi = 13248, |
| 13264 | VPCMPBZ256rmik = 13249, |
| 13265 | VPCMPBZ256rri = 13250, |
| 13266 | VPCMPBZ256rrik = 13251, |
| 13267 | VPCMPBZrmi = 13252, |
| 13268 | VPCMPBZrmik = 13253, |
| 13269 | VPCMPBZrri = 13254, |
| 13270 | VPCMPBZrrik = 13255, |
| 13271 | VPCMPDZ128rmi = 13256, |
| 13272 | VPCMPDZ128rmib = 13257, |
| 13273 | VPCMPDZ128rmibk = 13258, |
| 13274 | VPCMPDZ128rmik = 13259, |
| 13275 | VPCMPDZ128rri = 13260, |
| 13276 | VPCMPDZ128rrik = 13261, |
| 13277 | VPCMPDZ256rmi = 13262, |
| 13278 | VPCMPDZ256rmib = 13263, |
| 13279 | VPCMPDZ256rmibk = 13264, |
| 13280 | VPCMPDZ256rmik = 13265, |
| 13281 | VPCMPDZ256rri = 13266, |
| 13282 | VPCMPDZ256rrik = 13267, |
| 13283 | VPCMPDZrmi = 13268, |
| 13284 | VPCMPDZrmib = 13269, |
| 13285 | VPCMPDZrmibk = 13270, |
| 13286 | VPCMPDZrmik = 13271, |
| 13287 | VPCMPDZrri = 13272, |
| 13288 | VPCMPDZrrik = 13273, |
| 13289 | VPCMPEQBYrm = 13274, |
| 13290 | VPCMPEQBYrr = 13275, |
| 13291 | VPCMPEQBZ128rm = 13276, |
| 13292 | VPCMPEQBZ128rmk = 13277, |
| 13293 | VPCMPEQBZ128rr = 13278, |
| 13294 | VPCMPEQBZ128rrk = 13279, |
| 13295 | VPCMPEQBZ256rm = 13280, |
| 13296 | VPCMPEQBZ256rmk = 13281, |
| 13297 | VPCMPEQBZ256rr = 13282, |
| 13298 | VPCMPEQBZ256rrk = 13283, |
| 13299 | VPCMPEQBZrm = 13284, |
| 13300 | VPCMPEQBZrmk = 13285, |
| 13301 | VPCMPEQBZrr = 13286, |
| 13302 | VPCMPEQBZrrk = 13287, |
| 13303 | VPCMPEQBrm = 13288, |
| 13304 | VPCMPEQBrr = 13289, |
| 13305 | VPCMPEQDYrm = 13290, |
| 13306 | VPCMPEQDYrr = 13291, |
| 13307 | VPCMPEQDZ128rm = 13292, |
| 13308 | VPCMPEQDZ128rmb = 13293, |
| 13309 | VPCMPEQDZ128rmbk = 13294, |
| 13310 | VPCMPEQDZ128rmk = 13295, |
| 13311 | VPCMPEQDZ128rr = 13296, |
| 13312 | VPCMPEQDZ128rrk = 13297, |
| 13313 | VPCMPEQDZ256rm = 13298, |
| 13314 | VPCMPEQDZ256rmb = 13299, |
| 13315 | VPCMPEQDZ256rmbk = 13300, |
| 13316 | VPCMPEQDZ256rmk = 13301, |
| 13317 | VPCMPEQDZ256rr = 13302, |
| 13318 | VPCMPEQDZ256rrk = 13303, |
| 13319 | VPCMPEQDZrm = 13304, |
| 13320 | VPCMPEQDZrmb = 13305, |
| 13321 | VPCMPEQDZrmbk = 13306, |
| 13322 | VPCMPEQDZrmk = 13307, |
| 13323 | VPCMPEQDZrr = 13308, |
| 13324 | VPCMPEQDZrrk = 13309, |
| 13325 | VPCMPEQDrm = 13310, |
| 13326 | VPCMPEQDrr = 13311, |
| 13327 | VPCMPEQQYrm = 13312, |
| 13328 | VPCMPEQQYrr = 13313, |
| 13329 | VPCMPEQQZ128rm = 13314, |
| 13330 | VPCMPEQQZ128rmb = 13315, |
| 13331 | VPCMPEQQZ128rmbk = 13316, |
| 13332 | VPCMPEQQZ128rmk = 13317, |
| 13333 | VPCMPEQQZ128rr = 13318, |
| 13334 | VPCMPEQQZ128rrk = 13319, |
| 13335 | VPCMPEQQZ256rm = 13320, |
| 13336 | VPCMPEQQZ256rmb = 13321, |
| 13337 | VPCMPEQQZ256rmbk = 13322, |
| 13338 | VPCMPEQQZ256rmk = 13323, |
| 13339 | VPCMPEQQZ256rr = 13324, |
| 13340 | VPCMPEQQZ256rrk = 13325, |
| 13341 | VPCMPEQQZrm = 13326, |
| 13342 | VPCMPEQQZrmb = 13327, |
| 13343 | VPCMPEQQZrmbk = 13328, |
| 13344 | VPCMPEQQZrmk = 13329, |
| 13345 | VPCMPEQQZrr = 13330, |
| 13346 | VPCMPEQQZrrk = 13331, |
| 13347 | VPCMPEQQrm = 13332, |
| 13348 | VPCMPEQQrr = 13333, |
| 13349 | VPCMPEQWYrm = 13334, |
| 13350 | VPCMPEQWYrr = 13335, |
| 13351 | VPCMPEQWZ128rm = 13336, |
| 13352 | VPCMPEQWZ128rmk = 13337, |
| 13353 | VPCMPEQWZ128rr = 13338, |
| 13354 | VPCMPEQWZ128rrk = 13339, |
| 13355 | VPCMPEQWZ256rm = 13340, |
| 13356 | VPCMPEQWZ256rmk = 13341, |
| 13357 | VPCMPEQWZ256rr = 13342, |
| 13358 | VPCMPEQWZ256rrk = 13343, |
| 13359 | VPCMPEQWZrm = 13344, |
| 13360 | VPCMPEQWZrmk = 13345, |
| 13361 | VPCMPEQWZrr = 13346, |
| 13362 | VPCMPEQWZrrk = 13347, |
| 13363 | VPCMPEQWrm = 13348, |
| 13364 | VPCMPEQWrr = 13349, |
| 13365 | VPCMPESTRIrmi = 13350, |
| 13366 | VPCMPESTRIrri = 13351, |
| 13367 | VPCMPESTRMrmi = 13352, |
| 13368 | VPCMPESTRMrri = 13353, |
| 13369 | VPCMPGTBYrm = 13354, |
| 13370 | VPCMPGTBYrr = 13355, |
| 13371 | VPCMPGTBZ128rm = 13356, |
| 13372 | VPCMPGTBZ128rmk = 13357, |
| 13373 | VPCMPGTBZ128rr = 13358, |
| 13374 | VPCMPGTBZ128rrk = 13359, |
| 13375 | VPCMPGTBZ256rm = 13360, |
| 13376 | VPCMPGTBZ256rmk = 13361, |
| 13377 | VPCMPGTBZ256rr = 13362, |
| 13378 | VPCMPGTBZ256rrk = 13363, |
| 13379 | VPCMPGTBZrm = 13364, |
| 13380 | VPCMPGTBZrmk = 13365, |
| 13381 | VPCMPGTBZrr = 13366, |
| 13382 | VPCMPGTBZrrk = 13367, |
| 13383 | VPCMPGTBrm = 13368, |
| 13384 | VPCMPGTBrr = 13369, |
| 13385 | VPCMPGTDYrm = 13370, |
| 13386 | VPCMPGTDYrr = 13371, |
| 13387 | VPCMPGTDZ128rm = 13372, |
| 13388 | VPCMPGTDZ128rmb = 13373, |
| 13389 | VPCMPGTDZ128rmbk = 13374, |
| 13390 | VPCMPGTDZ128rmk = 13375, |
| 13391 | VPCMPGTDZ128rr = 13376, |
| 13392 | VPCMPGTDZ128rrk = 13377, |
| 13393 | VPCMPGTDZ256rm = 13378, |
| 13394 | VPCMPGTDZ256rmb = 13379, |
| 13395 | VPCMPGTDZ256rmbk = 13380, |
| 13396 | VPCMPGTDZ256rmk = 13381, |
| 13397 | VPCMPGTDZ256rr = 13382, |
| 13398 | VPCMPGTDZ256rrk = 13383, |
| 13399 | VPCMPGTDZrm = 13384, |
| 13400 | VPCMPGTDZrmb = 13385, |
| 13401 | VPCMPGTDZrmbk = 13386, |
| 13402 | VPCMPGTDZrmk = 13387, |
| 13403 | VPCMPGTDZrr = 13388, |
| 13404 | VPCMPGTDZrrk = 13389, |
| 13405 | VPCMPGTDrm = 13390, |
| 13406 | VPCMPGTDrr = 13391, |
| 13407 | VPCMPGTQYrm = 13392, |
| 13408 | VPCMPGTQYrr = 13393, |
| 13409 | VPCMPGTQZ128rm = 13394, |
| 13410 | VPCMPGTQZ128rmb = 13395, |
| 13411 | VPCMPGTQZ128rmbk = 13396, |
| 13412 | VPCMPGTQZ128rmk = 13397, |
| 13413 | VPCMPGTQZ128rr = 13398, |
| 13414 | VPCMPGTQZ128rrk = 13399, |
| 13415 | VPCMPGTQZ256rm = 13400, |
| 13416 | VPCMPGTQZ256rmb = 13401, |
| 13417 | VPCMPGTQZ256rmbk = 13402, |
| 13418 | VPCMPGTQZ256rmk = 13403, |
| 13419 | VPCMPGTQZ256rr = 13404, |
| 13420 | VPCMPGTQZ256rrk = 13405, |
| 13421 | VPCMPGTQZrm = 13406, |
| 13422 | VPCMPGTQZrmb = 13407, |
| 13423 | VPCMPGTQZrmbk = 13408, |
| 13424 | VPCMPGTQZrmk = 13409, |
| 13425 | VPCMPGTQZrr = 13410, |
| 13426 | VPCMPGTQZrrk = 13411, |
| 13427 | VPCMPGTQrm = 13412, |
| 13428 | VPCMPGTQrr = 13413, |
| 13429 | VPCMPGTWYrm = 13414, |
| 13430 | VPCMPGTWYrr = 13415, |
| 13431 | VPCMPGTWZ128rm = 13416, |
| 13432 | VPCMPGTWZ128rmk = 13417, |
| 13433 | VPCMPGTWZ128rr = 13418, |
| 13434 | VPCMPGTWZ128rrk = 13419, |
| 13435 | VPCMPGTWZ256rm = 13420, |
| 13436 | VPCMPGTWZ256rmk = 13421, |
| 13437 | VPCMPGTWZ256rr = 13422, |
| 13438 | VPCMPGTWZ256rrk = 13423, |
| 13439 | VPCMPGTWZrm = 13424, |
| 13440 | VPCMPGTWZrmk = 13425, |
| 13441 | VPCMPGTWZrr = 13426, |
| 13442 | VPCMPGTWZrrk = 13427, |
| 13443 | VPCMPGTWrm = 13428, |
| 13444 | VPCMPGTWrr = 13429, |
| 13445 | VPCMPISTRIrmi = 13430, |
| 13446 | VPCMPISTRIrri = 13431, |
| 13447 | VPCMPISTRMrmi = 13432, |
| 13448 | VPCMPISTRMrri = 13433, |
| 13449 | VPCMPQZ128rmi = 13434, |
| 13450 | VPCMPQZ128rmib = 13435, |
| 13451 | VPCMPQZ128rmibk = 13436, |
| 13452 | VPCMPQZ128rmik = 13437, |
| 13453 | VPCMPQZ128rri = 13438, |
| 13454 | VPCMPQZ128rrik = 13439, |
| 13455 | VPCMPQZ256rmi = 13440, |
| 13456 | VPCMPQZ256rmib = 13441, |
| 13457 | VPCMPQZ256rmibk = 13442, |
| 13458 | VPCMPQZ256rmik = 13443, |
| 13459 | VPCMPQZ256rri = 13444, |
| 13460 | VPCMPQZ256rrik = 13445, |
| 13461 | VPCMPQZrmi = 13446, |
| 13462 | VPCMPQZrmib = 13447, |
| 13463 | VPCMPQZrmibk = 13448, |
| 13464 | VPCMPQZrmik = 13449, |
| 13465 | VPCMPQZrri = 13450, |
| 13466 | VPCMPQZrrik = 13451, |
| 13467 | VPCMPUBZ128rmi = 13452, |
| 13468 | VPCMPUBZ128rmik = 13453, |
| 13469 | VPCMPUBZ128rri = 13454, |
| 13470 | VPCMPUBZ128rrik = 13455, |
| 13471 | VPCMPUBZ256rmi = 13456, |
| 13472 | VPCMPUBZ256rmik = 13457, |
| 13473 | VPCMPUBZ256rri = 13458, |
| 13474 | VPCMPUBZ256rrik = 13459, |
| 13475 | VPCMPUBZrmi = 13460, |
| 13476 | VPCMPUBZrmik = 13461, |
| 13477 | VPCMPUBZrri = 13462, |
| 13478 | VPCMPUBZrrik = 13463, |
| 13479 | VPCMPUDZ128rmi = 13464, |
| 13480 | VPCMPUDZ128rmib = 13465, |
| 13481 | VPCMPUDZ128rmibk = 13466, |
| 13482 | VPCMPUDZ128rmik = 13467, |
| 13483 | VPCMPUDZ128rri = 13468, |
| 13484 | VPCMPUDZ128rrik = 13469, |
| 13485 | VPCMPUDZ256rmi = 13470, |
| 13486 | VPCMPUDZ256rmib = 13471, |
| 13487 | VPCMPUDZ256rmibk = 13472, |
| 13488 | VPCMPUDZ256rmik = 13473, |
| 13489 | VPCMPUDZ256rri = 13474, |
| 13490 | VPCMPUDZ256rrik = 13475, |
| 13491 | VPCMPUDZrmi = 13476, |
| 13492 | VPCMPUDZrmib = 13477, |
| 13493 | VPCMPUDZrmibk = 13478, |
| 13494 | VPCMPUDZrmik = 13479, |
| 13495 | VPCMPUDZrri = 13480, |
| 13496 | VPCMPUDZrrik = 13481, |
| 13497 | VPCMPUQZ128rmi = 13482, |
| 13498 | VPCMPUQZ128rmib = 13483, |
| 13499 | VPCMPUQZ128rmibk = 13484, |
| 13500 | VPCMPUQZ128rmik = 13485, |
| 13501 | VPCMPUQZ128rri = 13486, |
| 13502 | VPCMPUQZ128rrik = 13487, |
| 13503 | VPCMPUQZ256rmi = 13488, |
| 13504 | VPCMPUQZ256rmib = 13489, |
| 13505 | VPCMPUQZ256rmibk = 13490, |
| 13506 | VPCMPUQZ256rmik = 13491, |
| 13507 | VPCMPUQZ256rri = 13492, |
| 13508 | VPCMPUQZ256rrik = 13493, |
| 13509 | VPCMPUQZrmi = 13494, |
| 13510 | VPCMPUQZrmib = 13495, |
| 13511 | VPCMPUQZrmibk = 13496, |
| 13512 | VPCMPUQZrmik = 13497, |
| 13513 | VPCMPUQZrri = 13498, |
| 13514 | VPCMPUQZrrik = 13499, |
| 13515 | VPCMPUWZ128rmi = 13500, |
| 13516 | VPCMPUWZ128rmik = 13501, |
| 13517 | VPCMPUWZ128rri = 13502, |
| 13518 | VPCMPUWZ128rrik = 13503, |
| 13519 | VPCMPUWZ256rmi = 13504, |
| 13520 | VPCMPUWZ256rmik = 13505, |
| 13521 | VPCMPUWZ256rri = 13506, |
| 13522 | VPCMPUWZ256rrik = 13507, |
| 13523 | VPCMPUWZrmi = 13508, |
| 13524 | VPCMPUWZrmik = 13509, |
| 13525 | VPCMPUWZrri = 13510, |
| 13526 | VPCMPUWZrrik = 13511, |
| 13527 | VPCMPWZ128rmi = 13512, |
| 13528 | VPCMPWZ128rmik = 13513, |
| 13529 | VPCMPWZ128rri = 13514, |
| 13530 | VPCMPWZ128rrik = 13515, |
| 13531 | VPCMPWZ256rmi = 13516, |
| 13532 | VPCMPWZ256rmik = 13517, |
| 13533 | VPCMPWZ256rri = 13518, |
| 13534 | VPCMPWZ256rrik = 13519, |
| 13535 | VPCMPWZrmi = 13520, |
| 13536 | VPCMPWZrmik = 13521, |
| 13537 | VPCMPWZrri = 13522, |
| 13538 | VPCMPWZrrik = 13523, |
| 13539 | VPCOMBmi = 13524, |
| 13540 | VPCOMBri = 13525, |
| 13541 | VPCOMDmi = 13526, |
| 13542 | VPCOMDri = 13527, |
| 13543 | VPCOMPRESSBZ128mr = 13528, |
| 13544 | VPCOMPRESSBZ128mrk = 13529, |
| 13545 | VPCOMPRESSBZ128rr = 13530, |
| 13546 | VPCOMPRESSBZ128rrk = 13531, |
| 13547 | VPCOMPRESSBZ128rrkz = 13532, |
| 13548 | VPCOMPRESSBZ256mr = 13533, |
| 13549 | VPCOMPRESSBZ256mrk = 13534, |
| 13550 | VPCOMPRESSBZ256rr = 13535, |
| 13551 | VPCOMPRESSBZ256rrk = 13536, |
| 13552 | VPCOMPRESSBZ256rrkz = 13537, |
| 13553 | VPCOMPRESSBZmr = 13538, |
| 13554 | VPCOMPRESSBZmrk = 13539, |
| 13555 | VPCOMPRESSBZrr = 13540, |
| 13556 | VPCOMPRESSBZrrk = 13541, |
| 13557 | VPCOMPRESSBZrrkz = 13542, |
| 13558 | VPCOMPRESSDZ128mr = 13543, |
| 13559 | VPCOMPRESSDZ128mrk = 13544, |
| 13560 | VPCOMPRESSDZ128rr = 13545, |
| 13561 | VPCOMPRESSDZ128rrk = 13546, |
| 13562 | VPCOMPRESSDZ128rrkz = 13547, |
| 13563 | VPCOMPRESSDZ256mr = 13548, |
| 13564 | VPCOMPRESSDZ256mrk = 13549, |
| 13565 | VPCOMPRESSDZ256rr = 13550, |
| 13566 | VPCOMPRESSDZ256rrk = 13551, |
| 13567 | VPCOMPRESSDZ256rrkz = 13552, |
| 13568 | VPCOMPRESSDZmr = 13553, |
| 13569 | VPCOMPRESSDZmrk = 13554, |
| 13570 | VPCOMPRESSDZrr = 13555, |
| 13571 | VPCOMPRESSDZrrk = 13556, |
| 13572 | VPCOMPRESSDZrrkz = 13557, |
| 13573 | VPCOMPRESSQZ128mr = 13558, |
| 13574 | VPCOMPRESSQZ128mrk = 13559, |
| 13575 | VPCOMPRESSQZ128rr = 13560, |
| 13576 | VPCOMPRESSQZ128rrk = 13561, |
| 13577 | VPCOMPRESSQZ128rrkz = 13562, |
| 13578 | VPCOMPRESSQZ256mr = 13563, |
| 13579 | VPCOMPRESSQZ256mrk = 13564, |
| 13580 | VPCOMPRESSQZ256rr = 13565, |
| 13581 | VPCOMPRESSQZ256rrk = 13566, |
| 13582 | VPCOMPRESSQZ256rrkz = 13567, |
| 13583 | VPCOMPRESSQZmr = 13568, |
| 13584 | VPCOMPRESSQZmrk = 13569, |
| 13585 | VPCOMPRESSQZrr = 13570, |
| 13586 | VPCOMPRESSQZrrk = 13571, |
| 13587 | VPCOMPRESSQZrrkz = 13572, |
| 13588 | VPCOMPRESSWZ128mr = 13573, |
| 13589 | VPCOMPRESSWZ128mrk = 13574, |
| 13590 | VPCOMPRESSWZ128rr = 13575, |
| 13591 | VPCOMPRESSWZ128rrk = 13576, |
| 13592 | VPCOMPRESSWZ128rrkz = 13577, |
| 13593 | VPCOMPRESSWZ256mr = 13578, |
| 13594 | VPCOMPRESSWZ256mrk = 13579, |
| 13595 | VPCOMPRESSWZ256rr = 13580, |
| 13596 | VPCOMPRESSWZ256rrk = 13581, |
| 13597 | VPCOMPRESSWZ256rrkz = 13582, |
| 13598 | VPCOMPRESSWZmr = 13583, |
| 13599 | VPCOMPRESSWZmrk = 13584, |
| 13600 | VPCOMPRESSWZrr = 13585, |
| 13601 | VPCOMPRESSWZrrk = 13586, |
| 13602 | VPCOMPRESSWZrrkz = 13587, |
| 13603 | VPCOMQmi = 13588, |
| 13604 | VPCOMQri = 13589, |
| 13605 | VPCOMUBmi = 13590, |
| 13606 | VPCOMUBri = 13591, |
| 13607 | VPCOMUDmi = 13592, |
| 13608 | VPCOMUDri = 13593, |
| 13609 | VPCOMUQmi = 13594, |
| 13610 | VPCOMUQri = 13595, |
| 13611 | VPCOMUWmi = 13596, |
| 13612 | VPCOMUWri = 13597, |
| 13613 | VPCOMWmi = 13598, |
| 13614 | VPCOMWri = 13599, |
| 13615 | VPCONFLICTDZ128rm = 13600, |
| 13616 | VPCONFLICTDZ128rmb = 13601, |
| 13617 | VPCONFLICTDZ128rmbk = 13602, |
| 13618 | VPCONFLICTDZ128rmbkz = 13603, |
| 13619 | VPCONFLICTDZ128rmk = 13604, |
| 13620 | VPCONFLICTDZ128rmkz = 13605, |
| 13621 | VPCONFLICTDZ128rr = 13606, |
| 13622 | VPCONFLICTDZ128rrk = 13607, |
| 13623 | VPCONFLICTDZ128rrkz = 13608, |
| 13624 | VPCONFLICTDZ256rm = 13609, |
| 13625 | VPCONFLICTDZ256rmb = 13610, |
| 13626 | VPCONFLICTDZ256rmbk = 13611, |
| 13627 | VPCONFLICTDZ256rmbkz = 13612, |
| 13628 | VPCONFLICTDZ256rmk = 13613, |
| 13629 | VPCONFLICTDZ256rmkz = 13614, |
| 13630 | VPCONFLICTDZ256rr = 13615, |
| 13631 | VPCONFLICTDZ256rrk = 13616, |
| 13632 | VPCONFLICTDZ256rrkz = 13617, |
| 13633 | VPCONFLICTDZrm = 13618, |
| 13634 | VPCONFLICTDZrmb = 13619, |
| 13635 | VPCONFLICTDZrmbk = 13620, |
| 13636 | VPCONFLICTDZrmbkz = 13621, |
| 13637 | VPCONFLICTDZrmk = 13622, |
| 13638 | VPCONFLICTDZrmkz = 13623, |
| 13639 | VPCONFLICTDZrr = 13624, |
| 13640 | VPCONFLICTDZrrk = 13625, |
| 13641 | VPCONFLICTDZrrkz = 13626, |
| 13642 | VPCONFLICTQZ128rm = 13627, |
| 13643 | VPCONFLICTQZ128rmb = 13628, |
| 13644 | VPCONFLICTQZ128rmbk = 13629, |
| 13645 | VPCONFLICTQZ128rmbkz = 13630, |
| 13646 | VPCONFLICTQZ128rmk = 13631, |
| 13647 | VPCONFLICTQZ128rmkz = 13632, |
| 13648 | VPCONFLICTQZ128rr = 13633, |
| 13649 | VPCONFLICTQZ128rrk = 13634, |
| 13650 | VPCONFLICTQZ128rrkz = 13635, |
| 13651 | VPCONFLICTQZ256rm = 13636, |
| 13652 | VPCONFLICTQZ256rmb = 13637, |
| 13653 | VPCONFLICTQZ256rmbk = 13638, |
| 13654 | VPCONFLICTQZ256rmbkz = 13639, |
| 13655 | VPCONFLICTQZ256rmk = 13640, |
| 13656 | VPCONFLICTQZ256rmkz = 13641, |
| 13657 | VPCONFLICTQZ256rr = 13642, |
| 13658 | VPCONFLICTQZ256rrk = 13643, |
| 13659 | VPCONFLICTQZ256rrkz = 13644, |
| 13660 | VPCONFLICTQZrm = 13645, |
| 13661 | VPCONFLICTQZrmb = 13646, |
| 13662 | VPCONFLICTQZrmbk = 13647, |
| 13663 | VPCONFLICTQZrmbkz = 13648, |
| 13664 | VPCONFLICTQZrmk = 13649, |
| 13665 | VPCONFLICTQZrmkz = 13650, |
| 13666 | VPCONFLICTQZrr = 13651, |
| 13667 | VPCONFLICTQZrrk = 13652, |
| 13668 | VPCONFLICTQZrrkz = 13653, |
| 13669 | VPDPBSSDSYrm = 13654, |
| 13670 | VPDPBSSDSYrr = 13655, |
| 13671 | VPDPBSSDSrm = 13656, |
| 13672 | VPDPBSSDSrr = 13657, |
| 13673 | VPDPBSSDYrm = 13658, |
| 13674 | VPDPBSSDYrr = 13659, |
| 13675 | VPDPBSSDrm = 13660, |
| 13676 | VPDPBSSDrr = 13661, |
| 13677 | VPDPBSUDSYrm = 13662, |
| 13678 | VPDPBSUDSYrr = 13663, |
| 13679 | VPDPBSUDSrm = 13664, |
| 13680 | VPDPBSUDSrr = 13665, |
| 13681 | VPDPBSUDYrm = 13666, |
| 13682 | VPDPBSUDYrr = 13667, |
| 13683 | VPDPBSUDrm = 13668, |
| 13684 | VPDPBSUDrr = 13669, |
| 13685 | VPDPBUSDSYrm = 13670, |
| 13686 | VPDPBUSDSYrr = 13671, |
| 13687 | VPDPBUSDSZ128m = 13672, |
| 13688 | VPDPBUSDSZ128mb = 13673, |
| 13689 | VPDPBUSDSZ128mbk = 13674, |
| 13690 | VPDPBUSDSZ128mbkz = 13675, |
| 13691 | VPDPBUSDSZ128mk = 13676, |
| 13692 | VPDPBUSDSZ128mkz = 13677, |
| 13693 | VPDPBUSDSZ128r = 13678, |
| 13694 | VPDPBUSDSZ128rk = 13679, |
| 13695 | VPDPBUSDSZ128rkz = 13680, |
| 13696 | VPDPBUSDSZ256m = 13681, |
| 13697 | VPDPBUSDSZ256mb = 13682, |
| 13698 | VPDPBUSDSZ256mbk = 13683, |
| 13699 | VPDPBUSDSZ256mbkz = 13684, |
| 13700 | VPDPBUSDSZ256mk = 13685, |
| 13701 | VPDPBUSDSZ256mkz = 13686, |
| 13702 | VPDPBUSDSZ256r = 13687, |
| 13703 | VPDPBUSDSZ256rk = 13688, |
| 13704 | VPDPBUSDSZ256rkz = 13689, |
| 13705 | VPDPBUSDSZm = 13690, |
| 13706 | VPDPBUSDSZmb = 13691, |
| 13707 | VPDPBUSDSZmbk = 13692, |
| 13708 | VPDPBUSDSZmbkz = 13693, |
| 13709 | VPDPBUSDSZmk = 13694, |
| 13710 | VPDPBUSDSZmkz = 13695, |
| 13711 | VPDPBUSDSZr = 13696, |
| 13712 | VPDPBUSDSZrk = 13697, |
| 13713 | VPDPBUSDSZrkz = 13698, |
| 13714 | VPDPBUSDSrm = 13699, |
| 13715 | VPDPBUSDSrr = 13700, |
| 13716 | VPDPBUSDYrm = 13701, |
| 13717 | VPDPBUSDYrr = 13702, |
| 13718 | VPDPBUSDZ128m = 13703, |
| 13719 | VPDPBUSDZ128mb = 13704, |
| 13720 | VPDPBUSDZ128mbk = 13705, |
| 13721 | VPDPBUSDZ128mbkz = 13706, |
| 13722 | VPDPBUSDZ128mk = 13707, |
| 13723 | VPDPBUSDZ128mkz = 13708, |
| 13724 | VPDPBUSDZ128r = 13709, |
| 13725 | VPDPBUSDZ128rk = 13710, |
| 13726 | VPDPBUSDZ128rkz = 13711, |
| 13727 | VPDPBUSDZ256m = 13712, |
| 13728 | VPDPBUSDZ256mb = 13713, |
| 13729 | VPDPBUSDZ256mbk = 13714, |
| 13730 | VPDPBUSDZ256mbkz = 13715, |
| 13731 | VPDPBUSDZ256mk = 13716, |
| 13732 | VPDPBUSDZ256mkz = 13717, |
| 13733 | VPDPBUSDZ256r = 13718, |
| 13734 | VPDPBUSDZ256rk = 13719, |
| 13735 | VPDPBUSDZ256rkz = 13720, |
| 13736 | VPDPBUSDZm = 13721, |
| 13737 | VPDPBUSDZmb = 13722, |
| 13738 | VPDPBUSDZmbk = 13723, |
| 13739 | VPDPBUSDZmbkz = 13724, |
| 13740 | VPDPBUSDZmk = 13725, |
| 13741 | VPDPBUSDZmkz = 13726, |
| 13742 | VPDPBUSDZr = 13727, |
| 13743 | VPDPBUSDZrk = 13728, |
| 13744 | VPDPBUSDZrkz = 13729, |
| 13745 | VPDPBUSDrm = 13730, |
| 13746 | VPDPBUSDrr = 13731, |
| 13747 | VPDPBUUDSYrm = 13732, |
| 13748 | VPDPBUUDSYrr = 13733, |
| 13749 | VPDPBUUDSrm = 13734, |
| 13750 | VPDPBUUDSrr = 13735, |
| 13751 | VPDPBUUDYrm = 13736, |
| 13752 | VPDPBUUDYrr = 13737, |
| 13753 | VPDPBUUDrm = 13738, |
| 13754 | VPDPBUUDrr = 13739, |
| 13755 | VPDPWSSDSYrm = 13740, |
| 13756 | VPDPWSSDSYrr = 13741, |
| 13757 | VPDPWSSDSZ128m = 13742, |
| 13758 | VPDPWSSDSZ128mb = 13743, |
| 13759 | VPDPWSSDSZ128mbk = 13744, |
| 13760 | VPDPWSSDSZ128mbkz = 13745, |
| 13761 | VPDPWSSDSZ128mk = 13746, |
| 13762 | VPDPWSSDSZ128mkz = 13747, |
| 13763 | VPDPWSSDSZ128r = 13748, |
| 13764 | VPDPWSSDSZ128rk = 13749, |
| 13765 | VPDPWSSDSZ128rkz = 13750, |
| 13766 | VPDPWSSDSZ256m = 13751, |
| 13767 | VPDPWSSDSZ256mb = 13752, |
| 13768 | VPDPWSSDSZ256mbk = 13753, |
| 13769 | VPDPWSSDSZ256mbkz = 13754, |
| 13770 | VPDPWSSDSZ256mk = 13755, |
| 13771 | VPDPWSSDSZ256mkz = 13756, |
| 13772 | VPDPWSSDSZ256r = 13757, |
| 13773 | VPDPWSSDSZ256rk = 13758, |
| 13774 | VPDPWSSDSZ256rkz = 13759, |
| 13775 | VPDPWSSDSZm = 13760, |
| 13776 | VPDPWSSDSZmb = 13761, |
| 13777 | VPDPWSSDSZmbk = 13762, |
| 13778 | VPDPWSSDSZmbkz = 13763, |
| 13779 | VPDPWSSDSZmk = 13764, |
| 13780 | VPDPWSSDSZmkz = 13765, |
| 13781 | VPDPWSSDSZr = 13766, |
| 13782 | VPDPWSSDSZrk = 13767, |
| 13783 | VPDPWSSDSZrkz = 13768, |
| 13784 | VPDPWSSDSrm = 13769, |
| 13785 | VPDPWSSDSrr = 13770, |
| 13786 | VPDPWSSDYrm = 13771, |
| 13787 | VPDPWSSDYrr = 13772, |
| 13788 | VPDPWSSDZ128m = 13773, |
| 13789 | VPDPWSSDZ128mb = 13774, |
| 13790 | VPDPWSSDZ128mbk = 13775, |
| 13791 | VPDPWSSDZ128mbkz = 13776, |
| 13792 | VPDPWSSDZ128mk = 13777, |
| 13793 | VPDPWSSDZ128mkz = 13778, |
| 13794 | VPDPWSSDZ128r = 13779, |
| 13795 | VPDPWSSDZ128rk = 13780, |
| 13796 | VPDPWSSDZ128rkz = 13781, |
| 13797 | VPDPWSSDZ256m = 13782, |
| 13798 | VPDPWSSDZ256mb = 13783, |
| 13799 | VPDPWSSDZ256mbk = 13784, |
| 13800 | VPDPWSSDZ256mbkz = 13785, |
| 13801 | VPDPWSSDZ256mk = 13786, |
| 13802 | VPDPWSSDZ256mkz = 13787, |
| 13803 | VPDPWSSDZ256r = 13788, |
| 13804 | VPDPWSSDZ256rk = 13789, |
| 13805 | VPDPWSSDZ256rkz = 13790, |
| 13806 | VPDPWSSDZm = 13791, |
| 13807 | VPDPWSSDZmb = 13792, |
| 13808 | VPDPWSSDZmbk = 13793, |
| 13809 | VPDPWSSDZmbkz = 13794, |
| 13810 | VPDPWSSDZmk = 13795, |
| 13811 | VPDPWSSDZmkz = 13796, |
| 13812 | VPDPWSSDZr = 13797, |
| 13813 | VPDPWSSDZrk = 13798, |
| 13814 | VPDPWSSDZrkz = 13799, |
| 13815 | VPDPWSSDrm = 13800, |
| 13816 | VPDPWSSDrr = 13801, |
| 13817 | VPDPWSUDSYrm = 13802, |
| 13818 | VPDPWSUDSYrr = 13803, |
| 13819 | VPDPWSUDSrm = 13804, |
| 13820 | VPDPWSUDSrr = 13805, |
| 13821 | VPDPWSUDYrm = 13806, |
| 13822 | VPDPWSUDYrr = 13807, |
| 13823 | VPDPWSUDrm = 13808, |
| 13824 | VPDPWSUDrr = 13809, |
| 13825 | VPDPWUSDSYrm = 13810, |
| 13826 | VPDPWUSDSYrr = 13811, |
| 13827 | VPDPWUSDSrm = 13812, |
| 13828 | VPDPWUSDSrr = 13813, |
| 13829 | VPDPWUSDYrm = 13814, |
| 13830 | VPDPWUSDYrr = 13815, |
| 13831 | VPDPWUSDrm = 13816, |
| 13832 | VPDPWUSDrr = 13817, |
| 13833 | VPDPWUUDSYrm = 13818, |
| 13834 | VPDPWUUDSYrr = 13819, |
| 13835 | VPDPWUUDSrm = 13820, |
| 13836 | VPDPWUUDSrr = 13821, |
| 13837 | VPDPWUUDYrm = 13822, |
| 13838 | VPDPWUUDYrr = 13823, |
| 13839 | VPDPWUUDrm = 13824, |
| 13840 | VPDPWUUDrr = 13825, |
| 13841 | VPERM2F128rm = 13826, |
| 13842 | VPERM2F128rr = 13827, |
| 13843 | VPERM2I128rm = 13828, |
| 13844 | VPERM2I128rr = 13829, |
| 13845 | VPERMBZ128rm = 13830, |
| 13846 | VPERMBZ128rmk = 13831, |
| 13847 | VPERMBZ128rmkz = 13832, |
| 13848 | VPERMBZ128rr = 13833, |
| 13849 | VPERMBZ128rrk = 13834, |
| 13850 | VPERMBZ128rrkz = 13835, |
| 13851 | VPERMBZ256rm = 13836, |
| 13852 | VPERMBZ256rmk = 13837, |
| 13853 | VPERMBZ256rmkz = 13838, |
| 13854 | VPERMBZ256rr = 13839, |
| 13855 | VPERMBZ256rrk = 13840, |
| 13856 | VPERMBZ256rrkz = 13841, |
| 13857 | VPERMBZrm = 13842, |
| 13858 | VPERMBZrmk = 13843, |
| 13859 | VPERMBZrmkz = 13844, |
| 13860 | VPERMBZrr = 13845, |
| 13861 | VPERMBZrrk = 13846, |
| 13862 | VPERMBZrrkz = 13847, |
| 13863 | VPERMDYrm = 13848, |
| 13864 | VPERMDYrr = 13849, |
| 13865 | VPERMDZ256rm = 13850, |
| 13866 | VPERMDZ256rmb = 13851, |
| 13867 | VPERMDZ256rmbk = 13852, |
| 13868 | VPERMDZ256rmbkz = 13853, |
| 13869 | VPERMDZ256rmk = 13854, |
| 13870 | VPERMDZ256rmkz = 13855, |
| 13871 | VPERMDZ256rr = 13856, |
| 13872 | VPERMDZ256rrk = 13857, |
| 13873 | VPERMDZ256rrkz = 13858, |
| 13874 | VPERMDZrm = 13859, |
| 13875 | VPERMDZrmb = 13860, |
| 13876 | VPERMDZrmbk = 13861, |
| 13877 | VPERMDZrmbkz = 13862, |
| 13878 | VPERMDZrmk = 13863, |
| 13879 | VPERMDZrmkz = 13864, |
| 13880 | VPERMDZrr = 13865, |
| 13881 | VPERMDZrrk = 13866, |
| 13882 | VPERMDZrrkz = 13867, |
| 13883 | VPERMI2BZ128rm = 13868, |
| 13884 | VPERMI2BZ128rmk = 13869, |
| 13885 | VPERMI2BZ128rmkz = 13870, |
| 13886 | VPERMI2BZ128rr = 13871, |
| 13887 | VPERMI2BZ128rrk = 13872, |
| 13888 | VPERMI2BZ128rrkz = 13873, |
| 13889 | VPERMI2BZ256rm = 13874, |
| 13890 | VPERMI2BZ256rmk = 13875, |
| 13891 | VPERMI2BZ256rmkz = 13876, |
| 13892 | VPERMI2BZ256rr = 13877, |
| 13893 | VPERMI2BZ256rrk = 13878, |
| 13894 | VPERMI2BZ256rrkz = 13879, |
| 13895 | VPERMI2BZrm = 13880, |
| 13896 | VPERMI2BZrmk = 13881, |
| 13897 | VPERMI2BZrmkz = 13882, |
| 13898 | VPERMI2BZrr = 13883, |
| 13899 | VPERMI2BZrrk = 13884, |
| 13900 | VPERMI2BZrrkz = 13885, |
| 13901 | VPERMI2DZ128rm = 13886, |
| 13902 | VPERMI2DZ128rmb = 13887, |
| 13903 | VPERMI2DZ128rmbk = 13888, |
| 13904 | VPERMI2DZ128rmbkz = 13889, |
| 13905 | VPERMI2DZ128rmk = 13890, |
| 13906 | VPERMI2DZ128rmkz = 13891, |
| 13907 | VPERMI2DZ128rr = 13892, |
| 13908 | VPERMI2DZ128rrk = 13893, |
| 13909 | VPERMI2DZ128rrkz = 13894, |
| 13910 | VPERMI2DZ256rm = 13895, |
| 13911 | VPERMI2DZ256rmb = 13896, |
| 13912 | VPERMI2DZ256rmbk = 13897, |
| 13913 | VPERMI2DZ256rmbkz = 13898, |
| 13914 | VPERMI2DZ256rmk = 13899, |
| 13915 | VPERMI2DZ256rmkz = 13900, |
| 13916 | VPERMI2DZ256rr = 13901, |
| 13917 | VPERMI2DZ256rrk = 13902, |
| 13918 | VPERMI2DZ256rrkz = 13903, |
| 13919 | VPERMI2DZrm = 13904, |
| 13920 | VPERMI2DZrmb = 13905, |
| 13921 | VPERMI2DZrmbk = 13906, |
| 13922 | VPERMI2DZrmbkz = 13907, |
| 13923 | VPERMI2DZrmk = 13908, |
| 13924 | VPERMI2DZrmkz = 13909, |
| 13925 | VPERMI2DZrr = 13910, |
| 13926 | VPERMI2DZrrk = 13911, |
| 13927 | VPERMI2DZrrkz = 13912, |
| 13928 | VPERMI2PDZ128rm = 13913, |
| 13929 | VPERMI2PDZ128rmb = 13914, |
| 13930 | VPERMI2PDZ128rmbk = 13915, |
| 13931 | VPERMI2PDZ128rmbkz = 13916, |
| 13932 | VPERMI2PDZ128rmk = 13917, |
| 13933 | VPERMI2PDZ128rmkz = 13918, |
| 13934 | VPERMI2PDZ128rr = 13919, |
| 13935 | VPERMI2PDZ128rrk = 13920, |
| 13936 | VPERMI2PDZ128rrkz = 13921, |
| 13937 | VPERMI2PDZ256rm = 13922, |
| 13938 | VPERMI2PDZ256rmb = 13923, |
| 13939 | VPERMI2PDZ256rmbk = 13924, |
| 13940 | VPERMI2PDZ256rmbkz = 13925, |
| 13941 | VPERMI2PDZ256rmk = 13926, |
| 13942 | VPERMI2PDZ256rmkz = 13927, |
| 13943 | VPERMI2PDZ256rr = 13928, |
| 13944 | VPERMI2PDZ256rrk = 13929, |
| 13945 | VPERMI2PDZ256rrkz = 13930, |
| 13946 | VPERMI2PDZrm = 13931, |
| 13947 | VPERMI2PDZrmb = 13932, |
| 13948 | VPERMI2PDZrmbk = 13933, |
| 13949 | VPERMI2PDZrmbkz = 13934, |
| 13950 | VPERMI2PDZrmk = 13935, |
| 13951 | VPERMI2PDZrmkz = 13936, |
| 13952 | VPERMI2PDZrr = 13937, |
| 13953 | VPERMI2PDZrrk = 13938, |
| 13954 | VPERMI2PDZrrkz = 13939, |
| 13955 | VPERMI2PSZ128rm = 13940, |
| 13956 | VPERMI2PSZ128rmb = 13941, |
| 13957 | VPERMI2PSZ128rmbk = 13942, |
| 13958 | VPERMI2PSZ128rmbkz = 13943, |
| 13959 | VPERMI2PSZ128rmk = 13944, |
| 13960 | VPERMI2PSZ128rmkz = 13945, |
| 13961 | VPERMI2PSZ128rr = 13946, |
| 13962 | VPERMI2PSZ128rrk = 13947, |
| 13963 | VPERMI2PSZ128rrkz = 13948, |
| 13964 | VPERMI2PSZ256rm = 13949, |
| 13965 | VPERMI2PSZ256rmb = 13950, |
| 13966 | VPERMI2PSZ256rmbk = 13951, |
| 13967 | VPERMI2PSZ256rmbkz = 13952, |
| 13968 | VPERMI2PSZ256rmk = 13953, |
| 13969 | VPERMI2PSZ256rmkz = 13954, |
| 13970 | VPERMI2PSZ256rr = 13955, |
| 13971 | VPERMI2PSZ256rrk = 13956, |
| 13972 | VPERMI2PSZ256rrkz = 13957, |
| 13973 | VPERMI2PSZrm = 13958, |
| 13974 | VPERMI2PSZrmb = 13959, |
| 13975 | VPERMI2PSZrmbk = 13960, |
| 13976 | VPERMI2PSZrmbkz = 13961, |
| 13977 | VPERMI2PSZrmk = 13962, |
| 13978 | VPERMI2PSZrmkz = 13963, |
| 13979 | VPERMI2PSZrr = 13964, |
| 13980 | VPERMI2PSZrrk = 13965, |
| 13981 | VPERMI2PSZrrkz = 13966, |
| 13982 | VPERMI2QZ128rm = 13967, |
| 13983 | VPERMI2QZ128rmb = 13968, |
| 13984 | VPERMI2QZ128rmbk = 13969, |
| 13985 | VPERMI2QZ128rmbkz = 13970, |
| 13986 | VPERMI2QZ128rmk = 13971, |
| 13987 | VPERMI2QZ128rmkz = 13972, |
| 13988 | VPERMI2QZ128rr = 13973, |
| 13989 | VPERMI2QZ128rrk = 13974, |
| 13990 | VPERMI2QZ128rrkz = 13975, |
| 13991 | VPERMI2QZ256rm = 13976, |
| 13992 | VPERMI2QZ256rmb = 13977, |
| 13993 | VPERMI2QZ256rmbk = 13978, |
| 13994 | VPERMI2QZ256rmbkz = 13979, |
| 13995 | VPERMI2QZ256rmk = 13980, |
| 13996 | VPERMI2QZ256rmkz = 13981, |
| 13997 | VPERMI2QZ256rr = 13982, |
| 13998 | VPERMI2QZ256rrk = 13983, |
| 13999 | VPERMI2QZ256rrkz = 13984, |
| 14000 | VPERMI2QZrm = 13985, |
| 14001 | VPERMI2QZrmb = 13986, |
| 14002 | VPERMI2QZrmbk = 13987, |
| 14003 | VPERMI2QZrmbkz = 13988, |
| 14004 | VPERMI2QZrmk = 13989, |
| 14005 | VPERMI2QZrmkz = 13990, |
| 14006 | VPERMI2QZrr = 13991, |
| 14007 | VPERMI2QZrrk = 13992, |
| 14008 | VPERMI2QZrrkz = 13993, |
| 14009 | VPERMI2WZ128rm = 13994, |
| 14010 | VPERMI2WZ128rmk = 13995, |
| 14011 | VPERMI2WZ128rmkz = 13996, |
| 14012 | VPERMI2WZ128rr = 13997, |
| 14013 | VPERMI2WZ128rrk = 13998, |
| 14014 | VPERMI2WZ128rrkz = 13999, |
| 14015 | VPERMI2WZ256rm = 14000, |
| 14016 | VPERMI2WZ256rmk = 14001, |
| 14017 | VPERMI2WZ256rmkz = 14002, |
| 14018 | VPERMI2WZ256rr = 14003, |
| 14019 | VPERMI2WZ256rrk = 14004, |
| 14020 | VPERMI2WZ256rrkz = 14005, |
| 14021 | VPERMI2WZrm = 14006, |
| 14022 | VPERMI2WZrmk = 14007, |
| 14023 | VPERMI2WZrmkz = 14008, |
| 14024 | VPERMI2WZrr = 14009, |
| 14025 | VPERMI2WZrrk = 14010, |
| 14026 | VPERMI2WZrrkz = 14011, |
| 14027 | VPERMIL2PDYmr = 14012, |
| 14028 | VPERMIL2PDYrm = 14013, |
| 14029 | VPERMIL2PDYrr = 14014, |
| 14030 | VPERMIL2PDYrr_REV = 14015, |
| 14031 | VPERMIL2PDmr = 14016, |
| 14032 | VPERMIL2PDrm = 14017, |
| 14033 | VPERMIL2PDrr = 14018, |
| 14034 | VPERMIL2PDrr_REV = 14019, |
| 14035 | VPERMIL2PSYmr = 14020, |
| 14036 | VPERMIL2PSYrm = 14021, |
| 14037 | VPERMIL2PSYrr = 14022, |
| 14038 | VPERMIL2PSYrr_REV = 14023, |
| 14039 | VPERMIL2PSmr = 14024, |
| 14040 | VPERMIL2PSrm = 14025, |
| 14041 | VPERMIL2PSrr = 14026, |
| 14042 | VPERMIL2PSrr_REV = 14027, |
| 14043 | VPERMILPDYmi = 14028, |
| 14044 | VPERMILPDYri = 14029, |
| 14045 | VPERMILPDYrm = 14030, |
| 14046 | VPERMILPDYrr = 14031, |
| 14047 | VPERMILPDZ128mbi = 14032, |
| 14048 | VPERMILPDZ128mbik = 14033, |
| 14049 | VPERMILPDZ128mbikz = 14034, |
| 14050 | VPERMILPDZ128mi = 14035, |
| 14051 | VPERMILPDZ128mik = 14036, |
| 14052 | VPERMILPDZ128mikz = 14037, |
| 14053 | VPERMILPDZ128ri = 14038, |
| 14054 | VPERMILPDZ128rik = 14039, |
| 14055 | VPERMILPDZ128rikz = 14040, |
| 14056 | VPERMILPDZ128rm = 14041, |
| 14057 | VPERMILPDZ128rmb = 14042, |
| 14058 | VPERMILPDZ128rmbk = 14043, |
| 14059 | VPERMILPDZ128rmbkz = 14044, |
| 14060 | VPERMILPDZ128rmk = 14045, |
| 14061 | VPERMILPDZ128rmkz = 14046, |
| 14062 | VPERMILPDZ128rr = 14047, |
| 14063 | VPERMILPDZ128rrk = 14048, |
| 14064 | VPERMILPDZ128rrkz = 14049, |
| 14065 | VPERMILPDZ256mbi = 14050, |
| 14066 | VPERMILPDZ256mbik = 14051, |
| 14067 | VPERMILPDZ256mbikz = 14052, |
| 14068 | VPERMILPDZ256mi = 14053, |
| 14069 | VPERMILPDZ256mik = 14054, |
| 14070 | VPERMILPDZ256mikz = 14055, |
| 14071 | VPERMILPDZ256ri = 14056, |
| 14072 | VPERMILPDZ256rik = 14057, |
| 14073 | VPERMILPDZ256rikz = 14058, |
| 14074 | VPERMILPDZ256rm = 14059, |
| 14075 | VPERMILPDZ256rmb = 14060, |
| 14076 | VPERMILPDZ256rmbk = 14061, |
| 14077 | VPERMILPDZ256rmbkz = 14062, |
| 14078 | VPERMILPDZ256rmk = 14063, |
| 14079 | VPERMILPDZ256rmkz = 14064, |
| 14080 | VPERMILPDZ256rr = 14065, |
| 14081 | VPERMILPDZ256rrk = 14066, |
| 14082 | VPERMILPDZ256rrkz = 14067, |
| 14083 | VPERMILPDZmbi = 14068, |
| 14084 | VPERMILPDZmbik = 14069, |
| 14085 | VPERMILPDZmbikz = 14070, |
| 14086 | VPERMILPDZmi = 14071, |
| 14087 | VPERMILPDZmik = 14072, |
| 14088 | VPERMILPDZmikz = 14073, |
| 14089 | VPERMILPDZri = 14074, |
| 14090 | VPERMILPDZrik = 14075, |
| 14091 | VPERMILPDZrikz = 14076, |
| 14092 | VPERMILPDZrm = 14077, |
| 14093 | VPERMILPDZrmb = 14078, |
| 14094 | VPERMILPDZrmbk = 14079, |
| 14095 | VPERMILPDZrmbkz = 14080, |
| 14096 | VPERMILPDZrmk = 14081, |
| 14097 | VPERMILPDZrmkz = 14082, |
| 14098 | VPERMILPDZrr = 14083, |
| 14099 | VPERMILPDZrrk = 14084, |
| 14100 | VPERMILPDZrrkz = 14085, |
| 14101 | VPERMILPDmi = 14086, |
| 14102 | VPERMILPDri = 14087, |
| 14103 | VPERMILPDrm = 14088, |
| 14104 | VPERMILPDrr = 14089, |
| 14105 | VPERMILPSYmi = 14090, |
| 14106 | VPERMILPSYri = 14091, |
| 14107 | VPERMILPSYrm = 14092, |
| 14108 | VPERMILPSYrr = 14093, |
| 14109 | VPERMILPSZ128mbi = 14094, |
| 14110 | VPERMILPSZ128mbik = 14095, |
| 14111 | VPERMILPSZ128mbikz = 14096, |
| 14112 | VPERMILPSZ128mi = 14097, |
| 14113 | VPERMILPSZ128mik = 14098, |
| 14114 | VPERMILPSZ128mikz = 14099, |
| 14115 | VPERMILPSZ128ri = 14100, |
| 14116 | VPERMILPSZ128rik = 14101, |
| 14117 | VPERMILPSZ128rikz = 14102, |
| 14118 | VPERMILPSZ128rm = 14103, |
| 14119 | VPERMILPSZ128rmb = 14104, |
| 14120 | VPERMILPSZ128rmbk = 14105, |
| 14121 | VPERMILPSZ128rmbkz = 14106, |
| 14122 | VPERMILPSZ128rmk = 14107, |
| 14123 | VPERMILPSZ128rmkz = 14108, |
| 14124 | VPERMILPSZ128rr = 14109, |
| 14125 | VPERMILPSZ128rrk = 14110, |
| 14126 | VPERMILPSZ128rrkz = 14111, |
| 14127 | VPERMILPSZ256mbi = 14112, |
| 14128 | VPERMILPSZ256mbik = 14113, |
| 14129 | VPERMILPSZ256mbikz = 14114, |
| 14130 | VPERMILPSZ256mi = 14115, |
| 14131 | VPERMILPSZ256mik = 14116, |
| 14132 | VPERMILPSZ256mikz = 14117, |
| 14133 | VPERMILPSZ256ri = 14118, |
| 14134 | VPERMILPSZ256rik = 14119, |
| 14135 | VPERMILPSZ256rikz = 14120, |
| 14136 | VPERMILPSZ256rm = 14121, |
| 14137 | VPERMILPSZ256rmb = 14122, |
| 14138 | VPERMILPSZ256rmbk = 14123, |
| 14139 | VPERMILPSZ256rmbkz = 14124, |
| 14140 | VPERMILPSZ256rmk = 14125, |
| 14141 | VPERMILPSZ256rmkz = 14126, |
| 14142 | VPERMILPSZ256rr = 14127, |
| 14143 | VPERMILPSZ256rrk = 14128, |
| 14144 | VPERMILPSZ256rrkz = 14129, |
| 14145 | VPERMILPSZmbi = 14130, |
| 14146 | VPERMILPSZmbik = 14131, |
| 14147 | VPERMILPSZmbikz = 14132, |
| 14148 | VPERMILPSZmi = 14133, |
| 14149 | VPERMILPSZmik = 14134, |
| 14150 | VPERMILPSZmikz = 14135, |
| 14151 | VPERMILPSZri = 14136, |
| 14152 | VPERMILPSZrik = 14137, |
| 14153 | VPERMILPSZrikz = 14138, |
| 14154 | VPERMILPSZrm = 14139, |
| 14155 | VPERMILPSZrmb = 14140, |
| 14156 | VPERMILPSZrmbk = 14141, |
| 14157 | VPERMILPSZrmbkz = 14142, |
| 14158 | VPERMILPSZrmk = 14143, |
| 14159 | VPERMILPSZrmkz = 14144, |
| 14160 | VPERMILPSZrr = 14145, |
| 14161 | VPERMILPSZrrk = 14146, |
| 14162 | VPERMILPSZrrkz = 14147, |
| 14163 | VPERMILPSmi = 14148, |
| 14164 | VPERMILPSri = 14149, |
| 14165 | VPERMILPSrm = 14150, |
| 14166 | VPERMILPSrr = 14151, |
| 14167 | VPERMPDYmi = 14152, |
| 14168 | VPERMPDYri = 14153, |
| 14169 | VPERMPDZ256mbi = 14154, |
| 14170 | VPERMPDZ256mbik = 14155, |
| 14171 | VPERMPDZ256mbikz = 14156, |
| 14172 | VPERMPDZ256mi = 14157, |
| 14173 | VPERMPDZ256mik = 14158, |
| 14174 | VPERMPDZ256mikz = 14159, |
| 14175 | VPERMPDZ256ri = 14160, |
| 14176 | VPERMPDZ256rik = 14161, |
| 14177 | VPERMPDZ256rikz = 14162, |
| 14178 | VPERMPDZ256rm = 14163, |
| 14179 | VPERMPDZ256rmb = 14164, |
| 14180 | VPERMPDZ256rmbk = 14165, |
| 14181 | VPERMPDZ256rmbkz = 14166, |
| 14182 | VPERMPDZ256rmk = 14167, |
| 14183 | VPERMPDZ256rmkz = 14168, |
| 14184 | VPERMPDZ256rr = 14169, |
| 14185 | VPERMPDZ256rrk = 14170, |
| 14186 | VPERMPDZ256rrkz = 14171, |
| 14187 | VPERMPDZmbi = 14172, |
| 14188 | VPERMPDZmbik = 14173, |
| 14189 | VPERMPDZmbikz = 14174, |
| 14190 | VPERMPDZmi = 14175, |
| 14191 | VPERMPDZmik = 14176, |
| 14192 | VPERMPDZmikz = 14177, |
| 14193 | VPERMPDZri = 14178, |
| 14194 | VPERMPDZrik = 14179, |
| 14195 | VPERMPDZrikz = 14180, |
| 14196 | VPERMPDZrm = 14181, |
| 14197 | VPERMPDZrmb = 14182, |
| 14198 | VPERMPDZrmbk = 14183, |
| 14199 | VPERMPDZrmbkz = 14184, |
| 14200 | VPERMPDZrmk = 14185, |
| 14201 | VPERMPDZrmkz = 14186, |
| 14202 | VPERMPDZrr = 14187, |
| 14203 | VPERMPDZrrk = 14188, |
| 14204 | VPERMPDZrrkz = 14189, |
| 14205 | VPERMPSYrm = 14190, |
| 14206 | VPERMPSYrr = 14191, |
| 14207 | VPERMPSZ256rm = 14192, |
| 14208 | VPERMPSZ256rmb = 14193, |
| 14209 | VPERMPSZ256rmbk = 14194, |
| 14210 | VPERMPSZ256rmbkz = 14195, |
| 14211 | VPERMPSZ256rmk = 14196, |
| 14212 | VPERMPSZ256rmkz = 14197, |
| 14213 | VPERMPSZ256rr = 14198, |
| 14214 | VPERMPSZ256rrk = 14199, |
| 14215 | VPERMPSZ256rrkz = 14200, |
| 14216 | VPERMPSZrm = 14201, |
| 14217 | VPERMPSZrmb = 14202, |
| 14218 | VPERMPSZrmbk = 14203, |
| 14219 | VPERMPSZrmbkz = 14204, |
| 14220 | VPERMPSZrmk = 14205, |
| 14221 | VPERMPSZrmkz = 14206, |
| 14222 | VPERMPSZrr = 14207, |
| 14223 | VPERMPSZrrk = 14208, |
| 14224 | VPERMPSZrrkz = 14209, |
| 14225 | VPERMQYmi = 14210, |
| 14226 | VPERMQYri = 14211, |
| 14227 | VPERMQZ256mbi = 14212, |
| 14228 | VPERMQZ256mbik = 14213, |
| 14229 | VPERMQZ256mbikz = 14214, |
| 14230 | VPERMQZ256mi = 14215, |
| 14231 | VPERMQZ256mik = 14216, |
| 14232 | VPERMQZ256mikz = 14217, |
| 14233 | VPERMQZ256ri = 14218, |
| 14234 | VPERMQZ256rik = 14219, |
| 14235 | VPERMQZ256rikz = 14220, |
| 14236 | VPERMQZ256rm = 14221, |
| 14237 | VPERMQZ256rmb = 14222, |
| 14238 | VPERMQZ256rmbk = 14223, |
| 14239 | VPERMQZ256rmbkz = 14224, |
| 14240 | VPERMQZ256rmk = 14225, |
| 14241 | VPERMQZ256rmkz = 14226, |
| 14242 | VPERMQZ256rr = 14227, |
| 14243 | VPERMQZ256rrk = 14228, |
| 14244 | VPERMQZ256rrkz = 14229, |
| 14245 | VPERMQZmbi = 14230, |
| 14246 | VPERMQZmbik = 14231, |
| 14247 | VPERMQZmbikz = 14232, |
| 14248 | VPERMQZmi = 14233, |
| 14249 | VPERMQZmik = 14234, |
| 14250 | VPERMQZmikz = 14235, |
| 14251 | VPERMQZri = 14236, |
| 14252 | VPERMQZrik = 14237, |
| 14253 | VPERMQZrikz = 14238, |
| 14254 | VPERMQZrm = 14239, |
| 14255 | VPERMQZrmb = 14240, |
| 14256 | VPERMQZrmbk = 14241, |
| 14257 | VPERMQZrmbkz = 14242, |
| 14258 | VPERMQZrmk = 14243, |
| 14259 | VPERMQZrmkz = 14244, |
| 14260 | VPERMQZrr = 14245, |
| 14261 | VPERMQZrrk = 14246, |
| 14262 | VPERMQZrrkz = 14247, |
| 14263 | VPERMT2BZ128rm = 14248, |
| 14264 | VPERMT2BZ128rmk = 14249, |
| 14265 | VPERMT2BZ128rmkz = 14250, |
| 14266 | VPERMT2BZ128rr = 14251, |
| 14267 | VPERMT2BZ128rrk = 14252, |
| 14268 | VPERMT2BZ128rrkz = 14253, |
| 14269 | VPERMT2BZ256rm = 14254, |
| 14270 | VPERMT2BZ256rmk = 14255, |
| 14271 | VPERMT2BZ256rmkz = 14256, |
| 14272 | VPERMT2BZ256rr = 14257, |
| 14273 | VPERMT2BZ256rrk = 14258, |
| 14274 | VPERMT2BZ256rrkz = 14259, |
| 14275 | VPERMT2BZrm = 14260, |
| 14276 | VPERMT2BZrmk = 14261, |
| 14277 | VPERMT2BZrmkz = 14262, |
| 14278 | VPERMT2BZrr = 14263, |
| 14279 | VPERMT2BZrrk = 14264, |
| 14280 | VPERMT2BZrrkz = 14265, |
| 14281 | VPERMT2DZ128rm = 14266, |
| 14282 | VPERMT2DZ128rmb = 14267, |
| 14283 | VPERMT2DZ128rmbk = 14268, |
| 14284 | VPERMT2DZ128rmbkz = 14269, |
| 14285 | VPERMT2DZ128rmk = 14270, |
| 14286 | VPERMT2DZ128rmkz = 14271, |
| 14287 | VPERMT2DZ128rr = 14272, |
| 14288 | VPERMT2DZ128rrk = 14273, |
| 14289 | VPERMT2DZ128rrkz = 14274, |
| 14290 | VPERMT2DZ256rm = 14275, |
| 14291 | VPERMT2DZ256rmb = 14276, |
| 14292 | VPERMT2DZ256rmbk = 14277, |
| 14293 | VPERMT2DZ256rmbkz = 14278, |
| 14294 | VPERMT2DZ256rmk = 14279, |
| 14295 | VPERMT2DZ256rmkz = 14280, |
| 14296 | VPERMT2DZ256rr = 14281, |
| 14297 | VPERMT2DZ256rrk = 14282, |
| 14298 | VPERMT2DZ256rrkz = 14283, |
| 14299 | VPERMT2DZrm = 14284, |
| 14300 | VPERMT2DZrmb = 14285, |
| 14301 | VPERMT2DZrmbk = 14286, |
| 14302 | VPERMT2DZrmbkz = 14287, |
| 14303 | VPERMT2DZrmk = 14288, |
| 14304 | VPERMT2DZrmkz = 14289, |
| 14305 | VPERMT2DZrr = 14290, |
| 14306 | VPERMT2DZrrk = 14291, |
| 14307 | VPERMT2DZrrkz = 14292, |
| 14308 | VPERMT2PDZ128rm = 14293, |
| 14309 | VPERMT2PDZ128rmb = 14294, |
| 14310 | VPERMT2PDZ128rmbk = 14295, |
| 14311 | VPERMT2PDZ128rmbkz = 14296, |
| 14312 | VPERMT2PDZ128rmk = 14297, |
| 14313 | VPERMT2PDZ128rmkz = 14298, |
| 14314 | VPERMT2PDZ128rr = 14299, |
| 14315 | VPERMT2PDZ128rrk = 14300, |
| 14316 | VPERMT2PDZ128rrkz = 14301, |
| 14317 | VPERMT2PDZ256rm = 14302, |
| 14318 | VPERMT2PDZ256rmb = 14303, |
| 14319 | VPERMT2PDZ256rmbk = 14304, |
| 14320 | VPERMT2PDZ256rmbkz = 14305, |
| 14321 | VPERMT2PDZ256rmk = 14306, |
| 14322 | VPERMT2PDZ256rmkz = 14307, |
| 14323 | VPERMT2PDZ256rr = 14308, |
| 14324 | VPERMT2PDZ256rrk = 14309, |
| 14325 | VPERMT2PDZ256rrkz = 14310, |
| 14326 | VPERMT2PDZrm = 14311, |
| 14327 | VPERMT2PDZrmb = 14312, |
| 14328 | VPERMT2PDZrmbk = 14313, |
| 14329 | VPERMT2PDZrmbkz = 14314, |
| 14330 | VPERMT2PDZrmk = 14315, |
| 14331 | VPERMT2PDZrmkz = 14316, |
| 14332 | VPERMT2PDZrr = 14317, |
| 14333 | VPERMT2PDZrrk = 14318, |
| 14334 | VPERMT2PDZrrkz = 14319, |
| 14335 | VPERMT2PSZ128rm = 14320, |
| 14336 | VPERMT2PSZ128rmb = 14321, |
| 14337 | VPERMT2PSZ128rmbk = 14322, |
| 14338 | VPERMT2PSZ128rmbkz = 14323, |
| 14339 | VPERMT2PSZ128rmk = 14324, |
| 14340 | VPERMT2PSZ128rmkz = 14325, |
| 14341 | VPERMT2PSZ128rr = 14326, |
| 14342 | VPERMT2PSZ128rrk = 14327, |
| 14343 | VPERMT2PSZ128rrkz = 14328, |
| 14344 | VPERMT2PSZ256rm = 14329, |
| 14345 | VPERMT2PSZ256rmb = 14330, |
| 14346 | VPERMT2PSZ256rmbk = 14331, |
| 14347 | VPERMT2PSZ256rmbkz = 14332, |
| 14348 | VPERMT2PSZ256rmk = 14333, |
| 14349 | VPERMT2PSZ256rmkz = 14334, |
| 14350 | VPERMT2PSZ256rr = 14335, |
| 14351 | VPERMT2PSZ256rrk = 14336, |
| 14352 | VPERMT2PSZ256rrkz = 14337, |
| 14353 | VPERMT2PSZrm = 14338, |
| 14354 | VPERMT2PSZrmb = 14339, |
| 14355 | VPERMT2PSZrmbk = 14340, |
| 14356 | VPERMT2PSZrmbkz = 14341, |
| 14357 | VPERMT2PSZrmk = 14342, |
| 14358 | VPERMT2PSZrmkz = 14343, |
| 14359 | VPERMT2PSZrr = 14344, |
| 14360 | VPERMT2PSZrrk = 14345, |
| 14361 | VPERMT2PSZrrkz = 14346, |
| 14362 | VPERMT2QZ128rm = 14347, |
| 14363 | VPERMT2QZ128rmb = 14348, |
| 14364 | VPERMT2QZ128rmbk = 14349, |
| 14365 | VPERMT2QZ128rmbkz = 14350, |
| 14366 | VPERMT2QZ128rmk = 14351, |
| 14367 | VPERMT2QZ128rmkz = 14352, |
| 14368 | VPERMT2QZ128rr = 14353, |
| 14369 | VPERMT2QZ128rrk = 14354, |
| 14370 | VPERMT2QZ128rrkz = 14355, |
| 14371 | VPERMT2QZ256rm = 14356, |
| 14372 | VPERMT2QZ256rmb = 14357, |
| 14373 | VPERMT2QZ256rmbk = 14358, |
| 14374 | VPERMT2QZ256rmbkz = 14359, |
| 14375 | VPERMT2QZ256rmk = 14360, |
| 14376 | VPERMT2QZ256rmkz = 14361, |
| 14377 | VPERMT2QZ256rr = 14362, |
| 14378 | VPERMT2QZ256rrk = 14363, |
| 14379 | VPERMT2QZ256rrkz = 14364, |
| 14380 | VPERMT2QZrm = 14365, |
| 14381 | VPERMT2QZrmb = 14366, |
| 14382 | VPERMT2QZrmbk = 14367, |
| 14383 | VPERMT2QZrmbkz = 14368, |
| 14384 | VPERMT2QZrmk = 14369, |
| 14385 | VPERMT2QZrmkz = 14370, |
| 14386 | VPERMT2QZrr = 14371, |
| 14387 | VPERMT2QZrrk = 14372, |
| 14388 | VPERMT2QZrrkz = 14373, |
| 14389 | VPERMT2WZ128rm = 14374, |
| 14390 | VPERMT2WZ128rmk = 14375, |
| 14391 | VPERMT2WZ128rmkz = 14376, |
| 14392 | VPERMT2WZ128rr = 14377, |
| 14393 | VPERMT2WZ128rrk = 14378, |
| 14394 | VPERMT2WZ128rrkz = 14379, |
| 14395 | VPERMT2WZ256rm = 14380, |
| 14396 | VPERMT2WZ256rmk = 14381, |
| 14397 | VPERMT2WZ256rmkz = 14382, |
| 14398 | VPERMT2WZ256rr = 14383, |
| 14399 | VPERMT2WZ256rrk = 14384, |
| 14400 | VPERMT2WZ256rrkz = 14385, |
| 14401 | VPERMT2WZrm = 14386, |
| 14402 | VPERMT2WZrmk = 14387, |
| 14403 | VPERMT2WZrmkz = 14388, |
| 14404 | VPERMT2WZrr = 14389, |
| 14405 | VPERMT2WZrrk = 14390, |
| 14406 | VPERMT2WZrrkz = 14391, |
| 14407 | VPERMWZ128rm = 14392, |
| 14408 | VPERMWZ128rmk = 14393, |
| 14409 | VPERMWZ128rmkz = 14394, |
| 14410 | VPERMWZ128rr = 14395, |
| 14411 | VPERMWZ128rrk = 14396, |
| 14412 | VPERMWZ128rrkz = 14397, |
| 14413 | VPERMWZ256rm = 14398, |
| 14414 | VPERMWZ256rmk = 14399, |
| 14415 | VPERMWZ256rmkz = 14400, |
| 14416 | VPERMWZ256rr = 14401, |
| 14417 | VPERMWZ256rrk = 14402, |
| 14418 | VPERMWZ256rrkz = 14403, |
| 14419 | VPERMWZrm = 14404, |
| 14420 | VPERMWZrmk = 14405, |
| 14421 | VPERMWZrmkz = 14406, |
| 14422 | VPERMWZrr = 14407, |
| 14423 | VPERMWZrrk = 14408, |
| 14424 | VPERMWZrrkz = 14409, |
| 14425 | VPEXPANDBZ128rm = 14410, |
| 14426 | VPEXPANDBZ128rmk = 14411, |
| 14427 | VPEXPANDBZ128rmkz = 14412, |
| 14428 | VPEXPANDBZ128rr = 14413, |
| 14429 | VPEXPANDBZ128rrk = 14414, |
| 14430 | VPEXPANDBZ128rrkz = 14415, |
| 14431 | VPEXPANDBZ256rm = 14416, |
| 14432 | VPEXPANDBZ256rmk = 14417, |
| 14433 | VPEXPANDBZ256rmkz = 14418, |
| 14434 | VPEXPANDBZ256rr = 14419, |
| 14435 | VPEXPANDBZ256rrk = 14420, |
| 14436 | VPEXPANDBZ256rrkz = 14421, |
| 14437 | VPEXPANDBZrm = 14422, |
| 14438 | VPEXPANDBZrmk = 14423, |
| 14439 | VPEXPANDBZrmkz = 14424, |
| 14440 | VPEXPANDBZrr = 14425, |
| 14441 | VPEXPANDBZrrk = 14426, |
| 14442 | VPEXPANDBZrrkz = 14427, |
| 14443 | VPEXPANDDZ128rm = 14428, |
| 14444 | VPEXPANDDZ128rmk = 14429, |
| 14445 | VPEXPANDDZ128rmkz = 14430, |
| 14446 | VPEXPANDDZ128rr = 14431, |
| 14447 | VPEXPANDDZ128rrk = 14432, |
| 14448 | VPEXPANDDZ128rrkz = 14433, |
| 14449 | VPEXPANDDZ256rm = 14434, |
| 14450 | VPEXPANDDZ256rmk = 14435, |
| 14451 | VPEXPANDDZ256rmkz = 14436, |
| 14452 | VPEXPANDDZ256rr = 14437, |
| 14453 | VPEXPANDDZ256rrk = 14438, |
| 14454 | VPEXPANDDZ256rrkz = 14439, |
| 14455 | VPEXPANDDZrm = 14440, |
| 14456 | VPEXPANDDZrmk = 14441, |
| 14457 | VPEXPANDDZrmkz = 14442, |
| 14458 | VPEXPANDDZrr = 14443, |
| 14459 | VPEXPANDDZrrk = 14444, |
| 14460 | VPEXPANDDZrrkz = 14445, |
| 14461 | VPEXPANDQZ128rm = 14446, |
| 14462 | VPEXPANDQZ128rmk = 14447, |
| 14463 | VPEXPANDQZ128rmkz = 14448, |
| 14464 | VPEXPANDQZ128rr = 14449, |
| 14465 | VPEXPANDQZ128rrk = 14450, |
| 14466 | VPEXPANDQZ128rrkz = 14451, |
| 14467 | VPEXPANDQZ256rm = 14452, |
| 14468 | VPEXPANDQZ256rmk = 14453, |
| 14469 | VPEXPANDQZ256rmkz = 14454, |
| 14470 | VPEXPANDQZ256rr = 14455, |
| 14471 | VPEXPANDQZ256rrk = 14456, |
| 14472 | VPEXPANDQZ256rrkz = 14457, |
| 14473 | VPEXPANDQZrm = 14458, |
| 14474 | VPEXPANDQZrmk = 14459, |
| 14475 | VPEXPANDQZrmkz = 14460, |
| 14476 | VPEXPANDQZrr = 14461, |
| 14477 | VPEXPANDQZrrk = 14462, |
| 14478 | VPEXPANDQZrrkz = 14463, |
| 14479 | VPEXPANDWZ128rm = 14464, |
| 14480 | VPEXPANDWZ128rmk = 14465, |
| 14481 | VPEXPANDWZ128rmkz = 14466, |
| 14482 | VPEXPANDWZ128rr = 14467, |
| 14483 | VPEXPANDWZ128rrk = 14468, |
| 14484 | VPEXPANDWZ128rrkz = 14469, |
| 14485 | VPEXPANDWZ256rm = 14470, |
| 14486 | VPEXPANDWZ256rmk = 14471, |
| 14487 | VPEXPANDWZ256rmkz = 14472, |
| 14488 | VPEXPANDWZ256rr = 14473, |
| 14489 | VPEXPANDWZ256rrk = 14474, |
| 14490 | VPEXPANDWZ256rrkz = 14475, |
| 14491 | VPEXPANDWZrm = 14476, |
| 14492 | VPEXPANDWZrmk = 14477, |
| 14493 | VPEXPANDWZrmkz = 14478, |
| 14494 | VPEXPANDWZrr = 14479, |
| 14495 | VPEXPANDWZrrk = 14480, |
| 14496 | VPEXPANDWZrrkz = 14481, |
| 14497 | VPEXTRBZmr = 14482, |
| 14498 | VPEXTRBZrr = 14483, |
| 14499 | VPEXTRBmr = 14484, |
| 14500 | VPEXTRBrr = 14485, |
| 14501 | VPEXTRDZmr = 14486, |
| 14502 | VPEXTRDZrr = 14487, |
| 14503 | VPEXTRDmr = 14488, |
| 14504 | VPEXTRDrr = 14489, |
| 14505 | VPEXTRQZmr = 14490, |
| 14506 | VPEXTRQZrr = 14491, |
| 14507 | VPEXTRQmr = 14492, |
| 14508 | VPEXTRQrr = 14493, |
| 14509 | VPEXTRWZmr = 14494, |
| 14510 | VPEXTRWZrr = 14495, |
| 14511 | VPEXTRWZrr_REV = 14496, |
| 14512 | VPEXTRWmr = 14497, |
| 14513 | VPEXTRWrr = 14498, |
| 14514 | VPEXTRWrr_REV = 14499, |
| 14515 | VPGATHERDDYrm = 14500, |
| 14516 | VPGATHERDDZ128rm = 14501, |
| 14517 | VPGATHERDDZ256rm = 14502, |
| 14518 | VPGATHERDDZrm = 14503, |
| 14519 | VPGATHERDDrm = 14504, |
| 14520 | VPGATHERDQYrm = 14505, |
| 14521 | VPGATHERDQZ128rm = 14506, |
| 14522 | VPGATHERDQZ256rm = 14507, |
| 14523 | VPGATHERDQZrm = 14508, |
| 14524 | VPGATHERDQrm = 14509, |
| 14525 | VPGATHERQDYrm = 14510, |
| 14526 | VPGATHERQDZ128rm = 14511, |
| 14527 | VPGATHERQDZ256rm = 14512, |
| 14528 | VPGATHERQDZrm = 14513, |
| 14529 | VPGATHERQDrm = 14514, |
| 14530 | VPGATHERQQYrm = 14515, |
| 14531 | VPGATHERQQZ128rm = 14516, |
| 14532 | VPGATHERQQZ256rm = 14517, |
| 14533 | VPGATHERQQZrm = 14518, |
| 14534 | VPGATHERQQrm = 14519, |
| 14535 | VPHADDBDrm = 14520, |
| 14536 | VPHADDBDrr = 14521, |
| 14537 | VPHADDBQrm = 14522, |
| 14538 | VPHADDBQrr = 14523, |
| 14539 | VPHADDBWrm = 14524, |
| 14540 | VPHADDBWrr = 14525, |
| 14541 | VPHADDDQrm = 14526, |
| 14542 | VPHADDDQrr = 14527, |
| 14543 | VPHADDDYrm = 14528, |
| 14544 | VPHADDDYrr = 14529, |
| 14545 | VPHADDDrm = 14530, |
| 14546 | VPHADDDrr = 14531, |
| 14547 | VPHADDSWYrm = 14532, |
| 14548 | VPHADDSWYrr = 14533, |
| 14549 | VPHADDSWrm = 14534, |
| 14550 | VPHADDSWrr = 14535, |
| 14551 | VPHADDUBDrm = 14536, |
| 14552 | VPHADDUBDrr = 14537, |
| 14553 | VPHADDUBQrm = 14538, |
| 14554 | VPHADDUBQrr = 14539, |
| 14555 | VPHADDUBWrm = 14540, |
| 14556 | VPHADDUBWrr = 14541, |
| 14557 | VPHADDUDQrm = 14542, |
| 14558 | VPHADDUDQrr = 14543, |
| 14559 | VPHADDUWDrm = 14544, |
| 14560 | VPHADDUWDrr = 14545, |
| 14561 | VPHADDUWQrm = 14546, |
| 14562 | VPHADDUWQrr = 14547, |
| 14563 | VPHADDWDrm = 14548, |
| 14564 | VPHADDWDrr = 14549, |
| 14565 | VPHADDWQrm = 14550, |
| 14566 | VPHADDWQrr = 14551, |
| 14567 | VPHADDWYrm = 14552, |
| 14568 | VPHADDWYrr = 14553, |
| 14569 | VPHADDWrm = 14554, |
| 14570 | VPHADDWrr = 14555, |
| 14571 | VPHMINPOSUWrm = 14556, |
| 14572 | VPHMINPOSUWrr = 14557, |
| 14573 | VPHSUBBWrm = 14558, |
| 14574 | VPHSUBBWrr = 14559, |
| 14575 | VPHSUBDQrm = 14560, |
| 14576 | VPHSUBDQrr = 14561, |
| 14577 | VPHSUBDYrm = 14562, |
| 14578 | VPHSUBDYrr = 14563, |
| 14579 | VPHSUBDrm = 14564, |
| 14580 | VPHSUBDrr = 14565, |
| 14581 | VPHSUBSWYrm = 14566, |
| 14582 | VPHSUBSWYrr = 14567, |
| 14583 | VPHSUBSWrm = 14568, |
| 14584 | VPHSUBSWrr = 14569, |
| 14585 | VPHSUBWDrm = 14570, |
| 14586 | VPHSUBWDrr = 14571, |
| 14587 | VPHSUBWYrm = 14572, |
| 14588 | VPHSUBWYrr = 14573, |
| 14589 | VPHSUBWrm = 14574, |
| 14590 | VPHSUBWrr = 14575, |
| 14591 | VPINSRBZrm = 14576, |
| 14592 | VPINSRBZrr = 14577, |
| 14593 | VPINSRBrm = 14578, |
| 14594 | VPINSRBrr = 14579, |
| 14595 | VPINSRDZrm = 14580, |
| 14596 | VPINSRDZrr = 14581, |
| 14597 | VPINSRDrm = 14582, |
| 14598 | VPINSRDrr = 14583, |
| 14599 | VPINSRQZrm = 14584, |
| 14600 | VPINSRQZrr = 14585, |
| 14601 | VPINSRQrm = 14586, |
| 14602 | VPINSRQrr = 14587, |
| 14603 | VPINSRWZrm = 14588, |
| 14604 | VPINSRWZrr = 14589, |
| 14605 | VPINSRWrm = 14590, |
| 14606 | VPINSRWrr = 14591, |
| 14607 | VPLZCNTDZ128rm = 14592, |
| 14608 | VPLZCNTDZ128rmb = 14593, |
| 14609 | VPLZCNTDZ128rmbk = 14594, |
| 14610 | VPLZCNTDZ128rmbkz = 14595, |
| 14611 | VPLZCNTDZ128rmk = 14596, |
| 14612 | VPLZCNTDZ128rmkz = 14597, |
| 14613 | VPLZCNTDZ128rr = 14598, |
| 14614 | VPLZCNTDZ128rrk = 14599, |
| 14615 | VPLZCNTDZ128rrkz = 14600, |
| 14616 | VPLZCNTDZ256rm = 14601, |
| 14617 | VPLZCNTDZ256rmb = 14602, |
| 14618 | VPLZCNTDZ256rmbk = 14603, |
| 14619 | VPLZCNTDZ256rmbkz = 14604, |
| 14620 | VPLZCNTDZ256rmk = 14605, |
| 14621 | VPLZCNTDZ256rmkz = 14606, |
| 14622 | VPLZCNTDZ256rr = 14607, |
| 14623 | VPLZCNTDZ256rrk = 14608, |
| 14624 | VPLZCNTDZ256rrkz = 14609, |
| 14625 | VPLZCNTDZrm = 14610, |
| 14626 | VPLZCNTDZrmb = 14611, |
| 14627 | VPLZCNTDZrmbk = 14612, |
| 14628 | VPLZCNTDZrmbkz = 14613, |
| 14629 | VPLZCNTDZrmk = 14614, |
| 14630 | VPLZCNTDZrmkz = 14615, |
| 14631 | VPLZCNTDZrr = 14616, |
| 14632 | VPLZCNTDZrrk = 14617, |
| 14633 | VPLZCNTDZrrkz = 14618, |
| 14634 | VPLZCNTQZ128rm = 14619, |
| 14635 | VPLZCNTQZ128rmb = 14620, |
| 14636 | VPLZCNTQZ128rmbk = 14621, |
| 14637 | VPLZCNTQZ128rmbkz = 14622, |
| 14638 | VPLZCNTQZ128rmk = 14623, |
| 14639 | VPLZCNTQZ128rmkz = 14624, |
| 14640 | VPLZCNTQZ128rr = 14625, |
| 14641 | VPLZCNTQZ128rrk = 14626, |
| 14642 | VPLZCNTQZ128rrkz = 14627, |
| 14643 | VPLZCNTQZ256rm = 14628, |
| 14644 | VPLZCNTQZ256rmb = 14629, |
| 14645 | VPLZCNTQZ256rmbk = 14630, |
| 14646 | VPLZCNTQZ256rmbkz = 14631, |
| 14647 | VPLZCNTQZ256rmk = 14632, |
| 14648 | VPLZCNTQZ256rmkz = 14633, |
| 14649 | VPLZCNTQZ256rr = 14634, |
| 14650 | VPLZCNTQZ256rrk = 14635, |
| 14651 | VPLZCNTQZ256rrkz = 14636, |
| 14652 | VPLZCNTQZrm = 14637, |
| 14653 | VPLZCNTQZrmb = 14638, |
| 14654 | VPLZCNTQZrmbk = 14639, |
| 14655 | VPLZCNTQZrmbkz = 14640, |
| 14656 | VPLZCNTQZrmk = 14641, |
| 14657 | VPLZCNTQZrmkz = 14642, |
| 14658 | VPLZCNTQZrr = 14643, |
| 14659 | VPLZCNTQZrrk = 14644, |
| 14660 | VPLZCNTQZrrkz = 14645, |
| 14661 | VPMACSDDrm = 14646, |
| 14662 | VPMACSDDrr = 14647, |
| 14663 | VPMACSDQHrm = 14648, |
| 14664 | VPMACSDQHrr = 14649, |
| 14665 | VPMACSDQLrm = 14650, |
| 14666 | VPMACSDQLrr = 14651, |
| 14667 | VPMACSSDDrm = 14652, |
| 14668 | VPMACSSDDrr = 14653, |
| 14669 | VPMACSSDQHrm = 14654, |
| 14670 | VPMACSSDQHrr = 14655, |
| 14671 | VPMACSSDQLrm = 14656, |
| 14672 | VPMACSSDQLrr = 14657, |
| 14673 | VPMACSSWDrm = 14658, |
| 14674 | VPMACSSWDrr = 14659, |
| 14675 | VPMACSSWWrm = 14660, |
| 14676 | VPMACSSWWrr = 14661, |
| 14677 | VPMACSWDrm = 14662, |
| 14678 | VPMACSWDrr = 14663, |
| 14679 | VPMACSWWrm = 14664, |
| 14680 | VPMACSWWrr = 14665, |
| 14681 | VPMADCSSWDrm = 14666, |
| 14682 | VPMADCSSWDrr = 14667, |
| 14683 | VPMADCSWDrm = 14668, |
| 14684 | VPMADCSWDrr = 14669, |
| 14685 | VPMADD52HUQYrm = 14670, |
| 14686 | VPMADD52HUQYrr = 14671, |
| 14687 | VPMADD52HUQZ128m = 14672, |
| 14688 | VPMADD52HUQZ128mb = 14673, |
| 14689 | VPMADD52HUQZ128mbk = 14674, |
| 14690 | VPMADD52HUQZ128mbkz = 14675, |
| 14691 | VPMADD52HUQZ128mk = 14676, |
| 14692 | VPMADD52HUQZ128mkz = 14677, |
| 14693 | VPMADD52HUQZ128r = 14678, |
| 14694 | VPMADD52HUQZ128rk = 14679, |
| 14695 | VPMADD52HUQZ128rkz = 14680, |
| 14696 | VPMADD52HUQZ256m = 14681, |
| 14697 | VPMADD52HUQZ256mb = 14682, |
| 14698 | VPMADD52HUQZ256mbk = 14683, |
| 14699 | VPMADD52HUQZ256mbkz = 14684, |
| 14700 | VPMADD52HUQZ256mk = 14685, |
| 14701 | VPMADD52HUQZ256mkz = 14686, |
| 14702 | VPMADD52HUQZ256r = 14687, |
| 14703 | VPMADD52HUQZ256rk = 14688, |
| 14704 | VPMADD52HUQZ256rkz = 14689, |
| 14705 | VPMADD52HUQZm = 14690, |
| 14706 | VPMADD52HUQZmb = 14691, |
| 14707 | VPMADD52HUQZmbk = 14692, |
| 14708 | VPMADD52HUQZmbkz = 14693, |
| 14709 | VPMADD52HUQZmk = 14694, |
| 14710 | VPMADD52HUQZmkz = 14695, |
| 14711 | VPMADD52HUQZr = 14696, |
| 14712 | VPMADD52HUQZrk = 14697, |
| 14713 | VPMADD52HUQZrkz = 14698, |
| 14714 | VPMADD52HUQrm = 14699, |
| 14715 | VPMADD52HUQrr = 14700, |
| 14716 | VPMADD52LUQYrm = 14701, |
| 14717 | VPMADD52LUQYrr = 14702, |
| 14718 | VPMADD52LUQZ128m = 14703, |
| 14719 | VPMADD52LUQZ128mb = 14704, |
| 14720 | VPMADD52LUQZ128mbk = 14705, |
| 14721 | VPMADD52LUQZ128mbkz = 14706, |
| 14722 | VPMADD52LUQZ128mk = 14707, |
| 14723 | VPMADD52LUQZ128mkz = 14708, |
| 14724 | VPMADD52LUQZ128r = 14709, |
| 14725 | VPMADD52LUQZ128rk = 14710, |
| 14726 | VPMADD52LUQZ128rkz = 14711, |
| 14727 | VPMADD52LUQZ256m = 14712, |
| 14728 | VPMADD52LUQZ256mb = 14713, |
| 14729 | VPMADD52LUQZ256mbk = 14714, |
| 14730 | VPMADD52LUQZ256mbkz = 14715, |
| 14731 | VPMADD52LUQZ256mk = 14716, |
| 14732 | VPMADD52LUQZ256mkz = 14717, |
| 14733 | VPMADD52LUQZ256r = 14718, |
| 14734 | VPMADD52LUQZ256rk = 14719, |
| 14735 | VPMADD52LUQZ256rkz = 14720, |
| 14736 | VPMADD52LUQZm = 14721, |
| 14737 | VPMADD52LUQZmb = 14722, |
| 14738 | VPMADD52LUQZmbk = 14723, |
| 14739 | VPMADD52LUQZmbkz = 14724, |
| 14740 | VPMADD52LUQZmk = 14725, |
| 14741 | VPMADD52LUQZmkz = 14726, |
| 14742 | VPMADD52LUQZr = 14727, |
| 14743 | VPMADD52LUQZrk = 14728, |
| 14744 | VPMADD52LUQZrkz = 14729, |
| 14745 | VPMADD52LUQrm = 14730, |
| 14746 | VPMADD52LUQrr = 14731, |
| 14747 | VPMADDUBSWYrm = 14732, |
| 14748 | VPMADDUBSWYrr = 14733, |
| 14749 | VPMADDUBSWZ128rm = 14734, |
| 14750 | VPMADDUBSWZ128rmk = 14735, |
| 14751 | VPMADDUBSWZ128rmkz = 14736, |
| 14752 | VPMADDUBSWZ128rr = 14737, |
| 14753 | VPMADDUBSWZ128rrk = 14738, |
| 14754 | VPMADDUBSWZ128rrkz = 14739, |
| 14755 | VPMADDUBSWZ256rm = 14740, |
| 14756 | VPMADDUBSWZ256rmk = 14741, |
| 14757 | VPMADDUBSWZ256rmkz = 14742, |
| 14758 | VPMADDUBSWZ256rr = 14743, |
| 14759 | VPMADDUBSWZ256rrk = 14744, |
| 14760 | VPMADDUBSWZ256rrkz = 14745, |
| 14761 | VPMADDUBSWZrm = 14746, |
| 14762 | VPMADDUBSWZrmk = 14747, |
| 14763 | VPMADDUBSWZrmkz = 14748, |
| 14764 | VPMADDUBSWZrr = 14749, |
| 14765 | VPMADDUBSWZrrk = 14750, |
| 14766 | VPMADDUBSWZrrkz = 14751, |
| 14767 | VPMADDUBSWrm = 14752, |
| 14768 | VPMADDUBSWrr = 14753, |
| 14769 | VPMADDWDYrm = 14754, |
| 14770 | VPMADDWDYrr = 14755, |
| 14771 | VPMADDWDZ128rm = 14756, |
| 14772 | VPMADDWDZ128rmk = 14757, |
| 14773 | VPMADDWDZ128rmkz = 14758, |
| 14774 | VPMADDWDZ128rr = 14759, |
| 14775 | VPMADDWDZ128rrk = 14760, |
| 14776 | VPMADDWDZ128rrkz = 14761, |
| 14777 | VPMADDWDZ256rm = 14762, |
| 14778 | VPMADDWDZ256rmk = 14763, |
| 14779 | VPMADDWDZ256rmkz = 14764, |
| 14780 | VPMADDWDZ256rr = 14765, |
| 14781 | VPMADDWDZ256rrk = 14766, |
| 14782 | VPMADDWDZ256rrkz = 14767, |
| 14783 | VPMADDWDZrm = 14768, |
| 14784 | VPMADDWDZrmk = 14769, |
| 14785 | VPMADDWDZrmkz = 14770, |
| 14786 | VPMADDWDZrr = 14771, |
| 14787 | VPMADDWDZrrk = 14772, |
| 14788 | VPMADDWDZrrkz = 14773, |
| 14789 | VPMADDWDrm = 14774, |
| 14790 | VPMADDWDrr = 14775, |
| 14791 | VPMASKMOVDYmr = 14776, |
| 14792 | VPMASKMOVDYrm = 14777, |
| 14793 | VPMASKMOVDmr = 14778, |
| 14794 | VPMASKMOVDrm = 14779, |
| 14795 | VPMASKMOVQYmr = 14780, |
| 14796 | VPMASKMOVQYrm = 14781, |
| 14797 | VPMASKMOVQmr = 14782, |
| 14798 | VPMASKMOVQrm = 14783, |
| 14799 | VPMAXSBYrm = 14784, |
| 14800 | VPMAXSBYrr = 14785, |
| 14801 | VPMAXSBZ128rm = 14786, |
| 14802 | VPMAXSBZ128rmk = 14787, |
| 14803 | VPMAXSBZ128rmkz = 14788, |
| 14804 | VPMAXSBZ128rr = 14789, |
| 14805 | VPMAXSBZ128rrk = 14790, |
| 14806 | VPMAXSBZ128rrkz = 14791, |
| 14807 | VPMAXSBZ256rm = 14792, |
| 14808 | VPMAXSBZ256rmk = 14793, |
| 14809 | VPMAXSBZ256rmkz = 14794, |
| 14810 | VPMAXSBZ256rr = 14795, |
| 14811 | VPMAXSBZ256rrk = 14796, |
| 14812 | VPMAXSBZ256rrkz = 14797, |
| 14813 | VPMAXSBZrm = 14798, |
| 14814 | VPMAXSBZrmk = 14799, |
| 14815 | VPMAXSBZrmkz = 14800, |
| 14816 | VPMAXSBZrr = 14801, |
| 14817 | VPMAXSBZrrk = 14802, |
| 14818 | VPMAXSBZrrkz = 14803, |
| 14819 | VPMAXSBrm = 14804, |
| 14820 | VPMAXSBrr = 14805, |
| 14821 | VPMAXSDYrm = 14806, |
| 14822 | VPMAXSDYrr = 14807, |
| 14823 | VPMAXSDZ128rm = 14808, |
| 14824 | VPMAXSDZ128rmb = 14809, |
| 14825 | VPMAXSDZ128rmbk = 14810, |
| 14826 | VPMAXSDZ128rmbkz = 14811, |
| 14827 | VPMAXSDZ128rmk = 14812, |
| 14828 | VPMAXSDZ128rmkz = 14813, |
| 14829 | VPMAXSDZ128rr = 14814, |
| 14830 | VPMAXSDZ128rrk = 14815, |
| 14831 | VPMAXSDZ128rrkz = 14816, |
| 14832 | VPMAXSDZ256rm = 14817, |
| 14833 | VPMAXSDZ256rmb = 14818, |
| 14834 | VPMAXSDZ256rmbk = 14819, |
| 14835 | VPMAXSDZ256rmbkz = 14820, |
| 14836 | VPMAXSDZ256rmk = 14821, |
| 14837 | VPMAXSDZ256rmkz = 14822, |
| 14838 | VPMAXSDZ256rr = 14823, |
| 14839 | VPMAXSDZ256rrk = 14824, |
| 14840 | VPMAXSDZ256rrkz = 14825, |
| 14841 | VPMAXSDZrm = 14826, |
| 14842 | VPMAXSDZrmb = 14827, |
| 14843 | VPMAXSDZrmbk = 14828, |
| 14844 | VPMAXSDZrmbkz = 14829, |
| 14845 | VPMAXSDZrmk = 14830, |
| 14846 | VPMAXSDZrmkz = 14831, |
| 14847 | VPMAXSDZrr = 14832, |
| 14848 | VPMAXSDZrrk = 14833, |
| 14849 | VPMAXSDZrrkz = 14834, |
| 14850 | VPMAXSDrm = 14835, |
| 14851 | VPMAXSDrr = 14836, |
| 14852 | VPMAXSQZ128rm = 14837, |
| 14853 | VPMAXSQZ128rmb = 14838, |
| 14854 | VPMAXSQZ128rmbk = 14839, |
| 14855 | VPMAXSQZ128rmbkz = 14840, |
| 14856 | VPMAXSQZ128rmk = 14841, |
| 14857 | VPMAXSQZ128rmkz = 14842, |
| 14858 | VPMAXSQZ128rr = 14843, |
| 14859 | VPMAXSQZ128rrk = 14844, |
| 14860 | VPMAXSQZ128rrkz = 14845, |
| 14861 | VPMAXSQZ256rm = 14846, |
| 14862 | VPMAXSQZ256rmb = 14847, |
| 14863 | VPMAXSQZ256rmbk = 14848, |
| 14864 | VPMAXSQZ256rmbkz = 14849, |
| 14865 | VPMAXSQZ256rmk = 14850, |
| 14866 | VPMAXSQZ256rmkz = 14851, |
| 14867 | VPMAXSQZ256rr = 14852, |
| 14868 | VPMAXSQZ256rrk = 14853, |
| 14869 | VPMAXSQZ256rrkz = 14854, |
| 14870 | VPMAXSQZrm = 14855, |
| 14871 | VPMAXSQZrmb = 14856, |
| 14872 | VPMAXSQZrmbk = 14857, |
| 14873 | VPMAXSQZrmbkz = 14858, |
| 14874 | VPMAXSQZrmk = 14859, |
| 14875 | VPMAXSQZrmkz = 14860, |
| 14876 | VPMAXSQZrr = 14861, |
| 14877 | VPMAXSQZrrk = 14862, |
| 14878 | VPMAXSQZrrkz = 14863, |
| 14879 | VPMAXSWYrm = 14864, |
| 14880 | VPMAXSWYrr = 14865, |
| 14881 | VPMAXSWZ128rm = 14866, |
| 14882 | VPMAXSWZ128rmk = 14867, |
| 14883 | VPMAXSWZ128rmkz = 14868, |
| 14884 | VPMAXSWZ128rr = 14869, |
| 14885 | VPMAXSWZ128rrk = 14870, |
| 14886 | VPMAXSWZ128rrkz = 14871, |
| 14887 | VPMAXSWZ256rm = 14872, |
| 14888 | VPMAXSWZ256rmk = 14873, |
| 14889 | VPMAXSWZ256rmkz = 14874, |
| 14890 | VPMAXSWZ256rr = 14875, |
| 14891 | VPMAXSWZ256rrk = 14876, |
| 14892 | VPMAXSWZ256rrkz = 14877, |
| 14893 | VPMAXSWZrm = 14878, |
| 14894 | VPMAXSWZrmk = 14879, |
| 14895 | VPMAXSWZrmkz = 14880, |
| 14896 | VPMAXSWZrr = 14881, |
| 14897 | VPMAXSWZrrk = 14882, |
| 14898 | VPMAXSWZrrkz = 14883, |
| 14899 | VPMAXSWrm = 14884, |
| 14900 | VPMAXSWrr = 14885, |
| 14901 | VPMAXUBYrm = 14886, |
| 14902 | VPMAXUBYrr = 14887, |
| 14903 | VPMAXUBZ128rm = 14888, |
| 14904 | VPMAXUBZ128rmk = 14889, |
| 14905 | VPMAXUBZ128rmkz = 14890, |
| 14906 | VPMAXUBZ128rr = 14891, |
| 14907 | VPMAXUBZ128rrk = 14892, |
| 14908 | VPMAXUBZ128rrkz = 14893, |
| 14909 | VPMAXUBZ256rm = 14894, |
| 14910 | VPMAXUBZ256rmk = 14895, |
| 14911 | VPMAXUBZ256rmkz = 14896, |
| 14912 | VPMAXUBZ256rr = 14897, |
| 14913 | VPMAXUBZ256rrk = 14898, |
| 14914 | VPMAXUBZ256rrkz = 14899, |
| 14915 | VPMAXUBZrm = 14900, |
| 14916 | VPMAXUBZrmk = 14901, |
| 14917 | VPMAXUBZrmkz = 14902, |
| 14918 | VPMAXUBZrr = 14903, |
| 14919 | VPMAXUBZrrk = 14904, |
| 14920 | VPMAXUBZrrkz = 14905, |
| 14921 | VPMAXUBrm = 14906, |
| 14922 | VPMAXUBrr = 14907, |
| 14923 | VPMAXUDYrm = 14908, |
| 14924 | VPMAXUDYrr = 14909, |
| 14925 | VPMAXUDZ128rm = 14910, |
| 14926 | VPMAXUDZ128rmb = 14911, |
| 14927 | VPMAXUDZ128rmbk = 14912, |
| 14928 | VPMAXUDZ128rmbkz = 14913, |
| 14929 | VPMAXUDZ128rmk = 14914, |
| 14930 | VPMAXUDZ128rmkz = 14915, |
| 14931 | VPMAXUDZ128rr = 14916, |
| 14932 | VPMAXUDZ128rrk = 14917, |
| 14933 | VPMAXUDZ128rrkz = 14918, |
| 14934 | VPMAXUDZ256rm = 14919, |
| 14935 | VPMAXUDZ256rmb = 14920, |
| 14936 | VPMAXUDZ256rmbk = 14921, |
| 14937 | VPMAXUDZ256rmbkz = 14922, |
| 14938 | VPMAXUDZ256rmk = 14923, |
| 14939 | VPMAXUDZ256rmkz = 14924, |
| 14940 | VPMAXUDZ256rr = 14925, |
| 14941 | VPMAXUDZ256rrk = 14926, |
| 14942 | VPMAXUDZ256rrkz = 14927, |
| 14943 | VPMAXUDZrm = 14928, |
| 14944 | VPMAXUDZrmb = 14929, |
| 14945 | VPMAXUDZrmbk = 14930, |
| 14946 | VPMAXUDZrmbkz = 14931, |
| 14947 | VPMAXUDZrmk = 14932, |
| 14948 | VPMAXUDZrmkz = 14933, |
| 14949 | VPMAXUDZrr = 14934, |
| 14950 | VPMAXUDZrrk = 14935, |
| 14951 | VPMAXUDZrrkz = 14936, |
| 14952 | VPMAXUDrm = 14937, |
| 14953 | VPMAXUDrr = 14938, |
| 14954 | VPMAXUQZ128rm = 14939, |
| 14955 | VPMAXUQZ128rmb = 14940, |
| 14956 | VPMAXUQZ128rmbk = 14941, |
| 14957 | VPMAXUQZ128rmbkz = 14942, |
| 14958 | VPMAXUQZ128rmk = 14943, |
| 14959 | VPMAXUQZ128rmkz = 14944, |
| 14960 | VPMAXUQZ128rr = 14945, |
| 14961 | VPMAXUQZ128rrk = 14946, |
| 14962 | VPMAXUQZ128rrkz = 14947, |
| 14963 | VPMAXUQZ256rm = 14948, |
| 14964 | VPMAXUQZ256rmb = 14949, |
| 14965 | VPMAXUQZ256rmbk = 14950, |
| 14966 | VPMAXUQZ256rmbkz = 14951, |
| 14967 | VPMAXUQZ256rmk = 14952, |
| 14968 | VPMAXUQZ256rmkz = 14953, |
| 14969 | VPMAXUQZ256rr = 14954, |
| 14970 | VPMAXUQZ256rrk = 14955, |
| 14971 | VPMAXUQZ256rrkz = 14956, |
| 14972 | VPMAXUQZrm = 14957, |
| 14973 | VPMAXUQZrmb = 14958, |
| 14974 | VPMAXUQZrmbk = 14959, |
| 14975 | VPMAXUQZrmbkz = 14960, |
| 14976 | VPMAXUQZrmk = 14961, |
| 14977 | VPMAXUQZrmkz = 14962, |
| 14978 | VPMAXUQZrr = 14963, |
| 14979 | VPMAXUQZrrk = 14964, |
| 14980 | VPMAXUQZrrkz = 14965, |
| 14981 | VPMAXUWYrm = 14966, |
| 14982 | VPMAXUWYrr = 14967, |
| 14983 | VPMAXUWZ128rm = 14968, |
| 14984 | VPMAXUWZ128rmk = 14969, |
| 14985 | VPMAXUWZ128rmkz = 14970, |
| 14986 | VPMAXUWZ128rr = 14971, |
| 14987 | VPMAXUWZ128rrk = 14972, |
| 14988 | VPMAXUWZ128rrkz = 14973, |
| 14989 | VPMAXUWZ256rm = 14974, |
| 14990 | VPMAXUWZ256rmk = 14975, |
| 14991 | VPMAXUWZ256rmkz = 14976, |
| 14992 | VPMAXUWZ256rr = 14977, |
| 14993 | VPMAXUWZ256rrk = 14978, |
| 14994 | VPMAXUWZ256rrkz = 14979, |
| 14995 | VPMAXUWZrm = 14980, |
| 14996 | VPMAXUWZrmk = 14981, |
| 14997 | VPMAXUWZrmkz = 14982, |
| 14998 | VPMAXUWZrr = 14983, |
| 14999 | VPMAXUWZrrk = 14984, |
| 15000 | VPMAXUWZrrkz = 14985, |
| 15001 | VPMAXUWrm = 14986, |
| 15002 | VPMAXUWrr = 14987, |
| 15003 | VPMINSBYrm = 14988, |
| 15004 | VPMINSBYrr = 14989, |
| 15005 | VPMINSBZ128rm = 14990, |
| 15006 | VPMINSBZ128rmk = 14991, |
| 15007 | VPMINSBZ128rmkz = 14992, |
| 15008 | VPMINSBZ128rr = 14993, |
| 15009 | VPMINSBZ128rrk = 14994, |
| 15010 | VPMINSBZ128rrkz = 14995, |
| 15011 | VPMINSBZ256rm = 14996, |
| 15012 | VPMINSBZ256rmk = 14997, |
| 15013 | VPMINSBZ256rmkz = 14998, |
| 15014 | VPMINSBZ256rr = 14999, |
| 15015 | VPMINSBZ256rrk = 15000, |
| 15016 | VPMINSBZ256rrkz = 15001, |
| 15017 | VPMINSBZrm = 15002, |
| 15018 | VPMINSBZrmk = 15003, |
| 15019 | VPMINSBZrmkz = 15004, |
| 15020 | VPMINSBZrr = 15005, |
| 15021 | VPMINSBZrrk = 15006, |
| 15022 | VPMINSBZrrkz = 15007, |
| 15023 | VPMINSBrm = 15008, |
| 15024 | VPMINSBrr = 15009, |
| 15025 | VPMINSDYrm = 15010, |
| 15026 | VPMINSDYrr = 15011, |
| 15027 | VPMINSDZ128rm = 15012, |
| 15028 | VPMINSDZ128rmb = 15013, |
| 15029 | VPMINSDZ128rmbk = 15014, |
| 15030 | VPMINSDZ128rmbkz = 15015, |
| 15031 | VPMINSDZ128rmk = 15016, |
| 15032 | VPMINSDZ128rmkz = 15017, |
| 15033 | VPMINSDZ128rr = 15018, |
| 15034 | VPMINSDZ128rrk = 15019, |
| 15035 | VPMINSDZ128rrkz = 15020, |
| 15036 | VPMINSDZ256rm = 15021, |
| 15037 | VPMINSDZ256rmb = 15022, |
| 15038 | VPMINSDZ256rmbk = 15023, |
| 15039 | VPMINSDZ256rmbkz = 15024, |
| 15040 | VPMINSDZ256rmk = 15025, |
| 15041 | VPMINSDZ256rmkz = 15026, |
| 15042 | VPMINSDZ256rr = 15027, |
| 15043 | VPMINSDZ256rrk = 15028, |
| 15044 | VPMINSDZ256rrkz = 15029, |
| 15045 | VPMINSDZrm = 15030, |
| 15046 | VPMINSDZrmb = 15031, |
| 15047 | VPMINSDZrmbk = 15032, |
| 15048 | VPMINSDZrmbkz = 15033, |
| 15049 | VPMINSDZrmk = 15034, |
| 15050 | VPMINSDZrmkz = 15035, |
| 15051 | VPMINSDZrr = 15036, |
| 15052 | VPMINSDZrrk = 15037, |
| 15053 | VPMINSDZrrkz = 15038, |
| 15054 | VPMINSDrm = 15039, |
| 15055 | VPMINSDrr = 15040, |
| 15056 | VPMINSQZ128rm = 15041, |
| 15057 | VPMINSQZ128rmb = 15042, |
| 15058 | VPMINSQZ128rmbk = 15043, |
| 15059 | VPMINSQZ128rmbkz = 15044, |
| 15060 | VPMINSQZ128rmk = 15045, |
| 15061 | VPMINSQZ128rmkz = 15046, |
| 15062 | VPMINSQZ128rr = 15047, |
| 15063 | VPMINSQZ128rrk = 15048, |
| 15064 | VPMINSQZ128rrkz = 15049, |
| 15065 | VPMINSQZ256rm = 15050, |
| 15066 | VPMINSQZ256rmb = 15051, |
| 15067 | VPMINSQZ256rmbk = 15052, |
| 15068 | VPMINSQZ256rmbkz = 15053, |
| 15069 | VPMINSQZ256rmk = 15054, |
| 15070 | VPMINSQZ256rmkz = 15055, |
| 15071 | VPMINSQZ256rr = 15056, |
| 15072 | VPMINSQZ256rrk = 15057, |
| 15073 | VPMINSQZ256rrkz = 15058, |
| 15074 | VPMINSQZrm = 15059, |
| 15075 | VPMINSQZrmb = 15060, |
| 15076 | VPMINSQZrmbk = 15061, |
| 15077 | VPMINSQZrmbkz = 15062, |
| 15078 | VPMINSQZrmk = 15063, |
| 15079 | VPMINSQZrmkz = 15064, |
| 15080 | VPMINSQZrr = 15065, |
| 15081 | VPMINSQZrrk = 15066, |
| 15082 | VPMINSQZrrkz = 15067, |
| 15083 | VPMINSWYrm = 15068, |
| 15084 | VPMINSWYrr = 15069, |
| 15085 | VPMINSWZ128rm = 15070, |
| 15086 | VPMINSWZ128rmk = 15071, |
| 15087 | VPMINSWZ128rmkz = 15072, |
| 15088 | VPMINSWZ128rr = 15073, |
| 15089 | VPMINSWZ128rrk = 15074, |
| 15090 | VPMINSWZ128rrkz = 15075, |
| 15091 | VPMINSWZ256rm = 15076, |
| 15092 | VPMINSWZ256rmk = 15077, |
| 15093 | VPMINSWZ256rmkz = 15078, |
| 15094 | VPMINSWZ256rr = 15079, |
| 15095 | VPMINSWZ256rrk = 15080, |
| 15096 | VPMINSWZ256rrkz = 15081, |
| 15097 | VPMINSWZrm = 15082, |
| 15098 | VPMINSWZrmk = 15083, |
| 15099 | VPMINSWZrmkz = 15084, |
| 15100 | VPMINSWZrr = 15085, |
| 15101 | VPMINSWZrrk = 15086, |
| 15102 | VPMINSWZrrkz = 15087, |
| 15103 | VPMINSWrm = 15088, |
| 15104 | VPMINSWrr = 15089, |
| 15105 | VPMINUBYrm = 15090, |
| 15106 | VPMINUBYrr = 15091, |
| 15107 | VPMINUBZ128rm = 15092, |
| 15108 | VPMINUBZ128rmk = 15093, |
| 15109 | VPMINUBZ128rmkz = 15094, |
| 15110 | VPMINUBZ128rr = 15095, |
| 15111 | VPMINUBZ128rrk = 15096, |
| 15112 | VPMINUBZ128rrkz = 15097, |
| 15113 | VPMINUBZ256rm = 15098, |
| 15114 | VPMINUBZ256rmk = 15099, |
| 15115 | VPMINUBZ256rmkz = 15100, |
| 15116 | VPMINUBZ256rr = 15101, |
| 15117 | VPMINUBZ256rrk = 15102, |
| 15118 | VPMINUBZ256rrkz = 15103, |
| 15119 | VPMINUBZrm = 15104, |
| 15120 | VPMINUBZrmk = 15105, |
| 15121 | VPMINUBZrmkz = 15106, |
| 15122 | VPMINUBZrr = 15107, |
| 15123 | VPMINUBZrrk = 15108, |
| 15124 | VPMINUBZrrkz = 15109, |
| 15125 | VPMINUBrm = 15110, |
| 15126 | VPMINUBrr = 15111, |
| 15127 | VPMINUDYrm = 15112, |
| 15128 | VPMINUDYrr = 15113, |
| 15129 | VPMINUDZ128rm = 15114, |
| 15130 | VPMINUDZ128rmb = 15115, |
| 15131 | VPMINUDZ128rmbk = 15116, |
| 15132 | VPMINUDZ128rmbkz = 15117, |
| 15133 | VPMINUDZ128rmk = 15118, |
| 15134 | VPMINUDZ128rmkz = 15119, |
| 15135 | VPMINUDZ128rr = 15120, |
| 15136 | VPMINUDZ128rrk = 15121, |
| 15137 | VPMINUDZ128rrkz = 15122, |
| 15138 | VPMINUDZ256rm = 15123, |
| 15139 | VPMINUDZ256rmb = 15124, |
| 15140 | VPMINUDZ256rmbk = 15125, |
| 15141 | VPMINUDZ256rmbkz = 15126, |
| 15142 | VPMINUDZ256rmk = 15127, |
| 15143 | VPMINUDZ256rmkz = 15128, |
| 15144 | VPMINUDZ256rr = 15129, |
| 15145 | VPMINUDZ256rrk = 15130, |
| 15146 | VPMINUDZ256rrkz = 15131, |
| 15147 | VPMINUDZrm = 15132, |
| 15148 | VPMINUDZrmb = 15133, |
| 15149 | VPMINUDZrmbk = 15134, |
| 15150 | VPMINUDZrmbkz = 15135, |
| 15151 | VPMINUDZrmk = 15136, |
| 15152 | VPMINUDZrmkz = 15137, |
| 15153 | VPMINUDZrr = 15138, |
| 15154 | VPMINUDZrrk = 15139, |
| 15155 | VPMINUDZrrkz = 15140, |
| 15156 | VPMINUDrm = 15141, |
| 15157 | VPMINUDrr = 15142, |
| 15158 | VPMINUQZ128rm = 15143, |
| 15159 | VPMINUQZ128rmb = 15144, |
| 15160 | VPMINUQZ128rmbk = 15145, |
| 15161 | VPMINUQZ128rmbkz = 15146, |
| 15162 | VPMINUQZ128rmk = 15147, |
| 15163 | VPMINUQZ128rmkz = 15148, |
| 15164 | VPMINUQZ128rr = 15149, |
| 15165 | VPMINUQZ128rrk = 15150, |
| 15166 | VPMINUQZ128rrkz = 15151, |
| 15167 | VPMINUQZ256rm = 15152, |
| 15168 | VPMINUQZ256rmb = 15153, |
| 15169 | VPMINUQZ256rmbk = 15154, |
| 15170 | VPMINUQZ256rmbkz = 15155, |
| 15171 | VPMINUQZ256rmk = 15156, |
| 15172 | VPMINUQZ256rmkz = 15157, |
| 15173 | VPMINUQZ256rr = 15158, |
| 15174 | VPMINUQZ256rrk = 15159, |
| 15175 | VPMINUQZ256rrkz = 15160, |
| 15176 | VPMINUQZrm = 15161, |
| 15177 | VPMINUQZrmb = 15162, |
| 15178 | VPMINUQZrmbk = 15163, |
| 15179 | VPMINUQZrmbkz = 15164, |
| 15180 | VPMINUQZrmk = 15165, |
| 15181 | VPMINUQZrmkz = 15166, |
| 15182 | VPMINUQZrr = 15167, |
| 15183 | VPMINUQZrrk = 15168, |
| 15184 | VPMINUQZrrkz = 15169, |
| 15185 | VPMINUWYrm = 15170, |
| 15186 | VPMINUWYrr = 15171, |
| 15187 | VPMINUWZ128rm = 15172, |
| 15188 | VPMINUWZ128rmk = 15173, |
| 15189 | VPMINUWZ128rmkz = 15174, |
| 15190 | VPMINUWZ128rr = 15175, |
| 15191 | VPMINUWZ128rrk = 15176, |
| 15192 | VPMINUWZ128rrkz = 15177, |
| 15193 | VPMINUWZ256rm = 15178, |
| 15194 | VPMINUWZ256rmk = 15179, |
| 15195 | VPMINUWZ256rmkz = 15180, |
| 15196 | VPMINUWZ256rr = 15181, |
| 15197 | VPMINUWZ256rrk = 15182, |
| 15198 | VPMINUWZ256rrkz = 15183, |
| 15199 | VPMINUWZrm = 15184, |
| 15200 | VPMINUWZrmk = 15185, |
| 15201 | VPMINUWZrmkz = 15186, |
| 15202 | VPMINUWZrr = 15187, |
| 15203 | VPMINUWZrrk = 15188, |
| 15204 | VPMINUWZrrkz = 15189, |
| 15205 | VPMINUWrm = 15190, |
| 15206 | VPMINUWrr = 15191, |
| 15207 | VPMOVB2MZ128rr = 15192, |
| 15208 | VPMOVB2MZ256rr = 15193, |
| 15209 | VPMOVB2MZrr = 15194, |
| 15210 | VPMOVD2MZ128rr = 15195, |
| 15211 | VPMOVD2MZ256rr = 15196, |
| 15212 | VPMOVD2MZrr = 15197, |
| 15213 | VPMOVDBZ128mr = 15198, |
| 15214 | VPMOVDBZ128mrk = 15199, |
| 15215 | VPMOVDBZ128rr = 15200, |
| 15216 | VPMOVDBZ128rrk = 15201, |
| 15217 | VPMOVDBZ128rrkz = 15202, |
| 15218 | VPMOVDBZ256mr = 15203, |
| 15219 | VPMOVDBZ256mrk = 15204, |
| 15220 | VPMOVDBZ256rr = 15205, |
| 15221 | VPMOVDBZ256rrk = 15206, |
| 15222 | VPMOVDBZ256rrkz = 15207, |
| 15223 | VPMOVDBZmr = 15208, |
| 15224 | VPMOVDBZmrk = 15209, |
| 15225 | VPMOVDBZrr = 15210, |
| 15226 | VPMOVDBZrrk = 15211, |
| 15227 | VPMOVDBZrrkz = 15212, |
| 15228 | VPMOVDWZ128mr = 15213, |
| 15229 | VPMOVDWZ128mrk = 15214, |
| 15230 | VPMOVDWZ128rr = 15215, |
| 15231 | VPMOVDWZ128rrk = 15216, |
| 15232 | VPMOVDWZ128rrkz = 15217, |
| 15233 | VPMOVDWZ256mr = 15218, |
| 15234 | VPMOVDWZ256mrk = 15219, |
| 15235 | VPMOVDWZ256rr = 15220, |
| 15236 | VPMOVDWZ256rrk = 15221, |
| 15237 | VPMOVDWZ256rrkz = 15222, |
| 15238 | VPMOVDWZmr = 15223, |
| 15239 | VPMOVDWZmrk = 15224, |
| 15240 | VPMOVDWZrr = 15225, |
| 15241 | VPMOVDWZrrk = 15226, |
| 15242 | VPMOVDWZrrkz = 15227, |
| 15243 | VPMOVM2BZ128rr = 15228, |
| 15244 | VPMOVM2BZ256rr = 15229, |
| 15245 | VPMOVM2BZrr = 15230, |
| 15246 | VPMOVM2DZ128rr = 15231, |
| 15247 | VPMOVM2DZ256rr = 15232, |
| 15248 | VPMOVM2DZrr = 15233, |
| 15249 | VPMOVM2QZ128rr = 15234, |
| 15250 | VPMOVM2QZ256rr = 15235, |
| 15251 | VPMOVM2QZrr = 15236, |
| 15252 | VPMOVM2WZ128rr = 15237, |
| 15253 | VPMOVM2WZ256rr = 15238, |
| 15254 | VPMOVM2WZrr = 15239, |
| 15255 | VPMOVMSKBYrr = 15240, |
| 15256 | VPMOVMSKBrr = 15241, |
| 15257 | VPMOVQ2MZ128rr = 15242, |
| 15258 | VPMOVQ2MZ256rr = 15243, |
| 15259 | VPMOVQ2MZrr = 15244, |
| 15260 | VPMOVQBZ128mr = 15245, |
| 15261 | VPMOVQBZ128mrk = 15246, |
| 15262 | VPMOVQBZ128rr = 15247, |
| 15263 | VPMOVQBZ128rrk = 15248, |
| 15264 | VPMOVQBZ128rrkz = 15249, |
| 15265 | VPMOVQBZ256mr = 15250, |
| 15266 | VPMOVQBZ256mrk = 15251, |
| 15267 | VPMOVQBZ256rr = 15252, |
| 15268 | VPMOVQBZ256rrk = 15253, |
| 15269 | VPMOVQBZ256rrkz = 15254, |
| 15270 | VPMOVQBZmr = 15255, |
| 15271 | VPMOVQBZmrk = 15256, |
| 15272 | VPMOVQBZrr = 15257, |
| 15273 | VPMOVQBZrrk = 15258, |
| 15274 | VPMOVQBZrrkz = 15259, |
| 15275 | VPMOVQDZ128mr = 15260, |
| 15276 | VPMOVQDZ128mrk = 15261, |
| 15277 | VPMOVQDZ128rr = 15262, |
| 15278 | VPMOVQDZ128rrk = 15263, |
| 15279 | VPMOVQDZ128rrkz = 15264, |
| 15280 | VPMOVQDZ256mr = 15265, |
| 15281 | VPMOVQDZ256mrk = 15266, |
| 15282 | VPMOVQDZ256rr = 15267, |
| 15283 | VPMOVQDZ256rrk = 15268, |
| 15284 | VPMOVQDZ256rrkz = 15269, |
| 15285 | VPMOVQDZmr = 15270, |
| 15286 | VPMOVQDZmrk = 15271, |
| 15287 | VPMOVQDZrr = 15272, |
| 15288 | VPMOVQDZrrk = 15273, |
| 15289 | VPMOVQDZrrkz = 15274, |
| 15290 | VPMOVQWZ128mr = 15275, |
| 15291 | VPMOVQWZ128mrk = 15276, |
| 15292 | VPMOVQWZ128rr = 15277, |
| 15293 | VPMOVQWZ128rrk = 15278, |
| 15294 | VPMOVQWZ128rrkz = 15279, |
| 15295 | VPMOVQWZ256mr = 15280, |
| 15296 | VPMOVQWZ256mrk = 15281, |
| 15297 | VPMOVQWZ256rr = 15282, |
| 15298 | VPMOVQWZ256rrk = 15283, |
| 15299 | VPMOVQWZ256rrkz = 15284, |
| 15300 | VPMOVQWZmr = 15285, |
| 15301 | VPMOVQWZmrk = 15286, |
| 15302 | VPMOVQWZrr = 15287, |
| 15303 | VPMOVQWZrrk = 15288, |
| 15304 | VPMOVQWZrrkz = 15289, |
| 15305 | VPMOVSDBZ128mr = 15290, |
| 15306 | VPMOVSDBZ128mrk = 15291, |
| 15307 | VPMOVSDBZ128rr = 15292, |
| 15308 | VPMOVSDBZ128rrk = 15293, |
| 15309 | VPMOVSDBZ128rrkz = 15294, |
| 15310 | VPMOVSDBZ256mr = 15295, |
| 15311 | VPMOVSDBZ256mrk = 15296, |
| 15312 | VPMOVSDBZ256rr = 15297, |
| 15313 | VPMOVSDBZ256rrk = 15298, |
| 15314 | VPMOVSDBZ256rrkz = 15299, |
| 15315 | VPMOVSDBZmr = 15300, |
| 15316 | VPMOVSDBZmrk = 15301, |
| 15317 | VPMOVSDBZrr = 15302, |
| 15318 | VPMOVSDBZrrk = 15303, |
| 15319 | VPMOVSDBZrrkz = 15304, |
| 15320 | VPMOVSDWZ128mr = 15305, |
| 15321 | VPMOVSDWZ128mrk = 15306, |
| 15322 | VPMOVSDWZ128rr = 15307, |
| 15323 | VPMOVSDWZ128rrk = 15308, |
| 15324 | VPMOVSDWZ128rrkz = 15309, |
| 15325 | VPMOVSDWZ256mr = 15310, |
| 15326 | VPMOVSDWZ256mrk = 15311, |
| 15327 | VPMOVSDWZ256rr = 15312, |
| 15328 | VPMOVSDWZ256rrk = 15313, |
| 15329 | VPMOVSDWZ256rrkz = 15314, |
| 15330 | VPMOVSDWZmr = 15315, |
| 15331 | VPMOVSDWZmrk = 15316, |
| 15332 | VPMOVSDWZrr = 15317, |
| 15333 | VPMOVSDWZrrk = 15318, |
| 15334 | VPMOVSDWZrrkz = 15319, |
| 15335 | VPMOVSQBZ128mr = 15320, |
| 15336 | VPMOVSQBZ128mrk = 15321, |
| 15337 | VPMOVSQBZ128rr = 15322, |
| 15338 | VPMOVSQBZ128rrk = 15323, |
| 15339 | VPMOVSQBZ128rrkz = 15324, |
| 15340 | VPMOVSQBZ256mr = 15325, |
| 15341 | VPMOVSQBZ256mrk = 15326, |
| 15342 | VPMOVSQBZ256rr = 15327, |
| 15343 | VPMOVSQBZ256rrk = 15328, |
| 15344 | VPMOVSQBZ256rrkz = 15329, |
| 15345 | VPMOVSQBZmr = 15330, |
| 15346 | VPMOVSQBZmrk = 15331, |
| 15347 | VPMOVSQBZrr = 15332, |
| 15348 | VPMOVSQBZrrk = 15333, |
| 15349 | VPMOVSQBZrrkz = 15334, |
| 15350 | VPMOVSQDZ128mr = 15335, |
| 15351 | VPMOVSQDZ128mrk = 15336, |
| 15352 | VPMOVSQDZ128rr = 15337, |
| 15353 | VPMOVSQDZ128rrk = 15338, |
| 15354 | VPMOVSQDZ128rrkz = 15339, |
| 15355 | VPMOVSQDZ256mr = 15340, |
| 15356 | VPMOVSQDZ256mrk = 15341, |
| 15357 | VPMOVSQDZ256rr = 15342, |
| 15358 | VPMOVSQDZ256rrk = 15343, |
| 15359 | VPMOVSQDZ256rrkz = 15344, |
| 15360 | VPMOVSQDZmr = 15345, |
| 15361 | VPMOVSQDZmrk = 15346, |
| 15362 | VPMOVSQDZrr = 15347, |
| 15363 | VPMOVSQDZrrk = 15348, |
| 15364 | VPMOVSQDZrrkz = 15349, |
| 15365 | VPMOVSQWZ128mr = 15350, |
| 15366 | VPMOVSQWZ128mrk = 15351, |
| 15367 | VPMOVSQWZ128rr = 15352, |
| 15368 | VPMOVSQWZ128rrk = 15353, |
| 15369 | VPMOVSQWZ128rrkz = 15354, |
| 15370 | VPMOVSQWZ256mr = 15355, |
| 15371 | VPMOVSQWZ256mrk = 15356, |
| 15372 | VPMOVSQWZ256rr = 15357, |
| 15373 | VPMOVSQWZ256rrk = 15358, |
| 15374 | VPMOVSQWZ256rrkz = 15359, |
| 15375 | VPMOVSQWZmr = 15360, |
| 15376 | VPMOVSQWZmrk = 15361, |
| 15377 | VPMOVSQWZrr = 15362, |
| 15378 | VPMOVSQWZrrk = 15363, |
| 15379 | VPMOVSQWZrrkz = 15364, |
| 15380 | VPMOVSWBZ128mr = 15365, |
| 15381 | VPMOVSWBZ128mrk = 15366, |
| 15382 | VPMOVSWBZ128rr = 15367, |
| 15383 | VPMOVSWBZ128rrk = 15368, |
| 15384 | VPMOVSWBZ128rrkz = 15369, |
| 15385 | VPMOVSWBZ256mr = 15370, |
| 15386 | VPMOVSWBZ256mrk = 15371, |
| 15387 | VPMOVSWBZ256rr = 15372, |
| 15388 | VPMOVSWBZ256rrk = 15373, |
| 15389 | VPMOVSWBZ256rrkz = 15374, |
| 15390 | VPMOVSWBZmr = 15375, |
| 15391 | VPMOVSWBZmrk = 15376, |
| 15392 | VPMOVSWBZrr = 15377, |
| 15393 | VPMOVSWBZrrk = 15378, |
| 15394 | VPMOVSWBZrrkz = 15379, |
| 15395 | VPMOVSXBDYrm = 15380, |
| 15396 | VPMOVSXBDYrr = 15381, |
| 15397 | VPMOVSXBDZ128rm = 15382, |
| 15398 | VPMOVSXBDZ128rmk = 15383, |
| 15399 | VPMOVSXBDZ128rmkz = 15384, |
| 15400 | VPMOVSXBDZ128rr = 15385, |
| 15401 | VPMOVSXBDZ128rrk = 15386, |
| 15402 | VPMOVSXBDZ128rrkz = 15387, |
| 15403 | VPMOVSXBDZ256rm = 15388, |
| 15404 | VPMOVSXBDZ256rmk = 15389, |
| 15405 | VPMOVSXBDZ256rmkz = 15390, |
| 15406 | VPMOVSXBDZ256rr = 15391, |
| 15407 | VPMOVSXBDZ256rrk = 15392, |
| 15408 | VPMOVSXBDZ256rrkz = 15393, |
| 15409 | VPMOVSXBDZrm = 15394, |
| 15410 | VPMOVSXBDZrmk = 15395, |
| 15411 | VPMOVSXBDZrmkz = 15396, |
| 15412 | VPMOVSXBDZrr = 15397, |
| 15413 | VPMOVSXBDZrrk = 15398, |
| 15414 | VPMOVSXBDZrrkz = 15399, |
| 15415 | VPMOVSXBDrm = 15400, |
| 15416 | VPMOVSXBDrr = 15401, |
| 15417 | VPMOVSXBQYrm = 15402, |
| 15418 | VPMOVSXBQYrr = 15403, |
| 15419 | VPMOVSXBQZ128rm = 15404, |
| 15420 | VPMOVSXBQZ128rmk = 15405, |
| 15421 | VPMOVSXBQZ128rmkz = 15406, |
| 15422 | VPMOVSXBQZ128rr = 15407, |
| 15423 | VPMOVSXBQZ128rrk = 15408, |
| 15424 | VPMOVSXBQZ128rrkz = 15409, |
| 15425 | VPMOVSXBQZ256rm = 15410, |
| 15426 | VPMOVSXBQZ256rmk = 15411, |
| 15427 | VPMOVSXBQZ256rmkz = 15412, |
| 15428 | VPMOVSXBQZ256rr = 15413, |
| 15429 | VPMOVSXBQZ256rrk = 15414, |
| 15430 | VPMOVSXBQZ256rrkz = 15415, |
| 15431 | VPMOVSXBQZrm = 15416, |
| 15432 | VPMOVSXBQZrmk = 15417, |
| 15433 | VPMOVSXBQZrmkz = 15418, |
| 15434 | VPMOVSXBQZrr = 15419, |
| 15435 | VPMOVSXBQZrrk = 15420, |
| 15436 | VPMOVSXBQZrrkz = 15421, |
| 15437 | VPMOVSXBQrm = 15422, |
| 15438 | VPMOVSXBQrr = 15423, |
| 15439 | VPMOVSXBWYrm = 15424, |
| 15440 | VPMOVSXBWYrr = 15425, |
| 15441 | VPMOVSXBWZ128rm = 15426, |
| 15442 | VPMOVSXBWZ128rmk = 15427, |
| 15443 | VPMOVSXBWZ128rmkz = 15428, |
| 15444 | VPMOVSXBWZ128rr = 15429, |
| 15445 | VPMOVSXBWZ128rrk = 15430, |
| 15446 | VPMOVSXBWZ128rrkz = 15431, |
| 15447 | VPMOVSXBWZ256rm = 15432, |
| 15448 | VPMOVSXBWZ256rmk = 15433, |
| 15449 | VPMOVSXBWZ256rmkz = 15434, |
| 15450 | VPMOVSXBWZ256rr = 15435, |
| 15451 | VPMOVSXBWZ256rrk = 15436, |
| 15452 | VPMOVSXBWZ256rrkz = 15437, |
| 15453 | VPMOVSXBWZrm = 15438, |
| 15454 | VPMOVSXBWZrmk = 15439, |
| 15455 | VPMOVSXBWZrmkz = 15440, |
| 15456 | VPMOVSXBWZrr = 15441, |
| 15457 | VPMOVSXBWZrrk = 15442, |
| 15458 | VPMOVSXBWZrrkz = 15443, |
| 15459 | VPMOVSXBWrm = 15444, |
| 15460 | VPMOVSXBWrr = 15445, |
| 15461 | VPMOVSXDQYrm = 15446, |
| 15462 | VPMOVSXDQYrr = 15447, |
| 15463 | VPMOVSXDQZ128rm = 15448, |
| 15464 | VPMOVSXDQZ128rmk = 15449, |
| 15465 | VPMOVSXDQZ128rmkz = 15450, |
| 15466 | VPMOVSXDQZ128rr = 15451, |
| 15467 | VPMOVSXDQZ128rrk = 15452, |
| 15468 | VPMOVSXDQZ128rrkz = 15453, |
| 15469 | VPMOVSXDQZ256rm = 15454, |
| 15470 | VPMOVSXDQZ256rmk = 15455, |
| 15471 | VPMOVSXDQZ256rmkz = 15456, |
| 15472 | VPMOVSXDQZ256rr = 15457, |
| 15473 | VPMOVSXDQZ256rrk = 15458, |
| 15474 | VPMOVSXDQZ256rrkz = 15459, |
| 15475 | VPMOVSXDQZrm = 15460, |
| 15476 | VPMOVSXDQZrmk = 15461, |
| 15477 | VPMOVSXDQZrmkz = 15462, |
| 15478 | VPMOVSXDQZrr = 15463, |
| 15479 | VPMOVSXDQZrrk = 15464, |
| 15480 | VPMOVSXDQZrrkz = 15465, |
| 15481 | VPMOVSXDQrm = 15466, |
| 15482 | VPMOVSXDQrr = 15467, |
| 15483 | VPMOVSXWDYrm = 15468, |
| 15484 | VPMOVSXWDYrr = 15469, |
| 15485 | VPMOVSXWDZ128rm = 15470, |
| 15486 | VPMOVSXWDZ128rmk = 15471, |
| 15487 | VPMOVSXWDZ128rmkz = 15472, |
| 15488 | VPMOVSXWDZ128rr = 15473, |
| 15489 | VPMOVSXWDZ128rrk = 15474, |
| 15490 | VPMOVSXWDZ128rrkz = 15475, |
| 15491 | VPMOVSXWDZ256rm = 15476, |
| 15492 | VPMOVSXWDZ256rmk = 15477, |
| 15493 | VPMOVSXWDZ256rmkz = 15478, |
| 15494 | VPMOVSXWDZ256rr = 15479, |
| 15495 | VPMOVSXWDZ256rrk = 15480, |
| 15496 | VPMOVSXWDZ256rrkz = 15481, |
| 15497 | VPMOVSXWDZrm = 15482, |
| 15498 | VPMOVSXWDZrmk = 15483, |
| 15499 | VPMOVSXWDZrmkz = 15484, |
| 15500 | VPMOVSXWDZrr = 15485, |
| 15501 | VPMOVSXWDZrrk = 15486, |
| 15502 | VPMOVSXWDZrrkz = 15487, |
| 15503 | VPMOVSXWDrm = 15488, |
| 15504 | VPMOVSXWDrr = 15489, |
| 15505 | VPMOVSXWQYrm = 15490, |
| 15506 | VPMOVSXWQYrr = 15491, |
| 15507 | VPMOVSXWQZ128rm = 15492, |
| 15508 | VPMOVSXWQZ128rmk = 15493, |
| 15509 | VPMOVSXWQZ128rmkz = 15494, |
| 15510 | VPMOVSXWQZ128rr = 15495, |
| 15511 | VPMOVSXWQZ128rrk = 15496, |
| 15512 | VPMOVSXWQZ128rrkz = 15497, |
| 15513 | VPMOVSXWQZ256rm = 15498, |
| 15514 | VPMOVSXWQZ256rmk = 15499, |
| 15515 | VPMOVSXWQZ256rmkz = 15500, |
| 15516 | VPMOVSXWQZ256rr = 15501, |
| 15517 | VPMOVSXWQZ256rrk = 15502, |
| 15518 | VPMOVSXWQZ256rrkz = 15503, |
| 15519 | VPMOVSXWQZrm = 15504, |
| 15520 | VPMOVSXWQZrmk = 15505, |
| 15521 | VPMOVSXWQZrmkz = 15506, |
| 15522 | VPMOVSXWQZrr = 15507, |
| 15523 | VPMOVSXWQZrrk = 15508, |
| 15524 | VPMOVSXWQZrrkz = 15509, |
| 15525 | VPMOVSXWQrm = 15510, |
| 15526 | VPMOVSXWQrr = 15511, |
| 15527 | VPMOVUSDBZ128mr = 15512, |
| 15528 | VPMOVUSDBZ128mrk = 15513, |
| 15529 | VPMOVUSDBZ128rr = 15514, |
| 15530 | VPMOVUSDBZ128rrk = 15515, |
| 15531 | VPMOVUSDBZ128rrkz = 15516, |
| 15532 | VPMOVUSDBZ256mr = 15517, |
| 15533 | VPMOVUSDBZ256mrk = 15518, |
| 15534 | VPMOVUSDBZ256rr = 15519, |
| 15535 | VPMOVUSDBZ256rrk = 15520, |
| 15536 | VPMOVUSDBZ256rrkz = 15521, |
| 15537 | VPMOVUSDBZmr = 15522, |
| 15538 | VPMOVUSDBZmrk = 15523, |
| 15539 | VPMOVUSDBZrr = 15524, |
| 15540 | VPMOVUSDBZrrk = 15525, |
| 15541 | VPMOVUSDBZrrkz = 15526, |
| 15542 | VPMOVUSDWZ128mr = 15527, |
| 15543 | VPMOVUSDWZ128mrk = 15528, |
| 15544 | VPMOVUSDWZ128rr = 15529, |
| 15545 | VPMOVUSDWZ128rrk = 15530, |
| 15546 | VPMOVUSDWZ128rrkz = 15531, |
| 15547 | VPMOVUSDWZ256mr = 15532, |
| 15548 | VPMOVUSDWZ256mrk = 15533, |
| 15549 | VPMOVUSDWZ256rr = 15534, |
| 15550 | VPMOVUSDWZ256rrk = 15535, |
| 15551 | VPMOVUSDWZ256rrkz = 15536, |
| 15552 | VPMOVUSDWZmr = 15537, |
| 15553 | VPMOVUSDWZmrk = 15538, |
| 15554 | VPMOVUSDWZrr = 15539, |
| 15555 | VPMOVUSDWZrrk = 15540, |
| 15556 | VPMOVUSDWZrrkz = 15541, |
| 15557 | VPMOVUSQBZ128mr = 15542, |
| 15558 | VPMOVUSQBZ128mrk = 15543, |
| 15559 | VPMOVUSQBZ128rr = 15544, |
| 15560 | VPMOVUSQBZ128rrk = 15545, |
| 15561 | VPMOVUSQBZ128rrkz = 15546, |
| 15562 | VPMOVUSQBZ256mr = 15547, |
| 15563 | VPMOVUSQBZ256mrk = 15548, |
| 15564 | VPMOVUSQBZ256rr = 15549, |
| 15565 | VPMOVUSQBZ256rrk = 15550, |
| 15566 | VPMOVUSQBZ256rrkz = 15551, |
| 15567 | VPMOVUSQBZmr = 15552, |
| 15568 | VPMOVUSQBZmrk = 15553, |
| 15569 | VPMOVUSQBZrr = 15554, |
| 15570 | VPMOVUSQBZrrk = 15555, |
| 15571 | VPMOVUSQBZrrkz = 15556, |
| 15572 | VPMOVUSQDZ128mr = 15557, |
| 15573 | VPMOVUSQDZ128mrk = 15558, |
| 15574 | VPMOVUSQDZ128rr = 15559, |
| 15575 | VPMOVUSQDZ128rrk = 15560, |
| 15576 | VPMOVUSQDZ128rrkz = 15561, |
| 15577 | VPMOVUSQDZ256mr = 15562, |
| 15578 | VPMOVUSQDZ256mrk = 15563, |
| 15579 | VPMOVUSQDZ256rr = 15564, |
| 15580 | VPMOVUSQDZ256rrk = 15565, |
| 15581 | VPMOVUSQDZ256rrkz = 15566, |
| 15582 | VPMOVUSQDZmr = 15567, |
| 15583 | VPMOVUSQDZmrk = 15568, |
| 15584 | VPMOVUSQDZrr = 15569, |
| 15585 | VPMOVUSQDZrrk = 15570, |
| 15586 | VPMOVUSQDZrrkz = 15571, |
| 15587 | VPMOVUSQWZ128mr = 15572, |
| 15588 | VPMOVUSQWZ128mrk = 15573, |
| 15589 | VPMOVUSQWZ128rr = 15574, |
| 15590 | VPMOVUSQWZ128rrk = 15575, |
| 15591 | VPMOVUSQWZ128rrkz = 15576, |
| 15592 | VPMOVUSQWZ256mr = 15577, |
| 15593 | VPMOVUSQWZ256mrk = 15578, |
| 15594 | VPMOVUSQWZ256rr = 15579, |
| 15595 | VPMOVUSQWZ256rrk = 15580, |
| 15596 | VPMOVUSQWZ256rrkz = 15581, |
| 15597 | VPMOVUSQWZmr = 15582, |
| 15598 | VPMOVUSQWZmrk = 15583, |
| 15599 | VPMOVUSQWZrr = 15584, |
| 15600 | VPMOVUSQWZrrk = 15585, |
| 15601 | VPMOVUSQWZrrkz = 15586, |
| 15602 | VPMOVUSWBZ128mr = 15587, |
| 15603 | VPMOVUSWBZ128mrk = 15588, |
| 15604 | VPMOVUSWBZ128rr = 15589, |
| 15605 | VPMOVUSWBZ128rrk = 15590, |
| 15606 | VPMOVUSWBZ128rrkz = 15591, |
| 15607 | VPMOVUSWBZ256mr = 15592, |
| 15608 | VPMOVUSWBZ256mrk = 15593, |
| 15609 | VPMOVUSWBZ256rr = 15594, |
| 15610 | VPMOVUSWBZ256rrk = 15595, |
| 15611 | VPMOVUSWBZ256rrkz = 15596, |
| 15612 | VPMOVUSWBZmr = 15597, |
| 15613 | VPMOVUSWBZmrk = 15598, |
| 15614 | VPMOVUSWBZrr = 15599, |
| 15615 | VPMOVUSWBZrrk = 15600, |
| 15616 | VPMOVUSWBZrrkz = 15601, |
| 15617 | VPMOVW2MZ128rr = 15602, |
| 15618 | VPMOVW2MZ256rr = 15603, |
| 15619 | VPMOVW2MZrr = 15604, |
| 15620 | VPMOVWBZ128mr = 15605, |
| 15621 | VPMOVWBZ128mrk = 15606, |
| 15622 | VPMOVWBZ128rr = 15607, |
| 15623 | VPMOVWBZ128rrk = 15608, |
| 15624 | VPMOVWBZ128rrkz = 15609, |
| 15625 | VPMOVWBZ256mr = 15610, |
| 15626 | VPMOVWBZ256mrk = 15611, |
| 15627 | VPMOVWBZ256rr = 15612, |
| 15628 | VPMOVWBZ256rrk = 15613, |
| 15629 | VPMOVWBZ256rrkz = 15614, |
| 15630 | VPMOVWBZmr = 15615, |
| 15631 | VPMOVWBZmrk = 15616, |
| 15632 | VPMOVWBZrr = 15617, |
| 15633 | VPMOVWBZrrk = 15618, |
| 15634 | VPMOVWBZrrkz = 15619, |
| 15635 | VPMOVZXBDYrm = 15620, |
| 15636 | VPMOVZXBDYrr = 15621, |
| 15637 | VPMOVZXBDZ128rm = 15622, |
| 15638 | VPMOVZXBDZ128rmk = 15623, |
| 15639 | VPMOVZXBDZ128rmkz = 15624, |
| 15640 | VPMOVZXBDZ128rr = 15625, |
| 15641 | VPMOVZXBDZ128rrk = 15626, |
| 15642 | VPMOVZXBDZ128rrkz = 15627, |
| 15643 | VPMOVZXBDZ256rm = 15628, |
| 15644 | VPMOVZXBDZ256rmk = 15629, |
| 15645 | VPMOVZXBDZ256rmkz = 15630, |
| 15646 | VPMOVZXBDZ256rr = 15631, |
| 15647 | VPMOVZXBDZ256rrk = 15632, |
| 15648 | VPMOVZXBDZ256rrkz = 15633, |
| 15649 | VPMOVZXBDZrm = 15634, |
| 15650 | VPMOVZXBDZrmk = 15635, |
| 15651 | VPMOVZXBDZrmkz = 15636, |
| 15652 | VPMOVZXBDZrr = 15637, |
| 15653 | VPMOVZXBDZrrk = 15638, |
| 15654 | VPMOVZXBDZrrkz = 15639, |
| 15655 | VPMOVZXBDrm = 15640, |
| 15656 | VPMOVZXBDrr = 15641, |
| 15657 | VPMOVZXBQYrm = 15642, |
| 15658 | VPMOVZXBQYrr = 15643, |
| 15659 | VPMOVZXBQZ128rm = 15644, |
| 15660 | VPMOVZXBQZ128rmk = 15645, |
| 15661 | VPMOVZXBQZ128rmkz = 15646, |
| 15662 | VPMOVZXBQZ128rr = 15647, |
| 15663 | VPMOVZXBQZ128rrk = 15648, |
| 15664 | VPMOVZXBQZ128rrkz = 15649, |
| 15665 | VPMOVZXBQZ256rm = 15650, |
| 15666 | VPMOVZXBQZ256rmk = 15651, |
| 15667 | VPMOVZXBQZ256rmkz = 15652, |
| 15668 | VPMOVZXBQZ256rr = 15653, |
| 15669 | VPMOVZXBQZ256rrk = 15654, |
| 15670 | VPMOVZXBQZ256rrkz = 15655, |
| 15671 | VPMOVZXBQZrm = 15656, |
| 15672 | VPMOVZXBQZrmk = 15657, |
| 15673 | VPMOVZXBQZrmkz = 15658, |
| 15674 | VPMOVZXBQZrr = 15659, |
| 15675 | VPMOVZXBQZrrk = 15660, |
| 15676 | VPMOVZXBQZrrkz = 15661, |
| 15677 | VPMOVZXBQrm = 15662, |
| 15678 | VPMOVZXBQrr = 15663, |
| 15679 | VPMOVZXBWYrm = 15664, |
| 15680 | VPMOVZXBWYrr = 15665, |
| 15681 | VPMOVZXBWZ128rm = 15666, |
| 15682 | VPMOVZXBWZ128rmk = 15667, |
| 15683 | VPMOVZXBWZ128rmkz = 15668, |
| 15684 | VPMOVZXBWZ128rr = 15669, |
| 15685 | VPMOVZXBWZ128rrk = 15670, |
| 15686 | VPMOVZXBWZ128rrkz = 15671, |
| 15687 | VPMOVZXBWZ256rm = 15672, |
| 15688 | VPMOVZXBWZ256rmk = 15673, |
| 15689 | VPMOVZXBWZ256rmkz = 15674, |
| 15690 | VPMOVZXBWZ256rr = 15675, |
| 15691 | VPMOVZXBWZ256rrk = 15676, |
| 15692 | VPMOVZXBWZ256rrkz = 15677, |
| 15693 | VPMOVZXBWZrm = 15678, |
| 15694 | VPMOVZXBWZrmk = 15679, |
| 15695 | VPMOVZXBWZrmkz = 15680, |
| 15696 | VPMOVZXBWZrr = 15681, |
| 15697 | VPMOVZXBWZrrk = 15682, |
| 15698 | VPMOVZXBWZrrkz = 15683, |
| 15699 | VPMOVZXBWrm = 15684, |
| 15700 | VPMOVZXBWrr = 15685, |
| 15701 | VPMOVZXDQYrm = 15686, |
| 15702 | VPMOVZXDQYrr = 15687, |
| 15703 | VPMOVZXDQZ128rm = 15688, |
| 15704 | VPMOVZXDQZ128rmk = 15689, |
| 15705 | VPMOVZXDQZ128rmkz = 15690, |
| 15706 | VPMOVZXDQZ128rr = 15691, |
| 15707 | VPMOVZXDQZ128rrk = 15692, |
| 15708 | VPMOVZXDQZ128rrkz = 15693, |
| 15709 | VPMOVZXDQZ256rm = 15694, |
| 15710 | VPMOVZXDQZ256rmk = 15695, |
| 15711 | VPMOVZXDQZ256rmkz = 15696, |
| 15712 | VPMOVZXDQZ256rr = 15697, |
| 15713 | VPMOVZXDQZ256rrk = 15698, |
| 15714 | VPMOVZXDQZ256rrkz = 15699, |
| 15715 | VPMOVZXDQZrm = 15700, |
| 15716 | VPMOVZXDQZrmk = 15701, |
| 15717 | VPMOVZXDQZrmkz = 15702, |
| 15718 | VPMOVZXDQZrr = 15703, |
| 15719 | VPMOVZXDQZrrk = 15704, |
| 15720 | VPMOVZXDQZrrkz = 15705, |
| 15721 | VPMOVZXDQrm = 15706, |
| 15722 | VPMOVZXDQrr = 15707, |
| 15723 | VPMOVZXWDYrm = 15708, |
| 15724 | VPMOVZXWDYrr = 15709, |
| 15725 | VPMOVZXWDZ128rm = 15710, |
| 15726 | VPMOVZXWDZ128rmk = 15711, |
| 15727 | VPMOVZXWDZ128rmkz = 15712, |
| 15728 | VPMOVZXWDZ128rr = 15713, |
| 15729 | VPMOVZXWDZ128rrk = 15714, |
| 15730 | VPMOVZXWDZ128rrkz = 15715, |
| 15731 | VPMOVZXWDZ256rm = 15716, |
| 15732 | VPMOVZXWDZ256rmk = 15717, |
| 15733 | VPMOVZXWDZ256rmkz = 15718, |
| 15734 | VPMOVZXWDZ256rr = 15719, |
| 15735 | VPMOVZXWDZ256rrk = 15720, |
| 15736 | VPMOVZXWDZ256rrkz = 15721, |
| 15737 | VPMOVZXWDZrm = 15722, |
| 15738 | VPMOVZXWDZrmk = 15723, |
| 15739 | VPMOVZXWDZrmkz = 15724, |
| 15740 | VPMOVZXWDZrr = 15725, |
| 15741 | VPMOVZXWDZrrk = 15726, |
| 15742 | VPMOVZXWDZrrkz = 15727, |
| 15743 | VPMOVZXWDrm = 15728, |
| 15744 | VPMOVZXWDrr = 15729, |
| 15745 | VPMOVZXWQYrm = 15730, |
| 15746 | VPMOVZXWQYrr = 15731, |
| 15747 | VPMOVZXWQZ128rm = 15732, |
| 15748 | VPMOVZXWQZ128rmk = 15733, |
| 15749 | VPMOVZXWQZ128rmkz = 15734, |
| 15750 | VPMOVZXWQZ128rr = 15735, |
| 15751 | VPMOVZXWQZ128rrk = 15736, |
| 15752 | VPMOVZXWQZ128rrkz = 15737, |
| 15753 | VPMOVZXWQZ256rm = 15738, |
| 15754 | VPMOVZXWQZ256rmk = 15739, |
| 15755 | VPMOVZXWQZ256rmkz = 15740, |
| 15756 | VPMOVZXWQZ256rr = 15741, |
| 15757 | VPMOVZXWQZ256rrk = 15742, |
| 15758 | VPMOVZXWQZ256rrkz = 15743, |
| 15759 | VPMOVZXWQZrm = 15744, |
| 15760 | VPMOVZXWQZrmk = 15745, |
| 15761 | VPMOVZXWQZrmkz = 15746, |
| 15762 | VPMOVZXWQZrr = 15747, |
| 15763 | VPMOVZXWQZrrk = 15748, |
| 15764 | VPMOVZXWQZrrkz = 15749, |
| 15765 | VPMOVZXWQrm = 15750, |
| 15766 | VPMOVZXWQrr = 15751, |
| 15767 | VPMULDQYrm = 15752, |
| 15768 | VPMULDQYrr = 15753, |
| 15769 | VPMULDQZ128rm = 15754, |
| 15770 | VPMULDQZ128rmb = 15755, |
| 15771 | VPMULDQZ128rmbk = 15756, |
| 15772 | VPMULDQZ128rmbkz = 15757, |
| 15773 | VPMULDQZ128rmk = 15758, |
| 15774 | VPMULDQZ128rmkz = 15759, |
| 15775 | VPMULDQZ128rr = 15760, |
| 15776 | VPMULDQZ128rrk = 15761, |
| 15777 | VPMULDQZ128rrkz = 15762, |
| 15778 | VPMULDQZ256rm = 15763, |
| 15779 | VPMULDQZ256rmb = 15764, |
| 15780 | VPMULDQZ256rmbk = 15765, |
| 15781 | VPMULDQZ256rmbkz = 15766, |
| 15782 | VPMULDQZ256rmk = 15767, |
| 15783 | VPMULDQZ256rmkz = 15768, |
| 15784 | VPMULDQZ256rr = 15769, |
| 15785 | VPMULDQZ256rrk = 15770, |
| 15786 | VPMULDQZ256rrkz = 15771, |
| 15787 | VPMULDQZrm = 15772, |
| 15788 | VPMULDQZrmb = 15773, |
| 15789 | VPMULDQZrmbk = 15774, |
| 15790 | VPMULDQZrmbkz = 15775, |
| 15791 | VPMULDQZrmk = 15776, |
| 15792 | VPMULDQZrmkz = 15777, |
| 15793 | VPMULDQZrr = 15778, |
| 15794 | VPMULDQZrrk = 15779, |
| 15795 | VPMULDQZrrkz = 15780, |
| 15796 | VPMULDQrm = 15781, |
| 15797 | VPMULDQrr = 15782, |
| 15798 | VPMULHRSWYrm = 15783, |
| 15799 | VPMULHRSWYrr = 15784, |
| 15800 | VPMULHRSWZ128rm = 15785, |
| 15801 | VPMULHRSWZ128rmk = 15786, |
| 15802 | VPMULHRSWZ128rmkz = 15787, |
| 15803 | VPMULHRSWZ128rr = 15788, |
| 15804 | VPMULHRSWZ128rrk = 15789, |
| 15805 | VPMULHRSWZ128rrkz = 15790, |
| 15806 | VPMULHRSWZ256rm = 15791, |
| 15807 | VPMULHRSWZ256rmk = 15792, |
| 15808 | VPMULHRSWZ256rmkz = 15793, |
| 15809 | VPMULHRSWZ256rr = 15794, |
| 15810 | VPMULHRSWZ256rrk = 15795, |
| 15811 | VPMULHRSWZ256rrkz = 15796, |
| 15812 | VPMULHRSWZrm = 15797, |
| 15813 | VPMULHRSWZrmk = 15798, |
| 15814 | VPMULHRSWZrmkz = 15799, |
| 15815 | VPMULHRSWZrr = 15800, |
| 15816 | VPMULHRSWZrrk = 15801, |
| 15817 | VPMULHRSWZrrkz = 15802, |
| 15818 | VPMULHRSWrm = 15803, |
| 15819 | VPMULHRSWrr = 15804, |
| 15820 | VPMULHUWYrm = 15805, |
| 15821 | VPMULHUWYrr = 15806, |
| 15822 | VPMULHUWZ128rm = 15807, |
| 15823 | VPMULHUWZ128rmk = 15808, |
| 15824 | VPMULHUWZ128rmkz = 15809, |
| 15825 | VPMULHUWZ128rr = 15810, |
| 15826 | VPMULHUWZ128rrk = 15811, |
| 15827 | VPMULHUWZ128rrkz = 15812, |
| 15828 | VPMULHUWZ256rm = 15813, |
| 15829 | VPMULHUWZ256rmk = 15814, |
| 15830 | VPMULHUWZ256rmkz = 15815, |
| 15831 | VPMULHUWZ256rr = 15816, |
| 15832 | VPMULHUWZ256rrk = 15817, |
| 15833 | VPMULHUWZ256rrkz = 15818, |
| 15834 | VPMULHUWZrm = 15819, |
| 15835 | VPMULHUWZrmk = 15820, |
| 15836 | VPMULHUWZrmkz = 15821, |
| 15837 | VPMULHUWZrr = 15822, |
| 15838 | VPMULHUWZrrk = 15823, |
| 15839 | VPMULHUWZrrkz = 15824, |
| 15840 | VPMULHUWrm = 15825, |
| 15841 | VPMULHUWrr = 15826, |
| 15842 | VPMULHWYrm = 15827, |
| 15843 | VPMULHWYrr = 15828, |
| 15844 | VPMULHWZ128rm = 15829, |
| 15845 | VPMULHWZ128rmk = 15830, |
| 15846 | VPMULHWZ128rmkz = 15831, |
| 15847 | VPMULHWZ128rr = 15832, |
| 15848 | VPMULHWZ128rrk = 15833, |
| 15849 | VPMULHWZ128rrkz = 15834, |
| 15850 | VPMULHWZ256rm = 15835, |
| 15851 | VPMULHWZ256rmk = 15836, |
| 15852 | VPMULHWZ256rmkz = 15837, |
| 15853 | VPMULHWZ256rr = 15838, |
| 15854 | VPMULHWZ256rrk = 15839, |
| 15855 | VPMULHWZ256rrkz = 15840, |
| 15856 | VPMULHWZrm = 15841, |
| 15857 | VPMULHWZrmk = 15842, |
| 15858 | VPMULHWZrmkz = 15843, |
| 15859 | VPMULHWZrr = 15844, |
| 15860 | VPMULHWZrrk = 15845, |
| 15861 | VPMULHWZrrkz = 15846, |
| 15862 | VPMULHWrm = 15847, |
| 15863 | VPMULHWrr = 15848, |
| 15864 | VPMULLDYrm = 15849, |
| 15865 | VPMULLDYrr = 15850, |
| 15866 | VPMULLDZ128rm = 15851, |
| 15867 | VPMULLDZ128rmb = 15852, |
| 15868 | VPMULLDZ128rmbk = 15853, |
| 15869 | VPMULLDZ128rmbkz = 15854, |
| 15870 | VPMULLDZ128rmk = 15855, |
| 15871 | VPMULLDZ128rmkz = 15856, |
| 15872 | VPMULLDZ128rr = 15857, |
| 15873 | VPMULLDZ128rrk = 15858, |
| 15874 | VPMULLDZ128rrkz = 15859, |
| 15875 | VPMULLDZ256rm = 15860, |
| 15876 | VPMULLDZ256rmb = 15861, |
| 15877 | VPMULLDZ256rmbk = 15862, |
| 15878 | VPMULLDZ256rmbkz = 15863, |
| 15879 | VPMULLDZ256rmk = 15864, |
| 15880 | VPMULLDZ256rmkz = 15865, |
| 15881 | VPMULLDZ256rr = 15866, |
| 15882 | VPMULLDZ256rrk = 15867, |
| 15883 | VPMULLDZ256rrkz = 15868, |
| 15884 | VPMULLDZrm = 15869, |
| 15885 | VPMULLDZrmb = 15870, |
| 15886 | VPMULLDZrmbk = 15871, |
| 15887 | VPMULLDZrmbkz = 15872, |
| 15888 | VPMULLDZrmk = 15873, |
| 15889 | VPMULLDZrmkz = 15874, |
| 15890 | VPMULLDZrr = 15875, |
| 15891 | VPMULLDZrrk = 15876, |
| 15892 | VPMULLDZrrkz = 15877, |
| 15893 | VPMULLDrm = 15878, |
| 15894 | VPMULLDrr = 15879, |
| 15895 | VPMULLQZ128rm = 15880, |
| 15896 | VPMULLQZ128rmb = 15881, |
| 15897 | VPMULLQZ128rmbk = 15882, |
| 15898 | VPMULLQZ128rmbkz = 15883, |
| 15899 | VPMULLQZ128rmk = 15884, |
| 15900 | VPMULLQZ128rmkz = 15885, |
| 15901 | VPMULLQZ128rr = 15886, |
| 15902 | VPMULLQZ128rrk = 15887, |
| 15903 | VPMULLQZ128rrkz = 15888, |
| 15904 | VPMULLQZ256rm = 15889, |
| 15905 | VPMULLQZ256rmb = 15890, |
| 15906 | VPMULLQZ256rmbk = 15891, |
| 15907 | VPMULLQZ256rmbkz = 15892, |
| 15908 | VPMULLQZ256rmk = 15893, |
| 15909 | VPMULLQZ256rmkz = 15894, |
| 15910 | VPMULLQZ256rr = 15895, |
| 15911 | VPMULLQZ256rrk = 15896, |
| 15912 | VPMULLQZ256rrkz = 15897, |
| 15913 | VPMULLQZrm = 15898, |
| 15914 | VPMULLQZrmb = 15899, |
| 15915 | VPMULLQZrmbk = 15900, |
| 15916 | VPMULLQZrmbkz = 15901, |
| 15917 | VPMULLQZrmk = 15902, |
| 15918 | VPMULLQZrmkz = 15903, |
| 15919 | VPMULLQZrr = 15904, |
| 15920 | VPMULLQZrrk = 15905, |
| 15921 | VPMULLQZrrkz = 15906, |
| 15922 | VPMULLWYrm = 15907, |
| 15923 | VPMULLWYrr = 15908, |
| 15924 | VPMULLWZ128rm = 15909, |
| 15925 | VPMULLWZ128rmk = 15910, |
| 15926 | VPMULLWZ128rmkz = 15911, |
| 15927 | VPMULLWZ128rr = 15912, |
| 15928 | VPMULLWZ128rrk = 15913, |
| 15929 | VPMULLWZ128rrkz = 15914, |
| 15930 | VPMULLWZ256rm = 15915, |
| 15931 | VPMULLWZ256rmk = 15916, |
| 15932 | VPMULLWZ256rmkz = 15917, |
| 15933 | VPMULLWZ256rr = 15918, |
| 15934 | VPMULLWZ256rrk = 15919, |
| 15935 | VPMULLWZ256rrkz = 15920, |
| 15936 | VPMULLWZrm = 15921, |
| 15937 | VPMULLWZrmk = 15922, |
| 15938 | VPMULLWZrmkz = 15923, |
| 15939 | VPMULLWZrr = 15924, |
| 15940 | VPMULLWZrrk = 15925, |
| 15941 | VPMULLWZrrkz = 15926, |
| 15942 | VPMULLWrm = 15927, |
| 15943 | VPMULLWrr = 15928, |
| 15944 | VPMULTISHIFTQBZ128rm = 15929, |
| 15945 | VPMULTISHIFTQBZ128rmb = 15930, |
| 15946 | VPMULTISHIFTQBZ128rmbk = 15931, |
| 15947 | VPMULTISHIFTQBZ128rmbkz = 15932, |
| 15948 | VPMULTISHIFTQBZ128rmk = 15933, |
| 15949 | VPMULTISHIFTQBZ128rmkz = 15934, |
| 15950 | VPMULTISHIFTQBZ128rr = 15935, |
| 15951 | VPMULTISHIFTQBZ128rrk = 15936, |
| 15952 | VPMULTISHIFTQBZ128rrkz = 15937, |
| 15953 | VPMULTISHIFTQBZ256rm = 15938, |
| 15954 | VPMULTISHIFTQBZ256rmb = 15939, |
| 15955 | VPMULTISHIFTQBZ256rmbk = 15940, |
| 15956 | VPMULTISHIFTQBZ256rmbkz = 15941, |
| 15957 | VPMULTISHIFTQBZ256rmk = 15942, |
| 15958 | VPMULTISHIFTQBZ256rmkz = 15943, |
| 15959 | VPMULTISHIFTQBZ256rr = 15944, |
| 15960 | VPMULTISHIFTQBZ256rrk = 15945, |
| 15961 | VPMULTISHIFTQBZ256rrkz = 15946, |
| 15962 | VPMULTISHIFTQBZrm = 15947, |
| 15963 | VPMULTISHIFTQBZrmb = 15948, |
| 15964 | VPMULTISHIFTQBZrmbk = 15949, |
| 15965 | VPMULTISHIFTQBZrmbkz = 15950, |
| 15966 | VPMULTISHIFTQBZrmk = 15951, |
| 15967 | VPMULTISHIFTQBZrmkz = 15952, |
| 15968 | VPMULTISHIFTQBZrr = 15953, |
| 15969 | VPMULTISHIFTQBZrrk = 15954, |
| 15970 | VPMULTISHIFTQBZrrkz = 15955, |
| 15971 | VPMULUDQYrm = 15956, |
| 15972 | VPMULUDQYrr = 15957, |
| 15973 | VPMULUDQZ128rm = 15958, |
| 15974 | VPMULUDQZ128rmb = 15959, |
| 15975 | VPMULUDQZ128rmbk = 15960, |
| 15976 | VPMULUDQZ128rmbkz = 15961, |
| 15977 | VPMULUDQZ128rmk = 15962, |
| 15978 | VPMULUDQZ128rmkz = 15963, |
| 15979 | VPMULUDQZ128rr = 15964, |
| 15980 | VPMULUDQZ128rrk = 15965, |
| 15981 | VPMULUDQZ128rrkz = 15966, |
| 15982 | VPMULUDQZ256rm = 15967, |
| 15983 | VPMULUDQZ256rmb = 15968, |
| 15984 | VPMULUDQZ256rmbk = 15969, |
| 15985 | VPMULUDQZ256rmbkz = 15970, |
| 15986 | VPMULUDQZ256rmk = 15971, |
| 15987 | VPMULUDQZ256rmkz = 15972, |
| 15988 | VPMULUDQZ256rr = 15973, |
| 15989 | VPMULUDQZ256rrk = 15974, |
| 15990 | VPMULUDQZ256rrkz = 15975, |
| 15991 | VPMULUDQZrm = 15976, |
| 15992 | VPMULUDQZrmb = 15977, |
| 15993 | VPMULUDQZrmbk = 15978, |
| 15994 | VPMULUDQZrmbkz = 15979, |
| 15995 | VPMULUDQZrmk = 15980, |
| 15996 | VPMULUDQZrmkz = 15981, |
| 15997 | VPMULUDQZrr = 15982, |
| 15998 | VPMULUDQZrrk = 15983, |
| 15999 | VPMULUDQZrrkz = 15984, |
| 16000 | VPMULUDQrm = 15985, |
| 16001 | VPMULUDQrr = 15986, |
| 16002 | VPOPCNTBZ128rm = 15987, |
| 16003 | VPOPCNTBZ128rmk = 15988, |
| 16004 | VPOPCNTBZ128rmkz = 15989, |
| 16005 | VPOPCNTBZ128rr = 15990, |
| 16006 | VPOPCNTBZ128rrk = 15991, |
| 16007 | VPOPCNTBZ128rrkz = 15992, |
| 16008 | VPOPCNTBZ256rm = 15993, |
| 16009 | VPOPCNTBZ256rmk = 15994, |
| 16010 | VPOPCNTBZ256rmkz = 15995, |
| 16011 | VPOPCNTBZ256rr = 15996, |
| 16012 | VPOPCNTBZ256rrk = 15997, |
| 16013 | VPOPCNTBZ256rrkz = 15998, |
| 16014 | VPOPCNTBZrm = 15999, |
| 16015 | VPOPCNTBZrmk = 16000, |
| 16016 | VPOPCNTBZrmkz = 16001, |
| 16017 | VPOPCNTBZrr = 16002, |
| 16018 | VPOPCNTBZrrk = 16003, |
| 16019 | VPOPCNTBZrrkz = 16004, |
| 16020 | VPOPCNTDZ128rm = 16005, |
| 16021 | VPOPCNTDZ128rmb = 16006, |
| 16022 | VPOPCNTDZ128rmbk = 16007, |
| 16023 | VPOPCNTDZ128rmbkz = 16008, |
| 16024 | VPOPCNTDZ128rmk = 16009, |
| 16025 | VPOPCNTDZ128rmkz = 16010, |
| 16026 | VPOPCNTDZ128rr = 16011, |
| 16027 | VPOPCNTDZ128rrk = 16012, |
| 16028 | VPOPCNTDZ128rrkz = 16013, |
| 16029 | VPOPCNTDZ256rm = 16014, |
| 16030 | VPOPCNTDZ256rmb = 16015, |
| 16031 | VPOPCNTDZ256rmbk = 16016, |
| 16032 | VPOPCNTDZ256rmbkz = 16017, |
| 16033 | VPOPCNTDZ256rmk = 16018, |
| 16034 | VPOPCNTDZ256rmkz = 16019, |
| 16035 | VPOPCNTDZ256rr = 16020, |
| 16036 | VPOPCNTDZ256rrk = 16021, |
| 16037 | VPOPCNTDZ256rrkz = 16022, |
| 16038 | VPOPCNTDZrm = 16023, |
| 16039 | VPOPCNTDZrmb = 16024, |
| 16040 | VPOPCNTDZrmbk = 16025, |
| 16041 | VPOPCNTDZrmbkz = 16026, |
| 16042 | VPOPCNTDZrmk = 16027, |
| 16043 | VPOPCNTDZrmkz = 16028, |
| 16044 | VPOPCNTDZrr = 16029, |
| 16045 | VPOPCNTDZrrk = 16030, |
| 16046 | VPOPCNTDZrrkz = 16031, |
| 16047 | VPOPCNTQZ128rm = 16032, |
| 16048 | VPOPCNTQZ128rmb = 16033, |
| 16049 | VPOPCNTQZ128rmbk = 16034, |
| 16050 | VPOPCNTQZ128rmbkz = 16035, |
| 16051 | VPOPCNTQZ128rmk = 16036, |
| 16052 | VPOPCNTQZ128rmkz = 16037, |
| 16053 | VPOPCNTQZ128rr = 16038, |
| 16054 | VPOPCNTQZ128rrk = 16039, |
| 16055 | VPOPCNTQZ128rrkz = 16040, |
| 16056 | VPOPCNTQZ256rm = 16041, |
| 16057 | VPOPCNTQZ256rmb = 16042, |
| 16058 | VPOPCNTQZ256rmbk = 16043, |
| 16059 | VPOPCNTQZ256rmbkz = 16044, |
| 16060 | VPOPCNTQZ256rmk = 16045, |
| 16061 | VPOPCNTQZ256rmkz = 16046, |
| 16062 | VPOPCNTQZ256rr = 16047, |
| 16063 | VPOPCNTQZ256rrk = 16048, |
| 16064 | VPOPCNTQZ256rrkz = 16049, |
| 16065 | VPOPCNTQZrm = 16050, |
| 16066 | VPOPCNTQZrmb = 16051, |
| 16067 | VPOPCNTQZrmbk = 16052, |
| 16068 | VPOPCNTQZrmbkz = 16053, |
| 16069 | VPOPCNTQZrmk = 16054, |
| 16070 | VPOPCNTQZrmkz = 16055, |
| 16071 | VPOPCNTQZrr = 16056, |
| 16072 | VPOPCNTQZrrk = 16057, |
| 16073 | VPOPCNTQZrrkz = 16058, |
| 16074 | VPOPCNTWZ128rm = 16059, |
| 16075 | VPOPCNTWZ128rmk = 16060, |
| 16076 | VPOPCNTWZ128rmkz = 16061, |
| 16077 | VPOPCNTWZ128rr = 16062, |
| 16078 | VPOPCNTWZ128rrk = 16063, |
| 16079 | VPOPCNTWZ128rrkz = 16064, |
| 16080 | VPOPCNTWZ256rm = 16065, |
| 16081 | VPOPCNTWZ256rmk = 16066, |
| 16082 | VPOPCNTWZ256rmkz = 16067, |
| 16083 | VPOPCNTWZ256rr = 16068, |
| 16084 | VPOPCNTWZ256rrk = 16069, |
| 16085 | VPOPCNTWZ256rrkz = 16070, |
| 16086 | VPOPCNTWZrm = 16071, |
| 16087 | VPOPCNTWZrmk = 16072, |
| 16088 | VPOPCNTWZrmkz = 16073, |
| 16089 | VPOPCNTWZrr = 16074, |
| 16090 | VPOPCNTWZrrk = 16075, |
| 16091 | VPOPCNTWZrrkz = 16076, |
| 16092 | VPORDZ128rm = 16077, |
| 16093 | VPORDZ128rmb = 16078, |
| 16094 | VPORDZ128rmbk = 16079, |
| 16095 | VPORDZ128rmbkz = 16080, |
| 16096 | VPORDZ128rmk = 16081, |
| 16097 | VPORDZ128rmkz = 16082, |
| 16098 | VPORDZ128rr = 16083, |
| 16099 | VPORDZ128rrk = 16084, |
| 16100 | VPORDZ128rrkz = 16085, |
| 16101 | VPORDZ256rm = 16086, |
| 16102 | VPORDZ256rmb = 16087, |
| 16103 | VPORDZ256rmbk = 16088, |
| 16104 | VPORDZ256rmbkz = 16089, |
| 16105 | VPORDZ256rmk = 16090, |
| 16106 | VPORDZ256rmkz = 16091, |
| 16107 | VPORDZ256rr = 16092, |
| 16108 | VPORDZ256rrk = 16093, |
| 16109 | VPORDZ256rrkz = 16094, |
| 16110 | VPORDZrm = 16095, |
| 16111 | VPORDZrmb = 16096, |
| 16112 | VPORDZrmbk = 16097, |
| 16113 | VPORDZrmbkz = 16098, |
| 16114 | VPORDZrmk = 16099, |
| 16115 | VPORDZrmkz = 16100, |
| 16116 | VPORDZrr = 16101, |
| 16117 | VPORDZrrk = 16102, |
| 16118 | VPORDZrrkz = 16103, |
| 16119 | VPORQZ128rm = 16104, |
| 16120 | VPORQZ128rmb = 16105, |
| 16121 | VPORQZ128rmbk = 16106, |
| 16122 | VPORQZ128rmbkz = 16107, |
| 16123 | VPORQZ128rmk = 16108, |
| 16124 | VPORQZ128rmkz = 16109, |
| 16125 | VPORQZ128rr = 16110, |
| 16126 | VPORQZ128rrk = 16111, |
| 16127 | VPORQZ128rrkz = 16112, |
| 16128 | VPORQZ256rm = 16113, |
| 16129 | VPORQZ256rmb = 16114, |
| 16130 | VPORQZ256rmbk = 16115, |
| 16131 | VPORQZ256rmbkz = 16116, |
| 16132 | VPORQZ256rmk = 16117, |
| 16133 | VPORQZ256rmkz = 16118, |
| 16134 | VPORQZ256rr = 16119, |
| 16135 | VPORQZ256rrk = 16120, |
| 16136 | VPORQZ256rrkz = 16121, |
| 16137 | VPORQZrm = 16122, |
| 16138 | VPORQZrmb = 16123, |
| 16139 | VPORQZrmbk = 16124, |
| 16140 | VPORQZrmbkz = 16125, |
| 16141 | VPORQZrmk = 16126, |
| 16142 | VPORQZrmkz = 16127, |
| 16143 | VPORQZrr = 16128, |
| 16144 | VPORQZrrk = 16129, |
| 16145 | VPORQZrrkz = 16130, |
| 16146 | VPORYrm = 16131, |
| 16147 | VPORYrr = 16132, |
| 16148 | VPORrm = 16133, |
| 16149 | VPORrr = 16134, |
| 16150 | VPPERMrmr = 16135, |
| 16151 | VPPERMrrm = 16136, |
| 16152 | VPPERMrrr = 16137, |
| 16153 | VPPERMrrr_REV = 16138, |
| 16154 | VPROLDZ128mbi = 16139, |
| 16155 | VPROLDZ128mbik = 16140, |
| 16156 | VPROLDZ128mbikz = 16141, |
| 16157 | VPROLDZ128mi = 16142, |
| 16158 | VPROLDZ128mik = 16143, |
| 16159 | VPROLDZ128mikz = 16144, |
| 16160 | VPROLDZ128ri = 16145, |
| 16161 | VPROLDZ128rik = 16146, |
| 16162 | VPROLDZ128rikz = 16147, |
| 16163 | VPROLDZ256mbi = 16148, |
| 16164 | VPROLDZ256mbik = 16149, |
| 16165 | VPROLDZ256mbikz = 16150, |
| 16166 | VPROLDZ256mi = 16151, |
| 16167 | VPROLDZ256mik = 16152, |
| 16168 | VPROLDZ256mikz = 16153, |
| 16169 | VPROLDZ256ri = 16154, |
| 16170 | VPROLDZ256rik = 16155, |
| 16171 | VPROLDZ256rikz = 16156, |
| 16172 | VPROLDZmbi = 16157, |
| 16173 | VPROLDZmbik = 16158, |
| 16174 | VPROLDZmbikz = 16159, |
| 16175 | VPROLDZmi = 16160, |
| 16176 | VPROLDZmik = 16161, |
| 16177 | VPROLDZmikz = 16162, |
| 16178 | VPROLDZri = 16163, |
| 16179 | VPROLDZrik = 16164, |
| 16180 | VPROLDZrikz = 16165, |
| 16181 | VPROLQZ128mbi = 16166, |
| 16182 | VPROLQZ128mbik = 16167, |
| 16183 | VPROLQZ128mbikz = 16168, |
| 16184 | VPROLQZ128mi = 16169, |
| 16185 | VPROLQZ128mik = 16170, |
| 16186 | VPROLQZ128mikz = 16171, |
| 16187 | VPROLQZ128ri = 16172, |
| 16188 | VPROLQZ128rik = 16173, |
| 16189 | VPROLQZ128rikz = 16174, |
| 16190 | VPROLQZ256mbi = 16175, |
| 16191 | VPROLQZ256mbik = 16176, |
| 16192 | VPROLQZ256mbikz = 16177, |
| 16193 | VPROLQZ256mi = 16178, |
| 16194 | VPROLQZ256mik = 16179, |
| 16195 | VPROLQZ256mikz = 16180, |
| 16196 | VPROLQZ256ri = 16181, |
| 16197 | VPROLQZ256rik = 16182, |
| 16198 | VPROLQZ256rikz = 16183, |
| 16199 | VPROLQZmbi = 16184, |
| 16200 | VPROLQZmbik = 16185, |
| 16201 | VPROLQZmbikz = 16186, |
| 16202 | VPROLQZmi = 16187, |
| 16203 | VPROLQZmik = 16188, |
| 16204 | VPROLQZmikz = 16189, |
| 16205 | VPROLQZri = 16190, |
| 16206 | VPROLQZrik = 16191, |
| 16207 | VPROLQZrikz = 16192, |
| 16208 | VPROLVDZ128rm = 16193, |
| 16209 | VPROLVDZ128rmb = 16194, |
| 16210 | VPROLVDZ128rmbk = 16195, |
| 16211 | VPROLVDZ128rmbkz = 16196, |
| 16212 | VPROLVDZ128rmk = 16197, |
| 16213 | VPROLVDZ128rmkz = 16198, |
| 16214 | VPROLVDZ128rr = 16199, |
| 16215 | VPROLVDZ128rrk = 16200, |
| 16216 | VPROLVDZ128rrkz = 16201, |
| 16217 | VPROLVDZ256rm = 16202, |
| 16218 | VPROLVDZ256rmb = 16203, |
| 16219 | VPROLVDZ256rmbk = 16204, |
| 16220 | VPROLVDZ256rmbkz = 16205, |
| 16221 | VPROLVDZ256rmk = 16206, |
| 16222 | VPROLVDZ256rmkz = 16207, |
| 16223 | VPROLVDZ256rr = 16208, |
| 16224 | VPROLVDZ256rrk = 16209, |
| 16225 | VPROLVDZ256rrkz = 16210, |
| 16226 | VPROLVDZrm = 16211, |
| 16227 | VPROLVDZrmb = 16212, |
| 16228 | VPROLVDZrmbk = 16213, |
| 16229 | VPROLVDZrmbkz = 16214, |
| 16230 | VPROLVDZrmk = 16215, |
| 16231 | VPROLVDZrmkz = 16216, |
| 16232 | VPROLVDZrr = 16217, |
| 16233 | VPROLVDZrrk = 16218, |
| 16234 | VPROLVDZrrkz = 16219, |
| 16235 | VPROLVQZ128rm = 16220, |
| 16236 | VPROLVQZ128rmb = 16221, |
| 16237 | VPROLVQZ128rmbk = 16222, |
| 16238 | VPROLVQZ128rmbkz = 16223, |
| 16239 | VPROLVQZ128rmk = 16224, |
| 16240 | VPROLVQZ128rmkz = 16225, |
| 16241 | VPROLVQZ128rr = 16226, |
| 16242 | VPROLVQZ128rrk = 16227, |
| 16243 | VPROLVQZ128rrkz = 16228, |
| 16244 | VPROLVQZ256rm = 16229, |
| 16245 | VPROLVQZ256rmb = 16230, |
| 16246 | VPROLVQZ256rmbk = 16231, |
| 16247 | VPROLVQZ256rmbkz = 16232, |
| 16248 | VPROLVQZ256rmk = 16233, |
| 16249 | VPROLVQZ256rmkz = 16234, |
| 16250 | VPROLVQZ256rr = 16235, |
| 16251 | VPROLVQZ256rrk = 16236, |
| 16252 | VPROLVQZ256rrkz = 16237, |
| 16253 | VPROLVQZrm = 16238, |
| 16254 | VPROLVQZrmb = 16239, |
| 16255 | VPROLVQZrmbk = 16240, |
| 16256 | VPROLVQZrmbkz = 16241, |
| 16257 | VPROLVQZrmk = 16242, |
| 16258 | VPROLVQZrmkz = 16243, |
| 16259 | VPROLVQZrr = 16244, |
| 16260 | VPROLVQZrrk = 16245, |
| 16261 | VPROLVQZrrkz = 16246, |
| 16262 | VPRORDZ128mbi = 16247, |
| 16263 | VPRORDZ128mbik = 16248, |
| 16264 | VPRORDZ128mbikz = 16249, |
| 16265 | VPRORDZ128mi = 16250, |
| 16266 | VPRORDZ128mik = 16251, |
| 16267 | VPRORDZ128mikz = 16252, |
| 16268 | VPRORDZ128ri = 16253, |
| 16269 | VPRORDZ128rik = 16254, |
| 16270 | VPRORDZ128rikz = 16255, |
| 16271 | VPRORDZ256mbi = 16256, |
| 16272 | VPRORDZ256mbik = 16257, |
| 16273 | VPRORDZ256mbikz = 16258, |
| 16274 | VPRORDZ256mi = 16259, |
| 16275 | VPRORDZ256mik = 16260, |
| 16276 | VPRORDZ256mikz = 16261, |
| 16277 | VPRORDZ256ri = 16262, |
| 16278 | VPRORDZ256rik = 16263, |
| 16279 | VPRORDZ256rikz = 16264, |
| 16280 | VPRORDZmbi = 16265, |
| 16281 | VPRORDZmbik = 16266, |
| 16282 | VPRORDZmbikz = 16267, |
| 16283 | VPRORDZmi = 16268, |
| 16284 | VPRORDZmik = 16269, |
| 16285 | VPRORDZmikz = 16270, |
| 16286 | VPRORDZri = 16271, |
| 16287 | VPRORDZrik = 16272, |
| 16288 | VPRORDZrikz = 16273, |
| 16289 | VPRORQZ128mbi = 16274, |
| 16290 | VPRORQZ128mbik = 16275, |
| 16291 | VPRORQZ128mbikz = 16276, |
| 16292 | VPRORQZ128mi = 16277, |
| 16293 | VPRORQZ128mik = 16278, |
| 16294 | VPRORQZ128mikz = 16279, |
| 16295 | VPRORQZ128ri = 16280, |
| 16296 | VPRORQZ128rik = 16281, |
| 16297 | VPRORQZ128rikz = 16282, |
| 16298 | VPRORQZ256mbi = 16283, |
| 16299 | VPRORQZ256mbik = 16284, |
| 16300 | VPRORQZ256mbikz = 16285, |
| 16301 | VPRORQZ256mi = 16286, |
| 16302 | VPRORQZ256mik = 16287, |
| 16303 | VPRORQZ256mikz = 16288, |
| 16304 | VPRORQZ256ri = 16289, |
| 16305 | VPRORQZ256rik = 16290, |
| 16306 | VPRORQZ256rikz = 16291, |
| 16307 | VPRORQZmbi = 16292, |
| 16308 | VPRORQZmbik = 16293, |
| 16309 | VPRORQZmbikz = 16294, |
| 16310 | VPRORQZmi = 16295, |
| 16311 | VPRORQZmik = 16296, |
| 16312 | VPRORQZmikz = 16297, |
| 16313 | VPRORQZri = 16298, |
| 16314 | VPRORQZrik = 16299, |
| 16315 | VPRORQZrikz = 16300, |
| 16316 | VPRORVDZ128rm = 16301, |
| 16317 | VPRORVDZ128rmb = 16302, |
| 16318 | VPRORVDZ128rmbk = 16303, |
| 16319 | VPRORVDZ128rmbkz = 16304, |
| 16320 | VPRORVDZ128rmk = 16305, |
| 16321 | VPRORVDZ128rmkz = 16306, |
| 16322 | VPRORVDZ128rr = 16307, |
| 16323 | VPRORVDZ128rrk = 16308, |
| 16324 | VPRORVDZ128rrkz = 16309, |
| 16325 | VPRORVDZ256rm = 16310, |
| 16326 | VPRORVDZ256rmb = 16311, |
| 16327 | VPRORVDZ256rmbk = 16312, |
| 16328 | VPRORVDZ256rmbkz = 16313, |
| 16329 | VPRORVDZ256rmk = 16314, |
| 16330 | VPRORVDZ256rmkz = 16315, |
| 16331 | VPRORVDZ256rr = 16316, |
| 16332 | VPRORVDZ256rrk = 16317, |
| 16333 | VPRORVDZ256rrkz = 16318, |
| 16334 | VPRORVDZrm = 16319, |
| 16335 | VPRORVDZrmb = 16320, |
| 16336 | VPRORVDZrmbk = 16321, |
| 16337 | VPRORVDZrmbkz = 16322, |
| 16338 | VPRORVDZrmk = 16323, |
| 16339 | VPRORVDZrmkz = 16324, |
| 16340 | VPRORVDZrr = 16325, |
| 16341 | VPRORVDZrrk = 16326, |
| 16342 | VPRORVDZrrkz = 16327, |
| 16343 | VPRORVQZ128rm = 16328, |
| 16344 | VPRORVQZ128rmb = 16329, |
| 16345 | VPRORVQZ128rmbk = 16330, |
| 16346 | VPRORVQZ128rmbkz = 16331, |
| 16347 | VPRORVQZ128rmk = 16332, |
| 16348 | VPRORVQZ128rmkz = 16333, |
| 16349 | VPRORVQZ128rr = 16334, |
| 16350 | VPRORVQZ128rrk = 16335, |
| 16351 | VPRORVQZ128rrkz = 16336, |
| 16352 | VPRORVQZ256rm = 16337, |
| 16353 | VPRORVQZ256rmb = 16338, |
| 16354 | VPRORVQZ256rmbk = 16339, |
| 16355 | VPRORVQZ256rmbkz = 16340, |
| 16356 | VPRORVQZ256rmk = 16341, |
| 16357 | VPRORVQZ256rmkz = 16342, |
| 16358 | VPRORVQZ256rr = 16343, |
| 16359 | VPRORVQZ256rrk = 16344, |
| 16360 | VPRORVQZ256rrkz = 16345, |
| 16361 | VPRORVQZrm = 16346, |
| 16362 | VPRORVQZrmb = 16347, |
| 16363 | VPRORVQZrmbk = 16348, |
| 16364 | VPRORVQZrmbkz = 16349, |
| 16365 | VPRORVQZrmk = 16350, |
| 16366 | VPRORVQZrmkz = 16351, |
| 16367 | VPRORVQZrr = 16352, |
| 16368 | VPRORVQZrrk = 16353, |
| 16369 | VPRORVQZrrkz = 16354, |
| 16370 | VPROTBmi = 16355, |
| 16371 | VPROTBmr = 16356, |
| 16372 | VPROTBri = 16357, |
| 16373 | VPROTBrm = 16358, |
| 16374 | VPROTBrr = 16359, |
| 16375 | VPROTBrr_REV = 16360, |
| 16376 | VPROTDmi = 16361, |
| 16377 | VPROTDmr = 16362, |
| 16378 | VPROTDri = 16363, |
| 16379 | VPROTDrm = 16364, |
| 16380 | VPROTDrr = 16365, |
| 16381 | VPROTDrr_REV = 16366, |
| 16382 | VPROTQmi = 16367, |
| 16383 | VPROTQmr = 16368, |
| 16384 | VPROTQri = 16369, |
| 16385 | VPROTQrm = 16370, |
| 16386 | VPROTQrr = 16371, |
| 16387 | VPROTQrr_REV = 16372, |
| 16388 | VPROTWmi = 16373, |
| 16389 | VPROTWmr = 16374, |
| 16390 | VPROTWri = 16375, |
| 16391 | VPROTWrm = 16376, |
| 16392 | VPROTWrr = 16377, |
| 16393 | VPROTWrr_REV = 16378, |
| 16394 | VPSADBWYrm = 16379, |
| 16395 | VPSADBWYrr = 16380, |
| 16396 | VPSADBWZ128rm = 16381, |
| 16397 | VPSADBWZ128rr = 16382, |
| 16398 | VPSADBWZ256rm = 16383, |
| 16399 | VPSADBWZ256rr = 16384, |
| 16400 | VPSADBWZrm = 16385, |
| 16401 | VPSADBWZrr = 16386, |
| 16402 | VPSADBWrm = 16387, |
| 16403 | VPSADBWrr = 16388, |
| 16404 | VPSCATTERDDZ128mr = 16389, |
| 16405 | VPSCATTERDDZ256mr = 16390, |
| 16406 | VPSCATTERDDZmr = 16391, |
| 16407 | VPSCATTERDQZ128mr = 16392, |
| 16408 | VPSCATTERDQZ256mr = 16393, |
| 16409 | VPSCATTERDQZmr = 16394, |
| 16410 | VPSCATTERQDZ128mr = 16395, |
| 16411 | VPSCATTERQDZ256mr = 16396, |
| 16412 | VPSCATTERQDZmr = 16397, |
| 16413 | VPSCATTERQQZ128mr = 16398, |
| 16414 | VPSCATTERQQZ256mr = 16399, |
| 16415 | VPSCATTERQQZmr = 16400, |
| 16416 | VPSHABmr = 16401, |
| 16417 | VPSHABrm = 16402, |
| 16418 | VPSHABrr = 16403, |
| 16419 | VPSHABrr_REV = 16404, |
| 16420 | VPSHADmr = 16405, |
| 16421 | VPSHADrm = 16406, |
| 16422 | VPSHADrr = 16407, |
| 16423 | VPSHADrr_REV = 16408, |
| 16424 | VPSHAQmr = 16409, |
| 16425 | VPSHAQrm = 16410, |
| 16426 | VPSHAQrr = 16411, |
| 16427 | VPSHAQrr_REV = 16412, |
| 16428 | VPSHAWmr = 16413, |
| 16429 | VPSHAWrm = 16414, |
| 16430 | VPSHAWrr = 16415, |
| 16431 | VPSHAWrr_REV = 16416, |
| 16432 | VPSHLBmr = 16417, |
| 16433 | VPSHLBrm = 16418, |
| 16434 | VPSHLBrr = 16419, |
| 16435 | VPSHLBrr_REV = 16420, |
| 16436 | VPSHLDDZ128rmbi = 16421, |
| 16437 | VPSHLDDZ128rmbik = 16422, |
| 16438 | VPSHLDDZ128rmbikz = 16423, |
| 16439 | VPSHLDDZ128rmi = 16424, |
| 16440 | VPSHLDDZ128rmik = 16425, |
| 16441 | VPSHLDDZ128rmikz = 16426, |
| 16442 | VPSHLDDZ128rri = 16427, |
| 16443 | VPSHLDDZ128rrik = 16428, |
| 16444 | VPSHLDDZ128rrikz = 16429, |
| 16445 | VPSHLDDZ256rmbi = 16430, |
| 16446 | VPSHLDDZ256rmbik = 16431, |
| 16447 | VPSHLDDZ256rmbikz = 16432, |
| 16448 | VPSHLDDZ256rmi = 16433, |
| 16449 | VPSHLDDZ256rmik = 16434, |
| 16450 | VPSHLDDZ256rmikz = 16435, |
| 16451 | VPSHLDDZ256rri = 16436, |
| 16452 | VPSHLDDZ256rrik = 16437, |
| 16453 | VPSHLDDZ256rrikz = 16438, |
| 16454 | VPSHLDDZrmbi = 16439, |
| 16455 | VPSHLDDZrmbik = 16440, |
| 16456 | VPSHLDDZrmbikz = 16441, |
| 16457 | VPSHLDDZrmi = 16442, |
| 16458 | VPSHLDDZrmik = 16443, |
| 16459 | VPSHLDDZrmikz = 16444, |
| 16460 | VPSHLDDZrri = 16445, |
| 16461 | VPSHLDDZrrik = 16446, |
| 16462 | VPSHLDDZrrikz = 16447, |
| 16463 | VPSHLDQZ128rmbi = 16448, |
| 16464 | VPSHLDQZ128rmbik = 16449, |
| 16465 | VPSHLDQZ128rmbikz = 16450, |
| 16466 | VPSHLDQZ128rmi = 16451, |
| 16467 | VPSHLDQZ128rmik = 16452, |
| 16468 | VPSHLDQZ128rmikz = 16453, |
| 16469 | VPSHLDQZ128rri = 16454, |
| 16470 | VPSHLDQZ128rrik = 16455, |
| 16471 | VPSHLDQZ128rrikz = 16456, |
| 16472 | VPSHLDQZ256rmbi = 16457, |
| 16473 | VPSHLDQZ256rmbik = 16458, |
| 16474 | VPSHLDQZ256rmbikz = 16459, |
| 16475 | VPSHLDQZ256rmi = 16460, |
| 16476 | VPSHLDQZ256rmik = 16461, |
| 16477 | VPSHLDQZ256rmikz = 16462, |
| 16478 | VPSHLDQZ256rri = 16463, |
| 16479 | VPSHLDQZ256rrik = 16464, |
| 16480 | VPSHLDQZ256rrikz = 16465, |
| 16481 | VPSHLDQZrmbi = 16466, |
| 16482 | VPSHLDQZrmbik = 16467, |
| 16483 | VPSHLDQZrmbikz = 16468, |
| 16484 | VPSHLDQZrmi = 16469, |
| 16485 | VPSHLDQZrmik = 16470, |
| 16486 | VPSHLDQZrmikz = 16471, |
| 16487 | VPSHLDQZrri = 16472, |
| 16488 | VPSHLDQZrrik = 16473, |
| 16489 | VPSHLDQZrrikz = 16474, |
| 16490 | VPSHLDVDZ128m = 16475, |
| 16491 | VPSHLDVDZ128mb = 16476, |
| 16492 | VPSHLDVDZ128mbk = 16477, |
| 16493 | VPSHLDVDZ128mbkz = 16478, |
| 16494 | VPSHLDVDZ128mk = 16479, |
| 16495 | VPSHLDVDZ128mkz = 16480, |
| 16496 | VPSHLDVDZ128r = 16481, |
| 16497 | VPSHLDVDZ128rk = 16482, |
| 16498 | VPSHLDVDZ128rkz = 16483, |
| 16499 | VPSHLDVDZ256m = 16484, |
| 16500 | VPSHLDVDZ256mb = 16485, |
| 16501 | VPSHLDVDZ256mbk = 16486, |
| 16502 | VPSHLDVDZ256mbkz = 16487, |
| 16503 | VPSHLDVDZ256mk = 16488, |
| 16504 | VPSHLDVDZ256mkz = 16489, |
| 16505 | VPSHLDVDZ256r = 16490, |
| 16506 | VPSHLDVDZ256rk = 16491, |
| 16507 | VPSHLDVDZ256rkz = 16492, |
| 16508 | VPSHLDVDZm = 16493, |
| 16509 | VPSHLDVDZmb = 16494, |
| 16510 | VPSHLDVDZmbk = 16495, |
| 16511 | VPSHLDVDZmbkz = 16496, |
| 16512 | VPSHLDVDZmk = 16497, |
| 16513 | VPSHLDVDZmkz = 16498, |
| 16514 | VPSHLDVDZr = 16499, |
| 16515 | VPSHLDVDZrk = 16500, |
| 16516 | VPSHLDVDZrkz = 16501, |
| 16517 | VPSHLDVQZ128m = 16502, |
| 16518 | VPSHLDVQZ128mb = 16503, |
| 16519 | VPSHLDVQZ128mbk = 16504, |
| 16520 | VPSHLDVQZ128mbkz = 16505, |
| 16521 | VPSHLDVQZ128mk = 16506, |
| 16522 | VPSHLDVQZ128mkz = 16507, |
| 16523 | VPSHLDVQZ128r = 16508, |
| 16524 | VPSHLDVQZ128rk = 16509, |
| 16525 | VPSHLDVQZ128rkz = 16510, |
| 16526 | VPSHLDVQZ256m = 16511, |
| 16527 | VPSHLDVQZ256mb = 16512, |
| 16528 | VPSHLDVQZ256mbk = 16513, |
| 16529 | VPSHLDVQZ256mbkz = 16514, |
| 16530 | VPSHLDVQZ256mk = 16515, |
| 16531 | VPSHLDVQZ256mkz = 16516, |
| 16532 | VPSHLDVQZ256r = 16517, |
| 16533 | VPSHLDVQZ256rk = 16518, |
| 16534 | VPSHLDVQZ256rkz = 16519, |
| 16535 | VPSHLDVQZm = 16520, |
| 16536 | VPSHLDVQZmb = 16521, |
| 16537 | VPSHLDVQZmbk = 16522, |
| 16538 | VPSHLDVQZmbkz = 16523, |
| 16539 | VPSHLDVQZmk = 16524, |
| 16540 | VPSHLDVQZmkz = 16525, |
| 16541 | VPSHLDVQZr = 16526, |
| 16542 | VPSHLDVQZrk = 16527, |
| 16543 | VPSHLDVQZrkz = 16528, |
| 16544 | VPSHLDVWZ128m = 16529, |
| 16545 | VPSHLDVWZ128mk = 16530, |
| 16546 | VPSHLDVWZ128mkz = 16531, |
| 16547 | VPSHLDVWZ128r = 16532, |
| 16548 | VPSHLDVWZ128rk = 16533, |
| 16549 | VPSHLDVWZ128rkz = 16534, |
| 16550 | VPSHLDVWZ256m = 16535, |
| 16551 | VPSHLDVWZ256mk = 16536, |
| 16552 | VPSHLDVWZ256mkz = 16537, |
| 16553 | VPSHLDVWZ256r = 16538, |
| 16554 | VPSHLDVWZ256rk = 16539, |
| 16555 | VPSHLDVWZ256rkz = 16540, |
| 16556 | VPSHLDVWZm = 16541, |
| 16557 | VPSHLDVWZmk = 16542, |
| 16558 | VPSHLDVWZmkz = 16543, |
| 16559 | VPSHLDVWZr = 16544, |
| 16560 | VPSHLDVWZrk = 16545, |
| 16561 | VPSHLDVWZrkz = 16546, |
| 16562 | VPSHLDWZ128rmi = 16547, |
| 16563 | VPSHLDWZ128rmik = 16548, |
| 16564 | VPSHLDWZ128rmikz = 16549, |
| 16565 | VPSHLDWZ128rri = 16550, |
| 16566 | VPSHLDWZ128rrik = 16551, |
| 16567 | VPSHLDWZ128rrikz = 16552, |
| 16568 | VPSHLDWZ256rmi = 16553, |
| 16569 | VPSHLDWZ256rmik = 16554, |
| 16570 | VPSHLDWZ256rmikz = 16555, |
| 16571 | VPSHLDWZ256rri = 16556, |
| 16572 | VPSHLDWZ256rrik = 16557, |
| 16573 | VPSHLDWZ256rrikz = 16558, |
| 16574 | VPSHLDWZrmi = 16559, |
| 16575 | VPSHLDWZrmik = 16560, |
| 16576 | VPSHLDWZrmikz = 16561, |
| 16577 | VPSHLDWZrri = 16562, |
| 16578 | VPSHLDWZrrik = 16563, |
| 16579 | VPSHLDWZrrikz = 16564, |
| 16580 | VPSHLDmr = 16565, |
| 16581 | VPSHLDrm = 16566, |
| 16582 | VPSHLDrr = 16567, |
| 16583 | VPSHLDrr_REV = 16568, |
| 16584 | VPSHLQmr = 16569, |
| 16585 | VPSHLQrm = 16570, |
| 16586 | VPSHLQrr = 16571, |
| 16587 | VPSHLQrr_REV = 16572, |
| 16588 | VPSHLWmr = 16573, |
| 16589 | VPSHLWrm = 16574, |
| 16590 | VPSHLWrr = 16575, |
| 16591 | VPSHLWrr_REV = 16576, |
| 16592 | VPSHRDDZ128rmbi = 16577, |
| 16593 | VPSHRDDZ128rmbik = 16578, |
| 16594 | VPSHRDDZ128rmbikz = 16579, |
| 16595 | VPSHRDDZ128rmi = 16580, |
| 16596 | VPSHRDDZ128rmik = 16581, |
| 16597 | VPSHRDDZ128rmikz = 16582, |
| 16598 | VPSHRDDZ128rri = 16583, |
| 16599 | VPSHRDDZ128rrik = 16584, |
| 16600 | VPSHRDDZ128rrikz = 16585, |
| 16601 | VPSHRDDZ256rmbi = 16586, |
| 16602 | VPSHRDDZ256rmbik = 16587, |
| 16603 | VPSHRDDZ256rmbikz = 16588, |
| 16604 | VPSHRDDZ256rmi = 16589, |
| 16605 | VPSHRDDZ256rmik = 16590, |
| 16606 | VPSHRDDZ256rmikz = 16591, |
| 16607 | VPSHRDDZ256rri = 16592, |
| 16608 | VPSHRDDZ256rrik = 16593, |
| 16609 | VPSHRDDZ256rrikz = 16594, |
| 16610 | VPSHRDDZrmbi = 16595, |
| 16611 | VPSHRDDZrmbik = 16596, |
| 16612 | VPSHRDDZrmbikz = 16597, |
| 16613 | VPSHRDDZrmi = 16598, |
| 16614 | VPSHRDDZrmik = 16599, |
| 16615 | VPSHRDDZrmikz = 16600, |
| 16616 | VPSHRDDZrri = 16601, |
| 16617 | VPSHRDDZrrik = 16602, |
| 16618 | VPSHRDDZrrikz = 16603, |
| 16619 | VPSHRDQZ128rmbi = 16604, |
| 16620 | VPSHRDQZ128rmbik = 16605, |
| 16621 | VPSHRDQZ128rmbikz = 16606, |
| 16622 | VPSHRDQZ128rmi = 16607, |
| 16623 | VPSHRDQZ128rmik = 16608, |
| 16624 | VPSHRDQZ128rmikz = 16609, |
| 16625 | VPSHRDQZ128rri = 16610, |
| 16626 | VPSHRDQZ128rrik = 16611, |
| 16627 | VPSHRDQZ128rrikz = 16612, |
| 16628 | VPSHRDQZ256rmbi = 16613, |
| 16629 | VPSHRDQZ256rmbik = 16614, |
| 16630 | VPSHRDQZ256rmbikz = 16615, |
| 16631 | VPSHRDQZ256rmi = 16616, |
| 16632 | VPSHRDQZ256rmik = 16617, |
| 16633 | VPSHRDQZ256rmikz = 16618, |
| 16634 | VPSHRDQZ256rri = 16619, |
| 16635 | VPSHRDQZ256rrik = 16620, |
| 16636 | VPSHRDQZ256rrikz = 16621, |
| 16637 | VPSHRDQZrmbi = 16622, |
| 16638 | VPSHRDQZrmbik = 16623, |
| 16639 | VPSHRDQZrmbikz = 16624, |
| 16640 | VPSHRDQZrmi = 16625, |
| 16641 | VPSHRDQZrmik = 16626, |
| 16642 | VPSHRDQZrmikz = 16627, |
| 16643 | VPSHRDQZrri = 16628, |
| 16644 | VPSHRDQZrrik = 16629, |
| 16645 | VPSHRDQZrrikz = 16630, |
| 16646 | VPSHRDVDZ128m = 16631, |
| 16647 | VPSHRDVDZ128mb = 16632, |
| 16648 | VPSHRDVDZ128mbk = 16633, |
| 16649 | VPSHRDVDZ128mbkz = 16634, |
| 16650 | VPSHRDVDZ128mk = 16635, |
| 16651 | VPSHRDVDZ128mkz = 16636, |
| 16652 | VPSHRDVDZ128r = 16637, |
| 16653 | VPSHRDVDZ128rk = 16638, |
| 16654 | VPSHRDVDZ128rkz = 16639, |
| 16655 | VPSHRDVDZ256m = 16640, |
| 16656 | VPSHRDVDZ256mb = 16641, |
| 16657 | VPSHRDVDZ256mbk = 16642, |
| 16658 | VPSHRDVDZ256mbkz = 16643, |
| 16659 | VPSHRDVDZ256mk = 16644, |
| 16660 | VPSHRDVDZ256mkz = 16645, |
| 16661 | VPSHRDVDZ256r = 16646, |
| 16662 | VPSHRDVDZ256rk = 16647, |
| 16663 | VPSHRDVDZ256rkz = 16648, |
| 16664 | VPSHRDVDZm = 16649, |
| 16665 | VPSHRDVDZmb = 16650, |
| 16666 | VPSHRDVDZmbk = 16651, |
| 16667 | VPSHRDVDZmbkz = 16652, |
| 16668 | VPSHRDVDZmk = 16653, |
| 16669 | VPSHRDVDZmkz = 16654, |
| 16670 | VPSHRDVDZr = 16655, |
| 16671 | VPSHRDVDZrk = 16656, |
| 16672 | VPSHRDVDZrkz = 16657, |
| 16673 | VPSHRDVQZ128m = 16658, |
| 16674 | VPSHRDVQZ128mb = 16659, |
| 16675 | VPSHRDVQZ128mbk = 16660, |
| 16676 | VPSHRDVQZ128mbkz = 16661, |
| 16677 | VPSHRDVQZ128mk = 16662, |
| 16678 | VPSHRDVQZ128mkz = 16663, |
| 16679 | VPSHRDVQZ128r = 16664, |
| 16680 | VPSHRDVQZ128rk = 16665, |
| 16681 | VPSHRDVQZ128rkz = 16666, |
| 16682 | VPSHRDVQZ256m = 16667, |
| 16683 | VPSHRDVQZ256mb = 16668, |
| 16684 | VPSHRDVQZ256mbk = 16669, |
| 16685 | VPSHRDVQZ256mbkz = 16670, |
| 16686 | VPSHRDVQZ256mk = 16671, |
| 16687 | VPSHRDVQZ256mkz = 16672, |
| 16688 | VPSHRDVQZ256r = 16673, |
| 16689 | VPSHRDVQZ256rk = 16674, |
| 16690 | VPSHRDVQZ256rkz = 16675, |
| 16691 | VPSHRDVQZm = 16676, |
| 16692 | VPSHRDVQZmb = 16677, |
| 16693 | VPSHRDVQZmbk = 16678, |
| 16694 | VPSHRDVQZmbkz = 16679, |
| 16695 | VPSHRDVQZmk = 16680, |
| 16696 | VPSHRDVQZmkz = 16681, |
| 16697 | VPSHRDVQZr = 16682, |
| 16698 | VPSHRDVQZrk = 16683, |
| 16699 | VPSHRDVQZrkz = 16684, |
| 16700 | VPSHRDVWZ128m = 16685, |
| 16701 | VPSHRDVWZ128mk = 16686, |
| 16702 | VPSHRDVWZ128mkz = 16687, |
| 16703 | VPSHRDVWZ128r = 16688, |
| 16704 | VPSHRDVWZ128rk = 16689, |
| 16705 | VPSHRDVWZ128rkz = 16690, |
| 16706 | VPSHRDVWZ256m = 16691, |
| 16707 | VPSHRDVWZ256mk = 16692, |
| 16708 | VPSHRDVWZ256mkz = 16693, |
| 16709 | VPSHRDVWZ256r = 16694, |
| 16710 | VPSHRDVWZ256rk = 16695, |
| 16711 | VPSHRDVWZ256rkz = 16696, |
| 16712 | VPSHRDVWZm = 16697, |
| 16713 | VPSHRDVWZmk = 16698, |
| 16714 | VPSHRDVWZmkz = 16699, |
| 16715 | VPSHRDVWZr = 16700, |
| 16716 | VPSHRDVWZrk = 16701, |
| 16717 | VPSHRDVWZrkz = 16702, |
| 16718 | VPSHRDWZ128rmi = 16703, |
| 16719 | VPSHRDWZ128rmik = 16704, |
| 16720 | VPSHRDWZ128rmikz = 16705, |
| 16721 | VPSHRDWZ128rri = 16706, |
| 16722 | VPSHRDWZ128rrik = 16707, |
| 16723 | VPSHRDWZ128rrikz = 16708, |
| 16724 | VPSHRDWZ256rmi = 16709, |
| 16725 | VPSHRDWZ256rmik = 16710, |
| 16726 | VPSHRDWZ256rmikz = 16711, |
| 16727 | VPSHRDWZ256rri = 16712, |
| 16728 | VPSHRDWZ256rrik = 16713, |
| 16729 | VPSHRDWZ256rrikz = 16714, |
| 16730 | VPSHRDWZrmi = 16715, |
| 16731 | VPSHRDWZrmik = 16716, |
| 16732 | VPSHRDWZrmikz = 16717, |
| 16733 | VPSHRDWZrri = 16718, |
| 16734 | VPSHRDWZrrik = 16719, |
| 16735 | VPSHRDWZrrikz = 16720, |
| 16736 | VPSHUFBITQMBZ128rm = 16721, |
| 16737 | VPSHUFBITQMBZ128rmk = 16722, |
| 16738 | VPSHUFBITQMBZ128rr = 16723, |
| 16739 | VPSHUFBITQMBZ128rrk = 16724, |
| 16740 | VPSHUFBITQMBZ256rm = 16725, |
| 16741 | VPSHUFBITQMBZ256rmk = 16726, |
| 16742 | VPSHUFBITQMBZ256rr = 16727, |
| 16743 | VPSHUFBITQMBZ256rrk = 16728, |
| 16744 | VPSHUFBITQMBZrm = 16729, |
| 16745 | VPSHUFBITQMBZrmk = 16730, |
| 16746 | VPSHUFBITQMBZrr = 16731, |
| 16747 | VPSHUFBITQMBZrrk = 16732, |
| 16748 | VPSHUFBYrm = 16733, |
| 16749 | VPSHUFBYrr = 16734, |
| 16750 | VPSHUFBZ128rm = 16735, |
| 16751 | VPSHUFBZ128rmk = 16736, |
| 16752 | VPSHUFBZ128rmkz = 16737, |
| 16753 | VPSHUFBZ128rr = 16738, |
| 16754 | VPSHUFBZ128rrk = 16739, |
| 16755 | VPSHUFBZ128rrkz = 16740, |
| 16756 | VPSHUFBZ256rm = 16741, |
| 16757 | VPSHUFBZ256rmk = 16742, |
| 16758 | VPSHUFBZ256rmkz = 16743, |
| 16759 | VPSHUFBZ256rr = 16744, |
| 16760 | VPSHUFBZ256rrk = 16745, |
| 16761 | VPSHUFBZ256rrkz = 16746, |
| 16762 | VPSHUFBZrm = 16747, |
| 16763 | VPSHUFBZrmk = 16748, |
| 16764 | VPSHUFBZrmkz = 16749, |
| 16765 | VPSHUFBZrr = 16750, |
| 16766 | VPSHUFBZrrk = 16751, |
| 16767 | VPSHUFBZrrkz = 16752, |
| 16768 | VPSHUFBrm = 16753, |
| 16769 | VPSHUFBrr = 16754, |
| 16770 | VPSHUFDYmi = 16755, |
| 16771 | VPSHUFDYri = 16756, |
| 16772 | VPSHUFDZ128mbi = 16757, |
| 16773 | VPSHUFDZ128mbik = 16758, |
| 16774 | VPSHUFDZ128mbikz = 16759, |
| 16775 | VPSHUFDZ128mi = 16760, |
| 16776 | VPSHUFDZ128mik = 16761, |
| 16777 | VPSHUFDZ128mikz = 16762, |
| 16778 | VPSHUFDZ128ri = 16763, |
| 16779 | VPSHUFDZ128rik = 16764, |
| 16780 | VPSHUFDZ128rikz = 16765, |
| 16781 | VPSHUFDZ256mbi = 16766, |
| 16782 | VPSHUFDZ256mbik = 16767, |
| 16783 | VPSHUFDZ256mbikz = 16768, |
| 16784 | VPSHUFDZ256mi = 16769, |
| 16785 | VPSHUFDZ256mik = 16770, |
| 16786 | VPSHUFDZ256mikz = 16771, |
| 16787 | VPSHUFDZ256ri = 16772, |
| 16788 | VPSHUFDZ256rik = 16773, |
| 16789 | VPSHUFDZ256rikz = 16774, |
| 16790 | VPSHUFDZmbi = 16775, |
| 16791 | VPSHUFDZmbik = 16776, |
| 16792 | VPSHUFDZmbikz = 16777, |
| 16793 | VPSHUFDZmi = 16778, |
| 16794 | VPSHUFDZmik = 16779, |
| 16795 | VPSHUFDZmikz = 16780, |
| 16796 | VPSHUFDZri = 16781, |
| 16797 | VPSHUFDZrik = 16782, |
| 16798 | VPSHUFDZrikz = 16783, |
| 16799 | VPSHUFDmi = 16784, |
| 16800 | VPSHUFDri = 16785, |
| 16801 | VPSHUFHWYmi = 16786, |
| 16802 | VPSHUFHWYri = 16787, |
| 16803 | VPSHUFHWZ128mi = 16788, |
| 16804 | VPSHUFHWZ128mik = 16789, |
| 16805 | VPSHUFHWZ128mikz = 16790, |
| 16806 | VPSHUFHWZ128ri = 16791, |
| 16807 | VPSHUFHWZ128rik = 16792, |
| 16808 | VPSHUFHWZ128rikz = 16793, |
| 16809 | VPSHUFHWZ256mi = 16794, |
| 16810 | VPSHUFHWZ256mik = 16795, |
| 16811 | VPSHUFHWZ256mikz = 16796, |
| 16812 | VPSHUFHWZ256ri = 16797, |
| 16813 | VPSHUFHWZ256rik = 16798, |
| 16814 | VPSHUFHWZ256rikz = 16799, |
| 16815 | VPSHUFHWZmi = 16800, |
| 16816 | VPSHUFHWZmik = 16801, |
| 16817 | VPSHUFHWZmikz = 16802, |
| 16818 | VPSHUFHWZri = 16803, |
| 16819 | VPSHUFHWZrik = 16804, |
| 16820 | VPSHUFHWZrikz = 16805, |
| 16821 | VPSHUFHWmi = 16806, |
| 16822 | VPSHUFHWri = 16807, |
| 16823 | VPSHUFLWYmi = 16808, |
| 16824 | VPSHUFLWYri = 16809, |
| 16825 | VPSHUFLWZ128mi = 16810, |
| 16826 | VPSHUFLWZ128mik = 16811, |
| 16827 | VPSHUFLWZ128mikz = 16812, |
| 16828 | VPSHUFLWZ128ri = 16813, |
| 16829 | VPSHUFLWZ128rik = 16814, |
| 16830 | VPSHUFLWZ128rikz = 16815, |
| 16831 | VPSHUFLWZ256mi = 16816, |
| 16832 | VPSHUFLWZ256mik = 16817, |
| 16833 | VPSHUFLWZ256mikz = 16818, |
| 16834 | VPSHUFLWZ256ri = 16819, |
| 16835 | VPSHUFLWZ256rik = 16820, |
| 16836 | VPSHUFLWZ256rikz = 16821, |
| 16837 | VPSHUFLWZmi = 16822, |
| 16838 | VPSHUFLWZmik = 16823, |
| 16839 | VPSHUFLWZmikz = 16824, |
| 16840 | VPSHUFLWZri = 16825, |
| 16841 | VPSHUFLWZrik = 16826, |
| 16842 | VPSHUFLWZrikz = 16827, |
| 16843 | VPSHUFLWmi = 16828, |
| 16844 | VPSHUFLWri = 16829, |
| 16845 | VPSIGNBYrm = 16830, |
| 16846 | VPSIGNBYrr = 16831, |
| 16847 | VPSIGNBrm = 16832, |
| 16848 | VPSIGNBrr = 16833, |
| 16849 | VPSIGNDYrm = 16834, |
| 16850 | VPSIGNDYrr = 16835, |
| 16851 | VPSIGNDrm = 16836, |
| 16852 | VPSIGNDrr = 16837, |
| 16853 | VPSIGNWYrm = 16838, |
| 16854 | VPSIGNWYrr = 16839, |
| 16855 | VPSIGNWrm = 16840, |
| 16856 | VPSIGNWrr = 16841, |
| 16857 | VPSLLDQYri = 16842, |
| 16858 | VPSLLDQZ128mi = 16843, |
| 16859 | VPSLLDQZ128ri = 16844, |
| 16860 | VPSLLDQZ256mi = 16845, |
| 16861 | VPSLLDQZ256ri = 16846, |
| 16862 | VPSLLDQZmi = 16847, |
| 16863 | VPSLLDQZri = 16848, |
| 16864 | VPSLLDQri = 16849, |
| 16865 | VPSLLDYri = 16850, |
| 16866 | VPSLLDYrm = 16851, |
| 16867 | VPSLLDYrr = 16852, |
| 16868 | VPSLLDZ128mbi = 16853, |
| 16869 | VPSLLDZ128mbik = 16854, |
| 16870 | VPSLLDZ128mbikz = 16855, |
| 16871 | VPSLLDZ128mi = 16856, |
| 16872 | VPSLLDZ128mik = 16857, |
| 16873 | VPSLLDZ128mikz = 16858, |
| 16874 | VPSLLDZ128ri = 16859, |
| 16875 | VPSLLDZ128rik = 16860, |
| 16876 | VPSLLDZ128rikz = 16861, |
| 16877 | VPSLLDZ128rm = 16862, |
| 16878 | VPSLLDZ128rmk = 16863, |
| 16879 | VPSLLDZ128rmkz = 16864, |
| 16880 | VPSLLDZ128rr = 16865, |
| 16881 | VPSLLDZ128rrk = 16866, |
| 16882 | VPSLLDZ128rrkz = 16867, |
| 16883 | VPSLLDZ256mbi = 16868, |
| 16884 | VPSLLDZ256mbik = 16869, |
| 16885 | VPSLLDZ256mbikz = 16870, |
| 16886 | VPSLLDZ256mi = 16871, |
| 16887 | VPSLLDZ256mik = 16872, |
| 16888 | VPSLLDZ256mikz = 16873, |
| 16889 | VPSLLDZ256ri = 16874, |
| 16890 | VPSLLDZ256rik = 16875, |
| 16891 | VPSLLDZ256rikz = 16876, |
| 16892 | VPSLLDZ256rm = 16877, |
| 16893 | VPSLLDZ256rmk = 16878, |
| 16894 | VPSLLDZ256rmkz = 16879, |
| 16895 | VPSLLDZ256rr = 16880, |
| 16896 | VPSLLDZ256rrk = 16881, |
| 16897 | VPSLLDZ256rrkz = 16882, |
| 16898 | VPSLLDZmbi = 16883, |
| 16899 | VPSLLDZmbik = 16884, |
| 16900 | VPSLLDZmbikz = 16885, |
| 16901 | VPSLLDZmi = 16886, |
| 16902 | VPSLLDZmik = 16887, |
| 16903 | VPSLLDZmikz = 16888, |
| 16904 | VPSLLDZri = 16889, |
| 16905 | VPSLLDZrik = 16890, |
| 16906 | VPSLLDZrikz = 16891, |
| 16907 | VPSLLDZrm = 16892, |
| 16908 | VPSLLDZrmk = 16893, |
| 16909 | VPSLLDZrmkz = 16894, |
| 16910 | VPSLLDZrr = 16895, |
| 16911 | VPSLLDZrrk = 16896, |
| 16912 | VPSLLDZrrkz = 16897, |
| 16913 | VPSLLDri = 16898, |
| 16914 | VPSLLDrm = 16899, |
| 16915 | VPSLLDrr = 16900, |
| 16916 | VPSLLQYri = 16901, |
| 16917 | VPSLLQYrm = 16902, |
| 16918 | VPSLLQYrr = 16903, |
| 16919 | VPSLLQZ128mbi = 16904, |
| 16920 | VPSLLQZ128mbik = 16905, |
| 16921 | VPSLLQZ128mbikz = 16906, |
| 16922 | VPSLLQZ128mi = 16907, |
| 16923 | VPSLLQZ128mik = 16908, |
| 16924 | VPSLLQZ128mikz = 16909, |
| 16925 | VPSLLQZ128ri = 16910, |
| 16926 | VPSLLQZ128rik = 16911, |
| 16927 | VPSLLQZ128rikz = 16912, |
| 16928 | VPSLLQZ128rm = 16913, |
| 16929 | VPSLLQZ128rmk = 16914, |
| 16930 | VPSLLQZ128rmkz = 16915, |
| 16931 | VPSLLQZ128rr = 16916, |
| 16932 | VPSLLQZ128rrk = 16917, |
| 16933 | VPSLLQZ128rrkz = 16918, |
| 16934 | VPSLLQZ256mbi = 16919, |
| 16935 | VPSLLQZ256mbik = 16920, |
| 16936 | VPSLLQZ256mbikz = 16921, |
| 16937 | VPSLLQZ256mi = 16922, |
| 16938 | VPSLLQZ256mik = 16923, |
| 16939 | VPSLLQZ256mikz = 16924, |
| 16940 | VPSLLQZ256ri = 16925, |
| 16941 | VPSLLQZ256rik = 16926, |
| 16942 | VPSLLQZ256rikz = 16927, |
| 16943 | VPSLLQZ256rm = 16928, |
| 16944 | VPSLLQZ256rmk = 16929, |
| 16945 | VPSLLQZ256rmkz = 16930, |
| 16946 | VPSLLQZ256rr = 16931, |
| 16947 | VPSLLQZ256rrk = 16932, |
| 16948 | VPSLLQZ256rrkz = 16933, |
| 16949 | VPSLLQZmbi = 16934, |
| 16950 | VPSLLQZmbik = 16935, |
| 16951 | VPSLLQZmbikz = 16936, |
| 16952 | VPSLLQZmi = 16937, |
| 16953 | VPSLLQZmik = 16938, |
| 16954 | VPSLLQZmikz = 16939, |
| 16955 | VPSLLQZri = 16940, |
| 16956 | VPSLLQZrik = 16941, |
| 16957 | VPSLLQZrikz = 16942, |
| 16958 | VPSLLQZrm = 16943, |
| 16959 | VPSLLQZrmk = 16944, |
| 16960 | VPSLLQZrmkz = 16945, |
| 16961 | VPSLLQZrr = 16946, |
| 16962 | VPSLLQZrrk = 16947, |
| 16963 | VPSLLQZrrkz = 16948, |
| 16964 | VPSLLQri = 16949, |
| 16965 | VPSLLQrm = 16950, |
| 16966 | VPSLLQrr = 16951, |
| 16967 | VPSLLVDYrm = 16952, |
| 16968 | VPSLLVDYrr = 16953, |
| 16969 | VPSLLVDZ128rm = 16954, |
| 16970 | VPSLLVDZ128rmb = 16955, |
| 16971 | VPSLLVDZ128rmbk = 16956, |
| 16972 | VPSLLVDZ128rmbkz = 16957, |
| 16973 | VPSLLVDZ128rmk = 16958, |
| 16974 | VPSLLVDZ128rmkz = 16959, |
| 16975 | VPSLLVDZ128rr = 16960, |
| 16976 | VPSLLVDZ128rrk = 16961, |
| 16977 | VPSLLVDZ128rrkz = 16962, |
| 16978 | VPSLLVDZ256rm = 16963, |
| 16979 | VPSLLVDZ256rmb = 16964, |
| 16980 | VPSLLVDZ256rmbk = 16965, |
| 16981 | VPSLLVDZ256rmbkz = 16966, |
| 16982 | VPSLLVDZ256rmk = 16967, |
| 16983 | VPSLLVDZ256rmkz = 16968, |
| 16984 | VPSLLVDZ256rr = 16969, |
| 16985 | VPSLLVDZ256rrk = 16970, |
| 16986 | VPSLLVDZ256rrkz = 16971, |
| 16987 | VPSLLVDZrm = 16972, |
| 16988 | VPSLLVDZrmb = 16973, |
| 16989 | VPSLLVDZrmbk = 16974, |
| 16990 | VPSLLVDZrmbkz = 16975, |
| 16991 | VPSLLVDZrmk = 16976, |
| 16992 | VPSLLVDZrmkz = 16977, |
| 16993 | VPSLLVDZrr = 16978, |
| 16994 | VPSLLVDZrrk = 16979, |
| 16995 | VPSLLVDZrrkz = 16980, |
| 16996 | VPSLLVDrm = 16981, |
| 16997 | VPSLLVDrr = 16982, |
| 16998 | VPSLLVQYrm = 16983, |
| 16999 | VPSLLVQYrr = 16984, |
| 17000 | VPSLLVQZ128rm = 16985, |
| 17001 | VPSLLVQZ128rmb = 16986, |
| 17002 | VPSLLVQZ128rmbk = 16987, |
| 17003 | VPSLLVQZ128rmbkz = 16988, |
| 17004 | VPSLLVQZ128rmk = 16989, |
| 17005 | VPSLLVQZ128rmkz = 16990, |
| 17006 | VPSLLVQZ128rr = 16991, |
| 17007 | VPSLLVQZ128rrk = 16992, |
| 17008 | VPSLLVQZ128rrkz = 16993, |
| 17009 | VPSLLVQZ256rm = 16994, |
| 17010 | VPSLLVQZ256rmb = 16995, |
| 17011 | VPSLLVQZ256rmbk = 16996, |
| 17012 | VPSLLVQZ256rmbkz = 16997, |
| 17013 | VPSLLVQZ256rmk = 16998, |
| 17014 | VPSLLVQZ256rmkz = 16999, |
| 17015 | VPSLLVQZ256rr = 17000, |
| 17016 | VPSLLVQZ256rrk = 17001, |
| 17017 | VPSLLVQZ256rrkz = 17002, |
| 17018 | VPSLLVQZrm = 17003, |
| 17019 | VPSLLVQZrmb = 17004, |
| 17020 | VPSLLVQZrmbk = 17005, |
| 17021 | VPSLLVQZrmbkz = 17006, |
| 17022 | VPSLLVQZrmk = 17007, |
| 17023 | VPSLLVQZrmkz = 17008, |
| 17024 | VPSLLVQZrr = 17009, |
| 17025 | VPSLLVQZrrk = 17010, |
| 17026 | VPSLLVQZrrkz = 17011, |
| 17027 | VPSLLVQrm = 17012, |
| 17028 | VPSLLVQrr = 17013, |
| 17029 | VPSLLVWZ128rm = 17014, |
| 17030 | VPSLLVWZ128rmk = 17015, |
| 17031 | VPSLLVWZ128rmkz = 17016, |
| 17032 | VPSLLVWZ128rr = 17017, |
| 17033 | VPSLLVWZ128rrk = 17018, |
| 17034 | VPSLLVWZ128rrkz = 17019, |
| 17035 | VPSLLVWZ256rm = 17020, |
| 17036 | VPSLLVWZ256rmk = 17021, |
| 17037 | VPSLLVWZ256rmkz = 17022, |
| 17038 | VPSLLVWZ256rr = 17023, |
| 17039 | VPSLLVWZ256rrk = 17024, |
| 17040 | VPSLLVWZ256rrkz = 17025, |
| 17041 | VPSLLVWZrm = 17026, |
| 17042 | VPSLLVWZrmk = 17027, |
| 17043 | VPSLLVWZrmkz = 17028, |
| 17044 | VPSLLVWZrr = 17029, |
| 17045 | VPSLLVWZrrk = 17030, |
| 17046 | VPSLLVWZrrkz = 17031, |
| 17047 | VPSLLWYri = 17032, |
| 17048 | VPSLLWYrm = 17033, |
| 17049 | VPSLLWYrr = 17034, |
| 17050 | VPSLLWZ128mi = 17035, |
| 17051 | VPSLLWZ128mik = 17036, |
| 17052 | VPSLLWZ128mikz = 17037, |
| 17053 | VPSLLWZ128ri = 17038, |
| 17054 | VPSLLWZ128rik = 17039, |
| 17055 | VPSLLWZ128rikz = 17040, |
| 17056 | VPSLLWZ128rm = 17041, |
| 17057 | VPSLLWZ128rmk = 17042, |
| 17058 | VPSLLWZ128rmkz = 17043, |
| 17059 | VPSLLWZ128rr = 17044, |
| 17060 | VPSLLWZ128rrk = 17045, |
| 17061 | VPSLLWZ128rrkz = 17046, |
| 17062 | VPSLLWZ256mi = 17047, |
| 17063 | VPSLLWZ256mik = 17048, |
| 17064 | VPSLLWZ256mikz = 17049, |
| 17065 | VPSLLWZ256ri = 17050, |
| 17066 | VPSLLWZ256rik = 17051, |
| 17067 | VPSLLWZ256rikz = 17052, |
| 17068 | VPSLLWZ256rm = 17053, |
| 17069 | VPSLLWZ256rmk = 17054, |
| 17070 | VPSLLWZ256rmkz = 17055, |
| 17071 | VPSLLWZ256rr = 17056, |
| 17072 | VPSLLWZ256rrk = 17057, |
| 17073 | VPSLLWZ256rrkz = 17058, |
| 17074 | VPSLLWZmi = 17059, |
| 17075 | VPSLLWZmik = 17060, |
| 17076 | VPSLLWZmikz = 17061, |
| 17077 | VPSLLWZri = 17062, |
| 17078 | VPSLLWZrik = 17063, |
| 17079 | VPSLLWZrikz = 17064, |
| 17080 | VPSLLWZrm = 17065, |
| 17081 | VPSLLWZrmk = 17066, |
| 17082 | VPSLLWZrmkz = 17067, |
| 17083 | VPSLLWZrr = 17068, |
| 17084 | VPSLLWZrrk = 17069, |
| 17085 | VPSLLWZrrkz = 17070, |
| 17086 | VPSLLWri = 17071, |
| 17087 | VPSLLWrm = 17072, |
| 17088 | VPSLLWrr = 17073, |
| 17089 | VPSRADYri = 17074, |
| 17090 | VPSRADYrm = 17075, |
| 17091 | VPSRADYrr = 17076, |
| 17092 | VPSRADZ128mbi = 17077, |
| 17093 | VPSRADZ128mbik = 17078, |
| 17094 | VPSRADZ128mbikz = 17079, |
| 17095 | VPSRADZ128mi = 17080, |
| 17096 | VPSRADZ128mik = 17081, |
| 17097 | VPSRADZ128mikz = 17082, |
| 17098 | VPSRADZ128ri = 17083, |
| 17099 | VPSRADZ128rik = 17084, |
| 17100 | VPSRADZ128rikz = 17085, |
| 17101 | VPSRADZ128rm = 17086, |
| 17102 | VPSRADZ128rmk = 17087, |
| 17103 | VPSRADZ128rmkz = 17088, |
| 17104 | VPSRADZ128rr = 17089, |
| 17105 | VPSRADZ128rrk = 17090, |
| 17106 | VPSRADZ128rrkz = 17091, |
| 17107 | VPSRADZ256mbi = 17092, |
| 17108 | VPSRADZ256mbik = 17093, |
| 17109 | VPSRADZ256mbikz = 17094, |
| 17110 | VPSRADZ256mi = 17095, |
| 17111 | VPSRADZ256mik = 17096, |
| 17112 | VPSRADZ256mikz = 17097, |
| 17113 | VPSRADZ256ri = 17098, |
| 17114 | VPSRADZ256rik = 17099, |
| 17115 | VPSRADZ256rikz = 17100, |
| 17116 | VPSRADZ256rm = 17101, |
| 17117 | VPSRADZ256rmk = 17102, |
| 17118 | VPSRADZ256rmkz = 17103, |
| 17119 | VPSRADZ256rr = 17104, |
| 17120 | VPSRADZ256rrk = 17105, |
| 17121 | VPSRADZ256rrkz = 17106, |
| 17122 | VPSRADZmbi = 17107, |
| 17123 | VPSRADZmbik = 17108, |
| 17124 | VPSRADZmbikz = 17109, |
| 17125 | VPSRADZmi = 17110, |
| 17126 | VPSRADZmik = 17111, |
| 17127 | VPSRADZmikz = 17112, |
| 17128 | VPSRADZri = 17113, |
| 17129 | VPSRADZrik = 17114, |
| 17130 | VPSRADZrikz = 17115, |
| 17131 | VPSRADZrm = 17116, |
| 17132 | VPSRADZrmk = 17117, |
| 17133 | VPSRADZrmkz = 17118, |
| 17134 | VPSRADZrr = 17119, |
| 17135 | VPSRADZrrk = 17120, |
| 17136 | VPSRADZrrkz = 17121, |
| 17137 | VPSRADri = 17122, |
| 17138 | VPSRADrm = 17123, |
| 17139 | VPSRADrr = 17124, |
| 17140 | VPSRAQZ128mbi = 17125, |
| 17141 | VPSRAQZ128mbik = 17126, |
| 17142 | VPSRAQZ128mbikz = 17127, |
| 17143 | VPSRAQZ128mi = 17128, |
| 17144 | VPSRAQZ128mik = 17129, |
| 17145 | VPSRAQZ128mikz = 17130, |
| 17146 | VPSRAQZ128ri = 17131, |
| 17147 | VPSRAQZ128rik = 17132, |
| 17148 | VPSRAQZ128rikz = 17133, |
| 17149 | VPSRAQZ128rm = 17134, |
| 17150 | VPSRAQZ128rmk = 17135, |
| 17151 | VPSRAQZ128rmkz = 17136, |
| 17152 | VPSRAQZ128rr = 17137, |
| 17153 | VPSRAQZ128rrk = 17138, |
| 17154 | VPSRAQZ128rrkz = 17139, |
| 17155 | VPSRAQZ256mbi = 17140, |
| 17156 | VPSRAQZ256mbik = 17141, |
| 17157 | VPSRAQZ256mbikz = 17142, |
| 17158 | VPSRAQZ256mi = 17143, |
| 17159 | VPSRAQZ256mik = 17144, |
| 17160 | VPSRAQZ256mikz = 17145, |
| 17161 | VPSRAQZ256ri = 17146, |
| 17162 | VPSRAQZ256rik = 17147, |
| 17163 | VPSRAQZ256rikz = 17148, |
| 17164 | VPSRAQZ256rm = 17149, |
| 17165 | VPSRAQZ256rmk = 17150, |
| 17166 | VPSRAQZ256rmkz = 17151, |
| 17167 | VPSRAQZ256rr = 17152, |
| 17168 | VPSRAQZ256rrk = 17153, |
| 17169 | VPSRAQZ256rrkz = 17154, |
| 17170 | VPSRAQZmbi = 17155, |
| 17171 | VPSRAQZmbik = 17156, |
| 17172 | VPSRAQZmbikz = 17157, |
| 17173 | VPSRAQZmi = 17158, |
| 17174 | VPSRAQZmik = 17159, |
| 17175 | VPSRAQZmikz = 17160, |
| 17176 | VPSRAQZri = 17161, |
| 17177 | VPSRAQZrik = 17162, |
| 17178 | VPSRAQZrikz = 17163, |
| 17179 | VPSRAQZrm = 17164, |
| 17180 | VPSRAQZrmk = 17165, |
| 17181 | VPSRAQZrmkz = 17166, |
| 17182 | VPSRAQZrr = 17167, |
| 17183 | VPSRAQZrrk = 17168, |
| 17184 | VPSRAQZrrkz = 17169, |
| 17185 | VPSRAVDYrm = 17170, |
| 17186 | VPSRAVDYrr = 17171, |
| 17187 | VPSRAVDZ128rm = 17172, |
| 17188 | VPSRAVDZ128rmb = 17173, |
| 17189 | VPSRAVDZ128rmbk = 17174, |
| 17190 | VPSRAVDZ128rmbkz = 17175, |
| 17191 | VPSRAVDZ128rmk = 17176, |
| 17192 | VPSRAVDZ128rmkz = 17177, |
| 17193 | VPSRAVDZ128rr = 17178, |
| 17194 | VPSRAVDZ128rrk = 17179, |
| 17195 | VPSRAVDZ128rrkz = 17180, |
| 17196 | VPSRAVDZ256rm = 17181, |
| 17197 | VPSRAVDZ256rmb = 17182, |
| 17198 | VPSRAVDZ256rmbk = 17183, |
| 17199 | VPSRAVDZ256rmbkz = 17184, |
| 17200 | VPSRAVDZ256rmk = 17185, |
| 17201 | VPSRAVDZ256rmkz = 17186, |
| 17202 | VPSRAVDZ256rr = 17187, |
| 17203 | VPSRAVDZ256rrk = 17188, |
| 17204 | VPSRAVDZ256rrkz = 17189, |
| 17205 | VPSRAVDZrm = 17190, |
| 17206 | VPSRAVDZrmb = 17191, |
| 17207 | VPSRAVDZrmbk = 17192, |
| 17208 | VPSRAVDZrmbkz = 17193, |
| 17209 | VPSRAVDZrmk = 17194, |
| 17210 | VPSRAVDZrmkz = 17195, |
| 17211 | VPSRAVDZrr = 17196, |
| 17212 | VPSRAVDZrrk = 17197, |
| 17213 | VPSRAVDZrrkz = 17198, |
| 17214 | VPSRAVDrm = 17199, |
| 17215 | VPSRAVDrr = 17200, |
| 17216 | VPSRAVQZ128rm = 17201, |
| 17217 | VPSRAVQZ128rmb = 17202, |
| 17218 | VPSRAVQZ128rmbk = 17203, |
| 17219 | VPSRAVQZ128rmbkz = 17204, |
| 17220 | VPSRAVQZ128rmk = 17205, |
| 17221 | VPSRAVQZ128rmkz = 17206, |
| 17222 | VPSRAVQZ128rr = 17207, |
| 17223 | VPSRAVQZ128rrk = 17208, |
| 17224 | VPSRAVQZ128rrkz = 17209, |
| 17225 | VPSRAVQZ256rm = 17210, |
| 17226 | VPSRAVQZ256rmb = 17211, |
| 17227 | VPSRAVQZ256rmbk = 17212, |
| 17228 | VPSRAVQZ256rmbkz = 17213, |
| 17229 | VPSRAVQZ256rmk = 17214, |
| 17230 | VPSRAVQZ256rmkz = 17215, |
| 17231 | VPSRAVQZ256rr = 17216, |
| 17232 | VPSRAVQZ256rrk = 17217, |
| 17233 | VPSRAVQZ256rrkz = 17218, |
| 17234 | VPSRAVQZrm = 17219, |
| 17235 | VPSRAVQZrmb = 17220, |
| 17236 | VPSRAVQZrmbk = 17221, |
| 17237 | VPSRAVQZrmbkz = 17222, |
| 17238 | VPSRAVQZrmk = 17223, |
| 17239 | VPSRAVQZrmkz = 17224, |
| 17240 | VPSRAVQZrr = 17225, |
| 17241 | VPSRAVQZrrk = 17226, |
| 17242 | VPSRAVQZrrkz = 17227, |
| 17243 | VPSRAVWZ128rm = 17228, |
| 17244 | VPSRAVWZ128rmk = 17229, |
| 17245 | VPSRAVWZ128rmkz = 17230, |
| 17246 | VPSRAVWZ128rr = 17231, |
| 17247 | VPSRAVWZ128rrk = 17232, |
| 17248 | VPSRAVWZ128rrkz = 17233, |
| 17249 | VPSRAVWZ256rm = 17234, |
| 17250 | VPSRAVWZ256rmk = 17235, |
| 17251 | VPSRAVWZ256rmkz = 17236, |
| 17252 | VPSRAVWZ256rr = 17237, |
| 17253 | VPSRAVWZ256rrk = 17238, |
| 17254 | VPSRAVWZ256rrkz = 17239, |
| 17255 | VPSRAVWZrm = 17240, |
| 17256 | VPSRAVWZrmk = 17241, |
| 17257 | VPSRAVWZrmkz = 17242, |
| 17258 | VPSRAVWZrr = 17243, |
| 17259 | VPSRAVWZrrk = 17244, |
| 17260 | VPSRAVWZrrkz = 17245, |
| 17261 | VPSRAWYri = 17246, |
| 17262 | VPSRAWYrm = 17247, |
| 17263 | VPSRAWYrr = 17248, |
| 17264 | VPSRAWZ128mi = 17249, |
| 17265 | VPSRAWZ128mik = 17250, |
| 17266 | VPSRAWZ128mikz = 17251, |
| 17267 | VPSRAWZ128ri = 17252, |
| 17268 | VPSRAWZ128rik = 17253, |
| 17269 | VPSRAWZ128rikz = 17254, |
| 17270 | VPSRAWZ128rm = 17255, |
| 17271 | VPSRAWZ128rmk = 17256, |
| 17272 | VPSRAWZ128rmkz = 17257, |
| 17273 | VPSRAWZ128rr = 17258, |
| 17274 | VPSRAWZ128rrk = 17259, |
| 17275 | VPSRAWZ128rrkz = 17260, |
| 17276 | VPSRAWZ256mi = 17261, |
| 17277 | VPSRAWZ256mik = 17262, |
| 17278 | VPSRAWZ256mikz = 17263, |
| 17279 | VPSRAWZ256ri = 17264, |
| 17280 | VPSRAWZ256rik = 17265, |
| 17281 | VPSRAWZ256rikz = 17266, |
| 17282 | VPSRAWZ256rm = 17267, |
| 17283 | VPSRAWZ256rmk = 17268, |
| 17284 | VPSRAWZ256rmkz = 17269, |
| 17285 | VPSRAWZ256rr = 17270, |
| 17286 | VPSRAWZ256rrk = 17271, |
| 17287 | VPSRAWZ256rrkz = 17272, |
| 17288 | VPSRAWZmi = 17273, |
| 17289 | VPSRAWZmik = 17274, |
| 17290 | VPSRAWZmikz = 17275, |
| 17291 | VPSRAWZri = 17276, |
| 17292 | VPSRAWZrik = 17277, |
| 17293 | VPSRAWZrikz = 17278, |
| 17294 | VPSRAWZrm = 17279, |
| 17295 | VPSRAWZrmk = 17280, |
| 17296 | VPSRAWZrmkz = 17281, |
| 17297 | VPSRAWZrr = 17282, |
| 17298 | VPSRAWZrrk = 17283, |
| 17299 | VPSRAWZrrkz = 17284, |
| 17300 | VPSRAWri = 17285, |
| 17301 | VPSRAWrm = 17286, |
| 17302 | VPSRAWrr = 17287, |
| 17303 | VPSRLDQYri = 17288, |
| 17304 | VPSRLDQZ128mi = 17289, |
| 17305 | VPSRLDQZ128ri = 17290, |
| 17306 | VPSRLDQZ256mi = 17291, |
| 17307 | VPSRLDQZ256ri = 17292, |
| 17308 | VPSRLDQZmi = 17293, |
| 17309 | VPSRLDQZri = 17294, |
| 17310 | VPSRLDQri = 17295, |
| 17311 | VPSRLDYri = 17296, |
| 17312 | VPSRLDYrm = 17297, |
| 17313 | VPSRLDYrr = 17298, |
| 17314 | VPSRLDZ128mbi = 17299, |
| 17315 | VPSRLDZ128mbik = 17300, |
| 17316 | VPSRLDZ128mbikz = 17301, |
| 17317 | VPSRLDZ128mi = 17302, |
| 17318 | VPSRLDZ128mik = 17303, |
| 17319 | VPSRLDZ128mikz = 17304, |
| 17320 | VPSRLDZ128ri = 17305, |
| 17321 | VPSRLDZ128rik = 17306, |
| 17322 | VPSRLDZ128rikz = 17307, |
| 17323 | VPSRLDZ128rm = 17308, |
| 17324 | VPSRLDZ128rmk = 17309, |
| 17325 | VPSRLDZ128rmkz = 17310, |
| 17326 | VPSRLDZ128rr = 17311, |
| 17327 | VPSRLDZ128rrk = 17312, |
| 17328 | VPSRLDZ128rrkz = 17313, |
| 17329 | VPSRLDZ256mbi = 17314, |
| 17330 | VPSRLDZ256mbik = 17315, |
| 17331 | VPSRLDZ256mbikz = 17316, |
| 17332 | VPSRLDZ256mi = 17317, |
| 17333 | VPSRLDZ256mik = 17318, |
| 17334 | VPSRLDZ256mikz = 17319, |
| 17335 | VPSRLDZ256ri = 17320, |
| 17336 | VPSRLDZ256rik = 17321, |
| 17337 | VPSRLDZ256rikz = 17322, |
| 17338 | VPSRLDZ256rm = 17323, |
| 17339 | VPSRLDZ256rmk = 17324, |
| 17340 | VPSRLDZ256rmkz = 17325, |
| 17341 | VPSRLDZ256rr = 17326, |
| 17342 | VPSRLDZ256rrk = 17327, |
| 17343 | VPSRLDZ256rrkz = 17328, |
| 17344 | VPSRLDZmbi = 17329, |
| 17345 | VPSRLDZmbik = 17330, |
| 17346 | VPSRLDZmbikz = 17331, |
| 17347 | VPSRLDZmi = 17332, |
| 17348 | VPSRLDZmik = 17333, |
| 17349 | VPSRLDZmikz = 17334, |
| 17350 | VPSRLDZri = 17335, |
| 17351 | VPSRLDZrik = 17336, |
| 17352 | VPSRLDZrikz = 17337, |
| 17353 | VPSRLDZrm = 17338, |
| 17354 | VPSRLDZrmk = 17339, |
| 17355 | VPSRLDZrmkz = 17340, |
| 17356 | VPSRLDZrr = 17341, |
| 17357 | VPSRLDZrrk = 17342, |
| 17358 | VPSRLDZrrkz = 17343, |
| 17359 | VPSRLDri = 17344, |
| 17360 | VPSRLDrm = 17345, |
| 17361 | VPSRLDrr = 17346, |
| 17362 | VPSRLQYri = 17347, |
| 17363 | VPSRLQYrm = 17348, |
| 17364 | VPSRLQYrr = 17349, |
| 17365 | VPSRLQZ128mbi = 17350, |
| 17366 | VPSRLQZ128mbik = 17351, |
| 17367 | VPSRLQZ128mbikz = 17352, |
| 17368 | VPSRLQZ128mi = 17353, |
| 17369 | VPSRLQZ128mik = 17354, |
| 17370 | VPSRLQZ128mikz = 17355, |
| 17371 | VPSRLQZ128ri = 17356, |
| 17372 | VPSRLQZ128rik = 17357, |
| 17373 | VPSRLQZ128rikz = 17358, |
| 17374 | VPSRLQZ128rm = 17359, |
| 17375 | VPSRLQZ128rmk = 17360, |
| 17376 | VPSRLQZ128rmkz = 17361, |
| 17377 | VPSRLQZ128rr = 17362, |
| 17378 | VPSRLQZ128rrk = 17363, |
| 17379 | VPSRLQZ128rrkz = 17364, |
| 17380 | VPSRLQZ256mbi = 17365, |
| 17381 | VPSRLQZ256mbik = 17366, |
| 17382 | VPSRLQZ256mbikz = 17367, |
| 17383 | VPSRLQZ256mi = 17368, |
| 17384 | VPSRLQZ256mik = 17369, |
| 17385 | VPSRLQZ256mikz = 17370, |
| 17386 | VPSRLQZ256ri = 17371, |
| 17387 | VPSRLQZ256rik = 17372, |
| 17388 | VPSRLQZ256rikz = 17373, |
| 17389 | VPSRLQZ256rm = 17374, |
| 17390 | VPSRLQZ256rmk = 17375, |
| 17391 | VPSRLQZ256rmkz = 17376, |
| 17392 | VPSRLQZ256rr = 17377, |
| 17393 | VPSRLQZ256rrk = 17378, |
| 17394 | VPSRLQZ256rrkz = 17379, |
| 17395 | VPSRLQZmbi = 17380, |
| 17396 | VPSRLQZmbik = 17381, |
| 17397 | VPSRLQZmbikz = 17382, |
| 17398 | VPSRLQZmi = 17383, |
| 17399 | VPSRLQZmik = 17384, |
| 17400 | VPSRLQZmikz = 17385, |
| 17401 | VPSRLQZri = 17386, |
| 17402 | VPSRLQZrik = 17387, |
| 17403 | VPSRLQZrikz = 17388, |
| 17404 | VPSRLQZrm = 17389, |
| 17405 | VPSRLQZrmk = 17390, |
| 17406 | VPSRLQZrmkz = 17391, |
| 17407 | VPSRLQZrr = 17392, |
| 17408 | VPSRLQZrrk = 17393, |
| 17409 | VPSRLQZrrkz = 17394, |
| 17410 | VPSRLQri = 17395, |
| 17411 | VPSRLQrm = 17396, |
| 17412 | VPSRLQrr = 17397, |
| 17413 | VPSRLVDYrm = 17398, |
| 17414 | VPSRLVDYrr = 17399, |
| 17415 | VPSRLVDZ128rm = 17400, |
| 17416 | VPSRLVDZ128rmb = 17401, |
| 17417 | VPSRLVDZ128rmbk = 17402, |
| 17418 | VPSRLVDZ128rmbkz = 17403, |
| 17419 | VPSRLVDZ128rmk = 17404, |
| 17420 | VPSRLVDZ128rmkz = 17405, |
| 17421 | VPSRLVDZ128rr = 17406, |
| 17422 | VPSRLVDZ128rrk = 17407, |
| 17423 | VPSRLVDZ128rrkz = 17408, |
| 17424 | VPSRLVDZ256rm = 17409, |
| 17425 | VPSRLVDZ256rmb = 17410, |
| 17426 | VPSRLVDZ256rmbk = 17411, |
| 17427 | VPSRLVDZ256rmbkz = 17412, |
| 17428 | VPSRLVDZ256rmk = 17413, |
| 17429 | VPSRLVDZ256rmkz = 17414, |
| 17430 | VPSRLVDZ256rr = 17415, |
| 17431 | VPSRLVDZ256rrk = 17416, |
| 17432 | VPSRLVDZ256rrkz = 17417, |
| 17433 | VPSRLVDZrm = 17418, |
| 17434 | VPSRLVDZrmb = 17419, |
| 17435 | VPSRLVDZrmbk = 17420, |
| 17436 | VPSRLVDZrmbkz = 17421, |
| 17437 | VPSRLVDZrmk = 17422, |
| 17438 | VPSRLVDZrmkz = 17423, |
| 17439 | VPSRLVDZrr = 17424, |
| 17440 | VPSRLVDZrrk = 17425, |
| 17441 | VPSRLVDZrrkz = 17426, |
| 17442 | VPSRLVDrm = 17427, |
| 17443 | VPSRLVDrr = 17428, |
| 17444 | VPSRLVQYrm = 17429, |
| 17445 | VPSRLVQYrr = 17430, |
| 17446 | VPSRLVQZ128rm = 17431, |
| 17447 | VPSRLVQZ128rmb = 17432, |
| 17448 | VPSRLVQZ128rmbk = 17433, |
| 17449 | VPSRLVQZ128rmbkz = 17434, |
| 17450 | VPSRLVQZ128rmk = 17435, |
| 17451 | VPSRLVQZ128rmkz = 17436, |
| 17452 | VPSRLVQZ128rr = 17437, |
| 17453 | VPSRLVQZ128rrk = 17438, |
| 17454 | VPSRLVQZ128rrkz = 17439, |
| 17455 | VPSRLVQZ256rm = 17440, |
| 17456 | VPSRLVQZ256rmb = 17441, |
| 17457 | VPSRLVQZ256rmbk = 17442, |
| 17458 | VPSRLVQZ256rmbkz = 17443, |
| 17459 | VPSRLVQZ256rmk = 17444, |
| 17460 | VPSRLVQZ256rmkz = 17445, |
| 17461 | VPSRLVQZ256rr = 17446, |
| 17462 | VPSRLVQZ256rrk = 17447, |
| 17463 | VPSRLVQZ256rrkz = 17448, |
| 17464 | VPSRLVQZrm = 17449, |
| 17465 | VPSRLVQZrmb = 17450, |
| 17466 | VPSRLVQZrmbk = 17451, |
| 17467 | VPSRLVQZrmbkz = 17452, |
| 17468 | VPSRLVQZrmk = 17453, |
| 17469 | VPSRLVQZrmkz = 17454, |
| 17470 | VPSRLVQZrr = 17455, |
| 17471 | VPSRLVQZrrk = 17456, |
| 17472 | VPSRLVQZrrkz = 17457, |
| 17473 | VPSRLVQrm = 17458, |
| 17474 | VPSRLVQrr = 17459, |
| 17475 | VPSRLVWZ128rm = 17460, |
| 17476 | VPSRLVWZ128rmk = 17461, |
| 17477 | VPSRLVWZ128rmkz = 17462, |
| 17478 | VPSRLVWZ128rr = 17463, |
| 17479 | VPSRLVWZ128rrk = 17464, |
| 17480 | VPSRLVWZ128rrkz = 17465, |
| 17481 | VPSRLVWZ256rm = 17466, |
| 17482 | VPSRLVWZ256rmk = 17467, |
| 17483 | VPSRLVWZ256rmkz = 17468, |
| 17484 | VPSRLVWZ256rr = 17469, |
| 17485 | VPSRLVWZ256rrk = 17470, |
| 17486 | VPSRLVWZ256rrkz = 17471, |
| 17487 | VPSRLVWZrm = 17472, |
| 17488 | VPSRLVWZrmk = 17473, |
| 17489 | VPSRLVWZrmkz = 17474, |
| 17490 | VPSRLVWZrr = 17475, |
| 17491 | VPSRLVWZrrk = 17476, |
| 17492 | VPSRLVWZrrkz = 17477, |
| 17493 | VPSRLWYri = 17478, |
| 17494 | VPSRLWYrm = 17479, |
| 17495 | VPSRLWYrr = 17480, |
| 17496 | VPSRLWZ128mi = 17481, |
| 17497 | VPSRLWZ128mik = 17482, |
| 17498 | VPSRLWZ128mikz = 17483, |
| 17499 | VPSRLWZ128ri = 17484, |
| 17500 | VPSRLWZ128rik = 17485, |
| 17501 | VPSRLWZ128rikz = 17486, |
| 17502 | VPSRLWZ128rm = 17487, |
| 17503 | VPSRLWZ128rmk = 17488, |
| 17504 | VPSRLWZ128rmkz = 17489, |
| 17505 | VPSRLWZ128rr = 17490, |
| 17506 | VPSRLWZ128rrk = 17491, |
| 17507 | VPSRLWZ128rrkz = 17492, |
| 17508 | VPSRLWZ256mi = 17493, |
| 17509 | VPSRLWZ256mik = 17494, |
| 17510 | VPSRLWZ256mikz = 17495, |
| 17511 | VPSRLWZ256ri = 17496, |
| 17512 | VPSRLWZ256rik = 17497, |
| 17513 | VPSRLWZ256rikz = 17498, |
| 17514 | VPSRLWZ256rm = 17499, |
| 17515 | VPSRLWZ256rmk = 17500, |
| 17516 | VPSRLWZ256rmkz = 17501, |
| 17517 | VPSRLWZ256rr = 17502, |
| 17518 | VPSRLWZ256rrk = 17503, |
| 17519 | VPSRLWZ256rrkz = 17504, |
| 17520 | VPSRLWZmi = 17505, |
| 17521 | VPSRLWZmik = 17506, |
| 17522 | VPSRLWZmikz = 17507, |
| 17523 | VPSRLWZri = 17508, |
| 17524 | VPSRLWZrik = 17509, |
| 17525 | VPSRLWZrikz = 17510, |
| 17526 | VPSRLWZrm = 17511, |
| 17527 | VPSRLWZrmk = 17512, |
| 17528 | VPSRLWZrmkz = 17513, |
| 17529 | VPSRLWZrr = 17514, |
| 17530 | VPSRLWZrrk = 17515, |
| 17531 | VPSRLWZrrkz = 17516, |
| 17532 | VPSRLWri = 17517, |
| 17533 | VPSRLWrm = 17518, |
| 17534 | VPSRLWrr = 17519, |
| 17535 | VPSUBBYrm = 17520, |
| 17536 | VPSUBBYrr = 17521, |
| 17537 | VPSUBBZ128rm = 17522, |
| 17538 | VPSUBBZ128rmk = 17523, |
| 17539 | VPSUBBZ128rmkz = 17524, |
| 17540 | VPSUBBZ128rr = 17525, |
| 17541 | VPSUBBZ128rrk = 17526, |
| 17542 | VPSUBBZ128rrkz = 17527, |
| 17543 | VPSUBBZ256rm = 17528, |
| 17544 | VPSUBBZ256rmk = 17529, |
| 17545 | VPSUBBZ256rmkz = 17530, |
| 17546 | VPSUBBZ256rr = 17531, |
| 17547 | VPSUBBZ256rrk = 17532, |
| 17548 | VPSUBBZ256rrkz = 17533, |
| 17549 | VPSUBBZrm = 17534, |
| 17550 | VPSUBBZrmk = 17535, |
| 17551 | VPSUBBZrmkz = 17536, |
| 17552 | VPSUBBZrr = 17537, |
| 17553 | VPSUBBZrrk = 17538, |
| 17554 | VPSUBBZrrkz = 17539, |
| 17555 | VPSUBBrm = 17540, |
| 17556 | VPSUBBrr = 17541, |
| 17557 | VPSUBDYrm = 17542, |
| 17558 | VPSUBDYrr = 17543, |
| 17559 | VPSUBDZ128rm = 17544, |
| 17560 | VPSUBDZ128rmb = 17545, |
| 17561 | VPSUBDZ128rmbk = 17546, |
| 17562 | VPSUBDZ128rmbkz = 17547, |
| 17563 | VPSUBDZ128rmk = 17548, |
| 17564 | VPSUBDZ128rmkz = 17549, |
| 17565 | VPSUBDZ128rr = 17550, |
| 17566 | VPSUBDZ128rrk = 17551, |
| 17567 | VPSUBDZ128rrkz = 17552, |
| 17568 | VPSUBDZ256rm = 17553, |
| 17569 | VPSUBDZ256rmb = 17554, |
| 17570 | VPSUBDZ256rmbk = 17555, |
| 17571 | VPSUBDZ256rmbkz = 17556, |
| 17572 | VPSUBDZ256rmk = 17557, |
| 17573 | VPSUBDZ256rmkz = 17558, |
| 17574 | VPSUBDZ256rr = 17559, |
| 17575 | VPSUBDZ256rrk = 17560, |
| 17576 | VPSUBDZ256rrkz = 17561, |
| 17577 | VPSUBDZrm = 17562, |
| 17578 | VPSUBDZrmb = 17563, |
| 17579 | VPSUBDZrmbk = 17564, |
| 17580 | VPSUBDZrmbkz = 17565, |
| 17581 | VPSUBDZrmk = 17566, |
| 17582 | VPSUBDZrmkz = 17567, |
| 17583 | VPSUBDZrr = 17568, |
| 17584 | VPSUBDZrrk = 17569, |
| 17585 | VPSUBDZrrkz = 17570, |
| 17586 | VPSUBDrm = 17571, |
| 17587 | VPSUBDrr = 17572, |
| 17588 | VPSUBQYrm = 17573, |
| 17589 | VPSUBQYrr = 17574, |
| 17590 | VPSUBQZ128rm = 17575, |
| 17591 | VPSUBQZ128rmb = 17576, |
| 17592 | VPSUBQZ128rmbk = 17577, |
| 17593 | VPSUBQZ128rmbkz = 17578, |
| 17594 | VPSUBQZ128rmk = 17579, |
| 17595 | VPSUBQZ128rmkz = 17580, |
| 17596 | VPSUBQZ128rr = 17581, |
| 17597 | VPSUBQZ128rrk = 17582, |
| 17598 | VPSUBQZ128rrkz = 17583, |
| 17599 | VPSUBQZ256rm = 17584, |
| 17600 | VPSUBQZ256rmb = 17585, |
| 17601 | VPSUBQZ256rmbk = 17586, |
| 17602 | VPSUBQZ256rmbkz = 17587, |
| 17603 | VPSUBQZ256rmk = 17588, |
| 17604 | VPSUBQZ256rmkz = 17589, |
| 17605 | VPSUBQZ256rr = 17590, |
| 17606 | VPSUBQZ256rrk = 17591, |
| 17607 | VPSUBQZ256rrkz = 17592, |
| 17608 | VPSUBQZrm = 17593, |
| 17609 | VPSUBQZrmb = 17594, |
| 17610 | VPSUBQZrmbk = 17595, |
| 17611 | VPSUBQZrmbkz = 17596, |
| 17612 | VPSUBQZrmk = 17597, |
| 17613 | VPSUBQZrmkz = 17598, |
| 17614 | VPSUBQZrr = 17599, |
| 17615 | VPSUBQZrrk = 17600, |
| 17616 | VPSUBQZrrkz = 17601, |
| 17617 | VPSUBQrm = 17602, |
| 17618 | VPSUBQrr = 17603, |
| 17619 | VPSUBSBYrm = 17604, |
| 17620 | VPSUBSBYrr = 17605, |
| 17621 | VPSUBSBZ128rm = 17606, |
| 17622 | VPSUBSBZ128rmk = 17607, |
| 17623 | VPSUBSBZ128rmkz = 17608, |
| 17624 | VPSUBSBZ128rr = 17609, |
| 17625 | VPSUBSBZ128rrk = 17610, |
| 17626 | VPSUBSBZ128rrkz = 17611, |
| 17627 | VPSUBSBZ256rm = 17612, |
| 17628 | VPSUBSBZ256rmk = 17613, |
| 17629 | VPSUBSBZ256rmkz = 17614, |
| 17630 | VPSUBSBZ256rr = 17615, |
| 17631 | VPSUBSBZ256rrk = 17616, |
| 17632 | VPSUBSBZ256rrkz = 17617, |
| 17633 | VPSUBSBZrm = 17618, |
| 17634 | VPSUBSBZrmk = 17619, |
| 17635 | VPSUBSBZrmkz = 17620, |
| 17636 | VPSUBSBZrr = 17621, |
| 17637 | VPSUBSBZrrk = 17622, |
| 17638 | VPSUBSBZrrkz = 17623, |
| 17639 | VPSUBSBrm = 17624, |
| 17640 | VPSUBSBrr = 17625, |
| 17641 | VPSUBSWYrm = 17626, |
| 17642 | VPSUBSWYrr = 17627, |
| 17643 | VPSUBSWZ128rm = 17628, |
| 17644 | VPSUBSWZ128rmk = 17629, |
| 17645 | VPSUBSWZ128rmkz = 17630, |
| 17646 | VPSUBSWZ128rr = 17631, |
| 17647 | VPSUBSWZ128rrk = 17632, |
| 17648 | VPSUBSWZ128rrkz = 17633, |
| 17649 | VPSUBSWZ256rm = 17634, |
| 17650 | VPSUBSWZ256rmk = 17635, |
| 17651 | VPSUBSWZ256rmkz = 17636, |
| 17652 | VPSUBSWZ256rr = 17637, |
| 17653 | VPSUBSWZ256rrk = 17638, |
| 17654 | VPSUBSWZ256rrkz = 17639, |
| 17655 | VPSUBSWZrm = 17640, |
| 17656 | VPSUBSWZrmk = 17641, |
| 17657 | VPSUBSWZrmkz = 17642, |
| 17658 | VPSUBSWZrr = 17643, |
| 17659 | VPSUBSWZrrk = 17644, |
| 17660 | VPSUBSWZrrkz = 17645, |
| 17661 | VPSUBSWrm = 17646, |
| 17662 | VPSUBSWrr = 17647, |
| 17663 | VPSUBUSBYrm = 17648, |
| 17664 | VPSUBUSBYrr = 17649, |
| 17665 | VPSUBUSBZ128rm = 17650, |
| 17666 | VPSUBUSBZ128rmk = 17651, |
| 17667 | VPSUBUSBZ128rmkz = 17652, |
| 17668 | VPSUBUSBZ128rr = 17653, |
| 17669 | VPSUBUSBZ128rrk = 17654, |
| 17670 | VPSUBUSBZ128rrkz = 17655, |
| 17671 | VPSUBUSBZ256rm = 17656, |
| 17672 | VPSUBUSBZ256rmk = 17657, |
| 17673 | VPSUBUSBZ256rmkz = 17658, |
| 17674 | VPSUBUSBZ256rr = 17659, |
| 17675 | VPSUBUSBZ256rrk = 17660, |
| 17676 | VPSUBUSBZ256rrkz = 17661, |
| 17677 | VPSUBUSBZrm = 17662, |
| 17678 | VPSUBUSBZrmk = 17663, |
| 17679 | VPSUBUSBZrmkz = 17664, |
| 17680 | VPSUBUSBZrr = 17665, |
| 17681 | VPSUBUSBZrrk = 17666, |
| 17682 | VPSUBUSBZrrkz = 17667, |
| 17683 | VPSUBUSBrm = 17668, |
| 17684 | VPSUBUSBrr = 17669, |
| 17685 | VPSUBUSWYrm = 17670, |
| 17686 | VPSUBUSWYrr = 17671, |
| 17687 | VPSUBUSWZ128rm = 17672, |
| 17688 | VPSUBUSWZ128rmk = 17673, |
| 17689 | VPSUBUSWZ128rmkz = 17674, |
| 17690 | VPSUBUSWZ128rr = 17675, |
| 17691 | VPSUBUSWZ128rrk = 17676, |
| 17692 | VPSUBUSWZ128rrkz = 17677, |
| 17693 | VPSUBUSWZ256rm = 17678, |
| 17694 | VPSUBUSWZ256rmk = 17679, |
| 17695 | VPSUBUSWZ256rmkz = 17680, |
| 17696 | VPSUBUSWZ256rr = 17681, |
| 17697 | VPSUBUSWZ256rrk = 17682, |
| 17698 | VPSUBUSWZ256rrkz = 17683, |
| 17699 | VPSUBUSWZrm = 17684, |
| 17700 | VPSUBUSWZrmk = 17685, |
| 17701 | VPSUBUSWZrmkz = 17686, |
| 17702 | VPSUBUSWZrr = 17687, |
| 17703 | VPSUBUSWZrrk = 17688, |
| 17704 | VPSUBUSWZrrkz = 17689, |
| 17705 | VPSUBUSWrm = 17690, |
| 17706 | VPSUBUSWrr = 17691, |
| 17707 | VPSUBWYrm = 17692, |
| 17708 | VPSUBWYrr = 17693, |
| 17709 | VPSUBWZ128rm = 17694, |
| 17710 | VPSUBWZ128rmk = 17695, |
| 17711 | VPSUBWZ128rmkz = 17696, |
| 17712 | VPSUBWZ128rr = 17697, |
| 17713 | VPSUBWZ128rrk = 17698, |
| 17714 | VPSUBWZ128rrkz = 17699, |
| 17715 | VPSUBWZ256rm = 17700, |
| 17716 | VPSUBWZ256rmk = 17701, |
| 17717 | VPSUBWZ256rmkz = 17702, |
| 17718 | VPSUBWZ256rr = 17703, |
| 17719 | VPSUBWZ256rrk = 17704, |
| 17720 | VPSUBWZ256rrkz = 17705, |
| 17721 | VPSUBWZrm = 17706, |
| 17722 | VPSUBWZrmk = 17707, |
| 17723 | VPSUBWZrmkz = 17708, |
| 17724 | VPSUBWZrr = 17709, |
| 17725 | VPSUBWZrrk = 17710, |
| 17726 | VPSUBWZrrkz = 17711, |
| 17727 | VPSUBWrm = 17712, |
| 17728 | VPSUBWrr = 17713, |
| 17729 | VPTERNLOGDZ128rmbi = 17714, |
| 17730 | VPTERNLOGDZ128rmbik = 17715, |
| 17731 | VPTERNLOGDZ128rmbikz = 17716, |
| 17732 | VPTERNLOGDZ128rmi = 17717, |
| 17733 | VPTERNLOGDZ128rmik = 17718, |
| 17734 | VPTERNLOGDZ128rmikz = 17719, |
| 17735 | VPTERNLOGDZ128rri = 17720, |
| 17736 | VPTERNLOGDZ128rrik = 17721, |
| 17737 | VPTERNLOGDZ128rrikz = 17722, |
| 17738 | VPTERNLOGDZ256rmbi = 17723, |
| 17739 | VPTERNLOGDZ256rmbik = 17724, |
| 17740 | VPTERNLOGDZ256rmbikz = 17725, |
| 17741 | VPTERNLOGDZ256rmi = 17726, |
| 17742 | VPTERNLOGDZ256rmik = 17727, |
| 17743 | VPTERNLOGDZ256rmikz = 17728, |
| 17744 | VPTERNLOGDZ256rri = 17729, |
| 17745 | VPTERNLOGDZ256rrik = 17730, |
| 17746 | VPTERNLOGDZ256rrikz = 17731, |
| 17747 | VPTERNLOGDZrmbi = 17732, |
| 17748 | VPTERNLOGDZrmbik = 17733, |
| 17749 | VPTERNLOGDZrmbikz = 17734, |
| 17750 | VPTERNLOGDZrmi = 17735, |
| 17751 | VPTERNLOGDZrmik = 17736, |
| 17752 | VPTERNLOGDZrmikz = 17737, |
| 17753 | VPTERNLOGDZrri = 17738, |
| 17754 | VPTERNLOGDZrrik = 17739, |
| 17755 | VPTERNLOGDZrrikz = 17740, |
| 17756 | VPTERNLOGQZ128rmbi = 17741, |
| 17757 | VPTERNLOGQZ128rmbik = 17742, |
| 17758 | VPTERNLOGQZ128rmbikz = 17743, |
| 17759 | VPTERNLOGQZ128rmi = 17744, |
| 17760 | VPTERNLOGQZ128rmik = 17745, |
| 17761 | VPTERNLOGQZ128rmikz = 17746, |
| 17762 | VPTERNLOGQZ128rri = 17747, |
| 17763 | VPTERNLOGQZ128rrik = 17748, |
| 17764 | VPTERNLOGQZ128rrikz = 17749, |
| 17765 | VPTERNLOGQZ256rmbi = 17750, |
| 17766 | VPTERNLOGQZ256rmbik = 17751, |
| 17767 | VPTERNLOGQZ256rmbikz = 17752, |
| 17768 | VPTERNLOGQZ256rmi = 17753, |
| 17769 | VPTERNLOGQZ256rmik = 17754, |
| 17770 | VPTERNLOGQZ256rmikz = 17755, |
| 17771 | VPTERNLOGQZ256rri = 17756, |
| 17772 | VPTERNLOGQZ256rrik = 17757, |
| 17773 | VPTERNLOGQZ256rrikz = 17758, |
| 17774 | VPTERNLOGQZrmbi = 17759, |
| 17775 | VPTERNLOGQZrmbik = 17760, |
| 17776 | VPTERNLOGQZrmbikz = 17761, |
| 17777 | VPTERNLOGQZrmi = 17762, |
| 17778 | VPTERNLOGQZrmik = 17763, |
| 17779 | VPTERNLOGQZrmikz = 17764, |
| 17780 | VPTERNLOGQZrri = 17765, |
| 17781 | VPTERNLOGQZrrik = 17766, |
| 17782 | VPTERNLOGQZrrikz = 17767, |
| 17783 | VPTESTMBZ128rm = 17768, |
| 17784 | VPTESTMBZ128rmk = 17769, |
| 17785 | VPTESTMBZ128rr = 17770, |
| 17786 | VPTESTMBZ128rrk = 17771, |
| 17787 | VPTESTMBZ256rm = 17772, |
| 17788 | VPTESTMBZ256rmk = 17773, |
| 17789 | VPTESTMBZ256rr = 17774, |
| 17790 | VPTESTMBZ256rrk = 17775, |
| 17791 | VPTESTMBZrm = 17776, |
| 17792 | VPTESTMBZrmk = 17777, |
| 17793 | VPTESTMBZrr = 17778, |
| 17794 | VPTESTMBZrrk = 17779, |
| 17795 | VPTESTMDZ128rm = 17780, |
| 17796 | VPTESTMDZ128rmb = 17781, |
| 17797 | VPTESTMDZ128rmbk = 17782, |
| 17798 | VPTESTMDZ128rmk = 17783, |
| 17799 | VPTESTMDZ128rr = 17784, |
| 17800 | VPTESTMDZ128rrk = 17785, |
| 17801 | VPTESTMDZ256rm = 17786, |
| 17802 | VPTESTMDZ256rmb = 17787, |
| 17803 | VPTESTMDZ256rmbk = 17788, |
| 17804 | VPTESTMDZ256rmk = 17789, |
| 17805 | VPTESTMDZ256rr = 17790, |
| 17806 | VPTESTMDZ256rrk = 17791, |
| 17807 | VPTESTMDZrm = 17792, |
| 17808 | VPTESTMDZrmb = 17793, |
| 17809 | VPTESTMDZrmbk = 17794, |
| 17810 | VPTESTMDZrmk = 17795, |
| 17811 | VPTESTMDZrr = 17796, |
| 17812 | VPTESTMDZrrk = 17797, |
| 17813 | VPTESTMQZ128rm = 17798, |
| 17814 | VPTESTMQZ128rmb = 17799, |
| 17815 | VPTESTMQZ128rmbk = 17800, |
| 17816 | VPTESTMQZ128rmk = 17801, |
| 17817 | VPTESTMQZ128rr = 17802, |
| 17818 | VPTESTMQZ128rrk = 17803, |
| 17819 | VPTESTMQZ256rm = 17804, |
| 17820 | VPTESTMQZ256rmb = 17805, |
| 17821 | VPTESTMQZ256rmbk = 17806, |
| 17822 | VPTESTMQZ256rmk = 17807, |
| 17823 | VPTESTMQZ256rr = 17808, |
| 17824 | VPTESTMQZ256rrk = 17809, |
| 17825 | VPTESTMQZrm = 17810, |
| 17826 | VPTESTMQZrmb = 17811, |
| 17827 | VPTESTMQZrmbk = 17812, |
| 17828 | VPTESTMQZrmk = 17813, |
| 17829 | VPTESTMQZrr = 17814, |
| 17830 | VPTESTMQZrrk = 17815, |
| 17831 | VPTESTMWZ128rm = 17816, |
| 17832 | VPTESTMWZ128rmk = 17817, |
| 17833 | VPTESTMWZ128rr = 17818, |
| 17834 | VPTESTMWZ128rrk = 17819, |
| 17835 | VPTESTMWZ256rm = 17820, |
| 17836 | VPTESTMWZ256rmk = 17821, |
| 17837 | VPTESTMWZ256rr = 17822, |
| 17838 | VPTESTMWZ256rrk = 17823, |
| 17839 | VPTESTMWZrm = 17824, |
| 17840 | VPTESTMWZrmk = 17825, |
| 17841 | VPTESTMWZrr = 17826, |
| 17842 | VPTESTMWZrrk = 17827, |
| 17843 | VPTESTNMBZ128rm = 17828, |
| 17844 | VPTESTNMBZ128rmk = 17829, |
| 17845 | VPTESTNMBZ128rr = 17830, |
| 17846 | VPTESTNMBZ128rrk = 17831, |
| 17847 | VPTESTNMBZ256rm = 17832, |
| 17848 | VPTESTNMBZ256rmk = 17833, |
| 17849 | VPTESTNMBZ256rr = 17834, |
| 17850 | VPTESTNMBZ256rrk = 17835, |
| 17851 | VPTESTNMBZrm = 17836, |
| 17852 | VPTESTNMBZrmk = 17837, |
| 17853 | VPTESTNMBZrr = 17838, |
| 17854 | VPTESTNMBZrrk = 17839, |
| 17855 | VPTESTNMDZ128rm = 17840, |
| 17856 | VPTESTNMDZ128rmb = 17841, |
| 17857 | VPTESTNMDZ128rmbk = 17842, |
| 17858 | VPTESTNMDZ128rmk = 17843, |
| 17859 | VPTESTNMDZ128rr = 17844, |
| 17860 | VPTESTNMDZ128rrk = 17845, |
| 17861 | VPTESTNMDZ256rm = 17846, |
| 17862 | VPTESTNMDZ256rmb = 17847, |
| 17863 | VPTESTNMDZ256rmbk = 17848, |
| 17864 | VPTESTNMDZ256rmk = 17849, |
| 17865 | VPTESTNMDZ256rr = 17850, |
| 17866 | VPTESTNMDZ256rrk = 17851, |
| 17867 | VPTESTNMDZrm = 17852, |
| 17868 | VPTESTNMDZrmb = 17853, |
| 17869 | VPTESTNMDZrmbk = 17854, |
| 17870 | VPTESTNMDZrmk = 17855, |
| 17871 | VPTESTNMDZrr = 17856, |
| 17872 | VPTESTNMDZrrk = 17857, |
| 17873 | VPTESTNMQZ128rm = 17858, |
| 17874 | VPTESTNMQZ128rmb = 17859, |
| 17875 | VPTESTNMQZ128rmbk = 17860, |
| 17876 | VPTESTNMQZ128rmk = 17861, |
| 17877 | VPTESTNMQZ128rr = 17862, |
| 17878 | VPTESTNMQZ128rrk = 17863, |
| 17879 | VPTESTNMQZ256rm = 17864, |
| 17880 | VPTESTNMQZ256rmb = 17865, |
| 17881 | VPTESTNMQZ256rmbk = 17866, |
| 17882 | VPTESTNMQZ256rmk = 17867, |
| 17883 | VPTESTNMQZ256rr = 17868, |
| 17884 | VPTESTNMQZ256rrk = 17869, |
| 17885 | VPTESTNMQZrm = 17870, |
| 17886 | VPTESTNMQZrmb = 17871, |
| 17887 | VPTESTNMQZrmbk = 17872, |
| 17888 | VPTESTNMQZrmk = 17873, |
| 17889 | VPTESTNMQZrr = 17874, |
| 17890 | VPTESTNMQZrrk = 17875, |
| 17891 | VPTESTNMWZ128rm = 17876, |
| 17892 | VPTESTNMWZ128rmk = 17877, |
| 17893 | VPTESTNMWZ128rr = 17878, |
| 17894 | VPTESTNMWZ128rrk = 17879, |
| 17895 | VPTESTNMWZ256rm = 17880, |
| 17896 | VPTESTNMWZ256rmk = 17881, |
| 17897 | VPTESTNMWZ256rr = 17882, |
| 17898 | VPTESTNMWZ256rrk = 17883, |
| 17899 | VPTESTNMWZrm = 17884, |
| 17900 | VPTESTNMWZrmk = 17885, |
| 17901 | VPTESTNMWZrr = 17886, |
| 17902 | VPTESTNMWZrrk = 17887, |
| 17903 | VPTESTYrm = 17888, |
| 17904 | VPTESTYrr = 17889, |
| 17905 | VPTESTrm = 17890, |
| 17906 | VPTESTrr = 17891, |
| 17907 | VPUNPCKHBWYrm = 17892, |
| 17908 | VPUNPCKHBWYrr = 17893, |
| 17909 | VPUNPCKHBWZ128rm = 17894, |
| 17910 | VPUNPCKHBWZ128rmk = 17895, |
| 17911 | VPUNPCKHBWZ128rmkz = 17896, |
| 17912 | VPUNPCKHBWZ128rr = 17897, |
| 17913 | VPUNPCKHBWZ128rrk = 17898, |
| 17914 | VPUNPCKHBWZ128rrkz = 17899, |
| 17915 | VPUNPCKHBWZ256rm = 17900, |
| 17916 | VPUNPCKHBWZ256rmk = 17901, |
| 17917 | VPUNPCKHBWZ256rmkz = 17902, |
| 17918 | VPUNPCKHBWZ256rr = 17903, |
| 17919 | VPUNPCKHBWZ256rrk = 17904, |
| 17920 | VPUNPCKHBWZ256rrkz = 17905, |
| 17921 | VPUNPCKHBWZrm = 17906, |
| 17922 | VPUNPCKHBWZrmk = 17907, |
| 17923 | VPUNPCKHBWZrmkz = 17908, |
| 17924 | VPUNPCKHBWZrr = 17909, |
| 17925 | VPUNPCKHBWZrrk = 17910, |
| 17926 | VPUNPCKHBWZrrkz = 17911, |
| 17927 | VPUNPCKHBWrm = 17912, |
| 17928 | VPUNPCKHBWrr = 17913, |
| 17929 | VPUNPCKHDQYrm = 17914, |
| 17930 | VPUNPCKHDQYrr = 17915, |
| 17931 | VPUNPCKHDQZ128rm = 17916, |
| 17932 | VPUNPCKHDQZ128rmb = 17917, |
| 17933 | VPUNPCKHDQZ128rmbk = 17918, |
| 17934 | VPUNPCKHDQZ128rmbkz = 17919, |
| 17935 | VPUNPCKHDQZ128rmk = 17920, |
| 17936 | VPUNPCKHDQZ128rmkz = 17921, |
| 17937 | VPUNPCKHDQZ128rr = 17922, |
| 17938 | VPUNPCKHDQZ128rrk = 17923, |
| 17939 | VPUNPCKHDQZ128rrkz = 17924, |
| 17940 | VPUNPCKHDQZ256rm = 17925, |
| 17941 | VPUNPCKHDQZ256rmb = 17926, |
| 17942 | VPUNPCKHDQZ256rmbk = 17927, |
| 17943 | VPUNPCKHDQZ256rmbkz = 17928, |
| 17944 | VPUNPCKHDQZ256rmk = 17929, |
| 17945 | VPUNPCKHDQZ256rmkz = 17930, |
| 17946 | VPUNPCKHDQZ256rr = 17931, |
| 17947 | VPUNPCKHDQZ256rrk = 17932, |
| 17948 | VPUNPCKHDQZ256rrkz = 17933, |
| 17949 | VPUNPCKHDQZrm = 17934, |
| 17950 | VPUNPCKHDQZrmb = 17935, |
| 17951 | VPUNPCKHDQZrmbk = 17936, |
| 17952 | VPUNPCKHDQZrmbkz = 17937, |
| 17953 | VPUNPCKHDQZrmk = 17938, |
| 17954 | VPUNPCKHDQZrmkz = 17939, |
| 17955 | VPUNPCKHDQZrr = 17940, |
| 17956 | VPUNPCKHDQZrrk = 17941, |
| 17957 | VPUNPCKHDQZrrkz = 17942, |
| 17958 | VPUNPCKHDQrm = 17943, |
| 17959 | VPUNPCKHDQrr = 17944, |
| 17960 | VPUNPCKHQDQYrm = 17945, |
| 17961 | VPUNPCKHQDQYrr = 17946, |
| 17962 | VPUNPCKHQDQZ128rm = 17947, |
| 17963 | VPUNPCKHQDQZ128rmb = 17948, |
| 17964 | VPUNPCKHQDQZ128rmbk = 17949, |
| 17965 | VPUNPCKHQDQZ128rmbkz = 17950, |
| 17966 | VPUNPCKHQDQZ128rmk = 17951, |
| 17967 | VPUNPCKHQDQZ128rmkz = 17952, |
| 17968 | VPUNPCKHQDQZ128rr = 17953, |
| 17969 | VPUNPCKHQDQZ128rrk = 17954, |
| 17970 | VPUNPCKHQDQZ128rrkz = 17955, |
| 17971 | VPUNPCKHQDQZ256rm = 17956, |
| 17972 | VPUNPCKHQDQZ256rmb = 17957, |
| 17973 | VPUNPCKHQDQZ256rmbk = 17958, |
| 17974 | VPUNPCKHQDQZ256rmbkz = 17959, |
| 17975 | VPUNPCKHQDQZ256rmk = 17960, |
| 17976 | VPUNPCKHQDQZ256rmkz = 17961, |
| 17977 | VPUNPCKHQDQZ256rr = 17962, |
| 17978 | VPUNPCKHQDQZ256rrk = 17963, |
| 17979 | VPUNPCKHQDQZ256rrkz = 17964, |
| 17980 | VPUNPCKHQDQZrm = 17965, |
| 17981 | VPUNPCKHQDQZrmb = 17966, |
| 17982 | VPUNPCKHQDQZrmbk = 17967, |
| 17983 | VPUNPCKHQDQZrmbkz = 17968, |
| 17984 | VPUNPCKHQDQZrmk = 17969, |
| 17985 | VPUNPCKHQDQZrmkz = 17970, |
| 17986 | VPUNPCKHQDQZrr = 17971, |
| 17987 | VPUNPCKHQDQZrrk = 17972, |
| 17988 | VPUNPCKHQDQZrrkz = 17973, |
| 17989 | VPUNPCKHQDQrm = 17974, |
| 17990 | VPUNPCKHQDQrr = 17975, |
| 17991 | VPUNPCKHWDYrm = 17976, |
| 17992 | VPUNPCKHWDYrr = 17977, |
| 17993 | VPUNPCKHWDZ128rm = 17978, |
| 17994 | VPUNPCKHWDZ128rmk = 17979, |
| 17995 | VPUNPCKHWDZ128rmkz = 17980, |
| 17996 | VPUNPCKHWDZ128rr = 17981, |
| 17997 | VPUNPCKHWDZ128rrk = 17982, |
| 17998 | VPUNPCKHWDZ128rrkz = 17983, |
| 17999 | VPUNPCKHWDZ256rm = 17984, |
| 18000 | VPUNPCKHWDZ256rmk = 17985, |
| 18001 | VPUNPCKHWDZ256rmkz = 17986, |
| 18002 | VPUNPCKHWDZ256rr = 17987, |
| 18003 | VPUNPCKHWDZ256rrk = 17988, |
| 18004 | VPUNPCKHWDZ256rrkz = 17989, |
| 18005 | VPUNPCKHWDZrm = 17990, |
| 18006 | VPUNPCKHWDZrmk = 17991, |
| 18007 | VPUNPCKHWDZrmkz = 17992, |
| 18008 | VPUNPCKHWDZrr = 17993, |
| 18009 | VPUNPCKHWDZrrk = 17994, |
| 18010 | VPUNPCKHWDZrrkz = 17995, |
| 18011 | VPUNPCKHWDrm = 17996, |
| 18012 | VPUNPCKHWDrr = 17997, |
| 18013 | VPUNPCKLBWYrm = 17998, |
| 18014 | VPUNPCKLBWYrr = 17999, |
| 18015 | VPUNPCKLBWZ128rm = 18000, |
| 18016 | VPUNPCKLBWZ128rmk = 18001, |
| 18017 | VPUNPCKLBWZ128rmkz = 18002, |
| 18018 | VPUNPCKLBWZ128rr = 18003, |
| 18019 | VPUNPCKLBWZ128rrk = 18004, |
| 18020 | VPUNPCKLBWZ128rrkz = 18005, |
| 18021 | VPUNPCKLBWZ256rm = 18006, |
| 18022 | VPUNPCKLBWZ256rmk = 18007, |
| 18023 | VPUNPCKLBWZ256rmkz = 18008, |
| 18024 | VPUNPCKLBWZ256rr = 18009, |
| 18025 | VPUNPCKLBWZ256rrk = 18010, |
| 18026 | VPUNPCKLBWZ256rrkz = 18011, |
| 18027 | VPUNPCKLBWZrm = 18012, |
| 18028 | VPUNPCKLBWZrmk = 18013, |
| 18029 | VPUNPCKLBWZrmkz = 18014, |
| 18030 | VPUNPCKLBWZrr = 18015, |
| 18031 | VPUNPCKLBWZrrk = 18016, |
| 18032 | VPUNPCKLBWZrrkz = 18017, |
| 18033 | VPUNPCKLBWrm = 18018, |
| 18034 | VPUNPCKLBWrr = 18019, |
| 18035 | VPUNPCKLDQYrm = 18020, |
| 18036 | VPUNPCKLDQYrr = 18021, |
| 18037 | VPUNPCKLDQZ128rm = 18022, |
| 18038 | VPUNPCKLDQZ128rmb = 18023, |
| 18039 | VPUNPCKLDQZ128rmbk = 18024, |
| 18040 | VPUNPCKLDQZ128rmbkz = 18025, |
| 18041 | VPUNPCKLDQZ128rmk = 18026, |
| 18042 | VPUNPCKLDQZ128rmkz = 18027, |
| 18043 | VPUNPCKLDQZ128rr = 18028, |
| 18044 | VPUNPCKLDQZ128rrk = 18029, |
| 18045 | VPUNPCKLDQZ128rrkz = 18030, |
| 18046 | VPUNPCKLDQZ256rm = 18031, |
| 18047 | VPUNPCKLDQZ256rmb = 18032, |
| 18048 | VPUNPCKLDQZ256rmbk = 18033, |
| 18049 | VPUNPCKLDQZ256rmbkz = 18034, |
| 18050 | VPUNPCKLDQZ256rmk = 18035, |
| 18051 | VPUNPCKLDQZ256rmkz = 18036, |
| 18052 | VPUNPCKLDQZ256rr = 18037, |
| 18053 | VPUNPCKLDQZ256rrk = 18038, |
| 18054 | VPUNPCKLDQZ256rrkz = 18039, |
| 18055 | VPUNPCKLDQZrm = 18040, |
| 18056 | VPUNPCKLDQZrmb = 18041, |
| 18057 | VPUNPCKLDQZrmbk = 18042, |
| 18058 | VPUNPCKLDQZrmbkz = 18043, |
| 18059 | VPUNPCKLDQZrmk = 18044, |
| 18060 | VPUNPCKLDQZrmkz = 18045, |
| 18061 | VPUNPCKLDQZrr = 18046, |
| 18062 | VPUNPCKLDQZrrk = 18047, |
| 18063 | VPUNPCKLDQZrrkz = 18048, |
| 18064 | VPUNPCKLDQrm = 18049, |
| 18065 | VPUNPCKLDQrr = 18050, |
| 18066 | VPUNPCKLQDQYrm = 18051, |
| 18067 | VPUNPCKLQDQYrr = 18052, |
| 18068 | VPUNPCKLQDQZ128rm = 18053, |
| 18069 | VPUNPCKLQDQZ128rmb = 18054, |
| 18070 | VPUNPCKLQDQZ128rmbk = 18055, |
| 18071 | VPUNPCKLQDQZ128rmbkz = 18056, |
| 18072 | VPUNPCKLQDQZ128rmk = 18057, |
| 18073 | VPUNPCKLQDQZ128rmkz = 18058, |
| 18074 | VPUNPCKLQDQZ128rr = 18059, |
| 18075 | VPUNPCKLQDQZ128rrk = 18060, |
| 18076 | VPUNPCKLQDQZ128rrkz = 18061, |
| 18077 | VPUNPCKLQDQZ256rm = 18062, |
| 18078 | VPUNPCKLQDQZ256rmb = 18063, |
| 18079 | VPUNPCKLQDQZ256rmbk = 18064, |
| 18080 | VPUNPCKLQDQZ256rmbkz = 18065, |
| 18081 | VPUNPCKLQDQZ256rmk = 18066, |
| 18082 | VPUNPCKLQDQZ256rmkz = 18067, |
| 18083 | VPUNPCKLQDQZ256rr = 18068, |
| 18084 | VPUNPCKLQDQZ256rrk = 18069, |
| 18085 | VPUNPCKLQDQZ256rrkz = 18070, |
| 18086 | VPUNPCKLQDQZrm = 18071, |
| 18087 | VPUNPCKLQDQZrmb = 18072, |
| 18088 | VPUNPCKLQDQZrmbk = 18073, |
| 18089 | VPUNPCKLQDQZrmbkz = 18074, |
| 18090 | VPUNPCKLQDQZrmk = 18075, |
| 18091 | VPUNPCKLQDQZrmkz = 18076, |
| 18092 | VPUNPCKLQDQZrr = 18077, |
| 18093 | VPUNPCKLQDQZrrk = 18078, |
| 18094 | VPUNPCKLQDQZrrkz = 18079, |
| 18095 | VPUNPCKLQDQrm = 18080, |
| 18096 | VPUNPCKLQDQrr = 18081, |
| 18097 | VPUNPCKLWDYrm = 18082, |
| 18098 | VPUNPCKLWDYrr = 18083, |
| 18099 | VPUNPCKLWDZ128rm = 18084, |
| 18100 | VPUNPCKLWDZ128rmk = 18085, |
| 18101 | VPUNPCKLWDZ128rmkz = 18086, |
| 18102 | VPUNPCKLWDZ128rr = 18087, |
| 18103 | VPUNPCKLWDZ128rrk = 18088, |
| 18104 | VPUNPCKLWDZ128rrkz = 18089, |
| 18105 | VPUNPCKLWDZ256rm = 18090, |
| 18106 | VPUNPCKLWDZ256rmk = 18091, |
| 18107 | VPUNPCKLWDZ256rmkz = 18092, |
| 18108 | VPUNPCKLWDZ256rr = 18093, |
| 18109 | VPUNPCKLWDZ256rrk = 18094, |
| 18110 | VPUNPCKLWDZ256rrkz = 18095, |
| 18111 | VPUNPCKLWDZrm = 18096, |
| 18112 | VPUNPCKLWDZrmk = 18097, |
| 18113 | VPUNPCKLWDZrmkz = 18098, |
| 18114 | VPUNPCKLWDZrr = 18099, |
| 18115 | VPUNPCKLWDZrrk = 18100, |
| 18116 | VPUNPCKLWDZrrkz = 18101, |
| 18117 | VPUNPCKLWDrm = 18102, |
| 18118 | VPUNPCKLWDrr = 18103, |
| 18119 | VPXORDZ128rm = 18104, |
| 18120 | VPXORDZ128rmb = 18105, |
| 18121 | VPXORDZ128rmbk = 18106, |
| 18122 | VPXORDZ128rmbkz = 18107, |
| 18123 | VPXORDZ128rmk = 18108, |
| 18124 | VPXORDZ128rmkz = 18109, |
| 18125 | VPXORDZ128rr = 18110, |
| 18126 | VPXORDZ128rrk = 18111, |
| 18127 | VPXORDZ128rrkz = 18112, |
| 18128 | VPXORDZ256rm = 18113, |
| 18129 | VPXORDZ256rmb = 18114, |
| 18130 | VPXORDZ256rmbk = 18115, |
| 18131 | VPXORDZ256rmbkz = 18116, |
| 18132 | VPXORDZ256rmk = 18117, |
| 18133 | VPXORDZ256rmkz = 18118, |
| 18134 | VPXORDZ256rr = 18119, |
| 18135 | VPXORDZ256rrk = 18120, |
| 18136 | VPXORDZ256rrkz = 18121, |
| 18137 | VPXORDZrm = 18122, |
| 18138 | VPXORDZrmb = 18123, |
| 18139 | VPXORDZrmbk = 18124, |
| 18140 | VPXORDZrmbkz = 18125, |
| 18141 | VPXORDZrmk = 18126, |
| 18142 | VPXORDZrmkz = 18127, |
| 18143 | VPXORDZrr = 18128, |
| 18144 | VPXORDZrrk = 18129, |
| 18145 | VPXORDZrrkz = 18130, |
| 18146 | VPXORQZ128rm = 18131, |
| 18147 | VPXORQZ128rmb = 18132, |
| 18148 | VPXORQZ128rmbk = 18133, |
| 18149 | VPXORQZ128rmbkz = 18134, |
| 18150 | VPXORQZ128rmk = 18135, |
| 18151 | VPXORQZ128rmkz = 18136, |
| 18152 | VPXORQZ128rr = 18137, |
| 18153 | VPXORQZ128rrk = 18138, |
| 18154 | VPXORQZ128rrkz = 18139, |
| 18155 | VPXORQZ256rm = 18140, |
| 18156 | VPXORQZ256rmb = 18141, |
| 18157 | VPXORQZ256rmbk = 18142, |
| 18158 | VPXORQZ256rmbkz = 18143, |
| 18159 | VPXORQZ256rmk = 18144, |
| 18160 | VPXORQZ256rmkz = 18145, |
| 18161 | VPXORQZ256rr = 18146, |
| 18162 | VPXORQZ256rrk = 18147, |
| 18163 | VPXORQZ256rrkz = 18148, |
| 18164 | VPXORQZrm = 18149, |
| 18165 | VPXORQZrmb = 18150, |
| 18166 | VPXORQZrmbk = 18151, |
| 18167 | VPXORQZrmbkz = 18152, |
| 18168 | VPXORQZrmk = 18153, |
| 18169 | VPXORQZrmkz = 18154, |
| 18170 | VPXORQZrr = 18155, |
| 18171 | VPXORQZrrk = 18156, |
| 18172 | VPXORQZrrkz = 18157, |
| 18173 | VPXORYrm = 18158, |
| 18174 | VPXORYrr = 18159, |
| 18175 | VPXORrm = 18160, |
| 18176 | VPXORrr = 18161, |
| 18177 | VRANGEPDZ128rmbi = 18162, |
| 18178 | VRANGEPDZ128rmbik = 18163, |
| 18179 | VRANGEPDZ128rmbikz = 18164, |
| 18180 | VRANGEPDZ128rmi = 18165, |
| 18181 | VRANGEPDZ128rmik = 18166, |
| 18182 | VRANGEPDZ128rmikz = 18167, |
| 18183 | VRANGEPDZ128rri = 18168, |
| 18184 | VRANGEPDZ128rrik = 18169, |
| 18185 | VRANGEPDZ128rrikz = 18170, |
| 18186 | VRANGEPDZ256rmbi = 18171, |
| 18187 | VRANGEPDZ256rmbik = 18172, |
| 18188 | VRANGEPDZ256rmbikz = 18173, |
| 18189 | VRANGEPDZ256rmi = 18174, |
| 18190 | VRANGEPDZ256rmik = 18175, |
| 18191 | VRANGEPDZ256rmikz = 18176, |
| 18192 | VRANGEPDZ256rri = 18177, |
| 18193 | VRANGEPDZ256rrik = 18178, |
| 18194 | VRANGEPDZ256rrikz = 18179, |
| 18195 | VRANGEPDZrmbi = 18180, |
| 18196 | VRANGEPDZrmbik = 18181, |
| 18197 | VRANGEPDZrmbikz = 18182, |
| 18198 | VRANGEPDZrmi = 18183, |
| 18199 | VRANGEPDZrmik = 18184, |
| 18200 | VRANGEPDZrmikz = 18185, |
| 18201 | VRANGEPDZrri = 18186, |
| 18202 | VRANGEPDZrrib = 18187, |
| 18203 | VRANGEPDZrribk = 18188, |
| 18204 | VRANGEPDZrribkz = 18189, |
| 18205 | VRANGEPDZrrik = 18190, |
| 18206 | VRANGEPDZrrikz = 18191, |
| 18207 | VRANGEPSZ128rmbi = 18192, |
| 18208 | VRANGEPSZ128rmbik = 18193, |
| 18209 | VRANGEPSZ128rmbikz = 18194, |
| 18210 | VRANGEPSZ128rmi = 18195, |
| 18211 | VRANGEPSZ128rmik = 18196, |
| 18212 | VRANGEPSZ128rmikz = 18197, |
| 18213 | VRANGEPSZ128rri = 18198, |
| 18214 | VRANGEPSZ128rrik = 18199, |
| 18215 | VRANGEPSZ128rrikz = 18200, |
| 18216 | VRANGEPSZ256rmbi = 18201, |
| 18217 | VRANGEPSZ256rmbik = 18202, |
| 18218 | VRANGEPSZ256rmbikz = 18203, |
| 18219 | VRANGEPSZ256rmi = 18204, |
| 18220 | VRANGEPSZ256rmik = 18205, |
| 18221 | VRANGEPSZ256rmikz = 18206, |
| 18222 | VRANGEPSZ256rri = 18207, |
| 18223 | VRANGEPSZ256rrik = 18208, |
| 18224 | VRANGEPSZ256rrikz = 18209, |
| 18225 | VRANGEPSZrmbi = 18210, |
| 18226 | VRANGEPSZrmbik = 18211, |
| 18227 | VRANGEPSZrmbikz = 18212, |
| 18228 | VRANGEPSZrmi = 18213, |
| 18229 | VRANGEPSZrmik = 18214, |
| 18230 | VRANGEPSZrmikz = 18215, |
| 18231 | VRANGEPSZrri = 18216, |
| 18232 | VRANGEPSZrrib = 18217, |
| 18233 | VRANGEPSZrribk = 18218, |
| 18234 | VRANGEPSZrribkz = 18219, |
| 18235 | VRANGEPSZrrik = 18220, |
| 18236 | VRANGEPSZrrikz = 18221, |
| 18237 | VRANGESDZrmi = 18222, |
| 18238 | VRANGESDZrmik = 18223, |
| 18239 | VRANGESDZrmikz = 18224, |
| 18240 | VRANGESDZrri = 18225, |
| 18241 | VRANGESDZrrib = 18226, |
| 18242 | VRANGESDZrribk = 18227, |
| 18243 | VRANGESDZrribkz = 18228, |
| 18244 | VRANGESDZrrik = 18229, |
| 18245 | VRANGESDZrrikz = 18230, |
| 18246 | VRANGESSZrmi = 18231, |
| 18247 | VRANGESSZrmik = 18232, |
| 18248 | VRANGESSZrmikz = 18233, |
| 18249 | VRANGESSZrri = 18234, |
| 18250 | VRANGESSZrrib = 18235, |
| 18251 | VRANGESSZrribk = 18236, |
| 18252 | VRANGESSZrribkz = 18237, |
| 18253 | VRANGESSZrrik = 18238, |
| 18254 | VRANGESSZrrikz = 18239, |
| 18255 | VRCP14PDZ128m = 18240, |
| 18256 | VRCP14PDZ128mb = 18241, |
| 18257 | VRCP14PDZ128mbk = 18242, |
| 18258 | VRCP14PDZ128mbkz = 18243, |
| 18259 | VRCP14PDZ128mk = 18244, |
| 18260 | VRCP14PDZ128mkz = 18245, |
| 18261 | VRCP14PDZ128r = 18246, |
| 18262 | VRCP14PDZ128rk = 18247, |
| 18263 | VRCP14PDZ128rkz = 18248, |
| 18264 | VRCP14PDZ256m = 18249, |
| 18265 | VRCP14PDZ256mb = 18250, |
| 18266 | VRCP14PDZ256mbk = 18251, |
| 18267 | VRCP14PDZ256mbkz = 18252, |
| 18268 | VRCP14PDZ256mk = 18253, |
| 18269 | VRCP14PDZ256mkz = 18254, |
| 18270 | VRCP14PDZ256r = 18255, |
| 18271 | VRCP14PDZ256rk = 18256, |
| 18272 | VRCP14PDZ256rkz = 18257, |
| 18273 | VRCP14PDZm = 18258, |
| 18274 | VRCP14PDZmb = 18259, |
| 18275 | VRCP14PDZmbk = 18260, |
| 18276 | VRCP14PDZmbkz = 18261, |
| 18277 | VRCP14PDZmk = 18262, |
| 18278 | VRCP14PDZmkz = 18263, |
| 18279 | VRCP14PDZr = 18264, |
| 18280 | VRCP14PDZrk = 18265, |
| 18281 | VRCP14PDZrkz = 18266, |
| 18282 | VRCP14PSZ128m = 18267, |
| 18283 | VRCP14PSZ128mb = 18268, |
| 18284 | VRCP14PSZ128mbk = 18269, |
| 18285 | VRCP14PSZ128mbkz = 18270, |
| 18286 | VRCP14PSZ128mk = 18271, |
| 18287 | VRCP14PSZ128mkz = 18272, |
| 18288 | VRCP14PSZ128r = 18273, |
| 18289 | VRCP14PSZ128rk = 18274, |
| 18290 | VRCP14PSZ128rkz = 18275, |
| 18291 | VRCP14PSZ256m = 18276, |
| 18292 | VRCP14PSZ256mb = 18277, |
| 18293 | VRCP14PSZ256mbk = 18278, |
| 18294 | VRCP14PSZ256mbkz = 18279, |
| 18295 | VRCP14PSZ256mk = 18280, |
| 18296 | VRCP14PSZ256mkz = 18281, |
| 18297 | VRCP14PSZ256r = 18282, |
| 18298 | VRCP14PSZ256rk = 18283, |
| 18299 | VRCP14PSZ256rkz = 18284, |
| 18300 | VRCP14PSZm = 18285, |
| 18301 | VRCP14PSZmb = 18286, |
| 18302 | VRCP14PSZmbk = 18287, |
| 18303 | VRCP14PSZmbkz = 18288, |
| 18304 | VRCP14PSZmk = 18289, |
| 18305 | VRCP14PSZmkz = 18290, |
| 18306 | VRCP14PSZr = 18291, |
| 18307 | VRCP14PSZrk = 18292, |
| 18308 | VRCP14PSZrkz = 18293, |
| 18309 | VRCP14SDZrm = 18294, |
| 18310 | VRCP14SDZrmk = 18295, |
| 18311 | VRCP14SDZrmkz = 18296, |
| 18312 | VRCP14SDZrr = 18297, |
| 18313 | VRCP14SDZrrk = 18298, |
| 18314 | VRCP14SDZrrkz = 18299, |
| 18315 | VRCP14SSZrm = 18300, |
| 18316 | VRCP14SSZrmk = 18301, |
| 18317 | VRCP14SSZrmkz = 18302, |
| 18318 | VRCP14SSZrr = 18303, |
| 18319 | VRCP14SSZrrk = 18304, |
| 18320 | VRCP14SSZrrkz = 18305, |
| 18321 | VRCP28PDZm = 18306, |
| 18322 | VRCP28PDZmb = 18307, |
| 18323 | VRCP28PDZmbk = 18308, |
| 18324 | VRCP28PDZmbkz = 18309, |
| 18325 | VRCP28PDZmk = 18310, |
| 18326 | VRCP28PDZmkz = 18311, |
| 18327 | VRCP28PDZr = 18312, |
| 18328 | VRCP28PDZrb = 18313, |
| 18329 | VRCP28PDZrbk = 18314, |
| 18330 | VRCP28PDZrbkz = 18315, |
| 18331 | VRCP28PDZrk = 18316, |
| 18332 | VRCP28PDZrkz = 18317, |
| 18333 | VRCP28PSZm = 18318, |
| 18334 | VRCP28PSZmb = 18319, |
| 18335 | VRCP28PSZmbk = 18320, |
| 18336 | VRCP28PSZmbkz = 18321, |
| 18337 | VRCP28PSZmk = 18322, |
| 18338 | VRCP28PSZmkz = 18323, |
| 18339 | VRCP28PSZr = 18324, |
| 18340 | VRCP28PSZrb = 18325, |
| 18341 | VRCP28PSZrbk = 18326, |
| 18342 | VRCP28PSZrbkz = 18327, |
| 18343 | VRCP28PSZrk = 18328, |
| 18344 | VRCP28PSZrkz = 18329, |
| 18345 | VRCP28SDZm = 18330, |
| 18346 | VRCP28SDZmk = 18331, |
| 18347 | VRCP28SDZmkz = 18332, |
| 18348 | VRCP28SDZr = 18333, |
| 18349 | VRCP28SDZrb = 18334, |
| 18350 | VRCP28SDZrbk = 18335, |
| 18351 | VRCP28SDZrbkz = 18336, |
| 18352 | VRCP28SDZrk = 18337, |
| 18353 | VRCP28SDZrkz = 18338, |
| 18354 | VRCP28SSZm = 18339, |
| 18355 | VRCP28SSZmk = 18340, |
| 18356 | VRCP28SSZmkz = 18341, |
| 18357 | VRCP28SSZr = 18342, |
| 18358 | VRCP28SSZrb = 18343, |
| 18359 | VRCP28SSZrbk = 18344, |
| 18360 | VRCP28SSZrbkz = 18345, |
| 18361 | VRCP28SSZrk = 18346, |
| 18362 | VRCP28SSZrkz = 18347, |
| 18363 | VRCPPHZ128m = 18348, |
| 18364 | VRCPPHZ128mb = 18349, |
| 18365 | VRCPPHZ128mbk = 18350, |
| 18366 | VRCPPHZ128mbkz = 18351, |
| 18367 | VRCPPHZ128mk = 18352, |
| 18368 | VRCPPHZ128mkz = 18353, |
| 18369 | VRCPPHZ128r = 18354, |
| 18370 | VRCPPHZ128rk = 18355, |
| 18371 | VRCPPHZ128rkz = 18356, |
| 18372 | VRCPPHZ256m = 18357, |
| 18373 | VRCPPHZ256mb = 18358, |
| 18374 | VRCPPHZ256mbk = 18359, |
| 18375 | VRCPPHZ256mbkz = 18360, |
| 18376 | VRCPPHZ256mk = 18361, |
| 18377 | VRCPPHZ256mkz = 18362, |
| 18378 | VRCPPHZ256r = 18363, |
| 18379 | VRCPPHZ256rk = 18364, |
| 18380 | VRCPPHZ256rkz = 18365, |
| 18381 | VRCPPHZm = 18366, |
| 18382 | VRCPPHZmb = 18367, |
| 18383 | VRCPPHZmbk = 18368, |
| 18384 | VRCPPHZmbkz = 18369, |
| 18385 | VRCPPHZmk = 18370, |
| 18386 | VRCPPHZmkz = 18371, |
| 18387 | VRCPPHZr = 18372, |
| 18388 | VRCPPHZrk = 18373, |
| 18389 | VRCPPHZrkz = 18374, |
| 18390 | VRCPPSYm = 18375, |
| 18391 | VRCPPSYr = 18376, |
| 18392 | VRCPPSm = 18377, |
| 18393 | VRCPPSr = 18378, |
| 18394 | VRCPSHZrm = 18379, |
| 18395 | VRCPSHZrmk = 18380, |
| 18396 | VRCPSHZrmkz = 18381, |
| 18397 | VRCPSHZrr = 18382, |
| 18398 | VRCPSHZrrk = 18383, |
| 18399 | VRCPSHZrrkz = 18384, |
| 18400 | VRCPSSm = 18385, |
| 18401 | VRCPSSm_Int = 18386, |
| 18402 | VRCPSSr = 18387, |
| 18403 | VRCPSSr_Int = 18388, |
| 18404 | VREDUCEPDZ128rmbi = 18389, |
| 18405 | VREDUCEPDZ128rmbik = 18390, |
| 18406 | VREDUCEPDZ128rmbikz = 18391, |
| 18407 | VREDUCEPDZ128rmi = 18392, |
| 18408 | VREDUCEPDZ128rmik = 18393, |
| 18409 | VREDUCEPDZ128rmikz = 18394, |
| 18410 | VREDUCEPDZ128rri = 18395, |
| 18411 | VREDUCEPDZ128rrik = 18396, |
| 18412 | VREDUCEPDZ128rrikz = 18397, |
| 18413 | VREDUCEPDZ256rmbi = 18398, |
| 18414 | VREDUCEPDZ256rmbik = 18399, |
| 18415 | VREDUCEPDZ256rmbikz = 18400, |
| 18416 | VREDUCEPDZ256rmi = 18401, |
| 18417 | VREDUCEPDZ256rmik = 18402, |
| 18418 | VREDUCEPDZ256rmikz = 18403, |
| 18419 | VREDUCEPDZ256rri = 18404, |
| 18420 | VREDUCEPDZ256rrik = 18405, |
| 18421 | VREDUCEPDZ256rrikz = 18406, |
| 18422 | VREDUCEPDZrmbi = 18407, |
| 18423 | VREDUCEPDZrmbik = 18408, |
| 18424 | VREDUCEPDZrmbikz = 18409, |
| 18425 | VREDUCEPDZrmi = 18410, |
| 18426 | VREDUCEPDZrmik = 18411, |
| 18427 | VREDUCEPDZrmikz = 18412, |
| 18428 | VREDUCEPDZrri = 18413, |
| 18429 | VREDUCEPDZrrib = 18414, |
| 18430 | VREDUCEPDZrribk = 18415, |
| 18431 | VREDUCEPDZrribkz = 18416, |
| 18432 | VREDUCEPDZrrik = 18417, |
| 18433 | VREDUCEPDZrrikz = 18418, |
| 18434 | VREDUCEPHZ128rmbi = 18419, |
| 18435 | VREDUCEPHZ128rmbik = 18420, |
| 18436 | VREDUCEPHZ128rmbikz = 18421, |
| 18437 | VREDUCEPHZ128rmi = 18422, |
| 18438 | VREDUCEPHZ128rmik = 18423, |
| 18439 | VREDUCEPHZ128rmikz = 18424, |
| 18440 | VREDUCEPHZ128rri = 18425, |
| 18441 | VREDUCEPHZ128rrik = 18426, |
| 18442 | VREDUCEPHZ128rrikz = 18427, |
| 18443 | VREDUCEPHZ256rmbi = 18428, |
| 18444 | VREDUCEPHZ256rmbik = 18429, |
| 18445 | VREDUCEPHZ256rmbikz = 18430, |
| 18446 | VREDUCEPHZ256rmi = 18431, |
| 18447 | VREDUCEPHZ256rmik = 18432, |
| 18448 | VREDUCEPHZ256rmikz = 18433, |
| 18449 | VREDUCEPHZ256rri = 18434, |
| 18450 | VREDUCEPHZ256rrik = 18435, |
| 18451 | VREDUCEPHZ256rrikz = 18436, |
| 18452 | VREDUCEPHZrmbi = 18437, |
| 18453 | VREDUCEPHZrmbik = 18438, |
| 18454 | VREDUCEPHZrmbikz = 18439, |
| 18455 | VREDUCEPHZrmi = 18440, |
| 18456 | VREDUCEPHZrmik = 18441, |
| 18457 | VREDUCEPHZrmikz = 18442, |
| 18458 | VREDUCEPHZrri = 18443, |
| 18459 | VREDUCEPHZrrib = 18444, |
| 18460 | VREDUCEPHZrribk = 18445, |
| 18461 | VREDUCEPHZrribkz = 18446, |
| 18462 | VREDUCEPHZrrik = 18447, |
| 18463 | VREDUCEPHZrrikz = 18448, |
| 18464 | VREDUCEPSZ128rmbi = 18449, |
| 18465 | VREDUCEPSZ128rmbik = 18450, |
| 18466 | VREDUCEPSZ128rmbikz = 18451, |
| 18467 | VREDUCEPSZ128rmi = 18452, |
| 18468 | VREDUCEPSZ128rmik = 18453, |
| 18469 | VREDUCEPSZ128rmikz = 18454, |
| 18470 | VREDUCEPSZ128rri = 18455, |
| 18471 | VREDUCEPSZ128rrik = 18456, |
| 18472 | VREDUCEPSZ128rrikz = 18457, |
| 18473 | VREDUCEPSZ256rmbi = 18458, |
| 18474 | VREDUCEPSZ256rmbik = 18459, |
| 18475 | VREDUCEPSZ256rmbikz = 18460, |
| 18476 | VREDUCEPSZ256rmi = 18461, |
| 18477 | VREDUCEPSZ256rmik = 18462, |
| 18478 | VREDUCEPSZ256rmikz = 18463, |
| 18479 | VREDUCEPSZ256rri = 18464, |
| 18480 | VREDUCEPSZ256rrik = 18465, |
| 18481 | VREDUCEPSZ256rrikz = 18466, |
| 18482 | VREDUCEPSZrmbi = 18467, |
| 18483 | VREDUCEPSZrmbik = 18468, |
| 18484 | VREDUCEPSZrmbikz = 18469, |
| 18485 | VREDUCEPSZrmi = 18470, |
| 18486 | VREDUCEPSZrmik = 18471, |
| 18487 | VREDUCEPSZrmikz = 18472, |
| 18488 | VREDUCEPSZrri = 18473, |
| 18489 | VREDUCEPSZrrib = 18474, |
| 18490 | VREDUCEPSZrribk = 18475, |
| 18491 | VREDUCEPSZrribkz = 18476, |
| 18492 | VREDUCEPSZrrik = 18477, |
| 18493 | VREDUCEPSZrrikz = 18478, |
| 18494 | VREDUCESDZrmi = 18479, |
| 18495 | VREDUCESDZrmik = 18480, |
| 18496 | VREDUCESDZrmikz = 18481, |
| 18497 | VREDUCESDZrri = 18482, |
| 18498 | VREDUCESDZrrib = 18483, |
| 18499 | VREDUCESDZrribk = 18484, |
| 18500 | VREDUCESDZrribkz = 18485, |
| 18501 | VREDUCESDZrrik = 18486, |
| 18502 | VREDUCESDZrrikz = 18487, |
| 18503 | VREDUCESHZrmi = 18488, |
| 18504 | VREDUCESHZrmik = 18489, |
| 18505 | VREDUCESHZrmikz = 18490, |
| 18506 | VREDUCESHZrri = 18491, |
| 18507 | VREDUCESHZrrib = 18492, |
| 18508 | VREDUCESHZrribk = 18493, |
| 18509 | VREDUCESHZrribkz = 18494, |
| 18510 | VREDUCESHZrrik = 18495, |
| 18511 | VREDUCESHZrrikz = 18496, |
| 18512 | VREDUCESSZrmi = 18497, |
| 18513 | VREDUCESSZrmik = 18498, |
| 18514 | VREDUCESSZrmikz = 18499, |
| 18515 | VREDUCESSZrri = 18500, |
| 18516 | VREDUCESSZrrib = 18501, |
| 18517 | VREDUCESSZrribk = 18502, |
| 18518 | VREDUCESSZrribkz = 18503, |
| 18519 | VREDUCESSZrrik = 18504, |
| 18520 | VREDUCESSZrrikz = 18505, |
| 18521 | VRNDSCALEPDZ128rmbi = 18506, |
| 18522 | VRNDSCALEPDZ128rmbik = 18507, |
| 18523 | VRNDSCALEPDZ128rmbikz = 18508, |
| 18524 | VRNDSCALEPDZ128rmi = 18509, |
| 18525 | VRNDSCALEPDZ128rmik = 18510, |
| 18526 | VRNDSCALEPDZ128rmikz = 18511, |
| 18527 | VRNDSCALEPDZ128rri = 18512, |
| 18528 | VRNDSCALEPDZ128rrik = 18513, |
| 18529 | VRNDSCALEPDZ128rrikz = 18514, |
| 18530 | VRNDSCALEPDZ256rmbi = 18515, |
| 18531 | VRNDSCALEPDZ256rmbik = 18516, |
| 18532 | VRNDSCALEPDZ256rmbikz = 18517, |
| 18533 | VRNDSCALEPDZ256rmi = 18518, |
| 18534 | VRNDSCALEPDZ256rmik = 18519, |
| 18535 | VRNDSCALEPDZ256rmikz = 18520, |
| 18536 | VRNDSCALEPDZ256rri = 18521, |
| 18537 | VRNDSCALEPDZ256rrik = 18522, |
| 18538 | VRNDSCALEPDZ256rrikz = 18523, |
| 18539 | VRNDSCALEPDZrmbi = 18524, |
| 18540 | VRNDSCALEPDZrmbik = 18525, |
| 18541 | VRNDSCALEPDZrmbikz = 18526, |
| 18542 | VRNDSCALEPDZrmi = 18527, |
| 18543 | VRNDSCALEPDZrmik = 18528, |
| 18544 | VRNDSCALEPDZrmikz = 18529, |
| 18545 | VRNDSCALEPDZrri = 18530, |
| 18546 | VRNDSCALEPDZrrib = 18531, |
| 18547 | VRNDSCALEPDZrribk = 18532, |
| 18548 | VRNDSCALEPDZrribkz = 18533, |
| 18549 | VRNDSCALEPDZrrik = 18534, |
| 18550 | VRNDSCALEPDZrrikz = 18535, |
| 18551 | VRNDSCALEPHZ128rmbi = 18536, |
| 18552 | VRNDSCALEPHZ128rmbik = 18537, |
| 18553 | VRNDSCALEPHZ128rmbikz = 18538, |
| 18554 | VRNDSCALEPHZ128rmi = 18539, |
| 18555 | VRNDSCALEPHZ128rmik = 18540, |
| 18556 | VRNDSCALEPHZ128rmikz = 18541, |
| 18557 | VRNDSCALEPHZ128rri = 18542, |
| 18558 | VRNDSCALEPHZ128rrik = 18543, |
| 18559 | VRNDSCALEPHZ128rrikz = 18544, |
| 18560 | VRNDSCALEPHZ256rmbi = 18545, |
| 18561 | VRNDSCALEPHZ256rmbik = 18546, |
| 18562 | VRNDSCALEPHZ256rmbikz = 18547, |
| 18563 | VRNDSCALEPHZ256rmi = 18548, |
| 18564 | VRNDSCALEPHZ256rmik = 18549, |
| 18565 | VRNDSCALEPHZ256rmikz = 18550, |
| 18566 | VRNDSCALEPHZ256rri = 18551, |
| 18567 | VRNDSCALEPHZ256rrik = 18552, |
| 18568 | VRNDSCALEPHZ256rrikz = 18553, |
| 18569 | VRNDSCALEPHZrmbi = 18554, |
| 18570 | VRNDSCALEPHZrmbik = 18555, |
| 18571 | VRNDSCALEPHZrmbikz = 18556, |
| 18572 | VRNDSCALEPHZrmi = 18557, |
| 18573 | VRNDSCALEPHZrmik = 18558, |
| 18574 | VRNDSCALEPHZrmikz = 18559, |
| 18575 | VRNDSCALEPHZrri = 18560, |
| 18576 | VRNDSCALEPHZrrib = 18561, |
| 18577 | VRNDSCALEPHZrribk = 18562, |
| 18578 | VRNDSCALEPHZrribkz = 18563, |
| 18579 | VRNDSCALEPHZrrik = 18564, |
| 18580 | VRNDSCALEPHZrrikz = 18565, |
| 18581 | VRNDSCALEPSZ128rmbi = 18566, |
| 18582 | VRNDSCALEPSZ128rmbik = 18567, |
| 18583 | VRNDSCALEPSZ128rmbikz = 18568, |
| 18584 | VRNDSCALEPSZ128rmi = 18569, |
| 18585 | VRNDSCALEPSZ128rmik = 18570, |
| 18586 | VRNDSCALEPSZ128rmikz = 18571, |
| 18587 | VRNDSCALEPSZ128rri = 18572, |
| 18588 | VRNDSCALEPSZ128rrik = 18573, |
| 18589 | VRNDSCALEPSZ128rrikz = 18574, |
| 18590 | VRNDSCALEPSZ256rmbi = 18575, |
| 18591 | VRNDSCALEPSZ256rmbik = 18576, |
| 18592 | VRNDSCALEPSZ256rmbikz = 18577, |
| 18593 | VRNDSCALEPSZ256rmi = 18578, |
| 18594 | VRNDSCALEPSZ256rmik = 18579, |
| 18595 | VRNDSCALEPSZ256rmikz = 18580, |
| 18596 | VRNDSCALEPSZ256rri = 18581, |
| 18597 | VRNDSCALEPSZ256rrik = 18582, |
| 18598 | VRNDSCALEPSZ256rrikz = 18583, |
| 18599 | VRNDSCALEPSZrmbi = 18584, |
| 18600 | VRNDSCALEPSZrmbik = 18585, |
| 18601 | VRNDSCALEPSZrmbikz = 18586, |
| 18602 | VRNDSCALEPSZrmi = 18587, |
| 18603 | VRNDSCALEPSZrmik = 18588, |
| 18604 | VRNDSCALEPSZrmikz = 18589, |
| 18605 | VRNDSCALEPSZrri = 18590, |
| 18606 | VRNDSCALEPSZrrib = 18591, |
| 18607 | VRNDSCALEPSZrribk = 18592, |
| 18608 | VRNDSCALEPSZrribkz = 18593, |
| 18609 | VRNDSCALEPSZrrik = 18594, |
| 18610 | VRNDSCALEPSZrrikz = 18595, |
| 18611 | VRNDSCALESDZm = 18596, |
| 18612 | VRNDSCALESDZm_Int = 18597, |
| 18613 | VRNDSCALESDZm_Intk = 18598, |
| 18614 | VRNDSCALESDZm_Intkz = 18599, |
| 18615 | VRNDSCALESDZr = 18600, |
| 18616 | VRNDSCALESDZr_Int = 18601, |
| 18617 | VRNDSCALESDZr_Intk = 18602, |
| 18618 | VRNDSCALESDZr_Intkz = 18603, |
| 18619 | VRNDSCALESDZrb_Int = 18604, |
| 18620 | VRNDSCALESDZrb_Intk = 18605, |
| 18621 | VRNDSCALESDZrb_Intkz = 18606, |
| 18622 | VRNDSCALESHZm = 18607, |
| 18623 | VRNDSCALESHZm_Int = 18608, |
| 18624 | VRNDSCALESHZm_Intk = 18609, |
| 18625 | VRNDSCALESHZm_Intkz = 18610, |
| 18626 | VRNDSCALESHZr = 18611, |
| 18627 | VRNDSCALESHZr_Int = 18612, |
| 18628 | VRNDSCALESHZr_Intk = 18613, |
| 18629 | VRNDSCALESHZr_Intkz = 18614, |
| 18630 | VRNDSCALESHZrb_Int = 18615, |
| 18631 | VRNDSCALESHZrb_Intk = 18616, |
| 18632 | VRNDSCALESHZrb_Intkz = 18617, |
| 18633 | VRNDSCALESSZm = 18618, |
| 18634 | VRNDSCALESSZm_Int = 18619, |
| 18635 | VRNDSCALESSZm_Intk = 18620, |
| 18636 | VRNDSCALESSZm_Intkz = 18621, |
| 18637 | VRNDSCALESSZr = 18622, |
| 18638 | VRNDSCALESSZr_Int = 18623, |
| 18639 | VRNDSCALESSZr_Intk = 18624, |
| 18640 | VRNDSCALESSZr_Intkz = 18625, |
| 18641 | VRNDSCALESSZrb_Int = 18626, |
| 18642 | VRNDSCALESSZrb_Intk = 18627, |
| 18643 | VRNDSCALESSZrb_Intkz = 18628, |
| 18644 | VROUNDPDYmi = 18629, |
| 18645 | VROUNDPDYri = 18630, |
| 18646 | VROUNDPDmi = 18631, |
| 18647 | VROUNDPDri = 18632, |
| 18648 | VROUNDPSYmi = 18633, |
| 18649 | VROUNDPSYri = 18634, |
| 18650 | VROUNDPSmi = 18635, |
| 18651 | VROUNDPSri = 18636, |
| 18652 | VROUNDSDmi = 18637, |
| 18653 | VROUNDSDmi_Int = 18638, |
| 18654 | VROUNDSDri = 18639, |
| 18655 | VROUNDSDri_Int = 18640, |
| 18656 | VROUNDSSmi = 18641, |
| 18657 | VROUNDSSmi_Int = 18642, |
| 18658 | VROUNDSSri = 18643, |
| 18659 | VROUNDSSri_Int = 18644, |
| 18660 | VRSQRT14PDZ128m = 18645, |
| 18661 | VRSQRT14PDZ128mb = 18646, |
| 18662 | VRSQRT14PDZ128mbk = 18647, |
| 18663 | VRSQRT14PDZ128mbkz = 18648, |
| 18664 | VRSQRT14PDZ128mk = 18649, |
| 18665 | VRSQRT14PDZ128mkz = 18650, |
| 18666 | VRSQRT14PDZ128r = 18651, |
| 18667 | VRSQRT14PDZ128rk = 18652, |
| 18668 | VRSQRT14PDZ128rkz = 18653, |
| 18669 | VRSQRT14PDZ256m = 18654, |
| 18670 | VRSQRT14PDZ256mb = 18655, |
| 18671 | VRSQRT14PDZ256mbk = 18656, |
| 18672 | VRSQRT14PDZ256mbkz = 18657, |
| 18673 | VRSQRT14PDZ256mk = 18658, |
| 18674 | VRSQRT14PDZ256mkz = 18659, |
| 18675 | VRSQRT14PDZ256r = 18660, |
| 18676 | VRSQRT14PDZ256rk = 18661, |
| 18677 | VRSQRT14PDZ256rkz = 18662, |
| 18678 | VRSQRT14PDZm = 18663, |
| 18679 | VRSQRT14PDZmb = 18664, |
| 18680 | VRSQRT14PDZmbk = 18665, |
| 18681 | VRSQRT14PDZmbkz = 18666, |
| 18682 | VRSQRT14PDZmk = 18667, |
| 18683 | VRSQRT14PDZmkz = 18668, |
| 18684 | VRSQRT14PDZr = 18669, |
| 18685 | VRSQRT14PDZrk = 18670, |
| 18686 | VRSQRT14PDZrkz = 18671, |
| 18687 | VRSQRT14PSZ128m = 18672, |
| 18688 | VRSQRT14PSZ128mb = 18673, |
| 18689 | VRSQRT14PSZ128mbk = 18674, |
| 18690 | VRSQRT14PSZ128mbkz = 18675, |
| 18691 | VRSQRT14PSZ128mk = 18676, |
| 18692 | VRSQRT14PSZ128mkz = 18677, |
| 18693 | VRSQRT14PSZ128r = 18678, |
| 18694 | VRSQRT14PSZ128rk = 18679, |
| 18695 | VRSQRT14PSZ128rkz = 18680, |
| 18696 | VRSQRT14PSZ256m = 18681, |
| 18697 | VRSQRT14PSZ256mb = 18682, |
| 18698 | VRSQRT14PSZ256mbk = 18683, |
| 18699 | VRSQRT14PSZ256mbkz = 18684, |
| 18700 | VRSQRT14PSZ256mk = 18685, |
| 18701 | VRSQRT14PSZ256mkz = 18686, |
| 18702 | VRSQRT14PSZ256r = 18687, |
| 18703 | VRSQRT14PSZ256rk = 18688, |
| 18704 | VRSQRT14PSZ256rkz = 18689, |
| 18705 | VRSQRT14PSZm = 18690, |
| 18706 | VRSQRT14PSZmb = 18691, |
| 18707 | VRSQRT14PSZmbk = 18692, |
| 18708 | VRSQRT14PSZmbkz = 18693, |
| 18709 | VRSQRT14PSZmk = 18694, |
| 18710 | VRSQRT14PSZmkz = 18695, |
| 18711 | VRSQRT14PSZr = 18696, |
| 18712 | VRSQRT14PSZrk = 18697, |
| 18713 | VRSQRT14PSZrkz = 18698, |
| 18714 | VRSQRT14SDZrm = 18699, |
| 18715 | VRSQRT14SDZrmk = 18700, |
| 18716 | VRSQRT14SDZrmkz = 18701, |
| 18717 | VRSQRT14SDZrr = 18702, |
| 18718 | VRSQRT14SDZrrk = 18703, |
| 18719 | VRSQRT14SDZrrkz = 18704, |
| 18720 | VRSQRT14SSZrm = 18705, |
| 18721 | VRSQRT14SSZrmk = 18706, |
| 18722 | VRSQRT14SSZrmkz = 18707, |
| 18723 | VRSQRT14SSZrr = 18708, |
| 18724 | VRSQRT14SSZrrk = 18709, |
| 18725 | VRSQRT14SSZrrkz = 18710, |
| 18726 | VRSQRT28PDZm = 18711, |
| 18727 | VRSQRT28PDZmb = 18712, |
| 18728 | VRSQRT28PDZmbk = 18713, |
| 18729 | VRSQRT28PDZmbkz = 18714, |
| 18730 | VRSQRT28PDZmk = 18715, |
| 18731 | VRSQRT28PDZmkz = 18716, |
| 18732 | VRSQRT28PDZr = 18717, |
| 18733 | VRSQRT28PDZrb = 18718, |
| 18734 | VRSQRT28PDZrbk = 18719, |
| 18735 | VRSQRT28PDZrbkz = 18720, |
| 18736 | VRSQRT28PDZrk = 18721, |
| 18737 | VRSQRT28PDZrkz = 18722, |
| 18738 | VRSQRT28PSZm = 18723, |
| 18739 | VRSQRT28PSZmb = 18724, |
| 18740 | VRSQRT28PSZmbk = 18725, |
| 18741 | VRSQRT28PSZmbkz = 18726, |
| 18742 | VRSQRT28PSZmk = 18727, |
| 18743 | VRSQRT28PSZmkz = 18728, |
| 18744 | VRSQRT28PSZr = 18729, |
| 18745 | VRSQRT28PSZrb = 18730, |
| 18746 | VRSQRT28PSZrbk = 18731, |
| 18747 | VRSQRT28PSZrbkz = 18732, |
| 18748 | VRSQRT28PSZrk = 18733, |
| 18749 | VRSQRT28PSZrkz = 18734, |
| 18750 | VRSQRT28SDZm = 18735, |
| 18751 | VRSQRT28SDZmk = 18736, |
| 18752 | VRSQRT28SDZmkz = 18737, |
| 18753 | VRSQRT28SDZr = 18738, |
| 18754 | VRSQRT28SDZrb = 18739, |
| 18755 | VRSQRT28SDZrbk = 18740, |
| 18756 | VRSQRT28SDZrbkz = 18741, |
| 18757 | VRSQRT28SDZrk = 18742, |
| 18758 | VRSQRT28SDZrkz = 18743, |
| 18759 | VRSQRT28SSZm = 18744, |
| 18760 | VRSQRT28SSZmk = 18745, |
| 18761 | VRSQRT28SSZmkz = 18746, |
| 18762 | VRSQRT28SSZr = 18747, |
| 18763 | VRSQRT28SSZrb = 18748, |
| 18764 | VRSQRT28SSZrbk = 18749, |
| 18765 | VRSQRT28SSZrbkz = 18750, |
| 18766 | VRSQRT28SSZrk = 18751, |
| 18767 | VRSQRT28SSZrkz = 18752, |
| 18768 | VRSQRTPHZ128m = 18753, |
| 18769 | VRSQRTPHZ128mb = 18754, |
| 18770 | VRSQRTPHZ128mbk = 18755, |
| 18771 | VRSQRTPHZ128mbkz = 18756, |
| 18772 | VRSQRTPHZ128mk = 18757, |
| 18773 | VRSQRTPHZ128mkz = 18758, |
| 18774 | VRSQRTPHZ128r = 18759, |
| 18775 | VRSQRTPHZ128rk = 18760, |
| 18776 | VRSQRTPHZ128rkz = 18761, |
| 18777 | VRSQRTPHZ256m = 18762, |
| 18778 | VRSQRTPHZ256mb = 18763, |
| 18779 | VRSQRTPHZ256mbk = 18764, |
| 18780 | VRSQRTPHZ256mbkz = 18765, |
| 18781 | VRSQRTPHZ256mk = 18766, |
| 18782 | VRSQRTPHZ256mkz = 18767, |
| 18783 | VRSQRTPHZ256r = 18768, |
| 18784 | VRSQRTPHZ256rk = 18769, |
| 18785 | VRSQRTPHZ256rkz = 18770, |
| 18786 | VRSQRTPHZm = 18771, |
| 18787 | VRSQRTPHZmb = 18772, |
| 18788 | VRSQRTPHZmbk = 18773, |
| 18789 | VRSQRTPHZmbkz = 18774, |
| 18790 | VRSQRTPHZmk = 18775, |
| 18791 | VRSQRTPHZmkz = 18776, |
| 18792 | VRSQRTPHZr = 18777, |
| 18793 | VRSQRTPHZrk = 18778, |
| 18794 | VRSQRTPHZrkz = 18779, |
| 18795 | VRSQRTPSYm = 18780, |
| 18796 | VRSQRTPSYr = 18781, |
| 18797 | VRSQRTPSm = 18782, |
| 18798 | VRSQRTPSr = 18783, |
| 18799 | VRSQRTSHZrm = 18784, |
| 18800 | VRSQRTSHZrmk = 18785, |
| 18801 | VRSQRTSHZrmkz = 18786, |
| 18802 | VRSQRTSHZrr = 18787, |
| 18803 | VRSQRTSHZrrk = 18788, |
| 18804 | VRSQRTSHZrrkz = 18789, |
| 18805 | VRSQRTSSm = 18790, |
| 18806 | VRSQRTSSm_Int = 18791, |
| 18807 | VRSQRTSSr = 18792, |
| 18808 | VRSQRTSSr_Int = 18793, |
| 18809 | VSCALEFPDZ128rm = 18794, |
| 18810 | VSCALEFPDZ128rmb = 18795, |
| 18811 | VSCALEFPDZ128rmbk = 18796, |
| 18812 | VSCALEFPDZ128rmbkz = 18797, |
| 18813 | VSCALEFPDZ128rmk = 18798, |
| 18814 | VSCALEFPDZ128rmkz = 18799, |
| 18815 | VSCALEFPDZ128rr = 18800, |
| 18816 | VSCALEFPDZ128rrk = 18801, |
| 18817 | VSCALEFPDZ128rrkz = 18802, |
| 18818 | VSCALEFPDZ256rm = 18803, |
| 18819 | VSCALEFPDZ256rmb = 18804, |
| 18820 | VSCALEFPDZ256rmbk = 18805, |
| 18821 | VSCALEFPDZ256rmbkz = 18806, |
| 18822 | VSCALEFPDZ256rmk = 18807, |
| 18823 | VSCALEFPDZ256rmkz = 18808, |
| 18824 | VSCALEFPDZ256rr = 18809, |
| 18825 | VSCALEFPDZ256rrk = 18810, |
| 18826 | VSCALEFPDZ256rrkz = 18811, |
| 18827 | VSCALEFPDZrm = 18812, |
| 18828 | VSCALEFPDZrmb = 18813, |
| 18829 | VSCALEFPDZrmbk = 18814, |
| 18830 | VSCALEFPDZrmbkz = 18815, |
| 18831 | VSCALEFPDZrmk = 18816, |
| 18832 | VSCALEFPDZrmkz = 18817, |
| 18833 | VSCALEFPDZrr = 18818, |
| 18834 | VSCALEFPDZrrb = 18819, |
| 18835 | VSCALEFPDZrrbk = 18820, |
| 18836 | VSCALEFPDZrrbkz = 18821, |
| 18837 | VSCALEFPDZrrk = 18822, |
| 18838 | VSCALEFPDZrrkz = 18823, |
| 18839 | VSCALEFPHZ128rm = 18824, |
| 18840 | VSCALEFPHZ128rmb = 18825, |
| 18841 | VSCALEFPHZ128rmbk = 18826, |
| 18842 | VSCALEFPHZ128rmbkz = 18827, |
| 18843 | VSCALEFPHZ128rmk = 18828, |
| 18844 | VSCALEFPHZ128rmkz = 18829, |
| 18845 | VSCALEFPHZ128rr = 18830, |
| 18846 | VSCALEFPHZ128rrk = 18831, |
| 18847 | VSCALEFPHZ128rrkz = 18832, |
| 18848 | VSCALEFPHZ256rm = 18833, |
| 18849 | VSCALEFPHZ256rmb = 18834, |
| 18850 | VSCALEFPHZ256rmbk = 18835, |
| 18851 | VSCALEFPHZ256rmbkz = 18836, |
| 18852 | VSCALEFPHZ256rmk = 18837, |
| 18853 | VSCALEFPHZ256rmkz = 18838, |
| 18854 | VSCALEFPHZ256rr = 18839, |
| 18855 | VSCALEFPHZ256rrk = 18840, |
| 18856 | VSCALEFPHZ256rrkz = 18841, |
| 18857 | VSCALEFPHZrm = 18842, |
| 18858 | VSCALEFPHZrmb = 18843, |
| 18859 | VSCALEFPHZrmbk = 18844, |
| 18860 | VSCALEFPHZrmbkz = 18845, |
| 18861 | VSCALEFPHZrmk = 18846, |
| 18862 | VSCALEFPHZrmkz = 18847, |
| 18863 | VSCALEFPHZrr = 18848, |
| 18864 | VSCALEFPHZrrb = 18849, |
| 18865 | VSCALEFPHZrrbk = 18850, |
| 18866 | VSCALEFPHZrrbkz = 18851, |
| 18867 | VSCALEFPHZrrk = 18852, |
| 18868 | VSCALEFPHZrrkz = 18853, |
| 18869 | VSCALEFPSZ128rm = 18854, |
| 18870 | VSCALEFPSZ128rmb = 18855, |
| 18871 | VSCALEFPSZ128rmbk = 18856, |
| 18872 | VSCALEFPSZ128rmbkz = 18857, |
| 18873 | VSCALEFPSZ128rmk = 18858, |
| 18874 | VSCALEFPSZ128rmkz = 18859, |
| 18875 | VSCALEFPSZ128rr = 18860, |
| 18876 | VSCALEFPSZ128rrk = 18861, |
| 18877 | VSCALEFPSZ128rrkz = 18862, |
| 18878 | VSCALEFPSZ256rm = 18863, |
| 18879 | VSCALEFPSZ256rmb = 18864, |
| 18880 | VSCALEFPSZ256rmbk = 18865, |
| 18881 | VSCALEFPSZ256rmbkz = 18866, |
| 18882 | VSCALEFPSZ256rmk = 18867, |
| 18883 | VSCALEFPSZ256rmkz = 18868, |
| 18884 | VSCALEFPSZ256rr = 18869, |
| 18885 | VSCALEFPSZ256rrk = 18870, |
| 18886 | VSCALEFPSZ256rrkz = 18871, |
| 18887 | VSCALEFPSZrm = 18872, |
| 18888 | VSCALEFPSZrmb = 18873, |
| 18889 | VSCALEFPSZrmbk = 18874, |
| 18890 | VSCALEFPSZrmbkz = 18875, |
| 18891 | VSCALEFPSZrmk = 18876, |
| 18892 | VSCALEFPSZrmkz = 18877, |
| 18893 | VSCALEFPSZrr = 18878, |
| 18894 | VSCALEFPSZrrb = 18879, |
| 18895 | VSCALEFPSZrrbk = 18880, |
| 18896 | VSCALEFPSZrrbkz = 18881, |
| 18897 | VSCALEFPSZrrk = 18882, |
| 18898 | VSCALEFPSZrrkz = 18883, |
| 18899 | VSCALEFSDZrm = 18884, |
| 18900 | VSCALEFSDZrmk = 18885, |
| 18901 | VSCALEFSDZrmkz = 18886, |
| 18902 | VSCALEFSDZrr = 18887, |
| 18903 | VSCALEFSDZrrb_Int = 18888, |
| 18904 | VSCALEFSDZrrb_Intk = 18889, |
| 18905 | VSCALEFSDZrrb_Intkz = 18890, |
| 18906 | VSCALEFSDZrrk = 18891, |
| 18907 | VSCALEFSDZrrkz = 18892, |
| 18908 | VSCALEFSHZrm = 18893, |
| 18909 | VSCALEFSHZrmk = 18894, |
| 18910 | VSCALEFSHZrmkz = 18895, |
| 18911 | VSCALEFSHZrr = 18896, |
| 18912 | VSCALEFSHZrrb_Int = 18897, |
| 18913 | VSCALEFSHZrrb_Intk = 18898, |
| 18914 | VSCALEFSHZrrb_Intkz = 18899, |
| 18915 | VSCALEFSHZrrk = 18900, |
| 18916 | VSCALEFSHZrrkz = 18901, |
| 18917 | VSCALEFSSZrm = 18902, |
| 18918 | VSCALEFSSZrmk = 18903, |
| 18919 | VSCALEFSSZrmkz = 18904, |
| 18920 | VSCALEFSSZrr = 18905, |
| 18921 | VSCALEFSSZrrb_Int = 18906, |
| 18922 | VSCALEFSSZrrb_Intk = 18907, |
| 18923 | VSCALEFSSZrrb_Intkz = 18908, |
| 18924 | VSCALEFSSZrrk = 18909, |
| 18925 | VSCALEFSSZrrkz = 18910, |
| 18926 | VSCATTERDPDZ128mr = 18911, |
| 18927 | VSCATTERDPDZ256mr = 18912, |
| 18928 | VSCATTERDPDZmr = 18913, |
| 18929 | VSCATTERDPSZ128mr = 18914, |
| 18930 | VSCATTERDPSZ256mr = 18915, |
| 18931 | VSCATTERDPSZmr = 18916, |
| 18932 | VSCATTERPF0DPDm = 18917, |
| 18933 | VSCATTERPF0DPSm = 18918, |
| 18934 | VSCATTERPF0QPDm = 18919, |
| 18935 | VSCATTERPF0QPSm = 18920, |
| 18936 | VSCATTERPF1DPDm = 18921, |
| 18937 | VSCATTERPF1DPSm = 18922, |
| 18938 | VSCATTERPF1QPDm = 18923, |
| 18939 | VSCATTERPF1QPSm = 18924, |
| 18940 | VSCATTERQPDZ128mr = 18925, |
| 18941 | VSCATTERQPDZ256mr = 18926, |
| 18942 | VSCATTERQPDZmr = 18927, |
| 18943 | VSCATTERQPSZ128mr = 18928, |
| 18944 | VSCATTERQPSZ256mr = 18929, |
| 18945 | VSCATTERQPSZmr = 18930, |
| 18946 | VSHA512MSG1rr = 18931, |
| 18947 | VSHA512MSG2rr = 18932, |
| 18948 | VSHA512RNDS2rr = 18933, |
| 18949 | VSHUFF32X4Z256rmbi = 18934, |
| 18950 | VSHUFF32X4Z256rmbik = 18935, |
| 18951 | VSHUFF32X4Z256rmbikz = 18936, |
| 18952 | VSHUFF32X4Z256rmi = 18937, |
| 18953 | VSHUFF32X4Z256rmik = 18938, |
| 18954 | VSHUFF32X4Z256rmikz = 18939, |
| 18955 | VSHUFF32X4Z256rri = 18940, |
| 18956 | VSHUFF32X4Z256rrik = 18941, |
| 18957 | VSHUFF32X4Z256rrikz = 18942, |
| 18958 | VSHUFF32X4Zrmbi = 18943, |
| 18959 | VSHUFF32X4Zrmbik = 18944, |
| 18960 | VSHUFF32X4Zrmbikz = 18945, |
| 18961 | VSHUFF32X4Zrmi = 18946, |
| 18962 | VSHUFF32X4Zrmik = 18947, |
| 18963 | VSHUFF32X4Zrmikz = 18948, |
| 18964 | VSHUFF32X4Zrri = 18949, |
| 18965 | VSHUFF32X4Zrrik = 18950, |
| 18966 | VSHUFF32X4Zrrikz = 18951, |
| 18967 | VSHUFF64X2Z256rmbi = 18952, |
| 18968 | VSHUFF64X2Z256rmbik = 18953, |
| 18969 | VSHUFF64X2Z256rmbikz = 18954, |
| 18970 | VSHUFF64X2Z256rmi = 18955, |
| 18971 | VSHUFF64X2Z256rmik = 18956, |
| 18972 | VSHUFF64X2Z256rmikz = 18957, |
| 18973 | VSHUFF64X2Z256rri = 18958, |
| 18974 | VSHUFF64X2Z256rrik = 18959, |
| 18975 | VSHUFF64X2Z256rrikz = 18960, |
| 18976 | VSHUFF64X2Zrmbi = 18961, |
| 18977 | VSHUFF64X2Zrmbik = 18962, |
| 18978 | VSHUFF64X2Zrmbikz = 18963, |
| 18979 | VSHUFF64X2Zrmi = 18964, |
| 18980 | VSHUFF64X2Zrmik = 18965, |
| 18981 | VSHUFF64X2Zrmikz = 18966, |
| 18982 | VSHUFF64X2Zrri = 18967, |
| 18983 | VSHUFF64X2Zrrik = 18968, |
| 18984 | VSHUFF64X2Zrrikz = 18969, |
| 18985 | VSHUFI32X4Z256rmbi = 18970, |
| 18986 | VSHUFI32X4Z256rmbik = 18971, |
| 18987 | VSHUFI32X4Z256rmbikz = 18972, |
| 18988 | VSHUFI32X4Z256rmi = 18973, |
| 18989 | VSHUFI32X4Z256rmik = 18974, |
| 18990 | VSHUFI32X4Z256rmikz = 18975, |
| 18991 | VSHUFI32X4Z256rri = 18976, |
| 18992 | VSHUFI32X4Z256rrik = 18977, |
| 18993 | VSHUFI32X4Z256rrikz = 18978, |
| 18994 | VSHUFI32X4Zrmbi = 18979, |
| 18995 | VSHUFI32X4Zrmbik = 18980, |
| 18996 | VSHUFI32X4Zrmbikz = 18981, |
| 18997 | VSHUFI32X4Zrmi = 18982, |
| 18998 | VSHUFI32X4Zrmik = 18983, |
| 18999 | VSHUFI32X4Zrmikz = 18984, |
| 19000 | VSHUFI32X4Zrri = 18985, |
| 19001 | VSHUFI32X4Zrrik = 18986, |
| 19002 | VSHUFI32X4Zrrikz = 18987, |
| 19003 | VSHUFI64X2Z256rmbi = 18988, |
| 19004 | VSHUFI64X2Z256rmbik = 18989, |
| 19005 | VSHUFI64X2Z256rmbikz = 18990, |
| 19006 | VSHUFI64X2Z256rmi = 18991, |
| 19007 | VSHUFI64X2Z256rmik = 18992, |
| 19008 | VSHUFI64X2Z256rmikz = 18993, |
| 19009 | VSHUFI64X2Z256rri = 18994, |
| 19010 | VSHUFI64X2Z256rrik = 18995, |
| 19011 | VSHUFI64X2Z256rrikz = 18996, |
| 19012 | VSHUFI64X2Zrmbi = 18997, |
| 19013 | VSHUFI64X2Zrmbik = 18998, |
| 19014 | VSHUFI64X2Zrmbikz = 18999, |
| 19015 | VSHUFI64X2Zrmi = 19000, |
| 19016 | VSHUFI64X2Zrmik = 19001, |
| 19017 | VSHUFI64X2Zrmikz = 19002, |
| 19018 | VSHUFI64X2Zrri = 19003, |
| 19019 | VSHUFI64X2Zrrik = 19004, |
| 19020 | VSHUFI64X2Zrrikz = 19005, |
| 19021 | VSHUFPDYrmi = 19006, |
| 19022 | VSHUFPDYrri = 19007, |
| 19023 | VSHUFPDZ128rmbi = 19008, |
| 19024 | VSHUFPDZ128rmbik = 19009, |
| 19025 | VSHUFPDZ128rmbikz = 19010, |
| 19026 | VSHUFPDZ128rmi = 19011, |
| 19027 | VSHUFPDZ128rmik = 19012, |
| 19028 | VSHUFPDZ128rmikz = 19013, |
| 19029 | VSHUFPDZ128rri = 19014, |
| 19030 | VSHUFPDZ128rrik = 19015, |
| 19031 | VSHUFPDZ128rrikz = 19016, |
| 19032 | VSHUFPDZ256rmbi = 19017, |
| 19033 | VSHUFPDZ256rmbik = 19018, |
| 19034 | VSHUFPDZ256rmbikz = 19019, |
| 19035 | VSHUFPDZ256rmi = 19020, |
| 19036 | VSHUFPDZ256rmik = 19021, |
| 19037 | VSHUFPDZ256rmikz = 19022, |
| 19038 | VSHUFPDZ256rri = 19023, |
| 19039 | VSHUFPDZ256rrik = 19024, |
| 19040 | VSHUFPDZ256rrikz = 19025, |
| 19041 | VSHUFPDZrmbi = 19026, |
| 19042 | VSHUFPDZrmbik = 19027, |
| 19043 | VSHUFPDZrmbikz = 19028, |
| 19044 | VSHUFPDZrmi = 19029, |
| 19045 | VSHUFPDZrmik = 19030, |
| 19046 | VSHUFPDZrmikz = 19031, |
| 19047 | VSHUFPDZrri = 19032, |
| 19048 | VSHUFPDZrrik = 19033, |
| 19049 | VSHUFPDZrrikz = 19034, |
| 19050 | VSHUFPDrmi = 19035, |
| 19051 | VSHUFPDrri = 19036, |
| 19052 | VSHUFPSYrmi = 19037, |
| 19053 | VSHUFPSYrri = 19038, |
| 19054 | VSHUFPSZ128rmbi = 19039, |
| 19055 | VSHUFPSZ128rmbik = 19040, |
| 19056 | VSHUFPSZ128rmbikz = 19041, |
| 19057 | VSHUFPSZ128rmi = 19042, |
| 19058 | VSHUFPSZ128rmik = 19043, |
| 19059 | VSHUFPSZ128rmikz = 19044, |
| 19060 | VSHUFPSZ128rri = 19045, |
| 19061 | VSHUFPSZ128rrik = 19046, |
| 19062 | VSHUFPSZ128rrikz = 19047, |
| 19063 | VSHUFPSZ256rmbi = 19048, |
| 19064 | VSHUFPSZ256rmbik = 19049, |
| 19065 | VSHUFPSZ256rmbikz = 19050, |
| 19066 | VSHUFPSZ256rmi = 19051, |
| 19067 | VSHUFPSZ256rmik = 19052, |
| 19068 | VSHUFPSZ256rmikz = 19053, |
| 19069 | VSHUFPSZ256rri = 19054, |
| 19070 | VSHUFPSZ256rrik = 19055, |
| 19071 | VSHUFPSZ256rrikz = 19056, |
| 19072 | VSHUFPSZrmbi = 19057, |
| 19073 | VSHUFPSZrmbik = 19058, |
| 19074 | VSHUFPSZrmbikz = 19059, |
| 19075 | VSHUFPSZrmi = 19060, |
| 19076 | VSHUFPSZrmik = 19061, |
| 19077 | VSHUFPSZrmikz = 19062, |
| 19078 | VSHUFPSZrri = 19063, |
| 19079 | VSHUFPSZrrik = 19064, |
| 19080 | VSHUFPSZrrikz = 19065, |
| 19081 | VSHUFPSrmi = 19066, |
| 19082 | VSHUFPSrri = 19067, |
| 19083 | VSM3MSG1rm = 19068, |
| 19084 | VSM3MSG1rr = 19069, |
| 19085 | VSM3MSG2rm = 19070, |
| 19086 | VSM3MSG2rr = 19071, |
| 19087 | VSM3RNDS2rm = 19072, |
| 19088 | VSM3RNDS2rr = 19073, |
| 19089 | VSM4KEY4Yrm = 19074, |
| 19090 | VSM4KEY4Yrr = 19075, |
| 19091 | VSM4KEY4rm = 19076, |
| 19092 | VSM4KEY4rr = 19077, |
| 19093 | VSM4RNDS4Yrm = 19078, |
| 19094 | VSM4RNDS4Yrr = 19079, |
| 19095 | VSM4RNDS4rm = 19080, |
| 19096 | VSM4RNDS4rr = 19081, |
| 19097 | VSQRTPDYm = 19082, |
| 19098 | VSQRTPDYr = 19083, |
| 19099 | VSQRTPDZ128m = 19084, |
| 19100 | VSQRTPDZ128mb = 19085, |
| 19101 | VSQRTPDZ128mbk = 19086, |
| 19102 | VSQRTPDZ128mbkz = 19087, |
| 19103 | VSQRTPDZ128mk = 19088, |
| 19104 | VSQRTPDZ128mkz = 19089, |
| 19105 | VSQRTPDZ128r = 19090, |
| 19106 | VSQRTPDZ128rk = 19091, |
| 19107 | VSQRTPDZ128rkz = 19092, |
| 19108 | VSQRTPDZ256m = 19093, |
| 19109 | VSQRTPDZ256mb = 19094, |
| 19110 | VSQRTPDZ256mbk = 19095, |
| 19111 | VSQRTPDZ256mbkz = 19096, |
| 19112 | VSQRTPDZ256mk = 19097, |
| 19113 | VSQRTPDZ256mkz = 19098, |
| 19114 | VSQRTPDZ256r = 19099, |
| 19115 | VSQRTPDZ256rk = 19100, |
| 19116 | VSQRTPDZ256rkz = 19101, |
| 19117 | VSQRTPDZm = 19102, |
| 19118 | VSQRTPDZmb = 19103, |
| 19119 | VSQRTPDZmbk = 19104, |
| 19120 | VSQRTPDZmbkz = 19105, |
| 19121 | VSQRTPDZmk = 19106, |
| 19122 | VSQRTPDZmkz = 19107, |
| 19123 | VSQRTPDZr = 19108, |
| 19124 | VSQRTPDZrb = 19109, |
| 19125 | VSQRTPDZrbk = 19110, |
| 19126 | VSQRTPDZrbkz = 19111, |
| 19127 | VSQRTPDZrk = 19112, |
| 19128 | VSQRTPDZrkz = 19113, |
| 19129 | VSQRTPDm = 19114, |
| 19130 | VSQRTPDr = 19115, |
| 19131 | VSQRTPHZ128m = 19116, |
| 19132 | VSQRTPHZ128mb = 19117, |
| 19133 | VSQRTPHZ128mbk = 19118, |
| 19134 | VSQRTPHZ128mbkz = 19119, |
| 19135 | VSQRTPHZ128mk = 19120, |
| 19136 | VSQRTPHZ128mkz = 19121, |
| 19137 | VSQRTPHZ128r = 19122, |
| 19138 | VSQRTPHZ128rk = 19123, |
| 19139 | VSQRTPHZ128rkz = 19124, |
| 19140 | VSQRTPHZ256m = 19125, |
| 19141 | VSQRTPHZ256mb = 19126, |
| 19142 | VSQRTPHZ256mbk = 19127, |
| 19143 | VSQRTPHZ256mbkz = 19128, |
| 19144 | VSQRTPHZ256mk = 19129, |
| 19145 | VSQRTPHZ256mkz = 19130, |
| 19146 | VSQRTPHZ256r = 19131, |
| 19147 | VSQRTPHZ256rk = 19132, |
| 19148 | VSQRTPHZ256rkz = 19133, |
| 19149 | VSQRTPHZm = 19134, |
| 19150 | VSQRTPHZmb = 19135, |
| 19151 | VSQRTPHZmbk = 19136, |
| 19152 | VSQRTPHZmbkz = 19137, |
| 19153 | VSQRTPHZmk = 19138, |
| 19154 | VSQRTPHZmkz = 19139, |
| 19155 | VSQRTPHZr = 19140, |
| 19156 | VSQRTPHZrb = 19141, |
| 19157 | VSQRTPHZrbk = 19142, |
| 19158 | VSQRTPHZrbkz = 19143, |
| 19159 | VSQRTPHZrk = 19144, |
| 19160 | VSQRTPHZrkz = 19145, |
| 19161 | VSQRTPSYm = 19146, |
| 19162 | VSQRTPSYr = 19147, |
| 19163 | VSQRTPSZ128m = 19148, |
| 19164 | VSQRTPSZ128mb = 19149, |
| 19165 | VSQRTPSZ128mbk = 19150, |
| 19166 | VSQRTPSZ128mbkz = 19151, |
| 19167 | VSQRTPSZ128mk = 19152, |
| 19168 | VSQRTPSZ128mkz = 19153, |
| 19169 | VSQRTPSZ128r = 19154, |
| 19170 | VSQRTPSZ128rk = 19155, |
| 19171 | VSQRTPSZ128rkz = 19156, |
| 19172 | VSQRTPSZ256m = 19157, |
| 19173 | VSQRTPSZ256mb = 19158, |
| 19174 | VSQRTPSZ256mbk = 19159, |
| 19175 | VSQRTPSZ256mbkz = 19160, |
| 19176 | VSQRTPSZ256mk = 19161, |
| 19177 | VSQRTPSZ256mkz = 19162, |
| 19178 | VSQRTPSZ256r = 19163, |
| 19179 | VSQRTPSZ256rk = 19164, |
| 19180 | VSQRTPSZ256rkz = 19165, |
| 19181 | VSQRTPSZm = 19166, |
| 19182 | VSQRTPSZmb = 19167, |
| 19183 | VSQRTPSZmbk = 19168, |
| 19184 | VSQRTPSZmbkz = 19169, |
| 19185 | VSQRTPSZmk = 19170, |
| 19186 | VSQRTPSZmkz = 19171, |
| 19187 | VSQRTPSZr = 19172, |
| 19188 | VSQRTPSZrb = 19173, |
| 19189 | VSQRTPSZrbk = 19174, |
| 19190 | VSQRTPSZrbkz = 19175, |
| 19191 | VSQRTPSZrk = 19176, |
| 19192 | VSQRTPSZrkz = 19177, |
| 19193 | VSQRTPSm = 19178, |
| 19194 | VSQRTPSr = 19179, |
| 19195 | VSQRTSDZm = 19180, |
| 19196 | VSQRTSDZm_Int = 19181, |
| 19197 | VSQRTSDZm_Intk = 19182, |
| 19198 | VSQRTSDZm_Intkz = 19183, |
| 19199 | VSQRTSDZr = 19184, |
| 19200 | VSQRTSDZr_Int = 19185, |
| 19201 | VSQRTSDZr_Intk = 19186, |
| 19202 | VSQRTSDZr_Intkz = 19187, |
| 19203 | VSQRTSDZrb_Int = 19188, |
| 19204 | VSQRTSDZrb_Intk = 19189, |
| 19205 | VSQRTSDZrb_Intkz = 19190, |
| 19206 | VSQRTSDm = 19191, |
| 19207 | VSQRTSDm_Int = 19192, |
| 19208 | VSQRTSDr = 19193, |
| 19209 | VSQRTSDr_Int = 19194, |
| 19210 | VSQRTSHZm = 19195, |
| 19211 | VSQRTSHZm_Int = 19196, |
| 19212 | VSQRTSHZm_Intk = 19197, |
| 19213 | VSQRTSHZm_Intkz = 19198, |
| 19214 | VSQRTSHZr = 19199, |
| 19215 | VSQRTSHZr_Int = 19200, |
| 19216 | VSQRTSHZr_Intk = 19201, |
| 19217 | VSQRTSHZr_Intkz = 19202, |
| 19218 | VSQRTSHZrb_Int = 19203, |
| 19219 | VSQRTSHZrb_Intk = 19204, |
| 19220 | VSQRTSHZrb_Intkz = 19205, |
| 19221 | VSQRTSSZm = 19206, |
| 19222 | VSQRTSSZm_Int = 19207, |
| 19223 | VSQRTSSZm_Intk = 19208, |
| 19224 | VSQRTSSZm_Intkz = 19209, |
| 19225 | VSQRTSSZr = 19210, |
| 19226 | VSQRTSSZr_Int = 19211, |
| 19227 | VSQRTSSZr_Intk = 19212, |
| 19228 | VSQRTSSZr_Intkz = 19213, |
| 19229 | VSQRTSSZrb_Int = 19214, |
| 19230 | VSQRTSSZrb_Intk = 19215, |
| 19231 | VSQRTSSZrb_Intkz = 19216, |
| 19232 | VSQRTSSm = 19217, |
| 19233 | VSQRTSSm_Int = 19218, |
| 19234 | VSQRTSSr = 19219, |
| 19235 | VSQRTSSr_Int = 19220, |
| 19236 | VSTMXCSR = 19221, |
| 19237 | VSUBPDYrm = 19222, |
| 19238 | VSUBPDYrr = 19223, |
| 19239 | VSUBPDZ128rm = 19224, |
| 19240 | VSUBPDZ128rmb = 19225, |
| 19241 | VSUBPDZ128rmbk = 19226, |
| 19242 | VSUBPDZ128rmbkz = 19227, |
| 19243 | VSUBPDZ128rmk = 19228, |
| 19244 | VSUBPDZ128rmkz = 19229, |
| 19245 | VSUBPDZ128rr = 19230, |
| 19246 | VSUBPDZ128rrk = 19231, |
| 19247 | VSUBPDZ128rrkz = 19232, |
| 19248 | VSUBPDZ256rm = 19233, |
| 19249 | VSUBPDZ256rmb = 19234, |
| 19250 | VSUBPDZ256rmbk = 19235, |
| 19251 | VSUBPDZ256rmbkz = 19236, |
| 19252 | VSUBPDZ256rmk = 19237, |
| 19253 | VSUBPDZ256rmkz = 19238, |
| 19254 | VSUBPDZ256rr = 19239, |
| 19255 | VSUBPDZ256rrk = 19240, |
| 19256 | VSUBPDZ256rrkz = 19241, |
| 19257 | VSUBPDZrm = 19242, |
| 19258 | VSUBPDZrmb = 19243, |
| 19259 | VSUBPDZrmbk = 19244, |
| 19260 | VSUBPDZrmbkz = 19245, |
| 19261 | VSUBPDZrmk = 19246, |
| 19262 | VSUBPDZrmkz = 19247, |
| 19263 | VSUBPDZrr = 19248, |
| 19264 | VSUBPDZrrb = 19249, |
| 19265 | VSUBPDZrrbk = 19250, |
| 19266 | VSUBPDZrrbkz = 19251, |
| 19267 | VSUBPDZrrk = 19252, |
| 19268 | VSUBPDZrrkz = 19253, |
| 19269 | VSUBPDrm = 19254, |
| 19270 | VSUBPDrr = 19255, |
| 19271 | VSUBPHZ128rm = 19256, |
| 19272 | VSUBPHZ128rmb = 19257, |
| 19273 | VSUBPHZ128rmbk = 19258, |
| 19274 | VSUBPHZ128rmbkz = 19259, |
| 19275 | VSUBPHZ128rmk = 19260, |
| 19276 | VSUBPHZ128rmkz = 19261, |
| 19277 | VSUBPHZ128rr = 19262, |
| 19278 | VSUBPHZ128rrk = 19263, |
| 19279 | VSUBPHZ128rrkz = 19264, |
| 19280 | VSUBPHZ256rm = 19265, |
| 19281 | VSUBPHZ256rmb = 19266, |
| 19282 | VSUBPHZ256rmbk = 19267, |
| 19283 | VSUBPHZ256rmbkz = 19268, |
| 19284 | VSUBPHZ256rmk = 19269, |
| 19285 | VSUBPHZ256rmkz = 19270, |
| 19286 | VSUBPHZ256rr = 19271, |
| 19287 | VSUBPHZ256rrk = 19272, |
| 19288 | VSUBPHZ256rrkz = 19273, |
| 19289 | VSUBPHZrm = 19274, |
| 19290 | VSUBPHZrmb = 19275, |
| 19291 | VSUBPHZrmbk = 19276, |
| 19292 | VSUBPHZrmbkz = 19277, |
| 19293 | VSUBPHZrmk = 19278, |
| 19294 | VSUBPHZrmkz = 19279, |
| 19295 | VSUBPHZrr = 19280, |
| 19296 | VSUBPHZrrb = 19281, |
| 19297 | VSUBPHZrrbk = 19282, |
| 19298 | VSUBPHZrrbkz = 19283, |
| 19299 | VSUBPHZrrk = 19284, |
| 19300 | VSUBPHZrrkz = 19285, |
| 19301 | VSUBPSYrm = 19286, |
| 19302 | VSUBPSYrr = 19287, |
| 19303 | VSUBPSZ128rm = 19288, |
| 19304 | VSUBPSZ128rmb = 19289, |
| 19305 | VSUBPSZ128rmbk = 19290, |
| 19306 | VSUBPSZ128rmbkz = 19291, |
| 19307 | VSUBPSZ128rmk = 19292, |
| 19308 | VSUBPSZ128rmkz = 19293, |
| 19309 | VSUBPSZ128rr = 19294, |
| 19310 | VSUBPSZ128rrk = 19295, |
| 19311 | VSUBPSZ128rrkz = 19296, |
| 19312 | VSUBPSZ256rm = 19297, |
| 19313 | VSUBPSZ256rmb = 19298, |
| 19314 | VSUBPSZ256rmbk = 19299, |
| 19315 | VSUBPSZ256rmbkz = 19300, |
| 19316 | VSUBPSZ256rmk = 19301, |
| 19317 | VSUBPSZ256rmkz = 19302, |
| 19318 | VSUBPSZ256rr = 19303, |
| 19319 | VSUBPSZ256rrk = 19304, |
| 19320 | VSUBPSZ256rrkz = 19305, |
| 19321 | VSUBPSZrm = 19306, |
| 19322 | VSUBPSZrmb = 19307, |
| 19323 | VSUBPSZrmbk = 19308, |
| 19324 | VSUBPSZrmbkz = 19309, |
| 19325 | VSUBPSZrmk = 19310, |
| 19326 | VSUBPSZrmkz = 19311, |
| 19327 | VSUBPSZrr = 19312, |
| 19328 | VSUBPSZrrb = 19313, |
| 19329 | VSUBPSZrrbk = 19314, |
| 19330 | VSUBPSZrrbkz = 19315, |
| 19331 | VSUBPSZrrk = 19316, |
| 19332 | VSUBPSZrrkz = 19317, |
| 19333 | VSUBPSrm = 19318, |
| 19334 | VSUBPSrr = 19319, |
| 19335 | VSUBSDZrm = 19320, |
| 19336 | VSUBSDZrm_Int = 19321, |
| 19337 | VSUBSDZrm_Intk = 19322, |
| 19338 | VSUBSDZrm_Intkz = 19323, |
| 19339 | VSUBSDZrr = 19324, |
| 19340 | VSUBSDZrr_Int = 19325, |
| 19341 | VSUBSDZrr_Intk = 19326, |
| 19342 | VSUBSDZrr_Intkz = 19327, |
| 19343 | VSUBSDZrrb_Int = 19328, |
| 19344 | VSUBSDZrrb_Intk = 19329, |
| 19345 | VSUBSDZrrb_Intkz = 19330, |
| 19346 | VSUBSDrm = 19331, |
| 19347 | VSUBSDrm_Int = 19332, |
| 19348 | VSUBSDrr = 19333, |
| 19349 | VSUBSDrr_Int = 19334, |
| 19350 | VSUBSHZrm = 19335, |
| 19351 | VSUBSHZrm_Int = 19336, |
| 19352 | VSUBSHZrm_Intk = 19337, |
| 19353 | VSUBSHZrm_Intkz = 19338, |
| 19354 | VSUBSHZrr = 19339, |
| 19355 | VSUBSHZrr_Int = 19340, |
| 19356 | VSUBSHZrr_Intk = 19341, |
| 19357 | VSUBSHZrr_Intkz = 19342, |
| 19358 | VSUBSHZrrb_Int = 19343, |
| 19359 | VSUBSHZrrb_Intk = 19344, |
| 19360 | VSUBSHZrrb_Intkz = 19345, |
| 19361 | VSUBSSZrm = 19346, |
| 19362 | VSUBSSZrm_Int = 19347, |
| 19363 | VSUBSSZrm_Intk = 19348, |
| 19364 | VSUBSSZrm_Intkz = 19349, |
| 19365 | VSUBSSZrr = 19350, |
| 19366 | VSUBSSZrr_Int = 19351, |
| 19367 | VSUBSSZrr_Intk = 19352, |
| 19368 | VSUBSSZrr_Intkz = 19353, |
| 19369 | VSUBSSZrrb_Int = 19354, |
| 19370 | VSUBSSZrrb_Intk = 19355, |
| 19371 | VSUBSSZrrb_Intkz = 19356, |
| 19372 | VSUBSSrm = 19357, |
| 19373 | VSUBSSrm_Int = 19358, |
| 19374 | VSUBSSrr = 19359, |
| 19375 | VSUBSSrr_Int = 19360, |
| 19376 | VTESTPDYrm = 19361, |
| 19377 | VTESTPDYrr = 19362, |
| 19378 | VTESTPDrm = 19363, |
| 19379 | VTESTPDrr = 19364, |
| 19380 | VTESTPSYrm = 19365, |
| 19381 | VTESTPSYrr = 19366, |
| 19382 | VTESTPSrm = 19367, |
| 19383 | VTESTPSrr = 19368, |
| 19384 | VUCOMISDZrm = 19369, |
| 19385 | VUCOMISDZrm_Int = 19370, |
| 19386 | VUCOMISDZrr = 19371, |
| 19387 | VUCOMISDZrr_Int = 19372, |
| 19388 | VUCOMISDZrrb = 19373, |
| 19389 | VUCOMISDrm = 19374, |
| 19390 | VUCOMISDrm_Int = 19375, |
| 19391 | VUCOMISDrr = 19376, |
| 19392 | VUCOMISDrr_Int = 19377, |
| 19393 | VUCOMISHZrm = 19378, |
| 19394 | VUCOMISHZrm_Int = 19379, |
| 19395 | VUCOMISHZrr = 19380, |
| 19396 | VUCOMISHZrr_Int = 19381, |
| 19397 | VUCOMISHZrrb = 19382, |
| 19398 | VUCOMISSZrm = 19383, |
| 19399 | VUCOMISSZrm_Int = 19384, |
| 19400 | VUCOMISSZrr = 19385, |
| 19401 | VUCOMISSZrr_Int = 19386, |
| 19402 | VUCOMISSZrrb = 19387, |
| 19403 | VUCOMISSrm = 19388, |
| 19404 | VUCOMISSrm_Int = 19389, |
| 19405 | VUCOMISSrr = 19390, |
| 19406 | VUCOMISSrr_Int = 19391, |
| 19407 | VUNPCKHPDYrm = 19392, |
| 19408 | VUNPCKHPDYrr = 19393, |
| 19409 | VUNPCKHPDZ128rm = 19394, |
| 19410 | VUNPCKHPDZ128rmb = 19395, |
| 19411 | VUNPCKHPDZ128rmbk = 19396, |
| 19412 | VUNPCKHPDZ128rmbkz = 19397, |
| 19413 | VUNPCKHPDZ128rmk = 19398, |
| 19414 | VUNPCKHPDZ128rmkz = 19399, |
| 19415 | VUNPCKHPDZ128rr = 19400, |
| 19416 | VUNPCKHPDZ128rrk = 19401, |
| 19417 | VUNPCKHPDZ128rrkz = 19402, |
| 19418 | VUNPCKHPDZ256rm = 19403, |
| 19419 | VUNPCKHPDZ256rmb = 19404, |
| 19420 | VUNPCKHPDZ256rmbk = 19405, |
| 19421 | VUNPCKHPDZ256rmbkz = 19406, |
| 19422 | VUNPCKHPDZ256rmk = 19407, |
| 19423 | VUNPCKHPDZ256rmkz = 19408, |
| 19424 | VUNPCKHPDZ256rr = 19409, |
| 19425 | VUNPCKHPDZ256rrk = 19410, |
| 19426 | VUNPCKHPDZ256rrkz = 19411, |
| 19427 | VUNPCKHPDZrm = 19412, |
| 19428 | VUNPCKHPDZrmb = 19413, |
| 19429 | VUNPCKHPDZrmbk = 19414, |
| 19430 | VUNPCKHPDZrmbkz = 19415, |
| 19431 | VUNPCKHPDZrmk = 19416, |
| 19432 | VUNPCKHPDZrmkz = 19417, |
| 19433 | VUNPCKHPDZrr = 19418, |
| 19434 | VUNPCKHPDZrrk = 19419, |
| 19435 | VUNPCKHPDZrrkz = 19420, |
| 19436 | VUNPCKHPDrm = 19421, |
| 19437 | VUNPCKHPDrr = 19422, |
| 19438 | VUNPCKHPSYrm = 19423, |
| 19439 | VUNPCKHPSYrr = 19424, |
| 19440 | VUNPCKHPSZ128rm = 19425, |
| 19441 | VUNPCKHPSZ128rmb = 19426, |
| 19442 | VUNPCKHPSZ128rmbk = 19427, |
| 19443 | VUNPCKHPSZ128rmbkz = 19428, |
| 19444 | VUNPCKHPSZ128rmk = 19429, |
| 19445 | VUNPCKHPSZ128rmkz = 19430, |
| 19446 | VUNPCKHPSZ128rr = 19431, |
| 19447 | VUNPCKHPSZ128rrk = 19432, |
| 19448 | VUNPCKHPSZ128rrkz = 19433, |
| 19449 | VUNPCKHPSZ256rm = 19434, |
| 19450 | VUNPCKHPSZ256rmb = 19435, |
| 19451 | VUNPCKHPSZ256rmbk = 19436, |
| 19452 | VUNPCKHPSZ256rmbkz = 19437, |
| 19453 | VUNPCKHPSZ256rmk = 19438, |
| 19454 | VUNPCKHPSZ256rmkz = 19439, |
| 19455 | VUNPCKHPSZ256rr = 19440, |
| 19456 | VUNPCKHPSZ256rrk = 19441, |
| 19457 | VUNPCKHPSZ256rrkz = 19442, |
| 19458 | VUNPCKHPSZrm = 19443, |
| 19459 | VUNPCKHPSZrmb = 19444, |
| 19460 | VUNPCKHPSZrmbk = 19445, |
| 19461 | VUNPCKHPSZrmbkz = 19446, |
| 19462 | VUNPCKHPSZrmk = 19447, |
| 19463 | VUNPCKHPSZrmkz = 19448, |
| 19464 | VUNPCKHPSZrr = 19449, |
| 19465 | VUNPCKHPSZrrk = 19450, |
| 19466 | VUNPCKHPSZrrkz = 19451, |
| 19467 | VUNPCKHPSrm = 19452, |
| 19468 | VUNPCKHPSrr = 19453, |
| 19469 | VUNPCKLPDYrm = 19454, |
| 19470 | VUNPCKLPDYrr = 19455, |
| 19471 | VUNPCKLPDZ128rm = 19456, |
| 19472 | VUNPCKLPDZ128rmb = 19457, |
| 19473 | VUNPCKLPDZ128rmbk = 19458, |
| 19474 | VUNPCKLPDZ128rmbkz = 19459, |
| 19475 | VUNPCKLPDZ128rmk = 19460, |
| 19476 | VUNPCKLPDZ128rmkz = 19461, |
| 19477 | VUNPCKLPDZ128rr = 19462, |
| 19478 | VUNPCKLPDZ128rrk = 19463, |
| 19479 | VUNPCKLPDZ128rrkz = 19464, |
| 19480 | VUNPCKLPDZ256rm = 19465, |
| 19481 | VUNPCKLPDZ256rmb = 19466, |
| 19482 | VUNPCKLPDZ256rmbk = 19467, |
| 19483 | VUNPCKLPDZ256rmbkz = 19468, |
| 19484 | VUNPCKLPDZ256rmk = 19469, |
| 19485 | VUNPCKLPDZ256rmkz = 19470, |
| 19486 | VUNPCKLPDZ256rr = 19471, |
| 19487 | VUNPCKLPDZ256rrk = 19472, |
| 19488 | VUNPCKLPDZ256rrkz = 19473, |
| 19489 | VUNPCKLPDZrm = 19474, |
| 19490 | VUNPCKLPDZrmb = 19475, |
| 19491 | VUNPCKLPDZrmbk = 19476, |
| 19492 | VUNPCKLPDZrmbkz = 19477, |
| 19493 | VUNPCKLPDZrmk = 19478, |
| 19494 | VUNPCKLPDZrmkz = 19479, |
| 19495 | VUNPCKLPDZrr = 19480, |
| 19496 | VUNPCKLPDZrrk = 19481, |
| 19497 | VUNPCKLPDZrrkz = 19482, |
| 19498 | VUNPCKLPDrm = 19483, |
| 19499 | VUNPCKLPDrr = 19484, |
| 19500 | VUNPCKLPSYrm = 19485, |
| 19501 | VUNPCKLPSYrr = 19486, |
| 19502 | VUNPCKLPSZ128rm = 19487, |
| 19503 | VUNPCKLPSZ128rmb = 19488, |
| 19504 | VUNPCKLPSZ128rmbk = 19489, |
| 19505 | VUNPCKLPSZ128rmbkz = 19490, |
| 19506 | VUNPCKLPSZ128rmk = 19491, |
| 19507 | VUNPCKLPSZ128rmkz = 19492, |
| 19508 | VUNPCKLPSZ128rr = 19493, |
| 19509 | VUNPCKLPSZ128rrk = 19494, |
| 19510 | VUNPCKLPSZ128rrkz = 19495, |
| 19511 | VUNPCKLPSZ256rm = 19496, |
| 19512 | VUNPCKLPSZ256rmb = 19497, |
| 19513 | VUNPCKLPSZ256rmbk = 19498, |
| 19514 | VUNPCKLPSZ256rmbkz = 19499, |
| 19515 | VUNPCKLPSZ256rmk = 19500, |
| 19516 | VUNPCKLPSZ256rmkz = 19501, |
| 19517 | VUNPCKLPSZ256rr = 19502, |
| 19518 | VUNPCKLPSZ256rrk = 19503, |
| 19519 | VUNPCKLPSZ256rrkz = 19504, |
| 19520 | VUNPCKLPSZrm = 19505, |
| 19521 | VUNPCKLPSZrmb = 19506, |
| 19522 | VUNPCKLPSZrmbk = 19507, |
| 19523 | VUNPCKLPSZrmbkz = 19508, |
| 19524 | VUNPCKLPSZrmk = 19509, |
| 19525 | VUNPCKLPSZrmkz = 19510, |
| 19526 | VUNPCKLPSZrr = 19511, |
| 19527 | VUNPCKLPSZrrk = 19512, |
| 19528 | VUNPCKLPSZrrkz = 19513, |
| 19529 | VUNPCKLPSrm = 19514, |
| 19530 | VUNPCKLPSrr = 19515, |
| 19531 | VXORPDYrm = 19516, |
| 19532 | VXORPDYrr = 19517, |
| 19533 | VXORPDZ128rm = 19518, |
| 19534 | VXORPDZ128rmb = 19519, |
| 19535 | VXORPDZ128rmbk = 19520, |
| 19536 | VXORPDZ128rmbkz = 19521, |
| 19537 | VXORPDZ128rmk = 19522, |
| 19538 | VXORPDZ128rmkz = 19523, |
| 19539 | VXORPDZ128rr = 19524, |
| 19540 | VXORPDZ128rrk = 19525, |
| 19541 | VXORPDZ128rrkz = 19526, |
| 19542 | VXORPDZ256rm = 19527, |
| 19543 | VXORPDZ256rmb = 19528, |
| 19544 | VXORPDZ256rmbk = 19529, |
| 19545 | VXORPDZ256rmbkz = 19530, |
| 19546 | VXORPDZ256rmk = 19531, |
| 19547 | VXORPDZ256rmkz = 19532, |
| 19548 | VXORPDZ256rr = 19533, |
| 19549 | VXORPDZ256rrk = 19534, |
| 19550 | VXORPDZ256rrkz = 19535, |
| 19551 | VXORPDZrm = 19536, |
| 19552 | VXORPDZrmb = 19537, |
| 19553 | VXORPDZrmbk = 19538, |
| 19554 | VXORPDZrmbkz = 19539, |
| 19555 | VXORPDZrmk = 19540, |
| 19556 | VXORPDZrmkz = 19541, |
| 19557 | VXORPDZrr = 19542, |
| 19558 | VXORPDZrrk = 19543, |
| 19559 | VXORPDZrrkz = 19544, |
| 19560 | VXORPDrm = 19545, |
| 19561 | VXORPDrr = 19546, |
| 19562 | VXORPSYrm = 19547, |
| 19563 | VXORPSYrr = 19548, |
| 19564 | VXORPSZ128rm = 19549, |
| 19565 | VXORPSZ128rmb = 19550, |
| 19566 | VXORPSZ128rmbk = 19551, |
| 19567 | VXORPSZ128rmbkz = 19552, |
| 19568 | VXORPSZ128rmk = 19553, |
| 19569 | VXORPSZ128rmkz = 19554, |
| 19570 | VXORPSZ128rr = 19555, |
| 19571 | VXORPSZ128rrk = 19556, |
| 19572 | VXORPSZ128rrkz = 19557, |
| 19573 | VXORPSZ256rm = 19558, |
| 19574 | VXORPSZ256rmb = 19559, |
| 19575 | VXORPSZ256rmbk = 19560, |
| 19576 | VXORPSZ256rmbkz = 19561, |
| 19577 | VXORPSZ256rmk = 19562, |
| 19578 | VXORPSZ256rmkz = 19563, |
| 19579 | VXORPSZ256rr = 19564, |
| 19580 | VXORPSZ256rrk = 19565, |
| 19581 | VXORPSZ256rrkz = 19566, |
| 19582 | VXORPSZrm = 19567, |
| 19583 | VXORPSZrmb = 19568, |
| 19584 | VXORPSZrmbk = 19569, |
| 19585 | VXORPSZrmbkz = 19570, |
| 19586 | VXORPSZrmk = 19571, |
| 19587 | VXORPSZrmkz = 19572, |
| 19588 | VXORPSZrr = 19573, |
| 19589 | VXORPSZrrk = 19574, |
| 19590 | VXORPSZrrkz = 19575, |
| 19591 | VXORPSrm = 19576, |
| 19592 | VXORPSrr = 19577, |
| 19593 | VZEROALL = 19578, |
| 19594 | VZEROUPPER = 19579, |
| 19595 | WAIT = 19580, |
| 19596 | WBINVD = 19581, |
| 19597 | WBNOINVD = 19582, |
| 19598 | WRFSBASE = 19583, |
| 19599 | WRFSBASE64 = 19584, |
| 19600 | WRGSBASE = 19585, |
| 19601 | WRGSBASE64 = 19586, |
| 19602 | WRMSR = 19587, |
| 19603 | WRMSRLIST = 19588, |
| 19604 | WRMSRNS = 19589, |
| 19605 | WRPKRUr = 19590, |
| 19606 | WRSSD = 19591, |
| 19607 | WRSSD_EVEX = 19592, |
| 19608 | WRSSQ = 19593, |
| 19609 | WRSSQ_EVEX = 19594, |
| 19610 | WRUSSD = 19595, |
| 19611 | WRUSSD_EVEX = 19596, |
| 19612 | WRUSSQ = 19597, |
| 19613 | WRUSSQ_EVEX = 19598, |
| 19614 | XABORT = 19599, |
| 19615 | XACQUIRE_PREFIX = 19600, |
| 19616 | XADD16rm = 19601, |
| 19617 | XADD16rr = 19602, |
| 19618 | XADD32rm = 19603, |
| 19619 | XADD32rr = 19604, |
| 19620 | XADD64rm = 19605, |
| 19621 | XADD64rr = 19606, |
| 19622 | XADD8rm = 19607, |
| 19623 | XADD8rr = 19608, |
| 19624 | XAM_F = 19609, |
| 19625 | XAM_Fp32 = 19610, |
| 19626 | XAM_Fp64 = 19611, |
| 19627 | XAM_Fp80 = 19612, |
| 19628 | XBEGIN = 19613, |
| 19629 | XBEGIN_2 = 19614, |
| 19630 | XBEGIN_4 = 19615, |
| 19631 | XCHG16ar = 19616, |
| 19632 | XCHG16rm = 19617, |
| 19633 | XCHG16rr = 19618, |
| 19634 | XCHG32ar = 19619, |
| 19635 | XCHG32rm = 19620, |
| 19636 | XCHG32rr = 19621, |
| 19637 | XCHG64ar = 19622, |
| 19638 | XCHG64rm = 19623, |
| 19639 | XCHG64rr = 19624, |
| 19640 | XCHG8rm = 19625, |
| 19641 | XCHG8rr = 19626, |
| 19642 | XCH_F = 19627, |
| 19643 | XCRYPTCBC = 19628, |
| 19644 | XCRYPTCFB = 19629, |
| 19645 | XCRYPTCTR = 19630, |
| 19646 | XCRYPTECB = 19631, |
| 19647 | XCRYPTOFB = 19632, |
| 19648 | XEND = 19633, |
| 19649 | XGETBV = 19634, |
| 19650 | XLAT = 19635, |
| 19651 | XOR16i16 = 19636, |
| 19652 | XOR16mi = 19637, |
| 19653 | XOR16mi8 = 19638, |
| 19654 | XOR16mi8_EVEX = 19639, |
| 19655 | XOR16mi8_ND = 19640, |
| 19656 | XOR16mi8_NF = 19641, |
| 19657 | XOR16mi8_NF_ND = 19642, |
| 19658 | XOR16mi_EVEX = 19643, |
| 19659 | XOR16mi_ND = 19644, |
| 19660 | XOR16mi_NF = 19645, |
| 19661 | XOR16mi_NF_ND = 19646, |
| 19662 | XOR16mr = 19647, |
| 19663 | XOR16mr_EVEX = 19648, |
| 19664 | XOR16mr_ND = 19649, |
| 19665 | XOR16mr_NF = 19650, |
| 19666 | XOR16mr_NF_ND = 19651, |
| 19667 | XOR16ri = 19652, |
| 19668 | XOR16ri8 = 19653, |
| 19669 | XOR16ri8_EVEX = 19654, |
| 19670 | XOR16ri8_ND = 19655, |
| 19671 | XOR16ri8_NF = 19656, |
| 19672 | XOR16ri8_NF_ND = 19657, |
| 19673 | XOR16ri_EVEX = 19658, |
| 19674 | XOR16ri_ND = 19659, |
| 19675 | XOR16ri_NF = 19660, |
| 19676 | XOR16ri_NF_ND = 19661, |
| 19677 | XOR16rm = 19662, |
| 19678 | XOR16rm_EVEX = 19663, |
| 19679 | XOR16rm_ND = 19664, |
| 19680 | XOR16rm_NF = 19665, |
| 19681 | XOR16rm_NF_ND = 19666, |
| 19682 | XOR16rr = 19667, |
| 19683 | XOR16rr_EVEX = 19668, |
| 19684 | XOR16rr_EVEX_REV = 19669, |
| 19685 | XOR16rr_ND = 19670, |
| 19686 | XOR16rr_ND_REV = 19671, |
| 19687 | XOR16rr_NF = 19672, |
| 19688 | XOR16rr_NF_ND = 19673, |
| 19689 | XOR16rr_NF_ND_REV = 19674, |
| 19690 | XOR16rr_NF_REV = 19675, |
| 19691 | XOR16rr_REV = 19676, |
| 19692 | XOR32i32 = 19677, |
| 19693 | XOR32mi = 19678, |
| 19694 | XOR32mi8 = 19679, |
| 19695 | XOR32mi8_EVEX = 19680, |
| 19696 | XOR32mi8_ND = 19681, |
| 19697 | XOR32mi8_NF = 19682, |
| 19698 | XOR32mi8_NF_ND = 19683, |
| 19699 | XOR32mi_EVEX = 19684, |
| 19700 | XOR32mi_ND = 19685, |
| 19701 | XOR32mi_NF = 19686, |
| 19702 | XOR32mi_NF_ND = 19687, |
| 19703 | XOR32mr = 19688, |
| 19704 | XOR32mr_EVEX = 19689, |
| 19705 | XOR32mr_ND = 19690, |
| 19706 | XOR32mr_NF = 19691, |
| 19707 | XOR32mr_NF_ND = 19692, |
| 19708 | XOR32ri = 19693, |
| 19709 | XOR32ri8 = 19694, |
| 19710 | XOR32ri8_EVEX = 19695, |
| 19711 | XOR32ri8_ND = 19696, |
| 19712 | XOR32ri8_NF = 19697, |
| 19713 | XOR32ri8_NF_ND = 19698, |
| 19714 | XOR32ri_EVEX = 19699, |
| 19715 | XOR32ri_ND = 19700, |
| 19716 | XOR32ri_NF = 19701, |
| 19717 | XOR32ri_NF_ND = 19702, |
| 19718 | XOR32rm = 19703, |
| 19719 | XOR32rm_EVEX = 19704, |
| 19720 | XOR32rm_ND = 19705, |
| 19721 | XOR32rm_NF = 19706, |
| 19722 | XOR32rm_NF_ND = 19707, |
| 19723 | XOR32rr = 19708, |
| 19724 | XOR32rr_EVEX = 19709, |
| 19725 | XOR32rr_EVEX_REV = 19710, |
| 19726 | XOR32rr_ND = 19711, |
| 19727 | XOR32rr_ND_REV = 19712, |
| 19728 | XOR32rr_NF = 19713, |
| 19729 | XOR32rr_NF_ND = 19714, |
| 19730 | XOR32rr_NF_ND_REV = 19715, |
| 19731 | XOR32rr_NF_REV = 19716, |
| 19732 | XOR32rr_REV = 19717, |
| 19733 | XOR64i32 = 19718, |
| 19734 | XOR64mi32 = 19719, |
| 19735 | XOR64mi32_EVEX = 19720, |
| 19736 | XOR64mi32_ND = 19721, |
| 19737 | XOR64mi32_NF = 19722, |
| 19738 | XOR64mi32_NF_ND = 19723, |
| 19739 | XOR64mi8 = 19724, |
| 19740 | XOR64mi8_EVEX = 19725, |
| 19741 | XOR64mi8_ND = 19726, |
| 19742 | XOR64mi8_NF = 19727, |
| 19743 | XOR64mi8_NF_ND = 19728, |
| 19744 | XOR64mr = 19729, |
| 19745 | XOR64mr_EVEX = 19730, |
| 19746 | XOR64mr_ND = 19731, |
| 19747 | XOR64mr_NF = 19732, |
| 19748 | XOR64mr_NF_ND = 19733, |
| 19749 | XOR64ri32 = 19734, |
| 19750 | XOR64ri32_EVEX = 19735, |
| 19751 | XOR64ri32_ND = 19736, |
| 19752 | XOR64ri32_NF = 19737, |
| 19753 | XOR64ri32_NF_ND = 19738, |
| 19754 | XOR64ri8 = 19739, |
| 19755 | XOR64ri8_EVEX = 19740, |
| 19756 | XOR64ri8_ND = 19741, |
| 19757 | XOR64ri8_NF = 19742, |
| 19758 | XOR64ri8_NF_ND = 19743, |
| 19759 | XOR64rm = 19744, |
| 19760 | XOR64rm_EVEX = 19745, |
| 19761 | XOR64rm_ND = 19746, |
| 19762 | XOR64rm_NF = 19747, |
| 19763 | XOR64rm_NF_ND = 19748, |
| 19764 | XOR64rr = 19749, |
| 19765 | XOR64rr_EVEX = 19750, |
| 19766 | XOR64rr_EVEX_REV = 19751, |
| 19767 | XOR64rr_ND = 19752, |
| 19768 | XOR64rr_ND_REV = 19753, |
| 19769 | XOR64rr_NF = 19754, |
| 19770 | XOR64rr_NF_ND = 19755, |
| 19771 | XOR64rr_NF_ND_REV = 19756, |
| 19772 | XOR64rr_NF_REV = 19757, |
| 19773 | XOR64rr_REV = 19758, |
| 19774 | XOR8i8 = 19759, |
| 19775 | XOR8mi = 19760, |
| 19776 | XOR8mi8 = 19761, |
| 19777 | XOR8mi_EVEX = 19762, |
| 19778 | XOR8mi_ND = 19763, |
| 19779 | XOR8mi_NF = 19764, |
| 19780 | XOR8mi_NF_ND = 19765, |
| 19781 | XOR8mr = 19766, |
| 19782 | XOR8mr_EVEX = 19767, |
| 19783 | XOR8mr_ND = 19768, |
| 19784 | XOR8mr_NF = 19769, |
| 19785 | XOR8mr_NF_ND = 19770, |
| 19786 | XOR8ri = 19771, |
| 19787 | XOR8ri8 = 19772, |
| 19788 | XOR8ri_EVEX = 19773, |
| 19789 | XOR8ri_ND = 19774, |
| 19790 | XOR8ri_NF = 19775, |
| 19791 | XOR8ri_NF_ND = 19776, |
| 19792 | XOR8rm = 19777, |
| 19793 | XOR8rm_EVEX = 19778, |
| 19794 | XOR8rm_ND = 19779, |
| 19795 | XOR8rm_NF = 19780, |
| 19796 | XOR8rm_NF_ND = 19781, |
| 19797 | XOR8rr = 19782, |
| 19798 | XOR8rr_EVEX = 19783, |
| 19799 | XOR8rr_EVEX_REV = 19784, |
| 19800 | XOR8rr_ND = 19785, |
| 19801 | XOR8rr_ND_REV = 19786, |
| 19802 | XOR8rr_NF = 19787, |
| 19803 | XOR8rr_NF_ND = 19788, |
| 19804 | XOR8rr_NF_ND_REV = 19789, |
| 19805 | XOR8rr_NF_REV = 19790, |
| 19806 | XOR8rr_NOREX = 19791, |
| 19807 | XOR8rr_REV = 19792, |
| 19808 | XORPDrm = 19793, |
| 19809 | XORPDrr = 19794, |
| 19810 | XORPSrm = 19795, |
| 19811 | XORPSrr = 19796, |
| 19812 | XRELEASE_PREFIX = 19797, |
| 19813 | XRESLDTRK = 19798, |
| 19814 | XRSTOR = 19799, |
| 19815 | XRSTOR64 = 19800, |
| 19816 | XRSTORS = 19801, |
| 19817 | XRSTORS64 = 19802, |
| 19818 | XSAVE = 19803, |
| 19819 | XSAVE64 = 19804, |
| 19820 | XSAVEC = 19805, |
| 19821 | XSAVEC64 = 19806, |
| 19822 | XSAVEOPT = 19807, |
| 19823 | XSAVEOPT64 = 19808, |
| 19824 | XSAVES = 19809, |
| 19825 | XSAVES64 = 19810, |
| 19826 | XSETBV = 19811, |
| 19827 | XSHA1 = 19812, |
| 19828 | XSHA256 = 19813, |
| 19829 | XSTORE = 19814, |
| 19830 | XSUSLDTRK = 19815, |
| 19831 | XTEST = 19816, |
| 19832 | INSTRUCTION_LIST_END = 19817 |
| 19833 | }; |
| 19834 | |
| 19835 | } // end namespace X86 |
| 19836 | } // end namespace llvm |
| 19837 | #endif // GET_INSTRINFO_ENUM |
| 19838 | |
| 19839 | #ifdef GET_INSTRINFO_SCHED_ENUM |
| 19840 | #undef GET_INSTRINFO_SCHED_ENUM |
| 19841 | namespace llvm { |
| 19842 | |
| 19843 | namespace X86 { |
| 19844 | namespace Sched { |
| 19845 | enum { |
| 19846 | NoInstrModel = 0, |
| 19847 | WriteALU = 1, |
| 19848 | WriteZero = 2, |
| 19849 | WriteVecALU = 3, |
| 19850 | WriteJump = 4, |
| 19851 | WriteCMPXCHGRMW = 5, |
| 19852 | WriteJumpLd = 6, |
| 19853 | WriteMove = 7, |
| 19854 | WriteSystem = 8, |
| 19855 | WriteLEA = 9, |
| 19856 | WriteRMW = 10, |
| 19857 | WriteADC = 11, |
| 19858 | WriteSHDrri = 12, |
| 19859 | WriteFStoreX = 13, |
| 19860 | WriteFLoadX = 14, |
| 19861 | WriteFStoreY = 15, |
| 19862 | WriteFLoadY = 16, |
| 19863 | WriteMicrocoded = 17, |
| 19864 | WriteALURMW_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault = 18, |
| 19865 | WriteFSign = 19, |
| 19866 | WriteADCRMW = 20, |
| 19867 | WriteADCLd_ReadAfterLd = 21, |
| 19868 | WriteADCRMW_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 22, |
| 19869 | WriteADCLd_ReadAfterLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 23, |
| 19870 | WriteALURMW = 24, |
| 19871 | WriteALULd_ReadAfterLd = 25, |
| 19872 | WriteALURMW_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 26, |
| 19873 | WriteFAdd64XLd_ReadAfterVecXLd = 27, |
| 19874 | WriteFAdd64X = 28, |
| 19875 | WriteFAddXLd_ReadAfterVecXLd = 29, |
| 19876 | WriteFAddX = 30, |
| 19877 | WriteNop = 31, |
| 19878 | WriteFAdd64Ld_ReadAfterVecLd = 32, |
| 19879 | WriteFAdd64 = 33, |
| 19880 | WriteFAddLd_ReadAfterVecLd = 34, |
| 19881 | WriteFAdd = 35, |
| 19882 | WriteFAddLd = 36, |
| 19883 | WriteAESDecEncLd_ReadAfterVecXLd = 37, |
| 19884 | WriteAESDecEnc = 38, |
| 19885 | WriteAESIMCLd = 39, |
| 19886 | WriteAESIMC = 40, |
| 19887 | WriteAESKeyGenLd = 41, |
| 19888 | WriteAESKeyGen = 42, |
| 19889 | WriteFLogicLd_ReadAfterVecXLd = 43, |
| 19890 | WriteFLogic = 44, |
| 19891 | WriteBEXTRLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 45, |
| 19892 | WriteBEXTR = 46, |
| 19893 | WriteBEXTRLd = 47, |
| 19894 | WriteALULd = 48, |
| 19895 | WriteFBlendLd_ReadAfterVecXLd = 49, |
| 19896 | WriteFBlend = 50, |
| 19897 | WriteFVarBlendLd_ReadAfterVecXLd = 51, |
| 19898 | WriteFVarBlend = 52, |
| 19899 | WriteBLSLd = 53, |
| 19900 | WriteBLS = 54, |
| 19901 | WriteBSFLd = 55, |
| 19902 | WriteBSF = 56, |
| 19903 | WriteBSRLd = 57, |
| 19904 | WriteBSR = 58, |
| 19905 | WriteBSWAP32 = 59, |
| 19906 | WriteBSWAP64 = 60, |
| 19907 | WriteBitTestImmLd = 61, |
| 19908 | WriteBitTestRegLd = 62, |
| 19909 | WriteBitTest = 63, |
| 19910 | WriteBitTestSetImmRMW = 64, |
| 19911 | WriteBitTestSetRegRMW = 65, |
| 19912 | WriteBitTestSet = 66, |
| 19913 | WriteBZHILd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 67, |
| 19914 | WriteBZHI = 68, |
| 19915 | WriteCMOV_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault = 69, |
| 19916 | WriteCMOVLd_ReadAfterLd = 70, |
| 19917 | WriteCMOV = 71, |
| 19918 | WriteLoad = 72, |
| 19919 | WriteFCMOV = 73, |
| 19920 | WriteALULd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 74, |
| 19921 | WriteXCHG = 75, |
| 19922 | WriteFCmp64XLd_ReadAfterVecXLd = 76, |
| 19923 | WriteFCmp64X = 77, |
| 19924 | WriteFCmpXLd_ReadAfterVecXLd = 78, |
| 19925 | WriteFCmpX = 79, |
| 19926 | WriteFCmp64Ld_ReadAfterVecLd = 80, |
| 19927 | WriteFCmp64 = 81, |
| 19928 | WriteFCmpLd_ReadAfterVecLd = 82, |
| 19929 | WriteFCmp = 83, |
| 19930 | WriteCMPXCHG = 84, |
| 19931 | WriteFComXLd_ReadAfterVecLd = 85, |
| 19932 | WriteFComX = 86, |
| 19933 | WriteFCom = 87, |
| 19934 | WriteCRC32Ld_ReadAfterLd = 88, |
| 19935 | WriteCRC32 = 89, |
| 19936 | WriteCvtI2PDLd = 90, |
| 19937 | WriteCvtI2PD = 91, |
| 19938 | WriteCvtI2PSLd = 92, |
| 19939 | WriteCvtI2PS = 93, |
| 19940 | WriteCvtPD2ILd = 94, |
| 19941 | WriteCvtPD2I = 95, |
| 19942 | WriteCvtPD2PSLd = 96, |
| 19943 | WriteCvtPD2PS = 97, |
| 19944 | WriteCvtPS2ILd = 98, |
| 19945 | WriteCvtPS2I = 99, |
| 19946 | WriteCvtPS2PDLd = 100, |
| 19947 | WriteCvtPS2PD = 101, |
| 19948 | WriteCvtSD2ILd = 102, |
| 19949 | WriteCvtSD2I_ReadDefault = 103, |
| 19950 | WriteCvtSD2I = 104, |
| 19951 | WriteCvtSD2SSLd_ReadAfterVecLd = 105, |
| 19952 | WriteCvtSD2SS = 106, |
| 19953 | WriteCvtI2SDLd = 107, |
| 19954 | WriteCvtI2SDLd_ReadAfterVecLd = 108, |
| 19955 | WriteCvtI2SD_ReadInt2Fpu = 109, |
| 19956 | WriteCvtI2SD_ReadDefault_ReadInt2Fpu = 110, |
| 19957 | WriteCvtI2SSLd = 111, |
| 19958 | WriteCvtI2SSLd_ReadAfterVecLd = 112, |
| 19959 | WriteCvtI2SS_ReadInt2Fpu = 113, |
| 19960 | WriteCvtI2SS_ReadDefault_ReadInt2Fpu = 114, |
| 19961 | WriteCvtSS2SDLd_ReadAfterVecLd = 115, |
| 19962 | WriteCvtSS2SD = 116, |
| 19963 | WriteCvtSS2ILd = 117, |
| 19964 | WriteCvtSS2I_ReadDefault = 118, |
| 19965 | WriteCvtSS2I = 119, |
| 19966 | WriteDiv16Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 120, |
| 19967 | WriteDiv16 = 121, |
| 19968 | WriteDiv32Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 122, |
| 19969 | WriteDiv32 = 123, |
| 19970 | WriteDiv64Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 124, |
| 19971 | WriteDiv64 = 125, |
| 19972 | WriteDiv8Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 126, |
| 19973 | WriteDiv8 = 127, |
| 19974 | WriteFDiv64XLd_ReadAfterVecXLd = 128, |
| 19975 | WriteFDiv64X = 129, |
| 19976 | WriteFDivXLd_ReadAfterVecXLd = 130, |
| 19977 | WriteFDivX = 131, |
| 19978 | WriteFDivLd = 132, |
| 19979 | WriteFDiv = 133, |
| 19980 | WriteFDiv64Ld_ReadAfterVecLd = 134, |
| 19981 | WriteFDiv64 = 135, |
| 19982 | WriteFDivLd_ReadAfterVecLd = 136, |
| 19983 | WriteDPPDLd_ReadAfterVecXLd = 137, |
| 19984 | WriteDPPD = 138, |
| 19985 | WriteDPPSLd_ReadAfterVecXLd = 139, |
| 19986 | WriteDPPS = 140, |
| 19987 | WriteStore = 141, |
| 19988 | WriteVecExtractSt = 142, |
| 19989 | WriteVecExtract = 143, |
| 19990 | WriteVecALUX = 144, |
| 19991 | WriteFComLd = 145, |
| 19992 | WriteEMMS = 146, |
| 19993 | WriteFLDC = 147, |
| 19994 | WriteVecIMulXLd_ReadAfterVecXLd = 148, |
| 19995 | WriteVecIMulX = 149, |
| 19996 | WriteVecALUXLd_ReadAfterVecXLd = 150, |
| 19997 | WriteFHAddLd_ReadAfterVecXLd = 151, |
| 19998 | WriteFHAdd = 152, |
| 19999 | WriteIDiv16Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 153, |
| 20000 | WriteIDiv16 = 154, |
| 20001 | WriteIDiv32Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 155, |
| 20002 | WriteIDiv32 = 156, |
| 20003 | WriteIDiv64Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 157, |
| 20004 | WriteIDiv64 = 158, |
| 20005 | WriteIDiv8Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 159, |
| 20006 | WriteIDiv8 = 160, |
| 20007 | WriteIMul16Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 161, |
| 20008 | WriteIMul16 = 162, |
| 20009 | WriteIMul16RegLd_ReadAfterLd = 163, |
| 20010 | WriteIMul16ImmLd = 164, |
| 20011 | WriteIMul16Reg = 165, |
| 20012 | WriteIMul16Imm = 166, |
| 20013 | WriteIMul32Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 167, |
| 20014 | WriteIMul32 = 168, |
| 20015 | WriteIMul32RegLd_ReadAfterLd = 169, |
| 20016 | WriteIMul32ImmLd = 170, |
| 20017 | WriteIMul32Reg = 171, |
| 20018 | WriteIMul32Imm = 172, |
| 20019 | WriteIMul64Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 173, |
| 20020 | WriteIMul64 = 174, |
| 20021 | WriteIMul64RegLd_ReadAfterLd = 175, |
| 20022 | WriteIMul64ImmLd = 176, |
| 20023 | WriteIMul64Reg = 177, |
| 20024 | WriteIMul64Imm = 178, |
| 20025 | WriteIMul8Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 179, |
| 20026 | WriteIMul8 = 180, |
| 20027 | WriteFShuffleLd_ReadAfterVecXLd = 181, |
| 20028 | WriteFShuffle = 182, |
| 20029 | WriteVecLogicX = 183, |
| 20030 | WriteShuffle = 184, |
| 20031 | WriteLAHFSAHF = 185, |
| 20032 | WriteVecLoadX = 186, |
| 20033 | WriteLDMXCSR = 187, |
| 20034 | WriteFLD0 = 188, |
| 20035 | WriteFLD1 = 189, |
| 20036 | WriteFence = 190, |
| 20037 | WriteLZCNTLd = 191, |
| 20038 | WriteLZCNT = 192, |
| 20039 | WriteVecStoreX = 193, |
| 20040 | WriteVecStore = 194, |
| 20041 | WriteVecMoveToGpr = 195, |
| 20042 | WriteVecLoad = 196, |
| 20043 | WriteVecMoveFromGpr = 197, |
| 20044 | WriteVecMoveX = 198, |
| 20045 | WriteVecStoreNT = 199, |
| 20046 | WriteVecMove = 200, |
| 20047 | WriteVecALULd = 201, |
| 20048 | WriteShuffleLd_ReadAfterVecLd = 202, |
| 20049 | WriteVecALULd_ReadAfterVecLd = 203, |
| 20050 | WriteVecLogicLd_ReadAfterVecLd = 204, |
| 20051 | WriteVecLogic = 205, |
| 20052 | WritePHAddLd_ReadAfterVecLd = 206, |
| 20053 | WritePHAdd = 207, |
| 20054 | WriteVecInsertLd_ReadAfterLd = 208, |
| 20055 | WriteVecInsert_ReadDefault_ReadInt2Fpu = 209, |
| 20056 | WriteVecIMulLd_ReadAfterVecLd = 210, |
| 20057 | WriteVecIMul = 211, |
| 20058 | WriteMMXMOVMSK = 212, |
| 20059 | WritePSADBWLd_ReadAfterVecLd = 213, |
| 20060 | WritePSADBW = 214, |
| 20061 | WriteVarShuffleLd_ReadAfterVecLd = 215, |
| 20062 | WriteVarShuffle = 216, |
| 20063 | WriteShuffleLd = 217, |
| 20064 | WriteVecShiftImm = 218, |
| 20065 | WriteVecShiftLd_ReadAfterVecLd = 219, |
| 20066 | WriteVecShift = 220, |
| 20067 | WriteFMoveX = 221, |
| 20068 | WriteFShuffleLd = 222, |
| 20069 | WriteFStore = 223, |
| 20070 | WriteFMOVMSK = 224, |
| 20071 | WriteVecLoadNT = 225, |
| 20072 | WriteStoreNT = 226, |
| 20073 | WriteFStoreNTX = 227, |
| 20074 | WriteFStoreNT = 228, |
| 20075 | WriteFLoad = 229, |
| 20076 | WriteMPSADLd_ReadAfterVecXLd = 230, |
| 20077 | WriteMPSAD = 231, |
| 20078 | WriteFMul64XLd_ReadAfterVecXLd = 232, |
| 20079 | WriteFMul64X = 233, |
| 20080 | WriteFMulXLd_ReadAfterVecXLd = 234, |
| 20081 | WriteFMulX = 235, |
| 20082 | WriteFMul64Ld_ReadAfterVecLd = 236, |
| 20083 | WriteFMul64 = 237, |
| 20084 | WriteFMulLd_ReadAfterVecLd = 238, |
| 20085 | WriteFMul = 239, |
| 20086 | WriteMULX32Ld = 240, |
| 20087 | WriteMULX32 = 241, |
| 20088 | WriteIMulHLd_WriteMULX32Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 242, |
| 20089 | WriteIMulH_WriteMULX32 = 243, |
| 20090 | WriteMULX64Ld = 244, |
| 20091 | WriteMULX64 = 245, |
| 20092 | WriteIMulHLd_WriteMULX64Ld_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 246, |
| 20093 | WriteIMulH_WriteMULX64 = 247, |
| 20094 | WriteFMulLd = 248, |
| 20095 | WriteVecALUXLd = 249, |
| 20096 | WriteShuffleXLd_ReadAfterVecXLd = 250, |
| 20097 | WriteShuffleX = 251, |
| 20098 | WriteVecLogicXLd_ReadAfterVecXLd = 252, |
| 20099 | WriteVarBlendLd_ReadAfterVecXLd = 253, |
| 20100 | WriteVarBlend = 254, |
| 20101 | WriteBlendLd_ReadAfterVecXLd = 255, |
| 20102 | WriteBlend = 256, |
| 20103 | WriteCLMulLd_ReadAfterVecXLd = 257, |
| 20104 | WriteCLMul = 258, |
| 20105 | WritePCmpEStrILd_ReadAfterVecXLd = 259, |
| 20106 | WritePCmpEStrI = 260, |
| 20107 | WritePCmpEStrMLd_ReadAfterVecXLd = 261, |
| 20108 | WritePCmpEStrM = 262, |
| 20109 | WritePCmpIStrILd_ReadAfterVecXLd = 263, |
| 20110 | WritePCmpIStrI = 264, |
| 20111 | WritePCmpIStrMLd_ReadAfterVecXLd = 265, |
| 20112 | WritePCmpIStrM = 266, |
| 20113 | WriteCvtPS2ILd_ReadAfterVecXLd = 267, |
| 20114 | WritePHAddXLd_ReadAfterVecXLd = 268, |
| 20115 | WritePHAddX = 269, |
| 20116 | WritePHMINPOSLd = 270, |
| 20117 | WritePHMINPOS = 271, |
| 20118 | WriteCvtI2PSLd_ReadAfterVecXLd = 272, |
| 20119 | WriteVecMOVMSK = 273, |
| 20120 | WriteShuffleXLd = 274, |
| 20121 | WritePMULLDLd_ReadAfterVecXLd = 275, |
| 20122 | WritePMULLD = 276, |
| 20123 | WriteCopy = 277, |
| 20124 | WritePOPCNTLd = 278, |
| 20125 | WritePOPCNT = 279, |
| 20126 | WritePSADBWXLd_ReadAfterVecXLd = 280, |
| 20127 | WritePSADBWX = 281, |
| 20128 | WriteVarShuffleXLd_ReadAfterVecXLd = 282, |
| 20129 | WriteVarShuffleX = 283, |
| 20130 | WriteVecShiftImmX = 284, |
| 20131 | WriteVecShiftXLd_ReadAfterVecXLd = 285, |
| 20132 | WriteVecShiftX = 286, |
| 20133 | WriteVecTestLd_ReadAfterVecXLd = 287, |
| 20134 | WriteVecTest = 288, |
| 20135 | WriteRotateLd_WriteRMW = 289, |
| 20136 | WriteRotateLd_WriteRotate = 290, |
| 20137 | WriteRotateCLLd_WriteRMW = 291, |
| 20138 | WriteRotateCLLd_WriteRotateCL = 292, |
| 20139 | WriteRotate = 293, |
| 20140 | WriteRotateCL = 294, |
| 20141 | WriteFRcpXLd = 295, |
| 20142 | WriteFRcpX = 296, |
| 20143 | WriteFRcpLd = 297, |
| 20144 | WriteFRcpLd_ReadAfterVecLd = 298, |
| 20145 | WriteFRcp = 299, |
| 20146 | WriteShiftLd = 300, |
| 20147 | WriteShift = 301, |
| 20148 | WriteFRndLd = 302, |
| 20149 | WriteFRnd = 303, |
| 20150 | WriteFRndLd_ReadAfterVecXLd = 304, |
| 20151 | WriteFRsqrtXLd = 305, |
| 20152 | WriteFRsqrtX = 306, |
| 20153 | WriteFRsqrtLd = 307, |
| 20154 | WriteFRsqrtLd_ReadAfterVecLd = 308, |
| 20155 | WriteFRsqrt = 309, |
| 20156 | WriteShiftLd_WriteRMW = 310, |
| 20157 | WriteShiftLd_WriteShift = 311, |
| 20158 | WriteShiftCLLd_WriteRMW = 312, |
| 20159 | WriteShiftCLLd_WriteShiftCL = 313, |
| 20160 | WriteShiftCL = 314, |
| 20161 | WriteShiftLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 315, |
| 20162 | WriteSETCCStore = 316, |
| 20163 | WriteSETCC = 317, |
| 20164 | WriteSHDmrcl = 318, |
| 20165 | WriteSHDmri = 319, |
| 20166 | WriteSHDrrcl = 320, |
| 20167 | WriteFSqrt64XLd = 321, |
| 20168 | WriteFSqrt64X = 322, |
| 20169 | WriteFSqrtXLd = 323, |
| 20170 | WriteFSqrtX = 324, |
| 20171 | WriteFSqrt64Ld = 325, |
| 20172 | WriteFSqrt64Ld_ReadAfterVecLd = 326, |
| 20173 | WriteFSqrt64 = 327, |
| 20174 | WriteFSqrtLd = 328, |
| 20175 | WriteFSqrtLd_ReadAfterVecLd = 329, |
| 20176 | WriteFSqrt = 330, |
| 20177 | WriteFSqrt80 = 331, |
| 20178 | WriteSTMXCSR = 332, |
| 20179 | WriteTZCNTLd = 333, |
| 20180 | WriteTZCNT = 334, |
| 20181 | WriteFMAZLd = 335, |
| 20182 | WriteFMALd = 336, |
| 20183 | WriteFAdd64YLd_ReadAfterVecYLd = 337, |
| 20184 | WriteFAdd64Y = 338, |
| 20185 | WriteFAdd64ZLd_ReadAfterVecYLd = 339, |
| 20186 | WriteFAdd64Z = 340, |
| 20187 | WriteFAddYLd_ReadAfterVecYLd = 341, |
| 20188 | WriteFAddY = 342, |
| 20189 | WriteFAddZLd_ReadAfterVecYLd = 343, |
| 20190 | WriteFAddZ = 344, |
| 20191 | WriteShuffleYLd_ReadAfterVecYLd = 345, |
| 20192 | WriteShuffleY = 346, |
| 20193 | WriteShuffleZLd_ReadAfterVecYLd = 347, |
| 20194 | WriteShuffleZ = 348, |
| 20195 | WriteFLogicYLd_ReadAfterVecYLd = 349, |
| 20196 | WriteFLogicY = 350, |
| 20197 | WriteFLogicZLd_ReadAfterVecYLd = 351, |
| 20198 | WriteFLogicZ = 352, |
| 20199 | WriteCvtPH2PSY = 353, |
| 20200 | WriteCvtPH2PS = 354, |
| 20201 | WriteFVarBlendYLd_ReadAfterVecYLd = 355, |
| 20202 | WriteFVarBlendY = 356, |
| 20203 | WriteFVarBlendZLd_ReadAfterVecYLd = 357, |
| 20204 | WriteFVarBlendZ = 358, |
| 20205 | WriteFBlendYLd_ReadAfterVecYLd = 359, |
| 20206 | WriteFBlendY = 360, |
| 20207 | WriteFVarBlendYLd_ReadAfterVecYLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecYLd = 361, |
| 20208 | WriteFVarBlendLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 362, |
| 20209 | WriteShuffle256Ld = 363, |
| 20210 | WriteShuffle256 = 364, |
| 20211 | WriteShuffleYLd = 365, |
| 20212 | WriteFShuffle256 = 366, |
| 20213 | WriteFShuffle256Ld = 367, |
| 20214 | WriteFCmp64YLd_ReadAfterVecYLd = 368, |
| 20215 | WriteFCmp64Y = 369, |
| 20216 | WriteFCmpYLd_ReadAfterVecYLd = 370, |
| 20217 | WriteFCmpY = 371, |
| 20218 | WriteFCmpZLd_ReadAfterVecYLd = 372, |
| 20219 | WriteFCmpZ = 373, |
| 20220 | WriteVarShuffle256Ld = 374, |
| 20221 | WriteVarShuffle256 = 375, |
| 20222 | WriteCvtI2PDYLd = 376, |
| 20223 | WriteCvtI2PDY = 377, |
| 20224 | WriteCvtI2PDZLd = 378, |
| 20225 | WriteCvtI2PDZ = 379, |
| 20226 | WriteCvtI2PSYLd = 380, |
| 20227 | WriteCvtI2PSY = 381, |
| 20228 | WriteCvtI2PSZLd = 382, |
| 20229 | WriteCvtI2PSZ = 383, |
| 20230 | WriteCvtPD2PSLd_ReadAfterVecXLd = 384, |
| 20231 | WriteCvtPD2PSYLd_ReadAfterVecYLd = 385, |
| 20232 | WriteCvtPD2PSY = 386, |
| 20233 | WriteCvtPD2PSZLd_ReadAfterVecYLd = 387, |
| 20234 | WriteCvtPD2PSZ = 388, |
| 20235 | WriteCvtPD2PSYLd = 389, |
| 20236 | WriteCvtPD2PSZLd = 390, |
| 20237 | WriteCvtPD2IYLd = 391, |
| 20238 | WriteCvtPD2IY = 392, |
| 20239 | WriteCvtPD2IZLd = 393, |
| 20240 | WriteCvtPD2IZ = 394, |
| 20241 | WriteCvtPS2IYLd = 395, |
| 20242 | WriteCvtPS2IY = 396, |
| 20243 | WriteCvtPS2IZLd = 397, |
| 20244 | WriteCvtPS2IZ = 398, |
| 20245 | WriteCvtPS2PDYLd = 399, |
| 20246 | WriteCvtPS2PDY = 400, |
| 20247 | WriteCvtPS2PDZLd = 401, |
| 20248 | WriteCvtPS2PDZ = 402, |
| 20249 | WriteCvtPH2PSYLd = 403, |
| 20250 | WriteCvtPH2PSLd = 404, |
| 20251 | WriteCvtPH2PSZLd = 405, |
| 20252 | WriteCvtPH2PSZ = 406, |
| 20253 | WriteCvtPS2PHYSt = 407, |
| 20254 | WriteCvtPS2PHY = 408, |
| 20255 | WriteCvtPS2PHSt = 409, |
| 20256 | WriteCvtPS2PH = 410, |
| 20257 | WriteCvtPS2PHZSt = 411, |
| 20258 | WriteCvtPS2PHZ = 412, |
| 20259 | WriteCvtSD2ILd_ReadAfterVecLd = 413, |
| 20260 | WriteCvtSS2ILd_ReadAfterVecLd = 414, |
| 20261 | WritePSADBWYLd_ReadAfterVecYLd = 415, |
| 20262 | WritePSADBWY = 416, |
| 20263 | WritePSADBWZLd_ReadAfterVecYLd = 417, |
| 20264 | WritePSADBWZ = 418, |
| 20265 | WriteFDiv64YLd_ReadAfterVecYLd = 419, |
| 20266 | WriteFDiv64Y = 420, |
| 20267 | WriteFDiv64ZLd_ReadAfterVecYLd = 421, |
| 20268 | WriteFDiv64Z = 422, |
| 20269 | WriteFDivYLd_ReadAfterVecYLd = 423, |
| 20270 | WriteFDivY = 424, |
| 20271 | WriteFDivZLd_ReadAfterVecYLd = 425, |
| 20272 | WriteFDivZ = 426, |
| 20273 | WriteFMAXLd_ReadAfterVecXLd = 427, |
| 20274 | WriteFMAX = 428, |
| 20275 | WriteFMAYLd_ReadAfterVecYLd = 429, |
| 20276 | WriteFMAY = 430, |
| 20277 | WriteFMAZLd_ReadAfterVecYLd = 431, |
| 20278 | WriteFMAZ = 432, |
| 20279 | WriteDPPSYLd_ReadAfterVecYLd = 433, |
| 20280 | WriteDPPSY = 434, |
| 20281 | WriteVarShuffle256Ld_ReadAfterVecYLd = 435, |
| 20282 | WriteFMAYLd_ReadAfterVecYLd_ReadAfterVecYLd = 436, |
| 20283 | WriteFMAXLd_ReadAfterVecXLd_ReadAfterVecXLd = 437, |
| 20284 | WriteFMAZLd_ReadAfterVecYLd_ReadAfterVecYLd = 438, |
| 20285 | WriteFMALd_ReadAfterVecLd_ReadAfterVecLd = 439, |
| 20286 | WriteFMA = 440, |
| 20287 | WriteFMAYLd_ReadAfterVecYLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecYLd = 441, |
| 20288 | WriteFMAXLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 442, |
| 20289 | WriteFMALd_ReadAfterVecLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecLd = 443, |
| 20290 | WriteFRndYLd_ReadAfterVecYLd = 444, |
| 20291 | WriteFRndY = 445, |
| 20292 | WriteLoad_WriteVecMaskedGatherWriteback = 446, |
| 20293 | WriteFRndZLd_ReadAfterVecYLd = 447, |
| 20294 | WriteFRndZ = 448, |
| 20295 | WriteVecIMulYLd_ReadAfterVecYLd = 449, |
| 20296 | WriteVecIMulY = 450, |
| 20297 | WriteVecIMulZLd_ReadAfterVecYLd = 451, |
| 20298 | WriteVecIMulZ = 452, |
| 20299 | WriteVecALUYLd_ReadAfterVecYLd = 453, |
| 20300 | WriteVecALUY = 454, |
| 20301 | WriteVecALUZLd_ReadAfterVecYLd = 455, |
| 20302 | WriteVecALUZ = 456, |
| 20303 | WriteFHAddYLd_ReadAfterVecYLd = 457, |
| 20304 | WriteFHAddY = 458, |
| 20305 | WriteFShuffle256Ld_ReadAfterVecYLd = 459, |
| 20306 | WriteShuffle256Ld_ReadAfterVecYLd = 460, |
| 20307 | WriteVecLoadY = 461, |
| 20308 | WriteFMaskedStore64Y = 462, |
| 20309 | WriteFMaskedLoadY = 463, |
| 20310 | WriteFMaskedStore64 = 464, |
| 20311 | WriteFMaskedLoad = 465, |
| 20312 | WriteFMaskedStore32Y = 466, |
| 20313 | WriteFMaskedStore32 = 467, |
| 20314 | WriteFCmp64ZLd_ReadAfterVecYLd = 468, |
| 20315 | WriteFCmp64Z = 469, |
| 20316 | WriteFMoveY = 470, |
| 20317 | WriteFMoveZ = 471, |
| 20318 | WriteFShuffleYLd = 472, |
| 20319 | WriteFShuffleY = 473, |
| 20320 | WriteFShuffleZLd = 474, |
| 20321 | WriteFShuffleZ = 475, |
| 20322 | WriteVecStoreY = 476, |
| 20323 | WriteVecMoveY = 477, |
| 20324 | WriteVecMoveZ = 478, |
| 20325 | WriteVecLoadNTY = 479, |
| 20326 | WriteVecStoreNTY = 480, |
| 20327 | WriteFStoreNTY = 481, |
| 20328 | WriteMPSADYLd_ReadAfterVecYLd = 482, |
| 20329 | WriteMPSADY = 483, |
| 20330 | WriteFMul64YLd_ReadAfterVecYLd = 484, |
| 20331 | WriteFMul64Y = 485, |
| 20332 | WriteFMul64ZLd_ReadAfterVecYLd = 486, |
| 20333 | WriteFMul64Z = 487, |
| 20334 | WriteFMulYLd_ReadAfterVecYLd = 488, |
| 20335 | WriteFMulY = 489, |
| 20336 | WriteFMulZLd_ReadAfterVecYLd = 490, |
| 20337 | WriteFMulZ = 491, |
| 20338 | WriteVecALUYLd = 492, |
| 20339 | WriteVecALUZLd = 493, |
| 20340 | WriteVecLogicYLd_ReadAfterVecYLd = 494, |
| 20341 | WriteVecLogicY = 495, |
| 20342 | WriteVecLogicZLd_ReadAfterVecYLd = 496, |
| 20343 | WriteVecLogicZ = 497, |
| 20344 | WriteBlendYLd_ReadAfterVecYLd = 498, |
| 20345 | WriteBlendY = 499, |
| 20346 | WriteVarBlendYLd_ReadAfterVecYLd = 500, |
| 20347 | WriteVarBlendY = 501, |
| 20348 | WriteVarBlendZLd_ReadAfterVecYLd = 502, |
| 20349 | WriteVarBlendZ = 503, |
| 20350 | WriteVarBlendYLd_ReadAfterVecYLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecYLd = 504, |
| 20351 | WriteVarBlendLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 505, |
| 20352 | WriteShuffleYLd_ReadAfterVecYLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecYLd = 506, |
| 20353 | WriteShuffleYLd_ReadAfterVecYLd_ReadAfterVecYLd = 507, |
| 20354 | WriteShuffleXLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 508, |
| 20355 | WriteShuffleXLd_ReadAfterVecXLd_ReadAfterVecXLd = 509, |
| 20356 | WriteVecIMulYLd_ReadAfterVecYLd_ReadAfterVecYLd = 510, |
| 20357 | WriteVecIMulXLd_ReadAfterVecXLd_ReadAfterVecXLd = 511, |
| 20358 | WriteVecIMulZLd_ReadAfterVecYLd_ReadAfterVecYLd = 512, |
| 20359 | WriteFVarShuffle256Ld_ReadAfterVecYLd = 513, |
| 20360 | WriteFVarShuffle256 = 514, |
| 20361 | WriteFVarShuffleYLd_ReadAfterVecYLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecYLd = 515, |
| 20362 | WriteFVarShuffleYLd_ReadAfterVecYLd_ReadAfterVecYLd = 516, |
| 20363 | WriteFVarShuffleY = 517, |
| 20364 | WriteFVarShuffleLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 518, |
| 20365 | WriteFVarShuffleLd_ReadAfterVecXLd_ReadAfterVecXLd = 519, |
| 20366 | WriteFVarShuffle = 520, |
| 20367 | WriteFVarShuffleYLd_ReadAfterVecYLd = 521, |
| 20368 | WriteFVarShuffleLd_ReadAfterVecXLd = 522, |
| 20369 | WriteFVarShuffleZLd_ReadAfterVecYLd = 523, |
| 20370 | WriteFVarShuffleZ = 524, |
| 20371 | WritePHAddYLd_ReadAfterVecYLd = 525, |
| 20372 | WritePHAddY = 526, |
| 20373 | WriteVecInsert = 527, |
| 20374 | WriteVecIMulXLd = 528, |
| 20375 | WriteVecIMulYLd = 529, |
| 20376 | WriteVecIMulZLd = 530, |
| 20377 | WriteVecMaskedStore32Y = 531, |
| 20378 | WriteVecMaskedLoadY = 532, |
| 20379 | WriteVecMaskedStore32 = 533, |
| 20380 | WriteVecMaskedLoad = 534, |
| 20381 | WriteVecMaskedStore64Y = 535, |
| 20382 | WriteVecMaskedStore64 = 536, |
| 20383 | WriteVPMOV256Ld = 537, |
| 20384 | WriteVPMOV256 = 538, |
| 20385 | WriteVecMOVMSKY = 539, |
| 20386 | WritePMULLDYLd_ReadAfterVecYLd = 540, |
| 20387 | WritePMULLDY = 541, |
| 20388 | WritePMULLDZLd_ReadAfterVecYLd = 542, |
| 20389 | WritePMULLDZ = 543, |
| 20390 | WriteVarShuffleXLd_ReadAfterVecXLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterVecXLd = 544, |
| 20391 | WriteVarShuffleXLd_ReadAfterVecXLd_ReadAfterVecXLd = 545, |
| 20392 | WriteVecShiftImmXLd = 546, |
| 20393 | WriteVecShiftImmYLd = 547, |
| 20394 | WriteVecShiftImmY = 548, |
| 20395 | WriteVecShiftImmZLd = 549, |
| 20396 | WriteVecShiftImmZ = 550, |
| 20397 | WriteVarVecShiftLd_ReadAfterVecXLd = 551, |
| 20398 | WriteVarVecShift = 552, |
| 20399 | WriteVarVecShiftYLd_ReadAfterVecYLd = 553, |
| 20400 | WriteVarVecShiftY = 554, |
| 20401 | WriteVarVecShiftZLd_ReadAfterVecYLd = 555, |
| 20402 | WriteVarVecShiftZ = 556, |
| 20403 | WriteVecShiftImmXLd_ReadAfterVecXLd = 557, |
| 20404 | WriteVarShuffleYLd_ReadAfterVecYLd = 558, |
| 20405 | WriteVarShuffleY = 559, |
| 20406 | WriteVarShuffleZLd_ReadAfterVecYLd = 560, |
| 20407 | WriteVarShuffleZ = 561, |
| 20408 | WriteShuffleZLd = 562, |
| 20409 | WriteVecShiftYLd_ReadAfterVecYLd = 563, |
| 20410 | WriteVecShiftY = 564, |
| 20411 | WriteVecShiftZLd_ReadAfterVecYLd = 565, |
| 20412 | WriteVecShiftZ = 566, |
| 20413 | WriteVecTestYLd_ReadAfterVecYLd = 567, |
| 20414 | WriteVecTestY = 568, |
| 20415 | WriteFRcpXLd_ReadAfterVecXLd = 569, |
| 20416 | WriteFRcpYLd_ReadAfterVecYLd = 570, |
| 20417 | WriteFRcpY = 571, |
| 20418 | WriteFRcpZLd_ReadAfterVecYLd = 572, |
| 20419 | WriteFRcpZ = 573, |
| 20420 | WriteFRcpYLd = 574, |
| 20421 | WriteFRndYLd = 575, |
| 20422 | WriteFRsqrtXLd_ReadAfterVecXLd = 576, |
| 20423 | WriteFRsqrtYLd_ReadAfterVecYLd = 577, |
| 20424 | WriteFRsqrtY = 578, |
| 20425 | WriteFRsqrtZLd_ReadAfterVecYLd = 579, |
| 20426 | WriteFRsqrtZ = 580, |
| 20427 | WriteFRsqrtYLd = 581, |
| 20428 | WriteFShuffleYLd_ReadAfterVecYLd = 582, |
| 20429 | WriteFShuffleZLd_ReadAfterVecYLd = 583, |
| 20430 | WriteFSqrt64YLd = 584, |
| 20431 | WriteFSqrt64Y = 585, |
| 20432 | WriteFSqrt64XLd_ReadAfterVecXLd = 586, |
| 20433 | WriteFSqrt64YLd_ReadAfterVecYLd = 587, |
| 20434 | WriteFSqrt64ZLd_ReadAfterVecYLd = 588, |
| 20435 | WriteFSqrt64Z = 589, |
| 20436 | WriteFSqrtXLd_ReadAfterVecXLd = 590, |
| 20437 | WriteFSqrtYLd_ReadAfterVecYLd = 591, |
| 20438 | WriteFSqrtY = 592, |
| 20439 | WriteFSqrtZLd_ReadAfterVecYLd = 593, |
| 20440 | WriteFSqrtZ = 594, |
| 20441 | WriteFSqrtYLd = 595, |
| 20442 | WriteFTestYLd_ReadAfterVecYLd = 596, |
| 20443 | WriteFTestY = 597, |
| 20444 | WriteFTestLd_ReadAfterVecXLd = 598, |
| 20445 | WriteFTest = 599, |
| 20446 | WriteALULd_WriteRMW = 600, |
| 20447 | COPY = 601, |
| 20448 | XAM_F = 602, |
| 20449 | LD_Frr = 603, |
| 20450 | MOVSX64rr32 = 604, |
| 20451 | RCL16m1_RCL16m1_EVEX_RCL16mi_RCL16mi_EVEX_RCL32m1_RCL32m1_EVEX_RCL32mi_RCL32mi_EVEX_RCL64m1_RCL64m1_EVEX_RCL64mi_RCL64mi_EVEX_RCL8m1_RCL8m1_EVEX_RCL8mi_RCL8mi_EVEX_RCR16m1_RCR16m1_EVEX_RCR16mi_RCR16mi_EVEX_RCR32m1_RCR32m1_EVEX_RCR32mi_RCR32mi_EVEX_RCR64m1_RCR64m1_EVEX_RCR64mi_RCR64mi_EVEX_RCR8m1_RCR8m1_EVEX_RCR8mi_RCR8mi_EVEX_ROL16m1_ROL16m1_EVEX_ROL16m1_NF_ROL16mi_ROL16mi_EVEX_ROL16mi_NF_ROL32m1_ROL32m1_EVEX_ROL32m1_NF_ROL32mi_ROL32mi_EVEX_ROL32mi_NF_ROL64m1_ROL64m1_EVEX_ROL64m1_NF_ROL64mi_ROL64mi_EVEX_ROL64mi_NF_ROL8m1_ROL8m1_EVEX_ROL8m1_NF_ROL8mi_ROL8mi_EVEX_ROL8mi_NF_ROR16m1_ROR16m1_EVEX_ROR16m1_NF_ROR16mi_ROR16mi_EVEX_ROR16mi_NF_ROR32m1_ROR32m1_EVEX_ROR32m1_NF_ROR32mi_ROR32mi_EVEX_ROR32mi_NF_ROR64m1_ROR64m1_EVEX_ROR64m1_NF_ROR64mi_ROR64mi_EVEX_ROR64mi_NF_ROR8m1_ROR8m1_EVEX_ROR8m1_NF_ROR8mi_ROR8mi_EVEX_ROR8mi_NF = 605, |
| 20452 | RCL16m1_ND_RCL16mi_ND_RCL32m1_ND_RCL32mi_ND_RCL64m1_ND_RCL64mi_ND_RCL8m1_ND_RCL8mi_ND_RCR16m1_ND_RCR16mi_ND_RCR32m1_ND_RCR32mi_ND_RCR64m1_ND_RCR64mi_ND_RCR8m1_ND_RCR8mi_ND_ROL16m1_ND_ROL16m1_NF_ND_ROL16mi_ND_ROL16mi_NF_ND_ROL32m1_ND_ROL32m1_NF_ND_ROL32mi_ND_ROL32mi_NF_ND_ROL64m1_ND_ROL64m1_NF_ND_ROL64mi_ND_ROL64mi_NF_ND_ROL8m1_ND_ROL8m1_NF_ND_ROL8mi_ND_ROL8mi_NF_ND_ROR16m1_ND_ROR16m1_NF_ND_ROR16mi_ND_ROR16mi_NF_ND_ROR32m1_ND_ROR32m1_NF_ND_ROR32mi_ND_ROR32mi_NF_ND_ROR64m1_ND_ROR64m1_NF_ND_ROR64mi_ND_ROR64mi_NF_ND_ROR8m1_ND_ROR8m1_NF_ND_ROR8mi_ND_ROR8mi_NF_ND = 606, |
| 20453 | RCL16mCL_RCL16mCL_EVEX_RCL32mCL_RCL32mCL_EVEX_RCL64mCL_RCL64mCL_EVEX_RCL8mCL_RCL8mCL_EVEX_RCR16mCL_RCR16mCL_EVEX_RCR32mCL_RCR32mCL_EVEX_RCR64mCL_RCR64mCL_EVEX_RCR8mCL_RCR8mCL_EVEX_ROL16mCL_ROL16mCL_EVEX_ROL16mCL_NF_ROL32mCL_ROL32mCL_EVEX_ROL32mCL_NF_ROL64mCL_ROL64mCL_EVEX_ROL64mCL_NF_ROL8mCL_ROL8mCL_EVEX_ROL8mCL_NF_ROR16mCL_ROR16mCL_EVEX_ROR16mCL_NF_ROR32mCL_ROR32mCL_EVEX_ROR32mCL_NF_ROR64mCL_ROR64mCL_EVEX_ROR64mCL_NF_ROR8mCL_ROR8mCL_EVEX_ROR8mCL_NF = 607, |
| 20454 | RCL16mCL_ND_RCL32mCL_ND_RCL64mCL_ND_RCL8mCL_ND_RCR16mCL_ND_RCR32mCL_ND_RCR64mCL_ND_RCR8mCL_ND_ROL16mCL_ND_ROL16mCL_NF_ND_ROL32mCL_ND_ROL32mCL_NF_ND_ROL64mCL_ND_ROL64mCL_NF_ND_ROL8mCL_ND_ROL8mCL_NF_ND_ROR16mCL_ND_ROR16mCL_NF_ND_ROR32mCL_ND_ROR32mCL_NF_ND_ROR64mCL_ND_ROR64mCL_NF_ND_ROR8mCL_ND_ROR8mCL_NF_ND = 608, |
| 20455 | SAR16m1_SAR16m1_EVEX_SAR16m1_NF_SAR16mi_SAR16mi_EVEX_SAR16mi_NF_SAR32m1_SAR32m1_EVEX_SAR32m1_NF_SAR32mi_SAR32mi_EVEX_SAR32mi_NF_SAR64m1_SAR64m1_EVEX_SAR64m1_NF_SAR64mi_SAR64mi_EVEX_SAR64mi_NF_SAR8m1_SAR8m1_EVEX_SAR8m1_NF_SAR8mi_SAR8mi_EVEX_SAR8mi_NF_SHL16m1_SHL16m1_EVEX_SHL16m1_NF_SHL16mi_SHL16mi_EVEX_SHL16mi_NF_SHL32m1_SHL32m1_EVEX_SHL32m1_NF_SHL32mi_SHL32mi_EVEX_SHL32mi_NF_SHL64m1_SHL64m1_EVEX_SHL64m1_NF_SHL64mi_SHL64mi_EVEX_SHL64mi_NF_SHL8m1_SHL8m1_EVEX_SHL8m1_NF_SHL8mi_SHL8mi_EVEX_SHL8mi_NF_SHR16m1_SHR16m1_EVEX_SHR16m1_NF_SHR16mi_SHR16mi_EVEX_SHR16mi_NF_SHR32m1_SHR32m1_EVEX_SHR32m1_NF_SHR32mi_SHR32mi_EVEX_SHR32mi_NF_SHR64m1_SHR64m1_EVEX_SHR64m1_NF_SHR64mi_SHR64mi_EVEX_SHR64mi_NF_SHR8m1_SHR8m1_EVEX_SHR8m1_NF_SHR8mi_SHR8mi_EVEX_SHR8mi_NF = 609, |
| 20456 | SAR16m1_ND_SAR16m1_NF_ND_SAR16mi_ND_SAR16mi_NF_ND_SAR32m1_ND_SAR32m1_NF_ND_SAR32mi_ND_SAR32mi_NF_ND_SAR64m1_ND_SAR64m1_NF_ND_SAR64mi_ND_SAR64mi_NF_ND_SAR8m1_ND_SAR8m1_NF_ND_SAR8mi_ND_SAR8mi_NF_ND_SHL16m1_ND_SHL16m1_NF_ND_SHL16mi_ND_SHL16mi_NF_ND_SHL32m1_ND_SHL32m1_NF_ND_SHL32mi_ND_SHL32mi_NF_ND_SHL64m1_ND_SHL64m1_NF_ND_SHL64mi_ND_SHL64mi_NF_ND_SHL8m1_ND_SHL8m1_NF_ND_SHL8mi_ND_SHL8mi_NF_ND_SHR16m1_ND_SHR16m1_NF_ND_SHR16mi_ND_SHR16mi_NF_ND_SHR32m1_ND_SHR32m1_NF_ND_SHR32mi_ND_SHR32mi_NF_ND_SHR64m1_ND_SHR64m1_NF_ND_SHR64mi_ND_SHR64mi_NF_ND_SHR8m1_ND_SHR8m1_NF_ND_SHR8mi_ND_SHR8mi_NF_ND = 610, |
| 20457 | SAR16mCL_SAR16mCL_EVEX_SAR16mCL_NF_SAR32mCL_SAR32mCL_EVEX_SAR32mCL_NF_SAR64mCL_SAR64mCL_EVEX_SAR64mCL_NF_SAR8mCL_SAR8mCL_EVEX_SAR8mCL_NF_SHL16mCL_SHL16mCL_EVEX_SHL16mCL_NF_SHL32mCL_SHL32mCL_EVEX_SHL32mCL_NF_SHL64mCL_SHL64mCL_EVEX_SHL64mCL_NF_SHL8mCL_SHL8mCL_EVEX_SHL8mCL_NF_SHR16mCL_SHR16mCL_EVEX_SHR16mCL_NF_SHR32mCL_SHR32mCL_EVEX_SHR32mCL_NF_SHR64mCL_SHR64mCL_EVEX_SHR64mCL_NF_SHR8mCL_SHR8mCL_EVEX_SHR8mCL_NF = 611, |
| 20458 | SAR16mCL_ND_SAR16mCL_NF_ND_SAR32mCL_ND_SAR32mCL_NF_ND_SAR64mCL_ND_SAR64mCL_NF_ND_SAR8mCL_ND_SAR8mCL_NF_ND_SHL16mCL_ND_SHL16mCL_NF_ND_SHL32mCL_ND_SHL32mCL_NF_ND_SHL64mCL_ND_SHL64mCL_NF_ND_SHL8mCL_ND_SHL8mCL_NF_ND_SHR16mCL_ND_SHR16mCL_NF_ND_SHR32mCL_ND_SHR32mCL_NF_ND_SHR64mCL_ND_SHR64mCL_NF_ND_SHR8mCL_ND_SHR8mCL_NF_ND = 612, |
| 20459 | MOVSX32rr16_MOVSX32rr8_MOVSX32rr8_NOREX_MOVSX64rr16_MOVSX64rr8_MOVZX32rr16_MOVZX32rr8_MOVZX32rr8_NOREX_MOVZX64rr16_MOVZX64rr8 = 613, |
| 20460 | FCOMPP = 614, |
| 20461 | UCOM_FPPr_UCOM_FPr_UCOM_Fr = 615, |
| 20462 | MMX_CVTPI2PSrr = 616, |
| 20463 | MMX_CVTPI2PSrm = 617, |
| 20464 | MMX_CVTPS2PIrr_MMX_CVTTPS2PIrr = 618, |
| 20465 | POP32r_POP64r_POP16rmr_POP32rmr_POP64rmr = 619, |
| 20466 | PUSH16r_PUSH32r_PUSH64r_PUSH16i_PUSH32i_PUSH16rmr_PUSH32rmr_PUSH64rmr_PUSH16i8_PUSH32i8_PUSH64i8_PUSH64i32 = 620, |
| 20467 | XCH_F = 621, |
| 20468 | RETI16_RETI32_RETI64_IRET_IRET16_IRET32_IRET64 = 622, |
| 20469 | MMX_CVTPS2PIrm_MMX_CVTTPS2PIrm = 623, |
| 20470 | ILD_F16m_ILD_F32m_ILD_F64m = 624, |
| 20471 | CVTSI642SDrm = 625, |
| 20472 | CVTSI642SDrm_Int = 626, |
| 20473 | CVTSI642SSrr = 627, |
| 20474 | CVTSI642SSrr_Int = 628, |
| 20475 | CVTSI642SSrm = 629, |
| 20476 | CVTSI642SSrm_Int = 630, |
| 20477 | CVTSS2SI64rr_CVTTSS2SI64rr = 631, |
| 20478 | CVTSS2SI64rr_Int_CVTTSS2SI64rr_Int = 632, |
| 20479 | CVTSS2SI64rm_CVTSS2SI64rm_Int_CVTTSS2SI64rm_CVTTSS2SI64rm_Int = 633, |
| 20480 | FDECSTP_FFREE_FFREEP_FINCSTP_WAIT_STOSB_STOSL_STOSQ_STOSW = 634, |
| 20481 | LFENCE = 635, |
| 20482 | MOVSSrr_MOVSSrr_REV = 636, |
| 20483 | LEAVE_LEAVE64 = 637, |
| 20484 | POP16r = 638, |
| 20485 | PUSH16rmm_PUSH32rmm_PUSH64rmm = 639, |
| 20486 | LODSB_LODSL_LODSQ_LODSW_SCASB_SCASL_SCASQ_SCASW = 640, |
| 20487 | PUSHCS16_PUSHCS32_PUSHDS16_PUSHDS32_PUSHES16_PUSHES32_PUSHFS16_PUSHFS32_PUSHFS64_PUSHGS16_PUSHGS32_PUSHGS64_PUSHSS16_PUSHSS32 = 641, |
| 20488 | ISTT_FP16m_ISTT_FP32m_ISTT_FP64m_ST_F32m_ST_F64m_ST_FP32m_ST_FP64m = 642, |
| 20489 | ST_FPrr_ST_Frr = 643, |
| 20490 | MMX_PADDQrr_MMX_PSUBQrr = 644, |
| 20491 | MOVSX16rr8_MOVZX16rr8 = 645, |
| 20492 | MOVDQUmr_MASKMOVDQU_MASKMOVDQU64 = 646, |
| 20493 | MOVUPDmr_MOVUPSmr = 647, |
| 20494 | PADDQrr_PSUBQrr = 648, |
| 20495 | CLD = 649, |
| 20496 | LDDQUrm = 650, |
| 20497 | CMPSB_CMPSL_CMPSQ_CMPSW_MOVSB_MOVSL_MOVSQ_MOVSW = 651, |
| 20498 | POP16rmm_POP32rmm_POP64rmm = 652, |
| 20499 | XADD16rm_XADD32rm_XADD64rm_XADD8rm_XCHG16rm_XCHG32rm_XCHG64rm_XCHG8rm = 653, |
| 20500 | PHADDDrr_PHSUBDrr = 654, |
| 20501 | MOVSX16rm8_MOVZX16rm8 = 655, |
| 20502 | MMX_PADDQrm_MMX_PSUBQrm = 656, |
| 20503 | MOVDQUrm = 657, |
| 20504 | MOVUPDrm_MOVUPSrm = 658, |
| 20505 | PADDQrm_PSUBQrm = 659, |
| 20506 | CBW_CWD_CWDE_CDQ_CDQE_CQO = 660, |
| 20507 | JCXZ_JECXZ_JRCXZ = 661, |
| 20508 | LD_F80m = 662, |
| 20509 | PHADDDrm_PHSUBDrm = 663, |
| 20510 | MMX_PEXTRWrr_PEXTRWrr_PEXTRWrr_REV = 664, |
| 20511 | FLDCW16m = 665, |
| 20512 | ST_FP80m = 666, |
| 20513 | MMX_PHADDSWrr_MMX_PHADDWrr_MMX_PHSUBSWrr_MMX_PHSUBWrr = 667, |
| 20514 | CMPXCHG8rm = 668, |
| 20515 | INTO = 669, |
| 20516 | XLAT = 670, |
| 20517 | SHLD16rrCL_SHRD16rrCL = 671, |
| 20518 | SHLD16rri8_SHRD16rri8 = 672, |
| 20519 | SHLD16mrCL_SHRD16mrCL = 673, |
| 20520 | SHLD16mri8_SHRD16mri8 = 674, |
| 20521 | IST_F16m_IST_F32m_IST_FP16m_IST_FP32m_IST_FP64m = 675, |
| 20522 | MMX_PHADDSWrm_MMX_PHADDWrm_MMX_PHSUBSWrm_MMX_PHSUBWrm = 676, |
| 20523 | AAD8i8 = 677, |
| 20524 | LOOPE = 678, |
| 20525 | PUSHA16_PUSHA32 = 679, |
| 20526 | SHLD64rrCL_SHRD64rrCL = 680, |
| 20527 | FNSTCW16m = 681, |
| 20528 | POPA16_POPA32 = 682, |
| 20529 | PUSHF16_PUSHF32_PUSHF64 = 683, |
| 20530 | SHLD64mrCL_SHRD64mrCL = 684, |
| 20531 | SHLD64mri8_SHRD64mri8 = 685, |
| 20532 | SHLD64rri8_SHRD64rri8 = 686, |
| 20533 | CMPXCHG8rr = 687, |
| 20534 | COM_FIPr_COM_FIr_UCOM_FIPr_UCOM_FIr_TST_F_TST_Fp32_TST_Fp64_TST_Fp80 = 688, |
| 20535 | BOUNDS16rm_BOUNDS32rm = 689, |
| 20536 | AAA_AAS = 690, |
| 20537 | CMPXCHG16rm_CMPXCHG32rm_CMPXCHG64rm = 691, |
| 20538 | LOOPNE = 692, |
| 20539 | PAUSE = 693, |
| 20540 | CMPXCHG8B = 694, |
| 20541 | DAA = 695, |
| 20542 | LOOP = 696, |
| 20543 | DAS = 697, |
| 20544 | AAM8i8 = 698, |
| 20545 | STD = 699, |
| 20546 | CMPXCHG16B = 700, |
| 20547 | ARPL16mr_ARPL16rr = 701, |
| 20548 | FNCLEX_FXTRACT = 702, |
| 20549 | POPF32_POPF64 = 703, |
| 20550 | POPDS16_POPDS32_POPES16_POPES32_POPFS16_POPFS32_POPFS64_POPGS16_POPGS32_POPGS64 = 704, |
| 20551 | RDTSC_RDTSCP = 705, |
| 20552 | ENTER = 706, |
| 20553 | POPF16 = 707, |
| 20554 | MONITOR32rrr_MONITOR64rrr = 708, |
| 20555 | FRNDINT = 709, |
| 20556 | MWAITrr_RDPMC = 710, |
| 20557 | POPSS16_POPSS32 = 711, |
| 20558 | FPREM = 712, |
| 20559 | INSB_INSL_INSW = 713, |
| 20560 | FNINIT = 714, |
| 20561 | OUT8rr_OUT16rr_OUT32rr = 715, |
| 20562 | FPREM1 = 716, |
| 20563 | INVLPG_INVLPGA32_INVLPGA64 = 717, |
| 20564 | OUT8ir_OUT16ir_OUT32ir = 718, |
| 20565 | OUTSB_OUTSL_OUTSW = 719, |
| 20566 | FSCALE = 720, |
| 20567 | RDMSR = 721, |
| 20568 | RET_RET16_RET32_RET64_LRET16_LRET32_LRET64_LRETI16_LRETI32_LRETI64 = 722, |
| 20569 | IN8ri_IN16ri_IN32ri = 723, |
| 20570 | IN8rr_IN16rr_IN32rr = 724, |
| 20571 | F2XM1 = 725, |
| 20572 | CPUID = 726, |
| 20573 | INT = 727, |
| 20574 | INT3 = 728, |
| 20575 | FXSAVE_FXSAVE64 = 729, |
| 20576 | FXRSTOR_FXRSTOR64 = 730, |
| 20577 | FYL2X = 731, |
| 20578 | FYL2XP1 = 732, |
| 20579 | FPTAN = 733, |
| 20580 | FSINCOS_FSIN_FCOS = 734, |
| 20581 | FPATAN = 735, |
| 20582 | WRMSR = 736, |
| 20583 | COMP_FST0r_COM_FST0r = 737, |
| 20584 | UCOM_FPr_UCOM_Fr = 738, |
| 20585 | FDECSTP_FINCSTP_FFREE_FFREEP = 739, |
| 20586 | FNOP = 740, |
| 20587 | RET64 = 741, |
| 20588 | CDQ_CQO = 742, |
| 20589 | MMX_PABSBrr_MMX_PABSDrr_MMX_PABSWrr_MMX_PSIGNBrr_MMX_PSIGNDrr_MMX_PSIGNWrr = 743, |
| 20590 | MMX_PADDQrr = 744, |
| 20591 | MMX_PALIGNRrri = 745, |
| 20592 | SCASB_SCASL_SCASQ_SCASW = 746, |
| 20593 | COMISDrr_COMISDrr_Int_COMISSrr_COMISSrr_Int_UCOMISDrr_UCOMISDrr_Int_UCOMISSrr_UCOMISSrr_Int_VCOMISDrr_VCOMISDrr_Int_VCOMISSrr_VCOMISSrr_Int_VUCOMISDrr_VUCOMISDrr_Int_VUCOMISSrr_VUCOMISSrr_Int = 747, |
| 20594 | CWD = 748, |
| 20595 | FNSTSW16r = 749, |
| 20596 | MMX_MOVDQ2Qrr = 750, |
| 20597 | PUSHFS64 = 751, |
| 20598 | EXTRACTPSrr_VEXTRACTPSrr = 752, |
| 20599 | RCL8r1_RCL16r1_RCL32r1_RCL64r1_RCR8r1_RCR16r1_RCR32r1_RCR64r1 = 753, |
| 20600 | RCR8ri_RCR16ri_RCR32ri_RCR64ri = 754, |
| 20601 | RCL8ri_RCL16ri_RCL32ri_RCL64ri = 755, |
| 20602 | COM_FIPr_COM_FIr_UCOM_FIPr_UCOM_FIr = 756, |
| 20603 | MOV64sr = 757, |
| 20604 | RCL16rCL_RCL16rCL_EVEX_RCL16rCL_ND_RCL32rCL_RCL32rCL_EVEX_RCL32rCL_ND_RCL64rCL_RCL64rCL_EVEX_RCL64rCL_ND_RCL8rCL_RCL8rCL_EVEX_RCL8rCL_ND_RCR16rCL_RCR16rCL_EVEX_RCR16rCL_ND_RCR32rCL_RCR32rCL_EVEX_RCR32rCL_ND_RCR64rCL_RCR64rCL_EVEX_RCR64rCL_ND_RCR8rCL_RCR8rCL_EVEX_RCR8rCL_ND = 758, |
| 20605 | PUSH16r_PUSH16rmr_PUSH32r_PUSH32rmr_PUSH64i8_PUSH64r_PUSH64rmr = 759, |
| 20606 | CLI = 760, |
| 20607 | PUSHGS64 = 761, |
| 20608 | ISTT_FP16m_ISTT_FP32m_ISTT_FP64m = 762, |
| 20609 | CALL64pcrel32 = 763, |
| 20610 | CALL64r_RVMARKER_CALL16r_CALL16r_NT_CALL32r_CALL32r_NT_CALL64r_CALL64r_NT = 764, |
| 20611 | EXTRACTPSmr_VEXTRACTPSmr = 765, |
| 20612 | STOSB_STOSL_STOSQ_STOSW = 766, |
| 20613 | PEXTRDmr_PEXTRQmr_VPEXTRDmr_VPEXTRQmr = 767, |
| 20614 | PUSHF16_PUSHF64 = 768, |
| 20615 | CLFLUSH_CLFLUSHOPT = 769, |
| 20616 | VBROADCASTSSrm = 770, |
| 20617 | MOV64toPQIrm_VMOV64toPQIrm_MOVDI2PDIrm_VMOVDI2PDIrm_MOVQI2PQIrm_VMOVQI2PQIrm = 771, |
| 20618 | MOVDDUPrm_VMOVDDUPrm_MOVSHDUPrm_VMOVSHDUPrm_MOVSLDUPrm_VMOVSLDUPrm = 772, |
| 20619 | MOVSDrm_MOVSDrm_alt_VMOVSDrm_VMOVSDrm_alt_MOVSSrm_MOVSSrm_alt_VMOVSSrm_VMOVSSrm_alt = 773, |
| 20620 | MOV16sm = 774, |
| 20621 | MMX_PABSBrm_MMX_PABSDrm_MMX_PABSWrm = 775, |
| 20622 | MMX_PALIGNRrmi = 776, |
| 20623 | MMX_PSIGNBrm_MMX_PSIGNDrm_MMX_PSIGNWrm = 777, |
| 20624 | LODSL_LODSQ = 778, |
| 20625 | VMOVDDUPYrm_VMOVSHDUPYrm_VMOVSLDUPYrm = 779, |
| 20626 | VINSERTF128rm = 780, |
| 20627 | MMX_PADDQrm = 781, |
| 20628 | VERRm_VERWm = 782, |
| 20629 | FARJMP64m = 783, |
| 20630 | FNSTSWm = 784, |
| 20631 | SLDT16r_SLDT32r_SLDT64r_STR16r_STR32r_STR64r = 785, |
| 20632 | CALL64m_RVMARKER_CALL64m_CALL64m_NT = 786, |
| 20633 | CALL16m_CALL16m_NT_CALL32m_CALL32m_NT = 787, |
| 20634 | COMISDrm_COMISDrm_Int_COMISSrm_COMISSrm_Int_UCOMISDrm_UCOMISDrm_Int_UCOMISSrm_UCOMISSrm_Int_VCOMISDrm_VCOMISDrm_Int_VCOMISSrm_VCOMISSrm_Int_VUCOMISDrm_VUCOMISDrm_Int_VUCOMISSrm_VUCOMISSrm_Int = 788, |
| 20635 | CMPSB_CMPSL_CMPSQ_CMPSW = 789, |
| 20636 | ROL16m1_ROL16m1_EVEX_ROL16m1_NF_ROL16mi_ROL16mi_EVEX_ROL16mi_NF_ROL32m1_ROL32m1_EVEX_ROL32m1_NF_ROL32mi_ROL32mi_EVEX_ROL32mi_NF_ROL64m1_ROL64m1_EVEX_ROL64m1_NF_ROL64mi_ROL64mi_EVEX_ROL64mi_NF_ROL8m1_ROL8m1_EVEX_ROL8m1_NF_ROL8mi_ROL8mi_EVEX_ROL8mi_NF_ROR16m1_ROR16m1_EVEX_ROR16m1_NF_ROR16mi_ROR16mi_EVEX_ROR16mi_NF_ROR32m1_ROR32m1_EVEX_ROR32m1_NF_ROR32mi_ROR32mi_EVEX_ROR32mi_NF_ROR64m1_ROR64m1_EVEX_ROR64m1_NF_ROR64mi_ROR64mi_EVEX_ROR64mi_NF_ROR8m1_ROR8m1_EVEX_ROR8m1_NF_ROR8mi_ROR8mi_EVEX_ROR8mi_NF = 790, |
| 20637 | ROL16m1_ND_ROL16m1_NF_ND_ROL16mi_ND_ROL16mi_NF_ND_ROL32m1_ND_ROL32m1_NF_ND_ROL32mi_ND_ROL32mi_NF_ND_ROL64m1_ND_ROL64m1_NF_ND_ROL64mi_ND_ROL64mi_NF_ND_ROL8m1_ND_ROL8m1_NF_ND_ROL8mi_ND_ROL8mi_NF_ND_ROR16m1_ND_ROR16m1_NF_ND_ROR16mi_ND_ROR16mi_NF_ND_ROR32m1_ND_ROR32m1_NF_ND_ROR32mi_ND_ROR32mi_NF_ND_ROR64m1_ND_ROR64m1_NF_ND_ROR64mi_ND_ROR64mi_NF_ND_ROR8m1_ND_ROR8m1_NF_ND_ROR8mi_ND_ROR8mi_NF_ND = 791, |
| 20638 | XADD16rm_XADD32rm_XADD64rm_XADD8rm = 792, |
| 20639 | FARCALL64m = 793, |
| 20640 | LD_F32m_LD_F64m = 794, |
| 20641 | ROL16mCL_ROL16mCL_EVEX_ROL16mCL_NF_ROL32mCL_ROL32mCL_EVEX_ROL32mCL_NF_ROL64mCL_ROL64mCL_EVEX_ROL64mCL_NF_ROL8mCL_ROL8mCL_EVEX_ROL8mCL_NF_ROR16mCL_ROR16mCL_EVEX_ROR16mCL_NF_ROR32mCL_ROR32mCL_EVEX_ROR32mCL_NF_ROR64mCL_ROR64mCL_EVEX_ROR64mCL_NF_ROR8mCL_ROR8mCL_EVEX_ROR8mCL_NF = 795, |
| 20642 | ROL16mCL_ND_ROL16mCL_NF_ND_ROL32mCL_ND_ROL32mCL_NF_ND_ROL64mCL_ND_ROL64mCL_NF_ND_ROL8mCL_ND_ROL8mCL_NF_ND_ROR16mCL_ND_ROR16mCL_NF_ND_ROR32mCL_ND_ROR32mCL_NF_ND_ROR64mCL_ND_ROR64mCL_NF_ND_ROR8mCL_ND_ROR8mCL_NF_ND = 796, |
| 20643 | ADC8mr_ADC16mr_ADC32mr_ADC64mr_SBB8mr_SBB16mr_SBB32mr_SBB64mr = 797, |
| 20644 | ADD_F32m_ADD_F64m_SUBR_F32m_SUBR_F64m_SUB_F32m_SUB_F64m = 798, |
| 20645 | PCMPGTQrm_VPCMPGTQrm = 799, |
| 20646 | FICOM16m_FICOM32m_FICOMP16m_FICOMP32m = 800, |
| 20647 | MUL_F32m_MUL_F64m = 801, |
| 20648 | ADD_FI16m_ADD_FI32m_SUBR_FI16m_SUBR_FI32m_SUB_FI16m_SUB_FI32m = 802, |
| 20649 | MUL_FI16m_MUL_FI32m = 803, |
| 20650 | DIVR_F32m_DIVR_F64m_DIV_F32m_DIV_F64m = 804, |
| 20651 | DIVR_FI16m_DIVR_FI32m_DIV_FI16m_DIV_FI32m = 805, |
| 20652 | VZEROALL = 806, |
| 20653 | VZEROUPPER = 807, |
| 20654 | CLC = 808, |
| 20655 | SUB32rr_SUB64rr_XOR32rr_XOR64rr = 809, |
| 20656 | XORPSrr_VXORPSrr_XORPDrr_VXORPDrr = 810, |
| 20657 | VXORPSYrr_VXORPDYrr = 811, |
| 20658 | PXORrr_VPXORrr = 812, |
| 20659 | PSUBBrr_VPSUBBrr_PSUBDrr_VPSUBDrr_VPSUBQrr_PSUBWrr_VPSUBWrr_PCMPGTBrr_VPCMPGTBrr_PCMPGTDrr_VPCMPGTDrr_PCMPGTWrr_VPCMPGTWrr = 813, |
| 20660 | PSUBQrr = 814, |
| 20661 | PCMPGTQrr_VPCMPGTQrr = 815, |
| 20662 | CMOV16rr_CMOV32rr_CMOV64rr = 816, |
| 20663 | CMOV16rm_CMOV32rm_CMOV64rm = 817, |
| 20664 | SETCCr = 818, |
| 20665 | SETCCm = 819, |
| 20666 | MOVHPDrm_MOVHPSrm_MOVLPDrm_MOVLPSrm_VMOVHPDrm_VMOVHPSrm_VMOVLPDrm_VMOVLPSrm = 820, |
| 20667 | RETI16_RETI32_RETI64 = 821, |
| 20668 | LRETI16_LRETI32_LRETI64 = 822, |
| 20669 | RDPMC = 823, |
| 20670 | RDRAND16r_RDRAND32r_RDRAND64r = 824, |
| 20671 | FBLDm = 825, |
| 20672 | FFREE_FFREEP = 826, |
| 20673 | FSAVEm = 827, |
| 20674 | FRSTORm = 828, |
| 20675 | FXTRACT = 829, |
| 20676 | VPBROADCASTDrm_VPBROADCASTQrm = 830, |
| 20677 | VBROADCASTF128rm_VBROADCASTSDYrm_VBROADCASTSSYrm = 831, |
| 20678 | VBROADCASTI128rm = 832, |
| 20679 | VPBROADCASTDYrm_VPBROADCASTQYrm = 833, |
| 20680 | FBSTPm = 834, |
| 20681 | VMPTRSTm = 835, |
| 20682 | ST_FP32m_ST_FP64m = 836, |
| 20683 | VPSLLVQYrr_VPSRLVQYrr = 837, |
| 20684 | VPSLLVQrr_VPSRLVQrr = 838, |
| 20685 | MMX_MOVQ2DQrr = 839, |
| 20686 | JMP16r_JMP16r_NT_JMP32r_JMP32r_NT_JMP64r_JMP64r_NT_JMP64r_REX = 840, |
| 20687 | FINCSTP = 841, |
| 20688 | ANDN32rr_ANDN32rr_EVEX_ANDN32rr_NF_ANDN64rr_ANDN64rr_EVEX_ANDN64rr_NF = 842, |
| 20689 | VPBLENDDYrri = 843, |
| 20690 | VPBLENDDrri = 844, |
| 20691 | SGDT64m_SIDT64m_SMSW16m_STRm_SYSCALL = 845, |
| 20692 | VPSLLVQrm_VPSRLVQrm = 846, |
| 20693 | VPSLLVQYrm_VPSRLVQYrm = 847, |
| 20694 | PDEP32rm_PDEP32rm_EVEX_PDEP64rm_PDEP64rm_EVEX_PEXT32rm_PEXT32rm_EVEX_PEXT64rm_PEXT64rm_EVEX = 848, |
| 20695 | PMOVSXBDrm_PMOVZXBDrm_VPMOVSXBDrm_VPMOVZXBDrm_PMOVSXBQrm_PMOVZXBQrm_VPMOVSXBQrm_VPMOVZXBQrm_PMOVSXBWrm_PMOVZXBWrm_VPMOVSXBWrm_VPMOVZXBWrm_PMOVSXDQrm_PMOVZXDQrm_VPMOVSXDQrm_VPMOVZXDQrm_PMOVSXWDrm_PMOVZXWDrm_VPMOVSXWDrm_VPMOVZXWDrm_PMOVSXWQrm_PMOVZXWQrm_VPMOVSXWQrm_VPMOVZXWQrm = 849, |
| 20696 | VPMOVSXBDYrm_VPMOVSXBQYrm_VPMOVSXWQYrm = 850, |
| 20697 | JMP16m_JMP16m_NT_JMP32m_JMP32m_NT_JMP64m_JMP64m_NT_JMP64m_REX = 851, |
| 20698 | ANDN32rm_ANDN32rm_EVEX_ANDN32rm_NF_ANDN64rm_ANDN64rm_EVEX_ANDN64rm_NF = 852, |
| 20699 | MOVBE16rm_MOVBE16rm_EVEX_MOVBE32rm_MOVBE32rm_EVEX_MOVBE64rm_MOVBE64rm_EVEX = 853, |
| 20700 | VINSERTI128rm = 854, |
| 20701 | VPBLENDDrmi = 855, |
| 20702 | VPBLENDDYrmi = 856, |
| 20703 | POP32r_POP64r = 857, |
| 20704 | SFENCE = 858, |
| 20705 | MOVBE32mr_MOVBE32mr_EVEX_MOVBE64mr_MOVBE64mr_EVEX = 859, |
| 20706 | MOVBE16mr = 860, |
| 20707 | PUSH16r_PUSH32r_PUSH64r_PUSH64i8 = 861, |
| 20708 | MFENCE = 862, |
| 20709 | XGETBV = 863, |
| 20710 | MMX_PACKSSDWrm_MMX_PACKSSWBrm_MMX_PACKUSWBrm = 864, |
| 20711 | LRET64_RET32 = 865, |
| 20712 | ROL8r1_ROL16r1_ROL32r1_ROL64r1_ROR8r1_ROR16r1_ROR32r1_ROR64r1 = 866, |
| 20713 | PDEP32rr_PDEP32rr_EVEX_PDEP64rr_PDEP64rr_EVEX_PEXT32rr_PEXT32rr_EVEX_PEXT64rr_PEXT64rr_EVEX = 867, |
| 20714 | VPBROADCASTBrr_VPBROADCASTWrr = 868, |
| 20715 | VPMOVSXBWYrm_VPMOVSXDQYrm_VPMOVSXWDYrm_VPMOVZXWDYrm = 869, |
| 20716 | MMX_PACKSSDWrr_MMX_PACKSSWBrr_MMX_PACKUSWBrr = 870, |
| 20717 | CLDEMOTE = 871, |
| 20718 | MMX_CVTPI2PDrm = 872, |
| 20719 | VPBROADCASTBYrm_VPBROADCASTBrm_VPBROADCASTWYrm_VPBROADCASTWrm = 873, |
| 20720 | LAR16rr_LAR32rr_LAR64rr = 874, |
| 20721 | LAR16rm_LAR32rm_LAR64rm_LSL16rm_LSL32rm_LSL64rm = 875, |
| 20722 | MUL_FPrST0_MUL_FST0r_MUL_FrST0 = 876, |
| 20723 | VPCMPGTQYrm = 877, |
| 20724 | VCVTSI642SSrr_VCVTSI642SSrr_Int = 878, |
| 20725 | STR16r_STR32r_STR64r = 879, |
| 20726 | XSETBV = 880, |
| 20727 | RCL16mCL_RCL16mCL_EVEX_RCL32mCL_RCL32mCL_EVEX_RCL64mCL_RCL64mCL_EVEX_RCL8mCL_RCL8mCL_EVEX = 881, |
| 20728 | RCL16mCL_ND_RCL32mCL_ND_RCL64mCL_ND_RCL8mCL_ND = 882, |
| 20729 | RCL16rCL_RCL16rCL_EVEX_RCL16rCL_ND_RCL32rCL_RCL32rCL_EVEX_RCL32rCL_ND_RCL64rCL_RCL64rCL_EVEX_RCL64rCL_ND_RCR16rCL_RCR16rCL_EVEX_RCR16rCL_ND_RCR32rCL_RCR32rCL_EVEX_RCR32rCL_ND_RCR64rCL_RCR64rCL_EVEX_RCR64rCL_ND = 883, |
| 20730 | RCL8rCL = 884, |
| 20731 | RCR8rCL = 885, |
| 20732 | RDTSC = 886, |
| 20733 | XRSTOR_XRSTOR64_XRSTORS_XRSTORS64 = 887, |
| 20734 | DIV_FPrST0_DIV_FST0r_DIV_FrST0 = 888, |
| 20735 | DIVR_F32m_DIVR_F64m = 889, |
| 20736 | DIVR_FI16m_DIVR_FI32m = 890, |
| 20737 | DIVR_FPrST0_DIVR_FST0r_DIVR_FrST0 = 891, |
| 20738 | XSAVE64 = 892, |
| 20739 | XSAVE = 893, |
| 20740 | XSAVEC_XSAVEC64_XSAVES_XSAVES64_XSAVEOPT_XSAVEOPT64 = 894, |
| 20741 | VMCLEARm = 895, |
| 20742 | FLDENVm = 896, |
| 20743 | FXRSTOR64 = 897, |
| 20744 | FSTENVm = 898, |
| 20745 | VGATHERDPDrm_VPGATHERDQrm = 899, |
| 20746 | VGATHERDPDYrm_VPGATHERDQYrm = 900, |
| 20747 | VGATHERDPSrm_VPGATHERDDrm = 901, |
| 20748 | VGATHERDPSYrm_VPGATHERDDYrm = 902, |
| 20749 | VGATHERQPDrm_VPGATHERQQrm = 903, |
| 20750 | VGATHERQPDYrm_VPGATHERQQYrm_VGATHERQPSYrm_VPGATHERQDYrm = 904, |
| 20751 | VGATHERQPSrm_VPGATHERQDrm = 905, |
| 20752 | VPXORYrr = 906, |
| 20753 | VPSUBBYrr_VPSUBDYrr_VPSUBQYrr_VPSUBWYrr_VPCMPGTBYrr_VPCMPGTDYrr_VPCMPGTWYrr = 907, |
| 20754 | VPCMPGTQYrr = 908, |
| 20755 | ADC16ri8_ADC32ri8_ADC64ri8_SBB16ri8_SBB32ri8_SBB64ri8 = 909, |
| 20756 | ADC8i8_SBB8i8_ADC16i16_SBB16i16_ADC32i32_SBB32i32_ADC64i32_SBB64i32 = 910, |
| 20757 | MOVBE16mr_EVEX = 911, |
| 20758 | FCOM32m_FCOM64m_FCOMP32m_FCOMP64m = 912, |
| 20759 | LRET64 = 913, |
| 20760 | POPF64 = 914, |
| 20761 | VGATHERQPDYrm_VPGATHERQQYrm = 915, |
| 20762 | PCMPEQQrr = 916, |
| 20763 | PCMPGTQrr = 917, |
| 20764 | PCMPEQQrm = 918, |
| 20765 | PCMPGTQrm = 919, |
| 20766 | MOV16rm = 920, |
| 20767 | POP16rmm = 921, |
| 20768 | PUSH16rmm_PUSH32rmm = 922, |
| 20769 | PUSHF16 = 923, |
| 20770 | LAHF = 924, |
| 20771 | ADD16mi_ADD16mi8_ADD16mi8_EVEX_ADD16mi8_NF_ADD16mi_EVEX_ADD16mi_NF_ADD32mi_ADD32mi8_ADD32mi8_EVEX_ADD32mi8_NF_ADD32mi_EVEX_ADD32mi_NF_ADD64mi32_ADD64mi32_EVEX_ADD64mi32_NF_ADD64mi8_ADD64mi8_EVEX_ADD64mi8_NF_ADD8mi_ADD8mi8_ADD8mi_EVEX_ADD8mi_NF_SUB16mi_SUB16mi8_SUB16mi8_EVEX_SUB16mi8_NF_SUB16mi_EVEX_SUB16mi_NF_SUB32mi_SUB32mi8_SUB32mi8_EVEX_SUB32mi8_NF_SUB32mi_EVEX_SUB32mi_NF_SUB64mi32_SUB64mi32_EVEX_SUB64mi32_NF_SUB64mi8_SUB64mi8_EVEX_SUB64mi8_NF_SUB8mi_SUB8mi8_SUB8mi_EVEX_SUB8mi_NF = 925, |
| 20772 | ADD16mi8_ND_ADD16mi8_NF_ND_ADD16mi_ND_ADD16mi_NF_ND_ADD16mr_ND_ADD16mr_NF_ND_ADD32mi8_ND_ADD32mi8_NF_ND_ADD32mi_ND_ADD32mi_NF_ND_ADD32mr_ND_ADD32mr_NF_ND_ADD64mi32_ND_ADD64mi32_NF_ND_ADD64mi8_ND_ADD64mi8_NF_ND_ADD64mr_ND_ADD64mr_NF_ND_ADD8mi_ND_ADD8mi_NF_ND_ADD8mr_ND_ADD8mr_NF_ND_SUB16mi8_ND_SUB16mi8_NF_ND_SUB16mi_ND_SUB16mi_NF_ND_SUB16mr_ND_SUB16mr_NF_ND_SUB32mi8_ND_SUB32mi8_NF_ND_SUB32mi_ND_SUB32mi_NF_ND_SUB32mr_ND_SUB32mr_NF_ND_SUB64mi32_ND_SUB64mi32_NF_ND_SUB64mi8_ND_SUB64mi8_NF_ND_SUB64mr_ND_SUB64mr_NF_ND_SUB8mi_ND_SUB8mi_NF_ND_SUB8mr_ND_SUB8mr_NF_ND = 926, |
| 20773 | ADD16mr_ADD16mr_EVEX_ADD32mr_ADD32mr_EVEX_ADD64mr_ADD64mr_EVEX_ADD8mr_ADD8mr_EVEX_SUB16mr_SUB16mr_EVEX_SUB32mr_SUB32mr_EVEX_SUB64mr_SUB64mr_EVEX_SUB8mr_SUB8mr_EVEX = 927, |
| 20774 | ADD16mr_NF_ADD32mr_NF_ADD64mr_NF_ADD8mr_NF_SUB16mr_NF_SUB32mr_NF_SUB64mr_NF_SUB8mr_NF = 928, |
| 20775 | ADC16mi_ADC16mi8_ADC16mi8_EVEX_ADC16mi_EVEX_ADC32mi_ADC32mi8_ADC32mi8_EVEX_ADC32mi_EVEX_ADC64mi32_ADC64mi32_EVEX_ADC64mi8_ADC64mi8_EVEX_ADC8mi_ADC8mi8_ADC8mi_EVEX_SBB16mi_SBB16mi8_SBB16mi8_EVEX_SBB16mi_EVEX_SBB32mi_SBB32mi8_SBB32mi8_EVEX_SBB32mi_EVEX_SBB64mi32_SBB64mi32_EVEX_SBB64mi8_SBB64mi8_EVEX_SBB8mi_SBB8mi8_SBB8mi_EVEX = 929, |
| 20776 | ADC16mi8_ND_ADC16mi_ND_ADC16mr_ND_ADC32mi8_ND_ADC32mi_ND_ADC32mr_ND_ADC64mi32_ND_ADC64mi8_ND_ADC64mr_ND_ADC8mi_ND_ADC8mr_ND_SBB16mi8_ND_SBB16mi_ND_SBB16mr_ND_SBB32mi8_ND_SBB32mi_ND_SBB32mr_ND_SBB64mi32_ND_SBB64mi8_ND_SBB64mr_ND_SBB8mi_ND_SBB8mr_ND = 930, |
| 20777 | ADC16mr_EVEX_ADC32mr_EVEX_ADC64mr_EVEX_ADC8mr_EVEX_SBB16mr_EVEX_SBB32mr_EVEX_SBB64mr_EVEX_SBB8mr_EVEX = 931, |
| 20778 | DEC16m_DEC16m_EVEX_DEC16m_NF_DEC32m_DEC32m_EVEX_DEC32m_NF_DEC64m_DEC64m_EVEX_DEC64m_NF_DEC8m_DEC8m_EVEX_DEC8m_NF_INC16m_INC16m_EVEX_INC16m_NF_INC32m_INC32m_EVEX_INC32m_NF_INC64m_INC64m_EVEX_INC64m_NF_INC8m_INC8m_EVEX_INC8m_NF_NEG16m_NEG16m_EVEX_NEG16m_NF_NEG32m_NEG32m_EVEX_NEG32m_NF_NEG64m_NEG64m_EVEX_NEG64m_NF_NEG8m_NEG8m_EVEX_NEG8m_NF_NOT16m_NOT16m_EVEX_NOT32m_NOT32m_EVEX_NOT64m_NOT64m_EVEX_NOT8m_NOT8m_EVEX = 932, |
| 20779 | DEC16m_ND_DEC16m_NF_ND_DEC32m_ND_DEC32m_NF_ND_DEC64m_ND_DEC64m_NF_ND_DEC8m_ND_DEC8m_NF_ND_INC16m_ND_INC16m_NF_ND_INC32m_ND_INC32m_NF_ND_INC64m_ND_INC64m_NF_ND_INC8m_ND_INC8m_NF_ND_NEG16m_ND_NEG16m_NF_ND_NEG32m_ND_NEG32m_NF_ND_NEG64m_ND_NEG64m_NF_ND_NEG8m_ND_NEG8m_NF_ND_NOT16m_ND_NOT32m_ND_NOT64m_ND_NOT8m_ND = 933, |
| 20780 | CALL16r_CALL16r_NT_CALL32r_CALL32r_NT = 934, |
| 20781 | RET16_LRET16_LRET32 = 935, |
| 20782 | IRET16_IRET32_IRET64 = 936, |
| 20783 | AND16mi_AND16mi8_AND16mi8_EVEX_AND16mi8_NF_AND16mi_EVEX_AND16mi_NF_AND32mi_AND32mi8_AND32mi8_EVEX_AND32mi8_NF_AND32mi_EVEX_AND32mi_NF_AND64mi32_AND64mi32_EVEX_AND64mi32_NF_AND64mi8_AND64mi8_EVEX_AND64mi8_NF_AND8mi_AND8mi8_AND8mi_EVEX_AND8mi_NF_OR16mi_OR16mi8_OR16mi8_EVEX_OR16mi8_NF_OR16mi_EVEX_OR16mi_NF_OR32mi_OR32mi8_OR32mi8Locked_OR32mi8_EVEX_OR32mi8_NF_OR32mi_EVEX_OR32mi_NF_OR64mi32_OR64mi32_EVEX_OR64mi32_NF_OR64mi8_OR64mi8_EVEX_OR64mi8_NF_OR8mi_OR8mi8_OR8mi_EVEX_OR8mi_NF_XOR16mi_XOR16mi8_XOR16mi8_EVEX_XOR16mi8_NF_XOR16mi_EVEX_XOR16mi_NF_XOR32mi_XOR32mi8_XOR32mi8_EVEX_XOR32mi8_NF_XOR32mi_EVEX_XOR32mi_NF_XOR64mi32_XOR64mi32_EVEX_XOR64mi32_NF_XOR64mi8_XOR64mi8_EVEX_XOR64mi8_NF_XOR8mi_XOR8mi8_XOR8mi_EVEX_XOR8mi_NF = 937, |
| 20784 | AND16mi8_ND_AND16mi8_NF_ND_AND16mi_ND_AND16mi_NF_ND_AND16mr_ND_AND16mr_NF_ND_AND32mi8_ND_AND32mi8_NF_ND_AND32mi_ND_AND32mi_NF_ND_AND32mr_ND_AND32mr_NF_ND_AND64mi32_ND_AND64mi32_NF_ND_AND64mi8_ND_AND64mi8_NF_ND_AND64mr_ND_AND64mr_NF_ND_AND8mi_ND_AND8mi_NF_ND_AND8mr_ND_AND8mr_NF_ND_OR16mi8_ND_OR16mi8_NF_ND_OR16mi_ND_OR16mi_NF_ND_OR16mr_ND_OR16mr_NF_ND_OR32mi8_ND_OR32mi8_NF_ND_OR32mi_ND_OR32mi_NF_ND_OR32mr_ND_OR32mr_NF_ND_OR64mi32_ND_OR64mi32_NF_ND_OR64mi8_ND_OR64mi8_NF_ND_OR64mr_ND_OR64mr_NF_ND_OR8mi_ND_OR8mi_NF_ND_OR8mr_ND_OR8mr_NF_ND_XOR16mi8_ND_XOR16mi8_NF_ND_XOR16mi_ND_XOR16mi_NF_ND_XOR16mr_ND_XOR16mr_NF_ND_XOR32mi8_ND_XOR32mi8_NF_ND_XOR32mi_ND_XOR32mi_NF_ND_XOR32mr_ND_XOR32mr_NF_ND_XOR64mi32_ND_XOR64mi32_NF_ND_XOR64mi8_ND_XOR64mi8_NF_ND_XOR64mr_ND_XOR64mr_NF_ND_XOR8mi_ND_XOR8mi_NF_ND_XOR8mr_ND_XOR8mr_NF_ND = 938, |
| 20785 | AND16mr_AND16mr_EVEX_AND32mr_AND32mr_EVEX_AND64mr_AND64mr_EVEX_AND8mr_AND8mr_EVEX_OR16mr_OR16mr_EVEX_OR32mr_OR32mr_EVEX_OR64mr_OR64mr_EVEX_OR8mr_OR8mr_EVEX_XOR16mr_XOR16mr_EVEX_XOR32mr_XOR32mr_EVEX_XOR64mr_XOR64mr_EVEX_XOR8mr_XOR8mr_EVEX = 939, |
| 20786 | AND16mr_NF_AND32mr_NF_AND64mr_NF_AND8mr_NF_OR16mr_NF_OR32mr_NF_OR64mr_NF_OR8mr_NF_XOR16mr_NF_XOR32mr_NF_XOR64mr_NF_XOR8mr_NF = 940, |
| 20787 | SHLD16mri8_EVEX_SHLD16mri8_ND_SHLD16mri8_NF_SHLD16mri8_NF_ND_SHLD32mri8_SHLD32mri8_EVEX_SHLD32mri8_ND_SHLD32mri8_NF_SHLD32mri8_NF_ND_SHLD64mri8_EVEX_SHLD64mri8_ND_SHLD64mri8_NF_SHLD64mri8_NF_ND_SHRD16mri8_EVEX_SHRD16mri8_ND_SHRD16mri8_NF_SHRD16mri8_NF_ND_SHRD32mri8_SHRD32mri8_EVEX_SHRD32mri8_ND_SHRD32mri8_NF_SHRD32mri8_NF_ND_SHRD64mri8_EVEX_SHRD64mri8_ND_SHRD64mri8_NF_SHRD64mri8_NF_ND = 941, |
| 20788 | SHLD16rrCL_EVEX_SHLD16rrCL_ND_SHLD16rrCL_NF_SHLD16rrCL_NF_ND_SHLD32rrCL_SHLD32rrCL_EVEX_SHLD32rrCL_ND_SHLD32rrCL_NF_SHLD32rrCL_NF_ND_SHLD64rrCL_EVEX_SHLD64rrCL_ND_SHLD64rrCL_NF_SHLD64rrCL_NF_ND_SHRD16rrCL_EVEX_SHRD16rrCL_ND_SHRD16rrCL_NF_SHRD16rrCL_NF_ND_SHRD32rrCL_SHRD32rrCL_EVEX_SHRD32rrCL_ND_SHRD32rrCL_NF_SHRD32rrCL_NF_ND_SHRD64rrCL_EVEX_SHRD64rrCL_ND_SHRD64rrCL_NF_SHRD64rrCL_NF_ND = 942, |
| 20789 | SHLD16mrCL_EVEX_SHLD16mrCL_ND_SHLD16mrCL_NF_SHLD16mrCL_NF_ND_SHLD32mrCL_SHLD32mrCL_EVEX_SHLD32mrCL_ND_SHLD32mrCL_NF_SHLD32mrCL_NF_ND_SHLD64mrCL_EVEX_SHLD64mrCL_ND_SHLD64mrCL_NF_SHLD64mrCL_NF_ND_SHRD16mrCL_EVEX_SHRD16mrCL_ND_SHRD16mrCL_NF_SHRD16mrCL_NF_ND_SHRD32mrCL_SHRD32mrCL_EVEX_SHRD32mrCL_ND_SHRD32mrCL_NF_SHRD32mrCL_NF_ND_SHRD64mrCL_EVEX_SHRD64mrCL_ND_SHRD64mrCL_NF_SHRD64mrCL_NF_ND = 943, |
| 20790 | XADD16rr_XADD32rr_XADD64rr_XADD8rr = 944, |
| 20791 | CHS_F_CHS_Fp32_CHS_Fp64_CHS_Fp80 = 945, |
| 20792 | MMX_MASKMOVQ_MMX_MASKMOVQ64 = 946, |
| 20793 | MASKMOVDQU_MASKMOVDQU64 = 947, |
| 20794 | VMASKMOVDQU_VMASKMOVDQU64 = 948, |
| 20795 | VPMASKMOVDYrm = 949, |
| 20796 | VPMASKMOVDrm = 950, |
| 20797 | VPMASKMOVDYmr = 951, |
| 20798 | VPMASKMOVDmr = 952, |
| 20799 | VPMASKMOVQYmr = 953, |
| 20800 | VPMASKMOVQmr = 954, |
| 20801 | VPBROADCASTBrm_VPBROADCASTWrm = 955, |
| 20802 | VPGATHERDDYrm = 956, |
| 20803 | VPGATHERDDrm = 957, |
| 20804 | VPGATHERDQYrm = 958, |
| 20805 | VPGATHERDQrm = 959, |
| 20806 | VPGATHERQDYrm = 960, |
| 20807 | VPGATHERQDrm = 961, |
| 20808 | VPGATHERQQYrm = 962, |
| 20809 | VPGATHERQQrm = 963, |
| 20810 | VPERM2F128rr = 964, |
| 20811 | VPERM2I128rr = 965, |
| 20812 | VPERM2F128rm = 966, |
| 20813 | VPERM2I128rm = 967, |
| 20814 | VBROADCASTF128rm = 968, |
| 20815 | VEXTRACTF128rr = 969, |
| 20816 | VEXTRACTI128rr = 970, |
| 20817 | VEXTRACTF128mr = 971, |
| 20818 | VEXTRACTI128mr = 972, |
| 20819 | VINSERTF128rr = 973, |
| 20820 | VINSERTI128rr = 974, |
| 20821 | CVTDQ2PDrr_VCVTDQ2PDrr = 975, |
| 20822 | VCVTDQ2PDYrr = 976, |
| 20823 | CVTPD2DQrr_CVTTPD2DQrr_VCVTPD2DQrr_VCVTTPD2DQrr = 977, |
| 20824 | CVTPD2DQrm_CVTTPD2DQrm_VCVTPD2DQrm_VCVTTPD2DQrm = 978, |
| 20825 | VCVTPD2DQYrr_VCVTTPD2DQYrr = 979, |
| 20826 | VCVTPD2DQYrm_VCVTTPD2DQYrm = 980, |
| 20827 | MMX_CVTPI2PDrr = 981, |
| 20828 | MMX_CVTPD2PIrr_MMX_CVTTPD2PIrr = 982, |
| 20829 | CVTSS2SIrr_CVTTSS2SIrr_VCVTSS2SI64rr_VCVTSS2SIrr_VCVTTSS2SI64rr_VCVTTSS2SIrr = 983, |
| 20830 | CVTSS2SIrr_Int_CVTTSS2SIrr_Int_VCVTSS2SI64rr_Int_VCVTSS2SIrr_Int_VCVTTSS2SI64rr_Int_VCVTTSS2SIrr_Int = 984, |
| 20831 | CVTSS2SIrm_CVTSS2SIrm_Int_CVTTSS2SIrm_CVTTSS2SIrm_Int_VCVTSS2SI64rm_VCVTSS2SI64rm_Int_VCVTSS2SIrm_VCVTSS2SIrm_Int_VCVTTSS2SI64rm_VCVTTSS2SI64rm_Int_VCVTTSS2SIrm_VCVTTSS2SIrm_Int = 985, |
| 20832 | CVTSI2SDrr_CVTSI642SDrr = 986, |
| 20833 | CVTSI2SDrr_Int_CVTSI642SDrr_Int_VCVTSI2SDrr_VCVTSI2SDrr_Int_VCVTSI642SDrr_VCVTSI642SDrr_Int = 987, |
| 20834 | CVTSD2SI64rr_CVTSD2SIrr_CVTTSD2SI64rr_CVTTSD2SIrr_VCVTSD2SI64rr_VCVTSD2SIrr_VCVTTSD2SI64rr_VCVTTSD2SIrr = 988, |
| 20835 | CVTSD2SI64rr_Int_CVTSD2SIrr_Int_CVTTSD2SI64rr_Int_CVTTSD2SIrr_Int_VCVTSD2SI64rr_Int_VCVTSD2SIrr_Int = 989, |
| 20836 | VCVTTSD2SI64rr_Int_VCVTTSD2SIrr_Int = 990, |
| 20837 | CVTSD2SI64rm_CVTSD2SI64rm_Int_CVTSD2SIrm_CVTSD2SIrm_Int_CVTTSD2SI64rm_CVTTSD2SI64rm_Int_CVTTSD2SIrm_CVTTSD2SIrm_Int_VCVTSD2SI64rm_VCVTSD2SI64rm_Int_VCVTSD2SIrm_VCVTSD2SIrm_Int_VCVTTSD2SI64rm_VCVTTSD2SIrm = 991, |
| 20838 | VCVTTSD2SI64rm_Int_VCVTTSD2SIrm_Int = 992, |
| 20839 | EXTRQ_EXTRQI = 993, |
| 20840 | INSERTQ_INSERTQI = 994, |
| 20841 | SHA256MSG2rm = 995, |
| 20842 | SHA256MSG2rr = 996, |
| 20843 | SHA1MSG1rr_SHA256MSG1rr = 997, |
| 20844 | SHA1MSG1rm_SHA256MSG1rm = 998, |
| 20845 | SHA1MSG2rr = 999, |
| 20846 | SHA1MSG2rm = 1000, |
| 20847 | SHA1NEXTErr = 1001, |
| 20848 | SHA1NEXTErm = 1002, |
| 20849 | SHA1RNDS4rri = 1003, |
| 20850 | SHA1RNDS4rmi = 1004, |
| 20851 | SHA256RNDS2rr = 1005, |
| 20852 | SHA256RNDS2rm = 1006, |
| 20853 | XCHG16rr_XCHG32rr_XCHG64rr_XCHG8rr_XCHG16ar_XCHG32ar_XCHG64ar = 1007, |
| 20854 | CVTDQ2PSrr_VCVTDQ2PSrr = 1008, |
| 20855 | VCVTDQ2PSYrr = 1009, |
| 20856 | CVTPS2DQrr_CVTTPS2DQrr_VCVTPS2DQrr_VCVTTPS2DQrr = 1010, |
| 20857 | MOV8rm_MOV8rm_NOREX_MOVSX16rm16_MOVSX16rm32_MOVZX16rm16 = 1011, |
| 20858 | MOVBE16rm = 1012, |
| 20859 | MOVBE32mr_MOVBE64mr = 1013, |
| 20860 | ADD8i8_ADD16i16_ADD32i32_ADD64i32_AND8i8_AND16i16_AND32i32_AND64i32_OR8i8_OR16i16_OR32i32_OR64i32_SUB8i8_SUB16i16_SUB32i32_SUB64i32_XOR8i8_XOR16i16_XOR32i32_XOR64i32 = 1014, |
| 20861 | MOVSX16rr16_MOVSX16rr32_MOVZX16rr16 = 1015, |
| 20862 | MOV32ri_MOV32ri_alt_MOV64ri32 = 1016, |
| 20863 | PDEP32rr_PDEP64rr_PEXT32rr_PEXT64rr = 1017, |
| 20864 | ADC8mr_SBB8mr = 1018, |
| 20865 | LEA32r_LEA64r_LEA64_32r = 1019, |
| 20866 | LEA16r = 1020, |
| 20867 | LCMPXCHG8 = 1021, |
| 20868 | LCMPXCHG16B = 1022, |
| 20869 | XCHG8rr_XCHG16rr_XCHG16ar = 1023, |
| 20870 | XCHG8rm_XCHG16rm = 1024, |
| 20871 | POPCNT16rr = 1025, |
| 20872 | LZCNT16rr = 1026, |
| 20873 | TZCNT16rr = 1027, |
| 20874 | RCL8m1_RCL16m1_RCL32m1_RCL64m1_RCR8m1_RCR16m1_RCR32m1_RCR64m1 = 1028, |
| 20875 | RCR8mi_RCR16mi_RCR32mi_RCR64mi = 1029, |
| 20876 | RCL8mi_RCL16mi_RCL32mi_RCL64mi = 1030, |
| 20877 | RCR16rCL_RCR32rCL_RCR64rCL = 1031, |
| 20878 | RCR8mCL_RCR16mCL_RCR32mCL_RCR64mCL = 1032, |
| 20879 | RCL16rCL_RCL32rCL_RCL64rCL = 1033, |
| 20880 | RCL8mCL_RCL16mCL_RCL32mCL_RCL64mCL = 1034, |
| 20881 | MOVHPDmr_MOVHPSmr_VMOVHPDmr_VMOVHPSmr = 1035, |
| 20882 | MMX_MOVQ2FR64rr = 1036, |
| 20883 | MMX_MOVD64rr_MMX_MOVD64to64rr = 1037, |
| 20884 | EXTRQ = 1038, |
| 20885 | INSERTQ = 1039, |
| 20886 | PABSBrr_PABSDrr_PABSWrr_PADDSBrr_PADDSWrr_PADDUSBrr_PADDUSWrr_PAVGBrr_PAVGWrr_PSIGNBrr_PSIGNDrr_PSIGNWrr_VPABSBrr_VPABSDrr_VPABSWrr_VPADDSBrr_VPADDSWrr_VPADDUSBrr_VPADDUSWrr_VPAVGBrr_VPAVGWrr_VPCMPEQQrr_VPSIGNBrr_VPSIGNDrr_VPSIGNWrr_PSUBSBrr_PSUBSWrr_PSUBUSBrr_PSUBUSWrr_VPSUBSBrr_VPSUBSWrr_VPSUBUSBrr_VPSUBUSWrr = 1040, |
| 20887 | MMX_PADDSBrr_MMX_PADDSWrr_MMX_PADDUSBrr_MMX_PADDUSWrr_MMX_PAVGBrr_MMX_PAVGWrr_MMX_PSUBSBrr_MMX_PSUBSWrr_MMX_PSUBUSBrr_MMX_PSUBUSWrr = 1041, |
| 20888 | VPABSBYrr_VPABSDYrr_VPABSWYrr_VPADDSBYrr_VPADDSWYrr_VPADDUSBYrr_VPADDUSWYrr_VPSUBSBYrr_VPSUBSWYrr_VPSUBUSBYrr_VPSUBUSWYrr_VPAVGBYrr_VPAVGWYrr_VPCMPEQQYrr_VPSIGNBYrr_VPSIGNDYrr_VPSIGNWYrr = 1042, |
| 20889 | MMX_CVTPD2PIrm_MMX_CVTTPD2PIrm = 1043, |
| 20890 | SHA1MSG1rr = 1044, |
| 20891 | SHA1MSG1rm = 1045, |
| 20892 | VPERMPSYrm = 1046, |
| 20893 | VPERMPDYri = 1047, |
| 20894 | VPERMQYri = 1048, |
| 20895 | VPERMPDYmi = 1049, |
| 20896 | VPERMQYmi = 1050, |
| 20897 | VPERMDYrm = 1051, |
| 20898 | MOV32rr_MOV32rr_REV_MOV64rr_MOV64rr_REV = 1052, |
| 20899 | MOVSX32rr32 = 1053, |
| 20900 | XOR32rr_REV_XOR64rr_REV_SUB32rr_REV_SUB64rr_REV = 1054, |
| 20901 | CMP8rr_CMP8rr_REV_CMP16rr_CMP16rr_REV_CMP32rr_CMP32rr_REV_CMP64rr_CMP64rr_REV = 1055, |
| 20902 | VXORPSrr_VXORPDrr = 1056, |
| 20903 | VANDNPSrr_VANDNPDrr = 1057, |
| 20904 | VANDNPSYrr_VANDNPDYrr = 1058, |
| 20905 | VPXORrr = 1059, |
| 20906 | VPANDNrr = 1060, |
| 20907 | VPANDNYrr = 1061, |
| 20908 | VPSUBBrr_VPSUBWrr_VPSUBDrr_VPSUBQrr_VPCMPGTBrr_VPCMPGTWrr_VPCMPGTDrr = 1062, |
| 20909 | KADDBrr_KADDDrr_KADDQrr_KADDWrr_KANDBrr_KANDDrr_KANDQrr_KANDWrr_KANDNBrr_KANDNDrr_KANDNQrr_KANDNWrr_KNOTBrr_KNOTDrr_KNOTQrr_KNOTWrr_KORBrr_KORDrr_KORQrr_KORWrr_KORTESTBrr_KORTESTDrr_KORTESTQrr_KORTESTWrr_KTESTBrr_KTESTDrr_KTESTQrr_KTESTWrr_KXNORBrr_KXNORDrr_KXNORQrr_KXNORWrr_KXORBrr_KXORDrr_KXORQrr_KXORWrr = 1063, |
| 20910 | KMOVBkk_KMOVDkk_KMOVQkk_KMOVWkk_KMOVBrk_KMOVDrk_KMOVQrk_KMOVWrk = 1064, |
| 20911 | KUNPCKBWrr_KUNPCKDQrr_KUNPCKWDrr = 1065, |
| 20912 | KMOVBmk_KMOVDmk_KMOVQmk_KMOVWmk = 1066, |
| 20913 | KMOVBkr_KMOVDkr_KMOVQkr_KMOVWkr = 1067, |
| 20914 | VALIGNDZrri_VALIGNQZrri = 1068, |
| 20915 | VALIGNDZ128rri_VALIGNQZ128rri = 1069, |
| 20916 | VALIGNDZ256rri_VALIGNQZ256rri = 1070, |
| 20917 | VPERMPSYrr = 1071, |
| 20918 | VPERMDYrr = 1072, |
| 20919 | VFIXUPIMMPDZ128rrik_VFIXUPIMMPDZ128rrikz_VFIXUPIMMPSZ128rrik_VFIXUPIMMPSZ128rrikz_VFIXUPIMMPDZ128rri_VFIXUPIMMPSZ128rri_VRANGEPDZ128rri_VRANGEPDZ128rrik_VRANGEPDZ128rrikz_VRANGEPSZ128rri_VRANGEPSZ128rrik_VRANGEPSZ128rrikz_VRANGESDZrri_VRANGESDZrrib_VRANGESDZrribk_VRANGESDZrribkz_VRANGESDZrrik_VRANGESDZrrikz_VRANGESSZrri_VRANGESSZrrib_VRANGESSZrribk_VRANGESSZrribkz_VRANGESSZrrik_VRANGESSZrrikz = 1073, |
| 20920 | VFIXUPIMMPDZ256rrik_VFIXUPIMMPDZ256rrikz_VFIXUPIMMPSZ256rrik_VFIXUPIMMPSZ256rrikz_VFIXUPIMMPDZ256rri_VFIXUPIMMPSZ256rri_VRANGEPDZ256rri_VRANGEPDZ256rrik_VRANGEPDZ256rrikz_VRANGEPSZ256rri_VRANGEPSZ256rrik_VRANGEPSZ256rrikz = 1074, |
| 20921 | VFIXUPIMMPDZrrik_VFIXUPIMMPDZrrikz_VFIXUPIMMPSZrrik_VFIXUPIMMPSZrrikz_VRANGEPDZrri_VRANGEPDZrrib_VRANGEPDZrribk_VRANGEPDZrribkz_VRANGEPDZrrik_VRANGEPDZrrikz_VRANGEPSZrri_VRANGEPSZrrib_VRANGEPSZrribk_VRANGEPSZrribkz_VRANGEPSZrrik_VRANGEPSZrrikz = 1075, |
| 20922 | VFIXUPIMMSDZrrik_VFIXUPIMMSDZrrikz_VFIXUPIMMSSZrrik_VFIXUPIMMSSZrrikz = 1076, |
| 20923 | VSCALEFSDZrrb_Int_VSCALEFSDZrrb_Intk_VSCALEFSDZrrb_Intkz_VSCALEFSSZrrb_Int_VSCALEFSSZrrb_Intk_VSCALEFSSZrrb_Intkz = 1077, |
| 20924 | VREDUCEPDZ128rri_VREDUCEPDZ128rrik_VREDUCEPDZ128rrikz_VREDUCEPSZ128rri_VREDUCEPSZ128rrik_VREDUCEPSZ128rrikz_VREDUCESDZrri_VREDUCESDZrrib_VREDUCESDZrribk_VREDUCESDZrribkz_VREDUCESDZrrik_VREDUCESDZrrikz_VREDUCESSZrri_VREDUCESSZrrib_VREDUCESSZrribk_VREDUCESSZrribkz_VREDUCESSZrrik_VREDUCESSZrrikz = 1078, |
| 20925 | VREDUCEPDZrri_VREDUCEPDZrrib_VREDUCEPDZrribk_VREDUCEPDZrribkz_VREDUCEPDZrrik_VREDUCEPDZrrikz_VREDUCEPSZrri_VREDUCEPSZrrib_VREDUCEPSZrribk_VREDUCEPSZrribkz_VREDUCEPSZrrik_VREDUCEPSZrrikz = 1079, |
| 20926 | VDPBF16PSZ128r_VDPBF16PSZ128rk_VDPBF16PSZ128rkz = 1080, |
| 20927 | VDPBF16PSZ256r_VDPBF16PSZ256rk_VDPBF16PSZ256rkz = 1081, |
| 20928 | VDPBF16PSZr_VDPBF16PSZrk_VDPBF16PSZrkz = 1082, |
| 20929 | VPDPBUSDSZ128r_VPDPBUSDSZ128rk_VPDPBUSDSZ128rkz_VPDPBUSDZ128r_VPDPBUSDZ128rk_VPDPBUSDZ128rkz_VPDPWSSDSZ128r_VPDPWSSDSZ128rk_VPDPWSSDSZ128rkz_VPDPWSSDZ128r_VPDPWSSDZ128rk_VPDPWSSDZ128rkz_VPMADD52HUQZ128r_VPMADD52HUQZ128rk_VPMADD52HUQZ128rkz_VPMADD52LUQZ128r_VPMADD52LUQZ128rk_VPMADD52LUQZ128rkz = 1083, |
| 20930 | VPDPBUSDSZ256r_VPDPBUSDSZ256rk_VPDPBUSDSZ256rkz_VPDPBUSDZ256r_VPDPBUSDZ256rk_VPDPBUSDZ256rkz_VPDPWSSDSZ256r_VPDPWSSDSZ256rk_VPDPWSSDSZ256rkz_VPDPWSSDZ256r_VPDPWSSDZ256rk_VPDPWSSDZ256rkz_VPMADD52HUQZ256r_VPMADD52HUQZ256rk_VPMADD52HUQZ256rkz_VPMADD52LUQZ256r_VPMADD52LUQZ256rk_VPMADD52LUQZ256rkz = 1084, |
| 20931 | VPDPBUSDSZr_VPDPBUSDSZrk_VPDPBUSDSZrkz_VPDPBUSDZr_VPDPBUSDZrk_VPDPBUSDZrkz_VPDPWSSDSZr_VPDPWSSDSZrk_VPDPWSSDSZrkz_VPDPWSSDZr_VPDPWSSDZrk_VPDPWSSDZrkz_VPMADD52HUQZr_VPMADD52HUQZrk_VPMADD52HUQZrkz_VPMADD52LUQZr_VPMADD52LUQZrk_VPMADD52LUQZrkz = 1085, |
| 20932 | VPLZCNTDZ128rr_VPLZCNTDZ128rrk_VPLZCNTDZ128rrkz_VPLZCNTQZ128rr_VPLZCNTQZ128rrk_VPLZCNTQZ128rrkz_VPSHLDDZ128rri_VPSHLDDZ128rrik_VPSHLDDZ128rrikz_VPSHLDQZ128rri_VPSHLDQZ128rrik_VPSHLDQZ128rrikz_VPSHLDVDZ128rk_VPSHLDVDZ128rkz_VPSHLDVQZ128rk_VPSHLDVQZ128rkz_VPSHLDVWZ128rk_VPSHLDVWZ128rkz_VPSHLDWZ128rri_VPSHLDWZ128rrik_VPSHLDWZ128rrikz_VPSHRDDZ128rri_VPSHRDDZ128rrik_VPSHRDDZ128rrikz_VPSHRDQZ128rri_VPSHRDQZ128rrik_VPSHRDQZ128rrikz_VPSHRDVDZ128rk_VPSHRDVDZ128rkz_VPSHRDVQZ128rk_VPSHRDVQZ128rkz_VPSHRDVWZ128rk_VPSHRDVWZ128rkz_VPSHRDWZ128rri_VPSHRDWZ128rrik_VPSHRDWZ128rrikz_VPSHUFBITQMBZ128rr_VPSHUFBITQMBZ128rrk = 1086, |
| 20933 | VPLZCNTDZ256rr_VPLZCNTDZ256rrk_VPLZCNTDZ256rrkz_VPLZCNTQZ256rr_VPLZCNTQZ256rrk_VPLZCNTQZ256rrkz_VPSHLDDZ256rri_VPSHLDDZ256rrik_VPSHLDDZ256rrikz_VPSHLDQZ256rri_VPSHLDQZ256rrik_VPSHLDQZ256rrikz_VPSHLDVDZ256rk_VPSHLDVDZ256rkz_VPSHLDVQZ256rk_VPSHLDVQZ256rkz_VPSHLDVWZ256rk_VPSHLDVWZ256rkz_VPSHLDWZ256rri_VPSHLDWZ256rrik_VPSHLDWZ256rrikz_VPSHRDDZ256rri_VPSHRDDZ256rrik_VPSHRDDZ256rrikz_VPSHRDQZ256rri_VPSHRDQZ256rrik_VPSHRDQZ256rrikz_VPSHRDVDZ256rk_VPSHRDVDZ256rkz_VPSHRDVQZ256rk_VPSHRDVQZ256rkz_VPSHRDVWZ256rk_VPSHRDVWZ256rkz_VPSHRDWZ256rri_VPSHRDWZ256rrik_VPSHRDWZ256rrikz = 1087, |
| 20934 | VPLZCNTDZrr_VPLZCNTDZrrk_VPLZCNTDZrrkz_VPLZCNTQZrr_VPLZCNTQZrrk_VPLZCNTQZrrkz_VPSHLDDZrri_VPSHLDDZrrik_VPSHLDDZrrikz_VPSHLDQZrri_VPSHLDQZrrik_VPSHLDQZrrikz_VPSHLDVDZrk_VPSHLDVDZrkz_VPSHLDVQZrk_VPSHLDVQZrkz_VPSHLDVWZrk_VPSHLDVWZrkz_VPSHLDWZrri_VPSHLDWZrrik_VPSHLDWZrrikz_VPSHRDDZrri_VPSHRDDZrrik_VPSHRDDZrrikz_VPSHRDQZrri_VPSHRDQZrrik_VPSHRDQZrrikz_VPSHRDVDZrk_VPSHRDVDZrkz_VPSHRDVQZrk_VPSHRDVQZrkz_VPSHRDVWZrk_VPSHRDVWZrkz_VPSHRDWZrri_VPSHRDWZrrik_VPSHRDWZrrikz = 1088, |
| 20935 | PSLLDrr_PSLLQrr_PSLLWrr_PSRADrr_PSRAWrr_PSRLDrr_PSRLQrr_PSRLWrr_VPSLLDZ128rr_VPSLLDZ128rrk_VPSLLDZ128rrkz_VPSLLDrr_VPSLLQZ128rr_VPSLLQZ128rrk_VPSLLQZ128rrkz_VPSLLQrr_VPSLLWZ128rr_VPSLLWZ128rrk_VPSLLWZ128rrkz_VPSLLWrr_VPSRADZ128rr_VPSRADZ128rrk_VPSRADZ128rrkz_VPSRADrr_VPSRAQZ128rr_VPSRAQZ128rrk_VPSRAQZ128rrkz_VPSRAWZ128rr_VPSRAWZ128rrk_VPSRAWZ128rrkz_VPSRAWrr_VPSRLDZ128rr_VPSRLDZ128rrk_VPSRLDZ128rrkz_VPSRLDrr_VPSRLQZ128rr_VPSRLQZ128rrk_VPSRLQZ128rrkz_VPSRLQrr_VPSRLWZ128rr_VPSRLWZ128rrk_VPSRLWZ128rrkz_VPSRLWrr = 1089, |
| 20936 | VPSLLDYrr_VPSLLDZ256rr_VPSLLDZ256rrk_VPSLLDZ256rrkz_VPSLLQYrr_VPSLLQZ256rr_VPSLLQZ256rrk_VPSLLQZ256rrkz_VPSLLWYrr_VPSLLWZ256rr_VPSLLWZ256rrk_VPSLLWZ256rrkz_VPSRADYrr_VPSRADZ256rr_VPSRADZ256rrk_VPSRADZ256rrkz_VPSRAQZ256rr_VPSRAQZ256rrk_VPSRAQZ256rrkz_VPSRAWYrr_VPSRAWZ256rr_VPSRAWZ256rrk_VPSRAWZ256rrkz_VPSRLDYrr_VPSRLDZ256rr_VPSRLDZ256rrk_VPSRLDZ256rrkz_VPSRLQYrr_VPSRLQZ256rr_VPSRLQZ256rrk_VPSRLQZ256rrkz_VPSRLWYrr_VPSRLWZ256rr_VPSRLWZ256rrk_VPSRLWZ256rrkz = 1090, |
| 20937 | VPSLLDZrr_VPSLLDZrrk_VPSLLDZrrkz_VPSLLQZrr_VPSLLQZrrk_VPSLLQZrrkz_VPSLLWZrr_VPSLLWZrrk_VPSLLWZrrkz_VPSRADZrr_VPSRADZrrk_VPSRADZrrkz_VPSRAQZrr_VPSRAQZrrk_VPSRAQZrrkz_VPSRAWZrr_VPSRAWZrrk_VPSRAWZrrkz_VPSRLDZrr_VPSRLDZrrk_VPSRLDZrrkz_VPSRLQZrr_VPSRLQZrrk_VPSRLQZrrkz_VPSRLWZrr_VPSRLWZrrk_VPSRLWZrrkz = 1091, |
| 20938 | VPSLLDQYri_VPSRLDQYri_VPSLLDQZ256ri_VPSRLDQZ256ri = 1092, |
| 20939 | PSLLDQri_PSRLDQri_VPSLLDQri_VPSRLDQri = 1093, |
| 20940 | VPSLLDQZri_VPSRLDQZri = 1094, |
| 20941 | VPSHUFBYrr_VPSHUFBZ256rr_VPSHUFBZ256rrk_VPSHUFBZ256rrkz = 1095, |
| 20942 | VPSHUFBZ128rr_VPSHUFBZ128rrk_VPSHUFBZ128rrkz = 1096, |
| 20943 | VPSHUFBZrr_VPSHUFBZrrk_VPSHUFBZrrkz = 1097, |
| 20944 | VPROLVDZ128rr_VPROLVDZ128rrk_VPROLVDZ128rrkz_VPROLVQZ128rr_VPROLVQZ128rrk_VPROLVQZ128rrkz_VPRORVDZ128rr_VPRORVDZ128rrk_VPRORVDZ128rrkz_VPRORVQZ128rr_VPRORVQZ128rrk_VPRORVQZ128rrkz = 1098, |
| 20945 | VPROLVDZ256rr_VPROLVDZ256rrk_VPROLVDZ256rrkz_VPROLVQZ256rr_VPROLVQZ256rrk_VPROLVQZ256rrkz_VPRORVDZ256rr_VPRORVDZ256rrk_VPRORVDZ256rrkz_VPRORVQZ256rr_VPRORVQZ256rrk_VPRORVQZ256rrkz = 1099, |
| 20946 | VPROLVDZrr_VPROLVDZrrk_VPROLVDZrrkz_VPROLVQZrr_VPROLVQZrrk_VPROLVQZrrkz_VPRORVDZrr_VPRORVDZrrk_VPRORVDZrrkz_VPRORVQZrr_VPRORVQZrrk_VPRORVQZrrkz = 1100, |
| 20947 | VPROLDZ256ri_VPROLDZ256rik_VPROLDZ256rikz_VPROLQZ256ri_VPROLQZ256rik_VPROLQZ256rikz_VPRORDZ256ri_VPRORDZ256rik_VPRORDZ256rikz_VPRORQZ256ri_VPRORQZ256rik_VPRORQZ256rikz = 1101, |
| 20948 | VPROLDZ128ri_VPROLDZ128rik_VPROLDZ128rikz_VPROLQZ128ri_VPROLQZ128rik_VPROLQZ128rikz_VPRORDZ128ri_VPRORDZ128rik_VPRORDZ128rikz_VPRORQZ128ri_VPRORQZ128rik_VPRORQZ128rikz = 1102, |
| 20949 | VPROLDZri_VPROLDZrik_VPROLDZrikz_VPROLQZri_VPROLQZrik_VPROLQZrikz_VPRORDZri_VPRORDZrik_VPRORDZrikz_VPRORQZri_VPRORQZrik_VPRORQZrikz = 1103, |
| 20950 | VFMSUB231SSZr_Intkz = 1104, |
| 20951 | VPSLLDZ128ri_VPSLLDZ128rik_VPSLLDZ128rikz_VPSLLQZ128ri_VPSLLQZ128rik_VPSLLQZ128rikz_VPSLLWZ128ri_VPSLLWZ128rik_VPSLLWZ128rikz_VPSRADZ128ri_VPSRADZ128rik_VPSRADZ128rikz_VPSRAQZ128ri_VPSRAQZ128rik_VPSRAQZ128rikz_VPSRAWZ128ri_VPSRAWZ128rik_VPSRAWZ128rikz_VPSRLDZ128ri_VPSRLDZ128rik_VPSRLDZ128rikz_VPSRLQZ128ri_VPSRLQZ128rik_VPSRLQZ128rikz_VPSRLWZ128ri_VPSRLWZ128rik_VPSRLWZ128rikz = 1105, |
| 20952 | VPSLLDZ256ri_VPSLLDZ256rik_VPSLLDZ256rikz_VPSLLQZ256ri_VPSLLQZ256rik_VPSLLQZ256rikz_VPSLLWZ256ri_VPSLLWZ256rik_VPSLLWZ256rikz_VPSRADZ256ri_VPSRADZ256rik_VPSRADZ256rikz_VPSRAQZ256ri_VPSRAQZ256rik_VPSRAQZ256rikz_VPSRAWZ256ri_VPSRAWZ256rik_VPSRAWZ256rikz_VPSRLDZ256ri_VPSRLDZ256rik_VPSRLDZ256rikz_VPSRLQZ256ri_VPSRLQZ256rik_VPSRLQZ256rikz_VPSRLWZ256ri_VPSRLWZ256rik_VPSRLWZ256rikz = 1106, |
| 20953 | VPSLLDZri_VPSLLDZrik_VPSLLDZrikz_VPSLLQZri_VPSLLQZrik_VPSLLQZrikz_VPSLLWZri_VPSLLWZrik_VPSLLWZrikz_VPSRADZri_VPSRADZrik_VPSRADZrikz_VPSRAQZri_VPSRAQZrik_VPSRAQZrikz_VPSRAWZri_VPSRAWZrik_VPSRAWZrikz_VPSRLDZri_VPSRLDZrik_VPSRLDZrikz_VPSRLQZri_VPSRLQZrik_VPSRLQZrikz_VPSRLWZri_VPSRLWZrik_VPSRLWZrikz = 1107, |
| 20954 | PALIGNRrri_VPALIGNRZ128rri_VPALIGNRZ128rrik_VPALIGNRZ128rrikz_VPALIGNRrri = 1108, |
| 20955 | VPALIGNRZ256rri_VPALIGNRZ256rrik_VPALIGNRZ256rrikz = 1109, |
| 20956 | VPALIGNRZrri_VPALIGNRZrrik_VPALIGNRZrrikz = 1110, |
| 20957 | PACKSSDWrr_PACKSSWBrr_PACKUSDWrr_PACKUSWBrr_VPACKSSDWZ128rr_VPACKSSDWZ128rrk_VPACKSSDWZ128rrkz_VPACKSSDWrr_VPACKSSWBZ128rr_VPACKSSWBZ128rrk_VPACKSSWBZ128rrkz_VPACKSSWBrr_VPACKUSDWZ128rr_VPACKUSDWZ128rrk_VPACKUSDWZ128rrkz_VPACKUSDWrr_VPACKUSWBZ128rr_VPACKUSWBZ128rrk_VPACKUSWBZ128rrkz_VPACKUSWBrr = 1111, |
| 20958 | VPACKSSDWZ256rr_VPACKSSDWZ256rrk_VPACKSSDWZ256rrkz_VPACKSSWBZ256rr_VPACKSSWBZ256rrk_VPACKSSWBZ256rrkz_VPACKUSDWZ256rr_VPACKUSDWZ256rrk_VPACKUSDWZ256rrkz_VPACKUSWBZ256rr_VPACKUSWBZ256rrk_VPACKUSWBZ256rrkz = 1112, |
| 20959 | VPACKSSDWZrr_VPACKSSDWZrrk_VPACKSSDWZrrkz_VPACKSSWBZrr_VPACKSSWBZrrk_VPACKSSWBZrrkz_VPACKUSDWZrr_VPACKUSDWZrrk_VPACKUSDWZrrkz_VPACKUSWBZrr_VPACKUSWBZrrk_VPACKUSWBZrrkz = 1113, |
| 20960 | CMPPDrri_VCMPPDrri_VMAXCPDZ128rr_VMAXCPDZ128rrk_VMAXCPDZ128rrkz_VMAXPDZ128rr_VMAXPDZ128rrk_VMAXPDZ128rrkz_VMINCPDZ128rr_VMINCPDZ128rrk_VMINCPDZ128rrkz_VMINPDZ128rr_VMINPDZ128rrk_VMINPDZ128rrkz = 1114, |
| 20961 | CMPPSrri_VCMPPSrri = 1115, |
| 20962 | CMPSDrri_CMPSDrri_Int_VCMPSDrri_VCMPSDrri_Int_MAXSDrr_Int_MINSDrr_Int_VMAXSDZrr_Int_VMAXSDZrr_Intk_VMAXSDZrr_Intkz_VMAXSDrr_Int_VMINSDZrr_Int_VMINSDZrr_Intk_VMINSDZrr_Intkz_VMINSDrr_Int = 1116, |
| 20963 | CMPSSrri_CMPSSrri_Int_VCMPSSrri_VCMPSSrri_Int_MAXSSrr_Int_MINSSrr_Int_VMAXSSZrr_Int_VMAXSSZrr_Intk_VMAXSSZrr_Intkz_VMAXSSrr_Int_VMINSSZrr_Int_VMINSSZrr_Intk_VMINSSZrr_Intkz_VMINSSrr_Int = 1117, |
| 20964 | VPMAXSQZ128rr_VPMAXSQZ128rrk_VPMAXSQZ128rrkz_VPMAXUQZ128rr_VPMAXUQZ128rrk_VPMAXUQZ128rrkz_VPMINSQZ128rr_VPMINSQZ128rrk_VPMINSQZ128rrkz_VPMINUQZ128rr_VPMINUQZ128rrk_VPMINUQZ128rrkz = 1118, |
| 20965 | VPMAXSQZ256rr_VPMAXSQZ256rrk_VPMAXSQZ256rrkz_VPMAXUQZ256rr_VPMAXUQZ256rrk_VPMAXUQZ256rrkz_VPMINSQZ256rr_VPMINSQZ256rrk_VPMINSQZ256rrkz_VPMINUQZ256rr_VPMINUQZ256rrk_VPMINUQZ256rrkz = 1119, |
| 20966 | VPMAXSQZrr_VPMAXSQZrrk_VPMAXSQZrrkz_VPMAXUQZrr_VPMAXUQZrrk_VPMAXUQZrrkz_VPMINSQZrr_VPMINSQZrrk_VPMINSQZrrkz_VPMINUQZrr_VPMINUQZrrk_VPMINUQZrrkz = 1120, |
| 20967 | VMAXCPDZ256rr_VMAXCPDZ256rrk_VMAXCPDZ256rrkz_VMAXPDZ256rr_VMAXPDZ256rrk_VMAXPDZ256rrkz_VMINCPDZ256rr_VMINCPDZ256rrk_VMINCPDZ256rrkz_VMINPDZ256rr_VMINPDZ256rrk_VMINPDZ256rrkz = 1121, |
| 20968 | VMAXCPDZrr_VMAXCPDZrrk_VMAXCPDZrrkz_VMAXPDZrr_VMAXPDZrrb_VMAXPDZrrbk_VMAXPDZrrbkz_VMAXPDZrrk_VMAXPDZrrkz_VMINCPDZrr_VMINCPDZrrk_VMINCPDZrrkz_VMINPDZrr_VMINPDZrrb_VMINPDZrrbk_VMINPDZrrbkz_VMINPDZrrk_VMINPDZrrkz = 1122, |
| 20969 | VMOVDDUPZ128rr_VMOVDDUPZ128rrk_VMOVDDUPZ128rrkz = 1123, |
| 20970 | VMOVDDUPZ256rr_VMOVDDUPZ256rrk_VMOVDDUPZ256rrkz = 1124, |
| 20971 | VMOVDDUPZrr_VMOVDDUPZrrk_VMOVDDUPZrrkz = 1125, |
| 20972 | VPMOVSXBDZ128rr_VPMOVSXBDZ128rrk_VPMOVSXBDZ128rrkz_VPMOVSXBQZ128rr_VPMOVSXBQZ128rrk_VPMOVSXBQZ128rrkz_VPMOVSXBWZ128rr_VPMOVSXBWZ128rrk_VPMOVSXBWZ128rrkz_VPMOVSXDQZ128rr_VPMOVSXDQZ128rrk_VPMOVSXDQZ128rrkz_VPMOVSXWDZ128rr_VPMOVSXWDZ128rrk_VPMOVSXWDZ128rrkz_VPMOVSXWQZ128rr_VPMOVSXWQZ128rrk_VPMOVSXWQZ128rrkz_VPMOVZXBDZ128rr_VPMOVZXBDZ128rrk_VPMOVZXBDZ128rrkz_VPMOVZXBQZ128rr_VPMOVZXBQZ128rrk_VPMOVZXBQZ128rrkz_VPMOVZXBWZ128rr_VPMOVZXBWZ128rrk_VPMOVZXBWZ128rrkz_VPMOVZXDQZ128rr_VPMOVZXDQZ128rrk_VPMOVZXDQZ128rrkz_VPMOVZXWDZ128rr_VPMOVZXWDZ128rrk_VPMOVZXWDZ128rrkz_VPMOVZXWQZ128rr_VPMOVZXWQZ128rrk_VPMOVZXWQZ128rrkz = 1126, |
| 20973 | VPMOVSXBDZ256rr_VPMOVSXBDZ256rrk_VPMOVSXBDZ256rrkz_VPMOVSXBQZ256rr_VPMOVSXBQZ256rrk_VPMOVSXBQZ256rrkz_VPMOVSXBWZ256rr_VPMOVSXBWZ256rrk_VPMOVSXBWZ256rrkz_VPMOVSXDQZ256rr_VPMOVSXDQZ256rrk_VPMOVSXDQZ256rrkz_VPMOVSXWDZ256rr_VPMOVSXWDZ256rrk_VPMOVSXWDZ256rrkz_VPMOVSXWQZ256rr_VPMOVSXWQZ256rrk_VPMOVSXWQZ256rrkz_VPMOVZXBDZ256rr_VPMOVZXBDZ256rrk_VPMOVZXBDZ256rrkz_VPMOVZXBQZ256rr_VPMOVZXBQZ256rrk_VPMOVZXBQZ256rrkz_VPMOVZXBWZ256rr_VPMOVZXBWZ256rrk_VPMOVZXBWZ256rrkz_VPMOVZXDQZ256rr_VPMOVZXDQZ256rrk_VPMOVZXDQZ256rrkz_VPMOVZXWDZ256rr_VPMOVZXWDZ256rrk_VPMOVZXWDZ256rrkz_VPMOVZXWQZ256rr_VPMOVZXWQZ256rrk_VPMOVZXWQZ256rrkz_VPMOVSXBDYrr_VPMOVSXBQYrr_VPMOVSXBWYrr_VPMOVZXBDYrr_VPMOVZXBQYrr_VPMOVZXBWYrr_VPMOVSXDQYrr_VPMOVSXWDYrr_VPMOVSXWQYrr_VPMOVUSQWZ128rr_VPMOVUSQWZ128rrk_VPMOVUSQWZ128rrkz_VPMOVZXDQYrr_VPMOVZXWDYrr_VPMOVZXWQYrr_VPMOVDBZ128rr_VPMOVDBZ128rrk_VPMOVDBZ128rrkz_VPMOVDBZ256rr_VPMOVDBZ256rrk_VPMOVDBZ256rrkz_VPMOVDWZ128rr_VPMOVDWZ128rrk_VPMOVDWZ128rrkz_VPMOVDWZ256rr_VPMOVDWZ256rrk_VPMOVDWZ256rrkz_VPMOVQBZ128rr_VPMOVQBZ128rrk_VPMOVQBZ128rrkz_VPMOVQBZ256rr_VPMOVQBZ256rrk_VPMOVQBZ256rrkz_VPMOVQDZ128rr_VPMOVQDZ128rrk_VPMOVQDZ128rrkz_VPMOVQDZ256rr_VPMOVQDZ256rrk_VPMOVQDZ256rrkz_VPMOVQWZ128rr_VPMOVQWZ128rrk_VPMOVQWZ128rrkz_VPMOVQWZ256rr_VPMOVQWZ256rrk_VPMOVQWZ256rrkz_VPMOVSDBZ128rr_VPMOVSDBZ128rrk_VPMOVSDBZ128rrkz_VPMOVSDBZ256rr_VPMOVSDBZ256rrk_VPMOVSDBZ256rrkz_VPMOVSDWZ128rr_VPMOVSDWZ128rrk_VPMOVSDWZ128rrkz_VPMOVSDWZ256rr_VPMOVSDWZ256rrk_VPMOVSDWZ256rrkz_VPMOVSQBZ128rr_VPMOVSQBZ128rrk_VPMOVSQBZ128rrkz_VPMOVSQBZ256rr_VPMOVSQBZ256rrk_VPMOVSQBZ256rrkz_VPMOVSQDZ128rr_VPMOVSQDZ128rrk_VPMOVSQDZ128rrkz_VPMOVSQDZ256rr_VPMOVSQDZ256rrk_VPMOVSQDZ256rrkz_VPMOVSQWZ128rr_VPMOVSQWZ128rrk_VPMOVSQWZ128rrkz_VPMOVSQWZ256rr_VPMOVSQWZ256rrk_VPMOVSQWZ256rrkz_VPMOVSWBZ128rr_VPMOVSWBZ128rrk_VPMOVSWBZ128rrkz_VPMOVSWBZ256rr_VPMOVSWBZ256rrk_VPMOVSWBZ256rrkz_VPMOVUSDBZ128rr_VPMOVUSDBZ128rrk_VPMOVUSDBZ128rrkz_VPMOVUSDBZ256rr_VPMOVUSDBZ256rrk_VPMOVUSDBZ256rrkz_VPMOVUSDWZ128rr_VPMOVUSDWZ128rrk_VPMOVUSDWZ128rrkz_VPMOVUSDWZ256rr_VPMOVUSDWZ256rrk_VPMOVUSDWZ256rrkz_VPMOVUSQBZ128rr_VPMOVUSQBZ128rrk_VPMOVUSQBZ128rrkz_VPMOVUSQBZ256rr_VPMOVUSQBZ256rrk_VPMOVUSQBZ256rrkz_VPMOVUSQDZ128rr_VPMOVUSQDZ128rrk_VPMOVUSQDZ128rrkz_VPMOVUSQDZ256rr_VPMOVUSQDZ256rrk_VPMOVUSQDZ256rrkz_VPMOVUSWBZ128rr_VPMOVUSWBZ128rrk_VPMOVUSWBZ128rrkz_VPMOVUSWBZ256rr_VPMOVUSWBZ256rrk_VPMOVUSWBZ256rrkz_VPMOVWBZ128rr_VPMOVWBZ128rrk_VPMOVWBZ128rrkz_VPMOVWBZ256rr_VPMOVWBZ256rrk_VPMOVWBZ256rrkz = 1127, |
| 20974 | PMOVSXBDrr_PMOVSXBQrr_PMOVSXBWrr_PMOVSXDQrr_PMOVSXWDrr_PMOVSXWQrr_PMOVZXBDrr_PMOVZXBQrr_PMOVZXBWrr_PMOVZXDQrr_PMOVZXWDrr_PMOVZXWQrr_VPMOVSXBDrr_VPMOVSXBQrr_VPMOVSXBWrr_VPMOVSXDQrr_VPMOVSXWDrr_VPMOVSXWQrr_VPMOVZXBDrr_VPMOVZXBQrr_VPMOVZXBWrr_VPMOVZXDQrr_VPMOVZXWDrr_VPMOVZXWQrr = 1128, |
| 20975 | VPMOVSXBDZrr_VPMOVSXBDZrrk_VPMOVSXBDZrrkz_VPMOVSXBQZrr_VPMOVSXBQZrrk_VPMOVSXBQZrrkz_VPMOVSXBWZrr_VPMOVSXBWZrrk_VPMOVSXBWZrrkz_VPMOVSXDQZrr_VPMOVSXDQZrrk_VPMOVSXDQZrrkz_VPMOVSXWDZrr_VPMOVSXWDZrrk_VPMOVSXWDZrrkz_VPMOVSXWQZrr_VPMOVSXWQZrrk_VPMOVSXWQZrrkz_VPMOVZXBDZrr_VPMOVZXBDZrrk_VPMOVZXBDZrrkz_VPMOVZXBQZrr_VPMOVZXBQZrrk_VPMOVZXBQZrrkz_VPMOVZXBWZrr_VPMOVZXBWZrrk_VPMOVZXBWZrrkz_VPMOVZXDQZrr_VPMOVZXDQZrrk_VPMOVZXDQZrrkz_VPMOVZXWDZrr_VPMOVZXWDZrrk_VPMOVZXWDZrrkz_VPMOVZXWQZrr_VPMOVZXWQZrrk_VPMOVZXWQZrrkz = 1129, |
| 20976 | VPMOVDBZrr_VPMOVDBZrrk_VPMOVDBZrrkz_VPMOVQBZrr_VPMOVQBZrrk_VPMOVQBZrrkz_VPMOVQWZrr_VPMOVQWZrrk_VPMOVQWZrrkz_VPMOVSDBZrr_VPMOVSDBZrrk_VPMOVSDBZrrkz_VPMOVSQBZrr_VPMOVSQBZrrk_VPMOVSQBZrrkz_VPMOVSQWZrr_VPMOVSQWZrrk_VPMOVSQWZrrkz_VPMOVUSDBZrr_VPMOVUSDBZrrk_VPMOVUSDBZrrkz_VPMOVUSQBZrr_VPMOVUSQBZrrk_VPMOVUSQBZrrkz_VPMOVUSQWZrr_VPMOVUSQWZrrk_VPMOVUSQWZrrkz = 1130, |
| 20977 | VPTESTMBZ128rrk_VPTESTMDZ128rrk_VPTESTMQZ128rrk_VPTESTMWZ128rrk_VPTESTNMBZ128rrk_VPTESTNMDZ128rrk_VPTESTNMQZ128rrk_VPTESTNMWZ128rrk = 1131, |
| 20978 | VPTESTMBZ256rr_VPTESTMBZ256rrk_VPTESTMDZ256rr_VPTESTMDZ256rrk_VPTESTMQZ256rr_VPTESTMQZ256rrk_VPTESTMWZ256rr_VPTESTMWZ256rrk_VPTESTNMBZ256rr_VPTESTNMBZ256rrk_VPTESTNMDZ256rr_VPTESTNMDZ256rrk_VPTESTNMQZ256rr_VPTESTNMQZ256rrk_VPTESTNMWZ256rr_VPTESTNMWZ256rrk = 1132, |
| 20979 | VPTESTMBZrrk_VPTESTMDZrrk_VPTESTMQZrrk_VPTESTMWZrrk_VPTESTNMBZrrk_VPTESTNMDZrrk_VPTESTNMQZrrk_VPTESTNMWZrrk = 1133, |
| 20980 | VPCONFLICTDZ128rr_VPCONFLICTDZ128rrk_VPCONFLICTDZ128rrkz_VPCONFLICTQZ128rr_VPCONFLICTQZ128rrk_VPCONFLICTQZ128rrkz = 1134, |
| 20981 | VPCONFLICTDZ256rr_VPCONFLICTDZ256rrk_VPCONFLICTDZ256rrkz_VPCONFLICTQZ256rr_VPCONFLICTQZ256rrk_VPCONFLICTQZ256rrkz = 1135, |
| 20982 | VPCONFLICTDZrr_VPCONFLICTDZrrk_VPCONFLICTDZrrkz_VPCONFLICTQZrr_VPCONFLICTQZrrk_VPCONFLICTQZrrkz = 1136, |
| 20983 | VRSQRT14PDZ128r_VRSQRT14PDZ128rk_VRSQRT14PDZ128rkz_VRSQRT14PSZ128r_VRSQRT14PSZ128rk_VRSQRT14PSZ128rkz = 1137, |
| 20984 | VRSQRT14PDZ256r_VRSQRT14PDZ256rk_VRSQRT14PDZ256rkz_VRSQRT14PSZ256r_VRSQRT14PSZ256rk_VRSQRT14PSZ256rkz = 1138, |
| 20985 | VRSQRT14PDZr_VRSQRT14PDZrk_VRSQRT14PDZrkz_VRSQRT14PSZr_VRSQRT14PSZrk_VRSQRT14PSZrkz = 1139, |
| 20986 | VPERMILPDYrr_VPERMILPDZ256rr_VPERMILPDZ256rrk_VPERMILPDZ256rrkz_VPERMILPSYrr_VPERMILPSZ256rr_VPERMILPSZ256rrk_VPERMILPSZ256rrkz = 1140, |
| 20987 | VPERMILPDZ128rr_VPERMILPDZ128rrk_VPERMILPDZ128rrkz_VPERMILPSZ128rr_VPERMILPSZ128rrk_VPERMILPSZ128rrkz = 1141, |
| 20988 | VPERMILPDZrr_VPERMILPDZrrk_VPERMILPDZrrkz_VPERMILPSZrr_VPERMILPSZrrk_VPERMILPSZrrkz = 1142, |
| 20989 | VPERMI2PDZ128rr_VPERMI2PDZ128rrk_VPERMI2PDZ128rrkz_VPERMI2PSZ128rr_VPERMI2PSZ128rrk_VPERMI2PSZ128rrkz_VPERMT2PDZ128rr_VPERMT2PDZ128rrk_VPERMT2PDZ128rrkz_VPERMT2PSZ128rr_VPERMT2PSZ128rrk_VPERMT2PSZ128rrkz = 1143, |
| 20990 | VPERMI2WZ128rr_VPERMI2WZ128rrk_VPERMI2WZ128rrkz_VPERMT2WZ128rr_VPERMT2WZ128rrk_VPERMT2WZ128rrkz_VPERMI2BZ128rr_VPERMI2BZ128rrk_VPERMI2BZ128rrkz_VPERMI2DZ128rr_VPERMI2DZ128rrk_VPERMI2DZ128rrkz_VPERMI2QZ128rr_VPERMI2QZ128rrk_VPERMI2QZ128rrkz_VPERMT2BZ128rr_VPERMT2BZ128rrk_VPERMT2BZ128rrkz_VPERMT2DZ128rr_VPERMT2DZ128rrk_VPERMT2DZ128rrkz_VPERMT2QZ128rr_VPERMT2QZ128rrk_VPERMT2QZ128rrkz = 1144, |
| 20991 | VCOMPRESSPDZ128rr_VCOMPRESSPDZ128rrk_VCOMPRESSPDZ128rrkz_VCOMPRESSPSZ128rr_VCOMPRESSPSZ128rrk_VCOMPRESSPSZ128rrkz_VPCOMPRESSBZ128rr_VPCOMPRESSBZ128rrk_VPCOMPRESSBZ128rrkz_VPCOMPRESSDZ128rr_VPCOMPRESSDZ128rrk_VPCOMPRESSDZ128rrkz_VPCOMPRESSQZ128rr_VPCOMPRESSQZ128rrk_VPCOMPRESSQZ128rrkz_VPCOMPRESSWZ128rr_VPCOMPRESSWZ128rrk_VPCOMPRESSWZ128rrkz_VPERMBZ128rr_VPERMBZ128rrk_VPERMBZ128rrkz_VPERMWZ128rr_VPERMWZ128rrk_VPERMWZ128rrkz = 1145, |
| 20992 | VPERMI2PDZ256rr_VPERMI2PDZ256rrk_VPERMI2PDZ256rrkz_VPERMI2PSZ256rr_VPERMI2PSZ256rrk_VPERMI2PSZ256rrkz_VPERMT2PDZ256rr_VPERMT2PDZ256rrk_VPERMT2PDZ256rrkz_VPERMT2PSZ256rr_VPERMT2PSZ256rrk_VPERMT2PSZ256rrkz_VPERMPDZ256rr_VPERMPDZ256rrk_VPERMPDZ256rrkz_VPERMPSZ256rr_VPERMPSZ256rrk_VPERMPSZ256rrkz = 1146, |
| 20993 | VPERMI2WZ256rr_VPERMI2WZ256rrk_VPERMI2WZ256rrkz_VPERMT2WZ256rr_VPERMT2WZ256rrk_VPERMT2WZ256rrkz_VCOMPRESSPDZ256rr_VCOMPRESSPDZ256rrk_VCOMPRESSPDZ256rrkz_VCOMPRESSPSZ256rr_VCOMPRESSPSZ256rrk_VCOMPRESSPSZ256rrkz_VPCOMPRESSBZ256rr_VPCOMPRESSBZ256rrk_VPCOMPRESSBZ256rrkz_VPCOMPRESSDZ256rr_VPCOMPRESSDZ256rrk_VPCOMPRESSDZ256rrkz_VPCOMPRESSQZ256rr_VPCOMPRESSQZ256rrk_VPCOMPRESSQZ256rrkz_VPCOMPRESSWZ256rr_VPCOMPRESSWZ256rrk_VPCOMPRESSWZ256rrkz_VPERMBZ256rr_VPERMBZ256rrk_VPERMBZ256rrkz_VPERMDZ256rr_VPERMDZ256rrk_VPERMDZ256rrkz_VPERMQZ256rr_VPERMQZ256rrk_VPERMQZ256rrkz_VPERMWZ256rr_VPERMWZ256rrk_VPERMWZ256rrkz_VPERMI2BZ256rr_VPERMI2BZ256rrk_VPERMI2BZ256rrkz_VPERMI2DZ256rr_VPERMI2DZ256rrk_VPERMI2DZ256rrkz_VPERMI2QZ256rr_VPERMI2QZ256rrk_VPERMI2QZ256rrkz_VPERMT2BZ256rr_VPERMT2BZ256rrk_VPERMT2BZ256rrkz_VPERMT2DZ256rr_VPERMT2DZ256rrk_VPERMT2DZ256rrkz_VPERMT2QZ256rr_VPERMT2QZ256rrk_VPERMT2QZ256rrkz_VPEXPANDBZ256rr_VPEXPANDBZ256rrk_VPEXPANDBZ256rrkz_VPEXPANDWZ256rr_VPEXPANDWZ256rrk_VPEXPANDWZ256rrkz = 1147, |
| 20994 | VPERMI2PDZrr_VPERMI2PDZrrk_VPERMI2PDZrrkz_VPERMI2PSZrr_VPERMI2PSZrrk_VPERMI2PSZrrkz_VPERMT2PDZrr_VPERMT2PDZrrk_VPERMT2PDZrrkz_VPERMT2PSZrr_VPERMT2PSZrrk_VPERMT2PSZrrkz_VPERMPDZrr_VPERMPDZrrk_VPERMPDZrrkz_VPERMPSZrr_VPERMPSZrrk_VPERMPSZrrkz = 1148, |
| 20995 | VPERMI2WZrr_VPERMI2WZrrk_VPERMI2WZrrkz_VPERMT2WZrr_VPERMT2WZrrk_VPERMT2WZrrkz_VPERMBZrr_VPERMBZrrk_VPERMBZrrkz_VPERMDZrr_VPERMDZrrk_VPERMDZrrkz_VPERMWZrr_VPERMWZrrk_VPERMWZrrkz_VPERMI2BZrr_VPERMI2BZrrk_VPERMI2BZrrkz_VPERMI2DZrr_VPERMI2DZrrk_VPERMI2DZrrkz_VPERMI2QZrr_VPERMI2QZrrk_VPERMI2QZrrkz_VPERMT2BZrr_VPERMT2BZrrk_VPERMT2BZrrkz_VPERMT2DZrr_VPERMT2DZrrk_VPERMT2DZrrkz_VPERMT2QZrr_VPERMT2QZrrk_VPERMT2QZrrkz_VCOMPRESSPDZrr_VCOMPRESSPDZrrk_VCOMPRESSPDZrrkz_VCOMPRESSPSZrr_VCOMPRESSPSZrrk_VCOMPRESSPSZrrkz_VPCOMPRESSBZrr_VPCOMPRESSBZrrk_VPCOMPRESSBZrrkz_VPCOMPRESSDZrr_VPCOMPRESSDZrrk_VPCOMPRESSDZrrkz_VPCOMPRESSQZrr_VPCOMPRESSQZrrk_VPCOMPRESSQZrrkz_VPCOMPRESSWZrr_VPCOMPRESSWZrrk_VPCOMPRESSWZrrkz_VPEXPANDBZrr_VPEXPANDBZrrk_VPEXPANDBZrrkz_VPEXPANDWZrr_VPEXPANDWZrrk_VPEXPANDWZrrkz = 1149, |
| 20996 | VPABSBZ128rr_VPABSBZ128rrk_VPABSBZ128rrkz_VPABSDZ128rr_VPABSDZ128rrk_VPABSDZ128rrkz_VPABSQZ128rr_VPABSQZ128rrk_VPABSQZ128rrkz_VPABSWZ128rr_VPABSWZ128rrk_VPABSWZ128rrkz_VPADDSBZ128rr_VPADDSBZ128rrk_VPADDSBZ128rrkz_VPADDSWZ128rr_VPADDSWZ128rrk_VPADDSWZ128rrkz_VPADDUSBZ128rr_VPADDUSBZ128rrk_VPADDUSBZ128rrkz_VPADDUSWZ128rr_VPADDUSWZ128rrk_VPADDUSWZ128rrkz_VPAVGBZ128rr_VPAVGBZ128rrk_VPAVGBZ128rrkz_VPAVGWZ128rr_VPAVGWZ128rrk_VPAVGWZ128rrkz_VPOPCNTBZ128rr_VPOPCNTBZ128rrk_VPOPCNTBZ128rrkz_VPOPCNTDZ128rr_VPOPCNTDZ128rrk_VPOPCNTDZ128rrkz_VPOPCNTQZ128rr_VPOPCNTQZ128rrk_VPOPCNTQZ128rrkz_VPOPCNTWZ128rr_VPOPCNTWZ128rrk_VPOPCNTWZ128rrkz_VPSUBSBZ128rr_VPSUBSBZ128rrk_VPSUBSBZ128rrkz_VPSUBSWZ128rr_VPSUBSWZ128rrk_VPSUBSWZ128rrkz_VPSUBUSBZ128rr_VPSUBUSBZ128rrk_VPSUBUSBZ128rrkz_VPSUBUSWZ128rr_VPSUBUSWZ128rrk_VPSUBUSWZ128rrkz = 1150, |
| 20997 | LSL16rr_LSL32rr_LSL64rr = 1151, |
| 20998 | LXADD8_LXADD16_LXADD32_LXADD64 = 1152, |
| 20999 | BLCFILL32rr_BLCFILL64rr_BLCI32rr_BLCI64rr_BLCIC32rr_BLCIC64rr_BLCMSK32rr_BLCMSK64rr_BLCS32rr_BLCS64rr_BLSFILL32rr_BLSFILL64rr_BLSIC32rr_BLSIC64rr_T1MSKC32rr_T1MSKC64rr_TZMSK32rr_TZMSK64rr = 1153, |
| 21000 | BLCFILL32rm_BLCFILL64rm_BLCI32rm_BLCI64rm_BLCIC32rm_BLCIC64rm_BLCMSK32rm_BLCMSK64rm_BLCS32rm_BLCS64rm_BLSFILL32rm_BLSFILL64rm_BLSIC32rm_BLSIC64rm_T1MSKC32rm_T1MSKC64rm_TZMSK32rm_TZMSK64rm = 1154, |
| 21001 | ADC64ri32_SBB64ri32 = 1155, |
| 21002 | CRC32r32r16 = 1156, |
| 21003 | CRC32r32r32 = 1157, |
| 21004 | CRC32r64r64 = 1158, |
| 21005 | SAHF = 1159, |
| 21006 | BEXTRI32ri_BEXTRI64ri = 1160, |
| 21007 | BEXTRI32mi_BEXTRI64mi = 1161, |
| 21008 | RCR8ri = 1162, |
| 21009 | RCL16rCL = 1163, |
| 21010 | RCR16ri = 1164, |
| 21011 | RCR32rCL_RCR64rCL = 1165, |
| 21012 | RCL16ri = 1166, |
| 21013 | RCL32ri_RCL64ri = 1167, |
| 21014 | SHLD16rrCL = 1168, |
| 21015 | SHLD32rrCL_SHRD32rrCL = 1169, |
| 21016 | VMOVUPDYmr_VMOVUPSYmr = 1170, |
| 21017 | TST_F = 1171, |
| 21018 | VDPPSrri = 1172, |
| 21019 | VFRCZPDrr_VFRCZPSrr = 1173, |
| 21020 | VFRCZSDrr_VFRCZSSrr = 1174, |
| 21021 | VFRCZPDrm_VFRCZPSrm_VFRCZSDrm_VFRCZSSrm = 1175, |
| 21022 | VFRCZPSYrr_VFRCZPDYrr = 1176, |
| 21023 | VFRCZPSYrm_VFRCZPDYrm = 1177, |
| 21024 | MMX_CVTTPD2PIrr = 1178, |
| 21025 | CVTSI2SSrr = 1179, |
| 21026 | VMOVDQUYmr = 1180, |
| 21027 | MOVDQArr = 1181, |
| 21028 | VPMACSDQHrr_VPMACSDQLrr_VPMACSSDQHrr_VPMACSSDQLrr = 1182, |
| 21029 | VPPERMrrr_VPPERMrrr_REV = 1183, |
| 21030 | VPPERMrrm = 1184, |
| 21031 | VPPERMrmr = 1185, |
| 21032 | PHADDWrr_PHSUBWrr_PHADDSWrr_PHSUBSWrr_VPHADDDrr_VPHSUBDrr_VPHADDWrr_VPHSUBWrr_VPHADDSWrr_VPHSUBSWrr = 1186, |
| 21033 | PHADDWrm_PHSUBWrm_PHADDSWrm_PHSUBSWrm_VPHADDDrm_VPHSUBDrm_VPHADDWrm_VPHSUBWrm_VPHADDSWrm_VPHSUBSWrm = 1187, |
| 21034 | VPCLMULQDQrri = 1188, |
| 21035 | ANDNPSrr_ANDNPDrr = 1189, |
| 21036 | MMX_PXORrr_MMX_PANDNrr = 1190, |
| 21037 | PANDNrr = 1191, |
| 21038 | MMX_PSUBBrr_MMX_PSUBDrr_MMX_PSUBWrr_MMX_PCMPGTBrr_MMX_PCMPGTDrr_MMX_PCMPGTWrr = 1192, |
| 21039 | LCMPXCHG16_LCMPXCHG32_LCMPXCHG64 = 1193, |
| 21040 | CMPXCHG16rr_CMPXCHG32rr_CMPXCHG64rr = 1194, |
| 21041 | LCMPXCHG8B = 1195, |
| 21042 | INC8m_INC16m_INC32m_INC64m_DEC8m_DEC16m_DEC32m_DEC64m_NOT8m_NOT16m_NOT32m_NOT64m_NEG8m_NEG16m_NEG32m_NEG64m = 1196, |
| 21043 | XCHG8rr = 1197, |
| 21044 | MMX_PSUBSBrr_MMX_PSUBSWrr_MMX_PSUBUSBrr_MMX_PSUBUSWrr = 1198, |
| 21045 | PSUBSBrr_VPSUBSBrr_PSUBSWrr_VPSUBSWrr_PSUBUSBrr_VPSUBUSBrr_PSUBUSWrr_VPSUBUSWrr = 1199, |
| 21046 | MMX_PCMPEQBrr_MMX_PCMPEQDrr_MMX_PCMPEQWrr_MMX_PMAXSWrr_MMX_PMINSWrr_MMX_PMAXUBrr_MMX_PMINUBrr = 1200, |
| 21047 | MMX_PCMPGTBrr_MMX_PCMPGTDrr_MMX_PCMPGTWrr = 1201, |
| 21048 | CLAC_STAC = 1202, |
| 21049 | PADDBrr_PADDDrr_PADDWrr_VPADDBrr_VPADDDrr_VPADDQrr_VPADDWrr = 1203, |
| 21050 | VPADDBYrr_VPADDDYrr_VPADDQYrr_VPADDWYrr = 1204, |
| 21051 | ADD_FPrST0_ADD_FST0r_ADD_FrST0_SUBR_FPrST0_SUBR_FST0r_SUBR_FrST0_SUB_FPrST0_SUB_FST0r_SUB_FrST0 = 1205, |
| 21052 | MMX_PHADDSWrr_MMX_PHSUBSWrr = 1206, |
| 21053 | PHADDSWrr_VPHADDSWrr_PHSUBSWrr_VPHSUBSWrr = 1207, |
| 21054 | VPHADDSWYrr_VPHSUBSWYrr = 1208, |
| 21055 | MMX_PADDSBrm_MMX_PADDSWrm_MMX_PADDUSBrm_MMX_PADDUSWrm_MMX_PAVGBrm_MMX_PAVGWrm_MMX_PCMPEQBrm_MMX_PCMPEQDrm_MMX_PCMPEQWrm_MMX_PCMPGTBrm_MMX_PCMPGTDrm_MMX_PCMPGTWrm_MMX_PMAXSWrm_MMX_PMAXUBrm_MMX_PMINSWrm_MMX_PMINUBrm_MMX_PSUBSBrm_MMX_PSUBSWrm_MMX_PSUBUSBrm_MMX_PSUBUSWrm = 1209, |
| 21056 | PADDBrm_PADDDrm_PADDWrm_VPADDBrm_VPADDDrm_VPADDQrm_VPADDWrm_PSUBBrm_PSUBDrm_PSUBWrm_VPSUBBrm_VPSUBDrm_VPSUBQrm_VPSUBWrm = 1210, |
| 21057 | VCVTSS2SI64rr_VCVTTSS2SI64rr = 1211, |
| 21058 | VCVTSS2SI64rr_Int_VCVTTSS2SI64rr_Int = 1212, |
| 21059 | VPADDBYrm_VPADDDYrm_VPADDQYrm_VPADDWYrm_VPSUBBYrm_VPSUBDYrm_VPSUBQYrm_VPSUBWYrm = 1213, |
| 21060 | MMX_PHADDSWrm_MMX_PHSUBSWrm = 1214, |
| 21061 | PHADDSWrm_VPHADDSWrm_PHSUBSWrm_VPHSUBSWrm = 1215, |
| 21062 | VPHADDSWYrm_VPHSUBSWYrm = 1216, |
| 21063 | XSAVEC_XSAVEC64_XSAVES_XSAVES64 = 1217, |
| 21064 | PCMPGTBrr_PCMPGTDrr_PCMPGTWrr = 1218, |
| 21065 | VPCMPGTBrr_VPCMPGTDrr_VPCMPGTWrr = 1219, |
| 21066 | VPCMPGTBYrr_VPCMPGTDYrr_VPCMPGTWYrr = 1220, |
| 21067 | KANDBrr_KANDDrr_KANDQrr_KANDWrr_KANDNBrr_KANDNDrr_KANDNQrr_KANDNWrr_KNOTBrr_KNOTDrr_KNOTQrr_KNOTWrr_KORBrr_KORDrr_KORQrr_KORWrr_KXNORBrr_KXNORDrr_KXNORQrr_KXNORWrr_KXORBrr_KXORDrr_KXORQrr_KXORWrr = 1221, |
| 21068 | KMOVBkk_KMOVDkk_KMOVQkk_KMOVWkk = 1222, |
| 21069 | KMOVBkk_EVEX_KMOVDkk_EVEX_KMOVQkk_EVEX_KMOVWkk_EVEX_VPMOVB2MZ128rr_VPMOVB2MZ256rr_VPMOVB2MZrr_VPMOVD2MZ128rr_VPMOVD2MZ256rr_VPMOVD2MZrr_VPMOVQ2MZ128rr_VPMOVQ2MZ256rr_VPMOVQ2MZrr_VPMOVW2MZ128rr_VPMOVW2MZ256rr_VPMOVW2MZrr = 1223, |
| 21070 | KSET0D_KSET0Q_KSET0W_KSET1D_KSET1Q_KSET1W = 1224, |
| 21071 | KMOVBkr_EVEX_KMOVDkr_EVEX_KMOVQkr_EVEX_KMOVWkr_EVEX = 1225, |
| 21072 | VBLENDMPDZ128rr_VBLENDMPDZ128rrk_VBLENDMPDZ128rrkz_VBLENDMPSZ128rr_VBLENDMPSZ128rrk_VBLENDMPSZ128rrkz = 1226, |
| 21073 | VBLENDMPDZ256rr_VBLENDMPDZ256rrk_VBLENDMPDZ256rrkz_VBLENDMPSZ256rr_VBLENDMPSZ256rrk_VBLENDMPSZ256rrkz = 1227, |
| 21074 | VPADDBZ128rr_VPADDBZ128rrk_VPADDBZ128rrkz_VPADDDZ128rr_VPADDDZ128rrk_VPADDDZ128rrkz_VPADDQZ128rr_VPADDQZ128rrk_VPADDQZ128rrkz_VPADDWZ128rr_VPADDWZ128rrk_VPADDWZ128rrkz_VPSUBBZ128rrk_VPSUBBZ128rrkz_VPSUBDZ128rrk_VPSUBDZ128rrkz_VPSUBQZ128rrk_VPSUBQZ128rrkz_VPSUBWZ128rrk_VPSUBWZ128rrkz_VPTERNLOGDZ128rri_VPTERNLOGDZ128rrik_VPTERNLOGDZ128rrikz_VPTERNLOGQZ128rri_VPTERNLOGQZ128rrik_VPTERNLOGQZ128rrikz = 1228, |
| 21075 | VPADDBZ256rr_VPADDBZ256rrk_VPADDBZ256rrkz_VPADDDZ256rr_VPADDDZ256rrk_VPADDDZ256rrkz_VPADDQZ256rr_VPADDQZ256rrk_VPADDQZ256rrkz_VPADDWZ256rr_VPADDWZ256rrk_VPADDWZ256rrkz_VPSUBBZ256rrk_VPSUBBZ256rrkz_VPSUBDZ256rrk_VPSUBDZ256rrkz_VPSUBQZ256rrk_VPSUBQZ256rrkz_VPSUBWZ256rrk_VPSUBWZ256rrkz_VPTERNLOGDZ256rri_VPTERNLOGDZ256rrik_VPTERNLOGDZ256rrikz_VPTERNLOGQZ256rri_VPTERNLOGQZ256rrik_VPTERNLOGQZ256rrikz = 1229, |
| 21076 | VPADDBZrr_VPADDBZrrk_VPADDBZrrkz_VPADDDZrr_VPADDDZrrk_VPADDDZrrkz_VPADDQZrr_VPADDQZrrk_VPADDQZrrkz_VPADDWZrr_VPADDWZrrk_VPADDWZrrkz_VPSUBBZrrk_VPSUBBZrrkz_VPSUBDZrrk_VPSUBDZrrkz_VPSUBQZrrk_VPSUBQZrrkz_VPSUBWZrrk_VPSUBWZrrkz_VPTERNLOGDZrri_VPTERNLOGDZrrik_VPTERNLOGDZrrikz_VPTERNLOGQZrri_VPTERNLOGQZrrik_VPTERNLOGQZrrikz = 1230, |
| 21077 | VPBLENDMBZ128rr_VPBLENDMBZ128rrk_VPBLENDMBZ128rrkz_VPBLENDMDZ128rr_VPBLENDMDZ128rrk_VPBLENDMDZ128rrkz_VPBLENDMQZ128rr_VPBLENDMQZ128rrk_VPBLENDMQZ128rrkz_VPBLENDMWZ128rr_VPBLENDMWZ128rrk_VPBLENDMWZ128rrkz = 1231, |
| 21078 | VPBLENDMBZ256rr_VPBLENDMBZ256rrk_VPBLENDMBZ256rrkz_VPBLENDMDZ256rr_VPBLENDMDZ256rrk_VPBLENDMDZ256rrkz_VPBLENDMQZ256rr_VPBLENDMQZ256rrk_VPBLENDMQZ256rrkz_VPBLENDMWZ256rr_VPBLENDMWZ256rrk_VPBLENDMWZ256rrkz = 1232, |
| 21079 | KMOVBmk_EVEX_KMOVDmk_EVEX_KMOVQmk_EVEX_KMOVWmk_EVEX = 1233, |
| 21080 | VMOVDQU8Zmr_VMOVDQU8Zmrk = 1234, |
| 21081 | KMOVBrk_EVEX_KMOVDrk_EVEX_KMOVQrk_EVEX_KMOVWrk_EVEX = 1235, |
| 21082 | KORTESTBrr_KORTESTDrr_KORTESTQrr_KORTESTWrr_KTESTBrr_KTESTDrr_KTESTQrr_KTESTWrr = 1236, |
| 21083 | VALIGNDZ128rrik_VALIGNDZ128rrikz_VALIGNQZ128rrik_VALIGNQZ128rrikz = 1237, |
| 21084 | VALIGNDZ256rrik_VALIGNDZ256rrikz_VALIGNQZ256rrik_VALIGNQZ256rrikz = 1238, |
| 21085 | VALIGNDZrrik_VALIGNDZrrikz_VALIGNQZrrik_VALIGNQZrrikz = 1239, |
| 21086 | KSHIFTLBri_KSHIFTLDri_KSHIFTLQri_KSHIFTLWri_KSHIFTRBri_KSHIFTRDri_KSHIFTRQri_KSHIFTRWri = 1240, |
| 21087 | VCMPPDZ128rri_VCMPPDZ128rrik_VCMPPSZ128rri_VCMPPSZ128rrik_VFPCLASSPDZ128rr_VFPCLASSPDZ128rrk_VFPCLASSPSZ128rr_VFPCLASSPSZ128rrk = 1241, |
| 21088 | VCMPPDZ256rri_VCMPPDZ256rrik_VCMPPSZ256rri_VCMPPSZ256rrik_VFPCLASSPDZ256rr_VFPCLASSPDZ256rrk_VFPCLASSPSZ256rr_VFPCLASSPSZ256rrk = 1242, |
| 21089 | VCMPPDZrri_VCMPPDZrrib_VCMPPDZrribk_VCMPPDZrrik_VCMPPSZrri_VCMPPSZrrib_VCMPPSZrribk_VCMPPSZrrik_VFPCLASSPDZrr_VFPCLASSPDZrrk_VFPCLASSPSZrr_VFPCLASSPSZrrk = 1243, |
| 21090 | VCMPSDZrri_VCMPSDZrri_Int_VCMPSDZrri_Intk_VCMPSDZrrib_Int_VCMPSDZrrib_Intk_VCMPSSZrri_VCMPSSZrri_Int_VCMPSSZrri_Intk_VCMPSSZrrib_Int_VCMPSSZrrib_Intk_VFPCLASSSDZrr_VFPCLASSSDZrrk_VFPCLASSSSZrr_VFPCLASSSSZrrk = 1244, |
| 21091 | VPCMPBZ128rri_VPCMPBZ128rrik_VPCMPDZ128rri_VPCMPDZ128rrik_VPCMPEQBZ128rr_VPCMPEQBZ128rrk_VPCMPEQDZ128rr_VPCMPEQDZ128rrk_VPCMPEQQZ128rr_VPCMPEQQZ128rrk_VPCMPEQWZ128rr_VPCMPEQWZ128rrk_VPCMPGTBZ128rr_VPCMPGTBZ128rrk_VPCMPGTDZ128rr_VPCMPGTDZ128rrk_VPCMPGTQZ128rr_VPCMPGTQZ128rrk_VPCMPGTWZ128rr_VPCMPGTWZ128rrk_VPCMPQZ128rri_VPCMPQZ128rrik_VPCMPUBZ128rri_VPCMPUBZ128rrik_VPCMPUDZ128rri_VPCMPUDZ128rrik_VPCMPUQZ128rri_VPCMPUQZ128rrik_VPCMPUWZ128rri_VPCMPUWZ128rrik_VPCMPWZ128rri_VPCMPWZ128rrik = 1245, |
| 21092 | VPCMPBZ256rri_VPCMPBZ256rrik_VPCMPDZ256rri_VPCMPDZ256rrik_VPCMPEQBZ256rr_VPCMPEQBZ256rrk_VPCMPEQDZ256rr_VPCMPEQDZ256rrk_VPCMPEQQZ256rr_VPCMPEQQZ256rrk_VPCMPEQWZ256rr_VPCMPEQWZ256rrk_VPCMPGTBZ256rr_VPCMPGTBZ256rrk_VPCMPGTDZ256rr_VPCMPGTDZ256rrk_VPCMPGTQZ256rr_VPCMPGTQZ256rrk_VPCMPGTWZ256rr_VPCMPGTWZ256rrk_VPCMPQZ256rri_VPCMPQZ256rrik_VPCMPUBZ256rri_VPCMPUBZ256rrik_VPCMPUDZ256rri_VPCMPUDZ256rrik_VPCMPUQZ256rri_VPCMPUQZ256rrik_VPCMPUWZ256rri_VPCMPUWZ256rrik_VPCMPWZ256rri_VPCMPWZ256rrik = 1246, |
| 21093 | VPCMPBZrri_VPCMPBZrrik_VPCMPDZrri_VPCMPDZrrik_VPCMPEQBZrr_VPCMPEQBZrrk_VPCMPEQDZrr_VPCMPEQDZrrk_VPCMPEQQZrr_VPCMPEQQZrrk_VPCMPEQWZrr_VPCMPEQWZrrk_VPCMPGTBZrr_VPCMPGTBZrrk_VPCMPGTDZrr_VPCMPGTDZrrk_VPCMPGTQZrr_VPCMPGTQZrrk_VPCMPGTWZrr_VPCMPGTWZrrk_VPCMPQZrri_VPCMPQZrrik_VPCMPUBZrri_VPCMPUBZrrik_VPCMPUDZrri_VPCMPUDZrrik_VPCMPUQZrri_VPCMPUQZrrik_VPCMPUWZrri_VPCMPUWZrrik_VPCMPWZrri_VPCMPWZrrik = 1247, |
| 21094 | VPTESTMBZ128rr_VPTESTMDZ128rr_VPTESTMQZ128rr_VPTESTMWZ128rr_VPTESTNMBZ128rr_VPTESTNMDZ128rr_VPTESTNMQZ128rr_VPTESTNMWZ128rr = 1248, |
| 21095 | VPTESTMBZrr_VPTESTMDZrr_VPTESTMQZrr_VPTESTMWZrr_VPTESTNMBZrr_VPTESTNMDZrr_VPTESTNMQZrr_VPTESTNMWZrr = 1249, |
| 21096 | VCVTPD2QQZ128rr_VCVTPD2QQZ128rrk_VCVTPD2QQZ128rrkz_VCVTPD2UQQZ128rr_VCVTPD2UQQZ128rrk_VCVTPD2UQQZ128rrkz_VCVTTPD2QQZ128rr_VCVTTPD2QQZ128rrk_VCVTTPD2QQZ128rrkz_VCVTTPD2UQQZ128rr_VCVTTPD2UQQZ128rrk_VCVTTPD2UQQZ128rrkz = 1250, |
| 21097 | VCVTPD2QQZ256rr_VCVTPD2QQZ256rrk_VCVTPD2QQZ256rrkz_VCVTPD2UQQZ256rr_VCVTPD2UQQZ256rrk_VCVTPD2UQQZ256rrkz_VCVTTPD2QQZ256rr_VCVTTPD2QQZ256rrk_VCVTTPD2QQZ256rrkz_VCVTTPD2UQQZ256rr_VCVTTPD2UQQZ256rrk_VCVTTPD2UQQZ256rrkz = 1251, |
| 21098 | VCVTPS2DQYrr_VCVTPS2DQZ256rr_VCVTPS2DQZ256rrk_VCVTPS2DQZ256rrkz_VCVTPS2UDQZ256rr_VCVTPS2UDQZ256rrk_VCVTPS2UDQZ256rrkz_VCVTTPS2DQZ256rr_VCVTTPS2DQZ256rrk_VCVTTPS2DQZ256rrkz_VCVTTPS2UDQZ256rr_VCVTTPS2UDQZ256rrk_VCVTTPS2UDQZ256rrkz = 1252, |
| 21099 | VCVTPS2DQZ128rr_VCVTPS2DQZ128rrk_VCVTPS2DQZ128rrkz_VCVTPS2UDQZ128rr_VCVTPS2UDQZ128rrk_VCVTPS2UDQZ128rrkz_VCVTTPS2DQZ128rr_VCVTTPS2DQZ128rrk_VCVTTPS2DQZ128rrkz_VCVTTPS2UDQZ128rr_VCVTTPS2UDQZ128rrk_VCVTTPS2UDQZ128rrkz = 1253, |
| 21100 | VCVTPD2QQZrr_VCVTPD2UQQZrr_VCVTTPD2QQZrr_VCVTTPD2UQQZrr = 1254, |
| 21101 | VCVTPS2DQZrr_VCVTPS2UDQZrr_VCVTTPS2DQZrr_VCVTTPS2UDQZrr = 1255, |
| 21102 | VEXPANDPDZ128rr_VEXPANDPDZ128rrk_VEXPANDPDZ128rrkz_VEXPANDPDZ256rr_VEXPANDPDZ256rrk_VEXPANDPDZ256rrkz_VEXPANDPDZrr_VEXPANDPDZrrk_VEXPANDPDZrrkz_VEXPANDPSZ128rr_VEXPANDPSZ128rrk_VEXPANDPSZ128rrkz_VEXPANDPSZ256rr_VEXPANDPSZ256rrk_VEXPANDPSZ256rrkz_VEXPANDPSZrr_VEXPANDPSZrrk_VEXPANDPSZrrkz_VPEXPANDDZ128rr_VPEXPANDDZ128rrk_VPEXPANDDZ128rrkz_VPEXPANDDZ256rr_VPEXPANDDZ256rrk_VPEXPANDDZ256rrkz_VPEXPANDDZrr_VPEXPANDDZrrk_VPEXPANDDZrrkz_VPEXPANDQZ128rr_VPEXPANDQZ128rrk_VPEXPANDQZ128rrkz_VPEXPANDQZ256rr_VPEXPANDQZ256rrk_VPEXPANDQZ256rrkz_VPEXPANDQZrr_VPEXPANDQZrrk_VPEXPANDQZrrkz = 1256, |
| 21103 | VPMOVDBZ128rr_VPMOVDBZ128rrk_VPMOVDBZ128rrkz_VPMOVDBZ256rr_VPMOVDBZ256rrk_VPMOVDBZ256rrkz_VPMOVDWZ128rr_VPMOVDWZ128rrk_VPMOVDWZ128rrkz_VPMOVDWZ256rr_VPMOVDWZ256rrk_VPMOVDWZ256rrkz_VPMOVQBZ128rr_VPMOVQBZ128rrk_VPMOVQBZ128rrkz_VPMOVQBZ256rr_VPMOVQBZ256rrk_VPMOVQBZ256rrkz_VPMOVQWZ128rr_VPMOVQWZ128rrk_VPMOVQWZ128rrkz_VPMOVQWZ256rr_VPMOVQWZ256rrk_VPMOVQWZ256rrkz_VPMOVSDBZ128rr_VPMOVSDBZ128rrk_VPMOVSDBZ128rrkz_VPMOVSDBZ256rr_VPMOVSDBZ256rrk_VPMOVSDBZ256rrkz_VPMOVSDWZ128rr_VPMOVSDWZ128rrk_VPMOVSDWZ128rrkz_VPMOVSDWZ256rr_VPMOVSDWZ256rrk_VPMOVSDWZ256rrkz_VPMOVSQBZ128rr_VPMOVSQBZ128rrk_VPMOVSQBZ128rrkz_VPMOVSQBZ256rr_VPMOVSQBZ256rrk_VPMOVSQBZ256rrkz_VPMOVSQDZ128rr_VPMOVSQDZ128rrk_VPMOVSQDZ128rrkz_VPMOVSQDZ256rr_VPMOVSQDZ256rrk_VPMOVSQDZ256rrkz_VPMOVSQWZ128rr_VPMOVSQWZ128rrk_VPMOVSQWZ128rrkz_VPMOVSQWZ256rr_VPMOVSQWZ256rrk_VPMOVSQWZ256rrkz_VPMOVSWBZ128rr_VPMOVSWBZ128rrk_VPMOVSWBZ128rrkz_VPMOVSWBZ256rr_VPMOVSWBZ256rrk_VPMOVSWBZ256rrkz_VPMOVUSDBZ128rr_VPMOVUSDBZ128rrk_VPMOVUSDBZ128rrkz_VPMOVUSDBZ256rr_VPMOVUSDBZ256rrk_VPMOVUSDBZ256rrkz_VPMOVUSDWZ128rr_VPMOVUSDWZ128rrk_VPMOVUSDWZ128rrkz_VPMOVUSDWZ256rr_VPMOVUSDWZ256rrk_VPMOVUSDWZ256rrkz_VPMOVUSQBZ128rr_VPMOVUSQBZ128rrk_VPMOVUSQBZ128rrkz_VPMOVUSQBZ256rr_VPMOVUSQBZ256rrk_VPMOVUSQBZ256rrkz_VPMOVUSQDZ128rr_VPMOVUSQDZ128rrk_VPMOVUSQDZ128rrkz_VPMOVUSQDZ256rr_VPMOVUSQDZ256rrk_VPMOVUSQDZ256rrkz_VPMOVUSWBZ128rr_VPMOVUSWBZ128rrk_VPMOVUSWBZ128rrkz_VPMOVUSWBZ256rr_VPMOVUSWBZ256rrk_VPMOVUSWBZ256rrkz_VPMOVWBZ128rr_VPMOVWBZ128rrk_VPMOVWBZ128rrkz_VPMOVWBZ256rr_VPMOVWBZ256rrk_VPMOVWBZ256rrkz = 1257, |
| 21104 | VPMOVDBZrr_VPMOVDBZrrk_VPMOVDBZrrkz_VPMOVQBZrr_VPMOVQBZrrk_VPMOVQBZrrkz_VPMOVQWZrr_VPMOVQWZrrk_VPMOVQWZrrkz_VPMOVSDBZrr_VPMOVSDBZrrk_VPMOVSDBZrrkz_VPMOVSQBZrr_VPMOVSQBZrrk_VPMOVSQBZrrkz_VPMOVSQWZrr_VPMOVSQWZrrk_VPMOVSQWZrrkz_VPMOVUSDBZrr_VPMOVUSDBZrrk_VPMOVUSDBZrrkz_VPMOVUSQBZrr_VPMOVUSQBZrrk_VPMOVUSQBZrrkz = 1258, |
| 21105 | VPMOVDWZrr_VPMOVDWZrrk_VPMOVDWZrrkz_VPMOVSDWZrr_VPMOVSDWZrrk_VPMOVSDWZrrkz_VPMOVSQDZrr_VPMOVSQDZrrk_VPMOVSQDZrrkz_VPMOVSWBZrr_VPMOVSWBZrrk_VPMOVSWBZrrkz_VPMOVUSDWZrr_VPMOVUSDWZrrk_VPMOVUSDWZrrkz_VPMOVUSQDZrr_VPMOVUSQDZrrk_VPMOVUSQDZrrkz_VPMOVUSWBZrr_VPMOVUSWBZrrk_VPMOVUSWBZrrkz_VPMOVWBZrr_VPMOVWBZrrk_VPMOVWBZrrkz = 1259, |
| 21106 | VPMOVQDZ128mr_VPMOVQDZ128mrk_VPMOVQDZ256mr_VPMOVQDZ256mrk_VPMOVQDZmr_VPMOVQDZmrk = 1260, |
| 21107 | VCVTDQ2PDZ128rr_VCVTDQ2PDZ128rrk_VCVTDQ2PDZ128rrkz_VCVTUDQ2PDZ128rr_VCVTUDQ2PDZ128rrk_VCVTUDQ2PDZ128rrkz = 1261, |
| 21108 | VCVTPD2DQZ128rr_VCVTPD2DQZ128rrk_VCVTPD2DQZ128rrkz_VCVTPD2UDQZ128rr_VCVTPD2UDQZ128rrk_VCVTPD2UDQZ128rrkz_VCVTTPD2DQZ128rr_VCVTTPD2DQZ128rrk_VCVTTPD2DQZ128rrkz_VCVTTPD2UDQZ128rr_VCVTTPD2UDQZ128rrk_VCVTTPD2UDQZ128rrkz = 1262, |
| 21109 | VCVTPS2PDZ128rr_VCVTPS2PDZ128rrk_VCVTPS2PDZ128rrkz_CVTPS2PDrr_VCVTPS2PDrr = 1263, |
| 21110 | VCVTPS2QQZ128rr_VCVTPS2QQZ128rrk_VCVTPS2QQZ128rrkz_VCVTPS2UQQZ128rr_VCVTPS2UQQZ128rrk_VCVTPS2UQQZ128rrkz_VCVTTPS2QQZ128rr_VCVTTPS2QQZ128rrk_VCVTTPS2QQZ128rrkz_VCVTTPS2UQQZ128rr_VCVTTPS2UQQZ128rrk_VCVTTPS2UQQZ128rrkz = 1264, |
| 21111 | VCVTQQ2PSZ128rr_VCVTQQ2PSZ128rrk_VCVTQQ2PSZ128rrkz_VCVTUQQ2PSZ128rr_VCVTUQQ2PSZ128rrk_VCVTUQQ2PSZ128rrkz = 1265, |
| 21112 | VCVTSI2SSZrr_VCVTSI2SSZrr_Int_VCVTSI2SSZrrb_Int_CVTSI2SSrr_Int_VCVTSI2SSrr_VCVTSI2SSrr_Int_VCVTUSI2SSZrr_VCVTUSI2SSZrr_Int_VCVTUSI2SSZrrb_Int = 1266, |
| 21113 | VCVTSI2SDZrr_VCVTSI2SDZrr_Int_VCVTSI642SDZrr_VCVTSI642SDZrr_Int_VCVTSI642SDZrrb_Int_VCVTUSI2SDZrr_VCVTUSI2SDZrr_Int_VCVTUSI642SDZrr_VCVTUSI642SDZrr_Int_VCVTUSI642SDZrrb_Int = 1267, |
| 21114 | VCVTSS2SDZrr_VCVTSS2SDZrr_Int_VCVTSS2SDZrr_Intk_VCVTSS2SDZrr_Intkz_VCVTSS2SDZrrb_Int_VCVTSS2SDZrrb_Intk_VCVTSS2SDZrrb_Intkz_CVTSS2SDrr_CVTSS2SDrr_Int_VCVTSS2SDrr_VCVTSS2SDrr_Int = 1268, |
| 21115 | VPCONFLICTQZ128rr_VPCONFLICTQZ128rrk_VPCONFLICTQZ128rrkz = 1269, |
| 21116 | VCVTPS2PHZ128mr_VCVTPS2PHZ128mrk = 1270, |
| 21117 | VCVTPS2PHZ256mr_VCVTPS2PHZ256mrk = 1271, |
| 21118 | VCVTPS2PHZmr_VCVTPS2PHZmrk = 1272, |
| 21119 | VPMOVDBZ128mr_VPMOVDBZ128mrk_VPMOVDBZ256mr_VPMOVDBZ256mrk_VPMOVDBZmr_VPMOVDBZmrk_VPMOVDWZ128mr_VPMOVDWZ128mrk_VPMOVDWZ256mr_VPMOVDWZ256mrk_VPMOVDWZmr_VPMOVDWZmrk_VPMOVQBZ128mr_VPMOVQBZ128mrk_VPMOVQBZ256mr_VPMOVQBZ256mrk_VPMOVQBZmr_VPMOVQBZmrk_VPMOVQWZ128mr_VPMOVQWZ128mrk_VPMOVQWZ256mr_VPMOVQWZ256mrk_VPMOVQWZmr_VPMOVQWZmrk_VPMOVSDBZ128mr_VPMOVSDBZ128mrk_VPMOVSDBZ256mr_VPMOVSDBZ256mrk_VPMOVSDBZmr_VPMOVSDBZmrk_VPMOVSDWZ128mr_VPMOVSDWZ128mrk_VPMOVSDWZ256mr_VPMOVSDWZ256mrk_VPMOVSDWZmr_VPMOVSDWZmrk_VPMOVSQBZ128mr_VPMOVSQBZ128mrk_VPMOVSQBZ256mr_VPMOVSQBZ256mrk_VPMOVSQBZmr_VPMOVSQBZmrk_VPMOVSQDZ128mr_VPMOVSQDZ128mrk_VPMOVSQDZ256mr_VPMOVSQDZ256mrk_VPMOVSQDZmr_VPMOVSQDZmrk_VPMOVSQWZ128mr_VPMOVSQWZ128mrk_VPMOVSQWZ256mr_VPMOVSQWZ256mrk_VPMOVSQWZmr_VPMOVSQWZmrk_VPMOVSWBZ128mr_VPMOVSWBZ128mrk_VPMOVSWBZ256mr_VPMOVSWBZ256mrk_VPMOVSWBZmr_VPMOVSWBZmrk_VPMOVUSDBZ128mr_VPMOVUSDBZ128mrk_VPMOVUSDBZ256mr_VPMOVUSDBZ256mrk_VPMOVUSDBZmr_VPMOVUSDBZmrk_VPMOVUSDWZ128mr_VPMOVUSDWZ128mrk_VPMOVUSDWZ256mr_VPMOVUSDWZ256mrk_VPMOVUSDWZmr_VPMOVUSDWZmrk_VPMOVUSQBZ128mr_VPMOVUSQBZ128mrk_VPMOVUSQBZ256mr_VPMOVUSQBZ256mrk_VPMOVUSQBZmr_VPMOVUSQBZmrk_VPMOVUSQDZ128mr_VPMOVUSQDZ128mrk_VPMOVUSQDZ256mr_VPMOVUSQDZ256mrk_VPMOVUSQDZmr_VPMOVUSQDZmrk_VPMOVUSQWZ128mr_VPMOVUSQWZ128mrk_VPMOVUSQWZ256mr_VPMOVUSQWZ256mrk_VPMOVUSQWZmr_VPMOVUSQWZmrk_VPMOVUSWBZ128mr_VPMOVUSWBZ128mrk_VPMOVUSWBZ256mr_VPMOVUSWBZ256mrk_VPMOVUSWBZmr_VPMOVUSWBZmrk_VPMOVWBZ128mr_VPMOVWBZ128mrk_VPMOVWBZ256mr_VPMOVWBZ256mrk_VPMOVWBZmr_VPMOVWBZmrk = 1273, |
| 21120 | VCOMPRESSPDZ128rr_VCOMPRESSPDZ128rrk_VCOMPRESSPDZ128rrkz_VCOMPRESSPSZ128rr_VCOMPRESSPSZ128rrk_VCOMPRESSPSZ128rrkz_VPCOMPRESSDZ128rr_VPCOMPRESSDZ128rrk_VPCOMPRESSDZ128rrkz_VPCOMPRESSQZ128rr_VPCOMPRESSQZ128rrk_VPCOMPRESSQZ128rrkz_VPERMWZ128rr_VPERMWZ128rrk_VPERMWZ128rrkz = 1274, |
| 21121 | VCOMPRESSPDZ256rr_VCOMPRESSPDZ256rrk_VCOMPRESSPDZ256rrkz_VCOMPRESSPSZ256rr_VCOMPRESSPSZ256rrk_VCOMPRESSPSZ256rrkz_VPCOMPRESSDZ256rr_VPCOMPRESSDZ256rrk_VPCOMPRESSDZ256rrkz_VPCOMPRESSQZ256rr_VPCOMPRESSQZ256rrk_VPCOMPRESSQZ256rrkz_VPERMWZ256rr_VPERMWZ256rrk_VPERMWZ256rrkz = 1275, |
| 21122 | VCOMPRESSPDZrr_VCOMPRESSPDZrrk_VCOMPRESSPDZrrkz_VCOMPRESSPSZrr_VCOMPRESSPSZrrk_VCOMPRESSPSZrrkz_VPCOMPRESSDZrr_VPCOMPRESSDZrrk_VPCOMPRESSDZrrkz_VPCOMPRESSQZrr_VPCOMPRESSQZrrk_VPCOMPRESSQZrrkz_VPERMWZrr_VPERMWZrrk_VPERMWZrrkz = 1276, |
| 21123 | VMOV64toPQIZrm_VMOVQI2PQIZrm = 1277, |
| 21124 | VMOVDI2PDIZrm = 1278, |
| 21125 | VCVTSI642SSZrr_VCVTSI642SSZrr_Int_VCVTSI642SSZrrb_Int_VCVTUSI642SSZrr_VCVTUSI642SSZrr_Int_VCVTUSI642SSZrrb_Int = 1279, |
| 21126 | VMOVSDZrm_VMOVSDZrm_alt_VMOVSDZrmk_VMOVSDZrmkz_VMOVSSZrm_VMOVSSZrm_alt_VMOVSSZrmk_VMOVSSZrmkz = 1280, |
| 21127 | VCVTDQ2PDZ256rr_VCVTDQ2PDZ256rrk_VCVTDQ2PDZ256rrkz_VCVTUDQ2PDZ256rr_VCVTUDQ2PDZ256rrk_VCVTUDQ2PDZ256rrkz = 1281, |
| 21128 | VCVTPD2DQZ256rr_VCVTPD2DQZ256rrk_VCVTPD2DQZ256rrkz_VCVTPD2UDQZ256rr_VCVTPD2UDQZ256rrk_VCVTPD2UDQZ256rrkz_VCVTTPD2DQZ256rr_VCVTTPD2DQZ256rrk_VCVTTPD2DQZ256rrkz_VCVTTPD2UDQZ256rr_VCVTTPD2UDQZ256rrk_VCVTTPD2UDQZ256rrkz = 1282, |
| 21129 | VCVTPS2PDYrr_VCVTPS2PDZ256rr_VCVTPS2PDZ256rrk_VCVTPS2PDZ256rrkz = 1283, |
| 21130 | VCVTPS2QQZ256rr_VCVTPS2QQZ256rrk_VCVTPS2QQZ256rrkz_VCVTPS2UQQZ256rr_VCVTPS2UQQZ256rrk_VCVTPS2UQQZ256rrkz_VCVTTPS2QQZ256rr_VCVTTPS2QQZ256rrk_VCVTTPS2QQZ256rrkz_VCVTTPS2UQQZ256rr_VCVTTPS2UQQZ256rrk_VCVTTPS2UQQZ256rrkz = 1284, |
| 21131 | VCVTQQ2PSZ256rr_VCVTQQ2PSZ256rrk_VCVTQQ2PSZ256rrkz_VCVTUQQ2PSZ256rr_VCVTUQQ2PSZ256rrk_VCVTUQQ2PSZ256rrkz = 1285, |
| 21132 | VCVTDQ2PDZrr_VCVTUDQ2PDZrr = 1286, |
| 21133 | VCVTPD2DQZrr_VCVTPD2UDQZrr_VCVTTPD2DQZrr_VCVTTPD2UDQZrr = 1287, |
| 21134 | VCVTPS2PDZrr = 1288, |
| 21135 | VCVTPS2QQZrr_VCVTPS2UQQZrr_VCVTTPS2QQZrr_VCVTTPS2UQQZrr = 1289, |
| 21136 | VCVTQQ2PSZrr_VCVTUQQ2PSZrr = 1290, |
| 21137 | VMOVNTDQAZ128rm = 1291, |
| 21138 | VBLENDMPDZ128rm_VBLENDMPDZ128rmb_VBLENDMPDZ128rmbk_VBLENDMPDZ128rmbkz_VBLENDMPDZ128rmk_VBLENDMPDZ128rmkz_VBLENDMPSZ128rm_VBLENDMPSZ128rmb_VBLENDMPSZ128rmbk_VBLENDMPSZ128rmbkz_VBLENDMPSZ128rmk_VBLENDMPSZ128rmkz = 1292, |
| 21139 | VBROADCASTI32X2Z128rm_VBROADCASTI32X2Z128rmk_VBROADCASTI32X2Z128rmkz_VPBROADCASTDZ128rm_VPBROADCASTDZ128rmk_VPBROADCASTDZ128rmkz_VPBROADCASTQZ128rm_VPBROADCASTQZ128rmk_VPBROADCASTQZ128rmkz = 1293, |
| 21140 | VBROADCASTSSZ128rm_VBROADCASTSSZ128rmk_VBROADCASTSSZ128rmkz = 1294, |
| 21141 | VMOVAPDZ128rm_VMOVAPDZ128rmk_VMOVAPDZ128rmkz_VMOVAPSZ128rm_NOVLX_VMOVAPSZ128rm_VMOVAPSZ128rmk_VMOVAPSZ128rmkz_VMOVUPDZ128rm_VMOVUPDZ128rmk_VMOVUPDZ128rmkz_VMOVUPSZ128rm_NOVLX_VMOVUPSZ128rm_VMOVUPSZ128rmk_VMOVUPSZ128rmkz = 1295, |
| 21142 | VMOVDDUPZ128rm_VMOVDDUPZ128rmk_VMOVDDUPZ128rmkz_VMOVSHDUPZ128rm_VMOVSHDUPZ128rmk_VMOVSHDUPZ128rmkz_VMOVSLDUPZ128rm_VMOVSLDUPZ128rmk_VMOVSLDUPZ128rmkz = 1296, |
| 21143 | VMOVDQA32Z128rm_VMOVDQA32Z128rmk_VMOVDQA32Z128rmkz_VMOVDQA64Z128rm_VMOVDQA64Z128rmk_VMOVDQA64Z128rmkz_VMOVDQU16Z128rm_VMOVDQU16Z128rmk_VMOVDQU16Z128rmkz_VMOVDQU32Z128rm_VMOVDQU32Z128rmk_VMOVDQU32Z128rmkz_VMOVDQU64Z128rm_VMOVDQU64Z128rmk_VMOVDQU64Z128rmkz_VMOVDQU8Z128rm_VMOVDQU8Z128rmk_VMOVDQU8Z128rmkz = 1297, |
| 21144 | VPADDBZ128rm_VPADDBZ128rmk_VPADDBZ128rmkz_VPADDDZ128rm_VPADDDZ128rmb_VPADDDZ128rmbk_VPADDDZ128rmbkz_VPADDDZ128rmk_VPADDDZ128rmkz_VPADDQZ128rm_VPADDQZ128rmb_VPADDQZ128rmbk_VPADDQZ128rmbkz_VPADDQZ128rmk_VPADDQZ128rmkz_VPADDWZ128rm_VPADDWZ128rmk_VPADDWZ128rmkz_VPSUBBZ128rm_VPSUBBZ128rmk_VPSUBBZ128rmkz_VPSUBDZ128rm_VPSUBDZ128rmb_VPSUBDZ128rmbk_VPSUBDZ128rmbkz_VPSUBDZ128rmk_VPSUBDZ128rmkz_VPSUBQZ128rm_VPSUBQZ128rmb_VPSUBQZ128rmbk_VPSUBQZ128rmbkz_VPSUBQZ128rmk_VPSUBQZ128rmkz_VPSUBWZ128rm_VPSUBWZ128rmk_VPSUBWZ128rmkz_VPTERNLOGDZ128rmbi_VPTERNLOGDZ128rmbik_VPTERNLOGDZ128rmbikz_VPTERNLOGDZ128rmi_VPTERNLOGDZ128rmik_VPTERNLOGDZ128rmikz_VPTERNLOGQZ128rmbi_VPTERNLOGQZ128rmbik_VPTERNLOGQZ128rmbikz_VPTERNLOGQZ128rmi_VPTERNLOGQZ128rmik_VPTERNLOGQZ128rmikz = 1298, |
| 21145 | VPBLENDMBZ128rm_VPBLENDMBZ128rmk_VPBLENDMBZ128rmkz_VPBLENDMDZ128rm_VPBLENDMDZ128rmb_VPBLENDMDZ128rmbk_VPBLENDMDZ128rmbkz_VPBLENDMDZ128rmk_VPBLENDMDZ128rmkz_VPBLENDMQZ128rm_VPBLENDMQZ128rmb_VPBLENDMQZ128rmbk_VPBLENDMQZ128rmbkz_VPBLENDMQZ128rmk_VPBLENDMQZ128rmkz_VPBLENDMWZ128rm_VPBLENDMWZ128rmk_VPBLENDMWZ128rmkz = 1299, |
| 21146 | VPERMI2WZ128rr_VPERMI2WZ128rrk_VPERMI2WZ128rrkz_VPERMT2WZ128rr_VPERMT2WZ128rrk_VPERMT2WZ128rrkz = 1300, |
| 21147 | VPERMI2WZ256rr_VPERMI2WZ256rrk_VPERMI2WZ256rrkz_VPERMT2WZ256rr_VPERMT2WZ256rrk_VPERMT2WZ256rrkz = 1301, |
| 21148 | VPERMI2WZrr_VPERMI2WZrrk_VPERMI2WZrrkz_VPERMT2WZrr_VPERMT2WZrrk_VPERMT2WZrrkz = 1302, |
| 21149 | VCVTSS2SI64Zrr_VCVTSS2SI64Zrr_Int_VCVTSS2SI64Zrrb_Int_VCVTTSS2SI64Zrr_VCVTTSS2SI64Zrr_Int_VCVTTSS2SI64Zrrb_Int_VCVTSS2USI64Zrr_Int_VCVTSS2USI64Zrrb_Int_VCVTTSS2USI64Zrr_VCVTTSS2USI64Zrr_Int_VCVTTSS2USI64Zrrb_Int = 1303, |
| 21150 | KMOVBkm_KMOVBkm_EVEX_KMOVDkm_KMOVDkm_EVEX_KMOVQkm_KMOVQkm_EVEX_KMOVWkm_KMOVWkm_EVEX = 1304, |
| 21151 | VCOMPRESSPDZ128mr_VCOMPRESSPDZ128mrk_VCOMPRESSPDZ256mr_VCOMPRESSPDZ256mrk_VCOMPRESSPDZmr_VCOMPRESSPDZmrk_VCOMPRESSPSZ128mr_VCOMPRESSPSZ128mrk_VCOMPRESSPSZ256mr_VCOMPRESSPSZ256mrk_VCOMPRESSPSZmr_VCOMPRESSPSZmrk_VPCOMPRESSDZ128mr_VPCOMPRESSDZ128mrk_VPCOMPRESSDZ256mr_VPCOMPRESSDZ256mrk_VPCOMPRESSDZmr_VPCOMPRESSDZmrk_VPCOMPRESSQZ128mr_VPCOMPRESSQZ128mrk_VPCOMPRESSQZ256mr_VPCOMPRESSQZ256mrk_VPCOMPRESSQZmr_VPCOMPRESSQZmrk = 1305, |
| 21152 | VPSCATTERDQZ128mr_VPSCATTERQQZ128mr_VSCATTERDPDZ128mr_VSCATTERQPDZ128mr = 1306, |
| 21153 | VPSCATTERDQZ256mr_VPSCATTERQQZ256mr_VSCATTERDPDZ256mr_VSCATTERQPDZ256mr = 1307, |
| 21154 | VPSCATTERDQZmr_VPSCATTERQDZmr_VPSCATTERQQZmr_VSCATTERDPDZmr_VSCATTERQPSZmr_VSCATTERQPDZmr = 1308, |
| 21155 | VSCATTERDPSZmr = 1309, |
| 21156 | VPBROADCASTBZ256rm_VPBROADCASTBZ256rmk_VPBROADCASTBZ256rmkz_VPBROADCASTBZrm_VPBROADCASTBZrmk_VPBROADCASTBZrmkz_VPBROADCASTWZ256rm_VPBROADCASTWZ256rmk_VPBROADCASTWZ256rmkz_VPBROADCASTWZrm_VPBROADCASTWZrmk_VPBROADCASTWZrmkz = 1310, |
| 21157 | VMOVNTDQAZ256rm = 1311, |
| 21158 | VBLENDMPDZ256rm_VBLENDMPDZ256rmb_VBLENDMPDZ256rmbk_VBLENDMPDZ256rmbkz_VBLENDMPDZ256rmk_VBLENDMPDZ256rmkz_VBLENDMPSZ256rm_VBLENDMPSZ256rmb_VBLENDMPSZ256rmbk_VBLENDMPSZ256rmbkz_VBLENDMPSZ256rmk_VBLENDMPSZ256rmkz = 1312, |
| 21159 | VBLENDMPDZrm_VBLENDMPDZrmb_VBLENDMPDZrmbk_VBLENDMPDZrmbkz_VBLENDMPDZrmk_VBLENDMPDZrmkz_VBLENDMPSZrm_VBLENDMPSZrmb_VBLENDMPSZrmbk_VBLENDMPSZrmbkz_VBLENDMPSZrmk_VBLENDMPSZrmkz = 1313, |
| 21160 | VBROADCASTF32X2Z256rm_VBROADCASTF32X2Z256rmk_VBROADCASTF32X2Z256rmkz_VBROADCASTF32X2Zrm_VBROADCASTF32X2Zrmk_VBROADCASTF32X2Zrmkz_VBROADCASTI32X2Z256rm_VBROADCASTI32X2Z256rmk_VBROADCASTI32X2Z256rmkz_VBROADCASTI32X2Zrm_VBROADCASTI32X2Zrmk_VBROADCASTI32X2Zrmkz_VPBROADCASTDZ256rm_VPBROADCASTDZ256rmk_VPBROADCASTDZ256rmkz_VPBROADCASTDZrm_VPBROADCASTDZrmk_VPBROADCASTDZrmkz_VPBROADCASTQZ256rm_VPBROADCASTQZ256rmk_VPBROADCASTQZ256rmkz_VPBROADCASTQZrm_VPBROADCASTQZrmk_VPBROADCASTQZrmkz = 1314, |
| 21161 | VBROADCASTF32X4Z256rm_VBROADCASTF32X4Z256rmk_VBROADCASTF32X4Z256rmkz_VBROADCASTF32X4rm_VBROADCASTF32X4rmk_VBROADCASTF32X4rmkz_VBROADCASTF32X8rm_VBROADCASTF32X8rmk_VBROADCASTF32X8rmkz_VBROADCASTF64X2Z128rm_VBROADCASTF64X2Z128rmk_VBROADCASTF64X2Z128rmkz_VBROADCASTF64X2rm_VBROADCASTF64X2rmk_VBROADCASTF64X2rmkz_VBROADCASTF64X4rm_VBROADCASTF64X4rmk_VBROADCASTF64X4rmkz_VBROADCASTI32X4Z256rm_VBROADCASTI32X4Z256rmk_VBROADCASTI32X4Z256rmkz_VBROADCASTI32X4rm_VBROADCASTI32X4rmk_VBROADCASTI32X4rmkz_VBROADCASTI32X8rm_VBROADCASTI32X8rmk_VBROADCASTI32X8rmkz_VBROADCASTI64X2Z128rm_VBROADCASTI64X2Z128rmk_VBROADCASTI64X2Z128rmkz_VBROADCASTI64X2rm_VBROADCASTI64X2rmk_VBROADCASTI64X2rmkz_VBROADCASTI64X4rm_VBROADCASTI64X4rmk_VBROADCASTI64X4rmkz = 1315, |
| 21162 | VBROADCASTSDZ256rm_VBROADCASTSDZ256rmk_VBROADCASTSDZ256rmkz_VBROADCASTSDZrm_VBROADCASTSDZrmk_VBROADCASTSDZrmkz_VBROADCASTSSZ256rm_VBROADCASTSSZ256rmk_VBROADCASTSSZ256rmkz_VBROADCASTSSZrm_VBROADCASTSSZrmk_VBROADCASTSSZrmkz = 1316, |
| 21163 | VINSERTF32x4Z256rm_VINSERTF32x4Z256rmk_VINSERTF32x4Z256rmkz_VINSERTF32x4Zrm_VINSERTF32x4Zrmk_VINSERTF32x4Zrmkz_VINSERTF32x8Zrm_VINSERTF32x8Zrmk_VINSERTF32x8Zrmkz_VINSERTF64x2Z256rm_VINSERTF64x2Z256rmk_VINSERTF64x2Z256rmkz_VINSERTF64x2Zrm_VINSERTF64x2Zrmk_VINSERTF64x2Zrmkz_VINSERTF64x4Zrm_VINSERTF64x4Zrmk_VINSERTF64x4Zrmkz = 1317, |
| 21164 | VINSERTI32x4Z256rm_VINSERTI32x4Z256rmk_VINSERTI32x4Z256rmkz_VINSERTI32x4Zrm_VINSERTI32x4Zrmk_VINSERTI32x4Zrmkz_VINSERTI32x8Zrm_VINSERTI32x8Zrmk_VINSERTI32x8Zrmkz_VINSERTI64x2Z256rm_VINSERTI64x2Z256rmk_VINSERTI64x2Z256rmkz_VINSERTI64x2Zrm_VINSERTI64x2Zrmk_VINSERTI64x2Zrmkz_VINSERTI64x4Zrm_VINSERTI64x4Zrmk_VINSERTI64x4Zrmkz = 1318, |
| 21165 | VMOVAPDZ256rm_VMOVAPDZ256rmk_VMOVAPDZ256rmkz_VMOVAPDZrm_VMOVAPDZrmk_VMOVAPDZrmkz_VMOVAPSZ256rm_NOVLX_VMOVAPSZ256rm_VMOVAPSZ256rmk_VMOVAPSZ256rmkz_VMOVAPSZrm_VMOVAPSZrmk_VMOVAPSZrmkz_VMOVUPDZ256rm_VMOVUPDZ256rmk_VMOVUPDZ256rmkz_VMOVUPDZrm_VMOVUPDZrmk_VMOVUPDZrmkz_VMOVUPSZ256rm_NOVLX_VMOVUPSZ256rm_VMOVUPSZ256rmk_VMOVUPSZ256rmkz_VMOVUPSZrm_VMOVUPSZrmk_VMOVUPSZrmkz = 1319, |
| 21166 | VMOVDDUPZ256rm_VMOVDDUPZ256rmk_VMOVDDUPZ256rmkz_VMOVSHDUPZ256rm_VMOVSHDUPZ256rmk_VMOVSHDUPZ256rmkz_VMOVSLDUPZ256rm_VMOVSLDUPZ256rmk_VMOVSLDUPZ256rmkz = 1320, |
| 21167 | VMOVDDUPZrm_VMOVDDUPZrmk_VMOVDDUPZrmkz_VMOVSHDUPZrm_VMOVSHDUPZrmk_VMOVSHDUPZrmkz_VMOVSLDUPZrm_VMOVSLDUPZrmk_VMOVSLDUPZrmkz = 1321, |
| 21168 | VMOVDQA32Z256rm_VMOVDQA32Z256rmk_VMOVDQA32Z256rmkz_VMOVDQA32Zrm_VMOVDQA32Zrmk_VMOVDQA32Zrmkz_VMOVDQA64Z256rm_VMOVDQA64Z256rmk_VMOVDQA64Z256rmkz_VMOVDQA64Zrm_VMOVDQA64Zrmk_VMOVDQA64Zrmkz_VMOVDQU16Z256rm_VMOVDQU16Z256rmk_VMOVDQU16Z256rmkz_VMOVDQU16Zrm_VMOVDQU16Zrmk_VMOVDQU16Zrmkz_VMOVDQU32Z256rm_VMOVDQU32Z256rmk_VMOVDQU32Z256rmkz_VMOVDQU32Zrm_VMOVDQU32Zrmk_VMOVDQU32Zrmkz_VMOVDQU64Z256rm_VMOVDQU64Z256rmk_VMOVDQU64Z256rmkz_VMOVDQU64Zrm_VMOVDQU64Zrmk_VMOVDQU64Zrmkz_VMOVDQU8Z256rm_VMOVDQU8Z256rmk_VMOVDQU8Z256rmkz_VMOVDQU8Zrm_VMOVDQU8Zrmk_VMOVDQU8Zrmkz = 1322, |
| 21169 | VPADDBZ256rm_VPADDBZ256rmk_VPADDBZ256rmkz_VPADDDZ256rm_VPADDDZ256rmb_VPADDDZ256rmbk_VPADDDZ256rmbkz_VPADDDZ256rmk_VPADDDZ256rmkz_VPADDQZ256rm_VPADDQZ256rmb_VPADDQZ256rmbk_VPADDQZ256rmbkz_VPADDQZ256rmk_VPADDQZ256rmkz_VPADDWZ256rm_VPADDWZ256rmk_VPADDWZ256rmkz_VPSUBBZ256rm_VPSUBBZ256rmk_VPSUBBZ256rmkz_VPSUBDZ256rm_VPSUBDZ256rmb_VPSUBDZ256rmbk_VPSUBDZ256rmbkz_VPSUBDZ256rmk_VPSUBDZ256rmkz_VPSUBQZ256rm_VPSUBQZ256rmb_VPSUBQZ256rmbk_VPSUBQZ256rmbkz_VPSUBQZ256rmk_VPSUBQZ256rmkz_VPSUBWZ256rm_VPSUBWZ256rmk_VPSUBWZ256rmkz_VPTERNLOGDZ256rmbi_VPTERNLOGDZ256rmbik_VPTERNLOGDZ256rmbikz_VPTERNLOGDZ256rmi_VPTERNLOGDZ256rmik_VPTERNLOGDZ256rmikz_VPTERNLOGQZ256rmbi_VPTERNLOGQZ256rmbik_VPTERNLOGQZ256rmbikz_VPTERNLOGQZ256rmi_VPTERNLOGQZ256rmik_VPTERNLOGQZ256rmikz = 1323, |
| 21170 | VPADDBZrm_VPADDBZrmk_VPADDBZrmkz_VPADDDZrm_VPADDDZrmb_VPADDDZrmbk_VPADDDZrmbkz_VPADDDZrmk_VPADDDZrmkz_VPADDQZrm_VPADDQZrmb_VPADDQZrmbk_VPADDQZrmbkz_VPADDQZrmk_VPADDQZrmkz_VPADDWZrm_VPADDWZrmk_VPADDWZrmkz_VPSUBBZrm_VPSUBBZrmk_VPSUBBZrmkz_VPSUBDZrm_VPSUBDZrmb_VPSUBDZrmbk_VPSUBDZrmbkz_VPSUBDZrmk_VPSUBDZrmkz_VPSUBQZrm_VPSUBQZrmb_VPSUBQZrmbk_VPSUBQZrmbkz_VPSUBQZrmk_VPSUBQZrmkz_VPSUBWZrm_VPSUBWZrmk_VPSUBWZrmkz_VPTERNLOGDZrmbi_VPTERNLOGDZrmbik_VPTERNLOGDZrmbikz_VPTERNLOGDZrmi_VPTERNLOGDZrmik_VPTERNLOGDZrmikz_VPTERNLOGQZrmbi_VPTERNLOGQZrmbik_VPTERNLOGQZrmbikz_VPTERNLOGQZrmi_VPTERNLOGQZrmik_VPTERNLOGQZrmikz = 1324, |
| 21171 | VPBLENDMBZ256rm_VPBLENDMBZ256rmk_VPBLENDMBZ256rmkz_VPBLENDMDZ256rm_VPBLENDMDZ256rmb_VPBLENDMDZ256rmbk_VPBLENDMDZ256rmbkz_VPBLENDMDZ256rmk_VPBLENDMDZ256rmkz_VPBLENDMQZ256rm_VPBLENDMQZ256rmb_VPBLENDMQZ256rmbk_VPBLENDMQZ256rmbkz_VPBLENDMQZ256rmk_VPBLENDMQZ256rmkz_VPBLENDMWZ256rm_VPBLENDMWZ256rmk_VPBLENDMWZ256rmkz = 1325, |
| 21172 | VPBLENDMBZrm_VPBLENDMBZrmk_VPBLENDMBZrmkz_VPBLENDMDZrm_VPBLENDMDZrmb_VPBLENDMDZrmbk_VPBLENDMDZrmbkz_VPBLENDMDZrmk_VPBLENDMDZrmkz_VPBLENDMQZrm_VPBLENDMQZrmb_VPBLENDMQZrmbk_VPBLENDMQZrmbkz_VPBLENDMQZrmk_VPBLENDMQZrmkz_VPBLENDMWZrm_VPBLENDMWZrmk_VPBLENDMWZrmkz = 1326, |
| 21173 | VPSCATTERQDZ128mr_VPSCATTERQDZ256mr_VSCATTERQPSZ128mr_VSCATTERQPSZ256mr = 1327, |
| 21174 | VPSCATTERDDZ128mr_VSCATTERDPSZ128mr = 1328, |
| 21175 | VPSCATTERDDZ256mr_VSCATTERDPSZ256mr = 1329, |
| 21176 | VPSCATTERDDZmr = 1330, |
| 21177 | VALIGNDZ128rmbi_VALIGNDZ128rmbik_VALIGNDZ128rmbikz_VALIGNDZ128rmi_VALIGNDZ128rmik_VALIGNDZ128rmikz_VALIGNQZ128rmbi_VALIGNQZ128rmbik_VALIGNQZ128rmbikz_VALIGNQZ128rmi_VALIGNQZ128rmik_VALIGNQZ128rmikz = 1331, |
| 21178 | VFPCLASSSDZrm_VFPCLASSSDZrmk_VFPCLASSSSZrm_VFPCLASSSSZrmk = 1332, |
| 21179 | VPERMI2DZ128rm_VPERMI2DZ128rmb_VPERMI2DZ128rmbk_VPERMI2DZ128rmbkz_VPERMI2DZ128rmk_VPERMI2DZ128rmkz_VPERMI2QZ128rm_VPERMI2QZ128rmb_VPERMI2QZ128rmbk_VPERMI2QZ128rmbkz_VPERMI2QZ128rmk_VPERMI2QZ128rmkz_VPERMT2DZ128rm_VPERMT2DZ128rmb_VPERMT2DZ128rmbk_VPERMT2DZ128rmbkz_VPERMT2DZ128rmk_VPERMT2DZ128rmkz_VPERMT2QZ128rm_VPERMT2QZ128rmb_VPERMT2QZ128rmbk_VPERMT2QZ128rmbkz_VPERMT2QZ128rmk_VPERMT2QZ128rmkz = 1333, |
| 21180 | VPERMI2PDZ128rm_VPERMI2PDZ128rmb_VPERMI2PDZ128rmbk_VPERMI2PDZ128rmbkz_VPERMI2PDZ128rmk_VPERMI2PDZ128rmkz_VPERMI2PSZ128rm_VPERMI2PSZ128rmb_VPERMI2PSZ128rmbk_VPERMI2PSZ128rmbkz_VPERMI2PSZ128rmk_VPERMI2PSZ128rmkz_VPERMT2PDZ128rm_VPERMT2PDZ128rmb_VPERMT2PDZ128rmbk_VPERMT2PDZ128rmbkz_VPERMT2PDZ128rmk_VPERMT2PDZ128rmkz_VPERMT2PSZ128rm_VPERMT2PSZ128rmb_VPERMT2PSZ128rmbk_VPERMT2PSZ128rmbkz_VPERMT2PSZ128rmk_VPERMT2PSZ128rmkz = 1334, |
| 21181 | VPMAXSQZ128rm_VPMAXSQZ128rmb_VPMAXSQZ128rmbk_VPMAXSQZ128rmbkz_VPMAXSQZ128rmk_VPMAXSQZ128rmkz_VPMAXUQZ128rm_VPMAXUQZ128rmb_VPMAXUQZ128rmbk_VPMAXUQZ128rmbkz_VPMAXUQZ128rmk_VPMAXUQZ128rmkz_VPMINSQZ128rm_VPMINSQZ128rmb_VPMINSQZ128rmbk_VPMINSQZ128rmbkz_VPMINSQZ128rmk_VPMINSQZ128rmkz_VPMINUQZ128rm_VPMINUQZ128rmb_VPMINUQZ128rmbk_VPMINUQZ128rmbkz_VPMINUQZ128rmk_VPMINUQZ128rmkz = 1335, |
| 21182 | VCMPPDZ128rmbi_VCMPPDZ128rmbik_VCMPPDZ128rmi_VCMPPDZ128rmik_VCMPPSZ128rmbi_VCMPPSZ128rmbik_VCMPPSZ128rmi_VCMPPSZ128rmik_VFPCLASSPDZ128rm_VFPCLASSPDZ128rmb_VFPCLASSPDZ128rmbk_VFPCLASSPDZ128rmk_VFPCLASSPSZ128rm_VFPCLASSPSZ128rmb_VFPCLASSPSZ128rmbk_VFPCLASSPSZ128rmk = 1336, |
| 21183 | VCMPSDZrmi_VCMPSDZrmi_Int_VCMPSDZrmi_Intk_VCMPSSZrmi_VCMPSSZrmi_Int_VCMPSSZrmi_Intk = 1337, |
| 21184 | VPCMPBZ128rmi_VPCMPBZ128rmik_VPCMPDZ128rmi_VPCMPDZ128rmib_VPCMPDZ128rmibk_VPCMPDZ128rmik_VPCMPEQBZ128rm_VPCMPEQBZ128rmk_VPCMPEQDZ128rm_VPCMPEQDZ128rmb_VPCMPEQDZ128rmbk_VPCMPEQDZ128rmk_VPCMPEQQZ128rm_VPCMPEQQZ128rmb_VPCMPEQQZ128rmbk_VPCMPEQQZ128rmk_VPCMPEQWZ128rm_VPCMPEQWZ128rmk_VPCMPGTBZ128rm_VPCMPGTBZ128rmk_VPCMPGTDZ128rm_VPCMPGTDZ128rmb_VPCMPGTDZ128rmbk_VPCMPGTDZ128rmk_VPCMPGTQZ128rm_VPCMPGTQZ128rmb_VPCMPGTQZ128rmbk_VPCMPGTQZ128rmk_VPCMPGTWZ128rm_VPCMPGTWZ128rmk_VPCMPQZ128rmi_VPCMPQZ128rmib_VPCMPQZ128rmibk_VPCMPQZ128rmik_VPCMPUBZ128rmi_VPCMPUBZ128rmik_VPCMPUDZ128rmi_VPCMPUDZ128rmib_VPCMPUDZ128rmibk_VPCMPUDZ128rmik_VPCMPUQZ128rmi_VPCMPUQZ128rmib_VPCMPUQZ128rmibk_VPCMPUQZ128rmik_VPCMPUWZ128rmi_VPCMPUWZ128rmik_VPCMPWZ128rmi_VPCMPWZ128rmik = 1338, |
| 21185 | VPTESTMBZ128rm_VPTESTMBZ128rmk_VPTESTMDZ128rm_VPTESTMDZ128rmb_VPTESTMDZ128rmbk_VPTESTMDZ128rmk_VPTESTMQZ128rm_VPTESTMQZ128rmb_VPTESTMQZ128rmbk_VPTESTMQZ128rmk_VPTESTMWZ128rm_VPTESTMWZ128rmk_VPTESTNMBZ128rm_VPTESTNMBZ128rmk_VPTESTNMDZ128rm_VPTESTNMDZ128rmb_VPTESTNMDZ128rmbk_VPTESTNMDZ128rmk_VPTESTNMQZ128rm_VPTESTNMQZ128rmb_VPTESTNMQZ128rmbk_VPTESTNMQZ128rmk_VPTESTNMWZ128rm_VPTESTNMWZ128rmk = 1339, |
| 21186 | CVTPS2PDrm_VCVTPS2PDrm = 1340, |
| 21187 | VALIGNDZ256rmbi_VALIGNDZ256rmbik_VALIGNDZ256rmbikz_VALIGNDZ256rmi_VALIGNDZ256rmik_VALIGNDZ256rmikz_VALIGNQZ256rmbi_VALIGNQZ256rmbik_VALIGNQZ256rmbikz_VALIGNQZ256rmi_VALIGNQZ256rmik_VALIGNQZ256rmikz = 1341, |
| 21188 | VALIGNDZrmbi_VALIGNDZrmbik_VALIGNDZrmbikz_VALIGNDZrmi_VALIGNDZrmik_VALIGNDZrmikz_VALIGNQZrmbi_VALIGNQZrmbik_VALIGNQZrmbikz_VALIGNQZrmi_VALIGNQZrmik_VALIGNQZrmikz = 1342, |
| 21189 | VPMAXSQZ256rm_VPMAXSQZ256rmb_VPMAXSQZ256rmbk_VPMAXSQZ256rmbkz_VPMAXSQZ256rmk_VPMAXSQZ256rmkz_VPMAXUQZ256rm_VPMAXUQZ256rmb_VPMAXUQZ256rmbk_VPMAXUQZ256rmbkz_VPMAXUQZ256rmk_VPMAXUQZ256rmkz_VPMINSQZ256rm_VPMINSQZ256rmb_VPMINSQZ256rmbk_VPMINSQZ256rmbkz_VPMINSQZ256rmk_VPMINSQZ256rmkz_VPMINUQZ256rm_VPMINUQZ256rmb_VPMINUQZ256rmbk_VPMINUQZ256rmbkz_VPMINUQZ256rmk_VPMINUQZ256rmkz = 1343, |
| 21190 | VPMAXSQZrm_VPMAXSQZrmb_VPMAXSQZrmbk_VPMAXSQZrmbkz_VPMAXSQZrmk_VPMAXSQZrmkz_VPMAXUQZrm_VPMAXUQZrmb_VPMAXUQZrmbk_VPMAXUQZrmbkz_VPMAXUQZrmk_VPMAXUQZrmkz_VPMINSQZrm_VPMINSQZrmb_VPMINSQZrmbk_VPMINSQZrmbkz_VPMINSQZrmk_VPMINSQZrmkz_VPMINUQZrm_VPMINUQZrmb_VPMINUQZrmbk_VPMINUQZrmbkz_VPMINUQZrmk_VPMINUQZrmkz = 1344, |
| 21191 | VCMPPDZ256rmbi_VCMPPDZ256rmbik_VCMPPDZ256rmi_VCMPPDZ256rmik_VCMPPSZ256rmbi_VCMPPSZ256rmbik_VCMPPSZ256rmi_VCMPPSZ256rmik_VFPCLASSPDZ256rm_VFPCLASSPDZ256rmb_VFPCLASSPDZ256rmbk_VFPCLASSPDZ256rmk_VFPCLASSPSZ256rm_VFPCLASSPSZ256rmb_VFPCLASSPSZ256rmbk_VFPCLASSPSZ256rmk = 1345, |
| 21192 | VCMPPDZrmbi_VCMPPDZrmbik_VCMPPDZrmi_VCMPPDZrmik_VCMPPSZrmbi_VCMPPSZrmbik_VCMPPSZrmi_VCMPPSZrmik_VFPCLASSPDZrm_VFPCLASSPDZrmb_VFPCLASSPDZrmbk_VFPCLASSPDZrmk_VFPCLASSPSZrm_VFPCLASSPSZrmb_VFPCLASSPSZrmbk_VFPCLASSPSZrmk = 1346, |
| 21193 | VPCMPBZ256rmi_VPCMPBZ256rmik_VPCMPDZ256rmi_VPCMPDZ256rmib_VPCMPDZ256rmibk_VPCMPDZ256rmik_VPCMPEQBZ256rm_VPCMPEQBZ256rmk_VPCMPEQDZ256rm_VPCMPEQDZ256rmb_VPCMPEQDZ256rmbk_VPCMPEQDZ256rmk_VPCMPEQQZ256rm_VPCMPEQQZ256rmb_VPCMPEQQZ256rmbk_VPCMPEQQZ256rmk_VPCMPEQWZ256rm_VPCMPEQWZ256rmk_VPCMPGTBZ256rm_VPCMPGTBZ256rmk_VPCMPGTDZ256rm_VPCMPGTDZ256rmb_VPCMPGTDZ256rmbk_VPCMPGTDZ256rmk_VPCMPGTQZ256rm_VPCMPGTQZ256rmb_VPCMPGTQZ256rmbk_VPCMPGTQZ256rmk_VPCMPGTWZ256rm_VPCMPGTWZ256rmk_VPCMPQZ256rmi_VPCMPQZ256rmib_VPCMPQZ256rmibk_VPCMPQZ256rmik_VPCMPUBZ256rmi_VPCMPUBZ256rmik_VPCMPUDZ256rmi_VPCMPUDZ256rmib_VPCMPUDZ256rmibk_VPCMPUDZ256rmik_VPCMPUQZ256rmi_VPCMPUQZ256rmib_VPCMPUQZ256rmibk_VPCMPUQZ256rmik_VPCMPUWZ256rmi_VPCMPUWZ256rmik_VPCMPWZ256rmi_VPCMPWZ256rmik = 1347, |
| 21194 | VPCMPBZrmi_VPCMPBZrmik_VPCMPDZrmi_VPCMPDZrmib_VPCMPDZrmibk_VPCMPDZrmik_VPCMPEQBZrm_VPCMPEQBZrmk_VPCMPEQDZrm_VPCMPEQDZrmb_VPCMPEQDZrmbk_VPCMPEQDZrmk_VPCMPEQQZrm_VPCMPEQQZrmb_VPCMPEQQZrmbk_VPCMPEQQZrmk_VPCMPEQWZrm_VPCMPEQWZrmk_VPCMPGTBZrm_VPCMPGTBZrmk_VPCMPGTDZrm_VPCMPGTDZrmb_VPCMPGTDZrmbk_VPCMPGTDZrmk_VPCMPGTQZrm_VPCMPGTQZrmb_VPCMPGTQZrmbk_VPCMPGTQZrmk_VPCMPGTWZrm_VPCMPGTWZrmk_VPCMPQZrmi_VPCMPQZrmib_VPCMPQZrmibk_VPCMPQZrmik_VPCMPUBZrmi_VPCMPUBZrmik_VPCMPUDZrmi_VPCMPUDZrmib_VPCMPUDZrmibk_VPCMPUDZrmik_VPCMPUQZrmi_VPCMPUQZrmib_VPCMPUQZrmibk_VPCMPUQZrmik_VPCMPUWZrmi_VPCMPUWZrmik_VPCMPWZrmi_VPCMPWZrmik = 1348, |
| 21195 | VPTESTMBZ256rm_VPTESTMBZ256rmk_VPTESTMDZ256rm_VPTESTMDZ256rmb_VPTESTMDZ256rmbk_VPTESTMDZ256rmk_VPTESTMQZ256rm_VPTESTMQZ256rmb_VPTESTMQZ256rmbk_VPTESTMQZ256rmk_VPTESTMWZ256rm_VPTESTMWZ256rmk_VPTESTNMBZ256rm_VPTESTNMBZ256rmk_VPTESTNMDZ256rm_VPTESTNMDZ256rmb_VPTESTNMDZ256rmbk_VPTESTNMDZ256rmk_VPTESTNMQZ256rm_VPTESTNMQZ256rmb_VPTESTNMQZ256rmbk_VPTESTNMQZ256rmk_VPTESTNMWZ256rm_VPTESTNMWZ256rmk = 1349, |
| 21196 | VPTESTMBZrm_VPTESTMBZrmk_VPTESTMDZrm_VPTESTMDZrmb_VPTESTMDZrmbk_VPTESTMDZrmk_VPTESTMQZrm_VPTESTMQZrmb_VPTESTMQZrmbk_VPTESTMQZrmk_VPTESTMWZrm_VPTESTMWZrmk_VPTESTNMBZrm_VPTESTNMBZrmk_VPTESTNMDZrm_VPTESTNMDZrmb_VPTESTNMDZrmbk_VPTESTNMDZrmk_VPTESTNMQZrm_VPTESTNMQZrmb_VPTESTNMQZrmbk_VPTESTNMQZrmk_VPTESTNMWZrm_VPTESTNMWZrmk = 1350, |
| 21197 | VCVTDQ2PDZ128rm_VCVTDQ2PDZ128rmb_VCVTDQ2PDZ128rmbk_VCVTDQ2PDZ128rmbkz_VCVTDQ2PDZ128rmk_VCVTDQ2PDZ128rmkz_VCVTQQ2PDZ128rm_VCVTQQ2PDZ128rmb_VCVTQQ2PDZ128rmbk_VCVTQQ2PDZ128rmbkz_VCVTQQ2PDZ128rmk_VCVTQQ2PDZ128rmkz_VCVTUDQ2PDZ128rm_VCVTUDQ2PDZ128rmb_VCVTUDQ2PDZ128rmbk_VCVTUDQ2PDZ128rmbkz_VCVTUDQ2PDZ128rmk_VCVTUDQ2PDZ128rmkz_VCVTUQQ2PDZ128rm_VCVTUQQ2PDZ128rmb_VCVTUQQ2PDZ128rmbk_VCVTUQQ2PDZ128rmbkz_VCVTUQQ2PDZ128rmk_VCVTUQQ2PDZ128rmkz = 1351, |
| 21198 | VCVTDQ2PSZ128rm_VCVTDQ2PSZ128rmb_VCVTDQ2PSZ128rmbk_VCVTDQ2PSZ128rmbkz_VCVTDQ2PSZ128rmk_VCVTDQ2PSZ128rmkz_CVTDQ2PSrm_VCVTDQ2PSrm_VCVTQQ2PSZ128rm_VCVTQQ2PSZ128rmb_VCVTQQ2PSZ128rmbk_VCVTQQ2PSZ128rmbkz_VCVTQQ2PSZ128rmk_VCVTQQ2PSZ128rmkz_VCVTUDQ2PSZ128rm_VCVTUDQ2PSZ128rmb_VCVTUDQ2PSZ128rmbk_VCVTUDQ2PSZ128rmbkz_VCVTUDQ2PSZ128rmk_VCVTUDQ2PSZ128rmkz_VCVTUQQ2PSZ128rm_VCVTUQQ2PSZ128rmb_VCVTUQQ2PSZ128rmbk_VCVTUQQ2PSZ128rmbkz_VCVTUQQ2PSZ128rmk_VCVTUQQ2PSZ128rmkz = 1352, |
| 21199 | VCVTPD2QQZ128rm_VCVTPD2QQZ128rmb_VCVTPD2QQZ128rmbk_VCVTPD2QQZ128rmbkz_VCVTPD2QQZ128rmk_VCVTPD2QQZ128rmkz_VCVTPD2UQQZ128rm_VCVTPD2UQQZ128rmb_VCVTPD2UQQZ128rmbk_VCVTPD2UQQZ128rmbkz_VCVTPD2UQQZ128rmk_VCVTPD2UQQZ128rmkz_VCVTTPD2QQZ128rm_VCVTTPD2QQZ128rmb_VCVTTPD2QQZ128rmbk_VCVTTPD2QQZ128rmbkz_VCVTTPD2QQZ128rmk_VCVTTPD2QQZ128rmkz_VCVTTPD2UQQZ128rm_VCVTTPD2UQQZ128rmb_VCVTTPD2UQQZ128rmbk_VCVTTPD2UQQZ128rmbkz_VCVTTPD2UQQZ128rmk_VCVTTPD2UQQZ128rmkz = 1353, |
| 21200 | VCVTPH2PSZ128rm_VCVTPH2PSZ128rmk_VCVTPH2PSZ128rmkz = 1354, |
| 21201 | VCVTPS2DQZ128rm_VCVTPS2DQZ128rmb_VCVTPS2DQZ128rmbk_VCVTPS2DQZ128rmbkz_VCVTPS2DQZ128rmk_VCVTPS2DQZ128rmkz_CVTPS2DQrm_VCVTPS2DQrm_VCVTPS2QQZ128rm_VCVTPS2QQZ128rmb_VCVTPS2QQZ128rmbk_VCVTPS2QQZ128rmbkz_VCVTPS2QQZ128rmk_VCVTPS2QQZ128rmkz_VCVTPS2UDQZ128rm_VCVTPS2UDQZ128rmb_VCVTPS2UDQZ128rmbk_VCVTPS2UDQZ128rmbkz_VCVTPS2UDQZ128rmk_VCVTPS2UDQZ128rmkz_VCVTPS2UQQZ128rm_VCVTPS2UQQZ128rmb_VCVTPS2UQQZ128rmbk_VCVTPS2UQQZ128rmbkz_VCVTPS2UQQZ128rmk_VCVTPS2UQQZ128rmkz_VCVTTPS2DQZ128rm_VCVTTPS2DQZ128rmb_VCVTTPS2DQZ128rmbk_VCVTTPS2DQZ128rmbkz_VCVTTPS2DQZ128rmk_VCVTTPS2DQZ128rmkz_CVTTPS2DQrm_VCVTTPS2DQrm_VCVTTPS2QQZ128rm_VCVTTPS2QQZ128rmb_VCVTTPS2QQZ128rmbk_VCVTTPS2QQZ128rmbkz_VCVTTPS2QQZ128rmk_VCVTTPS2QQZ128rmkz_VCVTTPS2UDQZ128rm_VCVTTPS2UDQZ128rmb_VCVTTPS2UDQZ128rmbk_VCVTTPS2UDQZ128rmbkz_VCVTTPS2UDQZ128rmk_VCVTTPS2UDQZ128rmkz_VCVTTPS2UQQZ128rm_VCVTTPS2UQQZ128rmb_VCVTTPS2UQQZ128rmbk_VCVTTPS2UQQZ128rmbkz_VCVTTPS2UQQZ128rmk_VCVTTPS2UQQZ128rmkz = 1355, |
| 21202 | VCVTPS2PDZ128rm_VCVTPS2PDZ128rmb_VCVTPS2PDZ128rmbk_VCVTPS2PDZ128rmbkz_VCVTPS2PDZ128rmk_VCVTPS2PDZ128rmkz = 1356, |
| 21203 | VCVTSS2SDZrm_VCVTSS2SDZrm_Int_VCVTSS2SDZrm_Intk_VCVTSS2SDZrm_Intkz_CVTSS2SDrm_CVTSS2SDrm_Int_VCVTSS2SDrm_VCVTSS2SDrm_Int = 1357, |
| 21204 | VEXPANDPDZ128rm_VEXPANDPDZ128rmk_VEXPANDPDZ128rmkz_VEXPANDPSZ128rm_VEXPANDPSZ128rmk_VEXPANDPSZ128rmkz_VPEXPANDDZ128rm_VPEXPANDDZ128rmk_VPEXPANDDZ128rmkz_VPEXPANDQZ128rm_VPEXPANDQZ128rmk_VPEXPANDQZ128rmkz = 1358, |
| 21205 | VCVTDQ2PSYrm = 1359, |
| 21206 | VCVTPS2PDYrm = 1360, |
| 21207 | VCVTDQ2PDZ256rm_VCVTDQ2PDZ256rmb_VCVTDQ2PDZ256rmbk_VCVTDQ2PDZ256rmbkz_VCVTDQ2PDZ256rmk_VCVTDQ2PDZ256rmkz_VCVTQQ2PDZ256rm_VCVTQQ2PDZ256rmb_VCVTQQ2PDZ256rmbk_VCVTQQ2PDZ256rmbkz_VCVTQQ2PDZ256rmk_VCVTQQ2PDZ256rmkz_VCVTUDQ2PDZ256rm_VCVTUDQ2PDZ256rmb_VCVTUDQ2PDZ256rmbk_VCVTUDQ2PDZ256rmbkz_VCVTUDQ2PDZ256rmk_VCVTUDQ2PDZ256rmkz_VCVTUQQ2PDZ256rm_VCVTUQQ2PDZ256rmb_VCVTUQQ2PDZ256rmbk_VCVTUQQ2PDZ256rmbkz_VCVTUQQ2PDZ256rmk_VCVTUQQ2PDZ256rmkz = 1361, |
| 21208 | VCVTDQ2PDZrm_VCVTDQ2PDZrmb_VCVTDQ2PDZrmbk_VCVTDQ2PDZrmbkz_VCVTDQ2PDZrmk_VCVTDQ2PDZrmkz_VCVTQQ2PDZrm_VCVTQQ2PDZrmb_VCVTQQ2PDZrmbk_VCVTQQ2PDZrmbkz_VCVTQQ2PDZrmk_VCVTQQ2PDZrmkz_VCVTUDQ2PDZrm_VCVTUDQ2PDZrmb_VCVTUDQ2PDZrmbk_VCVTUDQ2PDZrmbkz_VCVTUDQ2PDZrmk_VCVTUDQ2PDZrmkz_VCVTUQQ2PDZrm_VCVTUQQ2PDZrmb_VCVTUQQ2PDZrmbk_VCVTUQQ2PDZrmbkz_VCVTUQQ2PDZrmk_VCVTUQQ2PDZrmkz = 1362, |
| 21209 | VCVTDQ2PSZ256rm_VCVTDQ2PSZ256rmb_VCVTDQ2PSZ256rmbk_VCVTDQ2PSZ256rmbkz_VCVTDQ2PSZ256rmk_VCVTDQ2PSZ256rmkz_VCVTQQ2PSZ256rm_VCVTQQ2PSZ256rmb_VCVTQQ2PSZ256rmbk_VCVTQQ2PSZ256rmbkz_VCVTQQ2PSZ256rmk_VCVTQQ2PSZ256rmkz_VCVTUDQ2PSZ256rm_VCVTUDQ2PSZ256rmb_VCVTUDQ2PSZ256rmbk_VCVTUDQ2PSZ256rmbkz_VCVTUDQ2PSZ256rmk_VCVTUDQ2PSZ256rmkz_VCVTUQQ2PSZ256rm_VCVTUQQ2PSZ256rmb_VCVTUQQ2PSZ256rmbk_VCVTUQQ2PSZ256rmbkz_VCVTUQQ2PSZ256rmk_VCVTUQQ2PSZ256rmkz = 1363, |
| 21210 | VCVTDQ2PSZrm_VCVTDQ2PSZrmb_VCVTDQ2PSZrmbk_VCVTDQ2PSZrmbkz_VCVTDQ2PSZrmk_VCVTDQ2PSZrmkz_VCVTUDQ2PSZrm_VCVTUDQ2PSZrmb_VCVTUDQ2PSZrmbk_VCVTUDQ2PSZrmbkz_VCVTUDQ2PSZrmk_VCVTUDQ2PSZrmkz = 1364, |
| 21211 | VCVTPH2PSZ256rm_VCVTPH2PSZ256rmk_VCVTPH2PSZ256rmkz = 1365, |
| 21212 | VCVTPH2PSZrm_VCVTPH2PSZrmk_VCVTPH2PSZrmkz = 1366, |
| 21213 | VCVTPS2PDZ256rm_VCVTPS2PDZ256rmb_VCVTPS2PDZ256rmbk_VCVTPS2PDZ256rmbkz_VCVTPS2PDZ256rmk_VCVTPS2PDZ256rmkz = 1367, |
| 21214 | VCVTPS2PDZrm_VCVTPS2PDZrmb_VCVTPS2PDZrmbk_VCVTPS2PDZrmbkz_VCVTPS2PDZrmk_VCVTPS2PDZrmkz = 1368, |
| 21215 | VCVTPD2QQZ256rm_VCVTPD2QQZ256rmb_VCVTPD2QQZ256rmbk_VCVTPD2QQZ256rmbkz_VCVTPD2QQZ256rmk_VCVTPD2QQZ256rmkz_VCVTTPD2QQZ256rm_VCVTTPD2QQZ256rmb_VCVTTPD2QQZ256rmbk_VCVTTPD2QQZ256rmbkz_VCVTTPD2QQZ256rmk_VCVTTPD2QQZ256rmkz_VCVTPD2UQQZ256rm_VCVTPD2UQQZ256rmb_VCVTPD2UQQZ256rmbk_VCVTPD2UQQZ256rmbkz_VCVTPD2UQQZ256rmk_VCVTPD2UQQZ256rmkz_VCVTTPD2UQQZ256rm_VCVTTPD2UQQZ256rmb_VCVTTPD2UQQZ256rmbk_VCVTTPD2UQQZ256rmbkz_VCVTTPD2UQQZ256rmk_VCVTTPD2UQQZ256rmkz = 1369, |
| 21216 | VCVTPD2QQZrm_VCVTPD2QQZrmb_VCVTPD2QQZrmbk_VCVTPD2QQZrmbkz_VCVTPD2QQZrmk_VCVTPD2QQZrmkz_VCVTTPD2QQZrm_VCVTTPD2QQZrmb_VCVTTPD2QQZrmbk_VCVTTPD2QQZrmbkz_VCVTTPD2QQZrmk_VCVTTPD2QQZrmkz_VCVTPD2UQQZrm_VCVTPD2UQQZrmb_VCVTPD2UQQZrmbk_VCVTPD2UQQZrmbkz_VCVTPD2UQQZrmk_VCVTPD2UQQZrmkz_VCVTTPD2UQQZrm_VCVTTPD2UQQZrmb_VCVTTPD2UQQZrmbk_VCVTTPD2UQQZrmbkz_VCVTTPD2UQQZrmk_VCVTTPD2UQQZrmkz = 1370, |
| 21217 | VCVTPS2DQYrm_VCVTTPS2DQYrm_VCVTPS2DQZ256rm_VCVTPS2DQZ256rmb_VCVTPS2DQZ256rmbk_VCVTPS2DQZ256rmbkz_VCVTPS2DQZ256rmk_VCVTPS2DQZ256rmkz_VCVTTPS2DQZ256rm_VCVTTPS2DQZ256rmb_VCVTTPS2DQZ256rmbk_VCVTTPS2DQZ256rmbkz_VCVTTPS2DQZ256rmk_VCVTTPS2DQZ256rmkz_VCVTPS2QQZ256rm_VCVTPS2QQZ256rmb_VCVTPS2QQZ256rmbk_VCVTPS2QQZ256rmbkz_VCVTPS2QQZ256rmk_VCVTPS2QQZ256rmkz_VCVTTPS2QQZ256rm_VCVTTPS2QQZ256rmb_VCVTTPS2QQZ256rmbk_VCVTTPS2QQZ256rmbkz_VCVTTPS2QQZ256rmk_VCVTTPS2QQZ256rmkz_VCVTPS2UDQZ256rm_VCVTPS2UDQZ256rmb_VCVTPS2UDQZ256rmbk_VCVTPS2UDQZ256rmbkz_VCVTPS2UDQZ256rmk_VCVTPS2UDQZ256rmkz_VCVTTPS2UDQZ256rm_VCVTTPS2UDQZ256rmb_VCVTTPS2UDQZ256rmbk_VCVTTPS2UDQZ256rmbkz_VCVTTPS2UDQZ256rmk_VCVTTPS2UDQZ256rmkz_VCVTPS2UQQZ256rm_VCVTPS2UQQZ256rmb_VCVTPS2UQQZ256rmbk_VCVTPS2UQQZ256rmbkz_VCVTPS2UQQZ256rmk_VCVTPS2UQQZ256rmkz_VCVTTPS2UQQZ256rm_VCVTTPS2UQQZ256rmb_VCVTTPS2UQQZ256rmbk_VCVTTPS2UQQZ256rmbkz_VCVTTPS2UQQZ256rmk_VCVTTPS2UQQZ256rmkz = 1371, |
| 21218 | VCVTPS2DQZrm_VCVTPS2DQZrmb_VCVTPS2DQZrmbk_VCVTPS2DQZrmbkz_VCVTPS2DQZrmk_VCVTPS2DQZrmkz_VCVTTPS2DQZrm_VCVTTPS2DQZrmb_VCVTTPS2DQZrmbk_VCVTTPS2DQZrmbkz_VCVTTPS2DQZrmk_VCVTTPS2DQZrmkz_VCVTPS2UDQZrm_VCVTPS2UDQZrmb_VCVTPS2UDQZrmbk_VCVTPS2UDQZrmbkz_VCVTPS2UDQZrmk_VCVTPS2UDQZrmkz_VCVTTPS2UDQZrm_VCVTTPS2UDQZrmb_VCVTTPS2UDQZrmbk_VCVTTPS2UDQZrmbkz_VCVTTPS2UDQZrmk_VCVTTPS2UDQZrmkz = 1372, |
| 21219 | VEXPANDPDZ256rm_VEXPANDPDZ256rmk_VEXPANDPDZ256rmkz_VEXPANDPDZrm_VEXPANDPDZrmk_VEXPANDPDZrmkz_VEXPANDPSZ256rm_VEXPANDPSZ256rmk_VEXPANDPSZ256rmkz_VEXPANDPSZrm_VEXPANDPSZrmk_VEXPANDPSZrmkz_VPEXPANDDZ256rm_VPEXPANDDZ256rmk_VPEXPANDDZ256rmkz_VPEXPANDDZrm_VPEXPANDDZrmk_VPEXPANDDZrmkz_VPEXPANDQZ256rm_VPEXPANDQZ256rmk_VPEXPANDQZ256rmkz_VPEXPANDQZrm_VPEXPANDQZrmk_VPEXPANDQZrmkz = 1373, |
| 21220 | CVTDQ2PDrm_VCVTDQ2PDrm = 1374, |
| 21221 | CVTPD2DQrm_CVTTPD2DQrm = 1375, |
| 21222 | VPCONFLICTQZ128rm_VPCONFLICTQZ128rmb_VPCONFLICTQZ128rmbk_VPCONFLICTQZ128rmbkz_VPCONFLICTQZ128rmk_VPCONFLICTQZ128rmkz = 1376, |
| 21223 | VPMULLQZ128rr_VPMULLQZ128rrk_VPMULLQZ128rrkz = 1377, |
| 21224 | VPMULLQZ256rr_VPMULLQZ256rrk_VPMULLQZ256rrkz = 1378, |
| 21225 | VPMULLQZrr_VPMULLQZrrk_VPMULLQZrrkz = 1379, |
| 21226 | VPERMWZ128rm_VPERMWZ128rmk_VPERMWZ128rmkz = 1380, |
| 21227 | VCVTSD2USIZrm_Int_VCVTTSD2USIZrm_VCVTTSD2USIZrm_Int = 1381, |
| 21228 | VCVTSS2USI64Zrm_Int_VCVTTSS2USI64Zrm_VCVTTSS2USI64Zrm_Int = 1382, |
| 21229 | VCVTPS2QQZrm_VCVTPS2QQZrmb_VCVTPS2QQZrmbk_VCVTPS2QQZrmbkz_VCVTPS2QQZrmk_VCVTPS2QQZrmkz_VCVTTPS2QQZrm_VCVTTPS2QQZrmb_VCVTTPS2QQZrmbk_VCVTTPS2QQZrmbkz_VCVTTPS2QQZrmk_VCVTTPS2QQZrmkz_VCVTPS2UQQZrm_VCVTPS2UQQZrmb_VCVTPS2UQQZrmbk_VCVTPS2UQQZrmbkz_VCVTPS2UQQZrmk_VCVTPS2UQQZrmkz_VCVTTPS2UQQZrm_VCVTTPS2UQQZrmb_VCVTTPS2UQQZrmbk_VCVTTPS2UQQZrmbkz_VCVTTPS2UQQZrmk_VCVTTPS2UQQZrmkz = 1383, |
| 21230 | VPERMWZ256rm_VPERMWZ256rmk_VPERMWZ256rmkz_VPERMWZrm_VPERMWZrmk_VPERMWZrmkz = 1384, |
| 21231 | VCVTDQ2PDYrm = 1385, |
| 21232 | VPERMI2WZ128rm_VPERMI2WZ128rmk_VPERMI2WZ128rmkz_VPERMT2WZ128rm_VPERMT2WZ128rmk_VPERMT2WZ128rmkz = 1386, |
| 21233 | VCVTPD2DQZrm_VCVTPD2DQZrmb_VCVTPD2DQZrmbk_VCVTPD2DQZrmbkz_VCVTPD2DQZrmk_VCVTPD2DQZrmkz_VCVTPD2UDQZrm_VCVTPD2UDQZrmb_VCVTPD2UDQZrmbk_VCVTPD2UDQZrmbkz_VCVTPD2UDQZrmk_VCVTPD2UDQZrmkz_VCVTTPD2DQZrm_VCVTTPD2DQZrmb_VCVTTPD2DQZrmbk_VCVTTPD2DQZrmbkz_VCVTTPD2DQZrmk_VCVTTPD2DQZrmkz_VCVTTPD2UDQZrm_VCVTTPD2UDQZrmb_VCVTTPD2UDQZrmbk_VCVTTPD2UDQZrmbkz_VCVTTPD2UDQZrmk_VCVTTPD2UDQZrmkz = 1387, |
| 21234 | VCVTQQ2PSZrm_VCVTQQ2PSZrmb_VCVTQQ2PSZrmbk_VCVTQQ2PSZrmbkz_VCVTQQ2PSZrmk_VCVTQQ2PSZrmkz_VCVTUQQ2PSZrm_VCVTUQQ2PSZrmb_VCVTUQQ2PSZrmbk_VCVTUQQ2PSZrmbkz_VCVTUQQ2PSZrmk_VCVTUQQ2PSZrmkz = 1388, |
| 21235 | VPERMI2WZ256rm_VPERMI2WZ256rmk_VPERMI2WZ256rmkz_VPERMI2WZrm_VPERMI2WZrmk_VPERMI2WZrmkz_VPERMT2WZ256rm_VPERMT2WZ256rmk_VPERMT2WZ256rmkz_VPERMT2WZrm_VPERMT2WZrmk_VPERMT2WZrmkz = 1389, |
| 21236 | VPCONFLICTDZ128rm_VPCONFLICTDZ128rmb_VPCONFLICTDZ128rmbk_VPCONFLICTDZ128rmbkz_VPCONFLICTDZ128rmk_VPCONFLICTDZ128rmkz = 1390, |
| 21237 | VPMULLQZ128rm_VPMULLQZ128rmb_VPMULLQZ128rmbk_VPMULLQZ128rmbkz_VPMULLQZ128rmk_VPMULLQZ128rmkz = 1391, |
| 21238 | VPMULLQZ256rm_VPMULLQZ256rmb_VPMULLQZ256rmbk_VPMULLQZ256rmbkz_VPMULLQZ256rmk_VPMULLQZ256rmkz = 1392, |
| 21239 | VPMULLQZrm_VPMULLQZrmb_VPMULLQZrmbk_VPMULLQZrmbkz_VPMULLQZrmk_VPMULLQZrmkz = 1393, |
| 21240 | VGATHERQPSZ128rm_VPGATHERQDZ128rm_VGATHERDPDZ128rm_VPGATHERDQZ128rm_VGATHERQPDZ128rm_VPGATHERQQZ128rm = 1394, |
| 21241 | VGATHERQPSZ256rm_VPGATHERQDZ256rm_VGATHERQPDZ256rm_VPGATHERQQZ256rm_VGATHERDPSZ128rm_VPGATHERDDZ128rm_VGATHERDPDZ256rm_VPGATHERDQZ256rm = 1395, |
| 21242 | VGATHERDPSZ256rm_VPGATHERDDZ256rm_VGATHERDPDZrm_VPGATHERDQZrm_VGATHERQPDZrm_VPGATHERQQZrm_VGATHERQPSZrm_VPGATHERQDZrm = 1396, |
| 21243 | VGATHERDPSZrm_VPGATHERDDZrm = 1397, |
| 21244 | VPCONFLICTQZ256rr_VPCONFLICTQZ256rrk_VPCONFLICTQZ256rrkz = 1398, |
| 21245 | VPCONFLICTQZ256rm_VPCONFLICTQZ256rmb_VPCONFLICTQZ256rmbk_VPCONFLICTQZ256rmbkz_VPCONFLICTQZ256rmk_VPCONFLICTQZ256rmkz = 1399, |
| 21246 | VPCONFLICTQZrr_VPCONFLICTQZrrk_VPCONFLICTQZrrkz = 1400, |
| 21247 | VPCONFLICTDZ256rm_VPCONFLICTDZ256rmb_VPCONFLICTDZ256rmbk_VPCONFLICTDZ256rmbkz_VPCONFLICTDZ256rmk_VPCONFLICTDZ256rmkz = 1401, |
| 21248 | VPCONFLICTQZrm_VPCONFLICTQZrmb_VPCONFLICTQZrmbk_VPCONFLICTQZrmbkz_VPCONFLICTQZrmk_VPCONFLICTQZrmkz = 1402, |
| 21249 | VPCONFLICTDZrm_VPCONFLICTDZrmb_VPCONFLICTDZrmbk_VPCONFLICTDZrmbkz_VPCONFLICTDZrmk_VPCONFLICTDZrmkz = 1403, |
| 21250 | VXORPSZ128rr_VXORPDZ128rr = 1404, |
| 21251 | VXORPSZ256rr_VXORPDZ256rr = 1405, |
| 21252 | VXORPSZrr_VXORPDZrr = 1406, |
| 21253 | VPXORDZ128rr_VPXORQZ128rr = 1407, |
| 21254 | VPXORDZ256rr_VPXORQZ256rr = 1408, |
| 21255 | VPXORDZrr_VPXORQZrr = 1409, |
| 21256 | VPSUBBZ128rr_VPSUBDZ128rr_VPSUBQZ128rr_VPSUBWZ128rr = 1410, |
| 21257 | VPSUBBZ256rr_VPSUBDZ256rr_VPSUBQZ256rr_VPSUBWZ256rr = 1411, |
| 21258 | VPSUBBZrr_VPSUBDZrr_VPSUBQZrr_VPSUBWZrr = 1412, |
| 21259 | VPBROADCASTDrr_VPBROADCASTQrr = 1413, |
| 21260 | INSERTPSrr_VINSERTPSZrr_VINSERTPSrr_MOVHLPSrr_MOVLHPSrr_VMOVHLPSZrr_VMOVHLPSrr_VMOVLHPSZrr_VMOVLHPSrr_MOVDDUPrr_VMOVDDUPrr_VPERMILPDZ128ri_VPERMILPDZ128rik_VPERMILPDZ128rikz_VPERMILPDri_VPERMILPSZ128ri_VPERMILPSZ128rik_VPERMILPSZ128rikz_VPERMILPSri_UNPCKHPDrr_UNPCKHPSrr_UNPCKLPDrr_UNPCKLPSrr_VUNPCKHPDZ128rr_VUNPCKHPDZ128rrk_VUNPCKHPDZ128rrkz_VUNPCKHPDrr_VUNPCKHPSZ128rr_VUNPCKHPSZ128rrk_VUNPCKHPSZ128rrkz_VUNPCKHPSrr_VUNPCKLPDZ128rr_VUNPCKLPDZ128rrk_VUNPCKLPDZ128rrkz_VUNPCKLPDrr_VUNPCKLPSZ128rr_VUNPCKLPSZ128rrk_VUNPCKLPSZ128rrkz_VUNPCKLPSrr = 1414, |
| 21261 | VMOVDDUPYrr_VPERMILPDYri_VPERMILPDZ256ri_VPERMILPDZ256rik_VPERMILPDZ256rikz_VPERMILPSYri_VPERMILPSZ256ri_VPERMILPSZ256rik_VPERMILPSZ256rikz_VUNPCKHPDYrr_VUNPCKHPDZ256rr_VUNPCKHPDZ256rrk_VUNPCKHPDZ256rrkz_VUNPCKHPSYrr_VUNPCKHPSZ256rr_VUNPCKHPSZ256rrk_VUNPCKHPSZ256rrkz_VUNPCKLPDYrr_VUNPCKLPDZ256rr_VUNPCKLPDZ256rrk_VUNPCKLPDZ256rrkz_VUNPCKLPSYrr_VUNPCKLPSZ256rr_VUNPCKLPSZ256rrk_VUNPCKLPSZ256rrkz = 1415, |
| 21262 | VPALIGNRYrri = 1416, |
| 21263 | VPERMILPDrr_VPERMILPSrr = 1417, |
| 21264 | MOVSDrr_MOVSDrr_REV_VMOVSDZrr_VMOVSDZrr_REV_VMOVSDZrrk_VMOVSDZrrk_REV_VMOVSDZrrkz_VMOVSDZrrkz_REV_VMOVSDrr_VMOVSDrr_REV_VMOVSSZrr_VMOVSSZrr_REV_VMOVSSZrrk_VMOVSSZrrk_REV_VMOVSSZrrkz_VMOVSSZrrkz_REV_VMOVSSrr_VMOVSSrr_REV = 1418, |
| 21265 | VPACKSSDWYrr_VPACKSSWBYrr_VPACKUSDWYrr_VPACKUSWBYrr = 1419, |
| 21266 | VPBROADCASTBZ128rm_VPBROADCASTBZ128rmk_VPBROADCASTBZ128rmkz_VPBROADCASTWZ128rm_VPBROADCASTWZ128rmk_VPBROADCASTWZ128rmkz = 1420, |
| 21267 | INSERTPSrm_VINSERTPSZrm_VINSERTPSrm_UNPCKHPDrm_UNPCKHPSrm_UNPCKLPDrm_UNPCKLPSrm_VUNPCKHPDZ128rm_VUNPCKHPDZ128rmb_VUNPCKHPDZ128rmbk_VUNPCKHPDZ128rmbkz_VUNPCKHPDZ128rmk_VUNPCKHPDZ128rmkz_VUNPCKHPDrm_VUNPCKHPSZ128rm_VUNPCKHPSZ128rmb_VUNPCKHPSZ128rmbk_VUNPCKHPSZ128rmbkz_VUNPCKHPSZ128rmk_VUNPCKHPSZ128rmkz_VUNPCKHPSrm_VUNPCKLPDZ128rm_VUNPCKLPDZ128rmb_VUNPCKLPDZ128rmbk_VUNPCKLPDZ128rmbkz_VUNPCKLPDZ128rmk_VUNPCKLPDZ128rmkz_VUNPCKLPDrm_VUNPCKLPSZ128rm_VUNPCKLPSZ128rmb_VUNPCKLPSZ128rmbk_VUNPCKLPSZ128rmbkz_VUNPCKLPSZ128rmk_VUNPCKLPSZ128rmkz_VUNPCKLPSrm = 1421, |
| 21268 | PALIGNRrmi_VPALIGNRZ128rmi_VPALIGNRZ128rmik_VPALIGNRZ128rmikz_VPALIGNRrmi = 1422, |
| 21269 | VPERMILPDZ128mbi_VPERMILPDZ128mbik_VPERMILPDZ128mbikz_VPERMILPDZ128mi_VPERMILPDZ128mik_VPERMILPDZ128mikz_VPERMILPDmi_VPERMILPSZ128mbi_VPERMILPSZ128mbik_VPERMILPSZ128mbikz_VPERMILPSZ128mi_VPERMILPSZ128mik_VPERMILPSZ128mikz_VPERMILPSmi = 1423, |
| 21270 | VPERMILPDZ128rm_VPERMILPDZ128rmb_VPERMILPDZ128rmbk_VPERMILPDZ128rmbkz_VPERMILPDZ128rmk_VPERMILPDZ128rmkz_VPERMILPDrm_VPERMILPSZ128rm_VPERMILPSZ128rmb_VPERMILPSZ128rmbk_VPERMILPSZ128rmbkz_VPERMILPSZ128rmk_VPERMILPSZ128rmkz_VPERMILPSrm = 1424, |
| 21271 | VPALIGNRYrmi_VPALIGNRZ256rmi_VPALIGNRZ256rmik_VPALIGNRZ256rmikz = 1425, |
| 21272 | VPERMILPDYmi_VPERMILPDZ256mbi_VPERMILPDZ256mbik_VPERMILPDZ256mbikz_VPERMILPDZ256mi_VPERMILPDZ256mik_VPERMILPDZ256mikz_VPERMILPSYmi_VPERMILPSZ256mbi_VPERMILPSZ256mbik_VPERMILPSZ256mbikz_VPERMILPSZ256mi_VPERMILPSZ256mik_VPERMILPSZ256mikz = 1426, |
| 21273 | VPERMILPDYrm_VPERMILPDZ256rm_VPERMILPDZ256rmb_VPERMILPDZ256rmbk_VPERMILPDZ256rmbkz_VPERMILPDZ256rmk_VPERMILPDZ256rmkz_VPERMILPSYrm_VPERMILPSZ256rm_VPERMILPSZ256rmb_VPERMILPSZ256rmbk_VPERMILPSZ256rmbkz_VPERMILPSZ256rmk_VPERMILPSZ256rmkz = 1427, |
| 21274 | VUNPCKHPDYrm_VUNPCKHPDZ256rm_VUNPCKHPDZ256rmb_VUNPCKHPDZ256rmbk_VUNPCKHPDZ256rmbkz_VUNPCKHPDZ256rmk_VUNPCKHPDZ256rmkz_VUNPCKHPSYrm_VUNPCKHPSZ256rm_VUNPCKHPSZ256rmb_VUNPCKHPSZ256rmbk_VUNPCKHPSZ256rmbkz_VUNPCKHPSZ256rmk_VUNPCKHPSZ256rmkz_VUNPCKLPDYrm_VUNPCKLPDZ256rm_VUNPCKLPDZ256rmb_VUNPCKLPDZ256rmbk_VUNPCKLPDZ256rmbkz_VUNPCKLPDZ256rmk_VUNPCKLPDZ256rmkz_VUNPCKLPSYrm_VUNPCKLPSZ256rm_VUNPCKLPSZ256rmb_VUNPCKLPSZ256rmbk_VUNPCKLPSZ256rmbkz_VUNPCKLPSZ256rmk_VUNPCKLPSZ256rmkz = 1428, |
| 21275 | PACKSSDWrm_PACKSSWBrm_PACKUSDWrm_PACKUSWBrm_VPACKSSDWZ128rm_VPACKSSDWZ128rmb_VPACKSSDWZ128rmbk_VPACKSSDWZ128rmbkz_VPACKSSDWZ128rmk_VPACKSSDWZ128rmkz_VPACKSSDWrm_VPACKSSWBZ128rm_VPACKSSWBZ128rmk_VPACKSSWBZ128rmkz_VPACKSSWBrm_VPACKUSDWZ128rm_VPACKUSDWZ128rmb_VPACKUSDWZ128rmbk_VPACKUSDWZ128rmbkz_VPACKUSDWZ128rmk_VPACKUSDWZ128rmkz_VPACKUSDWrm_VPACKUSWBZ128rm_VPACKUSWBZ128rmk_VPACKUSWBZ128rmkz_VPACKUSWBrm = 1429, |
| 21276 | VPACKSSDWYrm_VPACKSSDWZ256rm_VPACKSSDWZ256rmb_VPACKSSDWZ256rmbk_VPACKSSDWZ256rmbkz_VPACKSSDWZ256rmk_VPACKSSDWZ256rmkz_VPACKSSWBYrm_VPACKSSWBZ256rm_VPACKSSWBZ256rmk_VPACKSSWBZ256rmkz_VPACKUSDWYrm_VPACKUSDWZ256rm_VPACKUSDWZ256rmb_VPACKUSDWZ256rmbk_VPACKUSDWZ256rmbkz_VPACKUSDWZ256rmk_VPACKUSDWZ256rmkz_VPACKUSWBYrm_VPACKUSWBZ256rm_VPACKUSWBZ256rmk_VPACKUSWBZ256rmkz = 1430, |
| 21277 | VPACKSSDWZrm_VPACKSSDWZrmb_VPACKSSDWZrmbk_VPACKSSDWZrmbkz_VPACKSSDWZrmk_VPACKSSDWZrmkz_VPACKSSWBZrm_VPACKSSWBZrmk_VPACKSSWBZrmkz_VPACKUSDWZrm_VPACKUSDWZrmb_VPACKUSDWZrmbk_VPACKUSDWZrmbkz_VPACKUSDWZrmk_VPACKUSDWZrmkz_VPACKUSWBZrm_VPACKUSWBZrmk_VPACKUSWBZrmkz = 1431, |
| 21278 | AADD64mr_AAND64mr_AOR64mr_AXOR64mr = 1432, |
| 21279 | JMP16m_JMP16m_NT_JMP32m_JMP32m_NT_JMP64m_JMP64m_NT = 1433, |
| 21280 | RET16 = 1434, |
| 21281 | RORX32mi_RORX64mi = 1435, |
| 21282 | ADC16rm_ADC32rm_ADC64rm_ADC8rm_SBB16rm_SBB32rm_SBB64rm_SBB8rm_ADCX32rm_ADCX64rm_ADOX32rm_ADOX64rm = 1436, |
| 21283 | ADC8mi_ADC8mi8_SBB8mi_SBB8mi8 = 1437, |
| 21284 | CMP16mi_CMP32mi_CMP8mi_CMP16mi8_CMP32mi8_CMP64mi8_CMP8mi8 = 1438, |
| 21285 | MOV8rm = 1439, |
| 21286 | POP16rmr_POP32rmr = 1440, |
| 21287 | POP32r = 1441, |
| 21288 | CMP64mi32 = 1442, |
| 21289 | MOV8rm_NOREX = 1443, |
| 21290 | MOVZX16rm8 = 1444, |
| 21291 | ADD16rm_ADD32rm_ADD64rm_ADD8rm_CMP16rm_CMP32rm_CMP64rm_CMP8rm_SUB16rm_SUB32rm_SUB64rm_SUB8rm_AND16rm_AND32rm_AND8rm_OR16rm_OR32rm_OR8rm_XOR16rm_XOR32rm_XOR8rm = 1445, |
| 21292 | CMP16mr_CMP32mr_CMP64mr_CMP8mr = 1446, |
| 21293 | ADD64ri8_SUB64ri8_DEC64r_INC64r = 1447, |
| 21294 | MOV64rr_MOV64rr_REV = 1448, |
| 21295 | JMP_2 = 1449, |
| 21296 | ADD8mi_ADD8mi8_SUB8mi_SUB8mi8 = 1450, |
| 21297 | AND8mi_AND8mi8_OR8mi_OR8mi8_XOR8mi_XOR8mi8 = 1451, |
| 21298 | DEC8m_INC8m_NEG8m_NOT8m = 1452, |
| 21299 | ADD8mr = 1453, |
| 21300 | AND8mr_OR8mr_XOR8mr = 1454, |
| 21301 | SUB8mr = 1455, |
| 21302 | ADDSSrr_ADDSSrr_Int_SUBSSrr_SUBSSrr_Int_VADDSSrr_VADDSSrr_Int_VSUBSSrr_VSUBSSrr_Int = 1456, |
| 21303 | AND16ri8_AND16rr_AND32ri8_AND32rr_AND64ri8_AND64rr_AND8ri8_AND8rr_AND16rr_REV_AND32rr_REV_AND64rr_REV_AND8rr_REV_TEST32i32_TEST64i32_AND32ri_AND8ri_TEST32ri_TEST8ri_AND64ri32_TEST64ri32_TEST8i8_OR16ri8_OR16rr_OR32ri8_OR32rr_OR64ri8_OR64rr_OR8ri8_OR8rr_XOR16ri8_XOR16rr_XOR32ri8_XOR64ri8_XOR8ri8_XOR8rr_OR16rr_REV_OR32rr_REV_OR64rr_REV_OR8rr_REV_XOR16rr_REV_XOR8rr_REV_OR32ri_OR8ri_XOR32ri_XOR8ri_OR64ri32_XOR64ri32_TEST16rr_TEST32rr_TEST64rr_TEST8rr = 1457, |
| 21304 | AND32i32_AND64i32_AND8i8_OR32i32_OR64i32_XOR32i32_XOR64i32_OR8i8_XOR8i8 = 1458, |
| 21305 | XOR32rr_XOR64rr = 1459, |
| 21306 | XOR32rr_REV_XOR64rr_REV = 1460, |
| 21307 | XOR8rr_NOREX = 1461, |
| 21308 | TEST16mi_TEST32mi_TEST8mi = 1462, |
| 21309 | TEST64mi32 = 1463, |
| 21310 | OR64rm_XOR64rm = 1464, |
| 21311 | AND64rm = 1465, |
| 21312 | TEST16mr_TEST32mr_TEST64mr_TEST8mr = 1466, |
| 21313 | ANDN32rm_ANDN64rm = 1467, |
| 21314 | ANDN32rr_ANDN64rr = 1468, |
| 21315 | BT64mr = 1469, |
| 21316 | BT64rr = 1470, |
| 21317 | BTC64rr_BTR64rr_BTS64rr = 1471, |
| 21318 | BTC64mr_BTR64mr_BTS64mr = 1472, |
| 21319 | CALL64m_CALL64m_NT = 1473, |
| 21320 | CALL64r_CALL64r_NT = 1474, |
| 21321 | CDQE_CWDE = 1475, |
| 21322 | MOVSHDUPrr_MOVSLDUPrr_VMOVSHDUPrr_VMOVSLDUPrr_SHUFPDrri_SHUFPSrri_VSHUFPDrri_VSHUFPSrri = 1476, |
| 21323 | VMOVSHDUPYrr_VMOVSLDUPYrr_VSHUFPDYrri_VSHUFPSYrri = 1477, |
| 21324 | VPBLENDWYrri = 1478, |
| 21325 | CLFLUSH = 1479, |
| 21326 | CLTS = 1480, |
| 21327 | MOV16o16a_MOV16o32a_MOV16o64a = 1481, |
| 21328 | CLWB = 1482, |
| 21329 | CVTSD2SIrm_CVTSD2SIrm_Int_CVTTSD2SIrm_CVTTSD2SIrm_Int_VCVTSD2SIrm_VCVTSD2SIrm_Int_VCVTTSD2SIrm = 1483, |
| 21330 | VCVTTSD2SIrm_Int = 1484, |
| 21331 | VCVTSI642SSrm_Int = 1485, |
| 21332 | VCVTSI642SSrm = 1486, |
| 21333 | VCVTSI642SSrr_Int = 1487, |
| 21334 | JECXZ_JRCXZ = 1488, |
| 21335 | ST_Frr = 1489, |
| 21336 | MOV16sr_MOV32sr = 1490, |
| 21337 | DEC16r_alt_SALC = 1491, |
| 21338 | SYSCALL = 1492, |
| 21339 | DEC32r_alt = 1493, |
| 21340 | DIVR_FPrST0_DIVR_FrST0 = 1494, |
| 21341 | DIVSDrm_Int_VDIVSDrm_Int = 1495, |
| 21342 | DIV_FPrST0_DIV_FrST0 = 1496, |
| 21343 | SMSW16m = 1497, |
| 21344 | MMX_PEXTRWrr = 1498, |
| 21345 | MMX_PADDBrr_MMX_PADDDrr_MMX_PADDWrr = 1499, |
| 21346 | GF2P8AFFINEINVQBrmi_GF2P8AFFINEQBrmi_VGF2P8AFFINEINVQBrmi_VGF2P8AFFINEQBrmi = 1500, |
| 21347 | GF2P8MULBrm_VGF2P8MULBrm = 1501, |
| 21348 | VGF2P8AFFINEINVQBYrmi_VGF2P8AFFINEQBYrmi = 1502, |
| 21349 | VGF2P8MULBYrm = 1503, |
| 21350 | GF2P8MULBrr_VGF2P8MULBrr = 1504, |
| 21351 | VGF2P8MULBYrr = 1505, |
| 21352 | IN16ri = 1506, |
| 21353 | IN16rr = 1507, |
| 21354 | IN32ri = 1508, |
| 21355 | IN32rr = 1509, |
| 21356 | INC16r_alt = 1510, |
| 21357 | INC32r_alt = 1511, |
| 21358 | INSB = 1512, |
| 21359 | INSL = 1513, |
| 21360 | INVLPG = 1514, |
| 21361 | JMP64r_REX = 1515, |
| 21362 | JMP_1_JMP_4 = 1516, |
| 21363 | LAR16rm = 1517, |
| 21364 | LAR16rr = 1518, |
| 21365 | LAR32rm = 1519, |
| 21366 | LAR64rm = 1520, |
| 21367 | LEAVE = 1521, |
| 21368 | LGDT64m = 1522, |
| 21369 | LIDT64m = 1523, |
| 21370 | LLDT16m = 1524, |
| 21371 | LLDT16r = 1525, |
| 21372 | LMSW16m = 1526, |
| 21373 | LMSW16r = 1527, |
| 21374 | MMX_MOVD64mr = 1528, |
| 21375 | MMX_MOVD64rm_MMX_MOVQ64rm = 1529, |
| 21376 | MMX_MOVD64to64rm = 1530, |
| 21377 | MMX_MOVFR642Qrr = 1531, |
| 21378 | MMX_PACKSSDWrm_MMX_PACKSSWBrm = 1532, |
| 21379 | MMX_PACKSSDWrr_MMX_PACKSSWBrr = 1533, |
| 21380 | MMX_PINSRWrr = 1534, |
| 21381 | MMX_PADDBrm_MMX_PADDDrm_MMX_PADDWrm_MMX_PSUBBrm_MMX_PSUBDrm_MMX_PSUBWrm = 1535, |
| 21382 | MMX_PINSRWrm = 1536, |
| 21383 | VPALIGNRYrmi = 1537, |
| 21384 | MOV16ao16_MOV16ao32_MOV16ao64 = 1538, |
| 21385 | PUSHFS16_PUSHFS32_PUSHGS16_PUSHGS32 = 1539, |
| 21386 | MOV16ms = 1540, |
| 21387 | MOVBE32mr = 1541, |
| 21388 | MOV16rs_MOV32rs_MOV64rs = 1542, |
| 21389 | SLDT16r = 1543, |
| 21390 | STR16r = 1544, |
| 21391 | MOV32ao16_MOV32ao32_MOV32ao64 = 1545, |
| 21392 | MOV64ao64 = 1546, |
| 21393 | MOV32o16a_MOV32o32a_MOV8o16a_MOV8o32a_MOV32o64a_MOV64o64a_MOV8o64a = 1547, |
| 21394 | MOVZX32rr8_MOVZX64rr8 = 1548, |
| 21395 | MOVZX32rr8_NOREX = 1549, |
| 21396 | MOV64ao32 = 1550, |
| 21397 | MOV64dr = 1551, |
| 21398 | MOV64o32a = 1552, |
| 21399 | MOV64rc = 1553, |
| 21400 | MOV64rd = 1554, |
| 21401 | MOV8ao16_MOV8ao32_MOV8ao64 = 1555, |
| 21402 | MOV8mi_MOV8mr = 1556, |
| 21403 | MOV8mr_NOREX = 1557, |
| 21404 | MOVBE32rm = 1558, |
| 21405 | SLDT16m = 1559, |
| 21406 | STRm = 1560, |
| 21407 | MOVBE64rm = 1561, |
| 21408 | MOVDIR64B16_MOVDIR64B32_MOVDIR64B64 = 1562, |
| 21409 | MOVDIRI32 = 1563, |
| 21410 | MOVDIRI64 = 1564, |
| 21411 | MOVLPDrm_MOVLPSrm_VMOVLPDrm_VMOVLPSrm = 1565, |
| 21412 | SHUFPDrmi_SHUFPSrmi_VSHUFPDrmi_VSHUFPSrmi = 1566, |
| 21413 | MOVNTDQmr = 1567, |
| 21414 | MOVNTImr = 1568, |
| 21415 | MOVSB = 1569, |
| 21416 | MOVSDrr_MOVSDrr_REV_VMOVSDrr_VMOVSDrr_REV_VMOVSSrr_VMOVSSrr_REV = 1570, |
| 21417 | MOVSX16rm16_MOVSX16rm32 = 1571, |
| 21418 | MOVSX32rm16_MOVSX32rm32_MOVSX64rm16_MOVSX64rm32_MOVSX32rm8_MOVSX64rm8 = 1572, |
| 21419 | MOVSX32rm8_NOREX = 1573, |
| 21420 | MOVSX16rr16_MOVSX16rr32 = 1574, |
| 21421 | MOVSX16rr8 = 1575, |
| 21422 | MOVSX32rr16_MOVSX32rr8_MOVSX64rr16_MOVSX64rr8 = 1576, |
| 21423 | MOVSX32rr8_NOREX = 1577, |
| 21424 | MUL_FPrST0_MUL_FrST0 = 1578, |
| 21425 | OUT16ir = 1579, |
| 21426 | OUT16rr = 1580, |
| 21427 | OUT32ir = 1581, |
| 21428 | OUT32rr = 1582, |
| 21429 | OUTSB = 1583, |
| 21430 | OUTSL = 1584, |
| 21431 | PACKSSDWrm_PACKSSWBrm_PACKUSDWrm_PACKUSWBrm_VPACKSSDWrm_VPACKSSWBrm_VPACKUSDWrm_VPACKUSWBrm = 1585, |
| 21432 | PACKSSDWrr_PACKSSWBrr_PACKUSDWrr_PACKUSWBrr_VPACKSSDWrr_VPACKSSWBrr_VPACKUSDWrr_VPACKUSWBrr = 1586, |
| 21433 | PALIGNRrmi_VPALIGNRrmi = 1587, |
| 21434 | PALIGNRrri_VPALIGNRrri = 1588, |
| 21435 | PDEP32rm_PDEP64rm_PEXT32rm_PEXT64rm = 1589, |
| 21436 | PREFETCHIT0_PREFETCHIT1 = 1590, |
| 21437 | PREFETCHT0_PREFETCHT1_PREFETCHT2 = 1591, |
| 21438 | PREFETCHNTA = 1592, |
| 21439 | PTWRITE64m_PTWRITEm = 1593, |
| 21440 | PTWRITE64r = 1594, |
| 21441 | PTWRITEr = 1595, |
| 21442 | PUSH64r = 1596, |
| 21443 | PUSH64rmr = 1597, |
| 21444 | RCL8m1_RCR8m1 = 1598, |
| 21445 | RCL8mi = 1599, |
| 21446 | RCR8mi = 1600, |
| 21447 | RCL8mCL = 1601, |
| 21448 | RCR8mCL = 1602, |
| 21449 | RDPID64 = 1603, |
| 21450 | RDPKRUr = 1604, |
| 21451 | RDRAND16r = 1605, |
| 21452 | RDSEED16r = 1606, |
| 21453 | RDSEED32r_RDSEED64r = 1607, |
| 21454 | REX64_PREFIX = 1608, |
| 21455 | ROL16m1_ROL16mi_ROL32m1_ROL32mi_ROL64m1_ROL64mi_ROR16m1_ROR16mi_ROR32m1_ROR32mi_ROR64m1_ROR64mi = 1609, |
| 21456 | ROL16mCL_ROL32mCL_ROL64mCL_ROR16mCL_ROR32mCL_ROR64mCL = 1610, |
| 21457 | ROL16ri_ROL32ri_ROL64ri_ROL8ri_ROR16ri_ROR32ri_ROR64ri_ROR8ri = 1611, |
| 21458 | ROL8m1_ROL8mi_ROR8m1_ROR8mi = 1612, |
| 21459 | ROL8mCL_ROR8mCL = 1613, |
| 21460 | SHL8mCL_SAR8mCL_SHR8mCL = 1614, |
| 21461 | SAR8m1_SAR8mi_SHR8m1_SHR8mi_SHL8m1_SHL8mi = 1615, |
| 21462 | SARX32rm_SARX64rm_SHRX32rm_SHRX64rm_SHLX32rm_SHLX64rm = 1616, |
| 21463 | SARX32rr_SARX64rr_SHRX32rr_SHRX64rr_SHLX32rr_SHLX64rr = 1617, |
| 21464 | SERIALIZE = 1618, |
| 21465 | SHRD16mri8 = 1619, |
| 21466 | SMSW16r = 1620, |
| 21467 | SMSW32r_SMSW64r = 1621, |
| 21468 | SQRTSDm_Int_VSQRTSDm_Int = 1622, |
| 21469 | STI = 1623, |
| 21470 | STOSB = 1624, |
| 21471 | VBLENDVPDrmr_VBLENDVPSrmr = 1625, |
| 21472 | VPBLENDVBrmr = 1626, |
| 21473 | VBLENDVPDrrr_VBLENDVPSrrr = 1627, |
| 21474 | VPBLENDVBrrr = 1628, |
| 21475 | VERRm = 1629, |
| 21476 | VERRr = 1630, |
| 21477 | VERWr = 1631, |
| 21478 | VHADDPDrr_VHADDPSrr_VHSUBPDrr_VHSUBPSrr = 1632, |
| 21479 | VLDMXCSR = 1633, |
| 21480 | VMOVMSKPDYrr_VMOVMSKPSYrr = 1634, |
| 21481 | VMOVNTDQmr = 1635, |
| 21482 | VMOVNTPDmr = 1636, |
| 21483 | VMOVNTPSYmr = 1637, |
| 21484 | VMOVNTPSmr = 1638, |
| 21485 | VPACKSSDWYrm_VPACKSSWBYrm_VPACKUSDWYrm_VPACKUSWBYrm = 1639, |
| 21486 | VPCLMULQDQYrmi = 1640, |
| 21487 | VSHUFPDYrmi_VSHUFPSYrmi = 1641, |
| 21488 | VPBLENDWYrmi = 1642, |
| 21489 | WRPKRUr = 1643, |
| 21490 | XADD16rm_XADD32rm_XADD64rm = 1644, |
| 21491 | XCHG16rm = 1645, |
| 21492 | XCHG32rm = 1646, |
| 21493 | XRSTOR_XRSTOR64_XRSTORS = 1647, |
| 21494 | XSAVEC = 1648, |
| 21495 | XSAVEC64 = 1649, |
| 21496 | XSAVEOPT = 1650, |
| 21497 | XSAVES = 1651, |
| 21498 | VMOVAPDZrr_VMOVAPDZrr_REV_VMOVAPSZrr_VMOVAPSZrr_REV_VMOVUPDZrr_VMOVUPDZrr_REV_VMOVUPSZrr_VMOVUPSZrr_REV = 1652, |
| 21499 | VMOVDQA32Z256rr_VMOVDQA32Z256rr_REV_VMOVDQA64Z256rr_VMOVDQA64Z256rr_REV_VMOVDQAYrr_VMOVDQAYrr_REV_VMOVDQUYrr_VMOVDQUYrr_REV_VMOVDQU16Z256rr_VMOVDQU16Z256rr_REV_VMOVDQU32Z256rr_VMOVDQU32Z256rr_REV_VMOVDQU64Z256rr_VMOVDQU64Z256rr_REV_VMOVDQU8Z256rr_VMOVDQU8Z256rr_REV = 1653, |
| 21500 | VMOVDQA32Zrr_VMOVDQA32Zrr_REV_VMOVDQA64Zrr_VMOVDQA64Zrr_REV_VMOVDQU16Zrr_VMOVDQU16Zrr_REV_VMOVDQU32Zrr_VMOVDQU32Zrr_REV_VMOVDQU64Zrr_VMOVDQU64Zrr_REV_VMOVDQU8Zrr_VMOVDQU8Zrr_REV = 1654, |
| 21501 | ADDPSrm_SUBPSrm_VADDPSrm_VSUBPSrm_ADDSUBPSrm_VADDSUBPSrm_VADDPSZ128rm_VADDPSZ128rmb_VADDPSZ128rmbk_VADDPSZ128rmk_VADDPSZ128rmkz_VSUBPSZ128rm_VSUBPSZ128rmb_VSUBPSZ128rmbk_VSUBPSZ128rmk_VSUBPSZ128rmkz_VADDPSZ128rmbkz_VSUBPSZ128rmbkz = 1655, |
| 21502 | ADDPSrr_SUBPSrr_VADDPSrr_VSUBPSrr_ADDSUBPSrr_VADDSUBPSrr_VADDPSZ128rr_VADDPSZ128rrk_VSUBPSZ128rr_VSUBPSZ128rrk = 1656, |
| 21503 | VADDPSYrr_VSUBPSYrr_VADDPSZ256rr_VADDPSZ256rrk_VSUBPSZ256rr_VSUBPSZ256rrk = 1657, |
| 21504 | VPMOVSXBWZ128rrk_VPMOVSXBWZ128rrkz_VPMOVZXBWZ128rrk_VPMOVZXBWZ128rrkz = 1658, |
| 21505 | VPSHUFBZ128rrk_VPSHUFBZ128rrkz = 1659, |
| 21506 | VPSHUFBZ256rrk_VPSHUFBZ256rrkz = 1660, |
| 21507 | VPSHUFHWZ128rik_VPSHUFHWZ128rikz_VPSHUFLWZ128rik_VPSHUFLWZ128rikz_VPUNPCKHBWZ128rrk_VPUNPCKHBWZ128rrkz_VPUNPCKHWDZ128rrk_VPUNPCKHWDZ128rrkz_VPUNPCKLBWZ128rrk_VPUNPCKLBWZ128rrkz_VPUNPCKLWDZ128rrk_VPUNPCKLWDZ128rrkz = 1661, |
| 21508 | VPSHUFHWZ256rik_VPSHUFHWZ256rikz_VPSHUFLWZ256rik_VPSHUFLWZ256rikz_VPUNPCKHBWZ256rrk_VPUNPCKHBWZ256rrkz_VPUNPCKHWDZ256rrk_VPUNPCKHWDZ256rrkz_VPUNPCKLBWZ256rrk_VPUNPCKLBWZ256rrkz_VPUNPCKLWDZ256rrk_VPUNPCKLWDZ256rrkz = 1662, |
| 21509 | VADDSUBPSYrr = 1663, |
| 21510 | VPOPCNTBZ128rm_VPOPCNTDZ128rm_VPOPCNTQZ128rm_VPOPCNTWZ128rm_VPOPCNTDZ128rmb_VPOPCNTDZ128rmk_VPOPCNTDZ128rmkz_VPOPCNTQZ128rmb_VPOPCNTQZ128rmk_VPOPCNTQZ128rmkz_VPOPCNTDZ128rmbk_VPOPCNTDZ128rmbkz_VPOPCNTQZ128rmbk_VPOPCNTQZ128rmbkz = 1664, |
| 21511 | VFPCLASSPDZ128rmb_VFPCLASSPSZ128rmb = 1665, |
| 21512 | VFPCLASSPHZ128rmb = 1666, |
| 21513 | VPACKSSDWZ128rm_VPACKSSWBZ128rm_VPACKUSDWZ128rm_VPACKUSWBZ128rm_VPACKSSDWZ128rmb_VPACKUSDWZ128rmb = 1667, |
| 21514 | VPMULTISHIFTQBZ128rm_VPMULTISHIFTQBZ128rmb = 1668, |
| 21515 | VFPCLASSPHZ128rm = 1669, |
| 21516 | VFPCLASSPDZ256rm_VFPCLASSPSZ256rm = 1670, |
| 21517 | VFPCLASSPDZrm_VFPCLASSPSZrm = 1671, |
| 21518 | VFPCLASSPHZ256rm = 1672, |
| 21519 | VFPCLASSPHZrm = 1673, |
| 21520 | VPERMBZ128rm = 1674, |
| 21521 | VPEXPANDBZ128rmk_VPEXPANDBZ128rmkz_VPEXPANDBZ256rmk_VPEXPANDBZ256rmkz_VPEXPANDWZ128rmk_VPEXPANDWZ128rmkz_VPEXPANDWZ256rmk_VPEXPANDWZ256rmkz_VPEXPANDBZrmk_VPEXPANDBZrmkz_VPEXPANDWZrmk_VPEXPANDWZrmkz = 1675, |
| 21522 | ADD_FPrST0_ADD_FrST0_SUBR_FPrST0_SUBR_FrST0_SUB_FPrST0_SUB_FrST0_SUBR_FST0r_SUB_FST0r = 1676, |
| 21523 | KMOVBkr_KMOVDkr_KMOVWkr = 1677, |
| 21524 | VCMPPHZ128rri_VCMPPHZ128rrik_VFPCLASSPHZ128rr_VFPCLASSPHZ128rrk = 1678, |
| 21525 | VCMPPHZ256rri_VCMPPHZ256rrik_VFPCLASSPHZ256rr_VFPCLASSPHZ256rrk = 1679, |
| 21526 | VCMPSDZrri_VCMPSSZrri_VCMPSDZrri_Int_VCMPSDZrri_Intk_VCMPSSZrri_Int_VCMPSSZrri_Intk_VFPCLASSSDZrr_VFPCLASSSDZrrk_VFPCLASSSSZrr_VFPCLASSSSZrrk = 1680, |
| 21527 | VCMPSHZrri_VCMPSHZrri_Int_VCMPSHZrri_Intk_VFPCLASSSHZrr_VFPCLASSSHZrrk = 1681, |
| 21528 | VPACKSSDWZ128rr_VPACKSSWBZ128rr_VPACKUSDWZ128rr_VPACKUSWBZ128rr = 1682, |
| 21529 | VPACKSSDWZ256rr_VPACKSSWBZ256rr_VPACKUSDWZ256rr_VPACKUSWBZ256rr = 1683, |
| 21530 | VPALIGNRZ128rrik_VPALIGNRZ128rrikz = 1684, |
| 21531 | VPALIGNRZ256rrik_VPALIGNRZ256rrikz = 1685, |
| 21532 | VPBROADCASTBZ128rrk_VPBROADCASTBZ128rrkz_VPBROADCASTWZ128rrk_VPBROADCASTWZ128rrkz = 1686, |
| 21533 | VPERMBZ128rr = 1687, |
| 21534 | VPERMBZ256rr_VPERMDZ256rr_VPERMDZ256rrk_VPERMDZ256rrkz_VPERMQZ256rr_VPERMQZ256rrk_VPERMQZ256rrkz_VPERMI2DZ256rr_VPERMI2DZ256rrk_VPERMI2DZ256rrkz_VPERMI2QZ256rr_VPERMI2QZ256rrk_VPERMI2QZ256rrkz_VPERMT2DZ256rr_VPERMT2DZ256rrk_VPERMT2DZ256rrkz_VPERMT2QZ256rr_VPERMT2QZ256rrk_VPERMT2QZ256rrkz = 1688, |
| 21535 | VPERMBZrr_VPERMDZrr_VPERMDZrrk_VPERMDZrrkz_VPERMI2DZrr_VPERMI2DZrrk_VPERMI2DZrrkz_VPERMI2QZrr_VPERMI2QZrrk_VPERMI2QZrrkz_VPERMT2DZrr_VPERMT2DZrrk_VPERMT2DZrrkz_VPERMT2QZrr_VPERMT2QZrrk_VPERMT2QZrrkz = 1689, |
| 21536 | VPERMQZrr_VPERMQZrrk_VPERMQZrrkz = 1690, |
| 21537 | VPERMI2DZ128rr_VPERMI2DZ128rrk_VPERMI2DZ128rrkz_VPERMI2QZ128rr_VPERMI2QZ128rrk_VPERMI2QZ128rrkz_VPERMT2DZ128rr_VPERMT2DZ128rrk_VPERMT2DZ128rrkz_VPERMT2QZ128rr_VPERMT2QZ128rrk_VPERMT2QZ128rrkz = 1691, |
| 21538 | VPMULTISHIFTQBZ128rr = 1692, |
| 21539 | VPMULTISHIFTQBZ256rr_VPOPCNTBZ256rr_VPOPCNTDZ256rr_VPOPCNTQZ256rr_VPOPCNTWZ256rr_VPOPCNTDZ256rrk_VPOPCNTDZ256rrkz_VPOPCNTQZ256rrk_VPOPCNTQZ256rrkz = 1693, |
| 21540 | VPOPCNTBZ128rr_VPOPCNTDZ128rr_VPOPCNTQZ128rr_VPOPCNTWZ128rr_VPOPCNTDZ128rrk_VPOPCNTDZ128rrkz_VPOPCNTQZ128rrk_VPOPCNTQZ128rrkz = 1694, |
| 21541 | VMOVSHDUPZ128rr_VMOVSHDUPZ128rrk_VMOVSHDUPZ128rrkz_VMOVSLDUPZ128rr_VMOVSLDUPZ128rrk_VMOVSLDUPZ128rrkz_VSHUFPDZ128rri_VSHUFPDZ128rrik_VSHUFPDZ128rrikz_VSHUFPSZ128rri_VSHUFPSZ128rrik_VSHUFPSZ128rrikz = 1695, |
| 21542 | VMOVSHDUPZ256rr_VMOVSHDUPZ256rrk_VMOVSHDUPZ256rrkz_VMOVSLDUPZ256rr_VMOVSLDUPZ256rrk_VMOVSLDUPZ256rrkz_VSHUFPDZ256rri_VSHUFPDZ256rrik_VSHUFPDZ256rrikz_VSHUFPSZ256rri_VSHUFPSZ256rrik_VSHUFPSZ256rrikz = 1696, |
| 21543 | VPMOVQDZ128rr_VPMOVQDZ128rrk_VPMOVQDZ128rrkz = 1697, |
| 21544 | VCVTPD2DQZ128rm_VCVTPD2DQZ128rmb_VCVTPD2DQZ128rmbk_VCVTPD2DQZ128rmk_VCVTPD2DQZ128rmkz_VCVTPD2UDQZ128rm_VCVTPD2UDQZ128rmb_VCVTPD2UDQZ128rmbk_VCVTPD2UDQZ128rmk_VCVTPD2UDQZ128rmkz_VCVTTPD2DQZ128rm_VCVTTPD2DQZ128rmb_VCVTTPD2DQZ128rmbk_VCVTTPD2DQZ128rmk_VCVTTPD2DQZ128rmkz_VCVTTPD2UDQZ128rm_VCVTTPD2UDQZ128rmb_VCVTTPD2UDQZ128rmbk_VCVTTPD2UDQZ128rmk_VCVTTPD2UDQZ128rmkz_VCVTPD2DQZ128rmbkz_VCVTPD2UDQZ128rmbkz_VCVTTPD2DQZ128rmbkz_VCVTTPD2UDQZ128rmbkz = 1698, |
| 21545 | VCVTPH2PSXZ128rm_VCVTPH2PSXZ128rmb = 1699, |
| 21546 | VCVTQQ2PSZ128rm_VCVTQQ2PSZ128rmb_VCVTQQ2PSZ128rmbk_VCVTQQ2PSZ128rmk_VCVTQQ2PSZ128rmkz_VCVTUQQ2PSZ128rm_VCVTUQQ2PSZ128rmb_VCVTUQQ2PSZ128rmbk_VCVTUQQ2PSZ128rmk_VCVTUQQ2PSZ128rmkz_VCVTQQ2PSZ128rmbkz_VCVTUQQ2PSZ128rmbkz = 1700, |
| 21547 | VCVTSI642SSZrm_VCVTSI642SSZrm_Int_VCVTUSI642SSZrm_VCVTUSI642SSZrm_Int = 1701, |
| 21548 | VCVTSD2SIZrm_VCVTTSD2SIZrm_VCVTSD2SIZrm_Int_VCVTTSD2SIZrm_Int = 1702, |
| 21549 | VCVTSD2USIZrm_Int_VCVTTSD2USIZrm_Int = 1703, |
| 21550 | CVTSI2SSrr_Int_VCVTSI2SSrr_Int_VCVTSI2SSZrr_VCVTUSI2SSZrr_VCVTSI2SSZrr_Int_VCVTSI2SSZrrb_Int_VCVTUSI2SSZrr_Int_VCVTUSI2SSZrrb_Int = 1704, |
| 21551 | VCVTSS2SI64Zrr_VCVTTSS2SI64Zrr_VCVTSS2SI64Zrr_Int_VCVTSS2SI64Zrrb_Int_VCVTSS2USI64Zrr_Int_VCVTSS2USI64Zrrb_Int_VCVTTSS2SI64Zrr_Int_VCVTTSS2SI64Zrrb_Int_VCVTTSS2USI64Zrr_Int_VCVTTSS2USI64Zrrb_Int = 1705, |
| 21552 | DIVSDrm_VDIVSDrm = 1706, |
| 21553 | VDIVSDZrm = 1707, |
| 21554 | VSQRTSHZm_Int_VSQRTSHZm_Intk_VSQRTSHZm_Intkz = 1708, |
| 21555 | VSQRTSHZm = 1709, |
| 21556 | ENQCMD16_ENQCMD32_ENQCMD64_ENQCMDS16_ENQCMDS32_ENQCMDS64 = 1710, |
| 21557 | VPMOVQDZ256mr_VPMOVQDZmr = 1711, |
| 21558 | VEXTRACTPSZmr = 1712, |
| 21559 | VEXTRACTPSZrr = 1713, |
| 21560 | VPERMWZrr = 1714, |
| 21561 | VPEXPANDBZ256rm_VPEXPANDBZrm_VPEXPANDWZ256rm_VPEXPANDWZrm = 1715, |
| 21562 | VPADDBZrr_VPADDDZrr_VPADDQZrr_VPADDWZrr_VPADDDZrrk_VPADDDZrrkz_VPADDQZrrk_VPADDQZrrkz_VPSUBDZrrk_VPSUBDZrrkz_VPSUBQZrrk_VPSUBQZrrkz_VPTERNLOGDZrri_VPTERNLOGDZrrik_VPTERNLOGDZrrikz_VPTERNLOGQZrri_VPTERNLOGQZrrik_VPTERNLOGQZrrikz = 1716, |
| 21563 | VPLZCNTDZ256rm_VPLZCNTDZ256rmb_VPLZCNTDZ256rmbk_VPLZCNTDZ256rmk_VPLZCNTDZ256rmkz_VPLZCNTQZ256rm_VPLZCNTQZ256rmb_VPLZCNTQZ256rmbk_VPLZCNTQZ256rmk_VPLZCNTQZ256rmkz_VPLZCNTDZ256rmbkz_VPLZCNTQZ256rmbkz = 1717, |
| 21564 | VADDPHZ128rm_VADDPHZ128rmb_VADDPHZ128rmbk_VADDPHZ128rmk_VADDPHZ128rmkz_VSUBPHZ128rm_VSUBPHZ128rmb_VSUBPHZ128rmbk_VSUBPHZ128rmk_VSUBPHZ128rmkz_VADDPHZ128rmbkz_VSUBPHZ128rmbkz = 1718, |
| 21565 | VGETEXPPHZ128m_VGETEXPPHZ128mb_VGETEXPPHZ128mbk_VGETEXPPHZ128mk_VGETEXPPHZ128mkz_VGETEXPSHZm_VGETEXPSHZmk_VGETEXPSHZmkz_VGETMANTPHZ128rmbi_VGETMANTPHZ128rmik_VGETMANTPHZ128rmbik_VGETMANTPHZ128rmbikz_VGETMANTPHZ128rmi_VGETMANTPHZ128rmikz_VGETMANTSHZrmi_VGETMANTSHZrmik_VGETMANTSHZrmikz = 1719, |
| 21566 | VGF2P8AFFINEINVQBZ128rmbi_VGF2P8AFFINEINVQBZ128rmi_VGF2P8AFFINEQBZ128rmbi_VGF2P8AFFINEQBZ128rmi = 1720, |
| 21567 | VMAXCPHZ128rm_VMAXCPHZ128rmb_VMAXCPHZ128rmbk_VMAXCPHZ128rmk_VMAXCPHZ128rmkz_VMINCPHZ128rm_VMINCPHZ128rmb_VMINCPHZ128rmbk_VMINCPHZ128rmk_VMINCPHZ128rmkz_VMAXCPHZ128rmbkz_VMINCPHZ128rmbkz_VMAXPHZ128rm_VMAXPHZ128rmb_VMAXPHZ128rmbk_VMAXPHZ128rmk_VMAXPHZ128rmkz_VMINPHZ128rm_VMINPHZ128rmb_VMINPHZ128rmbk_VMINPHZ128rmk_VMINPHZ128rmkz_VMAXPHZ128rmbkz_VMINPHZ128rmbkz = 1721, |
| 21568 | VMULPHZ128rm_VMULPHZ128rmb_VMULPHZ128rmbk_VMULPHZ128rmk_VMULPHZ128rmkz_VMULPHZ128rmbkz = 1722, |
| 21569 | VGETEXPPHZ128mbkz = 1723, |
| 21570 | VGF2P8MULBZ128rm = 1724, |
| 21571 | VADDSHZrm_VSUBSHZrm_VADDSHZrm_Int_VADDSHZrm_Intk_VADDSHZrm_Intkz_VSUBSHZrm_Int_VSUBSHZrm_Intk_VSUBSHZrm_Intkz = 1725, |
| 21572 | VCVTSH2SSZrm_VCVTSH2SSZrm_Int = 1726, |
| 21573 | VMAXCSHZrm_VMINCSHZrm_VMAXSHZrm_VMINSHZrm_VMAXSHZrm_Int_VMAXSHZrm_Intk_VMAXSHZrm_Intkz_VMINSHZrm_Int_VMINSHZrm_Intk_VMINSHZrm_Intkz = 1727, |
| 21574 | VMULSHZrm_VMULSHZrm_Int_VMULSHZrm_Intk_VMULSHZrm_Intkz = 1728, |
| 21575 | VGF2P8AFFINEINVQBZ256rmbi_VGF2P8AFFINEINVQBZ256rmi_VGF2P8AFFINEQBZ256rmbi_VGF2P8AFFINEQBZ256rmi = 1729, |
| 21576 | VGF2P8MULBZ256rm = 1730, |
| 21577 | VFMADD132PHZ128m_VFMADD132PHZ128mb_VFMADD132PHZ128mbk_VFMADD132PHZ128mk_VFMADD132PHZ128mkz_VFMADD213PHZ128m_VFMADD213PHZ128mb_VFMADD213PHZ128mbk_VFMADD213PHZ128mk_VFMADD213PHZ128mkz_VFMADD231PHZ128m_VFMADD231PHZ128mb_VFMADD231PHZ128mbk_VFMADD231PHZ128mk_VFMADD231PHZ128mkz_VFMSUB132PHZ128m_VFMSUB132PHZ128mb_VFMSUB132PHZ128mbk_VFMSUB132PHZ128mk_VFMSUB132PHZ128mkz_VFMSUB213PHZ128m_VFMSUB213PHZ128mb_VFMSUB213PHZ128mbk_VFMSUB213PHZ128mk_VFMSUB213PHZ128mkz_VFMSUB231PHZ128m_VFMSUB231PHZ128mb_VFMSUB231PHZ128mbk_VFMSUB231PHZ128mk_VFMSUB231PHZ128mkz_VFNMADD132PHZ128m_VFNMADD132PHZ128mb_VFNMADD132PHZ128mbk_VFNMADD132PHZ128mk_VFNMADD132PHZ128mkz_VFNMADD213PHZ128m_VFNMADD213PHZ128mb_VFNMADD213PHZ128mbk_VFNMADD213PHZ128mk_VFNMADD213PHZ128mkz_VFNMADD231PHZ128m_VFNMADD231PHZ128mb_VFNMADD231PHZ128mbk_VFNMADD231PHZ128mk_VFNMADD231PHZ128mkz_VFNMSUB132PHZ128m_VFNMSUB132PHZ128mb_VFNMSUB132PHZ128mbk_VFNMSUB132PHZ128mk_VFNMSUB132PHZ128mkz_VFNMSUB213PHZ128m_VFNMSUB213PHZ128mb_VFNMSUB213PHZ128mbk_VFNMSUB213PHZ128mk_VFNMSUB213PHZ128mkz_VFNMSUB231PHZ128m_VFNMSUB231PHZ128mb_VFNMSUB231PHZ128mbk_VFNMSUB231PHZ128mk_VFNMSUB231PHZ128mkz_VFMADD132PHZ128mbkz_VFMADD213PHZ128mbkz_VFMADD231PHZ128mbkz_VFMSUB132PHZ128mbkz_VFMSUB213PHZ128mbkz_VFMSUB231PHZ128mbkz_VFNMADD132PHZ128mbkz_VFNMADD213PHZ128mbkz_VFNMADD231PHZ128mbkz_VFNMSUB132PHZ128mbkz_VFNMSUB213PHZ128mbkz_VFNMSUB231PHZ128mbkz_VFMADDSUB132PHZ128m_VFMADDSUB132PHZ128mb_VFMADDSUB132PHZ128mbk_VFMADDSUB132PHZ128mk_VFMADDSUB132PHZ128mkz_VFMADDSUB213PHZ128m_VFMADDSUB213PHZ128mb_VFMADDSUB213PHZ128mbk_VFMADDSUB213PHZ128mk_VFMADDSUB213PHZ128mkz_VFMADDSUB231PHZ128m_VFMADDSUB231PHZ128mb_VFMADDSUB231PHZ128mbk_VFMADDSUB231PHZ128mk_VFMADDSUB231PHZ128mkz_VFMADDSUB132PHZ128mbkz_VFMADDSUB213PHZ128mbkz_VFMADDSUB231PHZ128mbkz_VFMSUBADD132PHZ128m_VFMSUBADD132PHZ128mb_VFMSUBADD132PHZ128mbk_VFMSUBADD132PHZ128mk_VFMSUBADD132PHZ128mkz_VFMSUBADD213PHZ128m_VFMSUBADD213PHZ128mb_VFMSUBADD213PHZ128mbk_VFMSUBADD213PHZ128mk_VFMSUBADD213PHZ128mkz_VFMSUBADD231PHZ128m_VFMSUBADD231PHZ128mb_VFMSUBADD231PHZ128mbk_VFMSUBADD231PHZ128mk_VFMSUBADD231PHZ128mkz_VFMSUBADD132PHZ128mbkz_VFMSUBADD213PHZ128mbkz_VFMSUBADD231PHZ128mbkz = 1731, |
| 21578 | VFMADD132SHZm_VFMADD213SHZm_VFMADD231SHZm_VFMSUB132SHZm_VFMSUB213SHZm_VFMSUB231SHZm_VFNMADD132SHZm_VFNMADD213SHZm_VFNMADD231SHZm_VFNMSUB132SHZm_VFNMSUB213SHZm_VFNMSUB231SHZm_VFMADD132SHZm_Int_VFMADD132SHZm_Intk_VFMADD132SHZm_Intkz_VFMADD213SHZm_Int_VFMADD213SHZm_Intk_VFMADD213SHZm_Intkz_VFMADD231SHZm_Int_VFMADD231SHZm_Intk_VFMADD231SHZm_Intkz_VFMSUB132SHZm_Int_VFMSUB132SHZm_Intk_VFMSUB132SHZm_Intkz_VFMSUB213SHZm_Int_VFMSUB213SHZm_Intk_VFMSUB213SHZm_Intkz_VFMSUB231SHZm_Int_VFMSUB231SHZm_Intk_VFMSUB231SHZm_Intkz_VFNMADD132SHZm_Int_VFNMADD132SHZm_Intk_VFNMADD132SHZm_Intkz_VFNMADD213SHZm_Int_VFNMADD213SHZm_Intk_VFNMADD213SHZm_Intkz_VFNMADD231SHZm_Int_VFNMADD231SHZm_Intk_VFNMADD231SHZm_Intkz_VFNMSUB132SHZm_Int_VFNMSUB132SHZm_Intk_VFNMSUB132SHZm_Intkz_VFNMSUB213SHZm_Int_VFNMSUB213SHZm_Intk_VFNMSUB213SHZm_Intkz_VFNMSUB231SHZm_Int_VFNMSUB231SHZm_Intk_VFNMSUB231SHZm_Intkz = 1732, |
| 21579 | VPMADD52HUQZ256m_VPMADD52HUQZ256mb_VPMADD52HUQZ256mbk_VPMADD52HUQZ256mk_VPMADD52HUQZ256mkz_VPMADD52LUQZ256m_VPMADD52LUQZ256mb_VPMADD52LUQZ256mbk_VPMADD52LUQZ256mk_VPMADD52LUQZ256mkz_VPMADD52HUQZ256mbkz_VPMADD52LUQZ256mbkz = 1733, |
| 21580 | VADDPHZ128rr_VSUBPHZ128rr = 1734, |
| 21581 | VADDPHZ256rr_VSUBPHZ256rr = 1735, |
| 21582 | VADDSHZrr_VSUBSHZrr_VADDSHZrr_Int_VADDSHZrrb_Int_VSUBSHZrr_Int_VSUBSHZrrb_Int = 1736, |
| 21583 | VCVTPH2UWZ128rr_VCVTPH2WZ128rr_VCVTTPH2UWZ128rr_VCVTTPH2WZ128rr_VCVTUW2PHZ128rr_VCVTW2PHZ128rr = 1737, |
| 21584 | VCVTPH2UWZ256rr_VCVTPH2WZ256rr_VCVTTPH2UWZ256rr_VCVTTPH2WZ256rr_VCVTUW2PHZ256rr_VCVTW2PHZ256rr = 1738, |
| 21585 | VCVTSH2SSZrr_Int_VCVTSH2SSZrrb_Int = 1739, |
| 21586 | VFMADD132PHZ128r_VFMADD213PHZ128r_VFMADD231PHZ128r_VFMSUB132PHZ128r_VFMSUB213PHZ128r_VFMSUB231PHZ128r_VFNMADD132PHZ128r_VFNMADD213PHZ128r_VFNMADD231PHZ128r_VFNMSUB132PHZ128r_VFNMSUB213PHZ128r_VFNMSUB231PHZ128r_VFMADDSUB132PHZ128r_VFMADDSUB213PHZ128r_VFMADDSUB231PHZ128r_VFMSUBADD132PHZ128r_VFMSUBADD213PHZ128r_VFMSUBADD231PHZ128r = 1740, |
| 21587 | VFMADD132PHZ256r_VFMADD213PHZ256r_VFMADD231PHZ256r_VFMSUB132PHZ256r_VFMSUB213PHZ256r_VFMSUB231PHZ256r_VFNMADD132PHZ256r_VFNMADD213PHZ256r_VFNMADD231PHZ256r_VFNMSUB132PHZ256r_VFNMSUB213PHZ256r_VFNMSUB231PHZ256r_VFMADDSUB132PHZ256r_VFMADDSUB213PHZ256r_VFMADDSUB231PHZ256r_VFMSUBADD132PHZ256r_VFMSUBADD213PHZ256r_VFMSUBADD231PHZ256r = 1741, |
| 21588 | VFMADD132SHZr_VFMADD132SHZr_Int_VFMADD132SHZrb_VFMADD132SHZrb_Int_VFMADD213SHZr_VFMADD213SHZr_Int_VFMADD213SHZrb_VFMADD213SHZrb_Int_VFMADD231SHZr_VFMADD231SHZr_Int_VFMADD231SHZrb_VFMADD231SHZrb_Int_VFMSUB132SHZr_VFMSUB132SHZr_Int_VFMSUB132SHZrb_VFMSUB132SHZrb_Int_VFMSUB213SHZr_VFMSUB213SHZr_Int_VFMSUB213SHZrb_VFMSUB213SHZrb_Int_VFMSUB231SHZr_VFMSUB231SHZr_Int_VFMSUB231SHZrb_VFMSUB231SHZrb_Int_VFNMADD132SHZr_VFNMADD132SHZr_Int_VFNMADD132SHZrb_VFNMADD132SHZrb_Int_VFNMADD213SHZr_VFNMADD213SHZr_Int_VFNMADD213SHZrb_VFNMADD213SHZrb_Int_VFNMADD231SHZr_VFNMADD231SHZr_Int_VFNMADD231SHZrb_VFNMADD231SHZrb_Int_VFNMSUB132SHZr_VFNMSUB132SHZr_Int_VFNMSUB132SHZrb_VFNMSUB132SHZrb_Int_VFNMSUB213SHZr_VFNMSUB213SHZr_Int_VFNMSUB213SHZrb_VFNMSUB213SHZrb_Int_VFNMSUB231SHZr_VFNMSUB231SHZr_Int_VFNMSUB231SHZrb_VFNMSUB231SHZrb_Int = 1742, |
| 21589 | VGETEXPPHZ128r_VGETEXPSHZr_VGETEXPSHZrb_VGETMANTPHZ128rri_VGETMANTSHZrri_VGETMANTSHZrrib = 1743, |
| 21590 | VGETEXPPHZ256r_VGETMANTPHZ256rri = 1744, |
| 21591 | VGF2P8MULBZ128rr = 1745, |
| 21592 | VGF2P8MULBZ256rr = 1746, |
| 21593 | VMAXCPHZ128rr_VMINCPHZ128rr_VMAXPHZ128rr_VMINPHZ128rr = 1747, |
| 21594 | VMAXCPHZ256rr_VMINCPHZ256rr_VMAXPHZ256rr_VMINPHZ256rr = 1748, |
| 21595 | VMAXCSHZrr_VMINCSHZrr_VMAXSHZrr_VMINSHZrr_VMAXSHZrr_Int_VMAXSHZrrb_Int_VMINSHZrr_Int_VMINSHZrrb_Int = 1749, |
| 21596 | VMULPHZ128rr = 1750, |
| 21597 | VMULPHZ256rr = 1751, |
| 21598 | VMULSHZrr_VMULSHZrr_Int_VMULSHZrrb_Int = 1752, |
| 21599 | VCVTSH2SSZrr = 1753, |
| 21600 | VBROADCASTSSZ128rm = 1754, |
| 21601 | VMOVDDUPZ128rm_VMOVSHDUPZ128rm_VMOVSLDUPZ128rm = 1755, |
| 21602 | VPBROADCASTDZ128rm_VPBROADCASTQZ128rm = 1756, |
| 21603 | VBROADCASTI32X2Z128rm = 1757, |
| 21604 | KANDBrr_KANDDrr_KANDNDrr_KANDNQrr_KANDNWrr_KANDQrr_KANDWrr_KNOTBrr_KNOTDrr_KNOTQrr_KNOTWrr_KORBrr_KORDrr_KORQrr_KORWrr_KXNORBrr_KXNORDrr_KXNORQrr_KXNORWrr_KXORBrr_KXORDrr_KXORQrr_KXORWrr = 1758, |
| 21605 | VPABSBZrr_VPSUBSBZrr_VPABSDZrr_VPABSQZrr_VPABSWZrr_VPABSDZrrk_VPABSDZrrkz_VPABSQZrrk_VPABSQZrrkz_VPADDSBZrr_VPADDSWZrr_VPADDUSBZrr_VPADDUSWZrr_VPAVGBZrr_VPAVGWZrr_VPMAXSBZrr_VPMAXUDZrr_VPMAXUWZrr_VPMINSBZrr_VPMINUDZrr_VPMINUWZrr_VPMAXSDZrr_VPMAXUBZrr_VPMINSDZrr_VPMINUBZrr_VPMAXSDZrrk_VPMAXSDZrrkz_VPMAXUDZrrk_VPMAXUDZrrkz_VPMINSDZrrk_VPMINSDZrrkz_VPMINUDZrrk_VPMINUDZrrkz_VPMAXSWZrr_VPMINSWZrr_VPSUBSWZrr_VPSUBUSWZrr = 1759, |
| 21606 | VPSHLDDZrri_VPSHLDQZrri_VPSHLDWZrri_VPSHRDDZrri_VPSHRDQZrri_VPSHRDWZrri_VPSHLDVDZrk_VPSHLDVDZrkz_VPSHLDVQZrk_VPSHLDVQZrkz_VPSHRDVDZrk_VPSHRDVDZrkz_VPSHRDVQZrk_VPSHRDVQZrkz = 1760, |
| 21607 | VPSHLDVDZr_VPSHLDVQZr_VPSHLDVWZr_VPSHRDVDZr_VPSHRDVQZr_VPSHRDVWZr = 1761, |
| 21608 | VPSUBUSBZrr = 1762, |
| 21609 | KMOVBkm_KMOVDkm_KMOVQkm_KMOVWkm = 1763, |
| 21610 | KMOVBmk = 1764, |
| 21611 | VBROADCASTSSZ128rr_VBROADCASTSSZ128rrk_VBROADCASTSSZ128rrkz = 1765, |
| 21612 | VPALIGNRZrri = 1766, |
| 21613 | VPSHUFDZri_VPSHUFHWZri_VPSHUFLWZri_VPSHUFDZrik_VPSHUFDZrikz_VPUNPCKHBWZrr_VPUNPCKHWDZrr_VPUNPCKLBWZrr_VPUNPCKLWDZrr_VPUNPCKHDQZrr_VPUNPCKHDQZrrk_VPUNPCKHDQZrrkz_VPUNPCKLDQZrr_VPUNPCKLDQZrrk_VPUNPCKLDQZrrkz_VPUNPCKLQDQZrr_VPUNPCKLQDQZrrk_VPUNPCKLQDQZrrkz_VPUNPCKHQDQZrr_VPUNPCKHQDQZrrk_VPUNPCKHQDQZrrkz = 1767, |
| 21614 | VPSHUFBZrr = 1768, |
| 21615 | VPABSBZrrk_VPABSBZrrkz_VPABSWZrrk_VPABSWZrrkz_VPSUBSBZrrk_VPSUBSBZrrkz_VPSUBSWZrrk_VPSUBSWZrrkz_VPADDSBZrrk_VPADDSBZrrkz_VPADDSWZrrk_VPADDSWZrrkz_VPADDUSBZrrk_VPADDUSBZrrkz_VPADDUSWZrrk_VPADDUSWZrrkz_VPAVGBZrrk_VPAVGBZrrkz_VPAVGWZrrk_VPAVGWZrrkz_VPMAXSBZrrk_VPMAXSBZrrkz_VPMAXUWZrrk_VPMAXUWZrrkz_VPMINSBZrrk_VPMINSBZrrkz_VPMINUWZrrk_VPMINUWZrrkz_VPMAXSWZrrk_VPMAXSWZrrkz_VPMAXUBZrrk_VPMAXUBZrrkz_VPMINSWZrrk_VPMINSWZrrkz_VPMINUBZrrk_VPMINUBZrrkz_VPSUBUSBZrrk_VPSUBUSBZrrkz_VPSUBUSWZrrk_VPSUBUSWZrrkz = 1769, |
| 21616 | VPSHLDVWZrk_VPSHLDVWZrkz_VPSHRDVWZrk_VPSHRDVWZrkz = 1770, |
| 21617 | VPSLLVWZrrk_VPSLLVWZrrkz_VPSRLVWZrrk_VPSRLVWZrrkz_VPSRAVWZrrk_VPSRAVWZrrkz = 1771, |
| 21618 | VPSLLWZrik_VPSLLWZrikz_VPSRLWZrik_VPSRLWZrikz_VPSRAWZrik_VPSRAWZrikz = 1772, |
| 21619 | VMOVSDto64Zrr = 1773, |
| 21620 | VCVTPH2DQZ128rr_VCVTPH2UDQZ128rr_VCVTTPH2DQZ128rr_VCVTTPH2UDQZ128rr = 1774, |
| 21621 | VCVTPH2DQZ256rr_VCVTPH2UDQZ256rr_VCVTTPH2DQZ256rr_VCVTTPH2UDQZ256rr = 1775, |
| 21622 | VCVTPH2PSXZ256rr = 1776, |
| 21623 | VCVTPS2PHXZ256rr = 1777, |
| 21624 | VCVTPH2PSXZ128rr = 1778, |
| 21625 | VCVTPS2PHXZ128rr = 1779, |
| 21626 | VPERMWZ128rrk_VPERMWZ128rrkz = 1780, |
| 21627 | VPERMWZ256rrk_VPERMWZ256rrkz = 1781, |
| 21628 | VPSLLWZ256rrk_VPSLLWZ256rrkz_VPSRLWZ256rrk_VPSRLWZ256rrkz_VPSRAWZ256rrk_VPSRAWZ256rrkz = 1782, |
| 21629 | VMOVSHZmr_VMOVWmr = 1783, |
| 21630 | VBROADCASTF32X2Z256rm_VBROADCASTI32X2Z256rm_VBROADCASTF32X2Zrm_VBROADCASTI32X2Zrm_VPBROADCASTQZrm_VPBROADCASTDZ256rm_VPBROADCASTQZ256rm_VPBROADCASTDZrm = 1784, |
| 21631 | VBROADCASTF32X4Z256rm_VBROADCASTI32X4Z256rm_VBROADCASTF32X8rm_VBROADCASTI32X8rm_VBROADCASTF32X4rm_VBROADCASTF64X4rm_VBROADCASTI32X4rm_VBROADCASTI64X4rm_VBROADCASTF64X2Z128rm_VBROADCASTF64X2rm_VBROADCASTI64X2Z128rm_VBROADCASTI64X2rm = 1785, |
| 21632 | VBROADCASTSSZrm_VBROADCASTSDZ256rm_VBROADCASTSSZ256rm_VBROADCASTSDZrm = 1786, |
| 21633 | VMOVDDUPZrm_VMOVSHDUPZrm_VMOVSLDUPZrm = 1787, |
| 21634 | VMOVDDUPZ256rm_VMOVSHDUPZ256rm_VMOVSLDUPZ256rm = 1788, |
| 21635 | VPMOVDBZrr_VPMOVQBZrr_VPMOVSQBZrr_VPMOVQWZrr_VPMOVSQWZrr_VPMOVSDBZrr_VPMOVUSDBZrr_VPMOVUSQBZrr = 1789, |
| 21636 | VPMOVSWBZrr_VPMOVWBZrr_VPMOVDWZrr_VPMOVSDWZrr_VPMOVUSDWZrr_VPMOVSQDZrr_VPMOVUSQDZrr_VPMOVSQDZrrk_VPMOVSQDZrrkz_VPMOVUSQDZrrk_VPMOVUSQDZrrkz_VPMOVUSWBZrr = 1790, |
| 21637 | VPMOVUSQWZrr = 1791, |
| 21638 | VBROADCASTF32X2Zrmk_VBROADCASTF32X2Zrmkz_VBROADCASTI32X2Zrmk_VBROADCASTI32X2Zrmkz_VPBROADCASTDZrmk_VPBROADCASTDZrmkz_VPBROADCASTQZrmk_VPBROADCASTQZrmkz = 1792, |
| 21639 | VBROADCASTF32X8rmk_VBROADCASTF32X8rmkz_VBROADCASTI32X8rmk_VBROADCASTI32X8rmkz_VBROADCASTF32X4rmk_VBROADCASTF32X4rmkz_VBROADCASTF64X4rmk_VBROADCASTF64X4rmkz_VBROADCASTI32X4rmk_VBROADCASTI32X4rmkz_VBROADCASTI64X4rmk_VBROADCASTI64X4rmkz_VBROADCASTF64X2rmk_VBROADCASTF64X2rmkz_VBROADCASTI64X2rmk_VBROADCASTI64X2rmkz = 1793, |
| 21640 | VBROADCASTSDZrmk_VBROADCASTSDZrmkz_VBROADCASTSSZrmk_VBROADCASTSSZrmkz = 1794, |
| 21641 | VMOVAPDZrmk_VMOVAPDZrmkz_VMOVAPSZrmk_VMOVAPSZrmkz_VMOVUPDZrmk_VMOVUPDZrmkz_VMOVUPSZrmk_VMOVUPSZrmkz = 1795, |
| 21642 | VMOVDQA32Zrmk_VMOVDQA32Zrmkz_VMOVDQA64Zrmk_VMOVDQA64Zrmkz_VMOVDQU32Zrmk_VMOVDQU32Zrmkz_VMOVDQU64Zrmk_VMOVDQU64Zrmkz = 1796, |
| 21643 | VINSERTF32x4Zrm_VINSERTF32x4Zrmk_VINSERTF32x4Zrmkz_VINSERTF64x4Zrm_VINSERTF64x4Zrmk_VINSERTF64x4Zrmkz_VINSERTF32x8Zrm_VINSERTF32x8Zrmk_VINSERTF32x8Zrmkz_VINSERTF64x2Zrm_VINSERTF64x2Zrmk_VINSERTF64x2Zrmkz = 1797, |
| 21644 | VINSERTI32x4Zrm_VINSERTI32x4Zrmk_VINSERTI32x4Zrmkz_VINSERTI64x4Zrm_VINSERTI64x4Zrmk_VINSERTI64x4Zrmkz_VINSERTI32x8Zrm_VINSERTI32x8Zrmk_VINSERTI32x8Zrmkz_VINSERTI64x2Zrm_VINSERTI64x2Zrmk_VINSERTI64x2Zrmkz = 1798, |
| 21645 | VPADDBZrm_VPADDDZrm_VPADDQZrm_VPADDWZrm_VPSUBBZrm_VPSUBDZrm_VPSUBQZrm_VPSUBWZrm_VPADDDZrmb_VPADDDZrmk_VPADDDZrmkz_VPADDQZrmb_VPADDQZrmk_VPADDQZrmkz_VPSUBDZrmb_VPSUBDZrmk_VPSUBDZrmkz_VPSUBQZrmb_VPSUBQZrmk_VPSUBQZrmkz_VPADDDZrmbk_VPADDDZrmbkz_VPADDQZrmbk_VPADDQZrmbkz_VPSUBDZrmbk_VPSUBDZrmbkz_VPSUBQZrmbk_VPSUBQZrmbkz_VPTERNLOGDZrmbi_VPTERNLOGDZrmik_VPTERNLOGQZrmbi_VPTERNLOGQZrmik_VPTERNLOGDZrmbik_VPTERNLOGDZrmbikz_VPTERNLOGQZrmbik_VPTERNLOGQZrmbikz_VPTERNLOGDZrmi_VPTERNLOGDZrmikz_VPTERNLOGQZrmi_VPTERNLOGQZrmikz = 1799, |
| 21646 | VPBROADCASTWZrm_VPBROADCASTBZ256rm_VPBROADCASTWZ256rm_VPBROADCASTBZrm = 1800, |
| 21647 | VFPCLASSPDZ128rm_VFPCLASSPSZ128rm = 1801, |
| 21648 | VFPCLASSSDZrm_VFPCLASSSSZrm = 1802, |
| 21649 | VFPCLASSSHZrm = 1803, |
| 21650 | VPALIGNRZ256rmi = 1804, |
| 21651 | VPSHUFBZrm = 1805, |
| 21652 | MOV16ri_MOV64ri_MOV8ri_MOV16ri_alt_MOV8ri_alt_MOV16rr_MOV16rr_REV_MOV8rr_MOV8rr_REV = 1806, |
| 21653 | MOV32ri_MOV32ri_alt = 1807, |
| 21654 | MOV8rr_NOREX = 1808, |
| 21655 | VMOVLPDZ128rm_VMOVLPSZ128rm_VSHUFPDZ128rmbi_VSHUFPDZ128rmik_VSHUFPSZ128rmbi_VSHUFPSZ128rmik_VSHUFPDZ128rmbik_VSHUFPDZ128rmbikz_VSHUFPSZ128rmbik_VSHUFPSZ128rmbikz_VSHUFPDZ128rmi_VSHUFPDZ128rmikz_VSHUFPSZ128rmi_VSHUFPSZ128rmikz = 1809, |
| 21656 | VMOVAPDZ128rrk_VMOVAPDZ128rrk_REV_VMOVAPDZ128rrkz_VMOVAPDZ128rrkz_REV_VMOVAPSZ128rrk_VMOVAPSZ128rrk_REV_VMOVAPSZ128rrkz_VMOVAPSZ128rrkz_REV_VMOVUPDZ128rrk_VMOVUPDZ128rrk_REV_VMOVUPDZ128rrkz_VMOVUPDZ128rrkz_REV_VMOVUPSZ128rrk_VMOVUPSZ128rrk_REV_VMOVUPSZ128rrkz_VMOVUPSZ128rrkz_REV = 1810, |
| 21657 | VMOVAPDZ256rrk_VMOVAPDZ256rrk_REV_VMOVAPDZ256rrkz_VMOVAPDZ256rrkz_REV_VMOVAPSZ256rrk_VMOVAPSZ256rrk_REV_VMOVAPSZ256rrkz_VMOVAPSZ256rrkz_REV_VMOVUPDZ256rrk_VMOVUPDZ256rrk_REV_VMOVUPDZ256rrkz_VMOVUPDZ256rrkz_REV_VMOVUPSZ256rrk_VMOVUPSZ256rrk_REV_VMOVUPSZ256rrkz_VMOVUPSZ256rrkz_REV = 1811, |
| 21658 | VMOVDQA32Z128rrk_VMOVDQA32Z128rrk_REV_VMOVDQA32Z128rrkz_VMOVDQA32Z128rrkz_REV_VMOVDQA64Z128rrk_VMOVDQA64Z128rrk_REV_VMOVDQA64Z128rrkz_VMOVDQA64Z128rrkz_REV_VMOVDQU32Z128rrk_VMOVDQU32Z128rrk_REV_VMOVDQU32Z128rrkz_VMOVDQU32Z128rrkz_REV_VMOVDQU64Z128rrk_VMOVDQU64Z128rrk_REV_VMOVDQU64Z128rrkz_VMOVDQU64Z128rrkz_REV_VPMOVM2DZ128rr_VPMOVM2QZ128rr = 1812, |
| 21659 | VMOVSHZrr_VMOVSHZrr_REV = 1813, |
| 21660 | VPADDBZ128rr_VPADDDZ128rr_VPADDQZ128rr_VPADDWZ128rr_VPADDDZ128rrk_VPADDDZ128rrkz_VPADDQZ128rrk_VPADDQZ128rrkz_VPSUBDZ128rrk_VPSUBDZ128rrkz_VPSUBQZ128rrk_VPSUBQZ128rrkz_VPTERNLOGDZ128rri_VPTERNLOGDZ128rrik_VPTERNLOGDZ128rrikz_VPTERNLOGQZ128rri_VPTERNLOGQZ128rrik_VPTERNLOGQZ128rrikz = 1814, |
| 21661 | VPADDBZ256rr_VPADDDZ256rr_VPADDQZ256rr_VPADDWZ256rr_VPADDDZ256rrk_VPADDDZ256rrkz_VPADDQZ256rrk_VPADDQZ256rrkz_VPSUBDZ256rrk_VPSUBDZ256rrkz_VPSUBQZ256rrk_VPSUBQZ256rrkz_VPTERNLOGDZ256rri_VPTERNLOGDZ256rrik_VPTERNLOGDZ256rrikz_VPTERNLOGQZ256rri_VPTERNLOGQZ256rrik_VPTERNLOGQZ256rrikz = 1815, |
| 21662 | VPABSBZrmk_VPABSBZrmkz_VPABSWZrmk_VPABSWZrmkz = 1816, |
| 21663 | VPSLLWZmik_VPSLLWZmikz_VPSRLWZmik_VPSRLWZmikz_VPSRAWZmik_VPSRAWZmikz = 1817, |
| 21664 | VPADDSBZrmk_VPADDSBZrmkz_VPADDSWZrmk_VPADDSWZrmkz_VPADDUSBZrmk_VPADDUSBZrmkz_VPADDUSWZrmk_VPADDUSWZrmkz_VPSUBSBZrmk_VPSUBSBZrmkz_VPSUBSWZrmk_VPSUBSWZrmkz_VPSUBUSBZrmk_VPSUBUSBZrmkz_VPSUBUSWZrmk_VPSUBUSWZrmkz_VPAVGBZrmk_VPAVGBZrmkz_VPAVGWZrmk_VPAVGWZrmkz_VPMAXSBZrmk_VPMAXSBZrmkz_VPMAXUWZrmk_VPMAXUWZrmkz_VPMINSBZrmk_VPMINSBZrmkz_VPMINUWZrmk_VPMINUWZrmkz_VPMAXSWZrmk_VPMAXSWZrmkz_VPMAXUBZrmk_VPMAXUBZrmkz_VPMINSWZrmk_VPMINSWZrmkz_VPMINUBZrmk_VPMINUBZrmkz = 1818, |
| 21665 | VPSHLDVWZmk_VPSHLDVWZmkz_VPSHRDVWZmk_VPSHRDVWZmkz = 1819, |
| 21666 | VPSLLVWZrmk_VPSLLVWZrmkz_VPSRLVWZrmk_VPSRLVWZrmkz_VPSRAVWZrmk_VPSRAVWZrmkz = 1820, |
| 21667 | VPSLLWZrmk_VPSLLWZrmkz_VPSRLWZrmk_VPSRLWZrmkz_VPSRAWZrmk_VPSRAWZrmkz = 1821, |
| 21668 | VCOMISHZrr_VCOMISHZrrb_VUCOMISHZrr_VUCOMISHZrrb_VCOMISHZrr_Int_VUCOMISHZrr_Int = 1822, |
| 21669 | VCVTPD2QQZrrb_VCVTPD2QQZrrbk_VCVTPD2QQZrrk_VCVTPD2QQZrrkz_VCVTPD2UQQZrrb_VCVTPD2UQQZrrbk_VCVTPD2UQQZrrk_VCVTPD2UQQZrrkz_VCVTTPD2QQZrrb_VCVTTPD2QQZrrbk_VCVTTPD2QQZrrk_VCVTTPD2QQZrrkz_VCVTTPD2UQQZrrb_VCVTTPD2UQQZrrbk_VCVTTPD2UQQZrrk_VCVTTPD2UQQZrrkz_VCVTPD2QQZrrbkz_VCVTPD2UQQZrrbkz_VCVTTPD2QQZrrbkz_VCVTTPD2UQQZrrbkz = 1823, |
| 21670 | VCVTPS2DQZrrb_VCVTPS2DQZrrbk_VCVTPS2DQZrrk_VCVTPS2DQZrrkz_VCVTPS2UDQZrrb_VCVTPS2UDQZrrbk_VCVTPS2UDQZrrk_VCVTPS2UDQZrrkz_VCVTTPS2DQZrrb_VCVTTPS2DQZrrbk_VCVTTPS2DQZrrk_VCVTTPS2DQZrrkz_VCVTTPS2UDQZrrb_VCVTTPS2UDQZrrbk_VCVTTPS2UDQZrrk_VCVTTPS2UDQZrrkz_VCVTPS2DQZrrbkz_VCVTPS2UDQZrrbkz_VCVTTPS2DQZrrbkz_VCVTTPS2UDQZrrbkz = 1824, |
| 21671 | VMAXCPSZrr_VMAXCPSZrrk_VMAXCPSZrrkz_VMAXPSZrr_VMAXPSZrrk_VMAXPSZrrkz_VMINCPSZrr_VMINCPSZrrk_VMINCPSZrrkz_VMINPSZrr_VMINPSZrrk_VMINPSZrrkz_VMAXPSZrrb_VMAXPSZrrbk_VMAXPSZrrbkz_VMINPSZrrb_VMINPSZrrbk_VMINPSZrrbkz = 1825, |
| 21672 | VPLZCNTDZrr_VPLZCNTDZrrk_VPLZCNTDZrrkz_VPLZCNTQZrr_VPLZCNTQZrrk_VPLZCNTQZrrkz = 1826, |
| 21673 | VPMADD52HUQZr_VPMADD52HUQZrk_VPMADD52HUQZrkz_VPMADD52LUQZr_VPMADD52LUQZrk_VPMADD52LUQZrkz = 1827, |
| 21674 | VMOVAPDZ128rmk_VMOVAPDZ128rmkz_VMOVAPSZ128rmk_VMOVAPSZ128rmkz_VMOVUPDZ128rmk_VMOVUPDZ128rmkz_VMOVUPSZ128rmk_VMOVUPSZ128rmkz = 1828, |
| 21675 | VMOVDQA32Z128rmk_VMOVDQA32Z128rmkz_VMOVDQA64Z128rmk_VMOVDQA64Z128rmkz_VMOVDQU32Z128rmk_VMOVDQU32Z128rmkz_VMOVDQU64Z128rmk_VMOVDQU64Z128rmkz = 1829, |
| 21676 | VMOVSDZrmk_VMOVSDZrmkz_VMOVSSZrmk_VMOVSSZrmkz = 1830, |
| 21677 | VPADDBZ128rm_VPADDDZ128rm_VPADDQZ128rm_VPADDWZ128rm_VPSUBBZ128rm_VPSUBDZ128rm_VPSUBQZ128rm_VPSUBWZ128rm_VPADDDZ128rmb_VPADDDZ128rmk_VPADDDZ128rmkz_VPADDQZ128rmb_VPADDQZ128rmk_VPADDQZ128rmkz_VPSUBDZ128rmb_VPSUBDZ128rmk_VPSUBDZ128rmkz_VPSUBQZ128rmb_VPSUBQZ128rmk_VPSUBQZ128rmkz_VPADDDZ128rmbk_VPADDDZ128rmbkz_VPADDQZ128rmbk_VPADDQZ128rmbkz_VPSUBDZ128rmbk_VPSUBDZ128rmbkz_VPSUBQZ128rmbk_VPSUBQZ128rmbkz_VPTERNLOGDZ128rmbi_VPTERNLOGDZ128rmik_VPTERNLOGQZ128rmbi_VPTERNLOGQZ128rmik_VPTERNLOGDZ128rmbik_VPTERNLOGDZ128rmbikz_VPTERNLOGQZ128rmbik_VPTERNLOGQZ128rmbikz_VPTERNLOGDZ128rmi_VPTERNLOGDZ128rmikz_VPTERNLOGQZ128rmi_VPTERNLOGQZ128rmikz = 1831, |
| 21678 | VPBROADCASTBZ128rm_VPBROADCASTWZ128rm = 1832, |
| 21679 | VPALIGNRZ128rmi = 1833, |
| 21680 | VPEXTRDZmr_VPEXTRQZmr = 1834, |
| 21681 | VPMOVQDZ128mr_VPMOVQDZ128mrk = 1835, |
| 21682 | ROUNDPDmi_ROUNDPSmi_VROUNDPDmi_VROUNDPSmi = 1836, |
| 21683 | ROUNDSDmi_ROUNDSDmi_Int_ROUNDSSmi_ROUNDSSmi_Int_VROUNDSDmi_VROUNDSDmi_Int_VROUNDSSmi_VROUNDSSmi_Int_VRNDSCALEPDZ128rmbi_VRNDSCALEPDZ128rmik_VRNDSCALEPSZ128rmbi_VRNDSCALEPSZ128rmik_VRNDSCALEPDZ128rmbik_VRNDSCALEPDZ128rmbikz_VRNDSCALEPSZ128rmbik_VRNDSCALEPSZ128rmbikz_VRNDSCALEPDZ128rmi_VRNDSCALEPDZ128rmikz_VRNDSCALEPSZ128rmi_VRNDSCALEPSZ128rmikz_VRNDSCALESDZm_VRNDSCALESSZm_VRNDSCALESDZm_Int_VRNDSCALESDZm_Intk_VRNDSCALESDZm_Intkz_VRNDSCALESSZm_Int_VRNDSCALESSZm_Intk_VRNDSCALESSZm_Intkz = 1837, |
| 21684 | ROUNDPDri_ROUNDSSri_VROUNDPDri_VROUNDSSri_ROUNDPSri_ROUNDSDri_VROUNDPSri_VROUNDSDri_ROUNDSDri_Int_ROUNDSSri_Int_VROUNDSDri_Int_VROUNDSSri_Int_VRNDSCALEPDZ128rri_VRNDSCALEPDZ128rrik_VRNDSCALEPDZ128rrikz_VRNDSCALEPSZ128rri_VRNDSCALEPSZ128rrik_VRNDSCALEPSZ128rrikz_VRNDSCALESDZr_VRNDSCALESSZr_VRNDSCALESDZr_Int_VRNDSCALESDZr_Intk_VRNDSCALESDZr_Intkz_VRNDSCALESDZrb_Int_VRNDSCALESDZrb_Intk_VRNDSCALESDZrb_Intkz_VRNDSCALESSZr_Int_VRNDSCALESSZr_Intk_VRNDSCALESSZr_Intkz_VRNDSCALESSZrb_Int_VRNDSCALESSZrb_Intk_VRNDSCALESSZrb_Intkz = 1838, |
| 21685 | VRNDSCALEPDZ256rri_VRNDSCALEPDZ256rrik_VRNDSCALEPDZ256rrikz_VRNDSCALEPSZ256rri_VRNDSCALEPSZ256rrik_VRNDSCALEPSZ256rrikz_VROUNDPDYri_VROUNDPSYri = 1839, |
| 21686 | VPMOVSXBWZ256rmk_VPMOVSXBWZ256rmkz_VPMOVSXBWZrmk_VPMOVSXBWZrmkz_VPMOVZXBWZ256rmk_VPMOVZXBWZ256rmkz_VPMOVZXBWZrmk_VPMOVZXBWZrmkz = 1840, |
| 21687 | VPOPCNTBZ128rmk_VPOPCNTBZ128rmkz_VPOPCNTWZ128rmk_VPOPCNTWZ128rmkz = 1841, |
| 21688 | VPOPCNTBZ256rmk_VPOPCNTBZ256rmkz_VPOPCNTWZ256rmk_VPOPCNTWZ256rmkz = 1842, |
| 21689 | VPOPCNTBZrmk_VPOPCNTBZrmkz_VPOPCNTWZrmk_VPOPCNTWZrmkz = 1843, |
| 21690 | VDBPSADBWZ128rmik_VDBPSADBWZ128rmikz = 1844, |
| 21691 | VPMULTISHIFTQBZ128rmbk_VPMULTISHIFTQBZ128rmkz_VPMULTISHIFTQBZ128rmbkz_VPMULTISHIFTQBZ128rmk = 1845, |
| 21692 | VDBPSADBWZ256rmik_VDBPSADBWZ256rmikz = 1846, |
| 21693 | VDBPSADBWZrmik_VDBPSADBWZrmikz = 1847, |
| 21694 | VPACKSSDWZ256rmbk_VPACKSSDWZ256rmkz_VPACKUSDWZ256rmbk_VPACKUSDWZ256rmkz_VPACKSSDWZ256rmbkz_VPACKUSDWZ256rmbkz_VPACKSSDWZ256rmk_VPACKSSWBZ256rmk_VPACKUSDWZ256rmk_VPACKUSWBZ256rmk_VPACKSSWBZ256rmkz_VPACKUSWBZ256rmkz = 1848, |
| 21695 | VPACKSSDWZrmbk_VPACKSSDWZrmkz_VPACKUSDWZrmbk_VPACKUSDWZrmkz_VPACKSSDWZrmbkz_VPACKUSDWZrmbkz_VPACKSSDWZrmk_VPACKSSWBZrmk_VPACKUSDWZrmk_VPACKUSWBZrmk_VPACKSSWBZrmkz_VPACKUSWBZrmkz = 1849, |
| 21696 | VPERMBZ128rmk_VPERMBZ128rmkz_VPERMBZ256rmk_VPERMBZ256rmkz_VPERMBZrmk_VPERMBZrmkz = 1850, |
| 21697 | VPMULTISHIFTQBZ256rmbk_VPMULTISHIFTQBZ256rmkz_VPMULTISHIFTQBZ256rmbkz_VPMULTISHIFTQBZ256rmk = 1851, |
| 21698 | VPMULTISHIFTQBZrmbk_VPMULTISHIFTQBZrmkz_VPMULTISHIFTQBZrmbkz_VPMULTISHIFTQBZrmk = 1852, |
| 21699 | VSQRTSDZm_Int = 1853, |
| 21700 | VADDPDZ128rrkz_VSUBPDZ128rrkz = 1854, |
| 21701 | VADDPDZ256rrkz_VSUBPDZ256rrkz = 1855, |
| 21702 | VADDPSZ128rrkz_VSUBPSZ128rrkz = 1856, |
| 21703 | VADDPSZ256rrkz_VSUBPSZ256rrkz = 1857, |
| 21704 | VADDSDZrr_Intkz_VADDSDZrrb_Intkz_VSUBSDZrr_Intkz_VSUBSDZrrb_Intkz = 1858, |
| 21705 | VADDSSZrr_Intkz_VADDSSZrrb_Intkz_VSUBSSZrr_Intkz_VSUBSSZrrb_Intkz = 1859, |
| 21706 | VADDPDZrr_VADDPDZrrb_VSUBPDZrr_VSUBPDZrrb = 1860, |
| 21707 | VADDPSZrr_VADDPSZrrb_VSUBPSZrr_VSUBPSZrrb = 1861, |
| 21708 | VMOVDQU16Zrrk_VMOVDQU16Zrrk_REV_VMOVDQU16Zrrkz_VMOVDQU16Zrrkz_REV_VMOVDQU8Zrrk_VMOVDQU8Zrrk_REV_VMOVDQU8Zrrkz_VMOVDQU8Zrrkz_REV_VPMOVM2BZrr_VPMOVM2WZrr = 1862, |
| 21709 | VPBLENDMBZrrk_VPBLENDMBZrrkz_VPBLENDMWZrrk_VPBLENDMWZrrkz = 1863, |
| 21710 | VADDPHZ128rrk_VADDPHZ128rrkz_VSUBPHZ128rrk_VSUBPHZ128rrkz = 1864, |
| 21711 | VADDPHZ256rrk_VADDPHZ256rrkz_VSUBPHZ256rrk_VSUBPHZ256rrkz = 1865, |
| 21712 | VADDSHZrr_Intk_VADDSHZrr_Intkz_VADDSHZrrb_Intk_VADDSHZrrb_Intkz_VSUBSHZrr_Intk_VSUBSHZrr_Intkz_VSUBSHZrrb_Intk_VSUBSHZrrb_Intkz = 1866, |
| 21713 | VCVTPH2UWZ128rrk_VCVTPH2UWZ128rrkz_VCVTPH2WZ128rrk_VCVTPH2WZ128rrkz_VCVTTPH2UWZ128rrk_VCVTTPH2UWZ128rrkz_VCVTTPH2WZ128rrk_VCVTTPH2WZ128rrkz_VCVTUW2PHZ128rrk_VCVTUW2PHZ128rrkz_VCVTW2PHZ128rrk_VCVTW2PHZ128rrkz = 1867, |
| 21714 | VCVTPH2UWZ256rrk_VCVTPH2UWZ256rrkz_VCVTPH2WZ256rrk_VCVTPH2WZ256rrkz_VCVTTPH2UWZ256rrk_VCVTTPH2UWZ256rrkz_VCVTTPH2WZ256rrk_VCVTTPH2WZ256rrkz_VCVTUW2PHZ256rrk_VCVTUW2PHZ256rrkz_VCVTW2PHZ256rrk_VCVTW2PHZ256rrkz = 1868, |
| 21715 | VFMADD132PHZ128rk_VFMADD132PHZ128rkz_VFMADD213PHZ128rk_VFMADD213PHZ128rkz_VFMADD231PHZ128rk_VFMADD231PHZ128rkz_VFMSUB132PHZ128rk_VFMSUB132PHZ128rkz_VFMSUB213PHZ128rk_VFMSUB213PHZ128rkz_VFMSUB231PHZ128rk_VFMSUB231PHZ128rkz_VFNMADD132PHZ128rk_VFNMADD132PHZ128rkz_VFNMADD213PHZ128rk_VFNMADD213PHZ128rkz_VFNMADD231PHZ128rk_VFNMADD231PHZ128rkz_VFNMSUB132PHZ128rk_VFNMSUB132PHZ128rkz_VFNMSUB213PHZ128rk_VFNMSUB213PHZ128rkz_VFNMSUB231PHZ128rk_VFNMSUB231PHZ128rkz_VFMADDSUB132PHZ128rk_VFMADDSUB132PHZ128rkz_VFMADDSUB213PHZ128rk_VFMADDSUB213PHZ128rkz_VFMADDSUB231PHZ128rk_VFMADDSUB231PHZ128rkz_VFMSUBADD132PHZ128rk_VFMSUBADD132PHZ128rkz_VFMSUBADD213PHZ128rk_VFMSUBADD213PHZ128rkz_VFMSUBADD231PHZ128rk_VFMSUBADD231PHZ128rkz = 1869, |
| 21716 | VFMADD132PHZ256rk_VFMADD132PHZ256rkz_VFMADD213PHZ256rk_VFMADD213PHZ256rkz_VFMADD231PHZ256rk_VFMADD231PHZ256rkz_VFMSUB132PHZ256rk_VFMSUB132PHZ256rkz_VFMSUB213PHZ256rk_VFMSUB213PHZ256rkz_VFMSUB231PHZ256rk_VFMSUB231PHZ256rkz_VFNMADD132PHZ256rk_VFNMADD132PHZ256rkz_VFNMADD213PHZ256rk_VFNMADD213PHZ256rkz_VFNMADD231PHZ256rk_VFNMADD231PHZ256rkz_VFNMSUB132PHZ256rk_VFNMSUB132PHZ256rkz_VFNMSUB213PHZ256rk_VFNMSUB213PHZ256rkz_VFNMSUB231PHZ256rk_VFNMSUB231PHZ256rkz_VFMADDSUB132PHZ256rk_VFMADDSUB132PHZ256rkz_VFMADDSUB213PHZ256rk_VFMADDSUB213PHZ256rkz_VFMADDSUB231PHZ256rk_VFMADDSUB231PHZ256rkz_VFMSUBADD132PHZ256rk_VFMSUBADD132PHZ256rkz_VFMSUBADD213PHZ256rk_VFMSUBADD213PHZ256rkz_VFMSUBADD231PHZ256rk_VFMSUBADD231PHZ256rkz = 1870, |
| 21717 | VFMADD132SHZr_Intk_VFMADD132SHZr_Intkz_VFMADD132SHZrb_Intk_VFMADD132SHZrb_Intkz_VFMADD213SHZr_Intk_VFMADD213SHZr_Intkz_VFMADD213SHZrb_Intk_VFMADD213SHZrb_Intkz_VFMADD231SHZr_Intk_VFMADD231SHZr_Intkz_VFMADD231SHZrb_Intk_VFMADD231SHZrb_Intkz_VFMSUB132SHZr_Intk_VFMSUB132SHZr_Intkz_VFMSUB132SHZrb_Intk_VFMSUB132SHZrb_Intkz_VFMSUB213SHZr_Intk_VFMSUB213SHZr_Intkz_VFMSUB213SHZrb_Intk_VFMSUB213SHZrb_Intkz_VFMSUB231SHZr_Intk_VFMSUB231SHZr_Intkz_VFMSUB231SHZrb_Intk_VFMSUB231SHZrb_Intkz_VFNMADD132SHZr_Intk_VFNMADD132SHZr_Intkz_VFNMADD132SHZrb_Intk_VFNMADD132SHZrb_Intkz_VFNMADD213SHZr_Intk_VFNMADD213SHZr_Intkz_VFNMADD213SHZrb_Intk_VFNMADD213SHZrb_Intkz_VFNMADD231SHZr_Intk_VFNMADD231SHZr_Intkz_VFNMADD231SHZrb_Intk_VFNMADD231SHZrb_Intkz_VFNMSUB132SHZr_Intk_VFNMSUB132SHZr_Intkz_VFNMSUB132SHZrb_Intk_VFNMSUB132SHZrb_Intkz_VFNMSUB213SHZr_Intk_VFNMSUB213SHZr_Intkz_VFNMSUB213SHZrb_Intk_VFNMSUB213SHZrb_Intkz_VFNMSUB231SHZr_Intk_VFNMSUB231SHZr_Intkz_VFNMSUB231SHZrb_Intk_VFNMSUB231SHZrb_Intkz = 1871, |
| 21718 | VGETEXPPHZ128rk_VGETEXPPHZ128rkz_VGETEXPSHZrbk_VGETEXPSHZrkz_VGETEXPSHZrbkz_VGETEXPSHZrk_VGETMANTPHZ128rrik_VGETMANTPHZ128rrikz_VGETMANTSHZrribk_VGETMANTSHZrrikz_VGETMANTSHZrribkz_VGETMANTSHZrrik = 1872, |
| 21719 | VGETEXPPHZ256rk_VGETEXPPHZ256rkz_VGETMANTPHZ256rrik_VGETMANTPHZ256rrikz = 1873, |
| 21720 | VMAXCPHZ128rrk_VMAXCPHZ128rrkz_VMINCPHZ128rrk_VMINCPHZ128rrkz_VMAXPHZ128rrk_VMAXPHZ128rrkz_VMINPHZ128rrk_VMINPHZ128rrkz = 1874, |
| 21721 | VMAXCPHZ256rrk_VMAXCPHZ256rrkz_VMINCPHZ256rrk_VMINCPHZ256rrkz_VMAXPHZ256rrk_VMAXPHZ256rrkz_VMINPHZ256rrk_VMINPHZ256rrkz = 1875, |
| 21722 | VMULPHZ128rrk_VMULPHZ128rrkz = 1876, |
| 21723 | VMULPHZ256rrk_VMULPHZ256rrkz = 1877, |
| 21724 | VMAXSHZrr_Intk_VMAXSHZrr_Intkz_VMAXSHZrrb_Intk_VMAXSHZrrb_Intkz_VMINSHZrr_Intk_VMINSHZrr_Intkz_VMINSHZrrb_Intk_VMINSHZrrb_Intkz = 1878, |
| 21725 | VMULSHZrr_Intk_VMULSHZrr_Intkz_VMULSHZrrb_Intk_VMULSHZrrb_Intkz = 1879, |
| 21726 | VADDPHZrr_VADDPHZrrb_VSUBPHZrr_VSUBPHZrrb = 1880, |
| 21727 | VAESDECLASTZrr_VAESDECZrr_VAESENCLASTZrr_VAESENCZrr = 1881, |
| 21728 | VCVTPH2UWZrr_VCVTPH2UWZrrb_VCVTPH2WZrr_VCVTPH2WZrrb_VCVTTPH2UWZrr_VCVTTPH2UWZrrb_VCVTTPH2WZrr_VCVTTPH2WZrrb_VCVTUW2PHZrr_VCVTUW2PHZrrb_VCVTW2PHZrr_VCVTW2PHZrrb = 1882, |
| 21729 | VFMADD132PHZr_VFMADD132PHZrb_VFMADD213PHZr_VFMADD213PHZrb_VFMADD231PHZr_VFMADD231PHZrb_VFMSUB132PHZr_VFMSUB132PHZrb_VFMSUB213PHZr_VFMSUB213PHZrb_VFMSUB231PHZr_VFMSUB231PHZrb_VFNMADD132PHZr_VFNMADD132PHZrb_VFNMADD213PHZr_VFNMADD213PHZrb_VFNMADD231PHZr_VFNMADD231PHZrb_VFNMSUB132PHZr_VFNMSUB132PHZrb_VFNMSUB213PHZr_VFNMSUB213PHZrb_VFNMSUB231PHZr_VFNMSUB231PHZrb_VFMADDSUB132PHZr_VFMADDSUB132PHZrb_VFMADDSUB213PHZr_VFMADDSUB213PHZrb_VFMADDSUB231PHZr_VFMADDSUB231PHZrb_VFMSUBADD132PHZr_VFMSUBADD132PHZrb_VFMSUBADD213PHZr_VFMSUBADD213PHZrb_VFMSUBADD231PHZr_VFMSUBADD231PHZrb = 1883, |
| 21730 | VGETEXPPHZr_VGETEXPPHZrb_VGETMANTPHZrri_VGETMANTPHZrrib = 1884, |
| 21731 | VMAXCPHZrr_VMINCPHZrr_VMAXPHZrr_VMAXPHZrrb_VMINPHZrr_VMINPHZrrb = 1885, |
| 21732 | VMULPHZrr_VMULPHZrrb = 1886, |
| 21733 | VGF2P8MULBZrr = 1887, |
| 21734 | VADDPHZrrbk_VADDPHZrrkz_VSUBPHZrrbk_VSUBPHZrrkz_VADDPHZrrbkz_VADDPHZrrk_VSUBPHZrrbkz_VSUBPHZrrk = 1888, |
| 21735 | VCVTPH2UWZrrbk_VCVTPH2UWZrrkz_VCVTPH2WZrrbk_VCVTPH2WZrrkz_VCVTTPH2UWZrrbk_VCVTTPH2UWZrrkz_VCVTTPH2WZrrbk_VCVTTPH2WZrrkz_VCVTPH2UWZrrbkz_VCVTPH2UWZrrk_VCVTPH2WZrrbkz_VCVTPH2WZrrk_VCVTTPH2UWZrrbkz_VCVTTPH2UWZrrk_VCVTTPH2WZrrbkz_VCVTTPH2WZrrk_VCVTUW2PHZrrbk_VCVTUW2PHZrrkz_VCVTW2PHZrrbk_VCVTW2PHZrrkz_VCVTUW2PHZrrbkz_VCVTUW2PHZrrk_VCVTW2PHZrrbkz_VCVTW2PHZrrk = 1889, |
| 21736 | VFMADD132PHZrbk_VFMADD132PHZrkz_VFMADD213PHZrbk_VFMADD213PHZrkz_VFMADD231PHZrbk_VFMADD231PHZrkz_VFMSUB132PHZrbk_VFMSUB132PHZrkz_VFMSUB213PHZrbk_VFMSUB213PHZrkz_VFMSUB231PHZrbk_VFMSUB231PHZrkz_VFNMADD132PHZrbk_VFNMADD132PHZrkz_VFNMADD213PHZrbk_VFNMADD213PHZrkz_VFNMADD231PHZrbk_VFNMADD231PHZrkz_VFNMSUB132PHZrbk_VFNMSUB132PHZrkz_VFNMSUB213PHZrbk_VFNMSUB213PHZrkz_VFNMSUB231PHZrbk_VFNMSUB231PHZrkz_VFMADD132PHZrbkz_VFMADD132PHZrk_VFMADD213PHZrbkz_VFMADD213PHZrk_VFMADD231PHZrbkz_VFMADD231PHZrk_VFMSUB132PHZrbkz_VFMSUB132PHZrk_VFMSUB213PHZrbkz_VFMSUB213PHZrk_VFMSUB231PHZrbkz_VFMSUB231PHZrk_VFNMADD132PHZrbkz_VFNMADD132PHZrk_VFNMADD213PHZrbkz_VFNMADD213PHZrk_VFNMADD231PHZrbkz_VFNMADD231PHZrk_VFNMSUB132PHZrbkz_VFNMSUB132PHZrk_VFNMSUB213PHZrbkz_VFNMSUB213PHZrk_VFNMSUB231PHZrbkz_VFNMSUB231PHZrk_VFMADDSUB132PHZrbk_VFMADDSUB132PHZrkz_VFMADDSUB213PHZrbk_VFMADDSUB213PHZrkz_VFMADDSUB231PHZrbk_VFMADDSUB231PHZrkz_VFMADDSUB132PHZrbkz_VFMADDSUB132PHZrk_VFMADDSUB213PHZrbkz_VFMADDSUB213PHZrk_VFMADDSUB231PHZrbkz_VFMADDSUB231PHZrk_VFMSUBADD132PHZrbk_VFMSUBADD132PHZrkz_VFMSUBADD213PHZrbk_VFMSUBADD213PHZrkz_VFMSUBADD231PHZrbk_VFMSUBADD231PHZrkz_VFMSUBADD132PHZrbkz_VFMSUBADD132PHZrk_VFMSUBADD213PHZrbkz_VFMSUBADD213PHZrk_VFMSUBADD231PHZrbkz_VFMSUBADD231PHZrk = 1890, |
| 21737 | VGETEXPPHZrbk_VGETEXPPHZrkz_VGETEXPPHZrbkz_VGETEXPPHZrk_VGETMANTPHZrribk_VGETMANTPHZrrikz_VGETMANTPHZrribkz_VGETMANTPHZrrik = 1891, |
| 21738 | VMAXCPHZrrk_VMAXCPHZrrkz_VMINCPHZrrk_VMINCPHZrrkz_VMAXPHZrrbk_VMAXPHZrrkz_VMINPHZrrbk_VMINPHZrrkz_VMAXPHZrrbkz_VMAXPHZrrk_VMINPHZrrbkz_VMINPHZrrk = 1892, |
| 21739 | VMULPHZrrbk_VMULPHZrrkz_VMULPHZrrbkz_VMULPHZrrk = 1893, |
| 21740 | VPMOVSXBWZ128rmk_VPMOVSXBWZ128rmkz_VPMOVZXBWZ128rmk_VPMOVZXBWZ128rmkz_VPSHUFHWZ128mik_VPSHUFHWZ128mikz_VPSHUFLWZ128mik_VPSHUFLWZ128mikz = 1894, |
| 21741 | VPSHUFHWZ256mik_VPSHUFHWZ256mikz_VPSHUFLWZ256mik_VPSHUFLWZ256mikz = 1895, |
| 21742 | VADDPSYrm_VSUBPSYrm_VADDPSZ256rm_VADDPSZ256rmb_VADDPSZ256rmbk_VADDPSZ256rmk_VADDPSZ256rmkz_VSUBPSZ256rm_VSUBPSZ256rmb_VSUBPSZ256rmbk_VSUBPSZ256rmk_VSUBPSZ256rmkz_VADDPSZ256rmbkz_VSUBPSZ256rmbkz = 1896, |
| 21743 | VPSHUFBZ256rmk_VPSHUFBZ256rmkz = 1897, |
| 21744 | VPUNPCKHBWZ256rmk_VPUNPCKHBWZ256rmkz_VPUNPCKHWDZ256rmk_VPUNPCKHWDZ256rmkz_VPUNPCKLBWZ256rmk_VPUNPCKLBWZ256rmkz_VPUNPCKLWDZ256rmk_VPUNPCKLWDZ256rmkz = 1898, |
| 21745 | VADDSUBPSYrm = 1899, |
| 21746 | VPSHUFBZ128rmk_VPSHUFBZ128rmkz = 1900, |
| 21747 | VPUNPCKHBWZ128rmk_VPUNPCKHBWZ128rmkz_VPUNPCKHWDZ128rmk_VPUNPCKHWDZ128rmkz_VPUNPCKLBWZ128rmk_VPUNPCKLBWZ128rmkz_VPUNPCKLWDZ128rmk_VPUNPCKLWDZ128rmkz = 1901, |
| 21748 | VMOVDQU16Zrmk_VMOVDQU16Zrmkz_VMOVDQU8Zrmk_VMOVDQU8Zrmkz = 1902, |
| 21749 | VADDPSZrm_VADDPSZrmb_VADDPSZrmbk_VADDPSZrmk_VADDPSZrmkz_VSUBPSZrm_VSUBPSZrmb_VSUBPSZrmbk_VSUBPSZrmk_VSUBPSZrmkz_VADDPSZrmbkz_VSUBPSZrmbkz = 1903, |
| 21750 | VPBLENDMBZrmk_VPBLENDMBZrmkz_VPBLENDMWZrmk_VPBLENDMWZrmkz = 1904, |
| 21751 | VADDPSZrrbk_VADDPSZrrkz_VSUBPSZrrbk_VSUBPSZrrkz_VADDPSZrrbkz_VADDPSZrrk_VSUBPSZrrbkz_VSUBPSZrrk = 1905, |
| 21752 | VPLZCNTDZrm_VPLZCNTDZrmb_VPLZCNTDZrmbk_VPLZCNTDZrmk_VPLZCNTDZrmkz_VPLZCNTQZrm_VPLZCNTQZrmb_VPLZCNTQZrmbk_VPLZCNTQZrmk_VPLZCNTQZrmkz_VPLZCNTDZrmbkz_VPLZCNTQZrmbkz = 1906, |
| 21753 | VAESDECLASTZrm_VAESDECZrm_VAESENCLASTZrm_VAESENCZrm = 1907, |
| 21754 | VGF2P8AFFINEINVQBZrmbi_VGF2P8AFFINEINVQBZrmi_VGF2P8AFFINEQBZrmbi_VGF2P8AFFINEQBZrmi = 1908, |
| 21755 | VGF2P8MULBZrm = 1909, |
| 21756 | VPMADD52HUQZm_VPMADD52HUQZmb_VPMADD52HUQZmbk_VPMADD52HUQZmk_VPMADD52HUQZmkz_VPMADD52LUQZm_VPMADD52LUQZmb_VPMADD52LUQZmbk_VPMADD52LUQZmk_VPMADD52LUQZmkz_VPMADD52HUQZmbkz_VPMADD52LUQZmbkz = 1910, |
| 21757 | VPOPCNTBZ256rm_VPOPCNTDZ256rm_VPOPCNTQZ256rm_VPOPCNTWZ256rm_VPOPCNTDZ256rmb_VPOPCNTDZ256rmk_VPOPCNTDZ256rmkz_VPOPCNTQZ256rmb_VPOPCNTQZ256rmk_VPOPCNTQZ256rmkz_VPOPCNTDZ256rmbk_VPOPCNTDZ256rmbkz_VPOPCNTQZ256rmbk_VPOPCNTQZ256rmbkz = 1911, |
| 21758 | VPOPCNTBZrm_VPOPCNTDZrm_VPOPCNTQZrm_VPOPCNTWZrm_VPOPCNTDZrmb_VPOPCNTDZrmk_VPOPCNTDZrmkz_VPOPCNTQZrmb_VPOPCNTQZrmk_VPOPCNTQZrmkz_VPOPCNTDZrmbk_VPOPCNTDZrmbkz_VPOPCNTQZrmbk_VPOPCNTQZrmbkz = 1912, |
| 21759 | VPSHUFHWZmik_VPSHUFHWZmikz_VPSHUFLWZmik_VPSHUFLWZmikz = 1913, |
| 21760 | VFPCLASSPDZ256rmb_VFPCLASSPSZ256rmb = 1914, |
| 21761 | VFPCLASSPDZrmb_VFPCLASSPSZrmb = 1915, |
| 21762 | VFPCLASSPHZ256rmb = 1916, |
| 21763 | VFPCLASSPHZrmb = 1917, |
| 21764 | VPALIGNRZrmik_VPALIGNRZrmikz_VPUNPCKHBWZrmk_VPUNPCKHBWZrmkz_VPUNPCKHWDZrmk_VPUNPCKHWDZrmkz_VPUNPCKLBWZrmk_VPUNPCKLBWZrmkz_VPUNPCKLWDZrmk_VPUNPCKLWDZrmkz = 1918, |
| 21765 | VPMULTISHIFTQBZ256rm_VPMULTISHIFTQBZ256rmb = 1919, |
| 21766 | VPMULTISHIFTQBZrm_VPMULTISHIFTQBZrmb = 1920, |
| 21767 | VPCLMULQDQZrmi = 1921, |
| 21768 | VPCLMULQDQZ256rmi = 1922, |
| 21769 | VBLENDVPDYrmr_VBLENDVPSYrmr = 1923, |
| 21770 | VPBLENDVBYrmr = 1924, |
| 21771 | VBLENDVPDYrrr_VBLENDVPSYrrr = 1925, |
| 21772 | VPBLENDVBYrrr = 1926, |
| 21773 | VMOVAPDZ256rmk_VMOVAPDZ256rmkz_VMOVAPSZ256rmk_VMOVAPSZ256rmkz_VMOVUPDZ256rmk_VMOVUPDZ256rmkz_VMOVUPSZ256rmk_VMOVUPSZ256rmkz = 1927, |
| 21774 | VMOVDQA32Z256rmk_VMOVDQA32Z256rmkz_VMOVDQA64Z256rmk_VMOVDQA64Z256rmkz_VMOVDQU32Z256rmk_VMOVDQU32Z256rmkz_VMOVDQU64Z256rmk_VMOVDQU64Z256rmkz = 1928, |
| 21775 | VPADDBZ256rm_VPADDDZ256rm_VPADDQZ256rm_VPADDWZ256rm_VPSUBBZ256rm_VPSUBDZ256rm_VPSUBQZ256rm_VPSUBWZ256rm_VPADDDZ256rmb_VPADDDZ256rmk_VPADDDZ256rmkz_VPADDQZ256rmb_VPADDQZ256rmk_VPADDQZ256rmkz_VPSUBDZ256rmb_VPSUBDZ256rmk_VPSUBDZ256rmkz_VPSUBQZ256rmb_VPSUBQZ256rmk_VPSUBQZ256rmkz_VPADDDZ256rmbk_VPADDDZ256rmbkz_VPADDQZ256rmbk_VPADDQZ256rmbkz_VPSUBDZ256rmbk_VPSUBDZ256rmbkz_VPSUBQZ256rmbk_VPSUBQZ256rmbkz_VPTERNLOGDZ256rmbi_VPTERNLOGDZ256rmik_VPTERNLOGQZ256rmbi_VPTERNLOGQZ256rmik_VPTERNLOGDZ256rmbik_VPTERNLOGDZ256rmbikz_VPTERNLOGQZ256rmbik_VPTERNLOGQZ256rmbikz_VPTERNLOGDZ256rmi_VPTERNLOGDZ256rmikz_VPTERNLOGQZ256rmi_VPTERNLOGQZ256rmikz = 1929, |
| 21776 | VCMPPHZ128rmbi_VCMPPHZ128rmik_VCMPPHZ128rmbik_VCMPPHZ128rmi_VFPCLASSPHZ128rmbk_VFPCLASSPHZ128rmk = 1930, |
| 21777 | VCMPPHZ256rmbi_VCMPPHZ256rmik_VCMPPHZ256rmbik_VCMPPHZ256rmi_VFPCLASSPHZ256rmbk_VFPCLASSPHZ256rmk = 1931, |
| 21778 | VCMPPHZrmbi_VCMPPHZrmik_VCMPPHZrmbik_VCMPPHZrmi_VFPCLASSPHZrmbk_VFPCLASSPHZrmk = 1932, |
| 21779 | VCMPSHZrmi_VCMPSHZrmi_Int_VCMPSHZrmi_Intk_VFPCLASSSHZrmk = 1933, |
| 21780 | VCOMISHZrm_VCOMISHZrm_Int_VUCOMISHZrm_VUCOMISHZrm_Int = 1934, |
| 21781 | VCOMPRESSPDZ128mr_VCOMPRESSPDZ256mr_VCOMPRESSPSZ128mr_VCOMPRESSPSZ256mr_VCOMPRESSPDZmr_VCOMPRESSPSZmr_VPCOMPRESSDZ128mr_VPCOMPRESSDZ256mr_VPCOMPRESSQZ128mr_VPCOMPRESSQZ256mr_VPCOMPRESSDZmr_VPCOMPRESSQZmr = 1935, |
| 21782 | VPMOVDBZmr_VPMOVQBZmr_VPMOVSQBZmr_VPMOVSWBZmr_VPMOVWBZmr_VPMOVDWZmr_VPMOVQWZmr_VPMOVSDWZmr_VPMOVSQWZmr_VPMOVUSDWZmr_VPMOVUSQWZmr_VPMOVSDBZmr_VPMOVSQDZmr_VPMOVUSDBZmr_VPMOVUSQDZmr_VPMOVUSQBZmr_VPMOVUSWBZmr = 1936, |
| 21783 | VPMOVDBZmrk_VPMOVQBZmrk_VPMOVSQBZmrk_VPMOVSWBZmrk_VPMOVWBZmrk_VPMOVDWZmrk_VPMOVQWZmrk_VPMOVSDWZmrk_VPMOVSQWZmrk_VPMOVUSDWZmrk_VPMOVUSQWZmrk_VPMOVSDBZmrk_VPMOVSQDZmrk_VPMOVUSDBZmrk_VPMOVUSQDZmrk_VPMOVUSQBZmrk_VPMOVUSWBZmrk = 1937, |
| 21784 | VCOMPRESSPDZ128rr_VCOMPRESSPSZ128rr_VPCOMPRESSDZ128rr_VPCOMPRESSQZ128rr = 1938, |
| 21785 | VCOMPRESSPDZ256rr_VCOMPRESSPSZ256rr_VPCOMPRESSDZ256rr_VPCOMPRESSQZ256rr = 1939, |
| 21786 | VCOMPRESSPDZrr_VCOMPRESSPSZrr_VPCOMPRESSDZrr_VPCOMPRESSQZrr = 1940, |
| 21787 | VEXPANDPDZ128rr_VEXPANDPDZ256rr_VEXPANDPSZ128rr_VEXPANDPSZ256rr_VEXPANDPDZrr_VEXPANDPSZrr_VPEXPANDDZ128rr_VPEXPANDDZ256rr_VPEXPANDQZ128rr_VPEXPANDQZ256rr_VPEXPANDDZrr_VPEXPANDQZrr = 1941, |
| 21788 | VPCOMPRESSBZ128rr_VPCOMPRESSWZ128rr = 1942, |
| 21789 | VPCOMPRESSBZ256rr_VPCOMPRESSWZ256rr_VPEXPANDBZ256rr_VPEXPANDWZ256rr = 1943, |
| 21790 | VPCOMPRESSBZrr_VPCOMPRESSWZrr_VPEXPANDBZrr_VPEXPANDWZrr = 1944, |
| 21791 | VPEXPANDBZ128rr_VPEXPANDWZ128rr = 1945, |
| 21792 | VCVTDQ2PDZrrk_VCVTDQ2PDZrrkz_VCVTUDQ2PDZrrk_VCVTUDQ2PDZrrkz = 1946, |
| 21793 | VCVTPS2QQZrrb_VCVTPS2QQZrrbk_VCVTPS2QQZrrk_VCVTPS2QQZrrkz_VCVTPS2UQQZrrb_VCVTPS2UQQZrrbk_VCVTPS2UQQZrrk_VCVTPS2UQQZrrkz_VCVTTPS2QQZrrb_VCVTTPS2QQZrrbk_VCVTTPS2QQZrrk_VCVTTPS2QQZrrkz_VCVTTPS2UQQZrrb_VCVTTPS2UQQZrrbk_VCVTTPS2UQQZrrk_VCVTTPS2UQQZrrkz_VCVTPS2QQZrrbkz_VCVTPS2UQQZrrbkz_VCVTTPS2QQZrrbkz_VCVTTPS2UQQZrrbkz = 1947, |
| 21794 | VCVTQQ2PSZrrb_VCVTQQ2PSZrrbk_VCVTQQ2PSZrrk_VCVTQQ2PSZrrkz_VCVTUQQ2PSZrrb_VCVTUQQ2PSZrrbk_VCVTUQQ2PSZrrk_VCVTUQQ2PSZrrkz_VCVTQQ2PSZrrbkz_VCVTUQQ2PSZrrbkz = 1948, |
| 21795 | VCVTDQ2PHZ128rm_VCVTDQ2PHZ128rmb_VCVTUDQ2PHZ128rm_VCVTUDQ2PHZ128rmb = 1949, |
| 21796 | VCVTNEPS2BF16Z128rm_VCVTNEPS2BF16Z128rmb = 1950, |
| 21797 | VCVTDQ2PHZ128rmbk_VCVTDQ2PHZ128rmkz_VCVTUDQ2PHZ128rmbk_VCVTUDQ2PHZ128rmkz_VCVTDQ2PHZ128rmbkz_VCVTDQ2PHZ128rmk_VCVTUDQ2PHZ128rmbkz_VCVTUDQ2PHZ128rmk = 1951, |
| 21798 | VCVTDQ2PHZ128rr_VCVTUDQ2PHZ128rr = 1952, |
| 21799 | VCVTDQ2PHZ128rrk_VCVTDQ2PHZ128rrkz_VCVTUDQ2PHZ128rrk_VCVTUDQ2PHZ128rrkz = 1953, |
| 21800 | VCVTDQ2PHZ256rm_VCVTDQ2PHZ256rmb_VCVTUDQ2PHZ256rm_VCVTUDQ2PHZ256rmb = 1954, |
| 21801 | VCVTNEPS2BF16Z128rmbk_VCVTNEPS2BF16Z128rmkz_VCVTNEPS2BF16Z128rmbkz_VCVTNEPS2BF16Z128rmk = 1955, |
| 21802 | VCVTDQ2PHZ256rmbk_VCVTDQ2PHZ256rmkz_VCVTUDQ2PHZ256rmbk_VCVTUDQ2PHZ256rmkz_VCVTDQ2PHZ256rmbkz_VCVTDQ2PHZ256rmk_VCVTUDQ2PHZ256rmbkz_VCVTUDQ2PHZ256rmk = 1956, |
| 21803 | VCVTDQ2PHZ256rr_VCVTUDQ2PHZ256rr = 1957, |
| 21804 | VCVTDQ2PHZ256rrk_VCVTDQ2PHZ256rrkz_VCVTUDQ2PHZ256rrk_VCVTUDQ2PHZ256rrkz = 1958, |
| 21805 | VCVTDQ2PHZrm_VCVTDQ2PHZrmb_VCVTUDQ2PHZrm_VCVTUDQ2PHZrmb = 1959, |
| 21806 | VCVTDQ2PHZrmbk_VCVTDQ2PHZrmkz_VCVTUDQ2PHZrmbk_VCVTUDQ2PHZrmkz_VCVTDQ2PHZrmbkz_VCVTDQ2PHZrmk_VCVTUDQ2PHZrmbkz_VCVTUDQ2PHZrmk = 1960, |
| 21807 | VCVTDQ2PHZrr_VCVTDQ2PHZrrb_VCVTUDQ2PHZrr_VCVTUDQ2PHZrrb = 1961, |
| 21808 | VCVTDQ2PHZrrbk_VCVTDQ2PHZrrkz_VCVTUDQ2PHZrrbk_VCVTUDQ2PHZrrkz_VCVTDQ2PHZrrbkz_VCVTDQ2PHZrrk_VCVTUDQ2PHZrrbkz_VCVTUDQ2PHZrrk = 1962, |
| 21809 | VCVTNE2PS2BF16Z128rm_VCVTNE2PS2BF16Z128rmb = 1963, |
| 21810 | VCVTNE2PS2BF16Z128rmbk_VCVTNE2PS2BF16Z128rmkz_VCVTNE2PS2BF16Z128rmbkz_VCVTNE2PS2BF16Z128rmk = 1964, |
| 21811 | VCVTNE2PS2BF16Z128rr = 1965, |
| 21812 | VCVTNE2PS2BF16Z256rr = 1966, |
| 21813 | VCVTNE2PS2BF16Z128rrk_VCVTNE2PS2BF16Z128rrkz = 1967, |
| 21814 | VCVTNE2PS2BF16Z256rrk_VCVTNE2PS2BF16Z256rrkz = 1968, |
| 21815 | VCVTNE2PS2BF16Z256rm_VCVTNE2PS2BF16Z256rmb = 1969, |
| 21816 | VCVTNE2PS2BF16Z256rmbk_VCVTNE2PS2BF16Z256rmkz_VCVTNE2PS2BF16Z256rmbkz_VCVTNE2PS2BF16Z256rmk = 1970, |
| 21817 | VCVTNE2PS2BF16Zrm_VCVTNE2PS2BF16Zrmb = 1971, |
| 21818 | VDPBF16PSZm_VDPBF16PSZmb_VDPBF16PSZmbk_VDPBF16PSZmk_VDPBF16PSZmkz = 1972, |
| 21819 | VDPBF16PSZmbkz = 1973, |
| 21820 | VCVTNE2PS2BF16Zrmbk_VCVTNE2PS2BF16Zrmkz_VCVTNE2PS2BF16Zrmbkz_VCVTNE2PS2BF16Zrmk = 1974, |
| 21821 | VCVTNE2PS2BF16Zrr = 1975, |
| 21822 | VCVTNE2PS2BF16Zrrk_VCVTNE2PS2BF16Zrrkz = 1976, |
| 21823 | VCVTNEPS2BF16Z128rr = 1977, |
| 21824 | VCVTNEPS2BF16Z256rr = 1978, |
| 21825 | VCVTNEPS2BF16Z128rrk_VCVTNEPS2BF16Z128rrkz = 1979, |
| 21826 | VCVTNEPS2BF16Z256rrk_VCVTNEPS2BF16Z256rrkz = 1980, |
| 21827 | VCVTNEPS2BF16Z256rm_VCVTNEPS2BF16Z256rmb = 1981, |
| 21828 | VCVTNEPS2BF16Z256rmbk_VCVTNEPS2BF16Z256rmkz_VCVTNEPS2BF16Z256rmbkz_VCVTNEPS2BF16Z256rmk = 1982, |
| 21829 | VCVTNEPS2BF16Zrm_VCVTNEPS2BF16Zrmb = 1983, |
| 21830 | VCVTNEPS2BF16Zrmbk_VCVTNEPS2BF16Zrmkz_VCVTNEPS2BF16Zrmbkz_VCVTNEPS2BF16Zrmk = 1984, |
| 21831 | VCVTNEPS2BF16Zrr = 1985, |
| 21832 | VCVTNEPS2BF16Zrrk_VCVTNEPS2BF16Zrrkz = 1986, |
| 21833 | VCVTPD2DQZ256rm_VCVTPD2DQZ256rmb_VCVTPD2UDQZ256rm_VCVTPD2UDQZ256rmb_VCVTTPD2DQZ256rm_VCVTTPD2DQZ256rmb_VCVTTPD2UDQZ256rm_VCVTTPD2UDQZ256rmb_VCVTPD2DQZ256rmbk_VCVTPD2DQZ256rmkz_VCVTPD2UDQZ256rmbk_VCVTPD2UDQZ256rmkz_VCVTTPD2DQZ256rmbk_VCVTTPD2DQZ256rmkz_VCVTTPD2UDQZ256rmbk_VCVTTPD2UDQZ256rmkz_VCVTPD2DQZ256rmbkz_VCVTPD2DQZ256rmk_VCVTPD2UDQZ256rmbkz_VCVTPD2UDQZ256rmk_VCVTTPD2DQZ256rmbkz_VCVTTPD2DQZ256rmk_VCVTTPD2UDQZ256rmbkz_VCVTTPD2UDQZ256rmk = 1987, |
| 21834 | VCVTPH2DQZ256rm_VCVTPH2DQZ256rmb_VCVTPH2UDQZ256rm_VCVTPH2UDQZ256rmb_VCVTTPH2DQZ256rm_VCVTTPH2DQZ256rmb_VCVTTPH2UDQZ256rm_VCVTTPH2UDQZ256rmb = 1988, |
| 21835 | VCVTPH2PSXZ128rmbk_VCVTPH2PSXZ128rmkz_VCVTPH2PSXZ128rmbkz_VCVTPH2PSXZ128rmk = 1989, |
| 21836 | VCVTPH2PSXZ256rm_VCVTPH2PSXZ256rmb = 1990, |
| 21837 | VCVTQQ2PSZ256rm_VCVTQQ2PSZ256rmb_VCVTQQ2PSZ256rmbk_VCVTQQ2PSZ256rmk_VCVTQQ2PSZ256rmkz_VCVTUQQ2PSZ256rm_VCVTUQQ2PSZ256rmb_VCVTUQQ2PSZ256rmbk_VCVTUQQ2PSZ256rmk_VCVTUQQ2PSZ256rmkz_VCVTQQ2PSZ256rmbkz_VCVTUQQ2PSZ256rmbkz = 1991, |
| 21838 | VCVTPH2DQZrm_VCVTPH2DQZrmb_VCVTPH2UDQZrm_VCVTPH2UDQZrmb_VCVTTPH2DQZrm_VCVTTPH2DQZrmb_VCVTTPH2UDQZrm_VCVTTPH2UDQZrmb = 1992, |
| 21839 | VCVTPH2PSXZrm_VCVTPH2PSXZrmb = 1993, |
| 21840 | VCVTPD2PHZ128rm_VCVTPD2PHZ128rmb = 1994, |
| 21841 | VCVTPD2PHZ128rmbk_VCVTPD2PHZ128rmkz_VCVTPD2PHZ128rmbkz_VCVTPD2PHZ128rmk = 1995, |
| 21842 | VCVTPD2PHZ128rr = 1996, |
| 21843 | VCVTPD2PHZ128rrk_VCVTPD2PHZ128rrkz = 1997, |
| 21844 | VCVTPD2PHZ256rm_VCVTPD2PHZ256rmb = 1998, |
| 21845 | VCVTPD2PHZ256rmbk_VCVTPD2PHZ256rmkz_VCVTPD2PHZ256rmbkz_VCVTPD2PHZ256rmk = 1999, |
| 21846 | VCVTPD2PHZ256rr = 2000, |
| 21847 | VCVTPD2PHZ256rrk_VCVTPD2PHZ256rrkz = 2001, |
| 21848 | VCVTPD2PHZrm_VCVTPD2PHZrmb = 2002, |
| 21849 | VCVTPH2PDZrm_VCVTPH2PDZrmb = 2003, |
| 21850 | VCVTPD2PHZrmbk_VCVTPD2PHZrmkz_VCVTPD2PHZrmbkz_VCVTPD2PHZrmk = 2004, |
| 21851 | VCVTPH2PDZrmbk_VCVTPH2PDZrmkz_VCVTPH2PDZrmbkz_VCVTPH2PDZrmk = 2005, |
| 21852 | VCVTPD2PHZrr_VCVTPD2PHZrrb = 2006, |
| 21853 | VCVTPH2PDZrr_VCVTPH2PDZrrb = 2007, |
| 21854 | VCVTPD2PHZrrbk_VCVTPD2PHZrrkz_VCVTPD2PHZrrbkz_VCVTPD2PHZrrk = 2008, |
| 21855 | VCVTPH2PDZrrbk_VCVTPH2PDZrrkz_VCVTPH2PDZrrbkz_VCVTPH2PDZrrk = 2009, |
| 21856 | VPABSBZ128rmk_VPABSBZ128rmkz_VPABSWZ128rmk_VPABSWZ128rmkz = 2010, |
| 21857 | VPABSBZ256rmk_VPABSBZ256rmkz_VPABSWZ256rmk_VPABSWZ256rmkz = 2011, |
| 21858 | VPLZCNTDZ128rm_VPLZCNTDZ128rmb_VPLZCNTDZ128rmbk_VPLZCNTDZ128rmk_VPLZCNTDZ128rmkz_VPLZCNTQZ128rm_VPLZCNTQZ128rmb_VPLZCNTQZ128rmbk_VPLZCNTQZ128rmk_VPLZCNTQZ128rmkz_VPLZCNTDZ128rmbkz_VPLZCNTQZ128rmbkz = 2012, |
| 21859 | VPSLLWZ128mik_VPSLLWZ128mikz_VPSRLWZ128mik_VPSRLWZ128mikz_VPSRAWZ128mik_VPSRAWZ128mikz = 2013, |
| 21860 | VPSLLWZ256mik_VPSLLWZ256mikz_VPSRLWZ256mik_VPSRLWZ256mikz_VPSRAWZ256mik_VPSRAWZ256mikz = 2014, |
| 21861 | VFIXUPIMMSDZrmi_VFIXUPIMMSDZrmik_VFIXUPIMMSDZrmikz_VFIXUPIMMSSZrmi_VFIXUPIMMSSZrmik_VFIXUPIMMSSZrmikz_VSCALEFSDZrm_VSCALEFSDZrmk_VSCALEFSDZrmkz_VSCALEFSSZrm_VSCALEFSSZrmk_VSCALEFSSZrmkz = 2015, |
| 21862 | VPADDSBZ128rmk_VPADDSBZ128rmkz_VPADDSWZ128rmk_VPADDSWZ128rmkz_VPADDUSBZ128rmk_VPADDUSBZ128rmkz_VPADDUSWZ128rmk_VPADDUSWZ128rmkz_VPSUBSBZ128rmk_VPSUBSBZ128rmkz_VPSUBSWZ128rmk_VPSUBSWZ128rmkz_VPSUBUSBZ128rmk_VPSUBUSBZ128rmkz_VPSUBUSWZ128rmk_VPSUBUSWZ128rmkz_VPAVGBZ128rmk_VPAVGBZ128rmkz_VPAVGWZ128rmk_VPAVGWZ128rmkz_VPMAXSBZ128rmk_VPMAXSBZ128rmkz_VPMAXUWZ128rmk_VPMAXUWZ128rmkz_VPMINSBZ128rmk_VPMINSBZ128rmkz_VPMINUWZ128rmk_VPMINUWZ128rmkz_VPMAXSWZ128rmk_VPMAXSWZ128rmkz_VPMAXUBZ128rmk_VPMAXUBZ128rmkz_VPMINSWZ128rmk_VPMINSWZ128rmkz_VPMINUBZ128rmk_VPMINUBZ128rmkz = 2016, |
| 21863 | VPSHLDVWZ128mk_VPSHLDVWZ128mkz_VPSHRDVWZ128mk_VPSHRDVWZ128mkz = 2017, |
| 21864 | VPSLLVWZ128rmk_VPSLLVWZ128rmkz_VPSRLVWZ128rmk_VPSRLVWZ128rmkz_VPSRAVWZ128rmk_VPSRAVWZ128rmkz = 2018, |
| 21865 | VPSLLWZ128rmk_VPSLLWZ128rmkz_VPSRLWZ128rmk_VPSRLWZ128rmkz_VPSRAWZ128rmk_VPSRAWZ128rmkz = 2019, |
| 21866 | VPADDSBZ256rmk_VPADDSBZ256rmkz_VPADDSWZ256rmk_VPADDSWZ256rmkz_VPADDUSBZ256rmk_VPADDUSBZ256rmkz_VPADDUSWZ256rmk_VPADDUSWZ256rmkz_VPSUBSBZ256rmk_VPSUBSBZ256rmkz_VPSUBSWZ256rmk_VPSUBSWZ256rmkz_VPSUBUSBZ256rmk_VPSUBUSBZ256rmkz_VPSUBUSWZ256rmk_VPSUBUSWZ256rmkz_VPAVGBZ256rmk_VPAVGBZ256rmkz_VPAVGWZ256rmk_VPAVGWZ256rmkz_VPMAXSBZ256rmk_VPMAXSBZ256rmkz_VPMAXUWZ256rmk_VPMAXUWZ256rmkz_VPMINSBZ256rmk_VPMINSBZ256rmkz_VPMINUWZ256rmk_VPMINUWZ256rmkz_VPMAXSWZ256rmk_VPMAXSWZ256rmkz_VPMAXUBZ256rmk_VPMAXUBZ256rmkz_VPMINSWZ256rmk_VPMINSWZ256rmkz_VPMINUBZ256rmk_VPMINUBZ256rmkz = 2020, |
| 21867 | VPSHLDVWZ256mk_VPSHLDVWZ256mkz_VPSHRDVWZ256mk_VPSHRDVWZ256mkz = 2021, |
| 21868 | VPSLLVWZ256rmk_VPSLLVWZ256rmkz_VPSRLVWZ256rmk_VPSRLVWZ256rmkz_VPSRAVWZ256rmk_VPSRAVWZ256rmkz = 2022, |
| 21869 | VPSLLWZ256rmk_VPSLLWZ256rmkz_VPSRLWZ256rmk_VPSRLWZ256rmkz_VPSRAWZ256rmk_VPSRAWZ256rmkz = 2023, |
| 21870 | VPMADD52HUQZ128m_VPMADD52HUQZ128mb_VPMADD52HUQZ128mbk_VPMADD52HUQZ128mk_VPMADD52HUQZ128mkz_VPMADD52LUQZ128m_VPMADD52LUQZ128mb_VPMADD52LUQZ128mbk_VPMADD52LUQZ128mk_VPMADD52LUQZ128mkz_VPMADD52HUQZ128mbkz_VPMADD52LUQZ128mbkz = 2024, |
| 21871 | VCVTQQ2PDZ128rr_VCVTQQ2PDZ128rrk_VCVTQQ2PDZ128rrkz_VCVTUQQ2PDZ128rr_VCVTUQQ2PDZ128rrk_VCVTUQQ2PDZ128rrkz = 2025, |
| 21872 | VCVTQQ2PDZ256rr_VCVTQQ2PDZ256rrk_VCVTQQ2PDZ256rrkz_VCVTUQQ2PDZ256rr_VCVTUQQ2PDZ256rrk_VCVTUQQ2PDZ256rrkz = 2026, |
| 21873 | VFIXUPIMMSDZrri_VFIXUPIMMSSZrri_VSCALEFSDZrr_VSCALEFSDZrrk_VSCALEFSDZrrkz_VSCALEFSSZrr_VSCALEFSSZrrk_VSCALEFSSZrrkz = 2027, |
| 21874 | VPLZCNTDZ128rr_VPLZCNTDZ128rrk_VPLZCNTDZ128rrkz_VPLZCNTQZ128rr_VPLZCNTQZ128rrk_VPLZCNTQZ128rrkz = 2028, |
| 21875 | VPLZCNTDZ256rr_VPLZCNTDZ256rrk_VPLZCNTDZ256rrkz_VPLZCNTQZ256rr_VPLZCNTQZ256rrk_VPLZCNTQZ256rrkz = 2029, |
| 21876 | VPMADD52HUQZ128r_VPMADD52HUQZ128rk_VPMADD52HUQZ128rkz_VPMADD52LUQZ128r_VPMADD52LUQZ128rk_VPMADD52LUQZ128rkz = 2030, |
| 21877 | VPMADD52HUQZ256r_VPMADD52HUQZ256rk_VPMADD52HUQZ256rkz_VPMADD52LUQZ256r_VPMADD52LUQZ256rk_VPMADD52LUQZ256rkz = 2031, |
| 21878 | VFIXUPIMMSDZrrib_VFIXUPIMMSDZrribk_VFIXUPIMMSDZrribkz_VFIXUPIMMSSZrrib_VFIXUPIMMSSZrribk_VFIXUPIMMSSZrribkz = 2032, |
| 21879 | VCVTPH2DQZ128rm_VCVTPH2DQZ128rmb_VCVTPH2UDQZ128rm_VCVTPH2UDQZ128rmb_VCVTTPH2DQZ128rm_VCVTTPH2DQZ128rmb_VCVTTPH2UDQZ128rm_VCVTTPH2UDQZ128rmb = 2033, |
| 21880 | VCVTPS2PHXZ128rm_VCVTPS2PHXZ128rmb = 2034, |
| 21881 | VCVTPH2DQZ128rmbk_VCVTPH2DQZ128rmkz_VCVTPH2UDQZ128rmbk_VCVTPH2UDQZ128rmkz_VCVTTPH2DQZ128rmbk_VCVTTPH2DQZ128rmkz_VCVTTPH2UDQZ128rmbk_VCVTTPH2UDQZ128rmkz_VCVTPH2DQZ128rmbkz_VCVTPH2DQZ128rmk_VCVTPH2UDQZ128rmbkz_VCVTPH2UDQZ128rmk_VCVTTPH2DQZ128rmbkz_VCVTTPH2DQZ128rmk_VCVTTPH2UDQZ128rmbkz_VCVTTPH2UDQZ128rmk = 2035, |
| 21882 | VCVTPH2DQZ128rrk_VCVTPH2DQZ128rrkz_VCVTPH2UDQZ128rrk_VCVTPH2UDQZ128rrkz_VCVTTPH2DQZ128rrk_VCVTTPH2DQZ128rrkz_VCVTTPH2UDQZ128rrk_VCVTTPH2UDQZ128rrkz = 2036, |
| 21883 | VCVTPH2DQZ256rrk_VCVTPH2DQZ256rrkz_VCVTPH2UDQZ256rrk_VCVTPH2UDQZ256rrkz_VCVTTPH2DQZ256rrk_VCVTTPH2DQZ256rrkz_VCVTTPH2UDQZ256rrk_VCVTTPH2UDQZ256rrkz = 2037, |
| 21884 | VCVTPH2PSXZ256rrk_VCVTPH2PSXZ256rrkz = 2038, |
| 21885 | VCVTPH2PSZ256rrk_VCVTPH2PSZ256rrkz = 2039, |
| 21886 | VCVTPS2PHXZ256rrk_VCVTPS2PHXZ256rrkz = 2040, |
| 21887 | VCVTPS2PHZ256rrk_VCVTPS2PHZ256rrkz = 2041, |
| 21888 | VCVTPH2DQZ256rmbk_VCVTPH2DQZ256rmkz_VCVTPH2UDQZ256rmbk_VCVTPH2UDQZ256rmkz_VCVTTPH2DQZ256rmbk_VCVTTPH2DQZ256rmkz_VCVTTPH2UDQZ256rmbk_VCVTTPH2UDQZ256rmkz_VCVTPH2DQZ256rmbkz_VCVTPH2DQZ256rmk_VCVTPH2UDQZ256rmbkz_VCVTPH2UDQZ256rmk_VCVTTPH2DQZ256rmbkz_VCVTTPH2DQZ256rmk_VCVTTPH2UDQZ256rmbkz_VCVTTPH2UDQZ256rmk = 2042, |
| 21889 | VCVTPH2PSXZ256rmbk_VCVTPH2PSXZ256rmkz_VCVTPH2PSXZ256rmbkz_VCVTPH2PSXZ256rmk = 2043, |
| 21890 | VCVTPS2PHXZ256rmbk_VCVTPS2PHXZ256rmkz_VCVTPS2PHXZ256rmbkz_VCVTPS2PHXZ256rmk = 2044, |
| 21891 | VCVTPH2DQZrmbk_VCVTPH2DQZrmkz_VCVTPH2UDQZrmbk_VCVTPH2UDQZrmkz_VCVTTPH2DQZrmbk_VCVTTPH2DQZrmkz_VCVTTPH2UDQZrmbk_VCVTTPH2UDQZrmkz_VCVTPH2DQZrmbkz_VCVTPH2DQZrmk_VCVTPH2UDQZrmbkz_VCVTPH2UDQZrmk_VCVTTPH2DQZrmbkz_VCVTTPH2DQZrmk_VCVTTPH2UDQZrmbkz_VCVTTPH2UDQZrmk = 2045, |
| 21892 | VCVTPH2PSXZrmbk_VCVTPH2PSXZrmkz_VCVTPH2PSXZrmbkz_VCVTPH2PSXZrmk = 2046, |
| 21893 | VCVTPS2PHXZrmbk_VCVTPS2PHXZrmkz_VCVTPS2PHXZrmbkz_VCVTPS2PHXZrmk = 2047, |
| 21894 | VCVTPH2DQZrr_VCVTPH2DQZrrb_VCVTPH2UDQZrr_VCVTPH2UDQZrrb_VCVTTPH2DQZrr_VCVTTPH2DQZrrb_VCVTTPH2UDQZrr_VCVTTPH2UDQZrrb = 2048, |
| 21895 | VCVTPH2PSXZrr_VCVTPH2PSXZrrb = 2049, |
| 21896 | VCVTPH2PSZrr_VCVTPH2PSZrrb = 2050, |
| 21897 | VCVTPS2PHXZrr_VCVTPS2PHXZrrb = 2051, |
| 21898 | VCVTPS2PHZrr_VCVTPS2PHZrrb = 2052, |
| 21899 | VPSHUFBITQMBZ128rrk = 2053, |
| 21900 | VPSHUFBITQMBZ256rrk = 2054, |
| 21901 | VPSHUFBITQMBZrrk = 2055, |
| 21902 | VCVTPH2DQZrrbk_VCVTPH2DQZrrkz_VCVTPH2UDQZrrbk_VCVTPH2UDQZrrkz_VCVTTPH2DQZrrbk_VCVTTPH2DQZrrkz_VCVTTPH2UDQZrrbk_VCVTTPH2UDQZrrkz_VCVTPH2DQZrrbkz_VCVTPH2DQZrrk_VCVTPH2UDQZrrbkz_VCVTPH2UDQZrrk_VCVTTPH2DQZrrbkz_VCVTTPH2DQZrrk_VCVTTPH2UDQZrrbkz_VCVTTPH2UDQZrrk = 2056, |
| 21903 | VCVTPH2PSXZrrbk_VCVTPH2PSXZrrkz_VCVTPH2PSXZrrbkz_VCVTPH2PSXZrrk = 2057, |
| 21904 | VCVTPS2PHXZrrbk_VCVTPS2PHXZrrkz_VCVTPS2PHXZrrbkz_VCVTPS2PHXZrrk = 2058, |
| 21905 | VCVTPH2PDZ128rm_VCVTPH2PDZ128rmb = 2059, |
| 21906 | VCVTPH2PDZ128rmbk_VCVTPH2PDZ128rmkz_VCVTPH2PDZ128rmbkz_VCVTPH2PDZ128rmk = 2060, |
| 21907 | VCVTPH2PDZ128rr = 2061, |
| 21908 | VCVTPH2PDZ128rrk_VCVTPH2PDZ128rrkz = 2062, |
| 21909 | VCVTPH2PDZ256rm_VCVTPH2PDZ256rmb = 2063, |
| 21910 | VCVTPH2PDZ256rmbk_VCVTPH2PDZ256rmkz_VCVTPH2PDZ256rmbkz_VCVTPH2PDZ256rmk = 2064, |
| 21911 | VCVTPH2PDZ256rr = 2065, |
| 21912 | VCVTPH2PDZ256rrk_VCVTPH2PDZ256rrkz = 2066, |
| 21913 | VCVTPH2PSXZ128rrk_VCVTPH2PSXZ128rrkz = 2067, |
| 21914 | VCVTPH2PSZ128rrk_VCVTPH2PSZ128rrkz = 2068, |
| 21915 | VCVTPS2PHXZ128rrk_VCVTPS2PHXZ128rrkz = 2069, |
| 21916 | VCVTPS2PHZ128rrk_VCVTPS2PHZ128rrkz = 2070, |
| 21917 | VCVTPH2PSZ128rmk_VCVTPH2PSZ128rmkz = 2071, |
| 21918 | VCVTPH2PSZ256rmk_VCVTPH2PSZ256rmkz = 2072, |
| 21919 | VCVTSH2SSZrm_Intk_VCVTSH2SSZrm_Intkz = 2073, |
| 21920 | VPMADDUBSWZ128rmk_VPMADDUBSWZ128rmkz_VPMULHRSWZ128rmk_VPMULHRSWZ128rmkz_VPMULHUWZ128rmk_VPMULHUWZ128rmkz_VPMULHWZ128rmk_VPMULHWZ128rmkz_VPMULLWZ128rmk_VPMULLWZ128rmkz = 2074, |
| 21921 | VPMADDUBSWZ256rmk_VPMADDUBSWZ256rmkz_VPMULHRSWZ256rmk_VPMULHRSWZ256rmkz_VPMULHUWZ256rmk_VPMULHUWZ256rmkz_VPMULHWZ256rmk_VPMULHWZ256rmkz_VPMULLWZ256rmk_VPMULLWZ256rmkz = 2075, |
| 21922 | VCVTPH2PSZrm = 2076, |
| 21923 | VPERMWZrmk_VPERMWZrmkz = 2077, |
| 21924 | VCVTPH2QQZ128rm_VCVTPH2QQZ128rmb_VCVTPH2QQZ128rmbk_VCVTPH2QQZ128rmk_VCVTPH2QQZ128rmkz_VCVTPH2UQQZ128rm_VCVTPH2UQQZ128rmb_VCVTPH2UQQZ128rmbk_VCVTPH2UQQZ128rmk_VCVTPH2UQQZ128rmkz_VCVTTPH2QQZ128rm_VCVTTPH2QQZ128rmb_VCVTTPH2QQZ128rmbk_VCVTTPH2QQZ128rmk_VCVTTPH2QQZ128rmkz_VCVTTPH2UQQZ128rm_VCVTTPH2UQQZ128rmb_VCVTTPH2UQQZ128rmbk_VCVTTPH2UQQZ128rmk_VCVTTPH2UQQZ128rmkz_VCVTPH2QQZ128rmbkz_VCVTPH2UQQZ128rmbkz_VCVTTPH2QQZ128rmbkz_VCVTTPH2UQQZ128rmbkz = 2078, |
| 21925 | VCVTPH2QQZ128rr_VCVTPH2QQZ128rrk_VCVTPH2QQZ128rrkz_VCVTPH2UQQZ128rr_VCVTPH2UQQZ128rrk_VCVTPH2UQQZ128rrkz_VCVTTPH2QQZ128rr_VCVTTPH2QQZ128rrk_VCVTTPH2QQZ128rrkz_VCVTTPH2UQQZ128rr_VCVTTPH2UQQZ128rrk_VCVTTPH2UQQZ128rrkz = 2079, |
| 21926 | VCVTPH2QQZ256rr_VCVTPH2QQZ256rrk_VCVTPH2QQZ256rrkz_VCVTPH2UQQZ256rr_VCVTPH2UQQZ256rrk_VCVTPH2UQQZ256rrkz_VCVTTPH2QQZ256rr_VCVTTPH2QQZ256rrk_VCVTTPH2QQZ256rrkz_VCVTTPH2UQQZ256rr_VCVTTPH2UQQZ256rrk_VCVTTPH2UQQZ256rrkz = 2080, |
| 21927 | VCVTPH2QQZ256rm_VCVTPH2QQZ256rmb_VCVTPH2QQZ256rmbk_VCVTPH2QQZ256rmk_VCVTPH2QQZ256rmkz_VCVTPH2UQQZ256rm_VCVTPH2UQQZ256rmb_VCVTPH2UQQZ256rmbk_VCVTPH2UQQZ256rmk_VCVTPH2UQQZ256rmkz_VCVTTPH2QQZ256rm_VCVTTPH2QQZ256rmb_VCVTTPH2QQZ256rmbk_VCVTTPH2QQZ256rmk_VCVTTPH2QQZ256rmkz_VCVTTPH2UQQZ256rm_VCVTTPH2UQQZ256rmb_VCVTTPH2UQQZ256rmbk_VCVTTPH2UQQZ256rmk_VCVTTPH2UQQZ256rmkz_VCVTPH2QQZ256rmbkz_VCVTPH2UQQZ256rmbkz_VCVTTPH2QQZ256rmbkz_VCVTTPH2UQQZ256rmbkz = 2081, |
| 21928 | VCVTPS2PHXZ128rmbk_VCVTPS2PHXZ128rmkz_VCVTPS2PHXZ128rmbkz_VCVTPS2PHXZ128rmk = 2082, |
| 21929 | VCVTPS2PHXZ256rm_VCVTPS2PHXZ256rmb = 2083, |
| 21930 | VCVTPS2PHXZrm_VCVTPS2PHXZrmb = 2084, |
| 21931 | VCVTPS2PHZ128mrk = 2085, |
| 21932 | VCVTPS2PHZ256mrk = 2086, |
| 21933 | VCVTPS2PHZmrk = 2087, |
| 21934 | VCVTQQ2PHZ128rm_VCVTQQ2PHZ128rmb_VCVTUQQ2PHZ128rm_VCVTUQQ2PHZ128rmb = 2088, |
| 21935 | VCVTQQ2PHZ128rmbk_VCVTQQ2PHZ128rmkz_VCVTUQQ2PHZ128rmbk_VCVTUQQ2PHZ128rmkz_VCVTQQ2PHZ128rmbkz_VCVTQQ2PHZ128rmk_VCVTUQQ2PHZ128rmbkz_VCVTUQQ2PHZ128rmk = 2089, |
| 21936 | VCVTQQ2PHZ128rr_VCVTUQQ2PHZ128rr = 2090, |
| 21937 | VCVTQQ2PHZ128rrk_VCVTQQ2PHZ128rrkz_VCVTUQQ2PHZ128rrk_VCVTUQQ2PHZ128rrkz = 2091, |
| 21938 | VCVTQQ2PHZ256rr_VCVTUQQ2PHZ256rr = 2092, |
| 21939 | VCVTQQ2PHZ256rm_VCVTQQ2PHZ256rmb_VCVTUQQ2PHZ256rm_VCVTUQQ2PHZ256rmb = 2093, |
| 21940 | VCVTQQ2PHZ256rmbk_VCVTQQ2PHZ256rmkz_VCVTUQQ2PHZ256rmbk_VCVTUQQ2PHZ256rmkz_VCVTQQ2PHZ256rmbkz_VCVTQQ2PHZ256rmk_VCVTUQQ2PHZ256rmbkz_VCVTUQQ2PHZ256rmk = 2094, |
| 21941 | VCVTQQ2PHZ256rrk_VCVTQQ2PHZ256rrkz_VCVTUQQ2PHZ256rrk_VCVTUQQ2PHZ256rrkz = 2095, |
| 21942 | VCVTQQ2PHZrm_VCVTQQ2PHZrmb_VCVTUQQ2PHZrm_VCVTUQQ2PHZrmb = 2096, |
| 21943 | VCVTQQ2PHZrmbk_VCVTQQ2PHZrmkz_VCVTUQQ2PHZrmbk_VCVTUQQ2PHZrmkz_VCVTQQ2PHZrmbkz_VCVTQQ2PHZrmk_VCVTUQQ2PHZrmbkz_VCVTUQQ2PHZrmk = 2097, |
| 21944 | VCVTQQ2PHZrr_VCVTQQ2PHZrrb_VCVTUQQ2PHZrr_VCVTUQQ2PHZrrb = 2098, |
| 21945 | VCVTQQ2PHZrrbk_VCVTQQ2PHZrrkz_VCVTUQQ2PHZrrbk_VCVTUQQ2PHZrrkz_VCVTQQ2PHZrrbkz_VCVTQQ2PHZrrk_VCVTUQQ2PHZrrbkz_VCVTUQQ2PHZrrk = 2099, |
| 21946 | VCVTSD2SHZrm_VCVTSD2SHZrm_Int = 2100, |
| 21947 | VCVTSD2SHZrm_Intk_VCVTSD2SHZrm_Intkz = 2101, |
| 21948 | VCVTSD2SHZrr_Int_VCVTSD2SHZrrb_Int = 2102, |
| 21949 | VCVTSD2SHZrr = 2103, |
| 21950 | VCVTSD2SHZrr_Intk_VCVTSD2SHZrr_Intkz_VCVTSD2SHZrrb_Intk_VCVTSD2SHZrrb_Intkz = 2104, |
| 21951 | VCVTSH2SDZrm_VCVTSH2SDZrm_Int = 2105, |
| 21952 | VCVTSH2SDZrm_Intk_VCVTSH2SDZrm_Intkz = 2106, |
| 21953 | VCVTSH2SDZrr_Int_VCVTSH2SDZrrb_Int = 2107, |
| 21954 | VCVTSH2SDZrr = 2108, |
| 21955 | VCVTSH2SDZrr_Intk_VCVTSH2SDZrr_Intkz_VCVTSH2SDZrrb_Intk_VCVTSH2SDZrrb_Intkz = 2109, |
| 21956 | VCVTSH2SI64Zrm_Int_VCVTSH2SIZrm_Int_VCVTSH2USI64Zrm_Int_VCVTSH2USIZrm_Int_VCVTTSH2SI64Zrm_Int_VCVTTSH2SIZrm_Int_VCVTTSH2USI64Zrm_Int_VCVTTSH2USIZrm_Int_VCVTTSH2SI64Zrm_VCVTTSH2SIZrm_VCVTTSH2USI64Zrm_VCVTTSH2USIZrm = 2110, |
| 21957 | VCVTSH2SI64Zrr_Int_VCVTSH2SI64Zrrb_Int_VCVTSH2SIZrr_Int_VCVTSH2SIZrrb_Int_VCVTSH2USI64Zrr_Int_VCVTSH2USI64Zrrb_Int_VCVTSH2USIZrr_Int_VCVTSH2USIZrrb_Int_VCVTTSH2SI64Zrr_Int_VCVTTSH2SI64Zrrb_Int_VCVTTSH2SIZrr_Int_VCVTTSH2SIZrrb_Int_VCVTTSH2USI64Zrr_Int_VCVTTSH2USI64Zrrb_Int_VCVTTSH2USIZrr_Int_VCVTTSH2USIZrrb_Int_VCVTTSH2SI64Zrr_VCVTTSH2SIZrr_VCVTTSH2USI64Zrr_VCVTTSH2USIZrr = 2111, |
| 21958 | VCVTSH2SSZrr_Intk_VCVTSH2SSZrr_Intkz_VCVTSH2SSZrrb_Intk_VCVTSH2SSZrrb_Intkz = 2112, |
| 21959 | VCVTSI2SHZrm_VCVTSI2SHZrm_Int_VCVTSI642SHZrm_VCVTSI642SHZrm_Int_VCVTUSI2SHZrm_VCVTUSI2SHZrm_Int_VCVTUSI642SHZrm_VCVTUSI642SHZrm_Int = 2113, |
| 21960 | VCVTSS2SHZrm_VCVTSS2SHZrm_Int = 2114, |
| 21961 | VCVTSS2SHZrm_Intk_VCVTSS2SHZrm_Intkz = 2115, |
| 21962 | VCVTSS2SHZrr_Int_VCVTSS2SHZrrb_Int = 2116, |
| 21963 | VCVTSS2SHZrr = 2117, |
| 21964 | VCVTSS2SHZrr_Intk_VCVTSS2SHZrr_Intkz_VCVTSS2SHZrrb_Intk_VCVTSS2SHZrrb_Intkz = 2118, |
| 21965 | VDBPSADBWZ128rrik_VDBPSADBWZ128rrikz = 2119, |
| 21966 | VDBPSADBWZ256rrik_VDBPSADBWZ256rrikz = 2120, |
| 21967 | VDBPSADBWZrrik_VDBPSADBWZrrikz = 2121, |
| 21968 | VPACKSSDWZrrk_VPACKSSDWZrrkz_VPACKSSWBZrrk_VPACKSSWBZrrkz_VPACKUSDWZrrk_VPACKUSDWZrrkz_VPACKUSWBZrrk_VPACKUSWBZrrkz = 2122, |
| 21969 | VPBROADCASTBZ256rrk_VPBROADCASTBZ256rrkz_VPBROADCASTBZrrk_VPBROADCASTBZrrkz_VPBROADCASTDrZ256rrk_VPBROADCASTDrZ256rrkz_VPBROADCASTDrZrrk_VPBROADCASTDrZrrkz_VPBROADCASTQrZ256rrk_VPBROADCASTQrZ256rrkz_VPBROADCASTQrZrrk_VPBROADCASTQrZrrkz_VPBROADCASTWZ256rrk_VPBROADCASTWZ256rrkz_VPBROADCASTWZrrk_VPBROADCASTWZrrkz_VPBROADCASTWrZ256rrk_VPBROADCASTWrZ256rrkz_VPBROADCASTWrZrrk_VPBROADCASTWrZrrkz_VPBROADCASTBrZ256rr_VPBROADCASTDrZ256rr_VPBROADCASTQrZ256rr_VPBROADCASTWrZ256rr_VPBROADCASTBrZ256rrk_VPBROADCASTBrZ256rrkz_VPBROADCASTBrZrr_VPBROADCASTDrZrr_VPBROADCASTQrZrr_VPBROADCASTWrZrr_VPBROADCASTBrZrrk_VPBROADCASTBrZrrkz = 2123, |
| 21970 | VPBROADCASTBrZ128rr_VPBROADCASTDrZ128rr_VPBROADCASTQrZ128rr_VPBROADCASTWrZ128rr_VPBROADCASTBrZ128rrk_VPBROADCASTBrZ128rrkz_VPBROADCASTDrZ128rrk_VPBROADCASTDrZ128rrkz_VPBROADCASTQrZ128rrk_VPBROADCASTQrZ128rrkz_VPBROADCASTWrZ128rrk_VPBROADCASTWrZ128rrkz = 2124, |
| 21971 | VPERMBZ128rrk_VPERMBZ128rrkz = 2125, |
| 21972 | VPERMBZ256rrk_VPERMBZ256rrkz = 2126, |
| 21973 | VPERMBZrrk_VPERMBZrrkz = 2127, |
| 21974 | VPMOVSXBWZ256rrk_VPMOVSXBWZ256rrkz_VPMOVZXBWZ256rrk_VPMOVZXBWZ256rrkz = 2128, |
| 21975 | VPMOVSXBWZrrk_VPMOVSXBWZrrkz_VPMOVZXBWZrrk_VPMOVZXBWZrrkz = 2129, |
| 21976 | VPMULTISHIFTQBZ128rrk_VPMULTISHIFTQBZ128rrkz = 2130, |
| 21977 | VPMULTISHIFTQBZ256rrk_VPMULTISHIFTQBZ256rrkz_VPOPCNTBZ256rrk_VPOPCNTBZ256rrkz_VPOPCNTWZ256rrk_VPOPCNTWZ256rrkz = 2131, |
| 21978 | VPMULTISHIFTQBZrrk_VPMULTISHIFTQBZrrkz_VPOPCNTBZrrk_VPOPCNTBZrrkz_VPOPCNTWZrrk_VPOPCNTWZrrkz = 2132, |
| 21979 | VPOPCNTBZ128rrk_VPOPCNTBZ128rrkz_VPOPCNTWZ128rrk_VPOPCNTWZ128rrkz = 2133, |
| 21980 | VDIVPHZ128rm_VDIVPHZ128rmb = 2134, |
| 21981 | VDIVPHZ128rmbk_VDIVPHZ128rmkz_VDIVPHZ128rmbkz_VDIVPHZ128rmk = 2135, |
| 21982 | VDIVPHZ128rr = 2136, |
| 21983 | VDIVPHZ256rr = 2137, |
| 21984 | VDIVPHZ128rrk = 2138, |
| 21985 | VDIVPHZ256rrk = 2139, |
| 21986 | VSQRTPHZ128r = 2140, |
| 21987 | VSQRTPHZ256r = 2141, |
| 21988 | VDIVPHZ128rrkz = 2142, |
| 21989 | VDIVPHZ256rm_VDIVPHZ256rmb = 2143, |
| 21990 | VDIVPHZ256rmbk_VDIVPHZ256rmkz_VDIVPHZ256rmbkz_VDIVPHZ256rmk = 2144, |
| 21991 | VSQRTPHZ128m_VSQRTPHZ128mb = 2145, |
| 21992 | VDIVPHZ256rrkz = 2146, |
| 21993 | VDIVPHZrm_VDIVPHZrmb = 2147, |
| 21994 | VDIVPHZrmbk_VDIVPHZrmkz_VDIVPHZrmbkz_VDIVPHZrmk = 2148, |
| 21995 | VDIVPHZrr_VDIVPHZrrb = 2149, |
| 21996 | VDIVPHZrrbk_VDIVPHZrrkz_VDIVPHZrrbkz_VDIVPHZrrk = 2150, |
| 21997 | VDIVPSZrr = 2151, |
| 21998 | VDIVSHZrm_Int_VDIVSHZrm_Intk_VDIVSHZrm_Intkz = 2152, |
| 21999 | VDIVSHZrm = 2153, |
| 22000 | VDIVSHZrr_Int = 2154, |
| 22001 | VSQRTSHZr_Int = 2155, |
| 22002 | VDPBF16PSZ128m_VDPBF16PSZ128mb_VDPBF16PSZ128mbk_VDPBF16PSZ128mk_VDPBF16PSZ128mkz = 2156, |
| 22003 | VDPBF16PSZ128mbkz = 2157, |
| 22004 | VDPBF16PSZ256m_VDPBF16PSZ256mb_VDPBF16PSZ256mbk_VDPBF16PSZ256mk_VDPBF16PSZ256mkz = 2158, |
| 22005 | VDPBF16PSZ256mbkz = 2159, |
| 22006 | VPEXPANDBZ128rm_VPEXPANDWZ128rm = 2160, |
| 22007 | VFCMADDCPHZ128m_VFCMADDCPHZ128mb_VFMADDCPHZ128m_VFMADDCPHZ128mb = 2161, |
| 22008 | VFCMADDCPHZ256m_VFCMADDCPHZ256mb_VFMADDCPHZ256m_VFMADDCPHZ256mb = 2162, |
| 22009 | VROUNDPDYmi_VROUNDPSYmi = 2163, |
| 22010 | VFCMADDCSHZm_VFMADDCSHZm_VFCMULCPHZ128rm_VFCMULCPHZ128rmb_VFMULCPHZ128rm_VFMULCPHZ128rmb_VFCMULCSHZrm_VFMULCSHZrm = 2164, |
| 22011 | VRNDSCALEPHZ128rmbi_VRNDSCALEPHZ128rmi_VRNDSCALESHZm_VRNDSCALESHZm_Int = 2165, |
| 22012 | VSCALEFPHZ128rm_VSCALEFPHZ128rmb = 2166, |
| 22013 | VFCMULCPHZ256rm_VFCMULCPHZ256rmb_VFMULCPHZ256rm_VFMULCPHZ256rmb = 2167, |
| 22014 | VRNDSCALEPDZ256rmbi_VRNDSCALEPDZ256rmi_VRNDSCALEPHZ256rmbi_VRNDSCALEPHZ256rmi_VRNDSCALEPSZ256rmbi_VRNDSCALEPSZ256rmi_VRNDSCALEPDZ256rmbik_VRNDSCALEPDZ256rmbikz_VRNDSCALEPDZ256rmik_VRNDSCALEPDZ256rmikz_VRNDSCALEPSZ256rmbik_VRNDSCALEPSZ256rmbikz_VRNDSCALEPSZ256rmik_VRNDSCALEPSZ256rmikz = 2168, |
| 22015 | VSCALEFPHZ256rm_VSCALEFPHZ256rmb = 2169, |
| 22016 | VSCALEFSHZrm = 2170, |
| 22017 | VFCMADDCPHZ128mbk_VFCMADDCPHZ128mkz_VFMADDCPHZ128mbk_VFMADDCPHZ128mkz_VFCMADDCPHZ128mbkz_VFCMADDCPHZ128mk_VFMADDCPHZ128mbkz_VFMADDCPHZ128mk = 2171, |
| 22018 | VFCMADDCPHZ256mbk_VFCMADDCPHZ256mkz_VFMADDCPHZ256mbk_VFMADDCPHZ256mkz_VFCMADDCPHZ256mbkz_VFCMADDCPHZ256mk_VFMADDCPHZ256mbkz_VFMADDCPHZ256mk = 2172, |
| 22019 | VFCMADDCSHZmk_VFCMADDCSHZmkz_VFMADDCSHZmk_VFMADDCSHZmkz_VFCMULCPHZ128rmbk_VFCMULCPHZ128rmkz_VFMULCPHZ128rmbk_VFMULCPHZ128rmkz_VFCMULCPHZ128rmbkz_VFCMULCPHZ128rmk_VFMULCPHZ128rmbkz_VFMULCPHZ128rmk_VFCMULCSHZrmk_VFCMULCSHZrmkz_VFMULCSHZrmk_VFMULCSHZrmkz = 2173, |
| 22020 | VFCMULCPHZ256rmbk_VFCMULCPHZ256rmkz_VFMULCPHZ256rmbk_VFMULCPHZ256rmkz_VFCMULCPHZ256rmbkz_VFCMULCPHZ256rmk_VFMULCPHZ256rmbkz_VFMULCPHZ256rmk = 2174, |
| 22021 | VFCMADDCPHZ128r_VFMADDCPHZ128r_VFCMADDCSHZr_VFCMADDCSHZrb_VFMADDCSHZr_VFMADDCSHZrb_VFCMULCPHZ128rr_VFMULCPHZ128rr_VFCMULCSHZrr_VFCMULCSHZrrb_VFMULCSHZrr_VFMULCSHZrrb = 2175, |
| 22022 | VFCMADDCPHZ256r_VFMADDCPHZ256r_VFCMULCPHZ256rr_VFMULCPHZ256rr = 2176, |
| 22023 | VRNDSCALEPHZ128rri_VRNDSCALESHZr_Int_VRNDSCALESHZrb_Int = 2177, |
| 22024 | VRNDSCALEPHZ256rri = 2178, |
| 22025 | VSCALEFPHZ128rr = 2179, |
| 22026 | VSCALEFPHZ256rr = 2180, |
| 22027 | VRNDSCALESHZr = 2181, |
| 22028 | VSCALEFSHZrr_VSCALEFSHZrrb_Int = 2182, |
| 22029 | VFCMADDCPHZ128rk_VFCMADDCPHZ128rkz_VFMADDCPHZ128rk_VFMADDCPHZ128rkz_VFCMADDCSHZrbk_VFCMADDCSHZrkz_VFMADDCSHZrbk_VFMADDCSHZrkz_VFCMADDCSHZrbkz_VFCMADDCSHZrk_VFMADDCSHZrbkz_VFMADDCSHZrk_VFCMULCPHZ128rrk_VFCMULCPHZ128rrkz_VFMULCPHZ128rrk_VFMULCPHZ128rrkz_VFCMULCSHZrrbk_VFCMULCSHZrrkz_VFMULCSHZrrbk_VFMULCSHZrrkz_VFCMULCSHZrrbkz_VFCMULCSHZrrk_VFMULCSHZrrbkz_VFMULCSHZrrk = 2183, |
| 22030 | VFCMADDCPHZ256rk_VFCMADDCPHZ256rkz_VFMADDCPHZ256rk_VFMADDCPHZ256rkz_VFCMULCPHZ256rrk_VFCMULCPHZ256rrkz_VFMULCPHZ256rrk_VFMULCPHZ256rrkz = 2184, |
| 22031 | VFCMADDCPHZm_VFCMADDCPHZmb_VFMADDCPHZm_VFMADDCPHZmb = 2185, |
| 22032 | VFCMULCPHZrm_VFCMULCPHZrmb_VFMULCPHZrm_VFMULCPHZrmb = 2186, |
| 22033 | VRNDSCALEPDZrmbi_VRNDSCALEPDZrmi_VRNDSCALEPHZrmbi_VRNDSCALEPHZrmi_VRNDSCALEPSZrmbi_VRNDSCALEPSZrmi_VRNDSCALEPDZrmbik_VRNDSCALEPDZrmbikz_VRNDSCALEPDZrmik_VRNDSCALEPDZrmikz_VRNDSCALEPSZrmbik_VRNDSCALEPSZrmbikz_VRNDSCALEPSZrmik_VRNDSCALEPSZrmikz = 2187, |
| 22034 | VSCALEFPHZrm_VSCALEFPHZrmb = 2188, |
| 22035 | VFCMADDCPHZmbk_VFCMADDCPHZmkz_VFMADDCPHZmbk_VFMADDCPHZmkz_VFCMADDCPHZmbkz_VFCMADDCPHZmk_VFMADDCPHZmbkz_VFMADDCPHZmk = 2189, |
| 22036 | VFCMULCPHZrmbk_VFCMULCPHZrmkz_VFMULCPHZrmbk_VFMULCPHZrmkz_VFCMULCPHZrmbkz_VFCMULCPHZrmk_VFMULCPHZrmbkz_VFMULCPHZrmk = 2190, |
| 22037 | VFCMADDCPHZr_VFCMADDCPHZrb_VFMADDCPHZr_VFMADDCPHZrb_VFCMULCPHZrr_VFCMULCPHZrrb_VFMULCPHZrr_VFMULCPHZrrb = 2191, |
| 22038 | VRNDSCALEPHZrri_VRNDSCALEPHZrrib = 2192, |
| 22039 | VSCALEFPHZrr_VSCALEFPHZrrb = 2193, |
| 22040 | VFCMADDCPHZrbk_VFCMADDCPHZrkz_VFMADDCPHZrbk_VFMADDCPHZrkz_VFCMADDCPHZrbkz_VFCMADDCPHZrk_VFMADDCPHZrbkz_VFMADDCPHZrk_VFCMULCPHZrrbk_VFCMULCPHZrrkz_VFMULCPHZrrbk_VFMULCPHZrrkz_VFCMULCPHZrrbkz_VFCMULCPHZrrk_VFMULCPHZrrbkz_VFMULCPHZrrk = 2194, |
| 22041 | VGATHERDPDZ128rm_VGATHERQPDZ128rm_VPGATHERDQZ128rm_VPGATHERQQZ128rm = 2195, |
| 22042 | VGATHERDPDZ256rm_VGATHERQPDZ256rm_VPGATHERDQZ256rm_VPGATHERQQZ256rm = 2196, |
| 22043 | VGATHERQPSZ256rm_VPGATHERQDZ256rm = 2197, |
| 22044 | VGATHERDPDZrm_VGATHERQPDZrm_VPGATHERDQZrm_VPGATHERQQZrm = 2198, |
| 22045 | VGATHERQPSZrm_VPGATHERQDZrm = 2199, |
| 22046 | VGF2P8AFFINEINVQBZ128rmbik_VGF2P8AFFINEINVQBZ128rmbikz_VGF2P8AFFINEINVQBZ128rmik_VGF2P8AFFINEINVQBZ128rmikz_VGF2P8AFFINEQBZ128rmbik_VGF2P8AFFINEQBZ128rmbikz_VGF2P8AFFINEQBZ128rmik_VGF2P8AFFINEQBZ128rmikz = 2200, |
| 22047 | VGF2P8MULBZ128rmk_VGF2P8MULBZ128rmkz = 2201, |
| 22048 | VGF2P8AFFINEINVQBZ256rmbik_VGF2P8AFFINEINVQBZ256rmbikz_VGF2P8AFFINEINVQBZ256rmik_VGF2P8AFFINEINVQBZ256rmikz_VGF2P8AFFINEQBZ256rmbik_VGF2P8AFFINEQBZ256rmbikz_VGF2P8AFFINEQBZ256rmik_VGF2P8AFFINEQBZ256rmikz = 2202, |
| 22049 | VGF2P8MULBZ256rmk_VGF2P8MULBZ256rmkz = 2203, |
| 22050 | VGF2P8AFFINEINVQBZ128rrik_VGF2P8AFFINEQBZ128rrik = 2204, |
| 22051 | VGF2P8AFFINEINVQBZ256rrik_VGF2P8AFFINEQBZ256rrik = 2205, |
| 22052 | VGF2P8MULBZ128rrk = 2206, |
| 22053 | VGF2P8MULBZ256rrk = 2207, |
| 22054 | VGF2P8AFFINEINVQBZ128rrikz_VGF2P8AFFINEQBZ128rrikz = 2208, |
| 22055 | VGF2P8AFFINEINVQBZ256rrikz_VGF2P8AFFINEQBZ256rrikz = 2209, |
| 22056 | VGF2P8MULBZ128rrkz = 2210, |
| 22057 | VGF2P8MULBZ256rrkz = 2211, |
| 22058 | VGF2P8AFFINEINVQBZrmbik_VGF2P8AFFINEINVQBZrmbikz_VGF2P8AFFINEINVQBZrmik_VGF2P8AFFINEINVQBZrmikz_VGF2P8AFFINEQBZrmbik_VGF2P8AFFINEQBZrmbikz_VGF2P8AFFINEQBZrmik_VGF2P8AFFINEQBZrmikz = 2212, |
| 22059 | VGF2P8MULBZrmk_VGF2P8MULBZrmkz = 2213, |
| 22060 | VGF2P8AFFINEINVQBZrrik_VGF2P8AFFINEQBZrrik = 2214, |
| 22061 | VGF2P8MULBZrrk = 2215, |
| 22062 | VGF2P8AFFINEINVQBZrrikz_VGF2P8AFFINEQBZrrikz = 2216, |
| 22063 | VGF2P8MULBZrrkz = 2217, |
| 22064 | VMOVDQU16Z128rmk_VMOVDQU16Z128rmkz_VMOVDQU8Z128rmk_VMOVDQU8Z128rmkz = 2218, |
| 22065 | VMOVDQU16Z256rmk_VMOVDQU16Z256rmkz_VMOVDQU8Z256rmk_VMOVDQU8Z256rmkz = 2219, |
| 22066 | VMOVSHZrmk_VMOVSHZrmkz = 2220, |
| 22067 | VPBLENDMBZ128rmk_VPBLENDMBZ128rmkz_VPBLENDMWZ128rmk_VPBLENDMWZ128rmkz = 2221, |
| 22068 | VPBLENDMBZ256rmk_VPBLENDMBZ256rmkz_VPBLENDMWZ256rmk_VPBLENDMWZ256rmkz = 2222, |
| 22069 | VMOVDQU16Z128rrk_VMOVDQU16Z128rrk_REV_VMOVDQU16Z128rrkz_VMOVDQU16Z128rrkz_REV_VMOVDQU8Z128rrk_VMOVDQU8Z128rrk_REV_VMOVDQU8Z128rrkz_VMOVDQU8Z128rrkz_REV_VPMOVM2BZ128rr_VPMOVM2WZ128rr = 2223, |
| 22070 | VMOVDQU16Z256rrk_VMOVDQU16Z256rrk_REV_VMOVDQU16Z256rrkz_VMOVDQU16Z256rrkz_REV_VMOVDQU8Z256rrk_VMOVDQU8Z256rrk_REV_VMOVDQU8Z256rrkz_VMOVDQU8Z256rrkz_REV_VPMOVM2BZ256rr_VPMOVM2WZ256rr = 2224, |
| 22071 | VMOVSHZrrk_VMOVSHZrrk_REV_VMOVSHZrrkz_VMOVSHZrrkz_REV = 2225, |
| 22072 | VPBLENDMBZ128rrk_VPBLENDMBZ128rrkz_VPBLENDMWZ128rrk_VPBLENDMWZ128rrkz = 2226, |
| 22073 | VPBLENDMBZ256rrk_VPBLENDMBZ256rrkz_VPBLENDMWZ256rrk_VPBLENDMWZ256rrkz = 2227, |
| 22074 | VMOVDQU8Zmrk = 2228, |
| 22075 | VMOVNTDQZ128mr = 2229, |
| 22076 | VMOVNTDQZ256mr = 2230, |
| 22077 | VMOVNTDQZmr = 2231, |
| 22078 | VMOVNTPDZ128mr = 2232, |
| 22079 | VMOVNTPDZ256mr = 2233, |
| 22080 | VMOVNTPDZmr = 2234, |
| 22081 | VMOVNTPSZ128mr = 2235, |
| 22082 | VMOVNTPSZ256mr = 2236, |
| 22083 | VMOVNTPSZmr = 2237, |
| 22084 | VP2INTERSECTDZ128rm_VP2INTERSECTDZ128rmb = 2238, |
| 22085 | VP2INTERSECTQZ256rm_VP2INTERSECTQZ256rmb = 2239, |
| 22086 | VP2INTERSECTDZ128rr = 2240, |
| 22087 | VP2INTERSECTQZ256rr = 2241, |
| 22088 | VP2INTERSECTDZ256rm_VP2INTERSECTDZ256rmb = 2242, |
| 22089 | VP2INTERSECTDZ256rr = 2243, |
| 22090 | VP2INTERSECTDZrm_VP2INTERSECTDZrmb = 2244, |
| 22091 | VP2INTERSECTDZrr = 2245, |
| 22092 | VP2INTERSECTQZ128rm_VP2INTERSECTQZ128rmb = 2246, |
| 22093 | VP2INTERSECTQZ128rr = 2247, |
| 22094 | VP2INTERSECTQZrm_VP2INTERSECTQZrmb = 2248, |
| 22095 | VP2INTERSECTQZrr = 2249, |
| 22096 | VPABSBZ128rrk_VPABSBZ128rrkz_VPABSWZ128rrk_VPABSWZ128rrkz_VPSUBSBZ128rrk_VPSUBSBZ128rrkz_VPSUBSWZ128rrk_VPSUBSWZ128rrkz_VPADDSBZ128rrk_VPADDSBZ128rrkz_VPADDSWZ128rrk_VPADDSWZ128rrkz_VPADDUSBZ128rrk_VPADDUSBZ128rrkz_VPADDUSWZ128rrk_VPADDUSWZ128rrkz_VPAVGBZ128rrk_VPAVGBZ128rrkz_VPAVGWZ128rrk_VPAVGWZ128rrkz_VPSUBUSBZ128rrk_VPSUBUSBZ128rrkz_VPSUBUSWZ128rrk_VPSUBUSWZ128rrkz = 2250, |
| 22097 | VPABSBZ256rrk_VPABSBZ256rrkz_VPABSWZ256rrk_VPABSWZ256rrkz_VPSUBSBZ256rrk_VPSUBSBZ256rrkz_VPSUBSWZ256rrk_VPSUBSWZ256rrkz_VPADDSBZ256rrk_VPADDSBZ256rrkz_VPADDSWZ256rrk_VPADDSWZ256rrkz_VPADDUSBZ256rrk_VPADDUSBZ256rrkz_VPADDUSWZ256rrk_VPADDUSWZ256rrkz_VPAVGBZ256rrk_VPAVGBZ256rrkz_VPAVGWZ256rrk_VPAVGWZ256rrkz_VPMAXSBZ256rrk_VPMAXSBZ256rrkz_VPMAXUWZ256rrk_VPMAXUWZ256rrkz_VPMINSBZ256rrk_VPMINSBZ256rrkz_VPMINUWZ256rrk_VPMINUWZ256rrkz_VPMAXSWZ256rrk_VPMAXSWZ256rrkz_VPMAXUBZ256rrk_VPMAXUBZ256rrkz_VPMINSWZ256rrk_VPMINSWZ256rrkz_VPMINUBZ256rrk_VPMINUBZ256rrkz_VPSUBUSBZ256rrk_VPSUBUSBZ256rrkz_VPSUBUSWZ256rrk_VPSUBUSWZ256rrkz = 2251, |
| 22098 | VPMAXSBZ128rrk_VPMAXSBZ128rrkz_VPMAXUWZ128rrk_VPMAXUWZ128rrkz_VPMINSBZ128rrk_VPMINSBZ128rrkz_VPMINUWZ128rrk_VPMINUWZ128rrkz_VPMAXSWZ128rrk_VPMAXSWZ128rrkz_VPMAXUBZ128rrk_VPMAXUBZ128rrkz_VPMINSWZ128rrk_VPMINSWZ128rrkz_VPMINUBZ128rrk_VPMINUBZ128rrkz = 2252, |
| 22099 | VPSHLDVWZ128rk_VPSHLDVWZ128rkz_VPSHRDVWZ128rk_VPSHRDVWZ128rkz = 2253, |
| 22100 | VPSHLDVWZ256rk_VPSHLDVWZ256rkz_VPSHRDVWZ256rk_VPSHRDVWZ256rkz = 2254, |
| 22101 | VPSLLVWZ128rrk_VPSLLVWZ128rrkz_VPSRLVWZ128rrk_VPSRLVWZ128rrkz_VPSRAVWZ128rrk_VPSRAVWZ128rrkz = 2255, |
| 22102 | VPSLLVWZ256rrk_VPSLLVWZ256rrkz_VPSRLVWZ256rrk_VPSRLVWZ256rrkz_VPSRAVWZ256rrk_VPSRAVWZ256rrkz = 2256, |
| 22103 | VPSLLWZ128rik_VPSLLWZ128rikz_VPSRLWZ128rik_VPSRLWZ128rikz_VPSRAWZ128rik_VPSRAWZ128rikz = 2257, |
| 22104 | VPSLLWZ256rik_VPSLLWZ256rikz_VPSRLWZ256rik_VPSRLWZ256rikz_VPSRAWZ256rik_VPSRAWZ256rikz = 2258, |
| 22105 | VSHUFPDZ256rmbi_VSHUFPDZ256rmik_VSHUFPSZ256rmbi_VSHUFPSZ256rmik_VSHUFPDZ256rmbik_VSHUFPDZ256rmbikz_VSHUFPSZ256rmbik_VSHUFPSZ256rmbikz_VSHUFPDZ256rmi_VSHUFPDZ256rmikz_VSHUFPSZ256rmi_VSHUFPSZ256rmikz = 2259, |
| 22106 | VPBROADCASTMB2QZ128rr_VPBROADCASTMB2QZ256rr_VPBROADCASTMW2DZ128rr_VPBROADCASTMW2DZ256rr_VPBROADCASTMB2QZrr_VPBROADCASTMW2DZrr = 2260, |
| 22107 | VPERMWZrrk_VPERMWZrrkz = 2261, |
| 22108 | VPSRAWZrrk_VPSRAWZrrkz_VPSLLWZrrk_VPSLLWZrrkz_VPSRLWZrrk_VPSRLWZrrkz = 2262, |
| 22109 | VPSHUFBITQMBZ128rr = 2263, |
| 22110 | VPSHUFBITQMBZ256rr = 2264, |
| 22111 | VPSHUFBITQMBZrr = 2265, |
| 22112 | VPCOMPRESSBZ128mr_VPCOMPRESSBZ256mr_VPCOMPRESSWZ128mr_VPCOMPRESSWZ256mr = 2266, |
| 22113 | VPCOMPRESSWZmr = 2267, |
| 22114 | VPCOMPRESSBZ128mrk_VPCOMPRESSBZ256mrk_VPCOMPRESSWZ128mrk_VPCOMPRESSWZ256mrk = 2268, |
| 22115 | VPCOMPRESSWZmrk = 2269, |
| 22116 | VPCOMPRESSBZmr = 2270, |
| 22117 | VPCOMPRESSBZmrk = 2271, |
| 22118 | VPCONFLICTDZ128rm_VPCONFLICTDZ128rmb_VPCONFLICTDZ128rmbk_VPCONFLICTDZ128rmk_VPCONFLICTDZ128rmkz = 2272, |
| 22119 | VPCONFLICTDZ256rm_VPCONFLICTDZ256rmb_VPCONFLICTDZ256rmbk_VPCONFLICTDZ256rmk_VPCONFLICTDZ256rmkz = 2273, |
| 22120 | VPCONFLICTDZrm_VPCONFLICTDZrmb_VPCONFLICTDZrmbk_VPCONFLICTDZrmk_VPCONFLICTDZrmkz = 2274, |
| 22121 | VPCONFLICTDZrr_VPCONFLICTDZrrkz = 2275, |
| 22122 | VPCONFLICTQZ128rm_VPCONFLICTQZ128rmb_VPCONFLICTQZ128rmbk_VPCONFLICTQZ128rmk_VPCONFLICTQZ128rmkz = 2276, |
| 22123 | VPERMI2BZ128rm_VPERMT2BZ128rm = 2277, |
| 22124 | VPCONFLICTQZ256rm_VPCONFLICTQZ256rmb_VPCONFLICTQZ256rmbk_VPCONFLICTQZ256rmk_VPCONFLICTQZ256rmkz = 2278, |
| 22125 | VPCONFLICTQZrm_VPCONFLICTQZrmb_VPCONFLICTQZrmbk_VPCONFLICTQZrmk_VPCONFLICTQZrmkz = 2279, |
| 22126 | VPCONFLICTQZrr_VPCONFLICTQZrrkz = 2280, |
| 22127 | VPERMI2BZ128rmk_VPERMI2BZ128rmkz_VPERMT2BZ128rmk_VPERMT2BZ128rmkz = 2281, |
| 22128 | VPERMT2WZ128rm = 2282, |
| 22129 | VPERMI2BZ128rr_VPERMT2BZ128rr = 2283, |
| 22130 | VPERMI2BZ256rr_VPERMT2BZ256rr = 2284, |
| 22131 | VPERMI2BZ256rrk_VPERMI2BZ256rrkz_VPERMT2BZ256rrk_VPERMT2BZ256rrkz = 2285, |
| 22132 | VPERMI2WZ128rr_VPERMT2WZ128rr = 2286, |
| 22133 | VPERMI2WZ256rr_VPERMT2WZ256rr = 2287, |
| 22134 | VPERMI2BZ256rm_VPERMT2BZ256rm = 2288, |
| 22135 | VPERMI2BZ256rmk_VPERMI2BZ256rmkz_VPERMT2BZ256rmk_VPERMT2BZ256rmkz = 2289, |
| 22136 | VPERMI2WZ128rm = 2290, |
| 22137 | VPERMT2WZ256rm = 2291, |
| 22138 | VPERMI2BZrm_VPERMT2BZrm = 2292, |
| 22139 | VPERMI2BZrmk_VPERMI2BZrmkz_VPERMT2BZrmk_VPERMT2BZrmkz = 2293, |
| 22140 | VPERMT2WZrm = 2294, |
| 22141 | VPERMI2BZrr_VPERMT2BZrr = 2295, |
| 22142 | VPERMI2BZrrk_VPERMI2BZrrkz_VPERMT2BZrrk_VPERMT2BZrrkz = 2296, |
| 22143 | VPERMI2WZrr_VPERMT2WZrr = 2297, |
| 22144 | VPERMI2WZ128rmk_VPERMI2WZ128rmkz = 2298, |
| 22145 | VPERMT2WZ256rmk_VPERMT2WZ256rmkz = 2299, |
| 22146 | VPERMI2WZ256rm = 2300, |
| 22147 | VPERMI2WZ256rmk_VPERMI2WZ256rmkz = 2301, |
| 22148 | VPERMI2WZrm = 2302, |
| 22149 | VPERMI2WZrmk_VPERMI2WZrmkz = 2303, |
| 22150 | VPERMWZ128rm = 2304, |
| 22151 | VPERMWZ256rmk_VPERMWZ256rmkz = 2305, |
| 22152 | VPERMWZ128rr = 2306, |
| 22153 | VPERMWZ256rr = 2307, |
| 22154 | VPERMWZ256rm = 2308, |
| 22155 | VPEXPANDBZ128rrk_VPEXPANDBZ128rrkz_VPEXPANDWZ128rrk_VPEXPANDWZ128rrkz = 2309, |
| 22156 | VPEXPANDBZ256rrk_VPEXPANDBZ256rrkz_VPEXPANDWZ256rrk_VPEXPANDWZ256rrkz = 2310, |
| 22157 | VPEXPANDBZrrk_VPEXPANDBZrrkz_VPEXPANDWZrrk_VPEXPANDWZrrkz = 2311, |
| 22158 | VPMADDUBSWZ128rrk_VPMADDUBSWZ128rrkz_VPMULHRSWZ128rrk_VPMULHRSWZ128rrkz_VPMULHUWZ128rrk_VPMULHUWZ128rrkz_VPMULHWZ128rrk_VPMULHWZ128rrkz_VPMULLWZ128rrk_VPMULLWZ128rrkz = 2312, |
| 22159 | VPMADDUBSWZ256rrk_VPMADDUBSWZ256rrkz_VPMULHRSWZ256rrk_VPMULHRSWZ256rrkz_VPMULHUWZ256rrk_VPMULHUWZ256rrkz_VPMULHWZ256rrk_VPMULHWZ256rrkz_VPMULLWZ256rrk_VPMULLWZ256rrkz = 2313, |
| 22160 | VPMADDUBSWZrmk_VPMADDUBSWZrmkz_VPMULHRSWZrmk_VPMULHRSWZrmkz_VPMULHUWZrmk_VPMULHUWZrmkz_VPMULHWZrmk_VPMULHWZrmkz_VPMULLWZrmk_VPMULLWZrmkz = 2314, |
| 22161 | VPMADDUBSWZrrk_VPMADDUBSWZrrkz_VPMULHRSWZrrk_VPMULHRSWZrrkz_VPMULHUWZrrk_VPMULHUWZrrkz_VPMULHWZrrk_VPMULHWZrrkz_VPMULLWZrrk_VPMULLWZrrkz = 2315, |
| 22162 | VPMOVDBZ128mr_VPMOVDBZ256mr_VPMOVUSDBZ128mr_VPMOVUSDBZ256mr_VPMOVDWZ128mr_VPMOVDWZ256mr_VPMOVQWZ128mr_VPMOVQWZ256mr_VPMOVSDWZ128mr_VPMOVSDWZ256mr_VPMOVSQWZ128mr_VPMOVSQWZ256mr_VPMOVUSDWZ128mr_VPMOVUSDWZ256mr_VPMOVUSQWZ128mr_VPMOVUSQWZ256mr_VPMOVQBZ256mr_VPMOVSDBZ256mr_VPMOVSWBZ256mr_VPMOVWBZ256mr_VPMOVSDBZ128mr_VPMOVWBZ128mr_VPMOVSQBZ256mr_VPMOVUSQBZ256mr_VPMOVSQDZ128mr_VPMOVSQDZ256mr_VPMOVUSQDZ128mr_VPMOVUSQDZ256mr_VPMOVSWBZ128mr_VPMOVUSWBZ128mr = 2316, |
| 22163 | VPMOVUSWBZ256mr = 2317, |
| 22164 | VPMOVDBZ128mrk_VPMOVQBZ128mrk_VPMOVSQBZ128mrk_VPMOVSWBZ128mrk_VPMOVWBZ128mrk_VPMOVDWZ128mrk_VPMOVQWZ128mrk_VPMOVSDWZ128mrk_VPMOVSQWZ128mrk_VPMOVUSDWZ128mrk_VPMOVUSQWZ128mrk_VPMOVSDBZ128mrk_VPMOVSQDZ128mrk_VPMOVUSDBZ128mrk_VPMOVUSQDZ128mrk_VPMOVUSQBZ128mrk_VPMOVUSWBZ128mrk = 2318, |
| 22165 | VPMOVDBZ128rr_VPMOVQBZ128rr_VPMOVSQBZ128rr_VPMOVSWBZ128rr_VPMOVWBZ128rr_VPMOVDWZ128rr_VPMOVQWZ128rr_VPMOVSDWZ128rr_VPMOVSQWZ128rr_VPMOVUSDWZ128rr_VPMOVSDBZ128rr_VPMOVSQDZ128rr_VPMOVUSDBZ128rr_VPMOVUSQDZ128rr_VPMOVSQDZ128rrk_VPMOVSQDZ128rrkz_VPMOVUSQDZ128rrk_VPMOVUSQDZ128rrkz_VPMOVUSQBZ128rr_VPMOVUSWBZ128rr = 2319, |
| 22166 | VPMOVUSQWZ128rr = 2320, |
| 22167 | VPMOVDBZ128rrk_VPMOVDBZ128rrkz_VPMOVQBZ128rrk_VPMOVQBZ128rrkz_VPMOVSQBZ128rrk_VPMOVSQBZ128rrkz_VPMOVSWBZ128rrk_VPMOVSWBZ128rrkz_VPMOVWBZ128rrk_VPMOVWBZ128rrkz_VPMOVDBZ256rr_VPMOVQBZ256rr_VPMOVSQBZ256rr_VPMOVSWBZ256rr_VPMOVWBZ256rr_VPMOVDWZ128rrk_VPMOVDWZ128rrkz_VPMOVQWZ128rrk_VPMOVQWZ128rrkz_VPMOVSDWZ128rrk_VPMOVSDWZ128rrkz_VPMOVSQWZ128rrk_VPMOVSQWZ128rrkz_VPMOVUSDWZ128rrk_VPMOVUSDWZ128rrkz_VPMOVDWZ256rr_VPMOVQWZ256rr_VPMOVSDWZ256rr_VPMOVSQWZ256rr_VPMOVUSDWZ256rr_VPMOVSDBZ128rrk_VPMOVSDBZ128rrkz_VPMOVUSDBZ128rrk_VPMOVUSDBZ128rrkz_VPMOVSDBZ256rr_VPMOVSQDZ256rr_VPMOVUSDBZ256rr_VPMOVUSQDZ256rr_VPMOVSQDZ256rrk_VPMOVSQDZ256rrkz_VPMOVUSQDZ256rrk_VPMOVUSQDZ256rrkz_VPMOVUSQBZ128rrk_VPMOVUSQBZ128rrkz_VPMOVUSWBZ128rrk_VPMOVUSWBZ128rrkz_VPMOVUSQBZ256rr_VPMOVUSWBZ256rr = 2321, |
| 22168 | VPMOVUSQWZ128rrk_VPMOVUSQWZ128rrkz = 2322, |
| 22169 | VPMOVUSQWZ256rr = 2323, |
| 22170 | VPMOVDBZ256mrk_VPMOVQBZ256mrk_VPMOVSQBZ256mrk_VPMOVSWBZ256mrk_VPMOVWBZ256mrk_VPMOVDWZ256mrk_VPMOVQWZ256mrk_VPMOVSDWZ256mrk_VPMOVSQWZ256mrk_VPMOVUSDWZ256mrk_VPMOVUSQWZ256mrk_VPMOVSDBZ256mrk_VPMOVSQDZ256mrk_VPMOVUSDBZ256mrk_VPMOVUSQDZ256mrk_VPMOVUSQBZ256mrk_VPMOVUSWBZ256mrk = 2324, |
| 22171 | VPMOVUSQWZ256rrk_VPMOVUSQWZ256rrkz = 2325, |
| 22172 | VPMULLQZ128rm_VPMULLQZ128rmb_VPMULLQZ128rmbk_VPMULLQZ128rmk_VPMULLQZ128rmkz = 2326, |
| 22173 | VPMULLQZ256rm_VPMULLQZ256rmb_VPMULLQZ256rmbk_VPMULLQZ256rmk_VPMULLQZ256rmkz = 2327, |
| 22174 | VPMULLQZrm_VPMULLQZrmb_VPMULLQZrmbk_VPMULLQZrmk_VPMULLQZrmkz = 2328, |
| 22175 | VPSCATTERQDZ256mr_VSCATTERQPSZ256mr = 2329, |
| 22176 | VPSCATTERDQZmr_VPSCATTERQQZmr_VSCATTERDPDZmr_VSCATTERQPDZmr = 2330, |
| 22177 | VPSHLDDZ128rmbi_VPSHLDQZ128rmbi_VPSHRDDZ128rmbi_VPSHRDQZ128rmbi_VPSHLDDZ128rmi_VPSHLDQZ128rmi_VPSHLDWZ128rmi_VPSHRDDZ128rmi_VPSHRDQZ128rmi_VPSHRDWZ128rmi_VPSHLDVDZ128m_VPSHLDVQZ128m_VPSHLDVWZ128m_VPSHRDVDZ128m_VPSHRDVQZ128m_VPSHRDVWZ128m_VPSHLDVDZ128mb_VPSHLDVDZ128mk_VPSHLDVDZ128mkz_VPSHLDVQZ128mb_VPSHLDVQZ128mk_VPSHLDVQZ128mkz_VPSHRDVDZ128mb_VPSHRDVDZ128mk_VPSHRDVDZ128mkz_VPSHRDVQZ128mb_VPSHRDVQZ128mk_VPSHRDVQZ128mkz_VPSHLDVDZ128mbk_VPSHLDVDZ128mbkz_VPSHLDVQZ128mbk_VPSHLDVQZ128mbkz_VPSHRDVDZ128mbk_VPSHRDVDZ128mbkz_VPSHRDVQZ128mbk_VPSHRDVQZ128mbkz = 2331, |
| 22178 | VPSHLDDZ128rmbik_VPSHLDDZ128rmbikz_VPSHLDDZ128rmik_VPSHLDDZ128rmikz_VPSHLDQZ128rmbik_VPSHLDQZ128rmbikz_VPSHLDQZ128rmik_VPSHLDQZ128rmikz_VPSHRDDZ128rmbik_VPSHRDDZ128rmbikz_VPSHRDDZ128rmik_VPSHRDDZ128rmikz_VPSHRDQZ128rmbik_VPSHRDQZ128rmbikz_VPSHRDQZ128rmik_VPSHRDQZ128rmikz = 2332, |
| 22179 | VPSHLDDZ128rri_VPSHLDQZ128rri_VPSHLDWZ128rri_VPSHRDDZ128rri_VPSHRDQZ128rri_VPSHRDWZ128rri_VPSHLDVDZ128rk_VPSHLDVDZ128rkz_VPSHLDVQZ128rk_VPSHLDVQZ128rkz_VPSHRDVDZ128rk_VPSHRDVDZ128rkz_VPSHRDVQZ128rk_VPSHRDVQZ128rkz = 2333, |
| 22180 | VPSHLDDZ256rri_VPSHLDQZ256rri_VPSHLDWZ256rri_VPSHRDDZ256rri_VPSHRDQZ256rri_VPSHRDWZ256rri_VPSHLDVDZ256rk_VPSHLDVDZ256rkz_VPSHLDVQZ256rk_VPSHLDVQZ256rkz_VPSHRDVDZ256rk_VPSHRDVDZ256rkz_VPSHRDVQZ256rk_VPSHRDVQZ256rkz = 2334, |
| 22181 | VPSHLDVDZ128r_VPSHLDVQZ128r_VPSHLDVWZ128r_VPSHRDVDZ128r_VPSHRDVQZ128r_VPSHRDVWZ128r = 2335, |
| 22182 | VPSHLDVDZ256r_VPSHLDVQZ256r_VPSHLDVWZ256r_VPSHRDVDZ256r_VPSHRDVQZ256r_VPSHRDVWZ256r = 2336, |
| 22183 | VPSHLDDZ128rrik_VPSHLDDZ128rrikz_VPSHLDQZ128rrik_VPSHLDQZ128rrikz_VPSHRDDZ128rrik_VPSHRDDZ128rrikz_VPSHRDQZ128rrik_VPSHRDQZ128rrikz = 2337, |
| 22184 | VPSHLDDZ256rrik_VPSHLDDZ256rrikz_VPSHLDQZ256rrik_VPSHLDQZ256rrikz_VPSHRDDZ256rrik_VPSHRDDZ256rrikz_VPSHRDQZ256rrik_VPSHRDQZ256rrikz = 2338, |
| 22185 | VPSHLDDZ256rmbi_VPSHLDQZ256rmbi_VPSHRDDZ256rmbi_VPSHRDQZ256rmbi_VPSHLDDZ256rmi_VPSHLDQZ256rmi_VPSHLDWZ256rmi_VPSHRDDZ256rmi_VPSHRDQZ256rmi_VPSHRDWZ256rmi_VPSHLDVDZ256m_VPSHLDVQZ256m_VPSHLDVWZ256m_VPSHRDVDZ256m_VPSHRDVQZ256m_VPSHRDVWZ256m_VPSHLDVDZ256mb_VPSHLDVDZ256mk_VPSHLDVDZ256mkz_VPSHLDVQZ256mb_VPSHLDVQZ256mk_VPSHLDVQZ256mkz_VPSHRDVDZ256mb_VPSHRDVDZ256mk_VPSHRDVDZ256mkz_VPSHRDVQZ256mb_VPSHRDVQZ256mk_VPSHRDVQZ256mkz_VPSHLDVDZ256mbk_VPSHLDVDZ256mbkz_VPSHLDVQZ256mbk_VPSHLDVQZ256mbkz_VPSHRDVDZ256mbk_VPSHRDVDZ256mbkz_VPSHRDVQZ256mbk_VPSHRDVQZ256mbkz = 2339, |
| 22186 | VPSHLDDZ256rmbik_VPSHLDDZ256rmbikz_VPSHLDDZ256rmik_VPSHLDDZ256rmikz_VPSHLDQZ256rmbik_VPSHLDQZ256rmbikz_VPSHLDQZ256rmik_VPSHLDQZ256rmikz_VPSHRDDZ256rmbik_VPSHRDDZ256rmbikz_VPSHRDDZ256rmik_VPSHRDDZ256rmikz_VPSHRDQZ256rmbik_VPSHRDQZ256rmbikz_VPSHRDQZ256rmik_VPSHRDQZ256rmikz = 2340, |
| 22187 | VPSHLDDZrmbi_VPSHLDQZrmbi_VPSHRDDZrmbi_VPSHRDQZrmbi_VPSHLDDZrmi_VPSHLDQZrmi_VPSHLDWZrmi_VPSHRDDZrmi_VPSHRDQZrmi_VPSHRDWZrmi_VPSHLDVDZm_VPSHLDVQZm_VPSHLDVWZm_VPSHRDVDZm_VPSHRDVQZm_VPSHRDVWZm_VPSHLDVDZmb_VPSHLDVDZmk_VPSHLDVDZmkz_VPSHLDVQZmb_VPSHLDVQZmk_VPSHLDVQZmkz_VPSHRDVDZmb_VPSHRDVDZmk_VPSHRDVDZmkz_VPSHRDVQZmb_VPSHRDVQZmk_VPSHRDVQZmkz_VPSHLDVDZmbk_VPSHLDVDZmbkz_VPSHLDVQZmbk_VPSHLDVQZmbkz_VPSHRDVDZmbk_VPSHRDVDZmbkz_VPSHRDVQZmbk_VPSHRDVQZmbkz = 2341, |
| 22188 | VPSHLDDZrmbik_VPSHLDDZrmbikz_VPSHLDDZrmik_VPSHLDDZrmikz_VPSHLDQZrmbik_VPSHLDQZrmbikz_VPSHLDQZrmik_VPSHLDQZrmikz_VPSHRDDZrmbik_VPSHRDDZrmbikz_VPSHRDDZrmik_VPSHRDDZrmikz_VPSHRDQZrmbik_VPSHRDQZrmbikz_VPSHRDQZrmik_VPSHRDQZrmikz = 2342, |
| 22189 | VPSHLDDZrrik_VPSHLDDZrrikz_VPSHLDQZrrik_VPSHLDQZrrikz_VPSHRDDZrrik_VPSHRDDZrrikz_VPSHRDQZrrik_VPSHRDQZrrikz = 2343, |
| 22190 | VPSHLDWZ128rmik_VPSHLDWZ128rmikz_VPSHRDWZ128rmik_VPSHRDWZ128rmikz = 2344, |
| 22191 | VPSHLDWZ256rmik_VPSHLDWZ256rmikz_VPSHRDWZ256rmik_VPSHRDWZ256rmikz = 2345, |
| 22192 | VPSHLDWZrmik_VPSHLDWZrmikz_VPSHRDWZrmik_VPSHRDWZrmikz = 2346, |
| 22193 | VPSHUFBITQMBZ128rm = 2347, |
| 22194 | VPSHUFBITQMBZ256rm = 2348, |
| 22195 | VPSHUFBITQMBZrm = 2349, |
| 22196 | VPSHUFBITQMBZ128rmk = 2350, |
| 22197 | VPSHUFBITQMBZ256rmk = 2351, |
| 22198 | VPSHUFBITQMBZrmk = 2352, |
| 22199 | VPSLLWZ128rrk_VPSLLWZ128rrkz_VPSRLWZ128rrk_VPSRLWZ128rrkz_VPSRAWZ128rrk_VPSRAWZ128rrkz = 2353, |
| 22200 | VRCPPHZmbk_VRCPPHZmkz_VRCPPHZmbkz_VRCPPHZmk = 2354, |
| 22201 | VRSQRTPHZmbk_VRSQRTPHZmkz_VRSQRTPHZmbkz_VRSQRTPHZmk = 2355, |
| 22202 | VRCPPHZrk_VRCPPHZrkz = 2356, |
| 22203 | VREDUCEPHZ128rmbi_VREDUCEPHZ128rmi = 2357, |
| 22204 | VREDUCESHZrmi = 2358, |
| 22205 | VREDUCEPHZ256rmbi_VREDUCEPHZ256rmi = 2359, |
| 22206 | VREDUCEPHZ128rmbik_VREDUCEPHZ128rmbikz_VREDUCEPHZ128rmik_VREDUCEPHZ128rmikz_VREDUCESHZrmik_VREDUCESHZrmikz = 2360, |
| 22207 | VREDUCEPHZ256rmbik_VREDUCEPHZ256rmbikz_VREDUCEPHZ256rmik_VREDUCEPHZ256rmikz = 2361, |
| 22208 | VREDUCEPHZ128rri_VREDUCESHZrri_VREDUCESHZrrib = 2362, |
| 22209 | VREDUCEPHZ256rri = 2363, |
| 22210 | VREDUCEPHZ128rrik_VREDUCEPHZ128rrikz_VREDUCESHZrribk_VREDUCESHZrrikz_VREDUCESHZrribkz_VREDUCESHZrrik = 2364, |
| 22211 | VREDUCEPHZ256rrik_VREDUCEPHZ256rrikz = 2365, |
| 22212 | VREDUCEPHZrmbi_VREDUCEPHZrmi = 2366, |
| 22213 | VREDUCEPHZrmbik_VREDUCEPHZrmbikz_VREDUCEPHZrmik_VREDUCEPHZrmikz = 2367, |
| 22214 | VREDUCEPHZrri_VREDUCEPHZrrib = 2368, |
| 22215 | VREDUCEPHZrribk_VREDUCEPHZrrikz_VREDUCEPHZrribkz_VREDUCEPHZrrik = 2369, |
| 22216 | VRNDSCALEPDZrri_VRNDSCALEPDZrrib_VRNDSCALEPDZrribk_VRNDSCALEPDZrrik_VRNDSCALEPDZrrikz_VRNDSCALEPSZrri_VRNDSCALEPSZrrib_VRNDSCALEPSZrribk_VRNDSCALEPSZrrik_VRNDSCALEPSZrrikz_VRNDSCALEPDZrribkz_VRNDSCALEPSZrribkz = 2370, |
| 22217 | VRNDSCALEPHZ128rmbik_VRNDSCALEPHZ128rmbikz_VRNDSCALEPHZ128rmik_VRNDSCALEPHZ128rmikz_VRNDSCALESHZm_Intk_VRNDSCALESHZm_Intkz = 2371, |
| 22218 | VSCALEFPHZ128rmbk_VSCALEFPHZ128rmkz_VSCALEFPHZ128rmbkz_VSCALEFPHZ128rmk = 2372, |
| 22219 | VRNDSCALEPHZ256rmbik_VRNDSCALEPHZ256rmbikz_VRNDSCALEPHZ256rmik_VRNDSCALEPHZ256rmikz = 2373, |
| 22220 | VSCALEFPHZ256rmbk_VSCALEFPHZ256rmkz_VSCALEFPHZ256rmbkz_VSCALEFPHZ256rmk = 2374, |
| 22221 | VSCALEFSHZrmk_VSCALEFSHZrmkz = 2375, |
| 22222 | VRNDSCALEPHZ128rrik_VRNDSCALEPHZ128rrikz_VRNDSCALESHZr_Intk_VRNDSCALESHZr_Intkz_VRNDSCALESHZrb_Intk_VRNDSCALESHZrb_Intkz = 2376, |
| 22223 | VRNDSCALEPHZ256rrik_VRNDSCALEPHZ256rrikz = 2377, |
| 22224 | VSCALEFPHZ128rrk_VSCALEFPHZ128rrkz = 2378, |
| 22225 | VSCALEFPHZ256rrk_VSCALEFPHZ256rrkz = 2379, |
| 22226 | VSCALEFSHZrrb_Intk_VSCALEFSHZrrb_Intkz_VSCALEFSHZrrk_VSCALEFSHZrrkz = 2380, |
| 22227 | VRNDSCALEPHZrmbik_VRNDSCALEPHZrmbikz_VRNDSCALEPHZrmik_VRNDSCALEPHZrmikz = 2381, |
| 22228 | VSCALEFPHZrmbk_VSCALEFPHZrmkz_VSCALEFPHZrmbkz_VSCALEFPHZrmk = 2382, |
| 22229 | VRNDSCALEPHZrribk_VRNDSCALEPHZrrikz_VRNDSCALEPHZrribkz_VRNDSCALEPHZrrik = 2383, |
| 22230 | VSCALEFPHZrrbk_VSCALEFPHZrrkz_VSCALEFPHZrrbkz_VSCALEFPHZrrk = 2384, |
| 22231 | VRSQRT14PDZr_VRSQRT14PSZr = 2385, |
| 22232 | VRSQRT14PSZrk = 2386, |
| 22233 | VRSQRTPHZr = 2387, |
| 22234 | VSQRTPDYm = 2388, |
| 22235 | VSQRTPDZ256m_VSQRTPDZ256mb = 2389, |
| 22236 | VSQRTPDZ128mbk_VSQRTPDZ128mkz_VSQRTPDZ128mbkz_VSQRTPDZ128mk = 2390, |
| 22237 | VSQRTSDZm_Intk_VSQRTSDZm_Intkz = 2391, |
| 22238 | VSQRTPDZm = 2392, |
| 22239 | VSQRTPDZmb = 2393, |
| 22240 | VSQRTPDZr = 2394, |
| 22241 | VSQRTPHZ128mbk_VSQRTPHZ128mkz_VSQRTPHZ128mbkz_VSQRTPHZ128mk = 2395, |
| 22242 | VSQRTPHZ128rk = 2396, |
| 22243 | VSQRTPHZ256rk = 2397, |
| 22244 | VSQRTPHZ256rkz = 2398, |
| 22245 | VSQRTPHZ128rkz = 2399, |
| 22246 | VSQRTPHZ256m_VSQRTPHZ256mb = 2400, |
| 22247 | VSQRTPHZ256mbk_VSQRTPHZ256mkz_VSQRTPHZ256mbkz_VSQRTPHZ256mk = 2401, |
| 22248 | VSQRTPHZm_VSQRTPHZmb = 2402, |
| 22249 | VSQRTPHZmbk_VSQRTPHZmkz_VSQRTPHZmbkz_VSQRTPHZmk = 2403, |
| 22250 | VSQRTPHZr_VSQRTPHZrb = 2404, |
| 22251 | VSQRTPHZrbk_VSQRTPHZrkz_VSQRTPHZrbkz_VSQRTPHZrk = 2405, |
| 22252 | VSQRTPSZr = 2406, |
| 22253 | XTEST = 2407, |
| 22254 | SCHED_LIST_END = 2408 |
| 22255 | }; |
| 22256 | } // end namespace Sched |
| 22257 | } // end namespace X86 |
| 22258 | } // end namespace llvm |
| 22259 | #endif // GET_INSTRINFO_SCHED_ENUM |
| 22260 | |
| 22261 | #if defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
| 22262 | namespace llvm { |
| 22263 | |
| 22264 | struct X86InstrTable { |
| 22265 | MCInstrDesc Insts[19817]; |
| 22266 | static_assert(alignof(MCInstrDesc) >= alignof(MCOperandInfo), "Unwanted padding between Insts and OperandInfo"); |
| 22267 | MCOperandInfo OperandInfo[5744]; |
| 22268 | static_assert(alignof(MCOperandInfo) >= alignof(MCPhysReg), "Unwanted padding between OperandInfo and ImplicitOps"); |
| 22269 | MCPhysReg ImplicitOps[734]; |
| 22270 | }; |
| 22271 | |
| 22272 | } // end namespace llvm |
| 22273 | #endif // defined(GET_INSTRINFO_MC_DESC) || defined(GET_INSTRINFO_CTOR_DTOR) |
| 22274 | |
| 22275 | #ifdef GET_INSTRINFO_MC_DESC |
| 22276 | #undef GET_INSTRINFO_MC_DESC |
| 22277 | namespace llvm { |
| 22278 | |
| 22279 | static_assert(sizeof(MCOperandInfo) % sizeof(MCPhysReg) == 0); |
| 22280 | static constexpr unsigned X86ImpOpBase = sizeof X86InstrTable::OperandInfo / (sizeof(MCPhysReg)); |
| 22281 | |
| 22282 | extern const X86InstrTable X86Descs = { |
| 22283 | { |
| 22284 | { 19816, 0, 0, 0, 2407, 0, 1, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002056ULL }, // Inst #19816 = XTEST |
| 22285 | { 19815, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80003868ULL }, // Inst #19815 = XSUSLDTRK |
| 22286 | { 19814, 0, 0, 0, 8, 2, 2, X86ImpOpBase + 730, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380002040ULL }, // Inst #19814 = XSTORE |
| 22287 | { 19813, 0, 0, 0, 8, 3, 3, X86ImpOpBase + 724, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5304002050ULL }, // Inst #19813 = XSHA256 |
| 22288 | { 19812, 0, 0, 0, 8, 3, 3, X86ImpOpBase + 724, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5304002048ULL }, // Inst #19812 = XSHA1 |
| 22289 | { 19811, 0, 0, 0, 880, 3, 0, X86ImpOpBase + 721, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80002051ULL }, // Inst #19811 = XSETBV |
| 22290 | { 19810, 5, 0, 0, 1217, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380022025ULL }, // Inst #19810 = XSAVES64 |
| 22291 | { 19809, 5, 0, 0, 1651, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002025ULL }, // Inst #19809 = XSAVES |
| 22292 | { 19808, 5, 0, 0, 894, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700022026ULL }, // Inst #19808 = XSAVEOPT64 |
| 22293 | { 19807, 5, 0, 0, 1650, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002026ULL }, // Inst #19807 = XSAVEOPT |
| 22294 | { 19806, 5, 0, 0, 1649, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380022024ULL }, // Inst #19806 = XSAVEC64 |
| 22295 | { 19805, 5, 0, 0, 1648, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002024ULL }, // Inst #19805 = XSAVEC |
| 22296 | { 19804, 5, 0, 0, 892, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700022024ULL }, // Inst #19804 = XSAVE64 |
| 22297 | { 19803, 5, 0, 0, 893, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002024ULL }, // Inst #19803 = XSAVE |
| 22298 | { 19802, 5, 0, 0, 887, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380022023ULL }, // Inst #19802 = XRSTORS64 |
| 22299 | { 19801, 5, 0, 0, 1647, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002023ULL }, // Inst #19801 = XRSTORS |
| 22300 | { 19800, 5, 0, 0, 1647, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700022025ULL }, // Inst #19800 = XRSTOR64 |
| 22301 | { 19799, 5, 0, 0, 1647, 2, 0, X86ImpOpBase + 719, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002025ULL }, // Inst #19799 = XRSTOR |
| 22302 | { 19798, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80003869ULL }, // Inst #19798 = XRESLDTRK |
| 22303 | { 19797, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x798000000aULL }, // Inst #19797 = XRELEASE_PREFIX |
| 22304 | { 19796, 3, 1, 0, 810, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x2b88002029ULL }, // Inst #19796 = XORPSrr |
| 22305 | { 19795, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2b88002019ULL }, // Inst #19795 = XORPSrm |
| 22306 | { 19794, 3, 1, 0, 810, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x2b90002829ULL }, // Inst #19794 = XORPDrr |
| 22307 | { 19793, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2b90002819ULL }, // Inst #19793 = XORPDrm |
| 22308 | { 19792, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 173, 0, 0x1900000029ULL }, // Inst #19792 = XOR8rr_REV |
| 22309 | { 19791, 3, 1, 0, 1461, 0, 1, X86ImpOpBase + 0, 5741, 0|(1ULL<<MCID::Commutable), 0x1800000028ULL }, // Inst #19791 = XOR8rr_NOREX |
| 22310 | { 19790, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 173, 0, 0x10001960010029ULL }, // Inst #19790 = XOR8rr_NF_REV |
| 22311 | { 19789, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 462, 0, 0x10109960010029ULL }, // Inst #19789 = XOR8rr_NF_ND_REV |
| 22312 | { 19788, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::Commutable), 0x10109860010028ULL }, // Inst #19788 = XOR8rr_NF_ND |
| 22313 | { 19787, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Commutable), 0x10001860010028ULL }, // Inst #19787 = XOR8rr_NF |
| 22314 | { 19786, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 462, 0, 0x109960010029ULL }, // Inst #19786 = XOR8rr_ND_REV |
| 22315 | { 19785, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::Commutable), 0x109860010028ULL }, // Inst #19785 = XOR8rr_ND |
| 22316 | { 19784, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0, 0xc001960010029ULL }, // Inst #19784 = XOR8rr_EVEX_REV |
| 22317 | { 19783, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Commutable), 0xc001860010028ULL }, // Inst #19783 = XOR8rr_EVEX |
| 22318 | { 19782, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Commutable), 0x1800000028ULL }, // Inst #19782 = XOR8rr |
| 22319 | { 19781, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad), 0x10109960010019ULL }, // Inst #19781 = XOR8rm_NF_ND |
| 22320 | { 19780, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0x10001960010019ULL }, // Inst #19780 = XOR8rm_NF |
| 22321 | { 19779, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad), 0x109960010019ULL }, // Inst #19779 = XOR8rm_ND |
| 22322 | { 19778, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0xc001960010019ULL }, // Inst #19778 = XOR8rm_EVEX |
| 22323 | { 19777, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0x1900000019ULL }, // Inst #19777 = XOR8rm |
| 22324 | { 19776, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 445, 0, 0x1010c060050036ULL }, // Inst #19776 = XOR8ri_NF_ND |
| 22325 | { 19775, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 170, 0, 0x10004060050036ULL }, // Inst #19775 = XOR8ri_NF |
| 22326 | { 19774, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 445, 0, 0x10c060050036ULL }, // Inst #19774 = XOR8ri_ND |
| 22327 | { 19773, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 170, 0, 0xc004060050036ULL }, // Inst #19773 = XOR8ri_EVEX |
| 22328 | { 19772, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 170, 0, 0x4100040036ULL }, // Inst #19772 = XOR8ri8 |
| 22329 | { 19771, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 170, 0, 0x4000040036ULL }, // Inst #19771 = XOR8ri |
| 22330 | { 19770, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 438, 0|(1ULL<<MCID::MayLoad), 0x10109860010018ULL }, // Inst #19770 = XOR8mr_NF_ND |
| 22331 | { 19769, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001860010018ULL }, // Inst #19769 = XOR8mr_NF |
| 22332 | { 19768, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 438, 0|(1ULL<<MCID::MayLoad), 0x109860010018ULL }, // Inst #19768 = XOR8mr_ND |
| 22333 | { 19767, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001860010018ULL }, // Inst #19767 = XOR8mr_EVEX |
| 22334 | { 19766, 6, 0, 0, 1454, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1800000018ULL }, // Inst #19766 = XOR8mr |
| 22335 | { 19765, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x1010c060050026ULL }, // Inst #19765 = XOR8mi_NF_ND |
| 22336 | { 19764, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10004060050026ULL }, // Inst #19764 = XOR8mi_NF |
| 22337 | { 19763, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x10c060050026ULL }, // Inst #19763 = XOR8mi_ND |
| 22338 | { 19762, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050026ULL }, // Inst #19762 = XOR8mi_EVEX |
| 22339 | { 19761, 6, 0, 0, 1451, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040026ULL }, // Inst #19761 = XOR8mi8 |
| 22340 | { 19760, 6, 0, 0, 1451, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040026ULL }, // Inst #19760 = XOR8mi |
| 22341 | { 19759, 1, 0, 0, 1458, 1, 2, X86ImpOpBase + 75, 1, 0, 0x1a00040001ULL }, // Inst #19759 = XOR8i8 |
| 22342 | { 19758, 3, 1, 0, 1460, 0, 1, X86ImpOpBase + 0, 167, 0, 0x1980020029ULL }, // Inst #19758 = XOR64rr_REV |
| 22343 | { 19757, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 167, 0, 0x100019e0030029ULL }, // Inst #19757 = XOR64rr_NF_REV |
| 22344 | { 19756, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 422, 0, 0x101099e0030029ULL }, // Inst #19756 = XOR64rr_NF_ND_REV |
| 22345 | { 19755, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Commutable), 0x101098e0030028ULL }, // Inst #19755 = XOR64rr_NF_ND |
| 22346 | { 19754, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0x100018e0030028ULL }, // Inst #19754 = XOR64rr_NF |
| 22347 | { 19753, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 422, 0, 0x1099e0030029ULL }, // Inst #19753 = XOR64rr_ND_REV |
| 22348 | { 19752, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Commutable), 0x1098e0030028ULL }, // Inst #19752 = XOR64rr_ND |
| 22349 | { 19751, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0, 0xc0019e0030029ULL }, // Inst #19751 = XOR64rr_EVEX_REV |
| 22350 | { 19750, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0xc0018e0030028ULL }, // Inst #19750 = XOR64rr_EVEX |
| 22351 | { 19749, 3, 1, 0, 1459, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0x1880020028ULL }, // Inst #19749 = XOR64rr |
| 22352 | { 19748, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0x101099e0030019ULL }, // Inst #19748 = XOR64rm_NF_ND |
| 22353 | { 19747, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x100019e0030019ULL }, // Inst #19747 = XOR64rm_NF |
| 22354 | { 19746, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0x1099e0030019ULL }, // Inst #19746 = XOR64rm_ND |
| 22355 | { 19745, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0xc0019e0030019ULL }, // Inst #19745 = XOR64rm_EVEX |
| 22356 | { 19744, 7, 1, 0, 1464, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x1980020019ULL }, // Inst #19744 = XOR64rm |
| 22357 | { 19743, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 405, 0, 0x1010c1e0070036ULL }, // Inst #19743 = XOR64ri8_NF_ND |
| 22358 | { 19742, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 164, 0, 0x100041e0070036ULL }, // Inst #19742 = XOR64ri8_NF |
| 22359 | { 19741, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 405, 0, 0x10c1e0070036ULL }, // Inst #19741 = XOR64ri8_ND |
| 22360 | { 19740, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0, 0xc0041e0070036ULL }, // Inst #19740 = XOR64ri8_EVEX |
| 22361 | { 19739, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 164, 0, 0x4180060036ULL }, // Inst #19739 = XOR64ri8 |
| 22362 | { 19738, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 405, 0, 0x1010c0e0230036ULL }, // Inst #19738 = XOR64ri32_NF_ND |
| 22363 | { 19737, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 164, 0, 0x100040e0230036ULL }, // Inst #19737 = XOR64ri32_NF |
| 22364 | { 19736, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 405, 0, 0x10c0e0230036ULL }, // Inst #19736 = XOR64ri32_ND |
| 22365 | { 19735, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0, 0xc0040e0230036ULL }, // Inst #19735 = XOR64ri32_EVEX |
| 22366 | { 19734, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 164, 0, 0x4080220036ULL }, // Inst #19734 = XOR64ri32 |
| 22367 | { 19733, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x101098e0030018ULL }, // Inst #19733 = XOR64mr_NF_ND |
| 22368 | { 19732, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100018e0030018ULL }, // Inst #19732 = XOR64mr_NF |
| 22369 | { 19731, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x1098e0030018ULL }, // Inst #19731 = XOR64mr_ND |
| 22370 | { 19730, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0018e0030018ULL }, // Inst #19730 = XOR64mr_EVEX |
| 22371 | { 19729, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880020018ULL }, // Inst #19729 = XOR64mr |
| 22372 | { 19728, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0070026ULL }, // Inst #19728 = XOR64mi8_NF_ND |
| 22373 | { 19727, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0070026ULL }, // Inst #19727 = XOR64mi8_NF |
| 22374 | { 19726, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070026ULL }, // Inst #19726 = XOR64mi8_ND |
| 22375 | { 19725, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070026ULL }, // Inst #19725 = XOR64mi8_EVEX |
| 22376 | { 19724, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060026ULL }, // Inst #19724 = XOR64mi8 |
| 22377 | { 19723, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0230026ULL }, // Inst #19723 = XOR64mi32_NF_ND |
| 22378 | { 19722, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0230026ULL }, // Inst #19722 = XOR64mi32_NF |
| 22379 | { 19721, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230026ULL }, // Inst #19721 = XOR64mi32_ND |
| 22380 | { 19720, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230026ULL }, // Inst #19720 = XOR64mi32_EVEX |
| 22381 | { 19719, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220026ULL }, // Inst #19719 = XOR64mi32 |
| 22382 | { 19718, 1, 0, 0, 1458, 1, 2, X86ImpOpBase + 72, 1, 0, 0x1a80220001ULL }, // Inst #19718 = XOR64i32 |
| 22383 | { 19717, 3, 1, 0, 1460, 0, 1, X86ImpOpBase + 0, 161, 0, 0x1980000129ULL }, // Inst #19717 = XOR32rr_REV |
| 22384 | { 19716, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 161, 0, 0x100019e0010029ULL }, // Inst #19716 = XOR32rr_NF_REV |
| 22385 | { 19715, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 225, 0, 0x101099e0010029ULL }, // Inst #19715 = XOR32rr_NF_ND_REV |
| 22386 | { 19714, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Commutable), 0x101098e0010028ULL }, // Inst #19714 = XOR32rr_NF_ND |
| 22387 | { 19713, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0x100018e0010028ULL }, // Inst #19713 = XOR32rr_NF |
| 22388 | { 19712, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 225, 0, 0x1099e0010029ULL }, // Inst #19712 = XOR32rr_ND_REV |
| 22389 | { 19711, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Commutable), 0x1098e0010028ULL }, // Inst #19711 = XOR32rr_ND |
| 22390 | { 19710, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0, 0xc0019e0010029ULL }, // Inst #19710 = XOR32rr_EVEX_REV |
| 22391 | { 19709, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0xc0018e0010028ULL }, // Inst #19709 = XOR32rr_EVEX |
| 22392 | { 19708, 3, 1, 0, 1459, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0x1880000128ULL }, // Inst #19708 = XOR32rr |
| 22393 | { 19707, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0x101099e0010019ULL }, // Inst #19707 = XOR32rm_NF_ND |
| 22394 | { 19706, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x100019e0010019ULL }, // Inst #19706 = XOR32rm_NF |
| 22395 | { 19705, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0x1099e0010019ULL }, // Inst #19705 = XOR32rm_ND |
| 22396 | { 19704, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0xc0019e0010019ULL }, // Inst #19704 = XOR32rm_EVEX |
| 22397 | { 19703, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x1980000119ULL }, // Inst #19703 = XOR32rm |
| 22398 | { 19702, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 374, 0, 0x1010c0e0190036ULL }, // Inst #19702 = XOR32ri_NF_ND |
| 22399 | { 19701, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 158, 0, 0x100040e0190036ULL }, // Inst #19701 = XOR32ri_NF |
| 22400 | { 19700, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 374, 0, 0x10c0e0190036ULL }, // Inst #19700 = XOR32ri_ND |
| 22401 | { 19699, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0, 0xc0040e0190036ULL }, // Inst #19699 = XOR32ri_EVEX |
| 22402 | { 19698, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 374, 0, 0x1010c1e0050036ULL }, // Inst #19698 = XOR32ri8_NF_ND |
| 22403 | { 19697, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 158, 0, 0x100041e0050036ULL }, // Inst #19697 = XOR32ri8_NF |
| 22404 | { 19696, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 374, 0, 0x10c1e0050036ULL }, // Inst #19696 = XOR32ri8_ND |
| 22405 | { 19695, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0, 0xc0041e0050036ULL }, // Inst #19695 = XOR32ri8_EVEX |
| 22406 | { 19694, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 158, 0, 0x4180040136ULL }, // Inst #19694 = XOR32ri8 |
| 22407 | { 19693, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 158, 0, 0x4080180136ULL }, // Inst #19693 = XOR32ri |
| 22408 | { 19692, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x101098e0010018ULL }, // Inst #19692 = XOR32mr_NF_ND |
| 22409 | { 19691, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100018e0010018ULL }, // Inst #19691 = XOR32mr_NF |
| 22410 | { 19690, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x1098e0010018ULL }, // Inst #19690 = XOR32mr_ND |
| 22411 | { 19689, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0018e0010018ULL }, // Inst #19689 = XOR32mr_EVEX |
| 22412 | { 19688, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880000118ULL }, // Inst #19688 = XOR32mr |
| 22413 | { 19687, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0190026ULL }, // Inst #19687 = XOR32mi_NF_ND |
| 22414 | { 19686, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0190026ULL }, // Inst #19686 = XOR32mi_NF |
| 22415 | { 19685, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190026ULL }, // Inst #19685 = XOR32mi_ND |
| 22416 | { 19684, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190026ULL }, // Inst #19684 = XOR32mi_EVEX |
| 22417 | { 19683, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050026ULL }, // Inst #19683 = XOR32mi8_NF_ND |
| 22418 | { 19682, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050026ULL }, // Inst #19682 = XOR32mi8_NF |
| 22419 | { 19681, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050026ULL }, // Inst #19681 = XOR32mi8_ND |
| 22420 | { 19680, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050026ULL }, // Inst #19680 = XOR32mi8_EVEX |
| 22421 | { 19679, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040126ULL }, // Inst #19679 = XOR32mi8 |
| 22422 | { 19678, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180126ULL }, // Inst #19678 = XOR32mi |
| 22423 | { 19677, 1, 0, 0, 1458, 1, 2, X86ImpOpBase + 69, 1, 0, 0x1a80180101ULL }, // Inst #19677 = XOR32i32 |
| 22424 | { 19676, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 155, 0, 0x19800000a9ULL }, // Inst #19676 = XOR16rr_REV |
| 22425 | { 19675, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 155, 0, 0x100019e0010829ULL }, // Inst #19675 = XOR16rr_NF_REV |
| 22426 | { 19674, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 357, 0, 0x101099e0010829ULL }, // Inst #19674 = XOR16rr_NF_ND_REV |
| 22427 | { 19673, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Commutable), 0x101098e0010828ULL }, // Inst #19673 = XOR16rr_NF_ND |
| 22428 | { 19672, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0x100018e0010828ULL }, // Inst #19672 = XOR16rr_NF |
| 22429 | { 19671, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 357, 0, 0x1099e0010829ULL }, // Inst #19671 = XOR16rr_ND_REV |
| 22430 | { 19670, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Commutable), 0x1098e0010828ULL }, // Inst #19670 = XOR16rr_ND |
| 22431 | { 19669, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0, 0xc0019e0010829ULL }, // Inst #19669 = XOR16rr_EVEX_REV |
| 22432 | { 19668, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0xc0018e0010828ULL }, // Inst #19668 = XOR16rr_EVEX |
| 22433 | { 19667, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0x18800000a8ULL }, // Inst #19667 = XOR16rr |
| 22434 | { 19666, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::MayLoad), 0x101099e0010819ULL }, // Inst #19666 = XOR16rm_NF_ND |
| 22435 | { 19665, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0x100019e0010819ULL }, // Inst #19665 = XOR16rm_NF |
| 22436 | { 19664, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::MayLoad), 0x1099e0010819ULL }, // Inst #19664 = XOR16rm_ND |
| 22437 | { 19663, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0xc0019e0010819ULL }, // Inst #19663 = XOR16rm_EVEX |
| 22438 | { 19662, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0x1980000099ULL }, // Inst #19662 = XOR16rm |
| 22439 | { 19661, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 340, 0, 0x1010c0e0110836ULL }, // Inst #19661 = XOR16ri_NF_ND |
| 22440 | { 19660, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 152, 0, 0x100040e0110836ULL }, // Inst #19660 = XOR16ri_NF |
| 22441 | { 19659, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 340, 0, 0x10c0e0110836ULL }, // Inst #19659 = XOR16ri_ND |
| 22442 | { 19658, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0, 0xc0040e0110836ULL }, // Inst #19658 = XOR16ri_EVEX |
| 22443 | { 19657, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 340, 0, 0x1010c1e0050836ULL }, // Inst #19657 = XOR16ri8_NF_ND |
| 22444 | { 19656, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 152, 0, 0x100041e0050836ULL }, // Inst #19656 = XOR16ri8_NF |
| 22445 | { 19655, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 340, 0, 0x10c1e0050836ULL }, // Inst #19655 = XOR16ri8_ND |
| 22446 | { 19654, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0, 0xc0041e0050836ULL }, // Inst #19654 = XOR16ri8_EVEX |
| 22447 | { 19653, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 152, 0, 0x41800400b6ULL }, // Inst #19653 = XOR16ri8 |
| 22448 | { 19652, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0, 0x40801000b6ULL }, // Inst #19652 = XOR16ri |
| 22449 | { 19651, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 333, 0|(1ULL<<MCID::MayLoad), 0x101098e0010818ULL }, // Inst #19651 = XOR16mr_NF_ND |
| 22450 | { 19650, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100018e0010818ULL }, // Inst #19650 = XOR16mr_NF |
| 22451 | { 19649, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 333, 0|(1ULL<<MCID::MayLoad), 0x1098e0010818ULL }, // Inst #19649 = XOR16mr_ND |
| 22452 | { 19648, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0018e0010818ULL }, // Inst #19648 = XOR16mr_EVEX |
| 22453 | { 19647, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880000098ULL }, // Inst #19647 = XOR16mr |
| 22454 | { 19646, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0110826ULL }, // Inst #19646 = XOR16mi_NF_ND |
| 22455 | { 19645, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0110826ULL }, // Inst #19645 = XOR16mi_NF |
| 22456 | { 19644, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110826ULL }, // Inst #19644 = XOR16mi_ND |
| 22457 | { 19643, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110826ULL }, // Inst #19643 = XOR16mi_EVEX |
| 22458 | { 19642, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050826ULL }, // Inst #19642 = XOR16mi8_NF_ND |
| 22459 | { 19641, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050826ULL }, // Inst #19641 = XOR16mi8_NF |
| 22460 | { 19640, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050826ULL }, // Inst #19640 = XOR16mi8_ND |
| 22461 | { 19639, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050826ULL }, // Inst #19639 = XOR16mi8_EVEX |
| 22462 | { 19638, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a6ULL }, // Inst #19638 = XOR16mi8 |
| 22463 | { 19637, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a6ULL }, // Inst #19637 = XOR16mi |
| 22464 | { 19636, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 46, 1, 0, 0x1a80100081ULL }, // Inst #19636 = XOR16i16 |
| 22465 | { 19635, 0, 0, 0, 670, 2, 1, X86ImpOpBase + 716, 1, 0|(1ULL<<MCID::MayLoad), 0x6b80000001ULL }, // Inst #19635 = XLAT |
| 22466 | { 19634, 0, 0, 0, 863, 1, 2, X86ImpOpBase + 713, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002050ULL }, // Inst #19634 = XGETBV |
| 22467 | { 19633, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80002055ULL }, // Inst #19633 = XEND |
| 22468 | { 19632, 0, 0, 0, 8, 4, 2, X86ImpOpBase + 707, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5384002068ULL }, // Inst #19632 = XCRYPTOFB |
| 22469 | { 19631, 0, 0, 0, 8, 4, 2, X86ImpOpBase + 707, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5384002048ULL }, // Inst #19631 = XCRYPTECB |
| 22470 | { 19630, 0, 0, 0, 8, 4, 2, X86ImpOpBase + 707, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5384002058ULL }, // Inst #19630 = XCRYPTCTR |
| 22471 | { 19629, 0, 0, 0, 8, 4, 2, X86ImpOpBase + 707, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5384002060ULL }, // Inst #19629 = XCRYPTCFB |
| 22472 | { 19628, 0, 0, 0, 8, 4, 2, X86ImpOpBase + 707, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5384002050ULL }, // Inst #19628 = XCRYPTCBC |
| 22473 | { 19627, 1, 0, 0, 621, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000031ULL }, // Inst #19627 = XCH_F |
| 22474 | { 19626, 4, 2, 0, 1197, 0, 0, X86ImpOpBase + 0, 5737, 0, 0x4300000029ULL }, // Inst #19626 = XCHG8rr |
| 22475 | { 19625, 7, 1, 0, 1024, 0, 0, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4300000019ULL }, // Inst #19625 = XCHG8rm |
| 22476 | { 19624, 4, 2, 0, 1007, 0, 0, X86ImpOpBase + 0, 5733, 0, 0x4380020029ULL }, // Inst #19624 = XCHG64rr |
| 22477 | { 19623, 7, 1, 0, 653, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380020019ULL }, // Inst #19623 = XCHG64rm |
| 22478 | { 19622, 2, 1, 0, 1007, 1, 1, X86ImpOpBase + 705, 300, 0, 0x4800020002ULL }, // Inst #19622 = XCHG64ar |
| 22479 | { 19621, 4, 2, 0, 1007, 0, 0, X86ImpOpBase + 0, 5729, 0, 0x4380000129ULL }, // Inst #19621 = XCHG32rr |
| 22480 | { 19620, 7, 1, 0, 1646, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380000119ULL }, // Inst #19620 = XCHG32rm |
| 22481 | { 19619, 2, 1, 0, 1007, 1, 1, X86ImpOpBase + 703, 298, 0, 0x4800000102ULL }, // Inst #19619 = XCHG32ar |
| 22482 | { 19618, 4, 2, 0, 1023, 0, 0, X86ImpOpBase + 0, 5725, 0, 0x43800000a9ULL }, // Inst #19618 = XCHG16rr |
| 22483 | { 19617, 7, 1, 0, 1645, 0, 0, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380000099ULL }, // Inst #19617 = XCHG16rm |
| 22484 | { 19616, 2, 1, 0, 1023, 1, 1, X86ImpOpBase + 701, 573, 0, 0x4800000082ULL }, // Inst #19616 = XCHG16ar |
| 22485 | { 19615, 1, 0, 0, 8, 0, 1, X86ImpOpBase + 41, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x63801c0178ULL }, // Inst #19615 = XBEGIN_4 |
| 22486 | { 19614, 1, 0, 0, 8, 0, 1, X86ImpOpBase + 41, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x63801400f8ULL }, // Inst #19614 = XBEGIN_2 |
| 22487 | { 19613, 1, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #19613 = XBEGIN |
| 22488 | { 19612, 1, 0, 0, 599, 0, 1, X86ImpOpBase + 52, 1199, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800000ULL }, // Inst #19612 = XAM_Fp80 |
| 22489 | { 19611, 1, 0, 0, 599, 0, 1, X86ImpOpBase + 52, 1198, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800000ULL }, // Inst #19611 = XAM_Fp64 |
| 22490 | { 19610, 1, 0, 0, 599, 0, 1, X86ImpOpBase + 52, 1197, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800000ULL }, // Inst #19610 = XAM_Fp32 |
| 22491 | { 19609, 0, 0, 0, 602, 0, 1, X86ImpOpBase + 52, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000065ULL }, // Inst #19609 = XAM_F |
| 22492 | { 19608, 4, 2, 0, 944, 0, 1, X86ImpOpBase + 0, 5737, 0, 0x6000002028ULL }, // Inst #19608 = XADD8rr |
| 22493 | { 19607, 7, 1, 0, 792, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000002019ULL }, // Inst #19607 = XADD8rm |
| 22494 | { 19606, 4, 2, 0, 944, 0, 1, X86ImpOpBase + 0, 5733, 0, 0x6080022028ULL }, // Inst #19606 = XADD64rr |
| 22495 | { 19605, 7, 1, 0, 1644, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080022019ULL }, // Inst #19605 = XADD64rm |
| 22496 | { 19604, 4, 2, 0, 944, 0, 1, X86ImpOpBase + 0, 5729, 0, 0x6080002128ULL }, // Inst #19604 = XADD32rr |
| 22497 | { 19603, 7, 1, 0, 1644, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080002119ULL }, // Inst #19603 = XADD32rm |
| 22498 | { 19602, 4, 2, 0, 944, 0, 1, X86ImpOpBase + 0, 5725, 0, 0x60800020a8ULL }, // Inst #19602 = XADD16rr |
| 22499 | { 19601, 7, 1, 0, 1644, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080002099ULL }, // Inst #19601 = XADD16rm |
| 22500 | { 19600, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x790000000aULL }, // Inst #19600 = XACQUIRE_PREFIX |
| 22501 | { 19599, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6300040078ULL }, // Inst #19599 = XABORT |
| 22502 | { 19598, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x32e0030818ULL }, // Inst #19598 = WRUSSQ_EVEX |
| 22503 | { 19597, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7a80024818ULL }, // Inst #19597 = WRUSSQ |
| 22504 | { 19596, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x32e0010818ULL }, // Inst #19596 = WRUSSD_EVEX |
| 22505 | { 19595, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7a80004818ULL }, // Inst #19595 = WRUSSD |
| 22506 | { 19594, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3360030018ULL }, // Inst #19594 = WRSSQ_EVEX |
| 22507 | { 19593, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00024018ULL }, // Inst #19593 = WRSSQ |
| 22508 | { 19592, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3360010018ULL }, // Inst #19592 = WRSSD_EVEX |
| 22509 | { 19591, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00004018ULL }, // Inst #19591 = WRSSD |
| 22510 | { 19590, 0, 0, 0, 1643, 3, 0, X86ImpOpBase + 348, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000206fULL }, // Inst #19590 = WRPKRUr |
| 22511 | { 19589, 0, 0, 0, 8, 3, 0, X86ImpOpBase + 348, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002046ULL }, // Inst #19589 = WRMSRNS |
| 22512 | { 19588, 0, 0, 0, 8, 3, 0, X86ImpOpBase + 444, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80003046ULL }, // Inst #19588 = WRMSRLIST |
| 22513 | { 19587, 0, 0, 0, 736, 3, 0, X86ImpOpBase + 348, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1800002001ULL }, // Inst #19587 = WRMSR |
| 22514 | { 19586, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023033ULL }, // Inst #19586 = WRGSBASE64 |
| 22515 | { 19585, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003033ULL }, // Inst #19585 = WRGSBASE |
| 22516 | { 19584, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023032ULL }, // Inst #19584 = WRFSBASE64 |
| 22517 | { 19583, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003032ULL }, // Inst #19583 = WRFSBASE |
| 22518 | { 19582, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x480003001ULL }, // Inst #19582 = WBNOINVD |
| 22519 | { 19581, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x480002001ULL }, // Inst #19581 = WBINVD |
| 22520 | { 19580, 0, 0, 0, 634, 0, 1, X86ImpOpBase + 52, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4d80000001ULL }, // Inst #19580 = WAIT |
| 22521 | { 19579, 0, 0, 0, 807, 0, 16, X86ImpOpBase + 685, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3ba0002001ULL }, // Inst #19579 = VZEROUPPER |
| 22522 | { 19578, 0, 0, 0, 806, 0, 16, X86ImpOpBase + 685, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x13ba0002001ULL }, // Inst #19578 = VZEROALL |
| 22523 | { 19577, 3, 1, 0, 1056, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xaba8002029ULL }, // Inst #19577 = VXORPSrr |
| 22524 | { 19576, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xaba8002019ULL }, // Inst #19576 = VXORPSrm |
| 22525 | { 19575, 4, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xeeabe8002029ULL }, // Inst #19575 = VXORPSZrrkz |
| 22526 | { 19574, 5, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeaabe8002029ULL }, // Inst #19574 = VXORPSZrrk |
| 22527 | { 19573, 3, 1, 0, 1406, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8abe8002029ULL }, // Inst #19573 = VXORPSZrr |
| 22528 | { 19572, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeabe8002019ULL }, // Inst #19572 = VXORPSZrmkz |
| 22529 | { 19571, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaabe8002019ULL }, // Inst #19571 = VXORPSZrmk |
| 22530 | { 19570, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eabe8002019ULL }, // Inst #19570 = VXORPSZrmbkz |
| 22531 | { 19569, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aabe8002019ULL }, // Inst #19569 = VXORPSZrmbk |
| 22532 | { 19568, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78abe8002019ULL }, // Inst #19568 = VXORPSZrmb |
| 22533 | { 19567, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8abe8002019ULL }, // Inst #19567 = VXORPSZrm |
| 22534 | { 19566, 4, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc7abe8002029ULL }, // Inst #19566 = VXORPSZ256rrkz |
| 22535 | { 19565, 5, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3abe8002029ULL }, // Inst #19565 = VXORPSZ256rrk |
| 22536 | { 19564, 3, 1, 0, 1405, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1abe8002029ULL }, // Inst #19564 = VXORPSZ256rr |
| 22537 | { 19563, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7abe8002019ULL }, // Inst #19563 = VXORPSZ256rmkz |
| 22538 | { 19562, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3abe8002019ULL }, // Inst #19562 = VXORPSZ256rmk |
| 22539 | { 19561, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77abe8002019ULL }, // Inst #19561 = VXORPSZ256rmbkz |
| 22540 | { 19560, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73abe8002019ULL }, // Inst #19560 = VXORPSZ256rmbk |
| 22541 | { 19559, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71abe8002019ULL }, // Inst #19559 = VXORPSZ256rmb |
| 22542 | { 19558, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1abe8002019ULL }, // Inst #19558 = VXORPSZ256rm |
| 22543 | { 19557, 4, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa6abe8002029ULL }, // Inst #19557 = VXORPSZ128rrkz |
| 22544 | { 19556, 5, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2abe8002029ULL }, // Inst #19556 = VXORPSZ128rrk |
| 22545 | { 19555, 3, 1, 0, 1404, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0abe8002029ULL }, // Inst #19555 = VXORPSZ128rr |
| 22546 | { 19554, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6abe8002019ULL }, // Inst #19554 = VXORPSZ128rmkz |
| 22547 | { 19553, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2abe8002019ULL }, // Inst #19553 = VXORPSZ128rmk |
| 22548 | { 19552, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76abe8002019ULL }, // Inst #19552 = VXORPSZ128rmbkz |
| 22549 | { 19551, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72abe8002019ULL }, // Inst #19551 = VXORPSZ128rmbk |
| 22550 | { 19550, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70abe8002019ULL }, // Inst #19550 = VXORPSZ128rmb |
| 22551 | { 19549, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0abe8002019ULL }, // Inst #19549 = VXORPSZ128rm |
| 22552 | { 19548, 3, 1, 0, 811, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1aba8002029ULL }, // Inst #19548 = VXORPSYrr |
| 22553 | { 19547, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1aba8002019ULL }, // Inst #19547 = VXORPSYrm |
| 22554 | { 19546, 3, 1, 0, 1056, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xabb0002829ULL }, // Inst #19546 = VXORPDrr |
| 22555 | { 19545, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xabb0002819ULL }, // Inst #19545 = VXORPDrm |
| 22556 | { 19544, 4, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xeeabf0022829ULL }, // Inst #19544 = VXORPDZrrkz |
| 22557 | { 19543, 5, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeaabf0022829ULL }, // Inst #19543 = VXORPDZrrk |
| 22558 | { 19542, 3, 1, 0, 1406, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8abf0022829ULL }, // Inst #19542 = VXORPDZrr |
| 22559 | { 19541, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeabf0022819ULL }, // Inst #19541 = VXORPDZrmkz |
| 22560 | { 19540, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaabf0022819ULL }, // Inst #19540 = VXORPDZrmk |
| 22561 | { 19539, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eabf0022819ULL }, // Inst #19539 = VXORPDZrmbkz |
| 22562 | { 19538, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aabf0022819ULL }, // Inst #19538 = VXORPDZrmbk |
| 22563 | { 19537, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98abf0022819ULL }, // Inst #19537 = VXORPDZrmb |
| 22564 | { 19536, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8abf0022819ULL }, // Inst #19536 = VXORPDZrm |
| 22565 | { 19535, 4, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc7abf0022829ULL }, // Inst #19535 = VXORPDZ256rrkz |
| 22566 | { 19534, 5, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3abf0022829ULL }, // Inst #19534 = VXORPDZ256rrk |
| 22567 | { 19533, 3, 1, 0, 1405, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1abf0022829ULL }, // Inst #19533 = VXORPDZ256rr |
| 22568 | { 19532, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7abf0022819ULL }, // Inst #19532 = VXORPDZ256rmkz |
| 22569 | { 19531, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3abf0022819ULL }, // Inst #19531 = VXORPDZ256rmk |
| 22570 | { 19530, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97abf0022819ULL }, // Inst #19530 = VXORPDZ256rmbkz |
| 22571 | { 19529, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93abf0022819ULL }, // Inst #19529 = VXORPDZ256rmbk |
| 22572 | { 19528, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91abf0022819ULL }, // Inst #19528 = VXORPDZ256rmb |
| 22573 | { 19527, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1abf0022819ULL }, // Inst #19527 = VXORPDZ256rm |
| 22574 | { 19526, 4, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa6abf0022829ULL }, // Inst #19526 = VXORPDZ128rrkz |
| 22575 | { 19525, 5, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2abf0022829ULL }, // Inst #19525 = VXORPDZ128rrk |
| 22576 | { 19524, 3, 1, 0, 1404, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0abf0022829ULL }, // Inst #19524 = VXORPDZ128rr |
| 22577 | { 19523, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6abf0022819ULL }, // Inst #19523 = VXORPDZ128rmkz |
| 22578 | { 19522, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2abf0022819ULL }, // Inst #19522 = VXORPDZ128rmk |
| 22579 | { 19521, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96abf0022819ULL }, // Inst #19521 = VXORPDZ128rmbkz |
| 22580 | { 19520, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92abf0022819ULL }, // Inst #19520 = VXORPDZ128rmbk |
| 22581 | { 19519, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90abf0022819ULL }, // Inst #19519 = VXORPDZ128rmb |
| 22582 | { 19518, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0abf0022819ULL }, // Inst #19518 = VXORPDZ128rm |
| 22583 | { 19517, 3, 1, 0, 811, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1abb0002829ULL }, // Inst #19517 = VXORPDYrr |
| 22584 | { 19516, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1abb0002819ULL }, // Inst #19516 = VXORPDYrm |
| 22585 | { 19515, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8a28002029ULL }, // Inst #19515 = VUNPCKLPSrr |
| 22586 | { 19514, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8a28002019ULL }, // Inst #19514 = VUNPCKLPSrm |
| 22587 | { 19513, 4, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xee8a68002029ULL }, // Inst #19513 = VUNPCKLPSZrrkz |
| 22588 | { 19512, 5, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xea8a68002029ULL }, // Inst #19512 = VUNPCKLPSZrrk |
| 22589 | { 19511, 3, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88a68002029ULL }, // Inst #19511 = VUNPCKLPSZrr |
| 22590 | { 19510, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee8a68002019ULL }, // Inst #19510 = VUNPCKLPSZrmkz |
| 22591 | { 19509, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea8a68002019ULL }, // Inst #19509 = VUNPCKLPSZrmk |
| 22592 | { 19508, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e8a68002019ULL }, // Inst #19508 = VUNPCKLPSZrmbkz |
| 22593 | { 19507, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a8a68002019ULL }, // Inst #19507 = VUNPCKLPSZrmbk |
| 22594 | { 19506, 7, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x788a68002019ULL }, // Inst #19506 = VUNPCKLPSZrmb |
| 22595 | { 19505, 7, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88a68002019ULL }, // Inst #19505 = VUNPCKLPSZrm |
| 22596 | { 19504, 4, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc78a68002029ULL }, // Inst #19504 = VUNPCKLPSZ256rrkz |
| 22597 | { 19503, 5, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc38a68002029ULL }, // Inst #19503 = VUNPCKLPSZ256rrk |
| 22598 | { 19502, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18a68002029ULL }, // Inst #19502 = VUNPCKLPSZ256rr |
| 22599 | { 19501, 8, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc78a68002019ULL }, // Inst #19501 = VUNPCKLPSZ256rmkz |
| 22600 | { 19500, 9, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc38a68002019ULL }, // Inst #19500 = VUNPCKLPSZ256rmk |
| 22601 | { 19499, 8, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x778a68002019ULL }, // Inst #19499 = VUNPCKLPSZ256rmbkz |
| 22602 | { 19498, 9, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x738a68002019ULL }, // Inst #19498 = VUNPCKLPSZ256rmbk |
| 22603 | { 19497, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x718a68002019ULL }, // Inst #19497 = VUNPCKLPSZ256rmb |
| 22604 | { 19496, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18a68002019ULL }, // Inst #19496 = VUNPCKLPSZ256rm |
| 22605 | { 19495, 4, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa68a68002029ULL }, // Inst #19495 = VUNPCKLPSZ128rrkz |
| 22606 | { 19494, 5, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa28a68002029ULL }, // Inst #19494 = VUNPCKLPSZ128rrk |
| 22607 | { 19493, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08a68002029ULL }, // Inst #19493 = VUNPCKLPSZ128rr |
| 22608 | { 19492, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa68a68002019ULL }, // Inst #19492 = VUNPCKLPSZ128rmkz |
| 22609 | { 19491, 9, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa28a68002019ULL }, // Inst #19491 = VUNPCKLPSZ128rmk |
| 22610 | { 19490, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x768a68002019ULL }, // Inst #19490 = VUNPCKLPSZ128rmbkz |
| 22611 | { 19489, 9, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x728a68002019ULL }, // Inst #19489 = VUNPCKLPSZ128rmbk |
| 22612 | { 19488, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x708a68002019ULL }, // Inst #19488 = VUNPCKLPSZ128rmb |
| 22613 | { 19487, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08a68002019ULL }, // Inst #19487 = VUNPCKLPSZ128rm |
| 22614 | { 19486, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18a28002029ULL }, // Inst #19486 = VUNPCKLPSYrr |
| 22615 | { 19485, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18a28002019ULL }, // Inst #19485 = VUNPCKLPSYrm |
| 22616 | { 19484, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8a30002829ULL }, // Inst #19484 = VUNPCKLPDrr |
| 22617 | { 19483, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8a30002819ULL }, // Inst #19483 = VUNPCKLPDrm |
| 22618 | { 19482, 4, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xee8a70022829ULL }, // Inst #19482 = VUNPCKLPDZrrkz |
| 22619 | { 19481, 5, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xea8a70022829ULL }, // Inst #19481 = VUNPCKLPDZrrk |
| 22620 | { 19480, 3, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88a70022829ULL }, // Inst #19480 = VUNPCKLPDZrr |
| 22621 | { 19479, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee8a70022819ULL }, // Inst #19479 = VUNPCKLPDZrmkz |
| 22622 | { 19478, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea8a70022819ULL }, // Inst #19478 = VUNPCKLPDZrmk |
| 22623 | { 19477, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e8a70022819ULL }, // Inst #19477 = VUNPCKLPDZrmbkz |
| 22624 | { 19476, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a8a70022819ULL }, // Inst #19476 = VUNPCKLPDZrmbk |
| 22625 | { 19475, 7, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x988a70022819ULL }, // Inst #19475 = VUNPCKLPDZrmb |
| 22626 | { 19474, 7, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88a70022819ULL }, // Inst #19474 = VUNPCKLPDZrm |
| 22627 | { 19473, 4, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc78a70022829ULL }, // Inst #19473 = VUNPCKLPDZ256rrkz |
| 22628 | { 19472, 5, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc38a70022829ULL }, // Inst #19472 = VUNPCKLPDZ256rrk |
| 22629 | { 19471, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18a70022829ULL }, // Inst #19471 = VUNPCKLPDZ256rr |
| 22630 | { 19470, 8, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc78a70022819ULL }, // Inst #19470 = VUNPCKLPDZ256rmkz |
| 22631 | { 19469, 9, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc38a70022819ULL }, // Inst #19469 = VUNPCKLPDZ256rmk |
| 22632 | { 19468, 8, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x978a70022819ULL }, // Inst #19468 = VUNPCKLPDZ256rmbkz |
| 22633 | { 19467, 9, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x938a70022819ULL }, // Inst #19467 = VUNPCKLPDZ256rmbk |
| 22634 | { 19466, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x918a70022819ULL }, // Inst #19466 = VUNPCKLPDZ256rmb |
| 22635 | { 19465, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18a70022819ULL }, // Inst #19465 = VUNPCKLPDZ256rm |
| 22636 | { 19464, 4, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa68a70022829ULL }, // Inst #19464 = VUNPCKLPDZ128rrkz |
| 22637 | { 19463, 5, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa28a70022829ULL }, // Inst #19463 = VUNPCKLPDZ128rrk |
| 22638 | { 19462, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08a70022829ULL }, // Inst #19462 = VUNPCKLPDZ128rr |
| 22639 | { 19461, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa68a70022819ULL }, // Inst #19461 = VUNPCKLPDZ128rmkz |
| 22640 | { 19460, 9, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa28a70022819ULL }, // Inst #19460 = VUNPCKLPDZ128rmk |
| 22641 | { 19459, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x968a70022819ULL }, // Inst #19459 = VUNPCKLPDZ128rmbkz |
| 22642 | { 19458, 9, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x928a70022819ULL }, // Inst #19458 = VUNPCKLPDZ128rmbk |
| 22643 | { 19457, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x908a70022819ULL }, // Inst #19457 = VUNPCKLPDZ128rmb |
| 22644 | { 19456, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08a70022819ULL }, // Inst #19456 = VUNPCKLPDZ128rm |
| 22645 | { 19455, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18a30002829ULL }, // Inst #19455 = VUNPCKLPDYrr |
| 22646 | { 19454, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18a30002819ULL }, // Inst #19454 = VUNPCKLPDYrm |
| 22647 | { 19453, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8aa8002029ULL }, // Inst #19453 = VUNPCKHPSrr |
| 22648 | { 19452, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8aa8002019ULL }, // Inst #19452 = VUNPCKHPSrm |
| 22649 | { 19451, 4, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xee8ae8002029ULL }, // Inst #19451 = VUNPCKHPSZrrkz |
| 22650 | { 19450, 5, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xea8ae8002029ULL }, // Inst #19450 = VUNPCKHPSZrrk |
| 22651 | { 19449, 3, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88ae8002029ULL }, // Inst #19449 = VUNPCKHPSZrr |
| 22652 | { 19448, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee8ae8002019ULL }, // Inst #19448 = VUNPCKHPSZrmkz |
| 22653 | { 19447, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea8ae8002019ULL }, // Inst #19447 = VUNPCKHPSZrmk |
| 22654 | { 19446, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e8ae8002019ULL }, // Inst #19446 = VUNPCKHPSZrmbkz |
| 22655 | { 19445, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a8ae8002019ULL }, // Inst #19445 = VUNPCKHPSZrmbk |
| 22656 | { 19444, 7, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x788ae8002019ULL }, // Inst #19444 = VUNPCKHPSZrmb |
| 22657 | { 19443, 7, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88ae8002019ULL }, // Inst #19443 = VUNPCKHPSZrm |
| 22658 | { 19442, 4, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc78ae8002029ULL }, // Inst #19442 = VUNPCKHPSZ256rrkz |
| 22659 | { 19441, 5, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc38ae8002029ULL }, // Inst #19441 = VUNPCKHPSZ256rrk |
| 22660 | { 19440, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18ae8002029ULL }, // Inst #19440 = VUNPCKHPSZ256rr |
| 22661 | { 19439, 8, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc78ae8002019ULL }, // Inst #19439 = VUNPCKHPSZ256rmkz |
| 22662 | { 19438, 9, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc38ae8002019ULL }, // Inst #19438 = VUNPCKHPSZ256rmk |
| 22663 | { 19437, 8, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x778ae8002019ULL }, // Inst #19437 = VUNPCKHPSZ256rmbkz |
| 22664 | { 19436, 9, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x738ae8002019ULL }, // Inst #19436 = VUNPCKHPSZ256rmbk |
| 22665 | { 19435, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x718ae8002019ULL }, // Inst #19435 = VUNPCKHPSZ256rmb |
| 22666 | { 19434, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18ae8002019ULL }, // Inst #19434 = VUNPCKHPSZ256rm |
| 22667 | { 19433, 4, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa68ae8002029ULL }, // Inst #19433 = VUNPCKHPSZ128rrkz |
| 22668 | { 19432, 5, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa28ae8002029ULL }, // Inst #19432 = VUNPCKHPSZ128rrk |
| 22669 | { 19431, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08ae8002029ULL }, // Inst #19431 = VUNPCKHPSZ128rr |
| 22670 | { 19430, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa68ae8002019ULL }, // Inst #19430 = VUNPCKHPSZ128rmkz |
| 22671 | { 19429, 9, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa28ae8002019ULL }, // Inst #19429 = VUNPCKHPSZ128rmk |
| 22672 | { 19428, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x768ae8002019ULL }, // Inst #19428 = VUNPCKHPSZ128rmbkz |
| 22673 | { 19427, 9, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x728ae8002019ULL }, // Inst #19427 = VUNPCKHPSZ128rmbk |
| 22674 | { 19426, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x708ae8002019ULL }, // Inst #19426 = VUNPCKHPSZ128rmb |
| 22675 | { 19425, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08ae8002019ULL }, // Inst #19425 = VUNPCKHPSZ128rm |
| 22676 | { 19424, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18aa8002029ULL }, // Inst #19424 = VUNPCKHPSYrr |
| 22677 | { 19423, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18aa8002019ULL }, // Inst #19423 = VUNPCKHPSYrm |
| 22678 | { 19422, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x8ab0002829ULL }, // Inst #19422 = VUNPCKHPDrr |
| 22679 | { 19421, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8ab0002819ULL }, // Inst #19421 = VUNPCKHPDrm |
| 22680 | { 19420, 4, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xee8af0022829ULL }, // Inst #19420 = VUNPCKHPDZrrkz |
| 22681 | { 19419, 5, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xea8af0022829ULL }, // Inst #19419 = VUNPCKHPDZrrk |
| 22682 | { 19418, 3, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88af0022829ULL }, // Inst #19418 = VUNPCKHPDZrr |
| 22683 | { 19417, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee8af0022819ULL }, // Inst #19417 = VUNPCKHPDZrmkz |
| 22684 | { 19416, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea8af0022819ULL }, // Inst #19416 = VUNPCKHPDZrmk |
| 22685 | { 19415, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e8af0022819ULL }, // Inst #19415 = VUNPCKHPDZrmbkz |
| 22686 | { 19414, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a8af0022819ULL }, // Inst #19414 = VUNPCKHPDZrmbk |
| 22687 | { 19413, 7, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x988af0022819ULL }, // Inst #19413 = VUNPCKHPDZrmb |
| 22688 | { 19412, 7, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88af0022819ULL }, // Inst #19412 = VUNPCKHPDZrm |
| 22689 | { 19411, 4, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc78af0022829ULL }, // Inst #19411 = VUNPCKHPDZ256rrkz |
| 22690 | { 19410, 5, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc38af0022829ULL }, // Inst #19410 = VUNPCKHPDZ256rrk |
| 22691 | { 19409, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18af0022829ULL }, // Inst #19409 = VUNPCKHPDZ256rr |
| 22692 | { 19408, 8, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc78af0022819ULL }, // Inst #19408 = VUNPCKHPDZ256rmkz |
| 22693 | { 19407, 9, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc38af0022819ULL }, // Inst #19407 = VUNPCKHPDZ256rmk |
| 22694 | { 19406, 8, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x978af0022819ULL }, // Inst #19406 = VUNPCKHPDZ256rmbkz |
| 22695 | { 19405, 9, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x938af0022819ULL }, // Inst #19405 = VUNPCKHPDZ256rmbk |
| 22696 | { 19404, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x918af0022819ULL }, // Inst #19404 = VUNPCKHPDZ256rmb |
| 22697 | { 19403, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18af0022819ULL }, // Inst #19403 = VUNPCKHPDZ256rm |
| 22698 | { 19402, 4, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa68af0022829ULL }, // Inst #19402 = VUNPCKHPDZ128rrkz |
| 22699 | { 19401, 5, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa28af0022829ULL }, // Inst #19401 = VUNPCKHPDZ128rrk |
| 22700 | { 19400, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa08af0022829ULL }, // Inst #19400 = VUNPCKHPDZ128rr |
| 22701 | { 19399, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa68af0022819ULL }, // Inst #19399 = VUNPCKHPDZ128rmkz |
| 22702 | { 19398, 9, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa28af0022819ULL }, // Inst #19398 = VUNPCKHPDZ128rmk |
| 22703 | { 19397, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x968af0022819ULL }, // Inst #19397 = VUNPCKHPDZ128rmbkz |
| 22704 | { 19396, 9, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x928af0022819ULL }, // Inst #19396 = VUNPCKHPDZ128rmbk |
| 22705 | { 19395, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x908af0022819ULL }, // Inst #19395 = VUNPCKHPDZ128rmb |
| 22706 | { 19394, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08af0022819ULL }, // Inst #19394 = VUNPCKHPDZ128rm |
| 22707 | { 19393, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18ab0002829ULL }, // Inst #19393 = VUNPCKHPDYrr |
| 22708 | { 19392, 7, 1, 0, 1428, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18ab0002819ULL }, // Inst #19392 = VUNPCKHPDYrm |
| 22709 | { 19391, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x1728002029ULL }, // Inst #19391 = VUCOMISSrr_Int |
| 22710 | { 19390, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 986, 0|(1ULL<<MCID::MayRaiseFPException), 0x1728002029ULL }, // Inst #19390 = VUCOMISSrr |
| 22711 | { 19389, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1728002019ULL }, // Inst #19389 = VUCOMISSrm_Int |
| 22712 | { 19388, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1728002019ULL }, // Inst #19388 = VUCOMISSrm |
| 22713 | { 19387, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2334, 0, 0x701768042029ULL }, // Inst #19387 = VUCOMISSZrrb |
| 22714 | { 19386, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x601768002029ULL }, // Inst #19386 = VUCOMISSZrr_Int |
| 22715 | { 19385, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2693, 0|(1ULL<<MCID::MayRaiseFPException), 0x601768002029ULL }, // Inst #19385 = VUCOMISSZrr |
| 22716 | { 19384, 6, 0, 0, 85, 1, 1, X86ImpOpBase + 154, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601768002019ULL }, // Inst #19384 = VUCOMISSZrm_Int |
| 22717 | { 19383, 6, 0, 0, 85, 1, 1, X86ImpOpBase + 154, 2687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601768002019ULL }, // Inst #19383 = VUCOMISSZrm |
| 22718 | { 19382, 2, 0, 0, 1822, 1, 1, X86ImpOpBase + 154, 2334, 0, 0x501768052029ULL }, // Inst #19382 = VUCOMISHZrrb |
| 22719 | { 19381, 2, 0, 0, 1822, 1, 1, X86ImpOpBase + 154, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x401768012029ULL }, // Inst #19381 = VUCOMISHZrr_Int |
| 22720 | { 19380, 2, 0, 0, 1822, 1, 1, X86ImpOpBase + 154, 2685, 0|(1ULL<<MCID::MayRaiseFPException), 0x401768012029ULL }, // Inst #19380 = VUCOMISHZrr |
| 22721 | { 19379, 6, 0, 0, 1934, 1, 1, X86ImpOpBase + 154, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401768012019ULL }, // Inst #19379 = VUCOMISHZrm_Int |
| 22722 | { 19378, 6, 0, 0, 1934, 1, 1, X86ImpOpBase + 154, 2679, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401768012019ULL }, // Inst #19378 = VUCOMISHZrm |
| 22723 | { 19377, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x1730002829ULL }, // Inst #19377 = VUCOMISDrr_Int |
| 22724 | { 19376, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 978, 0|(1ULL<<MCID::MayRaiseFPException), 0x1730002829ULL }, // Inst #19376 = VUCOMISDrr |
| 22725 | { 19375, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1730002819ULL }, // Inst #19375 = VUCOMISDrm_Int |
| 22726 | { 19374, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 972, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1730002819ULL }, // Inst #19374 = VUCOMISDrm |
| 22727 | { 19373, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2334, 0, 0x901770062829ULL }, // Inst #19373 = VUCOMISDZrrb |
| 22728 | { 19372, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x801770022829ULL }, // Inst #19372 = VUCOMISDZrr_Int |
| 22729 | { 19371, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2677, 0|(1ULL<<MCID::MayRaiseFPException), 0x801770022829ULL }, // Inst #19371 = VUCOMISDZrr |
| 22730 | { 19370, 6, 0, 0, 85, 1, 1, X86ImpOpBase + 154, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801770022819ULL }, // Inst #19370 = VUCOMISDZrm_Int |
| 22731 | { 19369, 6, 0, 0, 85, 1, 1, X86ImpOpBase + 154, 2671, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801770022819ULL }, // Inst #19369 = VUCOMISDZrm |
| 22732 | { 19368, 2, 0, 0, 599, 0, 1, X86ImpOpBase + 0, 535, 0, 0x728004829ULL }, // Inst #19368 = VTESTPSrr |
| 22733 | { 19367, 6, 0, 0, 598, 0, 1, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x728004819ULL }, // Inst #19367 = VTESTPSrm |
| 22734 | { 19366, 2, 0, 0, 597, 0, 1, X86ImpOpBase + 0, 2866, 0, 0x10728004829ULL }, // Inst #19366 = VTESTPSYrr |
| 22735 | { 19365, 6, 0, 0, 596, 0, 1, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x10728004819ULL }, // Inst #19365 = VTESTPSYrm |
| 22736 | { 19364, 2, 0, 0, 599, 0, 1, X86ImpOpBase + 0, 535, 0, 0x7b0004829ULL }, // Inst #19364 = VTESTPDrr |
| 22737 | { 19363, 6, 0, 0, 598, 0, 1, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x7b0004819ULL }, // Inst #19363 = VTESTPDrm |
| 22738 | { 19362, 2, 0, 0, 597, 0, 1, X86ImpOpBase + 0, 2866, 0, 0x107b0004829ULL }, // Inst #19362 = VTESTPDYrr |
| 22739 | { 19361, 6, 0, 0, 596, 0, 1, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x107b0004819ULL }, // Inst #19361 = VTESTPDYrm |
| 22740 | { 19360, 3, 1, 0, 1456, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xae28003029ULL }, // Inst #19360 = VSUBSSrr_Int |
| 22741 | { 19359, 3, 1, 0, 1456, 1, 0, X86ImpOpBase + 78, 1982, 0|(1ULL<<MCID::MayRaiseFPException), 0xae28003029ULL }, // Inst #19359 = VSUBSSrr |
| 22742 | { 19358, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae28003019ULL }, // Inst #19358 = VSUBSSrm_Int |
| 22743 | { 19357, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae28003019ULL }, // Inst #19357 = VSUBSSrm |
| 22744 | { 19356, 5, 1, 0, 1859, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x176ae68003029ULL }, // Inst #19356 = VSUBSSZrrb_Intkz |
| 22745 | { 19355, 6, 1, 0, 35, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x172ae68003029ULL }, // Inst #19355 = VSUBSSZrrb_Intk |
| 22746 | { 19354, 4, 1, 0, 35, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x170ae68003029ULL }, // Inst #19354 = VSUBSSZrrb_Int |
| 22747 | { 19353, 4, 1, 0, 1859, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66ae68003029ULL }, // Inst #19353 = VSUBSSZrr_Intkz |
| 22748 | { 19352, 5, 1, 0, 35, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62ae68003029ULL }, // Inst #19352 = VSUBSSZrr_Intk |
| 22749 | { 19351, 3, 1, 0, 35, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ae68003029ULL }, // Inst #19351 = VSUBSSZrr_Int |
| 22750 | { 19350, 3, 1, 0, 35, 1, 0, X86ImpOpBase + 78, 1972, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ae68003029ULL }, // Inst #19350 = VSUBSSZrr |
| 22751 | { 19349, 8, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66ae68003019ULL }, // Inst #19349 = VSUBSSZrm_Intkz |
| 22752 | { 19348, 9, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62ae68003019ULL }, // Inst #19348 = VSUBSSZrm_Intk |
| 22753 | { 19347, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ae68003019ULL }, // Inst #19347 = VSUBSSZrm_Int |
| 22754 | { 19346, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ae68003019ULL }, // Inst #19346 = VSUBSSZrm |
| 22755 | { 19345, 5, 1, 0, 1866, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x156ae68013029ULL }, // Inst #19345 = VSUBSHZrrb_Intkz |
| 22756 | { 19344, 6, 1, 0, 1866, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x152ae68013029ULL }, // Inst #19344 = VSUBSHZrrb_Intk |
| 22757 | { 19343, 4, 1, 0, 1736, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x150ae68013029ULL }, // Inst #19343 = VSUBSHZrrb_Int |
| 22758 | { 19342, 4, 1, 0, 1866, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x46ae68013029ULL }, // Inst #19342 = VSUBSHZrr_Intkz |
| 22759 | { 19341, 5, 1, 0, 1866, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x42ae68013029ULL }, // Inst #19341 = VSUBSHZrr_Intk |
| 22760 | { 19340, 3, 1, 0, 1736, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ae68013029ULL }, // Inst #19340 = VSUBSHZrr_Int |
| 22761 | { 19339, 3, 1, 0, 1736, 1, 0, X86ImpOpBase + 78, 1962, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ae68013029ULL }, // Inst #19339 = VSUBSHZrr |
| 22762 | { 19338, 8, 1, 0, 1725, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46ae68013019ULL }, // Inst #19338 = VSUBSHZrm_Intkz |
| 22763 | { 19337, 9, 1, 0, 1725, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42ae68013019ULL }, // Inst #19337 = VSUBSHZrm_Intk |
| 22764 | { 19336, 7, 1, 0, 1725, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ae68013019ULL }, // Inst #19336 = VSUBSHZrm_Int |
| 22765 | { 19335, 7, 1, 0, 1725, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ae68013019ULL }, // Inst #19335 = VSUBSHZrm |
| 22766 | { 19334, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xae30003829ULL }, // Inst #19334 = VSUBSDrr_Int |
| 22767 | { 19333, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1952, 0|(1ULL<<MCID::MayRaiseFPException), 0xae30003829ULL }, // Inst #19333 = VSUBSDrr |
| 22768 | { 19332, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae30003819ULL }, // Inst #19332 = VSUBSDrm_Int |
| 22769 | { 19331, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae30003819ULL }, // Inst #19331 = VSUBSDrm |
| 22770 | { 19330, 5, 1, 0, 1858, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x196ae70023829ULL }, // Inst #19330 = VSUBSDZrrb_Intkz |
| 22771 | { 19329, 6, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x192ae70023829ULL }, // Inst #19329 = VSUBSDZrrb_Intk |
| 22772 | { 19328, 4, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x190ae70023829ULL }, // Inst #19328 = VSUBSDZrrb_Int |
| 22773 | { 19327, 4, 1, 0, 1858, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86ae70023829ULL }, // Inst #19327 = VSUBSDZrr_Intkz |
| 22774 | { 19326, 5, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82ae70023829ULL }, // Inst #19326 = VSUBSDZrr_Intk |
| 22775 | { 19325, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ae70023829ULL }, // Inst #19325 = VSUBSDZrr_Int |
| 22776 | { 19324, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1918, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ae70023829ULL }, // Inst #19324 = VSUBSDZrr |
| 22777 | { 19323, 8, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86ae70023819ULL }, // Inst #19323 = VSUBSDZrm_Intkz |
| 22778 | { 19322, 9, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82ae70023819ULL }, // Inst #19322 = VSUBSDZrm_Intk |
| 22779 | { 19321, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ae70023819ULL }, // Inst #19321 = VSUBSDZrm_Int |
| 22780 | { 19320, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ae70023819ULL }, // Inst #19320 = VSUBSDZrm |
| 22781 | { 19319, 3, 1, 0, 1656, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xae28002029ULL }, // Inst #19319 = VSUBPSrr |
| 22782 | { 19318, 7, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae28002019ULL }, // Inst #19318 = VSUBPSrm |
| 22783 | { 19317, 4, 1, 0, 1905, 1, 0, X86ImpOpBase + 78, 1899, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeae68002029ULL }, // Inst #19317 = VSUBPSZrrkz |
| 22784 | { 19316, 5, 1, 0, 1905, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaae68002029ULL }, // Inst #19316 = VSUBPSZrrk |
| 22785 | { 19315, 5, 1, 0, 1905, 1, 0, X86ImpOpBase + 78, 1889, 0, 0x17eae68002029ULL }, // Inst #19315 = VSUBPSZrrbkz |
| 22786 | { 19314, 6, 1, 0, 1905, 1, 0, X86ImpOpBase + 78, 1883, 0, 0x17aae68002029ULL }, // Inst #19314 = VSUBPSZrrbk |
| 22787 | { 19313, 4, 1, 0, 1861, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x178ae68002029ULL }, // Inst #19313 = VSUBPSZrrb |
| 22788 | { 19312, 3, 1, 0, 1861, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8ae68002029ULL }, // Inst #19312 = VSUBPSZrr |
| 22789 | { 19311, 8, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeae68002019ULL }, // Inst #19311 = VSUBPSZrmkz |
| 22790 | { 19310, 9, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaae68002019ULL }, // Inst #19310 = VSUBPSZrmk |
| 22791 | { 19309, 8, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eae68002019ULL }, // Inst #19309 = VSUBPSZrmbkz |
| 22792 | { 19308, 9, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aae68002019ULL }, // Inst #19308 = VSUBPSZrmbk |
| 22793 | { 19307, 7, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78ae68002019ULL }, // Inst #19307 = VSUBPSZrmb |
| 22794 | { 19306, 7, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ae68002019ULL }, // Inst #19306 = VSUBPSZrm |
| 22795 | { 19305, 4, 1, 0, 1857, 1, 0, X86ImpOpBase + 78, 1871, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7ae68002029ULL }, // Inst #19305 = VSUBPSZ256rrkz |
| 22796 | { 19304, 5, 1, 0, 1657, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3ae68002029ULL }, // Inst #19304 = VSUBPSZ256rrk |
| 22797 | { 19303, 3, 1, 0, 1657, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1ae68002029ULL }, // Inst #19303 = VSUBPSZ256rr |
| 22798 | { 19302, 8, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ae68002019ULL }, // Inst #19302 = VSUBPSZ256rmkz |
| 22799 | { 19301, 9, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ae68002019ULL }, // Inst #19301 = VSUBPSZ256rmk |
| 22800 | { 19300, 8, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77ae68002019ULL }, // Inst #19300 = VSUBPSZ256rmbkz |
| 22801 | { 19299, 9, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73ae68002019ULL }, // Inst #19299 = VSUBPSZ256rmbk |
| 22802 | { 19298, 7, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71ae68002019ULL }, // Inst #19298 = VSUBPSZ256rmb |
| 22803 | { 19297, 7, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ae68002019ULL }, // Inst #19297 = VSUBPSZ256rm |
| 22804 | { 19296, 4, 1, 0, 1856, 1, 0, X86ImpOpBase + 78, 1845, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6ae68002029ULL }, // Inst #19296 = VSUBPSZ128rrkz |
| 22805 | { 19295, 5, 1, 0, 1656, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2ae68002029ULL }, // Inst #19295 = VSUBPSZ128rrk |
| 22806 | { 19294, 3, 1, 0, 1656, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0ae68002029ULL }, // Inst #19294 = VSUBPSZ128rr |
| 22807 | { 19293, 8, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ae68002019ULL }, // Inst #19293 = VSUBPSZ128rmkz |
| 22808 | { 19292, 9, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ae68002019ULL }, // Inst #19292 = VSUBPSZ128rmk |
| 22809 | { 19291, 8, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76ae68002019ULL }, // Inst #19291 = VSUBPSZ128rmbkz |
| 22810 | { 19290, 9, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72ae68002019ULL }, // Inst #19290 = VSUBPSZ128rmbk |
| 22811 | { 19289, 7, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70ae68002019ULL }, // Inst #19289 = VSUBPSZ128rmb |
| 22812 | { 19288, 7, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ae68002019ULL }, // Inst #19288 = VSUBPSZ128rm |
| 22813 | { 19287, 3, 1, 0, 1657, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1ae28002029ULL }, // Inst #19287 = VSUBPSYrr |
| 22814 | { 19286, 7, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ae28002019ULL }, // Inst #19286 = VSUBPSYrm |
| 22815 | { 19285, 4, 1, 0, 1888, 1, 0, X86ImpOpBase + 78, 1819, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeae68012029ULL }, // Inst #19285 = VSUBPHZrrkz |
| 22816 | { 19284, 5, 1, 0, 1888, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaae68012029ULL }, // Inst #19284 = VSUBPHZrrk |
| 22817 | { 19283, 5, 1, 0, 1888, 1, 0, X86ImpOpBase + 78, 1809, 0, 0x15eae68012029ULL }, // Inst #19283 = VSUBPHZrrbkz |
| 22818 | { 19282, 6, 1, 0, 1888, 1, 0, X86ImpOpBase + 78, 1803, 0, 0x15aae68012029ULL }, // Inst #19282 = VSUBPHZrrbk |
| 22819 | { 19281, 4, 1, 0, 1880, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x158ae68012029ULL }, // Inst #19281 = VSUBPHZrrb |
| 22820 | { 19280, 3, 1, 0, 1880, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8ae68012029ULL }, // Inst #19280 = VSUBPHZrr |
| 22821 | { 19279, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeae68012019ULL }, // Inst #19279 = VSUBPHZrmkz |
| 22822 | { 19278, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaae68012019ULL }, // Inst #19278 = VSUBPHZrmk |
| 22823 | { 19277, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eae68012019ULL }, // Inst #19277 = VSUBPHZrmbkz |
| 22824 | { 19276, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aae68012019ULL }, // Inst #19276 = VSUBPHZrmbk |
| 22825 | { 19275, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58ae68012019ULL }, // Inst #19275 = VSUBPHZrmb |
| 22826 | { 19274, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ae68012019ULL }, // Inst #19274 = VSUBPHZrm |
| 22827 | { 19273, 4, 1, 0, 1865, 1, 0, X86ImpOpBase + 78, 1782, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7ae68012029ULL }, // Inst #19273 = VSUBPHZ256rrkz |
| 22828 | { 19272, 5, 1, 0, 1865, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3ae68012029ULL }, // Inst #19272 = VSUBPHZ256rrk |
| 22829 | { 19271, 3, 1, 0, 1735, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1ae68012029ULL }, // Inst #19271 = VSUBPHZ256rr |
| 22830 | { 19270, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ae68012019ULL }, // Inst #19270 = VSUBPHZ256rmkz |
| 22831 | { 19269, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ae68012019ULL }, // Inst #19269 = VSUBPHZ256rmk |
| 22832 | { 19268, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57ae68012019ULL }, // Inst #19268 = VSUBPHZ256rmbkz |
| 22833 | { 19267, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53ae68012019ULL }, // Inst #19267 = VSUBPHZ256rmbk |
| 22834 | { 19266, 7, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51ae68012019ULL }, // Inst #19266 = VSUBPHZ256rmb |
| 22835 | { 19265, 7, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ae68012019ULL }, // Inst #19265 = VSUBPHZ256rm |
| 22836 | { 19264, 4, 1, 0, 1864, 1, 0, X86ImpOpBase + 78, 1756, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6ae68012029ULL }, // Inst #19264 = VSUBPHZ128rrkz |
| 22837 | { 19263, 5, 1, 0, 1864, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2ae68012029ULL }, // Inst #19263 = VSUBPHZ128rrk |
| 22838 | { 19262, 3, 1, 0, 1734, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0ae68012029ULL }, // Inst #19262 = VSUBPHZ128rr |
| 22839 | { 19261, 8, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ae68012019ULL }, // Inst #19261 = VSUBPHZ128rmkz |
| 22840 | { 19260, 9, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ae68012019ULL }, // Inst #19260 = VSUBPHZ128rmk |
| 22841 | { 19259, 8, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56ae68012019ULL }, // Inst #19259 = VSUBPHZ128rmbkz |
| 22842 | { 19258, 9, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52ae68012019ULL }, // Inst #19258 = VSUBPHZ128rmbk |
| 22843 | { 19257, 7, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50ae68012019ULL }, // Inst #19257 = VSUBPHZ128rmb |
| 22844 | { 19256, 7, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ae68012019ULL }, // Inst #19256 = VSUBPHZ128rm |
| 22845 | { 19255, 3, 1, 0, 28, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xae30002829ULL }, // Inst #19255 = VSUBPDrr |
| 22846 | { 19254, 7, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae30002819ULL }, // Inst #19254 = VSUBPDrm |
| 22847 | { 19253, 4, 1, 0, 340, 1, 0, X86ImpOpBase + 78, 1720, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeae70022829ULL }, // Inst #19253 = VSUBPDZrrkz |
| 22848 | { 19252, 5, 1, 0, 340, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaae70022829ULL }, // Inst #19252 = VSUBPDZrrk |
| 22849 | { 19251, 5, 1, 0, 340, 1, 0, X86ImpOpBase + 78, 1710, 0, 0x19eae70022829ULL }, // Inst #19251 = VSUBPDZrrbkz |
| 22850 | { 19250, 6, 1, 0, 340, 1, 0, X86ImpOpBase + 78, 1704, 0, 0x19aae70022829ULL }, // Inst #19250 = VSUBPDZrrbk |
| 22851 | { 19249, 4, 1, 0, 1860, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x198ae70022829ULL }, // Inst #19249 = VSUBPDZrrb |
| 22852 | { 19248, 3, 1, 0, 1860, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8ae70022829ULL }, // Inst #19248 = VSUBPDZrr |
| 22853 | { 19247, 8, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeae70022819ULL }, // Inst #19247 = VSUBPDZrmkz |
| 22854 | { 19246, 9, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaae70022819ULL }, // Inst #19246 = VSUBPDZrmk |
| 22855 | { 19245, 8, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eae70022819ULL }, // Inst #19245 = VSUBPDZrmbkz |
| 22856 | { 19244, 9, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aae70022819ULL }, // Inst #19244 = VSUBPDZrmbk |
| 22857 | { 19243, 7, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98ae70022819ULL }, // Inst #19243 = VSUBPDZrmb |
| 22858 | { 19242, 7, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ae70022819ULL }, // Inst #19242 = VSUBPDZrm |
| 22859 | { 19241, 4, 1, 0, 1855, 1, 0, X86ImpOpBase + 78, 1669, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7ae70022829ULL }, // Inst #19241 = VSUBPDZ256rrkz |
| 22860 | { 19240, 5, 1, 0, 338, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3ae70022829ULL }, // Inst #19240 = VSUBPDZ256rrk |
| 22861 | { 19239, 3, 1, 0, 338, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1ae70022829ULL }, // Inst #19239 = VSUBPDZ256rr |
| 22862 | { 19238, 8, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ae70022819ULL }, // Inst #19238 = VSUBPDZ256rmkz |
| 22863 | { 19237, 9, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ae70022819ULL }, // Inst #19237 = VSUBPDZ256rmk |
| 22864 | { 19236, 8, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97ae70022819ULL }, // Inst #19236 = VSUBPDZ256rmbkz |
| 22865 | { 19235, 9, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93ae70022819ULL }, // Inst #19235 = VSUBPDZ256rmbk |
| 22866 | { 19234, 7, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91ae70022819ULL }, // Inst #19234 = VSUBPDZ256rmb |
| 22867 | { 19233, 7, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ae70022819ULL }, // Inst #19233 = VSUBPDZ256rm |
| 22868 | { 19232, 4, 1, 0, 1854, 1, 0, X86ImpOpBase + 78, 1633, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6ae70022829ULL }, // Inst #19232 = VSUBPDZ128rrkz |
| 22869 | { 19231, 5, 1, 0, 28, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2ae70022829ULL }, // Inst #19231 = VSUBPDZ128rrk |
| 22870 | { 19230, 3, 1, 0, 28, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0ae70022829ULL }, // Inst #19230 = VSUBPDZ128rr |
| 22871 | { 19229, 8, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ae70022819ULL }, // Inst #19229 = VSUBPDZ128rmkz |
| 22872 | { 19228, 9, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ae70022819ULL }, // Inst #19228 = VSUBPDZ128rmk |
| 22873 | { 19227, 8, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96ae70022819ULL }, // Inst #19227 = VSUBPDZ128rmbkz |
| 22874 | { 19226, 9, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92ae70022819ULL }, // Inst #19226 = VSUBPDZ128rmbk |
| 22875 | { 19225, 7, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90ae70022819ULL }, // Inst #19225 = VSUBPDZ128rmb |
| 22876 | { 19224, 7, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ae70022819ULL }, // Inst #19224 = VSUBPDZ128rm |
| 22877 | { 19223, 3, 1, 0, 338, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1ae30002829ULL }, // Inst #19223 = VSUBPDYrr |
| 22878 | { 19222, 7, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ae30002819ULL }, // Inst #19222 = VSUBPDYrm |
| 22879 | { 19221, 5, 0, 0, 332, 1, 0, X86ImpOpBase + 78, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5728002023ULL }, // Inst #19221 = VSTMXCSR |
| 22880 | { 19220, 3, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xa8a8003029ULL }, // Inst #19220 = VSQRTSSr_Int |
| 22881 | { 19219, 3, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1982, 0|(1ULL<<MCID::MayRaiseFPException), 0xa8a8003029ULL }, // Inst #19219 = VSQRTSSr |
| 22882 | { 19218, 7, 1, 0, 329, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8a8003019ULL }, // Inst #19218 = VSQRTSSm_Int |
| 22883 | { 19217, 7, 1, 0, 329, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8a8003019ULL }, // Inst #19217 = VSQRTSSm |
| 22884 | { 19216, 5, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x176a8e8003029ULL }, // Inst #19216 = VSQRTSSZrb_Intkz |
| 22885 | { 19215, 6, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x172a8e8003029ULL }, // Inst #19215 = VSQRTSSZrb_Intk |
| 22886 | { 19214, 4, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x170a8e8003029ULL }, // Inst #19214 = VSQRTSSZrb_Int |
| 22887 | { 19213, 4, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66a8e8003029ULL }, // Inst #19213 = VSQRTSSZr_Intkz |
| 22888 | { 19212, 5, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62a8e8003029ULL }, // Inst #19212 = VSQRTSSZr_Intk |
| 22889 | { 19211, 3, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8003029ULL }, // Inst #19211 = VSQRTSSZr_Int |
| 22890 | { 19210, 3, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1972, 0|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8003029ULL }, // Inst #19210 = VSQRTSSZr |
| 22891 | { 19209, 8, 1, 0, 329, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66a8e8003019ULL }, // Inst #19209 = VSQRTSSZm_Intkz |
| 22892 | { 19208, 9, 1, 0, 329, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62a8e8003019ULL }, // Inst #19208 = VSQRTSSZm_Intk |
| 22893 | { 19207, 7, 1, 0, 329, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8003019ULL }, // Inst #19207 = VSQRTSSZm_Int |
| 22894 | { 19206, 7, 1, 0, 329, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8003019ULL }, // Inst #19206 = VSQRTSSZm |
| 22895 | { 19205, 5, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x156a8e8013029ULL }, // Inst #19205 = VSQRTSHZrb_Intkz |
| 22896 | { 19204, 6, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x152a8e8013029ULL }, // Inst #19204 = VSQRTSHZrb_Intk |
| 22897 | { 19203, 4, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x150a8e8013029ULL }, // Inst #19203 = VSQRTSHZrb_Int |
| 22898 | { 19202, 4, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x46a8e8013029ULL }, // Inst #19202 = VSQRTSHZr_Intkz |
| 22899 | { 19201, 5, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x42a8e8013029ULL }, // Inst #19201 = VSQRTSHZr_Intk |
| 22900 | { 19200, 3, 1, 0, 2155, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x40a8e8013029ULL }, // Inst #19200 = VSQRTSHZr_Int |
| 22901 | { 19199, 3, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 1962, 0|(1ULL<<MCID::MayRaiseFPException), 0x40a8e8013029ULL }, // Inst #19199 = VSQRTSHZr |
| 22902 | { 19198, 8, 1, 0, 1708, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46a8e8013019ULL }, // Inst #19198 = VSQRTSHZm_Intkz |
| 22903 | { 19197, 9, 1, 0, 1708, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42a8e8013019ULL }, // Inst #19197 = VSQRTSHZm_Intk |
| 22904 | { 19196, 7, 1, 0, 1708, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40a8e8013019ULL }, // Inst #19196 = VSQRTSHZm_Int |
| 22905 | { 19195, 7, 1, 0, 1709, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40a8e8013019ULL }, // Inst #19195 = VSQRTSHZm |
| 22906 | { 19194, 3, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xa8b0003829ULL }, // Inst #19194 = VSQRTSDr_Int |
| 22907 | { 19193, 3, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 1952, 0|(1ULL<<MCID::MayRaiseFPException), 0xa8b0003829ULL }, // Inst #19193 = VSQRTSDr |
| 22908 | { 19192, 7, 1, 0, 1622, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8b0003819ULL }, // Inst #19192 = VSQRTSDm_Int |
| 22909 | { 19191, 7, 1, 0, 326, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8b0003819ULL }, // Inst #19191 = VSQRTSDm |
| 22910 | { 19190, 5, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x196a8f0023829ULL }, // Inst #19190 = VSQRTSDZrb_Intkz |
| 22911 | { 19189, 6, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x192a8f0023829ULL }, // Inst #19189 = VSQRTSDZrb_Intk |
| 22912 | { 19188, 4, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x190a8f0023829ULL }, // Inst #19188 = VSQRTSDZrb_Int |
| 22913 | { 19187, 4, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86a8f0023829ULL }, // Inst #19187 = VSQRTSDZr_Intkz |
| 22914 | { 19186, 5, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82a8f0023829ULL }, // Inst #19186 = VSQRTSDZr_Intk |
| 22915 | { 19185, 3, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0023829ULL }, // Inst #19185 = VSQRTSDZr_Int |
| 22916 | { 19184, 3, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 1918, 0|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0023829ULL }, // Inst #19184 = VSQRTSDZr |
| 22917 | { 19183, 8, 1, 0, 2391, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86a8f0023819ULL }, // Inst #19183 = VSQRTSDZm_Intkz |
| 22918 | { 19182, 9, 1, 0, 2391, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82a8f0023819ULL }, // Inst #19182 = VSQRTSDZm_Intk |
| 22919 | { 19181, 7, 1, 0, 1853, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0023819ULL }, // Inst #19181 = VSQRTSDZm_Int |
| 22920 | { 19180, 7, 1, 0, 326, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0023819ULL }, // Inst #19180 = VSQRTSDZm |
| 22921 | { 19179, 2, 1, 0, 324, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x28a8002029ULL }, // Inst #19179 = VSQRTPSr |
| 22922 | { 19178, 6, 1, 0, 323, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x28a8002019ULL }, // Inst #19178 = VSQRTPSm |
| 22923 | { 19177, 3, 1, 0, 594, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee28e8002029ULL }, // Inst #19177 = VSQRTPSZrkz |
| 22924 | { 19176, 4, 1, 0, 594, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea28e8002029ULL }, // Inst #19176 = VSQRTPSZrk |
| 22925 | { 19175, 4, 1, 0, 594, 1, 0, X86ImpOpBase + 78, 2876, 0, 0x17e28e8002029ULL }, // Inst #19175 = VSQRTPSZrbkz |
| 22926 | { 19174, 5, 1, 0, 594, 1, 0, X86ImpOpBase + 78, 2871, 0, 0x17a28e8002029ULL }, // Inst #19174 = VSQRTPSZrbk |
| 22927 | { 19173, 3, 1, 0, 594, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x17828e8002029ULL }, // Inst #19173 = VSQRTPSZrb |
| 22928 | { 19172, 2, 1, 0, 2406, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe828e8002029ULL }, // Inst #19172 = VSQRTPSZr |
| 22929 | { 19171, 7, 1, 0, 593, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee28e8002019ULL }, // Inst #19171 = VSQRTPSZmkz |
| 22930 | { 19170, 8, 1, 0, 593, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea28e8002019ULL }, // Inst #19170 = VSQRTPSZmk |
| 22931 | { 19169, 7, 1, 0, 593, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e28e8002019ULL }, // Inst #19169 = VSQRTPSZmbkz |
| 22932 | { 19168, 8, 1, 0, 593, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a28e8002019ULL }, // Inst #19168 = VSQRTPSZmbk |
| 22933 | { 19167, 6, 1, 0, 593, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7828e8002019ULL }, // Inst #19167 = VSQRTPSZmb |
| 22934 | { 19166, 6, 1, 0, 593, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe828e8002019ULL }, // Inst #19166 = VSQRTPSZm |
| 22935 | { 19165, 3, 1, 0, 592, 1, 0, X86ImpOpBase + 78, 2765, 0|(1ULL<<MCID::MayRaiseFPException), 0xc728e8002029ULL }, // Inst #19165 = VSQRTPSZ256rkz |
| 22936 | { 19164, 4, 1, 0, 592, 1, 0, X86ImpOpBase + 78, 2761, 0|(1ULL<<MCID::MayRaiseFPException), 0xc328e8002029ULL }, // Inst #19164 = VSQRTPSZ256rk |
| 22937 | { 19163, 2, 1, 0, 592, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc128e8002029ULL }, // Inst #19163 = VSQRTPSZ256r |
| 22938 | { 19162, 7, 1, 0, 591, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc728e8002019ULL }, // Inst #19162 = VSQRTPSZ256mkz |
| 22939 | { 19161, 8, 1, 0, 591, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc328e8002019ULL }, // Inst #19161 = VSQRTPSZ256mk |
| 22940 | { 19160, 7, 1, 0, 591, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7728e8002019ULL }, // Inst #19160 = VSQRTPSZ256mbkz |
| 22941 | { 19159, 8, 1, 0, 591, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7328e8002019ULL }, // Inst #19159 = VSQRTPSZ256mbk |
| 22942 | { 19158, 6, 1, 0, 591, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7128e8002019ULL }, // Inst #19158 = VSQRTPSZ256mb |
| 22943 | { 19157, 6, 1, 0, 591, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc128e8002019ULL }, // Inst #19157 = VSQRTPSZ256m |
| 22944 | { 19156, 3, 1, 0, 324, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa628e8002029ULL }, // Inst #19156 = VSQRTPSZ128rkz |
| 22945 | { 19155, 4, 1, 0, 324, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa228e8002029ULL }, // Inst #19155 = VSQRTPSZ128rk |
| 22946 | { 19154, 2, 1, 0, 324, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa028e8002029ULL }, // Inst #19154 = VSQRTPSZ128r |
| 22947 | { 19153, 7, 1, 0, 590, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa628e8002019ULL }, // Inst #19153 = VSQRTPSZ128mkz |
| 22948 | { 19152, 8, 1, 0, 590, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa228e8002019ULL }, // Inst #19152 = VSQRTPSZ128mk |
| 22949 | { 19151, 7, 1, 0, 590, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7628e8002019ULL }, // Inst #19151 = VSQRTPSZ128mbkz |
| 22950 | { 19150, 8, 1, 0, 590, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7228e8002019ULL }, // Inst #19150 = VSQRTPSZ128mbk |
| 22951 | { 19149, 6, 1, 0, 590, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7028e8002019ULL }, // Inst #19149 = VSQRTPSZ128mb |
| 22952 | { 19148, 6, 1, 0, 590, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa028e8002019ULL }, // Inst #19148 = VSQRTPSZ128m |
| 22953 | { 19147, 2, 1, 0, 592, 1, 0, X86ImpOpBase + 78, 2866, 0|(1ULL<<MCID::MayRaiseFPException), 0x128a8002029ULL }, // Inst #19147 = VSQRTPSYr |
| 22954 | { 19146, 6, 1, 0, 595, 1, 0, X86ImpOpBase + 78, 2189, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x128a8002019ULL }, // Inst #19146 = VSQRTPSYm |
| 22955 | { 19145, 3, 1, 0, 2405, 1, 0, X86ImpOpBase + 78, 3008, 0|(1ULL<<MCID::MayRaiseFPException), 0xee28e8012029ULL }, // Inst #19145 = VSQRTPHZrkz |
| 22956 | { 19144, 4, 1, 0, 2405, 1, 0, X86ImpOpBase + 78, 3004, 0|(1ULL<<MCID::MayRaiseFPException), 0xea28e8012029ULL }, // Inst #19144 = VSQRTPHZrk |
| 22957 | { 19143, 4, 1, 0, 2405, 1, 0, X86ImpOpBase + 78, 3000, 0, 0x15e28e8012029ULL }, // Inst #19143 = VSQRTPHZrbkz |
| 22958 | { 19142, 5, 1, 0, 2405, 1, 0, X86ImpOpBase + 78, 2995, 0, 0x15a28e8012029ULL }, // Inst #19142 = VSQRTPHZrbk |
| 22959 | { 19141, 3, 1, 0, 2404, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x15828e8012029ULL }, // Inst #19141 = VSQRTPHZrb |
| 22960 | { 19140, 2, 1, 0, 2404, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe828e8012029ULL }, // Inst #19140 = VSQRTPHZr |
| 22961 | { 19139, 7, 1, 0, 2403, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee28e8012019ULL }, // Inst #19139 = VSQRTPHZmkz |
| 22962 | { 19138, 8, 1, 0, 2403, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea28e8012019ULL }, // Inst #19138 = VSQRTPHZmk |
| 22963 | { 19137, 7, 1, 0, 2403, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e28e8012019ULL }, // Inst #19137 = VSQRTPHZmbkz |
| 22964 | { 19136, 8, 1, 0, 2403, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a28e8012019ULL }, // Inst #19136 = VSQRTPHZmbk |
| 22965 | { 19135, 6, 1, 0, 2402, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5828e8012019ULL }, // Inst #19135 = VSQRTPHZmb |
| 22966 | { 19134, 6, 1, 0, 2402, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe828e8012019ULL }, // Inst #19134 = VSQRTPHZm |
| 22967 | { 19133, 3, 1, 0, 2398, 1, 0, X86ImpOpBase + 78, 2977, 0|(1ULL<<MCID::MayRaiseFPException), 0xc728e8012029ULL }, // Inst #19133 = VSQRTPHZ256rkz |
| 22968 | { 19132, 4, 1, 0, 2397, 1, 0, X86ImpOpBase + 78, 2973, 0|(1ULL<<MCID::MayRaiseFPException), 0xc328e8012029ULL }, // Inst #19132 = VSQRTPHZ256rk |
| 22969 | { 19131, 2, 1, 0, 2141, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc128e8012029ULL }, // Inst #19131 = VSQRTPHZ256r |
| 22970 | { 19130, 7, 1, 0, 2401, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc728e8012019ULL }, // Inst #19130 = VSQRTPHZ256mkz |
| 22971 | { 19129, 8, 1, 0, 2401, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc328e8012019ULL }, // Inst #19129 = VSQRTPHZ256mk |
| 22972 | { 19128, 7, 1, 0, 2401, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5728e8012019ULL }, // Inst #19128 = VSQRTPHZ256mbkz |
| 22973 | { 19127, 8, 1, 0, 2401, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5328e8012019ULL }, // Inst #19127 = VSQRTPHZ256mbk |
| 22974 | { 19126, 6, 1, 0, 2400, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5128e8012019ULL }, // Inst #19126 = VSQRTPHZ256mb |
| 22975 | { 19125, 6, 1, 0, 2400, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc128e8012019ULL }, // Inst #19125 = VSQRTPHZ256m |
| 22976 | { 19124, 3, 1, 0, 2399, 1, 0, X86ImpOpBase + 78, 2970, 0|(1ULL<<MCID::MayRaiseFPException), 0xa628e8012029ULL }, // Inst #19124 = VSQRTPHZ128rkz |
| 22977 | { 19123, 4, 1, 0, 2396, 1, 0, X86ImpOpBase + 78, 2966, 0|(1ULL<<MCID::MayRaiseFPException), 0xa228e8012029ULL }, // Inst #19123 = VSQRTPHZ128rk |
| 22978 | { 19122, 2, 1, 0, 2140, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa028e8012029ULL }, // Inst #19122 = VSQRTPHZ128r |
| 22979 | { 19121, 7, 1, 0, 2395, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa628e8012019ULL }, // Inst #19121 = VSQRTPHZ128mkz |
| 22980 | { 19120, 8, 1, 0, 2395, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa228e8012019ULL }, // Inst #19120 = VSQRTPHZ128mk |
| 22981 | { 19119, 7, 1, 0, 2395, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5628e8012019ULL }, // Inst #19119 = VSQRTPHZ128mbkz |
| 22982 | { 19118, 8, 1, 0, 2395, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5228e8012019ULL }, // Inst #19118 = VSQRTPHZ128mbk |
| 22983 | { 19117, 6, 1, 0, 2145, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5028e8012019ULL }, // Inst #19117 = VSQRTPHZ128mb |
| 22984 | { 19116, 6, 1, 0, 2145, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa028e8012019ULL }, // Inst #19116 = VSQRTPHZ128m |
| 22985 | { 19115, 2, 1, 0, 322, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x28b0002829ULL }, // Inst #19115 = VSQRTPDr |
| 22986 | { 19114, 6, 1, 0, 321, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x28b0002819ULL }, // Inst #19114 = VSQRTPDm |
| 22987 | { 19113, 3, 1, 0, 589, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee28f0022829ULL }, // Inst #19113 = VSQRTPDZrkz |
| 22988 | { 19112, 4, 1, 0, 589, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea28f0022829ULL }, // Inst #19112 = VSQRTPDZrk |
| 22989 | { 19111, 4, 1, 0, 589, 1, 0, X86ImpOpBase + 78, 2931, 0, 0x19e28f0022829ULL }, // Inst #19111 = VSQRTPDZrbkz |
| 22990 | { 19110, 5, 1, 0, 589, 1, 0, X86ImpOpBase + 78, 2926, 0, 0x19a28f0022829ULL }, // Inst #19110 = VSQRTPDZrbk |
| 22991 | { 19109, 3, 1, 0, 589, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x19828f0022829ULL }, // Inst #19109 = VSQRTPDZrb |
| 22992 | { 19108, 2, 1, 0, 2394, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe828f0022829ULL }, // Inst #19108 = VSQRTPDZr |
| 22993 | { 19107, 7, 1, 0, 588, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee28f0022819ULL }, // Inst #19107 = VSQRTPDZmkz |
| 22994 | { 19106, 8, 1, 0, 588, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea28f0022819ULL }, // Inst #19106 = VSQRTPDZmk |
| 22995 | { 19105, 7, 1, 0, 588, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e28f0022819ULL }, // Inst #19105 = VSQRTPDZmbkz |
| 22996 | { 19104, 8, 1, 0, 588, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a28f0022819ULL }, // Inst #19104 = VSQRTPDZmbk |
| 22997 | { 19103, 6, 1, 0, 2393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9828f0022819ULL }, // Inst #19103 = VSQRTPDZmb |
| 22998 | { 19102, 6, 1, 0, 2392, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe828f0022819ULL }, // Inst #19102 = VSQRTPDZm |
| 22999 | { 19101, 3, 1, 0, 585, 1, 0, X86ImpOpBase + 78, 2722, 0|(1ULL<<MCID::MayRaiseFPException), 0xc728f0022829ULL }, // Inst #19101 = VSQRTPDZ256rkz |
| 23000 | { 19100, 4, 1, 0, 585, 1, 0, X86ImpOpBase + 78, 2718, 0|(1ULL<<MCID::MayRaiseFPException), 0xc328f0022829ULL }, // Inst #19100 = VSQRTPDZ256rk |
| 23001 | { 19099, 2, 1, 0, 585, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc128f0022829ULL }, // Inst #19099 = VSQRTPDZ256r |
| 23002 | { 19098, 7, 1, 0, 587, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc728f0022819ULL }, // Inst #19098 = VSQRTPDZ256mkz |
| 23003 | { 19097, 8, 1, 0, 587, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc328f0022819ULL }, // Inst #19097 = VSQRTPDZ256mk |
| 23004 | { 19096, 7, 1, 0, 587, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9728f0022819ULL }, // Inst #19096 = VSQRTPDZ256mbkz |
| 23005 | { 19095, 8, 1, 0, 587, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9328f0022819ULL }, // Inst #19095 = VSQRTPDZ256mbk |
| 23006 | { 19094, 6, 1, 0, 2389, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9128f0022819ULL }, // Inst #19094 = VSQRTPDZ256mb |
| 23007 | { 19093, 6, 1, 0, 2389, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc128f0022819ULL }, // Inst #19093 = VSQRTPDZ256m |
| 23008 | { 19092, 3, 1, 0, 322, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa628f0022829ULL }, // Inst #19092 = VSQRTPDZ128rkz |
| 23009 | { 19091, 4, 1, 0, 322, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa228f0022829ULL }, // Inst #19091 = VSQRTPDZ128rk |
| 23010 | { 19090, 2, 1, 0, 322, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa028f0022829ULL }, // Inst #19090 = VSQRTPDZ128r |
| 23011 | { 19089, 7, 1, 0, 2390, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa628f0022819ULL }, // Inst #19089 = VSQRTPDZ128mkz |
| 23012 | { 19088, 8, 1, 0, 2390, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa228f0022819ULL }, // Inst #19088 = VSQRTPDZ128mk |
| 23013 | { 19087, 7, 1, 0, 2390, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9628f0022819ULL }, // Inst #19087 = VSQRTPDZ128mbkz |
| 23014 | { 19086, 8, 1, 0, 2390, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9228f0022819ULL }, // Inst #19086 = VSQRTPDZ128mbk |
| 23015 | { 19085, 6, 1, 0, 586, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9028f0022819ULL }, // Inst #19085 = VSQRTPDZ128mb |
| 23016 | { 19084, 6, 1, 0, 586, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa028f0022819ULL }, // Inst #19084 = VSQRTPDZ128m |
| 23017 | { 19083, 2, 1, 0, 585, 1, 0, X86ImpOpBase + 78, 2866, 0|(1ULL<<MCID::MayRaiseFPException), 0x128b0002829ULL }, // Inst #19083 = VSQRTPDYr |
| 23018 | { 19082, 6, 1, 0, 2388, 1, 0, X86ImpOpBase + 78, 2189, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x128b0002819ULL }, // Inst #19082 = VSQRTPDYm |
| 23019 | { 19081, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xed20005829ULL }, // Inst #19081 = VSM4RNDS4rr |
| 23020 | { 19080, 7, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xed20005819ULL }, // Inst #19080 = VSM4RNDS4rm |
| 23021 | { 19079, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1ed20005829ULL }, // Inst #19079 = VSM4RNDS4Yrr |
| 23022 | { 19078, 7, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ed20005819ULL }, // Inst #19078 = VSM4RNDS4Yrm |
| 23023 | { 19077, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xed20005029ULL }, // Inst #19077 = VSM4KEY4rr |
| 23024 | { 19076, 7, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xed20005019ULL }, // Inst #19076 = VSM4KEY4rm |
| 23025 | { 19075, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1ed20005029ULL }, // Inst #19075 = VSM4KEY4Yrr |
| 23026 | { 19074, 7, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ed20005019ULL }, // Inst #19074 = VSM4KEY4Yrm |
| 23027 | { 19073, 5, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 5720, 0, 0xef20046829ULL }, // Inst #19073 = VSM3RNDS2rr |
| 23028 | { 19072, 9, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 5711, 0|(1ULL<<MCID::MayLoad), 0xef20046819ULL }, // Inst #19072 = VSM3RNDS2rm |
| 23029 | { 19071, 4, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 3716, 0, 0xed20004829ULL }, // Inst #19071 = VSM3MSG2rr |
| 23030 | { 19070, 8, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xed20004819ULL }, // Inst #19070 = VSM3MSG2rm |
| 23031 | { 19069, 4, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 3716, 0, 0xed20004029ULL }, // Inst #19069 = VSM3MSG1rr |
| 23032 | { 19068, 8, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xed20004019ULL }, // Inst #19068 = VSM3MSG1rm |
| 23033 | { 19067, 4, 1, 0, 1476, 0, 0, X86ImpOpBase + 0, 893, 0, 0xe328042029ULL }, // Inst #19067 = VSHUFPSrri |
| 23034 | { 19066, 8, 1, 0, 1566, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xe328042019ULL }, // Inst #19066 = VSHUFPSrmi |
| 23035 | { 19065, 5, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 2094, 0, 0xeee368042029ULL }, // Inst #19065 = VSHUFPSZrrikz |
| 23036 | { 19064, 6, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 2088, 0, 0xeae368042029ULL }, // Inst #19064 = VSHUFPSZrrik |
| 23037 | { 19063, 4, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8e368042029ULL }, // Inst #19063 = VSHUFPSZrri |
| 23038 | { 19062, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0xeee368042019ULL }, // Inst #19062 = VSHUFPSZrmikz |
| 23039 | { 19061, 10, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xeae368042019ULL }, // Inst #19061 = VSHUFPSZrmik |
| 23040 | { 19060, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8e368042019ULL }, // Inst #19060 = VSHUFPSZrmi |
| 23041 | { 19059, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0x7ee368042019ULL }, // Inst #19059 = VSHUFPSZrmbikz |
| 23042 | { 19058, 10, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0x7ae368042019ULL }, // Inst #19058 = VSHUFPSZrmbik |
| 23043 | { 19057, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x78e368042019ULL }, // Inst #19057 = VSHUFPSZrmbi |
| 23044 | { 19056, 5, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 2056, 0, 0xc7e368042029ULL }, // Inst #19056 = VSHUFPSZ256rrikz |
| 23045 | { 19055, 6, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 2050, 0, 0xc3e368042029ULL }, // Inst #19055 = VSHUFPSZ256rrik |
| 23046 | { 19054, 4, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1e368042029ULL }, // Inst #19054 = VSHUFPSZ256rri |
| 23047 | { 19053, 9, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0xc7e368042019ULL }, // Inst #19053 = VSHUFPSZ256rmikz |
| 23048 | { 19052, 10, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0xc3e368042019ULL }, // Inst #19052 = VSHUFPSZ256rmik |
| 23049 | { 19051, 8, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1e368042019ULL }, // Inst #19051 = VSHUFPSZ256rmi |
| 23050 | { 19050, 9, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0x77e368042019ULL }, // Inst #19050 = VSHUFPSZ256rmbikz |
| 23051 | { 19049, 10, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0x73e368042019ULL }, // Inst #19049 = VSHUFPSZ256rmbik |
| 23052 | { 19048, 8, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x71e368042019ULL }, // Inst #19048 = VSHUFPSZ256rmbi |
| 23053 | { 19047, 5, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 2018, 0, 0xa6e368042029ULL }, // Inst #19047 = VSHUFPSZ128rrikz |
| 23054 | { 19046, 6, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 2012, 0, 0xa2e368042029ULL }, // Inst #19046 = VSHUFPSZ128rrik |
| 23055 | { 19045, 4, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0e368042029ULL }, // Inst #19045 = VSHUFPSZ128rri |
| 23056 | { 19044, 9, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 2003, 0|(1ULL<<MCID::MayLoad), 0xa6e368042019ULL }, // Inst #19044 = VSHUFPSZ128rmikz |
| 23057 | { 19043, 10, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad), 0xa2e368042019ULL }, // Inst #19043 = VSHUFPSZ128rmik |
| 23058 | { 19042, 8, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0e368042019ULL }, // Inst #19042 = VSHUFPSZ128rmi |
| 23059 | { 19041, 9, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 2003, 0|(1ULL<<MCID::MayLoad), 0x76e368042019ULL }, // Inst #19041 = VSHUFPSZ128rmbikz |
| 23060 | { 19040, 10, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad), 0x72e368042019ULL }, // Inst #19040 = VSHUFPSZ128rmbik |
| 23061 | { 19039, 8, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x70e368042019ULL }, // Inst #19039 = VSHUFPSZ128rmbi |
| 23062 | { 19038, 4, 1, 0, 1477, 0, 0, X86ImpOpBase + 0, 901, 0, 0x1e328042029ULL }, // Inst #19038 = VSHUFPSYrri |
| 23063 | { 19037, 8, 1, 0, 1641, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x1e328042019ULL }, // Inst #19037 = VSHUFPSYrmi |
| 23064 | { 19036, 4, 1, 0, 1476, 0, 0, X86ImpOpBase + 0, 893, 0, 0xe330042829ULL }, // Inst #19036 = VSHUFPDrri |
| 23065 | { 19035, 8, 1, 0, 1566, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xe330042819ULL }, // Inst #19035 = VSHUFPDrmi |
| 23066 | { 19034, 5, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 2184, 0, 0xeee370062829ULL }, // Inst #19034 = VSHUFPDZrrikz |
| 23067 | { 19033, 6, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 2178, 0, 0xeae370062829ULL }, // Inst #19033 = VSHUFPDZrrik |
| 23068 | { 19032, 4, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8e370062829ULL }, // Inst #19032 = VSHUFPDZrri |
| 23069 | { 19031, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0xeee370062819ULL }, // Inst #19031 = VSHUFPDZrmikz |
| 23070 | { 19030, 10, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xeae370062819ULL }, // Inst #19030 = VSHUFPDZrmik |
| 23071 | { 19029, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8e370062819ULL }, // Inst #19029 = VSHUFPDZrmi |
| 23072 | { 19028, 9, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0x9ee370062819ULL }, // Inst #19028 = VSHUFPDZrmbikz |
| 23073 | { 19027, 10, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0x9ae370062819ULL }, // Inst #19027 = VSHUFPDZrmbik |
| 23074 | { 19026, 8, 1, 0, 583, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x98e370062819ULL }, // Inst #19026 = VSHUFPDZrmbi |
| 23075 | { 19025, 5, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 2154, 0, 0xc7e370062829ULL }, // Inst #19025 = VSHUFPDZ256rrikz |
| 23076 | { 19024, 6, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 2148, 0, 0xc3e370062829ULL }, // Inst #19024 = VSHUFPDZ256rrik |
| 23077 | { 19023, 4, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1e370062829ULL }, // Inst #19023 = VSHUFPDZ256rri |
| 23078 | { 19022, 9, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0xc7e370062819ULL }, // Inst #19022 = VSHUFPDZ256rmikz |
| 23079 | { 19021, 10, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0xc3e370062819ULL }, // Inst #19021 = VSHUFPDZ256rmik |
| 23080 | { 19020, 8, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1e370062819ULL }, // Inst #19020 = VSHUFPDZ256rmi |
| 23081 | { 19019, 9, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0x97e370062819ULL }, // Inst #19019 = VSHUFPDZ256rmbikz |
| 23082 | { 19018, 10, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0x93e370062819ULL }, // Inst #19018 = VSHUFPDZ256rmbik |
| 23083 | { 19017, 8, 1, 0, 2259, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x91e370062819ULL }, // Inst #19017 = VSHUFPDZ256rmbi |
| 23084 | { 19016, 5, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 2124, 0, 0xa6e370062829ULL }, // Inst #19016 = VSHUFPDZ128rrikz |
| 23085 | { 19015, 6, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 2118, 0, 0xa2e370062829ULL }, // Inst #19015 = VSHUFPDZ128rrik |
| 23086 | { 19014, 4, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0e370062829ULL }, // Inst #19014 = VSHUFPDZ128rri |
| 23087 | { 19013, 9, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 2109, 0|(1ULL<<MCID::MayLoad), 0xa6e370062819ULL }, // Inst #19013 = VSHUFPDZ128rmikz |
| 23088 | { 19012, 10, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad), 0xa2e370062819ULL }, // Inst #19012 = VSHUFPDZ128rmik |
| 23089 | { 19011, 8, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0e370062819ULL }, // Inst #19011 = VSHUFPDZ128rmi |
| 23090 | { 19010, 9, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 2109, 0|(1ULL<<MCID::MayLoad), 0x96e370062819ULL }, // Inst #19010 = VSHUFPDZ128rmbikz |
| 23091 | { 19009, 10, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad), 0x92e370062819ULL }, // Inst #19009 = VSHUFPDZ128rmbik |
| 23092 | { 19008, 8, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x90e370062819ULL }, // Inst #19008 = VSHUFPDZ128rmbi |
| 23093 | { 19007, 4, 1, 0, 1477, 0, 0, X86ImpOpBase + 0, 901, 0, 0x1e330042829ULL }, // Inst #19007 = VSHUFPDYrri |
| 23094 | { 19006, 8, 1, 0, 1641, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x1e330042819ULL }, // Inst #19006 = VSHUFPDYrmi |
| 23095 | { 19005, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2184, 0, 0xeea1f8066829ULL }, // Inst #19005 = VSHUFI64X2Zrrikz |
| 23096 | { 19004, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2178, 0, 0xeaa1f8066829ULL }, // Inst #19004 = VSHUFI64X2Zrrik |
| 23097 | { 19003, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8a1f8066829ULL }, // Inst #19003 = VSHUFI64X2Zrri |
| 23098 | { 19002, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0xeea1f8066819ULL }, // Inst #19002 = VSHUFI64X2Zrmikz |
| 23099 | { 19001, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xeaa1f8066819ULL }, // Inst #19001 = VSHUFI64X2Zrmik |
| 23100 | { 19000, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8a1f8066819ULL }, // Inst #19000 = VSHUFI64X2Zrmi |
| 23101 | { 18999, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0x9ea1f8066819ULL }, // Inst #18999 = VSHUFI64X2Zrmbikz |
| 23102 | { 18998, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0x9aa1f8066819ULL }, // Inst #18998 = VSHUFI64X2Zrmbik |
| 23103 | { 18997, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x98a1f8066819ULL }, // Inst #18997 = VSHUFI64X2Zrmbi |
| 23104 | { 18996, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2154, 0, 0xc7a1f8066829ULL }, // Inst #18996 = VSHUFI64X2Z256rrikz |
| 23105 | { 18995, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2148, 0, 0xc3a1f8066829ULL }, // Inst #18995 = VSHUFI64X2Z256rrik |
| 23106 | { 18994, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1a1f8066829ULL }, // Inst #18994 = VSHUFI64X2Z256rri |
| 23107 | { 18993, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0xc7a1f8066819ULL }, // Inst #18993 = VSHUFI64X2Z256rmikz |
| 23108 | { 18992, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0xc3a1f8066819ULL }, // Inst #18992 = VSHUFI64X2Z256rmik |
| 23109 | { 18991, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1a1f8066819ULL }, // Inst #18991 = VSHUFI64X2Z256rmi |
| 23110 | { 18990, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0x97a1f8066819ULL }, // Inst #18990 = VSHUFI64X2Z256rmbikz |
| 23111 | { 18989, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0x93a1f8066819ULL }, // Inst #18989 = VSHUFI64X2Z256rmbik |
| 23112 | { 18988, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x91a1f8066819ULL }, // Inst #18988 = VSHUFI64X2Z256rmbi |
| 23113 | { 18987, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2094, 0, 0xeea1f8046829ULL }, // Inst #18987 = VSHUFI32X4Zrrikz |
| 23114 | { 18986, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2088, 0, 0xeaa1f8046829ULL }, // Inst #18986 = VSHUFI32X4Zrrik |
| 23115 | { 18985, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8a1f8046829ULL }, // Inst #18985 = VSHUFI32X4Zrri |
| 23116 | { 18984, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0xeea1f8046819ULL }, // Inst #18984 = VSHUFI32X4Zrmikz |
| 23117 | { 18983, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xeaa1f8046819ULL }, // Inst #18983 = VSHUFI32X4Zrmik |
| 23118 | { 18982, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8a1f8046819ULL }, // Inst #18982 = VSHUFI32X4Zrmi |
| 23119 | { 18981, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0x7ea1f8046819ULL }, // Inst #18981 = VSHUFI32X4Zrmbikz |
| 23120 | { 18980, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0x7aa1f8046819ULL }, // Inst #18980 = VSHUFI32X4Zrmbik |
| 23121 | { 18979, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x78a1f8046819ULL }, // Inst #18979 = VSHUFI32X4Zrmbi |
| 23122 | { 18978, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2056, 0, 0xc7a1f8046829ULL }, // Inst #18978 = VSHUFI32X4Z256rrikz |
| 23123 | { 18977, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2050, 0, 0xc3a1f8046829ULL }, // Inst #18977 = VSHUFI32X4Z256rrik |
| 23124 | { 18976, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1a1f8046829ULL }, // Inst #18976 = VSHUFI32X4Z256rri |
| 23125 | { 18975, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0xc7a1f8046819ULL }, // Inst #18975 = VSHUFI32X4Z256rmikz |
| 23126 | { 18974, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0xc3a1f8046819ULL }, // Inst #18974 = VSHUFI32X4Z256rmik |
| 23127 | { 18973, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1a1f8046819ULL }, // Inst #18973 = VSHUFI32X4Z256rmi |
| 23128 | { 18972, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0x77a1f8046819ULL }, // Inst #18972 = VSHUFI32X4Z256rmbikz |
| 23129 | { 18971, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0x73a1f8046819ULL }, // Inst #18971 = VSHUFI32X4Z256rmbik |
| 23130 | { 18970, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x71a1f8046819ULL }, // Inst #18970 = VSHUFI32X4Z256rmbi |
| 23131 | { 18969, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2184, 0, 0xee91f0066829ULL }, // Inst #18969 = VSHUFF64X2Zrrikz |
| 23132 | { 18968, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2178, 0, 0xea91f0066829ULL }, // Inst #18968 = VSHUFF64X2Zrrik |
| 23133 | { 18967, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe891f0066829ULL }, // Inst #18967 = VSHUFF64X2Zrri |
| 23134 | { 18966, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0xee91f0066819ULL }, // Inst #18966 = VSHUFF64X2Zrmikz |
| 23135 | { 18965, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xea91f0066819ULL }, // Inst #18965 = VSHUFF64X2Zrmik |
| 23136 | { 18964, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe891f0066819ULL }, // Inst #18964 = VSHUFF64X2Zrmi |
| 23137 | { 18963, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0x9e91f0066819ULL }, // Inst #18963 = VSHUFF64X2Zrmbikz |
| 23138 | { 18962, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0x9a91f0066819ULL }, // Inst #18962 = VSHUFF64X2Zrmbik |
| 23139 | { 18961, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x9891f0066819ULL }, // Inst #18961 = VSHUFF64X2Zrmbi |
| 23140 | { 18960, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2154, 0, 0xc791f0066829ULL }, // Inst #18960 = VSHUFF64X2Z256rrikz |
| 23141 | { 18959, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2148, 0, 0xc391f0066829ULL }, // Inst #18959 = VSHUFF64X2Z256rrik |
| 23142 | { 18958, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc191f0066829ULL }, // Inst #18958 = VSHUFF64X2Z256rri |
| 23143 | { 18957, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0xc791f0066819ULL }, // Inst #18957 = VSHUFF64X2Z256rmikz |
| 23144 | { 18956, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0xc391f0066819ULL }, // Inst #18956 = VSHUFF64X2Z256rmik |
| 23145 | { 18955, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc191f0066819ULL }, // Inst #18955 = VSHUFF64X2Z256rmi |
| 23146 | { 18954, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0x9791f0066819ULL }, // Inst #18954 = VSHUFF64X2Z256rmbikz |
| 23147 | { 18953, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0x9391f0066819ULL }, // Inst #18953 = VSHUFF64X2Z256rmbik |
| 23148 | { 18952, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x9191f0066819ULL }, // Inst #18952 = VSHUFF64X2Z256rmbi |
| 23149 | { 18951, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2094, 0, 0xee91e8046829ULL }, // Inst #18951 = VSHUFF32X4Zrrikz |
| 23150 | { 18950, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2088, 0, 0xea91e8046829ULL }, // Inst #18950 = VSHUFF32X4Zrrik |
| 23151 | { 18949, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe891e8046829ULL }, // Inst #18949 = VSHUFF32X4Zrri |
| 23152 | { 18948, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0xee91e8046819ULL }, // Inst #18948 = VSHUFF32X4Zrmikz |
| 23153 | { 18947, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xea91e8046819ULL }, // Inst #18947 = VSHUFF32X4Zrmik |
| 23154 | { 18946, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe891e8046819ULL }, // Inst #18946 = VSHUFF32X4Zrmi |
| 23155 | { 18945, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0x7e91e8046819ULL }, // Inst #18945 = VSHUFF32X4Zrmbikz |
| 23156 | { 18944, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0x7a91e8046819ULL }, // Inst #18944 = VSHUFF32X4Zrmbik |
| 23157 | { 18943, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x7891e8046819ULL }, // Inst #18943 = VSHUFF32X4Zrmbi |
| 23158 | { 18942, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2056, 0, 0xc791e8046829ULL }, // Inst #18942 = VSHUFF32X4Z256rrikz |
| 23159 | { 18941, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2050, 0, 0xc391e8046829ULL }, // Inst #18941 = VSHUFF32X4Z256rrik |
| 23160 | { 18940, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc191e8046829ULL }, // Inst #18940 = VSHUFF32X4Z256rri |
| 23161 | { 18939, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0xc791e8046819ULL }, // Inst #18939 = VSHUFF32X4Z256rmikz |
| 23162 | { 18938, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0xc391e8046819ULL }, // Inst #18938 = VSHUFF32X4Z256rmik |
| 23163 | { 18937, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc191e8046819ULL }, // Inst #18937 = VSHUFF32X4Z256rmi |
| 23164 | { 18936, 9, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0x7791e8046819ULL }, // Inst #18936 = VSHUFF32X4Z256rmbikz |
| 23165 | { 18935, 10, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0x7391e8046819ULL }, // Inst #18935 = VSHUFF32X4Z256rmbik |
| 23166 | { 18934, 8, 1, 0, 459, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x7191e8046819ULL }, // Inst #18934 = VSHUFF32X4Z256rmbi |
| 23167 | { 18933, 4, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 5707, 0, 0x1e5a0005829ULL }, // Inst #18933 = VSHA512RNDS2rr |
| 23168 | { 18932, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 5704, 0, 0x166a0005829ULL }, // Inst #18932 = VSHA512MSG2rr |
| 23169 | { 18931, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 5701, 0, 0x16620005829ULL }, // Inst #18931 = VSHA512MSG1rr |
| 23170 | { 18930, 8, 1, 0, 1308, 0, 0, X86ImpOpBase + 0, 5590, 0|(1ULL<<MCID::MayStore), 0x6a51e8004818ULL }, // Inst #18930 = VSCATTERQPSZmr |
| 23171 | { 18929, 8, 1, 0, 2329, 0, 0, X86ImpOpBase + 0, 5582, 0|(1ULL<<MCID::MayStore), 0x6351e8004818ULL }, // Inst #18929 = VSCATTERQPSZ256mr |
| 23172 | { 18928, 8, 1, 0, 1327, 0, 0, X86ImpOpBase + 0, 5558, 0|(1ULL<<MCID::MayStore), 0x6251e8004818ULL }, // Inst #18928 = VSCATTERQPSZ128mr |
| 23173 | { 18927, 8, 1, 0, 2330, 0, 0, X86ImpOpBase + 0, 5606, 0|(1ULL<<MCID::MayStore), 0x8a51f0024818ULL }, // Inst #18927 = VSCATTERQPDZmr |
| 23174 | { 18926, 8, 1, 0, 1307, 0, 0, X86ImpOpBase + 0, 5598, 0|(1ULL<<MCID::MayStore), 0x8351f0024818ULL }, // Inst #18926 = VSCATTERQPDZ256mr |
| 23175 | { 18925, 8, 1, 0, 1306, 0, 0, X86ImpOpBase + 0, 5558, 0|(1ULL<<MCID::MayStore), 0x8251f0024818ULL }, // Inst #18925 = VSCATTERQPDZ128mr |
| 23176 | { 18924, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8004826ULL }, // Inst #18924 = VSCATTERPF1QPSm |
| 23177 | { 18923, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8024826ULL }, // Inst #18923 = VSCATTERPF1QPDm |
| 23178 | { 18922, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378004826ULL }, // Inst #18922 = VSCATTERPF1DPSm |
| 23179 | { 18921, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4097, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378024826ULL }, // Inst #18921 = VSCATTERPF1DPDm |
| 23180 | { 18920, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8004825ULL }, // Inst #18920 = VSCATTERPF0QPSm |
| 23181 | { 18919, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8024825ULL }, // Inst #18919 = VSCATTERPF0QPDm |
| 23182 | { 18918, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378004825ULL }, // Inst #18918 = VSCATTERPF0DPSm |
| 23183 | { 18917, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4097, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378024825ULL }, // Inst #18917 = VSCATTERPF0DPDm |
| 23184 | { 18916, 8, 1, 0, 1309, 0, 0, X86ImpOpBase + 0, 5550, 0|(1ULL<<MCID::MayStore), 0x6a5168004818ULL }, // Inst #18916 = VSCATTERDPSZmr |
| 23185 | { 18915, 8, 1, 0, 1329, 0, 0, X86ImpOpBase + 0, 5542, 0|(1ULL<<MCID::MayStore), 0x635168004818ULL }, // Inst #18915 = VSCATTERDPSZ256mr |
| 23186 | { 18914, 8, 1, 0, 1328, 0, 0, X86ImpOpBase + 0, 5534, 0|(1ULL<<MCID::MayStore), 0x625168004818ULL }, // Inst #18914 = VSCATTERDPSZ128mr |
| 23187 | { 18913, 8, 1, 0, 2330, 0, 0, X86ImpOpBase + 0, 5574, 0|(1ULL<<MCID::MayStore), 0x8a5170024818ULL }, // Inst #18913 = VSCATTERDPDZmr |
| 23188 | { 18912, 8, 1, 0, 1307, 0, 0, X86ImpOpBase + 0, 5566, 0|(1ULL<<MCID::MayStore), 0x835170024818ULL }, // Inst #18912 = VSCATTERDPDZ256mr |
| 23189 | { 18911, 8, 1, 0, 1306, 0, 0, X86ImpOpBase + 0, 5558, 0|(1ULL<<MCID::MayStore), 0x825170024818ULL }, // Inst #18911 = VSCATTERDPDZ128mr |
| 23190 | { 18910, 4, 1, 0, 2027, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x6696e8004829ULL }, // Inst #18910 = VSCALEFSSZrrkz |
| 23191 | { 18909, 5, 1, 0, 2027, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x6296e8004829ULL }, // Inst #18909 = VSCALEFSSZrrk |
| 23192 | { 18908, 5, 1, 0, 1077, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x17696e8004829ULL }, // Inst #18908 = VSCALEFSSZrrb_Intkz |
| 23193 | { 18907, 6, 1, 0, 1077, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x17296e8004829ULL }, // Inst #18907 = VSCALEFSSZrrb_Intk |
| 23194 | { 18906, 4, 1, 0, 1077, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x17096e8004829ULL }, // Inst #18906 = VSCALEFSSZrrb_Int |
| 23195 | { 18905, 3, 1, 0, 2027, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x6096e8004829ULL }, // Inst #18905 = VSCALEFSSZrr |
| 23196 | { 18904, 8, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6696e8004819ULL }, // Inst #18904 = VSCALEFSSZrmkz |
| 23197 | { 18903, 9, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6296e8004819ULL }, // Inst #18903 = VSCALEFSSZrmk |
| 23198 | { 18902, 7, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6096e8004819ULL }, // Inst #18902 = VSCALEFSSZrm |
| 23199 | { 18901, 4, 1, 0, 2380, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x4696e8014829ULL }, // Inst #18901 = VSCALEFSHZrrkz |
| 23200 | { 18900, 5, 1, 0, 2380, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x4296e8014829ULL }, // Inst #18900 = VSCALEFSHZrrk |
| 23201 | { 18899, 5, 1, 0, 2380, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x15696e8014829ULL }, // Inst #18899 = VSCALEFSHZrrb_Intkz |
| 23202 | { 18898, 6, 1, 0, 2380, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x15296e8014829ULL }, // Inst #18898 = VSCALEFSHZrrb_Intk |
| 23203 | { 18897, 4, 1, 0, 2182, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x15096e8014829ULL }, // Inst #18897 = VSCALEFSHZrrb_Int |
| 23204 | { 18896, 3, 1, 0, 2182, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x4096e8014829ULL }, // Inst #18896 = VSCALEFSHZrr |
| 23205 | { 18895, 8, 1, 0, 2375, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4696e8014819ULL }, // Inst #18895 = VSCALEFSHZrmkz |
| 23206 | { 18894, 9, 1, 0, 2375, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4296e8014819ULL }, // Inst #18894 = VSCALEFSHZrmk |
| 23207 | { 18893, 7, 1, 0, 2170, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4096e8014819ULL }, // Inst #18893 = VSCALEFSHZrm |
| 23208 | { 18892, 4, 1, 0, 2027, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x8696f0024829ULL }, // Inst #18892 = VSCALEFSDZrrkz |
| 23209 | { 18891, 5, 1, 0, 2027, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x8296f0024829ULL }, // Inst #18891 = VSCALEFSDZrrk |
| 23210 | { 18890, 5, 1, 0, 1077, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x19696f0024829ULL }, // Inst #18890 = VSCALEFSDZrrb_Intkz |
| 23211 | { 18889, 6, 1, 0, 1077, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x19296f0024829ULL }, // Inst #18889 = VSCALEFSDZrrb_Intk |
| 23212 | { 18888, 4, 1, 0, 1077, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x19096f0024829ULL }, // Inst #18888 = VSCALEFSDZrrb_Int |
| 23213 | { 18887, 3, 1, 0, 2027, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x8096f0024829ULL }, // Inst #18887 = VSCALEFSDZrr |
| 23214 | { 18886, 8, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8696f0024819ULL }, // Inst #18886 = VSCALEFSDZrmkz |
| 23215 | { 18885, 9, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8296f0024819ULL }, // Inst #18885 = VSCALEFSDZrmk |
| 23216 | { 18884, 7, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8096f0024819ULL }, // Inst #18884 = VSCALEFSDZrm |
| 23217 | { 18883, 4, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1899, 0|(1ULL<<MCID::MayRaiseFPException), 0xee9668004829ULL }, // Inst #18883 = VSCALEFPSZrrkz |
| 23218 | { 18882, 5, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException), 0xea9668004829ULL }, // Inst #18882 = VSCALEFPSZrrk |
| 23219 | { 18881, 5, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1889, 0, 0x17e9668004829ULL }, // Inst #18881 = VSCALEFPSZrrbkz |
| 23220 | { 18880, 6, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1883, 0, 0x17a9668004829ULL }, // Inst #18880 = VSCALEFPSZrrbk |
| 23221 | { 18879, 4, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x1789668004829ULL }, // Inst #18879 = VSCALEFPSZrrb |
| 23222 | { 18878, 3, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe89668004829ULL }, // Inst #18878 = VSCALEFPSZrr |
| 23223 | { 18877, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee9668004819ULL }, // Inst #18877 = VSCALEFPSZrmkz |
| 23224 | { 18876, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea9668004819ULL }, // Inst #18876 = VSCALEFPSZrmk |
| 23225 | { 18875, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e9668004819ULL }, // Inst #18875 = VSCALEFPSZrmbkz |
| 23226 | { 18874, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a9668004819ULL }, // Inst #18874 = VSCALEFPSZrmbk |
| 23227 | { 18873, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x789668004819ULL }, // Inst #18873 = VSCALEFPSZrmb |
| 23228 | { 18872, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe89668004819ULL }, // Inst #18872 = VSCALEFPSZrm |
| 23229 | { 18871, 4, 1, 0, 342, 1, 0, X86ImpOpBase + 78, 1871, 0|(1ULL<<MCID::MayRaiseFPException), 0xc79668004829ULL }, // Inst #18871 = VSCALEFPSZ256rrkz |
| 23230 | { 18870, 5, 1, 0, 342, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException), 0xc39668004829ULL }, // Inst #18870 = VSCALEFPSZ256rrk |
| 23231 | { 18869, 3, 1, 0, 342, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc19668004829ULL }, // Inst #18869 = VSCALEFPSZ256rr |
| 23232 | { 18868, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc79668004819ULL }, // Inst #18868 = VSCALEFPSZ256rmkz |
| 23233 | { 18867, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc39668004819ULL }, // Inst #18867 = VSCALEFPSZ256rmk |
| 23234 | { 18866, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x779668004819ULL }, // Inst #18866 = VSCALEFPSZ256rmbkz |
| 23235 | { 18865, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x739668004819ULL }, // Inst #18865 = VSCALEFPSZ256rmbk |
| 23236 | { 18864, 7, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x719668004819ULL }, // Inst #18864 = VSCALEFPSZ256rmb |
| 23237 | { 18863, 7, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc19668004819ULL }, // Inst #18863 = VSCALEFPSZ256rm |
| 23238 | { 18862, 4, 1, 0, 30, 1, 0, X86ImpOpBase + 78, 1845, 0|(1ULL<<MCID::MayRaiseFPException), 0xa69668004829ULL }, // Inst #18862 = VSCALEFPSZ128rrkz |
| 23239 | { 18861, 5, 1, 0, 30, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException), 0xa29668004829ULL }, // Inst #18861 = VSCALEFPSZ128rrk |
| 23240 | { 18860, 3, 1, 0, 30, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa09668004829ULL }, // Inst #18860 = VSCALEFPSZ128rr |
| 23241 | { 18859, 8, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa69668004819ULL }, // Inst #18859 = VSCALEFPSZ128rmkz |
| 23242 | { 18858, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa29668004819ULL }, // Inst #18858 = VSCALEFPSZ128rmk |
| 23243 | { 18857, 8, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x769668004819ULL }, // Inst #18857 = VSCALEFPSZ128rmbkz |
| 23244 | { 18856, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x729668004819ULL }, // Inst #18856 = VSCALEFPSZ128rmbk |
| 23245 | { 18855, 7, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x709668004819ULL }, // Inst #18855 = VSCALEFPSZ128rmb |
| 23246 | { 18854, 7, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa09668004819ULL }, // Inst #18854 = VSCALEFPSZ128rm |
| 23247 | { 18853, 4, 1, 0, 2384, 1, 0, X86ImpOpBase + 78, 1819, 0|(1ULL<<MCID::MayRaiseFPException), 0xee9668014829ULL }, // Inst #18853 = VSCALEFPHZrrkz |
| 23248 | { 18852, 5, 1, 0, 2384, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException), 0xea9668014829ULL }, // Inst #18852 = VSCALEFPHZrrk |
| 23249 | { 18851, 5, 1, 0, 2384, 1, 0, X86ImpOpBase + 78, 1809, 0, 0x15e9668014829ULL }, // Inst #18851 = VSCALEFPHZrrbkz |
| 23250 | { 18850, 6, 1, 0, 2384, 1, 0, X86ImpOpBase + 78, 1803, 0, 0x15a9668014829ULL }, // Inst #18850 = VSCALEFPHZrrbk |
| 23251 | { 18849, 4, 1, 0, 2193, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x1589668014829ULL }, // Inst #18849 = VSCALEFPHZrrb |
| 23252 | { 18848, 3, 1, 0, 2193, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe89668014829ULL }, // Inst #18848 = VSCALEFPHZrr |
| 23253 | { 18847, 8, 1, 0, 2382, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee9668014819ULL }, // Inst #18847 = VSCALEFPHZrmkz |
| 23254 | { 18846, 9, 1, 0, 2382, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea9668014819ULL }, // Inst #18846 = VSCALEFPHZrmk |
| 23255 | { 18845, 8, 1, 0, 2382, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e9668014819ULL }, // Inst #18845 = VSCALEFPHZrmbkz |
| 23256 | { 18844, 9, 1, 0, 2382, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a9668014819ULL }, // Inst #18844 = VSCALEFPHZrmbk |
| 23257 | { 18843, 7, 1, 0, 2188, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x589668014819ULL }, // Inst #18843 = VSCALEFPHZrmb |
| 23258 | { 18842, 7, 1, 0, 2188, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe89668014819ULL }, // Inst #18842 = VSCALEFPHZrm |
| 23259 | { 18841, 4, 1, 0, 2379, 1, 0, X86ImpOpBase + 78, 1782, 0|(1ULL<<MCID::MayRaiseFPException), 0xc79668014829ULL }, // Inst #18841 = VSCALEFPHZ256rrkz |
| 23260 | { 18840, 5, 1, 0, 2379, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException), 0xc39668014829ULL }, // Inst #18840 = VSCALEFPHZ256rrk |
| 23261 | { 18839, 3, 1, 0, 2180, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc19668014829ULL }, // Inst #18839 = VSCALEFPHZ256rr |
| 23262 | { 18838, 8, 1, 0, 2374, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc79668014819ULL }, // Inst #18838 = VSCALEFPHZ256rmkz |
| 23263 | { 18837, 9, 1, 0, 2374, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc39668014819ULL }, // Inst #18837 = VSCALEFPHZ256rmk |
| 23264 | { 18836, 8, 1, 0, 2374, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x579668014819ULL }, // Inst #18836 = VSCALEFPHZ256rmbkz |
| 23265 | { 18835, 9, 1, 0, 2374, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x539668014819ULL }, // Inst #18835 = VSCALEFPHZ256rmbk |
| 23266 | { 18834, 7, 1, 0, 2169, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x519668014819ULL }, // Inst #18834 = VSCALEFPHZ256rmb |
| 23267 | { 18833, 7, 1, 0, 2169, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc19668014819ULL }, // Inst #18833 = VSCALEFPHZ256rm |
| 23268 | { 18832, 4, 1, 0, 2378, 1, 0, X86ImpOpBase + 78, 1756, 0|(1ULL<<MCID::MayRaiseFPException), 0xa69668014829ULL }, // Inst #18832 = VSCALEFPHZ128rrkz |
| 23269 | { 18831, 5, 1, 0, 2378, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException), 0xa29668014829ULL }, // Inst #18831 = VSCALEFPHZ128rrk |
| 23270 | { 18830, 3, 1, 0, 2179, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa09668014829ULL }, // Inst #18830 = VSCALEFPHZ128rr |
| 23271 | { 18829, 8, 1, 0, 2372, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa69668014819ULL }, // Inst #18829 = VSCALEFPHZ128rmkz |
| 23272 | { 18828, 9, 1, 0, 2372, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa29668014819ULL }, // Inst #18828 = VSCALEFPHZ128rmk |
| 23273 | { 18827, 8, 1, 0, 2372, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x569668014819ULL }, // Inst #18827 = VSCALEFPHZ128rmbkz |
| 23274 | { 18826, 9, 1, 0, 2372, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x529668014819ULL }, // Inst #18826 = VSCALEFPHZ128rmbk |
| 23275 | { 18825, 7, 1, 0, 2166, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x509668014819ULL }, // Inst #18825 = VSCALEFPHZ128rmb |
| 23276 | { 18824, 7, 1, 0, 2166, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa09668014819ULL }, // Inst #18824 = VSCALEFPHZ128rm |
| 23277 | { 18823, 4, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1720, 0|(1ULL<<MCID::MayRaiseFPException), 0xee9670024829ULL }, // Inst #18823 = VSCALEFPDZrrkz |
| 23278 | { 18822, 5, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException), 0xea9670024829ULL }, // Inst #18822 = VSCALEFPDZrrk |
| 23279 | { 18821, 5, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1710, 0, 0x19e9670024829ULL }, // Inst #18821 = VSCALEFPDZrrbkz |
| 23280 | { 18820, 6, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1704, 0, 0x19a9670024829ULL }, // Inst #18820 = VSCALEFPDZrrbk |
| 23281 | { 18819, 4, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x1989670024829ULL }, // Inst #18819 = VSCALEFPDZrrb |
| 23282 | { 18818, 3, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe89670024829ULL }, // Inst #18818 = VSCALEFPDZrr |
| 23283 | { 18817, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee9670024819ULL }, // Inst #18817 = VSCALEFPDZrmkz |
| 23284 | { 18816, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea9670024819ULL }, // Inst #18816 = VSCALEFPDZrmk |
| 23285 | { 18815, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e9670024819ULL }, // Inst #18815 = VSCALEFPDZrmbkz |
| 23286 | { 18814, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a9670024819ULL }, // Inst #18814 = VSCALEFPDZrmbk |
| 23287 | { 18813, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x989670024819ULL }, // Inst #18813 = VSCALEFPDZrmb |
| 23288 | { 18812, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe89670024819ULL }, // Inst #18812 = VSCALEFPDZrm |
| 23289 | { 18811, 4, 1, 0, 342, 1, 0, X86ImpOpBase + 78, 1669, 0|(1ULL<<MCID::MayRaiseFPException), 0xc79670024829ULL }, // Inst #18811 = VSCALEFPDZ256rrkz |
| 23290 | { 18810, 5, 1, 0, 342, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException), 0xc39670024829ULL }, // Inst #18810 = VSCALEFPDZ256rrk |
| 23291 | { 18809, 3, 1, 0, 342, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc19670024829ULL }, // Inst #18809 = VSCALEFPDZ256rr |
| 23292 | { 18808, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc79670024819ULL }, // Inst #18808 = VSCALEFPDZ256rmkz |
| 23293 | { 18807, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc39670024819ULL }, // Inst #18807 = VSCALEFPDZ256rmk |
| 23294 | { 18806, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x979670024819ULL }, // Inst #18806 = VSCALEFPDZ256rmbkz |
| 23295 | { 18805, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x939670024819ULL }, // Inst #18805 = VSCALEFPDZ256rmbk |
| 23296 | { 18804, 7, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x919670024819ULL }, // Inst #18804 = VSCALEFPDZ256rmb |
| 23297 | { 18803, 7, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc19670024819ULL }, // Inst #18803 = VSCALEFPDZ256rm |
| 23298 | { 18802, 4, 1, 0, 30, 1, 0, X86ImpOpBase + 78, 1633, 0|(1ULL<<MCID::MayRaiseFPException), 0xa69670024829ULL }, // Inst #18802 = VSCALEFPDZ128rrkz |
| 23299 | { 18801, 5, 1, 0, 30, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException), 0xa29670024829ULL }, // Inst #18801 = VSCALEFPDZ128rrk |
| 23300 | { 18800, 3, 1, 0, 30, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa09670024829ULL }, // Inst #18800 = VSCALEFPDZ128rr |
| 23301 | { 18799, 8, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa69670024819ULL }, // Inst #18799 = VSCALEFPDZ128rmkz |
| 23302 | { 18798, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa29670024819ULL }, // Inst #18798 = VSCALEFPDZ128rmk |
| 23303 | { 18797, 8, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x969670024819ULL }, // Inst #18797 = VSCALEFPDZ128rmbkz |
| 23304 | { 18796, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x929670024819ULL }, // Inst #18796 = VSCALEFPDZ128rmbk |
| 23305 | { 18795, 7, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x909670024819ULL }, // Inst #18795 = VSCALEFPDZ128rmb |
| 23306 | { 18794, 7, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa09670024819ULL }, // Inst #18794 = VSCALEFPDZ128rm |
| 23307 | { 18793, 3, 1, 0, 309, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xa928003029ULL }, // Inst #18793 = VRSQRTSSr_Int |
| 23308 | { 18792, 3, 1, 0, 309, 0, 0, X86ImpOpBase + 0, 1982, 0, 0xa928003029ULL }, // Inst #18792 = VRSQRTSSr |
| 23309 | { 18791, 7, 1, 0, 308, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xa928003019ULL }, // Inst #18791 = VRSQRTSSm_Int |
| 23310 | { 18790, 7, 1, 0, 308, 0, 0, X86ImpOpBase + 0, 1975, 0|(1ULL<<MCID::MayLoad), 0xa928003019ULL }, // Inst #18790 = VRSQRTSSm |
| 23311 | { 18789, 4, 1, 0, 309, 0, 0, X86ImpOpBase + 0, 1926, 0, 0x46a7e8014829ULL }, // Inst #18789 = VRSQRTSHZrrkz |
| 23312 | { 18788, 5, 1, 0, 309, 0, 0, X86ImpOpBase + 0, 1921, 0, 0x42a7e8014829ULL }, // Inst #18788 = VRSQRTSHZrrk |
| 23313 | { 18787, 3, 1, 0, 309, 0, 0, X86ImpOpBase + 0, 1625, 0, 0x40a7e8014829ULL }, // Inst #18787 = VRSQRTSHZrr |
| 23314 | { 18786, 8, 1, 0, 308, 0, 0, X86ImpOpBase + 0, 1910, 0|(1ULL<<MCID::MayLoad), 0x46a7e8014819ULL }, // Inst #18786 = VRSQRTSHZrmkz |
| 23315 | { 18785, 9, 1, 0, 308, 0, 0, X86ImpOpBase + 0, 1564, 0|(1ULL<<MCID::MayLoad), 0x42a7e8014819ULL }, // Inst #18785 = VRSQRTSHZrmk |
| 23316 | { 18784, 7, 1, 0, 308, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x40a7e8014819ULL }, // Inst #18784 = VRSQRTSHZrm |
| 23317 | { 18783, 2, 1, 0, 306, 0, 0, X86ImpOpBase + 0, 535, 0, 0x2928002029ULL }, // Inst #18783 = VRSQRTPSr |
| 23318 | { 18782, 6, 1, 0, 305, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x2928002019ULL }, // Inst #18782 = VRSQRTPSm |
| 23319 | { 18781, 2, 1, 0, 578, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x12928002029ULL }, // Inst #18781 = VRSQRTPSYr |
| 23320 | { 18780, 6, 1, 0, 581, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x12928002019ULL }, // Inst #18780 = VRSQRTPSYm |
| 23321 | { 18779, 3, 1, 0, 580, 0, 0, X86ImpOpBase + 0, 3008, 0, 0xee2768014829ULL }, // Inst #18779 = VRSQRTPHZrkz |
| 23322 | { 18778, 4, 1, 0, 580, 0, 0, X86ImpOpBase + 0, 3004, 0, 0xea2768014829ULL }, // Inst #18778 = VRSQRTPHZrk |
| 23323 | { 18777, 2, 1, 0, 2387, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe82768014829ULL }, // Inst #18777 = VRSQRTPHZr |
| 23324 | { 18776, 7, 1, 0, 2355, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0xee2768014819ULL }, // Inst #18776 = VRSQRTPHZmkz |
| 23325 | { 18775, 8, 1, 0, 2355, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad), 0xea2768014819ULL }, // Inst #18775 = VRSQRTPHZmk |
| 23326 | { 18774, 7, 1, 0, 2355, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0x5e2768014819ULL }, // Inst #18774 = VRSQRTPHZmbkz |
| 23327 | { 18773, 8, 1, 0, 2355, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad), 0x5a2768014819ULL }, // Inst #18773 = VRSQRTPHZmbk |
| 23328 | { 18772, 6, 1, 0, 579, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x582768014819ULL }, // Inst #18772 = VRSQRTPHZmb |
| 23329 | { 18771, 6, 1, 0, 579, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82768014819ULL }, // Inst #18771 = VRSQRTPHZm |
| 23330 | { 18770, 3, 1, 0, 578, 0, 0, X86ImpOpBase + 0, 2977, 0, 0xc72768014829ULL }, // Inst #18770 = VRSQRTPHZ256rkz |
| 23331 | { 18769, 4, 1, 0, 578, 0, 0, X86ImpOpBase + 0, 2973, 0, 0xc32768014829ULL }, // Inst #18769 = VRSQRTPHZ256rk |
| 23332 | { 18768, 2, 1, 0, 578, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc12768014829ULL }, // Inst #18768 = VRSQRTPHZ256r |
| 23333 | { 18767, 7, 1, 0, 577, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0xc72768014819ULL }, // Inst #18767 = VRSQRTPHZ256mkz |
| 23334 | { 18766, 8, 1, 0, 577, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0xc32768014819ULL }, // Inst #18766 = VRSQRTPHZ256mk |
| 23335 | { 18765, 7, 1, 0, 577, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0x572768014819ULL }, // Inst #18765 = VRSQRTPHZ256mbkz |
| 23336 | { 18764, 8, 1, 0, 577, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0x532768014819ULL }, // Inst #18764 = VRSQRTPHZ256mbk |
| 23337 | { 18763, 6, 1, 0, 577, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x512768014819ULL }, // Inst #18763 = VRSQRTPHZ256mb |
| 23338 | { 18762, 6, 1, 0, 577, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc12768014819ULL }, // Inst #18762 = VRSQRTPHZ256m |
| 23339 | { 18761, 3, 1, 0, 306, 0, 0, X86ImpOpBase + 0, 2970, 0, 0xa62768014829ULL }, // Inst #18761 = VRSQRTPHZ128rkz |
| 23340 | { 18760, 4, 1, 0, 306, 0, 0, X86ImpOpBase + 0, 2966, 0, 0xa22768014829ULL }, // Inst #18760 = VRSQRTPHZ128rk |
| 23341 | { 18759, 2, 1, 0, 306, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02768014829ULL }, // Inst #18759 = VRSQRTPHZ128r |
| 23342 | { 18758, 7, 1, 0, 576, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0xa62768014819ULL }, // Inst #18758 = VRSQRTPHZ128mkz |
| 23343 | { 18757, 8, 1, 0, 576, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0xa22768014819ULL }, // Inst #18757 = VRSQRTPHZ128mk |
| 23344 | { 18756, 7, 1, 0, 576, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0x562768014819ULL }, // Inst #18756 = VRSQRTPHZ128mbkz |
| 23345 | { 18755, 8, 1, 0, 576, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0x522768014819ULL }, // Inst #18755 = VRSQRTPHZ128mbk |
| 23346 | { 18754, 6, 1, 0, 576, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x502768014819ULL }, // Inst #18754 = VRSQRTPHZ128mb |
| 23347 | { 18753, 6, 1, 0, 576, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa02768014819ULL }, // Inst #18753 = VRSQRTPHZ128m |
| 23348 | { 18752, 4, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66e6e8004829ULL }, // Inst #18752 = VRSQRT28SSZrkz |
| 23349 | { 18751, 5, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62e6e8004829ULL }, // Inst #18751 = VRSQRT28SSZrk |
| 23350 | { 18750, 4, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x76e6e8004829ULL }, // Inst #18750 = VRSQRT28SSZrbkz |
| 23351 | { 18749, 5, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x72e6e8004829ULL }, // Inst #18749 = VRSQRT28SSZrbk |
| 23352 | { 18748, 3, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x70e6e8004829ULL }, // Inst #18748 = VRSQRT28SSZrb |
| 23353 | { 18747, 3, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60e6e8004829ULL }, // Inst #18747 = VRSQRT28SSZr |
| 23354 | { 18746, 8, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66e6e8004819ULL }, // Inst #18746 = VRSQRT28SSZmkz |
| 23355 | { 18745, 9, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62e6e8004819ULL }, // Inst #18745 = VRSQRT28SSZmk |
| 23356 | { 18744, 7, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60e6e8004819ULL }, // Inst #18744 = VRSQRT28SSZm |
| 23357 | { 18743, 4, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86e6f0024829ULL }, // Inst #18743 = VRSQRT28SDZrkz |
| 23358 | { 18742, 5, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82e6f0024829ULL }, // Inst #18742 = VRSQRT28SDZrk |
| 23359 | { 18741, 4, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x96e6f0024829ULL }, // Inst #18741 = VRSQRT28SDZrbkz |
| 23360 | { 18740, 5, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x92e6f0024829ULL }, // Inst #18740 = VRSQRT28SDZrbk |
| 23361 | { 18739, 3, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x90e6f0024829ULL }, // Inst #18739 = VRSQRT28SDZrb |
| 23362 | { 18738, 3, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80e6f0024829ULL }, // Inst #18738 = VRSQRT28SDZr |
| 23363 | { 18737, 8, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86e6f0024819ULL }, // Inst #18737 = VRSQRT28SDZmkz |
| 23364 | { 18736, 9, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82e6f0024819ULL }, // Inst #18736 = VRSQRT28SDZmk |
| 23365 | { 18735, 7, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80e6f0024819ULL }, // Inst #18735 = VRSQRT28SDZm |
| 23366 | { 18734, 3, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6668004829ULL }, // Inst #18734 = VRSQRT28PSZrkz |
| 23367 | { 18733, 4, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6668004829ULL }, // Inst #18733 = VRSQRT28PSZrk |
| 23368 | { 18732, 3, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2779, 0, 0x7e6668004829ULL }, // Inst #18732 = VRSQRT28PSZrbkz |
| 23369 | { 18731, 4, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2775, 0, 0x7a6668004829ULL }, // Inst #18731 = VRSQRT28PSZrbk |
| 23370 | { 18730, 2, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x786668004829ULL }, // Inst #18730 = VRSQRT28PSZrb |
| 23371 | { 18729, 2, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86668004829ULL }, // Inst #18729 = VRSQRT28PSZr |
| 23372 | { 18728, 7, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6668004819ULL }, // Inst #18728 = VRSQRT28PSZmkz |
| 23373 | { 18727, 8, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6668004819ULL }, // Inst #18727 = VRSQRT28PSZmk |
| 23374 | { 18726, 7, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e6668004819ULL }, // Inst #18726 = VRSQRT28PSZmbkz |
| 23375 | { 18725, 8, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a6668004819ULL }, // Inst #18725 = VRSQRT28PSZmbk |
| 23376 | { 18724, 6, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x786668004819ULL }, // Inst #18724 = VRSQRT28PSZmb |
| 23377 | { 18723, 6, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86668004819ULL }, // Inst #18723 = VRSQRT28PSZm |
| 23378 | { 18722, 3, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6670024829ULL }, // Inst #18722 = VRSQRT28PDZrkz |
| 23379 | { 18721, 4, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6670024829ULL }, // Inst #18721 = VRSQRT28PDZrk |
| 23380 | { 18720, 3, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2744, 0, 0x9e6670024829ULL }, // Inst #18720 = VRSQRT28PDZrbkz |
| 23381 | { 18719, 4, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2740, 0, 0x9a6670024829ULL }, // Inst #18719 = VRSQRT28PDZrbk |
| 23382 | { 18718, 2, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x986670024829ULL }, // Inst #18718 = VRSQRT28PDZrb |
| 23383 | { 18717, 2, 1, 0, 580, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86670024829ULL }, // Inst #18717 = VRSQRT28PDZr |
| 23384 | { 18716, 7, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6670024819ULL }, // Inst #18716 = VRSQRT28PDZmkz |
| 23385 | { 18715, 8, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6670024819ULL }, // Inst #18715 = VRSQRT28PDZmk |
| 23386 | { 18714, 7, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e6670024819ULL }, // Inst #18714 = VRSQRT28PDZmbkz |
| 23387 | { 18713, 8, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a6670024819ULL }, // Inst #18713 = VRSQRT28PDZmbk |
| 23388 | { 18712, 6, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x986670024819ULL }, // Inst #18712 = VRSQRT28PDZmb |
| 23389 | { 18711, 6, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86670024819ULL }, // Inst #18711 = VRSQRT28PDZm |
| 23390 | { 18710, 4, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x66a7e8004829ULL }, // Inst #18710 = VRSQRT14SSZrrkz |
| 23391 | { 18709, 5, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x62a7e8004829ULL }, // Inst #18709 = VRSQRT14SSZrrk |
| 23392 | { 18708, 3, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x60a7e8004829ULL }, // Inst #18708 = VRSQRT14SSZrr |
| 23393 | { 18707, 8, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad), 0x66a7e8004819ULL }, // Inst #18707 = VRSQRT14SSZrmkz |
| 23394 | { 18706, 9, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad), 0x62a7e8004819ULL }, // Inst #18706 = VRSQRT14SSZrmk |
| 23395 | { 18705, 7, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad), 0x60a7e8004819ULL }, // Inst #18705 = VRSQRT14SSZrm |
| 23396 | { 18704, 4, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x86a7f0024829ULL }, // Inst #18704 = VRSQRT14SDZrrkz |
| 23397 | { 18703, 5, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x82a7f0024829ULL }, // Inst #18703 = VRSQRT14SDZrrk |
| 23398 | { 18702, 3, 1, 0, 309, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x80a7f0024829ULL }, // Inst #18702 = VRSQRT14SDZrr |
| 23399 | { 18701, 8, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad), 0x86a7f0024819ULL }, // Inst #18701 = VRSQRT14SDZrmkz |
| 23400 | { 18700, 9, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad), 0x82a7f0024819ULL }, // Inst #18700 = VRSQRT14SDZrmk |
| 23401 | { 18699, 7, 1, 0, 308, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad), 0x80a7f0024819ULL }, // Inst #18699 = VRSQRT14SDZrm |
| 23402 | { 18698, 3, 1, 0, 1139, 1, 0, X86ImpOpBase + 78, 2779, 0, 0xee2768004829ULL }, // Inst #18698 = VRSQRT14PSZrkz |
| 23403 | { 18697, 4, 1, 0, 2386, 1, 0, X86ImpOpBase + 78, 2775, 0, 0xea2768004829ULL }, // Inst #18697 = VRSQRT14PSZrk |
| 23404 | { 18696, 2, 1, 0, 2385, 1, 0, X86ImpOpBase + 78, 2738, 0, 0xe82768004829ULL }, // Inst #18696 = VRSQRT14PSZr |
| 23405 | { 18695, 7, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad), 0xee2768004819ULL }, // Inst #18695 = VRSQRT14PSZmkz |
| 23406 | { 18694, 8, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad), 0xea2768004819ULL }, // Inst #18694 = VRSQRT14PSZmk |
| 23407 | { 18693, 7, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad), 0x7e2768004819ULL }, // Inst #18693 = VRSQRT14PSZmbkz |
| 23408 | { 18692, 8, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad), 0x7a2768004819ULL }, // Inst #18692 = VRSQRT14PSZmbk |
| 23409 | { 18691, 6, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad), 0x782768004819ULL }, // Inst #18691 = VRSQRT14PSZmb |
| 23410 | { 18690, 6, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82768004819ULL }, // Inst #18690 = VRSQRT14PSZm |
| 23411 | { 18689, 3, 1, 0, 1138, 1, 0, X86ImpOpBase + 78, 2765, 0, 0xc72768004829ULL }, // Inst #18689 = VRSQRT14PSZ256rkz |
| 23412 | { 18688, 4, 1, 0, 1138, 1, 0, X86ImpOpBase + 78, 2761, 0, 0xc32768004829ULL }, // Inst #18688 = VRSQRT14PSZ256rk |
| 23413 | { 18687, 2, 1, 0, 1138, 1, 0, X86ImpOpBase + 78, 2716, 0, 0xc12768004829ULL }, // Inst #18687 = VRSQRT14PSZ256r |
| 23414 | { 18686, 7, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad), 0xc72768004819ULL }, // Inst #18686 = VRSQRT14PSZ256mkz |
| 23415 | { 18685, 8, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad), 0xc32768004819ULL }, // Inst #18685 = VRSQRT14PSZ256mk |
| 23416 | { 18684, 7, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad), 0x772768004819ULL }, // Inst #18684 = VRSQRT14PSZ256mbkz |
| 23417 | { 18683, 8, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad), 0x732768004819ULL }, // Inst #18683 = VRSQRT14PSZ256mbk |
| 23418 | { 18682, 6, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad), 0x712768004819ULL }, // Inst #18682 = VRSQRT14PSZ256mb |
| 23419 | { 18681, 6, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad), 0xc12768004819ULL }, // Inst #18681 = VRSQRT14PSZ256m |
| 23420 | { 18680, 3, 1, 0, 1137, 1, 0, X86ImpOpBase + 78, 2340, 0, 0xa62768004829ULL }, // Inst #18680 = VRSQRT14PSZ128rkz |
| 23421 | { 18679, 4, 1, 0, 1137, 1, 0, X86ImpOpBase + 78, 2336, 0, 0xa22768004829ULL }, // Inst #18679 = VRSQRT14PSZ128rk |
| 23422 | { 18678, 2, 1, 0, 1137, 1, 0, X86ImpOpBase + 78, 2334, 0, 0xa02768004829ULL }, // Inst #18678 = VRSQRT14PSZ128r |
| 23423 | { 18677, 7, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad), 0xa62768004819ULL }, // Inst #18677 = VRSQRT14PSZ128mkz |
| 23424 | { 18676, 8, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad), 0xa22768004819ULL }, // Inst #18676 = VRSQRT14PSZ128mk |
| 23425 | { 18675, 7, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad), 0x762768004819ULL }, // Inst #18675 = VRSQRT14PSZ128mbkz |
| 23426 | { 18674, 8, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad), 0x722768004819ULL }, // Inst #18674 = VRSQRT14PSZ128mbk |
| 23427 | { 18673, 6, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad), 0x702768004819ULL }, // Inst #18673 = VRSQRT14PSZ128mb |
| 23428 | { 18672, 6, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad), 0xa02768004819ULL }, // Inst #18672 = VRSQRT14PSZ128m |
| 23429 | { 18671, 3, 1, 0, 1139, 1, 0, X86ImpOpBase + 78, 2744, 0, 0xee2770024829ULL }, // Inst #18671 = VRSQRT14PDZrkz |
| 23430 | { 18670, 4, 1, 0, 1139, 1, 0, X86ImpOpBase + 78, 2740, 0, 0xea2770024829ULL }, // Inst #18670 = VRSQRT14PDZrk |
| 23431 | { 18669, 2, 1, 0, 2385, 1, 0, X86ImpOpBase + 78, 2738, 0, 0xe82770024829ULL }, // Inst #18669 = VRSQRT14PDZr |
| 23432 | { 18668, 7, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad), 0xee2770024819ULL }, // Inst #18668 = VRSQRT14PDZmkz |
| 23433 | { 18667, 8, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad), 0xea2770024819ULL }, // Inst #18667 = VRSQRT14PDZmk |
| 23434 | { 18666, 7, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad), 0x9e2770024819ULL }, // Inst #18666 = VRSQRT14PDZmbkz |
| 23435 | { 18665, 8, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad), 0x9a2770024819ULL }, // Inst #18665 = VRSQRT14PDZmbk |
| 23436 | { 18664, 6, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad), 0x982770024819ULL }, // Inst #18664 = VRSQRT14PDZmb |
| 23437 | { 18663, 6, 1, 0, 579, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82770024819ULL }, // Inst #18663 = VRSQRT14PDZm |
| 23438 | { 18662, 3, 1, 0, 1138, 1, 0, X86ImpOpBase + 78, 2722, 0, 0xc72770024829ULL }, // Inst #18662 = VRSQRT14PDZ256rkz |
| 23439 | { 18661, 4, 1, 0, 1138, 1, 0, X86ImpOpBase + 78, 2718, 0, 0xc32770024829ULL }, // Inst #18661 = VRSQRT14PDZ256rk |
| 23440 | { 18660, 2, 1, 0, 1138, 1, 0, X86ImpOpBase + 78, 2716, 0, 0xc12770024829ULL }, // Inst #18660 = VRSQRT14PDZ256r |
| 23441 | { 18659, 7, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad), 0xc72770024819ULL }, // Inst #18659 = VRSQRT14PDZ256mkz |
| 23442 | { 18658, 8, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad), 0xc32770024819ULL }, // Inst #18658 = VRSQRT14PDZ256mk |
| 23443 | { 18657, 7, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad), 0x972770024819ULL }, // Inst #18657 = VRSQRT14PDZ256mbkz |
| 23444 | { 18656, 8, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad), 0x932770024819ULL }, // Inst #18656 = VRSQRT14PDZ256mbk |
| 23445 | { 18655, 6, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad), 0x912770024819ULL }, // Inst #18655 = VRSQRT14PDZ256mb |
| 23446 | { 18654, 6, 1, 0, 577, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad), 0xc12770024819ULL }, // Inst #18654 = VRSQRT14PDZ256m |
| 23447 | { 18653, 3, 1, 0, 1137, 1, 0, X86ImpOpBase + 78, 2706, 0, 0xa62770024829ULL }, // Inst #18653 = VRSQRT14PDZ128rkz |
| 23448 | { 18652, 4, 1, 0, 1137, 1, 0, X86ImpOpBase + 78, 2702, 0, 0xa22770024829ULL }, // Inst #18652 = VRSQRT14PDZ128rk |
| 23449 | { 18651, 2, 1, 0, 1137, 1, 0, X86ImpOpBase + 78, 2334, 0, 0xa02770024829ULL }, // Inst #18651 = VRSQRT14PDZ128r |
| 23450 | { 18650, 7, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad), 0xa62770024819ULL }, // Inst #18650 = VRSQRT14PDZ128mkz |
| 23451 | { 18649, 8, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad), 0xa22770024819ULL }, // Inst #18649 = VRSQRT14PDZ128mk |
| 23452 | { 18648, 7, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad), 0x962770024819ULL }, // Inst #18648 = VRSQRT14PDZ128mbkz |
| 23453 | { 18647, 8, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad), 0x922770024819ULL }, // Inst #18647 = VRSQRT14PDZ128mbk |
| 23454 | { 18646, 6, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad), 0x902770024819ULL }, // Inst #18646 = VRSQRT14PDZ128mb |
| 23455 | { 18645, 6, 1, 0, 576, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad), 0xa02770024819ULL }, // Inst #18645 = VRSQRT14PDZ128m |
| 23456 | { 18644, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 893, 0|(1ULL<<MCID::MayRaiseFPException), 0x8528046829ULL }, // Inst #18644 = VROUNDSSri_Int |
| 23457 | { 18643, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 825, 0|(1ULL<<MCID::MayRaiseFPException), 0x8528046829ULL }, // Inst #18643 = VROUNDSSri |
| 23458 | { 18642, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 2203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8528046819ULL }, // Inst #18642 = VROUNDSSmi_Int |
| 23459 | { 18641, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 2663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8528046819ULL }, // Inst #18641 = VROUNDSSmi |
| 23460 | { 18640, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 893, 0|(1ULL<<MCID::MayRaiseFPException), 0x85b0046829ULL }, // Inst #18640 = VROUNDSDri_Int |
| 23461 | { 18639, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 833, 0|(1ULL<<MCID::MayRaiseFPException), 0x85b0046829ULL }, // Inst #18639 = VROUNDSDri |
| 23462 | { 18638, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 2203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x85b0046819ULL }, // Inst #18638 = VROUNDSDmi_Int |
| 23463 | { 18637, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 2631, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x85b0046819ULL }, // Inst #18637 = VROUNDSDmi |
| 23464 | { 18636, 3, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 544, 0|(1ULL<<MCID::MayRaiseFPException), 0x428046829ULL }, // Inst #18636 = VROUNDPSri |
| 23465 | { 18635, 7, 1, 0, 1836, 1, 0, X86ImpOpBase + 78, 537, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x428046819ULL }, // Inst #18635 = VROUNDPSmi |
| 23466 | { 18634, 3, 1, 0, 1839, 1, 0, X86ImpOpBase + 78, 5441, 0|(1ULL<<MCID::MayRaiseFPException), 0x10428046829ULL }, // Inst #18634 = VROUNDPSYri |
| 23467 | { 18633, 7, 1, 0, 2163, 1, 0, X86ImpOpBase + 78, 5434, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x10428046819ULL }, // Inst #18633 = VROUNDPSYmi |
| 23468 | { 18632, 3, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 544, 0|(1ULL<<MCID::MayRaiseFPException), 0x4b0046829ULL }, // Inst #18632 = VROUNDPDri |
| 23469 | { 18631, 7, 1, 0, 1836, 1, 0, X86ImpOpBase + 78, 537, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4b0046819ULL }, // Inst #18631 = VROUNDPDmi |
| 23470 | { 18630, 3, 1, 0, 1839, 1, 0, X86ImpOpBase + 78, 5441, 0|(1ULL<<MCID::MayRaiseFPException), 0x104b0046829ULL }, // Inst #18630 = VROUNDPDYri |
| 23471 | { 18629, 7, 1, 0, 2163, 1, 0, X86ImpOpBase + 78, 5434, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x104b0046819ULL }, // Inst #18629 = VROUNDPDYmi |
| 23472 | { 18628, 5, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x768568046829ULL }, // Inst #18628 = VRNDSCALESSZrb_Intkz |
| 23473 | { 18627, 6, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x728568046829ULL }, // Inst #18627 = VRNDSCALESSZrb_Intk |
| 23474 | { 18626, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 897, 0, 0x708568046829ULL }, // Inst #18626 = VRNDSCALESSZrb_Int |
| 23475 | { 18625, 5, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x668568046829ULL }, // Inst #18625 = VRNDSCALESSZr_Intkz |
| 23476 | { 18624, 6, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x628568046829ULL }, // Inst #18624 = VRNDSCALESSZr_Intk |
| 23477 | { 18623, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x608568046829ULL }, // Inst #18623 = VRNDSCALESSZr_Int |
| 23478 | { 18622, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 829, 0|(1ULL<<MCID::MayRaiseFPException), 0x608568046829ULL }, // Inst #18622 = VRNDSCALESSZr |
| 23479 | { 18621, 9, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x668568046819ULL }, // Inst #18621 = VRNDSCALESSZm_Intkz |
| 23480 | { 18620, 10, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x628568046819ULL }, // Inst #18620 = VRNDSCALESSZm_Intk |
| 23481 | { 18619, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x608568046819ULL }, // Inst #18619 = VRNDSCALESSZm_Int |
| 23482 | { 18618, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 5693, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x608568046819ULL }, // Inst #18618 = VRNDSCALESSZm |
| 23483 | { 18617, 5, 1, 0, 2376, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x568568046029ULL }, // Inst #18617 = VRNDSCALESHZrb_Intkz |
| 23484 | { 18616, 6, 1, 0, 2376, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x528568046029ULL }, // Inst #18616 = VRNDSCALESHZrb_Intk |
| 23485 | { 18615, 4, 1, 0, 2177, 1, 0, X86ImpOpBase + 78, 897, 0, 0x508568046029ULL }, // Inst #18615 = VRNDSCALESHZrb_Int |
| 23486 | { 18614, 5, 1, 0, 2376, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x468568046029ULL }, // Inst #18614 = VRNDSCALESHZr_Intkz |
| 23487 | { 18613, 6, 1, 0, 2376, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x428568046029ULL }, // Inst #18613 = VRNDSCALESHZr_Intk |
| 23488 | { 18612, 4, 1, 0, 2177, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x408568046029ULL }, // Inst #18612 = VRNDSCALESHZr_Int |
| 23489 | { 18611, 4, 1, 0, 2181, 1, 0, X86ImpOpBase + 78, 821, 0|(1ULL<<MCID::MayRaiseFPException), 0x408568046029ULL }, // Inst #18611 = VRNDSCALESHZr |
| 23490 | { 18610, 9, 1, 0, 2371, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x468568046019ULL }, // Inst #18610 = VRNDSCALESHZm_Intkz |
| 23491 | { 18609, 10, 1, 0, 2371, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x428568046019ULL }, // Inst #18609 = VRNDSCALESHZm_Intk |
| 23492 | { 18608, 8, 1, 0, 2165, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x408568046019ULL }, // Inst #18608 = VRNDSCALESHZm_Int |
| 23493 | { 18607, 8, 1, 0, 2165, 1, 0, X86ImpOpBase + 78, 5685, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x408568046019ULL }, // Inst #18607 = VRNDSCALESHZm |
| 23494 | { 18606, 5, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x9685f0066829ULL }, // Inst #18606 = VRNDSCALESDZrb_Intkz |
| 23495 | { 18605, 6, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x9285f0066829ULL }, // Inst #18605 = VRNDSCALESDZrb_Intk |
| 23496 | { 18604, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 897, 0, 0x9085f0066829ULL }, // Inst #18604 = VRNDSCALESDZrb_Int |
| 23497 | { 18603, 5, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x8685f0066829ULL }, // Inst #18603 = VRNDSCALESDZr_Intkz |
| 23498 | { 18602, 6, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x8285f0066829ULL }, // Inst #18602 = VRNDSCALESDZr_Intk |
| 23499 | { 18601, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x8085f0066829ULL }, // Inst #18601 = VRNDSCALESDZr_Int |
| 23500 | { 18600, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 837, 0|(1ULL<<MCID::MayRaiseFPException), 0x8085f0066829ULL }, // Inst #18600 = VRNDSCALESDZr |
| 23501 | { 18599, 9, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8685f0066819ULL }, // Inst #18599 = VRNDSCALESDZm_Intkz |
| 23502 | { 18598, 10, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8285f0066819ULL }, // Inst #18598 = VRNDSCALESDZm_Intk |
| 23503 | { 18597, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8085f0066819ULL }, // Inst #18597 = VRNDSCALESDZm_Int |
| 23504 | { 18596, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 5677, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8085f0066819ULL }, // Inst #18596 = VRNDSCALESDZm |
| 23505 | { 18595, 4, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4408, 0|(1ULL<<MCID::MayRaiseFPException), 0xee0468046829ULL }, // Inst #18595 = VRNDSCALEPSZrrikz |
| 23506 | { 18594, 5, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4403, 0|(1ULL<<MCID::MayRaiseFPException), 0xea0468046829ULL }, // Inst #18594 = VRNDSCALEPSZrrik |
| 23507 | { 18593, 4, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4408, 0, 0x7e0468046829ULL }, // Inst #18593 = VRNDSCALEPSZrribkz |
| 23508 | { 18592, 5, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4403, 0, 0x7a0468046829ULL }, // Inst #18592 = VRNDSCALEPSZrribk |
| 23509 | { 18591, 3, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4253, 0, 0x780468046829ULL }, // Inst #18591 = VRNDSCALEPSZrrib |
| 23510 | { 18590, 3, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4253, 0|(1ULL<<MCID::MayRaiseFPException), 0xe80468046829ULL }, // Inst #18590 = VRNDSCALEPSZrri |
| 23511 | { 18589, 8, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4395, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee0468046819ULL }, // Inst #18589 = VRNDSCALEPSZrmikz |
| 23512 | { 18588, 9, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4386, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea0468046819ULL }, // Inst #18588 = VRNDSCALEPSZrmik |
| 23513 | { 18587, 7, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe80468046819ULL }, // Inst #18587 = VRNDSCALEPSZrmi |
| 23514 | { 18586, 8, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4395, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e0468046819ULL }, // Inst #18586 = VRNDSCALEPSZrmbikz |
| 23515 | { 18585, 9, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4386, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a0468046819ULL }, // Inst #18585 = VRNDSCALEPSZrmbik |
| 23516 | { 18584, 7, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x780468046819ULL }, // Inst #18584 = VRNDSCALEPSZrmbi |
| 23517 | { 18583, 4, 1, 0, 1839, 1, 0, X86ImpOpBase + 78, 4382, 0|(1ULL<<MCID::MayRaiseFPException), 0xc70468046829ULL }, // Inst #18583 = VRNDSCALEPSZ256rrikz |
| 23518 | { 18582, 5, 1, 0, 1839, 1, 0, X86ImpOpBase + 78, 4377, 0|(1ULL<<MCID::MayRaiseFPException), 0xc30468046829ULL }, // Inst #18582 = VRNDSCALEPSZ256rrik |
| 23519 | { 18581, 3, 1, 0, 1839, 1, 0, X86ImpOpBase + 78, 4217, 0|(1ULL<<MCID::MayRaiseFPException), 0xc10468046829ULL }, // Inst #18581 = VRNDSCALEPSZ256rri |
| 23520 | { 18580, 8, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4369, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc70468046819ULL }, // Inst #18580 = VRNDSCALEPSZ256rmikz |
| 23521 | { 18579, 9, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4360, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc30468046819ULL }, // Inst #18579 = VRNDSCALEPSZ256rmik |
| 23522 | { 18578, 7, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc10468046819ULL }, // Inst #18578 = VRNDSCALEPSZ256rmi |
| 23523 | { 18577, 8, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4369, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x770468046819ULL }, // Inst #18577 = VRNDSCALEPSZ256rmbikz |
| 23524 | { 18576, 9, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4360, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x730468046819ULL }, // Inst #18576 = VRNDSCALEPSZ256rmbik |
| 23525 | { 18575, 7, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x710468046819ULL }, // Inst #18575 = VRNDSCALEPSZ256rmbi |
| 23526 | { 18574, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 3044, 0|(1ULL<<MCID::MayRaiseFPException), 0xa60468046829ULL }, // Inst #18574 = VRNDSCALEPSZ128rrikz |
| 23527 | { 18573, 5, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 3039, 0|(1ULL<<MCID::MayRaiseFPException), 0xa20468046829ULL }, // Inst #18573 = VRNDSCALEPSZ128rrik |
| 23528 | { 18572, 3, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 3036, 0|(1ULL<<MCID::MayRaiseFPException), 0xa00468046829ULL }, // Inst #18572 = VRNDSCALEPSZ128rri |
| 23529 | { 18571, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4352, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa60468046819ULL }, // Inst #18571 = VRNDSCALEPSZ128rmikz |
| 23530 | { 18570, 9, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4343, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa20468046819ULL }, // Inst #18570 = VRNDSCALEPSZ128rmik |
| 23531 | { 18569, 7, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa00468046819ULL }, // Inst #18569 = VRNDSCALEPSZ128rmi |
| 23532 | { 18568, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4352, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x760468046819ULL }, // Inst #18568 = VRNDSCALEPSZ128rmbikz |
| 23533 | { 18567, 9, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4343, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x720468046819ULL }, // Inst #18567 = VRNDSCALEPSZ128rmbik |
| 23534 | { 18566, 7, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x700468046819ULL }, // Inst #18566 = VRNDSCALEPSZ128rmbi |
| 23535 | { 18565, 4, 1, 0, 2383, 1, 0, X86ImpOpBase + 78, 4339, 0|(1ULL<<MCID::MayRaiseFPException), 0xee0468046029ULL }, // Inst #18565 = VRNDSCALEPHZrrikz |
| 23536 | { 18564, 5, 1, 0, 2383, 1, 0, X86ImpOpBase + 78, 4334, 0|(1ULL<<MCID::MayRaiseFPException), 0xea0468046029ULL }, // Inst #18564 = VRNDSCALEPHZrrik |
| 23537 | { 18563, 4, 1, 0, 2383, 1, 0, X86ImpOpBase + 78, 4339, 0, 0x5e0468046029ULL }, // Inst #18563 = VRNDSCALEPHZrribkz |
| 23538 | { 18562, 5, 1, 0, 2383, 1, 0, X86ImpOpBase + 78, 4334, 0, 0x5a0468046029ULL }, // Inst #18562 = VRNDSCALEPHZrribk |
| 23539 | { 18561, 3, 1, 0, 2192, 1, 0, X86ImpOpBase + 78, 4253, 0, 0x580468046029ULL }, // Inst #18561 = VRNDSCALEPHZrrib |
| 23540 | { 18560, 3, 1, 0, 2192, 1, 0, X86ImpOpBase + 78, 4253, 0|(1ULL<<MCID::MayRaiseFPException), 0xe80468046029ULL }, // Inst #18560 = VRNDSCALEPHZrri |
| 23541 | { 18559, 8, 1, 0, 2381, 1, 0, X86ImpOpBase + 78, 4326, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee0468046019ULL }, // Inst #18559 = VRNDSCALEPHZrmikz |
| 23542 | { 18558, 9, 1, 0, 2381, 1, 0, X86ImpOpBase + 78, 4317, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea0468046019ULL }, // Inst #18558 = VRNDSCALEPHZrmik |
| 23543 | { 18557, 7, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe80468046019ULL }, // Inst #18557 = VRNDSCALEPHZrmi |
| 23544 | { 18556, 8, 1, 0, 2381, 1, 0, X86ImpOpBase + 78, 4326, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e0468046019ULL }, // Inst #18556 = VRNDSCALEPHZrmbikz |
| 23545 | { 18555, 9, 1, 0, 2381, 1, 0, X86ImpOpBase + 78, 4317, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a0468046019ULL }, // Inst #18555 = VRNDSCALEPHZrmbik |
| 23546 | { 18554, 7, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x580468046019ULL }, // Inst #18554 = VRNDSCALEPHZrmbi |
| 23547 | { 18553, 4, 1, 0, 2377, 1, 0, X86ImpOpBase + 78, 4313, 0|(1ULL<<MCID::MayRaiseFPException), 0xc70468046029ULL }, // Inst #18553 = VRNDSCALEPHZ256rrikz |
| 23548 | { 18552, 5, 1, 0, 2377, 1, 0, X86ImpOpBase + 78, 4308, 0|(1ULL<<MCID::MayRaiseFPException), 0xc30468046029ULL }, // Inst #18552 = VRNDSCALEPHZ256rrik |
| 23549 | { 18551, 3, 1, 0, 2178, 1, 0, X86ImpOpBase + 78, 4217, 0|(1ULL<<MCID::MayRaiseFPException), 0xc10468046029ULL }, // Inst #18551 = VRNDSCALEPHZ256rri |
| 23550 | { 18550, 8, 1, 0, 2373, 1, 0, X86ImpOpBase + 78, 4300, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc70468046019ULL }, // Inst #18550 = VRNDSCALEPHZ256rmikz |
| 23551 | { 18549, 9, 1, 0, 2373, 1, 0, X86ImpOpBase + 78, 4291, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc30468046019ULL }, // Inst #18549 = VRNDSCALEPHZ256rmik |
| 23552 | { 18548, 7, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc10468046019ULL }, // Inst #18548 = VRNDSCALEPHZ256rmi |
| 23553 | { 18547, 8, 1, 0, 2373, 1, 0, X86ImpOpBase + 78, 4300, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x570468046019ULL }, // Inst #18547 = VRNDSCALEPHZ256rmbikz |
| 23554 | { 18546, 9, 1, 0, 2373, 1, 0, X86ImpOpBase + 78, 4291, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x530468046019ULL }, // Inst #18546 = VRNDSCALEPHZ256rmbik |
| 23555 | { 18545, 7, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x510468046019ULL }, // Inst #18545 = VRNDSCALEPHZ256rmbi |
| 23556 | { 18544, 4, 1, 0, 2376, 1, 0, X86ImpOpBase + 78, 4287, 0|(1ULL<<MCID::MayRaiseFPException), 0xa60468046029ULL }, // Inst #18544 = VRNDSCALEPHZ128rrikz |
| 23557 | { 18543, 5, 1, 0, 2376, 1, 0, X86ImpOpBase + 78, 4282, 0|(1ULL<<MCID::MayRaiseFPException), 0xa20468046029ULL }, // Inst #18543 = VRNDSCALEPHZ128rrik |
| 23558 | { 18542, 3, 1, 0, 2177, 1, 0, X86ImpOpBase + 78, 3036, 0|(1ULL<<MCID::MayRaiseFPException), 0xa00468046029ULL }, // Inst #18542 = VRNDSCALEPHZ128rri |
| 23559 | { 18541, 8, 1, 0, 2371, 1, 0, X86ImpOpBase + 78, 4274, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa60468046019ULL }, // Inst #18541 = VRNDSCALEPHZ128rmikz |
| 23560 | { 18540, 9, 1, 0, 2371, 1, 0, X86ImpOpBase + 78, 4265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa20468046019ULL }, // Inst #18540 = VRNDSCALEPHZ128rmik |
| 23561 | { 18539, 7, 1, 0, 2165, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa00468046019ULL }, // Inst #18539 = VRNDSCALEPHZ128rmi |
| 23562 | { 18538, 8, 1, 0, 2371, 1, 0, X86ImpOpBase + 78, 4274, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x560468046019ULL }, // Inst #18538 = VRNDSCALEPHZ128rmbikz |
| 23563 | { 18537, 9, 1, 0, 2371, 1, 0, X86ImpOpBase + 78, 4265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x520468046019ULL }, // Inst #18537 = VRNDSCALEPHZ128rmbik |
| 23564 | { 18536, 7, 1, 0, 2165, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x500468046019ULL }, // Inst #18536 = VRNDSCALEPHZ128rmbi |
| 23565 | { 18535, 4, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4261, 0|(1ULL<<MCID::MayRaiseFPException), 0xee04f0066829ULL }, // Inst #18535 = VRNDSCALEPDZrrikz |
| 23566 | { 18534, 5, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4256, 0|(1ULL<<MCID::MayRaiseFPException), 0xea04f0066829ULL }, // Inst #18534 = VRNDSCALEPDZrrik |
| 23567 | { 18533, 4, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4261, 0, 0x9e04f0066829ULL }, // Inst #18533 = VRNDSCALEPDZrribkz |
| 23568 | { 18532, 5, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4256, 0, 0x9a04f0066829ULL }, // Inst #18532 = VRNDSCALEPDZrribk |
| 23569 | { 18531, 3, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4253, 0, 0x9804f0066829ULL }, // Inst #18531 = VRNDSCALEPDZrrib |
| 23570 | { 18530, 3, 1, 0, 2370, 1, 0, X86ImpOpBase + 78, 4253, 0|(1ULL<<MCID::MayRaiseFPException), 0xe804f0066829ULL }, // Inst #18530 = VRNDSCALEPDZrri |
| 23571 | { 18529, 8, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4245, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee04f0066819ULL }, // Inst #18529 = VRNDSCALEPDZrmikz |
| 23572 | { 18528, 9, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea04f0066819ULL }, // Inst #18528 = VRNDSCALEPDZrmik |
| 23573 | { 18527, 7, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe804f0066819ULL }, // Inst #18527 = VRNDSCALEPDZrmi |
| 23574 | { 18526, 8, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4245, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e04f0066819ULL }, // Inst #18526 = VRNDSCALEPDZrmbikz |
| 23575 | { 18525, 9, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a04f0066819ULL }, // Inst #18525 = VRNDSCALEPDZrmbik |
| 23576 | { 18524, 7, 1, 0, 2187, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9804f0066819ULL }, // Inst #18524 = VRNDSCALEPDZrmbi |
| 23577 | { 18523, 4, 1, 0, 1839, 1, 0, X86ImpOpBase + 78, 4225, 0|(1ULL<<MCID::MayRaiseFPException), 0xc704f0066829ULL }, // Inst #18523 = VRNDSCALEPDZ256rrikz |
| 23578 | { 18522, 5, 1, 0, 1839, 1, 0, X86ImpOpBase + 78, 4220, 0|(1ULL<<MCID::MayRaiseFPException), 0xc304f0066829ULL }, // Inst #18522 = VRNDSCALEPDZ256rrik |
| 23579 | { 18521, 3, 1, 0, 1839, 1, 0, X86ImpOpBase + 78, 4217, 0|(1ULL<<MCID::MayRaiseFPException), 0xc104f0066829ULL }, // Inst #18521 = VRNDSCALEPDZ256rri |
| 23580 | { 18520, 8, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4209, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc704f0066819ULL }, // Inst #18520 = VRNDSCALEPDZ256rmikz |
| 23581 | { 18519, 9, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4200, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc304f0066819ULL }, // Inst #18519 = VRNDSCALEPDZ256rmik |
| 23582 | { 18518, 7, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc104f0066819ULL }, // Inst #18518 = VRNDSCALEPDZ256rmi |
| 23583 | { 18517, 8, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4209, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9704f0066819ULL }, // Inst #18517 = VRNDSCALEPDZ256rmbikz |
| 23584 | { 18516, 9, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4200, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9304f0066819ULL }, // Inst #18516 = VRNDSCALEPDZ256rmbik |
| 23585 | { 18515, 7, 1, 0, 2168, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9104f0066819ULL }, // Inst #18515 = VRNDSCALEPDZ256rmbi |
| 23586 | { 18514, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 4189, 0|(1ULL<<MCID::MayRaiseFPException), 0xa604f0066829ULL }, // Inst #18514 = VRNDSCALEPDZ128rrikz |
| 23587 | { 18513, 5, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 4184, 0|(1ULL<<MCID::MayRaiseFPException), 0xa204f0066829ULL }, // Inst #18513 = VRNDSCALEPDZ128rrik |
| 23588 | { 18512, 3, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 3036, 0|(1ULL<<MCID::MayRaiseFPException), 0xa004f0066829ULL }, // Inst #18512 = VRNDSCALEPDZ128rri |
| 23589 | { 18511, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4176, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa604f0066819ULL }, // Inst #18511 = VRNDSCALEPDZ128rmikz |
| 23590 | { 18510, 9, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4167, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa204f0066819ULL }, // Inst #18510 = VRNDSCALEPDZ128rmik |
| 23591 | { 18509, 7, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa004f0066819ULL }, // Inst #18509 = VRNDSCALEPDZ128rmi |
| 23592 | { 18508, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4176, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9604f0066819ULL }, // Inst #18508 = VRNDSCALEPDZ128rmbikz |
| 23593 | { 18507, 9, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4167, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9204f0066819ULL }, // Inst #18507 = VRNDSCALEPDZ128rmbik |
| 23594 | { 18506, 7, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9004f0066819ULL }, // Inst #18506 = VRNDSCALEPDZ128rmbi |
| 23595 | { 18505, 5, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x66abe8046829ULL }, // Inst #18505 = VREDUCESSZrrikz |
| 23596 | { 18504, 6, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x62abe8046829ULL }, // Inst #18504 = VREDUCESSZrrik |
| 23597 | { 18503, 5, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x76abe8046829ULL }, // Inst #18503 = VREDUCESSZrribkz |
| 23598 | { 18502, 6, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x72abe8046829ULL }, // Inst #18502 = VREDUCESSZrribk |
| 23599 | { 18501, 4, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 897, 0, 0x70abe8046829ULL }, // Inst #18501 = VREDUCESSZrrib |
| 23600 | { 18500, 4, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x60abe8046829ULL }, // Inst #18500 = VREDUCESSZrri |
| 23601 | { 18499, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66abe8046819ULL }, // Inst #18499 = VREDUCESSZrmikz |
| 23602 | { 18498, 10, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62abe8046819ULL }, // Inst #18498 = VREDUCESSZrmik |
| 23603 | { 18497, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60abe8046819ULL }, // Inst #18497 = VREDUCESSZrmi |
| 23604 | { 18496, 5, 1, 0, 2364, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x46abe8046029ULL }, // Inst #18496 = VREDUCESHZrrikz |
| 23605 | { 18495, 6, 1, 0, 2364, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x42abe8046029ULL }, // Inst #18495 = VREDUCESHZrrik |
| 23606 | { 18494, 5, 1, 0, 2364, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x56abe8046029ULL }, // Inst #18494 = VREDUCESHZrribkz |
| 23607 | { 18493, 6, 1, 0, 2364, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x52abe8046029ULL }, // Inst #18493 = VREDUCESHZrribk |
| 23608 | { 18492, 4, 1, 0, 2362, 1, 0, X86ImpOpBase + 78, 897, 0, 0x50abe8046029ULL }, // Inst #18492 = VREDUCESHZrrib |
| 23609 | { 18491, 4, 1, 0, 2362, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x40abe8046029ULL }, // Inst #18491 = VREDUCESHZrri |
| 23610 | { 18490, 9, 1, 0, 2360, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46abe8046019ULL }, // Inst #18490 = VREDUCESHZrmikz |
| 23611 | { 18489, 10, 1, 0, 2360, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42abe8046019ULL }, // Inst #18489 = VREDUCESHZrmik |
| 23612 | { 18488, 8, 1, 0, 2358, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40abe8046019ULL }, // Inst #18488 = VREDUCESHZrmi |
| 23613 | { 18487, 5, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x86abf0066829ULL }, // Inst #18487 = VREDUCESDZrrikz |
| 23614 | { 18486, 6, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x82abf0066829ULL }, // Inst #18486 = VREDUCESDZrrik |
| 23615 | { 18485, 5, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x96abf0066829ULL }, // Inst #18485 = VREDUCESDZrribkz |
| 23616 | { 18484, 6, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x92abf0066829ULL }, // Inst #18484 = VREDUCESDZrribk |
| 23617 | { 18483, 4, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 897, 0, 0x90abf0066829ULL }, // Inst #18483 = VREDUCESDZrrib |
| 23618 | { 18482, 4, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x80abf0066829ULL }, // Inst #18482 = VREDUCESDZrri |
| 23619 | { 18481, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86abf0066819ULL }, // Inst #18481 = VREDUCESDZrmikz |
| 23620 | { 18480, 10, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82abf0066819ULL }, // Inst #18480 = VREDUCESDZrmik |
| 23621 | { 18479, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80abf0066819ULL }, // Inst #18479 = VREDUCESDZrmi |
| 23622 | { 18478, 4, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4408, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2b68046829ULL }, // Inst #18478 = VREDUCEPSZrrikz |
| 23623 | { 18477, 5, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4403, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2b68046829ULL }, // Inst #18477 = VREDUCEPSZrrik |
| 23624 | { 18476, 4, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4408, 0, 0x7e2b68046829ULL }, // Inst #18476 = VREDUCEPSZrribkz |
| 23625 | { 18475, 5, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4403, 0, 0x7a2b68046829ULL }, // Inst #18475 = VREDUCEPSZrribk |
| 23626 | { 18474, 3, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4253, 0, 0x782b68046829ULL }, // Inst #18474 = VREDUCEPSZrrib |
| 23627 | { 18473, 3, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4253, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82b68046829ULL }, // Inst #18473 = VREDUCEPSZrri |
| 23628 | { 18472, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4395, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2b68046819ULL }, // Inst #18472 = VREDUCEPSZrmikz |
| 23629 | { 18471, 9, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4386, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2b68046819ULL }, // Inst #18471 = VREDUCEPSZrmik |
| 23630 | { 18470, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82b68046819ULL }, // Inst #18470 = VREDUCEPSZrmi |
| 23631 | { 18469, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4395, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2b68046819ULL }, // Inst #18469 = VREDUCEPSZrmbikz |
| 23632 | { 18468, 9, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4386, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2b68046819ULL }, // Inst #18468 = VREDUCEPSZrmbik |
| 23633 | { 18467, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782b68046819ULL }, // Inst #18467 = VREDUCEPSZrmbi |
| 23634 | { 18466, 4, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4382, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72b68046829ULL }, // Inst #18466 = VREDUCEPSZ256rrikz |
| 23635 | { 18465, 5, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4377, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32b68046829ULL }, // Inst #18465 = VREDUCEPSZ256rrik |
| 23636 | { 18464, 3, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4217, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12b68046829ULL }, // Inst #18464 = VREDUCEPSZ256rri |
| 23637 | { 18463, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4369, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72b68046819ULL }, // Inst #18463 = VREDUCEPSZ256rmikz |
| 23638 | { 18462, 9, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4360, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32b68046819ULL }, // Inst #18462 = VREDUCEPSZ256rmik |
| 23639 | { 18461, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12b68046819ULL }, // Inst #18461 = VREDUCEPSZ256rmi |
| 23640 | { 18460, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4369, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772b68046819ULL }, // Inst #18460 = VREDUCEPSZ256rmbikz |
| 23641 | { 18459, 9, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4360, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732b68046819ULL }, // Inst #18459 = VREDUCEPSZ256rmbik |
| 23642 | { 18458, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712b68046819ULL }, // Inst #18458 = VREDUCEPSZ256rmbi |
| 23643 | { 18457, 4, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 3044, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62b68046829ULL }, // Inst #18457 = VREDUCEPSZ128rrikz |
| 23644 | { 18456, 5, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 3039, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22b68046829ULL }, // Inst #18456 = VREDUCEPSZ128rrik |
| 23645 | { 18455, 3, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 3036, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02b68046829ULL }, // Inst #18455 = VREDUCEPSZ128rri |
| 23646 | { 18454, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4352, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62b68046819ULL }, // Inst #18454 = VREDUCEPSZ128rmikz |
| 23647 | { 18453, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4343, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22b68046819ULL }, // Inst #18453 = VREDUCEPSZ128rmik |
| 23648 | { 18452, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02b68046819ULL }, // Inst #18452 = VREDUCEPSZ128rmi |
| 23649 | { 18451, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4352, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762b68046819ULL }, // Inst #18451 = VREDUCEPSZ128rmbikz |
| 23650 | { 18450, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4343, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722b68046819ULL }, // Inst #18450 = VREDUCEPSZ128rmbik |
| 23651 | { 18449, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702b68046819ULL }, // Inst #18449 = VREDUCEPSZ128rmbi |
| 23652 | { 18448, 4, 1, 0, 2369, 1, 0, X86ImpOpBase + 78, 4339, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2b68046029ULL }, // Inst #18448 = VREDUCEPHZrrikz |
| 23653 | { 18447, 5, 1, 0, 2369, 1, 0, X86ImpOpBase + 78, 4334, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2b68046029ULL }, // Inst #18447 = VREDUCEPHZrrik |
| 23654 | { 18446, 4, 1, 0, 2369, 1, 0, X86ImpOpBase + 78, 4339, 0, 0x5e2b68046029ULL }, // Inst #18446 = VREDUCEPHZrribkz |
| 23655 | { 18445, 5, 1, 0, 2369, 1, 0, X86ImpOpBase + 78, 4334, 0, 0x5a2b68046029ULL }, // Inst #18445 = VREDUCEPHZrribk |
| 23656 | { 18444, 3, 1, 0, 2368, 1, 0, X86ImpOpBase + 78, 4253, 0, 0x582b68046029ULL }, // Inst #18444 = VREDUCEPHZrrib |
| 23657 | { 18443, 3, 1, 0, 2368, 1, 0, X86ImpOpBase + 78, 4253, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82b68046029ULL }, // Inst #18443 = VREDUCEPHZrri |
| 23658 | { 18442, 8, 1, 0, 2367, 1, 0, X86ImpOpBase + 78, 4326, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2b68046019ULL }, // Inst #18442 = VREDUCEPHZrmikz |
| 23659 | { 18441, 9, 1, 0, 2367, 1, 0, X86ImpOpBase + 78, 4317, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2b68046019ULL }, // Inst #18441 = VREDUCEPHZrmik |
| 23660 | { 18440, 7, 1, 0, 2366, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82b68046019ULL }, // Inst #18440 = VREDUCEPHZrmi |
| 23661 | { 18439, 8, 1, 0, 2367, 1, 0, X86ImpOpBase + 78, 4326, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e2b68046019ULL }, // Inst #18439 = VREDUCEPHZrmbikz |
| 23662 | { 18438, 9, 1, 0, 2367, 1, 0, X86ImpOpBase + 78, 4317, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a2b68046019ULL }, // Inst #18438 = VREDUCEPHZrmbik |
| 23663 | { 18437, 7, 1, 0, 2366, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x582b68046019ULL }, // Inst #18437 = VREDUCEPHZrmbi |
| 23664 | { 18436, 4, 1, 0, 2365, 1, 0, X86ImpOpBase + 78, 4313, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72b68046029ULL }, // Inst #18436 = VREDUCEPHZ256rrikz |
| 23665 | { 18435, 5, 1, 0, 2365, 1, 0, X86ImpOpBase + 78, 4308, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32b68046029ULL }, // Inst #18435 = VREDUCEPHZ256rrik |
| 23666 | { 18434, 3, 1, 0, 2363, 1, 0, X86ImpOpBase + 78, 4217, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12b68046029ULL }, // Inst #18434 = VREDUCEPHZ256rri |
| 23667 | { 18433, 8, 1, 0, 2361, 1, 0, X86ImpOpBase + 78, 4300, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72b68046019ULL }, // Inst #18433 = VREDUCEPHZ256rmikz |
| 23668 | { 18432, 9, 1, 0, 2361, 1, 0, X86ImpOpBase + 78, 4291, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32b68046019ULL }, // Inst #18432 = VREDUCEPHZ256rmik |
| 23669 | { 18431, 7, 1, 0, 2359, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12b68046019ULL }, // Inst #18431 = VREDUCEPHZ256rmi |
| 23670 | { 18430, 8, 1, 0, 2361, 1, 0, X86ImpOpBase + 78, 4300, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x572b68046019ULL }, // Inst #18430 = VREDUCEPHZ256rmbikz |
| 23671 | { 18429, 9, 1, 0, 2361, 1, 0, X86ImpOpBase + 78, 4291, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x532b68046019ULL }, // Inst #18429 = VREDUCEPHZ256rmbik |
| 23672 | { 18428, 7, 1, 0, 2359, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x512b68046019ULL }, // Inst #18428 = VREDUCEPHZ256rmbi |
| 23673 | { 18427, 4, 1, 0, 2364, 1, 0, X86ImpOpBase + 78, 4287, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62b68046029ULL }, // Inst #18427 = VREDUCEPHZ128rrikz |
| 23674 | { 18426, 5, 1, 0, 2364, 1, 0, X86ImpOpBase + 78, 4282, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22b68046029ULL }, // Inst #18426 = VREDUCEPHZ128rrik |
| 23675 | { 18425, 3, 1, 0, 2362, 1, 0, X86ImpOpBase + 78, 3036, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02b68046029ULL }, // Inst #18425 = VREDUCEPHZ128rri |
| 23676 | { 18424, 8, 1, 0, 2360, 1, 0, X86ImpOpBase + 78, 4274, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62b68046019ULL }, // Inst #18424 = VREDUCEPHZ128rmikz |
| 23677 | { 18423, 9, 1, 0, 2360, 1, 0, X86ImpOpBase + 78, 4265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22b68046019ULL }, // Inst #18423 = VREDUCEPHZ128rmik |
| 23678 | { 18422, 7, 1, 0, 2357, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02b68046019ULL }, // Inst #18422 = VREDUCEPHZ128rmi |
| 23679 | { 18421, 8, 1, 0, 2360, 1, 0, X86ImpOpBase + 78, 4274, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x562b68046019ULL }, // Inst #18421 = VREDUCEPHZ128rmbikz |
| 23680 | { 18420, 9, 1, 0, 2360, 1, 0, X86ImpOpBase + 78, 4265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x522b68046019ULL }, // Inst #18420 = VREDUCEPHZ128rmbik |
| 23681 | { 18419, 7, 1, 0, 2357, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x502b68046019ULL }, // Inst #18419 = VREDUCEPHZ128rmbi |
| 23682 | { 18418, 4, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4261, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2b70066829ULL }, // Inst #18418 = VREDUCEPDZrrikz |
| 23683 | { 18417, 5, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4256, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2b70066829ULL }, // Inst #18417 = VREDUCEPDZrrik |
| 23684 | { 18416, 4, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4261, 0, 0x9e2b70066829ULL }, // Inst #18416 = VREDUCEPDZrribkz |
| 23685 | { 18415, 5, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4256, 0, 0x9a2b70066829ULL }, // Inst #18415 = VREDUCEPDZrribk |
| 23686 | { 18414, 3, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4253, 0, 0x982b70066829ULL }, // Inst #18414 = VREDUCEPDZrrib |
| 23687 | { 18413, 3, 1, 0, 1079, 1, 0, X86ImpOpBase + 78, 4253, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82b70066829ULL }, // Inst #18413 = VREDUCEPDZrri |
| 23688 | { 18412, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4245, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2b70066819ULL }, // Inst #18412 = VREDUCEPDZrmikz |
| 23689 | { 18411, 9, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2b70066819ULL }, // Inst #18411 = VREDUCEPDZrmik |
| 23690 | { 18410, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82b70066819ULL }, // Inst #18410 = VREDUCEPDZrmi |
| 23691 | { 18409, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4245, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2b70066819ULL }, // Inst #18409 = VREDUCEPDZrmbikz |
| 23692 | { 18408, 9, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2b70066819ULL }, // Inst #18408 = VREDUCEPDZrmbik |
| 23693 | { 18407, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982b70066819ULL }, // Inst #18407 = VREDUCEPDZrmbi |
| 23694 | { 18406, 4, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4225, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72b70066829ULL }, // Inst #18406 = VREDUCEPDZ256rrikz |
| 23695 | { 18405, 5, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4220, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32b70066829ULL }, // Inst #18405 = VREDUCEPDZ256rrik |
| 23696 | { 18404, 3, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4217, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12b70066829ULL }, // Inst #18404 = VREDUCEPDZ256rri |
| 23697 | { 18403, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4209, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72b70066819ULL }, // Inst #18403 = VREDUCEPDZ256rmikz |
| 23698 | { 18402, 9, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4200, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32b70066819ULL }, // Inst #18402 = VREDUCEPDZ256rmik |
| 23699 | { 18401, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12b70066819ULL }, // Inst #18401 = VREDUCEPDZ256rmi |
| 23700 | { 18400, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4209, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972b70066819ULL }, // Inst #18400 = VREDUCEPDZ256rmbikz |
| 23701 | { 18399, 9, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4200, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932b70066819ULL }, // Inst #18399 = VREDUCEPDZ256rmbik |
| 23702 | { 18398, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912b70066819ULL }, // Inst #18398 = VREDUCEPDZ256rmbi |
| 23703 | { 18397, 4, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 4189, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62b70066829ULL }, // Inst #18397 = VREDUCEPDZ128rrikz |
| 23704 | { 18396, 5, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 4184, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22b70066829ULL }, // Inst #18396 = VREDUCEPDZ128rrik |
| 23705 | { 18395, 3, 1, 0, 1078, 1, 0, X86ImpOpBase + 78, 3036, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02b70066829ULL }, // Inst #18395 = VREDUCEPDZ128rri |
| 23706 | { 18394, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4176, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62b70066819ULL }, // Inst #18394 = VREDUCEPDZ128rmikz |
| 23707 | { 18393, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4167, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22b70066819ULL }, // Inst #18393 = VREDUCEPDZ128rmik |
| 23708 | { 18392, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02b70066819ULL }, // Inst #18392 = VREDUCEPDZ128rmi |
| 23709 | { 18391, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4176, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962b70066819ULL }, // Inst #18391 = VREDUCEPDZ128rmbikz |
| 23710 | { 18390, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4167, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922b70066819ULL }, // Inst #18390 = VREDUCEPDZ128rmbik |
| 23711 | { 18389, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902b70066819ULL }, // Inst #18389 = VREDUCEPDZ128rmbi |
| 23712 | { 18388, 3, 1, 0, 299, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xa9a8003029ULL }, // Inst #18388 = VRCPSSr_Int |
| 23713 | { 18387, 3, 1, 0, 299, 0, 0, X86ImpOpBase + 0, 1982, 0, 0xa9a8003029ULL }, // Inst #18387 = VRCPSSr |
| 23714 | { 18386, 7, 1, 0, 298, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xa9a8003019ULL }, // Inst #18386 = VRCPSSm_Int |
| 23715 | { 18385, 7, 1, 0, 298, 0, 0, X86ImpOpBase + 0, 1975, 0|(1ULL<<MCID::MayLoad), 0xa9a8003019ULL }, // Inst #18385 = VRCPSSm |
| 23716 | { 18384, 4, 1, 0, 299, 0, 0, X86ImpOpBase + 0, 1926, 0, 0x46a6e8014829ULL }, // Inst #18384 = VRCPSHZrrkz |
| 23717 | { 18383, 5, 1, 0, 299, 0, 0, X86ImpOpBase + 0, 1921, 0, 0x42a6e8014829ULL }, // Inst #18383 = VRCPSHZrrk |
| 23718 | { 18382, 3, 1, 0, 299, 0, 0, X86ImpOpBase + 0, 1625, 0, 0x40a6e8014829ULL }, // Inst #18382 = VRCPSHZrr |
| 23719 | { 18381, 8, 1, 0, 298, 0, 0, X86ImpOpBase + 0, 1910, 0|(1ULL<<MCID::MayLoad), 0x46a6e8014819ULL }, // Inst #18381 = VRCPSHZrmkz |
| 23720 | { 18380, 9, 1, 0, 298, 0, 0, X86ImpOpBase + 0, 1564, 0|(1ULL<<MCID::MayLoad), 0x42a6e8014819ULL }, // Inst #18380 = VRCPSHZrmk |
| 23721 | { 18379, 7, 1, 0, 298, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x40a6e8014819ULL }, // Inst #18379 = VRCPSHZrm |
| 23722 | { 18378, 2, 1, 0, 296, 0, 0, X86ImpOpBase + 0, 535, 0, 0x29a8002029ULL }, // Inst #18378 = VRCPPSr |
| 23723 | { 18377, 6, 1, 0, 295, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x29a8002019ULL }, // Inst #18377 = VRCPPSm |
| 23724 | { 18376, 2, 1, 0, 571, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x129a8002029ULL }, // Inst #18376 = VRCPPSYr |
| 23725 | { 18375, 6, 1, 0, 574, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x129a8002019ULL }, // Inst #18375 = VRCPPSYm |
| 23726 | { 18374, 3, 1, 0, 2356, 0, 0, X86ImpOpBase + 0, 3008, 0, 0xee2668014829ULL }, // Inst #18374 = VRCPPHZrkz |
| 23727 | { 18373, 4, 1, 0, 2356, 0, 0, X86ImpOpBase + 0, 3004, 0, 0xea2668014829ULL }, // Inst #18373 = VRCPPHZrk |
| 23728 | { 18372, 2, 1, 0, 573, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe82668014829ULL }, // Inst #18372 = VRCPPHZr |
| 23729 | { 18371, 7, 1, 0, 2354, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0xee2668014819ULL }, // Inst #18371 = VRCPPHZmkz |
| 23730 | { 18370, 8, 1, 0, 2354, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad), 0xea2668014819ULL }, // Inst #18370 = VRCPPHZmk |
| 23731 | { 18369, 7, 1, 0, 2354, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0x5e2668014819ULL }, // Inst #18369 = VRCPPHZmbkz |
| 23732 | { 18368, 8, 1, 0, 2354, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad), 0x5a2668014819ULL }, // Inst #18368 = VRCPPHZmbk |
| 23733 | { 18367, 6, 1, 0, 572, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x582668014819ULL }, // Inst #18367 = VRCPPHZmb |
| 23734 | { 18366, 6, 1, 0, 572, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82668014819ULL }, // Inst #18366 = VRCPPHZm |
| 23735 | { 18365, 3, 1, 0, 571, 0, 0, X86ImpOpBase + 0, 2977, 0, 0xc72668014829ULL }, // Inst #18365 = VRCPPHZ256rkz |
| 23736 | { 18364, 4, 1, 0, 571, 0, 0, X86ImpOpBase + 0, 2973, 0, 0xc32668014829ULL }, // Inst #18364 = VRCPPHZ256rk |
| 23737 | { 18363, 2, 1, 0, 571, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc12668014829ULL }, // Inst #18363 = VRCPPHZ256r |
| 23738 | { 18362, 7, 1, 0, 570, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0xc72668014819ULL }, // Inst #18362 = VRCPPHZ256mkz |
| 23739 | { 18361, 8, 1, 0, 570, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0xc32668014819ULL }, // Inst #18361 = VRCPPHZ256mk |
| 23740 | { 18360, 7, 1, 0, 570, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0x572668014819ULL }, // Inst #18360 = VRCPPHZ256mbkz |
| 23741 | { 18359, 8, 1, 0, 570, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0x532668014819ULL }, // Inst #18359 = VRCPPHZ256mbk |
| 23742 | { 18358, 6, 1, 0, 570, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x512668014819ULL }, // Inst #18358 = VRCPPHZ256mb |
| 23743 | { 18357, 6, 1, 0, 570, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc12668014819ULL }, // Inst #18357 = VRCPPHZ256m |
| 23744 | { 18356, 3, 1, 0, 296, 0, 0, X86ImpOpBase + 0, 2970, 0, 0xa62668014829ULL }, // Inst #18356 = VRCPPHZ128rkz |
| 23745 | { 18355, 4, 1, 0, 296, 0, 0, X86ImpOpBase + 0, 2966, 0, 0xa22668014829ULL }, // Inst #18355 = VRCPPHZ128rk |
| 23746 | { 18354, 2, 1, 0, 296, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02668014829ULL }, // Inst #18354 = VRCPPHZ128r |
| 23747 | { 18353, 7, 1, 0, 569, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0xa62668014819ULL }, // Inst #18353 = VRCPPHZ128mkz |
| 23748 | { 18352, 8, 1, 0, 569, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0xa22668014819ULL }, // Inst #18352 = VRCPPHZ128mk |
| 23749 | { 18351, 7, 1, 0, 569, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0x562668014819ULL }, // Inst #18351 = VRCPPHZ128mbkz |
| 23750 | { 18350, 8, 1, 0, 569, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0x522668014819ULL }, // Inst #18350 = VRCPPHZ128mbk |
| 23751 | { 18349, 6, 1, 0, 569, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x502668014819ULL }, // Inst #18349 = VRCPPHZ128mb |
| 23752 | { 18348, 6, 1, 0, 569, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa02668014819ULL }, // Inst #18348 = VRCPPHZ128m |
| 23753 | { 18347, 4, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66e5e8004829ULL }, // Inst #18347 = VRCP28SSZrkz |
| 23754 | { 18346, 5, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62e5e8004829ULL }, // Inst #18346 = VRCP28SSZrk |
| 23755 | { 18345, 4, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x76e5e8004829ULL }, // Inst #18345 = VRCP28SSZrbkz |
| 23756 | { 18344, 5, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x72e5e8004829ULL }, // Inst #18344 = VRCP28SSZrbk |
| 23757 | { 18343, 3, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x70e5e8004829ULL }, // Inst #18343 = VRCP28SSZrb |
| 23758 | { 18342, 3, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60e5e8004829ULL }, // Inst #18342 = VRCP28SSZr |
| 23759 | { 18341, 8, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66e5e8004819ULL }, // Inst #18341 = VRCP28SSZmkz |
| 23760 | { 18340, 9, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62e5e8004819ULL }, // Inst #18340 = VRCP28SSZmk |
| 23761 | { 18339, 7, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60e5e8004819ULL }, // Inst #18339 = VRCP28SSZm |
| 23762 | { 18338, 4, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86e5f0024829ULL }, // Inst #18338 = VRCP28SDZrkz |
| 23763 | { 18337, 5, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82e5f0024829ULL }, // Inst #18337 = VRCP28SDZrk |
| 23764 | { 18336, 4, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x96e5f0024829ULL }, // Inst #18336 = VRCP28SDZrbkz |
| 23765 | { 18335, 5, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x92e5f0024829ULL }, // Inst #18335 = VRCP28SDZrbk |
| 23766 | { 18334, 3, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x90e5f0024829ULL }, // Inst #18334 = VRCP28SDZrb |
| 23767 | { 18333, 3, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80e5f0024829ULL }, // Inst #18333 = VRCP28SDZr |
| 23768 | { 18332, 8, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86e5f0024819ULL }, // Inst #18332 = VRCP28SDZmkz |
| 23769 | { 18331, 9, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82e5f0024819ULL }, // Inst #18331 = VRCP28SDZmk |
| 23770 | { 18330, 7, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80e5f0024819ULL }, // Inst #18330 = VRCP28SDZm |
| 23771 | { 18329, 3, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6568004829ULL }, // Inst #18329 = VRCP28PSZrkz |
| 23772 | { 18328, 4, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6568004829ULL }, // Inst #18328 = VRCP28PSZrk |
| 23773 | { 18327, 3, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2779, 0, 0x7e6568004829ULL }, // Inst #18327 = VRCP28PSZrbkz |
| 23774 | { 18326, 4, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2775, 0, 0x7a6568004829ULL }, // Inst #18326 = VRCP28PSZrbk |
| 23775 | { 18325, 2, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x786568004829ULL }, // Inst #18325 = VRCP28PSZrb |
| 23776 | { 18324, 2, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86568004829ULL }, // Inst #18324 = VRCP28PSZr |
| 23777 | { 18323, 7, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6568004819ULL }, // Inst #18323 = VRCP28PSZmkz |
| 23778 | { 18322, 8, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6568004819ULL }, // Inst #18322 = VRCP28PSZmk |
| 23779 | { 18321, 7, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e6568004819ULL }, // Inst #18321 = VRCP28PSZmbkz |
| 23780 | { 18320, 8, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a6568004819ULL }, // Inst #18320 = VRCP28PSZmbk |
| 23781 | { 18319, 6, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x786568004819ULL }, // Inst #18319 = VRCP28PSZmb |
| 23782 | { 18318, 6, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86568004819ULL }, // Inst #18318 = VRCP28PSZm |
| 23783 | { 18317, 3, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6570024829ULL }, // Inst #18317 = VRCP28PDZrkz |
| 23784 | { 18316, 4, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6570024829ULL }, // Inst #18316 = VRCP28PDZrk |
| 23785 | { 18315, 3, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2744, 0, 0x9e6570024829ULL }, // Inst #18315 = VRCP28PDZrbkz |
| 23786 | { 18314, 4, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2740, 0, 0x9a6570024829ULL }, // Inst #18314 = VRCP28PDZrbk |
| 23787 | { 18313, 2, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x986570024829ULL }, // Inst #18313 = VRCP28PDZrb |
| 23788 | { 18312, 2, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86570024829ULL }, // Inst #18312 = VRCP28PDZr |
| 23789 | { 18311, 7, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6570024819ULL }, // Inst #18311 = VRCP28PDZmkz |
| 23790 | { 18310, 8, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6570024819ULL }, // Inst #18310 = VRCP28PDZmk |
| 23791 | { 18309, 7, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e6570024819ULL }, // Inst #18309 = VRCP28PDZmbkz |
| 23792 | { 18308, 8, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a6570024819ULL }, // Inst #18308 = VRCP28PDZmbk |
| 23793 | { 18307, 6, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x986570024819ULL }, // Inst #18307 = VRCP28PDZmb |
| 23794 | { 18306, 6, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86570024819ULL }, // Inst #18306 = VRCP28PDZm |
| 23795 | { 18305, 4, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x66a6e8004829ULL }, // Inst #18305 = VRCP14SSZrrkz |
| 23796 | { 18304, 5, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x62a6e8004829ULL }, // Inst #18304 = VRCP14SSZrrk |
| 23797 | { 18303, 3, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x60a6e8004829ULL }, // Inst #18303 = VRCP14SSZrr |
| 23798 | { 18302, 8, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad), 0x66a6e8004819ULL }, // Inst #18302 = VRCP14SSZrmkz |
| 23799 | { 18301, 9, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad), 0x62a6e8004819ULL }, // Inst #18301 = VRCP14SSZrmk |
| 23800 | { 18300, 7, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad), 0x60a6e8004819ULL }, // Inst #18300 = VRCP14SSZrm |
| 23801 | { 18299, 4, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x86a6f0024829ULL }, // Inst #18299 = VRCP14SDZrrkz |
| 23802 | { 18298, 5, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x82a6f0024829ULL }, // Inst #18298 = VRCP14SDZrrk |
| 23803 | { 18297, 3, 1, 0, 299, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x80a6f0024829ULL }, // Inst #18297 = VRCP14SDZrr |
| 23804 | { 18296, 8, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad), 0x86a6f0024819ULL }, // Inst #18296 = VRCP14SDZrmkz |
| 23805 | { 18295, 9, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad), 0x82a6f0024819ULL }, // Inst #18295 = VRCP14SDZrmk |
| 23806 | { 18294, 7, 1, 0, 298, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad), 0x80a6f0024819ULL }, // Inst #18294 = VRCP14SDZrm |
| 23807 | { 18293, 3, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2779, 0, 0xee2668004829ULL }, // Inst #18293 = VRCP14PSZrkz |
| 23808 | { 18292, 4, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2775, 0, 0xea2668004829ULL }, // Inst #18292 = VRCP14PSZrk |
| 23809 | { 18291, 2, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2738, 0, 0xe82668004829ULL }, // Inst #18291 = VRCP14PSZr |
| 23810 | { 18290, 7, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad), 0xee2668004819ULL }, // Inst #18290 = VRCP14PSZmkz |
| 23811 | { 18289, 8, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad), 0xea2668004819ULL }, // Inst #18289 = VRCP14PSZmk |
| 23812 | { 18288, 7, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad), 0x7e2668004819ULL }, // Inst #18288 = VRCP14PSZmbkz |
| 23813 | { 18287, 8, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad), 0x7a2668004819ULL }, // Inst #18287 = VRCP14PSZmbk |
| 23814 | { 18286, 6, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad), 0x782668004819ULL }, // Inst #18286 = VRCP14PSZmb |
| 23815 | { 18285, 6, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82668004819ULL }, // Inst #18285 = VRCP14PSZm |
| 23816 | { 18284, 3, 1, 0, 571, 1, 0, X86ImpOpBase + 78, 2765, 0, 0xc72668004829ULL }, // Inst #18284 = VRCP14PSZ256rkz |
| 23817 | { 18283, 4, 1, 0, 571, 1, 0, X86ImpOpBase + 78, 2761, 0, 0xc32668004829ULL }, // Inst #18283 = VRCP14PSZ256rk |
| 23818 | { 18282, 2, 1, 0, 571, 1, 0, X86ImpOpBase + 78, 2716, 0, 0xc12668004829ULL }, // Inst #18282 = VRCP14PSZ256r |
| 23819 | { 18281, 7, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad), 0xc72668004819ULL }, // Inst #18281 = VRCP14PSZ256mkz |
| 23820 | { 18280, 8, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad), 0xc32668004819ULL }, // Inst #18280 = VRCP14PSZ256mk |
| 23821 | { 18279, 7, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad), 0x772668004819ULL }, // Inst #18279 = VRCP14PSZ256mbkz |
| 23822 | { 18278, 8, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad), 0x732668004819ULL }, // Inst #18278 = VRCP14PSZ256mbk |
| 23823 | { 18277, 6, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad), 0x712668004819ULL }, // Inst #18277 = VRCP14PSZ256mb |
| 23824 | { 18276, 6, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad), 0xc12668004819ULL }, // Inst #18276 = VRCP14PSZ256m |
| 23825 | { 18275, 3, 1, 0, 296, 1, 0, X86ImpOpBase + 78, 2340, 0, 0xa62668004829ULL }, // Inst #18275 = VRCP14PSZ128rkz |
| 23826 | { 18274, 4, 1, 0, 296, 1, 0, X86ImpOpBase + 78, 2336, 0, 0xa22668004829ULL }, // Inst #18274 = VRCP14PSZ128rk |
| 23827 | { 18273, 2, 1, 0, 296, 1, 0, X86ImpOpBase + 78, 2334, 0, 0xa02668004829ULL }, // Inst #18273 = VRCP14PSZ128r |
| 23828 | { 18272, 7, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad), 0xa62668004819ULL }, // Inst #18272 = VRCP14PSZ128mkz |
| 23829 | { 18271, 8, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad), 0xa22668004819ULL }, // Inst #18271 = VRCP14PSZ128mk |
| 23830 | { 18270, 7, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad), 0x762668004819ULL }, // Inst #18270 = VRCP14PSZ128mbkz |
| 23831 | { 18269, 8, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad), 0x722668004819ULL }, // Inst #18269 = VRCP14PSZ128mbk |
| 23832 | { 18268, 6, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad), 0x702668004819ULL }, // Inst #18268 = VRCP14PSZ128mb |
| 23833 | { 18267, 6, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad), 0xa02668004819ULL }, // Inst #18267 = VRCP14PSZ128m |
| 23834 | { 18266, 3, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2744, 0, 0xee2670024829ULL }, // Inst #18266 = VRCP14PDZrkz |
| 23835 | { 18265, 4, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2740, 0, 0xea2670024829ULL }, // Inst #18265 = VRCP14PDZrk |
| 23836 | { 18264, 2, 1, 0, 573, 1, 0, X86ImpOpBase + 78, 2738, 0, 0xe82670024829ULL }, // Inst #18264 = VRCP14PDZr |
| 23837 | { 18263, 7, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad), 0xee2670024819ULL }, // Inst #18263 = VRCP14PDZmkz |
| 23838 | { 18262, 8, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad), 0xea2670024819ULL }, // Inst #18262 = VRCP14PDZmk |
| 23839 | { 18261, 7, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad), 0x9e2670024819ULL }, // Inst #18261 = VRCP14PDZmbkz |
| 23840 | { 18260, 8, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad), 0x9a2670024819ULL }, // Inst #18260 = VRCP14PDZmbk |
| 23841 | { 18259, 6, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad), 0x982670024819ULL }, // Inst #18259 = VRCP14PDZmb |
| 23842 | { 18258, 6, 1, 0, 572, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82670024819ULL }, // Inst #18258 = VRCP14PDZm |
| 23843 | { 18257, 3, 1, 0, 571, 1, 0, X86ImpOpBase + 78, 2722, 0, 0xc72670024829ULL }, // Inst #18257 = VRCP14PDZ256rkz |
| 23844 | { 18256, 4, 1, 0, 571, 1, 0, X86ImpOpBase + 78, 2718, 0, 0xc32670024829ULL }, // Inst #18256 = VRCP14PDZ256rk |
| 23845 | { 18255, 2, 1, 0, 571, 1, 0, X86ImpOpBase + 78, 2716, 0, 0xc12670024829ULL }, // Inst #18255 = VRCP14PDZ256r |
| 23846 | { 18254, 7, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad), 0xc72670024819ULL }, // Inst #18254 = VRCP14PDZ256mkz |
| 23847 | { 18253, 8, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad), 0xc32670024819ULL }, // Inst #18253 = VRCP14PDZ256mk |
| 23848 | { 18252, 7, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad), 0x972670024819ULL }, // Inst #18252 = VRCP14PDZ256mbkz |
| 23849 | { 18251, 8, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad), 0x932670024819ULL }, // Inst #18251 = VRCP14PDZ256mbk |
| 23850 | { 18250, 6, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad), 0x912670024819ULL }, // Inst #18250 = VRCP14PDZ256mb |
| 23851 | { 18249, 6, 1, 0, 570, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad), 0xc12670024819ULL }, // Inst #18249 = VRCP14PDZ256m |
| 23852 | { 18248, 3, 1, 0, 296, 1, 0, X86ImpOpBase + 78, 2706, 0, 0xa62670024829ULL }, // Inst #18248 = VRCP14PDZ128rkz |
| 23853 | { 18247, 4, 1, 0, 296, 1, 0, X86ImpOpBase + 78, 2702, 0, 0xa22670024829ULL }, // Inst #18247 = VRCP14PDZ128rk |
| 23854 | { 18246, 2, 1, 0, 296, 1, 0, X86ImpOpBase + 78, 2334, 0, 0xa02670024829ULL }, // Inst #18246 = VRCP14PDZ128r |
| 23855 | { 18245, 7, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad), 0xa62670024819ULL }, // Inst #18245 = VRCP14PDZ128mkz |
| 23856 | { 18244, 8, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad), 0xa22670024819ULL }, // Inst #18244 = VRCP14PDZ128mk |
| 23857 | { 18243, 7, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad), 0x962670024819ULL }, // Inst #18243 = VRCP14PDZ128mbkz |
| 23858 | { 18242, 8, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad), 0x922670024819ULL }, // Inst #18242 = VRCP14PDZ128mbk |
| 23859 | { 18241, 6, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad), 0x902670024819ULL }, // Inst #18241 = VRCP14PDZ128mb |
| 23860 | { 18240, 6, 1, 0, 569, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad), 0xa02670024819ULL }, // Inst #18240 = VRCP14PDZ128m |
| 23861 | { 18239, 5, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x66a8e8046829ULL }, // Inst #18239 = VRANGESSZrrikz |
| 23862 | { 18238, 6, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x62a8e8046829ULL }, // Inst #18238 = VRANGESSZrrik |
| 23863 | { 18237, 5, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x76a8e8046829ULL }, // Inst #18237 = VRANGESSZrribkz |
| 23864 | { 18236, 6, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x72a8e8046829ULL }, // Inst #18236 = VRANGESSZrribk |
| 23865 | { 18235, 4, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 897, 0, 0x70a8e8046829ULL }, // Inst #18235 = VRANGESSZrrib |
| 23866 | { 18234, 4, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8046829ULL }, // Inst #18234 = VRANGESSZrri |
| 23867 | { 18233, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66a8e8046819ULL }, // Inst #18233 = VRANGESSZrmikz |
| 23868 | { 18232, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62a8e8046819ULL }, // Inst #18232 = VRANGESSZrmik |
| 23869 | { 18231, 8, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60a8e8046819ULL }, // Inst #18231 = VRANGESSZrmi |
| 23870 | { 18230, 5, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x86a8f0066829ULL }, // Inst #18230 = VRANGESDZrrikz |
| 23871 | { 18229, 6, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x82a8f0066829ULL }, // Inst #18229 = VRANGESDZrrik |
| 23872 | { 18228, 5, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x96a8f0066829ULL }, // Inst #18228 = VRANGESDZrribkz |
| 23873 | { 18227, 6, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x92a8f0066829ULL }, // Inst #18227 = VRANGESDZrribk |
| 23874 | { 18226, 4, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 897, 0, 0x90a8f0066829ULL }, // Inst #18226 = VRANGESDZrrib |
| 23875 | { 18225, 4, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0066829ULL }, // Inst #18225 = VRANGESDZrri |
| 23876 | { 18224, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86a8f0066819ULL }, // Inst #18224 = VRANGESDZrmikz |
| 23877 | { 18223, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82a8f0066819ULL }, // Inst #18223 = VRANGESDZrmik |
| 23878 | { 18222, 8, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80a8f0066819ULL }, // Inst #18222 = VRANGESDZrmi |
| 23879 | { 18221, 5, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2094, 0|(1ULL<<MCID::MayRaiseFPException), 0xeea868046829ULL }, // Inst #18221 = VRANGEPSZrrikz |
| 23880 | { 18220, 6, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2088, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaa868046829ULL }, // Inst #18220 = VRANGEPSZrrik |
| 23881 | { 18219, 5, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2094, 0, 0x7ea868046829ULL }, // Inst #18219 = VRANGEPSZrribkz |
| 23882 | { 18218, 6, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2088, 0, 0x7aa868046829ULL }, // Inst #18218 = VRANGEPSZrribk |
| 23883 | { 18217, 4, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 909, 0, 0x78a868046829ULL }, // Inst #18217 = VRANGEPSZrrib |
| 23884 | { 18216, 4, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 909, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8a868046829ULL }, // Inst #18216 = VRANGEPSZrri |
| 23885 | { 18215, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2079, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeea868046819ULL }, // Inst #18215 = VRANGEPSZrmikz |
| 23886 | { 18214, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2069, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaa868046819ULL }, // Inst #18214 = VRANGEPSZrmik |
| 23887 | { 18213, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2061, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8a868046819ULL }, // Inst #18213 = VRANGEPSZrmi |
| 23888 | { 18212, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2079, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ea868046819ULL }, // Inst #18212 = VRANGEPSZrmbikz |
| 23889 | { 18211, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2069, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aa868046819ULL }, // Inst #18211 = VRANGEPSZrmbik |
| 23890 | { 18210, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2061, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78a868046819ULL }, // Inst #18210 = VRANGEPSZrmbi |
| 23891 | { 18209, 5, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 2056, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7a868046829ULL }, // Inst #18209 = VRANGEPSZ256rrikz |
| 23892 | { 18208, 6, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 2050, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3a868046829ULL }, // Inst #18208 = VRANGEPSZ256rrik |
| 23893 | { 18207, 4, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 905, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1a868046829ULL }, // Inst #18207 = VRANGEPSZ256rri |
| 23894 | { 18206, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2041, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7a868046819ULL }, // Inst #18206 = VRANGEPSZ256rmikz |
| 23895 | { 18205, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2031, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3a868046819ULL }, // Inst #18205 = VRANGEPSZ256rmik |
| 23896 | { 18204, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2023, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1a868046819ULL }, // Inst #18204 = VRANGEPSZ256rmi |
| 23897 | { 18203, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2041, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77a868046819ULL }, // Inst #18203 = VRANGEPSZ256rmbikz |
| 23898 | { 18202, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2031, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73a868046819ULL }, // Inst #18202 = VRANGEPSZ256rmbik |
| 23899 | { 18201, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2023, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71a868046819ULL }, // Inst #18201 = VRANGEPSZ256rmbi |
| 23900 | { 18200, 5, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 2018, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6a868046829ULL }, // Inst #18200 = VRANGEPSZ128rrikz |
| 23901 | { 18199, 6, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 2012, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2a868046829ULL }, // Inst #18199 = VRANGEPSZ128rrik |
| 23902 | { 18198, 4, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0a868046829ULL }, // Inst #18198 = VRANGEPSZ128rri |
| 23903 | { 18197, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 2003, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6a868046819ULL }, // Inst #18197 = VRANGEPSZ128rmikz |
| 23904 | { 18196, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1993, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2a868046819ULL }, // Inst #18196 = VRANGEPSZ128rmik |
| 23905 | { 18195, 8, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0a868046819ULL }, // Inst #18195 = VRANGEPSZ128rmi |
| 23906 | { 18194, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 2003, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76a868046819ULL }, // Inst #18194 = VRANGEPSZ128rmbikz |
| 23907 | { 18193, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1993, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72a868046819ULL }, // Inst #18193 = VRANGEPSZ128rmbik |
| 23908 | { 18192, 8, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70a868046819ULL }, // Inst #18192 = VRANGEPSZ128rmbi |
| 23909 | { 18191, 5, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2184, 0|(1ULL<<MCID::MayRaiseFPException), 0xeea870066829ULL }, // Inst #18191 = VRANGEPDZrrikz |
| 23910 | { 18190, 6, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2178, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaa870066829ULL }, // Inst #18190 = VRANGEPDZrrik |
| 23911 | { 18189, 5, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2184, 0, 0x9ea870066829ULL }, // Inst #18189 = VRANGEPDZrribkz |
| 23912 | { 18188, 6, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2178, 0, 0x9aa870066829ULL }, // Inst #18188 = VRANGEPDZrribk |
| 23913 | { 18187, 4, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 909, 0, 0x98a870066829ULL }, // Inst #18187 = VRANGEPDZrrib |
| 23914 | { 18186, 4, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 909, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8a870066829ULL }, // Inst #18186 = VRANGEPDZrri |
| 23915 | { 18185, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2169, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeea870066819ULL }, // Inst #18185 = VRANGEPDZrmikz |
| 23916 | { 18184, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaa870066819ULL }, // Inst #18184 = VRANGEPDZrmik |
| 23917 | { 18183, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2061, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8a870066819ULL }, // Inst #18183 = VRANGEPDZrmi |
| 23918 | { 18182, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2169, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ea870066819ULL }, // Inst #18182 = VRANGEPDZrmbikz |
| 23919 | { 18181, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aa870066819ULL }, // Inst #18181 = VRANGEPDZrmbik |
| 23920 | { 18180, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2061, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98a870066819ULL }, // Inst #18180 = VRANGEPDZrmbi |
| 23921 | { 18179, 5, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 2154, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7a870066829ULL }, // Inst #18179 = VRANGEPDZ256rrikz |
| 23922 | { 18178, 6, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 2148, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3a870066829ULL }, // Inst #18178 = VRANGEPDZ256rrik |
| 23923 | { 18177, 4, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 905, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1a870066829ULL }, // Inst #18177 = VRANGEPDZ256rri |
| 23924 | { 18176, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2139, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7a870066819ULL }, // Inst #18176 = VRANGEPDZ256rmikz |
| 23925 | { 18175, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2129, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3a870066819ULL }, // Inst #18175 = VRANGEPDZ256rmik |
| 23926 | { 18174, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2023, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1a870066819ULL }, // Inst #18174 = VRANGEPDZ256rmi |
| 23927 | { 18173, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2139, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97a870066819ULL }, // Inst #18173 = VRANGEPDZ256rmbikz |
| 23928 | { 18172, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2129, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93a870066819ULL }, // Inst #18172 = VRANGEPDZ256rmbik |
| 23929 | { 18171, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2023, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91a870066819ULL }, // Inst #18171 = VRANGEPDZ256rmbi |
| 23930 | { 18170, 5, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 2124, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6a870066829ULL }, // Inst #18170 = VRANGEPDZ128rrikz |
| 23931 | { 18169, 6, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 2118, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2a870066829ULL }, // Inst #18169 = VRANGEPDZ128rrik |
| 23932 | { 18168, 4, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0a870066829ULL }, // Inst #18168 = VRANGEPDZ128rri |
| 23933 | { 18167, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 2109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6a870066819ULL }, // Inst #18167 = VRANGEPDZ128rmikz |
| 23934 | { 18166, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 2099, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2a870066819ULL }, // Inst #18166 = VRANGEPDZ128rmik |
| 23935 | { 18165, 8, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0a870066819ULL }, // Inst #18165 = VRANGEPDZ128rmi |
| 23936 | { 18164, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 2109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96a870066819ULL }, // Inst #18164 = VRANGEPDZ128rmbikz |
| 23937 | { 18163, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 2099, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92a870066819ULL }, // Inst #18163 = VRANGEPDZ128rmbik |
| 23938 | { 18162, 8, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90a870066819ULL }, // Inst #18162 = VRANGEPDZ128rmbi |
| 23939 | { 18161, 3, 1, 0, 1059, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xf7b8002829ULL }, // Inst #18161 = VPXORrr |
| 23940 | { 18160, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf7b8002819ULL }, // Inst #18160 = VPXORrm |
| 23941 | { 18159, 3, 1, 0, 906, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1f7b8002829ULL }, // Inst #18159 = VPXORYrr |
| 23942 | { 18158, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f7b8002819ULL }, // Inst #18158 = VPXORYrm |
| 23943 | { 18157, 4, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xeef7f8022829ULL }, // Inst #18157 = VPXORQZrrkz |
| 23944 | { 18156, 5, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeaf7f8022829ULL }, // Inst #18156 = VPXORQZrrk |
| 23945 | { 18155, 3, 1, 0, 1409, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f7f8022829ULL }, // Inst #18155 = VPXORQZrr |
| 23946 | { 18154, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeef7f8022819ULL }, // Inst #18154 = VPXORQZrmkz |
| 23947 | { 18153, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaf7f8022819ULL }, // Inst #18153 = VPXORQZrmk |
| 23948 | { 18152, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9ef7f8022819ULL }, // Inst #18152 = VPXORQZrmbkz |
| 23949 | { 18151, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9af7f8022819ULL }, // Inst #18151 = VPXORQZrmbk |
| 23950 | { 18150, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98f7f8022819ULL }, // Inst #18150 = VPXORQZrmb |
| 23951 | { 18149, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f7f8022819ULL }, // Inst #18149 = VPXORQZrm |
| 23952 | { 18148, 4, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc7f7f8022829ULL }, // Inst #18148 = VPXORQZ256rrkz |
| 23953 | { 18147, 5, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3f7f8022829ULL }, // Inst #18147 = VPXORQZ256rrk |
| 23954 | { 18146, 3, 1, 0, 1408, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f7f8022829ULL }, // Inst #18146 = VPXORQZ256rr |
| 23955 | { 18145, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7f7f8022819ULL }, // Inst #18145 = VPXORQZ256rmkz |
| 23956 | { 18144, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3f7f8022819ULL }, // Inst #18144 = VPXORQZ256rmk |
| 23957 | { 18143, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97f7f8022819ULL }, // Inst #18143 = VPXORQZ256rmbkz |
| 23958 | { 18142, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93f7f8022819ULL }, // Inst #18142 = VPXORQZ256rmbk |
| 23959 | { 18141, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91f7f8022819ULL }, // Inst #18141 = VPXORQZ256rmb |
| 23960 | { 18140, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f7f8022819ULL }, // Inst #18140 = VPXORQZ256rm |
| 23961 | { 18139, 4, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa6f7f8022829ULL }, // Inst #18139 = VPXORQZ128rrkz |
| 23962 | { 18138, 5, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2f7f8022829ULL }, // Inst #18138 = VPXORQZ128rrk |
| 23963 | { 18137, 3, 1, 0, 1407, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f7f8022829ULL }, // Inst #18137 = VPXORQZ128rr |
| 23964 | { 18136, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6f7f8022819ULL }, // Inst #18136 = VPXORQZ128rmkz |
| 23965 | { 18135, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2f7f8022819ULL }, // Inst #18135 = VPXORQZ128rmk |
| 23966 | { 18134, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96f7f8022819ULL }, // Inst #18134 = VPXORQZ128rmbkz |
| 23967 | { 18133, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92f7f8022819ULL }, // Inst #18133 = VPXORQZ128rmbk |
| 23968 | { 18132, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90f7f8022819ULL }, // Inst #18132 = VPXORQZ128rmb |
| 23969 | { 18131, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f7f8022819ULL }, // Inst #18131 = VPXORQZ128rm |
| 23970 | { 18130, 4, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xeef7f8002829ULL }, // Inst #18130 = VPXORDZrrkz |
| 23971 | { 18129, 5, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeaf7f8002829ULL }, // Inst #18129 = VPXORDZrrk |
| 23972 | { 18128, 3, 1, 0, 1409, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f7f8002829ULL }, // Inst #18128 = VPXORDZrr |
| 23973 | { 18127, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeef7f8002819ULL }, // Inst #18127 = VPXORDZrmkz |
| 23974 | { 18126, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaf7f8002819ULL }, // Inst #18126 = VPXORDZrmk |
| 23975 | { 18125, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7ef7f8002819ULL }, // Inst #18125 = VPXORDZrmbkz |
| 23976 | { 18124, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7af7f8002819ULL }, // Inst #18124 = VPXORDZrmbk |
| 23977 | { 18123, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78f7f8002819ULL }, // Inst #18123 = VPXORDZrmb |
| 23978 | { 18122, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f7f8002819ULL }, // Inst #18122 = VPXORDZrm |
| 23979 | { 18121, 4, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc7f7f8002829ULL }, // Inst #18121 = VPXORDZ256rrkz |
| 23980 | { 18120, 5, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3f7f8002829ULL }, // Inst #18120 = VPXORDZ256rrk |
| 23981 | { 18119, 3, 1, 0, 1408, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f7f8002829ULL }, // Inst #18119 = VPXORDZ256rr |
| 23982 | { 18118, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7f7f8002819ULL }, // Inst #18118 = VPXORDZ256rmkz |
| 23983 | { 18117, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3f7f8002819ULL }, // Inst #18117 = VPXORDZ256rmk |
| 23984 | { 18116, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77f7f8002819ULL }, // Inst #18116 = VPXORDZ256rmbkz |
| 23985 | { 18115, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73f7f8002819ULL }, // Inst #18115 = VPXORDZ256rmbk |
| 23986 | { 18114, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71f7f8002819ULL }, // Inst #18114 = VPXORDZ256rmb |
| 23987 | { 18113, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f7f8002819ULL }, // Inst #18113 = VPXORDZ256rm |
| 23988 | { 18112, 4, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa6f7f8002829ULL }, // Inst #18112 = VPXORDZ128rrkz |
| 23989 | { 18111, 5, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2f7f8002829ULL }, // Inst #18111 = VPXORDZ128rrk |
| 23990 | { 18110, 3, 1, 0, 1407, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f7f8002829ULL }, // Inst #18110 = VPXORDZ128rr |
| 23991 | { 18109, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6f7f8002819ULL }, // Inst #18109 = VPXORDZ128rmkz |
| 23992 | { 18108, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2f7f8002819ULL }, // Inst #18108 = VPXORDZ128rmk |
| 23993 | { 18107, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76f7f8002819ULL }, // Inst #18107 = VPXORDZ128rmbkz |
| 23994 | { 18106, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72f7f8002819ULL }, // Inst #18106 = VPXORDZ128rmbk |
| 23995 | { 18105, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70f7f8002819ULL }, // Inst #18105 = VPXORDZ128rmb |
| 23996 | { 18104, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f7f8002819ULL }, // Inst #18104 = VPXORDZ128rm |
| 23997 | { 18103, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb0b8002829ULL }, // Inst #18103 = VPUNPCKLWDrr |
| 23998 | { 18102, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb0b8002819ULL }, // Inst #18102 = VPUNPCKLWDrm |
| 23999 | { 18101, 4, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xeeb0f8002829ULL }, // Inst #18101 = VPUNPCKLWDZrrkz |
| 24000 | { 18100, 5, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeab0f8002829ULL }, // Inst #18100 = VPUNPCKLWDZrrk |
| 24001 | { 18099, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b0f8002829ULL }, // Inst #18099 = VPUNPCKLWDZrr |
| 24002 | { 18098, 8, 1, 0, 1918, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeeb0f8002819ULL }, // Inst #18098 = VPUNPCKLWDZrmkz |
| 24003 | { 18097, 9, 1, 0, 1918, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeab0f8002819ULL }, // Inst #18097 = VPUNPCKLWDZrmk |
| 24004 | { 18096, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b0f8002819ULL }, // Inst #18096 = VPUNPCKLWDZrm |
| 24005 | { 18095, 4, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc7b0f8002829ULL }, // Inst #18095 = VPUNPCKLWDZ256rrkz |
| 24006 | { 18094, 5, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3b0f8002829ULL }, // Inst #18094 = VPUNPCKLWDZ256rrk |
| 24007 | { 18093, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b0f8002829ULL }, // Inst #18093 = VPUNPCKLWDZ256rr |
| 24008 | { 18092, 8, 1, 0, 1898, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7b0f8002819ULL }, // Inst #18092 = VPUNPCKLWDZ256rmkz |
| 24009 | { 18091, 9, 1, 0, 1898, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3b0f8002819ULL }, // Inst #18091 = VPUNPCKLWDZ256rmk |
| 24010 | { 18090, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b0f8002819ULL }, // Inst #18090 = VPUNPCKLWDZ256rm |
| 24011 | { 18089, 4, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6b0f8002829ULL }, // Inst #18089 = VPUNPCKLWDZ128rrkz |
| 24012 | { 18088, 5, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2b0f8002829ULL }, // Inst #18088 = VPUNPCKLWDZ128rrk |
| 24013 | { 18087, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b0f8002829ULL }, // Inst #18087 = VPUNPCKLWDZ128rr |
| 24014 | { 18086, 8, 1, 0, 1901, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6b0f8002819ULL }, // Inst #18086 = VPUNPCKLWDZ128rmkz |
| 24015 | { 18085, 9, 1, 0, 1901, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2b0f8002819ULL }, // Inst #18085 = VPUNPCKLWDZ128rmk |
| 24016 | { 18084, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b0f8002819ULL }, // Inst #18084 = VPUNPCKLWDZ128rm |
| 24017 | { 18083, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b0b8002829ULL }, // Inst #18083 = VPUNPCKLWDYrr |
| 24018 | { 18082, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b0b8002819ULL }, // Inst #18082 = VPUNPCKLWDYrm |
| 24019 | { 18081, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb638002829ULL }, // Inst #18081 = VPUNPCKLQDQrr |
| 24020 | { 18080, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb638002819ULL }, // Inst #18080 = VPUNPCKLQDQrm |
| 24021 | { 18079, 4, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeeb678022829ULL }, // Inst #18079 = VPUNPCKLQDQZrrkz |
| 24022 | { 18078, 5, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeab678022829ULL }, // Inst #18078 = VPUNPCKLQDQZrrk |
| 24023 | { 18077, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b678022829ULL }, // Inst #18077 = VPUNPCKLQDQZrr |
| 24024 | { 18076, 8, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeb678022819ULL }, // Inst #18076 = VPUNPCKLQDQZrmkz |
| 24025 | { 18075, 9, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeab678022819ULL }, // Inst #18075 = VPUNPCKLQDQZrmk |
| 24026 | { 18074, 8, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eb678022819ULL }, // Inst #18074 = VPUNPCKLQDQZrmbkz |
| 24027 | { 18073, 9, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9ab678022819ULL }, // Inst #18073 = VPUNPCKLQDQZrmbk |
| 24028 | { 18072, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98b678022819ULL }, // Inst #18072 = VPUNPCKLQDQZrmb |
| 24029 | { 18071, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b678022819ULL }, // Inst #18071 = VPUNPCKLQDQZrm |
| 24030 | { 18070, 4, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc7b678022829ULL }, // Inst #18070 = VPUNPCKLQDQZ256rrkz |
| 24031 | { 18069, 5, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3b678022829ULL }, // Inst #18069 = VPUNPCKLQDQZ256rrk |
| 24032 | { 18068, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b678022829ULL }, // Inst #18068 = VPUNPCKLQDQZ256rr |
| 24033 | { 18067, 8, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7b678022819ULL }, // Inst #18067 = VPUNPCKLQDQZ256rmkz |
| 24034 | { 18066, 9, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3b678022819ULL }, // Inst #18066 = VPUNPCKLQDQZ256rmk |
| 24035 | { 18065, 8, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97b678022819ULL }, // Inst #18065 = VPUNPCKLQDQZ256rmbkz |
| 24036 | { 18064, 9, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93b678022819ULL }, // Inst #18064 = VPUNPCKLQDQZ256rmbk |
| 24037 | { 18063, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91b678022819ULL }, // Inst #18063 = VPUNPCKLQDQZ256rmb |
| 24038 | { 18062, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b678022819ULL }, // Inst #18062 = VPUNPCKLQDQZ256rm |
| 24039 | { 18061, 4, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6b678022829ULL }, // Inst #18061 = VPUNPCKLQDQZ128rrkz |
| 24040 | { 18060, 5, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2b678022829ULL }, // Inst #18060 = VPUNPCKLQDQZ128rrk |
| 24041 | { 18059, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b678022829ULL }, // Inst #18059 = VPUNPCKLQDQZ128rr |
| 24042 | { 18058, 8, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6b678022819ULL }, // Inst #18058 = VPUNPCKLQDQZ128rmkz |
| 24043 | { 18057, 9, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2b678022819ULL }, // Inst #18057 = VPUNPCKLQDQZ128rmk |
| 24044 | { 18056, 8, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96b678022819ULL }, // Inst #18056 = VPUNPCKLQDQZ128rmbkz |
| 24045 | { 18055, 9, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92b678022819ULL }, // Inst #18055 = VPUNPCKLQDQZ128rmbk |
| 24046 | { 18054, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90b678022819ULL }, // Inst #18054 = VPUNPCKLQDQZ128rmb |
| 24047 | { 18053, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b678022819ULL }, // Inst #18053 = VPUNPCKLQDQZ128rm |
| 24048 | { 18052, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b638002829ULL }, // Inst #18052 = VPUNPCKLQDQYrr |
| 24049 | { 18051, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b638002819ULL }, // Inst #18051 = VPUNPCKLQDQYrm |
| 24050 | { 18050, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb138002829ULL }, // Inst #18050 = VPUNPCKLDQrr |
| 24051 | { 18049, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb138002819ULL }, // Inst #18049 = VPUNPCKLDQrm |
| 24052 | { 18048, 4, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeeb178002829ULL }, // Inst #18048 = VPUNPCKLDQZrrkz |
| 24053 | { 18047, 5, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeab178002829ULL }, // Inst #18047 = VPUNPCKLDQZrrk |
| 24054 | { 18046, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b178002829ULL }, // Inst #18046 = VPUNPCKLDQZrr |
| 24055 | { 18045, 8, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeb178002819ULL }, // Inst #18045 = VPUNPCKLDQZrmkz |
| 24056 | { 18044, 9, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeab178002819ULL }, // Inst #18044 = VPUNPCKLDQZrmk |
| 24057 | { 18043, 8, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eb178002819ULL }, // Inst #18043 = VPUNPCKLDQZrmbkz |
| 24058 | { 18042, 9, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7ab178002819ULL }, // Inst #18042 = VPUNPCKLDQZrmbk |
| 24059 | { 18041, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78b178002819ULL }, // Inst #18041 = VPUNPCKLDQZrmb |
| 24060 | { 18040, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b178002819ULL }, // Inst #18040 = VPUNPCKLDQZrm |
| 24061 | { 18039, 4, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc7b178002829ULL }, // Inst #18039 = VPUNPCKLDQZ256rrkz |
| 24062 | { 18038, 5, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3b178002829ULL }, // Inst #18038 = VPUNPCKLDQZ256rrk |
| 24063 | { 18037, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b178002829ULL }, // Inst #18037 = VPUNPCKLDQZ256rr |
| 24064 | { 18036, 8, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7b178002819ULL }, // Inst #18036 = VPUNPCKLDQZ256rmkz |
| 24065 | { 18035, 9, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3b178002819ULL }, // Inst #18035 = VPUNPCKLDQZ256rmk |
| 24066 | { 18034, 8, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77b178002819ULL }, // Inst #18034 = VPUNPCKLDQZ256rmbkz |
| 24067 | { 18033, 9, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73b178002819ULL }, // Inst #18033 = VPUNPCKLDQZ256rmbk |
| 24068 | { 18032, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71b178002819ULL }, // Inst #18032 = VPUNPCKLDQZ256rmb |
| 24069 | { 18031, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b178002819ULL }, // Inst #18031 = VPUNPCKLDQZ256rm |
| 24070 | { 18030, 4, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6b178002829ULL }, // Inst #18030 = VPUNPCKLDQZ128rrkz |
| 24071 | { 18029, 5, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2b178002829ULL }, // Inst #18029 = VPUNPCKLDQZ128rrk |
| 24072 | { 18028, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b178002829ULL }, // Inst #18028 = VPUNPCKLDQZ128rr |
| 24073 | { 18027, 8, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6b178002819ULL }, // Inst #18027 = VPUNPCKLDQZ128rmkz |
| 24074 | { 18026, 9, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2b178002819ULL }, // Inst #18026 = VPUNPCKLDQZ128rmk |
| 24075 | { 18025, 8, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76b178002819ULL }, // Inst #18025 = VPUNPCKLDQZ128rmbkz |
| 24076 | { 18024, 9, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72b178002819ULL }, // Inst #18024 = VPUNPCKLDQZ128rmbk |
| 24077 | { 18023, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70b178002819ULL }, // Inst #18023 = VPUNPCKLDQZ128rmb |
| 24078 | { 18022, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b178002819ULL }, // Inst #18022 = VPUNPCKLDQZ128rm |
| 24079 | { 18021, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b138002829ULL }, // Inst #18021 = VPUNPCKLDQYrr |
| 24080 | { 18020, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b138002819ULL }, // Inst #18020 = VPUNPCKLDQYrm |
| 24081 | { 18019, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb038002829ULL }, // Inst #18019 = VPUNPCKLBWrr |
| 24082 | { 18018, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb038002819ULL }, // Inst #18018 = VPUNPCKLBWrm |
| 24083 | { 18017, 4, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeeb078002829ULL }, // Inst #18017 = VPUNPCKLBWZrrkz |
| 24084 | { 18016, 5, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeab078002829ULL }, // Inst #18016 = VPUNPCKLBWZrrk |
| 24085 | { 18015, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b078002829ULL }, // Inst #18015 = VPUNPCKLBWZrr |
| 24086 | { 18014, 8, 1, 0, 1918, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeeb078002819ULL }, // Inst #18014 = VPUNPCKLBWZrmkz |
| 24087 | { 18013, 9, 1, 0, 1918, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeab078002819ULL }, // Inst #18013 = VPUNPCKLBWZrmk |
| 24088 | { 18012, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b078002819ULL }, // Inst #18012 = VPUNPCKLBWZrm |
| 24089 | { 18011, 4, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc7b078002829ULL }, // Inst #18011 = VPUNPCKLBWZ256rrkz |
| 24090 | { 18010, 5, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3b078002829ULL }, // Inst #18010 = VPUNPCKLBWZ256rrk |
| 24091 | { 18009, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b078002829ULL }, // Inst #18009 = VPUNPCKLBWZ256rr |
| 24092 | { 18008, 8, 1, 0, 1898, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7b078002819ULL }, // Inst #18008 = VPUNPCKLBWZ256rmkz |
| 24093 | { 18007, 9, 1, 0, 1898, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3b078002819ULL }, // Inst #18007 = VPUNPCKLBWZ256rmk |
| 24094 | { 18006, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b078002819ULL }, // Inst #18006 = VPUNPCKLBWZ256rm |
| 24095 | { 18005, 4, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa6b078002829ULL }, // Inst #18005 = VPUNPCKLBWZ128rrkz |
| 24096 | { 18004, 5, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2b078002829ULL }, // Inst #18004 = VPUNPCKLBWZ128rrk |
| 24097 | { 18003, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b078002829ULL }, // Inst #18003 = VPUNPCKLBWZ128rr |
| 24098 | { 18002, 8, 1, 0, 1901, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6b078002819ULL }, // Inst #18002 = VPUNPCKLBWZ128rmkz |
| 24099 | { 18001, 9, 1, 0, 1901, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2b078002819ULL }, // Inst #18001 = VPUNPCKLBWZ128rmk |
| 24100 | { 18000, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b078002819ULL }, // Inst #18000 = VPUNPCKLBWZ128rm |
| 24101 | { 17999, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b038002829ULL }, // Inst #17999 = VPUNPCKLBWYrr |
| 24102 | { 17998, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b038002819ULL }, // Inst #17998 = VPUNPCKLBWYrm |
| 24103 | { 17997, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb4b8002829ULL }, // Inst #17997 = VPUNPCKHWDrr |
| 24104 | { 17996, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb4b8002819ULL }, // Inst #17996 = VPUNPCKHWDrm |
| 24105 | { 17995, 4, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xeeb4f8002829ULL }, // Inst #17995 = VPUNPCKHWDZrrkz |
| 24106 | { 17994, 5, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeab4f8002829ULL }, // Inst #17994 = VPUNPCKHWDZrrk |
| 24107 | { 17993, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b4f8002829ULL }, // Inst #17993 = VPUNPCKHWDZrr |
| 24108 | { 17992, 8, 1, 0, 1918, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeeb4f8002819ULL }, // Inst #17992 = VPUNPCKHWDZrmkz |
| 24109 | { 17991, 9, 1, 0, 1918, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeab4f8002819ULL }, // Inst #17991 = VPUNPCKHWDZrmk |
| 24110 | { 17990, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b4f8002819ULL }, // Inst #17990 = VPUNPCKHWDZrm |
| 24111 | { 17989, 4, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc7b4f8002829ULL }, // Inst #17989 = VPUNPCKHWDZ256rrkz |
| 24112 | { 17988, 5, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3b4f8002829ULL }, // Inst #17988 = VPUNPCKHWDZ256rrk |
| 24113 | { 17987, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b4f8002829ULL }, // Inst #17987 = VPUNPCKHWDZ256rr |
| 24114 | { 17986, 8, 1, 0, 1898, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7b4f8002819ULL }, // Inst #17986 = VPUNPCKHWDZ256rmkz |
| 24115 | { 17985, 9, 1, 0, 1898, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3b4f8002819ULL }, // Inst #17985 = VPUNPCKHWDZ256rmk |
| 24116 | { 17984, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b4f8002819ULL }, // Inst #17984 = VPUNPCKHWDZ256rm |
| 24117 | { 17983, 4, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6b4f8002829ULL }, // Inst #17983 = VPUNPCKHWDZ128rrkz |
| 24118 | { 17982, 5, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2b4f8002829ULL }, // Inst #17982 = VPUNPCKHWDZ128rrk |
| 24119 | { 17981, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b4f8002829ULL }, // Inst #17981 = VPUNPCKHWDZ128rr |
| 24120 | { 17980, 8, 1, 0, 1901, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6b4f8002819ULL }, // Inst #17980 = VPUNPCKHWDZ128rmkz |
| 24121 | { 17979, 9, 1, 0, 1901, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2b4f8002819ULL }, // Inst #17979 = VPUNPCKHWDZ128rmk |
| 24122 | { 17978, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b4f8002819ULL }, // Inst #17978 = VPUNPCKHWDZ128rm |
| 24123 | { 17977, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b4b8002829ULL }, // Inst #17977 = VPUNPCKHWDYrr |
| 24124 | { 17976, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b4b8002819ULL }, // Inst #17976 = VPUNPCKHWDYrm |
| 24125 | { 17975, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb6b8002829ULL }, // Inst #17975 = VPUNPCKHQDQrr |
| 24126 | { 17974, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb6b8002819ULL }, // Inst #17974 = VPUNPCKHQDQrm |
| 24127 | { 17973, 4, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeeb6f8022829ULL }, // Inst #17973 = VPUNPCKHQDQZrrkz |
| 24128 | { 17972, 5, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeab6f8022829ULL }, // Inst #17972 = VPUNPCKHQDQZrrk |
| 24129 | { 17971, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b6f8022829ULL }, // Inst #17971 = VPUNPCKHQDQZrr |
| 24130 | { 17970, 8, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeb6f8022819ULL }, // Inst #17970 = VPUNPCKHQDQZrmkz |
| 24131 | { 17969, 9, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeab6f8022819ULL }, // Inst #17969 = VPUNPCKHQDQZrmk |
| 24132 | { 17968, 8, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eb6f8022819ULL }, // Inst #17968 = VPUNPCKHQDQZrmbkz |
| 24133 | { 17967, 9, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9ab6f8022819ULL }, // Inst #17967 = VPUNPCKHQDQZrmbk |
| 24134 | { 17966, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98b6f8022819ULL }, // Inst #17966 = VPUNPCKHQDQZrmb |
| 24135 | { 17965, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b6f8022819ULL }, // Inst #17965 = VPUNPCKHQDQZrm |
| 24136 | { 17964, 4, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc7b6f8022829ULL }, // Inst #17964 = VPUNPCKHQDQZ256rrkz |
| 24137 | { 17963, 5, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3b6f8022829ULL }, // Inst #17963 = VPUNPCKHQDQZ256rrk |
| 24138 | { 17962, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b6f8022829ULL }, // Inst #17962 = VPUNPCKHQDQZ256rr |
| 24139 | { 17961, 8, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7b6f8022819ULL }, // Inst #17961 = VPUNPCKHQDQZ256rmkz |
| 24140 | { 17960, 9, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3b6f8022819ULL }, // Inst #17960 = VPUNPCKHQDQZ256rmk |
| 24141 | { 17959, 8, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97b6f8022819ULL }, // Inst #17959 = VPUNPCKHQDQZ256rmbkz |
| 24142 | { 17958, 9, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93b6f8022819ULL }, // Inst #17958 = VPUNPCKHQDQZ256rmbk |
| 24143 | { 17957, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91b6f8022819ULL }, // Inst #17957 = VPUNPCKHQDQZ256rmb |
| 24144 | { 17956, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b6f8022819ULL }, // Inst #17956 = VPUNPCKHQDQZ256rm |
| 24145 | { 17955, 4, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6b6f8022829ULL }, // Inst #17955 = VPUNPCKHQDQZ128rrkz |
| 24146 | { 17954, 5, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2b6f8022829ULL }, // Inst #17954 = VPUNPCKHQDQZ128rrk |
| 24147 | { 17953, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b6f8022829ULL }, // Inst #17953 = VPUNPCKHQDQZ128rr |
| 24148 | { 17952, 8, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6b6f8022819ULL }, // Inst #17952 = VPUNPCKHQDQZ128rmkz |
| 24149 | { 17951, 9, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2b6f8022819ULL }, // Inst #17951 = VPUNPCKHQDQZ128rmk |
| 24150 | { 17950, 8, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96b6f8022819ULL }, // Inst #17950 = VPUNPCKHQDQZ128rmbkz |
| 24151 | { 17949, 9, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92b6f8022819ULL }, // Inst #17949 = VPUNPCKHQDQZ128rmbk |
| 24152 | { 17948, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90b6f8022819ULL }, // Inst #17948 = VPUNPCKHQDQZ128rmb |
| 24153 | { 17947, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b6f8022819ULL }, // Inst #17947 = VPUNPCKHQDQZ128rm |
| 24154 | { 17946, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b6b8002829ULL }, // Inst #17946 = VPUNPCKHQDQYrr |
| 24155 | { 17945, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b6b8002819ULL }, // Inst #17945 = VPUNPCKHQDQYrm |
| 24156 | { 17944, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb538002829ULL }, // Inst #17944 = VPUNPCKHDQrr |
| 24157 | { 17943, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb538002819ULL }, // Inst #17943 = VPUNPCKHDQrm |
| 24158 | { 17942, 4, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeeb578002829ULL }, // Inst #17942 = VPUNPCKHDQZrrkz |
| 24159 | { 17941, 5, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeab578002829ULL }, // Inst #17941 = VPUNPCKHDQZrrk |
| 24160 | { 17940, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b578002829ULL }, // Inst #17940 = VPUNPCKHDQZrr |
| 24161 | { 17939, 8, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeb578002819ULL }, // Inst #17939 = VPUNPCKHDQZrmkz |
| 24162 | { 17938, 9, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeab578002819ULL }, // Inst #17938 = VPUNPCKHDQZrmk |
| 24163 | { 17937, 8, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eb578002819ULL }, // Inst #17937 = VPUNPCKHDQZrmbkz |
| 24164 | { 17936, 9, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7ab578002819ULL }, // Inst #17936 = VPUNPCKHDQZrmbk |
| 24165 | { 17935, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78b578002819ULL }, // Inst #17935 = VPUNPCKHDQZrmb |
| 24166 | { 17934, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b578002819ULL }, // Inst #17934 = VPUNPCKHDQZrm |
| 24167 | { 17933, 4, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc7b578002829ULL }, // Inst #17933 = VPUNPCKHDQZ256rrkz |
| 24168 | { 17932, 5, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3b578002829ULL }, // Inst #17932 = VPUNPCKHDQZ256rrk |
| 24169 | { 17931, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b578002829ULL }, // Inst #17931 = VPUNPCKHDQZ256rr |
| 24170 | { 17930, 8, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7b578002819ULL }, // Inst #17930 = VPUNPCKHDQZ256rmkz |
| 24171 | { 17929, 9, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3b578002819ULL }, // Inst #17929 = VPUNPCKHDQZ256rmk |
| 24172 | { 17928, 8, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77b578002819ULL }, // Inst #17928 = VPUNPCKHDQZ256rmbkz |
| 24173 | { 17927, 9, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73b578002819ULL }, // Inst #17927 = VPUNPCKHDQZ256rmbk |
| 24174 | { 17926, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71b578002819ULL }, // Inst #17926 = VPUNPCKHDQZ256rmb |
| 24175 | { 17925, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b578002819ULL }, // Inst #17925 = VPUNPCKHDQZ256rm |
| 24176 | { 17924, 4, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6b578002829ULL }, // Inst #17924 = VPUNPCKHDQZ128rrkz |
| 24177 | { 17923, 5, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2b578002829ULL }, // Inst #17923 = VPUNPCKHDQZ128rrk |
| 24178 | { 17922, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b578002829ULL }, // Inst #17922 = VPUNPCKHDQZ128rr |
| 24179 | { 17921, 8, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6b578002819ULL }, // Inst #17921 = VPUNPCKHDQZ128rmkz |
| 24180 | { 17920, 9, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2b578002819ULL }, // Inst #17920 = VPUNPCKHDQZ128rmk |
| 24181 | { 17919, 8, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76b578002819ULL }, // Inst #17919 = VPUNPCKHDQZ128rmbkz |
| 24182 | { 17918, 9, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72b578002819ULL }, // Inst #17918 = VPUNPCKHDQZ128rmbk |
| 24183 | { 17917, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70b578002819ULL }, // Inst #17917 = VPUNPCKHDQZ128rmb |
| 24184 | { 17916, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b578002819ULL }, // Inst #17916 = VPUNPCKHDQZ128rm |
| 24185 | { 17915, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b538002829ULL }, // Inst #17915 = VPUNPCKHDQYrr |
| 24186 | { 17914, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b538002819ULL }, // Inst #17914 = VPUNPCKHDQYrm |
| 24187 | { 17913, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb438002829ULL }, // Inst #17913 = VPUNPCKHBWrr |
| 24188 | { 17912, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb438002819ULL }, // Inst #17912 = VPUNPCKHBWrm |
| 24189 | { 17911, 4, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeeb478002829ULL }, // Inst #17911 = VPUNPCKHBWZrrkz |
| 24190 | { 17910, 5, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeab478002829ULL }, // Inst #17910 = VPUNPCKHBWZrrk |
| 24191 | { 17909, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b478002829ULL }, // Inst #17909 = VPUNPCKHBWZrr |
| 24192 | { 17908, 8, 1, 0, 1918, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeeb478002819ULL }, // Inst #17908 = VPUNPCKHBWZrmkz |
| 24193 | { 17907, 9, 1, 0, 1918, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeab478002819ULL }, // Inst #17907 = VPUNPCKHBWZrmk |
| 24194 | { 17906, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b478002819ULL }, // Inst #17906 = VPUNPCKHBWZrm |
| 24195 | { 17905, 4, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc7b478002829ULL }, // Inst #17905 = VPUNPCKHBWZ256rrkz |
| 24196 | { 17904, 5, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3b478002829ULL }, // Inst #17904 = VPUNPCKHBWZ256rrk |
| 24197 | { 17903, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b478002829ULL }, // Inst #17903 = VPUNPCKHBWZ256rr |
| 24198 | { 17902, 8, 1, 0, 1898, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7b478002819ULL }, // Inst #17902 = VPUNPCKHBWZ256rmkz |
| 24199 | { 17901, 9, 1, 0, 1898, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3b478002819ULL }, // Inst #17901 = VPUNPCKHBWZ256rmk |
| 24200 | { 17900, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b478002819ULL }, // Inst #17900 = VPUNPCKHBWZ256rm |
| 24201 | { 17899, 4, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa6b478002829ULL }, // Inst #17899 = VPUNPCKHBWZ128rrkz |
| 24202 | { 17898, 5, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2b478002829ULL }, // Inst #17898 = VPUNPCKHBWZ128rrk |
| 24203 | { 17897, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b478002829ULL }, // Inst #17897 = VPUNPCKHBWZ128rr |
| 24204 | { 17896, 8, 1, 0, 1901, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6b478002819ULL }, // Inst #17896 = VPUNPCKHBWZ128rmkz |
| 24205 | { 17895, 9, 1, 0, 1901, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2b478002819ULL }, // Inst #17895 = VPUNPCKHBWZ128rmk |
| 24206 | { 17894, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b478002819ULL }, // Inst #17894 = VPUNPCKHBWZ128rm |
| 24207 | { 17893, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b438002829ULL }, // Inst #17893 = VPUNPCKHBWYrr |
| 24208 | { 17892, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b438002819ULL }, // Inst #17892 = VPUNPCKHBWYrm |
| 24209 | { 17891, 2, 0, 0, 288, 0, 1, X86ImpOpBase + 0, 535, 0, 0xbb8004829ULL }, // Inst #17891 = VPTESTrr |
| 24210 | { 17890, 6, 0, 0, 287, 0, 1, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0xbb8004819ULL }, // Inst #17890 = VPTESTrm |
| 24211 | { 17889, 2, 0, 0, 568, 0, 1, X86ImpOpBase + 0, 2866, 0, 0x10bb8004829ULL }, // Inst #17889 = VPTESTYrr |
| 24212 | { 17888, 6, 0, 0, 567, 0, 1, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x10bb8004819ULL }, // Inst #17888 = VPTESTYrm |
| 24213 | { 17887, 4, 1, 0, 1133, 0, 0, X86ImpOpBase + 0, 5384, 0|(1ULL<<MCID::Commutable), 0xea9378025029ULL }, // Inst #17887 = VPTESTNMWZrrk |
| 24214 | { 17886, 3, 1, 0, 1249, 0, 0, X86ImpOpBase + 0, 5381, 0|(1ULL<<MCID::Commutable), 0xe89378025029ULL }, // Inst #17886 = VPTESTNMWZrr |
| 24215 | { 17885, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5373, 0|(1ULL<<MCID::MayLoad), 0xea9378025019ULL }, // Inst #17885 = VPTESTNMWZrmk |
| 24216 | { 17884, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5366, 0|(1ULL<<MCID::MayLoad), 0xe89378025019ULL }, // Inst #17884 = VPTESTNMWZrm |
| 24217 | { 17883, 4, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5362, 0|(1ULL<<MCID::Commutable), 0xc39378025029ULL }, // Inst #17883 = VPTESTNMWZ256rrk |
| 24218 | { 17882, 3, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5359, 0|(1ULL<<MCID::Commutable), 0xc19378025029ULL }, // Inst #17882 = VPTESTNMWZ256rr |
| 24219 | { 17881, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5351, 0|(1ULL<<MCID::MayLoad), 0xc39378025019ULL }, // Inst #17881 = VPTESTNMWZ256rmk |
| 24220 | { 17880, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5344, 0|(1ULL<<MCID::MayLoad), 0xc19378025019ULL }, // Inst #17880 = VPTESTNMWZ256rm |
| 24221 | { 17879, 4, 1, 0, 1131, 0, 0, X86ImpOpBase + 0, 5340, 0|(1ULL<<MCID::Commutable), 0xa29378025029ULL }, // Inst #17879 = VPTESTNMWZ128rrk |
| 24222 | { 17878, 3, 1, 0, 1248, 0, 0, X86ImpOpBase + 0, 5337, 0|(1ULL<<MCID::Commutable), 0xa09378025029ULL }, // Inst #17878 = VPTESTNMWZ128rr |
| 24223 | { 17877, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5329, 0|(1ULL<<MCID::MayLoad), 0xa29378025019ULL }, // Inst #17877 = VPTESTNMWZ128rmk |
| 24224 | { 17876, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5322, 0|(1ULL<<MCID::MayLoad), 0xa09378025019ULL }, // Inst #17876 = VPTESTNMWZ128rm |
| 24225 | { 17875, 4, 1, 0, 1133, 0, 0, X86ImpOpBase + 0, 5318, 0|(1ULL<<MCID::Commutable), 0xea93f8025029ULL }, // Inst #17875 = VPTESTNMQZrrk |
| 24226 | { 17874, 3, 1, 0, 1249, 0, 0, X86ImpOpBase + 0, 5315, 0|(1ULL<<MCID::Commutable), 0xe893f8025029ULL }, // Inst #17874 = VPTESTNMQZrr |
| 24227 | { 17873, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5307, 0|(1ULL<<MCID::MayLoad), 0xea93f8025019ULL }, // Inst #17873 = VPTESTNMQZrmk |
| 24228 | { 17872, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5307, 0|(1ULL<<MCID::MayLoad), 0x9a93f8025019ULL }, // Inst #17872 = VPTESTNMQZrmbk |
| 24229 | { 17871, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5300, 0|(1ULL<<MCID::MayLoad), 0x9893f8025019ULL }, // Inst #17871 = VPTESTNMQZrmb |
| 24230 | { 17870, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5300, 0|(1ULL<<MCID::MayLoad), 0xe893f8025019ULL }, // Inst #17870 = VPTESTNMQZrm |
| 24231 | { 17869, 4, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5296, 0|(1ULL<<MCID::Commutable), 0xc393f8025029ULL }, // Inst #17869 = VPTESTNMQZ256rrk |
| 24232 | { 17868, 3, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5293, 0|(1ULL<<MCID::Commutable), 0xc193f8025029ULL }, // Inst #17868 = VPTESTNMQZ256rr |
| 24233 | { 17867, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5285, 0|(1ULL<<MCID::MayLoad), 0xc393f8025019ULL }, // Inst #17867 = VPTESTNMQZ256rmk |
| 24234 | { 17866, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5285, 0|(1ULL<<MCID::MayLoad), 0x9393f8025019ULL }, // Inst #17866 = VPTESTNMQZ256rmbk |
| 24235 | { 17865, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5278, 0|(1ULL<<MCID::MayLoad), 0x9193f8025019ULL }, // Inst #17865 = VPTESTNMQZ256rmb |
| 24236 | { 17864, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5278, 0|(1ULL<<MCID::MayLoad), 0xc193f8025019ULL }, // Inst #17864 = VPTESTNMQZ256rm |
| 24237 | { 17863, 4, 1, 0, 1131, 0, 0, X86ImpOpBase + 0, 5274, 0|(1ULL<<MCID::Commutable), 0xa293f8025029ULL }, // Inst #17863 = VPTESTNMQZ128rrk |
| 24238 | { 17862, 3, 1, 0, 1248, 0, 0, X86ImpOpBase + 0, 5271, 0|(1ULL<<MCID::Commutable), 0xa093f8025029ULL }, // Inst #17862 = VPTESTNMQZ128rr |
| 24239 | { 17861, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5263, 0|(1ULL<<MCID::MayLoad), 0xa293f8025019ULL }, // Inst #17861 = VPTESTNMQZ128rmk |
| 24240 | { 17860, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5263, 0|(1ULL<<MCID::MayLoad), 0x9293f8025019ULL }, // Inst #17860 = VPTESTNMQZ128rmbk |
| 24241 | { 17859, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5256, 0|(1ULL<<MCID::MayLoad), 0x9093f8025019ULL }, // Inst #17859 = VPTESTNMQZ128rmb |
| 24242 | { 17858, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5256, 0|(1ULL<<MCID::MayLoad), 0xa093f8025019ULL }, // Inst #17858 = VPTESTNMQZ128rm |
| 24243 | { 17857, 4, 1, 0, 1133, 0, 0, X86ImpOpBase + 0, 5252, 0|(1ULL<<MCID::Commutable), 0xea93f8005029ULL }, // Inst #17857 = VPTESTNMDZrrk |
| 24244 | { 17856, 3, 1, 0, 1249, 0, 0, X86ImpOpBase + 0, 5249, 0|(1ULL<<MCID::Commutable), 0xe893f8005029ULL }, // Inst #17856 = VPTESTNMDZrr |
| 24245 | { 17855, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5241, 0|(1ULL<<MCID::MayLoad), 0xea93f8005019ULL }, // Inst #17855 = VPTESTNMDZrmk |
| 24246 | { 17854, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5241, 0|(1ULL<<MCID::MayLoad), 0x7a93f8005019ULL }, // Inst #17854 = VPTESTNMDZrmbk |
| 24247 | { 17853, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5234, 0|(1ULL<<MCID::MayLoad), 0x7893f8005019ULL }, // Inst #17853 = VPTESTNMDZrmb |
| 24248 | { 17852, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5234, 0|(1ULL<<MCID::MayLoad), 0xe893f8005019ULL }, // Inst #17852 = VPTESTNMDZrm |
| 24249 | { 17851, 4, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5230, 0|(1ULL<<MCID::Commutable), 0xc393f8005029ULL }, // Inst #17851 = VPTESTNMDZ256rrk |
| 24250 | { 17850, 3, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5227, 0|(1ULL<<MCID::Commutable), 0xc193f8005029ULL }, // Inst #17850 = VPTESTNMDZ256rr |
| 24251 | { 17849, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5219, 0|(1ULL<<MCID::MayLoad), 0xc393f8005019ULL }, // Inst #17849 = VPTESTNMDZ256rmk |
| 24252 | { 17848, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5219, 0|(1ULL<<MCID::MayLoad), 0x7393f8005019ULL }, // Inst #17848 = VPTESTNMDZ256rmbk |
| 24253 | { 17847, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5212, 0|(1ULL<<MCID::MayLoad), 0x7193f8005019ULL }, // Inst #17847 = VPTESTNMDZ256rmb |
| 24254 | { 17846, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5212, 0|(1ULL<<MCID::MayLoad), 0xc193f8005019ULL }, // Inst #17846 = VPTESTNMDZ256rm |
| 24255 | { 17845, 4, 1, 0, 1131, 0, 0, X86ImpOpBase + 0, 5208, 0|(1ULL<<MCID::Commutable), 0xa293f8005029ULL }, // Inst #17845 = VPTESTNMDZ128rrk |
| 24256 | { 17844, 3, 1, 0, 1248, 0, 0, X86ImpOpBase + 0, 5205, 0|(1ULL<<MCID::Commutable), 0xa093f8005029ULL }, // Inst #17844 = VPTESTNMDZ128rr |
| 24257 | { 17843, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5197, 0|(1ULL<<MCID::MayLoad), 0xa293f8005019ULL }, // Inst #17843 = VPTESTNMDZ128rmk |
| 24258 | { 17842, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5197, 0|(1ULL<<MCID::MayLoad), 0x7293f8005019ULL }, // Inst #17842 = VPTESTNMDZ128rmbk |
| 24259 | { 17841, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5190, 0|(1ULL<<MCID::MayLoad), 0x7093f8005019ULL }, // Inst #17841 = VPTESTNMDZ128rmb |
| 24260 | { 17840, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5190, 0|(1ULL<<MCID::MayLoad), 0xa093f8005019ULL }, // Inst #17840 = VPTESTNMDZ128rm |
| 24261 | { 17839, 4, 1, 0, 1133, 0, 0, X86ImpOpBase + 0, 5186, 0|(1ULL<<MCID::Commutable), 0xea9378005029ULL }, // Inst #17839 = VPTESTNMBZrrk |
| 24262 | { 17838, 3, 1, 0, 1249, 0, 0, X86ImpOpBase + 0, 5183, 0|(1ULL<<MCID::Commutable), 0xe89378005029ULL }, // Inst #17838 = VPTESTNMBZrr |
| 24263 | { 17837, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5175, 0|(1ULL<<MCID::MayLoad), 0xea9378005019ULL }, // Inst #17837 = VPTESTNMBZrmk |
| 24264 | { 17836, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5168, 0|(1ULL<<MCID::MayLoad), 0xe89378005019ULL }, // Inst #17836 = VPTESTNMBZrm |
| 24265 | { 17835, 4, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5164, 0|(1ULL<<MCID::Commutable), 0xc39378005029ULL }, // Inst #17835 = VPTESTNMBZ256rrk |
| 24266 | { 17834, 3, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5161, 0|(1ULL<<MCID::Commutable), 0xc19378005029ULL }, // Inst #17834 = VPTESTNMBZ256rr |
| 24267 | { 17833, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5153, 0|(1ULL<<MCID::MayLoad), 0xc39378005019ULL }, // Inst #17833 = VPTESTNMBZ256rmk |
| 24268 | { 17832, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5146, 0|(1ULL<<MCID::MayLoad), 0xc19378005019ULL }, // Inst #17832 = VPTESTNMBZ256rm |
| 24269 | { 17831, 4, 1, 0, 1131, 0, 0, X86ImpOpBase + 0, 5142, 0|(1ULL<<MCID::Commutable), 0xa29378005029ULL }, // Inst #17831 = VPTESTNMBZ128rrk |
| 24270 | { 17830, 3, 1, 0, 1248, 0, 0, X86ImpOpBase + 0, 5139, 0|(1ULL<<MCID::Commutable), 0xa09378005029ULL }, // Inst #17830 = VPTESTNMBZ128rr |
| 24271 | { 17829, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5131, 0|(1ULL<<MCID::MayLoad), 0xa29378005019ULL }, // Inst #17829 = VPTESTNMBZ128rmk |
| 24272 | { 17828, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5124, 0|(1ULL<<MCID::MayLoad), 0xa09378005019ULL }, // Inst #17828 = VPTESTNMBZ128rm |
| 24273 | { 17827, 4, 1, 0, 1133, 0, 0, X86ImpOpBase + 0, 5384, 0|(1ULL<<MCID::Commutable), 0xea9378024829ULL }, // Inst #17827 = VPTESTMWZrrk |
| 24274 | { 17826, 3, 1, 0, 1249, 0, 0, X86ImpOpBase + 0, 5381, 0|(1ULL<<MCID::Commutable), 0xe89378024829ULL }, // Inst #17826 = VPTESTMWZrr |
| 24275 | { 17825, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5373, 0|(1ULL<<MCID::MayLoad), 0xea9378024819ULL }, // Inst #17825 = VPTESTMWZrmk |
| 24276 | { 17824, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5366, 0|(1ULL<<MCID::MayLoad), 0xe89378024819ULL }, // Inst #17824 = VPTESTMWZrm |
| 24277 | { 17823, 4, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5362, 0|(1ULL<<MCID::Commutable), 0xc39378024829ULL }, // Inst #17823 = VPTESTMWZ256rrk |
| 24278 | { 17822, 3, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5359, 0|(1ULL<<MCID::Commutable), 0xc19378024829ULL }, // Inst #17822 = VPTESTMWZ256rr |
| 24279 | { 17821, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5351, 0|(1ULL<<MCID::MayLoad), 0xc39378024819ULL }, // Inst #17821 = VPTESTMWZ256rmk |
| 24280 | { 17820, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5344, 0|(1ULL<<MCID::MayLoad), 0xc19378024819ULL }, // Inst #17820 = VPTESTMWZ256rm |
| 24281 | { 17819, 4, 1, 0, 1131, 0, 0, X86ImpOpBase + 0, 5340, 0|(1ULL<<MCID::Commutable), 0xa29378024829ULL }, // Inst #17819 = VPTESTMWZ128rrk |
| 24282 | { 17818, 3, 1, 0, 1248, 0, 0, X86ImpOpBase + 0, 5337, 0|(1ULL<<MCID::Commutable), 0xa09378024829ULL }, // Inst #17818 = VPTESTMWZ128rr |
| 24283 | { 17817, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5329, 0|(1ULL<<MCID::MayLoad), 0xa29378024819ULL }, // Inst #17817 = VPTESTMWZ128rmk |
| 24284 | { 17816, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5322, 0|(1ULL<<MCID::MayLoad), 0xa09378024819ULL }, // Inst #17816 = VPTESTMWZ128rm |
| 24285 | { 17815, 4, 1, 0, 1133, 0, 0, X86ImpOpBase + 0, 5318, 0|(1ULL<<MCID::Commutable), 0xea93f8024829ULL }, // Inst #17815 = VPTESTMQZrrk |
| 24286 | { 17814, 3, 1, 0, 1249, 0, 0, X86ImpOpBase + 0, 5315, 0|(1ULL<<MCID::Commutable), 0xe893f8024829ULL }, // Inst #17814 = VPTESTMQZrr |
| 24287 | { 17813, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5307, 0|(1ULL<<MCID::MayLoad), 0xea93f8024819ULL }, // Inst #17813 = VPTESTMQZrmk |
| 24288 | { 17812, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5307, 0|(1ULL<<MCID::MayLoad), 0x9a93f8024819ULL }, // Inst #17812 = VPTESTMQZrmbk |
| 24289 | { 17811, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5300, 0|(1ULL<<MCID::MayLoad), 0x9893f8024819ULL }, // Inst #17811 = VPTESTMQZrmb |
| 24290 | { 17810, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5300, 0|(1ULL<<MCID::MayLoad), 0xe893f8024819ULL }, // Inst #17810 = VPTESTMQZrm |
| 24291 | { 17809, 4, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5296, 0|(1ULL<<MCID::Commutable), 0xc393f8024829ULL }, // Inst #17809 = VPTESTMQZ256rrk |
| 24292 | { 17808, 3, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5293, 0|(1ULL<<MCID::Commutable), 0xc193f8024829ULL }, // Inst #17808 = VPTESTMQZ256rr |
| 24293 | { 17807, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5285, 0|(1ULL<<MCID::MayLoad), 0xc393f8024819ULL }, // Inst #17807 = VPTESTMQZ256rmk |
| 24294 | { 17806, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5285, 0|(1ULL<<MCID::MayLoad), 0x9393f8024819ULL }, // Inst #17806 = VPTESTMQZ256rmbk |
| 24295 | { 17805, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5278, 0|(1ULL<<MCID::MayLoad), 0x9193f8024819ULL }, // Inst #17805 = VPTESTMQZ256rmb |
| 24296 | { 17804, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5278, 0|(1ULL<<MCID::MayLoad), 0xc193f8024819ULL }, // Inst #17804 = VPTESTMQZ256rm |
| 24297 | { 17803, 4, 1, 0, 1131, 0, 0, X86ImpOpBase + 0, 5274, 0|(1ULL<<MCID::Commutable), 0xa293f8024829ULL }, // Inst #17803 = VPTESTMQZ128rrk |
| 24298 | { 17802, 3, 1, 0, 1248, 0, 0, X86ImpOpBase + 0, 5271, 0|(1ULL<<MCID::Commutable), 0xa093f8024829ULL }, // Inst #17802 = VPTESTMQZ128rr |
| 24299 | { 17801, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5263, 0|(1ULL<<MCID::MayLoad), 0xa293f8024819ULL }, // Inst #17801 = VPTESTMQZ128rmk |
| 24300 | { 17800, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5263, 0|(1ULL<<MCID::MayLoad), 0x9293f8024819ULL }, // Inst #17800 = VPTESTMQZ128rmbk |
| 24301 | { 17799, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5256, 0|(1ULL<<MCID::MayLoad), 0x9093f8024819ULL }, // Inst #17799 = VPTESTMQZ128rmb |
| 24302 | { 17798, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5256, 0|(1ULL<<MCID::MayLoad), 0xa093f8024819ULL }, // Inst #17798 = VPTESTMQZ128rm |
| 24303 | { 17797, 4, 1, 0, 1133, 0, 0, X86ImpOpBase + 0, 5252, 0|(1ULL<<MCID::Commutable), 0xea93f8004829ULL }, // Inst #17797 = VPTESTMDZrrk |
| 24304 | { 17796, 3, 1, 0, 1249, 0, 0, X86ImpOpBase + 0, 5249, 0|(1ULL<<MCID::Commutable), 0xe893f8004829ULL }, // Inst #17796 = VPTESTMDZrr |
| 24305 | { 17795, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5241, 0|(1ULL<<MCID::MayLoad), 0xea93f8004819ULL }, // Inst #17795 = VPTESTMDZrmk |
| 24306 | { 17794, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5241, 0|(1ULL<<MCID::MayLoad), 0x7a93f8004819ULL }, // Inst #17794 = VPTESTMDZrmbk |
| 24307 | { 17793, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5234, 0|(1ULL<<MCID::MayLoad), 0x7893f8004819ULL }, // Inst #17793 = VPTESTMDZrmb |
| 24308 | { 17792, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5234, 0|(1ULL<<MCID::MayLoad), 0xe893f8004819ULL }, // Inst #17792 = VPTESTMDZrm |
| 24309 | { 17791, 4, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5230, 0|(1ULL<<MCID::Commutable), 0xc393f8004829ULL }, // Inst #17791 = VPTESTMDZ256rrk |
| 24310 | { 17790, 3, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5227, 0|(1ULL<<MCID::Commutable), 0xc193f8004829ULL }, // Inst #17790 = VPTESTMDZ256rr |
| 24311 | { 17789, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5219, 0|(1ULL<<MCID::MayLoad), 0xc393f8004819ULL }, // Inst #17789 = VPTESTMDZ256rmk |
| 24312 | { 17788, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5219, 0|(1ULL<<MCID::MayLoad), 0x7393f8004819ULL }, // Inst #17788 = VPTESTMDZ256rmbk |
| 24313 | { 17787, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5212, 0|(1ULL<<MCID::MayLoad), 0x7193f8004819ULL }, // Inst #17787 = VPTESTMDZ256rmb |
| 24314 | { 17786, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5212, 0|(1ULL<<MCID::MayLoad), 0xc193f8004819ULL }, // Inst #17786 = VPTESTMDZ256rm |
| 24315 | { 17785, 4, 1, 0, 1131, 0, 0, X86ImpOpBase + 0, 5208, 0|(1ULL<<MCID::Commutable), 0xa293f8004829ULL }, // Inst #17785 = VPTESTMDZ128rrk |
| 24316 | { 17784, 3, 1, 0, 1248, 0, 0, X86ImpOpBase + 0, 5205, 0|(1ULL<<MCID::Commutable), 0xa093f8004829ULL }, // Inst #17784 = VPTESTMDZ128rr |
| 24317 | { 17783, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5197, 0|(1ULL<<MCID::MayLoad), 0xa293f8004819ULL }, // Inst #17783 = VPTESTMDZ128rmk |
| 24318 | { 17782, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5197, 0|(1ULL<<MCID::MayLoad), 0x7293f8004819ULL }, // Inst #17782 = VPTESTMDZ128rmbk |
| 24319 | { 17781, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5190, 0|(1ULL<<MCID::MayLoad), 0x7093f8004819ULL }, // Inst #17781 = VPTESTMDZ128rmb |
| 24320 | { 17780, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5190, 0|(1ULL<<MCID::MayLoad), 0xa093f8004819ULL }, // Inst #17780 = VPTESTMDZ128rm |
| 24321 | { 17779, 4, 1, 0, 1133, 0, 0, X86ImpOpBase + 0, 5186, 0|(1ULL<<MCID::Commutable), 0xea9378004829ULL }, // Inst #17779 = VPTESTMBZrrk |
| 24322 | { 17778, 3, 1, 0, 1249, 0, 0, X86ImpOpBase + 0, 5183, 0|(1ULL<<MCID::Commutable), 0xe89378004829ULL }, // Inst #17778 = VPTESTMBZrr |
| 24323 | { 17777, 8, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5175, 0|(1ULL<<MCID::MayLoad), 0xea9378004819ULL }, // Inst #17777 = VPTESTMBZrmk |
| 24324 | { 17776, 7, 1, 0, 1350, 0, 0, X86ImpOpBase + 0, 5168, 0|(1ULL<<MCID::MayLoad), 0xe89378004819ULL }, // Inst #17776 = VPTESTMBZrm |
| 24325 | { 17775, 4, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5164, 0|(1ULL<<MCID::Commutable), 0xc39378004829ULL }, // Inst #17775 = VPTESTMBZ256rrk |
| 24326 | { 17774, 3, 1, 0, 1132, 0, 0, X86ImpOpBase + 0, 5161, 0|(1ULL<<MCID::Commutable), 0xc19378004829ULL }, // Inst #17774 = VPTESTMBZ256rr |
| 24327 | { 17773, 8, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5153, 0|(1ULL<<MCID::MayLoad), 0xc39378004819ULL }, // Inst #17773 = VPTESTMBZ256rmk |
| 24328 | { 17772, 7, 1, 0, 1349, 0, 0, X86ImpOpBase + 0, 5146, 0|(1ULL<<MCID::MayLoad), 0xc19378004819ULL }, // Inst #17772 = VPTESTMBZ256rm |
| 24329 | { 17771, 4, 1, 0, 1131, 0, 0, X86ImpOpBase + 0, 5142, 0|(1ULL<<MCID::Commutable), 0xa29378004829ULL }, // Inst #17771 = VPTESTMBZ128rrk |
| 24330 | { 17770, 3, 1, 0, 1248, 0, 0, X86ImpOpBase + 0, 5139, 0|(1ULL<<MCID::Commutable), 0xa09378004829ULL }, // Inst #17770 = VPTESTMBZ128rr |
| 24331 | { 17769, 8, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5131, 0|(1ULL<<MCID::MayLoad), 0xa29378004819ULL }, // Inst #17769 = VPTESTMBZ128rmk |
| 24332 | { 17768, 7, 1, 0, 1339, 0, 0, X86ImpOpBase + 0, 5124, 0|(1ULL<<MCID::MayLoad), 0xa09378004819ULL }, // Inst #17768 = VPTESTMBZ128rm |
| 24333 | { 17767, 6, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 2178, 0|(1ULL<<MCID::Commutable), 0xee92f8066829ULL }, // Inst #17767 = VPTERNLOGQZrrikz |
| 24334 | { 17766, 6, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 2178, 0|(1ULL<<MCID::Commutable), 0xea92f8066829ULL }, // Inst #17766 = VPTERNLOGQZrrik |
| 24335 | { 17765, 5, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 3670, 0|(1ULL<<MCID::Commutable), 0xe892f8066829ULL }, // Inst #17765 = VPTERNLOGQZrri |
| 24336 | { 17764, 10, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xee92f8066819ULL }, // Inst #17764 = VPTERNLOGQZrmikz |
| 24337 | { 17763, 10, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xea92f8066819ULL }, // Inst #17763 = VPTERNLOGQZrmik |
| 24338 | { 17762, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 3661, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe892f8066819ULL }, // Inst #17762 = VPTERNLOGQZrmi |
| 24339 | { 17761, 10, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9e92f8066819ULL }, // Inst #17761 = VPTERNLOGQZrmbikz |
| 24340 | { 17760, 10, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0x9a92f8066819ULL }, // Inst #17760 = VPTERNLOGQZrmbik |
| 24341 | { 17759, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 3661, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9892f8066819ULL }, // Inst #17759 = VPTERNLOGQZrmbi |
| 24342 | { 17758, 6, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 2148, 0|(1ULL<<MCID::Commutable), 0xc792f8066829ULL }, // Inst #17758 = VPTERNLOGQZ256rrikz |
| 24343 | { 17757, 6, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 2148, 0|(1ULL<<MCID::Commutable), 0xc392f8066829ULL }, // Inst #17757 = VPTERNLOGQZ256rrik |
| 24344 | { 17756, 5, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 3656, 0|(1ULL<<MCID::Commutable), 0xc192f8066829ULL }, // Inst #17756 = VPTERNLOGQZ256rri |
| 24345 | { 17755, 10, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc792f8066819ULL }, // Inst #17755 = VPTERNLOGQZ256rmikz |
| 24346 | { 17754, 10, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0xc392f8066819ULL }, // Inst #17754 = VPTERNLOGQZ256rmik |
| 24347 | { 17753, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 3647, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc192f8066819ULL }, // Inst #17753 = VPTERNLOGQZ256rmi |
| 24348 | { 17752, 10, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9792f8066819ULL }, // Inst #17752 = VPTERNLOGQZ256rmbikz |
| 24349 | { 17751, 10, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0x9392f8066819ULL }, // Inst #17751 = VPTERNLOGQZ256rmbik |
| 24350 | { 17750, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 3647, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9192f8066819ULL }, // Inst #17750 = VPTERNLOGQZ256rmbi |
| 24351 | { 17749, 6, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 2118, 0|(1ULL<<MCID::Commutable), 0xa692f8066829ULL }, // Inst #17749 = VPTERNLOGQZ128rrikz |
| 24352 | { 17748, 6, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 2118, 0|(1ULL<<MCID::Commutable), 0xa292f8066829ULL }, // Inst #17748 = VPTERNLOGQZ128rrik |
| 24353 | { 17747, 5, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 3642, 0|(1ULL<<MCID::Commutable), 0xa092f8066829ULL }, // Inst #17747 = VPTERNLOGQZ128rri |
| 24354 | { 17746, 10, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa692f8066819ULL }, // Inst #17746 = VPTERNLOGQZ128rmikz |
| 24355 | { 17745, 10, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad), 0xa292f8066819ULL }, // Inst #17745 = VPTERNLOGQZ128rmik |
| 24356 | { 17744, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 3633, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa092f8066819ULL }, // Inst #17744 = VPTERNLOGQZ128rmi |
| 24357 | { 17743, 10, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9692f8066819ULL }, // Inst #17743 = VPTERNLOGQZ128rmbikz |
| 24358 | { 17742, 10, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad), 0x9292f8066819ULL }, // Inst #17742 = VPTERNLOGQZ128rmbik |
| 24359 | { 17741, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 3633, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9092f8066819ULL }, // Inst #17741 = VPTERNLOGQZ128rmbi |
| 24360 | { 17740, 6, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 2088, 0|(1ULL<<MCID::Commutable), 0xee92f8046829ULL }, // Inst #17740 = VPTERNLOGDZrrikz |
| 24361 | { 17739, 6, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 2088, 0|(1ULL<<MCID::Commutable), 0xea92f8046829ULL }, // Inst #17739 = VPTERNLOGDZrrik |
| 24362 | { 17738, 5, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 3670, 0|(1ULL<<MCID::Commutable), 0xe892f8046829ULL }, // Inst #17738 = VPTERNLOGDZrri |
| 24363 | { 17737, 10, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xee92f8046819ULL }, // Inst #17737 = VPTERNLOGDZrmikz |
| 24364 | { 17736, 10, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xea92f8046819ULL }, // Inst #17736 = VPTERNLOGDZrmik |
| 24365 | { 17735, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 3661, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe892f8046819ULL }, // Inst #17735 = VPTERNLOGDZrmi |
| 24366 | { 17734, 10, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7e92f8046819ULL }, // Inst #17734 = VPTERNLOGDZrmbikz |
| 24367 | { 17733, 10, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0x7a92f8046819ULL }, // Inst #17733 = VPTERNLOGDZrmbik |
| 24368 | { 17732, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 3661, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7892f8046819ULL }, // Inst #17732 = VPTERNLOGDZrmbi |
| 24369 | { 17731, 6, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 2050, 0|(1ULL<<MCID::Commutable), 0xc792f8046829ULL }, // Inst #17731 = VPTERNLOGDZ256rrikz |
| 24370 | { 17730, 6, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 2050, 0|(1ULL<<MCID::Commutable), 0xc392f8046829ULL }, // Inst #17730 = VPTERNLOGDZ256rrik |
| 24371 | { 17729, 5, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 3656, 0|(1ULL<<MCID::Commutable), 0xc192f8046829ULL }, // Inst #17729 = VPTERNLOGDZ256rri |
| 24372 | { 17728, 10, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc792f8046819ULL }, // Inst #17728 = VPTERNLOGDZ256rmikz |
| 24373 | { 17727, 10, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0xc392f8046819ULL }, // Inst #17727 = VPTERNLOGDZ256rmik |
| 24374 | { 17726, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 3647, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc192f8046819ULL }, // Inst #17726 = VPTERNLOGDZ256rmi |
| 24375 | { 17725, 10, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7792f8046819ULL }, // Inst #17725 = VPTERNLOGDZ256rmbikz |
| 24376 | { 17724, 10, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0x7392f8046819ULL }, // Inst #17724 = VPTERNLOGDZ256rmbik |
| 24377 | { 17723, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 3647, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7192f8046819ULL }, // Inst #17723 = VPTERNLOGDZ256rmbi |
| 24378 | { 17722, 6, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 2012, 0|(1ULL<<MCID::Commutable), 0xa692f8046829ULL }, // Inst #17722 = VPTERNLOGDZ128rrikz |
| 24379 | { 17721, 6, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 2012, 0|(1ULL<<MCID::Commutable), 0xa292f8046829ULL }, // Inst #17721 = VPTERNLOGDZ128rrik |
| 24380 | { 17720, 5, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 3642, 0|(1ULL<<MCID::Commutable), 0xa092f8046829ULL }, // Inst #17720 = VPTERNLOGDZ128rri |
| 24381 | { 17719, 10, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa692f8046819ULL }, // Inst #17719 = VPTERNLOGDZ128rmikz |
| 24382 | { 17718, 10, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad), 0xa292f8046819ULL }, // Inst #17718 = VPTERNLOGDZ128rmik |
| 24383 | { 17717, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 3633, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa092f8046819ULL }, // Inst #17717 = VPTERNLOGDZ128rmi |
| 24384 | { 17716, 10, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7692f8046819ULL }, // Inst #17716 = VPTERNLOGDZ128rmbikz |
| 24385 | { 17715, 10, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad), 0x7292f8046819ULL }, // Inst #17715 = VPTERNLOGDZ128rmbik |
| 24386 | { 17714, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 3633, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7092f8046819ULL }, // Inst #17714 = VPTERNLOGDZ128rmbi |
| 24387 | { 17713, 3, 1, 0, 1062, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xfcb8002829ULL }, // Inst #17713 = VPSUBWrr |
| 24388 | { 17712, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xfcb8002819ULL }, // Inst #17712 = VPSUBWrm |
| 24389 | { 17711, 4, 1, 0, 1230, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xeefcf8002829ULL }, // Inst #17711 = VPSUBWZrrkz |
| 24390 | { 17710, 5, 1, 0, 1230, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeafcf8002829ULL }, // Inst #17710 = VPSUBWZrrk |
| 24391 | { 17709, 3, 1, 0, 1412, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8fcf8002829ULL }, // Inst #17709 = VPSUBWZrr |
| 24392 | { 17708, 8, 1, 0, 1324, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeefcf8002819ULL }, // Inst #17708 = VPSUBWZrmkz |
| 24393 | { 17707, 9, 1, 0, 1324, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeafcf8002819ULL }, // Inst #17707 = VPSUBWZrmk |
| 24394 | { 17706, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8fcf8002819ULL }, // Inst #17706 = VPSUBWZrm |
| 24395 | { 17705, 4, 1, 0, 1229, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc7fcf8002829ULL }, // Inst #17705 = VPSUBWZ256rrkz |
| 24396 | { 17704, 5, 1, 0, 1229, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3fcf8002829ULL }, // Inst #17704 = VPSUBWZ256rrk |
| 24397 | { 17703, 3, 1, 0, 1411, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1fcf8002829ULL }, // Inst #17703 = VPSUBWZ256rr |
| 24398 | { 17702, 8, 1, 0, 1323, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7fcf8002819ULL }, // Inst #17702 = VPSUBWZ256rmkz |
| 24399 | { 17701, 9, 1, 0, 1323, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3fcf8002819ULL }, // Inst #17701 = VPSUBWZ256rmk |
| 24400 | { 17700, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1fcf8002819ULL }, // Inst #17700 = VPSUBWZ256rm |
| 24401 | { 17699, 4, 1, 0, 1228, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6fcf8002829ULL }, // Inst #17699 = VPSUBWZ128rrkz |
| 24402 | { 17698, 5, 1, 0, 1228, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2fcf8002829ULL }, // Inst #17698 = VPSUBWZ128rrk |
| 24403 | { 17697, 3, 1, 0, 1410, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0fcf8002829ULL }, // Inst #17697 = VPSUBWZ128rr |
| 24404 | { 17696, 8, 1, 0, 1298, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6fcf8002819ULL }, // Inst #17696 = VPSUBWZ128rmkz |
| 24405 | { 17695, 9, 1, 0, 1298, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2fcf8002819ULL }, // Inst #17695 = VPSUBWZ128rmk |
| 24406 | { 17694, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0fcf8002819ULL }, // Inst #17694 = VPSUBWZ128rm |
| 24407 | { 17693, 3, 1, 0, 907, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1fcb8002829ULL }, // Inst #17693 = VPSUBWYrr |
| 24408 | { 17692, 7, 1, 0, 1213, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1fcb8002819ULL }, // Inst #17692 = VPSUBWYrm |
| 24409 | { 17691, 3, 1, 0, 1199, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xecb8002829ULL }, // Inst #17691 = VPSUBUSWrr |
| 24410 | { 17690, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xecb8002819ULL }, // Inst #17690 = VPSUBUSWrm |
| 24411 | { 17689, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xeeecf8002829ULL }, // Inst #17689 = VPSUBUSWZrrkz |
| 24412 | { 17688, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeaecf8002829ULL }, // Inst #17688 = VPSUBUSWZrrk |
| 24413 | { 17687, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8ecf8002829ULL }, // Inst #17687 = VPSUBUSWZrr |
| 24414 | { 17686, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeeecf8002819ULL }, // Inst #17686 = VPSUBUSWZrmkz |
| 24415 | { 17685, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeaecf8002819ULL }, // Inst #17685 = VPSUBUSWZrmk |
| 24416 | { 17684, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ecf8002819ULL }, // Inst #17684 = VPSUBUSWZrm |
| 24417 | { 17683, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc7ecf8002829ULL }, // Inst #17683 = VPSUBUSWZ256rrkz |
| 24418 | { 17682, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3ecf8002829ULL }, // Inst #17682 = VPSUBUSWZ256rrk |
| 24419 | { 17681, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1ecf8002829ULL }, // Inst #17681 = VPSUBUSWZ256rr |
| 24420 | { 17680, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7ecf8002819ULL }, // Inst #17680 = VPSUBUSWZ256rmkz |
| 24421 | { 17679, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3ecf8002819ULL }, // Inst #17679 = VPSUBUSWZ256rmk |
| 24422 | { 17678, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ecf8002819ULL }, // Inst #17678 = VPSUBUSWZ256rm |
| 24423 | { 17677, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6ecf8002829ULL }, // Inst #17677 = VPSUBUSWZ128rrkz |
| 24424 | { 17676, 5, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2ecf8002829ULL }, // Inst #17676 = VPSUBUSWZ128rrk |
| 24425 | { 17675, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0ecf8002829ULL }, // Inst #17675 = VPSUBUSWZ128rr |
| 24426 | { 17674, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6ecf8002819ULL }, // Inst #17674 = VPSUBUSWZ128rmkz |
| 24427 | { 17673, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2ecf8002819ULL }, // Inst #17673 = VPSUBUSWZ128rmk |
| 24428 | { 17672, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ecf8002819ULL }, // Inst #17672 = VPSUBUSWZ128rm |
| 24429 | { 17671, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1ecb8002829ULL }, // Inst #17671 = VPSUBUSWYrr |
| 24430 | { 17670, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ecb8002819ULL }, // Inst #17670 = VPSUBUSWYrm |
| 24431 | { 17669, 3, 1, 0, 1199, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xec38002829ULL }, // Inst #17669 = VPSUBUSBrr |
| 24432 | { 17668, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xec38002819ULL }, // Inst #17668 = VPSUBUSBrm |
| 24433 | { 17667, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeeec78002829ULL }, // Inst #17667 = VPSUBUSBZrrkz |
| 24434 | { 17666, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeaec78002829ULL }, // Inst #17666 = VPSUBUSBZrrk |
| 24435 | { 17665, 3, 1, 0, 1762, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8ec78002829ULL }, // Inst #17665 = VPSUBUSBZrr |
| 24436 | { 17664, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeeec78002819ULL }, // Inst #17664 = VPSUBUSBZrmkz |
| 24437 | { 17663, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeaec78002819ULL }, // Inst #17663 = VPSUBUSBZrmk |
| 24438 | { 17662, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ec78002819ULL }, // Inst #17662 = VPSUBUSBZrm |
| 24439 | { 17661, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc7ec78002829ULL }, // Inst #17661 = VPSUBUSBZ256rrkz |
| 24440 | { 17660, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3ec78002829ULL }, // Inst #17660 = VPSUBUSBZ256rrk |
| 24441 | { 17659, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1ec78002829ULL }, // Inst #17659 = VPSUBUSBZ256rr |
| 24442 | { 17658, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7ec78002819ULL }, // Inst #17658 = VPSUBUSBZ256rmkz |
| 24443 | { 17657, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3ec78002819ULL }, // Inst #17657 = VPSUBUSBZ256rmk |
| 24444 | { 17656, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ec78002819ULL }, // Inst #17656 = VPSUBUSBZ256rm |
| 24445 | { 17655, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa6ec78002829ULL }, // Inst #17655 = VPSUBUSBZ128rrkz |
| 24446 | { 17654, 5, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2ec78002829ULL }, // Inst #17654 = VPSUBUSBZ128rrk |
| 24447 | { 17653, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0ec78002829ULL }, // Inst #17653 = VPSUBUSBZ128rr |
| 24448 | { 17652, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6ec78002819ULL }, // Inst #17652 = VPSUBUSBZ128rmkz |
| 24449 | { 17651, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2ec78002819ULL }, // Inst #17651 = VPSUBUSBZ128rmk |
| 24450 | { 17650, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ec78002819ULL }, // Inst #17650 = VPSUBUSBZ128rm |
| 24451 | { 17649, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1ec38002829ULL }, // Inst #17649 = VPSUBUSBYrr |
| 24452 | { 17648, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ec38002819ULL }, // Inst #17648 = VPSUBUSBYrm |
| 24453 | { 17647, 3, 1, 0, 1199, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xf4b8002829ULL }, // Inst #17647 = VPSUBSWrr |
| 24454 | { 17646, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf4b8002819ULL }, // Inst #17646 = VPSUBSWrm |
| 24455 | { 17645, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xeef4f8002829ULL }, // Inst #17645 = VPSUBSWZrrkz |
| 24456 | { 17644, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeaf4f8002829ULL }, // Inst #17644 = VPSUBSWZrrk |
| 24457 | { 17643, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8f4f8002829ULL }, // Inst #17643 = VPSUBSWZrr |
| 24458 | { 17642, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeef4f8002819ULL }, // Inst #17642 = VPSUBSWZrmkz |
| 24459 | { 17641, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeaf4f8002819ULL }, // Inst #17641 = VPSUBSWZrmk |
| 24460 | { 17640, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f4f8002819ULL }, // Inst #17640 = VPSUBSWZrm |
| 24461 | { 17639, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc7f4f8002829ULL }, // Inst #17639 = VPSUBSWZ256rrkz |
| 24462 | { 17638, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3f4f8002829ULL }, // Inst #17638 = VPSUBSWZ256rrk |
| 24463 | { 17637, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1f4f8002829ULL }, // Inst #17637 = VPSUBSWZ256rr |
| 24464 | { 17636, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7f4f8002819ULL }, // Inst #17636 = VPSUBSWZ256rmkz |
| 24465 | { 17635, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3f4f8002819ULL }, // Inst #17635 = VPSUBSWZ256rmk |
| 24466 | { 17634, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f4f8002819ULL }, // Inst #17634 = VPSUBSWZ256rm |
| 24467 | { 17633, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6f4f8002829ULL }, // Inst #17633 = VPSUBSWZ128rrkz |
| 24468 | { 17632, 5, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2f4f8002829ULL }, // Inst #17632 = VPSUBSWZ128rrk |
| 24469 | { 17631, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0f4f8002829ULL }, // Inst #17631 = VPSUBSWZ128rr |
| 24470 | { 17630, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6f4f8002819ULL }, // Inst #17630 = VPSUBSWZ128rmkz |
| 24471 | { 17629, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2f4f8002819ULL }, // Inst #17629 = VPSUBSWZ128rmk |
| 24472 | { 17628, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f4f8002819ULL }, // Inst #17628 = VPSUBSWZ128rm |
| 24473 | { 17627, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1f4b8002829ULL }, // Inst #17627 = VPSUBSWYrr |
| 24474 | { 17626, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f4b8002819ULL }, // Inst #17626 = VPSUBSWYrm |
| 24475 | { 17625, 3, 1, 0, 1199, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xf438002829ULL }, // Inst #17625 = VPSUBSBrr |
| 24476 | { 17624, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf438002819ULL }, // Inst #17624 = VPSUBSBrm |
| 24477 | { 17623, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeef478002829ULL }, // Inst #17623 = VPSUBSBZrrkz |
| 24478 | { 17622, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeaf478002829ULL }, // Inst #17622 = VPSUBSBZrrk |
| 24479 | { 17621, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8f478002829ULL }, // Inst #17621 = VPSUBSBZrr |
| 24480 | { 17620, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeef478002819ULL }, // Inst #17620 = VPSUBSBZrmkz |
| 24481 | { 17619, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeaf478002819ULL }, // Inst #17619 = VPSUBSBZrmk |
| 24482 | { 17618, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f478002819ULL }, // Inst #17618 = VPSUBSBZrm |
| 24483 | { 17617, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc7f478002829ULL }, // Inst #17617 = VPSUBSBZ256rrkz |
| 24484 | { 17616, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3f478002829ULL }, // Inst #17616 = VPSUBSBZ256rrk |
| 24485 | { 17615, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1f478002829ULL }, // Inst #17615 = VPSUBSBZ256rr |
| 24486 | { 17614, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7f478002819ULL }, // Inst #17614 = VPSUBSBZ256rmkz |
| 24487 | { 17613, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3f478002819ULL }, // Inst #17613 = VPSUBSBZ256rmk |
| 24488 | { 17612, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f478002819ULL }, // Inst #17612 = VPSUBSBZ256rm |
| 24489 | { 17611, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa6f478002829ULL }, // Inst #17611 = VPSUBSBZ128rrkz |
| 24490 | { 17610, 5, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2f478002829ULL }, // Inst #17610 = VPSUBSBZ128rrk |
| 24491 | { 17609, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0f478002829ULL }, // Inst #17609 = VPSUBSBZ128rr |
| 24492 | { 17608, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6f478002819ULL }, // Inst #17608 = VPSUBSBZ128rmkz |
| 24493 | { 17607, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2f478002819ULL }, // Inst #17607 = VPSUBSBZ128rmk |
| 24494 | { 17606, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f478002819ULL }, // Inst #17606 = VPSUBSBZ128rm |
| 24495 | { 17605, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1f438002829ULL }, // Inst #17605 = VPSUBSBYrr |
| 24496 | { 17604, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f438002819ULL }, // Inst #17604 = VPSUBSBYrm |
| 24497 | { 17603, 3, 1, 0, 1062, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xfdb8002829ULL }, // Inst #17603 = VPSUBQrr |
| 24498 | { 17602, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xfdb8002819ULL }, // Inst #17602 = VPSUBQrm |
| 24499 | { 17601, 4, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeefdf8022829ULL }, // Inst #17601 = VPSUBQZrrkz |
| 24500 | { 17600, 5, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeafdf8022829ULL }, // Inst #17600 = VPSUBQZrrk |
| 24501 | { 17599, 3, 1, 0, 1412, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8fdf8022829ULL }, // Inst #17599 = VPSUBQZrr |
| 24502 | { 17598, 8, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeefdf8022819ULL }, // Inst #17598 = VPSUBQZrmkz |
| 24503 | { 17597, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeafdf8022819ULL }, // Inst #17597 = VPSUBQZrmk |
| 24504 | { 17596, 8, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9efdf8022819ULL }, // Inst #17596 = VPSUBQZrmbkz |
| 24505 | { 17595, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9afdf8022819ULL }, // Inst #17595 = VPSUBQZrmbk |
| 24506 | { 17594, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98fdf8022819ULL }, // Inst #17594 = VPSUBQZrmb |
| 24507 | { 17593, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8fdf8022819ULL }, // Inst #17593 = VPSUBQZrm |
| 24508 | { 17592, 4, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc7fdf8022829ULL }, // Inst #17592 = VPSUBQZ256rrkz |
| 24509 | { 17591, 5, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3fdf8022829ULL }, // Inst #17591 = VPSUBQZ256rrk |
| 24510 | { 17590, 3, 1, 0, 1411, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1fdf8022829ULL }, // Inst #17590 = VPSUBQZ256rr |
| 24511 | { 17589, 8, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7fdf8022819ULL }, // Inst #17589 = VPSUBQZ256rmkz |
| 24512 | { 17588, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3fdf8022819ULL }, // Inst #17588 = VPSUBQZ256rmk |
| 24513 | { 17587, 8, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97fdf8022819ULL }, // Inst #17587 = VPSUBQZ256rmbkz |
| 24514 | { 17586, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93fdf8022819ULL }, // Inst #17586 = VPSUBQZ256rmbk |
| 24515 | { 17585, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91fdf8022819ULL }, // Inst #17585 = VPSUBQZ256rmb |
| 24516 | { 17584, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1fdf8022819ULL }, // Inst #17584 = VPSUBQZ256rm |
| 24517 | { 17583, 4, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6fdf8022829ULL }, // Inst #17583 = VPSUBQZ128rrkz |
| 24518 | { 17582, 5, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2fdf8022829ULL }, // Inst #17582 = VPSUBQZ128rrk |
| 24519 | { 17581, 3, 1, 0, 1410, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0fdf8022829ULL }, // Inst #17581 = VPSUBQZ128rr |
| 24520 | { 17580, 8, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6fdf8022819ULL }, // Inst #17580 = VPSUBQZ128rmkz |
| 24521 | { 17579, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2fdf8022819ULL }, // Inst #17579 = VPSUBQZ128rmk |
| 24522 | { 17578, 8, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96fdf8022819ULL }, // Inst #17578 = VPSUBQZ128rmbkz |
| 24523 | { 17577, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92fdf8022819ULL }, // Inst #17577 = VPSUBQZ128rmbk |
| 24524 | { 17576, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90fdf8022819ULL }, // Inst #17576 = VPSUBQZ128rmb |
| 24525 | { 17575, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0fdf8022819ULL }, // Inst #17575 = VPSUBQZ128rm |
| 24526 | { 17574, 3, 1, 0, 907, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1fdb8002829ULL }, // Inst #17574 = VPSUBQYrr |
| 24527 | { 17573, 7, 1, 0, 1213, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1fdb8002819ULL }, // Inst #17573 = VPSUBQYrm |
| 24528 | { 17572, 3, 1, 0, 1062, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xfd38002829ULL }, // Inst #17572 = VPSUBDrr |
| 24529 | { 17571, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xfd38002819ULL }, // Inst #17571 = VPSUBDrm |
| 24530 | { 17570, 4, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeefd78002829ULL }, // Inst #17570 = VPSUBDZrrkz |
| 24531 | { 17569, 5, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeafd78002829ULL }, // Inst #17569 = VPSUBDZrrk |
| 24532 | { 17568, 3, 1, 0, 1412, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8fd78002829ULL }, // Inst #17568 = VPSUBDZrr |
| 24533 | { 17567, 8, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeefd78002819ULL }, // Inst #17567 = VPSUBDZrmkz |
| 24534 | { 17566, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeafd78002819ULL }, // Inst #17566 = VPSUBDZrmk |
| 24535 | { 17565, 8, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7efd78002819ULL }, // Inst #17565 = VPSUBDZrmbkz |
| 24536 | { 17564, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7afd78002819ULL }, // Inst #17564 = VPSUBDZrmbk |
| 24537 | { 17563, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78fd78002819ULL }, // Inst #17563 = VPSUBDZrmb |
| 24538 | { 17562, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8fd78002819ULL }, // Inst #17562 = VPSUBDZrm |
| 24539 | { 17561, 4, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc7fd78002829ULL }, // Inst #17561 = VPSUBDZ256rrkz |
| 24540 | { 17560, 5, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3fd78002829ULL }, // Inst #17560 = VPSUBDZ256rrk |
| 24541 | { 17559, 3, 1, 0, 1411, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1fd78002829ULL }, // Inst #17559 = VPSUBDZ256rr |
| 24542 | { 17558, 8, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7fd78002819ULL }, // Inst #17558 = VPSUBDZ256rmkz |
| 24543 | { 17557, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3fd78002819ULL }, // Inst #17557 = VPSUBDZ256rmk |
| 24544 | { 17556, 8, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77fd78002819ULL }, // Inst #17556 = VPSUBDZ256rmbkz |
| 24545 | { 17555, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73fd78002819ULL }, // Inst #17555 = VPSUBDZ256rmbk |
| 24546 | { 17554, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71fd78002819ULL }, // Inst #17554 = VPSUBDZ256rmb |
| 24547 | { 17553, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1fd78002819ULL }, // Inst #17553 = VPSUBDZ256rm |
| 24548 | { 17552, 4, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6fd78002829ULL }, // Inst #17552 = VPSUBDZ128rrkz |
| 24549 | { 17551, 5, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2fd78002829ULL }, // Inst #17551 = VPSUBDZ128rrk |
| 24550 | { 17550, 3, 1, 0, 1410, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0fd78002829ULL }, // Inst #17550 = VPSUBDZ128rr |
| 24551 | { 17549, 8, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6fd78002819ULL }, // Inst #17549 = VPSUBDZ128rmkz |
| 24552 | { 17548, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2fd78002819ULL }, // Inst #17548 = VPSUBDZ128rmk |
| 24553 | { 17547, 8, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76fd78002819ULL }, // Inst #17547 = VPSUBDZ128rmbkz |
| 24554 | { 17546, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72fd78002819ULL }, // Inst #17546 = VPSUBDZ128rmbk |
| 24555 | { 17545, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70fd78002819ULL }, // Inst #17545 = VPSUBDZ128rmb |
| 24556 | { 17544, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0fd78002819ULL }, // Inst #17544 = VPSUBDZ128rm |
| 24557 | { 17543, 3, 1, 0, 907, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1fd38002829ULL }, // Inst #17543 = VPSUBDYrr |
| 24558 | { 17542, 7, 1, 0, 1213, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1fd38002819ULL }, // Inst #17542 = VPSUBDYrm |
| 24559 | { 17541, 3, 1, 0, 1062, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xfc38002829ULL }, // Inst #17541 = VPSUBBrr |
| 24560 | { 17540, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xfc38002819ULL }, // Inst #17540 = VPSUBBrm |
| 24561 | { 17539, 4, 1, 0, 1230, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeefc78002829ULL }, // Inst #17539 = VPSUBBZrrkz |
| 24562 | { 17538, 5, 1, 0, 1230, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeafc78002829ULL }, // Inst #17538 = VPSUBBZrrk |
| 24563 | { 17537, 3, 1, 0, 1412, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8fc78002829ULL }, // Inst #17537 = VPSUBBZrr |
| 24564 | { 17536, 8, 1, 0, 1324, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeefc78002819ULL }, // Inst #17536 = VPSUBBZrmkz |
| 24565 | { 17535, 9, 1, 0, 1324, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeafc78002819ULL }, // Inst #17535 = VPSUBBZrmk |
| 24566 | { 17534, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8fc78002819ULL }, // Inst #17534 = VPSUBBZrm |
| 24567 | { 17533, 4, 1, 0, 1229, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc7fc78002829ULL }, // Inst #17533 = VPSUBBZ256rrkz |
| 24568 | { 17532, 5, 1, 0, 1229, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3fc78002829ULL }, // Inst #17532 = VPSUBBZ256rrk |
| 24569 | { 17531, 3, 1, 0, 1411, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1fc78002829ULL }, // Inst #17531 = VPSUBBZ256rr |
| 24570 | { 17530, 8, 1, 0, 1323, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7fc78002819ULL }, // Inst #17530 = VPSUBBZ256rmkz |
| 24571 | { 17529, 9, 1, 0, 1323, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3fc78002819ULL }, // Inst #17529 = VPSUBBZ256rmk |
| 24572 | { 17528, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1fc78002819ULL }, // Inst #17528 = VPSUBBZ256rm |
| 24573 | { 17527, 4, 1, 0, 1228, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa6fc78002829ULL }, // Inst #17527 = VPSUBBZ128rrkz |
| 24574 | { 17526, 5, 1, 0, 1228, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2fc78002829ULL }, // Inst #17526 = VPSUBBZ128rrk |
| 24575 | { 17525, 3, 1, 0, 1410, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0fc78002829ULL }, // Inst #17525 = VPSUBBZ128rr |
| 24576 | { 17524, 8, 1, 0, 1298, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6fc78002819ULL }, // Inst #17524 = VPSUBBZ128rmkz |
| 24577 | { 17523, 9, 1, 0, 1298, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2fc78002819ULL }, // Inst #17523 = VPSUBBZ128rmk |
| 24578 | { 17522, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0fc78002819ULL }, // Inst #17522 = VPSUBBZ128rm |
| 24579 | { 17521, 3, 1, 0, 907, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1fc38002829ULL }, // Inst #17521 = VPSUBBYrr |
| 24580 | { 17520, 7, 1, 0, 1213, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1fc38002819ULL }, // Inst #17520 = VPSUBBYrm |
| 24581 | { 17519, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xe8b8002829ULL }, // Inst #17519 = VPSRLWrr |
| 24582 | { 17518, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xe8b8002819ULL }, // Inst #17518 = VPSRLWrm |
| 24583 | { 17517, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0xb8b8042832ULL }, // Inst #17517 = VPSRLWri |
| 24584 | { 17516, 4, 1, 0, 2262, 0, 0, X86ImpOpBase + 0, 5673, 0, 0xaee8f8002829ULL }, // Inst #17516 = VPSRLWZrrkz |
| 24585 | { 17515, 5, 1, 0, 2262, 0, 0, X86ImpOpBase + 0, 5668, 0, 0xaae8f8002829ULL }, // Inst #17515 = VPSRLWZrrk |
| 24586 | { 17514, 3, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5629, 0, 0xa8e8f8002829ULL }, // Inst #17514 = VPSRLWZrr |
| 24587 | { 17513, 8, 1, 0, 1821, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xaee8f8002819ULL }, // Inst #17513 = VPSRLWZrmkz |
| 24588 | { 17512, 9, 1, 0, 1821, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xaae8f8002819ULL }, // Inst #17512 = VPSRLWZrmk |
| 24589 | { 17511, 7, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xa8e8f8002819ULL }, // Inst #17511 = VPSRLWZrm |
| 24590 | { 17510, 4, 1, 0, 1772, 0, 0, X86ImpOpBase + 0, 4339, 0, 0xeeb8f8042832ULL }, // Inst #17510 = VPSRLWZrikz |
| 24591 | { 17509, 5, 1, 0, 1772, 0, 0, X86ImpOpBase + 0, 4334, 0, 0xeab8f8042832ULL }, // Inst #17509 = VPSRLWZrik |
| 24592 | { 17508, 3, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b8f8042832ULL }, // Inst #17508 = VPSRLWZri |
| 24593 | { 17507, 8, 1, 0, 1817, 0, 0, X86ImpOpBase + 0, 4326, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8042822ULL }, // Inst #17507 = VPSRLWZmikz |
| 24594 | { 17506, 9, 1, 0, 1817, 0, 0, X86ImpOpBase + 0, 4317, 0|(1ULL<<MCID::MayLoad), 0xeab8f8042822ULL }, // Inst #17506 = VPSRLWZmik |
| 24595 | { 17505, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8042822ULL }, // Inst #17505 = VPSRLWZmi |
| 24596 | { 17504, 4, 1, 0, 1782, 0, 0, X86ImpOpBase + 0, 5664, 0, 0xa7e8f8002829ULL }, // Inst #17504 = VPSRLWZ256rrkz |
| 24597 | { 17503, 5, 1, 0, 1782, 0, 0, X86ImpOpBase + 0, 5659, 0, 0xa3e8f8002829ULL }, // Inst #17503 = VPSRLWZ256rrk |
| 24598 | { 17502, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5617, 0, 0xa1e8f8002829ULL }, // Inst #17502 = VPSRLWZ256rr |
| 24599 | { 17501, 8, 1, 0, 2023, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xa7e8f8002819ULL }, // Inst #17501 = VPSRLWZ256rmkz |
| 24600 | { 17500, 9, 1, 0, 2023, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xa3e8f8002819ULL }, // Inst #17500 = VPSRLWZ256rmk |
| 24601 | { 17499, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xa1e8f8002819ULL }, // Inst #17499 = VPSRLWZ256rm |
| 24602 | { 17498, 4, 1, 0, 2258, 0, 0, X86ImpOpBase + 0, 4313, 0, 0xc7b8f8042832ULL }, // Inst #17498 = VPSRLWZ256rikz |
| 24603 | { 17497, 5, 1, 0, 2258, 0, 0, X86ImpOpBase + 0, 4308, 0, 0xc3b8f8042832ULL }, // Inst #17497 = VPSRLWZ256rik |
| 24604 | { 17496, 3, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b8f8042832ULL }, // Inst #17496 = VPSRLWZ256ri |
| 24605 | { 17495, 8, 1, 0, 2014, 0, 0, X86ImpOpBase + 0, 4300, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8042822ULL }, // Inst #17495 = VPSRLWZ256mikz |
| 24606 | { 17494, 9, 1, 0, 2014, 0, 0, X86ImpOpBase + 0, 4291, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8042822ULL }, // Inst #17494 = VPSRLWZ256mik |
| 24607 | { 17493, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8042822ULL }, // Inst #17493 = VPSRLWZ256mi |
| 24608 | { 17492, 4, 1, 0, 2353, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6e8f8002829ULL }, // Inst #17492 = VPSRLWZ128rrkz |
| 24609 | { 17491, 5, 1, 0, 2353, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2e8f8002829ULL }, // Inst #17491 = VPSRLWZ128rrk |
| 24610 | { 17490, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0e8f8002829ULL }, // Inst #17490 = VPSRLWZ128rr |
| 24611 | { 17489, 8, 1, 0, 2019, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6e8f8002819ULL }, // Inst #17489 = VPSRLWZ128rmkz |
| 24612 | { 17488, 9, 1, 0, 2019, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2e8f8002819ULL }, // Inst #17488 = VPSRLWZ128rmk |
| 24613 | { 17487, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0e8f8002819ULL }, // Inst #17487 = VPSRLWZ128rm |
| 24614 | { 17486, 4, 1, 0, 2257, 0, 0, X86ImpOpBase + 0, 4287, 0, 0xa6b8f8042832ULL }, // Inst #17486 = VPSRLWZ128rikz |
| 24615 | { 17485, 5, 1, 0, 2257, 0, 0, X86ImpOpBase + 0, 4282, 0, 0xa2b8f8042832ULL }, // Inst #17485 = VPSRLWZ128rik |
| 24616 | { 17484, 3, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b8f8042832ULL }, // Inst #17484 = VPSRLWZ128ri |
| 24617 | { 17483, 8, 1, 0, 2013, 0, 0, X86ImpOpBase + 0, 4274, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8042822ULL }, // Inst #17483 = VPSRLWZ128mikz |
| 24618 | { 17482, 9, 1, 0, 2013, 0, 0, X86ImpOpBase + 0, 4265, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8042822ULL }, // Inst #17482 = VPSRLWZ128mik |
| 24619 | { 17481, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8042822ULL }, // Inst #17481 = VPSRLWZ128mi |
| 24620 | { 17480, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5614, 0, 0x1e8b8002829ULL }, // Inst #17480 = VPSRLWYrr |
| 24621 | { 17479, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1e8b8002819ULL }, // Inst #17479 = VPSRLWYrm |
| 24622 | { 17478, 3, 1, 0, 548, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x1b8b8042832ULL }, // Inst #17478 = VPSRLWYri |
| 24623 | { 17477, 4, 1, 0, 1771, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xee8878024829ULL }, // Inst #17477 = VPSRLVWZrrkz |
| 24624 | { 17476, 5, 1, 0, 1771, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xea8878024829ULL }, // Inst #17476 = VPSRLVWZrrk |
| 24625 | { 17475, 3, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88878024829ULL }, // Inst #17475 = VPSRLVWZrr |
| 24626 | { 17474, 8, 1, 0, 1820, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xee8878024819ULL }, // Inst #17474 = VPSRLVWZrmkz |
| 24627 | { 17473, 9, 1, 0, 1820, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xea8878024819ULL }, // Inst #17473 = VPSRLVWZrmk |
| 24628 | { 17472, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88878024819ULL }, // Inst #17472 = VPSRLVWZrm |
| 24629 | { 17471, 4, 1, 0, 2256, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc78878024829ULL }, // Inst #17471 = VPSRLVWZ256rrkz |
| 24630 | { 17470, 5, 1, 0, 2256, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc38878024829ULL }, // Inst #17470 = VPSRLVWZ256rrk |
| 24631 | { 17469, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18878024829ULL }, // Inst #17469 = VPSRLVWZ256rr |
| 24632 | { 17468, 8, 1, 0, 2022, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc78878024819ULL }, // Inst #17468 = VPSRLVWZ256rmkz |
| 24633 | { 17467, 9, 1, 0, 2022, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc38878024819ULL }, // Inst #17467 = VPSRLVWZ256rmk |
| 24634 | { 17466, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18878024819ULL }, // Inst #17466 = VPSRLVWZ256rm |
| 24635 | { 17465, 4, 1, 0, 2255, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa68878024829ULL }, // Inst #17465 = VPSRLVWZ128rrkz |
| 24636 | { 17464, 5, 1, 0, 2255, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa28878024829ULL }, // Inst #17464 = VPSRLVWZ128rrk |
| 24637 | { 17463, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08878024829ULL }, // Inst #17463 = VPSRLVWZ128rr |
| 24638 | { 17462, 8, 1, 0, 2018, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa68878024819ULL }, // Inst #17462 = VPSRLVWZ128rmkz |
| 24639 | { 17461, 9, 1, 0, 2018, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa28878024819ULL }, // Inst #17461 = VPSRLVWZ128rmk |
| 24640 | { 17460, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08878024819ULL }, // Inst #17460 = VPSRLVWZ128rm |
| 24641 | { 17459, 3, 1, 0, 838, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xa2b8024829ULL }, // Inst #17459 = VPSRLVQrr |
| 24642 | { 17458, 7, 1, 0, 846, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xa2b8024819ULL }, // Inst #17458 = VPSRLVQrm |
| 24643 | { 17457, 4, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeea2f8024829ULL }, // Inst #17457 = VPSRLVQZrrkz |
| 24644 | { 17456, 5, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeaa2f8024829ULL }, // Inst #17456 = VPSRLVQZrrk |
| 24645 | { 17455, 3, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8a2f8024829ULL }, // Inst #17455 = VPSRLVQZrr |
| 24646 | { 17454, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeea2f8024819ULL }, // Inst #17454 = VPSRLVQZrmkz |
| 24647 | { 17453, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaa2f8024819ULL }, // Inst #17453 = VPSRLVQZrmk |
| 24648 | { 17452, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9ea2f8024819ULL }, // Inst #17452 = VPSRLVQZrmbkz |
| 24649 | { 17451, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aa2f8024819ULL }, // Inst #17451 = VPSRLVQZrmbk |
| 24650 | { 17450, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98a2f8024819ULL }, // Inst #17450 = VPSRLVQZrmb |
| 24651 | { 17449, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8a2f8024819ULL }, // Inst #17449 = VPSRLVQZrm |
| 24652 | { 17448, 4, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc7a2f8024829ULL }, // Inst #17448 = VPSRLVQZ256rrkz |
| 24653 | { 17447, 5, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3a2f8024829ULL }, // Inst #17447 = VPSRLVQZ256rrk |
| 24654 | { 17446, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1a2f8024829ULL }, // Inst #17446 = VPSRLVQZ256rr |
| 24655 | { 17445, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7a2f8024819ULL }, // Inst #17445 = VPSRLVQZ256rmkz |
| 24656 | { 17444, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3a2f8024819ULL }, // Inst #17444 = VPSRLVQZ256rmk |
| 24657 | { 17443, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97a2f8024819ULL }, // Inst #17443 = VPSRLVQZ256rmbkz |
| 24658 | { 17442, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93a2f8024819ULL }, // Inst #17442 = VPSRLVQZ256rmbk |
| 24659 | { 17441, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91a2f8024819ULL }, // Inst #17441 = VPSRLVQZ256rmb |
| 24660 | { 17440, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1a2f8024819ULL }, // Inst #17440 = VPSRLVQZ256rm |
| 24661 | { 17439, 4, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6a2f8024829ULL }, // Inst #17439 = VPSRLVQZ128rrkz |
| 24662 | { 17438, 5, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2a2f8024829ULL }, // Inst #17438 = VPSRLVQZ128rrk |
| 24663 | { 17437, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0a2f8024829ULL }, // Inst #17437 = VPSRLVQZ128rr |
| 24664 | { 17436, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6a2f8024819ULL }, // Inst #17436 = VPSRLVQZ128rmkz |
| 24665 | { 17435, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2a2f8024819ULL }, // Inst #17435 = VPSRLVQZ128rmk |
| 24666 | { 17434, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96a2f8024819ULL }, // Inst #17434 = VPSRLVQZ128rmbkz |
| 24667 | { 17433, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92a2f8024819ULL }, // Inst #17433 = VPSRLVQZ128rmbk |
| 24668 | { 17432, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90a2f8024819ULL }, // Inst #17432 = VPSRLVQZ128rmb |
| 24669 | { 17431, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0a2f8024819ULL }, // Inst #17431 = VPSRLVQZ128rm |
| 24670 | { 17430, 3, 1, 0, 837, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1a2b8024829ULL }, // Inst #17430 = VPSRLVQYrr |
| 24671 | { 17429, 7, 1, 0, 847, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1a2b8024819ULL }, // Inst #17429 = VPSRLVQYrm |
| 24672 | { 17428, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xa2b8004829ULL }, // Inst #17428 = VPSRLVDrr |
| 24673 | { 17427, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xa2b8004819ULL }, // Inst #17427 = VPSRLVDrm |
| 24674 | { 17426, 4, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeea2f8004829ULL }, // Inst #17426 = VPSRLVDZrrkz |
| 24675 | { 17425, 5, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeaa2f8004829ULL }, // Inst #17425 = VPSRLVDZrrk |
| 24676 | { 17424, 3, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8a2f8004829ULL }, // Inst #17424 = VPSRLVDZrr |
| 24677 | { 17423, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeea2f8004819ULL }, // Inst #17423 = VPSRLVDZrmkz |
| 24678 | { 17422, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaa2f8004819ULL }, // Inst #17422 = VPSRLVDZrmk |
| 24679 | { 17421, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7ea2f8004819ULL }, // Inst #17421 = VPSRLVDZrmbkz |
| 24680 | { 17420, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aa2f8004819ULL }, // Inst #17420 = VPSRLVDZrmbk |
| 24681 | { 17419, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78a2f8004819ULL }, // Inst #17419 = VPSRLVDZrmb |
| 24682 | { 17418, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8a2f8004819ULL }, // Inst #17418 = VPSRLVDZrm |
| 24683 | { 17417, 4, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc7a2f8004829ULL }, // Inst #17417 = VPSRLVDZ256rrkz |
| 24684 | { 17416, 5, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3a2f8004829ULL }, // Inst #17416 = VPSRLVDZ256rrk |
| 24685 | { 17415, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1a2f8004829ULL }, // Inst #17415 = VPSRLVDZ256rr |
| 24686 | { 17414, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7a2f8004819ULL }, // Inst #17414 = VPSRLVDZ256rmkz |
| 24687 | { 17413, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3a2f8004819ULL }, // Inst #17413 = VPSRLVDZ256rmk |
| 24688 | { 17412, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77a2f8004819ULL }, // Inst #17412 = VPSRLVDZ256rmbkz |
| 24689 | { 17411, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73a2f8004819ULL }, // Inst #17411 = VPSRLVDZ256rmbk |
| 24690 | { 17410, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71a2f8004819ULL }, // Inst #17410 = VPSRLVDZ256rmb |
| 24691 | { 17409, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1a2f8004819ULL }, // Inst #17409 = VPSRLVDZ256rm |
| 24692 | { 17408, 4, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6a2f8004829ULL }, // Inst #17408 = VPSRLVDZ128rrkz |
| 24693 | { 17407, 5, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2a2f8004829ULL }, // Inst #17407 = VPSRLVDZ128rrk |
| 24694 | { 17406, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0a2f8004829ULL }, // Inst #17406 = VPSRLVDZ128rr |
| 24695 | { 17405, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6a2f8004819ULL }, // Inst #17405 = VPSRLVDZ128rmkz |
| 24696 | { 17404, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2a2f8004819ULL }, // Inst #17404 = VPSRLVDZ128rmk |
| 24697 | { 17403, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76a2f8004819ULL }, // Inst #17403 = VPSRLVDZ128rmbkz |
| 24698 | { 17402, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72a2f8004819ULL }, // Inst #17402 = VPSRLVDZ128rmbk |
| 24699 | { 17401, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70a2f8004819ULL }, // Inst #17401 = VPSRLVDZ128rmb |
| 24700 | { 17400, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0a2f8004819ULL }, // Inst #17400 = VPSRLVDZ128rm |
| 24701 | { 17399, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1a2b8004829ULL }, // Inst #17399 = VPSRLVDYrr |
| 24702 | { 17398, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1a2b8004819ULL }, // Inst #17398 = VPSRLVDYrm |
| 24703 | { 17397, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xe9b8002829ULL }, // Inst #17397 = VPSRLQrr |
| 24704 | { 17396, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xe9b8002819ULL }, // Inst #17396 = VPSRLQrm |
| 24705 | { 17395, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0xb9b8042832ULL }, // Inst #17395 = VPSRLQri |
| 24706 | { 17394, 4, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5655, 0, 0xaee9f8022829ULL }, // Inst #17394 = VPSRLQZrrkz |
| 24707 | { 17393, 5, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5650, 0, 0xaae9f8022829ULL }, // Inst #17393 = VPSRLQZrrk |
| 24708 | { 17392, 3, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5629, 0, 0xa8e9f8022829ULL }, // Inst #17392 = VPSRLQZrr |
| 24709 | { 17391, 8, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xaee9f8022819ULL }, // Inst #17391 = VPSRLQZrmkz |
| 24710 | { 17390, 9, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xaae9f8022819ULL }, // Inst #17390 = VPSRLQZrmk |
| 24711 | { 17389, 7, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xa8e9f8022819ULL }, // Inst #17389 = VPSRLQZrm |
| 24712 | { 17388, 4, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4261, 0, 0xeeb9f8062832ULL }, // Inst #17388 = VPSRLQZrikz |
| 24713 | { 17387, 5, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4256, 0, 0xeab9f8062832ULL }, // Inst #17387 = VPSRLQZrik |
| 24714 | { 17386, 3, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b9f8062832ULL }, // Inst #17386 = VPSRLQZri |
| 24715 | { 17385, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8062822ULL }, // Inst #17385 = VPSRLQZmikz |
| 24716 | { 17384, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0xeab9f8062822ULL }, // Inst #17384 = VPSRLQZmik |
| 24717 | { 17383, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8062822ULL }, // Inst #17383 = VPSRLQZmi |
| 24718 | { 17382, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0x9eb9f8062822ULL }, // Inst #17382 = VPSRLQZmbikz |
| 24719 | { 17381, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0x9ab9f8062822ULL }, // Inst #17381 = VPSRLQZmbik |
| 24720 | { 17380, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x98b9f8062822ULL }, // Inst #17380 = VPSRLQZmbi |
| 24721 | { 17379, 4, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5646, 0, 0xa7e9f8022829ULL }, // Inst #17379 = VPSRLQZ256rrkz |
| 24722 | { 17378, 5, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5641, 0, 0xa3e9f8022829ULL }, // Inst #17378 = VPSRLQZ256rrk |
| 24723 | { 17377, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5617, 0, 0xa1e9f8022829ULL }, // Inst #17377 = VPSRLQZ256rr |
| 24724 | { 17376, 8, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xa7e9f8022819ULL }, // Inst #17376 = VPSRLQZ256rmkz |
| 24725 | { 17375, 9, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xa3e9f8022819ULL }, // Inst #17375 = VPSRLQZ256rmk |
| 24726 | { 17374, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xa1e9f8022819ULL }, // Inst #17374 = VPSRLQZ256rm |
| 24727 | { 17373, 4, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4225, 0, 0xc7b9f8062832ULL }, // Inst #17373 = VPSRLQZ256rikz |
| 24728 | { 17372, 5, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4220, 0, 0xc3b9f8062832ULL }, // Inst #17372 = VPSRLQZ256rik |
| 24729 | { 17371, 3, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b9f8062832ULL }, // Inst #17371 = VPSRLQZ256ri |
| 24730 | { 17370, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8062822ULL }, // Inst #17370 = VPSRLQZ256mikz |
| 24731 | { 17369, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8062822ULL }, // Inst #17369 = VPSRLQZ256mik |
| 24732 | { 17368, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8062822ULL }, // Inst #17368 = VPSRLQZ256mi |
| 24733 | { 17367, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0x97b9f8062822ULL }, // Inst #17367 = VPSRLQZ256mbikz |
| 24734 | { 17366, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0x93b9f8062822ULL }, // Inst #17366 = VPSRLQZ256mbik |
| 24735 | { 17365, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x91b9f8062822ULL }, // Inst #17365 = VPSRLQZ256mbi |
| 24736 | { 17364, 4, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6e9f8022829ULL }, // Inst #17364 = VPSRLQZ128rrkz |
| 24737 | { 17363, 5, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2e9f8022829ULL }, // Inst #17363 = VPSRLQZ128rrk |
| 24738 | { 17362, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0e9f8022829ULL }, // Inst #17362 = VPSRLQZ128rr |
| 24739 | { 17361, 8, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6e9f8022819ULL }, // Inst #17361 = VPSRLQZ128rmkz |
| 24740 | { 17360, 9, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2e9f8022819ULL }, // Inst #17360 = VPSRLQZ128rmk |
| 24741 | { 17359, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0e9f8022819ULL }, // Inst #17359 = VPSRLQZ128rm |
| 24742 | { 17358, 4, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 4189, 0, 0xa6b9f8062832ULL }, // Inst #17358 = VPSRLQZ128rikz |
| 24743 | { 17357, 5, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 4184, 0, 0xa2b9f8062832ULL }, // Inst #17357 = VPSRLQZ128rik |
| 24744 | { 17356, 3, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b9f8062832ULL }, // Inst #17356 = VPSRLQZ128ri |
| 24745 | { 17355, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8062822ULL }, // Inst #17355 = VPSRLQZ128mikz |
| 24746 | { 17354, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8062822ULL }, // Inst #17354 = VPSRLQZ128mik |
| 24747 | { 17353, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8062822ULL }, // Inst #17353 = VPSRLQZ128mi |
| 24748 | { 17352, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0x96b9f8062822ULL }, // Inst #17352 = VPSRLQZ128mbikz |
| 24749 | { 17351, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0x92b9f8062822ULL }, // Inst #17351 = VPSRLQZ128mbik |
| 24750 | { 17350, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x90b9f8062822ULL }, // Inst #17350 = VPSRLQZ128mbi |
| 24751 | { 17349, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5614, 0, 0x1e9b8002829ULL }, // Inst #17349 = VPSRLQYrr |
| 24752 | { 17348, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1e9b8002819ULL }, // Inst #17348 = VPSRLQYrm |
| 24753 | { 17347, 3, 1, 0, 548, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x1b9b8042832ULL }, // Inst #17347 = VPSRLQYri |
| 24754 | { 17346, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xe938002829ULL }, // Inst #17346 = VPSRLDrr |
| 24755 | { 17345, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xe938002819ULL }, // Inst #17345 = VPSRLDrm |
| 24756 | { 17344, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0xb938042832ULL }, // Inst #17344 = VPSRLDri |
| 24757 | { 17343, 4, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5637, 0, 0xaee978002829ULL }, // Inst #17343 = VPSRLDZrrkz |
| 24758 | { 17342, 5, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5632, 0, 0xaae978002829ULL }, // Inst #17342 = VPSRLDZrrk |
| 24759 | { 17341, 3, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5629, 0, 0xa8e978002829ULL }, // Inst #17341 = VPSRLDZrr |
| 24760 | { 17340, 8, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xaee978002819ULL }, // Inst #17340 = VPSRLDZrmkz |
| 24761 | { 17339, 9, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xaae978002819ULL }, // Inst #17339 = VPSRLDZrmk |
| 24762 | { 17338, 7, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xa8e978002819ULL }, // Inst #17338 = VPSRLDZrm |
| 24763 | { 17337, 4, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4408, 0, 0xeeb978042832ULL }, // Inst #17337 = VPSRLDZrikz |
| 24764 | { 17336, 5, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4403, 0, 0xeab978042832ULL }, // Inst #17336 = VPSRLDZrik |
| 24765 | { 17335, 3, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b978042832ULL }, // Inst #17335 = VPSRLDZri |
| 24766 | { 17334, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0xeeb978042822ULL }, // Inst #17334 = VPSRLDZmikz |
| 24767 | { 17333, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0xeab978042822ULL }, // Inst #17333 = VPSRLDZmik |
| 24768 | { 17332, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b978042822ULL }, // Inst #17332 = VPSRLDZmi |
| 24769 | { 17331, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0x7eb978042822ULL }, // Inst #17331 = VPSRLDZmbikz |
| 24770 | { 17330, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0x7ab978042822ULL }, // Inst #17330 = VPSRLDZmbik |
| 24771 | { 17329, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x78b978042822ULL }, // Inst #17329 = VPSRLDZmbi |
| 24772 | { 17328, 4, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5625, 0, 0xa7e978002829ULL }, // Inst #17328 = VPSRLDZ256rrkz |
| 24773 | { 17327, 5, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5620, 0, 0xa3e978002829ULL }, // Inst #17327 = VPSRLDZ256rrk |
| 24774 | { 17326, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5617, 0, 0xa1e978002829ULL }, // Inst #17326 = VPSRLDZ256rr |
| 24775 | { 17325, 8, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xa7e978002819ULL }, // Inst #17325 = VPSRLDZ256rmkz |
| 24776 | { 17324, 9, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xa3e978002819ULL }, // Inst #17324 = VPSRLDZ256rmk |
| 24777 | { 17323, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xa1e978002819ULL }, // Inst #17323 = VPSRLDZ256rm |
| 24778 | { 17322, 4, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4382, 0, 0xc7b978042832ULL }, // Inst #17322 = VPSRLDZ256rikz |
| 24779 | { 17321, 5, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4377, 0, 0xc3b978042832ULL }, // Inst #17321 = VPSRLDZ256rik |
| 24780 | { 17320, 3, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b978042832ULL }, // Inst #17320 = VPSRLDZ256ri |
| 24781 | { 17319, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0xc7b978042822ULL }, // Inst #17319 = VPSRLDZ256mikz |
| 24782 | { 17318, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0xc3b978042822ULL }, // Inst #17318 = VPSRLDZ256mik |
| 24783 | { 17317, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b978042822ULL }, // Inst #17317 = VPSRLDZ256mi |
| 24784 | { 17316, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0x77b978042822ULL }, // Inst #17316 = VPSRLDZ256mbikz |
| 24785 | { 17315, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0x73b978042822ULL }, // Inst #17315 = VPSRLDZ256mbik |
| 24786 | { 17314, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x71b978042822ULL }, // Inst #17314 = VPSRLDZ256mbi |
| 24787 | { 17313, 4, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6e978002829ULL }, // Inst #17313 = VPSRLDZ128rrkz |
| 24788 | { 17312, 5, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2e978002829ULL }, // Inst #17312 = VPSRLDZ128rrk |
| 24789 | { 17311, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0e978002829ULL }, // Inst #17311 = VPSRLDZ128rr |
| 24790 | { 17310, 8, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6e978002819ULL }, // Inst #17310 = VPSRLDZ128rmkz |
| 24791 | { 17309, 9, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2e978002819ULL }, // Inst #17309 = VPSRLDZ128rmk |
| 24792 | { 17308, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0e978002819ULL }, // Inst #17308 = VPSRLDZ128rm |
| 24793 | { 17307, 4, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3044, 0, 0xa6b978042832ULL }, // Inst #17307 = VPSRLDZ128rikz |
| 24794 | { 17306, 5, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3039, 0, 0xa2b978042832ULL }, // Inst #17306 = VPSRLDZ128rik |
| 24795 | { 17305, 3, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b978042832ULL }, // Inst #17305 = VPSRLDZ128ri |
| 24796 | { 17304, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0xa6b978042822ULL }, // Inst #17304 = VPSRLDZ128mikz |
| 24797 | { 17303, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0xa2b978042822ULL }, // Inst #17303 = VPSRLDZ128mik |
| 24798 | { 17302, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b978042822ULL }, // Inst #17302 = VPSRLDZ128mi |
| 24799 | { 17301, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0x76b978042822ULL }, // Inst #17301 = VPSRLDZ128mbikz |
| 24800 | { 17300, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0x72b978042822ULL }, // Inst #17300 = VPSRLDZ128mbik |
| 24801 | { 17299, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x70b978042822ULL }, // Inst #17299 = VPSRLDZ128mbi |
| 24802 | { 17298, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5614, 0, 0x1e938002829ULL }, // Inst #17298 = VPSRLDYrr |
| 24803 | { 17297, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1e938002819ULL }, // Inst #17297 = VPSRLDYrm |
| 24804 | { 17296, 3, 1, 0, 548, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x1b938042832ULL }, // Inst #17296 = VPSRLDYri |
| 24805 | { 17295, 3, 1, 0, 1093, 0, 0, X86ImpOpBase + 0, 544, 0, 0xb9b8042833ULL }, // Inst #17295 = VPSRLDQri |
| 24806 | { 17294, 3, 1, 0, 1094, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b9f0042833ULL }, // Inst #17294 = VPSRLDQZri |
| 24807 | { 17293, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b9f0042823ULL }, // Inst #17293 = VPSRLDQZmi |
| 24808 | { 17292, 3, 1, 0, 1092, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b9f0042833ULL }, // Inst #17292 = VPSRLDQZ256ri |
| 24809 | { 17291, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b9f0042823ULL }, // Inst #17291 = VPSRLDQZ256mi |
| 24810 | { 17290, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b9f0042833ULL }, // Inst #17290 = VPSRLDQZ128ri |
| 24811 | { 17289, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b9f0042823ULL }, // Inst #17289 = VPSRLDQZ128mi |
| 24812 | { 17288, 3, 1, 0, 1092, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x1b9b8042833ULL }, // Inst #17288 = VPSRLDQYri |
| 24813 | { 17287, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xf0b8002829ULL }, // Inst #17287 = VPSRAWrr |
| 24814 | { 17286, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf0b8002819ULL }, // Inst #17286 = VPSRAWrm |
| 24815 | { 17285, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0xb8b8042834ULL }, // Inst #17285 = VPSRAWri |
| 24816 | { 17284, 4, 1, 0, 2262, 0, 0, X86ImpOpBase + 0, 5673, 0, 0xaef0f8002829ULL }, // Inst #17284 = VPSRAWZrrkz |
| 24817 | { 17283, 5, 1, 0, 2262, 0, 0, X86ImpOpBase + 0, 5668, 0, 0xaaf0f8002829ULL }, // Inst #17283 = VPSRAWZrrk |
| 24818 | { 17282, 3, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5629, 0, 0xa8f0f8002829ULL }, // Inst #17282 = VPSRAWZrr |
| 24819 | { 17281, 8, 1, 0, 1821, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xaef0f8002819ULL }, // Inst #17281 = VPSRAWZrmkz |
| 24820 | { 17280, 9, 1, 0, 1821, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xaaf0f8002819ULL }, // Inst #17280 = VPSRAWZrmk |
| 24821 | { 17279, 7, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xa8f0f8002819ULL }, // Inst #17279 = VPSRAWZrm |
| 24822 | { 17278, 4, 1, 0, 1772, 0, 0, X86ImpOpBase + 0, 4339, 0, 0xeeb8f8042834ULL }, // Inst #17278 = VPSRAWZrikz |
| 24823 | { 17277, 5, 1, 0, 1772, 0, 0, X86ImpOpBase + 0, 4334, 0, 0xeab8f8042834ULL }, // Inst #17277 = VPSRAWZrik |
| 24824 | { 17276, 3, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b8f8042834ULL }, // Inst #17276 = VPSRAWZri |
| 24825 | { 17275, 8, 1, 0, 1817, 0, 0, X86ImpOpBase + 0, 4326, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8042824ULL }, // Inst #17275 = VPSRAWZmikz |
| 24826 | { 17274, 9, 1, 0, 1817, 0, 0, X86ImpOpBase + 0, 4317, 0|(1ULL<<MCID::MayLoad), 0xeab8f8042824ULL }, // Inst #17274 = VPSRAWZmik |
| 24827 | { 17273, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8042824ULL }, // Inst #17273 = VPSRAWZmi |
| 24828 | { 17272, 4, 1, 0, 1782, 0, 0, X86ImpOpBase + 0, 5664, 0, 0xa7f0f8002829ULL }, // Inst #17272 = VPSRAWZ256rrkz |
| 24829 | { 17271, 5, 1, 0, 1782, 0, 0, X86ImpOpBase + 0, 5659, 0, 0xa3f0f8002829ULL }, // Inst #17271 = VPSRAWZ256rrk |
| 24830 | { 17270, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5617, 0, 0xa1f0f8002829ULL }, // Inst #17270 = VPSRAWZ256rr |
| 24831 | { 17269, 8, 1, 0, 2023, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xa7f0f8002819ULL }, // Inst #17269 = VPSRAWZ256rmkz |
| 24832 | { 17268, 9, 1, 0, 2023, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xa3f0f8002819ULL }, // Inst #17268 = VPSRAWZ256rmk |
| 24833 | { 17267, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xa1f0f8002819ULL }, // Inst #17267 = VPSRAWZ256rm |
| 24834 | { 17266, 4, 1, 0, 2258, 0, 0, X86ImpOpBase + 0, 4313, 0, 0xc7b8f8042834ULL }, // Inst #17266 = VPSRAWZ256rikz |
| 24835 | { 17265, 5, 1, 0, 2258, 0, 0, X86ImpOpBase + 0, 4308, 0, 0xc3b8f8042834ULL }, // Inst #17265 = VPSRAWZ256rik |
| 24836 | { 17264, 3, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b8f8042834ULL }, // Inst #17264 = VPSRAWZ256ri |
| 24837 | { 17263, 8, 1, 0, 2014, 0, 0, X86ImpOpBase + 0, 4300, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8042824ULL }, // Inst #17263 = VPSRAWZ256mikz |
| 24838 | { 17262, 9, 1, 0, 2014, 0, 0, X86ImpOpBase + 0, 4291, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8042824ULL }, // Inst #17262 = VPSRAWZ256mik |
| 24839 | { 17261, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8042824ULL }, // Inst #17261 = VPSRAWZ256mi |
| 24840 | { 17260, 4, 1, 0, 2353, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6f0f8002829ULL }, // Inst #17260 = VPSRAWZ128rrkz |
| 24841 | { 17259, 5, 1, 0, 2353, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2f0f8002829ULL }, // Inst #17259 = VPSRAWZ128rrk |
| 24842 | { 17258, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0f0f8002829ULL }, // Inst #17258 = VPSRAWZ128rr |
| 24843 | { 17257, 8, 1, 0, 2019, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6f0f8002819ULL }, // Inst #17257 = VPSRAWZ128rmkz |
| 24844 | { 17256, 9, 1, 0, 2019, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2f0f8002819ULL }, // Inst #17256 = VPSRAWZ128rmk |
| 24845 | { 17255, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f0f8002819ULL }, // Inst #17255 = VPSRAWZ128rm |
| 24846 | { 17254, 4, 1, 0, 2257, 0, 0, X86ImpOpBase + 0, 4287, 0, 0xa6b8f8042834ULL }, // Inst #17254 = VPSRAWZ128rikz |
| 24847 | { 17253, 5, 1, 0, 2257, 0, 0, X86ImpOpBase + 0, 4282, 0, 0xa2b8f8042834ULL }, // Inst #17253 = VPSRAWZ128rik |
| 24848 | { 17252, 3, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b8f8042834ULL }, // Inst #17252 = VPSRAWZ128ri |
| 24849 | { 17251, 8, 1, 0, 2013, 0, 0, X86ImpOpBase + 0, 4274, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8042824ULL }, // Inst #17251 = VPSRAWZ128mikz |
| 24850 | { 17250, 9, 1, 0, 2013, 0, 0, X86ImpOpBase + 0, 4265, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8042824ULL }, // Inst #17250 = VPSRAWZ128mik |
| 24851 | { 17249, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8042824ULL }, // Inst #17249 = VPSRAWZ128mi |
| 24852 | { 17248, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5614, 0, 0x1f0b8002829ULL }, // Inst #17248 = VPSRAWYrr |
| 24853 | { 17247, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f0b8002819ULL }, // Inst #17247 = VPSRAWYrm |
| 24854 | { 17246, 3, 1, 0, 548, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x1b8b8042834ULL }, // Inst #17246 = VPSRAWYri |
| 24855 | { 17245, 4, 1, 0, 1771, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xee88f8024829ULL }, // Inst #17245 = VPSRAVWZrrkz |
| 24856 | { 17244, 5, 1, 0, 1771, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xea88f8024829ULL }, // Inst #17244 = VPSRAVWZrrk |
| 24857 | { 17243, 3, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe888f8024829ULL }, // Inst #17243 = VPSRAVWZrr |
| 24858 | { 17242, 8, 1, 0, 1820, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xee88f8024819ULL }, // Inst #17242 = VPSRAVWZrmkz |
| 24859 | { 17241, 9, 1, 0, 1820, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xea88f8024819ULL }, // Inst #17241 = VPSRAVWZrmk |
| 24860 | { 17240, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe888f8024819ULL }, // Inst #17240 = VPSRAVWZrm |
| 24861 | { 17239, 4, 1, 0, 2256, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc788f8024829ULL }, // Inst #17239 = VPSRAVWZ256rrkz |
| 24862 | { 17238, 5, 1, 0, 2256, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc388f8024829ULL }, // Inst #17238 = VPSRAVWZ256rrk |
| 24863 | { 17237, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc188f8024829ULL }, // Inst #17237 = VPSRAVWZ256rr |
| 24864 | { 17236, 8, 1, 0, 2022, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc788f8024819ULL }, // Inst #17236 = VPSRAVWZ256rmkz |
| 24865 | { 17235, 9, 1, 0, 2022, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc388f8024819ULL }, // Inst #17235 = VPSRAVWZ256rmk |
| 24866 | { 17234, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc188f8024819ULL }, // Inst #17234 = VPSRAVWZ256rm |
| 24867 | { 17233, 4, 1, 0, 2255, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa688f8024829ULL }, // Inst #17233 = VPSRAVWZ128rrkz |
| 24868 | { 17232, 5, 1, 0, 2255, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa288f8024829ULL }, // Inst #17232 = VPSRAVWZ128rrk |
| 24869 | { 17231, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa088f8024829ULL }, // Inst #17231 = VPSRAVWZ128rr |
| 24870 | { 17230, 8, 1, 0, 2018, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa688f8024819ULL }, // Inst #17230 = VPSRAVWZ128rmkz |
| 24871 | { 17229, 9, 1, 0, 2018, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa288f8024819ULL }, // Inst #17229 = VPSRAVWZ128rmk |
| 24872 | { 17228, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa088f8024819ULL }, // Inst #17228 = VPSRAVWZ128rm |
| 24873 | { 17227, 4, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeea378024829ULL }, // Inst #17227 = VPSRAVQZrrkz |
| 24874 | { 17226, 5, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeaa378024829ULL }, // Inst #17226 = VPSRAVQZrrk |
| 24875 | { 17225, 3, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8a378024829ULL }, // Inst #17225 = VPSRAVQZrr |
| 24876 | { 17224, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeea378024819ULL }, // Inst #17224 = VPSRAVQZrmkz |
| 24877 | { 17223, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaa378024819ULL }, // Inst #17223 = VPSRAVQZrmk |
| 24878 | { 17222, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9ea378024819ULL }, // Inst #17222 = VPSRAVQZrmbkz |
| 24879 | { 17221, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aa378024819ULL }, // Inst #17221 = VPSRAVQZrmbk |
| 24880 | { 17220, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98a378024819ULL }, // Inst #17220 = VPSRAVQZrmb |
| 24881 | { 17219, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8a378024819ULL }, // Inst #17219 = VPSRAVQZrm |
| 24882 | { 17218, 4, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc7a378024829ULL }, // Inst #17218 = VPSRAVQZ256rrkz |
| 24883 | { 17217, 5, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3a378024829ULL }, // Inst #17217 = VPSRAVQZ256rrk |
| 24884 | { 17216, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1a378024829ULL }, // Inst #17216 = VPSRAVQZ256rr |
| 24885 | { 17215, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7a378024819ULL }, // Inst #17215 = VPSRAVQZ256rmkz |
| 24886 | { 17214, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3a378024819ULL }, // Inst #17214 = VPSRAVQZ256rmk |
| 24887 | { 17213, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97a378024819ULL }, // Inst #17213 = VPSRAVQZ256rmbkz |
| 24888 | { 17212, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93a378024819ULL }, // Inst #17212 = VPSRAVQZ256rmbk |
| 24889 | { 17211, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91a378024819ULL }, // Inst #17211 = VPSRAVQZ256rmb |
| 24890 | { 17210, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1a378024819ULL }, // Inst #17210 = VPSRAVQZ256rm |
| 24891 | { 17209, 4, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6a378024829ULL }, // Inst #17209 = VPSRAVQZ128rrkz |
| 24892 | { 17208, 5, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2a378024829ULL }, // Inst #17208 = VPSRAVQZ128rrk |
| 24893 | { 17207, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0a378024829ULL }, // Inst #17207 = VPSRAVQZ128rr |
| 24894 | { 17206, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6a378024819ULL }, // Inst #17206 = VPSRAVQZ128rmkz |
| 24895 | { 17205, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2a378024819ULL }, // Inst #17205 = VPSRAVQZ128rmk |
| 24896 | { 17204, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96a378024819ULL }, // Inst #17204 = VPSRAVQZ128rmbkz |
| 24897 | { 17203, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92a378024819ULL }, // Inst #17203 = VPSRAVQZ128rmbk |
| 24898 | { 17202, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90a378024819ULL }, // Inst #17202 = VPSRAVQZ128rmb |
| 24899 | { 17201, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0a378024819ULL }, // Inst #17201 = VPSRAVQZ128rm |
| 24900 | { 17200, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xa338004829ULL }, // Inst #17200 = VPSRAVDrr |
| 24901 | { 17199, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xa338004819ULL }, // Inst #17199 = VPSRAVDrm |
| 24902 | { 17198, 4, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeea378004829ULL }, // Inst #17198 = VPSRAVDZrrkz |
| 24903 | { 17197, 5, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeaa378004829ULL }, // Inst #17197 = VPSRAVDZrrk |
| 24904 | { 17196, 3, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8a378004829ULL }, // Inst #17196 = VPSRAVDZrr |
| 24905 | { 17195, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeea378004819ULL }, // Inst #17195 = VPSRAVDZrmkz |
| 24906 | { 17194, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaa378004819ULL }, // Inst #17194 = VPSRAVDZrmk |
| 24907 | { 17193, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7ea378004819ULL }, // Inst #17193 = VPSRAVDZrmbkz |
| 24908 | { 17192, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aa378004819ULL }, // Inst #17192 = VPSRAVDZrmbk |
| 24909 | { 17191, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78a378004819ULL }, // Inst #17191 = VPSRAVDZrmb |
| 24910 | { 17190, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8a378004819ULL }, // Inst #17190 = VPSRAVDZrm |
| 24911 | { 17189, 4, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc7a378004829ULL }, // Inst #17189 = VPSRAVDZ256rrkz |
| 24912 | { 17188, 5, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3a378004829ULL }, // Inst #17188 = VPSRAVDZ256rrk |
| 24913 | { 17187, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1a378004829ULL }, // Inst #17187 = VPSRAVDZ256rr |
| 24914 | { 17186, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7a378004819ULL }, // Inst #17186 = VPSRAVDZ256rmkz |
| 24915 | { 17185, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3a378004819ULL }, // Inst #17185 = VPSRAVDZ256rmk |
| 24916 | { 17184, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77a378004819ULL }, // Inst #17184 = VPSRAVDZ256rmbkz |
| 24917 | { 17183, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73a378004819ULL }, // Inst #17183 = VPSRAVDZ256rmbk |
| 24918 | { 17182, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71a378004819ULL }, // Inst #17182 = VPSRAVDZ256rmb |
| 24919 | { 17181, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1a378004819ULL }, // Inst #17181 = VPSRAVDZ256rm |
| 24920 | { 17180, 4, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6a378004829ULL }, // Inst #17180 = VPSRAVDZ128rrkz |
| 24921 | { 17179, 5, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2a378004829ULL }, // Inst #17179 = VPSRAVDZ128rrk |
| 24922 | { 17178, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0a378004829ULL }, // Inst #17178 = VPSRAVDZ128rr |
| 24923 | { 17177, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6a378004819ULL }, // Inst #17177 = VPSRAVDZ128rmkz |
| 24924 | { 17176, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2a378004819ULL }, // Inst #17176 = VPSRAVDZ128rmk |
| 24925 | { 17175, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76a378004819ULL }, // Inst #17175 = VPSRAVDZ128rmbkz |
| 24926 | { 17174, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72a378004819ULL }, // Inst #17174 = VPSRAVDZ128rmbk |
| 24927 | { 17173, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70a378004819ULL }, // Inst #17173 = VPSRAVDZ128rmb |
| 24928 | { 17172, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0a378004819ULL }, // Inst #17172 = VPSRAVDZ128rm |
| 24929 | { 17171, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1a338004829ULL }, // Inst #17171 = VPSRAVDYrr |
| 24930 | { 17170, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1a338004819ULL }, // Inst #17170 = VPSRAVDYrm |
| 24931 | { 17169, 4, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5655, 0, 0xaef178022829ULL }, // Inst #17169 = VPSRAQZrrkz |
| 24932 | { 17168, 5, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5650, 0, 0xaaf178022829ULL }, // Inst #17168 = VPSRAQZrrk |
| 24933 | { 17167, 3, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5629, 0, 0xa8f178022829ULL }, // Inst #17167 = VPSRAQZrr |
| 24934 | { 17166, 8, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xaef178022819ULL }, // Inst #17166 = VPSRAQZrmkz |
| 24935 | { 17165, 9, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xaaf178022819ULL }, // Inst #17165 = VPSRAQZrmk |
| 24936 | { 17164, 7, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xa8f178022819ULL }, // Inst #17164 = VPSRAQZrm |
| 24937 | { 17163, 4, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4261, 0, 0xeeb978062834ULL }, // Inst #17163 = VPSRAQZrikz |
| 24938 | { 17162, 5, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4256, 0, 0xeab978062834ULL }, // Inst #17162 = VPSRAQZrik |
| 24939 | { 17161, 3, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b978062834ULL }, // Inst #17161 = VPSRAQZri |
| 24940 | { 17160, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0xeeb978062824ULL }, // Inst #17160 = VPSRAQZmikz |
| 24941 | { 17159, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0xeab978062824ULL }, // Inst #17159 = VPSRAQZmik |
| 24942 | { 17158, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b978062824ULL }, // Inst #17158 = VPSRAQZmi |
| 24943 | { 17157, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0x9eb978062824ULL }, // Inst #17157 = VPSRAQZmbikz |
| 24944 | { 17156, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0x9ab978062824ULL }, // Inst #17156 = VPSRAQZmbik |
| 24945 | { 17155, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x98b978062824ULL }, // Inst #17155 = VPSRAQZmbi |
| 24946 | { 17154, 4, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5646, 0, 0xa7f178022829ULL }, // Inst #17154 = VPSRAQZ256rrkz |
| 24947 | { 17153, 5, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5641, 0, 0xa3f178022829ULL }, // Inst #17153 = VPSRAQZ256rrk |
| 24948 | { 17152, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5617, 0, 0xa1f178022829ULL }, // Inst #17152 = VPSRAQZ256rr |
| 24949 | { 17151, 8, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xa7f178022819ULL }, // Inst #17151 = VPSRAQZ256rmkz |
| 24950 | { 17150, 9, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xa3f178022819ULL }, // Inst #17150 = VPSRAQZ256rmk |
| 24951 | { 17149, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xa1f178022819ULL }, // Inst #17149 = VPSRAQZ256rm |
| 24952 | { 17148, 4, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4225, 0, 0xc7b978062834ULL }, // Inst #17148 = VPSRAQZ256rikz |
| 24953 | { 17147, 5, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4220, 0, 0xc3b978062834ULL }, // Inst #17147 = VPSRAQZ256rik |
| 24954 | { 17146, 3, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b978062834ULL }, // Inst #17146 = VPSRAQZ256ri |
| 24955 | { 17145, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0xc7b978062824ULL }, // Inst #17145 = VPSRAQZ256mikz |
| 24956 | { 17144, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0xc3b978062824ULL }, // Inst #17144 = VPSRAQZ256mik |
| 24957 | { 17143, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b978062824ULL }, // Inst #17143 = VPSRAQZ256mi |
| 24958 | { 17142, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0x97b978062824ULL }, // Inst #17142 = VPSRAQZ256mbikz |
| 24959 | { 17141, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0x93b978062824ULL }, // Inst #17141 = VPSRAQZ256mbik |
| 24960 | { 17140, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x91b978062824ULL }, // Inst #17140 = VPSRAQZ256mbi |
| 24961 | { 17139, 4, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6f178022829ULL }, // Inst #17139 = VPSRAQZ128rrkz |
| 24962 | { 17138, 5, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2f178022829ULL }, // Inst #17138 = VPSRAQZ128rrk |
| 24963 | { 17137, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0f178022829ULL }, // Inst #17137 = VPSRAQZ128rr |
| 24964 | { 17136, 8, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6f178022819ULL }, // Inst #17136 = VPSRAQZ128rmkz |
| 24965 | { 17135, 9, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2f178022819ULL }, // Inst #17135 = VPSRAQZ128rmk |
| 24966 | { 17134, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f178022819ULL }, // Inst #17134 = VPSRAQZ128rm |
| 24967 | { 17133, 4, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 4189, 0, 0xa6b978062834ULL }, // Inst #17133 = VPSRAQZ128rikz |
| 24968 | { 17132, 5, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 4184, 0, 0xa2b978062834ULL }, // Inst #17132 = VPSRAQZ128rik |
| 24969 | { 17131, 3, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b978062834ULL }, // Inst #17131 = VPSRAQZ128ri |
| 24970 | { 17130, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0xa6b978062824ULL }, // Inst #17130 = VPSRAQZ128mikz |
| 24971 | { 17129, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0xa2b978062824ULL }, // Inst #17129 = VPSRAQZ128mik |
| 24972 | { 17128, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b978062824ULL }, // Inst #17128 = VPSRAQZ128mi |
| 24973 | { 17127, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0x96b978062824ULL }, // Inst #17127 = VPSRAQZ128mbikz |
| 24974 | { 17126, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0x92b978062824ULL }, // Inst #17126 = VPSRAQZ128mbik |
| 24975 | { 17125, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x90b978062824ULL }, // Inst #17125 = VPSRAQZ128mbi |
| 24976 | { 17124, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xf138002829ULL }, // Inst #17124 = VPSRADrr |
| 24977 | { 17123, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf138002819ULL }, // Inst #17123 = VPSRADrm |
| 24978 | { 17122, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0xb938042834ULL }, // Inst #17122 = VPSRADri |
| 24979 | { 17121, 4, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5637, 0, 0xaef178002829ULL }, // Inst #17121 = VPSRADZrrkz |
| 24980 | { 17120, 5, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5632, 0, 0xaaf178002829ULL }, // Inst #17120 = VPSRADZrrk |
| 24981 | { 17119, 3, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5629, 0, 0xa8f178002829ULL }, // Inst #17119 = VPSRADZrr |
| 24982 | { 17118, 8, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xaef178002819ULL }, // Inst #17118 = VPSRADZrmkz |
| 24983 | { 17117, 9, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xaaf178002819ULL }, // Inst #17117 = VPSRADZrmk |
| 24984 | { 17116, 7, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xa8f178002819ULL }, // Inst #17116 = VPSRADZrm |
| 24985 | { 17115, 4, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4408, 0, 0xeeb978042834ULL }, // Inst #17115 = VPSRADZrikz |
| 24986 | { 17114, 5, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4403, 0, 0xeab978042834ULL }, // Inst #17114 = VPSRADZrik |
| 24987 | { 17113, 3, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b978042834ULL }, // Inst #17113 = VPSRADZri |
| 24988 | { 17112, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0xeeb978042824ULL }, // Inst #17112 = VPSRADZmikz |
| 24989 | { 17111, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0xeab978042824ULL }, // Inst #17111 = VPSRADZmik |
| 24990 | { 17110, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b978042824ULL }, // Inst #17110 = VPSRADZmi |
| 24991 | { 17109, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0x7eb978042824ULL }, // Inst #17109 = VPSRADZmbikz |
| 24992 | { 17108, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0x7ab978042824ULL }, // Inst #17108 = VPSRADZmbik |
| 24993 | { 17107, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x78b978042824ULL }, // Inst #17107 = VPSRADZmbi |
| 24994 | { 17106, 4, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5625, 0, 0xa7f178002829ULL }, // Inst #17106 = VPSRADZ256rrkz |
| 24995 | { 17105, 5, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5620, 0, 0xa3f178002829ULL }, // Inst #17105 = VPSRADZ256rrk |
| 24996 | { 17104, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5617, 0, 0xa1f178002829ULL }, // Inst #17104 = VPSRADZ256rr |
| 24997 | { 17103, 8, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xa7f178002819ULL }, // Inst #17103 = VPSRADZ256rmkz |
| 24998 | { 17102, 9, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xa3f178002819ULL }, // Inst #17102 = VPSRADZ256rmk |
| 24999 | { 17101, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xa1f178002819ULL }, // Inst #17101 = VPSRADZ256rm |
| 25000 | { 17100, 4, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4382, 0, 0xc7b978042834ULL }, // Inst #17100 = VPSRADZ256rikz |
| 25001 | { 17099, 5, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4377, 0, 0xc3b978042834ULL }, // Inst #17099 = VPSRADZ256rik |
| 25002 | { 17098, 3, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b978042834ULL }, // Inst #17098 = VPSRADZ256ri |
| 25003 | { 17097, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0xc7b978042824ULL }, // Inst #17097 = VPSRADZ256mikz |
| 25004 | { 17096, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0xc3b978042824ULL }, // Inst #17096 = VPSRADZ256mik |
| 25005 | { 17095, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b978042824ULL }, // Inst #17095 = VPSRADZ256mi |
| 25006 | { 17094, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0x77b978042824ULL }, // Inst #17094 = VPSRADZ256mbikz |
| 25007 | { 17093, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0x73b978042824ULL }, // Inst #17093 = VPSRADZ256mbik |
| 25008 | { 17092, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x71b978042824ULL }, // Inst #17092 = VPSRADZ256mbi |
| 25009 | { 17091, 4, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6f178002829ULL }, // Inst #17091 = VPSRADZ128rrkz |
| 25010 | { 17090, 5, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2f178002829ULL }, // Inst #17090 = VPSRADZ128rrk |
| 25011 | { 17089, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0f178002829ULL }, // Inst #17089 = VPSRADZ128rr |
| 25012 | { 17088, 8, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6f178002819ULL }, // Inst #17088 = VPSRADZ128rmkz |
| 25013 | { 17087, 9, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2f178002819ULL }, // Inst #17087 = VPSRADZ128rmk |
| 25014 | { 17086, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f178002819ULL }, // Inst #17086 = VPSRADZ128rm |
| 25015 | { 17085, 4, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3044, 0, 0xa6b978042834ULL }, // Inst #17085 = VPSRADZ128rikz |
| 25016 | { 17084, 5, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3039, 0, 0xa2b978042834ULL }, // Inst #17084 = VPSRADZ128rik |
| 25017 | { 17083, 3, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b978042834ULL }, // Inst #17083 = VPSRADZ128ri |
| 25018 | { 17082, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0xa6b978042824ULL }, // Inst #17082 = VPSRADZ128mikz |
| 25019 | { 17081, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0xa2b978042824ULL }, // Inst #17081 = VPSRADZ128mik |
| 25020 | { 17080, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b978042824ULL }, // Inst #17080 = VPSRADZ128mi |
| 25021 | { 17079, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0x76b978042824ULL }, // Inst #17079 = VPSRADZ128mbikz |
| 25022 | { 17078, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0x72b978042824ULL }, // Inst #17078 = VPSRADZ128mbik |
| 25023 | { 17077, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x70b978042824ULL }, // Inst #17077 = VPSRADZ128mbi |
| 25024 | { 17076, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5614, 0, 0x1f138002829ULL }, // Inst #17076 = VPSRADYrr |
| 25025 | { 17075, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f138002819ULL }, // Inst #17075 = VPSRADYrm |
| 25026 | { 17074, 3, 1, 0, 548, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x1b938042834ULL }, // Inst #17074 = VPSRADYri |
| 25027 | { 17073, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xf8b8002829ULL }, // Inst #17073 = VPSLLWrr |
| 25028 | { 17072, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf8b8002819ULL }, // Inst #17072 = VPSLLWrm |
| 25029 | { 17071, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0xb8b8042836ULL }, // Inst #17071 = VPSLLWri |
| 25030 | { 17070, 4, 1, 0, 2262, 0, 0, X86ImpOpBase + 0, 5673, 0, 0xaef8f8002829ULL }, // Inst #17070 = VPSLLWZrrkz |
| 25031 | { 17069, 5, 1, 0, 2262, 0, 0, X86ImpOpBase + 0, 5668, 0, 0xaaf8f8002829ULL }, // Inst #17069 = VPSLLWZrrk |
| 25032 | { 17068, 3, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5629, 0, 0xa8f8f8002829ULL }, // Inst #17068 = VPSLLWZrr |
| 25033 | { 17067, 8, 1, 0, 1821, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xaef8f8002819ULL }, // Inst #17067 = VPSLLWZrmkz |
| 25034 | { 17066, 9, 1, 0, 1821, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xaaf8f8002819ULL }, // Inst #17066 = VPSLLWZrmk |
| 25035 | { 17065, 7, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xa8f8f8002819ULL }, // Inst #17065 = VPSLLWZrm |
| 25036 | { 17064, 4, 1, 0, 1772, 0, 0, X86ImpOpBase + 0, 4339, 0, 0xeeb8f8042836ULL }, // Inst #17064 = VPSLLWZrikz |
| 25037 | { 17063, 5, 1, 0, 1772, 0, 0, X86ImpOpBase + 0, 4334, 0, 0xeab8f8042836ULL }, // Inst #17063 = VPSLLWZrik |
| 25038 | { 17062, 3, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b8f8042836ULL }, // Inst #17062 = VPSLLWZri |
| 25039 | { 17061, 8, 1, 0, 1817, 0, 0, X86ImpOpBase + 0, 4326, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8042826ULL }, // Inst #17061 = VPSLLWZmikz |
| 25040 | { 17060, 9, 1, 0, 1817, 0, 0, X86ImpOpBase + 0, 4317, 0|(1ULL<<MCID::MayLoad), 0xeab8f8042826ULL }, // Inst #17060 = VPSLLWZmik |
| 25041 | { 17059, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8042826ULL }, // Inst #17059 = VPSLLWZmi |
| 25042 | { 17058, 4, 1, 0, 1782, 0, 0, X86ImpOpBase + 0, 5664, 0, 0xa7f8f8002829ULL }, // Inst #17058 = VPSLLWZ256rrkz |
| 25043 | { 17057, 5, 1, 0, 1782, 0, 0, X86ImpOpBase + 0, 5659, 0, 0xa3f8f8002829ULL }, // Inst #17057 = VPSLLWZ256rrk |
| 25044 | { 17056, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5617, 0, 0xa1f8f8002829ULL }, // Inst #17056 = VPSLLWZ256rr |
| 25045 | { 17055, 8, 1, 0, 2023, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xa7f8f8002819ULL }, // Inst #17055 = VPSLLWZ256rmkz |
| 25046 | { 17054, 9, 1, 0, 2023, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xa3f8f8002819ULL }, // Inst #17054 = VPSLLWZ256rmk |
| 25047 | { 17053, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xa1f8f8002819ULL }, // Inst #17053 = VPSLLWZ256rm |
| 25048 | { 17052, 4, 1, 0, 2258, 0, 0, X86ImpOpBase + 0, 4313, 0, 0xc7b8f8042836ULL }, // Inst #17052 = VPSLLWZ256rikz |
| 25049 | { 17051, 5, 1, 0, 2258, 0, 0, X86ImpOpBase + 0, 4308, 0, 0xc3b8f8042836ULL }, // Inst #17051 = VPSLLWZ256rik |
| 25050 | { 17050, 3, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b8f8042836ULL }, // Inst #17050 = VPSLLWZ256ri |
| 25051 | { 17049, 8, 1, 0, 2014, 0, 0, X86ImpOpBase + 0, 4300, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8042826ULL }, // Inst #17049 = VPSLLWZ256mikz |
| 25052 | { 17048, 9, 1, 0, 2014, 0, 0, X86ImpOpBase + 0, 4291, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8042826ULL }, // Inst #17048 = VPSLLWZ256mik |
| 25053 | { 17047, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8042826ULL }, // Inst #17047 = VPSLLWZ256mi |
| 25054 | { 17046, 4, 1, 0, 2353, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6f8f8002829ULL }, // Inst #17046 = VPSLLWZ128rrkz |
| 25055 | { 17045, 5, 1, 0, 2353, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2f8f8002829ULL }, // Inst #17045 = VPSLLWZ128rrk |
| 25056 | { 17044, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0f8f8002829ULL }, // Inst #17044 = VPSLLWZ128rr |
| 25057 | { 17043, 8, 1, 0, 2019, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6f8f8002819ULL }, // Inst #17043 = VPSLLWZ128rmkz |
| 25058 | { 17042, 9, 1, 0, 2019, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2f8f8002819ULL }, // Inst #17042 = VPSLLWZ128rmk |
| 25059 | { 17041, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f8f8002819ULL }, // Inst #17041 = VPSLLWZ128rm |
| 25060 | { 17040, 4, 1, 0, 2257, 0, 0, X86ImpOpBase + 0, 4287, 0, 0xa6b8f8042836ULL }, // Inst #17040 = VPSLLWZ128rikz |
| 25061 | { 17039, 5, 1, 0, 2257, 0, 0, X86ImpOpBase + 0, 4282, 0, 0xa2b8f8042836ULL }, // Inst #17039 = VPSLLWZ128rik |
| 25062 | { 17038, 3, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b8f8042836ULL }, // Inst #17038 = VPSLLWZ128ri |
| 25063 | { 17037, 8, 1, 0, 2013, 0, 0, X86ImpOpBase + 0, 4274, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8042826ULL }, // Inst #17037 = VPSLLWZ128mikz |
| 25064 | { 17036, 9, 1, 0, 2013, 0, 0, X86ImpOpBase + 0, 4265, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8042826ULL }, // Inst #17036 = VPSLLWZ128mik |
| 25065 | { 17035, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8042826ULL }, // Inst #17035 = VPSLLWZ128mi |
| 25066 | { 17034, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5614, 0, 0x1f8b8002829ULL }, // Inst #17034 = VPSLLWYrr |
| 25067 | { 17033, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f8b8002819ULL }, // Inst #17033 = VPSLLWYrm |
| 25068 | { 17032, 3, 1, 0, 548, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x1b8b8042836ULL }, // Inst #17032 = VPSLLWYri |
| 25069 | { 17031, 4, 1, 0, 1771, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xee8978024829ULL }, // Inst #17031 = VPSLLVWZrrkz |
| 25070 | { 17030, 5, 1, 0, 1771, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xea8978024829ULL }, // Inst #17030 = VPSLLVWZrrk |
| 25071 | { 17029, 3, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88978024829ULL }, // Inst #17029 = VPSLLVWZrr |
| 25072 | { 17028, 8, 1, 0, 1820, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xee8978024819ULL }, // Inst #17028 = VPSLLVWZrmkz |
| 25073 | { 17027, 9, 1, 0, 1820, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xea8978024819ULL }, // Inst #17027 = VPSLLVWZrmk |
| 25074 | { 17026, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88978024819ULL }, // Inst #17026 = VPSLLVWZrm |
| 25075 | { 17025, 4, 1, 0, 2256, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc78978024829ULL }, // Inst #17025 = VPSLLVWZ256rrkz |
| 25076 | { 17024, 5, 1, 0, 2256, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc38978024829ULL }, // Inst #17024 = VPSLLVWZ256rrk |
| 25077 | { 17023, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18978024829ULL }, // Inst #17023 = VPSLLVWZ256rr |
| 25078 | { 17022, 8, 1, 0, 2022, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc78978024819ULL }, // Inst #17022 = VPSLLVWZ256rmkz |
| 25079 | { 17021, 9, 1, 0, 2022, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc38978024819ULL }, // Inst #17021 = VPSLLVWZ256rmk |
| 25080 | { 17020, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18978024819ULL }, // Inst #17020 = VPSLLVWZ256rm |
| 25081 | { 17019, 4, 1, 0, 2255, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa68978024829ULL }, // Inst #17019 = VPSLLVWZ128rrkz |
| 25082 | { 17018, 5, 1, 0, 2255, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa28978024829ULL }, // Inst #17018 = VPSLLVWZ128rrk |
| 25083 | { 17017, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08978024829ULL }, // Inst #17017 = VPSLLVWZ128rr |
| 25084 | { 17016, 8, 1, 0, 2018, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa68978024819ULL }, // Inst #17016 = VPSLLVWZ128rmkz |
| 25085 | { 17015, 9, 1, 0, 2018, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa28978024819ULL }, // Inst #17015 = VPSLLVWZ128rmk |
| 25086 | { 17014, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08978024819ULL }, // Inst #17014 = VPSLLVWZ128rm |
| 25087 | { 17013, 3, 1, 0, 838, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xa3b8024829ULL }, // Inst #17013 = VPSLLVQrr |
| 25088 | { 17012, 7, 1, 0, 846, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xa3b8024819ULL }, // Inst #17012 = VPSLLVQrm |
| 25089 | { 17011, 4, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeea3f8024829ULL }, // Inst #17011 = VPSLLVQZrrkz |
| 25090 | { 17010, 5, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeaa3f8024829ULL }, // Inst #17010 = VPSLLVQZrrk |
| 25091 | { 17009, 3, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8a3f8024829ULL }, // Inst #17009 = VPSLLVQZrr |
| 25092 | { 17008, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeea3f8024819ULL }, // Inst #17008 = VPSLLVQZrmkz |
| 25093 | { 17007, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaa3f8024819ULL }, // Inst #17007 = VPSLLVQZrmk |
| 25094 | { 17006, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9ea3f8024819ULL }, // Inst #17006 = VPSLLVQZrmbkz |
| 25095 | { 17005, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aa3f8024819ULL }, // Inst #17005 = VPSLLVQZrmbk |
| 25096 | { 17004, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98a3f8024819ULL }, // Inst #17004 = VPSLLVQZrmb |
| 25097 | { 17003, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8a3f8024819ULL }, // Inst #17003 = VPSLLVQZrm |
| 25098 | { 17002, 4, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc7a3f8024829ULL }, // Inst #17002 = VPSLLVQZ256rrkz |
| 25099 | { 17001, 5, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3a3f8024829ULL }, // Inst #17001 = VPSLLVQZ256rrk |
| 25100 | { 17000, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1a3f8024829ULL }, // Inst #17000 = VPSLLVQZ256rr |
| 25101 | { 16999, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7a3f8024819ULL }, // Inst #16999 = VPSLLVQZ256rmkz |
| 25102 | { 16998, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3a3f8024819ULL }, // Inst #16998 = VPSLLVQZ256rmk |
| 25103 | { 16997, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97a3f8024819ULL }, // Inst #16997 = VPSLLVQZ256rmbkz |
| 25104 | { 16996, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93a3f8024819ULL }, // Inst #16996 = VPSLLVQZ256rmbk |
| 25105 | { 16995, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91a3f8024819ULL }, // Inst #16995 = VPSLLVQZ256rmb |
| 25106 | { 16994, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1a3f8024819ULL }, // Inst #16994 = VPSLLVQZ256rm |
| 25107 | { 16993, 4, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6a3f8024829ULL }, // Inst #16993 = VPSLLVQZ128rrkz |
| 25108 | { 16992, 5, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2a3f8024829ULL }, // Inst #16992 = VPSLLVQZ128rrk |
| 25109 | { 16991, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0a3f8024829ULL }, // Inst #16991 = VPSLLVQZ128rr |
| 25110 | { 16990, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6a3f8024819ULL }, // Inst #16990 = VPSLLVQZ128rmkz |
| 25111 | { 16989, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2a3f8024819ULL }, // Inst #16989 = VPSLLVQZ128rmk |
| 25112 | { 16988, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96a3f8024819ULL }, // Inst #16988 = VPSLLVQZ128rmbkz |
| 25113 | { 16987, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92a3f8024819ULL }, // Inst #16987 = VPSLLVQZ128rmbk |
| 25114 | { 16986, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90a3f8024819ULL }, // Inst #16986 = VPSLLVQZ128rmb |
| 25115 | { 16985, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0a3f8024819ULL }, // Inst #16985 = VPSLLVQZ128rm |
| 25116 | { 16984, 3, 1, 0, 837, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1a3b8024829ULL }, // Inst #16984 = VPSLLVQYrr |
| 25117 | { 16983, 7, 1, 0, 847, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1a3b8024819ULL }, // Inst #16983 = VPSLLVQYrm |
| 25118 | { 16982, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xa3b8004829ULL }, // Inst #16982 = VPSLLVDrr |
| 25119 | { 16981, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xa3b8004819ULL }, // Inst #16981 = VPSLLVDrm |
| 25120 | { 16980, 4, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeea3f8004829ULL }, // Inst #16980 = VPSLLVDZrrkz |
| 25121 | { 16979, 5, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeaa3f8004829ULL }, // Inst #16979 = VPSLLVDZrrk |
| 25122 | { 16978, 3, 1, 0, 556, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8a3f8004829ULL }, // Inst #16978 = VPSLLVDZrr |
| 25123 | { 16977, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeea3f8004819ULL }, // Inst #16977 = VPSLLVDZrmkz |
| 25124 | { 16976, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaa3f8004819ULL }, // Inst #16976 = VPSLLVDZrmk |
| 25125 | { 16975, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7ea3f8004819ULL }, // Inst #16975 = VPSLLVDZrmbkz |
| 25126 | { 16974, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aa3f8004819ULL }, // Inst #16974 = VPSLLVDZrmbk |
| 25127 | { 16973, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78a3f8004819ULL }, // Inst #16973 = VPSLLVDZrmb |
| 25128 | { 16972, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8a3f8004819ULL }, // Inst #16972 = VPSLLVDZrm |
| 25129 | { 16971, 4, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc7a3f8004829ULL }, // Inst #16971 = VPSLLVDZ256rrkz |
| 25130 | { 16970, 5, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3a3f8004829ULL }, // Inst #16970 = VPSLLVDZ256rrk |
| 25131 | { 16969, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1a3f8004829ULL }, // Inst #16969 = VPSLLVDZ256rr |
| 25132 | { 16968, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7a3f8004819ULL }, // Inst #16968 = VPSLLVDZ256rmkz |
| 25133 | { 16967, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3a3f8004819ULL }, // Inst #16967 = VPSLLVDZ256rmk |
| 25134 | { 16966, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77a3f8004819ULL }, // Inst #16966 = VPSLLVDZ256rmbkz |
| 25135 | { 16965, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73a3f8004819ULL }, // Inst #16965 = VPSLLVDZ256rmbk |
| 25136 | { 16964, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71a3f8004819ULL }, // Inst #16964 = VPSLLVDZ256rmb |
| 25137 | { 16963, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1a3f8004819ULL }, // Inst #16963 = VPSLLVDZ256rm |
| 25138 | { 16962, 4, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6a3f8004829ULL }, // Inst #16962 = VPSLLVDZ128rrkz |
| 25139 | { 16961, 5, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2a3f8004829ULL }, // Inst #16961 = VPSLLVDZ128rrk |
| 25140 | { 16960, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0a3f8004829ULL }, // Inst #16960 = VPSLLVDZ128rr |
| 25141 | { 16959, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6a3f8004819ULL }, // Inst #16959 = VPSLLVDZ128rmkz |
| 25142 | { 16958, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2a3f8004819ULL }, // Inst #16958 = VPSLLVDZ128rmk |
| 25143 | { 16957, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76a3f8004819ULL }, // Inst #16957 = VPSLLVDZ128rmbkz |
| 25144 | { 16956, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72a3f8004819ULL }, // Inst #16956 = VPSLLVDZ128rmbk |
| 25145 | { 16955, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70a3f8004819ULL }, // Inst #16955 = VPSLLVDZ128rmb |
| 25146 | { 16954, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0a3f8004819ULL }, // Inst #16954 = VPSLLVDZ128rm |
| 25147 | { 16953, 3, 1, 0, 554, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1a3b8004829ULL }, // Inst #16953 = VPSLLVDYrr |
| 25148 | { 16952, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1a3b8004819ULL }, // Inst #16952 = VPSLLVDYrm |
| 25149 | { 16951, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xf9b8002829ULL }, // Inst #16951 = VPSLLQrr |
| 25150 | { 16950, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf9b8002819ULL }, // Inst #16950 = VPSLLQrm |
| 25151 | { 16949, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0xb9b8042836ULL }, // Inst #16949 = VPSLLQri |
| 25152 | { 16948, 4, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5655, 0, 0xaef9f8022829ULL }, // Inst #16948 = VPSLLQZrrkz |
| 25153 | { 16947, 5, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5650, 0, 0xaaf9f8022829ULL }, // Inst #16947 = VPSLLQZrrk |
| 25154 | { 16946, 3, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5629, 0, 0xa8f9f8022829ULL }, // Inst #16946 = VPSLLQZrr |
| 25155 | { 16945, 8, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xaef9f8022819ULL }, // Inst #16945 = VPSLLQZrmkz |
| 25156 | { 16944, 9, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xaaf9f8022819ULL }, // Inst #16944 = VPSLLQZrmk |
| 25157 | { 16943, 7, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xa8f9f8022819ULL }, // Inst #16943 = VPSLLQZrm |
| 25158 | { 16942, 4, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4261, 0, 0xeeb9f8062836ULL }, // Inst #16942 = VPSLLQZrikz |
| 25159 | { 16941, 5, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4256, 0, 0xeab9f8062836ULL }, // Inst #16941 = VPSLLQZrik |
| 25160 | { 16940, 3, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b9f8062836ULL }, // Inst #16940 = VPSLLQZri |
| 25161 | { 16939, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8062826ULL }, // Inst #16939 = VPSLLQZmikz |
| 25162 | { 16938, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0xeab9f8062826ULL }, // Inst #16938 = VPSLLQZmik |
| 25163 | { 16937, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8062826ULL }, // Inst #16937 = VPSLLQZmi |
| 25164 | { 16936, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0x9eb9f8062826ULL }, // Inst #16936 = VPSLLQZmbikz |
| 25165 | { 16935, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0x9ab9f8062826ULL }, // Inst #16935 = VPSLLQZmbik |
| 25166 | { 16934, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x98b9f8062826ULL }, // Inst #16934 = VPSLLQZmbi |
| 25167 | { 16933, 4, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5646, 0, 0xa7f9f8022829ULL }, // Inst #16933 = VPSLLQZ256rrkz |
| 25168 | { 16932, 5, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5641, 0, 0xa3f9f8022829ULL }, // Inst #16932 = VPSLLQZ256rrk |
| 25169 | { 16931, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5617, 0, 0xa1f9f8022829ULL }, // Inst #16931 = VPSLLQZ256rr |
| 25170 | { 16930, 8, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xa7f9f8022819ULL }, // Inst #16930 = VPSLLQZ256rmkz |
| 25171 | { 16929, 9, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xa3f9f8022819ULL }, // Inst #16929 = VPSLLQZ256rmk |
| 25172 | { 16928, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xa1f9f8022819ULL }, // Inst #16928 = VPSLLQZ256rm |
| 25173 | { 16927, 4, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4225, 0, 0xc7b9f8062836ULL }, // Inst #16927 = VPSLLQZ256rikz |
| 25174 | { 16926, 5, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4220, 0, 0xc3b9f8062836ULL }, // Inst #16926 = VPSLLQZ256rik |
| 25175 | { 16925, 3, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b9f8062836ULL }, // Inst #16925 = VPSLLQZ256ri |
| 25176 | { 16924, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8062826ULL }, // Inst #16924 = VPSLLQZ256mikz |
| 25177 | { 16923, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8062826ULL }, // Inst #16923 = VPSLLQZ256mik |
| 25178 | { 16922, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8062826ULL }, // Inst #16922 = VPSLLQZ256mi |
| 25179 | { 16921, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0x97b9f8062826ULL }, // Inst #16921 = VPSLLQZ256mbikz |
| 25180 | { 16920, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0x93b9f8062826ULL }, // Inst #16920 = VPSLLQZ256mbik |
| 25181 | { 16919, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x91b9f8062826ULL }, // Inst #16919 = VPSLLQZ256mbi |
| 25182 | { 16918, 4, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6f9f8022829ULL }, // Inst #16918 = VPSLLQZ128rrkz |
| 25183 | { 16917, 5, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2f9f8022829ULL }, // Inst #16917 = VPSLLQZ128rrk |
| 25184 | { 16916, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0f9f8022829ULL }, // Inst #16916 = VPSLLQZ128rr |
| 25185 | { 16915, 8, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6f9f8022819ULL }, // Inst #16915 = VPSLLQZ128rmkz |
| 25186 | { 16914, 9, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2f9f8022819ULL }, // Inst #16914 = VPSLLQZ128rmk |
| 25187 | { 16913, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f9f8022819ULL }, // Inst #16913 = VPSLLQZ128rm |
| 25188 | { 16912, 4, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 4189, 0, 0xa6b9f8062836ULL }, // Inst #16912 = VPSLLQZ128rikz |
| 25189 | { 16911, 5, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 4184, 0, 0xa2b9f8062836ULL }, // Inst #16911 = VPSLLQZ128rik |
| 25190 | { 16910, 3, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b9f8062836ULL }, // Inst #16910 = VPSLLQZ128ri |
| 25191 | { 16909, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8062826ULL }, // Inst #16909 = VPSLLQZ128mikz |
| 25192 | { 16908, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8062826ULL }, // Inst #16908 = VPSLLQZ128mik |
| 25193 | { 16907, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8062826ULL }, // Inst #16907 = VPSLLQZ128mi |
| 25194 | { 16906, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0x96b9f8062826ULL }, // Inst #16906 = VPSLLQZ128mbikz |
| 25195 | { 16905, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0x92b9f8062826ULL }, // Inst #16905 = VPSLLQZ128mbik |
| 25196 | { 16904, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x90b9f8062826ULL }, // Inst #16904 = VPSLLQZ128mbi |
| 25197 | { 16903, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5614, 0, 0x1f9b8002829ULL }, // Inst #16903 = VPSLLQYrr |
| 25198 | { 16902, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f9b8002819ULL }, // Inst #16902 = VPSLLQYrm |
| 25199 | { 16901, 3, 1, 0, 548, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x1b9b8042836ULL }, // Inst #16901 = VPSLLQYri |
| 25200 | { 16900, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xf938002829ULL }, // Inst #16900 = VPSLLDrr |
| 25201 | { 16899, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf938002819ULL }, // Inst #16899 = VPSLLDrm |
| 25202 | { 16898, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0xb938042836ULL }, // Inst #16898 = VPSLLDri |
| 25203 | { 16897, 4, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5637, 0, 0xaef978002829ULL }, // Inst #16897 = VPSLLDZrrkz |
| 25204 | { 16896, 5, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5632, 0, 0xaaf978002829ULL }, // Inst #16896 = VPSLLDZrrk |
| 25205 | { 16895, 3, 1, 0, 1091, 0, 0, X86ImpOpBase + 0, 5629, 0, 0xa8f978002829ULL }, // Inst #16895 = VPSLLDZrr |
| 25206 | { 16894, 8, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xaef978002819ULL }, // Inst #16894 = VPSLLDZrmkz |
| 25207 | { 16893, 9, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xaaf978002819ULL }, // Inst #16893 = VPSLLDZrmk |
| 25208 | { 16892, 7, 1, 0, 565, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xa8f978002819ULL }, // Inst #16892 = VPSLLDZrm |
| 25209 | { 16891, 4, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4408, 0, 0xeeb978042836ULL }, // Inst #16891 = VPSLLDZrikz |
| 25210 | { 16890, 5, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4403, 0, 0xeab978042836ULL }, // Inst #16890 = VPSLLDZrik |
| 25211 | { 16889, 3, 1, 0, 1107, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b978042836ULL }, // Inst #16889 = VPSLLDZri |
| 25212 | { 16888, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0xeeb978042826ULL }, // Inst #16888 = VPSLLDZmikz |
| 25213 | { 16887, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0xeab978042826ULL }, // Inst #16887 = VPSLLDZmik |
| 25214 | { 16886, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b978042826ULL }, // Inst #16886 = VPSLLDZmi |
| 25215 | { 16885, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0x7eb978042826ULL }, // Inst #16885 = VPSLLDZmbikz |
| 25216 | { 16884, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0x7ab978042826ULL }, // Inst #16884 = VPSLLDZmbik |
| 25217 | { 16883, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x78b978042826ULL }, // Inst #16883 = VPSLLDZmbi |
| 25218 | { 16882, 4, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5625, 0, 0xa7f978002829ULL }, // Inst #16882 = VPSLLDZ256rrkz |
| 25219 | { 16881, 5, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5620, 0, 0xa3f978002829ULL }, // Inst #16881 = VPSLLDZ256rrk |
| 25220 | { 16880, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5617, 0, 0xa1f978002829ULL }, // Inst #16880 = VPSLLDZ256rr |
| 25221 | { 16879, 8, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xa7f978002819ULL }, // Inst #16879 = VPSLLDZ256rmkz |
| 25222 | { 16878, 9, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xa3f978002819ULL }, // Inst #16878 = VPSLLDZ256rmk |
| 25223 | { 16877, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xa1f978002819ULL }, // Inst #16877 = VPSLLDZ256rm |
| 25224 | { 16876, 4, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4382, 0, 0xc7b978042836ULL }, // Inst #16876 = VPSLLDZ256rikz |
| 25225 | { 16875, 5, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4377, 0, 0xc3b978042836ULL }, // Inst #16875 = VPSLLDZ256rik |
| 25226 | { 16874, 3, 1, 0, 1106, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b978042836ULL }, // Inst #16874 = VPSLLDZ256ri |
| 25227 | { 16873, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0xc7b978042826ULL }, // Inst #16873 = VPSLLDZ256mikz |
| 25228 | { 16872, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0xc3b978042826ULL }, // Inst #16872 = VPSLLDZ256mik |
| 25229 | { 16871, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b978042826ULL }, // Inst #16871 = VPSLLDZ256mi |
| 25230 | { 16870, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0x77b978042826ULL }, // Inst #16870 = VPSLLDZ256mbikz |
| 25231 | { 16869, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0x73b978042826ULL }, // Inst #16869 = VPSLLDZ256mbik |
| 25232 | { 16868, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x71b978042826ULL }, // Inst #16868 = VPSLLDZ256mbi |
| 25233 | { 16867, 4, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6f978002829ULL }, // Inst #16867 = VPSLLDZ128rrkz |
| 25234 | { 16866, 5, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2f978002829ULL }, // Inst #16866 = VPSLLDZ128rrk |
| 25235 | { 16865, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0f978002829ULL }, // Inst #16865 = VPSLLDZ128rr |
| 25236 | { 16864, 8, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6f978002819ULL }, // Inst #16864 = VPSLLDZ128rmkz |
| 25237 | { 16863, 9, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2f978002819ULL }, // Inst #16863 = VPSLLDZ128rmk |
| 25238 | { 16862, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f978002819ULL }, // Inst #16862 = VPSLLDZ128rm |
| 25239 | { 16861, 4, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3044, 0, 0xa6b978042836ULL }, // Inst #16861 = VPSLLDZ128rikz |
| 25240 | { 16860, 5, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3039, 0, 0xa2b978042836ULL }, // Inst #16860 = VPSLLDZ128rik |
| 25241 | { 16859, 3, 1, 0, 1105, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b978042836ULL }, // Inst #16859 = VPSLLDZ128ri |
| 25242 | { 16858, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0xa6b978042826ULL }, // Inst #16858 = VPSLLDZ128mikz |
| 25243 | { 16857, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0xa2b978042826ULL }, // Inst #16857 = VPSLLDZ128mik |
| 25244 | { 16856, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b978042826ULL }, // Inst #16856 = VPSLLDZ128mi |
| 25245 | { 16855, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0x76b978042826ULL }, // Inst #16855 = VPSLLDZ128mbikz |
| 25246 | { 16854, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0x72b978042826ULL }, // Inst #16854 = VPSLLDZ128mbik |
| 25247 | { 16853, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x70b978042826ULL }, // Inst #16853 = VPSLLDZ128mbi |
| 25248 | { 16852, 3, 1, 0, 1090, 0, 0, X86ImpOpBase + 0, 5614, 0, 0x1f938002829ULL }, // Inst #16852 = VPSLLDYrr |
| 25249 | { 16851, 7, 1, 0, 563, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f938002819ULL }, // Inst #16851 = VPSLLDYrm |
| 25250 | { 16850, 3, 1, 0, 548, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x1b938042836ULL }, // Inst #16850 = VPSLLDYri |
| 25251 | { 16849, 3, 1, 0, 1093, 0, 0, X86ImpOpBase + 0, 544, 0, 0xb9b8042837ULL }, // Inst #16849 = VPSLLDQri |
| 25252 | { 16848, 3, 1, 0, 1094, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b9f0042837ULL }, // Inst #16848 = VPSLLDQZri |
| 25253 | { 16847, 7, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b9f0042827ULL }, // Inst #16847 = VPSLLDQZmi |
| 25254 | { 16846, 3, 1, 0, 1092, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b9f0042837ULL }, // Inst #16846 = VPSLLDQZ256ri |
| 25255 | { 16845, 7, 1, 0, 345, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b9f0042827ULL }, // Inst #16845 = VPSLLDQZ256mi |
| 25256 | { 16844, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b9f0042837ULL }, // Inst #16844 = VPSLLDQZ128ri |
| 25257 | { 16843, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b9f0042827ULL }, // Inst #16843 = VPSLLDQZ128mi |
| 25258 | { 16842, 3, 1, 0, 1092, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x1b9b8042837ULL }, // Inst #16842 = VPSLLDQYri |
| 25259 | { 16841, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x84b8004829ULL }, // Inst #16841 = VPSIGNWrr |
| 25260 | { 16840, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x84b8004819ULL }, // Inst #16840 = VPSIGNWrm |
| 25261 | { 16839, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x184b8004829ULL }, // Inst #16839 = VPSIGNWYrr |
| 25262 | { 16838, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x184b8004819ULL }, // Inst #16838 = VPSIGNWYrm |
| 25263 | { 16837, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8538004829ULL }, // Inst #16837 = VPSIGNDrr |
| 25264 | { 16836, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8538004819ULL }, // Inst #16836 = VPSIGNDrm |
| 25265 | { 16835, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18538004829ULL }, // Inst #16835 = VPSIGNDYrr |
| 25266 | { 16834, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18538004819ULL }, // Inst #16834 = VPSIGNDYrm |
| 25267 | { 16833, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8438004829ULL }, // Inst #16833 = VPSIGNBrr |
| 25268 | { 16832, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8438004819ULL }, // Inst #16832 = VPSIGNBrm |
| 25269 | { 16831, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18438004829ULL }, // Inst #16831 = VPSIGNBYrr |
| 25270 | { 16830, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18438004819ULL }, // Inst #16830 = VPSIGNBYrm |
| 25271 | { 16829, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 544, 0, 0x3838043829ULL }, // Inst #16829 = VPSHUFLWri |
| 25272 | { 16828, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x3838043819ULL }, // Inst #16828 = VPSHUFLWmi |
| 25273 | { 16827, 4, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 4339, 0, 0xee3878043829ULL }, // Inst #16827 = VPSHUFLWZrikz |
| 25274 | { 16826, 5, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 4334, 0, 0xea3878043829ULL }, // Inst #16826 = VPSHUFLWZrik |
| 25275 | { 16825, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe83878043829ULL }, // Inst #16825 = VPSHUFLWZri |
| 25276 | { 16824, 8, 1, 0, 1913, 0, 0, X86ImpOpBase + 0, 4326, 0|(1ULL<<MCID::MayLoad), 0xee3878043819ULL }, // Inst #16824 = VPSHUFLWZmikz |
| 25277 | { 16823, 9, 1, 0, 1913, 0, 0, X86ImpOpBase + 0, 4317, 0|(1ULL<<MCID::MayLoad), 0xea3878043819ULL }, // Inst #16823 = VPSHUFLWZmik |
| 25278 | { 16822, 7, 1, 0, 562, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe83878043819ULL }, // Inst #16822 = VPSHUFLWZmi |
| 25279 | { 16821, 4, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 4313, 0, 0xc73878043829ULL }, // Inst #16821 = VPSHUFLWZ256rikz |
| 25280 | { 16820, 5, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 4308, 0, 0xc33878043829ULL }, // Inst #16820 = VPSHUFLWZ256rik |
| 25281 | { 16819, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc13878043829ULL }, // Inst #16819 = VPSHUFLWZ256ri |
| 25282 | { 16818, 8, 1, 0, 1895, 0, 0, X86ImpOpBase + 0, 4300, 0|(1ULL<<MCID::MayLoad), 0xc73878043819ULL }, // Inst #16818 = VPSHUFLWZ256mikz |
| 25283 | { 16817, 9, 1, 0, 1895, 0, 0, X86ImpOpBase + 0, 4291, 0|(1ULL<<MCID::MayLoad), 0xc33878043819ULL }, // Inst #16817 = VPSHUFLWZ256mik |
| 25284 | { 16816, 7, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc13878043819ULL }, // Inst #16816 = VPSHUFLWZ256mi |
| 25285 | { 16815, 4, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 4287, 0, 0xa63878043829ULL }, // Inst #16815 = VPSHUFLWZ128rikz |
| 25286 | { 16814, 5, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 4282, 0, 0xa23878043829ULL }, // Inst #16814 = VPSHUFLWZ128rik |
| 25287 | { 16813, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa03878043829ULL }, // Inst #16813 = VPSHUFLWZ128ri |
| 25288 | { 16812, 8, 1, 0, 1894, 0, 0, X86ImpOpBase + 0, 4274, 0|(1ULL<<MCID::MayLoad), 0xa63878043819ULL }, // Inst #16812 = VPSHUFLWZ128mikz |
| 25289 | { 16811, 9, 1, 0, 1894, 0, 0, X86ImpOpBase + 0, 4265, 0|(1ULL<<MCID::MayLoad), 0xa23878043819ULL }, // Inst #16811 = VPSHUFLWZ128mik |
| 25290 | { 16810, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa03878043819ULL }, // Inst #16810 = VPSHUFLWZ128mi |
| 25291 | { 16809, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x13838043829ULL }, // Inst #16809 = VPSHUFLWYri |
| 25292 | { 16808, 7, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 5434, 0|(1ULL<<MCID::MayLoad), 0x13838043819ULL }, // Inst #16808 = VPSHUFLWYmi |
| 25293 | { 16807, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 544, 0, 0x3838043029ULL }, // Inst #16807 = VPSHUFHWri |
| 25294 | { 16806, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x3838043019ULL }, // Inst #16806 = VPSHUFHWmi |
| 25295 | { 16805, 4, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 4339, 0, 0xee3878043029ULL }, // Inst #16805 = VPSHUFHWZrikz |
| 25296 | { 16804, 5, 1, 0, 348, 0, 0, X86ImpOpBase + 0, 4334, 0, 0xea3878043029ULL }, // Inst #16804 = VPSHUFHWZrik |
| 25297 | { 16803, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe83878043029ULL }, // Inst #16803 = VPSHUFHWZri |
| 25298 | { 16802, 8, 1, 0, 1913, 0, 0, X86ImpOpBase + 0, 4326, 0|(1ULL<<MCID::MayLoad), 0xee3878043019ULL }, // Inst #16802 = VPSHUFHWZmikz |
| 25299 | { 16801, 9, 1, 0, 1913, 0, 0, X86ImpOpBase + 0, 4317, 0|(1ULL<<MCID::MayLoad), 0xea3878043019ULL }, // Inst #16801 = VPSHUFHWZmik |
| 25300 | { 16800, 7, 1, 0, 562, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe83878043019ULL }, // Inst #16800 = VPSHUFHWZmi |
| 25301 | { 16799, 4, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 4313, 0, 0xc73878043029ULL }, // Inst #16799 = VPSHUFHWZ256rikz |
| 25302 | { 16798, 5, 1, 0, 1662, 0, 0, X86ImpOpBase + 0, 4308, 0, 0xc33878043029ULL }, // Inst #16798 = VPSHUFHWZ256rik |
| 25303 | { 16797, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc13878043029ULL }, // Inst #16797 = VPSHUFHWZ256ri |
| 25304 | { 16796, 8, 1, 0, 1895, 0, 0, X86ImpOpBase + 0, 4300, 0|(1ULL<<MCID::MayLoad), 0xc73878043019ULL }, // Inst #16796 = VPSHUFHWZ256mikz |
| 25305 | { 16795, 9, 1, 0, 1895, 0, 0, X86ImpOpBase + 0, 4291, 0|(1ULL<<MCID::MayLoad), 0xc33878043019ULL }, // Inst #16795 = VPSHUFHWZ256mik |
| 25306 | { 16794, 7, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc13878043019ULL }, // Inst #16794 = VPSHUFHWZ256mi |
| 25307 | { 16793, 4, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 4287, 0, 0xa63878043029ULL }, // Inst #16793 = VPSHUFHWZ128rikz |
| 25308 | { 16792, 5, 1, 0, 1661, 0, 0, X86ImpOpBase + 0, 4282, 0, 0xa23878043029ULL }, // Inst #16792 = VPSHUFHWZ128rik |
| 25309 | { 16791, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa03878043029ULL }, // Inst #16791 = VPSHUFHWZ128ri |
| 25310 | { 16790, 8, 1, 0, 1894, 0, 0, X86ImpOpBase + 0, 4274, 0|(1ULL<<MCID::MayLoad), 0xa63878043019ULL }, // Inst #16790 = VPSHUFHWZ128mikz |
| 25311 | { 16789, 9, 1, 0, 1894, 0, 0, X86ImpOpBase + 0, 4265, 0|(1ULL<<MCID::MayLoad), 0xa23878043019ULL }, // Inst #16789 = VPSHUFHWZ128mik |
| 25312 | { 16788, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa03878043019ULL }, // Inst #16788 = VPSHUFHWZ128mi |
| 25313 | { 16787, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x13838043029ULL }, // Inst #16787 = VPSHUFHWYri |
| 25314 | { 16786, 7, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 5434, 0|(1ULL<<MCID::MayLoad), 0x13838043019ULL }, // Inst #16786 = VPSHUFHWYmi |
| 25315 | { 16785, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 544, 0, 0x3838042829ULL }, // Inst #16785 = VPSHUFDri |
| 25316 | { 16784, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x3838042819ULL }, // Inst #16784 = VPSHUFDmi |
| 25317 | { 16783, 4, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 4408, 0, 0xee3878042829ULL }, // Inst #16783 = VPSHUFDZrikz |
| 25318 | { 16782, 5, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 4403, 0, 0xea3878042829ULL }, // Inst #16782 = VPSHUFDZrik |
| 25319 | { 16781, 3, 1, 0, 1767, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe83878042829ULL }, // Inst #16781 = VPSHUFDZri |
| 25320 | { 16780, 8, 1, 0, 562, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0xee3878042819ULL }, // Inst #16780 = VPSHUFDZmikz |
| 25321 | { 16779, 9, 1, 0, 562, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0xea3878042819ULL }, // Inst #16779 = VPSHUFDZmik |
| 25322 | { 16778, 7, 1, 0, 562, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe83878042819ULL }, // Inst #16778 = VPSHUFDZmi |
| 25323 | { 16777, 8, 1, 0, 562, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0x7e3878042819ULL }, // Inst #16777 = VPSHUFDZmbikz |
| 25324 | { 16776, 9, 1, 0, 562, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0x7a3878042819ULL }, // Inst #16776 = VPSHUFDZmbik |
| 25325 | { 16775, 7, 1, 0, 562, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x783878042819ULL }, // Inst #16775 = VPSHUFDZmbi |
| 25326 | { 16774, 4, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 4382, 0, 0xc73878042829ULL }, // Inst #16774 = VPSHUFDZ256rikz |
| 25327 | { 16773, 5, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 4377, 0, 0xc33878042829ULL }, // Inst #16773 = VPSHUFDZ256rik |
| 25328 | { 16772, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc13878042829ULL }, // Inst #16772 = VPSHUFDZ256ri |
| 25329 | { 16771, 8, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0xc73878042819ULL }, // Inst #16771 = VPSHUFDZ256mikz |
| 25330 | { 16770, 9, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0xc33878042819ULL }, // Inst #16770 = VPSHUFDZ256mik |
| 25331 | { 16769, 7, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc13878042819ULL }, // Inst #16769 = VPSHUFDZ256mi |
| 25332 | { 16768, 8, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0x773878042819ULL }, // Inst #16768 = VPSHUFDZ256mbikz |
| 25333 | { 16767, 9, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0x733878042819ULL }, // Inst #16767 = VPSHUFDZ256mbik |
| 25334 | { 16766, 7, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x713878042819ULL }, // Inst #16766 = VPSHUFDZ256mbi |
| 25335 | { 16765, 4, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 3044, 0, 0xa63878042829ULL }, // Inst #16765 = VPSHUFDZ128rikz |
| 25336 | { 16764, 5, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 3039, 0, 0xa23878042829ULL }, // Inst #16764 = VPSHUFDZ128rik |
| 25337 | { 16763, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa03878042829ULL }, // Inst #16763 = VPSHUFDZ128ri |
| 25338 | { 16762, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0xa63878042819ULL }, // Inst #16762 = VPSHUFDZ128mikz |
| 25339 | { 16761, 9, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0xa23878042819ULL }, // Inst #16761 = VPSHUFDZ128mik |
| 25340 | { 16760, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa03878042819ULL }, // Inst #16760 = VPSHUFDZ128mi |
| 25341 | { 16759, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0x763878042819ULL }, // Inst #16759 = VPSHUFDZ128mbikz |
| 25342 | { 16758, 9, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0x723878042819ULL }, // Inst #16758 = VPSHUFDZ128mbik |
| 25343 | { 16757, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x703878042819ULL }, // Inst #16757 = VPSHUFDZ128mbi |
| 25344 | { 16756, 3, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x13838042829ULL }, // Inst #16756 = VPSHUFDYri |
| 25345 | { 16755, 7, 1, 0, 365, 0, 0, X86ImpOpBase + 0, 5434, 0|(1ULL<<MCID::MayLoad), 0x13838042819ULL }, // Inst #16755 = VPSHUFDYmi |
| 25346 | { 16754, 3, 1, 0, 283, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8038004829ULL }, // Inst #16754 = VPSHUFBrr |
| 25347 | { 16753, 7, 1, 0, 282, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8038004819ULL }, // Inst #16753 = VPSHUFBrm |
| 25348 | { 16752, 4, 1, 0, 1097, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xee8078004829ULL }, // Inst #16752 = VPSHUFBZrrkz |
| 25349 | { 16751, 5, 1, 0, 1097, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xea8078004829ULL }, // Inst #16751 = VPSHUFBZrrk |
| 25350 | { 16750, 3, 1, 0, 1768, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88078004829ULL }, // Inst #16750 = VPSHUFBZrr |
| 25351 | { 16749, 8, 1, 0, 560, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xee8078004819ULL }, // Inst #16749 = VPSHUFBZrmkz |
| 25352 | { 16748, 9, 1, 0, 560, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xea8078004819ULL }, // Inst #16748 = VPSHUFBZrmk |
| 25353 | { 16747, 7, 1, 0, 1805, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88078004819ULL }, // Inst #16747 = VPSHUFBZrm |
| 25354 | { 16746, 4, 1, 0, 1660, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc78078004829ULL }, // Inst #16746 = VPSHUFBZ256rrkz |
| 25355 | { 16745, 5, 1, 0, 1660, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc38078004829ULL }, // Inst #16745 = VPSHUFBZ256rrk |
| 25356 | { 16744, 3, 1, 0, 1095, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18078004829ULL }, // Inst #16744 = VPSHUFBZ256rr |
| 25357 | { 16743, 8, 1, 0, 1897, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc78078004819ULL }, // Inst #16743 = VPSHUFBZ256rmkz |
| 25358 | { 16742, 9, 1, 0, 1897, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc38078004819ULL }, // Inst #16742 = VPSHUFBZ256rmk |
| 25359 | { 16741, 7, 1, 0, 558, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18078004819ULL }, // Inst #16741 = VPSHUFBZ256rm |
| 25360 | { 16740, 4, 1, 0, 1659, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa68078004829ULL }, // Inst #16740 = VPSHUFBZ128rrkz |
| 25361 | { 16739, 5, 1, 0, 1659, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa28078004829ULL }, // Inst #16739 = VPSHUFBZ128rrk |
| 25362 | { 16738, 3, 1, 0, 1096, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08078004829ULL }, // Inst #16738 = VPSHUFBZ128rr |
| 25363 | { 16737, 8, 1, 0, 1900, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa68078004819ULL }, // Inst #16737 = VPSHUFBZ128rmkz |
| 25364 | { 16736, 9, 1, 0, 1900, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa28078004819ULL }, // Inst #16736 = VPSHUFBZ128rmk |
| 25365 | { 16735, 7, 1, 0, 282, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08078004819ULL }, // Inst #16735 = VPSHUFBZ128rm |
| 25366 | { 16734, 3, 1, 0, 1095, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18038004829ULL }, // Inst #16734 = VPSHUFBYrr |
| 25367 | { 16733, 7, 1, 0, 558, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18038004819ULL }, // Inst #16733 = VPSHUFBYrm |
| 25368 | { 16732, 4, 1, 0, 2055, 0, 0, X86ImpOpBase + 0, 5186, 0, 0xeac7e0004829ULL }, // Inst #16732 = VPSHUFBITQMBZrrk |
| 25369 | { 16731, 3, 1, 0, 2265, 0, 0, X86ImpOpBase + 0, 5183, 0, 0xe8c7e0004829ULL }, // Inst #16731 = VPSHUFBITQMBZrr |
| 25370 | { 16730, 8, 1, 0, 2352, 0, 0, X86ImpOpBase + 0, 5175, 0|(1ULL<<MCID::MayLoad), 0xeac7e0004819ULL }, // Inst #16730 = VPSHUFBITQMBZrmk |
| 25371 | { 16729, 7, 1, 0, 2349, 0, 0, X86ImpOpBase + 0, 5168, 0|(1ULL<<MCID::MayLoad), 0xe8c7e0004819ULL }, // Inst #16729 = VPSHUFBITQMBZrm |
| 25372 | { 16728, 4, 1, 0, 2054, 0, 0, X86ImpOpBase + 0, 5164, 0, 0xc3c7e0004829ULL }, // Inst #16728 = VPSHUFBITQMBZ256rrk |
| 25373 | { 16727, 3, 1, 0, 2264, 0, 0, X86ImpOpBase + 0, 5161, 0, 0xc1c7e0004829ULL }, // Inst #16727 = VPSHUFBITQMBZ256rr |
| 25374 | { 16726, 8, 1, 0, 2351, 0, 0, X86ImpOpBase + 0, 5153, 0|(1ULL<<MCID::MayLoad), 0xc3c7e0004819ULL }, // Inst #16726 = VPSHUFBITQMBZ256rmk |
| 25375 | { 16725, 7, 1, 0, 2348, 0, 0, X86ImpOpBase + 0, 5146, 0|(1ULL<<MCID::MayLoad), 0xc1c7e0004819ULL }, // Inst #16725 = VPSHUFBITQMBZ256rm |
| 25376 | { 16724, 4, 1, 0, 2053, 0, 0, X86ImpOpBase + 0, 5142, 0, 0xa2c7e0004829ULL }, // Inst #16724 = VPSHUFBITQMBZ128rrk |
| 25377 | { 16723, 3, 1, 0, 2263, 0, 0, X86ImpOpBase + 0, 5139, 0, 0xa0c7e0004829ULL }, // Inst #16723 = VPSHUFBITQMBZ128rr |
| 25378 | { 16722, 8, 1, 0, 2350, 0, 0, X86ImpOpBase + 0, 5131, 0|(1ULL<<MCID::MayLoad), 0xa2c7e0004819ULL }, // Inst #16722 = VPSHUFBITQMBZ128rmk |
| 25379 | { 16721, 7, 1, 0, 2347, 0, 0, X86ImpOpBase + 0, 5124, 0|(1ULL<<MCID::MayLoad), 0xa0c7e0004819ULL }, // Inst #16721 = VPSHUFBITQMBZ128rm |
| 25380 | { 16720, 5, 1, 0, 1088, 0, 0, X86ImpOpBase + 0, 3292, 0, 0xeeb978066829ULL }, // Inst #16720 = VPSHRDWZrrikz |
| 25381 | { 16719, 6, 1, 0, 1088, 0, 0, X86ImpOpBase + 0, 3286, 0, 0xeab978066829ULL }, // Inst #16719 = VPSHRDWZrrik |
| 25382 | { 16718, 4, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8b978066829ULL }, // Inst #16718 = VPSHRDWZrri |
| 25383 | { 16717, 9, 1, 0, 2346, 0, 0, X86ImpOpBase + 0, 3277, 0|(1ULL<<MCID::MayLoad), 0xeeb978066819ULL }, // Inst #16717 = VPSHRDWZrmikz |
| 25384 | { 16716, 10, 1, 0, 2346, 0, 0, X86ImpOpBase + 0, 3267, 0|(1ULL<<MCID::MayLoad), 0xeab978066819ULL }, // Inst #16716 = VPSHRDWZrmik |
| 25385 | { 16715, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8b978066819ULL }, // Inst #16715 = VPSHRDWZrmi |
| 25386 | { 16714, 5, 1, 0, 1087, 0, 0, X86ImpOpBase + 0, 3262, 0, 0xc7b978066829ULL }, // Inst #16714 = VPSHRDWZ256rrikz |
| 25387 | { 16713, 6, 1, 0, 1087, 0, 0, X86ImpOpBase + 0, 3256, 0, 0xc3b978066829ULL }, // Inst #16713 = VPSHRDWZ256rrik |
| 25388 | { 16712, 4, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1b978066829ULL }, // Inst #16712 = VPSHRDWZ256rri |
| 25389 | { 16711, 9, 1, 0, 2345, 0, 0, X86ImpOpBase + 0, 3247, 0|(1ULL<<MCID::MayLoad), 0xc7b978066819ULL }, // Inst #16711 = VPSHRDWZ256rmikz |
| 25390 | { 16710, 10, 1, 0, 2345, 0, 0, X86ImpOpBase + 0, 3237, 0|(1ULL<<MCID::MayLoad), 0xc3b978066819ULL }, // Inst #16710 = VPSHRDWZ256rmik |
| 25391 | { 16709, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1b978066819ULL }, // Inst #16709 = VPSHRDWZ256rmi |
| 25392 | { 16708, 5, 1, 0, 1086, 0, 0, X86ImpOpBase + 0, 3232, 0, 0xa6b978066829ULL }, // Inst #16708 = VPSHRDWZ128rrikz |
| 25393 | { 16707, 6, 1, 0, 1086, 0, 0, X86ImpOpBase + 0, 3226, 0, 0xa2b978066829ULL }, // Inst #16707 = VPSHRDWZ128rrik |
| 25394 | { 16706, 4, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0b978066829ULL }, // Inst #16706 = VPSHRDWZ128rri |
| 25395 | { 16705, 9, 1, 0, 2344, 0, 0, X86ImpOpBase + 0, 3217, 0|(1ULL<<MCID::MayLoad), 0xa6b978066819ULL }, // Inst #16705 = VPSHRDWZ128rmikz |
| 25396 | { 16704, 10, 1, 0, 2344, 0, 0, X86ImpOpBase + 0, 3207, 0|(1ULL<<MCID::MayLoad), 0xa2b978066819ULL }, // Inst #16704 = VPSHRDWZ128rmik |
| 25397 | { 16703, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0b978066819ULL }, // Inst #16703 = VPSHRDWZ128rmi |
| 25398 | { 16702, 5, 1, 0, 1770, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeeb978024829ULL }, // Inst #16702 = VPSHRDVWZrkz |
| 25399 | { 16701, 5, 1, 0, 1770, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeab978024829ULL }, // Inst #16701 = VPSHRDVWZrk |
| 25400 | { 16700, 4, 1, 0, 1761, 0, 0, X86ImpOpBase + 0, 3313, 0, 0xe8b978024829ULL }, // Inst #16700 = VPSHRDVWZr |
| 25401 | { 16699, 9, 1, 0, 1819, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeeb978024819ULL }, // Inst #16699 = VPSHRDVWZmkz |
| 25402 | { 16698, 9, 1, 0, 1819, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeab978024819ULL }, // Inst #16698 = VPSHRDVWZmk |
| 25403 | { 16697, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8b978024819ULL }, // Inst #16697 = VPSHRDVWZm |
| 25404 | { 16696, 5, 1, 0, 2254, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc7b978024829ULL }, // Inst #16696 = VPSHRDVWZ256rkz |
| 25405 | { 16695, 5, 1, 0, 2254, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3b978024829ULL }, // Inst #16695 = VPSHRDVWZ256rk |
| 25406 | { 16694, 4, 1, 0, 2336, 0, 0, X86ImpOpBase + 0, 3309, 0, 0xc1b978024829ULL }, // Inst #16694 = VPSHRDVWZ256r |
| 25407 | { 16693, 9, 1, 0, 2021, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc7b978024819ULL }, // Inst #16693 = VPSHRDVWZ256mkz |
| 25408 | { 16692, 9, 1, 0, 2021, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3b978024819ULL }, // Inst #16692 = VPSHRDVWZ256mk |
| 25409 | { 16691, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1b978024819ULL }, // Inst #16691 = VPSHRDVWZ256m |
| 25410 | { 16690, 5, 1, 0, 2253, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa6b978024829ULL }, // Inst #16690 = VPSHRDVWZ128rkz |
| 25411 | { 16689, 5, 1, 0, 2253, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2b978024829ULL }, // Inst #16689 = VPSHRDVWZ128rk |
| 25412 | { 16688, 4, 1, 0, 2335, 0, 0, X86ImpOpBase + 0, 3297, 0, 0xa0b978024829ULL }, // Inst #16688 = VPSHRDVWZ128r |
| 25413 | { 16687, 9, 1, 0, 2017, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa6b978024819ULL }, // Inst #16687 = VPSHRDVWZ128mkz |
| 25414 | { 16686, 9, 1, 0, 2017, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2b978024819ULL }, // Inst #16686 = VPSHRDVWZ128mk |
| 25415 | { 16685, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0b978024819ULL }, // Inst #16685 = VPSHRDVWZ128m |
| 25416 | { 16684, 5, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeeb9f8024829ULL }, // Inst #16684 = VPSHRDVQZrkz |
| 25417 | { 16683, 5, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeab9f8024829ULL }, // Inst #16683 = VPSHRDVQZrk |
| 25418 | { 16682, 4, 1, 0, 1761, 0, 0, X86ImpOpBase + 0, 3313, 0, 0xe8b9f8024829ULL }, // Inst #16682 = VPSHRDVQZr |
| 25419 | { 16681, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8024819ULL }, // Inst #16681 = VPSHRDVQZmkz |
| 25420 | { 16680, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeab9f8024819ULL }, // Inst #16680 = VPSHRDVQZmk |
| 25421 | { 16679, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9eb9f8024819ULL }, // Inst #16679 = VPSHRDVQZmbkz |
| 25422 | { 16678, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9ab9f8024819ULL }, // Inst #16678 = VPSHRDVQZmbk |
| 25423 | { 16677, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x98b9f8024819ULL }, // Inst #16677 = VPSHRDVQZmb |
| 25424 | { 16676, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8024819ULL }, // Inst #16676 = VPSHRDVQZm |
| 25425 | { 16675, 5, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc7b9f8024829ULL }, // Inst #16675 = VPSHRDVQZ256rkz |
| 25426 | { 16674, 5, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3b9f8024829ULL }, // Inst #16674 = VPSHRDVQZ256rk |
| 25427 | { 16673, 4, 1, 0, 2336, 0, 0, X86ImpOpBase + 0, 3309, 0, 0xc1b9f8024829ULL }, // Inst #16673 = VPSHRDVQZ256r |
| 25428 | { 16672, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8024819ULL }, // Inst #16672 = VPSHRDVQZ256mkz |
| 25429 | { 16671, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8024819ULL }, // Inst #16671 = VPSHRDVQZ256mk |
| 25430 | { 16670, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x97b9f8024819ULL }, // Inst #16670 = VPSHRDVQZ256mbkz |
| 25431 | { 16669, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93b9f8024819ULL }, // Inst #16669 = VPSHRDVQZ256mbk |
| 25432 | { 16668, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x91b9f8024819ULL }, // Inst #16668 = VPSHRDVQZ256mb |
| 25433 | { 16667, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8024819ULL }, // Inst #16667 = VPSHRDVQZ256m |
| 25434 | { 16666, 5, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa6b9f8024829ULL }, // Inst #16666 = VPSHRDVQZ128rkz |
| 25435 | { 16665, 5, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2b9f8024829ULL }, // Inst #16665 = VPSHRDVQZ128rk |
| 25436 | { 16664, 4, 1, 0, 2335, 0, 0, X86ImpOpBase + 0, 3297, 0, 0xa0b9f8024829ULL }, // Inst #16664 = VPSHRDVQZ128r |
| 25437 | { 16663, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8024819ULL }, // Inst #16663 = VPSHRDVQZ128mkz |
| 25438 | { 16662, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8024819ULL }, // Inst #16662 = VPSHRDVQZ128mk |
| 25439 | { 16661, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x96b9f8024819ULL }, // Inst #16661 = VPSHRDVQZ128mbkz |
| 25440 | { 16660, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92b9f8024819ULL }, // Inst #16660 = VPSHRDVQZ128mbk |
| 25441 | { 16659, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x90b9f8024819ULL }, // Inst #16659 = VPSHRDVQZ128mb |
| 25442 | { 16658, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8024819ULL }, // Inst #16658 = VPSHRDVQZ128m |
| 25443 | { 16657, 5, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeeb9f8004829ULL }, // Inst #16657 = VPSHRDVDZrkz |
| 25444 | { 16656, 5, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeab9f8004829ULL }, // Inst #16656 = VPSHRDVDZrk |
| 25445 | { 16655, 4, 1, 0, 1761, 0, 0, X86ImpOpBase + 0, 3313, 0, 0xe8b9f8004829ULL }, // Inst #16655 = VPSHRDVDZr |
| 25446 | { 16654, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8004819ULL }, // Inst #16654 = VPSHRDVDZmkz |
| 25447 | { 16653, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeab9f8004819ULL }, // Inst #16653 = VPSHRDVDZmk |
| 25448 | { 16652, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7eb9f8004819ULL }, // Inst #16652 = VPSHRDVDZmbkz |
| 25449 | { 16651, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7ab9f8004819ULL }, // Inst #16651 = VPSHRDVDZmbk |
| 25450 | { 16650, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x78b9f8004819ULL }, // Inst #16650 = VPSHRDVDZmb |
| 25451 | { 16649, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8004819ULL }, // Inst #16649 = VPSHRDVDZm |
| 25452 | { 16648, 5, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc7b9f8004829ULL }, // Inst #16648 = VPSHRDVDZ256rkz |
| 25453 | { 16647, 5, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3b9f8004829ULL }, // Inst #16647 = VPSHRDVDZ256rk |
| 25454 | { 16646, 4, 1, 0, 2336, 0, 0, X86ImpOpBase + 0, 3309, 0, 0xc1b9f8004829ULL }, // Inst #16646 = VPSHRDVDZ256r |
| 25455 | { 16645, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8004819ULL }, // Inst #16645 = VPSHRDVDZ256mkz |
| 25456 | { 16644, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8004819ULL }, // Inst #16644 = VPSHRDVDZ256mk |
| 25457 | { 16643, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x77b9f8004819ULL }, // Inst #16643 = VPSHRDVDZ256mbkz |
| 25458 | { 16642, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73b9f8004819ULL }, // Inst #16642 = VPSHRDVDZ256mbk |
| 25459 | { 16641, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x71b9f8004819ULL }, // Inst #16641 = VPSHRDVDZ256mb |
| 25460 | { 16640, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8004819ULL }, // Inst #16640 = VPSHRDVDZ256m |
| 25461 | { 16639, 5, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa6b9f8004829ULL }, // Inst #16639 = VPSHRDVDZ128rkz |
| 25462 | { 16638, 5, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2b9f8004829ULL }, // Inst #16638 = VPSHRDVDZ128rk |
| 25463 | { 16637, 4, 1, 0, 2335, 0, 0, X86ImpOpBase + 0, 3297, 0, 0xa0b9f8004829ULL }, // Inst #16637 = VPSHRDVDZ128r |
| 25464 | { 16636, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8004819ULL }, // Inst #16636 = VPSHRDVDZ128mkz |
| 25465 | { 16635, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8004819ULL }, // Inst #16635 = VPSHRDVDZ128mk |
| 25466 | { 16634, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x76b9f8004819ULL }, // Inst #16634 = VPSHRDVDZ128mbkz |
| 25467 | { 16633, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72b9f8004819ULL }, // Inst #16633 = VPSHRDVDZ128mbk |
| 25468 | { 16632, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x70b9f8004819ULL }, // Inst #16632 = VPSHRDVDZ128mb |
| 25469 | { 16631, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8004819ULL }, // Inst #16631 = VPSHRDVDZ128m |
| 25470 | { 16630, 5, 1, 0, 2343, 0, 0, X86ImpOpBase + 0, 2184, 0, 0xeeb9f8066829ULL }, // Inst #16630 = VPSHRDQZrrikz |
| 25471 | { 16629, 6, 1, 0, 2343, 0, 0, X86ImpOpBase + 0, 2178, 0, 0xeab9f8066829ULL }, // Inst #16629 = VPSHRDQZrrik |
| 25472 | { 16628, 4, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8b9f8066829ULL }, // Inst #16628 = VPSHRDQZrri |
| 25473 | { 16627, 9, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8066819ULL }, // Inst #16627 = VPSHRDQZrmikz |
| 25474 | { 16626, 10, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xeab9f8066819ULL }, // Inst #16626 = VPSHRDQZrmik |
| 25475 | { 16625, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8066819ULL }, // Inst #16625 = VPSHRDQZrmi |
| 25476 | { 16624, 9, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0x9eb9f8066819ULL }, // Inst #16624 = VPSHRDQZrmbikz |
| 25477 | { 16623, 10, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0x9ab9f8066819ULL }, // Inst #16623 = VPSHRDQZrmbik |
| 25478 | { 16622, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x98b9f8066819ULL }, // Inst #16622 = VPSHRDQZrmbi |
| 25479 | { 16621, 5, 1, 0, 2338, 0, 0, X86ImpOpBase + 0, 2154, 0, 0xc7b9f8066829ULL }, // Inst #16621 = VPSHRDQZ256rrikz |
| 25480 | { 16620, 6, 1, 0, 2338, 0, 0, X86ImpOpBase + 0, 2148, 0, 0xc3b9f8066829ULL }, // Inst #16620 = VPSHRDQZ256rrik |
| 25481 | { 16619, 4, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1b9f8066829ULL }, // Inst #16619 = VPSHRDQZ256rri |
| 25482 | { 16618, 9, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8066819ULL }, // Inst #16618 = VPSHRDQZ256rmikz |
| 25483 | { 16617, 10, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8066819ULL }, // Inst #16617 = VPSHRDQZ256rmik |
| 25484 | { 16616, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8066819ULL }, // Inst #16616 = VPSHRDQZ256rmi |
| 25485 | { 16615, 9, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0x97b9f8066819ULL }, // Inst #16615 = VPSHRDQZ256rmbikz |
| 25486 | { 16614, 10, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0x93b9f8066819ULL }, // Inst #16614 = VPSHRDQZ256rmbik |
| 25487 | { 16613, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x91b9f8066819ULL }, // Inst #16613 = VPSHRDQZ256rmbi |
| 25488 | { 16612, 5, 1, 0, 2337, 0, 0, X86ImpOpBase + 0, 2124, 0, 0xa6b9f8066829ULL }, // Inst #16612 = VPSHRDQZ128rrikz |
| 25489 | { 16611, 6, 1, 0, 2337, 0, 0, X86ImpOpBase + 0, 2118, 0, 0xa2b9f8066829ULL }, // Inst #16611 = VPSHRDQZ128rrik |
| 25490 | { 16610, 4, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0b9f8066829ULL }, // Inst #16610 = VPSHRDQZ128rri |
| 25491 | { 16609, 9, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2109, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8066819ULL }, // Inst #16609 = VPSHRDQZ128rmikz |
| 25492 | { 16608, 10, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8066819ULL }, // Inst #16608 = VPSHRDQZ128rmik |
| 25493 | { 16607, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8066819ULL }, // Inst #16607 = VPSHRDQZ128rmi |
| 25494 | { 16606, 9, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2109, 0|(1ULL<<MCID::MayLoad), 0x96b9f8066819ULL }, // Inst #16606 = VPSHRDQZ128rmbikz |
| 25495 | { 16605, 10, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad), 0x92b9f8066819ULL }, // Inst #16605 = VPSHRDQZ128rmbik |
| 25496 | { 16604, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x90b9f8066819ULL }, // Inst #16604 = VPSHRDQZ128rmbi |
| 25497 | { 16603, 5, 1, 0, 2343, 0, 0, X86ImpOpBase + 0, 2094, 0, 0xeeb9f8046829ULL }, // Inst #16603 = VPSHRDDZrrikz |
| 25498 | { 16602, 6, 1, 0, 2343, 0, 0, X86ImpOpBase + 0, 2088, 0, 0xeab9f8046829ULL }, // Inst #16602 = VPSHRDDZrrik |
| 25499 | { 16601, 4, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8b9f8046829ULL }, // Inst #16601 = VPSHRDDZrri |
| 25500 | { 16600, 9, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0xeeb9f8046819ULL }, // Inst #16600 = VPSHRDDZrmikz |
| 25501 | { 16599, 10, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xeab9f8046819ULL }, // Inst #16599 = VPSHRDDZrmik |
| 25502 | { 16598, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8b9f8046819ULL }, // Inst #16598 = VPSHRDDZrmi |
| 25503 | { 16597, 9, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0x7eb9f8046819ULL }, // Inst #16597 = VPSHRDDZrmbikz |
| 25504 | { 16596, 10, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0x7ab9f8046819ULL }, // Inst #16596 = VPSHRDDZrmbik |
| 25505 | { 16595, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x78b9f8046819ULL }, // Inst #16595 = VPSHRDDZrmbi |
| 25506 | { 16594, 5, 1, 0, 2338, 0, 0, X86ImpOpBase + 0, 2056, 0, 0xc7b9f8046829ULL }, // Inst #16594 = VPSHRDDZ256rrikz |
| 25507 | { 16593, 6, 1, 0, 2338, 0, 0, X86ImpOpBase + 0, 2050, 0, 0xc3b9f8046829ULL }, // Inst #16593 = VPSHRDDZ256rrik |
| 25508 | { 16592, 4, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1b9f8046829ULL }, // Inst #16592 = VPSHRDDZ256rri |
| 25509 | { 16591, 9, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0xc7b9f8046819ULL }, // Inst #16591 = VPSHRDDZ256rmikz |
| 25510 | { 16590, 10, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0xc3b9f8046819ULL }, // Inst #16590 = VPSHRDDZ256rmik |
| 25511 | { 16589, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1b9f8046819ULL }, // Inst #16589 = VPSHRDDZ256rmi |
| 25512 | { 16588, 9, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0x77b9f8046819ULL }, // Inst #16588 = VPSHRDDZ256rmbikz |
| 25513 | { 16587, 10, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0x73b9f8046819ULL }, // Inst #16587 = VPSHRDDZ256rmbik |
| 25514 | { 16586, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x71b9f8046819ULL }, // Inst #16586 = VPSHRDDZ256rmbi |
| 25515 | { 16585, 5, 1, 0, 2337, 0, 0, X86ImpOpBase + 0, 2018, 0, 0xa6b9f8046829ULL }, // Inst #16585 = VPSHRDDZ128rrikz |
| 25516 | { 16584, 6, 1, 0, 2337, 0, 0, X86ImpOpBase + 0, 2012, 0, 0xa2b9f8046829ULL }, // Inst #16584 = VPSHRDDZ128rrik |
| 25517 | { 16583, 4, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0b9f8046829ULL }, // Inst #16583 = VPSHRDDZ128rri |
| 25518 | { 16582, 9, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2003, 0|(1ULL<<MCID::MayLoad), 0xa6b9f8046819ULL }, // Inst #16582 = VPSHRDDZ128rmikz |
| 25519 | { 16581, 10, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad), 0xa2b9f8046819ULL }, // Inst #16581 = VPSHRDDZ128rmik |
| 25520 | { 16580, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0b9f8046819ULL }, // Inst #16580 = VPSHRDDZ128rmi |
| 25521 | { 16579, 9, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2003, 0|(1ULL<<MCID::MayLoad), 0x76b9f8046819ULL }, // Inst #16579 = VPSHRDDZ128rmbikz |
| 25522 | { 16578, 10, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad), 0x72b9f8046819ULL }, // Inst #16578 = VPSHRDDZ128rmbik |
| 25523 | { 16577, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x70b9f8046819ULL }, // Inst #16577 = VPSHRDDZ128rmbi |
| 25524 | { 16576, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xcad802a029ULL }, // Inst #16576 = VPSHLWrr_REV |
| 25525 | { 16575, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x4ad800a02aULL }, // Inst #16575 = VPSHLWrr |
| 25526 | { 16574, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xcad802a019ULL }, // Inst #16574 = VPSHLWrm |
| 25527 | { 16573, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x4ad800a01aULL }, // Inst #16573 = VPSHLWmr |
| 25528 | { 16572, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xcbd802a029ULL }, // Inst #16572 = VPSHLQrr_REV |
| 25529 | { 16571, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x4bd800a02aULL }, // Inst #16571 = VPSHLQrr |
| 25530 | { 16570, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xcbd802a019ULL }, // Inst #16570 = VPSHLQrm |
| 25531 | { 16569, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x4bd800a01aULL }, // Inst #16569 = VPSHLQmr |
| 25532 | { 16568, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xcb5802a029ULL }, // Inst #16568 = VPSHLDrr_REV |
| 25533 | { 16567, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x4b5800a02aULL }, // Inst #16567 = VPSHLDrr |
| 25534 | { 16566, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xcb5802a019ULL }, // Inst #16566 = VPSHLDrm |
| 25535 | { 16565, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x4b5800a01aULL }, // Inst #16565 = VPSHLDmr |
| 25536 | { 16564, 5, 1, 0, 1088, 0, 0, X86ImpOpBase + 0, 3292, 0, 0xeeb878066829ULL }, // Inst #16564 = VPSHLDWZrrikz |
| 25537 | { 16563, 6, 1, 0, 1088, 0, 0, X86ImpOpBase + 0, 3286, 0, 0xeab878066829ULL }, // Inst #16563 = VPSHLDWZrrik |
| 25538 | { 16562, 4, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8b878066829ULL }, // Inst #16562 = VPSHLDWZrri |
| 25539 | { 16561, 9, 1, 0, 2346, 0, 0, X86ImpOpBase + 0, 3277, 0|(1ULL<<MCID::MayLoad), 0xeeb878066819ULL }, // Inst #16561 = VPSHLDWZrmikz |
| 25540 | { 16560, 10, 1, 0, 2346, 0, 0, X86ImpOpBase + 0, 3267, 0|(1ULL<<MCID::MayLoad), 0xeab878066819ULL }, // Inst #16560 = VPSHLDWZrmik |
| 25541 | { 16559, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8b878066819ULL }, // Inst #16559 = VPSHLDWZrmi |
| 25542 | { 16558, 5, 1, 0, 1087, 0, 0, X86ImpOpBase + 0, 3262, 0, 0xc7b878066829ULL }, // Inst #16558 = VPSHLDWZ256rrikz |
| 25543 | { 16557, 6, 1, 0, 1087, 0, 0, X86ImpOpBase + 0, 3256, 0, 0xc3b878066829ULL }, // Inst #16557 = VPSHLDWZ256rrik |
| 25544 | { 16556, 4, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1b878066829ULL }, // Inst #16556 = VPSHLDWZ256rri |
| 25545 | { 16555, 9, 1, 0, 2345, 0, 0, X86ImpOpBase + 0, 3247, 0|(1ULL<<MCID::MayLoad), 0xc7b878066819ULL }, // Inst #16555 = VPSHLDWZ256rmikz |
| 25546 | { 16554, 10, 1, 0, 2345, 0, 0, X86ImpOpBase + 0, 3237, 0|(1ULL<<MCID::MayLoad), 0xc3b878066819ULL }, // Inst #16554 = VPSHLDWZ256rmik |
| 25547 | { 16553, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1b878066819ULL }, // Inst #16553 = VPSHLDWZ256rmi |
| 25548 | { 16552, 5, 1, 0, 1086, 0, 0, X86ImpOpBase + 0, 3232, 0, 0xa6b878066829ULL }, // Inst #16552 = VPSHLDWZ128rrikz |
| 25549 | { 16551, 6, 1, 0, 1086, 0, 0, X86ImpOpBase + 0, 3226, 0, 0xa2b878066829ULL }, // Inst #16551 = VPSHLDWZ128rrik |
| 25550 | { 16550, 4, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0b878066829ULL }, // Inst #16550 = VPSHLDWZ128rri |
| 25551 | { 16549, 9, 1, 0, 2344, 0, 0, X86ImpOpBase + 0, 3217, 0|(1ULL<<MCID::MayLoad), 0xa6b878066819ULL }, // Inst #16549 = VPSHLDWZ128rmikz |
| 25552 | { 16548, 10, 1, 0, 2344, 0, 0, X86ImpOpBase + 0, 3207, 0|(1ULL<<MCID::MayLoad), 0xa2b878066819ULL }, // Inst #16548 = VPSHLDWZ128rmik |
| 25553 | { 16547, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0b878066819ULL }, // Inst #16547 = VPSHLDWZ128rmi |
| 25554 | { 16546, 5, 1, 0, 1770, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeeb878024829ULL }, // Inst #16546 = VPSHLDVWZrkz |
| 25555 | { 16545, 5, 1, 0, 1770, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeab878024829ULL }, // Inst #16545 = VPSHLDVWZrk |
| 25556 | { 16544, 4, 1, 0, 1761, 0, 0, X86ImpOpBase + 0, 3313, 0, 0xe8b878024829ULL }, // Inst #16544 = VPSHLDVWZr |
| 25557 | { 16543, 9, 1, 0, 1819, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeeb878024819ULL }, // Inst #16543 = VPSHLDVWZmkz |
| 25558 | { 16542, 9, 1, 0, 1819, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeab878024819ULL }, // Inst #16542 = VPSHLDVWZmk |
| 25559 | { 16541, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8b878024819ULL }, // Inst #16541 = VPSHLDVWZm |
| 25560 | { 16540, 5, 1, 0, 2254, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc7b878024829ULL }, // Inst #16540 = VPSHLDVWZ256rkz |
| 25561 | { 16539, 5, 1, 0, 2254, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3b878024829ULL }, // Inst #16539 = VPSHLDVWZ256rk |
| 25562 | { 16538, 4, 1, 0, 2336, 0, 0, X86ImpOpBase + 0, 3309, 0, 0xc1b878024829ULL }, // Inst #16538 = VPSHLDVWZ256r |
| 25563 | { 16537, 9, 1, 0, 2021, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc7b878024819ULL }, // Inst #16537 = VPSHLDVWZ256mkz |
| 25564 | { 16536, 9, 1, 0, 2021, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3b878024819ULL }, // Inst #16536 = VPSHLDVWZ256mk |
| 25565 | { 16535, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1b878024819ULL }, // Inst #16535 = VPSHLDVWZ256m |
| 25566 | { 16534, 5, 1, 0, 2253, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa6b878024829ULL }, // Inst #16534 = VPSHLDVWZ128rkz |
| 25567 | { 16533, 5, 1, 0, 2253, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2b878024829ULL }, // Inst #16533 = VPSHLDVWZ128rk |
| 25568 | { 16532, 4, 1, 0, 2335, 0, 0, X86ImpOpBase + 0, 3297, 0, 0xa0b878024829ULL }, // Inst #16532 = VPSHLDVWZ128r |
| 25569 | { 16531, 9, 1, 0, 2017, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa6b878024819ULL }, // Inst #16531 = VPSHLDVWZ128mkz |
| 25570 | { 16530, 9, 1, 0, 2017, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2b878024819ULL }, // Inst #16530 = VPSHLDVWZ128mk |
| 25571 | { 16529, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0b878024819ULL }, // Inst #16529 = VPSHLDVWZ128m |
| 25572 | { 16528, 5, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeeb8f8024829ULL }, // Inst #16528 = VPSHLDVQZrkz |
| 25573 | { 16527, 5, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeab8f8024829ULL }, // Inst #16527 = VPSHLDVQZrk |
| 25574 | { 16526, 4, 1, 0, 1761, 0, 0, X86ImpOpBase + 0, 3313, 0, 0xe8b8f8024829ULL }, // Inst #16526 = VPSHLDVQZr |
| 25575 | { 16525, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8024819ULL }, // Inst #16525 = VPSHLDVQZmkz |
| 25576 | { 16524, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeab8f8024819ULL }, // Inst #16524 = VPSHLDVQZmk |
| 25577 | { 16523, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9eb8f8024819ULL }, // Inst #16523 = VPSHLDVQZmbkz |
| 25578 | { 16522, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9ab8f8024819ULL }, // Inst #16522 = VPSHLDVQZmbk |
| 25579 | { 16521, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x98b8f8024819ULL }, // Inst #16521 = VPSHLDVQZmb |
| 25580 | { 16520, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8024819ULL }, // Inst #16520 = VPSHLDVQZm |
| 25581 | { 16519, 5, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc7b8f8024829ULL }, // Inst #16519 = VPSHLDVQZ256rkz |
| 25582 | { 16518, 5, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3b8f8024829ULL }, // Inst #16518 = VPSHLDVQZ256rk |
| 25583 | { 16517, 4, 1, 0, 2336, 0, 0, X86ImpOpBase + 0, 3309, 0, 0xc1b8f8024829ULL }, // Inst #16517 = VPSHLDVQZ256r |
| 25584 | { 16516, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8024819ULL }, // Inst #16516 = VPSHLDVQZ256mkz |
| 25585 | { 16515, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8024819ULL }, // Inst #16515 = VPSHLDVQZ256mk |
| 25586 | { 16514, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x97b8f8024819ULL }, // Inst #16514 = VPSHLDVQZ256mbkz |
| 25587 | { 16513, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93b8f8024819ULL }, // Inst #16513 = VPSHLDVQZ256mbk |
| 25588 | { 16512, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x91b8f8024819ULL }, // Inst #16512 = VPSHLDVQZ256mb |
| 25589 | { 16511, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8024819ULL }, // Inst #16511 = VPSHLDVQZ256m |
| 25590 | { 16510, 5, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa6b8f8024829ULL }, // Inst #16510 = VPSHLDVQZ128rkz |
| 25591 | { 16509, 5, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2b8f8024829ULL }, // Inst #16509 = VPSHLDVQZ128rk |
| 25592 | { 16508, 4, 1, 0, 2335, 0, 0, X86ImpOpBase + 0, 3297, 0, 0xa0b8f8024829ULL }, // Inst #16508 = VPSHLDVQZ128r |
| 25593 | { 16507, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8024819ULL }, // Inst #16507 = VPSHLDVQZ128mkz |
| 25594 | { 16506, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8024819ULL }, // Inst #16506 = VPSHLDVQZ128mk |
| 25595 | { 16505, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x96b8f8024819ULL }, // Inst #16505 = VPSHLDVQZ128mbkz |
| 25596 | { 16504, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92b8f8024819ULL }, // Inst #16504 = VPSHLDVQZ128mbk |
| 25597 | { 16503, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x90b8f8024819ULL }, // Inst #16503 = VPSHLDVQZ128mb |
| 25598 | { 16502, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8024819ULL }, // Inst #16502 = VPSHLDVQZ128m |
| 25599 | { 16501, 5, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeeb8f8004829ULL }, // Inst #16501 = VPSHLDVDZrkz |
| 25600 | { 16500, 5, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeab8f8004829ULL }, // Inst #16500 = VPSHLDVDZrk |
| 25601 | { 16499, 4, 1, 0, 1761, 0, 0, X86ImpOpBase + 0, 3313, 0, 0xe8b8f8004829ULL }, // Inst #16499 = VPSHLDVDZr |
| 25602 | { 16498, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8004819ULL }, // Inst #16498 = VPSHLDVDZmkz |
| 25603 | { 16497, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeab8f8004819ULL }, // Inst #16497 = VPSHLDVDZmk |
| 25604 | { 16496, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7eb8f8004819ULL }, // Inst #16496 = VPSHLDVDZmbkz |
| 25605 | { 16495, 9, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7ab8f8004819ULL }, // Inst #16495 = VPSHLDVDZmbk |
| 25606 | { 16494, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x78b8f8004819ULL }, // Inst #16494 = VPSHLDVDZmb |
| 25607 | { 16493, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8004819ULL }, // Inst #16493 = VPSHLDVDZm |
| 25608 | { 16492, 5, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc7b8f8004829ULL }, // Inst #16492 = VPSHLDVDZ256rkz |
| 25609 | { 16491, 5, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3b8f8004829ULL }, // Inst #16491 = VPSHLDVDZ256rk |
| 25610 | { 16490, 4, 1, 0, 2336, 0, 0, X86ImpOpBase + 0, 3309, 0, 0xc1b8f8004829ULL }, // Inst #16490 = VPSHLDVDZ256r |
| 25611 | { 16489, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8004819ULL }, // Inst #16489 = VPSHLDVDZ256mkz |
| 25612 | { 16488, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8004819ULL }, // Inst #16488 = VPSHLDVDZ256mk |
| 25613 | { 16487, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x77b8f8004819ULL }, // Inst #16487 = VPSHLDVDZ256mbkz |
| 25614 | { 16486, 9, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73b8f8004819ULL }, // Inst #16486 = VPSHLDVDZ256mbk |
| 25615 | { 16485, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x71b8f8004819ULL }, // Inst #16485 = VPSHLDVDZ256mb |
| 25616 | { 16484, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8004819ULL }, // Inst #16484 = VPSHLDVDZ256m |
| 25617 | { 16483, 5, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa6b8f8004829ULL }, // Inst #16483 = VPSHLDVDZ128rkz |
| 25618 | { 16482, 5, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2b8f8004829ULL }, // Inst #16482 = VPSHLDVDZ128rk |
| 25619 | { 16481, 4, 1, 0, 2335, 0, 0, X86ImpOpBase + 0, 3297, 0, 0xa0b8f8004829ULL }, // Inst #16481 = VPSHLDVDZ128r |
| 25620 | { 16480, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8004819ULL }, // Inst #16480 = VPSHLDVDZ128mkz |
| 25621 | { 16479, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8004819ULL }, // Inst #16479 = VPSHLDVDZ128mk |
| 25622 | { 16478, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x76b8f8004819ULL }, // Inst #16478 = VPSHLDVDZ128mbkz |
| 25623 | { 16477, 9, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72b8f8004819ULL }, // Inst #16477 = VPSHLDVDZ128mbk |
| 25624 | { 16476, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x70b8f8004819ULL }, // Inst #16476 = VPSHLDVDZ128mb |
| 25625 | { 16475, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8004819ULL }, // Inst #16475 = VPSHLDVDZ128m |
| 25626 | { 16474, 5, 1, 0, 2343, 0, 0, X86ImpOpBase + 0, 2184, 0, 0xeeb8f8066829ULL }, // Inst #16474 = VPSHLDQZrrikz |
| 25627 | { 16473, 6, 1, 0, 2343, 0, 0, X86ImpOpBase + 0, 2178, 0, 0xeab8f8066829ULL }, // Inst #16473 = VPSHLDQZrrik |
| 25628 | { 16472, 4, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8b8f8066829ULL }, // Inst #16472 = VPSHLDQZrri |
| 25629 | { 16471, 9, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8066819ULL }, // Inst #16471 = VPSHLDQZrmikz |
| 25630 | { 16470, 10, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xeab8f8066819ULL }, // Inst #16470 = VPSHLDQZrmik |
| 25631 | { 16469, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8066819ULL }, // Inst #16469 = VPSHLDQZrmi |
| 25632 | { 16468, 9, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0x9eb8f8066819ULL }, // Inst #16468 = VPSHLDQZrmbikz |
| 25633 | { 16467, 10, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0x9ab8f8066819ULL }, // Inst #16467 = VPSHLDQZrmbik |
| 25634 | { 16466, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x98b8f8066819ULL }, // Inst #16466 = VPSHLDQZrmbi |
| 25635 | { 16465, 5, 1, 0, 2338, 0, 0, X86ImpOpBase + 0, 2154, 0, 0xc7b8f8066829ULL }, // Inst #16465 = VPSHLDQZ256rrikz |
| 25636 | { 16464, 6, 1, 0, 2338, 0, 0, X86ImpOpBase + 0, 2148, 0, 0xc3b8f8066829ULL }, // Inst #16464 = VPSHLDQZ256rrik |
| 25637 | { 16463, 4, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1b8f8066829ULL }, // Inst #16463 = VPSHLDQZ256rri |
| 25638 | { 16462, 9, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8066819ULL }, // Inst #16462 = VPSHLDQZ256rmikz |
| 25639 | { 16461, 10, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8066819ULL }, // Inst #16461 = VPSHLDQZ256rmik |
| 25640 | { 16460, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8066819ULL }, // Inst #16460 = VPSHLDQZ256rmi |
| 25641 | { 16459, 9, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0x97b8f8066819ULL }, // Inst #16459 = VPSHLDQZ256rmbikz |
| 25642 | { 16458, 10, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0x93b8f8066819ULL }, // Inst #16458 = VPSHLDQZ256rmbik |
| 25643 | { 16457, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x91b8f8066819ULL }, // Inst #16457 = VPSHLDQZ256rmbi |
| 25644 | { 16456, 5, 1, 0, 2337, 0, 0, X86ImpOpBase + 0, 2124, 0, 0xa6b8f8066829ULL }, // Inst #16456 = VPSHLDQZ128rrikz |
| 25645 | { 16455, 6, 1, 0, 2337, 0, 0, X86ImpOpBase + 0, 2118, 0, 0xa2b8f8066829ULL }, // Inst #16455 = VPSHLDQZ128rrik |
| 25646 | { 16454, 4, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0b8f8066829ULL }, // Inst #16454 = VPSHLDQZ128rri |
| 25647 | { 16453, 9, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2109, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8066819ULL }, // Inst #16453 = VPSHLDQZ128rmikz |
| 25648 | { 16452, 10, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8066819ULL }, // Inst #16452 = VPSHLDQZ128rmik |
| 25649 | { 16451, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8066819ULL }, // Inst #16451 = VPSHLDQZ128rmi |
| 25650 | { 16450, 9, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2109, 0|(1ULL<<MCID::MayLoad), 0x96b8f8066819ULL }, // Inst #16450 = VPSHLDQZ128rmbikz |
| 25651 | { 16449, 10, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad), 0x92b8f8066819ULL }, // Inst #16449 = VPSHLDQZ128rmbik |
| 25652 | { 16448, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x90b8f8066819ULL }, // Inst #16448 = VPSHLDQZ128rmbi |
| 25653 | { 16447, 5, 1, 0, 2343, 0, 0, X86ImpOpBase + 0, 2094, 0, 0xeeb8f8046829ULL }, // Inst #16447 = VPSHLDDZrrikz |
| 25654 | { 16446, 6, 1, 0, 2343, 0, 0, X86ImpOpBase + 0, 2088, 0, 0xeab8f8046829ULL }, // Inst #16446 = VPSHLDDZrrik |
| 25655 | { 16445, 4, 1, 0, 1760, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8b8f8046829ULL }, // Inst #16445 = VPSHLDDZrri |
| 25656 | { 16444, 9, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0xeeb8f8046819ULL }, // Inst #16444 = VPSHLDDZrmikz |
| 25657 | { 16443, 10, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xeab8f8046819ULL }, // Inst #16443 = VPSHLDDZrmik |
| 25658 | { 16442, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8b8f8046819ULL }, // Inst #16442 = VPSHLDDZrmi |
| 25659 | { 16441, 9, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0x7eb8f8046819ULL }, // Inst #16441 = VPSHLDDZrmbikz |
| 25660 | { 16440, 10, 1, 0, 2342, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0x7ab8f8046819ULL }, // Inst #16440 = VPSHLDDZrmbik |
| 25661 | { 16439, 8, 1, 0, 2341, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x78b8f8046819ULL }, // Inst #16439 = VPSHLDDZrmbi |
| 25662 | { 16438, 5, 1, 0, 2338, 0, 0, X86ImpOpBase + 0, 2056, 0, 0xc7b8f8046829ULL }, // Inst #16438 = VPSHLDDZ256rrikz |
| 25663 | { 16437, 6, 1, 0, 2338, 0, 0, X86ImpOpBase + 0, 2050, 0, 0xc3b8f8046829ULL }, // Inst #16437 = VPSHLDDZ256rrik |
| 25664 | { 16436, 4, 1, 0, 2334, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1b8f8046829ULL }, // Inst #16436 = VPSHLDDZ256rri |
| 25665 | { 16435, 9, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0xc7b8f8046819ULL }, // Inst #16435 = VPSHLDDZ256rmikz |
| 25666 | { 16434, 10, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0xc3b8f8046819ULL }, // Inst #16434 = VPSHLDDZ256rmik |
| 25667 | { 16433, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1b8f8046819ULL }, // Inst #16433 = VPSHLDDZ256rmi |
| 25668 | { 16432, 9, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0x77b8f8046819ULL }, // Inst #16432 = VPSHLDDZ256rmbikz |
| 25669 | { 16431, 10, 1, 0, 2340, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0x73b8f8046819ULL }, // Inst #16431 = VPSHLDDZ256rmbik |
| 25670 | { 16430, 8, 1, 0, 2339, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x71b8f8046819ULL }, // Inst #16430 = VPSHLDDZ256rmbi |
| 25671 | { 16429, 5, 1, 0, 2337, 0, 0, X86ImpOpBase + 0, 2018, 0, 0xa6b8f8046829ULL }, // Inst #16429 = VPSHLDDZ128rrikz |
| 25672 | { 16428, 6, 1, 0, 2337, 0, 0, X86ImpOpBase + 0, 2012, 0, 0xa2b8f8046829ULL }, // Inst #16428 = VPSHLDDZ128rrik |
| 25673 | { 16427, 4, 1, 0, 2333, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0b8f8046829ULL }, // Inst #16427 = VPSHLDDZ128rri |
| 25674 | { 16426, 9, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2003, 0|(1ULL<<MCID::MayLoad), 0xa6b8f8046819ULL }, // Inst #16426 = VPSHLDDZ128rmikz |
| 25675 | { 16425, 10, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad), 0xa2b8f8046819ULL }, // Inst #16425 = VPSHLDDZ128rmik |
| 25676 | { 16424, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0b8f8046819ULL }, // Inst #16424 = VPSHLDDZ128rmi |
| 25677 | { 16423, 9, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 2003, 0|(1ULL<<MCID::MayLoad), 0x76b8f8046819ULL }, // Inst #16423 = VPSHLDDZ128rmbikz |
| 25678 | { 16422, 10, 1, 0, 2332, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad), 0x72b8f8046819ULL }, // Inst #16422 = VPSHLDDZ128rmbik |
| 25679 | { 16421, 8, 1, 0, 2331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x70b8f8046819ULL }, // Inst #16421 = VPSHLDDZ128rmbi |
| 25680 | { 16420, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xca5802a029ULL }, // Inst #16420 = VPSHLBrr_REV |
| 25681 | { 16419, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x4a5800a02aULL }, // Inst #16419 = VPSHLBrr |
| 25682 | { 16418, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xca5802a019ULL }, // Inst #16418 = VPSHLBrm |
| 25683 | { 16417, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x4a5800a01aULL }, // Inst #16417 = VPSHLBmr |
| 25684 | { 16416, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xccd802a029ULL }, // Inst #16416 = VPSHAWrr_REV |
| 25685 | { 16415, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x4cd800a02aULL }, // Inst #16415 = VPSHAWrr |
| 25686 | { 16414, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xccd802a019ULL }, // Inst #16414 = VPSHAWrm |
| 25687 | { 16413, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x4cd800a01aULL }, // Inst #16413 = VPSHAWmr |
| 25688 | { 16412, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xcdd802a029ULL }, // Inst #16412 = VPSHAQrr_REV |
| 25689 | { 16411, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x4dd800a02aULL }, // Inst #16411 = VPSHAQrr |
| 25690 | { 16410, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xcdd802a019ULL }, // Inst #16410 = VPSHAQrm |
| 25691 | { 16409, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x4dd800a01aULL }, // Inst #16409 = VPSHAQmr |
| 25692 | { 16408, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xcd5802a029ULL }, // Inst #16408 = VPSHADrr_REV |
| 25693 | { 16407, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x4d5800a02aULL }, // Inst #16407 = VPSHADrr |
| 25694 | { 16406, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xcd5802a019ULL }, // Inst #16406 = VPSHADrm |
| 25695 | { 16405, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x4d5800a01aULL }, // Inst #16405 = VPSHADmr |
| 25696 | { 16404, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xcc5802a029ULL }, // Inst #16404 = VPSHABrr_REV |
| 25697 | { 16403, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x4c5800a02aULL }, // Inst #16403 = VPSHABrr |
| 25698 | { 16402, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xcc5802a019ULL }, // Inst #16402 = VPSHABrm |
| 25699 | { 16401, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x4c5800a01aULL }, // Inst #16401 = VPSHABmr |
| 25700 | { 16400, 8, 1, 0, 2330, 0, 0, X86ImpOpBase + 0, 5606, 0|(1ULL<<MCID::MayStore), 0x8a50f8024818ULL }, // Inst #16400 = VPSCATTERQQZmr |
| 25701 | { 16399, 8, 1, 0, 1307, 0, 0, X86ImpOpBase + 0, 5598, 0|(1ULL<<MCID::MayStore), 0x8350f8024818ULL }, // Inst #16399 = VPSCATTERQQZ256mr |
| 25702 | { 16398, 8, 1, 0, 1306, 0, 0, X86ImpOpBase + 0, 5558, 0|(1ULL<<MCID::MayStore), 0x8250f8024818ULL }, // Inst #16398 = VPSCATTERQQZ128mr |
| 25703 | { 16397, 8, 1, 0, 1308, 0, 0, X86ImpOpBase + 0, 5590, 0|(1ULL<<MCID::MayStore), 0x6a50f8004818ULL }, // Inst #16397 = VPSCATTERQDZmr |
| 25704 | { 16396, 8, 1, 0, 2329, 0, 0, X86ImpOpBase + 0, 5582, 0|(1ULL<<MCID::MayStore), 0x6350f8004818ULL }, // Inst #16396 = VPSCATTERQDZ256mr |
| 25705 | { 16395, 8, 1, 0, 1327, 0, 0, X86ImpOpBase + 0, 5558, 0|(1ULL<<MCID::MayStore), 0x6250f8004818ULL }, // Inst #16395 = VPSCATTERQDZ128mr |
| 25706 | { 16394, 8, 1, 0, 2330, 0, 0, X86ImpOpBase + 0, 5574, 0|(1ULL<<MCID::MayStore), 0x8a5078024818ULL }, // Inst #16394 = VPSCATTERDQZmr |
| 25707 | { 16393, 8, 1, 0, 1307, 0, 0, X86ImpOpBase + 0, 5566, 0|(1ULL<<MCID::MayStore), 0x835078024818ULL }, // Inst #16393 = VPSCATTERDQZ256mr |
| 25708 | { 16392, 8, 1, 0, 1306, 0, 0, X86ImpOpBase + 0, 5558, 0|(1ULL<<MCID::MayStore), 0x825078024818ULL }, // Inst #16392 = VPSCATTERDQZ128mr |
| 25709 | { 16391, 8, 1, 0, 1330, 0, 0, X86ImpOpBase + 0, 5550, 0|(1ULL<<MCID::MayStore), 0x6a5078004818ULL }, // Inst #16391 = VPSCATTERDDZmr |
| 25710 | { 16390, 8, 1, 0, 1329, 0, 0, X86ImpOpBase + 0, 5542, 0|(1ULL<<MCID::MayStore), 0x635078004818ULL }, // Inst #16390 = VPSCATTERDDZ256mr |
| 25711 | { 16389, 8, 1, 0, 1328, 0, 0, X86ImpOpBase + 0, 5534, 0|(1ULL<<MCID::MayStore), 0x625078004818ULL }, // Inst #16389 = VPSCATTERDDZ128mr |
| 25712 | { 16388, 3, 1, 0, 281, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xfb38002829ULL }, // Inst #16388 = VPSADBWrr |
| 25713 | { 16387, 7, 1, 0, 280, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xfb38002819ULL }, // Inst #16387 = VPSADBWrm |
| 25714 | { 16386, 3, 1, 0, 418, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8fb78002829ULL }, // Inst #16386 = VPSADBWZrr |
| 25715 | { 16385, 7, 1, 0, 417, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8fb78002819ULL }, // Inst #16385 = VPSADBWZrm |
| 25716 | { 16384, 3, 1, 0, 416, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1fb78002829ULL }, // Inst #16384 = VPSADBWZ256rr |
| 25717 | { 16383, 7, 1, 0, 415, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1fb78002819ULL }, // Inst #16383 = VPSADBWZ256rm |
| 25718 | { 16382, 3, 1, 0, 281, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0fb78002829ULL }, // Inst #16382 = VPSADBWZ128rr |
| 25719 | { 16381, 7, 1, 0, 280, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0fb78002819ULL }, // Inst #16381 = VPSADBWZ128rm |
| 25720 | { 16380, 3, 1, 0, 416, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1fb38002829ULL }, // Inst #16380 = VPSADBWYrr |
| 25721 | { 16379, 7, 1, 0, 415, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1fb38002819ULL }, // Inst #16379 = VPSADBWYrm |
| 25722 | { 16378, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xc8d802a029ULL }, // Inst #16378 = VPROTWrr_REV |
| 25723 | { 16377, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x48d800a02aULL }, // Inst #16377 = VPROTWrr |
| 25724 | { 16376, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xc8d802a019ULL }, // Inst #16376 = VPROTWrm |
| 25725 | { 16375, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0x60d8048029ULL }, // Inst #16375 = VPROTWri |
| 25726 | { 16374, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x48d800a01aULL }, // Inst #16374 = VPROTWmr |
| 25727 | { 16373, 7, 1, 0, 557, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x60d8048019ULL }, // Inst #16373 = VPROTWmi |
| 25728 | { 16372, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xc9d802a029ULL }, // Inst #16372 = VPROTQrr_REV |
| 25729 | { 16371, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x49d800a02aULL }, // Inst #16371 = VPROTQrr |
| 25730 | { 16370, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xc9d802a019ULL }, // Inst #16370 = VPROTQrm |
| 25731 | { 16369, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0x61d8048029ULL }, // Inst #16369 = VPROTQri |
| 25732 | { 16368, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x49d800a01aULL }, // Inst #16368 = VPROTQmr |
| 25733 | { 16367, 7, 1, 0, 557, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x61d8048019ULL }, // Inst #16367 = VPROTQmi |
| 25734 | { 16366, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xc95802a029ULL }, // Inst #16366 = VPROTDrr_REV |
| 25735 | { 16365, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x495800a02aULL }, // Inst #16365 = VPROTDrr |
| 25736 | { 16364, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xc95802a019ULL }, // Inst #16364 = VPROTDrm |
| 25737 | { 16363, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0x6158048029ULL }, // Inst #16363 = VPROTDri |
| 25738 | { 16362, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x495800a01aULL }, // Inst #16362 = VPROTDmr |
| 25739 | { 16361, 7, 1, 0, 557, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x6158048019ULL }, // Inst #16361 = VPROTDmi |
| 25740 | { 16360, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xc85802a029ULL }, // Inst #16360 = VPROTBrr_REV |
| 25741 | { 16359, 3, 1, 0, 552, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x485800a02aULL }, // Inst #16359 = VPROTBrr |
| 25742 | { 16358, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xc85802a019ULL }, // Inst #16358 = VPROTBrm |
| 25743 | { 16357, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 544, 0, 0x6058048029ULL }, // Inst #16357 = VPROTBri |
| 25744 | { 16356, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 5527, 0|(1ULL<<MCID::MayLoad), 0x485800a01aULL }, // Inst #16356 = VPROTBmr |
| 25745 | { 16355, 7, 1, 0, 557, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x6058048019ULL }, // Inst #16355 = VPROTBmi |
| 25746 | { 16354, 4, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xee8a78024829ULL }, // Inst #16354 = VPRORVQZrrkz |
| 25747 | { 16353, 5, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xea8a78024829ULL }, // Inst #16353 = VPRORVQZrrk |
| 25748 | { 16352, 3, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88a78024829ULL }, // Inst #16352 = VPRORVQZrr |
| 25749 | { 16351, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee8a78024819ULL }, // Inst #16351 = VPRORVQZrmkz |
| 25750 | { 16350, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea8a78024819ULL }, // Inst #16350 = VPRORVQZrmk |
| 25751 | { 16349, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e8a78024819ULL }, // Inst #16349 = VPRORVQZrmbkz |
| 25752 | { 16348, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a8a78024819ULL }, // Inst #16348 = VPRORVQZrmbk |
| 25753 | { 16347, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x988a78024819ULL }, // Inst #16347 = VPRORVQZrmb |
| 25754 | { 16346, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88a78024819ULL }, // Inst #16346 = VPRORVQZrm |
| 25755 | { 16345, 4, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc78a78024829ULL }, // Inst #16345 = VPRORVQZ256rrkz |
| 25756 | { 16344, 5, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc38a78024829ULL }, // Inst #16344 = VPRORVQZ256rrk |
| 25757 | { 16343, 3, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18a78024829ULL }, // Inst #16343 = VPRORVQZ256rr |
| 25758 | { 16342, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc78a78024819ULL }, // Inst #16342 = VPRORVQZ256rmkz |
| 25759 | { 16341, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc38a78024819ULL }, // Inst #16341 = VPRORVQZ256rmk |
| 25760 | { 16340, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x978a78024819ULL }, // Inst #16340 = VPRORVQZ256rmbkz |
| 25761 | { 16339, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x938a78024819ULL }, // Inst #16339 = VPRORVQZ256rmbk |
| 25762 | { 16338, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x918a78024819ULL }, // Inst #16338 = VPRORVQZ256rmb |
| 25763 | { 16337, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18a78024819ULL }, // Inst #16337 = VPRORVQZ256rm |
| 25764 | { 16336, 4, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa68a78024829ULL }, // Inst #16336 = VPRORVQZ128rrkz |
| 25765 | { 16335, 5, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa28a78024829ULL }, // Inst #16335 = VPRORVQZ128rrk |
| 25766 | { 16334, 3, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08a78024829ULL }, // Inst #16334 = VPRORVQZ128rr |
| 25767 | { 16333, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa68a78024819ULL }, // Inst #16333 = VPRORVQZ128rmkz |
| 25768 | { 16332, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa28a78024819ULL }, // Inst #16332 = VPRORVQZ128rmk |
| 25769 | { 16331, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x968a78024819ULL }, // Inst #16331 = VPRORVQZ128rmbkz |
| 25770 | { 16330, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x928a78024819ULL }, // Inst #16330 = VPRORVQZ128rmbk |
| 25771 | { 16329, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x908a78024819ULL }, // Inst #16329 = VPRORVQZ128rmb |
| 25772 | { 16328, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08a78024819ULL }, // Inst #16328 = VPRORVQZ128rm |
| 25773 | { 16327, 4, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xee8a78004829ULL }, // Inst #16327 = VPRORVDZrrkz |
| 25774 | { 16326, 5, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xea8a78004829ULL }, // Inst #16326 = VPRORVDZrrk |
| 25775 | { 16325, 3, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88a78004829ULL }, // Inst #16325 = VPRORVDZrr |
| 25776 | { 16324, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee8a78004819ULL }, // Inst #16324 = VPRORVDZrmkz |
| 25777 | { 16323, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea8a78004819ULL }, // Inst #16323 = VPRORVDZrmk |
| 25778 | { 16322, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e8a78004819ULL }, // Inst #16322 = VPRORVDZrmbkz |
| 25779 | { 16321, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a8a78004819ULL }, // Inst #16321 = VPRORVDZrmbk |
| 25780 | { 16320, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x788a78004819ULL }, // Inst #16320 = VPRORVDZrmb |
| 25781 | { 16319, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88a78004819ULL }, // Inst #16319 = VPRORVDZrm |
| 25782 | { 16318, 4, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc78a78004829ULL }, // Inst #16318 = VPRORVDZ256rrkz |
| 25783 | { 16317, 5, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc38a78004829ULL }, // Inst #16317 = VPRORVDZ256rrk |
| 25784 | { 16316, 3, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18a78004829ULL }, // Inst #16316 = VPRORVDZ256rr |
| 25785 | { 16315, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc78a78004819ULL }, // Inst #16315 = VPRORVDZ256rmkz |
| 25786 | { 16314, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc38a78004819ULL }, // Inst #16314 = VPRORVDZ256rmk |
| 25787 | { 16313, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x778a78004819ULL }, // Inst #16313 = VPRORVDZ256rmbkz |
| 25788 | { 16312, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x738a78004819ULL }, // Inst #16312 = VPRORVDZ256rmbk |
| 25789 | { 16311, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x718a78004819ULL }, // Inst #16311 = VPRORVDZ256rmb |
| 25790 | { 16310, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18a78004819ULL }, // Inst #16310 = VPRORVDZ256rm |
| 25791 | { 16309, 4, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa68a78004829ULL }, // Inst #16309 = VPRORVDZ128rrkz |
| 25792 | { 16308, 5, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa28a78004829ULL }, // Inst #16308 = VPRORVDZ128rrk |
| 25793 | { 16307, 3, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08a78004829ULL }, // Inst #16307 = VPRORVDZ128rr |
| 25794 | { 16306, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa68a78004819ULL }, // Inst #16306 = VPRORVDZ128rmkz |
| 25795 | { 16305, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa28a78004819ULL }, // Inst #16305 = VPRORVDZ128rmk |
| 25796 | { 16304, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x768a78004819ULL }, // Inst #16304 = VPRORVDZ128rmbkz |
| 25797 | { 16303, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x728a78004819ULL }, // Inst #16303 = VPRORVDZ128rmbk |
| 25798 | { 16302, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x708a78004819ULL }, // Inst #16302 = VPRORVDZ128rmb |
| 25799 | { 16301, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08a78004819ULL }, // Inst #16301 = VPRORVDZ128rm |
| 25800 | { 16300, 4, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4261, 0, 0xeeb978062830ULL }, // Inst #16300 = VPRORQZrikz |
| 25801 | { 16299, 5, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4256, 0, 0xeab978062830ULL }, // Inst #16299 = VPRORQZrik |
| 25802 | { 16298, 3, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b978062830ULL }, // Inst #16298 = VPRORQZri |
| 25803 | { 16297, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0xeeb978062820ULL }, // Inst #16297 = VPRORQZmikz |
| 25804 | { 16296, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0xeab978062820ULL }, // Inst #16296 = VPRORQZmik |
| 25805 | { 16295, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b978062820ULL }, // Inst #16295 = VPRORQZmi |
| 25806 | { 16294, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0x9eb978062820ULL }, // Inst #16294 = VPRORQZmbikz |
| 25807 | { 16293, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0x9ab978062820ULL }, // Inst #16293 = VPRORQZmbik |
| 25808 | { 16292, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x98b978062820ULL }, // Inst #16292 = VPRORQZmbi |
| 25809 | { 16291, 4, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4225, 0, 0xc7b978062830ULL }, // Inst #16291 = VPRORQZ256rikz |
| 25810 | { 16290, 5, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4220, 0, 0xc3b978062830ULL }, // Inst #16290 = VPRORQZ256rik |
| 25811 | { 16289, 3, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b978062830ULL }, // Inst #16289 = VPRORQZ256ri |
| 25812 | { 16288, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0xc7b978062820ULL }, // Inst #16288 = VPRORQZ256mikz |
| 25813 | { 16287, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0xc3b978062820ULL }, // Inst #16287 = VPRORQZ256mik |
| 25814 | { 16286, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b978062820ULL }, // Inst #16286 = VPRORQZ256mi |
| 25815 | { 16285, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0x97b978062820ULL }, // Inst #16285 = VPRORQZ256mbikz |
| 25816 | { 16284, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0x93b978062820ULL }, // Inst #16284 = VPRORQZ256mbik |
| 25817 | { 16283, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x91b978062820ULL }, // Inst #16283 = VPRORQZ256mbi |
| 25818 | { 16282, 4, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 4189, 0, 0xa6b978062830ULL }, // Inst #16282 = VPRORQZ128rikz |
| 25819 | { 16281, 5, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 4184, 0, 0xa2b978062830ULL }, // Inst #16281 = VPRORQZ128rik |
| 25820 | { 16280, 3, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b978062830ULL }, // Inst #16280 = VPRORQZ128ri |
| 25821 | { 16279, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0xa6b978062820ULL }, // Inst #16279 = VPRORQZ128mikz |
| 25822 | { 16278, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0xa2b978062820ULL }, // Inst #16278 = VPRORQZ128mik |
| 25823 | { 16277, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b978062820ULL }, // Inst #16277 = VPRORQZ128mi |
| 25824 | { 16276, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0x96b978062820ULL }, // Inst #16276 = VPRORQZ128mbikz |
| 25825 | { 16275, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0x92b978062820ULL }, // Inst #16275 = VPRORQZ128mbik |
| 25826 | { 16274, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x90b978062820ULL }, // Inst #16274 = VPRORQZ128mbi |
| 25827 | { 16273, 4, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4408, 0, 0xeeb978042830ULL }, // Inst #16273 = VPRORDZrikz |
| 25828 | { 16272, 5, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4403, 0, 0xeab978042830ULL }, // Inst #16272 = VPRORDZrik |
| 25829 | { 16271, 3, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b978042830ULL }, // Inst #16271 = VPRORDZri |
| 25830 | { 16270, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0xeeb978042820ULL }, // Inst #16270 = VPRORDZmikz |
| 25831 | { 16269, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0xeab978042820ULL }, // Inst #16269 = VPRORDZmik |
| 25832 | { 16268, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b978042820ULL }, // Inst #16268 = VPRORDZmi |
| 25833 | { 16267, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0x7eb978042820ULL }, // Inst #16267 = VPRORDZmbikz |
| 25834 | { 16266, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0x7ab978042820ULL }, // Inst #16266 = VPRORDZmbik |
| 25835 | { 16265, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x78b978042820ULL }, // Inst #16265 = VPRORDZmbi |
| 25836 | { 16264, 4, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4382, 0, 0xc7b978042830ULL }, // Inst #16264 = VPRORDZ256rikz |
| 25837 | { 16263, 5, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4377, 0, 0xc3b978042830ULL }, // Inst #16263 = VPRORDZ256rik |
| 25838 | { 16262, 3, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b978042830ULL }, // Inst #16262 = VPRORDZ256ri |
| 25839 | { 16261, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0xc7b978042820ULL }, // Inst #16261 = VPRORDZ256mikz |
| 25840 | { 16260, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0xc3b978042820ULL }, // Inst #16260 = VPRORDZ256mik |
| 25841 | { 16259, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b978042820ULL }, // Inst #16259 = VPRORDZ256mi |
| 25842 | { 16258, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0x77b978042820ULL }, // Inst #16258 = VPRORDZ256mbikz |
| 25843 | { 16257, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0x73b978042820ULL }, // Inst #16257 = VPRORDZ256mbik |
| 25844 | { 16256, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x71b978042820ULL }, // Inst #16256 = VPRORDZ256mbi |
| 25845 | { 16255, 4, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 3044, 0, 0xa6b978042830ULL }, // Inst #16255 = VPRORDZ128rikz |
| 25846 | { 16254, 5, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 3039, 0, 0xa2b978042830ULL }, // Inst #16254 = VPRORDZ128rik |
| 25847 | { 16253, 3, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b978042830ULL }, // Inst #16253 = VPRORDZ128ri |
| 25848 | { 16252, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0xa6b978042820ULL }, // Inst #16252 = VPRORDZ128mikz |
| 25849 | { 16251, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0xa2b978042820ULL }, // Inst #16251 = VPRORDZ128mik |
| 25850 | { 16250, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b978042820ULL }, // Inst #16250 = VPRORDZ128mi |
| 25851 | { 16249, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0x76b978042820ULL }, // Inst #16249 = VPRORDZ128mbikz |
| 25852 | { 16248, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0x72b978042820ULL }, // Inst #16248 = VPRORDZ128mbik |
| 25853 | { 16247, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x70b978042820ULL }, // Inst #16247 = VPRORDZ128mbi |
| 25854 | { 16246, 4, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xee8af8024829ULL }, // Inst #16246 = VPROLVQZrrkz |
| 25855 | { 16245, 5, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xea8af8024829ULL }, // Inst #16245 = VPROLVQZrrk |
| 25856 | { 16244, 3, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88af8024829ULL }, // Inst #16244 = VPROLVQZrr |
| 25857 | { 16243, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee8af8024819ULL }, // Inst #16243 = VPROLVQZrmkz |
| 25858 | { 16242, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea8af8024819ULL }, // Inst #16242 = VPROLVQZrmk |
| 25859 | { 16241, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e8af8024819ULL }, // Inst #16241 = VPROLVQZrmbkz |
| 25860 | { 16240, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a8af8024819ULL }, // Inst #16240 = VPROLVQZrmbk |
| 25861 | { 16239, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x988af8024819ULL }, // Inst #16239 = VPROLVQZrmb |
| 25862 | { 16238, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88af8024819ULL }, // Inst #16238 = VPROLVQZrm |
| 25863 | { 16237, 4, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc78af8024829ULL }, // Inst #16237 = VPROLVQZ256rrkz |
| 25864 | { 16236, 5, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc38af8024829ULL }, // Inst #16236 = VPROLVQZ256rrk |
| 25865 | { 16235, 3, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18af8024829ULL }, // Inst #16235 = VPROLVQZ256rr |
| 25866 | { 16234, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc78af8024819ULL }, // Inst #16234 = VPROLVQZ256rmkz |
| 25867 | { 16233, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc38af8024819ULL }, // Inst #16233 = VPROLVQZ256rmk |
| 25868 | { 16232, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x978af8024819ULL }, // Inst #16232 = VPROLVQZ256rmbkz |
| 25869 | { 16231, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x938af8024819ULL }, // Inst #16231 = VPROLVQZ256rmbk |
| 25870 | { 16230, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x918af8024819ULL }, // Inst #16230 = VPROLVQZ256rmb |
| 25871 | { 16229, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18af8024819ULL }, // Inst #16229 = VPROLVQZ256rm |
| 25872 | { 16228, 4, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa68af8024829ULL }, // Inst #16228 = VPROLVQZ128rrkz |
| 25873 | { 16227, 5, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa28af8024829ULL }, // Inst #16227 = VPROLVQZ128rrk |
| 25874 | { 16226, 3, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08af8024829ULL }, // Inst #16226 = VPROLVQZ128rr |
| 25875 | { 16225, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa68af8024819ULL }, // Inst #16225 = VPROLVQZ128rmkz |
| 25876 | { 16224, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa28af8024819ULL }, // Inst #16224 = VPROLVQZ128rmk |
| 25877 | { 16223, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x968af8024819ULL }, // Inst #16223 = VPROLVQZ128rmbkz |
| 25878 | { 16222, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x928af8024819ULL }, // Inst #16222 = VPROLVQZ128rmbk |
| 25879 | { 16221, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x908af8024819ULL }, // Inst #16221 = VPROLVQZ128rmb |
| 25880 | { 16220, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08af8024819ULL }, // Inst #16220 = VPROLVQZ128rm |
| 25881 | { 16219, 4, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xee8af8004829ULL }, // Inst #16219 = VPROLVDZrrkz |
| 25882 | { 16218, 5, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xea8af8004829ULL }, // Inst #16218 = VPROLVDZrrk |
| 25883 | { 16217, 3, 1, 0, 1100, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88af8004829ULL }, // Inst #16217 = VPROLVDZrr |
| 25884 | { 16216, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee8af8004819ULL }, // Inst #16216 = VPROLVDZrmkz |
| 25885 | { 16215, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea8af8004819ULL }, // Inst #16215 = VPROLVDZrmk |
| 25886 | { 16214, 8, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e8af8004819ULL }, // Inst #16214 = VPROLVDZrmbkz |
| 25887 | { 16213, 9, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a8af8004819ULL }, // Inst #16213 = VPROLVDZrmbk |
| 25888 | { 16212, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x788af8004819ULL }, // Inst #16212 = VPROLVDZrmb |
| 25889 | { 16211, 7, 1, 0, 555, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88af8004819ULL }, // Inst #16211 = VPROLVDZrm |
| 25890 | { 16210, 4, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc78af8004829ULL }, // Inst #16210 = VPROLVDZ256rrkz |
| 25891 | { 16209, 5, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc38af8004829ULL }, // Inst #16209 = VPROLVDZ256rrk |
| 25892 | { 16208, 3, 1, 0, 1099, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18af8004829ULL }, // Inst #16208 = VPROLVDZ256rr |
| 25893 | { 16207, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc78af8004819ULL }, // Inst #16207 = VPROLVDZ256rmkz |
| 25894 | { 16206, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc38af8004819ULL }, // Inst #16206 = VPROLVDZ256rmk |
| 25895 | { 16205, 8, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x778af8004819ULL }, // Inst #16205 = VPROLVDZ256rmbkz |
| 25896 | { 16204, 9, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x738af8004819ULL }, // Inst #16204 = VPROLVDZ256rmbk |
| 25897 | { 16203, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x718af8004819ULL }, // Inst #16203 = VPROLVDZ256rmb |
| 25898 | { 16202, 7, 1, 0, 553, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18af8004819ULL }, // Inst #16202 = VPROLVDZ256rm |
| 25899 | { 16201, 4, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa68af8004829ULL }, // Inst #16201 = VPROLVDZ128rrkz |
| 25900 | { 16200, 5, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa28af8004829ULL }, // Inst #16200 = VPROLVDZ128rrk |
| 25901 | { 16199, 3, 1, 0, 1098, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08af8004829ULL }, // Inst #16199 = VPROLVDZ128rr |
| 25902 | { 16198, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa68af8004819ULL }, // Inst #16198 = VPROLVDZ128rmkz |
| 25903 | { 16197, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa28af8004819ULL }, // Inst #16197 = VPROLVDZ128rmk |
| 25904 | { 16196, 8, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x768af8004819ULL }, // Inst #16196 = VPROLVDZ128rmbkz |
| 25905 | { 16195, 9, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x728af8004819ULL }, // Inst #16195 = VPROLVDZ128rmbk |
| 25906 | { 16194, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x708af8004819ULL }, // Inst #16194 = VPROLVDZ128rmb |
| 25907 | { 16193, 7, 1, 0, 551, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08af8004819ULL }, // Inst #16193 = VPROLVDZ128rm |
| 25908 | { 16192, 4, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4261, 0, 0xeeb978062831ULL }, // Inst #16192 = VPROLQZrikz |
| 25909 | { 16191, 5, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4256, 0, 0xeab978062831ULL }, // Inst #16191 = VPROLQZrik |
| 25910 | { 16190, 3, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b978062831ULL }, // Inst #16190 = VPROLQZri |
| 25911 | { 16189, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0xeeb978062821ULL }, // Inst #16189 = VPROLQZmikz |
| 25912 | { 16188, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0xeab978062821ULL }, // Inst #16188 = VPROLQZmik |
| 25913 | { 16187, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b978062821ULL }, // Inst #16187 = VPROLQZmi |
| 25914 | { 16186, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0x9eb978062821ULL }, // Inst #16186 = VPROLQZmbikz |
| 25915 | { 16185, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0x9ab978062821ULL }, // Inst #16185 = VPROLQZmbik |
| 25916 | { 16184, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x98b978062821ULL }, // Inst #16184 = VPROLQZmbi |
| 25917 | { 16183, 4, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4225, 0, 0xc7b978062831ULL }, // Inst #16183 = VPROLQZ256rikz |
| 25918 | { 16182, 5, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4220, 0, 0xc3b978062831ULL }, // Inst #16182 = VPROLQZ256rik |
| 25919 | { 16181, 3, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b978062831ULL }, // Inst #16181 = VPROLQZ256ri |
| 25920 | { 16180, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0xc7b978062821ULL }, // Inst #16180 = VPROLQZ256mikz |
| 25921 | { 16179, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0xc3b978062821ULL }, // Inst #16179 = VPROLQZ256mik |
| 25922 | { 16178, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b978062821ULL }, // Inst #16178 = VPROLQZ256mi |
| 25923 | { 16177, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0x97b978062821ULL }, // Inst #16177 = VPROLQZ256mbikz |
| 25924 | { 16176, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0x93b978062821ULL }, // Inst #16176 = VPROLQZ256mbik |
| 25925 | { 16175, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x91b978062821ULL }, // Inst #16175 = VPROLQZ256mbi |
| 25926 | { 16174, 4, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 4189, 0, 0xa6b978062831ULL }, // Inst #16174 = VPROLQZ128rikz |
| 25927 | { 16173, 5, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 4184, 0, 0xa2b978062831ULL }, // Inst #16173 = VPROLQZ128rik |
| 25928 | { 16172, 3, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b978062831ULL }, // Inst #16172 = VPROLQZ128ri |
| 25929 | { 16171, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0xa6b978062821ULL }, // Inst #16171 = VPROLQZ128mikz |
| 25930 | { 16170, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0xa2b978062821ULL }, // Inst #16170 = VPROLQZ128mik |
| 25931 | { 16169, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b978062821ULL }, // Inst #16169 = VPROLQZ128mi |
| 25932 | { 16168, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0x96b978062821ULL }, // Inst #16168 = VPROLQZ128mbikz |
| 25933 | { 16167, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0x92b978062821ULL }, // Inst #16167 = VPROLQZ128mbik |
| 25934 | { 16166, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x90b978062821ULL }, // Inst #16166 = VPROLQZ128mbi |
| 25935 | { 16165, 4, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4408, 0, 0xeeb978042831ULL }, // Inst #16165 = VPROLDZrikz |
| 25936 | { 16164, 5, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4403, 0, 0xeab978042831ULL }, // Inst #16164 = VPROLDZrik |
| 25937 | { 16163, 3, 1, 0, 1103, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe8b978042831ULL }, // Inst #16163 = VPROLDZri |
| 25938 | { 16162, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0xeeb978042821ULL }, // Inst #16162 = VPROLDZmikz |
| 25939 | { 16161, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0xeab978042821ULL }, // Inst #16161 = VPROLDZmik |
| 25940 | { 16160, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe8b978042821ULL }, // Inst #16160 = VPROLDZmi |
| 25941 | { 16159, 8, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0x7eb978042821ULL }, // Inst #16159 = VPROLDZmbikz |
| 25942 | { 16158, 9, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0x7ab978042821ULL }, // Inst #16158 = VPROLDZmbik |
| 25943 | { 16157, 7, 1, 0, 549, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x78b978042821ULL }, // Inst #16157 = VPROLDZmbi |
| 25944 | { 16156, 4, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4382, 0, 0xc7b978042831ULL }, // Inst #16156 = VPROLDZ256rikz |
| 25945 | { 16155, 5, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4377, 0, 0xc3b978042831ULL }, // Inst #16155 = VPROLDZ256rik |
| 25946 | { 16154, 3, 1, 0, 1101, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc1b978042831ULL }, // Inst #16154 = VPROLDZ256ri |
| 25947 | { 16153, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0xc7b978042821ULL }, // Inst #16153 = VPROLDZ256mikz |
| 25948 | { 16152, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0xc3b978042821ULL }, // Inst #16152 = VPROLDZ256mik |
| 25949 | { 16151, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc1b978042821ULL }, // Inst #16151 = VPROLDZ256mi |
| 25950 | { 16150, 8, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0x77b978042821ULL }, // Inst #16150 = VPROLDZ256mbikz |
| 25951 | { 16149, 9, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0x73b978042821ULL }, // Inst #16149 = VPROLDZ256mbik |
| 25952 | { 16148, 7, 1, 0, 547, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x71b978042821ULL }, // Inst #16148 = VPROLDZ256mbi |
| 25953 | { 16147, 4, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 3044, 0, 0xa6b978042831ULL }, // Inst #16147 = VPROLDZ128rikz |
| 25954 | { 16146, 5, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 3039, 0, 0xa2b978042831ULL }, // Inst #16146 = VPROLDZ128rik |
| 25955 | { 16145, 3, 1, 0, 1102, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa0b978042831ULL }, // Inst #16145 = VPROLDZ128ri |
| 25956 | { 16144, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0xa6b978042821ULL }, // Inst #16144 = VPROLDZ128mikz |
| 25957 | { 16143, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0xa2b978042821ULL }, // Inst #16143 = VPROLDZ128mik |
| 25958 | { 16142, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa0b978042821ULL }, // Inst #16142 = VPROLDZ128mi |
| 25959 | { 16141, 8, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0x76b978042821ULL }, // Inst #16141 = VPROLDZ128mbikz |
| 25960 | { 16140, 9, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0x72b978042821ULL }, // Inst #16140 = VPROLDZ128mbik |
| 25961 | { 16139, 7, 1, 0, 546, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x70b978042821ULL }, // Inst #16139 = VPROLDZ128mbi |
| 25962 | { 16138, 4, 1, 0, 1183, 0, 0, X86ImpOpBase + 0, 2231, 0, 0xd1d80e802bULL }, // Inst #16138 = VPPERMrrr_REV |
| 25963 | { 16137, 4, 1, 0, 1183, 0, 0, X86ImpOpBase + 0, 2231, 0, 0xd1d80c8029ULL }, // Inst #16137 = VPPERMrrr |
| 25964 | { 16136, 8, 1, 0, 1184, 0, 0, X86ImpOpBase + 0, 3808, 0|(1ULL<<MCID::MayLoad), 0xd1d80e801bULL }, // Inst #16136 = VPPERMrrm |
| 25965 | { 16135, 8, 1, 0, 1185, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xd1d80c8019ULL }, // Inst #16135 = VPPERMrmr |
| 25966 | { 16134, 3, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xf5b8002829ULL }, // Inst #16134 = VPORrr |
| 25967 | { 16133, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf5b8002819ULL }, // Inst #16133 = VPORrm |
| 25968 | { 16132, 3, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1f5b8002829ULL }, // Inst #16132 = VPORYrr |
| 25969 | { 16131, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f5b8002819ULL }, // Inst #16131 = VPORYrm |
| 25970 | { 16130, 4, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xeef5f8022829ULL }, // Inst #16130 = VPORQZrrkz |
| 25971 | { 16129, 5, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeaf5f8022829ULL }, // Inst #16129 = VPORQZrrk |
| 25972 | { 16128, 3, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f5f8022829ULL }, // Inst #16128 = VPORQZrr |
| 25973 | { 16127, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeef5f8022819ULL }, // Inst #16127 = VPORQZrmkz |
| 25974 | { 16126, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaf5f8022819ULL }, // Inst #16126 = VPORQZrmk |
| 25975 | { 16125, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9ef5f8022819ULL }, // Inst #16125 = VPORQZrmbkz |
| 25976 | { 16124, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9af5f8022819ULL }, // Inst #16124 = VPORQZrmbk |
| 25977 | { 16123, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98f5f8022819ULL }, // Inst #16123 = VPORQZrmb |
| 25978 | { 16122, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f5f8022819ULL }, // Inst #16122 = VPORQZrm |
| 25979 | { 16121, 4, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc7f5f8022829ULL }, // Inst #16121 = VPORQZ256rrkz |
| 25980 | { 16120, 5, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3f5f8022829ULL }, // Inst #16120 = VPORQZ256rrk |
| 25981 | { 16119, 3, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f5f8022829ULL }, // Inst #16119 = VPORQZ256rr |
| 25982 | { 16118, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7f5f8022819ULL }, // Inst #16118 = VPORQZ256rmkz |
| 25983 | { 16117, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3f5f8022819ULL }, // Inst #16117 = VPORQZ256rmk |
| 25984 | { 16116, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97f5f8022819ULL }, // Inst #16116 = VPORQZ256rmbkz |
| 25985 | { 16115, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93f5f8022819ULL }, // Inst #16115 = VPORQZ256rmbk |
| 25986 | { 16114, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91f5f8022819ULL }, // Inst #16114 = VPORQZ256rmb |
| 25987 | { 16113, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f5f8022819ULL }, // Inst #16113 = VPORQZ256rm |
| 25988 | { 16112, 4, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa6f5f8022829ULL }, // Inst #16112 = VPORQZ128rrkz |
| 25989 | { 16111, 5, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2f5f8022829ULL }, // Inst #16111 = VPORQZ128rrk |
| 25990 | { 16110, 3, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f5f8022829ULL }, // Inst #16110 = VPORQZ128rr |
| 25991 | { 16109, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6f5f8022819ULL }, // Inst #16109 = VPORQZ128rmkz |
| 25992 | { 16108, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2f5f8022819ULL }, // Inst #16108 = VPORQZ128rmk |
| 25993 | { 16107, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96f5f8022819ULL }, // Inst #16107 = VPORQZ128rmbkz |
| 25994 | { 16106, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92f5f8022819ULL }, // Inst #16106 = VPORQZ128rmbk |
| 25995 | { 16105, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90f5f8022819ULL }, // Inst #16105 = VPORQZ128rmb |
| 25996 | { 16104, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f5f8022819ULL }, // Inst #16104 = VPORQZ128rm |
| 25997 | { 16103, 4, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xeef5f8002829ULL }, // Inst #16103 = VPORDZrrkz |
| 25998 | { 16102, 5, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeaf5f8002829ULL }, // Inst #16102 = VPORDZrrk |
| 25999 | { 16101, 3, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f5f8002829ULL }, // Inst #16101 = VPORDZrr |
| 26000 | { 16100, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeef5f8002819ULL }, // Inst #16100 = VPORDZrmkz |
| 26001 | { 16099, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaf5f8002819ULL }, // Inst #16099 = VPORDZrmk |
| 26002 | { 16098, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7ef5f8002819ULL }, // Inst #16098 = VPORDZrmbkz |
| 26003 | { 16097, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7af5f8002819ULL }, // Inst #16097 = VPORDZrmbk |
| 26004 | { 16096, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78f5f8002819ULL }, // Inst #16096 = VPORDZrmb |
| 26005 | { 16095, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f5f8002819ULL }, // Inst #16095 = VPORDZrm |
| 26006 | { 16094, 4, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc7f5f8002829ULL }, // Inst #16094 = VPORDZ256rrkz |
| 26007 | { 16093, 5, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3f5f8002829ULL }, // Inst #16093 = VPORDZ256rrk |
| 26008 | { 16092, 3, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f5f8002829ULL }, // Inst #16092 = VPORDZ256rr |
| 26009 | { 16091, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7f5f8002819ULL }, // Inst #16091 = VPORDZ256rmkz |
| 26010 | { 16090, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3f5f8002819ULL }, // Inst #16090 = VPORDZ256rmk |
| 26011 | { 16089, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77f5f8002819ULL }, // Inst #16089 = VPORDZ256rmbkz |
| 26012 | { 16088, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73f5f8002819ULL }, // Inst #16088 = VPORDZ256rmbk |
| 26013 | { 16087, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71f5f8002819ULL }, // Inst #16087 = VPORDZ256rmb |
| 26014 | { 16086, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f5f8002819ULL }, // Inst #16086 = VPORDZ256rm |
| 26015 | { 16085, 4, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa6f5f8002829ULL }, // Inst #16085 = VPORDZ128rrkz |
| 26016 | { 16084, 5, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2f5f8002829ULL }, // Inst #16084 = VPORDZ128rrk |
| 26017 | { 16083, 3, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f5f8002829ULL }, // Inst #16083 = VPORDZ128rr |
| 26018 | { 16082, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6f5f8002819ULL }, // Inst #16082 = VPORDZ128rmkz |
| 26019 | { 16081, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2f5f8002819ULL }, // Inst #16081 = VPORDZ128rmk |
| 26020 | { 16080, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76f5f8002819ULL }, // Inst #16080 = VPORDZ128rmbkz |
| 26021 | { 16079, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72f5f8002819ULL }, // Inst #16079 = VPORDZ128rmbk |
| 26022 | { 16078, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70f5f8002819ULL }, // Inst #16078 = VPORDZ128rmb |
| 26023 | { 16077, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f5f8002819ULL }, // Inst #16077 = VPORDZ128rm |
| 26024 | { 16076, 3, 1, 0, 2132, 0, 0, X86ImpOpBase + 0, 3008, 0, 0xee2a78024829ULL }, // Inst #16076 = VPOPCNTWZrrkz |
| 26025 | { 16075, 4, 1, 0, 2132, 0, 0, X86ImpOpBase + 0, 3004, 0, 0xea2a78024829ULL }, // Inst #16075 = VPOPCNTWZrrk |
| 26026 | { 16074, 2, 1, 0, 456, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe82a78024829ULL }, // Inst #16074 = VPOPCNTWZrr |
| 26027 | { 16073, 7, 1, 0, 1843, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0xee2a78024819ULL }, // Inst #16073 = VPOPCNTWZrmkz |
| 26028 | { 16072, 8, 1, 0, 1843, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad), 0xea2a78024819ULL }, // Inst #16072 = VPOPCNTWZrmk |
| 26029 | { 16071, 6, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82a78024819ULL }, // Inst #16071 = VPOPCNTWZrm |
| 26030 | { 16070, 3, 1, 0, 2131, 0, 0, X86ImpOpBase + 0, 2977, 0, 0xc72a78024829ULL }, // Inst #16070 = VPOPCNTWZ256rrkz |
| 26031 | { 16069, 4, 1, 0, 2131, 0, 0, X86ImpOpBase + 0, 2973, 0, 0xc32a78024829ULL }, // Inst #16069 = VPOPCNTWZ256rrk |
| 26032 | { 16068, 2, 1, 0, 1693, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc12a78024829ULL }, // Inst #16068 = VPOPCNTWZ256rr |
| 26033 | { 16067, 7, 1, 0, 1842, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0xc72a78024819ULL }, // Inst #16067 = VPOPCNTWZ256rmkz |
| 26034 | { 16066, 8, 1, 0, 1842, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0xc32a78024819ULL }, // Inst #16066 = VPOPCNTWZ256rmk |
| 26035 | { 16065, 6, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc12a78024819ULL }, // Inst #16065 = VPOPCNTWZ256rm |
| 26036 | { 16064, 3, 1, 0, 2133, 0, 0, X86ImpOpBase + 0, 2970, 0, 0xa62a78024829ULL }, // Inst #16064 = VPOPCNTWZ128rrkz |
| 26037 | { 16063, 4, 1, 0, 2133, 0, 0, X86ImpOpBase + 0, 2966, 0, 0xa22a78024829ULL }, // Inst #16063 = VPOPCNTWZ128rrk |
| 26038 | { 16062, 2, 1, 0, 1694, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02a78024829ULL }, // Inst #16062 = VPOPCNTWZ128rr |
| 26039 | { 16061, 7, 1, 0, 1841, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0xa62a78024819ULL }, // Inst #16061 = VPOPCNTWZ128rmkz |
| 26040 | { 16060, 8, 1, 0, 1841, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0xa22a78024819ULL }, // Inst #16060 = VPOPCNTWZ128rmk |
| 26041 | { 16059, 6, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa02a78024819ULL }, // Inst #16059 = VPOPCNTWZ128rm |
| 26042 | { 16058, 3, 1, 0, 456, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee2af8024829ULL }, // Inst #16058 = VPOPCNTQZrrkz |
| 26043 | { 16057, 4, 1, 0, 456, 0, 0, X86ImpOpBase + 0, 2740, 0, 0xea2af8024829ULL }, // Inst #16057 = VPOPCNTQZrrk |
| 26044 | { 16056, 2, 1, 0, 456, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe82af8024829ULL }, // Inst #16056 = VPOPCNTQZrr |
| 26045 | { 16055, 7, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xee2af8024819ULL }, // Inst #16055 = VPOPCNTQZrmkz |
| 26046 | { 16054, 8, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xea2af8024819ULL }, // Inst #16054 = VPOPCNTQZrmk |
| 26047 | { 16053, 7, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x9e2af8024819ULL }, // Inst #16053 = VPOPCNTQZrmbkz |
| 26048 | { 16052, 8, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0x9a2af8024819ULL }, // Inst #16052 = VPOPCNTQZrmbk |
| 26049 | { 16051, 6, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x982af8024819ULL }, // Inst #16051 = VPOPCNTQZrmb |
| 26050 | { 16050, 6, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82af8024819ULL }, // Inst #16050 = VPOPCNTQZrm |
| 26051 | { 16049, 3, 1, 0, 1693, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc72af8024829ULL }, // Inst #16049 = VPOPCNTQZ256rrkz |
| 26052 | { 16048, 4, 1, 0, 1693, 0, 0, X86ImpOpBase + 0, 2718, 0, 0xc32af8024829ULL }, // Inst #16048 = VPOPCNTQZ256rrk |
| 26053 | { 16047, 2, 1, 0, 1693, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc12af8024829ULL }, // Inst #16047 = VPOPCNTQZ256rr |
| 26054 | { 16046, 7, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xc72af8024819ULL }, // Inst #16046 = VPOPCNTQZ256rmkz |
| 26055 | { 16045, 8, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xc32af8024819ULL }, // Inst #16045 = VPOPCNTQZ256rmk |
| 26056 | { 16044, 7, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x972af8024819ULL }, // Inst #16044 = VPOPCNTQZ256rmbkz |
| 26057 | { 16043, 8, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x932af8024819ULL }, // Inst #16043 = VPOPCNTQZ256rmbk |
| 26058 | { 16042, 6, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x912af8024819ULL }, // Inst #16042 = VPOPCNTQZ256rmb |
| 26059 | { 16041, 6, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc12af8024819ULL }, // Inst #16041 = VPOPCNTQZ256rm |
| 26060 | { 16040, 3, 1, 0, 1694, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa62af8024829ULL }, // Inst #16040 = VPOPCNTQZ128rrkz |
| 26061 | { 16039, 4, 1, 0, 1694, 0, 0, X86ImpOpBase + 0, 2702, 0, 0xa22af8024829ULL }, // Inst #16039 = VPOPCNTQZ128rrk |
| 26062 | { 16038, 2, 1, 0, 1694, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02af8024829ULL }, // Inst #16038 = VPOPCNTQZ128rr |
| 26063 | { 16037, 7, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0xa62af8024819ULL }, // Inst #16037 = VPOPCNTQZ128rmkz |
| 26064 | { 16036, 8, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0xa22af8024819ULL }, // Inst #16036 = VPOPCNTQZ128rmk |
| 26065 | { 16035, 7, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x962af8024819ULL }, // Inst #16035 = VPOPCNTQZ128rmbkz |
| 26066 | { 16034, 8, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x922af8024819ULL }, // Inst #16034 = VPOPCNTQZ128rmbk |
| 26067 | { 16033, 6, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x902af8024819ULL }, // Inst #16033 = VPOPCNTQZ128rmb |
| 26068 | { 16032, 6, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa02af8024819ULL }, // Inst #16032 = VPOPCNTQZ128rm |
| 26069 | { 16031, 3, 1, 0, 456, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee2af8004829ULL }, // Inst #16031 = VPOPCNTDZrrkz |
| 26070 | { 16030, 4, 1, 0, 456, 0, 0, X86ImpOpBase + 0, 2775, 0, 0xea2af8004829ULL }, // Inst #16030 = VPOPCNTDZrrk |
| 26071 | { 16029, 2, 1, 0, 456, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe82af8004829ULL }, // Inst #16029 = VPOPCNTDZrr |
| 26072 | { 16028, 7, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xee2af8004819ULL }, // Inst #16028 = VPOPCNTDZrmkz |
| 26073 | { 16027, 8, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xea2af8004819ULL }, // Inst #16027 = VPOPCNTDZrmk |
| 26074 | { 16026, 7, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0x7e2af8004819ULL }, // Inst #16026 = VPOPCNTDZrmbkz |
| 26075 | { 16025, 8, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0x7a2af8004819ULL }, // Inst #16025 = VPOPCNTDZrmbk |
| 26076 | { 16024, 6, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x782af8004819ULL }, // Inst #16024 = VPOPCNTDZrmb |
| 26077 | { 16023, 6, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82af8004819ULL }, // Inst #16023 = VPOPCNTDZrm |
| 26078 | { 16022, 3, 1, 0, 1693, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc72af8004829ULL }, // Inst #16022 = VPOPCNTDZ256rrkz |
| 26079 | { 16021, 4, 1, 0, 1693, 0, 0, X86ImpOpBase + 0, 2761, 0, 0xc32af8004829ULL }, // Inst #16021 = VPOPCNTDZ256rrk |
| 26080 | { 16020, 2, 1, 0, 1693, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc12af8004829ULL }, // Inst #16020 = VPOPCNTDZ256rr |
| 26081 | { 16019, 7, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xc72af8004819ULL }, // Inst #16019 = VPOPCNTDZ256rmkz |
| 26082 | { 16018, 8, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0xc32af8004819ULL }, // Inst #16018 = VPOPCNTDZ256rmk |
| 26083 | { 16017, 7, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x772af8004819ULL }, // Inst #16017 = VPOPCNTDZ256rmbkz |
| 26084 | { 16016, 8, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0x732af8004819ULL }, // Inst #16016 = VPOPCNTDZ256rmbk |
| 26085 | { 16015, 6, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x712af8004819ULL }, // Inst #16015 = VPOPCNTDZ256rmb |
| 26086 | { 16014, 6, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc12af8004819ULL }, // Inst #16014 = VPOPCNTDZ256rm |
| 26087 | { 16013, 3, 1, 0, 1694, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa62af8004829ULL }, // Inst #16013 = VPOPCNTDZ128rrkz |
| 26088 | { 16012, 4, 1, 0, 1694, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa22af8004829ULL }, // Inst #16012 = VPOPCNTDZ128rrk |
| 26089 | { 16011, 2, 1, 0, 1694, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02af8004829ULL }, // Inst #16011 = VPOPCNTDZ128rr |
| 26090 | { 16010, 7, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa62af8004819ULL }, // Inst #16010 = VPOPCNTDZ128rmkz |
| 26091 | { 16009, 8, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0xa22af8004819ULL }, // Inst #16009 = VPOPCNTDZ128rmk |
| 26092 | { 16008, 7, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x762af8004819ULL }, // Inst #16008 = VPOPCNTDZ128rmbkz |
| 26093 | { 16007, 8, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x722af8004819ULL }, // Inst #16007 = VPOPCNTDZ128rmbk |
| 26094 | { 16006, 6, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x702af8004819ULL }, // Inst #16006 = VPOPCNTDZ128rmb |
| 26095 | { 16005, 6, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa02af8004819ULL }, // Inst #16005 = VPOPCNTDZ128rm |
| 26096 | { 16004, 3, 1, 0, 2132, 0, 0, X86ImpOpBase + 0, 4809, 0, 0xee2a78004829ULL }, // Inst #16004 = VPOPCNTBZrrkz |
| 26097 | { 16003, 4, 1, 0, 2132, 0, 0, X86ImpOpBase + 0, 4805, 0, 0xea2a78004829ULL }, // Inst #16003 = VPOPCNTBZrrk |
| 26098 | { 16002, 2, 1, 0, 456, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe82a78004829ULL }, // Inst #16002 = VPOPCNTBZrr |
| 26099 | { 16001, 7, 1, 0, 1843, 0, 0, X86ImpOpBase + 0, 4798, 0|(1ULL<<MCID::MayLoad), 0xee2a78004819ULL }, // Inst #16001 = VPOPCNTBZrmkz |
| 26100 | { 16000, 8, 1, 0, 1843, 0, 0, X86ImpOpBase + 0, 4790, 0|(1ULL<<MCID::MayLoad), 0xea2a78004819ULL }, // Inst #16000 = VPOPCNTBZrmk |
| 26101 | { 15999, 6, 1, 0, 1912, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82a78004819ULL }, // Inst #15999 = VPOPCNTBZrm |
| 26102 | { 15998, 3, 1, 0, 2131, 0, 0, X86ImpOpBase + 0, 4780, 0, 0xc72a78004829ULL }, // Inst #15998 = VPOPCNTBZ256rrkz |
| 26103 | { 15997, 4, 1, 0, 2131, 0, 0, X86ImpOpBase + 0, 4776, 0, 0xc32a78004829ULL }, // Inst #15997 = VPOPCNTBZ256rrk |
| 26104 | { 15996, 2, 1, 0, 1693, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc12a78004829ULL }, // Inst #15996 = VPOPCNTBZ256rr |
| 26105 | { 15995, 7, 1, 0, 1842, 0, 0, X86ImpOpBase + 0, 4769, 0|(1ULL<<MCID::MayLoad), 0xc72a78004819ULL }, // Inst #15995 = VPOPCNTBZ256rmkz |
| 26106 | { 15994, 8, 1, 0, 1842, 0, 0, X86ImpOpBase + 0, 4761, 0|(1ULL<<MCID::MayLoad), 0xc32a78004819ULL }, // Inst #15994 = VPOPCNTBZ256rmk |
| 26107 | { 15993, 6, 1, 0, 1911, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc12a78004819ULL }, // Inst #15993 = VPOPCNTBZ256rm |
| 26108 | { 15992, 3, 1, 0, 2133, 0, 0, X86ImpOpBase + 0, 4751, 0, 0xa62a78004829ULL }, // Inst #15992 = VPOPCNTBZ128rrkz |
| 26109 | { 15991, 4, 1, 0, 2133, 0, 0, X86ImpOpBase + 0, 4747, 0, 0xa22a78004829ULL }, // Inst #15991 = VPOPCNTBZ128rrk |
| 26110 | { 15990, 2, 1, 0, 1694, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02a78004829ULL }, // Inst #15990 = VPOPCNTBZ128rr |
| 26111 | { 15989, 7, 1, 0, 1841, 0, 0, X86ImpOpBase + 0, 4740, 0|(1ULL<<MCID::MayLoad), 0xa62a78004819ULL }, // Inst #15989 = VPOPCNTBZ128rmkz |
| 26112 | { 15988, 8, 1, 0, 1841, 0, 0, X86ImpOpBase + 0, 4732, 0|(1ULL<<MCID::MayLoad), 0xa22a78004819ULL }, // Inst #15988 = VPOPCNTBZ128rmk |
| 26113 | { 15987, 6, 1, 0, 1664, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa02a78004819ULL }, // Inst #15987 = VPOPCNTBZ128rm |
| 26114 | { 15986, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xfa38002829ULL }, // Inst #15986 = VPMULUDQrr |
| 26115 | { 15985, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xfa38002819ULL }, // Inst #15985 = VPMULUDQrm |
| 26116 | { 15984, 4, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xeefa78022829ULL }, // Inst #15984 = VPMULUDQZrrkz |
| 26117 | { 15983, 5, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeafa78022829ULL }, // Inst #15983 = VPMULUDQZrrk |
| 26118 | { 15982, 3, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8fa78022829ULL }, // Inst #15982 = VPMULUDQZrr |
| 26119 | { 15981, 8, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeefa78022819ULL }, // Inst #15981 = VPMULUDQZrmkz |
| 26120 | { 15980, 9, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeafa78022819ULL }, // Inst #15980 = VPMULUDQZrmk |
| 26121 | { 15979, 8, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9efa78022819ULL }, // Inst #15979 = VPMULUDQZrmbkz |
| 26122 | { 15978, 9, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9afa78022819ULL }, // Inst #15978 = VPMULUDQZrmbk |
| 26123 | { 15977, 7, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98fa78022819ULL }, // Inst #15977 = VPMULUDQZrmb |
| 26124 | { 15976, 7, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8fa78022819ULL }, // Inst #15976 = VPMULUDQZrm |
| 26125 | { 15975, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc7fa78022829ULL }, // Inst #15975 = VPMULUDQZ256rrkz |
| 26126 | { 15974, 5, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3fa78022829ULL }, // Inst #15974 = VPMULUDQZ256rrk |
| 26127 | { 15973, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1fa78022829ULL }, // Inst #15973 = VPMULUDQZ256rr |
| 26128 | { 15972, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7fa78022819ULL }, // Inst #15972 = VPMULUDQZ256rmkz |
| 26129 | { 15971, 9, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3fa78022819ULL }, // Inst #15971 = VPMULUDQZ256rmk |
| 26130 | { 15970, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97fa78022819ULL }, // Inst #15970 = VPMULUDQZ256rmbkz |
| 26131 | { 15969, 9, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93fa78022819ULL }, // Inst #15969 = VPMULUDQZ256rmbk |
| 26132 | { 15968, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91fa78022819ULL }, // Inst #15968 = VPMULUDQZ256rmb |
| 26133 | { 15967, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1fa78022819ULL }, // Inst #15967 = VPMULUDQZ256rm |
| 26134 | { 15966, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa6fa78022829ULL }, // Inst #15966 = VPMULUDQZ128rrkz |
| 26135 | { 15965, 5, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2fa78022829ULL }, // Inst #15965 = VPMULUDQZ128rrk |
| 26136 | { 15964, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0fa78022829ULL }, // Inst #15964 = VPMULUDQZ128rr |
| 26137 | { 15963, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6fa78022819ULL }, // Inst #15963 = VPMULUDQZ128rmkz |
| 26138 | { 15962, 9, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2fa78022819ULL }, // Inst #15962 = VPMULUDQZ128rmk |
| 26139 | { 15961, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96fa78022819ULL }, // Inst #15961 = VPMULUDQZ128rmbkz |
| 26140 | { 15960, 9, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92fa78022819ULL }, // Inst #15960 = VPMULUDQZ128rmbk |
| 26141 | { 15959, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90fa78022819ULL }, // Inst #15959 = VPMULUDQZ128rmb |
| 26142 | { 15958, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0fa78022819ULL }, // Inst #15958 = VPMULUDQZ128rm |
| 26143 | { 15957, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1fa38002829ULL }, // Inst #15957 = VPMULUDQYrr |
| 26144 | { 15956, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1fa38002819ULL }, // Inst #15956 = VPMULUDQYrm |
| 26145 | { 15955, 4, 1, 0, 2132, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeec1f8024829ULL }, // Inst #15955 = VPMULTISHIFTQBZrrkz |
| 26146 | { 15954, 5, 1, 0, 2132, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeac1f8024829ULL }, // Inst #15954 = VPMULTISHIFTQBZrrk |
| 26147 | { 15953, 3, 1, 0, 456, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8c1f8024829ULL }, // Inst #15953 = VPMULTISHIFTQBZrr |
| 26148 | { 15952, 8, 1, 0, 1852, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeec1f8024819ULL }, // Inst #15952 = VPMULTISHIFTQBZrmkz |
| 26149 | { 15951, 9, 1, 0, 1852, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeac1f8024819ULL }, // Inst #15951 = VPMULTISHIFTQBZrmk |
| 26150 | { 15950, 8, 1, 0, 1852, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0x9ec1f8024819ULL }, // Inst #15950 = VPMULTISHIFTQBZrmbkz |
| 26151 | { 15949, 9, 1, 0, 1852, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0x9ac1f8024819ULL }, // Inst #15949 = VPMULTISHIFTQBZrmbk |
| 26152 | { 15948, 7, 1, 0, 1920, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98c1f8024819ULL }, // Inst #15948 = VPMULTISHIFTQBZrmb |
| 26153 | { 15947, 7, 1, 0, 1920, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8c1f8024819ULL }, // Inst #15947 = VPMULTISHIFTQBZrm |
| 26154 | { 15946, 4, 1, 0, 2131, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc7c1f8024829ULL }, // Inst #15946 = VPMULTISHIFTQBZ256rrkz |
| 26155 | { 15945, 5, 1, 0, 2131, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3c1f8024829ULL }, // Inst #15945 = VPMULTISHIFTQBZ256rrk |
| 26156 | { 15944, 3, 1, 0, 1693, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1c1f8024829ULL }, // Inst #15944 = VPMULTISHIFTQBZ256rr |
| 26157 | { 15943, 8, 1, 0, 1851, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7c1f8024819ULL }, // Inst #15943 = VPMULTISHIFTQBZ256rmkz |
| 26158 | { 15942, 9, 1, 0, 1851, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3c1f8024819ULL }, // Inst #15942 = VPMULTISHIFTQBZ256rmk |
| 26159 | { 15941, 8, 1, 0, 1851, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0x97c1f8024819ULL }, // Inst #15941 = VPMULTISHIFTQBZ256rmbkz |
| 26160 | { 15940, 9, 1, 0, 1851, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0x93c1f8024819ULL }, // Inst #15940 = VPMULTISHIFTQBZ256rmbk |
| 26161 | { 15939, 7, 1, 0, 1919, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91c1f8024819ULL }, // Inst #15939 = VPMULTISHIFTQBZ256rmb |
| 26162 | { 15938, 7, 1, 0, 1919, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1c1f8024819ULL }, // Inst #15938 = VPMULTISHIFTQBZ256rm |
| 26163 | { 15937, 4, 1, 0, 2130, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa6c1f8024829ULL }, // Inst #15937 = VPMULTISHIFTQBZ128rrkz |
| 26164 | { 15936, 5, 1, 0, 2130, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2c1f8024829ULL }, // Inst #15936 = VPMULTISHIFTQBZ128rrk |
| 26165 | { 15935, 3, 1, 0, 1692, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0c1f8024829ULL }, // Inst #15935 = VPMULTISHIFTQBZ128rr |
| 26166 | { 15934, 8, 1, 0, 1845, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6c1f8024819ULL }, // Inst #15934 = VPMULTISHIFTQBZ128rmkz |
| 26167 | { 15933, 9, 1, 0, 1845, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2c1f8024819ULL }, // Inst #15933 = VPMULTISHIFTQBZ128rmk |
| 26168 | { 15932, 8, 1, 0, 1845, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0x96c1f8024819ULL }, // Inst #15932 = VPMULTISHIFTQBZ128rmbkz |
| 26169 | { 15931, 9, 1, 0, 1845, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0x92c1f8024819ULL }, // Inst #15931 = VPMULTISHIFTQBZ128rmbk |
| 26170 | { 15930, 7, 1, 0, 1668, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90c1f8024819ULL }, // Inst #15930 = VPMULTISHIFTQBZ128rmb |
| 26171 | { 15929, 7, 1, 0, 1668, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0c1f8024819ULL }, // Inst #15929 = VPMULTISHIFTQBZ128rm |
| 26172 | { 15928, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xeab8002829ULL }, // Inst #15928 = VPMULLWrr |
| 26173 | { 15927, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xeab8002819ULL }, // Inst #15927 = VPMULLWrm |
| 26174 | { 15926, 4, 1, 0, 2315, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xeeeaf8002829ULL }, // Inst #15926 = VPMULLWZrrkz |
| 26175 | { 15925, 5, 1, 0, 2315, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeaeaf8002829ULL }, // Inst #15925 = VPMULLWZrrk |
| 26176 | { 15924, 3, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8eaf8002829ULL }, // Inst #15924 = VPMULLWZrr |
| 26177 | { 15923, 8, 1, 0, 2314, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeeeaf8002819ULL }, // Inst #15923 = VPMULLWZrmkz |
| 26178 | { 15922, 9, 1, 0, 2314, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeaeaf8002819ULL }, // Inst #15922 = VPMULLWZrmk |
| 26179 | { 15921, 7, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8eaf8002819ULL }, // Inst #15921 = VPMULLWZrm |
| 26180 | { 15920, 4, 1, 0, 2313, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc7eaf8002829ULL }, // Inst #15920 = VPMULLWZ256rrkz |
| 26181 | { 15919, 5, 1, 0, 2313, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc3eaf8002829ULL }, // Inst #15919 = VPMULLWZ256rrk |
| 26182 | { 15918, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1eaf8002829ULL }, // Inst #15918 = VPMULLWZ256rr |
| 26183 | { 15917, 8, 1, 0, 2075, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7eaf8002819ULL }, // Inst #15917 = VPMULLWZ256rmkz |
| 26184 | { 15916, 9, 1, 0, 2075, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3eaf8002819ULL }, // Inst #15916 = VPMULLWZ256rmk |
| 26185 | { 15915, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1eaf8002819ULL }, // Inst #15915 = VPMULLWZ256rm |
| 26186 | { 15914, 4, 1, 0, 2312, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa6eaf8002829ULL }, // Inst #15914 = VPMULLWZ128rrkz |
| 26187 | { 15913, 5, 1, 0, 2312, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa2eaf8002829ULL }, // Inst #15913 = VPMULLWZ128rrk |
| 26188 | { 15912, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0eaf8002829ULL }, // Inst #15912 = VPMULLWZ128rr |
| 26189 | { 15911, 8, 1, 0, 2074, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6eaf8002819ULL }, // Inst #15911 = VPMULLWZ128rmkz |
| 26190 | { 15910, 9, 1, 0, 2074, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2eaf8002819ULL }, // Inst #15910 = VPMULLWZ128rmk |
| 26191 | { 15909, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0eaf8002819ULL }, // Inst #15909 = VPMULLWZ128rm |
| 26192 | { 15908, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1eab8002829ULL }, // Inst #15908 = VPMULLWYrr |
| 26193 | { 15907, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1eab8002819ULL }, // Inst #15907 = VPMULLWYrm |
| 26194 | { 15906, 4, 1, 0, 1379, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xeea078024829ULL }, // Inst #15906 = VPMULLQZrrkz |
| 26195 | { 15905, 5, 1, 0, 1379, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeaa078024829ULL }, // Inst #15905 = VPMULLQZrrk |
| 26196 | { 15904, 3, 1, 0, 1379, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8a078024829ULL }, // Inst #15904 = VPMULLQZrr |
| 26197 | { 15903, 8, 1, 0, 2328, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeea078024819ULL }, // Inst #15903 = VPMULLQZrmkz |
| 26198 | { 15902, 9, 1, 0, 2328, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaa078024819ULL }, // Inst #15902 = VPMULLQZrmk |
| 26199 | { 15901, 8, 1, 0, 1393, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9ea078024819ULL }, // Inst #15901 = VPMULLQZrmbkz |
| 26200 | { 15900, 9, 1, 0, 2328, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aa078024819ULL }, // Inst #15900 = VPMULLQZrmbk |
| 26201 | { 15899, 7, 1, 0, 2328, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98a078024819ULL }, // Inst #15899 = VPMULLQZrmb |
| 26202 | { 15898, 7, 1, 0, 2328, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8a078024819ULL }, // Inst #15898 = VPMULLQZrm |
| 26203 | { 15897, 4, 1, 0, 1378, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc7a078024829ULL }, // Inst #15897 = VPMULLQZ256rrkz |
| 26204 | { 15896, 5, 1, 0, 1378, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3a078024829ULL }, // Inst #15896 = VPMULLQZ256rrk |
| 26205 | { 15895, 3, 1, 0, 1378, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1a078024829ULL }, // Inst #15895 = VPMULLQZ256rr |
| 26206 | { 15894, 8, 1, 0, 2327, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7a078024819ULL }, // Inst #15894 = VPMULLQZ256rmkz |
| 26207 | { 15893, 9, 1, 0, 2327, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3a078024819ULL }, // Inst #15893 = VPMULLQZ256rmk |
| 26208 | { 15892, 8, 1, 0, 1392, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97a078024819ULL }, // Inst #15892 = VPMULLQZ256rmbkz |
| 26209 | { 15891, 9, 1, 0, 2327, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93a078024819ULL }, // Inst #15891 = VPMULLQZ256rmbk |
| 26210 | { 15890, 7, 1, 0, 2327, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91a078024819ULL }, // Inst #15890 = VPMULLQZ256rmb |
| 26211 | { 15889, 7, 1, 0, 2327, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1a078024819ULL }, // Inst #15889 = VPMULLQZ256rm |
| 26212 | { 15888, 4, 1, 0, 1377, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa6a078024829ULL }, // Inst #15888 = VPMULLQZ128rrkz |
| 26213 | { 15887, 5, 1, 0, 1377, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2a078024829ULL }, // Inst #15887 = VPMULLQZ128rrk |
| 26214 | { 15886, 3, 1, 0, 1377, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0a078024829ULL }, // Inst #15886 = VPMULLQZ128rr |
| 26215 | { 15885, 8, 1, 0, 2326, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6a078024819ULL }, // Inst #15885 = VPMULLQZ128rmkz |
| 26216 | { 15884, 9, 1, 0, 2326, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2a078024819ULL }, // Inst #15884 = VPMULLQZ128rmk |
| 26217 | { 15883, 8, 1, 0, 1391, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96a078024819ULL }, // Inst #15883 = VPMULLQZ128rmbkz |
| 26218 | { 15882, 9, 1, 0, 2326, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92a078024819ULL }, // Inst #15882 = VPMULLQZ128rmbk |
| 26219 | { 15881, 7, 1, 0, 2326, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90a078024819ULL }, // Inst #15881 = VPMULLQZ128rmb |
| 26220 | { 15880, 7, 1, 0, 2326, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0a078024819ULL }, // Inst #15880 = VPMULLQZ128rm |
| 26221 | { 15879, 3, 1, 0, 276, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xa038004829ULL }, // Inst #15879 = VPMULLDrr |
| 26222 | { 15878, 7, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xa038004819ULL }, // Inst #15878 = VPMULLDrm |
| 26223 | { 15877, 4, 1, 0, 543, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xeea078004829ULL }, // Inst #15877 = VPMULLDZrrkz |
| 26224 | { 15876, 5, 1, 0, 543, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeaa078004829ULL }, // Inst #15876 = VPMULLDZrrk |
| 26225 | { 15875, 3, 1, 0, 543, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8a078004829ULL }, // Inst #15875 = VPMULLDZrr |
| 26226 | { 15874, 8, 1, 0, 542, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeea078004819ULL }, // Inst #15874 = VPMULLDZrmkz |
| 26227 | { 15873, 9, 1, 0, 542, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaa078004819ULL }, // Inst #15873 = VPMULLDZrmk |
| 26228 | { 15872, 8, 1, 0, 542, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7ea078004819ULL }, // Inst #15872 = VPMULLDZrmbkz |
| 26229 | { 15871, 9, 1, 0, 542, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aa078004819ULL }, // Inst #15871 = VPMULLDZrmbk |
| 26230 | { 15870, 7, 1, 0, 542, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78a078004819ULL }, // Inst #15870 = VPMULLDZrmb |
| 26231 | { 15869, 7, 1, 0, 542, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8a078004819ULL }, // Inst #15869 = VPMULLDZrm |
| 26232 | { 15868, 4, 1, 0, 541, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc7a078004829ULL }, // Inst #15868 = VPMULLDZ256rrkz |
| 26233 | { 15867, 5, 1, 0, 541, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3a078004829ULL }, // Inst #15867 = VPMULLDZ256rrk |
| 26234 | { 15866, 3, 1, 0, 541, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1a078004829ULL }, // Inst #15866 = VPMULLDZ256rr |
| 26235 | { 15865, 8, 1, 0, 540, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7a078004819ULL }, // Inst #15865 = VPMULLDZ256rmkz |
| 26236 | { 15864, 9, 1, 0, 540, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3a078004819ULL }, // Inst #15864 = VPMULLDZ256rmk |
| 26237 | { 15863, 8, 1, 0, 540, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77a078004819ULL }, // Inst #15863 = VPMULLDZ256rmbkz |
| 26238 | { 15862, 9, 1, 0, 540, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73a078004819ULL }, // Inst #15862 = VPMULLDZ256rmbk |
| 26239 | { 15861, 7, 1, 0, 540, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71a078004819ULL }, // Inst #15861 = VPMULLDZ256rmb |
| 26240 | { 15860, 7, 1, 0, 540, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1a078004819ULL }, // Inst #15860 = VPMULLDZ256rm |
| 26241 | { 15859, 4, 1, 0, 276, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa6a078004829ULL }, // Inst #15859 = VPMULLDZ128rrkz |
| 26242 | { 15858, 5, 1, 0, 276, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2a078004829ULL }, // Inst #15858 = VPMULLDZ128rrk |
| 26243 | { 15857, 3, 1, 0, 276, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0a078004829ULL }, // Inst #15857 = VPMULLDZ128rr |
| 26244 | { 15856, 8, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6a078004819ULL }, // Inst #15856 = VPMULLDZ128rmkz |
| 26245 | { 15855, 9, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2a078004819ULL }, // Inst #15855 = VPMULLDZ128rmk |
| 26246 | { 15854, 8, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76a078004819ULL }, // Inst #15854 = VPMULLDZ128rmbkz |
| 26247 | { 15853, 9, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72a078004819ULL }, // Inst #15853 = VPMULLDZ128rmbk |
| 26248 | { 15852, 7, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70a078004819ULL }, // Inst #15852 = VPMULLDZ128rmb |
| 26249 | { 15851, 7, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0a078004819ULL }, // Inst #15851 = VPMULLDZ128rm |
| 26250 | { 15850, 3, 1, 0, 541, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1a038004829ULL }, // Inst #15850 = VPMULLDYrr |
| 26251 | { 15849, 7, 1, 0, 540, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1a038004819ULL }, // Inst #15849 = VPMULLDYrm |
| 26252 | { 15848, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xf2b8002829ULL }, // Inst #15848 = VPMULHWrr |
| 26253 | { 15847, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf2b8002819ULL }, // Inst #15847 = VPMULHWrm |
| 26254 | { 15846, 4, 1, 0, 2315, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xeef2f8002829ULL }, // Inst #15846 = VPMULHWZrrkz |
| 26255 | { 15845, 5, 1, 0, 2315, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeaf2f8002829ULL }, // Inst #15845 = VPMULHWZrrk |
| 26256 | { 15844, 3, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f2f8002829ULL }, // Inst #15844 = VPMULHWZrr |
| 26257 | { 15843, 8, 1, 0, 2314, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeef2f8002819ULL }, // Inst #15843 = VPMULHWZrmkz |
| 26258 | { 15842, 9, 1, 0, 2314, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeaf2f8002819ULL }, // Inst #15842 = VPMULHWZrmk |
| 26259 | { 15841, 7, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f2f8002819ULL }, // Inst #15841 = VPMULHWZrm |
| 26260 | { 15840, 4, 1, 0, 2313, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc7f2f8002829ULL }, // Inst #15840 = VPMULHWZ256rrkz |
| 26261 | { 15839, 5, 1, 0, 2313, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc3f2f8002829ULL }, // Inst #15839 = VPMULHWZ256rrk |
| 26262 | { 15838, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f2f8002829ULL }, // Inst #15838 = VPMULHWZ256rr |
| 26263 | { 15837, 8, 1, 0, 2075, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7f2f8002819ULL }, // Inst #15837 = VPMULHWZ256rmkz |
| 26264 | { 15836, 9, 1, 0, 2075, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3f2f8002819ULL }, // Inst #15836 = VPMULHWZ256rmk |
| 26265 | { 15835, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f2f8002819ULL }, // Inst #15835 = VPMULHWZ256rm |
| 26266 | { 15834, 4, 1, 0, 2312, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa6f2f8002829ULL }, // Inst #15834 = VPMULHWZ128rrkz |
| 26267 | { 15833, 5, 1, 0, 2312, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa2f2f8002829ULL }, // Inst #15833 = VPMULHWZ128rrk |
| 26268 | { 15832, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f2f8002829ULL }, // Inst #15832 = VPMULHWZ128rr |
| 26269 | { 15831, 8, 1, 0, 2074, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6f2f8002819ULL }, // Inst #15831 = VPMULHWZ128rmkz |
| 26270 | { 15830, 9, 1, 0, 2074, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2f2f8002819ULL }, // Inst #15830 = VPMULHWZ128rmk |
| 26271 | { 15829, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f2f8002819ULL }, // Inst #15829 = VPMULHWZ128rm |
| 26272 | { 15828, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1f2b8002829ULL }, // Inst #15828 = VPMULHWYrr |
| 26273 | { 15827, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f2b8002819ULL }, // Inst #15827 = VPMULHWYrm |
| 26274 | { 15826, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xf238002829ULL }, // Inst #15826 = VPMULHUWrr |
| 26275 | { 15825, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf238002819ULL }, // Inst #15825 = VPMULHUWrm |
| 26276 | { 15824, 4, 1, 0, 2315, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xeef278002829ULL }, // Inst #15824 = VPMULHUWZrrkz |
| 26277 | { 15823, 5, 1, 0, 2315, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeaf278002829ULL }, // Inst #15823 = VPMULHUWZrrk |
| 26278 | { 15822, 3, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f278002829ULL }, // Inst #15822 = VPMULHUWZrr |
| 26279 | { 15821, 8, 1, 0, 2314, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeef278002819ULL }, // Inst #15821 = VPMULHUWZrmkz |
| 26280 | { 15820, 9, 1, 0, 2314, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeaf278002819ULL }, // Inst #15820 = VPMULHUWZrmk |
| 26281 | { 15819, 7, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f278002819ULL }, // Inst #15819 = VPMULHUWZrm |
| 26282 | { 15818, 4, 1, 0, 2313, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc7f278002829ULL }, // Inst #15818 = VPMULHUWZ256rrkz |
| 26283 | { 15817, 5, 1, 0, 2313, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc3f278002829ULL }, // Inst #15817 = VPMULHUWZ256rrk |
| 26284 | { 15816, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f278002829ULL }, // Inst #15816 = VPMULHUWZ256rr |
| 26285 | { 15815, 8, 1, 0, 2075, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7f278002819ULL }, // Inst #15815 = VPMULHUWZ256rmkz |
| 26286 | { 15814, 9, 1, 0, 2075, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3f278002819ULL }, // Inst #15814 = VPMULHUWZ256rmk |
| 26287 | { 15813, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f278002819ULL }, // Inst #15813 = VPMULHUWZ256rm |
| 26288 | { 15812, 4, 1, 0, 2312, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa6f278002829ULL }, // Inst #15812 = VPMULHUWZ128rrkz |
| 26289 | { 15811, 5, 1, 0, 2312, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa2f278002829ULL }, // Inst #15811 = VPMULHUWZ128rrk |
| 26290 | { 15810, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f278002829ULL }, // Inst #15810 = VPMULHUWZ128rr |
| 26291 | { 15809, 8, 1, 0, 2074, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6f278002819ULL }, // Inst #15809 = VPMULHUWZ128rmkz |
| 26292 | { 15808, 9, 1, 0, 2074, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2f278002819ULL }, // Inst #15808 = VPMULHUWZ128rmk |
| 26293 | { 15807, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f278002819ULL }, // Inst #15807 = VPMULHUWZ128rm |
| 26294 | { 15806, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1f238002829ULL }, // Inst #15806 = VPMULHUWYrr |
| 26295 | { 15805, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f238002819ULL }, // Inst #15805 = VPMULHUWYrm |
| 26296 | { 15804, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x85b8004829ULL }, // Inst #15804 = VPMULHRSWrr |
| 26297 | { 15803, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x85b8004819ULL }, // Inst #15803 = VPMULHRSWrm |
| 26298 | { 15802, 4, 1, 0, 2315, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xee85f8004829ULL }, // Inst #15802 = VPMULHRSWZrrkz |
| 26299 | { 15801, 5, 1, 0, 2315, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xea85f8004829ULL }, // Inst #15801 = VPMULHRSWZrrk |
| 26300 | { 15800, 3, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe885f8004829ULL }, // Inst #15800 = VPMULHRSWZrr |
| 26301 | { 15799, 8, 1, 0, 2314, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xee85f8004819ULL }, // Inst #15799 = VPMULHRSWZrmkz |
| 26302 | { 15798, 9, 1, 0, 2314, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xea85f8004819ULL }, // Inst #15798 = VPMULHRSWZrmk |
| 26303 | { 15797, 7, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe885f8004819ULL }, // Inst #15797 = VPMULHRSWZrm |
| 26304 | { 15796, 4, 1, 0, 2313, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc785f8004829ULL }, // Inst #15796 = VPMULHRSWZ256rrkz |
| 26305 | { 15795, 5, 1, 0, 2313, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc385f8004829ULL }, // Inst #15795 = VPMULHRSWZ256rrk |
| 26306 | { 15794, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc185f8004829ULL }, // Inst #15794 = VPMULHRSWZ256rr |
| 26307 | { 15793, 8, 1, 0, 2075, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc785f8004819ULL }, // Inst #15793 = VPMULHRSWZ256rmkz |
| 26308 | { 15792, 9, 1, 0, 2075, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc385f8004819ULL }, // Inst #15792 = VPMULHRSWZ256rmk |
| 26309 | { 15791, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc185f8004819ULL }, // Inst #15791 = VPMULHRSWZ256rm |
| 26310 | { 15790, 4, 1, 0, 2312, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa685f8004829ULL }, // Inst #15790 = VPMULHRSWZ128rrkz |
| 26311 | { 15789, 5, 1, 0, 2312, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa285f8004829ULL }, // Inst #15789 = VPMULHRSWZ128rrk |
| 26312 | { 15788, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa085f8004829ULL }, // Inst #15788 = VPMULHRSWZ128rr |
| 26313 | { 15787, 8, 1, 0, 2074, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa685f8004819ULL }, // Inst #15787 = VPMULHRSWZ128rmkz |
| 26314 | { 15786, 9, 1, 0, 2074, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa285f8004819ULL }, // Inst #15786 = VPMULHRSWZ128rmk |
| 26315 | { 15785, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa085f8004819ULL }, // Inst #15785 = VPMULHRSWZ128rm |
| 26316 | { 15784, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x185b8004829ULL }, // Inst #15784 = VPMULHRSWYrr |
| 26317 | { 15783, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x185b8004819ULL }, // Inst #15783 = VPMULHRSWYrm |
| 26318 | { 15782, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x9438004829ULL }, // Inst #15782 = VPMULDQrr |
| 26319 | { 15781, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9438004819ULL }, // Inst #15781 = VPMULDQrm |
| 26320 | { 15780, 4, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xee9478024829ULL }, // Inst #15780 = VPMULDQZrrkz |
| 26321 | { 15779, 5, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xea9478024829ULL }, // Inst #15779 = VPMULDQZrrk |
| 26322 | { 15778, 3, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89478024829ULL }, // Inst #15778 = VPMULDQZrr |
| 26323 | { 15777, 8, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee9478024819ULL }, // Inst #15777 = VPMULDQZrmkz |
| 26324 | { 15776, 9, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea9478024819ULL }, // Inst #15776 = VPMULDQZrmk |
| 26325 | { 15775, 8, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e9478024819ULL }, // Inst #15775 = VPMULDQZrmbkz |
| 26326 | { 15774, 9, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a9478024819ULL }, // Inst #15774 = VPMULDQZrmbk |
| 26327 | { 15773, 7, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x989478024819ULL }, // Inst #15773 = VPMULDQZrmb |
| 26328 | { 15772, 7, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89478024819ULL }, // Inst #15772 = VPMULDQZrm |
| 26329 | { 15771, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc79478024829ULL }, // Inst #15771 = VPMULDQZ256rrkz |
| 26330 | { 15770, 5, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc39478024829ULL }, // Inst #15770 = VPMULDQZ256rrk |
| 26331 | { 15769, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19478024829ULL }, // Inst #15769 = VPMULDQZ256rr |
| 26332 | { 15768, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc79478024819ULL }, // Inst #15768 = VPMULDQZ256rmkz |
| 26333 | { 15767, 9, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc39478024819ULL }, // Inst #15767 = VPMULDQZ256rmk |
| 26334 | { 15766, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x979478024819ULL }, // Inst #15766 = VPMULDQZ256rmbkz |
| 26335 | { 15765, 9, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x939478024819ULL }, // Inst #15765 = VPMULDQZ256rmbk |
| 26336 | { 15764, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x919478024819ULL }, // Inst #15764 = VPMULDQZ256rmb |
| 26337 | { 15763, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19478024819ULL }, // Inst #15763 = VPMULDQZ256rm |
| 26338 | { 15762, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa69478024829ULL }, // Inst #15762 = VPMULDQZ128rrkz |
| 26339 | { 15761, 5, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa29478024829ULL }, // Inst #15761 = VPMULDQZ128rrk |
| 26340 | { 15760, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09478024829ULL }, // Inst #15760 = VPMULDQZ128rr |
| 26341 | { 15759, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa69478024819ULL }, // Inst #15759 = VPMULDQZ128rmkz |
| 26342 | { 15758, 9, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa29478024819ULL }, // Inst #15758 = VPMULDQZ128rmk |
| 26343 | { 15757, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x969478024819ULL }, // Inst #15757 = VPMULDQZ128rmbkz |
| 26344 | { 15756, 9, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x929478024819ULL }, // Inst #15756 = VPMULDQZ128rmbk |
| 26345 | { 15755, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x909478024819ULL }, // Inst #15755 = VPMULDQZ128rmb |
| 26346 | { 15754, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09478024819ULL }, // Inst #15754 = VPMULDQZ128rm |
| 26347 | { 15753, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x19438004829ULL }, // Inst #15753 = VPMULDQYrr |
| 26348 | { 15752, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19438004819ULL }, // Inst #15752 = VPMULDQYrm |
| 26349 | { 15751, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1a38004829ULL }, // Inst #15751 = VPMOVZXWQrr |
| 26350 | { 15750, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1a38004819ULL }, // Inst #15750 = VPMOVZXWQrm |
| 26351 | { 15749, 3, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2356, 0, 0xae1a78004829ULL }, // Inst #15749 = VPMOVZXWQZrrkz |
| 26352 | { 15748, 4, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2352, 0, 0xaa1a78004829ULL }, // Inst #15748 = VPMOVZXWQZrrk |
| 26353 | { 15747, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xa81a78004829ULL }, // Inst #15747 = VPMOVZXWQZrr |
| 26354 | { 15746, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xae1a78004819ULL }, // Inst #15746 = VPMOVZXWQZrmkz |
| 26355 | { 15745, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xaa1a78004819ULL }, // Inst #15745 = VPMOVZXWQZrmk |
| 26356 | { 15744, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xa81a78004819ULL }, // Inst #15744 = VPMOVZXWQZrm |
| 26357 | { 15743, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2349, 0, 0x871a78004829ULL }, // Inst #15743 = VPMOVZXWQZ256rrkz |
| 26358 | { 15742, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2345, 0, 0x831a78004829ULL }, // Inst #15742 = VPMOVZXWQZ256rrk |
| 26359 | { 15741, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0x811a78004829ULL }, // Inst #15741 = VPMOVZXWQZ256rr |
| 26360 | { 15740, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x871a78004819ULL }, // Inst #15740 = VPMOVZXWQZ256rmkz |
| 26361 | { 15739, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x831a78004819ULL }, // Inst #15739 = VPMOVZXWQZ256rmk |
| 26362 | { 15738, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x811a78004819ULL }, // Inst #15738 = VPMOVZXWQZ256rm |
| 26363 | { 15737, 3, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x661a78004829ULL }, // Inst #15737 = VPMOVZXWQZ128rrkz |
| 26364 | { 15736, 4, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x621a78004829ULL }, // Inst #15736 = VPMOVZXWQZ128rrk |
| 26365 | { 15735, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x601a78004829ULL }, // Inst #15735 = VPMOVZXWQZ128rr |
| 26366 | { 15734, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x661a78004819ULL }, // Inst #15734 = VPMOVZXWQZ128rmkz |
| 26367 | { 15733, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x621a78004819ULL }, // Inst #15733 = VPMOVZXWQZ128rmk |
| 26368 | { 15732, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x601a78004819ULL }, // Inst #15732 = VPMOVZXWQZ128rm |
| 26369 | { 15731, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x11a38004829ULL }, // Inst #15731 = VPMOVZXWQYrr |
| 26370 | { 15730, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x11a38004819ULL }, // Inst #15730 = VPMOVZXWQYrm |
| 26371 | { 15729, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x19b8004829ULL }, // Inst #15729 = VPMOVZXWDrr |
| 26372 | { 15728, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x19b8004819ULL }, // Inst #15728 = VPMOVZXWDrm |
| 26373 | { 15727, 3, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2951, 0, 0xce19f8004829ULL }, // Inst #15727 = VPMOVZXWDZrrkz |
| 26374 | { 15726, 4, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2947, 0, 0xca19f8004829ULL }, // Inst #15726 = VPMOVZXWDZrrk |
| 26375 | { 15725, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2797, 0, 0xc819f8004829ULL }, // Inst #15725 = VPMOVZXWDZrr |
| 26376 | { 15724, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xce19f8004819ULL }, // Inst #15724 = VPMOVZXWDZrmkz |
| 26377 | { 15723, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xca19f8004819ULL }, // Inst #15723 = VPMOVZXWDZrmk |
| 26378 | { 15722, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc819f8004819ULL }, // Inst #15722 = VPMOVZXWDZrm |
| 26379 | { 15721, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2256, 0, 0xa719f8004829ULL }, // Inst #15721 = VPMOVZXWDZ256rrkz |
| 26380 | { 15720, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2252, 0, 0xa319f8004829ULL }, // Inst #15720 = VPMOVZXWDZ256rrk |
| 26381 | { 15719, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xa119f8004829ULL }, // Inst #15719 = VPMOVZXWDZ256rr |
| 26382 | { 15718, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xa719f8004819ULL }, // Inst #15718 = VPMOVZXWDZ256rmkz |
| 26383 | { 15717, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0xa319f8004819ULL }, // Inst #15717 = VPMOVZXWDZ256rmk |
| 26384 | { 15716, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa119f8004819ULL }, // Inst #15716 = VPMOVZXWDZ256rm |
| 26385 | { 15715, 3, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2340, 0, 0x8619f8004829ULL }, // Inst #15715 = VPMOVZXWDZ128rrkz |
| 26386 | { 15714, 4, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2336, 0, 0x8219f8004829ULL }, // Inst #15714 = VPMOVZXWDZ128rrk |
| 26387 | { 15713, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x8019f8004829ULL }, // Inst #15713 = VPMOVZXWDZ128rr |
| 26388 | { 15712, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x8619f8004819ULL }, // Inst #15712 = VPMOVZXWDZ128rmkz |
| 26389 | { 15711, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x8219f8004819ULL }, // Inst #15711 = VPMOVZXWDZ128rmk |
| 26390 | { 15710, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x8019f8004819ULL }, // Inst #15710 = VPMOVZXWDZ128rm |
| 26391 | { 15709, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x119b8004829ULL }, // Inst #15709 = VPMOVZXWDYrr |
| 26392 | { 15708, 6, 1, 0, 869, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x119b8004819ULL }, // Inst #15708 = VPMOVZXWDYrm |
| 26393 | { 15707, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1ab8004829ULL }, // Inst #15707 = VPMOVZXDQrr |
| 26394 | { 15706, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1ab8004819ULL }, // Inst #15706 = VPMOVZXDQrm |
| 26395 | { 15705, 3, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2803, 0, 0xce1af8004829ULL }, // Inst #15705 = VPMOVZXDQZrrkz |
| 26396 | { 15704, 4, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2799, 0, 0xca1af8004829ULL }, // Inst #15704 = VPMOVZXDQZrrk |
| 26397 | { 15703, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2797, 0, 0xc81af8004829ULL }, // Inst #15703 = VPMOVZXDQZrr |
| 26398 | { 15702, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xce1af8004819ULL }, // Inst #15702 = VPMOVZXDQZrmkz |
| 26399 | { 15701, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xca1af8004819ULL }, // Inst #15701 = VPMOVZXDQZrmk |
| 26400 | { 15700, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc81af8004819ULL }, // Inst #15700 = VPMOVZXDQZrm |
| 26401 | { 15699, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2349, 0, 0xa71af8004829ULL }, // Inst #15699 = VPMOVZXDQZ256rrkz |
| 26402 | { 15698, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2345, 0, 0xa31af8004829ULL }, // Inst #15698 = VPMOVZXDQZ256rrk |
| 26403 | { 15697, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xa11af8004829ULL }, // Inst #15697 = VPMOVZXDQZ256rr |
| 26404 | { 15696, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xa71af8004819ULL }, // Inst #15696 = VPMOVZXDQZ256rmkz |
| 26405 | { 15695, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xa31af8004819ULL }, // Inst #15695 = VPMOVZXDQZ256rmk |
| 26406 | { 15694, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa11af8004819ULL }, // Inst #15694 = VPMOVZXDQZ256rm |
| 26407 | { 15693, 3, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x861af8004829ULL }, // Inst #15693 = VPMOVZXDQZ128rrkz |
| 26408 | { 15692, 4, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x821af8004829ULL }, // Inst #15692 = VPMOVZXDQZ128rrk |
| 26409 | { 15691, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x801af8004829ULL }, // Inst #15691 = VPMOVZXDQZ128rr |
| 26410 | { 15690, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x861af8004819ULL }, // Inst #15690 = VPMOVZXDQZ128rmkz |
| 26411 | { 15689, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x821af8004819ULL }, // Inst #15689 = VPMOVZXDQZ128rmk |
| 26412 | { 15688, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x801af8004819ULL }, // Inst #15688 = VPMOVZXDQZ128rm |
| 26413 | { 15687, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x11ab8004829ULL }, // Inst #15687 = VPMOVZXDQYrr |
| 26414 | { 15686, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x11ab8004819ULL }, // Inst #15686 = VPMOVZXDQYrm |
| 26415 | { 15685, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1838004829ULL }, // Inst #15685 = VPMOVZXBWrr |
| 26416 | { 15684, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1838004819ULL }, // Inst #15684 = VPMOVZXBWrm |
| 26417 | { 15683, 3, 1, 0, 2129, 0, 0, X86ImpOpBase + 0, 5518, 0, 0xce1878004829ULL }, // Inst #15683 = VPMOVZXBWZrrkz |
| 26418 | { 15682, 4, 1, 0, 2129, 0, 0, X86ImpOpBase + 0, 5514, 0, 0xca1878004829ULL }, // Inst #15682 = VPMOVZXBWZrrk |
| 26419 | { 15681, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2797, 0, 0xc81878004829ULL }, // Inst #15681 = VPMOVZXBWZrr |
| 26420 | { 15680, 7, 1, 0, 1840, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0xce1878004819ULL }, // Inst #15680 = VPMOVZXBWZrmkz |
| 26421 | { 15679, 8, 1, 0, 1840, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad), 0xca1878004819ULL }, // Inst #15679 = VPMOVZXBWZrmk |
| 26422 | { 15678, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc81878004819ULL }, // Inst #15678 = VPMOVZXBWZrm |
| 26423 | { 15677, 3, 1, 0, 2128, 0, 0, X86ImpOpBase + 0, 5015, 0, 0xa71878004829ULL }, // Inst #15677 = VPMOVZXBWZ256rrkz |
| 26424 | { 15676, 4, 1, 0, 2128, 0, 0, X86ImpOpBase + 0, 5011, 0, 0xa31878004829ULL }, // Inst #15676 = VPMOVZXBWZ256rrk |
| 26425 | { 15675, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xa11878004829ULL }, // Inst #15675 = VPMOVZXBWZ256rr |
| 26426 | { 15674, 7, 1, 0, 1840, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0xa71878004819ULL }, // Inst #15674 = VPMOVZXBWZ256rmkz |
| 26427 | { 15673, 8, 1, 0, 1840, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0xa31878004819ULL }, // Inst #15673 = VPMOVZXBWZ256rmk |
| 26428 | { 15672, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa11878004819ULL }, // Inst #15672 = VPMOVZXBWZ256rm |
| 26429 | { 15671, 3, 1, 0, 1658, 0, 0, X86ImpOpBase + 0, 2970, 0, 0x861878004829ULL }, // Inst #15671 = VPMOVZXBWZ128rrkz |
| 26430 | { 15670, 4, 1, 0, 1658, 0, 0, X86ImpOpBase + 0, 2966, 0, 0x821878004829ULL }, // Inst #15670 = VPMOVZXBWZ128rrk |
| 26431 | { 15669, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x801878004829ULL }, // Inst #15669 = VPMOVZXBWZ128rr |
| 26432 | { 15668, 7, 1, 0, 1894, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0x861878004819ULL }, // Inst #15668 = VPMOVZXBWZ128rmkz |
| 26433 | { 15667, 8, 1, 0, 1894, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0x821878004819ULL }, // Inst #15667 = VPMOVZXBWZ128rmk |
| 26434 | { 15666, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x801878004819ULL }, // Inst #15666 = VPMOVZXBWZ128rm |
| 26435 | { 15665, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x11838004829ULL }, // Inst #15665 = VPMOVZXBWYrr |
| 26436 | { 15664, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x11838004819ULL }, // Inst #15664 = VPMOVZXBWYrm |
| 26437 | { 15663, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1938004829ULL }, // Inst #15663 = VPMOVZXBQrr |
| 26438 | { 15662, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1938004819ULL }, // Inst #15662 = VPMOVZXBQrm |
| 26439 | { 15661, 3, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2356, 0, 0x8e1978004829ULL }, // Inst #15661 = VPMOVZXBQZrrkz |
| 26440 | { 15660, 4, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2352, 0, 0x8a1978004829ULL }, // Inst #15660 = VPMOVZXBQZrrk |
| 26441 | { 15659, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2280, 0, 0x881978004829ULL }, // Inst #15659 = VPMOVZXBQZrr |
| 26442 | { 15658, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x8e1978004819ULL }, // Inst #15658 = VPMOVZXBQZrmkz |
| 26443 | { 15657, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0x8a1978004819ULL }, // Inst #15657 = VPMOVZXBQZrmk |
| 26444 | { 15656, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x881978004819ULL }, // Inst #15656 = VPMOVZXBQZrm |
| 26445 | { 15655, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2349, 0, 0x671978004829ULL }, // Inst #15655 = VPMOVZXBQZ256rrkz |
| 26446 | { 15654, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2345, 0, 0x631978004829ULL }, // Inst #15654 = VPMOVZXBQZ256rrk |
| 26447 | { 15653, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0x611978004829ULL }, // Inst #15653 = VPMOVZXBQZ256rr |
| 26448 | { 15652, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x671978004819ULL }, // Inst #15652 = VPMOVZXBQZ256rmkz |
| 26449 | { 15651, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x631978004819ULL }, // Inst #15651 = VPMOVZXBQZ256rmk |
| 26450 | { 15650, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x611978004819ULL }, // Inst #15650 = VPMOVZXBQZ256rm |
| 26451 | { 15649, 3, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x461978004829ULL }, // Inst #15649 = VPMOVZXBQZ128rrkz |
| 26452 | { 15648, 4, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x421978004829ULL }, // Inst #15648 = VPMOVZXBQZ128rrk |
| 26453 | { 15647, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x401978004829ULL }, // Inst #15647 = VPMOVZXBQZ128rr |
| 26454 | { 15646, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x461978004819ULL }, // Inst #15646 = VPMOVZXBQZ128rmkz |
| 26455 | { 15645, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x421978004819ULL }, // Inst #15645 = VPMOVZXBQZ128rmk |
| 26456 | { 15644, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x401978004819ULL }, // Inst #15644 = VPMOVZXBQZ128rm |
| 26457 | { 15643, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x11938004829ULL }, // Inst #15643 = VPMOVZXBQYrr |
| 26458 | { 15642, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x11938004819ULL }, // Inst #15642 = VPMOVZXBQYrm |
| 26459 | { 15641, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x18b8004829ULL }, // Inst #15641 = VPMOVZXBDrr |
| 26460 | { 15640, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x18b8004819ULL }, // Inst #15640 = VPMOVZXBDrm |
| 26461 | { 15639, 3, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2286, 0, 0xae18f8004829ULL }, // Inst #15639 = VPMOVZXBDZrrkz |
| 26462 | { 15638, 4, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2282, 0, 0xaa18f8004829ULL }, // Inst #15638 = VPMOVZXBDZrrk |
| 26463 | { 15637, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xa818f8004829ULL }, // Inst #15637 = VPMOVZXBDZrr |
| 26464 | { 15636, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xae18f8004819ULL }, // Inst #15636 = VPMOVZXBDZrmkz |
| 26465 | { 15635, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xaa18f8004819ULL }, // Inst #15635 = VPMOVZXBDZrmk |
| 26466 | { 15634, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xa818f8004819ULL }, // Inst #15634 = VPMOVZXBDZrm |
| 26467 | { 15633, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2256, 0, 0x8718f8004829ULL }, // Inst #15633 = VPMOVZXBDZ256rrkz |
| 26468 | { 15632, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2252, 0, 0x8318f8004829ULL }, // Inst #15632 = VPMOVZXBDZ256rrk |
| 26469 | { 15631, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0x8118f8004829ULL }, // Inst #15631 = VPMOVZXBDZ256rr |
| 26470 | { 15630, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x8718f8004819ULL }, // Inst #15630 = VPMOVZXBDZ256rmkz |
| 26471 | { 15629, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0x8318f8004819ULL }, // Inst #15629 = VPMOVZXBDZ256rmk |
| 26472 | { 15628, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x8118f8004819ULL }, // Inst #15628 = VPMOVZXBDZ256rm |
| 26473 | { 15627, 3, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2340, 0, 0x6618f8004829ULL }, // Inst #15627 = VPMOVZXBDZ128rrkz |
| 26474 | { 15626, 4, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2336, 0, 0x6218f8004829ULL }, // Inst #15626 = VPMOVZXBDZ128rrk |
| 26475 | { 15625, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x6018f8004829ULL }, // Inst #15625 = VPMOVZXBDZ128rr |
| 26476 | { 15624, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x6618f8004819ULL }, // Inst #15624 = VPMOVZXBDZ128rmkz |
| 26477 | { 15623, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x6218f8004819ULL }, // Inst #15623 = VPMOVZXBDZ128rmk |
| 26478 | { 15622, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x6018f8004819ULL }, // Inst #15622 = VPMOVZXBDZ128rm |
| 26479 | { 15621, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x118b8004829ULL }, // Inst #15621 = VPMOVZXBDYrr |
| 26480 | { 15620, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x118b8004819ULL }, // Inst #15620 = VPMOVZXBDYrm |
| 26481 | { 15619, 3, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 5511, 0, 0xce1878005028ULL }, // Inst #15619 = VPMOVWBZrrkz |
| 26482 | { 15618, 4, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 5507, 0, 0xca1878005028ULL }, // Inst #15618 = VPMOVWBZrrk |
| 26483 | { 15617, 2, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2845, 0, 0xc81878005028ULL }, // Inst #15617 = VPMOVWBZrr |
| 26484 | { 15616, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 4718, 0|(1ULL<<MCID::MayStore), 0xca1878005018ULL }, // Inst #15616 = VPMOVWBZmrk |
| 26485 | { 15615, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xc81878005018ULL }, // Inst #15615 = VPMOVWBZmr |
| 26486 | { 15614, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 5504, 0, 0xa71878005028ULL }, // Inst #15614 = VPMOVWBZ256rrkz |
| 26487 | { 15613, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 5500, 0, 0xa31878005028ULL }, // Inst #15613 = VPMOVWBZ256rrk |
| 26488 | { 15612, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0xa11878005028ULL }, // Inst #15612 = VPMOVWBZ256rr |
| 26489 | { 15611, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 4711, 0|(1ULL<<MCID::MayStore), 0xa31878005018ULL }, // Inst #15611 = VPMOVWBZ256mrk |
| 26490 | { 15610, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xa11878005018ULL }, // Inst #15610 = VPMOVWBZ256mr |
| 26491 | { 15609, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2970, 0, 0x861878005028ULL }, // Inst #15609 = VPMOVWBZ128rrkz |
| 26492 | { 15608, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2966, 0, 0x821878005028ULL }, // Inst #15608 = VPMOVWBZ128rrk |
| 26493 | { 15607, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x801878005028ULL }, // Inst #15607 = VPMOVWBZ128rr |
| 26494 | { 15606, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 4704, 0|(1ULL<<MCID::MayStore), 0x821878005018ULL }, // Inst #15606 = VPMOVWBZ128mrk |
| 26495 | { 15605, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x801878005018ULL }, // Inst #15605 = VPMOVWBZ128mr |
| 26496 | { 15604, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5525, 0, 0xe814f8025029ULL }, // Inst #15604 = VPMOVW2MZrr |
| 26497 | { 15603, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5523, 0, 0xc114f8025029ULL }, // Inst #15603 = VPMOVW2MZ256rr |
| 26498 | { 15602, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5521, 0, 0xa014f8025029ULL }, // Inst #15602 = VPMOVW2MZ128rr |
| 26499 | { 15601, 3, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 5511, 0, 0xce0878005028ULL }, // Inst #15601 = VPMOVUSWBZrrkz |
| 26500 | { 15600, 4, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 5507, 0, 0xca0878005028ULL }, // Inst #15600 = VPMOVUSWBZrrk |
| 26501 | { 15599, 2, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2845, 0, 0xc80878005028ULL }, // Inst #15599 = VPMOVUSWBZrr |
| 26502 | { 15598, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 4718, 0|(1ULL<<MCID::MayStore), 0xca0878005018ULL }, // Inst #15598 = VPMOVUSWBZmrk |
| 26503 | { 15597, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xc80878005018ULL }, // Inst #15597 = VPMOVUSWBZmr |
| 26504 | { 15596, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 5504, 0, 0xa70878005028ULL }, // Inst #15596 = VPMOVUSWBZ256rrkz |
| 26505 | { 15595, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 5500, 0, 0xa30878005028ULL }, // Inst #15595 = VPMOVUSWBZ256rrk |
| 26506 | { 15594, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0xa10878005028ULL }, // Inst #15594 = VPMOVUSWBZ256rr |
| 26507 | { 15593, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 4711, 0|(1ULL<<MCID::MayStore), 0xa30878005018ULL }, // Inst #15593 = VPMOVUSWBZ256mrk |
| 26508 | { 15592, 6, 0, 0, 2317, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xa10878005018ULL }, // Inst #15592 = VPMOVUSWBZ256mr |
| 26509 | { 15591, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2970, 0, 0x860878005028ULL }, // Inst #15591 = VPMOVUSWBZ128rrkz |
| 26510 | { 15590, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2966, 0, 0x820878005028ULL }, // Inst #15590 = VPMOVUSWBZ128rrk |
| 26511 | { 15589, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x800878005028ULL }, // Inst #15589 = VPMOVUSWBZ128rr |
| 26512 | { 15588, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 4704, 0|(1ULL<<MCID::MayStore), 0x820878005018ULL }, // Inst #15588 = VPMOVUSWBZ128mrk |
| 26513 | { 15587, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x800878005018ULL }, // Inst #15587 = VPMOVUSWBZ128mr |
| 26514 | { 15586, 3, 1, 0, 1130, 0, 0, X86ImpOpBase + 0, 2923, 0, 0xae0a78005028ULL }, // Inst #15586 = VPMOVUSQWZrrkz |
| 26515 | { 15585, 4, 1, 0, 1130, 0, 0, X86ImpOpBase + 0, 2919, 0, 0xaa0a78005028ULL }, // Inst #15585 = VPMOVUSQWZrrk |
| 26516 | { 15584, 2, 1, 0, 1791, 0, 0, X86ImpOpBase + 0, 2905, 0, 0xa80a78005028ULL }, // Inst #15584 = VPMOVUSQWZrr |
| 26517 | { 15583, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0xaa0a78005018ULL }, // Inst #15583 = VPMOVUSQWZmrk |
| 26518 | { 15582, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xa80a78005018ULL }, // Inst #15582 = VPMOVUSQWZmr |
| 26519 | { 15581, 3, 1, 0, 2325, 0, 0, X86ImpOpBase + 0, 2886, 0, 0x870a78005028ULL }, // Inst #15581 = VPMOVUSQWZ256rrkz |
| 26520 | { 15580, 4, 1, 0, 2325, 0, 0, X86ImpOpBase + 0, 2882, 0, 0x830a78005028ULL }, // Inst #15580 = VPMOVUSQWZ256rrk |
| 26521 | { 15579, 2, 1, 0, 2323, 0, 0, X86ImpOpBase + 0, 2821, 0, 0x810a78005028ULL }, // Inst #15579 = VPMOVUSQWZ256rr |
| 26522 | { 15578, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0x830a78005018ULL }, // Inst #15578 = VPMOVUSQWZ256mrk |
| 26523 | { 15577, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x810a78005018ULL }, // Inst #15577 = VPMOVUSQWZ256mr |
| 26524 | { 15576, 3, 1, 0, 2322, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x660a78005028ULL }, // Inst #15576 = VPMOVUSQWZ128rrkz |
| 26525 | { 15575, 4, 1, 0, 2322, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x620a78005028ULL }, // Inst #15575 = VPMOVUSQWZ128rrk |
| 26526 | { 15574, 2, 1, 0, 2320, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x600a78005028ULL }, // Inst #15574 = VPMOVUSQWZ128rr |
| 26527 | { 15573, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x620a78005018ULL }, // Inst #15573 = VPMOVUSQWZ128mrk |
| 26528 | { 15572, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x600a78005018ULL }, // Inst #15572 = VPMOVUSQWZ128mr |
| 26529 | { 15571, 3, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2902, 0, 0xce0af8005028ULL }, // Inst #15571 = VPMOVUSQDZrrkz |
| 26530 | { 15570, 4, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2898, 0, 0xca0af8005028ULL }, // Inst #15570 = VPMOVUSQDZrrk |
| 26531 | { 15569, 2, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2845, 0, 0xc80af8005028ULL }, // Inst #15569 = VPMOVUSQDZrr |
| 26532 | { 15568, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0xca0af8005018ULL }, // Inst #15568 = VPMOVUSQDZmrk |
| 26533 | { 15567, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xc80af8005018ULL }, // Inst #15567 = VPMOVUSQDZmr |
| 26534 | { 15566, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2886, 0, 0xa70af8005028ULL }, // Inst #15566 = VPMOVUSQDZ256rrkz |
| 26535 | { 15565, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2882, 0, 0xa30af8005028ULL }, // Inst #15565 = VPMOVUSQDZ256rrk |
| 26536 | { 15564, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0xa10af8005028ULL }, // Inst #15564 = VPMOVUSQDZ256rr |
| 26537 | { 15563, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0xa30af8005018ULL }, // Inst #15563 = VPMOVUSQDZ256mrk |
| 26538 | { 15562, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xa10af8005018ULL }, // Inst #15562 = VPMOVUSQDZ256mr |
| 26539 | { 15561, 3, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x860af8005028ULL }, // Inst #15561 = VPMOVUSQDZ128rrkz |
| 26540 | { 15560, 4, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x820af8005028ULL }, // Inst #15560 = VPMOVUSQDZ128rrk |
| 26541 | { 15559, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x800af8005028ULL }, // Inst #15559 = VPMOVUSQDZ128rr |
| 26542 | { 15558, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x820af8005018ULL }, // Inst #15558 = VPMOVUSQDZ128mrk |
| 26543 | { 15557, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x800af8005018ULL }, // Inst #15557 = VPMOVUSQDZ128mr |
| 26544 | { 15556, 3, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 2923, 0, 0x8e0978005028ULL }, // Inst #15556 = VPMOVUSQBZrrkz |
| 26545 | { 15555, 4, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 2919, 0, 0x8a0978005028ULL }, // Inst #15555 = VPMOVUSQBZrrk |
| 26546 | { 15554, 2, 1, 0, 1789, 0, 0, X86ImpOpBase + 0, 2905, 0, 0x880978005028ULL }, // Inst #15554 = VPMOVUSQBZrr |
| 26547 | { 15553, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0x8a0978005018ULL }, // Inst #15553 = VPMOVUSQBZmrk |
| 26548 | { 15552, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0x880978005018ULL }, // Inst #15552 = VPMOVUSQBZmr |
| 26549 | { 15551, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2886, 0, 0x670978005028ULL }, // Inst #15551 = VPMOVUSQBZ256rrkz |
| 26550 | { 15550, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2882, 0, 0x630978005028ULL }, // Inst #15550 = VPMOVUSQBZ256rrk |
| 26551 | { 15549, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0x610978005028ULL }, // Inst #15549 = VPMOVUSQBZ256rr |
| 26552 | { 15548, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0x630978005018ULL }, // Inst #15548 = VPMOVUSQBZ256mrk |
| 26553 | { 15547, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x610978005018ULL }, // Inst #15547 = VPMOVUSQBZ256mr |
| 26554 | { 15546, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x460978005028ULL }, // Inst #15546 = VPMOVUSQBZ128rrkz |
| 26555 | { 15545, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x420978005028ULL }, // Inst #15545 = VPMOVUSQBZ128rrk |
| 26556 | { 15544, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x400978005028ULL }, // Inst #15544 = VPMOVUSQBZ128rr |
| 26557 | { 15543, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x420978005018ULL }, // Inst #15543 = VPMOVUSQBZ128mrk |
| 26558 | { 15542, 6, 0, 0, 1273, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x400978005018ULL }, // Inst #15542 = VPMOVUSQBZ128mr |
| 26559 | { 15541, 3, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 2863, 0, 0xce09f8005028ULL }, // Inst #15541 = VPMOVUSDWZrrkz |
| 26560 | { 15540, 4, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 2859, 0, 0xca09f8005028ULL }, // Inst #15540 = VPMOVUSDWZrrk |
| 26561 | { 15539, 2, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2845, 0, 0xc809f8005028ULL }, // Inst #15539 = VPMOVUSDWZrr |
| 26562 | { 15538, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0xca09f8005018ULL }, // Inst #15538 = VPMOVUSDWZmrk |
| 26563 | { 15537, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xc809f8005018ULL }, // Inst #15537 = VPMOVUSDWZmr |
| 26564 | { 15536, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2827, 0, 0xa709f8005028ULL }, // Inst #15536 = VPMOVUSDWZ256rrkz |
| 26565 | { 15535, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2823, 0, 0xa309f8005028ULL }, // Inst #15535 = VPMOVUSDWZ256rrk |
| 26566 | { 15534, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0xa109f8005028ULL }, // Inst #15534 = VPMOVUSDWZ256rr |
| 26567 | { 15533, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0xa309f8005018ULL }, // Inst #15533 = VPMOVUSDWZ256mrk |
| 26568 | { 15532, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xa109f8005018ULL }, // Inst #15532 = VPMOVUSDWZ256mr |
| 26569 | { 15531, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2340, 0, 0x8609f8005028ULL }, // Inst #15531 = VPMOVUSDWZ128rrkz |
| 26570 | { 15530, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2336, 0, 0x8209f8005028ULL }, // Inst #15530 = VPMOVUSDWZ128rrk |
| 26571 | { 15529, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x8009f8005028ULL }, // Inst #15529 = VPMOVUSDWZ128rr |
| 26572 | { 15528, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0x8209f8005018ULL }, // Inst #15528 = VPMOVUSDWZ128mrk |
| 26573 | { 15527, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x8009f8005018ULL }, // Inst #15527 = VPMOVUSDWZ128mr |
| 26574 | { 15526, 3, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 5479, 0, 0xae08f8005028ULL }, // Inst #15526 = VPMOVUSDBZrrkz |
| 26575 | { 15525, 4, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 5475, 0, 0xaa08f8005028ULL }, // Inst #15525 = VPMOVUSDBZrrk |
| 26576 | { 15524, 2, 1, 0, 1789, 0, 0, X86ImpOpBase + 0, 2905, 0, 0xa808f8005028ULL }, // Inst #15524 = VPMOVUSDBZrr |
| 26577 | { 15523, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0xaa08f8005018ULL }, // Inst #15523 = VPMOVUSDBZmrk |
| 26578 | { 15522, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xa808f8005018ULL }, // Inst #15522 = VPMOVUSDBZmr |
| 26579 | { 15521, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2827, 0, 0x8708f8005028ULL }, // Inst #15521 = VPMOVUSDBZ256rrkz |
| 26580 | { 15520, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2823, 0, 0x8308f8005028ULL }, // Inst #15520 = VPMOVUSDBZ256rrk |
| 26581 | { 15519, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0x8108f8005028ULL }, // Inst #15519 = VPMOVUSDBZ256rr |
| 26582 | { 15518, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0x8308f8005018ULL }, // Inst #15518 = VPMOVUSDBZ256mrk |
| 26583 | { 15517, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x8108f8005018ULL }, // Inst #15517 = VPMOVUSDBZ256mr |
| 26584 | { 15516, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2340, 0, 0x6608f8005028ULL }, // Inst #15516 = VPMOVUSDBZ128rrkz |
| 26585 | { 15515, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2336, 0, 0x6208f8005028ULL }, // Inst #15515 = VPMOVUSDBZ128rrk |
| 26586 | { 15514, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x6008f8005028ULL }, // Inst #15514 = VPMOVUSDBZ128rr |
| 26587 | { 15513, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0x6208f8005018ULL }, // Inst #15513 = VPMOVUSDBZ128mrk |
| 26588 | { 15512, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x6008f8005018ULL }, // Inst #15512 = VPMOVUSDBZ128mr |
| 26589 | { 15511, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1238004829ULL }, // Inst #15511 = VPMOVSXWQrr |
| 26590 | { 15510, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1238004819ULL }, // Inst #15510 = VPMOVSXWQrm |
| 26591 | { 15509, 3, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2356, 0, 0xae1278004829ULL }, // Inst #15509 = VPMOVSXWQZrrkz |
| 26592 | { 15508, 4, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2352, 0, 0xaa1278004829ULL }, // Inst #15508 = VPMOVSXWQZrrk |
| 26593 | { 15507, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xa81278004829ULL }, // Inst #15507 = VPMOVSXWQZrr |
| 26594 | { 15506, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xae1278004819ULL }, // Inst #15506 = VPMOVSXWQZrmkz |
| 26595 | { 15505, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xaa1278004819ULL }, // Inst #15505 = VPMOVSXWQZrmk |
| 26596 | { 15504, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xa81278004819ULL }, // Inst #15504 = VPMOVSXWQZrm |
| 26597 | { 15503, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2349, 0, 0x871278004829ULL }, // Inst #15503 = VPMOVSXWQZ256rrkz |
| 26598 | { 15502, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2345, 0, 0x831278004829ULL }, // Inst #15502 = VPMOVSXWQZ256rrk |
| 26599 | { 15501, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0x811278004829ULL }, // Inst #15501 = VPMOVSXWQZ256rr |
| 26600 | { 15500, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x871278004819ULL }, // Inst #15500 = VPMOVSXWQZ256rmkz |
| 26601 | { 15499, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x831278004819ULL }, // Inst #15499 = VPMOVSXWQZ256rmk |
| 26602 | { 15498, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x811278004819ULL }, // Inst #15498 = VPMOVSXWQZ256rm |
| 26603 | { 15497, 3, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x661278004829ULL }, // Inst #15497 = VPMOVSXWQZ128rrkz |
| 26604 | { 15496, 4, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x621278004829ULL }, // Inst #15496 = VPMOVSXWQZ128rrk |
| 26605 | { 15495, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x601278004829ULL }, // Inst #15495 = VPMOVSXWQZ128rr |
| 26606 | { 15494, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x661278004819ULL }, // Inst #15494 = VPMOVSXWQZ128rmkz |
| 26607 | { 15493, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x621278004819ULL }, // Inst #15493 = VPMOVSXWQZ128rmk |
| 26608 | { 15492, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x601278004819ULL }, // Inst #15492 = VPMOVSXWQZ128rm |
| 26609 | { 15491, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x11238004829ULL }, // Inst #15491 = VPMOVSXWQYrr |
| 26610 | { 15490, 6, 1, 0, 850, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x11238004819ULL }, // Inst #15490 = VPMOVSXWQYrm |
| 26611 | { 15489, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x11b8004829ULL }, // Inst #15489 = VPMOVSXWDrr |
| 26612 | { 15488, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x11b8004819ULL }, // Inst #15488 = VPMOVSXWDrm |
| 26613 | { 15487, 3, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2951, 0, 0xce11f8004829ULL }, // Inst #15487 = VPMOVSXWDZrrkz |
| 26614 | { 15486, 4, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2947, 0, 0xca11f8004829ULL }, // Inst #15486 = VPMOVSXWDZrrk |
| 26615 | { 15485, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2797, 0, 0xc811f8004829ULL }, // Inst #15485 = VPMOVSXWDZrr |
| 26616 | { 15484, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xce11f8004819ULL }, // Inst #15484 = VPMOVSXWDZrmkz |
| 26617 | { 15483, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xca11f8004819ULL }, // Inst #15483 = VPMOVSXWDZrmk |
| 26618 | { 15482, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc811f8004819ULL }, // Inst #15482 = VPMOVSXWDZrm |
| 26619 | { 15481, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2256, 0, 0xa711f8004829ULL }, // Inst #15481 = VPMOVSXWDZ256rrkz |
| 26620 | { 15480, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2252, 0, 0xa311f8004829ULL }, // Inst #15480 = VPMOVSXWDZ256rrk |
| 26621 | { 15479, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xa111f8004829ULL }, // Inst #15479 = VPMOVSXWDZ256rr |
| 26622 | { 15478, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xa711f8004819ULL }, // Inst #15478 = VPMOVSXWDZ256rmkz |
| 26623 | { 15477, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0xa311f8004819ULL }, // Inst #15477 = VPMOVSXWDZ256rmk |
| 26624 | { 15476, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa111f8004819ULL }, // Inst #15476 = VPMOVSXWDZ256rm |
| 26625 | { 15475, 3, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2340, 0, 0x8611f8004829ULL }, // Inst #15475 = VPMOVSXWDZ128rrkz |
| 26626 | { 15474, 4, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2336, 0, 0x8211f8004829ULL }, // Inst #15474 = VPMOVSXWDZ128rrk |
| 26627 | { 15473, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x8011f8004829ULL }, // Inst #15473 = VPMOVSXWDZ128rr |
| 26628 | { 15472, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x8611f8004819ULL }, // Inst #15472 = VPMOVSXWDZ128rmkz |
| 26629 | { 15471, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x8211f8004819ULL }, // Inst #15471 = VPMOVSXWDZ128rmk |
| 26630 | { 15470, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x8011f8004819ULL }, // Inst #15470 = VPMOVSXWDZ128rm |
| 26631 | { 15469, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x111b8004829ULL }, // Inst #15469 = VPMOVSXWDYrr |
| 26632 | { 15468, 6, 1, 0, 869, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x111b8004819ULL }, // Inst #15468 = VPMOVSXWDYrm |
| 26633 | { 15467, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x12b8004829ULL }, // Inst #15467 = VPMOVSXDQrr |
| 26634 | { 15466, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x12b8004819ULL }, // Inst #15466 = VPMOVSXDQrm |
| 26635 | { 15465, 3, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2803, 0, 0xce12f8004829ULL }, // Inst #15465 = VPMOVSXDQZrrkz |
| 26636 | { 15464, 4, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2799, 0, 0xca12f8004829ULL }, // Inst #15464 = VPMOVSXDQZrrk |
| 26637 | { 15463, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2797, 0, 0xc812f8004829ULL }, // Inst #15463 = VPMOVSXDQZrr |
| 26638 | { 15462, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xce12f8004819ULL }, // Inst #15462 = VPMOVSXDQZrmkz |
| 26639 | { 15461, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xca12f8004819ULL }, // Inst #15461 = VPMOVSXDQZrmk |
| 26640 | { 15460, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc812f8004819ULL }, // Inst #15460 = VPMOVSXDQZrm |
| 26641 | { 15459, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2349, 0, 0xa712f8004829ULL }, // Inst #15459 = VPMOVSXDQZ256rrkz |
| 26642 | { 15458, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2345, 0, 0xa312f8004829ULL }, // Inst #15458 = VPMOVSXDQZ256rrk |
| 26643 | { 15457, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xa112f8004829ULL }, // Inst #15457 = VPMOVSXDQZ256rr |
| 26644 | { 15456, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xa712f8004819ULL }, // Inst #15456 = VPMOVSXDQZ256rmkz |
| 26645 | { 15455, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xa312f8004819ULL }, // Inst #15455 = VPMOVSXDQZ256rmk |
| 26646 | { 15454, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa112f8004819ULL }, // Inst #15454 = VPMOVSXDQZ256rm |
| 26647 | { 15453, 3, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x8612f8004829ULL }, // Inst #15453 = VPMOVSXDQZ128rrkz |
| 26648 | { 15452, 4, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x8212f8004829ULL }, // Inst #15452 = VPMOVSXDQZ128rrk |
| 26649 | { 15451, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x8012f8004829ULL }, // Inst #15451 = VPMOVSXDQZ128rr |
| 26650 | { 15450, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x8612f8004819ULL }, // Inst #15450 = VPMOVSXDQZ128rmkz |
| 26651 | { 15449, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x8212f8004819ULL }, // Inst #15449 = VPMOVSXDQZ128rmk |
| 26652 | { 15448, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x8012f8004819ULL }, // Inst #15448 = VPMOVSXDQZ128rm |
| 26653 | { 15447, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x112b8004829ULL }, // Inst #15447 = VPMOVSXDQYrr |
| 26654 | { 15446, 6, 1, 0, 869, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x112b8004819ULL }, // Inst #15446 = VPMOVSXDQYrm |
| 26655 | { 15445, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1038004829ULL }, // Inst #15445 = VPMOVSXBWrr |
| 26656 | { 15444, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1038004819ULL }, // Inst #15444 = VPMOVSXBWrm |
| 26657 | { 15443, 3, 1, 0, 2129, 0, 0, X86ImpOpBase + 0, 5518, 0, 0xce1078004829ULL }, // Inst #15443 = VPMOVSXBWZrrkz |
| 26658 | { 15442, 4, 1, 0, 2129, 0, 0, X86ImpOpBase + 0, 5514, 0, 0xca1078004829ULL }, // Inst #15442 = VPMOVSXBWZrrk |
| 26659 | { 15441, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2797, 0, 0xc81078004829ULL }, // Inst #15441 = VPMOVSXBWZrr |
| 26660 | { 15440, 7, 1, 0, 1840, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0xce1078004819ULL }, // Inst #15440 = VPMOVSXBWZrmkz |
| 26661 | { 15439, 8, 1, 0, 1840, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad), 0xca1078004819ULL }, // Inst #15439 = VPMOVSXBWZrmk |
| 26662 | { 15438, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc81078004819ULL }, // Inst #15438 = VPMOVSXBWZrm |
| 26663 | { 15437, 3, 1, 0, 2128, 0, 0, X86ImpOpBase + 0, 5015, 0, 0xa71078004829ULL }, // Inst #15437 = VPMOVSXBWZ256rrkz |
| 26664 | { 15436, 4, 1, 0, 2128, 0, 0, X86ImpOpBase + 0, 5011, 0, 0xa31078004829ULL }, // Inst #15436 = VPMOVSXBWZ256rrk |
| 26665 | { 15435, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xa11078004829ULL }, // Inst #15435 = VPMOVSXBWZ256rr |
| 26666 | { 15434, 7, 1, 0, 1840, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0xa71078004819ULL }, // Inst #15434 = VPMOVSXBWZ256rmkz |
| 26667 | { 15433, 8, 1, 0, 1840, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0xa31078004819ULL }, // Inst #15433 = VPMOVSXBWZ256rmk |
| 26668 | { 15432, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa11078004819ULL }, // Inst #15432 = VPMOVSXBWZ256rm |
| 26669 | { 15431, 3, 1, 0, 1658, 0, 0, X86ImpOpBase + 0, 2970, 0, 0x861078004829ULL }, // Inst #15431 = VPMOVSXBWZ128rrkz |
| 26670 | { 15430, 4, 1, 0, 1658, 0, 0, X86ImpOpBase + 0, 2966, 0, 0x821078004829ULL }, // Inst #15430 = VPMOVSXBWZ128rrk |
| 26671 | { 15429, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x801078004829ULL }, // Inst #15429 = VPMOVSXBWZ128rr |
| 26672 | { 15428, 7, 1, 0, 1894, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0x861078004819ULL }, // Inst #15428 = VPMOVSXBWZ128rmkz |
| 26673 | { 15427, 8, 1, 0, 1894, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0x821078004819ULL }, // Inst #15427 = VPMOVSXBWZ128rmk |
| 26674 | { 15426, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x801078004819ULL }, // Inst #15426 = VPMOVSXBWZ128rm |
| 26675 | { 15425, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x11038004829ULL }, // Inst #15425 = VPMOVSXBWYrr |
| 26676 | { 15424, 6, 1, 0, 869, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x11038004819ULL }, // Inst #15424 = VPMOVSXBWYrm |
| 26677 | { 15423, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1138004829ULL }, // Inst #15423 = VPMOVSXBQrr |
| 26678 | { 15422, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1138004819ULL }, // Inst #15422 = VPMOVSXBQrm |
| 26679 | { 15421, 3, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2356, 0, 0x8e1178004829ULL }, // Inst #15421 = VPMOVSXBQZrrkz |
| 26680 | { 15420, 4, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2352, 0, 0x8a1178004829ULL }, // Inst #15420 = VPMOVSXBQZrrk |
| 26681 | { 15419, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2280, 0, 0x881178004829ULL }, // Inst #15419 = VPMOVSXBQZrr |
| 26682 | { 15418, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x8e1178004819ULL }, // Inst #15418 = VPMOVSXBQZrmkz |
| 26683 | { 15417, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0x8a1178004819ULL }, // Inst #15417 = VPMOVSXBQZrmk |
| 26684 | { 15416, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x881178004819ULL }, // Inst #15416 = VPMOVSXBQZrm |
| 26685 | { 15415, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2349, 0, 0x671178004829ULL }, // Inst #15415 = VPMOVSXBQZ256rrkz |
| 26686 | { 15414, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2345, 0, 0x631178004829ULL }, // Inst #15414 = VPMOVSXBQZ256rrk |
| 26687 | { 15413, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0x611178004829ULL }, // Inst #15413 = VPMOVSXBQZ256rr |
| 26688 | { 15412, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x671178004819ULL }, // Inst #15412 = VPMOVSXBQZ256rmkz |
| 26689 | { 15411, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x631178004819ULL }, // Inst #15411 = VPMOVSXBQZ256rmk |
| 26690 | { 15410, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x611178004819ULL }, // Inst #15410 = VPMOVSXBQZ256rm |
| 26691 | { 15409, 3, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x461178004829ULL }, // Inst #15409 = VPMOVSXBQZ128rrkz |
| 26692 | { 15408, 4, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x421178004829ULL }, // Inst #15408 = VPMOVSXBQZ128rrk |
| 26693 | { 15407, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x401178004829ULL }, // Inst #15407 = VPMOVSXBQZ128rr |
| 26694 | { 15406, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x461178004819ULL }, // Inst #15406 = VPMOVSXBQZ128rmkz |
| 26695 | { 15405, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x421178004819ULL }, // Inst #15405 = VPMOVSXBQZ128rmk |
| 26696 | { 15404, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x401178004819ULL }, // Inst #15404 = VPMOVSXBQZ128rm |
| 26697 | { 15403, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x11138004829ULL }, // Inst #15403 = VPMOVSXBQYrr |
| 26698 | { 15402, 6, 1, 0, 850, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x11138004819ULL }, // Inst #15402 = VPMOVSXBQYrm |
| 26699 | { 15401, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x10b8004829ULL }, // Inst #15401 = VPMOVSXBDrr |
| 26700 | { 15400, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x10b8004819ULL }, // Inst #15400 = VPMOVSXBDrm |
| 26701 | { 15399, 3, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2286, 0, 0xae10f8004829ULL }, // Inst #15399 = VPMOVSXBDZrrkz |
| 26702 | { 15398, 4, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2282, 0, 0xaa10f8004829ULL }, // Inst #15398 = VPMOVSXBDZrrk |
| 26703 | { 15397, 2, 1, 0, 1129, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xa810f8004829ULL }, // Inst #15397 = VPMOVSXBDZrr |
| 26704 | { 15396, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xae10f8004819ULL }, // Inst #15396 = VPMOVSXBDZrmkz |
| 26705 | { 15395, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xaa10f8004819ULL }, // Inst #15395 = VPMOVSXBDZrmk |
| 26706 | { 15394, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xa810f8004819ULL }, // Inst #15394 = VPMOVSXBDZrm |
| 26707 | { 15393, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2256, 0, 0x8710f8004829ULL }, // Inst #15393 = VPMOVSXBDZ256rrkz |
| 26708 | { 15392, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2252, 0, 0x8310f8004829ULL }, // Inst #15392 = VPMOVSXBDZ256rrk |
| 26709 | { 15391, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2250, 0, 0x8110f8004829ULL }, // Inst #15391 = VPMOVSXBDZ256rr |
| 26710 | { 15390, 7, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x8710f8004819ULL }, // Inst #15390 = VPMOVSXBDZ256rmkz |
| 26711 | { 15389, 8, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0x8310f8004819ULL }, // Inst #15389 = VPMOVSXBDZ256rmk |
| 26712 | { 15388, 6, 1, 0, 537, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x8110f8004819ULL }, // Inst #15388 = VPMOVSXBDZ256rm |
| 26713 | { 15387, 3, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2340, 0, 0x6610f8004829ULL }, // Inst #15387 = VPMOVSXBDZ128rrkz |
| 26714 | { 15386, 4, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2336, 0, 0x6210f8004829ULL }, // Inst #15386 = VPMOVSXBDZ128rrk |
| 26715 | { 15385, 2, 1, 0, 1126, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x6010f8004829ULL }, // Inst #15385 = VPMOVSXBDZ128rr |
| 26716 | { 15384, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x6610f8004819ULL }, // Inst #15384 = VPMOVSXBDZ128rmkz |
| 26717 | { 15383, 8, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x6210f8004819ULL }, // Inst #15383 = VPMOVSXBDZ128rmk |
| 26718 | { 15382, 6, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x6010f8004819ULL }, // Inst #15382 = VPMOVSXBDZ128rm |
| 26719 | { 15381, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x110b8004829ULL }, // Inst #15381 = VPMOVSXBDYrr |
| 26720 | { 15380, 6, 1, 0, 850, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x110b8004819ULL }, // Inst #15380 = VPMOVSXBDYrm |
| 26721 | { 15379, 3, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 5511, 0, 0xce1078005028ULL }, // Inst #15379 = VPMOVSWBZrrkz |
| 26722 | { 15378, 4, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 5507, 0, 0xca1078005028ULL }, // Inst #15378 = VPMOVSWBZrrk |
| 26723 | { 15377, 2, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2845, 0, 0xc81078005028ULL }, // Inst #15377 = VPMOVSWBZrr |
| 26724 | { 15376, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 4718, 0|(1ULL<<MCID::MayStore), 0xca1078005018ULL }, // Inst #15376 = VPMOVSWBZmrk |
| 26725 | { 15375, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xc81078005018ULL }, // Inst #15375 = VPMOVSWBZmr |
| 26726 | { 15374, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 5504, 0, 0xa71078005028ULL }, // Inst #15374 = VPMOVSWBZ256rrkz |
| 26727 | { 15373, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 5500, 0, 0xa31078005028ULL }, // Inst #15373 = VPMOVSWBZ256rrk |
| 26728 | { 15372, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0xa11078005028ULL }, // Inst #15372 = VPMOVSWBZ256rr |
| 26729 | { 15371, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 4711, 0|(1ULL<<MCID::MayStore), 0xa31078005018ULL }, // Inst #15371 = VPMOVSWBZ256mrk |
| 26730 | { 15370, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xa11078005018ULL }, // Inst #15370 = VPMOVSWBZ256mr |
| 26731 | { 15369, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2970, 0, 0x861078005028ULL }, // Inst #15369 = VPMOVSWBZ128rrkz |
| 26732 | { 15368, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2966, 0, 0x821078005028ULL }, // Inst #15368 = VPMOVSWBZ128rrk |
| 26733 | { 15367, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x801078005028ULL }, // Inst #15367 = VPMOVSWBZ128rr |
| 26734 | { 15366, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 4704, 0|(1ULL<<MCID::MayStore), 0x821078005018ULL }, // Inst #15366 = VPMOVSWBZ128mrk |
| 26735 | { 15365, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x801078005018ULL }, // Inst #15365 = VPMOVSWBZ128mr |
| 26736 | { 15364, 3, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 2923, 0, 0xae1278005028ULL }, // Inst #15364 = VPMOVSQWZrrkz |
| 26737 | { 15363, 4, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 2919, 0, 0xaa1278005028ULL }, // Inst #15363 = VPMOVSQWZrrk |
| 26738 | { 15362, 2, 1, 0, 1789, 0, 0, X86ImpOpBase + 0, 2905, 0, 0xa81278005028ULL }, // Inst #15362 = VPMOVSQWZrr |
| 26739 | { 15361, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0xaa1278005018ULL }, // Inst #15361 = VPMOVSQWZmrk |
| 26740 | { 15360, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xa81278005018ULL }, // Inst #15360 = VPMOVSQWZmr |
| 26741 | { 15359, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2886, 0, 0x871278005028ULL }, // Inst #15359 = VPMOVSQWZ256rrkz |
| 26742 | { 15358, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2882, 0, 0x831278005028ULL }, // Inst #15358 = VPMOVSQWZ256rrk |
| 26743 | { 15357, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0x811278005028ULL }, // Inst #15357 = VPMOVSQWZ256rr |
| 26744 | { 15356, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0x831278005018ULL }, // Inst #15356 = VPMOVSQWZ256mrk |
| 26745 | { 15355, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x811278005018ULL }, // Inst #15355 = VPMOVSQWZ256mr |
| 26746 | { 15354, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x661278005028ULL }, // Inst #15354 = VPMOVSQWZ128rrkz |
| 26747 | { 15353, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x621278005028ULL }, // Inst #15353 = VPMOVSQWZ128rrk |
| 26748 | { 15352, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x601278005028ULL }, // Inst #15352 = VPMOVSQWZ128rr |
| 26749 | { 15351, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x621278005018ULL }, // Inst #15351 = VPMOVSQWZ128mrk |
| 26750 | { 15350, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x601278005018ULL }, // Inst #15350 = VPMOVSQWZ128mr |
| 26751 | { 15349, 3, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2902, 0, 0xce12f8005028ULL }, // Inst #15349 = VPMOVSQDZrrkz |
| 26752 | { 15348, 4, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2898, 0, 0xca12f8005028ULL }, // Inst #15348 = VPMOVSQDZrrk |
| 26753 | { 15347, 2, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2845, 0, 0xc812f8005028ULL }, // Inst #15347 = VPMOVSQDZrr |
| 26754 | { 15346, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0xca12f8005018ULL }, // Inst #15346 = VPMOVSQDZmrk |
| 26755 | { 15345, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xc812f8005018ULL }, // Inst #15345 = VPMOVSQDZmr |
| 26756 | { 15344, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2886, 0, 0xa712f8005028ULL }, // Inst #15344 = VPMOVSQDZ256rrkz |
| 26757 | { 15343, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2882, 0, 0xa312f8005028ULL }, // Inst #15343 = VPMOVSQDZ256rrk |
| 26758 | { 15342, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0xa112f8005028ULL }, // Inst #15342 = VPMOVSQDZ256rr |
| 26759 | { 15341, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0xa312f8005018ULL }, // Inst #15341 = VPMOVSQDZ256mrk |
| 26760 | { 15340, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xa112f8005018ULL }, // Inst #15340 = VPMOVSQDZ256mr |
| 26761 | { 15339, 3, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x8612f8005028ULL }, // Inst #15339 = VPMOVSQDZ128rrkz |
| 26762 | { 15338, 4, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x8212f8005028ULL }, // Inst #15338 = VPMOVSQDZ128rrk |
| 26763 | { 15337, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x8012f8005028ULL }, // Inst #15337 = VPMOVSQDZ128rr |
| 26764 | { 15336, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x8212f8005018ULL }, // Inst #15336 = VPMOVSQDZ128mrk |
| 26765 | { 15335, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x8012f8005018ULL }, // Inst #15335 = VPMOVSQDZ128mr |
| 26766 | { 15334, 3, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 2923, 0, 0x8e1178005028ULL }, // Inst #15334 = VPMOVSQBZrrkz |
| 26767 | { 15333, 4, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 2919, 0, 0x8a1178005028ULL }, // Inst #15333 = VPMOVSQBZrrk |
| 26768 | { 15332, 2, 1, 0, 1789, 0, 0, X86ImpOpBase + 0, 2905, 0, 0x881178005028ULL }, // Inst #15332 = VPMOVSQBZrr |
| 26769 | { 15331, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0x8a1178005018ULL }, // Inst #15331 = VPMOVSQBZmrk |
| 26770 | { 15330, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0x881178005018ULL }, // Inst #15330 = VPMOVSQBZmr |
| 26771 | { 15329, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2886, 0, 0x671178005028ULL }, // Inst #15329 = VPMOVSQBZ256rrkz |
| 26772 | { 15328, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2882, 0, 0x631178005028ULL }, // Inst #15328 = VPMOVSQBZ256rrk |
| 26773 | { 15327, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0x611178005028ULL }, // Inst #15327 = VPMOVSQBZ256rr |
| 26774 | { 15326, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0x631178005018ULL }, // Inst #15326 = VPMOVSQBZ256mrk |
| 26775 | { 15325, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x611178005018ULL }, // Inst #15325 = VPMOVSQBZ256mr |
| 26776 | { 15324, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x461178005028ULL }, // Inst #15324 = VPMOVSQBZ128rrkz |
| 26777 | { 15323, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x421178005028ULL }, // Inst #15323 = VPMOVSQBZ128rrk |
| 26778 | { 15322, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x401178005028ULL }, // Inst #15322 = VPMOVSQBZ128rr |
| 26779 | { 15321, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x421178005018ULL }, // Inst #15321 = VPMOVSQBZ128mrk |
| 26780 | { 15320, 6, 0, 0, 1273, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x401178005018ULL }, // Inst #15320 = VPMOVSQBZ128mr |
| 26781 | { 15319, 3, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 2863, 0, 0xce11f8005028ULL }, // Inst #15319 = VPMOVSDWZrrkz |
| 26782 | { 15318, 4, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 2859, 0, 0xca11f8005028ULL }, // Inst #15318 = VPMOVSDWZrrk |
| 26783 | { 15317, 2, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2845, 0, 0xc811f8005028ULL }, // Inst #15317 = VPMOVSDWZrr |
| 26784 | { 15316, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0xca11f8005018ULL }, // Inst #15316 = VPMOVSDWZmrk |
| 26785 | { 15315, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xc811f8005018ULL }, // Inst #15315 = VPMOVSDWZmr |
| 26786 | { 15314, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2827, 0, 0xa711f8005028ULL }, // Inst #15314 = VPMOVSDWZ256rrkz |
| 26787 | { 15313, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2823, 0, 0xa311f8005028ULL }, // Inst #15313 = VPMOVSDWZ256rrk |
| 26788 | { 15312, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0xa111f8005028ULL }, // Inst #15312 = VPMOVSDWZ256rr |
| 26789 | { 15311, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0xa311f8005018ULL }, // Inst #15311 = VPMOVSDWZ256mrk |
| 26790 | { 15310, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xa111f8005018ULL }, // Inst #15310 = VPMOVSDWZ256mr |
| 26791 | { 15309, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2340, 0, 0x8611f8005028ULL }, // Inst #15309 = VPMOVSDWZ128rrkz |
| 26792 | { 15308, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2336, 0, 0x8211f8005028ULL }, // Inst #15308 = VPMOVSDWZ128rrk |
| 26793 | { 15307, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x8011f8005028ULL }, // Inst #15307 = VPMOVSDWZ128rr |
| 26794 | { 15306, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0x8211f8005018ULL }, // Inst #15306 = VPMOVSDWZ128mrk |
| 26795 | { 15305, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x8011f8005018ULL }, // Inst #15305 = VPMOVSDWZ128mr |
| 26796 | { 15304, 3, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 5479, 0, 0xae10f8005028ULL }, // Inst #15304 = VPMOVSDBZrrkz |
| 26797 | { 15303, 4, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 5475, 0, 0xaa10f8005028ULL }, // Inst #15303 = VPMOVSDBZrrk |
| 26798 | { 15302, 2, 1, 0, 1789, 0, 0, X86ImpOpBase + 0, 2905, 0, 0xa810f8005028ULL }, // Inst #15302 = VPMOVSDBZrr |
| 26799 | { 15301, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0xaa10f8005018ULL }, // Inst #15301 = VPMOVSDBZmrk |
| 26800 | { 15300, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xa810f8005018ULL }, // Inst #15300 = VPMOVSDBZmr |
| 26801 | { 15299, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2827, 0, 0x8710f8005028ULL }, // Inst #15299 = VPMOVSDBZ256rrkz |
| 26802 | { 15298, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2823, 0, 0x8310f8005028ULL }, // Inst #15298 = VPMOVSDBZ256rrk |
| 26803 | { 15297, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0x8110f8005028ULL }, // Inst #15297 = VPMOVSDBZ256rr |
| 26804 | { 15296, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0x8310f8005018ULL }, // Inst #15296 = VPMOVSDBZ256mrk |
| 26805 | { 15295, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x8110f8005018ULL }, // Inst #15295 = VPMOVSDBZ256mr |
| 26806 | { 15294, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2340, 0, 0x6610f8005028ULL }, // Inst #15294 = VPMOVSDBZ128rrkz |
| 26807 | { 15293, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2336, 0, 0x6210f8005028ULL }, // Inst #15293 = VPMOVSDBZ128rrk |
| 26808 | { 15292, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x6010f8005028ULL }, // Inst #15292 = VPMOVSDBZ128rr |
| 26809 | { 15291, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0x6210f8005018ULL }, // Inst #15291 = VPMOVSDBZ128mrk |
| 26810 | { 15290, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x6010f8005018ULL }, // Inst #15290 = VPMOVSDBZ128mr |
| 26811 | { 15289, 3, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 2923, 0, 0xae1a78005028ULL }, // Inst #15289 = VPMOVQWZrrkz |
| 26812 | { 15288, 4, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 2919, 0, 0xaa1a78005028ULL }, // Inst #15288 = VPMOVQWZrrk |
| 26813 | { 15287, 2, 1, 0, 1789, 0, 0, X86ImpOpBase + 0, 2905, 0, 0xa81a78005028ULL }, // Inst #15287 = VPMOVQWZrr |
| 26814 | { 15286, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0xaa1a78005018ULL }, // Inst #15286 = VPMOVQWZmrk |
| 26815 | { 15285, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xa81a78005018ULL }, // Inst #15285 = VPMOVQWZmr |
| 26816 | { 15284, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2886, 0, 0x871a78005028ULL }, // Inst #15284 = VPMOVQWZ256rrkz |
| 26817 | { 15283, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2882, 0, 0x831a78005028ULL }, // Inst #15283 = VPMOVQWZ256rrk |
| 26818 | { 15282, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0x811a78005028ULL }, // Inst #15282 = VPMOVQWZ256rr |
| 26819 | { 15281, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0x831a78005018ULL }, // Inst #15281 = VPMOVQWZ256mrk |
| 26820 | { 15280, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x811a78005018ULL }, // Inst #15280 = VPMOVQWZ256mr |
| 26821 | { 15279, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x661a78005028ULL }, // Inst #15279 = VPMOVQWZ128rrkz |
| 26822 | { 15278, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x621a78005028ULL }, // Inst #15278 = VPMOVQWZ128rrk |
| 26823 | { 15277, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x601a78005028ULL }, // Inst #15277 = VPMOVQWZ128rr |
| 26824 | { 15276, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x621a78005018ULL }, // Inst #15276 = VPMOVQWZ128mrk |
| 26825 | { 15275, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x601a78005018ULL }, // Inst #15275 = VPMOVQWZ128mr |
| 26826 | { 15274, 3, 1, 0, 538, 0, 0, X86ImpOpBase + 0, 2902, 0, 0xce1af8005028ULL }, // Inst #15274 = VPMOVQDZrrkz |
| 26827 | { 15273, 4, 1, 0, 538, 0, 0, X86ImpOpBase + 0, 2898, 0, 0xca1af8005028ULL }, // Inst #15273 = VPMOVQDZrrk |
| 26828 | { 15272, 2, 1, 0, 538, 0, 0, X86ImpOpBase + 0, 2845, 0, 0xc81af8005028ULL }, // Inst #15272 = VPMOVQDZrr |
| 26829 | { 15271, 7, 0, 0, 1260, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0xca1af8005018ULL }, // Inst #15271 = VPMOVQDZmrk |
| 26830 | { 15270, 6, 0, 0, 1711, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xc81af8005018ULL }, // Inst #15270 = VPMOVQDZmr |
| 26831 | { 15269, 3, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2886, 0, 0xa71af8005028ULL }, // Inst #15269 = VPMOVQDZ256rrkz |
| 26832 | { 15268, 4, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2882, 0, 0xa31af8005028ULL }, // Inst #15268 = VPMOVQDZ256rrk |
| 26833 | { 15267, 2, 1, 0, 1127, 0, 0, X86ImpOpBase + 0, 2821, 0, 0xa11af8005028ULL }, // Inst #15267 = VPMOVQDZ256rr |
| 26834 | { 15266, 7, 0, 0, 1260, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0xa31af8005018ULL }, // Inst #15266 = VPMOVQDZ256mrk |
| 26835 | { 15265, 6, 0, 0, 1711, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xa11af8005018ULL }, // Inst #15265 = VPMOVQDZ256mr |
| 26836 | { 15264, 3, 1, 0, 1697, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x861af8005028ULL }, // Inst #15264 = VPMOVQDZ128rrkz |
| 26837 | { 15263, 4, 1, 0, 1697, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x821af8005028ULL }, // Inst #15263 = VPMOVQDZ128rrk |
| 26838 | { 15262, 2, 1, 0, 1697, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x801af8005028ULL }, // Inst #15262 = VPMOVQDZ128rr |
| 26839 | { 15261, 7, 0, 0, 1835, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x821af8005018ULL }, // Inst #15261 = VPMOVQDZ128mrk |
| 26840 | { 15260, 6, 0, 0, 1835, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x801af8005018ULL }, // Inst #15260 = VPMOVQDZ128mr |
| 26841 | { 15259, 3, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 2923, 0, 0x8e1978005028ULL }, // Inst #15259 = VPMOVQBZrrkz |
| 26842 | { 15258, 4, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 2919, 0, 0x8a1978005028ULL }, // Inst #15258 = VPMOVQBZrrk |
| 26843 | { 15257, 2, 1, 0, 1789, 0, 0, X86ImpOpBase + 0, 2905, 0, 0x881978005028ULL }, // Inst #15257 = VPMOVQBZrr |
| 26844 | { 15256, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0x8a1978005018ULL }, // Inst #15256 = VPMOVQBZmrk |
| 26845 | { 15255, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0x881978005018ULL }, // Inst #15255 = VPMOVQBZmr |
| 26846 | { 15254, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2886, 0, 0x671978005028ULL }, // Inst #15254 = VPMOVQBZ256rrkz |
| 26847 | { 15253, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2882, 0, 0x631978005028ULL }, // Inst #15253 = VPMOVQBZ256rrk |
| 26848 | { 15252, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0x611978005028ULL }, // Inst #15252 = VPMOVQBZ256rr |
| 26849 | { 15251, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0x631978005018ULL }, // Inst #15251 = VPMOVQBZ256mrk |
| 26850 | { 15250, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x611978005018ULL }, // Inst #15250 = VPMOVQBZ256mr |
| 26851 | { 15249, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x461978005028ULL }, // Inst #15249 = VPMOVQBZ128rrkz |
| 26852 | { 15248, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x421978005028ULL }, // Inst #15248 = VPMOVQBZ128rrk |
| 26853 | { 15247, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x401978005028ULL }, // Inst #15247 = VPMOVQBZ128rr |
| 26854 | { 15246, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x421978005018ULL }, // Inst #15246 = VPMOVQBZ128mrk |
| 26855 | { 15245, 6, 0, 0, 1273, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x401978005018ULL }, // Inst #15245 = VPMOVQBZ128mr |
| 26856 | { 15244, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5498, 0, 0xe81cf8025029ULL }, // Inst #15244 = VPMOVQ2MZrr |
| 26857 | { 15243, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5496, 0, 0xc11cf8025029ULL }, // Inst #15243 = VPMOVQ2MZ256rr |
| 26858 | { 15242, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5494, 0, 0xa01cf8025029ULL }, // Inst #15242 = VPMOVQ2MZ128rr |
| 26859 | { 15241, 2, 1, 0, 273, 0, 0, X86ImpOpBase + 0, 1003, 0, 0x6bb8002829ULL }, // Inst #15241 = VPMOVMSKBrr |
| 26860 | { 15240, 2, 1, 0, 539, 0, 0, X86ImpOpBase + 0, 4812, 0, 0x16bb8002829ULL }, // Inst #15240 = VPMOVMSKBYrr |
| 26861 | { 15239, 2, 1, 0, 1862, 0, 0, X86ImpOpBase + 0, 5492, 0, 0xe81478025029ULL }, // Inst #15239 = VPMOVM2WZrr |
| 26862 | { 15238, 2, 1, 0, 2224, 0, 0, X86ImpOpBase + 0, 4982, 0, 0xc11478025029ULL }, // Inst #15238 = VPMOVM2WZ256rr |
| 26863 | { 15237, 2, 1, 0, 2223, 0, 0, X86ImpOpBase + 0, 4974, 0, 0xa01478025029ULL }, // Inst #15237 = VPMOVM2WZ128rr |
| 26864 | { 15236, 2, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 4978, 0, 0xe81c78025029ULL }, // Inst #15236 = VPMOVM2QZrr |
| 26865 | { 15235, 2, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 5490, 0, 0xc11c78025029ULL }, // Inst #15235 = VPMOVM2QZ256rr |
| 26866 | { 15234, 2, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 5488, 0, 0xa01c78025029ULL }, // Inst #15234 = VPMOVM2QZ128rr |
| 26867 | { 15233, 2, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 4984, 0, 0xe81c78005029ULL }, // Inst #15233 = VPMOVM2DZrr |
| 26868 | { 15232, 2, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 4976, 0, 0xc11c78005029ULL }, // Inst #15232 = VPMOVM2DZ256rr |
| 26869 | { 15231, 2, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 5486, 0, 0xa01c78005029ULL }, // Inst #15231 = VPMOVM2DZ128rr |
| 26870 | { 15230, 2, 1, 0, 1862, 0, 0, X86ImpOpBase + 0, 5484, 0, 0xe81478005029ULL }, // Inst #15230 = VPMOVM2BZrr |
| 26871 | { 15229, 2, 1, 0, 2224, 0, 0, X86ImpOpBase + 0, 5482, 0, 0xc11478005029ULL }, // Inst #15229 = VPMOVM2BZ256rr |
| 26872 | { 15228, 2, 1, 0, 2223, 0, 0, X86ImpOpBase + 0, 4980, 0, 0xa01478005029ULL }, // Inst #15228 = VPMOVM2BZ128rr |
| 26873 | { 15227, 3, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 2863, 0, 0xce19f8005028ULL }, // Inst #15227 = VPMOVDWZrrkz |
| 26874 | { 15226, 4, 1, 0, 1259, 0, 0, X86ImpOpBase + 0, 2859, 0, 0xca19f8005028ULL }, // Inst #15226 = VPMOVDWZrrk |
| 26875 | { 15225, 2, 1, 0, 1790, 0, 0, X86ImpOpBase + 0, 2845, 0, 0xc819f8005028ULL }, // Inst #15225 = VPMOVDWZrr |
| 26876 | { 15224, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0xca19f8005018ULL }, // Inst #15224 = VPMOVDWZmrk |
| 26877 | { 15223, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xc819f8005018ULL }, // Inst #15223 = VPMOVDWZmr |
| 26878 | { 15222, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2827, 0, 0xa719f8005028ULL }, // Inst #15222 = VPMOVDWZ256rrkz |
| 26879 | { 15221, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2823, 0, 0xa319f8005028ULL }, // Inst #15221 = VPMOVDWZ256rrk |
| 26880 | { 15220, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0xa119f8005028ULL }, // Inst #15220 = VPMOVDWZ256rr |
| 26881 | { 15219, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0xa319f8005018ULL }, // Inst #15219 = VPMOVDWZ256mrk |
| 26882 | { 15218, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xa119f8005018ULL }, // Inst #15218 = VPMOVDWZ256mr |
| 26883 | { 15217, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2340, 0, 0x8619f8005028ULL }, // Inst #15217 = VPMOVDWZ128rrkz |
| 26884 | { 15216, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2336, 0, 0x8219f8005028ULL }, // Inst #15216 = VPMOVDWZ128rrk |
| 26885 | { 15215, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x8019f8005028ULL }, // Inst #15215 = VPMOVDWZ128rr |
| 26886 | { 15214, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0x8219f8005018ULL }, // Inst #15214 = VPMOVDWZ128mrk |
| 26887 | { 15213, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x8019f8005018ULL }, // Inst #15213 = VPMOVDWZ128mr |
| 26888 | { 15212, 3, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 5479, 0, 0xae18f8005028ULL }, // Inst #15212 = VPMOVDBZrrkz |
| 26889 | { 15211, 4, 1, 0, 1258, 0, 0, X86ImpOpBase + 0, 5475, 0, 0xaa18f8005028ULL }, // Inst #15211 = VPMOVDBZrrk |
| 26890 | { 15210, 2, 1, 0, 1789, 0, 0, X86ImpOpBase + 0, 2905, 0, 0xa818f8005028ULL }, // Inst #15210 = VPMOVDBZrr |
| 26891 | { 15209, 7, 0, 0, 1937, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0xaa18f8005018ULL }, // Inst #15209 = VPMOVDBZmrk |
| 26892 | { 15208, 6, 0, 0, 1936, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xa818f8005018ULL }, // Inst #15208 = VPMOVDBZmr |
| 26893 | { 15207, 3, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2827, 0, 0x8718f8005028ULL }, // Inst #15207 = VPMOVDBZ256rrkz |
| 26894 | { 15206, 4, 1, 0, 1257, 0, 0, X86ImpOpBase + 0, 2823, 0, 0x8318f8005028ULL }, // Inst #15206 = VPMOVDBZ256rrk |
| 26895 | { 15205, 2, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2821, 0, 0x8118f8005028ULL }, // Inst #15205 = VPMOVDBZ256rr |
| 26896 | { 15204, 7, 0, 0, 2324, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0x8318f8005018ULL }, // Inst #15204 = VPMOVDBZ256mrk |
| 26897 | { 15203, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x8118f8005018ULL }, // Inst #15203 = VPMOVDBZ256mr |
| 26898 | { 15202, 3, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2340, 0, 0x6618f8005028ULL }, // Inst #15202 = VPMOVDBZ128rrkz |
| 26899 | { 15201, 4, 1, 0, 2321, 0, 0, X86ImpOpBase + 0, 2336, 0, 0x6218f8005028ULL }, // Inst #15201 = VPMOVDBZ128rrk |
| 26900 | { 15200, 2, 1, 0, 2319, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x6018f8005028ULL }, // Inst #15200 = VPMOVDBZ128rr |
| 26901 | { 15199, 7, 0, 0, 2318, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0x6218f8005018ULL }, // Inst #15199 = VPMOVDBZ128mrk |
| 26902 | { 15198, 6, 0, 0, 2316, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x6018f8005018ULL }, // Inst #15198 = VPMOVDBZ128mr |
| 26903 | { 15197, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5473, 0, 0xe81cf8005029ULL }, // Inst #15197 = VPMOVD2MZrr |
| 26904 | { 15196, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5471, 0, 0xc11cf8005029ULL }, // Inst #15196 = VPMOVD2MZ256rr |
| 26905 | { 15195, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5469, 0, 0xa01cf8005029ULL }, // Inst #15195 = VPMOVD2MZ128rr |
| 26906 | { 15194, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5467, 0, 0xe814f8005029ULL }, // Inst #15194 = VPMOVB2MZrr |
| 26907 | { 15193, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5465, 0, 0xc114f8005029ULL }, // Inst #15193 = VPMOVB2MZ256rr |
| 26908 | { 15192, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 5463, 0, 0xa014f8005029ULL }, // Inst #15192 = VPMOVB2MZ128rr |
| 26909 | { 15191, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x9d38004829ULL }, // Inst #15191 = VPMINUWrr |
| 26910 | { 15190, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9d38004819ULL }, // Inst #15190 = VPMINUWrm |
| 26911 | { 15189, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xee9d78004829ULL }, // Inst #15189 = VPMINUWZrrkz |
| 26912 | { 15188, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xea9d78004829ULL }, // Inst #15188 = VPMINUWZrrk |
| 26913 | { 15187, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89d78004829ULL }, // Inst #15187 = VPMINUWZrr |
| 26914 | { 15186, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xee9d78004819ULL }, // Inst #15186 = VPMINUWZrmkz |
| 26915 | { 15185, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xea9d78004819ULL }, // Inst #15185 = VPMINUWZrmk |
| 26916 | { 15184, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89d78004819ULL }, // Inst #15184 = VPMINUWZrm |
| 26917 | { 15183, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc79d78004829ULL }, // Inst #15183 = VPMINUWZ256rrkz |
| 26918 | { 15182, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc39d78004829ULL }, // Inst #15182 = VPMINUWZ256rrk |
| 26919 | { 15181, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19d78004829ULL }, // Inst #15181 = VPMINUWZ256rr |
| 26920 | { 15180, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc79d78004819ULL }, // Inst #15180 = VPMINUWZ256rmkz |
| 26921 | { 15179, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc39d78004819ULL }, // Inst #15179 = VPMINUWZ256rmk |
| 26922 | { 15178, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19d78004819ULL }, // Inst #15178 = VPMINUWZ256rm |
| 26923 | { 15177, 4, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa69d78004829ULL }, // Inst #15177 = VPMINUWZ128rrkz |
| 26924 | { 15176, 5, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa29d78004829ULL }, // Inst #15176 = VPMINUWZ128rrk |
| 26925 | { 15175, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09d78004829ULL }, // Inst #15175 = VPMINUWZ128rr |
| 26926 | { 15174, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa69d78004819ULL }, // Inst #15174 = VPMINUWZ128rmkz |
| 26927 | { 15173, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa29d78004819ULL }, // Inst #15173 = VPMINUWZ128rmk |
| 26928 | { 15172, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09d78004819ULL }, // Inst #15172 = VPMINUWZ128rm |
| 26929 | { 15171, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x19d38004829ULL }, // Inst #15171 = VPMINUWYrr |
| 26930 | { 15170, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19d38004819ULL }, // Inst #15170 = VPMINUWYrm |
| 26931 | { 15169, 4, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xee9df8024829ULL }, // Inst #15169 = VPMINUQZrrkz |
| 26932 | { 15168, 5, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xea9df8024829ULL }, // Inst #15168 = VPMINUQZrrk |
| 26933 | { 15167, 3, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89df8024829ULL }, // Inst #15167 = VPMINUQZrr |
| 26934 | { 15166, 8, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee9df8024819ULL }, // Inst #15166 = VPMINUQZrmkz |
| 26935 | { 15165, 9, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea9df8024819ULL }, // Inst #15165 = VPMINUQZrmk |
| 26936 | { 15164, 8, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e9df8024819ULL }, // Inst #15164 = VPMINUQZrmbkz |
| 26937 | { 15163, 9, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a9df8024819ULL }, // Inst #15163 = VPMINUQZrmbk |
| 26938 | { 15162, 7, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x989df8024819ULL }, // Inst #15162 = VPMINUQZrmb |
| 26939 | { 15161, 7, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89df8024819ULL }, // Inst #15161 = VPMINUQZrm |
| 26940 | { 15160, 4, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc79df8024829ULL }, // Inst #15160 = VPMINUQZ256rrkz |
| 26941 | { 15159, 5, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc39df8024829ULL }, // Inst #15159 = VPMINUQZ256rrk |
| 26942 | { 15158, 3, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19df8024829ULL }, // Inst #15158 = VPMINUQZ256rr |
| 26943 | { 15157, 8, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc79df8024819ULL }, // Inst #15157 = VPMINUQZ256rmkz |
| 26944 | { 15156, 9, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc39df8024819ULL }, // Inst #15156 = VPMINUQZ256rmk |
| 26945 | { 15155, 8, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x979df8024819ULL }, // Inst #15155 = VPMINUQZ256rmbkz |
| 26946 | { 15154, 9, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x939df8024819ULL }, // Inst #15154 = VPMINUQZ256rmbk |
| 26947 | { 15153, 7, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x919df8024819ULL }, // Inst #15153 = VPMINUQZ256rmb |
| 26948 | { 15152, 7, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19df8024819ULL }, // Inst #15152 = VPMINUQZ256rm |
| 26949 | { 15151, 4, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa69df8024829ULL }, // Inst #15151 = VPMINUQZ128rrkz |
| 26950 | { 15150, 5, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa29df8024829ULL }, // Inst #15150 = VPMINUQZ128rrk |
| 26951 | { 15149, 3, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09df8024829ULL }, // Inst #15149 = VPMINUQZ128rr |
| 26952 | { 15148, 8, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa69df8024819ULL }, // Inst #15148 = VPMINUQZ128rmkz |
| 26953 | { 15147, 9, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa29df8024819ULL }, // Inst #15147 = VPMINUQZ128rmk |
| 26954 | { 15146, 8, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x969df8024819ULL }, // Inst #15146 = VPMINUQZ128rmbkz |
| 26955 | { 15145, 9, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x929df8024819ULL }, // Inst #15145 = VPMINUQZ128rmbk |
| 26956 | { 15144, 7, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x909df8024819ULL }, // Inst #15144 = VPMINUQZ128rmb |
| 26957 | { 15143, 7, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09df8024819ULL }, // Inst #15143 = VPMINUQZ128rm |
| 26958 | { 15142, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x9db8004829ULL }, // Inst #15142 = VPMINUDrr |
| 26959 | { 15141, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9db8004819ULL }, // Inst #15141 = VPMINUDrm |
| 26960 | { 15140, 4, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xee9df8004829ULL }, // Inst #15140 = VPMINUDZrrkz |
| 26961 | { 15139, 5, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xea9df8004829ULL }, // Inst #15139 = VPMINUDZrrk |
| 26962 | { 15138, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89df8004829ULL }, // Inst #15138 = VPMINUDZrr |
| 26963 | { 15137, 8, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee9df8004819ULL }, // Inst #15137 = VPMINUDZrmkz |
| 26964 | { 15136, 9, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea9df8004819ULL }, // Inst #15136 = VPMINUDZrmk |
| 26965 | { 15135, 8, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e9df8004819ULL }, // Inst #15135 = VPMINUDZrmbkz |
| 26966 | { 15134, 9, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a9df8004819ULL }, // Inst #15134 = VPMINUDZrmbk |
| 26967 | { 15133, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x789df8004819ULL }, // Inst #15133 = VPMINUDZrmb |
| 26968 | { 15132, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89df8004819ULL }, // Inst #15132 = VPMINUDZrm |
| 26969 | { 15131, 4, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc79df8004829ULL }, // Inst #15131 = VPMINUDZ256rrkz |
| 26970 | { 15130, 5, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc39df8004829ULL }, // Inst #15130 = VPMINUDZ256rrk |
| 26971 | { 15129, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19df8004829ULL }, // Inst #15129 = VPMINUDZ256rr |
| 26972 | { 15128, 8, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc79df8004819ULL }, // Inst #15128 = VPMINUDZ256rmkz |
| 26973 | { 15127, 9, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc39df8004819ULL }, // Inst #15127 = VPMINUDZ256rmk |
| 26974 | { 15126, 8, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x779df8004819ULL }, // Inst #15126 = VPMINUDZ256rmbkz |
| 26975 | { 15125, 9, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x739df8004819ULL }, // Inst #15125 = VPMINUDZ256rmbk |
| 26976 | { 15124, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x719df8004819ULL }, // Inst #15124 = VPMINUDZ256rmb |
| 26977 | { 15123, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19df8004819ULL }, // Inst #15123 = VPMINUDZ256rm |
| 26978 | { 15122, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa69df8004829ULL }, // Inst #15122 = VPMINUDZ128rrkz |
| 26979 | { 15121, 5, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa29df8004829ULL }, // Inst #15121 = VPMINUDZ128rrk |
| 26980 | { 15120, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09df8004829ULL }, // Inst #15120 = VPMINUDZ128rr |
| 26981 | { 15119, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa69df8004819ULL }, // Inst #15119 = VPMINUDZ128rmkz |
| 26982 | { 15118, 9, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa29df8004819ULL }, // Inst #15118 = VPMINUDZ128rmk |
| 26983 | { 15117, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x769df8004819ULL }, // Inst #15117 = VPMINUDZ128rmbkz |
| 26984 | { 15116, 9, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x729df8004819ULL }, // Inst #15116 = VPMINUDZ128rmbk |
| 26985 | { 15115, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x709df8004819ULL }, // Inst #15115 = VPMINUDZ128rmb |
| 26986 | { 15114, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09df8004819ULL }, // Inst #15114 = VPMINUDZ128rm |
| 26987 | { 15113, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x19db8004829ULL }, // Inst #15113 = VPMINUDYrr |
| 26988 | { 15112, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19db8004819ULL }, // Inst #15112 = VPMINUDYrm |
| 26989 | { 15111, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xed38002829ULL }, // Inst #15111 = VPMINUBrr |
| 26990 | { 15110, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xed38002819ULL }, // Inst #15110 = VPMINUBrm |
| 26991 | { 15109, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4590, 0|(1ULL<<MCID::Commutable), 0xeeed78002829ULL }, // Inst #15109 = VPMINUBZrrkz |
| 26992 | { 15108, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xeaed78002829ULL }, // Inst #15108 = VPMINUBZrrk |
| 26993 | { 15107, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8ed78002829ULL }, // Inst #15107 = VPMINUBZrr |
| 26994 | { 15106, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeeed78002819ULL }, // Inst #15106 = VPMINUBZrmkz |
| 26995 | { 15105, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeaed78002819ULL }, // Inst #15105 = VPMINUBZrmk |
| 26996 | { 15104, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ed78002819ULL }, // Inst #15104 = VPMINUBZrm |
| 26997 | { 15103, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4564, 0|(1ULL<<MCID::Commutable), 0xc7ed78002829ULL }, // Inst #15103 = VPMINUBZ256rrkz |
| 26998 | { 15102, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc3ed78002829ULL }, // Inst #15102 = VPMINUBZ256rrk |
| 26999 | { 15101, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1ed78002829ULL }, // Inst #15101 = VPMINUBZ256rr |
| 27000 | { 15100, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7ed78002819ULL }, // Inst #15100 = VPMINUBZ256rmkz |
| 27001 | { 15099, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3ed78002819ULL }, // Inst #15099 = VPMINUBZ256rmk |
| 27002 | { 15098, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ed78002819ULL }, // Inst #15098 = VPMINUBZ256rm |
| 27003 | { 15097, 4, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 4538, 0|(1ULL<<MCID::Commutable), 0xa6ed78002829ULL }, // Inst #15097 = VPMINUBZ128rrkz |
| 27004 | { 15096, 5, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa2ed78002829ULL }, // Inst #15096 = VPMINUBZ128rrk |
| 27005 | { 15095, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0ed78002829ULL }, // Inst #15095 = VPMINUBZ128rr |
| 27006 | { 15094, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6ed78002819ULL }, // Inst #15094 = VPMINUBZ128rmkz |
| 27007 | { 15093, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2ed78002819ULL }, // Inst #15093 = VPMINUBZ128rmk |
| 27008 | { 15092, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ed78002819ULL }, // Inst #15092 = VPMINUBZ128rm |
| 27009 | { 15091, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1ed38002829ULL }, // Inst #15091 = VPMINUBYrr |
| 27010 | { 15090, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ed38002819ULL }, // Inst #15090 = VPMINUBYrm |
| 27011 | { 15089, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xf538002829ULL }, // Inst #15089 = VPMINSWrr |
| 27012 | { 15088, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf538002819ULL }, // Inst #15088 = VPMINSWrm |
| 27013 | { 15087, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xeef578002829ULL }, // Inst #15087 = VPMINSWZrrkz |
| 27014 | { 15086, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeaf578002829ULL }, // Inst #15086 = VPMINSWZrrk |
| 27015 | { 15085, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f578002829ULL }, // Inst #15085 = VPMINSWZrr |
| 27016 | { 15084, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeef578002819ULL }, // Inst #15084 = VPMINSWZrmkz |
| 27017 | { 15083, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeaf578002819ULL }, // Inst #15083 = VPMINSWZrmk |
| 27018 | { 15082, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f578002819ULL }, // Inst #15082 = VPMINSWZrm |
| 27019 | { 15081, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc7f578002829ULL }, // Inst #15081 = VPMINSWZ256rrkz |
| 27020 | { 15080, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc3f578002829ULL }, // Inst #15080 = VPMINSWZ256rrk |
| 27021 | { 15079, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f578002829ULL }, // Inst #15079 = VPMINSWZ256rr |
| 27022 | { 15078, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7f578002819ULL }, // Inst #15078 = VPMINSWZ256rmkz |
| 27023 | { 15077, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3f578002819ULL }, // Inst #15077 = VPMINSWZ256rmk |
| 27024 | { 15076, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f578002819ULL }, // Inst #15076 = VPMINSWZ256rm |
| 27025 | { 15075, 4, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa6f578002829ULL }, // Inst #15075 = VPMINSWZ128rrkz |
| 27026 | { 15074, 5, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa2f578002829ULL }, // Inst #15074 = VPMINSWZ128rrk |
| 27027 | { 15073, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f578002829ULL }, // Inst #15073 = VPMINSWZ128rr |
| 27028 | { 15072, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6f578002819ULL }, // Inst #15072 = VPMINSWZ128rmkz |
| 27029 | { 15071, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2f578002819ULL }, // Inst #15071 = VPMINSWZ128rmk |
| 27030 | { 15070, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f578002819ULL }, // Inst #15070 = VPMINSWZ128rm |
| 27031 | { 15069, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1f538002829ULL }, // Inst #15069 = VPMINSWYrr |
| 27032 | { 15068, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f538002819ULL }, // Inst #15068 = VPMINSWYrm |
| 27033 | { 15067, 4, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xee9cf8024829ULL }, // Inst #15067 = VPMINSQZrrkz |
| 27034 | { 15066, 5, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xea9cf8024829ULL }, // Inst #15066 = VPMINSQZrrk |
| 27035 | { 15065, 3, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89cf8024829ULL }, // Inst #15065 = VPMINSQZrr |
| 27036 | { 15064, 8, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee9cf8024819ULL }, // Inst #15064 = VPMINSQZrmkz |
| 27037 | { 15063, 9, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea9cf8024819ULL }, // Inst #15063 = VPMINSQZrmk |
| 27038 | { 15062, 8, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e9cf8024819ULL }, // Inst #15062 = VPMINSQZrmbkz |
| 27039 | { 15061, 9, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a9cf8024819ULL }, // Inst #15061 = VPMINSQZrmbk |
| 27040 | { 15060, 7, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x989cf8024819ULL }, // Inst #15060 = VPMINSQZrmb |
| 27041 | { 15059, 7, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89cf8024819ULL }, // Inst #15059 = VPMINSQZrm |
| 27042 | { 15058, 4, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc79cf8024829ULL }, // Inst #15058 = VPMINSQZ256rrkz |
| 27043 | { 15057, 5, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc39cf8024829ULL }, // Inst #15057 = VPMINSQZ256rrk |
| 27044 | { 15056, 3, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19cf8024829ULL }, // Inst #15056 = VPMINSQZ256rr |
| 27045 | { 15055, 8, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc79cf8024819ULL }, // Inst #15055 = VPMINSQZ256rmkz |
| 27046 | { 15054, 9, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc39cf8024819ULL }, // Inst #15054 = VPMINSQZ256rmk |
| 27047 | { 15053, 8, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x979cf8024819ULL }, // Inst #15053 = VPMINSQZ256rmbkz |
| 27048 | { 15052, 9, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x939cf8024819ULL }, // Inst #15052 = VPMINSQZ256rmbk |
| 27049 | { 15051, 7, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x919cf8024819ULL }, // Inst #15051 = VPMINSQZ256rmb |
| 27050 | { 15050, 7, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19cf8024819ULL }, // Inst #15050 = VPMINSQZ256rm |
| 27051 | { 15049, 4, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa69cf8024829ULL }, // Inst #15049 = VPMINSQZ128rrkz |
| 27052 | { 15048, 5, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa29cf8024829ULL }, // Inst #15048 = VPMINSQZ128rrk |
| 27053 | { 15047, 3, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09cf8024829ULL }, // Inst #15047 = VPMINSQZ128rr |
| 27054 | { 15046, 8, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa69cf8024819ULL }, // Inst #15046 = VPMINSQZ128rmkz |
| 27055 | { 15045, 9, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa29cf8024819ULL }, // Inst #15045 = VPMINSQZ128rmk |
| 27056 | { 15044, 8, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x969cf8024819ULL }, // Inst #15044 = VPMINSQZ128rmbkz |
| 27057 | { 15043, 9, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x929cf8024819ULL }, // Inst #15043 = VPMINSQZ128rmbk |
| 27058 | { 15042, 7, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x909cf8024819ULL }, // Inst #15042 = VPMINSQZ128rmb |
| 27059 | { 15041, 7, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09cf8024819ULL }, // Inst #15041 = VPMINSQZ128rm |
| 27060 | { 15040, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x9cb8004829ULL }, // Inst #15040 = VPMINSDrr |
| 27061 | { 15039, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9cb8004819ULL }, // Inst #15039 = VPMINSDrm |
| 27062 | { 15038, 4, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xee9cf8004829ULL }, // Inst #15038 = VPMINSDZrrkz |
| 27063 | { 15037, 5, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xea9cf8004829ULL }, // Inst #15037 = VPMINSDZrrk |
| 27064 | { 15036, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89cf8004829ULL }, // Inst #15036 = VPMINSDZrr |
| 27065 | { 15035, 8, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee9cf8004819ULL }, // Inst #15035 = VPMINSDZrmkz |
| 27066 | { 15034, 9, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea9cf8004819ULL }, // Inst #15034 = VPMINSDZrmk |
| 27067 | { 15033, 8, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e9cf8004819ULL }, // Inst #15033 = VPMINSDZrmbkz |
| 27068 | { 15032, 9, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a9cf8004819ULL }, // Inst #15032 = VPMINSDZrmbk |
| 27069 | { 15031, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x789cf8004819ULL }, // Inst #15031 = VPMINSDZrmb |
| 27070 | { 15030, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89cf8004819ULL }, // Inst #15030 = VPMINSDZrm |
| 27071 | { 15029, 4, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc79cf8004829ULL }, // Inst #15029 = VPMINSDZ256rrkz |
| 27072 | { 15028, 5, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc39cf8004829ULL }, // Inst #15028 = VPMINSDZ256rrk |
| 27073 | { 15027, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19cf8004829ULL }, // Inst #15027 = VPMINSDZ256rr |
| 27074 | { 15026, 8, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc79cf8004819ULL }, // Inst #15026 = VPMINSDZ256rmkz |
| 27075 | { 15025, 9, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc39cf8004819ULL }, // Inst #15025 = VPMINSDZ256rmk |
| 27076 | { 15024, 8, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x779cf8004819ULL }, // Inst #15024 = VPMINSDZ256rmbkz |
| 27077 | { 15023, 9, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x739cf8004819ULL }, // Inst #15023 = VPMINSDZ256rmbk |
| 27078 | { 15022, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x719cf8004819ULL }, // Inst #15022 = VPMINSDZ256rmb |
| 27079 | { 15021, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19cf8004819ULL }, // Inst #15021 = VPMINSDZ256rm |
| 27080 | { 15020, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa69cf8004829ULL }, // Inst #15020 = VPMINSDZ128rrkz |
| 27081 | { 15019, 5, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa29cf8004829ULL }, // Inst #15019 = VPMINSDZ128rrk |
| 27082 | { 15018, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09cf8004829ULL }, // Inst #15018 = VPMINSDZ128rr |
| 27083 | { 15017, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa69cf8004819ULL }, // Inst #15017 = VPMINSDZ128rmkz |
| 27084 | { 15016, 9, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa29cf8004819ULL }, // Inst #15016 = VPMINSDZ128rmk |
| 27085 | { 15015, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x769cf8004819ULL }, // Inst #15015 = VPMINSDZ128rmbkz |
| 27086 | { 15014, 9, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x729cf8004819ULL }, // Inst #15014 = VPMINSDZ128rmbk |
| 27087 | { 15013, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x709cf8004819ULL }, // Inst #15013 = VPMINSDZ128rmb |
| 27088 | { 15012, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09cf8004819ULL }, // Inst #15012 = VPMINSDZ128rm |
| 27089 | { 15011, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x19cb8004829ULL }, // Inst #15011 = VPMINSDYrr |
| 27090 | { 15010, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19cb8004819ULL }, // Inst #15010 = VPMINSDYrm |
| 27091 | { 15009, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x9c38004829ULL }, // Inst #15009 = VPMINSBrr |
| 27092 | { 15008, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9c38004819ULL }, // Inst #15008 = VPMINSBrm |
| 27093 | { 15007, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4590, 0|(1ULL<<MCID::Commutable), 0xee9c78004829ULL }, // Inst #15007 = VPMINSBZrrkz |
| 27094 | { 15006, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xea9c78004829ULL }, // Inst #15006 = VPMINSBZrrk |
| 27095 | { 15005, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89c78004829ULL }, // Inst #15005 = VPMINSBZrr |
| 27096 | { 15004, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xee9c78004819ULL }, // Inst #15004 = VPMINSBZrmkz |
| 27097 | { 15003, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xea9c78004819ULL }, // Inst #15003 = VPMINSBZrmk |
| 27098 | { 15002, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89c78004819ULL }, // Inst #15002 = VPMINSBZrm |
| 27099 | { 15001, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4564, 0|(1ULL<<MCID::Commutable), 0xc79c78004829ULL }, // Inst #15001 = VPMINSBZ256rrkz |
| 27100 | { 15000, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc39c78004829ULL }, // Inst #15000 = VPMINSBZ256rrk |
| 27101 | { 14999, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19c78004829ULL }, // Inst #14999 = VPMINSBZ256rr |
| 27102 | { 14998, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc79c78004819ULL }, // Inst #14998 = VPMINSBZ256rmkz |
| 27103 | { 14997, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc39c78004819ULL }, // Inst #14997 = VPMINSBZ256rmk |
| 27104 | { 14996, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19c78004819ULL }, // Inst #14996 = VPMINSBZ256rm |
| 27105 | { 14995, 4, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 4538, 0|(1ULL<<MCID::Commutable), 0xa69c78004829ULL }, // Inst #14995 = VPMINSBZ128rrkz |
| 27106 | { 14994, 5, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa29c78004829ULL }, // Inst #14994 = VPMINSBZ128rrk |
| 27107 | { 14993, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09c78004829ULL }, // Inst #14993 = VPMINSBZ128rr |
| 27108 | { 14992, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa69c78004819ULL }, // Inst #14992 = VPMINSBZ128rmkz |
| 27109 | { 14991, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa29c78004819ULL }, // Inst #14991 = VPMINSBZ128rmk |
| 27110 | { 14990, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09c78004819ULL }, // Inst #14990 = VPMINSBZ128rm |
| 27111 | { 14989, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x19c38004829ULL }, // Inst #14989 = VPMINSBYrr |
| 27112 | { 14988, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19c38004819ULL }, // Inst #14988 = VPMINSBYrm |
| 27113 | { 14987, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x9f38004829ULL }, // Inst #14987 = VPMAXUWrr |
| 27114 | { 14986, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9f38004819ULL }, // Inst #14986 = VPMAXUWrm |
| 27115 | { 14985, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xee9f78004829ULL }, // Inst #14985 = VPMAXUWZrrkz |
| 27116 | { 14984, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xea9f78004829ULL }, // Inst #14984 = VPMAXUWZrrk |
| 27117 | { 14983, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89f78004829ULL }, // Inst #14983 = VPMAXUWZrr |
| 27118 | { 14982, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xee9f78004819ULL }, // Inst #14982 = VPMAXUWZrmkz |
| 27119 | { 14981, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xea9f78004819ULL }, // Inst #14981 = VPMAXUWZrmk |
| 27120 | { 14980, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89f78004819ULL }, // Inst #14980 = VPMAXUWZrm |
| 27121 | { 14979, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc79f78004829ULL }, // Inst #14979 = VPMAXUWZ256rrkz |
| 27122 | { 14978, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc39f78004829ULL }, // Inst #14978 = VPMAXUWZ256rrk |
| 27123 | { 14977, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19f78004829ULL }, // Inst #14977 = VPMAXUWZ256rr |
| 27124 | { 14976, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc79f78004819ULL }, // Inst #14976 = VPMAXUWZ256rmkz |
| 27125 | { 14975, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc39f78004819ULL }, // Inst #14975 = VPMAXUWZ256rmk |
| 27126 | { 14974, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19f78004819ULL }, // Inst #14974 = VPMAXUWZ256rm |
| 27127 | { 14973, 4, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa69f78004829ULL }, // Inst #14973 = VPMAXUWZ128rrkz |
| 27128 | { 14972, 5, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa29f78004829ULL }, // Inst #14972 = VPMAXUWZ128rrk |
| 27129 | { 14971, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09f78004829ULL }, // Inst #14971 = VPMAXUWZ128rr |
| 27130 | { 14970, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa69f78004819ULL }, // Inst #14970 = VPMAXUWZ128rmkz |
| 27131 | { 14969, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa29f78004819ULL }, // Inst #14969 = VPMAXUWZ128rmk |
| 27132 | { 14968, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09f78004819ULL }, // Inst #14968 = VPMAXUWZ128rm |
| 27133 | { 14967, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x19f38004829ULL }, // Inst #14967 = VPMAXUWYrr |
| 27134 | { 14966, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19f38004819ULL }, // Inst #14966 = VPMAXUWYrm |
| 27135 | { 14965, 4, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xee9ff8024829ULL }, // Inst #14965 = VPMAXUQZrrkz |
| 27136 | { 14964, 5, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xea9ff8024829ULL }, // Inst #14964 = VPMAXUQZrrk |
| 27137 | { 14963, 3, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89ff8024829ULL }, // Inst #14963 = VPMAXUQZrr |
| 27138 | { 14962, 8, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee9ff8024819ULL }, // Inst #14962 = VPMAXUQZrmkz |
| 27139 | { 14961, 9, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea9ff8024819ULL }, // Inst #14961 = VPMAXUQZrmk |
| 27140 | { 14960, 8, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e9ff8024819ULL }, // Inst #14960 = VPMAXUQZrmbkz |
| 27141 | { 14959, 9, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a9ff8024819ULL }, // Inst #14959 = VPMAXUQZrmbk |
| 27142 | { 14958, 7, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x989ff8024819ULL }, // Inst #14958 = VPMAXUQZrmb |
| 27143 | { 14957, 7, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89ff8024819ULL }, // Inst #14957 = VPMAXUQZrm |
| 27144 | { 14956, 4, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc79ff8024829ULL }, // Inst #14956 = VPMAXUQZ256rrkz |
| 27145 | { 14955, 5, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc39ff8024829ULL }, // Inst #14955 = VPMAXUQZ256rrk |
| 27146 | { 14954, 3, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19ff8024829ULL }, // Inst #14954 = VPMAXUQZ256rr |
| 27147 | { 14953, 8, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc79ff8024819ULL }, // Inst #14953 = VPMAXUQZ256rmkz |
| 27148 | { 14952, 9, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc39ff8024819ULL }, // Inst #14952 = VPMAXUQZ256rmk |
| 27149 | { 14951, 8, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x979ff8024819ULL }, // Inst #14951 = VPMAXUQZ256rmbkz |
| 27150 | { 14950, 9, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x939ff8024819ULL }, // Inst #14950 = VPMAXUQZ256rmbk |
| 27151 | { 14949, 7, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x919ff8024819ULL }, // Inst #14949 = VPMAXUQZ256rmb |
| 27152 | { 14948, 7, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19ff8024819ULL }, // Inst #14948 = VPMAXUQZ256rm |
| 27153 | { 14947, 4, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa69ff8024829ULL }, // Inst #14947 = VPMAXUQZ128rrkz |
| 27154 | { 14946, 5, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa29ff8024829ULL }, // Inst #14946 = VPMAXUQZ128rrk |
| 27155 | { 14945, 3, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09ff8024829ULL }, // Inst #14945 = VPMAXUQZ128rr |
| 27156 | { 14944, 8, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa69ff8024819ULL }, // Inst #14944 = VPMAXUQZ128rmkz |
| 27157 | { 14943, 9, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa29ff8024819ULL }, // Inst #14943 = VPMAXUQZ128rmk |
| 27158 | { 14942, 8, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x969ff8024819ULL }, // Inst #14942 = VPMAXUQZ128rmbkz |
| 27159 | { 14941, 9, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x929ff8024819ULL }, // Inst #14941 = VPMAXUQZ128rmbk |
| 27160 | { 14940, 7, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x909ff8024819ULL }, // Inst #14940 = VPMAXUQZ128rmb |
| 27161 | { 14939, 7, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09ff8024819ULL }, // Inst #14939 = VPMAXUQZ128rm |
| 27162 | { 14938, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x9fb8004829ULL }, // Inst #14938 = VPMAXUDrr |
| 27163 | { 14937, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9fb8004819ULL }, // Inst #14937 = VPMAXUDrm |
| 27164 | { 14936, 4, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xee9ff8004829ULL }, // Inst #14936 = VPMAXUDZrrkz |
| 27165 | { 14935, 5, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xea9ff8004829ULL }, // Inst #14935 = VPMAXUDZrrk |
| 27166 | { 14934, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89ff8004829ULL }, // Inst #14934 = VPMAXUDZrr |
| 27167 | { 14933, 8, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee9ff8004819ULL }, // Inst #14933 = VPMAXUDZrmkz |
| 27168 | { 14932, 9, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea9ff8004819ULL }, // Inst #14932 = VPMAXUDZrmk |
| 27169 | { 14931, 8, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e9ff8004819ULL }, // Inst #14931 = VPMAXUDZrmbkz |
| 27170 | { 14930, 9, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a9ff8004819ULL }, // Inst #14930 = VPMAXUDZrmbk |
| 27171 | { 14929, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x789ff8004819ULL }, // Inst #14929 = VPMAXUDZrmb |
| 27172 | { 14928, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89ff8004819ULL }, // Inst #14928 = VPMAXUDZrm |
| 27173 | { 14927, 4, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc79ff8004829ULL }, // Inst #14927 = VPMAXUDZ256rrkz |
| 27174 | { 14926, 5, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc39ff8004829ULL }, // Inst #14926 = VPMAXUDZ256rrk |
| 27175 | { 14925, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19ff8004829ULL }, // Inst #14925 = VPMAXUDZ256rr |
| 27176 | { 14924, 8, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc79ff8004819ULL }, // Inst #14924 = VPMAXUDZ256rmkz |
| 27177 | { 14923, 9, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc39ff8004819ULL }, // Inst #14923 = VPMAXUDZ256rmk |
| 27178 | { 14922, 8, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x779ff8004819ULL }, // Inst #14922 = VPMAXUDZ256rmbkz |
| 27179 | { 14921, 9, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x739ff8004819ULL }, // Inst #14921 = VPMAXUDZ256rmbk |
| 27180 | { 14920, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x719ff8004819ULL }, // Inst #14920 = VPMAXUDZ256rmb |
| 27181 | { 14919, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19ff8004819ULL }, // Inst #14919 = VPMAXUDZ256rm |
| 27182 | { 14918, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa69ff8004829ULL }, // Inst #14918 = VPMAXUDZ128rrkz |
| 27183 | { 14917, 5, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa29ff8004829ULL }, // Inst #14917 = VPMAXUDZ128rrk |
| 27184 | { 14916, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09ff8004829ULL }, // Inst #14916 = VPMAXUDZ128rr |
| 27185 | { 14915, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa69ff8004819ULL }, // Inst #14915 = VPMAXUDZ128rmkz |
| 27186 | { 14914, 9, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa29ff8004819ULL }, // Inst #14914 = VPMAXUDZ128rmk |
| 27187 | { 14913, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x769ff8004819ULL }, // Inst #14913 = VPMAXUDZ128rmbkz |
| 27188 | { 14912, 9, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x729ff8004819ULL }, // Inst #14912 = VPMAXUDZ128rmbk |
| 27189 | { 14911, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x709ff8004819ULL }, // Inst #14911 = VPMAXUDZ128rmb |
| 27190 | { 14910, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09ff8004819ULL }, // Inst #14910 = VPMAXUDZ128rm |
| 27191 | { 14909, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x19fb8004829ULL }, // Inst #14909 = VPMAXUDYrr |
| 27192 | { 14908, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19fb8004819ULL }, // Inst #14908 = VPMAXUDYrm |
| 27193 | { 14907, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xef38002829ULL }, // Inst #14907 = VPMAXUBrr |
| 27194 | { 14906, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xef38002819ULL }, // Inst #14906 = VPMAXUBrm |
| 27195 | { 14905, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4590, 0|(1ULL<<MCID::Commutable), 0xeeef78002829ULL }, // Inst #14905 = VPMAXUBZrrkz |
| 27196 | { 14904, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xeaef78002829ULL }, // Inst #14904 = VPMAXUBZrrk |
| 27197 | { 14903, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8ef78002829ULL }, // Inst #14903 = VPMAXUBZrr |
| 27198 | { 14902, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeeef78002819ULL }, // Inst #14902 = VPMAXUBZrmkz |
| 27199 | { 14901, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeaef78002819ULL }, // Inst #14901 = VPMAXUBZrmk |
| 27200 | { 14900, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ef78002819ULL }, // Inst #14900 = VPMAXUBZrm |
| 27201 | { 14899, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4564, 0|(1ULL<<MCID::Commutable), 0xc7ef78002829ULL }, // Inst #14899 = VPMAXUBZ256rrkz |
| 27202 | { 14898, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc3ef78002829ULL }, // Inst #14898 = VPMAXUBZ256rrk |
| 27203 | { 14897, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1ef78002829ULL }, // Inst #14897 = VPMAXUBZ256rr |
| 27204 | { 14896, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7ef78002819ULL }, // Inst #14896 = VPMAXUBZ256rmkz |
| 27205 | { 14895, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3ef78002819ULL }, // Inst #14895 = VPMAXUBZ256rmk |
| 27206 | { 14894, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ef78002819ULL }, // Inst #14894 = VPMAXUBZ256rm |
| 27207 | { 14893, 4, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 4538, 0|(1ULL<<MCID::Commutable), 0xa6ef78002829ULL }, // Inst #14893 = VPMAXUBZ128rrkz |
| 27208 | { 14892, 5, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa2ef78002829ULL }, // Inst #14892 = VPMAXUBZ128rrk |
| 27209 | { 14891, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0ef78002829ULL }, // Inst #14891 = VPMAXUBZ128rr |
| 27210 | { 14890, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6ef78002819ULL }, // Inst #14890 = VPMAXUBZ128rmkz |
| 27211 | { 14889, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2ef78002819ULL }, // Inst #14889 = VPMAXUBZ128rmk |
| 27212 | { 14888, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ef78002819ULL }, // Inst #14888 = VPMAXUBZ128rm |
| 27213 | { 14887, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1ef38002829ULL }, // Inst #14887 = VPMAXUBYrr |
| 27214 | { 14886, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ef38002819ULL }, // Inst #14886 = VPMAXUBYrm |
| 27215 | { 14885, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xf738002829ULL }, // Inst #14885 = VPMAXSWrr |
| 27216 | { 14884, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf738002819ULL }, // Inst #14884 = VPMAXSWrm |
| 27217 | { 14883, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xeef778002829ULL }, // Inst #14883 = VPMAXSWZrrkz |
| 27218 | { 14882, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeaf778002829ULL }, // Inst #14882 = VPMAXSWZrrk |
| 27219 | { 14881, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f778002829ULL }, // Inst #14881 = VPMAXSWZrr |
| 27220 | { 14880, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeef778002819ULL }, // Inst #14880 = VPMAXSWZrmkz |
| 27221 | { 14879, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeaf778002819ULL }, // Inst #14879 = VPMAXSWZrmk |
| 27222 | { 14878, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f778002819ULL }, // Inst #14878 = VPMAXSWZrm |
| 27223 | { 14877, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc7f778002829ULL }, // Inst #14877 = VPMAXSWZ256rrkz |
| 27224 | { 14876, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc3f778002829ULL }, // Inst #14876 = VPMAXSWZ256rrk |
| 27225 | { 14875, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f778002829ULL }, // Inst #14875 = VPMAXSWZ256rr |
| 27226 | { 14874, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7f778002819ULL }, // Inst #14874 = VPMAXSWZ256rmkz |
| 27227 | { 14873, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3f778002819ULL }, // Inst #14873 = VPMAXSWZ256rmk |
| 27228 | { 14872, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f778002819ULL }, // Inst #14872 = VPMAXSWZ256rm |
| 27229 | { 14871, 4, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa6f778002829ULL }, // Inst #14871 = VPMAXSWZ128rrkz |
| 27230 | { 14870, 5, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa2f778002829ULL }, // Inst #14870 = VPMAXSWZ128rrk |
| 27231 | { 14869, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f778002829ULL }, // Inst #14869 = VPMAXSWZ128rr |
| 27232 | { 14868, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6f778002819ULL }, // Inst #14868 = VPMAXSWZ128rmkz |
| 27233 | { 14867, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2f778002819ULL }, // Inst #14867 = VPMAXSWZ128rmk |
| 27234 | { 14866, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f778002819ULL }, // Inst #14866 = VPMAXSWZ128rm |
| 27235 | { 14865, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1f738002829ULL }, // Inst #14865 = VPMAXSWYrr |
| 27236 | { 14864, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f738002819ULL }, // Inst #14864 = VPMAXSWYrm |
| 27237 | { 14863, 4, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xee9ef8024829ULL }, // Inst #14863 = VPMAXSQZrrkz |
| 27238 | { 14862, 5, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xea9ef8024829ULL }, // Inst #14862 = VPMAXSQZrrk |
| 27239 | { 14861, 3, 1, 0, 1120, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89ef8024829ULL }, // Inst #14861 = VPMAXSQZrr |
| 27240 | { 14860, 8, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee9ef8024819ULL }, // Inst #14860 = VPMAXSQZrmkz |
| 27241 | { 14859, 9, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea9ef8024819ULL }, // Inst #14859 = VPMAXSQZrmk |
| 27242 | { 14858, 8, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e9ef8024819ULL }, // Inst #14858 = VPMAXSQZrmbkz |
| 27243 | { 14857, 9, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a9ef8024819ULL }, // Inst #14857 = VPMAXSQZrmbk |
| 27244 | { 14856, 7, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x989ef8024819ULL }, // Inst #14856 = VPMAXSQZrmb |
| 27245 | { 14855, 7, 1, 0, 1344, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89ef8024819ULL }, // Inst #14855 = VPMAXSQZrm |
| 27246 | { 14854, 4, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc79ef8024829ULL }, // Inst #14854 = VPMAXSQZ256rrkz |
| 27247 | { 14853, 5, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc39ef8024829ULL }, // Inst #14853 = VPMAXSQZ256rrk |
| 27248 | { 14852, 3, 1, 0, 1119, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19ef8024829ULL }, // Inst #14852 = VPMAXSQZ256rr |
| 27249 | { 14851, 8, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc79ef8024819ULL }, // Inst #14851 = VPMAXSQZ256rmkz |
| 27250 | { 14850, 9, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc39ef8024819ULL }, // Inst #14850 = VPMAXSQZ256rmk |
| 27251 | { 14849, 8, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x979ef8024819ULL }, // Inst #14849 = VPMAXSQZ256rmbkz |
| 27252 | { 14848, 9, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x939ef8024819ULL }, // Inst #14848 = VPMAXSQZ256rmbk |
| 27253 | { 14847, 7, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x919ef8024819ULL }, // Inst #14847 = VPMAXSQZ256rmb |
| 27254 | { 14846, 7, 1, 0, 1343, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19ef8024819ULL }, // Inst #14846 = VPMAXSQZ256rm |
| 27255 | { 14845, 4, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa69ef8024829ULL }, // Inst #14845 = VPMAXSQZ128rrkz |
| 27256 | { 14844, 5, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa29ef8024829ULL }, // Inst #14844 = VPMAXSQZ128rrk |
| 27257 | { 14843, 3, 1, 0, 1118, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09ef8024829ULL }, // Inst #14843 = VPMAXSQZ128rr |
| 27258 | { 14842, 8, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa69ef8024819ULL }, // Inst #14842 = VPMAXSQZ128rmkz |
| 27259 | { 14841, 9, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa29ef8024819ULL }, // Inst #14841 = VPMAXSQZ128rmk |
| 27260 | { 14840, 8, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x969ef8024819ULL }, // Inst #14840 = VPMAXSQZ128rmbkz |
| 27261 | { 14839, 9, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x929ef8024819ULL }, // Inst #14839 = VPMAXSQZ128rmbk |
| 27262 | { 14838, 7, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x909ef8024819ULL }, // Inst #14838 = VPMAXSQZ128rmb |
| 27263 | { 14837, 7, 1, 0, 1335, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09ef8024819ULL }, // Inst #14837 = VPMAXSQZ128rm |
| 27264 | { 14836, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x9eb8004829ULL }, // Inst #14836 = VPMAXSDrr |
| 27265 | { 14835, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9eb8004819ULL }, // Inst #14835 = VPMAXSDrm |
| 27266 | { 14834, 4, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xee9ef8004829ULL }, // Inst #14834 = VPMAXSDZrrkz |
| 27267 | { 14833, 5, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xea9ef8004829ULL }, // Inst #14833 = VPMAXSDZrrk |
| 27268 | { 14832, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89ef8004829ULL }, // Inst #14832 = VPMAXSDZrr |
| 27269 | { 14831, 8, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee9ef8004819ULL }, // Inst #14831 = VPMAXSDZrmkz |
| 27270 | { 14830, 9, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea9ef8004819ULL }, // Inst #14830 = VPMAXSDZrmk |
| 27271 | { 14829, 8, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e9ef8004819ULL }, // Inst #14829 = VPMAXSDZrmbkz |
| 27272 | { 14828, 9, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a9ef8004819ULL }, // Inst #14828 = VPMAXSDZrmbk |
| 27273 | { 14827, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x789ef8004819ULL }, // Inst #14827 = VPMAXSDZrmb |
| 27274 | { 14826, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89ef8004819ULL }, // Inst #14826 = VPMAXSDZrm |
| 27275 | { 14825, 4, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc79ef8004829ULL }, // Inst #14825 = VPMAXSDZ256rrkz |
| 27276 | { 14824, 5, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc39ef8004829ULL }, // Inst #14824 = VPMAXSDZ256rrk |
| 27277 | { 14823, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19ef8004829ULL }, // Inst #14823 = VPMAXSDZ256rr |
| 27278 | { 14822, 8, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc79ef8004819ULL }, // Inst #14822 = VPMAXSDZ256rmkz |
| 27279 | { 14821, 9, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc39ef8004819ULL }, // Inst #14821 = VPMAXSDZ256rmk |
| 27280 | { 14820, 8, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x779ef8004819ULL }, // Inst #14820 = VPMAXSDZ256rmbkz |
| 27281 | { 14819, 9, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x739ef8004819ULL }, // Inst #14819 = VPMAXSDZ256rmbk |
| 27282 | { 14818, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x719ef8004819ULL }, // Inst #14818 = VPMAXSDZ256rmb |
| 27283 | { 14817, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19ef8004819ULL }, // Inst #14817 = VPMAXSDZ256rm |
| 27284 | { 14816, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa69ef8004829ULL }, // Inst #14816 = VPMAXSDZ128rrkz |
| 27285 | { 14815, 5, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa29ef8004829ULL }, // Inst #14815 = VPMAXSDZ128rrk |
| 27286 | { 14814, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09ef8004829ULL }, // Inst #14814 = VPMAXSDZ128rr |
| 27287 | { 14813, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa69ef8004819ULL }, // Inst #14813 = VPMAXSDZ128rmkz |
| 27288 | { 14812, 9, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa29ef8004819ULL }, // Inst #14812 = VPMAXSDZ128rmk |
| 27289 | { 14811, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x769ef8004819ULL }, // Inst #14811 = VPMAXSDZ128rmbkz |
| 27290 | { 14810, 9, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x729ef8004819ULL }, // Inst #14810 = VPMAXSDZ128rmbk |
| 27291 | { 14809, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x709ef8004819ULL }, // Inst #14809 = VPMAXSDZ128rmb |
| 27292 | { 14808, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09ef8004819ULL }, // Inst #14808 = VPMAXSDZ128rm |
| 27293 | { 14807, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x19eb8004829ULL }, // Inst #14807 = VPMAXSDYrr |
| 27294 | { 14806, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19eb8004819ULL }, // Inst #14806 = VPMAXSDYrm |
| 27295 | { 14805, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x9e38004829ULL }, // Inst #14805 = VPMAXSBrr |
| 27296 | { 14804, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9e38004819ULL }, // Inst #14804 = VPMAXSBrm |
| 27297 | { 14803, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4590, 0|(1ULL<<MCID::Commutable), 0xee9e78004829ULL }, // Inst #14803 = VPMAXSBZrrkz |
| 27298 | { 14802, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xea9e78004829ULL }, // Inst #14802 = VPMAXSBZrrk |
| 27299 | { 14801, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe89e78004829ULL }, // Inst #14801 = VPMAXSBZrr |
| 27300 | { 14800, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xee9e78004819ULL }, // Inst #14800 = VPMAXSBZrmkz |
| 27301 | { 14799, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xea9e78004819ULL }, // Inst #14799 = VPMAXSBZrmk |
| 27302 | { 14798, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89e78004819ULL }, // Inst #14798 = VPMAXSBZrm |
| 27303 | { 14797, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4564, 0|(1ULL<<MCID::Commutable), 0xc79e78004829ULL }, // Inst #14797 = VPMAXSBZ256rrkz |
| 27304 | { 14796, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc39e78004829ULL }, // Inst #14796 = VPMAXSBZ256rrk |
| 27305 | { 14795, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc19e78004829ULL }, // Inst #14795 = VPMAXSBZ256rr |
| 27306 | { 14794, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc79e78004819ULL }, // Inst #14794 = VPMAXSBZ256rmkz |
| 27307 | { 14793, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc39e78004819ULL }, // Inst #14793 = VPMAXSBZ256rmk |
| 27308 | { 14792, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19e78004819ULL }, // Inst #14792 = VPMAXSBZ256rm |
| 27309 | { 14791, 4, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 4538, 0|(1ULL<<MCID::Commutable), 0xa69e78004829ULL }, // Inst #14791 = VPMAXSBZ128rrkz |
| 27310 | { 14790, 5, 1, 0, 2252, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa29e78004829ULL }, // Inst #14790 = VPMAXSBZ128rrk |
| 27311 | { 14789, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa09e78004829ULL }, // Inst #14789 = VPMAXSBZ128rr |
| 27312 | { 14788, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa69e78004819ULL }, // Inst #14788 = VPMAXSBZ128rmkz |
| 27313 | { 14787, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa29e78004819ULL }, // Inst #14787 = VPMAXSBZ128rmk |
| 27314 | { 14786, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa09e78004819ULL }, // Inst #14786 = VPMAXSBZ128rm |
| 27315 | { 14785, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x19e38004829ULL }, // Inst #14785 = VPMAXSBYrr |
| 27316 | { 14784, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19e38004819ULL }, // Inst #14784 = VPMAXSBYrm |
| 27317 | { 14783, 7, 1, 0, 534, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xc638024819ULL }, // Inst #14783 = VPMASKMOVQrm |
| 27318 | { 14782, 7, 0, 0, 954, 0, 0, X86ImpOpBase + 0, 4683, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc738024818ULL }, // Inst #14782 = VPMASKMOVQmr |
| 27319 | { 14781, 7, 1, 0, 532, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1c638024819ULL }, // Inst #14781 = VPMASKMOVQYrm |
| 27320 | { 14780, 7, 0, 0, 953, 0, 0, X86ImpOpBase + 0, 4676, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1c738024818ULL }, // Inst #14780 = VPMASKMOVQYmr |
| 27321 | { 14779, 7, 1, 0, 950, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xc638004819ULL }, // Inst #14779 = VPMASKMOVDrm |
| 27322 | { 14778, 7, 0, 0, 952, 0, 0, X86ImpOpBase + 0, 4683, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc738004818ULL }, // Inst #14778 = VPMASKMOVDmr |
| 27323 | { 14777, 7, 1, 0, 949, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1c638004819ULL }, // Inst #14777 = VPMASKMOVDYrm |
| 27324 | { 14776, 7, 0, 0, 951, 0, 0, X86ImpOpBase + 0, 4676, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1c738004818ULL }, // Inst #14776 = VPMASKMOVDYmr |
| 27325 | { 14775, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xfab8002829ULL }, // Inst #14775 = VPMADDWDrr |
| 27326 | { 14774, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xfab8002819ULL }, // Inst #14774 = VPMADDWDrm |
| 27327 | { 14773, 4, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xeefaf8002829ULL }, // Inst #14773 = VPMADDWDZrrkz |
| 27328 | { 14772, 5, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeafaf8002829ULL }, // Inst #14772 = VPMADDWDZrrk |
| 27329 | { 14771, 3, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8faf8002829ULL }, // Inst #14771 = VPMADDWDZrr |
| 27330 | { 14770, 8, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeefaf8002819ULL }, // Inst #14770 = VPMADDWDZrmkz |
| 27331 | { 14769, 9, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeafaf8002819ULL }, // Inst #14769 = VPMADDWDZrmk |
| 27332 | { 14768, 7, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8faf8002819ULL }, // Inst #14768 = VPMADDWDZrm |
| 27333 | { 14767, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc7faf8002829ULL }, // Inst #14767 = VPMADDWDZ256rrkz |
| 27334 | { 14766, 5, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3faf8002829ULL }, // Inst #14766 = VPMADDWDZ256rrk |
| 27335 | { 14765, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1faf8002829ULL }, // Inst #14765 = VPMADDWDZ256rr |
| 27336 | { 14764, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7faf8002819ULL }, // Inst #14764 = VPMADDWDZ256rmkz |
| 27337 | { 14763, 9, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3faf8002819ULL }, // Inst #14763 = VPMADDWDZ256rmk |
| 27338 | { 14762, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1faf8002819ULL }, // Inst #14762 = VPMADDWDZ256rm |
| 27339 | { 14761, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa6faf8002829ULL }, // Inst #14761 = VPMADDWDZ128rrkz |
| 27340 | { 14760, 5, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2faf8002829ULL }, // Inst #14760 = VPMADDWDZ128rrk |
| 27341 | { 14759, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0faf8002829ULL }, // Inst #14759 = VPMADDWDZ128rr |
| 27342 | { 14758, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6faf8002819ULL }, // Inst #14758 = VPMADDWDZ128rmkz |
| 27343 | { 14757, 9, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2faf8002819ULL }, // Inst #14757 = VPMADDWDZ128rmk |
| 27344 | { 14756, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0faf8002819ULL }, // Inst #14756 = VPMADDWDZ128rm |
| 27345 | { 14755, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1fab8002829ULL }, // Inst #14755 = VPMADDWDYrr |
| 27346 | { 14754, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1fab8002819ULL }, // Inst #14754 = VPMADDWDYrm |
| 27347 | { 14753, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8238004829ULL }, // Inst #14753 = VPMADDUBSWrr |
| 27348 | { 14752, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8238004819ULL }, // Inst #14752 = VPMADDUBSWrm |
| 27349 | { 14751, 4, 1, 0, 2315, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xee8278004829ULL }, // Inst #14751 = VPMADDUBSWZrrkz |
| 27350 | { 14750, 5, 1, 0, 2315, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xea8278004829ULL }, // Inst #14750 = VPMADDUBSWZrrk |
| 27351 | { 14749, 3, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88278004829ULL }, // Inst #14749 = VPMADDUBSWZrr |
| 27352 | { 14748, 8, 1, 0, 2314, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xee8278004819ULL }, // Inst #14748 = VPMADDUBSWZrmkz |
| 27353 | { 14747, 9, 1, 0, 2314, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xea8278004819ULL }, // Inst #14747 = VPMADDUBSWZrmk |
| 27354 | { 14746, 7, 1, 0, 451, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88278004819ULL }, // Inst #14746 = VPMADDUBSWZrm |
| 27355 | { 14745, 4, 1, 0, 2313, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc78278004829ULL }, // Inst #14745 = VPMADDUBSWZ256rrkz |
| 27356 | { 14744, 5, 1, 0, 2313, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc38278004829ULL }, // Inst #14744 = VPMADDUBSWZ256rrk |
| 27357 | { 14743, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18278004829ULL }, // Inst #14743 = VPMADDUBSWZ256rr |
| 27358 | { 14742, 8, 1, 0, 2075, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc78278004819ULL }, // Inst #14742 = VPMADDUBSWZ256rmkz |
| 27359 | { 14741, 9, 1, 0, 2075, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc38278004819ULL }, // Inst #14741 = VPMADDUBSWZ256rmk |
| 27360 | { 14740, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18278004819ULL }, // Inst #14740 = VPMADDUBSWZ256rm |
| 27361 | { 14739, 4, 1, 0, 2312, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa68278004829ULL }, // Inst #14739 = VPMADDUBSWZ128rrkz |
| 27362 | { 14738, 5, 1, 0, 2312, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa28278004829ULL }, // Inst #14738 = VPMADDUBSWZ128rrk |
| 27363 | { 14737, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08278004829ULL }, // Inst #14737 = VPMADDUBSWZ128rr |
| 27364 | { 14736, 8, 1, 0, 2074, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa68278004819ULL }, // Inst #14736 = VPMADDUBSWZ128rmkz |
| 27365 | { 14735, 9, 1, 0, 2074, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa28278004819ULL }, // Inst #14735 = VPMADDUBSWZ128rmk |
| 27366 | { 14734, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08278004819ULL }, // Inst #14734 = VPMADDUBSWZ128rm |
| 27367 | { 14733, 3, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18238004829ULL }, // Inst #14733 = VPMADDUBSWYrr |
| 27368 | { 14732, 7, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18238004819ULL }, // Inst #14732 = VPMADDUBSWYrm |
| 27369 | { 14731, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0|(1ULL<<MCID::Commutable), 0x800da38024829ULL }, // Inst #14731 = VPMADD52LUQrr |
| 27370 | { 14730, 8, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0x800da38024819ULL }, // Inst #14730 = VPMADD52LUQrm |
| 27371 | { 14729, 5, 1, 0, 1827, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeeda78024829ULL }, // Inst #14729 = VPMADD52LUQZrkz |
| 27372 | { 14728, 5, 1, 0, 1827, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeada78024829ULL }, // Inst #14728 = VPMADD52LUQZrk |
| 27373 | { 14727, 4, 1, 0, 1827, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8da78024829ULL }, // Inst #14727 = VPMADD52LUQZr |
| 27374 | { 14726, 9, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeeda78024819ULL }, // Inst #14726 = VPMADD52LUQZmkz |
| 27375 | { 14725, 9, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeada78024819ULL }, // Inst #14725 = VPMADD52LUQZmk |
| 27376 | { 14724, 9, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9eda78024819ULL }, // Inst #14724 = VPMADD52LUQZmbkz |
| 27377 | { 14723, 9, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9ada78024819ULL }, // Inst #14723 = VPMADD52LUQZmbk |
| 27378 | { 14722, 8, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x98da78024819ULL }, // Inst #14722 = VPMADD52LUQZmb |
| 27379 | { 14721, 8, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8da78024819ULL }, // Inst #14721 = VPMADD52LUQZm |
| 27380 | { 14720, 5, 1, 0, 2031, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc7da78024829ULL }, // Inst #14720 = VPMADD52LUQZ256rkz |
| 27381 | { 14719, 5, 1, 0, 2031, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3da78024829ULL }, // Inst #14719 = VPMADD52LUQZ256rk |
| 27382 | { 14718, 4, 1, 0, 2031, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1da78024829ULL }, // Inst #14718 = VPMADD52LUQZ256r |
| 27383 | { 14717, 9, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc7da78024819ULL }, // Inst #14717 = VPMADD52LUQZ256mkz |
| 27384 | { 14716, 9, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3da78024819ULL }, // Inst #14716 = VPMADD52LUQZ256mk |
| 27385 | { 14715, 9, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x97da78024819ULL }, // Inst #14715 = VPMADD52LUQZ256mbkz |
| 27386 | { 14714, 9, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93da78024819ULL }, // Inst #14714 = VPMADD52LUQZ256mbk |
| 27387 | { 14713, 8, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x91da78024819ULL }, // Inst #14713 = VPMADD52LUQZ256mb |
| 27388 | { 14712, 8, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1da78024819ULL }, // Inst #14712 = VPMADD52LUQZ256m |
| 27389 | { 14711, 5, 1, 0, 2030, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa6da78024829ULL }, // Inst #14711 = VPMADD52LUQZ128rkz |
| 27390 | { 14710, 5, 1, 0, 2030, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2da78024829ULL }, // Inst #14710 = VPMADD52LUQZ128rk |
| 27391 | { 14709, 4, 1, 0, 2030, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0da78024829ULL }, // Inst #14709 = VPMADD52LUQZ128r |
| 27392 | { 14708, 9, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa6da78024819ULL }, // Inst #14708 = VPMADD52LUQZ128mkz |
| 27393 | { 14707, 9, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2da78024819ULL }, // Inst #14707 = VPMADD52LUQZ128mk |
| 27394 | { 14706, 9, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x96da78024819ULL }, // Inst #14706 = VPMADD52LUQZ128mbkz |
| 27395 | { 14705, 9, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92da78024819ULL }, // Inst #14705 = VPMADD52LUQZ128mbk |
| 27396 | { 14704, 8, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x90da78024819ULL }, // Inst #14704 = VPMADD52LUQZ128mb |
| 27397 | { 14703, 8, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0da78024819ULL }, // Inst #14703 = VPMADD52LUQZ128m |
| 27398 | { 14702, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0|(1ULL<<MCID::Commutable), 0x801da38024829ULL }, // Inst #14702 = VPMADD52LUQYrr |
| 27399 | { 14701, 8, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x801da38024819ULL }, // Inst #14701 = VPMADD52LUQYrm |
| 27400 | { 14700, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0|(1ULL<<MCID::Commutable), 0x800dab8024829ULL }, // Inst #14700 = VPMADD52HUQrr |
| 27401 | { 14699, 8, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0x800dab8024819ULL }, // Inst #14699 = VPMADD52HUQrm |
| 27402 | { 14698, 5, 1, 0, 1827, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeedaf8024829ULL }, // Inst #14698 = VPMADD52HUQZrkz |
| 27403 | { 14697, 5, 1, 0, 1827, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeadaf8024829ULL }, // Inst #14697 = VPMADD52HUQZrk |
| 27404 | { 14696, 4, 1, 0, 1827, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8daf8024829ULL }, // Inst #14696 = VPMADD52HUQZr |
| 27405 | { 14695, 9, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeedaf8024819ULL }, // Inst #14695 = VPMADD52HUQZmkz |
| 27406 | { 14694, 9, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeadaf8024819ULL }, // Inst #14694 = VPMADD52HUQZmk |
| 27407 | { 14693, 9, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9edaf8024819ULL }, // Inst #14693 = VPMADD52HUQZmbkz |
| 27408 | { 14692, 9, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9adaf8024819ULL }, // Inst #14692 = VPMADD52HUQZmbk |
| 27409 | { 14691, 8, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x98daf8024819ULL }, // Inst #14691 = VPMADD52HUQZmb |
| 27410 | { 14690, 8, 1, 0, 1910, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8daf8024819ULL }, // Inst #14690 = VPMADD52HUQZm |
| 27411 | { 14689, 5, 1, 0, 2031, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc7daf8024829ULL }, // Inst #14689 = VPMADD52HUQZ256rkz |
| 27412 | { 14688, 5, 1, 0, 2031, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3daf8024829ULL }, // Inst #14688 = VPMADD52HUQZ256rk |
| 27413 | { 14687, 4, 1, 0, 2031, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1daf8024829ULL }, // Inst #14687 = VPMADD52HUQZ256r |
| 27414 | { 14686, 9, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc7daf8024819ULL }, // Inst #14686 = VPMADD52HUQZ256mkz |
| 27415 | { 14685, 9, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3daf8024819ULL }, // Inst #14685 = VPMADD52HUQZ256mk |
| 27416 | { 14684, 9, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x97daf8024819ULL }, // Inst #14684 = VPMADD52HUQZ256mbkz |
| 27417 | { 14683, 9, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93daf8024819ULL }, // Inst #14683 = VPMADD52HUQZ256mbk |
| 27418 | { 14682, 8, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x91daf8024819ULL }, // Inst #14682 = VPMADD52HUQZ256mb |
| 27419 | { 14681, 8, 1, 0, 1733, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1daf8024819ULL }, // Inst #14681 = VPMADD52HUQZ256m |
| 27420 | { 14680, 5, 1, 0, 2030, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa6daf8024829ULL }, // Inst #14680 = VPMADD52HUQZ128rkz |
| 27421 | { 14679, 5, 1, 0, 2030, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2daf8024829ULL }, // Inst #14679 = VPMADD52HUQZ128rk |
| 27422 | { 14678, 4, 1, 0, 2030, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0daf8024829ULL }, // Inst #14678 = VPMADD52HUQZ128r |
| 27423 | { 14677, 9, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa6daf8024819ULL }, // Inst #14677 = VPMADD52HUQZ128mkz |
| 27424 | { 14676, 9, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2daf8024819ULL }, // Inst #14676 = VPMADD52HUQZ128mk |
| 27425 | { 14675, 9, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x96daf8024819ULL }, // Inst #14675 = VPMADD52HUQZ128mbkz |
| 27426 | { 14674, 9, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92daf8024819ULL }, // Inst #14674 = VPMADD52HUQZ128mbk |
| 27427 | { 14673, 8, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x90daf8024819ULL }, // Inst #14673 = VPMADD52HUQZ128mb |
| 27428 | { 14672, 8, 1, 0, 2024, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0daf8024819ULL }, // Inst #14672 = VPMADD52HUQZ128m |
| 27429 | { 14671, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0|(1ULL<<MCID::Commutable), 0x801dab8024829ULL }, // Inst #14671 = VPMADD52HUQYrr |
| 27430 | { 14670, 8, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x801dab8024819ULL }, // Inst #14670 = VPMADD52HUQYrm |
| 27431 | { 14669, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xdb580c8029ULL }, // Inst #14669 = VPMADCSWDrr |
| 27432 | { 14668, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xdb580c8019ULL }, // Inst #14668 = VPMADCSWDrm |
| 27433 | { 14667, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xd3580c8029ULL }, // Inst #14667 = VPMADCSSWDrr |
| 27434 | { 14666, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xd3580c8019ULL }, // Inst #14666 = VPMADCSSWDrm |
| 27435 | { 14665, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xcad80c8029ULL }, // Inst #14665 = VPMACSWWrr |
| 27436 | { 14664, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xcad80c8019ULL }, // Inst #14664 = VPMACSWWrm |
| 27437 | { 14663, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xcb580c8029ULL }, // Inst #14663 = VPMACSWDrr |
| 27438 | { 14662, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xcb580c8019ULL }, // Inst #14662 = VPMACSWDrm |
| 27439 | { 14661, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xc2d80c8029ULL }, // Inst #14661 = VPMACSSWWrr |
| 27440 | { 14660, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xc2d80c8019ULL }, // Inst #14660 = VPMACSSWWrm |
| 27441 | { 14659, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xc3580c8029ULL }, // Inst #14659 = VPMACSSWDrr |
| 27442 | { 14658, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xc3580c8019ULL }, // Inst #14658 = VPMACSSWDrm |
| 27443 | { 14657, 4, 1, 0, 1182, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xc3d80c8029ULL }, // Inst #14657 = VPMACSSDQLrr |
| 27444 | { 14656, 8, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xc3d80c8019ULL }, // Inst #14656 = VPMACSSDQLrm |
| 27445 | { 14655, 4, 1, 0, 1182, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xc7d80c8029ULL }, // Inst #14655 = VPMACSSDQHrr |
| 27446 | { 14654, 8, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xc7d80c8019ULL }, // Inst #14654 = VPMACSSDQHrm |
| 27447 | { 14653, 4, 1, 0, 276, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xc7580c8029ULL }, // Inst #14653 = VPMACSSDDrr |
| 27448 | { 14652, 8, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xc7580c8019ULL }, // Inst #14652 = VPMACSSDDrm |
| 27449 | { 14651, 4, 1, 0, 1182, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xcbd80c8029ULL }, // Inst #14651 = VPMACSDQLrr |
| 27450 | { 14650, 8, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xcbd80c8019ULL }, // Inst #14650 = VPMACSDQLrm |
| 27451 | { 14649, 4, 1, 0, 1182, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xcfd80c8029ULL }, // Inst #14649 = VPMACSDQHrr |
| 27452 | { 14648, 8, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xcfd80c8019ULL }, // Inst #14648 = VPMACSDQHrm |
| 27453 | { 14647, 4, 1, 0, 276, 0, 0, X86ImpOpBase + 0, 2231, 0|(1ULL<<MCID::Commutable), 0xcf580c8029ULL }, // Inst #14647 = VPMACSDDrr |
| 27454 | { 14646, 8, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xcf580c8019ULL }, // Inst #14646 = VPMACSDDrm |
| 27455 | { 14645, 3, 1, 0, 1826, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee2278024829ULL }, // Inst #14645 = VPLZCNTQZrrkz |
| 27456 | { 14644, 4, 1, 0, 1826, 0, 0, X86ImpOpBase + 0, 2740, 0, 0xea2278024829ULL }, // Inst #14644 = VPLZCNTQZrrk |
| 27457 | { 14643, 2, 1, 0, 1826, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe82278024829ULL }, // Inst #14643 = VPLZCNTQZrr |
| 27458 | { 14642, 7, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xee2278024819ULL }, // Inst #14642 = VPLZCNTQZrmkz |
| 27459 | { 14641, 8, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xea2278024819ULL }, // Inst #14641 = VPLZCNTQZrmk |
| 27460 | { 14640, 7, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x9e2278024819ULL }, // Inst #14640 = VPLZCNTQZrmbkz |
| 27461 | { 14639, 8, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0x9a2278024819ULL }, // Inst #14639 = VPLZCNTQZrmbk |
| 27462 | { 14638, 6, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x982278024819ULL }, // Inst #14638 = VPLZCNTQZrmb |
| 27463 | { 14637, 6, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82278024819ULL }, // Inst #14637 = VPLZCNTQZrm |
| 27464 | { 14636, 3, 1, 0, 2029, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc72278024829ULL }, // Inst #14636 = VPLZCNTQZ256rrkz |
| 27465 | { 14635, 4, 1, 0, 2029, 0, 0, X86ImpOpBase + 0, 2718, 0, 0xc32278024829ULL }, // Inst #14635 = VPLZCNTQZ256rrk |
| 27466 | { 14634, 2, 1, 0, 2029, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc12278024829ULL }, // Inst #14634 = VPLZCNTQZ256rr |
| 27467 | { 14633, 7, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xc72278024819ULL }, // Inst #14633 = VPLZCNTQZ256rmkz |
| 27468 | { 14632, 8, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xc32278024819ULL }, // Inst #14632 = VPLZCNTQZ256rmk |
| 27469 | { 14631, 7, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x972278024819ULL }, // Inst #14631 = VPLZCNTQZ256rmbkz |
| 27470 | { 14630, 8, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x932278024819ULL }, // Inst #14630 = VPLZCNTQZ256rmbk |
| 27471 | { 14629, 6, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x912278024819ULL }, // Inst #14629 = VPLZCNTQZ256rmb |
| 27472 | { 14628, 6, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc12278024819ULL }, // Inst #14628 = VPLZCNTQZ256rm |
| 27473 | { 14627, 3, 1, 0, 2028, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa62278024829ULL }, // Inst #14627 = VPLZCNTQZ128rrkz |
| 27474 | { 14626, 4, 1, 0, 2028, 0, 0, X86ImpOpBase + 0, 2702, 0, 0xa22278024829ULL }, // Inst #14626 = VPLZCNTQZ128rrk |
| 27475 | { 14625, 2, 1, 0, 2028, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02278024829ULL }, // Inst #14625 = VPLZCNTQZ128rr |
| 27476 | { 14624, 7, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0xa62278024819ULL }, // Inst #14624 = VPLZCNTQZ128rmkz |
| 27477 | { 14623, 8, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0xa22278024819ULL }, // Inst #14623 = VPLZCNTQZ128rmk |
| 27478 | { 14622, 7, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x962278024819ULL }, // Inst #14622 = VPLZCNTQZ128rmbkz |
| 27479 | { 14621, 8, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x922278024819ULL }, // Inst #14621 = VPLZCNTQZ128rmbk |
| 27480 | { 14620, 6, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x902278024819ULL }, // Inst #14620 = VPLZCNTQZ128rmb |
| 27481 | { 14619, 6, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa02278024819ULL }, // Inst #14619 = VPLZCNTQZ128rm |
| 27482 | { 14618, 3, 1, 0, 1826, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee2278004829ULL }, // Inst #14618 = VPLZCNTDZrrkz |
| 27483 | { 14617, 4, 1, 0, 1826, 0, 0, X86ImpOpBase + 0, 2775, 0, 0xea2278004829ULL }, // Inst #14617 = VPLZCNTDZrrk |
| 27484 | { 14616, 2, 1, 0, 1826, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe82278004829ULL }, // Inst #14616 = VPLZCNTDZrr |
| 27485 | { 14615, 7, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xee2278004819ULL }, // Inst #14615 = VPLZCNTDZrmkz |
| 27486 | { 14614, 8, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xea2278004819ULL }, // Inst #14614 = VPLZCNTDZrmk |
| 27487 | { 14613, 7, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0x7e2278004819ULL }, // Inst #14613 = VPLZCNTDZrmbkz |
| 27488 | { 14612, 8, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0x7a2278004819ULL }, // Inst #14612 = VPLZCNTDZrmbk |
| 27489 | { 14611, 6, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x782278004819ULL }, // Inst #14611 = VPLZCNTDZrmb |
| 27490 | { 14610, 6, 1, 0, 1906, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe82278004819ULL }, // Inst #14610 = VPLZCNTDZrm |
| 27491 | { 14609, 3, 1, 0, 2029, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc72278004829ULL }, // Inst #14609 = VPLZCNTDZ256rrkz |
| 27492 | { 14608, 4, 1, 0, 2029, 0, 0, X86ImpOpBase + 0, 2761, 0, 0xc32278004829ULL }, // Inst #14608 = VPLZCNTDZ256rrk |
| 27493 | { 14607, 2, 1, 0, 2029, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc12278004829ULL }, // Inst #14607 = VPLZCNTDZ256rr |
| 27494 | { 14606, 7, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xc72278004819ULL }, // Inst #14606 = VPLZCNTDZ256rmkz |
| 27495 | { 14605, 8, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0xc32278004819ULL }, // Inst #14605 = VPLZCNTDZ256rmk |
| 27496 | { 14604, 7, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x772278004819ULL }, // Inst #14604 = VPLZCNTDZ256rmbkz |
| 27497 | { 14603, 8, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0x732278004819ULL }, // Inst #14603 = VPLZCNTDZ256rmbk |
| 27498 | { 14602, 6, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x712278004819ULL }, // Inst #14602 = VPLZCNTDZ256rmb |
| 27499 | { 14601, 6, 1, 0, 1717, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc12278004819ULL }, // Inst #14601 = VPLZCNTDZ256rm |
| 27500 | { 14600, 3, 1, 0, 2028, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa62278004829ULL }, // Inst #14600 = VPLZCNTDZ128rrkz |
| 27501 | { 14599, 4, 1, 0, 2028, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa22278004829ULL }, // Inst #14599 = VPLZCNTDZ128rrk |
| 27502 | { 14598, 2, 1, 0, 2028, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02278004829ULL }, // Inst #14598 = VPLZCNTDZ128rr |
| 27503 | { 14597, 7, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa62278004819ULL }, // Inst #14597 = VPLZCNTDZ128rmkz |
| 27504 | { 14596, 8, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0xa22278004819ULL }, // Inst #14596 = VPLZCNTDZ128rmk |
| 27505 | { 14595, 7, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x762278004819ULL }, // Inst #14595 = VPLZCNTDZ128rmbkz |
| 27506 | { 14594, 8, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x722278004819ULL }, // Inst #14594 = VPLZCNTDZ128rmbk |
| 27507 | { 14593, 6, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x702278004819ULL }, // Inst #14593 = VPLZCNTDZ128rmb |
| 27508 | { 14592, 6, 1, 0, 2012, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa02278004819ULL }, // Inst #14592 = VPLZCNTDZ128rm |
| 27509 | { 14591, 4, 1, 0, 209, 0, 0, X86ImpOpBase + 0, 5451, 0, 0xe238042829ULL }, // Inst #14591 = VPINSRWrr |
| 27510 | { 14590, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xe238042819ULL }, // Inst #14590 = VPINSRWrm |
| 27511 | { 14589, 4, 1, 0, 527, 0, 0, X86ImpOpBase + 0, 5447, 0, 0xa0e278042829ULL }, // Inst #14589 = VPINSRWZrr |
| 27512 | { 14588, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x40e278042819ULL }, // Inst #14588 = VPINSRWZrm |
| 27513 | { 14587, 4, 1, 0, 209, 0, 0, X86ImpOpBase + 0, 5459, 0, 0x9138066829ULL }, // Inst #14587 = VPINSRQrr |
| 27514 | { 14586, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0x9138066819ULL }, // Inst #14586 = VPINSRQrm |
| 27515 | { 14585, 4, 1, 0, 527, 0, 0, X86ImpOpBase + 0, 5455, 0, 0xa09178066829ULL }, // Inst #14585 = VPINSRQZrr |
| 27516 | { 14584, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x809178066819ULL }, // Inst #14584 = VPINSRQZrm |
| 27517 | { 14583, 4, 1, 0, 209, 0, 0, X86ImpOpBase + 0, 5451, 0, 0x9138046829ULL }, // Inst #14583 = VPINSRDrr |
| 27518 | { 14582, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0x9138046819ULL }, // Inst #14582 = VPINSRDrm |
| 27519 | { 14581, 4, 1, 0, 527, 0, 0, X86ImpOpBase + 0, 5447, 0, 0xa09178046829ULL }, // Inst #14581 = VPINSRDZrr |
| 27520 | { 14580, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x609178046819ULL }, // Inst #14580 = VPINSRDZrm |
| 27521 | { 14579, 4, 1, 0, 209, 0, 0, X86ImpOpBase + 0, 5451, 0, 0x9038046829ULL }, // Inst #14579 = VPINSRBrr |
| 27522 | { 14578, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0x9038046819ULL }, // Inst #14578 = VPINSRBrm |
| 27523 | { 14577, 4, 1, 0, 527, 0, 0, X86ImpOpBase + 0, 5447, 0, 0xa09078046829ULL }, // Inst #14577 = VPINSRBZrr |
| 27524 | { 14576, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x209078046819ULL }, // Inst #14576 = VPINSRBZrm |
| 27525 | { 14575, 3, 1, 0, 1186, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x82b8004829ULL }, // Inst #14575 = VPHSUBWrr |
| 27526 | { 14574, 7, 1, 0, 1187, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x82b8004819ULL }, // Inst #14574 = VPHSUBWrm |
| 27527 | { 14573, 3, 1, 0, 526, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x182b8004829ULL }, // Inst #14573 = VPHSUBWYrr |
| 27528 | { 14572, 7, 1, 0, 525, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x182b8004819ULL }, // Inst #14572 = VPHSUBWYrm |
| 27529 | { 14571, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x715800a029ULL }, // Inst #14571 = VPHSUBWDrr |
| 27530 | { 14570, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x715800a019ULL }, // Inst #14570 = VPHSUBWDrm |
| 27531 | { 14569, 3, 1, 0, 1207, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x83b8004829ULL }, // Inst #14569 = VPHSUBSWrr |
| 27532 | { 14568, 7, 1, 0, 1215, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x83b8004819ULL }, // Inst #14568 = VPHSUBSWrm |
| 27533 | { 14567, 3, 1, 0, 1208, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x183b8004829ULL }, // Inst #14567 = VPHSUBSWYrr |
| 27534 | { 14566, 7, 1, 0, 1216, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x183b8004819ULL }, // Inst #14566 = VPHSUBSWYrm |
| 27535 | { 14565, 3, 1, 0, 1186, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8338004829ULL }, // Inst #14565 = VPHSUBDrr |
| 27536 | { 14564, 7, 1, 0, 1187, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8338004819ULL }, // Inst #14564 = VPHSUBDrm |
| 27537 | { 14563, 3, 1, 0, 526, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18338004829ULL }, // Inst #14563 = VPHSUBDYrr |
| 27538 | { 14562, 7, 1, 0, 525, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18338004819ULL }, // Inst #14562 = VPHSUBDYrm |
| 27539 | { 14561, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x71d800a029ULL }, // Inst #14561 = VPHSUBDQrr |
| 27540 | { 14560, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x71d800a019ULL }, // Inst #14560 = VPHSUBDQrm |
| 27541 | { 14559, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x70d800a029ULL }, // Inst #14559 = VPHSUBBWrr |
| 27542 | { 14558, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x70d800a019ULL }, // Inst #14558 = VPHSUBBWrm |
| 27543 | { 14557, 2, 1, 0, 271, 0, 0, X86ImpOpBase + 0, 535, 0, 0x20b8004829ULL }, // Inst #14557 = VPHMINPOSUWrr |
| 27544 | { 14556, 6, 1, 0, 270, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x20b8004819ULL }, // Inst #14556 = VPHMINPOSUWrm |
| 27545 | { 14555, 3, 1, 0, 1186, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x80b8004829ULL }, // Inst #14555 = VPHADDWrr |
| 27546 | { 14554, 7, 1, 0, 1187, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x80b8004819ULL }, // Inst #14554 = VPHADDWrm |
| 27547 | { 14553, 3, 1, 0, 526, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x180b8004829ULL }, // Inst #14553 = VPHADDWYrr |
| 27548 | { 14552, 7, 1, 0, 525, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x180b8004819ULL }, // Inst #14552 = VPHADDWYrm |
| 27549 | { 14551, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x63d800a029ULL }, // Inst #14551 = VPHADDWQrr |
| 27550 | { 14550, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x63d800a019ULL }, // Inst #14550 = VPHADDWQrm |
| 27551 | { 14549, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x635800a029ULL }, // Inst #14549 = VPHADDWDrr |
| 27552 | { 14548, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x635800a019ULL }, // Inst #14548 = VPHADDWDrm |
| 27553 | { 14547, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x6bd800a029ULL }, // Inst #14547 = VPHADDUWQrr |
| 27554 | { 14546, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x6bd800a019ULL }, // Inst #14546 = VPHADDUWQrm |
| 27555 | { 14545, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x6b5800a029ULL }, // Inst #14545 = VPHADDUWDrr |
| 27556 | { 14544, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x6b5800a019ULL }, // Inst #14544 = VPHADDUWDrm |
| 27557 | { 14543, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x6dd800a029ULL }, // Inst #14543 = VPHADDUDQrr |
| 27558 | { 14542, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x6dd800a019ULL }, // Inst #14542 = VPHADDUDQrm |
| 27559 | { 14541, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x68d800a029ULL }, // Inst #14541 = VPHADDUBWrr |
| 27560 | { 14540, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x68d800a019ULL }, // Inst #14540 = VPHADDUBWrm |
| 27561 | { 14539, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x69d800a029ULL }, // Inst #14539 = VPHADDUBQrr |
| 27562 | { 14538, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x69d800a019ULL }, // Inst #14538 = VPHADDUBQrm |
| 27563 | { 14537, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x695800a029ULL }, // Inst #14537 = VPHADDUBDrr |
| 27564 | { 14536, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x695800a019ULL }, // Inst #14536 = VPHADDUBDrm |
| 27565 | { 14535, 3, 1, 0, 1207, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x81b8004829ULL }, // Inst #14535 = VPHADDSWrr |
| 27566 | { 14534, 7, 1, 0, 1215, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x81b8004819ULL }, // Inst #14534 = VPHADDSWrm |
| 27567 | { 14533, 3, 1, 0, 1208, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x181b8004829ULL }, // Inst #14533 = VPHADDSWYrr |
| 27568 | { 14532, 7, 1, 0, 1216, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x181b8004819ULL }, // Inst #14532 = VPHADDSWYrm |
| 27569 | { 14531, 3, 1, 0, 1186, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8138004829ULL }, // Inst #14531 = VPHADDDrr |
| 27570 | { 14530, 7, 1, 0, 1187, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8138004819ULL }, // Inst #14530 = VPHADDDrm |
| 27571 | { 14529, 3, 1, 0, 526, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18138004829ULL }, // Inst #14529 = VPHADDDYrr |
| 27572 | { 14528, 7, 1, 0, 525, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18138004819ULL }, // Inst #14528 = VPHADDDYrm |
| 27573 | { 14527, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x65d800a029ULL }, // Inst #14527 = VPHADDDQrr |
| 27574 | { 14526, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x65d800a019ULL }, // Inst #14526 = VPHADDDQrm |
| 27575 | { 14525, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x60d800a029ULL }, // Inst #14525 = VPHADDBWrr |
| 27576 | { 14524, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x60d800a019ULL }, // Inst #14524 = VPHADDBWrm |
| 27577 | { 14523, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x61d800a029ULL }, // Inst #14523 = VPHADDBQrr |
| 27578 | { 14522, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x61d800a019ULL }, // Inst #14522 = VPHADDBQrm |
| 27579 | { 14521, 2, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 535, 0, 0x615800a029ULL }, // Inst #14521 = VPHADDBDrr |
| 27580 | { 14520, 6, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x615800a019ULL }, // Inst #14520 = VPHADDBDrm |
| 27581 | { 14519, 9, 2, 0, 963, 0, 0, X86ImpOpBase + 0, 4052, 0|(1ULL<<MCID::MayLoad), 0x48b802481aULL }, // Inst #14519 = VPGATHERQQrm |
| 27582 | { 14518, 9, 2, 0, 2198, 0, 0, X86ImpOpBase + 0, 4124, 0|(1ULL<<MCID::MayLoad), 0x8a48f8024819ULL }, // Inst #14518 = VPGATHERQQZrm |
| 27583 | { 14517, 9, 2, 0, 2196, 0, 0, X86ImpOpBase + 0, 4115, 0|(1ULL<<MCID::MayLoad), 0x8348f8024819ULL }, // Inst #14517 = VPGATHERQQZ256rm |
| 27584 | { 14516, 9, 2, 0, 2195, 0, 0, X86ImpOpBase + 0, 4025, 0|(1ULL<<MCID::MayLoad), 0x8248f8024819ULL }, // Inst #14516 = VPGATHERQQZ128rm |
| 27585 | { 14515, 9, 2, 0, 962, 0, 0, X86ImpOpBase + 0, 4061, 0|(1ULL<<MCID::MayLoad), 0x148b802481aULL }, // Inst #14515 = VPGATHERQQYrm |
| 27586 | { 14514, 9, 2, 0, 961, 0, 0, X86ImpOpBase + 0, 4052, 0|(1ULL<<MCID::MayLoad), 0x48b800481aULL }, // Inst #14514 = VPGATHERQDrm |
| 27587 | { 14513, 9, 2, 0, 2199, 0, 0, X86ImpOpBase + 0, 4151, 0|(1ULL<<MCID::MayLoad), 0x6a48f8004819ULL }, // Inst #14513 = VPGATHERQDZrm |
| 27588 | { 14512, 9, 2, 0, 2197, 0, 0, X86ImpOpBase + 0, 4142, 0|(1ULL<<MCID::MayLoad), 0x6348f8004819ULL }, // Inst #14512 = VPGATHERQDZ256rm |
| 27589 | { 14511, 9, 2, 0, 1394, 0, 0, X86ImpOpBase + 0, 4025, 0|(1ULL<<MCID::MayLoad), 0x6248f8004819ULL }, // Inst #14511 = VPGATHERQDZ128rm |
| 27590 | { 14510, 9, 2, 0, 960, 0, 0, X86ImpOpBase + 0, 4133, 0|(1ULL<<MCID::MayLoad), 0x148b800481aULL }, // Inst #14510 = VPGATHERQDYrm |
| 27591 | { 14509, 9, 2, 0, 959, 0, 0, X86ImpOpBase + 0, 4052, 0|(1ULL<<MCID::MayLoad), 0x483802481aULL }, // Inst #14509 = VPGATHERDQrm |
| 27592 | { 14508, 9, 2, 0, 2198, 0, 0, X86ImpOpBase + 0, 4043, 0|(1ULL<<MCID::MayLoad), 0x8a4878024819ULL }, // Inst #14508 = VPGATHERDQZrm |
| 27593 | { 14507, 9, 2, 0, 2196, 0, 0, X86ImpOpBase + 0, 4034, 0|(1ULL<<MCID::MayLoad), 0x834878024819ULL }, // Inst #14507 = VPGATHERDQZ256rm |
| 27594 | { 14506, 9, 2, 0, 2195, 0, 0, X86ImpOpBase + 0, 4025, 0|(1ULL<<MCID::MayLoad), 0x824878024819ULL }, // Inst #14506 = VPGATHERDQZ128rm |
| 27595 | { 14505, 9, 2, 0, 958, 0, 0, X86ImpOpBase + 0, 4016, 0|(1ULL<<MCID::MayLoad), 0x1483802481aULL }, // Inst #14505 = VPGATHERDQYrm |
| 27596 | { 14504, 9, 2, 0, 957, 0, 0, X86ImpOpBase + 0, 4052, 0|(1ULL<<MCID::MayLoad), 0x483800481aULL }, // Inst #14504 = VPGATHERDDrm |
| 27597 | { 14503, 9, 2, 0, 1397, 0, 0, X86ImpOpBase + 0, 4088, 0|(1ULL<<MCID::MayLoad), 0x6a4878004819ULL }, // Inst #14503 = VPGATHERDDZrm |
| 27598 | { 14502, 9, 2, 0, 1396, 0, 0, X86ImpOpBase + 0, 4079, 0|(1ULL<<MCID::MayLoad), 0x634878004819ULL }, // Inst #14502 = VPGATHERDDZ256rm |
| 27599 | { 14501, 9, 2, 0, 1395, 0, 0, X86ImpOpBase + 0, 4070, 0|(1ULL<<MCID::MayLoad), 0x624878004819ULL }, // Inst #14501 = VPGATHERDDZ128rm |
| 27600 | { 14500, 9, 2, 0, 956, 0, 0, X86ImpOpBase + 0, 4061, 0|(1ULL<<MCID::MayLoad), 0x1483800481aULL }, // Inst #14500 = VPGATHERDDYrm |
| 27601 | { 14499, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 1037, 0, 0xab8046828ULL }, // Inst #14499 = VPEXTRWrr_REV |
| 27602 | { 14498, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 1037, 0, 0x62b8042829ULL }, // Inst #14498 = VPEXTRWrr |
| 27603 | { 14497, 7, 0, 0, 142, 0, 0, X86ImpOpBase + 0, 1030, 0|(1ULL<<MCID::MayStore), 0xab8046818ULL }, // Inst #14497 = VPEXTRWmr |
| 27604 | { 14496, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 3414, 0, 0xa00af8046828ULL }, // Inst #14496 = VPEXTRWZrr_REV |
| 27605 | { 14495, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 3414, 0, 0xa062f8042829ULL }, // Inst #14495 = VPEXTRWZrr |
| 27606 | { 14494, 7, 0, 0, 142, 0, 0, X86ImpOpBase + 0, 3021, 0|(1ULL<<MCID::MayStore), 0x400af8046818ULL }, // Inst #14494 = VPEXTRWZmr |
| 27607 | { 14493, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 1400, 0, 0xb38066828ULL }, // Inst #14493 = VPEXTRQrr |
| 27608 | { 14492, 7, 0, 0, 767, 0, 0, X86ImpOpBase + 0, 1030, 0|(1ULL<<MCID::MayStore), 0xb38066818ULL }, // Inst #14492 = VPEXTRQmr |
| 27609 | { 14491, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 5444, 0, 0xa00b78066828ULL }, // Inst #14491 = VPEXTRQZrr |
| 27610 | { 14490, 7, 0, 0, 1834, 0, 0, X86ImpOpBase + 0, 3021, 0|(1ULL<<MCID::MayStore), 0x800b78066818ULL }, // Inst #14490 = VPEXTRQZmr |
| 27611 | { 14489, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 1037, 0, 0xb38046828ULL }, // Inst #14489 = VPEXTRDrr |
| 27612 | { 14488, 7, 0, 0, 767, 0, 0, X86ImpOpBase + 0, 1030, 0|(1ULL<<MCID::MayStore), 0xb38046818ULL }, // Inst #14488 = VPEXTRDmr |
| 27613 | { 14487, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 3414, 0, 0xa00b78046828ULL }, // Inst #14487 = VPEXTRDZrr |
| 27614 | { 14486, 7, 0, 0, 1834, 0, 0, X86ImpOpBase + 0, 3021, 0|(1ULL<<MCID::MayStore), 0x600b78046818ULL }, // Inst #14486 = VPEXTRDZmr |
| 27615 | { 14485, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 1037, 0, 0xa38046828ULL }, // Inst #14485 = VPEXTRBrr |
| 27616 | { 14484, 7, 0, 0, 142, 0, 0, X86ImpOpBase + 0, 1030, 0|(1ULL<<MCID::MayStore), 0xa38046818ULL }, // Inst #14484 = VPEXTRBmr |
| 27617 | { 14483, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 3414, 0, 0xa00a78046828ULL }, // Inst #14483 = VPEXTRBZrr |
| 27618 | { 14482, 7, 0, 0, 142, 0, 0, X86ImpOpBase + 0, 3021, 0|(1ULL<<MCID::MayStore), 0x200a78046818ULL }, // Inst #14482 = VPEXTRBZmr |
| 27619 | { 14481, 3, 1, 0, 2311, 0, 0, X86ImpOpBase + 0, 3008, 0, 0xee3178024829ULL }, // Inst #14481 = VPEXPANDWZrrkz |
| 27620 | { 14480, 4, 1, 0, 2311, 0, 0, X86ImpOpBase + 0, 3004, 0, 0xea3178024829ULL }, // Inst #14480 = VPEXPANDWZrrk |
| 27621 | { 14479, 2, 1, 0, 1944, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe83178024829ULL }, // Inst #14479 = VPEXPANDWZrr |
| 27622 | { 14478, 7, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0x4e3178024819ULL }, // Inst #14478 = VPEXPANDWZrmkz |
| 27623 | { 14477, 8, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad), 0x4a3178024819ULL }, // Inst #14477 = VPEXPANDWZrmk |
| 27624 | { 14476, 6, 1, 0, 1715, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x483178024819ULL }, // Inst #14476 = VPEXPANDWZrm |
| 27625 | { 14475, 3, 1, 0, 2310, 0, 0, X86ImpOpBase + 0, 2977, 0, 0xc73178024829ULL }, // Inst #14475 = VPEXPANDWZ256rrkz |
| 27626 | { 14474, 4, 1, 0, 2310, 0, 0, X86ImpOpBase + 0, 2973, 0, 0xc33178024829ULL }, // Inst #14474 = VPEXPANDWZ256rrk |
| 27627 | { 14473, 2, 1, 0, 1943, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc13178024829ULL }, // Inst #14473 = VPEXPANDWZ256rr |
| 27628 | { 14472, 7, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0x473178024819ULL }, // Inst #14472 = VPEXPANDWZ256rmkz |
| 27629 | { 14471, 8, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0x433178024819ULL }, // Inst #14471 = VPEXPANDWZ256rmk |
| 27630 | { 14470, 6, 1, 0, 1715, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x413178024819ULL }, // Inst #14470 = VPEXPANDWZ256rm |
| 27631 | { 14469, 3, 1, 0, 2309, 0, 0, X86ImpOpBase + 0, 2970, 0, 0xa63178024829ULL }, // Inst #14469 = VPEXPANDWZ128rrkz |
| 27632 | { 14468, 4, 1, 0, 2309, 0, 0, X86ImpOpBase + 0, 2966, 0, 0xa23178024829ULL }, // Inst #14468 = VPEXPANDWZ128rrk |
| 27633 | { 14467, 2, 1, 0, 1945, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa03178024829ULL }, // Inst #14467 = VPEXPANDWZ128rr |
| 27634 | { 14466, 7, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0x463178024819ULL }, // Inst #14466 = VPEXPANDWZ128rmkz |
| 27635 | { 14465, 8, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0x423178024819ULL }, // Inst #14465 = VPEXPANDWZ128rmk |
| 27636 | { 14464, 6, 1, 0, 2160, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x403178024819ULL }, // Inst #14464 = VPEXPANDWZ128rm |
| 27637 | { 14463, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee44f8024829ULL }, // Inst #14463 = VPEXPANDQZrrkz |
| 27638 | { 14462, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2740, 0, 0xea44f8024829ULL }, // Inst #14462 = VPEXPANDQZrrk |
| 27639 | { 14461, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe844f8024829ULL }, // Inst #14461 = VPEXPANDQZrr |
| 27640 | { 14460, 7, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x8e44f8024819ULL }, // Inst #14460 = VPEXPANDQZrmkz |
| 27641 | { 14459, 8, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0x8a44f8024819ULL }, // Inst #14459 = VPEXPANDQZrmk |
| 27642 | { 14458, 6, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8844f8024819ULL }, // Inst #14458 = VPEXPANDQZrm |
| 27643 | { 14457, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc744f8024829ULL }, // Inst #14457 = VPEXPANDQZ256rrkz |
| 27644 | { 14456, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2718, 0, 0xc344f8024829ULL }, // Inst #14456 = VPEXPANDQZ256rrk |
| 27645 | { 14455, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc144f8024829ULL }, // Inst #14455 = VPEXPANDQZ256rr |
| 27646 | { 14454, 7, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x8744f8024819ULL }, // Inst #14454 = VPEXPANDQZ256rmkz |
| 27647 | { 14453, 8, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x8344f8024819ULL }, // Inst #14453 = VPEXPANDQZ256rmk |
| 27648 | { 14452, 6, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8144f8024819ULL }, // Inst #14452 = VPEXPANDQZ256rm |
| 27649 | { 14451, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa644f8024829ULL }, // Inst #14451 = VPEXPANDQZ128rrkz |
| 27650 | { 14450, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2702, 0, 0xa244f8024829ULL }, // Inst #14450 = VPEXPANDQZ128rrk |
| 27651 | { 14449, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa044f8024829ULL }, // Inst #14449 = VPEXPANDQZ128rr |
| 27652 | { 14448, 7, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x8644f8024819ULL }, // Inst #14448 = VPEXPANDQZ128rmkz |
| 27653 | { 14447, 8, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x8244f8024819ULL }, // Inst #14447 = VPEXPANDQZ128rmk |
| 27654 | { 14446, 6, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8044f8024819ULL }, // Inst #14446 = VPEXPANDQZ128rm |
| 27655 | { 14445, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee44f8004829ULL }, // Inst #14445 = VPEXPANDDZrrkz |
| 27656 | { 14444, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2775, 0, 0xea44f8004829ULL }, // Inst #14444 = VPEXPANDDZrrk |
| 27657 | { 14443, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe844f8004829ULL }, // Inst #14443 = VPEXPANDDZrr |
| 27658 | { 14442, 7, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0x6e44f8004819ULL }, // Inst #14442 = VPEXPANDDZrmkz |
| 27659 | { 14441, 8, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0x6a44f8004819ULL }, // Inst #14441 = VPEXPANDDZrmk |
| 27660 | { 14440, 6, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6844f8004819ULL }, // Inst #14440 = VPEXPANDDZrm |
| 27661 | { 14439, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc744f8004829ULL }, // Inst #14439 = VPEXPANDDZ256rrkz |
| 27662 | { 14438, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2761, 0, 0xc344f8004829ULL }, // Inst #14438 = VPEXPANDDZ256rrk |
| 27663 | { 14437, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc144f8004829ULL }, // Inst #14437 = VPEXPANDDZ256rr |
| 27664 | { 14436, 7, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x6744f8004819ULL }, // Inst #14436 = VPEXPANDDZ256rmkz |
| 27665 | { 14435, 8, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0x6344f8004819ULL }, // Inst #14435 = VPEXPANDDZ256rmk |
| 27666 | { 14434, 6, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6144f8004819ULL }, // Inst #14434 = VPEXPANDDZ256rm |
| 27667 | { 14433, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa644f8004829ULL }, // Inst #14433 = VPEXPANDDZ128rrkz |
| 27668 | { 14432, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa244f8004829ULL }, // Inst #14432 = VPEXPANDDZ128rrk |
| 27669 | { 14431, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa044f8004829ULL }, // Inst #14431 = VPEXPANDDZ128rr |
| 27670 | { 14430, 7, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x6644f8004819ULL }, // Inst #14430 = VPEXPANDDZ128rmkz |
| 27671 | { 14429, 8, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x6244f8004819ULL }, // Inst #14429 = VPEXPANDDZ128rmk |
| 27672 | { 14428, 6, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6044f8004819ULL }, // Inst #14428 = VPEXPANDDZ128rm |
| 27673 | { 14427, 3, 1, 0, 2311, 0, 0, X86ImpOpBase + 0, 4809, 0, 0xee3178004829ULL }, // Inst #14427 = VPEXPANDBZrrkz |
| 27674 | { 14426, 4, 1, 0, 2311, 0, 0, X86ImpOpBase + 0, 4805, 0, 0xea3178004829ULL }, // Inst #14426 = VPEXPANDBZrrk |
| 27675 | { 14425, 2, 1, 0, 1944, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe83178004829ULL }, // Inst #14425 = VPEXPANDBZrr |
| 27676 | { 14424, 7, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 4798, 0|(1ULL<<MCID::MayLoad), 0x2e3178004819ULL }, // Inst #14424 = VPEXPANDBZrmkz |
| 27677 | { 14423, 8, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 4790, 0|(1ULL<<MCID::MayLoad), 0x2a3178004819ULL }, // Inst #14423 = VPEXPANDBZrmk |
| 27678 | { 14422, 6, 1, 0, 1715, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x283178004819ULL }, // Inst #14422 = VPEXPANDBZrm |
| 27679 | { 14421, 3, 1, 0, 2310, 0, 0, X86ImpOpBase + 0, 4780, 0, 0xc73178004829ULL }, // Inst #14421 = VPEXPANDBZ256rrkz |
| 27680 | { 14420, 4, 1, 0, 2310, 0, 0, X86ImpOpBase + 0, 4776, 0, 0xc33178004829ULL }, // Inst #14420 = VPEXPANDBZ256rrk |
| 27681 | { 14419, 2, 1, 0, 1943, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc13178004829ULL }, // Inst #14419 = VPEXPANDBZ256rr |
| 27682 | { 14418, 7, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 4769, 0|(1ULL<<MCID::MayLoad), 0x273178004819ULL }, // Inst #14418 = VPEXPANDBZ256rmkz |
| 27683 | { 14417, 8, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 4761, 0|(1ULL<<MCID::MayLoad), 0x233178004819ULL }, // Inst #14417 = VPEXPANDBZ256rmk |
| 27684 | { 14416, 6, 1, 0, 1715, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x213178004819ULL }, // Inst #14416 = VPEXPANDBZ256rm |
| 27685 | { 14415, 3, 1, 0, 2309, 0, 0, X86ImpOpBase + 0, 4751, 0, 0xa63178004829ULL }, // Inst #14415 = VPEXPANDBZ128rrkz |
| 27686 | { 14414, 4, 1, 0, 2309, 0, 0, X86ImpOpBase + 0, 4747, 0, 0xa23178004829ULL }, // Inst #14414 = VPEXPANDBZ128rrk |
| 27687 | { 14413, 2, 1, 0, 1945, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa03178004829ULL }, // Inst #14413 = VPEXPANDBZ128rr |
| 27688 | { 14412, 7, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 4740, 0|(1ULL<<MCID::MayLoad), 0x263178004819ULL }, // Inst #14412 = VPEXPANDBZ128rmkz |
| 27689 | { 14411, 8, 1, 0, 1675, 0, 0, X86ImpOpBase + 0, 4732, 0|(1ULL<<MCID::MayLoad), 0x223178004819ULL }, // Inst #14411 = VPEXPANDBZ128rmk |
| 27690 | { 14410, 6, 1, 0, 2160, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x203178004819ULL }, // Inst #14410 = VPEXPANDBZ128rm |
| 27691 | { 14409, 4, 1, 0, 2261, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xeec6f8024829ULL }, // Inst #14409 = VPERMWZrrkz |
| 27692 | { 14408, 5, 1, 0, 2261, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeac6f8024829ULL }, // Inst #14408 = VPERMWZrrk |
| 27693 | { 14407, 3, 1, 0, 1714, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8c6f8024829ULL }, // Inst #14407 = VPERMWZrr |
| 27694 | { 14406, 8, 1, 0, 2077, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeec6f8024819ULL }, // Inst #14406 = VPERMWZrmkz |
| 27695 | { 14405, 9, 1, 0, 2077, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeac6f8024819ULL }, // Inst #14405 = VPERMWZrmk |
| 27696 | { 14404, 7, 1, 0, 1384, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8c6f8024819ULL }, // Inst #14404 = VPERMWZrm |
| 27697 | { 14403, 4, 1, 0, 1781, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc7c6f8024829ULL }, // Inst #14403 = VPERMWZ256rrkz |
| 27698 | { 14402, 5, 1, 0, 1781, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3c6f8024829ULL }, // Inst #14402 = VPERMWZ256rrk |
| 27699 | { 14401, 3, 1, 0, 2307, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1c6f8024829ULL }, // Inst #14401 = VPERMWZ256rr |
| 27700 | { 14400, 8, 1, 0, 2305, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7c6f8024819ULL }, // Inst #14400 = VPERMWZ256rmkz |
| 27701 | { 14399, 9, 1, 0, 2305, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3c6f8024819ULL }, // Inst #14399 = VPERMWZ256rmk |
| 27702 | { 14398, 7, 1, 0, 2308, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1c6f8024819ULL }, // Inst #14398 = VPERMWZ256rm |
| 27703 | { 14397, 4, 1, 0, 1780, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6c6f8024829ULL }, // Inst #14397 = VPERMWZ128rrkz |
| 27704 | { 14396, 5, 1, 0, 1780, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2c6f8024829ULL }, // Inst #14396 = VPERMWZ128rrk |
| 27705 | { 14395, 3, 1, 0, 2306, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0c6f8024829ULL }, // Inst #14395 = VPERMWZ128rr |
| 27706 | { 14394, 8, 1, 0, 1380, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6c6f8024819ULL }, // Inst #14394 = VPERMWZ128rmkz |
| 27707 | { 14393, 9, 1, 0, 1380, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2c6f8024819ULL }, // Inst #14393 = VPERMWZ128rmk |
| 27708 | { 14392, 7, 1, 0, 2304, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0c6f8024819ULL }, // Inst #14392 = VPERMWZ128rm |
| 27709 | { 14391, 5, 1, 0, 1302, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeebef8024829ULL }, // Inst #14391 = VPERMT2WZrrkz |
| 27710 | { 14390, 5, 1, 0, 1302, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeabef8024829ULL }, // Inst #14390 = VPERMT2WZrrk |
| 27711 | { 14389, 4, 1, 0, 2297, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8bef8024829ULL }, // Inst #14389 = VPERMT2WZrr |
| 27712 | { 14388, 9, 1, 0, 1389, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebef8024819ULL }, // Inst #14388 = VPERMT2WZrmkz |
| 27713 | { 14387, 9, 1, 0, 1389, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeabef8024819ULL }, // Inst #14387 = VPERMT2WZrmk |
| 27714 | { 14386, 8, 1, 0, 2294, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bef8024819ULL }, // Inst #14386 = VPERMT2WZrm |
| 27715 | { 14385, 5, 1, 0, 1301, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc7bef8024829ULL }, // Inst #14385 = VPERMT2WZ256rrkz |
| 27716 | { 14384, 5, 1, 0, 1301, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3bef8024829ULL }, // Inst #14384 = VPERMT2WZ256rrk |
| 27717 | { 14383, 4, 1, 0, 2287, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1bef8024829ULL }, // Inst #14383 = VPERMT2WZ256rr |
| 27718 | { 14382, 9, 1, 0, 2299, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bef8024819ULL }, // Inst #14382 = VPERMT2WZ256rmkz |
| 27719 | { 14381, 9, 1, 0, 2299, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3bef8024819ULL }, // Inst #14381 = VPERMT2WZ256rmk |
| 27720 | { 14380, 8, 1, 0, 2291, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bef8024819ULL }, // Inst #14380 = VPERMT2WZ256rm |
| 27721 | { 14379, 5, 1, 0, 1300, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa6bef8024829ULL }, // Inst #14379 = VPERMT2WZ128rrkz |
| 27722 | { 14378, 5, 1, 0, 1300, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2bef8024829ULL }, // Inst #14378 = VPERMT2WZ128rrk |
| 27723 | { 14377, 4, 1, 0, 2286, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0bef8024829ULL }, // Inst #14377 = VPERMT2WZ128rr |
| 27724 | { 14376, 9, 1, 0, 1386, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bef8024819ULL }, // Inst #14376 = VPERMT2WZ128rmkz |
| 27725 | { 14375, 9, 1, 0, 1386, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2bef8024819ULL }, // Inst #14375 = VPERMT2WZ128rmk |
| 27726 | { 14374, 8, 1, 0, 2282, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bef8024819ULL }, // Inst #14374 = VPERMT2WZ128rm |
| 27727 | { 14373, 5, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeebf78024829ULL }, // Inst #14373 = VPERMT2QZrrkz |
| 27728 | { 14372, 5, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeabf78024829ULL }, // Inst #14372 = VPERMT2QZrrk |
| 27729 | { 14371, 4, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8bf78024829ULL }, // Inst #14371 = VPERMT2QZrr |
| 27730 | { 14370, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebf78024819ULL }, // Inst #14370 = VPERMT2QZrmkz |
| 27731 | { 14369, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeabf78024819ULL }, // Inst #14369 = VPERMT2QZrmk |
| 27732 | { 14368, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9ebf78024819ULL }, // Inst #14368 = VPERMT2QZrmbkz |
| 27733 | { 14367, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9abf78024819ULL }, // Inst #14367 = VPERMT2QZrmbk |
| 27734 | { 14366, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x98bf78024819ULL }, // Inst #14366 = VPERMT2QZrmb |
| 27735 | { 14365, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bf78024819ULL }, // Inst #14365 = VPERMT2QZrm |
| 27736 | { 14364, 5, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc7bf78024829ULL }, // Inst #14364 = VPERMT2QZ256rrkz |
| 27737 | { 14363, 5, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3bf78024829ULL }, // Inst #14363 = VPERMT2QZ256rrk |
| 27738 | { 14362, 4, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1bf78024829ULL }, // Inst #14362 = VPERMT2QZ256rr |
| 27739 | { 14361, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bf78024819ULL }, // Inst #14361 = VPERMT2QZ256rmkz |
| 27740 | { 14360, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3bf78024819ULL }, // Inst #14360 = VPERMT2QZ256rmk |
| 27741 | { 14359, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x97bf78024819ULL }, // Inst #14359 = VPERMT2QZ256rmbkz |
| 27742 | { 14358, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93bf78024819ULL }, // Inst #14358 = VPERMT2QZ256rmbk |
| 27743 | { 14357, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x91bf78024819ULL }, // Inst #14357 = VPERMT2QZ256rmb |
| 27744 | { 14356, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bf78024819ULL }, // Inst #14356 = VPERMT2QZ256rm |
| 27745 | { 14355, 5, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa6bf78024829ULL }, // Inst #14355 = VPERMT2QZ128rrkz |
| 27746 | { 14354, 5, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2bf78024829ULL }, // Inst #14354 = VPERMT2QZ128rrk |
| 27747 | { 14353, 4, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0bf78024829ULL }, // Inst #14353 = VPERMT2QZ128rr |
| 27748 | { 14352, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bf78024819ULL }, // Inst #14352 = VPERMT2QZ128rmkz |
| 27749 | { 14351, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2bf78024819ULL }, // Inst #14351 = VPERMT2QZ128rmk |
| 27750 | { 14350, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x96bf78024819ULL }, // Inst #14350 = VPERMT2QZ128rmbkz |
| 27751 | { 14349, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92bf78024819ULL }, // Inst #14349 = VPERMT2QZ128rmbk |
| 27752 | { 14348, 8, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x90bf78024819ULL }, // Inst #14348 = VPERMT2QZ128rmb |
| 27753 | { 14347, 8, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bf78024819ULL }, // Inst #14347 = VPERMT2QZ128rm |
| 27754 | { 14346, 5, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeebfe8004829ULL }, // Inst #14346 = VPERMT2PSZrrkz |
| 27755 | { 14345, 5, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeabfe8004829ULL }, // Inst #14345 = VPERMT2PSZrrk |
| 27756 | { 14344, 4, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8bfe8004829ULL }, // Inst #14344 = VPERMT2PSZrr |
| 27757 | { 14343, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebfe8004819ULL }, // Inst #14343 = VPERMT2PSZrmkz |
| 27758 | { 14342, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeabfe8004819ULL }, // Inst #14342 = VPERMT2PSZrmk |
| 27759 | { 14341, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7ebfe8004819ULL }, // Inst #14341 = VPERMT2PSZrmbkz |
| 27760 | { 14340, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7abfe8004819ULL }, // Inst #14340 = VPERMT2PSZrmbk |
| 27761 | { 14339, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x78bfe8004819ULL }, // Inst #14339 = VPERMT2PSZrmb |
| 27762 | { 14338, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bfe8004819ULL }, // Inst #14338 = VPERMT2PSZrm |
| 27763 | { 14337, 5, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc7bfe8004829ULL }, // Inst #14337 = VPERMT2PSZ256rrkz |
| 27764 | { 14336, 5, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3bfe8004829ULL }, // Inst #14336 = VPERMT2PSZ256rrk |
| 27765 | { 14335, 4, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1bfe8004829ULL }, // Inst #14335 = VPERMT2PSZ256rr |
| 27766 | { 14334, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bfe8004819ULL }, // Inst #14334 = VPERMT2PSZ256rmkz |
| 27767 | { 14333, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3bfe8004819ULL }, // Inst #14333 = VPERMT2PSZ256rmk |
| 27768 | { 14332, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x77bfe8004819ULL }, // Inst #14332 = VPERMT2PSZ256rmbkz |
| 27769 | { 14331, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73bfe8004819ULL }, // Inst #14331 = VPERMT2PSZ256rmbk |
| 27770 | { 14330, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x71bfe8004819ULL }, // Inst #14330 = VPERMT2PSZ256rmb |
| 27771 | { 14329, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bfe8004819ULL }, // Inst #14329 = VPERMT2PSZ256rm |
| 27772 | { 14328, 5, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa6bfe8004829ULL }, // Inst #14328 = VPERMT2PSZ128rrkz |
| 27773 | { 14327, 5, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2bfe8004829ULL }, // Inst #14327 = VPERMT2PSZ128rrk |
| 27774 | { 14326, 4, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0bfe8004829ULL }, // Inst #14326 = VPERMT2PSZ128rr |
| 27775 | { 14325, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bfe8004819ULL }, // Inst #14325 = VPERMT2PSZ128rmkz |
| 27776 | { 14324, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2bfe8004819ULL }, // Inst #14324 = VPERMT2PSZ128rmk |
| 27777 | { 14323, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x76bfe8004819ULL }, // Inst #14323 = VPERMT2PSZ128rmbkz |
| 27778 | { 14322, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72bfe8004819ULL }, // Inst #14322 = VPERMT2PSZ128rmbk |
| 27779 | { 14321, 8, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x70bfe8004819ULL }, // Inst #14321 = VPERMT2PSZ128rmb |
| 27780 | { 14320, 8, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bfe8004819ULL }, // Inst #14320 = VPERMT2PSZ128rm |
| 27781 | { 14319, 5, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeebff0024829ULL }, // Inst #14319 = VPERMT2PDZrrkz |
| 27782 | { 14318, 5, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeabff0024829ULL }, // Inst #14318 = VPERMT2PDZrrk |
| 27783 | { 14317, 4, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8bff0024829ULL }, // Inst #14317 = VPERMT2PDZrr |
| 27784 | { 14316, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebff0024819ULL }, // Inst #14316 = VPERMT2PDZrmkz |
| 27785 | { 14315, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeabff0024819ULL }, // Inst #14315 = VPERMT2PDZrmk |
| 27786 | { 14314, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9ebff0024819ULL }, // Inst #14314 = VPERMT2PDZrmbkz |
| 27787 | { 14313, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9abff0024819ULL }, // Inst #14313 = VPERMT2PDZrmbk |
| 27788 | { 14312, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x98bff0024819ULL }, // Inst #14312 = VPERMT2PDZrmb |
| 27789 | { 14311, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bff0024819ULL }, // Inst #14311 = VPERMT2PDZrm |
| 27790 | { 14310, 5, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc7bff0024829ULL }, // Inst #14310 = VPERMT2PDZ256rrkz |
| 27791 | { 14309, 5, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3bff0024829ULL }, // Inst #14309 = VPERMT2PDZ256rrk |
| 27792 | { 14308, 4, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1bff0024829ULL }, // Inst #14308 = VPERMT2PDZ256rr |
| 27793 | { 14307, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bff0024819ULL }, // Inst #14307 = VPERMT2PDZ256rmkz |
| 27794 | { 14306, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3bff0024819ULL }, // Inst #14306 = VPERMT2PDZ256rmk |
| 27795 | { 14305, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x97bff0024819ULL }, // Inst #14305 = VPERMT2PDZ256rmbkz |
| 27796 | { 14304, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93bff0024819ULL }, // Inst #14304 = VPERMT2PDZ256rmbk |
| 27797 | { 14303, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x91bff0024819ULL }, // Inst #14303 = VPERMT2PDZ256rmb |
| 27798 | { 14302, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bff0024819ULL }, // Inst #14302 = VPERMT2PDZ256rm |
| 27799 | { 14301, 5, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa6bff0024829ULL }, // Inst #14301 = VPERMT2PDZ128rrkz |
| 27800 | { 14300, 5, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2bff0024829ULL }, // Inst #14300 = VPERMT2PDZ128rrk |
| 27801 | { 14299, 4, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0bff0024829ULL }, // Inst #14299 = VPERMT2PDZ128rr |
| 27802 | { 14298, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bff0024819ULL }, // Inst #14298 = VPERMT2PDZ128rmkz |
| 27803 | { 14297, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2bff0024819ULL }, // Inst #14297 = VPERMT2PDZ128rmk |
| 27804 | { 14296, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x96bff0024819ULL }, // Inst #14296 = VPERMT2PDZ128rmbkz |
| 27805 | { 14295, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92bff0024819ULL }, // Inst #14295 = VPERMT2PDZ128rmbk |
| 27806 | { 14294, 8, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x90bff0024819ULL }, // Inst #14294 = VPERMT2PDZ128rmb |
| 27807 | { 14293, 8, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bff0024819ULL }, // Inst #14293 = VPERMT2PDZ128rm |
| 27808 | { 14292, 5, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeebf78004829ULL }, // Inst #14292 = VPERMT2DZrrkz |
| 27809 | { 14291, 5, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeabf78004829ULL }, // Inst #14291 = VPERMT2DZrrk |
| 27810 | { 14290, 4, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8bf78004829ULL }, // Inst #14290 = VPERMT2DZrr |
| 27811 | { 14289, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebf78004819ULL }, // Inst #14289 = VPERMT2DZrmkz |
| 27812 | { 14288, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeabf78004819ULL }, // Inst #14288 = VPERMT2DZrmk |
| 27813 | { 14287, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7ebf78004819ULL }, // Inst #14287 = VPERMT2DZrmbkz |
| 27814 | { 14286, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7abf78004819ULL }, // Inst #14286 = VPERMT2DZrmbk |
| 27815 | { 14285, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x78bf78004819ULL }, // Inst #14285 = VPERMT2DZrmb |
| 27816 | { 14284, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bf78004819ULL }, // Inst #14284 = VPERMT2DZrm |
| 27817 | { 14283, 5, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc7bf78004829ULL }, // Inst #14283 = VPERMT2DZ256rrkz |
| 27818 | { 14282, 5, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3bf78004829ULL }, // Inst #14282 = VPERMT2DZ256rrk |
| 27819 | { 14281, 4, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1bf78004829ULL }, // Inst #14281 = VPERMT2DZ256rr |
| 27820 | { 14280, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bf78004819ULL }, // Inst #14280 = VPERMT2DZ256rmkz |
| 27821 | { 14279, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3bf78004819ULL }, // Inst #14279 = VPERMT2DZ256rmk |
| 27822 | { 14278, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x77bf78004819ULL }, // Inst #14278 = VPERMT2DZ256rmbkz |
| 27823 | { 14277, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73bf78004819ULL }, // Inst #14277 = VPERMT2DZ256rmbk |
| 27824 | { 14276, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x71bf78004819ULL }, // Inst #14276 = VPERMT2DZ256rmb |
| 27825 | { 14275, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bf78004819ULL }, // Inst #14275 = VPERMT2DZ256rm |
| 27826 | { 14274, 5, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa6bf78004829ULL }, // Inst #14274 = VPERMT2DZ128rrkz |
| 27827 | { 14273, 5, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2bf78004829ULL }, // Inst #14273 = VPERMT2DZ128rrk |
| 27828 | { 14272, 4, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0bf78004829ULL }, // Inst #14272 = VPERMT2DZ128rr |
| 27829 | { 14271, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bf78004819ULL }, // Inst #14271 = VPERMT2DZ128rmkz |
| 27830 | { 14270, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2bf78004819ULL }, // Inst #14270 = VPERMT2DZ128rmk |
| 27831 | { 14269, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x76bf78004819ULL }, // Inst #14269 = VPERMT2DZ128rmbkz |
| 27832 | { 14268, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72bf78004819ULL }, // Inst #14268 = VPERMT2DZ128rmbk |
| 27833 | { 14267, 8, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x70bf78004819ULL }, // Inst #14267 = VPERMT2DZ128rmb |
| 27834 | { 14266, 8, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bf78004819ULL }, // Inst #14266 = VPERMT2DZ128rm |
| 27835 | { 14265, 5, 1, 0, 2296, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xeebef8004829ULL }, // Inst #14265 = VPERMT2BZrrkz |
| 27836 | { 14264, 5, 1, 0, 2296, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeabef8004829ULL }, // Inst #14264 = VPERMT2BZrrk |
| 27837 | { 14263, 4, 1, 0, 2295, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8bef8004829ULL }, // Inst #14263 = VPERMT2BZrr |
| 27838 | { 14262, 9, 1, 0, 2293, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebef8004819ULL }, // Inst #14262 = VPERMT2BZrmkz |
| 27839 | { 14261, 9, 1, 0, 2293, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeabef8004819ULL }, // Inst #14261 = VPERMT2BZrmk |
| 27840 | { 14260, 8, 1, 0, 2292, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bef8004819ULL }, // Inst #14260 = VPERMT2BZrm |
| 27841 | { 14259, 5, 1, 0, 2285, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc7bef8004829ULL }, // Inst #14259 = VPERMT2BZ256rrkz |
| 27842 | { 14258, 5, 1, 0, 2285, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3bef8004829ULL }, // Inst #14258 = VPERMT2BZ256rrk |
| 27843 | { 14257, 4, 1, 0, 2284, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1bef8004829ULL }, // Inst #14257 = VPERMT2BZ256rr |
| 27844 | { 14256, 9, 1, 0, 2289, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bef8004819ULL }, // Inst #14256 = VPERMT2BZ256rmkz |
| 27845 | { 14255, 9, 1, 0, 2289, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3bef8004819ULL }, // Inst #14255 = VPERMT2BZ256rmk |
| 27846 | { 14254, 8, 1, 0, 2288, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bef8004819ULL }, // Inst #14254 = VPERMT2BZ256rm |
| 27847 | { 14253, 5, 1, 0, 1144, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa6bef8004829ULL }, // Inst #14253 = VPERMT2BZ128rrkz |
| 27848 | { 14252, 5, 1, 0, 1144, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2bef8004829ULL }, // Inst #14252 = VPERMT2BZ128rrk |
| 27849 | { 14251, 4, 1, 0, 2283, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0bef8004829ULL }, // Inst #14251 = VPERMT2BZ128rr |
| 27850 | { 14250, 9, 1, 0, 2281, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bef8004819ULL }, // Inst #14250 = VPERMT2BZ128rmkz |
| 27851 | { 14249, 9, 1, 0, 2281, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2bef8004819ULL }, // Inst #14249 = VPERMT2BZ128rmk |
| 27852 | { 14248, 8, 1, 0, 2277, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bef8004819ULL }, // Inst #14248 = VPERMT2BZ128rm |
| 27853 | { 14247, 4, 1, 0, 1690, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xee9b78024829ULL }, // Inst #14247 = VPERMQZrrkz |
| 27854 | { 14246, 5, 1, 0, 1690, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xea9b78024829ULL }, // Inst #14246 = VPERMQZrrk |
| 27855 | { 14245, 3, 1, 0, 1690, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe89b78024829ULL }, // Inst #14245 = VPERMQZrr |
| 27856 | { 14244, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee9b78024819ULL }, // Inst #14244 = VPERMQZrmkz |
| 27857 | { 14243, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea9b78024819ULL }, // Inst #14243 = VPERMQZrmk |
| 27858 | { 14242, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e9b78024819ULL }, // Inst #14242 = VPERMQZrmbkz |
| 27859 | { 14241, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a9b78024819ULL }, // Inst #14241 = VPERMQZrmbk |
| 27860 | { 14240, 7, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x989b78024819ULL }, // Inst #14240 = VPERMQZrmb |
| 27861 | { 14239, 7, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89b78024819ULL }, // Inst #14239 = VPERMQZrm |
| 27862 | { 14238, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4261, 0, 0xee0078066829ULL }, // Inst #14238 = VPERMQZrikz |
| 27863 | { 14237, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4256, 0, 0xea0078066829ULL }, // Inst #14237 = VPERMQZrik |
| 27864 | { 14236, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe80078066829ULL }, // Inst #14236 = VPERMQZri |
| 27865 | { 14235, 8, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0xee0078066819ULL }, // Inst #14235 = VPERMQZmikz |
| 27866 | { 14234, 9, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0xea0078066819ULL }, // Inst #14234 = VPERMQZmik |
| 27867 | { 14233, 7, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe80078066819ULL }, // Inst #14233 = VPERMQZmi |
| 27868 | { 14232, 8, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0x9e0078066819ULL }, // Inst #14232 = VPERMQZmbikz |
| 27869 | { 14231, 9, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0x9a0078066819ULL }, // Inst #14231 = VPERMQZmbik |
| 27870 | { 14230, 7, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x980078066819ULL }, // Inst #14230 = VPERMQZmbi |
| 27871 | { 14229, 4, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc79b78024829ULL }, // Inst #14229 = VPERMQZ256rrkz |
| 27872 | { 14228, 5, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc39b78024829ULL }, // Inst #14228 = VPERMQZ256rrk |
| 27873 | { 14227, 3, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc19b78024829ULL }, // Inst #14227 = VPERMQZ256rr |
| 27874 | { 14226, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc79b78024819ULL }, // Inst #14226 = VPERMQZ256rmkz |
| 27875 | { 14225, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc39b78024819ULL }, // Inst #14225 = VPERMQZ256rmk |
| 27876 | { 14224, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x979b78024819ULL }, // Inst #14224 = VPERMQZ256rmbkz |
| 27877 | { 14223, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x939b78024819ULL }, // Inst #14223 = VPERMQZ256rmbk |
| 27878 | { 14222, 7, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x919b78024819ULL }, // Inst #14222 = VPERMQZ256rmb |
| 27879 | { 14221, 7, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19b78024819ULL }, // Inst #14221 = VPERMQZ256rm |
| 27880 | { 14220, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4225, 0, 0xc70078066829ULL }, // Inst #14220 = VPERMQZ256rikz |
| 27881 | { 14219, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4220, 0, 0xc30078066829ULL }, // Inst #14219 = VPERMQZ256rik |
| 27882 | { 14218, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc10078066829ULL }, // Inst #14218 = VPERMQZ256ri |
| 27883 | { 14217, 8, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0xc70078066819ULL }, // Inst #14217 = VPERMQZ256mikz |
| 27884 | { 14216, 9, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0xc30078066819ULL }, // Inst #14216 = VPERMQZ256mik |
| 27885 | { 14215, 7, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc10078066819ULL }, // Inst #14215 = VPERMQZ256mi |
| 27886 | { 14214, 8, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0x970078066819ULL }, // Inst #14214 = VPERMQZ256mbikz |
| 27887 | { 14213, 9, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0x930078066819ULL }, // Inst #14213 = VPERMQZ256mbik |
| 27888 | { 14212, 7, 1, 0, 363, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x910078066819ULL }, // Inst #14212 = VPERMQZ256mbi |
| 27889 | { 14211, 3, 1, 0, 1048, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x10038066829ULL }, // Inst #14211 = VPERMQYri |
| 27890 | { 14210, 7, 1, 0, 1050, 0, 0, X86ImpOpBase + 0, 5434, 0|(1ULL<<MCID::MayLoad), 0x10038066819ULL }, // Inst #14210 = VPERMQYmi |
| 27891 | { 14209, 4, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xee8b68004829ULL }, // Inst #14209 = VPERMPSZrrkz |
| 27892 | { 14208, 5, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xea8b68004829ULL }, // Inst #14208 = VPERMPSZrrk |
| 27893 | { 14207, 3, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88b68004829ULL }, // Inst #14207 = VPERMPSZrr |
| 27894 | { 14206, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee8b68004819ULL }, // Inst #14206 = VPERMPSZrmkz |
| 27895 | { 14205, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea8b68004819ULL }, // Inst #14205 = VPERMPSZrmk |
| 27896 | { 14204, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e8b68004819ULL }, // Inst #14204 = VPERMPSZrmbkz |
| 27897 | { 14203, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a8b68004819ULL }, // Inst #14203 = VPERMPSZrmbk |
| 27898 | { 14202, 7, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x788b68004819ULL }, // Inst #14202 = VPERMPSZrmb |
| 27899 | { 14201, 7, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88b68004819ULL }, // Inst #14201 = VPERMPSZrm |
| 27900 | { 14200, 4, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc78b68004829ULL }, // Inst #14200 = VPERMPSZ256rrkz |
| 27901 | { 14199, 5, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc38b68004829ULL }, // Inst #14199 = VPERMPSZ256rrk |
| 27902 | { 14198, 3, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18b68004829ULL }, // Inst #14198 = VPERMPSZ256rr |
| 27903 | { 14197, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc78b68004819ULL }, // Inst #14197 = VPERMPSZ256rmkz |
| 27904 | { 14196, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc38b68004819ULL }, // Inst #14196 = VPERMPSZ256rmk |
| 27905 | { 14195, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x778b68004819ULL }, // Inst #14195 = VPERMPSZ256rmbkz |
| 27906 | { 14194, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x738b68004819ULL }, // Inst #14194 = VPERMPSZ256rmbk |
| 27907 | { 14193, 7, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x718b68004819ULL }, // Inst #14193 = VPERMPSZ256rmb |
| 27908 | { 14192, 7, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18b68004819ULL }, // Inst #14192 = VPERMPSZ256rm |
| 27909 | { 14191, 3, 1, 0, 1071, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18b28004829ULL }, // Inst #14191 = VPERMPSYrr |
| 27910 | { 14190, 7, 1, 0, 1046, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18b28004819ULL }, // Inst #14190 = VPERMPSYrm |
| 27911 | { 14189, 4, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xee8b70024829ULL }, // Inst #14189 = VPERMPDZrrkz |
| 27912 | { 14188, 5, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xea8b70024829ULL }, // Inst #14188 = VPERMPDZrrk |
| 27913 | { 14187, 3, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88b70024829ULL }, // Inst #14187 = VPERMPDZrr |
| 27914 | { 14186, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee8b70024819ULL }, // Inst #14186 = VPERMPDZrmkz |
| 27915 | { 14185, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea8b70024819ULL }, // Inst #14185 = VPERMPDZrmk |
| 27916 | { 14184, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e8b70024819ULL }, // Inst #14184 = VPERMPDZrmbkz |
| 27917 | { 14183, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a8b70024819ULL }, // Inst #14183 = VPERMPDZrmbk |
| 27918 | { 14182, 7, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x988b70024819ULL }, // Inst #14182 = VPERMPDZrmb |
| 27919 | { 14181, 7, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88b70024819ULL }, // Inst #14181 = VPERMPDZrm |
| 27920 | { 14180, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4261, 0, 0xee00f0066829ULL }, // Inst #14180 = VPERMPDZrikz |
| 27921 | { 14179, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4256, 0, 0xea00f0066829ULL }, // Inst #14179 = VPERMPDZrik |
| 27922 | { 14178, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe800f0066829ULL }, // Inst #14178 = VPERMPDZri |
| 27923 | { 14177, 8, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0xee00f0066819ULL }, // Inst #14177 = VPERMPDZmikz |
| 27924 | { 14176, 9, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0xea00f0066819ULL }, // Inst #14176 = VPERMPDZmik |
| 27925 | { 14175, 7, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe800f0066819ULL }, // Inst #14175 = VPERMPDZmi |
| 27926 | { 14174, 8, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0x9e00f0066819ULL }, // Inst #14174 = VPERMPDZmbikz |
| 27927 | { 14173, 9, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0x9a00f0066819ULL }, // Inst #14173 = VPERMPDZmbik |
| 27928 | { 14172, 7, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x9800f0066819ULL }, // Inst #14172 = VPERMPDZmbi |
| 27929 | { 14171, 4, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc78b70024829ULL }, // Inst #14171 = VPERMPDZ256rrkz |
| 27930 | { 14170, 5, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc38b70024829ULL }, // Inst #14170 = VPERMPDZ256rrk |
| 27931 | { 14169, 3, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18b70024829ULL }, // Inst #14169 = VPERMPDZ256rr |
| 27932 | { 14168, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc78b70024819ULL }, // Inst #14168 = VPERMPDZ256rmkz |
| 27933 | { 14167, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc38b70024819ULL }, // Inst #14167 = VPERMPDZ256rmk |
| 27934 | { 14166, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x978b70024819ULL }, // Inst #14166 = VPERMPDZ256rmbkz |
| 27935 | { 14165, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x938b70024819ULL }, // Inst #14165 = VPERMPDZ256rmbk |
| 27936 | { 14164, 7, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x918b70024819ULL }, // Inst #14164 = VPERMPDZ256rmb |
| 27937 | { 14163, 7, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18b70024819ULL }, // Inst #14163 = VPERMPDZ256rm |
| 27938 | { 14162, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4225, 0, 0xc700f0066829ULL }, // Inst #14162 = VPERMPDZ256rikz |
| 27939 | { 14161, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4220, 0, 0xc300f0066829ULL }, // Inst #14161 = VPERMPDZ256rik |
| 27940 | { 14160, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc100f0066829ULL }, // Inst #14160 = VPERMPDZ256ri |
| 27941 | { 14159, 8, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0xc700f0066819ULL }, // Inst #14159 = VPERMPDZ256mikz |
| 27942 | { 14158, 9, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0xc300f0066819ULL }, // Inst #14158 = VPERMPDZ256mik |
| 27943 | { 14157, 7, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc100f0066819ULL }, // Inst #14157 = VPERMPDZ256mi |
| 27944 | { 14156, 8, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0x9700f0066819ULL }, // Inst #14156 = VPERMPDZ256mbikz |
| 27945 | { 14155, 9, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0x9300f0066819ULL }, // Inst #14155 = VPERMPDZ256mbik |
| 27946 | { 14154, 7, 1, 0, 367, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x9100f0066819ULL }, // Inst #14154 = VPERMPDZ256mbi |
| 27947 | { 14153, 3, 1, 0, 1047, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x100b0066829ULL }, // Inst #14153 = VPERMPDYri |
| 27948 | { 14152, 7, 1, 0, 1049, 0, 0, X86ImpOpBase + 0, 5434, 0|(1ULL<<MCID::MayLoad), 0x100b0066819ULL }, // Inst #14152 = VPERMPDYmi |
| 27949 | { 14151, 3, 1, 0, 1417, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8628004829ULL }, // Inst #14151 = VPERMILPSrr |
| 27950 | { 14150, 7, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8628004819ULL }, // Inst #14150 = VPERMILPSrm |
| 27951 | { 14149, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 544, 0, 0x228046829ULL }, // Inst #14149 = VPERMILPSri |
| 27952 | { 14148, 7, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x228046819ULL }, // Inst #14148 = VPERMILPSmi |
| 27953 | { 14147, 4, 1, 0, 1142, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xee8668004829ULL }, // Inst #14147 = VPERMILPSZrrkz |
| 27954 | { 14146, 5, 1, 0, 1142, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xea8668004829ULL }, // Inst #14146 = VPERMILPSZrrk |
| 27955 | { 14145, 3, 1, 0, 1142, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe88668004829ULL }, // Inst #14145 = VPERMILPSZrr |
| 27956 | { 14144, 8, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee8668004819ULL }, // Inst #14144 = VPERMILPSZrmkz |
| 27957 | { 14143, 9, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea8668004819ULL }, // Inst #14143 = VPERMILPSZrmk |
| 27958 | { 14142, 8, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e8668004819ULL }, // Inst #14142 = VPERMILPSZrmbkz |
| 27959 | { 14141, 9, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a8668004819ULL }, // Inst #14141 = VPERMILPSZrmbk |
| 27960 | { 14140, 7, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x788668004819ULL }, // Inst #14140 = VPERMILPSZrmb |
| 27961 | { 14139, 7, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe88668004819ULL }, // Inst #14139 = VPERMILPSZrm |
| 27962 | { 14138, 4, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 4408, 0, 0xee0268046829ULL }, // Inst #14138 = VPERMILPSZrikz |
| 27963 | { 14137, 5, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 4403, 0, 0xea0268046829ULL }, // Inst #14137 = VPERMILPSZrik |
| 27964 | { 14136, 3, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe80268046829ULL }, // Inst #14136 = VPERMILPSZri |
| 27965 | { 14135, 8, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0xee0268046819ULL }, // Inst #14135 = VPERMILPSZmikz |
| 27966 | { 14134, 9, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0xea0268046819ULL }, // Inst #14134 = VPERMILPSZmik |
| 27967 | { 14133, 7, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe80268046819ULL }, // Inst #14133 = VPERMILPSZmi |
| 27968 | { 14132, 8, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4395, 0|(1ULL<<MCID::MayLoad), 0x7e0268046819ULL }, // Inst #14132 = VPERMILPSZmbikz |
| 27969 | { 14131, 9, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4386, 0|(1ULL<<MCID::MayLoad), 0x7a0268046819ULL }, // Inst #14131 = VPERMILPSZmbik |
| 27970 | { 14130, 7, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x780268046819ULL }, // Inst #14130 = VPERMILPSZmbi |
| 27971 | { 14129, 4, 1, 0, 1140, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc78668004829ULL }, // Inst #14129 = VPERMILPSZ256rrkz |
| 27972 | { 14128, 5, 1, 0, 1140, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc38668004829ULL }, // Inst #14128 = VPERMILPSZ256rrk |
| 27973 | { 14127, 3, 1, 0, 1140, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc18668004829ULL }, // Inst #14127 = VPERMILPSZ256rr |
| 27974 | { 14126, 8, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc78668004819ULL }, // Inst #14126 = VPERMILPSZ256rmkz |
| 27975 | { 14125, 9, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc38668004819ULL }, // Inst #14125 = VPERMILPSZ256rmk |
| 27976 | { 14124, 8, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x778668004819ULL }, // Inst #14124 = VPERMILPSZ256rmbkz |
| 27977 | { 14123, 9, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x738668004819ULL }, // Inst #14123 = VPERMILPSZ256rmbk |
| 27978 | { 14122, 7, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x718668004819ULL }, // Inst #14122 = VPERMILPSZ256rmb |
| 27979 | { 14121, 7, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc18668004819ULL }, // Inst #14121 = VPERMILPSZ256rm |
| 27980 | { 14120, 4, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 4382, 0, 0xc70268046829ULL }, // Inst #14120 = VPERMILPSZ256rikz |
| 27981 | { 14119, 5, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 4377, 0, 0xc30268046829ULL }, // Inst #14119 = VPERMILPSZ256rik |
| 27982 | { 14118, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc10268046829ULL }, // Inst #14118 = VPERMILPSZ256ri |
| 27983 | { 14117, 8, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0xc70268046819ULL }, // Inst #14117 = VPERMILPSZ256mikz |
| 27984 | { 14116, 9, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0xc30268046819ULL }, // Inst #14116 = VPERMILPSZ256mik |
| 27985 | { 14115, 7, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc10268046819ULL }, // Inst #14115 = VPERMILPSZ256mi |
| 27986 | { 14114, 8, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4369, 0|(1ULL<<MCID::MayLoad), 0x770268046819ULL }, // Inst #14114 = VPERMILPSZ256mbikz |
| 27987 | { 14113, 9, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4360, 0|(1ULL<<MCID::MayLoad), 0x730268046819ULL }, // Inst #14113 = VPERMILPSZ256mbik |
| 27988 | { 14112, 7, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x710268046819ULL }, // Inst #14112 = VPERMILPSZ256mbi |
| 27989 | { 14111, 4, 1, 0, 1141, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa68668004829ULL }, // Inst #14111 = VPERMILPSZ128rrkz |
| 27990 | { 14110, 5, 1, 0, 1141, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa28668004829ULL }, // Inst #14110 = VPERMILPSZ128rrk |
| 27991 | { 14109, 3, 1, 0, 1141, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08668004829ULL }, // Inst #14109 = VPERMILPSZ128rr |
| 27992 | { 14108, 8, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa68668004819ULL }, // Inst #14108 = VPERMILPSZ128rmkz |
| 27993 | { 14107, 9, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa28668004819ULL }, // Inst #14107 = VPERMILPSZ128rmk |
| 27994 | { 14106, 8, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x768668004819ULL }, // Inst #14106 = VPERMILPSZ128rmbkz |
| 27995 | { 14105, 9, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x728668004819ULL }, // Inst #14105 = VPERMILPSZ128rmbk |
| 27996 | { 14104, 7, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x708668004819ULL }, // Inst #14104 = VPERMILPSZ128rmb |
| 27997 | { 14103, 7, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa08668004819ULL }, // Inst #14103 = VPERMILPSZ128rm |
| 27998 | { 14102, 4, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 3044, 0, 0xa60268046829ULL }, // Inst #14102 = VPERMILPSZ128rikz |
| 27999 | { 14101, 5, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 3039, 0, 0xa20268046829ULL }, // Inst #14101 = VPERMILPSZ128rik |
| 28000 | { 14100, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa00268046829ULL }, // Inst #14100 = VPERMILPSZ128ri |
| 28001 | { 14099, 8, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0xa60268046819ULL }, // Inst #14099 = VPERMILPSZ128mikz |
| 28002 | { 14098, 9, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0xa20268046819ULL }, // Inst #14098 = VPERMILPSZ128mik |
| 28003 | { 14097, 7, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa00268046819ULL }, // Inst #14097 = VPERMILPSZ128mi |
| 28004 | { 14096, 8, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4352, 0|(1ULL<<MCID::MayLoad), 0x760268046819ULL }, // Inst #14096 = VPERMILPSZ128mbikz |
| 28005 | { 14095, 9, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4343, 0|(1ULL<<MCID::MayLoad), 0x720268046819ULL }, // Inst #14095 = VPERMILPSZ128mbik |
| 28006 | { 14094, 7, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x700268046819ULL }, // Inst #14094 = VPERMILPSZ128mbi |
| 28007 | { 14093, 3, 1, 0, 1140, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x18628004829ULL }, // Inst #14093 = VPERMILPSYrr |
| 28008 | { 14092, 7, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x18628004819ULL }, // Inst #14092 = VPERMILPSYrm |
| 28009 | { 14091, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x10228046829ULL }, // Inst #14091 = VPERMILPSYri |
| 28010 | { 14090, 7, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 5434, 0|(1ULL<<MCID::MayLoad), 0x10228046819ULL }, // Inst #14090 = VPERMILPSYmi |
| 28011 | { 14089, 3, 1, 0, 1417, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x86b0004829ULL }, // Inst #14089 = VPERMILPDrr |
| 28012 | { 14088, 7, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x86b0004819ULL }, // Inst #14088 = VPERMILPDrm |
| 28013 | { 14087, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 544, 0, 0x2b0046829ULL }, // Inst #14087 = VPERMILPDri |
| 28014 | { 14086, 7, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x2b0046819ULL }, // Inst #14086 = VPERMILPDmi |
| 28015 | { 14085, 4, 1, 0, 1142, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xee86f0024829ULL }, // Inst #14085 = VPERMILPDZrrkz |
| 28016 | { 14084, 5, 1, 0, 1142, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xea86f0024829ULL }, // Inst #14084 = VPERMILPDZrrk |
| 28017 | { 14083, 3, 1, 0, 1142, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe886f0024829ULL }, // Inst #14083 = VPERMILPDZrr |
| 28018 | { 14082, 8, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xee86f0024819ULL }, // Inst #14082 = VPERMILPDZrmkz |
| 28019 | { 14081, 9, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xea86f0024819ULL }, // Inst #14081 = VPERMILPDZrmk |
| 28020 | { 14080, 8, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9e86f0024819ULL }, // Inst #14080 = VPERMILPDZrmbkz |
| 28021 | { 14079, 9, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9a86f0024819ULL }, // Inst #14079 = VPERMILPDZrmbk |
| 28022 | { 14078, 7, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x9886f0024819ULL }, // Inst #14078 = VPERMILPDZrmb |
| 28023 | { 14077, 7, 1, 0, 523, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe886f0024819ULL }, // Inst #14077 = VPERMILPDZrm |
| 28024 | { 14076, 4, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 4261, 0, 0xee02f0066829ULL }, // Inst #14076 = VPERMILPDZrikz |
| 28025 | { 14075, 5, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 4256, 0, 0xea02f0066829ULL }, // Inst #14075 = VPERMILPDZrik |
| 28026 | { 14074, 3, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 4253, 0, 0xe802f0066829ULL }, // Inst #14074 = VPERMILPDZri |
| 28027 | { 14073, 8, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0xee02f0066819ULL }, // Inst #14073 = VPERMILPDZmikz |
| 28028 | { 14072, 9, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0xea02f0066819ULL }, // Inst #14072 = VPERMILPDZmik |
| 28029 | { 14071, 7, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0xe802f0066819ULL }, // Inst #14071 = VPERMILPDZmi |
| 28030 | { 14070, 8, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4245, 0|(1ULL<<MCID::MayLoad), 0x9e02f0066819ULL }, // Inst #14070 = VPERMILPDZmbikz |
| 28031 | { 14069, 9, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4236, 0|(1ULL<<MCID::MayLoad), 0x9a02f0066819ULL }, // Inst #14069 = VPERMILPDZmbik |
| 28032 | { 14068, 7, 1, 0, 474, 0, 0, X86ImpOpBase + 0, 4229, 0|(1ULL<<MCID::MayLoad), 0x9802f0066819ULL }, // Inst #14068 = VPERMILPDZmbi |
| 28033 | { 14067, 4, 1, 0, 1140, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc786f0024829ULL }, // Inst #14067 = VPERMILPDZ256rrkz |
| 28034 | { 14066, 5, 1, 0, 1140, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc386f0024829ULL }, // Inst #14066 = VPERMILPDZ256rrk |
| 28035 | { 14065, 3, 1, 0, 1140, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc186f0024829ULL }, // Inst #14065 = VPERMILPDZ256rr |
| 28036 | { 14064, 8, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc786f0024819ULL }, // Inst #14064 = VPERMILPDZ256rmkz |
| 28037 | { 14063, 9, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc386f0024819ULL }, // Inst #14063 = VPERMILPDZ256rmk |
| 28038 | { 14062, 8, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x9786f0024819ULL }, // Inst #14062 = VPERMILPDZ256rmbkz |
| 28039 | { 14061, 9, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x9386f0024819ULL }, // Inst #14061 = VPERMILPDZ256rmbk |
| 28040 | { 14060, 7, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x9186f0024819ULL }, // Inst #14060 = VPERMILPDZ256rmb |
| 28041 | { 14059, 7, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc186f0024819ULL }, // Inst #14059 = VPERMILPDZ256rm |
| 28042 | { 14058, 4, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 4225, 0, 0xc702f0066829ULL }, // Inst #14058 = VPERMILPDZ256rikz |
| 28043 | { 14057, 5, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 4220, 0, 0xc302f0066829ULL }, // Inst #14057 = VPERMILPDZ256rik |
| 28044 | { 14056, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 4217, 0, 0xc102f0066829ULL }, // Inst #14056 = VPERMILPDZ256ri |
| 28045 | { 14055, 8, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0xc702f0066819ULL }, // Inst #14055 = VPERMILPDZ256mikz |
| 28046 | { 14054, 9, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0xc302f0066819ULL }, // Inst #14054 = VPERMILPDZ256mik |
| 28047 | { 14053, 7, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0xc102f0066819ULL }, // Inst #14053 = VPERMILPDZ256mi |
| 28048 | { 14052, 8, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4209, 0|(1ULL<<MCID::MayLoad), 0x9702f0066819ULL }, // Inst #14052 = VPERMILPDZ256mbikz |
| 28049 | { 14051, 9, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4200, 0|(1ULL<<MCID::MayLoad), 0x9302f0066819ULL }, // Inst #14051 = VPERMILPDZ256mbik |
| 28050 | { 14050, 7, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 4193, 0|(1ULL<<MCID::MayLoad), 0x9102f0066819ULL }, // Inst #14050 = VPERMILPDZ256mbi |
| 28051 | { 14049, 4, 1, 0, 1141, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa686f0024829ULL }, // Inst #14049 = VPERMILPDZ128rrkz |
| 28052 | { 14048, 5, 1, 0, 1141, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa286f0024829ULL }, // Inst #14048 = VPERMILPDZ128rrk |
| 28053 | { 14047, 3, 1, 0, 1141, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa086f0024829ULL }, // Inst #14047 = VPERMILPDZ128rr |
| 28054 | { 14046, 8, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa686f0024819ULL }, // Inst #14046 = VPERMILPDZ128rmkz |
| 28055 | { 14045, 9, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa286f0024819ULL }, // Inst #14045 = VPERMILPDZ128rmk |
| 28056 | { 14044, 8, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x9686f0024819ULL }, // Inst #14044 = VPERMILPDZ128rmbkz |
| 28057 | { 14043, 9, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x9286f0024819ULL }, // Inst #14043 = VPERMILPDZ128rmbk |
| 28058 | { 14042, 7, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x9086f0024819ULL }, // Inst #14042 = VPERMILPDZ128rmb |
| 28059 | { 14041, 7, 1, 0, 1424, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa086f0024819ULL }, // Inst #14041 = VPERMILPDZ128rm |
| 28060 | { 14040, 4, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 4189, 0, 0xa602f0066829ULL }, // Inst #14040 = VPERMILPDZ128rikz |
| 28061 | { 14039, 5, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 4184, 0, 0xa202f0066829ULL }, // Inst #14039 = VPERMILPDZ128rik |
| 28062 | { 14038, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 3036, 0, 0xa002f0066829ULL }, // Inst #14038 = VPERMILPDZ128ri |
| 28063 | { 14037, 8, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0xa602f0066819ULL }, // Inst #14037 = VPERMILPDZ128mikz |
| 28064 | { 14036, 9, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0xa202f0066819ULL }, // Inst #14036 = VPERMILPDZ128mik |
| 28065 | { 14035, 7, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0xa002f0066819ULL }, // Inst #14035 = VPERMILPDZ128mi |
| 28066 | { 14034, 8, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4176, 0|(1ULL<<MCID::MayLoad), 0x9602f0066819ULL }, // Inst #14034 = VPERMILPDZ128mbikz |
| 28067 | { 14033, 9, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4167, 0|(1ULL<<MCID::MayLoad), 0x9202f0066819ULL }, // Inst #14033 = VPERMILPDZ128mbik |
| 28068 | { 14032, 7, 1, 0, 1423, 0, 0, X86ImpOpBase + 0, 4160, 0|(1ULL<<MCID::MayLoad), 0x9002f0066819ULL }, // Inst #14032 = VPERMILPDZ128mbi |
| 28069 | { 14031, 3, 1, 0, 1140, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x186b0004829ULL }, // Inst #14031 = VPERMILPDYrr |
| 28070 | { 14030, 7, 1, 0, 1427, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x186b0004819ULL }, // Inst #14030 = VPERMILPDYrm |
| 28071 | { 14029, 3, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 5441, 0, 0x102b0046829ULL }, // Inst #14029 = VPERMILPDYri |
| 28072 | { 14028, 7, 1, 0, 1426, 0, 0, X86ImpOpBase + 0, 5434, 0|(1ULL<<MCID::MayLoad), 0x102b0046819ULL }, // Inst #14028 = VPERMILPDYmi |
| 28073 | { 14027, 5, 1, 0, 520, 0, 0, X86ImpOpBase + 0, 5429, 0, 0xa4280e682bULL }, // Inst #14027 = VPERMIL2PSrr_REV |
| 28074 | { 14026, 5, 1, 0, 520, 0, 0, X86ImpOpBase + 0, 5429, 0, 0xa4280c6829ULL }, // Inst #14026 = VPERMIL2PSrr |
| 28075 | { 14025, 9, 1, 0, 519, 0, 0, X86ImpOpBase + 0, 5420, 0|(1ULL<<MCID::MayLoad), 0xa4280e681bULL }, // Inst #14025 = VPERMIL2PSrm |
| 28076 | { 14024, 9, 1, 0, 518, 0, 0, X86ImpOpBase + 0, 5411, 0|(1ULL<<MCID::MayLoad), 0xa4280c6819ULL }, // Inst #14024 = VPERMIL2PSmr |
| 28077 | { 14023, 5, 1, 0, 517, 0, 0, X86ImpOpBase + 0, 5406, 0, 0x1a4280e682bULL }, // Inst #14023 = VPERMIL2PSYrr_REV |
| 28078 | { 14022, 5, 1, 0, 517, 0, 0, X86ImpOpBase + 0, 5406, 0, 0x1a4280c6829ULL }, // Inst #14022 = VPERMIL2PSYrr |
| 28079 | { 14021, 9, 1, 0, 516, 0, 0, X86ImpOpBase + 0, 5397, 0|(1ULL<<MCID::MayLoad), 0x1a4280e681bULL }, // Inst #14021 = VPERMIL2PSYrm |
| 28080 | { 14020, 9, 1, 0, 515, 0, 0, X86ImpOpBase + 0, 5388, 0|(1ULL<<MCID::MayLoad), 0x1a4280c6819ULL }, // Inst #14020 = VPERMIL2PSYmr |
| 28081 | { 14019, 5, 1, 0, 520, 0, 0, X86ImpOpBase + 0, 5429, 0, 0xa4b00e682bULL }, // Inst #14019 = VPERMIL2PDrr_REV |
| 28082 | { 14018, 5, 1, 0, 520, 0, 0, X86ImpOpBase + 0, 5429, 0, 0xa4b00c6829ULL }, // Inst #14018 = VPERMIL2PDrr |
| 28083 | { 14017, 9, 1, 0, 519, 0, 0, X86ImpOpBase + 0, 5420, 0|(1ULL<<MCID::MayLoad), 0xa4b00e681bULL }, // Inst #14017 = VPERMIL2PDrm |
| 28084 | { 14016, 9, 1, 0, 518, 0, 0, X86ImpOpBase + 0, 5411, 0|(1ULL<<MCID::MayLoad), 0xa4b00c6819ULL }, // Inst #14016 = VPERMIL2PDmr |
| 28085 | { 14015, 5, 1, 0, 517, 0, 0, X86ImpOpBase + 0, 5406, 0, 0x1a4b00e682bULL }, // Inst #14015 = VPERMIL2PDYrr_REV |
| 28086 | { 14014, 5, 1, 0, 517, 0, 0, X86ImpOpBase + 0, 5406, 0, 0x1a4b00c6829ULL }, // Inst #14014 = VPERMIL2PDYrr |
| 28087 | { 14013, 9, 1, 0, 516, 0, 0, X86ImpOpBase + 0, 5397, 0|(1ULL<<MCID::MayLoad), 0x1a4b00e681bULL }, // Inst #14013 = VPERMIL2PDYrm |
| 28088 | { 14012, 9, 1, 0, 515, 0, 0, X86ImpOpBase + 0, 5388, 0|(1ULL<<MCID::MayLoad), 0x1a4b00c6819ULL }, // Inst #14012 = VPERMIL2PDYmr |
| 28089 | { 14011, 5, 1, 0, 1302, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeebaf8024829ULL }, // Inst #14011 = VPERMI2WZrrkz |
| 28090 | { 14010, 5, 1, 0, 1302, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeabaf8024829ULL }, // Inst #14010 = VPERMI2WZrrk |
| 28091 | { 14009, 4, 1, 0, 2297, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8baf8024829ULL }, // Inst #14009 = VPERMI2WZrr |
| 28092 | { 14008, 9, 1, 0, 2303, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebaf8024819ULL }, // Inst #14008 = VPERMI2WZrmkz |
| 28093 | { 14007, 9, 1, 0, 2303, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeabaf8024819ULL }, // Inst #14007 = VPERMI2WZrmk |
| 28094 | { 14006, 8, 1, 0, 2302, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8baf8024819ULL }, // Inst #14006 = VPERMI2WZrm |
| 28095 | { 14005, 5, 1, 0, 1301, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc7baf8024829ULL }, // Inst #14005 = VPERMI2WZ256rrkz |
| 28096 | { 14004, 5, 1, 0, 1301, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3baf8024829ULL }, // Inst #14004 = VPERMI2WZ256rrk |
| 28097 | { 14003, 4, 1, 0, 2287, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1baf8024829ULL }, // Inst #14003 = VPERMI2WZ256rr |
| 28098 | { 14002, 9, 1, 0, 2301, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7baf8024819ULL }, // Inst #14002 = VPERMI2WZ256rmkz |
| 28099 | { 14001, 9, 1, 0, 2301, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3baf8024819ULL }, // Inst #14001 = VPERMI2WZ256rmk |
| 28100 | { 14000, 8, 1, 0, 2300, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1baf8024819ULL }, // Inst #14000 = VPERMI2WZ256rm |
| 28101 | { 13999, 5, 1, 0, 1300, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa6baf8024829ULL }, // Inst #13999 = VPERMI2WZ128rrkz |
| 28102 | { 13998, 5, 1, 0, 1300, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2baf8024829ULL }, // Inst #13998 = VPERMI2WZ128rrk |
| 28103 | { 13997, 4, 1, 0, 2286, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0baf8024829ULL }, // Inst #13997 = VPERMI2WZ128rr |
| 28104 | { 13996, 9, 1, 0, 2298, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6baf8024819ULL }, // Inst #13996 = VPERMI2WZ128rmkz |
| 28105 | { 13995, 9, 1, 0, 2298, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2baf8024819ULL }, // Inst #13995 = VPERMI2WZ128rmk |
| 28106 | { 13994, 8, 1, 0, 2290, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0baf8024819ULL }, // Inst #13994 = VPERMI2WZ128rm |
| 28107 | { 13993, 5, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeebb78024829ULL }, // Inst #13993 = VPERMI2QZrrkz |
| 28108 | { 13992, 5, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeabb78024829ULL }, // Inst #13992 = VPERMI2QZrrk |
| 28109 | { 13991, 4, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8bb78024829ULL }, // Inst #13991 = VPERMI2QZrr |
| 28110 | { 13990, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebb78024819ULL }, // Inst #13990 = VPERMI2QZrmkz |
| 28111 | { 13989, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeabb78024819ULL }, // Inst #13989 = VPERMI2QZrmk |
| 28112 | { 13988, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9ebb78024819ULL }, // Inst #13988 = VPERMI2QZrmbkz |
| 28113 | { 13987, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9abb78024819ULL }, // Inst #13987 = VPERMI2QZrmbk |
| 28114 | { 13986, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x98bb78024819ULL }, // Inst #13986 = VPERMI2QZrmb |
| 28115 | { 13985, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bb78024819ULL }, // Inst #13985 = VPERMI2QZrm |
| 28116 | { 13984, 5, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc7bb78024829ULL }, // Inst #13984 = VPERMI2QZ256rrkz |
| 28117 | { 13983, 5, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3bb78024829ULL }, // Inst #13983 = VPERMI2QZ256rrk |
| 28118 | { 13982, 4, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1bb78024829ULL }, // Inst #13982 = VPERMI2QZ256rr |
| 28119 | { 13981, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bb78024819ULL }, // Inst #13981 = VPERMI2QZ256rmkz |
| 28120 | { 13980, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3bb78024819ULL }, // Inst #13980 = VPERMI2QZ256rmk |
| 28121 | { 13979, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x97bb78024819ULL }, // Inst #13979 = VPERMI2QZ256rmbkz |
| 28122 | { 13978, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93bb78024819ULL }, // Inst #13978 = VPERMI2QZ256rmbk |
| 28123 | { 13977, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x91bb78024819ULL }, // Inst #13977 = VPERMI2QZ256rmb |
| 28124 | { 13976, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bb78024819ULL }, // Inst #13976 = VPERMI2QZ256rm |
| 28125 | { 13975, 5, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa6bb78024829ULL }, // Inst #13975 = VPERMI2QZ128rrkz |
| 28126 | { 13974, 5, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2bb78024829ULL }, // Inst #13974 = VPERMI2QZ128rrk |
| 28127 | { 13973, 4, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0bb78024829ULL }, // Inst #13973 = VPERMI2QZ128rr |
| 28128 | { 13972, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bb78024819ULL }, // Inst #13972 = VPERMI2QZ128rmkz |
| 28129 | { 13971, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2bb78024819ULL }, // Inst #13971 = VPERMI2QZ128rmk |
| 28130 | { 13970, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x96bb78024819ULL }, // Inst #13970 = VPERMI2QZ128rmbkz |
| 28131 | { 13969, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92bb78024819ULL }, // Inst #13969 = VPERMI2QZ128rmbk |
| 28132 | { 13968, 8, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x90bb78024819ULL }, // Inst #13968 = VPERMI2QZ128rmb |
| 28133 | { 13967, 8, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bb78024819ULL }, // Inst #13967 = VPERMI2QZ128rm |
| 28134 | { 13966, 5, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeebbe8004829ULL }, // Inst #13966 = VPERMI2PSZrrkz |
| 28135 | { 13965, 5, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeabbe8004829ULL }, // Inst #13965 = VPERMI2PSZrrk |
| 28136 | { 13964, 4, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8bbe8004829ULL }, // Inst #13964 = VPERMI2PSZrr |
| 28137 | { 13963, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebbe8004819ULL }, // Inst #13963 = VPERMI2PSZrmkz |
| 28138 | { 13962, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeabbe8004819ULL }, // Inst #13962 = VPERMI2PSZrmk |
| 28139 | { 13961, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7ebbe8004819ULL }, // Inst #13961 = VPERMI2PSZrmbkz |
| 28140 | { 13960, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7abbe8004819ULL }, // Inst #13960 = VPERMI2PSZrmbk |
| 28141 | { 13959, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x78bbe8004819ULL }, // Inst #13959 = VPERMI2PSZrmb |
| 28142 | { 13958, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bbe8004819ULL }, // Inst #13958 = VPERMI2PSZrm |
| 28143 | { 13957, 5, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc7bbe8004829ULL }, // Inst #13957 = VPERMI2PSZ256rrkz |
| 28144 | { 13956, 5, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3bbe8004829ULL }, // Inst #13956 = VPERMI2PSZ256rrk |
| 28145 | { 13955, 4, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1bbe8004829ULL }, // Inst #13955 = VPERMI2PSZ256rr |
| 28146 | { 13954, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bbe8004819ULL }, // Inst #13954 = VPERMI2PSZ256rmkz |
| 28147 | { 13953, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3bbe8004819ULL }, // Inst #13953 = VPERMI2PSZ256rmk |
| 28148 | { 13952, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x77bbe8004819ULL }, // Inst #13952 = VPERMI2PSZ256rmbkz |
| 28149 | { 13951, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73bbe8004819ULL }, // Inst #13951 = VPERMI2PSZ256rmbk |
| 28150 | { 13950, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x71bbe8004819ULL }, // Inst #13950 = VPERMI2PSZ256rmb |
| 28151 | { 13949, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bbe8004819ULL }, // Inst #13949 = VPERMI2PSZ256rm |
| 28152 | { 13948, 5, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa6bbe8004829ULL }, // Inst #13948 = VPERMI2PSZ128rrkz |
| 28153 | { 13947, 5, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2bbe8004829ULL }, // Inst #13947 = VPERMI2PSZ128rrk |
| 28154 | { 13946, 4, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0bbe8004829ULL }, // Inst #13946 = VPERMI2PSZ128rr |
| 28155 | { 13945, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bbe8004819ULL }, // Inst #13945 = VPERMI2PSZ128rmkz |
| 28156 | { 13944, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2bbe8004819ULL }, // Inst #13944 = VPERMI2PSZ128rmk |
| 28157 | { 13943, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x76bbe8004819ULL }, // Inst #13943 = VPERMI2PSZ128rmbkz |
| 28158 | { 13942, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72bbe8004819ULL }, // Inst #13942 = VPERMI2PSZ128rmbk |
| 28159 | { 13941, 8, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x70bbe8004819ULL }, // Inst #13941 = VPERMI2PSZ128rmb |
| 28160 | { 13940, 8, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bbe8004819ULL }, // Inst #13940 = VPERMI2PSZ128rm |
| 28161 | { 13939, 5, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeebbf0024829ULL }, // Inst #13939 = VPERMI2PDZrrkz |
| 28162 | { 13938, 5, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeabbf0024829ULL }, // Inst #13938 = VPERMI2PDZrrk |
| 28163 | { 13937, 4, 1, 0, 1148, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8bbf0024829ULL }, // Inst #13937 = VPERMI2PDZrr |
| 28164 | { 13936, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebbf0024819ULL }, // Inst #13936 = VPERMI2PDZrmkz |
| 28165 | { 13935, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeabbf0024819ULL }, // Inst #13935 = VPERMI2PDZrmk |
| 28166 | { 13934, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9ebbf0024819ULL }, // Inst #13934 = VPERMI2PDZrmbkz |
| 28167 | { 13933, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9abbf0024819ULL }, // Inst #13933 = VPERMI2PDZrmbk |
| 28168 | { 13932, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x98bbf0024819ULL }, // Inst #13932 = VPERMI2PDZrmb |
| 28169 | { 13931, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bbf0024819ULL }, // Inst #13931 = VPERMI2PDZrm |
| 28170 | { 13930, 5, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc7bbf0024829ULL }, // Inst #13930 = VPERMI2PDZ256rrkz |
| 28171 | { 13929, 5, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3bbf0024829ULL }, // Inst #13929 = VPERMI2PDZ256rrk |
| 28172 | { 13928, 4, 1, 0, 1146, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1bbf0024829ULL }, // Inst #13928 = VPERMI2PDZ256rr |
| 28173 | { 13927, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bbf0024819ULL }, // Inst #13927 = VPERMI2PDZ256rmkz |
| 28174 | { 13926, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3bbf0024819ULL }, // Inst #13926 = VPERMI2PDZ256rmk |
| 28175 | { 13925, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x97bbf0024819ULL }, // Inst #13925 = VPERMI2PDZ256rmbkz |
| 28176 | { 13924, 9, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93bbf0024819ULL }, // Inst #13924 = VPERMI2PDZ256rmbk |
| 28177 | { 13923, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x91bbf0024819ULL }, // Inst #13923 = VPERMI2PDZ256rmb |
| 28178 | { 13922, 8, 1, 0, 513, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bbf0024819ULL }, // Inst #13922 = VPERMI2PDZ256rm |
| 28179 | { 13921, 5, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa6bbf0024829ULL }, // Inst #13921 = VPERMI2PDZ128rrkz |
| 28180 | { 13920, 5, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2bbf0024829ULL }, // Inst #13920 = VPERMI2PDZ128rrk |
| 28181 | { 13919, 4, 1, 0, 1143, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0bbf0024829ULL }, // Inst #13919 = VPERMI2PDZ128rr |
| 28182 | { 13918, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bbf0024819ULL }, // Inst #13918 = VPERMI2PDZ128rmkz |
| 28183 | { 13917, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2bbf0024819ULL }, // Inst #13917 = VPERMI2PDZ128rmk |
| 28184 | { 13916, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x96bbf0024819ULL }, // Inst #13916 = VPERMI2PDZ128rmbkz |
| 28185 | { 13915, 9, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92bbf0024819ULL }, // Inst #13915 = VPERMI2PDZ128rmbk |
| 28186 | { 13914, 8, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x90bbf0024819ULL }, // Inst #13914 = VPERMI2PDZ128rmb |
| 28187 | { 13913, 8, 1, 0, 1334, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bbf0024819ULL }, // Inst #13913 = VPERMI2PDZ128rm |
| 28188 | { 13912, 5, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeebb78004829ULL }, // Inst #13912 = VPERMI2DZrrkz |
| 28189 | { 13911, 5, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeabb78004829ULL }, // Inst #13911 = VPERMI2DZrrk |
| 28190 | { 13910, 4, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8bb78004829ULL }, // Inst #13910 = VPERMI2DZrr |
| 28191 | { 13909, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebb78004819ULL }, // Inst #13909 = VPERMI2DZrmkz |
| 28192 | { 13908, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeabb78004819ULL }, // Inst #13908 = VPERMI2DZrmk |
| 28193 | { 13907, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x7ebb78004819ULL }, // Inst #13907 = VPERMI2DZrmbkz |
| 28194 | { 13906, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7abb78004819ULL }, // Inst #13906 = VPERMI2DZrmbk |
| 28195 | { 13905, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x78bb78004819ULL }, // Inst #13905 = VPERMI2DZrmb |
| 28196 | { 13904, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8bb78004819ULL }, // Inst #13904 = VPERMI2DZrm |
| 28197 | { 13903, 5, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc7bb78004829ULL }, // Inst #13903 = VPERMI2DZ256rrkz |
| 28198 | { 13902, 5, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3bb78004829ULL }, // Inst #13902 = VPERMI2DZ256rrk |
| 28199 | { 13901, 4, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1bb78004829ULL }, // Inst #13901 = VPERMI2DZ256rr |
| 28200 | { 13900, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7bb78004819ULL }, // Inst #13900 = VPERMI2DZ256rmkz |
| 28201 | { 13899, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3bb78004819ULL }, // Inst #13899 = VPERMI2DZ256rmk |
| 28202 | { 13898, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x77bb78004819ULL }, // Inst #13898 = VPERMI2DZ256rmbkz |
| 28203 | { 13897, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73bb78004819ULL }, // Inst #13897 = VPERMI2DZ256rmbk |
| 28204 | { 13896, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x71bb78004819ULL }, // Inst #13896 = VPERMI2DZ256rmb |
| 28205 | { 13895, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1bb78004819ULL }, // Inst #13895 = VPERMI2DZ256rm |
| 28206 | { 13894, 5, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa6bb78004829ULL }, // Inst #13894 = VPERMI2DZ128rrkz |
| 28207 | { 13893, 5, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2bb78004829ULL }, // Inst #13893 = VPERMI2DZ128rrk |
| 28208 | { 13892, 4, 1, 0, 1691, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0bb78004829ULL }, // Inst #13892 = VPERMI2DZ128rr |
| 28209 | { 13891, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6bb78004819ULL }, // Inst #13891 = VPERMI2DZ128rmkz |
| 28210 | { 13890, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2bb78004819ULL }, // Inst #13890 = VPERMI2DZ128rmk |
| 28211 | { 13889, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x76bb78004819ULL }, // Inst #13889 = VPERMI2DZ128rmbkz |
| 28212 | { 13888, 9, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72bb78004819ULL }, // Inst #13888 = VPERMI2DZ128rmbk |
| 28213 | { 13887, 8, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x70bb78004819ULL }, // Inst #13887 = VPERMI2DZ128rmb |
| 28214 | { 13886, 8, 1, 0, 1333, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0bb78004819ULL }, // Inst #13886 = VPERMI2DZ128rm |
| 28215 | { 13885, 5, 1, 0, 2296, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xeebaf8004829ULL }, // Inst #13885 = VPERMI2BZrrkz |
| 28216 | { 13884, 5, 1, 0, 2296, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeabaf8004829ULL }, // Inst #13884 = VPERMI2BZrrk |
| 28217 | { 13883, 4, 1, 0, 2295, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8baf8004829ULL }, // Inst #13883 = VPERMI2BZrr |
| 28218 | { 13882, 9, 1, 0, 2293, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xeebaf8004819ULL }, // Inst #13882 = VPERMI2BZrmkz |
| 28219 | { 13881, 9, 1, 0, 2293, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeabaf8004819ULL }, // Inst #13881 = VPERMI2BZrmk |
| 28220 | { 13880, 8, 1, 0, 2292, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xe8baf8004819ULL }, // Inst #13880 = VPERMI2BZrm |
| 28221 | { 13879, 5, 1, 0, 2285, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc7baf8004829ULL }, // Inst #13879 = VPERMI2BZ256rrkz |
| 28222 | { 13878, 5, 1, 0, 2285, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3baf8004829ULL }, // Inst #13878 = VPERMI2BZ256rrk |
| 28223 | { 13877, 4, 1, 0, 2284, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1baf8004829ULL }, // Inst #13877 = VPERMI2BZ256rr |
| 28224 | { 13876, 9, 1, 0, 2289, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc7baf8004819ULL }, // Inst #13876 = VPERMI2BZ256rmkz |
| 28225 | { 13875, 9, 1, 0, 2289, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3baf8004819ULL }, // Inst #13875 = VPERMI2BZ256rmk |
| 28226 | { 13874, 8, 1, 0, 2288, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xc1baf8004819ULL }, // Inst #13874 = VPERMI2BZ256rm |
| 28227 | { 13873, 5, 1, 0, 1144, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa6baf8004829ULL }, // Inst #13873 = VPERMI2BZ128rrkz |
| 28228 | { 13872, 5, 1, 0, 1144, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2baf8004829ULL }, // Inst #13872 = VPERMI2BZ128rrk |
| 28229 | { 13871, 4, 1, 0, 2283, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0baf8004829ULL }, // Inst #13871 = VPERMI2BZ128rr |
| 28230 | { 13870, 9, 1, 0, 2281, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa6baf8004819ULL }, // Inst #13870 = VPERMI2BZ128rmkz |
| 28231 | { 13869, 9, 1, 0, 2281, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2baf8004819ULL }, // Inst #13869 = VPERMI2BZ128rmk |
| 28232 | { 13868, 8, 1, 0, 2277, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0xa0baf8004819ULL }, // Inst #13868 = VPERMI2BZ128rm |
| 28233 | { 13867, 4, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xee9b78004829ULL }, // Inst #13867 = VPERMDZrrkz |
| 28234 | { 13866, 5, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xea9b78004829ULL }, // Inst #13866 = VPERMDZrrk |
| 28235 | { 13865, 3, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe89b78004829ULL }, // Inst #13865 = VPERMDZrr |
| 28236 | { 13864, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xee9b78004819ULL }, // Inst #13864 = VPERMDZrmkz |
| 28237 | { 13863, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xea9b78004819ULL }, // Inst #13863 = VPERMDZrmk |
| 28238 | { 13862, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7e9b78004819ULL }, // Inst #13862 = VPERMDZrmbkz |
| 28239 | { 13861, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7a9b78004819ULL }, // Inst #13861 = VPERMDZrmbk |
| 28240 | { 13860, 7, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x789b78004819ULL }, // Inst #13860 = VPERMDZrmb |
| 28241 | { 13859, 7, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe89b78004819ULL }, // Inst #13859 = VPERMDZrm |
| 28242 | { 13858, 4, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc79b78004829ULL }, // Inst #13858 = VPERMDZ256rrkz |
| 28243 | { 13857, 5, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc39b78004829ULL }, // Inst #13857 = VPERMDZ256rrk |
| 28244 | { 13856, 3, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc19b78004829ULL }, // Inst #13856 = VPERMDZ256rr |
| 28245 | { 13855, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc79b78004819ULL }, // Inst #13855 = VPERMDZ256rmkz |
| 28246 | { 13854, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc39b78004819ULL }, // Inst #13854 = VPERMDZ256rmk |
| 28247 | { 13853, 8, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x779b78004819ULL }, // Inst #13853 = VPERMDZ256rmbkz |
| 28248 | { 13852, 9, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x739b78004819ULL }, // Inst #13852 = VPERMDZ256rmbk |
| 28249 | { 13851, 7, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x719b78004819ULL }, // Inst #13851 = VPERMDZ256rmb |
| 28250 | { 13850, 7, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc19b78004819ULL }, // Inst #13850 = VPERMDZ256rm |
| 28251 | { 13849, 3, 1, 0, 1072, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x19b38004829ULL }, // Inst #13849 = VPERMDYrr |
| 28252 | { 13848, 7, 1, 0, 1051, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19b38004819ULL }, // Inst #13848 = VPERMDYrm |
| 28253 | { 13847, 4, 1, 0, 2127, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeec6f8004829ULL }, // Inst #13847 = VPERMBZrrkz |
| 28254 | { 13846, 5, 1, 0, 2127, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeac6f8004829ULL }, // Inst #13846 = VPERMBZrrk |
| 28255 | { 13845, 3, 1, 0, 1689, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8c6f8004829ULL }, // Inst #13845 = VPERMBZrr |
| 28256 | { 13844, 8, 1, 0, 1850, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeec6f8004819ULL }, // Inst #13844 = VPERMBZrmkz |
| 28257 | { 13843, 9, 1, 0, 1850, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeac6f8004819ULL }, // Inst #13843 = VPERMBZrmk |
| 28258 | { 13842, 7, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8c6f8004819ULL }, // Inst #13842 = VPERMBZrm |
| 28259 | { 13841, 4, 1, 0, 2126, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc7c6f8004829ULL }, // Inst #13841 = VPERMBZ256rrkz |
| 28260 | { 13840, 5, 1, 0, 2126, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3c6f8004829ULL }, // Inst #13840 = VPERMBZ256rrk |
| 28261 | { 13839, 3, 1, 0, 1688, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1c6f8004829ULL }, // Inst #13839 = VPERMBZ256rr |
| 28262 | { 13838, 8, 1, 0, 1850, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7c6f8004819ULL }, // Inst #13838 = VPERMBZ256rmkz |
| 28263 | { 13837, 9, 1, 0, 1850, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3c6f8004819ULL }, // Inst #13837 = VPERMBZ256rmk |
| 28264 | { 13836, 7, 1, 0, 435, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1c6f8004819ULL }, // Inst #13836 = VPERMBZ256rm |
| 28265 | { 13835, 4, 1, 0, 2125, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa6c6f8004829ULL }, // Inst #13835 = VPERMBZ128rrkz |
| 28266 | { 13834, 5, 1, 0, 2125, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2c6f8004829ULL }, // Inst #13834 = VPERMBZ128rrk |
| 28267 | { 13833, 3, 1, 0, 1687, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0c6f8004829ULL }, // Inst #13833 = VPERMBZ128rr |
| 28268 | { 13832, 8, 1, 0, 1850, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6c6f8004819ULL }, // Inst #13832 = VPERMBZ128rmkz |
| 28269 | { 13831, 9, 1, 0, 1850, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2c6f8004819ULL }, // Inst #13831 = VPERMBZ128rmk |
| 28270 | { 13830, 7, 1, 0, 1674, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0c6f8004819ULL }, // Inst #13830 = VPERMBZ128rm |
| 28271 | { 13829, 4, 1, 0, 965, 0, 0, X86ImpOpBase + 0, 901, 0|(1ULL<<MCID::Commutable), 0x1a338046829ULL }, // Inst #13829 = VPERM2I128rr |
| 28272 | { 13828, 8, 1, 0, 967, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x1a338046819ULL }, // Inst #13828 = VPERM2I128rm |
| 28273 | { 13827, 4, 1, 0, 964, 0, 0, X86ImpOpBase + 0, 901, 0|(1ULL<<MCID::Commutable), 0x18328046829ULL }, // Inst #13827 = VPERM2F128rr |
| 28274 | { 13826, 8, 1, 0, 966, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x18328046819ULL }, // Inst #13826 = VPERM2F128rm |
| 28275 | { 13825, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0|(1ULL<<MCID::Commutable), 0xe920004029ULL }, // Inst #13825 = VPDPWUUDrr |
| 28276 | { 13824, 8, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xe920004019ULL }, // Inst #13824 = VPDPWUUDrm |
| 28277 | { 13823, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0|(1ULL<<MCID::Commutable), 0x1e920004029ULL }, // Inst #13823 = VPDPWUUDYrr |
| 28278 | { 13822, 8, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1e920004019ULL }, // Inst #13822 = VPDPWUUDYrm |
| 28279 | { 13821, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0|(1ULL<<MCID::Commutable), 0xe9a0004029ULL }, // Inst #13821 = VPDPWUUDSrr |
| 28280 | { 13820, 8, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xe9a0004019ULL }, // Inst #13820 = VPDPWUUDSrm |
| 28281 | { 13819, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0|(1ULL<<MCID::Commutable), 0x1e9a0004029ULL }, // Inst #13819 = VPDPWUUDSYrr |
| 28282 | { 13818, 8, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1e9a0004019ULL }, // Inst #13818 = VPDPWUUDSYrm |
| 28283 | { 13817, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0, 0xe920004829ULL }, // Inst #13817 = VPDPWUSDrr |
| 28284 | { 13816, 8, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xe920004819ULL }, // Inst #13816 = VPDPWUSDrm |
| 28285 | { 13815, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0, 0x1e920004829ULL }, // Inst #13815 = VPDPWUSDYrr |
| 28286 | { 13814, 8, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1e920004819ULL }, // Inst #13814 = VPDPWUSDYrm |
| 28287 | { 13813, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0, 0xe9a0004829ULL }, // Inst #13813 = VPDPWUSDSrr |
| 28288 | { 13812, 8, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xe9a0004819ULL }, // Inst #13812 = VPDPWUSDSrm |
| 28289 | { 13811, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0, 0x1e9a0004829ULL }, // Inst #13811 = VPDPWUSDSYrr |
| 28290 | { 13810, 8, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1e9a0004819ULL }, // Inst #13810 = VPDPWUSDSYrm |
| 28291 | { 13809, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0, 0xe920005029ULL }, // Inst #13809 = VPDPWSUDrr |
| 28292 | { 13808, 8, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xe920005019ULL }, // Inst #13808 = VPDPWSUDrm |
| 28293 | { 13807, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0, 0x1e920005029ULL }, // Inst #13807 = VPDPWSUDYrr |
| 28294 | { 13806, 8, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1e920005019ULL }, // Inst #13806 = VPDPWSUDYrm |
| 28295 | { 13805, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0, 0xe9a0005029ULL }, // Inst #13805 = VPDPWSUDSrr |
| 28296 | { 13804, 8, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xe9a0005019ULL }, // Inst #13804 = VPDPWSUDSrm |
| 28297 | { 13803, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0, 0x1e9a0005029ULL }, // Inst #13803 = VPDPWSUDSYrr |
| 28298 | { 13802, 8, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1e9a0005019ULL }, // Inst #13802 = VPDPWSUDSYrm |
| 28299 | { 13801, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0|(1ULL<<MCID::Commutable), 0x800a938004829ULL }, // Inst #13801 = VPDPWSSDrr |
| 28300 | { 13800, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0x800a938004819ULL }, // Inst #13800 = VPDPWSSDrm |
| 28301 | { 13799, 5, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeea978004829ULL }, // Inst #13799 = VPDPWSSDZrkz |
| 28302 | { 13798, 5, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeaa978004829ULL }, // Inst #13798 = VPDPWSSDZrk |
| 28303 | { 13797, 4, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8a978004829ULL }, // Inst #13797 = VPDPWSSDZr |
| 28304 | { 13796, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeea978004819ULL }, // Inst #13796 = VPDPWSSDZmkz |
| 28305 | { 13795, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaa978004819ULL }, // Inst #13795 = VPDPWSSDZmk |
| 28306 | { 13794, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7ea978004819ULL }, // Inst #13794 = VPDPWSSDZmbkz |
| 28307 | { 13793, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aa978004819ULL }, // Inst #13793 = VPDPWSSDZmbk |
| 28308 | { 13792, 8, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x78a978004819ULL }, // Inst #13792 = VPDPWSSDZmb |
| 28309 | { 13791, 8, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8a978004819ULL }, // Inst #13791 = VPDPWSSDZm |
| 28310 | { 13790, 5, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc7a978004829ULL }, // Inst #13790 = VPDPWSSDZ256rkz |
| 28311 | { 13789, 5, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3a978004829ULL }, // Inst #13789 = VPDPWSSDZ256rk |
| 28312 | { 13788, 4, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1a978004829ULL }, // Inst #13788 = VPDPWSSDZ256r |
| 28313 | { 13787, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc7a978004819ULL }, // Inst #13787 = VPDPWSSDZ256mkz |
| 28314 | { 13786, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3a978004819ULL }, // Inst #13786 = VPDPWSSDZ256mk |
| 28315 | { 13785, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x77a978004819ULL }, // Inst #13785 = VPDPWSSDZ256mbkz |
| 28316 | { 13784, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73a978004819ULL }, // Inst #13784 = VPDPWSSDZ256mbk |
| 28317 | { 13783, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x71a978004819ULL }, // Inst #13783 = VPDPWSSDZ256mb |
| 28318 | { 13782, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1a978004819ULL }, // Inst #13782 = VPDPWSSDZ256m |
| 28319 | { 13781, 5, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa6a978004829ULL }, // Inst #13781 = VPDPWSSDZ128rkz |
| 28320 | { 13780, 5, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2a978004829ULL }, // Inst #13780 = VPDPWSSDZ128rk |
| 28321 | { 13779, 4, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0a978004829ULL }, // Inst #13779 = VPDPWSSDZ128r |
| 28322 | { 13778, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa6a978004819ULL }, // Inst #13778 = VPDPWSSDZ128mkz |
| 28323 | { 13777, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2a978004819ULL }, // Inst #13777 = VPDPWSSDZ128mk |
| 28324 | { 13776, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x76a978004819ULL }, // Inst #13776 = VPDPWSSDZ128mbkz |
| 28325 | { 13775, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72a978004819ULL }, // Inst #13775 = VPDPWSSDZ128mbk |
| 28326 | { 13774, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x70a978004819ULL }, // Inst #13774 = VPDPWSSDZ128mb |
| 28327 | { 13773, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0a978004819ULL }, // Inst #13773 = VPDPWSSDZ128m |
| 28328 | { 13772, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0|(1ULL<<MCID::Commutable), 0x801a938004829ULL }, // Inst #13772 = VPDPWSSDYrr |
| 28329 | { 13771, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x801a938004819ULL }, // Inst #13771 = VPDPWSSDYrm |
| 28330 | { 13770, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0|(1ULL<<MCID::Commutable), 0x800a9b8004829ULL }, // Inst #13770 = VPDPWSSDSrr |
| 28331 | { 13769, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0x800a9b8004819ULL }, // Inst #13769 = VPDPWSSDSrm |
| 28332 | { 13768, 5, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeea9f8004829ULL }, // Inst #13768 = VPDPWSSDSZrkz |
| 28333 | { 13767, 5, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeaa9f8004829ULL }, // Inst #13767 = VPDPWSSDSZrk |
| 28334 | { 13766, 4, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 3313, 0|(1ULL<<MCID::Commutable), 0xe8a9f8004829ULL }, // Inst #13766 = VPDPWSSDSZr |
| 28335 | { 13765, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeea9f8004819ULL }, // Inst #13765 = VPDPWSSDSZmkz |
| 28336 | { 13764, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaa9f8004819ULL }, // Inst #13764 = VPDPWSSDSZmk |
| 28337 | { 13763, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7ea9f8004819ULL }, // Inst #13763 = VPDPWSSDSZmbkz |
| 28338 | { 13762, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aa9f8004819ULL }, // Inst #13762 = VPDPWSSDSZmbk |
| 28339 | { 13761, 8, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x78a9f8004819ULL }, // Inst #13761 = VPDPWSSDSZmb |
| 28340 | { 13760, 8, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8a9f8004819ULL }, // Inst #13760 = VPDPWSSDSZm |
| 28341 | { 13759, 5, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc7a9f8004829ULL }, // Inst #13759 = VPDPWSSDSZ256rkz |
| 28342 | { 13758, 5, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3a9f8004829ULL }, // Inst #13758 = VPDPWSSDSZ256rk |
| 28343 | { 13757, 4, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 3309, 0|(1ULL<<MCID::Commutable), 0xc1a9f8004829ULL }, // Inst #13757 = VPDPWSSDSZ256r |
| 28344 | { 13756, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc7a9f8004819ULL }, // Inst #13756 = VPDPWSSDSZ256mkz |
| 28345 | { 13755, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3a9f8004819ULL }, // Inst #13755 = VPDPWSSDSZ256mk |
| 28346 | { 13754, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x77a9f8004819ULL }, // Inst #13754 = VPDPWSSDSZ256mbkz |
| 28347 | { 13753, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73a9f8004819ULL }, // Inst #13753 = VPDPWSSDSZ256mbk |
| 28348 | { 13752, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x71a9f8004819ULL }, // Inst #13752 = VPDPWSSDSZ256mb |
| 28349 | { 13751, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1a9f8004819ULL }, // Inst #13751 = VPDPWSSDSZ256m |
| 28350 | { 13750, 5, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa6a9f8004829ULL }, // Inst #13750 = VPDPWSSDSZ128rkz |
| 28351 | { 13749, 5, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2a9f8004829ULL }, // Inst #13749 = VPDPWSSDSZ128rk |
| 28352 | { 13748, 4, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 3297, 0|(1ULL<<MCID::Commutable), 0xa0a9f8004829ULL }, // Inst #13748 = VPDPWSSDSZ128r |
| 28353 | { 13747, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa6a9f8004819ULL }, // Inst #13747 = VPDPWSSDSZ128mkz |
| 28354 | { 13746, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2a9f8004819ULL }, // Inst #13746 = VPDPWSSDSZ128mk |
| 28355 | { 13745, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x76a9f8004819ULL }, // Inst #13745 = VPDPWSSDSZ128mbkz |
| 28356 | { 13744, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72a9f8004819ULL }, // Inst #13744 = VPDPWSSDSZ128mbk |
| 28357 | { 13743, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x70a9f8004819ULL }, // Inst #13743 = VPDPWSSDSZ128mb |
| 28358 | { 13742, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0a9f8004819ULL }, // Inst #13742 = VPDPWSSDSZ128m |
| 28359 | { 13741, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0|(1ULL<<MCID::Commutable), 0x801a9b8004829ULL }, // Inst #13741 = VPDPWSSDSYrr |
| 28360 | { 13740, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x801a9b8004819ULL }, // Inst #13740 = VPDPWSSDSYrm |
| 28361 | { 13739, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0|(1ULL<<MCID::Commutable), 0xa820004029ULL }, // Inst #13739 = VPDPBUUDrr |
| 28362 | { 13738, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xa820004019ULL }, // Inst #13738 = VPDPBUUDrm |
| 28363 | { 13737, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0|(1ULL<<MCID::Commutable), 0x1a820004029ULL }, // Inst #13737 = VPDPBUUDYrr |
| 28364 | { 13736, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1a820004019ULL }, // Inst #13736 = VPDPBUUDYrm |
| 28365 | { 13735, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0|(1ULL<<MCID::Commutable), 0xa8a0004029ULL }, // Inst #13735 = VPDPBUUDSrr |
| 28366 | { 13734, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xa8a0004019ULL }, // Inst #13734 = VPDPBUUDSrm |
| 28367 | { 13733, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0|(1ULL<<MCID::Commutable), 0x1a8a0004029ULL }, // Inst #13733 = VPDPBUUDSYrr |
| 28368 | { 13732, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1a8a0004019ULL }, // Inst #13732 = VPDPBUUDSYrm |
| 28369 | { 13731, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0, 0x800a838004829ULL }, // Inst #13731 = VPDPBUSDrr |
| 28370 | { 13730, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0x800a838004819ULL }, // Inst #13730 = VPDPBUSDrm |
| 28371 | { 13729, 5, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeea878004829ULL }, // Inst #13729 = VPDPBUSDZrkz |
| 28372 | { 13728, 5, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeaa878004829ULL }, // Inst #13728 = VPDPBUSDZrk |
| 28373 | { 13727, 4, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 3313, 0, 0xe8a878004829ULL }, // Inst #13727 = VPDPBUSDZr |
| 28374 | { 13726, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeea878004819ULL }, // Inst #13726 = VPDPBUSDZmkz |
| 28375 | { 13725, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaa878004819ULL }, // Inst #13725 = VPDPBUSDZmk |
| 28376 | { 13724, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7ea878004819ULL }, // Inst #13724 = VPDPBUSDZmbkz |
| 28377 | { 13723, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aa878004819ULL }, // Inst #13723 = VPDPBUSDZmbk |
| 28378 | { 13722, 8, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x78a878004819ULL }, // Inst #13722 = VPDPBUSDZmb |
| 28379 | { 13721, 8, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8a878004819ULL }, // Inst #13721 = VPDPBUSDZm |
| 28380 | { 13720, 5, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc7a878004829ULL }, // Inst #13720 = VPDPBUSDZ256rkz |
| 28381 | { 13719, 5, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3a878004829ULL }, // Inst #13719 = VPDPBUSDZ256rk |
| 28382 | { 13718, 4, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 3309, 0, 0xc1a878004829ULL }, // Inst #13718 = VPDPBUSDZ256r |
| 28383 | { 13717, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc7a878004819ULL }, // Inst #13717 = VPDPBUSDZ256mkz |
| 28384 | { 13716, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3a878004819ULL }, // Inst #13716 = VPDPBUSDZ256mk |
| 28385 | { 13715, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x77a878004819ULL }, // Inst #13715 = VPDPBUSDZ256mbkz |
| 28386 | { 13714, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73a878004819ULL }, // Inst #13714 = VPDPBUSDZ256mbk |
| 28387 | { 13713, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x71a878004819ULL }, // Inst #13713 = VPDPBUSDZ256mb |
| 28388 | { 13712, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1a878004819ULL }, // Inst #13712 = VPDPBUSDZ256m |
| 28389 | { 13711, 5, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa6a878004829ULL }, // Inst #13711 = VPDPBUSDZ128rkz |
| 28390 | { 13710, 5, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2a878004829ULL }, // Inst #13710 = VPDPBUSDZ128rk |
| 28391 | { 13709, 4, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 3297, 0, 0xa0a878004829ULL }, // Inst #13709 = VPDPBUSDZ128r |
| 28392 | { 13708, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa6a878004819ULL }, // Inst #13708 = VPDPBUSDZ128mkz |
| 28393 | { 13707, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2a878004819ULL }, // Inst #13707 = VPDPBUSDZ128mk |
| 28394 | { 13706, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x76a878004819ULL }, // Inst #13706 = VPDPBUSDZ128mbkz |
| 28395 | { 13705, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72a878004819ULL }, // Inst #13705 = VPDPBUSDZ128mbk |
| 28396 | { 13704, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x70a878004819ULL }, // Inst #13704 = VPDPBUSDZ128mb |
| 28397 | { 13703, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0a878004819ULL }, // Inst #13703 = VPDPBUSDZ128m |
| 28398 | { 13702, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0, 0x801a838004829ULL }, // Inst #13702 = VPDPBUSDYrr |
| 28399 | { 13701, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x801a838004819ULL }, // Inst #13701 = VPDPBUSDYrm |
| 28400 | { 13700, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0, 0x800a8b8004829ULL }, // Inst #13700 = VPDPBUSDSrr |
| 28401 | { 13699, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0x800a8b8004819ULL }, // Inst #13699 = VPDPBUSDSrm |
| 28402 | { 13698, 5, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeea8f8004829ULL }, // Inst #13698 = VPDPBUSDSZrkz |
| 28403 | { 13697, 5, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeaa8f8004829ULL }, // Inst #13697 = VPDPBUSDSZrk |
| 28404 | { 13696, 4, 1, 0, 1085, 0, 0, X86ImpOpBase + 0, 3313, 0, 0xe8a8f8004829ULL }, // Inst #13696 = VPDPBUSDSZr |
| 28405 | { 13695, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeea8f8004819ULL }, // Inst #13695 = VPDPBUSDSZmkz |
| 28406 | { 13694, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaa8f8004819ULL }, // Inst #13694 = VPDPBUSDSZmk |
| 28407 | { 13693, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7ea8f8004819ULL }, // Inst #13693 = VPDPBUSDSZmbkz |
| 28408 | { 13692, 9, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aa8f8004819ULL }, // Inst #13692 = VPDPBUSDSZmbk |
| 28409 | { 13691, 8, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x78a8f8004819ULL }, // Inst #13691 = VPDPBUSDSZmb |
| 28410 | { 13690, 8, 1, 0, 512, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8a8f8004819ULL }, // Inst #13690 = VPDPBUSDSZm |
| 28411 | { 13689, 5, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc7a8f8004829ULL }, // Inst #13689 = VPDPBUSDSZ256rkz |
| 28412 | { 13688, 5, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3a8f8004829ULL }, // Inst #13688 = VPDPBUSDSZ256rk |
| 28413 | { 13687, 4, 1, 0, 1084, 0, 0, X86ImpOpBase + 0, 3309, 0, 0xc1a8f8004829ULL }, // Inst #13687 = VPDPBUSDSZ256r |
| 28414 | { 13686, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc7a8f8004819ULL }, // Inst #13686 = VPDPBUSDSZ256mkz |
| 28415 | { 13685, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3a8f8004819ULL }, // Inst #13685 = VPDPBUSDSZ256mk |
| 28416 | { 13684, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x77a8f8004819ULL }, // Inst #13684 = VPDPBUSDSZ256mbkz |
| 28417 | { 13683, 9, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73a8f8004819ULL }, // Inst #13683 = VPDPBUSDSZ256mbk |
| 28418 | { 13682, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x71a8f8004819ULL }, // Inst #13682 = VPDPBUSDSZ256mb |
| 28419 | { 13681, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1a8f8004819ULL }, // Inst #13681 = VPDPBUSDSZ256m |
| 28420 | { 13680, 5, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa6a8f8004829ULL }, // Inst #13680 = VPDPBUSDSZ128rkz |
| 28421 | { 13679, 5, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2a8f8004829ULL }, // Inst #13679 = VPDPBUSDSZ128rk |
| 28422 | { 13678, 4, 1, 0, 1083, 0, 0, X86ImpOpBase + 0, 3297, 0, 0xa0a8f8004829ULL }, // Inst #13678 = VPDPBUSDSZ128r |
| 28423 | { 13677, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa6a8f8004819ULL }, // Inst #13677 = VPDPBUSDSZ128mkz |
| 28424 | { 13676, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2a8f8004819ULL }, // Inst #13676 = VPDPBUSDSZ128mk |
| 28425 | { 13675, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x76a8f8004819ULL }, // Inst #13675 = VPDPBUSDSZ128mbkz |
| 28426 | { 13674, 9, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72a8f8004819ULL }, // Inst #13674 = VPDPBUSDSZ128mbk |
| 28427 | { 13673, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x70a8f8004819ULL }, // Inst #13673 = VPDPBUSDSZ128mb |
| 28428 | { 13672, 8, 1, 0, 511, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0a8f8004819ULL }, // Inst #13672 = VPDPBUSDSZ128m |
| 28429 | { 13671, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0, 0x801a8b8004829ULL }, // Inst #13671 = VPDPBUSDSYrr |
| 28430 | { 13670, 8, 1, 0, 510, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x801a8b8004819ULL }, // Inst #13670 = VPDPBUSDSYrm |
| 28431 | { 13669, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0, 0xa820005029ULL }, // Inst #13669 = VPDPBSUDrr |
| 28432 | { 13668, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xa820005019ULL }, // Inst #13668 = VPDPBSUDrm |
| 28433 | { 13667, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0, 0x1a820005029ULL }, // Inst #13667 = VPDPBSUDYrr |
| 28434 | { 13666, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1a820005019ULL }, // Inst #13666 = VPDPBSUDYrm |
| 28435 | { 13665, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0, 0xa8a0005029ULL }, // Inst #13665 = VPDPBSUDSrr |
| 28436 | { 13664, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xa8a0005019ULL }, // Inst #13664 = VPDPBSUDSrm |
| 28437 | { 13663, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0, 0x1a8a0005029ULL }, // Inst #13663 = VPDPBSUDSYrr |
| 28438 | { 13662, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1a8a0005019ULL }, // Inst #13662 = VPDPBSUDSYrm |
| 28439 | { 13661, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0|(1ULL<<MCID::Commutable), 0xa820005829ULL }, // Inst #13661 = VPDPBSSDrr |
| 28440 | { 13660, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xa820005819ULL }, // Inst #13660 = VPDPBSSDrm |
| 28441 | { 13659, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0|(1ULL<<MCID::Commutable), 0x1a820005829ULL }, // Inst #13659 = VPDPBSSDYrr |
| 28442 | { 13658, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1a820005819ULL }, // Inst #13658 = VPDPBSSDYrm |
| 28443 | { 13657, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 3716, 0|(1ULL<<MCID::Commutable), 0xa8a0005829ULL }, // Inst #13657 = VPDPBSSDSrr |
| 28444 | { 13656, 8, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 3708, 0|(1ULL<<MCID::MayLoad), 0xa8a0005819ULL }, // Inst #13656 = VPDPBSSDSrm |
| 28445 | { 13655, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 3699, 0|(1ULL<<MCID::Commutable), 0x1a8a0005829ULL }, // Inst #13655 = VPDPBSSDSYrr |
| 28446 | { 13654, 8, 1, 0, 449, 0, 0, X86ImpOpBase + 0, 3691, 0|(1ULL<<MCID::MayLoad), 0x1a8a0005819ULL }, // Inst #13654 = VPDPBSSDSYrm |
| 28447 | { 13653, 3, 1, 0, 2280, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee6278024829ULL }, // Inst #13653 = VPCONFLICTQZrrkz |
| 28448 | { 13652, 4, 1, 0, 1400, 0, 0, X86ImpOpBase + 0, 2740, 0, 0xea6278024829ULL }, // Inst #13652 = VPCONFLICTQZrrk |
| 28449 | { 13651, 2, 1, 0, 2280, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe86278024829ULL }, // Inst #13651 = VPCONFLICTQZrr |
| 28450 | { 13650, 7, 1, 0, 2279, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xee6278024819ULL }, // Inst #13650 = VPCONFLICTQZrmkz |
| 28451 | { 13649, 8, 1, 0, 2279, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xea6278024819ULL }, // Inst #13649 = VPCONFLICTQZrmk |
| 28452 | { 13648, 7, 1, 0, 1402, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x9e6278024819ULL }, // Inst #13648 = VPCONFLICTQZrmbkz |
| 28453 | { 13647, 8, 1, 0, 2279, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0x9a6278024819ULL }, // Inst #13647 = VPCONFLICTQZrmbk |
| 28454 | { 13646, 6, 1, 0, 2279, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x986278024819ULL }, // Inst #13646 = VPCONFLICTQZrmb |
| 28455 | { 13645, 6, 1, 0, 2279, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe86278024819ULL }, // Inst #13645 = VPCONFLICTQZrm |
| 28456 | { 13644, 3, 1, 0, 1398, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc76278024829ULL }, // Inst #13644 = VPCONFLICTQZ256rrkz |
| 28457 | { 13643, 4, 1, 0, 1398, 0, 0, X86ImpOpBase + 0, 2718, 0, 0xc36278024829ULL }, // Inst #13643 = VPCONFLICTQZ256rrk |
| 28458 | { 13642, 2, 1, 0, 1398, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc16278024829ULL }, // Inst #13642 = VPCONFLICTQZ256rr |
| 28459 | { 13641, 7, 1, 0, 2278, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xc76278024819ULL }, // Inst #13641 = VPCONFLICTQZ256rmkz |
| 28460 | { 13640, 8, 1, 0, 2278, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xc36278024819ULL }, // Inst #13640 = VPCONFLICTQZ256rmk |
| 28461 | { 13639, 7, 1, 0, 1399, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x976278024819ULL }, // Inst #13639 = VPCONFLICTQZ256rmbkz |
| 28462 | { 13638, 8, 1, 0, 2278, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x936278024819ULL }, // Inst #13638 = VPCONFLICTQZ256rmbk |
| 28463 | { 13637, 6, 1, 0, 2278, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x916278024819ULL }, // Inst #13637 = VPCONFLICTQZ256rmb |
| 28464 | { 13636, 6, 1, 0, 2278, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc16278024819ULL }, // Inst #13636 = VPCONFLICTQZ256rm |
| 28465 | { 13635, 3, 1, 0, 1269, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa66278024829ULL }, // Inst #13635 = VPCONFLICTQZ128rrkz |
| 28466 | { 13634, 4, 1, 0, 1269, 0, 0, X86ImpOpBase + 0, 2702, 0, 0xa26278024829ULL }, // Inst #13634 = VPCONFLICTQZ128rrk |
| 28467 | { 13633, 2, 1, 0, 1269, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa06278024829ULL }, // Inst #13633 = VPCONFLICTQZ128rr |
| 28468 | { 13632, 7, 1, 0, 2276, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0xa66278024819ULL }, // Inst #13632 = VPCONFLICTQZ128rmkz |
| 28469 | { 13631, 8, 1, 0, 2276, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0xa26278024819ULL }, // Inst #13631 = VPCONFLICTQZ128rmk |
| 28470 | { 13630, 7, 1, 0, 1376, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x966278024819ULL }, // Inst #13630 = VPCONFLICTQZ128rmbkz |
| 28471 | { 13629, 8, 1, 0, 2276, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x926278024819ULL }, // Inst #13629 = VPCONFLICTQZ128rmbk |
| 28472 | { 13628, 6, 1, 0, 2276, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x906278024819ULL }, // Inst #13628 = VPCONFLICTQZ128rmb |
| 28473 | { 13627, 6, 1, 0, 2276, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa06278024819ULL }, // Inst #13627 = VPCONFLICTQZ128rm |
| 28474 | { 13626, 3, 1, 0, 2275, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee6278004829ULL }, // Inst #13626 = VPCONFLICTDZrrkz |
| 28475 | { 13625, 4, 1, 0, 1136, 0, 0, X86ImpOpBase + 0, 2775, 0, 0xea6278004829ULL }, // Inst #13625 = VPCONFLICTDZrrk |
| 28476 | { 13624, 2, 1, 0, 2275, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe86278004829ULL }, // Inst #13624 = VPCONFLICTDZrr |
| 28477 | { 13623, 7, 1, 0, 2274, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xee6278004819ULL }, // Inst #13623 = VPCONFLICTDZrmkz |
| 28478 | { 13622, 8, 1, 0, 2274, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xea6278004819ULL }, // Inst #13622 = VPCONFLICTDZrmk |
| 28479 | { 13621, 7, 1, 0, 1403, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0x7e6278004819ULL }, // Inst #13621 = VPCONFLICTDZrmbkz |
| 28480 | { 13620, 8, 1, 0, 2274, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0x7a6278004819ULL }, // Inst #13620 = VPCONFLICTDZrmbk |
| 28481 | { 13619, 6, 1, 0, 2274, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x786278004819ULL }, // Inst #13619 = VPCONFLICTDZrmb |
| 28482 | { 13618, 6, 1, 0, 2274, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe86278004819ULL }, // Inst #13618 = VPCONFLICTDZrm |
| 28483 | { 13617, 3, 1, 0, 1135, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc76278004829ULL }, // Inst #13617 = VPCONFLICTDZ256rrkz |
| 28484 | { 13616, 4, 1, 0, 1135, 0, 0, X86ImpOpBase + 0, 2761, 0, 0xc36278004829ULL }, // Inst #13616 = VPCONFLICTDZ256rrk |
| 28485 | { 13615, 2, 1, 0, 1135, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc16278004829ULL }, // Inst #13615 = VPCONFLICTDZ256rr |
| 28486 | { 13614, 7, 1, 0, 2273, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xc76278004819ULL }, // Inst #13614 = VPCONFLICTDZ256rmkz |
| 28487 | { 13613, 8, 1, 0, 2273, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0xc36278004819ULL }, // Inst #13613 = VPCONFLICTDZ256rmk |
| 28488 | { 13612, 7, 1, 0, 1401, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x776278004819ULL }, // Inst #13612 = VPCONFLICTDZ256rmbkz |
| 28489 | { 13611, 8, 1, 0, 2273, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0x736278004819ULL }, // Inst #13611 = VPCONFLICTDZ256rmbk |
| 28490 | { 13610, 6, 1, 0, 2273, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x716278004819ULL }, // Inst #13610 = VPCONFLICTDZ256rmb |
| 28491 | { 13609, 6, 1, 0, 2273, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc16278004819ULL }, // Inst #13609 = VPCONFLICTDZ256rm |
| 28492 | { 13608, 3, 1, 0, 1134, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa66278004829ULL }, // Inst #13608 = VPCONFLICTDZ128rrkz |
| 28493 | { 13607, 4, 1, 0, 1134, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa26278004829ULL }, // Inst #13607 = VPCONFLICTDZ128rrk |
| 28494 | { 13606, 2, 1, 0, 1134, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa06278004829ULL }, // Inst #13606 = VPCONFLICTDZ128rr |
| 28495 | { 13605, 7, 1, 0, 2272, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa66278004819ULL }, // Inst #13605 = VPCONFLICTDZ128rmkz |
| 28496 | { 13604, 8, 1, 0, 2272, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0xa26278004819ULL }, // Inst #13604 = VPCONFLICTDZ128rmk |
| 28497 | { 13603, 7, 1, 0, 1390, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x766278004819ULL }, // Inst #13603 = VPCONFLICTDZ128rmbkz |
| 28498 | { 13602, 8, 1, 0, 2272, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x726278004819ULL }, // Inst #13602 = VPCONFLICTDZ128rmbk |
| 28499 | { 13601, 6, 1, 0, 2272, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x706278004819ULL }, // Inst #13601 = VPCONFLICTDZ128rmb |
| 28500 | { 13600, 6, 1, 0, 2272, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa06278004819ULL }, // Inst #13600 = VPCONFLICTDZ128rm |
| 28501 | { 13599, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0xe6d8048029ULL }, // Inst #13599 = VPCOMWri |
| 28502 | { 13598, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xe6d8048019ULL }, // Inst #13598 = VPCOMWmi |
| 28503 | { 13597, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0xf6d8048029ULL }, // Inst #13597 = VPCOMUWri |
| 28504 | { 13596, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xf6d8048019ULL }, // Inst #13596 = VPCOMUWmi |
| 28505 | { 13595, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0xf7d8048029ULL }, // Inst #13595 = VPCOMUQri |
| 28506 | { 13594, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xf7d8048019ULL }, // Inst #13594 = VPCOMUQmi |
| 28507 | { 13593, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0xf758048029ULL }, // Inst #13593 = VPCOMUDri |
| 28508 | { 13592, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xf758048019ULL }, // Inst #13592 = VPCOMUDmi |
| 28509 | { 13591, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0xf658048029ULL }, // Inst #13591 = VPCOMUBri |
| 28510 | { 13590, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xf658048019ULL }, // Inst #13590 = VPCOMUBmi |
| 28511 | { 13589, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0xe7d8048029ULL }, // Inst #13589 = VPCOMQri |
| 28512 | { 13588, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xe7d8048019ULL }, // Inst #13588 = VPCOMQmi |
| 28513 | { 13587, 3, 1, 0, 1149, 0, 0, X86ImpOpBase + 0, 3008, 0, 0xee31f8024828ULL }, // Inst #13587 = VPCOMPRESSWZrrkz |
| 28514 | { 13586, 4, 1, 0, 1149, 0, 0, X86ImpOpBase + 0, 3004, 0, 0xea31f8024828ULL }, // Inst #13586 = VPCOMPRESSWZrrk |
| 28515 | { 13585, 2, 1, 0, 1944, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe831f8024828ULL }, // Inst #13585 = VPCOMPRESSWZrr |
| 28516 | { 13584, 7, 0, 0, 2269, 0, 0, X86ImpOpBase + 0, 4718, 0|(1ULL<<MCID::MayStore), 0x4a31f8024818ULL }, // Inst #13584 = VPCOMPRESSWZmrk |
| 28517 | { 13583, 6, 0, 0, 2267, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0x4831f8024818ULL }, // Inst #13583 = VPCOMPRESSWZmr |
| 28518 | { 13582, 3, 1, 0, 1147, 0, 0, X86ImpOpBase + 0, 2977, 0, 0xc731f8024828ULL }, // Inst #13582 = VPCOMPRESSWZ256rrkz |
| 28519 | { 13581, 4, 1, 0, 1147, 0, 0, X86ImpOpBase + 0, 2973, 0, 0xc331f8024828ULL }, // Inst #13581 = VPCOMPRESSWZ256rrk |
| 28520 | { 13580, 2, 1, 0, 1943, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc131f8024828ULL }, // Inst #13580 = VPCOMPRESSWZ256rr |
| 28521 | { 13579, 7, 0, 0, 2268, 0, 0, X86ImpOpBase + 0, 4711, 0|(1ULL<<MCID::MayStore), 0x4331f8024818ULL }, // Inst #13579 = VPCOMPRESSWZ256mrk |
| 28522 | { 13578, 6, 0, 0, 2266, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x4131f8024818ULL }, // Inst #13578 = VPCOMPRESSWZ256mr |
| 28523 | { 13577, 3, 1, 0, 1145, 0, 0, X86ImpOpBase + 0, 2970, 0, 0xa631f8024828ULL }, // Inst #13577 = VPCOMPRESSWZ128rrkz |
| 28524 | { 13576, 4, 1, 0, 1145, 0, 0, X86ImpOpBase + 0, 2966, 0, 0xa231f8024828ULL }, // Inst #13576 = VPCOMPRESSWZ128rrk |
| 28525 | { 13575, 2, 1, 0, 1942, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa031f8024828ULL }, // Inst #13575 = VPCOMPRESSWZ128rr |
| 28526 | { 13574, 7, 0, 0, 2268, 0, 0, X86ImpOpBase + 0, 4704, 0|(1ULL<<MCID::MayStore), 0x4231f8024818ULL }, // Inst #13574 = VPCOMPRESSWZ128mrk |
| 28527 | { 13573, 6, 0, 0, 2266, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x4031f8024818ULL }, // Inst #13573 = VPCOMPRESSWZ128mr |
| 28528 | { 13572, 3, 1, 0, 1276, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee45f8024828ULL }, // Inst #13572 = VPCOMPRESSQZrrkz |
| 28529 | { 13571, 4, 1, 0, 1276, 0, 0, X86ImpOpBase + 0, 2740, 0, 0xea45f8024828ULL }, // Inst #13571 = VPCOMPRESSQZrrk |
| 28530 | { 13570, 2, 1, 0, 1940, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe845f8024828ULL }, // Inst #13570 = VPCOMPRESSQZrr |
| 28531 | { 13569, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0x8a45f8024818ULL }, // Inst #13569 = VPCOMPRESSQZmrk |
| 28532 | { 13568, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0x8845f8024818ULL }, // Inst #13568 = VPCOMPRESSQZmr |
| 28533 | { 13567, 3, 1, 0, 1275, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc745f8024828ULL }, // Inst #13567 = VPCOMPRESSQZ256rrkz |
| 28534 | { 13566, 4, 1, 0, 1275, 0, 0, X86ImpOpBase + 0, 2718, 0, 0xc345f8024828ULL }, // Inst #13566 = VPCOMPRESSQZ256rrk |
| 28535 | { 13565, 2, 1, 0, 1939, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc145f8024828ULL }, // Inst #13565 = VPCOMPRESSQZ256rr |
| 28536 | { 13564, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0x8345f8024818ULL }, // Inst #13564 = VPCOMPRESSQZ256mrk |
| 28537 | { 13563, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x8145f8024818ULL }, // Inst #13563 = VPCOMPRESSQZ256mr |
| 28538 | { 13562, 3, 1, 0, 1274, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa645f8024828ULL }, // Inst #13562 = VPCOMPRESSQZ128rrkz |
| 28539 | { 13561, 4, 1, 0, 1274, 0, 0, X86ImpOpBase + 0, 2702, 0, 0xa245f8024828ULL }, // Inst #13561 = VPCOMPRESSQZ128rrk |
| 28540 | { 13560, 2, 1, 0, 1938, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa045f8024828ULL }, // Inst #13560 = VPCOMPRESSQZ128rr |
| 28541 | { 13559, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x8245f8024818ULL }, // Inst #13559 = VPCOMPRESSQZ128mrk |
| 28542 | { 13558, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x8045f8024818ULL }, // Inst #13558 = VPCOMPRESSQZ128mr |
| 28543 | { 13557, 3, 1, 0, 1276, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee45f8004828ULL }, // Inst #13557 = VPCOMPRESSDZrrkz |
| 28544 | { 13556, 4, 1, 0, 1276, 0, 0, X86ImpOpBase + 0, 2775, 0, 0xea45f8004828ULL }, // Inst #13556 = VPCOMPRESSDZrrk |
| 28545 | { 13555, 2, 1, 0, 1940, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe845f8004828ULL }, // Inst #13555 = VPCOMPRESSDZrr |
| 28546 | { 13554, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0x6a45f8004818ULL }, // Inst #13554 = VPCOMPRESSDZmrk |
| 28547 | { 13553, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0x6845f8004818ULL }, // Inst #13553 = VPCOMPRESSDZmr |
| 28548 | { 13552, 3, 1, 0, 1275, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc745f8004828ULL }, // Inst #13552 = VPCOMPRESSDZ256rrkz |
| 28549 | { 13551, 4, 1, 0, 1275, 0, 0, X86ImpOpBase + 0, 2761, 0, 0xc345f8004828ULL }, // Inst #13551 = VPCOMPRESSDZ256rrk |
| 28550 | { 13550, 2, 1, 0, 1939, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc145f8004828ULL }, // Inst #13550 = VPCOMPRESSDZ256rr |
| 28551 | { 13549, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0x6345f8004818ULL }, // Inst #13549 = VPCOMPRESSDZ256mrk |
| 28552 | { 13548, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x6145f8004818ULL }, // Inst #13548 = VPCOMPRESSDZ256mr |
| 28553 | { 13547, 3, 1, 0, 1274, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa645f8004828ULL }, // Inst #13547 = VPCOMPRESSDZ128rrkz |
| 28554 | { 13546, 4, 1, 0, 1274, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa245f8004828ULL }, // Inst #13546 = VPCOMPRESSDZ128rrk |
| 28555 | { 13545, 2, 1, 0, 1938, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa045f8004828ULL }, // Inst #13545 = VPCOMPRESSDZ128rr |
| 28556 | { 13544, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0x6245f8004818ULL }, // Inst #13544 = VPCOMPRESSDZ128mrk |
| 28557 | { 13543, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x6045f8004818ULL }, // Inst #13543 = VPCOMPRESSDZ128mr |
| 28558 | { 13542, 3, 1, 0, 1149, 0, 0, X86ImpOpBase + 0, 4809, 0, 0xee31f8004828ULL }, // Inst #13542 = VPCOMPRESSBZrrkz |
| 28559 | { 13541, 4, 1, 0, 1149, 0, 0, X86ImpOpBase + 0, 4805, 0, 0xea31f8004828ULL }, // Inst #13541 = VPCOMPRESSBZrrk |
| 28560 | { 13540, 2, 1, 0, 1944, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe831f8004828ULL }, // Inst #13540 = VPCOMPRESSBZrr |
| 28561 | { 13539, 7, 0, 0, 2271, 0, 0, X86ImpOpBase + 0, 4783, 0|(1ULL<<MCID::MayStore), 0x2a31f8004818ULL }, // Inst #13539 = VPCOMPRESSBZmrk |
| 28562 | { 13538, 6, 0, 0, 2270, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0x2831f8004818ULL }, // Inst #13538 = VPCOMPRESSBZmr |
| 28563 | { 13537, 3, 1, 0, 1147, 0, 0, X86ImpOpBase + 0, 4780, 0, 0xc731f8004828ULL }, // Inst #13537 = VPCOMPRESSBZ256rrkz |
| 28564 | { 13536, 4, 1, 0, 1147, 0, 0, X86ImpOpBase + 0, 4776, 0, 0xc331f8004828ULL }, // Inst #13536 = VPCOMPRESSBZ256rrk |
| 28565 | { 13535, 2, 1, 0, 1943, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc131f8004828ULL }, // Inst #13535 = VPCOMPRESSBZ256rr |
| 28566 | { 13534, 7, 0, 0, 2268, 0, 0, X86ImpOpBase + 0, 4754, 0|(1ULL<<MCID::MayStore), 0x2331f8004818ULL }, // Inst #13534 = VPCOMPRESSBZ256mrk |
| 28567 | { 13533, 6, 0, 0, 2266, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x2131f8004818ULL }, // Inst #13533 = VPCOMPRESSBZ256mr |
| 28568 | { 13532, 3, 1, 0, 1145, 0, 0, X86ImpOpBase + 0, 4751, 0, 0xa631f8004828ULL }, // Inst #13532 = VPCOMPRESSBZ128rrkz |
| 28569 | { 13531, 4, 1, 0, 1145, 0, 0, X86ImpOpBase + 0, 4747, 0, 0xa231f8004828ULL }, // Inst #13531 = VPCOMPRESSBZ128rrk |
| 28570 | { 13530, 2, 1, 0, 1942, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa031f8004828ULL }, // Inst #13530 = VPCOMPRESSBZ128rr |
| 28571 | { 13529, 7, 0, 0, 2268, 0, 0, X86ImpOpBase + 0, 4725, 0|(1ULL<<MCID::MayStore), 0x2231f8004818ULL }, // Inst #13529 = VPCOMPRESSBZ128mrk |
| 28572 | { 13528, 6, 0, 0, 2266, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x2031f8004818ULL }, // Inst #13528 = VPCOMPRESSBZ128mr |
| 28573 | { 13527, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0xe758048029ULL }, // Inst #13527 = VPCOMDri |
| 28574 | { 13526, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xe758048019ULL }, // Inst #13526 = VPCOMDmi |
| 28575 | { 13525, 4, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0xe658048029ULL }, // Inst #13525 = VPCOMBri |
| 28576 | { 13524, 8, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xe658048019ULL }, // Inst #13524 = VPCOMBmi |
| 28577 | { 13523, 5, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2510, 0|(1ULL<<MCID::Commutable), 0xea9ff8066829ULL }, // Inst #13523 = VPCMPWZrrik |
| 28578 | { 13522, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2506, 0|(1ULL<<MCID::Commutable), 0xe89ff8066829ULL }, // Inst #13522 = VPCMPWZrri |
| 28579 | { 13521, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2497, 0|(1ULL<<MCID::MayLoad), 0xea9ff8066819ULL }, // Inst #13521 = VPCMPWZrmik |
| 28580 | { 13520, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2489, 0|(1ULL<<MCID::MayLoad), 0xe89ff8066819ULL }, // Inst #13520 = VPCMPWZrmi |
| 28581 | { 13519, 5, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2484, 0|(1ULL<<MCID::Commutable), 0xc39ff8066829ULL }, // Inst #13519 = VPCMPWZ256rrik |
| 28582 | { 13518, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2480, 0|(1ULL<<MCID::Commutable), 0xc19ff8066829ULL }, // Inst #13518 = VPCMPWZ256rri |
| 28583 | { 13517, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2471, 0|(1ULL<<MCID::MayLoad), 0xc39ff8066819ULL }, // Inst #13517 = VPCMPWZ256rmik |
| 28584 | { 13516, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2463, 0|(1ULL<<MCID::MayLoad), 0xc19ff8066819ULL }, // Inst #13516 = VPCMPWZ256rmi |
| 28585 | { 13515, 5, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2458, 0|(1ULL<<MCID::Commutable), 0xa29ff8066829ULL }, // Inst #13515 = VPCMPWZ128rrik |
| 28586 | { 13514, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2454, 0|(1ULL<<MCID::Commutable), 0xa09ff8066829ULL }, // Inst #13514 = VPCMPWZ128rri |
| 28587 | { 13513, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2445, 0|(1ULL<<MCID::MayLoad), 0xa29ff8066819ULL }, // Inst #13513 = VPCMPWZ128rmik |
| 28588 | { 13512, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2437, 0|(1ULL<<MCID::MayLoad), 0xa09ff8066819ULL }, // Inst #13512 = VPCMPWZ128rmi |
| 28589 | { 13511, 5, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2510, 0|(1ULL<<MCID::Commutable), 0xea9f78066829ULL }, // Inst #13511 = VPCMPUWZrrik |
| 28590 | { 13510, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2506, 0|(1ULL<<MCID::Commutable), 0xe89f78066829ULL }, // Inst #13510 = VPCMPUWZrri |
| 28591 | { 13509, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2497, 0|(1ULL<<MCID::MayLoad), 0xea9f78066819ULL }, // Inst #13509 = VPCMPUWZrmik |
| 28592 | { 13508, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2489, 0|(1ULL<<MCID::MayLoad), 0xe89f78066819ULL }, // Inst #13508 = VPCMPUWZrmi |
| 28593 | { 13507, 5, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2484, 0|(1ULL<<MCID::Commutable), 0xc39f78066829ULL }, // Inst #13507 = VPCMPUWZ256rrik |
| 28594 | { 13506, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2480, 0|(1ULL<<MCID::Commutable), 0xc19f78066829ULL }, // Inst #13506 = VPCMPUWZ256rri |
| 28595 | { 13505, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2471, 0|(1ULL<<MCID::MayLoad), 0xc39f78066819ULL }, // Inst #13505 = VPCMPUWZ256rmik |
| 28596 | { 13504, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2463, 0|(1ULL<<MCID::MayLoad), 0xc19f78066819ULL }, // Inst #13504 = VPCMPUWZ256rmi |
| 28597 | { 13503, 5, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2458, 0|(1ULL<<MCID::Commutable), 0xa29f78066829ULL }, // Inst #13503 = VPCMPUWZ128rrik |
| 28598 | { 13502, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2454, 0|(1ULL<<MCID::Commutable), 0xa09f78066829ULL }, // Inst #13502 = VPCMPUWZ128rri |
| 28599 | { 13501, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2445, 0|(1ULL<<MCID::MayLoad), 0xa29f78066819ULL }, // Inst #13501 = VPCMPUWZ128rmik |
| 28600 | { 13500, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2437, 0|(1ULL<<MCID::MayLoad), 0xa09f78066819ULL }, // Inst #13500 = VPCMPUWZ128rmi |
| 28601 | { 13499, 5, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2432, 0|(1ULL<<MCID::Commutable), 0xea8f78066829ULL }, // Inst #13499 = VPCMPUQZrrik |
| 28602 | { 13498, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2428, 0|(1ULL<<MCID::Commutable), 0xe88f78066829ULL }, // Inst #13498 = VPCMPUQZrri |
| 28603 | { 13497, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2419, 0|(1ULL<<MCID::MayLoad), 0xea8f78066819ULL }, // Inst #13497 = VPCMPUQZrmik |
| 28604 | { 13496, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2419, 0|(1ULL<<MCID::MayLoad), 0x9a8f78066819ULL }, // Inst #13496 = VPCMPUQZrmibk |
| 28605 | { 13495, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2411, 0|(1ULL<<MCID::MayLoad), 0x988f78066819ULL }, // Inst #13495 = VPCMPUQZrmib |
| 28606 | { 13494, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2411, 0|(1ULL<<MCID::MayLoad), 0xe88f78066819ULL }, // Inst #13494 = VPCMPUQZrmi |
| 28607 | { 13493, 5, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2406, 0|(1ULL<<MCID::Commutable), 0xc38f78066829ULL }, // Inst #13493 = VPCMPUQZ256rrik |
| 28608 | { 13492, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2402, 0|(1ULL<<MCID::Commutable), 0xc18f78066829ULL }, // Inst #13492 = VPCMPUQZ256rri |
| 28609 | { 13491, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2393, 0|(1ULL<<MCID::MayLoad), 0xc38f78066819ULL }, // Inst #13491 = VPCMPUQZ256rmik |
| 28610 | { 13490, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2393, 0|(1ULL<<MCID::MayLoad), 0x938f78066819ULL }, // Inst #13490 = VPCMPUQZ256rmibk |
| 28611 | { 13489, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2385, 0|(1ULL<<MCID::MayLoad), 0x918f78066819ULL }, // Inst #13489 = VPCMPUQZ256rmib |
| 28612 | { 13488, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2385, 0|(1ULL<<MCID::MayLoad), 0xc18f78066819ULL }, // Inst #13488 = VPCMPUQZ256rmi |
| 28613 | { 13487, 5, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2380, 0|(1ULL<<MCID::Commutable), 0xa28f78066829ULL }, // Inst #13487 = VPCMPUQZ128rrik |
| 28614 | { 13486, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2376, 0|(1ULL<<MCID::Commutable), 0xa08f78066829ULL }, // Inst #13486 = VPCMPUQZ128rri |
| 28615 | { 13485, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2367, 0|(1ULL<<MCID::MayLoad), 0xa28f78066819ULL }, // Inst #13485 = VPCMPUQZ128rmik |
| 28616 | { 13484, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2367, 0|(1ULL<<MCID::MayLoad), 0x928f78066819ULL }, // Inst #13484 = VPCMPUQZ128rmibk |
| 28617 | { 13483, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2359, 0|(1ULL<<MCID::MayLoad), 0x908f78066819ULL }, // Inst #13483 = VPCMPUQZ128rmib |
| 28618 | { 13482, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2359, 0|(1ULL<<MCID::MayLoad), 0xa08f78066819ULL }, // Inst #13482 = VPCMPUQZ128rmi |
| 28619 | { 13481, 5, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2588, 0|(1ULL<<MCID::Commutable), 0xea8f78046829ULL }, // Inst #13481 = VPCMPUDZrrik |
| 28620 | { 13480, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2584, 0|(1ULL<<MCID::Commutable), 0xe88f78046829ULL }, // Inst #13480 = VPCMPUDZrri |
| 28621 | { 13479, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2575, 0|(1ULL<<MCID::MayLoad), 0xea8f78046819ULL }, // Inst #13479 = VPCMPUDZrmik |
| 28622 | { 13478, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2575, 0|(1ULL<<MCID::MayLoad), 0x7a8f78046819ULL }, // Inst #13478 = VPCMPUDZrmibk |
| 28623 | { 13477, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2567, 0|(1ULL<<MCID::MayLoad), 0x788f78046819ULL }, // Inst #13477 = VPCMPUDZrmib |
| 28624 | { 13476, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2567, 0|(1ULL<<MCID::MayLoad), 0xe88f78046819ULL }, // Inst #13476 = VPCMPUDZrmi |
| 28625 | { 13475, 5, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2562, 0|(1ULL<<MCID::Commutable), 0xc38f78046829ULL }, // Inst #13475 = VPCMPUDZ256rrik |
| 28626 | { 13474, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2558, 0|(1ULL<<MCID::Commutable), 0xc18f78046829ULL }, // Inst #13474 = VPCMPUDZ256rri |
| 28627 | { 13473, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2549, 0|(1ULL<<MCID::MayLoad), 0xc38f78046819ULL }, // Inst #13473 = VPCMPUDZ256rmik |
| 28628 | { 13472, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2549, 0|(1ULL<<MCID::MayLoad), 0x738f78046819ULL }, // Inst #13472 = VPCMPUDZ256rmibk |
| 28629 | { 13471, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2541, 0|(1ULL<<MCID::MayLoad), 0x718f78046819ULL }, // Inst #13471 = VPCMPUDZ256rmib |
| 28630 | { 13470, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2541, 0|(1ULL<<MCID::MayLoad), 0xc18f78046819ULL }, // Inst #13470 = VPCMPUDZ256rmi |
| 28631 | { 13469, 5, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2536, 0|(1ULL<<MCID::Commutable), 0xa28f78046829ULL }, // Inst #13469 = VPCMPUDZ128rrik |
| 28632 | { 13468, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2532, 0|(1ULL<<MCID::Commutable), 0xa08f78046829ULL }, // Inst #13468 = VPCMPUDZ128rri |
| 28633 | { 13467, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2523, 0|(1ULL<<MCID::MayLoad), 0xa28f78046819ULL }, // Inst #13467 = VPCMPUDZ128rmik |
| 28634 | { 13466, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2523, 0|(1ULL<<MCID::MayLoad), 0x728f78046819ULL }, // Inst #13466 = VPCMPUDZ128rmibk |
| 28635 | { 13465, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2515, 0|(1ULL<<MCID::MayLoad), 0x708f78046819ULL }, // Inst #13465 = VPCMPUDZ128rmib |
| 28636 | { 13464, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2515, 0|(1ULL<<MCID::MayLoad), 0xa08f78046819ULL }, // Inst #13464 = VPCMPUDZ128rmi |
| 28637 | { 13463, 5, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5119, 0|(1ULL<<MCID::Commutable), 0xea9f78046829ULL }, // Inst #13463 = VPCMPUBZrrik |
| 28638 | { 13462, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5115, 0|(1ULL<<MCID::Commutable), 0xe89f78046829ULL }, // Inst #13462 = VPCMPUBZrri |
| 28639 | { 13461, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5106, 0|(1ULL<<MCID::MayLoad), 0xea9f78046819ULL }, // Inst #13461 = VPCMPUBZrmik |
| 28640 | { 13460, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5098, 0|(1ULL<<MCID::MayLoad), 0xe89f78046819ULL }, // Inst #13460 = VPCMPUBZrmi |
| 28641 | { 13459, 5, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5093, 0|(1ULL<<MCID::Commutable), 0xc39f78046829ULL }, // Inst #13459 = VPCMPUBZ256rrik |
| 28642 | { 13458, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5089, 0|(1ULL<<MCID::Commutable), 0xc19f78046829ULL }, // Inst #13458 = VPCMPUBZ256rri |
| 28643 | { 13457, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5080, 0|(1ULL<<MCID::MayLoad), 0xc39f78046819ULL }, // Inst #13457 = VPCMPUBZ256rmik |
| 28644 | { 13456, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5072, 0|(1ULL<<MCID::MayLoad), 0xc19f78046819ULL }, // Inst #13456 = VPCMPUBZ256rmi |
| 28645 | { 13455, 5, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5067, 0|(1ULL<<MCID::Commutable), 0xa29f78046829ULL }, // Inst #13455 = VPCMPUBZ128rrik |
| 28646 | { 13454, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5063, 0|(1ULL<<MCID::Commutable), 0xa09f78046829ULL }, // Inst #13454 = VPCMPUBZ128rri |
| 28647 | { 13453, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5054, 0|(1ULL<<MCID::MayLoad), 0xa29f78046819ULL }, // Inst #13453 = VPCMPUBZ128rmik |
| 28648 | { 13452, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5046, 0|(1ULL<<MCID::MayLoad), 0xa09f78046819ULL }, // Inst #13452 = VPCMPUBZ128rmi |
| 28649 | { 13451, 5, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2432, 0|(1ULL<<MCID::Commutable), 0xea8ff8066829ULL }, // Inst #13451 = VPCMPQZrrik |
| 28650 | { 13450, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2428, 0|(1ULL<<MCID::Commutable), 0xe88ff8066829ULL }, // Inst #13450 = VPCMPQZrri |
| 28651 | { 13449, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2419, 0|(1ULL<<MCID::MayLoad), 0xea8ff8066819ULL }, // Inst #13449 = VPCMPQZrmik |
| 28652 | { 13448, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2419, 0|(1ULL<<MCID::MayLoad), 0x9a8ff8066819ULL }, // Inst #13448 = VPCMPQZrmibk |
| 28653 | { 13447, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2411, 0|(1ULL<<MCID::MayLoad), 0x988ff8066819ULL }, // Inst #13447 = VPCMPQZrmib |
| 28654 | { 13446, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2411, 0|(1ULL<<MCID::MayLoad), 0xe88ff8066819ULL }, // Inst #13446 = VPCMPQZrmi |
| 28655 | { 13445, 5, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2406, 0|(1ULL<<MCID::Commutable), 0xc38ff8066829ULL }, // Inst #13445 = VPCMPQZ256rrik |
| 28656 | { 13444, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2402, 0|(1ULL<<MCID::Commutable), 0xc18ff8066829ULL }, // Inst #13444 = VPCMPQZ256rri |
| 28657 | { 13443, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2393, 0|(1ULL<<MCID::MayLoad), 0xc38ff8066819ULL }, // Inst #13443 = VPCMPQZ256rmik |
| 28658 | { 13442, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2393, 0|(1ULL<<MCID::MayLoad), 0x938ff8066819ULL }, // Inst #13442 = VPCMPQZ256rmibk |
| 28659 | { 13441, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2385, 0|(1ULL<<MCID::MayLoad), 0x918ff8066819ULL }, // Inst #13441 = VPCMPQZ256rmib |
| 28660 | { 13440, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2385, 0|(1ULL<<MCID::MayLoad), 0xc18ff8066819ULL }, // Inst #13440 = VPCMPQZ256rmi |
| 28661 | { 13439, 5, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2380, 0|(1ULL<<MCID::Commutable), 0xa28ff8066829ULL }, // Inst #13439 = VPCMPQZ128rrik |
| 28662 | { 13438, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2376, 0|(1ULL<<MCID::Commutable), 0xa08ff8066829ULL }, // Inst #13438 = VPCMPQZ128rri |
| 28663 | { 13437, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2367, 0|(1ULL<<MCID::MayLoad), 0xa28ff8066819ULL }, // Inst #13437 = VPCMPQZ128rmik |
| 28664 | { 13436, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2367, 0|(1ULL<<MCID::MayLoad), 0x928ff8066819ULL }, // Inst #13436 = VPCMPQZ128rmibk |
| 28665 | { 13435, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2359, 0|(1ULL<<MCID::MayLoad), 0x908ff8066819ULL }, // Inst #13435 = VPCMPQZ128rmib |
| 28666 | { 13434, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2359, 0|(1ULL<<MCID::MayLoad), 0xa08ff8066819ULL }, // Inst #13434 = VPCMPQZ128rmi |
| 28667 | { 13433, 3, 0, 0, 266, 0, 2, X86ImpOpBase + 386, 544, 0, 0x3138046829ULL }, // Inst #13433 = VPCMPISTRMrri |
| 28668 | { 13432, 7, 0, 0, 265, 0, 2, X86ImpOpBase + 386, 537, 0|(1ULL<<MCID::MayLoad), 0x3138046819ULL }, // Inst #13432 = VPCMPISTRMrmi |
| 28669 | { 13431, 3, 0, 0, 264, 0, 2, X86ImpOpBase + 384, 544, 0, 0x31b8046829ULL }, // Inst #13431 = VPCMPISTRIrri |
| 28670 | { 13430, 7, 0, 0, 263, 0, 2, X86ImpOpBase + 384, 537, 0|(1ULL<<MCID::MayLoad), 0x31b8046819ULL }, // Inst #13430 = VPCMPISTRIrmi |
| 28671 | { 13429, 3, 1, 0, 1219, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb2b8002829ULL }, // Inst #13429 = VPCMPGTWrr |
| 28672 | { 13428, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb2b8002819ULL }, // Inst #13428 = VPCMPGTWrm |
| 28673 | { 13427, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5384, 0, 0xeab2f8002829ULL }, // Inst #13427 = VPCMPGTWZrrk |
| 28674 | { 13426, 3, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5381, 0, 0xe8b2f8002829ULL }, // Inst #13426 = VPCMPGTWZrr |
| 28675 | { 13425, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5373, 0|(1ULL<<MCID::MayLoad), 0xeab2f8002819ULL }, // Inst #13425 = VPCMPGTWZrmk |
| 28676 | { 13424, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5366, 0|(1ULL<<MCID::MayLoad), 0xe8b2f8002819ULL }, // Inst #13424 = VPCMPGTWZrm |
| 28677 | { 13423, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5362, 0, 0xc3b2f8002829ULL }, // Inst #13423 = VPCMPGTWZ256rrk |
| 28678 | { 13422, 3, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5359, 0, 0xc1b2f8002829ULL }, // Inst #13422 = VPCMPGTWZ256rr |
| 28679 | { 13421, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5351, 0|(1ULL<<MCID::MayLoad), 0xc3b2f8002819ULL }, // Inst #13421 = VPCMPGTWZ256rmk |
| 28680 | { 13420, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5344, 0|(1ULL<<MCID::MayLoad), 0xc1b2f8002819ULL }, // Inst #13420 = VPCMPGTWZ256rm |
| 28681 | { 13419, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5340, 0, 0xa2b2f8002829ULL }, // Inst #13419 = VPCMPGTWZ128rrk |
| 28682 | { 13418, 3, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5337, 0, 0xa0b2f8002829ULL }, // Inst #13418 = VPCMPGTWZ128rr |
| 28683 | { 13417, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5329, 0|(1ULL<<MCID::MayLoad), 0xa2b2f8002819ULL }, // Inst #13417 = VPCMPGTWZ128rmk |
| 28684 | { 13416, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5322, 0|(1ULL<<MCID::MayLoad), 0xa0b2f8002819ULL }, // Inst #13416 = VPCMPGTWZ128rm |
| 28685 | { 13415, 3, 1, 0, 1220, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b2b8002829ULL }, // Inst #13415 = VPCMPGTWYrr |
| 28686 | { 13414, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b2b8002819ULL }, // Inst #13414 = VPCMPGTWYrm |
| 28687 | { 13413, 3, 1, 0, 815, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x9bb8004829ULL }, // Inst #13413 = VPCMPGTQrr |
| 28688 | { 13412, 7, 1, 0, 799, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9bb8004819ULL }, // Inst #13412 = VPCMPGTQrm |
| 28689 | { 13411, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5318, 0, 0xea9bf8024829ULL }, // Inst #13411 = VPCMPGTQZrrk |
| 28690 | { 13410, 3, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5315, 0, 0xe89bf8024829ULL }, // Inst #13410 = VPCMPGTQZrr |
| 28691 | { 13409, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5307, 0|(1ULL<<MCID::MayLoad), 0xea9bf8024819ULL }, // Inst #13409 = VPCMPGTQZrmk |
| 28692 | { 13408, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5307, 0|(1ULL<<MCID::MayLoad), 0x9a9bf8024819ULL }, // Inst #13408 = VPCMPGTQZrmbk |
| 28693 | { 13407, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5300, 0|(1ULL<<MCID::MayLoad), 0x989bf8024819ULL }, // Inst #13407 = VPCMPGTQZrmb |
| 28694 | { 13406, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5300, 0|(1ULL<<MCID::MayLoad), 0xe89bf8024819ULL }, // Inst #13406 = VPCMPGTQZrm |
| 28695 | { 13405, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5296, 0, 0xc39bf8024829ULL }, // Inst #13405 = VPCMPGTQZ256rrk |
| 28696 | { 13404, 3, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5293, 0, 0xc19bf8024829ULL }, // Inst #13404 = VPCMPGTQZ256rr |
| 28697 | { 13403, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5285, 0|(1ULL<<MCID::MayLoad), 0xc39bf8024819ULL }, // Inst #13403 = VPCMPGTQZ256rmk |
| 28698 | { 13402, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5285, 0|(1ULL<<MCID::MayLoad), 0x939bf8024819ULL }, // Inst #13402 = VPCMPGTQZ256rmbk |
| 28699 | { 13401, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5278, 0|(1ULL<<MCID::MayLoad), 0x919bf8024819ULL }, // Inst #13401 = VPCMPGTQZ256rmb |
| 28700 | { 13400, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5278, 0|(1ULL<<MCID::MayLoad), 0xc19bf8024819ULL }, // Inst #13400 = VPCMPGTQZ256rm |
| 28701 | { 13399, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5274, 0, 0xa29bf8024829ULL }, // Inst #13399 = VPCMPGTQZ128rrk |
| 28702 | { 13398, 3, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5271, 0, 0xa09bf8024829ULL }, // Inst #13398 = VPCMPGTQZ128rr |
| 28703 | { 13397, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5263, 0|(1ULL<<MCID::MayLoad), 0xa29bf8024819ULL }, // Inst #13397 = VPCMPGTQZ128rmk |
| 28704 | { 13396, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5263, 0|(1ULL<<MCID::MayLoad), 0x929bf8024819ULL }, // Inst #13396 = VPCMPGTQZ128rmbk |
| 28705 | { 13395, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5256, 0|(1ULL<<MCID::MayLoad), 0x909bf8024819ULL }, // Inst #13395 = VPCMPGTQZ128rmb |
| 28706 | { 13394, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5256, 0|(1ULL<<MCID::MayLoad), 0xa09bf8024819ULL }, // Inst #13394 = VPCMPGTQZ128rm |
| 28707 | { 13393, 3, 1, 0, 908, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x19bb8004829ULL }, // Inst #13393 = VPCMPGTQYrr |
| 28708 | { 13392, 7, 1, 0, 877, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19bb8004819ULL }, // Inst #13392 = VPCMPGTQYrm |
| 28709 | { 13391, 3, 1, 0, 1219, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb338002829ULL }, // Inst #13391 = VPCMPGTDrr |
| 28710 | { 13390, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb338002819ULL }, // Inst #13390 = VPCMPGTDrm |
| 28711 | { 13389, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5252, 0, 0xeab378002829ULL }, // Inst #13389 = VPCMPGTDZrrk |
| 28712 | { 13388, 3, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5249, 0, 0xe8b378002829ULL }, // Inst #13388 = VPCMPGTDZrr |
| 28713 | { 13387, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5241, 0|(1ULL<<MCID::MayLoad), 0xeab378002819ULL }, // Inst #13387 = VPCMPGTDZrmk |
| 28714 | { 13386, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5241, 0|(1ULL<<MCID::MayLoad), 0x7ab378002819ULL }, // Inst #13386 = VPCMPGTDZrmbk |
| 28715 | { 13385, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5234, 0|(1ULL<<MCID::MayLoad), 0x78b378002819ULL }, // Inst #13385 = VPCMPGTDZrmb |
| 28716 | { 13384, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5234, 0|(1ULL<<MCID::MayLoad), 0xe8b378002819ULL }, // Inst #13384 = VPCMPGTDZrm |
| 28717 | { 13383, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5230, 0, 0xc3b378002829ULL }, // Inst #13383 = VPCMPGTDZ256rrk |
| 28718 | { 13382, 3, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5227, 0, 0xc1b378002829ULL }, // Inst #13382 = VPCMPGTDZ256rr |
| 28719 | { 13381, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5219, 0|(1ULL<<MCID::MayLoad), 0xc3b378002819ULL }, // Inst #13381 = VPCMPGTDZ256rmk |
| 28720 | { 13380, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5219, 0|(1ULL<<MCID::MayLoad), 0x73b378002819ULL }, // Inst #13380 = VPCMPGTDZ256rmbk |
| 28721 | { 13379, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5212, 0|(1ULL<<MCID::MayLoad), 0x71b378002819ULL }, // Inst #13379 = VPCMPGTDZ256rmb |
| 28722 | { 13378, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5212, 0|(1ULL<<MCID::MayLoad), 0xc1b378002819ULL }, // Inst #13378 = VPCMPGTDZ256rm |
| 28723 | { 13377, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5208, 0, 0xa2b378002829ULL }, // Inst #13377 = VPCMPGTDZ128rrk |
| 28724 | { 13376, 3, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5205, 0, 0xa0b378002829ULL }, // Inst #13376 = VPCMPGTDZ128rr |
| 28725 | { 13375, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5197, 0|(1ULL<<MCID::MayLoad), 0xa2b378002819ULL }, // Inst #13375 = VPCMPGTDZ128rmk |
| 28726 | { 13374, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5197, 0|(1ULL<<MCID::MayLoad), 0x72b378002819ULL }, // Inst #13374 = VPCMPGTDZ128rmbk |
| 28727 | { 13373, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5190, 0|(1ULL<<MCID::MayLoad), 0x70b378002819ULL }, // Inst #13373 = VPCMPGTDZ128rmb |
| 28728 | { 13372, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5190, 0|(1ULL<<MCID::MayLoad), 0xa0b378002819ULL }, // Inst #13372 = VPCMPGTDZ128rm |
| 28729 | { 13371, 3, 1, 0, 1220, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b338002829ULL }, // Inst #13371 = VPCMPGTDYrr |
| 28730 | { 13370, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b338002819ULL }, // Inst #13370 = VPCMPGTDYrm |
| 28731 | { 13369, 3, 1, 0, 1219, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb238002829ULL }, // Inst #13369 = VPCMPGTBrr |
| 28732 | { 13368, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb238002819ULL }, // Inst #13368 = VPCMPGTBrm |
| 28733 | { 13367, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5186, 0, 0xeab278002829ULL }, // Inst #13367 = VPCMPGTBZrrk |
| 28734 | { 13366, 3, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5183, 0, 0xe8b278002829ULL }, // Inst #13366 = VPCMPGTBZrr |
| 28735 | { 13365, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5175, 0|(1ULL<<MCID::MayLoad), 0xeab278002819ULL }, // Inst #13365 = VPCMPGTBZrmk |
| 28736 | { 13364, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5168, 0|(1ULL<<MCID::MayLoad), 0xe8b278002819ULL }, // Inst #13364 = VPCMPGTBZrm |
| 28737 | { 13363, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5164, 0, 0xc3b278002829ULL }, // Inst #13363 = VPCMPGTBZ256rrk |
| 28738 | { 13362, 3, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5161, 0, 0xc1b278002829ULL }, // Inst #13362 = VPCMPGTBZ256rr |
| 28739 | { 13361, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5153, 0|(1ULL<<MCID::MayLoad), 0xc3b278002819ULL }, // Inst #13361 = VPCMPGTBZ256rmk |
| 28740 | { 13360, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5146, 0|(1ULL<<MCID::MayLoad), 0xc1b278002819ULL }, // Inst #13360 = VPCMPGTBZ256rm |
| 28741 | { 13359, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5142, 0, 0xa2b278002829ULL }, // Inst #13359 = VPCMPGTBZ128rrk |
| 28742 | { 13358, 3, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5139, 0, 0xa0b278002829ULL }, // Inst #13358 = VPCMPGTBZ128rr |
| 28743 | { 13357, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5131, 0|(1ULL<<MCID::MayLoad), 0xa2b278002819ULL }, // Inst #13357 = VPCMPGTBZ128rmk |
| 28744 | { 13356, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5124, 0|(1ULL<<MCID::MayLoad), 0xa0b278002819ULL }, // Inst #13356 = VPCMPGTBZ128rm |
| 28745 | { 13355, 3, 1, 0, 1220, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b238002829ULL }, // Inst #13355 = VPCMPGTBYrr |
| 28746 | { 13354, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b238002819ULL }, // Inst #13354 = VPCMPGTBYrm |
| 28747 | { 13353, 3, 0, 0, 262, 2, 2, X86ImpOpBase + 380, 544, 0, 0x3038046829ULL }, // Inst #13353 = VPCMPESTRMrri |
| 28748 | { 13352, 7, 0, 0, 261, 2, 2, X86ImpOpBase + 380, 537, 0|(1ULL<<MCID::MayLoad), 0x3038046819ULL }, // Inst #13352 = VPCMPESTRMrmi |
| 28749 | { 13351, 3, 0, 0, 260, 2, 2, X86ImpOpBase + 376, 544, 0, 0x30b8046829ULL }, // Inst #13351 = VPCMPESTRIrri |
| 28750 | { 13350, 7, 0, 0, 259, 2, 2, X86ImpOpBase + 376, 537, 0|(1ULL<<MCID::MayLoad), 0x30b8046819ULL }, // Inst #13350 = VPCMPESTRIrmi |
| 28751 | { 13349, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xbab8002829ULL }, // Inst #13349 = VPCMPEQWrr |
| 28752 | { 13348, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xbab8002819ULL }, // Inst #13348 = VPCMPEQWrm |
| 28753 | { 13347, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5384, 0|(1ULL<<MCID::Commutable), 0xeabaf8002829ULL }, // Inst #13347 = VPCMPEQWZrrk |
| 28754 | { 13346, 3, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5381, 0|(1ULL<<MCID::Commutable), 0xe8baf8002829ULL }, // Inst #13346 = VPCMPEQWZrr |
| 28755 | { 13345, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5373, 0|(1ULL<<MCID::MayLoad), 0xeabaf8002819ULL }, // Inst #13345 = VPCMPEQWZrmk |
| 28756 | { 13344, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5366, 0|(1ULL<<MCID::MayLoad), 0xe8baf8002819ULL }, // Inst #13344 = VPCMPEQWZrm |
| 28757 | { 13343, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5362, 0|(1ULL<<MCID::Commutable), 0xc3baf8002829ULL }, // Inst #13343 = VPCMPEQWZ256rrk |
| 28758 | { 13342, 3, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5359, 0|(1ULL<<MCID::Commutable), 0xc1baf8002829ULL }, // Inst #13342 = VPCMPEQWZ256rr |
| 28759 | { 13341, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5351, 0|(1ULL<<MCID::MayLoad), 0xc3baf8002819ULL }, // Inst #13341 = VPCMPEQWZ256rmk |
| 28760 | { 13340, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5344, 0|(1ULL<<MCID::MayLoad), 0xc1baf8002819ULL }, // Inst #13340 = VPCMPEQWZ256rm |
| 28761 | { 13339, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5340, 0|(1ULL<<MCID::Commutable), 0xa2baf8002829ULL }, // Inst #13339 = VPCMPEQWZ128rrk |
| 28762 | { 13338, 3, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5337, 0|(1ULL<<MCID::Commutable), 0xa0baf8002829ULL }, // Inst #13338 = VPCMPEQWZ128rr |
| 28763 | { 13337, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5329, 0|(1ULL<<MCID::MayLoad), 0xa2baf8002819ULL }, // Inst #13337 = VPCMPEQWZ128rmk |
| 28764 | { 13336, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5322, 0|(1ULL<<MCID::MayLoad), 0xa0baf8002819ULL }, // Inst #13336 = VPCMPEQWZ128rm |
| 28765 | { 13335, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1bab8002829ULL }, // Inst #13335 = VPCMPEQWYrr |
| 28766 | { 13334, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1bab8002819ULL }, // Inst #13334 = VPCMPEQWYrm |
| 28767 | { 13333, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x94b8004829ULL }, // Inst #13333 = VPCMPEQQrr |
| 28768 | { 13332, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x94b8004819ULL }, // Inst #13332 = VPCMPEQQrm |
| 28769 | { 13331, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5318, 0|(1ULL<<MCID::Commutable), 0xea94f8024829ULL }, // Inst #13331 = VPCMPEQQZrrk |
| 28770 | { 13330, 3, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5315, 0|(1ULL<<MCID::Commutable), 0xe894f8024829ULL }, // Inst #13330 = VPCMPEQQZrr |
| 28771 | { 13329, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5307, 0|(1ULL<<MCID::MayLoad), 0xea94f8024819ULL }, // Inst #13329 = VPCMPEQQZrmk |
| 28772 | { 13328, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5307, 0|(1ULL<<MCID::MayLoad), 0x9a94f8024819ULL }, // Inst #13328 = VPCMPEQQZrmbk |
| 28773 | { 13327, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5300, 0|(1ULL<<MCID::MayLoad), 0x9894f8024819ULL }, // Inst #13327 = VPCMPEQQZrmb |
| 28774 | { 13326, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5300, 0|(1ULL<<MCID::MayLoad), 0xe894f8024819ULL }, // Inst #13326 = VPCMPEQQZrm |
| 28775 | { 13325, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5296, 0|(1ULL<<MCID::Commutable), 0xc394f8024829ULL }, // Inst #13325 = VPCMPEQQZ256rrk |
| 28776 | { 13324, 3, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5293, 0|(1ULL<<MCID::Commutable), 0xc194f8024829ULL }, // Inst #13324 = VPCMPEQQZ256rr |
| 28777 | { 13323, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5285, 0|(1ULL<<MCID::MayLoad), 0xc394f8024819ULL }, // Inst #13323 = VPCMPEQQZ256rmk |
| 28778 | { 13322, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5285, 0|(1ULL<<MCID::MayLoad), 0x9394f8024819ULL }, // Inst #13322 = VPCMPEQQZ256rmbk |
| 28779 | { 13321, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5278, 0|(1ULL<<MCID::MayLoad), 0x9194f8024819ULL }, // Inst #13321 = VPCMPEQQZ256rmb |
| 28780 | { 13320, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5278, 0|(1ULL<<MCID::MayLoad), 0xc194f8024819ULL }, // Inst #13320 = VPCMPEQQZ256rm |
| 28781 | { 13319, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5274, 0|(1ULL<<MCID::Commutable), 0xa294f8024829ULL }, // Inst #13319 = VPCMPEQQZ128rrk |
| 28782 | { 13318, 3, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5271, 0|(1ULL<<MCID::Commutable), 0xa094f8024829ULL }, // Inst #13318 = VPCMPEQQZ128rr |
| 28783 | { 13317, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5263, 0|(1ULL<<MCID::MayLoad), 0xa294f8024819ULL }, // Inst #13317 = VPCMPEQQZ128rmk |
| 28784 | { 13316, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5263, 0|(1ULL<<MCID::MayLoad), 0x9294f8024819ULL }, // Inst #13316 = VPCMPEQQZ128rmbk |
| 28785 | { 13315, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5256, 0|(1ULL<<MCID::MayLoad), 0x9094f8024819ULL }, // Inst #13315 = VPCMPEQQZ128rmb |
| 28786 | { 13314, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5256, 0|(1ULL<<MCID::MayLoad), 0xa094f8024819ULL }, // Inst #13314 = VPCMPEQQZ128rm |
| 28787 | { 13313, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x194b8004829ULL }, // Inst #13313 = VPCMPEQQYrr |
| 28788 | { 13312, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x194b8004819ULL }, // Inst #13312 = VPCMPEQQYrm |
| 28789 | { 13311, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xbb38002829ULL }, // Inst #13311 = VPCMPEQDrr |
| 28790 | { 13310, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xbb38002819ULL }, // Inst #13310 = VPCMPEQDrm |
| 28791 | { 13309, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5252, 0|(1ULL<<MCID::Commutable), 0xeabb78002829ULL }, // Inst #13309 = VPCMPEQDZrrk |
| 28792 | { 13308, 3, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5249, 0|(1ULL<<MCID::Commutable), 0xe8bb78002829ULL }, // Inst #13308 = VPCMPEQDZrr |
| 28793 | { 13307, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5241, 0|(1ULL<<MCID::MayLoad), 0xeabb78002819ULL }, // Inst #13307 = VPCMPEQDZrmk |
| 28794 | { 13306, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5241, 0|(1ULL<<MCID::MayLoad), 0x7abb78002819ULL }, // Inst #13306 = VPCMPEQDZrmbk |
| 28795 | { 13305, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5234, 0|(1ULL<<MCID::MayLoad), 0x78bb78002819ULL }, // Inst #13305 = VPCMPEQDZrmb |
| 28796 | { 13304, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5234, 0|(1ULL<<MCID::MayLoad), 0xe8bb78002819ULL }, // Inst #13304 = VPCMPEQDZrm |
| 28797 | { 13303, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5230, 0|(1ULL<<MCID::Commutable), 0xc3bb78002829ULL }, // Inst #13303 = VPCMPEQDZ256rrk |
| 28798 | { 13302, 3, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5227, 0|(1ULL<<MCID::Commutable), 0xc1bb78002829ULL }, // Inst #13302 = VPCMPEQDZ256rr |
| 28799 | { 13301, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5219, 0|(1ULL<<MCID::MayLoad), 0xc3bb78002819ULL }, // Inst #13301 = VPCMPEQDZ256rmk |
| 28800 | { 13300, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5219, 0|(1ULL<<MCID::MayLoad), 0x73bb78002819ULL }, // Inst #13300 = VPCMPEQDZ256rmbk |
| 28801 | { 13299, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5212, 0|(1ULL<<MCID::MayLoad), 0x71bb78002819ULL }, // Inst #13299 = VPCMPEQDZ256rmb |
| 28802 | { 13298, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5212, 0|(1ULL<<MCID::MayLoad), 0xc1bb78002819ULL }, // Inst #13298 = VPCMPEQDZ256rm |
| 28803 | { 13297, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5208, 0|(1ULL<<MCID::Commutable), 0xa2bb78002829ULL }, // Inst #13297 = VPCMPEQDZ128rrk |
| 28804 | { 13296, 3, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5205, 0|(1ULL<<MCID::Commutable), 0xa0bb78002829ULL }, // Inst #13296 = VPCMPEQDZ128rr |
| 28805 | { 13295, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5197, 0|(1ULL<<MCID::MayLoad), 0xa2bb78002819ULL }, // Inst #13295 = VPCMPEQDZ128rmk |
| 28806 | { 13294, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5197, 0|(1ULL<<MCID::MayLoad), 0x72bb78002819ULL }, // Inst #13294 = VPCMPEQDZ128rmbk |
| 28807 | { 13293, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5190, 0|(1ULL<<MCID::MayLoad), 0x70bb78002819ULL }, // Inst #13293 = VPCMPEQDZ128rmb |
| 28808 | { 13292, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5190, 0|(1ULL<<MCID::MayLoad), 0xa0bb78002819ULL }, // Inst #13292 = VPCMPEQDZ128rm |
| 28809 | { 13291, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1bb38002829ULL }, // Inst #13291 = VPCMPEQDYrr |
| 28810 | { 13290, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1bb38002819ULL }, // Inst #13290 = VPCMPEQDYrm |
| 28811 | { 13289, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xba38002829ULL }, // Inst #13289 = VPCMPEQBrr |
| 28812 | { 13288, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xba38002819ULL }, // Inst #13288 = VPCMPEQBrm |
| 28813 | { 13287, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5186, 0|(1ULL<<MCID::Commutable), 0xeaba78002829ULL }, // Inst #13287 = VPCMPEQBZrrk |
| 28814 | { 13286, 3, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5183, 0|(1ULL<<MCID::Commutable), 0xe8ba78002829ULL }, // Inst #13286 = VPCMPEQBZrr |
| 28815 | { 13285, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5175, 0|(1ULL<<MCID::MayLoad), 0xeaba78002819ULL }, // Inst #13285 = VPCMPEQBZrmk |
| 28816 | { 13284, 7, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5168, 0|(1ULL<<MCID::MayLoad), 0xe8ba78002819ULL }, // Inst #13284 = VPCMPEQBZrm |
| 28817 | { 13283, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5164, 0|(1ULL<<MCID::Commutable), 0xc3ba78002829ULL }, // Inst #13283 = VPCMPEQBZ256rrk |
| 28818 | { 13282, 3, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5161, 0|(1ULL<<MCID::Commutable), 0xc1ba78002829ULL }, // Inst #13282 = VPCMPEQBZ256rr |
| 28819 | { 13281, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5153, 0|(1ULL<<MCID::MayLoad), 0xc3ba78002819ULL }, // Inst #13281 = VPCMPEQBZ256rmk |
| 28820 | { 13280, 7, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5146, 0|(1ULL<<MCID::MayLoad), 0xc1ba78002819ULL }, // Inst #13280 = VPCMPEQBZ256rm |
| 28821 | { 13279, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5142, 0|(1ULL<<MCID::Commutable), 0xa2ba78002829ULL }, // Inst #13279 = VPCMPEQBZ128rrk |
| 28822 | { 13278, 3, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5139, 0|(1ULL<<MCID::Commutable), 0xa0ba78002829ULL }, // Inst #13278 = VPCMPEQBZ128rr |
| 28823 | { 13277, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5131, 0|(1ULL<<MCID::MayLoad), 0xa2ba78002819ULL }, // Inst #13277 = VPCMPEQBZ128rmk |
| 28824 | { 13276, 7, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5124, 0|(1ULL<<MCID::MayLoad), 0xa0ba78002819ULL }, // Inst #13276 = VPCMPEQBZ128rm |
| 28825 | { 13275, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1ba38002829ULL }, // Inst #13275 = VPCMPEQBYrr |
| 28826 | { 13274, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ba38002819ULL }, // Inst #13274 = VPCMPEQBYrm |
| 28827 | { 13273, 5, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2588, 0|(1ULL<<MCID::Commutable), 0xea8ff8046829ULL }, // Inst #13273 = VPCMPDZrrik |
| 28828 | { 13272, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 2584, 0|(1ULL<<MCID::Commutable), 0xe88ff8046829ULL }, // Inst #13272 = VPCMPDZrri |
| 28829 | { 13271, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2575, 0|(1ULL<<MCID::MayLoad), 0xea8ff8046819ULL }, // Inst #13271 = VPCMPDZrmik |
| 28830 | { 13270, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2575, 0|(1ULL<<MCID::MayLoad), 0x7a8ff8046819ULL }, // Inst #13270 = VPCMPDZrmibk |
| 28831 | { 13269, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2567, 0|(1ULL<<MCID::MayLoad), 0x788ff8046819ULL }, // Inst #13269 = VPCMPDZrmib |
| 28832 | { 13268, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 2567, 0|(1ULL<<MCID::MayLoad), 0xe88ff8046819ULL }, // Inst #13268 = VPCMPDZrmi |
| 28833 | { 13267, 5, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2562, 0|(1ULL<<MCID::Commutable), 0xc38ff8046829ULL }, // Inst #13267 = VPCMPDZ256rrik |
| 28834 | { 13266, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 2558, 0|(1ULL<<MCID::Commutable), 0xc18ff8046829ULL }, // Inst #13266 = VPCMPDZ256rri |
| 28835 | { 13265, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2549, 0|(1ULL<<MCID::MayLoad), 0xc38ff8046819ULL }, // Inst #13265 = VPCMPDZ256rmik |
| 28836 | { 13264, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2549, 0|(1ULL<<MCID::MayLoad), 0x738ff8046819ULL }, // Inst #13264 = VPCMPDZ256rmibk |
| 28837 | { 13263, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2541, 0|(1ULL<<MCID::MayLoad), 0x718ff8046819ULL }, // Inst #13263 = VPCMPDZ256rmib |
| 28838 | { 13262, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 2541, 0|(1ULL<<MCID::MayLoad), 0xc18ff8046819ULL }, // Inst #13262 = VPCMPDZ256rmi |
| 28839 | { 13261, 5, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2536, 0|(1ULL<<MCID::Commutable), 0xa28ff8046829ULL }, // Inst #13261 = VPCMPDZ128rrik |
| 28840 | { 13260, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 2532, 0|(1ULL<<MCID::Commutable), 0xa08ff8046829ULL }, // Inst #13260 = VPCMPDZ128rri |
| 28841 | { 13259, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2523, 0|(1ULL<<MCID::MayLoad), 0xa28ff8046819ULL }, // Inst #13259 = VPCMPDZ128rmik |
| 28842 | { 13258, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2523, 0|(1ULL<<MCID::MayLoad), 0x728ff8046819ULL }, // Inst #13258 = VPCMPDZ128rmibk |
| 28843 | { 13257, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2515, 0|(1ULL<<MCID::MayLoad), 0x708ff8046819ULL }, // Inst #13257 = VPCMPDZ128rmib |
| 28844 | { 13256, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 2515, 0|(1ULL<<MCID::MayLoad), 0xa08ff8046819ULL }, // Inst #13256 = VPCMPDZ128rmi |
| 28845 | { 13255, 5, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5119, 0|(1ULL<<MCID::Commutable), 0xea9ff8046829ULL }, // Inst #13255 = VPCMPBZrrik |
| 28846 | { 13254, 4, 1, 0, 1247, 0, 0, X86ImpOpBase + 0, 5115, 0|(1ULL<<MCID::Commutable), 0xe89ff8046829ULL }, // Inst #13254 = VPCMPBZrri |
| 28847 | { 13253, 9, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5106, 0|(1ULL<<MCID::MayLoad), 0xea9ff8046819ULL }, // Inst #13253 = VPCMPBZrmik |
| 28848 | { 13252, 8, 1, 0, 1348, 0, 0, X86ImpOpBase + 0, 5098, 0|(1ULL<<MCID::MayLoad), 0xe89ff8046819ULL }, // Inst #13252 = VPCMPBZrmi |
| 28849 | { 13251, 5, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5093, 0|(1ULL<<MCID::Commutable), 0xc39ff8046829ULL }, // Inst #13251 = VPCMPBZ256rrik |
| 28850 | { 13250, 4, 1, 0, 1246, 0, 0, X86ImpOpBase + 0, 5089, 0|(1ULL<<MCID::Commutable), 0xc19ff8046829ULL }, // Inst #13250 = VPCMPBZ256rri |
| 28851 | { 13249, 9, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5080, 0|(1ULL<<MCID::MayLoad), 0xc39ff8046819ULL }, // Inst #13249 = VPCMPBZ256rmik |
| 28852 | { 13248, 8, 1, 0, 1347, 0, 0, X86ImpOpBase + 0, 5072, 0|(1ULL<<MCID::MayLoad), 0xc19ff8046819ULL }, // Inst #13248 = VPCMPBZ256rmi |
| 28853 | { 13247, 5, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5067, 0|(1ULL<<MCID::Commutable), 0xa29ff8046829ULL }, // Inst #13247 = VPCMPBZ128rrik |
| 28854 | { 13246, 4, 1, 0, 1245, 0, 0, X86ImpOpBase + 0, 5063, 0|(1ULL<<MCID::Commutable), 0xa09ff8046829ULL }, // Inst #13246 = VPCMPBZ128rri |
| 28855 | { 13245, 9, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5054, 0|(1ULL<<MCID::MayLoad), 0xa29ff8046819ULL }, // Inst #13245 = VPCMPBZ128rmik |
| 28856 | { 13244, 8, 1, 0, 1338, 0, 0, X86ImpOpBase + 0, 5046, 0|(1ULL<<MCID::MayLoad), 0xa09ff8046819ULL }, // Inst #13244 = VPCMPBZ128rmi |
| 28857 | { 13243, 4, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 2231, 0, 0xd1580e802bULL }, // Inst #13243 = VPCMOVrrr_REV |
| 28858 | { 13242, 4, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 2231, 0, 0xd1580c8029ULL }, // Inst #13242 = VPCMOVrrr |
| 28859 | { 13241, 8, 1, 0, 509, 0, 0, X86ImpOpBase + 0, 3808, 0|(1ULL<<MCID::MayLoad), 0xd1580e801bULL }, // Inst #13241 = VPCMOVrrm |
| 28860 | { 13240, 8, 1, 0, 508, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xd1580c8019ULL }, // Inst #13240 = VPCMOVrmr |
| 28861 | { 13239, 4, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 2219, 0, 0x1d1580e802bULL }, // Inst #13239 = VPCMOVYrrr_REV |
| 28862 | { 13238, 4, 1, 0, 346, 0, 0, X86ImpOpBase + 0, 2219, 0, 0x1d1580c8029ULL }, // Inst #13238 = VPCMOVYrrr |
| 28863 | { 13237, 8, 1, 0, 507, 0, 0, X86ImpOpBase + 0, 3800, 0|(1ULL<<MCID::MayLoad), 0x1d1580e801bULL }, // Inst #13237 = VPCMOVYrrm |
| 28864 | { 13236, 8, 1, 0, 506, 0, 0, X86ImpOpBase + 0, 2211, 0|(1ULL<<MCID::MayLoad), 0x1d1580c8019ULL }, // Inst #13236 = VPCMOVYrmr |
| 28865 | { 13235, 4, 1, 0, 1188, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0xa238046829ULL }, // Inst #13235 = VPCLMULQDQrri |
| 28866 | { 13234, 8, 1, 0, 257, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xa238046819ULL }, // Inst #13234 = VPCLMULQDQrmi |
| 28867 | { 13233, 4, 1, 0, 258, 0, 0, X86ImpOpBase + 0, 909, 0|(1ULL<<MCID::Commutable), 0xe8a278046829ULL }, // Inst #13233 = VPCLMULQDQZrri |
| 28868 | { 13232, 8, 1, 0, 1921, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8a278046819ULL }, // Inst #13232 = VPCLMULQDQZrmi |
| 28869 | { 13231, 4, 1, 0, 258, 0, 0, X86ImpOpBase + 0, 905, 0|(1ULL<<MCID::Commutable), 0xc1a278046829ULL }, // Inst #13231 = VPCLMULQDQZ256rri |
| 28870 | { 13230, 8, 1, 0, 1922, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1a278046819ULL }, // Inst #13230 = VPCLMULQDQZ256rmi |
| 28871 | { 13229, 4, 1, 0, 258, 0, 0, X86ImpOpBase + 0, 897, 0|(1ULL<<MCID::Commutable), 0xa0a278046829ULL }, // Inst #13229 = VPCLMULQDQZ128rri |
| 28872 | { 13228, 8, 1, 0, 257, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0a278046819ULL }, // Inst #13228 = VPCLMULQDQZ128rmi |
| 28873 | { 13227, 4, 1, 0, 258, 0, 0, X86ImpOpBase + 0, 901, 0|(1ULL<<MCID::Commutable), 0x1a238046829ULL }, // Inst #13227 = VPCLMULQDQYrri |
| 28874 | { 13226, 8, 1, 0, 1640, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x1a238046819ULL }, // Inst #13226 = VPCLMULQDQYrmi |
| 28875 | { 13225, 2, 1, 0, 868, 0, 0, X86ImpOpBase + 0, 535, 0, 0x3cb8004829ULL }, // Inst #13225 = VPBROADCASTWrr |
| 28876 | { 13224, 6, 1, 0, 955, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x3cb8004819ULL }, // Inst #13224 = VPBROADCASTWrm |
| 28877 | { 13223, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5043, 0, 0xee3df8004829ULL }, // Inst #13223 = VPBROADCASTWrZrrkz |
| 28878 | { 13222, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5039, 0, 0xea3df8004829ULL }, // Inst #13222 = VPBROADCASTWrZrrk |
| 28879 | { 13221, 2, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4944, 0, 0xe83df8004829ULL }, // Inst #13221 = VPBROADCASTWrZrr |
| 28880 | { 13220, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5036, 0, 0xc73df8004829ULL }, // Inst #13220 = VPBROADCASTWrZ256rrkz |
| 28881 | { 13219, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5032, 0, 0xc33df8004829ULL }, // Inst #13219 = VPBROADCASTWrZ256rrk |
| 28882 | { 13218, 2, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4935, 0, 0xc13df8004829ULL }, // Inst #13218 = VPBROADCASTWrZ256rr |
| 28883 | { 13217, 3, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 5029, 0, 0xa63df8004829ULL }, // Inst #13217 = VPBROADCASTWrZ128rrkz |
| 28884 | { 13216, 4, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 5025, 0, 0xa23df8004829ULL }, // Inst #13216 = VPBROADCASTWrZ128rrk |
| 28885 | { 13215, 2, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 4700, 0, 0xa03df8004829ULL }, // Inst #13215 = VPBROADCASTWrZ128rr |
| 28886 | { 13214, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5022, 0, 0xee3cf8004829ULL }, // Inst #13214 = VPBROADCASTWZrrkz |
| 28887 | { 13213, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5018, 0, 0xea3cf8004829ULL }, // Inst #13213 = VPBROADCASTWZrrk |
| 28888 | { 13212, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xe83cf8004829ULL }, // Inst #13212 = VPBROADCASTWZrr |
| 28889 | { 13211, 7, 1, 0, 1310, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0x4e3cf8004819ULL }, // Inst #13211 = VPBROADCASTWZrmkz |
| 28890 | { 13210, 8, 1, 0, 1310, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad), 0x4a3cf8004819ULL }, // Inst #13210 = VPBROADCASTWZrmk |
| 28891 | { 13209, 6, 1, 0, 1800, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x483cf8004819ULL }, // Inst #13209 = VPBROADCASTWZrm |
| 28892 | { 13208, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5015, 0, 0xc73cf8004829ULL }, // Inst #13208 = VPBROADCASTWZ256rrkz |
| 28893 | { 13207, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5011, 0, 0xc33cf8004829ULL }, // Inst #13207 = VPBROADCASTWZ256rrk |
| 28894 | { 13206, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xc13cf8004829ULL }, // Inst #13206 = VPBROADCASTWZ256rr |
| 28895 | { 13205, 7, 1, 0, 1310, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0x473cf8004819ULL }, // Inst #13205 = VPBROADCASTWZ256rmkz |
| 28896 | { 13204, 8, 1, 0, 1310, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0x433cf8004819ULL }, // Inst #13204 = VPBROADCASTWZ256rmk |
| 28897 | { 13203, 6, 1, 0, 1800, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x413cf8004819ULL }, // Inst #13203 = VPBROADCASTWZ256rm |
| 28898 | { 13202, 3, 1, 0, 1686, 0, 0, X86ImpOpBase + 0, 2970, 0, 0xa63cf8004829ULL }, // Inst #13202 = VPBROADCASTWZ128rrkz |
| 28899 | { 13201, 4, 1, 0, 1686, 0, 0, X86ImpOpBase + 0, 2966, 0, 0xa23cf8004829ULL }, // Inst #13201 = VPBROADCASTWZ128rrk |
| 28900 | { 13200, 2, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa03cf8004829ULL }, // Inst #13200 = VPBROADCASTWZ128rr |
| 28901 | { 13199, 7, 1, 0, 1420, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0x463cf8004819ULL }, // Inst #13199 = VPBROADCASTWZ128rmkz |
| 28902 | { 13198, 8, 1, 0, 1420, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0x423cf8004819ULL }, // Inst #13198 = VPBROADCASTWZ128rmk |
| 28903 | { 13197, 6, 1, 0, 1832, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x403cf8004819ULL }, // Inst #13197 = VPBROADCASTWZ128rm |
| 28904 | { 13196, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x13cb8004829ULL }, // Inst #13196 = VPBROADCASTWYrr |
| 28905 | { 13195, 6, 1, 0, 873, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x13cb8004819ULL }, // Inst #13195 = VPBROADCASTWYrm |
| 28906 | { 13194, 2, 1, 0, 1413, 0, 0, X86ImpOpBase + 0, 535, 0, 0x2cb8004829ULL }, // Inst #13194 = VPBROADCASTQrr |
| 28907 | { 13193, 6, 1, 0, 830, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x2cb8004819ULL }, // Inst #13193 = VPBROADCASTQrm |
| 28908 | { 13192, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5008, 0, 0xee3e78024829ULL }, // Inst #13192 = VPBROADCASTQrZrrkz |
| 28909 | { 13191, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5004, 0, 0xea3e78024829ULL }, // Inst #13191 = VPBROADCASTQrZrrk |
| 28910 | { 13190, 2, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 5002, 0, 0xe83e78024829ULL }, // Inst #13190 = VPBROADCASTQrZrr |
| 28911 | { 13189, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4999, 0, 0xc73e78024829ULL }, // Inst #13189 = VPBROADCASTQrZ256rrkz |
| 28912 | { 13188, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4995, 0, 0xc33e78024829ULL }, // Inst #13188 = VPBROADCASTQrZ256rrk |
| 28913 | { 13187, 2, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4993, 0, 0xc13e78024829ULL }, // Inst #13187 = VPBROADCASTQrZ256rr |
| 28914 | { 13186, 3, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 4990, 0, 0xa63e78024829ULL }, // Inst #13186 = VPBROADCASTQrZ128rrkz |
| 28915 | { 13185, 4, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 4986, 0, 0xa23e78024829ULL }, // Inst #13185 = VPBROADCASTQrZ128rrk |
| 28916 | { 13184, 2, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 4690, 0, 0xa03e78024829ULL }, // Inst #13184 = VPBROADCASTQrZ128rr |
| 28917 | { 13183, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2356, 0, 0xee2cf8024829ULL }, // Inst #13183 = VPBROADCASTQZrrkz |
| 28918 | { 13182, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2352, 0, 0xea2cf8024829ULL }, // Inst #13182 = VPBROADCASTQZrrk |
| 28919 | { 13181, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xe82cf8024829ULL }, // Inst #13181 = VPBROADCASTQZrr |
| 28920 | { 13180, 7, 1, 0, 1792, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x8e2cf8024819ULL }, // Inst #13180 = VPBROADCASTQZrmkz |
| 28921 | { 13179, 8, 1, 0, 1792, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x8a2cf8024819ULL }, // Inst #13179 = VPBROADCASTQZrmk |
| 28922 | { 13178, 6, 1, 0, 1784, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x882cf8024819ULL }, // Inst #13178 = VPBROADCASTQZrm |
| 28923 | { 13177, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2349, 0, 0xc72cf8024829ULL }, // Inst #13177 = VPBROADCASTQZ256rrkz |
| 28924 | { 13176, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2345, 0, 0xc32cf8024829ULL }, // Inst #13176 = VPBROADCASTQZ256rrk |
| 28925 | { 13175, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xc12cf8024829ULL }, // Inst #13175 = VPBROADCASTQZ256rr |
| 28926 | { 13174, 7, 1, 0, 1314, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x872cf8024819ULL }, // Inst #13174 = VPBROADCASTQZ256rmkz |
| 28927 | { 13173, 8, 1, 0, 1314, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x832cf8024819ULL }, // Inst #13173 = VPBROADCASTQZ256rmk |
| 28928 | { 13172, 6, 1, 0, 1784, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x812cf8024819ULL }, // Inst #13172 = VPBROADCASTQZ256rm |
| 28929 | { 13171, 3, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa62cf8024829ULL }, // Inst #13171 = VPBROADCASTQZ128rrkz |
| 28930 | { 13170, 4, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2702, 0, 0xa22cf8024829ULL }, // Inst #13170 = VPBROADCASTQZ128rrk |
| 28931 | { 13169, 2, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02cf8024829ULL }, // Inst #13169 = VPBROADCASTQZ128rr |
| 28932 | { 13168, 7, 1, 0, 1293, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x862cf8024819ULL }, // Inst #13168 = VPBROADCASTQZ128rmkz |
| 28933 | { 13167, 8, 1, 0, 1293, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x822cf8024819ULL }, // Inst #13167 = VPBROADCASTQZ128rmk |
| 28934 | { 13166, 6, 1, 0, 1756, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x802cf8024819ULL }, // Inst #13166 = VPBROADCASTQZ128rm |
| 28935 | { 13165, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x12cb8004829ULL }, // Inst #13165 = VPBROADCASTQYrr |
| 28936 | { 13164, 6, 1, 0, 833, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x12cb8004819ULL }, // Inst #13164 = VPBROADCASTQYrm |
| 28937 | { 13163, 2, 1, 0, 2260, 0, 0, X86ImpOpBase + 0, 4984, 0, 0xe81d78005029ULL }, // Inst #13163 = VPBROADCASTMW2DZrr |
| 28938 | { 13162, 2, 1, 0, 2260, 0, 0, X86ImpOpBase + 0, 4982, 0, 0xc11d78005029ULL }, // Inst #13162 = VPBROADCASTMW2DZ256rr |
| 28939 | { 13161, 2, 1, 0, 2260, 0, 0, X86ImpOpBase + 0, 4980, 0, 0xa01d78005029ULL }, // Inst #13161 = VPBROADCASTMW2DZ128rr |
| 28940 | { 13160, 2, 1, 0, 2260, 0, 0, X86ImpOpBase + 0, 4978, 0, 0xe81578025029ULL }, // Inst #13160 = VPBROADCASTMB2QZrr |
| 28941 | { 13159, 2, 1, 0, 2260, 0, 0, X86ImpOpBase + 0, 4976, 0, 0xc11578025029ULL }, // Inst #13159 = VPBROADCASTMB2QZ256rr |
| 28942 | { 13158, 2, 1, 0, 2260, 0, 0, X86ImpOpBase + 0, 4974, 0, 0xa01578025029ULL }, // Inst #13158 = VPBROADCASTMB2QZ128rr |
| 28943 | { 13157, 2, 1, 0, 1413, 0, 0, X86ImpOpBase + 0, 535, 0, 0x2c38004829ULL }, // Inst #13157 = VPBROADCASTDrr |
| 28944 | { 13156, 6, 1, 0, 830, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x2c38004819ULL }, // Inst #13156 = VPBROADCASTDrm |
| 28945 | { 13155, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4971, 0, 0xee3e78004829ULL }, // Inst #13155 = VPBROADCASTDrZrrkz |
| 28946 | { 13154, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4967, 0, 0xea3e78004829ULL }, // Inst #13154 = VPBROADCASTDrZrrk |
| 28947 | { 13153, 2, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4944, 0, 0xe83e78004829ULL }, // Inst #13153 = VPBROADCASTDrZrr |
| 28948 | { 13152, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4964, 0, 0xc73e78004829ULL }, // Inst #13152 = VPBROADCASTDrZ256rrkz |
| 28949 | { 13151, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4960, 0, 0xc33e78004829ULL }, // Inst #13151 = VPBROADCASTDrZ256rrk |
| 28950 | { 13150, 2, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4935, 0, 0xc13e78004829ULL }, // Inst #13150 = VPBROADCASTDrZ256rr |
| 28951 | { 13149, 3, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 4957, 0, 0xa63e78004829ULL }, // Inst #13149 = VPBROADCASTDrZ128rrkz |
| 28952 | { 13148, 4, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 4953, 0, 0xa23e78004829ULL }, // Inst #13148 = VPBROADCASTDrZ128rrk |
| 28953 | { 13147, 2, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 4700, 0, 0xa03e78004829ULL }, // Inst #13147 = VPBROADCASTDrZ128rr |
| 28954 | { 13146, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2286, 0, 0xee2c78004829ULL }, // Inst #13146 = VPBROADCASTDZrrkz |
| 28955 | { 13145, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2282, 0, 0xea2c78004829ULL }, // Inst #13145 = VPBROADCASTDZrrk |
| 28956 | { 13144, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xe82c78004829ULL }, // Inst #13144 = VPBROADCASTDZrr |
| 28957 | { 13143, 7, 1, 0, 1792, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0x6e2c78004819ULL }, // Inst #13143 = VPBROADCASTDZrmkz |
| 28958 | { 13142, 8, 1, 0, 1792, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x6a2c78004819ULL }, // Inst #13142 = VPBROADCASTDZrmk |
| 28959 | { 13141, 6, 1, 0, 1784, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x682c78004819ULL }, // Inst #13141 = VPBROADCASTDZrm |
| 28960 | { 13140, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2256, 0, 0xc72c78004829ULL }, // Inst #13140 = VPBROADCASTDZ256rrkz |
| 28961 | { 13139, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2252, 0, 0xc32c78004829ULL }, // Inst #13139 = VPBROADCASTDZ256rrk |
| 28962 | { 13138, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xc12c78004829ULL }, // Inst #13138 = VPBROADCASTDZ256rr |
| 28963 | { 13137, 7, 1, 0, 1314, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x672c78004819ULL }, // Inst #13137 = VPBROADCASTDZ256rmkz |
| 28964 | { 13136, 8, 1, 0, 1314, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x632c78004819ULL }, // Inst #13136 = VPBROADCASTDZ256rmk |
| 28965 | { 13135, 6, 1, 0, 1784, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x612c78004819ULL }, // Inst #13135 = VPBROADCASTDZ256rm |
| 28966 | { 13134, 3, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa62c78004829ULL }, // Inst #13134 = VPBROADCASTDZ128rrkz |
| 28967 | { 13133, 4, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa22c78004829ULL }, // Inst #13133 = VPBROADCASTDZ128rrk |
| 28968 | { 13132, 2, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02c78004829ULL }, // Inst #13132 = VPBROADCASTDZ128rr |
| 28969 | { 13131, 7, 1, 0, 1293, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x662c78004819ULL }, // Inst #13131 = VPBROADCASTDZ128rmkz |
| 28970 | { 13130, 8, 1, 0, 1293, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x622c78004819ULL }, // Inst #13130 = VPBROADCASTDZ128rmk |
| 28971 | { 13129, 6, 1, 0, 1756, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x602c78004819ULL }, // Inst #13129 = VPBROADCASTDZ128rm |
| 28972 | { 13128, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x12c38004829ULL }, // Inst #13128 = VPBROADCASTDYrr |
| 28973 | { 13127, 6, 1, 0, 833, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x12c38004819ULL }, // Inst #13127 = VPBROADCASTDYrm |
| 28974 | { 13126, 2, 1, 0, 868, 0, 0, X86ImpOpBase + 0, 535, 0, 0x3c38004829ULL }, // Inst #13126 = VPBROADCASTBrr |
| 28975 | { 13125, 6, 1, 0, 955, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x3c38004819ULL }, // Inst #13125 = VPBROADCASTBrm |
| 28976 | { 13124, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4950, 0, 0xee3d78004829ULL }, // Inst #13124 = VPBROADCASTBrZrrkz |
| 28977 | { 13123, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4946, 0, 0xea3d78004829ULL }, // Inst #13123 = VPBROADCASTBrZrrk |
| 28978 | { 13122, 2, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4944, 0, 0xe83d78004829ULL }, // Inst #13122 = VPBROADCASTBrZrr |
| 28979 | { 13121, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4941, 0, 0xc73d78004829ULL }, // Inst #13121 = VPBROADCASTBrZ256rrkz |
| 28980 | { 13120, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4937, 0, 0xc33d78004829ULL }, // Inst #13120 = VPBROADCASTBrZ256rrk |
| 28981 | { 13119, 2, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4935, 0, 0xc13d78004829ULL }, // Inst #13119 = VPBROADCASTBrZ256rr |
| 28982 | { 13118, 3, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 4932, 0, 0xa63d78004829ULL }, // Inst #13118 = VPBROADCASTBrZ128rrkz |
| 28983 | { 13117, 4, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 4928, 0, 0xa23d78004829ULL }, // Inst #13117 = VPBROADCASTBrZ128rrk |
| 28984 | { 13116, 2, 1, 0, 2124, 0, 0, X86ImpOpBase + 0, 4700, 0, 0xa03d78004829ULL }, // Inst #13116 = VPBROADCASTBrZ128rr |
| 28985 | { 13115, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4925, 0, 0xee3c78004829ULL }, // Inst #13115 = VPBROADCASTBZrrkz |
| 28986 | { 13114, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4921, 0, 0xea3c78004829ULL }, // Inst #13114 = VPBROADCASTBZrrk |
| 28987 | { 13113, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xe83c78004829ULL }, // Inst #13113 = VPBROADCASTBZrr |
| 28988 | { 13112, 7, 1, 0, 1310, 0, 0, X86ImpOpBase + 0, 4798, 0|(1ULL<<MCID::MayLoad), 0x2e3c78004819ULL }, // Inst #13112 = VPBROADCASTBZrmkz |
| 28989 | { 13111, 8, 1, 0, 1310, 0, 0, X86ImpOpBase + 0, 4790, 0|(1ULL<<MCID::MayLoad), 0x2a3c78004819ULL }, // Inst #13111 = VPBROADCASTBZrmk |
| 28990 | { 13110, 6, 1, 0, 1800, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x283c78004819ULL }, // Inst #13110 = VPBROADCASTBZrm |
| 28991 | { 13109, 3, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4918, 0, 0xc73c78004829ULL }, // Inst #13109 = VPBROADCASTBZ256rrkz |
| 28992 | { 13108, 4, 1, 0, 2123, 0, 0, X86ImpOpBase + 0, 4914, 0, 0xc33c78004829ULL }, // Inst #13108 = VPBROADCASTBZ256rrk |
| 28993 | { 13107, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xc13c78004829ULL }, // Inst #13107 = VPBROADCASTBZ256rr |
| 28994 | { 13106, 7, 1, 0, 1310, 0, 0, X86ImpOpBase + 0, 4769, 0|(1ULL<<MCID::MayLoad), 0x273c78004819ULL }, // Inst #13106 = VPBROADCASTBZ256rmkz |
| 28995 | { 13105, 8, 1, 0, 1310, 0, 0, X86ImpOpBase + 0, 4761, 0|(1ULL<<MCID::MayLoad), 0x233c78004819ULL }, // Inst #13105 = VPBROADCASTBZ256rmk |
| 28996 | { 13104, 6, 1, 0, 1800, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x213c78004819ULL }, // Inst #13104 = VPBROADCASTBZ256rm |
| 28997 | { 13103, 3, 1, 0, 1686, 0, 0, X86ImpOpBase + 0, 4751, 0, 0xa63c78004829ULL }, // Inst #13103 = VPBROADCASTBZ128rrkz |
| 28998 | { 13102, 4, 1, 0, 1686, 0, 0, X86ImpOpBase + 0, 4747, 0, 0xa23c78004829ULL }, // Inst #13102 = VPBROADCASTBZ128rrk |
| 28999 | { 13101, 2, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa03c78004829ULL }, // Inst #13101 = VPBROADCASTBZ128rr |
| 29000 | { 13100, 7, 1, 0, 1420, 0, 0, X86ImpOpBase + 0, 4740, 0|(1ULL<<MCID::MayLoad), 0x263c78004819ULL }, // Inst #13100 = VPBROADCASTBZ128rmkz |
| 29001 | { 13099, 8, 1, 0, 1420, 0, 0, X86ImpOpBase + 0, 4732, 0|(1ULL<<MCID::MayLoad), 0x223c78004819ULL }, // Inst #13099 = VPBROADCASTBZ128rmk |
| 29002 | { 13098, 6, 1, 0, 1832, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x203c78004819ULL }, // Inst #13098 = VPBROADCASTBZ128rm |
| 29003 | { 13097, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x13c38004829ULL }, // Inst #13097 = VPBROADCASTBYrr |
| 29004 | { 13096, 6, 1, 0, 873, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x13c38004819ULL }, // Inst #13096 = VPBROADCASTBYrm |
| 29005 | { 13095, 4, 1, 0, 256, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0x8738046829ULL }, // Inst #13095 = VPBLENDWrri |
| 29006 | { 13094, 8, 1, 0, 255, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0x8738046819ULL }, // Inst #13094 = VPBLENDWrmi |
| 29007 | { 13093, 4, 1, 0, 1478, 0, 0, X86ImpOpBase + 0, 901, 0|(1ULL<<MCID::Commutable), 0x18738046829ULL }, // Inst #13093 = VPBLENDWYrri |
| 29008 | { 13092, 8, 1, 0, 1642, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x18738046819ULL }, // Inst #13092 = VPBLENDWYrmi |
| 29009 | { 13091, 4, 1, 0, 1628, 0, 0, X86ImpOpBase + 0, 2231, 0, 0xa6380c6829ULL }, // Inst #13091 = VPBLENDVBrrr |
| 29010 | { 13090, 8, 1, 0, 1626, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xa6380c6819ULL }, // Inst #13090 = VPBLENDVBrmr |
| 29011 | { 13089, 4, 1, 0, 1926, 0, 0, X86ImpOpBase + 0, 2219, 0, 0x1a6380c6829ULL }, // Inst #13089 = VPBLENDVBYrrr |
| 29012 | { 13088, 8, 1, 0, 1924, 0, 0, X86ImpOpBase + 0, 2211, 0|(1ULL<<MCID::MayLoad), 0x1a6380c6819ULL }, // Inst #13088 = VPBLENDVBYrmr |
| 29013 | { 13087, 4, 1, 0, 1863, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xeeb378024829ULL }, // Inst #13087 = VPBLENDMWZrrkz |
| 29014 | { 13086, 4, 1, 0, 1863, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xeab378024829ULL }, // Inst #13086 = VPBLENDMWZrrk |
| 29015 | { 13085, 3, 1, 0, 503, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b378024829ULL }, // Inst #13085 = VPBLENDMWZrr |
| 29016 | { 13084, 8, 1, 0, 1904, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeeb378024819ULL }, // Inst #13084 = VPBLENDMWZrmkz |
| 29017 | { 13083, 8, 1, 0, 1904, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeab378024819ULL }, // Inst #13083 = VPBLENDMWZrmk |
| 29018 | { 13082, 7, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b378024819ULL }, // Inst #13082 = VPBLENDMWZrm |
| 29019 | { 13081, 4, 1, 0, 2227, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc7b378024829ULL }, // Inst #13081 = VPBLENDMWZ256rrkz |
| 29020 | { 13080, 4, 1, 0, 2227, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc3b378024829ULL }, // Inst #13080 = VPBLENDMWZ256rrk |
| 29021 | { 13079, 3, 1, 0, 1232, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b378024829ULL }, // Inst #13079 = VPBLENDMWZ256rr |
| 29022 | { 13078, 8, 1, 0, 2222, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7b378024819ULL }, // Inst #13078 = VPBLENDMWZ256rmkz |
| 29023 | { 13077, 8, 1, 0, 2222, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc3b378024819ULL }, // Inst #13077 = VPBLENDMWZ256rmk |
| 29024 | { 13076, 7, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b378024819ULL }, // Inst #13076 = VPBLENDMWZ256rm |
| 29025 | { 13075, 4, 1, 0, 2226, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6b378024829ULL }, // Inst #13075 = VPBLENDMWZ128rrkz |
| 29026 | { 13074, 4, 1, 0, 2226, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa2b378024829ULL }, // Inst #13074 = VPBLENDMWZ128rrk |
| 29027 | { 13073, 3, 1, 0, 1231, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b378024829ULL }, // Inst #13073 = VPBLENDMWZ128rr |
| 29028 | { 13072, 8, 1, 0, 2221, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6b378024819ULL }, // Inst #13072 = VPBLENDMWZ128rmkz |
| 29029 | { 13071, 8, 1, 0, 2221, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa2b378024819ULL }, // Inst #13071 = VPBLENDMWZ128rmk |
| 29030 | { 13070, 7, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b378024819ULL }, // Inst #13070 = VPBLENDMWZ128rm |
| 29031 | { 13069, 4, 1, 0, 503, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeeb278024829ULL }, // Inst #13069 = VPBLENDMQZrrkz |
| 29032 | { 13068, 4, 1, 0, 503, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeab278024829ULL }, // Inst #13068 = VPBLENDMQZrrk |
| 29033 | { 13067, 3, 1, 0, 503, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b278024829ULL }, // Inst #13067 = VPBLENDMQZrr |
| 29034 | { 13066, 8, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeb278024819ULL }, // Inst #13066 = VPBLENDMQZrmkz |
| 29035 | { 13065, 8, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeab278024819ULL }, // Inst #13065 = VPBLENDMQZrmk |
| 29036 | { 13064, 8, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eb278024819ULL }, // Inst #13064 = VPBLENDMQZrmbkz |
| 29037 | { 13063, 8, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9ab278024819ULL }, // Inst #13063 = VPBLENDMQZrmbk |
| 29038 | { 13062, 7, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98b278024819ULL }, // Inst #13062 = VPBLENDMQZrmb |
| 29039 | { 13061, 7, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b278024819ULL }, // Inst #13061 = VPBLENDMQZrm |
| 29040 | { 13060, 4, 1, 0, 1232, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc7b278024829ULL }, // Inst #13060 = VPBLENDMQZ256rrkz |
| 29041 | { 13059, 4, 1, 0, 1232, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc3b278024829ULL }, // Inst #13059 = VPBLENDMQZ256rrk |
| 29042 | { 13058, 3, 1, 0, 1232, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b278024829ULL }, // Inst #13058 = VPBLENDMQZ256rr |
| 29043 | { 13057, 8, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7b278024819ULL }, // Inst #13057 = VPBLENDMQZ256rmkz |
| 29044 | { 13056, 8, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc3b278024819ULL }, // Inst #13056 = VPBLENDMQZ256rmk |
| 29045 | { 13055, 8, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97b278024819ULL }, // Inst #13055 = VPBLENDMQZ256rmbkz |
| 29046 | { 13054, 8, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x93b278024819ULL }, // Inst #13054 = VPBLENDMQZ256rmbk |
| 29047 | { 13053, 7, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91b278024819ULL }, // Inst #13053 = VPBLENDMQZ256rmb |
| 29048 | { 13052, 7, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b278024819ULL }, // Inst #13052 = VPBLENDMQZ256rm |
| 29049 | { 13051, 4, 1, 0, 1231, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6b278024829ULL }, // Inst #13051 = VPBLENDMQZ128rrkz |
| 29050 | { 13050, 4, 1, 0, 1231, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa2b278024829ULL }, // Inst #13050 = VPBLENDMQZ128rrk |
| 29051 | { 13049, 3, 1, 0, 1231, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b278024829ULL }, // Inst #13049 = VPBLENDMQZ128rr |
| 29052 | { 13048, 8, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6b278024819ULL }, // Inst #13048 = VPBLENDMQZ128rmkz |
| 29053 | { 13047, 8, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa2b278024819ULL }, // Inst #13047 = VPBLENDMQZ128rmk |
| 29054 | { 13046, 8, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96b278024819ULL }, // Inst #13046 = VPBLENDMQZ128rmbkz |
| 29055 | { 13045, 8, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x92b278024819ULL }, // Inst #13045 = VPBLENDMQZ128rmbk |
| 29056 | { 13044, 7, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90b278024819ULL }, // Inst #13044 = VPBLENDMQZ128rmb |
| 29057 | { 13043, 7, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b278024819ULL }, // Inst #13043 = VPBLENDMQZ128rm |
| 29058 | { 13042, 4, 1, 0, 503, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeeb278004829ULL }, // Inst #13042 = VPBLENDMDZrrkz |
| 29059 | { 13041, 4, 1, 0, 503, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeab278004829ULL }, // Inst #13041 = VPBLENDMDZrrk |
| 29060 | { 13040, 3, 1, 0, 503, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b278004829ULL }, // Inst #13040 = VPBLENDMDZrr |
| 29061 | { 13039, 8, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeb278004819ULL }, // Inst #13039 = VPBLENDMDZrmkz |
| 29062 | { 13038, 8, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeab278004819ULL }, // Inst #13038 = VPBLENDMDZrmk |
| 29063 | { 13037, 8, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eb278004819ULL }, // Inst #13037 = VPBLENDMDZrmbkz |
| 29064 | { 13036, 8, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7ab278004819ULL }, // Inst #13036 = VPBLENDMDZrmbk |
| 29065 | { 13035, 7, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78b278004819ULL }, // Inst #13035 = VPBLENDMDZrmb |
| 29066 | { 13034, 7, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b278004819ULL }, // Inst #13034 = VPBLENDMDZrm |
| 29067 | { 13033, 4, 1, 0, 1232, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc7b278004829ULL }, // Inst #13033 = VPBLENDMDZ256rrkz |
| 29068 | { 13032, 4, 1, 0, 1232, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc3b278004829ULL }, // Inst #13032 = VPBLENDMDZ256rrk |
| 29069 | { 13031, 3, 1, 0, 1232, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b278004829ULL }, // Inst #13031 = VPBLENDMDZ256rr |
| 29070 | { 13030, 8, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7b278004819ULL }, // Inst #13030 = VPBLENDMDZ256rmkz |
| 29071 | { 13029, 8, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc3b278004819ULL }, // Inst #13029 = VPBLENDMDZ256rmk |
| 29072 | { 13028, 8, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77b278004819ULL }, // Inst #13028 = VPBLENDMDZ256rmbkz |
| 29073 | { 13027, 8, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x73b278004819ULL }, // Inst #13027 = VPBLENDMDZ256rmbk |
| 29074 | { 13026, 7, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71b278004819ULL }, // Inst #13026 = VPBLENDMDZ256rmb |
| 29075 | { 13025, 7, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b278004819ULL }, // Inst #13025 = VPBLENDMDZ256rm |
| 29076 | { 13024, 4, 1, 0, 1231, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6b278004829ULL }, // Inst #13024 = VPBLENDMDZ128rrkz |
| 29077 | { 13023, 4, 1, 0, 1231, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa2b278004829ULL }, // Inst #13023 = VPBLENDMDZ128rrk |
| 29078 | { 13022, 3, 1, 0, 1231, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b278004829ULL }, // Inst #13022 = VPBLENDMDZ128rr |
| 29079 | { 13021, 8, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6b278004819ULL }, // Inst #13021 = VPBLENDMDZ128rmkz |
| 29080 | { 13020, 8, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa2b278004819ULL }, // Inst #13020 = VPBLENDMDZ128rmk |
| 29081 | { 13019, 8, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76b278004819ULL }, // Inst #13019 = VPBLENDMDZ128rmbkz |
| 29082 | { 13018, 8, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x72b278004819ULL }, // Inst #13018 = VPBLENDMDZ128rmbk |
| 29083 | { 13017, 7, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70b278004819ULL }, // Inst #13017 = VPBLENDMDZ128rmb |
| 29084 | { 13016, 7, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b278004819ULL }, // Inst #13016 = VPBLENDMDZ128rm |
| 29085 | { 13015, 4, 1, 0, 1863, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeeb378004829ULL }, // Inst #13015 = VPBLENDMBZrrkz |
| 29086 | { 13014, 4, 1, 0, 1863, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeab378004829ULL }, // Inst #13014 = VPBLENDMBZrrk |
| 29087 | { 13013, 3, 1, 0, 503, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b378004829ULL }, // Inst #13013 = VPBLENDMBZrr |
| 29088 | { 13012, 8, 1, 0, 1904, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeeb378004819ULL }, // Inst #13012 = VPBLENDMBZrmkz |
| 29089 | { 13011, 8, 1, 0, 1904, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeab378004819ULL }, // Inst #13011 = VPBLENDMBZrmk |
| 29090 | { 13010, 7, 1, 0, 1326, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b378004819ULL }, // Inst #13010 = VPBLENDMBZrm |
| 29091 | { 13009, 4, 1, 0, 2227, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc7b378004829ULL }, // Inst #13009 = VPBLENDMBZ256rrkz |
| 29092 | { 13008, 4, 1, 0, 2227, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc3b378004829ULL }, // Inst #13008 = VPBLENDMBZ256rrk |
| 29093 | { 13007, 3, 1, 0, 1232, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b378004829ULL }, // Inst #13007 = VPBLENDMBZ256rr |
| 29094 | { 13006, 8, 1, 0, 2222, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7b378004819ULL }, // Inst #13006 = VPBLENDMBZ256rmkz |
| 29095 | { 13005, 8, 1, 0, 2222, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc3b378004819ULL }, // Inst #13005 = VPBLENDMBZ256rmk |
| 29096 | { 13004, 7, 1, 0, 1325, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b378004819ULL }, // Inst #13004 = VPBLENDMBZ256rm |
| 29097 | { 13003, 4, 1, 0, 2226, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa6b378004829ULL }, // Inst #13003 = VPBLENDMBZ128rrkz |
| 29098 | { 13002, 4, 1, 0, 2226, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa2b378004829ULL }, // Inst #13002 = VPBLENDMBZ128rrk |
| 29099 | { 13001, 3, 1, 0, 1231, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b378004829ULL }, // Inst #13001 = VPBLENDMBZ128rr |
| 29100 | { 13000, 8, 1, 0, 2221, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6b378004819ULL }, // Inst #13000 = VPBLENDMBZ128rmkz |
| 29101 | { 12999, 8, 1, 0, 2221, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa2b378004819ULL }, // Inst #12999 = VPBLENDMBZ128rmk |
| 29102 | { 12998, 7, 1, 0, 1299, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b378004819ULL }, // Inst #12998 = VPBLENDMBZ128rm |
| 29103 | { 12997, 4, 1, 0, 844, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0x8138046829ULL }, // Inst #12997 = VPBLENDDrri |
| 29104 | { 12996, 8, 1, 0, 855, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0x8138046819ULL }, // Inst #12996 = VPBLENDDrmi |
| 29105 | { 12995, 4, 1, 0, 843, 0, 0, X86ImpOpBase + 0, 901, 0|(1ULL<<MCID::Commutable), 0x18138046829ULL }, // Inst #12995 = VPBLENDDYrri |
| 29106 | { 12994, 8, 1, 0, 856, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x18138046819ULL }, // Inst #12994 = VPBLENDDYrmi |
| 29107 | { 12993, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xf1b8002829ULL }, // Inst #12993 = VPAVGWrr |
| 29108 | { 12992, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf1b8002819ULL }, // Inst #12992 = VPAVGWrm |
| 29109 | { 12991, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xeef1f8002829ULL }, // Inst #12991 = VPAVGWZrrkz |
| 29110 | { 12990, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeaf1f8002829ULL }, // Inst #12990 = VPAVGWZrrk |
| 29111 | { 12989, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f1f8002829ULL }, // Inst #12989 = VPAVGWZrr |
| 29112 | { 12988, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeef1f8002819ULL }, // Inst #12988 = VPAVGWZrmkz |
| 29113 | { 12987, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeaf1f8002819ULL }, // Inst #12987 = VPAVGWZrmk |
| 29114 | { 12986, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f1f8002819ULL }, // Inst #12986 = VPAVGWZrm |
| 29115 | { 12985, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc7f1f8002829ULL }, // Inst #12985 = VPAVGWZ256rrkz |
| 29116 | { 12984, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc3f1f8002829ULL }, // Inst #12984 = VPAVGWZ256rrk |
| 29117 | { 12983, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f1f8002829ULL }, // Inst #12983 = VPAVGWZ256rr |
| 29118 | { 12982, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7f1f8002819ULL }, // Inst #12982 = VPAVGWZ256rmkz |
| 29119 | { 12981, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3f1f8002819ULL }, // Inst #12981 = VPAVGWZ256rmk |
| 29120 | { 12980, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f1f8002819ULL }, // Inst #12980 = VPAVGWZ256rm |
| 29121 | { 12979, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa6f1f8002829ULL }, // Inst #12979 = VPAVGWZ128rrkz |
| 29122 | { 12978, 5, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa2f1f8002829ULL }, // Inst #12978 = VPAVGWZ128rrk |
| 29123 | { 12977, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f1f8002829ULL }, // Inst #12977 = VPAVGWZ128rr |
| 29124 | { 12976, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6f1f8002819ULL }, // Inst #12976 = VPAVGWZ128rmkz |
| 29125 | { 12975, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2f1f8002819ULL }, // Inst #12975 = VPAVGWZ128rmk |
| 29126 | { 12974, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f1f8002819ULL }, // Inst #12974 = VPAVGWZ128rm |
| 29127 | { 12973, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1f1b8002829ULL }, // Inst #12973 = VPAVGWYrr |
| 29128 | { 12972, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f1b8002819ULL }, // Inst #12972 = VPAVGWYrm |
| 29129 | { 12971, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xf038002829ULL }, // Inst #12971 = VPAVGBrr |
| 29130 | { 12970, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf038002819ULL }, // Inst #12970 = VPAVGBrm |
| 29131 | { 12969, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4590, 0|(1ULL<<MCID::Commutable), 0xeef078002829ULL }, // Inst #12969 = VPAVGBZrrkz |
| 29132 | { 12968, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xeaf078002829ULL }, // Inst #12968 = VPAVGBZrrk |
| 29133 | { 12967, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f078002829ULL }, // Inst #12967 = VPAVGBZrr |
| 29134 | { 12966, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeef078002819ULL }, // Inst #12966 = VPAVGBZrmkz |
| 29135 | { 12965, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeaf078002819ULL }, // Inst #12965 = VPAVGBZrmk |
| 29136 | { 12964, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f078002819ULL }, // Inst #12964 = VPAVGBZrm |
| 29137 | { 12963, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4564, 0|(1ULL<<MCID::Commutable), 0xc7f078002829ULL }, // Inst #12963 = VPAVGBZ256rrkz |
| 29138 | { 12962, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc3f078002829ULL }, // Inst #12962 = VPAVGBZ256rrk |
| 29139 | { 12961, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f078002829ULL }, // Inst #12961 = VPAVGBZ256rr |
| 29140 | { 12960, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7f078002819ULL }, // Inst #12960 = VPAVGBZ256rmkz |
| 29141 | { 12959, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3f078002819ULL }, // Inst #12959 = VPAVGBZ256rmk |
| 29142 | { 12958, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f078002819ULL }, // Inst #12958 = VPAVGBZ256rm |
| 29143 | { 12957, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4538, 0|(1ULL<<MCID::Commutable), 0xa6f078002829ULL }, // Inst #12957 = VPAVGBZ128rrkz |
| 29144 | { 12956, 5, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa2f078002829ULL }, // Inst #12956 = VPAVGBZ128rrk |
| 29145 | { 12955, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f078002829ULL }, // Inst #12955 = VPAVGBZ128rr |
| 29146 | { 12954, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6f078002819ULL }, // Inst #12954 = VPAVGBZ128rmkz |
| 29147 | { 12953, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2f078002819ULL }, // Inst #12953 = VPAVGBZ128rmk |
| 29148 | { 12952, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f078002819ULL }, // Inst #12952 = VPAVGBZ128rm |
| 29149 | { 12951, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1f038002829ULL }, // Inst #12951 = VPAVGBYrr |
| 29150 | { 12950, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f038002819ULL }, // Inst #12950 = VPAVGBYrm |
| 29151 | { 12949, 3, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xedb8002829ULL }, // Inst #12949 = VPANDrr |
| 29152 | { 12948, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xedb8002819ULL }, // Inst #12948 = VPANDrm |
| 29153 | { 12947, 3, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1edb8002829ULL }, // Inst #12947 = VPANDYrr |
| 29154 | { 12946, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1edb8002819ULL }, // Inst #12946 = VPANDYrm |
| 29155 | { 12945, 4, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xeeedf8022829ULL }, // Inst #12945 = VPANDQZrrkz |
| 29156 | { 12944, 5, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeaedf8022829ULL }, // Inst #12944 = VPANDQZrrk |
| 29157 | { 12943, 3, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8edf8022829ULL }, // Inst #12943 = VPANDQZrr |
| 29158 | { 12942, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeedf8022819ULL }, // Inst #12942 = VPANDQZrmkz |
| 29159 | { 12941, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaedf8022819ULL }, // Inst #12941 = VPANDQZrmk |
| 29160 | { 12940, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eedf8022819ULL }, // Inst #12940 = VPANDQZrmbkz |
| 29161 | { 12939, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aedf8022819ULL }, // Inst #12939 = VPANDQZrmbk |
| 29162 | { 12938, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98edf8022819ULL }, // Inst #12938 = VPANDQZrmb |
| 29163 | { 12937, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8edf8022819ULL }, // Inst #12937 = VPANDQZrm |
| 29164 | { 12936, 4, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc7edf8022829ULL }, // Inst #12936 = VPANDQZ256rrkz |
| 29165 | { 12935, 5, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3edf8022829ULL }, // Inst #12935 = VPANDQZ256rrk |
| 29166 | { 12934, 3, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1edf8022829ULL }, // Inst #12934 = VPANDQZ256rr |
| 29167 | { 12933, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7edf8022819ULL }, // Inst #12933 = VPANDQZ256rmkz |
| 29168 | { 12932, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3edf8022819ULL }, // Inst #12932 = VPANDQZ256rmk |
| 29169 | { 12931, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97edf8022819ULL }, // Inst #12931 = VPANDQZ256rmbkz |
| 29170 | { 12930, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93edf8022819ULL }, // Inst #12930 = VPANDQZ256rmbk |
| 29171 | { 12929, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91edf8022819ULL }, // Inst #12929 = VPANDQZ256rmb |
| 29172 | { 12928, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1edf8022819ULL }, // Inst #12928 = VPANDQZ256rm |
| 29173 | { 12927, 4, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa6edf8022829ULL }, // Inst #12927 = VPANDQZ128rrkz |
| 29174 | { 12926, 5, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2edf8022829ULL }, // Inst #12926 = VPANDQZ128rrk |
| 29175 | { 12925, 3, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0edf8022829ULL }, // Inst #12925 = VPANDQZ128rr |
| 29176 | { 12924, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6edf8022819ULL }, // Inst #12924 = VPANDQZ128rmkz |
| 29177 | { 12923, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2edf8022819ULL }, // Inst #12923 = VPANDQZ128rmk |
| 29178 | { 12922, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96edf8022819ULL }, // Inst #12922 = VPANDQZ128rmbkz |
| 29179 | { 12921, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92edf8022819ULL }, // Inst #12921 = VPANDQZ128rmbk |
| 29180 | { 12920, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90edf8022819ULL }, // Inst #12920 = VPANDQZ128rmb |
| 29181 | { 12919, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0edf8022819ULL }, // Inst #12919 = VPANDQZ128rm |
| 29182 | { 12918, 3, 1, 0, 1060, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xefb8002829ULL }, // Inst #12918 = VPANDNrr |
| 29183 | { 12917, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xefb8002819ULL }, // Inst #12917 = VPANDNrm |
| 29184 | { 12916, 3, 1, 0, 1061, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1efb8002829ULL }, // Inst #12916 = VPANDNYrr |
| 29185 | { 12915, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1efb8002819ULL }, // Inst #12915 = VPANDNYrm |
| 29186 | { 12914, 4, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeeeff8022829ULL }, // Inst #12914 = VPANDNQZrrkz |
| 29187 | { 12913, 5, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeaeff8022829ULL }, // Inst #12913 = VPANDNQZrrk |
| 29188 | { 12912, 3, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8eff8022829ULL }, // Inst #12912 = VPANDNQZrr |
| 29189 | { 12911, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeeff8022819ULL }, // Inst #12911 = VPANDNQZrmkz |
| 29190 | { 12910, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaeff8022819ULL }, // Inst #12910 = VPANDNQZrmk |
| 29191 | { 12909, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eeff8022819ULL }, // Inst #12909 = VPANDNQZrmbkz |
| 29192 | { 12908, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aeff8022819ULL }, // Inst #12908 = VPANDNQZrmbk |
| 29193 | { 12907, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98eff8022819ULL }, // Inst #12907 = VPANDNQZrmb |
| 29194 | { 12906, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8eff8022819ULL }, // Inst #12906 = VPANDNQZrm |
| 29195 | { 12905, 4, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc7eff8022829ULL }, // Inst #12905 = VPANDNQZ256rrkz |
| 29196 | { 12904, 5, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3eff8022829ULL }, // Inst #12904 = VPANDNQZ256rrk |
| 29197 | { 12903, 3, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1eff8022829ULL }, // Inst #12903 = VPANDNQZ256rr |
| 29198 | { 12902, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7eff8022819ULL }, // Inst #12902 = VPANDNQZ256rmkz |
| 29199 | { 12901, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3eff8022819ULL }, // Inst #12901 = VPANDNQZ256rmk |
| 29200 | { 12900, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97eff8022819ULL }, // Inst #12900 = VPANDNQZ256rmbkz |
| 29201 | { 12899, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93eff8022819ULL }, // Inst #12899 = VPANDNQZ256rmbk |
| 29202 | { 12898, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91eff8022819ULL }, // Inst #12898 = VPANDNQZ256rmb |
| 29203 | { 12897, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1eff8022819ULL }, // Inst #12897 = VPANDNQZ256rm |
| 29204 | { 12896, 4, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6eff8022829ULL }, // Inst #12896 = VPANDNQZ128rrkz |
| 29205 | { 12895, 5, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2eff8022829ULL }, // Inst #12895 = VPANDNQZ128rrk |
| 29206 | { 12894, 3, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0eff8022829ULL }, // Inst #12894 = VPANDNQZ128rr |
| 29207 | { 12893, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6eff8022819ULL }, // Inst #12893 = VPANDNQZ128rmkz |
| 29208 | { 12892, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2eff8022819ULL }, // Inst #12892 = VPANDNQZ128rmk |
| 29209 | { 12891, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96eff8022819ULL }, // Inst #12891 = VPANDNQZ128rmbkz |
| 29210 | { 12890, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92eff8022819ULL }, // Inst #12890 = VPANDNQZ128rmbk |
| 29211 | { 12889, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90eff8022819ULL }, // Inst #12889 = VPANDNQZ128rmb |
| 29212 | { 12888, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0eff8022819ULL }, // Inst #12888 = VPANDNQZ128rm |
| 29213 | { 12887, 4, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeeeff8002829ULL }, // Inst #12887 = VPANDNDZrrkz |
| 29214 | { 12886, 5, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeaeff8002829ULL }, // Inst #12886 = VPANDNDZrrk |
| 29215 | { 12885, 3, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8eff8002829ULL }, // Inst #12885 = VPANDNDZrr |
| 29216 | { 12884, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeeff8002819ULL }, // Inst #12884 = VPANDNDZrmkz |
| 29217 | { 12883, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaeff8002819ULL }, // Inst #12883 = VPANDNDZrmk |
| 29218 | { 12882, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eeff8002819ULL }, // Inst #12882 = VPANDNDZrmbkz |
| 29219 | { 12881, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aeff8002819ULL }, // Inst #12881 = VPANDNDZrmbk |
| 29220 | { 12880, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78eff8002819ULL }, // Inst #12880 = VPANDNDZrmb |
| 29221 | { 12879, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8eff8002819ULL }, // Inst #12879 = VPANDNDZrm |
| 29222 | { 12878, 4, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc7eff8002829ULL }, // Inst #12878 = VPANDNDZ256rrkz |
| 29223 | { 12877, 5, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3eff8002829ULL }, // Inst #12877 = VPANDNDZ256rrk |
| 29224 | { 12876, 3, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1eff8002829ULL }, // Inst #12876 = VPANDNDZ256rr |
| 29225 | { 12875, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7eff8002819ULL }, // Inst #12875 = VPANDNDZ256rmkz |
| 29226 | { 12874, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3eff8002819ULL }, // Inst #12874 = VPANDNDZ256rmk |
| 29227 | { 12873, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77eff8002819ULL }, // Inst #12873 = VPANDNDZ256rmbkz |
| 29228 | { 12872, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73eff8002819ULL }, // Inst #12872 = VPANDNDZ256rmbk |
| 29229 | { 12871, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71eff8002819ULL }, // Inst #12871 = VPANDNDZ256rmb |
| 29230 | { 12870, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1eff8002819ULL }, // Inst #12870 = VPANDNDZ256rm |
| 29231 | { 12869, 4, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6eff8002829ULL }, // Inst #12869 = VPANDNDZ128rrkz |
| 29232 | { 12868, 5, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2eff8002829ULL }, // Inst #12868 = VPANDNDZ128rrk |
| 29233 | { 12867, 3, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0eff8002829ULL }, // Inst #12867 = VPANDNDZ128rr |
| 29234 | { 12866, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6eff8002819ULL }, // Inst #12866 = VPANDNDZ128rmkz |
| 29235 | { 12865, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2eff8002819ULL }, // Inst #12865 = VPANDNDZ128rmk |
| 29236 | { 12864, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76eff8002819ULL }, // Inst #12864 = VPANDNDZ128rmbkz |
| 29237 | { 12863, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72eff8002819ULL }, // Inst #12863 = VPANDNDZ128rmbk |
| 29238 | { 12862, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70eff8002819ULL }, // Inst #12862 = VPANDNDZ128rmb |
| 29239 | { 12861, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0eff8002819ULL }, // Inst #12861 = VPANDNDZ128rm |
| 29240 | { 12860, 4, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xeeedf8002829ULL }, // Inst #12860 = VPANDDZrrkz |
| 29241 | { 12859, 5, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeaedf8002829ULL }, // Inst #12859 = VPANDDZrrk |
| 29242 | { 12858, 3, 1, 0, 497, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8edf8002829ULL }, // Inst #12858 = VPANDDZrr |
| 29243 | { 12857, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeedf8002819ULL }, // Inst #12857 = VPANDDZrmkz |
| 29244 | { 12856, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaedf8002819ULL }, // Inst #12856 = VPANDDZrmk |
| 29245 | { 12855, 8, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eedf8002819ULL }, // Inst #12855 = VPANDDZrmbkz |
| 29246 | { 12854, 9, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aedf8002819ULL }, // Inst #12854 = VPANDDZrmbk |
| 29247 | { 12853, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78edf8002819ULL }, // Inst #12853 = VPANDDZrmb |
| 29248 | { 12852, 7, 1, 0, 496, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8edf8002819ULL }, // Inst #12852 = VPANDDZrm |
| 29249 | { 12851, 4, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc7edf8002829ULL }, // Inst #12851 = VPANDDZ256rrkz |
| 29250 | { 12850, 5, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3edf8002829ULL }, // Inst #12850 = VPANDDZ256rrk |
| 29251 | { 12849, 3, 1, 0, 495, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1edf8002829ULL }, // Inst #12849 = VPANDDZ256rr |
| 29252 | { 12848, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7edf8002819ULL }, // Inst #12848 = VPANDDZ256rmkz |
| 29253 | { 12847, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3edf8002819ULL }, // Inst #12847 = VPANDDZ256rmk |
| 29254 | { 12846, 8, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77edf8002819ULL }, // Inst #12846 = VPANDDZ256rmbkz |
| 29255 | { 12845, 9, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73edf8002819ULL }, // Inst #12845 = VPANDDZ256rmbk |
| 29256 | { 12844, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71edf8002819ULL }, // Inst #12844 = VPANDDZ256rmb |
| 29257 | { 12843, 7, 1, 0, 494, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1edf8002819ULL }, // Inst #12843 = VPANDDZ256rm |
| 29258 | { 12842, 4, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa6edf8002829ULL }, // Inst #12842 = VPANDDZ128rrkz |
| 29259 | { 12841, 5, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2edf8002829ULL }, // Inst #12841 = VPANDDZ128rrk |
| 29260 | { 12840, 3, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0edf8002829ULL }, // Inst #12840 = VPANDDZ128rr |
| 29261 | { 12839, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6edf8002819ULL }, // Inst #12839 = VPANDDZ128rmkz |
| 29262 | { 12838, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2edf8002819ULL }, // Inst #12838 = VPANDDZ128rmk |
| 29263 | { 12837, 8, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76edf8002819ULL }, // Inst #12837 = VPANDDZ128rmbkz |
| 29264 | { 12836, 9, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72edf8002819ULL }, // Inst #12836 = VPANDDZ128rmbk |
| 29265 | { 12835, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70edf8002819ULL }, // Inst #12835 = VPANDDZ128rmb |
| 29266 | { 12834, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0edf8002819ULL }, // Inst #12834 = VPANDDZ128rm |
| 29267 | { 12833, 4, 1, 0, 1588, 0, 0, X86ImpOpBase + 0, 893, 0, 0x87b8046829ULL }, // Inst #12833 = VPALIGNRrri |
| 29268 | { 12832, 8, 1, 0, 1587, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0x87b8046819ULL }, // Inst #12832 = VPALIGNRrmi |
| 29269 | { 12831, 5, 1, 0, 1110, 0, 0, X86ImpOpBase + 0, 4511, 0, 0xee87f8046829ULL }, // Inst #12831 = VPALIGNRZrrikz |
| 29270 | { 12830, 6, 1, 0, 1110, 0, 0, X86ImpOpBase + 0, 4505, 0, 0xea87f8046829ULL }, // Inst #12830 = VPALIGNRZrrik |
| 29271 | { 12829, 4, 1, 0, 1766, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe887f8046829ULL }, // Inst #12829 = VPALIGNRZrri |
| 29272 | { 12828, 9, 1, 0, 1918, 0, 0, X86ImpOpBase + 0, 4496, 0|(1ULL<<MCID::MayLoad), 0xee87f8046819ULL }, // Inst #12828 = VPALIGNRZrmikz |
| 29273 | { 12827, 10, 1, 0, 1918, 0, 0, X86ImpOpBase + 0, 4486, 0|(1ULL<<MCID::MayLoad), 0xea87f8046819ULL }, // Inst #12827 = VPALIGNRZrmik |
| 29274 | { 12826, 8, 1, 0, 347, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe887f8046819ULL }, // Inst #12826 = VPALIGNRZrmi |
| 29275 | { 12825, 5, 1, 0, 1685, 0, 0, X86ImpOpBase + 0, 4481, 0, 0xc787f8046829ULL }, // Inst #12825 = VPALIGNRZ256rrikz |
| 29276 | { 12824, 6, 1, 0, 1685, 0, 0, X86ImpOpBase + 0, 4475, 0, 0xc387f8046829ULL }, // Inst #12824 = VPALIGNRZ256rrik |
| 29277 | { 12823, 4, 1, 0, 1109, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc187f8046829ULL }, // Inst #12823 = VPALIGNRZ256rri |
| 29278 | { 12822, 9, 1, 0, 1425, 0, 0, X86ImpOpBase + 0, 4466, 0|(1ULL<<MCID::MayLoad), 0xc787f8046819ULL }, // Inst #12822 = VPALIGNRZ256rmikz |
| 29279 | { 12821, 10, 1, 0, 1425, 0, 0, X86ImpOpBase + 0, 4456, 0|(1ULL<<MCID::MayLoad), 0xc387f8046819ULL }, // Inst #12821 = VPALIGNRZ256rmik |
| 29280 | { 12820, 8, 1, 0, 1804, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc187f8046819ULL }, // Inst #12820 = VPALIGNRZ256rmi |
| 29281 | { 12819, 5, 1, 0, 1684, 0, 0, X86ImpOpBase + 0, 4451, 0, 0xa687f8046829ULL }, // Inst #12819 = VPALIGNRZ128rrikz |
| 29282 | { 12818, 6, 1, 0, 1684, 0, 0, X86ImpOpBase + 0, 4445, 0, 0xa287f8046829ULL }, // Inst #12818 = VPALIGNRZ128rrik |
| 29283 | { 12817, 4, 1, 0, 1108, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa087f8046829ULL }, // Inst #12817 = VPALIGNRZ128rri |
| 29284 | { 12816, 9, 1, 0, 1422, 0, 0, X86ImpOpBase + 0, 4436, 0|(1ULL<<MCID::MayLoad), 0xa687f8046819ULL }, // Inst #12816 = VPALIGNRZ128rmikz |
| 29285 | { 12815, 10, 1, 0, 1422, 0, 0, X86ImpOpBase + 0, 4426, 0|(1ULL<<MCID::MayLoad), 0xa287f8046819ULL }, // Inst #12815 = VPALIGNRZ128rmik |
| 29286 | { 12814, 8, 1, 0, 1833, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa087f8046819ULL }, // Inst #12814 = VPALIGNRZ128rmi |
| 29287 | { 12813, 4, 1, 0, 1416, 0, 0, X86ImpOpBase + 0, 901, 0, 0x187b8046829ULL }, // Inst #12813 = VPALIGNRYrri |
| 29288 | { 12812, 8, 1, 0, 1537, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x187b8046819ULL }, // Inst #12812 = VPALIGNRYrmi |
| 29289 | { 12811, 3, 1, 0, 1203, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xfeb8002829ULL }, // Inst #12811 = VPADDWrr |
| 29290 | { 12810, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xfeb8002819ULL }, // Inst #12810 = VPADDWrm |
| 29291 | { 12809, 4, 1, 0, 1230, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xeefef8002829ULL }, // Inst #12809 = VPADDWZrrkz |
| 29292 | { 12808, 5, 1, 0, 1230, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeafef8002829ULL }, // Inst #12808 = VPADDWZrrk |
| 29293 | { 12807, 3, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8fef8002829ULL }, // Inst #12807 = VPADDWZrr |
| 29294 | { 12806, 8, 1, 0, 1324, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeefef8002819ULL }, // Inst #12806 = VPADDWZrmkz |
| 29295 | { 12805, 9, 1, 0, 1324, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeafef8002819ULL }, // Inst #12805 = VPADDWZrmk |
| 29296 | { 12804, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8fef8002819ULL }, // Inst #12804 = VPADDWZrm |
| 29297 | { 12803, 4, 1, 0, 1229, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc7fef8002829ULL }, // Inst #12803 = VPADDWZ256rrkz |
| 29298 | { 12802, 5, 1, 0, 1229, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc3fef8002829ULL }, // Inst #12802 = VPADDWZ256rrk |
| 29299 | { 12801, 3, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1fef8002829ULL }, // Inst #12801 = VPADDWZ256rr |
| 29300 | { 12800, 8, 1, 0, 1323, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7fef8002819ULL }, // Inst #12800 = VPADDWZ256rmkz |
| 29301 | { 12799, 9, 1, 0, 1323, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3fef8002819ULL }, // Inst #12799 = VPADDWZ256rmk |
| 29302 | { 12798, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1fef8002819ULL }, // Inst #12798 = VPADDWZ256rm |
| 29303 | { 12797, 4, 1, 0, 1228, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa6fef8002829ULL }, // Inst #12797 = VPADDWZ128rrkz |
| 29304 | { 12796, 5, 1, 0, 1228, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa2fef8002829ULL }, // Inst #12796 = VPADDWZ128rrk |
| 29305 | { 12795, 3, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0fef8002829ULL }, // Inst #12795 = VPADDWZ128rr |
| 29306 | { 12794, 8, 1, 0, 1298, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6fef8002819ULL }, // Inst #12794 = VPADDWZ128rmkz |
| 29307 | { 12793, 9, 1, 0, 1298, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2fef8002819ULL }, // Inst #12793 = VPADDWZ128rmk |
| 29308 | { 12792, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0fef8002819ULL }, // Inst #12792 = VPADDWZ128rm |
| 29309 | { 12791, 3, 1, 0, 1204, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1feb8002829ULL }, // Inst #12791 = VPADDWYrr |
| 29310 | { 12790, 7, 1, 0, 1213, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1feb8002819ULL }, // Inst #12790 = VPADDWYrm |
| 29311 | { 12789, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xeeb8002829ULL }, // Inst #12789 = VPADDUSWrr |
| 29312 | { 12788, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xeeb8002819ULL }, // Inst #12788 = VPADDUSWrm |
| 29313 | { 12787, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xeeeef8002829ULL }, // Inst #12787 = VPADDUSWZrrkz |
| 29314 | { 12786, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeaeef8002829ULL }, // Inst #12786 = VPADDUSWZrrk |
| 29315 | { 12785, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8eef8002829ULL }, // Inst #12785 = VPADDUSWZrr |
| 29316 | { 12784, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeeeef8002819ULL }, // Inst #12784 = VPADDUSWZrmkz |
| 29317 | { 12783, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeaeef8002819ULL }, // Inst #12783 = VPADDUSWZrmk |
| 29318 | { 12782, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8eef8002819ULL }, // Inst #12782 = VPADDUSWZrm |
| 29319 | { 12781, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc7eef8002829ULL }, // Inst #12781 = VPADDUSWZ256rrkz |
| 29320 | { 12780, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc3eef8002829ULL }, // Inst #12780 = VPADDUSWZ256rrk |
| 29321 | { 12779, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1eef8002829ULL }, // Inst #12779 = VPADDUSWZ256rr |
| 29322 | { 12778, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7eef8002819ULL }, // Inst #12778 = VPADDUSWZ256rmkz |
| 29323 | { 12777, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3eef8002819ULL }, // Inst #12777 = VPADDUSWZ256rmk |
| 29324 | { 12776, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1eef8002819ULL }, // Inst #12776 = VPADDUSWZ256rm |
| 29325 | { 12775, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa6eef8002829ULL }, // Inst #12775 = VPADDUSWZ128rrkz |
| 29326 | { 12774, 5, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa2eef8002829ULL }, // Inst #12774 = VPADDUSWZ128rrk |
| 29327 | { 12773, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0eef8002829ULL }, // Inst #12773 = VPADDUSWZ128rr |
| 29328 | { 12772, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6eef8002819ULL }, // Inst #12772 = VPADDUSWZ128rmkz |
| 29329 | { 12771, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2eef8002819ULL }, // Inst #12771 = VPADDUSWZ128rmk |
| 29330 | { 12770, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0eef8002819ULL }, // Inst #12770 = VPADDUSWZ128rm |
| 29331 | { 12769, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1eeb8002829ULL }, // Inst #12769 = VPADDUSWYrr |
| 29332 | { 12768, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1eeb8002819ULL }, // Inst #12768 = VPADDUSWYrm |
| 29333 | { 12767, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xee38002829ULL }, // Inst #12767 = VPADDUSBrr |
| 29334 | { 12766, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xee38002819ULL }, // Inst #12766 = VPADDUSBrm |
| 29335 | { 12765, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4590, 0|(1ULL<<MCID::Commutable), 0xeeee78002829ULL }, // Inst #12765 = VPADDUSBZrrkz |
| 29336 | { 12764, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xeaee78002829ULL }, // Inst #12764 = VPADDUSBZrrk |
| 29337 | { 12763, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8ee78002829ULL }, // Inst #12763 = VPADDUSBZrr |
| 29338 | { 12762, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeeee78002819ULL }, // Inst #12762 = VPADDUSBZrmkz |
| 29339 | { 12761, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeaee78002819ULL }, // Inst #12761 = VPADDUSBZrmk |
| 29340 | { 12760, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ee78002819ULL }, // Inst #12760 = VPADDUSBZrm |
| 29341 | { 12759, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4564, 0|(1ULL<<MCID::Commutable), 0xc7ee78002829ULL }, // Inst #12759 = VPADDUSBZ256rrkz |
| 29342 | { 12758, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc3ee78002829ULL }, // Inst #12758 = VPADDUSBZ256rrk |
| 29343 | { 12757, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1ee78002829ULL }, // Inst #12757 = VPADDUSBZ256rr |
| 29344 | { 12756, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7ee78002819ULL }, // Inst #12756 = VPADDUSBZ256rmkz |
| 29345 | { 12755, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3ee78002819ULL }, // Inst #12755 = VPADDUSBZ256rmk |
| 29346 | { 12754, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ee78002819ULL }, // Inst #12754 = VPADDUSBZ256rm |
| 29347 | { 12753, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4538, 0|(1ULL<<MCID::Commutable), 0xa6ee78002829ULL }, // Inst #12753 = VPADDUSBZ128rrkz |
| 29348 | { 12752, 5, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa2ee78002829ULL }, // Inst #12752 = VPADDUSBZ128rrk |
| 29349 | { 12751, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0ee78002829ULL }, // Inst #12751 = VPADDUSBZ128rr |
| 29350 | { 12750, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6ee78002819ULL }, // Inst #12750 = VPADDUSBZ128rmkz |
| 29351 | { 12749, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2ee78002819ULL }, // Inst #12749 = VPADDUSBZ128rmk |
| 29352 | { 12748, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ee78002819ULL }, // Inst #12748 = VPADDUSBZ128rm |
| 29353 | { 12747, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1ee38002829ULL }, // Inst #12747 = VPADDUSBYrr |
| 29354 | { 12746, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ee38002819ULL }, // Inst #12746 = VPADDUSBYrm |
| 29355 | { 12745, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xf6b8002829ULL }, // Inst #12745 = VPADDSWrr |
| 29356 | { 12744, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf6b8002819ULL }, // Inst #12744 = VPADDSWrm |
| 29357 | { 12743, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1819, 0|(1ULL<<MCID::Commutable), 0xeef6f8002829ULL }, // Inst #12743 = VPADDSWZrrkz |
| 29358 | { 12742, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 1814, 0|(1ULL<<MCID::Commutable), 0xeaf6f8002829ULL }, // Inst #12742 = VPADDSWZrrk |
| 29359 | { 12741, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f6f8002829ULL }, // Inst #12741 = VPADDSWZrr |
| 29360 | { 12740, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeef6f8002819ULL }, // Inst #12740 = VPADDSWZrmkz |
| 29361 | { 12739, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeaf6f8002819ULL }, // Inst #12739 = VPADDSWZrmk |
| 29362 | { 12738, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f6f8002819ULL }, // Inst #12738 = VPADDSWZrm |
| 29363 | { 12737, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1782, 0|(1ULL<<MCID::Commutable), 0xc7f6f8002829ULL }, // Inst #12737 = VPADDSWZ256rrkz |
| 29364 | { 12736, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 1777, 0|(1ULL<<MCID::Commutable), 0xc3f6f8002829ULL }, // Inst #12736 = VPADDSWZ256rrk |
| 29365 | { 12735, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f6f8002829ULL }, // Inst #12735 = VPADDSWZ256rr |
| 29366 | { 12734, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7f6f8002819ULL }, // Inst #12734 = VPADDSWZ256rmkz |
| 29367 | { 12733, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3f6f8002819ULL }, // Inst #12733 = VPADDSWZ256rmk |
| 29368 | { 12732, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f6f8002819ULL }, // Inst #12732 = VPADDSWZ256rm |
| 29369 | { 12731, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 1756, 0|(1ULL<<MCID::Commutable), 0xa6f6f8002829ULL }, // Inst #12731 = VPADDSWZ128rrkz |
| 29370 | { 12730, 5, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 1751, 0|(1ULL<<MCID::Commutable), 0xa2f6f8002829ULL }, // Inst #12730 = VPADDSWZ128rrk |
| 29371 | { 12729, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f6f8002829ULL }, // Inst #12729 = VPADDSWZ128rr |
| 29372 | { 12728, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6f6f8002819ULL }, // Inst #12728 = VPADDSWZ128rmkz |
| 29373 | { 12727, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2f6f8002819ULL }, // Inst #12727 = VPADDSWZ128rmk |
| 29374 | { 12726, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f6f8002819ULL }, // Inst #12726 = VPADDSWZ128rm |
| 29375 | { 12725, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1f6b8002829ULL }, // Inst #12725 = VPADDSWYrr |
| 29376 | { 12724, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f6b8002819ULL }, // Inst #12724 = VPADDSWYrm |
| 29377 | { 12723, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xf638002829ULL }, // Inst #12723 = VPADDSBrr |
| 29378 | { 12722, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xf638002819ULL }, // Inst #12722 = VPADDSBrm |
| 29379 | { 12721, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4590, 0|(1ULL<<MCID::Commutable), 0xeef678002829ULL }, // Inst #12721 = VPADDSBZrrkz |
| 29380 | { 12720, 5, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xeaf678002829ULL }, // Inst #12720 = VPADDSBZrrk |
| 29381 | { 12719, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8f678002829ULL }, // Inst #12719 = VPADDSBZrr |
| 29382 | { 12718, 8, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeef678002819ULL }, // Inst #12718 = VPADDSBZrmkz |
| 29383 | { 12717, 9, 1, 0, 1818, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeaf678002819ULL }, // Inst #12717 = VPADDSBZrmk |
| 29384 | { 12716, 7, 1, 0, 455, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8f678002819ULL }, // Inst #12716 = VPADDSBZrm |
| 29385 | { 12715, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4564, 0|(1ULL<<MCID::Commutable), 0xc7f678002829ULL }, // Inst #12715 = VPADDSBZ256rrkz |
| 29386 | { 12714, 5, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc3f678002829ULL }, // Inst #12714 = VPADDSBZ256rrk |
| 29387 | { 12713, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1f678002829ULL }, // Inst #12713 = VPADDSBZ256rr |
| 29388 | { 12712, 8, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7f678002819ULL }, // Inst #12712 = VPADDSBZ256rmkz |
| 29389 | { 12711, 9, 1, 0, 2020, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3f678002819ULL }, // Inst #12711 = VPADDSBZ256rmk |
| 29390 | { 12710, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1f678002819ULL }, // Inst #12710 = VPADDSBZ256rm |
| 29391 | { 12709, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4538, 0|(1ULL<<MCID::Commutable), 0xa6f678002829ULL }, // Inst #12709 = VPADDSBZ128rrkz |
| 29392 | { 12708, 5, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa2f678002829ULL }, // Inst #12708 = VPADDSBZ128rrk |
| 29393 | { 12707, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0f678002829ULL }, // Inst #12707 = VPADDSBZ128rr |
| 29394 | { 12706, 8, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6f678002819ULL }, // Inst #12706 = VPADDSBZ128rmkz |
| 29395 | { 12705, 9, 1, 0, 2016, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2f678002819ULL }, // Inst #12705 = VPADDSBZ128rmk |
| 29396 | { 12704, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0f678002819ULL }, // Inst #12704 = VPADDSBZ128rm |
| 29397 | { 12703, 3, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1f638002829ULL }, // Inst #12703 = VPADDSBYrr |
| 29398 | { 12702, 7, 1, 0, 453, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1f638002819ULL }, // Inst #12702 = VPADDSBYrm |
| 29399 | { 12701, 3, 1, 0, 1203, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xea38002829ULL }, // Inst #12701 = VPADDQrr |
| 29400 | { 12700, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xea38002819ULL }, // Inst #12700 = VPADDQrm |
| 29401 | { 12699, 4, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xeeea78022829ULL }, // Inst #12699 = VPADDQZrrkz |
| 29402 | { 12698, 5, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeaea78022829ULL }, // Inst #12698 = VPADDQZrrk |
| 29403 | { 12697, 3, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8ea78022829ULL }, // Inst #12697 = VPADDQZrr |
| 29404 | { 12696, 8, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeea78022819ULL }, // Inst #12696 = VPADDQZrmkz |
| 29405 | { 12695, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaea78022819ULL }, // Inst #12695 = VPADDQZrmk |
| 29406 | { 12694, 8, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eea78022819ULL }, // Inst #12694 = VPADDQZrmbkz |
| 29407 | { 12693, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aea78022819ULL }, // Inst #12693 = VPADDQZrmbk |
| 29408 | { 12692, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98ea78022819ULL }, // Inst #12692 = VPADDQZrmb |
| 29409 | { 12691, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ea78022819ULL }, // Inst #12691 = VPADDQZrm |
| 29410 | { 12690, 4, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc7ea78022829ULL }, // Inst #12690 = VPADDQZ256rrkz |
| 29411 | { 12689, 5, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3ea78022829ULL }, // Inst #12689 = VPADDQZ256rrk |
| 29412 | { 12688, 3, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1ea78022829ULL }, // Inst #12688 = VPADDQZ256rr |
| 29413 | { 12687, 8, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7ea78022819ULL }, // Inst #12687 = VPADDQZ256rmkz |
| 29414 | { 12686, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3ea78022819ULL }, // Inst #12686 = VPADDQZ256rmk |
| 29415 | { 12685, 8, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97ea78022819ULL }, // Inst #12685 = VPADDQZ256rmbkz |
| 29416 | { 12684, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93ea78022819ULL }, // Inst #12684 = VPADDQZ256rmbk |
| 29417 | { 12683, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91ea78022819ULL }, // Inst #12683 = VPADDQZ256rmb |
| 29418 | { 12682, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ea78022819ULL }, // Inst #12682 = VPADDQZ256rm |
| 29419 | { 12681, 4, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa6ea78022829ULL }, // Inst #12681 = VPADDQZ128rrkz |
| 29420 | { 12680, 5, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2ea78022829ULL }, // Inst #12680 = VPADDQZ128rrk |
| 29421 | { 12679, 3, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0ea78022829ULL }, // Inst #12679 = VPADDQZ128rr |
| 29422 | { 12678, 8, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6ea78022819ULL }, // Inst #12678 = VPADDQZ128rmkz |
| 29423 | { 12677, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2ea78022819ULL }, // Inst #12677 = VPADDQZ128rmk |
| 29424 | { 12676, 8, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96ea78022819ULL }, // Inst #12676 = VPADDQZ128rmbkz |
| 29425 | { 12675, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92ea78022819ULL }, // Inst #12675 = VPADDQZ128rmbk |
| 29426 | { 12674, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90ea78022819ULL }, // Inst #12674 = VPADDQZ128rmb |
| 29427 | { 12673, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ea78022819ULL }, // Inst #12673 = VPADDQZ128rm |
| 29428 | { 12672, 3, 1, 0, 1204, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1ea38002829ULL }, // Inst #12672 = VPADDQYrr |
| 29429 | { 12671, 7, 1, 0, 1213, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ea38002819ULL }, // Inst #12671 = VPADDQYrm |
| 29430 | { 12670, 3, 1, 0, 1203, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xff38002829ULL }, // Inst #12670 = VPADDDrr |
| 29431 | { 12669, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xff38002819ULL }, // Inst #12669 = VPADDDrm |
| 29432 | { 12668, 4, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xeeff78002829ULL }, // Inst #12668 = VPADDDZrrkz |
| 29433 | { 12667, 5, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeaff78002829ULL }, // Inst #12667 = VPADDDZrrk |
| 29434 | { 12666, 3, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8ff78002829ULL }, // Inst #12666 = VPADDDZrr |
| 29435 | { 12665, 8, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeff78002819ULL }, // Inst #12665 = VPADDDZrmkz |
| 29436 | { 12664, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaff78002819ULL }, // Inst #12664 = VPADDDZrmk |
| 29437 | { 12663, 8, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eff78002819ULL }, // Inst #12663 = VPADDDZrmbkz |
| 29438 | { 12662, 9, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aff78002819ULL }, // Inst #12662 = VPADDDZrmbk |
| 29439 | { 12661, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78ff78002819ULL }, // Inst #12661 = VPADDDZrmb |
| 29440 | { 12660, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ff78002819ULL }, // Inst #12660 = VPADDDZrm |
| 29441 | { 12659, 4, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc7ff78002829ULL }, // Inst #12659 = VPADDDZ256rrkz |
| 29442 | { 12658, 5, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3ff78002829ULL }, // Inst #12658 = VPADDDZ256rrk |
| 29443 | { 12657, 3, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1ff78002829ULL }, // Inst #12657 = VPADDDZ256rr |
| 29444 | { 12656, 8, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7ff78002819ULL }, // Inst #12656 = VPADDDZ256rmkz |
| 29445 | { 12655, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3ff78002819ULL }, // Inst #12655 = VPADDDZ256rmk |
| 29446 | { 12654, 8, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77ff78002819ULL }, // Inst #12654 = VPADDDZ256rmbkz |
| 29447 | { 12653, 9, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73ff78002819ULL }, // Inst #12653 = VPADDDZ256rmbk |
| 29448 | { 12652, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71ff78002819ULL }, // Inst #12652 = VPADDDZ256rmb |
| 29449 | { 12651, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ff78002819ULL }, // Inst #12651 = VPADDDZ256rm |
| 29450 | { 12650, 4, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa6ff78002829ULL }, // Inst #12650 = VPADDDZ128rrkz |
| 29451 | { 12649, 5, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2ff78002829ULL }, // Inst #12649 = VPADDDZ128rrk |
| 29452 | { 12648, 3, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0ff78002829ULL }, // Inst #12648 = VPADDDZ128rr |
| 29453 | { 12647, 8, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6ff78002819ULL }, // Inst #12647 = VPADDDZ128rmkz |
| 29454 | { 12646, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2ff78002819ULL }, // Inst #12646 = VPADDDZ128rmk |
| 29455 | { 12645, 8, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76ff78002819ULL }, // Inst #12645 = VPADDDZ128rmbkz |
| 29456 | { 12644, 9, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72ff78002819ULL }, // Inst #12644 = VPADDDZ128rmbk |
| 29457 | { 12643, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70ff78002819ULL }, // Inst #12643 = VPADDDZ128rmb |
| 29458 | { 12642, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ff78002819ULL }, // Inst #12642 = VPADDDZ128rm |
| 29459 | { 12641, 3, 1, 0, 1204, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1ff38002829ULL }, // Inst #12641 = VPADDDYrr |
| 29460 | { 12640, 7, 1, 0, 1213, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ff38002819ULL }, // Inst #12640 = VPADDDYrm |
| 29461 | { 12639, 3, 1, 0, 1203, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xfe38002829ULL }, // Inst #12639 = VPADDBrr |
| 29462 | { 12638, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xfe38002819ULL }, // Inst #12638 = VPADDBrm |
| 29463 | { 12637, 4, 1, 0, 1230, 0, 0, X86ImpOpBase + 0, 4590, 0|(1ULL<<MCID::Commutable), 0xeefe78002829ULL }, // Inst #12637 = VPADDBZrrkz |
| 29464 | { 12636, 5, 1, 0, 1230, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xeafe78002829ULL }, // Inst #12636 = VPADDBZrrk |
| 29465 | { 12635, 3, 1, 0, 1716, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8fe78002829ULL }, // Inst #12635 = VPADDBZrr |
| 29466 | { 12634, 8, 1, 0, 1324, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeefe78002819ULL }, // Inst #12634 = VPADDBZrmkz |
| 29467 | { 12633, 9, 1, 0, 1324, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeafe78002819ULL }, // Inst #12633 = VPADDBZrmk |
| 29468 | { 12632, 7, 1, 0, 1799, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8fe78002819ULL }, // Inst #12632 = VPADDBZrm |
| 29469 | { 12631, 4, 1, 0, 1229, 0, 0, X86ImpOpBase + 0, 4564, 0|(1ULL<<MCID::Commutable), 0xc7fe78002829ULL }, // Inst #12631 = VPADDBZ256rrkz |
| 29470 | { 12630, 5, 1, 0, 1229, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc3fe78002829ULL }, // Inst #12630 = VPADDBZ256rrk |
| 29471 | { 12629, 3, 1, 0, 1815, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1fe78002829ULL }, // Inst #12629 = VPADDBZ256rr |
| 29472 | { 12628, 8, 1, 0, 1323, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7fe78002819ULL }, // Inst #12628 = VPADDBZ256rmkz |
| 29473 | { 12627, 9, 1, 0, 1323, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3fe78002819ULL }, // Inst #12627 = VPADDBZ256rmk |
| 29474 | { 12626, 7, 1, 0, 1929, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1fe78002819ULL }, // Inst #12626 = VPADDBZ256rm |
| 29475 | { 12625, 4, 1, 0, 1228, 0, 0, X86ImpOpBase + 0, 4538, 0|(1ULL<<MCID::Commutable), 0xa6fe78002829ULL }, // Inst #12625 = VPADDBZ128rrkz |
| 29476 | { 12624, 5, 1, 0, 1228, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa2fe78002829ULL }, // Inst #12624 = VPADDBZ128rrk |
| 29477 | { 12623, 3, 1, 0, 1814, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0fe78002829ULL }, // Inst #12623 = VPADDBZ128rr |
| 29478 | { 12622, 8, 1, 0, 1298, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6fe78002819ULL }, // Inst #12622 = VPADDBZ128rmkz |
| 29479 | { 12621, 9, 1, 0, 1298, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2fe78002819ULL }, // Inst #12621 = VPADDBZ128rmk |
| 29480 | { 12620, 7, 1, 0, 1831, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0fe78002819ULL }, // Inst #12620 = VPADDBZ128rm |
| 29481 | { 12619, 3, 1, 0, 1204, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1fe38002829ULL }, // Inst #12619 = VPADDBYrr |
| 29482 | { 12618, 7, 1, 0, 1213, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1fe38002819ULL }, // Inst #12618 = VPADDBYrm |
| 29483 | { 12617, 3, 1, 0, 1586, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb3b8002829ULL }, // Inst #12617 = VPACKUSWBrr |
| 29484 | { 12616, 7, 1, 0, 1585, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb3b8002819ULL }, // Inst #12616 = VPACKUSWBrm |
| 29485 | { 12615, 4, 1, 0, 2122, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeeb3f8002829ULL }, // Inst #12615 = VPACKUSWBZrrkz |
| 29486 | { 12614, 5, 1, 0, 2122, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeab3f8002829ULL }, // Inst #12614 = VPACKUSWBZrrk |
| 29487 | { 12613, 3, 1, 0, 1113, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b3f8002829ULL }, // Inst #12613 = VPACKUSWBZrr |
| 29488 | { 12612, 8, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeeb3f8002819ULL }, // Inst #12612 = VPACKUSWBZrmkz |
| 29489 | { 12611, 9, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeab3f8002819ULL }, // Inst #12611 = VPACKUSWBZrmk |
| 29490 | { 12610, 7, 1, 0, 1431, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b3f8002819ULL }, // Inst #12610 = VPACKUSWBZrm |
| 29491 | { 12609, 4, 1, 0, 1112, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc7b3f8002829ULL }, // Inst #12609 = VPACKUSWBZ256rrkz |
| 29492 | { 12608, 5, 1, 0, 1112, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3b3f8002829ULL }, // Inst #12608 = VPACKUSWBZ256rrk |
| 29493 | { 12607, 3, 1, 0, 1683, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b3f8002829ULL }, // Inst #12607 = VPACKUSWBZ256rr |
| 29494 | { 12606, 8, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7b3f8002819ULL }, // Inst #12606 = VPACKUSWBZ256rmkz |
| 29495 | { 12605, 9, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3b3f8002819ULL }, // Inst #12605 = VPACKUSWBZ256rmk |
| 29496 | { 12604, 7, 1, 0, 1430, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b3f8002819ULL }, // Inst #12604 = VPACKUSWBZ256rm |
| 29497 | { 12603, 4, 1, 0, 1111, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa6b3f8002829ULL }, // Inst #12603 = VPACKUSWBZ128rrkz |
| 29498 | { 12602, 5, 1, 0, 1111, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2b3f8002829ULL }, // Inst #12602 = VPACKUSWBZ128rrk |
| 29499 | { 12601, 3, 1, 0, 1682, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b3f8002829ULL }, // Inst #12601 = VPACKUSWBZ128rr |
| 29500 | { 12600, 8, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6b3f8002819ULL }, // Inst #12600 = VPACKUSWBZ128rmkz |
| 29501 | { 12599, 9, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2b3f8002819ULL }, // Inst #12599 = VPACKUSWBZ128rmk |
| 29502 | { 12598, 7, 1, 0, 1667, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b3f8002819ULL }, // Inst #12598 = VPACKUSWBZ128rm |
| 29503 | { 12597, 3, 1, 0, 1419, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b3b8002829ULL }, // Inst #12597 = VPACKUSWBYrr |
| 29504 | { 12596, 7, 1, 0, 1639, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b3b8002819ULL }, // Inst #12596 = VPACKUSWBYrm |
| 29505 | { 12595, 3, 1, 0, 1586, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x95b8004829ULL }, // Inst #12595 = VPACKUSDWrr |
| 29506 | { 12594, 7, 1, 0, 1585, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x95b8004819ULL }, // Inst #12594 = VPACKUSDWrm |
| 29507 | { 12593, 4, 1, 0, 2122, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xee95f8004829ULL }, // Inst #12593 = VPACKUSDWZrrkz |
| 29508 | { 12592, 5, 1, 0, 2122, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xea95f8004829ULL }, // Inst #12592 = VPACKUSDWZrrk |
| 29509 | { 12591, 3, 1, 0, 1113, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe895f8004829ULL }, // Inst #12591 = VPACKUSDWZrr |
| 29510 | { 12590, 8, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xee95f8004819ULL }, // Inst #12590 = VPACKUSDWZrmkz |
| 29511 | { 12589, 9, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xea95f8004819ULL }, // Inst #12589 = VPACKUSDWZrmk |
| 29512 | { 12588, 8, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0x7e95f8004819ULL }, // Inst #12588 = VPACKUSDWZrmbkz |
| 29513 | { 12587, 9, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0x7a95f8004819ULL }, // Inst #12587 = VPACKUSDWZrmbk |
| 29514 | { 12586, 7, 1, 0, 1431, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x7895f8004819ULL }, // Inst #12586 = VPACKUSDWZrmb |
| 29515 | { 12585, 7, 1, 0, 1431, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe895f8004819ULL }, // Inst #12585 = VPACKUSDWZrm |
| 29516 | { 12584, 4, 1, 0, 1112, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc795f8004829ULL }, // Inst #12584 = VPACKUSDWZ256rrkz |
| 29517 | { 12583, 5, 1, 0, 1112, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc395f8004829ULL }, // Inst #12583 = VPACKUSDWZ256rrk |
| 29518 | { 12582, 3, 1, 0, 1683, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc195f8004829ULL }, // Inst #12582 = VPACKUSDWZ256rr |
| 29519 | { 12581, 8, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc795f8004819ULL }, // Inst #12581 = VPACKUSDWZ256rmkz |
| 29520 | { 12580, 9, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc395f8004819ULL }, // Inst #12580 = VPACKUSDWZ256rmk |
| 29521 | { 12579, 8, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0x7795f8004819ULL }, // Inst #12579 = VPACKUSDWZ256rmbkz |
| 29522 | { 12578, 9, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0x7395f8004819ULL }, // Inst #12578 = VPACKUSDWZ256rmbk |
| 29523 | { 12577, 7, 1, 0, 1430, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x7195f8004819ULL }, // Inst #12577 = VPACKUSDWZ256rmb |
| 29524 | { 12576, 7, 1, 0, 1430, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc195f8004819ULL }, // Inst #12576 = VPACKUSDWZ256rm |
| 29525 | { 12575, 4, 1, 0, 1111, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa695f8004829ULL }, // Inst #12575 = VPACKUSDWZ128rrkz |
| 29526 | { 12574, 5, 1, 0, 1111, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa295f8004829ULL }, // Inst #12574 = VPACKUSDWZ128rrk |
| 29527 | { 12573, 3, 1, 0, 1682, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa095f8004829ULL }, // Inst #12573 = VPACKUSDWZ128rr |
| 29528 | { 12572, 8, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa695f8004819ULL }, // Inst #12572 = VPACKUSDWZ128rmkz |
| 29529 | { 12571, 9, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa295f8004819ULL }, // Inst #12571 = VPACKUSDWZ128rmk |
| 29530 | { 12570, 8, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0x7695f8004819ULL }, // Inst #12570 = VPACKUSDWZ128rmbkz |
| 29531 | { 12569, 9, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0x7295f8004819ULL }, // Inst #12569 = VPACKUSDWZ128rmbk |
| 29532 | { 12568, 7, 1, 0, 1667, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x7095f8004819ULL }, // Inst #12568 = VPACKUSDWZ128rmb |
| 29533 | { 12567, 7, 1, 0, 1667, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa095f8004819ULL }, // Inst #12567 = VPACKUSDWZ128rm |
| 29534 | { 12566, 3, 1, 0, 1419, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x195b8004829ULL }, // Inst #12566 = VPACKUSDWYrr |
| 29535 | { 12565, 7, 1, 0, 1639, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x195b8004819ULL }, // Inst #12565 = VPACKUSDWYrm |
| 29536 | { 12564, 3, 1, 0, 1586, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb1b8002829ULL }, // Inst #12564 = VPACKSSWBrr |
| 29537 | { 12563, 7, 1, 0, 1585, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb1b8002819ULL }, // Inst #12563 = VPACKSSWBrm |
| 29538 | { 12562, 4, 1, 0, 2122, 0, 0, X86ImpOpBase + 0, 4590, 0, 0xeeb1f8002829ULL }, // Inst #12562 = VPACKSSWBZrrkz |
| 29539 | { 12561, 5, 1, 0, 2122, 0, 0, X86ImpOpBase + 0, 4585, 0, 0xeab1f8002829ULL }, // Inst #12561 = VPACKSSWBZrrk |
| 29540 | { 12560, 3, 1, 0, 1113, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b1f8002829ULL }, // Inst #12560 = VPACKSSWBZrr |
| 29541 | { 12559, 8, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeeb1f8002819ULL }, // Inst #12559 = VPACKSSWBZrmkz |
| 29542 | { 12558, 9, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeab1f8002819ULL }, // Inst #12558 = VPACKSSWBZrmk |
| 29543 | { 12557, 7, 1, 0, 1431, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b1f8002819ULL }, // Inst #12557 = VPACKSSWBZrm |
| 29544 | { 12556, 4, 1, 0, 1112, 0, 0, X86ImpOpBase + 0, 4564, 0, 0xc7b1f8002829ULL }, // Inst #12556 = VPACKSSWBZ256rrkz |
| 29545 | { 12555, 5, 1, 0, 1112, 0, 0, X86ImpOpBase + 0, 4559, 0, 0xc3b1f8002829ULL }, // Inst #12555 = VPACKSSWBZ256rrk |
| 29546 | { 12554, 3, 1, 0, 1683, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b1f8002829ULL }, // Inst #12554 = VPACKSSWBZ256rr |
| 29547 | { 12553, 8, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7b1f8002819ULL }, // Inst #12553 = VPACKSSWBZ256rmkz |
| 29548 | { 12552, 9, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3b1f8002819ULL }, // Inst #12552 = VPACKSSWBZ256rmk |
| 29549 | { 12551, 7, 1, 0, 1430, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b1f8002819ULL }, // Inst #12551 = VPACKSSWBZ256rm |
| 29550 | { 12550, 4, 1, 0, 1111, 0, 0, X86ImpOpBase + 0, 4538, 0, 0xa6b1f8002829ULL }, // Inst #12550 = VPACKSSWBZ128rrkz |
| 29551 | { 12549, 5, 1, 0, 1111, 0, 0, X86ImpOpBase + 0, 4533, 0, 0xa2b1f8002829ULL }, // Inst #12549 = VPACKSSWBZ128rrk |
| 29552 | { 12548, 3, 1, 0, 1682, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b1f8002829ULL }, // Inst #12548 = VPACKSSWBZ128rr |
| 29553 | { 12547, 8, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6b1f8002819ULL }, // Inst #12547 = VPACKSSWBZ128rmkz |
| 29554 | { 12546, 9, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2b1f8002819ULL }, // Inst #12546 = VPACKSSWBZ128rmk |
| 29555 | { 12545, 7, 1, 0, 1667, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b1f8002819ULL }, // Inst #12545 = VPACKSSWBZ128rm |
| 29556 | { 12544, 3, 1, 0, 1419, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b1b8002829ULL }, // Inst #12544 = VPACKSSWBYrr |
| 29557 | { 12543, 7, 1, 0, 1639, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b1b8002819ULL }, // Inst #12543 = VPACKSSWBYrm |
| 29558 | { 12542, 3, 1, 0, 1586, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xb5b8002829ULL }, // Inst #12542 = VPACKSSDWrr |
| 29559 | { 12541, 7, 1, 0, 1585, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xb5b8002819ULL }, // Inst #12541 = VPACKSSDWrm |
| 29560 | { 12540, 4, 1, 0, 2122, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xeeb5f8002829ULL }, // Inst #12540 = VPACKSSDWZrrkz |
| 29561 | { 12539, 5, 1, 0, 2122, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeab5f8002829ULL }, // Inst #12539 = VPACKSSDWZrrk |
| 29562 | { 12538, 3, 1, 0, 1113, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b5f8002829ULL }, // Inst #12538 = VPACKSSDWZrr |
| 29563 | { 12537, 8, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeeb5f8002819ULL }, // Inst #12537 = VPACKSSDWZrmkz |
| 29564 | { 12536, 9, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeab5f8002819ULL }, // Inst #12536 = VPACKSSDWZrmk |
| 29565 | { 12535, 8, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0x7eb5f8002819ULL }, // Inst #12535 = VPACKSSDWZrmbkz |
| 29566 | { 12534, 9, 1, 0, 1849, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0x7ab5f8002819ULL }, // Inst #12534 = VPACKSSDWZrmbk |
| 29567 | { 12533, 7, 1, 0, 1431, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78b5f8002819ULL }, // Inst #12533 = VPACKSSDWZrmb |
| 29568 | { 12532, 7, 1, 0, 1431, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b5f8002819ULL }, // Inst #12532 = VPACKSSDWZrm |
| 29569 | { 12531, 4, 1, 0, 1112, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc7b5f8002829ULL }, // Inst #12531 = VPACKSSDWZ256rrkz |
| 29570 | { 12530, 5, 1, 0, 1112, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3b5f8002829ULL }, // Inst #12530 = VPACKSSDWZ256rrk |
| 29571 | { 12529, 3, 1, 0, 1683, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b5f8002829ULL }, // Inst #12529 = VPACKSSDWZ256rr |
| 29572 | { 12528, 8, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7b5f8002819ULL }, // Inst #12528 = VPACKSSDWZ256rmkz |
| 29573 | { 12527, 9, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3b5f8002819ULL }, // Inst #12527 = VPACKSSDWZ256rmk |
| 29574 | { 12526, 8, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0x77b5f8002819ULL }, // Inst #12526 = VPACKSSDWZ256rmbkz |
| 29575 | { 12525, 9, 1, 0, 1848, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0x73b5f8002819ULL }, // Inst #12525 = VPACKSSDWZ256rmbk |
| 29576 | { 12524, 7, 1, 0, 1430, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71b5f8002819ULL }, // Inst #12524 = VPACKSSDWZ256rmb |
| 29577 | { 12523, 7, 1, 0, 1430, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b5f8002819ULL }, // Inst #12523 = VPACKSSDWZ256rm |
| 29578 | { 12522, 4, 1, 0, 1111, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6b5f8002829ULL }, // Inst #12522 = VPACKSSDWZ128rrkz |
| 29579 | { 12521, 5, 1, 0, 1111, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2b5f8002829ULL }, // Inst #12521 = VPACKSSDWZ128rrk |
| 29580 | { 12520, 3, 1, 0, 1682, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b5f8002829ULL }, // Inst #12520 = VPACKSSDWZ128rr |
| 29581 | { 12519, 8, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6b5f8002819ULL }, // Inst #12519 = VPACKSSDWZ128rmkz |
| 29582 | { 12518, 9, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2b5f8002819ULL }, // Inst #12518 = VPACKSSDWZ128rmk |
| 29583 | { 12517, 8, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0x76b5f8002819ULL }, // Inst #12517 = VPACKSSDWZ128rmbkz |
| 29584 | { 12516, 9, 1, 0, 1429, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0x72b5f8002819ULL }, // Inst #12516 = VPACKSSDWZ128rmbk |
| 29585 | { 12515, 7, 1, 0, 1667, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70b5f8002819ULL }, // Inst #12515 = VPACKSSDWZ128rmb |
| 29586 | { 12514, 7, 1, 0, 1667, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b5f8002819ULL }, // Inst #12514 = VPACKSSDWZ128rm |
| 29587 | { 12513, 3, 1, 0, 1419, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1b5b8002829ULL }, // Inst #12513 = VPACKSSDWYrr |
| 29588 | { 12512, 7, 1, 0, 1639, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1b5b8002819ULL }, // Inst #12512 = VPACKSSDWYrm |
| 29589 | { 12511, 2, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 535, 0, 0xeb8004829ULL }, // Inst #12511 = VPABSWrr |
| 29590 | { 12510, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0xeb8004819ULL }, // Inst #12510 = VPABSWrm |
| 29591 | { 12509, 3, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 3008, 0, 0xee0ef8004829ULL }, // Inst #12509 = VPABSWZrrkz |
| 29592 | { 12508, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 3004, 0, 0xea0ef8004829ULL }, // Inst #12508 = VPABSWZrrk |
| 29593 | { 12507, 2, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe80ef8004829ULL }, // Inst #12507 = VPABSWZrr |
| 29594 | { 12506, 7, 1, 0, 1816, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0xee0ef8004819ULL }, // Inst #12506 = VPABSWZrmkz |
| 29595 | { 12505, 8, 1, 0, 1816, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad), 0xea0ef8004819ULL }, // Inst #12505 = VPABSWZrmk |
| 29596 | { 12504, 6, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe80ef8004819ULL }, // Inst #12504 = VPABSWZrm |
| 29597 | { 12503, 3, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 2977, 0, 0xc70ef8004829ULL }, // Inst #12503 = VPABSWZ256rrkz |
| 29598 | { 12502, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 2973, 0, 0xc30ef8004829ULL }, // Inst #12502 = VPABSWZ256rrk |
| 29599 | { 12501, 2, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc10ef8004829ULL }, // Inst #12501 = VPABSWZ256rr |
| 29600 | { 12500, 7, 1, 0, 2011, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0xc70ef8004819ULL }, // Inst #12500 = VPABSWZ256rmkz |
| 29601 | { 12499, 8, 1, 0, 2011, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0xc30ef8004819ULL }, // Inst #12499 = VPABSWZ256rmk |
| 29602 | { 12498, 6, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc10ef8004819ULL }, // Inst #12498 = VPABSWZ256rm |
| 29603 | { 12497, 3, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 2970, 0, 0xa60ef8004829ULL }, // Inst #12497 = VPABSWZ128rrkz |
| 29604 | { 12496, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 2966, 0, 0xa20ef8004829ULL }, // Inst #12496 = VPABSWZ128rrk |
| 29605 | { 12495, 2, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa00ef8004829ULL }, // Inst #12495 = VPABSWZ128rr |
| 29606 | { 12494, 7, 1, 0, 2010, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0xa60ef8004819ULL }, // Inst #12494 = VPABSWZ128rmkz |
| 29607 | { 12493, 8, 1, 0, 2010, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0xa20ef8004819ULL }, // Inst #12493 = VPABSWZ128rmk |
| 29608 | { 12492, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa00ef8004819ULL }, // Inst #12492 = VPABSWZ128rm |
| 29609 | { 12491, 2, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x10eb8004829ULL }, // Inst #12491 = VPABSWYrr |
| 29610 | { 12490, 6, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x10eb8004819ULL }, // Inst #12490 = VPABSWYrm |
| 29611 | { 12489, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee0ff8024829ULL }, // Inst #12489 = VPABSQZrrkz |
| 29612 | { 12488, 4, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 2740, 0, 0xea0ff8024829ULL }, // Inst #12488 = VPABSQZrrk |
| 29613 | { 12487, 2, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe80ff8024829ULL }, // Inst #12487 = VPABSQZrr |
| 29614 | { 12486, 7, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xee0ff8024819ULL }, // Inst #12486 = VPABSQZrmkz |
| 29615 | { 12485, 8, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xea0ff8024819ULL }, // Inst #12485 = VPABSQZrmk |
| 29616 | { 12484, 7, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x9e0ff8024819ULL }, // Inst #12484 = VPABSQZrmbkz |
| 29617 | { 12483, 8, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0x9a0ff8024819ULL }, // Inst #12483 = VPABSQZrmbk |
| 29618 | { 12482, 6, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x980ff8024819ULL }, // Inst #12482 = VPABSQZrmb |
| 29619 | { 12481, 6, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe80ff8024819ULL }, // Inst #12481 = VPABSQZrm |
| 29620 | { 12480, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc70ff8024829ULL }, // Inst #12480 = VPABSQZ256rrkz |
| 29621 | { 12479, 4, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 2718, 0, 0xc30ff8024829ULL }, // Inst #12479 = VPABSQZ256rrk |
| 29622 | { 12478, 2, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc10ff8024829ULL }, // Inst #12478 = VPABSQZ256rr |
| 29623 | { 12477, 7, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xc70ff8024819ULL }, // Inst #12477 = VPABSQZ256rmkz |
| 29624 | { 12476, 8, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xc30ff8024819ULL }, // Inst #12476 = VPABSQZ256rmk |
| 29625 | { 12475, 7, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x970ff8024819ULL }, // Inst #12475 = VPABSQZ256rmbkz |
| 29626 | { 12474, 8, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x930ff8024819ULL }, // Inst #12474 = VPABSQZ256rmbk |
| 29627 | { 12473, 6, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x910ff8024819ULL }, // Inst #12473 = VPABSQZ256rmb |
| 29628 | { 12472, 6, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc10ff8024819ULL }, // Inst #12472 = VPABSQZ256rm |
| 29629 | { 12471, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa60ff8024829ULL }, // Inst #12471 = VPABSQZ128rrkz |
| 29630 | { 12470, 4, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 2702, 0, 0xa20ff8024829ULL }, // Inst #12470 = VPABSQZ128rrk |
| 29631 | { 12469, 2, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa00ff8024829ULL }, // Inst #12469 = VPABSQZ128rr |
| 29632 | { 12468, 7, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0xa60ff8024819ULL }, // Inst #12468 = VPABSQZ128rmkz |
| 29633 | { 12467, 8, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0xa20ff8024819ULL }, // Inst #12467 = VPABSQZ128rmk |
| 29634 | { 12466, 7, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x960ff8024819ULL }, // Inst #12466 = VPABSQZ128rmbkz |
| 29635 | { 12465, 8, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x920ff8024819ULL }, // Inst #12465 = VPABSQZ128rmbk |
| 29636 | { 12464, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x900ff8024819ULL }, // Inst #12464 = VPABSQZ128rmb |
| 29637 | { 12463, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa00ff8024819ULL }, // Inst #12463 = VPABSQZ128rm |
| 29638 | { 12462, 2, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 535, 0, 0xf38004829ULL }, // Inst #12462 = VPABSDrr |
| 29639 | { 12461, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0xf38004819ULL }, // Inst #12461 = VPABSDrm |
| 29640 | { 12460, 3, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee0f78004829ULL }, // Inst #12460 = VPABSDZrrkz |
| 29641 | { 12459, 4, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 2775, 0, 0xea0f78004829ULL }, // Inst #12459 = VPABSDZrrk |
| 29642 | { 12458, 2, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe80f78004829ULL }, // Inst #12458 = VPABSDZrr |
| 29643 | { 12457, 7, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xee0f78004819ULL }, // Inst #12457 = VPABSDZrmkz |
| 29644 | { 12456, 8, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xea0f78004819ULL }, // Inst #12456 = VPABSDZrmk |
| 29645 | { 12455, 7, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0x7e0f78004819ULL }, // Inst #12455 = VPABSDZrmbkz |
| 29646 | { 12454, 8, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0x7a0f78004819ULL }, // Inst #12454 = VPABSDZrmbk |
| 29647 | { 12453, 6, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x780f78004819ULL }, // Inst #12453 = VPABSDZrmb |
| 29648 | { 12452, 6, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe80f78004819ULL }, // Inst #12452 = VPABSDZrm |
| 29649 | { 12451, 3, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc70f78004829ULL }, // Inst #12451 = VPABSDZ256rrkz |
| 29650 | { 12450, 4, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 2761, 0, 0xc30f78004829ULL }, // Inst #12450 = VPABSDZ256rrk |
| 29651 | { 12449, 2, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc10f78004829ULL }, // Inst #12449 = VPABSDZ256rr |
| 29652 | { 12448, 7, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xc70f78004819ULL }, // Inst #12448 = VPABSDZ256rmkz |
| 29653 | { 12447, 8, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0xc30f78004819ULL }, // Inst #12447 = VPABSDZ256rmk |
| 29654 | { 12446, 7, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x770f78004819ULL }, // Inst #12446 = VPABSDZ256rmbkz |
| 29655 | { 12445, 8, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0x730f78004819ULL }, // Inst #12445 = VPABSDZ256rmbk |
| 29656 | { 12444, 6, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x710f78004819ULL }, // Inst #12444 = VPABSDZ256rmb |
| 29657 | { 12443, 6, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc10f78004819ULL }, // Inst #12443 = VPABSDZ256rm |
| 29658 | { 12442, 3, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa60f78004829ULL }, // Inst #12442 = VPABSDZ128rrkz |
| 29659 | { 12441, 4, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa20f78004829ULL }, // Inst #12441 = VPABSDZ128rrk |
| 29660 | { 12440, 2, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa00f78004829ULL }, // Inst #12440 = VPABSDZ128rr |
| 29661 | { 12439, 7, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa60f78004819ULL }, // Inst #12439 = VPABSDZ128rmkz |
| 29662 | { 12438, 8, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0xa20f78004819ULL }, // Inst #12438 = VPABSDZ128rmk |
| 29663 | { 12437, 7, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x760f78004819ULL }, // Inst #12437 = VPABSDZ128rmbkz |
| 29664 | { 12436, 8, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x720f78004819ULL }, // Inst #12436 = VPABSDZ128rmbk |
| 29665 | { 12435, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x700f78004819ULL }, // Inst #12435 = VPABSDZ128rmb |
| 29666 | { 12434, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa00f78004819ULL }, // Inst #12434 = VPABSDZ128rm |
| 29667 | { 12433, 2, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x10f38004829ULL }, // Inst #12433 = VPABSDYrr |
| 29668 | { 12432, 6, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x10f38004819ULL }, // Inst #12432 = VPABSDYrm |
| 29669 | { 12431, 2, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 535, 0, 0xe38004829ULL }, // Inst #12431 = VPABSBrr |
| 29670 | { 12430, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0xe38004819ULL }, // Inst #12430 = VPABSBrm |
| 29671 | { 12429, 3, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4809, 0, 0xee0e78004829ULL }, // Inst #12429 = VPABSBZrrkz |
| 29672 | { 12428, 4, 1, 0, 1769, 0, 0, X86ImpOpBase + 0, 4805, 0, 0xea0e78004829ULL }, // Inst #12428 = VPABSBZrrk |
| 29673 | { 12427, 2, 1, 0, 1759, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe80e78004829ULL }, // Inst #12427 = VPABSBZrr |
| 29674 | { 12426, 7, 1, 0, 1816, 0, 0, X86ImpOpBase + 0, 4798, 0|(1ULL<<MCID::MayLoad), 0xee0e78004819ULL }, // Inst #12426 = VPABSBZrmkz |
| 29675 | { 12425, 8, 1, 0, 1816, 0, 0, X86ImpOpBase + 0, 4790, 0|(1ULL<<MCID::MayLoad), 0xea0e78004819ULL }, // Inst #12425 = VPABSBZrmk |
| 29676 | { 12424, 6, 1, 0, 493, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe80e78004819ULL }, // Inst #12424 = VPABSBZrm |
| 29677 | { 12423, 3, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4780, 0, 0xc70e78004829ULL }, // Inst #12423 = VPABSBZ256rrkz |
| 29678 | { 12422, 4, 1, 0, 2251, 0, 0, X86ImpOpBase + 0, 4776, 0, 0xc30e78004829ULL }, // Inst #12422 = VPABSBZ256rrk |
| 29679 | { 12421, 2, 1, 0, 454, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc10e78004829ULL }, // Inst #12421 = VPABSBZ256rr |
| 29680 | { 12420, 7, 1, 0, 2011, 0, 0, X86ImpOpBase + 0, 4769, 0|(1ULL<<MCID::MayLoad), 0xc70e78004819ULL }, // Inst #12420 = VPABSBZ256rmkz |
| 29681 | { 12419, 8, 1, 0, 2011, 0, 0, X86ImpOpBase + 0, 4761, 0|(1ULL<<MCID::MayLoad), 0xc30e78004819ULL }, // Inst #12419 = VPABSBZ256rmk |
| 29682 | { 12418, 6, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc10e78004819ULL }, // Inst #12418 = VPABSBZ256rm |
| 29683 | { 12417, 3, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4751, 0, 0xa60e78004829ULL }, // Inst #12417 = VPABSBZ128rrkz |
| 29684 | { 12416, 4, 1, 0, 2250, 0, 0, X86ImpOpBase + 0, 4747, 0, 0xa20e78004829ULL }, // Inst #12416 = VPABSBZ128rrk |
| 29685 | { 12415, 2, 1, 0, 1150, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa00e78004829ULL }, // Inst #12415 = VPABSBZ128rr |
| 29686 | { 12414, 7, 1, 0, 2010, 0, 0, X86ImpOpBase + 0, 4740, 0|(1ULL<<MCID::MayLoad), 0xa60e78004819ULL }, // Inst #12414 = VPABSBZ128rmkz |
| 29687 | { 12413, 8, 1, 0, 2010, 0, 0, X86ImpOpBase + 0, 4732, 0|(1ULL<<MCID::MayLoad), 0xa20e78004819ULL }, // Inst #12413 = VPABSBZ128rmk |
| 29688 | { 12412, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa00e78004819ULL }, // Inst #12412 = VPABSBZ128rm |
| 29689 | { 12411, 2, 1, 0, 1042, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x10e38004829ULL }, // Inst #12411 = VPABSBYrr |
| 29690 | { 12410, 6, 1, 0, 492, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x10e38004819ULL }, // Inst #12410 = VPABSBYrm |
| 29691 | { 12409, 9, 1, 0, 335, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xaea978005819ULL }, // Inst #12409 = VP4DPWSSDrmkz |
| 29692 | { 12408, 9, 1, 0, 335, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xaaa978005819ULL }, // Inst #12408 = VP4DPWSSDrmk |
| 29693 | { 12407, 8, 1, 0, 335, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xa8a978005819ULL }, // Inst #12407 = VP4DPWSSDrm |
| 29694 | { 12406, 9, 1, 0, 335, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xaea9f8005819ULL }, // Inst #12406 = VP4DPWSSDSrmkz |
| 29695 | { 12405, 9, 1, 0, 335, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xaaa9f8005819ULL }, // Inst #12405 = VP4DPWSSDSrmk |
| 29696 | { 12404, 8, 1, 0, 335, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xa8a9f8005819ULL }, // Inst #12404 = VP4DPWSSDSrm |
| 29697 | { 12403, 3, 1, 0, 2249, 0, 0, X86ImpOpBase + 0, 4911, 0, 0xe8b478025829ULL }, // Inst #12403 = VP2INTERSECTQZrr |
| 29698 | { 12402, 7, 1, 0, 2248, 0, 0, X86ImpOpBase + 0, 4904, 0|(1ULL<<MCID::MayLoad), 0x98b478025819ULL }, // Inst #12402 = VP2INTERSECTQZrmb |
| 29699 | { 12401, 7, 1, 0, 2248, 0, 0, X86ImpOpBase + 0, 4904, 0|(1ULL<<MCID::MayLoad), 0xe8b478025819ULL }, // Inst #12401 = VP2INTERSECTQZrm |
| 29700 | { 12400, 3, 1, 0, 2241, 0, 0, X86ImpOpBase + 0, 4901, 0, 0xc1b478025829ULL }, // Inst #12400 = VP2INTERSECTQZ256rr |
| 29701 | { 12399, 7, 1, 0, 2239, 0, 0, X86ImpOpBase + 0, 4894, 0|(1ULL<<MCID::MayLoad), 0x91b478025819ULL }, // Inst #12399 = VP2INTERSECTQZ256rmb |
| 29702 | { 12398, 7, 1, 0, 2239, 0, 0, X86ImpOpBase + 0, 4894, 0|(1ULL<<MCID::MayLoad), 0xc1b478025819ULL }, // Inst #12398 = VP2INTERSECTQZ256rm |
| 29703 | { 12397, 3, 1, 0, 2247, 0, 0, X86ImpOpBase + 0, 4891, 0, 0xa0b478025829ULL }, // Inst #12397 = VP2INTERSECTQZ128rr |
| 29704 | { 12396, 7, 1, 0, 2246, 0, 0, X86ImpOpBase + 0, 4884, 0|(1ULL<<MCID::MayLoad), 0x90b478025819ULL }, // Inst #12396 = VP2INTERSECTQZ128rmb |
| 29705 | { 12395, 7, 1, 0, 2246, 0, 0, X86ImpOpBase + 0, 4884, 0|(1ULL<<MCID::MayLoad), 0xa0b478025819ULL }, // Inst #12395 = VP2INTERSECTQZ128rm |
| 29706 | { 12394, 3, 1, 0, 2245, 0, 0, X86ImpOpBase + 0, 4881, 0, 0xe8b478005829ULL }, // Inst #12394 = VP2INTERSECTDZrr |
| 29707 | { 12393, 7, 1, 0, 2244, 0, 0, X86ImpOpBase + 0, 4874, 0|(1ULL<<MCID::MayLoad), 0x78b478005819ULL }, // Inst #12393 = VP2INTERSECTDZrmb |
| 29708 | { 12392, 7, 1, 0, 2244, 0, 0, X86ImpOpBase + 0, 4874, 0|(1ULL<<MCID::MayLoad), 0xe8b478005819ULL }, // Inst #12392 = VP2INTERSECTDZrm |
| 29709 | { 12391, 3, 1, 0, 2243, 0, 0, X86ImpOpBase + 0, 4871, 0, 0xc1b478005829ULL }, // Inst #12391 = VP2INTERSECTDZ256rr |
| 29710 | { 12390, 7, 1, 0, 2242, 0, 0, X86ImpOpBase + 0, 4864, 0|(1ULL<<MCID::MayLoad), 0x71b478005819ULL }, // Inst #12390 = VP2INTERSECTDZ256rmb |
| 29711 | { 12389, 7, 1, 0, 2242, 0, 0, X86ImpOpBase + 0, 4864, 0|(1ULL<<MCID::MayLoad), 0xc1b478005819ULL }, // Inst #12389 = VP2INTERSECTDZ256rm |
| 29712 | { 12388, 3, 1, 0, 2240, 0, 0, X86ImpOpBase + 0, 4861, 0, 0xa0b478005829ULL }, // Inst #12388 = VP2INTERSECTDZ128rr |
| 29713 | { 12387, 7, 1, 0, 2238, 0, 0, X86ImpOpBase + 0, 4854, 0|(1ULL<<MCID::MayLoad), 0x70b478005819ULL }, // Inst #12387 = VP2INTERSECTDZ128rmb |
| 29714 | { 12386, 7, 1, 0, 2238, 0, 0, X86ImpOpBase + 0, 4854, 0|(1ULL<<MCID::MayLoad), 0xa0b478005819ULL }, // Inst #12386 = VP2INTERSECTDZ128rm |
| 29715 | { 12385, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xab28002029ULL }, // Inst #12385 = VORPSrr |
| 29716 | { 12384, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xab28002019ULL }, // Inst #12384 = VORPSrm |
| 29717 | { 12383, 4, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xeeab68002029ULL }, // Inst #12383 = VORPSZrrkz |
| 29718 | { 12382, 5, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeaab68002029ULL }, // Inst #12382 = VORPSZrrk |
| 29719 | { 12381, 3, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8ab68002029ULL }, // Inst #12381 = VORPSZrr |
| 29720 | { 12380, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeab68002019ULL }, // Inst #12380 = VORPSZrmkz |
| 29721 | { 12379, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaab68002019ULL }, // Inst #12379 = VORPSZrmk |
| 29722 | { 12378, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eab68002019ULL }, // Inst #12378 = VORPSZrmbkz |
| 29723 | { 12377, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aab68002019ULL }, // Inst #12377 = VORPSZrmbk |
| 29724 | { 12376, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78ab68002019ULL }, // Inst #12376 = VORPSZrmb |
| 29725 | { 12375, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ab68002019ULL }, // Inst #12375 = VORPSZrm |
| 29726 | { 12374, 4, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc7ab68002029ULL }, // Inst #12374 = VORPSZ256rrkz |
| 29727 | { 12373, 5, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3ab68002029ULL }, // Inst #12373 = VORPSZ256rrk |
| 29728 | { 12372, 3, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1ab68002029ULL }, // Inst #12372 = VORPSZ256rr |
| 29729 | { 12371, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7ab68002019ULL }, // Inst #12371 = VORPSZ256rmkz |
| 29730 | { 12370, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3ab68002019ULL }, // Inst #12370 = VORPSZ256rmk |
| 29731 | { 12369, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77ab68002019ULL }, // Inst #12369 = VORPSZ256rmbkz |
| 29732 | { 12368, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73ab68002019ULL }, // Inst #12368 = VORPSZ256rmbk |
| 29733 | { 12367, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71ab68002019ULL }, // Inst #12367 = VORPSZ256rmb |
| 29734 | { 12366, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ab68002019ULL }, // Inst #12366 = VORPSZ256rm |
| 29735 | { 12365, 4, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa6ab68002029ULL }, // Inst #12365 = VORPSZ128rrkz |
| 29736 | { 12364, 5, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2ab68002029ULL }, // Inst #12364 = VORPSZ128rrk |
| 29737 | { 12363, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0ab68002029ULL }, // Inst #12363 = VORPSZ128rr |
| 29738 | { 12362, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6ab68002019ULL }, // Inst #12362 = VORPSZ128rmkz |
| 29739 | { 12361, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2ab68002019ULL }, // Inst #12361 = VORPSZ128rmk |
| 29740 | { 12360, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76ab68002019ULL }, // Inst #12360 = VORPSZ128rmbkz |
| 29741 | { 12359, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72ab68002019ULL }, // Inst #12359 = VORPSZ128rmbk |
| 29742 | { 12358, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70ab68002019ULL }, // Inst #12358 = VORPSZ128rmb |
| 29743 | { 12357, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ab68002019ULL }, // Inst #12357 = VORPSZ128rm |
| 29744 | { 12356, 3, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1ab28002029ULL }, // Inst #12356 = VORPSYrr |
| 29745 | { 12355, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ab28002019ULL }, // Inst #12355 = VORPSYrm |
| 29746 | { 12354, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xab30002829ULL }, // Inst #12354 = VORPDrr |
| 29747 | { 12353, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xab30002819ULL }, // Inst #12353 = VORPDrm |
| 29748 | { 12352, 4, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xeeab70022829ULL }, // Inst #12352 = VORPDZrrkz |
| 29749 | { 12351, 5, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeaab70022829ULL }, // Inst #12351 = VORPDZrrk |
| 29750 | { 12350, 3, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8ab70022829ULL }, // Inst #12350 = VORPDZrr |
| 29751 | { 12349, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeab70022819ULL }, // Inst #12349 = VORPDZrmkz |
| 29752 | { 12348, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaab70022819ULL }, // Inst #12348 = VORPDZrmk |
| 29753 | { 12347, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eab70022819ULL }, // Inst #12347 = VORPDZrmbkz |
| 29754 | { 12346, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aab70022819ULL }, // Inst #12346 = VORPDZrmbk |
| 29755 | { 12345, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98ab70022819ULL }, // Inst #12345 = VORPDZrmb |
| 29756 | { 12344, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ab70022819ULL }, // Inst #12344 = VORPDZrm |
| 29757 | { 12343, 4, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc7ab70022829ULL }, // Inst #12343 = VORPDZ256rrkz |
| 29758 | { 12342, 5, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3ab70022829ULL }, // Inst #12342 = VORPDZ256rrk |
| 29759 | { 12341, 3, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1ab70022829ULL }, // Inst #12341 = VORPDZ256rr |
| 29760 | { 12340, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7ab70022819ULL }, // Inst #12340 = VORPDZ256rmkz |
| 29761 | { 12339, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3ab70022819ULL }, // Inst #12339 = VORPDZ256rmk |
| 29762 | { 12338, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97ab70022819ULL }, // Inst #12338 = VORPDZ256rmbkz |
| 29763 | { 12337, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93ab70022819ULL }, // Inst #12337 = VORPDZ256rmbk |
| 29764 | { 12336, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91ab70022819ULL }, // Inst #12336 = VORPDZ256rmb |
| 29765 | { 12335, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ab70022819ULL }, // Inst #12335 = VORPDZ256rm |
| 29766 | { 12334, 4, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa6ab70022829ULL }, // Inst #12334 = VORPDZ128rrkz |
| 29767 | { 12333, 5, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2ab70022829ULL }, // Inst #12333 = VORPDZ128rrk |
| 29768 | { 12332, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0ab70022829ULL }, // Inst #12332 = VORPDZ128rr |
| 29769 | { 12331, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6ab70022819ULL }, // Inst #12331 = VORPDZ128rmkz |
| 29770 | { 12330, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2ab70022819ULL }, // Inst #12330 = VORPDZ128rmk |
| 29771 | { 12329, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96ab70022819ULL }, // Inst #12329 = VORPDZ128rmbkz |
| 29772 | { 12328, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92ab70022819ULL }, // Inst #12328 = VORPDZ128rmbk |
| 29773 | { 12327, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90ab70022819ULL }, // Inst #12327 = VORPDZ128rmb |
| 29774 | { 12326, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ab70022819ULL }, // Inst #12326 = VORPDZ128rm |
| 29775 | { 12325, 3, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1ab30002829ULL }, // Inst #12325 = VORPDYrr |
| 29776 | { 12324, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ab30002819ULL }, // Inst #12324 = VORPDYrm |
| 29777 | { 12323, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380003026ULL }, // Inst #12323 = VMXON |
| 29778 | { 12322, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002044ULL }, // Inst #12322 = VMXOFF |
| 29779 | { 12321, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80002029ULL }, // Inst #12321 = VMWRITE64rr |
| 29780 | { 12320, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80002019ULL }, // Inst #12320 = VMWRITE64rm |
| 29781 | { 12319, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80002029ULL }, // Inst #12319 = VMWRITE32rr |
| 29782 | { 12318, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80002019ULL }, // Inst #12318 = VMWRITE32rm |
| 29783 | { 12317, 3, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xaca8003029ULL }, // Inst #12317 = VMULSSrr_Int |
| 29784 | { 12316, 3, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 1982, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaca8003029ULL }, // Inst #12316 = VMULSSrr |
| 29785 | { 12315, 7, 1, 0, 238, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaca8003019ULL }, // Inst #12315 = VMULSSrm_Int |
| 29786 | { 12314, 7, 1, 0, 238, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaca8003019ULL }, // Inst #12314 = VMULSSrm |
| 29787 | { 12313, 5, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x176ace8003029ULL }, // Inst #12313 = VMULSSZrrb_Intkz |
| 29788 | { 12312, 6, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x172ace8003029ULL }, // Inst #12312 = VMULSSZrrb_Intk |
| 29789 | { 12311, 4, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x170ace8003029ULL }, // Inst #12311 = VMULSSZrrb_Int |
| 29790 | { 12310, 4, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66ace8003029ULL }, // Inst #12310 = VMULSSZrr_Intkz |
| 29791 | { 12309, 5, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62ace8003029ULL }, // Inst #12309 = VMULSSZrr_Intk |
| 29792 | { 12308, 3, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ace8003029ULL }, // Inst #12308 = VMULSSZrr_Int |
| 29793 | { 12307, 3, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 1972, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60ace8003029ULL }, // Inst #12307 = VMULSSZrr |
| 29794 | { 12306, 8, 1, 0, 238, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66ace8003019ULL }, // Inst #12306 = VMULSSZrm_Intkz |
| 29795 | { 12305, 9, 1, 0, 238, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62ace8003019ULL }, // Inst #12305 = VMULSSZrm_Intk |
| 29796 | { 12304, 7, 1, 0, 238, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ace8003019ULL }, // Inst #12304 = VMULSSZrm_Int |
| 29797 | { 12303, 7, 1, 0, 238, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ace8003019ULL }, // Inst #12303 = VMULSSZrm |
| 29798 | { 12302, 5, 1, 0, 1879, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x156ace8013029ULL }, // Inst #12302 = VMULSHZrrb_Intkz |
| 29799 | { 12301, 6, 1, 0, 1879, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x152ace8013029ULL }, // Inst #12301 = VMULSHZrrb_Intk |
| 29800 | { 12300, 4, 1, 0, 1752, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x150ace8013029ULL }, // Inst #12300 = VMULSHZrrb_Int |
| 29801 | { 12299, 4, 1, 0, 1879, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x46ace8013029ULL }, // Inst #12299 = VMULSHZrr_Intkz |
| 29802 | { 12298, 5, 1, 0, 1879, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x42ace8013029ULL }, // Inst #12298 = VMULSHZrr_Intk |
| 29803 | { 12297, 3, 1, 0, 1752, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ace8013029ULL }, // Inst #12297 = VMULSHZrr_Int |
| 29804 | { 12296, 3, 1, 0, 1752, 1, 0, X86ImpOpBase + 78, 1962, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40ace8013029ULL }, // Inst #12296 = VMULSHZrr |
| 29805 | { 12295, 8, 1, 0, 1728, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46ace8013019ULL }, // Inst #12295 = VMULSHZrm_Intkz |
| 29806 | { 12294, 9, 1, 0, 1728, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42ace8013019ULL }, // Inst #12294 = VMULSHZrm_Intk |
| 29807 | { 12293, 7, 1, 0, 1728, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ace8013019ULL }, // Inst #12293 = VMULSHZrm_Int |
| 29808 | { 12292, 7, 1, 0, 1728, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ace8013019ULL }, // Inst #12292 = VMULSHZrm |
| 29809 | { 12291, 3, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xacb0003829ULL }, // Inst #12291 = VMULSDrr_Int |
| 29810 | { 12290, 3, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 1952, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xacb0003829ULL }, // Inst #12290 = VMULSDrr |
| 29811 | { 12289, 7, 1, 0, 236, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xacb0003819ULL }, // Inst #12289 = VMULSDrm_Int |
| 29812 | { 12288, 7, 1, 0, 236, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xacb0003819ULL }, // Inst #12288 = VMULSDrm |
| 29813 | { 12287, 5, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x196acf0023829ULL }, // Inst #12287 = VMULSDZrrb_Intkz |
| 29814 | { 12286, 6, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x192acf0023829ULL }, // Inst #12286 = VMULSDZrrb_Intk |
| 29815 | { 12285, 4, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x190acf0023829ULL }, // Inst #12285 = VMULSDZrrb_Int |
| 29816 | { 12284, 4, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86acf0023829ULL }, // Inst #12284 = VMULSDZrr_Intkz |
| 29817 | { 12283, 5, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82acf0023829ULL }, // Inst #12283 = VMULSDZrr_Intk |
| 29818 | { 12282, 3, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80acf0023829ULL }, // Inst #12282 = VMULSDZrr_Int |
| 29819 | { 12281, 3, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 1918, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80acf0023829ULL }, // Inst #12281 = VMULSDZrr |
| 29820 | { 12280, 8, 1, 0, 236, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86acf0023819ULL }, // Inst #12280 = VMULSDZrm_Intkz |
| 29821 | { 12279, 9, 1, 0, 236, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82acf0023819ULL }, // Inst #12279 = VMULSDZrm_Intk |
| 29822 | { 12278, 7, 1, 0, 236, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80acf0023819ULL }, // Inst #12278 = VMULSDZrm_Int |
| 29823 | { 12277, 7, 1, 0, 236, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80acf0023819ULL }, // Inst #12277 = VMULSDZrm |
| 29824 | { 12276, 3, 1, 0, 235, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaca8002029ULL }, // Inst #12276 = VMULPSrr |
| 29825 | { 12275, 7, 1, 0, 234, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaca8002019ULL }, // Inst #12275 = VMULPSrm |
| 29826 | { 12274, 4, 1, 0, 491, 1, 0, X86ImpOpBase + 78, 1899, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeace8002029ULL }, // Inst #12274 = VMULPSZrrkz |
| 29827 | { 12273, 5, 1, 0, 491, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaace8002029ULL }, // Inst #12273 = VMULPSZrrk |
| 29828 | { 12272, 5, 1, 0, 491, 1, 0, X86ImpOpBase + 78, 1889, 0, 0x17eace8002029ULL }, // Inst #12272 = VMULPSZrrbkz |
| 29829 | { 12271, 6, 1, 0, 491, 1, 0, X86ImpOpBase + 78, 1883, 0, 0x17aace8002029ULL }, // Inst #12271 = VMULPSZrrbk |
| 29830 | { 12270, 4, 1, 0, 491, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x178ace8002029ULL }, // Inst #12270 = VMULPSZrrb |
| 29831 | { 12269, 3, 1, 0, 491, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ace8002029ULL }, // Inst #12269 = VMULPSZrr |
| 29832 | { 12268, 8, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeace8002019ULL }, // Inst #12268 = VMULPSZrmkz |
| 29833 | { 12267, 9, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaace8002019ULL }, // Inst #12267 = VMULPSZrmk |
| 29834 | { 12266, 8, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eace8002019ULL }, // Inst #12266 = VMULPSZrmbkz |
| 29835 | { 12265, 9, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aace8002019ULL }, // Inst #12265 = VMULPSZrmbk |
| 29836 | { 12264, 7, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78ace8002019ULL }, // Inst #12264 = VMULPSZrmb |
| 29837 | { 12263, 7, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ace8002019ULL }, // Inst #12263 = VMULPSZrm |
| 29838 | { 12262, 4, 1, 0, 489, 1, 0, X86ImpOpBase + 78, 1871, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ace8002029ULL }, // Inst #12262 = VMULPSZ256rrkz |
| 29839 | { 12261, 5, 1, 0, 489, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ace8002029ULL }, // Inst #12261 = VMULPSZ256rrk |
| 29840 | { 12260, 3, 1, 0, 489, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ace8002029ULL }, // Inst #12260 = VMULPSZ256rr |
| 29841 | { 12259, 8, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ace8002019ULL }, // Inst #12259 = VMULPSZ256rmkz |
| 29842 | { 12258, 9, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ace8002019ULL }, // Inst #12258 = VMULPSZ256rmk |
| 29843 | { 12257, 8, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77ace8002019ULL }, // Inst #12257 = VMULPSZ256rmbkz |
| 29844 | { 12256, 9, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73ace8002019ULL }, // Inst #12256 = VMULPSZ256rmbk |
| 29845 | { 12255, 7, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71ace8002019ULL }, // Inst #12255 = VMULPSZ256rmb |
| 29846 | { 12254, 7, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ace8002019ULL }, // Inst #12254 = VMULPSZ256rm |
| 29847 | { 12253, 4, 1, 0, 235, 1, 0, X86ImpOpBase + 78, 1845, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ace8002029ULL }, // Inst #12253 = VMULPSZ128rrkz |
| 29848 | { 12252, 5, 1, 0, 235, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ace8002029ULL }, // Inst #12252 = VMULPSZ128rrk |
| 29849 | { 12251, 3, 1, 0, 235, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ace8002029ULL }, // Inst #12251 = VMULPSZ128rr |
| 29850 | { 12250, 8, 1, 0, 234, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ace8002019ULL }, // Inst #12250 = VMULPSZ128rmkz |
| 29851 | { 12249, 9, 1, 0, 234, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ace8002019ULL }, // Inst #12249 = VMULPSZ128rmk |
| 29852 | { 12248, 8, 1, 0, 234, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76ace8002019ULL }, // Inst #12248 = VMULPSZ128rmbkz |
| 29853 | { 12247, 9, 1, 0, 234, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72ace8002019ULL }, // Inst #12247 = VMULPSZ128rmbk |
| 29854 | { 12246, 7, 1, 0, 234, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70ace8002019ULL }, // Inst #12246 = VMULPSZ128rmb |
| 29855 | { 12245, 7, 1, 0, 234, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ace8002019ULL }, // Inst #12245 = VMULPSZ128rm |
| 29856 | { 12244, 3, 1, 0, 489, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1aca8002029ULL }, // Inst #12244 = VMULPSYrr |
| 29857 | { 12243, 7, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aca8002019ULL }, // Inst #12243 = VMULPSYrm |
| 29858 | { 12242, 4, 1, 0, 1893, 1, 0, X86ImpOpBase + 78, 1819, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeace8012029ULL }, // Inst #12242 = VMULPHZrrkz |
| 29859 | { 12241, 5, 1, 0, 1893, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaace8012029ULL }, // Inst #12241 = VMULPHZrrk |
| 29860 | { 12240, 5, 1, 0, 1893, 1, 0, X86ImpOpBase + 78, 1809, 0, 0x15eace8012029ULL }, // Inst #12240 = VMULPHZrrbkz |
| 29861 | { 12239, 6, 1, 0, 1893, 1, 0, X86ImpOpBase + 78, 1803, 0, 0x15aace8012029ULL }, // Inst #12239 = VMULPHZrrbk |
| 29862 | { 12238, 4, 1, 0, 1886, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x158ace8012029ULL }, // Inst #12238 = VMULPHZrrb |
| 29863 | { 12237, 3, 1, 0, 1886, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ace8012029ULL }, // Inst #12237 = VMULPHZrr |
| 29864 | { 12236, 8, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeace8012019ULL }, // Inst #12236 = VMULPHZrmkz |
| 29865 | { 12235, 9, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaace8012019ULL }, // Inst #12235 = VMULPHZrmk |
| 29866 | { 12234, 8, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eace8012019ULL }, // Inst #12234 = VMULPHZrmbkz |
| 29867 | { 12233, 9, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aace8012019ULL }, // Inst #12233 = VMULPHZrmbk |
| 29868 | { 12232, 7, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58ace8012019ULL }, // Inst #12232 = VMULPHZrmb |
| 29869 | { 12231, 7, 1, 0, 490, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ace8012019ULL }, // Inst #12231 = VMULPHZrm |
| 29870 | { 12230, 4, 1, 0, 1877, 1, 0, X86ImpOpBase + 78, 1782, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ace8012029ULL }, // Inst #12230 = VMULPHZ256rrkz |
| 29871 | { 12229, 5, 1, 0, 1877, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ace8012029ULL }, // Inst #12229 = VMULPHZ256rrk |
| 29872 | { 12228, 3, 1, 0, 1751, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ace8012029ULL }, // Inst #12228 = VMULPHZ256rr |
| 29873 | { 12227, 8, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ace8012019ULL }, // Inst #12227 = VMULPHZ256rmkz |
| 29874 | { 12226, 9, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ace8012019ULL }, // Inst #12226 = VMULPHZ256rmk |
| 29875 | { 12225, 8, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57ace8012019ULL }, // Inst #12225 = VMULPHZ256rmbkz |
| 29876 | { 12224, 9, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53ace8012019ULL }, // Inst #12224 = VMULPHZ256rmbk |
| 29877 | { 12223, 7, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51ace8012019ULL }, // Inst #12223 = VMULPHZ256rmb |
| 29878 | { 12222, 7, 1, 0, 488, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ace8012019ULL }, // Inst #12222 = VMULPHZ256rm |
| 29879 | { 12221, 4, 1, 0, 1876, 1, 0, X86ImpOpBase + 78, 1756, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ace8012029ULL }, // Inst #12221 = VMULPHZ128rrkz |
| 29880 | { 12220, 5, 1, 0, 1876, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ace8012029ULL }, // Inst #12220 = VMULPHZ128rrk |
| 29881 | { 12219, 3, 1, 0, 1750, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ace8012029ULL }, // Inst #12219 = VMULPHZ128rr |
| 29882 | { 12218, 8, 1, 0, 1722, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ace8012019ULL }, // Inst #12218 = VMULPHZ128rmkz |
| 29883 | { 12217, 9, 1, 0, 1722, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ace8012019ULL }, // Inst #12217 = VMULPHZ128rmk |
| 29884 | { 12216, 8, 1, 0, 1722, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56ace8012019ULL }, // Inst #12216 = VMULPHZ128rmbkz |
| 29885 | { 12215, 9, 1, 0, 1722, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52ace8012019ULL }, // Inst #12215 = VMULPHZ128rmbk |
| 29886 | { 12214, 7, 1, 0, 1722, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50ace8012019ULL }, // Inst #12214 = VMULPHZ128rmb |
| 29887 | { 12213, 7, 1, 0, 1722, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ace8012019ULL }, // Inst #12213 = VMULPHZ128rm |
| 29888 | { 12212, 3, 1, 0, 233, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xacb0002829ULL }, // Inst #12212 = VMULPDrr |
| 29889 | { 12211, 7, 1, 0, 232, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xacb0002819ULL }, // Inst #12211 = VMULPDrm |
| 29890 | { 12210, 4, 1, 0, 487, 1, 0, X86ImpOpBase + 78, 1720, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeacf0022829ULL }, // Inst #12210 = VMULPDZrrkz |
| 29891 | { 12209, 5, 1, 0, 487, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaacf0022829ULL }, // Inst #12209 = VMULPDZrrk |
| 29892 | { 12208, 5, 1, 0, 487, 1, 0, X86ImpOpBase + 78, 1710, 0, 0x19eacf0022829ULL }, // Inst #12208 = VMULPDZrrbkz |
| 29893 | { 12207, 6, 1, 0, 487, 1, 0, X86ImpOpBase + 78, 1704, 0, 0x19aacf0022829ULL }, // Inst #12207 = VMULPDZrrbk |
| 29894 | { 12206, 4, 1, 0, 487, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x198acf0022829ULL }, // Inst #12206 = VMULPDZrrb |
| 29895 | { 12205, 3, 1, 0, 487, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8acf0022829ULL }, // Inst #12205 = VMULPDZrr |
| 29896 | { 12204, 8, 1, 0, 486, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeacf0022819ULL }, // Inst #12204 = VMULPDZrmkz |
| 29897 | { 12203, 9, 1, 0, 486, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaacf0022819ULL }, // Inst #12203 = VMULPDZrmk |
| 29898 | { 12202, 8, 1, 0, 486, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eacf0022819ULL }, // Inst #12202 = VMULPDZrmbkz |
| 29899 | { 12201, 9, 1, 0, 486, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aacf0022819ULL }, // Inst #12201 = VMULPDZrmbk |
| 29900 | { 12200, 7, 1, 0, 486, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98acf0022819ULL }, // Inst #12200 = VMULPDZrmb |
| 29901 | { 12199, 7, 1, 0, 486, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8acf0022819ULL }, // Inst #12199 = VMULPDZrm |
| 29902 | { 12198, 4, 1, 0, 485, 1, 0, X86ImpOpBase + 78, 1669, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7acf0022829ULL }, // Inst #12198 = VMULPDZ256rrkz |
| 29903 | { 12197, 5, 1, 0, 485, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3acf0022829ULL }, // Inst #12197 = VMULPDZ256rrk |
| 29904 | { 12196, 3, 1, 0, 485, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1acf0022829ULL }, // Inst #12196 = VMULPDZ256rr |
| 29905 | { 12195, 8, 1, 0, 484, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7acf0022819ULL }, // Inst #12195 = VMULPDZ256rmkz |
| 29906 | { 12194, 9, 1, 0, 484, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3acf0022819ULL }, // Inst #12194 = VMULPDZ256rmk |
| 29907 | { 12193, 8, 1, 0, 484, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97acf0022819ULL }, // Inst #12193 = VMULPDZ256rmbkz |
| 29908 | { 12192, 9, 1, 0, 484, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93acf0022819ULL }, // Inst #12192 = VMULPDZ256rmbk |
| 29909 | { 12191, 7, 1, 0, 484, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91acf0022819ULL }, // Inst #12191 = VMULPDZ256rmb |
| 29910 | { 12190, 7, 1, 0, 484, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1acf0022819ULL }, // Inst #12190 = VMULPDZ256rm |
| 29911 | { 12189, 4, 1, 0, 233, 1, 0, X86ImpOpBase + 78, 1633, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6acf0022829ULL }, // Inst #12189 = VMULPDZ128rrkz |
| 29912 | { 12188, 5, 1, 0, 233, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2acf0022829ULL }, // Inst #12188 = VMULPDZ128rrk |
| 29913 | { 12187, 3, 1, 0, 233, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0acf0022829ULL }, // Inst #12187 = VMULPDZ128rr |
| 29914 | { 12186, 8, 1, 0, 232, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6acf0022819ULL }, // Inst #12186 = VMULPDZ128rmkz |
| 29915 | { 12185, 9, 1, 0, 232, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2acf0022819ULL }, // Inst #12185 = VMULPDZ128rmk |
| 29916 | { 12184, 8, 1, 0, 232, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96acf0022819ULL }, // Inst #12184 = VMULPDZ128rmbkz |
| 29917 | { 12183, 9, 1, 0, 232, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92acf0022819ULL }, // Inst #12183 = VMULPDZ128rmbk |
| 29918 | { 12182, 7, 1, 0, 232, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90acf0022819ULL }, // Inst #12182 = VMULPDZ128rmb |
| 29919 | { 12181, 7, 1, 0, 232, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0acf0022819ULL }, // Inst #12181 = VMULPDZ128rm |
| 29920 | { 12180, 3, 1, 0, 485, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1acb0002829ULL }, // Inst #12180 = VMULPDYrr |
| 29921 | { 12179, 7, 1, 0, 484, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1acb0002819ULL }, // Inst #12179 = VMULPDYrm |
| 29922 | { 12178, 0, 0, 0, 8, 1, 0, X86ImpOpBase + 123, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205bULL }, // Inst #12178 = VMSAVE64 |
| 29923 | { 12177, 0, 0, 0, 8, 1, 0, X86ImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205bULL }, // Inst #12177 = VMSAVE32 |
| 29924 | { 12176, 0, 0, 0, 8, 1, 0, X86ImpOpBase + 123, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002058ULL }, // Inst #12176 = VMRUN64 |
| 29925 | { 12175, 0, 0, 0, 8, 1, 0, X86ImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002058ULL }, // Inst #12175 = VMRUN32 |
| 29926 | { 12174, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002043ULL }, // Inst #12174 = VMRESUME |
| 29927 | { 12173, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00002028ULL }, // Inst #12173 = VMREAD64rr |
| 29928 | { 12172, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00002018ULL }, // Inst #12172 = VMREAD64mr |
| 29929 | { 12171, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00002028ULL }, // Inst #12171 = VMREAD32rr |
| 29930 | { 12170, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00002018ULL }, // Inst #12170 = VMREAD32mr |
| 29931 | { 12169, 5, 0, 0, 835, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002027ULL }, // Inst #12169 = VMPTRSTm |
| 29932 | { 12168, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002026ULL }, // Inst #12168 = VMPTRLDm |
| 29933 | { 12167, 4, 1, 0, 231, 0, 0, X86ImpOpBase + 0, 893, 0, 0xa138046829ULL }, // Inst #12167 = VMPSADBWrri |
| 29934 | { 12166, 8, 1, 0, 230, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xa138046819ULL }, // Inst #12166 = VMPSADBWrmi |
| 29935 | { 12165, 4, 1, 0, 483, 0, 0, X86ImpOpBase + 0, 901, 0, 0x1a138046829ULL }, // Inst #12165 = VMPSADBWYrri |
| 29936 | { 12164, 8, 1, 0, 482, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x1a138046819ULL }, // Inst #12164 = VMPSADBWYrmi |
| 29937 | { 12163, 2, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 535, 0, 0x3f38003029ULL }, // Inst #12163 = VMOVZPQILo2PQIrr |
| 29938 | { 12162, 2, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa03f78023029ULL }, // Inst #12162 = VMOVZPQILo2PQIZrr |
| 29939 | { 12161, 6, 1, 0, 229, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x403760012819ULL }, // Inst #12161 = VMOVWrm |
| 29940 | { 12160, 6, 0, 0, 1783, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x403f60012818ULL }, // Inst #12160 = VMOVWmr |
| 29941 | { 12159, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 4690, 0, 0xa03760032829ULL }, // Inst #12159 = VMOVW64toSHrr |
| 29942 | { 12158, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 4700, 0, 0xa03760012829ULL }, // Inst #12158 = VMOVW2SHrr |
| 29943 | { 12157, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x8a8002028ULL }, // Inst #12157 = VMOVUPSrr_REV |
| 29944 | { 12156, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x828002029ULL }, // Inst #12156 = VMOVUPSrr |
| 29945 | { 12155, 6, 1, 0, 14, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x828002019ULL }, // Inst #12155 = VMOVUPSrm |
| 29946 | { 12154, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x8a8002018ULL }, // Inst #12154 = VMOVUPSmr |
| 29947 | { 12153, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee08e8002028ULL }, // Inst #12153 = VMOVUPSZrrkz_REV |
| 29948 | { 12152, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee0868002029ULL }, // Inst #12152 = VMOVUPSZrrkz |
| 29949 | { 12151, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xea08e8002028ULL }, // Inst #12151 = VMOVUPSZrrk_REV |
| 29950 | { 12150, 4, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2775, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea0868002029ULL }, // Inst #12150 = VMOVUPSZrrk |
| 29951 | { 12149, 2, 1, 0, 1652, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe808e8002028ULL }, // Inst #12149 = VMOVUPSZrr_REV |
| 29952 | { 12148, 2, 1, 0, 1652, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe80868002029ULL }, // Inst #12148 = VMOVUPSZrr |
| 29953 | { 12147, 7, 1, 0, 1795, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xee0868002019ULL }, // Inst #12147 = VMOVUPSZrmkz |
| 29954 | { 12146, 8, 1, 0, 1795, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea0868002019ULL }, // Inst #12146 = VMOVUPSZrmk |
| 29955 | { 12145, 6, 1, 0, 1319, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe80868002019ULL }, // Inst #12145 = VMOVUPSZrm |
| 29956 | { 12144, 7, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0xea08e8002018ULL }, // Inst #12144 = VMOVUPSZmrk |
| 29957 | { 12143, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe808e8002018ULL }, // Inst #12143 = VMOVUPSZmr |
| 29958 | { 12142, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc708e8002028ULL }, // Inst #12142 = VMOVUPSZ256rrkz_REV |
| 29959 | { 12141, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc70868002029ULL }, // Inst #12141 = VMOVUPSZ256rrkz |
| 29960 | { 12140, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc308e8002028ULL }, // Inst #12140 = VMOVUPSZ256rrk_REV |
| 29961 | { 12139, 4, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2761, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc30868002029ULL }, // Inst #12139 = VMOVUPSZ256rrk |
| 29962 | { 12138, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc108e8002028ULL }, // Inst #12138 = VMOVUPSZ256rr_REV |
| 29963 | { 12137, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc10868002029ULL }, // Inst #12137 = VMOVUPSZ256rr |
| 29964 | { 12136, 7, 1, 0, 1927, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xc70868002019ULL }, // Inst #12136 = VMOVUPSZ256rmkz |
| 29965 | { 12135, 8, 1, 0, 1927, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc30868002019ULL }, // Inst #12135 = VMOVUPSZ256rmk |
| 29966 | { 12134, 6, 1, 0, 1319, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc10868002019ULL }, // Inst #12134 = VMOVUPSZ256rm |
| 29967 | { 12133, 7, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0xc308e8002018ULL }, // Inst #12133 = VMOVUPSZ256mrk |
| 29968 | { 12132, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc108e8002018ULL }, // Inst #12132 = VMOVUPSZ256mr |
| 29969 | { 12131, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa608e8002028ULL }, // Inst #12131 = VMOVUPSZ128rrkz_REV |
| 29970 | { 12130, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa60868002029ULL }, // Inst #12130 = VMOVUPSZ128rrkz |
| 29971 | { 12129, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa208e8002028ULL }, // Inst #12129 = VMOVUPSZ128rrk_REV |
| 29972 | { 12128, 4, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2336, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa20868002029ULL }, // Inst #12128 = VMOVUPSZ128rrk |
| 29973 | { 12127, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa008e8002028ULL }, // Inst #12127 = VMOVUPSZ128rr_REV |
| 29974 | { 12126, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa00868002029ULL }, // Inst #12126 = VMOVUPSZ128rr |
| 29975 | { 12125, 7, 1, 0, 1828, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa60868002019ULL }, // Inst #12125 = VMOVUPSZ128rmkz |
| 29976 | { 12124, 8, 1, 0, 1828, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa20868002019ULL }, // Inst #12124 = VMOVUPSZ128rmk |
| 29977 | { 12123, 6, 1, 0, 1295, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa00868002019ULL }, // Inst #12123 = VMOVUPSZ128rm |
| 29978 | { 12122, 7, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0xa208e8002018ULL }, // Inst #12122 = VMOVUPSZ128mrk |
| 29979 | { 12121, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa008e8002018ULL }, // Inst #12121 = VMOVUPSZ128mr |
| 29980 | { 12120, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2866, 0|(1ULL<<MCID::MoveReg), 0x108a8002028ULL }, // Inst #12120 = VMOVUPSYrr_REV |
| 29981 | { 12119, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2866, 0|(1ULL<<MCID::MoveReg), 0x10828002029ULL }, // Inst #12119 = VMOVUPSYrr |
| 29982 | { 12118, 6, 1, 0, 16, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x10828002019ULL }, // Inst #12118 = VMOVUPSYrm |
| 29983 | { 12117, 6, 0, 0, 1170, 0, 0, X86ImpOpBase + 0, 4694, 0|(1ULL<<MCID::MayStore), 0x108a8002018ULL }, // Inst #12117 = VMOVUPSYmr |
| 29984 | { 12116, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x8b0002828ULL }, // Inst #12116 = VMOVUPDrr_REV |
| 29985 | { 12115, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x830002829ULL }, // Inst #12115 = VMOVUPDrr |
| 29986 | { 12114, 6, 1, 0, 14, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x830002819ULL }, // Inst #12114 = VMOVUPDrm |
| 29987 | { 12113, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x8b0002818ULL }, // Inst #12113 = VMOVUPDmr |
| 29988 | { 12112, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee08f0022828ULL }, // Inst #12112 = VMOVUPDZrrkz_REV |
| 29989 | { 12111, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee0870022829ULL }, // Inst #12111 = VMOVUPDZrrkz |
| 29990 | { 12110, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xea08f0022828ULL }, // Inst #12110 = VMOVUPDZrrk_REV |
| 29991 | { 12109, 4, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2740, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea0870022829ULL }, // Inst #12109 = VMOVUPDZrrk |
| 29992 | { 12108, 2, 1, 0, 1652, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe808f0022828ULL }, // Inst #12108 = VMOVUPDZrr_REV |
| 29993 | { 12107, 2, 1, 0, 1652, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe80870022829ULL }, // Inst #12107 = VMOVUPDZrr |
| 29994 | { 12106, 7, 1, 0, 1795, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xee0870022819ULL }, // Inst #12106 = VMOVUPDZrmkz |
| 29995 | { 12105, 8, 1, 0, 1795, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea0870022819ULL }, // Inst #12105 = VMOVUPDZrmk |
| 29996 | { 12104, 6, 1, 0, 1319, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe80870022819ULL }, // Inst #12104 = VMOVUPDZrm |
| 29997 | { 12103, 7, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0xea08f0022818ULL }, // Inst #12103 = VMOVUPDZmrk |
| 29998 | { 12102, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe808f0022818ULL }, // Inst #12102 = VMOVUPDZmr |
| 29999 | { 12101, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc708f0022828ULL }, // Inst #12101 = VMOVUPDZ256rrkz_REV |
| 30000 | { 12100, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc70870022829ULL }, // Inst #12100 = VMOVUPDZ256rrkz |
| 30001 | { 12099, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc308f0022828ULL }, // Inst #12099 = VMOVUPDZ256rrk_REV |
| 30002 | { 12098, 4, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2718, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc30870022829ULL }, // Inst #12098 = VMOVUPDZ256rrk |
| 30003 | { 12097, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc108f0022828ULL }, // Inst #12097 = VMOVUPDZ256rr_REV |
| 30004 | { 12096, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc10870022829ULL }, // Inst #12096 = VMOVUPDZ256rr |
| 30005 | { 12095, 7, 1, 0, 1927, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xc70870022819ULL }, // Inst #12095 = VMOVUPDZ256rmkz |
| 30006 | { 12094, 8, 1, 0, 1927, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc30870022819ULL }, // Inst #12094 = VMOVUPDZ256rmk |
| 30007 | { 12093, 6, 1, 0, 1319, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc10870022819ULL }, // Inst #12093 = VMOVUPDZ256rm |
| 30008 | { 12092, 7, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0xc308f0022818ULL }, // Inst #12092 = VMOVUPDZ256mrk |
| 30009 | { 12091, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc108f0022818ULL }, // Inst #12091 = VMOVUPDZ256mr |
| 30010 | { 12090, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa608f0022828ULL }, // Inst #12090 = VMOVUPDZ128rrkz_REV |
| 30011 | { 12089, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa60870022829ULL }, // Inst #12089 = VMOVUPDZ128rrkz |
| 30012 | { 12088, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa208f0022828ULL }, // Inst #12088 = VMOVUPDZ128rrk_REV |
| 30013 | { 12087, 4, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2702, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa20870022829ULL }, // Inst #12087 = VMOVUPDZ128rrk |
| 30014 | { 12086, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa008f0022828ULL }, // Inst #12086 = VMOVUPDZ128rr_REV |
| 30015 | { 12085, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa00870022829ULL }, // Inst #12085 = VMOVUPDZ128rr |
| 30016 | { 12084, 7, 1, 0, 1828, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0xa60870022819ULL }, // Inst #12084 = VMOVUPDZ128rmkz |
| 30017 | { 12083, 8, 1, 0, 1828, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa20870022819ULL }, // Inst #12083 = VMOVUPDZ128rmk |
| 30018 | { 12082, 6, 1, 0, 1295, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa00870022819ULL }, // Inst #12082 = VMOVUPDZ128rm |
| 30019 | { 12081, 7, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0xa208f0022818ULL }, // Inst #12081 = VMOVUPDZ128mrk |
| 30020 | { 12080, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa008f0022818ULL }, // Inst #12080 = VMOVUPDZ128mr |
| 30021 | { 12079, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2866, 0|(1ULL<<MCID::MoveReg), 0x108b0002828ULL }, // Inst #12079 = VMOVUPDYrr_REV |
| 30022 | { 12078, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2866, 0|(1ULL<<MCID::MoveReg), 0x10830002829ULL }, // Inst #12078 = VMOVUPDYrr |
| 30023 | { 12077, 6, 1, 0, 16, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x10830002819ULL }, // Inst #12077 = VMOVUPDYrm |
| 30024 | { 12076, 6, 0, 0, 1170, 0, 0, X86ImpOpBase + 0, 4694, 0|(1ULL<<MCID::MayStore), 0x108b0002818ULL }, // Inst #12076 = VMOVUPDYmr |
| 30025 | { 12075, 3, 1, 0, 1570, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x88a0003028ULL }, // Inst #12075 = VMOVSSrr_REV |
| 30026 | { 12074, 3, 1, 0, 1570, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x8828003029ULL }, // Inst #12074 = VMOVSSrr |
| 30027 | { 12073, 6, 1, 0, 773, 0, 0, X86ImpOpBase + 0, 980, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x828003019ULL }, // Inst #12073 = VMOVSSrm_alt |
| 30028 | { 12072, 6, 1, 0, 773, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x828003019ULL }, // Inst #12072 = VMOVSSrm |
| 30029 | { 12071, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 1376, 0|(1ULL<<MCID::MayStore), 0x8a8003018ULL }, // Inst #12071 = VMOVSSmr |
| 30030 | { 12070, 4, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1926, 0, 0xa688e0003028ULL }, // Inst #12070 = VMOVSSZrrkz_REV |
| 30031 | { 12069, 4, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1926, 0, 0x668868003029ULL }, // Inst #12069 = VMOVSSZrrkz |
| 30032 | { 12068, 5, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1921, 0, 0xa288e0003028ULL }, // Inst #12068 = VMOVSSZrrk_REV |
| 30033 | { 12067, 5, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1921, 0, 0x628868003029ULL }, // Inst #12067 = VMOVSSZrrk |
| 30034 | { 12066, 3, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa088e0003028ULL }, // Inst #12066 = VMOVSSZrr_REV |
| 30035 | { 12065, 3, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1625, 0, 0x608868003029ULL }, // Inst #12065 = VMOVSSZrr |
| 30036 | { 12064, 7, 1, 0, 1830, 0, 0, X86ImpOpBase + 0, 4835, 0|(1ULL<<MCID::MayLoad), 0x660868003019ULL }, // Inst #12064 = VMOVSSZrmkz |
| 30037 | { 12063, 8, 1, 0, 1830, 0, 0, X86ImpOpBase + 0, 4827, 0|(1ULL<<MCID::MayLoad), 0x620868003019ULL }, // Inst #12063 = VMOVSSZrmk |
| 30038 | { 12062, 6, 1, 0, 1280, 0, 0, X86ImpOpBase + 0, 2687, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x600868003019ULL }, // Inst #12062 = VMOVSSZrm_alt |
| 30039 | { 12061, 6, 1, 0, 1280, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x600868003019ULL }, // Inst #12061 = VMOVSSZrm |
| 30040 | { 12060, 7, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 4820, 0|(1ULL<<MCID::MayStore), 0x6208e8003018ULL }, // Inst #12060 = VMOVSSZmrk |
| 30041 | { 12059, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 4848, 0|(1ULL<<MCID::MayStore), 0x6008e8003018ULL }, // Inst #12059 = VMOVSSZmr |
| 30042 | { 12058, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 1025, 0|(1ULL<<MCID::Bitcast), 0x3f38002828ULL }, // Inst #12058 = VMOVSS2DIrr |
| 30043 | { 12057, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 3201, 0|(1ULL<<MCID::Bitcast), 0xa03f78002828ULL }, // Inst #12057 = VMOVSS2DIZrr |
| 30044 | { 12056, 2, 1, 0, 1476, 0, 0, X86ImpOpBase + 0, 535, 0, 0x928003029ULL }, // Inst #12056 = VMOVSLDUPrr |
| 30045 | { 12055, 6, 1, 0, 772, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x928003019ULL }, // Inst #12055 = VMOVSLDUPrm |
| 30046 | { 12054, 3, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee0968003029ULL }, // Inst #12054 = VMOVSLDUPZrrkz |
| 30047 | { 12053, 4, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 2775, 0, 0xea0968003029ULL }, // Inst #12053 = VMOVSLDUPZrrk |
| 30048 | { 12052, 2, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe80968003029ULL }, // Inst #12052 = VMOVSLDUPZrr |
| 30049 | { 12051, 7, 1, 0, 1321, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xee0968003019ULL }, // Inst #12051 = VMOVSLDUPZrmkz |
| 30050 | { 12050, 8, 1, 0, 1321, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xea0968003019ULL }, // Inst #12050 = VMOVSLDUPZrmk |
| 30051 | { 12049, 6, 1, 0, 1787, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe80968003019ULL }, // Inst #12049 = VMOVSLDUPZrm |
| 30052 | { 12048, 3, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc70968003029ULL }, // Inst #12048 = VMOVSLDUPZ256rrkz |
| 30053 | { 12047, 4, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 2761, 0, 0xc30968003029ULL }, // Inst #12047 = VMOVSLDUPZ256rrk |
| 30054 | { 12046, 2, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc10968003029ULL }, // Inst #12046 = VMOVSLDUPZ256rr |
| 30055 | { 12045, 7, 1, 0, 1320, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xc70968003019ULL }, // Inst #12045 = VMOVSLDUPZ256rmkz |
| 30056 | { 12044, 8, 1, 0, 1320, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0xc30968003019ULL }, // Inst #12044 = VMOVSLDUPZ256rmk |
| 30057 | { 12043, 6, 1, 0, 1788, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc10968003019ULL }, // Inst #12043 = VMOVSLDUPZ256rm |
| 30058 | { 12042, 3, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa60968003029ULL }, // Inst #12042 = VMOVSLDUPZ128rrkz |
| 30059 | { 12041, 4, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa20968003029ULL }, // Inst #12041 = VMOVSLDUPZ128rrk |
| 30060 | { 12040, 2, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa00968003029ULL }, // Inst #12040 = VMOVSLDUPZ128rr |
| 30061 | { 12039, 7, 1, 0, 1296, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa60968003019ULL }, // Inst #12039 = VMOVSLDUPZ128rmkz |
| 30062 | { 12038, 8, 1, 0, 1296, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0xa20968003019ULL }, // Inst #12038 = VMOVSLDUPZ128rmk |
| 30063 | { 12037, 6, 1, 0, 1755, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa00968003019ULL }, // Inst #12037 = VMOVSLDUPZ128rm |
| 30064 | { 12036, 2, 1, 0, 1477, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x10928003029ULL }, // Inst #12036 = VMOVSLDUPYrr |
| 30065 | { 12035, 6, 1, 0, 779, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x10928003019ULL }, // Inst #12035 = VMOVSLDUPYrm |
| 30066 | { 12034, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 3116, 0, 0xa03f60032828ULL }, // Inst #12034 = VMOVSHtoW64rr |
| 30067 | { 12033, 4, 1, 0, 2225, 0, 0, X86ImpOpBase + 0, 1926, 0, 0xa688e0013028ULL }, // Inst #12033 = VMOVSHZrrkz_REV |
| 30068 | { 12032, 4, 1, 0, 2225, 0, 0, X86ImpOpBase + 0, 1926, 0, 0x468868013029ULL }, // Inst #12032 = VMOVSHZrrkz |
| 30069 | { 12031, 5, 1, 0, 2225, 0, 0, X86ImpOpBase + 0, 1921, 0, 0xa288e0013028ULL }, // Inst #12031 = VMOVSHZrrk_REV |
| 30070 | { 12030, 5, 1, 0, 2225, 0, 0, X86ImpOpBase + 0, 1921, 0, 0x428868013029ULL }, // Inst #12030 = VMOVSHZrrk |
| 30071 | { 12029, 3, 1, 0, 1813, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa088e0013028ULL }, // Inst #12029 = VMOVSHZrr_REV |
| 30072 | { 12028, 3, 1, 0, 1813, 0, 0, X86ImpOpBase + 0, 1625, 0, 0x408868013029ULL }, // Inst #12028 = VMOVSHZrr |
| 30073 | { 12027, 7, 1, 0, 2220, 0, 0, X86ImpOpBase + 0, 4835, 0|(1ULL<<MCID::MayLoad), 0x460868013019ULL }, // Inst #12027 = VMOVSHZrmkz |
| 30074 | { 12026, 8, 1, 0, 2220, 0, 0, X86ImpOpBase + 0, 4827, 0|(1ULL<<MCID::MayLoad), 0x420868013019ULL }, // Inst #12026 = VMOVSHZrmk |
| 30075 | { 12025, 6, 1, 0, 229, 0, 0, X86ImpOpBase + 0, 2679, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400868013019ULL }, // Inst #12025 = VMOVSHZrm_alt |
| 30076 | { 12024, 6, 1, 0, 229, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400868013019ULL }, // Inst #12024 = VMOVSHZrm |
| 30077 | { 12023, 7, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 4820, 0|(1ULL<<MCID::MayStore), 0x4208e8013018ULL }, // Inst #12023 = VMOVSHZmrk |
| 30078 | { 12022, 6, 0, 0, 1783, 0, 0, X86ImpOpBase + 0, 4842, 0|(1ULL<<MCID::MayStore), 0x4008e8013018ULL }, // Inst #12022 = VMOVSHZmr |
| 30079 | { 12021, 2, 1, 0, 1476, 0, 0, X86ImpOpBase + 0, 535, 0, 0xb28003029ULL }, // Inst #12021 = VMOVSHDUPrr |
| 30080 | { 12020, 6, 1, 0, 772, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0xb28003019ULL }, // Inst #12020 = VMOVSHDUPrm |
| 30081 | { 12019, 3, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee0b68003029ULL }, // Inst #12019 = VMOVSHDUPZrrkz |
| 30082 | { 12018, 4, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 2775, 0, 0xea0b68003029ULL }, // Inst #12018 = VMOVSHDUPZrrk |
| 30083 | { 12017, 2, 1, 0, 475, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe80b68003029ULL }, // Inst #12017 = VMOVSHDUPZrr |
| 30084 | { 12016, 7, 1, 0, 1321, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xee0b68003019ULL }, // Inst #12016 = VMOVSHDUPZrmkz |
| 30085 | { 12015, 8, 1, 0, 1321, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xea0b68003019ULL }, // Inst #12015 = VMOVSHDUPZrmk |
| 30086 | { 12014, 6, 1, 0, 1787, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe80b68003019ULL }, // Inst #12014 = VMOVSHDUPZrm |
| 30087 | { 12013, 3, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc70b68003029ULL }, // Inst #12013 = VMOVSHDUPZ256rrkz |
| 30088 | { 12012, 4, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 2761, 0, 0xc30b68003029ULL }, // Inst #12012 = VMOVSHDUPZ256rrk |
| 30089 | { 12011, 2, 1, 0, 1696, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc10b68003029ULL }, // Inst #12011 = VMOVSHDUPZ256rr |
| 30090 | { 12010, 7, 1, 0, 1320, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xc70b68003019ULL }, // Inst #12010 = VMOVSHDUPZ256rmkz |
| 30091 | { 12009, 8, 1, 0, 1320, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0xc30b68003019ULL }, // Inst #12009 = VMOVSHDUPZ256rmk |
| 30092 | { 12008, 6, 1, 0, 1788, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc10b68003019ULL }, // Inst #12008 = VMOVSHDUPZ256rm |
| 30093 | { 12007, 3, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa60b68003029ULL }, // Inst #12007 = VMOVSHDUPZ128rrkz |
| 30094 | { 12006, 4, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa20b68003029ULL }, // Inst #12006 = VMOVSHDUPZ128rrk |
| 30095 | { 12005, 2, 1, 0, 1695, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa00b68003029ULL }, // Inst #12005 = VMOVSHDUPZ128rr |
| 30096 | { 12004, 7, 1, 0, 1296, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa60b68003019ULL }, // Inst #12004 = VMOVSHDUPZ128rmkz |
| 30097 | { 12003, 8, 1, 0, 1296, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0xa20b68003019ULL }, // Inst #12003 = VMOVSHDUPZ128rmk |
| 30098 | { 12002, 6, 1, 0, 1755, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa00b68003019ULL }, // Inst #12002 = VMOVSHDUPZ128rm |
| 30099 | { 12001, 2, 1, 0, 1477, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x10b28003029ULL }, // Inst #12001 = VMOVSHDUPYrr |
| 30100 | { 12000, 6, 1, 0, 779, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x10b28003019ULL }, // Inst #12000 = VMOVSHDUPYrm |
| 30101 | { 11999, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 3123, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa03f60012828ULL }, // Inst #11999 = VMOVSH2Wrr |
| 30102 | { 11998, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 997, 0|(1ULL<<MCID::Bitcast), 0x3f38022828ULL }, // Inst #11998 = VMOVSDto64rr |
| 30103 | { 11997, 2, 1, 0, 1773, 0, 0, X86ImpOpBase + 0, 3114, 0|(1ULL<<MCID::Bitcast), 0xa03f78022828ULL }, // Inst #11997 = VMOVSDto64Zrr |
| 30104 | { 11996, 3, 1, 0, 1570, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x88a0003828ULL }, // Inst #11996 = VMOVSDrr_REV |
| 30105 | { 11995, 3, 1, 0, 1570, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x8830003829ULL }, // Inst #11995 = VMOVSDrr |
| 30106 | { 11994, 6, 1, 0, 773, 0, 0, X86ImpOpBase + 0, 972, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x830003819ULL }, // Inst #11994 = VMOVSDrm_alt |
| 30107 | { 11993, 6, 1, 0, 773, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x830003819ULL }, // Inst #11993 = VMOVSDrm |
| 30108 | { 11992, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 1370, 0|(1ULL<<MCID::MayStore), 0x8b0003818ULL }, // Inst #11992 = VMOVSDmr |
| 30109 | { 11991, 4, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1926, 0, 0xa688e0023828ULL }, // Inst #11991 = VMOVSDZrrkz_REV |
| 30110 | { 11990, 4, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1926, 0, 0x868870023829ULL }, // Inst #11990 = VMOVSDZrrkz |
| 30111 | { 11989, 5, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1921, 0, 0xa288e0023828ULL }, // Inst #11989 = VMOVSDZrrk_REV |
| 30112 | { 11988, 5, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1921, 0, 0x828870023829ULL }, // Inst #11988 = VMOVSDZrrk |
| 30113 | { 11987, 3, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa088e0023828ULL }, // Inst #11987 = VMOVSDZrr_REV |
| 30114 | { 11986, 3, 1, 0, 1418, 0, 0, X86ImpOpBase + 0, 1625, 0, 0x808870023829ULL }, // Inst #11986 = VMOVSDZrr |
| 30115 | { 11985, 7, 1, 0, 1830, 0, 0, X86ImpOpBase + 0, 4835, 0|(1ULL<<MCID::MayLoad), 0x860870023819ULL }, // Inst #11985 = VMOVSDZrmkz |
| 30116 | { 11984, 8, 1, 0, 1830, 0, 0, X86ImpOpBase + 0, 4827, 0|(1ULL<<MCID::MayLoad), 0x820870023819ULL }, // Inst #11984 = VMOVSDZrmk |
| 30117 | { 11983, 6, 1, 0, 1280, 0, 0, X86ImpOpBase + 0, 2671, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x800870023819ULL }, // Inst #11983 = VMOVSDZrm_alt |
| 30118 | { 11982, 6, 1, 0, 1280, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x800870023819ULL }, // Inst #11982 = VMOVSDZrm |
| 30119 | { 11981, 7, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 4820, 0|(1ULL<<MCID::MayStore), 0x8208f0023818ULL }, // Inst #11981 = VMOVSDZmrk |
| 30120 | { 11980, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 4814, 0|(1ULL<<MCID::MayStore), 0x8008f0023818ULL }, // Inst #11980 = VMOVSDZmr |
| 30121 | { 11979, 6, 1, 0, 771, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x3f38003019ULL }, // Inst #11979 = VMOVQI2PQIrm |
| 30122 | { 11978, 6, 1, 0, 1277, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x803f78023019ULL }, // Inst #11978 = VMOVQI2PQIZrm |
| 30123 | { 11977, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 999, 0, 0x3f38022828ULL }, // Inst #11977 = VMOVPQIto64rr |
| 30124 | { 11976, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x3f38022818ULL }, // Inst #11976 = VMOVPQIto64mr |
| 30125 | { 11975, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 3116, 0, 0xa03f78022828ULL }, // Inst #11975 = VMOVPQIto64Zrr |
| 30126 | { 11974, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x803f78022818ULL }, // Inst #11974 = VMOVPQIto64Zmr |
| 30127 | { 11973, 2, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 535, 0, 0x6b20002828ULL }, // Inst #11973 = VMOVPQI2QIrr |
| 30128 | { 11972, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x6b38002818ULL }, // Inst #11972 = VMOVPQI2QImr |
| 30129 | { 11971, 2, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa06b78022828ULL }, // Inst #11971 = VMOVPQI2QIZrr |
| 30130 | { 11970, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x806b78022818ULL }, // Inst #11970 = VMOVPQI2QIZmr |
| 30131 | { 11969, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 1003, 0, 0x3f38002828ULL }, // Inst #11969 = VMOVPDI2DIrr |
| 30132 | { 11968, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x3f38002818ULL }, // Inst #11968 = VMOVPDI2DImr |
| 30133 | { 11967, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 3123, 0, 0xa03f78002828ULL }, // Inst #11967 = VMOVPDI2DIZrr |
| 30134 | { 11966, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x603f78002818ULL }, // Inst #11966 = VMOVPDI2DIZmr |
| 30135 | { 11965, 6, 0, 0, 1638, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x15a8002018ULL }, // Inst #11965 = VMOVNTPSmr |
| 30136 | { 11964, 6, 0, 0, 2237, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe815e8002018ULL }, // Inst #11964 = VMOVNTPSZmr |
| 30137 | { 11963, 6, 0, 0, 2236, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc115e8002018ULL }, // Inst #11963 = VMOVNTPSZ256mr |
| 30138 | { 11962, 6, 0, 0, 2235, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa015e8002018ULL }, // Inst #11962 = VMOVNTPSZ128mr |
| 30139 | { 11961, 6, 0, 0, 1637, 0, 0, X86ImpOpBase + 0, 4694, 0|(1ULL<<MCID::MayStore), 0x115a8002018ULL }, // Inst #11961 = VMOVNTPSYmr |
| 30140 | { 11960, 6, 0, 0, 1636, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x15b0002818ULL }, // Inst #11960 = VMOVNTPDmr |
| 30141 | { 11959, 6, 0, 0, 2234, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe815f0022818ULL }, // Inst #11959 = VMOVNTPDZmr |
| 30142 | { 11958, 6, 0, 0, 2233, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc115f0022818ULL }, // Inst #11958 = VMOVNTPDZ256mr |
| 30143 | { 11957, 6, 0, 0, 2232, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa015f0022818ULL }, // Inst #11957 = VMOVNTPDZ128mr |
| 30144 | { 11956, 6, 0, 0, 481, 0, 0, X86ImpOpBase + 0, 4694, 0|(1ULL<<MCID::MayStore), 0x115b0002818ULL }, // Inst #11956 = VMOVNTPDYmr |
| 30145 | { 11955, 6, 0, 0, 1635, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x73b8002818ULL }, // Inst #11955 = VMOVNTDQmr |
| 30146 | { 11954, 6, 0, 0, 2231, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe873f8002818ULL }, // Inst #11954 = VMOVNTDQZmr |
| 30147 | { 11953, 6, 0, 0, 2230, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc173f8002818ULL }, // Inst #11953 = VMOVNTDQZ256mr |
| 30148 | { 11952, 6, 0, 0, 2229, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa073f8002818ULL }, // Inst #11952 = VMOVNTDQZ128mr |
| 30149 | { 11951, 6, 0, 0, 480, 0, 0, X86ImpOpBase + 0, 4694, 0|(1ULL<<MCID::MayStore), 0x173b8002818ULL }, // Inst #11951 = VMOVNTDQYmr |
| 30150 | { 11950, 6, 1, 0, 225, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1538004819ULL }, // Inst #11950 = VMOVNTDQArm |
| 30151 | { 11949, 6, 1, 0, 461, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe81578004819ULL }, // Inst #11949 = VMOVNTDQAZrm |
| 30152 | { 11948, 6, 1, 0, 1311, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc11578004819ULL }, // Inst #11948 = VMOVNTDQAZ256rm |
| 30153 | { 11947, 6, 1, 0, 1291, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa01578004819ULL }, // Inst #11947 = VMOVNTDQAZ128rm |
| 30154 | { 11946, 6, 1, 0, 479, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x11538004819ULL }, // Inst #11946 = VMOVNTDQAYrm |
| 30155 | { 11945, 2, 1, 0, 224, 0, 0, X86ImpOpBase + 0, 1003, 0, 0x2828002029ULL }, // Inst #11945 = VMOVMSKPSrr |
| 30156 | { 11944, 2, 1, 0, 1634, 0, 0, X86ImpOpBase + 0, 4812, 0, 0x12828002029ULL }, // Inst #11944 = VMOVMSKPSYrr |
| 30157 | { 11943, 2, 1, 0, 224, 0, 0, X86ImpOpBase + 0, 1003, 0, 0x2830002829ULL }, // Inst #11943 = VMOVMSKPDrr |
| 30158 | { 11942, 2, 1, 0, 1634, 0, 0, X86ImpOpBase + 0, 4812, 0, 0x12830002829ULL }, // Inst #11942 = VMOVMSKPDYrr |
| 30159 | { 11941, 7, 1, 0, 1565, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8928002019ULL }, // Inst #11941 = VMOVLPSrm |
| 30160 | { 11940, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x9a8002018ULL }, // Inst #11940 = VMOVLPSmr |
| 30161 | { 11939, 7, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x808968002019ULL }, // Inst #11939 = VMOVLPSZ128rm |
| 30162 | { 11938, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x8009e8002018ULL }, // Inst #11938 = VMOVLPSZ128mr |
| 30163 | { 11937, 7, 1, 0, 1565, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8930002819ULL }, // Inst #11937 = VMOVLPDrm |
| 30164 | { 11936, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x9b0002818ULL }, // Inst #11936 = VMOVLPDmr |
| 30165 | { 11935, 7, 1, 0, 1809, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x808970022819ULL }, // Inst #11935 = VMOVLPDZ128rm |
| 30166 | { 11934, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x8009f0022818ULL }, // Inst #11934 = VMOVLPDZ128mr |
| 30167 | { 11933, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1731, 0, 0x8b28002029ULL }, // Inst #11933 = VMOVLHPSrr |
| 30168 | { 11932, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa08b68002029ULL }, // Inst #11932 = VMOVLHPSZrr |
| 30169 | { 11931, 7, 1, 0, 820, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8b28002019ULL }, // Inst #11931 = VMOVHPSrm |
| 30170 | { 11930, 6, 0, 0, 1035, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0xba8002018ULL }, // Inst #11930 = VMOVHPSmr |
| 30171 | { 11929, 7, 1, 0, 181, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x808b68002019ULL }, // Inst #11929 = VMOVHPSZ128rm |
| 30172 | { 11928, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x800be8002018ULL }, // Inst #11928 = VMOVHPSZ128mr |
| 30173 | { 11927, 7, 1, 0, 820, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x8b30002819ULL }, // Inst #11927 = VMOVHPDrm |
| 30174 | { 11926, 6, 0, 0, 1035, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0xbb0002818ULL }, // Inst #11926 = VMOVHPDmr |
| 30175 | { 11925, 7, 1, 0, 181, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x808b70022819ULL }, // Inst #11925 = VMOVHPDZ128rm |
| 30176 | { 11924, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x800bf0022818ULL }, // Inst #11924 = VMOVHPDZ128mr |
| 30177 | { 11923, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0x8928002029ULL }, // Inst #11923 = VMOVHLPSrr |
| 30178 | { 11922, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa08968002029ULL }, // Inst #11922 = VMOVHLPSZrr |
| 30179 | { 11921, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 535, 0, 0x3fb8003028ULL }, // Inst #11921 = VMOVDQUrr_REV |
| 30180 | { 11920, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 535, 0, 0x37b8003029ULL }, // Inst #11920 = VMOVDQUrr |
| 30181 | { 11919, 6, 1, 0, 186, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x37b8003019ULL }, // Inst #11919 = VMOVDQUrm |
| 30182 | { 11918, 6, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x3fb8003018ULL }, // Inst #11918 = VMOVDQUmr |
| 30183 | { 11917, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x13fb8003028ULL }, // Inst #11917 = VMOVDQUYrr_REV |
| 30184 | { 11916, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x137b8003029ULL }, // Inst #11916 = VMOVDQUYrr |
| 30185 | { 11915, 6, 1, 0, 461, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x137b8003019ULL }, // Inst #11915 = VMOVDQUYrm |
| 30186 | { 11914, 6, 0, 0, 1180, 0, 0, X86ImpOpBase + 0, 4694, 0|(1ULL<<MCID::MayStore), 0x13fb8003018ULL }, // Inst #11914 = VMOVDQUYmr |
| 30187 | { 11913, 3, 1, 0, 1862, 0, 0, X86ImpOpBase + 0, 4809, 0, 0xee3ff8003828ULL }, // Inst #11913 = VMOVDQU8Zrrkz_REV |
| 30188 | { 11912, 3, 1, 0, 1862, 0, 0, X86ImpOpBase + 0, 4809, 0, 0xee37f8003829ULL }, // Inst #11912 = VMOVDQU8Zrrkz |
| 30189 | { 11911, 3, 1, 0, 1862, 0, 0, X86ImpOpBase + 0, 4809, 0, 0xea3ff8003828ULL }, // Inst #11911 = VMOVDQU8Zrrk_REV |
| 30190 | { 11910, 4, 1, 0, 1862, 0, 0, X86ImpOpBase + 0, 4805, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8003829ULL }, // Inst #11910 = VMOVDQU8Zrrk |
| 30191 | { 11909, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe83ff8003828ULL }, // Inst #11909 = VMOVDQU8Zrr_REV |
| 30192 | { 11908, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe837f8003829ULL }, // Inst #11908 = VMOVDQU8Zrr |
| 30193 | { 11907, 7, 1, 0, 1902, 0, 0, X86ImpOpBase + 0, 4798, 0|(1ULL<<MCID::MayLoad), 0xee37f8003819ULL }, // Inst #11907 = VMOVDQU8Zrmkz |
| 30194 | { 11906, 8, 1, 0, 1902, 0, 0, X86ImpOpBase + 0, 4790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8003819ULL }, // Inst #11906 = VMOVDQU8Zrmk |
| 30195 | { 11905, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8003819ULL }, // Inst #11905 = VMOVDQU8Zrm |
| 30196 | { 11904, 7, 0, 0, 2228, 0, 0, X86ImpOpBase + 0, 4783, 0|(1ULL<<MCID::MayStore), 0xea3ff8003818ULL }, // Inst #11904 = VMOVDQU8Zmrk |
| 30197 | { 11903, 6, 0, 0, 1234, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe83ff8003818ULL }, // Inst #11903 = VMOVDQU8Zmr |
| 30198 | { 11902, 3, 1, 0, 2224, 0, 0, X86ImpOpBase + 0, 4780, 0, 0xc73ff8003828ULL }, // Inst #11902 = VMOVDQU8Z256rrkz_REV |
| 30199 | { 11901, 3, 1, 0, 2224, 0, 0, X86ImpOpBase + 0, 4780, 0, 0xc737f8003829ULL }, // Inst #11901 = VMOVDQU8Z256rrkz |
| 30200 | { 11900, 3, 1, 0, 2224, 0, 0, X86ImpOpBase + 0, 4780, 0, 0xc33ff8003828ULL }, // Inst #11900 = VMOVDQU8Z256rrk_REV |
| 30201 | { 11899, 4, 1, 0, 2224, 0, 0, X86ImpOpBase + 0, 4776, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8003829ULL }, // Inst #11899 = VMOVDQU8Z256rrk |
| 30202 | { 11898, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc13ff8003828ULL }, // Inst #11898 = VMOVDQU8Z256rr_REV |
| 30203 | { 11897, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc137f8003829ULL }, // Inst #11897 = VMOVDQU8Z256rr |
| 30204 | { 11896, 7, 1, 0, 2219, 0, 0, X86ImpOpBase + 0, 4769, 0|(1ULL<<MCID::MayLoad), 0xc737f8003819ULL }, // Inst #11896 = VMOVDQU8Z256rmkz |
| 30205 | { 11895, 8, 1, 0, 2219, 0, 0, X86ImpOpBase + 0, 4761, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8003819ULL }, // Inst #11895 = VMOVDQU8Z256rmk |
| 30206 | { 11894, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8003819ULL }, // Inst #11894 = VMOVDQU8Z256rm |
| 30207 | { 11893, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 4754, 0|(1ULL<<MCID::MayStore), 0xc33ff8003818ULL }, // Inst #11893 = VMOVDQU8Z256mrk |
| 30208 | { 11892, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc13ff8003818ULL }, // Inst #11892 = VMOVDQU8Z256mr |
| 30209 | { 11891, 3, 1, 0, 2223, 0, 0, X86ImpOpBase + 0, 4751, 0, 0xa63ff8003828ULL }, // Inst #11891 = VMOVDQU8Z128rrkz_REV |
| 30210 | { 11890, 3, 1, 0, 2223, 0, 0, X86ImpOpBase + 0, 4751, 0, 0xa637f8003829ULL }, // Inst #11890 = VMOVDQU8Z128rrkz |
| 30211 | { 11889, 3, 1, 0, 2223, 0, 0, X86ImpOpBase + 0, 4751, 0, 0xa23ff8003828ULL }, // Inst #11889 = VMOVDQU8Z128rrk_REV |
| 30212 | { 11888, 4, 1, 0, 2223, 0, 0, X86ImpOpBase + 0, 4747, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8003829ULL }, // Inst #11888 = VMOVDQU8Z128rrk |
| 30213 | { 11887, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa03ff8003828ULL }, // Inst #11887 = VMOVDQU8Z128rr_REV |
| 30214 | { 11886, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa037f8003829ULL }, // Inst #11886 = VMOVDQU8Z128rr |
| 30215 | { 11885, 7, 1, 0, 2218, 0, 0, X86ImpOpBase + 0, 4740, 0|(1ULL<<MCID::MayLoad), 0xa637f8003819ULL }, // Inst #11885 = VMOVDQU8Z128rmkz |
| 30216 | { 11884, 8, 1, 0, 2218, 0, 0, X86ImpOpBase + 0, 4732, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8003819ULL }, // Inst #11884 = VMOVDQU8Z128rmk |
| 30217 | { 11883, 6, 1, 0, 1297, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8003819ULL }, // Inst #11883 = VMOVDQU8Z128rm |
| 30218 | { 11882, 7, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 4725, 0|(1ULL<<MCID::MayStore), 0xa23ff8003818ULL }, // Inst #11882 = VMOVDQU8Z128mrk |
| 30219 | { 11881, 6, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa03ff8003818ULL }, // Inst #11881 = VMOVDQU8Z128mr |
| 30220 | { 11880, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee3ff8023028ULL }, // Inst #11880 = VMOVDQU64Zrrkz_REV |
| 30221 | { 11879, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee37f8023029ULL }, // Inst #11879 = VMOVDQU64Zrrkz |
| 30222 | { 11878, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xea3ff8023028ULL }, // Inst #11878 = VMOVDQU64Zrrk_REV |
| 30223 | { 11877, 4, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2740, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8023029ULL }, // Inst #11877 = VMOVDQU64Zrrk |
| 30224 | { 11876, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe83ff8023028ULL }, // Inst #11876 = VMOVDQU64Zrr_REV |
| 30225 | { 11875, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe837f8023029ULL }, // Inst #11875 = VMOVDQU64Zrr |
| 30226 | { 11874, 7, 1, 0, 1796, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xee37f8023019ULL }, // Inst #11874 = VMOVDQU64Zrmkz |
| 30227 | { 11873, 8, 1, 0, 1796, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8023019ULL }, // Inst #11873 = VMOVDQU64Zrmk |
| 30228 | { 11872, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8023019ULL }, // Inst #11872 = VMOVDQU64Zrm |
| 30229 | { 11871, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0xea3ff8023018ULL }, // Inst #11871 = VMOVDQU64Zmrk |
| 30230 | { 11870, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe83ff8023018ULL }, // Inst #11870 = VMOVDQU64Zmr |
| 30231 | { 11869, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc73ff8023028ULL }, // Inst #11869 = VMOVDQU64Z256rrkz_REV |
| 30232 | { 11868, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc737f8023029ULL }, // Inst #11868 = VMOVDQU64Z256rrkz |
| 30233 | { 11867, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc33ff8023028ULL }, // Inst #11867 = VMOVDQU64Z256rrk_REV |
| 30234 | { 11866, 4, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2718, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8023029ULL }, // Inst #11866 = VMOVDQU64Z256rrk |
| 30235 | { 11865, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc13ff8023028ULL }, // Inst #11865 = VMOVDQU64Z256rr_REV |
| 30236 | { 11864, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc137f8023029ULL }, // Inst #11864 = VMOVDQU64Z256rr |
| 30237 | { 11863, 7, 1, 0, 1928, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xc737f8023019ULL }, // Inst #11863 = VMOVDQU64Z256rmkz |
| 30238 | { 11862, 8, 1, 0, 1928, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8023019ULL }, // Inst #11862 = VMOVDQU64Z256rmk |
| 30239 | { 11861, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8023019ULL }, // Inst #11861 = VMOVDQU64Z256rm |
| 30240 | { 11860, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0xc33ff8023018ULL }, // Inst #11860 = VMOVDQU64Z256mrk |
| 30241 | { 11859, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc13ff8023018ULL }, // Inst #11859 = VMOVDQU64Z256mr |
| 30242 | { 11858, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa63ff8023028ULL }, // Inst #11858 = VMOVDQU64Z128rrkz_REV |
| 30243 | { 11857, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa637f8023029ULL }, // Inst #11857 = VMOVDQU64Z128rrkz |
| 30244 | { 11856, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa23ff8023028ULL }, // Inst #11856 = VMOVDQU64Z128rrk_REV |
| 30245 | { 11855, 4, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2702, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8023029ULL }, // Inst #11855 = VMOVDQU64Z128rrk |
| 30246 | { 11854, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa03ff8023028ULL }, // Inst #11854 = VMOVDQU64Z128rr_REV |
| 30247 | { 11853, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa037f8023029ULL }, // Inst #11853 = VMOVDQU64Z128rr |
| 30248 | { 11852, 7, 1, 0, 1829, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0xa637f8023019ULL }, // Inst #11852 = VMOVDQU64Z128rmkz |
| 30249 | { 11851, 8, 1, 0, 1829, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8023019ULL }, // Inst #11851 = VMOVDQU64Z128rmk |
| 30250 | { 11850, 6, 1, 0, 1297, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8023019ULL }, // Inst #11850 = VMOVDQU64Z128rm |
| 30251 | { 11849, 7, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0xa23ff8023018ULL }, // Inst #11849 = VMOVDQU64Z128mrk |
| 30252 | { 11848, 6, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa03ff8023018ULL }, // Inst #11848 = VMOVDQU64Z128mr |
| 30253 | { 11847, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee3ff8003028ULL }, // Inst #11847 = VMOVDQU32Zrrkz_REV |
| 30254 | { 11846, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee37f8003029ULL }, // Inst #11846 = VMOVDQU32Zrrkz |
| 30255 | { 11845, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xea3ff8003028ULL }, // Inst #11845 = VMOVDQU32Zrrk_REV |
| 30256 | { 11844, 4, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2775, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8003029ULL }, // Inst #11844 = VMOVDQU32Zrrk |
| 30257 | { 11843, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe83ff8003028ULL }, // Inst #11843 = VMOVDQU32Zrr_REV |
| 30258 | { 11842, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe837f8003029ULL }, // Inst #11842 = VMOVDQU32Zrr |
| 30259 | { 11841, 7, 1, 0, 1796, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xee37f8003019ULL }, // Inst #11841 = VMOVDQU32Zrmkz |
| 30260 | { 11840, 8, 1, 0, 1796, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8003019ULL }, // Inst #11840 = VMOVDQU32Zrmk |
| 30261 | { 11839, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8003019ULL }, // Inst #11839 = VMOVDQU32Zrm |
| 30262 | { 11838, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0xea3ff8003018ULL }, // Inst #11838 = VMOVDQU32Zmrk |
| 30263 | { 11837, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe83ff8003018ULL }, // Inst #11837 = VMOVDQU32Zmr |
| 30264 | { 11836, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc73ff8003028ULL }, // Inst #11836 = VMOVDQU32Z256rrkz_REV |
| 30265 | { 11835, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc737f8003029ULL }, // Inst #11835 = VMOVDQU32Z256rrkz |
| 30266 | { 11834, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc33ff8003028ULL }, // Inst #11834 = VMOVDQU32Z256rrk_REV |
| 30267 | { 11833, 4, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2761, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8003029ULL }, // Inst #11833 = VMOVDQU32Z256rrk |
| 30268 | { 11832, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc13ff8003028ULL }, // Inst #11832 = VMOVDQU32Z256rr_REV |
| 30269 | { 11831, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc137f8003029ULL }, // Inst #11831 = VMOVDQU32Z256rr |
| 30270 | { 11830, 7, 1, 0, 1928, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xc737f8003019ULL }, // Inst #11830 = VMOVDQU32Z256rmkz |
| 30271 | { 11829, 8, 1, 0, 1928, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8003019ULL }, // Inst #11829 = VMOVDQU32Z256rmk |
| 30272 | { 11828, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8003019ULL }, // Inst #11828 = VMOVDQU32Z256rm |
| 30273 | { 11827, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0xc33ff8003018ULL }, // Inst #11827 = VMOVDQU32Z256mrk |
| 30274 | { 11826, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc13ff8003018ULL }, // Inst #11826 = VMOVDQU32Z256mr |
| 30275 | { 11825, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa63ff8003028ULL }, // Inst #11825 = VMOVDQU32Z128rrkz_REV |
| 30276 | { 11824, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa637f8003029ULL }, // Inst #11824 = VMOVDQU32Z128rrkz |
| 30277 | { 11823, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa23ff8003028ULL }, // Inst #11823 = VMOVDQU32Z128rrk_REV |
| 30278 | { 11822, 4, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2336, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8003029ULL }, // Inst #11822 = VMOVDQU32Z128rrk |
| 30279 | { 11821, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa03ff8003028ULL }, // Inst #11821 = VMOVDQU32Z128rr_REV |
| 30280 | { 11820, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa037f8003029ULL }, // Inst #11820 = VMOVDQU32Z128rr |
| 30281 | { 11819, 7, 1, 0, 1829, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa637f8003019ULL }, // Inst #11819 = VMOVDQU32Z128rmkz |
| 30282 | { 11818, 8, 1, 0, 1829, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8003019ULL }, // Inst #11818 = VMOVDQU32Z128rmk |
| 30283 | { 11817, 6, 1, 0, 1297, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8003019ULL }, // Inst #11817 = VMOVDQU32Z128rm |
| 30284 | { 11816, 7, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0xa23ff8003018ULL }, // Inst #11816 = VMOVDQU32Z128mrk |
| 30285 | { 11815, 6, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa03ff8003018ULL }, // Inst #11815 = VMOVDQU32Z128mr |
| 30286 | { 11814, 3, 1, 0, 1862, 0, 0, X86ImpOpBase + 0, 3008, 0, 0xee3ff8023828ULL }, // Inst #11814 = VMOVDQU16Zrrkz_REV |
| 30287 | { 11813, 3, 1, 0, 1862, 0, 0, X86ImpOpBase + 0, 3008, 0, 0xee37f8023829ULL }, // Inst #11813 = VMOVDQU16Zrrkz |
| 30288 | { 11812, 3, 1, 0, 1862, 0, 0, X86ImpOpBase + 0, 3008, 0, 0xea3ff8023828ULL }, // Inst #11812 = VMOVDQU16Zrrk_REV |
| 30289 | { 11811, 4, 1, 0, 1862, 0, 0, X86ImpOpBase + 0, 3004, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8023829ULL }, // Inst #11811 = VMOVDQU16Zrrk |
| 30290 | { 11810, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe83ff8023828ULL }, // Inst #11810 = VMOVDQU16Zrr_REV |
| 30291 | { 11809, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe837f8023829ULL }, // Inst #11809 = VMOVDQU16Zrr |
| 30292 | { 11808, 7, 1, 0, 1902, 0, 0, X86ImpOpBase + 0, 2988, 0|(1ULL<<MCID::MayLoad), 0xee37f8023819ULL }, // Inst #11808 = VMOVDQU16Zrmkz |
| 30293 | { 11807, 8, 1, 0, 1902, 0, 0, X86ImpOpBase + 0, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8023819ULL }, // Inst #11807 = VMOVDQU16Zrmk |
| 30294 | { 11806, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8023819ULL }, // Inst #11806 = VMOVDQU16Zrm |
| 30295 | { 11805, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 4718, 0|(1ULL<<MCID::MayStore), 0xea3ff8023818ULL }, // Inst #11805 = VMOVDQU16Zmrk |
| 30296 | { 11804, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe83ff8023818ULL }, // Inst #11804 = VMOVDQU16Zmr |
| 30297 | { 11803, 3, 1, 0, 2224, 0, 0, X86ImpOpBase + 0, 2977, 0, 0xc73ff8023828ULL }, // Inst #11803 = VMOVDQU16Z256rrkz_REV |
| 30298 | { 11802, 3, 1, 0, 2224, 0, 0, X86ImpOpBase + 0, 2977, 0, 0xc737f8023829ULL }, // Inst #11802 = VMOVDQU16Z256rrkz |
| 30299 | { 11801, 3, 1, 0, 2224, 0, 0, X86ImpOpBase + 0, 2977, 0, 0xc33ff8023828ULL }, // Inst #11801 = VMOVDQU16Z256rrk_REV |
| 30300 | { 11800, 4, 1, 0, 2224, 0, 0, X86ImpOpBase + 0, 2973, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8023829ULL }, // Inst #11800 = VMOVDQU16Z256rrk |
| 30301 | { 11799, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc13ff8023828ULL }, // Inst #11799 = VMOVDQU16Z256rr_REV |
| 30302 | { 11798, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc137f8023829ULL }, // Inst #11798 = VMOVDQU16Z256rr |
| 30303 | { 11797, 7, 1, 0, 2219, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0xc737f8023819ULL }, // Inst #11797 = VMOVDQU16Z256rmkz |
| 30304 | { 11796, 8, 1, 0, 2219, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8023819ULL }, // Inst #11796 = VMOVDQU16Z256rmk |
| 30305 | { 11795, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8023819ULL }, // Inst #11795 = VMOVDQU16Z256rm |
| 30306 | { 11794, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 4711, 0|(1ULL<<MCID::MayStore), 0xc33ff8023818ULL }, // Inst #11794 = VMOVDQU16Z256mrk |
| 30307 | { 11793, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc13ff8023818ULL }, // Inst #11793 = VMOVDQU16Z256mr |
| 30308 | { 11792, 3, 1, 0, 2223, 0, 0, X86ImpOpBase + 0, 2970, 0, 0xa63ff8023828ULL }, // Inst #11792 = VMOVDQU16Z128rrkz_REV |
| 30309 | { 11791, 3, 1, 0, 2223, 0, 0, X86ImpOpBase + 0, 2970, 0, 0xa637f8023829ULL }, // Inst #11791 = VMOVDQU16Z128rrkz |
| 30310 | { 11790, 3, 1, 0, 2223, 0, 0, X86ImpOpBase + 0, 2970, 0, 0xa23ff8023828ULL }, // Inst #11790 = VMOVDQU16Z128rrk_REV |
| 30311 | { 11789, 4, 1, 0, 2223, 0, 0, X86ImpOpBase + 0, 2966, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8023829ULL }, // Inst #11789 = VMOVDQU16Z128rrk |
| 30312 | { 11788, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa03ff8023828ULL }, // Inst #11788 = VMOVDQU16Z128rr_REV |
| 30313 | { 11787, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa037f8023829ULL }, // Inst #11787 = VMOVDQU16Z128rr |
| 30314 | { 11786, 7, 1, 0, 2218, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0xa637f8023819ULL }, // Inst #11786 = VMOVDQU16Z128rmkz |
| 30315 | { 11785, 8, 1, 0, 2218, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8023819ULL }, // Inst #11785 = VMOVDQU16Z128rmk |
| 30316 | { 11784, 6, 1, 0, 1297, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8023819ULL }, // Inst #11784 = VMOVDQU16Z128rm |
| 30317 | { 11783, 7, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 4704, 0|(1ULL<<MCID::MayStore), 0xa23ff8023818ULL }, // Inst #11783 = VMOVDQU16Z128mrk |
| 30318 | { 11782, 6, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa03ff8023818ULL }, // Inst #11782 = VMOVDQU16Z128mr |
| 30319 | { 11781, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 535, 0, 0x3fb8002828ULL }, // Inst #11781 = VMOVDQArr_REV |
| 30320 | { 11780, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 535, 0, 0x37b8002829ULL }, // Inst #11780 = VMOVDQArr |
| 30321 | { 11779, 6, 1, 0, 186, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x37b8002819ULL }, // Inst #11779 = VMOVDQArm |
| 30322 | { 11778, 6, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x3fb8002818ULL }, // Inst #11778 = VMOVDQAmr |
| 30323 | { 11777, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x13fb8002828ULL }, // Inst #11777 = VMOVDQAYrr_REV |
| 30324 | { 11776, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x137b8002829ULL }, // Inst #11776 = VMOVDQAYrr |
| 30325 | { 11775, 6, 1, 0, 461, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x137b8002819ULL }, // Inst #11775 = VMOVDQAYrm |
| 30326 | { 11774, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 4694, 0|(1ULL<<MCID::MayStore), 0x13fb8002818ULL }, // Inst #11774 = VMOVDQAYmr |
| 30327 | { 11773, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee3ff8022828ULL }, // Inst #11773 = VMOVDQA64Zrrkz_REV |
| 30328 | { 11772, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee37f8022829ULL }, // Inst #11772 = VMOVDQA64Zrrkz |
| 30329 | { 11771, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xea3ff8022828ULL }, // Inst #11771 = VMOVDQA64Zrrk_REV |
| 30330 | { 11770, 4, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2740, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8022829ULL }, // Inst #11770 = VMOVDQA64Zrrk |
| 30331 | { 11769, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe83ff8022828ULL }, // Inst #11769 = VMOVDQA64Zrr_REV |
| 30332 | { 11768, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe837f8022829ULL }, // Inst #11768 = VMOVDQA64Zrr |
| 30333 | { 11767, 7, 1, 0, 1796, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xee37f8022819ULL }, // Inst #11767 = VMOVDQA64Zrmkz |
| 30334 | { 11766, 8, 1, 0, 1796, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8022819ULL }, // Inst #11766 = VMOVDQA64Zrmk |
| 30335 | { 11765, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8022819ULL }, // Inst #11765 = VMOVDQA64Zrm |
| 30336 | { 11764, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0xea3ff8022818ULL }, // Inst #11764 = VMOVDQA64Zmrk |
| 30337 | { 11763, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe83ff8022818ULL }, // Inst #11763 = VMOVDQA64Zmr |
| 30338 | { 11762, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc73ff8022828ULL }, // Inst #11762 = VMOVDQA64Z256rrkz_REV |
| 30339 | { 11761, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc737f8022829ULL }, // Inst #11761 = VMOVDQA64Z256rrkz |
| 30340 | { 11760, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc33ff8022828ULL }, // Inst #11760 = VMOVDQA64Z256rrk_REV |
| 30341 | { 11759, 4, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2718, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8022829ULL }, // Inst #11759 = VMOVDQA64Z256rrk |
| 30342 | { 11758, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc13ff8022828ULL }, // Inst #11758 = VMOVDQA64Z256rr_REV |
| 30343 | { 11757, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc137f8022829ULL }, // Inst #11757 = VMOVDQA64Z256rr |
| 30344 | { 11756, 7, 1, 0, 1928, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xc737f8022819ULL }, // Inst #11756 = VMOVDQA64Z256rmkz |
| 30345 | { 11755, 8, 1, 0, 1928, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8022819ULL }, // Inst #11755 = VMOVDQA64Z256rmk |
| 30346 | { 11754, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8022819ULL }, // Inst #11754 = VMOVDQA64Z256rm |
| 30347 | { 11753, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0xc33ff8022818ULL }, // Inst #11753 = VMOVDQA64Z256mrk |
| 30348 | { 11752, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc13ff8022818ULL }, // Inst #11752 = VMOVDQA64Z256mr |
| 30349 | { 11751, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa63ff8022828ULL }, // Inst #11751 = VMOVDQA64Z128rrkz_REV |
| 30350 | { 11750, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa637f8022829ULL }, // Inst #11750 = VMOVDQA64Z128rrkz |
| 30351 | { 11749, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa23ff8022828ULL }, // Inst #11749 = VMOVDQA64Z128rrk_REV |
| 30352 | { 11748, 4, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2702, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8022829ULL }, // Inst #11748 = VMOVDQA64Z128rrk |
| 30353 | { 11747, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa03ff8022828ULL }, // Inst #11747 = VMOVDQA64Z128rr_REV |
| 30354 | { 11746, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa037f8022829ULL }, // Inst #11746 = VMOVDQA64Z128rr |
| 30355 | { 11745, 7, 1, 0, 1829, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0xa637f8022819ULL }, // Inst #11745 = VMOVDQA64Z128rmkz |
| 30356 | { 11744, 8, 1, 0, 1829, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8022819ULL }, // Inst #11744 = VMOVDQA64Z128rmk |
| 30357 | { 11743, 6, 1, 0, 1297, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8022819ULL }, // Inst #11743 = VMOVDQA64Z128rm |
| 30358 | { 11742, 7, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0xa23ff8022818ULL }, // Inst #11742 = VMOVDQA64Z128mrk |
| 30359 | { 11741, 6, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa03ff8022818ULL }, // Inst #11741 = VMOVDQA64Z128mr |
| 30360 | { 11740, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee3ff8002828ULL }, // Inst #11740 = VMOVDQA32Zrrkz_REV |
| 30361 | { 11739, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee37f8002829ULL }, // Inst #11739 = VMOVDQA32Zrrkz |
| 30362 | { 11738, 3, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xea3ff8002828ULL }, // Inst #11738 = VMOVDQA32Zrrk_REV |
| 30363 | { 11737, 4, 1, 0, 478, 0, 0, X86ImpOpBase + 0, 2775, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8002829ULL }, // Inst #11737 = VMOVDQA32Zrrk |
| 30364 | { 11736, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe83ff8002828ULL }, // Inst #11736 = VMOVDQA32Zrr_REV |
| 30365 | { 11735, 2, 1, 0, 1654, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe837f8002829ULL }, // Inst #11735 = VMOVDQA32Zrr |
| 30366 | { 11734, 7, 1, 0, 1796, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xee37f8002819ULL }, // Inst #11734 = VMOVDQA32Zrmkz |
| 30367 | { 11733, 8, 1, 0, 1796, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea37f8002819ULL }, // Inst #11733 = VMOVDQA32Zrmk |
| 30368 | { 11732, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe837f8002819ULL }, // Inst #11732 = VMOVDQA32Zrm |
| 30369 | { 11731, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0xea3ff8002818ULL }, // Inst #11731 = VMOVDQA32Zmrk |
| 30370 | { 11730, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe83ff8002818ULL }, // Inst #11730 = VMOVDQA32Zmr |
| 30371 | { 11729, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc73ff8002828ULL }, // Inst #11729 = VMOVDQA32Z256rrkz_REV |
| 30372 | { 11728, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc737f8002829ULL }, // Inst #11728 = VMOVDQA32Z256rrkz |
| 30373 | { 11727, 3, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc33ff8002828ULL }, // Inst #11727 = VMOVDQA32Z256rrk_REV |
| 30374 | { 11726, 4, 1, 0, 477, 0, 0, X86ImpOpBase + 0, 2761, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8002829ULL }, // Inst #11726 = VMOVDQA32Z256rrk |
| 30375 | { 11725, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc13ff8002828ULL }, // Inst #11725 = VMOVDQA32Z256rr_REV |
| 30376 | { 11724, 2, 1, 0, 1653, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc137f8002829ULL }, // Inst #11724 = VMOVDQA32Z256rr |
| 30377 | { 11723, 7, 1, 0, 1928, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xc737f8002819ULL }, // Inst #11723 = VMOVDQA32Z256rmkz |
| 30378 | { 11722, 8, 1, 0, 1928, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc337f8002819ULL }, // Inst #11722 = VMOVDQA32Z256rmk |
| 30379 | { 11721, 6, 1, 0, 1322, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc137f8002819ULL }, // Inst #11721 = VMOVDQA32Z256rm |
| 30380 | { 11720, 7, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0xc33ff8002818ULL }, // Inst #11720 = VMOVDQA32Z256mrk |
| 30381 | { 11719, 6, 0, 0, 476, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc13ff8002818ULL }, // Inst #11719 = VMOVDQA32Z256mr |
| 30382 | { 11718, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa63ff8002828ULL }, // Inst #11718 = VMOVDQA32Z128rrkz_REV |
| 30383 | { 11717, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa637f8002829ULL }, // Inst #11717 = VMOVDQA32Z128rrkz |
| 30384 | { 11716, 3, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa23ff8002828ULL }, // Inst #11716 = VMOVDQA32Z128rrk_REV |
| 30385 | { 11715, 4, 1, 0, 1812, 0, 0, X86ImpOpBase + 0, 2336, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8002829ULL }, // Inst #11715 = VMOVDQA32Z128rrk |
| 30386 | { 11714, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa03ff8002828ULL }, // Inst #11714 = VMOVDQA32Z128rr_REV |
| 30387 | { 11713, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa037f8002829ULL }, // Inst #11713 = VMOVDQA32Z128rr |
| 30388 | { 11712, 7, 1, 0, 1829, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa637f8002819ULL }, // Inst #11712 = VMOVDQA32Z128rmkz |
| 30389 | { 11711, 8, 1, 0, 1829, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa237f8002819ULL }, // Inst #11711 = VMOVDQA32Z128rmk |
| 30390 | { 11710, 6, 1, 0, 1297, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa037f8002819ULL }, // Inst #11710 = VMOVDQA32Z128rm |
| 30391 | { 11709, 7, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0xa23ff8002818ULL }, // Inst #11709 = VMOVDQA32Z128mrk |
| 30392 | { 11708, 6, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa03ff8002818ULL }, // Inst #11708 = VMOVDQA32Z128mr |
| 30393 | { 11707, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 1012, 0|(1ULL<<MCID::Bitcast), 0x3738002829ULL }, // Inst #11707 = VMOVDI2SSrr |
| 30394 | { 11706, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 4702, 0|(1ULL<<MCID::Bitcast), 0xa03778002829ULL }, // Inst #11706 = VMOVDI2SSZrr |
| 30395 | { 11705, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 1368, 0, 0x3738002829ULL }, // Inst #11705 = VMOVDI2PDIrr |
| 30396 | { 11704, 6, 1, 0, 771, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x3738002819ULL }, // Inst #11704 = VMOVDI2PDIrm |
| 30397 | { 11703, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 4700, 0, 0xa03778002829ULL }, // Inst #11703 = VMOVDI2PDIZrr |
| 30398 | { 11702, 6, 1, 0, 1278, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x603778002819ULL }, // Inst #11702 = VMOVDI2PDIZrm |
| 30399 | { 11701, 2, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 535, 0, 0x930003829ULL }, // Inst #11701 = VMOVDDUPrr |
| 30400 | { 11700, 6, 1, 0, 772, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x930003819ULL }, // Inst #11700 = VMOVDDUPrm |
| 30401 | { 11699, 3, 1, 0, 1125, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee0970023829ULL }, // Inst #11699 = VMOVDDUPZrrkz |
| 30402 | { 11698, 4, 1, 0, 1125, 0, 0, X86ImpOpBase + 0, 2740, 0, 0xea0970023829ULL }, // Inst #11698 = VMOVDDUPZrrk |
| 30403 | { 11697, 2, 1, 0, 1125, 0, 0, X86ImpOpBase + 0, 2738, 0, 0xe80970023829ULL }, // Inst #11697 = VMOVDDUPZrr |
| 30404 | { 11696, 7, 1, 0, 1321, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xee0970023819ULL }, // Inst #11696 = VMOVDDUPZrmkz |
| 30405 | { 11695, 8, 1, 0, 1321, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xea0970023819ULL }, // Inst #11695 = VMOVDDUPZrmk |
| 30406 | { 11694, 6, 1, 0, 1787, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xe80970023819ULL }, // Inst #11694 = VMOVDDUPZrm |
| 30407 | { 11693, 3, 1, 0, 1124, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc70970023829ULL }, // Inst #11693 = VMOVDDUPZ256rrkz |
| 30408 | { 11692, 4, 1, 0, 1124, 0, 0, X86ImpOpBase + 0, 2718, 0, 0xc30970023829ULL }, // Inst #11692 = VMOVDDUPZ256rrk |
| 30409 | { 11691, 2, 1, 0, 1124, 0, 0, X86ImpOpBase + 0, 2716, 0, 0xc10970023829ULL }, // Inst #11691 = VMOVDDUPZ256rr |
| 30410 | { 11690, 7, 1, 0, 1320, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xc70970023819ULL }, // Inst #11690 = VMOVDDUPZ256rmkz |
| 30411 | { 11689, 8, 1, 0, 1320, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xc30970023819ULL }, // Inst #11689 = VMOVDDUPZ256rmk |
| 30412 | { 11688, 6, 1, 0, 1788, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xc10970023819ULL }, // Inst #11688 = VMOVDDUPZ256rm |
| 30413 | { 11687, 3, 1, 0, 1123, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa60970023829ULL }, // Inst #11687 = VMOVDDUPZ128rrkz |
| 30414 | { 11686, 4, 1, 0, 1123, 0, 0, X86ImpOpBase + 0, 2702, 0, 0xa20970023829ULL }, // Inst #11686 = VMOVDDUPZ128rrk |
| 30415 | { 11685, 2, 1, 0, 1123, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa00970023829ULL }, // Inst #11685 = VMOVDDUPZ128rr |
| 30416 | { 11684, 7, 1, 0, 1296, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x860970023819ULL }, // Inst #11684 = VMOVDDUPZ128rmkz |
| 30417 | { 11683, 8, 1, 0, 1296, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x820970023819ULL }, // Inst #11683 = VMOVDDUPZ128rmk |
| 30418 | { 11682, 6, 1, 0, 1755, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x800970023819ULL }, // Inst #11682 = VMOVDDUPZ128rm |
| 30419 | { 11681, 2, 1, 0, 1415, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x10930003829ULL }, // Inst #11681 = VMOVDDUPYrr |
| 30420 | { 11680, 6, 1, 0, 779, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x10930003819ULL }, // Inst #11680 = VMOVDDUPYrm |
| 30421 | { 11679, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x14a8002028ULL }, // Inst #11679 = VMOVAPSrr_REV |
| 30422 | { 11678, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x1428002029ULL }, // Inst #11678 = VMOVAPSrr |
| 30423 | { 11677, 6, 1, 0, 14, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1428002019ULL }, // Inst #11677 = VMOVAPSrm |
| 30424 | { 11676, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x14a8002018ULL }, // Inst #11676 = VMOVAPSmr |
| 30425 | { 11675, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee14e8002028ULL }, // Inst #11675 = VMOVAPSZrrkz_REV |
| 30426 | { 11674, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee1468002029ULL }, // Inst #11674 = VMOVAPSZrrkz |
| 30427 | { 11673, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xea14e8002028ULL }, // Inst #11673 = VMOVAPSZrrk_REV |
| 30428 | { 11672, 4, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2775, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea1468002029ULL }, // Inst #11672 = VMOVAPSZrrk |
| 30429 | { 11671, 2, 1, 0, 1652, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe814e8002028ULL }, // Inst #11671 = VMOVAPSZrr_REV |
| 30430 | { 11670, 2, 1, 0, 1652, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe81468002029ULL }, // Inst #11670 = VMOVAPSZrr |
| 30431 | { 11669, 7, 1, 0, 1795, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xee1468002019ULL }, // Inst #11669 = VMOVAPSZrmkz |
| 30432 | { 11668, 8, 1, 0, 1795, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea1468002019ULL }, // Inst #11668 = VMOVAPSZrmk |
| 30433 | { 11667, 6, 1, 0, 1319, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe81468002019ULL }, // Inst #11667 = VMOVAPSZrm |
| 30434 | { 11666, 7, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0xea14e8002018ULL }, // Inst #11666 = VMOVAPSZmrk |
| 30435 | { 11665, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe814e8002018ULL }, // Inst #11665 = VMOVAPSZmr |
| 30436 | { 11664, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc714e8002028ULL }, // Inst #11664 = VMOVAPSZ256rrkz_REV |
| 30437 | { 11663, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc71468002029ULL }, // Inst #11663 = VMOVAPSZ256rrkz |
| 30438 | { 11662, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc314e8002028ULL }, // Inst #11662 = VMOVAPSZ256rrk_REV |
| 30439 | { 11661, 4, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2761, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc31468002029ULL }, // Inst #11661 = VMOVAPSZ256rrk |
| 30440 | { 11660, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc114e8002028ULL }, // Inst #11660 = VMOVAPSZ256rr_REV |
| 30441 | { 11659, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc11468002029ULL }, // Inst #11659 = VMOVAPSZ256rr |
| 30442 | { 11658, 7, 1, 0, 1927, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xc71468002019ULL }, // Inst #11658 = VMOVAPSZ256rmkz |
| 30443 | { 11657, 8, 1, 0, 1927, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc31468002019ULL }, // Inst #11657 = VMOVAPSZ256rmk |
| 30444 | { 11656, 6, 1, 0, 1319, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc11468002019ULL }, // Inst #11656 = VMOVAPSZ256rm |
| 30445 | { 11655, 7, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0xc314e8002018ULL }, // Inst #11655 = VMOVAPSZ256mrk |
| 30446 | { 11654, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc114e8002018ULL }, // Inst #11654 = VMOVAPSZ256mr |
| 30447 | { 11653, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa614e8002028ULL }, // Inst #11653 = VMOVAPSZ128rrkz_REV |
| 30448 | { 11652, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa61468002029ULL }, // Inst #11652 = VMOVAPSZ128rrkz |
| 30449 | { 11651, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa214e8002028ULL }, // Inst #11651 = VMOVAPSZ128rrk_REV |
| 30450 | { 11650, 4, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2336, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa21468002029ULL }, // Inst #11650 = VMOVAPSZ128rrk |
| 30451 | { 11649, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa014e8002028ULL }, // Inst #11649 = VMOVAPSZ128rr_REV |
| 30452 | { 11648, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa01468002029ULL }, // Inst #11648 = VMOVAPSZ128rr |
| 30453 | { 11647, 7, 1, 0, 1828, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa61468002019ULL }, // Inst #11647 = VMOVAPSZ128rmkz |
| 30454 | { 11646, 8, 1, 0, 1828, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa21468002019ULL }, // Inst #11646 = VMOVAPSZ128rmk |
| 30455 | { 11645, 6, 1, 0, 1295, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa01468002019ULL }, // Inst #11645 = VMOVAPSZ128rm |
| 30456 | { 11644, 7, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0xa214e8002018ULL }, // Inst #11644 = VMOVAPSZ128mrk |
| 30457 | { 11643, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa014e8002018ULL }, // Inst #11643 = VMOVAPSZ128mr |
| 30458 | { 11642, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2866, 0|(1ULL<<MCID::MoveReg), 0x114a8002028ULL }, // Inst #11642 = VMOVAPSYrr_REV |
| 30459 | { 11641, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2866, 0|(1ULL<<MCID::MoveReg), 0x11428002029ULL }, // Inst #11641 = VMOVAPSYrr |
| 30460 | { 11640, 6, 1, 0, 16, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x11428002019ULL }, // Inst #11640 = VMOVAPSYrm |
| 30461 | { 11639, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 4694, 0|(1ULL<<MCID::MayStore), 0x114a8002018ULL }, // Inst #11639 = VMOVAPSYmr |
| 30462 | { 11638, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x14b0002828ULL }, // Inst #11638 = VMOVAPDrr_REV |
| 30463 | { 11637, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x1430002829ULL }, // Inst #11637 = VMOVAPDrr |
| 30464 | { 11636, 6, 1, 0, 14, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1430002819ULL }, // Inst #11636 = VMOVAPDrm |
| 30465 | { 11635, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x14b0002818ULL }, // Inst #11635 = VMOVAPDmr |
| 30466 | { 11634, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee14f0022828ULL }, // Inst #11634 = VMOVAPDZrrkz_REV |
| 30467 | { 11633, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee1470022829ULL }, // Inst #11633 = VMOVAPDZrrkz |
| 30468 | { 11632, 3, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xea14f0022828ULL }, // Inst #11632 = VMOVAPDZrrk_REV |
| 30469 | { 11631, 4, 1, 0, 471, 0, 0, X86ImpOpBase + 0, 2740, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xea1470022829ULL }, // Inst #11631 = VMOVAPDZrrk |
| 30470 | { 11630, 2, 1, 0, 1652, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe814f0022828ULL }, // Inst #11630 = VMOVAPDZrr_REV |
| 30471 | { 11629, 2, 1, 0, 1652, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::MoveReg), 0xe81470022829ULL }, // Inst #11629 = VMOVAPDZrr |
| 30472 | { 11628, 7, 1, 0, 1795, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xee1470022819ULL }, // Inst #11628 = VMOVAPDZrmkz |
| 30473 | { 11627, 8, 1, 0, 1795, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xea1470022819ULL }, // Inst #11627 = VMOVAPDZrmk |
| 30474 | { 11626, 6, 1, 0, 1319, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xe81470022819ULL }, // Inst #11626 = VMOVAPDZrm |
| 30475 | { 11625, 7, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0xea14f0022818ULL }, // Inst #11625 = VMOVAPDZmrk |
| 30476 | { 11624, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0xe814f0022818ULL }, // Inst #11624 = VMOVAPDZmr |
| 30477 | { 11623, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc714f0022828ULL }, // Inst #11623 = VMOVAPDZ256rrkz_REV |
| 30478 | { 11622, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc71470022829ULL }, // Inst #11622 = VMOVAPDZ256rrkz |
| 30479 | { 11621, 3, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc314f0022828ULL }, // Inst #11621 = VMOVAPDZ256rrk_REV |
| 30480 | { 11620, 4, 1, 0, 1811, 0, 0, X86ImpOpBase + 0, 2718, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc31470022829ULL }, // Inst #11620 = VMOVAPDZ256rrk |
| 30481 | { 11619, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc114f0022828ULL }, // Inst #11619 = VMOVAPDZ256rr_REV |
| 30482 | { 11618, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::MoveReg), 0xc11470022829ULL }, // Inst #11618 = VMOVAPDZ256rr |
| 30483 | { 11617, 7, 1, 0, 1927, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xc71470022819ULL }, // Inst #11617 = VMOVAPDZ256rmkz |
| 30484 | { 11616, 8, 1, 0, 1927, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc31470022819ULL }, // Inst #11616 = VMOVAPDZ256rmk |
| 30485 | { 11615, 6, 1, 0, 1319, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc11470022819ULL }, // Inst #11615 = VMOVAPDZ256rm |
| 30486 | { 11614, 7, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0xc314f0022818ULL }, // Inst #11614 = VMOVAPDZ256mrk |
| 30487 | { 11613, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0xc114f0022818ULL }, // Inst #11613 = VMOVAPDZ256mr |
| 30488 | { 11612, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa614f0022828ULL }, // Inst #11612 = VMOVAPDZ128rrkz_REV |
| 30489 | { 11611, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa61470022829ULL }, // Inst #11611 = VMOVAPDZ128rrkz |
| 30490 | { 11610, 3, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa214f0022828ULL }, // Inst #11610 = VMOVAPDZ128rrk_REV |
| 30491 | { 11609, 4, 1, 0, 1810, 0, 0, X86ImpOpBase + 0, 2702, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xa21470022829ULL }, // Inst #11609 = VMOVAPDZ128rrk |
| 30492 | { 11608, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa014f0022828ULL }, // Inst #11608 = VMOVAPDZ128rr_REV |
| 30493 | { 11607, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::MoveReg), 0xa01470022829ULL }, // Inst #11607 = VMOVAPDZ128rr |
| 30494 | { 11606, 7, 1, 0, 1828, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0xa61470022819ULL }, // Inst #11606 = VMOVAPDZ128rmkz |
| 30495 | { 11605, 8, 1, 0, 1828, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0xa21470022819ULL }, // Inst #11605 = VMOVAPDZ128rmk |
| 30496 | { 11604, 6, 1, 0, 1295, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xa01470022819ULL }, // Inst #11604 = VMOVAPDZ128rm |
| 30497 | { 11603, 7, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0xa214f0022818ULL }, // Inst #11603 = VMOVAPDZ128mrk |
| 30498 | { 11602, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0xa014f0022818ULL }, // Inst #11602 = VMOVAPDZ128mr |
| 30499 | { 11601, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2866, 0|(1ULL<<MCID::MoveReg), 0x114b0002828ULL }, // Inst #11601 = VMOVAPDYrr_REV |
| 30500 | { 11600, 2, 1, 0, 470, 0, 0, X86ImpOpBase + 0, 2866, 0|(1ULL<<MCID::MoveReg), 0x11430002829ULL }, // Inst #11600 = VMOVAPDYrr |
| 30501 | { 11599, 6, 1, 0, 16, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x11430002819ULL }, // Inst #11599 = VMOVAPDYrm |
| 30502 | { 11598, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 4694, 0|(1ULL<<MCID::MayStore), 0x114b0002818ULL }, // Inst #11598 = VMOVAPDYmr |
| 30503 | { 11597, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 1014, 0|(1ULL<<MCID::Bitcast), 0x3738022829ULL }, // Inst #11597 = VMOV64toSDrr |
| 30504 | { 11596, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 4692, 0|(1ULL<<MCID::Bitcast), 0xa03778022829ULL }, // Inst #11596 = VMOV64toSDZrr |
| 30505 | { 11595, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 1346, 0, 0x3738022829ULL }, // Inst #11595 = VMOV64toPQIrr |
| 30506 | { 11594, 6, 1, 0, 771, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x3738022819ULL }, // Inst #11594 = VMOV64toPQIrm |
| 30507 | { 11593, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 4690, 0, 0xa03778022829ULL }, // Inst #11593 = VMOV64toPQIZrr |
| 30508 | { 11592, 6, 1, 0, 1277, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x803778022819ULL }, // Inst #11592 = VMOV64toPQIZrm |
| 30509 | { 11591, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002059ULL }, // Inst #11591 = VMMCALL |
| 30510 | { 11590, 0, 0, 0, 8, 1, 0, X86ImpOpBase + 123, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205aULL }, // Inst #11590 = VMLOAD64 |
| 30511 | { 11589, 0, 0, 0, 8, 1, 0, X86ImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205aULL }, // Inst #11589 = VMLOAD32 |
| 30512 | { 11588, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002042ULL }, // Inst #11588 = VMLAUNCH |
| 30513 | { 11587, 3, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xaea8003029ULL }, // Inst #11587 = VMINSSrr_Int |
| 30514 | { 11586, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1982, 0|(1ULL<<MCID::MayRaiseFPException), 0xaea8003029ULL }, // Inst #11586 = VMINSSrr |
| 30515 | { 11585, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaea8003019ULL }, // Inst #11585 = VMINSSrm_Int |
| 30516 | { 11584, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaea8003019ULL }, // Inst #11584 = VMINSSrm |
| 30517 | { 11583, 4, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x76aee8003029ULL }, // Inst #11583 = VMINSSZrrb_Intkz |
| 30518 | { 11582, 5, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x72aee8003029ULL }, // Inst #11582 = VMINSSZrrb_Intk |
| 30519 | { 11581, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x70aee8003029ULL }, // Inst #11581 = VMINSSZrrb_Int |
| 30520 | { 11580, 4, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66aee8003029ULL }, // Inst #11580 = VMINSSZrr_Intkz |
| 30521 | { 11579, 5, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62aee8003029ULL }, // Inst #11579 = VMINSSZrr_Intk |
| 30522 | { 11578, 3, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60aee8003029ULL }, // Inst #11578 = VMINSSZrr_Int |
| 30523 | { 11577, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1972, 0|(1ULL<<MCID::MayRaiseFPException), 0x60aee8003029ULL }, // Inst #11577 = VMINSSZrr |
| 30524 | { 11576, 8, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66aee8003019ULL }, // Inst #11576 = VMINSSZrm_Intkz |
| 30525 | { 11575, 9, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62aee8003019ULL }, // Inst #11575 = VMINSSZrm_Intk |
| 30526 | { 11574, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60aee8003019ULL }, // Inst #11574 = VMINSSZrm_Int |
| 30527 | { 11573, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60aee8003019ULL }, // Inst #11573 = VMINSSZrm |
| 30528 | { 11572, 4, 1, 0, 1878, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x56aee8013029ULL }, // Inst #11572 = VMINSHZrrb_Intkz |
| 30529 | { 11571, 5, 1, 0, 1878, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x52aee8013029ULL }, // Inst #11571 = VMINSHZrrb_Intk |
| 30530 | { 11570, 3, 1, 0, 1749, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x50aee8013029ULL }, // Inst #11570 = VMINSHZrrb_Int |
| 30531 | { 11569, 4, 1, 0, 1878, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x46aee8013029ULL }, // Inst #11569 = VMINSHZrr_Intkz |
| 30532 | { 11568, 5, 1, 0, 1878, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x42aee8013029ULL }, // Inst #11568 = VMINSHZrr_Intk |
| 30533 | { 11567, 3, 1, 0, 1749, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x40aee8013029ULL }, // Inst #11567 = VMINSHZrr_Int |
| 30534 | { 11566, 3, 1, 0, 1749, 1, 0, X86ImpOpBase + 78, 1962, 0|(1ULL<<MCID::MayRaiseFPException), 0x40aee8013029ULL }, // Inst #11566 = VMINSHZrr |
| 30535 | { 11565, 8, 1, 0, 1727, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46aee8013019ULL }, // Inst #11565 = VMINSHZrm_Intkz |
| 30536 | { 11564, 9, 1, 0, 1727, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42aee8013019ULL }, // Inst #11564 = VMINSHZrm_Intk |
| 30537 | { 11563, 7, 1, 0, 1727, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40aee8013019ULL }, // Inst #11563 = VMINSHZrm_Int |
| 30538 | { 11562, 7, 1, 0, 1727, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40aee8013019ULL }, // Inst #11562 = VMINSHZrm |
| 30539 | { 11561, 3, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xaeb0003829ULL }, // Inst #11561 = VMINSDrr_Int |
| 30540 | { 11560, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1952, 0|(1ULL<<MCID::MayRaiseFPException), 0xaeb0003829ULL }, // Inst #11560 = VMINSDrr |
| 30541 | { 11559, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb0003819ULL }, // Inst #11559 = VMINSDrm_Int |
| 30542 | { 11558, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb0003819ULL }, // Inst #11558 = VMINSDrm |
| 30543 | { 11557, 4, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x96aef0023829ULL }, // Inst #11557 = VMINSDZrrb_Intkz |
| 30544 | { 11556, 5, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x92aef0023829ULL }, // Inst #11556 = VMINSDZrrb_Intk |
| 30545 | { 11555, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x90aef0023829ULL }, // Inst #11555 = VMINSDZrrb_Int |
| 30546 | { 11554, 4, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86aef0023829ULL }, // Inst #11554 = VMINSDZrr_Intkz |
| 30547 | { 11553, 5, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82aef0023829ULL }, // Inst #11553 = VMINSDZrr_Intk |
| 30548 | { 11552, 3, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80aef0023829ULL }, // Inst #11552 = VMINSDZrr_Int |
| 30549 | { 11551, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1918, 0|(1ULL<<MCID::MayRaiseFPException), 0x80aef0023829ULL }, // Inst #11551 = VMINSDZrr |
| 30550 | { 11550, 8, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86aef0023819ULL }, // Inst #11550 = VMINSDZrm_Intkz |
| 30551 | { 11549, 9, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82aef0023819ULL }, // Inst #11549 = VMINSDZrm_Intk |
| 30552 | { 11548, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aef0023819ULL }, // Inst #11548 = VMINSDZrm_Int |
| 30553 | { 11547, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aef0023819ULL }, // Inst #11547 = VMINSDZrm |
| 30554 | { 11546, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xaea8002029ULL }, // Inst #11546 = VMINPSrr |
| 30555 | { 11545, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaea8002019ULL }, // Inst #11545 = VMINPSrm |
| 30556 | { 11544, 4, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1899, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8002029ULL }, // Inst #11544 = VMINPSZrrkz |
| 30557 | { 11543, 5, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8002029ULL }, // Inst #11543 = VMINPSZrrk |
| 30558 | { 11542, 4, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1899, 0, 0x7eaee8002029ULL }, // Inst #11542 = VMINPSZrrbkz |
| 30559 | { 11541, 5, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1894, 0, 0x7aaee8002029ULL }, // Inst #11541 = VMINPSZrrbk |
| 30560 | { 11540, 3, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1697, 0, 0x78aee8002029ULL }, // Inst #11540 = VMINPSZrrb |
| 30561 | { 11539, 3, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8002029ULL }, // Inst #11539 = VMINPSZrr |
| 30562 | { 11538, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8002019ULL }, // Inst #11538 = VMINPSZrmkz |
| 30563 | { 11537, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8002019ULL }, // Inst #11537 = VMINPSZrmk |
| 30564 | { 11536, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eaee8002019ULL }, // Inst #11536 = VMINPSZrmbkz |
| 30565 | { 11535, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aaee8002019ULL }, // Inst #11535 = VMINPSZrmbk |
| 30566 | { 11534, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78aee8002019ULL }, // Inst #11534 = VMINPSZrmb |
| 30567 | { 11533, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8002019ULL }, // Inst #11533 = VMINPSZrm |
| 30568 | { 11532, 4, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1871, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8002029ULL }, // Inst #11532 = VMINPSZ256rrkz |
| 30569 | { 11531, 5, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8002029ULL }, // Inst #11531 = VMINPSZ256rrk |
| 30570 | { 11530, 3, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8002029ULL }, // Inst #11530 = VMINPSZ256rr |
| 30571 | { 11529, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8002019ULL }, // Inst #11529 = VMINPSZ256rmkz |
| 30572 | { 11528, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8002019ULL }, // Inst #11528 = VMINPSZ256rmk |
| 30573 | { 11527, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77aee8002019ULL }, // Inst #11527 = VMINPSZ256rmbkz |
| 30574 | { 11526, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73aee8002019ULL }, // Inst #11526 = VMINPSZ256rmbk |
| 30575 | { 11525, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71aee8002019ULL }, // Inst #11525 = VMINPSZ256rmb |
| 30576 | { 11524, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8002019ULL }, // Inst #11524 = VMINPSZ256rm |
| 30577 | { 11523, 4, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1845, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8002029ULL }, // Inst #11523 = VMINPSZ128rrkz |
| 30578 | { 11522, 5, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8002029ULL }, // Inst #11522 = VMINPSZ128rrk |
| 30579 | { 11521, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8002029ULL }, // Inst #11521 = VMINPSZ128rr |
| 30580 | { 11520, 8, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8002019ULL }, // Inst #11520 = VMINPSZ128rmkz |
| 30581 | { 11519, 9, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8002019ULL }, // Inst #11519 = VMINPSZ128rmk |
| 30582 | { 11518, 8, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76aee8002019ULL }, // Inst #11518 = VMINPSZ128rmbkz |
| 30583 | { 11517, 9, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72aee8002019ULL }, // Inst #11517 = VMINPSZ128rmbk |
| 30584 | { 11516, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70aee8002019ULL }, // Inst #11516 = VMINPSZ128rmb |
| 30585 | { 11515, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8002019ULL }, // Inst #11515 = VMINPSZ128rm |
| 30586 | { 11514, 3, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1aea8002029ULL }, // Inst #11514 = VMINPSYrr |
| 30587 | { 11513, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aea8002019ULL }, // Inst #11513 = VMINPSYrm |
| 30588 | { 11512, 4, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1819, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8012029ULL }, // Inst #11512 = VMINPHZrrkz |
| 30589 | { 11511, 5, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8012029ULL }, // Inst #11511 = VMINPHZrrk |
| 30590 | { 11510, 4, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1819, 0, 0x5eaee8012029ULL }, // Inst #11510 = VMINPHZrrbkz |
| 30591 | { 11509, 5, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1814, 0, 0x5aaee8012029ULL }, // Inst #11509 = VMINPHZrrbk |
| 30592 | { 11508, 3, 1, 0, 1885, 1, 0, X86ImpOpBase + 78, 1697, 0, 0x58aee8012029ULL }, // Inst #11508 = VMINPHZrrb |
| 30593 | { 11507, 3, 1, 0, 1885, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8012029ULL }, // Inst #11507 = VMINPHZrr |
| 30594 | { 11506, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8012019ULL }, // Inst #11506 = VMINPHZrmkz |
| 30595 | { 11505, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8012019ULL }, // Inst #11505 = VMINPHZrmk |
| 30596 | { 11504, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eaee8012019ULL }, // Inst #11504 = VMINPHZrmbkz |
| 30597 | { 11503, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aaee8012019ULL }, // Inst #11503 = VMINPHZrmbk |
| 30598 | { 11502, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58aee8012019ULL }, // Inst #11502 = VMINPHZrmb |
| 30599 | { 11501, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8012019ULL }, // Inst #11501 = VMINPHZrm |
| 30600 | { 11500, 4, 1, 0, 1875, 1, 0, X86ImpOpBase + 78, 1782, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8012029ULL }, // Inst #11500 = VMINPHZ256rrkz |
| 30601 | { 11499, 5, 1, 0, 1875, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8012029ULL }, // Inst #11499 = VMINPHZ256rrk |
| 30602 | { 11498, 3, 1, 0, 1748, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8012029ULL }, // Inst #11498 = VMINPHZ256rr |
| 30603 | { 11497, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8012019ULL }, // Inst #11497 = VMINPHZ256rmkz |
| 30604 | { 11496, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8012019ULL }, // Inst #11496 = VMINPHZ256rmk |
| 30605 | { 11495, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57aee8012019ULL }, // Inst #11495 = VMINPHZ256rmbkz |
| 30606 | { 11494, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53aee8012019ULL }, // Inst #11494 = VMINPHZ256rmbk |
| 30607 | { 11493, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51aee8012019ULL }, // Inst #11493 = VMINPHZ256rmb |
| 30608 | { 11492, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8012019ULL }, // Inst #11492 = VMINPHZ256rm |
| 30609 | { 11491, 4, 1, 0, 1874, 1, 0, X86ImpOpBase + 78, 1756, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8012029ULL }, // Inst #11491 = VMINPHZ128rrkz |
| 30610 | { 11490, 5, 1, 0, 1874, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8012029ULL }, // Inst #11490 = VMINPHZ128rrk |
| 30611 | { 11489, 3, 1, 0, 1747, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8012029ULL }, // Inst #11489 = VMINPHZ128rr |
| 30612 | { 11488, 8, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8012019ULL }, // Inst #11488 = VMINPHZ128rmkz |
| 30613 | { 11487, 9, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8012019ULL }, // Inst #11487 = VMINPHZ128rmk |
| 30614 | { 11486, 8, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56aee8012019ULL }, // Inst #11486 = VMINPHZ128rmbkz |
| 30615 | { 11485, 9, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52aee8012019ULL }, // Inst #11485 = VMINPHZ128rmbk |
| 30616 | { 11484, 7, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50aee8012019ULL }, // Inst #11484 = VMINPHZ128rmb |
| 30617 | { 11483, 7, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8012019ULL }, // Inst #11483 = VMINPHZ128rm |
| 30618 | { 11482, 3, 1, 0, 77, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xaeb0002829ULL }, // Inst #11482 = VMINPDrr |
| 30619 | { 11481, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb0002819ULL }, // Inst #11481 = VMINPDrm |
| 30620 | { 11480, 4, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1720, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaef0022829ULL }, // Inst #11480 = VMINPDZrrkz |
| 30621 | { 11479, 5, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaef0022829ULL }, // Inst #11479 = VMINPDZrrk |
| 30622 | { 11478, 4, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1720, 0, 0x9eaef0022829ULL }, // Inst #11478 = VMINPDZrrbkz |
| 30623 | { 11477, 5, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1715, 0, 0x9aaef0022829ULL }, // Inst #11477 = VMINPDZrrbk |
| 30624 | { 11476, 3, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1697, 0, 0x98aef0022829ULL }, // Inst #11476 = VMINPDZrrb |
| 30625 | { 11475, 3, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aef0022829ULL }, // Inst #11475 = VMINPDZrr |
| 30626 | { 11474, 8, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaef0022819ULL }, // Inst #11474 = VMINPDZrmkz |
| 30627 | { 11473, 9, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaef0022819ULL }, // Inst #11473 = VMINPDZrmk |
| 30628 | { 11472, 8, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaef0022819ULL }, // Inst #11472 = VMINPDZrmbkz |
| 30629 | { 11471, 9, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaef0022819ULL }, // Inst #11471 = VMINPDZrmbk |
| 30630 | { 11470, 7, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98aef0022819ULL }, // Inst #11470 = VMINPDZrmb |
| 30631 | { 11469, 7, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aef0022819ULL }, // Inst #11469 = VMINPDZrm |
| 30632 | { 11468, 4, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1669, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aef0022829ULL }, // Inst #11468 = VMINPDZ256rrkz |
| 30633 | { 11467, 5, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aef0022829ULL }, // Inst #11467 = VMINPDZ256rrk |
| 30634 | { 11466, 3, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aef0022829ULL }, // Inst #11466 = VMINPDZ256rr |
| 30635 | { 11465, 8, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aef0022819ULL }, // Inst #11465 = VMINPDZ256rmkz |
| 30636 | { 11464, 9, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aef0022819ULL }, // Inst #11464 = VMINPDZ256rmk |
| 30637 | { 11463, 8, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97aef0022819ULL }, // Inst #11463 = VMINPDZ256rmbkz |
| 30638 | { 11462, 9, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93aef0022819ULL }, // Inst #11462 = VMINPDZ256rmbk |
| 30639 | { 11461, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91aef0022819ULL }, // Inst #11461 = VMINPDZ256rmb |
| 30640 | { 11460, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aef0022819ULL }, // Inst #11460 = VMINPDZ256rm |
| 30641 | { 11459, 4, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1633, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aef0022829ULL }, // Inst #11459 = VMINPDZ128rrkz |
| 30642 | { 11458, 5, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aef0022829ULL }, // Inst #11458 = VMINPDZ128rrk |
| 30643 | { 11457, 3, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aef0022829ULL }, // Inst #11457 = VMINPDZ128rr |
| 30644 | { 11456, 8, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aef0022819ULL }, // Inst #11456 = VMINPDZ128rmkz |
| 30645 | { 11455, 9, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aef0022819ULL }, // Inst #11455 = VMINPDZ128rmk |
| 30646 | { 11454, 8, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96aef0022819ULL }, // Inst #11454 = VMINPDZ128rmbkz |
| 30647 | { 11453, 9, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92aef0022819ULL }, // Inst #11453 = VMINPDZ128rmbk |
| 30648 | { 11452, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90aef0022819ULL }, // Inst #11452 = VMINPDZ128rmb |
| 30649 | { 11451, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aef0022819ULL }, // Inst #11451 = VMINPDZ128rm |
| 30650 | { 11450, 3, 1, 0, 369, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1aeb0002829ULL }, // Inst #11450 = VMINPDYrr |
| 30651 | { 11449, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aeb0002819ULL }, // Inst #11449 = VMINPDYrm |
| 30652 | { 11448, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1982, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaea8003029ULL }, // Inst #11448 = VMINCSSrr |
| 30653 | { 11447, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaea8003019ULL }, // Inst #11447 = VMINCSSrm |
| 30654 | { 11446, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1972, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60aee8003029ULL }, // Inst #11446 = VMINCSSZrr |
| 30655 | { 11445, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60aee8003019ULL }, // Inst #11445 = VMINCSSZrm |
| 30656 | { 11444, 3, 1, 0, 1749, 1, 0, X86ImpOpBase + 78, 1962, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40aee8013029ULL }, // Inst #11444 = VMINCSHZrr |
| 30657 | { 11443, 7, 1, 0, 1727, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40aee8013019ULL }, // Inst #11443 = VMINCSHZrm |
| 30658 | { 11442, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1952, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaeb0003829ULL }, // Inst #11442 = VMINCSDrr |
| 30659 | { 11441, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb0003819ULL }, // Inst #11441 = VMINCSDrm |
| 30660 | { 11440, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1918, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80aef0023829ULL }, // Inst #11440 = VMINCSDZrr |
| 30661 | { 11439, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aef0023819ULL }, // Inst #11439 = VMINCSDZrm |
| 30662 | { 11438, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaea8002029ULL }, // Inst #11438 = VMINCPSrr |
| 30663 | { 11437, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaea8002019ULL }, // Inst #11437 = VMINCPSrm |
| 30664 | { 11436, 4, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1899, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeaee8002029ULL }, // Inst #11436 = VMINCPSZrrkz |
| 30665 | { 11435, 5, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaaee8002029ULL }, // Inst #11435 = VMINCPSZrrk |
| 30666 | { 11434, 3, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8aee8002029ULL }, // Inst #11434 = VMINCPSZrr |
| 30667 | { 11433, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8002019ULL }, // Inst #11433 = VMINCPSZrmkz |
| 30668 | { 11432, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8002019ULL }, // Inst #11432 = VMINCPSZrmk |
| 30669 | { 11431, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eaee8002019ULL }, // Inst #11431 = VMINCPSZrmbkz |
| 30670 | { 11430, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aaee8002019ULL }, // Inst #11430 = VMINCPSZrmbk |
| 30671 | { 11429, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78aee8002019ULL }, // Inst #11429 = VMINCPSZrmb |
| 30672 | { 11428, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8002019ULL }, // Inst #11428 = VMINCPSZrm |
| 30673 | { 11427, 4, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1871, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7aee8002029ULL }, // Inst #11427 = VMINCPSZ256rrkz |
| 30674 | { 11426, 5, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3aee8002029ULL }, // Inst #11426 = VMINCPSZ256rrk |
| 30675 | { 11425, 3, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1aee8002029ULL }, // Inst #11425 = VMINCPSZ256rr |
| 30676 | { 11424, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8002019ULL }, // Inst #11424 = VMINCPSZ256rmkz |
| 30677 | { 11423, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8002019ULL }, // Inst #11423 = VMINCPSZ256rmk |
| 30678 | { 11422, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77aee8002019ULL }, // Inst #11422 = VMINCPSZ256rmbkz |
| 30679 | { 11421, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73aee8002019ULL }, // Inst #11421 = VMINCPSZ256rmbk |
| 30680 | { 11420, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71aee8002019ULL }, // Inst #11420 = VMINCPSZ256rmb |
| 30681 | { 11419, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8002019ULL }, // Inst #11419 = VMINCPSZ256rm |
| 30682 | { 11418, 4, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1845, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6aee8002029ULL }, // Inst #11418 = VMINCPSZ128rrkz |
| 30683 | { 11417, 5, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2aee8002029ULL }, // Inst #11417 = VMINCPSZ128rrk |
| 30684 | { 11416, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0aee8002029ULL }, // Inst #11416 = VMINCPSZ128rr |
| 30685 | { 11415, 8, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8002019ULL }, // Inst #11415 = VMINCPSZ128rmkz |
| 30686 | { 11414, 9, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8002019ULL }, // Inst #11414 = VMINCPSZ128rmk |
| 30687 | { 11413, 8, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76aee8002019ULL }, // Inst #11413 = VMINCPSZ128rmbkz |
| 30688 | { 11412, 9, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72aee8002019ULL }, // Inst #11412 = VMINCPSZ128rmbk |
| 30689 | { 11411, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70aee8002019ULL }, // Inst #11411 = VMINCPSZ128rmb |
| 30690 | { 11410, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8002019ULL }, // Inst #11410 = VMINCPSZ128rm |
| 30691 | { 11409, 3, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1aea8002029ULL }, // Inst #11409 = VMINCPSYrr |
| 30692 | { 11408, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aea8002019ULL }, // Inst #11408 = VMINCPSYrm |
| 30693 | { 11407, 4, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1819, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeaee8012029ULL }, // Inst #11407 = VMINCPHZrrkz |
| 30694 | { 11406, 5, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaaee8012029ULL }, // Inst #11406 = VMINCPHZrrk |
| 30695 | { 11405, 3, 1, 0, 1885, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8aee8012029ULL }, // Inst #11405 = VMINCPHZrr |
| 30696 | { 11404, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaee8012019ULL }, // Inst #11404 = VMINCPHZrmkz |
| 30697 | { 11403, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaee8012019ULL }, // Inst #11403 = VMINCPHZrmk |
| 30698 | { 11402, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eaee8012019ULL }, // Inst #11402 = VMINCPHZrmbkz |
| 30699 | { 11401, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aaee8012019ULL }, // Inst #11401 = VMINCPHZrmbk |
| 30700 | { 11400, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58aee8012019ULL }, // Inst #11400 = VMINCPHZrmb |
| 30701 | { 11399, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aee8012019ULL }, // Inst #11399 = VMINCPHZrm |
| 30702 | { 11398, 4, 1, 0, 1875, 1, 0, X86ImpOpBase + 78, 1782, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7aee8012029ULL }, // Inst #11398 = VMINCPHZ256rrkz |
| 30703 | { 11397, 5, 1, 0, 1875, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3aee8012029ULL }, // Inst #11397 = VMINCPHZ256rrk |
| 30704 | { 11396, 3, 1, 0, 1748, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1aee8012029ULL }, // Inst #11396 = VMINCPHZ256rr |
| 30705 | { 11395, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aee8012019ULL }, // Inst #11395 = VMINCPHZ256rmkz |
| 30706 | { 11394, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aee8012019ULL }, // Inst #11394 = VMINCPHZ256rmk |
| 30707 | { 11393, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57aee8012019ULL }, // Inst #11393 = VMINCPHZ256rmbkz |
| 30708 | { 11392, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53aee8012019ULL }, // Inst #11392 = VMINCPHZ256rmbk |
| 30709 | { 11391, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51aee8012019ULL }, // Inst #11391 = VMINCPHZ256rmb |
| 30710 | { 11390, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aee8012019ULL }, // Inst #11390 = VMINCPHZ256rm |
| 30711 | { 11389, 4, 1, 0, 1874, 1, 0, X86ImpOpBase + 78, 1756, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6aee8012029ULL }, // Inst #11389 = VMINCPHZ128rrkz |
| 30712 | { 11388, 5, 1, 0, 1874, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2aee8012029ULL }, // Inst #11388 = VMINCPHZ128rrk |
| 30713 | { 11387, 3, 1, 0, 1747, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0aee8012029ULL }, // Inst #11387 = VMINCPHZ128rr |
| 30714 | { 11386, 8, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aee8012019ULL }, // Inst #11386 = VMINCPHZ128rmkz |
| 30715 | { 11385, 9, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aee8012019ULL }, // Inst #11385 = VMINCPHZ128rmk |
| 30716 | { 11384, 8, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56aee8012019ULL }, // Inst #11384 = VMINCPHZ128rmbkz |
| 30717 | { 11383, 9, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52aee8012019ULL }, // Inst #11383 = VMINCPHZ128rmbk |
| 30718 | { 11382, 7, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50aee8012019ULL }, // Inst #11382 = VMINCPHZ128rmb |
| 30719 | { 11381, 7, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aee8012019ULL }, // Inst #11381 = VMINCPHZ128rm |
| 30720 | { 11380, 3, 1, 0, 77, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaeb0002829ULL }, // Inst #11380 = VMINCPDrr |
| 30721 | { 11379, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb0002819ULL }, // Inst #11379 = VMINCPDrm |
| 30722 | { 11378, 4, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1720, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeaef0022829ULL }, // Inst #11378 = VMINCPDZrrkz |
| 30723 | { 11377, 5, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaaef0022829ULL }, // Inst #11377 = VMINCPDZrrk |
| 30724 | { 11376, 3, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8aef0022829ULL }, // Inst #11376 = VMINCPDZrr |
| 30725 | { 11375, 8, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaef0022819ULL }, // Inst #11375 = VMINCPDZrmkz |
| 30726 | { 11374, 9, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaef0022819ULL }, // Inst #11374 = VMINCPDZrmk |
| 30727 | { 11373, 8, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaef0022819ULL }, // Inst #11373 = VMINCPDZrmbkz |
| 30728 | { 11372, 9, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaef0022819ULL }, // Inst #11372 = VMINCPDZrmbk |
| 30729 | { 11371, 7, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98aef0022819ULL }, // Inst #11371 = VMINCPDZrmb |
| 30730 | { 11370, 7, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aef0022819ULL }, // Inst #11370 = VMINCPDZrm |
| 30731 | { 11369, 4, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1669, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7aef0022829ULL }, // Inst #11369 = VMINCPDZ256rrkz |
| 30732 | { 11368, 5, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3aef0022829ULL }, // Inst #11368 = VMINCPDZ256rrk |
| 30733 | { 11367, 3, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1aef0022829ULL }, // Inst #11367 = VMINCPDZ256rr |
| 30734 | { 11366, 8, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aef0022819ULL }, // Inst #11366 = VMINCPDZ256rmkz |
| 30735 | { 11365, 9, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aef0022819ULL }, // Inst #11365 = VMINCPDZ256rmk |
| 30736 | { 11364, 8, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97aef0022819ULL }, // Inst #11364 = VMINCPDZ256rmbkz |
| 30737 | { 11363, 9, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93aef0022819ULL }, // Inst #11363 = VMINCPDZ256rmbk |
| 30738 | { 11362, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91aef0022819ULL }, // Inst #11362 = VMINCPDZ256rmb |
| 30739 | { 11361, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aef0022819ULL }, // Inst #11361 = VMINCPDZ256rm |
| 30740 | { 11360, 4, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1633, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6aef0022829ULL }, // Inst #11360 = VMINCPDZ128rrkz |
| 30741 | { 11359, 5, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2aef0022829ULL }, // Inst #11359 = VMINCPDZ128rrk |
| 30742 | { 11358, 3, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0aef0022829ULL }, // Inst #11358 = VMINCPDZ128rr |
| 30743 | { 11357, 8, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aef0022819ULL }, // Inst #11357 = VMINCPDZ128rmkz |
| 30744 | { 11356, 9, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aef0022819ULL }, // Inst #11356 = VMINCPDZ128rmk |
| 30745 | { 11355, 8, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96aef0022819ULL }, // Inst #11355 = VMINCPDZ128rmbkz |
| 30746 | { 11354, 9, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92aef0022819ULL }, // Inst #11354 = VMINCPDZ128rmbk |
| 30747 | { 11353, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90aef0022819ULL }, // Inst #11353 = VMINCPDZ128rmb |
| 30748 | { 11352, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aef0022819ULL }, // Inst #11352 = VMINCPDZ128rm |
| 30749 | { 11351, 3, 1, 0, 369, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1aeb0002829ULL }, // Inst #11351 = VMINCPDYrr |
| 30750 | { 11350, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aeb0002819ULL }, // Inst #11350 = VMINCPDYrm |
| 30751 | { 11349, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002054ULL }, // Inst #11349 = VMFUNC |
| 30752 | { 11348, 5, 0, 0, 895, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002826ULL }, // Inst #11348 = VMCLEARm |
| 30753 | { 11347, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002041ULL }, // Inst #11347 = VMCALL |
| 30754 | { 11346, 3, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xafa8003029ULL }, // Inst #11346 = VMAXSSrr_Int |
| 30755 | { 11345, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1982, 0|(1ULL<<MCID::MayRaiseFPException), 0xafa8003029ULL }, // Inst #11345 = VMAXSSrr |
| 30756 | { 11344, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafa8003019ULL }, // Inst #11344 = VMAXSSrm_Int |
| 30757 | { 11343, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafa8003019ULL }, // Inst #11343 = VMAXSSrm |
| 30758 | { 11342, 4, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x76afe8003029ULL }, // Inst #11342 = VMAXSSZrrb_Intkz |
| 30759 | { 11341, 5, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x72afe8003029ULL }, // Inst #11341 = VMAXSSZrrb_Intk |
| 30760 | { 11340, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x70afe8003029ULL }, // Inst #11340 = VMAXSSZrrb_Int |
| 30761 | { 11339, 4, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66afe8003029ULL }, // Inst #11339 = VMAXSSZrr_Intkz |
| 30762 | { 11338, 5, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62afe8003029ULL }, // Inst #11338 = VMAXSSZrr_Intk |
| 30763 | { 11337, 3, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60afe8003029ULL }, // Inst #11337 = VMAXSSZrr_Int |
| 30764 | { 11336, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1972, 0|(1ULL<<MCID::MayRaiseFPException), 0x60afe8003029ULL }, // Inst #11336 = VMAXSSZrr |
| 30765 | { 11335, 8, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66afe8003019ULL }, // Inst #11335 = VMAXSSZrm_Intkz |
| 30766 | { 11334, 9, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62afe8003019ULL }, // Inst #11334 = VMAXSSZrm_Intk |
| 30767 | { 11333, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60afe8003019ULL }, // Inst #11333 = VMAXSSZrm_Int |
| 30768 | { 11332, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60afe8003019ULL }, // Inst #11332 = VMAXSSZrm |
| 30769 | { 11331, 4, 1, 0, 1878, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x56afe8013029ULL }, // Inst #11331 = VMAXSHZrrb_Intkz |
| 30770 | { 11330, 5, 1, 0, 1878, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x52afe8013029ULL }, // Inst #11330 = VMAXSHZrrb_Intk |
| 30771 | { 11329, 3, 1, 0, 1749, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x50afe8013029ULL }, // Inst #11329 = VMAXSHZrrb_Int |
| 30772 | { 11328, 4, 1, 0, 1878, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x46afe8013029ULL }, // Inst #11328 = VMAXSHZrr_Intkz |
| 30773 | { 11327, 5, 1, 0, 1878, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x42afe8013029ULL }, // Inst #11327 = VMAXSHZrr_Intk |
| 30774 | { 11326, 3, 1, 0, 1749, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x40afe8013029ULL }, // Inst #11326 = VMAXSHZrr_Int |
| 30775 | { 11325, 3, 1, 0, 1749, 1, 0, X86ImpOpBase + 78, 1962, 0|(1ULL<<MCID::MayRaiseFPException), 0x40afe8013029ULL }, // Inst #11325 = VMAXSHZrr |
| 30776 | { 11324, 8, 1, 0, 1727, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46afe8013019ULL }, // Inst #11324 = VMAXSHZrm_Intkz |
| 30777 | { 11323, 9, 1, 0, 1727, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42afe8013019ULL }, // Inst #11323 = VMAXSHZrm_Intk |
| 30778 | { 11322, 7, 1, 0, 1727, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40afe8013019ULL }, // Inst #11322 = VMAXSHZrm_Int |
| 30779 | { 11321, 7, 1, 0, 1727, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40afe8013019ULL }, // Inst #11321 = VMAXSHZrm |
| 30780 | { 11320, 3, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xafb0003829ULL }, // Inst #11320 = VMAXSDrr_Int |
| 30781 | { 11319, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1952, 0|(1ULL<<MCID::MayRaiseFPException), 0xafb0003829ULL }, // Inst #11319 = VMAXSDrr |
| 30782 | { 11318, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb0003819ULL }, // Inst #11318 = VMAXSDrm_Int |
| 30783 | { 11317, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb0003819ULL }, // Inst #11317 = VMAXSDrm |
| 30784 | { 11316, 4, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x96aff0023829ULL }, // Inst #11316 = VMAXSDZrrb_Intkz |
| 30785 | { 11315, 5, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x92aff0023829ULL }, // Inst #11315 = VMAXSDZrrb_Intk |
| 30786 | { 11314, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x90aff0023829ULL }, // Inst #11314 = VMAXSDZrrb_Int |
| 30787 | { 11313, 4, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86aff0023829ULL }, // Inst #11313 = VMAXSDZrr_Intkz |
| 30788 | { 11312, 5, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82aff0023829ULL }, // Inst #11312 = VMAXSDZrr_Intk |
| 30789 | { 11311, 3, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80aff0023829ULL }, // Inst #11311 = VMAXSDZrr_Int |
| 30790 | { 11310, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1918, 0|(1ULL<<MCID::MayRaiseFPException), 0x80aff0023829ULL }, // Inst #11310 = VMAXSDZrr |
| 30791 | { 11309, 8, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86aff0023819ULL }, // Inst #11309 = VMAXSDZrm_Intkz |
| 30792 | { 11308, 9, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82aff0023819ULL }, // Inst #11308 = VMAXSDZrm_Intk |
| 30793 | { 11307, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aff0023819ULL }, // Inst #11307 = VMAXSDZrm_Int |
| 30794 | { 11306, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aff0023819ULL }, // Inst #11306 = VMAXSDZrm |
| 30795 | { 11305, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xafa8002029ULL }, // Inst #11305 = VMAXPSrr |
| 30796 | { 11304, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafa8002019ULL }, // Inst #11304 = VMAXPSrm |
| 30797 | { 11303, 4, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1899, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8002029ULL }, // Inst #11303 = VMAXPSZrrkz |
| 30798 | { 11302, 5, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8002029ULL }, // Inst #11302 = VMAXPSZrrk |
| 30799 | { 11301, 4, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1899, 0, 0x7eafe8002029ULL }, // Inst #11301 = VMAXPSZrrbkz |
| 30800 | { 11300, 5, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1894, 0, 0x7aafe8002029ULL }, // Inst #11300 = VMAXPSZrrbk |
| 30801 | { 11299, 3, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1697, 0, 0x78afe8002029ULL }, // Inst #11299 = VMAXPSZrrb |
| 30802 | { 11298, 3, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8002029ULL }, // Inst #11298 = VMAXPSZrr |
| 30803 | { 11297, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8002019ULL }, // Inst #11297 = VMAXPSZrmkz |
| 30804 | { 11296, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8002019ULL }, // Inst #11296 = VMAXPSZrmk |
| 30805 | { 11295, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eafe8002019ULL }, // Inst #11295 = VMAXPSZrmbkz |
| 30806 | { 11294, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aafe8002019ULL }, // Inst #11294 = VMAXPSZrmbk |
| 30807 | { 11293, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78afe8002019ULL }, // Inst #11293 = VMAXPSZrmb |
| 30808 | { 11292, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8002019ULL }, // Inst #11292 = VMAXPSZrm |
| 30809 | { 11291, 4, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1871, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8002029ULL }, // Inst #11291 = VMAXPSZ256rrkz |
| 30810 | { 11290, 5, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8002029ULL }, // Inst #11290 = VMAXPSZ256rrk |
| 30811 | { 11289, 3, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8002029ULL }, // Inst #11289 = VMAXPSZ256rr |
| 30812 | { 11288, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8002019ULL }, // Inst #11288 = VMAXPSZ256rmkz |
| 30813 | { 11287, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8002019ULL }, // Inst #11287 = VMAXPSZ256rmk |
| 30814 | { 11286, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77afe8002019ULL }, // Inst #11286 = VMAXPSZ256rmbkz |
| 30815 | { 11285, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73afe8002019ULL }, // Inst #11285 = VMAXPSZ256rmbk |
| 30816 | { 11284, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71afe8002019ULL }, // Inst #11284 = VMAXPSZ256rmb |
| 30817 | { 11283, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8002019ULL }, // Inst #11283 = VMAXPSZ256rm |
| 30818 | { 11282, 4, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1845, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8002029ULL }, // Inst #11282 = VMAXPSZ128rrkz |
| 30819 | { 11281, 5, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8002029ULL }, // Inst #11281 = VMAXPSZ128rrk |
| 30820 | { 11280, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8002029ULL }, // Inst #11280 = VMAXPSZ128rr |
| 30821 | { 11279, 8, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8002019ULL }, // Inst #11279 = VMAXPSZ128rmkz |
| 30822 | { 11278, 9, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8002019ULL }, // Inst #11278 = VMAXPSZ128rmk |
| 30823 | { 11277, 8, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76afe8002019ULL }, // Inst #11277 = VMAXPSZ128rmbkz |
| 30824 | { 11276, 9, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72afe8002019ULL }, // Inst #11276 = VMAXPSZ128rmbk |
| 30825 | { 11275, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70afe8002019ULL }, // Inst #11275 = VMAXPSZ128rmb |
| 30826 | { 11274, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8002019ULL }, // Inst #11274 = VMAXPSZ128rm |
| 30827 | { 11273, 3, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1afa8002029ULL }, // Inst #11273 = VMAXPSYrr |
| 30828 | { 11272, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afa8002019ULL }, // Inst #11272 = VMAXPSYrm |
| 30829 | { 11271, 4, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1819, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8012029ULL }, // Inst #11271 = VMAXPHZrrkz |
| 30830 | { 11270, 5, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8012029ULL }, // Inst #11270 = VMAXPHZrrk |
| 30831 | { 11269, 4, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1819, 0, 0x5eafe8012029ULL }, // Inst #11269 = VMAXPHZrrbkz |
| 30832 | { 11268, 5, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1814, 0, 0x5aafe8012029ULL }, // Inst #11268 = VMAXPHZrrbk |
| 30833 | { 11267, 3, 1, 0, 1885, 1, 0, X86ImpOpBase + 78, 1697, 0, 0x58afe8012029ULL }, // Inst #11267 = VMAXPHZrrb |
| 30834 | { 11266, 3, 1, 0, 1885, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8012029ULL }, // Inst #11266 = VMAXPHZrr |
| 30835 | { 11265, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8012019ULL }, // Inst #11265 = VMAXPHZrmkz |
| 30836 | { 11264, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8012019ULL }, // Inst #11264 = VMAXPHZrmk |
| 30837 | { 11263, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eafe8012019ULL }, // Inst #11263 = VMAXPHZrmbkz |
| 30838 | { 11262, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aafe8012019ULL }, // Inst #11262 = VMAXPHZrmbk |
| 30839 | { 11261, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58afe8012019ULL }, // Inst #11261 = VMAXPHZrmb |
| 30840 | { 11260, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8012019ULL }, // Inst #11260 = VMAXPHZrm |
| 30841 | { 11259, 4, 1, 0, 1875, 1, 0, X86ImpOpBase + 78, 1782, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8012029ULL }, // Inst #11259 = VMAXPHZ256rrkz |
| 30842 | { 11258, 5, 1, 0, 1875, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8012029ULL }, // Inst #11258 = VMAXPHZ256rrk |
| 30843 | { 11257, 3, 1, 0, 1748, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8012029ULL }, // Inst #11257 = VMAXPHZ256rr |
| 30844 | { 11256, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8012019ULL }, // Inst #11256 = VMAXPHZ256rmkz |
| 30845 | { 11255, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8012019ULL }, // Inst #11255 = VMAXPHZ256rmk |
| 30846 | { 11254, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57afe8012019ULL }, // Inst #11254 = VMAXPHZ256rmbkz |
| 30847 | { 11253, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53afe8012019ULL }, // Inst #11253 = VMAXPHZ256rmbk |
| 30848 | { 11252, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51afe8012019ULL }, // Inst #11252 = VMAXPHZ256rmb |
| 30849 | { 11251, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8012019ULL }, // Inst #11251 = VMAXPHZ256rm |
| 30850 | { 11250, 4, 1, 0, 1874, 1, 0, X86ImpOpBase + 78, 1756, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8012029ULL }, // Inst #11250 = VMAXPHZ128rrkz |
| 30851 | { 11249, 5, 1, 0, 1874, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8012029ULL }, // Inst #11249 = VMAXPHZ128rrk |
| 30852 | { 11248, 3, 1, 0, 1747, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8012029ULL }, // Inst #11248 = VMAXPHZ128rr |
| 30853 | { 11247, 8, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8012019ULL }, // Inst #11247 = VMAXPHZ128rmkz |
| 30854 | { 11246, 9, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8012019ULL }, // Inst #11246 = VMAXPHZ128rmk |
| 30855 | { 11245, 8, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56afe8012019ULL }, // Inst #11245 = VMAXPHZ128rmbkz |
| 30856 | { 11244, 9, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52afe8012019ULL }, // Inst #11244 = VMAXPHZ128rmbk |
| 30857 | { 11243, 7, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50afe8012019ULL }, // Inst #11243 = VMAXPHZ128rmb |
| 30858 | { 11242, 7, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8012019ULL }, // Inst #11242 = VMAXPHZ128rm |
| 30859 | { 11241, 3, 1, 0, 77, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xafb0002829ULL }, // Inst #11241 = VMAXPDrr |
| 30860 | { 11240, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb0002819ULL }, // Inst #11240 = VMAXPDrm |
| 30861 | { 11239, 4, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1720, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaff0022829ULL }, // Inst #11239 = VMAXPDZrrkz |
| 30862 | { 11238, 5, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaff0022829ULL }, // Inst #11238 = VMAXPDZrrk |
| 30863 | { 11237, 4, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1720, 0, 0x9eaff0022829ULL }, // Inst #11237 = VMAXPDZrrbkz |
| 30864 | { 11236, 5, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1715, 0, 0x9aaff0022829ULL }, // Inst #11236 = VMAXPDZrrbk |
| 30865 | { 11235, 3, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1697, 0, 0x98aff0022829ULL }, // Inst #11235 = VMAXPDZrrb |
| 30866 | { 11234, 3, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aff0022829ULL }, // Inst #11234 = VMAXPDZrr |
| 30867 | { 11233, 8, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaff0022819ULL }, // Inst #11233 = VMAXPDZrmkz |
| 30868 | { 11232, 9, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaff0022819ULL }, // Inst #11232 = VMAXPDZrmk |
| 30869 | { 11231, 8, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaff0022819ULL }, // Inst #11231 = VMAXPDZrmbkz |
| 30870 | { 11230, 9, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaff0022819ULL }, // Inst #11230 = VMAXPDZrmbk |
| 30871 | { 11229, 7, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98aff0022819ULL }, // Inst #11229 = VMAXPDZrmb |
| 30872 | { 11228, 7, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aff0022819ULL }, // Inst #11228 = VMAXPDZrm |
| 30873 | { 11227, 4, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1669, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aff0022829ULL }, // Inst #11227 = VMAXPDZ256rrkz |
| 30874 | { 11226, 5, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aff0022829ULL }, // Inst #11226 = VMAXPDZ256rrk |
| 30875 | { 11225, 3, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aff0022829ULL }, // Inst #11225 = VMAXPDZ256rr |
| 30876 | { 11224, 8, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aff0022819ULL }, // Inst #11224 = VMAXPDZ256rmkz |
| 30877 | { 11223, 9, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aff0022819ULL }, // Inst #11223 = VMAXPDZ256rmk |
| 30878 | { 11222, 8, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97aff0022819ULL }, // Inst #11222 = VMAXPDZ256rmbkz |
| 30879 | { 11221, 9, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93aff0022819ULL }, // Inst #11221 = VMAXPDZ256rmbk |
| 30880 | { 11220, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91aff0022819ULL }, // Inst #11220 = VMAXPDZ256rmb |
| 30881 | { 11219, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aff0022819ULL }, // Inst #11219 = VMAXPDZ256rm |
| 30882 | { 11218, 4, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1633, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aff0022829ULL }, // Inst #11218 = VMAXPDZ128rrkz |
| 30883 | { 11217, 5, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aff0022829ULL }, // Inst #11217 = VMAXPDZ128rrk |
| 30884 | { 11216, 3, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aff0022829ULL }, // Inst #11216 = VMAXPDZ128rr |
| 30885 | { 11215, 8, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aff0022819ULL }, // Inst #11215 = VMAXPDZ128rmkz |
| 30886 | { 11214, 9, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aff0022819ULL }, // Inst #11214 = VMAXPDZ128rmk |
| 30887 | { 11213, 8, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96aff0022819ULL }, // Inst #11213 = VMAXPDZ128rmbkz |
| 30888 | { 11212, 9, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92aff0022819ULL }, // Inst #11212 = VMAXPDZ128rmbk |
| 30889 | { 11211, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90aff0022819ULL }, // Inst #11211 = VMAXPDZ128rmb |
| 30890 | { 11210, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aff0022819ULL }, // Inst #11210 = VMAXPDZ128rm |
| 30891 | { 11209, 3, 1, 0, 369, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1afb0002829ULL }, // Inst #11209 = VMAXPDYrr |
| 30892 | { 11208, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afb0002819ULL }, // Inst #11208 = VMAXPDYrm |
| 30893 | { 11207, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1982, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xafa8003029ULL }, // Inst #11207 = VMAXCSSrr |
| 30894 | { 11206, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafa8003019ULL }, // Inst #11206 = VMAXCSSrm |
| 30895 | { 11205, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1972, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60afe8003029ULL }, // Inst #11205 = VMAXCSSZrr |
| 30896 | { 11204, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60afe8003019ULL }, // Inst #11204 = VMAXCSSZrm |
| 30897 | { 11203, 3, 1, 0, 1749, 1, 0, X86ImpOpBase + 78, 1962, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40afe8013029ULL }, // Inst #11203 = VMAXCSHZrr |
| 30898 | { 11202, 7, 1, 0, 1727, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40afe8013019ULL }, // Inst #11202 = VMAXCSHZrm |
| 30899 | { 11201, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 1952, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xafb0003829ULL }, // Inst #11201 = VMAXCSDrr |
| 30900 | { 11200, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb0003819ULL }, // Inst #11200 = VMAXCSDrm |
| 30901 | { 11199, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 1918, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80aff0023829ULL }, // Inst #11199 = VMAXCSDZrr |
| 30902 | { 11198, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aff0023819ULL }, // Inst #11198 = VMAXCSDZrm |
| 30903 | { 11197, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xafa8002029ULL }, // Inst #11197 = VMAXCPSrr |
| 30904 | { 11196, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafa8002019ULL }, // Inst #11196 = VMAXCPSrm |
| 30905 | { 11195, 4, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1899, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeafe8002029ULL }, // Inst #11195 = VMAXCPSZrrkz |
| 30906 | { 11194, 5, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaafe8002029ULL }, // Inst #11194 = VMAXCPSZrrk |
| 30907 | { 11193, 3, 1, 0, 1825, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8afe8002029ULL }, // Inst #11193 = VMAXCPSZrr |
| 30908 | { 11192, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8002019ULL }, // Inst #11192 = VMAXCPSZrmkz |
| 30909 | { 11191, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8002019ULL }, // Inst #11191 = VMAXCPSZrmk |
| 30910 | { 11190, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eafe8002019ULL }, // Inst #11190 = VMAXCPSZrmbkz |
| 30911 | { 11189, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aafe8002019ULL }, // Inst #11189 = VMAXCPSZrmbk |
| 30912 | { 11188, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78afe8002019ULL }, // Inst #11188 = VMAXCPSZrmb |
| 30913 | { 11187, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8002019ULL }, // Inst #11187 = VMAXCPSZrm |
| 30914 | { 11186, 4, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1871, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7afe8002029ULL }, // Inst #11186 = VMAXCPSZ256rrkz |
| 30915 | { 11185, 5, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3afe8002029ULL }, // Inst #11185 = VMAXCPSZ256rrk |
| 30916 | { 11184, 3, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1afe8002029ULL }, // Inst #11184 = VMAXCPSZ256rr |
| 30917 | { 11183, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8002019ULL }, // Inst #11183 = VMAXCPSZ256rmkz |
| 30918 | { 11182, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8002019ULL }, // Inst #11182 = VMAXCPSZ256rmk |
| 30919 | { 11181, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77afe8002019ULL }, // Inst #11181 = VMAXCPSZ256rmbkz |
| 30920 | { 11180, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73afe8002019ULL }, // Inst #11180 = VMAXCPSZ256rmbk |
| 30921 | { 11179, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71afe8002019ULL }, // Inst #11179 = VMAXCPSZ256rmb |
| 30922 | { 11178, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8002019ULL }, // Inst #11178 = VMAXCPSZ256rm |
| 30923 | { 11177, 4, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1845, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6afe8002029ULL }, // Inst #11177 = VMAXCPSZ128rrkz |
| 30924 | { 11176, 5, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2afe8002029ULL }, // Inst #11176 = VMAXCPSZ128rrk |
| 30925 | { 11175, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0afe8002029ULL }, // Inst #11175 = VMAXCPSZ128rr |
| 30926 | { 11174, 8, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8002019ULL }, // Inst #11174 = VMAXCPSZ128rmkz |
| 30927 | { 11173, 9, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8002019ULL }, // Inst #11173 = VMAXCPSZ128rmk |
| 30928 | { 11172, 8, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76afe8002019ULL }, // Inst #11172 = VMAXCPSZ128rmbkz |
| 30929 | { 11171, 9, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72afe8002019ULL }, // Inst #11171 = VMAXCPSZ128rmbk |
| 30930 | { 11170, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70afe8002019ULL }, // Inst #11170 = VMAXCPSZ128rmb |
| 30931 | { 11169, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8002019ULL }, // Inst #11169 = VMAXCPSZ128rm |
| 30932 | { 11168, 3, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1afa8002029ULL }, // Inst #11168 = VMAXCPSYrr |
| 30933 | { 11167, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afa8002019ULL }, // Inst #11167 = VMAXCPSYrm |
| 30934 | { 11166, 4, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1819, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeafe8012029ULL }, // Inst #11166 = VMAXCPHZrrkz |
| 30935 | { 11165, 5, 1, 0, 1892, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaafe8012029ULL }, // Inst #11165 = VMAXCPHZrrk |
| 30936 | { 11164, 3, 1, 0, 1885, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8afe8012029ULL }, // Inst #11164 = VMAXCPHZrr |
| 30937 | { 11163, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeafe8012019ULL }, // Inst #11163 = VMAXCPHZrmkz |
| 30938 | { 11162, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaafe8012019ULL }, // Inst #11162 = VMAXCPHZrmk |
| 30939 | { 11161, 8, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eafe8012019ULL }, // Inst #11161 = VMAXCPHZrmbkz |
| 30940 | { 11160, 9, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aafe8012019ULL }, // Inst #11160 = VMAXCPHZrmbk |
| 30941 | { 11159, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58afe8012019ULL }, // Inst #11159 = VMAXCPHZrmb |
| 30942 | { 11158, 7, 1, 0, 372, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8afe8012019ULL }, // Inst #11158 = VMAXCPHZrm |
| 30943 | { 11157, 4, 1, 0, 1875, 1, 0, X86ImpOpBase + 78, 1782, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7afe8012029ULL }, // Inst #11157 = VMAXCPHZ256rrkz |
| 30944 | { 11156, 5, 1, 0, 1875, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3afe8012029ULL }, // Inst #11156 = VMAXCPHZ256rrk |
| 30945 | { 11155, 3, 1, 0, 1748, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1afe8012029ULL }, // Inst #11155 = VMAXCPHZ256rr |
| 30946 | { 11154, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7afe8012019ULL }, // Inst #11154 = VMAXCPHZ256rmkz |
| 30947 | { 11153, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3afe8012019ULL }, // Inst #11153 = VMAXCPHZ256rmk |
| 30948 | { 11152, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57afe8012019ULL }, // Inst #11152 = VMAXCPHZ256rmbkz |
| 30949 | { 11151, 9, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53afe8012019ULL }, // Inst #11151 = VMAXCPHZ256rmbk |
| 30950 | { 11150, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51afe8012019ULL }, // Inst #11150 = VMAXCPHZ256rmb |
| 30951 | { 11149, 7, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1afe8012019ULL }, // Inst #11149 = VMAXCPHZ256rm |
| 30952 | { 11148, 4, 1, 0, 1874, 1, 0, X86ImpOpBase + 78, 1756, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6afe8012029ULL }, // Inst #11148 = VMAXCPHZ128rrkz |
| 30953 | { 11147, 5, 1, 0, 1874, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2afe8012029ULL }, // Inst #11147 = VMAXCPHZ128rrk |
| 30954 | { 11146, 3, 1, 0, 1747, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0afe8012029ULL }, // Inst #11146 = VMAXCPHZ128rr |
| 30955 | { 11145, 8, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6afe8012019ULL }, // Inst #11145 = VMAXCPHZ128rmkz |
| 30956 | { 11144, 9, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2afe8012019ULL }, // Inst #11144 = VMAXCPHZ128rmk |
| 30957 | { 11143, 8, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56afe8012019ULL }, // Inst #11143 = VMAXCPHZ128rmbkz |
| 30958 | { 11142, 9, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52afe8012019ULL }, // Inst #11142 = VMAXCPHZ128rmbk |
| 30959 | { 11141, 7, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50afe8012019ULL }, // Inst #11141 = VMAXCPHZ128rmb |
| 30960 | { 11140, 7, 1, 0, 1721, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0afe8012019ULL }, // Inst #11140 = VMAXCPHZ128rm |
| 30961 | { 11139, 3, 1, 0, 77, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xafb0002829ULL }, // Inst #11139 = VMAXCPDrr |
| 30962 | { 11138, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb0002819ULL }, // Inst #11138 = VMAXCPDrm |
| 30963 | { 11137, 4, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1720, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeaff0022829ULL }, // Inst #11137 = VMAXCPDZrrkz |
| 30964 | { 11136, 5, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaaff0022829ULL }, // Inst #11136 = VMAXCPDZrrk |
| 30965 | { 11135, 3, 1, 0, 1122, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8aff0022829ULL }, // Inst #11135 = VMAXCPDZrr |
| 30966 | { 11134, 8, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaff0022819ULL }, // Inst #11134 = VMAXCPDZrmkz |
| 30967 | { 11133, 9, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaff0022819ULL }, // Inst #11133 = VMAXCPDZrmk |
| 30968 | { 11132, 8, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaff0022819ULL }, // Inst #11132 = VMAXCPDZrmbkz |
| 30969 | { 11131, 9, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaff0022819ULL }, // Inst #11131 = VMAXCPDZrmbk |
| 30970 | { 11130, 7, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98aff0022819ULL }, // Inst #11130 = VMAXCPDZrmb |
| 30971 | { 11129, 7, 1, 0, 468, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aff0022819ULL }, // Inst #11129 = VMAXCPDZrm |
| 30972 | { 11128, 4, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1669, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7aff0022829ULL }, // Inst #11128 = VMAXCPDZ256rrkz |
| 30973 | { 11127, 5, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3aff0022829ULL }, // Inst #11127 = VMAXCPDZ256rrk |
| 30974 | { 11126, 3, 1, 0, 1121, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1aff0022829ULL }, // Inst #11126 = VMAXCPDZ256rr |
| 30975 | { 11125, 8, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aff0022819ULL }, // Inst #11125 = VMAXCPDZ256rmkz |
| 30976 | { 11124, 9, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aff0022819ULL }, // Inst #11124 = VMAXCPDZ256rmk |
| 30977 | { 11123, 8, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97aff0022819ULL }, // Inst #11123 = VMAXCPDZ256rmbkz |
| 30978 | { 11122, 9, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93aff0022819ULL }, // Inst #11122 = VMAXCPDZ256rmbk |
| 30979 | { 11121, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91aff0022819ULL }, // Inst #11121 = VMAXCPDZ256rmb |
| 30980 | { 11120, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aff0022819ULL }, // Inst #11120 = VMAXCPDZ256rm |
| 30981 | { 11119, 4, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1633, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6aff0022829ULL }, // Inst #11119 = VMAXCPDZ128rrkz |
| 30982 | { 11118, 5, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2aff0022829ULL }, // Inst #11118 = VMAXCPDZ128rrk |
| 30983 | { 11117, 3, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0aff0022829ULL }, // Inst #11117 = VMAXCPDZ128rr |
| 30984 | { 11116, 8, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aff0022819ULL }, // Inst #11116 = VMAXCPDZ128rmkz |
| 30985 | { 11115, 9, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aff0022819ULL }, // Inst #11115 = VMAXCPDZ128rmk |
| 30986 | { 11114, 8, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96aff0022819ULL }, // Inst #11114 = VMAXCPDZ128rmbkz |
| 30987 | { 11113, 9, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92aff0022819ULL }, // Inst #11113 = VMAXCPDZ128rmbk |
| 30988 | { 11112, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90aff0022819ULL }, // Inst #11112 = VMAXCPDZ128rmb |
| 30989 | { 11111, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aff0022819ULL }, // Inst #11111 = VMAXCPDZ128rm |
| 30990 | { 11110, 3, 1, 0, 369, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1afb0002829ULL }, // Inst #11110 = VMAXCPDYrr |
| 30991 | { 11109, 7, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afb0002819ULL }, // Inst #11109 = VMAXCPDYrm |
| 30992 | { 11108, 7, 1, 0, 465, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9628004819ULL }, // Inst #11108 = VMASKMOVPSrm |
| 30993 | { 11107, 7, 0, 0, 467, 0, 0, X86ImpOpBase + 0, 4683, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x9728004818ULL }, // Inst #11107 = VMASKMOVPSmr |
| 30994 | { 11106, 7, 1, 0, 463, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x19628004819ULL }, // Inst #11106 = VMASKMOVPSYrm |
| 30995 | { 11105, 7, 0, 0, 466, 0, 0, X86ImpOpBase + 0, 4676, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x19728004818ULL }, // Inst #11105 = VMASKMOVPSYmr |
| 30996 | { 11104, 7, 1, 0, 465, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x96b0004819ULL }, // Inst #11104 = VMASKMOVPDrm |
| 30997 | { 11103, 7, 0, 0, 464, 0, 0, X86ImpOpBase + 0, 4683, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x97b0004818ULL }, // Inst #11103 = VMASKMOVPDmr |
| 30998 | { 11102, 7, 1, 0, 463, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x196b0004819ULL }, // Inst #11102 = VMASKMOVPDYrm |
| 30999 | { 11101, 7, 0, 0, 462, 0, 0, X86ImpOpBase + 0, 4676, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x197b0004818ULL }, // Inst #11101 = VMASKMOVPDYmr |
| 31000 | { 11100, 2, 0, 0, 948, 1, 0, X86ImpOpBase + 331, 535, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7bb8002829ULL }, // Inst #11100 = VMASKMOVDQU64 |
| 31001 | { 11099, 2, 0, 0, 948, 1, 0, X86ImpOpBase + 330, 535, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7bb8002829ULL }, // Inst #11099 = VMASKMOVDQU |
| 31002 | { 11098, 5, 0, 0, 1633, 0, 1, X86ImpOpBase + 78, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5728002022ULL }, // Inst #11098 = VLDMXCSR |
| 31003 | { 11097, 6, 1, 0, 186, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x7830003819ULL }, // Inst #11097 = VLDDQUrm |
| 31004 | { 11096, 6, 1, 0, 461, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x17830003819ULL }, // Inst #11096 = VLDDQUYrm |
| 31005 | { 11095, 4, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0x90a8046829ULL }, // Inst #11095 = VINSERTPSrr |
| 31006 | { 11094, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0x90a8046819ULL }, // Inst #11094 = VINSERTPSrm |
| 31007 | { 11093, 4, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 897, 0|(1ULL<<MCID::Commutable), 0xa090e8046829ULL }, // Inst #11093 = VINSERTPSZrr |
| 31008 | { 11092, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x6090e8046819ULL }, // Inst #11092 = VINSERTPSZrm |
| 31009 | { 11091, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4671, 0, 0xee9d78066829ULL }, // Inst #11091 = VINSERTI64x4Zrrkz |
| 31010 | { 11090, 6, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4665, 0, 0xea9d78066829ULL }, // Inst #11090 = VINSERTI64x4Zrrk |
| 31011 | { 11089, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4628, 0, 0xe89d78066829ULL }, // Inst #11089 = VINSERTI64x4Zrr |
| 31012 | { 11088, 9, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0xce9d78066819ULL }, // Inst #11088 = VINSERTI64x4Zrmkz |
| 31013 | { 11087, 10, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xca9d78066819ULL }, // Inst #11087 = VINSERTI64x4Zrmk |
| 31014 | { 11086, 8, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xc89d78066819ULL }, // Inst #11086 = VINSERTI64x4Zrm |
| 31015 | { 11085, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4660, 0, 0xee9c78066829ULL }, // Inst #11085 = VINSERTI64x2Zrrkz |
| 31016 | { 11084, 6, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4654, 0, 0xea9c78066829ULL }, // Inst #11084 = VINSERTI64x2Zrrk |
| 31017 | { 11083, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4613, 0, 0xe89c78066829ULL }, // Inst #11083 = VINSERTI64x2Zrr |
| 31018 | { 11082, 9, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0xae9c78066819ULL }, // Inst #11082 = VINSERTI64x2Zrmkz |
| 31019 | { 11081, 10, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xaa9c78066819ULL }, // Inst #11081 = VINSERTI64x2Zrmk |
| 31020 | { 11080, 8, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xa89c78066819ULL }, // Inst #11080 = VINSERTI64x2Zrm |
| 31021 | { 11079, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4649, 0, 0xc79c78066829ULL }, // Inst #11079 = VINSERTI64x2Z256rrkz |
| 31022 | { 11078, 6, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4643, 0, 0xc39c78066829ULL }, // Inst #11078 = VINSERTI64x2Z256rrk |
| 31023 | { 11077, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4598, 0, 0xc19c78066829ULL }, // Inst #11077 = VINSERTI64x2Z256rr |
| 31024 | { 11076, 9, 1, 0, 1318, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0xa79c78066819ULL }, // Inst #11076 = VINSERTI64x2Z256rmkz |
| 31025 | { 11075, 10, 1, 0, 1318, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0xa39c78066819ULL }, // Inst #11075 = VINSERTI64x2Z256rmk |
| 31026 | { 11074, 8, 1, 0, 1318, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xa19c78066819ULL }, // Inst #11074 = VINSERTI64x2Z256rm |
| 31027 | { 11073, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4638, 0, 0xee9d78046829ULL }, // Inst #11073 = VINSERTI32x8Zrrkz |
| 31028 | { 11072, 6, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4632, 0, 0xea9d78046829ULL }, // Inst #11072 = VINSERTI32x8Zrrk |
| 31029 | { 11071, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4628, 0, 0xe89d78046829ULL }, // Inst #11071 = VINSERTI32x8Zrr |
| 31030 | { 11070, 9, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0xce9d78046819ULL }, // Inst #11070 = VINSERTI32x8Zrmkz |
| 31031 | { 11069, 10, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xca9d78046819ULL }, // Inst #11069 = VINSERTI32x8Zrmk |
| 31032 | { 11068, 8, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xc89d78046819ULL }, // Inst #11068 = VINSERTI32x8Zrm |
| 31033 | { 11067, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4623, 0, 0xee9c78046829ULL }, // Inst #11067 = VINSERTI32x4Zrrkz |
| 31034 | { 11066, 6, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4617, 0, 0xea9c78046829ULL }, // Inst #11066 = VINSERTI32x4Zrrk |
| 31035 | { 11065, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4613, 0, 0xe89c78046829ULL }, // Inst #11065 = VINSERTI32x4Zrr |
| 31036 | { 11064, 9, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0xae9c78046819ULL }, // Inst #11064 = VINSERTI32x4Zrmkz |
| 31037 | { 11063, 10, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xaa9c78046819ULL }, // Inst #11063 = VINSERTI32x4Zrmk |
| 31038 | { 11062, 8, 1, 0, 1798, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xa89c78046819ULL }, // Inst #11062 = VINSERTI32x4Zrm |
| 31039 | { 11061, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4608, 0, 0xc79c78046829ULL }, // Inst #11061 = VINSERTI32x4Z256rrkz |
| 31040 | { 11060, 6, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4602, 0, 0xc39c78046829ULL }, // Inst #11060 = VINSERTI32x4Z256rrk |
| 31041 | { 11059, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 4598, 0, 0xc19c78046829ULL }, // Inst #11059 = VINSERTI32x4Z256rr |
| 31042 | { 11058, 9, 1, 0, 1318, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0xa79c78046819ULL }, // Inst #11058 = VINSERTI32x4Z256rmkz |
| 31043 | { 11057, 10, 1, 0, 1318, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0xa39c78046819ULL }, // Inst #11057 = VINSERTI32x4Z256rmk |
| 31044 | { 11056, 8, 1, 0, 1318, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xa19c78046819ULL }, // Inst #11056 = VINSERTI32x4Z256rm |
| 31045 | { 11055, 4, 1, 0, 974, 0, 0, X86ImpOpBase + 0, 4594, 0, 0x19c38046829ULL }, // Inst #11055 = VINSERTI128rr |
| 31046 | { 11054, 8, 1, 0, 854, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x19c38046819ULL }, // Inst #11054 = VINSERTI128rm |
| 31047 | { 11053, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4671, 0, 0xee8d70066829ULL }, // Inst #11053 = VINSERTF64x4Zrrkz |
| 31048 | { 11052, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4665, 0, 0xea8d70066829ULL }, // Inst #11052 = VINSERTF64x4Zrrk |
| 31049 | { 11051, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4628, 0, 0xe88d70066829ULL }, // Inst #11051 = VINSERTF64x4Zrr |
| 31050 | { 11050, 9, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0xce8d70066819ULL }, // Inst #11050 = VINSERTF64x4Zrmkz |
| 31051 | { 11049, 10, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xca8d70066819ULL }, // Inst #11049 = VINSERTF64x4Zrmk |
| 31052 | { 11048, 8, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xc88d70066819ULL }, // Inst #11048 = VINSERTF64x4Zrm |
| 31053 | { 11047, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4660, 0, 0xee8c70066829ULL }, // Inst #11047 = VINSERTF64x2Zrrkz |
| 31054 | { 11046, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4654, 0, 0xea8c70066829ULL }, // Inst #11046 = VINSERTF64x2Zrrk |
| 31055 | { 11045, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4613, 0, 0xe88c70066829ULL }, // Inst #11045 = VINSERTF64x2Zrr |
| 31056 | { 11044, 9, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0xae8c70066819ULL }, // Inst #11044 = VINSERTF64x2Zrmkz |
| 31057 | { 11043, 10, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xaa8c70066819ULL }, // Inst #11043 = VINSERTF64x2Zrmk |
| 31058 | { 11042, 8, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xa88c70066819ULL }, // Inst #11042 = VINSERTF64x2Zrm |
| 31059 | { 11041, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4649, 0, 0xc78c70066829ULL }, // Inst #11041 = VINSERTF64x2Z256rrkz |
| 31060 | { 11040, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4643, 0, 0xc38c70066829ULL }, // Inst #11040 = VINSERTF64x2Z256rrk |
| 31061 | { 11039, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4598, 0, 0xc18c70066829ULL }, // Inst #11039 = VINSERTF64x2Z256rr |
| 31062 | { 11038, 9, 1, 0, 1317, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0xa78c70066819ULL }, // Inst #11038 = VINSERTF64x2Z256rmkz |
| 31063 | { 11037, 10, 1, 0, 1317, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0xa38c70066819ULL }, // Inst #11037 = VINSERTF64x2Z256rmk |
| 31064 | { 11036, 8, 1, 0, 1317, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xa18c70066819ULL }, // Inst #11036 = VINSERTF64x2Z256rm |
| 31065 | { 11035, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4638, 0, 0xee8d68046829ULL }, // Inst #11035 = VINSERTF32x8Zrrkz |
| 31066 | { 11034, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4632, 0, 0xea8d68046829ULL }, // Inst #11034 = VINSERTF32x8Zrrk |
| 31067 | { 11033, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4628, 0, 0xe88d68046829ULL }, // Inst #11033 = VINSERTF32x8Zrr |
| 31068 | { 11032, 9, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0xce8d68046819ULL }, // Inst #11032 = VINSERTF32x8Zrmkz |
| 31069 | { 11031, 10, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xca8d68046819ULL }, // Inst #11031 = VINSERTF32x8Zrmk |
| 31070 | { 11030, 8, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xc88d68046819ULL }, // Inst #11030 = VINSERTF32x8Zrm |
| 31071 | { 11029, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4623, 0, 0xee8c68046829ULL }, // Inst #11029 = VINSERTF32x4Zrrkz |
| 31072 | { 11028, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4617, 0, 0xea8c68046829ULL }, // Inst #11028 = VINSERTF32x4Zrrk |
| 31073 | { 11027, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4613, 0, 0xe88c68046829ULL }, // Inst #11027 = VINSERTF32x4Zrr |
| 31074 | { 11026, 9, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0xae8c68046819ULL }, // Inst #11026 = VINSERTF32x4Zrmkz |
| 31075 | { 11025, 10, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xaa8c68046819ULL }, // Inst #11025 = VINSERTF32x4Zrmk |
| 31076 | { 11024, 8, 1, 0, 1797, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xa88c68046819ULL }, // Inst #11024 = VINSERTF32x4Zrm |
| 31077 | { 11023, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4608, 0, 0xc78c68046829ULL }, // Inst #11023 = VINSERTF32x4Z256rrkz |
| 31078 | { 11022, 6, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4602, 0, 0xc38c68046829ULL }, // Inst #11022 = VINSERTF32x4Z256rrk |
| 31079 | { 11021, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 4598, 0, 0xc18c68046829ULL }, // Inst #11021 = VINSERTF32x4Z256rr |
| 31080 | { 11020, 9, 1, 0, 1317, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0xa78c68046819ULL }, // Inst #11020 = VINSERTF32x4Z256rmkz |
| 31081 | { 11019, 10, 1, 0, 1317, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0xa38c68046819ULL }, // Inst #11019 = VINSERTF32x4Z256rmk |
| 31082 | { 11018, 8, 1, 0, 1317, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xa18c68046819ULL }, // Inst #11018 = VINSERTF32x4Z256rm |
| 31083 | { 11017, 4, 1, 0, 973, 0, 0, X86ImpOpBase + 0, 4594, 0, 0x18c28046829ULL }, // Inst #11017 = VINSERTF128rr |
| 31084 | { 11016, 8, 1, 0, 780, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x18c28046819ULL }, // Inst #11016 = VINSERTF128rm |
| 31085 | { 11015, 3, 1, 0, 1632, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xbea8003829ULL }, // Inst #11015 = VHSUBPSrr |
| 31086 | { 11014, 7, 1, 0, 151, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbea8003819ULL }, // Inst #11014 = VHSUBPSrm |
| 31087 | { 11013, 3, 1, 0, 458, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1bea8003829ULL }, // Inst #11013 = VHSUBPSYrr |
| 31088 | { 11012, 7, 1, 0, 457, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1bea8003819ULL }, // Inst #11012 = VHSUBPSYrm |
| 31089 | { 11011, 3, 1, 0, 1632, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xbeb0002829ULL }, // Inst #11011 = VHSUBPDrr |
| 31090 | { 11010, 7, 1, 0, 151, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbeb0002819ULL }, // Inst #11010 = VHSUBPDrm |
| 31091 | { 11009, 3, 1, 0, 458, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1beb0002829ULL }, // Inst #11009 = VHSUBPDYrr |
| 31092 | { 11008, 7, 1, 0, 457, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1beb0002819ULL }, // Inst #11008 = VHSUBPDYrm |
| 31093 | { 11007, 3, 1, 0, 1632, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xbe28003829ULL }, // Inst #11007 = VHADDPSrr |
| 31094 | { 11006, 7, 1, 0, 151, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbe28003819ULL }, // Inst #11006 = VHADDPSrm |
| 31095 | { 11005, 3, 1, 0, 458, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1be28003829ULL }, // Inst #11005 = VHADDPSYrr |
| 31096 | { 11004, 7, 1, 0, 457, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1be28003819ULL }, // Inst #11004 = VHADDPSYrm |
| 31097 | { 11003, 3, 1, 0, 1632, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xbe30002829ULL }, // Inst #11003 = VHADDPDrr |
| 31098 | { 11002, 7, 1, 0, 151, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbe30002819ULL }, // Inst #11002 = VHADDPDrm |
| 31099 | { 11001, 3, 1, 0, 458, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1be30002829ULL }, // Inst #11001 = VHADDPDYrr |
| 31100 | { 11000, 7, 1, 0, 457, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1be30002819ULL }, // Inst #11000 = VHADDPDYrm |
| 31101 | { 10999, 3, 1, 0, 1504, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xe7b8004829ULL }, // Inst #10999 = VGF2P8MULBrr |
| 31102 | { 10998, 7, 1, 0, 1501, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xe7b8004819ULL }, // Inst #10998 = VGF2P8MULBrm |
| 31103 | { 10997, 4, 1, 0, 2217, 0, 0, X86ImpOpBase + 0, 4590, 0|(1ULL<<MCID::Commutable), 0xeee7f8004829ULL }, // Inst #10997 = VGF2P8MULBZrrkz |
| 31104 | { 10996, 5, 1, 0, 2215, 0, 0, X86ImpOpBase + 0, 4585, 0|(1ULL<<MCID::Commutable), 0xeae7f8004829ULL }, // Inst #10996 = VGF2P8MULBZrrk |
| 31105 | { 10995, 3, 1, 0, 1887, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8e7f8004829ULL }, // Inst #10995 = VGF2P8MULBZrr |
| 31106 | { 10994, 8, 1, 0, 2213, 0, 0, X86ImpOpBase + 0, 4577, 0|(1ULL<<MCID::MayLoad), 0xeee7f8004819ULL }, // Inst #10994 = VGF2P8MULBZrmkz |
| 31107 | { 10993, 9, 1, 0, 2213, 0, 0, X86ImpOpBase + 0, 4568, 0|(1ULL<<MCID::MayLoad), 0xeae7f8004819ULL }, // Inst #10993 = VGF2P8MULBZrmk |
| 31108 | { 10992, 7, 1, 0, 1909, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8e7f8004819ULL }, // Inst #10992 = VGF2P8MULBZrm |
| 31109 | { 10991, 4, 1, 0, 2211, 0, 0, X86ImpOpBase + 0, 4564, 0|(1ULL<<MCID::Commutable), 0xc7e7f8004829ULL }, // Inst #10991 = VGF2P8MULBZ256rrkz |
| 31110 | { 10990, 5, 1, 0, 2207, 0, 0, X86ImpOpBase + 0, 4559, 0|(1ULL<<MCID::Commutable), 0xc3e7f8004829ULL }, // Inst #10990 = VGF2P8MULBZ256rrk |
| 31111 | { 10989, 3, 1, 0, 1746, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1e7f8004829ULL }, // Inst #10989 = VGF2P8MULBZ256rr |
| 31112 | { 10988, 8, 1, 0, 2203, 0, 0, X86ImpOpBase + 0, 4551, 0|(1ULL<<MCID::MayLoad), 0xc7e7f8004819ULL }, // Inst #10988 = VGF2P8MULBZ256rmkz |
| 31113 | { 10987, 9, 1, 0, 2203, 0, 0, X86ImpOpBase + 0, 4542, 0|(1ULL<<MCID::MayLoad), 0xc3e7f8004819ULL }, // Inst #10987 = VGF2P8MULBZ256rmk |
| 31114 | { 10986, 7, 1, 0, 1730, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1e7f8004819ULL }, // Inst #10986 = VGF2P8MULBZ256rm |
| 31115 | { 10985, 4, 1, 0, 2210, 0, 0, X86ImpOpBase + 0, 4538, 0|(1ULL<<MCID::Commutable), 0xa6e7f8004829ULL }, // Inst #10985 = VGF2P8MULBZ128rrkz |
| 31116 | { 10984, 5, 1, 0, 2206, 0, 0, X86ImpOpBase + 0, 4533, 0|(1ULL<<MCID::Commutable), 0xa2e7f8004829ULL }, // Inst #10984 = VGF2P8MULBZ128rrk |
| 31117 | { 10983, 3, 1, 0, 1745, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0e7f8004829ULL }, // Inst #10983 = VGF2P8MULBZ128rr |
| 31118 | { 10982, 8, 1, 0, 2201, 0, 0, X86ImpOpBase + 0, 4525, 0|(1ULL<<MCID::MayLoad), 0xa6e7f8004819ULL }, // Inst #10982 = VGF2P8MULBZ128rmkz |
| 31119 | { 10981, 9, 1, 0, 2201, 0, 0, X86ImpOpBase + 0, 4516, 0|(1ULL<<MCID::MayLoad), 0xa2e7f8004819ULL }, // Inst #10981 = VGF2P8MULBZ128rmk |
| 31120 | { 10980, 7, 1, 0, 1724, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0e7f8004819ULL }, // Inst #10980 = VGF2P8MULBZ128rm |
| 31121 | { 10979, 3, 1, 0, 1505, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1e7b8004829ULL }, // Inst #10979 = VGF2P8MULBYrr |
| 31122 | { 10978, 7, 1, 0, 1503, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1e7b8004819ULL }, // Inst #10978 = VGF2P8MULBYrm |
| 31123 | { 10977, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 893, 0, 0xe738066829ULL }, // Inst #10977 = VGF2P8AFFINEQBrri |
| 31124 | { 10976, 8, 1, 0, 1500, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xe738066819ULL }, // Inst #10976 = VGF2P8AFFINEQBrmi |
| 31125 | { 10975, 5, 1, 0, 2216, 0, 0, X86ImpOpBase + 0, 4511, 0, 0xeee778066829ULL }, // Inst #10975 = VGF2P8AFFINEQBZrrikz |
| 31126 | { 10974, 6, 1, 0, 2214, 0, 0, X86ImpOpBase + 0, 4505, 0, 0xeae778066829ULL }, // Inst #10974 = VGF2P8AFFINEQBZrrik |
| 31127 | { 10973, 4, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8e778066829ULL }, // Inst #10973 = VGF2P8AFFINEQBZrri |
| 31128 | { 10972, 9, 1, 0, 2212, 0, 0, X86ImpOpBase + 0, 4496, 0|(1ULL<<MCID::MayLoad), 0xeee778066819ULL }, // Inst #10972 = VGF2P8AFFINEQBZrmikz |
| 31129 | { 10971, 10, 1, 0, 2212, 0, 0, X86ImpOpBase + 0, 4486, 0|(1ULL<<MCID::MayLoad), 0xeae778066819ULL }, // Inst #10971 = VGF2P8AFFINEQBZrmik |
| 31130 | { 10970, 8, 1, 0, 1908, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8e778066819ULL }, // Inst #10970 = VGF2P8AFFINEQBZrmi |
| 31131 | { 10969, 9, 1, 0, 2212, 0, 0, X86ImpOpBase + 0, 4496, 0|(1ULL<<MCID::MayLoad), 0x3ee778066819ULL }, // Inst #10969 = VGF2P8AFFINEQBZrmbikz |
| 31132 | { 10968, 10, 1, 0, 2212, 0, 0, X86ImpOpBase + 0, 4486, 0|(1ULL<<MCID::MayLoad), 0x3ae778066819ULL }, // Inst #10968 = VGF2P8AFFINEQBZrmbik |
| 31133 | { 10967, 8, 1, 0, 1908, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x38e778066819ULL }, // Inst #10967 = VGF2P8AFFINEQBZrmbi |
| 31134 | { 10966, 5, 1, 0, 2209, 0, 0, X86ImpOpBase + 0, 4481, 0, 0xc7e778066829ULL }, // Inst #10966 = VGF2P8AFFINEQBZ256rrikz |
| 31135 | { 10965, 6, 1, 0, 2205, 0, 0, X86ImpOpBase + 0, 4475, 0, 0xc3e778066829ULL }, // Inst #10965 = VGF2P8AFFINEQBZ256rrik |
| 31136 | { 10964, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1e778066829ULL }, // Inst #10964 = VGF2P8AFFINEQBZ256rri |
| 31137 | { 10963, 9, 1, 0, 2202, 0, 0, X86ImpOpBase + 0, 4466, 0|(1ULL<<MCID::MayLoad), 0xc7e778066819ULL }, // Inst #10963 = VGF2P8AFFINEQBZ256rmikz |
| 31138 | { 10962, 10, 1, 0, 2202, 0, 0, X86ImpOpBase + 0, 4456, 0|(1ULL<<MCID::MayLoad), 0xc3e778066819ULL }, // Inst #10962 = VGF2P8AFFINEQBZ256rmik |
| 31139 | { 10961, 8, 1, 0, 1729, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1e778066819ULL }, // Inst #10961 = VGF2P8AFFINEQBZ256rmi |
| 31140 | { 10960, 9, 1, 0, 2202, 0, 0, X86ImpOpBase + 0, 4466, 0|(1ULL<<MCID::MayLoad), 0x37e778066819ULL }, // Inst #10960 = VGF2P8AFFINEQBZ256rmbikz |
| 31141 | { 10959, 10, 1, 0, 2202, 0, 0, X86ImpOpBase + 0, 4456, 0|(1ULL<<MCID::MayLoad), 0x33e778066819ULL }, // Inst #10959 = VGF2P8AFFINEQBZ256rmbik |
| 31142 | { 10958, 8, 1, 0, 1729, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x31e778066819ULL }, // Inst #10958 = VGF2P8AFFINEQBZ256rmbi |
| 31143 | { 10957, 5, 1, 0, 2208, 0, 0, X86ImpOpBase + 0, 4451, 0, 0xa6e778066829ULL }, // Inst #10957 = VGF2P8AFFINEQBZ128rrikz |
| 31144 | { 10956, 6, 1, 0, 2204, 0, 0, X86ImpOpBase + 0, 4445, 0, 0xa2e778066829ULL }, // Inst #10956 = VGF2P8AFFINEQBZ128rrik |
| 31145 | { 10955, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0e778066829ULL }, // Inst #10955 = VGF2P8AFFINEQBZ128rri |
| 31146 | { 10954, 9, 1, 0, 2200, 0, 0, X86ImpOpBase + 0, 4436, 0|(1ULL<<MCID::MayLoad), 0xa6e778066819ULL }, // Inst #10954 = VGF2P8AFFINEQBZ128rmikz |
| 31147 | { 10953, 10, 1, 0, 2200, 0, 0, X86ImpOpBase + 0, 4426, 0|(1ULL<<MCID::MayLoad), 0xa2e778066819ULL }, // Inst #10953 = VGF2P8AFFINEQBZ128rmik |
| 31148 | { 10952, 8, 1, 0, 1720, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0e778066819ULL }, // Inst #10952 = VGF2P8AFFINEQBZ128rmi |
| 31149 | { 10951, 9, 1, 0, 2200, 0, 0, X86ImpOpBase + 0, 4436, 0|(1ULL<<MCID::MayLoad), 0x36e778066819ULL }, // Inst #10951 = VGF2P8AFFINEQBZ128rmbikz |
| 31150 | { 10950, 10, 1, 0, 2200, 0, 0, X86ImpOpBase + 0, 4426, 0|(1ULL<<MCID::MayLoad), 0x32e778066819ULL }, // Inst #10950 = VGF2P8AFFINEQBZ128rmbik |
| 31151 | { 10949, 8, 1, 0, 1720, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x30e778066819ULL }, // Inst #10949 = VGF2P8AFFINEQBZ128rmbi |
| 31152 | { 10948, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 901, 0, 0x1e738066829ULL }, // Inst #10948 = VGF2P8AFFINEQBYrri |
| 31153 | { 10947, 8, 1, 0, 1502, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x1e738066819ULL }, // Inst #10947 = VGF2P8AFFINEQBYrmi |
| 31154 | { 10946, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 893, 0, 0xe7b8066829ULL }, // Inst #10946 = VGF2P8AFFINEINVQBrri |
| 31155 | { 10945, 8, 1, 0, 1500, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0xe7b8066819ULL }, // Inst #10945 = VGF2P8AFFINEINVQBrmi |
| 31156 | { 10944, 5, 1, 0, 2216, 0, 0, X86ImpOpBase + 0, 4511, 0, 0xeee7f8066829ULL }, // Inst #10944 = VGF2P8AFFINEINVQBZrrikz |
| 31157 | { 10943, 6, 1, 0, 2214, 0, 0, X86ImpOpBase + 0, 4505, 0, 0xeae7f8066829ULL }, // Inst #10943 = VGF2P8AFFINEINVQBZrrik |
| 31158 | { 10942, 4, 1, 0, 452, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8e7f8066829ULL }, // Inst #10942 = VGF2P8AFFINEINVQBZrri |
| 31159 | { 10941, 9, 1, 0, 2212, 0, 0, X86ImpOpBase + 0, 4496, 0|(1ULL<<MCID::MayLoad), 0xeee7f8066819ULL }, // Inst #10941 = VGF2P8AFFINEINVQBZrmikz |
| 31160 | { 10940, 10, 1, 0, 2212, 0, 0, X86ImpOpBase + 0, 4486, 0|(1ULL<<MCID::MayLoad), 0xeae7f8066819ULL }, // Inst #10940 = VGF2P8AFFINEINVQBZrmik |
| 31161 | { 10939, 8, 1, 0, 1908, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8e7f8066819ULL }, // Inst #10939 = VGF2P8AFFINEINVQBZrmi |
| 31162 | { 10938, 9, 1, 0, 2212, 0, 0, X86ImpOpBase + 0, 4496, 0|(1ULL<<MCID::MayLoad), 0x3ee7f8066819ULL }, // Inst #10938 = VGF2P8AFFINEINVQBZrmbikz |
| 31163 | { 10937, 10, 1, 0, 2212, 0, 0, X86ImpOpBase + 0, 4486, 0|(1ULL<<MCID::MayLoad), 0x3ae7f8066819ULL }, // Inst #10937 = VGF2P8AFFINEINVQBZrmbik |
| 31164 | { 10936, 8, 1, 0, 1908, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x38e7f8066819ULL }, // Inst #10936 = VGF2P8AFFINEINVQBZrmbi |
| 31165 | { 10935, 5, 1, 0, 2209, 0, 0, X86ImpOpBase + 0, 4481, 0, 0xc7e7f8066829ULL }, // Inst #10935 = VGF2P8AFFINEINVQBZ256rrikz |
| 31166 | { 10934, 6, 1, 0, 2205, 0, 0, X86ImpOpBase + 0, 4475, 0, 0xc3e7f8066829ULL }, // Inst #10934 = VGF2P8AFFINEINVQBZ256rrik |
| 31167 | { 10933, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1e7f8066829ULL }, // Inst #10933 = VGF2P8AFFINEINVQBZ256rri |
| 31168 | { 10932, 9, 1, 0, 2202, 0, 0, X86ImpOpBase + 0, 4466, 0|(1ULL<<MCID::MayLoad), 0xc7e7f8066819ULL }, // Inst #10932 = VGF2P8AFFINEINVQBZ256rmikz |
| 31169 | { 10931, 10, 1, 0, 2202, 0, 0, X86ImpOpBase + 0, 4456, 0|(1ULL<<MCID::MayLoad), 0xc3e7f8066819ULL }, // Inst #10931 = VGF2P8AFFINEINVQBZ256rmik |
| 31170 | { 10930, 8, 1, 0, 1729, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1e7f8066819ULL }, // Inst #10930 = VGF2P8AFFINEINVQBZ256rmi |
| 31171 | { 10929, 9, 1, 0, 2202, 0, 0, X86ImpOpBase + 0, 4466, 0|(1ULL<<MCID::MayLoad), 0x37e7f8066819ULL }, // Inst #10929 = VGF2P8AFFINEINVQBZ256rmbikz |
| 31172 | { 10928, 10, 1, 0, 2202, 0, 0, X86ImpOpBase + 0, 4456, 0|(1ULL<<MCID::MayLoad), 0x33e7f8066819ULL }, // Inst #10928 = VGF2P8AFFINEINVQBZ256rmbik |
| 31173 | { 10927, 8, 1, 0, 1729, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x31e7f8066819ULL }, // Inst #10927 = VGF2P8AFFINEINVQBZ256rmbi |
| 31174 | { 10926, 5, 1, 0, 2208, 0, 0, X86ImpOpBase + 0, 4451, 0, 0xa6e7f8066829ULL }, // Inst #10926 = VGF2P8AFFINEINVQBZ128rrikz |
| 31175 | { 10925, 6, 1, 0, 2204, 0, 0, X86ImpOpBase + 0, 4445, 0, 0xa2e7f8066829ULL }, // Inst #10925 = VGF2P8AFFINEINVQBZ128rrik |
| 31176 | { 10924, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0e7f8066829ULL }, // Inst #10924 = VGF2P8AFFINEINVQBZ128rri |
| 31177 | { 10923, 9, 1, 0, 2200, 0, 0, X86ImpOpBase + 0, 4436, 0|(1ULL<<MCID::MayLoad), 0xa6e7f8066819ULL }, // Inst #10923 = VGF2P8AFFINEINVQBZ128rmikz |
| 31178 | { 10922, 10, 1, 0, 2200, 0, 0, X86ImpOpBase + 0, 4426, 0|(1ULL<<MCID::MayLoad), 0xa2e7f8066819ULL }, // Inst #10922 = VGF2P8AFFINEINVQBZ128rmik |
| 31179 | { 10921, 8, 1, 0, 1720, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0e7f8066819ULL }, // Inst #10921 = VGF2P8AFFINEINVQBZ128rmi |
| 31180 | { 10920, 9, 1, 0, 2200, 0, 0, X86ImpOpBase + 0, 4436, 0|(1ULL<<MCID::MayLoad), 0x36e7f8066819ULL }, // Inst #10920 = VGF2P8AFFINEINVQBZ128rmbikz |
| 31181 | { 10919, 10, 1, 0, 2200, 0, 0, X86ImpOpBase + 0, 4426, 0|(1ULL<<MCID::MayLoad), 0x32e7f8066819ULL }, // Inst #10919 = VGF2P8AFFINEINVQBZ128rmbik |
| 31182 | { 10918, 8, 1, 0, 1720, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x30e7f8066819ULL }, // Inst #10918 = VGF2P8AFFINEINVQBZ128rmbi |
| 31183 | { 10917, 4, 1, 0, 450, 0, 0, X86ImpOpBase + 0, 901, 0, 0x1e7b8066829ULL }, // Inst #10917 = VGF2P8AFFINEINVQBYrri |
| 31184 | { 10916, 8, 1, 0, 1502, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x1e7b8066819ULL }, // Inst #10916 = VGF2P8AFFINEINVQBYrmi |
| 31185 | { 10915, 5, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x6693e8046829ULL }, // Inst #10915 = VGETMANTSSZrrikz |
| 31186 | { 10914, 6, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x6293e8046829ULL }, // Inst #10914 = VGETMANTSSZrrik |
| 31187 | { 10913, 5, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x7693e8046829ULL }, // Inst #10913 = VGETMANTSSZrribkz |
| 31188 | { 10912, 6, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x7293e8046829ULL }, // Inst #10912 = VGETMANTSSZrribk |
| 31189 | { 10911, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 897, 0, 0x7093e8046829ULL }, // Inst #10911 = VGETMANTSSZrrib |
| 31190 | { 10910, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x6093e8046829ULL }, // Inst #10910 = VGETMANTSSZrri |
| 31191 | { 10909, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6693e8046819ULL }, // Inst #10909 = VGETMANTSSZrmikz |
| 31192 | { 10908, 10, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6293e8046819ULL }, // Inst #10908 = VGETMANTSSZrmik |
| 31193 | { 10907, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6093e8046819ULL }, // Inst #10907 = VGETMANTSSZrmi |
| 31194 | { 10906, 5, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x4693e8046029ULL }, // Inst #10906 = VGETMANTSHZrrikz |
| 31195 | { 10905, 6, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x4293e8046029ULL }, // Inst #10905 = VGETMANTSHZrrik |
| 31196 | { 10904, 5, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x5693e8046029ULL }, // Inst #10904 = VGETMANTSHZrribkz |
| 31197 | { 10903, 6, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x5293e8046029ULL }, // Inst #10903 = VGETMANTSHZrribk |
| 31198 | { 10902, 4, 1, 0, 1743, 1, 0, X86ImpOpBase + 78, 897, 0, 0x5093e8046029ULL }, // Inst #10902 = VGETMANTSHZrrib |
| 31199 | { 10901, 4, 1, 0, 1743, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x4093e8046029ULL }, // Inst #10901 = VGETMANTSHZrri |
| 31200 | { 10900, 9, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4693e8046019ULL }, // Inst #10900 = VGETMANTSHZrmikz |
| 31201 | { 10899, 10, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4293e8046019ULL }, // Inst #10899 = VGETMANTSHZrmik |
| 31202 | { 10898, 8, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4093e8046019ULL }, // Inst #10898 = VGETMANTSHZrmi |
| 31203 | { 10897, 5, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 4421, 0|(1ULL<<MCID::MayRaiseFPException), 0x8693f0066829ULL }, // Inst #10897 = VGETMANTSDZrrikz |
| 31204 | { 10896, 6, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x8293f0066829ULL }, // Inst #10896 = VGETMANTSDZrrik |
| 31205 | { 10895, 5, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 4421, 0, 0x9693f0066829ULL }, // Inst #10895 = VGETMANTSDZrribkz |
| 31206 | { 10894, 6, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x9293f0066829ULL }, // Inst #10894 = VGETMANTSDZrribk |
| 31207 | { 10893, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 897, 0, 0x9093f0066829ULL }, // Inst #10893 = VGETMANTSDZrrib |
| 31208 | { 10892, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 897, 0|(1ULL<<MCID::MayRaiseFPException), 0x8093f0066829ULL }, // Inst #10892 = VGETMANTSDZrri |
| 31209 | { 10891, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4412, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8693f0066819ULL }, // Inst #10891 = VGETMANTSDZrmikz |
| 31210 | { 10890, 10, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8293f0066819ULL }, // Inst #10890 = VGETMANTSDZrmik |
| 31211 | { 10889, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 1985, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8093f0066819ULL }, // Inst #10889 = VGETMANTSDZrmi |
| 31212 | { 10888, 4, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4408, 0|(1ULL<<MCID::MayRaiseFPException), 0xee1368046829ULL }, // Inst #10888 = VGETMANTPSZrrikz |
| 31213 | { 10887, 5, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4403, 0|(1ULL<<MCID::MayRaiseFPException), 0xea1368046829ULL }, // Inst #10887 = VGETMANTPSZrrik |
| 31214 | { 10886, 4, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4408, 0, 0x7e1368046829ULL }, // Inst #10886 = VGETMANTPSZrribkz |
| 31215 | { 10885, 5, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4403, 0, 0x7a1368046829ULL }, // Inst #10885 = VGETMANTPSZrribk |
| 31216 | { 10884, 3, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4253, 0, 0x781368046829ULL }, // Inst #10884 = VGETMANTPSZrrib |
| 31217 | { 10883, 3, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4253, 0|(1ULL<<MCID::MayRaiseFPException), 0xe81368046829ULL }, // Inst #10883 = VGETMANTPSZrri |
| 31218 | { 10882, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4395, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee1368046819ULL }, // Inst #10882 = VGETMANTPSZrmikz |
| 31219 | { 10881, 9, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4386, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea1368046819ULL }, // Inst #10881 = VGETMANTPSZrmik |
| 31220 | { 10880, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe81368046819ULL }, // Inst #10880 = VGETMANTPSZrmi |
| 31221 | { 10879, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4395, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e1368046819ULL }, // Inst #10879 = VGETMANTPSZrmbikz |
| 31222 | { 10878, 9, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4386, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a1368046819ULL }, // Inst #10878 = VGETMANTPSZrmbik |
| 31223 | { 10877, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x781368046819ULL }, // Inst #10877 = VGETMANTPSZrmbi |
| 31224 | { 10876, 4, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4382, 0|(1ULL<<MCID::MayRaiseFPException), 0xc71368046829ULL }, // Inst #10876 = VGETMANTPSZ256rrikz |
| 31225 | { 10875, 5, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4377, 0|(1ULL<<MCID::MayRaiseFPException), 0xc31368046829ULL }, // Inst #10875 = VGETMANTPSZ256rrik |
| 31226 | { 10874, 3, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4217, 0|(1ULL<<MCID::MayRaiseFPException), 0xc11368046829ULL }, // Inst #10874 = VGETMANTPSZ256rri |
| 31227 | { 10873, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4369, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc71368046819ULL }, // Inst #10873 = VGETMANTPSZ256rmikz |
| 31228 | { 10872, 9, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4360, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc31368046819ULL }, // Inst #10872 = VGETMANTPSZ256rmik |
| 31229 | { 10871, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc11368046819ULL }, // Inst #10871 = VGETMANTPSZ256rmi |
| 31230 | { 10870, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4369, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x771368046819ULL }, // Inst #10870 = VGETMANTPSZ256rmbikz |
| 31231 | { 10869, 9, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4360, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x731368046819ULL }, // Inst #10869 = VGETMANTPSZ256rmbik |
| 31232 | { 10868, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x711368046819ULL }, // Inst #10868 = VGETMANTPSZ256rmbi |
| 31233 | { 10867, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 3044, 0|(1ULL<<MCID::MayRaiseFPException), 0xa61368046829ULL }, // Inst #10867 = VGETMANTPSZ128rrikz |
| 31234 | { 10866, 5, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 3039, 0|(1ULL<<MCID::MayRaiseFPException), 0xa21368046829ULL }, // Inst #10866 = VGETMANTPSZ128rrik |
| 31235 | { 10865, 3, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 3036, 0|(1ULL<<MCID::MayRaiseFPException), 0xa01368046829ULL }, // Inst #10865 = VGETMANTPSZ128rri |
| 31236 | { 10864, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4352, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa61368046819ULL }, // Inst #10864 = VGETMANTPSZ128rmikz |
| 31237 | { 10863, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4343, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa21368046819ULL }, // Inst #10863 = VGETMANTPSZ128rmik |
| 31238 | { 10862, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa01368046819ULL }, // Inst #10862 = VGETMANTPSZ128rmi |
| 31239 | { 10861, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4352, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x761368046819ULL }, // Inst #10861 = VGETMANTPSZ128rmbikz |
| 31240 | { 10860, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4343, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x721368046819ULL }, // Inst #10860 = VGETMANTPSZ128rmbik |
| 31241 | { 10859, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x701368046819ULL }, // Inst #10859 = VGETMANTPSZ128rmbi |
| 31242 | { 10858, 4, 1, 0, 1891, 1, 0, X86ImpOpBase + 78, 4339, 0|(1ULL<<MCID::MayRaiseFPException), 0xee1368046029ULL }, // Inst #10858 = VGETMANTPHZrrikz |
| 31243 | { 10857, 5, 1, 0, 1891, 1, 0, X86ImpOpBase + 78, 4334, 0|(1ULL<<MCID::MayRaiseFPException), 0xea1368046029ULL }, // Inst #10857 = VGETMANTPHZrrik |
| 31244 | { 10856, 4, 1, 0, 1891, 1, 0, X86ImpOpBase + 78, 4339, 0, 0x5e1368046029ULL }, // Inst #10856 = VGETMANTPHZrribkz |
| 31245 | { 10855, 5, 1, 0, 1891, 1, 0, X86ImpOpBase + 78, 4334, 0, 0x5a1368046029ULL }, // Inst #10855 = VGETMANTPHZrribk |
| 31246 | { 10854, 3, 1, 0, 1884, 1, 0, X86ImpOpBase + 78, 4253, 0, 0x581368046029ULL }, // Inst #10854 = VGETMANTPHZrrib |
| 31247 | { 10853, 3, 1, 0, 1884, 1, 0, X86ImpOpBase + 78, 4253, 0|(1ULL<<MCID::MayRaiseFPException), 0xe81368046029ULL }, // Inst #10853 = VGETMANTPHZrri |
| 31248 | { 10852, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4326, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee1368046019ULL }, // Inst #10852 = VGETMANTPHZrmikz |
| 31249 | { 10851, 9, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4317, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea1368046019ULL }, // Inst #10851 = VGETMANTPHZrmik |
| 31250 | { 10850, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe81368046019ULL }, // Inst #10850 = VGETMANTPHZrmi |
| 31251 | { 10849, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4326, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e1368046019ULL }, // Inst #10849 = VGETMANTPHZrmbikz |
| 31252 | { 10848, 9, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4317, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a1368046019ULL }, // Inst #10848 = VGETMANTPHZrmbik |
| 31253 | { 10847, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x581368046019ULL }, // Inst #10847 = VGETMANTPHZrmbi |
| 31254 | { 10846, 4, 1, 0, 1873, 1, 0, X86ImpOpBase + 78, 4313, 0|(1ULL<<MCID::MayRaiseFPException), 0xc71368046029ULL }, // Inst #10846 = VGETMANTPHZ256rrikz |
| 31255 | { 10845, 5, 1, 0, 1873, 1, 0, X86ImpOpBase + 78, 4308, 0|(1ULL<<MCID::MayRaiseFPException), 0xc31368046029ULL }, // Inst #10845 = VGETMANTPHZ256rrik |
| 31256 | { 10844, 3, 1, 0, 1744, 1, 0, X86ImpOpBase + 78, 4217, 0|(1ULL<<MCID::MayRaiseFPException), 0xc11368046029ULL }, // Inst #10844 = VGETMANTPHZ256rri |
| 31257 | { 10843, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4300, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc71368046019ULL }, // Inst #10843 = VGETMANTPHZ256rmikz |
| 31258 | { 10842, 9, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4291, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc31368046019ULL }, // Inst #10842 = VGETMANTPHZ256rmik |
| 31259 | { 10841, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc11368046019ULL }, // Inst #10841 = VGETMANTPHZ256rmi |
| 31260 | { 10840, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4300, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x571368046019ULL }, // Inst #10840 = VGETMANTPHZ256rmbikz |
| 31261 | { 10839, 9, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4291, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x531368046019ULL }, // Inst #10839 = VGETMANTPHZ256rmbik |
| 31262 | { 10838, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x511368046019ULL }, // Inst #10838 = VGETMANTPHZ256rmbi |
| 31263 | { 10837, 4, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 4287, 0|(1ULL<<MCID::MayRaiseFPException), 0xa61368046029ULL }, // Inst #10837 = VGETMANTPHZ128rrikz |
| 31264 | { 10836, 5, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 4282, 0|(1ULL<<MCID::MayRaiseFPException), 0xa21368046029ULL }, // Inst #10836 = VGETMANTPHZ128rrik |
| 31265 | { 10835, 3, 1, 0, 1743, 1, 0, X86ImpOpBase + 78, 3036, 0|(1ULL<<MCID::MayRaiseFPException), 0xa01368046029ULL }, // Inst #10835 = VGETMANTPHZ128rri |
| 31266 | { 10834, 8, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 4274, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa61368046019ULL }, // Inst #10834 = VGETMANTPHZ128rmikz |
| 31267 | { 10833, 9, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 4265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa21368046019ULL }, // Inst #10833 = VGETMANTPHZ128rmik |
| 31268 | { 10832, 7, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa01368046019ULL }, // Inst #10832 = VGETMANTPHZ128rmi |
| 31269 | { 10831, 8, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 4274, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x561368046019ULL }, // Inst #10831 = VGETMANTPHZ128rmbikz |
| 31270 | { 10830, 9, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 4265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x521368046019ULL }, // Inst #10830 = VGETMANTPHZ128rmbik |
| 31271 | { 10829, 7, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x501368046019ULL }, // Inst #10829 = VGETMANTPHZ128rmbi |
| 31272 | { 10828, 4, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4261, 0|(1ULL<<MCID::MayRaiseFPException), 0xee1370066829ULL }, // Inst #10828 = VGETMANTPDZrrikz |
| 31273 | { 10827, 5, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4256, 0|(1ULL<<MCID::MayRaiseFPException), 0xea1370066829ULL }, // Inst #10827 = VGETMANTPDZrrik |
| 31274 | { 10826, 4, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4261, 0, 0x9e1370066829ULL }, // Inst #10826 = VGETMANTPDZrribkz |
| 31275 | { 10825, 5, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4256, 0, 0x9a1370066829ULL }, // Inst #10825 = VGETMANTPDZrribk |
| 31276 | { 10824, 3, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4253, 0, 0x981370066829ULL }, // Inst #10824 = VGETMANTPDZrrib |
| 31277 | { 10823, 3, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 4253, 0|(1ULL<<MCID::MayRaiseFPException), 0xe81370066829ULL }, // Inst #10823 = VGETMANTPDZrri |
| 31278 | { 10822, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4245, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee1370066819ULL }, // Inst #10822 = VGETMANTPDZrmikz |
| 31279 | { 10821, 9, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea1370066819ULL }, // Inst #10821 = VGETMANTPDZrmik |
| 31280 | { 10820, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe81370066819ULL }, // Inst #10820 = VGETMANTPDZrmi |
| 31281 | { 10819, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4245, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e1370066819ULL }, // Inst #10819 = VGETMANTPDZrmbikz |
| 31282 | { 10818, 9, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a1370066819ULL }, // Inst #10818 = VGETMANTPDZrmbik |
| 31283 | { 10817, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 4229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x981370066819ULL }, // Inst #10817 = VGETMANTPDZrmbi |
| 31284 | { 10816, 4, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4225, 0|(1ULL<<MCID::MayRaiseFPException), 0xc71370066829ULL }, // Inst #10816 = VGETMANTPDZ256rrikz |
| 31285 | { 10815, 5, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4220, 0|(1ULL<<MCID::MayRaiseFPException), 0xc31370066829ULL }, // Inst #10815 = VGETMANTPDZ256rrik |
| 31286 | { 10814, 3, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 4217, 0|(1ULL<<MCID::MayRaiseFPException), 0xc11370066829ULL }, // Inst #10814 = VGETMANTPDZ256rri |
| 31287 | { 10813, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4209, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc71370066819ULL }, // Inst #10813 = VGETMANTPDZ256rmikz |
| 31288 | { 10812, 9, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4200, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc31370066819ULL }, // Inst #10812 = VGETMANTPDZ256rmik |
| 31289 | { 10811, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc11370066819ULL }, // Inst #10811 = VGETMANTPDZ256rmi |
| 31290 | { 10810, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4209, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x971370066819ULL }, // Inst #10810 = VGETMANTPDZ256rmbikz |
| 31291 | { 10809, 9, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4200, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x931370066819ULL }, // Inst #10809 = VGETMANTPDZ256rmbik |
| 31292 | { 10808, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 4193, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x911370066819ULL }, // Inst #10808 = VGETMANTPDZ256rmbi |
| 31293 | { 10807, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 4189, 0|(1ULL<<MCID::MayRaiseFPException), 0xa61370066829ULL }, // Inst #10807 = VGETMANTPDZ128rrikz |
| 31294 | { 10806, 5, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 4184, 0|(1ULL<<MCID::MayRaiseFPException), 0xa21370066829ULL }, // Inst #10806 = VGETMANTPDZ128rrik |
| 31295 | { 10805, 3, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 3036, 0|(1ULL<<MCID::MayRaiseFPException), 0xa01370066829ULL }, // Inst #10805 = VGETMANTPDZ128rri |
| 31296 | { 10804, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4176, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa61370066819ULL }, // Inst #10804 = VGETMANTPDZ128rmikz |
| 31297 | { 10803, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4167, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa21370066819ULL }, // Inst #10803 = VGETMANTPDZ128rmik |
| 31298 | { 10802, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa01370066819ULL }, // Inst #10802 = VGETMANTPDZ128rmi |
| 31299 | { 10801, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4176, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x961370066819ULL }, // Inst #10801 = VGETMANTPDZ128rmbikz |
| 31300 | { 10800, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4167, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x921370066819ULL }, // Inst #10800 = VGETMANTPDZ128rmbik |
| 31301 | { 10799, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 4160, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x901370066819ULL }, // Inst #10799 = VGETMANTPDZ128rmbi |
| 31302 | { 10798, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66a1e8004829ULL }, // Inst #10798 = VGETEXPSSZrkz |
| 31303 | { 10797, 5, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62a1e8004829ULL }, // Inst #10797 = VGETEXPSSZrk |
| 31304 | { 10796, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x76a1e8004829ULL }, // Inst #10796 = VGETEXPSSZrbkz |
| 31305 | { 10795, 5, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x72a1e8004829ULL }, // Inst #10795 = VGETEXPSSZrbk |
| 31306 | { 10794, 3, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x70a1e8004829ULL }, // Inst #10794 = VGETEXPSSZrb |
| 31307 | { 10793, 3, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60a1e8004829ULL }, // Inst #10793 = VGETEXPSSZr |
| 31308 | { 10792, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66a1e8004819ULL }, // Inst #10792 = VGETEXPSSZmkz |
| 31309 | { 10791, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62a1e8004819ULL }, // Inst #10791 = VGETEXPSSZmk |
| 31310 | { 10790, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60a1e8004819ULL }, // Inst #10790 = VGETEXPSSZm |
| 31311 | { 10789, 4, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x46a1e8014829ULL }, // Inst #10789 = VGETEXPSHZrkz |
| 31312 | { 10788, 5, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x42a1e8014829ULL }, // Inst #10788 = VGETEXPSHZrk |
| 31313 | { 10787, 4, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x56a1e8014829ULL }, // Inst #10787 = VGETEXPSHZrbkz |
| 31314 | { 10786, 5, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x52a1e8014829ULL }, // Inst #10786 = VGETEXPSHZrbk |
| 31315 | { 10785, 3, 1, 0, 1743, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x50a1e8014829ULL }, // Inst #10785 = VGETEXPSHZrb |
| 31316 | { 10784, 3, 1, 0, 1743, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x40a1e8014829ULL }, // Inst #10784 = VGETEXPSHZr |
| 31317 | { 10783, 8, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46a1e8014819ULL }, // Inst #10783 = VGETEXPSHZmkz |
| 31318 | { 10782, 9, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42a1e8014819ULL }, // Inst #10782 = VGETEXPSHZmk |
| 31319 | { 10781, 7, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40a1e8014819ULL }, // Inst #10781 = VGETEXPSHZm |
| 31320 | { 10780, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86a1f0024829ULL }, // Inst #10780 = VGETEXPSDZrkz |
| 31321 | { 10779, 5, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82a1f0024829ULL }, // Inst #10779 = VGETEXPSDZrk |
| 31322 | { 10778, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x96a1f0024829ULL }, // Inst #10778 = VGETEXPSDZrbkz |
| 31323 | { 10777, 5, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x92a1f0024829ULL }, // Inst #10777 = VGETEXPSDZrbk |
| 31324 | { 10776, 3, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x90a1f0024829ULL }, // Inst #10776 = VGETEXPSDZrb |
| 31325 | { 10775, 3, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80a1f0024829ULL }, // Inst #10775 = VGETEXPSDZr |
| 31326 | { 10774, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86a1f0024819ULL }, // Inst #10774 = VGETEXPSDZmkz |
| 31327 | { 10773, 9, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82a1f0024819ULL }, // Inst #10773 = VGETEXPSDZmk |
| 31328 | { 10772, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80a1f0024819ULL }, // Inst #10772 = VGETEXPSDZm |
| 31329 | { 10771, 3, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2168004829ULL }, // Inst #10771 = VGETEXPPSZrkz |
| 31330 | { 10770, 4, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2168004829ULL }, // Inst #10770 = VGETEXPPSZrk |
| 31331 | { 10769, 3, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2779, 0, 0x7e2168004829ULL }, // Inst #10769 = VGETEXPPSZrbkz |
| 31332 | { 10768, 4, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2775, 0, 0x7a2168004829ULL }, // Inst #10768 = VGETEXPPSZrbk |
| 31333 | { 10767, 2, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x782168004829ULL }, // Inst #10767 = VGETEXPPSZrb |
| 31334 | { 10766, 2, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82168004829ULL }, // Inst #10766 = VGETEXPPSZr |
| 31335 | { 10765, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2168004819ULL }, // Inst #10765 = VGETEXPPSZmkz |
| 31336 | { 10764, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2168004819ULL }, // Inst #10764 = VGETEXPPSZmk |
| 31337 | { 10763, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2168004819ULL }, // Inst #10763 = VGETEXPPSZmbkz |
| 31338 | { 10762, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2168004819ULL }, // Inst #10762 = VGETEXPPSZmbk |
| 31339 | { 10761, 6, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782168004819ULL }, // Inst #10761 = VGETEXPPSZmb |
| 31340 | { 10760, 6, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82168004819ULL }, // Inst #10760 = VGETEXPPSZm |
| 31341 | { 10759, 3, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 2765, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72168004829ULL }, // Inst #10759 = VGETEXPPSZ256rkz |
| 31342 | { 10758, 4, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 2761, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32168004829ULL }, // Inst #10758 = VGETEXPPSZ256rk |
| 31343 | { 10757, 2, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12168004829ULL }, // Inst #10757 = VGETEXPPSZ256r |
| 31344 | { 10756, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72168004819ULL }, // Inst #10756 = VGETEXPPSZ256mkz |
| 31345 | { 10755, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32168004819ULL }, // Inst #10755 = VGETEXPPSZ256mk |
| 31346 | { 10754, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772168004819ULL }, // Inst #10754 = VGETEXPPSZ256mbkz |
| 31347 | { 10753, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732168004819ULL }, // Inst #10753 = VGETEXPPSZ256mbk |
| 31348 | { 10752, 6, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712168004819ULL }, // Inst #10752 = VGETEXPPSZ256mb |
| 31349 | { 10751, 6, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12168004819ULL }, // Inst #10751 = VGETEXPPSZ256m |
| 31350 | { 10750, 3, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62168004829ULL }, // Inst #10750 = VGETEXPPSZ128rkz |
| 31351 | { 10749, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22168004829ULL }, // Inst #10749 = VGETEXPPSZ128rk |
| 31352 | { 10748, 2, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02168004829ULL }, // Inst #10748 = VGETEXPPSZ128r |
| 31353 | { 10747, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62168004819ULL }, // Inst #10747 = VGETEXPPSZ128mkz |
| 31354 | { 10746, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22168004819ULL }, // Inst #10746 = VGETEXPPSZ128mk |
| 31355 | { 10745, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762168004819ULL }, // Inst #10745 = VGETEXPPSZ128mbkz |
| 31356 | { 10744, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722168004819ULL }, // Inst #10744 = VGETEXPPSZ128mbk |
| 31357 | { 10743, 6, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702168004819ULL }, // Inst #10743 = VGETEXPPSZ128mb |
| 31358 | { 10742, 6, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02168004819ULL }, // Inst #10742 = VGETEXPPSZ128m |
| 31359 | { 10741, 3, 1, 0, 1891, 1, 0, X86ImpOpBase + 78, 3008, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2168014829ULL }, // Inst #10741 = VGETEXPPHZrkz |
| 31360 | { 10740, 4, 1, 0, 1891, 1, 0, X86ImpOpBase + 78, 3004, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2168014829ULL }, // Inst #10740 = VGETEXPPHZrk |
| 31361 | { 10739, 3, 1, 0, 1891, 1, 0, X86ImpOpBase + 78, 3008, 0, 0x5e2168014829ULL }, // Inst #10739 = VGETEXPPHZrbkz |
| 31362 | { 10738, 4, 1, 0, 1891, 1, 0, X86ImpOpBase + 78, 3004, 0, 0x5a2168014829ULL }, // Inst #10738 = VGETEXPPHZrbk |
| 31363 | { 10737, 2, 1, 0, 1884, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x582168014829ULL }, // Inst #10737 = VGETEXPPHZrb |
| 31364 | { 10736, 2, 1, 0, 1884, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82168014829ULL }, // Inst #10736 = VGETEXPPHZr |
| 31365 | { 10735, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2168014819ULL }, // Inst #10735 = VGETEXPPHZmkz |
| 31366 | { 10734, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2168014819ULL }, // Inst #10734 = VGETEXPPHZmk |
| 31367 | { 10733, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e2168014819ULL }, // Inst #10733 = VGETEXPPHZmbkz |
| 31368 | { 10732, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a2168014819ULL }, // Inst #10732 = VGETEXPPHZmbk |
| 31369 | { 10731, 6, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x582168014819ULL }, // Inst #10731 = VGETEXPPHZmb |
| 31370 | { 10730, 6, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82168014819ULL }, // Inst #10730 = VGETEXPPHZm |
| 31371 | { 10729, 3, 1, 0, 1873, 1, 0, X86ImpOpBase + 78, 2977, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72168014829ULL }, // Inst #10729 = VGETEXPPHZ256rkz |
| 31372 | { 10728, 4, 1, 0, 1873, 1, 0, X86ImpOpBase + 78, 2973, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32168014829ULL }, // Inst #10728 = VGETEXPPHZ256rk |
| 31373 | { 10727, 2, 1, 0, 1744, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12168014829ULL }, // Inst #10727 = VGETEXPPHZ256r |
| 31374 | { 10726, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72168014819ULL }, // Inst #10726 = VGETEXPPHZ256mkz |
| 31375 | { 10725, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32168014819ULL }, // Inst #10725 = VGETEXPPHZ256mk |
| 31376 | { 10724, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x572168014819ULL }, // Inst #10724 = VGETEXPPHZ256mbkz |
| 31377 | { 10723, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x532168014819ULL }, // Inst #10723 = VGETEXPPHZ256mbk |
| 31378 | { 10722, 6, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x512168014819ULL }, // Inst #10722 = VGETEXPPHZ256mb |
| 31379 | { 10721, 6, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12168014819ULL }, // Inst #10721 = VGETEXPPHZ256m |
| 31380 | { 10720, 3, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 2970, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62168014829ULL }, // Inst #10720 = VGETEXPPHZ128rkz |
| 31381 | { 10719, 4, 1, 0, 1872, 1, 0, X86ImpOpBase + 78, 2966, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22168014829ULL }, // Inst #10719 = VGETEXPPHZ128rk |
| 31382 | { 10718, 2, 1, 0, 1743, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02168014829ULL }, // Inst #10718 = VGETEXPPHZ128r |
| 31383 | { 10717, 7, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62168014819ULL }, // Inst #10717 = VGETEXPPHZ128mkz |
| 31384 | { 10716, 8, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22168014819ULL }, // Inst #10716 = VGETEXPPHZ128mk |
| 31385 | { 10715, 7, 1, 0, 1723, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x562168014819ULL }, // Inst #10715 = VGETEXPPHZ128mbkz |
| 31386 | { 10714, 8, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x522168014819ULL }, // Inst #10714 = VGETEXPPHZ128mbk |
| 31387 | { 10713, 6, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x502168014819ULL }, // Inst #10713 = VGETEXPPHZ128mb |
| 31388 | { 10712, 6, 1, 0, 1719, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02168014819ULL }, // Inst #10712 = VGETEXPPHZ128m |
| 31389 | { 10711, 3, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2170024829ULL }, // Inst #10711 = VGETEXPPDZrkz |
| 31390 | { 10710, 4, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2170024829ULL }, // Inst #10710 = VGETEXPPDZrk |
| 31391 | { 10709, 3, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2744, 0, 0x9e2170024829ULL }, // Inst #10709 = VGETEXPPDZrbkz |
| 31392 | { 10708, 4, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2740, 0, 0x9a2170024829ULL }, // Inst #10708 = VGETEXPPDZrbk |
| 31393 | { 10707, 2, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x982170024829ULL }, // Inst #10707 = VGETEXPPDZrb |
| 31394 | { 10706, 2, 1, 0, 448, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82170024829ULL }, // Inst #10706 = VGETEXPPDZr |
| 31395 | { 10705, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2170024819ULL }, // Inst #10705 = VGETEXPPDZmkz |
| 31396 | { 10704, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2170024819ULL }, // Inst #10704 = VGETEXPPDZmk |
| 31397 | { 10703, 7, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2170024819ULL }, // Inst #10703 = VGETEXPPDZmbkz |
| 31398 | { 10702, 8, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2170024819ULL }, // Inst #10702 = VGETEXPPDZmbk |
| 31399 | { 10701, 6, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982170024819ULL }, // Inst #10701 = VGETEXPPDZmb |
| 31400 | { 10700, 6, 1, 0, 447, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82170024819ULL }, // Inst #10700 = VGETEXPPDZm |
| 31401 | { 10699, 3, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 2722, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72170024829ULL }, // Inst #10699 = VGETEXPPDZ256rkz |
| 31402 | { 10698, 4, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 2718, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32170024829ULL }, // Inst #10698 = VGETEXPPDZ256rk |
| 31403 | { 10697, 2, 1, 0, 445, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12170024829ULL }, // Inst #10697 = VGETEXPPDZ256r |
| 31404 | { 10696, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72170024819ULL }, // Inst #10696 = VGETEXPPDZ256mkz |
| 31405 | { 10695, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32170024819ULL }, // Inst #10695 = VGETEXPPDZ256mk |
| 31406 | { 10694, 7, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972170024819ULL }, // Inst #10694 = VGETEXPPDZ256mbkz |
| 31407 | { 10693, 8, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932170024819ULL }, // Inst #10693 = VGETEXPPDZ256mbk |
| 31408 | { 10692, 6, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912170024819ULL }, // Inst #10692 = VGETEXPPDZ256mb |
| 31409 | { 10691, 6, 1, 0, 444, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12170024819ULL }, // Inst #10691 = VGETEXPPDZ256m |
| 31410 | { 10690, 3, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62170024829ULL }, // Inst #10690 = VGETEXPPDZ128rkz |
| 31411 | { 10689, 4, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22170024829ULL }, // Inst #10689 = VGETEXPPDZ128rk |
| 31412 | { 10688, 2, 1, 0, 303, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02170024829ULL }, // Inst #10688 = VGETEXPPDZ128r |
| 31413 | { 10687, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62170024819ULL }, // Inst #10687 = VGETEXPPDZ128mkz |
| 31414 | { 10686, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22170024819ULL }, // Inst #10686 = VGETEXPPDZ128mk |
| 31415 | { 10685, 7, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962170024819ULL }, // Inst #10685 = VGETEXPPDZ128mbkz |
| 31416 | { 10684, 8, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922170024819ULL }, // Inst #10684 = VGETEXPPDZ128mbk |
| 31417 | { 10683, 6, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902170024819ULL }, // Inst #10683 = VGETEXPPDZ128mb |
| 31418 | { 10682, 6, 1, 0, 304, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02170024819ULL }, // Inst #10682 = VGETEXPPDZ128m |
| 31419 | { 10681, 9, 2, 0, 905, 0, 0, X86ImpOpBase + 0, 4052, 0|(1ULL<<MCID::MayLoad), 0x49a800481aULL }, // Inst #10681 = VGATHERQPSrm |
| 31420 | { 10680, 9, 2, 0, 2199, 0, 0, X86ImpOpBase + 0, 4151, 0|(1ULL<<MCID::MayLoad), 0x6a49e8004819ULL }, // Inst #10680 = VGATHERQPSZrm |
| 31421 | { 10679, 9, 2, 0, 2197, 0, 0, X86ImpOpBase + 0, 4142, 0|(1ULL<<MCID::MayLoad), 0x6349e8004819ULL }, // Inst #10679 = VGATHERQPSZ256rm |
| 31422 | { 10678, 9, 2, 0, 1394, 0, 0, X86ImpOpBase + 0, 4025, 0|(1ULL<<MCID::MayLoad), 0x6249e8004819ULL }, // Inst #10678 = VGATHERQPSZ128rm |
| 31423 | { 10677, 9, 2, 0, 904, 0, 0, X86ImpOpBase + 0, 4133, 0|(1ULL<<MCID::MayLoad), 0x149a800481aULL }, // Inst #10677 = VGATHERQPSYrm |
| 31424 | { 10676, 9, 2, 0, 903, 0, 0, X86ImpOpBase + 0, 4052, 0|(1ULL<<MCID::MayLoad), 0x49b002481aULL }, // Inst #10676 = VGATHERQPDrm |
| 31425 | { 10675, 9, 2, 0, 2198, 0, 0, X86ImpOpBase + 0, 4124, 0|(1ULL<<MCID::MayLoad), 0x8a49f0024819ULL }, // Inst #10675 = VGATHERQPDZrm |
| 31426 | { 10674, 9, 2, 0, 2196, 0, 0, X86ImpOpBase + 0, 4115, 0|(1ULL<<MCID::MayLoad), 0x8349f0024819ULL }, // Inst #10674 = VGATHERQPDZ256rm |
| 31427 | { 10673, 9, 2, 0, 2195, 0, 0, X86ImpOpBase + 0, 4025, 0|(1ULL<<MCID::MayLoad), 0x8249f0024819ULL }, // Inst #10673 = VGATHERQPDZ128rm |
| 31428 | { 10672, 9, 2, 0, 915, 0, 0, X86ImpOpBase + 0, 4061, 0|(1ULL<<MCID::MayLoad), 0x149b002481aULL }, // Inst #10672 = VGATHERQPDYrm |
| 31429 | { 10671, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8004822ULL }, // Inst #10671 = VGATHERPF1QPSm |
| 31430 | { 10670, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8024822ULL }, // Inst #10670 = VGATHERPF1QPDm |
| 31431 | { 10669, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378004822ULL }, // Inst #10669 = VGATHERPF1DPSm |
| 31432 | { 10668, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4097, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378024822ULL }, // Inst #10668 = VGATHERPF1DPDm |
| 31433 | { 10667, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8004821ULL }, // Inst #10667 = VGATHERPF0QPSm |
| 31434 | { 10666, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8a63f8024821ULL }, // Inst #10666 = VGATHERPF0QPDm |
| 31435 | { 10665, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378004821ULL }, // Inst #10665 = VGATHERPF0DPSm |
| 31436 | { 10664, 6, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 4097, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6a6378024821ULL }, // Inst #10664 = VGATHERPF0DPDm |
| 31437 | { 10663, 9, 2, 0, 901, 0, 0, X86ImpOpBase + 0, 4052, 0|(1ULL<<MCID::MayLoad), 0x492800481aULL }, // Inst #10663 = VGATHERDPSrm |
| 31438 | { 10662, 9, 2, 0, 1397, 0, 0, X86ImpOpBase + 0, 4088, 0|(1ULL<<MCID::MayLoad), 0x6a4968004819ULL }, // Inst #10662 = VGATHERDPSZrm |
| 31439 | { 10661, 9, 2, 0, 1396, 0, 0, X86ImpOpBase + 0, 4079, 0|(1ULL<<MCID::MayLoad), 0x634968004819ULL }, // Inst #10661 = VGATHERDPSZ256rm |
| 31440 | { 10660, 9, 2, 0, 1395, 0, 0, X86ImpOpBase + 0, 4070, 0|(1ULL<<MCID::MayLoad), 0x624968004819ULL }, // Inst #10660 = VGATHERDPSZ128rm |
| 31441 | { 10659, 9, 2, 0, 902, 0, 0, X86ImpOpBase + 0, 4061, 0|(1ULL<<MCID::MayLoad), 0x1492800481aULL }, // Inst #10659 = VGATHERDPSYrm |
| 31442 | { 10658, 9, 2, 0, 899, 0, 0, X86ImpOpBase + 0, 4052, 0|(1ULL<<MCID::MayLoad), 0x493002481aULL }, // Inst #10658 = VGATHERDPDrm |
| 31443 | { 10657, 9, 2, 0, 2198, 0, 0, X86ImpOpBase + 0, 4043, 0|(1ULL<<MCID::MayLoad), 0x8a4970024819ULL }, // Inst #10657 = VGATHERDPDZrm |
| 31444 | { 10656, 9, 2, 0, 2196, 0, 0, X86ImpOpBase + 0, 4034, 0|(1ULL<<MCID::MayLoad), 0x834970024819ULL }, // Inst #10656 = VGATHERDPDZ256rm |
| 31445 | { 10655, 9, 2, 0, 2195, 0, 0, X86ImpOpBase + 0, 4025, 0|(1ULL<<MCID::MayLoad), 0x824970024819ULL }, // Inst #10655 = VGATHERDPDZ128rm |
| 31446 | { 10654, 9, 2, 0, 900, 0, 0, X86ImpOpBase + 0, 4016, 0|(1ULL<<MCID::MayLoad), 0x1493002481aULL }, // Inst #10654 = VGATHERDPDYrm |
| 31447 | { 10653, 2, 1, 0, 1174, 0, 0, X86ImpOpBase + 0, 535, 0, 0x414800a029ULL }, // Inst #10653 = VFRCZSSrr |
| 31448 | { 10652, 6, 1, 0, 1175, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x414800a019ULL }, // Inst #10652 = VFRCZSSrm |
| 31449 | { 10651, 2, 1, 0, 1174, 0, 0, X86ImpOpBase + 0, 535, 0, 0x41d000a029ULL }, // Inst #10651 = VFRCZSDrr |
| 31450 | { 10650, 6, 1, 0, 1175, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x41d000a019ULL }, // Inst #10650 = VFRCZSDrm |
| 31451 | { 10649, 2, 1, 0, 1173, 0, 0, X86ImpOpBase + 0, 535, 0, 0x404800a029ULL }, // Inst #10649 = VFRCZPSrr |
| 31452 | { 10648, 6, 1, 0, 1175, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x404800a019ULL }, // Inst #10648 = VFRCZPSrm |
| 31453 | { 10647, 2, 1, 0, 1176, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x1404800a029ULL }, // Inst #10647 = VFRCZPSYrr |
| 31454 | { 10646, 6, 1, 0, 1177, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x1404800a019ULL }, // Inst #10646 = VFRCZPSYrm |
| 31455 | { 10645, 2, 1, 0, 1173, 0, 0, X86ImpOpBase + 0, 535, 0, 0x40d000a029ULL }, // Inst #10645 = VFRCZPDrr |
| 31456 | { 10644, 6, 1, 0, 1175, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x40d000a019ULL }, // Inst #10644 = VFRCZPDrm |
| 31457 | { 10643, 2, 1, 0, 1176, 0, 0, X86ImpOpBase + 0, 2866, 0, 0x140d000a029ULL }, // Inst #10643 = VFRCZPDYrr |
| 31458 | { 10642, 6, 1, 0, 1177, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x140d000a019ULL }, // Inst #10642 = VFRCZPDYrm |
| 31459 | { 10641, 4, 1, 0, 1680, 1, 0, X86ImpOpBase + 78, 4012, 0, 0x6233e8046829ULL }, // Inst #10641 = VFPCLASSSSZrrk |
| 31460 | { 10640, 3, 1, 0, 1680, 1, 0, X86ImpOpBase + 78, 4009, 0, 0x6033e8046829ULL }, // Inst #10640 = VFPCLASSSSZrr |
| 31461 | { 10639, 8, 1, 0, 1332, 1, 0, X86ImpOpBase + 78, 4001, 0|(1ULL<<MCID::MayLoad), 0x6233e8046819ULL }, // Inst #10639 = VFPCLASSSSZrmk |
| 31462 | { 10638, 7, 1, 0, 1802, 1, 0, X86ImpOpBase + 78, 3994, 0|(1ULL<<MCID::MayLoad), 0x6033e8046819ULL }, // Inst #10638 = VFPCLASSSSZrm |
| 31463 | { 10637, 4, 1, 0, 1681, 1, 0, X86ImpOpBase + 78, 4012, 0, 0x4233e8046029ULL }, // Inst #10637 = VFPCLASSSHZrrk |
| 31464 | { 10636, 3, 1, 0, 1681, 1, 0, X86ImpOpBase + 78, 4009, 0, 0x4033e8046029ULL }, // Inst #10636 = VFPCLASSSHZrr |
| 31465 | { 10635, 8, 1, 0, 1933, 1, 0, X86ImpOpBase + 78, 4001, 0|(1ULL<<MCID::MayLoad), 0x4233e8046019ULL }, // Inst #10635 = VFPCLASSSHZrmk |
| 31466 | { 10634, 7, 1, 0, 1803, 1, 0, X86ImpOpBase + 78, 3994, 0|(1ULL<<MCID::MayLoad), 0x4033e8046019ULL }, // Inst #10634 = VFPCLASSSHZrm |
| 31467 | { 10633, 4, 1, 0, 1680, 1, 0, X86ImpOpBase + 78, 4012, 0, 0x8233f0066829ULL }, // Inst #10633 = VFPCLASSSDZrrk |
| 31468 | { 10632, 3, 1, 0, 1680, 1, 0, X86ImpOpBase + 78, 4009, 0, 0x8033f0066829ULL }, // Inst #10632 = VFPCLASSSDZrr |
| 31469 | { 10631, 8, 1, 0, 1332, 1, 0, X86ImpOpBase + 78, 4001, 0|(1ULL<<MCID::MayLoad), 0x8233f0066819ULL }, // Inst #10631 = VFPCLASSSDZrmk |
| 31470 | { 10630, 7, 1, 0, 1802, 1, 0, X86ImpOpBase + 78, 3994, 0|(1ULL<<MCID::MayLoad), 0x8033f0066819ULL }, // Inst #10630 = VFPCLASSSDZrm |
| 31471 | { 10629, 4, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 3990, 0, 0xea3368046829ULL }, // Inst #10629 = VFPCLASSPSZrrk |
| 31472 | { 10628, 3, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 3987, 0, 0xe83368046829ULL }, // Inst #10628 = VFPCLASSPSZrr |
| 31473 | { 10627, 8, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 3936, 0|(1ULL<<MCID::MayLoad), 0xea3368046819ULL }, // Inst #10627 = VFPCLASSPSZrmk |
| 31474 | { 10626, 8, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 3936, 0|(1ULL<<MCID::MayLoad), 0x7a3368046819ULL }, // Inst #10626 = VFPCLASSPSZrmbk |
| 31475 | { 10625, 7, 1, 0, 1915, 1, 0, X86ImpOpBase + 78, 3929, 0|(1ULL<<MCID::MayLoad), 0x783368046819ULL }, // Inst #10625 = VFPCLASSPSZrmb |
| 31476 | { 10624, 7, 1, 0, 1671, 1, 0, X86ImpOpBase + 78, 3929, 0|(1ULL<<MCID::MayLoad), 0xe83368046819ULL }, // Inst #10624 = VFPCLASSPSZrm |
| 31477 | { 10623, 4, 1, 0, 1242, 1, 0, X86ImpOpBase + 78, 3983, 0, 0xc33368046829ULL }, // Inst #10623 = VFPCLASSPSZ256rrk |
| 31478 | { 10622, 3, 1, 0, 1242, 1, 0, X86ImpOpBase + 78, 3980, 0, 0xc13368046829ULL }, // Inst #10622 = VFPCLASSPSZ256rr |
| 31479 | { 10621, 8, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 3907, 0|(1ULL<<MCID::MayLoad), 0xc33368046819ULL }, // Inst #10621 = VFPCLASSPSZ256rmk |
| 31480 | { 10620, 8, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 3907, 0|(1ULL<<MCID::MayLoad), 0x733368046819ULL }, // Inst #10620 = VFPCLASSPSZ256rmbk |
| 31481 | { 10619, 7, 1, 0, 1914, 1, 0, X86ImpOpBase + 78, 3900, 0|(1ULL<<MCID::MayLoad), 0x713368046819ULL }, // Inst #10619 = VFPCLASSPSZ256rmb |
| 31482 | { 10618, 7, 1, 0, 1670, 1, 0, X86ImpOpBase + 78, 3900, 0|(1ULL<<MCID::MayLoad), 0xc13368046819ULL }, // Inst #10618 = VFPCLASSPSZ256rm |
| 31483 | { 10617, 4, 1, 0, 1241, 1, 0, X86ImpOpBase + 78, 3976, 0, 0xa23368046829ULL }, // Inst #10617 = VFPCLASSPSZ128rrk |
| 31484 | { 10616, 3, 1, 0, 1241, 1, 0, X86ImpOpBase + 78, 3973, 0, 0xa03368046829ULL }, // Inst #10616 = VFPCLASSPSZ128rr |
| 31485 | { 10615, 8, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 3885, 0|(1ULL<<MCID::MayLoad), 0xa23368046819ULL }, // Inst #10615 = VFPCLASSPSZ128rmk |
| 31486 | { 10614, 8, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 3885, 0|(1ULL<<MCID::MayLoad), 0x723368046819ULL }, // Inst #10614 = VFPCLASSPSZ128rmbk |
| 31487 | { 10613, 7, 1, 0, 1665, 1, 0, X86ImpOpBase + 78, 3878, 0|(1ULL<<MCID::MayLoad), 0x703368046819ULL }, // Inst #10613 = VFPCLASSPSZ128rmb |
| 31488 | { 10612, 7, 1, 0, 1801, 1, 0, X86ImpOpBase + 78, 3878, 0|(1ULL<<MCID::MayLoad), 0xa03368046819ULL }, // Inst #10612 = VFPCLASSPSZ128rm |
| 31489 | { 10611, 4, 1, 0, 373, 1, 0, X86ImpOpBase + 78, 3969, 0, 0xea3368046029ULL }, // Inst #10611 = VFPCLASSPHZrrk |
| 31490 | { 10610, 3, 1, 0, 373, 1, 0, X86ImpOpBase + 78, 3966, 0, 0xe83368046029ULL }, // Inst #10610 = VFPCLASSPHZrr |
| 31491 | { 10609, 8, 1, 0, 1932, 1, 0, X86ImpOpBase + 78, 3958, 0|(1ULL<<MCID::MayLoad), 0xea3368046019ULL }, // Inst #10609 = VFPCLASSPHZrmk |
| 31492 | { 10608, 8, 1, 0, 1932, 1, 0, X86ImpOpBase + 78, 3958, 0|(1ULL<<MCID::MayLoad), 0x5a3368046019ULL }, // Inst #10608 = VFPCLASSPHZrmbk |
| 31493 | { 10607, 7, 1, 0, 1917, 1, 0, X86ImpOpBase + 78, 3951, 0|(1ULL<<MCID::MayLoad), 0x583368046019ULL }, // Inst #10607 = VFPCLASSPHZrmb |
| 31494 | { 10606, 7, 1, 0, 1673, 1, 0, X86ImpOpBase + 78, 3951, 0|(1ULL<<MCID::MayLoad), 0xe83368046019ULL }, // Inst #10606 = VFPCLASSPHZrm |
| 31495 | { 10605, 4, 1, 0, 1679, 1, 0, X86ImpOpBase + 78, 3947, 0, 0xc33368046029ULL }, // Inst #10605 = VFPCLASSPHZ256rrk |
| 31496 | { 10604, 3, 1, 0, 1679, 1, 0, X86ImpOpBase + 78, 3944, 0, 0xc13368046029ULL }, // Inst #10604 = VFPCLASSPHZ256rr |
| 31497 | { 10603, 8, 1, 0, 1931, 1, 0, X86ImpOpBase + 78, 3936, 0|(1ULL<<MCID::MayLoad), 0xc33368046019ULL }, // Inst #10603 = VFPCLASSPHZ256rmk |
| 31498 | { 10602, 8, 1, 0, 1931, 1, 0, X86ImpOpBase + 78, 3936, 0|(1ULL<<MCID::MayLoad), 0x533368046019ULL }, // Inst #10602 = VFPCLASSPHZ256rmbk |
| 31499 | { 10601, 7, 1, 0, 1916, 1, 0, X86ImpOpBase + 78, 3929, 0|(1ULL<<MCID::MayLoad), 0x513368046019ULL }, // Inst #10601 = VFPCLASSPHZ256rmb |
| 31500 | { 10600, 7, 1, 0, 1672, 1, 0, X86ImpOpBase + 78, 3929, 0|(1ULL<<MCID::MayLoad), 0xc13368046019ULL }, // Inst #10600 = VFPCLASSPHZ256rm |
| 31501 | { 10599, 4, 1, 0, 1678, 1, 0, X86ImpOpBase + 78, 3925, 0, 0xa23368046029ULL }, // Inst #10599 = VFPCLASSPHZ128rrk |
| 31502 | { 10598, 3, 1, 0, 1678, 1, 0, X86ImpOpBase + 78, 3922, 0, 0xa03368046029ULL }, // Inst #10598 = VFPCLASSPHZ128rr |
| 31503 | { 10597, 8, 1, 0, 1930, 1, 0, X86ImpOpBase + 78, 3907, 0|(1ULL<<MCID::MayLoad), 0xa23368046019ULL }, // Inst #10597 = VFPCLASSPHZ128rmk |
| 31504 | { 10596, 8, 1, 0, 1930, 1, 0, X86ImpOpBase + 78, 3907, 0|(1ULL<<MCID::MayLoad), 0x523368046019ULL }, // Inst #10596 = VFPCLASSPHZ128rmbk |
| 31505 | { 10595, 7, 1, 0, 1666, 1, 0, X86ImpOpBase + 78, 3900, 0|(1ULL<<MCID::MayLoad), 0x503368046019ULL }, // Inst #10595 = VFPCLASSPHZ128rmb |
| 31506 | { 10594, 7, 1, 0, 1669, 1, 0, X86ImpOpBase + 78, 3900, 0|(1ULL<<MCID::MayLoad), 0xa03368046019ULL }, // Inst #10594 = VFPCLASSPHZ128rm |
| 31507 | { 10593, 4, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 3918, 0, 0xea3370066829ULL }, // Inst #10593 = VFPCLASSPDZrrk |
| 31508 | { 10592, 3, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 3915, 0, 0xe83370066829ULL }, // Inst #10592 = VFPCLASSPDZrr |
| 31509 | { 10591, 8, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 3907, 0|(1ULL<<MCID::MayLoad), 0xea3370066819ULL }, // Inst #10591 = VFPCLASSPDZrmk |
| 31510 | { 10590, 8, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 3907, 0|(1ULL<<MCID::MayLoad), 0x9a3370066819ULL }, // Inst #10590 = VFPCLASSPDZrmbk |
| 31511 | { 10589, 7, 1, 0, 1915, 1, 0, X86ImpOpBase + 78, 3900, 0|(1ULL<<MCID::MayLoad), 0x983370066819ULL }, // Inst #10589 = VFPCLASSPDZrmb |
| 31512 | { 10588, 7, 1, 0, 1671, 1, 0, X86ImpOpBase + 78, 3900, 0|(1ULL<<MCID::MayLoad), 0xe83370066819ULL }, // Inst #10588 = VFPCLASSPDZrm |
| 31513 | { 10587, 4, 1, 0, 1242, 1, 0, X86ImpOpBase + 78, 3896, 0, 0xc33370066829ULL }, // Inst #10587 = VFPCLASSPDZ256rrk |
| 31514 | { 10586, 3, 1, 0, 1242, 1, 0, X86ImpOpBase + 78, 3893, 0, 0xc13370066829ULL }, // Inst #10586 = VFPCLASSPDZ256rr |
| 31515 | { 10585, 8, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 3885, 0|(1ULL<<MCID::MayLoad), 0xc33370066819ULL }, // Inst #10585 = VFPCLASSPDZ256rmk |
| 31516 | { 10584, 8, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 3885, 0|(1ULL<<MCID::MayLoad), 0x933370066819ULL }, // Inst #10584 = VFPCLASSPDZ256rmbk |
| 31517 | { 10583, 7, 1, 0, 1914, 1, 0, X86ImpOpBase + 78, 3878, 0|(1ULL<<MCID::MayLoad), 0x913370066819ULL }, // Inst #10583 = VFPCLASSPDZ256rmb |
| 31518 | { 10582, 7, 1, 0, 1670, 1, 0, X86ImpOpBase + 78, 3878, 0|(1ULL<<MCID::MayLoad), 0xc13370066819ULL }, // Inst #10582 = VFPCLASSPDZ256rm |
| 31519 | { 10581, 4, 1, 0, 1241, 1, 0, X86ImpOpBase + 78, 3874, 0, 0xa23370066829ULL }, // Inst #10581 = VFPCLASSPDZ128rrk |
| 31520 | { 10580, 3, 1, 0, 1241, 1, 0, X86ImpOpBase + 78, 3871, 0, 0xa03370066829ULL }, // Inst #10580 = VFPCLASSPDZ128rr |
| 31521 | { 10579, 8, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 3863, 0|(1ULL<<MCID::MayLoad), 0xa23370066819ULL }, // Inst #10579 = VFPCLASSPDZ128rmk |
| 31522 | { 10578, 8, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 3863, 0|(1ULL<<MCID::MayLoad), 0x923370066819ULL }, // Inst #10578 = VFPCLASSPDZ128rmbk |
| 31523 | { 10577, 7, 1, 0, 1665, 1, 0, X86ImpOpBase + 78, 3856, 0|(1ULL<<MCID::MayLoad), 0x903370066819ULL }, // Inst #10577 = VFPCLASSPDZ128rmb |
| 31524 | { 10576, 7, 1, 0, 1801, 1, 0, X86ImpOpBase + 78, 3856, 0|(1ULL<<MCID::MayLoad), 0xa03370066819ULL }, // Inst #10576 = VFPCLASSPDZ128rm |
| 31525 | { 10575, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3852, 0|(1ULL<<MCID::MayRaiseFPException), 0xbf280c6829ULL }, // Inst #10575 = VFNMSUBSS4rr_REV |
| 31526 | { 10574, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbf280c6829ULL }, // Inst #10574 = VFNMSUBSS4rr_Int_REV |
| 31527 | { 10573, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbf280e682bULL }, // Inst #10573 = VFNMSUBSS4rr_Int |
| 31528 | { 10572, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3852, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbf280e682bULL }, // Inst #10572 = VFNMSUBSS4rr |
| 31529 | { 10571, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbf280e681bULL }, // Inst #10571 = VFNMSUBSS4rm_Int |
| 31530 | { 10570, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3844, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbf280e681bULL }, // Inst #10570 = VFNMSUBSS4rm |
| 31531 | { 10569, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbf280c6819ULL }, // Inst #10569 = VFNMSUBSS4mr_Int |
| 31532 | { 10568, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 3836, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbf280c6819ULL }, // Inst #10568 = VFNMSUBSS4mr |
| 31533 | { 10567, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3832, 0|(1ULL<<MCID::MayRaiseFPException), 0xbfb00c6829ULL }, // Inst #10567 = VFNMSUBSD4rr_REV |
| 31534 | { 10566, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbfb00c6829ULL }, // Inst #10566 = VFNMSUBSD4rr_Int_REV |
| 31535 | { 10565, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbfb00e682bULL }, // Inst #10565 = VFNMSUBSD4rr_Int |
| 31536 | { 10564, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3832, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbfb00e682bULL }, // Inst #10564 = VFNMSUBSD4rr |
| 31537 | { 10563, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbfb00e681bULL }, // Inst #10563 = VFNMSUBSD4rm_Int |
| 31538 | { 10562, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3824, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbfb00e681bULL }, // Inst #10562 = VFNMSUBSD4rm |
| 31539 | { 10561, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbfb00c6819ULL }, // Inst #10561 = VFNMSUBSD4mr_Int |
| 31540 | { 10560, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 3816, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbfb00c6819ULL }, // Inst #10560 = VFNMSUBSD4mr |
| 31541 | { 10559, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbe280c6829ULL }, // Inst #10559 = VFNMSUBPS4rr_REV |
| 31542 | { 10558, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbe280e682bULL }, // Inst #10558 = VFNMSUBPS4rr |
| 31543 | { 10557, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbe280e681bULL }, // Inst #10557 = VFNMSUBPS4rm |
| 31544 | { 10556, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbe280c6819ULL }, // Inst #10556 = VFNMSUBPS4mr |
| 31545 | { 10555, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1be280c6829ULL }, // Inst #10555 = VFNMSUBPS4Yrr_REV |
| 31546 | { 10554, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1be280e682bULL }, // Inst #10554 = VFNMSUBPS4Yrr |
| 31547 | { 10553, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1be280e681bULL }, // Inst #10553 = VFNMSUBPS4Yrm |
| 31548 | { 10552, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1be280c6819ULL }, // Inst #10552 = VFNMSUBPS4Ymr |
| 31549 | { 10551, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbeb00c6829ULL }, // Inst #10551 = VFNMSUBPD4rr_REV |
| 31550 | { 10550, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbeb00e682bULL }, // Inst #10550 = VFNMSUBPD4rr |
| 31551 | { 10549, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbeb00e681bULL }, // Inst #10549 = VFNMSUBPD4rm |
| 31552 | { 10548, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbeb00c6819ULL }, // Inst #10548 = VFNMSUBPD4mr |
| 31553 | { 10547, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1beb00c6829ULL }, // Inst #10547 = VFNMSUBPD4Yrr_REV |
| 31554 | { 10546, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1beb00e682bULL }, // Inst #10546 = VFNMSUBPD4Yrr |
| 31555 | { 10545, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1beb00e681bULL }, // Inst #10545 = VFNMSUBPD4Yrm |
| 31556 | { 10544, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1beb00c6819ULL }, // Inst #10544 = VFNMSUBPD4Ymr |
| 31557 | { 10543, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfa8004829ULL }, // Inst #10543 = VFNMSUB231SSr_Int |
| 31558 | { 10542, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfa8004829ULL }, // Inst #10542 = VFNMSUB231SSr |
| 31559 | { 10541, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfa8004819ULL }, // Inst #10541 = VFNMSUB231SSm_Int |
| 31560 | { 10540, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfa8004819ULL }, // Inst #10540 = VFNMSUB231SSm |
| 31561 | { 10539, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176dfe8004829ULL }, // Inst #10539 = VFNMSUB231SSZrb_Intkz |
| 31562 | { 10538, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172dfe8004829ULL }, // Inst #10538 = VFNMSUB231SSZrb_Intk |
| 31563 | { 10537, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170dfe8004829ULL }, // Inst #10537 = VFNMSUB231SSZrb_Int |
| 31564 | { 10536, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170dfe8004829ULL }, // Inst #10536 = VFNMSUB231SSZrb |
| 31565 | { 10535, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dfe8004829ULL }, // Inst #10535 = VFNMSUB231SSZr_Intkz |
| 31566 | { 10534, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dfe8004829ULL }, // Inst #10534 = VFNMSUB231SSZr_Intk |
| 31567 | { 10533, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dfe8004829ULL }, // Inst #10533 = VFNMSUB231SSZr_Int |
| 31568 | { 10532, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dfe8004829ULL }, // Inst #10532 = VFNMSUB231SSZr |
| 31569 | { 10531, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dfe8004819ULL }, // Inst #10531 = VFNMSUB231SSZm_Intkz |
| 31570 | { 10530, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dfe8004819ULL }, // Inst #10530 = VFNMSUB231SSZm_Intk |
| 31571 | { 10529, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dfe8004819ULL }, // Inst #10529 = VFNMSUB231SSZm_Int |
| 31572 | { 10528, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dfe8004819ULL }, // Inst #10528 = VFNMSUB231SSZm |
| 31573 | { 10527, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156dfe8014829ULL }, // Inst #10527 = VFNMSUB231SHZrb_Intkz |
| 31574 | { 10526, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152dfe8014829ULL }, // Inst #10526 = VFNMSUB231SHZrb_Intk |
| 31575 | { 10525, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150dfe8014829ULL }, // Inst #10525 = VFNMSUB231SHZrb_Int |
| 31576 | { 10524, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150dfe8014829ULL }, // Inst #10524 = VFNMSUB231SHZrb |
| 31577 | { 10523, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dfe8014829ULL }, // Inst #10523 = VFNMSUB231SHZr_Intkz |
| 31578 | { 10522, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dfe8014829ULL }, // Inst #10522 = VFNMSUB231SHZr_Intk |
| 31579 | { 10521, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dfe8014829ULL }, // Inst #10521 = VFNMSUB231SHZr_Int |
| 31580 | { 10520, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dfe8014829ULL }, // Inst #10520 = VFNMSUB231SHZr |
| 31581 | { 10519, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dfe8014819ULL }, // Inst #10519 = VFNMSUB231SHZm_Intkz |
| 31582 | { 10518, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dfe8014819ULL }, // Inst #10518 = VFNMSUB231SHZm_Intk |
| 31583 | { 10517, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dfe8014819ULL }, // Inst #10517 = VFNMSUB231SHZm_Int |
| 31584 | { 10516, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dfe8014819ULL }, // Inst #10516 = VFNMSUB231SHZm |
| 31585 | { 10515, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfb0024829ULL }, // Inst #10515 = VFNMSUB231SDr_Int |
| 31586 | { 10514, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfb0024829ULL }, // Inst #10514 = VFNMSUB231SDr |
| 31587 | { 10513, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfb0024819ULL }, // Inst #10513 = VFNMSUB231SDm_Int |
| 31588 | { 10512, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdfb0024819ULL }, // Inst #10512 = VFNMSUB231SDm |
| 31589 | { 10511, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196dff0024829ULL }, // Inst #10511 = VFNMSUB231SDZrb_Intkz |
| 31590 | { 10510, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192dff0024829ULL }, // Inst #10510 = VFNMSUB231SDZrb_Intk |
| 31591 | { 10509, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190dff0024829ULL }, // Inst #10509 = VFNMSUB231SDZrb_Int |
| 31592 | { 10508, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190dff0024829ULL }, // Inst #10508 = VFNMSUB231SDZrb |
| 31593 | { 10507, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86dff0024829ULL }, // Inst #10507 = VFNMSUB231SDZr_Intkz |
| 31594 | { 10506, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82dff0024829ULL }, // Inst #10506 = VFNMSUB231SDZr_Intk |
| 31595 | { 10505, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dff0024829ULL }, // Inst #10505 = VFNMSUB231SDZr_Int |
| 31596 | { 10504, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dff0024829ULL }, // Inst #10504 = VFNMSUB231SDZr |
| 31597 | { 10503, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86dff0024819ULL }, // Inst #10503 = VFNMSUB231SDZm_Intkz |
| 31598 | { 10502, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82dff0024819ULL }, // Inst #10502 = VFNMSUB231SDZm_Intk |
| 31599 | { 10501, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dff0024819ULL }, // Inst #10501 = VFNMSUB231SDZm_Int |
| 31600 | { 10500, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dff0024819ULL }, // Inst #10500 = VFNMSUB231SDZm |
| 31601 | { 10499, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdf28004829ULL }, // Inst #10499 = VFNMSUB231PSr |
| 31602 | { 10498, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdf28004819ULL }, // Inst #10498 = VFNMSUB231PSm |
| 31603 | { 10497, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf68004829ULL }, // Inst #10497 = VFNMSUB231PSZrkz |
| 31604 | { 10496, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadf68004829ULL }, // Inst #10496 = VFNMSUB231PSZrk |
| 31605 | { 10495, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17edf68004829ULL }, // Inst #10495 = VFNMSUB231PSZrbkz |
| 31606 | { 10494, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17adf68004829ULL }, // Inst #10494 = VFNMSUB231PSZrbk |
| 31607 | { 10493, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178df68004829ULL }, // Inst #10493 = VFNMSUB231PSZrb |
| 31608 | { 10492, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df68004829ULL }, // Inst #10492 = VFNMSUB231PSZr |
| 31609 | { 10491, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf68004819ULL }, // Inst #10491 = VFNMSUB231PSZmkz |
| 31610 | { 10490, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadf68004819ULL }, // Inst #10490 = VFNMSUB231PSZmk |
| 31611 | { 10489, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7edf68004819ULL }, // Inst #10489 = VFNMSUB231PSZmbkz |
| 31612 | { 10488, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7adf68004819ULL }, // Inst #10488 = VFNMSUB231PSZmbk |
| 31613 | { 10487, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78df68004819ULL }, // Inst #10487 = VFNMSUB231PSZmb |
| 31614 | { 10486, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df68004819ULL }, // Inst #10486 = VFNMSUB231PSZm |
| 31615 | { 10485, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df68004829ULL }, // Inst #10485 = VFNMSUB231PSZ256rkz |
| 31616 | { 10484, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3df68004829ULL }, // Inst #10484 = VFNMSUB231PSZ256rk |
| 31617 | { 10483, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df68004829ULL }, // Inst #10483 = VFNMSUB231PSZ256r |
| 31618 | { 10482, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df68004819ULL }, // Inst #10482 = VFNMSUB231PSZ256mkz |
| 31619 | { 10481, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3df68004819ULL }, // Inst #10481 = VFNMSUB231PSZ256mk |
| 31620 | { 10480, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77df68004819ULL }, // Inst #10480 = VFNMSUB231PSZ256mbkz |
| 31621 | { 10479, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73df68004819ULL }, // Inst #10479 = VFNMSUB231PSZ256mbk |
| 31622 | { 10478, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71df68004819ULL }, // Inst #10478 = VFNMSUB231PSZ256mb |
| 31623 | { 10477, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df68004819ULL }, // Inst #10477 = VFNMSUB231PSZ256m |
| 31624 | { 10476, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df68004829ULL }, // Inst #10476 = VFNMSUB231PSZ128rkz |
| 31625 | { 10475, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2df68004829ULL }, // Inst #10475 = VFNMSUB231PSZ128rk |
| 31626 | { 10474, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df68004829ULL }, // Inst #10474 = VFNMSUB231PSZ128r |
| 31627 | { 10473, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df68004819ULL }, // Inst #10473 = VFNMSUB231PSZ128mkz |
| 31628 | { 10472, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2df68004819ULL }, // Inst #10472 = VFNMSUB231PSZ128mk |
| 31629 | { 10471, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76df68004819ULL }, // Inst #10471 = VFNMSUB231PSZ128mbkz |
| 31630 | { 10470, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72df68004819ULL }, // Inst #10470 = VFNMSUB231PSZ128mbk |
| 31631 | { 10469, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70df68004819ULL }, // Inst #10469 = VFNMSUB231PSZ128mb |
| 31632 | { 10468, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df68004819ULL }, // Inst #10468 = VFNMSUB231PSZ128m |
| 31633 | { 10467, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1df28004829ULL }, // Inst #10467 = VFNMSUB231PSYr |
| 31634 | { 10466, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1df28004819ULL }, // Inst #10466 = VFNMSUB231PSYm |
| 31635 | { 10465, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf68014829ULL }, // Inst #10465 = VFNMSUB231PHZrkz |
| 31636 | { 10464, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadf68014829ULL }, // Inst #10464 = VFNMSUB231PHZrk |
| 31637 | { 10463, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15edf68014829ULL }, // Inst #10463 = VFNMSUB231PHZrbkz |
| 31638 | { 10462, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15adf68014829ULL }, // Inst #10462 = VFNMSUB231PHZrbk |
| 31639 | { 10461, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158df68014829ULL }, // Inst #10461 = VFNMSUB231PHZrb |
| 31640 | { 10460, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df68014829ULL }, // Inst #10460 = VFNMSUB231PHZr |
| 31641 | { 10459, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf68014819ULL }, // Inst #10459 = VFNMSUB231PHZmkz |
| 31642 | { 10458, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadf68014819ULL }, // Inst #10458 = VFNMSUB231PHZmk |
| 31643 | { 10457, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5edf68014819ULL }, // Inst #10457 = VFNMSUB231PHZmbkz |
| 31644 | { 10456, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5adf68014819ULL }, // Inst #10456 = VFNMSUB231PHZmbk |
| 31645 | { 10455, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58df68014819ULL }, // Inst #10455 = VFNMSUB231PHZmb |
| 31646 | { 10454, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df68014819ULL }, // Inst #10454 = VFNMSUB231PHZm |
| 31647 | { 10453, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df68014829ULL }, // Inst #10453 = VFNMSUB231PHZ256rkz |
| 31648 | { 10452, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3df68014829ULL }, // Inst #10452 = VFNMSUB231PHZ256rk |
| 31649 | { 10451, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df68014829ULL }, // Inst #10451 = VFNMSUB231PHZ256r |
| 31650 | { 10450, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df68014819ULL }, // Inst #10450 = VFNMSUB231PHZ256mkz |
| 31651 | { 10449, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3df68014819ULL }, // Inst #10449 = VFNMSUB231PHZ256mk |
| 31652 | { 10448, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57df68014819ULL }, // Inst #10448 = VFNMSUB231PHZ256mbkz |
| 31653 | { 10447, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53df68014819ULL }, // Inst #10447 = VFNMSUB231PHZ256mbk |
| 31654 | { 10446, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51df68014819ULL }, // Inst #10446 = VFNMSUB231PHZ256mb |
| 31655 | { 10445, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df68014819ULL }, // Inst #10445 = VFNMSUB231PHZ256m |
| 31656 | { 10444, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df68014829ULL }, // Inst #10444 = VFNMSUB231PHZ128rkz |
| 31657 | { 10443, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2df68014829ULL }, // Inst #10443 = VFNMSUB231PHZ128rk |
| 31658 | { 10442, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df68014829ULL }, // Inst #10442 = VFNMSUB231PHZ128r |
| 31659 | { 10441, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df68014819ULL }, // Inst #10441 = VFNMSUB231PHZ128mkz |
| 31660 | { 10440, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2df68014819ULL }, // Inst #10440 = VFNMSUB231PHZ128mk |
| 31661 | { 10439, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56df68014819ULL }, // Inst #10439 = VFNMSUB231PHZ128mbkz |
| 31662 | { 10438, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52df68014819ULL }, // Inst #10438 = VFNMSUB231PHZ128mbk |
| 31663 | { 10437, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50df68014819ULL }, // Inst #10437 = VFNMSUB231PHZ128mb |
| 31664 | { 10436, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df68014819ULL }, // Inst #10436 = VFNMSUB231PHZ128m |
| 31665 | { 10435, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdf30024829ULL }, // Inst #10435 = VFNMSUB231PDr |
| 31666 | { 10434, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdf30024819ULL }, // Inst #10434 = VFNMSUB231PDm |
| 31667 | { 10433, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf70024829ULL }, // Inst #10433 = VFNMSUB231PDZrkz |
| 31668 | { 10432, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadf70024829ULL }, // Inst #10432 = VFNMSUB231PDZrk |
| 31669 | { 10431, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19edf70024829ULL }, // Inst #10431 = VFNMSUB231PDZrbkz |
| 31670 | { 10430, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19adf70024829ULL }, // Inst #10430 = VFNMSUB231PDZrbk |
| 31671 | { 10429, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198df70024829ULL }, // Inst #10429 = VFNMSUB231PDZrb |
| 31672 | { 10428, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df70024829ULL }, // Inst #10428 = VFNMSUB231PDZr |
| 31673 | { 10427, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedf70024819ULL }, // Inst #10427 = VFNMSUB231PDZmkz |
| 31674 | { 10426, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadf70024819ULL }, // Inst #10426 = VFNMSUB231PDZmk |
| 31675 | { 10425, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9edf70024819ULL }, // Inst #10425 = VFNMSUB231PDZmbkz |
| 31676 | { 10424, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9adf70024819ULL }, // Inst #10424 = VFNMSUB231PDZmbk |
| 31677 | { 10423, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98df70024819ULL }, // Inst #10423 = VFNMSUB231PDZmb |
| 31678 | { 10422, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8df70024819ULL }, // Inst #10422 = VFNMSUB231PDZm |
| 31679 | { 10421, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df70024829ULL }, // Inst #10421 = VFNMSUB231PDZ256rkz |
| 31680 | { 10420, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3df70024829ULL }, // Inst #10420 = VFNMSUB231PDZ256rk |
| 31681 | { 10419, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df70024829ULL }, // Inst #10419 = VFNMSUB231PDZ256r |
| 31682 | { 10418, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7df70024819ULL }, // Inst #10418 = VFNMSUB231PDZ256mkz |
| 31683 | { 10417, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3df70024819ULL }, // Inst #10417 = VFNMSUB231PDZ256mk |
| 31684 | { 10416, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97df70024819ULL }, // Inst #10416 = VFNMSUB231PDZ256mbkz |
| 31685 | { 10415, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93df70024819ULL }, // Inst #10415 = VFNMSUB231PDZ256mbk |
| 31686 | { 10414, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91df70024819ULL }, // Inst #10414 = VFNMSUB231PDZ256mb |
| 31687 | { 10413, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1df70024819ULL }, // Inst #10413 = VFNMSUB231PDZ256m |
| 31688 | { 10412, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df70024829ULL }, // Inst #10412 = VFNMSUB231PDZ128rkz |
| 31689 | { 10411, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2df70024829ULL }, // Inst #10411 = VFNMSUB231PDZ128rk |
| 31690 | { 10410, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df70024829ULL }, // Inst #10410 = VFNMSUB231PDZ128r |
| 31691 | { 10409, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6df70024819ULL }, // Inst #10409 = VFNMSUB231PDZ128mkz |
| 31692 | { 10408, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2df70024819ULL }, // Inst #10408 = VFNMSUB231PDZ128mk |
| 31693 | { 10407, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96df70024819ULL }, // Inst #10407 = VFNMSUB231PDZ128mbkz |
| 31694 | { 10406, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92df70024819ULL }, // Inst #10406 = VFNMSUB231PDZ128mbk |
| 31695 | { 10405, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90df70024819ULL }, // Inst #10405 = VFNMSUB231PDZ128mb |
| 31696 | { 10404, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0df70024819ULL }, // Inst #10404 = VFNMSUB231PDZ128m |
| 31697 | { 10403, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1df30024829ULL }, // Inst #10403 = VFNMSUB231PDYr |
| 31698 | { 10402, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1df30024819ULL }, // Inst #10402 = VFNMSUB231PDYm |
| 31699 | { 10401, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7a8004829ULL }, // Inst #10401 = VFNMSUB213SSr_Int |
| 31700 | { 10400, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7a8004829ULL }, // Inst #10400 = VFNMSUB213SSr |
| 31701 | { 10399, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7a8004819ULL }, // Inst #10399 = VFNMSUB213SSm_Int |
| 31702 | { 10398, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7a8004819ULL }, // Inst #10398 = VFNMSUB213SSm |
| 31703 | { 10397, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176d7e8004829ULL }, // Inst #10397 = VFNMSUB213SSZrb_Intkz |
| 31704 | { 10396, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172d7e8004829ULL }, // Inst #10396 = VFNMSUB213SSZrb_Intk |
| 31705 | { 10395, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170d7e8004829ULL }, // Inst #10395 = VFNMSUB213SSZrb_Int |
| 31706 | { 10394, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170d7e8004829ULL }, // Inst #10394 = VFNMSUB213SSZrb |
| 31707 | { 10393, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d7e8004829ULL }, // Inst #10393 = VFNMSUB213SSZr_Intkz |
| 31708 | { 10392, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d7e8004829ULL }, // Inst #10392 = VFNMSUB213SSZr_Intk |
| 31709 | { 10391, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d7e8004829ULL }, // Inst #10391 = VFNMSUB213SSZr_Int |
| 31710 | { 10390, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d7e8004829ULL }, // Inst #10390 = VFNMSUB213SSZr |
| 31711 | { 10389, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d7e8004819ULL }, // Inst #10389 = VFNMSUB213SSZm_Intkz |
| 31712 | { 10388, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d7e8004819ULL }, // Inst #10388 = VFNMSUB213SSZm_Intk |
| 31713 | { 10387, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d7e8004819ULL }, // Inst #10387 = VFNMSUB213SSZm_Int |
| 31714 | { 10386, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d7e8004819ULL }, // Inst #10386 = VFNMSUB213SSZm |
| 31715 | { 10385, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156d7e8014829ULL }, // Inst #10385 = VFNMSUB213SHZrb_Intkz |
| 31716 | { 10384, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152d7e8014829ULL }, // Inst #10384 = VFNMSUB213SHZrb_Intk |
| 31717 | { 10383, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150d7e8014829ULL }, // Inst #10383 = VFNMSUB213SHZrb_Int |
| 31718 | { 10382, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150d7e8014829ULL }, // Inst #10382 = VFNMSUB213SHZrb |
| 31719 | { 10381, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d7e8014829ULL }, // Inst #10381 = VFNMSUB213SHZr_Intkz |
| 31720 | { 10380, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d7e8014829ULL }, // Inst #10380 = VFNMSUB213SHZr_Intk |
| 31721 | { 10379, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d7e8014829ULL }, // Inst #10379 = VFNMSUB213SHZr_Int |
| 31722 | { 10378, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d7e8014829ULL }, // Inst #10378 = VFNMSUB213SHZr |
| 31723 | { 10377, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d7e8014819ULL }, // Inst #10377 = VFNMSUB213SHZm_Intkz |
| 31724 | { 10376, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d7e8014819ULL }, // Inst #10376 = VFNMSUB213SHZm_Intk |
| 31725 | { 10375, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d7e8014819ULL }, // Inst #10375 = VFNMSUB213SHZm_Int |
| 31726 | { 10374, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d7e8014819ULL }, // Inst #10374 = VFNMSUB213SHZm |
| 31727 | { 10373, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7b0024829ULL }, // Inst #10373 = VFNMSUB213SDr_Int |
| 31728 | { 10372, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7b0024829ULL }, // Inst #10372 = VFNMSUB213SDr |
| 31729 | { 10371, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7b0024819ULL }, // Inst #10371 = VFNMSUB213SDm_Int |
| 31730 | { 10370, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd7b0024819ULL }, // Inst #10370 = VFNMSUB213SDm |
| 31731 | { 10369, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196d7f0024829ULL }, // Inst #10369 = VFNMSUB213SDZrb_Intkz |
| 31732 | { 10368, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192d7f0024829ULL }, // Inst #10368 = VFNMSUB213SDZrb_Intk |
| 31733 | { 10367, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190d7f0024829ULL }, // Inst #10367 = VFNMSUB213SDZrb_Int |
| 31734 | { 10366, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190d7f0024829ULL }, // Inst #10366 = VFNMSUB213SDZrb |
| 31735 | { 10365, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d7f0024829ULL }, // Inst #10365 = VFNMSUB213SDZr_Intkz |
| 31736 | { 10364, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d7f0024829ULL }, // Inst #10364 = VFNMSUB213SDZr_Intk |
| 31737 | { 10363, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d7f0024829ULL }, // Inst #10363 = VFNMSUB213SDZr_Int |
| 31738 | { 10362, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d7f0024829ULL }, // Inst #10362 = VFNMSUB213SDZr |
| 31739 | { 10361, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d7f0024819ULL }, // Inst #10361 = VFNMSUB213SDZm_Intkz |
| 31740 | { 10360, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d7f0024819ULL }, // Inst #10360 = VFNMSUB213SDZm_Intk |
| 31741 | { 10359, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d7f0024819ULL }, // Inst #10359 = VFNMSUB213SDZm_Int |
| 31742 | { 10358, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d7f0024819ULL }, // Inst #10358 = VFNMSUB213SDZm |
| 31743 | { 10357, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd728004829ULL }, // Inst #10357 = VFNMSUB213PSr |
| 31744 | { 10356, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd728004819ULL }, // Inst #10356 = VFNMSUB213PSm |
| 31745 | { 10355, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed768004829ULL }, // Inst #10355 = VFNMSUB213PSZrkz |
| 31746 | { 10354, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead768004829ULL }, // Inst #10354 = VFNMSUB213PSZrk |
| 31747 | { 10353, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ed768004829ULL }, // Inst #10353 = VFNMSUB213PSZrbkz |
| 31748 | { 10352, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ad768004829ULL }, // Inst #10352 = VFNMSUB213PSZrbk |
| 31749 | { 10351, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178d768004829ULL }, // Inst #10351 = VFNMSUB213PSZrb |
| 31750 | { 10350, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d768004829ULL }, // Inst #10350 = VFNMSUB213PSZr |
| 31751 | { 10349, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed768004819ULL }, // Inst #10349 = VFNMSUB213PSZmkz |
| 31752 | { 10348, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead768004819ULL }, // Inst #10348 = VFNMSUB213PSZmk |
| 31753 | { 10347, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed768004819ULL }, // Inst #10347 = VFNMSUB213PSZmbkz |
| 31754 | { 10346, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad768004819ULL }, // Inst #10346 = VFNMSUB213PSZmbk |
| 31755 | { 10345, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d768004819ULL }, // Inst #10345 = VFNMSUB213PSZmb |
| 31756 | { 10344, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d768004819ULL }, // Inst #10344 = VFNMSUB213PSZm |
| 31757 | { 10343, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d768004829ULL }, // Inst #10343 = VFNMSUB213PSZ256rkz |
| 31758 | { 10342, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d768004829ULL }, // Inst #10342 = VFNMSUB213PSZ256rk |
| 31759 | { 10341, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d768004829ULL }, // Inst #10341 = VFNMSUB213PSZ256r |
| 31760 | { 10340, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d768004819ULL }, // Inst #10340 = VFNMSUB213PSZ256mkz |
| 31761 | { 10339, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d768004819ULL }, // Inst #10339 = VFNMSUB213PSZ256mk |
| 31762 | { 10338, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d768004819ULL }, // Inst #10338 = VFNMSUB213PSZ256mbkz |
| 31763 | { 10337, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d768004819ULL }, // Inst #10337 = VFNMSUB213PSZ256mbk |
| 31764 | { 10336, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d768004819ULL }, // Inst #10336 = VFNMSUB213PSZ256mb |
| 31765 | { 10335, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d768004819ULL }, // Inst #10335 = VFNMSUB213PSZ256m |
| 31766 | { 10334, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d768004829ULL }, // Inst #10334 = VFNMSUB213PSZ128rkz |
| 31767 | { 10333, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d768004829ULL }, // Inst #10333 = VFNMSUB213PSZ128rk |
| 31768 | { 10332, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d768004829ULL }, // Inst #10332 = VFNMSUB213PSZ128r |
| 31769 | { 10331, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d768004819ULL }, // Inst #10331 = VFNMSUB213PSZ128mkz |
| 31770 | { 10330, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d768004819ULL }, // Inst #10330 = VFNMSUB213PSZ128mk |
| 31771 | { 10329, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d768004819ULL }, // Inst #10329 = VFNMSUB213PSZ128mbkz |
| 31772 | { 10328, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d768004819ULL }, // Inst #10328 = VFNMSUB213PSZ128mbk |
| 31773 | { 10327, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d768004819ULL }, // Inst #10327 = VFNMSUB213PSZ128mb |
| 31774 | { 10326, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d768004819ULL }, // Inst #10326 = VFNMSUB213PSZ128m |
| 31775 | { 10325, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d728004829ULL }, // Inst #10325 = VFNMSUB213PSYr |
| 31776 | { 10324, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d728004819ULL }, // Inst #10324 = VFNMSUB213PSYm |
| 31777 | { 10323, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed768014829ULL }, // Inst #10323 = VFNMSUB213PHZrkz |
| 31778 | { 10322, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead768014829ULL }, // Inst #10322 = VFNMSUB213PHZrk |
| 31779 | { 10321, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ed768014829ULL }, // Inst #10321 = VFNMSUB213PHZrbkz |
| 31780 | { 10320, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ad768014829ULL }, // Inst #10320 = VFNMSUB213PHZrbk |
| 31781 | { 10319, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158d768014829ULL }, // Inst #10319 = VFNMSUB213PHZrb |
| 31782 | { 10318, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d768014829ULL }, // Inst #10318 = VFNMSUB213PHZr |
| 31783 | { 10317, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed768014819ULL }, // Inst #10317 = VFNMSUB213PHZmkz |
| 31784 | { 10316, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead768014819ULL }, // Inst #10316 = VFNMSUB213PHZmk |
| 31785 | { 10315, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed768014819ULL }, // Inst #10315 = VFNMSUB213PHZmbkz |
| 31786 | { 10314, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad768014819ULL }, // Inst #10314 = VFNMSUB213PHZmbk |
| 31787 | { 10313, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d768014819ULL }, // Inst #10313 = VFNMSUB213PHZmb |
| 31788 | { 10312, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d768014819ULL }, // Inst #10312 = VFNMSUB213PHZm |
| 31789 | { 10311, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d768014829ULL }, // Inst #10311 = VFNMSUB213PHZ256rkz |
| 31790 | { 10310, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d768014829ULL }, // Inst #10310 = VFNMSUB213PHZ256rk |
| 31791 | { 10309, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d768014829ULL }, // Inst #10309 = VFNMSUB213PHZ256r |
| 31792 | { 10308, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d768014819ULL }, // Inst #10308 = VFNMSUB213PHZ256mkz |
| 31793 | { 10307, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d768014819ULL }, // Inst #10307 = VFNMSUB213PHZ256mk |
| 31794 | { 10306, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d768014819ULL }, // Inst #10306 = VFNMSUB213PHZ256mbkz |
| 31795 | { 10305, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d768014819ULL }, // Inst #10305 = VFNMSUB213PHZ256mbk |
| 31796 | { 10304, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d768014819ULL }, // Inst #10304 = VFNMSUB213PHZ256mb |
| 31797 | { 10303, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d768014819ULL }, // Inst #10303 = VFNMSUB213PHZ256m |
| 31798 | { 10302, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d768014829ULL }, // Inst #10302 = VFNMSUB213PHZ128rkz |
| 31799 | { 10301, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d768014829ULL }, // Inst #10301 = VFNMSUB213PHZ128rk |
| 31800 | { 10300, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d768014829ULL }, // Inst #10300 = VFNMSUB213PHZ128r |
| 31801 | { 10299, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d768014819ULL }, // Inst #10299 = VFNMSUB213PHZ128mkz |
| 31802 | { 10298, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d768014819ULL }, // Inst #10298 = VFNMSUB213PHZ128mk |
| 31803 | { 10297, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d768014819ULL }, // Inst #10297 = VFNMSUB213PHZ128mbkz |
| 31804 | { 10296, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d768014819ULL }, // Inst #10296 = VFNMSUB213PHZ128mbk |
| 31805 | { 10295, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d768014819ULL }, // Inst #10295 = VFNMSUB213PHZ128mb |
| 31806 | { 10294, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d768014819ULL }, // Inst #10294 = VFNMSUB213PHZ128m |
| 31807 | { 10293, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd730024829ULL }, // Inst #10293 = VFNMSUB213PDr |
| 31808 | { 10292, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd730024819ULL }, // Inst #10292 = VFNMSUB213PDm |
| 31809 | { 10291, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed770024829ULL }, // Inst #10291 = VFNMSUB213PDZrkz |
| 31810 | { 10290, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead770024829ULL }, // Inst #10290 = VFNMSUB213PDZrk |
| 31811 | { 10289, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ed770024829ULL }, // Inst #10289 = VFNMSUB213PDZrbkz |
| 31812 | { 10288, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ad770024829ULL }, // Inst #10288 = VFNMSUB213PDZrbk |
| 31813 | { 10287, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198d770024829ULL }, // Inst #10287 = VFNMSUB213PDZrb |
| 31814 | { 10286, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d770024829ULL }, // Inst #10286 = VFNMSUB213PDZr |
| 31815 | { 10285, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed770024819ULL }, // Inst #10285 = VFNMSUB213PDZmkz |
| 31816 | { 10284, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead770024819ULL }, // Inst #10284 = VFNMSUB213PDZmk |
| 31817 | { 10283, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed770024819ULL }, // Inst #10283 = VFNMSUB213PDZmbkz |
| 31818 | { 10282, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad770024819ULL }, // Inst #10282 = VFNMSUB213PDZmbk |
| 31819 | { 10281, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d770024819ULL }, // Inst #10281 = VFNMSUB213PDZmb |
| 31820 | { 10280, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d770024819ULL }, // Inst #10280 = VFNMSUB213PDZm |
| 31821 | { 10279, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d770024829ULL }, // Inst #10279 = VFNMSUB213PDZ256rkz |
| 31822 | { 10278, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d770024829ULL }, // Inst #10278 = VFNMSUB213PDZ256rk |
| 31823 | { 10277, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d770024829ULL }, // Inst #10277 = VFNMSUB213PDZ256r |
| 31824 | { 10276, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d770024819ULL }, // Inst #10276 = VFNMSUB213PDZ256mkz |
| 31825 | { 10275, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d770024819ULL }, // Inst #10275 = VFNMSUB213PDZ256mk |
| 31826 | { 10274, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d770024819ULL }, // Inst #10274 = VFNMSUB213PDZ256mbkz |
| 31827 | { 10273, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d770024819ULL }, // Inst #10273 = VFNMSUB213PDZ256mbk |
| 31828 | { 10272, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d770024819ULL }, // Inst #10272 = VFNMSUB213PDZ256mb |
| 31829 | { 10271, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d770024819ULL }, // Inst #10271 = VFNMSUB213PDZ256m |
| 31830 | { 10270, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d770024829ULL }, // Inst #10270 = VFNMSUB213PDZ128rkz |
| 31831 | { 10269, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d770024829ULL }, // Inst #10269 = VFNMSUB213PDZ128rk |
| 31832 | { 10268, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d770024829ULL }, // Inst #10268 = VFNMSUB213PDZ128r |
| 31833 | { 10267, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d770024819ULL }, // Inst #10267 = VFNMSUB213PDZ128mkz |
| 31834 | { 10266, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d770024819ULL }, // Inst #10266 = VFNMSUB213PDZ128mk |
| 31835 | { 10265, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d770024819ULL }, // Inst #10265 = VFNMSUB213PDZ128mbkz |
| 31836 | { 10264, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d770024819ULL }, // Inst #10264 = VFNMSUB213PDZ128mbk |
| 31837 | { 10263, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d770024819ULL }, // Inst #10263 = VFNMSUB213PDZ128mb |
| 31838 | { 10262, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d770024819ULL }, // Inst #10262 = VFNMSUB213PDZ128m |
| 31839 | { 10261, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d730024829ULL }, // Inst #10261 = VFNMSUB213PDYr |
| 31840 | { 10260, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d730024819ULL }, // Inst #10260 = VFNMSUB213PDYm |
| 31841 | { 10259, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfa8004829ULL }, // Inst #10259 = VFNMSUB132SSr_Int |
| 31842 | { 10258, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfa8004829ULL }, // Inst #10258 = VFNMSUB132SSr |
| 31843 | { 10257, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfa8004819ULL }, // Inst #10257 = VFNMSUB132SSm_Int |
| 31844 | { 10256, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfa8004819ULL }, // Inst #10256 = VFNMSUB132SSm |
| 31845 | { 10255, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176cfe8004829ULL }, // Inst #10255 = VFNMSUB132SSZrb_Intkz |
| 31846 | { 10254, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172cfe8004829ULL }, // Inst #10254 = VFNMSUB132SSZrb_Intk |
| 31847 | { 10253, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170cfe8004829ULL }, // Inst #10253 = VFNMSUB132SSZrb_Int |
| 31848 | { 10252, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170cfe8004829ULL }, // Inst #10252 = VFNMSUB132SSZrb |
| 31849 | { 10251, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cfe8004829ULL }, // Inst #10251 = VFNMSUB132SSZr_Intkz |
| 31850 | { 10250, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cfe8004829ULL }, // Inst #10250 = VFNMSUB132SSZr_Intk |
| 31851 | { 10249, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cfe8004829ULL }, // Inst #10249 = VFNMSUB132SSZr_Int |
| 31852 | { 10248, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cfe8004829ULL }, // Inst #10248 = VFNMSUB132SSZr |
| 31853 | { 10247, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cfe8004819ULL }, // Inst #10247 = VFNMSUB132SSZm_Intkz |
| 31854 | { 10246, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cfe8004819ULL }, // Inst #10246 = VFNMSUB132SSZm_Intk |
| 31855 | { 10245, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cfe8004819ULL }, // Inst #10245 = VFNMSUB132SSZm_Int |
| 31856 | { 10244, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cfe8004819ULL }, // Inst #10244 = VFNMSUB132SSZm |
| 31857 | { 10243, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156cfe8014829ULL }, // Inst #10243 = VFNMSUB132SHZrb_Intkz |
| 31858 | { 10242, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152cfe8014829ULL }, // Inst #10242 = VFNMSUB132SHZrb_Intk |
| 31859 | { 10241, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150cfe8014829ULL }, // Inst #10241 = VFNMSUB132SHZrb_Int |
| 31860 | { 10240, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150cfe8014829ULL }, // Inst #10240 = VFNMSUB132SHZrb |
| 31861 | { 10239, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cfe8014829ULL }, // Inst #10239 = VFNMSUB132SHZr_Intkz |
| 31862 | { 10238, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cfe8014829ULL }, // Inst #10238 = VFNMSUB132SHZr_Intk |
| 31863 | { 10237, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cfe8014829ULL }, // Inst #10237 = VFNMSUB132SHZr_Int |
| 31864 | { 10236, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cfe8014829ULL }, // Inst #10236 = VFNMSUB132SHZr |
| 31865 | { 10235, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cfe8014819ULL }, // Inst #10235 = VFNMSUB132SHZm_Intkz |
| 31866 | { 10234, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cfe8014819ULL }, // Inst #10234 = VFNMSUB132SHZm_Intk |
| 31867 | { 10233, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cfe8014819ULL }, // Inst #10233 = VFNMSUB132SHZm_Int |
| 31868 | { 10232, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cfe8014819ULL }, // Inst #10232 = VFNMSUB132SHZm |
| 31869 | { 10231, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfb0024829ULL }, // Inst #10231 = VFNMSUB132SDr_Int |
| 31870 | { 10230, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfb0024829ULL }, // Inst #10230 = VFNMSUB132SDr |
| 31871 | { 10229, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfb0024819ULL }, // Inst #10229 = VFNMSUB132SDm_Int |
| 31872 | { 10228, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcfb0024819ULL }, // Inst #10228 = VFNMSUB132SDm |
| 31873 | { 10227, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196cff0024829ULL }, // Inst #10227 = VFNMSUB132SDZrb_Intkz |
| 31874 | { 10226, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192cff0024829ULL }, // Inst #10226 = VFNMSUB132SDZrb_Intk |
| 31875 | { 10225, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190cff0024829ULL }, // Inst #10225 = VFNMSUB132SDZrb_Int |
| 31876 | { 10224, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190cff0024829ULL }, // Inst #10224 = VFNMSUB132SDZrb |
| 31877 | { 10223, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cff0024829ULL }, // Inst #10223 = VFNMSUB132SDZr_Intkz |
| 31878 | { 10222, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cff0024829ULL }, // Inst #10222 = VFNMSUB132SDZr_Intk |
| 31879 | { 10221, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cff0024829ULL }, // Inst #10221 = VFNMSUB132SDZr_Int |
| 31880 | { 10220, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cff0024829ULL }, // Inst #10220 = VFNMSUB132SDZr |
| 31881 | { 10219, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cff0024819ULL }, // Inst #10219 = VFNMSUB132SDZm_Intkz |
| 31882 | { 10218, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cff0024819ULL }, // Inst #10218 = VFNMSUB132SDZm_Intk |
| 31883 | { 10217, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cff0024819ULL }, // Inst #10217 = VFNMSUB132SDZm_Int |
| 31884 | { 10216, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cff0024819ULL }, // Inst #10216 = VFNMSUB132SDZm |
| 31885 | { 10215, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcf28004829ULL }, // Inst #10215 = VFNMSUB132PSr |
| 31886 | { 10214, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcf28004819ULL }, // Inst #10214 = VFNMSUB132PSm |
| 31887 | { 10213, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf68004829ULL }, // Inst #10213 = VFNMSUB132PSZrkz |
| 31888 | { 10212, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacf68004829ULL }, // Inst #10212 = VFNMSUB132PSZrk |
| 31889 | { 10211, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ecf68004829ULL }, // Inst #10211 = VFNMSUB132PSZrbkz |
| 31890 | { 10210, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17acf68004829ULL }, // Inst #10210 = VFNMSUB132PSZrbk |
| 31891 | { 10209, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178cf68004829ULL }, // Inst #10209 = VFNMSUB132PSZrb |
| 31892 | { 10208, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf68004829ULL }, // Inst #10208 = VFNMSUB132PSZr |
| 31893 | { 10207, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf68004819ULL }, // Inst #10207 = VFNMSUB132PSZmkz |
| 31894 | { 10206, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacf68004819ULL }, // Inst #10206 = VFNMSUB132PSZmk |
| 31895 | { 10205, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ecf68004819ULL }, // Inst #10205 = VFNMSUB132PSZmbkz |
| 31896 | { 10204, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7acf68004819ULL }, // Inst #10204 = VFNMSUB132PSZmbk |
| 31897 | { 10203, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78cf68004819ULL }, // Inst #10203 = VFNMSUB132PSZmb |
| 31898 | { 10202, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf68004819ULL }, // Inst #10202 = VFNMSUB132PSZm |
| 31899 | { 10201, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf68004829ULL }, // Inst #10201 = VFNMSUB132PSZ256rkz |
| 31900 | { 10200, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cf68004829ULL }, // Inst #10200 = VFNMSUB132PSZ256rk |
| 31901 | { 10199, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf68004829ULL }, // Inst #10199 = VFNMSUB132PSZ256r |
| 31902 | { 10198, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf68004819ULL }, // Inst #10198 = VFNMSUB132PSZ256mkz |
| 31903 | { 10197, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cf68004819ULL }, // Inst #10197 = VFNMSUB132PSZ256mk |
| 31904 | { 10196, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77cf68004819ULL }, // Inst #10196 = VFNMSUB132PSZ256mbkz |
| 31905 | { 10195, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73cf68004819ULL }, // Inst #10195 = VFNMSUB132PSZ256mbk |
| 31906 | { 10194, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71cf68004819ULL }, // Inst #10194 = VFNMSUB132PSZ256mb |
| 31907 | { 10193, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf68004819ULL }, // Inst #10193 = VFNMSUB132PSZ256m |
| 31908 | { 10192, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf68004829ULL }, // Inst #10192 = VFNMSUB132PSZ128rkz |
| 31909 | { 10191, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cf68004829ULL }, // Inst #10191 = VFNMSUB132PSZ128rk |
| 31910 | { 10190, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf68004829ULL }, // Inst #10190 = VFNMSUB132PSZ128r |
| 31911 | { 10189, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf68004819ULL }, // Inst #10189 = VFNMSUB132PSZ128mkz |
| 31912 | { 10188, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cf68004819ULL }, // Inst #10188 = VFNMSUB132PSZ128mk |
| 31913 | { 10187, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76cf68004819ULL }, // Inst #10187 = VFNMSUB132PSZ128mbkz |
| 31914 | { 10186, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72cf68004819ULL }, // Inst #10186 = VFNMSUB132PSZ128mbk |
| 31915 | { 10185, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70cf68004819ULL }, // Inst #10185 = VFNMSUB132PSZ128mb |
| 31916 | { 10184, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf68004819ULL }, // Inst #10184 = VFNMSUB132PSZ128m |
| 31917 | { 10183, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cf28004829ULL }, // Inst #10183 = VFNMSUB132PSYr |
| 31918 | { 10182, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cf28004819ULL }, // Inst #10182 = VFNMSUB132PSYm |
| 31919 | { 10181, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf68014829ULL }, // Inst #10181 = VFNMSUB132PHZrkz |
| 31920 | { 10180, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacf68014829ULL }, // Inst #10180 = VFNMSUB132PHZrk |
| 31921 | { 10179, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ecf68014829ULL }, // Inst #10179 = VFNMSUB132PHZrbkz |
| 31922 | { 10178, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15acf68014829ULL }, // Inst #10178 = VFNMSUB132PHZrbk |
| 31923 | { 10177, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158cf68014829ULL }, // Inst #10177 = VFNMSUB132PHZrb |
| 31924 | { 10176, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf68014829ULL }, // Inst #10176 = VFNMSUB132PHZr |
| 31925 | { 10175, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf68014819ULL }, // Inst #10175 = VFNMSUB132PHZmkz |
| 31926 | { 10174, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacf68014819ULL }, // Inst #10174 = VFNMSUB132PHZmk |
| 31927 | { 10173, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ecf68014819ULL }, // Inst #10173 = VFNMSUB132PHZmbkz |
| 31928 | { 10172, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5acf68014819ULL }, // Inst #10172 = VFNMSUB132PHZmbk |
| 31929 | { 10171, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58cf68014819ULL }, // Inst #10171 = VFNMSUB132PHZmb |
| 31930 | { 10170, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf68014819ULL }, // Inst #10170 = VFNMSUB132PHZm |
| 31931 | { 10169, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf68014829ULL }, // Inst #10169 = VFNMSUB132PHZ256rkz |
| 31932 | { 10168, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cf68014829ULL }, // Inst #10168 = VFNMSUB132PHZ256rk |
| 31933 | { 10167, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf68014829ULL }, // Inst #10167 = VFNMSUB132PHZ256r |
| 31934 | { 10166, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf68014819ULL }, // Inst #10166 = VFNMSUB132PHZ256mkz |
| 31935 | { 10165, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cf68014819ULL }, // Inst #10165 = VFNMSUB132PHZ256mk |
| 31936 | { 10164, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57cf68014819ULL }, // Inst #10164 = VFNMSUB132PHZ256mbkz |
| 31937 | { 10163, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53cf68014819ULL }, // Inst #10163 = VFNMSUB132PHZ256mbk |
| 31938 | { 10162, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51cf68014819ULL }, // Inst #10162 = VFNMSUB132PHZ256mb |
| 31939 | { 10161, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf68014819ULL }, // Inst #10161 = VFNMSUB132PHZ256m |
| 31940 | { 10160, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf68014829ULL }, // Inst #10160 = VFNMSUB132PHZ128rkz |
| 31941 | { 10159, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cf68014829ULL }, // Inst #10159 = VFNMSUB132PHZ128rk |
| 31942 | { 10158, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf68014829ULL }, // Inst #10158 = VFNMSUB132PHZ128r |
| 31943 | { 10157, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf68014819ULL }, // Inst #10157 = VFNMSUB132PHZ128mkz |
| 31944 | { 10156, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cf68014819ULL }, // Inst #10156 = VFNMSUB132PHZ128mk |
| 31945 | { 10155, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56cf68014819ULL }, // Inst #10155 = VFNMSUB132PHZ128mbkz |
| 31946 | { 10154, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52cf68014819ULL }, // Inst #10154 = VFNMSUB132PHZ128mbk |
| 31947 | { 10153, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50cf68014819ULL }, // Inst #10153 = VFNMSUB132PHZ128mb |
| 31948 | { 10152, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf68014819ULL }, // Inst #10152 = VFNMSUB132PHZ128m |
| 31949 | { 10151, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcf30024829ULL }, // Inst #10151 = VFNMSUB132PDr |
| 31950 | { 10150, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcf30024819ULL }, // Inst #10150 = VFNMSUB132PDm |
| 31951 | { 10149, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf70024829ULL }, // Inst #10149 = VFNMSUB132PDZrkz |
| 31952 | { 10148, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacf70024829ULL }, // Inst #10148 = VFNMSUB132PDZrk |
| 31953 | { 10147, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ecf70024829ULL }, // Inst #10147 = VFNMSUB132PDZrbkz |
| 31954 | { 10146, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19acf70024829ULL }, // Inst #10146 = VFNMSUB132PDZrbk |
| 31955 | { 10145, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198cf70024829ULL }, // Inst #10145 = VFNMSUB132PDZrb |
| 31956 | { 10144, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf70024829ULL }, // Inst #10144 = VFNMSUB132PDZr |
| 31957 | { 10143, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecf70024819ULL }, // Inst #10143 = VFNMSUB132PDZmkz |
| 31958 | { 10142, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacf70024819ULL }, // Inst #10142 = VFNMSUB132PDZmk |
| 31959 | { 10141, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ecf70024819ULL }, // Inst #10141 = VFNMSUB132PDZmbkz |
| 31960 | { 10140, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9acf70024819ULL }, // Inst #10140 = VFNMSUB132PDZmbk |
| 31961 | { 10139, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98cf70024819ULL }, // Inst #10139 = VFNMSUB132PDZmb |
| 31962 | { 10138, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cf70024819ULL }, // Inst #10138 = VFNMSUB132PDZm |
| 31963 | { 10137, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf70024829ULL }, // Inst #10137 = VFNMSUB132PDZ256rkz |
| 31964 | { 10136, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cf70024829ULL }, // Inst #10136 = VFNMSUB132PDZ256rk |
| 31965 | { 10135, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf70024829ULL }, // Inst #10135 = VFNMSUB132PDZ256r |
| 31966 | { 10134, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cf70024819ULL }, // Inst #10134 = VFNMSUB132PDZ256mkz |
| 31967 | { 10133, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cf70024819ULL }, // Inst #10133 = VFNMSUB132PDZ256mk |
| 31968 | { 10132, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97cf70024819ULL }, // Inst #10132 = VFNMSUB132PDZ256mbkz |
| 31969 | { 10131, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93cf70024819ULL }, // Inst #10131 = VFNMSUB132PDZ256mbk |
| 31970 | { 10130, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91cf70024819ULL }, // Inst #10130 = VFNMSUB132PDZ256mb |
| 31971 | { 10129, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cf70024819ULL }, // Inst #10129 = VFNMSUB132PDZ256m |
| 31972 | { 10128, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf70024829ULL }, // Inst #10128 = VFNMSUB132PDZ128rkz |
| 31973 | { 10127, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cf70024829ULL }, // Inst #10127 = VFNMSUB132PDZ128rk |
| 31974 | { 10126, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf70024829ULL }, // Inst #10126 = VFNMSUB132PDZ128r |
| 31975 | { 10125, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cf70024819ULL }, // Inst #10125 = VFNMSUB132PDZ128mkz |
| 31976 | { 10124, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cf70024819ULL }, // Inst #10124 = VFNMSUB132PDZ128mk |
| 31977 | { 10123, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96cf70024819ULL }, // Inst #10123 = VFNMSUB132PDZ128mbkz |
| 31978 | { 10122, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92cf70024819ULL }, // Inst #10122 = VFNMSUB132PDZ128mbk |
| 31979 | { 10121, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90cf70024819ULL }, // Inst #10121 = VFNMSUB132PDZ128mb |
| 31980 | { 10120, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cf70024819ULL }, // Inst #10120 = VFNMSUB132PDZ128m |
| 31981 | { 10119, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cf30024829ULL }, // Inst #10119 = VFNMSUB132PDYr |
| 31982 | { 10118, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cf30024819ULL }, // Inst #10118 = VFNMSUB132PDYm |
| 31983 | { 10117, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3852, 0|(1ULL<<MCID::MayRaiseFPException), 0xbd280c6829ULL }, // Inst #10117 = VFNMADDSS4rr_REV |
| 31984 | { 10116, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbd280c6829ULL }, // Inst #10116 = VFNMADDSS4rr_Int_REV |
| 31985 | { 10115, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbd280e682bULL }, // Inst #10115 = VFNMADDSS4rr_Int |
| 31986 | { 10114, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3852, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbd280e682bULL }, // Inst #10114 = VFNMADDSS4rr |
| 31987 | { 10113, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbd280e681bULL }, // Inst #10113 = VFNMADDSS4rm_Int |
| 31988 | { 10112, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3844, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbd280e681bULL }, // Inst #10112 = VFNMADDSS4rm |
| 31989 | { 10111, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbd280c6819ULL }, // Inst #10111 = VFNMADDSS4mr_Int |
| 31990 | { 10110, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 3836, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbd280c6819ULL }, // Inst #10110 = VFNMADDSS4mr |
| 31991 | { 10109, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3832, 0|(1ULL<<MCID::MayRaiseFPException), 0xbdb00c6829ULL }, // Inst #10109 = VFNMADDSD4rr_REV |
| 31992 | { 10108, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbdb00c6829ULL }, // Inst #10108 = VFNMADDSD4rr_Int_REV |
| 31993 | { 10107, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbdb00e682bULL }, // Inst #10107 = VFNMADDSD4rr_Int |
| 31994 | { 10106, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3832, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbdb00e682bULL }, // Inst #10106 = VFNMADDSD4rr |
| 31995 | { 10105, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbdb00e681bULL }, // Inst #10105 = VFNMADDSD4rm_Int |
| 31996 | { 10104, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3824, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbdb00e681bULL }, // Inst #10104 = VFNMADDSD4rm |
| 31997 | { 10103, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbdb00c6819ULL }, // Inst #10103 = VFNMADDSD4mr_Int |
| 31998 | { 10102, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 3816, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbdb00c6819ULL }, // Inst #10102 = VFNMADDSD4mr |
| 31999 | { 10101, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbc280c6829ULL }, // Inst #10101 = VFNMADDPS4rr_REV |
| 32000 | { 10100, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbc280e682bULL }, // Inst #10100 = VFNMADDPS4rr |
| 32001 | { 10099, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbc280e681bULL }, // Inst #10099 = VFNMADDPS4rm |
| 32002 | { 10098, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbc280c6819ULL }, // Inst #10098 = VFNMADDPS4mr |
| 32003 | { 10097, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1bc280c6829ULL }, // Inst #10097 = VFNMADDPS4Yrr_REV |
| 32004 | { 10096, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1bc280e682bULL }, // Inst #10096 = VFNMADDPS4Yrr |
| 32005 | { 10095, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1bc280e681bULL }, // Inst #10095 = VFNMADDPS4Yrm |
| 32006 | { 10094, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1bc280c6819ULL }, // Inst #10094 = VFNMADDPS4Ymr |
| 32007 | { 10093, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xbcb00c6829ULL }, // Inst #10093 = VFNMADDPD4rr_REV |
| 32008 | { 10092, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xbcb00e682bULL }, // Inst #10092 = VFNMADDPD4rr |
| 32009 | { 10091, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbcb00e681bULL }, // Inst #10091 = VFNMADDPD4rm |
| 32010 | { 10090, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xbcb00c6819ULL }, // Inst #10090 = VFNMADDPD4mr |
| 32011 | { 10089, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1bcb00c6829ULL }, // Inst #10089 = VFNMADDPD4Yrr_REV |
| 32012 | { 10088, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1bcb00e682bULL }, // Inst #10088 = VFNMADDPD4Yrr |
| 32013 | { 10087, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1bcb00e681bULL }, // Inst #10087 = VFNMADDPD4Yrm |
| 32014 | { 10086, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1bcb00c6819ULL }, // Inst #10086 = VFNMADDPD4Ymr |
| 32015 | { 10085, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdea8004829ULL }, // Inst #10085 = VFNMADD231SSr_Int |
| 32016 | { 10084, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdea8004829ULL }, // Inst #10084 = VFNMADD231SSr |
| 32017 | { 10083, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdea8004819ULL }, // Inst #10083 = VFNMADD231SSm_Int |
| 32018 | { 10082, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdea8004819ULL }, // Inst #10082 = VFNMADD231SSm |
| 32019 | { 10081, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176dee8004829ULL }, // Inst #10081 = VFNMADD231SSZrb_Intkz |
| 32020 | { 10080, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172dee8004829ULL }, // Inst #10080 = VFNMADD231SSZrb_Intk |
| 32021 | { 10079, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170dee8004829ULL }, // Inst #10079 = VFNMADD231SSZrb_Int |
| 32022 | { 10078, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170dee8004829ULL }, // Inst #10078 = VFNMADD231SSZrb |
| 32023 | { 10077, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dee8004829ULL }, // Inst #10077 = VFNMADD231SSZr_Intkz |
| 32024 | { 10076, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dee8004829ULL }, // Inst #10076 = VFNMADD231SSZr_Intk |
| 32025 | { 10075, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dee8004829ULL }, // Inst #10075 = VFNMADD231SSZr_Int |
| 32026 | { 10074, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dee8004829ULL }, // Inst #10074 = VFNMADD231SSZr |
| 32027 | { 10073, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dee8004819ULL }, // Inst #10073 = VFNMADD231SSZm_Intkz |
| 32028 | { 10072, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dee8004819ULL }, // Inst #10072 = VFNMADD231SSZm_Intk |
| 32029 | { 10071, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dee8004819ULL }, // Inst #10071 = VFNMADD231SSZm_Int |
| 32030 | { 10070, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dee8004819ULL }, // Inst #10070 = VFNMADD231SSZm |
| 32031 | { 10069, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156dee8014829ULL }, // Inst #10069 = VFNMADD231SHZrb_Intkz |
| 32032 | { 10068, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152dee8014829ULL }, // Inst #10068 = VFNMADD231SHZrb_Intk |
| 32033 | { 10067, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150dee8014829ULL }, // Inst #10067 = VFNMADD231SHZrb_Int |
| 32034 | { 10066, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150dee8014829ULL }, // Inst #10066 = VFNMADD231SHZrb |
| 32035 | { 10065, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dee8014829ULL }, // Inst #10065 = VFNMADD231SHZr_Intkz |
| 32036 | { 10064, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dee8014829ULL }, // Inst #10064 = VFNMADD231SHZr_Intk |
| 32037 | { 10063, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dee8014829ULL }, // Inst #10063 = VFNMADD231SHZr_Int |
| 32038 | { 10062, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dee8014829ULL }, // Inst #10062 = VFNMADD231SHZr |
| 32039 | { 10061, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dee8014819ULL }, // Inst #10061 = VFNMADD231SHZm_Intkz |
| 32040 | { 10060, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dee8014819ULL }, // Inst #10060 = VFNMADD231SHZm_Intk |
| 32041 | { 10059, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dee8014819ULL }, // Inst #10059 = VFNMADD231SHZm_Int |
| 32042 | { 10058, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dee8014819ULL }, // Inst #10058 = VFNMADD231SHZm |
| 32043 | { 10057, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdeb0024829ULL }, // Inst #10057 = VFNMADD231SDr_Int |
| 32044 | { 10056, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdeb0024829ULL }, // Inst #10056 = VFNMADD231SDr |
| 32045 | { 10055, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdeb0024819ULL }, // Inst #10055 = VFNMADD231SDm_Int |
| 32046 | { 10054, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdeb0024819ULL }, // Inst #10054 = VFNMADD231SDm |
| 32047 | { 10053, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196def0024829ULL }, // Inst #10053 = VFNMADD231SDZrb_Intkz |
| 32048 | { 10052, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192def0024829ULL }, // Inst #10052 = VFNMADD231SDZrb_Intk |
| 32049 | { 10051, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190def0024829ULL }, // Inst #10051 = VFNMADD231SDZrb_Int |
| 32050 | { 10050, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190def0024829ULL }, // Inst #10050 = VFNMADD231SDZrb |
| 32051 | { 10049, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86def0024829ULL }, // Inst #10049 = VFNMADD231SDZr_Intkz |
| 32052 | { 10048, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82def0024829ULL }, // Inst #10048 = VFNMADD231SDZr_Intk |
| 32053 | { 10047, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80def0024829ULL }, // Inst #10047 = VFNMADD231SDZr_Int |
| 32054 | { 10046, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80def0024829ULL }, // Inst #10046 = VFNMADD231SDZr |
| 32055 | { 10045, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86def0024819ULL }, // Inst #10045 = VFNMADD231SDZm_Intkz |
| 32056 | { 10044, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82def0024819ULL }, // Inst #10044 = VFNMADD231SDZm_Intk |
| 32057 | { 10043, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80def0024819ULL }, // Inst #10043 = VFNMADD231SDZm_Int |
| 32058 | { 10042, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80def0024819ULL }, // Inst #10042 = VFNMADD231SDZm |
| 32059 | { 10041, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xde28004829ULL }, // Inst #10041 = VFNMADD231PSr |
| 32060 | { 10040, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xde28004819ULL }, // Inst #10040 = VFNMADD231PSm |
| 32061 | { 10039, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede68004829ULL }, // Inst #10039 = VFNMADD231PSZrkz |
| 32062 | { 10038, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeade68004829ULL }, // Inst #10038 = VFNMADD231PSZrk |
| 32063 | { 10037, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ede68004829ULL }, // Inst #10037 = VFNMADD231PSZrbkz |
| 32064 | { 10036, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ade68004829ULL }, // Inst #10036 = VFNMADD231PSZrbk |
| 32065 | { 10035, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178de68004829ULL }, // Inst #10035 = VFNMADD231PSZrb |
| 32066 | { 10034, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de68004829ULL }, // Inst #10034 = VFNMADD231PSZr |
| 32067 | { 10033, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede68004819ULL }, // Inst #10033 = VFNMADD231PSZmkz |
| 32068 | { 10032, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeade68004819ULL }, // Inst #10032 = VFNMADD231PSZmk |
| 32069 | { 10031, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ede68004819ULL }, // Inst #10031 = VFNMADD231PSZmbkz |
| 32070 | { 10030, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ade68004819ULL }, // Inst #10030 = VFNMADD231PSZmbk |
| 32071 | { 10029, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78de68004819ULL }, // Inst #10029 = VFNMADD231PSZmb |
| 32072 | { 10028, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de68004819ULL }, // Inst #10028 = VFNMADD231PSZm |
| 32073 | { 10027, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de68004829ULL }, // Inst #10027 = VFNMADD231PSZ256rkz |
| 32074 | { 10026, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3de68004829ULL }, // Inst #10026 = VFNMADD231PSZ256rk |
| 32075 | { 10025, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de68004829ULL }, // Inst #10025 = VFNMADD231PSZ256r |
| 32076 | { 10024, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de68004819ULL }, // Inst #10024 = VFNMADD231PSZ256mkz |
| 32077 | { 10023, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3de68004819ULL }, // Inst #10023 = VFNMADD231PSZ256mk |
| 32078 | { 10022, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77de68004819ULL }, // Inst #10022 = VFNMADD231PSZ256mbkz |
| 32079 | { 10021, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73de68004819ULL }, // Inst #10021 = VFNMADD231PSZ256mbk |
| 32080 | { 10020, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71de68004819ULL }, // Inst #10020 = VFNMADD231PSZ256mb |
| 32081 | { 10019, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de68004819ULL }, // Inst #10019 = VFNMADD231PSZ256m |
| 32082 | { 10018, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de68004829ULL }, // Inst #10018 = VFNMADD231PSZ128rkz |
| 32083 | { 10017, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2de68004829ULL }, // Inst #10017 = VFNMADD231PSZ128rk |
| 32084 | { 10016, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de68004829ULL }, // Inst #10016 = VFNMADD231PSZ128r |
| 32085 | { 10015, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de68004819ULL }, // Inst #10015 = VFNMADD231PSZ128mkz |
| 32086 | { 10014, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2de68004819ULL }, // Inst #10014 = VFNMADD231PSZ128mk |
| 32087 | { 10013, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76de68004819ULL }, // Inst #10013 = VFNMADD231PSZ128mbkz |
| 32088 | { 10012, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72de68004819ULL }, // Inst #10012 = VFNMADD231PSZ128mbk |
| 32089 | { 10011, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70de68004819ULL }, // Inst #10011 = VFNMADD231PSZ128mb |
| 32090 | { 10010, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de68004819ULL }, // Inst #10010 = VFNMADD231PSZ128m |
| 32091 | { 10009, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1de28004829ULL }, // Inst #10009 = VFNMADD231PSYr |
| 32092 | { 10008, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1de28004819ULL }, // Inst #10008 = VFNMADD231PSYm |
| 32093 | { 10007, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede68014829ULL }, // Inst #10007 = VFNMADD231PHZrkz |
| 32094 | { 10006, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeade68014829ULL }, // Inst #10006 = VFNMADD231PHZrk |
| 32095 | { 10005, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ede68014829ULL }, // Inst #10005 = VFNMADD231PHZrbkz |
| 32096 | { 10004, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ade68014829ULL }, // Inst #10004 = VFNMADD231PHZrbk |
| 32097 | { 10003, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158de68014829ULL }, // Inst #10003 = VFNMADD231PHZrb |
| 32098 | { 10002, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de68014829ULL }, // Inst #10002 = VFNMADD231PHZr |
| 32099 | { 10001, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede68014819ULL }, // Inst #10001 = VFNMADD231PHZmkz |
| 32100 | { 10000, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeade68014819ULL }, // Inst #10000 = VFNMADD231PHZmk |
| 32101 | { 9999, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ede68014819ULL }, // Inst #9999 = VFNMADD231PHZmbkz |
| 32102 | { 9998, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ade68014819ULL }, // Inst #9998 = VFNMADD231PHZmbk |
| 32103 | { 9997, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58de68014819ULL }, // Inst #9997 = VFNMADD231PHZmb |
| 32104 | { 9996, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de68014819ULL }, // Inst #9996 = VFNMADD231PHZm |
| 32105 | { 9995, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de68014829ULL }, // Inst #9995 = VFNMADD231PHZ256rkz |
| 32106 | { 9994, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3de68014829ULL }, // Inst #9994 = VFNMADD231PHZ256rk |
| 32107 | { 9993, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de68014829ULL }, // Inst #9993 = VFNMADD231PHZ256r |
| 32108 | { 9992, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de68014819ULL }, // Inst #9992 = VFNMADD231PHZ256mkz |
| 32109 | { 9991, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3de68014819ULL }, // Inst #9991 = VFNMADD231PHZ256mk |
| 32110 | { 9990, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57de68014819ULL }, // Inst #9990 = VFNMADD231PHZ256mbkz |
| 32111 | { 9989, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53de68014819ULL }, // Inst #9989 = VFNMADD231PHZ256mbk |
| 32112 | { 9988, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51de68014819ULL }, // Inst #9988 = VFNMADD231PHZ256mb |
| 32113 | { 9987, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de68014819ULL }, // Inst #9987 = VFNMADD231PHZ256m |
| 32114 | { 9986, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de68014829ULL }, // Inst #9986 = VFNMADD231PHZ128rkz |
| 32115 | { 9985, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2de68014829ULL }, // Inst #9985 = VFNMADD231PHZ128rk |
| 32116 | { 9984, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de68014829ULL }, // Inst #9984 = VFNMADD231PHZ128r |
| 32117 | { 9983, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de68014819ULL }, // Inst #9983 = VFNMADD231PHZ128mkz |
| 32118 | { 9982, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2de68014819ULL }, // Inst #9982 = VFNMADD231PHZ128mk |
| 32119 | { 9981, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56de68014819ULL }, // Inst #9981 = VFNMADD231PHZ128mbkz |
| 32120 | { 9980, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52de68014819ULL }, // Inst #9980 = VFNMADD231PHZ128mbk |
| 32121 | { 9979, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50de68014819ULL }, // Inst #9979 = VFNMADD231PHZ128mb |
| 32122 | { 9978, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de68014819ULL }, // Inst #9978 = VFNMADD231PHZ128m |
| 32123 | { 9977, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xde30024829ULL }, // Inst #9977 = VFNMADD231PDr |
| 32124 | { 9976, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xde30024819ULL }, // Inst #9976 = VFNMADD231PDm |
| 32125 | { 9975, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede70024829ULL }, // Inst #9975 = VFNMADD231PDZrkz |
| 32126 | { 9974, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeade70024829ULL }, // Inst #9974 = VFNMADD231PDZrk |
| 32127 | { 9973, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ede70024829ULL }, // Inst #9973 = VFNMADD231PDZrbkz |
| 32128 | { 9972, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ade70024829ULL }, // Inst #9972 = VFNMADD231PDZrbk |
| 32129 | { 9971, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198de70024829ULL }, // Inst #9971 = VFNMADD231PDZrb |
| 32130 | { 9970, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de70024829ULL }, // Inst #9970 = VFNMADD231PDZr |
| 32131 | { 9969, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeede70024819ULL }, // Inst #9969 = VFNMADD231PDZmkz |
| 32132 | { 9968, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeade70024819ULL }, // Inst #9968 = VFNMADD231PDZmk |
| 32133 | { 9967, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ede70024819ULL }, // Inst #9967 = VFNMADD231PDZmbkz |
| 32134 | { 9966, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ade70024819ULL }, // Inst #9966 = VFNMADD231PDZmbk |
| 32135 | { 9965, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98de70024819ULL }, // Inst #9965 = VFNMADD231PDZmb |
| 32136 | { 9964, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8de70024819ULL }, // Inst #9964 = VFNMADD231PDZm |
| 32137 | { 9963, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de70024829ULL }, // Inst #9963 = VFNMADD231PDZ256rkz |
| 32138 | { 9962, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3de70024829ULL }, // Inst #9962 = VFNMADD231PDZ256rk |
| 32139 | { 9961, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de70024829ULL }, // Inst #9961 = VFNMADD231PDZ256r |
| 32140 | { 9960, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7de70024819ULL }, // Inst #9960 = VFNMADD231PDZ256mkz |
| 32141 | { 9959, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3de70024819ULL }, // Inst #9959 = VFNMADD231PDZ256mk |
| 32142 | { 9958, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97de70024819ULL }, // Inst #9958 = VFNMADD231PDZ256mbkz |
| 32143 | { 9957, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93de70024819ULL }, // Inst #9957 = VFNMADD231PDZ256mbk |
| 32144 | { 9956, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91de70024819ULL }, // Inst #9956 = VFNMADD231PDZ256mb |
| 32145 | { 9955, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1de70024819ULL }, // Inst #9955 = VFNMADD231PDZ256m |
| 32146 | { 9954, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de70024829ULL }, // Inst #9954 = VFNMADD231PDZ128rkz |
| 32147 | { 9953, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2de70024829ULL }, // Inst #9953 = VFNMADD231PDZ128rk |
| 32148 | { 9952, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de70024829ULL }, // Inst #9952 = VFNMADD231PDZ128r |
| 32149 | { 9951, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6de70024819ULL }, // Inst #9951 = VFNMADD231PDZ128mkz |
| 32150 | { 9950, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2de70024819ULL }, // Inst #9950 = VFNMADD231PDZ128mk |
| 32151 | { 9949, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96de70024819ULL }, // Inst #9949 = VFNMADD231PDZ128mbkz |
| 32152 | { 9948, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92de70024819ULL }, // Inst #9948 = VFNMADD231PDZ128mbk |
| 32153 | { 9947, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90de70024819ULL }, // Inst #9947 = VFNMADD231PDZ128mb |
| 32154 | { 9946, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0de70024819ULL }, // Inst #9946 = VFNMADD231PDZ128m |
| 32155 | { 9945, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1de30024829ULL }, // Inst #9945 = VFNMADD231PDYr |
| 32156 | { 9944, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1de30024819ULL }, // Inst #9944 = VFNMADD231PDYm |
| 32157 | { 9943, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6a8004829ULL }, // Inst #9943 = VFNMADD213SSr_Int |
| 32158 | { 9942, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6a8004829ULL }, // Inst #9942 = VFNMADD213SSr |
| 32159 | { 9941, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6a8004819ULL }, // Inst #9941 = VFNMADD213SSm_Int |
| 32160 | { 9940, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6a8004819ULL }, // Inst #9940 = VFNMADD213SSm |
| 32161 | { 9939, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176d6e8004829ULL }, // Inst #9939 = VFNMADD213SSZrb_Intkz |
| 32162 | { 9938, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172d6e8004829ULL }, // Inst #9938 = VFNMADD213SSZrb_Intk |
| 32163 | { 9937, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170d6e8004829ULL }, // Inst #9937 = VFNMADD213SSZrb_Int |
| 32164 | { 9936, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170d6e8004829ULL }, // Inst #9936 = VFNMADD213SSZrb |
| 32165 | { 9935, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d6e8004829ULL }, // Inst #9935 = VFNMADD213SSZr_Intkz |
| 32166 | { 9934, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d6e8004829ULL }, // Inst #9934 = VFNMADD213SSZr_Intk |
| 32167 | { 9933, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d6e8004829ULL }, // Inst #9933 = VFNMADD213SSZr_Int |
| 32168 | { 9932, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d6e8004829ULL }, // Inst #9932 = VFNMADD213SSZr |
| 32169 | { 9931, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d6e8004819ULL }, // Inst #9931 = VFNMADD213SSZm_Intkz |
| 32170 | { 9930, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d6e8004819ULL }, // Inst #9930 = VFNMADD213SSZm_Intk |
| 32171 | { 9929, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d6e8004819ULL }, // Inst #9929 = VFNMADD213SSZm_Int |
| 32172 | { 9928, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d6e8004819ULL }, // Inst #9928 = VFNMADD213SSZm |
| 32173 | { 9927, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156d6e8014829ULL }, // Inst #9927 = VFNMADD213SHZrb_Intkz |
| 32174 | { 9926, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152d6e8014829ULL }, // Inst #9926 = VFNMADD213SHZrb_Intk |
| 32175 | { 9925, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150d6e8014829ULL }, // Inst #9925 = VFNMADD213SHZrb_Int |
| 32176 | { 9924, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150d6e8014829ULL }, // Inst #9924 = VFNMADD213SHZrb |
| 32177 | { 9923, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d6e8014829ULL }, // Inst #9923 = VFNMADD213SHZr_Intkz |
| 32178 | { 9922, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d6e8014829ULL }, // Inst #9922 = VFNMADD213SHZr_Intk |
| 32179 | { 9921, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d6e8014829ULL }, // Inst #9921 = VFNMADD213SHZr_Int |
| 32180 | { 9920, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d6e8014829ULL }, // Inst #9920 = VFNMADD213SHZr |
| 32181 | { 9919, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d6e8014819ULL }, // Inst #9919 = VFNMADD213SHZm_Intkz |
| 32182 | { 9918, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d6e8014819ULL }, // Inst #9918 = VFNMADD213SHZm_Intk |
| 32183 | { 9917, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d6e8014819ULL }, // Inst #9917 = VFNMADD213SHZm_Int |
| 32184 | { 9916, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d6e8014819ULL }, // Inst #9916 = VFNMADD213SHZm |
| 32185 | { 9915, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6b0024829ULL }, // Inst #9915 = VFNMADD213SDr_Int |
| 32186 | { 9914, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6b0024829ULL }, // Inst #9914 = VFNMADD213SDr |
| 32187 | { 9913, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6b0024819ULL }, // Inst #9913 = VFNMADD213SDm_Int |
| 32188 | { 9912, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd6b0024819ULL }, // Inst #9912 = VFNMADD213SDm |
| 32189 | { 9911, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196d6f0024829ULL }, // Inst #9911 = VFNMADD213SDZrb_Intkz |
| 32190 | { 9910, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192d6f0024829ULL }, // Inst #9910 = VFNMADD213SDZrb_Intk |
| 32191 | { 9909, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190d6f0024829ULL }, // Inst #9909 = VFNMADD213SDZrb_Int |
| 32192 | { 9908, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190d6f0024829ULL }, // Inst #9908 = VFNMADD213SDZrb |
| 32193 | { 9907, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d6f0024829ULL }, // Inst #9907 = VFNMADD213SDZr_Intkz |
| 32194 | { 9906, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d6f0024829ULL }, // Inst #9906 = VFNMADD213SDZr_Intk |
| 32195 | { 9905, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d6f0024829ULL }, // Inst #9905 = VFNMADD213SDZr_Int |
| 32196 | { 9904, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d6f0024829ULL }, // Inst #9904 = VFNMADD213SDZr |
| 32197 | { 9903, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d6f0024819ULL }, // Inst #9903 = VFNMADD213SDZm_Intkz |
| 32198 | { 9902, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d6f0024819ULL }, // Inst #9902 = VFNMADD213SDZm_Intk |
| 32199 | { 9901, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d6f0024819ULL }, // Inst #9901 = VFNMADD213SDZm_Int |
| 32200 | { 9900, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d6f0024819ULL }, // Inst #9900 = VFNMADD213SDZm |
| 32201 | { 9899, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd628004829ULL }, // Inst #9899 = VFNMADD213PSr |
| 32202 | { 9898, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd628004819ULL }, // Inst #9898 = VFNMADD213PSm |
| 32203 | { 9897, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed668004829ULL }, // Inst #9897 = VFNMADD213PSZrkz |
| 32204 | { 9896, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead668004829ULL }, // Inst #9896 = VFNMADD213PSZrk |
| 32205 | { 9895, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ed668004829ULL }, // Inst #9895 = VFNMADD213PSZrbkz |
| 32206 | { 9894, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ad668004829ULL }, // Inst #9894 = VFNMADD213PSZrbk |
| 32207 | { 9893, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178d668004829ULL }, // Inst #9893 = VFNMADD213PSZrb |
| 32208 | { 9892, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d668004829ULL }, // Inst #9892 = VFNMADD213PSZr |
| 32209 | { 9891, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed668004819ULL }, // Inst #9891 = VFNMADD213PSZmkz |
| 32210 | { 9890, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead668004819ULL }, // Inst #9890 = VFNMADD213PSZmk |
| 32211 | { 9889, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed668004819ULL }, // Inst #9889 = VFNMADD213PSZmbkz |
| 32212 | { 9888, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad668004819ULL }, // Inst #9888 = VFNMADD213PSZmbk |
| 32213 | { 9887, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d668004819ULL }, // Inst #9887 = VFNMADD213PSZmb |
| 32214 | { 9886, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d668004819ULL }, // Inst #9886 = VFNMADD213PSZm |
| 32215 | { 9885, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d668004829ULL }, // Inst #9885 = VFNMADD213PSZ256rkz |
| 32216 | { 9884, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d668004829ULL }, // Inst #9884 = VFNMADD213PSZ256rk |
| 32217 | { 9883, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d668004829ULL }, // Inst #9883 = VFNMADD213PSZ256r |
| 32218 | { 9882, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d668004819ULL }, // Inst #9882 = VFNMADD213PSZ256mkz |
| 32219 | { 9881, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d668004819ULL }, // Inst #9881 = VFNMADD213PSZ256mk |
| 32220 | { 9880, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d668004819ULL }, // Inst #9880 = VFNMADD213PSZ256mbkz |
| 32221 | { 9879, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d668004819ULL }, // Inst #9879 = VFNMADD213PSZ256mbk |
| 32222 | { 9878, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d668004819ULL }, // Inst #9878 = VFNMADD213PSZ256mb |
| 32223 | { 9877, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d668004819ULL }, // Inst #9877 = VFNMADD213PSZ256m |
| 32224 | { 9876, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d668004829ULL }, // Inst #9876 = VFNMADD213PSZ128rkz |
| 32225 | { 9875, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d668004829ULL }, // Inst #9875 = VFNMADD213PSZ128rk |
| 32226 | { 9874, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d668004829ULL }, // Inst #9874 = VFNMADD213PSZ128r |
| 32227 | { 9873, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d668004819ULL }, // Inst #9873 = VFNMADD213PSZ128mkz |
| 32228 | { 9872, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d668004819ULL }, // Inst #9872 = VFNMADD213PSZ128mk |
| 32229 | { 9871, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d668004819ULL }, // Inst #9871 = VFNMADD213PSZ128mbkz |
| 32230 | { 9870, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d668004819ULL }, // Inst #9870 = VFNMADD213PSZ128mbk |
| 32231 | { 9869, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d668004819ULL }, // Inst #9869 = VFNMADD213PSZ128mb |
| 32232 | { 9868, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d668004819ULL }, // Inst #9868 = VFNMADD213PSZ128m |
| 32233 | { 9867, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d628004829ULL }, // Inst #9867 = VFNMADD213PSYr |
| 32234 | { 9866, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d628004819ULL }, // Inst #9866 = VFNMADD213PSYm |
| 32235 | { 9865, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed668014829ULL }, // Inst #9865 = VFNMADD213PHZrkz |
| 32236 | { 9864, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead668014829ULL }, // Inst #9864 = VFNMADD213PHZrk |
| 32237 | { 9863, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ed668014829ULL }, // Inst #9863 = VFNMADD213PHZrbkz |
| 32238 | { 9862, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ad668014829ULL }, // Inst #9862 = VFNMADD213PHZrbk |
| 32239 | { 9861, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158d668014829ULL }, // Inst #9861 = VFNMADD213PHZrb |
| 32240 | { 9860, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d668014829ULL }, // Inst #9860 = VFNMADD213PHZr |
| 32241 | { 9859, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed668014819ULL }, // Inst #9859 = VFNMADD213PHZmkz |
| 32242 | { 9858, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead668014819ULL }, // Inst #9858 = VFNMADD213PHZmk |
| 32243 | { 9857, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed668014819ULL }, // Inst #9857 = VFNMADD213PHZmbkz |
| 32244 | { 9856, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad668014819ULL }, // Inst #9856 = VFNMADD213PHZmbk |
| 32245 | { 9855, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d668014819ULL }, // Inst #9855 = VFNMADD213PHZmb |
| 32246 | { 9854, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d668014819ULL }, // Inst #9854 = VFNMADD213PHZm |
| 32247 | { 9853, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d668014829ULL }, // Inst #9853 = VFNMADD213PHZ256rkz |
| 32248 | { 9852, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d668014829ULL }, // Inst #9852 = VFNMADD213PHZ256rk |
| 32249 | { 9851, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d668014829ULL }, // Inst #9851 = VFNMADD213PHZ256r |
| 32250 | { 9850, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d668014819ULL }, // Inst #9850 = VFNMADD213PHZ256mkz |
| 32251 | { 9849, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d668014819ULL }, // Inst #9849 = VFNMADD213PHZ256mk |
| 32252 | { 9848, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d668014819ULL }, // Inst #9848 = VFNMADD213PHZ256mbkz |
| 32253 | { 9847, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d668014819ULL }, // Inst #9847 = VFNMADD213PHZ256mbk |
| 32254 | { 9846, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d668014819ULL }, // Inst #9846 = VFNMADD213PHZ256mb |
| 32255 | { 9845, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d668014819ULL }, // Inst #9845 = VFNMADD213PHZ256m |
| 32256 | { 9844, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d668014829ULL }, // Inst #9844 = VFNMADD213PHZ128rkz |
| 32257 | { 9843, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d668014829ULL }, // Inst #9843 = VFNMADD213PHZ128rk |
| 32258 | { 9842, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d668014829ULL }, // Inst #9842 = VFNMADD213PHZ128r |
| 32259 | { 9841, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d668014819ULL }, // Inst #9841 = VFNMADD213PHZ128mkz |
| 32260 | { 9840, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d668014819ULL }, // Inst #9840 = VFNMADD213PHZ128mk |
| 32261 | { 9839, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d668014819ULL }, // Inst #9839 = VFNMADD213PHZ128mbkz |
| 32262 | { 9838, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d668014819ULL }, // Inst #9838 = VFNMADD213PHZ128mbk |
| 32263 | { 9837, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d668014819ULL }, // Inst #9837 = VFNMADD213PHZ128mb |
| 32264 | { 9836, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d668014819ULL }, // Inst #9836 = VFNMADD213PHZ128m |
| 32265 | { 9835, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd630024829ULL }, // Inst #9835 = VFNMADD213PDr |
| 32266 | { 9834, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd630024819ULL }, // Inst #9834 = VFNMADD213PDm |
| 32267 | { 9833, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed670024829ULL }, // Inst #9833 = VFNMADD213PDZrkz |
| 32268 | { 9832, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead670024829ULL }, // Inst #9832 = VFNMADD213PDZrk |
| 32269 | { 9831, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ed670024829ULL }, // Inst #9831 = VFNMADD213PDZrbkz |
| 32270 | { 9830, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ad670024829ULL }, // Inst #9830 = VFNMADD213PDZrbk |
| 32271 | { 9829, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198d670024829ULL }, // Inst #9829 = VFNMADD213PDZrb |
| 32272 | { 9828, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d670024829ULL }, // Inst #9828 = VFNMADD213PDZr |
| 32273 | { 9827, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed670024819ULL }, // Inst #9827 = VFNMADD213PDZmkz |
| 32274 | { 9826, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead670024819ULL }, // Inst #9826 = VFNMADD213PDZmk |
| 32275 | { 9825, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed670024819ULL }, // Inst #9825 = VFNMADD213PDZmbkz |
| 32276 | { 9824, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad670024819ULL }, // Inst #9824 = VFNMADD213PDZmbk |
| 32277 | { 9823, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d670024819ULL }, // Inst #9823 = VFNMADD213PDZmb |
| 32278 | { 9822, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d670024819ULL }, // Inst #9822 = VFNMADD213PDZm |
| 32279 | { 9821, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d670024829ULL }, // Inst #9821 = VFNMADD213PDZ256rkz |
| 32280 | { 9820, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d670024829ULL }, // Inst #9820 = VFNMADD213PDZ256rk |
| 32281 | { 9819, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d670024829ULL }, // Inst #9819 = VFNMADD213PDZ256r |
| 32282 | { 9818, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d670024819ULL }, // Inst #9818 = VFNMADD213PDZ256mkz |
| 32283 | { 9817, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d670024819ULL }, // Inst #9817 = VFNMADD213PDZ256mk |
| 32284 | { 9816, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d670024819ULL }, // Inst #9816 = VFNMADD213PDZ256mbkz |
| 32285 | { 9815, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d670024819ULL }, // Inst #9815 = VFNMADD213PDZ256mbk |
| 32286 | { 9814, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d670024819ULL }, // Inst #9814 = VFNMADD213PDZ256mb |
| 32287 | { 9813, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d670024819ULL }, // Inst #9813 = VFNMADD213PDZ256m |
| 32288 | { 9812, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d670024829ULL }, // Inst #9812 = VFNMADD213PDZ128rkz |
| 32289 | { 9811, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d670024829ULL }, // Inst #9811 = VFNMADD213PDZ128rk |
| 32290 | { 9810, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d670024829ULL }, // Inst #9810 = VFNMADD213PDZ128r |
| 32291 | { 9809, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d670024819ULL }, // Inst #9809 = VFNMADD213PDZ128mkz |
| 32292 | { 9808, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d670024819ULL }, // Inst #9808 = VFNMADD213PDZ128mk |
| 32293 | { 9807, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d670024819ULL }, // Inst #9807 = VFNMADD213PDZ128mbkz |
| 32294 | { 9806, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d670024819ULL }, // Inst #9806 = VFNMADD213PDZ128mbk |
| 32295 | { 9805, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d670024819ULL }, // Inst #9805 = VFNMADD213PDZ128mb |
| 32296 | { 9804, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d670024819ULL }, // Inst #9804 = VFNMADD213PDZ128m |
| 32297 | { 9803, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d630024829ULL }, // Inst #9803 = VFNMADD213PDYr |
| 32298 | { 9802, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d630024819ULL }, // Inst #9802 = VFNMADD213PDYm |
| 32299 | { 9801, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcea8004829ULL }, // Inst #9801 = VFNMADD132SSr_Int |
| 32300 | { 9800, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcea8004829ULL }, // Inst #9800 = VFNMADD132SSr |
| 32301 | { 9799, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcea8004819ULL }, // Inst #9799 = VFNMADD132SSm_Int |
| 32302 | { 9798, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcea8004819ULL }, // Inst #9798 = VFNMADD132SSm |
| 32303 | { 9797, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176cee8004829ULL }, // Inst #9797 = VFNMADD132SSZrb_Intkz |
| 32304 | { 9796, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172cee8004829ULL }, // Inst #9796 = VFNMADD132SSZrb_Intk |
| 32305 | { 9795, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170cee8004829ULL }, // Inst #9795 = VFNMADD132SSZrb_Int |
| 32306 | { 9794, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170cee8004829ULL }, // Inst #9794 = VFNMADD132SSZrb |
| 32307 | { 9793, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cee8004829ULL }, // Inst #9793 = VFNMADD132SSZr_Intkz |
| 32308 | { 9792, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cee8004829ULL }, // Inst #9792 = VFNMADD132SSZr_Intk |
| 32309 | { 9791, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cee8004829ULL }, // Inst #9791 = VFNMADD132SSZr_Int |
| 32310 | { 9790, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cee8004829ULL }, // Inst #9790 = VFNMADD132SSZr |
| 32311 | { 9789, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cee8004819ULL }, // Inst #9789 = VFNMADD132SSZm_Intkz |
| 32312 | { 9788, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cee8004819ULL }, // Inst #9788 = VFNMADD132SSZm_Intk |
| 32313 | { 9787, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cee8004819ULL }, // Inst #9787 = VFNMADD132SSZm_Int |
| 32314 | { 9786, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cee8004819ULL }, // Inst #9786 = VFNMADD132SSZm |
| 32315 | { 9785, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156cee8014829ULL }, // Inst #9785 = VFNMADD132SHZrb_Intkz |
| 32316 | { 9784, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152cee8014829ULL }, // Inst #9784 = VFNMADD132SHZrb_Intk |
| 32317 | { 9783, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150cee8014829ULL }, // Inst #9783 = VFNMADD132SHZrb_Int |
| 32318 | { 9782, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150cee8014829ULL }, // Inst #9782 = VFNMADD132SHZrb |
| 32319 | { 9781, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cee8014829ULL }, // Inst #9781 = VFNMADD132SHZr_Intkz |
| 32320 | { 9780, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cee8014829ULL }, // Inst #9780 = VFNMADD132SHZr_Intk |
| 32321 | { 9779, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cee8014829ULL }, // Inst #9779 = VFNMADD132SHZr_Int |
| 32322 | { 9778, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cee8014829ULL }, // Inst #9778 = VFNMADD132SHZr |
| 32323 | { 9777, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cee8014819ULL }, // Inst #9777 = VFNMADD132SHZm_Intkz |
| 32324 | { 9776, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cee8014819ULL }, // Inst #9776 = VFNMADD132SHZm_Intk |
| 32325 | { 9775, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cee8014819ULL }, // Inst #9775 = VFNMADD132SHZm_Int |
| 32326 | { 9774, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cee8014819ULL }, // Inst #9774 = VFNMADD132SHZm |
| 32327 | { 9773, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xceb0024829ULL }, // Inst #9773 = VFNMADD132SDr_Int |
| 32328 | { 9772, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xceb0024829ULL }, // Inst #9772 = VFNMADD132SDr |
| 32329 | { 9771, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xceb0024819ULL }, // Inst #9771 = VFNMADD132SDm_Int |
| 32330 | { 9770, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xceb0024819ULL }, // Inst #9770 = VFNMADD132SDm |
| 32331 | { 9769, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196cef0024829ULL }, // Inst #9769 = VFNMADD132SDZrb_Intkz |
| 32332 | { 9768, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192cef0024829ULL }, // Inst #9768 = VFNMADD132SDZrb_Intk |
| 32333 | { 9767, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190cef0024829ULL }, // Inst #9767 = VFNMADD132SDZrb_Int |
| 32334 | { 9766, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190cef0024829ULL }, // Inst #9766 = VFNMADD132SDZrb |
| 32335 | { 9765, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cef0024829ULL }, // Inst #9765 = VFNMADD132SDZr_Intkz |
| 32336 | { 9764, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cef0024829ULL }, // Inst #9764 = VFNMADD132SDZr_Intk |
| 32337 | { 9763, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cef0024829ULL }, // Inst #9763 = VFNMADD132SDZr_Int |
| 32338 | { 9762, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cef0024829ULL }, // Inst #9762 = VFNMADD132SDZr |
| 32339 | { 9761, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cef0024819ULL }, // Inst #9761 = VFNMADD132SDZm_Intkz |
| 32340 | { 9760, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cef0024819ULL }, // Inst #9760 = VFNMADD132SDZm_Intk |
| 32341 | { 9759, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cef0024819ULL }, // Inst #9759 = VFNMADD132SDZm_Int |
| 32342 | { 9758, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cef0024819ULL }, // Inst #9758 = VFNMADD132SDZm |
| 32343 | { 9757, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xce28004829ULL }, // Inst #9757 = VFNMADD132PSr |
| 32344 | { 9756, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xce28004819ULL }, // Inst #9756 = VFNMADD132PSm |
| 32345 | { 9755, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece68004829ULL }, // Inst #9755 = VFNMADD132PSZrkz |
| 32346 | { 9754, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeace68004829ULL }, // Inst #9754 = VFNMADD132PSZrk |
| 32347 | { 9753, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ece68004829ULL }, // Inst #9753 = VFNMADD132PSZrbkz |
| 32348 | { 9752, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ace68004829ULL }, // Inst #9752 = VFNMADD132PSZrbk |
| 32349 | { 9751, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178ce68004829ULL }, // Inst #9751 = VFNMADD132PSZrb |
| 32350 | { 9750, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce68004829ULL }, // Inst #9750 = VFNMADD132PSZr |
| 32351 | { 9749, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece68004819ULL }, // Inst #9749 = VFNMADD132PSZmkz |
| 32352 | { 9748, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeace68004819ULL }, // Inst #9748 = VFNMADD132PSZmk |
| 32353 | { 9747, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ece68004819ULL }, // Inst #9747 = VFNMADD132PSZmbkz |
| 32354 | { 9746, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ace68004819ULL }, // Inst #9746 = VFNMADD132PSZmbk |
| 32355 | { 9745, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78ce68004819ULL }, // Inst #9745 = VFNMADD132PSZmb |
| 32356 | { 9744, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce68004819ULL }, // Inst #9744 = VFNMADD132PSZm |
| 32357 | { 9743, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce68004829ULL }, // Inst #9743 = VFNMADD132PSZ256rkz |
| 32358 | { 9742, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ce68004829ULL }, // Inst #9742 = VFNMADD132PSZ256rk |
| 32359 | { 9741, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce68004829ULL }, // Inst #9741 = VFNMADD132PSZ256r |
| 32360 | { 9740, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce68004819ULL }, // Inst #9740 = VFNMADD132PSZ256mkz |
| 32361 | { 9739, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ce68004819ULL }, // Inst #9739 = VFNMADD132PSZ256mk |
| 32362 | { 9738, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77ce68004819ULL }, // Inst #9738 = VFNMADD132PSZ256mbkz |
| 32363 | { 9737, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73ce68004819ULL }, // Inst #9737 = VFNMADD132PSZ256mbk |
| 32364 | { 9736, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71ce68004819ULL }, // Inst #9736 = VFNMADD132PSZ256mb |
| 32365 | { 9735, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce68004819ULL }, // Inst #9735 = VFNMADD132PSZ256m |
| 32366 | { 9734, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce68004829ULL }, // Inst #9734 = VFNMADD132PSZ128rkz |
| 32367 | { 9733, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ce68004829ULL }, // Inst #9733 = VFNMADD132PSZ128rk |
| 32368 | { 9732, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce68004829ULL }, // Inst #9732 = VFNMADD132PSZ128r |
| 32369 | { 9731, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce68004819ULL }, // Inst #9731 = VFNMADD132PSZ128mkz |
| 32370 | { 9730, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ce68004819ULL }, // Inst #9730 = VFNMADD132PSZ128mk |
| 32371 | { 9729, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76ce68004819ULL }, // Inst #9729 = VFNMADD132PSZ128mbkz |
| 32372 | { 9728, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72ce68004819ULL }, // Inst #9728 = VFNMADD132PSZ128mbk |
| 32373 | { 9727, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70ce68004819ULL }, // Inst #9727 = VFNMADD132PSZ128mb |
| 32374 | { 9726, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce68004819ULL }, // Inst #9726 = VFNMADD132PSZ128m |
| 32375 | { 9725, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ce28004829ULL }, // Inst #9725 = VFNMADD132PSYr |
| 32376 | { 9724, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ce28004819ULL }, // Inst #9724 = VFNMADD132PSYm |
| 32377 | { 9723, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece68014829ULL }, // Inst #9723 = VFNMADD132PHZrkz |
| 32378 | { 9722, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeace68014829ULL }, // Inst #9722 = VFNMADD132PHZrk |
| 32379 | { 9721, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ece68014829ULL }, // Inst #9721 = VFNMADD132PHZrbkz |
| 32380 | { 9720, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ace68014829ULL }, // Inst #9720 = VFNMADD132PHZrbk |
| 32381 | { 9719, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158ce68014829ULL }, // Inst #9719 = VFNMADD132PHZrb |
| 32382 | { 9718, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce68014829ULL }, // Inst #9718 = VFNMADD132PHZr |
| 32383 | { 9717, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece68014819ULL }, // Inst #9717 = VFNMADD132PHZmkz |
| 32384 | { 9716, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeace68014819ULL }, // Inst #9716 = VFNMADD132PHZmk |
| 32385 | { 9715, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ece68014819ULL }, // Inst #9715 = VFNMADD132PHZmbkz |
| 32386 | { 9714, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ace68014819ULL }, // Inst #9714 = VFNMADD132PHZmbk |
| 32387 | { 9713, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58ce68014819ULL }, // Inst #9713 = VFNMADD132PHZmb |
| 32388 | { 9712, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce68014819ULL }, // Inst #9712 = VFNMADD132PHZm |
| 32389 | { 9711, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce68014829ULL }, // Inst #9711 = VFNMADD132PHZ256rkz |
| 32390 | { 9710, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ce68014829ULL }, // Inst #9710 = VFNMADD132PHZ256rk |
| 32391 | { 9709, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce68014829ULL }, // Inst #9709 = VFNMADD132PHZ256r |
| 32392 | { 9708, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce68014819ULL }, // Inst #9708 = VFNMADD132PHZ256mkz |
| 32393 | { 9707, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ce68014819ULL }, // Inst #9707 = VFNMADD132PHZ256mk |
| 32394 | { 9706, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57ce68014819ULL }, // Inst #9706 = VFNMADD132PHZ256mbkz |
| 32395 | { 9705, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53ce68014819ULL }, // Inst #9705 = VFNMADD132PHZ256mbk |
| 32396 | { 9704, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51ce68014819ULL }, // Inst #9704 = VFNMADD132PHZ256mb |
| 32397 | { 9703, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce68014819ULL }, // Inst #9703 = VFNMADD132PHZ256m |
| 32398 | { 9702, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce68014829ULL }, // Inst #9702 = VFNMADD132PHZ128rkz |
| 32399 | { 9701, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ce68014829ULL }, // Inst #9701 = VFNMADD132PHZ128rk |
| 32400 | { 9700, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce68014829ULL }, // Inst #9700 = VFNMADD132PHZ128r |
| 32401 | { 9699, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce68014819ULL }, // Inst #9699 = VFNMADD132PHZ128mkz |
| 32402 | { 9698, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ce68014819ULL }, // Inst #9698 = VFNMADD132PHZ128mk |
| 32403 | { 9697, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56ce68014819ULL }, // Inst #9697 = VFNMADD132PHZ128mbkz |
| 32404 | { 9696, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52ce68014819ULL }, // Inst #9696 = VFNMADD132PHZ128mbk |
| 32405 | { 9695, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50ce68014819ULL }, // Inst #9695 = VFNMADD132PHZ128mb |
| 32406 | { 9694, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce68014819ULL }, // Inst #9694 = VFNMADD132PHZ128m |
| 32407 | { 9693, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xce30024829ULL }, // Inst #9693 = VFNMADD132PDr |
| 32408 | { 9692, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xce30024819ULL }, // Inst #9692 = VFNMADD132PDm |
| 32409 | { 9691, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece70024829ULL }, // Inst #9691 = VFNMADD132PDZrkz |
| 32410 | { 9690, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeace70024829ULL }, // Inst #9690 = VFNMADD132PDZrk |
| 32411 | { 9689, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ece70024829ULL }, // Inst #9689 = VFNMADD132PDZrbkz |
| 32412 | { 9688, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ace70024829ULL }, // Inst #9688 = VFNMADD132PDZrbk |
| 32413 | { 9687, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198ce70024829ULL }, // Inst #9687 = VFNMADD132PDZrb |
| 32414 | { 9686, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce70024829ULL }, // Inst #9686 = VFNMADD132PDZr |
| 32415 | { 9685, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeece70024819ULL }, // Inst #9685 = VFNMADD132PDZmkz |
| 32416 | { 9684, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeace70024819ULL }, // Inst #9684 = VFNMADD132PDZmk |
| 32417 | { 9683, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ece70024819ULL }, // Inst #9683 = VFNMADD132PDZmbkz |
| 32418 | { 9682, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ace70024819ULL }, // Inst #9682 = VFNMADD132PDZmbk |
| 32419 | { 9681, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98ce70024819ULL }, // Inst #9681 = VFNMADD132PDZmb |
| 32420 | { 9680, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ce70024819ULL }, // Inst #9680 = VFNMADD132PDZm |
| 32421 | { 9679, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce70024829ULL }, // Inst #9679 = VFNMADD132PDZ256rkz |
| 32422 | { 9678, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ce70024829ULL }, // Inst #9678 = VFNMADD132PDZ256rk |
| 32423 | { 9677, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce70024829ULL }, // Inst #9677 = VFNMADD132PDZ256r |
| 32424 | { 9676, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ce70024819ULL }, // Inst #9676 = VFNMADD132PDZ256mkz |
| 32425 | { 9675, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ce70024819ULL }, // Inst #9675 = VFNMADD132PDZ256mk |
| 32426 | { 9674, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97ce70024819ULL }, // Inst #9674 = VFNMADD132PDZ256mbkz |
| 32427 | { 9673, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93ce70024819ULL }, // Inst #9673 = VFNMADD132PDZ256mbk |
| 32428 | { 9672, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91ce70024819ULL }, // Inst #9672 = VFNMADD132PDZ256mb |
| 32429 | { 9671, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ce70024819ULL }, // Inst #9671 = VFNMADD132PDZ256m |
| 32430 | { 9670, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce70024829ULL }, // Inst #9670 = VFNMADD132PDZ128rkz |
| 32431 | { 9669, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ce70024829ULL }, // Inst #9669 = VFNMADD132PDZ128rk |
| 32432 | { 9668, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce70024829ULL }, // Inst #9668 = VFNMADD132PDZ128r |
| 32433 | { 9667, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ce70024819ULL }, // Inst #9667 = VFNMADD132PDZ128mkz |
| 32434 | { 9666, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ce70024819ULL }, // Inst #9666 = VFNMADD132PDZ128mk |
| 32435 | { 9665, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96ce70024819ULL }, // Inst #9665 = VFNMADD132PDZ128mbkz |
| 32436 | { 9664, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92ce70024819ULL }, // Inst #9664 = VFNMADD132PDZ128mbk |
| 32437 | { 9663, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90ce70024819ULL }, // Inst #9663 = VFNMADD132PDZ128mb |
| 32438 | { 9662, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ce70024819ULL }, // Inst #9662 = VFNMADD132PDZ128m |
| 32439 | { 9661, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ce30024829ULL }, // Inst #9661 = VFNMADD132PDYr |
| 32440 | { 9660, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ce30024819ULL }, // Inst #9660 = VFNMADD132PDYm |
| 32441 | { 9659, 4, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3629, 0|(1ULL<<MCID::Commutable), 0x66ebe0015029ULL }, // Inst #9659 = VFMULCSHZrrkz |
| 32442 | { 9658, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3624, 0|(1ULL<<MCID::Commutable), 0x62ebe0015029ULL }, // Inst #9658 = VFMULCSHZrrk |
| 32443 | { 9657, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3619, 0, 0x176ebe0015029ULL }, // Inst #9657 = VFMULCSHZrrbkz |
| 32444 | { 9656, 6, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3613, 0, 0x172ebe0015029ULL }, // Inst #9656 = VFMULCSHZrrbk |
| 32445 | { 9655, 4, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3609, 0, 0x170ebe0015029ULL }, // Inst #9655 = VFMULCSHZrrb |
| 32446 | { 9654, 3, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3532, 0|(1ULL<<MCID::Commutable), 0x60ebe0015029ULL }, // Inst #9654 = VFMULCSHZrr |
| 32447 | { 9653, 8, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3601, 0|(1ULL<<MCID::MayLoad), 0x66ebe0015019ULL }, // Inst #9653 = VFMULCSHZrmkz |
| 32448 | { 9652, 9, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3592, 0|(1ULL<<MCID::MayLoad), 0x62ebe0015019ULL }, // Inst #9652 = VFMULCSHZrmk |
| 32449 | { 9651, 7, 1, 0, 2164, 1, 0, X86ImpOpBase + 78, 3517, 0|(1ULL<<MCID::MayLoad), 0x60ebe0015019ULL }, // Inst #9651 = VFMULCSHZrm |
| 32450 | { 9650, 4, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3588, 0|(1ULL<<MCID::Commutable), 0xeeeb68015029ULL }, // Inst #9650 = VFMULCPHZrrkz |
| 32451 | { 9649, 5, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3501, 0|(1ULL<<MCID::Commutable), 0xeaeb68015029ULL }, // Inst #9649 = VFMULCPHZrrk |
| 32452 | { 9648, 5, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3583, 0, 0x17eeb68015029ULL }, // Inst #9648 = VFMULCPHZrrbkz |
| 32453 | { 9647, 6, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3495, 0, 0x17aeb68015029ULL }, // Inst #9647 = VFMULCPHZrrbk |
| 32454 | { 9646, 4, 1, 0, 2191, 1, 0, X86ImpOpBase + 78, 3579, 0, 0x178eb68015029ULL }, // Inst #9646 = VFMULCPHZrrb |
| 32455 | { 9645, 3, 1, 0, 2191, 1, 0, X86ImpOpBase + 78, 3576, 0|(1ULL<<MCID::Commutable), 0xe8eb68015029ULL }, // Inst #9645 = VFMULCPHZrr |
| 32456 | { 9644, 8, 1, 0, 2190, 1, 0, X86ImpOpBase + 78, 3568, 0|(1ULL<<MCID::MayLoad), 0xeeeb68015019ULL }, // Inst #9644 = VFMULCPHZrmkz |
| 32457 | { 9643, 9, 1, 0, 2190, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0xeaeb68015019ULL }, // Inst #9643 = VFMULCPHZrmk |
| 32458 | { 9642, 8, 1, 0, 2190, 1, 0, X86ImpOpBase + 78, 3568, 0|(1ULL<<MCID::MayLoad), 0x7eeb68015019ULL }, // Inst #9642 = VFMULCPHZrmbkz |
| 32459 | { 9641, 9, 1, 0, 2190, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0x7aeb68015019ULL }, // Inst #9641 = VFMULCPHZrmbk |
| 32460 | { 9640, 7, 1, 0, 2186, 1, 0, X86ImpOpBase + 78, 3561, 0|(1ULL<<MCID::MayLoad), 0x78eb68015019ULL }, // Inst #9640 = VFMULCPHZrmb |
| 32461 | { 9639, 7, 1, 0, 2186, 1, 0, X86ImpOpBase + 78, 3561, 0|(1ULL<<MCID::MayLoad), 0xe8eb68015019ULL }, // Inst #9639 = VFMULCPHZrm |
| 32462 | { 9638, 4, 1, 0, 2184, 1, 0, X86ImpOpBase + 78, 3557, 0|(1ULL<<MCID::Commutable), 0xc7eb68015029ULL }, // Inst #9638 = VFMULCPHZ256rrkz |
| 32463 | { 9637, 5, 1, 0, 2184, 1, 0, X86ImpOpBase + 78, 3464, 0|(1ULL<<MCID::Commutable), 0xc3eb68015029ULL }, // Inst #9637 = VFMULCPHZ256rrk |
| 32464 | { 9636, 3, 1, 0, 2176, 1, 0, X86ImpOpBase + 78, 3554, 0|(1ULL<<MCID::Commutable), 0xc1eb68015029ULL }, // Inst #9636 = VFMULCPHZ256rr |
| 32465 | { 9635, 8, 1, 0, 2174, 1, 0, X86ImpOpBase + 78, 3546, 0|(1ULL<<MCID::MayLoad), 0xc7eb68015019ULL }, // Inst #9635 = VFMULCPHZ256rmkz |
| 32466 | { 9634, 9, 1, 0, 2174, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0xc3eb68015019ULL }, // Inst #9634 = VFMULCPHZ256rmk |
| 32467 | { 9633, 8, 1, 0, 2174, 1, 0, X86ImpOpBase + 78, 3546, 0|(1ULL<<MCID::MayLoad), 0x77eb68015019ULL }, // Inst #9633 = VFMULCPHZ256rmbkz |
| 32468 | { 9632, 9, 1, 0, 2174, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0x73eb68015019ULL }, // Inst #9632 = VFMULCPHZ256rmbk |
| 32469 | { 9631, 7, 1, 0, 2167, 1, 0, X86ImpOpBase + 78, 3539, 0|(1ULL<<MCID::MayLoad), 0x71eb68015019ULL }, // Inst #9631 = VFMULCPHZ256rmb |
| 32470 | { 9630, 7, 1, 0, 2167, 1, 0, X86ImpOpBase + 78, 3539, 0|(1ULL<<MCID::MayLoad), 0xc1eb68015019ULL }, // Inst #9630 = VFMULCPHZ256rm |
| 32471 | { 9629, 4, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3535, 0|(1ULL<<MCID::Commutable), 0xa6eb68015029ULL }, // Inst #9629 = VFMULCPHZ128rrkz |
| 32472 | { 9628, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3438, 0|(1ULL<<MCID::Commutable), 0xa2eb68015029ULL }, // Inst #9628 = VFMULCPHZ128rrk |
| 32473 | { 9627, 3, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3532, 0|(1ULL<<MCID::Commutable), 0xa0eb68015029ULL }, // Inst #9627 = VFMULCPHZ128rr |
| 32474 | { 9626, 8, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3524, 0|(1ULL<<MCID::MayLoad), 0xa6eb68015019ULL }, // Inst #9626 = VFMULCPHZ128rmkz |
| 32475 | { 9625, 9, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0xa2eb68015019ULL }, // Inst #9625 = VFMULCPHZ128rmk |
| 32476 | { 9624, 8, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3524, 0|(1ULL<<MCID::MayLoad), 0x76eb68015019ULL }, // Inst #9624 = VFMULCPHZ128rmbkz |
| 32477 | { 9623, 9, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0x72eb68015019ULL }, // Inst #9623 = VFMULCPHZ128rmbk |
| 32478 | { 9622, 7, 1, 0, 2164, 1, 0, X86ImpOpBase + 78, 3517, 0|(1ULL<<MCID::MayLoad), 0x70eb68015019ULL }, // Inst #9622 = VFMULCPHZ128rmb |
| 32479 | { 9621, 7, 1, 0, 2164, 1, 0, X86ImpOpBase + 78, 3517, 0|(1ULL<<MCID::MayLoad), 0xa0eb68015019ULL }, // Inst #9621 = VFMULCPHZ128rm |
| 32480 | { 9620, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3852, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7280c6829ULL }, // Inst #9620 = VFMSUBSS4rr_REV |
| 32481 | { 9619, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7280c6829ULL }, // Inst #9619 = VFMSUBSS4rr_Int_REV |
| 32482 | { 9618, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7280e682bULL }, // Inst #9618 = VFMSUBSS4rr_Int |
| 32483 | { 9617, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3852, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb7280e682bULL }, // Inst #9617 = VFMSUBSS4rr |
| 32484 | { 9616, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7280e681bULL }, // Inst #9616 = VFMSUBSS4rm_Int |
| 32485 | { 9615, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3844, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7280e681bULL }, // Inst #9615 = VFMSUBSS4rm |
| 32486 | { 9614, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7280c6819ULL }, // Inst #9614 = VFMSUBSS4mr_Int |
| 32487 | { 9613, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 3836, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7280c6819ULL }, // Inst #9613 = VFMSUBSS4mr |
| 32488 | { 9612, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3832, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7b00c6829ULL }, // Inst #9612 = VFMSUBSD4rr_REV |
| 32489 | { 9611, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7b00c6829ULL }, // Inst #9611 = VFMSUBSD4rr_Int_REV |
| 32490 | { 9610, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb7b00e682bULL }, // Inst #9610 = VFMSUBSD4rr_Int |
| 32491 | { 9609, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3832, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb7b00e682bULL }, // Inst #9609 = VFMSUBSD4rr |
| 32492 | { 9608, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7b00e681bULL }, // Inst #9608 = VFMSUBSD4rm_Int |
| 32493 | { 9607, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3824, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7b00e681bULL }, // Inst #9607 = VFMSUBSD4rm |
| 32494 | { 9606, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7b00c6819ULL }, // Inst #9606 = VFMSUBSD4mr_Int |
| 32495 | { 9605, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 3816, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb7b00c6819ULL }, // Inst #9605 = VFMSUBSD4mr |
| 32496 | { 9604, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb6280c6829ULL }, // Inst #9604 = VFMSUBPS4rr_REV |
| 32497 | { 9603, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb6280e682bULL }, // Inst #9603 = VFMSUBPS4rr |
| 32498 | { 9602, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb6280e681bULL }, // Inst #9602 = VFMSUBPS4rm |
| 32499 | { 9601, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb6280c6819ULL }, // Inst #9601 = VFMSUBPS4mr |
| 32500 | { 9600, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1b6280c6829ULL }, // Inst #9600 = VFMSUBPS4Yrr_REV |
| 32501 | { 9599, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1b6280e682bULL }, // Inst #9599 = VFMSUBPS4Yrr |
| 32502 | { 9598, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b6280e681bULL }, // Inst #9598 = VFMSUBPS4Yrm |
| 32503 | { 9597, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b6280c6819ULL }, // Inst #9597 = VFMSUBPS4Ymr |
| 32504 | { 9596, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb6b00c6829ULL }, // Inst #9596 = VFMSUBPD4rr_REV |
| 32505 | { 9595, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb6b00e682bULL }, // Inst #9595 = VFMSUBPD4rr |
| 32506 | { 9594, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb6b00e681bULL }, // Inst #9594 = VFMSUBPD4rm |
| 32507 | { 9593, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb6b00c6819ULL }, // Inst #9593 = VFMSUBPD4mr |
| 32508 | { 9592, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1b6b00c6829ULL }, // Inst #9592 = VFMSUBPD4Yrr_REV |
| 32509 | { 9591, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1b6b00e682bULL }, // Inst #9591 = VFMSUBPD4Yrr |
| 32510 | { 9590, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b6b00e681bULL }, // Inst #9590 = VFMSUBPD4Yrm |
| 32511 | { 9589, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b6b00c6819ULL }, // Inst #9589 = VFMSUBPD4Ymr |
| 32512 | { 9588, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf280c6829ULL }, // Inst #9588 = VFMSUBADDPS4rr_REV |
| 32513 | { 9587, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaf280e682bULL }, // Inst #9587 = VFMSUBADDPS4rr |
| 32514 | { 9586, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf280e681bULL }, // Inst #9586 = VFMSUBADDPS4rm |
| 32515 | { 9585, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf280c6819ULL }, // Inst #9585 = VFMSUBADDPS4mr |
| 32516 | { 9584, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1af280c6829ULL }, // Inst #9584 = VFMSUBADDPS4Yrr_REV |
| 32517 | { 9583, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1af280e682bULL }, // Inst #9583 = VFMSUBADDPS4Yrr |
| 32518 | { 9582, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1af280e681bULL }, // Inst #9582 = VFMSUBADDPS4Yrm |
| 32519 | { 9581, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1af280c6819ULL }, // Inst #9581 = VFMSUBADDPS4Ymr |
| 32520 | { 9580, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xafb00c6829ULL }, // Inst #9580 = VFMSUBADDPD4rr_REV |
| 32521 | { 9579, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xafb00e682bULL }, // Inst #9579 = VFMSUBADDPD4rr |
| 32522 | { 9578, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb00e681bULL }, // Inst #9578 = VFMSUBADDPD4rm |
| 32523 | { 9577, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xafb00c6819ULL }, // Inst #9577 = VFMSUBADDPD4mr |
| 32524 | { 9576, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1afb00c6829ULL }, // Inst #9576 = VFMSUBADDPD4Yrr_REV |
| 32525 | { 9575, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1afb00e682bULL }, // Inst #9575 = VFMSUBADDPD4Yrr |
| 32526 | { 9574, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afb00e681bULL }, // Inst #9574 = VFMSUBADDPD4Yrm |
| 32527 | { 9573, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1afb00c6819ULL }, // Inst #9573 = VFMSUBADDPD4Ymr |
| 32528 | { 9572, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdba8004829ULL }, // Inst #9572 = VFMSUBADD231PSr |
| 32529 | { 9571, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdba8004819ULL }, // Inst #9571 = VFMSUBADD231PSm |
| 32530 | { 9570, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbe8004829ULL }, // Inst #9570 = VFMSUBADD231PSZrkz |
| 32531 | { 9569, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadbe8004829ULL }, // Inst #9569 = VFMSUBADD231PSZrk |
| 32532 | { 9568, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17edbe8004829ULL }, // Inst #9568 = VFMSUBADD231PSZrbkz |
| 32533 | { 9567, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17adbe8004829ULL }, // Inst #9567 = VFMSUBADD231PSZrbk |
| 32534 | { 9566, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178dbe8004829ULL }, // Inst #9566 = VFMSUBADD231PSZrb |
| 32535 | { 9565, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbe8004829ULL }, // Inst #9565 = VFMSUBADD231PSZr |
| 32536 | { 9564, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbe8004819ULL }, // Inst #9564 = VFMSUBADD231PSZmkz |
| 32537 | { 9563, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadbe8004819ULL }, // Inst #9563 = VFMSUBADD231PSZmk |
| 32538 | { 9562, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7edbe8004819ULL }, // Inst #9562 = VFMSUBADD231PSZmbkz |
| 32539 | { 9561, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7adbe8004819ULL }, // Inst #9561 = VFMSUBADD231PSZmbk |
| 32540 | { 9560, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78dbe8004819ULL }, // Inst #9560 = VFMSUBADD231PSZmb |
| 32541 | { 9559, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbe8004819ULL }, // Inst #9559 = VFMSUBADD231PSZm |
| 32542 | { 9558, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbe8004829ULL }, // Inst #9558 = VFMSUBADD231PSZ256rkz |
| 32543 | { 9557, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dbe8004829ULL }, // Inst #9557 = VFMSUBADD231PSZ256rk |
| 32544 | { 9556, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbe8004829ULL }, // Inst #9556 = VFMSUBADD231PSZ256r |
| 32545 | { 9555, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbe8004819ULL }, // Inst #9555 = VFMSUBADD231PSZ256mkz |
| 32546 | { 9554, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dbe8004819ULL }, // Inst #9554 = VFMSUBADD231PSZ256mk |
| 32547 | { 9553, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77dbe8004819ULL }, // Inst #9553 = VFMSUBADD231PSZ256mbkz |
| 32548 | { 9552, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73dbe8004819ULL }, // Inst #9552 = VFMSUBADD231PSZ256mbk |
| 32549 | { 9551, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71dbe8004819ULL }, // Inst #9551 = VFMSUBADD231PSZ256mb |
| 32550 | { 9550, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbe8004819ULL }, // Inst #9550 = VFMSUBADD231PSZ256m |
| 32551 | { 9549, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbe8004829ULL }, // Inst #9549 = VFMSUBADD231PSZ128rkz |
| 32552 | { 9548, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dbe8004829ULL }, // Inst #9548 = VFMSUBADD231PSZ128rk |
| 32553 | { 9547, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbe8004829ULL }, // Inst #9547 = VFMSUBADD231PSZ128r |
| 32554 | { 9546, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbe8004819ULL }, // Inst #9546 = VFMSUBADD231PSZ128mkz |
| 32555 | { 9545, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dbe8004819ULL }, // Inst #9545 = VFMSUBADD231PSZ128mk |
| 32556 | { 9544, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76dbe8004819ULL }, // Inst #9544 = VFMSUBADD231PSZ128mbkz |
| 32557 | { 9543, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72dbe8004819ULL }, // Inst #9543 = VFMSUBADD231PSZ128mbk |
| 32558 | { 9542, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70dbe8004819ULL }, // Inst #9542 = VFMSUBADD231PSZ128mb |
| 32559 | { 9541, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbe8004819ULL }, // Inst #9541 = VFMSUBADD231PSZ128m |
| 32560 | { 9540, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dba8004829ULL }, // Inst #9540 = VFMSUBADD231PSYr |
| 32561 | { 9539, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dba8004819ULL }, // Inst #9539 = VFMSUBADD231PSYm |
| 32562 | { 9538, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbe8014829ULL }, // Inst #9538 = VFMSUBADD231PHZrkz |
| 32563 | { 9537, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadbe8014829ULL }, // Inst #9537 = VFMSUBADD231PHZrk |
| 32564 | { 9536, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15edbe8014829ULL }, // Inst #9536 = VFMSUBADD231PHZrbkz |
| 32565 | { 9535, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15adbe8014829ULL }, // Inst #9535 = VFMSUBADD231PHZrbk |
| 32566 | { 9534, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158dbe8014829ULL }, // Inst #9534 = VFMSUBADD231PHZrb |
| 32567 | { 9533, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbe8014829ULL }, // Inst #9533 = VFMSUBADD231PHZr |
| 32568 | { 9532, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbe8014819ULL }, // Inst #9532 = VFMSUBADD231PHZmkz |
| 32569 | { 9531, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadbe8014819ULL }, // Inst #9531 = VFMSUBADD231PHZmk |
| 32570 | { 9530, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5edbe8014819ULL }, // Inst #9530 = VFMSUBADD231PHZmbkz |
| 32571 | { 9529, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5adbe8014819ULL }, // Inst #9529 = VFMSUBADD231PHZmbk |
| 32572 | { 9528, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58dbe8014819ULL }, // Inst #9528 = VFMSUBADD231PHZmb |
| 32573 | { 9527, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbe8014819ULL }, // Inst #9527 = VFMSUBADD231PHZm |
| 32574 | { 9526, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbe8014829ULL }, // Inst #9526 = VFMSUBADD231PHZ256rkz |
| 32575 | { 9525, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dbe8014829ULL }, // Inst #9525 = VFMSUBADD231PHZ256rk |
| 32576 | { 9524, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbe8014829ULL }, // Inst #9524 = VFMSUBADD231PHZ256r |
| 32577 | { 9523, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbe8014819ULL }, // Inst #9523 = VFMSUBADD231PHZ256mkz |
| 32578 | { 9522, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dbe8014819ULL }, // Inst #9522 = VFMSUBADD231PHZ256mk |
| 32579 | { 9521, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57dbe8014819ULL }, // Inst #9521 = VFMSUBADD231PHZ256mbkz |
| 32580 | { 9520, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53dbe8014819ULL }, // Inst #9520 = VFMSUBADD231PHZ256mbk |
| 32581 | { 9519, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51dbe8014819ULL }, // Inst #9519 = VFMSUBADD231PHZ256mb |
| 32582 | { 9518, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbe8014819ULL }, // Inst #9518 = VFMSUBADD231PHZ256m |
| 32583 | { 9517, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbe8014829ULL }, // Inst #9517 = VFMSUBADD231PHZ128rkz |
| 32584 | { 9516, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dbe8014829ULL }, // Inst #9516 = VFMSUBADD231PHZ128rk |
| 32585 | { 9515, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbe8014829ULL }, // Inst #9515 = VFMSUBADD231PHZ128r |
| 32586 | { 9514, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbe8014819ULL }, // Inst #9514 = VFMSUBADD231PHZ128mkz |
| 32587 | { 9513, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dbe8014819ULL }, // Inst #9513 = VFMSUBADD231PHZ128mk |
| 32588 | { 9512, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56dbe8014819ULL }, // Inst #9512 = VFMSUBADD231PHZ128mbkz |
| 32589 | { 9511, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52dbe8014819ULL }, // Inst #9511 = VFMSUBADD231PHZ128mbk |
| 32590 | { 9510, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50dbe8014819ULL }, // Inst #9510 = VFMSUBADD231PHZ128mb |
| 32591 | { 9509, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbe8014819ULL }, // Inst #9509 = VFMSUBADD231PHZ128m |
| 32592 | { 9508, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdbb0024829ULL }, // Inst #9508 = VFMSUBADD231PDr |
| 32593 | { 9507, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdbb0024819ULL }, // Inst #9507 = VFMSUBADD231PDm |
| 32594 | { 9506, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbf0024829ULL }, // Inst #9506 = VFMSUBADD231PDZrkz |
| 32595 | { 9505, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadbf0024829ULL }, // Inst #9505 = VFMSUBADD231PDZrk |
| 32596 | { 9504, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19edbf0024829ULL }, // Inst #9504 = VFMSUBADD231PDZrbkz |
| 32597 | { 9503, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19adbf0024829ULL }, // Inst #9503 = VFMSUBADD231PDZrbk |
| 32598 | { 9502, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198dbf0024829ULL }, // Inst #9502 = VFMSUBADD231PDZrb |
| 32599 | { 9501, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbf0024829ULL }, // Inst #9501 = VFMSUBADD231PDZr |
| 32600 | { 9500, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedbf0024819ULL }, // Inst #9500 = VFMSUBADD231PDZmkz |
| 32601 | { 9499, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadbf0024819ULL }, // Inst #9499 = VFMSUBADD231PDZmk |
| 32602 | { 9498, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9edbf0024819ULL }, // Inst #9498 = VFMSUBADD231PDZmbkz |
| 32603 | { 9497, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9adbf0024819ULL }, // Inst #9497 = VFMSUBADD231PDZmbk |
| 32604 | { 9496, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98dbf0024819ULL }, // Inst #9496 = VFMSUBADD231PDZmb |
| 32605 | { 9495, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dbf0024819ULL }, // Inst #9495 = VFMSUBADD231PDZm |
| 32606 | { 9494, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbf0024829ULL }, // Inst #9494 = VFMSUBADD231PDZ256rkz |
| 32607 | { 9493, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dbf0024829ULL }, // Inst #9493 = VFMSUBADD231PDZ256rk |
| 32608 | { 9492, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbf0024829ULL }, // Inst #9492 = VFMSUBADD231PDZ256r |
| 32609 | { 9491, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dbf0024819ULL }, // Inst #9491 = VFMSUBADD231PDZ256mkz |
| 32610 | { 9490, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dbf0024819ULL }, // Inst #9490 = VFMSUBADD231PDZ256mk |
| 32611 | { 9489, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97dbf0024819ULL }, // Inst #9489 = VFMSUBADD231PDZ256mbkz |
| 32612 | { 9488, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93dbf0024819ULL }, // Inst #9488 = VFMSUBADD231PDZ256mbk |
| 32613 | { 9487, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91dbf0024819ULL }, // Inst #9487 = VFMSUBADD231PDZ256mb |
| 32614 | { 9486, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dbf0024819ULL }, // Inst #9486 = VFMSUBADD231PDZ256m |
| 32615 | { 9485, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbf0024829ULL }, // Inst #9485 = VFMSUBADD231PDZ128rkz |
| 32616 | { 9484, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dbf0024829ULL }, // Inst #9484 = VFMSUBADD231PDZ128rk |
| 32617 | { 9483, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbf0024829ULL }, // Inst #9483 = VFMSUBADD231PDZ128r |
| 32618 | { 9482, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dbf0024819ULL }, // Inst #9482 = VFMSUBADD231PDZ128mkz |
| 32619 | { 9481, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dbf0024819ULL }, // Inst #9481 = VFMSUBADD231PDZ128mk |
| 32620 | { 9480, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96dbf0024819ULL }, // Inst #9480 = VFMSUBADD231PDZ128mbkz |
| 32621 | { 9479, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92dbf0024819ULL }, // Inst #9479 = VFMSUBADD231PDZ128mbk |
| 32622 | { 9478, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90dbf0024819ULL }, // Inst #9478 = VFMSUBADD231PDZ128mb |
| 32623 | { 9477, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dbf0024819ULL }, // Inst #9477 = VFMSUBADD231PDZ128m |
| 32624 | { 9476, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dbb0024829ULL }, // Inst #9476 = VFMSUBADD231PDYr |
| 32625 | { 9475, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dbb0024819ULL }, // Inst #9475 = VFMSUBADD231PDYm |
| 32626 | { 9474, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd3a8004829ULL }, // Inst #9474 = VFMSUBADD213PSr |
| 32627 | { 9473, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd3a8004819ULL }, // Inst #9473 = VFMSUBADD213PSm |
| 32628 | { 9472, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3e8004829ULL }, // Inst #9472 = VFMSUBADD213PSZrkz |
| 32629 | { 9471, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead3e8004829ULL }, // Inst #9471 = VFMSUBADD213PSZrk |
| 32630 | { 9470, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ed3e8004829ULL }, // Inst #9470 = VFMSUBADD213PSZrbkz |
| 32631 | { 9469, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ad3e8004829ULL }, // Inst #9469 = VFMSUBADD213PSZrbk |
| 32632 | { 9468, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178d3e8004829ULL }, // Inst #9468 = VFMSUBADD213PSZrb |
| 32633 | { 9467, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3e8004829ULL }, // Inst #9467 = VFMSUBADD213PSZr |
| 32634 | { 9466, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3e8004819ULL }, // Inst #9466 = VFMSUBADD213PSZmkz |
| 32635 | { 9465, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead3e8004819ULL }, // Inst #9465 = VFMSUBADD213PSZmk |
| 32636 | { 9464, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed3e8004819ULL }, // Inst #9464 = VFMSUBADD213PSZmbkz |
| 32637 | { 9463, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad3e8004819ULL }, // Inst #9463 = VFMSUBADD213PSZmbk |
| 32638 | { 9462, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d3e8004819ULL }, // Inst #9462 = VFMSUBADD213PSZmb |
| 32639 | { 9461, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3e8004819ULL }, // Inst #9461 = VFMSUBADD213PSZm |
| 32640 | { 9460, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3e8004829ULL }, // Inst #9460 = VFMSUBADD213PSZ256rkz |
| 32641 | { 9459, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d3e8004829ULL }, // Inst #9459 = VFMSUBADD213PSZ256rk |
| 32642 | { 9458, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3e8004829ULL }, // Inst #9458 = VFMSUBADD213PSZ256r |
| 32643 | { 9457, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3e8004819ULL }, // Inst #9457 = VFMSUBADD213PSZ256mkz |
| 32644 | { 9456, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d3e8004819ULL }, // Inst #9456 = VFMSUBADD213PSZ256mk |
| 32645 | { 9455, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d3e8004819ULL }, // Inst #9455 = VFMSUBADD213PSZ256mbkz |
| 32646 | { 9454, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d3e8004819ULL }, // Inst #9454 = VFMSUBADD213PSZ256mbk |
| 32647 | { 9453, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d3e8004819ULL }, // Inst #9453 = VFMSUBADD213PSZ256mb |
| 32648 | { 9452, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3e8004819ULL }, // Inst #9452 = VFMSUBADD213PSZ256m |
| 32649 | { 9451, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3e8004829ULL }, // Inst #9451 = VFMSUBADD213PSZ128rkz |
| 32650 | { 9450, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d3e8004829ULL }, // Inst #9450 = VFMSUBADD213PSZ128rk |
| 32651 | { 9449, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3e8004829ULL }, // Inst #9449 = VFMSUBADD213PSZ128r |
| 32652 | { 9448, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3e8004819ULL }, // Inst #9448 = VFMSUBADD213PSZ128mkz |
| 32653 | { 9447, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d3e8004819ULL }, // Inst #9447 = VFMSUBADD213PSZ128mk |
| 32654 | { 9446, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d3e8004819ULL }, // Inst #9446 = VFMSUBADD213PSZ128mbkz |
| 32655 | { 9445, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d3e8004819ULL }, // Inst #9445 = VFMSUBADD213PSZ128mbk |
| 32656 | { 9444, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d3e8004819ULL }, // Inst #9444 = VFMSUBADD213PSZ128mb |
| 32657 | { 9443, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3e8004819ULL }, // Inst #9443 = VFMSUBADD213PSZ128m |
| 32658 | { 9442, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d3a8004829ULL }, // Inst #9442 = VFMSUBADD213PSYr |
| 32659 | { 9441, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d3a8004819ULL }, // Inst #9441 = VFMSUBADD213PSYm |
| 32660 | { 9440, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3e8014829ULL }, // Inst #9440 = VFMSUBADD213PHZrkz |
| 32661 | { 9439, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead3e8014829ULL }, // Inst #9439 = VFMSUBADD213PHZrk |
| 32662 | { 9438, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ed3e8014829ULL }, // Inst #9438 = VFMSUBADD213PHZrbkz |
| 32663 | { 9437, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ad3e8014829ULL }, // Inst #9437 = VFMSUBADD213PHZrbk |
| 32664 | { 9436, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158d3e8014829ULL }, // Inst #9436 = VFMSUBADD213PHZrb |
| 32665 | { 9435, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3e8014829ULL }, // Inst #9435 = VFMSUBADD213PHZr |
| 32666 | { 9434, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3e8014819ULL }, // Inst #9434 = VFMSUBADD213PHZmkz |
| 32667 | { 9433, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead3e8014819ULL }, // Inst #9433 = VFMSUBADD213PHZmk |
| 32668 | { 9432, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed3e8014819ULL }, // Inst #9432 = VFMSUBADD213PHZmbkz |
| 32669 | { 9431, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad3e8014819ULL }, // Inst #9431 = VFMSUBADD213PHZmbk |
| 32670 | { 9430, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d3e8014819ULL }, // Inst #9430 = VFMSUBADD213PHZmb |
| 32671 | { 9429, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3e8014819ULL }, // Inst #9429 = VFMSUBADD213PHZm |
| 32672 | { 9428, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3e8014829ULL }, // Inst #9428 = VFMSUBADD213PHZ256rkz |
| 32673 | { 9427, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d3e8014829ULL }, // Inst #9427 = VFMSUBADD213PHZ256rk |
| 32674 | { 9426, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3e8014829ULL }, // Inst #9426 = VFMSUBADD213PHZ256r |
| 32675 | { 9425, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3e8014819ULL }, // Inst #9425 = VFMSUBADD213PHZ256mkz |
| 32676 | { 9424, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d3e8014819ULL }, // Inst #9424 = VFMSUBADD213PHZ256mk |
| 32677 | { 9423, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d3e8014819ULL }, // Inst #9423 = VFMSUBADD213PHZ256mbkz |
| 32678 | { 9422, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d3e8014819ULL }, // Inst #9422 = VFMSUBADD213PHZ256mbk |
| 32679 | { 9421, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d3e8014819ULL }, // Inst #9421 = VFMSUBADD213PHZ256mb |
| 32680 | { 9420, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3e8014819ULL }, // Inst #9420 = VFMSUBADD213PHZ256m |
| 32681 | { 9419, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3e8014829ULL }, // Inst #9419 = VFMSUBADD213PHZ128rkz |
| 32682 | { 9418, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d3e8014829ULL }, // Inst #9418 = VFMSUBADD213PHZ128rk |
| 32683 | { 9417, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3e8014829ULL }, // Inst #9417 = VFMSUBADD213PHZ128r |
| 32684 | { 9416, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3e8014819ULL }, // Inst #9416 = VFMSUBADD213PHZ128mkz |
| 32685 | { 9415, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d3e8014819ULL }, // Inst #9415 = VFMSUBADD213PHZ128mk |
| 32686 | { 9414, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d3e8014819ULL }, // Inst #9414 = VFMSUBADD213PHZ128mbkz |
| 32687 | { 9413, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d3e8014819ULL }, // Inst #9413 = VFMSUBADD213PHZ128mbk |
| 32688 | { 9412, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d3e8014819ULL }, // Inst #9412 = VFMSUBADD213PHZ128mb |
| 32689 | { 9411, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3e8014819ULL }, // Inst #9411 = VFMSUBADD213PHZ128m |
| 32690 | { 9410, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd3b0024829ULL }, // Inst #9410 = VFMSUBADD213PDr |
| 32691 | { 9409, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd3b0024819ULL }, // Inst #9409 = VFMSUBADD213PDm |
| 32692 | { 9408, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3f0024829ULL }, // Inst #9408 = VFMSUBADD213PDZrkz |
| 32693 | { 9407, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead3f0024829ULL }, // Inst #9407 = VFMSUBADD213PDZrk |
| 32694 | { 9406, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ed3f0024829ULL }, // Inst #9406 = VFMSUBADD213PDZrbkz |
| 32695 | { 9405, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ad3f0024829ULL }, // Inst #9405 = VFMSUBADD213PDZrbk |
| 32696 | { 9404, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198d3f0024829ULL }, // Inst #9404 = VFMSUBADD213PDZrb |
| 32697 | { 9403, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3f0024829ULL }, // Inst #9403 = VFMSUBADD213PDZr |
| 32698 | { 9402, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed3f0024819ULL }, // Inst #9402 = VFMSUBADD213PDZmkz |
| 32699 | { 9401, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead3f0024819ULL }, // Inst #9401 = VFMSUBADD213PDZmk |
| 32700 | { 9400, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed3f0024819ULL }, // Inst #9400 = VFMSUBADD213PDZmbkz |
| 32701 | { 9399, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad3f0024819ULL }, // Inst #9399 = VFMSUBADD213PDZmbk |
| 32702 | { 9398, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d3f0024819ULL }, // Inst #9398 = VFMSUBADD213PDZmb |
| 32703 | { 9397, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d3f0024819ULL }, // Inst #9397 = VFMSUBADD213PDZm |
| 32704 | { 9396, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3f0024829ULL }, // Inst #9396 = VFMSUBADD213PDZ256rkz |
| 32705 | { 9395, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d3f0024829ULL }, // Inst #9395 = VFMSUBADD213PDZ256rk |
| 32706 | { 9394, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3f0024829ULL }, // Inst #9394 = VFMSUBADD213PDZ256r |
| 32707 | { 9393, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d3f0024819ULL }, // Inst #9393 = VFMSUBADD213PDZ256mkz |
| 32708 | { 9392, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d3f0024819ULL }, // Inst #9392 = VFMSUBADD213PDZ256mk |
| 32709 | { 9391, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d3f0024819ULL }, // Inst #9391 = VFMSUBADD213PDZ256mbkz |
| 32710 | { 9390, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d3f0024819ULL }, // Inst #9390 = VFMSUBADD213PDZ256mbk |
| 32711 | { 9389, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d3f0024819ULL }, // Inst #9389 = VFMSUBADD213PDZ256mb |
| 32712 | { 9388, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d3f0024819ULL }, // Inst #9388 = VFMSUBADD213PDZ256m |
| 32713 | { 9387, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3f0024829ULL }, // Inst #9387 = VFMSUBADD213PDZ128rkz |
| 32714 | { 9386, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d3f0024829ULL }, // Inst #9386 = VFMSUBADD213PDZ128rk |
| 32715 | { 9385, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3f0024829ULL }, // Inst #9385 = VFMSUBADD213PDZ128r |
| 32716 | { 9384, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d3f0024819ULL }, // Inst #9384 = VFMSUBADD213PDZ128mkz |
| 32717 | { 9383, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d3f0024819ULL }, // Inst #9383 = VFMSUBADD213PDZ128mk |
| 32718 | { 9382, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d3f0024819ULL }, // Inst #9382 = VFMSUBADD213PDZ128mbkz |
| 32719 | { 9381, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d3f0024819ULL }, // Inst #9381 = VFMSUBADD213PDZ128mbk |
| 32720 | { 9380, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d3f0024819ULL }, // Inst #9380 = VFMSUBADD213PDZ128mb |
| 32721 | { 9379, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d3f0024819ULL }, // Inst #9379 = VFMSUBADD213PDZ128m |
| 32722 | { 9378, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d3b0024829ULL }, // Inst #9378 = VFMSUBADD213PDYr |
| 32723 | { 9377, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d3b0024819ULL }, // Inst #9377 = VFMSUBADD213PDYm |
| 32724 | { 9376, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcba8004829ULL }, // Inst #9376 = VFMSUBADD132PSr |
| 32725 | { 9375, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcba8004819ULL }, // Inst #9375 = VFMSUBADD132PSm |
| 32726 | { 9374, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbe8004829ULL }, // Inst #9374 = VFMSUBADD132PSZrkz |
| 32727 | { 9373, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacbe8004829ULL }, // Inst #9373 = VFMSUBADD132PSZrk |
| 32728 | { 9372, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ecbe8004829ULL }, // Inst #9372 = VFMSUBADD132PSZrbkz |
| 32729 | { 9371, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17acbe8004829ULL }, // Inst #9371 = VFMSUBADD132PSZrbk |
| 32730 | { 9370, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178cbe8004829ULL }, // Inst #9370 = VFMSUBADD132PSZrb |
| 32731 | { 9369, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbe8004829ULL }, // Inst #9369 = VFMSUBADD132PSZr |
| 32732 | { 9368, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbe8004819ULL }, // Inst #9368 = VFMSUBADD132PSZmkz |
| 32733 | { 9367, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacbe8004819ULL }, // Inst #9367 = VFMSUBADD132PSZmk |
| 32734 | { 9366, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ecbe8004819ULL }, // Inst #9366 = VFMSUBADD132PSZmbkz |
| 32735 | { 9365, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7acbe8004819ULL }, // Inst #9365 = VFMSUBADD132PSZmbk |
| 32736 | { 9364, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78cbe8004819ULL }, // Inst #9364 = VFMSUBADD132PSZmb |
| 32737 | { 9363, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbe8004819ULL }, // Inst #9363 = VFMSUBADD132PSZm |
| 32738 | { 9362, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbe8004829ULL }, // Inst #9362 = VFMSUBADD132PSZ256rkz |
| 32739 | { 9361, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cbe8004829ULL }, // Inst #9361 = VFMSUBADD132PSZ256rk |
| 32740 | { 9360, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbe8004829ULL }, // Inst #9360 = VFMSUBADD132PSZ256r |
| 32741 | { 9359, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbe8004819ULL }, // Inst #9359 = VFMSUBADD132PSZ256mkz |
| 32742 | { 9358, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cbe8004819ULL }, // Inst #9358 = VFMSUBADD132PSZ256mk |
| 32743 | { 9357, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77cbe8004819ULL }, // Inst #9357 = VFMSUBADD132PSZ256mbkz |
| 32744 | { 9356, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73cbe8004819ULL }, // Inst #9356 = VFMSUBADD132PSZ256mbk |
| 32745 | { 9355, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71cbe8004819ULL }, // Inst #9355 = VFMSUBADD132PSZ256mb |
| 32746 | { 9354, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbe8004819ULL }, // Inst #9354 = VFMSUBADD132PSZ256m |
| 32747 | { 9353, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbe8004829ULL }, // Inst #9353 = VFMSUBADD132PSZ128rkz |
| 32748 | { 9352, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cbe8004829ULL }, // Inst #9352 = VFMSUBADD132PSZ128rk |
| 32749 | { 9351, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbe8004829ULL }, // Inst #9351 = VFMSUBADD132PSZ128r |
| 32750 | { 9350, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbe8004819ULL }, // Inst #9350 = VFMSUBADD132PSZ128mkz |
| 32751 | { 9349, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cbe8004819ULL }, // Inst #9349 = VFMSUBADD132PSZ128mk |
| 32752 | { 9348, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76cbe8004819ULL }, // Inst #9348 = VFMSUBADD132PSZ128mbkz |
| 32753 | { 9347, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72cbe8004819ULL }, // Inst #9347 = VFMSUBADD132PSZ128mbk |
| 32754 | { 9346, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70cbe8004819ULL }, // Inst #9346 = VFMSUBADD132PSZ128mb |
| 32755 | { 9345, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbe8004819ULL }, // Inst #9345 = VFMSUBADD132PSZ128m |
| 32756 | { 9344, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cba8004829ULL }, // Inst #9344 = VFMSUBADD132PSYr |
| 32757 | { 9343, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cba8004819ULL }, // Inst #9343 = VFMSUBADD132PSYm |
| 32758 | { 9342, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbe8014829ULL }, // Inst #9342 = VFMSUBADD132PHZrkz |
| 32759 | { 9341, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacbe8014829ULL }, // Inst #9341 = VFMSUBADD132PHZrk |
| 32760 | { 9340, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ecbe8014829ULL }, // Inst #9340 = VFMSUBADD132PHZrbkz |
| 32761 | { 9339, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15acbe8014829ULL }, // Inst #9339 = VFMSUBADD132PHZrbk |
| 32762 | { 9338, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158cbe8014829ULL }, // Inst #9338 = VFMSUBADD132PHZrb |
| 32763 | { 9337, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbe8014829ULL }, // Inst #9337 = VFMSUBADD132PHZr |
| 32764 | { 9336, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbe8014819ULL }, // Inst #9336 = VFMSUBADD132PHZmkz |
| 32765 | { 9335, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacbe8014819ULL }, // Inst #9335 = VFMSUBADD132PHZmk |
| 32766 | { 9334, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ecbe8014819ULL }, // Inst #9334 = VFMSUBADD132PHZmbkz |
| 32767 | { 9333, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5acbe8014819ULL }, // Inst #9333 = VFMSUBADD132PHZmbk |
| 32768 | { 9332, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58cbe8014819ULL }, // Inst #9332 = VFMSUBADD132PHZmb |
| 32769 | { 9331, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbe8014819ULL }, // Inst #9331 = VFMSUBADD132PHZm |
| 32770 | { 9330, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbe8014829ULL }, // Inst #9330 = VFMSUBADD132PHZ256rkz |
| 32771 | { 9329, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cbe8014829ULL }, // Inst #9329 = VFMSUBADD132PHZ256rk |
| 32772 | { 9328, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbe8014829ULL }, // Inst #9328 = VFMSUBADD132PHZ256r |
| 32773 | { 9327, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbe8014819ULL }, // Inst #9327 = VFMSUBADD132PHZ256mkz |
| 32774 | { 9326, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cbe8014819ULL }, // Inst #9326 = VFMSUBADD132PHZ256mk |
| 32775 | { 9325, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57cbe8014819ULL }, // Inst #9325 = VFMSUBADD132PHZ256mbkz |
| 32776 | { 9324, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53cbe8014819ULL }, // Inst #9324 = VFMSUBADD132PHZ256mbk |
| 32777 | { 9323, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51cbe8014819ULL }, // Inst #9323 = VFMSUBADD132PHZ256mb |
| 32778 | { 9322, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbe8014819ULL }, // Inst #9322 = VFMSUBADD132PHZ256m |
| 32779 | { 9321, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbe8014829ULL }, // Inst #9321 = VFMSUBADD132PHZ128rkz |
| 32780 | { 9320, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cbe8014829ULL }, // Inst #9320 = VFMSUBADD132PHZ128rk |
| 32781 | { 9319, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbe8014829ULL }, // Inst #9319 = VFMSUBADD132PHZ128r |
| 32782 | { 9318, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbe8014819ULL }, // Inst #9318 = VFMSUBADD132PHZ128mkz |
| 32783 | { 9317, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cbe8014819ULL }, // Inst #9317 = VFMSUBADD132PHZ128mk |
| 32784 | { 9316, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56cbe8014819ULL }, // Inst #9316 = VFMSUBADD132PHZ128mbkz |
| 32785 | { 9315, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52cbe8014819ULL }, // Inst #9315 = VFMSUBADD132PHZ128mbk |
| 32786 | { 9314, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50cbe8014819ULL }, // Inst #9314 = VFMSUBADD132PHZ128mb |
| 32787 | { 9313, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbe8014819ULL }, // Inst #9313 = VFMSUBADD132PHZ128m |
| 32788 | { 9312, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcbb0024829ULL }, // Inst #9312 = VFMSUBADD132PDr |
| 32789 | { 9311, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcbb0024819ULL }, // Inst #9311 = VFMSUBADD132PDm |
| 32790 | { 9310, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbf0024829ULL }, // Inst #9310 = VFMSUBADD132PDZrkz |
| 32791 | { 9309, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacbf0024829ULL }, // Inst #9309 = VFMSUBADD132PDZrk |
| 32792 | { 9308, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ecbf0024829ULL }, // Inst #9308 = VFMSUBADD132PDZrbkz |
| 32793 | { 9307, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19acbf0024829ULL }, // Inst #9307 = VFMSUBADD132PDZrbk |
| 32794 | { 9306, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198cbf0024829ULL }, // Inst #9306 = VFMSUBADD132PDZrb |
| 32795 | { 9305, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbf0024829ULL }, // Inst #9305 = VFMSUBADD132PDZr |
| 32796 | { 9304, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecbf0024819ULL }, // Inst #9304 = VFMSUBADD132PDZmkz |
| 32797 | { 9303, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacbf0024819ULL }, // Inst #9303 = VFMSUBADD132PDZmk |
| 32798 | { 9302, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ecbf0024819ULL }, // Inst #9302 = VFMSUBADD132PDZmbkz |
| 32799 | { 9301, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9acbf0024819ULL }, // Inst #9301 = VFMSUBADD132PDZmbk |
| 32800 | { 9300, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98cbf0024819ULL }, // Inst #9300 = VFMSUBADD132PDZmb |
| 32801 | { 9299, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cbf0024819ULL }, // Inst #9299 = VFMSUBADD132PDZm |
| 32802 | { 9298, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbf0024829ULL }, // Inst #9298 = VFMSUBADD132PDZ256rkz |
| 32803 | { 9297, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cbf0024829ULL }, // Inst #9297 = VFMSUBADD132PDZ256rk |
| 32804 | { 9296, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbf0024829ULL }, // Inst #9296 = VFMSUBADD132PDZ256r |
| 32805 | { 9295, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cbf0024819ULL }, // Inst #9295 = VFMSUBADD132PDZ256mkz |
| 32806 | { 9294, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cbf0024819ULL }, // Inst #9294 = VFMSUBADD132PDZ256mk |
| 32807 | { 9293, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97cbf0024819ULL }, // Inst #9293 = VFMSUBADD132PDZ256mbkz |
| 32808 | { 9292, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93cbf0024819ULL }, // Inst #9292 = VFMSUBADD132PDZ256mbk |
| 32809 | { 9291, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91cbf0024819ULL }, // Inst #9291 = VFMSUBADD132PDZ256mb |
| 32810 | { 9290, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cbf0024819ULL }, // Inst #9290 = VFMSUBADD132PDZ256m |
| 32811 | { 9289, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbf0024829ULL }, // Inst #9289 = VFMSUBADD132PDZ128rkz |
| 32812 | { 9288, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cbf0024829ULL }, // Inst #9288 = VFMSUBADD132PDZ128rk |
| 32813 | { 9287, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbf0024829ULL }, // Inst #9287 = VFMSUBADD132PDZ128r |
| 32814 | { 9286, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cbf0024819ULL }, // Inst #9286 = VFMSUBADD132PDZ128mkz |
| 32815 | { 9285, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cbf0024819ULL }, // Inst #9285 = VFMSUBADD132PDZ128mk |
| 32816 | { 9284, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96cbf0024819ULL }, // Inst #9284 = VFMSUBADD132PDZ128mbkz |
| 32817 | { 9283, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92cbf0024819ULL }, // Inst #9283 = VFMSUBADD132PDZ128mbk |
| 32818 | { 9282, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90cbf0024819ULL }, // Inst #9282 = VFMSUBADD132PDZ128mb |
| 32819 | { 9281, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cbf0024819ULL }, // Inst #9281 = VFMSUBADD132PDZ128m |
| 32820 | { 9280, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cbb0024829ULL }, // Inst #9280 = VFMSUBADD132PDYr |
| 32821 | { 9279, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cbb0024819ULL }, // Inst #9279 = VFMSUBADD132PDYm |
| 32822 | { 9278, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdda8004829ULL }, // Inst #9278 = VFMSUB231SSr_Int |
| 32823 | { 9277, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdda8004829ULL }, // Inst #9277 = VFMSUB231SSr |
| 32824 | { 9276, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdda8004819ULL }, // Inst #9276 = VFMSUB231SSm_Int |
| 32825 | { 9275, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdda8004819ULL }, // Inst #9275 = VFMSUB231SSm |
| 32826 | { 9274, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176dde8004829ULL }, // Inst #9274 = VFMSUB231SSZrb_Intkz |
| 32827 | { 9273, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172dde8004829ULL }, // Inst #9273 = VFMSUB231SSZrb_Intk |
| 32828 | { 9272, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170dde8004829ULL }, // Inst #9272 = VFMSUB231SSZrb_Int |
| 32829 | { 9271, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170dde8004829ULL }, // Inst #9271 = VFMSUB231SSZrb |
| 32830 | { 9270, 5, 1, 0, 1104, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dde8004829ULL }, // Inst #9270 = VFMSUB231SSZr_Intkz |
| 32831 | { 9269, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dde8004829ULL }, // Inst #9269 = VFMSUB231SSZr_Intk |
| 32832 | { 9268, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dde8004829ULL }, // Inst #9268 = VFMSUB231SSZr_Int |
| 32833 | { 9267, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dde8004829ULL }, // Inst #9267 = VFMSUB231SSZr |
| 32834 | { 9266, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dde8004819ULL }, // Inst #9266 = VFMSUB231SSZm_Intkz |
| 32835 | { 9265, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dde8004819ULL }, // Inst #9265 = VFMSUB231SSZm_Intk |
| 32836 | { 9264, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dde8004819ULL }, // Inst #9264 = VFMSUB231SSZm_Int |
| 32837 | { 9263, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dde8004819ULL }, // Inst #9263 = VFMSUB231SSZm |
| 32838 | { 9262, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156dde8014829ULL }, // Inst #9262 = VFMSUB231SHZrb_Intkz |
| 32839 | { 9261, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152dde8014829ULL }, // Inst #9261 = VFMSUB231SHZrb_Intk |
| 32840 | { 9260, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150dde8014829ULL }, // Inst #9260 = VFMSUB231SHZrb_Int |
| 32841 | { 9259, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150dde8014829ULL }, // Inst #9259 = VFMSUB231SHZrb |
| 32842 | { 9258, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dde8014829ULL }, // Inst #9258 = VFMSUB231SHZr_Intkz |
| 32843 | { 9257, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dde8014829ULL }, // Inst #9257 = VFMSUB231SHZr_Intk |
| 32844 | { 9256, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dde8014829ULL }, // Inst #9256 = VFMSUB231SHZr_Int |
| 32845 | { 9255, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dde8014829ULL }, // Inst #9255 = VFMSUB231SHZr |
| 32846 | { 9254, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dde8014819ULL }, // Inst #9254 = VFMSUB231SHZm_Intkz |
| 32847 | { 9253, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dde8014819ULL }, // Inst #9253 = VFMSUB231SHZm_Intk |
| 32848 | { 9252, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dde8014819ULL }, // Inst #9252 = VFMSUB231SHZm_Int |
| 32849 | { 9251, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dde8014819ULL }, // Inst #9251 = VFMSUB231SHZm |
| 32850 | { 9250, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xddb0024829ULL }, // Inst #9250 = VFMSUB231SDr_Int |
| 32851 | { 9249, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xddb0024829ULL }, // Inst #9249 = VFMSUB231SDr |
| 32852 | { 9248, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xddb0024819ULL }, // Inst #9248 = VFMSUB231SDm_Int |
| 32853 | { 9247, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xddb0024819ULL }, // Inst #9247 = VFMSUB231SDm |
| 32854 | { 9246, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196ddf0024829ULL }, // Inst #9246 = VFMSUB231SDZrb_Intkz |
| 32855 | { 9245, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192ddf0024829ULL }, // Inst #9245 = VFMSUB231SDZrb_Intk |
| 32856 | { 9244, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190ddf0024829ULL }, // Inst #9244 = VFMSUB231SDZrb_Int |
| 32857 | { 9243, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190ddf0024829ULL }, // Inst #9243 = VFMSUB231SDZrb |
| 32858 | { 9242, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86ddf0024829ULL }, // Inst #9242 = VFMSUB231SDZr_Intkz |
| 32859 | { 9241, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82ddf0024829ULL }, // Inst #9241 = VFMSUB231SDZr_Intk |
| 32860 | { 9240, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ddf0024829ULL }, // Inst #9240 = VFMSUB231SDZr_Int |
| 32861 | { 9239, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ddf0024829ULL }, // Inst #9239 = VFMSUB231SDZr |
| 32862 | { 9238, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86ddf0024819ULL }, // Inst #9238 = VFMSUB231SDZm_Intkz |
| 32863 | { 9237, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82ddf0024819ULL }, // Inst #9237 = VFMSUB231SDZm_Intk |
| 32864 | { 9236, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ddf0024819ULL }, // Inst #9236 = VFMSUB231SDZm_Int |
| 32865 | { 9235, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ddf0024819ULL }, // Inst #9235 = VFMSUB231SDZm |
| 32866 | { 9234, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdd28004829ULL }, // Inst #9234 = VFMSUB231PSr |
| 32867 | { 9233, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdd28004819ULL }, // Inst #9233 = VFMSUB231PSm |
| 32868 | { 9232, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd68004829ULL }, // Inst #9232 = VFMSUB231PSZrkz |
| 32869 | { 9231, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadd68004829ULL }, // Inst #9231 = VFMSUB231PSZrk |
| 32870 | { 9230, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17edd68004829ULL }, // Inst #9230 = VFMSUB231PSZrbkz |
| 32871 | { 9229, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17add68004829ULL }, // Inst #9229 = VFMSUB231PSZrbk |
| 32872 | { 9228, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178dd68004829ULL }, // Inst #9228 = VFMSUB231PSZrb |
| 32873 | { 9227, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd68004829ULL }, // Inst #9227 = VFMSUB231PSZr |
| 32874 | { 9226, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd68004819ULL }, // Inst #9226 = VFMSUB231PSZmkz |
| 32875 | { 9225, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadd68004819ULL }, // Inst #9225 = VFMSUB231PSZmk |
| 32876 | { 9224, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7edd68004819ULL }, // Inst #9224 = VFMSUB231PSZmbkz |
| 32877 | { 9223, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7add68004819ULL }, // Inst #9223 = VFMSUB231PSZmbk |
| 32878 | { 9222, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78dd68004819ULL }, // Inst #9222 = VFMSUB231PSZmb |
| 32879 | { 9221, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd68004819ULL }, // Inst #9221 = VFMSUB231PSZm |
| 32880 | { 9220, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd68004829ULL }, // Inst #9220 = VFMSUB231PSZ256rkz |
| 32881 | { 9219, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dd68004829ULL }, // Inst #9219 = VFMSUB231PSZ256rk |
| 32882 | { 9218, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd68004829ULL }, // Inst #9218 = VFMSUB231PSZ256r |
| 32883 | { 9217, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd68004819ULL }, // Inst #9217 = VFMSUB231PSZ256mkz |
| 32884 | { 9216, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dd68004819ULL }, // Inst #9216 = VFMSUB231PSZ256mk |
| 32885 | { 9215, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77dd68004819ULL }, // Inst #9215 = VFMSUB231PSZ256mbkz |
| 32886 | { 9214, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73dd68004819ULL }, // Inst #9214 = VFMSUB231PSZ256mbk |
| 32887 | { 9213, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71dd68004819ULL }, // Inst #9213 = VFMSUB231PSZ256mb |
| 32888 | { 9212, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd68004819ULL }, // Inst #9212 = VFMSUB231PSZ256m |
| 32889 | { 9211, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd68004829ULL }, // Inst #9211 = VFMSUB231PSZ128rkz |
| 32890 | { 9210, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dd68004829ULL }, // Inst #9210 = VFMSUB231PSZ128rk |
| 32891 | { 9209, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd68004829ULL }, // Inst #9209 = VFMSUB231PSZ128r |
| 32892 | { 9208, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd68004819ULL }, // Inst #9208 = VFMSUB231PSZ128mkz |
| 32893 | { 9207, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dd68004819ULL }, // Inst #9207 = VFMSUB231PSZ128mk |
| 32894 | { 9206, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76dd68004819ULL }, // Inst #9206 = VFMSUB231PSZ128mbkz |
| 32895 | { 9205, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72dd68004819ULL }, // Inst #9205 = VFMSUB231PSZ128mbk |
| 32896 | { 9204, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70dd68004819ULL }, // Inst #9204 = VFMSUB231PSZ128mb |
| 32897 | { 9203, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd68004819ULL }, // Inst #9203 = VFMSUB231PSZ128m |
| 32898 | { 9202, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dd28004829ULL }, // Inst #9202 = VFMSUB231PSYr |
| 32899 | { 9201, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dd28004819ULL }, // Inst #9201 = VFMSUB231PSYm |
| 32900 | { 9200, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd68014829ULL }, // Inst #9200 = VFMSUB231PHZrkz |
| 32901 | { 9199, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadd68014829ULL }, // Inst #9199 = VFMSUB231PHZrk |
| 32902 | { 9198, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15edd68014829ULL }, // Inst #9198 = VFMSUB231PHZrbkz |
| 32903 | { 9197, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15add68014829ULL }, // Inst #9197 = VFMSUB231PHZrbk |
| 32904 | { 9196, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158dd68014829ULL }, // Inst #9196 = VFMSUB231PHZrb |
| 32905 | { 9195, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd68014829ULL }, // Inst #9195 = VFMSUB231PHZr |
| 32906 | { 9194, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd68014819ULL }, // Inst #9194 = VFMSUB231PHZmkz |
| 32907 | { 9193, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadd68014819ULL }, // Inst #9193 = VFMSUB231PHZmk |
| 32908 | { 9192, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5edd68014819ULL }, // Inst #9192 = VFMSUB231PHZmbkz |
| 32909 | { 9191, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5add68014819ULL }, // Inst #9191 = VFMSUB231PHZmbk |
| 32910 | { 9190, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58dd68014819ULL }, // Inst #9190 = VFMSUB231PHZmb |
| 32911 | { 9189, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd68014819ULL }, // Inst #9189 = VFMSUB231PHZm |
| 32912 | { 9188, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd68014829ULL }, // Inst #9188 = VFMSUB231PHZ256rkz |
| 32913 | { 9187, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dd68014829ULL }, // Inst #9187 = VFMSUB231PHZ256rk |
| 32914 | { 9186, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd68014829ULL }, // Inst #9186 = VFMSUB231PHZ256r |
| 32915 | { 9185, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd68014819ULL }, // Inst #9185 = VFMSUB231PHZ256mkz |
| 32916 | { 9184, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dd68014819ULL }, // Inst #9184 = VFMSUB231PHZ256mk |
| 32917 | { 9183, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57dd68014819ULL }, // Inst #9183 = VFMSUB231PHZ256mbkz |
| 32918 | { 9182, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53dd68014819ULL }, // Inst #9182 = VFMSUB231PHZ256mbk |
| 32919 | { 9181, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51dd68014819ULL }, // Inst #9181 = VFMSUB231PHZ256mb |
| 32920 | { 9180, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd68014819ULL }, // Inst #9180 = VFMSUB231PHZ256m |
| 32921 | { 9179, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd68014829ULL }, // Inst #9179 = VFMSUB231PHZ128rkz |
| 32922 | { 9178, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dd68014829ULL }, // Inst #9178 = VFMSUB231PHZ128rk |
| 32923 | { 9177, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd68014829ULL }, // Inst #9177 = VFMSUB231PHZ128r |
| 32924 | { 9176, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd68014819ULL }, // Inst #9176 = VFMSUB231PHZ128mkz |
| 32925 | { 9175, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dd68014819ULL }, // Inst #9175 = VFMSUB231PHZ128mk |
| 32926 | { 9174, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56dd68014819ULL }, // Inst #9174 = VFMSUB231PHZ128mbkz |
| 32927 | { 9173, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52dd68014819ULL }, // Inst #9173 = VFMSUB231PHZ128mbk |
| 32928 | { 9172, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50dd68014819ULL }, // Inst #9172 = VFMSUB231PHZ128mb |
| 32929 | { 9171, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd68014819ULL }, // Inst #9171 = VFMSUB231PHZ128m |
| 32930 | { 9170, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdd30024829ULL }, // Inst #9170 = VFMSUB231PDr |
| 32931 | { 9169, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdd30024819ULL }, // Inst #9169 = VFMSUB231PDm |
| 32932 | { 9168, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd70024829ULL }, // Inst #9168 = VFMSUB231PDZrkz |
| 32933 | { 9167, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadd70024829ULL }, // Inst #9167 = VFMSUB231PDZrk |
| 32934 | { 9166, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19edd70024829ULL }, // Inst #9166 = VFMSUB231PDZrbkz |
| 32935 | { 9165, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19add70024829ULL }, // Inst #9165 = VFMSUB231PDZrbk |
| 32936 | { 9164, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198dd70024829ULL }, // Inst #9164 = VFMSUB231PDZrb |
| 32937 | { 9163, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd70024829ULL }, // Inst #9163 = VFMSUB231PDZr |
| 32938 | { 9162, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedd70024819ULL }, // Inst #9162 = VFMSUB231PDZmkz |
| 32939 | { 9161, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadd70024819ULL }, // Inst #9161 = VFMSUB231PDZmk |
| 32940 | { 9160, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9edd70024819ULL }, // Inst #9160 = VFMSUB231PDZmbkz |
| 32941 | { 9159, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9add70024819ULL }, // Inst #9159 = VFMSUB231PDZmbk |
| 32942 | { 9158, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98dd70024819ULL }, // Inst #9158 = VFMSUB231PDZmb |
| 32943 | { 9157, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dd70024819ULL }, // Inst #9157 = VFMSUB231PDZm |
| 32944 | { 9156, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd70024829ULL }, // Inst #9156 = VFMSUB231PDZ256rkz |
| 32945 | { 9155, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dd70024829ULL }, // Inst #9155 = VFMSUB231PDZ256rk |
| 32946 | { 9154, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd70024829ULL }, // Inst #9154 = VFMSUB231PDZ256r |
| 32947 | { 9153, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dd70024819ULL }, // Inst #9153 = VFMSUB231PDZ256mkz |
| 32948 | { 9152, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dd70024819ULL }, // Inst #9152 = VFMSUB231PDZ256mk |
| 32949 | { 9151, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97dd70024819ULL }, // Inst #9151 = VFMSUB231PDZ256mbkz |
| 32950 | { 9150, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93dd70024819ULL }, // Inst #9150 = VFMSUB231PDZ256mbk |
| 32951 | { 9149, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91dd70024819ULL }, // Inst #9149 = VFMSUB231PDZ256mb |
| 32952 | { 9148, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dd70024819ULL }, // Inst #9148 = VFMSUB231PDZ256m |
| 32953 | { 9147, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd70024829ULL }, // Inst #9147 = VFMSUB231PDZ128rkz |
| 32954 | { 9146, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dd70024829ULL }, // Inst #9146 = VFMSUB231PDZ128rk |
| 32955 | { 9145, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd70024829ULL }, // Inst #9145 = VFMSUB231PDZ128r |
| 32956 | { 9144, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dd70024819ULL }, // Inst #9144 = VFMSUB231PDZ128mkz |
| 32957 | { 9143, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dd70024819ULL }, // Inst #9143 = VFMSUB231PDZ128mk |
| 32958 | { 9142, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96dd70024819ULL }, // Inst #9142 = VFMSUB231PDZ128mbkz |
| 32959 | { 9141, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92dd70024819ULL }, // Inst #9141 = VFMSUB231PDZ128mbk |
| 32960 | { 9140, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90dd70024819ULL }, // Inst #9140 = VFMSUB231PDZ128mb |
| 32961 | { 9139, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dd70024819ULL }, // Inst #9139 = VFMSUB231PDZ128m |
| 32962 | { 9138, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dd30024829ULL }, // Inst #9138 = VFMSUB231PDYr |
| 32963 | { 9137, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dd30024819ULL }, // Inst #9137 = VFMSUB231PDYm |
| 32964 | { 9136, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5a8004829ULL }, // Inst #9136 = VFMSUB213SSr_Int |
| 32965 | { 9135, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5a8004829ULL }, // Inst #9135 = VFMSUB213SSr |
| 32966 | { 9134, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5a8004819ULL }, // Inst #9134 = VFMSUB213SSm_Int |
| 32967 | { 9133, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5a8004819ULL }, // Inst #9133 = VFMSUB213SSm |
| 32968 | { 9132, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176d5e8004829ULL }, // Inst #9132 = VFMSUB213SSZrb_Intkz |
| 32969 | { 9131, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172d5e8004829ULL }, // Inst #9131 = VFMSUB213SSZrb_Intk |
| 32970 | { 9130, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170d5e8004829ULL }, // Inst #9130 = VFMSUB213SSZrb_Int |
| 32971 | { 9129, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170d5e8004829ULL }, // Inst #9129 = VFMSUB213SSZrb |
| 32972 | { 9128, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d5e8004829ULL }, // Inst #9128 = VFMSUB213SSZr_Intkz |
| 32973 | { 9127, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d5e8004829ULL }, // Inst #9127 = VFMSUB213SSZr_Intk |
| 32974 | { 9126, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d5e8004829ULL }, // Inst #9126 = VFMSUB213SSZr_Int |
| 32975 | { 9125, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d5e8004829ULL }, // Inst #9125 = VFMSUB213SSZr |
| 32976 | { 9124, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d5e8004819ULL }, // Inst #9124 = VFMSUB213SSZm_Intkz |
| 32977 | { 9123, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d5e8004819ULL }, // Inst #9123 = VFMSUB213SSZm_Intk |
| 32978 | { 9122, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d5e8004819ULL }, // Inst #9122 = VFMSUB213SSZm_Int |
| 32979 | { 9121, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d5e8004819ULL }, // Inst #9121 = VFMSUB213SSZm |
| 32980 | { 9120, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156d5e8014829ULL }, // Inst #9120 = VFMSUB213SHZrb_Intkz |
| 32981 | { 9119, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152d5e8014829ULL }, // Inst #9119 = VFMSUB213SHZrb_Intk |
| 32982 | { 9118, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150d5e8014829ULL }, // Inst #9118 = VFMSUB213SHZrb_Int |
| 32983 | { 9117, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150d5e8014829ULL }, // Inst #9117 = VFMSUB213SHZrb |
| 32984 | { 9116, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d5e8014829ULL }, // Inst #9116 = VFMSUB213SHZr_Intkz |
| 32985 | { 9115, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d5e8014829ULL }, // Inst #9115 = VFMSUB213SHZr_Intk |
| 32986 | { 9114, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d5e8014829ULL }, // Inst #9114 = VFMSUB213SHZr_Int |
| 32987 | { 9113, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d5e8014829ULL }, // Inst #9113 = VFMSUB213SHZr |
| 32988 | { 9112, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d5e8014819ULL }, // Inst #9112 = VFMSUB213SHZm_Intkz |
| 32989 | { 9111, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d5e8014819ULL }, // Inst #9111 = VFMSUB213SHZm_Intk |
| 32990 | { 9110, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d5e8014819ULL }, // Inst #9110 = VFMSUB213SHZm_Int |
| 32991 | { 9109, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d5e8014819ULL }, // Inst #9109 = VFMSUB213SHZm |
| 32992 | { 9108, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5b0024829ULL }, // Inst #9108 = VFMSUB213SDr_Int |
| 32993 | { 9107, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5b0024829ULL }, // Inst #9107 = VFMSUB213SDr |
| 32994 | { 9106, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5b0024819ULL }, // Inst #9106 = VFMSUB213SDm_Int |
| 32995 | { 9105, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd5b0024819ULL }, // Inst #9105 = VFMSUB213SDm |
| 32996 | { 9104, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196d5f0024829ULL }, // Inst #9104 = VFMSUB213SDZrb_Intkz |
| 32997 | { 9103, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192d5f0024829ULL }, // Inst #9103 = VFMSUB213SDZrb_Intk |
| 32998 | { 9102, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190d5f0024829ULL }, // Inst #9102 = VFMSUB213SDZrb_Int |
| 32999 | { 9101, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190d5f0024829ULL }, // Inst #9101 = VFMSUB213SDZrb |
| 33000 | { 9100, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d5f0024829ULL }, // Inst #9100 = VFMSUB213SDZr_Intkz |
| 33001 | { 9099, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d5f0024829ULL }, // Inst #9099 = VFMSUB213SDZr_Intk |
| 33002 | { 9098, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d5f0024829ULL }, // Inst #9098 = VFMSUB213SDZr_Int |
| 33003 | { 9097, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d5f0024829ULL }, // Inst #9097 = VFMSUB213SDZr |
| 33004 | { 9096, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d5f0024819ULL }, // Inst #9096 = VFMSUB213SDZm_Intkz |
| 33005 | { 9095, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d5f0024819ULL }, // Inst #9095 = VFMSUB213SDZm_Intk |
| 33006 | { 9094, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d5f0024819ULL }, // Inst #9094 = VFMSUB213SDZm_Int |
| 33007 | { 9093, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d5f0024819ULL }, // Inst #9093 = VFMSUB213SDZm |
| 33008 | { 9092, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd528004829ULL }, // Inst #9092 = VFMSUB213PSr |
| 33009 | { 9091, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd528004819ULL }, // Inst #9091 = VFMSUB213PSm |
| 33010 | { 9090, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed568004829ULL }, // Inst #9090 = VFMSUB213PSZrkz |
| 33011 | { 9089, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead568004829ULL }, // Inst #9089 = VFMSUB213PSZrk |
| 33012 | { 9088, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ed568004829ULL }, // Inst #9088 = VFMSUB213PSZrbkz |
| 33013 | { 9087, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ad568004829ULL }, // Inst #9087 = VFMSUB213PSZrbk |
| 33014 | { 9086, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178d568004829ULL }, // Inst #9086 = VFMSUB213PSZrb |
| 33015 | { 9085, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d568004829ULL }, // Inst #9085 = VFMSUB213PSZr |
| 33016 | { 9084, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed568004819ULL }, // Inst #9084 = VFMSUB213PSZmkz |
| 33017 | { 9083, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead568004819ULL }, // Inst #9083 = VFMSUB213PSZmk |
| 33018 | { 9082, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed568004819ULL }, // Inst #9082 = VFMSUB213PSZmbkz |
| 33019 | { 9081, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad568004819ULL }, // Inst #9081 = VFMSUB213PSZmbk |
| 33020 | { 9080, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d568004819ULL }, // Inst #9080 = VFMSUB213PSZmb |
| 33021 | { 9079, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d568004819ULL }, // Inst #9079 = VFMSUB213PSZm |
| 33022 | { 9078, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d568004829ULL }, // Inst #9078 = VFMSUB213PSZ256rkz |
| 33023 | { 9077, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d568004829ULL }, // Inst #9077 = VFMSUB213PSZ256rk |
| 33024 | { 9076, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d568004829ULL }, // Inst #9076 = VFMSUB213PSZ256r |
| 33025 | { 9075, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d568004819ULL }, // Inst #9075 = VFMSUB213PSZ256mkz |
| 33026 | { 9074, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d568004819ULL }, // Inst #9074 = VFMSUB213PSZ256mk |
| 33027 | { 9073, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d568004819ULL }, // Inst #9073 = VFMSUB213PSZ256mbkz |
| 33028 | { 9072, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d568004819ULL }, // Inst #9072 = VFMSUB213PSZ256mbk |
| 33029 | { 9071, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d568004819ULL }, // Inst #9071 = VFMSUB213PSZ256mb |
| 33030 | { 9070, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d568004819ULL }, // Inst #9070 = VFMSUB213PSZ256m |
| 33031 | { 9069, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d568004829ULL }, // Inst #9069 = VFMSUB213PSZ128rkz |
| 33032 | { 9068, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d568004829ULL }, // Inst #9068 = VFMSUB213PSZ128rk |
| 33033 | { 9067, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d568004829ULL }, // Inst #9067 = VFMSUB213PSZ128r |
| 33034 | { 9066, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d568004819ULL }, // Inst #9066 = VFMSUB213PSZ128mkz |
| 33035 | { 9065, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d568004819ULL }, // Inst #9065 = VFMSUB213PSZ128mk |
| 33036 | { 9064, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d568004819ULL }, // Inst #9064 = VFMSUB213PSZ128mbkz |
| 33037 | { 9063, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d568004819ULL }, // Inst #9063 = VFMSUB213PSZ128mbk |
| 33038 | { 9062, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d568004819ULL }, // Inst #9062 = VFMSUB213PSZ128mb |
| 33039 | { 9061, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d568004819ULL }, // Inst #9061 = VFMSUB213PSZ128m |
| 33040 | { 9060, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d528004829ULL }, // Inst #9060 = VFMSUB213PSYr |
| 33041 | { 9059, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d528004819ULL }, // Inst #9059 = VFMSUB213PSYm |
| 33042 | { 9058, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed568014829ULL }, // Inst #9058 = VFMSUB213PHZrkz |
| 33043 | { 9057, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead568014829ULL }, // Inst #9057 = VFMSUB213PHZrk |
| 33044 | { 9056, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ed568014829ULL }, // Inst #9056 = VFMSUB213PHZrbkz |
| 33045 | { 9055, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ad568014829ULL }, // Inst #9055 = VFMSUB213PHZrbk |
| 33046 | { 9054, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158d568014829ULL }, // Inst #9054 = VFMSUB213PHZrb |
| 33047 | { 9053, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d568014829ULL }, // Inst #9053 = VFMSUB213PHZr |
| 33048 | { 9052, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed568014819ULL }, // Inst #9052 = VFMSUB213PHZmkz |
| 33049 | { 9051, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead568014819ULL }, // Inst #9051 = VFMSUB213PHZmk |
| 33050 | { 9050, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed568014819ULL }, // Inst #9050 = VFMSUB213PHZmbkz |
| 33051 | { 9049, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad568014819ULL }, // Inst #9049 = VFMSUB213PHZmbk |
| 33052 | { 9048, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d568014819ULL }, // Inst #9048 = VFMSUB213PHZmb |
| 33053 | { 9047, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d568014819ULL }, // Inst #9047 = VFMSUB213PHZm |
| 33054 | { 9046, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d568014829ULL }, // Inst #9046 = VFMSUB213PHZ256rkz |
| 33055 | { 9045, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d568014829ULL }, // Inst #9045 = VFMSUB213PHZ256rk |
| 33056 | { 9044, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d568014829ULL }, // Inst #9044 = VFMSUB213PHZ256r |
| 33057 | { 9043, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d568014819ULL }, // Inst #9043 = VFMSUB213PHZ256mkz |
| 33058 | { 9042, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d568014819ULL }, // Inst #9042 = VFMSUB213PHZ256mk |
| 33059 | { 9041, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d568014819ULL }, // Inst #9041 = VFMSUB213PHZ256mbkz |
| 33060 | { 9040, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d568014819ULL }, // Inst #9040 = VFMSUB213PHZ256mbk |
| 33061 | { 9039, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d568014819ULL }, // Inst #9039 = VFMSUB213PHZ256mb |
| 33062 | { 9038, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d568014819ULL }, // Inst #9038 = VFMSUB213PHZ256m |
| 33063 | { 9037, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d568014829ULL }, // Inst #9037 = VFMSUB213PHZ128rkz |
| 33064 | { 9036, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d568014829ULL }, // Inst #9036 = VFMSUB213PHZ128rk |
| 33065 | { 9035, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d568014829ULL }, // Inst #9035 = VFMSUB213PHZ128r |
| 33066 | { 9034, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d568014819ULL }, // Inst #9034 = VFMSUB213PHZ128mkz |
| 33067 | { 9033, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d568014819ULL }, // Inst #9033 = VFMSUB213PHZ128mk |
| 33068 | { 9032, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d568014819ULL }, // Inst #9032 = VFMSUB213PHZ128mbkz |
| 33069 | { 9031, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d568014819ULL }, // Inst #9031 = VFMSUB213PHZ128mbk |
| 33070 | { 9030, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d568014819ULL }, // Inst #9030 = VFMSUB213PHZ128mb |
| 33071 | { 9029, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d568014819ULL }, // Inst #9029 = VFMSUB213PHZ128m |
| 33072 | { 9028, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd530024829ULL }, // Inst #9028 = VFMSUB213PDr |
| 33073 | { 9027, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd530024819ULL }, // Inst #9027 = VFMSUB213PDm |
| 33074 | { 9026, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed570024829ULL }, // Inst #9026 = VFMSUB213PDZrkz |
| 33075 | { 9025, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead570024829ULL }, // Inst #9025 = VFMSUB213PDZrk |
| 33076 | { 9024, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ed570024829ULL }, // Inst #9024 = VFMSUB213PDZrbkz |
| 33077 | { 9023, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ad570024829ULL }, // Inst #9023 = VFMSUB213PDZrbk |
| 33078 | { 9022, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198d570024829ULL }, // Inst #9022 = VFMSUB213PDZrb |
| 33079 | { 9021, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d570024829ULL }, // Inst #9021 = VFMSUB213PDZr |
| 33080 | { 9020, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed570024819ULL }, // Inst #9020 = VFMSUB213PDZmkz |
| 33081 | { 9019, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead570024819ULL }, // Inst #9019 = VFMSUB213PDZmk |
| 33082 | { 9018, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed570024819ULL }, // Inst #9018 = VFMSUB213PDZmbkz |
| 33083 | { 9017, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad570024819ULL }, // Inst #9017 = VFMSUB213PDZmbk |
| 33084 | { 9016, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d570024819ULL }, // Inst #9016 = VFMSUB213PDZmb |
| 33085 | { 9015, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d570024819ULL }, // Inst #9015 = VFMSUB213PDZm |
| 33086 | { 9014, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d570024829ULL }, // Inst #9014 = VFMSUB213PDZ256rkz |
| 33087 | { 9013, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d570024829ULL }, // Inst #9013 = VFMSUB213PDZ256rk |
| 33088 | { 9012, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d570024829ULL }, // Inst #9012 = VFMSUB213PDZ256r |
| 33089 | { 9011, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d570024819ULL }, // Inst #9011 = VFMSUB213PDZ256mkz |
| 33090 | { 9010, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d570024819ULL }, // Inst #9010 = VFMSUB213PDZ256mk |
| 33091 | { 9009, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d570024819ULL }, // Inst #9009 = VFMSUB213PDZ256mbkz |
| 33092 | { 9008, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d570024819ULL }, // Inst #9008 = VFMSUB213PDZ256mbk |
| 33093 | { 9007, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d570024819ULL }, // Inst #9007 = VFMSUB213PDZ256mb |
| 33094 | { 9006, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d570024819ULL }, // Inst #9006 = VFMSUB213PDZ256m |
| 33095 | { 9005, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d570024829ULL }, // Inst #9005 = VFMSUB213PDZ128rkz |
| 33096 | { 9004, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d570024829ULL }, // Inst #9004 = VFMSUB213PDZ128rk |
| 33097 | { 9003, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d570024829ULL }, // Inst #9003 = VFMSUB213PDZ128r |
| 33098 | { 9002, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d570024819ULL }, // Inst #9002 = VFMSUB213PDZ128mkz |
| 33099 | { 9001, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d570024819ULL }, // Inst #9001 = VFMSUB213PDZ128mk |
| 33100 | { 9000, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d570024819ULL }, // Inst #9000 = VFMSUB213PDZ128mbkz |
| 33101 | { 8999, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d570024819ULL }, // Inst #8999 = VFMSUB213PDZ128mbk |
| 33102 | { 8998, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d570024819ULL }, // Inst #8998 = VFMSUB213PDZ128mb |
| 33103 | { 8997, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d570024819ULL }, // Inst #8997 = VFMSUB213PDZ128m |
| 33104 | { 8996, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d530024829ULL }, // Inst #8996 = VFMSUB213PDYr |
| 33105 | { 8995, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d530024819ULL }, // Inst #8995 = VFMSUB213PDYm |
| 33106 | { 8994, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcda8004829ULL }, // Inst #8994 = VFMSUB132SSr_Int |
| 33107 | { 8993, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcda8004829ULL }, // Inst #8993 = VFMSUB132SSr |
| 33108 | { 8992, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcda8004819ULL }, // Inst #8992 = VFMSUB132SSm_Int |
| 33109 | { 8991, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcda8004819ULL }, // Inst #8991 = VFMSUB132SSm |
| 33110 | { 8990, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176cde8004829ULL }, // Inst #8990 = VFMSUB132SSZrb_Intkz |
| 33111 | { 8989, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172cde8004829ULL }, // Inst #8989 = VFMSUB132SSZrb_Intk |
| 33112 | { 8988, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170cde8004829ULL }, // Inst #8988 = VFMSUB132SSZrb_Int |
| 33113 | { 8987, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170cde8004829ULL }, // Inst #8987 = VFMSUB132SSZrb |
| 33114 | { 8986, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cde8004829ULL }, // Inst #8986 = VFMSUB132SSZr_Intkz |
| 33115 | { 8985, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cde8004829ULL }, // Inst #8985 = VFMSUB132SSZr_Intk |
| 33116 | { 8984, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cde8004829ULL }, // Inst #8984 = VFMSUB132SSZr_Int |
| 33117 | { 8983, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cde8004829ULL }, // Inst #8983 = VFMSUB132SSZr |
| 33118 | { 8982, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cde8004819ULL }, // Inst #8982 = VFMSUB132SSZm_Intkz |
| 33119 | { 8981, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cde8004819ULL }, // Inst #8981 = VFMSUB132SSZm_Intk |
| 33120 | { 8980, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cde8004819ULL }, // Inst #8980 = VFMSUB132SSZm_Int |
| 33121 | { 8979, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cde8004819ULL }, // Inst #8979 = VFMSUB132SSZm |
| 33122 | { 8978, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156cde8014829ULL }, // Inst #8978 = VFMSUB132SHZrb_Intkz |
| 33123 | { 8977, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152cde8014829ULL }, // Inst #8977 = VFMSUB132SHZrb_Intk |
| 33124 | { 8976, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150cde8014829ULL }, // Inst #8976 = VFMSUB132SHZrb_Int |
| 33125 | { 8975, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150cde8014829ULL }, // Inst #8975 = VFMSUB132SHZrb |
| 33126 | { 8974, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cde8014829ULL }, // Inst #8974 = VFMSUB132SHZr_Intkz |
| 33127 | { 8973, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cde8014829ULL }, // Inst #8973 = VFMSUB132SHZr_Intk |
| 33128 | { 8972, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cde8014829ULL }, // Inst #8972 = VFMSUB132SHZr_Int |
| 33129 | { 8971, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cde8014829ULL }, // Inst #8971 = VFMSUB132SHZr |
| 33130 | { 8970, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cde8014819ULL }, // Inst #8970 = VFMSUB132SHZm_Intkz |
| 33131 | { 8969, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cde8014819ULL }, // Inst #8969 = VFMSUB132SHZm_Intk |
| 33132 | { 8968, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cde8014819ULL }, // Inst #8968 = VFMSUB132SHZm_Int |
| 33133 | { 8967, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cde8014819ULL }, // Inst #8967 = VFMSUB132SHZm |
| 33134 | { 8966, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcdb0024829ULL }, // Inst #8966 = VFMSUB132SDr_Int |
| 33135 | { 8965, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcdb0024829ULL }, // Inst #8965 = VFMSUB132SDr |
| 33136 | { 8964, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcdb0024819ULL }, // Inst #8964 = VFMSUB132SDm_Int |
| 33137 | { 8963, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcdb0024819ULL }, // Inst #8963 = VFMSUB132SDm |
| 33138 | { 8962, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196cdf0024829ULL }, // Inst #8962 = VFMSUB132SDZrb_Intkz |
| 33139 | { 8961, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192cdf0024829ULL }, // Inst #8961 = VFMSUB132SDZrb_Intk |
| 33140 | { 8960, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190cdf0024829ULL }, // Inst #8960 = VFMSUB132SDZrb_Int |
| 33141 | { 8959, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190cdf0024829ULL }, // Inst #8959 = VFMSUB132SDZrb |
| 33142 | { 8958, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cdf0024829ULL }, // Inst #8958 = VFMSUB132SDZr_Intkz |
| 33143 | { 8957, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cdf0024829ULL }, // Inst #8957 = VFMSUB132SDZr_Intk |
| 33144 | { 8956, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cdf0024829ULL }, // Inst #8956 = VFMSUB132SDZr_Int |
| 33145 | { 8955, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cdf0024829ULL }, // Inst #8955 = VFMSUB132SDZr |
| 33146 | { 8954, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86cdf0024819ULL }, // Inst #8954 = VFMSUB132SDZm_Intkz |
| 33147 | { 8953, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82cdf0024819ULL }, // Inst #8953 = VFMSUB132SDZm_Intk |
| 33148 | { 8952, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cdf0024819ULL }, // Inst #8952 = VFMSUB132SDZm_Int |
| 33149 | { 8951, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80cdf0024819ULL }, // Inst #8951 = VFMSUB132SDZm |
| 33150 | { 8950, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcd28004829ULL }, // Inst #8950 = VFMSUB132PSr |
| 33151 | { 8949, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcd28004819ULL }, // Inst #8949 = VFMSUB132PSm |
| 33152 | { 8948, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd68004829ULL }, // Inst #8948 = VFMSUB132PSZrkz |
| 33153 | { 8947, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacd68004829ULL }, // Inst #8947 = VFMSUB132PSZrk |
| 33154 | { 8946, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ecd68004829ULL }, // Inst #8946 = VFMSUB132PSZrbkz |
| 33155 | { 8945, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17acd68004829ULL }, // Inst #8945 = VFMSUB132PSZrbk |
| 33156 | { 8944, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178cd68004829ULL }, // Inst #8944 = VFMSUB132PSZrb |
| 33157 | { 8943, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd68004829ULL }, // Inst #8943 = VFMSUB132PSZr |
| 33158 | { 8942, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd68004819ULL }, // Inst #8942 = VFMSUB132PSZmkz |
| 33159 | { 8941, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacd68004819ULL }, // Inst #8941 = VFMSUB132PSZmk |
| 33160 | { 8940, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ecd68004819ULL }, // Inst #8940 = VFMSUB132PSZmbkz |
| 33161 | { 8939, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7acd68004819ULL }, // Inst #8939 = VFMSUB132PSZmbk |
| 33162 | { 8938, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78cd68004819ULL }, // Inst #8938 = VFMSUB132PSZmb |
| 33163 | { 8937, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd68004819ULL }, // Inst #8937 = VFMSUB132PSZm |
| 33164 | { 8936, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd68004829ULL }, // Inst #8936 = VFMSUB132PSZ256rkz |
| 33165 | { 8935, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cd68004829ULL }, // Inst #8935 = VFMSUB132PSZ256rk |
| 33166 | { 8934, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd68004829ULL }, // Inst #8934 = VFMSUB132PSZ256r |
| 33167 | { 8933, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd68004819ULL }, // Inst #8933 = VFMSUB132PSZ256mkz |
| 33168 | { 8932, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cd68004819ULL }, // Inst #8932 = VFMSUB132PSZ256mk |
| 33169 | { 8931, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77cd68004819ULL }, // Inst #8931 = VFMSUB132PSZ256mbkz |
| 33170 | { 8930, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73cd68004819ULL }, // Inst #8930 = VFMSUB132PSZ256mbk |
| 33171 | { 8929, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71cd68004819ULL }, // Inst #8929 = VFMSUB132PSZ256mb |
| 33172 | { 8928, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd68004819ULL }, // Inst #8928 = VFMSUB132PSZ256m |
| 33173 | { 8927, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd68004829ULL }, // Inst #8927 = VFMSUB132PSZ128rkz |
| 33174 | { 8926, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cd68004829ULL }, // Inst #8926 = VFMSUB132PSZ128rk |
| 33175 | { 8925, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd68004829ULL }, // Inst #8925 = VFMSUB132PSZ128r |
| 33176 | { 8924, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd68004819ULL }, // Inst #8924 = VFMSUB132PSZ128mkz |
| 33177 | { 8923, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cd68004819ULL }, // Inst #8923 = VFMSUB132PSZ128mk |
| 33178 | { 8922, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76cd68004819ULL }, // Inst #8922 = VFMSUB132PSZ128mbkz |
| 33179 | { 8921, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72cd68004819ULL }, // Inst #8921 = VFMSUB132PSZ128mbk |
| 33180 | { 8920, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70cd68004819ULL }, // Inst #8920 = VFMSUB132PSZ128mb |
| 33181 | { 8919, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd68004819ULL }, // Inst #8919 = VFMSUB132PSZ128m |
| 33182 | { 8918, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cd28004829ULL }, // Inst #8918 = VFMSUB132PSYr |
| 33183 | { 8917, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cd28004819ULL }, // Inst #8917 = VFMSUB132PSYm |
| 33184 | { 8916, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd68014829ULL }, // Inst #8916 = VFMSUB132PHZrkz |
| 33185 | { 8915, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacd68014829ULL }, // Inst #8915 = VFMSUB132PHZrk |
| 33186 | { 8914, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ecd68014829ULL }, // Inst #8914 = VFMSUB132PHZrbkz |
| 33187 | { 8913, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15acd68014829ULL }, // Inst #8913 = VFMSUB132PHZrbk |
| 33188 | { 8912, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158cd68014829ULL }, // Inst #8912 = VFMSUB132PHZrb |
| 33189 | { 8911, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd68014829ULL }, // Inst #8911 = VFMSUB132PHZr |
| 33190 | { 8910, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd68014819ULL }, // Inst #8910 = VFMSUB132PHZmkz |
| 33191 | { 8909, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacd68014819ULL }, // Inst #8909 = VFMSUB132PHZmk |
| 33192 | { 8908, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ecd68014819ULL }, // Inst #8908 = VFMSUB132PHZmbkz |
| 33193 | { 8907, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5acd68014819ULL }, // Inst #8907 = VFMSUB132PHZmbk |
| 33194 | { 8906, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58cd68014819ULL }, // Inst #8906 = VFMSUB132PHZmb |
| 33195 | { 8905, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd68014819ULL }, // Inst #8905 = VFMSUB132PHZm |
| 33196 | { 8904, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd68014829ULL }, // Inst #8904 = VFMSUB132PHZ256rkz |
| 33197 | { 8903, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cd68014829ULL }, // Inst #8903 = VFMSUB132PHZ256rk |
| 33198 | { 8902, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd68014829ULL }, // Inst #8902 = VFMSUB132PHZ256r |
| 33199 | { 8901, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd68014819ULL }, // Inst #8901 = VFMSUB132PHZ256mkz |
| 33200 | { 8900, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cd68014819ULL }, // Inst #8900 = VFMSUB132PHZ256mk |
| 33201 | { 8899, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57cd68014819ULL }, // Inst #8899 = VFMSUB132PHZ256mbkz |
| 33202 | { 8898, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53cd68014819ULL }, // Inst #8898 = VFMSUB132PHZ256mbk |
| 33203 | { 8897, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51cd68014819ULL }, // Inst #8897 = VFMSUB132PHZ256mb |
| 33204 | { 8896, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd68014819ULL }, // Inst #8896 = VFMSUB132PHZ256m |
| 33205 | { 8895, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd68014829ULL }, // Inst #8895 = VFMSUB132PHZ128rkz |
| 33206 | { 8894, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cd68014829ULL }, // Inst #8894 = VFMSUB132PHZ128rk |
| 33207 | { 8893, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd68014829ULL }, // Inst #8893 = VFMSUB132PHZ128r |
| 33208 | { 8892, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd68014819ULL }, // Inst #8892 = VFMSUB132PHZ128mkz |
| 33209 | { 8891, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cd68014819ULL }, // Inst #8891 = VFMSUB132PHZ128mk |
| 33210 | { 8890, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56cd68014819ULL }, // Inst #8890 = VFMSUB132PHZ128mbkz |
| 33211 | { 8889, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52cd68014819ULL }, // Inst #8889 = VFMSUB132PHZ128mbk |
| 33212 | { 8888, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50cd68014819ULL }, // Inst #8888 = VFMSUB132PHZ128mb |
| 33213 | { 8887, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd68014819ULL }, // Inst #8887 = VFMSUB132PHZ128m |
| 33214 | { 8886, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcd30024829ULL }, // Inst #8886 = VFMSUB132PDr |
| 33215 | { 8885, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcd30024819ULL }, // Inst #8885 = VFMSUB132PDm |
| 33216 | { 8884, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd70024829ULL }, // Inst #8884 = VFMSUB132PDZrkz |
| 33217 | { 8883, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacd70024829ULL }, // Inst #8883 = VFMSUB132PDZrk |
| 33218 | { 8882, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ecd70024829ULL }, // Inst #8882 = VFMSUB132PDZrbkz |
| 33219 | { 8881, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19acd70024829ULL }, // Inst #8881 = VFMSUB132PDZrbk |
| 33220 | { 8880, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198cd70024829ULL }, // Inst #8880 = VFMSUB132PDZrb |
| 33221 | { 8879, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd70024829ULL }, // Inst #8879 = VFMSUB132PDZr |
| 33222 | { 8878, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecd70024819ULL }, // Inst #8878 = VFMSUB132PDZmkz |
| 33223 | { 8877, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacd70024819ULL }, // Inst #8877 = VFMSUB132PDZmk |
| 33224 | { 8876, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ecd70024819ULL }, // Inst #8876 = VFMSUB132PDZmbkz |
| 33225 | { 8875, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9acd70024819ULL }, // Inst #8875 = VFMSUB132PDZmbk |
| 33226 | { 8874, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98cd70024819ULL }, // Inst #8874 = VFMSUB132PDZmb |
| 33227 | { 8873, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cd70024819ULL }, // Inst #8873 = VFMSUB132PDZm |
| 33228 | { 8872, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd70024829ULL }, // Inst #8872 = VFMSUB132PDZ256rkz |
| 33229 | { 8871, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cd70024829ULL }, // Inst #8871 = VFMSUB132PDZ256rk |
| 33230 | { 8870, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd70024829ULL }, // Inst #8870 = VFMSUB132PDZ256r |
| 33231 | { 8869, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cd70024819ULL }, // Inst #8869 = VFMSUB132PDZ256mkz |
| 33232 | { 8868, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cd70024819ULL }, // Inst #8868 = VFMSUB132PDZ256mk |
| 33233 | { 8867, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97cd70024819ULL }, // Inst #8867 = VFMSUB132PDZ256mbkz |
| 33234 | { 8866, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93cd70024819ULL }, // Inst #8866 = VFMSUB132PDZ256mbk |
| 33235 | { 8865, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91cd70024819ULL }, // Inst #8865 = VFMSUB132PDZ256mb |
| 33236 | { 8864, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cd70024819ULL }, // Inst #8864 = VFMSUB132PDZ256m |
| 33237 | { 8863, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd70024829ULL }, // Inst #8863 = VFMSUB132PDZ128rkz |
| 33238 | { 8862, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cd70024829ULL }, // Inst #8862 = VFMSUB132PDZ128rk |
| 33239 | { 8861, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd70024829ULL }, // Inst #8861 = VFMSUB132PDZ128r |
| 33240 | { 8860, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cd70024819ULL }, // Inst #8860 = VFMSUB132PDZ128mkz |
| 33241 | { 8859, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cd70024819ULL }, // Inst #8859 = VFMSUB132PDZ128mk |
| 33242 | { 8858, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96cd70024819ULL }, // Inst #8858 = VFMSUB132PDZ128mbkz |
| 33243 | { 8857, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92cd70024819ULL }, // Inst #8857 = VFMSUB132PDZ128mbk |
| 33244 | { 8856, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90cd70024819ULL }, // Inst #8856 = VFMSUB132PDZ128mb |
| 33245 | { 8855, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cd70024819ULL }, // Inst #8855 = VFMSUB132PDZ128m |
| 33246 | { 8854, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cd30024829ULL }, // Inst #8854 = VFMSUB132PDYr |
| 33247 | { 8853, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cd30024819ULL }, // Inst #8853 = VFMSUB132PDYm |
| 33248 | { 8852, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xae280c6829ULL }, // Inst #8852 = VFMADDSUBPS4rr_REV |
| 33249 | { 8851, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xae280e682bULL }, // Inst #8851 = VFMADDSUBPS4rr |
| 33250 | { 8850, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae280e681bULL }, // Inst #8850 = VFMADDSUBPS4rm |
| 33251 | { 8849, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae280c6819ULL }, // Inst #8849 = VFMADDSUBPS4mr |
| 33252 | { 8848, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1ae280c6829ULL }, // Inst #8848 = VFMADDSUBPS4Yrr_REV |
| 33253 | { 8847, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ae280e682bULL }, // Inst #8847 = VFMADDSUBPS4Yrr |
| 33254 | { 8846, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ae280e681bULL }, // Inst #8846 = VFMADDSUBPS4Yrm |
| 33255 | { 8845, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ae280c6819ULL }, // Inst #8845 = VFMADDSUBPS4Ymr |
| 33256 | { 8844, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xaeb00c6829ULL }, // Inst #8844 = VFMADDSUBPD4rr_REV |
| 33257 | { 8843, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xaeb00e682bULL }, // Inst #8843 = VFMADDSUBPD4rr |
| 33258 | { 8842, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb00e681bULL }, // Inst #8842 = VFMADDSUBPD4rm |
| 33259 | { 8841, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaeb00c6819ULL }, // Inst #8841 = VFMADDSUBPD4mr |
| 33260 | { 8840, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1aeb00c6829ULL }, // Inst #8840 = VFMADDSUBPD4Yrr_REV |
| 33261 | { 8839, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1aeb00e682bULL }, // Inst #8839 = VFMADDSUBPD4Yrr |
| 33262 | { 8838, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aeb00e681bULL }, // Inst #8838 = VFMADDSUBPD4Yrm |
| 33263 | { 8837, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1aeb00c6819ULL }, // Inst #8837 = VFMADDSUBPD4Ymr |
| 33264 | { 8836, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdb28004829ULL }, // Inst #8836 = VFMADDSUB231PSr |
| 33265 | { 8835, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdb28004819ULL }, // Inst #8835 = VFMADDSUB231PSm |
| 33266 | { 8834, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb68004829ULL }, // Inst #8834 = VFMADDSUB231PSZrkz |
| 33267 | { 8833, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadb68004829ULL }, // Inst #8833 = VFMADDSUB231PSZrk |
| 33268 | { 8832, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17edb68004829ULL }, // Inst #8832 = VFMADDSUB231PSZrbkz |
| 33269 | { 8831, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17adb68004829ULL }, // Inst #8831 = VFMADDSUB231PSZrbk |
| 33270 | { 8830, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178db68004829ULL }, // Inst #8830 = VFMADDSUB231PSZrb |
| 33271 | { 8829, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db68004829ULL }, // Inst #8829 = VFMADDSUB231PSZr |
| 33272 | { 8828, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb68004819ULL }, // Inst #8828 = VFMADDSUB231PSZmkz |
| 33273 | { 8827, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadb68004819ULL }, // Inst #8827 = VFMADDSUB231PSZmk |
| 33274 | { 8826, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7edb68004819ULL }, // Inst #8826 = VFMADDSUB231PSZmbkz |
| 33275 | { 8825, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7adb68004819ULL }, // Inst #8825 = VFMADDSUB231PSZmbk |
| 33276 | { 8824, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78db68004819ULL }, // Inst #8824 = VFMADDSUB231PSZmb |
| 33277 | { 8823, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db68004819ULL }, // Inst #8823 = VFMADDSUB231PSZm |
| 33278 | { 8822, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db68004829ULL }, // Inst #8822 = VFMADDSUB231PSZ256rkz |
| 33279 | { 8821, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3db68004829ULL }, // Inst #8821 = VFMADDSUB231PSZ256rk |
| 33280 | { 8820, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db68004829ULL }, // Inst #8820 = VFMADDSUB231PSZ256r |
| 33281 | { 8819, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db68004819ULL }, // Inst #8819 = VFMADDSUB231PSZ256mkz |
| 33282 | { 8818, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3db68004819ULL }, // Inst #8818 = VFMADDSUB231PSZ256mk |
| 33283 | { 8817, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77db68004819ULL }, // Inst #8817 = VFMADDSUB231PSZ256mbkz |
| 33284 | { 8816, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73db68004819ULL }, // Inst #8816 = VFMADDSUB231PSZ256mbk |
| 33285 | { 8815, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71db68004819ULL }, // Inst #8815 = VFMADDSUB231PSZ256mb |
| 33286 | { 8814, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db68004819ULL }, // Inst #8814 = VFMADDSUB231PSZ256m |
| 33287 | { 8813, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db68004829ULL }, // Inst #8813 = VFMADDSUB231PSZ128rkz |
| 33288 | { 8812, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2db68004829ULL }, // Inst #8812 = VFMADDSUB231PSZ128rk |
| 33289 | { 8811, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db68004829ULL }, // Inst #8811 = VFMADDSUB231PSZ128r |
| 33290 | { 8810, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db68004819ULL }, // Inst #8810 = VFMADDSUB231PSZ128mkz |
| 33291 | { 8809, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2db68004819ULL }, // Inst #8809 = VFMADDSUB231PSZ128mk |
| 33292 | { 8808, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76db68004819ULL }, // Inst #8808 = VFMADDSUB231PSZ128mbkz |
| 33293 | { 8807, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72db68004819ULL }, // Inst #8807 = VFMADDSUB231PSZ128mbk |
| 33294 | { 8806, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70db68004819ULL }, // Inst #8806 = VFMADDSUB231PSZ128mb |
| 33295 | { 8805, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db68004819ULL }, // Inst #8805 = VFMADDSUB231PSZ128m |
| 33296 | { 8804, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1db28004829ULL }, // Inst #8804 = VFMADDSUB231PSYr |
| 33297 | { 8803, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1db28004819ULL }, // Inst #8803 = VFMADDSUB231PSYm |
| 33298 | { 8802, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb68014829ULL }, // Inst #8802 = VFMADDSUB231PHZrkz |
| 33299 | { 8801, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadb68014829ULL }, // Inst #8801 = VFMADDSUB231PHZrk |
| 33300 | { 8800, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15edb68014829ULL }, // Inst #8800 = VFMADDSUB231PHZrbkz |
| 33301 | { 8799, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15adb68014829ULL }, // Inst #8799 = VFMADDSUB231PHZrbk |
| 33302 | { 8798, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158db68014829ULL }, // Inst #8798 = VFMADDSUB231PHZrb |
| 33303 | { 8797, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db68014829ULL }, // Inst #8797 = VFMADDSUB231PHZr |
| 33304 | { 8796, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb68014819ULL }, // Inst #8796 = VFMADDSUB231PHZmkz |
| 33305 | { 8795, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadb68014819ULL }, // Inst #8795 = VFMADDSUB231PHZmk |
| 33306 | { 8794, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5edb68014819ULL }, // Inst #8794 = VFMADDSUB231PHZmbkz |
| 33307 | { 8793, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5adb68014819ULL }, // Inst #8793 = VFMADDSUB231PHZmbk |
| 33308 | { 8792, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58db68014819ULL }, // Inst #8792 = VFMADDSUB231PHZmb |
| 33309 | { 8791, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db68014819ULL }, // Inst #8791 = VFMADDSUB231PHZm |
| 33310 | { 8790, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db68014829ULL }, // Inst #8790 = VFMADDSUB231PHZ256rkz |
| 33311 | { 8789, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3db68014829ULL }, // Inst #8789 = VFMADDSUB231PHZ256rk |
| 33312 | { 8788, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db68014829ULL }, // Inst #8788 = VFMADDSUB231PHZ256r |
| 33313 | { 8787, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db68014819ULL }, // Inst #8787 = VFMADDSUB231PHZ256mkz |
| 33314 | { 8786, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3db68014819ULL }, // Inst #8786 = VFMADDSUB231PHZ256mk |
| 33315 | { 8785, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57db68014819ULL }, // Inst #8785 = VFMADDSUB231PHZ256mbkz |
| 33316 | { 8784, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53db68014819ULL }, // Inst #8784 = VFMADDSUB231PHZ256mbk |
| 33317 | { 8783, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51db68014819ULL }, // Inst #8783 = VFMADDSUB231PHZ256mb |
| 33318 | { 8782, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db68014819ULL }, // Inst #8782 = VFMADDSUB231PHZ256m |
| 33319 | { 8781, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db68014829ULL }, // Inst #8781 = VFMADDSUB231PHZ128rkz |
| 33320 | { 8780, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2db68014829ULL }, // Inst #8780 = VFMADDSUB231PHZ128rk |
| 33321 | { 8779, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db68014829ULL }, // Inst #8779 = VFMADDSUB231PHZ128r |
| 33322 | { 8778, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db68014819ULL }, // Inst #8778 = VFMADDSUB231PHZ128mkz |
| 33323 | { 8777, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2db68014819ULL }, // Inst #8777 = VFMADDSUB231PHZ128mk |
| 33324 | { 8776, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56db68014819ULL }, // Inst #8776 = VFMADDSUB231PHZ128mbkz |
| 33325 | { 8775, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52db68014819ULL }, // Inst #8775 = VFMADDSUB231PHZ128mbk |
| 33326 | { 8774, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50db68014819ULL }, // Inst #8774 = VFMADDSUB231PHZ128mb |
| 33327 | { 8773, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db68014819ULL }, // Inst #8773 = VFMADDSUB231PHZ128m |
| 33328 | { 8772, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdb30024829ULL }, // Inst #8772 = VFMADDSUB231PDr |
| 33329 | { 8771, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdb30024819ULL }, // Inst #8771 = VFMADDSUB231PDm |
| 33330 | { 8770, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb70024829ULL }, // Inst #8770 = VFMADDSUB231PDZrkz |
| 33331 | { 8769, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadb70024829ULL }, // Inst #8769 = VFMADDSUB231PDZrk |
| 33332 | { 8768, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19edb70024829ULL }, // Inst #8768 = VFMADDSUB231PDZrbkz |
| 33333 | { 8767, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19adb70024829ULL }, // Inst #8767 = VFMADDSUB231PDZrbk |
| 33334 | { 8766, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198db70024829ULL }, // Inst #8766 = VFMADDSUB231PDZrb |
| 33335 | { 8765, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db70024829ULL }, // Inst #8765 = VFMADDSUB231PDZr |
| 33336 | { 8764, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedb70024819ULL }, // Inst #8764 = VFMADDSUB231PDZmkz |
| 33337 | { 8763, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadb70024819ULL }, // Inst #8763 = VFMADDSUB231PDZmk |
| 33338 | { 8762, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9edb70024819ULL }, // Inst #8762 = VFMADDSUB231PDZmbkz |
| 33339 | { 8761, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9adb70024819ULL }, // Inst #8761 = VFMADDSUB231PDZmbk |
| 33340 | { 8760, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98db70024819ULL }, // Inst #8760 = VFMADDSUB231PDZmb |
| 33341 | { 8759, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8db70024819ULL }, // Inst #8759 = VFMADDSUB231PDZm |
| 33342 | { 8758, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db70024829ULL }, // Inst #8758 = VFMADDSUB231PDZ256rkz |
| 33343 | { 8757, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3db70024829ULL }, // Inst #8757 = VFMADDSUB231PDZ256rk |
| 33344 | { 8756, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db70024829ULL }, // Inst #8756 = VFMADDSUB231PDZ256r |
| 33345 | { 8755, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7db70024819ULL }, // Inst #8755 = VFMADDSUB231PDZ256mkz |
| 33346 | { 8754, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3db70024819ULL }, // Inst #8754 = VFMADDSUB231PDZ256mk |
| 33347 | { 8753, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97db70024819ULL }, // Inst #8753 = VFMADDSUB231PDZ256mbkz |
| 33348 | { 8752, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93db70024819ULL }, // Inst #8752 = VFMADDSUB231PDZ256mbk |
| 33349 | { 8751, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91db70024819ULL }, // Inst #8751 = VFMADDSUB231PDZ256mb |
| 33350 | { 8750, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1db70024819ULL }, // Inst #8750 = VFMADDSUB231PDZ256m |
| 33351 | { 8749, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db70024829ULL }, // Inst #8749 = VFMADDSUB231PDZ128rkz |
| 33352 | { 8748, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2db70024829ULL }, // Inst #8748 = VFMADDSUB231PDZ128rk |
| 33353 | { 8747, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db70024829ULL }, // Inst #8747 = VFMADDSUB231PDZ128r |
| 33354 | { 8746, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6db70024819ULL }, // Inst #8746 = VFMADDSUB231PDZ128mkz |
| 33355 | { 8745, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2db70024819ULL }, // Inst #8745 = VFMADDSUB231PDZ128mk |
| 33356 | { 8744, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96db70024819ULL }, // Inst #8744 = VFMADDSUB231PDZ128mbkz |
| 33357 | { 8743, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92db70024819ULL }, // Inst #8743 = VFMADDSUB231PDZ128mbk |
| 33358 | { 8742, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90db70024819ULL }, // Inst #8742 = VFMADDSUB231PDZ128mb |
| 33359 | { 8741, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0db70024819ULL }, // Inst #8741 = VFMADDSUB231PDZ128m |
| 33360 | { 8740, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1db30024829ULL }, // Inst #8740 = VFMADDSUB231PDYr |
| 33361 | { 8739, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1db30024819ULL }, // Inst #8739 = VFMADDSUB231PDYm |
| 33362 | { 8738, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd328004829ULL }, // Inst #8738 = VFMADDSUB213PSr |
| 33363 | { 8737, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd328004819ULL }, // Inst #8737 = VFMADDSUB213PSm |
| 33364 | { 8736, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed368004829ULL }, // Inst #8736 = VFMADDSUB213PSZrkz |
| 33365 | { 8735, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead368004829ULL }, // Inst #8735 = VFMADDSUB213PSZrk |
| 33366 | { 8734, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ed368004829ULL }, // Inst #8734 = VFMADDSUB213PSZrbkz |
| 33367 | { 8733, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ad368004829ULL }, // Inst #8733 = VFMADDSUB213PSZrbk |
| 33368 | { 8732, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178d368004829ULL }, // Inst #8732 = VFMADDSUB213PSZrb |
| 33369 | { 8731, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d368004829ULL }, // Inst #8731 = VFMADDSUB213PSZr |
| 33370 | { 8730, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed368004819ULL }, // Inst #8730 = VFMADDSUB213PSZmkz |
| 33371 | { 8729, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead368004819ULL }, // Inst #8729 = VFMADDSUB213PSZmk |
| 33372 | { 8728, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed368004819ULL }, // Inst #8728 = VFMADDSUB213PSZmbkz |
| 33373 | { 8727, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad368004819ULL }, // Inst #8727 = VFMADDSUB213PSZmbk |
| 33374 | { 8726, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d368004819ULL }, // Inst #8726 = VFMADDSUB213PSZmb |
| 33375 | { 8725, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d368004819ULL }, // Inst #8725 = VFMADDSUB213PSZm |
| 33376 | { 8724, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d368004829ULL }, // Inst #8724 = VFMADDSUB213PSZ256rkz |
| 33377 | { 8723, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d368004829ULL }, // Inst #8723 = VFMADDSUB213PSZ256rk |
| 33378 | { 8722, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d368004829ULL }, // Inst #8722 = VFMADDSUB213PSZ256r |
| 33379 | { 8721, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d368004819ULL }, // Inst #8721 = VFMADDSUB213PSZ256mkz |
| 33380 | { 8720, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d368004819ULL }, // Inst #8720 = VFMADDSUB213PSZ256mk |
| 33381 | { 8719, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d368004819ULL }, // Inst #8719 = VFMADDSUB213PSZ256mbkz |
| 33382 | { 8718, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d368004819ULL }, // Inst #8718 = VFMADDSUB213PSZ256mbk |
| 33383 | { 8717, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d368004819ULL }, // Inst #8717 = VFMADDSUB213PSZ256mb |
| 33384 | { 8716, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d368004819ULL }, // Inst #8716 = VFMADDSUB213PSZ256m |
| 33385 | { 8715, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d368004829ULL }, // Inst #8715 = VFMADDSUB213PSZ128rkz |
| 33386 | { 8714, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d368004829ULL }, // Inst #8714 = VFMADDSUB213PSZ128rk |
| 33387 | { 8713, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d368004829ULL }, // Inst #8713 = VFMADDSUB213PSZ128r |
| 33388 | { 8712, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d368004819ULL }, // Inst #8712 = VFMADDSUB213PSZ128mkz |
| 33389 | { 8711, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d368004819ULL }, // Inst #8711 = VFMADDSUB213PSZ128mk |
| 33390 | { 8710, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d368004819ULL }, // Inst #8710 = VFMADDSUB213PSZ128mbkz |
| 33391 | { 8709, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d368004819ULL }, // Inst #8709 = VFMADDSUB213PSZ128mbk |
| 33392 | { 8708, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d368004819ULL }, // Inst #8708 = VFMADDSUB213PSZ128mb |
| 33393 | { 8707, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d368004819ULL }, // Inst #8707 = VFMADDSUB213PSZ128m |
| 33394 | { 8706, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d328004829ULL }, // Inst #8706 = VFMADDSUB213PSYr |
| 33395 | { 8705, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d328004819ULL }, // Inst #8705 = VFMADDSUB213PSYm |
| 33396 | { 8704, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed368014829ULL }, // Inst #8704 = VFMADDSUB213PHZrkz |
| 33397 | { 8703, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead368014829ULL }, // Inst #8703 = VFMADDSUB213PHZrk |
| 33398 | { 8702, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ed368014829ULL }, // Inst #8702 = VFMADDSUB213PHZrbkz |
| 33399 | { 8701, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ad368014829ULL }, // Inst #8701 = VFMADDSUB213PHZrbk |
| 33400 | { 8700, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158d368014829ULL }, // Inst #8700 = VFMADDSUB213PHZrb |
| 33401 | { 8699, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d368014829ULL }, // Inst #8699 = VFMADDSUB213PHZr |
| 33402 | { 8698, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed368014819ULL }, // Inst #8698 = VFMADDSUB213PHZmkz |
| 33403 | { 8697, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead368014819ULL }, // Inst #8697 = VFMADDSUB213PHZmk |
| 33404 | { 8696, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed368014819ULL }, // Inst #8696 = VFMADDSUB213PHZmbkz |
| 33405 | { 8695, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad368014819ULL }, // Inst #8695 = VFMADDSUB213PHZmbk |
| 33406 | { 8694, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d368014819ULL }, // Inst #8694 = VFMADDSUB213PHZmb |
| 33407 | { 8693, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d368014819ULL }, // Inst #8693 = VFMADDSUB213PHZm |
| 33408 | { 8692, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d368014829ULL }, // Inst #8692 = VFMADDSUB213PHZ256rkz |
| 33409 | { 8691, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d368014829ULL }, // Inst #8691 = VFMADDSUB213PHZ256rk |
| 33410 | { 8690, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d368014829ULL }, // Inst #8690 = VFMADDSUB213PHZ256r |
| 33411 | { 8689, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d368014819ULL }, // Inst #8689 = VFMADDSUB213PHZ256mkz |
| 33412 | { 8688, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d368014819ULL }, // Inst #8688 = VFMADDSUB213PHZ256mk |
| 33413 | { 8687, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d368014819ULL }, // Inst #8687 = VFMADDSUB213PHZ256mbkz |
| 33414 | { 8686, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d368014819ULL }, // Inst #8686 = VFMADDSUB213PHZ256mbk |
| 33415 | { 8685, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d368014819ULL }, // Inst #8685 = VFMADDSUB213PHZ256mb |
| 33416 | { 8684, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d368014819ULL }, // Inst #8684 = VFMADDSUB213PHZ256m |
| 33417 | { 8683, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d368014829ULL }, // Inst #8683 = VFMADDSUB213PHZ128rkz |
| 33418 | { 8682, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d368014829ULL }, // Inst #8682 = VFMADDSUB213PHZ128rk |
| 33419 | { 8681, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d368014829ULL }, // Inst #8681 = VFMADDSUB213PHZ128r |
| 33420 | { 8680, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d368014819ULL }, // Inst #8680 = VFMADDSUB213PHZ128mkz |
| 33421 | { 8679, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d368014819ULL }, // Inst #8679 = VFMADDSUB213PHZ128mk |
| 33422 | { 8678, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d368014819ULL }, // Inst #8678 = VFMADDSUB213PHZ128mbkz |
| 33423 | { 8677, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d368014819ULL }, // Inst #8677 = VFMADDSUB213PHZ128mbk |
| 33424 | { 8676, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d368014819ULL }, // Inst #8676 = VFMADDSUB213PHZ128mb |
| 33425 | { 8675, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d368014819ULL }, // Inst #8675 = VFMADDSUB213PHZ128m |
| 33426 | { 8674, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd330024829ULL }, // Inst #8674 = VFMADDSUB213PDr |
| 33427 | { 8673, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd330024819ULL }, // Inst #8673 = VFMADDSUB213PDm |
| 33428 | { 8672, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed370024829ULL }, // Inst #8672 = VFMADDSUB213PDZrkz |
| 33429 | { 8671, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead370024829ULL }, // Inst #8671 = VFMADDSUB213PDZrk |
| 33430 | { 8670, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ed370024829ULL }, // Inst #8670 = VFMADDSUB213PDZrbkz |
| 33431 | { 8669, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ad370024829ULL }, // Inst #8669 = VFMADDSUB213PDZrbk |
| 33432 | { 8668, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198d370024829ULL }, // Inst #8668 = VFMADDSUB213PDZrb |
| 33433 | { 8667, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d370024829ULL }, // Inst #8667 = VFMADDSUB213PDZr |
| 33434 | { 8666, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed370024819ULL }, // Inst #8666 = VFMADDSUB213PDZmkz |
| 33435 | { 8665, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead370024819ULL }, // Inst #8665 = VFMADDSUB213PDZmk |
| 33436 | { 8664, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed370024819ULL }, // Inst #8664 = VFMADDSUB213PDZmbkz |
| 33437 | { 8663, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad370024819ULL }, // Inst #8663 = VFMADDSUB213PDZmbk |
| 33438 | { 8662, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d370024819ULL }, // Inst #8662 = VFMADDSUB213PDZmb |
| 33439 | { 8661, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d370024819ULL }, // Inst #8661 = VFMADDSUB213PDZm |
| 33440 | { 8660, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d370024829ULL }, // Inst #8660 = VFMADDSUB213PDZ256rkz |
| 33441 | { 8659, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d370024829ULL }, // Inst #8659 = VFMADDSUB213PDZ256rk |
| 33442 | { 8658, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d370024829ULL }, // Inst #8658 = VFMADDSUB213PDZ256r |
| 33443 | { 8657, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d370024819ULL }, // Inst #8657 = VFMADDSUB213PDZ256mkz |
| 33444 | { 8656, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d370024819ULL }, // Inst #8656 = VFMADDSUB213PDZ256mk |
| 33445 | { 8655, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d370024819ULL }, // Inst #8655 = VFMADDSUB213PDZ256mbkz |
| 33446 | { 8654, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d370024819ULL }, // Inst #8654 = VFMADDSUB213PDZ256mbk |
| 33447 | { 8653, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d370024819ULL }, // Inst #8653 = VFMADDSUB213PDZ256mb |
| 33448 | { 8652, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d370024819ULL }, // Inst #8652 = VFMADDSUB213PDZ256m |
| 33449 | { 8651, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d370024829ULL }, // Inst #8651 = VFMADDSUB213PDZ128rkz |
| 33450 | { 8650, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d370024829ULL }, // Inst #8650 = VFMADDSUB213PDZ128rk |
| 33451 | { 8649, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d370024829ULL }, // Inst #8649 = VFMADDSUB213PDZ128r |
| 33452 | { 8648, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d370024819ULL }, // Inst #8648 = VFMADDSUB213PDZ128mkz |
| 33453 | { 8647, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d370024819ULL }, // Inst #8647 = VFMADDSUB213PDZ128mk |
| 33454 | { 8646, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d370024819ULL }, // Inst #8646 = VFMADDSUB213PDZ128mbkz |
| 33455 | { 8645, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d370024819ULL }, // Inst #8645 = VFMADDSUB213PDZ128mbk |
| 33456 | { 8644, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d370024819ULL }, // Inst #8644 = VFMADDSUB213PDZ128mb |
| 33457 | { 8643, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d370024819ULL }, // Inst #8643 = VFMADDSUB213PDZ128m |
| 33458 | { 8642, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d330024829ULL }, // Inst #8642 = VFMADDSUB213PDYr |
| 33459 | { 8641, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d330024819ULL }, // Inst #8641 = VFMADDSUB213PDYm |
| 33460 | { 8640, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcb28004829ULL }, // Inst #8640 = VFMADDSUB132PSr |
| 33461 | { 8639, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcb28004819ULL }, // Inst #8639 = VFMADDSUB132PSm |
| 33462 | { 8638, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb68004829ULL }, // Inst #8638 = VFMADDSUB132PSZrkz |
| 33463 | { 8637, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacb68004829ULL }, // Inst #8637 = VFMADDSUB132PSZrk |
| 33464 | { 8636, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ecb68004829ULL }, // Inst #8636 = VFMADDSUB132PSZrbkz |
| 33465 | { 8635, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17acb68004829ULL }, // Inst #8635 = VFMADDSUB132PSZrbk |
| 33466 | { 8634, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178cb68004829ULL }, // Inst #8634 = VFMADDSUB132PSZrb |
| 33467 | { 8633, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb68004829ULL }, // Inst #8633 = VFMADDSUB132PSZr |
| 33468 | { 8632, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb68004819ULL }, // Inst #8632 = VFMADDSUB132PSZmkz |
| 33469 | { 8631, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacb68004819ULL }, // Inst #8631 = VFMADDSUB132PSZmk |
| 33470 | { 8630, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ecb68004819ULL }, // Inst #8630 = VFMADDSUB132PSZmbkz |
| 33471 | { 8629, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7acb68004819ULL }, // Inst #8629 = VFMADDSUB132PSZmbk |
| 33472 | { 8628, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78cb68004819ULL }, // Inst #8628 = VFMADDSUB132PSZmb |
| 33473 | { 8627, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb68004819ULL }, // Inst #8627 = VFMADDSUB132PSZm |
| 33474 | { 8626, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb68004829ULL }, // Inst #8626 = VFMADDSUB132PSZ256rkz |
| 33475 | { 8625, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cb68004829ULL }, // Inst #8625 = VFMADDSUB132PSZ256rk |
| 33476 | { 8624, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb68004829ULL }, // Inst #8624 = VFMADDSUB132PSZ256r |
| 33477 | { 8623, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb68004819ULL }, // Inst #8623 = VFMADDSUB132PSZ256mkz |
| 33478 | { 8622, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cb68004819ULL }, // Inst #8622 = VFMADDSUB132PSZ256mk |
| 33479 | { 8621, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77cb68004819ULL }, // Inst #8621 = VFMADDSUB132PSZ256mbkz |
| 33480 | { 8620, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73cb68004819ULL }, // Inst #8620 = VFMADDSUB132PSZ256mbk |
| 33481 | { 8619, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71cb68004819ULL }, // Inst #8619 = VFMADDSUB132PSZ256mb |
| 33482 | { 8618, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb68004819ULL }, // Inst #8618 = VFMADDSUB132PSZ256m |
| 33483 | { 8617, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb68004829ULL }, // Inst #8617 = VFMADDSUB132PSZ128rkz |
| 33484 | { 8616, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cb68004829ULL }, // Inst #8616 = VFMADDSUB132PSZ128rk |
| 33485 | { 8615, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb68004829ULL }, // Inst #8615 = VFMADDSUB132PSZ128r |
| 33486 | { 8614, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb68004819ULL }, // Inst #8614 = VFMADDSUB132PSZ128mkz |
| 33487 | { 8613, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cb68004819ULL }, // Inst #8613 = VFMADDSUB132PSZ128mk |
| 33488 | { 8612, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76cb68004819ULL }, // Inst #8612 = VFMADDSUB132PSZ128mbkz |
| 33489 | { 8611, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72cb68004819ULL }, // Inst #8611 = VFMADDSUB132PSZ128mbk |
| 33490 | { 8610, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70cb68004819ULL }, // Inst #8610 = VFMADDSUB132PSZ128mb |
| 33491 | { 8609, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb68004819ULL }, // Inst #8609 = VFMADDSUB132PSZ128m |
| 33492 | { 8608, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cb28004829ULL }, // Inst #8608 = VFMADDSUB132PSYr |
| 33493 | { 8607, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cb28004819ULL }, // Inst #8607 = VFMADDSUB132PSYm |
| 33494 | { 8606, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb68014829ULL }, // Inst #8606 = VFMADDSUB132PHZrkz |
| 33495 | { 8605, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacb68014829ULL }, // Inst #8605 = VFMADDSUB132PHZrk |
| 33496 | { 8604, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ecb68014829ULL }, // Inst #8604 = VFMADDSUB132PHZrbkz |
| 33497 | { 8603, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15acb68014829ULL }, // Inst #8603 = VFMADDSUB132PHZrbk |
| 33498 | { 8602, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158cb68014829ULL }, // Inst #8602 = VFMADDSUB132PHZrb |
| 33499 | { 8601, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb68014829ULL }, // Inst #8601 = VFMADDSUB132PHZr |
| 33500 | { 8600, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb68014819ULL }, // Inst #8600 = VFMADDSUB132PHZmkz |
| 33501 | { 8599, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacb68014819ULL }, // Inst #8599 = VFMADDSUB132PHZmk |
| 33502 | { 8598, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ecb68014819ULL }, // Inst #8598 = VFMADDSUB132PHZmbkz |
| 33503 | { 8597, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5acb68014819ULL }, // Inst #8597 = VFMADDSUB132PHZmbk |
| 33504 | { 8596, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58cb68014819ULL }, // Inst #8596 = VFMADDSUB132PHZmb |
| 33505 | { 8595, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb68014819ULL }, // Inst #8595 = VFMADDSUB132PHZm |
| 33506 | { 8594, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb68014829ULL }, // Inst #8594 = VFMADDSUB132PHZ256rkz |
| 33507 | { 8593, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cb68014829ULL }, // Inst #8593 = VFMADDSUB132PHZ256rk |
| 33508 | { 8592, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb68014829ULL }, // Inst #8592 = VFMADDSUB132PHZ256r |
| 33509 | { 8591, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb68014819ULL }, // Inst #8591 = VFMADDSUB132PHZ256mkz |
| 33510 | { 8590, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cb68014819ULL }, // Inst #8590 = VFMADDSUB132PHZ256mk |
| 33511 | { 8589, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57cb68014819ULL }, // Inst #8589 = VFMADDSUB132PHZ256mbkz |
| 33512 | { 8588, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53cb68014819ULL }, // Inst #8588 = VFMADDSUB132PHZ256mbk |
| 33513 | { 8587, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51cb68014819ULL }, // Inst #8587 = VFMADDSUB132PHZ256mb |
| 33514 | { 8586, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb68014819ULL }, // Inst #8586 = VFMADDSUB132PHZ256m |
| 33515 | { 8585, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb68014829ULL }, // Inst #8585 = VFMADDSUB132PHZ128rkz |
| 33516 | { 8584, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cb68014829ULL }, // Inst #8584 = VFMADDSUB132PHZ128rk |
| 33517 | { 8583, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb68014829ULL }, // Inst #8583 = VFMADDSUB132PHZ128r |
| 33518 | { 8582, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb68014819ULL }, // Inst #8582 = VFMADDSUB132PHZ128mkz |
| 33519 | { 8581, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cb68014819ULL }, // Inst #8581 = VFMADDSUB132PHZ128mk |
| 33520 | { 8580, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56cb68014819ULL }, // Inst #8580 = VFMADDSUB132PHZ128mbkz |
| 33521 | { 8579, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52cb68014819ULL }, // Inst #8579 = VFMADDSUB132PHZ128mbk |
| 33522 | { 8578, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50cb68014819ULL }, // Inst #8578 = VFMADDSUB132PHZ128mb |
| 33523 | { 8577, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb68014819ULL }, // Inst #8577 = VFMADDSUB132PHZ128m |
| 33524 | { 8576, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcb30024829ULL }, // Inst #8576 = VFMADDSUB132PDr |
| 33525 | { 8575, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcb30024819ULL }, // Inst #8575 = VFMADDSUB132PDm |
| 33526 | { 8574, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb70024829ULL }, // Inst #8574 = VFMADDSUB132PDZrkz |
| 33527 | { 8573, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacb70024829ULL }, // Inst #8573 = VFMADDSUB132PDZrk |
| 33528 | { 8572, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ecb70024829ULL }, // Inst #8572 = VFMADDSUB132PDZrbkz |
| 33529 | { 8571, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19acb70024829ULL }, // Inst #8571 = VFMADDSUB132PDZrbk |
| 33530 | { 8570, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198cb70024829ULL }, // Inst #8570 = VFMADDSUB132PDZrb |
| 33531 | { 8569, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb70024829ULL }, // Inst #8569 = VFMADDSUB132PDZr |
| 33532 | { 8568, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecb70024819ULL }, // Inst #8568 = VFMADDSUB132PDZmkz |
| 33533 | { 8567, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacb70024819ULL }, // Inst #8567 = VFMADDSUB132PDZmk |
| 33534 | { 8566, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ecb70024819ULL }, // Inst #8566 = VFMADDSUB132PDZmbkz |
| 33535 | { 8565, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9acb70024819ULL }, // Inst #8565 = VFMADDSUB132PDZmbk |
| 33536 | { 8564, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98cb70024819ULL }, // Inst #8564 = VFMADDSUB132PDZmb |
| 33537 | { 8563, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cb70024819ULL }, // Inst #8563 = VFMADDSUB132PDZm |
| 33538 | { 8562, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb70024829ULL }, // Inst #8562 = VFMADDSUB132PDZ256rkz |
| 33539 | { 8561, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cb70024829ULL }, // Inst #8561 = VFMADDSUB132PDZ256rk |
| 33540 | { 8560, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb70024829ULL }, // Inst #8560 = VFMADDSUB132PDZ256r |
| 33541 | { 8559, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cb70024819ULL }, // Inst #8559 = VFMADDSUB132PDZ256mkz |
| 33542 | { 8558, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cb70024819ULL }, // Inst #8558 = VFMADDSUB132PDZ256mk |
| 33543 | { 8557, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97cb70024819ULL }, // Inst #8557 = VFMADDSUB132PDZ256mbkz |
| 33544 | { 8556, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93cb70024819ULL }, // Inst #8556 = VFMADDSUB132PDZ256mbk |
| 33545 | { 8555, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91cb70024819ULL }, // Inst #8555 = VFMADDSUB132PDZ256mb |
| 33546 | { 8554, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cb70024819ULL }, // Inst #8554 = VFMADDSUB132PDZ256m |
| 33547 | { 8553, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb70024829ULL }, // Inst #8553 = VFMADDSUB132PDZ128rkz |
| 33548 | { 8552, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cb70024829ULL }, // Inst #8552 = VFMADDSUB132PDZ128rk |
| 33549 | { 8551, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb70024829ULL }, // Inst #8551 = VFMADDSUB132PDZ128r |
| 33550 | { 8550, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cb70024819ULL }, // Inst #8550 = VFMADDSUB132PDZ128mkz |
| 33551 | { 8549, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cb70024819ULL }, // Inst #8549 = VFMADDSUB132PDZ128mk |
| 33552 | { 8548, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96cb70024819ULL }, // Inst #8548 = VFMADDSUB132PDZ128mbkz |
| 33553 | { 8547, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92cb70024819ULL }, // Inst #8547 = VFMADDSUB132PDZ128mbk |
| 33554 | { 8546, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90cb70024819ULL }, // Inst #8546 = VFMADDSUB132PDZ128mb |
| 33555 | { 8545, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cb70024819ULL }, // Inst #8545 = VFMADDSUB132PDZ128m |
| 33556 | { 8544, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cb30024829ULL }, // Inst #8544 = VFMADDSUB132PDYr |
| 33557 | { 8543, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cb30024819ULL }, // Inst #8543 = VFMADDSUB132PDYm |
| 33558 | { 8542, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3852, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5280c6829ULL }, // Inst #8542 = VFMADDSS4rr_REV |
| 33559 | { 8541, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5280c6829ULL }, // Inst #8541 = VFMADDSS4rr_Int_REV |
| 33560 | { 8540, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5280e682bULL }, // Inst #8540 = VFMADDSS4rr_Int |
| 33561 | { 8539, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3852, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb5280e682bULL }, // Inst #8539 = VFMADDSS4rr |
| 33562 | { 8538, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5280e681bULL }, // Inst #8538 = VFMADDSS4rm_Int |
| 33563 | { 8537, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3844, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5280e681bULL }, // Inst #8537 = VFMADDSS4rm |
| 33564 | { 8536, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5280c6819ULL }, // Inst #8536 = VFMADDSS4mr_Int |
| 33565 | { 8535, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 3836, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5280c6819ULL }, // Inst #8535 = VFMADDSS4mr |
| 33566 | { 8534, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3832, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5b00c6829ULL }, // Inst #8534 = VFMADDSD4rr_REV |
| 33567 | { 8533, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5b00c6829ULL }, // Inst #8533 = VFMADDSD4rr_Int_REV |
| 33568 | { 8532, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb5b00e682bULL }, // Inst #8532 = VFMADDSD4rr_Int |
| 33569 | { 8531, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3832, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb5b00e682bULL }, // Inst #8531 = VFMADDSD4rr |
| 33570 | { 8530, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5b00e681bULL }, // Inst #8530 = VFMADDSD4rm_Int |
| 33571 | { 8529, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3824, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5b00e681bULL }, // Inst #8529 = VFMADDSD4rm |
| 33572 | { 8528, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5b00c6819ULL }, // Inst #8528 = VFMADDSD4mr_Int |
| 33573 | { 8527, 8, 1, 0, 443, 1, 0, X86ImpOpBase + 78, 3816, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb5b00c6819ULL }, // Inst #8527 = VFMADDSD4mr |
| 33574 | { 8526, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb4280c6829ULL }, // Inst #8526 = VFMADDPS4rr_REV |
| 33575 | { 8525, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb4280e682bULL }, // Inst #8525 = VFMADDPS4rr |
| 33576 | { 8524, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb4280e681bULL }, // Inst #8524 = VFMADDPS4rm |
| 33577 | { 8523, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb4280c6819ULL }, // Inst #8523 = VFMADDPS4mr |
| 33578 | { 8522, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1b4280c6829ULL }, // Inst #8522 = VFMADDPS4Yrr_REV |
| 33579 | { 8521, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1b4280e682bULL }, // Inst #8521 = VFMADDPS4Yrr |
| 33580 | { 8520, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b4280e681bULL }, // Inst #8520 = VFMADDPS4Yrm |
| 33581 | { 8519, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b4280c6819ULL }, // Inst #8519 = VFMADDPS4Ymr |
| 33582 | { 8518, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException), 0xb4b00c6829ULL }, // Inst #8518 = VFMADDPD4rr_REV |
| 33583 | { 8517, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 2231, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xb4b00e682bULL }, // Inst #8517 = VFMADDPD4rr |
| 33584 | { 8516, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3808, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb4b00e681bULL }, // Inst #8516 = VFMADDPD4rm |
| 33585 | { 8515, 8, 1, 0, 442, 1, 0, X86ImpOpBase + 78, 2223, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xb4b00c6819ULL }, // Inst #8515 = VFMADDPD4mr |
| 33586 | { 8514, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException), 0x1b4b00c6829ULL }, // Inst #8514 = VFMADDPD4Yrr_REV |
| 33587 | { 8513, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 2219, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1b4b00e682bULL }, // Inst #8513 = VFMADDPD4Yrr |
| 33588 | { 8512, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b4b00e681bULL }, // Inst #8512 = VFMADDPD4Yrm |
| 33589 | { 8511, 8, 1, 0, 441, 1, 0, X86ImpOpBase + 78, 2211, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1b4b00c6819ULL }, // Inst #8511 = VFMADDPD4Ymr |
| 33590 | { 8510, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3438, 0|(1ULL<<MCID::Commutable), 0x66abe0015029ULL }, // Inst #8510 = VFMADDCSHZrkz |
| 33591 | { 8509, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3438, 0, 0x62abe0015029ULL }, // Inst #8509 = VFMADDCSHZrk |
| 33592 | { 8508, 6, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3511, 0, 0x176abe0015029ULL }, // Inst #8508 = VFMADDCSHZrbkz |
| 33593 | { 8507, 6, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3511, 0, 0x172abe0015029ULL }, // Inst #8507 = VFMADDCSHZrbk |
| 33594 | { 8506, 5, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3506, 0, 0x170abe0015029ULL }, // Inst #8506 = VFMADDCSHZrb |
| 33595 | { 8505, 4, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3434, 0|(1ULL<<MCID::Commutable), 0x60abe0015029ULL }, // Inst #8505 = VFMADDCSHZr |
| 33596 | { 8504, 9, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0x66abe0015019ULL }, // Inst #8504 = VFMADDCSHZmkz |
| 33597 | { 8503, 9, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0x62abe0015019ULL }, // Inst #8503 = VFMADDCSHZmk |
| 33598 | { 8502, 8, 1, 0, 2164, 1, 0, X86ImpOpBase + 78, 3417, 0|(1ULL<<MCID::MayLoad), 0x60abe0015019ULL }, // Inst #8502 = VFMADDCSHZm |
| 33599 | { 8501, 5, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3501, 0|(1ULL<<MCID::Commutable), 0xeeab60015029ULL }, // Inst #8501 = VFMADDCPHZrkz |
| 33600 | { 8500, 5, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3501, 0, 0xeaab60015029ULL }, // Inst #8500 = VFMADDCPHZrk |
| 33601 | { 8499, 6, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3495, 0, 0x17eab60015029ULL }, // Inst #8499 = VFMADDCPHZrbkz |
| 33602 | { 8498, 6, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3495, 0, 0x17aab60015029ULL }, // Inst #8498 = VFMADDCPHZrbk |
| 33603 | { 8497, 5, 1, 0, 2191, 1, 0, X86ImpOpBase + 78, 3490, 0, 0x178ab60015029ULL }, // Inst #8497 = VFMADDCPHZrb |
| 33604 | { 8496, 4, 1, 0, 2191, 1, 0, X86ImpOpBase + 78, 3486, 0|(1ULL<<MCID::Commutable), 0xe8ab60015029ULL }, // Inst #8496 = VFMADDCPHZr |
| 33605 | { 8495, 9, 1, 0, 2189, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0xeeab60015019ULL }, // Inst #8495 = VFMADDCPHZmkz |
| 33606 | { 8494, 9, 1, 0, 2189, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0xeaab60015019ULL }, // Inst #8494 = VFMADDCPHZmk |
| 33607 | { 8493, 9, 1, 0, 2189, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0x7eab60015019ULL }, // Inst #8493 = VFMADDCPHZmbkz |
| 33608 | { 8492, 9, 1, 0, 2189, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0x7aab60015019ULL }, // Inst #8492 = VFMADDCPHZmbk |
| 33609 | { 8491, 8, 1, 0, 2185, 1, 0, X86ImpOpBase + 78, 3469, 0|(1ULL<<MCID::MayLoad), 0x78ab60015019ULL }, // Inst #8491 = VFMADDCPHZmb |
| 33610 | { 8490, 8, 1, 0, 2185, 1, 0, X86ImpOpBase + 78, 3469, 0|(1ULL<<MCID::MayLoad), 0xe8ab60015019ULL }, // Inst #8490 = VFMADDCPHZm |
| 33611 | { 8489, 5, 1, 0, 2184, 1, 0, X86ImpOpBase + 78, 3464, 0|(1ULL<<MCID::Commutable), 0xc7ab60015029ULL }, // Inst #8489 = VFMADDCPHZ256rkz |
| 33612 | { 8488, 5, 1, 0, 2184, 1, 0, X86ImpOpBase + 78, 3464, 0, 0xc3ab60015029ULL }, // Inst #8488 = VFMADDCPHZ256rk |
| 33613 | { 8487, 4, 1, 0, 2176, 1, 0, X86ImpOpBase + 78, 3460, 0|(1ULL<<MCID::Commutable), 0xc1ab60015029ULL }, // Inst #8487 = VFMADDCPHZ256r |
| 33614 | { 8486, 9, 1, 0, 2172, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0xc7ab60015019ULL }, // Inst #8486 = VFMADDCPHZ256mkz |
| 33615 | { 8485, 9, 1, 0, 2172, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0xc3ab60015019ULL }, // Inst #8485 = VFMADDCPHZ256mk |
| 33616 | { 8484, 9, 1, 0, 2172, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0x77ab60015019ULL }, // Inst #8484 = VFMADDCPHZ256mbkz |
| 33617 | { 8483, 9, 1, 0, 2172, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0x73ab60015019ULL }, // Inst #8483 = VFMADDCPHZ256mbk |
| 33618 | { 8482, 8, 1, 0, 2162, 1, 0, X86ImpOpBase + 78, 3443, 0|(1ULL<<MCID::MayLoad), 0x71ab60015019ULL }, // Inst #8482 = VFMADDCPHZ256mb |
| 33619 | { 8481, 8, 1, 0, 2162, 1, 0, X86ImpOpBase + 78, 3443, 0|(1ULL<<MCID::MayLoad), 0xc1ab60015019ULL }, // Inst #8481 = VFMADDCPHZ256m |
| 33620 | { 8480, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3438, 0|(1ULL<<MCID::Commutable), 0xa6ab60015029ULL }, // Inst #8480 = VFMADDCPHZ128rkz |
| 33621 | { 8479, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3438, 0, 0xa2ab60015029ULL }, // Inst #8479 = VFMADDCPHZ128rk |
| 33622 | { 8478, 4, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3434, 0|(1ULL<<MCID::Commutable), 0xa0ab60015029ULL }, // Inst #8478 = VFMADDCPHZ128r |
| 33623 | { 8477, 9, 1, 0, 2171, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0xa6ab60015019ULL }, // Inst #8477 = VFMADDCPHZ128mkz |
| 33624 | { 8476, 9, 1, 0, 2171, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0xa2ab60015019ULL }, // Inst #8476 = VFMADDCPHZ128mk |
| 33625 | { 8475, 9, 1, 0, 2171, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0x76ab60015019ULL }, // Inst #8475 = VFMADDCPHZ128mbkz |
| 33626 | { 8474, 9, 1, 0, 2171, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0x72ab60015019ULL }, // Inst #8474 = VFMADDCPHZ128mbk |
| 33627 | { 8473, 8, 1, 0, 2161, 1, 0, X86ImpOpBase + 78, 3417, 0|(1ULL<<MCID::MayLoad), 0x70ab60015019ULL }, // Inst #8473 = VFMADDCPHZ128mb |
| 33628 | { 8472, 8, 1, 0, 2161, 1, 0, X86ImpOpBase + 78, 3417, 0|(1ULL<<MCID::MayLoad), 0xa0ab60015019ULL }, // Inst #8472 = VFMADDCPHZ128m |
| 33629 | { 8471, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdca8004829ULL }, // Inst #8471 = VFMADD231SSr_Int |
| 33630 | { 8470, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdca8004829ULL }, // Inst #8470 = VFMADD231SSr |
| 33631 | { 8469, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdca8004819ULL }, // Inst #8469 = VFMADD231SSm_Int |
| 33632 | { 8468, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdca8004819ULL }, // Inst #8468 = VFMADD231SSm |
| 33633 | { 8467, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176dce8004829ULL }, // Inst #8467 = VFMADD231SSZrb_Intkz |
| 33634 | { 8466, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172dce8004829ULL }, // Inst #8466 = VFMADD231SSZrb_Intk |
| 33635 | { 8465, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170dce8004829ULL }, // Inst #8465 = VFMADD231SSZrb_Int |
| 33636 | { 8464, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170dce8004829ULL }, // Inst #8464 = VFMADD231SSZrb |
| 33637 | { 8463, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dce8004829ULL }, // Inst #8463 = VFMADD231SSZr_Intkz |
| 33638 | { 8462, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dce8004829ULL }, // Inst #8462 = VFMADD231SSZr_Intk |
| 33639 | { 8461, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dce8004829ULL }, // Inst #8461 = VFMADD231SSZr_Int |
| 33640 | { 8460, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dce8004829ULL }, // Inst #8460 = VFMADD231SSZr |
| 33641 | { 8459, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66dce8004819ULL }, // Inst #8459 = VFMADD231SSZm_Intkz |
| 33642 | { 8458, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62dce8004819ULL }, // Inst #8458 = VFMADD231SSZm_Intk |
| 33643 | { 8457, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dce8004819ULL }, // Inst #8457 = VFMADD231SSZm_Int |
| 33644 | { 8456, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60dce8004819ULL }, // Inst #8456 = VFMADD231SSZm |
| 33645 | { 8455, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156dce8014829ULL }, // Inst #8455 = VFMADD231SHZrb_Intkz |
| 33646 | { 8454, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152dce8014829ULL }, // Inst #8454 = VFMADD231SHZrb_Intk |
| 33647 | { 8453, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150dce8014829ULL }, // Inst #8453 = VFMADD231SHZrb_Int |
| 33648 | { 8452, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150dce8014829ULL }, // Inst #8452 = VFMADD231SHZrb |
| 33649 | { 8451, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dce8014829ULL }, // Inst #8451 = VFMADD231SHZr_Intkz |
| 33650 | { 8450, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dce8014829ULL }, // Inst #8450 = VFMADD231SHZr_Intk |
| 33651 | { 8449, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dce8014829ULL }, // Inst #8449 = VFMADD231SHZr_Int |
| 33652 | { 8448, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dce8014829ULL }, // Inst #8448 = VFMADD231SHZr |
| 33653 | { 8447, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46dce8014819ULL }, // Inst #8447 = VFMADD231SHZm_Intkz |
| 33654 | { 8446, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42dce8014819ULL }, // Inst #8446 = VFMADD231SHZm_Intk |
| 33655 | { 8445, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dce8014819ULL }, // Inst #8445 = VFMADD231SHZm_Int |
| 33656 | { 8444, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40dce8014819ULL }, // Inst #8444 = VFMADD231SHZm |
| 33657 | { 8443, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdcb0024829ULL }, // Inst #8443 = VFMADD231SDr_Int |
| 33658 | { 8442, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdcb0024829ULL }, // Inst #8442 = VFMADD231SDr |
| 33659 | { 8441, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdcb0024819ULL }, // Inst #8441 = VFMADD231SDm_Int |
| 33660 | { 8440, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdcb0024819ULL }, // Inst #8440 = VFMADD231SDm |
| 33661 | { 8439, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196dcf0024829ULL }, // Inst #8439 = VFMADD231SDZrb_Intkz |
| 33662 | { 8438, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192dcf0024829ULL }, // Inst #8438 = VFMADD231SDZrb_Intk |
| 33663 | { 8437, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190dcf0024829ULL }, // Inst #8437 = VFMADD231SDZrb_Int |
| 33664 | { 8436, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190dcf0024829ULL }, // Inst #8436 = VFMADD231SDZrb |
| 33665 | { 8435, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86dcf0024829ULL }, // Inst #8435 = VFMADD231SDZr_Intkz |
| 33666 | { 8434, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82dcf0024829ULL }, // Inst #8434 = VFMADD231SDZr_Intk |
| 33667 | { 8433, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dcf0024829ULL }, // Inst #8433 = VFMADD231SDZr_Int |
| 33668 | { 8432, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dcf0024829ULL }, // Inst #8432 = VFMADD231SDZr |
| 33669 | { 8431, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86dcf0024819ULL }, // Inst #8431 = VFMADD231SDZm_Intkz |
| 33670 | { 8430, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82dcf0024819ULL }, // Inst #8430 = VFMADD231SDZm_Intk |
| 33671 | { 8429, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dcf0024819ULL }, // Inst #8429 = VFMADD231SDZm_Int |
| 33672 | { 8428, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80dcf0024819ULL }, // Inst #8428 = VFMADD231SDZm |
| 33673 | { 8427, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdc28004829ULL }, // Inst #8427 = VFMADD231PSr |
| 33674 | { 8426, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdc28004819ULL }, // Inst #8426 = VFMADD231PSm |
| 33675 | { 8425, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc68004829ULL }, // Inst #8425 = VFMADD231PSZrkz |
| 33676 | { 8424, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadc68004829ULL }, // Inst #8424 = VFMADD231PSZrk |
| 33677 | { 8423, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17edc68004829ULL }, // Inst #8423 = VFMADD231PSZrbkz |
| 33678 | { 8422, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17adc68004829ULL }, // Inst #8422 = VFMADD231PSZrbk |
| 33679 | { 8421, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178dc68004829ULL }, // Inst #8421 = VFMADD231PSZrb |
| 33680 | { 8420, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc68004829ULL }, // Inst #8420 = VFMADD231PSZr |
| 33681 | { 8419, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc68004819ULL }, // Inst #8419 = VFMADD231PSZmkz |
| 33682 | { 8418, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadc68004819ULL }, // Inst #8418 = VFMADD231PSZmk |
| 33683 | { 8417, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7edc68004819ULL }, // Inst #8417 = VFMADD231PSZmbkz |
| 33684 | { 8416, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7adc68004819ULL }, // Inst #8416 = VFMADD231PSZmbk |
| 33685 | { 8415, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78dc68004819ULL }, // Inst #8415 = VFMADD231PSZmb |
| 33686 | { 8414, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc68004819ULL }, // Inst #8414 = VFMADD231PSZm |
| 33687 | { 8413, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc68004829ULL }, // Inst #8413 = VFMADD231PSZ256rkz |
| 33688 | { 8412, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dc68004829ULL }, // Inst #8412 = VFMADD231PSZ256rk |
| 33689 | { 8411, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc68004829ULL }, // Inst #8411 = VFMADD231PSZ256r |
| 33690 | { 8410, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc68004819ULL }, // Inst #8410 = VFMADD231PSZ256mkz |
| 33691 | { 8409, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dc68004819ULL }, // Inst #8409 = VFMADD231PSZ256mk |
| 33692 | { 8408, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77dc68004819ULL }, // Inst #8408 = VFMADD231PSZ256mbkz |
| 33693 | { 8407, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73dc68004819ULL }, // Inst #8407 = VFMADD231PSZ256mbk |
| 33694 | { 8406, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71dc68004819ULL }, // Inst #8406 = VFMADD231PSZ256mb |
| 33695 | { 8405, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc68004819ULL }, // Inst #8405 = VFMADD231PSZ256m |
| 33696 | { 8404, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc68004829ULL }, // Inst #8404 = VFMADD231PSZ128rkz |
| 33697 | { 8403, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dc68004829ULL }, // Inst #8403 = VFMADD231PSZ128rk |
| 33698 | { 8402, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc68004829ULL }, // Inst #8402 = VFMADD231PSZ128r |
| 33699 | { 8401, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc68004819ULL }, // Inst #8401 = VFMADD231PSZ128mkz |
| 33700 | { 8400, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dc68004819ULL }, // Inst #8400 = VFMADD231PSZ128mk |
| 33701 | { 8399, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76dc68004819ULL }, // Inst #8399 = VFMADD231PSZ128mbkz |
| 33702 | { 8398, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72dc68004819ULL }, // Inst #8398 = VFMADD231PSZ128mbk |
| 33703 | { 8397, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70dc68004819ULL }, // Inst #8397 = VFMADD231PSZ128mb |
| 33704 | { 8396, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc68004819ULL }, // Inst #8396 = VFMADD231PSZ128m |
| 33705 | { 8395, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dc28004829ULL }, // Inst #8395 = VFMADD231PSYr |
| 33706 | { 8394, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dc28004819ULL }, // Inst #8394 = VFMADD231PSYm |
| 33707 | { 8393, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc68014829ULL }, // Inst #8393 = VFMADD231PHZrkz |
| 33708 | { 8392, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadc68014829ULL }, // Inst #8392 = VFMADD231PHZrk |
| 33709 | { 8391, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15edc68014829ULL }, // Inst #8391 = VFMADD231PHZrbkz |
| 33710 | { 8390, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15adc68014829ULL }, // Inst #8390 = VFMADD231PHZrbk |
| 33711 | { 8389, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158dc68014829ULL }, // Inst #8389 = VFMADD231PHZrb |
| 33712 | { 8388, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc68014829ULL }, // Inst #8388 = VFMADD231PHZr |
| 33713 | { 8387, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc68014819ULL }, // Inst #8387 = VFMADD231PHZmkz |
| 33714 | { 8386, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadc68014819ULL }, // Inst #8386 = VFMADD231PHZmk |
| 33715 | { 8385, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5edc68014819ULL }, // Inst #8385 = VFMADD231PHZmbkz |
| 33716 | { 8384, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5adc68014819ULL }, // Inst #8384 = VFMADD231PHZmbk |
| 33717 | { 8383, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58dc68014819ULL }, // Inst #8383 = VFMADD231PHZmb |
| 33718 | { 8382, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc68014819ULL }, // Inst #8382 = VFMADD231PHZm |
| 33719 | { 8381, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc68014829ULL }, // Inst #8381 = VFMADD231PHZ256rkz |
| 33720 | { 8380, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dc68014829ULL }, // Inst #8380 = VFMADD231PHZ256rk |
| 33721 | { 8379, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc68014829ULL }, // Inst #8379 = VFMADD231PHZ256r |
| 33722 | { 8378, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc68014819ULL }, // Inst #8378 = VFMADD231PHZ256mkz |
| 33723 | { 8377, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dc68014819ULL }, // Inst #8377 = VFMADD231PHZ256mk |
| 33724 | { 8376, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57dc68014819ULL }, // Inst #8376 = VFMADD231PHZ256mbkz |
| 33725 | { 8375, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53dc68014819ULL }, // Inst #8375 = VFMADD231PHZ256mbk |
| 33726 | { 8374, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51dc68014819ULL }, // Inst #8374 = VFMADD231PHZ256mb |
| 33727 | { 8373, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc68014819ULL }, // Inst #8373 = VFMADD231PHZ256m |
| 33728 | { 8372, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc68014829ULL }, // Inst #8372 = VFMADD231PHZ128rkz |
| 33729 | { 8371, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dc68014829ULL }, // Inst #8371 = VFMADD231PHZ128rk |
| 33730 | { 8370, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc68014829ULL }, // Inst #8370 = VFMADD231PHZ128r |
| 33731 | { 8369, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc68014819ULL }, // Inst #8369 = VFMADD231PHZ128mkz |
| 33732 | { 8368, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dc68014819ULL }, // Inst #8368 = VFMADD231PHZ128mk |
| 33733 | { 8367, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56dc68014819ULL }, // Inst #8367 = VFMADD231PHZ128mbkz |
| 33734 | { 8366, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52dc68014819ULL }, // Inst #8366 = VFMADD231PHZ128mbk |
| 33735 | { 8365, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50dc68014819ULL }, // Inst #8365 = VFMADD231PHZ128mb |
| 33736 | { 8364, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc68014819ULL }, // Inst #8364 = VFMADD231PHZ128m |
| 33737 | { 8363, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdc30024829ULL }, // Inst #8363 = VFMADD231PDr |
| 33738 | { 8362, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xdc30024819ULL }, // Inst #8362 = VFMADD231PDm |
| 33739 | { 8361, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc70024829ULL }, // Inst #8361 = VFMADD231PDZrkz |
| 33740 | { 8360, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeadc70024829ULL }, // Inst #8360 = VFMADD231PDZrk |
| 33741 | { 8359, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19edc70024829ULL }, // Inst #8359 = VFMADD231PDZrbkz |
| 33742 | { 8358, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19adc70024829ULL }, // Inst #8358 = VFMADD231PDZrbk |
| 33743 | { 8357, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198dc70024829ULL }, // Inst #8357 = VFMADD231PDZrb |
| 33744 | { 8356, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc70024829ULL }, // Inst #8356 = VFMADD231PDZr |
| 33745 | { 8355, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeedc70024819ULL }, // Inst #8355 = VFMADD231PDZmkz |
| 33746 | { 8354, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeadc70024819ULL }, // Inst #8354 = VFMADD231PDZmk |
| 33747 | { 8353, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9edc70024819ULL }, // Inst #8353 = VFMADD231PDZmbkz |
| 33748 | { 8352, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9adc70024819ULL }, // Inst #8352 = VFMADD231PDZmbk |
| 33749 | { 8351, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98dc70024819ULL }, // Inst #8351 = VFMADD231PDZmb |
| 33750 | { 8350, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8dc70024819ULL }, // Inst #8350 = VFMADD231PDZm |
| 33751 | { 8349, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc70024829ULL }, // Inst #8349 = VFMADD231PDZ256rkz |
| 33752 | { 8348, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3dc70024829ULL }, // Inst #8348 = VFMADD231PDZ256rk |
| 33753 | { 8347, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc70024829ULL }, // Inst #8347 = VFMADD231PDZ256r |
| 33754 | { 8346, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7dc70024819ULL }, // Inst #8346 = VFMADD231PDZ256mkz |
| 33755 | { 8345, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3dc70024819ULL }, // Inst #8345 = VFMADD231PDZ256mk |
| 33756 | { 8344, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97dc70024819ULL }, // Inst #8344 = VFMADD231PDZ256mbkz |
| 33757 | { 8343, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93dc70024819ULL }, // Inst #8343 = VFMADD231PDZ256mbk |
| 33758 | { 8342, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91dc70024819ULL }, // Inst #8342 = VFMADD231PDZ256mb |
| 33759 | { 8341, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1dc70024819ULL }, // Inst #8341 = VFMADD231PDZ256m |
| 33760 | { 8340, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc70024829ULL }, // Inst #8340 = VFMADD231PDZ128rkz |
| 33761 | { 8339, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2dc70024829ULL }, // Inst #8339 = VFMADD231PDZ128rk |
| 33762 | { 8338, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc70024829ULL }, // Inst #8338 = VFMADD231PDZ128r |
| 33763 | { 8337, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6dc70024819ULL }, // Inst #8337 = VFMADD231PDZ128mkz |
| 33764 | { 8336, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2dc70024819ULL }, // Inst #8336 = VFMADD231PDZ128mk |
| 33765 | { 8335, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96dc70024819ULL }, // Inst #8335 = VFMADD231PDZ128mbkz |
| 33766 | { 8334, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92dc70024819ULL }, // Inst #8334 = VFMADD231PDZ128mbk |
| 33767 | { 8333, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90dc70024819ULL }, // Inst #8333 = VFMADD231PDZ128mb |
| 33768 | { 8332, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0dc70024819ULL }, // Inst #8332 = VFMADD231PDZ128m |
| 33769 | { 8331, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dc30024829ULL }, // Inst #8331 = VFMADD231PDYr |
| 33770 | { 8330, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1dc30024819ULL }, // Inst #8330 = VFMADD231PDYm |
| 33771 | { 8329, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4a8004829ULL }, // Inst #8329 = VFMADD213SSr_Int |
| 33772 | { 8328, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4a8004829ULL }, // Inst #8328 = VFMADD213SSr |
| 33773 | { 8327, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4a8004819ULL }, // Inst #8327 = VFMADD213SSm_Int |
| 33774 | { 8326, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4a8004819ULL }, // Inst #8326 = VFMADD213SSm |
| 33775 | { 8325, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176d4e8004829ULL }, // Inst #8325 = VFMADD213SSZrb_Intkz |
| 33776 | { 8324, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172d4e8004829ULL }, // Inst #8324 = VFMADD213SSZrb_Intk |
| 33777 | { 8323, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170d4e8004829ULL }, // Inst #8323 = VFMADD213SSZrb_Int |
| 33778 | { 8322, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170d4e8004829ULL }, // Inst #8322 = VFMADD213SSZrb |
| 33779 | { 8321, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d4e8004829ULL }, // Inst #8321 = VFMADD213SSZr_Intkz |
| 33780 | { 8320, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d4e8004829ULL }, // Inst #8320 = VFMADD213SSZr_Intk |
| 33781 | { 8319, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d4e8004829ULL }, // Inst #8319 = VFMADD213SSZr_Int |
| 33782 | { 8318, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d4e8004829ULL }, // Inst #8318 = VFMADD213SSZr |
| 33783 | { 8317, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66d4e8004819ULL }, // Inst #8317 = VFMADD213SSZm_Intkz |
| 33784 | { 8316, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62d4e8004819ULL }, // Inst #8316 = VFMADD213SSZm_Intk |
| 33785 | { 8315, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d4e8004819ULL }, // Inst #8315 = VFMADD213SSZm_Int |
| 33786 | { 8314, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60d4e8004819ULL }, // Inst #8314 = VFMADD213SSZm |
| 33787 | { 8313, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156d4e8014829ULL }, // Inst #8313 = VFMADD213SHZrb_Intkz |
| 33788 | { 8312, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152d4e8014829ULL }, // Inst #8312 = VFMADD213SHZrb_Intk |
| 33789 | { 8311, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150d4e8014829ULL }, // Inst #8311 = VFMADD213SHZrb_Int |
| 33790 | { 8310, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150d4e8014829ULL }, // Inst #8310 = VFMADD213SHZrb |
| 33791 | { 8309, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d4e8014829ULL }, // Inst #8309 = VFMADD213SHZr_Intkz |
| 33792 | { 8308, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d4e8014829ULL }, // Inst #8308 = VFMADD213SHZr_Intk |
| 33793 | { 8307, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d4e8014829ULL }, // Inst #8307 = VFMADD213SHZr_Int |
| 33794 | { 8306, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d4e8014829ULL }, // Inst #8306 = VFMADD213SHZr |
| 33795 | { 8305, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46d4e8014819ULL }, // Inst #8305 = VFMADD213SHZm_Intkz |
| 33796 | { 8304, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42d4e8014819ULL }, // Inst #8304 = VFMADD213SHZm_Intk |
| 33797 | { 8303, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d4e8014819ULL }, // Inst #8303 = VFMADD213SHZm_Int |
| 33798 | { 8302, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40d4e8014819ULL }, // Inst #8302 = VFMADD213SHZm |
| 33799 | { 8301, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4b0024829ULL }, // Inst #8301 = VFMADD213SDr_Int |
| 33800 | { 8300, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4b0024829ULL }, // Inst #8300 = VFMADD213SDr |
| 33801 | { 8299, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4b0024819ULL }, // Inst #8299 = VFMADD213SDm_Int |
| 33802 | { 8298, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd4b0024819ULL }, // Inst #8298 = VFMADD213SDm |
| 33803 | { 8297, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196d4f0024829ULL }, // Inst #8297 = VFMADD213SDZrb_Intkz |
| 33804 | { 8296, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192d4f0024829ULL }, // Inst #8296 = VFMADD213SDZrb_Intk |
| 33805 | { 8295, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190d4f0024829ULL }, // Inst #8295 = VFMADD213SDZrb_Int |
| 33806 | { 8294, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190d4f0024829ULL }, // Inst #8294 = VFMADD213SDZrb |
| 33807 | { 8293, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d4f0024829ULL }, // Inst #8293 = VFMADD213SDZr_Intkz |
| 33808 | { 8292, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d4f0024829ULL }, // Inst #8292 = VFMADD213SDZr_Intk |
| 33809 | { 8291, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d4f0024829ULL }, // Inst #8291 = VFMADD213SDZr_Int |
| 33810 | { 8290, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d4f0024829ULL }, // Inst #8290 = VFMADD213SDZr |
| 33811 | { 8289, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86d4f0024819ULL }, // Inst #8289 = VFMADD213SDZm_Intkz |
| 33812 | { 8288, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82d4f0024819ULL }, // Inst #8288 = VFMADD213SDZm_Intk |
| 33813 | { 8287, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d4f0024819ULL }, // Inst #8287 = VFMADD213SDZm_Int |
| 33814 | { 8286, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80d4f0024819ULL }, // Inst #8286 = VFMADD213SDZm |
| 33815 | { 8285, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd428004829ULL }, // Inst #8285 = VFMADD213PSr |
| 33816 | { 8284, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd428004819ULL }, // Inst #8284 = VFMADD213PSm |
| 33817 | { 8283, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed468004829ULL }, // Inst #8283 = VFMADD213PSZrkz |
| 33818 | { 8282, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead468004829ULL }, // Inst #8282 = VFMADD213PSZrk |
| 33819 | { 8281, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ed468004829ULL }, // Inst #8281 = VFMADD213PSZrbkz |
| 33820 | { 8280, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ad468004829ULL }, // Inst #8280 = VFMADD213PSZrbk |
| 33821 | { 8279, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178d468004829ULL }, // Inst #8279 = VFMADD213PSZrb |
| 33822 | { 8278, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d468004829ULL }, // Inst #8278 = VFMADD213PSZr |
| 33823 | { 8277, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed468004819ULL }, // Inst #8277 = VFMADD213PSZmkz |
| 33824 | { 8276, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead468004819ULL }, // Inst #8276 = VFMADD213PSZmk |
| 33825 | { 8275, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ed468004819ULL }, // Inst #8275 = VFMADD213PSZmbkz |
| 33826 | { 8274, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ad468004819ULL }, // Inst #8274 = VFMADD213PSZmbk |
| 33827 | { 8273, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78d468004819ULL }, // Inst #8273 = VFMADD213PSZmb |
| 33828 | { 8272, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d468004819ULL }, // Inst #8272 = VFMADD213PSZm |
| 33829 | { 8271, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d468004829ULL }, // Inst #8271 = VFMADD213PSZ256rkz |
| 33830 | { 8270, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d468004829ULL }, // Inst #8270 = VFMADD213PSZ256rk |
| 33831 | { 8269, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d468004829ULL }, // Inst #8269 = VFMADD213PSZ256r |
| 33832 | { 8268, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d468004819ULL }, // Inst #8268 = VFMADD213PSZ256mkz |
| 33833 | { 8267, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d468004819ULL }, // Inst #8267 = VFMADD213PSZ256mk |
| 33834 | { 8266, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77d468004819ULL }, // Inst #8266 = VFMADD213PSZ256mbkz |
| 33835 | { 8265, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73d468004819ULL }, // Inst #8265 = VFMADD213PSZ256mbk |
| 33836 | { 8264, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71d468004819ULL }, // Inst #8264 = VFMADD213PSZ256mb |
| 33837 | { 8263, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d468004819ULL }, // Inst #8263 = VFMADD213PSZ256m |
| 33838 | { 8262, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d468004829ULL }, // Inst #8262 = VFMADD213PSZ128rkz |
| 33839 | { 8261, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d468004829ULL }, // Inst #8261 = VFMADD213PSZ128rk |
| 33840 | { 8260, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d468004829ULL }, // Inst #8260 = VFMADD213PSZ128r |
| 33841 | { 8259, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d468004819ULL }, // Inst #8259 = VFMADD213PSZ128mkz |
| 33842 | { 8258, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d468004819ULL }, // Inst #8258 = VFMADD213PSZ128mk |
| 33843 | { 8257, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76d468004819ULL }, // Inst #8257 = VFMADD213PSZ128mbkz |
| 33844 | { 8256, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72d468004819ULL }, // Inst #8256 = VFMADD213PSZ128mbk |
| 33845 | { 8255, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70d468004819ULL }, // Inst #8255 = VFMADD213PSZ128mb |
| 33846 | { 8254, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d468004819ULL }, // Inst #8254 = VFMADD213PSZ128m |
| 33847 | { 8253, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d428004829ULL }, // Inst #8253 = VFMADD213PSYr |
| 33848 | { 8252, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d428004819ULL }, // Inst #8252 = VFMADD213PSYm |
| 33849 | { 8251, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed468014829ULL }, // Inst #8251 = VFMADD213PHZrkz |
| 33850 | { 8250, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead468014829ULL }, // Inst #8250 = VFMADD213PHZrk |
| 33851 | { 8249, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ed468014829ULL }, // Inst #8249 = VFMADD213PHZrbkz |
| 33852 | { 8248, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ad468014829ULL }, // Inst #8248 = VFMADD213PHZrbk |
| 33853 | { 8247, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158d468014829ULL }, // Inst #8247 = VFMADD213PHZrb |
| 33854 | { 8246, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d468014829ULL }, // Inst #8246 = VFMADD213PHZr |
| 33855 | { 8245, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed468014819ULL }, // Inst #8245 = VFMADD213PHZmkz |
| 33856 | { 8244, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead468014819ULL }, // Inst #8244 = VFMADD213PHZmk |
| 33857 | { 8243, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ed468014819ULL }, // Inst #8243 = VFMADD213PHZmbkz |
| 33858 | { 8242, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ad468014819ULL }, // Inst #8242 = VFMADD213PHZmbk |
| 33859 | { 8241, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58d468014819ULL }, // Inst #8241 = VFMADD213PHZmb |
| 33860 | { 8240, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d468014819ULL }, // Inst #8240 = VFMADD213PHZm |
| 33861 | { 8239, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d468014829ULL }, // Inst #8239 = VFMADD213PHZ256rkz |
| 33862 | { 8238, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d468014829ULL }, // Inst #8238 = VFMADD213PHZ256rk |
| 33863 | { 8237, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d468014829ULL }, // Inst #8237 = VFMADD213PHZ256r |
| 33864 | { 8236, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d468014819ULL }, // Inst #8236 = VFMADD213PHZ256mkz |
| 33865 | { 8235, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d468014819ULL }, // Inst #8235 = VFMADD213PHZ256mk |
| 33866 | { 8234, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57d468014819ULL }, // Inst #8234 = VFMADD213PHZ256mbkz |
| 33867 | { 8233, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53d468014819ULL }, // Inst #8233 = VFMADD213PHZ256mbk |
| 33868 | { 8232, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51d468014819ULL }, // Inst #8232 = VFMADD213PHZ256mb |
| 33869 | { 8231, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d468014819ULL }, // Inst #8231 = VFMADD213PHZ256m |
| 33870 | { 8230, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d468014829ULL }, // Inst #8230 = VFMADD213PHZ128rkz |
| 33871 | { 8229, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d468014829ULL }, // Inst #8229 = VFMADD213PHZ128rk |
| 33872 | { 8228, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d468014829ULL }, // Inst #8228 = VFMADD213PHZ128r |
| 33873 | { 8227, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d468014819ULL }, // Inst #8227 = VFMADD213PHZ128mkz |
| 33874 | { 8226, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d468014819ULL }, // Inst #8226 = VFMADD213PHZ128mk |
| 33875 | { 8225, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56d468014819ULL }, // Inst #8225 = VFMADD213PHZ128mbkz |
| 33876 | { 8224, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52d468014819ULL }, // Inst #8224 = VFMADD213PHZ128mbk |
| 33877 | { 8223, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50d468014819ULL }, // Inst #8223 = VFMADD213PHZ128mb |
| 33878 | { 8222, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d468014819ULL }, // Inst #8222 = VFMADD213PHZ128m |
| 33879 | { 8221, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd430024829ULL }, // Inst #8221 = VFMADD213PDr |
| 33880 | { 8220, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xd430024819ULL }, // Inst #8220 = VFMADD213PDm |
| 33881 | { 8219, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed470024829ULL }, // Inst #8219 = VFMADD213PDZrkz |
| 33882 | { 8218, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xead470024829ULL }, // Inst #8218 = VFMADD213PDZrk |
| 33883 | { 8217, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ed470024829ULL }, // Inst #8217 = VFMADD213PDZrbkz |
| 33884 | { 8216, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ad470024829ULL }, // Inst #8216 = VFMADD213PDZrbk |
| 33885 | { 8215, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198d470024829ULL }, // Inst #8215 = VFMADD213PDZrb |
| 33886 | { 8214, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d470024829ULL }, // Inst #8214 = VFMADD213PDZr |
| 33887 | { 8213, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeed470024819ULL }, // Inst #8213 = VFMADD213PDZmkz |
| 33888 | { 8212, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xead470024819ULL }, // Inst #8212 = VFMADD213PDZmk |
| 33889 | { 8211, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ed470024819ULL }, // Inst #8211 = VFMADD213PDZmbkz |
| 33890 | { 8210, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ad470024819ULL }, // Inst #8210 = VFMADD213PDZmbk |
| 33891 | { 8209, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98d470024819ULL }, // Inst #8209 = VFMADD213PDZmb |
| 33892 | { 8208, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8d470024819ULL }, // Inst #8208 = VFMADD213PDZm |
| 33893 | { 8207, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d470024829ULL }, // Inst #8207 = VFMADD213PDZ256rkz |
| 33894 | { 8206, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3d470024829ULL }, // Inst #8206 = VFMADD213PDZ256rk |
| 33895 | { 8205, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d470024829ULL }, // Inst #8205 = VFMADD213PDZ256r |
| 33896 | { 8204, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7d470024819ULL }, // Inst #8204 = VFMADD213PDZ256mkz |
| 33897 | { 8203, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3d470024819ULL }, // Inst #8203 = VFMADD213PDZ256mk |
| 33898 | { 8202, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97d470024819ULL }, // Inst #8202 = VFMADD213PDZ256mbkz |
| 33899 | { 8201, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93d470024819ULL }, // Inst #8201 = VFMADD213PDZ256mbk |
| 33900 | { 8200, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91d470024819ULL }, // Inst #8200 = VFMADD213PDZ256mb |
| 33901 | { 8199, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1d470024819ULL }, // Inst #8199 = VFMADD213PDZ256m |
| 33902 | { 8198, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d470024829ULL }, // Inst #8198 = VFMADD213PDZ128rkz |
| 33903 | { 8197, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2d470024829ULL }, // Inst #8197 = VFMADD213PDZ128rk |
| 33904 | { 8196, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d470024829ULL }, // Inst #8196 = VFMADD213PDZ128r |
| 33905 | { 8195, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6d470024819ULL }, // Inst #8195 = VFMADD213PDZ128mkz |
| 33906 | { 8194, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d470024819ULL }, // Inst #8194 = VFMADD213PDZ128mk |
| 33907 | { 8193, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96d470024819ULL }, // Inst #8193 = VFMADD213PDZ128mbkz |
| 33908 | { 8192, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92d470024819ULL }, // Inst #8192 = VFMADD213PDZ128mbk |
| 33909 | { 8191, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90d470024819ULL }, // Inst #8191 = VFMADD213PDZ128mb |
| 33910 | { 8190, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0d470024819ULL }, // Inst #8190 = VFMADD213PDZ128m |
| 33911 | { 8189, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d430024829ULL }, // Inst #8189 = VFMADD213PDYr |
| 33912 | { 8188, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1d430024819ULL }, // Inst #8188 = VFMADD213PDYm |
| 33913 | { 8187, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcca8004829ULL }, // Inst #8187 = VFMADD132SSr_Int |
| 33914 | { 8186, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3796, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcca8004829ULL }, // Inst #8186 = VFMADD132SSr |
| 33915 | { 8185, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcca8004819ULL }, // Inst #8185 = VFMADD132SSm_Int |
| 33916 | { 8184, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3788, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcca8004819ULL }, // Inst #8184 = VFMADD132SSm |
| 33917 | { 8183, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x176cce8004829ULL }, // Inst #8183 = VFMADD132SSZrb_Intkz |
| 33918 | { 8182, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x172cce8004829ULL }, // Inst #8182 = VFMADD132SSZrb_Intk |
| 33919 | { 8181, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x170cce8004829ULL }, // Inst #8181 = VFMADD132SSZrb_Int |
| 33920 | { 8180, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3783, 0|(1ULL<<MCID::Commutable), 0x170cce8004829ULL }, // Inst #8180 = VFMADD132SSZrb |
| 33921 | { 8179, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cce8004829ULL }, // Inst #8179 = VFMADD132SSZr_Intkz |
| 33922 | { 8178, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cce8004829ULL }, // Inst #8178 = VFMADD132SSZr_Intk |
| 33923 | { 8177, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cce8004829ULL }, // Inst #8177 = VFMADD132SSZr_Int |
| 33924 | { 8176, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3779, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cce8004829ULL }, // Inst #8176 = VFMADD132SSZr |
| 33925 | { 8175, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x66cce8004819ULL }, // Inst #8175 = VFMADD132SSZm_Intkz |
| 33926 | { 8174, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x62cce8004819ULL }, // Inst #8174 = VFMADD132SSZm_Intk |
| 33927 | { 8173, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cce8004819ULL }, // Inst #8173 = VFMADD132SSZm_Int |
| 33928 | { 8172, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3771, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60cce8004819ULL }, // Inst #8172 = VFMADD132SSZm |
| 33929 | { 8171, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x156cce8014829ULL }, // Inst #8171 = VFMADD132SHZrb_Intkz |
| 33930 | { 8170, 6, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x152cce8014829ULL }, // Inst #8170 = VFMADD132SHZrb_Intk |
| 33931 | { 8169, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x150cce8014829ULL }, // Inst #8169 = VFMADD132SHZrb_Int |
| 33932 | { 8168, 5, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3766, 0|(1ULL<<MCID::Commutable), 0x150cce8014829ULL }, // Inst #8168 = VFMADD132SHZrb |
| 33933 | { 8167, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cce8014829ULL }, // Inst #8167 = VFMADD132SHZr_Intkz |
| 33934 | { 8166, 5, 1, 0, 1871, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cce8014829ULL }, // Inst #8166 = VFMADD132SHZr_Intk |
| 33935 | { 8165, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cce8014829ULL }, // Inst #8165 = VFMADD132SHZr_Int |
| 33936 | { 8164, 4, 1, 0, 1742, 1, 0, X86ImpOpBase + 78, 3762, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cce8014829ULL }, // Inst #8164 = VFMADD132SHZr |
| 33937 | { 8163, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x46cce8014819ULL }, // Inst #8163 = VFMADD132SHZm_Intkz |
| 33938 | { 8162, 9, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x42cce8014819ULL }, // Inst #8162 = VFMADD132SHZm_Intk |
| 33939 | { 8161, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cce8014819ULL }, // Inst #8161 = VFMADD132SHZm_Int |
| 33940 | { 8160, 8, 1, 0, 1732, 1, 0, X86ImpOpBase + 78, 3754, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40cce8014819ULL }, // Inst #8160 = VFMADD132SHZm |
| 33941 | { 8159, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xccb0024829ULL }, // Inst #8159 = VFMADD132SDr_Int |
| 33942 | { 8158, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3750, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xccb0024829ULL }, // Inst #8158 = VFMADD132SDr |
| 33943 | { 8157, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xccb0024819ULL }, // Inst #8157 = VFMADD132SDm_Int |
| 33944 | { 8156, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3742, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xccb0024819ULL }, // Inst #8156 = VFMADD132SDm |
| 33945 | { 8155, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x196ccf0024829ULL }, // Inst #8155 = VFMADD132SDZrb_Intkz |
| 33946 | { 8154, 6, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1934, 0|(1ULL<<MCID::Commutable), 0x192ccf0024829ULL }, // Inst #8154 = VFMADD132SDZrb_Intk |
| 33947 | { 8153, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3737, 0|(1ULL<<MCID::Commutable), 0x190ccf0024829ULL }, // Inst #8153 = VFMADD132SDZrb_Int |
| 33948 | { 8152, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3732, 0|(1ULL<<MCID::Commutable), 0x190ccf0024829ULL }, // Inst #8152 = VFMADD132SDZrb |
| 33949 | { 8151, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86ccf0024829ULL }, // Inst #8151 = VFMADD132SDZr_Intkz |
| 33950 | { 8150, 5, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82ccf0024829ULL }, // Inst #8150 = VFMADD132SDZr_Intk |
| 33951 | { 8149, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ccf0024829ULL }, // Inst #8149 = VFMADD132SDZr_Int |
| 33952 | { 8148, 4, 1, 0, 440, 1, 0, X86ImpOpBase + 78, 3728, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ccf0024829ULL }, // Inst #8148 = VFMADD132SDZr |
| 33953 | { 8147, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x86ccf0024819ULL }, // Inst #8147 = VFMADD132SDZm_Intkz |
| 33954 | { 8146, 9, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x82ccf0024819ULL }, // Inst #8146 = VFMADD132SDZm_Intk |
| 33955 | { 8145, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ccf0024819ULL }, // Inst #8145 = VFMADD132SDZm_Int |
| 33956 | { 8144, 8, 1, 0, 439, 1, 0, X86ImpOpBase + 78, 3720, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ccf0024819ULL }, // Inst #8144 = VFMADD132SDZm |
| 33957 | { 8143, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcc28004829ULL }, // Inst #8143 = VFMADD132PSr |
| 33958 | { 8142, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcc28004819ULL }, // Inst #8142 = VFMADD132PSm |
| 33959 | { 8141, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc68004829ULL }, // Inst #8141 = VFMADD132PSZrkz |
| 33960 | { 8140, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacc68004829ULL }, // Inst #8140 = VFMADD132PSZrk |
| 33961 | { 8139, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17ecc68004829ULL }, // Inst #8139 = VFMADD132PSZrbkz |
| 33962 | { 8138, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1883, 0|(1ULL<<MCID::Commutable), 0x17acc68004829ULL }, // Inst #8138 = VFMADD132PSZrbk |
| 33963 | { 8137, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x178cc68004829ULL }, // Inst #8137 = VFMADD132PSZrb |
| 33964 | { 8136, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc68004829ULL }, // Inst #8136 = VFMADD132PSZr |
| 33965 | { 8135, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc68004819ULL }, // Inst #8135 = VFMADD132PSZmkz |
| 33966 | { 8134, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacc68004819ULL }, // Inst #8134 = VFMADD132PSZmk |
| 33967 | { 8133, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x7ecc68004819ULL }, // Inst #8133 = VFMADD132PSZmbkz |
| 33968 | { 8132, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7acc68004819ULL }, // Inst #8132 = VFMADD132PSZmbk |
| 33969 | { 8131, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x78cc68004819ULL }, // Inst #8131 = VFMADD132PSZmb |
| 33970 | { 8130, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc68004819ULL }, // Inst #8130 = VFMADD132PSZm |
| 33971 | { 8129, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc68004829ULL }, // Inst #8129 = VFMADD132PSZ256rkz |
| 33972 | { 8128, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cc68004829ULL }, // Inst #8128 = VFMADD132PSZ256rk |
| 33973 | { 8127, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc68004829ULL }, // Inst #8127 = VFMADD132PSZ256r |
| 33974 | { 8126, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc68004819ULL }, // Inst #8126 = VFMADD132PSZ256mkz |
| 33975 | { 8125, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cc68004819ULL }, // Inst #8125 = VFMADD132PSZ256mk |
| 33976 | { 8124, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x77cc68004819ULL }, // Inst #8124 = VFMADD132PSZ256mbkz |
| 33977 | { 8123, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73cc68004819ULL }, // Inst #8123 = VFMADD132PSZ256mbk |
| 33978 | { 8122, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x71cc68004819ULL }, // Inst #8122 = VFMADD132PSZ256mb |
| 33979 | { 8121, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc68004819ULL }, // Inst #8121 = VFMADD132PSZ256m |
| 33980 | { 8120, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc68004829ULL }, // Inst #8120 = VFMADD132PSZ128rkz |
| 33981 | { 8119, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cc68004829ULL }, // Inst #8119 = VFMADD132PSZ128rk |
| 33982 | { 8118, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc68004829ULL }, // Inst #8118 = VFMADD132PSZ128r |
| 33983 | { 8117, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc68004819ULL }, // Inst #8117 = VFMADD132PSZ128mkz |
| 33984 | { 8116, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cc68004819ULL }, // Inst #8116 = VFMADD132PSZ128mk |
| 33985 | { 8115, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x76cc68004819ULL }, // Inst #8115 = VFMADD132PSZ128mbkz |
| 33986 | { 8114, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72cc68004819ULL }, // Inst #8114 = VFMADD132PSZ128mbk |
| 33987 | { 8113, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x70cc68004819ULL }, // Inst #8113 = VFMADD132PSZ128mb |
| 33988 | { 8112, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc68004819ULL }, // Inst #8112 = VFMADD132PSZ128m |
| 33989 | { 8111, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cc28004829ULL }, // Inst #8111 = VFMADD132PSYr |
| 33990 | { 8110, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cc28004819ULL }, // Inst #8110 = VFMADD132PSYm |
| 33991 | { 8109, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc68014829ULL }, // Inst #8109 = VFMADD132PHZrkz |
| 33992 | { 8108, 5, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacc68014829ULL }, // Inst #8108 = VFMADD132PHZrk |
| 33993 | { 8107, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15ecc68014829ULL }, // Inst #8107 = VFMADD132PHZrbkz |
| 33994 | { 8106, 6, 1, 0, 1890, 1, 0, X86ImpOpBase + 78, 1803, 0|(1ULL<<MCID::Commutable), 0x15acc68014829ULL }, // Inst #8106 = VFMADD132PHZrbk |
| 33995 | { 8105, 5, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x158cc68014829ULL }, // Inst #8105 = VFMADD132PHZrb |
| 33996 | { 8104, 4, 1, 0, 1883, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc68014829ULL }, // Inst #8104 = VFMADD132PHZr |
| 33997 | { 8103, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc68014819ULL }, // Inst #8103 = VFMADD132PHZmkz |
| 33998 | { 8102, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacc68014819ULL }, // Inst #8102 = VFMADD132PHZmk |
| 33999 | { 8101, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x5ecc68014819ULL }, // Inst #8101 = VFMADD132PHZmbkz |
| 34000 | { 8100, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5acc68014819ULL }, // Inst #8100 = VFMADD132PHZmbk |
| 34001 | { 8099, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x58cc68014819ULL }, // Inst #8099 = VFMADD132PHZmb |
| 34002 | { 8098, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc68014819ULL }, // Inst #8098 = VFMADD132PHZm |
| 34003 | { 8097, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc68014829ULL }, // Inst #8097 = VFMADD132PHZ256rkz |
| 34004 | { 8096, 5, 1, 0, 1870, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cc68014829ULL }, // Inst #8096 = VFMADD132PHZ256rk |
| 34005 | { 8095, 4, 1, 0, 1741, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc68014829ULL }, // Inst #8095 = VFMADD132PHZ256r |
| 34006 | { 8094, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc68014819ULL }, // Inst #8094 = VFMADD132PHZ256mkz |
| 34007 | { 8093, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cc68014819ULL }, // Inst #8093 = VFMADD132PHZ256mk |
| 34008 | { 8092, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x57cc68014819ULL }, // Inst #8092 = VFMADD132PHZ256mbkz |
| 34009 | { 8091, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53cc68014819ULL }, // Inst #8091 = VFMADD132PHZ256mbk |
| 34010 | { 8090, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x51cc68014819ULL }, // Inst #8090 = VFMADD132PHZ256mb |
| 34011 | { 8089, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc68014819ULL }, // Inst #8089 = VFMADD132PHZ256m |
| 34012 | { 8088, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc68014829ULL }, // Inst #8088 = VFMADD132PHZ128rkz |
| 34013 | { 8087, 5, 1, 0, 1869, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cc68014829ULL }, // Inst #8087 = VFMADD132PHZ128rk |
| 34014 | { 8086, 4, 1, 0, 1740, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc68014829ULL }, // Inst #8086 = VFMADD132PHZ128r |
| 34015 | { 8085, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc68014819ULL }, // Inst #8085 = VFMADD132PHZ128mkz |
| 34016 | { 8084, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cc68014819ULL }, // Inst #8084 = VFMADD132PHZ128mk |
| 34017 | { 8083, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x56cc68014819ULL }, // Inst #8083 = VFMADD132PHZ128mbkz |
| 34018 | { 8082, 9, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52cc68014819ULL }, // Inst #8082 = VFMADD132PHZ128mbk |
| 34019 | { 8081, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x50cc68014819ULL }, // Inst #8081 = VFMADD132PHZ128mb |
| 34020 | { 8080, 8, 1, 0, 1731, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc68014819ULL }, // Inst #8080 = VFMADD132PHZ128m |
| 34021 | { 8079, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3716, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcc30024829ULL }, // Inst #8079 = VFMADD132PDr |
| 34022 | { 8078, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 3708, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xcc30024819ULL }, // Inst #8078 = VFMADD132PDm |
| 34023 | { 8077, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc70024829ULL }, // Inst #8077 = VFMADD132PDZrkz |
| 34024 | { 8076, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeacc70024829ULL }, // Inst #8076 = VFMADD132PDZrk |
| 34025 | { 8075, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19ecc70024829ULL }, // Inst #8075 = VFMADD132PDZrbkz |
| 34026 | { 8074, 6, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 1704, 0|(1ULL<<MCID::Commutable), 0x19acc70024829ULL }, // Inst #8074 = VFMADD132PDZrbk |
| 34027 | { 8073, 5, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3703, 0|(1ULL<<MCID::Commutable), 0x198cc70024829ULL }, // Inst #8073 = VFMADD132PDZrb |
| 34028 | { 8072, 4, 1, 0, 432, 1, 0, X86ImpOpBase + 78, 3313, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc70024829ULL }, // Inst #8072 = VFMADD132PDZr |
| 34029 | { 8071, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeecc70024819ULL }, // Inst #8071 = VFMADD132PDZmkz |
| 34030 | { 8070, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeacc70024819ULL }, // Inst #8070 = VFMADD132PDZmk |
| 34031 | { 8069, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x9ecc70024819ULL }, // Inst #8069 = VFMADD132PDZmbkz |
| 34032 | { 8068, 9, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9acc70024819ULL }, // Inst #8068 = VFMADD132PDZmbk |
| 34033 | { 8067, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x98cc70024819ULL }, // Inst #8067 = VFMADD132PDZmb |
| 34034 | { 8066, 8, 1, 0, 438, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8cc70024819ULL }, // Inst #8066 = VFMADD132PDZm |
| 34035 | { 8065, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc70024829ULL }, // Inst #8065 = VFMADD132PDZ256rkz |
| 34036 | { 8064, 5, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3cc70024829ULL }, // Inst #8064 = VFMADD132PDZ256rk |
| 34037 | { 8063, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3309, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc70024829ULL }, // Inst #8063 = VFMADD132PDZ256r |
| 34038 | { 8062, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7cc70024819ULL }, // Inst #8062 = VFMADD132PDZ256mkz |
| 34039 | { 8061, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3cc70024819ULL }, // Inst #8061 = VFMADD132PDZ256mk |
| 34040 | { 8060, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x97cc70024819ULL }, // Inst #8060 = VFMADD132PDZ256mbkz |
| 34041 | { 8059, 9, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93cc70024819ULL }, // Inst #8059 = VFMADD132PDZ256mbk |
| 34042 | { 8058, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x91cc70024819ULL }, // Inst #8058 = VFMADD132PDZ256mb |
| 34043 | { 8057, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3301, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1cc70024819ULL }, // Inst #8057 = VFMADD132PDZ256m |
| 34044 | { 8056, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc70024829ULL }, // Inst #8056 = VFMADD132PDZ128rkz |
| 34045 | { 8055, 5, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2cc70024829ULL }, // Inst #8055 = VFMADD132PDZ128rk |
| 34046 | { 8054, 4, 1, 0, 428, 1, 0, X86ImpOpBase + 78, 3297, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc70024829ULL }, // Inst #8054 = VFMADD132PDZ128r |
| 34047 | { 8053, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6cc70024819ULL }, // Inst #8053 = VFMADD132PDZ128mkz |
| 34048 | { 8052, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cc70024819ULL }, // Inst #8052 = VFMADD132PDZ128mk |
| 34049 | { 8051, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x96cc70024819ULL }, // Inst #8051 = VFMADD132PDZ128mbkz |
| 34050 | { 8050, 9, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92cc70024819ULL }, // Inst #8050 = VFMADD132PDZ128mbk |
| 34051 | { 8049, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x90cc70024819ULL }, // Inst #8049 = VFMADD132PDZ128mb |
| 34052 | { 8048, 8, 1, 0, 437, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0cc70024819ULL }, // Inst #8048 = VFMADD132PDZ128m |
| 34053 | { 8047, 4, 1, 0, 430, 1, 0, X86ImpOpBase + 78, 3699, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cc30024829ULL }, // Inst #8047 = VFMADD132PDYr |
| 34054 | { 8046, 8, 1, 0, 436, 1, 0, X86ImpOpBase + 78, 3691, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1cc30024819ULL }, // Inst #8046 = VFMADD132PDYm |
| 34055 | { 8045, 6, 1, 0, 1076, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x66aae8046829ULL }, // Inst #8045 = VFIXUPIMMSSZrrikz |
| 34056 | { 8044, 6, 1, 0, 1076, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x62aae8046829ULL }, // Inst #8044 = VFIXUPIMMSSZrrik |
| 34057 | { 8043, 6, 1, 0, 2032, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x76aae8046829ULL }, // Inst #8043 = VFIXUPIMMSSZrribkz |
| 34058 | { 8042, 6, 1, 0, 2032, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x72aae8046829ULL }, // Inst #8042 = VFIXUPIMMSSZrribk |
| 34059 | { 8041, 5, 1, 0, 2032, 1, 0, X86ImpOpBase + 78, 3642, 0, 0x70aae8046829ULL }, // Inst #8041 = VFIXUPIMMSSZrrib |
| 34060 | { 8040, 5, 1, 0, 2027, 1, 0, X86ImpOpBase + 78, 3642, 0|(1ULL<<MCID::MayRaiseFPException), 0x60aae8046829ULL }, // Inst #8040 = VFIXUPIMMSSZrri |
| 34061 | { 8039, 10, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66aae8046819ULL }, // Inst #8039 = VFIXUPIMMSSZrmikz |
| 34062 | { 8038, 10, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62aae8046819ULL }, // Inst #8038 = VFIXUPIMMSSZrmik |
| 34063 | { 8037, 9, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 3633, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60aae8046819ULL }, // Inst #8037 = VFIXUPIMMSSZrmi |
| 34064 | { 8036, 6, 1, 0, 1076, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x86aaf0066829ULL }, // Inst #8036 = VFIXUPIMMSDZrrikz |
| 34065 | { 8035, 6, 1, 0, 1076, 1, 0, X86ImpOpBase + 78, 3685, 0|(1ULL<<MCID::MayRaiseFPException), 0x82aaf0066829ULL }, // Inst #8035 = VFIXUPIMMSDZrrik |
| 34066 | { 8034, 6, 1, 0, 2032, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x96aaf0066829ULL }, // Inst #8034 = VFIXUPIMMSDZrribkz |
| 34067 | { 8033, 6, 1, 0, 2032, 1, 0, X86ImpOpBase + 78, 3685, 0, 0x92aaf0066829ULL }, // Inst #8033 = VFIXUPIMMSDZrribk |
| 34068 | { 8032, 5, 1, 0, 2032, 1, 0, X86ImpOpBase + 78, 3642, 0, 0x90aaf0066829ULL }, // Inst #8032 = VFIXUPIMMSDZrrib |
| 34069 | { 8031, 5, 1, 0, 2027, 1, 0, X86ImpOpBase + 78, 3642, 0|(1ULL<<MCID::MayRaiseFPException), 0x80aaf0066829ULL }, // Inst #8031 = VFIXUPIMMSDZrri |
| 34070 | { 8030, 10, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86aaf0066819ULL }, // Inst #8030 = VFIXUPIMMSDZrmikz |
| 34071 | { 8029, 10, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 3675, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82aaf0066819ULL }, // Inst #8029 = VFIXUPIMMSDZrmik |
| 34072 | { 8028, 9, 1, 0, 2015, 1, 0, X86ImpOpBase + 78, 3633, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80aaf0066819ULL }, // Inst #8028 = VFIXUPIMMSDZrmi |
| 34073 | { 8027, 6, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2088, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaa68046829ULL }, // Inst #8027 = VFIXUPIMMPSZrrikz |
| 34074 | { 8026, 6, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2088, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaa68046829ULL }, // Inst #8026 = VFIXUPIMMPSZrrik |
| 34075 | { 8025, 6, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2088, 0, 0x7eaa68046829ULL }, // Inst #8025 = VFIXUPIMMPSZrribkz |
| 34076 | { 8024, 6, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2088, 0, 0x7aaa68046829ULL }, // Inst #8024 = VFIXUPIMMPSZrribk |
| 34077 | { 8023, 5, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 3670, 0, 0x78aa68046829ULL }, // Inst #8023 = VFIXUPIMMPSZrrib |
| 34078 | { 8022, 5, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 3670, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aa68046829ULL }, // Inst #8022 = VFIXUPIMMPSZrri |
| 34079 | { 8021, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2069, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaa68046819ULL }, // Inst #8021 = VFIXUPIMMPSZrmikz |
| 34080 | { 8020, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2069, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaa68046819ULL }, // Inst #8020 = VFIXUPIMMPSZrmik |
| 34081 | { 8019, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 3661, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aa68046819ULL }, // Inst #8019 = VFIXUPIMMPSZrmi |
| 34082 | { 8018, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2069, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eaa68046819ULL }, // Inst #8018 = VFIXUPIMMPSZrmbikz |
| 34083 | { 8017, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2069, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aaa68046819ULL }, // Inst #8017 = VFIXUPIMMPSZrmbik |
| 34084 | { 8016, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 3661, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78aa68046819ULL }, // Inst #8016 = VFIXUPIMMPSZrmbi |
| 34085 | { 8015, 6, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 2050, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aa68046829ULL }, // Inst #8015 = VFIXUPIMMPSZ256rrikz |
| 34086 | { 8014, 6, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 2050, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aa68046829ULL }, // Inst #8014 = VFIXUPIMMPSZ256rrik |
| 34087 | { 8013, 5, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 3656, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aa68046829ULL }, // Inst #8013 = VFIXUPIMMPSZ256rri |
| 34088 | { 8012, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2031, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aa68046819ULL }, // Inst #8012 = VFIXUPIMMPSZ256rmikz |
| 34089 | { 8011, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2031, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aa68046819ULL }, // Inst #8011 = VFIXUPIMMPSZ256rmik |
| 34090 | { 8010, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 3647, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aa68046819ULL }, // Inst #8010 = VFIXUPIMMPSZ256rmi |
| 34091 | { 8009, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2031, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77aa68046819ULL }, // Inst #8009 = VFIXUPIMMPSZ256rmbikz |
| 34092 | { 8008, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2031, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73aa68046819ULL }, // Inst #8008 = VFIXUPIMMPSZ256rmbik |
| 34093 | { 8007, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 3647, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71aa68046819ULL }, // Inst #8007 = VFIXUPIMMPSZ256rmbi |
| 34094 | { 8006, 6, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 2012, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aa68046829ULL }, // Inst #8006 = VFIXUPIMMPSZ128rrikz |
| 34095 | { 8005, 6, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 2012, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aa68046829ULL }, // Inst #8005 = VFIXUPIMMPSZ128rrik |
| 34096 | { 8004, 5, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 3642, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aa68046829ULL }, // Inst #8004 = VFIXUPIMMPSZ128rri |
| 34097 | { 8003, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1993, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aa68046819ULL }, // Inst #8003 = VFIXUPIMMPSZ128rmikz |
| 34098 | { 8002, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1993, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aa68046819ULL }, // Inst #8002 = VFIXUPIMMPSZ128rmik |
| 34099 | { 8001, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 3633, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aa68046819ULL }, // Inst #8001 = VFIXUPIMMPSZ128rmi |
| 34100 | { 8000, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1993, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76aa68046819ULL }, // Inst #8000 = VFIXUPIMMPSZ128rmbikz |
| 34101 | { 7999, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 1993, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72aa68046819ULL }, // Inst #7999 = VFIXUPIMMPSZ128rmbik |
| 34102 | { 7998, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 3633, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70aa68046819ULL }, // Inst #7998 = VFIXUPIMMPSZ128rmbi |
| 34103 | { 7997, 6, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2178, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaa70066829ULL }, // Inst #7997 = VFIXUPIMMPDZrrikz |
| 34104 | { 7996, 6, 1, 0, 1075, 1, 0, X86ImpOpBase + 78, 2178, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaa70066829ULL }, // Inst #7996 = VFIXUPIMMPDZrrik |
| 34105 | { 7995, 6, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2178, 0, 0x9eaa70066829ULL }, // Inst #7995 = VFIXUPIMMPDZrribkz |
| 34106 | { 7994, 6, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2178, 0, 0x9aaa70066829ULL }, // Inst #7994 = VFIXUPIMMPDZrribk |
| 34107 | { 7993, 5, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 3670, 0, 0x98aa70066829ULL }, // Inst #7993 = VFIXUPIMMPDZrrib |
| 34108 | { 7992, 5, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 3670, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8aa70066829ULL }, // Inst #7992 = VFIXUPIMMPDZrri |
| 34109 | { 7991, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaa70066819ULL }, // Inst #7991 = VFIXUPIMMPDZrmikz |
| 34110 | { 7990, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaa70066819ULL }, // Inst #7990 = VFIXUPIMMPDZrmik |
| 34111 | { 7989, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 3661, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8aa70066819ULL }, // Inst #7989 = VFIXUPIMMPDZrmi |
| 34112 | { 7988, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaa70066819ULL }, // Inst #7988 = VFIXUPIMMPDZrmbikz |
| 34113 | { 7987, 10, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2159, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaa70066819ULL }, // Inst #7987 = VFIXUPIMMPDZrmbik |
| 34114 | { 7986, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 3661, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98aa70066819ULL }, // Inst #7986 = VFIXUPIMMPDZrmbi |
| 34115 | { 7985, 6, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 2148, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7aa70066829ULL }, // Inst #7985 = VFIXUPIMMPDZ256rrikz |
| 34116 | { 7984, 6, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 2148, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3aa70066829ULL }, // Inst #7984 = VFIXUPIMMPDZ256rrik |
| 34117 | { 7983, 5, 1, 0, 1074, 1, 0, X86ImpOpBase + 78, 3656, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1aa70066829ULL }, // Inst #7983 = VFIXUPIMMPDZ256rri |
| 34118 | { 7982, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2129, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7aa70066819ULL }, // Inst #7982 = VFIXUPIMMPDZ256rmikz |
| 34119 | { 7981, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2129, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3aa70066819ULL }, // Inst #7981 = VFIXUPIMMPDZ256rmik |
| 34120 | { 7980, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 3647, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1aa70066819ULL }, // Inst #7980 = VFIXUPIMMPDZ256rmi |
| 34121 | { 7979, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2129, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97aa70066819ULL }, // Inst #7979 = VFIXUPIMMPDZ256rmbikz |
| 34122 | { 7978, 10, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 2129, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93aa70066819ULL }, // Inst #7978 = VFIXUPIMMPDZ256rmbik |
| 34123 | { 7977, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 3647, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91aa70066819ULL }, // Inst #7977 = VFIXUPIMMPDZ256rmbi |
| 34124 | { 7976, 6, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 2118, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6aa70066829ULL }, // Inst #7976 = VFIXUPIMMPDZ128rrikz |
| 34125 | { 7975, 6, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 2118, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2aa70066829ULL }, // Inst #7975 = VFIXUPIMMPDZ128rrik |
| 34126 | { 7974, 5, 1, 0, 1073, 1, 0, X86ImpOpBase + 78, 3642, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0aa70066829ULL }, // Inst #7974 = VFIXUPIMMPDZ128rri |
| 34127 | { 7973, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 2099, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6aa70066819ULL }, // Inst #7973 = VFIXUPIMMPDZ128rmikz |
| 34128 | { 7972, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 2099, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2aa70066819ULL }, // Inst #7972 = VFIXUPIMMPDZ128rmik |
| 34129 | { 7971, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 3633, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0aa70066819ULL }, // Inst #7971 = VFIXUPIMMPDZ128rmi |
| 34130 | { 7970, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 2099, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96aa70066819ULL }, // Inst #7970 = VFIXUPIMMPDZ128rmbikz |
| 34131 | { 7969, 10, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 2099, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92aa70066819ULL }, // Inst #7969 = VFIXUPIMMPDZ128rmbik |
| 34132 | { 7968, 9, 1, 0, 29, 1, 0, X86ImpOpBase + 78, 3633, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90aa70066819ULL }, // Inst #7968 = VFIXUPIMMPDZ128rmbi |
| 34133 | { 7967, 4, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3629, 0, 0x66ebe0015829ULL }, // Inst #7967 = VFCMULCSHZrrkz |
| 34134 | { 7966, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3624, 0, 0x62ebe0015829ULL }, // Inst #7966 = VFCMULCSHZrrk |
| 34135 | { 7965, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3619, 0, 0x176ebe0015829ULL }, // Inst #7965 = VFCMULCSHZrrbkz |
| 34136 | { 7964, 6, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3613, 0, 0x172ebe0015829ULL }, // Inst #7964 = VFCMULCSHZrrbk |
| 34137 | { 7963, 4, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3609, 0, 0x170ebe0015829ULL }, // Inst #7963 = VFCMULCSHZrrb |
| 34138 | { 7962, 3, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3532, 0, 0x60ebe0015829ULL }, // Inst #7962 = VFCMULCSHZrr |
| 34139 | { 7961, 8, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3601, 0|(1ULL<<MCID::MayLoad), 0x66ebe0015819ULL }, // Inst #7961 = VFCMULCSHZrmkz |
| 34140 | { 7960, 9, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3592, 0|(1ULL<<MCID::MayLoad), 0x62ebe0015819ULL }, // Inst #7960 = VFCMULCSHZrmk |
| 34141 | { 7959, 7, 1, 0, 2164, 1, 0, X86ImpOpBase + 78, 3517, 0|(1ULL<<MCID::MayLoad), 0x60ebe0015819ULL }, // Inst #7959 = VFCMULCSHZrm |
| 34142 | { 7958, 4, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3588, 0, 0xeeeb68015829ULL }, // Inst #7958 = VFCMULCPHZrrkz |
| 34143 | { 7957, 5, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3501, 0, 0xeaeb68015829ULL }, // Inst #7957 = VFCMULCPHZrrk |
| 34144 | { 7956, 5, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3583, 0, 0x17eeb68015829ULL }, // Inst #7956 = VFCMULCPHZrrbkz |
| 34145 | { 7955, 6, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3495, 0, 0x17aeb68015829ULL }, // Inst #7955 = VFCMULCPHZrrbk |
| 34146 | { 7954, 4, 1, 0, 2191, 1, 0, X86ImpOpBase + 78, 3579, 0, 0x178eb68015829ULL }, // Inst #7954 = VFCMULCPHZrrb |
| 34147 | { 7953, 3, 1, 0, 2191, 1, 0, X86ImpOpBase + 78, 3576, 0, 0xe8eb68015829ULL }, // Inst #7953 = VFCMULCPHZrr |
| 34148 | { 7952, 8, 1, 0, 2190, 1, 0, X86ImpOpBase + 78, 3568, 0|(1ULL<<MCID::MayLoad), 0xeeeb68015819ULL }, // Inst #7952 = VFCMULCPHZrmkz |
| 34149 | { 7951, 9, 1, 0, 2190, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0xeaeb68015819ULL }, // Inst #7951 = VFCMULCPHZrmk |
| 34150 | { 7950, 8, 1, 0, 2190, 1, 0, X86ImpOpBase + 78, 3568, 0|(1ULL<<MCID::MayLoad), 0x7eeb68015819ULL }, // Inst #7950 = VFCMULCPHZrmbkz |
| 34151 | { 7949, 9, 1, 0, 2190, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0x7aeb68015819ULL }, // Inst #7949 = VFCMULCPHZrmbk |
| 34152 | { 7948, 7, 1, 0, 2186, 1, 0, X86ImpOpBase + 78, 3561, 0|(1ULL<<MCID::MayLoad), 0x78eb68015819ULL }, // Inst #7948 = VFCMULCPHZrmb |
| 34153 | { 7947, 7, 1, 0, 2186, 1, 0, X86ImpOpBase + 78, 3561, 0|(1ULL<<MCID::MayLoad), 0xe8eb68015819ULL }, // Inst #7947 = VFCMULCPHZrm |
| 34154 | { 7946, 4, 1, 0, 2184, 1, 0, X86ImpOpBase + 78, 3557, 0, 0xc7eb68015829ULL }, // Inst #7946 = VFCMULCPHZ256rrkz |
| 34155 | { 7945, 5, 1, 0, 2184, 1, 0, X86ImpOpBase + 78, 3464, 0, 0xc3eb68015829ULL }, // Inst #7945 = VFCMULCPHZ256rrk |
| 34156 | { 7944, 3, 1, 0, 2176, 1, 0, X86ImpOpBase + 78, 3554, 0, 0xc1eb68015829ULL }, // Inst #7944 = VFCMULCPHZ256rr |
| 34157 | { 7943, 8, 1, 0, 2174, 1, 0, X86ImpOpBase + 78, 3546, 0|(1ULL<<MCID::MayLoad), 0xc7eb68015819ULL }, // Inst #7943 = VFCMULCPHZ256rmkz |
| 34158 | { 7942, 9, 1, 0, 2174, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0xc3eb68015819ULL }, // Inst #7942 = VFCMULCPHZ256rmk |
| 34159 | { 7941, 8, 1, 0, 2174, 1, 0, X86ImpOpBase + 78, 3546, 0|(1ULL<<MCID::MayLoad), 0x77eb68015819ULL }, // Inst #7941 = VFCMULCPHZ256rmbkz |
| 34160 | { 7940, 9, 1, 0, 2174, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0x73eb68015819ULL }, // Inst #7940 = VFCMULCPHZ256rmbk |
| 34161 | { 7939, 7, 1, 0, 2167, 1, 0, X86ImpOpBase + 78, 3539, 0|(1ULL<<MCID::MayLoad), 0x71eb68015819ULL }, // Inst #7939 = VFCMULCPHZ256rmb |
| 34162 | { 7938, 7, 1, 0, 2167, 1, 0, X86ImpOpBase + 78, 3539, 0|(1ULL<<MCID::MayLoad), 0xc1eb68015819ULL }, // Inst #7938 = VFCMULCPHZ256rm |
| 34163 | { 7937, 4, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3535, 0, 0xa6eb68015829ULL }, // Inst #7937 = VFCMULCPHZ128rrkz |
| 34164 | { 7936, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3438, 0, 0xa2eb68015829ULL }, // Inst #7936 = VFCMULCPHZ128rrk |
| 34165 | { 7935, 3, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3532, 0, 0xa0eb68015829ULL }, // Inst #7935 = VFCMULCPHZ128rr |
| 34166 | { 7934, 8, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3524, 0|(1ULL<<MCID::MayLoad), 0xa6eb68015819ULL }, // Inst #7934 = VFCMULCPHZ128rmkz |
| 34167 | { 7933, 9, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0xa2eb68015819ULL }, // Inst #7933 = VFCMULCPHZ128rmk |
| 34168 | { 7932, 8, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3524, 0|(1ULL<<MCID::MayLoad), 0x76eb68015819ULL }, // Inst #7932 = VFCMULCPHZ128rmbkz |
| 34169 | { 7931, 9, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0x72eb68015819ULL }, // Inst #7931 = VFCMULCPHZ128rmbk |
| 34170 | { 7930, 7, 1, 0, 2164, 1, 0, X86ImpOpBase + 78, 3517, 0|(1ULL<<MCID::MayLoad), 0x70eb68015819ULL }, // Inst #7930 = VFCMULCPHZ128rmb |
| 34171 | { 7929, 7, 1, 0, 2164, 1, 0, X86ImpOpBase + 78, 3517, 0|(1ULL<<MCID::MayLoad), 0xa0eb68015819ULL }, // Inst #7929 = VFCMULCPHZ128rm |
| 34172 | { 7928, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3438, 0, 0x66abe0015829ULL }, // Inst #7928 = VFCMADDCSHZrkz |
| 34173 | { 7927, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3438, 0, 0x62abe0015829ULL }, // Inst #7927 = VFCMADDCSHZrk |
| 34174 | { 7926, 6, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3511, 0, 0x176abe0015829ULL }, // Inst #7926 = VFCMADDCSHZrbkz |
| 34175 | { 7925, 6, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3511, 0, 0x172abe0015829ULL }, // Inst #7925 = VFCMADDCSHZrbk |
| 34176 | { 7924, 5, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3506, 0, 0x170abe0015829ULL }, // Inst #7924 = VFCMADDCSHZrb |
| 34177 | { 7923, 4, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3434, 0, 0x60abe0015829ULL }, // Inst #7923 = VFCMADDCSHZr |
| 34178 | { 7922, 9, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0x66abe0015819ULL }, // Inst #7922 = VFCMADDCSHZmkz |
| 34179 | { 7921, 9, 1, 0, 2173, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0x62abe0015819ULL }, // Inst #7921 = VFCMADDCSHZmk |
| 34180 | { 7920, 8, 1, 0, 2164, 1, 0, X86ImpOpBase + 78, 3417, 0|(1ULL<<MCID::MayLoad), 0x60abe0015819ULL }, // Inst #7920 = VFCMADDCSHZm |
| 34181 | { 7919, 5, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3501, 0, 0xeeab60015829ULL }, // Inst #7919 = VFCMADDCPHZrkz |
| 34182 | { 7918, 5, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3501, 0, 0xeaab60015829ULL }, // Inst #7918 = VFCMADDCPHZrk |
| 34183 | { 7917, 6, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3495, 0, 0x17eab60015829ULL }, // Inst #7917 = VFCMADDCPHZrbkz |
| 34184 | { 7916, 6, 1, 0, 2194, 1, 0, X86ImpOpBase + 78, 3495, 0, 0x17aab60015829ULL }, // Inst #7916 = VFCMADDCPHZrbk |
| 34185 | { 7915, 5, 1, 0, 2191, 1, 0, X86ImpOpBase + 78, 3490, 0, 0x178ab60015829ULL }, // Inst #7915 = VFCMADDCPHZrb |
| 34186 | { 7914, 4, 1, 0, 2191, 1, 0, X86ImpOpBase + 78, 3486, 0, 0xe8ab60015829ULL }, // Inst #7914 = VFCMADDCPHZr |
| 34187 | { 7913, 9, 1, 0, 2189, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0xeeab60015819ULL }, // Inst #7913 = VFCMADDCPHZmkz |
| 34188 | { 7912, 9, 1, 0, 2189, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0xeaab60015819ULL }, // Inst #7912 = VFCMADDCPHZmk |
| 34189 | { 7911, 9, 1, 0, 2189, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0x7eab60015819ULL }, // Inst #7911 = VFCMADDCPHZmbkz |
| 34190 | { 7910, 9, 1, 0, 2189, 1, 0, X86ImpOpBase + 78, 3477, 0|(1ULL<<MCID::MayLoad), 0x7aab60015819ULL }, // Inst #7910 = VFCMADDCPHZmbk |
| 34191 | { 7909, 8, 1, 0, 2185, 1, 0, X86ImpOpBase + 78, 3469, 0|(1ULL<<MCID::MayLoad), 0x78ab60015819ULL }, // Inst #7909 = VFCMADDCPHZmb |
| 34192 | { 7908, 8, 1, 0, 2185, 1, 0, X86ImpOpBase + 78, 3469, 0|(1ULL<<MCID::MayLoad), 0xe8ab60015819ULL }, // Inst #7908 = VFCMADDCPHZm |
| 34193 | { 7907, 5, 1, 0, 2184, 1, 0, X86ImpOpBase + 78, 3464, 0, 0xc7ab60015829ULL }, // Inst #7907 = VFCMADDCPHZ256rkz |
| 34194 | { 7906, 5, 1, 0, 2184, 1, 0, X86ImpOpBase + 78, 3464, 0, 0xc3ab60015829ULL }, // Inst #7906 = VFCMADDCPHZ256rk |
| 34195 | { 7905, 4, 1, 0, 2176, 1, 0, X86ImpOpBase + 78, 3460, 0, 0xc1ab60015829ULL }, // Inst #7905 = VFCMADDCPHZ256r |
| 34196 | { 7904, 9, 1, 0, 2172, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0xc7ab60015819ULL }, // Inst #7904 = VFCMADDCPHZ256mkz |
| 34197 | { 7903, 9, 1, 0, 2172, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0xc3ab60015819ULL }, // Inst #7903 = VFCMADDCPHZ256mk |
| 34198 | { 7902, 9, 1, 0, 2172, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0x77ab60015819ULL }, // Inst #7902 = VFCMADDCPHZ256mbkz |
| 34199 | { 7901, 9, 1, 0, 2172, 1, 0, X86ImpOpBase + 78, 3451, 0|(1ULL<<MCID::MayLoad), 0x73ab60015819ULL }, // Inst #7901 = VFCMADDCPHZ256mbk |
| 34200 | { 7900, 8, 1, 0, 2162, 1, 0, X86ImpOpBase + 78, 3443, 0|(1ULL<<MCID::MayLoad), 0x71ab60015819ULL }, // Inst #7900 = VFCMADDCPHZ256mb |
| 34201 | { 7899, 8, 1, 0, 2162, 1, 0, X86ImpOpBase + 78, 3443, 0|(1ULL<<MCID::MayLoad), 0xc1ab60015819ULL }, // Inst #7899 = VFCMADDCPHZ256m |
| 34202 | { 7898, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3438, 0, 0xa6ab60015829ULL }, // Inst #7898 = VFCMADDCPHZ128rkz |
| 34203 | { 7897, 5, 1, 0, 2183, 1, 0, X86ImpOpBase + 78, 3438, 0, 0xa2ab60015829ULL }, // Inst #7897 = VFCMADDCPHZ128rk |
| 34204 | { 7896, 4, 1, 0, 2175, 1, 0, X86ImpOpBase + 78, 3434, 0, 0xa0ab60015829ULL }, // Inst #7896 = VFCMADDCPHZ128r |
| 34205 | { 7895, 9, 1, 0, 2171, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0xa6ab60015819ULL }, // Inst #7895 = VFCMADDCPHZ128mkz |
| 34206 | { 7894, 9, 1, 0, 2171, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0xa2ab60015819ULL }, // Inst #7894 = VFCMADDCPHZ128mk |
| 34207 | { 7893, 9, 1, 0, 2171, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0x76ab60015819ULL }, // Inst #7893 = VFCMADDCPHZ128mbkz |
| 34208 | { 7892, 9, 1, 0, 2171, 1, 0, X86ImpOpBase + 78, 3425, 0|(1ULL<<MCID::MayLoad), 0x72ab60015819ULL }, // Inst #7892 = VFCMADDCPHZ128mbk |
| 34209 | { 7891, 8, 1, 0, 2161, 1, 0, X86ImpOpBase + 78, 3417, 0|(1ULL<<MCID::MayLoad), 0x70ab60015819ULL }, // Inst #7891 = VFCMADDCPHZ128mb |
| 34210 | { 7890, 8, 1, 0, 2161, 1, 0, X86ImpOpBase + 78, 3417, 0|(1ULL<<MCID::MayLoad), 0xa0ab60015819ULL }, // Inst #7890 = VFCMADDCPHZ128m |
| 34211 | { 7889, 3, 1, 0, 752, 0, 0, X86ImpOpBase + 0, 1037, 0, 0xba8046828ULL }, // Inst #7889 = VEXTRACTPSrr |
| 34212 | { 7888, 7, 0, 0, 765, 0, 0, X86ImpOpBase + 0, 1030, 0|(1ULL<<MCID::MayStore), 0xba8046818ULL }, // Inst #7888 = VEXTRACTPSmr |
| 34213 | { 7887, 3, 1, 0, 1713, 0, 0, X86ImpOpBase + 0, 3414, 0, 0xa00bf8046828ULL }, // Inst #7887 = VEXTRACTPSZrr |
| 34214 | { 7886, 7, 0, 0, 1712, 0, 0, X86ImpOpBase + 0, 3021, 0|(1ULL<<MCID::MayStore), 0x600bf8046818ULL }, // Inst #7886 = VEXTRACTPSZmr |
| 34215 | { 7885, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3410, 0, 0xce1df8066828ULL }, // Inst #7885 = VEXTRACTI64x4Zrrkz |
| 34216 | { 7884, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3405, 0, 0xca1df8066828ULL }, // Inst #7884 = VEXTRACTI64x4Zrrk |
| 34217 | { 7883, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3090, 0, 0xc81df8066828ULL }, // Inst #7883 = VEXTRACTI64x4Zrr |
| 34218 | { 7882, 8, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3334, 0|(1ULL<<MCID::MayStore), 0xca1df8066818ULL }, // Inst #7882 = VEXTRACTI64x4Zmrk |
| 34219 | { 7881, 7, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3075, 0|(1ULL<<MCID::MayStore), 0xc81df8066818ULL }, // Inst #7881 = VEXTRACTI64x4Zmr |
| 34220 | { 7880, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3401, 0, 0xae1cf8066828ULL }, // Inst #7880 = VEXTRACTI64x2Zrrkz |
| 34221 | { 7879, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3396, 0, 0xaa1cf8066828ULL }, // Inst #7879 = VEXTRACTI64x2Zrrk |
| 34222 | { 7878, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3342, 0, 0xa81cf8066828ULL }, // Inst #7878 = VEXTRACTI64x2Zrr |
| 34223 | { 7877, 8, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3388, 0|(1ULL<<MCID::MayStore), 0xaa1cf8066818ULL }, // Inst #7877 = VEXTRACTI64x2Zmrk |
| 34224 | { 7876, 7, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3075, 0, 0xa81cf8066818ULL }, // Inst #7876 = VEXTRACTI64x2Zmr |
| 34225 | { 7875, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3384, 0, 0xa71cf8066828ULL }, // Inst #7875 = VEXTRACTI64x2Z256rrkz |
| 34226 | { 7874, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3379, 0, 0xa31cf8066828ULL }, // Inst #7874 = VEXTRACTI64x2Z256rrk |
| 34227 | { 7873, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3063, 0, 0xa11cf8066828ULL }, // Inst #7873 = VEXTRACTI64x2Z256rr |
| 34228 | { 7872, 8, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3371, 0|(1ULL<<MCID::MayStore), 0xa31cf8066818ULL }, // Inst #7872 = VEXTRACTI64x2Z256mrk |
| 34229 | { 7871, 7, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3048, 0, 0xa11cf8066818ULL }, // Inst #7871 = VEXTRACTI64x2Z256mr |
| 34230 | { 7870, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3367, 0, 0xce1df8046828ULL }, // Inst #7870 = VEXTRACTI32x8Zrrkz |
| 34231 | { 7869, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3362, 0, 0xca1df8046828ULL }, // Inst #7869 = VEXTRACTI32x8Zrrk |
| 34232 | { 7868, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3090, 0, 0xc81df8046828ULL }, // Inst #7868 = VEXTRACTI32x8Zrr |
| 34233 | { 7867, 8, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3354, 0|(1ULL<<MCID::MayStore), 0xca1df8046818ULL }, // Inst #7867 = VEXTRACTI32x8Zmrk |
| 34234 | { 7866, 7, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3075, 0, 0xc81df8046818ULL }, // Inst #7866 = VEXTRACTI32x8Zmr |
| 34235 | { 7865, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3350, 0, 0xae1cf8046828ULL }, // Inst #7865 = VEXTRACTI32x4Zrrkz |
| 34236 | { 7864, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3345, 0, 0xaa1cf8046828ULL }, // Inst #7864 = VEXTRACTI32x4Zrrk |
| 34237 | { 7863, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3342, 0, 0xa81cf8046828ULL }, // Inst #7863 = VEXTRACTI32x4Zrr |
| 34238 | { 7862, 8, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3334, 0|(1ULL<<MCID::MayStore), 0xaa1cf8046818ULL }, // Inst #7862 = VEXTRACTI32x4Zmrk |
| 34239 | { 7861, 7, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3075, 0|(1ULL<<MCID::MayStore), 0xa81cf8046818ULL }, // Inst #7861 = VEXTRACTI32x4Zmr |
| 34240 | { 7860, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3330, 0, 0xa71cf8046828ULL }, // Inst #7860 = VEXTRACTI32x4Z256rrkz |
| 34241 | { 7859, 5, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3325, 0, 0xa31cf8046828ULL }, // Inst #7859 = VEXTRACTI32x4Z256rrk |
| 34242 | { 7858, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 3063, 0, 0xa11cf8046828ULL }, // Inst #7858 = VEXTRACTI32x4Z256rr |
| 34243 | { 7857, 8, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3317, 0|(1ULL<<MCID::MayStore), 0xa31cf8046818ULL }, // Inst #7857 = VEXTRACTI32x4Z256mrk |
| 34244 | { 7856, 7, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 3048, 0|(1ULL<<MCID::MayStore), 0xa11cf8046818ULL }, // Inst #7856 = VEXTRACTI32x4Z256mr |
| 34245 | { 7855, 3, 1, 0, 970, 0, 0, X86ImpOpBase + 0, 3018, 0, 0x11cb8046828ULL }, // Inst #7855 = VEXTRACTI128rr |
| 34246 | { 7854, 7, 0, 0, 972, 0, 0, X86ImpOpBase + 0, 3011, 0|(1ULL<<MCID::MayStore), 0x11cb8046818ULL }, // Inst #7854 = VEXTRACTI128mr |
| 34247 | { 7853, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3410, 0, 0xce0df0066828ULL }, // Inst #7853 = VEXTRACTF64x4Zrrkz |
| 34248 | { 7852, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3405, 0, 0xca0df0066828ULL }, // Inst #7852 = VEXTRACTF64x4Zrrk |
| 34249 | { 7851, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3090, 0, 0xc80df0066828ULL }, // Inst #7851 = VEXTRACTF64x4Zrr |
| 34250 | { 7850, 8, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3334, 0|(1ULL<<MCID::MayStore), 0xca0df0066818ULL }, // Inst #7850 = VEXTRACTF64x4Zmrk |
| 34251 | { 7849, 7, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3075, 0|(1ULL<<MCID::MayStore), 0xc80df0066818ULL }, // Inst #7849 = VEXTRACTF64x4Zmr |
| 34252 | { 7848, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3401, 0, 0xae0cf0066828ULL }, // Inst #7848 = VEXTRACTF64x2Zrrkz |
| 34253 | { 7847, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3396, 0, 0xaa0cf0066828ULL }, // Inst #7847 = VEXTRACTF64x2Zrrk |
| 34254 | { 7846, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3342, 0, 0xa80cf0066828ULL }, // Inst #7846 = VEXTRACTF64x2Zrr |
| 34255 | { 7845, 8, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3388, 0|(1ULL<<MCID::MayStore), 0xaa0cf0066818ULL }, // Inst #7845 = VEXTRACTF64x2Zmrk |
| 34256 | { 7844, 7, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3075, 0, 0xa80cf0066818ULL }, // Inst #7844 = VEXTRACTF64x2Zmr |
| 34257 | { 7843, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3384, 0, 0xa70cf0066828ULL }, // Inst #7843 = VEXTRACTF64x2Z256rrkz |
| 34258 | { 7842, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3379, 0, 0xa30cf0066828ULL }, // Inst #7842 = VEXTRACTF64x2Z256rrk |
| 34259 | { 7841, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3063, 0, 0xa10cf0066828ULL }, // Inst #7841 = VEXTRACTF64x2Z256rr |
| 34260 | { 7840, 8, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3371, 0|(1ULL<<MCID::MayStore), 0xa30cf0066818ULL }, // Inst #7840 = VEXTRACTF64x2Z256mrk |
| 34261 | { 7839, 7, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3048, 0, 0xa10cf0066818ULL }, // Inst #7839 = VEXTRACTF64x2Z256mr |
| 34262 | { 7838, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3367, 0, 0xce0de8046828ULL }, // Inst #7838 = VEXTRACTF32x8Zrrkz |
| 34263 | { 7837, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3362, 0, 0xca0de8046828ULL }, // Inst #7837 = VEXTRACTF32x8Zrrk |
| 34264 | { 7836, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3090, 0, 0xc80de8046828ULL }, // Inst #7836 = VEXTRACTF32x8Zrr |
| 34265 | { 7835, 8, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3354, 0|(1ULL<<MCID::MayStore), 0xca0de8046818ULL }, // Inst #7835 = VEXTRACTF32x8Zmrk |
| 34266 | { 7834, 7, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3075, 0, 0xc80de8046818ULL }, // Inst #7834 = VEXTRACTF32x8Zmr |
| 34267 | { 7833, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3350, 0, 0xae0ce8046828ULL }, // Inst #7833 = VEXTRACTF32x4Zrrkz |
| 34268 | { 7832, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3345, 0, 0xaa0ce8046828ULL }, // Inst #7832 = VEXTRACTF32x4Zrrk |
| 34269 | { 7831, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3342, 0, 0xa80ce8046828ULL }, // Inst #7831 = VEXTRACTF32x4Zrr |
| 34270 | { 7830, 8, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3334, 0|(1ULL<<MCID::MayStore), 0xaa0ce8046818ULL }, // Inst #7830 = VEXTRACTF32x4Zmrk |
| 34271 | { 7829, 7, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3075, 0|(1ULL<<MCID::MayStore), 0xa80ce8046818ULL }, // Inst #7829 = VEXTRACTF32x4Zmr |
| 34272 | { 7828, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3330, 0, 0xa70ce8046828ULL }, // Inst #7828 = VEXTRACTF32x4Z256rrkz |
| 34273 | { 7827, 5, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3325, 0, 0xa30ce8046828ULL }, // Inst #7827 = VEXTRACTF32x4Z256rrk |
| 34274 | { 7826, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 3063, 0, 0xa10ce8046828ULL }, // Inst #7826 = VEXTRACTF32x4Z256rr |
| 34275 | { 7825, 8, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3317, 0|(1ULL<<MCID::MayStore), 0xa30ce8046818ULL }, // Inst #7825 = VEXTRACTF32x4Z256mrk |
| 34276 | { 7824, 7, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 3048, 0|(1ULL<<MCID::MayStore), 0xa10ce8046818ULL }, // Inst #7824 = VEXTRACTF32x4Z256mr |
| 34277 | { 7823, 3, 1, 0, 969, 0, 0, X86ImpOpBase + 0, 3018, 0, 0x10ca8046828ULL }, // Inst #7823 = VEXTRACTF128rr |
| 34278 | { 7822, 7, 0, 0, 971, 0, 0, X86ImpOpBase + 0, 3011, 0|(1ULL<<MCID::MayStore), 0x10ca8046818ULL }, // Inst #7822 = VEXTRACTF128mr |
| 34279 | { 7821, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee4478004829ULL }, // Inst #7821 = VEXPANDPSZrrkz |
| 34280 | { 7820, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2775, 0, 0xea4478004829ULL }, // Inst #7820 = VEXPANDPSZrrk |
| 34281 | { 7819, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe84478004829ULL }, // Inst #7819 = VEXPANDPSZrr |
| 34282 | { 7818, 7, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0x6e4478004819ULL }, // Inst #7818 = VEXPANDPSZrmkz |
| 34283 | { 7817, 8, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0x6a4478004819ULL }, // Inst #7817 = VEXPANDPSZrmk |
| 34284 | { 7816, 6, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x684478004819ULL }, // Inst #7816 = VEXPANDPSZrm |
| 34285 | { 7815, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc74478004829ULL }, // Inst #7815 = VEXPANDPSZ256rrkz |
| 34286 | { 7814, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2761, 0, 0xc34478004829ULL }, // Inst #7814 = VEXPANDPSZ256rrk |
| 34287 | { 7813, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc14478004829ULL }, // Inst #7813 = VEXPANDPSZ256rr |
| 34288 | { 7812, 7, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x674478004819ULL }, // Inst #7812 = VEXPANDPSZ256rmkz |
| 34289 | { 7811, 8, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0x634478004819ULL }, // Inst #7811 = VEXPANDPSZ256rmk |
| 34290 | { 7810, 6, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x614478004819ULL }, // Inst #7810 = VEXPANDPSZ256rm |
| 34291 | { 7809, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa64478004829ULL }, // Inst #7809 = VEXPANDPSZ128rrkz |
| 34292 | { 7808, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa24478004829ULL }, // Inst #7808 = VEXPANDPSZ128rrk |
| 34293 | { 7807, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa04478004829ULL }, // Inst #7807 = VEXPANDPSZ128rr |
| 34294 | { 7806, 7, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x664478004819ULL }, // Inst #7806 = VEXPANDPSZ128rmkz |
| 34295 | { 7805, 8, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x624478004819ULL }, // Inst #7805 = VEXPANDPSZ128rmk |
| 34296 | { 7804, 6, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x604478004819ULL }, // Inst #7804 = VEXPANDPSZ128rm |
| 34297 | { 7803, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee4478024829ULL }, // Inst #7803 = VEXPANDPDZrrkz |
| 34298 | { 7802, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2740, 0, 0xea4478024829ULL }, // Inst #7802 = VEXPANDPDZrrk |
| 34299 | { 7801, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe84478024829ULL }, // Inst #7801 = VEXPANDPDZrr |
| 34300 | { 7800, 7, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x8e4478024819ULL }, // Inst #7800 = VEXPANDPDZrmkz |
| 34301 | { 7799, 8, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0x8a4478024819ULL }, // Inst #7799 = VEXPANDPDZrmk |
| 34302 | { 7798, 6, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x884478024819ULL }, // Inst #7798 = VEXPANDPDZrm |
| 34303 | { 7797, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc74478024829ULL }, // Inst #7797 = VEXPANDPDZ256rrkz |
| 34304 | { 7796, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2718, 0, 0xc34478024829ULL }, // Inst #7796 = VEXPANDPDZ256rrk |
| 34305 | { 7795, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc14478024829ULL }, // Inst #7795 = VEXPANDPDZ256rr |
| 34306 | { 7794, 7, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x874478024819ULL }, // Inst #7794 = VEXPANDPDZ256rmkz |
| 34307 | { 7793, 8, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x834478024819ULL }, // Inst #7793 = VEXPANDPDZ256rmk |
| 34308 | { 7792, 6, 1, 0, 1373, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x814478024819ULL }, // Inst #7792 = VEXPANDPDZ256rm |
| 34309 | { 7791, 3, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa64478024829ULL }, // Inst #7791 = VEXPANDPDZ128rrkz |
| 34310 | { 7790, 4, 1, 0, 1256, 0, 0, X86ImpOpBase + 0, 2702, 0, 0xa24478024829ULL }, // Inst #7790 = VEXPANDPDZ128rrk |
| 34311 | { 7789, 2, 1, 0, 1941, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa04478024829ULL }, // Inst #7789 = VEXPANDPDZ128rr |
| 34312 | { 7788, 7, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x864478024819ULL }, // Inst #7788 = VEXPANDPDZ128rmkz |
| 34313 | { 7787, 8, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x824478024819ULL }, // Inst #7787 = VEXPANDPDZ128rmk |
| 34314 | { 7786, 6, 1, 0, 1358, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x804478024819ULL }, // Inst #7786 = VEXPANDPDZ128rm |
| 34315 | { 7785, 3, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6468004829ULL }, // Inst #7785 = VEXP2PSZrkz |
| 34316 | { 7784, 4, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6468004829ULL }, // Inst #7784 = VEXP2PSZrk |
| 34317 | { 7783, 3, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2779, 0, 0x7e6468004829ULL }, // Inst #7783 = VEXP2PSZrbkz |
| 34318 | { 7782, 4, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2775, 0, 0x7a6468004829ULL }, // Inst #7782 = VEXP2PSZrbk |
| 34319 | { 7781, 2, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x786468004829ULL }, // Inst #7781 = VEXP2PSZrb |
| 34320 | { 7780, 2, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86468004829ULL }, // Inst #7780 = VEXP2PSZr |
| 34321 | { 7779, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6468004819ULL }, // Inst #7779 = VEXP2PSZmkz |
| 34322 | { 7778, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6468004819ULL }, // Inst #7778 = VEXP2PSZmk |
| 34323 | { 7777, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e6468004819ULL }, // Inst #7777 = VEXP2PSZmbkz |
| 34324 | { 7776, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a6468004819ULL }, // Inst #7776 = VEXP2PSZmbk |
| 34325 | { 7775, 6, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x786468004819ULL }, // Inst #7775 = VEXP2PSZmb |
| 34326 | { 7774, 6, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86468004819ULL }, // Inst #7774 = VEXP2PSZm |
| 34327 | { 7773, 3, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee6470024829ULL }, // Inst #7773 = VEXP2PDZrkz |
| 34328 | { 7772, 4, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea6470024829ULL }, // Inst #7772 = VEXP2PDZrk |
| 34329 | { 7771, 3, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2744, 0, 0x9e6470024829ULL }, // Inst #7771 = VEXP2PDZrbkz |
| 34330 | { 7770, 4, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2740, 0, 0x9a6470024829ULL }, // Inst #7770 = VEXP2PDZrbk |
| 34331 | { 7769, 2, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x986470024829ULL }, // Inst #7769 = VEXP2PDZrb |
| 34332 | { 7768, 2, 1, 0, 344, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe86470024829ULL }, // Inst #7768 = VEXP2PDZr |
| 34333 | { 7767, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee6470024819ULL }, // Inst #7767 = VEXP2PDZmkz |
| 34334 | { 7766, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea6470024819ULL }, // Inst #7766 = VEXP2PDZmk |
| 34335 | { 7765, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e6470024819ULL }, // Inst #7765 = VEXP2PDZmbkz |
| 34336 | { 7764, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a6470024819ULL }, // Inst #7764 = VEXP2PDZmbk |
| 34337 | { 7763, 6, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x986470024819ULL }, // Inst #7763 = VEXP2PDZmb |
| 34338 | { 7762, 6, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe86470024819ULL }, // Inst #7762 = VEXP2PDZm |
| 34339 | { 7761, 1, 0, 0, 1631, 0, 1, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2035ULL }, // Inst #7761 = VERWr |
| 34340 | { 7760, 5, 0, 0, 782, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2025ULL }, // Inst #7760 = VERWm |
| 34341 | { 7759, 1, 0, 0, 1630, 0, 1, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2034ULL }, // Inst #7759 = VERRr |
| 34342 | { 7758, 5, 0, 0, 1629, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2024ULL }, // Inst #7758 = VERRm |
| 34343 | { 7757, 4, 1, 0, 1172, 1, 0, X86ImpOpBase + 78, 893, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa028046829ULL }, // Inst #7757 = VDPPSrri |
| 34344 | { 7756, 8, 1, 0, 139, 1, 0, X86ImpOpBase + 78, 2203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa028046819ULL }, // Inst #7756 = VDPPSrmi |
| 34345 | { 7755, 4, 1, 0, 434, 1, 0, X86ImpOpBase + 78, 901, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1a028046829ULL }, // Inst #7755 = VDPPSYrri |
| 34346 | { 7754, 8, 1, 0, 433, 1, 0, X86ImpOpBase + 78, 2195, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1a028046819ULL }, // Inst #7754 = VDPPSYrmi |
| 34347 | { 7753, 4, 1, 0, 138, 1, 0, X86ImpOpBase + 78, 893, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0b0046829ULL }, // Inst #7753 = VDPPDrri |
| 34348 | { 7752, 8, 1, 0, 137, 1, 0, X86ImpOpBase + 78, 2203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0b0046819ULL }, // Inst #7752 = VDPPDrmi |
| 34349 | { 7751, 5, 1, 0, 1082, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeea968005029ULL }, // Inst #7751 = VDPBF16PSZrkz |
| 34350 | { 7750, 5, 1, 0, 1082, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeaa968005029ULL }, // Inst #7750 = VDPBF16PSZrk |
| 34351 | { 7749, 4, 1, 0, 1082, 0, 0, X86ImpOpBase + 0, 3313, 0, 0xe8a968005029ULL }, // Inst #7749 = VDPBF16PSZr |
| 34352 | { 7748, 9, 1, 0, 1972, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeea968005019ULL }, // Inst #7748 = VDPBF16PSZmkz |
| 34353 | { 7747, 9, 1, 0, 1972, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaa968005019ULL }, // Inst #7747 = VDPBF16PSZmk |
| 34354 | { 7746, 9, 1, 0, 1973, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7ea968005019ULL }, // Inst #7746 = VDPBF16PSZmbkz |
| 34355 | { 7745, 9, 1, 0, 1972, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aa968005019ULL }, // Inst #7745 = VDPBF16PSZmbk |
| 34356 | { 7744, 8, 1, 0, 1972, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0x78a968005019ULL }, // Inst #7744 = VDPBF16PSZmb |
| 34357 | { 7743, 8, 1, 0, 1972, 0, 0, X86ImpOpBase + 0, 1539, 0|(1ULL<<MCID::MayLoad), 0xe8a968005019ULL }, // Inst #7743 = VDPBF16PSZm |
| 34358 | { 7742, 5, 1, 0, 1081, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc7a968005029ULL }, // Inst #7742 = VDPBF16PSZ256rkz |
| 34359 | { 7741, 5, 1, 0, 1081, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3a968005029ULL }, // Inst #7741 = VDPBF16PSZ256rk |
| 34360 | { 7740, 4, 1, 0, 1081, 0, 0, X86ImpOpBase + 0, 3309, 0, 0xc1a968005029ULL }, // Inst #7740 = VDPBF16PSZ256r |
| 34361 | { 7739, 9, 1, 0, 2158, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc7a968005019ULL }, // Inst #7739 = VDPBF16PSZ256mkz |
| 34362 | { 7738, 9, 1, 0, 2158, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3a968005019ULL }, // Inst #7738 = VDPBF16PSZ256mk |
| 34363 | { 7737, 9, 1, 0, 2159, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x77a968005019ULL }, // Inst #7737 = VDPBF16PSZ256mbkz |
| 34364 | { 7736, 9, 1, 0, 2158, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73a968005019ULL }, // Inst #7736 = VDPBF16PSZ256mbk |
| 34365 | { 7735, 8, 1, 0, 2158, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0x71a968005019ULL }, // Inst #7735 = VDPBF16PSZ256mb |
| 34366 | { 7734, 8, 1, 0, 2158, 0, 0, X86ImpOpBase + 0, 3301, 0|(1ULL<<MCID::MayLoad), 0xc1a968005019ULL }, // Inst #7734 = VDPBF16PSZ256m |
| 34367 | { 7733, 5, 1, 0, 1080, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa6a968005029ULL }, // Inst #7733 = VDPBF16PSZ128rkz |
| 34368 | { 7732, 5, 1, 0, 1080, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2a968005029ULL }, // Inst #7732 = VDPBF16PSZ128rk |
| 34369 | { 7731, 4, 1, 0, 1080, 0, 0, X86ImpOpBase + 0, 3297, 0, 0xa0a968005029ULL }, // Inst #7731 = VDPBF16PSZ128r |
| 34370 | { 7730, 9, 1, 0, 2156, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa6a968005019ULL }, // Inst #7730 = VDPBF16PSZ128mkz |
| 34371 | { 7729, 9, 1, 0, 2156, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2a968005019ULL }, // Inst #7729 = VDPBF16PSZ128mk |
| 34372 | { 7728, 9, 1, 0, 2157, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x76a968005019ULL }, // Inst #7728 = VDPBF16PSZ128mbkz |
| 34373 | { 7727, 9, 1, 0, 2156, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72a968005019ULL }, // Inst #7727 = VDPBF16PSZ128mbk |
| 34374 | { 7726, 8, 1, 0, 2156, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0x70a968005019ULL }, // Inst #7726 = VDPBF16PSZ128mb |
| 34375 | { 7725, 8, 1, 0, 2156, 0, 0, X86ImpOpBase + 0, 1556, 0|(1ULL<<MCID::MayLoad), 0xa0a968005019ULL }, // Inst #7725 = VDPBF16PSZ128m |
| 34376 | { 7724, 3, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf28003029ULL }, // Inst #7724 = VDIVSSrr_Int |
| 34377 | { 7723, 3, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1982, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf28003029ULL }, // Inst #7723 = VDIVSSrr |
| 34378 | { 7722, 7, 1, 0, 136, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf28003019ULL }, // Inst #7722 = VDIVSSrm_Int |
| 34379 | { 7721, 7, 1, 0, 136, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf28003019ULL }, // Inst #7721 = VDIVSSrm |
| 34380 | { 7720, 5, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x176af68003029ULL }, // Inst #7720 = VDIVSSZrrb_Intkz |
| 34381 | { 7719, 6, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x172af68003029ULL }, // Inst #7719 = VDIVSSZrrb_Intk |
| 34382 | { 7718, 4, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x170af68003029ULL }, // Inst #7718 = VDIVSSZrrb_Int |
| 34383 | { 7717, 4, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66af68003029ULL }, // Inst #7717 = VDIVSSZrr_Intkz |
| 34384 | { 7716, 5, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62af68003029ULL }, // Inst #7716 = VDIVSSZrr_Intk |
| 34385 | { 7715, 3, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60af68003029ULL }, // Inst #7715 = VDIVSSZrr_Int |
| 34386 | { 7714, 3, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1972, 0|(1ULL<<MCID::MayRaiseFPException), 0x60af68003029ULL }, // Inst #7714 = VDIVSSZrr |
| 34387 | { 7713, 8, 1, 0, 136, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66af68003019ULL }, // Inst #7713 = VDIVSSZrm_Intkz |
| 34388 | { 7712, 9, 1, 0, 136, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62af68003019ULL }, // Inst #7712 = VDIVSSZrm_Intk |
| 34389 | { 7711, 7, 1, 0, 136, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60af68003019ULL }, // Inst #7711 = VDIVSSZrm_Int |
| 34390 | { 7710, 7, 1, 0, 136, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60af68003019ULL }, // Inst #7710 = VDIVSSZrm |
| 34391 | { 7709, 5, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x156af68013029ULL }, // Inst #7709 = VDIVSHZrrb_Intkz |
| 34392 | { 7708, 6, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x152af68013029ULL }, // Inst #7708 = VDIVSHZrrb_Intk |
| 34393 | { 7707, 4, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x150af68013029ULL }, // Inst #7707 = VDIVSHZrrb_Int |
| 34394 | { 7706, 4, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x46af68013029ULL }, // Inst #7706 = VDIVSHZrr_Intkz |
| 34395 | { 7705, 5, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x42af68013029ULL }, // Inst #7705 = VDIVSHZrr_Intk |
| 34396 | { 7704, 3, 1, 0, 2154, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x40af68013029ULL }, // Inst #7704 = VDIVSHZrr_Int |
| 34397 | { 7703, 3, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 1962, 0|(1ULL<<MCID::MayRaiseFPException), 0x40af68013029ULL }, // Inst #7703 = VDIVSHZrr |
| 34398 | { 7702, 8, 1, 0, 2152, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46af68013019ULL }, // Inst #7702 = VDIVSHZrm_Intkz |
| 34399 | { 7701, 9, 1, 0, 2152, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42af68013019ULL }, // Inst #7701 = VDIVSHZrm_Intk |
| 34400 | { 7700, 7, 1, 0, 2152, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40af68013019ULL }, // Inst #7700 = VDIVSHZrm_Int |
| 34401 | { 7699, 7, 1, 0, 2153, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40af68013019ULL }, // Inst #7699 = VDIVSHZrm |
| 34402 | { 7698, 3, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf30003829ULL }, // Inst #7698 = VDIVSDrr_Int |
| 34403 | { 7697, 3, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 1952, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf30003829ULL }, // Inst #7697 = VDIVSDrr |
| 34404 | { 7696, 7, 1, 0, 1495, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf30003819ULL }, // Inst #7696 = VDIVSDrm_Int |
| 34405 | { 7695, 7, 1, 0, 1706, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf30003819ULL }, // Inst #7695 = VDIVSDrm |
| 34406 | { 7694, 5, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x196af70023829ULL }, // Inst #7694 = VDIVSDZrrb_Intkz |
| 34407 | { 7693, 6, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x192af70023829ULL }, // Inst #7693 = VDIVSDZrrb_Intk |
| 34408 | { 7692, 4, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x190af70023829ULL }, // Inst #7692 = VDIVSDZrrb_Int |
| 34409 | { 7691, 4, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86af70023829ULL }, // Inst #7691 = VDIVSDZrr_Intkz |
| 34410 | { 7690, 5, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82af70023829ULL }, // Inst #7690 = VDIVSDZrr_Intk |
| 34411 | { 7689, 3, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80af70023829ULL }, // Inst #7689 = VDIVSDZrr_Int |
| 34412 | { 7688, 3, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 1918, 0|(1ULL<<MCID::MayRaiseFPException), 0x80af70023829ULL }, // Inst #7688 = VDIVSDZrr |
| 34413 | { 7687, 8, 1, 0, 134, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86af70023819ULL }, // Inst #7687 = VDIVSDZrm_Intkz |
| 34414 | { 7686, 9, 1, 0, 134, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82af70023819ULL }, // Inst #7686 = VDIVSDZrm_Intk |
| 34415 | { 7685, 7, 1, 0, 134, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80af70023819ULL }, // Inst #7685 = VDIVSDZrm_Int |
| 34416 | { 7684, 7, 1, 0, 1707, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80af70023819ULL }, // Inst #7684 = VDIVSDZrm |
| 34417 | { 7683, 3, 1, 0, 131, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf28002029ULL }, // Inst #7683 = VDIVPSrr |
| 34418 | { 7682, 7, 1, 0, 130, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf28002019ULL }, // Inst #7682 = VDIVPSrm |
| 34419 | { 7681, 4, 1, 0, 426, 1, 0, X86ImpOpBase + 78, 1899, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaf68002029ULL }, // Inst #7681 = VDIVPSZrrkz |
| 34420 | { 7680, 5, 1, 0, 426, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaf68002029ULL }, // Inst #7680 = VDIVPSZrrk |
| 34421 | { 7679, 5, 1, 0, 426, 1, 0, X86ImpOpBase + 78, 1889, 0, 0x17eaf68002029ULL }, // Inst #7679 = VDIVPSZrrbkz |
| 34422 | { 7678, 6, 1, 0, 426, 1, 0, X86ImpOpBase + 78, 1883, 0, 0x17aaf68002029ULL }, // Inst #7678 = VDIVPSZrrbk |
| 34423 | { 7677, 4, 1, 0, 426, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x178af68002029ULL }, // Inst #7677 = VDIVPSZrrb |
| 34424 | { 7676, 3, 1, 0, 2151, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8af68002029ULL }, // Inst #7676 = VDIVPSZrr |
| 34425 | { 7675, 8, 1, 0, 425, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaf68002019ULL }, // Inst #7675 = VDIVPSZrmkz |
| 34426 | { 7674, 9, 1, 0, 425, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaf68002019ULL }, // Inst #7674 = VDIVPSZrmk |
| 34427 | { 7673, 8, 1, 0, 425, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eaf68002019ULL }, // Inst #7673 = VDIVPSZrmbkz |
| 34428 | { 7672, 9, 1, 0, 425, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aaf68002019ULL }, // Inst #7672 = VDIVPSZrmbk |
| 34429 | { 7671, 7, 1, 0, 425, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78af68002019ULL }, // Inst #7671 = VDIVPSZrmb |
| 34430 | { 7670, 7, 1, 0, 425, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8af68002019ULL }, // Inst #7670 = VDIVPSZrm |
| 34431 | { 7669, 4, 1, 0, 424, 1, 0, X86ImpOpBase + 78, 1871, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7af68002029ULL }, // Inst #7669 = VDIVPSZ256rrkz |
| 34432 | { 7668, 5, 1, 0, 424, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3af68002029ULL }, // Inst #7668 = VDIVPSZ256rrk |
| 34433 | { 7667, 3, 1, 0, 424, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1af68002029ULL }, // Inst #7667 = VDIVPSZ256rr |
| 34434 | { 7666, 8, 1, 0, 423, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7af68002019ULL }, // Inst #7666 = VDIVPSZ256rmkz |
| 34435 | { 7665, 9, 1, 0, 423, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3af68002019ULL }, // Inst #7665 = VDIVPSZ256rmk |
| 34436 | { 7664, 8, 1, 0, 423, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77af68002019ULL }, // Inst #7664 = VDIVPSZ256rmbkz |
| 34437 | { 7663, 9, 1, 0, 423, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73af68002019ULL }, // Inst #7663 = VDIVPSZ256rmbk |
| 34438 | { 7662, 7, 1, 0, 423, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71af68002019ULL }, // Inst #7662 = VDIVPSZ256rmb |
| 34439 | { 7661, 7, 1, 0, 423, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1af68002019ULL }, // Inst #7661 = VDIVPSZ256rm |
| 34440 | { 7660, 4, 1, 0, 131, 1, 0, X86ImpOpBase + 78, 1845, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6af68002029ULL }, // Inst #7660 = VDIVPSZ128rrkz |
| 34441 | { 7659, 5, 1, 0, 131, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2af68002029ULL }, // Inst #7659 = VDIVPSZ128rrk |
| 34442 | { 7658, 3, 1, 0, 131, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0af68002029ULL }, // Inst #7658 = VDIVPSZ128rr |
| 34443 | { 7657, 8, 1, 0, 130, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6af68002019ULL }, // Inst #7657 = VDIVPSZ128rmkz |
| 34444 | { 7656, 9, 1, 0, 130, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2af68002019ULL }, // Inst #7656 = VDIVPSZ128rmk |
| 34445 | { 7655, 8, 1, 0, 130, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76af68002019ULL }, // Inst #7655 = VDIVPSZ128rmbkz |
| 34446 | { 7654, 9, 1, 0, 130, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72af68002019ULL }, // Inst #7654 = VDIVPSZ128rmbk |
| 34447 | { 7653, 7, 1, 0, 130, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70af68002019ULL }, // Inst #7653 = VDIVPSZ128rmb |
| 34448 | { 7652, 7, 1, 0, 130, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0af68002019ULL }, // Inst #7652 = VDIVPSZ128rm |
| 34449 | { 7651, 3, 1, 0, 424, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1af28002029ULL }, // Inst #7651 = VDIVPSYrr |
| 34450 | { 7650, 7, 1, 0, 423, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1af28002019ULL }, // Inst #7650 = VDIVPSYrm |
| 34451 | { 7649, 4, 1, 0, 2150, 1, 0, X86ImpOpBase + 78, 1819, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaf68012029ULL }, // Inst #7649 = VDIVPHZrrkz |
| 34452 | { 7648, 5, 1, 0, 2150, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaf68012029ULL }, // Inst #7648 = VDIVPHZrrk |
| 34453 | { 7647, 5, 1, 0, 2150, 1, 0, X86ImpOpBase + 78, 1809, 0, 0x15eaf68012029ULL }, // Inst #7647 = VDIVPHZrrbkz |
| 34454 | { 7646, 6, 1, 0, 2150, 1, 0, X86ImpOpBase + 78, 1803, 0, 0x15aaf68012029ULL }, // Inst #7646 = VDIVPHZrrbk |
| 34455 | { 7645, 4, 1, 0, 2149, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x158af68012029ULL }, // Inst #7645 = VDIVPHZrrb |
| 34456 | { 7644, 3, 1, 0, 2149, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8af68012029ULL }, // Inst #7644 = VDIVPHZrr |
| 34457 | { 7643, 8, 1, 0, 2148, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaf68012019ULL }, // Inst #7643 = VDIVPHZrmkz |
| 34458 | { 7642, 9, 1, 0, 2148, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaf68012019ULL }, // Inst #7642 = VDIVPHZrmk |
| 34459 | { 7641, 8, 1, 0, 2148, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eaf68012019ULL }, // Inst #7641 = VDIVPHZrmbkz |
| 34460 | { 7640, 9, 1, 0, 2148, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aaf68012019ULL }, // Inst #7640 = VDIVPHZrmbk |
| 34461 | { 7639, 7, 1, 0, 2147, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58af68012019ULL }, // Inst #7639 = VDIVPHZrmb |
| 34462 | { 7638, 7, 1, 0, 2147, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8af68012019ULL }, // Inst #7638 = VDIVPHZrm |
| 34463 | { 7637, 4, 1, 0, 2146, 1, 0, X86ImpOpBase + 78, 1782, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7af68012029ULL }, // Inst #7637 = VDIVPHZ256rrkz |
| 34464 | { 7636, 5, 1, 0, 2139, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3af68012029ULL }, // Inst #7636 = VDIVPHZ256rrk |
| 34465 | { 7635, 3, 1, 0, 2137, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1af68012029ULL }, // Inst #7635 = VDIVPHZ256rr |
| 34466 | { 7634, 8, 1, 0, 2144, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7af68012019ULL }, // Inst #7634 = VDIVPHZ256rmkz |
| 34467 | { 7633, 9, 1, 0, 2144, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3af68012019ULL }, // Inst #7633 = VDIVPHZ256rmk |
| 34468 | { 7632, 8, 1, 0, 2144, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57af68012019ULL }, // Inst #7632 = VDIVPHZ256rmbkz |
| 34469 | { 7631, 9, 1, 0, 2144, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53af68012019ULL }, // Inst #7631 = VDIVPHZ256rmbk |
| 34470 | { 7630, 7, 1, 0, 2143, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51af68012019ULL }, // Inst #7630 = VDIVPHZ256rmb |
| 34471 | { 7629, 7, 1, 0, 2143, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1af68012019ULL }, // Inst #7629 = VDIVPHZ256rm |
| 34472 | { 7628, 4, 1, 0, 2142, 1, 0, X86ImpOpBase + 78, 1756, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6af68012029ULL }, // Inst #7628 = VDIVPHZ128rrkz |
| 34473 | { 7627, 5, 1, 0, 2138, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2af68012029ULL }, // Inst #7627 = VDIVPHZ128rrk |
| 34474 | { 7626, 3, 1, 0, 2136, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0af68012029ULL }, // Inst #7626 = VDIVPHZ128rr |
| 34475 | { 7625, 8, 1, 0, 2135, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6af68012019ULL }, // Inst #7625 = VDIVPHZ128rmkz |
| 34476 | { 7624, 9, 1, 0, 2135, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2af68012019ULL }, // Inst #7624 = VDIVPHZ128rmk |
| 34477 | { 7623, 8, 1, 0, 2135, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56af68012019ULL }, // Inst #7623 = VDIVPHZ128rmbkz |
| 34478 | { 7622, 9, 1, 0, 2135, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52af68012019ULL }, // Inst #7622 = VDIVPHZ128rmbk |
| 34479 | { 7621, 7, 1, 0, 2134, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50af68012019ULL }, // Inst #7621 = VDIVPHZ128rmb |
| 34480 | { 7620, 7, 1, 0, 2134, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0af68012019ULL }, // Inst #7620 = VDIVPHZ128rm |
| 34481 | { 7619, 3, 1, 0, 129, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xaf30002829ULL }, // Inst #7619 = VDIVPDrr |
| 34482 | { 7618, 7, 1, 0, 128, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaf30002819ULL }, // Inst #7618 = VDIVPDrm |
| 34483 | { 7617, 4, 1, 0, 422, 1, 0, X86ImpOpBase + 78, 1720, 0|(1ULL<<MCID::MayRaiseFPException), 0xeeaf70022829ULL }, // Inst #7617 = VDIVPDZrrkz |
| 34484 | { 7616, 5, 1, 0, 422, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException), 0xeaaf70022829ULL }, // Inst #7616 = VDIVPDZrrk |
| 34485 | { 7615, 5, 1, 0, 422, 1, 0, X86ImpOpBase + 78, 1710, 0, 0x19eaf70022829ULL }, // Inst #7615 = VDIVPDZrrbkz |
| 34486 | { 7614, 6, 1, 0, 422, 1, 0, X86ImpOpBase + 78, 1704, 0, 0x19aaf70022829ULL }, // Inst #7614 = VDIVPDZrrbk |
| 34487 | { 7613, 4, 1, 0, 422, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x198af70022829ULL }, // Inst #7613 = VDIVPDZrrb |
| 34488 | { 7612, 3, 1, 0, 422, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException), 0xe8af70022829ULL }, // Inst #7612 = VDIVPDZrr |
| 34489 | { 7611, 8, 1, 0, 421, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeaf70022819ULL }, // Inst #7611 = VDIVPDZrmkz |
| 34490 | { 7610, 9, 1, 0, 421, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaaf70022819ULL }, // Inst #7610 = VDIVPDZrmk |
| 34491 | { 7609, 8, 1, 0, 421, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eaf70022819ULL }, // Inst #7609 = VDIVPDZrmbkz |
| 34492 | { 7608, 9, 1, 0, 421, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aaf70022819ULL }, // Inst #7608 = VDIVPDZrmbk |
| 34493 | { 7607, 7, 1, 0, 421, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98af70022819ULL }, // Inst #7607 = VDIVPDZrmb |
| 34494 | { 7606, 7, 1, 0, 421, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8af70022819ULL }, // Inst #7606 = VDIVPDZrm |
| 34495 | { 7605, 4, 1, 0, 420, 1, 0, X86ImpOpBase + 78, 1669, 0|(1ULL<<MCID::MayRaiseFPException), 0xc7af70022829ULL }, // Inst #7605 = VDIVPDZ256rrkz |
| 34496 | { 7604, 5, 1, 0, 420, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException), 0xc3af70022829ULL }, // Inst #7604 = VDIVPDZ256rrk |
| 34497 | { 7603, 3, 1, 0, 420, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException), 0xc1af70022829ULL }, // Inst #7603 = VDIVPDZ256rr |
| 34498 | { 7602, 8, 1, 0, 419, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7af70022819ULL }, // Inst #7602 = VDIVPDZ256rmkz |
| 34499 | { 7601, 9, 1, 0, 419, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3af70022819ULL }, // Inst #7601 = VDIVPDZ256rmk |
| 34500 | { 7600, 8, 1, 0, 419, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97af70022819ULL }, // Inst #7600 = VDIVPDZ256rmbkz |
| 34501 | { 7599, 9, 1, 0, 419, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93af70022819ULL }, // Inst #7599 = VDIVPDZ256rmbk |
| 34502 | { 7598, 7, 1, 0, 419, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91af70022819ULL }, // Inst #7598 = VDIVPDZ256rmb |
| 34503 | { 7597, 7, 1, 0, 419, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1af70022819ULL }, // Inst #7597 = VDIVPDZ256rm |
| 34504 | { 7596, 4, 1, 0, 129, 1, 0, X86ImpOpBase + 78, 1633, 0|(1ULL<<MCID::MayRaiseFPException), 0xa6af70022829ULL }, // Inst #7596 = VDIVPDZ128rrkz |
| 34505 | { 7595, 5, 1, 0, 129, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2af70022829ULL }, // Inst #7595 = VDIVPDZ128rrk |
| 34506 | { 7594, 3, 1, 0, 129, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0af70022829ULL }, // Inst #7594 = VDIVPDZ128rr |
| 34507 | { 7593, 8, 1, 0, 128, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6af70022819ULL }, // Inst #7593 = VDIVPDZ128rmkz |
| 34508 | { 7592, 9, 1, 0, 128, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2af70022819ULL }, // Inst #7592 = VDIVPDZ128rmk |
| 34509 | { 7591, 8, 1, 0, 128, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96af70022819ULL }, // Inst #7591 = VDIVPDZ128rmbkz |
| 34510 | { 7590, 9, 1, 0, 128, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92af70022819ULL }, // Inst #7590 = VDIVPDZ128rmbk |
| 34511 | { 7589, 7, 1, 0, 128, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90af70022819ULL }, // Inst #7589 = VDIVPDZ128rmb |
| 34512 | { 7588, 7, 1, 0, 128, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0af70022819ULL }, // Inst #7588 = VDIVPDZ128rm |
| 34513 | { 7587, 3, 1, 0, 420, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1af30002829ULL }, // Inst #7587 = VDIVPDYrr |
| 34514 | { 7586, 7, 1, 0, 419, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1af30002819ULL }, // Inst #7586 = VDIVPDYrm |
| 34515 | { 7585, 5, 1, 0, 2121, 0, 0, X86ImpOpBase + 0, 3292, 0, 0xeea178046829ULL }, // Inst #7585 = VDBPSADBWZrrikz |
| 34516 | { 7584, 6, 1, 0, 2121, 0, 0, X86ImpOpBase + 0, 3286, 0, 0xeaa178046829ULL }, // Inst #7584 = VDBPSADBWZrrik |
| 34517 | { 7583, 4, 1, 0, 418, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe8a178046829ULL }, // Inst #7583 = VDBPSADBWZrri |
| 34518 | { 7582, 9, 1, 0, 1847, 0, 0, X86ImpOpBase + 0, 3277, 0|(1ULL<<MCID::MayLoad), 0xeea178046819ULL }, // Inst #7582 = VDBPSADBWZrmikz |
| 34519 | { 7581, 10, 1, 0, 1847, 0, 0, X86ImpOpBase + 0, 3267, 0|(1ULL<<MCID::MayLoad), 0xeaa178046819ULL }, // Inst #7581 = VDBPSADBWZrmik |
| 34520 | { 7580, 8, 1, 0, 417, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe8a178046819ULL }, // Inst #7580 = VDBPSADBWZrmi |
| 34521 | { 7579, 5, 1, 0, 2120, 0, 0, X86ImpOpBase + 0, 3262, 0, 0xc7a178046829ULL }, // Inst #7579 = VDBPSADBWZ256rrikz |
| 34522 | { 7578, 6, 1, 0, 2120, 0, 0, X86ImpOpBase + 0, 3256, 0, 0xc3a178046829ULL }, // Inst #7578 = VDBPSADBWZ256rrik |
| 34523 | { 7577, 4, 1, 0, 416, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc1a178046829ULL }, // Inst #7577 = VDBPSADBWZ256rri |
| 34524 | { 7576, 9, 1, 0, 1846, 0, 0, X86ImpOpBase + 0, 3247, 0|(1ULL<<MCID::MayLoad), 0xc7a178046819ULL }, // Inst #7576 = VDBPSADBWZ256rmikz |
| 34525 | { 7575, 10, 1, 0, 1846, 0, 0, X86ImpOpBase + 0, 3237, 0|(1ULL<<MCID::MayLoad), 0xc3a178046819ULL }, // Inst #7575 = VDBPSADBWZ256rmik |
| 34526 | { 7574, 8, 1, 0, 415, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc1a178046819ULL }, // Inst #7574 = VDBPSADBWZ256rmi |
| 34527 | { 7573, 5, 1, 0, 2119, 0, 0, X86ImpOpBase + 0, 3232, 0, 0xa6a178046829ULL }, // Inst #7573 = VDBPSADBWZ128rrikz |
| 34528 | { 7572, 6, 1, 0, 2119, 0, 0, X86ImpOpBase + 0, 3226, 0, 0xa2a178046829ULL }, // Inst #7572 = VDBPSADBWZ128rrik |
| 34529 | { 7571, 4, 1, 0, 281, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa0a178046829ULL }, // Inst #7571 = VDBPSADBWZ128rri |
| 34530 | { 7570, 9, 1, 0, 1844, 0, 0, X86ImpOpBase + 0, 3217, 0|(1ULL<<MCID::MayLoad), 0xa6a178046819ULL }, // Inst #7570 = VDBPSADBWZ128rmikz |
| 34531 | { 7569, 10, 1, 0, 1844, 0, 0, X86ImpOpBase + 0, 3207, 0|(1ULL<<MCID::MayLoad), 0xa2a178046819ULL }, // Inst #7569 = VDBPSADBWZ128rmik |
| 34532 | { 7568, 8, 1, 0, 280, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa0a178046819ULL }, // Inst #7568 = VDBPSADBWZ128rmi |
| 34533 | { 7567, 3, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3008, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0013029ULL }, // Inst #7567 = VCVTW2PHZrrkz |
| 34534 | { 7566, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3004, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0013029ULL }, // Inst #7566 = VCVTW2PHZrrk |
| 34535 | { 7565, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3000, 0, 0x15e3ee0013029ULL }, // Inst #7565 = VCVTW2PHZrrbkz |
| 34536 | { 7564, 5, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 2995, 0, 0x15a3ee0013029ULL }, // Inst #7564 = VCVTW2PHZrrbk |
| 34537 | { 7563, 3, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1583ee0013029ULL }, // Inst #7563 = VCVTW2PHZrrb |
| 34538 | { 7562, 2, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0013029ULL }, // Inst #7562 = VCVTW2PHZrr |
| 34539 | { 7561, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0013019ULL }, // Inst #7561 = VCVTW2PHZrmkz |
| 34540 | { 7560, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0013019ULL }, // Inst #7560 = VCVTW2PHZrmk |
| 34541 | { 7559, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ee0013019ULL }, // Inst #7559 = VCVTW2PHZrmbkz |
| 34542 | { 7558, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ee0013019ULL }, // Inst #7558 = VCVTW2PHZrmbk |
| 34543 | { 7557, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ee0013019ULL }, // Inst #7557 = VCVTW2PHZrmb |
| 34544 | { 7556, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0013019ULL }, // Inst #7556 = VCVTW2PHZrm |
| 34545 | { 7555, 3, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2977, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0013029ULL }, // Inst #7555 = VCVTW2PHZ256rrkz |
| 34546 | { 7554, 4, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2973, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0013029ULL }, // Inst #7554 = VCVTW2PHZ256rrk |
| 34547 | { 7553, 2, 1, 0, 1738, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0013029ULL }, // Inst #7553 = VCVTW2PHZ256rr |
| 34548 | { 7552, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0013019ULL }, // Inst #7552 = VCVTW2PHZ256rmkz |
| 34549 | { 7551, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0013019ULL }, // Inst #7551 = VCVTW2PHZ256rmk |
| 34550 | { 7550, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ee0013019ULL }, // Inst #7550 = VCVTW2PHZ256rmbkz |
| 34551 | { 7549, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ee0013019ULL }, // Inst #7549 = VCVTW2PHZ256rmbk |
| 34552 | { 7548, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ee0013019ULL }, // Inst #7548 = VCVTW2PHZ256rmb |
| 34553 | { 7547, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0013019ULL }, // Inst #7547 = VCVTW2PHZ256rm |
| 34554 | { 7546, 3, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2970, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0013029ULL }, // Inst #7546 = VCVTW2PHZ128rrkz |
| 34555 | { 7545, 4, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2966, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0013029ULL }, // Inst #7545 = VCVTW2PHZ128rrk |
| 34556 | { 7544, 2, 1, 0, 1737, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0013029ULL }, // Inst #7544 = VCVTW2PHZ128rr |
| 34557 | { 7543, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0013019ULL }, // Inst #7543 = VCVTW2PHZ128rmkz |
| 34558 | { 7542, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0013019ULL }, // Inst #7542 = VCVTW2PHZ128rmk |
| 34559 | { 7541, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ee0013019ULL }, // Inst #7541 = VCVTW2PHZ128rmbkz |
| 34560 | { 7540, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ee0013019ULL }, // Inst #7540 = VCVTW2PHZ128rmbk |
| 34561 | { 7539, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ee0013019ULL }, // Inst #7539 = VCVTW2PHZ128rmb |
| 34562 | { 7538, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0013019ULL }, // Inst #7538 = VCVTW2PHZ128rm |
| 34563 | { 7537, 3, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3008, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0013829ULL }, // Inst #7537 = VCVTUW2PHZrrkz |
| 34564 | { 7536, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3004, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0013829ULL }, // Inst #7536 = VCVTUW2PHZrrk |
| 34565 | { 7535, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3000, 0, 0x15e3ee0013829ULL }, // Inst #7535 = VCVTUW2PHZrrbkz |
| 34566 | { 7534, 5, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 2995, 0, 0x15a3ee0013829ULL }, // Inst #7534 = VCVTUW2PHZrrbk |
| 34567 | { 7533, 3, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1583ee0013829ULL }, // Inst #7533 = VCVTUW2PHZrrb |
| 34568 | { 7532, 2, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0013829ULL }, // Inst #7532 = VCVTUW2PHZrr |
| 34569 | { 7531, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0013819ULL }, // Inst #7531 = VCVTUW2PHZrmkz |
| 34570 | { 7530, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0013819ULL }, // Inst #7530 = VCVTUW2PHZrmk |
| 34571 | { 7529, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ee0013819ULL }, // Inst #7529 = VCVTUW2PHZrmbkz |
| 34572 | { 7528, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ee0013819ULL }, // Inst #7528 = VCVTUW2PHZrmbk |
| 34573 | { 7527, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ee0013819ULL }, // Inst #7527 = VCVTUW2PHZrmb |
| 34574 | { 7526, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0013819ULL }, // Inst #7526 = VCVTUW2PHZrm |
| 34575 | { 7525, 3, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2977, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0013829ULL }, // Inst #7525 = VCVTUW2PHZ256rrkz |
| 34576 | { 7524, 4, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2973, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0013829ULL }, // Inst #7524 = VCVTUW2PHZ256rrk |
| 34577 | { 7523, 2, 1, 0, 1738, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0013829ULL }, // Inst #7523 = VCVTUW2PHZ256rr |
| 34578 | { 7522, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0013819ULL }, // Inst #7522 = VCVTUW2PHZ256rmkz |
| 34579 | { 7521, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0013819ULL }, // Inst #7521 = VCVTUW2PHZ256rmk |
| 34580 | { 7520, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ee0013819ULL }, // Inst #7520 = VCVTUW2PHZ256rmbkz |
| 34581 | { 7519, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ee0013819ULL }, // Inst #7519 = VCVTUW2PHZ256rmbk |
| 34582 | { 7518, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ee0013819ULL }, // Inst #7518 = VCVTUW2PHZ256rmb |
| 34583 | { 7517, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0013819ULL }, // Inst #7517 = VCVTUW2PHZ256rm |
| 34584 | { 7516, 3, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2970, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0013829ULL }, // Inst #7516 = VCVTUW2PHZ128rrkz |
| 34585 | { 7515, 4, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2966, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0013829ULL }, // Inst #7515 = VCVTUW2PHZ128rrk |
| 34586 | { 7514, 2, 1, 0, 1737, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0013829ULL }, // Inst #7514 = VCVTUW2PHZ128rr |
| 34587 | { 7513, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0013819ULL }, // Inst #7513 = VCVTUW2PHZ128rmkz |
| 34588 | { 7512, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0013819ULL }, // Inst #7512 = VCVTUW2PHZ128rmk |
| 34589 | { 7511, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ee0013819ULL }, // Inst #7511 = VCVTUW2PHZ128rmbkz |
| 34590 | { 7510, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ee0013819ULL }, // Inst #7510 = VCVTUW2PHZ128rmbk |
| 34591 | { 7509, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ee0013819ULL }, // Inst #7509 = VCVTUW2PHZ128rmb |
| 34592 | { 7508, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0013819ULL }, // Inst #7508 = VCVTUW2PHZ128rm |
| 34593 | { 7507, 4, 1, 0, 1279, 1, 0, X86ImpOpBase + 78, 3171, 0, 0x190bde8023029ULL }, // Inst #7507 = VCVTUSI642SSZrrb_Int |
| 34594 | { 7506, 3, 1, 0, 1279, 1, 0, X86ImpOpBase + 78, 3168, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bde8023029ULL }, // Inst #7506 = VCVTUSI642SSZrr_Int |
| 34595 | { 7505, 3, 1, 0, 1279, 1, 0, X86ImpOpBase + 78, 3184, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bde8023029ULL }, // Inst #7505 = VCVTUSI642SSZrr |
| 34596 | { 7504, 7, 1, 0, 1701, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bde8023019ULL }, // Inst #7504 = VCVTUSI642SSZrm_Int |
| 34597 | { 7503, 7, 1, 0, 1701, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bde8023019ULL }, // Inst #7503 = VCVTUSI642SSZrm |
| 34598 | { 7502, 4, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3171, 0, 0x190bde8033029ULL }, // Inst #7502 = VCVTUSI642SHZrrb_Int |
| 34599 | { 7501, 3, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3168, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bde8033029ULL }, // Inst #7501 = VCVTUSI642SHZrr_Int |
| 34600 | { 7500, 3, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3181, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bde8033029ULL }, // Inst #7500 = VCVTUSI642SHZrr |
| 34601 | { 7499, 7, 1, 0, 2113, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bde8033019ULL }, // Inst #7499 = VCVTUSI642SHZrm_Int |
| 34602 | { 7498, 7, 1, 0, 2113, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bde8033019ULL }, // Inst #7498 = VCVTUSI642SHZrm |
| 34603 | { 7497, 4, 1, 0, 1267, 1, 0, X86ImpOpBase + 78, 3171, 0, 0x190bdf0023829ULL }, // Inst #7497 = VCVTUSI642SDZrrb_Int |
| 34604 | { 7496, 3, 1, 0, 1267, 1, 0, X86ImpOpBase + 78, 3168, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bdf0023829ULL }, // Inst #7496 = VCVTUSI642SDZrr_Int |
| 34605 | { 7495, 3, 1, 0, 1267, 1, 0, X86ImpOpBase + 78, 3165, 0|(1ULL<<MCID::MayRaiseFPException), 0x80bdf0023829ULL }, // Inst #7495 = VCVTUSI642SDZrr |
| 34606 | { 7494, 7, 1, 0, 108, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bdf0023819ULL }, // Inst #7494 = VCVTUSI642SDZrm_Int |
| 34607 | { 7493, 7, 1, 0, 108, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80bdf0023819ULL }, // Inst #7493 = VCVTUSI642SDZrm |
| 34608 | { 7492, 4, 1, 0, 1704, 1, 0, X86ImpOpBase + 78, 3155, 0, 0x170bde8003029ULL }, // Inst #7492 = VCVTUSI2SSZrrb_Int |
| 34609 | { 7491, 3, 1, 0, 1704, 1, 0, X86ImpOpBase + 78, 3143, 0|(1ULL<<MCID::MayRaiseFPException), 0x60bde8003029ULL }, // Inst #7491 = VCVTUSI2SSZrr_Int |
| 34610 | { 7490, 3, 1, 0, 1704, 1, 0, X86ImpOpBase + 78, 3159, 0|(1ULL<<MCID::MayRaiseFPException), 0x60bde8003029ULL }, // Inst #7490 = VCVTUSI2SSZrr |
| 34611 | { 7489, 7, 1, 0, 112, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60bde8003019ULL }, // Inst #7489 = VCVTUSI2SSZrm_Int |
| 34612 | { 7488, 7, 1, 0, 112, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60bde8003019ULL }, // Inst #7488 = VCVTUSI2SSZrm |
| 34613 | { 7487, 4, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3155, 0, 0x170bde8013029ULL }, // Inst #7487 = VCVTUSI2SHZrrb_Int |
| 34614 | { 7486, 3, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3143, 0|(1ULL<<MCID::MayRaiseFPException), 0x60bde8013029ULL }, // Inst #7486 = VCVTUSI2SHZrr_Int |
| 34615 | { 7485, 3, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3152, 0|(1ULL<<MCID::MayRaiseFPException), 0x60bde8013029ULL }, // Inst #7485 = VCVTUSI2SHZrr |
| 34616 | { 7484, 7, 1, 0, 2113, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60bde8013019ULL }, // Inst #7484 = VCVTUSI2SHZrm_Int |
| 34617 | { 7483, 7, 1, 0, 2113, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60bde8013019ULL }, // Inst #7483 = VCVTUSI2SHZrm |
| 34618 | { 7482, 3, 1, 0, 1267, 0, 0, X86ImpOpBase + 0, 3143, 0, 0x60bdf0003829ULL }, // Inst #7482 = VCVTUSI2SDZrr_Int |
| 34619 | { 7481, 3, 1, 0, 1267, 0, 0, X86ImpOpBase + 0, 3140, 0, 0x60bdf0003829ULL }, // Inst #7481 = VCVTUSI2SDZrr |
| 34620 | { 7480, 7, 1, 0, 108, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x60bdf0003819ULL }, // Inst #7480 = VCVTUSI2SDZrm_Int |
| 34621 | { 7479, 7, 1, 0, 108, 0, 0, X86ImpOpBase + 0, 1903, 0|(1ULL<<MCID::MayLoad), 0x60bdf0003819ULL }, // Inst #7479 = VCVTUSI2SDZrm |
| 34622 | { 7478, 3, 1, 0, 1948, 1, 0, X86ImpOpBase + 78, 2902, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60023829ULL }, // Inst #7478 = VCVTUQQ2PSZrrkz |
| 34623 | { 7477, 4, 1, 0, 1948, 1, 0, X86ImpOpBase + 78, 2898, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60023829ULL }, // Inst #7477 = VCVTUQQ2PSZrrk |
| 34624 | { 7476, 4, 1, 0, 1948, 1, 0, X86ImpOpBase + 78, 2894, 0, 0x19e3d60023829ULL }, // Inst #7476 = VCVTUQQ2PSZrrbkz |
| 34625 | { 7475, 5, 1, 0, 1948, 1, 0, X86ImpOpBase + 78, 2889, 0, 0x19a3d60023829ULL }, // Inst #7475 = VCVTUQQ2PSZrrbk |
| 34626 | { 7474, 3, 1, 0, 1948, 1, 0, X86ImpOpBase + 78, 2847, 0, 0x1983d60023829ULL }, // Inst #7474 = VCVTUQQ2PSZrrb |
| 34627 | { 7473, 2, 1, 0, 1290, 1, 0, X86ImpOpBase + 78, 2845, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60023829ULL }, // Inst #7473 = VCVTUQQ2PSZrr |
| 34628 | { 7472, 7, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60023819ULL }, // Inst #7472 = VCVTUQQ2PSZrmkz |
| 34629 | { 7471, 8, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60023819ULL }, // Inst #7471 = VCVTUQQ2PSZrmk |
| 34630 | { 7470, 7, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3d60023819ULL }, // Inst #7470 = VCVTUQQ2PSZrmbkz |
| 34631 | { 7469, 8, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3d60023819ULL }, // Inst #7469 = VCVTUQQ2PSZrmbk |
| 34632 | { 7468, 6, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983d60023819ULL }, // Inst #7468 = VCVTUQQ2PSZrmb |
| 34633 | { 7467, 6, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60023819ULL }, // Inst #7467 = VCVTUQQ2PSZrm |
| 34634 | { 7466, 3, 1, 0, 1285, 1, 0, X86ImpOpBase + 78, 2886, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60023829ULL }, // Inst #7466 = VCVTUQQ2PSZ256rrkz |
| 34635 | { 7465, 4, 1, 0, 1285, 1, 0, X86ImpOpBase + 78, 2882, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60023829ULL }, // Inst #7465 = VCVTUQQ2PSZ256rrk |
| 34636 | { 7464, 2, 1, 0, 1285, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60023829ULL }, // Inst #7464 = VCVTUQQ2PSZ256rr |
| 34637 | { 7463, 7, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60023819ULL }, // Inst #7463 = VCVTUQQ2PSZ256rmkz |
| 34638 | { 7462, 8, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60023819ULL }, // Inst #7462 = VCVTUQQ2PSZ256rmk |
| 34639 | { 7461, 7, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973d60023819ULL }, // Inst #7461 = VCVTUQQ2PSZ256rmbkz |
| 34640 | { 7460, 8, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933d60023819ULL }, // Inst #7460 = VCVTUQQ2PSZ256rmbk |
| 34641 | { 7459, 6, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913d60023819ULL }, // Inst #7459 = VCVTUQQ2PSZ256rmb |
| 34642 | { 7458, 6, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60023819ULL }, // Inst #7458 = VCVTUQQ2PSZ256rm |
| 34643 | { 7457, 3, 1, 0, 1265, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60023829ULL }, // Inst #7457 = VCVTUQQ2PSZ128rrkz |
| 34644 | { 7456, 4, 1, 0, 1265, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60023829ULL }, // Inst #7456 = VCVTUQQ2PSZ128rrk |
| 34645 | { 7455, 2, 1, 0, 1265, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60023829ULL }, // Inst #7455 = VCVTUQQ2PSZ128rr |
| 34646 | { 7454, 7, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60023819ULL }, // Inst #7454 = VCVTUQQ2PSZ128rmkz |
| 34647 | { 7453, 8, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60023819ULL }, // Inst #7453 = VCVTUQQ2PSZ128rmk |
| 34648 | { 7452, 7, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963d60023819ULL }, // Inst #7452 = VCVTUQQ2PSZ128rmbkz |
| 34649 | { 7451, 8, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923d60023819ULL }, // Inst #7451 = VCVTUQQ2PSZ128rmbk |
| 34650 | { 7450, 6, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903d60023819ULL }, // Inst #7450 = VCVTUQQ2PSZ128rmb |
| 34651 | { 7449, 6, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60023819ULL }, // Inst #7449 = VCVTUQQ2PSZ128rm |
| 34652 | { 7448, 3, 1, 0, 2099, 1, 0, X86ImpOpBase + 78, 2923, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60033829ULL }, // Inst #7448 = VCVTUQQ2PHZrrkz |
| 34653 | { 7447, 4, 1, 0, 2099, 1, 0, X86ImpOpBase + 78, 2919, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60033829ULL }, // Inst #7447 = VCVTUQQ2PHZrrk |
| 34654 | { 7446, 4, 1, 0, 2099, 1, 0, X86ImpOpBase + 78, 2915, 0, 0x19e3d60033829ULL }, // Inst #7446 = VCVTUQQ2PHZrrbkz |
| 34655 | { 7445, 5, 1, 0, 2099, 1, 0, X86ImpOpBase + 78, 2910, 0, 0x19a3d60033829ULL }, // Inst #7445 = VCVTUQQ2PHZrrbk |
| 34656 | { 7444, 3, 1, 0, 2098, 1, 0, X86ImpOpBase + 78, 2907, 0, 0x1983d60033829ULL }, // Inst #7444 = VCVTUQQ2PHZrrb |
| 34657 | { 7443, 2, 1, 0, 2098, 1, 0, X86ImpOpBase + 78, 2905, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60033829ULL }, // Inst #7443 = VCVTUQQ2PHZrr |
| 34658 | { 7442, 7, 1, 0, 2097, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60033819ULL }, // Inst #7442 = VCVTUQQ2PHZrmkz |
| 34659 | { 7441, 8, 1, 0, 2097, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60033819ULL }, // Inst #7441 = VCVTUQQ2PHZrmk |
| 34660 | { 7440, 7, 1, 0, 2097, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3d60033819ULL }, // Inst #7440 = VCVTUQQ2PHZrmbkz |
| 34661 | { 7439, 8, 1, 0, 2097, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3d60033819ULL }, // Inst #7439 = VCVTUQQ2PHZrmbk |
| 34662 | { 7438, 6, 1, 0, 2096, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983d60033819ULL }, // Inst #7438 = VCVTUQQ2PHZrmb |
| 34663 | { 7437, 6, 1, 0, 2096, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60033819ULL }, // Inst #7437 = VCVTUQQ2PHZrm |
| 34664 | { 7436, 3, 1, 0, 2095, 1, 0, X86ImpOpBase + 78, 2886, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60033829ULL }, // Inst #7436 = VCVTUQQ2PHZ256rrkz |
| 34665 | { 7435, 4, 1, 0, 2095, 1, 0, X86ImpOpBase + 78, 2882, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60033829ULL }, // Inst #7435 = VCVTUQQ2PHZ256rrk |
| 34666 | { 7434, 2, 1, 0, 2092, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60033829ULL }, // Inst #7434 = VCVTUQQ2PHZ256rr |
| 34667 | { 7433, 7, 1, 0, 2094, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60033819ULL }, // Inst #7433 = VCVTUQQ2PHZ256rmkz |
| 34668 | { 7432, 8, 1, 0, 2094, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60033819ULL }, // Inst #7432 = VCVTUQQ2PHZ256rmk |
| 34669 | { 7431, 7, 1, 0, 2094, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973d60033819ULL }, // Inst #7431 = VCVTUQQ2PHZ256rmbkz |
| 34670 | { 7430, 8, 1, 0, 2094, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933d60033819ULL }, // Inst #7430 = VCVTUQQ2PHZ256rmbk |
| 34671 | { 7429, 6, 1, 0, 2093, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913d60033819ULL }, // Inst #7429 = VCVTUQQ2PHZ256rmb |
| 34672 | { 7428, 6, 1, 0, 2093, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60033819ULL }, // Inst #7428 = VCVTUQQ2PHZ256rm |
| 34673 | { 7427, 3, 1, 0, 2091, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60033829ULL }, // Inst #7427 = VCVTUQQ2PHZ128rrkz |
| 34674 | { 7426, 4, 1, 0, 2091, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60033829ULL }, // Inst #7426 = VCVTUQQ2PHZ128rrk |
| 34675 | { 7425, 2, 1, 0, 2090, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60033829ULL }, // Inst #7425 = VCVTUQQ2PHZ128rr |
| 34676 | { 7424, 7, 1, 0, 2089, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60033819ULL }, // Inst #7424 = VCVTUQQ2PHZ128rmkz |
| 34677 | { 7423, 8, 1, 0, 2089, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60033819ULL }, // Inst #7423 = VCVTUQQ2PHZ128rmk |
| 34678 | { 7422, 7, 1, 0, 2089, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963d60033819ULL }, // Inst #7422 = VCVTUQQ2PHZ128rmbkz |
| 34679 | { 7421, 8, 1, 0, 2089, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923d60033819ULL }, // Inst #7421 = VCVTUQQ2PHZ128rmbk |
| 34680 | { 7420, 6, 1, 0, 2088, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903d60033819ULL }, // Inst #7420 = VCVTUQQ2PHZ128rmb |
| 34681 | { 7419, 6, 1, 0, 2088, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60033819ULL }, // Inst #7419 = VCVTUQQ2PHZ128rm |
| 34682 | { 7418, 3, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60023029ULL }, // Inst #7418 = VCVTUQQ2PDZrrkz |
| 34683 | { 7417, 4, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60023029ULL }, // Inst #7417 = VCVTUQQ2PDZrrk |
| 34684 | { 7416, 4, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2931, 0, 0x19e3d60023029ULL }, // Inst #7416 = VCVTUQQ2PDZrrbkz |
| 34685 | { 7415, 5, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2926, 0, 0x19a3d60023029ULL }, // Inst #7415 = VCVTUQQ2PDZrrbk |
| 34686 | { 7414, 3, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1983d60023029ULL }, // Inst #7414 = VCVTUQQ2PDZrrb |
| 34687 | { 7413, 2, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60023029ULL }, // Inst #7413 = VCVTUQQ2PDZrr |
| 34688 | { 7412, 7, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60023019ULL }, // Inst #7412 = VCVTUQQ2PDZrmkz |
| 34689 | { 7411, 8, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60023019ULL }, // Inst #7411 = VCVTUQQ2PDZrmk |
| 34690 | { 7410, 7, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3d60023019ULL }, // Inst #7410 = VCVTUQQ2PDZrmbkz |
| 34691 | { 7409, 8, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3d60023019ULL }, // Inst #7409 = VCVTUQQ2PDZrmbk |
| 34692 | { 7408, 6, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983d60023019ULL }, // Inst #7408 = VCVTUQQ2PDZrmb |
| 34693 | { 7407, 6, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60023019ULL }, // Inst #7407 = VCVTUQQ2PDZrm |
| 34694 | { 7406, 3, 1, 0, 2026, 1, 0, X86ImpOpBase + 78, 2722, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60023029ULL }, // Inst #7406 = VCVTUQQ2PDZ256rrkz |
| 34695 | { 7405, 4, 1, 0, 2026, 1, 0, X86ImpOpBase + 78, 2718, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60023029ULL }, // Inst #7405 = VCVTUQQ2PDZ256rrk |
| 34696 | { 7404, 2, 1, 0, 2026, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60023029ULL }, // Inst #7404 = VCVTUQQ2PDZ256rr |
| 34697 | { 7403, 7, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60023019ULL }, // Inst #7403 = VCVTUQQ2PDZ256rmkz |
| 34698 | { 7402, 8, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60023019ULL }, // Inst #7402 = VCVTUQQ2PDZ256rmk |
| 34699 | { 7401, 7, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973d60023019ULL }, // Inst #7401 = VCVTUQQ2PDZ256rmbkz |
| 34700 | { 7400, 8, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933d60023019ULL }, // Inst #7400 = VCVTUQQ2PDZ256rmbk |
| 34701 | { 7399, 6, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913d60023019ULL }, // Inst #7399 = VCVTUQQ2PDZ256rmb |
| 34702 | { 7398, 6, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60023019ULL }, // Inst #7398 = VCVTUQQ2PDZ256rm |
| 34703 | { 7397, 3, 1, 0, 2025, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60023029ULL }, // Inst #7397 = VCVTUQQ2PDZ128rrkz |
| 34704 | { 7396, 4, 1, 0, 2025, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60023029ULL }, // Inst #7396 = VCVTUQQ2PDZ128rrk |
| 34705 | { 7395, 2, 1, 0, 2025, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60023029ULL }, // Inst #7395 = VCVTUQQ2PDZ128rr |
| 34706 | { 7394, 7, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60023019ULL }, // Inst #7394 = VCVTUQQ2PDZ128rmkz |
| 34707 | { 7393, 8, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60023019ULL }, // Inst #7393 = VCVTUQQ2PDZ128rmk |
| 34708 | { 7392, 7, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963d60023019ULL }, // Inst #7392 = VCVTUQQ2PDZ128rmbkz |
| 34709 | { 7391, 8, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923d60023019ULL }, // Inst #7391 = VCVTUQQ2PDZ128rmbk |
| 34710 | { 7390, 6, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903d60023019ULL }, // Inst #7390 = VCVTUQQ2PDZ128rmb |
| 34711 | { 7389, 6, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60023019ULL }, // Inst #7389 = VCVTUQQ2PDZ128rm |
| 34712 | { 7388, 3, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60003829ULL }, // Inst #7388 = VCVTUDQ2PSZrrkz |
| 34713 | { 7387, 4, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60003829ULL }, // Inst #7387 = VCVTUDQ2PSZrrk |
| 34714 | { 7386, 4, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2876, 0, 0x17e3d60003829ULL }, // Inst #7386 = VCVTUDQ2PSZrrbkz |
| 34715 | { 7385, 5, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2871, 0, 0x17a3d60003829ULL }, // Inst #7385 = VCVTUDQ2PSZrrbk |
| 34716 | { 7384, 3, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1783d60003829ULL }, // Inst #7384 = VCVTUDQ2PSZrrb |
| 34717 | { 7383, 2, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60003829ULL }, // Inst #7383 = VCVTUDQ2PSZrr |
| 34718 | { 7382, 7, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60003819ULL }, // Inst #7382 = VCVTUDQ2PSZrmkz |
| 34719 | { 7381, 8, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60003819ULL }, // Inst #7381 = VCVTUDQ2PSZrmk |
| 34720 | { 7380, 7, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3d60003819ULL }, // Inst #7380 = VCVTUDQ2PSZrmbkz |
| 34721 | { 7379, 8, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3d60003819ULL }, // Inst #7379 = VCVTUDQ2PSZrmbk |
| 34722 | { 7378, 6, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783d60003819ULL }, // Inst #7378 = VCVTUDQ2PSZrmb |
| 34723 | { 7377, 6, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60003819ULL }, // Inst #7377 = VCVTUDQ2PSZrm |
| 34724 | { 7376, 3, 1, 0, 381, 1, 0, X86ImpOpBase + 78, 2765, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60003829ULL }, // Inst #7376 = VCVTUDQ2PSZ256rrkz |
| 34725 | { 7375, 4, 1, 0, 381, 1, 0, X86ImpOpBase + 78, 2761, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60003829ULL }, // Inst #7375 = VCVTUDQ2PSZ256rrk |
| 34726 | { 7374, 2, 1, 0, 381, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60003829ULL }, // Inst #7374 = VCVTUDQ2PSZ256rr |
| 34727 | { 7373, 7, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60003819ULL }, // Inst #7373 = VCVTUDQ2PSZ256rmkz |
| 34728 | { 7372, 8, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60003819ULL }, // Inst #7372 = VCVTUDQ2PSZ256rmk |
| 34729 | { 7371, 7, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773d60003819ULL }, // Inst #7371 = VCVTUDQ2PSZ256rmbkz |
| 34730 | { 7370, 8, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733d60003819ULL }, // Inst #7370 = VCVTUDQ2PSZ256rmbk |
| 34731 | { 7369, 6, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713d60003819ULL }, // Inst #7369 = VCVTUDQ2PSZ256rmb |
| 34732 | { 7368, 6, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60003819ULL }, // Inst #7368 = VCVTUDQ2PSZ256rm |
| 34733 | { 7367, 3, 1, 0, 93, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60003829ULL }, // Inst #7367 = VCVTUDQ2PSZ128rrkz |
| 34734 | { 7366, 4, 1, 0, 93, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60003829ULL }, // Inst #7366 = VCVTUDQ2PSZ128rrk |
| 34735 | { 7365, 2, 1, 0, 93, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60003829ULL }, // Inst #7365 = VCVTUDQ2PSZ128rr |
| 34736 | { 7364, 7, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60003819ULL }, // Inst #7364 = VCVTUDQ2PSZ128rmkz |
| 34737 | { 7363, 8, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60003819ULL }, // Inst #7363 = VCVTUDQ2PSZ128rmk |
| 34738 | { 7362, 7, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763d60003819ULL }, // Inst #7362 = VCVTUDQ2PSZ128rmbkz |
| 34739 | { 7361, 8, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723d60003819ULL }, // Inst #7361 = VCVTUDQ2PSZ128rmbk |
| 34740 | { 7360, 6, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703d60003819ULL }, // Inst #7360 = VCVTUDQ2PSZ128rmb |
| 34741 | { 7359, 6, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60003819ULL }, // Inst #7359 = VCVTUDQ2PSZ128rm |
| 34742 | { 7358, 3, 1, 0, 1962, 1, 0, X86ImpOpBase + 78, 2863, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60013829ULL }, // Inst #7358 = VCVTUDQ2PHZrrkz |
| 34743 | { 7357, 4, 1, 0, 1962, 1, 0, X86ImpOpBase + 78, 2859, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60013829ULL }, // Inst #7357 = VCVTUDQ2PHZrrk |
| 34744 | { 7356, 4, 1, 0, 1962, 1, 0, X86ImpOpBase + 78, 2855, 0, 0x17e3d60013829ULL }, // Inst #7356 = VCVTUDQ2PHZrrbkz |
| 34745 | { 7355, 5, 1, 0, 1962, 1, 0, X86ImpOpBase + 78, 2850, 0, 0x17a3d60013829ULL }, // Inst #7355 = VCVTUDQ2PHZrrbk |
| 34746 | { 7354, 3, 1, 0, 1961, 1, 0, X86ImpOpBase + 78, 2847, 0, 0x1783d60013829ULL }, // Inst #7354 = VCVTUDQ2PHZrrb |
| 34747 | { 7353, 2, 1, 0, 1961, 1, 0, X86ImpOpBase + 78, 2845, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60013829ULL }, // Inst #7353 = VCVTUDQ2PHZrr |
| 34748 | { 7352, 7, 1, 0, 1960, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60013819ULL }, // Inst #7352 = VCVTUDQ2PHZrmkz |
| 34749 | { 7351, 8, 1, 0, 1960, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60013819ULL }, // Inst #7351 = VCVTUDQ2PHZrmk |
| 34750 | { 7350, 7, 1, 0, 1960, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3d60013819ULL }, // Inst #7350 = VCVTUDQ2PHZrmbkz |
| 34751 | { 7349, 8, 1, 0, 1960, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3d60013819ULL }, // Inst #7349 = VCVTUDQ2PHZrmbk |
| 34752 | { 7348, 6, 1, 0, 1959, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783d60013819ULL }, // Inst #7348 = VCVTUDQ2PHZrmb |
| 34753 | { 7347, 6, 1, 0, 1959, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60013819ULL }, // Inst #7347 = VCVTUDQ2PHZrm |
| 34754 | { 7346, 3, 1, 0, 1958, 1, 0, X86ImpOpBase + 78, 2827, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60013829ULL }, // Inst #7346 = VCVTUDQ2PHZ256rrkz |
| 34755 | { 7345, 4, 1, 0, 1958, 1, 0, X86ImpOpBase + 78, 2823, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60013829ULL }, // Inst #7345 = VCVTUDQ2PHZ256rrk |
| 34756 | { 7344, 2, 1, 0, 1957, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60013829ULL }, // Inst #7344 = VCVTUDQ2PHZ256rr |
| 34757 | { 7343, 7, 1, 0, 1956, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60013819ULL }, // Inst #7343 = VCVTUDQ2PHZ256rmkz |
| 34758 | { 7342, 8, 1, 0, 1956, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60013819ULL }, // Inst #7342 = VCVTUDQ2PHZ256rmk |
| 34759 | { 7341, 7, 1, 0, 1956, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773d60013819ULL }, // Inst #7341 = VCVTUDQ2PHZ256rmbkz |
| 34760 | { 7340, 8, 1, 0, 1956, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733d60013819ULL }, // Inst #7340 = VCVTUDQ2PHZ256rmbk |
| 34761 | { 7339, 6, 1, 0, 1954, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713d60013819ULL }, // Inst #7339 = VCVTUDQ2PHZ256rmb |
| 34762 | { 7338, 6, 1, 0, 1954, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60013819ULL }, // Inst #7338 = VCVTUDQ2PHZ256rm |
| 34763 | { 7337, 3, 1, 0, 1953, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60013829ULL }, // Inst #7337 = VCVTUDQ2PHZ128rrkz |
| 34764 | { 7336, 4, 1, 0, 1953, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60013829ULL }, // Inst #7336 = VCVTUDQ2PHZ128rrk |
| 34765 | { 7335, 2, 1, 0, 1952, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60013829ULL }, // Inst #7335 = VCVTUDQ2PHZ128rr |
| 34766 | { 7334, 7, 1, 0, 1951, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60013819ULL }, // Inst #7334 = VCVTUDQ2PHZ128rmkz |
| 34767 | { 7333, 8, 1, 0, 1951, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60013819ULL }, // Inst #7333 = VCVTUDQ2PHZ128rmk |
| 34768 | { 7332, 7, 1, 0, 1951, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763d60013819ULL }, // Inst #7332 = VCVTUDQ2PHZ128rmbkz |
| 34769 | { 7331, 8, 1, 0, 1951, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723d60013819ULL }, // Inst #7331 = VCVTUDQ2PHZ128rmbk |
| 34770 | { 7330, 6, 1, 0, 1949, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703d60013819ULL }, // Inst #7330 = VCVTUDQ2PHZ128rmb |
| 34771 | { 7329, 6, 1, 0, 1949, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60013819ULL }, // Inst #7329 = VCVTUDQ2PHZ128rm |
| 34772 | { 7328, 3, 1, 0, 1946, 0, 0, X86ImpOpBase + 0, 2803, 0, 0xce3d60003029ULL }, // Inst #7328 = VCVTUDQ2PDZrrkz |
| 34773 | { 7327, 4, 1, 0, 1946, 0, 0, X86ImpOpBase + 0, 2799, 0, 0xca3d60003029ULL }, // Inst #7327 = VCVTUDQ2PDZrrk |
| 34774 | { 7326, 2, 1, 0, 1286, 0, 0, X86ImpOpBase + 0, 2797, 0, 0xc83d60003029ULL }, // Inst #7326 = VCVTUDQ2PDZrr |
| 34775 | { 7325, 7, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xce3d60003019ULL }, // Inst #7325 = VCVTUDQ2PDZrmkz |
| 34776 | { 7324, 8, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xca3d60003019ULL }, // Inst #7324 = VCVTUDQ2PDZrmk |
| 34777 | { 7323, 7, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x7e3d60003019ULL }, // Inst #7323 = VCVTUDQ2PDZrmbkz |
| 34778 | { 7322, 8, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0x7a3d60003019ULL }, // Inst #7322 = VCVTUDQ2PDZrmbk |
| 34779 | { 7321, 6, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x783d60003019ULL }, // Inst #7321 = VCVTUDQ2PDZrmb |
| 34780 | { 7320, 6, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc83d60003019ULL }, // Inst #7320 = VCVTUDQ2PDZrm |
| 34781 | { 7319, 3, 1, 0, 1281, 0, 0, X86ImpOpBase + 0, 2349, 0, 0xa73d60003029ULL }, // Inst #7319 = VCVTUDQ2PDZ256rrkz |
| 34782 | { 7318, 4, 1, 0, 1281, 0, 0, X86ImpOpBase + 0, 2345, 0, 0xa33d60003029ULL }, // Inst #7318 = VCVTUDQ2PDZ256rrk |
| 34783 | { 7317, 2, 1, 0, 1281, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xa13d60003029ULL }, // Inst #7317 = VCVTUDQ2PDZ256rr |
| 34784 | { 7316, 7, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xa73d60003019ULL }, // Inst #7316 = VCVTUDQ2PDZ256rmkz |
| 34785 | { 7315, 8, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xa33d60003019ULL }, // Inst #7315 = VCVTUDQ2PDZ256rmk |
| 34786 | { 7314, 7, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x773d60003019ULL }, // Inst #7314 = VCVTUDQ2PDZ256rmbkz |
| 34787 | { 7313, 8, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x733d60003019ULL }, // Inst #7313 = VCVTUDQ2PDZ256rmbk |
| 34788 | { 7312, 6, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x713d60003019ULL }, // Inst #7312 = VCVTUDQ2PDZ256rmb |
| 34789 | { 7311, 6, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa13d60003019ULL }, // Inst #7311 = VCVTUDQ2PDZ256rm |
| 34790 | { 7310, 3, 1, 0, 1261, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x863d60003029ULL }, // Inst #7310 = VCVTUDQ2PDZ128rrkz |
| 34791 | { 7309, 4, 1, 0, 1261, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x823d60003029ULL }, // Inst #7309 = VCVTUDQ2PDZ128rrk |
| 34792 | { 7308, 2, 1, 0, 1261, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x803d60003029ULL }, // Inst #7308 = VCVTUDQ2PDZ128rr |
| 34793 | { 7307, 7, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x863d60003019ULL }, // Inst #7307 = VCVTUDQ2PDZ128rmkz |
| 34794 | { 7306, 8, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x823d60003019ULL }, // Inst #7306 = VCVTUDQ2PDZ128rmk |
| 34795 | { 7305, 7, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x763d60003019ULL }, // Inst #7305 = VCVTUDQ2PDZ128rmbkz |
| 34796 | { 7304, 8, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x723d60003019ULL }, // Inst #7304 = VCVTUDQ2PDZ128rmbk |
| 34797 | { 7303, 6, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x703d60003019ULL }, // Inst #7303 = VCVTUDQ2PDZ128rmb |
| 34798 | { 7302, 6, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x803d60003019ULL }, // Inst #7302 = VCVTUDQ2PDZ128rm |
| 34799 | { 7301, 2, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3123, 0, 0x703c68003029ULL }, // Inst #7301 = VCVTTSS2USIZrrb_Int |
| 34800 | { 7300, 2, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x603c68003029ULL }, // Inst #7300 = VCVTTSS2USIZrr_Int |
| 34801 | { 7299, 2, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3201, 0|(1ULL<<MCID::MayRaiseFPException), 0x603c68003029ULL }, // Inst #7299 = VCVTTSS2USIZrr |
| 34802 | { 7298, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603c68003019ULL }, // Inst #7298 = VCVTTSS2USIZrm_Int |
| 34803 | { 7297, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603c68003019ULL }, // Inst #7297 = VCVTTSS2USIZrm |
| 34804 | { 7296, 2, 1, 0, 1705, 1, 0, X86ImpOpBase + 78, 3116, 0, 0x703c68023029ULL }, // Inst #7296 = VCVTTSS2USI64Zrrb_Int |
| 34805 | { 7295, 2, 1, 0, 1705, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x603c68023029ULL }, // Inst #7295 = VCVTTSS2USI64Zrr_Int |
| 34806 | { 7294, 2, 1, 0, 1303, 1, 0, X86ImpOpBase + 78, 3199, 0|(1ULL<<MCID::MayRaiseFPException), 0x603c68023029ULL }, // Inst #7294 = VCVTTSS2USI64Zrr |
| 34807 | { 7293, 6, 1, 0, 1382, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603c68023019ULL }, // Inst #7293 = VCVTTSS2USI64Zrm_Int |
| 34808 | { 7292, 6, 1, 0, 1382, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603c68023019ULL }, // Inst #7292 = VCVTTSS2USI64Zrm |
| 34809 | { 7291, 2, 1, 0, 984, 1, 0, X86ImpOpBase + 78, 1003, 0|(1ULL<<MCID::MayRaiseFPException), 0x1628003029ULL }, // Inst #7291 = VCVTTSS2SIrr_Int |
| 34810 | { 7290, 2, 1, 0, 983, 1, 0, X86ImpOpBase + 78, 1025, 0|(1ULL<<MCID::MayRaiseFPException), 0x1628003029ULL }, // Inst #7290 = VCVTTSS2SIrr |
| 34811 | { 7289, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1628003019ULL }, // Inst #7289 = VCVTTSS2SIrm_Int |
| 34812 | { 7288, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1628003019ULL }, // Inst #7288 = VCVTTSS2SIrm |
| 34813 | { 7287, 2, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3123, 0, 0x701668003029ULL }, // Inst #7287 = VCVTTSS2SIZrrb_Int |
| 34814 | { 7286, 2, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x601668003029ULL }, // Inst #7286 = VCVTTSS2SIZrr_Int |
| 34815 | { 7285, 2, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3201, 0|(1ULL<<MCID::MayRaiseFPException), 0x601668003029ULL }, // Inst #7285 = VCVTTSS2SIZrr |
| 34816 | { 7284, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601668003019ULL }, // Inst #7284 = VCVTTSS2SIZrm_Int |
| 34817 | { 7283, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601668003019ULL }, // Inst #7283 = VCVTTSS2SIZrm |
| 34818 | { 7282, 2, 1, 0, 1212, 1, 0, X86ImpOpBase + 78, 999, 0|(1ULL<<MCID::MayRaiseFPException), 0x1628023029ULL }, // Inst #7282 = VCVTTSS2SI64rr_Int |
| 34819 | { 7281, 2, 1, 0, 1211, 1, 0, X86ImpOpBase + 78, 1023, 0|(1ULL<<MCID::MayRaiseFPException), 0x1628023029ULL }, // Inst #7281 = VCVTTSS2SI64rr |
| 34820 | { 7280, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1628023019ULL }, // Inst #7280 = VCVTTSS2SI64rm_Int |
| 34821 | { 7279, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1628023019ULL }, // Inst #7279 = VCVTTSS2SI64rm |
| 34822 | { 7278, 2, 1, 0, 1705, 1, 0, X86ImpOpBase + 78, 3116, 0, 0x701668023029ULL }, // Inst #7278 = VCVTTSS2SI64Zrrb_Int |
| 34823 | { 7277, 2, 1, 0, 1705, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x601668023029ULL }, // Inst #7277 = VCVTTSS2SI64Zrr_Int |
| 34824 | { 7276, 2, 1, 0, 1705, 1, 0, X86ImpOpBase + 78, 3199, 0|(1ULL<<MCID::MayRaiseFPException), 0x601668023029ULL }, // Inst #7276 = VCVTTSS2SI64Zrr |
| 34825 | { 7275, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601668023019ULL }, // Inst #7275 = VCVTTSS2SI64Zrm_Int |
| 34826 | { 7274, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x601668023019ULL }, // Inst #7274 = VCVTTSS2SI64Zrm |
| 34827 | { 7273, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3123, 0, 0x503c68013029ULL }, // Inst #7273 = VCVTTSH2USIZrrb_Int |
| 34828 | { 7272, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x403c68013029ULL }, // Inst #7272 = VCVTTSH2USIZrr_Int |
| 34829 | { 7271, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3205, 0|(1ULL<<MCID::MayRaiseFPException), 0x403c68013029ULL }, // Inst #7271 = VCVTTSH2USIZrr |
| 34830 | { 7270, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403c68013019ULL }, // Inst #7270 = VCVTTSH2USIZrm_Int |
| 34831 | { 7269, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403c68013019ULL }, // Inst #7269 = VCVTTSH2USIZrm |
| 34832 | { 7268, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3116, 0, 0x503c68033029ULL }, // Inst #7268 = VCVTTSH2USI64Zrrb_Int |
| 34833 | { 7267, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x403c68033029ULL }, // Inst #7267 = VCVTTSH2USI64Zrr_Int |
| 34834 | { 7266, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3203, 0|(1ULL<<MCID::MayRaiseFPException), 0x403c68033029ULL }, // Inst #7266 = VCVTTSH2USI64Zrr |
| 34835 | { 7265, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403c68033019ULL }, // Inst #7265 = VCVTTSH2USI64Zrm_Int |
| 34836 | { 7264, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403c68033019ULL }, // Inst #7264 = VCVTTSH2USI64Zrm |
| 34837 | { 7263, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3123, 0, 0x501668013029ULL }, // Inst #7263 = VCVTTSH2SIZrrb_Int |
| 34838 | { 7262, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x401668013029ULL }, // Inst #7262 = VCVTTSH2SIZrr_Int |
| 34839 | { 7261, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3205, 0|(1ULL<<MCID::MayRaiseFPException), 0x401668013029ULL }, // Inst #7261 = VCVTTSH2SIZrr |
| 34840 | { 7260, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401668013019ULL }, // Inst #7260 = VCVTTSH2SIZrm_Int |
| 34841 | { 7259, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401668013019ULL }, // Inst #7259 = VCVTTSH2SIZrm |
| 34842 | { 7258, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3116, 0, 0x501668033029ULL }, // Inst #7258 = VCVTTSH2SI64Zrrb_Int |
| 34843 | { 7257, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x401668033029ULL }, // Inst #7257 = VCVTTSH2SI64Zrr_Int |
| 34844 | { 7256, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3203, 0|(1ULL<<MCID::MayRaiseFPException), 0x401668033029ULL }, // Inst #7256 = VCVTTSH2SI64Zrr |
| 34845 | { 7255, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401668033019ULL }, // Inst #7255 = VCVTTSH2SI64Zrm_Int |
| 34846 | { 7254, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x401668033019ULL }, // Inst #7254 = VCVTTSH2SI64Zrm |
| 34847 | { 7253, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3123, 0, 0x903c70003829ULL }, // Inst #7253 = VCVTTSD2USIZrrb_Int |
| 34848 | { 7252, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c70003829ULL }, // Inst #7252 = VCVTTSD2USIZrr_Int |
| 34849 | { 7251, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3121, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c70003829ULL }, // Inst #7251 = VCVTTSD2USIZrr |
| 34850 | { 7250, 6, 1, 0, 1703, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c70003819ULL }, // Inst #7250 = VCVTTSD2USIZrm_Int |
| 34851 | { 7249, 6, 1, 0, 1381, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c70003819ULL }, // Inst #7249 = VCVTTSD2USIZrm |
| 34852 | { 7248, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3116, 0, 0x903c70023829ULL }, // Inst #7248 = VCVTTSD2USI64Zrrb_Int |
| 34853 | { 7247, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c70023829ULL }, // Inst #7247 = VCVTTSD2USI64Zrr_Int |
| 34854 | { 7246, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3114, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c70023829ULL }, // Inst #7246 = VCVTTSD2USI64Zrr |
| 34855 | { 7245, 6, 1, 0, 413, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c70023819ULL }, // Inst #7245 = VCVTTSD2USI64Zrm_Int |
| 34856 | { 7244, 6, 1, 0, 413, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c70023819ULL }, // Inst #7244 = VCVTTSD2USI64Zrm |
| 34857 | { 7243, 2, 1, 0, 990, 1, 0, X86ImpOpBase + 78, 1003, 0|(1ULL<<MCID::MayRaiseFPException), 0x1630003829ULL }, // Inst #7243 = VCVTTSD2SIrr_Int |
| 34858 | { 7242, 2, 1, 0, 988, 1, 0, X86ImpOpBase + 78, 1001, 0|(1ULL<<MCID::MayRaiseFPException), 0x1630003829ULL }, // Inst #7242 = VCVTTSD2SIrr |
| 34859 | { 7241, 6, 1, 0, 1484, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1630003819ULL }, // Inst #7241 = VCVTTSD2SIrm_Int |
| 34860 | { 7240, 6, 1, 0, 1483, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1630003819ULL }, // Inst #7240 = VCVTTSD2SIrm |
| 34861 | { 7239, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3123, 0, 0x901670003829ULL }, // Inst #7239 = VCVTTSD2SIZrrb_Int |
| 34862 | { 7238, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x801670003829ULL }, // Inst #7238 = VCVTTSD2SIZrr_Int |
| 34863 | { 7237, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3121, 0|(1ULL<<MCID::MayRaiseFPException), 0x801670003829ULL }, // Inst #7237 = VCVTTSD2SIZrr |
| 34864 | { 7236, 6, 1, 0, 1702, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801670003819ULL }, // Inst #7236 = VCVTTSD2SIZrm_Int |
| 34865 | { 7235, 6, 1, 0, 1702, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801670003819ULL }, // Inst #7235 = VCVTTSD2SIZrm |
| 34866 | { 7234, 2, 1, 0, 990, 1, 0, X86ImpOpBase + 78, 999, 0|(1ULL<<MCID::MayRaiseFPException), 0x1630023829ULL }, // Inst #7234 = VCVTTSD2SI64rr_Int |
| 34867 | { 7233, 2, 1, 0, 988, 1, 0, X86ImpOpBase + 78, 997, 0|(1ULL<<MCID::MayRaiseFPException), 0x1630023829ULL }, // Inst #7233 = VCVTTSD2SI64rr |
| 34868 | { 7232, 6, 1, 0, 992, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1630023819ULL }, // Inst #7232 = VCVTTSD2SI64rm_Int |
| 34869 | { 7231, 6, 1, 0, 991, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1630023819ULL }, // Inst #7231 = VCVTTSD2SI64rm |
| 34870 | { 7230, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3116, 0, 0x901670023829ULL }, // Inst #7230 = VCVTTSD2SI64Zrrb_Int |
| 34871 | { 7229, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x801670023829ULL }, // Inst #7229 = VCVTTSD2SI64Zrr_Int |
| 34872 | { 7228, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3114, 0|(1ULL<<MCID::MayRaiseFPException), 0x801670023829ULL }, // Inst #7228 = VCVTTSD2SI64Zrr |
| 34873 | { 7227, 6, 1, 0, 413, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801670023819ULL }, // Inst #7227 = VCVTTSD2SI64Zrm_Int |
| 34874 | { 7226, 6, 1, 0, 413, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x801670023819ULL }, // Inst #7226 = VCVTTSD2SI64Zrm |
| 34875 | { 7225, 3, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2803, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3c60002829ULL }, // Inst #7225 = VCVTTPS2UQQZrrkz |
| 34876 | { 7224, 4, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2799, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3c60002829ULL }, // Inst #7224 = VCVTTPS2UQQZrrk |
| 34877 | { 7223, 3, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2803, 0, 0x7e3c60002829ULL }, // Inst #7223 = VCVTTPS2UQQZrrbkz |
| 34878 | { 7222, 4, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2799, 0, 0x7a3c60002829ULL }, // Inst #7222 = VCVTTPS2UQQZrrbk |
| 34879 | { 7221, 2, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2797, 0, 0x783c60002829ULL }, // Inst #7221 = VCVTTPS2UQQZrrb |
| 34880 | { 7220, 2, 1, 0, 1289, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83c60002829ULL }, // Inst #7220 = VCVTTPS2UQQZrr |
| 34881 | { 7219, 7, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3c60002819ULL }, // Inst #7219 = VCVTTPS2UQQZrmkz |
| 34882 | { 7218, 8, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3c60002819ULL }, // Inst #7218 = VCVTTPS2UQQZrmk |
| 34883 | { 7217, 7, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3c60002819ULL }, // Inst #7217 = VCVTTPS2UQQZrmbkz |
| 34884 | { 7216, 8, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3c60002819ULL }, // Inst #7216 = VCVTTPS2UQQZrmbk |
| 34885 | { 7215, 6, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783c60002819ULL }, // Inst #7215 = VCVTTPS2UQQZrmb |
| 34886 | { 7214, 6, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83c60002819ULL }, // Inst #7214 = VCVTTPS2UQQZrm |
| 34887 | { 7213, 3, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2349, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73c60002829ULL }, // Inst #7213 = VCVTTPS2UQQZ256rrkz |
| 34888 | { 7212, 4, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2345, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33c60002829ULL }, // Inst #7212 = VCVTTPS2UQQZ256rrk |
| 34889 | { 7211, 2, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13c60002829ULL }, // Inst #7211 = VCVTTPS2UQQZ256rr |
| 34890 | { 7210, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73c60002819ULL }, // Inst #7210 = VCVTTPS2UQQZ256rmkz |
| 34891 | { 7209, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33c60002819ULL }, // Inst #7209 = VCVTTPS2UQQZ256rmk |
| 34892 | { 7208, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773c60002819ULL }, // Inst #7208 = VCVTTPS2UQQZ256rmbkz |
| 34893 | { 7207, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733c60002819ULL }, // Inst #7207 = VCVTTPS2UQQZ256rmbk |
| 34894 | { 7206, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713c60002819ULL }, // Inst #7206 = VCVTTPS2UQQZ256rmb |
| 34895 | { 7205, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13c60002819ULL }, // Inst #7205 = VCVTTPS2UQQZ256rm |
| 34896 | { 7204, 3, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0x863c60002829ULL }, // Inst #7204 = VCVTTPS2UQQZ128rrkz |
| 34897 | { 7203, 4, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0x823c60002829ULL }, // Inst #7203 = VCVTTPS2UQQZ128rrk |
| 34898 | { 7202, 2, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c60002829ULL }, // Inst #7202 = VCVTTPS2UQQZ128rr |
| 34899 | { 7201, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863c60002819ULL }, // Inst #7201 = VCVTTPS2UQQZ128rmkz |
| 34900 | { 7200, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823c60002819ULL }, // Inst #7200 = VCVTTPS2UQQZ128rmk |
| 34901 | { 7199, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763c60002819ULL }, // Inst #7199 = VCVTTPS2UQQZ128rmbkz |
| 34902 | { 7198, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723c60002819ULL }, // Inst #7198 = VCVTTPS2UQQZ128rmbk |
| 34903 | { 7197, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703c60002819ULL }, // Inst #7197 = VCVTTPS2UQQZ128rmb |
| 34904 | { 7196, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c60002819ULL }, // Inst #7196 = VCVTTPS2UQQZ128rm |
| 34905 | { 7195, 3, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3c60002029ULL }, // Inst #7195 = VCVTTPS2UDQZrrkz |
| 34906 | { 7194, 4, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3c60002029ULL }, // Inst #7194 = VCVTTPS2UDQZrrk |
| 34907 | { 7193, 3, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2779, 0, 0x7e3c60002029ULL }, // Inst #7193 = VCVTTPS2UDQZrrbkz |
| 34908 | { 7192, 4, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2775, 0, 0x7a3c60002029ULL }, // Inst #7192 = VCVTTPS2UDQZrrbk |
| 34909 | { 7191, 2, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x783c60002029ULL }, // Inst #7191 = VCVTTPS2UDQZrrb |
| 34910 | { 7190, 2, 1, 0, 1255, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83c60002029ULL }, // Inst #7190 = VCVTTPS2UDQZrr |
| 34911 | { 7189, 7, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3c60002019ULL }, // Inst #7189 = VCVTTPS2UDQZrmkz |
| 34912 | { 7188, 8, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3c60002019ULL }, // Inst #7188 = VCVTTPS2UDQZrmk |
| 34913 | { 7187, 7, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3c60002019ULL }, // Inst #7187 = VCVTTPS2UDQZrmbkz |
| 34914 | { 7186, 8, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3c60002019ULL }, // Inst #7186 = VCVTTPS2UDQZrmbk |
| 34915 | { 7185, 6, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783c60002019ULL }, // Inst #7185 = VCVTTPS2UDQZrmb |
| 34916 | { 7184, 6, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83c60002019ULL }, // Inst #7184 = VCVTTPS2UDQZrm |
| 34917 | { 7183, 3, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2765, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73c60002029ULL }, // Inst #7183 = VCVTTPS2UDQZ256rrkz |
| 34918 | { 7182, 4, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2761, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33c60002029ULL }, // Inst #7182 = VCVTTPS2UDQZ256rrk |
| 34919 | { 7181, 2, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13c60002029ULL }, // Inst #7181 = VCVTTPS2UDQZ256rr |
| 34920 | { 7180, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73c60002019ULL }, // Inst #7180 = VCVTTPS2UDQZ256rmkz |
| 34921 | { 7179, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33c60002019ULL }, // Inst #7179 = VCVTTPS2UDQZ256rmk |
| 34922 | { 7178, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773c60002019ULL }, // Inst #7178 = VCVTTPS2UDQZ256rmbkz |
| 34923 | { 7177, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733c60002019ULL }, // Inst #7177 = VCVTTPS2UDQZ256rmbk |
| 34924 | { 7176, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713c60002019ULL }, // Inst #7176 = VCVTTPS2UDQZ256rmb |
| 34925 | { 7175, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13c60002019ULL }, // Inst #7175 = VCVTTPS2UDQZ256rm |
| 34926 | { 7174, 3, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63c60002029ULL }, // Inst #7174 = VCVTTPS2UDQZ128rrkz |
| 34927 | { 7173, 4, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23c60002029ULL }, // Inst #7173 = VCVTTPS2UDQZ128rrk |
| 34928 | { 7172, 2, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03c60002029ULL }, // Inst #7172 = VCVTTPS2UDQZ128rr |
| 34929 | { 7171, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63c60002019ULL }, // Inst #7171 = VCVTTPS2UDQZ128rmkz |
| 34930 | { 7170, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23c60002019ULL }, // Inst #7170 = VCVTTPS2UDQZ128rmk |
| 34931 | { 7169, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763c60002019ULL }, // Inst #7169 = VCVTTPS2UDQZ128rmbkz |
| 34932 | { 7168, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723c60002019ULL }, // Inst #7168 = VCVTTPS2UDQZ128rmbk |
| 34933 | { 7167, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703c60002019ULL }, // Inst #7167 = VCVTTPS2UDQZ128rmb |
| 34934 | { 7166, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03c60002019ULL }, // Inst #7166 = VCVTTPS2UDQZ128rm |
| 34935 | { 7165, 3, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2803, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3d60002829ULL }, // Inst #7165 = VCVTTPS2QQZrrkz |
| 34936 | { 7164, 4, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2799, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3d60002829ULL }, // Inst #7164 = VCVTTPS2QQZrrk |
| 34937 | { 7163, 3, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2803, 0, 0x7e3d60002829ULL }, // Inst #7163 = VCVTTPS2QQZrrbkz |
| 34938 | { 7162, 4, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2799, 0, 0x7a3d60002829ULL }, // Inst #7162 = VCVTTPS2QQZrrbk |
| 34939 | { 7161, 2, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2797, 0, 0x783d60002829ULL }, // Inst #7161 = VCVTTPS2QQZrrb |
| 34940 | { 7160, 2, 1, 0, 1289, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83d60002829ULL }, // Inst #7160 = VCVTTPS2QQZrr |
| 34941 | { 7159, 7, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3d60002819ULL }, // Inst #7159 = VCVTTPS2QQZrmkz |
| 34942 | { 7158, 8, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3d60002819ULL }, // Inst #7158 = VCVTTPS2QQZrmk |
| 34943 | { 7157, 7, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3d60002819ULL }, // Inst #7157 = VCVTTPS2QQZrmbkz |
| 34944 | { 7156, 8, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3d60002819ULL }, // Inst #7156 = VCVTTPS2QQZrmbk |
| 34945 | { 7155, 6, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783d60002819ULL }, // Inst #7155 = VCVTTPS2QQZrmb |
| 34946 | { 7154, 6, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83d60002819ULL }, // Inst #7154 = VCVTTPS2QQZrm |
| 34947 | { 7153, 3, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2349, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73d60002829ULL }, // Inst #7153 = VCVTTPS2QQZ256rrkz |
| 34948 | { 7152, 4, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2345, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33d60002829ULL }, // Inst #7152 = VCVTTPS2QQZ256rrk |
| 34949 | { 7151, 2, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13d60002829ULL }, // Inst #7151 = VCVTTPS2QQZ256rr |
| 34950 | { 7150, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73d60002819ULL }, // Inst #7150 = VCVTTPS2QQZ256rmkz |
| 34951 | { 7149, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33d60002819ULL }, // Inst #7149 = VCVTTPS2QQZ256rmk |
| 34952 | { 7148, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773d60002819ULL }, // Inst #7148 = VCVTTPS2QQZ256rmbkz |
| 34953 | { 7147, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733d60002819ULL }, // Inst #7147 = VCVTTPS2QQZ256rmbk |
| 34954 | { 7146, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713d60002819ULL }, // Inst #7146 = VCVTTPS2QQZ256rmb |
| 34955 | { 7145, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13d60002819ULL }, // Inst #7145 = VCVTTPS2QQZ256rm |
| 34956 | { 7144, 3, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0x863d60002829ULL }, // Inst #7144 = VCVTTPS2QQZ128rrkz |
| 34957 | { 7143, 4, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0x823d60002829ULL }, // Inst #7143 = VCVTTPS2QQZ128rrk |
| 34958 | { 7142, 2, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x803d60002829ULL }, // Inst #7142 = VCVTTPS2QQZ128rr |
| 34959 | { 7141, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863d60002819ULL }, // Inst #7141 = VCVTTPS2QQZ128rmkz |
| 34960 | { 7140, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823d60002819ULL }, // Inst #7140 = VCVTTPS2QQZ128rmk |
| 34961 | { 7139, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763d60002819ULL }, // Inst #7139 = VCVTTPS2QQZ128rmbkz |
| 34962 | { 7138, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723d60002819ULL }, // Inst #7138 = VCVTTPS2QQZ128rmbk |
| 34963 | { 7137, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703d60002819ULL }, // Inst #7137 = VCVTTPS2QQZ128rmb |
| 34964 | { 7136, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803d60002819ULL }, // Inst #7136 = VCVTTPS2QQZ128rm |
| 34965 | { 7135, 2, 1, 0, 1010, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2da0003029ULL }, // Inst #7135 = VCVTTPS2DQrr |
| 34966 | { 7134, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2da0003019ULL }, // Inst #7134 = VCVTTPS2DQrm |
| 34967 | { 7133, 3, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0003029ULL }, // Inst #7133 = VCVTTPS2DQZrrkz |
| 34968 | { 7132, 4, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0003029ULL }, // Inst #7132 = VCVTTPS2DQZrrk |
| 34969 | { 7131, 3, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2779, 0, 0x7e2de0003029ULL }, // Inst #7131 = VCVTTPS2DQZrrbkz |
| 34970 | { 7130, 4, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2775, 0, 0x7a2de0003029ULL }, // Inst #7130 = VCVTTPS2DQZrrbk |
| 34971 | { 7129, 2, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x782de0003029ULL }, // Inst #7129 = VCVTTPS2DQZrrb |
| 34972 | { 7128, 2, 1, 0, 1255, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0003029ULL }, // Inst #7128 = VCVTTPS2DQZrr |
| 34973 | { 7127, 7, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0003019ULL }, // Inst #7127 = VCVTTPS2DQZrmkz |
| 34974 | { 7126, 8, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0003019ULL }, // Inst #7126 = VCVTTPS2DQZrmk |
| 34975 | { 7125, 7, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2de0003019ULL }, // Inst #7125 = VCVTTPS2DQZrmbkz |
| 34976 | { 7124, 8, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2de0003019ULL }, // Inst #7124 = VCVTTPS2DQZrmbk |
| 34977 | { 7123, 6, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782de0003019ULL }, // Inst #7123 = VCVTTPS2DQZrmb |
| 34978 | { 7122, 6, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0003019ULL }, // Inst #7122 = VCVTTPS2DQZrm |
| 34979 | { 7121, 3, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2765, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0003029ULL }, // Inst #7121 = VCVTTPS2DQZ256rrkz |
| 34980 | { 7120, 4, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2761, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0003029ULL }, // Inst #7120 = VCVTTPS2DQZ256rrk |
| 34981 | { 7119, 2, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0003029ULL }, // Inst #7119 = VCVTTPS2DQZ256rr |
| 34982 | { 7118, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0003019ULL }, // Inst #7118 = VCVTTPS2DQZ256rmkz |
| 34983 | { 7117, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0003019ULL }, // Inst #7117 = VCVTTPS2DQZ256rmk |
| 34984 | { 7116, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772de0003019ULL }, // Inst #7116 = VCVTTPS2DQZ256rmbkz |
| 34985 | { 7115, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732de0003019ULL }, // Inst #7115 = VCVTTPS2DQZ256rmbk |
| 34986 | { 7114, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712de0003019ULL }, // Inst #7114 = VCVTTPS2DQZ256rmb |
| 34987 | { 7113, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0003019ULL }, // Inst #7113 = VCVTTPS2DQZ256rm |
| 34988 | { 7112, 3, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0003029ULL }, // Inst #7112 = VCVTTPS2DQZ128rrkz |
| 34989 | { 7111, 4, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0003029ULL }, // Inst #7111 = VCVTTPS2DQZ128rrk |
| 34990 | { 7110, 2, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0003029ULL }, // Inst #7110 = VCVTTPS2DQZ128rr |
| 34991 | { 7109, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0003019ULL }, // Inst #7109 = VCVTTPS2DQZ128rmkz |
| 34992 | { 7108, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0003019ULL }, // Inst #7108 = VCVTTPS2DQZ128rmk |
| 34993 | { 7107, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762de0003019ULL }, // Inst #7107 = VCVTTPS2DQZ128rmbkz |
| 34994 | { 7106, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722de0003019ULL }, // Inst #7106 = VCVTTPS2DQZ128rmbk |
| 34995 | { 7105, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702de0003019ULL }, // Inst #7105 = VCVTTPS2DQZ128rmb |
| 34996 | { 7104, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0003019ULL }, // Inst #7104 = VCVTTPS2DQZ128rm |
| 34997 | { 7103, 2, 1, 0, 396, 1, 0, X86ImpOpBase + 78, 2866, 0|(1ULL<<MCID::MayRaiseFPException), 0x12da0003029ULL }, // Inst #7103 = VCVTTPS2DQYrr |
| 34998 | { 7102, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2189, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x12da0003019ULL }, // Inst #7102 = VCVTTPS2DQYrm |
| 34999 | { 7101, 3, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3008, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3e60012829ULL }, // Inst #7101 = VCVTTPH2WZrrkz |
| 35000 | { 7100, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3004, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3e60012829ULL }, // Inst #7100 = VCVTTPH2WZrrk |
| 35001 | { 7099, 3, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3008, 0, 0x5e3e60012829ULL }, // Inst #7099 = VCVTTPH2WZrrbkz |
| 35002 | { 7098, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3004, 0, 0x5a3e60012829ULL }, // Inst #7098 = VCVTTPH2WZrrbk |
| 35003 | { 7097, 2, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x583e60012829ULL }, // Inst #7097 = VCVTTPH2WZrrb |
| 35004 | { 7096, 2, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83e60012829ULL }, // Inst #7096 = VCVTTPH2WZrr |
| 35005 | { 7095, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3e60012819ULL }, // Inst #7095 = VCVTTPH2WZrmkz |
| 35006 | { 7094, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3e60012819ULL }, // Inst #7094 = VCVTTPH2WZrmk |
| 35007 | { 7093, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3e60012819ULL }, // Inst #7093 = VCVTTPH2WZrmbkz |
| 35008 | { 7092, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3e60012819ULL }, // Inst #7092 = VCVTTPH2WZrmbk |
| 35009 | { 7091, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583e60012819ULL }, // Inst #7091 = VCVTTPH2WZrmb |
| 35010 | { 7090, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83e60012819ULL }, // Inst #7090 = VCVTTPH2WZrm |
| 35011 | { 7089, 3, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2977, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73e60012829ULL }, // Inst #7089 = VCVTTPH2WZ256rrkz |
| 35012 | { 7088, 4, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2973, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33e60012829ULL }, // Inst #7088 = VCVTTPH2WZ256rrk |
| 35013 | { 7087, 2, 1, 0, 1738, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13e60012829ULL }, // Inst #7087 = VCVTTPH2WZ256rr |
| 35014 | { 7086, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73e60012819ULL }, // Inst #7086 = VCVTTPH2WZ256rmkz |
| 35015 | { 7085, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33e60012819ULL }, // Inst #7085 = VCVTTPH2WZ256rmk |
| 35016 | { 7084, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573e60012819ULL }, // Inst #7084 = VCVTTPH2WZ256rmbkz |
| 35017 | { 7083, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533e60012819ULL }, // Inst #7083 = VCVTTPH2WZ256rmbk |
| 35018 | { 7082, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513e60012819ULL }, // Inst #7082 = VCVTTPH2WZ256rmb |
| 35019 | { 7081, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13e60012819ULL }, // Inst #7081 = VCVTTPH2WZ256rm |
| 35020 | { 7080, 3, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2970, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63e60012829ULL }, // Inst #7080 = VCVTTPH2WZ128rrkz |
| 35021 | { 7079, 4, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2966, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23e60012829ULL }, // Inst #7079 = VCVTTPH2WZ128rrk |
| 35022 | { 7078, 2, 1, 0, 1737, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03e60012829ULL }, // Inst #7078 = VCVTTPH2WZ128rr |
| 35023 | { 7077, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63e60012819ULL }, // Inst #7077 = VCVTTPH2WZ128rmkz |
| 35024 | { 7076, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23e60012819ULL }, // Inst #7076 = VCVTTPH2WZ128rmk |
| 35025 | { 7075, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563e60012819ULL }, // Inst #7075 = VCVTTPH2WZ128rmbkz |
| 35026 | { 7074, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523e60012819ULL }, // Inst #7074 = VCVTTPH2WZ128rmbk |
| 35027 | { 7073, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503e60012819ULL }, // Inst #7073 = VCVTTPH2WZ128rmb |
| 35028 | { 7072, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03e60012819ULL }, // Inst #7072 = VCVTTPH2WZ128rm |
| 35029 | { 7071, 3, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3008, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3e60012029ULL }, // Inst #7071 = VCVTTPH2UWZrrkz |
| 35030 | { 7070, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3004, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3e60012029ULL }, // Inst #7070 = VCVTTPH2UWZrrk |
| 35031 | { 7069, 3, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3008, 0, 0x5e3e60012029ULL }, // Inst #7069 = VCVTTPH2UWZrrbkz |
| 35032 | { 7068, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3004, 0, 0x5a3e60012029ULL }, // Inst #7068 = VCVTTPH2UWZrrbk |
| 35033 | { 7067, 2, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x583e60012029ULL }, // Inst #7067 = VCVTTPH2UWZrrb |
| 35034 | { 7066, 2, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83e60012029ULL }, // Inst #7066 = VCVTTPH2UWZrr |
| 35035 | { 7065, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3e60012019ULL }, // Inst #7065 = VCVTTPH2UWZrmkz |
| 35036 | { 7064, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3e60012019ULL }, // Inst #7064 = VCVTTPH2UWZrmk |
| 35037 | { 7063, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3e60012019ULL }, // Inst #7063 = VCVTTPH2UWZrmbkz |
| 35038 | { 7062, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3e60012019ULL }, // Inst #7062 = VCVTTPH2UWZrmbk |
| 35039 | { 7061, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583e60012019ULL }, // Inst #7061 = VCVTTPH2UWZrmb |
| 35040 | { 7060, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83e60012019ULL }, // Inst #7060 = VCVTTPH2UWZrm |
| 35041 | { 7059, 3, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2977, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73e60012029ULL }, // Inst #7059 = VCVTTPH2UWZ256rrkz |
| 35042 | { 7058, 4, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2973, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33e60012029ULL }, // Inst #7058 = VCVTTPH2UWZ256rrk |
| 35043 | { 7057, 2, 1, 0, 1738, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13e60012029ULL }, // Inst #7057 = VCVTTPH2UWZ256rr |
| 35044 | { 7056, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73e60012019ULL }, // Inst #7056 = VCVTTPH2UWZ256rmkz |
| 35045 | { 7055, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33e60012019ULL }, // Inst #7055 = VCVTTPH2UWZ256rmk |
| 35046 | { 7054, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573e60012019ULL }, // Inst #7054 = VCVTTPH2UWZ256rmbkz |
| 35047 | { 7053, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533e60012019ULL }, // Inst #7053 = VCVTTPH2UWZ256rmbk |
| 35048 | { 7052, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513e60012019ULL }, // Inst #7052 = VCVTTPH2UWZ256rmb |
| 35049 | { 7051, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13e60012019ULL }, // Inst #7051 = VCVTTPH2UWZ256rm |
| 35050 | { 7050, 3, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2970, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63e60012029ULL }, // Inst #7050 = VCVTTPH2UWZ128rrkz |
| 35051 | { 7049, 4, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2966, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23e60012029ULL }, // Inst #7049 = VCVTTPH2UWZ128rrk |
| 35052 | { 7048, 2, 1, 0, 1737, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03e60012029ULL }, // Inst #7048 = VCVTTPH2UWZ128rr |
| 35053 | { 7047, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63e60012019ULL }, // Inst #7047 = VCVTTPH2UWZ128rmkz |
| 35054 | { 7046, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23e60012019ULL }, // Inst #7046 = VCVTTPH2UWZ128rmk |
| 35055 | { 7045, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563e60012019ULL }, // Inst #7045 = VCVTTPH2UWZ128rmbkz |
| 35056 | { 7044, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523e60012019ULL }, // Inst #7044 = VCVTTPH2UWZ128rmbk |
| 35057 | { 7043, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503e60012019ULL }, // Inst #7043 = VCVTTPH2UWZ128rmb |
| 35058 | { 7042, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03e60012019ULL }, // Inst #7042 = VCVTTPH2UWZ128rm |
| 35059 | { 7041, 3, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2356, 0|(1ULL<<MCID::MayRaiseFPException), 0xae3c60012829ULL }, // Inst #7041 = VCVTTPH2UQQZrrkz |
| 35060 | { 7040, 4, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2352, 0|(1ULL<<MCID::MayRaiseFPException), 0xaa3c60012829ULL }, // Inst #7040 = VCVTTPH2UQQZrrk |
| 35061 | { 7039, 3, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2356, 0, 0x5e3c60012829ULL }, // Inst #7039 = VCVTTPH2UQQZrrbkz |
| 35062 | { 7038, 4, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2352, 0, 0x5a3c60012829ULL }, // Inst #7038 = VCVTTPH2UQQZrrbk |
| 35063 | { 7037, 2, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2280, 0, 0x583c60012829ULL }, // Inst #7037 = VCVTTPH2UQQZrrb |
| 35064 | { 7036, 2, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2280, 0|(1ULL<<MCID::MayRaiseFPException), 0xa83c60012829ULL }, // Inst #7036 = VCVTTPH2UQQZrr |
| 35065 | { 7035, 7, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae3c60012819ULL }, // Inst #7035 = VCVTTPH2UQQZrmkz |
| 35066 | { 7034, 8, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaa3c60012819ULL }, // Inst #7034 = VCVTTPH2UQQZrmk |
| 35067 | { 7033, 7, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3c60012819ULL }, // Inst #7033 = VCVTTPH2UQQZrmbkz |
| 35068 | { 7032, 8, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3c60012819ULL }, // Inst #7032 = VCVTTPH2UQQZrmbk |
| 35069 | { 7031, 6, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583c60012819ULL }, // Inst #7031 = VCVTTPH2UQQZrmb |
| 35070 | { 7030, 6, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa83c60012819ULL }, // Inst #7030 = VCVTTPH2UQQZrm |
| 35071 | { 7029, 3, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2349, 0|(1ULL<<MCID::MayRaiseFPException), 0x873c60012829ULL }, // Inst #7029 = VCVTTPH2UQQZ256rrkz |
| 35072 | { 7028, 4, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2345, 0|(1ULL<<MCID::MayRaiseFPException), 0x833c60012829ULL }, // Inst #7028 = VCVTTPH2UQQZ256rrk |
| 35073 | { 7027, 2, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0x813c60012829ULL }, // Inst #7027 = VCVTTPH2UQQZ256rr |
| 35074 | { 7026, 7, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x873c60012819ULL }, // Inst #7026 = VCVTTPH2UQQZ256rmkz |
| 35075 | { 7025, 8, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x833c60012819ULL }, // Inst #7025 = VCVTTPH2UQQZ256rmk |
| 35076 | { 7024, 7, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573c60012819ULL }, // Inst #7024 = VCVTTPH2UQQZ256rmbkz |
| 35077 | { 7023, 8, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533c60012819ULL }, // Inst #7023 = VCVTTPH2UQQZ256rmbk |
| 35078 | { 7022, 6, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513c60012819ULL }, // Inst #7022 = VCVTTPH2UQQZ256rmb |
| 35079 | { 7021, 6, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x813c60012819ULL }, // Inst #7021 = VCVTTPH2UQQZ256rm |
| 35080 | { 7020, 3, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0x663c60012829ULL }, // Inst #7020 = VCVTTPH2UQQZ128rrkz |
| 35081 | { 7019, 4, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0x623c60012829ULL }, // Inst #7019 = VCVTTPH2UQQZ128rrk |
| 35082 | { 7018, 2, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x603c60012829ULL }, // Inst #7018 = VCVTTPH2UQQZ128rr |
| 35083 | { 7017, 7, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x663c60012819ULL }, // Inst #7017 = VCVTTPH2UQQZ128rmkz |
| 35084 | { 7016, 8, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x623c60012819ULL }, // Inst #7016 = VCVTTPH2UQQZ128rmk |
| 35085 | { 7015, 7, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563c60012819ULL }, // Inst #7015 = VCVTTPH2UQQZ128rmbkz |
| 35086 | { 7014, 8, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523c60012819ULL }, // Inst #7014 = VCVTTPH2UQQZ128rmbk |
| 35087 | { 7013, 6, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503c60012819ULL }, // Inst #7013 = VCVTTPH2UQQZ128rmb |
| 35088 | { 7012, 6, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603c60012819ULL }, // Inst #7012 = VCVTTPH2UQQZ128rm |
| 35089 | { 7011, 3, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2951, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3c60012029ULL }, // Inst #7011 = VCVTTPH2UDQZrrkz |
| 35090 | { 7010, 4, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2947, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3c60012029ULL }, // Inst #7010 = VCVTTPH2UDQZrrk |
| 35091 | { 7009, 3, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2951, 0, 0x5e3c60012029ULL }, // Inst #7009 = VCVTTPH2UDQZrrbkz |
| 35092 | { 7008, 4, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2947, 0, 0x5a3c60012029ULL }, // Inst #7008 = VCVTTPH2UDQZrrbk |
| 35093 | { 7007, 2, 1, 0, 2048, 1, 0, X86ImpOpBase + 78, 2797, 0, 0x583c60012029ULL }, // Inst #7007 = VCVTTPH2UDQZrrb |
| 35094 | { 7006, 2, 1, 0, 2048, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83c60012029ULL }, // Inst #7006 = VCVTTPH2UDQZrr |
| 35095 | { 7005, 7, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3c60012019ULL }, // Inst #7005 = VCVTTPH2UDQZrmkz |
| 35096 | { 7004, 8, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3c60012019ULL }, // Inst #7004 = VCVTTPH2UDQZrmk |
| 35097 | { 7003, 7, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3c60012019ULL }, // Inst #7003 = VCVTTPH2UDQZrmbkz |
| 35098 | { 7002, 8, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3c60012019ULL }, // Inst #7002 = VCVTTPH2UDQZrmbk |
| 35099 | { 7001, 6, 1, 0, 1992, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583c60012019ULL }, // Inst #7001 = VCVTTPH2UDQZrmb |
| 35100 | { 7000, 6, 1, 0, 1992, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83c60012019ULL }, // Inst #7000 = VCVTTPH2UDQZrm |
| 35101 | { 6999, 3, 1, 0, 2037, 1, 0, X86ImpOpBase + 78, 2256, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73c60012029ULL }, // Inst #6999 = VCVTTPH2UDQZ256rrkz |
| 35102 | { 6998, 4, 1, 0, 2037, 1, 0, X86ImpOpBase + 78, 2252, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33c60012029ULL }, // Inst #6998 = VCVTTPH2UDQZ256rrk |
| 35103 | { 6997, 2, 1, 0, 1775, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13c60012029ULL }, // Inst #6997 = VCVTTPH2UDQZ256rr |
| 35104 | { 6996, 7, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73c60012019ULL }, // Inst #6996 = VCVTTPH2UDQZ256rmkz |
| 35105 | { 6995, 8, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33c60012019ULL }, // Inst #6995 = VCVTTPH2UDQZ256rmk |
| 35106 | { 6994, 7, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573c60012019ULL }, // Inst #6994 = VCVTTPH2UDQZ256rmbkz |
| 35107 | { 6993, 8, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533c60012019ULL }, // Inst #6993 = VCVTTPH2UDQZ256rmbk |
| 35108 | { 6992, 6, 1, 0, 1988, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513c60012019ULL }, // Inst #6992 = VCVTTPH2UDQZ256rmb |
| 35109 | { 6991, 6, 1, 0, 1988, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13c60012019ULL }, // Inst #6991 = VCVTTPH2UDQZ256rm |
| 35110 | { 6990, 3, 1, 0, 2036, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0x863c60012029ULL }, // Inst #6990 = VCVTTPH2UDQZ128rrkz |
| 35111 | { 6989, 4, 1, 0, 2036, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0x823c60012029ULL }, // Inst #6989 = VCVTTPH2UDQZ128rrk |
| 35112 | { 6988, 2, 1, 0, 1774, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x803c60012029ULL }, // Inst #6988 = VCVTTPH2UDQZ128rr |
| 35113 | { 6987, 7, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863c60012019ULL }, // Inst #6987 = VCVTTPH2UDQZ128rmkz |
| 35114 | { 6986, 8, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823c60012019ULL }, // Inst #6986 = VCVTTPH2UDQZ128rmk |
| 35115 | { 6985, 7, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563c60012019ULL }, // Inst #6985 = VCVTTPH2UDQZ128rmbkz |
| 35116 | { 6984, 8, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523c60012019ULL }, // Inst #6984 = VCVTTPH2UDQZ128rmbk |
| 35117 | { 6983, 6, 1, 0, 2033, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503c60012019ULL }, // Inst #6983 = VCVTTPH2UDQZ128rmb |
| 35118 | { 6982, 6, 1, 0, 2033, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803c60012019ULL }, // Inst #6982 = VCVTTPH2UDQZ128rm |
| 35119 | { 6981, 3, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2356, 0|(1ULL<<MCID::MayRaiseFPException), 0xae3d60012829ULL }, // Inst #6981 = VCVTTPH2QQZrrkz |
| 35120 | { 6980, 4, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2352, 0|(1ULL<<MCID::MayRaiseFPException), 0xaa3d60012829ULL }, // Inst #6980 = VCVTTPH2QQZrrk |
| 35121 | { 6979, 3, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2356, 0, 0x5e3d60012829ULL }, // Inst #6979 = VCVTTPH2QQZrrbkz |
| 35122 | { 6978, 4, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2352, 0, 0x5a3d60012829ULL }, // Inst #6978 = VCVTTPH2QQZrrbk |
| 35123 | { 6977, 2, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2280, 0, 0x583d60012829ULL }, // Inst #6977 = VCVTTPH2QQZrrb |
| 35124 | { 6976, 2, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2280, 0|(1ULL<<MCID::MayRaiseFPException), 0xa83d60012829ULL }, // Inst #6976 = VCVTTPH2QQZrr |
| 35125 | { 6975, 7, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae3d60012819ULL }, // Inst #6975 = VCVTTPH2QQZrmkz |
| 35126 | { 6974, 8, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaa3d60012819ULL }, // Inst #6974 = VCVTTPH2QQZrmk |
| 35127 | { 6973, 7, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3d60012819ULL }, // Inst #6973 = VCVTTPH2QQZrmbkz |
| 35128 | { 6972, 8, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3d60012819ULL }, // Inst #6972 = VCVTTPH2QQZrmbk |
| 35129 | { 6971, 6, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583d60012819ULL }, // Inst #6971 = VCVTTPH2QQZrmb |
| 35130 | { 6970, 6, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa83d60012819ULL }, // Inst #6970 = VCVTTPH2QQZrm |
| 35131 | { 6969, 3, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2349, 0|(1ULL<<MCID::MayRaiseFPException), 0x873d60012829ULL }, // Inst #6969 = VCVTTPH2QQZ256rrkz |
| 35132 | { 6968, 4, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2345, 0|(1ULL<<MCID::MayRaiseFPException), 0x833d60012829ULL }, // Inst #6968 = VCVTTPH2QQZ256rrk |
| 35133 | { 6967, 2, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0x813d60012829ULL }, // Inst #6967 = VCVTTPH2QQZ256rr |
| 35134 | { 6966, 7, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x873d60012819ULL }, // Inst #6966 = VCVTTPH2QQZ256rmkz |
| 35135 | { 6965, 8, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x833d60012819ULL }, // Inst #6965 = VCVTTPH2QQZ256rmk |
| 35136 | { 6964, 7, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573d60012819ULL }, // Inst #6964 = VCVTTPH2QQZ256rmbkz |
| 35137 | { 6963, 8, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533d60012819ULL }, // Inst #6963 = VCVTTPH2QQZ256rmbk |
| 35138 | { 6962, 6, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513d60012819ULL }, // Inst #6962 = VCVTTPH2QQZ256rmb |
| 35139 | { 6961, 6, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x813d60012819ULL }, // Inst #6961 = VCVTTPH2QQZ256rm |
| 35140 | { 6960, 3, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0x663d60012829ULL }, // Inst #6960 = VCVTTPH2QQZ128rrkz |
| 35141 | { 6959, 4, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0x623d60012829ULL }, // Inst #6959 = VCVTTPH2QQZ128rrk |
| 35142 | { 6958, 2, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x603d60012829ULL }, // Inst #6958 = VCVTTPH2QQZ128rr |
| 35143 | { 6957, 7, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x663d60012819ULL }, // Inst #6957 = VCVTTPH2QQZ128rmkz |
| 35144 | { 6956, 8, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x623d60012819ULL }, // Inst #6956 = VCVTTPH2QQZ128rmk |
| 35145 | { 6955, 7, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563d60012819ULL }, // Inst #6955 = VCVTTPH2QQZ128rmbkz |
| 35146 | { 6954, 8, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523d60012819ULL }, // Inst #6954 = VCVTTPH2QQZ128rmbk |
| 35147 | { 6953, 6, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503d60012819ULL }, // Inst #6953 = VCVTTPH2QQZ128rmb |
| 35148 | { 6952, 6, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603d60012819ULL }, // Inst #6952 = VCVTTPH2QQZ128rm |
| 35149 | { 6951, 3, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2951, 0|(1ULL<<MCID::MayRaiseFPException), 0xce2de0013029ULL }, // Inst #6951 = VCVTTPH2DQZrrkz |
| 35150 | { 6950, 4, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2947, 0|(1ULL<<MCID::MayRaiseFPException), 0xca2de0013029ULL }, // Inst #6950 = VCVTTPH2DQZrrk |
| 35151 | { 6949, 3, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2951, 0, 0x5e2de0013029ULL }, // Inst #6949 = VCVTTPH2DQZrrbkz |
| 35152 | { 6948, 4, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2947, 0, 0x5a2de0013029ULL }, // Inst #6948 = VCVTTPH2DQZrrbk |
| 35153 | { 6947, 2, 1, 0, 2048, 1, 0, X86ImpOpBase + 78, 2797, 0, 0x582de0013029ULL }, // Inst #6947 = VCVTTPH2DQZrrb |
| 35154 | { 6946, 2, 1, 0, 2048, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc82de0013029ULL }, // Inst #6946 = VCVTTPH2DQZrr |
| 35155 | { 6945, 7, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce2de0013019ULL }, // Inst #6945 = VCVTTPH2DQZrmkz |
| 35156 | { 6944, 8, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca2de0013019ULL }, // Inst #6944 = VCVTTPH2DQZrmk |
| 35157 | { 6943, 7, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e2de0013019ULL }, // Inst #6943 = VCVTTPH2DQZrmbkz |
| 35158 | { 6942, 8, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a2de0013019ULL }, // Inst #6942 = VCVTTPH2DQZrmbk |
| 35159 | { 6941, 6, 1, 0, 1992, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x582de0013019ULL }, // Inst #6941 = VCVTTPH2DQZrmb |
| 35160 | { 6940, 6, 1, 0, 1992, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc82de0013019ULL }, // Inst #6940 = VCVTTPH2DQZrm |
| 35161 | { 6939, 3, 1, 0, 2037, 1, 0, X86ImpOpBase + 78, 2256, 0|(1ULL<<MCID::MayRaiseFPException), 0xa72de0013029ULL }, // Inst #6939 = VCVTTPH2DQZ256rrkz |
| 35162 | { 6938, 4, 1, 0, 2037, 1, 0, X86ImpOpBase + 78, 2252, 0|(1ULL<<MCID::MayRaiseFPException), 0xa32de0013029ULL }, // Inst #6938 = VCVTTPH2DQZ256rrk |
| 35163 | { 6937, 2, 1, 0, 1775, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa12de0013029ULL }, // Inst #6937 = VCVTTPH2DQZ256rr |
| 35164 | { 6936, 7, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa72de0013019ULL }, // Inst #6936 = VCVTTPH2DQZ256rmkz |
| 35165 | { 6935, 8, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa32de0013019ULL }, // Inst #6935 = VCVTTPH2DQZ256rmk |
| 35166 | { 6934, 7, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x572de0013019ULL }, // Inst #6934 = VCVTTPH2DQZ256rmbkz |
| 35167 | { 6933, 8, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x532de0013019ULL }, // Inst #6933 = VCVTTPH2DQZ256rmbk |
| 35168 | { 6932, 6, 1, 0, 1988, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x512de0013019ULL }, // Inst #6932 = VCVTTPH2DQZ256rmb |
| 35169 | { 6931, 6, 1, 0, 1988, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa12de0013019ULL }, // Inst #6931 = VCVTTPH2DQZ256rm |
| 35170 | { 6930, 3, 1, 0, 2036, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0x862de0013029ULL }, // Inst #6930 = VCVTTPH2DQZ128rrkz |
| 35171 | { 6929, 4, 1, 0, 2036, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0x822de0013029ULL }, // Inst #6929 = VCVTTPH2DQZ128rrk |
| 35172 | { 6928, 2, 1, 0, 1774, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x802de0013029ULL }, // Inst #6928 = VCVTTPH2DQZ128rr |
| 35173 | { 6927, 7, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x862de0013019ULL }, // Inst #6927 = VCVTTPH2DQZ128rmkz |
| 35174 | { 6926, 8, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x822de0013019ULL }, // Inst #6926 = VCVTTPH2DQZ128rmk |
| 35175 | { 6925, 7, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x562de0013019ULL }, // Inst #6925 = VCVTTPH2DQZ128rmbkz |
| 35176 | { 6924, 8, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x522de0013019ULL }, // Inst #6924 = VCVTTPH2DQZ128rmbk |
| 35177 | { 6923, 6, 1, 0, 2033, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x502de0013019ULL }, // Inst #6923 = VCVTTPH2DQZ128rmb |
| 35178 | { 6922, 6, 1, 0, 2033, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x802de0013019ULL }, // Inst #6922 = VCVTTPH2DQZ128rm |
| 35179 | { 6921, 3, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3c60022829ULL }, // Inst #6921 = VCVTTPD2UQQZrrkz |
| 35180 | { 6920, 4, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3c60022829ULL }, // Inst #6920 = VCVTTPD2UQQZrrk |
| 35181 | { 6919, 3, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2744, 0, 0x9e3c60022829ULL }, // Inst #6919 = VCVTTPD2UQQZrrbkz |
| 35182 | { 6918, 4, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2740, 0, 0x9a3c60022829ULL }, // Inst #6918 = VCVTTPD2UQQZrrbk |
| 35183 | { 6917, 2, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x983c60022829ULL }, // Inst #6917 = VCVTTPD2UQQZrrb |
| 35184 | { 6916, 2, 1, 0, 1254, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83c60022829ULL }, // Inst #6916 = VCVTTPD2UQQZrr |
| 35185 | { 6915, 7, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3c60022819ULL }, // Inst #6915 = VCVTTPD2UQQZrmkz |
| 35186 | { 6914, 8, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3c60022819ULL }, // Inst #6914 = VCVTTPD2UQQZrmk |
| 35187 | { 6913, 7, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3c60022819ULL }, // Inst #6913 = VCVTTPD2UQQZrmbkz |
| 35188 | { 6912, 8, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3c60022819ULL }, // Inst #6912 = VCVTTPD2UQQZrmbk |
| 35189 | { 6911, 6, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983c60022819ULL }, // Inst #6911 = VCVTTPD2UQQZrmb |
| 35190 | { 6910, 6, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83c60022819ULL }, // Inst #6910 = VCVTTPD2UQQZrm |
| 35191 | { 6909, 3, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2722, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73c60022829ULL }, // Inst #6909 = VCVTTPD2UQQZ256rrkz |
| 35192 | { 6908, 4, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2718, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33c60022829ULL }, // Inst #6908 = VCVTTPD2UQQZ256rrk |
| 35193 | { 6907, 2, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13c60022829ULL }, // Inst #6907 = VCVTTPD2UQQZ256rr |
| 35194 | { 6906, 7, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73c60022819ULL }, // Inst #6906 = VCVTTPD2UQQZ256rmkz |
| 35195 | { 6905, 8, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33c60022819ULL }, // Inst #6905 = VCVTTPD2UQQZ256rmk |
| 35196 | { 6904, 7, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973c60022819ULL }, // Inst #6904 = VCVTTPD2UQQZ256rmbkz |
| 35197 | { 6903, 8, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933c60022819ULL }, // Inst #6903 = VCVTTPD2UQQZ256rmbk |
| 35198 | { 6902, 6, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913c60022819ULL }, // Inst #6902 = VCVTTPD2UQQZ256rmb |
| 35199 | { 6901, 6, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13c60022819ULL }, // Inst #6901 = VCVTTPD2UQQZ256rm |
| 35200 | { 6900, 3, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63c60022829ULL }, // Inst #6900 = VCVTTPD2UQQZ128rrkz |
| 35201 | { 6899, 4, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23c60022829ULL }, // Inst #6899 = VCVTTPD2UQQZ128rrk |
| 35202 | { 6898, 2, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03c60022829ULL }, // Inst #6898 = VCVTTPD2UQQZ128rr |
| 35203 | { 6897, 7, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63c60022819ULL }, // Inst #6897 = VCVTTPD2UQQZ128rmkz |
| 35204 | { 6896, 8, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23c60022819ULL }, // Inst #6896 = VCVTTPD2UQQZ128rmk |
| 35205 | { 6895, 7, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963c60022819ULL }, // Inst #6895 = VCVTTPD2UQQZ128rmbkz |
| 35206 | { 6894, 8, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923c60022819ULL }, // Inst #6894 = VCVTTPD2UQQZ128rmbk |
| 35207 | { 6893, 6, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903c60022819ULL }, // Inst #6893 = VCVTTPD2UQQZ128rmb |
| 35208 | { 6892, 6, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03c60022819ULL }, // Inst #6892 = VCVTTPD2UQQZ128rm |
| 35209 | { 6891, 3, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2902, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3c60022029ULL }, // Inst #6891 = VCVTTPD2UDQZrrkz |
| 35210 | { 6890, 4, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2898, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3c60022029ULL }, // Inst #6890 = VCVTTPD2UDQZrrk |
| 35211 | { 6889, 3, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2902, 0, 0x9e3c60022029ULL }, // Inst #6889 = VCVTTPD2UDQZrrbkz |
| 35212 | { 6888, 4, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2898, 0, 0x9a3c60022029ULL }, // Inst #6888 = VCVTTPD2UDQZrrbk |
| 35213 | { 6887, 2, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2845, 0, 0x983c60022029ULL }, // Inst #6887 = VCVTTPD2UDQZrrb |
| 35214 | { 6886, 2, 1, 0, 1287, 1, 0, X86ImpOpBase + 78, 2845, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83c60022029ULL }, // Inst #6886 = VCVTTPD2UDQZrr |
| 35215 | { 6885, 7, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3c60022019ULL }, // Inst #6885 = VCVTTPD2UDQZrmkz |
| 35216 | { 6884, 8, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3c60022019ULL }, // Inst #6884 = VCVTTPD2UDQZrmk |
| 35217 | { 6883, 7, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3c60022019ULL }, // Inst #6883 = VCVTTPD2UDQZrmbkz |
| 35218 | { 6882, 8, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3c60022019ULL }, // Inst #6882 = VCVTTPD2UDQZrmbk |
| 35219 | { 6881, 6, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983c60022019ULL }, // Inst #6881 = VCVTTPD2UDQZrmb |
| 35220 | { 6880, 6, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83c60022019ULL }, // Inst #6880 = VCVTTPD2UDQZrm |
| 35221 | { 6879, 3, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2886, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73c60022029ULL }, // Inst #6879 = VCVTTPD2UDQZ256rrkz |
| 35222 | { 6878, 4, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2882, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33c60022029ULL }, // Inst #6878 = VCVTTPD2UDQZ256rrk |
| 35223 | { 6877, 2, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13c60022029ULL }, // Inst #6877 = VCVTTPD2UDQZ256rr |
| 35224 | { 6876, 7, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73c60022019ULL }, // Inst #6876 = VCVTTPD2UDQZ256rmkz |
| 35225 | { 6875, 8, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33c60022019ULL }, // Inst #6875 = VCVTTPD2UDQZ256rmk |
| 35226 | { 6874, 7, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973c60022019ULL }, // Inst #6874 = VCVTTPD2UDQZ256rmbkz |
| 35227 | { 6873, 8, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933c60022019ULL }, // Inst #6873 = VCVTTPD2UDQZ256rmbk |
| 35228 | { 6872, 6, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913c60022019ULL }, // Inst #6872 = VCVTTPD2UDQZ256rmb |
| 35229 | { 6871, 6, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13c60022019ULL }, // Inst #6871 = VCVTTPD2UDQZ256rm |
| 35230 | { 6870, 3, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63c60022029ULL }, // Inst #6870 = VCVTTPD2UDQZ128rrkz |
| 35231 | { 6869, 4, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23c60022029ULL }, // Inst #6869 = VCVTTPD2UDQZ128rrk |
| 35232 | { 6868, 2, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03c60022029ULL }, // Inst #6868 = VCVTTPD2UDQZ128rr |
| 35233 | { 6867, 7, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63c60022019ULL }, // Inst #6867 = VCVTTPD2UDQZ128rmkz |
| 35234 | { 6866, 8, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23c60022019ULL }, // Inst #6866 = VCVTTPD2UDQZ128rmk |
| 35235 | { 6865, 7, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963c60022019ULL }, // Inst #6865 = VCVTTPD2UDQZ128rmbkz |
| 35236 | { 6864, 8, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923c60022019ULL }, // Inst #6864 = VCVTTPD2UDQZ128rmbk |
| 35237 | { 6863, 6, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903c60022019ULL }, // Inst #6863 = VCVTTPD2UDQZ128rmb |
| 35238 | { 6862, 6, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03c60022019ULL }, // Inst #6862 = VCVTTPD2UDQZ128rm |
| 35239 | { 6861, 3, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3d60022829ULL }, // Inst #6861 = VCVTTPD2QQZrrkz |
| 35240 | { 6860, 4, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3d60022829ULL }, // Inst #6860 = VCVTTPD2QQZrrk |
| 35241 | { 6859, 3, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2744, 0, 0x9e3d60022829ULL }, // Inst #6859 = VCVTTPD2QQZrrbkz |
| 35242 | { 6858, 4, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2740, 0, 0x9a3d60022829ULL }, // Inst #6858 = VCVTTPD2QQZrrbk |
| 35243 | { 6857, 2, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2738, 0, 0x983d60022829ULL }, // Inst #6857 = VCVTTPD2QQZrrb |
| 35244 | { 6856, 2, 1, 0, 1254, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83d60022829ULL }, // Inst #6856 = VCVTTPD2QQZrr |
| 35245 | { 6855, 7, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3d60022819ULL }, // Inst #6855 = VCVTTPD2QQZrmkz |
| 35246 | { 6854, 8, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3d60022819ULL }, // Inst #6854 = VCVTTPD2QQZrmk |
| 35247 | { 6853, 7, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3d60022819ULL }, // Inst #6853 = VCVTTPD2QQZrmbkz |
| 35248 | { 6852, 8, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3d60022819ULL }, // Inst #6852 = VCVTTPD2QQZrmbk |
| 35249 | { 6851, 6, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983d60022819ULL }, // Inst #6851 = VCVTTPD2QQZrmb |
| 35250 | { 6850, 6, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83d60022819ULL }, // Inst #6850 = VCVTTPD2QQZrm |
| 35251 | { 6849, 3, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2722, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73d60022829ULL }, // Inst #6849 = VCVTTPD2QQZ256rrkz |
| 35252 | { 6848, 4, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2718, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33d60022829ULL }, // Inst #6848 = VCVTTPD2QQZ256rrk |
| 35253 | { 6847, 2, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13d60022829ULL }, // Inst #6847 = VCVTTPD2QQZ256rr |
| 35254 | { 6846, 7, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73d60022819ULL }, // Inst #6846 = VCVTTPD2QQZ256rmkz |
| 35255 | { 6845, 8, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33d60022819ULL }, // Inst #6845 = VCVTTPD2QQZ256rmk |
| 35256 | { 6844, 7, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973d60022819ULL }, // Inst #6844 = VCVTTPD2QQZ256rmbkz |
| 35257 | { 6843, 8, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933d60022819ULL }, // Inst #6843 = VCVTTPD2QQZ256rmbk |
| 35258 | { 6842, 6, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913d60022819ULL }, // Inst #6842 = VCVTTPD2QQZ256rmb |
| 35259 | { 6841, 6, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13d60022819ULL }, // Inst #6841 = VCVTTPD2QQZ256rm |
| 35260 | { 6840, 3, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63d60022829ULL }, // Inst #6840 = VCVTTPD2QQZ128rrkz |
| 35261 | { 6839, 4, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23d60022829ULL }, // Inst #6839 = VCVTTPD2QQZ128rrk |
| 35262 | { 6838, 2, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03d60022829ULL }, // Inst #6838 = VCVTTPD2QQZ128rr |
| 35263 | { 6837, 7, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63d60022819ULL }, // Inst #6837 = VCVTTPD2QQZ128rmkz |
| 35264 | { 6836, 8, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23d60022819ULL }, // Inst #6836 = VCVTTPD2QQZ128rmk |
| 35265 | { 6835, 7, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963d60022819ULL }, // Inst #6835 = VCVTTPD2QQZ128rmbkz |
| 35266 | { 6834, 8, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923d60022819ULL }, // Inst #6834 = VCVTTPD2QQZ128rmbk |
| 35267 | { 6833, 6, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903d60022819ULL }, // Inst #6833 = VCVTTPD2QQZ128rmb |
| 35268 | { 6832, 6, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03d60022819ULL }, // Inst #6832 = VCVTTPD2QQZ128rm |
| 35269 | { 6831, 2, 1, 0, 977, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x7330002829ULL }, // Inst #6831 = VCVTTPD2DQrr |
| 35270 | { 6830, 6, 1, 0, 978, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7330002819ULL }, // Inst #6830 = VCVTTPD2DQrm |
| 35271 | { 6829, 3, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2902, 0|(1ULL<<MCID::MayRaiseFPException), 0xee7360022829ULL }, // Inst #6829 = VCVTTPD2DQZrrkz |
| 35272 | { 6828, 4, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2898, 0|(1ULL<<MCID::MayRaiseFPException), 0xea7360022829ULL }, // Inst #6828 = VCVTTPD2DQZrrk |
| 35273 | { 6827, 3, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2902, 0, 0x9e7360022829ULL }, // Inst #6827 = VCVTTPD2DQZrrbkz |
| 35274 | { 6826, 4, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2898, 0, 0x9a7360022829ULL }, // Inst #6826 = VCVTTPD2DQZrrbk |
| 35275 | { 6825, 2, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2845, 0, 0x987360022829ULL }, // Inst #6825 = VCVTTPD2DQZrrb |
| 35276 | { 6824, 2, 1, 0, 1287, 1, 0, X86ImpOpBase + 78, 2845, 0|(1ULL<<MCID::MayRaiseFPException), 0xe87360022829ULL }, // Inst #6824 = VCVTTPD2DQZrr |
| 35277 | { 6823, 7, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee7360022819ULL }, // Inst #6823 = VCVTTPD2DQZrmkz |
| 35278 | { 6822, 8, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea7360022819ULL }, // Inst #6822 = VCVTTPD2DQZrmk |
| 35279 | { 6821, 7, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e7360022819ULL }, // Inst #6821 = VCVTTPD2DQZrmbkz |
| 35280 | { 6820, 8, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a7360022819ULL }, // Inst #6820 = VCVTTPD2DQZrmbk |
| 35281 | { 6819, 6, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x987360022819ULL }, // Inst #6819 = VCVTTPD2DQZrmb |
| 35282 | { 6818, 6, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe87360022819ULL }, // Inst #6818 = VCVTTPD2DQZrm |
| 35283 | { 6817, 3, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2886, 0|(1ULL<<MCID::MayRaiseFPException), 0xc77360022829ULL }, // Inst #6817 = VCVTTPD2DQZ256rrkz |
| 35284 | { 6816, 4, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2882, 0|(1ULL<<MCID::MayRaiseFPException), 0xc37360022829ULL }, // Inst #6816 = VCVTTPD2DQZ256rrk |
| 35285 | { 6815, 2, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc17360022829ULL }, // Inst #6815 = VCVTTPD2DQZ256rr |
| 35286 | { 6814, 7, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc77360022819ULL }, // Inst #6814 = VCVTTPD2DQZ256rmkz |
| 35287 | { 6813, 8, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc37360022819ULL }, // Inst #6813 = VCVTTPD2DQZ256rmk |
| 35288 | { 6812, 7, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x977360022819ULL }, // Inst #6812 = VCVTTPD2DQZ256rmbkz |
| 35289 | { 6811, 8, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x937360022819ULL }, // Inst #6811 = VCVTTPD2DQZ256rmbk |
| 35290 | { 6810, 6, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x917360022819ULL }, // Inst #6810 = VCVTTPD2DQZ256rmb |
| 35291 | { 6809, 6, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc17360022819ULL }, // Inst #6809 = VCVTTPD2DQZ256rm |
| 35292 | { 6808, 3, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa67360022829ULL }, // Inst #6808 = VCVTTPD2DQZ128rrkz |
| 35293 | { 6807, 4, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa27360022829ULL }, // Inst #6807 = VCVTTPD2DQZ128rrk |
| 35294 | { 6806, 2, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa07360022829ULL }, // Inst #6806 = VCVTTPD2DQZ128rr |
| 35295 | { 6805, 7, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa67360022819ULL }, // Inst #6805 = VCVTTPD2DQZ128rmkz |
| 35296 | { 6804, 8, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa27360022819ULL }, // Inst #6804 = VCVTTPD2DQZ128rmk |
| 35297 | { 6803, 7, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x967360022819ULL }, // Inst #6803 = VCVTTPD2DQZ128rmbkz |
| 35298 | { 6802, 8, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x927360022819ULL }, // Inst #6802 = VCVTTPD2DQZ128rmbk |
| 35299 | { 6801, 6, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x907360022819ULL }, // Inst #6801 = VCVTTPD2DQZ128rmb |
| 35300 | { 6800, 6, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa07360022819ULL }, // Inst #6800 = VCVTTPD2DQZ128rm |
| 35301 | { 6799, 2, 1, 0, 979, 1, 0, X86ImpOpBase + 78, 2880, 0|(1ULL<<MCID::MayRaiseFPException), 0x17330002829ULL }, // Inst #6799 = VCVTTPD2DQYrr |
| 35302 | { 6798, 6, 1, 0, 980, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17330002819ULL }, // Inst #6798 = VCVTTPD2DQYrm |
| 35303 | { 6797, 3, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3125, 0, 0x1703ce8003029ULL }, // Inst #6797 = VCVTSS2USIZrrb_Int |
| 35304 | { 6796, 2, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x603ce8003029ULL }, // Inst #6796 = VCVTSS2USIZrr_Int |
| 35305 | { 6795, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603ce8003019ULL }, // Inst #6795 = VCVTSS2USIZrm_Int |
| 35306 | { 6794, 3, 1, 0, 1705, 1, 0, X86ImpOpBase + 78, 3118, 0, 0x1703ce8023029ULL }, // Inst #6794 = VCVTSS2USI64Zrrb_Int |
| 35307 | { 6793, 2, 1, 0, 1705, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x603ce8023029ULL }, // Inst #6793 = VCVTSS2USI64Zrr_Int |
| 35308 | { 6792, 6, 1, 0, 1382, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603ce8023019ULL }, // Inst #6792 = VCVTSS2USI64Zrm_Int |
| 35309 | { 6791, 2, 1, 0, 984, 1, 0, X86ImpOpBase + 78, 1003, 0|(1ULL<<MCID::MayRaiseFPException), 0x16a8003029ULL }, // Inst #6791 = VCVTSS2SIrr_Int |
| 35310 | { 6790, 2, 1, 0, 983, 1, 0, X86ImpOpBase + 78, 1025, 0|(1ULL<<MCID::MayRaiseFPException), 0x16a8003029ULL }, // Inst #6790 = VCVTSS2SIrr |
| 35311 | { 6789, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16a8003019ULL }, // Inst #6789 = VCVTSS2SIrm_Int |
| 35312 | { 6788, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16a8003019ULL }, // Inst #6788 = VCVTSS2SIrm |
| 35313 | { 6787, 3, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3125, 0, 0x17016e8003029ULL }, // Inst #6787 = VCVTSS2SIZrrb_Int |
| 35314 | { 6786, 2, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x6016e8003029ULL }, // Inst #6786 = VCVTSS2SIZrr_Int |
| 35315 | { 6785, 2, 1, 0, 119, 1, 0, X86ImpOpBase + 78, 3201, 0|(1ULL<<MCID::MayRaiseFPException), 0x6016e8003029ULL }, // Inst #6785 = VCVTSS2SIZrr |
| 35316 | { 6784, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6016e8003019ULL }, // Inst #6784 = VCVTSS2SIZrm_Int |
| 35317 | { 6783, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6016e8003019ULL }, // Inst #6783 = VCVTSS2SIZrm |
| 35318 | { 6782, 2, 1, 0, 1212, 1, 0, X86ImpOpBase + 78, 999, 0|(1ULL<<MCID::MayRaiseFPException), 0x16a8023029ULL }, // Inst #6782 = VCVTSS2SI64rr_Int |
| 35319 | { 6781, 2, 1, 0, 1211, 1, 0, X86ImpOpBase + 78, 1023, 0|(1ULL<<MCID::MayRaiseFPException), 0x16a8023029ULL }, // Inst #6781 = VCVTSS2SI64rr |
| 35320 | { 6780, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16a8023019ULL }, // Inst #6780 = VCVTSS2SI64rm_Int |
| 35321 | { 6779, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16a8023019ULL }, // Inst #6779 = VCVTSS2SI64rm |
| 35322 | { 6778, 3, 1, 0, 1705, 1, 0, X86ImpOpBase + 78, 3118, 0, 0x17016e8023029ULL }, // Inst #6778 = VCVTSS2SI64Zrrb_Int |
| 35323 | { 6777, 2, 1, 0, 1705, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x6016e8023029ULL }, // Inst #6777 = VCVTSS2SI64Zrr_Int |
| 35324 | { 6776, 2, 1, 0, 1705, 1, 0, X86ImpOpBase + 78, 3199, 0|(1ULL<<MCID::MayRaiseFPException), 0x6016e8023029ULL }, // Inst #6776 = VCVTSS2SI64Zrr |
| 35325 | { 6775, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6016e8023019ULL }, // Inst #6775 = VCVTSS2SI64Zrm_Int |
| 35326 | { 6774, 6, 1, 0, 414, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6016e8023019ULL }, // Inst #6774 = VCVTSS2SI64Zrm |
| 35327 | { 6773, 5, 1, 0, 2118, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x1768ee8012029ULL }, // Inst #6773 = VCVTSS2SHZrrb_Intkz |
| 35328 | { 6772, 6, 1, 0, 2118, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x1728ee8012029ULL }, // Inst #6772 = VCVTSS2SHZrrb_Intk |
| 35329 | { 6771, 4, 1, 0, 2116, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x1708ee8012029ULL }, // Inst #6771 = VCVTSS2SHZrrb_Int |
| 35330 | { 6770, 4, 1, 0, 2118, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x668ee8012029ULL }, // Inst #6770 = VCVTSS2SHZrr_Intkz |
| 35331 | { 6769, 5, 1, 0, 2118, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x628ee8012029ULL }, // Inst #6769 = VCVTSS2SHZrr_Intk |
| 35332 | { 6768, 3, 1, 0, 2116, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x608ee8012029ULL }, // Inst #6768 = VCVTSS2SHZrr_Int |
| 35333 | { 6767, 3, 1, 0, 2117, 1, 0, X86ImpOpBase + 78, 3196, 0|(1ULL<<MCID::MayRaiseFPException), 0x608ee8012029ULL }, // Inst #6767 = VCVTSS2SHZrr |
| 35334 | { 6766, 8, 1, 0, 2115, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x668ee8012019ULL }, // Inst #6766 = VCVTSS2SHZrm_Intkz |
| 35335 | { 6765, 9, 1, 0, 2115, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x628ee8012019ULL }, // Inst #6765 = VCVTSS2SHZrm_Intk |
| 35336 | { 6764, 7, 1, 0, 2114, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x608ee8012019ULL }, // Inst #6764 = VCVTSS2SHZrm_Int |
| 35337 | { 6763, 7, 1, 0, 2114, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x608ee8012019ULL }, // Inst #6763 = VCVTSS2SHZrm |
| 35338 | { 6762, 3, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xad28003029ULL }, // Inst #6762 = VCVTSS2SDrr_Int |
| 35339 | { 6761, 3, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 3193, 0|(1ULL<<MCID::MayRaiseFPException), 0xad28003029ULL }, // Inst #6761 = VCVTSS2SDrr |
| 35340 | { 6760, 7, 1, 0, 1357, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xad28003019ULL }, // Inst #6760 = VCVTSS2SDrm_Int |
| 35341 | { 6759, 7, 1, 0, 1357, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xad28003019ULL }, // Inst #6759 = VCVTSS2SDrm |
| 35342 | { 6758, 4, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x76ad68003029ULL }, // Inst #6758 = VCVTSS2SDZrrb_Intkz |
| 35343 | { 6757, 5, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x72ad68003029ULL }, // Inst #6757 = VCVTSS2SDZrrb_Intk |
| 35344 | { 6756, 3, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x70ad68003029ULL }, // Inst #6756 = VCVTSS2SDZrrb_Int |
| 35345 | { 6755, 4, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66ad68003029ULL }, // Inst #6755 = VCVTSS2SDZrr_Intkz |
| 35346 | { 6754, 5, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62ad68003029ULL }, // Inst #6754 = VCVTSS2SDZrr_Intk |
| 35347 | { 6753, 3, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ad68003029ULL }, // Inst #6753 = VCVTSS2SDZrr_Int |
| 35348 | { 6752, 3, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 3190, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ad68003029ULL }, // Inst #6752 = VCVTSS2SDZrr |
| 35349 | { 6751, 8, 1, 0, 1357, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66ad68003019ULL }, // Inst #6751 = VCVTSS2SDZrm_Intkz |
| 35350 | { 6750, 9, 1, 0, 1357, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62ad68003019ULL }, // Inst #6750 = VCVTSS2SDZrm_Intk |
| 35351 | { 6749, 7, 1, 0, 1357, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ad68003019ULL }, // Inst #6749 = VCVTSS2SDZrm_Int |
| 35352 | { 6748, 7, 1, 0, 1357, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ad68003019ULL }, // Inst #6748 = VCVTSS2SDZrm |
| 35353 | { 6747, 3, 1, 0, 1487, 1, 0, X86ImpOpBase + 78, 3178, 0|(1ULL<<MCID::MayRaiseFPException), 0x9528023029ULL }, // Inst #6747 = VCVTSI642SSrr_Int |
| 35354 | { 6746, 3, 1, 0, 878, 1, 0, X86ImpOpBase + 78, 3187, 0|(1ULL<<MCID::MayRaiseFPException), 0x9528023029ULL }, // Inst #6746 = VCVTSI642SSrr |
| 35355 | { 6745, 7, 1, 0, 1485, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9528023019ULL }, // Inst #6745 = VCVTSI642SSrm_Int |
| 35356 | { 6744, 7, 1, 0, 1486, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9528023019ULL }, // Inst #6744 = VCVTSI642SSrm |
| 35357 | { 6743, 4, 1, 0, 1279, 1, 0, X86ImpOpBase + 78, 3171, 0, 0x1909568023029ULL }, // Inst #6743 = VCVTSI642SSZrrb_Int |
| 35358 | { 6742, 3, 1, 0, 1279, 1, 0, X86ImpOpBase + 78, 3168, 0|(1ULL<<MCID::MayRaiseFPException), 0x809568023029ULL }, // Inst #6742 = VCVTSI642SSZrr_Int |
| 35359 | { 6741, 3, 1, 0, 1279, 1, 0, X86ImpOpBase + 78, 3184, 0|(1ULL<<MCID::MayRaiseFPException), 0x809568023029ULL }, // Inst #6741 = VCVTSI642SSZrr |
| 35360 | { 6740, 7, 1, 0, 1701, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809568023019ULL }, // Inst #6740 = VCVTSI642SSZrm_Int |
| 35361 | { 6739, 7, 1, 0, 1701, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809568023019ULL }, // Inst #6739 = VCVTSI642SSZrm |
| 35362 | { 6738, 4, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3171, 0, 0x1909568033029ULL }, // Inst #6738 = VCVTSI642SHZrrb_Int |
| 35363 | { 6737, 3, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3168, 0|(1ULL<<MCID::MayRaiseFPException), 0x809568033029ULL }, // Inst #6737 = VCVTSI642SHZrr_Int |
| 35364 | { 6736, 3, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3181, 0|(1ULL<<MCID::MayRaiseFPException), 0x809568033029ULL }, // Inst #6736 = VCVTSI642SHZrr |
| 35365 | { 6735, 7, 1, 0, 2113, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809568033019ULL }, // Inst #6735 = VCVTSI642SHZrm_Int |
| 35366 | { 6734, 7, 1, 0, 2113, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809568033019ULL }, // Inst #6734 = VCVTSI642SHZrm |
| 35367 | { 6733, 3, 1, 0, 987, 1, 0, X86ImpOpBase + 78, 3178, 0|(1ULL<<MCID::MayRaiseFPException), 0x9530023829ULL }, // Inst #6733 = VCVTSI642SDrr_Int |
| 35368 | { 6732, 3, 1, 0, 987, 1, 0, X86ImpOpBase + 78, 3175, 0|(1ULL<<MCID::MayRaiseFPException), 0x9530023829ULL }, // Inst #6732 = VCVTSI642SDrr |
| 35369 | { 6731, 7, 1, 0, 108, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9530023819ULL }, // Inst #6731 = VCVTSI642SDrm_Int |
| 35370 | { 6730, 7, 1, 0, 108, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9530023819ULL }, // Inst #6730 = VCVTSI642SDrm |
| 35371 | { 6729, 4, 1, 0, 1267, 1, 0, X86ImpOpBase + 78, 3171, 0, 0x1909570023829ULL }, // Inst #6729 = VCVTSI642SDZrrb_Int |
| 35372 | { 6728, 3, 1, 0, 1267, 1, 0, X86ImpOpBase + 78, 3168, 0|(1ULL<<MCID::MayRaiseFPException), 0x809570023829ULL }, // Inst #6728 = VCVTSI642SDZrr_Int |
| 35373 | { 6727, 3, 1, 0, 1267, 1, 0, X86ImpOpBase + 78, 3165, 0|(1ULL<<MCID::MayRaiseFPException), 0x809570023829ULL }, // Inst #6727 = VCVTSI642SDZrr |
| 35374 | { 6726, 7, 1, 0, 108, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809570023819ULL }, // Inst #6726 = VCVTSI642SDZrm_Int |
| 35375 | { 6725, 7, 1, 0, 108, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x809570023819ULL }, // Inst #6725 = VCVTSI642SDZrm |
| 35376 | { 6724, 3, 1, 0, 1704, 1, 0, X86ImpOpBase + 78, 3149, 0|(1ULL<<MCID::MayRaiseFPException), 0x9528003029ULL }, // Inst #6724 = VCVTSI2SSrr_Int |
| 35377 | { 6723, 3, 1, 0, 1266, 1, 0, X86ImpOpBase + 78, 3162, 0|(1ULL<<MCID::MayRaiseFPException), 0x9528003029ULL }, // Inst #6723 = VCVTSI2SSrr |
| 35378 | { 6722, 7, 1, 0, 112, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9528003019ULL }, // Inst #6722 = VCVTSI2SSrm_Int |
| 35379 | { 6721, 7, 1, 0, 112, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9528003019ULL }, // Inst #6721 = VCVTSI2SSrm |
| 35380 | { 6720, 4, 1, 0, 1704, 1, 0, X86ImpOpBase + 78, 3155, 0, 0x1709568003029ULL }, // Inst #6720 = VCVTSI2SSZrrb_Int |
| 35381 | { 6719, 3, 1, 0, 1704, 1, 0, X86ImpOpBase + 78, 3143, 0|(1ULL<<MCID::MayRaiseFPException), 0x609568003029ULL }, // Inst #6719 = VCVTSI2SSZrr_Int |
| 35382 | { 6718, 3, 1, 0, 1704, 1, 0, X86ImpOpBase + 78, 3159, 0|(1ULL<<MCID::MayRaiseFPException), 0x609568003029ULL }, // Inst #6718 = VCVTSI2SSZrr |
| 35383 | { 6717, 7, 1, 0, 112, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x609568003019ULL }, // Inst #6717 = VCVTSI2SSZrm_Int |
| 35384 | { 6716, 7, 1, 0, 112, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x609568003019ULL }, // Inst #6716 = VCVTSI2SSZrm |
| 35385 | { 6715, 4, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3155, 0, 0x1709568013029ULL }, // Inst #6715 = VCVTSI2SHZrrb_Int |
| 35386 | { 6714, 3, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3143, 0|(1ULL<<MCID::MayRaiseFPException), 0x609568013029ULL }, // Inst #6714 = VCVTSI2SHZrr_Int |
| 35387 | { 6713, 3, 1, 0, 114, 1, 0, X86ImpOpBase + 78, 3152, 0|(1ULL<<MCID::MayRaiseFPException), 0x609568013029ULL }, // Inst #6713 = VCVTSI2SHZrr |
| 35388 | { 6712, 7, 1, 0, 2113, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x609568013019ULL }, // Inst #6712 = VCVTSI2SHZrm_Int |
| 35389 | { 6711, 7, 1, 0, 2113, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x609568013019ULL }, // Inst #6711 = VCVTSI2SHZrm |
| 35390 | { 6710, 3, 1, 0, 987, 0, 0, X86ImpOpBase + 0, 3149, 0, 0x9530003829ULL }, // Inst #6710 = VCVTSI2SDrr_Int |
| 35391 | { 6709, 3, 1, 0, 987, 0, 0, X86ImpOpBase + 0, 3146, 0, 0x9530003829ULL }, // Inst #6709 = VCVTSI2SDrr |
| 35392 | { 6708, 7, 1, 0, 108, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0x9530003819ULL }, // Inst #6708 = VCVTSI2SDrm_Int |
| 35393 | { 6707, 7, 1, 0, 108, 0, 0, X86ImpOpBase + 0, 1945, 0|(1ULL<<MCID::MayLoad), 0x9530003819ULL }, // Inst #6707 = VCVTSI2SDrm |
| 35394 | { 6706, 3, 1, 0, 1267, 0, 0, X86ImpOpBase + 0, 3143, 0, 0x609570003829ULL }, // Inst #6706 = VCVTSI2SDZrr_Int |
| 35395 | { 6705, 3, 1, 0, 1267, 0, 0, X86ImpOpBase + 0, 3140, 0, 0x609570003829ULL }, // Inst #6705 = VCVTSI2SDZrr |
| 35396 | { 6704, 7, 1, 0, 108, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x609570003819ULL }, // Inst #6704 = VCVTSI2SDZrm_Int |
| 35397 | { 6703, 7, 1, 0, 108, 0, 0, X86ImpOpBase + 0, 1903, 0|(1ULL<<MCID::MayLoad), 0x609570003819ULL }, // Inst #6703 = VCVTSI2SDZrm |
| 35398 | { 6702, 3, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3125, 0, 0x1503ce8013029ULL }, // Inst #6702 = VCVTSH2USIZrrb_Int |
| 35399 | { 6701, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x403ce8013029ULL }, // Inst #6701 = VCVTSH2USIZrr_Int |
| 35400 | { 6700, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403ce8013019ULL }, // Inst #6700 = VCVTSH2USIZrm_Int |
| 35401 | { 6699, 3, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3118, 0, 0x1503ce8033029ULL }, // Inst #6699 = VCVTSH2USI64Zrrb_Int |
| 35402 | { 6698, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x403ce8033029ULL }, // Inst #6698 = VCVTSH2USI64Zrr_Int |
| 35403 | { 6697, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x403ce8033019ULL }, // Inst #6697 = VCVTSH2USI64Zrm_Int |
| 35404 | { 6696, 4, 1, 0, 2112, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x5689e8014029ULL }, // Inst #6696 = VCVTSH2SSZrrb_Intkz |
| 35405 | { 6695, 5, 1, 0, 2112, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x5289e8014029ULL }, // Inst #6695 = VCVTSH2SSZrrb_Intk |
| 35406 | { 6694, 3, 1, 0, 1739, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x5089e8014029ULL }, // Inst #6694 = VCVTSH2SSZrrb_Int |
| 35407 | { 6693, 4, 1, 0, 2112, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x4689e8014029ULL }, // Inst #6693 = VCVTSH2SSZrr_Intkz |
| 35408 | { 6692, 5, 1, 0, 2112, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x4289e8014029ULL }, // Inst #6692 = VCVTSH2SSZrr_Intk |
| 35409 | { 6691, 3, 1, 0, 1739, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x4089e8014029ULL }, // Inst #6691 = VCVTSH2SSZrr_Int |
| 35410 | { 6690, 3, 1, 0, 1753, 1, 0, X86ImpOpBase + 78, 3137, 0|(1ULL<<MCID::MayRaiseFPException), 0x4089e8014029ULL }, // Inst #6690 = VCVTSH2SSZrr |
| 35411 | { 6689, 8, 1, 0, 2073, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4689e8014019ULL }, // Inst #6689 = VCVTSH2SSZrm_Intkz |
| 35412 | { 6688, 9, 1, 0, 2073, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4289e8014019ULL }, // Inst #6688 = VCVTSH2SSZrm_Intk |
| 35413 | { 6687, 7, 1, 0, 1726, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4089e8014019ULL }, // Inst #6687 = VCVTSH2SSZrm_Int |
| 35414 | { 6686, 7, 1, 0, 1726, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4089e8014019ULL }, // Inst #6686 = VCVTSH2SSZrm |
| 35415 | { 6685, 3, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3125, 0, 0x15016e8013029ULL }, // Inst #6685 = VCVTSH2SIZrrb_Int |
| 35416 | { 6684, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x4016e8013029ULL }, // Inst #6684 = VCVTSH2SIZrr_Int |
| 35417 | { 6683, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4016e8013019ULL }, // Inst #6683 = VCVTSH2SIZrm_Int |
| 35418 | { 6682, 3, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3118, 0, 0x15016e8033029ULL }, // Inst #6682 = VCVTSH2SI64Zrrb_Int |
| 35419 | { 6681, 2, 1, 0, 2111, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x4016e8033029ULL }, // Inst #6681 = VCVTSH2SI64Zrr_Int |
| 35420 | { 6680, 6, 1, 0, 2110, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4016e8033019ULL }, // Inst #6680 = VCVTSH2SI64Zrm_Int |
| 35421 | { 6679, 4, 1, 0, 2109, 1, 0, X86ImpOpBase + 78, 1926, 0, 0x56ad68013029ULL }, // Inst #6679 = VCVTSH2SDZrrb_Intkz |
| 35422 | { 6678, 5, 1, 0, 2109, 1, 0, X86ImpOpBase + 78, 1921, 0, 0x52ad68013029ULL }, // Inst #6678 = VCVTSH2SDZrrb_Intk |
| 35423 | { 6677, 3, 1, 0, 2107, 1, 0, X86ImpOpBase + 78, 1625, 0, 0x50ad68013029ULL }, // Inst #6677 = VCVTSH2SDZrrb_Int |
| 35424 | { 6676, 4, 1, 0, 2109, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x46ad68013029ULL }, // Inst #6676 = VCVTSH2SDZrr_Intkz |
| 35425 | { 6675, 5, 1, 0, 2109, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x42ad68013029ULL }, // Inst #6675 = VCVTSH2SDZrr_Intk |
| 35426 | { 6674, 3, 1, 0, 2107, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ad68013029ULL }, // Inst #6674 = VCVTSH2SDZrr_Int |
| 35427 | { 6673, 3, 1, 0, 2108, 1, 0, X86ImpOpBase + 78, 3134, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ad68013029ULL }, // Inst #6673 = VCVTSH2SDZrr |
| 35428 | { 6672, 8, 1, 0, 2106, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46ad68013019ULL }, // Inst #6672 = VCVTSH2SDZrm_Intkz |
| 35429 | { 6671, 9, 1, 0, 2106, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42ad68013019ULL }, // Inst #6671 = VCVTSH2SDZrm_Intk |
| 35430 | { 6670, 7, 1, 0, 2105, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ad68013019ULL }, // Inst #6670 = VCVTSH2SDZrm_Int |
| 35431 | { 6669, 7, 1, 0, 2105, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ad68013019ULL }, // Inst #6669 = VCVTSH2SDZrm |
| 35432 | { 6668, 3, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3125, 0, 0x1903cf0003829ULL }, // Inst #6668 = VCVTSD2USIZrrb_Int |
| 35433 | { 6667, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x803cf0003829ULL }, // Inst #6667 = VCVTSD2USIZrr_Int |
| 35434 | { 6666, 6, 1, 0, 1703, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803cf0003819ULL }, // Inst #6666 = VCVTSD2USIZrm_Int |
| 35435 | { 6665, 3, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3118, 0, 0x1903cf0023829ULL }, // Inst #6665 = VCVTSD2USI64Zrrb_Int |
| 35436 | { 6664, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x803cf0023829ULL }, // Inst #6664 = VCVTSD2USI64Zrr_Int |
| 35437 | { 6663, 6, 1, 0, 413, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803cf0023819ULL }, // Inst #6663 = VCVTSD2USI64Zrm_Int |
| 35438 | { 6662, 3, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xad28003829ULL }, // Inst #6662 = VCVTSD2SSrr_Int |
| 35439 | { 6661, 3, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 3131, 0|(1ULL<<MCID::MayRaiseFPException), 0xad28003829ULL }, // Inst #6661 = VCVTSD2SSrr |
| 35440 | { 6660, 7, 1, 0, 105, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xad28003819ULL }, // Inst #6660 = VCVTSD2SSrm_Int |
| 35441 | { 6659, 7, 1, 0, 105, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xad28003819ULL }, // Inst #6659 = VCVTSD2SSrm |
| 35442 | { 6658, 5, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x196ad68023829ULL }, // Inst #6658 = VCVTSD2SSZrrb_Intkz |
| 35443 | { 6657, 6, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x192ad68023829ULL }, // Inst #6657 = VCVTSD2SSZrrb_Intk |
| 35444 | { 6656, 4, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x190ad68023829ULL }, // Inst #6656 = VCVTSD2SSZrrb_Int |
| 35445 | { 6655, 4, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86ad68023829ULL }, // Inst #6655 = VCVTSD2SSZrr_Intkz |
| 35446 | { 6654, 5, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82ad68023829ULL }, // Inst #6654 = VCVTSD2SSZrr_Intk |
| 35447 | { 6653, 3, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ad68023829ULL }, // Inst #6653 = VCVTSD2SSZrr_Int |
| 35448 | { 6652, 3, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 3128, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ad68023829ULL }, // Inst #6652 = VCVTSD2SSZrr |
| 35449 | { 6651, 8, 1, 0, 105, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86ad68023819ULL }, // Inst #6651 = VCVTSD2SSZrm_Intkz |
| 35450 | { 6650, 9, 1, 0, 105, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82ad68023819ULL }, // Inst #6650 = VCVTSD2SSZrm_Intk |
| 35451 | { 6649, 7, 1, 0, 105, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ad68023819ULL }, // Inst #6649 = VCVTSD2SSZrm_Int |
| 35452 | { 6648, 7, 1, 0, 105, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ad68023819ULL }, // Inst #6648 = VCVTSD2SSZrm |
| 35453 | { 6647, 2, 1, 0, 989, 1, 0, X86ImpOpBase + 78, 1003, 0|(1ULL<<MCID::MayRaiseFPException), 0x16b0003829ULL }, // Inst #6647 = VCVTSD2SIrr_Int |
| 35454 | { 6646, 2, 1, 0, 988, 1, 0, X86ImpOpBase + 78, 1001, 0|(1ULL<<MCID::MayRaiseFPException), 0x16b0003829ULL }, // Inst #6646 = VCVTSD2SIrr |
| 35455 | { 6645, 6, 1, 0, 1483, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16b0003819ULL }, // Inst #6645 = VCVTSD2SIrm_Int |
| 35456 | { 6644, 6, 1, 0, 1483, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16b0003819ULL }, // Inst #6644 = VCVTSD2SIrm |
| 35457 | { 6643, 3, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3125, 0, 0x19016f0003829ULL }, // Inst #6643 = VCVTSD2SIZrrb_Int |
| 35458 | { 6642, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3123, 0|(1ULL<<MCID::MayRaiseFPException), 0x8016f0003829ULL }, // Inst #6642 = VCVTSD2SIZrr_Int |
| 35459 | { 6641, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3121, 0|(1ULL<<MCID::MayRaiseFPException), 0x8016f0003829ULL }, // Inst #6641 = VCVTSD2SIZrr |
| 35460 | { 6640, 6, 1, 0, 1702, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8016f0003819ULL }, // Inst #6640 = VCVTSD2SIZrm_Int |
| 35461 | { 6639, 6, 1, 0, 1702, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8016f0003819ULL }, // Inst #6639 = VCVTSD2SIZrm |
| 35462 | { 6638, 2, 1, 0, 989, 1, 0, X86ImpOpBase + 78, 999, 0|(1ULL<<MCID::MayRaiseFPException), 0x16b0023829ULL }, // Inst #6638 = VCVTSD2SI64rr_Int |
| 35463 | { 6637, 2, 1, 0, 988, 1, 0, X86ImpOpBase + 78, 997, 0|(1ULL<<MCID::MayRaiseFPException), 0x16b0023829ULL }, // Inst #6637 = VCVTSD2SI64rr |
| 35464 | { 6636, 6, 1, 0, 991, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16b0023819ULL }, // Inst #6636 = VCVTSD2SI64rm_Int |
| 35465 | { 6635, 6, 1, 0, 991, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x16b0023819ULL }, // Inst #6635 = VCVTSD2SI64rm |
| 35466 | { 6634, 3, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3118, 0, 0x19016f0023829ULL }, // Inst #6634 = VCVTSD2SI64Zrrb_Int |
| 35467 | { 6633, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3116, 0|(1ULL<<MCID::MayRaiseFPException), 0x8016f0023829ULL }, // Inst #6633 = VCVTSD2SI64Zrr_Int |
| 35468 | { 6632, 2, 1, 0, 104, 1, 0, X86ImpOpBase + 78, 3114, 0|(1ULL<<MCID::MayRaiseFPException), 0x8016f0023829ULL }, // Inst #6632 = VCVTSD2SI64Zrr |
| 35469 | { 6631, 6, 1, 0, 413, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8016f0023819ULL }, // Inst #6631 = VCVTSD2SI64Zrm_Int |
| 35470 | { 6630, 6, 1, 0, 413, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8016f0023819ULL }, // Inst #6630 = VCVTSD2SI64Zrm |
| 35471 | { 6629, 5, 1, 0, 2104, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x196ad68033829ULL }, // Inst #6629 = VCVTSD2SHZrrb_Intkz |
| 35472 | { 6628, 6, 1, 0, 2104, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x192ad68033829ULL }, // Inst #6628 = VCVTSD2SHZrrb_Intk |
| 35473 | { 6627, 4, 1, 0, 2102, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x190ad68033829ULL }, // Inst #6627 = VCVTSD2SHZrrb_Int |
| 35474 | { 6626, 4, 1, 0, 2104, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86ad68033829ULL }, // Inst #6626 = VCVTSD2SHZrr_Intkz |
| 35475 | { 6625, 5, 1, 0, 2104, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82ad68033829ULL }, // Inst #6625 = VCVTSD2SHZrr_Intk |
| 35476 | { 6624, 3, 1, 0, 2102, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ad68033829ULL }, // Inst #6624 = VCVTSD2SHZrr_Int |
| 35477 | { 6623, 3, 1, 0, 2103, 1, 0, X86ImpOpBase + 78, 3111, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ad68033829ULL }, // Inst #6623 = VCVTSD2SHZrr |
| 35478 | { 6622, 8, 1, 0, 2101, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86ad68033819ULL }, // Inst #6622 = VCVTSD2SHZrm_Intkz |
| 35479 | { 6621, 9, 1, 0, 2101, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82ad68033819ULL }, // Inst #6621 = VCVTSD2SHZrm_Intk |
| 35480 | { 6620, 7, 1, 0, 2100, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ad68033819ULL }, // Inst #6620 = VCVTSD2SHZrm_Int |
| 35481 | { 6619, 7, 1, 0, 2100, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ad68033819ULL }, // Inst #6619 = VCVTSD2SHZrm |
| 35482 | { 6618, 3, 1, 0, 1948, 1, 0, X86ImpOpBase + 78, 2902, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0022029ULL }, // Inst #6618 = VCVTQQ2PSZrrkz |
| 35483 | { 6617, 4, 1, 0, 1948, 1, 0, X86ImpOpBase + 78, 2898, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0022029ULL }, // Inst #6617 = VCVTQQ2PSZrrk |
| 35484 | { 6616, 4, 1, 0, 1948, 1, 0, X86ImpOpBase + 78, 2894, 0, 0x19e2de0022029ULL }, // Inst #6616 = VCVTQQ2PSZrrbkz |
| 35485 | { 6615, 5, 1, 0, 1948, 1, 0, X86ImpOpBase + 78, 2889, 0, 0x19a2de0022029ULL }, // Inst #6615 = VCVTQQ2PSZrrbk |
| 35486 | { 6614, 3, 1, 0, 1948, 1, 0, X86ImpOpBase + 78, 2847, 0, 0x1982de0022029ULL }, // Inst #6614 = VCVTQQ2PSZrrb |
| 35487 | { 6613, 2, 1, 0, 1290, 1, 0, X86ImpOpBase + 78, 2845, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0022029ULL }, // Inst #6613 = VCVTQQ2PSZrr |
| 35488 | { 6612, 7, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0022019ULL }, // Inst #6612 = VCVTQQ2PSZrmkz |
| 35489 | { 6611, 8, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0022019ULL }, // Inst #6611 = VCVTQQ2PSZrmk |
| 35490 | { 6610, 7, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2de0022019ULL }, // Inst #6610 = VCVTQQ2PSZrmbkz |
| 35491 | { 6609, 8, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2de0022019ULL }, // Inst #6609 = VCVTQQ2PSZrmbk |
| 35492 | { 6608, 6, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982de0022019ULL }, // Inst #6608 = VCVTQQ2PSZrmb |
| 35493 | { 6607, 6, 1, 0, 1388, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0022019ULL }, // Inst #6607 = VCVTQQ2PSZrm |
| 35494 | { 6606, 3, 1, 0, 1285, 1, 0, X86ImpOpBase + 78, 2886, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0022029ULL }, // Inst #6606 = VCVTQQ2PSZ256rrkz |
| 35495 | { 6605, 4, 1, 0, 1285, 1, 0, X86ImpOpBase + 78, 2882, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0022029ULL }, // Inst #6605 = VCVTQQ2PSZ256rrk |
| 35496 | { 6604, 2, 1, 0, 1285, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0022029ULL }, // Inst #6604 = VCVTQQ2PSZ256rr |
| 35497 | { 6603, 7, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0022019ULL }, // Inst #6603 = VCVTQQ2PSZ256rmkz |
| 35498 | { 6602, 8, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0022019ULL }, // Inst #6602 = VCVTQQ2PSZ256rmk |
| 35499 | { 6601, 7, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972de0022019ULL }, // Inst #6601 = VCVTQQ2PSZ256rmbkz |
| 35500 | { 6600, 8, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932de0022019ULL }, // Inst #6600 = VCVTQQ2PSZ256rmbk |
| 35501 | { 6599, 6, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912de0022019ULL }, // Inst #6599 = VCVTQQ2PSZ256rmb |
| 35502 | { 6598, 6, 1, 0, 1991, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0022019ULL }, // Inst #6598 = VCVTQQ2PSZ256rm |
| 35503 | { 6597, 3, 1, 0, 1265, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0022029ULL }, // Inst #6597 = VCVTQQ2PSZ128rrkz |
| 35504 | { 6596, 4, 1, 0, 1265, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0022029ULL }, // Inst #6596 = VCVTQQ2PSZ128rrk |
| 35505 | { 6595, 2, 1, 0, 1265, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0022029ULL }, // Inst #6595 = VCVTQQ2PSZ128rr |
| 35506 | { 6594, 7, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0022019ULL }, // Inst #6594 = VCVTQQ2PSZ128rmkz |
| 35507 | { 6593, 8, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0022019ULL }, // Inst #6593 = VCVTQQ2PSZ128rmk |
| 35508 | { 6592, 7, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962de0022019ULL }, // Inst #6592 = VCVTQQ2PSZ128rmbkz |
| 35509 | { 6591, 8, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922de0022019ULL }, // Inst #6591 = VCVTQQ2PSZ128rmbk |
| 35510 | { 6590, 6, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902de0022019ULL }, // Inst #6590 = VCVTQQ2PSZ128rmb |
| 35511 | { 6589, 6, 1, 0, 1700, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0022019ULL }, // Inst #6589 = VCVTQQ2PSZ128rm |
| 35512 | { 6588, 3, 1, 0, 2099, 1, 0, X86ImpOpBase + 78, 2923, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0032029ULL }, // Inst #6588 = VCVTQQ2PHZrrkz |
| 35513 | { 6587, 4, 1, 0, 2099, 1, 0, X86ImpOpBase + 78, 2919, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0032029ULL }, // Inst #6587 = VCVTQQ2PHZrrk |
| 35514 | { 6586, 4, 1, 0, 2099, 1, 0, X86ImpOpBase + 78, 2915, 0, 0x19e2de0032029ULL }, // Inst #6586 = VCVTQQ2PHZrrbkz |
| 35515 | { 6585, 5, 1, 0, 2099, 1, 0, X86ImpOpBase + 78, 2910, 0, 0x19a2de0032029ULL }, // Inst #6585 = VCVTQQ2PHZrrbk |
| 35516 | { 6584, 3, 1, 0, 2098, 1, 0, X86ImpOpBase + 78, 2907, 0, 0x1982de0032029ULL }, // Inst #6584 = VCVTQQ2PHZrrb |
| 35517 | { 6583, 2, 1, 0, 2098, 1, 0, X86ImpOpBase + 78, 2905, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0032029ULL }, // Inst #6583 = VCVTQQ2PHZrr |
| 35518 | { 6582, 7, 1, 0, 2097, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0032019ULL }, // Inst #6582 = VCVTQQ2PHZrmkz |
| 35519 | { 6581, 8, 1, 0, 2097, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0032019ULL }, // Inst #6581 = VCVTQQ2PHZrmk |
| 35520 | { 6580, 7, 1, 0, 2097, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2de0032019ULL }, // Inst #6580 = VCVTQQ2PHZrmbkz |
| 35521 | { 6579, 8, 1, 0, 2097, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2de0032019ULL }, // Inst #6579 = VCVTQQ2PHZrmbk |
| 35522 | { 6578, 6, 1, 0, 2096, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982de0032019ULL }, // Inst #6578 = VCVTQQ2PHZrmb |
| 35523 | { 6577, 6, 1, 0, 2096, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0032019ULL }, // Inst #6577 = VCVTQQ2PHZrm |
| 35524 | { 6576, 3, 1, 0, 2095, 1, 0, X86ImpOpBase + 78, 2886, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0032029ULL }, // Inst #6576 = VCVTQQ2PHZ256rrkz |
| 35525 | { 6575, 4, 1, 0, 2095, 1, 0, X86ImpOpBase + 78, 2882, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0032029ULL }, // Inst #6575 = VCVTQQ2PHZ256rrk |
| 35526 | { 6574, 2, 1, 0, 2092, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0032029ULL }, // Inst #6574 = VCVTQQ2PHZ256rr |
| 35527 | { 6573, 7, 1, 0, 2094, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0032019ULL }, // Inst #6573 = VCVTQQ2PHZ256rmkz |
| 35528 | { 6572, 8, 1, 0, 2094, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0032019ULL }, // Inst #6572 = VCVTQQ2PHZ256rmk |
| 35529 | { 6571, 7, 1, 0, 2094, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972de0032019ULL }, // Inst #6571 = VCVTQQ2PHZ256rmbkz |
| 35530 | { 6570, 8, 1, 0, 2094, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932de0032019ULL }, // Inst #6570 = VCVTQQ2PHZ256rmbk |
| 35531 | { 6569, 6, 1, 0, 2093, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912de0032019ULL }, // Inst #6569 = VCVTQQ2PHZ256rmb |
| 35532 | { 6568, 6, 1, 0, 2093, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0032019ULL }, // Inst #6568 = VCVTQQ2PHZ256rm |
| 35533 | { 6567, 3, 1, 0, 2091, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0032029ULL }, // Inst #6567 = VCVTQQ2PHZ128rrkz |
| 35534 | { 6566, 4, 1, 0, 2091, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0032029ULL }, // Inst #6566 = VCVTQQ2PHZ128rrk |
| 35535 | { 6565, 2, 1, 0, 2090, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0032029ULL }, // Inst #6565 = VCVTQQ2PHZ128rr |
| 35536 | { 6564, 7, 1, 0, 2089, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0032019ULL }, // Inst #6564 = VCVTQQ2PHZ128rmkz |
| 35537 | { 6563, 8, 1, 0, 2089, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0032019ULL }, // Inst #6563 = VCVTQQ2PHZ128rmk |
| 35538 | { 6562, 7, 1, 0, 2089, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962de0032019ULL }, // Inst #6562 = VCVTQQ2PHZ128rmbkz |
| 35539 | { 6561, 8, 1, 0, 2089, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922de0032019ULL }, // Inst #6561 = VCVTQQ2PHZ128rmbk |
| 35540 | { 6560, 6, 1, 0, 2088, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902de0032019ULL }, // Inst #6560 = VCVTQQ2PHZ128rmb |
| 35541 | { 6559, 6, 1, 0, 2088, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0032019ULL }, // Inst #6559 = VCVTQQ2PHZ128rm |
| 35542 | { 6558, 3, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee7360023029ULL }, // Inst #6558 = VCVTQQ2PDZrrkz |
| 35543 | { 6557, 4, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea7360023029ULL }, // Inst #6557 = VCVTQQ2PDZrrk |
| 35544 | { 6556, 4, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2931, 0, 0x19e7360023029ULL }, // Inst #6556 = VCVTQQ2PDZrrbkz |
| 35545 | { 6555, 5, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2926, 0, 0x19a7360023029ULL }, // Inst #6555 = VCVTQQ2PDZrrbk |
| 35546 | { 6554, 3, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1987360023029ULL }, // Inst #6554 = VCVTQQ2PDZrrb |
| 35547 | { 6553, 2, 1, 0, 379, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe87360023029ULL }, // Inst #6553 = VCVTQQ2PDZrr |
| 35548 | { 6552, 7, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee7360023019ULL }, // Inst #6552 = VCVTQQ2PDZrmkz |
| 35549 | { 6551, 8, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea7360023019ULL }, // Inst #6551 = VCVTQQ2PDZrmk |
| 35550 | { 6550, 7, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e7360023019ULL }, // Inst #6550 = VCVTQQ2PDZrmbkz |
| 35551 | { 6549, 8, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a7360023019ULL }, // Inst #6549 = VCVTQQ2PDZrmbk |
| 35552 | { 6548, 6, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x987360023019ULL }, // Inst #6548 = VCVTQQ2PDZrmb |
| 35553 | { 6547, 6, 1, 0, 1362, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe87360023019ULL }, // Inst #6547 = VCVTQQ2PDZrm |
| 35554 | { 6546, 3, 1, 0, 2026, 1, 0, X86ImpOpBase + 78, 2722, 0|(1ULL<<MCID::MayRaiseFPException), 0xc77360023029ULL }, // Inst #6546 = VCVTQQ2PDZ256rrkz |
| 35555 | { 6545, 4, 1, 0, 2026, 1, 0, X86ImpOpBase + 78, 2718, 0|(1ULL<<MCID::MayRaiseFPException), 0xc37360023029ULL }, // Inst #6545 = VCVTQQ2PDZ256rrk |
| 35556 | { 6544, 2, 1, 0, 2026, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc17360023029ULL }, // Inst #6544 = VCVTQQ2PDZ256rr |
| 35557 | { 6543, 7, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc77360023019ULL }, // Inst #6543 = VCVTQQ2PDZ256rmkz |
| 35558 | { 6542, 8, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc37360023019ULL }, // Inst #6542 = VCVTQQ2PDZ256rmk |
| 35559 | { 6541, 7, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x977360023019ULL }, // Inst #6541 = VCVTQQ2PDZ256rmbkz |
| 35560 | { 6540, 8, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x937360023019ULL }, // Inst #6540 = VCVTQQ2PDZ256rmbk |
| 35561 | { 6539, 6, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x917360023019ULL }, // Inst #6539 = VCVTQQ2PDZ256rmb |
| 35562 | { 6538, 6, 1, 0, 1361, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc17360023019ULL }, // Inst #6538 = VCVTQQ2PDZ256rm |
| 35563 | { 6537, 3, 1, 0, 2025, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa67360023029ULL }, // Inst #6537 = VCVTQQ2PDZ128rrkz |
| 35564 | { 6536, 4, 1, 0, 2025, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa27360023029ULL }, // Inst #6536 = VCVTQQ2PDZ128rrk |
| 35565 | { 6535, 2, 1, 0, 2025, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa07360023029ULL }, // Inst #6535 = VCVTQQ2PDZ128rr |
| 35566 | { 6534, 7, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa67360023019ULL }, // Inst #6534 = VCVTQQ2PDZ128rmkz |
| 35567 | { 6533, 8, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa27360023019ULL }, // Inst #6533 = VCVTQQ2PDZ128rmk |
| 35568 | { 6532, 7, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x967360023019ULL }, // Inst #6532 = VCVTQQ2PDZ128rmbkz |
| 35569 | { 6531, 8, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x927360023019ULL }, // Inst #6531 = VCVTQQ2PDZ128rmbk |
| 35570 | { 6530, 6, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x907360023019ULL }, // Inst #6530 = VCVTQQ2PDZ128rmb |
| 35571 | { 6529, 6, 1, 0, 1351, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa07360023019ULL }, // Inst #6529 = VCVTQQ2PDZ128rm |
| 35572 | { 6528, 3, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2803, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3ce0002829ULL }, // Inst #6528 = VCVTPS2UQQZrrkz |
| 35573 | { 6527, 4, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2799, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3ce0002829ULL }, // Inst #6527 = VCVTPS2UQQZrrk |
| 35574 | { 6526, 4, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 3107, 0, 0x17e3ce0002829ULL }, // Inst #6526 = VCVTPS2UQQZrrbkz |
| 35575 | { 6525, 5, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 3102, 0, 0x17a3ce0002829ULL }, // Inst #6525 = VCVTPS2UQQZrrbk |
| 35576 | { 6524, 3, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2935, 0, 0x1783ce0002829ULL }, // Inst #6524 = VCVTPS2UQQZrrb |
| 35577 | { 6523, 2, 1, 0, 1289, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83ce0002829ULL }, // Inst #6523 = VCVTPS2UQQZrr |
| 35578 | { 6522, 7, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3ce0002819ULL }, // Inst #6522 = VCVTPS2UQQZrmkz |
| 35579 | { 6521, 8, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3ce0002819ULL }, // Inst #6521 = VCVTPS2UQQZrmk |
| 35580 | { 6520, 7, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3ce0002819ULL }, // Inst #6520 = VCVTPS2UQQZrmbkz |
| 35581 | { 6519, 8, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3ce0002819ULL }, // Inst #6519 = VCVTPS2UQQZrmbk |
| 35582 | { 6518, 6, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783ce0002819ULL }, // Inst #6518 = VCVTPS2UQQZrmb |
| 35583 | { 6517, 6, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83ce0002819ULL }, // Inst #6517 = VCVTPS2UQQZrm |
| 35584 | { 6516, 3, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2349, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73ce0002829ULL }, // Inst #6516 = VCVTPS2UQQZ256rrkz |
| 35585 | { 6515, 4, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2345, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33ce0002829ULL }, // Inst #6515 = VCVTPS2UQQZ256rrk |
| 35586 | { 6514, 2, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13ce0002829ULL }, // Inst #6514 = VCVTPS2UQQZ256rr |
| 35587 | { 6513, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73ce0002819ULL }, // Inst #6513 = VCVTPS2UQQZ256rmkz |
| 35588 | { 6512, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33ce0002819ULL }, // Inst #6512 = VCVTPS2UQQZ256rmk |
| 35589 | { 6511, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773ce0002819ULL }, // Inst #6511 = VCVTPS2UQQZ256rmbkz |
| 35590 | { 6510, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733ce0002819ULL }, // Inst #6510 = VCVTPS2UQQZ256rmbk |
| 35591 | { 6509, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713ce0002819ULL }, // Inst #6509 = VCVTPS2UQQZ256rmb |
| 35592 | { 6508, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13ce0002819ULL }, // Inst #6508 = VCVTPS2UQQZ256rm |
| 35593 | { 6507, 3, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0x863ce0002829ULL }, // Inst #6507 = VCVTPS2UQQZ128rrkz |
| 35594 | { 6506, 4, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0x823ce0002829ULL }, // Inst #6506 = VCVTPS2UQQZ128rrk |
| 35595 | { 6505, 2, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x803ce0002829ULL }, // Inst #6505 = VCVTPS2UQQZ128rr |
| 35596 | { 6504, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863ce0002819ULL }, // Inst #6504 = VCVTPS2UQQZ128rmkz |
| 35597 | { 6503, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823ce0002819ULL }, // Inst #6503 = VCVTPS2UQQZ128rmk |
| 35598 | { 6502, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763ce0002819ULL }, // Inst #6502 = VCVTPS2UQQZ128rmbkz |
| 35599 | { 6501, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723ce0002819ULL }, // Inst #6501 = VCVTPS2UQQZ128rmbk |
| 35600 | { 6500, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703ce0002819ULL }, // Inst #6500 = VCVTPS2UQQZ128rmb |
| 35601 | { 6499, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803ce0002819ULL }, // Inst #6499 = VCVTPS2UQQZ128rm |
| 35602 | { 6498, 3, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0002029ULL }, // Inst #6498 = VCVTPS2UDQZrrkz |
| 35603 | { 6497, 4, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0002029ULL }, // Inst #6497 = VCVTPS2UDQZrrk |
| 35604 | { 6496, 4, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2876, 0, 0x17e3ce0002029ULL }, // Inst #6496 = VCVTPS2UDQZrrbkz |
| 35605 | { 6495, 5, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2871, 0, 0x17a3ce0002029ULL }, // Inst #6495 = VCVTPS2UDQZrrbk |
| 35606 | { 6494, 3, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1783ce0002029ULL }, // Inst #6494 = VCVTPS2UDQZrrb |
| 35607 | { 6493, 2, 1, 0, 1255, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0002029ULL }, // Inst #6493 = VCVTPS2UDQZrr |
| 35608 | { 6492, 7, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0002019ULL }, // Inst #6492 = VCVTPS2UDQZrmkz |
| 35609 | { 6491, 8, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0002019ULL }, // Inst #6491 = VCVTPS2UDQZrmk |
| 35610 | { 6490, 7, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3ce0002019ULL }, // Inst #6490 = VCVTPS2UDQZrmbkz |
| 35611 | { 6489, 8, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3ce0002019ULL }, // Inst #6489 = VCVTPS2UDQZrmbk |
| 35612 | { 6488, 6, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783ce0002019ULL }, // Inst #6488 = VCVTPS2UDQZrmb |
| 35613 | { 6487, 6, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0002019ULL }, // Inst #6487 = VCVTPS2UDQZrm |
| 35614 | { 6486, 3, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2765, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0002029ULL }, // Inst #6486 = VCVTPS2UDQZ256rrkz |
| 35615 | { 6485, 4, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2761, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0002029ULL }, // Inst #6485 = VCVTPS2UDQZ256rrk |
| 35616 | { 6484, 2, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0002029ULL }, // Inst #6484 = VCVTPS2UDQZ256rr |
| 35617 | { 6483, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0002019ULL }, // Inst #6483 = VCVTPS2UDQZ256rmkz |
| 35618 | { 6482, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0002019ULL }, // Inst #6482 = VCVTPS2UDQZ256rmk |
| 35619 | { 6481, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773ce0002019ULL }, // Inst #6481 = VCVTPS2UDQZ256rmbkz |
| 35620 | { 6480, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733ce0002019ULL }, // Inst #6480 = VCVTPS2UDQZ256rmbk |
| 35621 | { 6479, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713ce0002019ULL }, // Inst #6479 = VCVTPS2UDQZ256rmb |
| 35622 | { 6478, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0002019ULL }, // Inst #6478 = VCVTPS2UDQZ256rm |
| 35623 | { 6477, 3, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0002029ULL }, // Inst #6477 = VCVTPS2UDQZ128rrkz |
| 35624 | { 6476, 4, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0002029ULL }, // Inst #6476 = VCVTPS2UDQZ128rrk |
| 35625 | { 6475, 2, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0002029ULL }, // Inst #6475 = VCVTPS2UDQZ128rr |
| 35626 | { 6474, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0002019ULL }, // Inst #6474 = VCVTPS2UDQZ128rmkz |
| 35627 | { 6473, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0002019ULL }, // Inst #6473 = VCVTPS2UDQZ128rmk |
| 35628 | { 6472, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763ce0002019ULL }, // Inst #6472 = VCVTPS2UDQZ128rmbkz |
| 35629 | { 6471, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723ce0002019ULL }, // Inst #6471 = VCVTPS2UDQZ128rmbk |
| 35630 | { 6470, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703ce0002019ULL }, // Inst #6470 = VCVTPS2UDQZ128rmb |
| 35631 | { 6469, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0002019ULL }, // Inst #6469 = VCVTPS2UDQZ128rm |
| 35632 | { 6468, 3, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2803, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3de0002829ULL }, // Inst #6468 = VCVTPS2QQZrrkz |
| 35633 | { 6467, 4, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2799, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3de0002829ULL }, // Inst #6467 = VCVTPS2QQZrrk |
| 35634 | { 6466, 4, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 3107, 0, 0x17e3de0002829ULL }, // Inst #6466 = VCVTPS2QQZrrbkz |
| 35635 | { 6465, 5, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 3102, 0, 0x17a3de0002829ULL }, // Inst #6465 = VCVTPS2QQZrrbk |
| 35636 | { 6464, 3, 1, 0, 1947, 1, 0, X86ImpOpBase + 78, 2935, 0, 0x1783de0002829ULL }, // Inst #6464 = VCVTPS2QQZrrb |
| 35637 | { 6463, 2, 1, 0, 1289, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83de0002829ULL }, // Inst #6463 = VCVTPS2QQZrr |
| 35638 | { 6462, 7, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3de0002819ULL }, // Inst #6462 = VCVTPS2QQZrmkz |
| 35639 | { 6461, 8, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3de0002819ULL }, // Inst #6461 = VCVTPS2QQZrmk |
| 35640 | { 6460, 7, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e3de0002819ULL }, // Inst #6460 = VCVTPS2QQZrmbkz |
| 35641 | { 6459, 8, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a3de0002819ULL }, // Inst #6459 = VCVTPS2QQZrmbk |
| 35642 | { 6458, 6, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x783de0002819ULL }, // Inst #6458 = VCVTPS2QQZrmb |
| 35643 | { 6457, 6, 1, 0, 1383, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83de0002819ULL }, // Inst #6457 = VCVTPS2QQZrm |
| 35644 | { 6456, 3, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2349, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73de0002829ULL }, // Inst #6456 = VCVTPS2QQZ256rrkz |
| 35645 | { 6455, 4, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2345, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33de0002829ULL }, // Inst #6455 = VCVTPS2QQZ256rrk |
| 35646 | { 6454, 2, 1, 0, 1284, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13de0002829ULL }, // Inst #6454 = VCVTPS2QQZ256rr |
| 35647 | { 6453, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73de0002819ULL }, // Inst #6453 = VCVTPS2QQZ256rmkz |
| 35648 | { 6452, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33de0002819ULL }, // Inst #6452 = VCVTPS2QQZ256rmk |
| 35649 | { 6451, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x773de0002819ULL }, // Inst #6451 = VCVTPS2QQZ256rmbkz |
| 35650 | { 6450, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x733de0002819ULL }, // Inst #6450 = VCVTPS2QQZ256rmbk |
| 35651 | { 6449, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x713de0002819ULL }, // Inst #6449 = VCVTPS2QQZ256rmb |
| 35652 | { 6448, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13de0002819ULL }, // Inst #6448 = VCVTPS2QQZ256rm |
| 35653 | { 6447, 3, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0x863de0002829ULL }, // Inst #6447 = VCVTPS2QQZ128rrkz |
| 35654 | { 6446, 4, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0x823de0002829ULL }, // Inst #6446 = VCVTPS2QQZ128rrk |
| 35655 | { 6445, 2, 1, 0, 1264, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x803de0002829ULL }, // Inst #6445 = VCVTPS2QQZ128rr |
| 35656 | { 6444, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863de0002819ULL }, // Inst #6444 = VCVTPS2QQZ128rmkz |
| 35657 | { 6443, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823de0002819ULL }, // Inst #6443 = VCVTPS2QQZ128rmk |
| 35658 | { 6442, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x763de0002819ULL }, // Inst #6442 = VCVTPS2QQZ128rmbkz |
| 35659 | { 6441, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x723de0002819ULL }, // Inst #6441 = VCVTPS2QQZ128rmbk |
| 35660 | { 6440, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x703de0002819ULL }, // Inst #6440 = VCVTPS2QQZ128rmb |
| 35661 | { 6439, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803de0002819ULL }, // Inst #6439 = VCVTPS2QQZ128rm |
| 35662 | { 6438, 3, 1, 0, 410, 1, 0, X86ImpOpBase + 78, 544, 0|(1ULL<<MCID::MayRaiseFPException), 0xea0046828ULL }, // Inst #6438 = VCVTPS2PHrr |
| 35663 | { 6437, 7, 0, 0, 409, 1, 0, X86ImpOpBase + 78, 1030, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0xea0046818ULL }, // Inst #6437 = VCVTPS2PHmr |
| 35664 | { 6436, 4, 1, 0, 412, 1, 0, X86ImpOpBase + 78, 3098, 0|(1ULL<<MCID::MayRaiseFPException), 0xce0ee0046828ULL }, // Inst #6436 = VCVTPS2PHZrrkz |
| 35665 | { 6435, 5, 1, 0, 412, 1, 0, X86ImpOpBase + 78, 3093, 0|(1ULL<<MCID::MayRaiseFPException), 0xca0ee0046828ULL }, // Inst #6435 = VCVTPS2PHZrrk |
| 35666 | { 6434, 4, 1, 0, 412, 1, 0, X86ImpOpBase + 78, 3098, 0, 0x7e0ef8046828ULL }, // Inst #6434 = VCVTPS2PHZrrbkz |
| 35667 | { 6433, 5, 1, 0, 412, 1, 0, X86ImpOpBase + 78, 3093, 0, 0x7a0ef8046828ULL }, // Inst #6433 = VCVTPS2PHZrrbk |
| 35668 | { 6432, 3, 1, 0, 2052, 1, 0, X86ImpOpBase + 78, 3090, 0, 0x780ef8046828ULL }, // Inst #6432 = VCVTPS2PHZrrb |
| 35669 | { 6431, 3, 1, 0, 2052, 1, 0, X86ImpOpBase + 78, 3090, 0|(1ULL<<MCID::MayRaiseFPException), 0xc80ee0046828ULL }, // Inst #6431 = VCVTPS2PHZrr |
| 35670 | { 6430, 8, 0, 0, 2087, 1, 0, X86ImpOpBase + 78, 3082, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0xca0ee0046818ULL }, // Inst #6430 = VCVTPS2PHZmrk |
| 35671 | { 6429, 7, 0, 0, 1272, 1, 0, X86ImpOpBase + 78, 3075, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0xc80ee0046818ULL }, // Inst #6429 = VCVTPS2PHZmr |
| 35672 | { 6428, 4, 1, 0, 2041, 1, 0, X86ImpOpBase + 78, 3071, 0|(1ULL<<MCID::MayRaiseFPException), 0xa70ee0046828ULL }, // Inst #6428 = VCVTPS2PHZ256rrkz |
| 35673 | { 6427, 5, 1, 0, 2041, 1, 0, X86ImpOpBase + 78, 3066, 0|(1ULL<<MCID::MayRaiseFPException), 0xa30ee0046828ULL }, // Inst #6427 = VCVTPS2PHZ256rrk |
| 35674 | { 6426, 3, 1, 0, 408, 1, 0, X86ImpOpBase + 78, 3063, 0|(1ULL<<MCID::MayRaiseFPException), 0xa10ee0046828ULL }, // Inst #6426 = VCVTPS2PHZ256rr |
| 35675 | { 6425, 8, 0, 0, 2086, 1, 0, X86ImpOpBase + 78, 3055, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0xa30ee0046818ULL }, // Inst #6425 = VCVTPS2PHZ256mrk |
| 35676 | { 6424, 7, 0, 0, 1271, 1, 0, X86ImpOpBase + 78, 3048, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0xa10ee0046818ULL }, // Inst #6424 = VCVTPS2PHZ256mr |
| 35677 | { 6423, 4, 1, 0, 2070, 1, 0, X86ImpOpBase + 78, 3044, 0|(1ULL<<MCID::MayRaiseFPException), 0x860ee0046828ULL }, // Inst #6423 = VCVTPS2PHZ128rrkz |
| 35678 | { 6422, 5, 1, 0, 2070, 1, 0, X86ImpOpBase + 78, 3039, 0|(1ULL<<MCID::MayRaiseFPException), 0x820ee0046828ULL }, // Inst #6422 = VCVTPS2PHZ128rrk |
| 35679 | { 6421, 3, 1, 0, 410, 1, 0, X86ImpOpBase + 78, 3036, 0|(1ULL<<MCID::MayRaiseFPException), 0x800ee0046828ULL }, // Inst #6421 = VCVTPS2PHZ128rr |
| 35680 | { 6420, 8, 0, 0, 2085, 1, 0, X86ImpOpBase + 78, 3028, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x820ee0046818ULL }, // Inst #6420 = VCVTPS2PHZ128mrk |
| 35681 | { 6419, 7, 0, 0, 1270, 1, 0, X86ImpOpBase + 78, 3021, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800ee0046818ULL }, // Inst #6419 = VCVTPS2PHZ128mr |
| 35682 | { 6418, 3, 1, 0, 408, 1, 0, X86ImpOpBase + 78, 3018, 0|(1ULL<<MCID::MayRaiseFPException), 0x10ea0046828ULL }, // Inst #6418 = VCVTPS2PHYrr |
| 35683 | { 6417, 7, 0, 0, 407, 1, 0, X86ImpOpBase + 78, 3011, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x10ea0046818ULL }, // Inst #6417 = VCVTPS2PHYmr |
| 35684 | { 6416, 3, 1, 0, 2058, 1, 0, X86ImpOpBase + 78, 2863, 0|(1ULL<<MCID::MayRaiseFPException), 0xee0ee0012829ULL }, // Inst #6416 = VCVTPS2PHXZrrkz |
| 35685 | { 6415, 4, 1, 0, 2058, 1, 0, X86ImpOpBase + 78, 2859, 0|(1ULL<<MCID::MayRaiseFPException), 0xea0ee0012829ULL }, // Inst #6415 = VCVTPS2PHXZrrk |
| 35686 | { 6414, 4, 1, 0, 2058, 1, 0, X86ImpOpBase + 78, 2855, 0, 0x17e0ee0012829ULL }, // Inst #6414 = VCVTPS2PHXZrrbkz |
| 35687 | { 6413, 5, 1, 0, 2058, 1, 0, X86ImpOpBase + 78, 2850, 0, 0x17a0ee0012829ULL }, // Inst #6413 = VCVTPS2PHXZrrbk |
| 35688 | { 6412, 3, 1, 0, 2051, 1, 0, X86ImpOpBase + 78, 2847, 0, 0x1780ee0012829ULL }, // Inst #6412 = VCVTPS2PHXZrrb |
| 35689 | { 6411, 2, 1, 0, 2051, 1, 0, X86ImpOpBase + 78, 2845, 0|(1ULL<<MCID::MayRaiseFPException), 0xe80ee0012829ULL }, // Inst #6411 = VCVTPS2PHXZrr |
| 35690 | { 6410, 7, 1, 0, 2047, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee0ee0012819ULL }, // Inst #6410 = VCVTPS2PHXZrmkz |
| 35691 | { 6409, 8, 1, 0, 2047, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea0ee0012819ULL }, // Inst #6409 = VCVTPS2PHXZrmk |
| 35692 | { 6408, 7, 1, 0, 2047, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e0ee0012819ULL }, // Inst #6408 = VCVTPS2PHXZrmbkz |
| 35693 | { 6407, 8, 1, 0, 2047, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a0ee0012819ULL }, // Inst #6407 = VCVTPS2PHXZrmbk |
| 35694 | { 6406, 6, 1, 0, 2084, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x780ee0012819ULL }, // Inst #6406 = VCVTPS2PHXZrmb |
| 35695 | { 6405, 6, 1, 0, 2084, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe80ee0012819ULL }, // Inst #6405 = VCVTPS2PHXZrm |
| 35696 | { 6404, 3, 1, 0, 2040, 1, 0, X86ImpOpBase + 78, 2827, 0|(1ULL<<MCID::MayRaiseFPException), 0xc70ee0012829ULL }, // Inst #6404 = VCVTPS2PHXZ256rrkz |
| 35697 | { 6403, 4, 1, 0, 2040, 1, 0, X86ImpOpBase + 78, 2823, 0|(1ULL<<MCID::MayRaiseFPException), 0xc30ee0012829ULL }, // Inst #6403 = VCVTPS2PHXZ256rrk |
| 35698 | { 6402, 2, 1, 0, 1777, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc10ee0012829ULL }, // Inst #6402 = VCVTPS2PHXZ256rr |
| 35699 | { 6401, 7, 1, 0, 2044, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc70ee0012819ULL }, // Inst #6401 = VCVTPS2PHXZ256rmkz |
| 35700 | { 6400, 8, 1, 0, 2044, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc30ee0012819ULL }, // Inst #6400 = VCVTPS2PHXZ256rmk |
| 35701 | { 6399, 7, 1, 0, 2044, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x770ee0012819ULL }, // Inst #6399 = VCVTPS2PHXZ256rmbkz |
| 35702 | { 6398, 8, 1, 0, 2044, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x730ee0012819ULL }, // Inst #6398 = VCVTPS2PHXZ256rmbk |
| 35703 | { 6397, 6, 1, 0, 2083, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x710ee0012819ULL }, // Inst #6397 = VCVTPS2PHXZ256rmb |
| 35704 | { 6396, 6, 1, 0, 2083, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc10ee0012819ULL }, // Inst #6396 = VCVTPS2PHXZ256rm |
| 35705 | { 6395, 3, 1, 0, 2069, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa60ee0012829ULL }, // Inst #6395 = VCVTPS2PHXZ128rrkz |
| 35706 | { 6394, 4, 1, 0, 2069, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa20ee0012829ULL }, // Inst #6394 = VCVTPS2PHXZ128rrk |
| 35707 | { 6393, 2, 1, 0, 1779, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa00ee0012829ULL }, // Inst #6393 = VCVTPS2PHXZ128rr |
| 35708 | { 6392, 7, 1, 0, 2082, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa60ee0012819ULL }, // Inst #6392 = VCVTPS2PHXZ128rmkz |
| 35709 | { 6391, 8, 1, 0, 2082, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa20ee0012819ULL }, // Inst #6391 = VCVTPS2PHXZ128rmk |
| 35710 | { 6390, 7, 1, 0, 2082, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x760ee0012819ULL }, // Inst #6390 = VCVTPS2PHXZ128rmbkz |
| 35711 | { 6389, 8, 1, 0, 2082, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x720ee0012819ULL }, // Inst #6389 = VCVTPS2PHXZ128rmbk |
| 35712 | { 6388, 6, 1, 0, 2034, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x700ee0012819ULL }, // Inst #6388 = VCVTPS2PHXZ128rmb |
| 35713 | { 6387, 6, 1, 0, 2034, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa00ee0012819ULL }, // Inst #6387 = VCVTPS2PHXZ128rm |
| 35714 | { 6386, 2, 1, 0, 1263, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d20002029ULL }, // Inst #6386 = VCVTPS2PDrr |
| 35715 | { 6385, 6, 1, 0, 1340, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d20002019ULL }, // Inst #6385 = VCVTPS2PDrm |
| 35716 | { 6384, 3, 1, 0, 402, 1, 0, X86ImpOpBase + 78, 2803, 0|(1ULL<<MCID::MayRaiseFPException), 0xce2d60002029ULL }, // Inst #6384 = VCVTPS2PDZrrkz |
| 35717 | { 6383, 4, 1, 0, 402, 1, 0, X86ImpOpBase + 78, 2799, 0|(1ULL<<MCID::MayRaiseFPException), 0xca2d60002029ULL }, // Inst #6383 = VCVTPS2PDZrrk |
| 35718 | { 6382, 3, 1, 0, 402, 1, 0, X86ImpOpBase + 78, 2803, 0, 0x7e2d60002029ULL }, // Inst #6382 = VCVTPS2PDZrrbkz |
| 35719 | { 6381, 4, 1, 0, 402, 1, 0, X86ImpOpBase + 78, 2799, 0, 0x7a2d60002029ULL }, // Inst #6381 = VCVTPS2PDZrrbk |
| 35720 | { 6380, 2, 1, 0, 402, 1, 0, X86ImpOpBase + 78, 2797, 0, 0x782d60002029ULL }, // Inst #6380 = VCVTPS2PDZrrb |
| 35721 | { 6379, 2, 1, 0, 1288, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc82d60002029ULL }, // Inst #6379 = VCVTPS2PDZrr |
| 35722 | { 6378, 7, 1, 0, 1368, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce2d60002019ULL }, // Inst #6378 = VCVTPS2PDZrmkz |
| 35723 | { 6377, 8, 1, 0, 1368, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca2d60002019ULL }, // Inst #6377 = VCVTPS2PDZrmk |
| 35724 | { 6376, 7, 1, 0, 1368, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2d60002019ULL }, // Inst #6376 = VCVTPS2PDZrmbkz |
| 35725 | { 6375, 8, 1, 0, 1368, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2d60002019ULL }, // Inst #6375 = VCVTPS2PDZrmbk |
| 35726 | { 6374, 6, 1, 0, 1368, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782d60002019ULL }, // Inst #6374 = VCVTPS2PDZrmb |
| 35727 | { 6373, 6, 1, 0, 1368, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc82d60002019ULL }, // Inst #6373 = VCVTPS2PDZrm |
| 35728 | { 6372, 3, 1, 0, 1283, 1, 0, X86ImpOpBase + 78, 2349, 0|(1ULL<<MCID::MayRaiseFPException), 0xa72d60002029ULL }, // Inst #6372 = VCVTPS2PDZ256rrkz |
| 35729 | { 6371, 4, 1, 0, 1283, 1, 0, X86ImpOpBase + 78, 2345, 0|(1ULL<<MCID::MayRaiseFPException), 0xa32d60002029ULL }, // Inst #6371 = VCVTPS2PDZ256rrk |
| 35730 | { 6370, 2, 1, 0, 1283, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa12d60002029ULL }, // Inst #6370 = VCVTPS2PDZ256rr |
| 35731 | { 6369, 7, 1, 0, 1367, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa72d60002019ULL }, // Inst #6369 = VCVTPS2PDZ256rmkz |
| 35732 | { 6368, 8, 1, 0, 1367, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa32d60002019ULL }, // Inst #6368 = VCVTPS2PDZ256rmk |
| 35733 | { 6367, 7, 1, 0, 1367, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772d60002019ULL }, // Inst #6367 = VCVTPS2PDZ256rmbkz |
| 35734 | { 6366, 8, 1, 0, 1367, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732d60002019ULL }, // Inst #6366 = VCVTPS2PDZ256rmbk |
| 35735 | { 6365, 6, 1, 0, 1367, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712d60002019ULL }, // Inst #6365 = VCVTPS2PDZ256rmb |
| 35736 | { 6364, 6, 1, 0, 1367, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa12d60002019ULL }, // Inst #6364 = VCVTPS2PDZ256rm |
| 35737 | { 6363, 3, 1, 0, 1263, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0x862d60002029ULL }, // Inst #6363 = VCVTPS2PDZ128rrkz |
| 35738 | { 6362, 4, 1, 0, 1263, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0x822d60002029ULL }, // Inst #6362 = VCVTPS2PDZ128rrk |
| 35739 | { 6361, 2, 1, 0, 1263, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x802d60002029ULL }, // Inst #6361 = VCVTPS2PDZ128rr |
| 35740 | { 6360, 7, 1, 0, 1356, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x862d60002019ULL }, // Inst #6360 = VCVTPS2PDZ128rmkz |
| 35741 | { 6359, 8, 1, 0, 1356, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x822d60002019ULL }, // Inst #6359 = VCVTPS2PDZ128rmk |
| 35742 | { 6358, 7, 1, 0, 1356, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762d60002019ULL }, // Inst #6358 = VCVTPS2PDZ128rmbkz |
| 35743 | { 6357, 8, 1, 0, 1356, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722d60002019ULL }, // Inst #6357 = VCVTPS2PDZ128rmbk |
| 35744 | { 6356, 6, 1, 0, 1356, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702d60002019ULL }, // Inst #6356 = VCVTPS2PDZ128rmb |
| 35745 | { 6355, 6, 1, 0, 1356, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x802d60002019ULL }, // Inst #6355 = VCVTPS2PDZ128rm |
| 35746 | { 6354, 2, 1, 0, 1283, 1, 0, X86ImpOpBase + 78, 2343, 0|(1ULL<<MCID::MayRaiseFPException), 0x12d20002029ULL }, // Inst #6354 = VCVTPS2PDYrr |
| 35747 | { 6353, 6, 1, 0, 1360, 1, 0, X86ImpOpBase + 78, 2189, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x12d20002019ULL }, // Inst #6353 = VCVTPS2PDYrm |
| 35748 | { 6352, 2, 1, 0, 1010, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2db0002829ULL }, // Inst #6352 = VCVTPS2DQrr |
| 35749 | { 6351, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2db0002819ULL }, // Inst #6351 = VCVTPS2DQrm |
| 35750 | { 6350, 3, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0002829ULL }, // Inst #6350 = VCVTPS2DQZrrkz |
| 35751 | { 6349, 4, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0002829ULL }, // Inst #6349 = VCVTPS2DQZrrk |
| 35752 | { 6348, 4, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2876, 0, 0x17e2de0002829ULL }, // Inst #6348 = VCVTPS2DQZrrbkz |
| 35753 | { 6347, 5, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2871, 0, 0x17a2de0002829ULL }, // Inst #6347 = VCVTPS2DQZrrbk |
| 35754 | { 6346, 3, 1, 0, 1824, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1782de0002829ULL }, // Inst #6346 = VCVTPS2DQZrrb |
| 35755 | { 6345, 2, 1, 0, 1255, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0002829ULL }, // Inst #6345 = VCVTPS2DQZrr |
| 35756 | { 6344, 7, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0002819ULL }, // Inst #6344 = VCVTPS2DQZrmkz |
| 35757 | { 6343, 8, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0002819ULL }, // Inst #6343 = VCVTPS2DQZrmk |
| 35758 | { 6342, 7, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2de0002819ULL }, // Inst #6342 = VCVTPS2DQZrmbkz |
| 35759 | { 6341, 8, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2de0002819ULL }, // Inst #6341 = VCVTPS2DQZrmbk |
| 35760 | { 6340, 6, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782de0002819ULL }, // Inst #6340 = VCVTPS2DQZrmb |
| 35761 | { 6339, 6, 1, 0, 1372, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0002819ULL }, // Inst #6339 = VCVTPS2DQZrm |
| 35762 | { 6338, 3, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2765, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0002829ULL }, // Inst #6338 = VCVTPS2DQZ256rrkz |
| 35763 | { 6337, 4, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2761, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0002829ULL }, // Inst #6337 = VCVTPS2DQZ256rrk |
| 35764 | { 6336, 2, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0002829ULL }, // Inst #6336 = VCVTPS2DQZ256rr |
| 35765 | { 6335, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0002819ULL }, // Inst #6335 = VCVTPS2DQZ256rmkz |
| 35766 | { 6334, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0002819ULL }, // Inst #6334 = VCVTPS2DQZ256rmk |
| 35767 | { 6333, 7, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772de0002819ULL }, // Inst #6333 = VCVTPS2DQZ256rmbkz |
| 35768 | { 6332, 8, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732de0002819ULL }, // Inst #6332 = VCVTPS2DQZ256rmbk |
| 35769 | { 6331, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712de0002819ULL }, // Inst #6331 = VCVTPS2DQZ256rmb |
| 35770 | { 6330, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0002819ULL }, // Inst #6330 = VCVTPS2DQZ256rm |
| 35771 | { 6329, 3, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0002829ULL }, // Inst #6329 = VCVTPS2DQZ128rrkz |
| 35772 | { 6328, 4, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0002829ULL }, // Inst #6328 = VCVTPS2DQZ128rrk |
| 35773 | { 6327, 2, 1, 0, 1253, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0002829ULL }, // Inst #6327 = VCVTPS2DQZ128rr |
| 35774 | { 6326, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0002819ULL }, // Inst #6326 = VCVTPS2DQZ128rmkz |
| 35775 | { 6325, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0002819ULL }, // Inst #6325 = VCVTPS2DQZ128rmk |
| 35776 | { 6324, 7, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762de0002819ULL }, // Inst #6324 = VCVTPS2DQZ128rmbkz |
| 35777 | { 6323, 8, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722de0002819ULL }, // Inst #6323 = VCVTPS2DQZ128rmbk |
| 35778 | { 6322, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702de0002819ULL }, // Inst #6322 = VCVTPS2DQZ128rmb |
| 35779 | { 6321, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0002819ULL }, // Inst #6321 = VCVTPS2DQZ128rm |
| 35780 | { 6320, 2, 1, 0, 1252, 1, 0, X86ImpOpBase + 78, 2866, 0|(1ULL<<MCID::MayRaiseFPException), 0x12db0002829ULL }, // Inst #6320 = VCVTPS2DQYrr |
| 35781 | { 6319, 6, 1, 0, 1371, 1, 0, X86ImpOpBase + 78, 2189, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x12db0002819ULL }, // Inst #6319 = VCVTPS2DQYrm |
| 35782 | { 6318, 3, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3008, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0012829ULL }, // Inst #6318 = VCVTPH2WZrrkz |
| 35783 | { 6317, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3004, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0012829ULL }, // Inst #6317 = VCVTPH2WZrrk |
| 35784 | { 6316, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3000, 0, 0x15e3ee0012829ULL }, // Inst #6316 = VCVTPH2WZrrbkz |
| 35785 | { 6315, 5, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 2995, 0, 0x15a3ee0012829ULL }, // Inst #6315 = VCVTPH2WZrrbk |
| 35786 | { 6314, 3, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1583ee0012829ULL }, // Inst #6314 = VCVTPH2WZrrb |
| 35787 | { 6313, 2, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0012829ULL }, // Inst #6313 = VCVTPH2WZrr |
| 35788 | { 6312, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0012819ULL }, // Inst #6312 = VCVTPH2WZrmkz |
| 35789 | { 6311, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0012819ULL }, // Inst #6311 = VCVTPH2WZrmk |
| 35790 | { 6310, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ee0012819ULL }, // Inst #6310 = VCVTPH2WZrmbkz |
| 35791 | { 6309, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ee0012819ULL }, // Inst #6309 = VCVTPH2WZrmbk |
| 35792 | { 6308, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ee0012819ULL }, // Inst #6308 = VCVTPH2WZrmb |
| 35793 | { 6307, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0012819ULL }, // Inst #6307 = VCVTPH2WZrm |
| 35794 | { 6306, 3, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2977, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0012829ULL }, // Inst #6306 = VCVTPH2WZ256rrkz |
| 35795 | { 6305, 4, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2973, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0012829ULL }, // Inst #6305 = VCVTPH2WZ256rrk |
| 35796 | { 6304, 2, 1, 0, 1738, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0012829ULL }, // Inst #6304 = VCVTPH2WZ256rr |
| 35797 | { 6303, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0012819ULL }, // Inst #6303 = VCVTPH2WZ256rmkz |
| 35798 | { 6302, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0012819ULL }, // Inst #6302 = VCVTPH2WZ256rmk |
| 35799 | { 6301, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ee0012819ULL }, // Inst #6301 = VCVTPH2WZ256rmbkz |
| 35800 | { 6300, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ee0012819ULL }, // Inst #6300 = VCVTPH2WZ256rmbk |
| 35801 | { 6299, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ee0012819ULL }, // Inst #6299 = VCVTPH2WZ256rmb |
| 35802 | { 6298, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0012819ULL }, // Inst #6298 = VCVTPH2WZ256rm |
| 35803 | { 6297, 3, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2970, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0012829ULL }, // Inst #6297 = VCVTPH2WZ128rrkz |
| 35804 | { 6296, 4, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2966, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0012829ULL }, // Inst #6296 = VCVTPH2WZ128rrk |
| 35805 | { 6295, 2, 1, 0, 1737, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0012829ULL }, // Inst #6295 = VCVTPH2WZ128rr |
| 35806 | { 6294, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0012819ULL }, // Inst #6294 = VCVTPH2WZ128rmkz |
| 35807 | { 6293, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0012819ULL }, // Inst #6293 = VCVTPH2WZ128rmk |
| 35808 | { 6292, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ee0012819ULL }, // Inst #6292 = VCVTPH2WZ128rmbkz |
| 35809 | { 6291, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ee0012819ULL }, // Inst #6291 = VCVTPH2WZ128rmbk |
| 35810 | { 6290, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ee0012819ULL }, // Inst #6290 = VCVTPH2WZ128rmb |
| 35811 | { 6289, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0012819ULL }, // Inst #6289 = VCVTPH2WZ128rm |
| 35812 | { 6288, 3, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3008, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0012029ULL }, // Inst #6288 = VCVTPH2UWZrrkz |
| 35813 | { 6287, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3004, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0012029ULL }, // Inst #6287 = VCVTPH2UWZrrk |
| 35814 | { 6286, 4, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 3000, 0, 0x15e3ee0012029ULL }, // Inst #6286 = VCVTPH2UWZrrbkz |
| 35815 | { 6285, 5, 1, 0, 1889, 1, 0, X86ImpOpBase + 78, 2995, 0, 0x15a3ee0012029ULL }, // Inst #6285 = VCVTPH2UWZrrbk |
| 35816 | { 6284, 3, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1583ee0012029ULL }, // Inst #6284 = VCVTPH2UWZrrb |
| 35817 | { 6283, 2, 1, 0, 1882, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0012029ULL }, // Inst #6283 = VCVTPH2UWZrr |
| 35818 | { 6282, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ee0012019ULL }, // Inst #6282 = VCVTPH2UWZrmkz |
| 35819 | { 6281, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ee0012019ULL }, // Inst #6281 = VCVTPH2UWZrmk |
| 35820 | { 6280, 7, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2988, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ee0012019ULL }, // Inst #6280 = VCVTPH2UWZrmbkz |
| 35821 | { 6279, 8, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ee0012019ULL }, // Inst #6279 = VCVTPH2UWZrmbk |
| 35822 | { 6278, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ee0012019ULL }, // Inst #6278 = VCVTPH2UWZrmb |
| 35823 | { 6277, 6, 1, 0, 393, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ee0012019ULL }, // Inst #6277 = VCVTPH2UWZrm |
| 35824 | { 6276, 3, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2977, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0012029ULL }, // Inst #6276 = VCVTPH2UWZ256rrkz |
| 35825 | { 6275, 4, 1, 0, 1868, 1, 0, X86ImpOpBase + 78, 2973, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0012029ULL }, // Inst #6275 = VCVTPH2UWZ256rrk |
| 35826 | { 6274, 2, 1, 0, 1738, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0012029ULL }, // Inst #6274 = VCVTPH2UWZ256rr |
| 35827 | { 6273, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ee0012019ULL }, // Inst #6273 = VCVTPH2UWZ256rmkz |
| 35828 | { 6272, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ee0012019ULL }, // Inst #6272 = VCVTPH2UWZ256rmk |
| 35829 | { 6271, 7, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ee0012019ULL }, // Inst #6271 = VCVTPH2UWZ256rmbkz |
| 35830 | { 6270, 8, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ee0012019ULL }, // Inst #6270 = VCVTPH2UWZ256rmbk |
| 35831 | { 6269, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ee0012019ULL }, // Inst #6269 = VCVTPH2UWZ256rmb |
| 35832 | { 6268, 6, 1, 0, 391, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ee0012019ULL }, // Inst #6268 = VCVTPH2UWZ256rm |
| 35833 | { 6267, 3, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2970, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0012029ULL }, // Inst #6267 = VCVTPH2UWZ128rrkz |
| 35834 | { 6266, 4, 1, 0, 1867, 1, 0, X86ImpOpBase + 78, 2966, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0012029ULL }, // Inst #6266 = VCVTPH2UWZ128rrk |
| 35835 | { 6265, 2, 1, 0, 1737, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0012029ULL }, // Inst #6265 = VCVTPH2UWZ128rr |
| 35836 | { 6264, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ee0012019ULL }, // Inst #6264 = VCVTPH2UWZ128rmkz |
| 35837 | { 6263, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ee0012019ULL }, // Inst #6263 = VCVTPH2UWZ128rmk |
| 35838 | { 6262, 7, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ee0012019ULL }, // Inst #6262 = VCVTPH2UWZ128rmbkz |
| 35839 | { 6261, 8, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ee0012019ULL }, // Inst #6261 = VCVTPH2UWZ128rmbk |
| 35840 | { 6260, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ee0012019ULL }, // Inst #6260 = VCVTPH2UWZ128rmb |
| 35841 | { 6259, 6, 1, 0, 94, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ee0012019ULL }, // Inst #6259 = VCVTPH2UWZ128rm |
| 35842 | { 6258, 3, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2356, 0|(1ULL<<MCID::MayRaiseFPException), 0xae3ce0012829ULL }, // Inst #6258 = VCVTPH2UQQZrrkz |
| 35843 | { 6257, 4, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2352, 0|(1ULL<<MCID::MayRaiseFPException), 0xaa3ce0012829ULL }, // Inst #6257 = VCVTPH2UQQZrrk |
| 35844 | { 6256, 4, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2962, 0, 0x15e3ce0012829ULL }, // Inst #6256 = VCVTPH2UQQZrrbkz |
| 35845 | { 6255, 5, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2957, 0, 0x15a3ce0012829ULL }, // Inst #6255 = VCVTPH2UQQZrrbk |
| 35846 | { 6254, 3, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2954, 0, 0x1583ce0012829ULL }, // Inst #6254 = VCVTPH2UQQZrrb |
| 35847 | { 6253, 2, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2280, 0|(1ULL<<MCID::MayRaiseFPException), 0xa83ce0012829ULL }, // Inst #6253 = VCVTPH2UQQZrr |
| 35848 | { 6252, 7, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae3ce0012819ULL }, // Inst #6252 = VCVTPH2UQQZrmkz |
| 35849 | { 6251, 8, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaa3ce0012819ULL }, // Inst #6251 = VCVTPH2UQQZrmk |
| 35850 | { 6250, 7, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ce0012819ULL }, // Inst #6250 = VCVTPH2UQQZrmbkz |
| 35851 | { 6249, 8, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ce0012819ULL }, // Inst #6249 = VCVTPH2UQQZrmbk |
| 35852 | { 6248, 6, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ce0012819ULL }, // Inst #6248 = VCVTPH2UQQZrmb |
| 35853 | { 6247, 6, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa83ce0012819ULL }, // Inst #6247 = VCVTPH2UQQZrm |
| 35854 | { 6246, 3, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2349, 0|(1ULL<<MCID::MayRaiseFPException), 0x873ce0012829ULL }, // Inst #6246 = VCVTPH2UQQZ256rrkz |
| 35855 | { 6245, 4, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2345, 0|(1ULL<<MCID::MayRaiseFPException), 0x833ce0012829ULL }, // Inst #6245 = VCVTPH2UQQZ256rrk |
| 35856 | { 6244, 2, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0x813ce0012829ULL }, // Inst #6244 = VCVTPH2UQQZ256rr |
| 35857 | { 6243, 7, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x873ce0012819ULL }, // Inst #6243 = VCVTPH2UQQZ256rmkz |
| 35858 | { 6242, 8, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x833ce0012819ULL }, // Inst #6242 = VCVTPH2UQQZ256rmk |
| 35859 | { 6241, 7, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ce0012819ULL }, // Inst #6241 = VCVTPH2UQQZ256rmbkz |
| 35860 | { 6240, 8, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ce0012819ULL }, // Inst #6240 = VCVTPH2UQQZ256rmbk |
| 35861 | { 6239, 6, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ce0012819ULL }, // Inst #6239 = VCVTPH2UQQZ256rmb |
| 35862 | { 6238, 6, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x813ce0012819ULL }, // Inst #6238 = VCVTPH2UQQZ256rm |
| 35863 | { 6237, 3, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0x663ce0012829ULL }, // Inst #6237 = VCVTPH2UQQZ128rrkz |
| 35864 | { 6236, 4, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0x623ce0012829ULL }, // Inst #6236 = VCVTPH2UQQZ128rrk |
| 35865 | { 6235, 2, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x603ce0012829ULL }, // Inst #6235 = VCVTPH2UQQZ128rr |
| 35866 | { 6234, 7, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x663ce0012819ULL }, // Inst #6234 = VCVTPH2UQQZ128rmkz |
| 35867 | { 6233, 8, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x623ce0012819ULL }, // Inst #6233 = VCVTPH2UQQZ128rmk |
| 35868 | { 6232, 7, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ce0012819ULL }, // Inst #6232 = VCVTPH2UQQZ128rmbkz |
| 35869 | { 6231, 8, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ce0012819ULL }, // Inst #6231 = VCVTPH2UQQZ128rmbk |
| 35870 | { 6230, 6, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ce0012819ULL }, // Inst #6230 = VCVTPH2UQQZ128rmb |
| 35871 | { 6229, 6, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603ce0012819ULL }, // Inst #6229 = VCVTPH2UQQZ128rm |
| 35872 | { 6228, 3, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2951, 0|(1ULL<<MCID::MayRaiseFPException), 0xce3ce0012029ULL }, // Inst #6228 = VCVTPH2UDQZrrkz |
| 35873 | { 6227, 4, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2947, 0|(1ULL<<MCID::MayRaiseFPException), 0xca3ce0012029ULL }, // Inst #6227 = VCVTPH2UDQZrrk |
| 35874 | { 6226, 4, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2943, 0, 0x15e3ce0012029ULL }, // Inst #6226 = VCVTPH2UDQZrrbkz |
| 35875 | { 6225, 5, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2938, 0, 0x15a3ce0012029ULL }, // Inst #6225 = VCVTPH2UDQZrrbk |
| 35876 | { 6224, 3, 1, 0, 2048, 1, 0, X86ImpOpBase + 78, 2935, 0, 0x1583ce0012029ULL }, // Inst #6224 = VCVTPH2UDQZrrb |
| 35877 | { 6223, 2, 1, 0, 2048, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc83ce0012029ULL }, // Inst #6223 = VCVTPH2UDQZrr |
| 35878 | { 6222, 7, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce3ce0012019ULL }, // Inst #6222 = VCVTPH2UDQZrmkz |
| 35879 | { 6221, 8, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca3ce0012019ULL }, // Inst #6221 = VCVTPH2UDQZrmk |
| 35880 | { 6220, 7, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3ce0012019ULL }, // Inst #6220 = VCVTPH2UDQZrmbkz |
| 35881 | { 6219, 8, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3ce0012019ULL }, // Inst #6219 = VCVTPH2UDQZrmbk |
| 35882 | { 6218, 6, 1, 0, 1992, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583ce0012019ULL }, // Inst #6218 = VCVTPH2UDQZrmb |
| 35883 | { 6217, 6, 1, 0, 1992, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc83ce0012019ULL }, // Inst #6217 = VCVTPH2UDQZrm |
| 35884 | { 6216, 3, 1, 0, 2037, 1, 0, X86ImpOpBase + 78, 2256, 0|(1ULL<<MCID::MayRaiseFPException), 0xa73ce0012029ULL }, // Inst #6216 = VCVTPH2UDQZ256rrkz |
| 35885 | { 6215, 4, 1, 0, 2037, 1, 0, X86ImpOpBase + 78, 2252, 0|(1ULL<<MCID::MayRaiseFPException), 0xa33ce0012029ULL }, // Inst #6215 = VCVTPH2UDQZ256rrk |
| 35886 | { 6214, 2, 1, 0, 1775, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa13ce0012029ULL }, // Inst #6214 = VCVTPH2UDQZ256rr |
| 35887 | { 6213, 7, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa73ce0012019ULL }, // Inst #6213 = VCVTPH2UDQZ256rmkz |
| 35888 | { 6212, 8, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa33ce0012019ULL }, // Inst #6212 = VCVTPH2UDQZ256rmk |
| 35889 | { 6211, 7, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573ce0012019ULL }, // Inst #6211 = VCVTPH2UDQZ256rmbkz |
| 35890 | { 6210, 8, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533ce0012019ULL }, // Inst #6210 = VCVTPH2UDQZ256rmbk |
| 35891 | { 6209, 6, 1, 0, 1988, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513ce0012019ULL }, // Inst #6209 = VCVTPH2UDQZ256rmb |
| 35892 | { 6208, 6, 1, 0, 1988, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa13ce0012019ULL }, // Inst #6208 = VCVTPH2UDQZ256rm |
| 35893 | { 6207, 3, 1, 0, 2036, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0x863ce0012029ULL }, // Inst #6207 = VCVTPH2UDQZ128rrkz |
| 35894 | { 6206, 4, 1, 0, 2036, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0x823ce0012029ULL }, // Inst #6206 = VCVTPH2UDQZ128rrk |
| 35895 | { 6205, 2, 1, 0, 1774, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x803ce0012029ULL }, // Inst #6205 = VCVTPH2UDQZ128rr |
| 35896 | { 6204, 7, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x863ce0012019ULL }, // Inst #6204 = VCVTPH2UDQZ128rmkz |
| 35897 | { 6203, 8, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x823ce0012019ULL }, // Inst #6203 = VCVTPH2UDQZ128rmk |
| 35898 | { 6202, 7, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563ce0012019ULL }, // Inst #6202 = VCVTPH2UDQZ128rmbkz |
| 35899 | { 6201, 8, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523ce0012019ULL }, // Inst #6201 = VCVTPH2UDQZ128rmbk |
| 35900 | { 6200, 6, 1, 0, 2033, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503ce0012019ULL }, // Inst #6200 = VCVTPH2UDQZ128rmb |
| 35901 | { 6199, 6, 1, 0, 2033, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x803ce0012019ULL }, // Inst #6199 = VCVTPH2UDQZ128rm |
| 35902 | { 6198, 3, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2356, 0|(1ULL<<MCID::MayRaiseFPException), 0xae3de0012829ULL }, // Inst #6198 = VCVTPH2QQZrrkz |
| 35903 | { 6197, 4, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2352, 0|(1ULL<<MCID::MayRaiseFPException), 0xaa3de0012829ULL }, // Inst #6197 = VCVTPH2QQZrrk |
| 35904 | { 6196, 4, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2962, 0, 0x15e3de0012829ULL }, // Inst #6196 = VCVTPH2QQZrrbkz |
| 35905 | { 6195, 5, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2957, 0, 0x15a3de0012829ULL }, // Inst #6195 = VCVTPH2QQZrrbk |
| 35906 | { 6194, 3, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2954, 0, 0x1583de0012829ULL }, // Inst #6194 = VCVTPH2QQZrrb |
| 35907 | { 6193, 2, 1, 0, 398, 1, 0, X86ImpOpBase + 78, 2280, 0|(1ULL<<MCID::MayRaiseFPException), 0xa83de0012829ULL }, // Inst #6193 = VCVTPH2QQZrr |
| 35908 | { 6192, 7, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae3de0012819ULL }, // Inst #6192 = VCVTPH2QQZrmkz |
| 35909 | { 6191, 8, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaa3de0012819ULL }, // Inst #6191 = VCVTPH2QQZrmk |
| 35910 | { 6190, 7, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e3de0012819ULL }, // Inst #6190 = VCVTPH2QQZrmbkz |
| 35911 | { 6189, 8, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a3de0012819ULL }, // Inst #6189 = VCVTPH2QQZrmbk |
| 35912 | { 6188, 6, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x583de0012819ULL }, // Inst #6188 = VCVTPH2QQZrmb |
| 35913 | { 6187, 6, 1, 0, 397, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa83de0012819ULL }, // Inst #6187 = VCVTPH2QQZrm |
| 35914 | { 6186, 3, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2349, 0|(1ULL<<MCID::MayRaiseFPException), 0x873de0012829ULL }, // Inst #6186 = VCVTPH2QQZ256rrkz |
| 35915 | { 6185, 4, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2345, 0|(1ULL<<MCID::MayRaiseFPException), 0x833de0012829ULL }, // Inst #6185 = VCVTPH2QQZ256rrk |
| 35916 | { 6184, 2, 1, 0, 2080, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0x813de0012829ULL }, // Inst #6184 = VCVTPH2QQZ256rr |
| 35917 | { 6183, 7, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x873de0012819ULL }, // Inst #6183 = VCVTPH2QQZ256rmkz |
| 35918 | { 6182, 8, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x833de0012819ULL }, // Inst #6182 = VCVTPH2QQZ256rmk |
| 35919 | { 6181, 7, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x573de0012819ULL }, // Inst #6181 = VCVTPH2QQZ256rmbkz |
| 35920 | { 6180, 8, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x533de0012819ULL }, // Inst #6180 = VCVTPH2QQZ256rmbk |
| 35921 | { 6179, 6, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x513de0012819ULL }, // Inst #6179 = VCVTPH2QQZ256rmb |
| 35922 | { 6178, 6, 1, 0, 2081, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x813de0012819ULL }, // Inst #6178 = VCVTPH2QQZ256rm |
| 35923 | { 6177, 3, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0x663de0012829ULL }, // Inst #6177 = VCVTPH2QQZ128rrkz |
| 35924 | { 6176, 4, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0x623de0012829ULL }, // Inst #6176 = VCVTPH2QQZ128rrk |
| 35925 | { 6175, 2, 1, 0, 2079, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x603de0012829ULL }, // Inst #6175 = VCVTPH2QQZ128rr |
| 35926 | { 6174, 7, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x663de0012819ULL }, // Inst #6174 = VCVTPH2QQZ128rmkz |
| 35927 | { 6173, 8, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x623de0012819ULL }, // Inst #6173 = VCVTPH2QQZ128rmk |
| 35928 | { 6172, 7, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x563de0012819ULL }, // Inst #6172 = VCVTPH2QQZ128rmbkz |
| 35929 | { 6171, 8, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x523de0012819ULL }, // Inst #6171 = VCVTPH2QQZ128rmbk |
| 35930 | { 6170, 6, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x503de0012819ULL }, // Inst #6170 = VCVTPH2QQZ128rmb |
| 35931 | { 6169, 6, 1, 0, 2078, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x603de0012819ULL }, // Inst #6169 = VCVTPH2QQZ128rm |
| 35932 | { 6168, 2, 1, 0, 354, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x9a0004829ULL }, // Inst #6168 = VCVTPH2PSrr |
| 35933 | { 6167, 6, 1, 0, 404, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a0004819ULL }, // Inst #6167 = VCVTPH2PSrm |
| 35934 | { 6166, 3, 1, 0, 406, 1, 0, X86ImpOpBase + 78, 2951, 0|(1ULL<<MCID::MayRaiseFPException), 0xce09e0004829ULL }, // Inst #6166 = VCVTPH2PSZrrkz |
| 35935 | { 6165, 4, 1, 0, 406, 1, 0, X86ImpOpBase + 78, 2947, 0|(1ULL<<MCID::MayRaiseFPException), 0xca09e0004829ULL }, // Inst #6165 = VCVTPH2PSZrrk |
| 35936 | { 6164, 3, 1, 0, 406, 1, 0, X86ImpOpBase + 78, 2951, 0, 0x7e09e0004829ULL }, // Inst #6164 = VCVTPH2PSZrrbkz |
| 35937 | { 6163, 4, 1, 0, 406, 1, 0, X86ImpOpBase + 78, 2947, 0, 0x7a09e0004829ULL }, // Inst #6163 = VCVTPH2PSZrrbk |
| 35938 | { 6162, 2, 1, 0, 2050, 1, 0, X86ImpOpBase + 78, 2797, 0, 0x7809e0004829ULL }, // Inst #6162 = VCVTPH2PSZrrb |
| 35939 | { 6161, 2, 1, 0, 2050, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc809e0004829ULL }, // Inst #6161 = VCVTPH2PSZrr |
| 35940 | { 6160, 7, 1, 0, 1366, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce09e0004819ULL }, // Inst #6160 = VCVTPH2PSZrmkz |
| 35941 | { 6159, 8, 1, 0, 1366, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca09e0004819ULL }, // Inst #6159 = VCVTPH2PSZrmk |
| 35942 | { 6158, 6, 1, 0, 2076, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc809e0004819ULL }, // Inst #6158 = VCVTPH2PSZrm |
| 35943 | { 6157, 3, 1, 0, 2039, 1, 0, X86ImpOpBase + 78, 2256, 0|(1ULL<<MCID::MayRaiseFPException), 0xa709e0004829ULL }, // Inst #6157 = VCVTPH2PSZ256rrkz |
| 35944 | { 6156, 4, 1, 0, 2039, 1, 0, X86ImpOpBase + 78, 2252, 0|(1ULL<<MCID::MayRaiseFPException), 0xa309e0004829ULL }, // Inst #6156 = VCVTPH2PSZ256rrk |
| 35945 | { 6155, 2, 1, 0, 353, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa109e0004829ULL }, // Inst #6155 = VCVTPH2PSZ256rr |
| 35946 | { 6154, 7, 1, 0, 2072, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa709e0004819ULL }, // Inst #6154 = VCVTPH2PSZ256rmkz |
| 35947 | { 6153, 8, 1, 0, 2072, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa309e0004819ULL }, // Inst #6153 = VCVTPH2PSZ256rmk |
| 35948 | { 6152, 6, 1, 0, 1365, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa109e0004819ULL }, // Inst #6152 = VCVTPH2PSZ256rm |
| 35949 | { 6151, 3, 1, 0, 2068, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0x8609e0004829ULL }, // Inst #6151 = VCVTPH2PSZ128rrkz |
| 35950 | { 6150, 4, 1, 0, 2068, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0x8209e0004829ULL }, // Inst #6150 = VCVTPH2PSZ128rrk |
| 35951 | { 6149, 2, 1, 0, 354, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x8009e0004829ULL }, // Inst #6149 = VCVTPH2PSZ128rr |
| 35952 | { 6148, 7, 1, 0, 2071, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8609e0004819ULL }, // Inst #6148 = VCVTPH2PSZ128rmkz |
| 35953 | { 6147, 8, 1, 0, 2071, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8209e0004819ULL }, // Inst #6147 = VCVTPH2PSZ128rmk |
| 35954 | { 6146, 6, 1, 0, 1354, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8009e0004819ULL }, // Inst #6146 = VCVTPH2PSZ128rm |
| 35955 | { 6145, 2, 1, 0, 353, 1, 0, X86ImpOpBase + 78, 2343, 0|(1ULL<<MCID::MayRaiseFPException), 0x109a0004829ULL }, // Inst #6145 = VCVTPH2PSYrr |
| 35956 | { 6144, 6, 1, 0, 403, 1, 0, X86ImpOpBase + 78, 2189, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x109a0004819ULL }, // Inst #6144 = VCVTPH2PSYrm |
| 35957 | { 6143, 3, 1, 0, 2057, 1, 0, X86ImpOpBase + 78, 2951, 0|(1ULL<<MCID::MayRaiseFPException), 0xce09e0014829ULL }, // Inst #6143 = VCVTPH2PSXZrrkz |
| 35958 | { 6142, 4, 1, 0, 2057, 1, 0, X86ImpOpBase + 78, 2947, 0|(1ULL<<MCID::MayRaiseFPException), 0xca09e0014829ULL }, // Inst #6142 = VCVTPH2PSXZrrk |
| 35959 | { 6141, 3, 1, 0, 2057, 1, 0, X86ImpOpBase + 78, 2951, 0, 0x5e09e0014829ULL }, // Inst #6141 = VCVTPH2PSXZrrbkz |
| 35960 | { 6140, 4, 1, 0, 2057, 1, 0, X86ImpOpBase + 78, 2947, 0, 0x5a09e0014829ULL }, // Inst #6140 = VCVTPH2PSXZrrbk |
| 35961 | { 6139, 2, 1, 0, 2049, 1, 0, X86ImpOpBase + 78, 2797, 0, 0x5809e0014829ULL }, // Inst #6139 = VCVTPH2PSXZrrb |
| 35962 | { 6138, 2, 1, 0, 2049, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc809e0014829ULL }, // Inst #6138 = VCVTPH2PSXZrr |
| 35963 | { 6137, 7, 1, 0, 2046, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce09e0014819ULL }, // Inst #6137 = VCVTPH2PSXZrmkz |
| 35964 | { 6136, 8, 1, 0, 2046, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca09e0014819ULL }, // Inst #6136 = VCVTPH2PSXZrmk |
| 35965 | { 6135, 7, 1, 0, 2046, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e09e0014819ULL }, // Inst #6135 = VCVTPH2PSXZrmbkz |
| 35966 | { 6134, 8, 1, 0, 2046, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a09e0014819ULL }, // Inst #6134 = VCVTPH2PSXZrmbk |
| 35967 | { 6133, 6, 1, 0, 1993, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5809e0014819ULL }, // Inst #6133 = VCVTPH2PSXZrmb |
| 35968 | { 6132, 6, 1, 0, 1993, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc809e0014819ULL }, // Inst #6132 = VCVTPH2PSXZrm |
| 35969 | { 6131, 3, 1, 0, 2038, 1, 0, X86ImpOpBase + 78, 2256, 0|(1ULL<<MCID::MayRaiseFPException), 0xa709e0014829ULL }, // Inst #6131 = VCVTPH2PSXZ256rrkz |
| 35970 | { 6130, 4, 1, 0, 2038, 1, 0, X86ImpOpBase + 78, 2252, 0|(1ULL<<MCID::MayRaiseFPException), 0xa309e0014829ULL }, // Inst #6130 = VCVTPH2PSXZ256rrk |
| 35971 | { 6129, 2, 1, 0, 1776, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa109e0014829ULL }, // Inst #6129 = VCVTPH2PSXZ256rr |
| 35972 | { 6128, 7, 1, 0, 2043, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa709e0014819ULL }, // Inst #6128 = VCVTPH2PSXZ256rmkz |
| 35973 | { 6127, 8, 1, 0, 2043, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa309e0014819ULL }, // Inst #6127 = VCVTPH2PSXZ256rmk |
| 35974 | { 6126, 7, 1, 0, 2043, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5709e0014819ULL }, // Inst #6126 = VCVTPH2PSXZ256rmbkz |
| 35975 | { 6125, 8, 1, 0, 2043, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5309e0014819ULL }, // Inst #6125 = VCVTPH2PSXZ256rmbk |
| 35976 | { 6124, 6, 1, 0, 1990, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5109e0014819ULL }, // Inst #6124 = VCVTPH2PSXZ256rmb |
| 35977 | { 6123, 6, 1, 0, 1990, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa109e0014819ULL }, // Inst #6123 = VCVTPH2PSXZ256rm |
| 35978 | { 6122, 3, 1, 0, 2067, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0x8609e0014829ULL }, // Inst #6122 = VCVTPH2PSXZ128rrkz |
| 35979 | { 6121, 4, 1, 0, 2067, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0x8209e0014829ULL }, // Inst #6121 = VCVTPH2PSXZ128rrk |
| 35980 | { 6120, 2, 1, 0, 1778, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x8009e0014829ULL }, // Inst #6120 = VCVTPH2PSXZ128rr |
| 35981 | { 6119, 7, 1, 0, 1989, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8609e0014819ULL }, // Inst #6119 = VCVTPH2PSXZ128rmkz |
| 35982 | { 6118, 8, 1, 0, 1989, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8209e0014819ULL }, // Inst #6118 = VCVTPH2PSXZ128rmk |
| 35983 | { 6117, 7, 1, 0, 1989, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5609e0014819ULL }, // Inst #6117 = VCVTPH2PSXZ128rmbkz |
| 35984 | { 6116, 8, 1, 0, 1989, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5209e0014819ULL }, // Inst #6116 = VCVTPH2PSXZ128rmbk |
| 35985 | { 6115, 6, 1, 0, 1699, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5009e0014819ULL }, // Inst #6115 = VCVTPH2PSXZ128rmb |
| 35986 | { 6114, 6, 1, 0, 1699, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8009e0014819ULL }, // Inst #6114 = VCVTPH2PSXZ128rm |
| 35987 | { 6113, 3, 1, 0, 2009, 1, 0, X86ImpOpBase + 78, 2356, 0|(1ULL<<MCID::MayRaiseFPException), 0xae2d60012029ULL }, // Inst #6113 = VCVTPH2PDZrrkz |
| 35988 | { 6112, 4, 1, 0, 2009, 1, 0, X86ImpOpBase + 78, 2352, 0|(1ULL<<MCID::MayRaiseFPException), 0xaa2d60012029ULL }, // Inst #6112 = VCVTPH2PDZrrk |
| 35989 | { 6111, 3, 1, 0, 2009, 1, 0, X86ImpOpBase + 78, 2356, 0, 0x5e2d60012029ULL }, // Inst #6111 = VCVTPH2PDZrrbkz |
| 35990 | { 6110, 4, 1, 0, 2009, 1, 0, X86ImpOpBase + 78, 2352, 0, 0x5a2d60012029ULL }, // Inst #6110 = VCVTPH2PDZrrbk |
| 35991 | { 6109, 2, 1, 0, 2007, 1, 0, X86ImpOpBase + 78, 2280, 0, 0x582d60012029ULL }, // Inst #6109 = VCVTPH2PDZrrb |
| 35992 | { 6108, 2, 1, 0, 2007, 1, 0, X86ImpOpBase + 78, 2280, 0|(1ULL<<MCID::MayRaiseFPException), 0xa82d60012029ULL }, // Inst #6108 = VCVTPH2PDZrr |
| 35993 | { 6107, 7, 1, 0, 2005, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xae2d60012019ULL }, // Inst #6107 = VCVTPH2PDZrmkz |
| 35994 | { 6106, 8, 1, 0, 2005, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaa2d60012019ULL }, // Inst #6106 = VCVTPH2PDZrmk |
| 35995 | { 6105, 7, 1, 0, 2005, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e2d60012019ULL }, // Inst #6105 = VCVTPH2PDZrmbkz |
| 35996 | { 6104, 8, 1, 0, 2005, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a2d60012019ULL }, // Inst #6104 = VCVTPH2PDZrmbk |
| 35997 | { 6103, 6, 1, 0, 2003, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x582d60012019ULL }, // Inst #6103 = VCVTPH2PDZrmb |
| 35998 | { 6102, 6, 1, 0, 2003, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa82d60012019ULL }, // Inst #6102 = VCVTPH2PDZrm |
| 35999 | { 6101, 3, 1, 0, 2066, 1, 0, X86ImpOpBase + 78, 2349, 0|(1ULL<<MCID::MayRaiseFPException), 0x872d60012029ULL }, // Inst #6101 = VCVTPH2PDZ256rrkz |
| 36000 | { 6100, 4, 1, 0, 2066, 1, 0, X86ImpOpBase + 78, 2345, 0|(1ULL<<MCID::MayRaiseFPException), 0x832d60012029ULL }, // Inst #6100 = VCVTPH2PDZ256rrk |
| 36001 | { 6099, 2, 1, 0, 2065, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0x812d60012029ULL }, // Inst #6099 = VCVTPH2PDZ256rr |
| 36002 | { 6098, 7, 1, 0, 2064, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x872d60012019ULL }, // Inst #6098 = VCVTPH2PDZ256rmkz |
| 36003 | { 6097, 8, 1, 0, 2064, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x832d60012019ULL }, // Inst #6097 = VCVTPH2PDZ256rmk |
| 36004 | { 6096, 7, 1, 0, 2064, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x572d60012019ULL }, // Inst #6096 = VCVTPH2PDZ256rmbkz |
| 36005 | { 6095, 8, 1, 0, 2064, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x532d60012019ULL }, // Inst #6095 = VCVTPH2PDZ256rmbk |
| 36006 | { 6094, 6, 1, 0, 2063, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x512d60012019ULL }, // Inst #6094 = VCVTPH2PDZ256rmb |
| 36007 | { 6093, 6, 1, 0, 2063, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x812d60012019ULL }, // Inst #6093 = VCVTPH2PDZ256rm |
| 36008 | { 6092, 3, 1, 0, 2062, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0x662d60012029ULL }, // Inst #6092 = VCVTPH2PDZ128rrkz |
| 36009 | { 6091, 4, 1, 0, 2062, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0x622d60012029ULL }, // Inst #6091 = VCVTPH2PDZ128rrk |
| 36010 | { 6090, 2, 1, 0, 2061, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x602d60012029ULL }, // Inst #6090 = VCVTPH2PDZ128rr |
| 36011 | { 6089, 7, 1, 0, 2060, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x662d60012019ULL }, // Inst #6089 = VCVTPH2PDZ128rmkz |
| 36012 | { 6088, 8, 1, 0, 2060, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x622d60012019ULL }, // Inst #6088 = VCVTPH2PDZ128rmk |
| 36013 | { 6087, 7, 1, 0, 2060, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x562d60012019ULL }, // Inst #6087 = VCVTPH2PDZ128rmbkz |
| 36014 | { 6086, 8, 1, 0, 2060, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x522d60012019ULL }, // Inst #6086 = VCVTPH2PDZ128rmbk |
| 36015 | { 6085, 6, 1, 0, 2059, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x502d60012019ULL }, // Inst #6085 = VCVTPH2PDZ128rmb |
| 36016 | { 6084, 6, 1, 0, 2059, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x602d60012019ULL }, // Inst #6084 = VCVTPH2PDZ128rm |
| 36017 | { 6083, 3, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2951, 0|(1ULL<<MCID::MayRaiseFPException), 0xce2de0012829ULL }, // Inst #6083 = VCVTPH2DQZrrkz |
| 36018 | { 6082, 4, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2947, 0|(1ULL<<MCID::MayRaiseFPException), 0xca2de0012829ULL }, // Inst #6082 = VCVTPH2DQZrrk |
| 36019 | { 6081, 4, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2943, 0, 0x15e2de0012829ULL }, // Inst #6081 = VCVTPH2DQZrrbkz |
| 36020 | { 6080, 5, 1, 0, 2056, 1, 0, X86ImpOpBase + 78, 2938, 0, 0x15a2de0012829ULL }, // Inst #6080 = VCVTPH2DQZrrbk |
| 36021 | { 6079, 3, 1, 0, 2048, 1, 0, X86ImpOpBase + 78, 2935, 0, 0x1582de0012829ULL }, // Inst #6079 = VCVTPH2DQZrrb |
| 36022 | { 6078, 2, 1, 0, 2048, 1, 0, X86ImpOpBase + 78, 2797, 0|(1ULL<<MCID::MayRaiseFPException), 0xc82de0012829ULL }, // Inst #6078 = VCVTPH2DQZrr |
| 36023 | { 6077, 7, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xce2de0012819ULL }, // Inst #6077 = VCVTPH2DQZrmkz |
| 36024 | { 6076, 8, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xca2de0012819ULL }, // Inst #6076 = VCVTPH2DQZrmk |
| 36025 | { 6075, 7, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5e2de0012819ULL }, // Inst #6075 = VCVTPH2DQZrmbkz |
| 36026 | { 6074, 8, 1, 0, 2045, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5a2de0012819ULL }, // Inst #6074 = VCVTPH2DQZrmbk |
| 36027 | { 6073, 6, 1, 0, 1992, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x582de0012819ULL }, // Inst #6073 = VCVTPH2DQZrmb |
| 36028 | { 6072, 6, 1, 0, 1992, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc82de0012819ULL }, // Inst #6072 = VCVTPH2DQZrm |
| 36029 | { 6071, 3, 1, 0, 2037, 1, 0, X86ImpOpBase + 78, 2256, 0|(1ULL<<MCID::MayRaiseFPException), 0xa72de0012829ULL }, // Inst #6071 = VCVTPH2DQZ256rrkz |
| 36030 | { 6070, 4, 1, 0, 2037, 1, 0, X86ImpOpBase + 78, 2252, 0|(1ULL<<MCID::MayRaiseFPException), 0xa32de0012829ULL }, // Inst #6070 = VCVTPH2DQZ256rrk |
| 36031 | { 6069, 2, 1, 0, 1775, 1, 0, X86ImpOpBase + 78, 2250, 0|(1ULL<<MCID::MayRaiseFPException), 0xa12de0012829ULL }, // Inst #6069 = VCVTPH2DQZ256rr |
| 36032 | { 6068, 7, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa72de0012819ULL }, // Inst #6068 = VCVTPH2DQZ256rmkz |
| 36033 | { 6067, 8, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa32de0012819ULL }, // Inst #6067 = VCVTPH2DQZ256rmk |
| 36034 | { 6066, 7, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x572de0012819ULL }, // Inst #6066 = VCVTPH2DQZ256rmbkz |
| 36035 | { 6065, 8, 1, 0, 2042, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x532de0012819ULL }, // Inst #6065 = VCVTPH2DQZ256rmbk |
| 36036 | { 6064, 6, 1, 0, 1988, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x512de0012819ULL }, // Inst #6064 = VCVTPH2DQZ256rmb |
| 36037 | { 6063, 6, 1, 0, 1988, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa12de0012819ULL }, // Inst #6063 = VCVTPH2DQZ256rm |
| 36038 | { 6062, 3, 1, 0, 2036, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0x862de0012829ULL }, // Inst #6062 = VCVTPH2DQZ128rrkz |
| 36039 | { 6061, 4, 1, 0, 2036, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0x822de0012829ULL }, // Inst #6061 = VCVTPH2DQZ128rrk |
| 36040 | { 6060, 2, 1, 0, 1774, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x802de0012829ULL }, // Inst #6060 = VCVTPH2DQZ128rr |
| 36041 | { 6059, 7, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x862de0012819ULL }, // Inst #6059 = VCVTPH2DQZ128rmkz |
| 36042 | { 6058, 8, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x822de0012819ULL }, // Inst #6058 = VCVTPH2DQZ128rmk |
| 36043 | { 6057, 7, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x562de0012819ULL }, // Inst #6057 = VCVTPH2DQZ128rmbkz |
| 36044 | { 6056, 8, 1, 0, 2035, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x522de0012819ULL }, // Inst #6056 = VCVTPH2DQZ128rmbk |
| 36045 | { 6055, 6, 1, 0, 2033, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x502de0012819ULL }, // Inst #6055 = VCVTPH2DQZ128rmb |
| 36046 | { 6054, 6, 1, 0, 2033, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x802de0012819ULL }, // Inst #6054 = VCVTPH2DQZ128rm |
| 36047 | { 6053, 3, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0022829ULL }, // Inst #6053 = VCVTPD2UQQZrrkz |
| 36048 | { 6052, 4, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0022829ULL }, // Inst #6052 = VCVTPD2UQQZrrk |
| 36049 | { 6051, 4, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2931, 0, 0x19e3ce0022829ULL }, // Inst #6051 = VCVTPD2UQQZrrbkz |
| 36050 | { 6050, 5, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2926, 0, 0x19a3ce0022829ULL }, // Inst #6050 = VCVTPD2UQQZrrbk |
| 36051 | { 6049, 3, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1983ce0022829ULL }, // Inst #6049 = VCVTPD2UQQZrrb |
| 36052 | { 6048, 2, 1, 0, 1254, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0022829ULL }, // Inst #6048 = VCVTPD2UQQZrr |
| 36053 | { 6047, 7, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0022819ULL }, // Inst #6047 = VCVTPD2UQQZrmkz |
| 36054 | { 6046, 8, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0022819ULL }, // Inst #6046 = VCVTPD2UQQZrmk |
| 36055 | { 6045, 7, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3ce0022819ULL }, // Inst #6045 = VCVTPD2UQQZrmbkz |
| 36056 | { 6044, 8, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3ce0022819ULL }, // Inst #6044 = VCVTPD2UQQZrmbk |
| 36057 | { 6043, 6, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983ce0022819ULL }, // Inst #6043 = VCVTPD2UQQZrmb |
| 36058 | { 6042, 6, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0022819ULL }, // Inst #6042 = VCVTPD2UQQZrm |
| 36059 | { 6041, 3, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2722, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0022829ULL }, // Inst #6041 = VCVTPD2UQQZ256rrkz |
| 36060 | { 6040, 4, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2718, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0022829ULL }, // Inst #6040 = VCVTPD2UQQZ256rrk |
| 36061 | { 6039, 2, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0022829ULL }, // Inst #6039 = VCVTPD2UQQZ256rr |
| 36062 | { 6038, 7, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0022819ULL }, // Inst #6038 = VCVTPD2UQQZ256rmkz |
| 36063 | { 6037, 8, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0022819ULL }, // Inst #6037 = VCVTPD2UQQZ256rmk |
| 36064 | { 6036, 7, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973ce0022819ULL }, // Inst #6036 = VCVTPD2UQQZ256rmbkz |
| 36065 | { 6035, 8, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933ce0022819ULL }, // Inst #6035 = VCVTPD2UQQZ256rmbk |
| 36066 | { 6034, 6, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913ce0022819ULL }, // Inst #6034 = VCVTPD2UQQZ256rmb |
| 36067 | { 6033, 6, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0022819ULL }, // Inst #6033 = VCVTPD2UQQZ256rm |
| 36068 | { 6032, 3, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0022829ULL }, // Inst #6032 = VCVTPD2UQQZ128rrkz |
| 36069 | { 6031, 4, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0022829ULL }, // Inst #6031 = VCVTPD2UQQZ128rrk |
| 36070 | { 6030, 2, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0022829ULL }, // Inst #6030 = VCVTPD2UQQZ128rr |
| 36071 | { 6029, 7, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0022819ULL }, // Inst #6029 = VCVTPD2UQQZ128rmkz |
| 36072 | { 6028, 8, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0022819ULL }, // Inst #6028 = VCVTPD2UQQZ128rmk |
| 36073 | { 6027, 7, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963ce0022819ULL }, // Inst #6027 = VCVTPD2UQQZ128rmbkz |
| 36074 | { 6026, 8, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923ce0022819ULL }, // Inst #6026 = VCVTPD2UQQZ128rmbk |
| 36075 | { 6025, 6, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903ce0022819ULL }, // Inst #6025 = VCVTPD2UQQZ128rmb |
| 36076 | { 6024, 6, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0022819ULL }, // Inst #6024 = VCVTPD2UQQZ128rm |
| 36077 | { 6023, 3, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2902, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0022029ULL }, // Inst #6023 = VCVTPD2UDQZrrkz |
| 36078 | { 6022, 4, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2898, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0022029ULL }, // Inst #6022 = VCVTPD2UDQZrrk |
| 36079 | { 6021, 4, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2894, 0, 0x19e3ce0022029ULL }, // Inst #6021 = VCVTPD2UDQZrrbkz |
| 36080 | { 6020, 5, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2889, 0, 0x19a3ce0022029ULL }, // Inst #6020 = VCVTPD2UDQZrrbk |
| 36081 | { 6019, 3, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2847, 0, 0x1983ce0022029ULL }, // Inst #6019 = VCVTPD2UDQZrrb |
| 36082 | { 6018, 2, 1, 0, 1287, 1, 0, X86ImpOpBase + 78, 2845, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0022029ULL }, // Inst #6018 = VCVTPD2UDQZrr |
| 36083 | { 6017, 7, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3ce0022019ULL }, // Inst #6017 = VCVTPD2UDQZrmkz |
| 36084 | { 6016, 8, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3ce0022019ULL }, // Inst #6016 = VCVTPD2UDQZrmk |
| 36085 | { 6015, 7, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3ce0022019ULL }, // Inst #6015 = VCVTPD2UDQZrmbkz |
| 36086 | { 6014, 8, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3ce0022019ULL }, // Inst #6014 = VCVTPD2UDQZrmbk |
| 36087 | { 6013, 6, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983ce0022019ULL }, // Inst #6013 = VCVTPD2UDQZrmb |
| 36088 | { 6012, 6, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83ce0022019ULL }, // Inst #6012 = VCVTPD2UDQZrm |
| 36089 | { 6011, 3, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2886, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0022029ULL }, // Inst #6011 = VCVTPD2UDQZ256rrkz |
| 36090 | { 6010, 4, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2882, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0022029ULL }, // Inst #6010 = VCVTPD2UDQZ256rrk |
| 36091 | { 6009, 2, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0022029ULL }, // Inst #6009 = VCVTPD2UDQZ256rr |
| 36092 | { 6008, 7, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73ce0022019ULL }, // Inst #6008 = VCVTPD2UDQZ256rmkz |
| 36093 | { 6007, 8, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33ce0022019ULL }, // Inst #6007 = VCVTPD2UDQZ256rmk |
| 36094 | { 6006, 7, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973ce0022019ULL }, // Inst #6006 = VCVTPD2UDQZ256rmbkz |
| 36095 | { 6005, 8, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933ce0022019ULL }, // Inst #6005 = VCVTPD2UDQZ256rmbk |
| 36096 | { 6004, 6, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913ce0022019ULL }, // Inst #6004 = VCVTPD2UDQZ256rmb |
| 36097 | { 6003, 6, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13ce0022019ULL }, // Inst #6003 = VCVTPD2UDQZ256rm |
| 36098 | { 6002, 3, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0022029ULL }, // Inst #6002 = VCVTPD2UDQZ128rrkz |
| 36099 | { 6001, 4, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0022029ULL }, // Inst #6001 = VCVTPD2UDQZ128rrk |
| 36100 | { 6000, 2, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0022029ULL }, // Inst #6000 = VCVTPD2UDQZ128rr |
| 36101 | { 5999, 7, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63ce0022019ULL }, // Inst #5999 = VCVTPD2UDQZ128rmkz |
| 36102 | { 5998, 8, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23ce0022019ULL }, // Inst #5998 = VCVTPD2UDQZ128rmk |
| 36103 | { 5997, 7, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963ce0022019ULL }, // Inst #5997 = VCVTPD2UDQZ128rmbkz |
| 36104 | { 5996, 8, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923ce0022019ULL }, // Inst #5996 = VCVTPD2UDQZ128rmbk |
| 36105 | { 5995, 6, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903ce0022019ULL }, // Inst #5995 = VCVTPD2UDQZ128rmb |
| 36106 | { 5994, 6, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03ce0022019ULL }, // Inst #5994 = VCVTPD2UDQZ128rm |
| 36107 | { 5993, 3, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2744, 0|(1ULL<<MCID::MayRaiseFPException), 0xee3de0022829ULL }, // Inst #5993 = VCVTPD2QQZrrkz |
| 36108 | { 5992, 4, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2740, 0|(1ULL<<MCID::MayRaiseFPException), 0xea3de0022829ULL }, // Inst #5992 = VCVTPD2QQZrrk |
| 36109 | { 5991, 4, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2931, 0, 0x19e3de0022829ULL }, // Inst #5991 = VCVTPD2QQZrrbkz |
| 36110 | { 5990, 5, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2926, 0, 0x19a3de0022829ULL }, // Inst #5990 = VCVTPD2QQZrrbk |
| 36111 | { 5989, 3, 1, 0, 1823, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1983de0022829ULL }, // Inst #5989 = VCVTPD2QQZrrb |
| 36112 | { 5988, 2, 1, 0, 1254, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe83de0022829ULL }, // Inst #5988 = VCVTPD2QQZrr |
| 36113 | { 5987, 7, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee3de0022819ULL }, // Inst #5987 = VCVTPD2QQZrmkz |
| 36114 | { 5986, 8, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea3de0022819ULL }, // Inst #5986 = VCVTPD2QQZrmk |
| 36115 | { 5985, 7, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2312, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e3de0022819ULL }, // Inst #5985 = VCVTPD2QQZrmbkz |
| 36116 | { 5984, 8, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a3de0022819ULL }, // Inst #5984 = VCVTPD2QQZrmbk |
| 36117 | { 5983, 6, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x983de0022819ULL }, // Inst #5983 = VCVTPD2QQZrmb |
| 36118 | { 5982, 6, 1, 0, 1370, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe83de0022819ULL }, // Inst #5982 = VCVTPD2QQZrm |
| 36119 | { 5981, 3, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2722, 0|(1ULL<<MCID::MayRaiseFPException), 0xc73de0022829ULL }, // Inst #5981 = VCVTPD2QQZ256rrkz |
| 36120 | { 5980, 4, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2718, 0|(1ULL<<MCID::MayRaiseFPException), 0xc33de0022829ULL }, // Inst #5980 = VCVTPD2QQZ256rrk |
| 36121 | { 5979, 2, 1, 0, 1251, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc13de0022829ULL }, // Inst #5979 = VCVTPD2QQZ256rr |
| 36122 | { 5978, 7, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc73de0022819ULL }, // Inst #5978 = VCVTPD2QQZ256rmkz |
| 36123 | { 5977, 8, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc33de0022819ULL }, // Inst #5977 = VCVTPD2QQZ256rmk |
| 36124 | { 5976, 7, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2297, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x973de0022819ULL }, // Inst #5976 = VCVTPD2QQZ256rmbkz |
| 36125 | { 5975, 8, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x933de0022819ULL }, // Inst #5975 = VCVTPD2QQZ256rmbk |
| 36126 | { 5974, 6, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x913de0022819ULL }, // Inst #5974 = VCVTPD2QQZ256rmb |
| 36127 | { 5973, 6, 1, 0, 1369, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc13de0022819ULL }, // Inst #5973 = VCVTPD2QQZ256rm |
| 36128 | { 5972, 3, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa63de0022829ULL }, // Inst #5972 = VCVTPD2QQZ128rrkz |
| 36129 | { 5971, 4, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa23de0022829ULL }, // Inst #5971 = VCVTPD2QQZ128rrk |
| 36130 | { 5970, 2, 1, 0, 1250, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa03de0022829ULL }, // Inst #5970 = VCVTPD2QQZ128rr |
| 36131 | { 5969, 7, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa63de0022819ULL }, // Inst #5969 = VCVTPD2QQZ128rmkz |
| 36132 | { 5968, 8, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa23de0022819ULL }, // Inst #5968 = VCVTPD2QQZ128rmk |
| 36133 | { 5967, 7, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x963de0022819ULL }, // Inst #5967 = VCVTPD2QQZ128rmbkz |
| 36134 | { 5966, 8, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x923de0022819ULL }, // Inst #5966 = VCVTPD2QQZ128rmbk |
| 36135 | { 5965, 6, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x903de0022819ULL }, // Inst #5965 = VCVTPD2QQZ128rmb |
| 36136 | { 5964, 6, 1, 0, 1353, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa03de0022819ULL }, // Inst #5964 = VCVTPD2QQZ128rm |
| 36137 | { 5963, 2, 1, 0, 97, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d30002829ULL }, // Inst #5963 = VCVTPD2PSrr |
| 36138 | { 5962, 6, 1, 0, 96, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d30002819ULL }, // Inst #5962 = VCVTPD2PSrm |
| 36139 | { 5961, 3, 1, 0, 388, 1, 0, X86ImpOpBase + 78, 2902, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2d60022829ULL }, // Inst #5961 = VCVTPD2PSZrrkz |
| 36140 | { 5960, 4, 1, 0, 388, 1, 0, X86ImpOpBase + 78, 2898, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2d60022829ULL }, // Inst #5960 = VCVTPD2PSZrrk |
| 36141 | { 5959, 4, 1, 0, 388, 1, 0, X86ImpOpBase + 78, 2894, 0, 0x19e2d60022829ULL }, // Inst #5959 = VCVTPD2PSZrrbkz |
| 36142 | { 5958, 5, 1, 0, 388, 1, 0, X86ImpOpBase + 78, 2889, 0, 0x19a2d60022829ULL }, // Inst #5958 = VCVTPD2PSZrrbk |
| 36143 | { 5957, 3, 1, 0, 388, 1, 0, X86ImpOpBase + 78, 2847, 0, 0x1982d60022829ULL }, // Inst #5957 = VCVTPD2PSZrrb |
| 36144 | { 5956, 2, 1, 0, 388, 1, 0, X86ImpOpBase + 78, 2845, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82d60022829ULL }, // Inst #5956 = VCVTPD2PSZrr |
| 36145 | { 5955, 7, 1, 0, 390, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2d60022819ULL }, // Inst #5955 = VCVTPD2PSZrmkz |
| 36146 | { 5954, 8, 1, 0, 390, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2d60022819ULL }, // Inst #5954 = VCVTPD2PSZrmk |
| 36147 | { 5953, 7, 1, 0, 390, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2d60022819ULL }, // Inst #5953 = VCVTPD2PSZrmbkz |
| 36148 | { 5952, 8, 1, 0, 390, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2d60022819ULL }, // Inst #5952 = VCVTPD2PSZrmbk |
| 36149 | { 5951, 6, 1, 0, 390, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982d60022819ULL }, // Inst #5951 = VCVTPD2PSZrmb |
| 36150 | { 5950, 6, 1, 0, 390, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82d60022819ULL }, // Inst #5950 = VCVTPD2PSZrm |
| 36151 | { 5949, 3, 1, 0, 386, 1, 0, X86ImpOpBase + 78, 2886, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72d60022829ULL }, // Inst #5949 = VCVTPD2PSZ256rrkz |
| 36152 | { 5948, 4, 1, 0, 386, 1, 0, X86ImpOpBase + 78, 2882, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32d60022829ULL }, // Inst #5948 = VCVTPD2PSZ256rrk |
| 36153 | { 5947, 2, 1, 0, 386, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12d60022829ULL }, // Inst #5947 = VCVTPD2PSZ256rr |
| 36154 | { 5946, 7, 1, 0, 389, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72d60022819ULL }, // Inst #5946 = VCVTPD2PSZ256rmkz |
| 36155 | { 5945, 8, 1, 0, 389, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32d60022819ULL }, // Inst #5945 = VCVTPD2PSZ256rmk |
| 36156 | { 5944, 7, 1, 0, 389, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972d60022819ULL }, // Inst #5944 = VCVTPD2PSZ256rmbkz |
| 36157 | { 5943, 8, 1, 0, 389, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932d60022819ULL }, // Inst #5943 = VCVTPD2PSZ256rmbk |
| 36158 | { 5942, 6, 1, 0, 389, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912d60022819ULL }, // Inst #5942 = VCVTPD2PSZ256rmb |
| 36159 | { 5941, 6, 1, 0, 389, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12d60022819ULL }, // Inst #5941 = VCVTPD2PSZ256rm |
| 36160 | { 5940, 3, 1, 0, 97, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62d60022829ULL }, // Inst #5940 = VCVTPD2PSZ128rrkz |
| 36161 | { 5939, 4, 1, 0, 97, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22d60022829ULL }, // Inst #5939 = VCVTPD2PSZ128rrk |
| 36162 | { 5938, 2, 1, 0, 97, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02d60022829ULL }, // Inst #5938 = VCVTPD2PSZ128rr |
| 36163 | { 5937, 7, 1, 0, 96, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62d60022819ULL }, // Inst #5937 = VCVTPD2PSZ128rmkz |
| 36164 | { 5936, 8, 1, 0, 96, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22d60022819ULL }, // Inst #5936 = VCVTPD2PSZ128rmk |
| 36165 | { 5935, 7, 1, 0, 96, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962d60022819ULL }, // Inst #5935 = VCVTPD2PSZ128rmbkz |
| 36166 | { 5934, 8, 1, 0, 96, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922d60022819ULL }, // Inst #5934 = VCVTPD2PSZ128rmbk |
| 36167 | { 5933, 6, 1, 0, 96, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902d60022819ULL }, // Inst #5933 = VCVTPD2PSZ128rmb |
| 36168 | { 5932, 6, 1, 0, 96, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02d60022819ULL }, // Inst #5932 = VCVTPD2PSZ128rm |
| 36169 | { 5931, 2, 1, 0, 386, 1, 0, X86ImpOpBase + 78, 2880, 0|(1ULL<<MCID::MayRaiseFPException), 0x12d30002829ULL }, // Inst #5931 = VCVTPD2PSYrr |
| 36170 | { 5930, 6, 1, 0, 389, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x12d30002819ULL }, // Inst #5930 = VCVTPD2PSYrm |
| 36171 | { 5929, 3, 1, 0, 2008, 1, 0, X86ImpOpBase + 78, 2923, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2d60032829ULL }, // Inst #5929 = VCVTPD2PHZrrkz |
| 36172 | { 5928, 4, 1, 0, 2008, 1, 0, X86ImpOpBase + 78, 2919, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2d60032829ULL }, // Inst #5928 = VCVTPD2PHZrrk |
| 36173 | { 5927, 4, 1, 0, 2008, 1, 0, X86ImpOpBase + 78, 2915, 0, 0x19e2d60032829ULL }, // Inst #5927 = VCVTPD2PHZrrbkz |
| 36174 | { 5926, 5, 1, 0, 2008, 1, 0, X86ImpOpBase + 78, 2910, 0, 0x19a2d60032829ULL }, // Inst #5926 = VCVTPD2PHZrrbk |
| 36175 | { 5925, 3, 1, 0, 2006, 1, 0, X86ImpOpBase + 78, 2907, 0, 0x1982d60032829ULL }, // Inst #5925 = VCVTPD2PHZrrb |
| 36176 | { 5924, 2, 1, 0, 2006, 1, 0, X86ImpOpBase + 78, 2905, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82d60032829ULL }, // Inst #5924 = VCVTPD2PHZrr |
| 36177 | { 5923, 7, 1, 0, 2004, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2d60032819ULL }, // Inst #5923 = VCVTPD2PHZrmkz |
| 36178 | { 5922, 8, 1, 0, 2004, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2d60032819ULL }, // Inst #5922 = VCVTPD2PHZrmk |
| 36179 | { 5921, 7, 1, 0, 2004, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e2d60032819ULL }, // Inst #5921 = VCVTPD2PHZrmbkz |
| 36180 | { 5920, 8, 1, 0, 2004, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a2d60032819ULL }, // Inst #5920 = VCVTPD2PHZrmbk |
| 36181 | { 5919, 6, 1, 0, 2002, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x982d60032819ULL }, // Inst #5919 = VCVTPD2PHZrmb |
| 36182 | { 5918, 6, 1, 0, 2002, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82d60032819ULL }, // Inst #5918 = VCVTPD2PHZrm |
| 36183 | { 5917, 3, 1, 0, 2001, 1, 0, X86ImpOpBase + 78, 2886, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72d60032829ULL }, // Inst #5917 = VCVTPD2PHZ256rrkz |
| 36184 | { 5916, 4, 1, 0, 2001, 1, 0, X86ImpOpBase + 78, 2882, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32d60032829ULL }, // Inst #5916 = VCVTPD2PHZ256rrk |
| 36185 | { 5915, 2, 1, 0, 2000, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12d60032829ULL }, // Inst #5915 = VCVTPD2PHZ256rr |
| 36186 | { 5914, 7, 1, 0, 1999, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72d60032819ULL }, // Inst #5914 = VCVTPD2PHZ256rmkz |
| 36187 | { 5913, 8, 1, 0, 1999, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32d60032819ULL }, // Inst #5913 = VCVTPD2PHZ256rmk |
| 36188 | { 5912, 7, 1, 0, 1999, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x972d60032819ULL }, // Inst #5912 = VCVTPD2PHZ256rmbkz |
| 36189 | { 5911, 8, 1, 0, 1999, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x932d60032819ULL }, // Inst #5911 = VCVTPD2PHZ256rmbk |
| 36190 | { 5910, 6, 1, 0, 1998, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x912d60032819ULL }, // Inst #5910 = VCVTPD2PHZ256rmb |
| 36191 | { 5909, 6, 1, 0, 1998, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12d60032819ULL }, // Inst #5909 = VCVTPD2PHZ256rm |
| 36192 | { 5908, 3, 1, 0, 1997, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62d60032829ULL }, // Inst #5908 = VCVTPD2PHZ128rrkz |
| 36193 | { 5907, 4, 1, 0, 1997, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22d60032829ULL }, // Inst #5907 = VCVTPD2PHZ128rrk |
| 36194 | { 5906, 2, 1, 0, 1996, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02d60032829ULL }, // Inst #5906 = VCVTPD2PHZ128rr |
| 36195 | { 5905, 7, 1, 0, 1995, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62d60032819ULL }, // Inst #5905 = VCVTPD2PHZ128rmkz |
| 36196 | { 5904, 8, 1, 0, 1995, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22d60032819ULL }, // Inst #5904 = VCVTPD2PHZ128rmk |
| 36197 | { 5903, 7, 1, 0, 1995, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x962d60032819ULL }, // Inst #5903 = VCVTPD2PHZ128rmbkz |
| 36198 | { 5902, 8, 1, 0, 1995, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x922d60032819ULL }, // Inst #5902 = VCVTPD2PHZ128rmbk |
| 36199 | { 5901, 6, 1, 0, 1994, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x902d60032819ULL }, // Inst #5901 = VCVTPD2PHZ128rmb |
| 36200 | { 5900, 6, 1, 0, 1994, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02d60032819ULL }, // Inst #5900 = VCVTPD2PHZ128rm |
| 36201 | { 5899, 2, 1, 0, 977, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x7320003829ULL }, // Inst #5899 = VCVTPD2DQrr |
| 36202 | { 5898, 6, 1, 0, 978, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7320003819ULL }, // Inst #5898 = VCVTPD2DQrm |
| 36203 | { 5897, 3, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2902, 0|(1ULL<<MCID::MayRaiseFPException), 0xee7360023829ULL }, // Inst #5897 = VCVTPD2DQZrrkz |
| 36204 | { 5896, 4, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2898, 0|(1ULL<<MCID::MayRaiseFPException), 0xea7360023829ULL }, // Inst #5896 = VCVTPD2DQZrrk |
| 36205 | { 5895, 4, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2894, 0, 0x19e7360023829ULL }, // Inst #5895 = VCVTPD2DQZrrbkz |
| 36206 | { 5894, 5, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2889, 0, 0x19a7360023829ULL }, // Inst #5894 = VCVTPD2DQZrrbk |
| 36207 | { 5893, 3, 1, 0, 394, 1, 0, X86ImpOpBase + 78, 2847, 0, 0x1987360023829ULL }, // Inst #5893 = VCVTPD2DQZrrb |
| 36208 | { 5892, 2, 1, 0, 1287, 1, 0, X86ImpOpBase + 78, 2845, 0|(1ULL<<MCID::MayRaiseFPException), 0xe87360023829ULL }, // Inst #5892 = VCVTPD2DQZrr |
| 36209 | { 5891, 7, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee7360023819ULL }, // Inst #5891 = VCVTPD2DQZrmkz |
| 36210 | { 5890, 8, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea7360023819ULL }, // Inst #5890 = VCVTPD2DQZrmk |
| 36211 | { 5889, 7, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9e7360023819ULL }, // Inst #5889 = VCVTPD2DQZrmbkz |
| 36212 | { 5888, 8, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9a7360023819ULL }, // Inst #5888 = VCVTPD2DQZrmbk |
| 36213 | { 5887, 6, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x987360023819ULL }, // Inst #5887 = VCVTPD2DQZrmb |
| 36214 | { 5886, 6, 1, 0, 1387, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe87360023819ULL }, // Inst #5886 = VCVTPD2DQZrm |
| 36215 | { 5885, 3, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2886, 0|(1ULL<<MCID::MayRaiseFPException), 0xc77360023829ULL }, // Inst #5885 = VCVTPD2DQZ256rrkz |
| 36216 | { 5884, 4, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2882, 0|(1ULL<<MCID::MayRaiseFPException), 0xc37360023829ULL }, // Inst #5884 = VCVTPD2DQZ256rrk |
| 36217 | { 5883, 2, 1, 0, 1282, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc17360023829ULL }, // Inst #5883 = VCVTPD2DQZ256rr |
| 36218 | { 5882, 7, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc77360023819ULL }, // Inst #5882 = VCVTPD2DQZ256rmkz |
| 36219 | { 5881, 8, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc37360023819ULL }, // Inst #5881 = VCVTPD2DQZ256rmk |
| 36220 | { 5880, 7, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x977360023819ULL }, // Inst #5880 = VCVTPD2DQZ256rmbkz |
| 36221 | { 5879, 8, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x937360023819ULL }, // Inst #5879 = VCVTPD2DQZ256rmbk |
| 36222 | { 5878, 6, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x917360023819ULL }, // Inst #5878 = VCVTPD2DQZ256rmb |
| 36223 | { 5877, 6, 1, 0, 1987, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc17360023819ULL }, // Inst #5877 = VCVTPD2DQZ256rm |
| 36224 | { 5876, 3, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2706, 0|(1ULL<<MCID::MayRaiseFPException), 0xa67360023829ULL }, // Inst #5876 = VCVTPD2DQZ128rrkz |
| 36225 | { 5875, 4, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2702, 0|(1ULL<<MCID::MayRaiseFPException), 0xa27360023829ULL }, // Inst #5875 = VCVTPD2DQZ128rrk |
| 36226 | { 5874, 2, 1, 0, 1262, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa07360023829ULL }, // Inst #5874 = VCVTPD2DQZ128rr |
| 36227 | { 5873, 7, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa67360023819ULL }, // Inst #5873 = VCVTPD2DQZ128rmkz |
| 36228 | { 5872, 8, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa27360023819ULL }, // Inst #5872 = VCVTPD2DQZ128rmk |
| 36229 | { 5871, 7, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2790, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x967360023819ULL }, // Inst #5871 = VCVTPD2DQZ128rmbkz |
| 36230 | { 5870, 8, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 2782, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x927360023819ULL }, // Inst #5870 = VCVTPD2DQZ128rmbk |
| 36231 | { 5869, 6, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x907360023819ULL }, // Inst #5869 = VCVTPD2DQZ128rmb |
| 36232 | { 5868, 6, 1, 0, 1698, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa07360023819ULL }, // Inst #5868 = VCVTPD2DQZ128rm |
| 36233 | { 5867, 2, 1, 0, 979, 1, 0, X86ImpOpBase + 78, 2880, 0|(1ULL<<MCID::MayRaiseFPException), 0x17320003829ULL }, // Inst #5867 = VCVTPD2DQYrr |
| 36234 | { 5866, 6, 1, 0, 980, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17320003819ULL }, // Inst #5866 = VCVTPD2DQYrm |
| 36235 | { 5865, 2, 1, 0, 354, 0, 0, X86ImpOpBase + 0, 535, 0, 0x8003920005029ULL }, // Inst #5865 = VCVTNEPS2BF16rr |
| 36236 | { 5864, 6, 1, 0, 354, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x8003920005019ULL }, // Inst #5864 = VCVTNEPS2BF16rm |
| 36237 | { 5863, 3, 1, 0, 1986, 0, 0, X86ImpOpBase + 0, 2863, 0, 0xee3968005029ULL }, // Inst #5863 = VCVTNEPS2BF16Zrrkz |
| 36238 | { 5862, 4, 1, 0, 1986, 0, 0, X86ImpOpBase + 0, 2859, 0, 0xea3968005029ULL }, // Inst #5862 = VCVTNEPS2BF16Zrrk |
| 36239 | { 5861, 2, 1, 0, 1985, 0, 0, X86ImpOpBase + 0, 2845, 0, 0xe83968005029ULL }, // Inst #5861 = VCVTNEPS2BF16Zrr |
| 36240 | { 5860, 7, 1, 0, 1984, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0xee3968005019ULL }, // Inst #5860 = VCVTNEPS2BF16Zrmkz |
| 36241 | { 5859, 8, 1, 0, 1984, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0xea3968005019ULL }, // Inst #5859 = VCVTNEPS2BF16Zrmk |
| 36242 | { 5858, 7, 1, 0, 1984, 0, 0, X86ImpOpBase + 0, 2838, 0|(1ULL<<MCID::MayLoad), 0x7e3968005019ULL }, // Inst #5858 = VCVTNEPS2BF16Zrmbkz |
| 36243 | { 5857, 8, 1, 0, 1984, 0, 0, X86ImpOpBase + 0, 2830, 0|(1ULL<<MCID::MayLoad), 0x7a3968005019ULL }, // Inst #5857 = VCVTNEPS2BF16Zrmbk |
| 36244 | { 5856, 6, 1, 0, 1983, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x783968005019ULL }, // Inst #5856 = VCVTNEPS2BF16Zrmb |
| 36245 | { 5855, 6, 1, 0, 1983, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xe83968005019ULL }, // Inst #5855 = VCVTNEPS2BF16Zrm |
| 36246 | { 5854, 3, 1, 0, 1980, 0, 0, X86ImpOpBase + 0, 2827, 0, 0xc73968005029ULL }, // Inst #5854 = VCVTNEPS2BF16Z256rrkz |
| 36247 | { 5853, 4, 1, 0, 1980, 0, 0, X86ImpOpBase + 0, 2823, 0, 0xc33968005029ULL }, // Inst #5853 = VCVTNEPS2BF16Z256rrk |
| 36248 | { 5852, 2, 1, 0, 1978, 0, 0, X86ImpOpBase + 0, 2821, 0, 0xc13968005029ULL }, // Inst #5852 = VCVTNEPS2BF16Z256rr |
| 36249 | { 5851, 7, 1, 0, 1982, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0xc73968005019ULL }, // Inst #5851 = VCVTNEPS2BF16Z256rmkz |
| 36250 | { 5850, 8, 1, 0, 1982, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0xc33968005019ULL }, // Inst #5850 = VCVTNEPS2BF16Z256rmk |
| 36251 | { 5849, 7, 1, 0, 1982, 0, 0, X86ImpOpBase + 0, 2814, 0|(1ULL<<MCID::MayLoad), 0x773968005019ULL }, // Inst #5849 = VCVTNEPS2BF16Z256rmbkz |
| 36252 | { 5848, 8, 1, 0, 1982, 0, 0, X86ImpOpBase + 0, 2806, 0|(1ULL<<MCID::MayLoad), 0x733968005019ULL }, // Inst #5848 = VCVTNEPS2BF16Z256rmbk |
| 36253 | { 5847, 6, 1, 0, 1981, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x713968005019ULL }, // Inst #5847 = VCVTNEPS2BF16Z256rmb |
| 36254 | { 5846, 6, 1, 0, 1981, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xc13968005019ULL }, // Inst #5846 = VCVTNEPS2BF16Z256rm |
| 36255 | { 5845, 3, 1, 0, 1979, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa63968005029ULL }, // Inst #5845 = VCVTNEPS2BF16Z128rrkz |
| 36256 | { 5844, 4, 1, 0, 1979, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa23968005029ULL }, // Inst #5844 = VCVTNEPS2BF16Z128rrk |
| 36257 | { 5843, 2, 1, 0, 1977, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa03968005029ULL }, // Inst #5843 = VCVTNEPS2BF16Z128rr |
| 36258 | { 5842, 7, 1, 0, 1955, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0xa63968005019ULL }, // Inst #5842 = VCVTNEPS2BF16Z128rmkz |
| 36259 | { 5841, 8, 1, 0, 1955, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0xa23968005019ULL }, // Inst #5841 = VCVTNEPS2BF16Z128rmk |
| 36260 | { 5840, 7, 1, 0, 1955, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x763968005019ULL }, // Inst #5840 = VCVTNEPS2BF16Z128rmbkz |
| 36261 | { 5839, 8, 1, 0, 1955, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x723968005019ULL }, // Inst #5839 = VCVTNEPS2BF16Z128rmbk |
| 36262 | { 5838, 6, 1, 0, 1950, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x703968005019ULL }, // Inst #5838 = VCVTNEPS2BF16Z128rmb |
| 36263 | { 5837, 6, 1, 0, 1950, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0xa03968005019ULL }, // Inst #5837 = VCVTNEPS2BF16Z128rm |
| 36264 | { 5836, 2, 1, 0, 353, 0, 0, X86ImpOpBase + 0, 2880, 0, 0x8013920005029ULL }, // Inst #5836 = VCVTNEPS2BF16Yrr |
| 36265 | { 5835, 6, 1, 0, 353, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x8013920005019ULL }, // Inst #5835 = VCVTNEPS2BF16Yrm |
| 36266 | { 5834, 6, 1, 0, 354, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x5820004019ULL }, // Inst #5834 = VCVTNEOPH2PSrm |
| 36267 | { 5833, 6, 1, 0, 353, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x15820004019ULL }, // Inst #5833 = VCVTNEOPH2PSYrm |
| 36268 | { 5832, 6, 1, 0, 354, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x5820005819ULL }, // Inst #5832 = VCVTNEOBF162PSrm |
| 36269 | { 5831, 6, 1, 0, 353, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x15820005819ULL }, // Inst #5831 = VCVTNEOBF162PSYrm |
| 36270 | { 5830, 6, 1, 0, 354, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x5820004819ULL }, // Inst #5830 = VCVTNEEPH2PSrm |
| 36271 | { 5829, 6, 1, 0, 353, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x15820004819ULL }, // Inst #5829 = VCVTNEEPH2PSYrm |
| 36272 | { 5828, 6, 1, 0, 354, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x5820005019ULL }, // Inst #5828 = VCVTNEEBF162PSrm |
| 36273 | { 5827, 6, 1, 0, 353, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x15820005019ULL }, // Inst #5827 = VCVTNEEBF162PSYrm |
| 36274 | { 5826, 4, 1, 0, 1976, 0, 0, X86ImpOpBase + 0, 1819, 0, 0xeeb968005829ULL }, // Inst #5826 = VCVTNE2PS2BF16Zrrkz |
| 36275 | { 5825, 5, 1, 0, 1976, 0, 0, X86ImpOpBase + 0, 1814, 0, 0xeab968005829ULL }, // Inst #5825 = VCVTNE2PS2BF16Zrrk |
| 36276 | { 5824, 3, 1, 0, 1975, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b968005829ULL }, // Inst #5824 = VCVTNE2PS2BF16Zrr |
| 36277 | { 5823, 8, 1, 0, 1974, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0xeeb968005819ULL }, // Inst #5823 = VCVTNE2PS2BF16Zrmkz |
| 36278 | { 5822, 9, 1, 0, 1974, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0xeab968005819ULL }, // Inst #5822 = VCVTNE2PS2BF16Zrmk |
| 36279 | { 5821, 8, 1, 0, 1974, 0, 0, X86ImpOpBase + 0, 1795, 0|(1ULL<<MCID::MayLoad), 0x7eb968005819ULL }, // Inst #5821 = VCVTNE2PS2BF16Zrmbkz |
| 36280 | { 5820, 9, 1, 0, 1974, 0, 0, X86ImpOpBase + 0, 1786, 0|(1ULL<<MCID::MayLoad), 0x7ab968005819ULL }, // Inst #5820 = VCVTNE2PS2BF16Zrmbk |
| 36281 | { 5819, 7, 1, 0, 1971, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78b968005819ULL }, // Inst #5819 = VCVTNE2PS2BF16Zrmb |
| 36282 | { 5818, 7, 1, 0, 1971, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b968005819ULL }, // Inst #5818 = VCVTNE2PS2BF16Zrm |
| 36283 | { 5817, 4, 1, 0, 1968, 0, 0, X86ImpOpBase + 0, 1782, 0, 0xc7b968005829ULL }, // Inst #5817 = VCVTNE2PS2BF16Z256rrkz |
| 36284 | { 5816, 5, 1, 0, 1968, 0, 0, X86ImpOpBase + 0, 1777, 0, 0xc3b968005829ULL }, // Inst #5816 = VCVTNE2PS2BF16Z256rrk |
| 36285 | { 5815, 3, 1, 0, 1966, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b968005829ULL }, // Inst #5815 = VCVTNE2PS2BF16Z256rr |
| 36286 | { 5814, 8, 1, 0, 1970, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0xc7b968005819ULL }, // Inst #5814 = VCVTNE2PS2BF16Z256rmkz |
| 36287 | { 5813, 9, 1, 0, 1970, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0xc3b968005819ULL }, // Inst #5813 = VCVTNE2PS2BF16Z256rmk |
| 36288 | { 5812, 8, 1, 0, 1970, 0, 0, X86ImpOpBase + 0, 1769, 0|(1ULL<<MCID::MayLoad), 0x77b968005819ULL }, // Inst #5812 = VCVTNE2PS2BF16Z256rmbkz |
| 36289 | { 5811, 9, 1, 0, 1970, 0, 0, X86ImpOpBase + 0, 1760, 0|(1ULL<<MCID::MayLoad), 0x73b968005819ULL }, // Inst #5811 = VCVTNE2PS2BF16Z256rmbk |
| 36290 | { 5810, 7, 1, 0, 1969, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71b968005819ULL }, // Inst #5810 = VCVTNE2PS2BF16Z256rmb |
| 36291 | { 5809, 7, 1, 0, 1969, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b968005819ULL }, // Inst #5809 = VCVTNE2PS2BF16Z256rm |
| 36292 | { 5808, 4, 1, 0, 1967, 0, 0, X86ImpOpBase + 0, 1756, 0, 0xa6b968005829ULL }, // Inst #5808 = VCVTNE2PS2BF16Z128rrkz |
| 36293 | { 5807, 5, 1, 0, 1967, 0, 0, X86ImpOpBase + 0, 1751, 0, 0xa2b968005829ULL }, // Inst #5807 = VCVTNE2PS2BF16Z128rrk |
| 36294 | { 5806, 3, 1, 0, 1965, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b968005829ULL }, // Inst #5806 = VCVTNE2PS2BF16Z128rr |
| 36295 | { 5805, 8, 1, 0, 1964, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0xa6b968005819ULL }, // Inst #5805 = VCVTNE2PS2BF16Z128rmkz |
| 36296 | { 5804, 9, 1, 0, 1964, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0xa2b968005819ULL }, // Inst #5804 = VCVTNE2PS2BF16Z128rmk |
| 36297 | { 5803, 8, 1, 0, 1964, 0, 0, X86ImpOpBase + 0, 1743, 0|(1ULL<<MCID::MayLoad), 0x76b968005819ULL }, // Inst #5803 = VCVTNE2PS2BF16Z128rmbkz |
| 36298 | { 5802, 9, 1, 0, 1964, 0, 0, X86ImpOpBase + 0, 1734, 0|(1ULL<<MCID::MayLoad), 0x72b968005819ULL }, // Inst #5802 = VCVTNE2PS2BF16Z128rmbk |
| 36299 | { 5801, 7, 1, 0, 1963, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70b968005819ULL }, // Inst #5801 = VCVTNE2PS2BF16Z128rmb |
| 36300 | { 5800, 7, 1, 0, 1963, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b968005819ULL }, // Inst #5800 = VCVTNE2PS2BF16Z128rm |
| 36301 | { 5799, 2, 1, 0, 1008, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2da8002029ULL }, // Inst #5799 = VCVTDQ2PSrr |
| 36302 | { 5798, 6, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2da8002019ULL }, // Inst #5798 = VCVTDQ2PSrm |
| 36303 | { 5797, 3, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2779, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0002029ULL }, // Inst #5797 = VCVTDQ2PSZrrkz |
| 36304 | { 5796, 4, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2775, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0002029ULL }, // Inst #5796 = VCVTDQ2PSZrrk |
| 36305 | { 5795, 4, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2876, 0, 0x17e2de0002029ULL }, // Inst #5795 = VCVTDQ2PSZrrbkz |
| 36306 | { 5794, 5, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2871, 0, 0x17a2de0002029ULL }, // Inst #5794 = VCVTDQ2PSZrrbk |
| 36307 | { 5793, 3, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2868, 0, 0x1782de0002029ULL }, // Inst #5793 = VCVTDQ2PSZrrb |
| 36308 | { 5792, 2, 1, 0, 383, 1, 0, X86ImpOpBase + 78, 2738, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0002029ULL }, // Inst #5792 = VCVTDQ2PSZrr |
| 36309 | { 5791, 7, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0002019ULL }, // Inst #5791 = VCVTDQ2PSZrmkz |
| 36310 | { 5790, 8, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0002019ULL }, // Inst #5790 = VCVTDQ2PSZrmk |
| 36311 | { 5789, 7, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2273, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2de0002019ULL }, // Inst #5789 = VCVTDQ2PSZrmbkz |
| 36312 | { 5788, 8, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2de0002019ULL }, // Inst #5788 = VCVTDQ2PSZrmbk |
| 36313 | { 5787, 6, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782de0002019ULL }, // Inst #5787 = VCVTDQ2PSZrmb |
| 36314 | { 5786, 6, 1, 0, 1364, 1, 0, X86ImpOpBase + 78, 2259, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0002019ULL }, // Inst #5786 = VCVTDQ2PSZrm |
| 36315 | { 5785, 3, 1, 0, 381, 1, 0, X86ImpOpBase + 78, 2765, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0002029ULL }, // Inst #5785 = VCVTDQ2PSZ256rrkz |
| 36316 | { 5784, 4, 1, 0, 381, 1, 0, X86ImpOpBase + 78, 2761, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0002029ULL }, // Inst #5784 = VCVTDQ2PSZ256rrk |
| 36317 | { 5783, 2, 1, 0, 381, 1, 0, X86ImpOpBase + 78, 2716, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0002029ULL }, // Inst #5783 = VCVTDQ2PSZ256rr |
| 36318 | { 5782, 7, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0002019ULL }, // Inst #5782 = VCVTDQ2PSZ256rmkz |
| 36319 | { 5781, 8, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0002019ULL }, // Inst #5781 = VCVTDQ2PSZ256rmk |
| 36320 | { 5780, 7, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 2243, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772de0002019ULL }, // Inst #5780 = VCVTDQ2PSZ256rmbkz |
| 36321 | { 5779, 8, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732de0002019ULL }, // Inst #5779 = VCVTDQ2PSZ256rmbk |
| 36322 | { 5778, 6, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712de0002019ULL }, // Inst #5778 = VCVTDQ2PSZ256rmb |
| 36323 | { 5777, 6, 1, 0, 1363, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0002019ULL }, // Inst #5777 = VCVTDQ2PSZ256rm |
| 36324 | { 5776, 3, 1, 0, 93, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0002029ULL }, // Inst #5776 = VCVTDQ2PSZ128rrkz |
| 36325 | { 5775, 4, 1, 0, 93, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0002029ULL }, // Inst #5775 = VCVTDQ2PSZ128rrk |
| 36326 | { 5774, 2, 1, 0, 93, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0002029ULL }, // Inst #5774 = VCVTDQ2PSZ128rr |
| 36327 | { 5773, 7, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0002019ULL }, // Inst #5773 = VCVTDQ2PSZ128rmkz |
| 36328 | { 5772, 8, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0002019ULL }, // Inst #5772 = VCVTDQ2PSZ128rmk |
| 36329 | { 5771, 7, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762de0002019ULL }, // Inst #5771 = VCVTDQ2PSZ128rmbkz |
| 36330 | { 5770, 8, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722de0002019ULL }, // Inst #5770 = VCVTDQ2PSZ128rmbk |
| 36331 | { 5769, 6, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702de0002019ULL }, // Inst #5769 = VCVTDQ2PSZ128rmb |
| 36332 | { 5768, 6, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0002019ULL }, // Inst #5768 = VCVTDQ2PSZ128rm |
| 36333 | { 5767, 2, 1, 0, 1009, 1, 0, X86ImpOpBase + 78, 2866, 0|(1ULL<<MCID::MayRaiseFPException), 0x12da8002029ULL }, // Inst #5767 = VCVTDQ2PSYrr |
| 36334 | { 5766, 6, 1, 0, 1359, 1, 0, X86ImpOpBase + 78, 2189, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x12da8002019ULL }, // Inst #5766 = VCVTDQ2PSYrm |
| 36335 | { 5765, 3, 1, 0, 1962, 1, 0, X86ImpOpBase + 78, 2863, 0|(1ULL<<MCID::MayRaiseFPException), 0xee2de0012029ULL }, // Inst #5765 = VCVTDQ2PHZrrkz |
| 36336 | { 5764, 4, 1, 0, 1962, 1, 0, X86ImpOpBase + 78, 2859, 0|(1ULL<<MCID::MayRaiseFPException), 0xea2de0012029ULL }, // Inst #5764 = VCVTDQ2PHZrrk |
| 36337 | { 5763, 4, 1, 0, 1962, 1, 0, X86ImpOpBase + 78, 2855, 0, 0x17e2de0012029ULL }, // Inst #5763 = VCVTDQ2PHZrrbkz |
| 36338 | { 5762, 5, 1, 0, 1962, 1, 0, X86ImpOpBase + 78, 2850, 0, 0x17a2de0012029ULL }, // Inst #5762 = VCVTDQ2PHZrrbk |
| 36339 | { 5761, 3, 1, 0, 1961, 1, 0, X86ImpOpBase + 78, 2847, 0, 0x1782de0012029ULL }, // Inst #5761 = VCVTDQ2PHZrrb |
| 36340 | { 5760, 2, 1, 0, 1961, 1, 0, X86ImpOpBase + 78, 2845, 0|(1ULL<<MCID::MayRaiseFPException), 0xe82de0012029ULL }, // Inst #5760 = VCVTDQ2PHZrr |
| 36341 | { 5759, 7, 1, 0, 1960, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xee2de0012019ULL }, // Inst #5759 = VCVTDQ2PHZrmkz |
| 36342 | { 5758, 8, 1, 0, 1960, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xea2de0012019ULL }, // Inst #5758 = VCVTDQ2PHZrmk |
| 36343 | { 5757, 7, 1, 0, 1960, 1, 0, X86ImpOpBase + 78, 2838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7e2de0012019ULL }, // Inst #5757 = VCVTDQ2PHZrmbkz |
| 36344 | { 5756, 8, 1, 0, 1960, 1, 0, X86ImpOpBase + 78, 2830, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7a2de0012019ULL }, // Inst #5756 = VCVTDQ2PHZrmbk |
| 36345 | { 5755, 6, 1, 0, 1959, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x782de0012019ULL }, // Inst #5755 = VCVTDQ2PHZrmb |
| 36346 | { 5754, 6, 1, 0, 1959, 1, 0, X86ImpOpBase + 78, 292, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe82de0012019ULL }, // Inst #5754 = VCVTDQ2PHZrm |
| 36347 | { 5753, 3, 1, 0, 1958, 1, 0, X86ImpOpBase + 78, 2827, 0|(1ULL<<MCID::MayRaiseFPException), 0xc72de0012029ULL }, // Inst #5753 = VCVTDQ2PHZ256rrkz |
| 36348 | { 5752, 4, 1, 0, 1958, 1, 0, X86ImpOpBase + 78, 2823, 0|(1ULL<<MCID::MayRaiseFPException), 0xc32de0012029ULL }, // Inst #5752 = VCVTDQ2PHZ256rrk |
| 36349 | { 5751, 2, 1, 0, 1957, 1, 0, X86ImpOpBase + 78, 2821, 0|(1ULL<<MCID::MayRaiseFPException), 0xc12de0012029ULL }, // Inst #5751 = VCVTDQ2PHZ256rr |
| 36350 | { 5750, 7, 1, 0, 1956, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc72de0012019ULL }, // Inst #5750 = VCVTDQ2PHZ256rmkz |
| 36351 | { 5749, 8, 1, 0, 1956, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc32de0012019ULL }, // Inst #5749 = VCVTDQ2PHZ256rmk |
| 36352 | { 5748, 7, 1, 0, 1956, 1, 0, X86ImpOpBase + 78, 2814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x772de0012019ULL }, // Inst #5748 = VCVTDQ2PHZ256rmbkz |
| 36353 | { 5747, 8, 1, 0, 1956, 1, 0, X86ImpOpBase + 78, 2806, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x732de0012019ULL }, // Inst #5747 = VCVTDQ2PHZ256rmbk |
| 36354 | { 5746, 6, 1, 0, 1954, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x712de0012019ULL }, // Inst #5746 = VCVTDQ2PHZ256rmb |
| 36355 | { 5745, 6, 1, 0, 1954, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc12de0012019ULL }, // Inst #5745 = VCVTDQ2PHZ256rm |
| 36356 | { 5744, 3, 1, 0, 1953, 1, 0, X86ImpOpBase + 78, 2340, 0|(1ULL<<MCID::MayRaiseFPException), 0xa62de0012029ULL }, // Inst #5744 = VCVTDQ2PHZ128rrkz |
| 36357 | { 5743, 4, 1, 0, 1953, 1, 0, X86ImpOpBase + 78, 2336, 0|(1ULL<<MCID::MayRaiseFPException), 0xa22de0012029ULL }, // Inst #5743 = VCVTDQ2PHZ128rrk |
| 36358 | { 5742, 2, 1, 0, 1952, 1, 0, X86ImpOpBase + 78, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0xa02de0012029ULL }, // Inst #5742 = VCVTDQ2PHZ128rr |
| 36359 | { 5741, 7, 1, 0, 1951, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa62de0012019ULL }, // Inst #5741 = VCVTDQ2PHZ128rmkz |
| 36360 | { 5740, 8, 1, 0, 1951, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa22de0012019ULL }, // Inst #5740 = VCVTDQ2PHZ128rmk |
| 36361 | { 5739, 7, 1, 0, 1951, 1, 0, X86ImpOpBase + 78, 2327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x762de0012019ULL }, // Inst #5739 = VCVTDQ2PHZ128rmbkz |
| 36362 | { 5738, 8, 1, 0, 1951, 1, 0, X86ImpOpBase + 78, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x722de0012019ULL }, // Inst #5738 = VCVTDQ2PHZ128rmbk |
| 36363 | { 5737, 6, 1, 0, 1949, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x702de0012019ULL }, // Inst #5737 = VCVTDQ2PHZ128rmb |
| 36364 | { 5736, 6, 1, 0, 1949, 1, 0, X86ImpOpBase + 78, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa02de0012019ULL }, // Inst #5736 = VCVTDQ2PHZ128rm |
| 36365 | { 5735, 2, 1, 0, 975, 0, 0, X86ImpOpBase + 0, 535, 0, 0x7320003029ULL }, // Inst #5735 = VCVTDQ2PDrr |
| 36366 | { 5734, 6, 1, 0, 1374, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x7320003019ULL }, // Inst #5734 = VCVTDQ2PDrm |
| 36367 | { 5733, 3, 1, 0, 1946, 0, 0, X86ImpOpBase + 0, 2803, 0, 0xce7360003029ULL }, // Inst #5733 = VCVTDQ2PDZrrkz |
| 36368 | { 5732, 4, 1, 0, 1946, 0, 0, X86ImpOpBase + 0, 2799, 0, 0xca7360003029ULL }, // Inst #5732 = VCVTDQ2PDZrrk |
| 36369 | { 5731, 2, 1, 0, 1286, 0, 0, X86ImpOpBase + 0, 2797, 0, 0xc87360003029ULL }, // Inst #5731 = VCVTDQ2PDZrr |
| 36370 | { 5730, 7, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xce7360003019ULL }, // Inst #5730 = VCVTDQ2PDZrmkz |
| 36371 | { 5729, 8, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xca7360003019ULL }, // Inst #5729 = VCVTDQ2PDZrmk |
| 36372 | { 5728, 7, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x7e7360003019ULL }, // Inst #5728 = VCVTDQ2PDZrmbkz |
| 36373 | { 5727, 8, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0x7a7360003019ULL }, // Inst #5727 = VCVTDQ2PDZrmbk |
| 36374 | { 5726, 6, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0x787360003019ULL }, // Inst #5726 = VCVTDQ2PDZrmb |
| 36375 | { 5725, 6, 1, 0, 1362, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc87360003019ULL }, // Inst #5725 = VCVTDQ2PDZrm |
| 36376 | { 5724, 3, 1, 0, 1281, 0, 0, X86ImpOpBase + 0, 2349, 0, 0xa77360003029ULL }, // Inst #5724 = VCVTDQ2PDZ256rrkz |
| 36377 | { 5723, 4, 1, 0, 1281, 0, 0, X86ImpOpBase + 0, 2345, 0, 0xa37360003029ULL }, // Inst #5723 = VCVTDQ2PDZ256rrk |
| 36378 | { 5722, 2, 1, 0, 1281, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xa17360003029ULL }, // Inst #5722 = VCVTDQ2PDZ256rr |
| 36379 | { 5721, 7, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xa77360003019ULL }, // Inst #5721 = VCVTDQ2PDZ256rmkz |
| 36380 | { 5720, 8, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xa37360003019ULL }, // Inst #5720 = VCVTDQ2PDZ256rmk |
| 36381 | { 5719, 7, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x777360003019ULL }, // Inst #5719 = VCVTDQ2PDZ256rmbkz |
| 36382 | { 5718, 8, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0x737360003019ULL }, // Inst #5718 = VCVTDQ2PDZ256rmbk |
| 36383 | { 5717, 6, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0x717360003019ULL }, // Inst #5717 = VCVTDQ2PDZ256rmb |
| 36384 | { 5716, 6, 1, 0, 1361, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa17360003019ULL }, // Inst #5716 = VCVTDQ2PDZ256rm |
| 36385 | { 5715, 3, 1, 0, 1261, 0, 0, X86ImpOpBase + 0, 2706, 0, 0x867360003029ULL }, // Inst #5715 = VCVTDQ2PDZ128rrkz |
| 36386 | { 5714, 4, 1, 0, 1261, 0, 0, X86ImpOpBase + 0, 2702, 0, 0x827360003029ULL }, // Inst #5714 = VCVTDQ2PDZ128rrk |
| 36387 | { 5713, 2, 1, 0, 1261, 0, 0, X86ImpOpBase + 0, 2334, 0, 0x807360003029ULL }, // Inst #5713 = VCVTDQ2PDZ128rr |
| 36388 | { 5712, 7, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x867360003019ULL }, // Inst #5712 = VCVTDQ2PDZ128rmkz |
| 36389 | { 5711, 8, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x827360003019ULL }, // Inst #5711 = VCVTDQ2PDZ128rmk |
| 36390 | { 5710, 7, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 2790, 0|(1ULL<<MCID::MayLoad), 0x767360003019ULL }, // Inst #5710 = VCVTDQ2PDZ128rmbkz |
| 36391 | { 5709, 8, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 2782, 0|(1ULL<<MCID::MayLoad), 0x727360003019ULL }, // Inst #5709 = VCVTDQ2PDZ128rmbk |
| 36392 | { 5708, 6, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x707360003019ULL }, // Inst #5708 = VCVTDQ2PDZ128rmb |
| 36393 | { 5707, 6, 1, 0, 1351, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::MayLoad), 0x807360003019ULL }, // Inst #5707 = VCVTDQ2PDZ128rm |
| 36394 | { 5706, 2, 1, 0, 976, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x17320003029ULL }, // Inst #5706 = VCVTDQ2PDYrr |
| 36395 | { 5705, 6, 1, 0, 1385, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x17320003019ULL }, // Inst #5705 = VCVTDQ2PDYrm |
| 36396 | { 5704, 3, 1, 0, 1276, 0, 0, X86ImpOpBase + 0, 2779, 0, 0xee4578004828ULL }, // Inst #5704 = VCOMPRESSPSZrrkz |
| 36397 | { 5703, 4, 1, 0, 1276, 0, 0, X86ImpOpBase + 0, 2775, 0, 0xea4578004828ULL }, // Inst #5703 = VCOMPRESSPSZrrk |
| 36398 | { 5702, 2, 1, 0, 1940, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe84578004828ULL }, // Inst #5702 = VCOMPRESSPSZrr |
| 36399 | { 5701, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2768, 0|(1ULL<<MCID::MayStore), 0x6a4578004818ULL }, // Inst #5701 = VCOMPRESSPSZmrk |
| 36400 | { 5700, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0x684578004818ULL }, // Inst #5700 = VCOMPRESSPSZmr |
| 36401 | { 5699, 3, 1, 0, 1275, 0, 0, X86ImpOpBase + 0, 2765, 0, 0xc74578004828ULL }, // Inst #5699 = VCOMPRESSPSZ256rrkz |
| 36402 | { 5698, 4, 1, 0, 1275, 0, 0, X86ImpOpBase + 0, 2761, 0, 0xc34578004828ULL }, // Inst #5698 = VCOMPRESSPSZ256rrk |
| 36403 | { 5697, 2, 1, 0, 1939, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc14578004828ULL }, // Inst #5697 = VCOMPRESSPSZ256rr |
| 36404 | { 5696, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2754, 0|(1ULL<<MCID::MayStore), 0x634578004818ULL }, // Inst #5696 = VCOMPRESSPSZ256mrk |
| 36405 | { 5695, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x614578004818ULL }, // Inst #5695 = VCOMPRESSPSZ256mr |
| 36406 | { 5694, 3, 1, 0, 1274, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa64578004828ULL }, // Inst #5694 = VCOMPRESSPSZ128rrkz |
| 36407 | { 5693, 4, 1, 0, 1274, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa24578004828ULL }, // Inst #5693 = VCOMPRESSPSZ128rrk |
| 36408 | { 5692, 2, 1, 0, 1938, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa04578004828ULL }, // Inst #5692 = VCOMPRESSPSZ128rr |
| 36409 | { 5691, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2747, 0|(1ULL<<MCID::MayStore), 0x624578004818ULL }, // Inst #5691 = VCOMPRESSPSZ128mrk |
| 36410 | { 5690, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x604578004818ULL }, // Inst #5690 = VCOMPRESSPSZ128mr |
| 36411 | { 5689, 3, 1, 0, 1276, 0, 0, X86ImpOpBase + 0, 2744, 0, 0xee4578024828ULL }, // Inst #5689 = VCOMPRESSPDZrrkz |
| 36412 | { 5688, 4, 1, 0, 1276, 0, 0, X86ImpOpBase + 0, 2740, 0, 0xea4578024828ULL }, // Inst #5688 = VCOMPRESSPDZrrk |
| 36413 | { 5687, 2, 1, 0, 1940, 0, 0, X86ImpOpBase + 0, 2738, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xe84578024828ULL }, // Inst #5687 = VCOMPRESSPDZrr |
| 36414 | { 5686, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2731, 0|(1ULL<<MCID::MayStore), 0x8a4578024818ULL }, // Inst #5686 = VCOMPRESSPDZmrk |
| 36415 | { 5685, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 2725, 0|(1ULL<<MCID::MayStore), 0x884578024818ULL }, // Inst #5685 = VCOMPRESSPDZmr |
| 36416 | { 5684, 3, 1, 0, 1275, 0, 0, X86ImpOpBase + 0, 2722, 0, 0xc74578024828ULL }, // Inst #5684 = VCOMPRESSPDZ256rrkz |
| 36417 | { 5683, 4, 1, 0, 1275, 0, 0, X86ImpOpBase + 0, 2718, 0, 0xc34578024828ULL }, // Inst #5683 = VCOMPRESSPDZ256rrk |
| 36418 | { 5682, 2, 1, 0, 1939, 0, 0, X86ImpOpBase + 0, 2716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc14578024828ULL }, // Inst #5682 = VCOMPRESSPDZ256rr |
| 36419 | { 5681, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2709, 0|(1ULL<<MCID::MayStore), 0x834578024818ULL }, // Inst #5681 = VCOMPRESSPDZ256mrk |
| 36420 | { 5680, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::MayStore), 0x814578024818ULL }, // Inst #5680 = VCOMPRESSPDZ256mr |
| 36421 | { 5679, 3, 1, 0, 1274, 0, 0, X86ImpOpBase + 0, 2706, 0, 0xa64578024828ULL }, // Inst #5679 = VCOMPRESSPDZ128rrkz |
| 36422 | { 5678, 4, 1, 0, 1274, 0, 0, X86ImpOpBase + 0, 2702, 0, 0xa24578024828ULL }, // Inst #5678 = VCOMPRESSPDZ128rrk |
| 36423 | { 5677, 2, 1, 0, 1938, 0, 0, X86ImpOpBase + 0, 2334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xa04578024828ULL }, // Inst #5677 = VCOMPRESSPDZ128rr |
| 36424 | { 5676, 7, 0, 0, 1305, 0, 0, X86ImpOpBase + 0, 2695, 0|(1ULL<<MCID::MayStore), 0x824578024818ULL }, // Inst #5676 = VCOMPRESSPDZ128mrk |
| 36425 | { 5675, 6, 0, 0, 1935, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::MayStore), 0x804578024818ULL }, // Inst #5675 = VCOMPRESSPDZ128mr |
| 36426 | { 5674, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x17a8002029ULL }, // Inst #5674 = VCOMISSrr_Int |
| 36427 | { 5673, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 986, 0|(1ULL<<MCID::MayRaiseFPException), 0x17a8002029ULL }, // Inst #5673 = VCOMISSrr |
| 36428 | { 5672, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17a8002019ULL }, // Inst #5672 = VCOMISSrm_Int |
| 36429 | { 5671, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17a8002019ULL }, // Inst #5671 = VCOMISSrm |
| 36430 | { 5670, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2334, 0, 0x7017e8042029ULL }, // Inst #5670 = VCOMISSZrrb |
| 36431 | { 5669, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x6017e8002029ULL }, // Inst #5669 = VCOMISSZrr_Int |
| 36432 | { 5668, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2693, 0|(1ULL<<MCID::MayRaiseFPException), 0x6017e8002029ULL }, // Inst #5668 = VCOMISSZrr |
| 36433 | { 5667, 6, 0, 0, 85, 1, 1, X86ImpOpBase + 154, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6017e8002019ULL }, // Inst #5667 = VCOMISSZrm_Int |
| 36434 | { 5666, 6, 0, 0, 85, 1, 1, X86ImpOpBase + 154, 2687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6017e8002019ULL }, // Inst #5666 = VCOMISSZrm |
| 36435 | { 5665, 2, 0, 0, 1822, 1, 1, X86ImpOpBase + 154, 2334, 0, 0x5017e8052029ULL }, // Inst #5665 = VCOMISHZrrb |
| 36436 | { 5664, 2, 0, 0, 1822, 1, 1, X86ImpOpBase + 154, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x4017e8012029ULL }, // Inst #5664 = VCOMISHZrr_Int |
| 36437 | { 5663, 2, 0, 0, 1822, 1, 1, X86ImpOpBase + 154, 2685, 0|(1ULL<<MCID::MayRaiseFPException), 0x4017e8012029ULL }, // Inst #5663 = VCOMISHZrr |
| 36438 | { 5662, 6, 0, 0, 1934, 1, 1, X86ImpOpBase + 154, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4017e8012019ULL }, // Inst #5662 = VCOMISHZrm_Int |
| 36439 | { 5661, 6, 0, 0, 1934, 1, 1, X86ImpOpBase + 154, 2679, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x4017e8012019ULL }, // Inst #5661 = VCOMISHZrm |
| 36440 | { 5660, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x17b0002829ULL }, // Inst #5660 = VCOMISDrr_Int |
| 36441 | { 5659, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 978, 0|(1ULL<<MCID::MayRaiseFPException), 0x17b0002829ULL }, // Inst #5659 = VCOMISDrr |
| 36442 | { 5658, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17b0002819ULL }, // Inst #5658 = VCOMISDrm_Int |
| 36443 | { 5657, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 972, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x17b0002819ULL }, // Inst #5657 = VCOMISDrm |
| 36444 | { 5656, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2334, 0, 0x9017f0062829ULL }, // Inst #5656 = VCOMISDZrrb |
| 36445 | { 5655, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2334, 0|(1ULL<<MCID::MayRaiseFPException), 0x8017f0022829ULL }, // Inst #5655 = VCOMISDZrr_Int |
| 36446 | { 5654, 2, 0, 0, 86, 1, 1, X86ImpOpBase + 154, 2677, 0|(1ULL<<MCID::MayRaiseFPException), 0x8017f0022829ULL }, // Inst #5654 = VCOMISDZrr |
| 36447 | { 5653, 6, 0, 0, 85, 1, 1, X86ImpOpBase + 154, 280, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8017f0022819ULL }, // Inst #5653 = VCOMISDZrm_Int |
| 36448 | { 5652, 6, 0, 0, 85, 1, 1, X86ImpOpBase + 154, 2671, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x8017f0022819ULL }, // Inst #5652 = VCOMISDZrm |
| 36449 | { 5651, 4, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 893, 0|(1ULL<<MCID::MayRaiseFPException), 0xe128043029ULL }, // Inst #5651 = VCMPSSrri_Int |
| 36450 | { 5650, 4, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 825, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe128043029ULL }, // Inst #5650 = VCMPSSrri |
| 36451 | { 5649, 8, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 2203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe128043019ULL }, // Inst #5649 = VCMPSSrmi_Int |
| 36452 | { 5648, 8, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 2663, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe128043019ULL }, // Inst #5648 = VCMPSSrmi |
| 36453 | { 5647, 5, 1, 0, 1244, 1, 0, X86ImpOpBase + 78, 2626, 0, 0x12e168043029ULL }, // Inst #5647 = VCMPSSZrrib_Intk |
| 36454 | { 5646, 4, 1, 0, 1244, 1, 0, X86ImpOpBase + 78, 2622, 0, 0x10e168043029ULL }, // Inst #5646 = VCMPSSZrrib_Int |
| 36455 | { 5645, 5, 1, 0, 1680, 1, 0, X86ImpOpBase + 78, 2626, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2e168043029ULL }, // Inst #5645 = VCMPSSZrri_Intk |
| 36456 | { 5644, 4, 1, 0, 1680, 1, 0, X86ImpOpBase + 78, 2622, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0e168043029ULL }, // Inst #5644 = VCMPSSZrri_Int |
| 36457 | { 5643, 4, 1, 0, 1680, 1, 0, X86ImpOpBase + 78, 2659, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e168043029ULL }, // Inst #5643 = VCMPSSZrri |
| 36458 | { 5642, 9, 1, 0, 1337, 1, 0, X86ImpOpBase + 78, 2609, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62e168043019ULL }, // Inst #5642 = VCMPSSZrmi_Intk |
| 36459 | { 5641, 8, 1, 0, 1337, 1, 0, X86ImpOpBase + 78, 2601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60e168043019ULL }, // Inst #5641 = VCMPSSZrmi_Int |
| 36460 | { 5640, 8, 1, 0, 1337, 1, 0, X86ImpOpBase + 78, 2651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60e168043019ULL }, // Inst #5640 = VCMPSSZrmi |
| 36461 | { 5639, 5, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 2626, 0, 0x12e168047029ULL }, // Inst #5639 = VCMPSHZrrib_Intk |
| 36462 | { 5638, 4, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 2622, 0, 0x10e168047029ULL }, // Inst #5638 = VCMPSHZrrib_Int |
| 36463 | { 5637, 5, 1, 0, 1681, 1, 0, X86ImpOpBase + 78, 2626, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2e168047029ULL }, // Inst #5637 = VCMPSHZrri_Intk |
| 36464 | { 5636, 4, 1, 0, 1681, 1, 0, X86ImpOpBase + 78, 2622, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0e168047029ULL }, // Inst #5636 = VCMPSHZrri_Int |
| 36465 | { 5635, 4, 1, 0, 1681, 1, 0, X86ImpOpBase + 78, 2647, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e168047029ULL }, // Inst #5635 = VCMPSHZrri |
| 36466 | { 5634, 9, 1, 0, 1933, 1, 0, X86ImpOpBase + 78, 2609, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42e168047019ULL }, // Inst #5634 = VCMPSHZrmi_Intk |
| 36467 | { 5633, 8, 1, 0, 1933, 1, 0, X86ImpOpBase + 78, 2601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40e168047019ULL }, // Inst #5633 = VCMPSHZrmi_Int |
| 36468 | { 5632, 8, 1, 0, 1933, 1, 0, X86ImpOpBase + 78, 2639, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40e168047019ULL }, // Inst #5632 = VCMPSHZrmi |
| 36469 | { 5631, 4, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 893, 0|(1ULL<<MCID::MayRaiseFPException), 0xe130043829ULL }, // Inst #5631 = VCMPSDrri_Int |
| 36470 | { 5630, 4, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 833, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe130043829ULL }, // Inst #5630 = VCMPSDrri |
| 36471 | { 5629, 8, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 2203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe130043819ULL }, // Inst #5629 = VCMPSDrmi_Int |
| 36472 | { 5628, 8, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 2631, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe130043819ULL }, // Inst #5628 = VCMPSDrmi |
| 36473 | { 5627, 5, 1, 0, 1244, 1, 0, X86ImpOpBase + 78, 2626, 0, 0x12e170063829ULL }, // Inst #5627 = VCMPSDZrrib_Intk |
| 36474 | { 5626, 4, 1, 0, 1244, 1, 0, X86ImpOpBase + 78, 2622, 0, 0x10e170063829ULL }, // Inst #5626 = VCMPSDZrrib_Int |
| 36475 | { 5625, 5, 1, 0, 1680, 1, 0, X86ImpOpBase + 78, 2626, 0|(1ULL<<MCID::MayRaiseFPException), 0xa2e170063829ULL }, // Inst #5625 = VCMPSDZrri_Intk |
| 36476 | { 5624, 4, 1, 0, 1680, 1, 0, X86ImpOpBase + 78, 2622, 0|(1ULL<<MCID::MayRaiseFPException), 0xa0e170063829ULL }, // Inst #5624 = VCMPSDZrri_Int |
| 36477 | { 5623, 4, 1, 0, 1680, 1, 0, X86ImpOpBase + 78, 2618, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e170063829ULL }, // Inst #5623 = VCMPSDZrri |
| 36478 | { 5622, 9, 1, 0, 1337, 1, 0, X86ImpOpBase + 78, 2609, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82e170063819ULL }, // Inst #5622 = VCMPSDZrmi_Intk |
| 36479 | { 5621, 8, 1, 0, 1337, 1, 0, X86ImpOpBase + 78, 2601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80e170063819ULL }, // Inst #5621 = VCMPSDZrmi_Int |
| 36480 | { 5620, 8, 1, 0, 1337, 1, 0, X86ImpOpBase + 78, 2593, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80e170063819ULL }, // Inst #5620 = VCMPSDZrmi |
| 36481 | { 5619, 4, 1, 0, 1115, 1, 0, X86ImpOpBase + 78, 893, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe128042029ULL }, // Inst #5619 = VCMPPSrri |
| 36482 | { 5618, 8, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 2203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe128042019ULL }, // Inst #5618 = VCMPPSrmi |
| 36483 | { 5617, 5, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 2588, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeae168042029ULL }, // Inst #5617 = VCMPPSZrrik |
| 36484 | { 5616, 5, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 2588, 0, 0x7ae168042029ULL }, // Inst #5616 = VCMPPSZrribk |
| 36485 | { 5615, 4, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 2584, 0, 0x78e168042029ULL }, // Inst #5615 = VCMPPSZrrib |
| 36486 | { 5614, 4, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 2584, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8e168042029ULL }, // Inst #5614 = VCMPPSZrri |
| 36487 | { 5613, 9, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 2575, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeae168042019ULL }, // Inst #5613 = VCMPPSZrmik |
| 36488 | { 5612, 8, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 2567, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8e168042019ULL }, // Inst #5612 = VCMPPSZrmi |
| 36489 | { 5611, 9, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 2575, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7ae168042019ULL }, // Inst #5611 = VCMPPSZrmbik |
| 36490 | { 5610, 8, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 2567, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78e168042019ULL }, // Inst #5610 = VCMPPSZrmbi |
| 36491 | { 5609, 5, 1, 0, 1242, 1, 0, X86ImpOpBase + 78, 2562, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3e168042029ULL }, // Inst #5609 = VCMPPSZ256rrik |
| 36492 | { 5608, 4, 1, 0, 1242, 1, 0, X86ImpOpBase + 78, 2558, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1e168042029ULL }, // Inst #5608 = VCMPPSZ256rri |
| 36493 | { 5607, 9, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 2549, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3e168042019ULL }, // Inst #5607 = VCMPPSZ256rmik |
| 36494 | { 5606, 8, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 2541, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1e168042019ULL }, // Inst #5606 = VCMPPSZ256rmi |
| 36495 | { 5605, 9, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 2549, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73e168042019ULL }, // Inst #5605 = VCMPPSZ256rmbik |
| 36496 | { 5604, 8, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 2541, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71e168042019ULL }, // Inst #5604 = VCMPPSZ256rmbi |
| 36497 | { 5603, 5, 1, 0, 1241, 1, 0, X86ImpOpBase + 78, 2536, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2e168042029ULL }, // Inst #5603 = VCMPPSZ128rrik |
| 36498 | { 5602, 4, 1, 0, 1241, 1, 0, X86ImpOpBase + 78, 2532, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e168042029ULL }, // Inst #5602 = VCMPPSZ128rri |
| 36499 | { 5601, 9, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 2523, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2e168042019ULL }, // Inst #5601 = VCMPPSZ128rmik |
| 36500 | { 5600, 8, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 2515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0e168042019ULL }, // Inst #5600 = VCMPPSZ128rmi |
| 36501 | { 5599, 9, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 2523, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72e168042019ULL }, // Inst #5599 = VCMPPSZ128rmbik |
| 36502 | { 5598, 8, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 2515, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70e168042019ULL }, // Inst #5598 = VCMPPSZ128rmbi |
| 36503 | { 5597, 4, 1, 0, 371, 1, 0, X86ImpOpBase + 78, 901, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1e128042029ULL }, // Inst #5597 = VCMPPSYrri |
| 36504 | { 5596, 8, 1, 0, 370, 1, 0, X86ImpOpBase + 78, 2195, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1e128042019ULL }, // Inst #5596 = VCMPPSYrmi |
| 36505 | { 5595, 5, 1, 0, 373, 1, 0, X86ImpOpBase + 78, 2510, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeae168046029ULL }, // Inst #5595 = VCMPPHZrrik |
| 36506 | { 5594, 5, 1, 0, 373, 1, 0, X86ImpOpBase + 78, 2510, 0, 0x5ae168046029ULL }, // Inst #5594 = VCMPPHZrribk |
| 36507 | { 5593, 4, 1, 0, 373, 1, 0, X86ImpOpBase + 78, 2506, 0, 0x58e168046029ULL }, // Inst #5593 = VCMPPHZrrib |
| 36508 | { 5592, 4, 1, 0, 373, 1, 0, X86ImpOpBase + 78, 2506, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8e168046029ULL }, // Inst #5592 = VCMPPHZrri |
| 36509 | { 5591, 9, 1, 0, 1932, 1, 0, X86ImpOpBase + 78, 2497, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeae168046019ULL }, // Inst #5591 = VCMPPHZrmik |
| 36510 | { 5590, 8, 1, 0, 1932, 1, 0, X86ImpOpBase + 78, 2489, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8e168046019ULL }, // Inst #5590 = VCMPPHZrmi |
| 36511 | { 5589, 9, 1, 0, 1932, 1, 0, X86ImpOpBase + 78, 2497, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5ae168046019ULL }, // Inst #5589 = VCMPPHZrmbik |
| 36512 | { 5588, 8, 1, 0, 1932, 1, 0, X86ImpOpBase + 78, 2489, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58e168046019ULL }, // Inst #5588 = VCMPPHZrmbi |
| 36513 | { 5587, 5, 1, 0, 1679, 1, 0, X86ImpOpBase + 78, 2484, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3e168046029ULL }, // Inst #5587 = VCMPPHZ256rrik |
| 36514 | { 5586, 4, 1, 0, 1679, 1, 0, X86ImpOpBase + 78, 2480, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1e168046029ULL }, // Inst #5586 = VCMPPHZ256rri |
| 36515 | { 5585, 9, 1, 0, 1931, 1, 0, X86ImpOpBase + 78, 2471, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3e168046019ULL }, // Inst #5585 = VCMPPHZ256rmik |
| 36516 | { 5584, 8, 1, 0, 1931, 1, 0, X86ImpOpBase + 78, 2463, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1e168046019ULL }, // Inst #5584 = VCMPPHZ256rmi |
| 36517 | { 5583, 9, 1, 0, 1931, 1, 0, X86ImpOpBase + 78, 2471, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53e168046019ULL }, // Inst #5583 = VCMPPHZ256rmbik |
| 36518 | { 5582, 8, 1, 0, 1931, 1, 0, X86ImpOpBase + 78, 2463, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51e168046019ULL }, // Inst #5582 = VCMPPHZ256rmbi |
| 36519 | { 5581, 5, 1, 0, 1678, 1, 0, X86ImpOpBase + 78, 2458, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2e168046029ULL }, // Inst #5581 = VCMPPHZ128rrik |
| 36520 | { 5580, 4, 1, 0, 1678, 1, 0, X86ImpOpBase + 78, 2454, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e168046029ULL }, // Inst #5580 = VCMPPHZ128rri |
| 36521 | { 5579, 9, 1, 0, 1930, 1, 0, X86ImpOpBase + 78, 2445, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2e168046019ULL }, // Inst #5579 = VCMPPHZ128rmik |
| 36522 | { 5578, 8, 1, 0, 1930, 1, 0, X86ImpOpBase + 78, 2437, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0e168046019ULL }, // Inst #5578 = VCMPPHZ128rmi |
| 36523 | { 5577, 9, 1, 0, 1930, 1, 0, X86ImpOpBase + 78, 2445, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52e168046019ULL }, // Inst #5577 = VCMPPHZ128rmbik |
| 36524 | { 5576, 8, 1, 0, 1930, 1, 0, X86ImpOpBase + 78, 2437, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50e168046019ULL }, // Inst #5576 = VCMPPHZ128rmbi |
| 36525 | { 5575, 4, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 893, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe130042829ULL }, // Inst #5575 = VCMPPDrri |
| 36526 | { 5574, 8, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 2203, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe130042819ULL }, // Inst #5574 = VCMPPDrmi |
| 36527 | { 5573, 5, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 2432, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeae170062829ULL }, // Inst #5573 = VCMPPDZrrik |
| 36528 | { 5572, 5, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 2432, 0, 0x9ae170062829ULL }, // Inst #5572 = VCMPPDZrribk |
| 36529 | { 5571, 4, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 2428, 0, 0x98e170062829ULL }, // Inst #5571 = VCMPPDZrrib |
| 36530 | { 5570, 4, 1, 0, 1243, 1, 0, X86ImpOpBase + 78, 2428, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8e170062829ULL }, // Inst #5570 = VCMPPDZrri |
| 36531 | { 5569, 9, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 2419, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeae170062819ULL }, // Inst #5569 = VCMPPDZrmik |
| 36532 | { 5568, 8, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 2411, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8e170062819ULL }, // Inst #5568 = VCMPPDZrmi |
| 36533 | { 5567, 9, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 2419, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9ae170062819ULL }, // Inst #5567 = VCMPPDZrmbik |
| 36534 | { 5566, 8, 1, 0, 1346, 1, 0, X86ImpOpBase + 78, 2411, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98e170062819ULL }, // Inst #5566 = VCMPPDZrmbi |
| 36535 | { 5565, 5, 1, 0, 1242, 1, 0, X86ImpOpBase + 78, 2406, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3e170062829ULL }, // Inst #5565 = VCMPPDZ256rrik |
| 36536 | { 5564, 4, 1, 0, 1242, 1, 0, X86ImpOpBase + 78, 2402, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1e170062829ULL }, // Inst #5564 = VCMPPDZ256rri |
| 36537 | { 5563, 9, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 2393, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3e170062819ULL }, // Inst #5563 = VCMPPDZ256rmik |
| 36538 | { 5562, 8, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 2385, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1e170062819ULL }, // Inst #5562 = VCMPPDZ256rmi |
| 36539 | { 5561, 9, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 2393, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93e170062819ULL }, // Inst #5561 = VCMPPDZ256rmbik |
| 36540 | { 5560, 8, 1, 0, 1345, 1, 0, X86ImpOpBase + 78, 2385, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91e170062819ULL }, // Inst #5560 = VCMPPDZ256rmbi |
| 36541 | { 5559, 5, 1, 0, 1241, 1, 0, X86ImpOpBase + 78, 2380, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2e170062829ULL }, // Inst #5559 = VCMPPDZ128rrik |
| 36542 | { 5558, 4, 1, 0, 1241, 1, 0, X86ImpOpBase + 78, 2376, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0e170062829ULL }, // Inst #5558 = VCMPPDZ128rri |
| 36543 | { 5557, 9, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 2367, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2e170062819ULL }, // Inst #5557 = VCMPPDZ128rmik |
| 36544 | { 5556, 8, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 2359, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0e170062819ULL }, // Inst #5556 = VCMPPDZ128rmi |
| 36545 | { 5555, 9, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 2367, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92e170062819ULL }, // Inst #5555 = VCMPPDZ128rmbik |
| 36546 | { 5554, 8, 1, 0, 1336, 1, 0, X86ImpOpBase + 78, 2359, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90e170062819ULL }, // Inst #5554 = VCMPPDZ128rmbi |
| 36547 | { 5553, 4, 1, 0, 369, 1, 0, X86ImpOpBase + 78, 901, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1e130042829ULL }, // Inst #5553 = VCMPPDYrri |
| 36548 | { 5552, 8, 1, 0, 368, 1, 0, X86ImpOpBase + 78, 2195, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1e130042819ULL }, // Inst #5552 = VCMPPDYrmi |
| 36549 | { 5551, 2, 1, 0, 182, 0, 0, X86ImpOpBase + 0, 535, 0, 0xc28004829ULL }, // Inst #5551 = VBROADCASTSSrr |
| 36550 | { 5550, 6, 1, 0, 770, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0xc28004819ULL }, // Inst #5550 = VBROADCASTSSrm |
| 36551 | { 5549, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2286, 0, 0xee0c68004829ULL }, // Inst #5549 = VBROADCASTSSZrrkz |
| 36552 | { 5548, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2282, 0, 0xea0c68004829ULL }, // Inst #5548 = VBROADCASTSSZrrk |
| 36553 | { 5547, 2, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xe80c68004829ULL }, // Inst #5547 = VBROADCASTSSZrr |
| 36554 | { 5546, 7, 1, 0, 1794, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0x6e0c68004819ULL }, // Inst #5546 = VBROADCASTSSZrmkz |
| 36555 | { 5545, 8, 1, 0, 1794, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x6a0c68004819ULL }, // Inst #5545 = VBROADCASTSSZrmk |
| 36556 | { 5544, 6, 1, 0, 1786, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x680c68004819ULL }, // Inst #5544 = VBROADCASTSSZrm |
| 36557 | { 5543, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2256, 0, 0xc70c68004829ULL }, // Inst #5543 = VBROADCASTSSZ256rrkz |
| 36558 | { 5542, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2252, 0, 0xc30c68004829ULL }, // Inst #5542 = VBROADCASTSSZ256rrk |
| 36559 | { 5541, 2, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xc10c68004829ULL }, // Inst #5541 = VBROADCASTSSZ256rr |
| 36560 | { 5540, 7, 1, 0, 1316, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x670c68004819ULL }, // Inst #5540 = VBROADCASTSSZ256rmkz |
| 36561 | { 5539, 8, 1, 0, 1316, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x630c68004819ULL }, // Inst #5539 = VBROADCASTSSZ256rmk |
| 36562 | { 5538, 6, 1, 0, 1786, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x610c68004819ULL }, // Inst #5538 = VBROADCASTSSZ256rm |
| 36563 | { 5537, 3, 1, 0, 1765, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa60c68004829ULL }, // Inst #5537 = VBROADCASTSSZ128rrkz |
| 36564 | { 5536, 4, 1, 0, 1765, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa20c68004829ULL }, // Inst #5536 = VBROADCASTSSZ128rrk |
| 36565 | { 5535, 2, 1, 0, 1765, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa00c68004829ULL }, // Inst #5535 = VBROADCASTSSZ128rr |
| 36566 | { 5534, 7, 1, 0, 1294, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x660c68004819ULL }, // Inst #5534 = VBROADCASTSSZ128rmkz |
| 36567 | { 5533, 8, 1, 0, 1294, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x620c68004819ULL }, // Inst #5533 = VBROADCASTSSZ128rmk |
| 36568 | { 5532, 6, 1, 0, 1754, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x600c68004819ULL }, // Inst #5532 = VBROADCASTSSZ128rm |
| 36569 | { 5531, 2, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x10c28004829ULL }, // Inst #5531 = VBROADCASTSSYrr |
| 36570 | { 5530, 6, 1, 0, 831, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x10c28004819ULL }, // Inst #5530 = VBROADCASTSSYrm |
| 36571 | { 5529, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2356, 0, 0xee0cf0024829ULL }, // Inst #5529 = VBROADCASTSDZrrkz |
| 36572 | { 5528, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2352, 0, 0xea0cf0024829ULL }, // Inst #5528 = VBROADCASTSDZrrk |
| 36573 | { 5527, 2, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xe80cf0024829ULL }, // Inst #5527 = VBROADCASTSDZrr |
| 36574 | { 5526, 7, 1, 0, 1794, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0x8e0cf0024819ULL }, // Inst #5526 = VBROADCASTSDZrmkz |
| 36575 | { 5525, 8, 1, 0, 1794, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x8a0cf0024819ULL }, // Inst #5525 = VBROADCASTSDZrmk |
| 36576 | { 5524, 6, 1, 0, 1786, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x880cf0024819ULL }, // Inst #5524 = VBROADCASTSDZrm |
| 36577 | { 5523, 3, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2349, 0, 0xc70cf0024829ULL }, // Inst #5523 = VBROADCASTSDZ256rrkz |
| 36578 | { 5522, 4, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2345, 0, 0xc30cf0024829ULL }, // Inst #5522 = VBROADCASTSDZ256rrk |
| 36579 | { 5521, 2, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xc10cf0024829ULL }, // Inst #5521 = VBROADCASTSDZ256rr |
| 36580 | { 5520, 7, 1, 0, 1316, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0x870cf0024819ULL }, // Inst #5520 = VBROADCASTSDZ256rmkz |
| 36581 | { 5519, 8, 1, 0, 1316, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::ConvertibleTo3Addr), 0x830cf0024819ULL }, // Inst #5519 = VBROADCASTSDZ256rmk |
| 36582 | { 5518, 6, 1, 0, 1786, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810cf0024819ULL }, // Inst #5518 = VBROADCASTSDZ256rm |
| 36583 | { 5517, 2, 1, 0, 366, 0, 0, X86ImpOpBase + 0, 2343, 0, 0x10cb0004829ULL }, // Inst #5517 = VBROADCASTSDYrr |
| 36584 | { 5516, 6, 1, 0, 831, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x10cb0004819ULL }, // Inst #5516 = VBROADCASTSDYrm |
| 36585 | { 5515, 7, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xce2df8024819ULL }, // Inst #5515 = VBROADCASTI64X4rmkz |
| 36586 | { 5514, 8, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xca2df8024819ULL }, // Inst #5514 = VBROADCASTI64X4rmk |
| 36587 | { 5513, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc82df8024819ULL }, // Inst #5513 = VBROADCASTI64X4rm |
| 36588 | { 5512, 7, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xae2d78024819ULL }, // Inst #5512 = VBROADCASTI64X2rmkz |
| 36589 | { 5511, 8, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xaa2d78024819ULL }, // Inst #5511 = VBROADCASTI64X2rmk |
| 36590 | { 5510, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xa82d78024819ULL }, // Inst #5510 = VBROADCASTI64X2rm |
| 36591 | { 5509, 7, 1, 0, 1315, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xa72d78024819ULL }, // Inst #5509 = VBROADCASTI64X2Z128rmkz |
| 36592 | { 5508, 8, 1, 0, 1315, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xa32d78024819ULL }, // Inst #5508 = VBROADCASTI64X2Z128rmk |
| 36593 | { 5507, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa12d78024819ULL }, // Inst #5507 = VBROADCASTI64X2Z128rm |
| 36594 | { 5506, 7, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xce2df8004819ULL }, // Inst #5506 = VBROADCASTI32X8rmkz |
| 36595 | { 5505, 8, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xca2df8004819ULL }, // Inst #5505 = VBROADCASTI32X8rmk |
| 36596 | { 5504, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc82df8004819ULL }, // Inst #5504 = VBROADCASTI32X8rm |
| 36597 | { 5503, 7, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xae2d78004819ULL }, // Inst #5503 = VBROADCASTI32X4rmkz |
| 36598 | { 5502, 8, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xaa2d78004819ULL }, // Inst #5502 = VBROADCASTI32X4rmk |
| 36599 | { 5501, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xa82d78004819ULL }, // Inst #5501 = VBROADCASTI32X4rm |
| 36600 | { 5500, 7, 1, 0, 1315, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xa72d78004819ULL }, // Inst #5500 = VBROADCASTI32X4Z256rmkz |
| 36601 | { 5499, 8, 1, 0, 1315, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0xa32d78004819ULL }, // Inst #5499 = VBROADCASTI32X4Z256rmk |
| 36602 | { 5498, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa12d78004819ULL }, // Inst #5498 = VBROADCASTI32X4Z256rm |
| 36603 | { 5497, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2286, 0, 0xee2cf8004829ULL }, // Inst #5497 = VBROADCASTI32X2Zrrkz |
| 36604 | { 5496, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2282, 0, 0xea2cf8004829ULL }, // Inst #5496 = VBROADCASTI32X2Zrrk |
| 36605 | { 5495, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xe82cf8004829ULL }, // Inst #5495 = VBROADCASTI32X2Zrr |
| 36606 | { 5494, 7, 1, 0, 1792, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0x8e2cf8004819ULL }, // Inst #5494 = VBROADCASTI32X2Zrmkz |
| 36607 | { 5493, 8, 1, 0, 1792, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0x8a2cf8004819ULL }, // Inst #5493 = VBROADCASTI32X2Zrmk |
| 36608 | { 5492, 6, 1, 0, 1784, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x882cf8004819ULL }, // Inst #5492 = VBROADCASTI32X2Zrm |
| 36609 | { 5491, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2256, 0, 0xc72cf8004829ULL }, // Inst #5491 = VBROADCASTI32X2Z256rrkz |
| 36610 | { 5490, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2252, 0, 0xc32cf8004829ULL }, // Inst #5490 = VBROADCASTI32X2Z256rrk |
| 36611 | { 5489, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xc12cf8004829ULL }, // Inst #5489 = VBROADCASTI32X2Z256rr |
| 36612 | { 5488, 7, 1, 0, 1314, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x872cf8004819ULL }, // Inst #5488 = VBROADCASTI32X2Z256rmkz |
| 36613 | { 5487, 8, 1, 0, 1314, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0x832cf8004819ULL }, // Inst #5487 = VBROADCASTI32X2Z256rmk |
| 36614 | { 5486, 6, 1, 0, 1784, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x812cf8004819ULL }, // Inst #5486 = VBROADCASTI32X2Z256rm |
| 36615 | { 5485, 3, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2340, 0, 0xa62cf8004829ULL }, // Inst #5485 = VBROADCASTI32X2Z128rrkz |
| 36616 | { 5484, 4, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2336, 0, 0xa22cf8004829ULL }, // Inst #5484 = VBROADCASTI32X2Z128rrk |
| 36617 | { 5483, 2, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 2334, 0, 0xa02cf8004829ULL }, // Inst #5483 = VBROADCASTI32X2Z128rr |
| 36618 | { 5482, 7, 1, 0, 1293, 0, 0, X86ImpOpBase + 0, 2327, 0|(1ULL<<MCID::MayLoad), 0x862cf8004819ULL }, // Inst #5482 = VBROADCASTI32X2Z128rmkz |
| 36619 | { 5481, 8, 1, 0, 1293, 0, 0, X86ImpOpBase + 0, 2319, 0|(1ULL<<MCID::MayLoad), 0x822cf8004819ULL }, // Inst #5481 = VBROADCASTI32X2Z128rmk |
| 36620 | { 5480, 6, 1, 0, 1757, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x802cf8004819ULL }, // Inst #5480 = VBROADCASTI32X2Z128rm |
| 36621 | { 5479, 6, 1, 0, 832, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x12d38004819ULL }, // Inst #5479 = VBROADCASTI128rm |
| 36622 | { 5478, 7, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xce0df8024819ULL }, // Inst #5478 = VBROADCASTF64X4rmkz |
| 36623 | { 5477, 8, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xca0df8024819ULL }, // Inst #5477 = VBROADCASTF64X4rmk |
| 36624 | { 5476, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc80df8024819ULL }, // Inst #5476 = VBROADCASTF64X4rm |
| 36625 | { 5475, 7, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2312, 0|(1ULL<<MCID::MayLoad), 0xae0d78024819ULL }, // Inst #5475 = VBROADCASTF64X2rmkz |
| 36626 | { 5474, 8, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2304, 0|(1ULL<<MCID::MayLoad), 0xaa0d78024819ULL }, // Inst #5474 = VBROADCASTF64X2rmk |
| 36627 | { 5473, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xa80d78024819ULL }, // Inst #5473 = VBROADCASTF64X2rm |
| 36628 | { 5472, 7, 1, 0, 1315, 0, 0, X86ImpOpBase + 0, 2297, 0|(1ULL<<MCID::MayLoad), 0xa70d78024819ULL }, // Inst #5472 = VBROADCASTF64X2Z128rmkz |
| 36629 | { 5471, 8, 1, 0, 1315, 0, 0, X86ImpOpBase + 0, 2289, 0|(1ULL<<MCID::MayLoad), 0xa30d78024819ULL }, // Inst #5471 = VBROADCASTF64X2Z128rmk |
| 36630 | { 5470, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa10d78024819ULL }, // Inst #5470 = VBROADCASTF64X2Z128rm |
| 36631 | { 5469, 7, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xce0df8004819ULL }, // Inst #5469 = VBROADCASTF32X8rmkz |
| 36632 | { 5468, 8, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xca0df8004819ULL }, // Inst #5468 = VBROADCASTF32X8rmk |
| 36633 | { 5467, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xc80df8004819ULL }, // Inst #5467 = VBROADCASTF32X8rm |
| 36634 | { 5466, 7, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0xae0d78004819ULL }, // Inst #5466 = VBROADCASTF32X4rmkz |
| 36635 | { 5465, 8, 1, 0, 1793, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0xaa0d78004819ULL }, // Inst #5465 = VBROADCASTF32X4rmk |
| 36636 | { 5464, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::MayLoad), 0xa80d78004819ULL }, // Inst #5464 = VBROADCASTF32X4rm |
| 36637 | { 5463, 7, 1, 0, 1315, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0xa70d78004819ULL }, // Inst #5463 = VBROADCASTF32X4Z256rmkz |
| 36638 | { 5462, 8, 1, 0, 1315, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0xa30d78004819ULL }, // Inst #5462 = VBROADCASTF32X4Z256rmk |
| 36639 | { 5461, 6, 1, 0, 1785, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::MayLoad), 0xa10d78004819ULL }, // Inst #5461 = VBROADCASTF32X4Z256rm |
| 36640 | { 5460, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2286, 0, 0xee0cf0004829ULL }, // Inst #5460 = VBROADCASTF32X2Zrrkz |
| 36641 | { 5459, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2282, 0, 0xea0cf0004829ULL }, // Inst #5459 = VBROADCASTF32X2Zrrk |
| 36642 | { 5458, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2280, 0, 0xe80cf0004829ULL }, // Inst #5458 = VBROADCASTF32X2Zrr |
| 36643 | { 5457, 7, 1, 0, 1792, 0, 0, X86ImpOpBase + 0, 2273, 0|(1ULL<<MCID::MayLoad), 0x8e0cf0004819ULL }, // Inst #5457 = VBROADCASTF32X2Zrmkz |
| 36644 | { 5456, 8, 1, 0, 1792, 0, 0, X86ImpOpBase + 0, 2265, 0|(1ULL<<MCID::MayLoad), 0x8a0cf0004819ULL }, // Inst #5456 = VBROADCASTF32X2Zrmk |
| 36645 | { 5455, 6, 1, 0, 1784, 0, 0, X86ImpOpBase + 0, 2259, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x880cf0004819ULL }, // Inst #5455 = VBROADCASTF32X2Zrm |
| 36646 | { 5454, 3, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2256, 0, 0xc70cf0004829ULL }, // Inst #5454 = VBROADCASTF32X2Z256rrkz |
| 36647 | { 5453, 4, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2252, 0, 0xc30cf0004829ULL }, // Inst #5453 = VBROADCASTF32X2Z256rrk |
| 36648 | { 5452, 2, 1, 0, 364, 0, 0, X86ImpOpBase + 0, 2250, 0, 0xc10cf0004829ULL }, // Inst #5452 = VBROADCASTF32X2Z256rr |
| 36649 | { 5451, 7, 1, 0, 1314, 0, 0, X86ImpOpBase + 0, 2243, 0|(1ULL<<MCID::MayLoad), 0x870cf0004819ULL }, // Inst #5451 = VBROADCASTF32X2Z256rmkz |
| 36650 | { 5450, 8, 1, 0, 1314, 0, 0, X86ImpOpBase + 0, 2235, 0|(1ULL<<MCID::MayLoad), 0x830cf0004819ULL }, // Inst #5450 = VBROADCASTF32X2Z256rmk |
| 36651 | { 5449, 6, 1, 0, 1784, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810cf0004819ULL }, // Inst #5449 = VBROADCASTF32X2Z256rm |
| 36652 | { 5448, 6, 1, 0, 968, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x10d28004819ULL }, // Inst #5448 = VBROADCASTF128rm |
| 36653 | { 5447, 4, 1, 0, 1627, 0, 0, X86ImpOpBase + 0, 2231, 0, 0xa5280c6829ULL }, // Inst #5447 = VBLENDVPSrrr |
| 36654 | { 5446, 8, 1, 0, 1625, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xa5280c6819ULL }, // Inst #5446 = VBLENDVPSrmr |
| 36655 | { 5445, 4, 1, 0, 1925, 0, 0, X86ImpOpBase + 0, 2219, 0, 0x1a5280c6829ULL }, // Inst #5445 = VBLENDVPSYrrr |
| 36656 | { 5444, 8, 1, 0, 1923, 0, 0, X86ImpOpBase + 0, 2211, 0|(1ULL<<MCID::MayLoad), 0x1a5280c6819ULL }, // Inst #5444 = VBLENDVPSYrmr |
| 36657 | { 5443, 4, 1, 0, 1627, 0, 0, X86ImpOpBase + 0, 2231, 0, 0xa5b00c6829ULL }, // Inst #5443 = VBLENDVPDrrr |
| 36658 | { 5442, 8, 1, 0, 1625, 0, 0, X86ImpOpBase + 0, 2223, 0|(1ULL<<MCID::MayLoad), 0xa5b00c6819ULL }, // Inst #5442 = VBLENDVPDrmr |
| 36659 | { 5441, 4, 1, 0, 1925, 0, 0, X86ImpOpBase + 0, 2219, 0, 0x1a5b00c6829ULL }, // Inst #5441 = VBLENDVPDYrrr |
| 36660 | { 5440, 8, 1, 0, 1923, 0, 0, X86ImpOpBase + 0, 2211, 0|(1ULL<<MCID::MayLoad), 0x1a5b00c6819ULL }, // Inst #5440 = VBLENDVPDYrmr |
| 36661 | { 5439, 4, 1, 0, 50, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0x8628046829ULL }, // Inst #5439 = VBLENDPSrri |
| 36662 | { 5438, 8, 1, 0, 49, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0x8628046819ULL }, // Inst #5438 = VBLENDPSrmi |
| 36663 | { 5437, 4, 1, 0, 360, 0, 0, X86ImpOpBase + 0, 901, 0|(1ULL<<MCID::Commutable), 0x18628046829ULL }, // Inst #5437 = VBLENDPSYrri |
| 36664 | { 5436, 8, 1, 0, 359, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x18628046819ULL }, // Inst #5436 = VBLENDPSYrmi |
| 36665 | { 5435, 4, 1, 0, 50, 0, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::Commutable), 0x86b0046829ULL }, // Inst #5435 = VBLENDPDrri |
| 36666 | { 5434, 8, 1, 0, 49, 0, 0, X86ImpOpBase + 0, 2203, 0|(1ULL<<MCID::MayLoad), 0x86b0046819ULL }, // Inst #5434 = VBLENDPDrmi |
| 36667 | { 5433, 4, 1, 0, 360, 0, 0, X86ImpOpBase + 0, 901, 0|(1ULL<<MCID::Commutable), 0x186b0046829ULL }, // Inst #5433 = VBLENDPDYrri |
| 36668 | { 5432, 8, 1, 0, 359, 0, 0, X86ImpOpBase + 0, 2195, 0|(1ULL<<MCID::MayLoad), 0x186b0046819ULL }, // Inst #5432 = VBLENDPDYrmi |
| 36669 | { 5431, 4, 1, 0, 358, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeeb2e8004829ULL }, // Inst #5431 = VBLENDMPSZrrkz |
| 36670 | { 5430, 4, 1, 0, 358, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeab2e8004829ULL }, // Inst #5430 = VBLENDMPSZrrk |
| 36671 | { 5429, 3, 1, 0, 358, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b2e8004829ULL }, // Inst #5429 = VBLENDMPSZrr |
| 36672 | { 5428, 8, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeb2e8004819ULL }, // Inst #5428 = VBLENDMPSZrmkz |
| 36673 | { 5427, 8, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeab2e8004819ULL }, // Inst #5427 = VBLENDMPSZrmk |
| 36674 | { 5426, 8, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eb2e8004819ULL }, // Inst #5426 = VBLENDMPSZrmbkz |
| 36675 | { 5425, 8, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7ab2e8004819ULL }, // Inst #5425 = VBLENDMPSZrmbk |
| 36676 | { 5424, 7, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78b2e8004819ULL }, // Inst #5424 = VBLENDMPSZrmb |
| 36677 | { 5423, 7, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b2e8004819ULL }, // Inst #5423 = VBLENDMPSZrm |
| 36678 | { 5422, 4, 1, 0, 1227, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc7b2e8004829ULL }, // Inst #5422 = VBLENDMPSZ256rrkz |
| 36679 | { 5421, 4, 1, 0, 1227, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc3b2e8004829ULL }, // Inst #5421 = VBLENDMPSZ256rrk |
| 36680 | { 5420, 3, 1, 0, 1227, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b2e8004829ULL }, // Inst #5420 = VBLENDMPSZ256rr |
| 36681 | { 5419, 8, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7b2e8004819ULL }, // Inst #5419 = VBLENDMPSZ256rmkz |
| 36682 | { 5418, 8, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc3b2e8004819ULL }, // Inst #5418 = VBLENDMPSZ256rmk |
| 36683 | { 5417, 8, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77b2e8004819ULL }, // Inst #5417 = VBLENDMPSZ256rmbkz |
| 36684 | { 5416, 8, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x73b2e8004819ULL }, // Inst #5416 = VBLENDMPSZ256rmbk |
| 36685 | { 5415, 7, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71b2e8004819ULL }, // Inst #5415 = VBLENDMPSZ256rmb |
| 36686 | { 5414, 7, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b2e8004819ULL }, // Inst #5414 = VBLENDMPSZ256rm |
| 36687 | { 5413, 4, 1, 0, 1226, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6b2e8004829ULL }, // Inst #5413 = VBLENDMPSZ128rrkz |
| 36688 | { 5412, 4, 1, 0, 1226, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa2b2e8004829ULL }, // Inst #5412 = VBLENDMPSZ128rrk |
| 36689 | { 5411, 3, 1, 0, 1226, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b2e8004829ULL }, // Inst #5411 = VBLENDMPSZ128rr |
| 36690 | { 5410, 8, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6b2e8004819ULL }, // Inst #5410 = VBLENDMPSZ128rmkz |
| 36691 | { 5409, 8, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa2b2e8004819ULL }, // Inst #5409 = VBLENDMPSZ128rmk |
| 36692 | { 5408, 8, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76b2e8004819ULL }, // Inst #5408 = VBLENDMPSZ128rmbkz |
| 36693 | { 5407, 8, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x72b2e8004819ULL }, // Inst #5407 = VBLENDMPSZ128rmbk |
| 36694 | { 5406, 7, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70b2e8004819ULL }, // Inst #5406 = VBLENDMPSZ128rmb |
| 36695 | { 5405, 7, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b2e8004819ULL }, // Inst #5405 = VBLENDMPSZ128rm |
| 36696 | { 5404, 4, 1, 0, 358, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeeb2f0024829ULL }, // Inst #5404 = VBLENDMPDZrrkz |
| 36697 | { 5403, 4, 1, 0, 358, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeab2f0024829ULL }, // Inst #5403 = VBLENDMPDZrrk |
| 36698 | { 5402, 3, 1, 0, 358, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8b2f0024829ULL }, // Inst #5402 = VBLENDMPDZrr |
| 36699 | { 5401, 8, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeb2f0024819ULL }, // Inst #5401 = VBLENDMPDZrmkz |
| 36700 | { 5400, 8, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeab2f0024819ULL }, // Inst #5400 = VBLENDMPDZrmk |
| 36701 | { 5399, 8, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eb2f0024819ULL }, // Inst #5399 = VBLENDMPDZrmbkz |
| 36702 | { 5398, 8, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9ab2f0024819ULL }, // Inst #5398 = VBLENDMPDZrmbk |
| 36703 | { 5397, 7, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98b2f0024819ULL }, // Inst #5397 = VBLENDMPDZrmb |
| 36704 | { 5396, 7, 1, 0, 1313, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8b2f0024819ULL }, // Inst #5396 = VBLENDMPDZrm |
| 36705 | { 5395, 4, 1, 0, 1227, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc7b2f0024829ULL }, // Inst #5395 = VBLENDMPDZ256rrkz |
| 36706 | { 5394, 4, 1, 0, 1227, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc3b2f0024829ULL }, // Inst #5394 = VBLENDMPDZ256rrk |
| 36707 | { 5393, 3, 1, 0, 1227, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1b2f0024829ULL }, // Inst #5393 = VBLENDMPDZ256rr |
| 36708 | { 5392, 8, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7b2f0024819ULL }, // Inst #5392 = VBLENDMPDZ256rmkz |
| 36709 | { 5391, 8, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc3b2f0024819ULL }, // Inst #5391 = VBLENDMPDZ256rmk |
| 36710 | { 5390, 8, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97b2f0024819ULL }, // Inst #5390 = VBLENDMPDZ256rmbkz |
| 36711 | { 5389, 8, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x93b2f0024819ULL }, // Inst #5389 = VBLENDMPDZ256rmbk |
| 36712 | { 5388, 7, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91b2f0024819ULL }, // Inst #5388 = VBLENDMPDZ256rmb |
| 36713 | { 5387, 7, 1, 0, 1312, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1b2f0024819ULL }, // Inst #5387 = VBLENDMPDZ256rm |
| 36714 | { 5386, 4, 1, 0, 1226, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6b2f0024829ULL }, // Inst #5386 = VBLENDMPDZ128rrkz |
| 36715 | { 5385, 4, 1, 0, 1226, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa2b2f0024829ULL }, // Inst #5385 = VBLENDMPDZ128rrk |
| 36716 | { 5384, 3, 1, 0, 1226, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0b2f0024829ULL }, // Inst #5384 = VBLENDMPDZ128rr |
| 36717 | { 5383, 8, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6b2f0024819ULL }, // Inst #5383 = VBLENDMPDZ128rmkz |
| 36718 | { 5382, 8, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa2b2f0024819ULL }, // Inst #5382 = VBLENDMPDZ128rmk |
| 36719 | { 5381, 8, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96b2f0024819ULL }, // Inst #5381 = VBLENDMPDZ128rmbkz |
| 36720 | { 5380, 8, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x92b2f0024819ULL }, // Inst #5380 = VBLENDMPDZ128rmbk |
| 36721 | { 5379, 7, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90b2f0024819ULL }, // Inst #5379 = VBLENDMPDZ128rmb |
| 36722 | { 5378, 7, 1, 0, 1292, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0b2f0024819ULL }, // Inst #5378 = VBLENDMPDZ128rm |
| 36723 | { 5377, 6, 1, 0, 354, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x58a0004819ULL }, // Inst #5377 = VBCSTNESH2PSrm |
| 36724 | { 5376, 6, 1, 0, 353, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x158a0004819ULL }, // Inst #5376 = VBCSTNESH2PSYrm |
| 36725 | { 5375, 6, 1, 0, 354, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x58a0005019ULL }, // Inst #5375 = VBCSTNEBF162PSrm |
| 36726 | { 5374, 6, 1, 0, 353, 0, 0, X86ImpOpBase + 0, 2189, 0|(1ULL<<MCID::MayLoad), 0x158a0005019ULL }, // Inst #5374 = VBCSTNEBF162PSYrm |
| 36727 | { 5373, 6, 0, 0, 8, 0, 1, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #5373 = VASTART_SAVE_XMM_REGS |
| 36728 | { 5372, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xaa28002029ULL }, // Inst #5372 = VANDPSrr |
| 36729 | { 5371, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xaa28002019ULL }, // Inst #5371 = VANDPSrm |
| 36730 | { 5370, 4, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1899, 0|(1ULL<<MCID::Commutable), 0xeeaa68002029ULL }, // Inst #5370 = VANDPSZrrkz |
| 36731 | { 5369, 5, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1894, 0|(1ULL<<MCID::Commutable), 0xeaaa68002029ULL }, // Inst #5369 = VANDPSZrrk |
| 36732 | { 5368, 3, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8aa68002029ULL }, // Inst #5368 = VANDPSZrr |
| 36733 | { 5367, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeaa68002019ULL }, // Inst #5367 = VANDPSZrmkz |
| 36734 | { 5366, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaaa68002019ULL }, // Inst #5366 = VANDPSZrmk |
| 36735 | { 5365, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eaa68002019ULL }, // Inst #5365 = VANDPSZrmbkz |
| 36736 | { 5364, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aaa68002019ULL }, // Inst #5364 = VANDPSZrmbk |
| 36737 | { 5363, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78aa68002019ULL }, // Inst #5363 = VANDPSZrmb |
| 36738 | { 5362, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8aa68002019ULL }, // Inst #5362 = VANDPSZrm |
| 36739 | { 5361, 4, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1871, 0|(1ULL<<MCID::Commutable), 0xc7aa68002029ULL }, // Inst #5361 = VANDPSZ256rrkz |
| 36740 | { 5360, 5, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1866, 0|(1ULL<<MCID::Commutable), 0xc3aa68002029ULL }, // Inst #5360 = VANDPSZ256rrk |
| 36741 | { 5359, 3, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1aa68002029ULL }, // Inst #5359 = VANDPSZ256rr |
| 36742 | { 5358, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7aa68002019ULL }, // Inst #5358 = VANDPSZ256rmkz |
| 36743 | { 5357, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3aa68002019ULL }, // Inst #5357 = VANDPSZ256rmk |
| 36744 | { 5356, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77aa68002019ULL }, // Inst #5356 = VANDPSZ256rmbkz |
| 36745 | { 5355, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73aa68002019ULL }, // Inst #5355 = VANDPSZ256rmbk |
| 36746 | { 5354, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71aa68002019ULL }, // Inst #5354 = VANDPSZ256rmb |
| 36747 | { 5353, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1aa68002019ULL }, // Inst #5353 = VANDPSZ256rm |
| 36748 | { 5352, 4, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1845, 0|(1ULL<<MCID::Commutable), 0xa6aa68002029ULL }, // Inst #5352 = VANDPSZ128rrkz |
| 36749 | { 5351, 5, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1840, 0|(1ULL<<MCID::Commutable), 0xa2aa68002029ULL }, // Inst #5351 = VANDPSZ128rrk |
| 36750 | { 5350, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0aa68002029ULL }, // Inst #5350 = VANDPSZ128rr |
| 36751 | { 5349, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6aa68002019ULL }, // Inst #5349 = VANDPSZ128rmkz |
| 36752 | { 5348, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2aa68002019ULL }, // Inst #5348 = VANDPSZ128rmk |
| 36753 | { 5347, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76aa68002019ULL }, // Inst #5347 = VANDPSZ128rmbkz |
| 36754 | { 5346, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72aa68002019ULL }, // Inst #5346 = VANDPSZ128rmbk |
| 36755 | { 5345, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70aa68002019ULL }, // Inst #5345 = VANDPSZ128rmb |
| 36756 | { 5344, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0aa68002019ULL }, // Inst #5344 = VANDPSZ128rm |
| 36757 | { 5343, 3, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1aa28002029ULL }, // Inst #5343 = VANDPSYrr |
| 36758 | { 5342, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1aa28002019ULL }, // Inst #5342 = VANDPSYrm |
| 36759 | { 5341, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1731, 0|(1ULL<<MCID::Commutable), 0xaa30002829ULL }, // Inst #5341 = VANDPDrr |
| 36760 | { 5340, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xaa30002819ULL }, // Inst #5340 = VANDPDrm |
| 36761 | { 5339, 4, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1720, 0|(1ULL<<MCID::Commutable), 0xeeaa70022829ULL }, // Inst #5339 = VANDPDZrrkz |
| 36762 | { 5338, 5, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1715, 0|(1ULL<<MCID::Commutable), 0xeaaa70022829ULL }, // Inst #5338 = VANDPDZrrk |
| 36763 | { 5337, 3, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1697, 0|(1ULL<<MCID::Commutable), 0xe8aa70022829ULL }, // Inst #5337 = VANDPDZrr |
| 36764 | { 5336, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeaa70022819ULL }, // Inst #5336 = VANDPDZrmkz |
| 36765 | { 5335, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaaa70022819ULL }, // Inst #5335 = VANDPDZrmk |
| 36766 | { 5334, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eaa70022819ULL }, // Inst #5334 = VANDPDZrmbkz |
| 36767 | { 5333, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aaa70022819ULL }, // Inst #5333 = VANDPDZrmbk |
| 36768 | { 5332, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98aa70022819ULL }, // Inst #5332 = VANDPDZrmb |
| 36769 | { 5331, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8aa70022819ULL }, // Inst #5331 = VANDPDZrm |
| 36770 | { 5330, 4, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1669, 0|(1ULL<<MCID::Commutable), 0xc7aa70022829ULL }, // Inst #5330 = VANDPDZ256rrkz |
| 36771 | { 5329, 5, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1664, 0|(1ULL<<MCID::Commutable), 0xc3aa70022829ULL }, // Inst #5329 = VANDPDZ256rrk |
| 36772 | { 5328, 3, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1661, 0|(1ULL<<MCID::Commutable), 0xc1aa70022829ULL }, // Inst #5328 = VANDPDZ256rr |
| 36773 | { 5327, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7aa70022819ULL }, // Inst #5327 = VANDPDZ256rmkz |
| 36774 | { 5326, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3aa70022819ULL }, // Inst #5326 = VANDPDZ256rmk |
| 36775 | { 5325, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97aa70022819ULL }, // Inst #5325 = VANDPDZ256rmbkz |
| 36776 | { 5324, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93aa70022819ULL }, // Inst #5324 = VANDPDZ256rmbk |
| 36777 | { 5323, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91aa70022819ULL }, // Inst #5323 = VANDPDZ256rmb |
| 36778 | { 5322, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1aa70022819ULL }, // Inst #5322 = VANDPDZ256rm |
| 36779 | { 5321, 4, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1633, 0|(1ULL<<MCID::Commutable), 0xa6aa70022829ULL }, // Inst #5321 = VANDPDZ128rrkz |
| 36780 | { 5320, 5, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1628, 0|(1ULL<<MCID::Commutable), 0xa2aa70022829ULL }, // Inst #5320 = VANDPDZ128rrk |
| 36781 | { 5319, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1625, 0|(1ULL<<MCID::Commutable), 0xa0aa70022829ULL }, // Inst #5319 = VANDPDZ128rr |
| 36782 | { 5318, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6aa70022819ULL }, // Inst #5318 = VANDPDZ128rmkz |
| 36783 | { 5317, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2aa70022819ULL }, // Inst #5317 = VANDPDZ128rmk |
| 36784 | { 5316, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96aa70022819ULL }, // Inst #5316 = VANDPDZ128rmbkz |
| 36785 | { 5315, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92aa70022819ULL }, // Inst #5315 = VANDPDZ128rmbk |
| 36786 | { 5314, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90aa70022819ULL }, // Inst #5314 = VANDPDZ128rmb |
| 36787 | { 5313, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0aa70022819ULL }, // Inst #5313 = VANDPDZ128rm |
| 36788 | { 5312, 3, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1598, 0|(1ULL<<MCID::Commutable), 0x1aa30002829ULL }, // Inst #5312 = VANDPDYrr |
| 36789 | { 5311, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1aa30002819ULL }, // Inst #5311 = VANDPDYrm |
| 36790 | { 5310, 3, 1, 0, 1057, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xaaa8002029ULL }, // Inst #5310 = VANDNPSrr |
| 36791 | { 5309, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xaaa8002019ULL }, // Inst #5309 = VANDNPSrm |
| 36792 | { 5308, 4, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1899, 0, 0xeeaae8002029ULL }, // Inst #5308 = VANDNPSZrrkz |
| 36793 | { 5307, 5, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1894, 0, 0xeaaae8002029ULL }, // Inst #5307 = VANDNPSZrrk |
| 36794 | { 5306, 3, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8aae8002029ULL }, // Inst #5306 = VANDNPSZrr |
| 36795 | { 5305, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0xeeaae8002019ULL }, // Inst #5305 = VANDNPSZrmkz |
| 36796 | { 5304, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0xeaaae8002019ULL }, // Inst #5304 = VANDNPSZrmk |
| 36797 | { 5303, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1875, 0|(1ULL<<MCID::MayLoad), 0x7eaae8002019ULL }, // Inst #5303 = VANDNPSZrmbkz |
| 36798 | { 5302, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1547, 0|(1ULL<<MCID::MayLoad), 0x7aaae8002019ULL }, // Inst #5302 = VANDNPSZrmbk |
| 36799 | { 5301, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x78aae8002019ULL }, // Inst #5301 = VANDNPSZrmb |
| 36800 | { 5300, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8aae8002019ULL }, // Inst #5300 = VANDNPSZrm |
| 36801 | { 5299, 4, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1871, 0, 0xc7aae8002029ULL }, // Inst #5299 = VANDNPSZ256rrkz |
| 36802 | { 5298, 5, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1866, 0, 0xc3aae8002029ULL }, // Inst #5298 = VANDNPSZ256rrk |
| 36803 | { 5297, 3, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1aae8002029ULL }, // Inst #5297 = VANDNPSZ256rr |
| 36804 | { 5296, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0xc7aae8002019ULL }, // Inst #5296 = VANDNPSZ256rmkz |
| 36805 | { 5295, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0xc3aae8002019ULL }, // Inst #5295 = VANDNPSZ256rmk |
| 36806 | { 5294, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1858, 0|(1ULL<<MCID::MayLoad), 0x77aae8002019ULL }, // Inst #5294 = VANDNPSZ256rmbkz |
| 36807 | { 5293, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1849, 0|(1ULL<<MCID::MayLoad), 0x73aae8002019ULL }, // Inst #5293 = VANDNPSZ256rmbk |
| 36808 | { 5292, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x71aae8002019ULL }, // Inst #5292 = VANDNPSZ256rmb |
| 36809 | { 5291, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1aae8002019ULL }, // Inst #5291 = VANDNPSZ256rm |
| 36810 | { 5290, 4, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1845, 0, 0xa6aae8002029ULL }, // Inst #5290 = VANDNPSZ128rrkz |
| 36811 | { 5289, 5, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1840, 0, 0xa2aae8002029ULL }, // Inst #5289 = VANDNPSZ128rrk |
| 36812 | { 5288, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0aae8002029ULL }, // Inst #5288 = VANDNPSZ128rr |
| 36813 | { 5287, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0xa6aae8002019ULL }, // Inst #5287 = VANDNPSZ128rmkz |
| 36814 | { 5286, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0xa2aae8002019ULL }, // Inst #5286 = VANDNPSZ128rmk |
| 36815 | { 5285, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1832, 0|(1ULL<<MCID::MayLoad), 0x76aae8002019ULL }, // Inst #5285 = VANDNPSZ128rmbkz |
| 36816 | { 5284, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1823, 0|(1ULL<<MCID::MayLoad), 0x72aae8002019ULL }, // Inst #5284 = VANDNPSZ128rmbk |
| 36817 | { 5283, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x70aae8002019ULL }, // Inst #5283 = VANDNPSZ128rmb |
| 36818 | { 5282, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0aae8002019ULL }, // Inst #5282 = VANDNPSZ128rm |
| 36819 | { 5281, 3, 1, 0, 1058, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1aaa8002029ULL }, // Inst #5281 = VANDNPSYrr |
| 36820 | { 5280, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1aaa8002019ULL }, // Inst #5280 = VANDNPSYrm |
| 36821 | { 5279, 3, 1, 0, 1057, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xaab0002829ULL }, // Inst #5279 = VANDNPDrr |
| 36822 | { 5278, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xaab0002819ULL }, // Inst #5278 = VANDNPDrm |
| 36823 | { 5277, 4, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1720, 0, 0xeeaaf0022829ULL }, // Inst #5277 = VANDNPDZrrkz |
| 36824 | { 5276, 5, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1715, 0, 0xeaaaf0022829ULL }, // Inst #5276 = VANDNPDZrrk |
| 36825 | { 5275, 3, 1, 0, 352, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8aaf0022829ULL }, // Inst #5275 = VANDNPDZrr |
| 36826 | { 5274, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0xeeaaf0022819ULL }, // Inst #5274 = VANDNPDZrmkz |
| 36827 | { 5273, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0xeaaaf0022819ULL }, // Inst #5273 = VANDNPDZrmk |
| 36828 | { 5272, 8, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1689, 0|(1ULL<<MCID::MayLoad), 0x9eaaf0022819ULL }, // Inst #5272 = VANDNPDZrmbkz |
| 36829 | { 5271, 9, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1680, 0|(1ULL<<MCID::MayLoad), 0x9aaaf0022819ULL }, // Inst #5271 = VANDNPDZrmbk |
| 36830 | { 5270, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0x98aaf0022819ULL }, // Inst #5270 = VANDNPDZrmb |
| 36831 | { 5269, 7, 1, 0, 351, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8aaf0022819ULL }, // Inst #5269 = VANDNPDZrm |
| 36832 | { 5268, 4, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1669, 0, 0xc7aaf0022829ULL }, // Inst #5268 = VANDNPDZ256rrkz |
| 36833 | { 5267, 5, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1664, 0, 0xc3aaf0022829ULL }, // Inst #5267 = VANDNPDZ256rrk |
| 36834 | { 5266, 3, 1, 0, 350, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1aaf0022829ULL }, // Inst #5266 = VANDNPDZ256rr |
| 36835 | { 5265, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0xc7aaf0022819ULL }, // Inst #5265 = VANDNPDZ256rmkz |
| 36836 | { 5264, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0xc3aaf0022819ULL }, // Inst #5264 = VANDNPDZ256rmk |
| 36837 | { 5263, 8, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1653, 0|(1ULL<<MCID::MayLoad), 0x97aaf0022819ULL }, // Inst #5263 = VANDNPDZ256rmbkz |
| 36838 | { 5262, 9, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1644, 0|(1ULL<<MCID::MayLoad), 0x93aaf0022819ULL }, // Inst #5262 = VANDNPDZ256rmbk |
| 36839 | { 5261, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0x91aaf0022819ULL }, // Inst #5261 = VANDNPDZ256rmb |
| 36840 | { 5260, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1aaf0022819ULL }, // Inst #5260 = VANDNPDZ256rm |
| 36841 | { 5259, 4, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1633, 0, 0xa6aaf0022829ULL }, // Inst #5259 = VANDNPDZ128rrkz |
| 36842 | { 5258, 5, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1628, 0, 0xa2aaf0022829ULL }, // Inst #5258 = VANDNPDZ128rrk |
| 36843 | { 5257, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0aaf0022829ULL }, // Inst #5257 = VANDNPDZ128rr |
| 36844 | { 5256, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0xa6aaf0022819ULL }, // Inst #5256 = VANDNPDZ128rmkz |
| 36845 | { 5255, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0xa2aaf0022819ULL }, // Inst #5255 = VANDNPDZ128rmk |
| 36846 | { 5254, 8, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1617, 0|(1ULL<<MCID::MayLoad), 0x96aaf0022819ULL }, // Inst #5254 = VANDNPDZ128rmbkz |
| 36847 | { 5253, 9, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1608, 0|(1ULL<<MCID::MayLoad), 0x92aaf0022819ULL }, // Inst #5253 = VANDNPDZ128rmbk |
| 36848 | { 5252, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0x90aaf0022819ULL }, // Inst #5252 = VANDNPDZ128rmb |
| 36849 | { 5251, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0aaf0022819ULL }, // Inst #5251 = VANDNPDZ128rm |
| 36850 | { 5250, 3, 1, 0, 1058, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1aab0002829ULL }, // Inst #5250 = VANDNPDYrr |
| 36851 | { 5249, 7, 1, 0, 349, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1aab0002819ULL }, // Inst #5249 = VANDNPDYrm |
| 36852 | { 5248, 5, 1, 0, 1239, 0, 0, X86ImpOpBase + 0, 2184, 0, 0xee81f8066829ULL }, // Inst #5248 = VALIGNQZrrikz |
| 36853 | { 5247, 6, 1, 0, 1239, 0, 0, X86ImpOpBase + 0, 2178, 0, 0xea81f8066829ULL }, // Inst #5247 = VALIGNQZrrik |
| 36854 | { 5246, 4, 1, 0, 1068, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe881f8066829ULL }, // Inst #5246 = VALIGNQZrri |
| 36855 | { 5245, 9, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0xee81f8066819ULL }, // Inst #5245 = VALIGNQZrmikz |
| 36856 | { 5244, 10, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0xea81f8066819ULL }, // Inst #5244 = VALIGNQZrmik |
| 36857 | { 5243, 8, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe881f8066819ULL }, // Inst #5243 = VALIGNQZrmi |
| 36858 | { 5242, 9, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2169, 0|(1ULL<<MCID::MayLoad), 0x9e81f8066819ULL }, // Inst #5242 = VALIGNQZrmbikz |
| 36859 | { 5241, 10, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2159, 0|(1ULL<<MCID::MayLoad), 0x9a81f8066819ULL }, // Inst #5241 = VALIGNQZrmbik |
| 36860 | { 5240, 8, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x9881f8066819ULL }, // Inst #5240 = VALIGNQZrmbi |
| 36861 | { 5239, 5, 1, 0, 1238, 0, 0, X86ImpOpBase + 0, 2154, 0, 0xc781f8066829ULL }, // Inst #5239 = VALIGNQZ256rrikz |
| 36862 | { 5238, 6, 1, 0, 1238, 0, 0, X86ImpOpBase + 0, 2148, 0, 0xc381f8066829ULL }, // Inst #5238 = VALIGNQZ256rrik |
| 36863 | { 5237, 4, 1, 0, 1070, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc181f8066829ULL }, // Inst #5237 = VALIGNQZ256rri |
| 36864 | { 5236, 9, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0xc781f8066819ULL }, // Inst #5236 = VALIGNQZ256rmikz |
| 36865 | { 5235, 10, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0xc381f8066819ULL }, // Inst #5235 = VALIGNQZ256rmik |
| 36866 | { 5234, 8, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc181f8066819ULL }, // Inst #5234 = VALIGNQZ256rmi |
| 36867 | { 5233, 9, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2139, 0|(1ULL<<MCID::MayLoad), 0x9781f8066819ULL }, // Inst #5233 = VALIGNQZ256rmbikz |
| 36868 | { 5232, 10, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2129, 0|(1ULL<<MCID::MayLoad), 0x9381f8066819ULL }, // Inst #5232 = VALIGNQZ256rmbik |
| 36869 | { 5231, 8, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x9181f8066819ULL }, // Inst #5231 = VALIGNQZ256rmbi |
| 36870 | { 5230, 5, 1, 0, 1237, 0, 0, X86ImpOpBase + 0, 2124, 0, 0xa681f8066829ULL }, // Inst #5230 = VALIGNQZ128rrikz |
| 36871 | { 5229, 6, 1, 0, 1237, 0, 0, X86ImpOpBase + 0, 2118, 0, 0xa281f8066829ULL }, // Inst #5229 = VALIGNQZ128rrik |
| 36872 | { 5228, 4, 1, 0, 1069, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa081f8066829ULL }, // Inst #5228 = VALIGNQZ128rri |
| 36873 | { 5227, 9, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 2109, 0|(1ULL<<MCID::MayLoad), 0xa681f8066819ULL }, // Inst #5227 = VALIGNQZ128rmikz |
| 36874 | { 5226, 10, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad), 0xa281f8066819ULL }, // Inst #5226 = VALIGNQZ128rmik |
| 36875 | { 5225, 8, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa081f8066819ULL }, // Inst #5225 = VALIGNQZ128rmi |
| 36876 | { 5224, 9, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 2109, 0|(1ULL<<MCID::MayLoad), 0x9681f8066819ULL }, // Inst #5224 = VALIGNQZ128rmbikz |
| 36877 | { 5223, 10, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 2099, 0|(1ULL<<MCID::MayLoad), 0x9281f8066819ULL }, // Inst #5223 = VALIGNQZ128rmbik |
| 36878 | { 5222, 8, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x9081f8066819ULL }, // Inst #5222 = VALIGNQZ128rmbi |
| 36879 | { 5221, 5, 1, 0, 1239, 0, 0, X86ImpOpBase + 0, 2094, 0, 0xee81f8046829ULL }, // Inst #5221 = VALIGNDZrrikz |
| 36880 | { 5220, 6, 1, 0, 1239, 0, 0, X86ImpOpBase + 0, 2088, 0, 0xea81f8046829ULL }, // Inst #5220 = VALIGNDZrrik |
| 36881 | { 5219, 4, 1, 0, 1068, 0, 0, X86ImpOpBase + 0, 909, 0, 0xe881f8046829ULL }, // Inst #5219 = VALIGNDZrri |
| 36882 | { 5218, 9, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0xee81f8046819ULL }, // Inst #5218 = VALIGNDZrmikz |
| 36883 | { 5217, 10, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0xea81f8046819ULL }, // Inst #5217 = VALIGNDZrmik |
| 36884 | { 5216, 8, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0xe881f8046819ULL }, // Inst #5216 = VALIGNDZrmi |
| 36885 | { 5215, 9, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2079, 0|(1ULL<<MCID::MayLoad), 0x7e81f8046819ULL }, // Inst #5215 = VALIGNDZrmbikz |
| 36886 | { 5214, 10, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2069, 0|(1ULL<<MCID::MayLoad), 0x7a81f8046819ULL }, // Inst #5214 = VALIGNDZrmbik |
| 36887 | { 5213, 8, 1, 0, 1342, 0, 0, X86ImpOpBase + 0, 2061, 0|(1ULL<<MCID::MayLoad), 0x7881f8046819ULL }, // Inst #5213 = VALIGNDZrmbi |
| 36888 | { 5212, 5, 1, 0, 1238, 0, 0, X86ImpOpBase + 0, 2056, 0, 0xc781f8046829ULL }, // Inst #5212 = VALIGNDZ256rrikz |
| 36889 | { 5211, 6, 1, 0, 1238, 0, 0, X86ImpOpBase + 0, 2050, 0, 0xc381f8046829ULL }, // Inst #5211 = VALIGNDZ256rrik |
| 36890 | { 5210, 4, 1, 0, 1070, 0, 0, X86ImpOpBase + 0, 905, 0, 0xc181f8046829ULL }, // Inst #5210 = VALIGNDZ256rri |
| 36891 | { 5209, 9, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0xc781f8046819ULL }, // Inst #5209 = VALIGNDZ256rmikz |
| 36892 | { 5208, 10, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0xc381f8046819ULL }, // Inst #5208 = VALIGNDZ256rmik |
| 36893 | { 5207, 8, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0xc181f8046819ULL }, // Inst #5207 = VALIGNDZ256rmi |
| 36894 | { 5206, 9, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2041, 0|(1ULL<<MCID::MayLoad), 0x7781f8046819ULL }, // Inst #5206 = VALIGNDZ256rmbikz |
| 36895 | { 5205, 10, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2031, 0|(1ULL<<MCID::MayLoad), 0x7381f8046819ULL }, // Inst #5205 = VALIGNDZ256rmbik |
| 36896 | { 5204, 8, 1, 0, 1341, 0, 0, X86ImpOpBase + 0, 2023, 0|(1ULL<<MCID::MayLoad), 0x7181f8046819ULL }, // Inst #5204 = VALIGNDZ256rmbi |
| 36897 | { 5203, 5, 1, 0, 1237, 0, 0, X86ImpOpBase + 0, 2018, 0, 0xa681f8046829ULL }, // Inst #5203 = VALIGNDZ128rrikz |
| 36898 | { 5202, 6, 1, 0, 1237, 0, 0, X86ImpOpBase + 0, 2012, 0, 0xa281f8046829ULL }, // Inst #5202 = VALIGNDZ128rrik |
| 36899 | { 5201, 4, 1, 0, 1069, 0, 0, X86ImpOpBase + 0, 897, 0, 0xa081f8046829ULL }, // Inst #5201 = VALIGNDZ128rri |
| 36900 | { 5200, 9, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 2003, 0|(1ULL<<MCID::MayLoad), 0xa681f8046819ULL }, // Inst #5200 = VALIGNDZ128rmikz |
| 36901 | { 5199, 10, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad), 0xa281f8046819ULL }, // Inst #5199 = VALIGNDZ128rmik |
| 36902 | { 5198, 8, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0xa081f8046819ULL }, // Inst #5198 = VALIGNDZ128rmi |
| 36903 | { 5197, 9, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 2003, 0|(1ULL<<MCID::MayLoad), 0x7681f8046819ULL }, // Inst #5197 = VALIGNDZ128rmbikz |
| 36904 | { 5196, 10, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 1993, 0|(1ULL<<MCID::MayLoad), 0x7281f8046819ULL }, // Inst #5196 = VALIGNDZ128rmbik |
| 36905 | { 5195, 8, 1, 0, 1331, 0, 0, X86ImpOpBase + 0, 1985, 0|(1ULL<<MCID::MayLoad), 0x7081f8046819ULL }, // Inst #5195 = VALIGNDZ128rmbi |
| 36906 | { 5194, 3, 1, 0, 42, 0, 0, X86ImpOpBase + 0, 544, 0, 0x6fb8046829ULL }, // Inst #5194 = VAESKEYGENASSIST128rr |
| 36907 | { 5193, 7, 1, 0, 41, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x6fb8046819ULL }, // Inst #5193 = VAESKEYGENASSIST128rm |
| 36908 | { 5192, 2, 1, 0, 40, 0, 0, X86ImpOpBase + 0, 535, 0, 0x6db8004829ULL }, // Inst #5192 = VAESIMCrr |
| 36909 | { 5191, 6, 1, 0, 39, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x6db8004819ULL }, // Inst #5191 = VAESIMCrm |
| 36910 | { 5190, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xee38004829ULL }, // Inst #5190 = VAESENCrr |
| 36911 | { 5189, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xee38004819ULL }, // Inst #5189 = VAESENCrm |
| 36912 | { 5188, 3, 1, 0, 1881, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8ee78004829ULL }, // Inst #5188 = VAESENCZrr |
| 36913 | { 5187, 7, 1, 0, 1907, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ee78004819ULL }, // Inst #5187 = VAESENCZrm |
| 36914 | { 5186, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1ee78004829ULL }, // Inst #5186 = VAESENCZ256rr |
| 36915 | { 5185, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ee78004819ULL }, // Inst #5185 = VAESENCZ256rm |
| 36916 | { 5184, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0ee78004829ULL }, // Inst #5184 = VAESENCZ128rr |
| 36917 | { 5183, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ee78004819ULL }, // Inst #5183 = VAESENCZ128rm |
| 36918 | { 5182, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1ee38004829ULL }, // Inst #5182 = VAESENCYrr |
| 36919 | { 5181, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ee38004819ULL }, // Inst #5181 = VAESENCYrm |
| 36920 | { 5180, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xeeb8004829ULL }, // Inst #5180 = VAESENCLASTrr |
| 36921 | { 5179, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xeeb8004819ULL }, // Inst #5179 = VAESENCLASTrm |
| 36922 | { 5178, 3, 1, 0, 1881, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8eef8004829ULL }, // Inst #5178 = VAESENCLASTZrr |
| 36923 | { 5177, 7, 1, 0, 1907, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8eef8004819ULL }, // Inst #5177 = VAESENCLASTZrm |
| 36924 | { 5176, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1eef8004829ULL }, // Inst #5176 = VAESENCLASTZ256rr |
| 36925 | { 5175, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1eef8004819ULL }, // Inst #5175 = VAESENCLASTZ256rm |
| 36926 | { 5174, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0eef8004829ULL }, // Inst #5174 = VAESENCLASTZ128rr |
| 36927 | { 5173, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0eef8004819ULL }, // Inst #5173 = VAESENCLASTZ128rm |
| 36928 | { 5172, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1eeb8004829ULL }, // Inst #5172 = VAESENCLASTYrr |
| 36929 | { 5171, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1eeb8004819ULL }, // Inst #5171 = VAESENCLASTYrm |
| 36930 | { 5170, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xef38004829ULL }, // Inst #5170 = VAESDECrr |
| 36931 | { 5169, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xef38004819ULL }, // Inst #5169 = VAESDECrm |
| 36932 | { 5168, 3, 1, 0, 1881, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8ef78004829ULL }, // Inst #5168 = VAESDECZrr |
| 36933 | { 5167, 7, 1, 0, 1907, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8ef78004819ULL }, // Inst #5167 = VAESDECZrm |
| 36934 | { 5166, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1ef78004829ULL }, // Inst #5166 = VAESDECZ256rr |
| 36935 | { 5165, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1ef78004819ULL }, // Inst #5165 = VAESDECZ256rm |
| 36936 | { 5164, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0ef78004829ULL }, // Inst #5164 = VAESDECZ128rr |
| 36937 | { 5163, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0ef78004819ULL }, // Inst #5163 = VAESDECZ128rm |
| 36938 | { 5162, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1ef38004829ULL }, // Inst #5162 = VAESDECYrr |
| 36939 | { 5161, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1ef38004819ULL }, // Inst #5161 = VAESDECYrm |
| 36940 | { 5160, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1731, 0, 0xefb8004829ULL }, // Inst #5160 = VAESDECLASTrr |
| 36941 | { 5159, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1724, 0|(1ULL<<MCID::MayLoad), 0xefb8004819ULL }, // Inst #5159 = VAESDECLASTrm |
| 36942 | { 5158, 3, 1, 0, 1881, 0, 0, X86ImpOpBase + 0, 1697, 0, 0xe8eff8004829ULL }, // Inst #5158 = VAESDECLASTZrr |
| 36943 | { 5157, 7, 1, 0, 1907, 0, 0, X86ImpOpBase + 0, 1673, 0|(1ULL<<MCID::MayLoad), 0xe8eff8004819ULL }, // Inst #5157 = VAESDECLASTZrm |
| 36944 | { 5156, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1661, 0, 0xc1eff8004829ULL }, // Inst #5156 = VAESDECLASTZ256rr |
| 36945 | { 5155, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1637, 0|(1ULL<<MCID::MayLoad), 0xc1eff8004819ULL }, // Inst #5155 = VAESDECLASTZ256rm |
| 36946 | { 5154, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1625, 0, 0xa0eff8004829ULL }, // Inst #5154 = VAESDECLASTZ128rr |
| 36947 | { 5153, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1601, 0|(1ULL<<MCID::MayLoad), 0xa0eff8004819ULL }, // Inst #5153 = VAESDECLASTZ128rm |
| 36948 | { 5152, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 1598, 0, 0x1efb8004829ULL }, // Inst #5152 = VAESDECLASTYrr |
| 36949 | { 5151, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 1591, 0|(1ULL<<MCID::MayLoad), 0x1efb8004819ULL }, // Inst #5151 = VAESDECLASTYrm |
| 36950 | { 5150, 3, 1, 0, 1656, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xe828003829ULL }, // Inst #5150 = VADDSUBPSrr |
| 36951 | { 5149, 7, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe828003819ULL }, // Inst #5149 = VADDSUBPSrm |
| 36952 | { 5148, 3, 1, 0, 1663, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1e828003829ULL }, // Inst #5148 = VADDSUBPSYrr |
| 36953 | { 5147, 7, 1, 0, 1899, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1e828003819ULL }, // Inst #5147 = VADDSUBPSYrm |
| 36954 | { 5146, 3, 1, 0, 28, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xe830002829ULL }, // Inst #5146 = VADDSUBPDrr |
| 36955 | { 5145, 7, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe830002819ULL }, // Inst #5145 = VADDSUBPDrm |
| 36956 | { 5144, 3, 1, 0, 338, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException), 0x1e830002829ULL }, // Inst #5144 = VADDSUBPDYrr |
| 36957 | { 5143, 7, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1e830002819ULL }, // Inst #5143 = VADDSUBPDYrm |
| 36958 | { 5142, 3, 1, 0, 1456, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xac28003029ULL }, // Inst #5142 = VADDSSrr_Int |
| 36959 | { 5141, 3, 1, 0, 1456, 1, 0, X86ImpOpBase + 78, 1982, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xac28003029ULL }, // Inst #5141 = VADDSSrr |
| 36960 | { 5140, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac28003019ULL }, // Inst #5140 = VADDSSrm_Int |
| 36961 | { 5139, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1975, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac28003019ULL }, // Inst #5139 = VADDSSrm |
| 36962 | { 5138, 5, 1, 0, 1859, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x176ac68003029ULL }, // Inst #5138 = VADDSSZrrb_Intkz |
| 36963 | { 5137, 6, 1, 0, 35, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x172ac68003029ULL }, // Inst #5137 = VADDSSZrrb_Intk |
| 36964 | { 5136, 4, 1, 0, 35, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x170ac68003029ULL }, // Inst #5136 = VADDSSZrrb_Int |
| 36965 | { 5135, 4, 1, 0, 1859, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x66ac68003029ULL }, // Inst #5135 = VADDSSZrr_Intkz |
| 36966 | { 5134, 5, 1, 0, 35, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x62ac68003029ULL }, // Inst #5134 = VADDSSZrr_Intk |
| 36967 | { 5133, 3, 1, 0, 35, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x60ac68003029ULL }, // Inst #5133 = VADDSSZrr_Int |
| 36968 | { 5132, 3, 1, 0, 35, 1, 0, X86ImpOpBase + 78, 1972, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x60ac68003029ULL }, // Inst #5132 = VADDSSZrr |
| 36969 | { 5131, 8, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x66ac68003019ULL }, // Inst #5131 = VADDSSZrm_Intkz |
| 36970 | { 5130, 9, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x62ac68003019ULL }, // Inst #5130 = VADDSSZrm_Intk |
| 36971 | { 5129, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ac68003019ULL }, // Inst #5129 = VADDSSZrm_Int |
| 36972 | { 5128, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 1965, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x60ac68003019ULL }, // Inst #5128 = VADDSSZrm |
| 36973 | { 5127, 5, 1, 0, 1866, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x156ac68013029ULL }, // Inst #5127 = VADDSHZrrb_Intkz |
| 36974 | { 5126, 6, 1, 0, 1866, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x152ac68013029ULL }, // Inst #5126 = VADDSHZrrb_Intk |
| 36975 | { 5125, 4, 1, 0, 1736, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x150ac68013029ULL }, // Inst #5125 = VADDSHZrrb_Int |
| 36976 | { 5124, 4, 1, 0, 1866, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x46ac68013029ULL }, // Inst #5124 = VADDSHZrr_Intkz |
| 36977 | { 5123, 5, 1, 0, 1866, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x42ac68013029ULL }, // Inst #5123 = VADDSHZrr_Intk |
| 36978 | { 5122, 3, 1, 0, 1736, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x40ac68013029ULL }, // Inst #5122 = VADDSHZrr_Int |
| 36979 | { 5121, 3, 1, 0, 1736, 1, 0, X86ImpOpBase + 78, 1962, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x40ac68013029ULL }, // Inst #5121 = VADDSHZrr |
| 36980 | { 5120, 8, 1, 0, 1725, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x46ac68013019ULL }, // Inst #5120 = VADDSHZrm_Intkz |
| 36981 | { 5119, 9, 1, 0, 1725, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x42ac68013019ULL }, // Inst #5119 = VADDSHZrm_Intk |
| 36982 | { 5118, 7, 1, 0, 1725, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ac68013019ULL }, // Inst #5118 = VADDSHZrm_Int |
| 36983 | { 5117, 7, 1, 0, 1725, 1, 0, X86ImpOpBase + 78, 1955, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x40ac68013019ULL }, // Inst #5117 = VADDSHZrm |
| 36984 | { 5116, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException), 0xac30003829ULL }, // Inst #5116 = VADDSDrr_Int |
| 36985 | { 5115, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1952, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xac30003829ULL }, // Inst #5115 = VADDSDrr |
| 36986 | { 5114, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac30003819ULL }, // Inst #5114 = VADDSDrm_Int |
| 36987 | { 5113, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac30003819ULL }, // Inst #5113 = VADDSDrm |
| 36988 | { 5112, 5, 1, 0, 1858, 1, 0, X86ImpOpBase + 78, 1940, 0, 0x196ac70023829ULL }, // Inst #5112 = VADDSDZrrb_Intkz |
| 36989 | { 5111, 6, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1934, 0, 0x192ac70023829ULL }, // Inst #5111 = VADDSDZrrb_Intk |
| 36990 | { 5110, 4, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1930, 0, 0x190ac70023829ULL }, // Inst #5110 = VADDSDZrrb_Int |
| 36991 | { 5109, 4, 1, 0, 1858, 1, 0, X86ImpOpBase + 78, 1926, 0|(1ULL<<MCID::MayRaiseFPException), 0x86ac70023829ULL }, // Inst #5109 = VADDSDZrr_Intkz |
| 36992 | { 5108, 5, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1921, 0|(1ULL<<MCID::MayRaiseFPException), 0x82ac70023829ULL }, // Inst #5108 = VADDSDZrr_Intk |
| 36993 | { 5107, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException), 0x80ac70023829ULL }, // Inst #5107 = VADDSDZrr_Int |
| 36994 | { 5106, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 1918, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x80ac70023829ULL }, // Inst #5106 = VADDSDZrr |
| 36995 | { 5105, 8, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1910, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x86ac70023819ULL }, // Inst #5105 = VADDSDZrm_Intkz |
| 36996 | { 5104, 9, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x82ac70023819ULL }, // Inst #5104 = VADDSDZrm_Intk |
| 36997 | { 5103, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ac70023819ULL }, // Inst #5103 = VADDSDZrm_Int |
| 36998 | { 5102, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 1903, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x80ac70023819ULL }, // Inst #5102 = VADDSDZrm |
| 36999 | { 5101, 3, 1, 0, 1656, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xac28002029ULL }, // Inst #5101 = VADDPSrr |
| 37000 | { 5100, 7, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac28002019ULL }, // Inst #5100 = VADDPSrm |
| 37001 | { 5099, 4, 1, 0, 1905, 1, 0, X86ImpOpBase + 78, 1899, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeac68002029ULL }, // Inst #5099 = VADDPSZrrkz |
| 37002 | { 5098, 5, 1, 0, 1905, 1, 0, X86ImpOpBase + 78, 1894, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaac68002029ULL }, // Inst #5098 = VADDPSZrrk |
| 37003 | { 5097, 5, 1, 0, 1905, 1, 0, X86ImpOpBase + 78, 1889, 0, 0x17eac68002029ULL }, // Inst #5097 = VADDPSZrrbkz |
| 37004 | { 5096, 6, 1, 0, 1905, 1, 0, X86ImpOpBase + 78, 1883, 0, 0x17aac68002029ULL }, // Inst #5096 = VADDPSZrrbk |
| 37005 | { 5095, 4, 1, 0, 1861, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x178ac68002029ULL }, // Inst #5095 = VADDPSZrrb |
| 37006 | { 5094, 3, 1, 0, 1861, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ac68002029ULL }, // Inst #5094 = VADDPSZrr |
| 37007 | { 5093, 8, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeac68002019ULL }, // Inst #5093 = VADDPSZrmkz |
| 37008 | { 5092, 9, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaac68002019ULL }, // Inst #5092 = VADDPSZrmk |
| 37009 | { 5091, 8, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1875, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7eac68002019ULL }, // Inst #5091 = VADDPSZrmbkz |
| 37010 | { 5090, 9, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7aac68002019ULL }, // Inst #5090 = VADDPSZrmbk |
| 37011 | { 5089, 7, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x78ac68002019ULL }, // Inst #5089 = VADDPSZrmb |
| 37012 | { 5088, 7, 1, 0, 1903, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ac68002019ULL }, // Inst #5088 = VADDPSZrm |
| 37013 | { 5087, 4, 1, 0, 1857, 1, 0, X86ImpOpBase + 78, 1871, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ac68002029ULL }, // Inst #5087 = VADDPSZ256rrkz |
| 37014 | { 5086, 5, 1, 0, 1657, 1, 0, X86ImpOpBase + 78, 1866, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ac68002029ULL }, // Inst #5086 = VADDPSZ256rrk |
| 37015 | { 5085, 3, 1, 0, 1657, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ac68002029ULL }, // Inst #5085 = VADDPSZ256rr |
| 37016 | { 5084, 8, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ac68002019ULL }, // Inst #5084 = VADDPSZ256rmkz |
| 37017 | { 5083, 9, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ac68002019ULL }, // Inst #5083 = VADDPSZ256rmk |
| 37018 | { 5082, 8, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x77ac68002019ULL }, // Inst #5082 = VADDPSZ256rmbkz |
| 37019 | { 5081, 9, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1849, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x73ac68002019ULL }, // Inst #5081 = VADDPSZ256rmbk |
| 37020 | { 5080, 7, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x71ac68002019ULL }, // Inst #5080 = VADDPSZ256rmb |
| 37021 | { 5079, 7, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ac68002019ULL }, // Inst #5079 = VADDPSZ256rm |
| 37022 | { 5078, 4, 1, 0, 1856, 1, 0, X86ImpOpBase + 78, 1845, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ac68002029ULL }, // Inst #5078 = VADDPSZ128rrkz |
| 37023 | { 5077, 5, 1, 0, 1656, 1, 0, X86ImpOpBase + 78, 1840, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ac68002029ULL }, // Inst #5077 = VADDPSZ128rrk |
| 37024 | { 5076, 3, 1, 0, 1656, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ac68002029ULL }, // Inst #5076 = VADDPSZ128rr |
| 37025 | { 5075, 8, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ac68002019ULL }, // Inst #5075 = VADDPSZ128rmkz |
| 37026 | { 5074, 9, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ac68002019ULL }, // Inst #5074 = VADDPSZ128rmk |
| 37027 | { 5073, 8, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1832, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x76ac68002019ULL }, // Inst #5073 = VADDPSZ128rmbkz |
| 37028 | { 5072, 9, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1823, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x72ac68002019ULL }, // Inst #5072 = VADDPSZ128rmbk |
| 37029 | { 5071, 7, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x70ac68002019ULL }, // Inst #5071 = VADDPSZ128rmb |
| 37030 | { 5070, 7, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ac68002019ULL }, // Inst #5070 = VADDPSZ128rm |
| 37031 | { 5069, 3, 1, 0, 1657, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ac28002029ULL }, // Inst #5069 = VADDPSYrr |
| 37032 | { 5068, 7, 1, 0, 1896, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ac28002019ULL }, // Inst #5068 = VADDPSYrm |
| 37033 | { 5067, 4, 1, 0, 1888, 1, 0, X86ImpOpBase + 78, 1819, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeac68012029ULL }, // Inst #5067 = VADDPHZrrkz |
| 37034 | { 5066, 5, 1, 0, 1888, 1, 0, X86ImpOpBase + 78, 1814, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaac68012029ULL }, // Inst #5066 = VADDPHZrrk |
| 37035 | { 5065, 5, 1, 0, 1888, 1, 0, X86ImpOpBase + 78, 1809, 0, 0x15eac68012029ULL }, // Inst #5065 = VADDPHZrrbkz |
| 37036 | { 5064, 6, 1, 0, 1888, 1, 0, X86ImpOpBase + 78, 1803, 0, 0x15aac68012029ULL }, // Inst #5064 = VADDPHZrrbk |
| 37037 | { 5063, 4, 1, 0, 1880, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x158ac68012029ULL }, // Inst #5063 = VADDPHZrrb |
| 37038 | { 5062, 3, 1, 0, 1880, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ac68012029ULL }, // Inst #5062 = VADDPHZrr |
| 37039 | { 5061, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeac68012019ULL }, // Inst #5061 = VADDPHZrmkz |
| 37040 | { 5060, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaac68012019ULL }, // Inst #5060 = VADDPHZrmk |
| 37041 | { 5059, 8, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1795, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5eac68012019ULL }, // Inst #5059 = VADDPHZrmbkz |
| 37042 | { 5058, 9, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1786, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x5aac68012019ULL }, // Inst #5058 = VADDPHZrmbk |
| 37043 | { 5057, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x58ac68012019ULL }, // Inst #5057 = VADDPHZrmb |
| 37044 | { 5056, 7, 1, 0, 343, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ac68012019ULL }, // Inst #5056 = VADDPHZrm |
| 37045 | { 5055, 4, 1, 0, 1865, 1, 0, X86ImpOpBase + 78, 1782, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ac68012029ULL }, // Inst #5055 = VADDPHZ256rrkz |
| 37046 | { 5054, 5, 1, 0, 1865, 1, 0, X86ImpOpBase + 78, 1777, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ac68012029ULL }, // Inst #5054 = VADDPHZ256rrk |
| 37047 | { 5053, 3, 1, 0, 1735, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ac68012029ULL }, // Inst #5053 = VADDPHZ256rr |
| 37048 | { 5052, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ac68012019ULL }, // Inst #5052 = VADDPHZ256rmkz |
| 37049 | { 5051, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ac68012019ULL }, // Inst #5051 = VADDPHZ256rmk |
| 37050 | { 5050, 8, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1769, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x57ac68012019ULL }, // Inst #5050 = VADDPHZ256rmbkz |
| 37051 | { 5049, 9, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1760, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x53ac68012019ULL }, // Inst #5049 = VADDPHZ256rmbk |
| 37052 | { 5048, 7, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x51ac68012019ULL }, // Inst #5048 = VADDPHZ256rmb |
| 37053 | { 5047, 7, 1, 0, 341, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ac68012019ULL }, // Inst #5047 = VADDPHZ256rm |
| 37054 | { 5046, 4, 1, 0, 1864, 1, 0, X86ImpOpBase + 78, 1756, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ac68012029ULL }, // Inst #5046 = VADDPHZ128rrkz |
| 37055 | { 5045, 5, 1, 0, 1864, 1, 0, X86ImpOpBase + 78, 1751, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ac68012029ULL }, // Inst #5045 = VADDPHZ128rrk |
| 37056 | { 5044, 3, 1, 0, 1734, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ac68012029ULL }, // Inst #5044 = VADDPHZ128rr |
| 37057 | { 5043, 8, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ac68012019ULL }, // Inst #5043 = VADDPHZ128rmkz |
| 37058 | { 5042, 9, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ac68012019ULL }, // Inst #5042 = VADDPHZ128rmk |
| 37059 | { 5041, 8, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1743, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x56ac68012019ULL }, // Inst #5041 = VADDPHZ128rmbkz |
| 37060 | { 5040, 9, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1734, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x52ac68012019ULL }, // Inst #5040 = VADDPHZ128rmbk |
| 37061 | { 5039, 7, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x50ac68012019ULL }, // Inst #5039 = VADDPHZ128rmb |
| 37062 | { 5038, 7, 1, 0, 1718, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ac68012019ULL }, // Inst #5038 = VADDPHZ128rm |
| 37063 | { 5037, 3, 1, 0, 28, 1, 0, X86ImpOpBase + 78, 1731, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xac30002829ULL }, // Inst #5037 = VADDPDrr |
| 37064 | { 5036, 7, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1724, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xac30002819ULL }, // Inst #5036 = VADDPDrm |
| 37065 | { 5035, 4, 1, 0, 340, 1, 0, X86ImpOpBase + 78, 1720, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeeac70022829ULL }, // Inst #5035 = VADDPDZrrkz |
| 37066 | { 5034, 5, 1, 0, 340, 1, 0, X86ImpOpBase + 78, 1715, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xeaac70022829ULL }, // Inst #5034 = VADDPDZrrk |
| 37067 | { 5033, 5, 1, 0, 340, 1, 0, X86ImpOpBase + 78, 1710, 0, 0x19eac70022829ULL }, // Inst #5033 = VADDPDZrrbkz |
| 37068 | { 5032, 6, 1, 0, 340, 1, 0, X86ImpOpBase + 78, 1704, 0, 0x19aac70022829ULL }, // Inst #5032 = VADDPDZrrbk |
| 37069 | { 5031, 4, 1, 0, 1860, 1, 0, X86ImpOpBase + 78, 1700, 0, 0x198ac70022829ULL }, // Inst #5031 = VADDPDZrrb |
| 37070 | { 5030, 3, 1, 0, 1860, 1, 0, X86ImpOpBase + 78, 1697, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xe8ac70022829ULL }, // Inst #5030 = VADDPDZrr |
| 37071 | { 5029, 8, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeeac70022819ULL }, // Inst #5029 = VADDPDZrmkz |
| 37072 | { 5028, 9, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xeaac70022819ULL }, // Inst #5028 = VADDPDZrmk |
| 37073 | { 5027, 8, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1689, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9eac70022819ULL }, // Inst #5027 = VADDPDZrmbkz |
| 37074 | { 5026, 9, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1680, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x9aac70022819ULL }, // Inst #5026 = VADDPDZrmbk |
| 37075 | { 5025, 7, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x98ac70022819ULL }, // Inst #5025 = VADDPDZrmb |
| 37076 | { 5024, 7, 1, 0, 339, 1, 0, X86ImpOpBase + 78, 1673, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xe8ac70022819ULL }, // Inst #5024 = VADDPDZrm |
| 37077 | { 5023, 4, 1, 0, 1855, 1, 0, X86ImpOpBase + 78, 1669, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc7ac70022829ULL }, // Inst #5023 = VADDPDZ256rrkz |
| 37078 | { 5022, 5, 1, 0, 338, 1, 0, X86ImpOpBase + 78, 1664, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc3ac70022829ULL }, // Inst #5022 = VADDPDZ256rrk |
| 37079 | { 5021, 3, 1, 0, 338, 1, 0, X86ImpOpBase + 78, 1661, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xc1ac70022829ULL }, // Inst #5021 = VADDPDZ256rr |
| 37080 | { 5020, 8, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc7ac70022819ULL }, // Inst #5020 = VADDPDZ256rmkz |
| 37081 | { 5019, 9, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc3ac70022819ULL }, // Inst #5019 = VADDPDZ256rmk |
| 37082 | { 5018, 8, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x97ac70022819ULL }, // Inst #5018 = VADDPDZ256rmbkz |
| 37083 | { 5017, 9, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1644, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x93ac70022819ULL }, // Inst #5017 = VADDPDZ256rmbk |
| 37084 | { 5016, 7, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x91ac70022819ULL }, // Inst #5016 = VADDPDZ256rmb |
| 37085 | { 5015, 7, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1637, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc1ac70022819ULL }, // Inst #5015 = VADDPDZ256rm |
| 37086 | { 5014, 4, 1, 0, 1854, 1, 0, X86ImpOpBase + 78, 1633, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa6ac70022829ULL }, // Inst #5014 = VADDPDZ128rrkz |
| 37087 | { 5013, 5, 1, 0, 28, 1, 0, X86ImpOpBase + 78, 1628, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa2ac70022829ULL }, // Inst #5013 = VADDPDZ128rrk |
| 37088 | { 5012, 3, 1, 0, 28, 1, 0, X86ImpOpBase + 78, 1625, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0xa0ac70022829ULL }, // Inst #5012 = VADDPDZ128rr |
| 37089 | { 5011, 8, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6ac70022819ULL }, // Inst #5011 = VADDPDZ128rmkz |
| 37090 | { 5010, 9, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2ac70022819ULL }, // Inst #5010 = VADDPDZ128rmk |
| 37091 | { 5009, 8, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x96ac70022819ULL }, // Inst #5009 = VADDPDZ128rmbkz |
| 37092 | { 5008, 9, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1608, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x92ac70022819ULL }, // Inst #5008 = VADDPDZ128rmbk |
| 37093 | { 5007, 7, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x90ac70022819ULL }, // Inst #5007 = VADDPDZ128rmb |
| 37094 | { 5006, 7, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 1601, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0ac70022819ULL }, // Inst #5006 = VADDPDZ128rm |
| 37095 | { 5005, 3, 1, 0, 338, 1, 0, X86ImpOpBase + 78, 1598, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x1ac30002829ULL }, // Inst #5005 = VADDPDYrr |
| 37096 | { 5004, 7, 1, 0, 337, 1, 0, X86ImpOpBase + 78, 1591, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1ac30002819ULL }, // Inst #5004 = VADDPDYrm |
| 37097 | { 5003, 9, 1, 0, 8, 0, 1, X86ImpOpBase + 0, 1582, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #5003 = VAARG_X32 |
| 37098 | { 5002, 9, 1, 0, 8, 0, 1, X86ImpOpBase + 0, 1573, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #5002 = VAARG_64 |
| 37099 | { 5001, 9, 1, 0, 336, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6d5e8005819ULL }, // Inst #5001 = V4FNMADDSSrmkz |
| 37100 | { 5000, 9, 1, 0, 336, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2d5e8005819ULL }, // Inst #5000 = V4FNMADDSSrmk |
| 37101 | { 4999, 8, 1, 0, 336, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0d5e8005819ULL }, // Inst #4999 = V4FNMADDSSrm |
| 37102 | { 4998, 9, 1, 0, 335, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaed568005819ULL }, // Inst #4998 = V4FNMADDPSrmkz |
| 37103 | { 4997, 9, 1, 0, 335, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaad568005819ULL }, // Inst #4997 = V4FNMADDPSrmk |
| 37104 | { 4996, 8, 1, 0, 335, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8d568005819ULL }, // Inst #4996 = V4FNMADDPSrm |
| 37105 | { 4995, 9, 1, 0, 336, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa6cde8005819ULL }, // Inst #4995 = V4FMADDSSrmkz |
| 37106 | { 4994, 9, 1, 0, 336, 1, 0, X86ImpOpBase + 78, 1564, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa2cde8005819ULL }, // Inst #4994 = V4FMADDSSrmk |
| 37107 | { 4993, 8, 1, 0, 336, 1, 0, X86ImpOpBase + 78, 1556, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa0cde8005819ULL }, // Inst #4993 = V4FMADDSSrm |
| 37108 | { 4992, 9, 1, 0, 335, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaecd68005819ULL }, // Inst #4992 = V4FMADDPSrmkz |
| 37109 | { 4991, 9, 1, 0, 335, 1, 0, X86ImpOpBase + 78, 1547, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xaacd68005819ULL }, // Inst #4991 = V4FMADDPSrmk |
| 37110 | { 4990, 8, 1, 0, 335, 1, 0, X86ImpOpBase + 78, 1539, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xa8cd68005819ULL }, // Inst #4990 = V4FMADDPSrm |
| 37111 | { 4989, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c60011029ULL }, // Inst #4989 = UWRMSRrr_EVEX |
| 37112 | { 4988, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c00005029ULL }, // Inst #4988 = UWRMSRrr |
| 37113 | { 4987, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c60197030ULL }, // Inst #4987 = UWRMSRir_EVEX |
| 37114 | { 4986, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c20197030ULL }, // Inst #4986 = UWRMSRir |
| 37115 | { 4985, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c60011829ULL }, // Inst #4985 = URDMSRrr_EVEX |
| 37116 | { 4984, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c00005829ULL }, // Inst #4984 = URDMSRrr |
| 37117 | { 4983, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c60197830ULL }, // Inst #4983 = URDMSRri_EVEX |
| 37118 | { 4982, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7c20197830ULL }, // Inst #4982 = URDMSRri |
| 37119 | { 4981, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 472, 0, 0xa08002029ULL }, // Inst #4981 = UNPCKLPSrr |
| 37120 | { 4980, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0xa08002019ULL }, // Inst #4980 = UNPCKLPSrm |
| 37121 | { 4979, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 472, 0, 0xa10002829ULL }, // Inst #4979 = UNPCKLPDrr |
| 37122 | { 4978, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0xa10002819ULL }, // Inst #4978 = UNPCKLPDrm |
| 37123 | { 4977, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 472, 0, 0xa88002029ULL }, // Inst #4977 = UNPCKHPSrr |
| 37124 | { 4976, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0xa88002019ULL }, // Inst #4976 = UNPCKHPSrm |
| 37125 | { 4975, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0xa90002829ULL }, // Inst #4975 = UNPCKHPDrr |
| 37126 | { 4974, 7, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0xa90002819ULL }, // Inst #4974 = UNPCKHPDrm |
| 37127 | { 4973, 1, 0, 0, 8, 2, 1, X86ImpOpBase + 679, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003836ULL }, // Inst #4973 = UMWAIT |
| 37128 | { 4972, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003636ULL }, // Inst #4972 = UMONITOR64 |
| 37129 | { 4971, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003436ULL }, // Inst #4971 = UMONITOR32 |
| 37130 | { 4970, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003236ULL }, // Inst #4970 = UMONITOR16 |
| 37131 | { 4969, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000306cULL }, // Inst #4969 = UIRET |
| 37132 | { 4968, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c800020a9ULL }, // Inst #4968 = UD1Wr |
| 37133 | { 4967, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80002099ULL }, // Inst #4967 = UD1Wm |
| 37134 | { 4966, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80022029ULL }, // Inst #4966 = UD1Qr |
| 37135 | { 4965, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80022019ULL }, // Inst #4965 = UD1Qm |
| 37136 | { 4964, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80002129ULL }, // Inst #4964 = UD1Lr |
| 37137 | { 4963, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80002119ULL }, // Inst #4963 = UD1Lm |
| 37138 | { 4962, 1, 0, 0, 738, 2, 1, X86ImpOpBase + 682, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000034ULL }, // Inst #4962 = UCOM_Fr |
| 37139 | { 4961, 2, 0, 0, 87, 1, 1, X86ImpOpBase + 79, 312, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #4961 = UCOM_Fpr80 |
| 37140 | { 4960, 2, 0, 0, 87, 1, 1, X86ImpOpBase + 79, 310, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #4960 = UCOM_Fpr64 |
| 37141 | { 4959, 2, 0, 0, 87, 1, 1, X86ImpOpBase + 79, 308, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #4959 = UCOM_Fpr32 |
| 37142 | { 4958, 2, 0, 0, 87, 1, 2, X86ImpOpBase + 160, 312, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #4958 = UCOM_FpIr80 |
| 37143 | { 4957, 2, 0, 0, 87, 1, 2, X86ImpOpBase + 160, 310, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #4957 = UCOM_FpIr64 |
| 37144 | { 4956, 2, 0, 0, 87, 1, 2, X86ImpOpBase + 160, 308, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #4956 = UCOM_FpIr32 |
| 37145 | { 4955, 1, 0, 0, 738, 2, 1, X86ImpOpBase + 682, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000035ULL }, // Inst #4955 = UCOM_FPr |
| 37146 | { 4954, 0, 0, 0, 615, 2, 1, X86ImpOpBase + 682, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000069ULL }, // Inst #4954 = UCOM_FPPr |
| 37147 | { 4953, 1, 0, 0, 756, 2, 2, X86ImpOpBase + 156, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000035ULL }, // Inst #4953 = UCOM_FIr |
| 37148 | { 4952, 1, 0, 0, 756, 2, 2, X86ImpOpBase + 156, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000035ULL }, // Inst #4952 = UCOM_FIPr |
| 37149 | { 4951, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x1708002029ULL }, // Inst #4951 = UCOMISSrr_Int |
| 37150 | { 4950, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 986, 0|(1ULL<<MCID::MayRaiseFPException), 0x1708002029ULL }, // Inst #4950 = UCOMISSrr |
| 37151 | { 4949, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1708002019ULL }, // Inst #4949 = UCOMISSrm_Int |
| 37152 | { 4948, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1708002019ULL }, // Inst #4948 = UCOMISSrm |
| 37153 | { 4947, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x1710002829ULL }, // Inst #4947 = UCOMISDrr_Int |
| 37154 | { 4946, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 978, 0|(1ULL<<MCID::MayRaiseFPException), 0x1710002829ULL }, // Inst #4946 = UCOMISDrr |
| 37155 | { 4945, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1710002819ULL }, // Inst #4945 = UCOMISDrm_Int |
| 37156 | { 4944, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 972, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1710002819ULL }, // Inst #4944 = UCOMISDrm |
| 37157 | { 4943, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4943 = UBSAN_UD1 |
| 37158 | { 4942, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 553, 0, 0x80c002a034ULL }, // Inst #4942 = TZMSK64rr |
| 37159 | { 4941, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x80c002a024ULL }, // Inst #4941 = TZMSK64rm |
| 37160 | { 4940, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 551, 0, 0x80c000a034ULL }, // Inst #4940 = TZMSK32rr |
| 37161 | { 4939, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x80c000a024ULL }, // Inst #4939 = TZMSK32rm |
| 37162 | { 4938, 2, 1, 0, 334, 0, 0, X86ImpOpBase + 0, 553, 0, 0x10007a60030029ULL }, // Inst #4938 = TZCNT64rr_NF |
| 37163 | { 4937, 2, 1, 0, 334, 0, 1, X86ImpOpBase + 0, 553, 0, 0xc007a60030029ULL }, // Inst #4937 = TZCNT64rr_EVEX |
| 37164 | { 4936, 2, 1, 0, 334, 0, 1, X86ImpOpBase + 0, 553, 0, 0x5e00023029ULL }, // Inst #4936 = TZCNT64rr |
| 37165 | { 4935, 6, 1, 0, 333, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10007a60030019ULL }, // Inst #4935 = TZCNT64rm_NF |
| 37166 | { 4934, 6, 1, 0, 333, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0xc007a60030019ULL }, // Inst #4934 = TZCNT64rm_EVEX |
| 37167 | { 4933, 6, 1, 0, 333, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x5e00023019ULL }, // Inst #4933 = TZCNT64rm |
| 37168 | { 4932, 2, 1, 0, 334, 0, 0, X86ImpOpBase + 0, 551, 0, 0x10007a60010029ULL }, // Inst #4932 = TZCNT32rr_NF |
| 37169 | { 4931, 2, 1, 0, 334, 0, 1, X86ImpOpBase + 0, 551, 0, 0xc007a60010029ULL }, // Inst #4931 = TZCNT32rr_EVEX |
| 37170 | { 4930, 2, 1, 0, 334, 0, 1, X86ImpOpBase + 0, 551, 0, 0x5e00003129ULL }, // Inst #4930 = TZCNT32rr |
| 37171 | { 4929, 6, 1, 0, 333, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10007a60010019ULL }, // Inst #4929 = TZCNT32rm_NF |
| 37172 | { 4928, 6, 1, 0, 333, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0xc007a60010019ULL }, // Inst #4928 = TZCNT32rm_EVEX |
| 37173 | { 4927, 6, 1, 0, 333, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x5e00003119ULL }, // Inst #4927 = TZCNT32rm |
| 37174 | { 4926, 2, 1, 0, 334, 0, 0, X86ImpOpBase + 0, 547, 0, 0x10007a60010829ULL }, // Inst #4926 = TZCNT16rr_NF |
| 37175 | { 4925, 2, 1, 0, 334, 0, 1, X86ImpOpBase + 0, 547, 0, 0xc007a60010829ULL }, // Inst #4925 = TZCNT16rr_EVEX |
| 37176 | { 4924, 2, 1, 0, 1027, 0, 1, X86ImpOpBase + 0, 547, 0, 0x5e000030a9ULL }, // Inst #4924 = TZCNT16rr |
| 37177 | { 4923, 6, 1, 0, 333, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10007a60010819ULL }, // Inst #4923 = TZCNT16rm_NF |
| 37178 | { 4922, 6, 1, 0, 333, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0xc007a60010819ULL }, // Inst #4922 = TZCNT16rm_EVEX |
| 37179 | { 4921, 6, 1, 0, 333, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x5e00003099ULL }, // Inst #4921 = TZCNT16rm |
| 37180 | { 4920, 1, 0, 0, 688, 1, 1, X86ImpOpBase + 79, 1199, 0|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4920 = TST_Fp80 |
| 37181 | { 4919, 1, 0, 0, 688, 1, 1, X86ImpOpBase + 79, 1198, 0|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4919 = TST_Fp64 |
| 37182 | { 4918, 1, 0, 0, 688, 1, 1, X86ImpOpBase + 79, 1197, 0|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4918 = TST_Fp32 |
| 37183 | { 4917, 0, 0, 0, 1171, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000064ULL }, // Inst #4917 = TST_F |
| 37184 | { 4916, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Trap)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x580002001ULL }, // Inst #4916 = TRAP |
| 37185 | { 4915, 1, 0, 0, 8, 2, 1, X86ImpOpBase + 679, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002836ULL }, // Inst #4915 = TPAUSE |
| 37186 | { 4914, 5, 0, 0, 8, 2, 2, X86ImpOpBase + 675, 231, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4914 = TLS_desc64 |
| 37187 | { 4913, 5, 0, 0, 8, 2, 2, X86ImpOpBase + 675, 231, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4913 = TLS_desc32 |
| 37188 | { 4912, 5, 0, 0, 8, 2, 51, X86ImpOpBase + 622, 231, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4912 = TLS_base_addrX32 |
| 37189 | { 4911, 5, 0, 0, 8, 2, 51, X86ImpOpBase + 622, 231, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4911 = TLS_base_addr64 |
| 37190 | { 4910, 5, 0, 0, 8, 2, 45, X86ImpOpBase + 575, 231, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4910 = TLS_base_addr32 |
| 37191 | { 4909, 5, 0, 0, 8, 2, 51, X86ImpOpBase + 622, 231, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4909 = TLS_addrX32 |
| 37192 | { 4908, 5, 0, 0, 8, 2, 51, X86ImpOpBase + 622, 231, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4908 = TLS_addr64 |
| 37193 | { 4907, 5, 0, 0, 8, 2, 45, X86ImpOpBase + 575, 231, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4907 = TLS_addr32 |
| 37194 | { 4906, 5, 0, 0, 8, 2, 3, X86ImpOpBase + 570, 231, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4906 = TLSCall_64 |
| 37195 | { 4905, 5, 0, 0, 8, 2, 4, X86ImpOpBase + 564, 231, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4905 = TLSCall_32 |
| 37196 | { 4904, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207fULL }, // Inst #4904 = TLBSYNC |
| 37197 | { 4903, 1, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1538, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x24a0005815ULL }, // Inst #4903 = TILEZERO |
| 37198 | { 4902, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x25e0005017ULL }, // Inst #4902 = TILESTORED_EVEX |
| 37199 | { 4901, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1532, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x25a0005017ULL }, // Inst #4901 = TILESTORED |
| 37200 | { 4900, 0, 0, 0, 8, 0, 8, X86ImpOpBase + 19, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x24a0004040ULL }, // Inst #4900 = TILERELEASE |
| 37201 | { 4899, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x25e0005816ULL }, // Inst #4899 = TILELOADD_EVEX |
| 37202 | { 4898, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x25e0004816ULL }, // Inst #4898 = TILELOADDT1_EVEX |
| 37203 | { 4897, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x25a0004816ULL }, // Inst #4897 = TILELOADDT1 |
| 37204 | { 4896, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x25a0005816ULL }, // Inst #4896 = TILELOADD |
| 37205 | { 4895, 0, 0, 0, 8, 0, 1, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000306dULL }, // Inst #4895 = TESTUI |
| 37206 | { 4894, 2, 0, 0, 1457, 0, 1, X86ImpOpBase + 0, 925, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4200000028ULL }, // Inst #4894 = TEST8rr |
| 37207 | { 4893, 2, 0, 0, 1457, 0, 1, X86ImpOpBase + 0, 917, 0|(1ULL<<MCID::Compare), 0x7b00040030ULL }, // Inst #4893 = TEST8ri |
| 37208 | { 4892, 6, 0, 0, 1466, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4200000018ULL }, // Inst #4892 = TEST8mr |
| 37209 | { 4891, 6, 0, 0, 1462, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b00040020ULL }, // Inst #4891 = TEST8mi |
| 37210 | { 4890, 1, 0, 0, 1457, 1, 1, X86ImpOpBase + 132, 1, 0|(1ULL<<MCID::Compare), 0x5400040001ULL }, // Inst #4890 = TEST8i8 |
| 37211 | { 4889, 2, 0, 0, 1457, 0, 1, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4280020028ULL }, // Inst #4889 = TEST64rr |
| 37212 | { 4888, 2, 0, 0, 1457, 0, 1, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::Compare), 0x7b80220030ULL }, // Inst #4888 = TEST64ri32 |
| 37213 | { 4887, 6, 0, 0, 1466, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280020018ULL }, // Inst #4887 = TEST64mr |
| 37214 | { 4886, 6, 0, 0, 1463, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b80220020ULL }, // Inst #4886 = TEST64mi32 |
| 37215 | { 4885, 1, 0, 0, 1457, 1, 1, X86ImpOpBase + 130, 1, 0|(1ULL<<MCID::Compare), 0x5480220001ULL }, // Inst #4885 = TEST64i32 |
| 37216 | { 4884, 2, 0, 0, 1457, 0, 1, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4280000128ULL }, // Inst #4884 = TEST32rr |
| 37217 | { 4883, 2, 0, 0, 1457, 0, 1, X86ImpOpBase + 0, 203, 0|(1ULL<<MCID::Compare), 0x7b80180130ULL }, // Inst #4883 = TEST32ri |
| 37218 | { 4882, 6, 0, 0, 1466, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280000118ULL }, // Inst #4882 = TEST32mr |
| 37219 | { 4881, 6, 0, 0, 1462, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b80180120ULL }, // Inst #4881 = TEST32mi |
| 37220 | { 4880, 1, 0, 0, 1457, 1, 1, X86ImpOpBase + 128, 1, 0|(1ULL<<MCID::Compare), 0x5480180101ULL }, // Inst #4880 = TEST32i32 |
| 37221 | { 4879, 2, 0, 0, 1457, 0, 1, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x42800000a8ULL }, // Inst #4879 = TEST16rr |
| 37222 | { 4878, 2, 0, 0, 1, 0, 1, X86ImpOpBase + 0, 575, 0|(1ULL<<MCID::Compare), 0x7b801000b0ULL }, // Inst #4878 = TEST16ri |
| 37223 | { 4877, 6, 0, 0, 1466, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280000098ULL }, // Inst #4877 = TEST16mr |
| 37224 | { 4876, 6, 0, 0, 1462, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b801000a0ULL }, // Inst #4876 = TEST16mi |
| 37225 | { 4875, 1, 0, 0, 1, 1, 1, X86ImpOpBase + 126, 1, 0|(1ULL<<MCID::Compare), 0x5480100081ULL }, // Inst #4875 = TEST16i16 |
| 37226 | { 4874, 4, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xae2000582aULL }, // Inst #4874 = TDPFP16PS |
| 37227 | { 4873, 4, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaf2000402aULL }, // Inst #4873 = TDPBUUD |
| 37228 | { 4872, 4, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaf2000482aULL }, // Inst #4872 = TDPBUSD |
| 37229 | { 4871, 4, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaf2000502aULL }, // Inst #4871 = TDPBSUD |
| 37230 | { 4870, 4, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xaf2000582aULL }, // Inst #4870 = TDPBSSD |
| 37231 | { 4869, 4, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xae2000502aULL }, // Inst #4869 = TDPBF16PS |
| 37232 | { 4868, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000284cULL }, // Inst #4868 = TDCALL |
| 37233 | { 4867, 2, 0, 0, 4, 2, 0, X86ImpOpBase + 1, 1524, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4867 = TCRETURNri64 |
| 37234 | { 4866, 2, 0, 0, 4, 2, 0, X86ImpOpBase + 112, 1524, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4866 = TCRETURNri |
| 37235 | { 4865, 6, 0, 0, 6, 2, 0, X86ImpOpBase + 1, 1518, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4865 = TCRETURNmi64 |
| 37236 | { 4864, 6, 0, 0, 6, 2, 0, X86ImpOpBase + 112, 1518, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4864 = TCRETURNmi |
| 37237 | { 4863, 3, 0, 0, 4, 3, 0, X86ImpOpBase + 561, 1515, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4863 = TCRETURNdicc |
| 37238 | { 4862, 3, 0, 0, 4, 3, 0, X86ImpOpBase + 558, 1515, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4862 = TCRETURNdi64cc |
| 37239 | { 4861, 2, 0, 0, 4, 2, 0, X86ImpOpBase + 1, 1503, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4861 = TCRETURNdi64 |
| 37240 | { 4860, 2, 0, 0, 4, 2, 0, X86ImpOpBase + 112, 1503, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #4860 = TCRETURNdi |
| 37241 | { 4859, 4, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb62000402aULL }, // Inst #4859 = TCMMRLFP16PS |
| 37242 | { 4858, 4, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb62000482aULL }, // Inst #4858 = TCMMIMFP16PS |
| 37243 | { 4857, 1, 0, 0, 4, 2, 0, X86ImpOpBase + 1, 1510, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x20000ULL }, // Inst #4857 = TAILJMPr64_REX |
| 37244 | { 4856, 1, 0, 0, 4, 2, 0, X86ImpOpBase + 1, 1510, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4856 = TAILJMPr64 |
| 37245 | { 4855, 1, 0, 0, 4, 2, 0, X86ImpOpBase + 112, 1510, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4855 = TAILJMPr |
| 37246 | { 4854, 5, 0, 0, 6, 2, 0, X86ImpOpBase + 1, 1505, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x20000ULL }, // Inst #4854 = TAILJMPm64_REX |
| 37247 | { 4853, 5, 0, 0, 6, 2, 0, X86ImpOpBase + 1, 1505, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4853 = TAILJMPm64 |
| 37248 | { 4852, 5, 0, 0, 6, 2, 0, X86ImpOpBase + 112, 1505, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4852 = TAILJMPm |
| 37249 | { 4851, 2, 0, 0, 4, 3, 0, X86ImpOpBase + 561, 1503, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4851 = TAILJMPd_CC |
| 37250 | { 4850, 2, 0, 0, 4, 3, 0, X86ImpOpBase + 558, 1503, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4850 = TAILJMPd64_CC |
| 37251 | { 4849, 1, 0, 0, 4, 2, 0, X86ImpOpBase + 1, 578, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4849 = TAILJMPd64 |
| 37252 | { 4848, 1, 0, 0, 4, 2, 0, X86ImpOpBase + 112, 578, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4848 = TAILJMPd |
| 37253 | { 4847, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 553, 0, 0x80c002a037ULL }, // Inst #4847 = T1MSKC64rr |
| 37254 | { 4846, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x80c002a027ULL }, // Inst #4846 = T1MSKC64rm |
| 37255 | { 4845, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 551, 0, 0x80c000a037ULL }, // Inst #4845 = T1MSKC32rr |
| 37256 | { 4844, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x80c000a027ULL }, // Inst #4844 = T1MSKC32rm |
| 37257 | { 4843, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380022001ULL }, // Inst #4843 = SYSRET64 |
| 37258 | { 4842, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380002001ULL }, // Inst #4842 = SYSRET |
| 37259 | { 4841, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a80022001ULL }, // Inst #4841 = SYSEXIT64 |
| 37260 | { 4840, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a80002001ULL }, // Inst #4840 = SYSEXIT |
| 37261 | { 4839, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a00002001ULL }, // Inst #4839 = SYSENTER |
| 37262 | { 4838, 0, 0, 0, 1492, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x280002001ULL }, // Inst #4838 = SYSCALL |
| 37263 | { 4837, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002078ULL }, // Inst #4837 = SWAPGS |
| 37264 | { 4836, 1, 0, 0, 1676, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000035ULL }, // Inst #4836 = SUB_FrST0 |
| 37265 | { 4835, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4835 = SUB_FpI32m80 |
| 37266 | { 4834, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4834 = SUB_FpI32m64 |
| 37267 | { 4833, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4833 = SUB_FpI32m32 |
| 37268 | { 4832, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4832 = SUB_FpI16m80 |
| 37269 | { 4831, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4831 = SUB_FpI16m64 |
| 37270 | { 4830, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4830 = SUB_FpI16m32 |
| 37271 | { 4829, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4829 = SUB_Fp80m64 |
| 37272 | { 4828, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4828 = SUB_Fp80m32 |
| 37273 | { 4827, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 516, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #4827 = SUB_Fp80 |
| 37274 | { 4826, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4826 = SUB_Fp64m32 |
| 37275 | { 4825, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4825 = SUB_Fp64m |
| 37276 | { 4824, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 506, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #4824 = SUB_Fp64 |
| 37277 | { 4823, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4823 = SUB_Fp32m |
| 37278 | { 4822, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 496, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #4822 = SUB_Fp32 |
| 37279 | { 4821, 1, 0, 0, 1676, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000034ULL }, // Inst #4821 = SUB_FST0r |
| 37280 | { 4820, 1, 0, 0, 1676, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000035ULL }, // Inst #4820 = SUB_FPrST0 |
| 37281 | { 4819, 5, 0, 0, 802, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000024ULL }, // Inst #4819 = SUB_FI32m |
| 37282 | { 4818, 5, 0, 0, 802, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000024ULL }, // Inst #4818 = SUB_FI16m |
| 37283 | { 4817, 5, 0, 0, 798, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000024ULL }, // Inst #4817 = SUB_F64m |
| 37284 | { 4816, 5, 0, 0, 798, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000024ULL }, // Inst #4816 = SUB_F32m |
| 37285 | { 4815, 3, 1, 0, 1456, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e08003029ULL }, // Inst #4815 = SUBSSrr_Int |
| 37286 | { 4814, 3, 1, 0, 1456, 1, 0, X86ImpOpBase + 78, 492, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e08003029ULL }, // Inst #4814 = SUBSSrr |
| 37287 | { 4813, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e08003019ULL }, // Inst #4813 = SUBSSrm_Int |
| 37288 | { 4812, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 485, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e08003019ULL }, // Inst #4812 = SUBSSrm |
| 37289 | { 4811, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e10003829ULL }, // Inst #4811 = SUBSDrr_Int |
| 37290 | { 4810, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 482, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e10003829ULL }, // Inst #4810 = SUBSDrr |
| 37291 | { 4809, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e10003819ULL }, // Inst #4809 = SUBSDrm_Int |
| 37292 | { 4808, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 475, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e10003819ULL }, // Inst #4808 = SUBSDrm |
| 37293 | { 4807, 1, 0, 0, 1676, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000034ULL }, // Inst #4807 = SUBR_FrST0 |
| 37294 | { 4806, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4806 = SUBR_FpI32m80 |
| 37295 | { 4805, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4805 = SUBR_FpI32m64 |
| 37296 | { 4804, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4804 = SUBR_FpI32m32 |
| 37297 | { 4803, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4803 = SUBR_FpI16m80 |
| 37298 | { 4802, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4802 = SUBR_FpI16m64 |
| 37299 | { 4801, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4801 = SUBR_FpI16m32 |
| 37300 | { 4800, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4800 = SUBR_Fp80m64 |
| 37301 | { 4799, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4799 = SUBR_Fp80m32 |
| 37302 | { 4798, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4798 = SUBR_Fp64m32 |
| 37303 | { 4797, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4797 = SUBR_Fp64m |
| 37304 | { 4796, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4796 = SUBR_Fp32m |
| 37305 | { 4795, 1, 0, 0, 1676, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000035ULL }, // Inst #4795 = SUBR_FST0r |
| 37306 | { 4794, 1, 0, 0, 1676, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000034ULL }, // Inst #4794 = SUBR_FPrST0 |
| 37307 | { 4793, 5, 0, 0, 802, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000025ULL }, // Inst #4793 = SUBR_FI32m |
| 37308 | { 4792, 5, 0, 0, 802, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000025ULL }, // Inst #4792 = SUBR_FI16m |
| 37309 | { 4791, 5, 0, 0, 798, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000025ULL }, // Inst #4791 = SUBR_F64m |
| 37310 | { 4790, 5, 0, 0, 798, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000025ULL }, // Inst #4790 = SUBR_F32m |
| 37311 | { 4789, 3, 1, 0, 1656, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e08002029ULL }, // Inst #4789 = SUBPSrr |
| 37312 | { 4788, 7, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e08002019ULL }, // Inst #4788 = SUBPSrm |
| 37313 | { 4787, 3, 1, 0, 28, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e10002829ULL }, // Inst #4787 = SUBPDrr |
| 37314 | { 4786, 7, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e10002819ULL }, // Inst #4786 = SUBPDrm |
| 37315 | { 4785, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Compare), 0x1500000029ULL }, // Inst #4785 = SUB8rr_REV |
| 37316 | { 4784, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Compare), 0x10001560010029ULL }, // Inst #4784 = SUB8rr_NF_REV |
| 37317 | { 4783, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::Compare), 0x10109560010029ULL }, // Inst #4783 = SUB8rr_NF_ND_REV |
| 37318 | { 4782, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::Compare), 0x10109460010028ULL }, // Inst #4782 = SUB8rr_NF_ND |
| 37319 | { 4781, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Compare), 0x10001460010028ULL }, // Inst #4781 = SUB8rr_NF |
| 37320 | { 4780, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::Compare), 0x109560010029ULL }, // Inst #4780 = SUB8rr_ND_REV |
| 37321 | { 4779, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::Compare), 0x109460010028ULL }, // Inst #4779 = SUB8rr_ND |
| 37322 | { 4778, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Compare), 0xc001560010029ULL }, // Inst #4778 = SUB8rr_EVEX_REV |
| 37323 | { 4777, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Compare), 0xc001460010028ULL }, // Inst #4777 = SUB8rr_EVEX |
| 37324 | { 4776, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Compare), 0x1400000028ULL }, // Inst #4776 = SUB8rr |
| 37325 | { 4775, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10109560010019ULL }, // Inst #4775 = SUB8rm_NF_ND |
| 37326 | { 4774, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10001560010019ULL }, // Inst #4774 = SUB8rm_NF |
| 37327 | { 4773, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 455, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x109560010019ULL }, // Inst #4773 = SUB8rm_ND |
| 37328 | { 4772, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0xc001560010019ULL }, // Inst #4772 = SUB8rm_EVEX |
| 37329 | { 4771, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1500000019ULL }, // Inst #4771 = SUB8rm |
| 37330 | { 4770, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 445, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c060050035ULL }, // Inst #4770 = SUB8ri_NF_ND |
| 37331 | { 4769, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10004060050035ULL }, // Inst #4769 = SUB8ri_NF |
| 37332 | { 4768, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 445, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c060050035ULL }, // Inst #4768 = SUB8ri_ND |
| 37333 | { 4767, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc004060050035ULL }, // Inst #4767 = SUB8ri_EVEX |
| 37334 | { 4766, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::Compare), 0x4100040035ULL }, // Inst #4766 = SUB8ri8 |
| 37335 | { 4765, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x4000040035ULL }, // Inst #4765 = SUB8ri |
| 37336 | { 4764, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 438, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10109460010018ULL }, // Inst #4764 = SUB8mr_NF_ND |
| 37337 | { 4763, 6, 0, 0, 928, 0, 0, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001460010018ULL }, // Inst #4763 = SUB8mr_NF |
| 37338 | { 4762, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 438, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x109460010018ULL }, // Inst #4762 = SUB8mr_ND |
| 37339 | { 4761, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001460010018ULL }, // Inst #4761 = SUB8mr_EVEX |
| 37340 | { 4760, 6, 0, 0, 1455, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1400000018ULL }, // Inst #4760 = SUB8mr |
| 37341 | { 4759, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c060050025ULL }, // Inst #4759 = SUB8mi_NF_ND |
| 37342 | { 4758, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10004060050025ULL }, // Inst #4758 = SUB8mi_NF |
| 37343 | { 4757, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c060050025ULL }, // Inst #4757 = SUB8mi_ND |
| 37344 | { 4756, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050025ULL }, // Inst #4756 = SUB8mi_EVEX |
| 37345 | { 4755, 6, 0, 0, 1450, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040025ULL }, // Inst #4755 = SUB8mi8 |
| 37346 | { 4754, 6, 0, 0, 1450, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040025ULL }, // Inst #4754 = SUB8mi |
| 37347 | { 4753, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 75, 1, 0|(1ULL<<MCID::Compare), 0x1600040001ULL }, // Inst #4753 = SUB8i8 |
| 37348 | { 4752, 3, 1, 0, 1054, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Compare), 0x1580020029ULL }, // Inst #4752 = SUB64rr_REV |
| 37349 | { 4751, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Compare), 0x100015e0030029ULL }, // Inst #4751 = SUB64rr_NF_REV |
| 37350 | { 4750, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Compare), 0x101095e0030029ULL }, // Inst #4750 = SUB64rr_NF_ND_REV |
| 37351 | { 4749, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Compare), 0x101094e0030028ULL }, // Inst #4749 = SUB64rr_NF_ND |
| 37352 | { 4748, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Compare), 0x100014e0030028ULL }, // Inst #4748 = SUB64rr_NF |
| 37353 | { 4747, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Compare), 0x1095e0030029ULL }, // Inst #4747 = SUB64rr_ND_REV |
| 37354 | { 4746, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Compare), 0x1094e0030028ULL }, // Inst #4746 = SUB64rr_ND |
| 37355 | { 4745, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Compare), 0xc0015e0030029ULL }, // Inst #4745 = SUB64rr_EVEX_REV |
| 37356 | { 4744, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Compare), 0xc0014e0030028ULL }, // Inst #4744 = SUB64rr_EVEX |
| 37357 | { 4743, 3, 1, 0, 809, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Compare), 0x1480020028ULL }, // Inst #4743 = SUB64rr |
| 37358 | { 4742, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101095e0030019ULL }, // Inst #4742 = SUB64rm_NF_ND |
| 37359 | { 4741, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x100015e0030019ULL }, // Inst #4741 = SUB64rm_NF |
| 37360 | { 4740, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1095e0030019ULL }, // Inst #4740 = SUB64rm_ND |
| 37361 | { 4739, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0xc0015e0030019ULL }, // Inst #4739 = SUB64rm_EVEX |
| 37362 | { 4738, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580020019ULL }, // Inst #4738 = SUB64rm |
| 37363 | { 4737, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 405, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0070035ULL }, // Inst #4737 = SUB64ri8_NF_ND |
| 37364 | { 4736, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0070035ULL }, // Inst #4736 = SUB64ri8_NF |
| 37365 | { 4735, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 405, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0070035ULL }, // Inst #4735 = SUB64ri8_ND |
| 37366 | { 4734, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0070035ULL }, // Inst #4734 = SUB64ri8_EVEX |
| 37367 | { 4733, 3, 1, 0, 1447, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180060035ULL }, // Inst #4733 = SUB64ri8 |
| 37368 | { 4732, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 405, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0230035ULL }, // Inst #4732 = SUB64ri32_NF_ND |
| 37369 | { 4731, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0230035ULL }, // Inst #4731 = SUB64ri32_NF |
| 37370 | { 4730, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 405, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0230035ULL }, // Inst #4730 = SUB64ri32_ND |
| 37371 | { 4729, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0230035ULL }, // Inst #4729 = SUB64ri32_EVEX |
| 37372 | { 4728, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x4080220035ULL }, // Inst #4728 = SUB64ri32 |
| 37373 | { 4727, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101094e0030018ULL }, // Inst #4727 = SUB64mr_NF_ND |
| 37374 | { 4726, 6, 0, 0, 928, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100014e0030018ULL }, // Inst #4726 = SUB64mr_NF |
| 37375 | { 4725, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1094e0030018ULL }, // Inst #4725 = SUB64mr_ND |
| 37376 | { 4724, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0014e0030018ULL }, // Inst #4724 = SUB64mr_EVEX |
| 37377 | { 4723, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480020018ULL }, // Inst #4723 = SUB64mr |
| 37378 | { 4722, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c1e0070025ULL }, // Inst #4722 = SUB64mi8_NF_ND |
| 37379 | { 4721, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0070025ULL }, // Inst #4721 = SUB64mi8_NF |
| 37380 | { 4720, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c1e0070025ULL }, // Inst #4720 = SUB64mi8_ND |
| 37381 | { 4719, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070025ULL }, // Inst #4719 = SUB64mi8_EVEX |
| 37382 | { 4718, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060025ULL }, // Inst #4718 = SUB64mi8 |
| 37383 | { 4717, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c0e0230025ULL }, // Inst #4717 = SUB64mi32_NF_ND |
| 37384 | { 4716, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0230025ULL }, // Inst #4716 = SUB64mi32_NF |
| 37385 | { 4715, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c0e0230025ULL }, // Inst #4715 = SUB64mi32_ND |
| 37386 | { 4714, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230025ULL }, // Inst #4714 = SUB64mi32_EVEX |
| 37387 | { 4713, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220025ULL }, // Inst #4713 = SUB64mi32 |
| 37388 | { 4712, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 72, 1, 0|(1ULL<<MCID::Compare), 0x1680220001ULL }, // Inst #4712 = SUB64i32 |
| 37389 | { 4711, 3, 1, 0, 1054, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare), 0x1580000129ULL }, // Inst #4711 = SUB32rr_REV |
| 37390 | { 4710, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare), 0x100015e0010029ULL }, // Inst #4710 = SUB32rr_NF_REV |
| 37391 | { 4709, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Compare), 0x101095e0010029ULL }, // Inst #4709 = SUB32rr_NF_ND_REV |
| 37392 | { 4708, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Compare), 0x101094e0010028ULL }, // Inst #4708 = SUB32rr_NF_ND |
| 37393 | { 4707, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare), 0x100014e0010028ULL }, // Inst #4707 = SUB32rr_NF |
| 37394 | { 4706, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Compare), 0x1095e0010029ULL }, // Inst #4706 = SUB32rr_ND_REV |
| 37395 | { 4705, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Compare), 0x1094e0010028ULL }, // Inst #4705 = SUB32rr_ND |
| 37396 | { 4704, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare), 0xc0015e0010029ULL }, // Inst #4704 = SUB32rr_EVEX_REV |
| 37397 | { 4703, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare), 0xc0014e0010028ULL }, // Inst #4703 = SUB32rr_EVEX |
| 37398 | { 4702, 3, 1, 0, 809, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Compare), 0x1480000128ULL }, // Inst #4702 = SUB32rr |
| 37399 | { 4701, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101095e0010019ULL }, // Inst #4701 = SUB32rm_NF_ND |
| 37400 | { 4700, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x100015e0010019ULL }, // Inst #4700 = SUB32rm_NF |
| 37401 | { 4699, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1095e0010019ULL }, // Inst #4699 = SUB32rm_ND |
| 37402 | { 4698, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0xc0015e0010019ULL }, // Inst #4698 = SUB32rm_EVEX |
| 37403 | { 4697, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580000119ULL }, // Inst #4697 = SUB32rm |
| 37404 | { 4696, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0190035ULL }, // Inst #4696 = SUB32ri_NF_ND |
| 37405 | { 4695, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0190035ULL }, // Inst #4695 = SUB32ri_NF |
| 37406 | { 4694, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0190035ULL }, // Inst #4694 = SUB32ri_ND |
| 37407 | { 4693, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0190035ULL }, // Inst #4693 = SUB32ri_EVEX |
| 37408 | { 4692, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0050035ULL }, // Inst #4692 = SUB32ri8_NF_ND |
| 37409 | { 4691, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0050035ULL }, // Inst #4691 = SUB32ri8_NF |
| 37410 | { 4690, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0050035ULL }, // Inst #4690 = SUB32ri8_ND |
| 37411 | { 4689, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0050035ULL }, // Inst #4689 = SUB32ri8_EVEX |
| 37412 | { 4688, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180040135ULL }, // Inst #4688 = SUB32ri8 |
| 37413 | { 4687, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x4080180135ULL }, // Inst #4687 = SUB32ri |
| 37414 | { 4686, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101094e0010018ULL }, // Inst #4686 = SUB32mr_NF_ND |
| 37415 | { 4685, 6, 0, 0, 928, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100014e0010018ULL }, // Inst #4685 = SUB32mr_NF |
| 37416 | { 4684, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1094e0010018ULL }, // Inst #4684 = SUB32mr_ND |
| 37417 | { 4683, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0014e0010018ULL }, // Inst #4683 = SUB32mr_EVEX |
| 37418 | { 4682, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480000118ULL }, // Inst #4682 = SUB32mr |
| 37419 | { 4681, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c0e0190025ULL }, // Inst #4681 = SUB32mi_NF_ND |
| 37420 | { 4680, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0190025ULL }, // Inst #4680 = SUB32mi_NF |
| 37421 | { 4679, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c0e0190025ULL }, // Inst #4679 = SUB32mi_ND |
| 37422 | { 4678, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190025ULL }, // Inst #4678 = SUB32mi_EVEX |
| 37423 | { 4677, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c1e0050025ULL }, // Inst #4677 = SUB32mi8_NF_ND |
| 37424 | { 4676, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050025ULL }, // Inst #4676 = SUB32mi8_NF |
| 37425 | { 4675, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c1e0050025ULL }, // Inst #4675 = SUB32mi8_ND |
| 37426 | { 4674, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050025ULL }, // Inst #4674 = SUB32mi8_EVEX |
| 37427 | { 4673, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040125ULL }, // Inst #4673 = SUB32mi8 |
| 37428 | { 4672, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180125ULL }, // Inst #4672 = SUB32mi |
| 37429 | { 4671, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 69, 1, 0|(1ULL<<MCID::Compare), 0x1680180101ULL }, // Inst #4671 = SUB32i32 |
| 37430 | { 4670, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Compare), 0x15800000a9ULL }, // Inst #4670 = SUB16rr_REV |
| 37431 | { 4669, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Compare), 0x100015e0010829ULL }, // Inst #4669 = SUB16rr_NF_REV |
| 37432 | { 4668, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Compare), 0x101095e0010829ULL }, // Inst #4668 = SUB16rr_NF_ND_REV |
| 37433 | { 4667, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Compare), 0x101094e0010828ULL }, // Inst #4667 = SUB16rr_NF_ND |
| 37434 | { 4666, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Compare), 0x100014e0010828ULL }, // Inst #4666 = SUB16rr_NF |
| 37435 | { 4665, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Compare), 0x1095e0010829ULL }, // Inst #4665 = SUB16rr_ND_REV |
| 37436 | { 4664, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Compare), 0x1094e0010828ULL }, // Inst #4664 = SUB16rr_ND |
| 37437 | { 4663, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Compare), 0xc0015e0010829ULL }, // Inst #4663 = SUB16rr_EVEX_REV |
| 37438 | { 4662, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Compare), 0xc0014e0010828ULL }, // Inst #4662 = SUB16rr_EVEX |
| 37439 | { 4661, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Compare), 0x14800000a8ULL }, // Inst #4661 = SUB16rr |
| 37440 | { 4660, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101095e0010819ULL }, // Inst #4660 = SUB16rm_NF_ND |
| 37441 | { 4659, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x100015e0010819ULL }, // Inst #4659 = SUB16rm_NF |
| 37442 | { 4658, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1095e0010819ULL }, // Inst #4658 = SUB16rm_ND |
| 37443 | { 4657, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0xc0015e0010819ULL }, // Inst #4657 = SUB16rm_EVEX |
| 37444 | { 4656, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580000099ULL }, // Inst #4656 = SUB16rm |
| 37445 | { 4655, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 340, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0110835ULL }, // Inst #4655 = SUB16ri_NF_ND |
| 37446 | { 4654, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0110835ULL }, // Inst #4654 = SUB16ri_NF |
| 37447 | { 4653, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 340, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0110835ULL }, // Inst #4653 = SUB16ri_ND |
| 37448 | { 4652, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0110835ULL }, // Inst #4652 = SUB16ri_EVEX |
| 37449 | { 4651, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 340, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0050835ULL }, // Inst #4651 = SUB16ri8_NF_ND |
| 37450 | { 4650, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0050835ULL }, // Inst #4650 = SUB16ri8_NF |
| 37451 | { 4649, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 340, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0050835ULL }, // Inst #4649 = SUB16ri8_ND |
| 37452 | { 4648, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0050835ULL }, // Inst #4648 = SUB16ri8_EVEX |
| 37453 | { 4647, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x41800400b5ULL }, // Inst #4647 = SUB16ri8 |
| 37454 | { 4646, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::ConvertibleTo3Addr), 0x40801000b5ULL }, // Inst #4646 = SUB16ri |
| 37455 | { 4645, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 333, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x101094e0010818ULL }, // Inst #4645 = SUB16mr_NF_ND |
| 37456 | { 4644, 6, 0, 0, 928, 0, 0, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100014e0010818ULL }, // Inst #4644 = SUB16mr_NF |
| 37457 | { 4643, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 333, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1094e0010818ULL }, // Inst #4643 = SUB16mr_ND |
| 37458 | { 4642, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0014e0010818ULL }, // Inst #4642 = SUB16mr_EVEX |
| 37459 | { 4641, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480000098ULL }, // Inst #4641 = SUB16mr |
| 37460 | { 4640, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c0e0110825ULL }, // Inst #4640 = SUB16mi_NF_ND |
| 37461 | { 4639, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0110825ULL }, // Inst #4639 = SUB16mi_NF |
| 37462 | { 4638, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c0e0110825ULL }, // Inst #4638 = SUB16mi_ND |
| 37463 | { 4637, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110825ULL }, // Inst #4637 = SUB16mi_EVEX |
| 37464 | { 4636, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1010c1e0050825ULL }, // Inst #4636 = SUB16mi8_NF_ND |
| 37465 | { 4635, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050825ULL }, // Inst #4635 = SUB16mi8_NF |
| 37466 | { 4634, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x10c1e0050825ULL }, // Inst #4634 = SUB16mi8_ND |
| 37467 | { 4633, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050825ULL }, // Inst #4633 = SUB16mi8_EVEX |
| 37468 | { 4632, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a5ULL }, // Inst #4632 = SUB16mi8 |
| 37469 | { 4631, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a5ULL }, // Inst #4631 = SUB16mi |
| 37470 | { 4630, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 46, 1, 0|(1ULL<<MCID::Compare), 0x1680100081ULL }, // Inst #4630 = SUB16i16 |
| 37471 | { 4629, 1, 0, 0, 1489, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000032ULL }, // Inst #4629 = ST_Frr |
| 37472 | { 4628, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4628 = ST_FpP80m64 |
| 37473 | { 4627, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4627 = ST_FpP80m32 |
| 37474 | { 4626, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4626 = ST_FpP80m |
| 37475 | { 4625, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4625 = ST_FpP64m32 |
| 37476 | { 4624, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4624 = ST_FpP64m |
| 37477 | { 4623, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4623 = ST_FpP32m |
| 37478 | { 4622, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4622 = ST_Fp80m64 |
| 37479 | { 4621, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4621 = ST_Fp80m32 |
| 37480 | { 4620, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4620 = ST_Fp64m32 |
| 37481 | { 4619, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4619 = ST_Fp64m |
| 37482 | { 4618, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #4618 = ST_Fp32m |
| 37483 | { 4617, 1, 0, 0, 643, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000033ULL }, // Inst #4617 = ST_FPrr |
| 37484 | { 4616, 5, 0, 0, 666, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000027ULL }, // Inst #4616 = ST_FP80m |
| 37485 | { 4615, 5, 0, 0, 836, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000023ULL }, // Inst #4615 = ST_FP64m |
| 37486 | { 4614, 5, 0, 0, 836, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000023ULL }, // Inst #4614 = ST_FP32m |
| 37487 | { 4613, 5, 0, 0, 642, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000022ULL }, // Inst #4613 = ST_F64m |
| 37488 | { 4612, 5, 0, 0, 642, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000022ULL }, // Inst #4612 = ST_F32m |
| 37489 | { 4611, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8000306fULL }, // Inst #4611 = STUI |
| 37490 | { 4610, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x24e0004820ULL }, // Inst #4610 = STTILECFG_EVEX |
| 37491 | { 4609, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x24a0004820ULL }, // Inst #4609 = STTILECFG |
| 37492 | { 4608, 5, 0, 0, 1560, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2021ULL }, // Inst #4608 = STRm |
| 37493 | { 4607, 1, 1, 0, 879, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x22031ULL }, // Inst #4607 = STR64r |
| 37494 | { 4606, 1, 1, 0, 879, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2131ULL }, // Inst #4606 = STR32r |
| 37495 | { 4605, 1, 1, 0, 1544, 0, 0, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20b1ULL }, // Inst #4605 = STR16r |
| 37496 | { 4604, 1, 0, 0, 766, 3, 1, X86ImpOpBase + 554, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580000085ULL }, // Inst #4604 = STOSW |
| 37497 | { 4603, 1, 0, 0, 766, 3, 1, X86ImpOpBase + 550, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580020005ULL }, // Inst #4603 = STOSQ |
| 37498 | { 4602, 1, 0, 0, 766, 3, 1, X86ImpOpBase + 546, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580000105ULL }, // Inst #4602 = STOSL |
| 37499 | { 4601, 1, 0, 0, 1624, 3, 1, X86ImpOpBase + 542, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5500000005ULL }, // Inst #4601 = STOSB |
| 37500 | { 4600, 5, 0, 0, 332, 1, 0, X86ImpOpBase + 78, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002023ULL }, // Inst #4600 = STMXCSR |
| 37501 | { 4599, 0, 0, 0, 1623, 1, 1, X86ImpOpBase + 31, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d80000001ULL }, // Inst #4599 = STI |
| 37502 | { 4598, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205cULL }, // Inst #4598 = STGI |
| 37503 | { 4597, 0, 0, 0, 699, 0, 1, X86ImpOpBase + 121, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7e80000001ULL }, // Inst #4597 = STD |
| 37504 | { 4596, 0, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c80000001ULL }, // Inst #4596 = STC |
| 37505 | { 4595, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #4595 = STACKALLOC_W_PROBING |
| 37506 | { 4594, 0, 0, 0, 1202, 0, 1, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000204bULL }, // Inst #4594 = STAC |
| 37507 | { 4593, 0, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1b0000000aULL }, // Inst #4593 = SS_PREFIX |
| 37508 | { 4592, 2, 1, 0, 331, 1, 1, X86ImpOpBase + 79, 312, 0|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4592 = SQRT_Fp80 |
| 37509 | { 4591, 2, 1, 0, 331, 1, 1, X86ImpOpBase + 79, 310, 0|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4591 = SQRT_Fp64 |
| 37510 | { 4590, 2, 1, 0, 331, 1, 1, X86ImpOpBase + 79, 308, 0|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #4590 = SQRT_Fp32 |
| 37511 | { 4589, 0, 0, 0, 331, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007aULL }, // Inst #4589 = SQRT_F |
| 37512 | { 4588, 3, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2888003029ULL }, // Inst #4588 = SQRTSSr_Int |
| 37513 | { 4587, 2, 1, 0, 330, 1, 0, X86ImpOpBase + 78, 986, 0|(1ULL<<MCID::MayRaiseFPException), 0x2888003029ULL }, // Inst #4587 = SQRTSSr |
| 37514 | { 4586, 7, 1, 0, 329, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2888003019ULL }, // Inst #4586 = SQRTSSm_Int |
| 37515 | { 4585, 6, 1, 0, 328, 1, 0, X86ImpOpBase + 78, 980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2888003019ULL }, // Inst #4585 = SQRTSSm |
| 37516 | { 4584, 3, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2890003829ULL }, // Inst #4584 = SQRTSDr_Int |
| 37517 | { 4583, 2, 1, 0, 327, 1, 0, X86ImpOpBase + 78, 978, 0|(1ULL<<MCID::MayRaiseFPException), 0x2890003829ULL }, // Inst #4583 = SQRTSDr |
| 37518 | { 4582, 7, 1, 0, 1622, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2890003819ULL }, // Inst #4582 = SQRTSDm_Int |
| 37519 | { 4581, 6, 1, 0, 325, 1, 0, X86ImpOpBase + 78, 972, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2890003819ULL }, // Inst #4581 = SQRTSDm |
| 37520 | { 4580, 2, 1, 0, 324, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2888002029ULL }, // Inst #4580 = SQRTPSr |
| 37521 | { 4579, 6, 1, 0, 323, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2888002019ULL }, // Inst #4579 = SQRTPSm |
| 37522 | { 4578, 2, 1, 0, 322, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2890002829ULL }, // Inst #4578 = SQRTPDr |
| 37523 | { 4577, 6, 1, 0, 321, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2890002819ULL }, // Inst #4577 = SQRTPDm |
| 37524 | { 4576, 1, 1, 0, 1621, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80022034ULL }, // Inst #4576 = SMSW64r |
| 37525 | { 4575, 1, 1, 0, 1621, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002134ULL }, // Inst #4575 = SMSW32r |
| 37526 | { 4574, 1, 1, 0, 1620, 0, 0, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800020b4ULL }, // Inst #4574 = SMSW16r |
| 37527 | { 4573, 5, 0, 0, 1497, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002024ULL }, // Inst #4573 = SMSW16m |
| 37528 | { 4572, 1, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x94002a031ULL }, // Inst #4572 = SLWPCB64 |
| 37529 | { 4571, 1, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x94000a031ULL }, // Inst #4571 = SLWPCB |
| 37530 | { 4570, 1, 1, 0, 785, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x22030ULL }, // Inst #4570 = SLDT64r |
| 37531 | { 4569, 1, 1, 0, 785, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2130ULL }, // Inst #4569 = SLDT32r |
| 37532 | { 4568, 1, 1, 0, 1543, 0, 0, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20b0ULL }, // Inst #4568 = SLDT16r |
| 37533 | { 4567, 5, 0, 0, 1559, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2020ULL }, // Inst #4567 = SLDT16m |
| 37534 | { 4566, 0, 0, 0, 8, 1, 0, X86ImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205eULL }, // Inst #4566 = SKINIT |
| 37535 | { 4565, 5, 0, 0, 845, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002021ULL }, // Inst #4565 = SIDT64m |
| 37536 | { 4564, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002121ULL }, // Inst #4564 = SIDT32m |
| 37537 | { 4563, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800020a1ULL }, // Inst #4563 = SIDT16m |
| 37538 | { 4562, 4, 1, 0, 1476, 0, 0, X86ImpOpBase + 0, 563, 0, 0x6308042029ULL }, // Inst #4562 = SHUFPSrri |
| 37539 | { 4561, 8, 1, 0, 1566, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x6308042019ULL }, // Inst #4561 = SHUFPSrmi |
| 37540 | { 4560, 4, 1, 0, 1476, 0, 0, X86ImpOpBase + 0, 563, 0|(1ULL<<MCID::Commutable), 0x6310042829ULL }, // Inst #4560 = SHUFPDrri |
| 37541 | { 4559, 8, 1, 0, 1566, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x6310042819ULL }, // Inst #4559 = SHUFPDrmi |
| 37542 | { 4558, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 422, 0, 0x7be002582aULL }, // Inst #4558 = SHRX64rr_EVEX |
| 37543 | { 4557, 3, 1, 0, 1617, 0, 0, X86ImpOpBase + 0, 422, 0, 0x7ba002582aULL }, // Inst #4557 = SHRX64rr |
| 37544 | { 4556, 7, 1, 0, 315, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x7be002581aULL }, // Inst #4556 = SHRX64rm_EVEX |
| 37545 | { 4555, 7, 1, 0, 1616, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x7ba002581aULL }, // Inst #4555 = SHRX64rm |
| 37546 | { 4554, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 225, 0, 0x7be000582aULL }, // Inst #4554 = SHRX32rr_EVEX |
| 37547 | { 4553, 3, 1, 0, 1617, 0, 0, X86ImpOpBase + 0, 225, 0, 0x7ba000582aULL }, // Inst #4553 = SHRX32rr |
| 37548 | { 4552, 7, 1, 0, 315, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x7be000581aULL }, // Inst #4552 = SHRX32rm_EVEX |
| 37549 | { 4551, 7, 1, 0, 1616, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x7ba000581aULL }, // Inst #4551 = SHRX32rm |
| 37550 | { 4550, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 1499, 0|(1ULL<<MCID::Commutable), 0x10109660070028ULL }, // Inst #4550 = SHRD64rri8_NF_ND |
| 37551 | { 4549, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 1495, 0|(1ULL<<MCID::Commutable), 0x10001660070028ULL }, // Inst #4549 = SHRD64rri8_NF |
| 37552 | { 4548, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 1499, 0|(1ULL<<MCID::Commutable), 0x109660070028ULL }, // Inst #4548 = SHRD64rri8_ND |
| 37553 | { 4547, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 1495, 0|(1ULL<<MCID::Commutable), 0xc001660070028ULL }, // Inst #4547 = SHRD64rri8_EVEX |
| 37554 | { 4546, 4, 1, 0, 686, 0, 1, X86ImpOpBase + 0, 1495, 0|(1ULL<<MCID::Commutable), 0x5600062028ULL }, // Inst #4546 = SHRD64rri8 |
| 37555 | { 4545, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 422, 0, 0x1010d6e0030028ULL }, // Inst #4545 = SHRD64rrCL_NF_ND |
| 37556 | { 4544, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 167, 0, 0x100056e0030028ULL }, // Inst #4544 = SHRD64rrCL_NF |
| 37557 | { 4543, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 422, 0, 0x10d6e0030028ULL }, // Inst #4543 = SHRD64rrCL_ND |
| 37558 | { 4542, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 167, 0, 0xc0056e0030028ULL }, // Inst #4542 = SHRD64rrCL_EVEX |
| 37559 | { 4541, 3, 1, 0, 680, 1, 1, X86ImpOpBase + 515, 167, 0, 0x5680022028ULL }, // Inst #4541 = SHRD64rrCL |
| 37560 | { 4540, 8, 1, 0, 941, 0, 0, X86ImpOpBase + 0, 1487, 0|(1ULL<<MCID::MayLoad), 0x10109660070018ULL }, // Inst #4540 = SHRD64mri8_NF_ND |
| 37561 | { 4539, 7, 0, 0, 941, 0, 0, X86ImpOpBase + 0, 1480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001660070018ULL }, // Inst #4539 = SHRD64mri8_NF |
| 37562 | { 4538, 8, 1, 0, 941, 0, 1, X86ImpOpBase + 0, 1487, 0|(1ULL<<MCID::MayLoad), 0x109660070018ULL }, // Inst #4538 = SHRD64mri8_ND |
| 37563 | { 4537, 7, 0, 0, 941, 0, 1, X86ImpOpBase + 0, 1480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001660070018ULL }, // Inst #4537 = SHRD64mri8_EVEX |
| 37564 | { 4536, 7, 0, 0, 685, 0, 1, X86ImpOpBase + 0, 1480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600062018ULL }, // Inst #4536 = SHRD64mri8 |
| 37565 | { 4535, 7, 1, 0, 943, 1, 0, X86ImpOpBase + 517, 398, 0|(1ULL<<MCID::MayLoad), 0x1010d6e0030018ULL }, // Inst #4535 = SHRD64mrCL_NF_ND |
| 37566 | { 4534, 6, 0, 0, 943, 1, 0, X86ImpOpBase + 517, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100056e0030018ULL }, // Inst #4534 = SHRD64mrCL_NF |
| 37567 | { 4533, 7, 1, 0, 943, 1, 1, X86ImpOpBase + 515, 398, 0|(1ULL<<MCID::MayLoad), 0x10d6e0030018ULL }, // Inst #4533 = SHRD64mrCL_ND |
| 37568 | { 4532, 6, 0, 0, 943, 1, 1, X86ImpOpBase + 515, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0056e0030018ULL }, // Inst #4532 = SHRD64mrCL_EVEX |
| 37569 | { 4531, 6, 0, 0, 684, 1, 1, X86ImpOpBase + 515, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680022018ULL }, // Inst #4531 = SHRD64mrCL |
| 37570 | { 4530, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 845, 0|(1ULL<<MCID::Commutable), 0x10109660050028ULL }, // Inst #4530 = SHRD32rri8_NF_ND |
| 37571 | { 4529, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 1476, 0|(1ULL<<MCID::Commutable), 0x10001660050028ULL }, // Inst #4529 = SHRD32rri8_NF |
| 37572 | { 4528, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 845, 0|(1ULL<<MCID::Commutable), 0x109660050028ULL }, // Inst #4528 = SHRD32rri8_ND |
| 37573 | { 4527, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 1476, 0|(1ULL<<MCID::Commutable), 0xc001660050028ULL }, // Inst #4527 = SHRD32rri8_EVEX |
| 37574 | { 4526, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 1476, 0|(1ULL<<MCID::Commutable), 0x5600042128ULL }, // Inst #4526 = SHRD32rri8 |
| 37575 | { 4525, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 225, 0, 0x1010d6e0010028ULL }, // Inst #4525 = SHRD32rrCL_NF_ND |
| 37576 | { 4524, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 161, 0, 0x100056e0010028ULL }, // Inst #4524 = SHRD32rrCL_NF |
| 37577 | { 4523, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 225, 0, 0x10d6e0010028ULL }, // Inst #4523 = SHRD32rrCL_ND |
| 37578 | { 4522, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 161, 0, 0xc0056e0010028ULL }, // Inst #4522 = SHRD32rrCL_EVEX |
| 37579 | { 4521, 3, 1, 0, 1169, 1, 1, X86ImpOpBase + 515, 161, 0, 0x5680002128ULL }, // Inst #4521 = SHRD32rrCL |
| 37580 | { 4520, 8, 1, 0, 941, 0, 0, X86ImpOpBase + 0, 1468, 0|(1ULL<<MCID::MayLoad), 0x10109660050018ULL }, // Inst #4520 = SHRD32mri8_NF_ND |
| 37581 | { 4519, 7, 0, 0, 941, 0, 0, X86ImpOpBase + 0, 1461, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001660050018ULL }, // Inst #4519 = SHRD32mri8_NF |
| 37582 | { 4518, 8, 1, 0, 941, 0, 1, X86ImpOpBase + 0, 1468, 0|(1ULL<<MCID::MayLoad), 0x109660050018ULL }, // Inst #4518 = SHRD32mri8_ND |
| 37583 | { 4517, 7, 0, 0, 941, 0, 1, X86ImpOpBase + 0, 1461, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001660050018ULL }, // Inst #4517 = SHRD32mri8_EVEX |
| 37584 | { 4516, 7, 0, 0, 941, 0, 1, X86ImpOpBase + 0, 1461, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600042118ULL }, // Inst #4516 = SHRD32mri8 |
| 37585 | { 4515, 7, 1, 0, 943, 1, 0, X86ImpOpBase + 517, 367, 0|(1ULL<<MCID::MayLoad), 0x1010d6e0010018ULL }, // Inst #4515 = SHRD32mrCL_NF_ND |
| 37586 | { 4514, 6, 0, 0, 943, 1, 0, X86ImpOpBase + 517, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100056e0010018ULL }, // Inst #4514 = SHRD32mrCL_NF |
| 37587 | { 4513, 7, 1, 0, 943, 1, 1, X86ImpOpBase + 515, 367, 0|(1ULL<<MCID::MayLoad), 0x10d6e0010018ULL }, // Inst #4513 = SHRD32mrCL_ND |
| 37588 | { 4512, 6, 0, 0, 943, 1, 1, X86ImpOpBase + 515, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0056e0010018ULL }, // Inst #4512 = SHRD32mrCL_EVEX |
| 37589 | { 4511, 6, 0, 0, 943, 1, 1, X86ImpOpBase + 515, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680002118ULL }, // Inst #4511 = SHRD32mrCL |
| 37590 | { 4510, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 841, 0|(1ULL<<MCID::Commutable), 0x10109660050828ULL }, // Inst #4510 = SHRD16rri8_NF_ND |
| 37591 | { 4509, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 1457, 0|(1ULL<<MCID::Commutable), 0x10001660050828ULL }, // Inst #4509 = SHRD16rri8_NF |
| 37592 | { 4508, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 841, 0|(1ULL<<MCID::Commutable), 0x109660050828ULL }, // Inst #4508 = SHRD16rri8_ND |
| 37593 | { 4507, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 1457, 0|(1ULL<<MCID::Commutable), 0xc001660050828ULL }, // Inst #4507 = SHRD16rri8_EVEX |
| 37594 | { 4506, 4, 1, 0, 672, 0, 1, X86ImpOpBase + 0, 1457, 0|(1ULL<<MCID::Commutable), 0x56000420a8ULL }, // Inst #4506 = SHRD16rri8 |
| 37595 | { 4505, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 357, 0, 0x1010d6e0010828ULL }, // Inst #4505 = SHRD16rrCL_NF_ND |
| 37596 | { 4504, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 155, 0, 0x100056e0010828ULL }, // Inst #4504 = SHRD16rrCL_NF |
| 37597 | { 4503, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 357, 0, 0x10d6e0010828ULL }, // Inst #4503 = SHRD16rrCL_ND |
| 37598 | { 4502, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 155, 0, 0xc0056e0010828ULL }, // Inst #4502 = SHRD16rrCL_EVEX |
| 37599 | { 4501, 3, 1, 0, 671, 1, 1, X86ImpOpBase + 515, 155, 0, 0x56800020a8ULL }, // Inst #4501 = SHRD16rrCL |
| 37600 | { 4500, 8, 1, 0, 941, 0, 0, X86ImpOpBase + 0, 1449, 0|(1ULL<<MCID::MayLoad), 0x10109660050818ULL }, // Inst #4500 = SHRD16mri8_NF_ND |
| 37601 | { 4499, 7, 0, 0, 941, 0, 0, X86ImpOpBase + 0, 1442, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001660050818ULL }, // Inst #4499 = SHRD16mri8_NF |
| 37602 | { 4498, 8, 1, 0, 941, 0, 1, X86ImpOpBase + 0, 1449, 0|(1ULL<<MCID::MayLoad), 0x109660050818ULL }, // Inst #4498 = SHRD16mri8_ND |
| 37603 | { 4497, 7, 0, 0, 941, 0, 1, X86ImpOpBase + 0, 1442, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001660050818ULL }, // Inst #4497 = SHRD16mri8_EVEX |
| 37604 | { 4496, 7, 0, 0, 1619, 0, 1, X86ImpOpBase + 0, 1442, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600042098ULL }, // Inst #4496 = SHRD16mri8 |
| 37605 | { 4495, 7, 1, 0, 943, 1, 0, X86ImpOpBase + 517, 333, 0|(1ULL<<MCID::MayLoad), 0x1010d6e0010818ULL }, // Inst #4495 = SHRD16mrCL_NF_ND |
| 37606 | { 4494, 6, 0, 0, 943, 1, 0, X86ImpOpBase + 517, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100056e0010818ULL }, // Inst #4494 = SHRD16mrCL_NF |
| 37607 | { 4493, 7, 1, 0, 943, 1, 1, X86ImpOpBase + 515, 333, 0|(1ULL<<MCID::MayLoad), 0x10d6e0010818ULL }, // Inst #4493 = SHRD16mrCL_ND |
| 37608 | { 4492, 6, 0, 0, 943, 1, 1, X86ImpOpBase + 515, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0056e0010818ULL }, // Inst #4492 = SHRD16mrCL_EVEX |
| 37609 | { 4491, 6, 0, 0, 673, 1, 1, X86ImpOpBase + 515, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680002098ULL }, // Inst #4491 = SHRD16mrCL |
| 37610 | { 4490, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 445, 0, 0x1010e060050035ULL }, // Inst #4490 = SHR8ri_NF_ND |
| 37611 | { 4489, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 170, 0, 0x10006060050035ULL }, // Inst #4489 = SHR8ri_NF |
| 37612 | { 4488, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 445, 0, 0x10e060050035ULL }, // Inst #4488 = SHR8ri_ND |
| 37613 | { 4487, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 170, 0, 0xc006060050035ULL }, // Inst #4487 = SHR8ri_EVEX |
| 37614 | { 4486, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 170, 0, 0x6000040035ULL }, // Inst #4486 = SHR8ri |
| 37615 | { 4485, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 925, 0, 0x1010e960010035ULL }, // Inst #4485 = SHR8rCL_NF_ND |
| 37616 | { 4484, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 1027, 0, 0x10006960010035ULL }, // Inst #4484 = SHR8rCL_NF |
| 37617 | { 4483, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 925, 0, 0x10e960010035ULL }, // Inst #4483 = SHR8rCL_ND |
| 37618 | { 4482, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 1027, 0, 0xc006960010035ULL }, // Inst #4482 = SHR8rCL_EVEX |
| 37619 | { 4481, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 1027, 0, 0x6900000035ULL }, // Inst #4481 = SHR8rCL |
| 37620 | { 4480, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 925, 0, 0x1010e860010035ULL }, // Inst #4480 = SHR8r1_NF_ND |
| 37621 | { 4479, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 1027, 0, 0x10006860010035ULL }, // Inst #4479 = SHR8r1_NF |
| 37622 | { 4478, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 925, 0, 0x10e860010035ULL }, // Inst #4478 = SHR8r1_ND |
| 37623 | { 4477, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 1027, 0, 0xc006860010035ULL }, // Inst #4477 = SHR8r1_EVEX |
| 37624 | { 4476, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 1027, 0, 0x6800000035ULL }, // Inst #4476 = SHR8r1 |
| 37625 | { 4475, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x1010e060050025ULL }, // Inst #4475 = SHR8mi_NF_ND |
| 37626 | { 4474, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006060050025ULL }, // Inst #4474 = SHR8mi_NF |
| 37627 | { 4473, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x10e060050025ULL }, // Inst #4473 = SHR8mi_ND |
| 37628 | { 4472, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050025ULL }, // Inst #4472 = SHR8mi_EVEX |
| 37629 | { 4471, 6, 0, 0, 1615, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040025ULL }, // Inst #4471 = SHR8mi |
| 37630 | { 4470, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 919, 0|(1ULL<<MCID::MayLoad), 0x1010e960010025ULL }, // Inst #4470 = SHR8mCL_NF_ND |
| 37631 | { 4469, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006960010025ULL }, // Inst #4469 = SHR8mCL_NF |
| 37632 | { 4468, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 919, 0|(1ULL<<MCID::MayLoad), 0x10e960010025ULL }, // Inst #4468 = SHR8mCL_ND |
| 37633 | { 4467, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010025ULL }, // Inst #4467 = SHR8mCL_EVEX |
| 37634 | { 4466, 5, 0, 0, 1614, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000025ULL }, // Inst #4466 = SHR8mCL |
| 37635 | { 4465, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x1010e860010025ULL }, // Inst #4465 = SHR8m1_NF_ND |
| 37636 | { 4464, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006860010025ULL }, // Inst #4464 = SHR8m1_NF |
| 37637 | { 4463, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x10e860010025ULL }, // Inst #4463 = SHR8m1_ND |
| 37638 | { 4462, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010025ULL }, // Inst #4462 = SHR8m1_EVEX |
| 37639 | { 4461, 5, 0, 0, 1615, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000025ULL }, // Inst #4461 = SHR8m1 |
| 37640 | { 4460, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 405, 0, 0x1010e0e0070035ULL }, // Inst #4460 = SHR64ri_NF_ND |
| 37641 | { 4459, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 164, 0, 0x100060e0070035ULL }, // Inst #4459 = SHR64ri_NF |
| 37642 | { 4458, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 405, 0, 0x10e0e0070035ULL }, // Inst #4458 = SHR64ri_ND |
| 37643 | { 4457, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 164, 0, 0xc0060e0070035ULL }, // Inst #4457 = SHR64ri_EVEX |
| 37644 | { 4456, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 164, 0, 0x6080060035ULL }, // Inst #4456 = SHR64ri |
| 37645 | { 4455, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 553, 0, 0x1010e9e0030035ULL }, // Inst #4455 = SHR64rCL_NF_ND |
| 37646 | { 4454, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 300, 0, 0x100069e0030035ULL }, // Inst #4454 = SHR64rCL_NF |
| 37647 | { 4453, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 553, 0, 0x10e9e0030035ULL }, // Inst #4453 = SHR64rCL_ND |
| 37648 | { 4452, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 300, 0, 0xc0069e0030035ULL }, // Inst #4452 = SHR64rCL_EVEX |
| 37649 | { 4451, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 300, 0, 0x6980020035ULL }, // Inst #4451 = SHR64rCL |
| 37650 | { 4450, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 553, 0, 0x1010e8e0030035ULL }, // Inst #4450 = SHR64r1_NF_ND |
| 37651 | { 4449, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 300, 0, 0x100068e0030035ULL }, // Inst #4449 = SHR64r1_NF |
| 37652 | { 4448, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 553, 0, 0x10e8e0030035ULL }, // Inst #4448 = SHR64r1_ND |
| 37653 | { 4447, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 300, 0, 0xc0068e0030035ULL }, // Inst #4447 = SHR64r1_EVEX |
| 37654 | { 4446, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 300, 0, 0x6880020035ULL }, // Inst #4446 = SHR64r1 |
| 37655 | { 4445, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0070025ULL }, // Inst #4445 = SHR64mi_NF_ND |
| 37656 | { 4444, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0070025ULL }, // Inst #4444 = SHR64mi_NF |
| 37657 | { 4443, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070025ULL }, // Inst #4443 = SHR64mi_ND |
| 37658 | { 4442, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070025ULL }, // Inst #4442 = SHR64mi_EVEX |
| 37659 | { 4441, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060025ULL }, // Inst #4441 = SHR64mi |
| 37660 | { 4440, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 242, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0030025ULL }, // Inst #4440 = SHR64mCL_NF_ND |
| 37661 | { 4439, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0030025ULL }, // Inst #4439 = SHR64mCL_NF |
| 37662 | { 4438, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 242, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030025ULL }, // Inst #4438 = SHR64mCL_ND |
| 37663 | { 4437, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030025ULL }, // Inst #4437 = SHR64mCL_EVEX |
| 37664 | { 4436, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020025ULL }, // Inst #4436 = SHR64mCL |
| 37665 | { 4435, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0030025ULL }, // Inst #4435 = SHR64m1_NF_ND |
| 37666 | { 4434, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0030025ULL }, // Inst #4434 = SHR64m1_NF |
| 37667 | { 4433, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030025ULL }, // Inst #4433 = SHR64m1_ND |
| 37668 | { 4432, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030025ULL }, // Inst #4432 = SHR64m1_EVEX |
| 37669 | { 4431, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020025ULL }, // Inst #4431 = SHR64m1 |
| 37670 | { 4430, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 374, 0, 0x1010e0e0050035ULL }, // Inst #4430 = SHR32ri_NF_ND |
| 37671 | { 4429, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 158, 0, 0x100060e0050035ULL }, // Inst #4429 = SHR32ri_NF |
| 37672 | { 4428, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 374, 0, 0x10e0e0050035ULL }, // Inst #4428 = SHR32ri_ND |
| 37673 | { 4427, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 158, 0, 0xc0060e0050035ULL }, // Inst #4427 = SHR32ri_EVEX |
| 37674 | { 4426, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 158, 0, 0x6080040135ULL }, // Inst #4426 = SHR32ri |
| 37675 | { 4425, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 551, 0, 0x1010e9e0010035ULL }, // Inst #4425 = SHR32rCL_NF_ND |
| 37676 | { 4424, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 298, 0, 0x100069e0010035ULL }, // Inst #4424 = SHR32rCL_NF |
| 37677 | { 4423, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 551, 0, 0x10e9e0010035ULL }, // Inst #4423 = SHR32rCL_ND |
| 37678 | { 4422, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 298, 0, 0xc0069e0010035ULL }, // Inst #4422 = SHR32rCL_EVEX |
| 37679 | { 4421, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 298, 0, 0x6980000135ULL }, // Inst #4421 = SHR32rCL |
| 37680 | { 4420, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 551, 0, 0x1010e8e0010035ULL }, // Inst #4420 = SHR32r1_NF_ND |
| 37681 | { 4419, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 298, 0, 0x100068e0010035ULL }, // Inst #4419 = SHR32r1_NF |
| 37682 | { 4418, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 551, 0, 0x10e8e0010035ULL }, // Inst #4418 = SHR32r1_ND |
| 37683 | { 4417, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 298, 0, 0xc0068e0010035ULL }, // Inst #4417 = SHR32r1_EVEX |
| 37684 | { 4416, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 298, 0, 0x6880000135ULL }, // Inst #4416 = SHR32r1 |
| 37685 | { 4415, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050025ULL }, // Inst #4415 = SHR32mi_NF_ND |
| 37686 | { 4414, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050025ULL }, // Inst #4414 = SHR32mi_NF |
| 37687 | { 4413, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050025ULL }, // Inst #4413 = SHR32mi_ND |
| 37688 | { 4412, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050025ULL }, // Inst #4412 = SHR32mi_EVEX |
| 37689 | { 4411, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040125ULL }, // Inst #4411 = SHR32mi |
| 37690 | { 4410, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 236, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010025ULL }, // Inst #4410 = SHR32mCL_NF_ND |
| 37691 | { 4409, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010025ULL }, // Inst #4409 = SHR32mCL_NF |
| 37692 | { 4408, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 236, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010025ULL }, // Inst #4408 = SHR32mCL_ND |
| 37693 | { 4407, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010025ULL }, // Inst #4407 = SHR32mCL_EVEX |
| 37694 | { 4406, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000125ULL }, // Inst #4406 = SHR32mCL |
| 37695 | { 4405, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010025ULL }, // Inst #4405 = SHR32m1_NF_ND |
| 37696 | { 4404, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010025ULL }, // Inst #4404 = SHR32m1_NF |
| 37697 | { 4403, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010025ULL }, // Inst #4403 = SHR32m1_ND |
| 37698 | { 4402, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010025ULL }, // Inst #4402 = SHR32m1_EVEX |
| 37699 | { 4401, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000125ULL }, // Inst #4401 = SHR32m1 |
| 37700 | { 4400, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 340, 0, 0x1010e0e0050835ULL }, // Inst #4400 = SHR16ri_NF_ND |
| 37701 | { 4399, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 152, 0, 0x100060e0050835ULL }, // Inst #4399 = SHR16ri_NF |
| 37702 | { 4398, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 340, 0, 0x10e0e0050835ULL }, // Inst #4398 = SHR16ri_ND |
| 37703 | { 4397, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 152, 0, 0xc0060e0050835ULL }, // Inst #4397 = SHR16ri_EVEX |
| 37704 | { 4396, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 152, 0, 0x60800400b5ULL }, // Inst #4396 = SHR16ri |
| 37705 | { 4395, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 547, 0, 0x1010e9e0010835ULL }, // Inst #4395 = SHR16rCL_NF_ND |
| 37706 | { 4394, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 573, 0, 0x100069e0010835ULL }, // Inst #4394 = SHR16rCL_NF |
| 37707 | { 4393, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 547, 0, 0x10e9e0010835ULL }, // Inst #4393 = SHR16rCL_ND |
| 37708 | { 4392, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 573, 0, 0xc0069e0010835ULL }, // Inst #4392 = SHR16rCL_EVEX |
| 37709 | { 4391, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 573, 0, 0x69800000b5ULL }, // Inst #4391 = SHR16rCL |
| 37710 | { 4390, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 547, 0, 0x1010e8e0010835ULL }, // Inst #4390 = SHR16r1_NF_ND |
| 37711 | { 4389, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 573, 0, 0x100068e0010835ULL }, // Inst #4389 = SHR16r1_NF |
| 37712 | { 4388, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 547, 0, 0x10e8e0010835ULL }, // Inst #4388 = SHR16r1_ND |
| 37713 | { 4387, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 573, 0, 0xc0068e0010835ULL }, // Inst #4387 = SHR16r1_EVEX |
| 37714 | { 4386, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 573, 0, 0x68800000b5ULL }, // Inst #4386 = SHR16r1 |
| 37715 | { 4385, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050825ULL }, // Inst #4385 = SHR16mi_NF_ND |
| 37716 | { 4384, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050825ULL }, // Inst #4384 = SHR16mi_NF |
| 37717 | { 4383, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050825ULL }, // Inst #4383 = SHR16mi_ND |
| 37718 | { 4382, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050825ULL }, // Inst #4382 = SHR16mi_EVEX |
| 37719 | { 4381, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a5ULL }, // Inst #4381 = SHR16mi |
| 37720 | { 4380, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 567, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010825ULL }, // Inst #4380 = SHR16mCL_NF_ND |
| 37721 | { 4379, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010825ULL }, // Inst #4379 = SHR16mCL_NF |
| 37722 | { 4378, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 567, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010825ULL }, // Inst #4378 = SHR16mCL_ND |
| 37723 | { 4377, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010825ULL }, // Inst #4377 = SHR16mCL_EVEX |
| 37724 | { 4376, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a5ULL }, // Inst #4376 = SHR16mCL |
| 37725 | { 4375, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010825ULL }, // Inst #4375 = SHR16m1_NF_ND |
| 37726 | { 4374, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010825ULL }, // Inst #4374 = SHR16m1_NF |
| 37727 | { 4373, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010825ULL }, // Inst #4373 = SHR16m1_ND |
| 37728 | { 4372, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010825ULL }, // Inst #4372 = SHR16m1_EVEX |
| 37729 | { 4371, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a5ULL }, // Inst #4371 = SHR16m1 |
| 37730 | { 4370, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 422, 0, 0x7be002482aULL }, // Inst #4370 = SHLX64rr_EVEX |
| 37731 | { 4369, 3, 1, 0, 1617, 0, 0, X86ImpOpBase + 0, 422, 0, 0x7ba002482aULL }, // Inst #4369 = SHLX64rr |
| 37732 | { 4368, 7, 1, 0, 315, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x7be002481aULL }, // Inst #4368 = SHLX64rm_EVEX |
| 37733 | { 4367, 7, 1, 0, 1616, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x7ba002481aULL }, // Inst #4367 = SHLX64rm |
| 37734 | { 4366, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 225, 0, 0x7be000482aULL }, // Inst #4366 = SHLX32rr_EVEX |
| 37735 | { 4365, 3, 1, 0, 1617, 0, 0, X86ImpOpBase + 0, 225, 0, 0x7ba000482aULL }, // Inst #4365 = SHLX32rr |
| 37736 | { 4364, 7, 1, 0, 315, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x7be000481aULL }, // Inst #4364 = SHLX32rm_EVEX |
| 37737 | { 4363, 7, 1, 0, 1616, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x7ba000481aULL }, // Inst #4363 = SHLX32rm |
| 37738 | { 4362, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 1499, 0|(1ULL<<MCID::Commutable), 0x10109260070028ULL }, // Inst #4362 = SHLD64rri8_NF_ND |
| 37739 | { 4361, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 1495, 0|(1ULL<<MCID::Commutable), 0x10001260070028ULL }, // Inst #4361 = SHLD64rri8_NF |
| 37740 | { 4360, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 1499, 0|(1ULL<<MCID::Commutable), 0x109260070028ULL }, // Inst #4360 = SHLD64rri8_ND |
| 37741 | { 4359, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 1495, 0|(1ULL<<MCID::Commutable), 0xc001260070028ULL }, // Inst #4359 = SHLD64rri8_EVEX |
| 37742 | { 4358, 4, 1, 0, 686, 0, 1, X86ImpOpBase + 0, 1495, 0|(1ULL<<MCID::Commutable), 0x5200062028ULL }, // Inst #4358 = SHLD64rri8 |
| 37743 | { 4357, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 422, 0, 0x1010d2e0030028ULL }, // Inst #4357 = SHLD64rrCL_NF_ND |
| 37744 | { 4356, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 167, 0, 0x100052e0030028ULL }, // Inst #4356 = SHLD64rrCL_NF |
| 37745 | { 4355, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 422, 0, 0x10d2e0030028ULL }, // Inst #4355 = SHLD64rrCL_ND |
| 37746 | { 4354, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 167, 0, 0xc0052e0030028ULL }, // Inst #4354 = SHLD64rrCL_EVEX |
| 37747 | { 4353, 3, 1, 0, 680, 1, 1, X86ImpOpBase + 515, 167, 0, 0x5280022028ULL }, // Inst #4353 = SHLD64rrCL |
| 37748 | { 4352, 8, 1, 0, 941, 0, 0, X86ImpOpBase + 0, 1487, 0|(1ULL<<MCID::MayLoad), 0x10109260070018ULL }, // Inst #4352 = SHLD64mri8_NF_ND |
| 37749 | { 4351, 7, 0, 0, 941, 0, 0, X86ImpOpBase + 0, 1480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001260070018ULL }, // Inst #4351 = SHLD64mri8_NF |
| 37750 | { 4350, 8, 1, 0, 941, 0, 1, X86ImpOpBase + 0, 1487, 0|(1ULL<<MCID::MayLoad), 0x109260070018ULL }, // Inst #4350 = SHLD64mri8_ND |
| 37751 | { 4349, 7, 0, 0, 941, 0, 1, X86ImpOpBase + 0, 1480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001260070018ULL }, // Inst #4349 = SHLD64mri8_EVEX |
| 37752 | { 4348, 7, 0, 0, 685, 0, 1, X86ImpOpBase + 0, 1480, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200062018ULL }, // Inst #4348 = SHLD64mri8 |
| 37753 | { 4347, 7, 1, 0, 943, 1, 0, X86ImpOpBase + 517, 398, 0|(1ULL<<MCID::MayLoad), 0x1010d2e0030018ULL }, // Inst #4347 = SHLD64mrCL_NF_ND |
| 37754 | { 4346, 6, 0, 0, 943, 1, 0, X86ImpOpBase + 517, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100052e0030018ULL }, // Inst #4346 = SHLD64mrCL_NF |
| 37755 | { 4345, 7, 1, 0, 943, 1, 1, X86ImpOpBase + 515, 398, 0|(1ULL<<MCID::MayLoad), 0x10d2e0030018ULL }, // Inst #4345 = SHLD64mrCL_ND |
| 37756 | { 4344, 6, 0, 0, 943, 1, 1, X86ImpOpBase + 515, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0052e0030018ULL }, // Inst #4344 = SHLD64mrCL_EVEX |
| 37757 | { 4343, 6, 0, 0, 684, 1, 1, X86ImpOpBase + 515, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280022018ULL }, // Inst #4343 = SHLD64mrCL |
| 37758 | { 4342, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 845, 0|(1ULL<<MCID::Commutable), 0x10109260050028ULL }, // Inst #4342 = SHLD32rri8_NF_ND |
| 37759 | { 4341, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 1476, 0|(1ULL<<MCID::Commutable), 0x10001260050028ULL }, // Inst #4341 = SHLD32rri8_NF |
| 37760 | { 4340, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 845, 0|(1ULL<<MCID::Commutable), 0x109260050028ULL }, // Inst #4340 = SHLD32rri8_ND |
| 37761 | { 4339, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 1476, 0|(1ULL<<MCID::Commutable), 0xc001260050028ULL }, // Inst #4339 = SHLD32rri8_EVEX |
| 37762 | { 4338, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 1476, 0|(1ULL<<MCID::Commutable), 0x5200042128ULL }, // Inst #4338 = SHLD32rri8 |
| 37763 | { 4337, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 225, 0, 0x1010d2e0010028ULL }, // Inst #4337 = SHLD32rrCL_NF_ND |
| 37764 | { 4336, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 161, 0, 0x100052e0010028ULL }, // Inst #4336 = SHLD32rrCL_NF |
| 37765 | { 4335, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 225, 0, 0x10d2e0010028ULL }, // Inst #4335 = SHLD32rrCL_ND |
| 37766 | { 4334, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 161, 0, 0xc0052e0010028ULL }, // Inst #4334 = SHLD32rrCL_EVEX |
| 37767 | { 4333, 3, 1, 0, 1169, 1, 1, X86ImpOpBase + 515, 161, 0, 0x5280002128ULL }, // Inst #4333 = SHLD32rrCL |
| 37768 | { 4332, 8, 1, 0, 941, 0, 0, X86ImpOpBase + 0, 1468, 0|(1ULL<<MCID::MayLoad), 0x10109260050018ULL }, // Inst #4332 = SHLD32mri8_NF_ND |
| 37769 | { 4331, 7, 0, 0, 941, 0, 0, X86ImpOpBase + 0, 1461, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001260050018ULL }, // Inst #4331 = SHLD32mri8_NF |
| 37770 | { 4330, 8, 1, 0, 941, 0, 1, X86ImpOpBase + 0, 1468, 0|(1ULL<<MCID::MayLoad), 0x109260050018ULL }, // Inst #4330 = SHLD32mri8_ND |
| 37771 | { 4329, 7, 0, 0, 941, 0, 1, X86ImpOpBase + 0, 1461, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001260050018ULL }, // Inst #4329 = SHLD32mri8_EVEX |
| 37772 | { 4328, 7, 0, 0, 941, 0, 1, X86ImpOpBase + 0, 1461, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200042118ULL }, // Inst #4328 = SHLD32mri8 |
| 37773 | { 4327, 7, 1, 0, 943, 1, 0, X86ImpOpBase + 517, 367, 0|(1ULL<<MCID::MayLoad), 0x1010d2e0010018ULL }, // Inst #4327 = SHLD32mrCL_NF_ND |
| 37774 | { 4326, 6, 0, 0, 943, 1, 0, X86ImpOpBase + 517, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100052e0010018ULL }, // Inst #4326 = SHLD32mrCL_NF |
| 37775 | { 4325, 7, 1, 0, 943, 1, 1, X86ImpOpBase + 515, 367, 0|(1ULL<<MCID::MayLoad), 0x10d2e0010018ULL }, // Inst #4325 = SHLD32mrCL_ND |
| 37776 | { 4324, 6, 0, 0, 943, 1, 1, X86ImpOpBase + 515, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0052e0010018ULL }, // Inst #4324 = SHLD32mrCL_EVEX |
| 37777 | { 4323, 6, 0, 0, 943, 1, 1, X86ImpOpBase + 515, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280002118ULL }, // Inst #4323 = SHLD32mrCL |
| 37778 | { 4322, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 841, 0|(1ULL<<MCID::Commutable), 0x10109260050828ULL }, // Inst #4322 = SHLD16rri8_NF_ND |
| 37779 | { 4321, 4, 1, 0, 12, 0, 0, X86ImpOpBase + 0, 1457, 0|(1ULL<<MCID::Commutable), 0x10001260050828ULL }, // Inst #4321 = SHLD16rri8_NF |
| 37780 | { 4320, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 841, 0|(1ULL<<MCID::Commutable), 0x109260050828ULL }, // Inst #4320 = SHLD16rri8_ND |
| 37781 | { 4319, 4, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 1457, 0|(1ULL<<MCID::Commutable), 0xc001260050828ULL }, // Inst #4319 = SHLD16rri8_EVEX |
| 37782 | { 4318, 4, 1, 0, 672, 0, 1, X86ImpOpBase + 0, 1457, 0|(1ULL<<MCID::Commutable), 0x52000420a8ULL }, // Inst #4318 = SHLD16rri8 |
| 37783 | { 4317, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 357, 0, 0x1010d2e0010828ULL }, // Inst #4317 = SHLD16rrCL_NF_ND |
| 37784 | { 4316, 3, 1, 0, 942, 1, 0, X86ImpOpBase + 517, 155, 0, 0x100052e0010828ULL }, // Inst #4316 = SHLD16rrCL_NF |
| 37785 | { 4315, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 357, 0, 0x10d2e0010828ULL }, // Inst #4315 = SHLD16rrCL_ND |
| 37786 | { 4314, 3, 1, 0, 942, 1, 1, X86ImpOpBase + 515, 155, 0, 0xc0052e0010828ULL }, // Inst #4314 = SHLD16rrCL_EVEX |
| 37787 | { 4313, 3, 1, 0, 1168, 1, 1, X86ImpOpBase + 515, 155, 0, 0x52800020a8ULL }, // Inst #4313 = SHLD16rrCL |
| 37788 | { 4312, 8, 1, 0, 941, 0, 0, X86ImpOpBase + 0, 1449, 0|(1ULL<<MCID::MayLoad), 0x10109260050818ULL }, // Inst #4312 = SHLD16mri8_NF_ND |
| 37789 | { 4311, 7, 0, 0, 941, 0, 0, X86ImpOpBase + 0, 1442, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001260050818ULL }, // Inst #4311 = SHLD16mri8_NF |
| 37790 | { 4310, 8, 1, 0, 941, 0, 1, X86ImpOpBase + 0, 1449, 0|(1ULL<<MCID::MayLoad), 0x109260050818ULL }, // Inst #4310 = SHLD16mri8_ND |
| 37791 | { 4309, 7, 0, 0, 941, 0, 1, X86ImpOpBase + 0, 1442, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001260050818ULL }, // Inst #4309 = SHLD16mri8_EVEX |
| 37792 | { 4308, 7, 0, 0, 674, 0, 1, X86ImpOpBase + 0, 1442, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200042098ULL }, // Inst #4308 = SHLD16mri8 |
| 37793 | { 4307, 7, 1, 0, 943, 1, 0, X86ImpOpBase + 517, 333, 0|(1ULL<<MCID::MayLoad), 0x1010d2e0010818ULL }, // Inst #4307 = SHLD16mrCL_NF_ND |
| 37794 | { 4306, 6, 0, 0, 943, 1, 0, X86ImpOpBase + 517, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100052e0010818ULL }, // Inst #4306 = SHLD16mrCL_NF |
| 37795 | { 4305, 7, 1, 0, 943, 1, 1, X86ImpOpBase + 515, 333, 0|(1ULL<<MCID::MayLoad), 0x10d2e0010818ULL }, // Inst #4305 = SHLD16mrCL_ND |
| 37796 | { 4304, 6, 0, 0, 943, 1, 1, X86ImpOpBase + 515, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0052e0010818ULL }, // Inst #4304 = SHLD16mrCL_EVEX |
| 37797 | { 4303, 6, 0, 0, 673, 1, 1, X86ImpOpBase + 515, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280002098ULL }, // Inst #4303 = SHLD16mrCL |
| 37798 | { 4302, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 445, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010e060050034ULL }, // Inst #4302 = SHL8ri_NF_ND |
| 37799 | { 4301, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10006060050034ULL }, // Inst #4301 = SHL8ri_NF |
| 37800 | { 4300, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 445, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10e060050034ULL }, // Inst #4300 = SHL8ri_ND |
| 37801 | { 4299, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc006060050034ULL }, // Inst #4299 = SHL8ri_EVEX |
| 37802 | { 4298, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6000040034ULL }, // Inst #4298 = SHL8ri |
| 37803 | { 4297, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 925, 0, 0x1010e960010034ULL }, // Inst #4297 = SHL8rCL_NF_ND |
| 37804 | { 4296, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 1027, 0, 0x10006960010034ULL }, // Inst #4296 = SHL8rCL_NF |
| 37805 | { 4295, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 925, 0, 0x10e960010034ULL }, // Inst #4295 = SHL8rCL_ND |
| 37806 | { 4294, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 1027, 0, 0xc006960010034ULL }, // Inst #4294 = SHL8rCL_EVEX |
| 37807 | { 4293, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 1027, 0, 0x6900000034ULL }, // Inst #4293 = SHL8rCL |
| 37808 | { 4292, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 925, 0, 0x1010e860010034ULL }, // Inst #4292 = SHL8r1_NF_ND |
| 37809 | { 4291, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 1027, 0, 0x10006860010034ULL }, // Inst #4291 = SHL8r1_NF |
| 37810 | { 4290, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 925, 0, 0x10e860010034ULL }, // Inst #4290 = SHL8r1_ND |
| 37811 | { 4289, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 1027, 0, 0xc006860010034ULL }, // Inst #4289 = SHL8r1_EVEX |
| 37812 | { 4288, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 1027, 0, 0x6800000034ULL }, // Inst #4288 = SHL8r1 |
| 37813 | { 4287, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x1010e060050024ULL }, // Inst #4287 = SHL8mi_NF_ND |
| 37814 | { 4286, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006060050024ULL }, // Inst #4286 = SHL8mi_NF |
| 37815 | { 4285, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x10e060050024ULL }, // Inst #4285 = SHL8mi_ND |
| 37816 | { 4284, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050024ULL }, // Inst #4284 = SHL8mi_EVEX |
| 37817 | { 4283, 6, 0, 0, 1615, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040024ULL }, // Inst #4283 = SHL8mi |
| 37818 | { 4282, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 919, 0|(1ULL<<MCID::MayLoad), 0x1010e960010024ULL }, // Inst #4282 = SHL8mCL_NF_ND |
| 37819 | { 4281, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006960010024ULL }, // Inst #4281 = SHL8mCL_NF |
| 37820 | { 4280, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 919, 0|(1ULL<<MCID::MayLoad), 0x10e960010024ULL }, // Inst #4280 = SHL8mCL_ND |
| 37821 | { 4279, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010024ULL }, // Inst #4279 = SHL8mCL_EVEX |
| 37822 | { 4278, 5, 0, 0, 1614, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000024ULL }, // Inst #4278 = SHL8mCL |
| 37823 | { 4277, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x1010e860010024ULL }, // Inst #4277 = SHL8m1_NF_ND |
| 37824 | { 4276, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006860010024ULL }, // Inst #4276 = SHL8m1_NF |
| 37825 | { 4275, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x10e860010024ULL }, // Inst #4275 = SHL8m1_ND |
| 37826 | { 4274, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010024ULL }, // Inst #4274 = SHL8m1_EVEX |
| 37827 | { 4273, 5, 0, 0, 1615, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000024ULL }, // Inst #4273 = SHL8m1 |
| 37828 | { 4272, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 405, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010e0e0070034ULL }, // Inst #4272 = SHL64ri_NF_ND |
| 37829 | { 4271, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100060e0070034ULL }, // Inst #4271 = SHL64ri_NF |
| 37830 | { 4270, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 405, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10e0e0070034ULL }, // Inst #4270 = SHL64ri_ND |
| 37831 | { 4269, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0060e0070034ULL }, // Inst #4269 = SHL64ri_EVEX |
| 37832 | { 4268, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6080060034ULL }, // Inst #4268 = SHL64ri |
| 37833 | { 4267, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 553, 0, 0x1010e9e0030034ULL }, // Inst #4267 = SHL64rCL_NF_ND |
| 37834 | { 4266, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 300, 0, 0x100069e0030034ULL }, // Inst #4266 = SHL64rCL_NF |
| 37835 | { 4265, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 553, 0, 0x10e9e0030034ULL }, // Inst #4265 = SHL64rCL_ND |
| 37836 | { 4264, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 300, 0, 0xc0069e0030034ULL }, // Inst #4264 = SHL64rCL_EVEX |
| 37837 | { 4263, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 300, 0, 0x6980020034ULL }, // Inst #4263 = SHL64rCL |
| 37838 | { 4262, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 553, 0, 0x1010e8e0030034ULL }, // Inst #4262 = SHL64r1_NF_ND |
| 37839 | { 4261, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 300, 0, 0x100068e0030034ULL }, // Inst #4261 = SHL64r1_NF |
| 37840 | { 4260, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 553, 0, 0x10e8e0030034ULL }, // Inst #4260 = SHL64r1_ND |
| 37841 | { 4259, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 300, 0, 0xc0068e0030034ULL }, // Inst #4259 = SHL64r1_EVEX |
| 37842 | { 4258, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 300, 0, 0x6880020034ULL }, // Inst #4258 = SHL64r1 |
| 37843 | { 4257, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0070024ULL }, // Inst #4257 = SHL64mi_NF_ND |
| 37844 | { 4256, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0070024ULL }, // Inst #4256 = SHL64mi_NF |
| 37845 | { 4255, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070024ULL }, // Inst #4255 = SHL64mi_ND |
| 37846 | { 4254, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070024ULL }, // Inst #4254 = SHL64mi_EVEX |
| 37847 | { 4253, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060024ULL }, // Inst #4253 = SHL64mi |
| 37848 | { 4252, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 242, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0030024ULL }, // Inst #4252 = SHL64mCL_NF_ND |
| 37849 | { 4251, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0030024ULL }, // Inst #4251 = SHL64mCL_NF |
| 37850 | { 4250, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 242, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030024ULL }, // Inst #4250 = SHL64mCL_ND |
| 37851 | { 4249, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030024ULL }, // Inst #4249 = SHL64mCL_EVEX |
| 37852 | { 4248, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020024ULL }, // Inst #4248 = SHL64mCL |
| 37853 | { 4247, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0030024ULL }, // Inst #4247 = SHL64m1_NF_ND |
| 37854 | { 4246, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0030024ULL }, // Inst #4246 = SHL64m1_NF |
| 37855 | { 4245, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030024ULL }, // Inst #4245 = SHL64m1_ND |
| 37856 | { 4244, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030024ULL }, // Inst #4244 = SHL64m1_EVEX |
| 37857 | { 4243, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020024ULL }, // Inst #4243 = SHL64m1 |
| 37858 | { 4242, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010e0e0050034ULL }, // Inst #4242 = SHL32ri_NF_ND |
| 37859 | { 4241, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100060e0050034ULL }, // Inst #4241 = SHL32ri_NF |
| 37860 | { 4240, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10e0e0050034ULL }, // Inst #4240 = SHL32ri_ND |
| 37861 | { 4239, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0060e0050034ULL }, // Inst #4239 = SHL32ri_EVEX |
| 37862 | { 4238, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6080040134ULL }, // Inst #4238 = SHL32ri |
| 37863 | { 4237, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 551, 0, 0x1010e9e0010034ULL }, // Inst #4237 = SHL32rCL_NF_ND |
| 37864 | { 4236, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 298, 0, 0x100069e0010034ULL }, // Inst #4236 = SHL32rCL_NF |
| 37865 | { 4235, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 551, 0, 0x10e9e0010034ULL }, // Inst #4235 = SHL32rCL_ND |
| 37866 | { 4234, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 298, 0, 0xc0069e0010034ULL }, // Inst #4234 = SHL32rCL_EVEX |
| 37867 | { 4233, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 298, 0, 0x6980000134ULL }, // Inst #4233 = SHL32rCL |
| 37868 | { 4232, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 551, 0, 0x1010e8e0010034ULL }, // Inst #4232 = SHL32r1_NF_ND |
| 37869 | { 4231, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 298, 0, 0x100068e0010034ULL }, // Inst #4231 = SHL32r1_NF |
| 37870 | { 4230, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 551, 0, 0x10e8e0010034ULL }, // Inst #4230 = SHL32r1_ND |
| 37871 | { 4229, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 298, 0, 0xc0068e0010034ULL }, // Inst #4229 = SHL32r1_EVEX |
| 37872 | { 4228, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 298, 0, 0x6880000134ULL }, // Inst #4228 = SHL32r1 |
| 37873 | { 4227, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050024ULL }, // Inst #4227 = SHL32mi_NF_ND |
| 37874 | { 4226, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050024ULL }, // Inst #4226 = SHL32mi_NF |
| 37875 | { 4225, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050024ULL }, // Inst #4225 = SHL32mi_ND |
| 37876 | { 4224, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050024ULL }, // Inst #4224 = SHL32mi_EVEX |
| 37877 | { 4223, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040124ULL }, // Inst #4223 = SHL32mi |
| 37878 | { 4222, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 236, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010024ULL }, // Inst #4222 = SHL32mCL_NF_ND |
| 37879 | { 4221, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010024ULL }, // Inst #4221 = SHL32mCL_NF |
| 37880 | { 4220, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 236, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010024ULL }, // Inst #4220 = SHL32mCL_ND |
| 37881 | { 4219, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010024ULL }, // Inst #4219 = SHL32mCL_EVEX |
| 37882 | { 4218, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000124ULL }, // Inst #4218 = SHL32mCL |
| 37883 | { 4217, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010024ULL }, // Inst #4217 = SHL32m1_NF_ND |
| 37884 | { 4216, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010024ULL }, // Inst #4216 = SHL32m1_NF |
| 37885 | { 4215, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010024ULL }, // Inst #4215 = SHL32m1_ND |
| 37886 | { 4214, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010024ULL }, // Inst #4214 = SHL32m1_EVEX |
| 37887 | { 4213, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000124ULL }, // Inst #4213 = SHL32m1 |
| 37888 | { 4212, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 340, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010e0e0050834ULL }, // Inst #4212 = SHL16ri_NF_ND |
| 37889 | { 4211, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100060e0050834ULL }, // Inst #4211 = SHL16ri_NF |
| 37890 | { 4210, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 340, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10e0e0050834ULL }, // Inst #4210 = SHL16ri_ND |
| 37891 | { 4209, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0060e0050834ULL }, // Inst #4209 = SHL16ri_EVEX |
| 37892 | { 4208, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x60800400b4ULL }, // Inst #4208 = SHL16ri |
| 37893 | { 4207, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 547, 0, 0x1010e9e0010834ULL }, // Inst #4207 = SHL16rCL_NF_ND |
| 37894 | { 4206, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 573, 0, 0x100069e0010834ULL }, // Inst #4206 = SHL16rCL_NF |
| 37895 | { 4205, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 547, 0, 0x10e9e0010834ULL }, // Inst #4205 = SHL16rCL_ND |
| 37896 | { 4204, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 573, 0, 0xc0069e0010834ULL }, // Inst #4204 = SHL16rCL_EVEX |
| 37897 | { 4203, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 573, 0, 0x69800000b4ULL }, // Inst #4203 = SHL16rCL |
| 37898 | { 4202, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 547, 0, 0x1010e8e0010834ULL }, // Inst #4202 = SHL16r1_NF_ND |
| 37899 | { 4201, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 573, 0, 0x100068e0010834ULL }, // Inst #4201 = SHL16r1_NF |
| 37900 | { 4200, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 547, 0, 0x10e8e0010834ULL }, // Inst #4200 = SHL16r1_ND |
| 37901 | { 4199, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 573, 0, 0xc0068e0010834ULL }, // Inst #4199 = SHL16r1_EVEX |
| 37902 | { 4198, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 573, 0, 0x68800000b4ULL }, // Inst #4198 = SHL16r1 |
| 37903 | { 4197, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050824ULL }, // Inst #4197 = SHL16mi_NF_ND |
| 37904 | { 4196, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050824ULL }, // Inst #4196 = SHL16mi_NF |
| 37905 | { 4195, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050824ULL }, // Inst #4195 = SHL16mi_ND |
| 37906 | { 4194, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050824ULL }, // Inst #4194 = SHL16mi_EVEX |
| 37907 | { 4193, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a4ULL }, // Inst #4193 = SHL16mi |
| 37908 | { 4192, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 567, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010824ULL }, // Inst #4192 = SHL16mCL_NF_ND |
| 37909 | { 4191, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010824ULL }, // Inst #4191 = SHL16mCL_NF |
| 37910 | { 4190, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 567, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010824ULL }, // Inst #4190 = SHL16mCL_ND |
| 37911 | { 4189, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010824ULL }, // Inst #4189 = SHL16mCL_EVEX |
| 37912 | { 4188, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a4ULL }, // Inst #4188 = SHL16mCL |
| 37913 | { 4187, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010824ULL }, // Inst #4187 = SHL16m1_NF_ND |
| 37914 | { 4186, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010824ULL }, // Inst #4186 = SHL16m1_NF |
| 37915 | { 4185, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010824ULL }, // Inst #4185 = SHL16m1_ND |
| 37916 | { 4184, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010824ULL }, // Inst #4184 = SHL16m1_EVEX |
| 37917 | { 4183, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a4ULL }, // Inst #4183 = SHL16m1 |
| 37918 | { 4182, 3, 1, 0, 1005, 1, 0, X86ImpOpBase + 111, 472, 0, 0x6580004029ULL }, // Inst #4182 = SHA256RNDS2rr |
| 37919 | { 4181, 7, 1, 0, 1006, 1, 0, X86ImpOpBase + 111, 465, 0|(1ULL<<MCID::MayLoad), 0x6580004019ULL }, // Inst #4181 = SHA256RNDS2rm |
| 37920 | { 4180, 3, 1, 0, 996, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6680004029ULL }, // Inst #4180 = SHA256MSG2rr |
| 37921 | { 4179, 7, 1, 0, 995, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6680004019ULL }, // Inst #4179 = SHA256MSG2rm |
| 37922 | { 4178, 3, 1, 0, 997, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6600004029ULL }, // Inst #4178 = SHA256MSG1rr |
| 37923 | { 4177, 7, 1, 0, 998, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6600004019ULL }, // Inst #4177 = SHA256MSG1rm |
| 37924 | { 4176, 4, 1, 0, 1003, 0, 0, X86ImpOpBase + 0, 563, 0, 0x6600046029ULL }, // Inst #4176 = SHA1RNDS4rri |
| 37925 | { 4175, 8, 1, 0, 1004, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x6600046019ULL }, // Inst #4175 = SHA1RNDS4rmi |
| 37926 | { 4174, 3, 1, 0, 1001, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6400004029ULL }, // Inst #4174 = SHA1NEXTErr |
| 37927 | { 4173, 7, 1, 0, 1002, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6400004019ULL }, // Inst #4173 = SHA1NEXTErm |
| 37928 | { 4172, 3, 1, 0, 999, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6500004029ULL }, // Inst #4172 = SHA1MSG2rr |
| 37929 | { 4171, 7, 1, 0, 1000, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6500004019ULL }, // Inst #4171 = SHA1MSG2rm |
| 37930 | { 4170, 3, 1, 0, 1044, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6480004029ULL }, // Inst #4170 = SHA1MSG1rr |
| 37931 | { 4169, 7, 1, 0, 1045, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6480004019ULL }, // Inst #4169 = SHA1MSG1rm |
| 37932 | { 4168, 5, 0, 0, 845, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002020ULL }, // Inst #4168 = SGDT64m |
| 37933 | { 4167, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002120ULL }, // Inst #4167 = SGDT32m |
| 37934 | { 4166, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800020a0ULL }, // Inst #4166 = SGDT16m |
| 37935 | { 4165, 0, 0, 0, 858, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000203fULL }, // Inst #4165 = SFENCE |
| 37936 | { 4164, 2, 1, 0, 317, 1, 0, X86ImpOpBase + 0, 1440, 0, 0x10206001182eULL }, // Inst #4164 = SETZUCCr |
| 37937 | { 4163, 6, 0, 0, 316, 1, 0, X86ImpOpBase + 0, 1434, 0|(1ULL<<MCID::MayStore), 0x10206001181eULL }, // Inst #4163 = SETZUCCm |
| 37938 | { 4162, 0, 0, 0, 8, 1, 1, X86ImpOpBase + 284, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80003068ULL }, // Inst #4162 = SETSSBSY |
| 37939 | { 4161, 2, 1, 0, 317, 1, 0, X86ImpOpBase + 0, 1440, 0, 0xca0206001182eULL }, // Inst #4161 = SETCCr_EVEX |
| 37940 | { 4160, 2, 1, 0, 818, 1, 0, X86ImpOpBase + 0, 1440, 0, 0x480000202eULL }, // Inst #4160 = SETCCr |
| 37941 | { 4159, 6, 0, 0, 316, 1, 0, X86ImpOpBase + 0, 1434, 0|(1ULL<<MCID::MayStore), 0xca0206001181eULL }, // Inst #4159 = SETCCm_EVEX |
| 37942 | { 4158, 6, 0, 0, 819, 1, 0, X86ImpOpBase + 0, 1434, 0|(1ULL<<MCID::MayStore), 0x480000201eULL }, // Inst #4158 = SETCCm |
| 37943 | { 4157, 0, 0, 0, 1618, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80002068ULL }, // Inst #4157 = SERIALIZE |
| 37944 | { 4156, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380003036ULL }, // Inst #4156 = SENDUIPI |
| 37945 | { 4155, 2, 1, 0, 8, 1, 3, X86ImpOpBase + 215, 553, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4155 = SEG_ALLOCA_64 |
| 37946 | { 4154, 2, 1, 0, 8, 1, 3, X86ImpOpBase + 211, 551, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #4154 = SEG_ALLOCA_32 |
| 37947 | { 4153, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000284dULL }, // Inst #4153 = SEAMRET |
| 37948 | { 4152, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000284eULL }, // Inst #4152 = SEAMOPS |
| 37949 | { 4151, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000284fULL }, // Inst #4151 = SEAMCALL |
| 37950 | { 4150, 1, 0, 0, 746, 3, 2, X86ImpOpBase + 537, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780000085ULL }, // Inst #4150 = SCASW |
| 37951 | { 4149, 1, 0, 0, 746, 3, 2, X86ImpOpBase + 532, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780020005ULL }, // Inst #4149 = SCASQ |
| 37952 | { 4148, 1, 0, 0, 746, 3, 2, X86ImpOpBase + 527, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780000105ULL }, // Inst #4148 = SCASL |
| 37953 | { 4147, 1, 0, 0, 746, 3, 2, X86ImpOpBase + 522, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5700000005ULL }, // Inst #4147 = SCASB |
| 37954 | { 4146, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 173, 0, 0xd00000029ULL }, // Inst #4146 = SBB8rr_REV |
| 37955 | { 4145, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 462, 0, 0x108d60010029ULL }, // Inst #4145 = SBB8rr_ND_REV |
| 37956 | { 4144, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 462, 0, 0x108c60010028ULL }, // Inst #4144 = SBB8rr_ND |
| 37957 | { 4143, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 173, 0, 0xc000d60010029ULL }, // Inst #4143 = SBB8rr_EVEX_REV |
| 37958 | { 4142, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 173, 0, 0xc000c60010028ULL }, // Inst #4142 = SBB8rr_EVEX |
| 37959 | { 4141, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 173, 0, 0xc00000028ULL }, // Inst #4141 = SBB8rr |
| 37960 | { 4140, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 455, 0|(1ULL<<MCID::MayLoad), 0x108d60010019ULL }, // Inst #4140 = SBB8rm_ND |
| 37961 | { 4139, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 448, 0|(1ULL<<MCID::MayLoad), 0xc000d60010019ULL }, // Inst #4139 = SBB8rm_EVEX |
| 37962 | { 4138, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 448, 0|(1ULL<<MCID::MayLoad), 0xd00000019ULL }, // Inst #4138 = SBB8rm |
| 37963 | { 4137, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 445, 0, 0x10c060050033ULL }, // Inst #4137 = SBB8ri_ND |
| 37964 | { 4136, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 170, 0, 0xc004060050033ULL }, // Inst #4136 = SBB8ri_EVEX |
| 37965 | { 4135, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 170, 0, 0x4100040033ULL }, // Inst #4135 = SBB8ri8 |
| 37966 | { 4134, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 170, 0, 0x4000040033ULL }, // Inst #4134 = SBB8ri |
| 37967 | { 4133, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 438, 0|(1ULL<<MCID::MayLoad), 0x108c60010018ULL }, // Inst #4133 = SBB8mr_ND |
| 37968 | { 4132, 6, 0, 0, 931, 1, 1, X86ImpOpBase + 31, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000c60010018ULL }, // Inst #4132 = SBB8mr_EVEX |
| 37969 | { 4131, 6, 0, 0, 1018, 1, 1, X86ImpOpBase + 31, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00000018ULL }, // Inst #4131 = SBB8mr |
| 37970 | { 4130, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 425, 0|(1ULL<<MCID::MayLoad), 0x10c060050023ULL }, // Inst #4130 = SBB8mi_ND |
| 37971 | { 4129, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050023ULL }, // Inst #4129 = SBB8mi_EVEX |
| 37972 | { 4128, 6, 0, 0, 1437, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040023ULL }, // Inst #4128 = SBB8mi8 |
| 37973 | { 4127, 6, 0, 0, 1437, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040023ULL }, // Inst #4127 = SBB8mi |
| 37974 | { 4126, 1, 0, 0, 910, 2, 2, X86ImpOpBase + 65, 1, 0, 0xe00040001ULL }, // Inst #4126 = SBB8i8 |
| 37975 | { 4125, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0xd80020029ULL }, // Inst #4125 = SBB64rr_REV |
| 37976 | { 4124, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 422, 0, 0x108de0030029ULL }, // Inst #4124 = SBB64rr_ND_REV |
| 37977 | { 4123, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 422, 0, 0x108ce0030028ULL }, // Inst #4123 = SBB64rr_ND |
| 37978 | { 4122, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0xc000de0030029ULL }, // Inst #4122 = SBB64rr_EVEX_REV |
| 37979 | { 4121, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0xc000ce0030028ULL }, // Inst #4121 = SBB64rr_EVEX |
| 37980 | { 4120, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0xc80020028ULL }, // Inst #4120 = SBB64rr |
| 37981 | { 4119, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 415, 0|(1ULL<<MCID::MayLoad), 0x108de0030019ULL }, // Inst #4119 = SBB64rm_ND |
| 37982 | { 4118, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 408, 0|(1ULL<<MCID::MayLoad), 0xc000de0030019ULL }, // Inst #4118 = SBB64rm_EVEX |
| 37983 | { 4117, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 408, 0|(1ULL<<MCID::MayLoad), 0xd80020019ULL }, // Inst #4117 = SBB64rm |
| 37984 | { 4116, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 405, 0, 0x10c1e0070033ULL }, // Inst #4116 = SBB64ri8_ND |
| 37985 | { 4115, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 164, 0, 0xc0041e0070033ULL }, // Inst #4115 = SBB64ri8_EVEX |
| 37986 | { 4114, 3, 1, 0, 909, 1, 1, X86ImpOpBase + 31, 164, 0, 0x4180060033ULL }, // Inst #4114 = SBB64ri8 |
| 37987 | { 4113, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 405, 0, 0x10c0e0230033ULL }, // Inst #4113 = SBB64ri32_ND |
| 37988 | { 4112, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 164, 0, 0xc0040e0230033ULL }, // Inst #4112 = SBB64ri32_EVEX |
| 37989 | { 4111, 3, 1, 0, 1155, 1, 1, X86ImpOpBase + 31, 164, 0, 0x4080220033ULL }, // Inst #4111 = SBB64ri32 |
| 37990 | { 4110, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 398, 0|(1ULL<<MCID::MayLoad), 0x108ce0030018ULL }, // Inst #4110 = SBB64mr_ND |
| 37991 | { 4109, 6, 0, 0, 931, 1, 1, X86ImpOpBase + 31, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000ce0030018ULL }, // Inst #4109 = SBB64mr_EVEX |
| 37992 | { 4108, 6, 0, 0, 797, 1, 1, X86ImpOpBase + 31, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80020018ULL }, // Inst #4108 = SBB64mr |
| 37993 | { 4107, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 391, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070023ULL }, // Inst #4107 = SBB64mi8_ND |
| 37994 | { 4106, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070023ULL }, // Inst #4106 = SBB64mi8_EVEX |
| 37995 | { 4105, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060023ULL }, // Inst #4105 = SBB64mi8 |
| 37996 | { 4104, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 391, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230023ULL }, // Inst #4104 = SBB64mi32_ND |
| 37997 | { 4103, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230023ULL }, // Inst #4103 = SBB64mi32_EVEX |
| 37998 | { 4102, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220023ULL }, // Inst #4102 = SBB64mi32 |
| 37999 | { 4101, 1, 0, 0, 910, 2, 2, X86ImpOpBase + 61, 1, 0, 0xe80220001ULL }, // Inst #4101 = SBB64i32 |
| 38000 | { 4100, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0xd80000129ULL }, // Inst #4100 = SBB32rr_REV |
| 38001 | { 4099, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 225, 0, 0x108de0010029ULL }, // Inst #4099 = SBB32rr_ND_REV |
| 38002 | { 4098, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 225, 0, 0x108ce0010028ULL }, // Inst #4098 = SBB32rr_ND |
| 38003 | { 4097, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0xc000de0010029ULL }, // Inst #4097 = SBB32rr_EVEX_REV |
| 38004 | { 4096, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0xc000ce0010028ULL }, // Inst #4096 = SBB32rr_EVEX |
| 38005 | { 4095, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0xc80000128ULL }, // Inst #4095 = SBB32rr |
| 38006 | { 4094, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 384, 0|(1ULL<<MCID::MayLoad), 0x108de0010019ULL }, // Inst #4094 = SBB32rm_ND |
| 38007 | { 4093, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 377, 0|(1ULL<<MCID::MayLoad), 0xc000de0010019ULL }, // Inst #4093 = SBB32rm_EVEX |
| 38008 | { 4092, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 377, 0|(1ULL<<MCID::MayLoad), 0xd80000119ULL }, // Inst #4092 = SBB32rm |
| 38009 | { 4091, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 374, 0, 0x10c0e0190033ULL }, // Inst #4091 = SBB32ri_ND |
| 38010 | { 4090, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 158, 0, 0xc0040e0190033ULL }, // Inst #4090 = SBB32ri_EVEX |
| 38011 | { 4089, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 374, 0, 0x10c1e0050033ULL }, // Inst #4089 = SBB32ri8_ND |
| 38012 | { 4088, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 158, 0, 0xc0041e0050033ULL }, // Inst #4088 = SBB32ri8_EVEX |
| 38013 | { 4087, 3, 1, 0, 909, 1, 1, X86ImpOpBase + 31, 158, 0, 0x4180040133ULL }, // Inst #4087 = SBB32ri8 |
| 38014 | { 4086, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 158, 0, 0x4080180133ULL }, // Inst #4086 = SBB32ri |
| 38015 | { 4085, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 367, 0|(1ULL<<MCID::MayLoad), 0x108ce0010018ULL }, // Inst #4085 = SBB32mr_ND |
| 38016 | { 4084, 6, 0, 0, 931, 1, 1, X86ImpOpBase + 31, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000ce0010018ULL }, // Inst #4084 = SBB32mr_EVEX |
| 38017 | { 4083, 6, 0, 0, 797, 1, 1, X86ImpOpBase + 31, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80000118ULL }, // Inst #4083 = SBB32mr |
| 38018 | { 4082, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 360, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190023ULL }, // Inst #4082 = SBB32mi_ND |
| 38019 | { 4081, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190023ULL }, // Inst #4081 = SBB32mi_EVEX |
| 38020 | { 4080, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 360, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050023ULL }, // Inst #4080 = SBB32mi8_ND |
| 38021 | { 4079, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050023ULL }, // Inst #4079 = SBB32mi8_EVEX |
| 38022 | { 4078, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040123ULL }, // Inst #4078 = SBB32mi8 |
| 38023 | { 4077, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180123ULL }, // Inst #4077 = SBB32mi |
| 38024 | { 4076, 1, 0, 0, 910, 2, 2, X86ImpOpBase + 57, 1, 0, 0xe80180101ULL }, // Inst #4076 = SBB32i32 |
| 38025 | { 4075, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 155, 0, 0xd800000a9ULL }, // Inst #4075 = SBB16rr_REV |
| 38026 | { 4074, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 357, 0, 0x108de0010829ULL }, // Inst #4074 = SBB16rr_ND_REV |
| 38027 | { 4073, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 357, 0, 0x108ce0010828ULL }, // Inst #4073 = SBB16rr_ND |
| 38028 | { 4072, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 155, 0, 0xc000de0010829ULL }, // Inst #4072 = SBB16rr_EVEX_REV |
| 38029 | { 4071, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 155, 0, 0xc000ce0010828ULL }, // Inst #4071 = SBB16rr_EVEX |
| 38030 | { 4070, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 155, 0, 0xc800000a8ULL }, // Inst #4070 = SBB16rr |
| 38031 | { 4069, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 350, 0|(1ULL<<MCID::MayLoad), 0x108de0010819ULL }, // Inst #4069 = SBB16rm_ND |
| 38032 | { 4068, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 343, 0|(1ULL<<MCID::MayLoad), 0xc000de0010819ULL }, // Inst #4068 = SBB16rm_EVEX |
| 38033 | { 4067, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 343, 0|(1ULL<<MCID::MayLoad), 0xd80000099ULL }, // Inst #4067 = SBB16rm |
| 38034 | { 4066, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 340, 0, 0x10c0e0110833ULL }, // Inst #4066 = SBB16ri_ND |
| 38035 | { 4065, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 152, 0, 0xc0040e0110833ULL }, // Inst #4065 = SBB16ri_EVEX |
| 38036 | { 4064, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 340, 0, 0x10c1e0050833ULL }, // Inst #4064 = SBB16ri8_ND |
| 38037 | { 4063, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 152, 0, 0xc0041e0050833ULL }, // Inst #4063 = SBB16ri8_EVEX |
| 38038 | { 4062, 3, 1, 0, 909, 1, 1, X86ImpOpBase + 31, 152, 0, 0x41800400b3ULL }, // Inst #4062 = SBB16ri8 |
| 38039 | { 4061, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 152, 0, 0x40801000b3ULL }, // Inst #4061 = SBB16ri |
| 38040 | { 4060, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 333, 0|(1ULL<<MCID::MayLoad), 0x108ce0010818ULL }, // Inst #4060 = SBB16mr_ND |
| 38041 | { 4059, 6, 0, 0, 931, 1, 1, X86ImpOpBase + 31, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000ce0010818ULL }, // Inst #4059 = SBB16mr_EVEX |
| 38042 | { 4058, 6, 0, 0, 797, 1, 1, X86ImpOpBase + 31, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80000098ULL }, // Inst #4058 = SBB16mr |
| 38043 | { 4057, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 320, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110823ULL }, // Inst #4057 = SBB16mi_ND |
| 38044 | { 4056, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110823ULL }, // Inst #4056 = SBB16mi_EVEX |
| 38045 | { 4055, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 320, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050823ULL }, // Inst #4055 = SBB16mi8_ND |
| 38046 | { 4054, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050823ULL }, // Inst #4054 = SBB16mi8_EVEX |
| 38047 | { 4053, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a3ULL }, // Inst #4053 = SBB16mi8 |
| 38048 | { 4052, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a3ULL }, // Inst #4052 = SBB16mi |
| 38049 | { 4051, 1, 0, 0, 910, 2, 2, X86ImpOpBase + 53, 1, 0, 0xe80100081ULL }, // Inst #4051 = SBB16i16 |
| 38050 | { 4050, 0, 0, 0, 8, 1, 1, X86ImpOpBase + 284, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8000306aULL }, // Inst #4050 = SAVEPREVSSP |
| 38051 | { 4049, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 422, 0, 0x7be002502aULL }, // Inst #4049 = SARX64rr_EVEX |
| 38052 | { 4048, 3, 1, 0, 1617, 0, 0, X86ImpOpBase + 0, 422, 0, 0x7ba002502aULL }, // Inst #4048 = SARX64rr |
| 38053 | { 4047, 7, 1, 0, 315, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x7be002501aULL }, // Inst #4047 = SARX64rm_EVEX |
| 38054 | { 4046, 7, 1, 0, 1616, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x7ba002501aULL }, // Inst #4046 = SARX64rm |
| 38055 | { 4045, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 225, 0, 0x7be000502aULL }, // Inst #4045 = SARX32rr_EVEX |
| 38056 | { 4044, 3, 1, 0, 1617, 0, 0, X86ImpOpBase + 0, 225, 0, 0x7ba000502aULL }, // Inst #4044 = SARX32rr |
| 38057 | { 4043, 7, 1, 0, 315, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x7be000501aULL }, // Inst #4043 = SARX32rm_EVEX |
| 38058 | { 4042, 7, 1, 0, 1616, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x7ba000501aULL }, // Inst #4042 = SARX32rm |
| 38059 | { 4041, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 445, 0, 0x1010e060050037ULL }, // Inst #4041 = SAR8ri_NF_ND |
| 38060 | { 4040, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 170, 0, 0x10006060050037ULL }, // Inst #4040 = SAR8ri_NF |
| 38061 | { 4039, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 445, 0, 0x10e060050037ULL }, // Inst #4039 = SAR8ri_ND |
| 38062 | { 4038, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 170, 0, 0xc006060050037ULL }, // Inst #4038 = SAR8ri_EVEX |
| 38063 | { 4037, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 170, 0, 0x6000040037ULL }, // Inst #4037 = SAR8ri |
| 38064 | { 4036, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 925, 0, 0x1010e960010037ULL }, // Inst #4036 = SAR8rCL_NF_ND |
| 38065 | { 4035, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 1027, 0, 0x10006960010037ULL }, // Inst #4035 = SAR8rCL_NF |
| 38066 | { 4034, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 925, 0, 0x10e960010037ULL }, // Inst #4034 = SAR8rCL_ND |
| 38067 | { 4033, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 1027, 0, 0xc006960010037ULL }, // Inst #4033 = SAR8rCL_EVEX |
| 38068 | { 4032, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 1027, 0, 0x6900000037ULL }, // Inst #4032 = SAR8rCL |
| 38069 | { 4031, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 925, 0, 0x1010e860010037ULL }, // Inst #4031 = SAR8r1_NF_ND |
| 38070 | { 4030, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 1027, 0, 0x10006860010037ULL }, // Inst #4030 = SAR8r1_NF |
| 38071 | { 4029, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 925, 0, 0x10e860010037ULL }, // Inst #4029 = SAR8r1_ND |
| 38072 | { 4028, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 1027, 0, 0xc006860010037ULL }, // Inst #4028 = SAR8r1_EVEX |
| 38073 | { 4027, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 1027, 0, 0x6800000037ULL }, // Inst #4027 = SAR8r1 |
| 38074 | { 4026, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x1010e060050027ULL }, // Inst #4026 = SAR8mi_NF_ND |
| 38075 | { 4025, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006060050027ULL }, // Inst #4025 = SAR8mi_NF |
| 38076 | { 4024, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x10e060050027ULL }, // Inst #4024 = SAR8mi_ND |
| 38077 | { 4023, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050027ULL }, // Inst #4023 = SAR8mi_EVEX |
| 38078 | { 4022, 6, 0, 0, 1615, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040027ULL }, // Inst #4022 = SAR8mi |
| 38079 | { 4021, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 919, 0|(1ULL<<MCID::MayLoad), 0x1010e960010027ULL }, // Inst #4021 = SAR8mCL_NF_ND |
| 38080 | { 4020, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006960010027ULL }, // Inst #4020 = SAR8mCL_NF |
| 38081 | { 4019, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 919, 0|(1ULL<<MCID::MayLoad), 0x10e960010027ULL }, // Inst #4019 = SAR8mCL_ND |
| 38082 | { 4018, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010027ULL }, // Inst #4018 = SAR8mCL_EVEX |
| 38083 | { 4017, 5, 0, 0, 1614, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000027ULL }, // Inst #4017 = SAR8mCL |
| 38084 | { 4016, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x1010e860010027ULL }, // Inst #4016 = SAR8m1_NF_ND |
| 38085 | { 4015, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006860010027ULL }, // Inst #4015 = SAR8m1_NF |
| 38086 | { 4014, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x10e860010027ULL }, // Inst #4014 = SAR8m1_ND |
| 38087 | { 4013, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010027ULL }, // Inst #4013 = SAR8m1_EVEX |
| 38088 | { 4012, 5, 0, 0, 1615, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000027ULL }, // Inst #4012 = SAR8m1 |
| 38089 | { 4011, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 405, 0, 0x1010e0e0070037ULL }, // Inst #4011 = SAR64ri_NF_ND |
| 38090 | { 4010, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 164, 0, 0x100060e0070037ULL }, // Inst #4010 = SAR64ri_NF |
| 38091 | { 4009, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 405, 0, 0x10e0e0070037ULL }, // Inst #4009 = SAR64ri_ND |
| 38092 | { 4008, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 164, 0, 0xc0060e0070037ULL }, // Inst #4008 = SAR64ri_EVEX |
| 38093 | { 4007, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 164, 0, 0x6080060037ULL }, // Inst #4007 = SAR64ri |
| 38094 | { 4006, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 553, 0, 0x1010e9e0030037ULL }, // Inst #4006 = SAR64rCL_NF_ND |
| 38095 | { 4005, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 300, 0, 0x100069e0030037ULL }, // Inst #4005 = SAR64rCL_NF |
| 38096 | { 4004, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 553, 0, 0x10e9e0030037ULL }, // Inst #4004 = SAR64rCL_ND |
| 38097 | { 4003, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 300, 0, 0xc0069e0030037ULL }, // Inst #4003 = SAR64rCL_EVEX |
| 38098 | { 4002, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 300, 0, 0x6980020037ULL }, // Inst #4002 = SAR64rCL |
| 38099 | { 4001, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 553, 0, 0x1010e8e0030037ULL }, // Inst #4001 = SAR64r1_NF_ND |
| 38100 | { 4000, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 300, 0, 0x100068e0030037ULL }, // Inst #4000 = SAR64r1_NF |
| 38101 | { 3999, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 553, 0, 0x10e8e0030037ULL }, // Inst #3999 = SAR64r1_ND |
| 38102 | { 3998, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 300, 0, 0xc0068e0030037ULL }, // Inst #3998 = SAR64r1_EVEX |
| 38103 | { 3997, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 300, 0, 0x6880020037ULL }, // Inst #3997 = SAR64r1 |
| 38104 | { 3996, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0070027ULL }, // Inst #3996 = SAR64mi_NF_ND |
| 38105 | { 3995, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0070027ULL }, // Inst #3995 = SAR64mi_NF |
| 38106 | { 3994, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070027ULL }, // Inst #3994 = SAR64mi_ND |
| 38107 | { 3993, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070027ULL }, // Inst #3993 = SAR64mi_EVEX |
| 38108 | { 3992, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060027ULL }, // Inst #3992 = SAR64mi |
| 38109 | { 3991, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 242, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0030027ULL }, // Inst #3991 = SAR64mCL_NF_ND |
| 38110 | { 3990, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0030027ULL }, // Inst #3990 = SAR64mCL_NF |
| 38111 | { 3989, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 242, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030027ULL }, // Inst #3989 = SAR64mCL_ND |
| 38112 | { 3988, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030027ULL }, // Inst #3988 = SAR64mCL_EVEX |
| 38113 | { 3987, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020027ULL }, // Inst #3987 = SAR64mCL |
| 38114 | { 3986, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0030027ULL }, // Inst #3986 = SAR64m1_NF_ND |
| 38115 | { 3985, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0030027ULL }, // Inst #3985 = SAR64m1_NF |
| 38116 | { 3984, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030027ULL }, // Inst #3984 = SAR64m1_ND |
| 38117 | { 3983, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030027ULL }, // Inst #3983 = SAR64m1_EVEX |
| 38118 | { 3982, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020027ULL }, // Inst #3982 = SAR64m1 |
| 38119 | { 3981, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 374, 0, 0x1010e0e0050037ULL }, // Inst #3981 = SAR32ri_NF_ND |
| 38120 | { 3980, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 158, 0, 0x100060e0050037ULL }, // Inst #3980 = SAR32ri_NF |
| 38121 | { 3979, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 374, 0, 0x10e0e0050037ULL }, // Inst #3979 = SAR32ri_ND |
| 38122 | { 3978, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 158, 0, 0xc0060e0050037ULL }, // Inst #3978 = SAR32ri_EVEX |
| 38123 | { 3977, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 158, 0, 0x6080040137ULL }, // Inst #3977 = SAR32ri |
| 38124 | { 3976, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 551, 0, 0x1010e9e0010037ULL }, // Inst #3976 = SAR32rCL_NF_ND |
| 38125 | { 3975, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 298, 0, 0x100069e0010037ULL }, // Inst #3975 = SAR32rCL_NF |
| 38126 | { 3974, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 551, 0, 0x10e9e0010037ULL }, // Inst #3974 = SAR32rCL_ND |
| 38127 | { 3973, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 298, 0, 0xc0069e0010037ULL }, // Inst #3973 = SAR32rCL_EVEX |
| 38128 | { 3972, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 298, 0, 0x6980000137ULL }, // Inst #3972 = SAR32rCL |
| 38129 | { 3971, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 551, 0, 0x1010e8e0010037ULL }, // Inst #3971 = SAR32r1_NF_ND |
| 38130 | { 3970, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 298, 0, 0x100068e0010037ULL }, // Inst #3970 = SAR32r1_NF |
| 38131 | { 3969, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 551, 0, 0x10e8e0010037ULL }, // Inst #3969 = SAR32r1_ND |
| 38132 | { 3968, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 298, 0, 0xc0068e0010037ULL }, // Inst #3968 = SAR32r1_EVEX |
| 38133 | { 3967, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 298, 0, 0x6880000137ULL }, // Inst #3967 = SAR32r1 |
| 38134 | { 3966, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050027ULL }, // Inst #3966 = SAR32mi_NF_ND |
| 38135 | { 3965, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050027ULL }, // Inst #3965 = SAR32mi_NF |
| 38136 | { 3964, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050027ULL }, // Inst #3964 = SAR32mi_ND |
| 38137 | { 3963, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050027ULL }, // Inst #3963 = SAR32mi_EVEX |
| 38138 | { 3962, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040127ULL }, // Inst #3962 = SAR32mi |
| 38139 | { 3961, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 236, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010027ULL }, // Inst #3961 = SAR32mCL_NF_ND |
| 38140 | { 3960, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010027ULL }, // Inst #3960 = SAR32mCL_NF |
| 38141 | { 3959, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 236, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010027ULL }, // Inst #3959 = SAR32mCL_ND |
| 38142 | { 3958, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010027ULL }, // Inst #3958 = SAR32mCL_EVEX |
| 38143 | { 3957, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000127ULL }, // Inst #3957 = SAR32mCL |
| 38144 | { 3956, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010027ULL }, // Inst #3956 = SAR32m1_NF_ND |
| 38145 | { 3955, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010027ULL }, // Inst #3955 = SAR32m1_NF |
| 38146 | { 3954, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010027ULL }, // Inst #3954 = SAR32m1_ND |
| 38147 | { 3953, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010027ULL }, // Inst #3953 = SAR32m1_EVEX |
| 38148 | { 3952, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000127ULL }, // Inst #3952 = SAR32m1 |
| 38149 | { 3951, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 340, 0, 0x1010e0e0050837ULL }, // Inst #3951 = SAR16ri_NF_ND |
| 38150 | { 3950, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 152, 0, 0x100060e0050837ULL }, // Inst #3950 = SAR16ri_NF |
| 38151 | { 3949, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 340, 0, 0x10e0e0050837ULL }, // Inst #3949 = SAR16ri_ND |
| 38152 | { 3948, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 152, 0, 0xc0060e0050837ULL }, // Inst #3948 = SAR16ri_EVEX |
| 38153 | { 3947, 3, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 152, 0, 0x60800400b7ULL }, // Inst #3947 = SAR16ri |
| 38154 | { 3946, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 547, 0, 0x1010e9e0010837ULL }, // Inst #3946 = SAR16rCL_NF_ND |
| 38155 | { 3945, 2, 1, 0, 314, 1, 0, X86ImpOpBase + 517, 573, 0, 0x100069e0010837ULL }, // Inst #3945 = SAR16rCL_NF |
| 38156 | { 3944, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 547, 0, 0x10e9e0010837ULL }, // Inst #3944 = SAR16rCL_ND |
| 38157 | { 3943, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 573, 0, 0xc0069e0010837ULL }, // Inst #3943 = SAR16rCL_EVEX |
| 38158 | { 3942, 2, 1, 0, 314, 1, 1, X86ImpOpBase + 515, 573, 0, 0x69800000b7ULL }, // Inst #3942 = SAR16rCL |
| 38159 | { 3941, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 547, 0, 0x1010e8e0010837ULL }, // Inst #3941 = SAR16r1_NF_ND |
| 38160 | { 3940, 2, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 573, 0, 0x100068e0010837ULL }, // Inst #3940 = SAR16r1_NF |
| 38161 | { 3939, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 547, 0, 0x10e8e0010837ULL }, // Inst #3939 = SAR16r1_ND |
| 38162 | { 3938, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 573, 0, 0xc0068e0010837ULL }, // Inst #3938 = SAR16r1_EVEX |
| 38163 | { 3937, 2, 1, 0, 301, 0, 1, X86ImpOpBase + 0, 573, 0, 0x68800000b7ULL }, // Inst #3937 = SAR16r1 |
| 38164 | { 3936, 7, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050827ULL }, // Inst #3936 = SAR16mi_NF_ND |
| 38165 | { 3935, 6, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050827ULL }, // Inst #3935 = SAR16mi_NF |
| 38166 | { 3934, 7, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050827ULL }, // Inst #3934 = SAR16mi_ND |
| 38167 | { 3933, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050827ULL }, // Inst #3933 = SAR16mi_EVEX |
| 38168 | { 3932, 6, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a7ULL }, // Inst #3932 = SAR16mi |
| 38169 | { 3931, 6, 1, 0, 612, 1, 0, X86ImpOpBase + 517, 567, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010827ULL }, // Inst #3931 = SAR16mCL_NF_ND |
| 38170 | { 3930, 5, 0, 0, 611, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010827ULL }, // Inst #3930 = SAR16mCL_NF |
| 38171 | { 3929, 6, 1, 0, 612, 1, 1, X86ImpOpBase + 515, 567, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010827ULL }, // Inst #3929 = SAR16mCL_ND |
| 38172 | { 3928, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010827ULL }, // Inst #3928 = SAR16mCL_EVEX |
| 38173 | { 3927, 5, 0, 0, 611, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a7ULL }, // Inst #3927 = SAR16mCL |
| 38174 | { 3926, 6, 1, 0, 610, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010827ULL }, // Inst #3926 = SAR16m1_NF_ND |
| 38175 | { 3925, 5, 0, 0, 609, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010827ULL }, // Inst #3925 = SAR16m1_NF |
| 38176 | { 3924, 6, 1, 0, 610, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010827ULL }, // Inst #3924 = SAR16m1_ND |
| 38177 | { 3923, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010827ULL }, // Inst #3923 = SAR16m1_EVEX |
| 38178 | { 3922, 5, 0, 0, 609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a7ULL }, // Inst #3922 = SAR16m1 |
| 38179 | { 3921, 0, 0, 0, 1491, 1, 1, X86ImpOpBase + 520, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00000001ULL }, // Inst #3921 = SALC |
| 38180 | { 3920, 0, 0, 0, 1159, 1, 1, X86ImpOpBase + 518, 1, 0, 0x4f00000001ULL }, // Inst #3920 = SAHF |
| 38181 | { 3919, 5, 0, 0, 8, 1, 1, X86ImpOpBase + 284, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80003025ULL }, // Inst #3919 = RSTORSSP |
| 38182 | { 3918, 3, 1, 0, 309, 0, 0, X86ImpOpBase + 0, 472, 0, 0x2908003029ULL }, // Inst #3918 = RSQRTSSr_Int |
| 38183 | { 3917, 2, 1, 0, 309, 0, 0, X86ImpOpBase + 0, 986, 0, 0x2908003029ULL }, // Inst #3917 = RSQRTSSr |
| 38184 | { 3916, 7, 1, 0, 308, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2908003019ULL }, // Inst #3916 = RSQRTSSm_Int |
| 38185 | { 3915, 6, 1, 0, 307, 0, 0, X86ImpOpBase + 0, 980, 0|(1ULL<<MCID::MayLoad), 0x2908003019ULL }, // Inst #3915 = RSQRTSSm |
| 38186 | { 3914, 2, 1, 0, 306, 0, 0, X86ImpOpBase + 0, 535, 0, 0x2908002029ULL }, // Inst #3914 = RSQRTPSr |
| 38187 | { 3913, 6, 1, 0, 305, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x2908002019ULL }, // Inst #3913 = RSQRTPSm |
| 38188 | { 3912, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5500002001ULL }, // Inst #3912 = RSM |
| 38189 | { 3911, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 563, 0|(1ULL<<MCID::MayRaiseFPException), 0x508046829ULL }, // Inst #3911 = ROUNDSSri_Int |
| 38190 | { 3910, 3, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 1431, 0|(1ULL<<MCID::MayRaiseFPException), 0x508046829ULL }, // Inst #3910 = ROUNDSSri |
| 38191 | { 3909, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 555, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x508046819ULL }, // Inst #3909 = ROUNDSSmi_Int |
| 38192 | { 3908, 7, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 1424, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x508046819ULL }, // Inst #3908 = ROUNDSSmi |
| 38193 | { 3907, 4, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 563, 0|(1ULL<<MCID::MayRaiseFPException), 0x590046829ULL }, // Inst #3907 = ROUNDSDri_Int |
| 38194 | { 3906, 3, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 1421, 0|(1ULL<<MCID::MayRaiseFPException), 0x590046829ULL }, // Inst #3906 = ROUNDSDri |
| 38195 | { 3905, 8, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 555, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x590046819ULL }, // Inst #3905 = ROUNDSDmi_Int |
| 38196 | { 3904, 7, 1, 0, 1837, 1, 0, X86ImpOpBase + 78, 1414, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x590046819ULL }, // Inst #3904 = ROUNDSDmi |
| 38197 | { 3903, 3, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 544, 0|(1ULL<<MCID::MayRaiseFPException), 0x408046829ULL }, // Inst #3903 = ROUNDPSri |
| 38198 | { 3902, 7, 1, 0, 1836, 1, 0, X86ImpOpBase + 78, 537, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x408046819ULL }, // Inst #3902 = ROUNDPSmi |
| 38199 | { 3901, 3, 1, 0, 1838, 1, 0, X86ImpOpBase + 78, 544, 0|(1ULL<<MCID::MayRaiseFPException), 0x490046829ULL }, // Inst #3901 = ROUNDPDri |
| 38200 | { 3900, 7, 1, 0, 1836, 1, 0, X86ImpOpBase + 78, 537, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x490046819ULL }, // Inst #3900 = ROUNDPDmi |
| 38201 | { 3899, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 405, 0, 0x7860067829ULL }, // Inst #3899 = RORX64ri_EVEX |
| 38202 | { 3898, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 405, 0, 0x7820067829ULL }, // Inst #3898 = RORX64ri |
| 38203 | { 3897, 7, 1, 0, 300, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x7860067819ULL }, // Inst #3897 = RORX64mi_EVEX |
| 38204 | { 3896, 7, 1, 0, 1435, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x7820067819ULL }, // Inst #3896 = RORX64mi |
| 38205 | { 3895, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 374, 0, 0x7860047829ULL }, // Inst #3895 = RORX32ri_EVEX |
| 38206 | { 3894, 3, 1, 0, 301, 0, 0, X86ImpOpBase + 0, 374, 0, 0x7820047829ULL }, // Inst #3894 = RORX32ri |
| 38207 | { 3893, 7, 1, 0, 300, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x7860047819ULL }, // Inst #3893 = RORX32mi_EVEX |
| 38208 | { 3892, 7, 1, 0, 1435, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x7820047819ULL }, // Inst #3892 = RORX32mi |
| 38209 | { 3891, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 445, 0, 0x1010e060050031ULL }, // Inst #3891 = ROR8ri_NF_ND |
| 38210 | { 3890, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 170, 0, 0x10006060050031ULL }, // Inst #3890 = ROR8ri_NF |
| 38211 | { 3889, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 445, 0, 0x10e060050031ULL }, // Inst #3889 = ROR8ri_ND |
| 38212 | { 3888, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 170, 0, 0xc006060050031ULL }, // Inst #3888 = ROR8ri_EVEX |
| 38213 | { 3887, 3, 1, 0, 1611, 0, 1, X86ImpOpBase + 0, 170, 0, 0x6000040031ULL }, // Inst #3887 = ROR8ri |
| 38214 | { 3886, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 925, 0, 0x1010e960010031ULL }, // Inst #3886 = ROR8rCL_NF_ND |
| 38215 | { 3885, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 1027, 0, 0x10006960010031ULL }, // Inst #3885 = ROR8rCL_NF |
| 38216 | { 3884, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 925, 0, 0x10e960010031ULL }, // Inst #3884 = ROR8rCL_ND |
| 38217 | { 3883, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 1027, 0, 0xc006960010031ULL }, // Inst #3883 = ROR8rCL_EVEX |
| 38218 | { 3882, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 1027, 0, 0x6900000031ULL }, // Inst #3882 = ROR8rCL |
| 38219 | { 3881, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 925, 0, 0x1010e860010031ULL }, // Inst #3881 = ROR8r1_NF_ND |
| 38220 | { 3880, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 1027, 0, 0x10006860010031ULL }, // Inst #3880 = ROR8r1_NF |
| 38221 | { 3879, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 925, 0, 0x10e860010031ULL }, // Inst #3879 = ROR8r1_ND |
| 38222 | { 3878, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 1027, 0, 0xc006860010031ULL }, // Inst #3878 = ROR8r1_EVEX |
| 38223 | { 3877, 2, 1, 0, 866, 0, 1, X86ImpOpBase + 0, 1027, 0, 0x6800000031ULL }, // Inst #3877 = ROR8r1 |
| 38224 | { 3876, 7, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x1010e060050021ULL }, // Inst #3876 = ROR8mi_NF_ND |
| 38225 | { 3875, 6, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006060050021ULL }, // Inst #3875 = ROR8mi_NF |
| 38226 | { 3874, 7, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x10e060050021ULL }, // Inst #3874 = ROR8mi_ND |
| 38227 | { 3873, 6, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050021ULL }, // Inst #3873 = ROR8mi_EVEX |
| 38228 | { 3872, 6, 0, 0, 1612, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040021ULL }, // Inst #3872 = ROR8mi |
| 38229 | { 3871, 6, 1, 0, 796, 1, 0, X86ImpOpBase + 517, 919, 0|(1ULL<<MCID::MayLoad), 0x1010e960010021ULL }, // Inst #3871 = ROR8mCL_NF_ND |
| 38230 | { 3870, 5, 0, 0, 795, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006960010021ULL }, // Inst #3870 = ROR8mCL_NF |
| 38231 | { 3869, 6, 1, 0, 796, 1, 1, X86ImpOpBase + 515, 919, 0|(1ULL<<MCID::MayLoad), 0x10e960010021ULL }, // Inst #3869 = ROR8mCL_ND |
| 38232 | { 3868, 5, 0, 0, 795, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010021ULL }, // Inst #3868 = ROR8mCL_EVEX |
| 38233 | { 3867, 5, 0, 0, 1613, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000021ULL }, // Inst #3867 = ROR8mCL |
| 38234 | { 3866, 6, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x1010e860010021ULL }, // Inst #3866 = ROR8m1_NF_ND |
| 38235 | { 3865, 5, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006860010021ULL }, // Inst #3865 = ROR8m1_NF |
| 38236 | { 3864, 6, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x10e860010021ULL }, // Inst #3864 = ROR8m1_ND |
| 38237 | { 3863, 5, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010021ULL }, // Inst #3863 = ROR8m1_EVEX |
| 38238 | { 3862, 5, 0, 0, 1612, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000021ULL }, // Inst #3862 = ROR8m1 |
| 38239 | { 3861, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 405, 0, 0x1010e0e0070031ULL }, // Inst #3861 = ROR64ri_NF_ND |
| 38240 | { 3860, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 164, 0, 0x100060e0070031ULL }, // Inst #3860 = ROR64ri_NF |
| 38241 | { 3859, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 405, 0, 0x10e0e0070031ULL }, // Inst #3859 = ROR64ri_ND |
| 38242 | { 3858, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 164, 0, 0xc0060e0070031ULL }, // Inst #3858 = ROR64ri_EVEX |
| 38243 | { 3857, 3, 1, 0, 1611, 0, 1, X86ImpOpBase + 0, 164, 0, 0x6080060031ULL }, // Inst #3857 = ROR64ri |
| 38244 | { 3856, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 553, 0, 0x1010e9e0030031ULL }, // Inst #3856 = ROR64rCL_NF_ND |
| 38245 | { 3855, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 300, 0, 0x100069e0030031ULL }, // Inst #3855 = ROR64rCL_NF |
| 38246 | { 3854, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 553, 0, 0x10e9e0030031ULL }, // Inst #3854 = ROR64rCL_ND |
| 38247 | { 3853, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 300, 0, 0xc0069e0030031ULL }, // Inst #3853 = ROR64rCL_EVEX |
| 38248 | { 3852, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 300, 0, 0x6980020031ULL }, // Inst #3852 = ROR64rCL |
| 38249 | { 3851, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 553, 0, 0x1010e8e0030031ULL }, // Inst #3851 = ROR64r1_NF_ND |
| 38250 | { 3850, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 300, 0, 0x100068e0030031ULL }, // Inst #3850 = ROR64r1_NF |
| 38251 | { 3849, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 553, 0, 0x10e8e0030031ULL }, // Inst #3849 = ROR64r1_ND |
| 38252 | { 3848, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 300, 0, 0xc0068e0030031ULL }, // Inst #3848 = ROR64r1_EVEX |
| 38253 | { 3847, 2, 1, 0, 866, 0, 1, X86ImpOpBase + 0, 300, 0, 0x6880020031ULL }, // Inst #3847 = ROR64r1 |
| 38254 | { 3846, 7, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0070021ULL }, // Inst #3846 = ROR64mi_NF_ND |
| 38255 | { 3845, 6, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0070021ULL }, // Inst #3845 = ROR64mi_NF |
| 38256 | { 3844, 7, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070021ULL }, // Inst #3844 = ROR64mi_ND |
| 38257 | { 3843, 6, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070021ULL }, // Inst #3843 = ROR64mi_EVEX |
| 38258 | { 3842, 6, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060021ULL }, // Inst #3842 = ROR64mi |
| 38259 | { 3841, 6, 1, 0, 796, 1, 0, X86ImpOpBase + 517, 242, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0030021ULL }, // Inst #3841 = ROR64mCL_NF_ND |
| 38260 | { 3840, 5, 0, 0, 795, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0030021ULL }, // Inst #3840 = ROR64mCL_NF |
| 38261 | { 3839, 6, 1, 0, 796, 1, 1, X86ImpOpBase + 515, 242, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030021ULL }, // Inst #3839 = ROR64mCL_ND |
| 38262 | { 3838, 5, 0, 0, 795, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030021ULL }, // Inst #3838 = ROR64mCL_EVEX |
| 38263 | { 3837, 5, 0, 0, 1610, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020021ULL }, // Inst #3837 = ROR64mCL |
| 38264 | { 3836, 6, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0030021ULL }, // Inst #3836 = ROR64m1_NF_ND |
| 38265 | { 3835, 5, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0030021ULL }, // Inst #3835 = ROR64m1_NF |
| 38266 | { 3834, 6, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030021ULL }, // Inst #3834 = ROR64m1_ND |
| 38267 | { 3833, 5, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030021ULL }, // Inst #3833 = ROR64m1_EVEX |
| 38268 | { 3832, 5, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020021ULL }, // Inst #3832 = ROR64m1 |
| 38269 | { 3831, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 374, 0, 0x1010e0e0050031ULL }, // Inst #3831 = ROR32ri_NF_ND |
| 38270 | { 3830, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 158, 0, 0x100060e0050031ULL }, // Inst #3830 = ROR32ri_NF |
| 38271 | { 3829, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 374, 0, 0x10e0e0050031ULL }, // Inst #3829 = ROR32ri_ND |
| 38272 | { 3828, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 158, 0, 0xc0060e0050031ULL }, // Inst #3828 = ROR32ri_EVEX |
| 38273 | { 3827, 3, 1, 0, 1611, 0, 1, X86ImpOpBase + 0, 158, 0, 0x6080040131ULL }, // Inst #3827 = ROR32ri |
| 38274 | { 3826, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 551, 0, 0x1010e9e0010031ULL }, // Inst #3826 = ROR32rCL_NF_ND |
| 38275 | { 3825, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 298, 0, 0x100069e0010031ULL }, // Inst #3825 = ROR32rCL_NF |
| 38276 | { 3824, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 551, 0, 0x10e9e0010031ULL }, // Inst #3824 = ROR32rCL_ND |
| 38277 | { 3823, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 298, 0, 0xc0069e0010031ULL }, // Inst #3823 = ROR32rCL_EVEX |
| 38278 | { 3822, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 298, 0, 0x6980000131ULL }, // Inst #3822 = ROR32rCL |
| 38279 | { 3821, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 551, 0, 0x1010e8e0010031ULL }, // Inst #3821 = ROR32r1_NF_ND |
| 38280 | { 3820, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 298, 0, 0x100068e0010031ULL }, // Inst #3820 = ROR32r1_NF |
| 38281 | { 3819, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 551, 0, 0x10e8e0010031ULL }, // Inst #3819 = ROR32r1_ND |
| 38282 | { 3818, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 298, 0, 0xc0068e0010031ULL }, // Inst #3818 = ROR32r1_EVEX |
| 38283 | { 3817, 2, 1, 0, 866, 0, 1, X86ImpOpBase + 0, 298, 0, 0x6880000131ULL }, // Inst #3817 = ROR32r1 |
| 38284 | { 3816, 7, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050021ULL }, // Inst #3816 = ROR32mi_NF_ND |
| 38285 | { 3815, 6, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050021ULL }, // Inst #3815 = ROR32mi_NF |
| 38286 | { 3814, 7, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050021ULL }, // Inst #3814 = ROR32mi_ND |
| 38287 | { 3813, 6, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050021ULL }, // Inst #3813 = ROR32mi_EVEX |
| 38288 | { 3812, 6, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040121ULL }, // Inst #3812 = ROR32mi |
| 38289 | { 3811, 6, 1, 0, 796, 1, 0, X86ImpOpBase + 517, 236, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010021ULL }, // Inst #3811 = ROR32mCL_NF_ND |
| 38290 | { 3810, 5, 0, 0, 795, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010021ULL }, // Inst #3810 = ROR32mCL_NF |
| 38291 | { 3809, 6, 1, 0, 796, 1, 1, X86ImpOpBase + 515, 236, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010021ULL }, // Inst #3809 = ROR32mCL_ND |
| 38292 | { 3808, 5, 0, 0, 795, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010021ULL }, // Inst #3808 = ROR32mCL_EVEX |
| 38293 | { 3807, 5, 0, 0, 1610, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000121ULL }, // Inst #3807 = ROR32mCL |
| 38294 | { 3806, 6, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010021ULL }, // Inst #3806 = ROR32m1_NF_ND |
| 38295 | { 3805, 5, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010021ULL }, // Inst #3805 = ROR32m1_NF |
| 38296 | { 3804, 6, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010021ULL }, // Inst #3804 = ROR32m1_ND |
| 38297 | { 3803, 5, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010021ULL }, // Inst #3803 = ROR32m1_EVEX |
| 38298 | { 3802, 5, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000121ULL }, // Inst #3802 = ROR32m1 |
| 38299 | { 3801, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 340, 0, 0x1010e0e0050831ULL }, // Inst #3801 = ROR16ri_NF_ND |
| 38300 | { 3800, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 152, 0, 0x100060e0050831ULL }, // Inst #3800 = ROR16ri_NF |
| 38301 | { 3799, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 340, 0, 0x10e0e0050831ULL }, // Inst #3799 = ROR16ri_ND |
| 38302 | { 3798, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 152, 0, 0xc0060e0050831ULL }, // Inst #3798 = ROR16ri_EVEX |
| 38303 | { 3797, 3, 1, 0, 1611, 0, 1, X86ImpOpBase + 0, 152, 0, 0x60800400b1ULL }, // Inst #3797 = ROR16ri |
| 38304 | { 3796, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 547, 0, 0x1010e9e0010831ULL }, // Inst #3796 = ROR16rCL_NF_ND |
| 38305 | { 3795, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 573, 0, 0x100069e0010831ULL }, // Inst #3795 = ROR16rCL_NF |
| 38306 | { 3794, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 547, 0, 0x10e9e0010831ULL }, // Inst #3794 = ROR16rCL_ND |
| 38307 | { 3793, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 573, 0, 0xc0069e0010831ULL }, // Inst #3793 = ROR16rCL_EVEX |
| 38308 | { 3792, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 573, 0, 0x69800000b1ULL }, // Inst #3792 = ROR16rCL |
| 38309 | { 3791, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 547, 0, 0x1010e8e0010831ULL }, // Inst #3791 = ROR16r1_NF_ND |
| 38310 | { 3790, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 573, 0, 0x100068e0010831ULL }, // Inst #3790 = ROR16r1_NF |
| 38311 | { 3789, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 547, 0, 0x10e8e0010831ULL }, // Inst #3789 = ROR16r1_ND |
| 38312 | { 3788, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 573, 0, 0xc0068e0010831ULL }, // Inst #3788 = ROR16r1_EVEX |
| 38313 | { 3787, 2, 1, 0, 866, 0, 1, X86ImpOpBase + 0, 573, 0, 0x68800000b1ULL }, // Inst #3787 = ROR16r1 |
| 38314 | { 3786, 7, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050821ULL }, // Inst #3786 = ROR16mi_NF_ND |
| 38315 | { 3785, 6, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050821ULL }, // Inst #3785 = ROR16mi_NF |
| 38316 | { 3784, 7, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050821ULL }, // Inst #3784 = ROR16mi_ND |
| 38317 | { 3783, 6, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050821ULL }, // Inst #3783 = ROR16mi_EVEX |
| 38318 | { 3782, 6, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a1ULL }, // Inst #3782 = ROR16mi |
| 38319 | { 3781, 6, 1, 0, 796, 1, 0, X86ImpOpBase + 517, 567, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010821ULL }, // Inst #3781 = ROR16mCL_NF_ND |
| 38320 | { 3780, 5, 0, 0, 795, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010821ULL }, // Inst #3780 = ROR16mCL_NF |
| 38321 | { 3779, 6, 1, 0, 796, 1, 1, X86ImpOpBase + 515, 567, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010821ULL }, // Inst #3779 = ROR16mCL_ND |
| 38322 | { 3778, 5, 0, 0, 795, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010821ULL }, // Inst #3778 = ROR16mCL_EVEX |
| 38323 | { 3777, 5, 0, 0, 1610, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a1ULL }, // Inst #3777 = ROR16mCL |
| 38324 | { 3776, 6, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010821ULL }, // Inst #3776 = ROR16m1_NF_ND |
| 38325 | { 3775, 5, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010821ULL }, // Inst #3775 = ROR16m1_NF |
| 38326 | { 3774, 6, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010821ULL }, // Inst #3774 = ROR16m1_ND |
| 38327 | { 3773, 5, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010821ULL }, // Inst #3773 = ROR16m1_EVEX |
| 38328 | { 3772, 5, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a1ULL }, // Inst #3772 = ROR16m1 |
| 38329 | { 3771, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 445, 0, 0x1010e060050030ULL }, // Inst #3771 = ROL8ri_NF_ND |
| 38330 | { 3770, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 170, 0, 0x10006060050030ULL }, // Inst #3770 = ROL8ri_NF |
| 38331 | { 3769, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 445, 0, 0x10e060050030ULL }, // Inst #3769 = ROL8ri_ND |
| 38332 | { 3768, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 170, 0, 0xc006060050030ULL }, // Inst #3768 = ROL8ri_EVEX |
| 38333 | { 3767, 3, 1, 0, 1611, 0, 1, X86ImpOpBase + 0, 170, 0, 0x6000040030ULL }, // Inst #3767 = ROL8ri |
| 38334 | { 3766, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 925, 0, 0x1010e960010030ULL }, // Inst #3766 = ROL8rCL_NF_ND |
| 38335 | { 3765, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 1027, 0, 0x10006960010030ULL }, // Inst #3765 = ROL8rCL_NF |
| 38336 | { 3764, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 925, 0, 0x10e960010030ULL }, // Inst #3764 = ROL8rCL_ND |
| 38337 | { 3763, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 1027, 0, 0xc006960010030ULL }, // Inst #3763 = ROL8rCL_EVEX |
| 38338 | { 3762, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 1027, 0, 0x6900000030ULL }, // Inst #3762 = ROL8rCL |
| 38339 | { 3761, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 925, 0, 0x1010e860010030ULL }, // Inst #3761 = ROL8r1_NF_ND |
| 38340 | { 3760, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 1027, 0, 0x10006860010030ULL }, // Inst #3760 = ROL8r1_NF |
| 38341 | { 3759, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 925, 0, 0x10e860010030ULL }, // Inst #3759 = ROL8r1_ND |
| 38342 | { 3758, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 1027, 0, 0xc006860010030ULL }, // Inst #3758 = ROL8r1_EVEX |
| 38343 | { 3757, 2, 1, 0, 866, 0, 1, X86ImpOpBase + 0, 1027, 0, 0x6800000030ULL }, // Inst #3757 = ROL8r1 |
| 38344 | { 3756, 7, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x1010e060050020ULL }, // Inst #3756 = ROL8mi_NF_ND |
| 38345 | { 3755, 6, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006060050020ULL }, // Inst #3755 = ROL8mi_NF |
| 38346 | { 3754, 7, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x10e060050020ULL }, // Inst #3754 = ROL8mi_ND |
| 38347 | { 3753, 6, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050020ULL }, // Inst #3753 = ROL8mi_EVEX |
| 38348 | { 3752, 6, 0, 0, 1612, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040020ULL }, // Inst #3752 = ROL8mi |
| 38349 | { 3751, 6, 1, 0, 796, 1, 0, X86ImpOpBase + 517, 919, 0|(1ULL<<MCID::MayLoad), 0x1010e960010020ULL }, // Inst #3751 = ROL8mCL_NF_ND |
| 38350 | { 3750, 5, 0, 0, 795, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006960010020ULL }, // Inst #3750 = ROL8mCL_NF |
| 38351 | { 3749, 6, 1, 0, 796, 1, 1, X86ImpOpBase + 515, 919, 0|(1ULL<<MCID::MayLoad), 0x10e960010020ULL }, // Inst #3749 = ROL8mCL_ND |
| 38352 | { 3748, 5, 0, 0, 795, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010020ULL }, // Inst #3748 = ROL8mCL_EVEX |
| 38353 | { 3747, 5, 0, 0, 1613, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000020ULL }, // Inst #3747 = ROL8mCL |
| 38354 | { 3746, 6, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x1010e860010020ULL }, // Inst #3746 = ROL8m1_NF_ND |
| 38355 | { 3745, 5, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10006860010020ULL }, // Inst #3745 = ROL8m1_NF |
| 38356 | { 3744, 6, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x10e860010020ULL }, // Inst #3744 = ROL8m1_ND |
| 38357 | { 3743, 5, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010020ULL }, // Inst #3743 = ROL8m1_EVEX |
| 38358 | { 3742, 5, 0, 0, 1612, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000020ULL }, // Inst #3742 = ROL8m1 |
| 38359 | { 3741, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 405, 0, 0x1010e0e0070030ULL }, // Inst #3741 = ROL64ri_NF_ND |
| 38360 | { 3740, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 164, 0, 0x100060e0070030ULL }, // Inst #3740 = ROL64ri_NF |
| 38361 | { 3739, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 405, 0, 0x10e0e0070030ULL }, // Inst #3739 = ROL64ri_ND |
| 38362 | { 3738, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 164, 0, 0xc0060e0070030ULL }, // Inst #3738 = ROL64ri_EVEX |
| 38363 | { 3737, 3, 1, 0, 1611, 0, 1, X86ImpOpBase + 0, 164, 0, 0x6080060030ULL }, // Inst #3737 = ROL64ri |
| 38364 | { 3736, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 553, 0, 0x1010e9e0030030ULL }, // Inst #3736 = ROL64rCL_NF_ND |
| 38365 | { 3735, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 300, 0, 0x100069e0030030ULL }, // Inst #3735 = ROL64rCL_NF |
| 38366 | { 3734, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 553, 0, 0x10e9e0030030ULL }, // Inst #3734 = ROL64rCL_ND |
| 38367 | { 3733, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 300, 0, 0xc0069e0030030ULL }, // Inst #3733 = ROL64rCL_EVEX |
| 38368 | { 3732, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 300, 0, 0x6980020030ULL }, // Inst #3732 = ROL64rCL |
| 38369 | { 3731, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 553, 0, 0x1010e8e0030030ULL }, // Inst #3731 = ROL64r1_NF_ND |
| 38370 | { 3730, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 300, 0, 0x100068e0030030ULL }, // Inst #3730 = ROL64r1_NF |
| 38371 | { 3729, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 553, 0, 0x10e8e0030030ULL }, // Inst #3729 = ROL64r1_ND |
| 38372 | { 3728, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 300, 0, 0xc0068e0030030ULL }, // Inst #3728 = ROL64r1_EVEX |
| 38373 | { 3727, 2, 1, 0, 866, 0, 1, X86ImpOpBase + 0, 300, 0, 0x6880020030ULL }, // Inst #3727 = ROL64r1 |
| 38374 | { 3726, 7, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0070020ULL }, // Inst #3726 = ROL64mi_NF_ND |
| 38375 | { 3725, 6, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0070020ULL }, // Inst #3725 = ROL64mi_NF |
| 38376 | { 3724, 7, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070020ULL }, // Inst #3724 = ROL64mi_ND |
| 38377 | { 3723, 6, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070020ULL }, // Inst #3723 = ROL64mi_EVEX |
| 38378 | { 3722, 6, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060020ULL }, // Inst #3722 = ROL64mi |
| 38379 | { 3721, 6, 1, 0, 796, 1, 0, X86ImpOpBase + 517, 242, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0030020ULL }, // Inst #3721 = ROL64mCL_NF_ND |
| 38380 | { 3720, 5, 0, 0, 795, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0030020ULL }, // Inst #3720 = ROL64mCL_NF |
| 38381 | { 3719, 6, 1, 0, 796, 1, 1, X86ImpOpBase + 515, 242, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030020ULL }, // Inst #3719 = ROL64mCL_ND |
| 38382 | { 3718, 5, 0, 0, 795, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030020ULL }, // Inst #3718 = ROL64mCL_EVEX |
| 38383 | { 3717, 5, 0, 0, 1610, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020020ULL }, // Inst #3717 = ROL64mCL |
| 38384 | { 3716, 6, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0030020ULL }, // Inst #3716 = ROL64m1_NF_ND |
| 38385 | { 3715, 5, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0030020ULL }, // Inst #3715 = ROL64m1_NF |
| 38386 | { 3714, 6, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030020ULL }, // Inst #3714 = ROL64m1_ND |
| 38387 | { 3713, 5, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030020ULL }, // Inst #3713 = ROL64m1_EVEX |
| 38388 | { 3712, 5, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020020ULL }, // Inst #3712 = ROL64m1 |
| 38389 | { 3711, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 374, 0, 0x1010e0e0050030ULL }, // Inst #3711 = ROL32ri_NF_ND |
| 38390 | { 3710, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 158, 0, 0x100060e0050030ULL }, // Inst #3710 = ROL32ri_NF |
| 38391 | { 3709, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 374, 0, 0x10e0e0050030ULL }, // Inst #3709 = ROL32ri_ND |
| 38392 | { 3708, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 158, 0, 0xc0060e0050030ULL }, // Inst #3708 = ROL32ri_EVEX |
| 38393 | { 3707, 3, 1, 0, 1611, 0, 1, X86ImpOpBase + 0, 158, 0, 0x6080040130ULL }, // Inst #3707 = ROL32ri |
| 38394 | { 3706, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 551, 0, 0x1010e9e0010030ULL }, // Inst #3706 = ROL32rCL_NF_ND |
| 38395 | { 3705, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 298, 0, 0x100069e0010030ULL }, // Inst #3705 = ROL32rCL_NF |
| 38396 | { 3704, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 551, 0, 0x10e9e0010030ULL }, // Inst #3704 = ROL32rCL_ND |
| 38397 | { 3703, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 298, 0, 0xc0069e0010030ULL }, // Inst #3703 = ROL32rCL_EVEX |
| 38398 | { 3702, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 298, 0, 0x6980000130ULL }, // Inst #3702 = ROL32rCL |
| 38399 | { 3701, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 551, 0, 0x1010e8e0010030ULL }, // Inst #3701 = ROL32r1_NF_ND |
| 38400 | { 3700, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 298, 0, 0x100068e0010030ULL }, // Inst #3700 = ROL32r1_NF |
| 38401 | { 3699, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 551, 0, 0x10e8e0010030ULL }, // Inst #3699 = ROL32r1_ND |
| 38402 | { 3698, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 298, 0, 0xc0068e0010030ULL }, // Inst #3698 = ROL32r1_EVEX |
| 38403 | { 3697, 2, 1, 0, 866, 0, 1, X86ImpOpBase + 0, 298, 0, 0x6880000130ULL }, // Inst #3697 = ROL32r1 |
| 38404 | { 3696, 7, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050020ULL }, // Inst #3696 = ROL32mi_NF_ND |
| 38405 | { 3695, 6, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050020ULL }, // Inst #3695 = ROL32mi_NF |
| 38406 | { 3694, 7, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050020ULL }, // Inst #3694 = ROL32mi_ND |
| 38407 | { 3693, 6, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050020ULL }, // Inst #3693 = ROL32mi_EVEX |
| 38408 | { 3692, 6, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040120ULL }, // Inst #3692 = ROL32mi |
| 38409 | { 3691, 6, 1, 0, 796, 1, 0, X86ImpOpBase + 517, 236, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010020ULL }, // Inst #3691 = ROL32mCL_NF_ND |
| 38410 | { 3690, 5, 0, 0, 795, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010020ULL }, // Inst #3690 = ROL32mCL_NF |
| 38411 | { 3689, 6, 1, 0, 796, 1, 1, X86ImpOpBase + 515, 236, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010020ULL }, // Inst #3689 = ROL32mCL_ND |
| 38412 | { 3688, 5, 0, 0, 795, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010020ULL }, // Inst #3688 = ROL32mCL_EVEX |
| 38413 | { 3687, 5, 0, 0, 1610, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000120ULL }, // Inst #3687 = ROL32mCL |
| 38414 | { 3686, 6, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010020ULL }, // Inst #3686 = ROL32m1_NF_ND |
| 38415 | { 3685, 5, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010020ULL }, // Inst #3685 = ROL32m1_NF |
| 38416 | { 3684, 6, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010020ULL }, // Inst #3684 = ROL32m1_ND |
| 38417 | { 3683, 5, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010020ULL }, // Inst #3683 = ROL32m1_EVEX |
| 38418 | { 3682, 5, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000120ULL }, // Inst #3682 = ROL32m1 |
| 38419 | { 3681, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 340, 0, 0x1010e0e0050830ULL }, // Inst #3681 = ROL16ri_NF_ND |
| 38420 | { 3680, 3, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 152, 0, 0x100060e0050830ULL }, // Inst #3680 = ROL16ri_NF |
| 38421 | { 3679, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 340, 0, 0x10e0e0050830ULL }, // Inst #3679 = ROL16ri_ND |
| 38422 | { 3678, 3, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 152, 0, 0xc0060e0050830ULL }, // Inst #3678 = ROL16ri_EVEX |
| 38423 | { 3677, 3, 1, 0, 1611, 0, 1, X86ImpOpBase + 0, 152, 0, 0x60800400b0ULL }, // Inst #3677 = ROL16ri |
| 38424 | { 3676, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 547, 0, 0x1010e9e0010830ULL }, // Inst #3676 = ROL16rCL_NF_ND |
| 38425 | { 3675, 2, 1, 0, 294, 1, 0, X86ImpOpBase + 517, 573, 0, 0x100069e0010830ULL }, // Inst #3675 = ROL16rCL_NF |
| 38426 | { 3674, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 547, 0, 0x10e9e0010830ULL }, // Inst #3674 = ROL16rCL_ND |
| 38427 | { 3673, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 573, 0, 0xc0069e0010830ULL }, // Inst #3673 = ROL16rCL_EVEX |
| 38428 | { 3672, 2, 1, 0, 294, 1, 1, X86ImpOpBase + 515, 573, 0, 0x69800000b0ULL }, // Inst #3672 = ROL16rCL |
| 38429 | { 3671, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 547, 0, 0x1010e8e0010830ULL }, // Inst #3671 = ROL16r1_NF_ND |
| 38430 | { 3670, 2, 1, 0, 293, 0, 0, X86ImpOpBase + 0, 573, 0, 0x100068e0010830ULL }, // Inst #3670 = ROL16r1_NF |
| 38431 | { 3669, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 547, 0, 0x10e8e0010830ULL }, // Inst #3669 = ROL16r1_ND |
| 38432 | { 3668, 2, 1, 0, 293, 0, 1, X86ImpOpBase + 0, 573, 0, 0xc0068e0010830ULL }, // Inst #3668 = ROL16r1_EVEX |
| 38433 | { 3667, 2, 1, 0, 866, 0, 1, X86ImpOpBase + 0, 573, 0, 0x68800000b0ULL }, // Inst #3667 = ROL16r1 |
| 38434 | { 3666, 7, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010e0e0050820ULL }, // Inst #3666 = ROL16mi_NF_ND |
| 38435 | { 3665, 6, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100060e0050820ULL }, // Inst #3665 = ROL16mi_NF |
| 38436 | { 3664, 7, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050820ULL }, // Inst #3664 = ROL16mi_ND |
| 38437 | { 3663, 6, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050820ULL }, // Inst #3663 = ROL16mi_EVEX |
| 38438 | { 3662, 6, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a0ULL }, // Inst #3662 = ROL16mi |
| 38439 | { 3661, 6, 1, 0, 796, 1, 0, X86ImpOpBase + 517, 567, 0|(1ULL<<MCID::MayLoad), 0x1010e9e0010820ULL }, // Inst #3661 = ROL16mCL_NF_ND |
| 38440 | { 3660, 5, 0, 0, 795, 1, 0, X86ImpOpBase + 517, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100069e0010820ULL }, // Inst #3660 = ROL16mCL_NF |
| 38441 | { 3659, 6, 1, 0, 796, 1, 1, X86ImpOpBase + 515, 567, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010820ULL }, // Inst #3659 = ROL16mCL_ND |
| 38442 | { 3658, 5, 0, 0, 795, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010820ULL }, // Inst #3658 = ROL16mCL_EVEX |
| 38443 | { 3657, 5, 0, 0, 1610, 1, 1, X86ImpOpBase + 515, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a0ULL }, // Inst #3657 = ROL16mCL |
| 38444 | { 3656, 6, 1, 0, 791, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x1010e8e0010820ULL }, // Inst #3656 = ROL16m1_NF_ND |
| 38445 | { 3655, 5, 0, 0, 790, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100068e0010820ULL }, // Inst #3655 = ROL16m1_NF |
| 38446 | { 3654, 6, 1, 0, 791, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010820ULL }, // Inst #3654 = ROL16m1_ND |
| 38447 | { 3653, 5, 0, 0, 790, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010820ULL }, // Inst #3653 = ROL16m1_EVEX |
| 38448 | { 3652, 5, 0, 0, 1609, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a0ULL }, // Inst #3652 = ROL16m1 |
| 38449 | { 3651, 0, 0, 0, 8, 2, 2, X86ImpOpBase + 511, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000387eULL }, // Inst #3651 = RMPUPDATE |
| 38450 | { 3650, 0, 0, 0, 8, 2, 4, X86ImpOpBase + 505, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000307dULL }, // Inst #3650 = RMPQUERY |
| 38451 | { 3649, 0, 0, 0, 8, 3, 2, X86ImpOpBase + 433, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000307eULL }, // Inst #3649 = RMPADJUST |
| 38452 | { 3648, 0, 0, 0, 1608, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x240000000aULL }, // Inst #3648 = REX64_PREFIX |
| 38453 | { 3647, 1, 0, 0, 821, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x6101d00101ULL }, // Inst #3647 = RETI64 |
| 38454 | { 3646, 1, 0, 0, 821, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x6101d00101ULL }, // Inst #3646 = RETI32 |
| 38455 | { 3645, 1, 0, 0, 821, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6101d00081ULL }, // Inst #3645 = RETI16 |
| 38456 | { 3644, 0, 0, 0, 741, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x6181c00101ULL }, // Inst #3644 = RET64 |
| 38457 | { 3643, 0, 0, 0, 865, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x6181c00101ULL }, // Inst #3643 = RET32 |
| 38458 | { 3642, 0, 0, 0, 1434, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6181c00081ULL }, // Inst #3642 = RET16 |
| 38459 | { 3641, 1, 0, 0, 722, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x1c00000ULL }, // Inst #3641 = RET |
| 38460 | { 3640, 0, 0, 0, 17, 3, 2, X86ImpOpBase + 500, 1, 0|(1ULL<<MCID::MayStore), 0x5584000681ULL }, // Inst #3640 = REP_STOSW_64 |
| 38461 | { 3639, 0, 0, 0, 17, 3, 2, X86ImpOpBase + 495, 1, 0|(1ULL<<MCID::MayStore), 0x5584000481ULL }, // Inst #3639 = REP_STOSW_32 |
| 38462 | { 3638, 0, 0, 0, 17, 3, 2, X86ImpOpBase + 485, 1, 0|(1ULL<<MCID::MayStore), 0x5584020601ULL }, // Inst #3638 = REP_STOSQ_64 |
| 38463 | { 3637, 0, 0, 0, 17, 3, 2, X86ImpOpBase + 490, 1, 0|(1ULL<<MCID::MayStore), 0x5584020401ULL }, // Inst #3637 = REP_STOSQ_32 |
| 38464 | { 3636, 0, 0, 0, 17, 3, 2, X86ImpOpBase + 485, 1, 0|(1ULL<<MCID::MayStore), 0x5584000701ULL }, // Inst #3636 = REP_STOSD_64 |
| 38465 | { 3635, 0, 0, 0, 17, 3, 2, X86ImpOpBase + 480, 1, 0|(1ULL<<MCID::MayStore), 0x5584000501ULL }, // Inst #3635 = REP_STOSD_32 |
| 38466 | { 3634, 0, 0, 0, 17, 3, 2, X86ImpOpBase + 475, 1, 0|(1ULL<<MCID::MayStore), 0x5504000601ULL }, // Inst #3634 = REP_STOSB_64 |
| 38467 | { 3633, 0, 0, 0, 17, 3, 2, X86ImpOpBase + 470, 1, 0|(1ULL<<MCID::MayStore), 0x5504000401ULL }, // Inst #3633 = REP_STOSB_32 |
| 38468 | { 3632, 0, 0, 0, 17, 2, 1, X86ImpOpBase + 455, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x798000000aULL }, // Inst #3632 = REP_PREFIX |
| 38469 | { 3631, 0, 0, 0, 17, 3, 3, X86ImpOpBase + 464, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000681ULL }, // Inst #3631 = REP_MOVSW_64 |
| 38470 | { 3630, 0, 0, 0, 17, 3, 3, X86ImpOpBase + 458, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000481ULL }, // Inst #3630 = REP_MOVSW_32 |
| 38471 | { 3629, 0, 0, 0, 17, 3, 3, X86ImpOpBase + 464, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284020601ULL }, // Inst #3629 = REP_MOVSQ_64 |
| 38472 | { 3628, 0, 0, 0, 17, 3, 3, X86ImpOpBase + 458, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284020401ULL }, // Inst #3628 = REP_MOVSQ_32 |
| 38473 | { 3627, 0, 0, 0, 17, 3, 3, X86ImpOpBase + 464, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000701ULL }, // Inst #3627 = REP_MOVSD_64 |
| 38474 | { 3626, 0, 0, 0, 17, 3, 3, X86ImpOpBase + 458, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000501ULL }, // Inst #3626 = REP_MOVSD_32 |
| 38475 | { 3625, 0, 0, 0, 17, 3, 3, X86ImpOpBase + 464, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5204000601ULL }, // Inst #3625 = REP_MOVSB_64 |
| 38476 | { 3624, 0, 0, 0, 17, 3, 3, X86ImpOpBase + 458, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5204000401ULL }, // Inst #3624 = REP_MOVSB_32 |
| 38477 | { 3623, 0, 0, 0, 17, 2, 1, X86ImpOpBase + 455, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x790000000aULL }, // Inst #3623 = REPNE_PREFIX |
| 38478 | { 3622, 0, 0, 0, 705, 0, 3, X86ImpOpBase + 452, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002079ULL }, // Inst #3622 = RDTSCP |
| 38479 | { 3621, 0, 0, 0, 886, 0, 2, X86ImpOpBase + 450, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1880002001ULL }, // Inst #3621 = RDTSC |
| 38480 | { 3620, 2, 1, 0, 8, 1, 0, X86ImpOpBase + 122, 300, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xf00023031ULL }, // Inst #3620 = RDSSPQ |
| 38481 | { 3619, 2, 1, 0, 8, 1, 0, X86ImpOpBase + 122, 298, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xf00003031ULL }, // Inst #3619 = RDSSPD |
| 38482 | { 3618, 1, 1, 0, 1607, 0, 1, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380022037ULL }, // Inst #3618 = RDSEED64r |
| 38483 | { 3617, 1, 1, 0, 1607, 0, 1, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002137ULL }, // Inst #3617 = RDSEED32r |
| 38484 | { 3616, 1, 1, 0, 1606, 0, 1, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x63800020b7ULL }, // Inst #3616 = RDSEED16r |
| 38485 | { 3615, 1, 1, 0, 824, 0, 1, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380022036ULL }, // Inst #3615 = RDRAND64r |
| 38486 | { 3614, 1, 1, 0, 824, 0, 1, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380002136ULL }, // Inst #3614 = RDRAND32r |
| 38487 | { 3613, 1, 1, 0, 1605, 0, 1, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x63800020b6ULL }, // Inst #3613 = RDRAND16r |
| 38488 | { 3612, 0, 0, 0, 8, 1, 2, X86ImpOpBase + 441, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207dULL }, // Inst #3612 = RDPRU |
| 38489 | { 3611, 0, 0, 0, 823, 1, 2, X86ImpOpBase + 447, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1980002001ULL }, // Inst #3611 = RDPMC |
| 38490 | { 3610, 0, 0, 0, 1604, 1, 2, X86ImpOpBase + 441, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000206eULL }, // Inst #3610 = RDPKRUr |
| 38491 | { 3609, 1, 1, 0, 1603, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380003037ULL }, // Inst #3609 = RDPID64 |
| 38492 | { 3608, 1, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380003037ULL }, // Inst #3608 = RDPID32 |
| 38493 | { 3607, 0, 0, 0, 8, 3, 0, X86ImpOpBase + 444, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80003846ULL }, // Inst #3607 = RDMSRLIST |
| 38494 | { 3606, 0, 0, 0, 721, 1, 2, X86ImpOpBase + 441, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1900002001ULL }, // Inst #3606 = RDMSR |
| 38495 | { 3605, 1, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023031ULL }, // Inst #3605 = RDGSBASE64 |
| 38496 | { 3604, 1, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003031ULL }, // Inst #3604 = RDGSBASE |
| 38497 | { 3603, 1, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023030ULL }, // Inst #3603 = RDFSBASE64 |
| 38498 | { 3602, 1, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003030ULL }, // Inst #3602 = RDFSBASE |
| 38499 | { 3601, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 445, 0, 0x10e060050033ULL }, // Inst #3601 = RCR8ri_ND |
| 38500 | { 3600, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 170, 0, 0xc006060050033ULL }, // Inst #3600 = RCR8ri_EVEX |
| 38501 | { 3599, 3, 1, 0, 1162, 1, 1, X86ImpOpBase + 31, 170, 0, 0x6000040033ULL }, // Inst #3599 = RCR8ri |
| 38502 | { 3598, 2, 1, 0, 758, 2, 1, X86ImpOpBase + 438, 925, 0, 0x10e960010033ULL }, // Inst #3598 = RCR8rCL_ND |
| 38503 | { 3597, 2, 1, 0, 758, 2, 1, X86ImpOpBase + 438, 1027, 0, 0xc006960010033ULL }, // Inst #3597 = RCR8rCL_EVEX |
| 38504 | { 3596, 2, 1, 0, 885, 2, 1, X86ImpOpBase + 438, 1027, 0, 0x6900000033ULL }, // Inst #3596 = RCR8rCL |
| 38505 | { 3595, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 925, 0, 0x10e860010033ULL }, // Inst #3595 = RCR8r1_ND |
| 38506 | { 3594, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 1027, 0, 0xc006860010033ULL }, // Inst #3594 = RCR8r1_EVEX |
| 38507 | { 3593, 2, 1, 0, 753, 1, 1, X86ImpOpBase + 31, 1027, 0, 0x6800000033ULL }, // Inst #3593 = RCR8r1 |
| 38508 | { 3592, 7, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 425, 0|(1ULL<<MCID::MayLoad), 0x10e060050023ULL }, // Inst #3592 = RCR8mi_ND |
| 38509 | { 3591, 6, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050023ULL }, // Inst #3591 = RCR8mi_EVEX |
| 38510 | { 3590, 6, 0, 0, 1600, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040023ULL }, // Inst #3590 = RCR8mi |
| 38511 | { 3589, 6, 1, 0, 608, 2, 1, X86ImpOpBase + 438, 919, 0|(1ULL<<MCID::MayLoad), 0x10e960010023ULL }, // Inst #3589 = RCR8mCL_ND |
| 38512 | { 3588, 5, 0, 0, 607, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010023ULL }, // Inst #3588 = RCR8mCL_EVEX |
| 38513 | { 3587, 5, 0, 0, 1602, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000023ULL }, // Inst #3587 = RCR8mCL |
| 38514 | { 3586, 6, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 919, 0|(1ULL<<MCID::MayLoad), 0x10e860010023ULL }, // Inst #3586 = RCR8m1_ND |
| 38515 | { 3585, 5, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010023ULL }, // Inst #3585 = RCR8m1_EVEX |
| 38516 | { 3584, 5, 0, 0, 1598, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000023ULL }, // Inst #3584 = RCR8m1 |
| 38517 | { 3583, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 405, 0, 0x10e0e0070033ULL }, // Inst #3583 = RCR64ri_ND |
| 38518 | { 3582, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 164, 0, 0xc0060e0070033ULL }, // Inst #3582 = RCR64ri_EVEX |
| 38519 | { 3581, 3, 1, 0, 754, 1, 1, X86ImpOpBase + 31, 164, 0, 0x6080060033ULL }, // Inst #3581 = RCR64ri |
| 38520 | { 3580, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 553, 0, 0x10e9e0030033ULL }, // Inst #3580 = RCR64rCL_ND |
| 38521 | { 3579, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 300, 0, 0xc0069e0030033ULL }, // Inst #3579 = RCR64rCL_EVEX |
| 38522 | { 3578, 2, 1, 0, 1165, 2, 1, X86ImpOpBase + 438, 300, 0, 0x6980020033ULL }, // Inst #3578 = RCR64rCL |
| 38523 | { 3577, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 553, 0, 0x10e8e0030033ULL }, // Inst #3577 = RCR64r1_ND |
| 38524 | { 3576, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 300, 0, 0xc0068e0030033ULL }, // Inst #3576 = RCR64r1_EVEX |
| 38525 | { 3575, 2, 1, 0, 753, 1, 1, X86ImpOpBase + 31, 300, 0, 0x6880020033ULL }, // Inst #3575 = RCR64r1 |
| 38526 | { 3574, 7, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 391, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070023ULL }, // Inst #3574 = RCR64mi_ND |
| 38527 | { 3573, 6, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070023ULL }, // Inst #3573 = RCR64mi_EVEX |
| 38528 | { 3572, 6, 0, 0, 1029, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060023ULL }, // Inst #3572 = RCR64mi |
| 38529 | { 3571, 6, 1, 0, 608, 2, 1, X86ImpOpBase + 438, 242, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030023ULL }, // Inst #3571 = RCR64mCL_ND |
| 38530 | { 3570, 5, 0, 0, 607, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030023ULL }, // Inst #3570 = RCR64mCL_EVEX |
| 38531 | { 3569, 5, 0, 0, 1032, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020023ULL }, // Inst #3569 = RCR64mCL |
| 38532 | { 3568, 6, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 242, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030023ULL }, // Inst #3568 = RCR64m1_ND |
| 38533 | { 3567, 5, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030023ULL }, // Inst #3567 = RCR64m1_EVEX |
| 38534 | { 3566, 5, 0, 0, 1028, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020023ULL }, // Inst #3566 = RCR64m1 |
| 38535 | { 3565, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 374, 0, 0x10e0e0050033ULL }, // Inst #3565 = RCR32ri_ND |
| 38536 | { 3564, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 158, 0, 0xc0060e0050033ULL }, // Inst #3564 = RCR32ri_EVEX |
| 38537 | { 3563, 3, 1, 0, 754, 1, 1, X86ImpOpBase + 31, 158, 0, 0x6080040133ULL }, // Inst #3563 = RCR32ri |
| 38538 | { 3562, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 551, 0, 0x10e9e0010033ULL }, // Inst #3562 = RCR32rCL_ND |
| 38539 | { 3561, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 298, 0, 0xc0069e0010033ULL }, // Inst #3561 = RCR32rCL_EVEX |
| 38540 | { 3560, 2, 1, 0, 1165, 2, 1, X86ImpOpBase + 438, 298, 0, 0x6980000133ULL }, // Inst #3560 = RCR32rCL |
| 38541 | { 3559, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 551, 0, 0x10e8e0010033ULL }, // Inst #3559 = RCR32r1_ND |
| 38542 | { 3558, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 298, 0, 0xc0068e0010033ULL }, // Inst #3558 = RCR32r1_EVEX |
| 38543 | { 3557, 2, 1, 0, 753, 1, 1, X86ImpOpBase + 31, 298, 0, 0x6880000133ULL }, // Inst #3557 = RCR32r1 |
| 38544 | { 3556, 7, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 360, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050023ULL }, // Inst #3556 = RCR32mi_ND |
| 38545 | { 3555, 6, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050023ULL }, // Inst #3555 = RCR32mi_EVEX |
| 38546 | { 3554, 6, 0, 0, 1029, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040123ULL }, // Inst #3554 = RCR32mi |
| 38547 | { 3553, 6, 1, 0, 608, 2, 1, X86ImpOpBase + 438, 236, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010023ULL }, // Inst #3553 = RCR32mCL_ND |
| 38548 | { 3552, 5, 0, 0, 607, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010023ULL }, // Inst #3552 = RCR32mCL_EVEX |
| 38549 | { 3551, 5, 0, 0, 1032, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000123ULL }, // Inst #3551 = RCR32mCL |
| 38550 | { 3550, 6, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 236, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010023ULL }, // Inst #3550 = RCR32m1_ND |
| 38551 | { 3549, 5, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010023ULL }, // Inst #3549 = RCR32m1_EVEX |
| 38552 | { 3548, 5, 0, 0, 1028, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000123ULL }, // Inst #3548 = RCR32m1 |
| 38553 | { 3547, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 340, 0, 0x10e0e0050833ULL }, // Inst #3547 = RCR16ri_ND |
| 38554 | { 3546, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 152, 0, 0xc0060e0050833ULL }, // Inst #3546 = RCR16ri_EVEX |
| 38555 | { 3545, 3, 1, 0, 1164, 1, 1, X86ImpOpBase + 31, 152, 0, 0x60800400b3ULL }, // Inst #3545 = RCR16ri |
| 38556 | { 3544, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 547, 0, 0x10e9e0010833ULL }, // Inst #3544 = RCR16rCL_ND |
| 38557 | { 3543, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 573, 0, 0xc0069e0010833ULL }, // Inst #3543 = RCR16rCL_EVEX |
| 38558 | { 3542, 2, 1, 0, 1031, 2, 1, X86ImpOpBase + 438, 573, 0, 0x69800000b3ULL }, // Inst #3542 = RCR16rCL |
| 38559 | { 3541, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 547, 0, 0x10e8e0010833ULL }, // Inst #3541 = RCR16r1_ND |
| 38560 | { 3540, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 573, 0, 0xc0068e0010833ULL }, // Inst #3540 = RCR16r1_EVEX |
| 38561 | { 3539, 2, 1, 0, 753, 1, 1, X86ImpOpBase + 31, 573, 0, 0x68800000b3ULL }, // Inst #3539 = RCR16r1 |
| 38562 | { 3538, 7, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 320, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050823ULL }, // Inst #3538 = RCR16mi_ND |
| 38563 | { 3537, 6, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050823ULL }, // Inst #3537 = RCR16mi_EVEX |
| 38564 | { 3536, 6, 0, 0, 1029, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a3ULL }, // Inst #3536 = RCR16mi |
| 38565 | { 3535, 6, 1, 0, 608, 2, 1, X86ImpOpBase + 438, 567, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010823ULL }, // Inst #3535 = RCR16mCL_ND |
| 38566 | { 3534, 5, 0, 0, 607, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010823ULL }, // Inst #3534 = RCR16mCL_EVEX |
| 38567 | { 3533, 5, 0, 0, 1032, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a3ULL }, // Inst #3533 = RCR16mCL |
| 38568 | { 3532, 6, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 567, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010823ULL }, // Inst #3532 = RCR16m1_ND |
| 38569 | { 3531, 5, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010823ULL }, // Inst #3531 = RCR16m1_EVEX |
| 38570 | { 3530, 5, 0, 0, 1028, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a3ULL }, // Inst #3530 = RCR16m1 |
| 38571 | { 3529, 3, 1, 0, 299, 0, 0, X86ImpOpBase + 0, 472, 0, 0x2988003029ULL }, // Inst #3529 = RCPSSr_Int |
| 38572 | { 3528, 2, 1, 0, 299, 0, 0, X86ImpOpBase + 0, 986, 0, 0x2988003029ULL }, // Inst #3528 = RCPSSr |
| 38573 | { 3527, 7, 1, 0, 298, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2988003019ULL }, // Inst #3527 = RCPSSm_Int |
| 38574 | { 3526, 6, 1, 0, 297, 0, 0, X86ImpOpBase + 0, 980, 0|(1ULL<<MCID::MayLoad), 0x2988003019ULL }, // Inst #3526 = RCPSSm |
| 38575 | { 3525, 2, 1, 0, 296, 0, 0, X86ImpOpBase + 0, 535, 0, 0x2988002029ULL }, // Inst #3525 = RCPPSr |
| 38576 | { 3524, 6, 1, 0, 295, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x2988002019ULL }, // Inst #3524 = RCPPSm |
| 38577 | { 3523, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 445, 0, 0x10e060050032ULL }, // Inst #3523 = RCL8ri_ND |
| 38578 | { 3522, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 170, 0, 0xc006060050032ULL }, // Inst #3522 = RCL8ri_EVEX |
| 38579 | { 3521, 3, 1, 0, 755, 1, 1, X86ImpOpBase + 31, 170, 0, 0x6000040032ULL }, // Inst #3521 = RCL8ri |
| 38580 | { 3520, 2, 1, 0, 758, 2, 1, X86ImpOpBase + 438, 925, 0, 0x10e960010032ULL }, // Inst #3520 = RCL8rCL_ND |
| 38581 | { 3519, 2, 1, 0, 758, 2, 1, X86ImpOpBase + 438, 1027, 0, 0xc006960010032ULL }, // Inst #3519 = RCL8rCL_EVEX |
| 38582 | { 3518, 2, 1, 0, 884, 2, 1, X86ImpOpBase + 438, 1027, 0, 0x6900000032ULL }, // Inst #3518 = RCL8rCL |
| 38583 | { 3517, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 925, 0, 0x10e860010032ULL }, // Inst #3517 = RCL8r1_ND |
| 38584 | { 3516, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 1027, 0, 0xc006860010032ULL }, // Inst #3516 = RCL8r1_EVEX |
| 38585 | { 3515, 2, 1, 0, 753, 1, 1, X86ImpOpBase + 31, 1027, 0, 0x6800000032ULL }, // Inst #3515 = RCL8r1 |
| 38586 | { 3514, 7, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 425, 0|(1ULL<<MCID::MayLoad), 0x10e060050022ULL }, // Inst #3514 = RCL8mi_ND |
| 38587 | { 3513, 6, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006060050022ULL }, // Inst #3513 = RCL8mi_EVEX |
| 38588 | { 3512, 6, 0, 0, 1599, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040022ULL }, // Inst #3512 = RCL8mi |
| 38589 | { 3511, 6, 1, 0, 882, 2, 1, X86ImpOpBase + 438, 919, 0|(1ULL<<MCID::MayLoad), 0x10e960010022ULL }, // Inst #3511 = RCL8mCL_ND |
| 38590 | { 3510, 5, 0, 0, 881, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006960010022ULL }, // Inst #3510 = RCL8mCL_EVEX |
| 38591 | { 3509, 5, 0, 0, 1601, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000022ULL }, // Inst #3509 = RCL8mCL |
| 38592 | { 3508, 6, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 919, 0|(1ULL<<MCID::MayLoad), 0x10e860010022ULL }, // Inst #3508 = RCL8m1_ND |
| 38593 | { 3507, 5, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc006860010022ULL }, // Inst #3507 = RCL8m1_EVEX |
| 38594 | { 3506, 5, 0, 0, 1598, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000022ULL }, // Inst #3506 = RCL8m1 |
| 38595 | { 3505, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 405, 0, 0x10e0e0070032ULL }, // Inst #3505 = RCL64ri_ND |
| 38596 | { 3504, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 164, 0, 0xc0060e0070032ULL }, // Inst #3504 = RCL64ri_EVEX |
| 38597 | { 3503, 3, 1, 0, 1167, 1, 1, X86ImpOpBase + 31, 164, 0, 0x6080060032ULL }, // Inst #3503 = RCL64ri |
| 38598 | { 3502, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 553, 0, 0x10e9e0030032ULL }, // Inst #3502 = RCL64rCL_ND |
| 38599 | { 3501, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 300, 0, 0xc0069e0030032ULL }, // Inst #3501 = RCL64rCL_EVEX |
| 38600 | { 3500, 2, 1, 0, 1033, 2, 1, X86ImpOpBase + 438, 300, 0, 0x6980020032ULL }, // Inst #3500 = RCL64rCL |
| 38601 | { 3499, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 553, 0, 0x10e8e0030032ULL }, // Inst #3499 = RCL64r1_ND |
| 38602 | { 3498, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 300, 0, 0xc0068e0030032ULL }, // Inst #3498 = RCL64r1_EVEX |
| 38603 | { 3497, 2, 1, 0, 753, 1, 1, X86ImpOpBase + 31, 300, 0, 0x6880020032ULL }, // Inst #3497 = RCL64r1 |
| 38604 | { 3496, 7, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 391, 0|(1ULL<<MCID::MayLoad), 0x10e0e0070022ULL }, // Inst #3496 = RCL64mi_ND |
| 38605 | { 3495, 6, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0070022ULL }, // Inst #3495 = RCL64mi_EVEX |
| 38606 | { 3494, 6, 0, 0, 1030, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060022ULL }, // Inst #3494 = RCL64mi |
| 38607 | { 3493, 6, 1, 0, 882, 2, 1, X86ImpOpBase + 438, 242, 0|(1ULL<<MCID::MayLoad), 0x10e9e0030022ULL }, // Inst #3493 = RCL64mCL_ND |
| 38608 | { 3492, 5, 0, 0, 881, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0030022ULL }, // Inst #3492 = RCL64mCL_EVEX |
| 38609 | { 3491, 5, 0, 0, 1034, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020022ULL }, // Inst #3491 = RCL64mCL |
| 38610 | { 3490, 6, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 242, 0|(1ULL<<MCID::MayLoad), 0x10e8e0030022ULL }, // Inst #3490 = RCL64m1_ND |
| 38611 | { 3489, 5, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0030022ULL }, // Inst #3489 = RCL64m1_EVEX |
| 38612 | { 3488, 5, 0, 0, 1028, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020022ULL }, // Inst #3488 = RCL64m1 |
| 38613 | { 3487, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 374, 0, 0x10e0e0050032ULL }, // Inst #3487 = RCL32ri_ND |
| 38614 | { 3486, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 158, 0, 0xc0060e0050032ULL }, // Inst #3486 = RCL32ri_EVEX |
| 38615 | { 3485, 3, 1, 0, 1167, 1, 1, X86ImpOpBase + 31, 158, 0, 0x6080040132ULL }, // Inst #3485 = RCL32ri |
| 38616 | { 3484, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 551, 0, 0x10e9e0010032ULL }, // Inst #3484 = RCL32rCL_ND |
| 38617 | { 3483, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 298, 0, 0xc0069e0010032ULL }, // Inst #3483 = RCL32rCL_EVEX |
| 38618 | { 3482, 2, 1, 0, 1033, 2, 1, X86ImpOpBase + 438, 298, 0, 0x6980000132ULL }, // Inst #3482 = RCL32rCL |
| 38619 | { 3481, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 551, 0, 0x10e8e0010032ULL }, // Inst #3481 = RCL32r1_ND |
| 38620 | { 3480, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 298, 0, 0xc0068e0010032ULL }, // Inst #3480 = RCL32r1_EVEX |
| 38621 | { 3479, 2, 1, 0, 753, 1, 1, X86ImpOpBase + 31, 298, 0, 0x6880000132ULL }, // Inst #3479 = RCL32r1 |
| 38622 | { 3478, 7, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 360, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050022ULL }, // Inst #3478 = RCL32mi_ND |
| 38623 | { 3477, 6, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050022ULL }, // Inst #3477 = RCL32mi_EVEX |
| 38624 | { 3476, 6, 0, 0, 1030, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040122ULL }, // Inst #3476 = RCL32mi |
| 38625 | { 3475, 6, 1, 0, 882, 2, 1, X86ImpOpBase + 438, 236, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010022ULL }, // Inst #3475 = RCL32mCL_ND |
| 38626 | { 3474, 5, 0, 0, 881, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010022ULL }, // Inst #3474 = RCL32mCL_EVEX |
| 38627 | { 3473, 5, 0, 0, 1034, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000122ULL }, // Inst #3473 = RCL32mCL |
| 38628 | { 3472, 6, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 236, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010022ULL }, // Inst #3472 = RCL32m1_ND |
| 38629 | { 3471, 5, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010022ULL }, // Inst #3471 = RCL32m1_EVEX |
| 38630 | { 3470, 5, 0, 0, 1028, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000122ULL }, // Inst #3470 = RCL32m1 |
| 38631 | { 3469, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 340, 0, 0x10e0e0050832ULL }, // Inst #3469 = RCL16ri_ND |
| 38632 | { 3468, 3, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 152, 0, 0xc0060e0050832ULL }, // Inst #3468 = RCL16ri_EVEX |
| 38633 | { 3467, 3, 1, 0, 1166, 1, 1, X86ImpOpBase + 31, 152, 0, 0x60800400b2ULL }, // Inst #3467 = RCL16ri |
| 38634 | { 3466, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 547, 0, 0x10e9e0010832ULL }, // Inst #3466 = RCL16rCL_ND |
| 38635 | { 3465, 2, 1, 0, 883, 2, 1, X86ImpOpBase + 438, 573, 0, 0xc0069e0010832ULL }, // Inst #3465 = RCL16rCL_EVEX |
| 38636 | { 3464, 2, 1, 0, 1163, 2, 1, X86ImpOpBase + 438, 573, 0, 0x69800000b2ULL }, // Inst #3464 = RCL16rCL |
| 38637 | { 3463, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 547, 0, 0x10e8e0010832ULL }, // Inst #3463 = RCL16r1_ND |
| 38638 | { 3462, 2, 1, 0, 293, 1, 1, X86ImpOpBase + 31, 573, 0, 0xc0068e0010832ULL }, // Inst #3462 = RCL16r1_EVEX |
| 38639 | { 3461, 2, 1, 0, 753, 1, 1, X86ImpOpBase + 31, 573, 0, 0x68800000b2ULL }, // Inst #3461 = RCL16r1 |
| 38640 | { 3460, 7, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 320, 0|(1ULL<<MCID::MayLoad), 0x10e0e0050822ULL }, // Inst #3460 = RCL16mi_ND |
| 38641 | { 3459, 6, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0060e0050822ULL }, // Inst #3459 = RCL16mi_EVEX |
| 38642 | { 3458, 6, 0, 0, 1030, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x60800400a2ULL }, // Inst #3458 = RCL16mi |
| 38643 | { 3457, 6, 1, 0, 882, 2, 1, X86ImpOpBase + 438, 567, 0|(1ULL<<MCID::MayLoad), 0x10e9e0010822ULL }, // Inst #3457 = RCL16mCL_ND |
| 38644 | { 3456, 5, 0, 0, 881, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0069e0010822ULL }, // Inst #3456 = RCL16mCL_EVEX |
| 38645 | { 3455, 5, 0, 0, 1034, 2, 1, X86ImpOpBase + 438, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x69800000a2ULL }, // Inst #3455 = RCL16mCL |
| 38646 | { 3454, 6, 1, 0, 606, 1, 1, X86ImpOpBase + 31, 567, 0|(1ULL<<MCID::MayLoad), 0x10e8e0010822ULL }, // Inst #3454 = RCL16m1_ND |
| 38647 | { 3453, 5, 0, 0, 605, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0068e0010822ULL }, // Inst #3453 = RCL16m1_EVEX |
| 38648 | { 3452, 5, 0, 0, 1028, 1, 1, X86ImpOpBase + 31, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x68800000a2ULL }, // Inst #3452 = RCL16m1 |
| 38649 | { 3451, 3, 1, 0, 812, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7798002829ULL }, // Inst #3451 = PXORrr |
| 38650 | { 3450, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7798002819ULL }, // Inst #3450 = PXORrm |
| 38651 | { 3449, 0, 0, 0, 8, 3, 2, X86ImpOpBase + 433, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000387fULL }, // Inst #3449 = PVALIDATE64 |
| 38652 | { 3448, 0, 0, 0, 8, 3, 2, X86ImpOpBase + 428, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000387fULL }, // Inst #3448 = PVALIDATE32 |
| 38653 | { 3447, 0, 0, 0, 641, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb00000101ULL }, // Inst #3447 = PUSHSS32 |
| 38654 | { 3446, 0, 0, 0, 641, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb00000081ULL }, // Inst #3446 = PUSHSS16 |
| 38655 | { 3445, 1, 0, 0, 141, 1, 1, X86ImpOpBase + 397, 202, 0|(1ULL<<MCID::MayStore), 0x4002800020002ULL }, // Inst #3445 = PUSHP64r |
| 38656 | { 3444, 0, 0, 0, 761, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400002101ULL }, // Inst #3444 = PUSHGS64 |
| 38657 | { 3443, 0, 0, 0, 1539, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400002101ULL }, // Inst #3443 = PUSHGS32 |
| 38658 | { 3442, 0, 0, 0, 1539, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400002081ULL }, // Inst #3442 = PUSHGS16 |
| 38659 | { 3441, 0, 0, 0, 751, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000002101ULL }, // Inst #3441 = PUSHFS64 |
| 38660 | { 3440, 0, 0, 0, 1539, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000002101ULL }, // Inst #3440 = PUSHFS32 |
| 38661 | { 3439, 0, 0, 0, 1539, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000002081ULL }, // Inst #3439 = PUSHFS16 |
| 38662 | { 3438, 0, 0, 0, 768, 3, 1, X86ImpOpBase + 424, 1, 0|(1ULL<<MCID::MayStore), 0x4e00000101ULL }, // Inst #3438 = PUSHF64 |
| 38663 | { 3437, 0, 0, 0, 683, 3, 1, X86ImpOpBase + 420, 1, 0|(1ULL<<MCID::MayStore), 0x4e00000101ULL }, // Inst #3437 = PUSHF32 |
| 38664 | { 3436, 0, 0, 0, 923, 3, 1, X86ImpOpBase + 420, 1, 0|(1ULL<<MCID::MayStore), 0x4e00000081ULL }, // Inst #3436 = PUSHF16 |
| 38665 | { 3435, 0, 0, 0, 641, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300000101ULL }, // Inst #3435 = PUSHES32 |
| 38666 | { 3434, 0, 0, 0, 641, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300000081ULL }, // Inst #3434 = PUSHES16 |
| 38667 | { 3433, 0, 0, 0, 641, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf00000101ULL }, // Inst #3433 = PUSHDS32 |
| 38668 | { 3432, 0, 0, 0, 641, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf00000081ULL }, // Inst #3432 = PUSHDS16 |
| 38669 | { 3431, 0, 0, 0, 641, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x700000101ULL }, // Inst #3431 = PUSHCS32 |
| 38670 | { 3430, 0, 0, 0, 641, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x700000081ULL }, // Inst #3430 = PUSHCS16 |
| 38671 | { 3429, 0, 0, 0, 679, 8, 1, X86ImpOpBase + 411, 1, 0|(1ULL<<MCID::MayStore), 0x3000000101ULL }, // Inst #3429 = PUSHA32 |
| 38672 | { 3428, 0, 0, 0, 679, 8, 1, X86ImpOpBase + 411, 1, 0|(1ULL<<MCID::MayStore), 0x3000000081ULL }, // Inst #3428 = PUSHA16 |
| 38673 | { 3427, 1, 0, 0, 1597, 1, 1, X86ImpOpBase + 397, 202, 0|(1ULL<<MCID::MayStore), 0x7f80000136ULL }, // Inst #3427 = PUSH64rmr |
| 38674 | { 3426, 5, 0, 0, 639, 1, 1, X86ImpOpBase + 397, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000126ULL }, // Inst #3426 = PUSH64rmm |
| 38675 | { 3425, 1, 0, 0, 1596, 1, 1, X86ImpOpBase + 397, 202, 0|(1ULL<<MCID::MayStore), 0x2800000102ULL }, // Inst #3425 = PUSH64r |
| 38676 | { 3424, 1, 0, 0, 861, 1, 1, X86ImpOpBase + 397, 1, 0|(1ULL<<MCID::MayStore), 0x3500040101ULL }, // Inst #3424 = PUSH64i8 |
| 38677 | { 3423, 1, 0, 0, 620, 1, 1, X86ImpOpBase + 397, 1, 0|(1ULL<<MCID::MayStore), 0x3400200101ULL }, // Inst #3423 = PUSH64i32 |
| 38678 | { 3422, 1, 0, 0, 759, 1, 1, X86ImpOpBase + 27, 201, 0|(1ULL<<MCID::MayStore), 0x7f80000136ULL }, // Inst #3422 = PUSH32rmr |
| 38679 | { 3421, 5, 0, 0, 922, 1, 1, X86ImpOpBase + 27, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000126ULL }, // Inst #3421 = PUSH32rmm |
| 38680 | { 3420, 1, 0, 0, 861, 1, 1, X86ImpOpBase + 27, 201, 0|(1ULL<<MCID::MayStore), 0x2800000102ULL }, // Inst #3420 = PUSH32r |
| 38681 | { 3419, 1, 0, 0, 620, 1, 1, X86ImpOpBase + 27, 1, 0|(1ULL<<MCID::MayStore), 0x3500040101ULL }, // Inst #3419 = PUSH32i8 |
| 38682 | { 3418, 1, 0, 0, 620, 1, 1, X86ImpOpBase + 27, 1, 0|(1ULL<<MCID::MayStore), 0x3400180101ULL }, // Inst #3418 = PUSH32i |
| 38683 | { 3417, 2, 0, 0, 141, 1, 1, X86ImpOpBase + 397, 553, 0|(1ULL<<MCID::MayStore), 0x10ffe0030036ULL }, // Inst #3417 = PUSH2P |
| 38684 | { 3416, 2, 0, 0, 141, 1, 1, X86ImpOpBase + 397, 553, 0|(1ULL<<MCID::MayStore), 0x10ffe0010036ULL }, // Inst #3416 = PUSH2 |
| 38685 | { 3415, 1, 0, 0, 759, 1, 1, X86ImpOpBase + 27, 577, 0|(1ULL<<MCID::MayStore), 0x7f800000b6ULL }, // Inst #3415 = PUSH16rmr |
| 38686 | { 3414, 5, 0, 0, 922, 1, 1, X86ImpOpBase + 27, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f800000a6ULL }, // Inst #3414 = PUSH16rmm |
| 38687 | { 3413, 1, 0, 0, 861, 1, 1, X86ImpOpBase + 27, 577, 0|(1ULL<<MCID::MayStore), 0x2800000082ULL }, // Inst #3413 = PUSH16r |
| 38688 | { 3412, 1, 0, 0, 620, 1, 1, X86ImpOpBase + 27, 1, 0|(1ULL<<MCID::MayStore), 0x3500040081ULL }, // Inst #3412 = PUSH16i8 |
| 38689 | { 3411, 1, 0, 0, 620, 1, 1, X86ImpOpBase + 27, 1, 0|(1ULL<<MCID::MayStore), 0x3400100081ULL }, // Inst #3411 = PUSH16i |
| 38690 | { 3410, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3098002829ULL }, // Inst #3410 = PUNPCKLWDrr |
| 38691 | { 3409, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3098002819ULL }, // Inst #3409 = PUNPCKLWDrm |
| 38692 | { 3408, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3618002829ULL }, // Inst #3408 = PUNPCKLQDQrr |
| 38693 | { 3407, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3618002819ULL }, // Inst #3407 = PUNPCKLQDQrm |
| 38694 | { 3406, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3118002829ULL }, // Inst #3406 = PUNPCKLDQrr |
| 38695 | { 3405, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3118002819ULL }, // Inst #3405 = PUNPCKLDQrm |
| 38696 | { 3404, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3018002829ULL }, // Inst #3404 = PUNPCKLBWrr |
| 38697 | { 3403, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3018002819ULL }, // Inst #3403 = PUNPCKLBWrm |
| 38698 | { 3402, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3498002829ULL }, // Inst #3402 = PUNPCKHWDrr |
| 38699 | { 3401, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3498002819ULL }, // Inst #3401 = PUNPCKHWDrm |
| 38700 | { 3400, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3698002829ULL }, // Inst #3400 = PUNPCKHQDQrr |
| 38701 | { 3399, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3698002819ULL }, // Inst #3399 = PUNPCKHQDQrm |
| 38702 | { 3398, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3518002829ULL }, // Inst #3398 = PUNPCKHDQrr |
| 38703 | { 3397, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3518002819ULL }, // Inst #3397 = PUNPCKHDQrm |
| 38704 | { 3396, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3418002829ULL }, // Inst #3396 = PUNPCKHBWrr |
| 38705 | { 3395, 7, 1, 0, 250, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3418002819ULL }, // Inst #3395 = PUNPCKHBWrm |
| 38706 | { 3394, 1, 0, 0, 1595, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003034ULL }, // Inst #3394 = PTWRITEr |
| 38707 | { 3393, 5, 0, 0, 1593, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003024ULL }, // Inst #3393 = PTWRITEm |
| 38708 | { 3392, 1, 0, 0, 1594, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023034ULL }, // Inst #3392 = PTWRITE64r |
| 38709 | { 3391, 5, 0, 0, 1593, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023024ULL }, // Inst #3391 = PTWRITE64m |
| 38710 | { 3390, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3390 = PTILEZERO |
| 38711 | { 3389, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3389 = PTILESTORED |
| 38712 | { 3388, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 187, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3388 = PTILELOADDT1 |
| 38713 | { 3387, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 187, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3387 = PTILELOADD |
| 38714 | { 3386, 2, 0, 0, 288, 0, 1, X86ImpOpBase + 0, 535, 0, 0xb98004829ULL }, // Inst #3386 = PTESTrr |
| 38715 | { 3385, 6, 0, 0, 287, 0, 1, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0xb98004819ULL }, // Inst #3385 = PTESTrm |
| 38716 | { 3384, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3384 = PTDPFP16PS |
| 38717 | { 3383, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3383 = PTDPBUUD |
| 38718 | { 3382, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3382 = PTDPBUSD |
| 38719 | { 3381, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3381 = PTDPBSUD |
| 38720 | { 3380, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3380 = PTDPBSSD |
| 38721 | { 3379, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3379 = PTDPBF16PS |
| 38722 | { 3378, 7, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 248, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3378 = PTCMMRLFP16PSV |
| 38723 | { 3377, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3377 = PTCMMRLFP16PS |
| 38724 | { 3376, 7, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 248, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3376 = PTCMMIMFP16PSV |
| 38725 | { 3375, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #3375 = PTCMMIMFP16PS |
| 38726 | { 3374, 2, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 1242, 0, 0x5d8000e029ULL }, // Inst #3374 = PSWAPDrr |
| 38727 | { 3373, 6, 1, 0, 202, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0x5d8000e019ULL }, // Inst #3373 = PSWAPDrm |
| 38728 | { 3372, 3, 1, 0, 813, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7c98002829ULL }, // Inst #3372 = PSUBWrr |
| 38729 | { 3371, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7c98002819ULL }, // Inst #3371 = PSUBWrm |
| 38730 | { 3370, 3, 1, 0, 1199, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6c98002829ULL }, // Inst #3370 = PSUBUSWrr |
| 38731 | { 3369, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6c98002819ULL }, // Inst #3369 = PSUBUSWrm |
| 38732 | { 3368, 3, 1, 0, 1199, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6c18002829ULL }, // Inst #3368 = PSUBUSBrr |
| 38733 | { 3367, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6c18002819ULL }, // Inst #3367 = PSUBUSBrm |
| 38734 | { 3366, 3, 1, 0, 1199, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7498002829ULL }, // Inst #3366 = PSUBSWrr |
| 38735 | { 3365, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7498002819ULL }, // Inst #3365 = PSUBSWrm |
| 38736 | { 3364, 3, 1, 0, 1199, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7418002829ULL }, // Inst #3364 = PSUBSBrr |
| 38737 | { 3363, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7418002819ULL }, // Inst #3363 = PSUBSBrm |
| 38738 | { 3362, 3, 1, 0, 814, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7d98002829ULL }, // Inst #3362 = PSUBQrr |
| 38739 | { 3361, 7, 1, 0, 659, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7d98002819ULL }, // Inst #3361 = PSUBQrm |
| 38740 | { 3360, 3, 1, 0, 813, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7d18002829ULL }, // Inst #3360 = PSUBDrr |
| 38741 | { 3359, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7d18002819ULL }, // Inst #3359 = PSUBDrm |
| 38742 | { 3358, 3, 1, 0, 813, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7c18002829ULL }, // Inst #3358 = PSUBBrr |
| 38743 | { 3357, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7c18002819ULL }, // Inst #3357 = PSUBBrm |
| 38744 | { 3356, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6898002829ULL }, // Inst #3356 = PSRLWrr |
| 38745 | { 3355, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6898002819ULL }, // Inst #3355 = PSRLWrm |
| 38746 | { 3354, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 1411, 0, 0x3898042832ULL }, // Inst #3354 = PSRLWri |
| 38747 | { 3353, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6998002829ULL }, // Inst #3353 = PSRLQrr |
| 38748 | { 3352, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6998002819ULL }, // Inst #3352 = PSRLQrm |
| 38749 | { 3351, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 1411, 0, 0x3998042832ULL }, // Inst #3351 = PSRLQri |
| 38750 | { 3350, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6918002829ULL }, // Inst #3350 = PSRLDrr |
| 38751 | { 3349, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6918002819ULL }, // Inst #3349 = PSRLDrm |
| 38752 | { 3348, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 1411, 0, 0x3918042832ULL }, // Inst #3348 = PSRLDri |
| 38753 | { 3347, 3, 1, 0, 1093, 0, 0, X86ImpOpBase + 0, 1411, 0, 0x3998042833ULL }, // Inst #3347 = PSRLDQri |
| 38754 | { 3346, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7098002829ULL }, // Inst #3346 = PSRAWrr |
| 38755 | { 3345, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7098002819ULL }, // Inst #3345 = PSRAWrm |
| 38756 | { 3344, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 1411, 0, 0x3898042834ULL }, // Inst #3344 = PSRAWri |
| 38757 | { 3343, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7118002829ULL }, // Inst #3343 = PSRADrr |
| 38758 | { 3342, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7118002819ULL }, // Inst #3342 = PSRADrm |
| 38759 | { 3341, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 1411, 0, 0x3918042834ULL }, // Inst #3341 = PSRADri |
| 38760 | { 3340, 0, 0, 0, 8, 1, 2, X86ImpOpBase + 408, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000307fULL }, // Inst #3340 = PSMASH |
| 38761 | { 3339, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7898002829ULL }, // Inst #3339 = PSLLWrr |
| 38762 | { 3338, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7898002819ULL }, // Inst #3338 = PSLLWrm |
| 38763 | { 3337, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 1411, 0, 0x3898042836ULL }, // Inst #3337 = PSLLWri |
| 38764 | { 3336, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7998002829ULL }, // Inst #3336 = PSLLQrr |
| 38765 | { 3335, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7998002819ULL }, // Inst #3335 = PSLLQrm |
| 38766 | { 3334, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 1411, 0, 0x3998042836ULL }, // Inst #3334 = PSLLQri |
| 38767 | { 3333, 3, 1, 0, 1089, 0, 0, X86ImpOpBase + 0, 472, 0, 0x7918002829ULL }, // Inst #3333 = PSLLDrr |
| 38768 | { 3332, 7, 1, 0, 285, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7918002819ULL }, // Inst #3332 = PSLLDrm |
| 38769 | { 3331, 3, 1, 0, 284, 0, 0, X86ImpOpBase + 0, 1411, 0, 0x3918042836ULL }, // Inst #3331 = PSLLDri |
| 38770 | { 3330, 3, 1, 0, 1093, 0, 0, X86ImpOpBase + 0, 1411, 0, 0x3998042837ULL }, // Inst #3330 = PSLLDQri |
| 38771 | { 3329, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 472, 0, 0x498004829ULL }, // Inst #3329 = PSIGNWrr |
| 38772 | { 3328, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x498004819ULL }, // Inst #3328 = PSIGNWrm |
| 38773 | { 3327, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 472, 0, 0x518004829ULL }, // Inst #3327 = PSIGNDrr |
| 38774 | { 3326, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x518004819ULL }, // Inst #3326 = PSIGNDrm |
| 38775 | { 3325, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 472, 0, 0x418004829ULL }, // Inst #3325 = PSIGNBrr |
| 38776 | { 3324, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x418004819ULL }, // Inst #3324 = PSIGNBrm |
| 38777 | { 3323, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 544, 0, 0x3818043829ULL }, // Inst #3323 = PSHUFLWri |
| 38778 | { 3322, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x3818043819ULL }, // Inst #3322 = PSHUFLWmi |
| 38779 | { 3321, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 544, 0, 0x3818043029ULL }, // Inst #3321 = PSHUFHWri |
| 38780 | { 3320, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x3818043019ULL }, // Inst #3320 = PSHUFHWmi |
| 38781 | { 3319, 3, 1, 0, 251, 0, 0, X86ImpOpBase + 0, 544, 0, 0x3818042829ULL }, // Inst #3319 = PSHUFDri |
| 38782 | { 3318, 7, 1, 0, 274, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x3818042819ULL }, // Inst #3318 = PSHUFDmi |
| 38783 | { 3317, 3, 1, 0, 283, 0, 0, X86ImpOpBase + 0, 472, 0, 0x18004829ULL }, // Inst #3317 = PSHUFBrr |
| 38784 | { 3316, 7, 1, 0, 282, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x18004819ULL }, // Inst #3316 = PSHUFBrm |
| 38785 | { 3315, 3, 1, 0, 281, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7b18002829ULL }, // Inst #3315 = PSADBWrr |
| 38786 | { 3314, 7, 1, 0, 280, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7b18002819ULL }, // Inst #3314 = PSADBWrm |
| 38787 | { 3313, 2, 1, 0, 8, 1, 3, X86ImpOpBase + 215, 553, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #3313 = PROBED_ALLOCA_64 |
| 38788 | { 3312, 2, 1, 0, 8, 1, 3, X86ImpOpBase + 211, 551, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #3312 = PROBED_ALLOCA_32 |
| 38789 | { 3311, 5, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680002022ULL }, // Inst #3311 = PREFETCHWT1 |
| 38790 | { 3310, 5, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680002021ULL }, // Inst #3310 = PREFETCHW |
| 38791 | { 3309, 5, 0, 0, 1591, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002023ULL }, // Inst #3309 = PREFETCHT2 |
| 38792 | { 3308, 5, 0, 0, 1591, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002022ULL }, // Inst #3308 = PREFETCHT1 |
| 38793 | { 3307, 5, 0, 0, 1591, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002021ULL }, // Inst #3307 = PREFETCHT0 |
| 38794 | { 3306, 5, 0, 0, 1592, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002020ULL }, // Inst #3306 = PREFETCHNTA |
| 38795 | { 3305, 5, 0, 0, 1590, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002026ULL }, // Inst #3305 = PREFETCHIT1 |
| 38796 | { 3304, 5, 0, 0, 1590, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00002027ULL }, // Inst #3304 = PREFETCHIT0 |
| 38797 | { 3303, 5, 0, 0, 72, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680002020ULL }, // Inst #3303 = PREFETCH |
| 38798 | { 3302, 3, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7598002829ULL }, // Inst #3302 = PORrr |
| 38799 | { 3301, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7598002819ULL }, // Inst #3301 = PORrm |
| 38800 | { 3300, 0, 0, 0, 711, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb80000101ULL }, // Inst #3300 = POPSS32 |
| 38801 | { 3299, 0, 0, 0, 711, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb80000081ULL }, // Inst #3299 = POPSS16 |
| 38802 | { 3298, 1, 1, 0, 72, 1, 1, X86ImpOpBase + 397, 202, 0|(1ULL<<MCID::MayLoad), 0x4002c00020002ULL }, // Inst #3298 = POPP64r |
| 38803 | { 3297, 0, 0, 0, 704, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480002101ULL }, // Inst #3297 = POPGS64 |
| 38804 | { 3296, 0, 0, 0, 704, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480002101ULL }, // Inst #3296 = POPGS32 |
| 38805 | { 3295, 0, 0, 0, 704, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480002081ULL }, // Inst #3295 = POPGS16 |
| 38806 | { 3294, 0, 0, 0, 704, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080002101ULL }, // Inst #3294 = POPFS64 |
| 38807 | { 3293, 0, 0, 0, 704, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080002101ULL }, // Inst #3293 = POPFS32 |
| 38808 | { 3292, 0, 0, 0, 704, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080002081ULL }, // Inst #3292 = POPFS16 |
| 38809 | { 3291, 0, 0, 0, 914, 1, 3, X86ImpOpBase + 37, 1, 0|(1ULL<<MCID::MayLoad), 0x4e80000101ULL }, // Inst #3291 = POPF64 |
| 38810 | { 3290, 0, 0, 0, 703, 1, 3, X86ImpOpBase + 33, 1, 0|(1ULL<<MCID::MayLoad), 0x4e80000101ULL }, // Inst #3290 = POPF32 |
| 38811 | { 3289, 0, 0, 0, 707, 1, 3, X86ImpOpBase + 33, 1, 0|(1ULL<<MCID::MayLoad), 0x4e80000081ULL }, // Inst #3289 = POPF16 |
| 38812 | { 3288, 0, 0, 0, 704, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380000101ULL }, // Inst #3288 = POPES32 |
| 38813 | { 3287, 0, 0, 0, 704, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380000081ULL }, // Inst #3287 = POPES16 |
| 38814 | { 3286, 0, 0, 0, 704, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf80000101ULL }, // Inst #3286 = POPDS32 |
| 38815 | { 3285, 0, 0, 0, 704, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf80000081ULL }, // Inst #3285 = POPDS16 |
| 38816 | { 3284, 2, 1, 0, 279, 0, 0, X86ImpOpBase + 0, 553, 0, 0x10004460030029ULL }, // Inst #3284 = POPCNT64rr_NF |
| 38817 | { 3283, 2, 1, 0, 279, 0, 1, X86ImpOpBase + 0, 553, 0, 0xc004460030029ULL }, // Inst #3283 = POPCNT64rr_EVEX |
| 38818 | { 3282, 2, 1, 0, 279, 0, 1, X86ImpOpBase + 0, 553, 0, 0x5c00023029ULL }, // Inst #3282 = POPCNT64rr |
| 38819 | { 3281, 6, 1, 0, 278, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10004460030019ULL }, // Inst #3281 = POPCNT64rm_NF |
| 38820 | { 3280, 6, 1, 0, 278, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0xc004460030019ULL }, // Inst #3280 = POPCNT64rm_EVEX |
| 38821 | { 3279, 6, 1, 0, 278, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x5c00023019ULL }, // Inst #3279 = POPCNT64rm |
| 38822 | { 3278, 2, 1, 0, 279, 0, 0, X86ImpOpBase + 0, 551, 0, 0x10004460010029ULL }, // Inst #3278 = POPCNT32rr_NF |
| 38823 | { 3277, 2, 1, 0, 279, 0, 1, X86ImpOpBase + 0, 551, 0, 0xc004460010029ULL }, // Inst #3277 = POPCNT32rr_EVEX |
| 38824 | { 3276, 2, 1, 0, 279, 0, 1, X86ImpOpBase + 0, 551, 0, 0x5c00003129ULL }, // Inst #3276 = POPCNT32rr |
| 38825 | { 3275, 6, 1, 0, 278, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10004460010019ULL }, // Inst #3275 = POPCNT32rm_NF |
| 38826 | { 3274, 6, 1, 0, 278, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0xc004460010019ULL }, // Inst #3274 = POPCNT32rm_EVEX |
| 38827 | { 3273, 6, 1, 0, 278, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x5c00003119ULL }, // Inst #3273 = POPCNT32rm |
| 38828 | { 3272, 2, 1, 0, 279, 0, 0, X86ImpOpBase + 0, 547, 0, 0x10004460010829ULL }, // Inst #3272 = POPCNT16rr_NF |
| 38829 | { 3271, 2, 1, 0, 279, 0, 1, X86ImpOpBase + 0, 547, 0, 0xc004460010829ULL }, // Inst #3271 = POPCNT16rr_EVEX |
| 38830 | { 3270, 2, 1, 0, 1025, 0, 1, X86ImpOpBase + 0, 547, 0, 0x5c000030a9ULL }, // Inst #3270 = POPCNT16rr |
| 38831 | { 3269, 6, 1, 0, 278, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10004460010819ULL }, // Inst #3269 = POPCNT16rm_NF |
| 38832 | { 3268, 6, 1, 0, 278, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0xc004460010819ULL }, // Inst #3268 = POPCNT16rm_EVEX |
| 38833 | { 3267, 6, 1, 0, 278, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x5c00003099ULL }, // Inst #3267 = POPCNT16rm |
| 38834 | { 3266, 0, 0, 0, 682, 1, 8, X86ImpOpBase + 399, 1, 0|(1ULL<<MCID::MayLoad), 0x3080000101ULL }, // Inst #3266 = POPA32 |
| 38835 | { 3265, 0, 0, 0, 682, 1, 8, X86ImpOpBase + 399, 1, 0|(1ULL<<MCID::MayLoad), 0x3080000081ULL }, // Inst #3265 = POPA16 |
| 38836 | { 3264, 1, 1, 0, 619, 1, 1, X86ImpOpBase + 397, 202, 0|(1ULL<<MCID::MayLoad), 0x4780000130ULL }, // Inst #3264 = POP64rmr |
| 38837 | { 3263, 5, 0, 0, 652, 1, 1, X86ImpOpBase + 397, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4780000120ULL }, // Inst #3263 = POP64rmm |
| 38838 | { 3262, 1, 1, 0, 857, 1, 1, X86ImpOpBase + 397, 202, 0|(1ULL<<MCID::MayLoad), 0x2c00000102ULL }, // Inst #3262 = POP64r |
| 38839 | { 3261, 1, 1, 0, 1440, 1, 1, X86ImpOpBase + 27, 201, 0|(1ULL<<MCID::MayLoad), 0x4780000130ULL }, // Inst #3261 = POP32rmr |
| 38840 | { 3260, 5, 0, 0, 652, 1, 1, X86ImpOpBase + 27, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4780000120ULL }, // Inst #3260 = POP32rmm |
| 38841 | { 3259, 1, 1, 0, 1441, 1, 1, X86ImpOpBase + 27, 201, 0|(1ULL<<MCID::MayLoad), 0x2c00000102ULL }, // Inst #3259 = POP32r |
| 38842 | { 3258, 2, 2, 0, 72, 1, 1, X86ImpOpBase + 397, 553, 0|(1ULL<<MCID::MayLoad), 0x10c7e0030030ULL }, // Inst #3258 = POP2P |
| 38843 | { 3257, 2, 2, 0, 72, 1, 1, X86ImpOpBase + 397, 553, 0|(1ULL<<MCID::MayLoad), 0x10c7e0010030ULL }, // Inst #3257 = POP2 |
| 38844 | { 3256, 1, 1, 0, 1440, 1, 1, X86ImpOpBase + 27, 577, 0|(1ULL<<MCID::MayLoad), 0x47800000b0ULL }, // Inst #3256 = POP16rmr |
| 38845 | { 3255, 5, 0, 0, 921, 1, 1, X86ImpOpBase + 27, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x47800000a0ULL }, // Inst #3255 = POP16rmm |
| 38846 | { 3254, 1, 1, 0, 638, 1, 1, X86ImpOpBase + 27, 577, 0|(1ULL<<MCID::MayLoad), 0x2c00000082ULL }, // Inst #3254 = POP16r |
| 38847 | { 3253, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7a18002829ULL }, // Inst #3253 = PMULUDQrr |
| 38848 | { 3252, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7a18002819ULL }, // Inst #3252 = PMULUDQrm |
| 38849 | { 3251, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x6a98002829ULL }, // Inst #3251 = PMULLWrr |
| 38850 | { 3250, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6a98002819ULL }, // Inst #3250 = PMULLWrm |
| 38851 | { 3249, 3, 1, 0, 276, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x2018004829ULL }, // Inst #3249 = PMULLDrr |
| 38852 | { 3248, 7, 1, 0, 275, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2018004819ULL }, // Inst #3248 = PMULLDrm |
| 38853 | { 3247, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7298002829ULL }, // Inst #3247 = PMULHWrr |
| 38854 | { 3246, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7298002819ULL }, // Inst #3246 = PMULHWrm |
| 38855 | { 3245, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7218002829ULL }, // Inst #3245 = PMULHUWrr |
| 38856 | { 3244, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7218002819ULL }, // Inst #3244 = PMULHUWrm |
| 38857 | { 3243, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x5b8000e029ULL }, // Inst #3243 = PMULHRWrr |
| 38858 | { 3242, 7, 1, 0, 210, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x5b8000e019ULL }, // Inst #3242 = PMULHRWrm |
| 38859 | { 3241, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x598004829ULL }, // Inst #3241 = PMULHRSWrr |
| 38860 | { 3240, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x598004819ULL }, // Inst #3240 = PMULHRSWrm |
| 38861 | { 3239, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x1418004829ULL }, // Inst #3239 = PMULDQrr |
| 38862 | { 3238, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1418004819ULL }, // Inst #3238 = PMULDQrm |
| 38863 | { 3237, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1a18004829ULL }, // Inst #3237 = PMOVZXWQrr |
| 38864 | { 3236, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1a18004819ULL }, // Inst #3236 = PMOVZXWQrm |
| 38865 | { 3235, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1998004829ULL }, // Inst #3235 = PMOVZXWDrr |
| 38866 | { 3234, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1998004819ULL }, // Inst #3234 = PMOVZXWDrm |
| 38867 | { 3233, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1a98004829ULL }, // Inst #3233 = PMOVZXDQrr |
| 38868 | { 3232, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1a98004819ULL }, // Inst #3232 = PMOVZXDQrm |
| 38869 | { 3231, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1818004829ULL }, // Inst #3231 = PMOVZXBWrr |
| 38870 | { 3230, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1818004819ULL }, // Inst #3230 = PMOVZXBWrm |
| 38871 | { 3229, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1918004829ULL }, // Inst #3229 = PMOVZXBQrr |
| 38872 | { 3228, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1918004819ULL }, // Inst #3228 = PMOVZXBQrm |
| 38873 | { 3227, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1898004829ULL }, // Inst #3227 = PMOVZXBDrr |
| 38874 | { 3226, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1898004819ULL }, // Inst #3226 = PMOVZXBDrm |
| 38875 | { 3225, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1218004829ULL }, // Inst #3225 = PMOVSXWQrr |
| 38876 | { 3224, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1218004819ULL }, // Inst #3224 = PMOVSXWQrm |
| 38877 | { 3223, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1198004829ULL }, // Inst #3223 = PMOVSXWDrr |
| 38878 | { 3222, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1198004819ULL }, // Inst #3222 = PMOVSXWDrm |
| 38879 | { 3221, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1298004829ULL }, // Inst #3221 = PMOVSXDQrr |
| 38880 | { 3220, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1298004819ULL }, // Inst #3220 = PMOVSXDQrm |
| 38881 | { 3219, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1018004829ULL }, // Inst #3219 = PMOVSXBWrr |
| 38882 | { 3218, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1018004819ULL }, // Inst #3218 = PMOVSXBWrm |
| 38883 | { 3217, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1118004829ULL }, // Inst #3217 = PMOVSXBQrr |
| 38884 | { 3216, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1118004819ULL }, // Inst #3216 = PMOVSXBQrm |
| 38885 | { 3215, 2, 1, 0, 1128, 0, 0, X86ImpOpBase + 0, 535, 0, 0x1098004829ULL }, // Inst #3215 = PMOVSXBDrr |
| 38886 | { 3214, 6, 1, 0, 849, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1098004819ULL }, // Inst #3214 = PMOVSXBDrm |
| 38887 | { 3213, 2, 1, 0, 273, 0, 0, X86ImpOpBase + 0, 1003, 0, 0x6b98002829ULL }, // Inst #3213 = PMOVMSKBrr |
| 38888 | { 3212, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x1d18004829ULL }, // Inst #3212 = PMINUWrr |
| 38889 | { 3211, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1d18004819ULL }, // Inst #3211 = PMINUWrm |
| 38890 | { 3210, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x1d98004829ULL }, // Inst #3210 = PMINUDrr |
| 38891 | { 3209, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1d98004819ULL }, // Inst #3209 = PMINUDrm |
| 38892 | { 3208, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x6d18002829ULL }, // Inst #3208 = PMINUBrr |
| 38893 | { 3207, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6d18002819ULL }, // Inst #3207 = PMINUBrm |
| 38894 | { 3206, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7518002829ULL }, // Inst #3206 = PMINSWrr |
| 38895 | { 3205, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7518002819ULL }, // Inst #3205 = PMINSWrm |
| 38896 | { 3204, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x1c98004829ULL }, // Inst #3204 = PMINSDrr |
| 38897 | { 3203, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1c98004819ULL }, // Inst #3203 = PMINSDrm |
| 38898 | { 3202, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x1c18004829ULL }, // Inst #3202 = PMINSBrr |
| 38899 | { 3201, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1c18004819ULL }, // Inst #3201 = PMINSBrm |
| 38900 | { 3200, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x1f18004829ULL }, // Inst #3200 = PMAXUWrr |
| 38901 | { 3199, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1f18004819ULL }, // Inst #3199 = PMAXUWrm |
| 38902 | { 3198, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x1f98004829ULL }, // Inst #3198 = PMAXUDrr |
| 38903 | { 3197, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1f98004819ULL }, // Inst #3197 = PMAXUDrm |
| 38904 | { 3196, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x6f18002829ULL }, // Inst #3196 = PMAXUBrr |
| 38905 | { 3195, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6f18002819ULL }, // Inst #3195 = PMAXUBrm |
| 38906 | { 3194, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7718002829ULL }, // Inst #3194 = PMAXSWrr |
| 38907 | { 3193, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7718002819ULL }, // Inst #3193 = PMAXSWrm |
| 38908 | { 3192, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x1e98004829ULL }, // Inst #3192 = PMAXSDrr |
| 38909 | { 3191, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1e98004819ULL }, // Inst #3191 = PMAXSDrm |
| 38910 | { 3190, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x1e18004829ULL }, // Inst #3190 = PMAXSBrr |
| 38911 | { 3189, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1e18004819ULL }, // Inst #3189 = PMAXSBrm |
| 38912 | { 3188, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7a98002829ULL }, // Inst #3188 = PMADDWDrr |
| 38913 | { 3187, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7a98002819ULL }, // Inst #3187 = PMADDWDrm |
| 38914 | { 3186, 3, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 472, 0, 0x218004829ULL }, // Inst #3186 = PMADDUBSWrr |
| 38915 | { 3185, 7, 1, 0, 148, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x218004819ULL }, // Inst #3185 = PMADDUBSWrm |
| 38916 | { 3184, 4, 1, 0, 209, 0, 0, X86ImpOpBase + 0, 1403, 0, 0x6218042829ULL }, // Inst #3184 = PINSRWrr |
| 38917 | { 3183, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x6218042819ULL }, // Inst #3183 = PINSRWrm |
| 38918 | { 3182, 4, 1, 0, 209, 0, 0, X86ImpOpBase + 0, 1407, 0, 0x1118066829ULL }, // Inst #3182 = PINSRQrr |
| 38919 | { 3181, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x1118066819ULL }, // Inst #3181 = PINSRQrm |
| 38920 | { 3180, 4, 1, 0, 209, 0, 0, X86ImpOpBase + 0, 1403, 0, 0x1118046829ULL }, // Inst #3180 = PINSRDrr |
| 38921 | { 3179, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x1118046819ULL }, // Inst #3179 = PINSRDrm |
| 38922 | { 3178, 4, 1, 0, 209, 0, 0, X86ImpOpBase + 0, 1403, 0, 0x1018046829ULL }, // Inst #3178 = PINSRBrr |
| 38923 | { 3177, 8, 1, 0, 208, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x1018046819ULL }, // Inst #3177 = PINSRBrm |
| 38924 | { 3176, 2, 1, 0, 93, 0, 0, X86ImpOpBase + 0, 1242, 0, 0x60000e029ULL }, // Inst #3176 = PI2FWrr |
| 38925 | { 3175, 6, 1, 0, 272, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0x60000e019ULL }, // Inst #3175 = PI2FWrm |
| 38926 | { 3174, 2, 1, 0, 93, 0, 0, X86ImpOpBase + 0, 1242, 0, 0x68000e029ULL }, // Inst #3174 = PI2FDrr |
| 38927 | { 3173, 6, 1, 0, 272, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0x68000e019ULL }, // Inst #3173 = PI2FDrm |
| 38928 | { 3172, 3, 1, 0, 1186, 0, 0, X86ImpOpBase + 0, 472, 0, 0x298004829ULL }, // Inst #3172 = PHSUBWrr |
| 38929 | { 3171, 7, 1, 0, 1187, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x298004819ULL }, // Inst #3171 = PHSUBWrm |
| 38930 | { 3170, 3, 1, 0, 1207, 0, 0, X86ImpOpBase + 0, 472, 0, 0x398004829ULL }, // Inst #3170 = PHSUBSWrr |
| 38931 | { 3169, 7, 1, 0, 1215, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x398004819ULL }, // Inst #3169 = PHSUBSWrm |
| 38932 | { 3168, 3, 1, 0, 654, 0, 0, X86ImpOpBase + 0, 472, 0, 0x318004829ULL }, // Inst #3168 = PHSUBDrr |
| 38933 | { 3167, 7, 1, 0, 663, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x318004819ULL }, // Inst #3167 = PHSUBDrm |
| 38934 | { 3166, 2, 1, 0, 271, 0, 0, X86ImpOpBase + 0, 535, 0, 0x2098004829ULL }, // Inst #3166 = PHMINPOSUWrr |
| 38935 | { 3165, 6, 1, 0, 270, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x2098004819ULL }, // Inst #3165 = PHMINPOSUWrm |
| 38936 | { 3164, 3, 1, 0, 1186, 0, 0, X86ImpOpBase + 0, 472, 0, 0x98004829ULL }, // Inst #3164 = PHADDWrr |
| 38937 | { 3163, 7, 1, 0, 1187, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x98004819ULL }, // Inst #3163 = PHADDWrm |
| 38938 | { 3162, 3, 1, 0, 1207, 0, 0, X86ImpOpBase + 0, 472, 0, 0x198004829ULL }, // Inst #3162 = PHADDSWrr |
| 38939 | { 3161, 7, 1, 0, 1215, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x198004819ULL }, // Inst #3161 = PHADDSWrm |
| 38940 | { 3160, 3, 1, 0, 654, 0, 0, X86ImpOpBase + 0, 472, 0, 0x118004829ULL }, // Inst #3160 = PHADDDrr |
| 38941 | { 3159, 7, 1, 0, 663, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x118004819ULL }, // Inst #3159 = PHADDDrm |
| 38942 | { 3158, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x4d0000e029ULL }, // Inst #3158 = PFSUBrr |
| 38943 | { 3157, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x4d0000e019ULL }, // Inst #3157 = PFSUBrm |
| 38944 | { 3156, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x550000e029ULL }, // Inst #3156 = PFSUBRrr |
| 38945 | { 3155, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x550000e019ULL }, // Inst #3155 = PFSUBRrm |
| 38946 | { 3154, 2, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1242, 0, 0x4b8000e029ULL }, // Inst #3154 = PFRSQRTrr |
| 38947 | { 3153, 6, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0x4b8000e019ULL }, // Inst #3153 = PFRSQRTrm |
| 38948 | { 3152, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x538000e029ULL }, // Inst #3152 = PFRSQIT1rr |
| 38949 | { 3151, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x538000e019ULL }, // Inst #3151 = PFRSQIT1rm |
| 38950 | { 3150, 2, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1242, 0, 0x4b0000e029ULL }, // Inst #3150 = PFRCPrr |
| 38951 | { 3149, 6, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0x4b0000e019ULL }, // Inst #3149 = PFRCPrm |
| 38952 | { 3148, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x5b0000e029ULL }, // Inst #3148 = PFRCPIT2rr |
| 38953 | { 3147, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x5b0000e019ULL }, // Inst #3147 = PFRCPIT2rm |
| 38954 | { 3146, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x530000e029ULL }, // Inst #3146 = PFRCPIT1rr |
| 38955 | { 3145, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x530000e019ULL }, // Inst #3145 = PFRCPIT1rm |
| 38956 | { 3144, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x470000e029ULL }, // Inst #3144 = PFPNACCrr |
| 38957 | { 3143, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x470000e019ULL }, // Inst #3143 = PFPNACCrm |
| 38958 | { 3142, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x450000e029ULL }, // Inst #3142 = PFNACCrr |
| 38959 | { 3141, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x450000e019ULL }, // Inst #3141 = PFNACCrm |
| 38960 | { 3140, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x5a0000e029ULL }, // Inst #3140 = PFMULrr |
| 38961 | { 3139, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x5a0000e019ULL }, // Inst #3139 = PFMULrm |
| 38962 | { 3138, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x4a0000e029ULL }, // Inst #3138 = PFMINrr |
| 38963 | { 3137, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x4a0000e019ULL }, // Inst #3137 = PFMINrm |
| 38964 | { 3136, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x520000e029ULL }, // Inst #3136 = PFMAXrr |
| 38965 | { 3135, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x520000e019ULL }, // Inst #3135 = PFMAXrm |
| 38966 | { 3134, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x500000e029ULL }, // Inst #3134 = PFCMPGTrr |
| 38967 | { 3133, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x500000e019ULL }, // Inst #3133 = PFCMPGTrm |
| 38968 | { 3132, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x480000e029ULL }, // Inst #3132 = PFCMPGErr |
| 38969 | { 3131, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x480000e019ULL }, // Inst #3131 = PFCMPGErm |
| 38970 | { 3130, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x580000e029ULL }, // Inst #3130 = PFCMPEQrr |
| 38971 | { 3129, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x580000e019ULL }, // Inst #3129 = PFCMPEQrm |
| 38972 | { 3128, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x4f0000e029ULL }, // Inst #3128 = PFADDrr |
| 38973 | { 3127, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x4f0000e019ULL }, // Inst #3127 = PFADDrm |
| 38974 | { 3126, 3, 1, 0, 35, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x570000e029ULL }, // Inst #3126 = PFACCrr |
| 38975 | { 3125, 7, 1, 0, 34, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x570000e019ULL }, // Inst #3125 = PFACCrm |
| 38976 | { 3124, 2, 1, 0, 99, 0, 0, X86ImpOpBase + 0, 1242, 0, 0xe0000e029ULL }, // Inst #3124 = PF2IWrr |
| 38977 | { 3123, 6, 1, 0, 267, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0xe0000e019ULL }, // Inst #3123 = PF2IWrm |
| 38978 | { 3122, 2, 1, 0, 99, 0, 0, X86ImpOpBase + 0, 1242, 0, 0xe8000e029ULL }, // Inst #3122 = PF2IDrr |
| 38979 | { 3121, 6, 1, 0, 267, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0xe8000e019ULL }, // Inst #3121 = PF2IDrm |
| 38980 | { 3120, 3, 1, 0, 664, 0, 0, X86ImpOpBase + 0, 1037, 0, 0xa98046828ULL }, // Inst #3120 = PEXTRWrr_REV |
| 38981 | { 3119, 3, 1, 0, 664, 0, 0, X86ImpOpBase + 0, 1037, 0, 0x6298042829ULL }, // Inst #3119 = PEXTRWrr |
| 38982 | { 3118, 7, 0, 0, 142, 0, 0, X86ImpOpBase + 0, 1030, 0|(1ULL<<MCID::MayStore), 0xa98046818ULL }, // Inst #3118 = PEXTRWmr |
| 38983 | { 3117, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 1400, 0, 0xb18066828ULL }, // Inst #3117 = PEXTRQrr |
| 38984 | { 3116, 7, 0, 0, 767, 0, 0, X86ImpOpBase + 0, 1030, 0|(1ULL<<MCID::MayStore), 0xb18066818ULL }, // Inst #3116 = PEXTRQmr |
| 38985 | { 3115, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 1037, 0, 0xb18046828ULL }, // Inst #3115 = PEXTRDrr |
| 38986 | { 3114, 7, 0, 0, 767, 0, 0, X86ImpOpBase + 0, 1030, 0|(1ULL<<MCID::MayStore), 0xb18046818ULL }, // Inst #3114 = PEXTRDmr |
| 38987 | { 3113, 3, 1, 0, 143, 0, 0, X86ImpOpBase + 0, 1037, 0, 0xa18046828ULL }, // Inst #3113 = PEXTRBrr |
| 38988 | { 3112, 7, 0, 0, 142, 0, 0, X86ImpOpBase + 0, 1030, 0|(1ULL<<MCID::MayStore), 0xa18046818ULL }, // Inst #3112 = PEXTRBmr |
| 38989 | { 3111, 3, 1, 0, 867, 0, 0, X86ImpOpBase + 0, 422, 0, 0xfae0025029ULL }, // Inst #3111 = PEXT64rr_EVEX |
| 38990 | { 3110, 3, 1, 0, 1017, 0, 0, X86ImpOpBase + 0, 422, 0, 0xfaa0025029ULL }, // Inst #3110 = PEXT64rr |
| 38991 | { 3109, 7, 1, 0, 848, 0, 0, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0xfae0025019ULL }, // Inst #3109 = PEXT64rm_EVEX |
| 38992 | { 3108, 7, 1, 0, 1589, 0, 0, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0xfaa0025019ULL }, // Inst #3108 = PEXT64rm |
| 38993 | { 3107, 3, 1, 0, 867, 0, 0, X86ImpOpBase + 0, 225, 0, 0xfae0005029ULL }, // Inst #3107 = PEXT32rr_EVEX |
| 38994 | { 3106, 3, 1, 0, 1017, 0, 0, X86ImpOpBase + 0, 225, 0, 0xfaa0005029ULL }, // Inst #3106 = PEXT32rr |
| 38995 | { 3105, 7, 1, 0, 848, 0, 0, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0xfae0005019ULL }, // Inst #3105 = PEXT32rm_EVEX |
| 38996 | { 3104, 7, 1, 0, 1589, 0, 0, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0xfaa0005019ULL }, // Inst #3104 = PEXT32rm |
| 38997 | { 3103, 3, 1, 0, 867, 0, 0, X86ImpOpBase + 0, 422, 0, 0xfae0025829ULL }, // Inst #3103 = PDEP64rr_EVEX |
| 38998 | { 3102, 3, 1, 0, 1017, 0, 0, X86ImpOpBase + 0, 422, 0, 0xfaa0025829ULL }, // Inst #3102 = PDEP64rr |
| 38999 | { 3101, 7, 1, 0, 848, 0, 0, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0xfae0025819ULL }, // Inst #3101 = PDEP64rm_EVEX |
| 39000 | { 3100, 7, 1, 0, 1589, 0, 0, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0xfaa0025819ULL }, // Inst #3100 = PDEP64rm |
| 39001 | { 3099, 3, 1, 0, 867, 0, 0, X86ImpOpBase + 0, 225, 0, 0xfae0005829ULL }, // Inst #3099 = PDEP32rr_EVEX |
| 39002 | { 3098, 3, 1, 0, 1017, 0, 0, X86ImpOpBase + 0, 225, 0, 0xfaa0005829ULL }, // Inst #3098 = PDEP32rr |
| 39003 | { 3097, 7, 1, 0, 848, 0, 0, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0xfae0005819ULL }, // Inst #3097 = PDEP32rm_EVEX |
| 39004 | { 3096, 7, 1, 0, 1589, 0, 0, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0xfaa0005819ULL }, // Inst #3096 = PDEP32rm |
| 39005 | { 3095, 0, 0, 0, 8, 4, 5, X86ImpOpBase + 388, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002045ULL }, // Inst #3095 = PCONFIG |
| 39006 | { 3094, 3, 0, 0, 266, 0, 2, X86ImpOpBase + 386, 544, 0, 0x3118046829ULL }, // Inst #3094 = PCMPISTRMrri |
| 39007 | { 3093, 7, 0, 0, 265, 0, 2, X86ImpOpBase + 386, 537, 0|(1ULL<<MCID::MayLoad), 0x3118046819ULL }, // Inst #3093 = PCMPISTRMrmi |
| 39008 | { 3092, 3, 0, 0, 264, 0, 2, X86ImpOpBase + 384, 544, 0, 0x3198046829ULL }, // Inst #3092 = PCMPISTRIrri |
| 39009 | { 3091, 7, 0, 0, 263, 0, 2, X86ImpOpBase + 384, 537, 0|(1ULL<<MCID::MayLoad), 0x3198046819ULL }, // Inst #3091 = PCMPISTRIrmi |
| 39010 | { 3090, 3, 1, 0, 1218, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3298002829ULL }, // Inst #3090 = PCMPGTWrr |
| 39011 | { 3089, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3298002819ULL }, // Inst #3089 = PCMPGTWrm |
| 39012 | { 3088, 3, 1, 0, 917, 0, 0, X86ImpOpBase + 0, 472, 0, 0x1b98004829ULL }, // Inst #3088 = PCMPGTQrr |
| 39013 | { 3087, 7, 1, 0, 919, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1b98004819ULL }, // Inst #3087 = PCMPGTQrm |
| 39014 | { 3086, 3, 1, 0, 1218, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3318002829ULL }, // Inst #3086 = PCMPGTDrr |
| 39015 | { 3085, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3318002819ULL }, // Inst #3085 = PCMPGTDrm |
| 39016 | { 3084, 3, 1, 0, 1218, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3218002829ULL }, // Inst #3084 = PCMPGTBrr |
| 39017 | { 3083, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3218002819ULL }, // Inst #3083 = PCMPGTBrm |
| 39018 | { 3082, 3, 0, 0, 262, 2, 2, X86ImpOpBase + 380, 544, 0, 0x3018046829ULL }, // Inst #3082 = PCMPESTRMrri |
| 39019 | { 3081, 7, 0, 0, 261, 2, 2, X86ImpOpBase + 380, 537, 0|(1ULL<<MCID::MayLoad), 0x3018046819ULL }, // Inst #3081 = PCMPESTRMrmi |
| 39020 | { 3080, 3, 0, 0, 260, 2, 2, X86ImpOpBase + 376, 544, 0, 0x3098046829ULL }, // Inst #3080 = PCMPESTRIrri |
| 39021 | { 3079, 7, 0, 0, 259, 2, 2, X86ImpOpBase + 376, 537, 0|(1ULL<<MCID::MayLoad), 0x3098046819ULL }, // Inst #3079 = PCMPESTRIrmi |
| 39022 | { 3078, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x3a98002829ULL }, // Inst #3078 = PCMPEQWrr |
| 39023 | { 3077, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3a98002819ULL }, // Inst #3077 = PCMPEQWrm |
| 39024 | { 3076, 3, 1, 0, 916, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x1498004829ULL }, // Inst #3076 = PCMPEQQrr |
| 39025 | { 3075, 7, 1, 0, 918, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1498004819ULL }, // Inst #3075 = PCMPEQQrm |
| 39026 | { 3074, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x3b18002829ULL }, // Inst #3074 = PCMPEQDrr |
| 39027 | { 3073, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3b18002819ULL }, // Inst #3073 = PCMPEQDrm |
| 39028 | { 3072, 3, 1, 0, 144, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x3a18002829ULL }, // Inst #3072 = PCMPEQBrr |
| 39029 | { 3071, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3a18002819ULL }, // Inst #3071 = PCMPEQBrm |
| 39030 | { 3070, 4, 1, 0, 258, 0, 0, X86ImpOpBase + 0, 563, 0|(1ULL<<MCID::Commutable), 0x2218046829ULL }, // Inst #3070 = PCLMULQDQrri |
| 39031 | { 3069, 8, 1, 0, 257, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x2218046819ULL }, // Inst #3069 = PCLMULQDQrmi |
| 39032 | { 3068, 0, 0, 0, 8, 2, 2, X86ImpOpBase + 372, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002047ULL }, // Inst #3068 = PBNDKB |
| 39033 | { 3067, 4, 1, 0, 256, 0, 0, X86ImpOpBase + 0, 563, 0|(1ULL<<MCID::Commutable), 0x718046829ULL }, // Inst #3067 = PBLENDWrri |
| 39034 | { 3066, 8, 1, 0, 255, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x718046819ULL }, // Inst #3066 = PBLENDWrmi |
| 39035 | { 3065, 3, 1, 0, 254, 1, 0, X86ImpOpBase + 111, 472, 0, 0x818004829ULL }, // Inst #3065 = PBLENDVBrr0 |
| 39036 | { 3064, 7, 1, 0, 253, 1, 0, X86ImpOpBase + 111, 465, 0|(1ULL<<MCID::MayLoad), 0x818004819ULL }, // Inst #3064 = PBLENDVBrm0 |
| 39037 | { 3063, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7198002829ULL }, // Inst #3063 = PAVGWrr |
| 39038 | { 3062, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7198002819ULL }, // Inst #3062 = PAVGWrm |
| 39039 | { 3061, 3, 1, 0, 3, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x5f8000e029ULL }, // Inst #3061 = PAVGUSBrr |
| 39040 | { 3060, 7, 1, 0, 203, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x5f8000e019ULL }, // Inst #3060 = PAVGUSBrm |
| 39041 | { 3059, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7018002829ULL }, // Inst #3059 = PAVGBrr |
| 39042 | { 3058, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7018002819ULL }, // Inst #3058 = PAVGBrm |
| 39043 | { 3057, 0, 0, 0, 693, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4800001001ULL }, // Inst #3057 = PAUSE |
| 39044 | { 3056, 3, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x6d98002829ULL }, // Inst #3056 = PANDrr |
| 39045 | { 3055, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6d98002819ULL }, // Inst #3055 = PANDrm |
| 39046 | { 3054, 3, 1, 0, 1191, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6f98002829ULL }, // Inst #3054 = PANDNrr |
| 39047 | { 3053, 7, 1, 0, 252, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6f98002819ULL }, // Inst #3053 = PANDNrm |
| 39048 | { 3052, 4, 1, 0, 1588, 0, 0, X86ImpOpBase + 0, 563, 0, 0x798046829ULL }, // Inst #3052 = PALIGNRrri |
| 39049 | { 3051, 8, 1, 0, 1587, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x798046819ULL }, // Inst #3051 = PALIGNRrmi |
| 39050 | { 3050, 3, 1, 0, 1203, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7e98002829ULL }, // Inst #3050 = PADDWrr |
| 39051 | { 3049, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7e98002819ULL }, // Inst #3049 = PADDWrm |
| 39052 | { 3048, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x6e98002829ULL }, // Inst #3048 = PADDUSWrr |
| 39053 | { 3047, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6e98002819ULL }, // Inst #3047 = PADDUSWrm |
| 39054 | { 3046, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x6e18002829ULL }, // Inst #3046 = PADDUSBrr |
| 39055 | { 3045, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6e18002819ULL }, // Inst #3045 = PADDUSBrm |
| 39056 | { 3044, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7698002829ULL }, // Inst #3044 = PADDSWrr |
| 39057 | { 3043, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7698002819ULL }, // Inst #3043 = PADDSWrm |
| 39058 | { 3042, 3, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7618002829ULL }, // Inst #3042 = PADDSBrr |
| 39059 | { 3041, 7, 1, 0, 150, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7618002819ULL }, // Inst #3041 = PADDSBrm |
| 39060 | { 3040, 3, 1, 0, 648, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x6a18002829ULL }, // Inst #3040 = PADDQrr |
| 39061 | { 3039, 7, 1, 0, 659, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6a18002819ULL }, // Inst #3039 = PADDQrm |
| 39062 | { 3038, 3, 1, 0, 1203, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7f18002829ULL }, // Inst #3038 = PADDDrr |
| 39063 | { 3037, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7f18002819ULL }, // Inst #3037 = PADDDrm |
| 39064 | { 3036, 3, 1, 0, 1203, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x7e18002829ULL }, // Inst #3036 = PADDBrr |
| 39065 | { 3035, 7, 1, 0, 1210, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x7e18002819ULL }, // Inst #3035 = PADDBrm |
| 39066 | { 3034, 3, 1, 0, 1586, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3398002829ULL }, // Inst #3034 = PACKUSWBrr |
| 39067 | { 3033, 7, 1, 0, 1585, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3398002819ULL }, // Inst #3033 = PACKUSWBrm |
| 39068 | { 3032, 3, 1, 0, 1586, 0, 0, X86ImpOpBase + 0, 472, 0, 0x1598004829ULL }, // Inst #3032 = PACKUSDWrr |
| 39069 | { 3031, 7, 1, 0, 1585, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1598004819ULL }, // Inst #3031 = PACKUSDWrm |
| 39070 | { 3030, 3, 1, 0, 1586, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3198002829ULL }, // Inst #3030 = PACKSSWBrr |
| 39071 | { 3029, 7, 1, 0, 1585, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3198002819ULL }, // Inst #3029 = PACKSSWBrm |
| 39072 | { 3028, 3, 1, 0, 1586, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3598002829ULL }, // Inst #3028 = PACKSSDWrr |
| 39073 | { 3027, 7, 1, 0, 1585, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x3598002819ULL }, // Inst #3027 = PACKSSDWrm |
| 39074 | { 3026, 2, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 535, 0, 0xe98004829ULL }, // Inst #3026 = PABSWrr |
| 39075 | { 3025, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0xe98004819ULL }, // Inst #3025 = PABSWrm |
| 39076 | { 3024, 2, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 535, 0, 0xf18004829ULL }, // Inst #3024 = PABSDrr |
| 39077 | { 3023, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0xf18004819ULL }, // Inst #3023 = PABSDrm |
| 39078 | { 3022, 2, 1, 0, 1040, 0, 0, X86ImpOpBase + 0, 535, 0, 0xe18004829ULL }, // Inst #3022 = PABSBrr |
| 39079 | { 3021, 6, 1, 0, 249, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0xe18004819ULL }, // Inst #3021 = PABSBrm |
| 39080 | { 3020, 2, 0, 0, 719, 3, 1, X86ImpOpBase + 368, 1212, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000084ULL }, // Inst #3020 = OUTSW |
| 39081 | { 3019, 2, 0, 0, 1584, 3, 1, X86ImpOpBase + 368, 1212, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000104ULL }, // Inst #3019 = OUTSL |
| 39082 | { 3018, 2, 0, 0, 1583, 3, 1, X86ImpOpBase + 368, 1212, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3700000004ULL }, // Inst #3018 = OUTSB |
| 39083 | { 3017, 0, 0, 0, 715, 2, 0, X86ImpOpBase + 282, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7700000001ULL }, // Inst #3017 = OUT8rr |
| 39084 | { 3016, 1, 0, 0, 718, 1, 0, X86ImpOpBase + 281, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7300040001ULL }, // Inst #3016 = OUT8ir |
| 39085 | { 3015, 0, 0, 0, 1582, 2, 0, X86ImpOpBase + 279, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7780000101ULL }, // Inst #3015 = OUT32rr |
| 39086 | { 3014, 1, 0, 0, 1581, 1, 0, X86ImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7380040101ULL }, // Inst #3014 = OUT32ir |
| 39087 | { 3013, 0, 0, 0, 1580, 2, 0, X86ImpOpBase + 277, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7780000081ULL }, // Inst #3013 = OUT16rr |
| 39088 | { 3012, 1, 0, 0, 1579, 1, 0, X86ImpOpBase + 276, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7380040081ULL }, // Inst #3012 = OUT16ir |
| 39089 | { 3011, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x2b08002029ULL }, // Inst #3011 = ORPSrr |
| 39090 | { 3010, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2b08002019ULL }, // Inst #3010 = ORPSrm |
| 39091 | { 3009, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x2b10002829ULL }, // Inst #3009 = ORPDrr |
| 39092 | { 3008, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2b10002819ULL }, // Inst #3008 = ORPDrm |
| 39093 | { 3007, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 173, 0, 0x500000029ULL }, // Inst #3007 = OR8rr_REV |
| 39094 | { 3006, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 173, 0, 0x10000560010029ULL }, // Inst #3006 = OR8rr_NF_REV |
| 39095 | { 3005, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 462, 0, 0x10108560010029ULL }, // Inst #3005 = OR8rr_NF_ND_REV |
| 39096 | { 3004, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::Commutable), 0x10108460010028ULL }, // Inst #3004 = OR8rr_NF_ND |
| 39097 | { 3003, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Commutable), 0x10000460010028ULL }, // Inst #3003 = OR8rr_NF |
| 39098 | { 3002, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 462, 0, 0x108560010029ULL }, // Inst #3002 = OR8rr_ND_REV |
| 39099 | { 3001, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::Commutable), 0x108460010028ULL }, // Inst #3001 = OR8rr_ND |
| 39100 | { 3000, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0, 0xc000560010029ULL }, // Inst #3000 = OR8rr_EVEX_REV |
| 39101 | { 2999, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Commutable), 0xc000460010028ULL }, // Inst #2999 = OR8rr_EVEX |
| 39102 | { 2998, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Commutable), 0x400000028ULL }, // Inst #2998 = OR8rr |
| 39103 | { 2997, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad), 0x10108560010019ULL }, // Inst #2997 = OR8rm_NF_ND |
| 39104 | { 2996, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0x10000560010019ULL }, // Inst #2996 = OR8rm_NF |
| 39105 | { 2995, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad), 0x108560010019ULL }, // Inst #2995 = OR8rm_ND |
| 39106 | { 2994, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0xc000560010019ULL }, // Inst #2994 = OR8rm_EVEX |
| 39107 | { 2993, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0x500000019ULL }, // Inst #2993 = OR8rm |
| 39108 | { 2992, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 445, 0, 0x1010c060050031ULL }, // Inst #2992 = OR8ri_NF_ND |
| 39109 | { 2991, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 170, 0, 0x10004060050031ULL }, // Inst #2991 = OR8ri_NF |
| 39110 | { 2990, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 445, 0, 0x10c060050031ULL }, // Inst #2990 = OR8ri_ND |
| 39111 | { 2989, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 170, 0, 0xc004060050031ULL }, // Inst #2989 = OR8ri_EVEX |
| 39112 | { 2988, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 170, 0, 0x4100040031ULL }, // Inst #2988 = OR8ri8 |
| 39113 | { 2987, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 170, 0, 0x4000040031ULL }, // Inst #2987 = OR8ri |
| 39114 | { 2986, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 438, 0|(1ULL<<MCID::MayLoad), 0x10108460010018ULL }, // Inst #2986 = OR8mr_NF_ND |
| 39115 | { 2985, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10000460010018ULL }, // Inst #2985 = OR8mr_NF |
| 39116 | { 2984, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 438, 0|(1ULL<<MCID::MayLoad), 0x108460010018ULL }, // Inst #2984 = OR8mr_ND |
| 39117 | { 2983, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000460010018ULL }, // Inst #2983 = OR8mr_EVEX |
| 39118 | { 2982, 6, 0, 0, 1454, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400000018ULL }, // Inst #2982 = OR8mr |
| 39119 | { 2981, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x1010c060050021ULL }, // Inst #2981 = OR8mi_NF_ND |
| 39120 | { 2980, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10004060050021ULL }, // Inst #2980 = OR8mi_NF |
| 39121 | { 2979, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x10c060050021ULL }, // Inst #2979 = OR8mi_ND |
| 39122 | { 2978, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050021ULL }, // Inst #2978 = OR8mi_EVEX |
| 39123 | { 2977, 6, 0, 0, 1451, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040021ULL }, // Inst #2977 = OR8mi8 |
| 39124 | { 2976, 6, 0, 0, 1451, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040021ULL }, // Inst #2976 = OR8mi |
| 39125 | { 2975, 1, 0, 0, 1458, 1, 2, X86ImpOpBase + 75, 1, 0, 0x600040001ULL }, // Inst #2975 = OR8i8 |
| 39126 | { 2974, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 167, 0, 0x580020029ULL }, // Inst #2974 = OR64rr_REV |
| 39127 | { 2973, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 167, 0, 0x100005e0030029ULL }, // Inst #2973 = OR64rr_NF_REV |
| 39128 | { 2972, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 422, 0, 0x101085e0030029ULL }, // Inst #2972 = OR64rr_NF_ND_REV |
| 39129 | { 2971, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Commutable), 0x101084e0030028ULL }, // Inst #2971 = OR64rr_NF_ND |
| 39130 | { 2970, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0x100004e0030028ULL }, // Inst #2970 = OR64rr_NF |
| 39131 | { 2969, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 422, 0, 0x1085e0030029ULL }, // Inst #2969 = OR64rr_ND_REV |
| 39132 | { 2968, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Commutable), 0x1084e0030028ULL }, // Inst #2968 = OR64rr_ND |
| 39133 | { 2967, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0, 0xc0005e0030029ULL }, // Inst #2967 = OR64rr_EVEX_REV |
| 39134 | { 2966, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0xc0004e0030028ULL }, // Inst #2966 = OR64rr_EVEX |
| 39135 | { 2965, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0x480020028ULL }, // Inst #2965 = OR64rr |
| 39136 | { 2964, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0x101085e0030019ULL }, // Inst #2964 = OR64rm_NF_ND |
| 39137 | { 2963, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x100005e0030019ULL }, // Inst #2963 = OR64rm_NF |
| 39138 | { 2962, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0x1085e0030019ULL }, // Inst #2962 = OR64rm_ND |
| 39139 | { 2961, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0xc0005e0030019ULL }, // Inst #2961 = OR64rm_EVEX |
| 39140 | { 2960, 7, 1, 0, 1464, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x580020019ULL }, // Inst #2960 = OR64rm |
| 39141 | { 2959, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 405, 0, 0x1010c1e0070031ULL }, // Inst #2959 = OR64ri8_NF_ND |
| 39142 | { 2958, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 164, 0, 0x100041e0070031ULL }, // Inst #2958 = OR64ri8_NF |
| 39143 | { 2957, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 405, 0, 0x10c1e0070031ULL }, // Inst #2957 = OR64ri8_ND |
| 39144 | { 2956, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0, 0xc0041e0070031ULL }, // Inst #2956 = OR64ri8_EVEX |
| 39145 | { 2955, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 164, 0, 0x4180060031ULL }, // Inst #2955 = OR64ri8 |
| 39146 | { 2954, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 405, 0, 0x1010c0e0230031ULL }, // Inst #2954 = OR64ri32_NF_ND |
| 39147 | { 2953, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 164, 0, 0x100040e0230031ULL }, // Inst #2953 = OR64ri32_NF |
| 39148 | { 2952, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 405, 0, 0x10c0e0230031ULL }, // Inst #2952 = OR64ri32_ND |
| 39149 | { 2951, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0, 0xc0040e0230031ULL }, // Inst #2951 = OR64ri32_EVEX |
| 39150 | { 2950, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 164, 0, 0x4080220031ULL }, // Inst #2950 = OR64ri32 |
| 39151 | { 2949, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x101084e0030018ULL }, // Inst #2949 = OR64mr_NF_ND |
| 39152 | { 2948, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100004e0030018ULL }, // Inst #2948 = OR64mr_NF |
| 39153 | { 2947, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x1084e0030018ULL }, // Inst #2947 = OR64mr_ND |
| 39154 | { 2946, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0004e0030018ULL }, // Inst #2946 = OR64mr_EVEX |
| 39155 | { 2945, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480020018ULL }, // Inst #2945 = OR64mr |
| 39156 | { 2944, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0070021ULL }, // Inst #2944 = OR64mi8_NF_ND |
| 39157 | { 2943, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0070021ULL }, // Inst #2943 = OR64mi8_NF |
| 39158 | { 2942, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070021ULL }, // Inst #2942 = OR64mi8_ND |
| 39159 | { 2941, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070021ULL }, // Inst #2941 = OR64mi8_EVEX |
| 39160 | { 2940, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060021ULL }, // Inst #2940 = OR64mi8 |
| 39161 | { 2939, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0230021ULL }, // Inst #2939 = OR64mi32_NF_ND |
| 39162 | { 2938, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0230021ULL }, // Inst #2938 = OR64mi32_NF |
| 39163 | { 2937, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230021ULL }, // Inst #2937 = OR64mi32_ND |
| 39164 | { 2936, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230021ULL }, // Inst #2936 = OR64mi32_EVEX |
| 39165 | { 2935, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220021ULL }, // Inst #2935 = OR64mi32 |
| 39166 | { 2934, 1, 0, 0, 1458, 1, 2, X86ImpOpBase + 72, 1, 0, 0x680220001ULL }, // Inst #2934 = OR64i32 |
| 39167 | { 2933, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 161, 0, 0x580000129ULL }, // Inst #2933 = OR32rr_REV |
| 39168 | { 2932, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 161, 0, 0x100005e0010029ULL }, // Inst #2932 = OR32rr_NF_REV |
| 39169 | { 2931, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 225, 0, 0x101085e0010029ULL }, // Inst #2931 = OR32rr_NF_ND_REV |
| 39170 | { 2930, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Commutable), 0x101084e0010028ULL }, // Inst #2930 = OR32rr_NF_ND |
| 39171 | { 2929, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0x100004e0010028ULL }, // Inst #2929 = OR32rr_NF |
| 39172 | { 2928, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 225, 0, 0x1085e0010029ULL }, // Inst #2928 = OR32rr_ND_REV |
| 39173 | { 2927, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Commutable), 0x1084e0010028ULL }, // Inst #2927 = OR32rr_ND |
| 39174 | { 2926, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0, 0xc0005e0010029ULL }, // Inst #2926 = OR32rr_EVEX_REV |
| 39175 | { 2925, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0xc0004e0010028ULL }, // Inst #2925 = OR32rr_EVEX |
| 39176 | { 2924, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0x480000128ULL }, // Inst #2924 = OR32rr |
| 39177 | { 2923, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0x101085e0010019ULL }, // Inst #2923 = OR32rm_NF_ND |
| 39178 | { 2922, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x100005e0010019ULL }, // Inst #2922 = OR32rm_NF |
| 39179 | { 2921, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0x1085e0010019ULL }, // Inst #2921 = OR32rm_ND |
| 39180 | { 2920, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0xc0005e0010019ULL }, // Inst #2920 = OR32rm_EVEX |
| 39181 | { 2919, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x580000119ULL }, // Inst #2919 = OR32rm |
| 39182 | { 2918, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 374, 0, 0x1010c0e0190031ULL }, // Inst #2918 = OR32ri_NF_ND |
| 39183 | { 2917, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 158, 0, 0x100040e0190031ULL }, // Inst #2917 = OR32ri_NF |
| 39184 | { 2916, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 374, 0, 0x10c0e0190031ULL }, // Inst #2916 = OR32ri_ND |
| 39185 | { 2915, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0, 0xc0040e0190031ULL }, // Inst #2915 = OR32ri_EVEX |
| 39186 | { 2914, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 374, 0, 0x1010c1e0050031ULL }, // Inst #2914 = OR32ri8_NF_ND |
| 39187 | { 2913, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 158, 0, 0x100041e0050031ULL }, // Inst #2913 = OR32ri8_NF |
| 39188 | { 2912, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 374, 0, 0x10c1e0050031ULL }, // Inst #2912 = OR32ri8_ND |
| 39189 | { 2911, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0, 0xc0041e0050031ULL }, // Inst #2911 = OR32ri8_EVEX |
| 39190 | { 2910, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 158, 0, 0x4180040131ULL }, // Inst #2910 = OR32ri8 |
| 39191 | { 2909, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 158, 0, 0x4080180131ULL }, // Inst #2909 = OR32ri |
| 39192 | { 2908, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x101084e0010018ULL }, // Inst #2908 = OR32mr_NF_ND |
| 39193 | { 2907, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100004e0010018ULL }, // Inst #2907 = OR32mr_NF |
| 39194 | { 2906, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x1084e0010018ULL }, // Inst #2906 = OR32mr_ND |
| 39195 | { 2905, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0004e0010018ULL }, // Inst #2905 = OR32mr_EVEX |
| 39196 | { 2904, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480000118ULL }, // Inst #2904 = OR32mr |
| 39197 | { 2903, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0190021ULL }, // Inst #2903 = OR32mi_NF_ND |
| 39198 | { 2902, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0190021ULL }, // Inst #2902 = OR32mi_NF |
| 39199 | { 2901, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190021ULL }, // Inst #2901 = OR32mi_ND |
| 39200 | { 2900, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190021ULL }, // Inst #2900 = OR32mi_EVEX |
| 39201 | { 2899, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050021ULL }, // Inst #2899 = OR32mi8_NF_ND |
| 39202 | { 2898, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050021ULL }, // Inst #2898 = OR32mi8_NF |
| 39203 | { 2897, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050021ULL }, // Inst #2897 = OR32mi8_ND |
| 39204 | { 2896, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050021ULL }, // Inst #2896 = OR32mi8_EVEX |
| 39205 | { 2895, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4182040121ULL }, // Inst #2895 = OR32mi8Locked |
| 39206 | { 2894, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040121ULL }, // Inst #2894 = OR32mi8 |
| 39207 | { 2893, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180121ULL }, // Inst #2893 = OR32mi |
| 39208 | { 2892, 1, 0, 0, 1458, 1, 2, X86ImpOpBase + 69, 1, 0, 0x680180101ULL }, // Inst #2892 = OR32i32 |
| 39209 | { 2891, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 155, 0, 0x5800000a9ULL }, // Inst #2891 = OR16rr_REV |
| 39210 | { 2890, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 155, 0, 0x100005e0010829ULL }, // Inst #2890 = OR16rr_NF_REV |
| 39211 | { 2889, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 357, 0, 0x101085e0010829ULL }, // Inst #2889 = OR16rr_NF_ND_REV |
| 39212 | { 2888, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Commutable), 0x101084e0010828ULL }, // Inst #2888 = OR16rr_NF_ND |
| 39213 | { 2887, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0x100004e0010828ULL }, // Inst #2887 = OR16rr_NF |
| 39214 | { 2886, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 357, 0, 0x1085e0010829ULL }, // Inst #2886 = OR16rr_ND_REV |
| 39215 | { 2885, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Commutable), 0x1084e0010828ULL }, // Inst #2885 = OR16rr_ND |
| 39216 | { 2884, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0, 0xc0005e0010829ULL }, // Inst #2884 = OR16rr_EVEX_REV |
| 39217 | { 2883, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0xc0004e0010828ULL }, // Inst #2883 = OR16rr_EVEX |
| 39218 | { 2882, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0x4800000a8ULL }, // Inst #2882 = OR16rr |
| 39219 | { 2881, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::MayLoad), 0x101085e0010819ULL }, // Inst #2881 = OR16rm_NF_ND |
| 39220 | { 2880, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0x100005e0010819ULL }, // Inst #2880 = OR16rm_NF |
| 39221 | { 2879, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::MayLoad), 0x1085e0010819ULL }, // Inst #2879 = OR16rm_ND |
| 39222 | { 2878, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0xc0005e0010819ULL }, // Inst #2878 = OR16rm_EVEX |
| 39223 | { 2877, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0x580000099ULL }, // Inst #2877 = OR16rm |
| 39224 | { 2876, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 340, 0, 0x1010c0e0110831ULL }, // Inst #2876 = OR16ri_NF_ND |
| 39225 | { 2875, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 152, 0, 0x100040e0110831ULL }, // Inst #2875 = OR16ri_NF |
| 39226 | { 2874, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 340, 0, 0x10c0e0110831ULL }, // Inst #2874 = OR16ri_ND |
| 39227 | { 2873, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0, 0xc0040e0110831ULL }, // Inst #2873 = OR16ri_EVEX |
| 39228 | { 2872, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 340, 0, 0x1010c1e0050831ULL }, // Inst #2872 = OR16ri8_NF_ND |
| 39229 | { 2871, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 152, 0, 0x100041e0050831ULL }, // Inst #2871 = OR16ri8_NF |
| 39230 | { 2870, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 340, 0, 0x10c1e0050831ULL }, // Inst #2870 = OR16ri8_ND |
| 39231 | { 2869, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0, 0xc0041e0050831ULL }, // Inst #2869 = OR16ri8_EVEX |
| 39232 | { 2868, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 152, 0, 0x41800400b1ULL }, // Inst #2868 = OR16ri8 |
| 39233 | { 2867, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0, 0x40801000b1ULL }, // Inst #2867 = OR16ri |
| 39234 | { 2866, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 333, 0|(1ULL<<MCID::MayLoad), 0x101084e0010818ULL }, // Inst #2866 = OR16mr_NF_ND |
| 39235 | { 2865, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100004e0010818ULL }, // Inst #2865 = OR16mr_NF |
| 39236 | { 2864, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 333, 0|(1ULL<<MCID::MayLoad), 0x1084e0010818ULL }, // Inst #2864 = OR16mr_ND |
| 39237 | { 2863, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0004e0010818ULL }, // Inst #2863 = OR16mr_EVEX |
| 39238 | { 2862, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480000098ULL }, // Inst #2862 = OR16mr |
| 39239 | { 2861, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0110821ULL }, // Inst #2861 = OR16mi_NF_ND |
| 39240 | { 2860, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0110821ULL }, // Inst #2860 = OR16mi_NF |
| 39241 | { 2859, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110821ULL }, // Inst #2859 = OR16mi_ND |
| 39242 | { 2858, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110821ULL }, // Inst #2858 = OR16mi_EVEX |
| 39243 | { 2857, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050821ULL }, // Inst #2857 = OR16mi8_NF_ND |
| 39244 | { 2856, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050821ULL }, // Inst #2856 = OR16mi8_NF |
| 39245 | { 2855, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050821ULL }, // Inst #2855 = OR16mi8_ND |
| 39246 | { 2854, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050821ULL }, // Inst #2854 = OR16mi8_EVEX |
| 39247 | { 2853, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a1ULL }, // Inst #2853 = OR16mi8 |
| 39248 | { 2852, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a1ULL }, // Inst #2852 = OR16mi |
| 39249 | { 2851, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 46, 1, 0, 0x680100081ULL }, // Inst #2851 = OR16i16 |
| 39250 | { 2850, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 925, 0, 0x10fb60010032ULL }, // Inst #2850 = NOT8r_ND |
| 39251 | { 2849, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 1027, 0, 0xc007b60010032ULL }, // Inst #2849 = NOT8r_EVEX |
| 39252 | { 2848, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 1027, 0, 0x7b00000032ULL }, // Inst #2848 = NOT8r |
| 39253 | { 2847, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x10fb60010022ULL }, // Inst #2847 = NOT8m_ND |
| 39254 | { 2846, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007b60010022ULL }, // Inst #2846 = NOT8m_EVEX |
| 39255 | { 2845, 5, 0, 0, 1452, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b00000022ULL }, // Inst #2845 = NOT8m |
| 39256 | { 2844, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 553, 0, 0x10fbe0030032ULL }, // Inst #2844 = NOT64r_ND |
| 39257 | { 2843, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 300, 0, 0xc007be0030032ULL }, // Inst #2843 = NOT64r_EVEX |
| 39258 | { 2842, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 300, 0, 0x7b80020032ULL }, // Inst #2842 = NOT64r |
| 39259 | { 2841, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10fbe0030022ULL }, // Inst #2841 = NOT64m_ND |
| 39260 | { 2840, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0030022ULL }, // Inst #2840 = NOT64m_EVEX |
| 39261 | { 2839, 5, 0, 0, 1196, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b80020022ULL }, // Inst #2839 = NOT64m |
| 39262 | { 2838, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 551, 0, 0x10fbe0010032ULL }, // Inst #2838 = NOT32r_ND |
| 39263 | { 2837, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 298, 0, 0xc007be0010032ULL }, // Inst #2837 = NOT32r_EVEX |
| 39264 | { 2836, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 298, 0, 0x7b80000132ULL }, // Inst #2836 = NOT32r |
| 39265 | { 2835, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10fbe0010022ULL }, // Inst #2835 = NOT32m_ND |
| 39266 | { 2834, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0010022ULL }, // Inst #2834 = NOT32m_EVEX |
| 39267 | { 2833, 5, 0, 0, 1196, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b80000122ULL }, // Inst #2833 = NOT32m |
| 39268 | { 2832, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 547, 0, 0x10fbe0010832ULL }, // Inst #2832 = NOT16r_ND |
| 39269 | { 2831, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 573, 0, 0xc007be0010832ULL }, // Inst #2831 = NOT16r_EVEX |
| 39270 | { 2830, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 573, 0, 0x7b800000b2ULL }, // Inst #2830 = NOT16r |
| 39271 | { 2829, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10fbe0010822ULL }, // Inst #2829 = NOT16m_ND |
| 39272 | { 2828, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0010822ULL }, // Inst #2828 = NOT16m_EVEX |
| 39273 | { 2827, 5, 0, 0, 1196, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b800000a2ULL }, // Inst #2827 = NOT16m |
| 39274 | { 2826, 1, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 577, 0, 0xf800020afULL }, // Inst #2826 = NOOPWr |
| 39275 | { 2825, 5, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 231, 0, 0xf8000209fULL }, // Inst #2825 = NOOPW |
| 39276 | { 2824, 1, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 202, 0, 0xf8002202fULL }, // Inst #2824 = NOOPQr |
| 39277 | { 2823, 5, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 231, 0, 0xf8002201fULL }, // Inst #2823 = NOOPQ |
| 39278 | { 2822, 1, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 201, 0, 0xf8000212fULL }, // Inst #2822 = NOOPLr |
| 39279 | { 2821, 5, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 231, 0, 0xf8000211fULL }, // Inst #2821 = NOOPL |
| 39280 | { 2820, 0, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 1, 0, 0x4800000001ULL }, // Inst #2820 = NOOP |
| 39281 | { 2819, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 925, 0, 0x1010fb60010033ULL }, // Inst #2819 = NEG8r_NF_ND |
| 39282 | { 2818, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 1027, 0, 0x10007b60010033ULL }, // Inst #2818 = NEG8r_NF |
| 39283 | { 2817, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 925, 0, 0x10fb60010033ULL }, // Inst #2817 = NEG8r_ND |
| 39284 | { 2816, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 1027, 0, 0xc007b60010033ULL }, // Inst #2816 = NEG8r_EVEX |
| 39285 | { 2815, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 1027, 0, 0x7b00000033ULL }, // Inst #2815 = NEG8r |
| 39286 | { 2814, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x1010fb60010023ULL }, // Inst #2814 = NEG8m_NF_ND |
| 39287 | { 2813, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007b60010023ULL }, // Inst #2813 = NEG8m_NF |
| 39288 | { 2812, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x10fb60010023ULL }, // Inst #2812 = NEG8m_ND |
| 39289 | { 2811, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007b60010023ULL }, // Inst #2811 = NEG8m_EVEX |
| 39290 | { 2810, 5, 0, 0, 1452, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b00000023ULL }, // Inst #2810 = NEG8m |
| 39291 | { 2809, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 553, 0, 0x1010fbe0030033ULL }, // Inst #2809 = NEG64r_NF_ND |
| 39292 | { 2808, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 300, 0, 0x10007be0030033ULL }, // Inst #2808 = NEG64r_NF |
| 39293 | { 2807, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 553, 0, 0x10fbe0030033ULL }, // Inst #2807 = NEG64r_ND |
| 39294 | { 2806, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 300, 0, 0xc007be0030033ULL }, // Inst #2806 = NEG64r_EVEX |
| 39295 | { 2805, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 300, 0, 0x7b80020033ULL }, // Inst #2805 = NEG64r |
| 39296 | { 2804, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1010fbe0030023ULL }, // Inst #2804 = NEG64m_NF_ND |
| 39297 | { 2803, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007be0030023ULL }, // Inst #2803 = NEG64m_NF |
| 39298 | { 2802, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10fbe0030023ULL }, // Inst #2802 = NEG64m_ND |
| 39299 | { 2801, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0030023ULL }, // Inst #2801 = NEG64m_EVEX |
| 39300 | { 2800, 5, 0, 0, 1196, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b80020023ULL }, // Inst #2800 = NEG64m |
| 39301 | { 2799, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 551, 0, 0x1010fbe0010033ULL }, // Inst #2799 = NEG32r_NF_ND |
| 39302 | { 2798, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 298, 0, 0x10007be0010033ULL }, // Inst #2798 = NEG32r_NF |
| 39303 | { 2797, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 551, 0, 0x10fbe0010033ULL }, // Inst #2797 = NEG32r_ND |
| 39304 | { 2796, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 298, 0, 0xc007be0010033ULL }, // Inst #2796 = NEG32r_EVEX |
| 39305 | { 2795, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 298, 0, 0x7b80000133ULL }, // Inst #2795 = NEG32r |
| 39306 | { 2794, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1010fbe0010023ULL }, // Inst #2794 = NEG32m_NF_ND |
| 39307 | { 2793, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007be0010023ULL }, // Inst #2793 = NEG32m_NF |
| 39308 | { 2792, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10fbe0010023ULL }, // Inst #2792 = NEG32m_ND |
| 39309 | { 2791, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0010023ULL }, // Inst #2791 = NEG32m_EVEX |
| 39310 | { 2790, 5, 0, 0, 1196, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b80000123ULL }, // Inst #2790 = NEG32m |
| 39311 | { 2789, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 547, 0, 0x1010fbe0010833ULL }, // Inst #2789 = NEG16r_NF_ND |
| 39312 | { 2788, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 573, 0, 0x10007be0010833ULL }, // Inst #2788 = NEG16r_NF |
| 39313 | { 2787, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 547, 0, 0x10fbe0010833ULL }, // Inst #2787 = NEG16r_ND |
| 39314 | { 2786, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 573, 0, 0xc007be0010833ULL }, // Inst #2786 = NEG16r_EVEX |
| 39315 | { 2785, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 573, 0, 0x7b800000b3ULL }, // Inst #2785 = NEG16r |
| 39316 | { 2784, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x1010fbe0010823ULL }, // Inst #2784 = NEG16m_NF_ND |
| 39317 | { 2783, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007be0010823ULL }, // Inst #2783 = NEG16m_NF |
| 39318 | { 2782, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10fbe0010823ULL }, // Inst #2782 = NEG16m_ND |
| 39319 | { 2781, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007be0010823ULL }, // Inst #2781 = NEG16m_EVEX |
| 39320 | { 2780, 5, 0, 0, 1196, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b800000a3ULL }, // Inst #2780 = NEG16m |
| 39321 | { 2779, 0, 0, 0, 710, 2, 0, X86ImpOpBase + 366, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80002049ULL }, // Inst #2779 = MWAITrr |
| 39322 | { 2778, 0, 0, 0, 8, 3, 0, X86ImpOpBase + 16, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207bULL }, // Inst #2778 = MWAITXrrr |
| 39323 | { 2777, 1, 0, 0, 1578, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000031ULL }, // Inst #2777 = MUL_FrST0 |
| 39324 | { 2776, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2776 = MUL_FpI32m80 |
| 39325 | { 2775, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2775 = MUL_FpI32m64 |
| 39326 | { 2774, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2774 = MUL_FpI32m32 |
| 39327 | { 2773, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2773 = MUL_FpI16m80 |
| 39328 | { 2772, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2772 = MUL_FpI16m64 |
| 39329 | { 2771, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2771 = MUL_FpI16m32 |
| 39330 | { 2770, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2770 = MUL_Fp80m64 |
| 39331 | { 2769, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2769 = MUL_Fp80m32 |
| 39332 | { 2768, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 516, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #2768 = MUL_Fp80 |
| 39333 | { 2767, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2767 = MUL_Fp64m32 |
| 39334 | { 2766, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2766 = MUL_Fp64m |
| 39335 | { 2765, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 506, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #2765 = MUL_Fp64 |
| 39336 | { 2764, 7, 1, 0, 248, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #2764 = MUL_Fp32m |
| 39337 | { 2763, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 496, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #2763 = MUL_Fp32 |
| 39338 | { 2762, 1, 0, 0, 876, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000031ULL }, // Inst #2762 = MUL_FST0r |
| 39339 | { 2761, 1, 0, 0, 1578, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000031ULL }, // Inst #2761 = MUL_FPrST0 |
| 39340 | { 2760, 5, 0, 0, 803, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000021ULL }, // Inst #2760 = MUL_FI32m |
| 39341 | { 2759, 5, 0, 0, 803, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000021ULL }, // Inst #2759 = MUL_FI16m |
| 39342 | { 2758, 5, 0, 0, 801, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000021ULL }, // Inst #2758 = MUL_F64m |
| 39343 | { 2757, 5, 0, 0, 801, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000021ULL }, // Inst #2757 = MUL_F32m |
| 39344 | { 2756, 3, 2, 0, 247, 1, 0, X86ImpOpBase + 365, 422, 0, 0xfb60025829ULL }, // Inst #2756 = MULX64rr_EVEX |
| 39345 | { 2755, 3, 2, 0, 247, 1, 0, X86ImpOpBase + 365, 422, 0, 0xfb20025829ULL }, // Inst #2755 = MULX64rr |
| 39346 | { 2754, 7, 2, 0, 246, 1, 0, X86ImpOpBase + 365, 415, 0|(1ULL<<MCID::MayLoad), 0xfb60025819ULL }, // Inst #2754 = MULX64rm_EVEX |
| 39347 | { 2753, 7, 2, 0, 246, 1, 0, X86ImpOpBase + 365, 415, 0|(1ULL<<MCID::MayLoad), 0xfb20025819ULL }, // Inst #2753 = MULX64rm |
| 39348 | { 2752, 2, 1, 0, 245, 1, 0, X86ImpOpBase + 365, 553, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20000ULL }, // Inst #2752 = MULX64Hrr |
| 39349 | { 2751, 6, 1, 0, 244, 1, 0, X86ImpOpBase + 365, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20000ULL }, // Inst #2751 = MULX64Hrm |
| 39350 | { 2750, 3, 2, 0, 243, 1, 0, X86ImpOpBase + 364, 225, 0, 0xfb60005829ULL }, // Inst #2750 = MULX32rr_EVEX |
| 39351 | { 2749, 3, 2, 0, 243, 1, 0, X86ImpOpBase + 364, 225, 0, 0xfb20005829ULL }, // Inst #2749 = MULX32rr |
| 39352 | { 2748, 7, 2, 0, 242, 1, 0, X86ImpOpBase + 364, 384, 0|(1ULL<<MCID::MayLoad), 0xfb60005819ULL }, // Inst #2748 = MULX32rm_EVEX |
| 39353 | { 2747, 7, 2, 0, 242, 1, 0, X86ImpOpBase + 364, 384, 0|(1ULL<<MCID::MayLoad), 0xfb20005819ULL }, // Inst #2747 = MULX32rm |
| 39354 | { 2746, 2, 1, 0, 241, 1, 0, X86ImpOpBase + 364, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2746 = MULX32Hrr |
| 39355 | { 2745, 6, 1, 0, 240, 1, 0, X86ImpOpBase + 364, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2745 = MULX32Hrm |
| 39356 | { 2744, 3, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2c88003029ULL }, // Inst #2744 = MULSSrr_Int |
| 39357 | { 2743, 3, 1, 0, 239, 1, 0, X86ImpOpBase + 78, 492, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c88003029ULL }, // Inst #2743 = MULSSrr |
| 39358 | { 2742, 7, 1, 0, 238, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c88003019ULL }, // Inst #2742 = MULSSrm_Int |
| 39359 | { 2741, 7, 1, 0, 238, 1, 0, X86ImpOpBase + 78, 485, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c88003019ULL }, // Inst #2741 = MULSSrm |
| 39360 | { 2740, 3, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2c90003829ULL }, // Inst #2740 = MULSDrr_Int |
| 39361 | { 2739, 3, 1, 0, 237, 1, 0, X86ImpOpBase + 78, 482, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c90003829ULL }, // Inst #2739 = MULSDrr |
| 39362 | { 2738, 7, 1, 0, 236, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c90003819ULL }, // Inst #2738 = MULSDrm_Int |
| 39363 | { 2737, 7, 1, 0, 236, 1, 0, X86ImpOpBase + 78, 475, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c90003819ULL }, // Inst #2737 = MULSDrm |
| 39364 | { 2736, 3, 1, 0, 235, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c88002029ULL }, // Inst #2736 = MULPSrr |
| 39365 | { 2735, 7, 1, 0, 234, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c88002019ULL }, // Inst #2735 = MULPSrm |
| 39366 | { 2734, 3, 1, 0, 233, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c90002829ULL }, // Inst #2734 = MULPDrr |
| 39367 | { 2733, 7, 1, 0, 232, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c90002819ULL }, // Inst #2733 = MULPDrm |
| 39368 | { 2732, 1, 0, 0, 180, 1, 2, X86ImpOpBase + 273, 1029, 0, 0x10007b60010034ULL }, // Inst #2732 = MUL8r_NF |
| 39369 | { 2731, 1, 0, 0, 180, 1, 3, X86ImpOpBase + 269, 1029, 0, 0xc007b60010034ULL }, // Inst #2731 = MUL8r_EVEX |
| 39370 | { 2730, 1, 0, 0, 180, 1, 3, X86ImpOpBase + 269, 1029, 0, 0x7b00000034ULL }, // Inst #2730 = MUL8r |
| 39371 | { 2729, 5, 0, 0, 179, 1, 2, X86ImpOpBase + 273, 231, 0|(1ULL<<MCID::MayLoad), 0x10007b60010024ULL }, // Inst #2729 = MUL8m_NF |
| 39372 | { 2728, 5, 0, 0, 179, 1, 3, X86ImpOpBase + 269, 231, 0|(1ULL<<MCID::MayLoad), 0xc007b60010024ULL }, // Inst #2728 = MUL8m_EVEX |
| 39373 | { 2727, 5, 0, 0, 179, 1, 3, X86ImpOpBase + 269, 231, 0|(1ULL<<MCID::MayLoad), 0x7b00000024ULL }, // Inst #2727 = MUL8m |
| 39374 | { 2726, 1, 0, 0, 174, 1, 2, X86ImpOpBase + 169, 202, 0, 0x10007be0030034ULL }, // Inst #2726 = MUL64r_NF |
| 39375 | { 2725, 1, 0, 0, 174, 1, 3, X86ImpOpBase + 265, 202, 0, 0xc007be0030034ULL }, // Inst #2725 = MUL64r_EVEX |
| 39376 | { 2724, 1, 0, 0, 174, 1, 3, X86ImpOpBase + 265, 202, 0, 0x7b80020034ULL }, // Inst #2724 = MUL64r |
| 39377 | { 2723, 5, 0, 0, 173, 1, 2, X86ImpOpBase + 169, 231, 0|(1ULL<<MCID::MayLoad), 0x10007be0030024ULL }, // Inst #2723 = MUL64m_NF |
| 39378 | { 2722, 5, 0, 0, 173, 1, 3, X86ImpOpBase + 265, 231, 0|(1ULL<<MCID::MayLoad), 0xc007be0030024ULL }, // Inst #2722 = MUL64m_EVEX |
| 39379 | { 2721, 5, 0, 0, 173, 1, 3, X86ImpOpBase + 265, 231, 0|(1ULL<<MCID::MayLoad), 0x7b80020024ULL }, // Inst #2721 = MUL64m |
| 39380 | { 2720, 1, 0, 0, 168, 1, 2, X86ImpOpBase + 116, 201, 0, 0x10007be0010034ULL }, // Inst #2720 = MUL32r_NF |
| 39381 | { 2719, 1, 0, 0, 168, 1, 3, X86ImpOpBase + 261, 201, 0, 0xc007be0010034ULL }, // Inst #2719 = MUL32r_EVEX |
| 39382 | { 2718, 1, 0, 0, 168, 1, 3, X86ImpOpBase + 261, 201, 0, 0x7b80000134ULL }, // Inst #2718 = MUL32r |
| 39383 | { 2717, 5, 0, 0, 167, 1, 2, X86ImpOpBase + 116, 231, 0|(1ULL<<MCID::MayLoad), 0x10007be0010024ULL }, // Inst #2717 = MUL32m_NF |
| 39384 | { 2716, 5, 0, 0, 167, 1, 3, X86ImpOpBase + 261, 231, 0|(1ULL<<MCID::MayLoad), 0xc007be0010024ULL }, // Inst #2716 = MUL32m_EVEX |
| 39385 | { 2715, 5, 0, 0, 167, 1, 3, X86ImpOpBase + 261, 231, 0|(1ULL<<MCID::MayLoad), 0x7b80000124ULL }, // Inst #2715 = MUL32m |
| 39386 | { 2714, 1, 0, 0, 162, 1, 2, X86ImpOpBase + 172, 577, 0, 0x10007be0010834ULL }, // Inst #2714 = MUL16r_NF |
| 39387 | { 2713, 1, 0, 0, 162, 1, 3, X86ImpOpBase + 257, 577, 0, 0xc007be0010834ULL }, // Inst #2713 = MUL16r_EVEX |
| 39388 | { 2712, 1, 0, 0, 162, 1, 3, X86ImpOpBase + 257, 577, 0, 0x7b800000b4ULL }, // Inst #2712 = MUL16r |
| 39389 | { 2711, 5, 0, 0, 161, 1, 2, X86ImpOpBase + 172, 231, 0|(1ULL<<MCID::MayLoad), 0x10007be0010824ULL }, // Inst #2711 = MUL16m_NF |
| 39390 | { 2710, 5, 0, 0, 161, 1, 3, X86ImpOpBase + 257, 231, 0|(1ULL<<MCID::MayLoad), 0xc007be0010824ULL }, // Inst #2710 = MUL16m_EVEX |
| 39391 | { 2709, 5, 0, 0, 161, 1, 3, X86ImpOpBase + 257, 231, 0|(1ULL<<MCID::MayLoad), 0x7b800000a4ULL }, // Inst #2709 = MUL16m |
| 39392 | { 2708, 4, 1, 0, 231, 0, 0, X86ImpOpBase + 0, 563, 0, 0x2118046829ULL }, // Inst #2708 = MPSADBWrri |
| 39393 | { 2707, 8, 1, 0, 230, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x2118046819ULL }, // Inst #2707 = MPSADBWrmi |
| 39394 | { 2706, 2, 1, 0, 1548, 0, 0, X86ImpOpBase + 0, 1398, 0, 0x5b00022029ULL }, // Inst #2706 = MOVZX64rr8 |
| 39395 | { 2705, 2, 1, 0, 613, 0, 0, X86ImpOpBase + 0, 1195, 0, 0x5b80022029ULL }, // Inst #2705 = MOVZX64rr16 |
| 39396 | { 2704, 6, 1, 0, 72, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x5b00022019ULL }, // Inst #2704 = MOVZX64rm8 |
| 39397 | { 2703, 6, 1, 0, 72, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x5b80022019ULL }, // Inst #2703 = MOVZX64rm16 |
| 39398 | { 2702, 2, 1, 0, 1549, 0, 0, X86ImpOpBase + 0, 1394, 0, 0x5b00002129ULL }, // Inst #2702 = MOVZX32rr8_NOREX |
| 39399 | { 2701, 2, 1, 0, 1548, 0, 0, X86ImpOpBase + 0, 1392, 0, 0x5b00002129ULL }, // Inst #2701 = MOVZX32rr8 |
| 39400 | { 2700, 2, 1, 0, 613, 0, 0, X86ImpOpBase + 0, 1193, 0, 0x5b80002129ULL }, // Inst #2700 = MOVZX32rr16 |
| 39401 | { 2699, 6, 1, 0, 72, 0, 0, X86ImpOpBase + 0, 1386, 0|(1ULL<<MCID::MayLoad), 0x5b00002119ULL }, // Inst #2699 = MOVZX32rm8_NOREX |
| 39402 | { 2698, 6, 1, 0, 72, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x5b00002119ULL }, // Inst #2698 = MOVZX32rm8 |
| 39403 | { 2697, 6, 1, 0, 72, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x5b80002119ULL }, // Inst #2697 = MOVZX32rm16 |
| 39404 | { 2696, 2, 1, 0, 645, 0, 0, X86ImpOpBase + 0, 1384, 0, 0x5b000020a9ULL }, // Inst #2696 = MOVZX16rr8 |
| 39405 | { 2695, 2, 1, 0, 1015, 0, 0, X86ImpOpBase + 0, 547, 0, 0x5b800020a9ULL }, // Inst #2695 = MOVZX16rr16 |
| 39406 | { 2694, 6, 1, 0, 1444, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x5b00002099ULL }, // Inst #2694 = MOVZX16rm8 |
| 39407 | { 2693, 6, 1, 0, 1011, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x5b80002099ULL }, // Inst #2693 = MOVZX16rm16 |
| 39408 | { 2692, 2, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 535, 0, 0x3f18003029ULL }, // Inst #2692 = MOVZPQILo2PQIrr |
| 39409 | { 2691, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x888002028ULL }, // Inst #2691 = MOVUPSrr_REV |
| 39410 | { 2690, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x808002029ULL }, // Inst #2690 = MOVUPSrr |
| 39411 | { 2689, 6, 1, 0, 658, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808002019ULL }, // Inst #2689 = MOVUPSrm |
| 39412 | { 2688, 6, 0, 0, 647, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x888002018ULL }, // Inst #2688 = MOVUPSmr |
| 39413 | { 2687, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x890002828ULL }, // Inst #2687 = MOVUPDrr_REV |
| 39414 | { 2686, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x810002829ULL }, // Inst #2686 = MOVUPDrr |
| 39415 | { 2685, 6, 1, 0, 658, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810002819ULL }, // Inst #2685 = MOVUPDrm |
| 39416 | { 2684, 6, 0, 0, 647, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x890002818ULL }, // Inst #2684 = MOVUPDmr |
| 39417 | { 2683, 2, 1, 0, 1576, 0, 0, X86ImpOpBase + 0, 1398, 0, 0x5f00022029ULL }, // Inst #2683 = MOVSX64rr8 |
| 39418 | { 2682, 2, 1, 0, 604, 0, 0, X86ImpOpBase + 0, 1396, 0, 0x3180020029ULL }, // Inst #2682 = MOVSX64rr32 |
| 39419 | { 2681, 2, 1, 0, 1576, 0, 0, X86ImpOpBase + 0, 1195, 0, 0x5f80022029ULL }, // Inst #2681 = MOVSX64rr16 |
| 39420 | { 2680, 6, 1, 0, 1572, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x5f00022019ULL }, // Inst #2680 = MOVSX64rm8 |
| 39421 | { 2679, 6, 1, 0, 1572, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x3180020019ULL }, // Inst #2679 = MOVSX64rm32 |
| 39422 | { 2678, 6, 1, 0, 1572, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x5f80022019ULL }, // Inst #2678 = MOVSX64rm16 |
| 39423 | { 2677, 2, 1, 0, 1577, 0, 0, X86ImpOpBase + 0, 1394, 0, 0x5f00002129ULL }, // Inst #2677 = MOVSX32rr8_NOREX |
| 39424 | { 2676, 2, 1, 0, 1576, 0, 0, X86ImpOpBase + 0, 1392, 0, 0x5f00002129ULL }, // Inst #2676 = MOVSX32rr8 |
| 39425 | { 2675, 2, 1, 0, 1053, 0, 0, X86ImpOpBase + 0, 551, 0, 0x3180000129ULL }, // Inst #2675 = MOVSX32rr32 |
| 39426 | { 2674, 2, 1, 0, 1576, 0, 0, X86ImpOpBase + 0, 1193, 0, 0x5f80002129ULL }, // Inst #2674 = MOVSX32rr16 |
| 39427 | { 2673, 6, 1, 0, 1573, 0, 0, X86ImpOpBase + 0, 1386, 0|(1ULL<<MCID::MayLoad), 0x5f00002119ULL }, // Inst #2673 = MOVSX32rm8_NOREX |
| 39428 | { 2672, 6, 1, 0, 1572, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x5f00002119ULL }, // Inst #2672 = MOVSX32rm8 |
| 39429 | { 2671, 6, 1, 0, 1572, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x3180000119ULL }, // Inst #2671 = MOVSX32rm32 |
| 39430 | { 2670, 6, 1, 0, 1572, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x5f80002119ULL }, // Inst #2670 = MOVSX32rm16 |
| 39431 | { 2669, 2, 1, 0, 1575, 0, 0, X86ImpOpBase + 0, 1384, 0, 0x5f000020a9ULL }, // Inst #2669 = MOVSX16rr8 |
| 39432 | { 2668, 2, 1, 0, 1574, 0, 0, X86ImpOpBase + 0, 1382, 0, 0x31800000a9ULL }, // Inst #2668 = MOVSX16rr32 |
| 39433 | { 2667, 2, 1, 0, 1574, 0, 0, X86ImpOpBase + 0, 547, 0, 0x5f800020a9ULL }, // Inst #2667 = MOVSX16rr16 |
| 39434 | { 2666, 6, 1, 0, 655, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x5f00002099ULL }, // Inst #2666 = MOVSX16rm8 |
| 39435 | { 2665, 6, 1, 0, 1571, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x3180000099ULL }, // Inst #2665 = MOVSX16rm32 |
| 39436 | { 2664, 6, 1, 0, 1571, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x5f80002099ULL }, // Inst #2664 = MOVSX16rm16 |
| 39437 | { 2663, 3, 0, 0, 651, 3, 2, X86ImpOpBase + 359, 945, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5280000086ULL }, // Inst #2663 = MOVSW |
| 39438 | { 2662, 3, 1, 0, 636, 0, 0, X86ImpOpBase + 0, 472, 0, 0x880003028ULL }, // Inst #2662 = MOVSSrr_REV |
| 39439 | { 2661, 3, 1, 0, 636, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x808003029ULL }, // Inst #2661 = MOVSSrr |
| 39440 | { 2660, 6, 1, 0, 773, 0, 0, X86ImpOpBase + 0, 980, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808003019ULL }, // Inst #2660 = MOVSSrm_alt |
| 39441 | { 2659, 6, 1, 0, 773, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808003019ULL }, // Inst #2659 = MOVSSrm |
| 39442 | { 2658, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 1376, 0|(1ULL<<MCID::MayStore), 0x888003018ULL }, // Inst #2658 = MOVSSmr |
| 39443 | { 2657, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 1025, 0|(1ULL<<MCID::Bitcast), 0x3f18002828ULL }, // Inst #2657 = MOVSS2DIrr |
| 39444 | { 2656, 3, 0, 0, 651, 3, 2, X86ImpOpBase + 359, 945, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5280020006ULL }, // Inst #2656 = MOVSQ |
| 39445 | { 2655, 2, 1, 0, 1476, 0, 0, X86ImpOpBase + 0, 535, 0, 0x908003029ULL }, // Inst #2655 = MOVSLDUPrr |
| 39446 | { 2654, 6, 1, 0, 772, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x908003019ULL }, // Inst #2654 = MOVSLDUPrm |
| 39447 | { 2653, 3, 0, 0, 651, 3, 2, X86ImpOpBase + 359, 945, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5280000106ULL }, // Inst #2653 = MOVSL |
| 39448 | { 2652, 2, 1, 0, 1476, 0, 0, X86ImpOpBase + 0, 535, 0, 0xb08003029ULL }, // Inst #2652 = MOVSHDUPrr |
| 39449 | { 2651, 6, 1, 0, 772, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0xb08003019ULL }, // Inst #2651 = MOVSHDUPrm |
| 39450 | { 2650, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 997, 0|(1ULL<<MCID::Bitcast), 0x3f18022828ULL }, // Inst #2650 = MOVSDto64rr |
| 39451 | { 2649, 3, 1, 0, 1570, 0, 0, X86ImpOpBase + 0, 472, 0, 0x880003828ULL }, // Inst #2649 = MOVSDrr_REV |
| 39452 | { 2648, 3, 1, 0, 1570, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x810003829ULL }, // Inst #2648 = MOVSDrr |
| 39453 | { 2647, 6, 1, 0, 773, 0, 0, X86ImpOpBase + 0, 972, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810003819ULL }, // Inst #2647 = MOVSDrm_alt |
| 39454 | { 2646, 6, 1, 0, 773, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810003819ULL }, // Inst #2646 = MOVSDrm |
| 39455 | { 2645, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 1370, 0|(1ULL<<MCID::MayStore), 0x890003818ULL }, // Inst #2645 = MOVSDmr |
| 39456 | { 2644, 3, 0, 0, 1569, 3, 2, X86ImpOpBase + 359, 945, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5200000006ULL }, // Inst #2644 = MOVSB |
| 39457 | { 2643, 6, 1, 0, 771, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x3f18003019ULL }, // Inst #2643 = MOVQI2PQIrm |
| 39458 | { 2642, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 999, 0, 0x3f18022828ULL }, // Inst #2642 = MOVPQIto64rr |
| 39459 | { 2641, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x3f18022818ULL }, // Inst #2641 = MOVPQIto64mr |
| 39460 | { 2640, 2, 1, 0, 183, 0, 0, X86ImpOpBase + 0, 535, 0, 0x6b00002828ULL }, // Inst #2640 = MOVPQI2QIrr |
| 39461 | { 2639, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x6b18002818ULL }, // Inst #2639 = MOVPQI2QImr |
| 39462 | { 2638, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 1003, 0, 0x3f18002828ULL }, // Inst #2638 = MOVPDI2DIrr |
| 39463 | { 2637, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x3f18002818ULL }, // Inst #2637 = MOVPDI2DImr |
| 39464 | { 2636, 2, 1, 0, 4, 2, 0, X86ImpOpBase + 112, 203, 0|(1ULL<<MCID::NotDuplicable), 0x7400180000ULL }, // Inst #2636 = MOVPC32r |
| 39465 | { 2635, 6, 0, 0, 228, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x1580003018ULL }, // Inst #2635 = MOVNTSS |
| 39466 | { 2634, 6, 0, 0, 228, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x1580003818ULL }, // Inst #2634 = MOVNTSD |
| 39467 | { 2633, 6, 0, 0, 227, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x1588002018ULL }, // Inst #2633 = MOVNTPSmr |
| 39468 | { 2632, 6, 0, 0, 227, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x1590002818ULL }, // Inst #2632 = MOVNTPDmr |
| 39469 | { 2631, 6, 0, 0, 1568, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayStore), 0x6180002018ULL }, // Inst #2631 = MOVNTImr |
| 39470 | { 2630, 6, 0, 0, 226, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayStore), 0x6180022018ULL }, // Inst #2630 = MOVNTI_64mr |
| 39471 | { 2629, 6, 0, 0, 1567, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x7398002818ULL }, // Inst #2629 = MOVNTDQmr |
| 39472 | { 2628, 6, 1, 0, 225, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1518004819ULL }, // Inst #2628 = MOVNTDQArm |
| 39473 | { 2627, 2, 1, 0, 224, 0, 0, X86ImpOpBase + 0, 1003, 0, 0x2808002029ULL }, // Inst #2627 = MOVMSKPSrr |
| 39474 | { 2626, 2, 1, 0, 224, 0, 0, X86ImpOpBase + 0, 1003, 0, 0x2810002829ULL }, // Inst #2626 = MOVMSKPDrr |
| 39475 | { 2625, 7, 1, 0, 1565, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x908002019ULL }, // Inst #2625 = MOVLPSrm |
| 39476 | { 2624, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x988002018ULL }, // Inst #2624 = MOVLPSmr |
| 39477 | { 2623, 7, 1, 0, 1565, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x910002819ULL }, // Inst #2623 = MOVLPDrm |
| 39478 | { 2622, 6, 0, 0, 223, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x990002818ULL }, // Inst #2622 = MOVLPDmr |
| 39479 | { 2621, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 472, 0, 0xb08002029ULL }, // Inst #2621 = MOVLHPSrr |
| 39480 | { 2620, 7, 1, 0, 820, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0xb08002019ULL }, // Inst #2620 = MOVHPSrm |
| 39481 | { 2619, 6, 0, 0, 1035, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0xb88002018ULL }, // Inst #2619 = MOVHPSmr |
| 39482 | { 2618, 7, 1, 0, 820, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0xb10002819ULL }, // Inst #2618 = MOVHPDrm |
| 39483 | { 2617, 6, 0, 0, 1035, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0xb90002818ULL }, // Inst #2617 = MOVHPDmr |
| 39484 | { 2616, 3, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x908002029ULL }, // Inst #2616 = MOVHLPSrr |
| 39485 | { 2615, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 535, 0, 0x3f98003028ULL }, // Inst #2615 = MOVDQUrr_REV |
| 39486 | { 2614, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 535, 0, 0x3798003029ULL }, // Inst #2614 = MOVDQUrr |
| 39487 | { 2613, 6, 1, 0, 657, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x3798003019ULL }, // Inst #2613 = MOVDQUrm |
| 39488 | { 2612, 6, 0, 0, 646, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x3f98003018ULL }, // Inst #2612 = MOVDQUmr |
| 39489 | { 2611, 2, 1, 0, 198, 0, 0, X86ImpOpBase + 0, 535, 0, 0x3f98002828ULL }, // Inst #2611 = MOVDQArr_REV |
| 39490 | { 2610, 2, 1, 0, 1181, 0, 0, X86ImpOpBase + 0, 535, 0, 0x3798002829ULL }, // Inst #2610 = MOVDQArr |
| 39491 | { 2609, 6, 1, 0, 186, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x3798002819ULL }, // Inst #2609 = MOVDQArm |
| 39492 | { 2608, 6, 0, 0, 193, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x3f98002818ULL }, // Inst #2608 = MOVDQAmr |
| 39493 | { 2607, 6, 0, 0, 141, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7ce0030018ULL }, // Inst #2607 = MOVDIRI64_EVEX |
| 39494 | { 2606, 6, 0, 0, 1564, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c80024018ULL }, // Inst #2606 = MOVDIRI64 |
| 39495 | { 2605, 6, 0, 0, 141, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7ce0010018ULL }, // Inst #2605 = MOVDIRI32_EVEX |
| 39496 | { 2604, 6, 0, 0, 1563, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c80004018ULL }, // Inst #2604 = MOVDIRI32 |
| 39497 | { 2603, 6, 0, 0, 141, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60010e19ULL }, // Inst #2603 = MOVDIR64B64_EVEX |
| 39498 | { 2602, 6, 0, 0, 1562, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00004e19ULL }, // Inst #2602 = MOVDIR64B64 |
| 39499 | { 2601, 6, 0, 0, 141, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60010c19ULL }, // Inst #2601 = MOVDIR64B32_EVEX |
| 39500 | { 2600, 6, 0, 0, 1562, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00004c19ULL }, // Inst #2600 = MOVDIR64B32 |
| 39501 | { 2599, 6, 0, 0, 1562, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00004a19ULL }, // Inst #2599 = MOVDIR64B16 |
| 39502 | { 2598, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 1012, 0|(1ULL<<MCID::Bitcast), 0x3718002829ULL }, // Inst #2598 = MOVDI2SSrr |
| 39503 | { 2597, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 1368, 0, 0x3718002829ULL }, // Inst #2597 = MOVDI2PDIrr |
| 39504 | { 2596, 6, 1, 0, 771, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x3718002819ULL }, // Inst #2596 = MOVDI2PDIrm |
| 39505 | { 2595, 2, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 535, 0, 0x910003829ULL }, // Inst #2595 = MOVDDUPrr |
| 39506 | { 2594, 6, 1, 0, 772, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x910003819ULL }, // Inst #2594 = MOVDDUPrm |
| 39507 | { 2593, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 553, 0, 0x3060030029ULL }, // Inst #2593 = MOVBE64rr_REV |
| 39508 | { 2592, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 553, 0, 0x30e0030028ULL }, // Inst #2592 = MOVBE64rr |
| 39509 | { 2591, 6, 1, 0, 853, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x3060030019ULL }, // Inst #2591 = MOVBE64rm_EVEX |
| 39510 | { 2590, 6, 1, 0, 1561, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x7800024019ULL }, // Inst #2590 = MOVBE64rm |
| 39511 | { 2589, 6, 0, 0, 859, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayStore), 0x30e0030018ULL }, // Inst #2589 = MOVBE64mr_EVEX |
| 39512 | { 2588, 6, 0, 0, 1013, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayStore), 0x7880024018ULL }, // Inst #2588 = MOVBE64mr |
| 39513 | { 2587, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 551, 0, 0x3060010029ULL }, // Inst #2587 = MOVBE32rr_REV |
| 39514 | { 2586, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 551, 0, 0x30e0010028ULL }, // Inst #2586 = MOVBE32rr |
| 39515 | { 2585, 6, 1, 0, 853, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x3060010019ULL }, // Inst #2585 = MOVBE32rm_EVEX |
| 39516 | { 2584, 6, 1, 0, 1558, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x7800004119ULL }, // Inst #2584 = MOVBE32rm |
| 39517 | { 2583, 6, 0, 0, 859, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayStore), 0x30e0010018ULL }, // Inst #2583 = MOVBE32mr_EVEX |
| 39518 | { 2582, 6, 0, 0, 1541, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayStore), 0x7880004118ULL }, // Inst #2582 = MOVBE32mr |
| 39519 | { 2581, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 547, 0, 0x3060010829ULL }, // Inst #2581 = MOVBE16rr_REV |
| 39520 | { 2580, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 547, 0, 0x30e0010828ULL }, // Inst #2580 = MOVBE16rr |
| 39521 | { 2579, 6, 1, 0, 853, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x3060010819ULL }, // Inst #2579 = MOVBE16rm_EVEX |
| 39522 | { 2578, 6, 1, 0, 1012, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x7800004099ULL }, // Inst #2578 = MOVBE16rm |
| 39523 | { 2577, 6, 0, 0, 911, 0, 0, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayStore), 0x30e0010818ULL }, // Inst #2577 = MOVBE16mr_EVEX |
| 39524 | { 2576, 6, 0, 0, 860, 0, 0, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayStore), 0x7880004098ULL }, // Inst #2576 = MOVBE16mr |
| 39525 | { 2575, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x1488002028ULL }, // Inst #2575 = MOVAPSrr_REV |
| 39526 | { 2574, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x1408002029ULL }, // Inst #2574 = MOVAPSrr |
| 39527 | { 2573, 6, 1, 0, 14, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1408002019ULL }, // Inst #2573 = MOVAPSrm |
| 39528 | { 2572, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x1488002018ULL }, // Inst #2572 = MOVAPSmr |
| 39529 | { 2571, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x1490002828ULL }, // Inst #2571 = MOVAPDrr_REV |
| 39530 | { 2570, 2, 1, 0, 221, 0, 0, X86ImpOpBase + 0, 535, 0|(1ULL<<MCID::MoveReg), 0x1410002829ULL }, // Inst #2570 = MOVAPDrr |
| 39531 | { 2569, 6, 1, 0, 14, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1410002819ULL }, // Inst #2569 = MOVAPDrm |
| 39532 | { 2568, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 1362, 0|(1ULL<<MCID::MayStore), 0x1490002818ULL }, // Inst #2568 = MOVAPDmr |
| 39533 | { 2567, 2, 1, 0, 1806, 0, 0, X86ImpOpBase + 0, 925, 0|(1ULL<<MCID::MoveReg), 0x4500000029ULL }, // Inst #2567 = MOV8rr_REV |
| 39534 | { 2566, 2, 1, 0, 1808, 0, 0, X86ImpOpBase + 0, 1360, 0|(1ULL<<MCID::MoveReg), 0x4400000028ULL }, // Inst #2566 = MOV8rr_NOREX |
| 39535 | { 2565, 2, 1, 0, 1806, 0, 0, X86ImpOpBase + 0, 925, 0|(1ULL<<MCID::MoveReg), 0x4400000028ULL }, // Inst #2565 = MOV8rr |
| 39536 | { 2564, 6, 1, 0, 1443, 0, 0, X86ImpOpBase + 0, 1354, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4500000019ULL }, // Inst #2564 = MOV8rm_NOREX |
| 39537 | { 2563, 6, 1, 0, 1439, 0, 0, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4500000019ULL }, // Inst #2563 = MOV8rm |
| 39538 | { 2562, 2, 1, 0, 1806, 0, 0, X86ImpOpBase + 0, 917, 0, 0x6300040030ULL }, // Inst #2562 = MOV8ri_alt |
| 39539 | { 2561, 2, 1, 0, 1806, 0, 0, X86ImpOpBase + 0, 917, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5800040002ULL }, // Inst #2561 = MOV8ri |
| 39540 | { 2560, 2, 0, 0, 1547, 1, 0, X86ImpOpBase + 281, 1304, 0|(1ULL<<MCID::MayStore), 0x5100240603ULL }, // Inst #2560 = MOV8o64a |
| 39541 | { 2559, 2, 0, 0, 1547, 1, 0, X86ImpOpBase + 281, 1304, 0|(1ULL<<MCID::MayStore), 0x5100180403ULL }, // Inst #2559 = MOV8o32a |
| 39542 | { 2558, 2, 0, 0, 1547, 1, 0, X86ImpOpBase + 281, 1304, 0|(1ULL<<MCID::MayStore), 0x5100100203ULL }, // Inst #2558 = MOV8o16a |
| 39543 | { 2557, 6, 0, 0, 1557, 0, 0, X86ImpOpBase + 0, 1348, 0|(1ULL<<MCID::MayStore), 0x4400000018ULL }, // Inst #2557 = MOV8mr_NOREX |
| 39544 | { 2556, 6, 0, 0, 1556, 0, 0, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayStore), 0x4400000018ULL }, // Inst #2556 = MOV8mr |
| 39545 | { 2555, 6, 0, 0, 1556, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayStore), 0x6300040020ULL }, // Inst #2555 = MOV8mi |
| 39546 | { 2554, 2, 0, 0, 1555, 0, 1, X86ImpOpBase + 281, 1304, 0|(1ULL<<MCID::MayLoad), 0x5000240603ULL }, // Inst #2554 = MOV8ao64 |
| 39547 | { 2553, 2, 0, 0, 1555, 0, 1, X86ImpOpBase + 281, 1304, 0|(1ULL<<MCID::MayLoad), 0x5000180403ULL }, // Inst #2553 = MOV8ao32 |
| 39548 | { 2552, 2, 0, 0, 1555, 0, 1, X86ImpOpBase + 281, 1304, 0|(1ULL<<MCID::MayLoad), 0x5000100203ULL }, // Inst #2552 = MOV8ao16 |
| 39549 | { 2551, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 1014, 0|(1ULL<<MCID::Bitcast), 0x3718022829ULL }, // Inst #2551 = MOV64toSDrr |
| 39550 | { 2550, 2, 1, 0, 197, 0, 0, X86ImpOpBase + 0, 1346, 0, 0x3718022829ULL }, // Inst #2550 = MOV64toPQIrr |
| 39551 | { 2549, 6, 1, 0, 771, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x3718022819ULL }, // Inst #2549 = MOV64toPQIrm |
| 39552 | { 2548, 2, 1, 0, 757, 0, 0, X86ImpOpBase + 0, 1344, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700020029ULL }, // Inst #2548 = MOV64sr |
| 39553 | { 2547, 2, 1, 0, 1542, 0, 0, X86ImpOpBase + 0, 1342, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600020028ULL }, // Inst #2547 = MOV64rs |
| 39554 | { 2546, 2, 1, 0, 1448, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::MoveReg), 0x4580020029ULL }, // Inst #2546 = MOV64rr_REV |
| 39555 | { 2545, 2, 1, 0, 1448, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::MoveReg), 0x4480020028ULL }, // Inst #2545 = MOV64rr |
| 39556 | { 2544, 6, 1, 0, 72, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580020019ULL }, // Inst #2544 = MOV64rm |
| 39557 | { 2543, 2, 1, 0, 1016, 0, 0, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x6380220030ULL }, // Inst #2543 = MOV64ri32 |
| 39558 | { 2542, 2, 1, 0, 1806, 0, 0, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable), 0x5c00260002ULL }, // Inst #2542 = MOV64ri |
| 39559 | { 2541, 2, 1, 0, 1554, 0, 0, X86ImpOpBase + 0, 1340, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1080002028ULL }, // Inst #2541 = MOV64rd |
| 39560 | { 2540, 2, 1, 0, 1553, 0, 0, X86ImpOpBase + 0, 1338, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1000002028ULL }, // Inst #2540 = MOV64rc |
| 39561 | { 2539, 2, 0, 0, 1547, 1, 0, X86ImpOpBase + 123, 1304, 0|(1ULL<<MCID::MayStore), 0x5180260603ULL }, // Inst #2539 = MOV64o64a |
| 39562 | { 2538, 2, 0, 0, 1552, 1, 0, X86ImpOpBase + 123, 1304, 0|(1ULL<<MCID::MayStore), 0x51801a0403ULL }, // Inst #2538 = MOV64o32a |
| 39563 | { 2537, 6, 0, 0, 141, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayStore), 0x4480020018ULL }, // Inst #2537 = MOV64mr |
| 39564 | { 2536, 6, 0, 0, 141, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayStore), 0x6380220020ULL }, // Inst #2536 = MOV64mi32 |
| 39565 | { 2535, 2, 1, 0, 1551, 0, 0, X86ImpOpBase + 0, 1336, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1180002029ULL }, // Inst #2535 = MOV64dr |
| 39566 | { 2534, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1334, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1100002029ULL }, // Inst #2534 = MOV64cr |
| 39567 | { 2533, 2, 0, 0, 1546, 0, 1, X86ImpOpBase + 123, 1304, 0|(1ULL<<MCID::MayLoad), 0x5080260603ULL }, // Inst #2533 = MOV64ao64 |
| 39568 | { 2532, 2, 0, 0, 1550, 0, 1, X86ImpOpBase + 123, 1304, 0|(1ULL<<MCID::MayLoad), 0x50801a0403ULL }, // Inst #2532 = MOV64ao32 |
| 39569 | { 2531, 2, 1, 0, 1490, 0, 0, X86ImpOpBase + 0, 1332, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000129ULL }, // Inst #2531 = MOV32sr |
| 39570 | { 2530, 2, 1, 0, 1542, 0, 0, X86ImpOpBase + 0, 1330, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000128ULL }, // Inst #2530 = MOV32rs |
| 39571 | { 2529, 2, 1, 0, 1052, 0, 0, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::MoveReg), 0x4580000129ULL }, // Inst #2529 = MOV32rr_REV |
| 39572 | { 2528, 2, 1, 0, 1052, 0, 0, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::MoveReg), 0x4480000128ULL }, // Inst #2528 = MOV32rr |
| 39573 | { 2527, 6, 1, 0, 72, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580000119ULL }, // Inst #2527 = MOV32rm |
| 39574 | { 2526, 2, 1, 0, 1807, 0, 0, X86ImpOpBase + 0, 203, 0, 0x6380180130ULL }, // Inst #2526 = MOV32ri_alt |
| 39575 | { 2525, 2, 1, 0, 1807, 0, 0, X86ImpOpBase + 0, 203, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5c00180102ULL }, // Inst #2525 = MOV32ri |
| 39576 | { 2524, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1328, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1080002028ULL }, // Inst #2524 = MOV32rd |
| 39577 | { 2523, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1326, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1000002028ULL }, // Inst #2523 = MOV32rc |
| 39578 | { 2522, 2, 0, 0, 1547, 1, 0, X86ImpOpBase + 41, 1304, 0|(1ULL<<MCID::MayStore), 0x5180240703ULL }, // Inst #2522 = MOV32o64a |
| 39579 | { 2521, 2, 0, 0, 1547, 1, 0, X86ImpOpBase + 41, 1304, 0|(1ULL<<MCID::MayStore), 0x5180180503ULL }, // Inst #2521 = MOV32o32a |
| 39580 | { 2520, 2, 0, 0, 1547, 1, 0, X86ImpOpBase + 41, 1304, 0|(1ULL<<MCID::MayStore), 0x5180100303ULL }, // Inst #2520 = MOV32o16a |
| 39581 | { 2519, 6, 0, 0, 141, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayStore), 0x4480000118ULL }, // Inst #2519 = MOV32mr |
| 39582 | { 2518, 6, 0, 0, 141, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayStore), 0x6380180120ULL }, // Inst #2518 = MOV32mi |
| 39583 | { 2517, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1324, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1180002029ULL }, // Inst #2517 = MOV32dr |
| 39584 | { 2516, 2, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 1322, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1100002029ULL }, // Inst #2516 = MOV32cr |
| 39585 | { 2515, 2, 0, 0, 1545, 0, 1, X86ImpOpBase + 41, 1304, 0|(1ULL<<MCID::MayLoad), 0x5080240703ULL }, // Inst #2515 = MOV32ao64 |
| 39586 | { 2514, 2, 0, 0, 1545, 0, 1, X86ImpOpBase + 41, 1304, 0|(1ULL<<MCID::MayLoad), 0x5080180503ULL }, // Inst #2514 = MOV32ao32 |
| 39587 | { 2513, 2, 0, 0, 1545, 0, 1, X86ImpOpBase + 41, 1304, 0|(1ULL<<MCID::MayLoad), 0x5080100303ULL }, // Inst #2513 = MOV32ao16 |
| 39588 | { 2512, 2, 1, 0, 1490, 0, 0, X86ImpOpBase + 0, 1320, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x47000000a9ULL }, // Inst #2512 = MOV16sr |
| 39589 | { 2511, 6, 1, 0, 774, 0, 0, X86ImpOpBase + 0, 1314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000019ULL }, // Inst #2511 = MOV16sm |
| 39590 | { 2510, 2, 1, 0, 1542, 0, 0, X86ImpOpBase + 0, 1312, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x46000000a8ULL }, // Inst #2510 = MOV16rs |
| 39591 | { 2509, 2, 1, 0, 1806, 0, 0, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::MoveReg), 0x45800000a9ULL }, // Inst #2509 = MOV16rr_REV |
| 39592 | { 2508, 2, 1, 0, 1806, 0, 0, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::MoveReg), 0x44800000a8ULL }, // Inst #2508 = MOV16rr |
| 39593 | { 2507, 6, 1, 0, 920, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580000099ULL }, // Inst #2507 = MOV16rm |
| 39594 | { 2506, 2, 1, 0, 1806, 0, 0, X86ImpOpBase + 0, 575, 0, 0x63801000b0ULL }, // Inst #2506 = MOV16ri_alt |
| 39595 | { 2505, 2, 1, 0, 1806, 0, 0, X86ImpOpBase + 0, 575, 0|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5c00100082ULL }, // Inst #2505 = MOV16ri |
| 39596 | { 2504, 2, 0, 0, 1481, 1, 0, X86ImpOpBase + 276, 1304, 0|(1ULL<<MCID::MayStore), 0x5180240683ULL }, // Inst #2504 = MOV16o64a |
| 39597 | { 2503, 2, 0, 0, 1481, 1, 0, X86ImpOpBase + 276, 1304, 0|(1ULL<<MCID::MayStore), 0x5180180483ULL }, // Inst #2503 = MOV16o32a |
| 39598 | { 2502, 2, 0, 0, 1481, 1, 0, X86ImpOpBase + 276, 1304, 0|(1ULL<<MCID::MayStore), 0x5180100283ULL }, // Inst #2502 = MOV16o16a |
| 39599 | { 2501, 6, 0, 0, 1540, 0, 0, X86ImpOpBase + 0, 1306, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000018ULL }, // Inst #2501 = MOV16ms |
| 39600 | { 2500, 6, 0, 0, 141, 0, 0, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayStore), 0x4480000098ULL }, // Inst #2500 = MOV16mr |
| 39601 | { 2499, 6, 0, 0, 141, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayStore), 0x63801000a0ULL }, // Inst #2499 = MOV16mi |
| 39602 | { 2498, 2, 0, 0, 1538, 0, 1, X86ImpOpBase + 276, 1304, 0|(1ULL<<MCID::MayLoad), 0x5080240683ULL }, // Inst #2498 = MOV16ao64 |
| 39603 | { 2497, 2, 0, 0, 1538, 0, 1, X86ImpOpBase + 276, 1304, 0|(1ULL<<MCID::MayLoad), 0x5080180483ULL }, // Inst #2497 = MOV16ao32 |
| 39604 | { 2496, 2, 0, 0, 1538, 0, 1, X86ImpOpBase + 276, 1304, 0|(1ULL<<MCID::MayLoad), 0x5080100283ULL }, // Inst #2496 = MOV16ao16 |
| 39605 | { 2495, 0, 0, 0, 8, 2, 3, X86ImpOpBase + 354, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5304002040ULL }, // Inst #2495 = MONTMUL |
| 39606 | { 2494, 0, 0, 0, 8, 3, 0, X86ImpOpBase + 351, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207aULL }, // Inst #2494 = MONITORX64rrr |
| 39607 | { 2493, 0, 0, 0, 8, 3, 0, X86ImpOpBase + 348, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207aULL }, // Inst #2493 = MONITORX32rrr |
| 39608 | { 2492, 0, 0, 0, 708, 3, 0, X86ImpOpBase + 351, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002048ULL }, // Inst #2492 = MONITOR64rrr |
| 39609 | { 2491, 0, 0, 0, 708, 3, 0, X86ImpOpBase + 348, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002048ULL }, // Inst #2491 = MONITOR32rrr |
| 39610 | { 2490, 3, 1, 0, 1190, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7780002029ULL }, // Inst #2490 = MMX_PXORrr |
| 39611 | { 2489, 7, 1, 0, 204, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7780002019ULL }, // Inst #2489 = MMX_PXORrm |
| 39612 | { 2488, 3, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3080002029ULL }, // Inst #2488 = MMX_PUNPCKLWDrr |
| 39613 | { 2487, 7, 1, 0, 202, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3080002019ULL }, // Inst #2487 = MMX_PUNPCKLWDrm |
| 39614 | { 2486, 3, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3100002029ULL }, // Inst #2486 = MMX_PUNPCKLDQrr |
| 39615 | { 2485, 7, 1, 0, 202, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3100002019ULL }, // Inst #2485 = MMX_PUNPCKLDQrm |
| 39616 | { 2484, 3, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3000002029ULL }, // Inst #2484 = MMX_PUNPCKLBWrr |
| 39617 | { 2483, 7, 1, 0, 202, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3000002019ULL }, // Inst #2483 = MMX_PUNPCKLBWrm |
| 39618 | { 2482, 3, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3480002029ULL }, // Inst #2482 = MMX_PUNPCKHWDrr |
| 39619 | { 2481, 7, 1, 0, 202, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3480002019ULL }, // Inst #2481 = MMX_PUNPCKHWDrm |
| 39620 | { 2480, 3, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3500002029ULL }, // Inst #2480 = MMX_PUNPCKHDQrr |
| 39621 | { 2479, 7, 1, 0, 202, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3500002019ULL }, // Inst #2479 = MMX_PUNPCKHDQrm |
| 39622 | { 2478, 3, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3400002029ULL }, // Inst #2478 = MMX_PUNPCKHBWrr |
| 39623 | { 2477, 7, 1, 0, 202, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3400002019ULL }, // Inst #2477 = MMX_PUNPCKHBWrm |
| 39624 | { 2476, 3, 1, 0, 1192, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7c80002029ULL }, // Inst #2476 = MMX_PSUBWrr |
| 39625 | { 2475, 7, 1, 0, 1535, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7c80002019ULL }, // Inst #2475 = MMX_PSUBWrm |
| 39626 | { 2474, 3, 1, 0, 1198, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x6c80002029ULL }, // Inst #2474 = MMX_PSUBUSWrr |
| 39627 | { 2473, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6c80002019ULL }, // Inst #2473 = MMX_PSUBUSWrm |
| 39628 | { 2472, 3, 1, 0, 1198, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x6c00002029ULL }, // Inst #2472 = MMX_PSUBUSBrr |
| 39629 | { 2471, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6c00002019ULL }, // Inst #2471 = MMX_PSUBUSBrm |
| 39630 | { 2470, 3, 1, 0, 1198, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7480002029ULL }, // Inst #2470 = MMX_PSUBSWrr |
| 39631 | { 2469, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7480002019ULL }, // Inst #2469 = MMX_PSUBSWrm |
| 39632 | { 2468, 3, 1, 0, 1198, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7400002029ULL }, // Inst #2468 = MMX_PSUBSBrr |
| 39633 | { 2467, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7400002019ULL }, // Inst #2467 = MMX_PSUBSBrm |
| 39634 | { 2466, 3, 1, 0, 644, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7d80002029ULL }, // Inst #2466 = MMX_PSUBQrr |
| 39635 | { 2465, 7, 1, 0, 656, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7d80002019ULL }, // Inst #2465 = MMX_PSUBQrm |
| 39636 | { 2464, 3, 1, 0, 1192, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7d00002029ULL }, // Inst #2464 = MMX_PSUBDrr |
| 39637 | { 2463, 7, 1, 0, 1535, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7d00002019ULL }, // Inst #2463 = MMX_PSUBDrm |
| 39638 | { 2462, 3, 1, 0, 1192, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7c00002029ULL }, // Inst #2462 = MMX_PSUBBrr |
| 39639 | { 2461, 7, 1, 0, 1535, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7c00002019ULL }, // Inst #2461 = MMX_PSUBBrm |
| 39640 | { 2460, 3, 1, 0, 220, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x6880002029ULL }, // Inst #2460 = MMX_PSRLWrr |
| 39641 | { 2459, 7, 1, 0, 219, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6880002019ULL }, // Inst #2459 = MMX_PSRLWrm |
| 39642 | { 2458, 3, 1, 0, 218, 0, 0, X86ImpOpBase + 0, 1301, 0, 0x3880042032ULL }, // Inst #2458 = MMX_PSRLWri |
| 39643 | { 2457, 3, 1, 0, 220, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x6980002029ULL }, // Inst #2457 = MMX_PSRLQrr |
| 39644 | { 2456, 7, 1, 0, 219, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6980002019ULL }, // Inst #2456 = MMX_PSRLQrm |
| 39645 | { 2455, 3, 1, 0, 218, 0, 0, X86ImpOpBase + 0, 1301, 0, 0x3980042032ULL }, // Inst #2455 = MMX_PSRLQri |
| 39646 | { 2454, 3, 1, 0, 220, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x6900002029ULL }, // Inst #2454 = MMX_PSRLDrr |
| 39647 | { 2453, 7, 1, 0, 219, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6900002019ULL }, // Inst #2453 = MMX_PSRLDrm |
| 39648 | { 2452, 3, 1, 0, 218, 0, 0, X86ImpOpBase + 0, 1301, 0, 0x3900042032ULL }, // Inst #2452 = MMX_PSRLDri |
| 39649 | { 2451, 3, 1, 0, 220, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7080002029ULL }, // Inst #2451 = MMX_PSRAWrr |
| 39650 | { 2450, 7, 1, 0, 219, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7080002019ULL }, // Inst #2450 = MMX_PSRAWrm |
| 39651 | { 2449, 3, 1, 0, 218, 0, 0, X86ImpOpBase + 0, 1301, 0, 0x3880042034ULL }, // Inst #2449 = MMX_PSRAWri |
| 39652 | { 2448, 3, 1, 0, 220, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7100002029ULL }, // Inst #2448 = MMX_PSRADrr |
| 39653 | { 2447, 7, 1, 0, 219, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7100002019ULL }, // Inst #2447 = MMX_PSRADrm |
| 39654 | { 2446, 3, 1, 0, 218, 0, 0, X86ImpOpBase + 0, 1301, 0, 0x3900042034ULL }, // Inst #2446 = MMX_PSRADri |
| 39655 | { 2445, 3, 1, 0, 220, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7880002029ULL }, // Inst #2445 = MMX_PSLLWrr |
| 39656 | { 2444, 7, 1, 0, 219, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7880002019ULL }, // Inst #2444 = MMX_PSLLWrm |
| 39657 | { 2443, 3, 1, 0, 218, 0, 0, X86ImpOpBase + 0, 1301, 0, 0x3880042036ULL }, // Inst #2443 = MMX_PSLLWri |
| 39658 | { 2442, 3, 1, 0, 220, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7980002029ULL }, // Inst #2442 = MMX_PSLLQrr |
| 39659 | { 2441, 7, 1, 0, 219, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7980002019ULL }, // Inst #2441 = MMX_PSLLQrm |
| 39660 | { 2440, 3, 1, 0, 218, 0, 0, X86ImpOpBase + 0, 1301, 0, 0x3980042036ULL }, // Inst #2440 = MMX_PSLLQri |
| 39661 | { 2439, 3, 1, 0, 220, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x7900002029ULL }, // Inst #2439 = MMX_PSLLDrr |
| 39662 | { 2438, 7, 1, 0, 219, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7900002019ULL }, // Inst #2438 = MMX_PSLLDrm |
| 39663 | { 2437, 3, 1, 0, 218, 0, 0, X86ImpOpBase + 0, 1301, 0, 0x3900042036ULL }, // Inst #2437 = MMX_PSLLDri |
| 39664 | { 2436, 3, 1, 0, 743, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x498004029ULL }, // Inst #2436 = MMX_PSIGNWrr |
| 39665 | { 2435, 7, 1, 0, 777, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x498004019ULL }, // Inst #2435 = MMX_PSIGNWrm |
| 39666 | { 2434, 3, 1, 0, 743, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x518004029ULL }, // Inst #2434 = MMX_PSIGNDrr |
| 39667 | { 2433, 7, 1, 0, 777, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x518004019ULL }, // Inst #2433 = MMX_PSIGNDrm |
| 39668 | { 2432, 3, 1, 0, 743, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x418004029ULL }, // Inst #2432 = MMX_PSIGNBrr |
| 39669 | { 2431, 7, 1, 0, 777, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x418004019ULL }, // Inst #2431 = MMX_PSIGNBrm |
| 39670 | { 2430, 3, 1, 0, 184, 0, 0, X86ImpOpBase + 0, 1298, 0, 0x3800042029ULL }, // Inst #2430 = MMX_PSHUFWri |
| 39671 | { 2429, 7, 1, 0, 217, 0, 0, X86ImpOpBase + 0, 1291, 0|(1ULL<<MCID::MayLoad), 0x3800042019ULL }, // Inst #2429 = MMX_PSHUFWmi |
| 39672 | { 2428, 3, 1, 0, 216, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x18004029ULL }, // Inst #2428 = MMX_PSHUFBrr |
| 39673 | { 2427, 7, 1, 0, 215, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x18004019ULL }, // Inst #2427 = MMX_PSHUFBrm |
| 39674 | { 2426, 3, 1, 0, 214, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7b00002029ULL }, // Inst #2426 = MMX_PSADBWrr |
| 39675 | { 2425, 7, 1, 0, 213, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7b00002019ULL }, // Inst #2425 = MMX_PSADBWrm |
| 39676 | { 2424, 3, 1, 0, 205, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7580002029ULL }, // Inst #2424 = MMX_PORrr |
| 39677 | { 2423, 7, 1, 0, 204, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7580002019ULL }, // Inst #2423 = MMX_PORrm |
| 39678 | { 2422, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7a00002029ULL }, // Inst #2422 = MMX_PMULUDQrr |
| 39679 | { 2421, 7, 1, 0, 210, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7a00002019ULL }, // Inst #2421 = MMX_PMULUDQrm |
| 39680 | { 2420, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x6a80002029ULL }, // Inst #2420 = MMX_PMULLWrr |
| 39681 | { 2419, 7, 1, 0, 210, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6a80002019ULL }, // Inst #2419 = MMX_PMULLWrm |
| 39682 | { 2418, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7280002029ULL }, // Inst #2418 = MMX_PMULHWrr |
| 39683 | { 2417, 7, 1, 0, 210, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7280002019ULL }, // Inst #2417 = MMX_PMULHWrm |
| 39684 | { 2416, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7200002029ULL }, // Inst #2416 = MMX_PMULHUWrr |
| 39685 | { 2415, 7, 1, 0, 210, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7200002019ULL }, // Inst #2415 = MMX_PMULHUWrm |
| 39686 | { 2414, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x598004029ULL }, // Inst #2414 = MMX_PMULHRSWrr |
| 39687 | { 2413, 7, 1, 0, 210, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x598004019ULL }, // Inst #2413 = MMX_PMULHRSWrm |
| 39688 | { 2412, 2, 1, 0, 212, 0, 0, X86ImpOpBase + 0, 1252, 0, 0x6b80002029ULL }, // Inst #2412 = MMX_PMOVMSKBrr |
| 39689 | { 2411, 3, 1, 0, 1200, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x6d00002029ULL }, // Inst #2411 = MMX_PMINUBrr |
| 39690 | { 2410, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6d00002019ULL }, // Inst #2410 = MMX_PMINUBrm |
| 39691 | { 2409, 3, 1, 0, 1200, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7500002029ULL }, // Inst #2409 = MMX_PMINSWrr |
| 39692 | { 2408, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7500002019ULL }, // Inst #2408 = MMX_PMINSWrm |
| 39693 | { 2407, 3, 1, 0, 1200, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x6f00002029ULL }, // Inst #2407 = MMX_PMAXUBrr |
| 39694 | { 2406, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6f00002019ULL }, // Inst #2406 = MMX_PMAXUBrm |
| 39695 | { 2405, 3, 1, 0, 1200, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7700002029ULL }, // Inst #2405 = MMX_PMAXSWrr |
| 39696 | { 2404, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7700002019ULL }, // Inst #2404 = MMX_PMAXSWrm |
| 39697 | { 2403, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7a80002029ULL }, // Inst #2403 = MMX_PMADDWDrr |
| 39698 | { 2402, 7, 1, 0, 210, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7a80002019ULL }, // Inst #2402 = MMX_PMADDWDrm |
| 39699 | { 2401, 3, 1, 0, 211, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x218004029ULL }, // Inst #2401 = MMX_PMADDUBSWrr |
| 39700 | { 2400, 7, 1, 0, 210, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x218004019ULL }, // Inst #2400 = MMX_PMADDUBSWrm |
| 39701 | { 2399, 4, 1, 0, 1534, 0, 0, X86ImpOpBase + 0, 1287, 0, 0x6200042029ULL }, // Inst #2399 = MMX_PINSRWrr |
| 39702 | { 2398, 8, 1, 0, 1536, 0, 0, X86ImpOpBase + 0, 1272, 0|(1ULL<<MCID::MayLoad), 0x6200042019ULL }, // Inst #2398 = MMX_PINSRWrm |
| 39703 | { 2397, 3, 1, 0, 667, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x298004029ULL }, // Inst #2397 = MMX_PHSUBWrr |
| 39704 | { 2396, 7, 1, 0, 676, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x298004019ULL }, // Inst #2396 = MMX_PHSUBWrm |
| 39705 | { 2395, 3, 1, 0, 1206, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x398004029ULL }, // Inst #2395 = MMX_PHSUBSWrr |
| 39706 | { 2394, 7, 1, 0, 1214, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x398004019ULL }, // Inst #2394 = MMX_PHSUBSWrm |
| 39707 | { 2393, 3, 1, 0, 207, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x318004029ULL }, // Inst #2393 = MMX_PHSUBDrr |
| 39708 | { 2392, 7, 1, 0, 206, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x318004019ULL }, // Inst #2392 = MMX_PHSUBDrm |
| 39709 | { 2391, 3, 1, 0, 667, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x98004029ULL }, // Inst #2391 = MMX_PHADDWrr |
| 39710 | { 2390, 7, 1, 0, 676, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x98004019ULL }, // Inst #2390 = MMX_PHADDWrm |
| 39711 | { 2389, 3, 1, 0, 1206, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x198004029ULL }, // Inst #2389 = MMX_PHADDSWrr |
| 39712 | { 2388, 7, 1, 0, 1214, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x198004019ULL }, // Inst #2388 = MMX_PHADDSWrm |
| 39713 | { 2387, 3, 1, 0, 207, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x118004029ULL }, // Inst #2387 = MMX_PHADDDrr |
| 39714 | { 2386, 7, 1, 0, 206, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x118004019ULL }, // Inst #2386 = MMX_PHADDDrm |
| 39715 | { 2385, 3, 1, 0, 1498, 0, 0, X86ImpOpBase + 0, 1284, 0, 0x6280042029ULL }, // Inst #2385 = MMX_PEXTRWrr |
| 39716 | { 2384, 3, 1, 0, 1201, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3280002029ULL }, // Inst #2384 = MMX_PCMPGTWrr |
| 39717 | { 2383, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3280002019ULL }, // Inst #2383 = MMX_PCMPGTWrm |
| 39718 | { 2382, 3, 1, 0, 1201, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3300002029ULL }, // Inst #2382 = MMX_PCMPGTDrr |
| 39719 | { 2381, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3300002019ULL }, // Inst #2381 = MMX_PCMPGTDrm |
| 39720 | { 2380, 3, 1, 0, 1201, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3200002029ULL }, // Inst #2380 = MMX_PCMPGTBrr |
| 39721 | { 2379, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3200002019ULL }, // Inst #2379 = MMX_PCMPGTBrm |
| 39722 | { 2378, 3, 1, 0, 1200, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3a80002029ULL }, // Inst #2378 = MMX_PCMPEQWrr |
| 39723 | { 2377, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3a80002019ULL }, // Inst #2377 = MMX_PCMPEQWrm |
| 39724 | { 2376, 3, 1, 0, 1200, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3b00002029ULL }, // Inst #2376 = MMX_PCMPEQDrr |
| 39725 | { 2375, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3b00002019ULL }, // Inst #2375 = MMX_PCMPEQDrm |
| 39726 | { 2374, 3, 1, 0, 1200, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3a00002029ULL }, // Inst #2374 = MMX_PCMPEQBrr |
| 39727 | { 2373, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3a00002019ULL }, // Inst #2373 = MMX_PCMPEQBrm |
| 39728 | { 2372, 3, 1, 0, 1041, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7180002029ULL }, // Inst #2372 = MMX_PAVGWrr |
| 39729 | { 2371, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7180002019ULL }, // Inst #2371 = MMX_PAVGWrm |
| 39730 | { 2370, 3, 1, 0, 1041, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7000002029ULL }, // Inst #2370 = MMX_PAVGBrr |
| 39731 | { 2369, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7000002019ULL }, // Inst #2369 = MMX_PAVGBrm |
| 39732 | { 2368, 3, 1, 0, 205, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x6d80002029ULL }, // Inst #2368 = MMX_PANDrr |
| 39733 | { 2367, 7, 1, 0, 204, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6d80002019ULL }, // Inst #2367 = MMX_PANDrm |
| 39734 | { 2366, 3, 1, 0, 1190, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x6f80002029ULL }, // Inst #2366 = MMX_PANDNrr |
| 39735 | { 2365, 7, 1, 0, 204, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6f80002019ULL }, // Inst #2365 = MMX_PANDNrm |
| 39736 | { 2364, 4, 1, 0, 745, 0, 0, X86ImpOpBase + 0, 1280, 0, 0x798046029ULL }, // Inst #2364 = MMX_PALIGNRrri |
| 39737 | { 2363, 8, 1, 0, 776, 0, 0, X86ImpOpBase + 0, 1272, 0|(1ULL<<MCID::MayLoad), 0x798046019ULL }, // Inst #2363 = MMX_PALIGNRrmi |
| 39738 | { 2362, 3, 1, 0, 1499, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7e80002029ULL }, // Inst #2362 = MMX_PADDWrr |
| 39739 | { 2361, 7, 1, 0, 1535, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7e80002019ULL }, // Inst #2361 = MMX_PADDWrm |
| 39740 | { 2360, 3, 1, 0, 1041, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x6e80002029ULL }, // Inst #2360 = MMX_PADDUSWrr |
| 39741 | { 2359, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6e80002019ULL }, // Inst #2359 = MMX_PADDUSWrm |
| 39742 | { 2358, 3, 1, 0, 1041, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x6e00002029ULL }, // Inst #2358 = MMX_PADDUSBrr |
| 39743 | { 2357, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6e00002019ULL }, // Inst #2357 = MMX_PADDUSBrm |
| 39744 | { 2356, 3, 1, 0, 1041, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7680002029ULL }, // Inst #2356 = MMX_PADDSWrr |
| 39745 | { 2355, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7680002019ULL }, // Inst #2355 = MMX_PADDSWrm |
| 39746 | { 2354, 3, 1, 0, 1041, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7600002029ULL }, // Inst #2354 = MMX_PADDSBrr |
| 39747 | { 2353, 7, 1, 0, 1209, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7600002019ULL }, // Inst #2353 = MMX_PADDSBrm |
| 39748 | { 2352, 3, 1, 0, 744, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x6a00002029ULL }, // Inst #2352 = MMX_PADDQrr |
| 39749 | { 2351, 7, 1, 0, 781, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x6a00002019ULL }, // Inst #2351 = MMX_PADDQrm |
| 39750 | { 2350, 3, 1, 0, 1499, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7f00002029ULL }, // Inst #2350 = MMX_PADDDrr |
| 39751 | { 2349, 7, 1, 0, 1535, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7f00002019ULL }, // Inst #2349 = MMX_PADDDrm |
| 39752 | { 2348, 3, 1, 0, 1499, 0, 0, X86ImpOpBase + 0, 1269, 0|(1ULL<<MCID::Commutable), 0x7e00002029ULL }, // Inst #2348 = MMX_PADDBrr |
| 39753 | { 2347, 7, 1, 0, 1535, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x7e00002019ULL }, // Inst #2347 = MMX_PADDBrm |
| 39754 | { 2346, 3, 1, 0, 870, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3380002029ULL }, // Inst #2346 = MMX_PACKUSWBrr |
| 39755 | { 2345, 7, 1, 0, 864, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3380002019ULL }, // Inst #2345 = MMX_PACKUSWBrm |
| 39756 | { 2344, 3, 1, 0, 1533, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3180002029ULL }, // Inst #2344 = MMX_PACKSSWBrr |
| 39757 | { 2343, 7, 1, 0, 1532, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3180002019ULL }, // Inst #2343 = MMX_PACKSSWBrm |
| 39758 | { 2342, 3, 1, 0, 1533, 0, 0, X86ImpOpBase + 0, 1269, 0, 0x3580002029ULL }, // Inst #2342 = MMX_PACKSSDWrr |
| 39759 | { 2341, 7, 1, 0, 1532, 0, 0, X86ImpOpBase + 0, 1262, 0|(1ULL<<MCID::MayLoad), 0x3580002019ULL }, // Inst #2341 = MMX_PACKSSDWrm |
| 39760 | { 2340, 2, 1, 0, 743, 0, 0, X86ImpOpBase + 0, 1242, 0, 0xe98004029ULL }, // Inst #2340 = MMX_PABSWrr |
| 39761 | { 2339, 6, 1, 0, 775, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0xe98004019ULL }, // Inst #2339 = MMX_PABSWrm |
| 39762 | { 2338, 2, 1, 0, 743, 0, 0, X86ImpOpBase + 0, 1242, 0, 0xf18004029ULL }, // Inst #2338 = MMX_PABSDrr |
| 39763 | { 2337, 6, 1, 0, 775, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0xf18004019ULL }, // Inst #2337 = MMX_PABSDrm |
| 39764 | { 2336, 2, 1, 0, 743, 0, 0, X86ImpOpBase + 0, 1242, 0, 0xe18004029ULL }, // Inst #2336 = MMX_PABSBrr |
| 39765 | { 2335, 6, 1, 0, 775, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0xe18004019ULL }, // Inst #2335 = MMX_PABSBrm |
| 39766 | { 2334, 2, 1, 0, 200, 0, 0, X86ImpOpBase + 0, 1242, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Bitcast), 0x3f80002028ULL }, // Inst #2334 = MMX_MOVQ64rr_REV |
| 39767 | { 2333, 2, 1, 0, 200, 0, 0, X86ImpOpBase + 0, 1242, 0|(1ULL<<MCID::MoveReg)|(1ULL<<MCID::Bitcast), 0x3780002029ULL }, // Inst #2333 = MMX_MOVQ64rr |
| 39768 | { 2332, 6, 1, 0, 1529, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x3780002019ULL }, // Inst #2332 = MMX_MOVQ64rm |
| 39769 | { 2331, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 1244, 0|(1ULL<<MCID::MayStore), 0x3f80002018ULL }, // Inst #2331 = MMX_MOVQ64mr |
| 39770 | { 2330, 2, 1, 0, 1036, 0, 0, X86ImpOpBase + 0, 1260, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00043029ULL }, // Inst #2330 = MMX_MOVQ2FR64rr |
| 39771 | { 2329, 2, 1, 0, 839, 0, 0, X86ImpOpBase + 0, 1237, 0, 0x6b00043029ULL }, // Inst #2329 = MMX_MOVQ2DQrr |
| 39772 | { 2328, 6, 0, 0, 199, 0, 0, X86ImpOpBase + 0, 1244, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7380002018ULL }, // Inst #2328 = MMX_MOVNTQmr |
| 39773 | { 2327, 2, 1, 0, 1531, 0, 0, X86ImpOpBase + 0, 1258, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00043829ULL }, // Inst #2327 = MMX_MOVFR642Qrr |
| 39774 | { 2326, 2, 1, 0, 750, 0, 0, X86ImpOpBase + 0, 1235, 0, 0x6b00043829ULL }, // Inst #2326 = MMX_MOVDQ2Qrr |
| 39775 | { 2325, 2, 1, 0, 1037, 0, 0, X86ImpOpBase + 0, 1256, 0|(1ULL<<MCID::Bitcast), 0x3700022029ULL }, // Inst #2325 = MMX_MOVD64to64rr |
| 39776 | { 2324, 6, 1, 0, 1530, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0x3700022019ULL }, // Inst #2324 = MMX_MOVD64to64rm |
| 39777 | { 2323, 2, 1, 0, 1037, 0, 0, X86ImpOpBase + 0, 1254, 0, 0x3700002029ULL }, // Inst #2323 = MMX_MOVD64rr |
| 39778 | { 2322, 6, 1, 0, 1529, 0, 0, X86ImpOpBase + 0, 1229, 0|(1ULL<<MCID::MayLoad), 0x3700002019ULL }, // Inst #2322 = MMX_MOVD64rm |
| 39779 | { 2321, 6, 0, 0, 1528, 0, 0, X86ImpOpBase + 0, 1244, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3f00002018ULL }, // Inst #2321 = MMX_MOVD64mr |
| 39780 | { 2320, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 1252, 0, 0x3f00002028ULL }, // Inst #2320 = MMX_MOVD64grr |
| 39781 | { 2319, 2, 1, 0, 195, 0, 0, X86ImpOpBase + 0, 1250, 0|(1ULL<<MCID::Bitcast), 0x3f00022028ULL }, // Inst #2319 = MMX_MOVD64from64rr |
| 39782 | { 2318, 6, 0, 0, 194, 0, 0, X86ImpOpBase + 0, 1244, 0|(1ULL<<MCID::MayStore), 0x3f00022018ULL }, // Inst #2318 = MMX_MOVD64from64mr |
| 39783 | { 2317, 2, 0, 0, 946, 1, 0, X86ImpOpBase + 331, 1242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80002029ULL }, // Inst #2317 = MMX_MASKMOVQ64 |
| 39784 | { 2316, 2, 0, 0, 946, 1, 0, X86ImpOpBase + 330, 1242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80002029ULL }, // Inst #2316 = MMX_MASKMOVQ |
| 39785 | { 2315, 0, 0, 0, 146, 0, 16, X86ImpOpBase + 332, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3b80002001ULL }, // Inst #2315 = MMX_EMMS |
| 39786 | { 2314, 2, 1, 0, 618, 1, 0, X86ImpOpBase + 78, 1235, 0|(1ULL<<MCID::MayRaiseFPException), 0x1608002029ULL }, // Inst #2314 = MMX_CVTTPS2PIrr |
| 39787 | { 2313, 6, 1, 0, 623, 1, 0, X86ImpOpBase + 78, 1229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1608002019ULL }, // Inst #2313 = MMX_CVTTPS2PIrm |
| 39788 | { 2312, 2, 1, 0, 1178, 1, 0, X86ImpOpBase + 78, 1235, 0|(1ULL<<MCID::MayRaiseFPException), 0x1610002829ULL }, // Inst #2312 = MMX_CVTTPD2PIrr |
| 39789 | { 2311, 6, 1, 0, 1043, 1, 0, X86ImpOpBase + 78, 1229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1610002819ULL }, // Inst #2311 = MMX_CVTTPD2PIrm |
| 39790 | { 2310, 2, 1, 0, 618, 1, 0, X86ImpOpBase + 78, 1235, 0|(1ULL<<MCID::MayRaiseFPException), 0x1688002029ULL }, // Inst #2310 = MMX_CVTPS2PIrr |
| 39791 | { 2309, 6, 1, 0, 623, 1, 0, X86ImpOpBase + 78, 1229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1688002019ULL }, // Inst #2309 = MMX_CVTPS2PIrm |
| 39792 | { 2308, 3, 1, 0, 616, 1, 0, X86ImpOpBase + 78, 1239, 0|(1ULL<<MCID::MayRaiseFPException), 0x1508002029ULL }, // Inst #2308 = MMX_CVTPI2PSrr |
| 39793 | { 2307, 7, 1, 0, 617, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1508002019ULL }, // Inst #2307 = MMX_CVTPI2PSrm |
| 39794 | { 2306, 2, 1, 0, 981, 0, 0, X86ImpOpBase + 0, 1237, 0, 0x1510002829ULL }, // Inst #2306 = MMX_CVTPI2PDrr |
| 39795 | { 2305, 6, 1, 0, 872, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x1510002819ULL }, // Inst #2305 = MMX_CVTPI2PDrm |
| 39796 | { 2304, 2, 1, 0, 982, 1, 0, X86ImpOpBase + 78, 1235, 0|(1ULL<<MCID::MayRaiseFPException), 0x1690002829ULL }, // Inst #2304 = MMX_CVTPD2PIrr |
| 39797 | { 2303, 6, 1, 0, 1043, 1, 0, X86ImpOpBase + 78, 1229, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1690002819ULL }, // Inst #2303 = MMX_CVTPD2PIrm |
| 39798 | { 2302, 3, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e88003029ULL }, // Inst #2302 = MINSSrr_Int |
| 39799 | { 2301, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 492, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e88003029ULL }, // Inst #2301 = MINSSrr |
| 39800 | { 2300, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e88003019ULL }, // Inst #2300 = MINSSrm_Int |
| 39801 | { 2299, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 485, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e88003019ULL }, // Inst #2299 = MINSSrm |
| 39802 | { 2298, 3, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e90003829ULL }, // Inst #2298 = MINSDrr_Int |
| 39803 | { 2297, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 482, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e90003829ULL }, // Inst #2297 = MINSDrr |
| 39804 | { 2296, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e90003819ULL }, // Inst #2296 = MINSDrm_Int |
| 39805 | { 2295, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 475, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e90003819ULL }, // Inst #2295 = MINSDrm |
| 39806 | { 2294, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e88002029ULL }, // Inst #2294 = MINPSrr |
| 39807 | { 2293, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e88002019ULL }, // Inst #2293 = MINPSrm |
| 39808 | { 2292, 3, 1, 0, 77, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2e90002829ULL }, // Inst #2292 = MINPDrr |
| 39809 | { 2291, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e90002819ULL }, // Inst #2291 = MINPDrm |
| 39810 | { 2290, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 492, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2e88003029ULL }, // Inst #2290 = MINCSSrr |
| 39811 | { 2289, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 485, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e88003019ULL }, // Inst #2289 = MINCSSrm |
| 39812 | { 2288, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 482, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2e90003829ULL }, // Inst #2288 = MINCSDrr |
| 39813 | { 2287, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 475, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e90003819ULL }, // Inst #2287 = MINCSDrm |
| 39814 | { 2286, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2e88002029ULL }, // Inst #2286 = MINCPSrr |
| 39815 | { 2285, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e88002019ULL }, // Inst #2285 = MINCPSrm |
| 39816 | { 2284, 3, 1, 0, 77, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2e90002829ULL }, // Inst #2284 = MINCPDrr |
| 39817 | { 2283, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2e90002819ULL }, // Inst #2283 = MINCPDrm |
| 39818 | { 2282, 0, 0, 0, 862, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000203eULL }, // Inst #2282 = MFENCE |
| 39819 | { 2281, 3, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f88003029ULL }, // Inst #2281 = MAXSSrr_Int |
| 39820 | { 2280, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 492, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f88003029ULL }, // Inst #2280 = MAXSSrr |
| 39821 | { 2279, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f88003019ULL }, // Inst #2279 = MAXSSrm_Int |
| 39822 | { 2278, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 485, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f88003019ULL }, // Inst #2278 = MAXSSrm |
| 39823 | { 2277, 3, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f90003829ULL }, // Inst #2277 = MAXSDrr_Int |
| 39824 | { 2276, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 482, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f90003829ULL }, // Inst #2276 = MAXSDrr |
| 39825 | { 2275, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f90003819ULL }, // Inst #2275 = MAXSDrm_Int |
| 39826 | { 2274, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 475, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f90003819ULL }, // Inst #2274 = MAXSDrm |
| 39827 | { 2273, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f88002029ULL }, // Inst #2273 = MAXPSrr |
| 39828 | { 2272, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f88002019ULL }, // Inst #2272 = MAXPSrm |
| 39829 | { 2271, 3, 1, 0, 77, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f90002829ULL }, // Inst #2271 = MAXPDrr |
| 39830 | { 2270, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f90002819ULL }, // Inst #2270 = MAXPDrm |
| 39831 | { 2269, 3, 1, 0, 83, 1, 0, X86ImpOpBase + 78, 492, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2f88003029ULL }, // Inst #2269 = MAXCSSrr |
| 39832 | { 2268, 7, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 485, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f88003019ULL }, // Inst #2268 = MAXCSSrm |
| 39833 | { 2267, 3, 1, 0, 81, 1, 0, X86ImpOpBase + 78, 482, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2f90003829ULL }, // Inst #2267 = MAXCSDrr |
| 39834 | { 2266, 7, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 475, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f90003819ULL }, // Inst #2266 = MAXCSDrm |
| 39835 | { 2265, 3, 1, 0, 79, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2f88002029ULL }, // Inst #2265 = MAXCPSrr |
| 39836 | { 2264, 7, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f88002019ULL }, // Inst #2264 = MAXCPSrm |
| 39837 | { 2263, 3, 1, 0, 77, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2f90002829ULL }, // Inst #2263 = MAXCPDrr |
| 39838 | { 2262, 7, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f90002819ULL }, // Inst #2262 = MAXCPDrm |
| 39839 | { 2261, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 1223, 0|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #2261 = MASKPAIR16STORE |
| 39840 | { 2260, 6, 1, 0, 14, 0, 0, X86ImpOpBase + 0, 1217, 0|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #2260 = MASKPAIR16LOAD |
| 39841 | { 2259, 2, 0, 0, 947, 1, 0, X86ImpOpBase + 331, 535, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b98002829ULL }, // Inst #2259 = MASKMOVDQU64 |
| 39842 | { 2258, 2, 0, 0, 947, 1, 0, X86ImpOpBase + 330, 535, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b98002829ULL }, // Inst #2258 = MASKMOVDQU |
| 39843 | { 2257, 2, 1, 0, 192, 0, 0, X86ImpOpBase + 0, 553, 0, 0x10007ae0030029ULL }, // Inst #2257 = LZCNT64rr_NF |
| 39844 | { 2256, 2, 1, 0, 192, 0, 1, X86ImpOpBase + 0, 553, 0, 0xc007ae0030029ULL }, // Inst #2256 = LZCNT64rr_EVEX |
| 39845 | { 2255, 2, 1, 0, 192, 0, 1, X86ImpOpBase + 0, 553, 0, 0x5e80023029ULL }, // Inst #2255 = LZCNT64rr |
| 39846 | { 2254, 6, 1, 0, 191, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10007ae0030019ULL }, // Inst #2254 = LZCNT64rm_NF |
| 39847 | { 2253, 6, 1, 0, 191, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0xc007ae0030019ULL }, // Inst #2253 = LZCNT64rm_EVEX |
| 39848 | { 2252, 6, 1, 0, 191, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x5e80023019ULL }, // Inst #2252 = LZCNT64rm |
| 39849 | { 2251, 2, 1, 0, 192, 0, 0, X86ImpOpBase + 0, 551, 0, 0x10007ae0010029ULL }, // Inst #2251 = LZCNT32rr_NF |
| 39850 | { 2250, 2, 1, 0, 192, 0, 1, X86ImpOpBase + 0, 551, 0, 0xc007ae0010029ULL }, // Inst #2250 = LZCNT32rr_EVEX |
| 39851 | { 2249, 2, 1, 0, 192, 0, 1, X86ImpOpBase + 0, 551, 0, 0x5e80003129ULL }, // Inst #2249 = LZCNT32rr |
| 39852 | { 2248, 6, 1, 0, 191, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10007ae0010019ULL }, // Inst #2248 = LZCNT32rm_NF |
| 39853 | { 2247, 6, 1, 0, 191, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0xc007ae0010019ULL }, // Inst #2247 = LZCNT32rm_EVEX |
| 39854 | { 2246, 6, 1, 0, 191, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x5e80003119ULL }, // Inst #2246 = LZCNT32rm |
| 39855 | { 2245, 2, 1, 0, 192, 0, 0, X86ImpOpBase + 0, 547, 0, 0x10007ae0010829ULL }, // Inst #2245 = LZCNT16rr_NF |
| 39856 | { 2244, 2, 1, 0, 192, 0, 1, X86ImpOpBase + 0, 547, 0, 0xc007ae0010829ULL }, // Inst #2244 = LZCNT16rr_EVEX |
| 39857 | { 2243, 2, 1, 0, 1026, 0, 1, X86ImpOpBase + 0, 547, 0, 0x5e800030a9ULL }, // Inst #2243 = LZCNT16rr |
| 39858 | { 2242, 6, 1, 0, 191, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10007ae0010819ULL }, // Inst #2242 = LZCNT16rm_NF |
| 39859 | { 2241, 6, 1, 0, 191, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0xc007ae0010819ULL }, // Inst #2241 = LZCNT16rm_EVEX |
| 39860 | { 2240, 6, 1, 0, 191, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x5e80003099ULL }, // Inst #2240 = LZCNT16rm |
| 39861 | { 2239, 7, 1, 0, 1152, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6002002019ULL }, // Inst #2239 = LXADD8 |
| 39862 | { 2238, 7, 1, 0, 1152, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082022019ULL }, // Inst #2238 = LXADD64 |
| 39863 | { 2237, 7, 1, 0, 1152, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082002119ULL }, // Inst #2237 = LXADD32 |
| 39864 | { 2236, 7, 1, 0, 1152, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082002099ULL }, // Inst #2236 = LXADD16 |
| 39865 | { 2235, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1214, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x89401ac031ULL }, // Inst #2235 = LWPVAL64rri |
| 39866 | { 2234, 7, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x89401ac021ULL }, // Inst #2234 = LWPVAL64rmi |
| 39867 | { 2233, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x894018c031ULL }, // Inst #2233 = LWPVAL32rri |
| 39868 | { 2232, 7, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x894018c021ULL }, // Inst #2232 = LWPVAL32rmi |
| 39869 | { 2231, 3, 0, 0, 8, 0, 1, X86ImpOpBase + 0, 1214, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x89401ac030ULL }, // Inst #2231 = LWPINS64rri |
| 39870 | { 2230, 7, 0, 0, 8, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x89401ac020ULL }, // Inst #2230 = LWPINS64rmi |
| 39871 | { 2229, 3, 0, 0, 8, 0, 1, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x894018c030ULL }, // Inst #2229 = LWPINS32rri |
| 39872 | { 2228, 7, 0, 0, 8, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x894018c020ULL }, // Inst #2228 = LWPINS32rmi |
| 39873 | { 2227, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2033ULL }, // Inst #2227 = LTRr |
| 39874 | { 2226, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2023ULL }, // Inst #2226 = LTRm |
| 39875 | { 2225, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900022019ULL }, // Inst #2225 = LSS64rm |
| 39876 | { 2224, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900002119ULL }, // Inst #2224 = LSS32rm |
| 39877 | { 2223, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900002099ULL }, // Inst #2223 = LSS16rm |
| 39878 | { 2222, 2, 1, 0, 1151, 0, 1, X86ImpOpBase + 0, 1195, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x180022029ULL }, // Inst #2222 = LSL64rr |
| 39879 | { 2221, 6, 1, 0, 875, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x180022019ULL }, // Inst #2221 = LSL64rm |
| 39880 | { 2220, 2, 1, 0, 1151, 0, 1, X86ImpOpBase + 0, 1193, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x180002129ULL }, // Inst #2220 = LSL32rr |
| 39881 | { 2219, 6, 1, 0, 875, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x180002119ULL }, // Inst #2219 = LSL32rm |
| 39882 | { 2218, 2, 1, 0, 1151, 0, 1, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1800020a9ULL }, // Inst #2218 = LSL16rr |
| 39883 | { 2217, 6, 1, 0, 875, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x180002099ULL }, // Inst #2217 = LSL16rm |
| 39884 | { 2216, 1, 0, 0, 822, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501d20001ULL }, // Inst #2216 = LRETI64 |
| 39885 | { 2215, 1, 0, 0, 822, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501d00101ULL }, // Inst #2215 = LRETI32 |
| 39886 | { 2214, 1, 0, 0, 822, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501d00081ULL }, // Inst #2214 = LRETI16 |
| 39887 | { 2213, 0, 0, 0, 913, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c20001ULL }, // Inst #2213 = LRET64 |
| 39888 | { 2212, 0, 0, 0, 935, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c00101ULL }, // Inst #2212 = LRET32 |
| 39889 | { 2211, 0, 0, 0, 935, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c00081ULL }, // Inst #2211 = LRET16 |
| 39890 | { 2210, 1, 0, 0, 692, 0, 0, X86ImpOpBase + 0, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7000080001ULL }, // Inst #2210 = LOOPNE |
| 39891 | { 2209, 1, 0, 0, 678, 0, 0, X86ImpOpBase + 0, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7080080001ULL }, // Inst #2209 = LOOPE |
| 39892 | { 2208, 1, 0, 0, 696, 0, 0, X86ImpOpBase + 0, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7100080001ULL }, // Inst #2208 = LOOP |
| 39893 | { 2207, 2, 0, 0, 640, 2, 2, X86ImpOpBase + 326, 1212, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680000084ULL }, // Inst #2207 = LODSW |
| 39894 | { 2206, 2, 0, 0, 778, 2, 2, X86ImpOpBase + 322, 1212, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680020004ULL }, // Inst #2206 = LODSQ |
| 39895 | { 2205, 2, 0, 0, 778, 2, 2, X86ImpOpBase + 318, 1212, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680000104ULL }, // Inst #2205 = LODSL |
| 39896 | { 2204, 2, 0, 0, 640, 2, 2, X86ImpOpBase + 314, 1212, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5600000004ULL }, // Inst #2204 = LODSB |
| 39897 | { 2203, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1802000018ULL }, // Inst #2203 = LOCK_XOR8mr |
| 39898 | { 2202, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4002040026ULL }, // Inst #2202 = LOCK_XOR8mi |
| 39899 | { 2201, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1882020018ULL }, // Inst #2201 = LOCK_XOR64mr |
| 39900 | { 2200, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182060026ULL }, // Inst #2200 = LOCK_XOR64mi8 |
| 39901 | { 2199, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082220026ULL }, // Inst #2199 = LOCK_XOR64mi32 |
| 39902 | { 2198, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1882000118ULL }, // Inst #2198 = LOCK_XOR32mr |
| 39903 | { 2197, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182040126ULL }, // Inst #2197 = LOCK_XOR32mi8 |
| 39904 | { 2196, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082180126ULL }, // Inst #2196 = LOCK_XOR32mi |
| 39905 | { 2195, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1882000098ULL }, // Inst #2195 = LOCK_XOR16mr |
| 39906 | { 2194, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41820400a6ULL }, // Inst #2194 = LOCK_XOR16mi8 |
| 39907 | { 2193, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40821000a6ULL }, // Inst #2193 = LOCK_XOR16mi |
| 39908 | { 2192, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1402000018ULL }, // Inst #2192 = LOCK_SUB8mr |
| 39909 | { 2191, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4002040025ULL }, // Inst #2191 = LOCK_SUB8mi |
| 39910 | { 2190, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1482020018ULL }, // Inst #2190 = LOCK_SUB64mr |
| 39911 | { 2189, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182060025ULL }, // Inst #2189 = LOCK_SUB64mi8 |
| 39912 | { 2188, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082220025ULL }, // Inst #2188 = LOCK_SUB64mi32 |
| 39913 | { 2187, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1482000118ULL }, // Inst #2187 = LOCK_SUB32mr |
| 39914 | { 2186, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182040125ULL }, // Inst #2186 = LOCK_SUB32mi8 |
| 39915 | { 2185, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082180125ULL }, // Inst #2185 = LOCK_SUB32mi |
| 39916 | { 2184, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1482000098ULL }, // Inst #2184 = LOCK_SUB16mr |
| 39917 | { 2183, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41820400a5ULL }, // Inst #2183 = LOCK_SUB16mi8 |
| 39918 | { 2182, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40821000a5ULL }, // Inst #2182 = LOCK_SUB16mi |
| 39919 | { 2181, 0, 0, 0, 17, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x780000000aULL }, // Inst #2181 = LOCK_PREFIX |
| 39920 | { 2180, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x402000018ULL }, // Inst #2180 = LOCK_OR8mr |
| 39921 | { 2179, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4002040021ULL }, // Inst #2179 = LOCK_OR8mi |
| 39922 | { 2178, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x482020018ULL }, // Inst #2178 = LOCK_OR64mr |
| 39923 | { 2177, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182060021ULL }, // Inst #2177 = LOCK_OR64mi8 |
| 39924 | { 2176, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082220021ULL }, // Inst #2176 = LOCK_OR64mi32 |
| 39925 | { 2175, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x482000118ULL }, // Inst #2175 = LOCK_OR32mr |
| 39926 | { 2174, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182040121ULL }, // Inst #2174 = LOCK_OR32mi8 |
| 39927 | { 2173, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082180121ULL }, // Inst #2173 = LOCK_OR32mi |
| 39928 | { 2172, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x482000098ULL }, // Inst #2172 = LOCK_OR16mr |
| 39929 | { 2171, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41820400a1ULL }, // Inst #2171 = LOCK_OR16mi8 |
| 39930 | { 2170, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40821000a1ULL }, // Inst #2170 = LOCK_OR16mi |
| 39931 | { 2169, 5, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f02000020ULL }, // Inst #2169 = LOCK_INC8m |
| 39932 | { 2168, 5, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f82020020ULL }, // Inst #2168 = LOCK_INC64m |
| 39933 | { 2167, 5, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f82000120ULL }, // Inst #2167 = LOCK_INC32m |
| 39934 | { 2166, 5, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f820000a0ULL }, // Inst #2166 = LOCK_INC16m |
| 39935 | { 2165, 5, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f02000021ULL }, // Inst #2165 = LOCK_DEC8m |
| 39936 | { 2164, 5, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f82020021ULL }, // Inst #2164 = LOCK_DEC64m |
| 39937 | { 2163, 5, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f82000121ULL }, // Inst #2163 = LOCK_DEC32m |
| 39938 | { 2162, 5, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f820000a1ULL }, // Inst #2162 = LOCK_DEC16m |
| 39939 | { 2161, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5582022018ULL }, // Inst #2161 = LOCK_BTS_RM64rm |
| 39940 | { 2160, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5582002118ULL }, // Inst #2160 = LOCK_BTS_RM32rm |
| 39941 | { 2159, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5582002098ULL }, // Inst #2159 = LOCK_BTS_RM16rm |
| 39942 | { 2158, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02062025ULL }, // Inst #2158 = LOCK_BTS64m |
| 39943 | { 2157, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02042125ULL }, // Inst #2157 = LOCK_BTS32m |
| 39944 | { 2156, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d020420a5ULL }, // Inst #2156 = LOCK_BTS16m |
| 39945 | { 2155, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5982022018ULL }, // Inst #2155 = LOCK_BTR_RM64rm |
| 39946 | { 2154, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5982002118ULL }, // Inst #2154 = LOCK_BTR_RM32rm |
| 39947 | { 2153, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5982002098ULL }, // Inst #2153 = LOCK_BTR_RM16rm |
| 39948 | { 2152, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02062026ULL }, // Inst #2152 = LOCK_BTR64m |
| 39949 | { 2151, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02042126ULL }, // Inst #2151 = LOCK_BTR32m |
| 39950 | { 2150, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d020420a6ULL }, // Inst #2150 = LOCK_BTR16m |
| 39951 | { 2149, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d82022018ULL }, // Inst #2149 = LOCK_BTC_RM64rm |
| 39952 | { 2148, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d82002118ULL }, // Inst #2148 = LOCK_BTC_RM32rm |
| 39953 | { 2147, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d82002098ULL }, // Inst #2147 = LOCK_BTC_RM16rm |
| 39954 | { 2146, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02062027ULL }, // Inst #2146 = LOCK_BTC64m |
| 39955 | { 2145, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d02042127ULL }, // Inst #2145 = LOCK_BTC32m |
| 39956 | { 2144, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d020420a7ULL }, // Inst #2144 = LOCK_BTC16m |
| 39957 | { 2143, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1002000018ULL }, // Inst #2143 = LOCK_AND8mr |
| 39958 | { 2142, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4002040024ULL }, // Inst #2142 = LOCK_AND8mi |
| 39959 | { 2141, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1082020018ULL }, // Inst #2141 = LOCK_AND64mr |
| 39960 | { 2140, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182060024ULL }, // Inst #2140 = LOCK_AND64mi8 |
| 39961 | { 2139, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082220024ULL }, // Inst #2139 = LOCK_AND64mi32 |
| 39962 | { 2138, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1082000118ULL }, // Inst #2138 = LOCK_AND32mr |
| 39963 | { 2137, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182040124ULL }, // Inst #2137 = LOCK_AND32mi8 |
| 39964 | { 2136, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082180124ULL }, // Inst #2136 = LOCK_AND32mi |
| 39965 | { 2135, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1082000098ULL }, // Inst #2135 = LOCK_AND16mr |
| 39966 | { 2134, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41820400a4ULL }, // Inst #2134 = LOCK_AND16mi8 |
| 39967 | { 2133, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40821000a4ULL }, // Inst #2133 = LOCK_AND16mi |
| 39968 | { 2132, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x2000018ULL }, // Inst #2132 = LOCK_ADD8mr |
| 39969 | { 2131, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4002040020ULL }, // Inst #2131 = LOCK_ADD8mi |
| 39970 | { 2130, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x82020018ULL }, // Inst #2130 = LOCK_ADD64mr |
| 39971 | { 2129, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182060020ULL }, // Inst #2129 = LOCK_ADD64mi8 |
| 39972 | { 2128, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082220020ULL }, // Inst #2128 = LOCK_ADD64mi32 |
| 39973 | { 2127, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x82000118ULL }, // Inst #2127 = LOCK_ADD32mr |
| 39974 | { 2126, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4182040120ULL }, // Inst #2126 = LOCK_ADD32mi8 |
| 39975 | { 2125, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4082180120ULL }, // Inst #2125 = LOCK_ADD32mi |
| 39976 | { 2124, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x82000098ULL }, // Inst #2124 = LOCK_ADD16mr |
| 39977 | { 2123, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41820400a0ULL }, // Inst #2123 = LOCK_ADD16mi8 |
| 39978 | { 2122, 6, 0, 0, 24, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40821000a0ULL }, // Inst #2122 = LOCK_ADD16mi |
| 39979 | { 2121, 2, 0, 0, 8, 2, 1, X86ImpOpBase + 311, 535, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00005029ULL }, // Inst #2121 = LOADIWKEY |
| 39980 | { 2120, 1, 0, 0, 1527, 0, 0, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002036ULL }, // Inst #2120 = LMSW16r |
| 39981 | { 2119, 5, 0, 0, 1526, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80002026ULL }, // Inst #2119 = LMSW16m |
| 39982 | { 2118, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x94002a030ULL }, // Inst #2118 = LLWPCB64 |
| 39983 | { 2117, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x94000a030ULL }, // Inst #2117 = LLWPCB |
| 39984 | { 2116, 1, 0, 0, 1525, 0, 0, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2032ULL }, // Inst #2116 = LLDT16r |
| 39985 | { 2115, 5, 0, 0, 1524, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2022ULL }, // Inst #2115 = LLDT16m |
| 39986 | { 2114, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3836ULL }, // Inst #2114 = LKGS16r |
| 39987 | { 2113, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x3826ULL }, // Inst #2113 = LKGS16m |
| 39988 | { 2112, 5, 0, 0, 1523, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002023ULL }, // Inst #2112 = LIDT64m |
| 39989 | { 2111, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002123ULL }, // Inst #2111 = LIDT32m |
| 39990 | { 2110, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800020a3ULL }, // Inst #2110 = LIDT16m |
| 39991 | { 2109, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80022019ULL }, // Inst #2109 = LGS64rm |
| 39992 | { 2108, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80002119ULL }, // Inst #2108 = LGS32rm |
| 39993 | { 2107, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80002099ULL }, // Inst #2107 = LGS16rm |
| 39994 | { 2106, 5, 0, 0, 1522, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002022ULL }, // Inst #2106 = LGDT64m |
| 39995 | { 2105, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002122ULL }, // Inst #2105 = LGDT32m |
| 39996 | { 2104, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x800020a2ULL }, // Inst #2104 = LGDT16m |
| 39997 | { 2103, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00022019ULL }, // Inst #2103 = LFS64rm |
| 39998 | { 2102, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00002119ULL }, // Inst #2102 = LFS32rm |
| 39999 | { 2101, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00002099ULL }, // Inst #2101 = LFS16rm |
| 40000 | { 2100, 0, 0, 0, 635, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000203dULL }, // Inst #2100 = LFENCE |
| 40001 | { 2099, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6200000119ULL }, // Inst #2099 = LES32rm |
| 40002 | { 2098, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6200000099ULL }, // Inst #2098 = LES16rm |
| 40003 | { 2097, 0, 0, 0, 637, 2, 2, X86ImpOpBase + 307, 1, 0|(1ULL<<MCID::MayLoad), 0x6480000001ULL }, // Inst #2097 = LEAVE64 |
| 40004 | { 2096, 0, 0, 0, 1521, 2, 2, X86ImpOpBase + 303, 1, 0|(1ULL<<MCID::MayLoad), 0x6480000001ULL }, // Inst #2096 = LEAVE |
| 40005 | { 2095, 6, 1, 0, 1019, 0, 0, X86ImpOpBase + 0, 1206, 0|(1ULL<<MCID::Rematerializable), 0x4680020019ULL }, // Inst #2095 = LEA64r |
| 40006 | { 2094, 6, 1, 0, 1019, 0, 0, X86ImpOpBase + 0, 1200, 0, 0x4680000119ULL }, // Inst #2094 = LEA64_32r |
| 40007 | { 2093, 6, 1, 0, 1019, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::Rematerializable), 0x4680000119ULL }, // Inst #2093 = LEA32r |
| 40008 | { 2092, 6, 1, 0, 1020, 0, 0, X86ImpOpBase + 0, 567, 0, 0x4680000099ULL }, // Inst #2092 = LEA16r |
| 40009 | { 2091, 1, 0, 0, 603, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000030ULL }, // Inst #2091 = LD_Frr |
| 40010 | { 2090, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1074, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2090 = LD_Fp80m |
| 40011 | { 2089, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1074, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2089 = LD_Fp64m80 |
| 40012 | { 2088, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1068, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2088 = LD_Fp64m |
| 40013 | { 2087, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1074, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2087 = LD_Fp32m80 |
| 40014 | { 2086, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1068, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2086 = LD_Fp32m64 |
| 40015 | { 2085, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1062, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x400000ULL }, // Inst #2085 = LD_Fp32m |
| 40016 | { 2084, 1, 1, 0, 2, 1, 1, X86ImpOpBase + 79, 1199, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2084 = LD_Fp180 |
| 40017 | { 2083, 1, 1, 0, 2, 1, 1, X86ImpOpBase + 79, 1198, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2083 = LD_Fp164 |
| 40018 | { 2082, 1, 1, 0, 2, 1, 1, X86ImpOpBase + 79, 1197, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2082 = LD_Fp132 |
| 40019 | { 2081, 1, 1, 0, 2, 1, 1, X86ImpOpBase + 79, 1199, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2081 = LD_Fp080 |
| 40020 | { 2080, 1, 1, 0, 2, 1, 1, X86ImpOpBase + 79, 1198, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2080 = LD_Fp064 |
| 40021 | { 2079, 1, 1, 0, 2, 1, 1, X86ImpOpBase + 79, 1197, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Rematerializable), 0x400000ULL }, // Inst #2079 = LD_Fp032 |
| 40022 | { 2078, 5, 0, 0, 662, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000025ULL }, // Inst #2078 = LD_F80m |
| 40023 | { 2077, 5, 0, 0, 794, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000020ULL }, // Inst #2077 = LD_F64m |
| 40024 | { 2076, 5, 0, 0, 794, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000020ULL }, // Inst #2076 = LD_F32m |
| 40025 | { 2075, 0, 0, 0, 189, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000068ULL }, // Inst #2075 = LD_F1 |
| 40026 | { 2074, 0, 0, 0, 188, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000006eULL }, // Inst #2074 = LD_F0 |
| 40027 | { 2073, 5, 0, 0, 8, 0, 8, X86ImpOpBase + 19, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x24e0004020ULL }, // Inst #2073 = LDTILECFG_EVEX |
| 40028 | { 2072, 5, 0, 0, 8, 0, 8, X86ImpOpBase + 19, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x24a0004020ULL }, // Inst #2072 = LDTILECFG |
| 40029 | { 2071, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6280000119ULL }, // Inst #2071 = LDS32rm |
| 40030 | { 2070, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6280000099ULL }, // Inst #2070 = LDS16rm |
| 40031 | { 2069, 5, 0, 0, 187, 0, 1, X86ImpOpBase + 78, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002022ULL }, // Inst #2069 = LDMXCSR |
| 40032 | { 2068, 6, 1, 0, 650, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x7810003819ULL }, // Inst #2068 = LDDQUrm |
| 40033 | { 2067, 5, 0, 0, 1195, 4, 3, X86ImpOpBase + 147, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x6382002021ULL }, // Inst #2067 = LCMPXCHG8B |
| 40034 | { 2066, 6, 0, 0, 1021, 1, 2, X86ImpOpBase + 75, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5802002018ULL }, // Inst #2066 = LCMPXCHG8 |
| 40035 | { 2065, 6, 0, 0, 1193, 1, 2, X86ImpOpBase + 72, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882022018ULL }, // Inst #2065 = LCMPXCHG64 |
| 40036 | { 2064, 6, 0, 0, 1193, 1, 2, X86ImpOpBase + 69, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882002118ULL }, // Inst #2064 = LCMPXCHG32 |
| 40037 | { 2063, 5, 0, 0, 1022, 4, 3, X86ImpOpBase + 140, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6382022021ULL }, // Inst #2063 = LCMPXCHG16B |
| 40038 | { 2062, 6, 0, 0, 1193, 1, 2, X86ImpOpBase + 46, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882002098ULL }, // Inst #2062 = LCMPXCHG16 |
| 40039 | { 2061, 2, 1, 0, 874, 0, 1, X86ImpOpBase + 0, 1195, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100022029ULL }, // Inst #2061 = LAR64rr |
| 40040 | { 2060, 6, 1, 0, 1520, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100022019ULL }, // Inst #2060 = LAR64rm |
| 40041 | { 2059, 2, 1, 0, 874, 0, 1, X86ImpOpBase + 0, 1193, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100002129ULL }, // Inst #2059 = LAR32rr |
| 40042 | { 2058, 6, 1, 0, 1519, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100002119ULL }, // Inst #2058 = LAR32rm |
| 40043 | { 2057, 2, 1, 0, 1518, 0, 1, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1000020a9ULL }, // Inst #2057 = LAR16rr |
| 40044 | { 2056, 6, 1, 0, 1517, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x100002099ULL }, // Inst #2056 = LAR16rm |
| 40045 | { 2055, 0, 0, 0, 924, 1, 1, X86ImpOpBase + 301, 1, 0, 0x4f80000001ULL }, // Inst #2055 = LAHF |
| 40046 | { 2054, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1097, 0|(1ULL<<MCID::Commutable), 0x1a3a0002029ULL }, // Inst #2054 = KXORWrr |
| 40047 | { 2053, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1094, 0|(1ULL<<MCID::Commutable), 0x1a3a0022029ULL }, // Inst #2053 = KXORQrr |
| 40048 | { 2052, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1091, 0|(1ULL<<MCID::Commutable), 0x1a3a0022829ULL }, // Inst #2052 = KXORDrr |
| 40049 | { 2051, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1088, 0|(1ULL<<MCID::Commutable), 0x1a3a0002829ULL }, // Inst #2051 = KXORBrr |
| 40050 | { 2050, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1097, 0|(1ULL<<MCID::Commutable), 0x1a320002029ULL }, // Inst #2050 = KXNORWrr |
| 40051 | { 2049, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1094, 0|(1ULL<<MCID::Commutable), 0x1a320022029ULL }, // Inst #2049 = KXNORQrr |
| 40052 | { 2048, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1091, 0|(1ULL<<MCID::Commutable), 0x1a320022829ULL }, // Inst #2048 = KXNORDrr |
| 40053 | { 2047, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1088, 0|(1ULL<<MCID::Commutable), 0x1a320002829ULL }, // Inst #2047 = KXNORBrr |
| 40054 | { 2046, 3, 1, 0, 1065, 0, 0, X86ImpOpBase + 0, 1190, 0, 0x1a5a0002029ULL }, // Inst #2046 = KUNPCKWDrr |
| 40055 | { 2045, 3, 1, 0, 1065, 0, 0, X86ImpOpBase + 0, 1187, 0, 0x1a5a0022029ULL }, // Inst #2045 = KUNPCKDQrr |
| 40056 | { 2044, 3, 1, 0, 1065, 0, 0, X86ImpOpBase + 0, 1184, 0, 0x1a5a0002829ULL }, // Inst #2044 = KUNPCKBWrr |
| 40057 | { 2043, 2, 0, 0, 1236, 0, 1, X86ImpOpBase + 0, 1154, 0, 0x4ca0002029ULL }, // Inst #2043 = KTESTWrr |
| 40058 | { 2042, 2, 0, 0, 1236, 0, 1, X86ImpOpBase + 0, 1136, 0, 0x4ca0022029ULL }, // Inst #2042 = KTESTQrr |
| 40059 | { 2041, 2, 0, 0, 1236, 0, 1, X86ImpOpBase + 0, 1118, 0, 0x4ca0022829ULL }, // Inst #2041 = KTESTDrr |
| 40060 | { 2040, 2, 0, 0, 1236, 0, 1, X86ImpOpBase + 0, 1100, 0, 0x4ca0002829ULL }, // Inst #2040 = KTESTBrr |
| 40061 | { 2039, 3, 1, 0, 1240, 0, 0, X86ImpOpBase + 0, 1181, 0, 0x1820066829ULL }, // Inst #2039 = KSHIFTRWri |
| 40062 | { 2038, 3, 1, 0, 1240, 0, 0, X86ImpOpBase + 0, 1178, 0, 0x18a0066829ULL }, // Inst #2038 = KSHIFTRQri |
| 40063 | { 2037, 3, 1, 0, 1240, 0, 0, X86ImpOpBase + 0, 1175, 0, 0x18a0046829ULL }, // Inst #2037 = KSHIFTRDri |
| 40064 | { 2036, 3, 1, 0, 1240, 0, 0, X86ImpOpBase + 0, 1172, 0, 0x1820046829ULL }, // Inst #2036 = KSHIFTRBri |
| 40065 | { 2035, 3, 1, 0, 1240, 0, 0, X86ImpOpBase + 0, 1181, 0, 0x1920066829ULL }, // Inst #2035 = KSHIFTLWri |
| 40066 | { 2034, 3, 1, 0, 1240, 0, 0, X86ImpOpBase + 0, 1178, 0, 0x19a0066829ULL }, // Inst #2034 = KSHIFTLQri |
| 40067 | { 2033, 3, 1, 0, 1240, 0, 0, X86ImpOpBase + 0, 1175, 0, 0x19a0046829ULL }, // Inst #2033 = KSHIFTLDri |
| 40068 | { 2032, 3, 1, 0, 1240, 0, 0, X86ImpOpBase + 0, 1172, 0, 0x1920046829ULL }, // Inst #2032 = KSHIFTLBri |
| 40069 | { 2031, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1097, 0|(1ULL<<MCID::Commutable), 0x1a2a0002029ULL }, // Inst #2031 = KORWrr |
| 40070 | { 2030, 2, 0, 0, 1236, 0, 1, X86ImpOpBase + 0, 1154, 0, 0x4c20002029ULL }, // Inst #2030 = KORTESTWrr |
| 40071 | { 2029, 2, 0, 0, 1236, 0, 1, X86ImpOpBase + 0, 1136, 0, 0x4c20022029ULL }, // Inst #2029 = KORTESTQrr |
| 40072 | { 2028, 2, 0, 0, 1236, 0, 1, X86ImpOpBase + 0, 1118, 0, 0x4c20022829ULL }, // Inst #2028 = KORTESTDrr |
| 40073 | { 2027, 2, 0, 0, 1236, 0, 1, X86ImpOpBase + 0, 1100, 0, 0x4c20002829ULL }, // Inst #2027 = KORTESTBrr |
| 40074 | { 2026, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1094, 0|(1ULL<<MCID::Commutable), 0x1a2a0022029ULL }, // Inst #2026 = KORQrr |
| 40075 | { 2025, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1091, 0|(1ULL<<MCID::Commutable), 0x1a2a0022829ULL }, // Inst #2025 = KORDrr |
| 40076 | { 2024, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1088, 0|(1ULL<<MCID::Commutable), 0x1a2a0002829ULL }, // Inst #2024 = KORBrr |
| 40077 | { 2023, 2, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1154, 0, 0x2220002029ULL }, // Inst #2023 = KNOTWrr |
| 40078 | { 2022, 2, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1136, 0, 0x2220022029ULL }, // Inst #2022 = KNOTQrr |
| 40079 | { 2021, 2, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1118, 0, 0x2220022829ULL }, // Inst #2021 = KNOTDrr |
| 40080 | { 2020, 2, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1100, 0, 0x2220002829ULL }, // Inst #2020 = KNOTBrr |
| 40081 | { 2019, 2, 1, 0, 1235, 0, 0, X86ImpOpBase + 0, 1170, 0, 0xa049e0002029ULL }, // Inst #2019 = KMOVWrk_EVEX |
| 40082 | { 2018, 2, 1, 0, 1064, 0, 0, X86ImpOpBase + 0, 1170, 0, 0x49a0002029ULL }, // Inst #2018 = KMOVWrk |
| 40083 | { 2017, 6, 0, 0, 1233, 0, 0, X86ImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayStore), 0xa048e0002018ULL }, // Inst #2017 = KMOVWmk_EVEX |
| 40084 | { 2016, 6, 0, 0, 1066, 0, 0, X86ImpOpBase + 0, 1164, 0|(1ULL<<MCID::MayStore), 0x48a0002018ULL }, // Inst #2016 = KMOVWmk |
| 40085 | { 2015, 2, 1, 0, 1225, 0, 0, X86ImpOpBase + 0, 1162, 0, 0xa04960002029ULL }, // Inst #2015 = KMOVWkr_EVEX |
| 40086 | { 2014, 2, 1, 0, 1677, 0, 0, X86ImpOpBase + 0, 1162, 0, 0x4920002029ULL }, // Inst #2014 = KMOVWkr |
| 40087 | { 2013, 6, 1, 0, 1304, 0, 0, X86ImpOpBase + 0, 1156, 0|(1ULL<<MCID::MayLoad), 0xa04860002019ULL }, // Inst #2013 = KMOVWkm_EVEX |
| 40088 | { 2012, 6, 1, 0, 1763, 0, 0, X86ImpOpBase + 0, 1156, 0|(1ULL<<MCID::MayLoad), 0x4820002019ULL }, // Inst #2012 = KMOVWkm |
| 40089 | { 2011, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 1154, 0|(1ULL<<MCID::MoveReg), 0xca04860002029ULL }, // Inst #2011 = KMOVWkk_EVEX |
| 40090 | { 2010, 2, 1, 0, 1222, 0, 0, X86ImpOpBase + 0, 1154, 0|(1ULL<<MCID::MoveReg), 0x4820002029ULL }, // Inst #2010 = KMOVWkk |
| 40091 | { 2009, 2, 1, 0, 1235, 0, 0, X86ImpOpBase + 0, 1152, 0, 0xa049e0023829ULL }, // Inst #2009 = KMOVQrk_EVEX |
| 40092 | { 2008, 2, 1, 0, 1064, 0, 0, X86ImpOpBase + 0, 1152, 0, 0x49a0023829ULL }, // Inst #2008 = KMOVQrk |
| 40093 | { 2007, 6, 0, 0, 1233, 0, 0, X86ImpOpBase + 0, 1146, 0|(1ULL<<MCID::MayStore), 0xa048e0022018ULL }, // Inst #2007 = KMOVQmk_EVEX |
| 40094 | { 2006, 6, 0, 0, 1066, 0, 0, X86ImpOpBase + 0, 1146, 0|(1ULL<<MCID::MayStore), 0x48a0022018ULL }, // Inst #2006 = KMOVQmk |
| 40095 | { 2005, 2, 1, 0, 1225, 0, 0, X86ImpOpBase + 0, 1144, 0, 0xa04960023829ULL }, // Inst #2005 = KMOVQkr_EVEX |
| 40096 | { 2004, 2, 1, 0, 1067, 0, 0, X86ImpOpBase + 0, 1144, 0, 0x4920023829ULL }, // Inst #2004 = KMOVQkr |
| 40097 | { 2003, 6, 1, 0, 1304, 0, 0, X86ImpOpBase + 0, 1138, 0|(1ULL<<MCID::MayLoad), 0xa04860022019ULL }, // Inst #2003 = KMOVQkm_EVEX |
| 40098 | { 2002, 6, 1, 0, 1763, 0, 0, X86ImpOpBase + 0, 1138, 0|(1ULL<<MCID::MayLoad), 0x4820022019ULL }, // Inst #2002 = KMOVQkm |
| 40099 | { 2001, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 1136, 0|(1ULL<<MCID::MoveReg), 0xca04860022029ULL }, // Inst #2001 = KMOVQkk_EVEX |
| 40100 | { 2000, 2, 1, 0, 1222, 0, 0, X86ImpOpBase + 0, 1136, 0|(1ULL<<MCID::MoveReg), 0x4820022029ULL }, // Inst #2000 = KMOVQkk |
| 40101 | { 1999, 2, 1, 0, 1235, 0, 0, X86ImpOpBase + 0, 1134, 0, 0xa049e0003829ULL }, // Inst #1999 = KMOVDrk_EVEX |
| 40102 | { 1998, 2, 1, 0, 1064, 0, 0, X86ImpOpBase + 0, 1134, 0, 0x49a0003829ULL }, // Inst #1998 = KMOVDrk |
| 40103 | { 1997, 6, 0, 0, 1233, 0, 0, X86ImpOpBase + 0, 1128, 0|(1ULL<<MCID::MayStore), 0xa048e0022818ULL }, // Inst #1997 = KMOVDmk_EVEX |
| 40104 | { 1996, 6, 0, 0, 1066, 0, 0, X86ImpOpBase + 0, 1128, 0|(1ULL<<MCID::MayStore), 0x48a0022818ULL }, // Inst #1996 = KMOVDmk |
| 40105 | { 1995, 2, 1, 0, 1225, 0, 0, X86ImpOpBase + 0, 1126, 0, 0xa04960003829ULL }, // Inst #1995 = KMOVDkr_EVEX |
| 40106 | { 1994, 2, 1, 0, 1677, 0, 0, X86ImpOpBase + 0, 1126, 0, 0x4920003829ULL }, // Inst #1994 = KMOVDkr |
| 40107 | { 1993, 6, 1, 0, 1304, 0, 0, X86ImpOpBase + 0, 1120, 0|(1ULL<<MCID::MayLoad), 0xa04860022819ULL }, // Inst #1993 = KMOVDkm_EVEX |
| 40108 | { 1992, 6, 1, 0, 1763, 0, 0, X86ImpOpBase + 0, 1120, 0|(1ULL<<MCID::MayLoad), 0x4820022819ULL }, // Inst #1992 = KMOVDkm |
| 40109 | { 1991, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 1118, 0|(1ULL<<MCID::MoveReg), 0xca04860022829ULL }, // Inst #1991 = KMOVDkk_EVEX |
| 40110 | { 1990, 2, 1, 0, 1222, 0, 0, X86ImpOpBase + 0, 1118, 0|(1ULL<<MCID::MoveReg), 0x4820022829ULL }, // Inst #1990 = KMOVDkk |
| 40111 | { 1989, 2, 1, 0, 1235, 0, 0, X86ImpOpBase + 0, 1116, 0, 0xa049e0002829ULL }, // Inst #1989 = KMOVBrk_EVEX |
| 40112 | { 1988, 2, 1, 0, 1064, 0, 0, X86ImpOpBase + 0, 1116, 0, 0x49a0002829ULL }, // Inst #1988 = KMOVBrk |
| 40113 | { 1987, 6, 0, 0, 1233, 0, 0, X86ImpOpBase + 0, 1110, 0|(1ULL<<MCID::MayStore), 0xa048e0002818ULL }, // Inst #1987 = KMOVBmk_EVEX |
| 40114 | { 1986, 6, 0, 0, 1764, 0, 0, X86ImpOpBase + 0, 1110, 0|(1ULL<<MCID::MayStore), 0x48a0002818ULL }, // Inst #1986 = KMOVBmk |
| 40115 | { 1985, 2, 1, 0, 1225, 0, 0, X86ImpOpBase + 0, 1108, 0, 0xa04960002829ULL }, // Inst #1985 = KMOVBkr_EVEX |
| 40116 | { 1984, 2, 1, 0, 1677, 0, 0, X86ImpOpBase + 0, 1108, 0, 0x4920002829ULL }, // Inst #1984 = KMOVBkr |
| 40117 | { 1983, 6, 1, 0, 1304, 0, 0, X86ImpOpBase + 0, 1102, 0|(1ULL<<MCID::MayLoad), 0xa04860002819ULL }, // Inst #1983 = KMOVBkm_EVEX |
| 40118 | { 1982, 6, 1, 0, 1763, 0, 0, X86ImpOpBase + 0, 1102, 0|(1ULL<<MCID::MayLoad), 0x4820002819ULL }, // Inst #1982 = KMOVBkm |
| 40119 | { 1981, 2, 1, 0, 1223, 0, 0, X86ImpOpBase + 0, 1100, 0|(1ULL<<MCID::MoveReg), 0xca04860002829ULL }, // Inst #1981 = KMOVBkk_EVEX |
| 40120 | { 1980, 2, 1, 0, 1222, 0, 0, X86ImpOpBase + 0, 1100, 0|(1ULL<<MCID::MoveReg), 0x4820002829ULL }, // Inst #1980 = KMOVBkk |
| 40121 | { 1979, 2, 0, 0, 0, 0, 3, X86ImpOpBase + 108, 205, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1979 = KCFI_CHECK |
| 40122 | { 1978, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1097, 0|(1ULL<<MCID::Commutable), 0x1a0a0002029ULL }, // Inst #1978 = KANDWrr |
| 40123 | { 1977, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1094, 0|(1ULL<<MCID::Commutable), 0x1a0a0022029ULL }, // Inst #1977 = KANDQrr |
| 40124 | { 1976, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1097, 0, 0x1a120002029ULL }, // Inst #1976 = KANDNWrr |
| 40125 | { 1975, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1094, 0, 0x1a120022029ULL }, // Inst #1975 = KANDNQrr |
| 40126 | { 1974, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1091, 0, 0x1a120022829ULL }, // Inst #1974 = KANDNDrr |
| 40127 | { 1973, 3, 1, 0, 1221, 0, 0, X86ImpOpBase + 0, 1088, 0, 0x1a120002829ULL }, // Inst #1973 = KANDNBrr |
| 40128 | { 1972, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1091, 0|(1ULL<<MCID::Commutable), 0x1a0a0022829ULL }, // Inst #1972 = KANDDrr |
| 40129 | { 1971, 3, 1, 0, 1758, 0, 0, X86ImpOpBase + 0, 1088, 0|(1ULL<<MCID::Commutable), 0x1a0a0002829ULL }, // Inst #1971 = KANDBrr |
| 40130 | { 1970, 3, 1, 0, 1063, 0, 0, X86ImpOpBase + 0, 1097, 0|(1ULL<<MCID::Commutable), 0x1a520002029ULL }, // Inst #1970 = KADDWrr |
| 40131 | { 1969, 3, 1, 0, 1063, 0, 0, X86ImpOpBase + 0, 1094, 0|(1ULL<<MCID::Commutable), 0x1a520022029ULL }, // Inst #1969 = KADDQrr |
| 40132 | { 1968, 3, 1, 0, 1063, 0, 0, X86ImpOpBase + 0, 1091, 0|(1ULL<<MCID::Commutable), 0x1a520022829ULL }, // Inst #1968 = KADDDrr |
| 40133 | { 1967, 3, 1, 0, 1063, 0, 0, X86ImpOpBase + 0, 1088, 0|(1ULL<<MCID::Commutable), 0x1a520002829ULL }, // Inst #1967 = KADDBrr |
| 40134 | { 1966, 1, 0, 0, 1488, 1, 0, X86ImpOpBase + 300, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080601ULL }, // Inst #1966 = JRCXZ |
| 40135 | { 1965, 1, 0, 0, 1516, 0, 0, X86ImpOpBase + 0, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x74801c0101ULL }, // Inst #1965 = JMP_4 |
| 40136 | { 1964, 1, 0, 0, 1449, 0, 0, X86ImpOpBase + 0, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7480140081ULL }, // Inst #1964 = JMP_2 |
| 40137 | { 1963, 1, 0, 0, 1516, 0, 0, X86ImpOpBase + 0, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7580080001ULL }, // Inst #1963 = JMP_1 |
| 40138 | { 1962, 1, 0, 0, 6, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4005080240001ULL }, // Inst #1962 = JMPABS64i |
| 40139 | { 1961, 1, 0, 0, 1515, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80020034ULL }, // Inst #1961 = JMP64r_REX |
| 40140 | { 1960, 1, 0, 0, 840, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x2007f80000034ULL }, // Inst #1960 = JMP64r_NT |
| 40141 | { 1959, 1, 0, 0, 840, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f80000034ULL }, // Inst #1959 = JMP64r |
| 40142 | { 1958, 5, 0, 0, 851, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80020024ULL }, // Inst #1958 = JMP64m_REX |
| 40143 | { 1957, 5, 0, 0, 1433, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x2007f80000024ULL }, // Inst #1957 = JMP64m_NT |
| 40144 | { 1956, 5, 0, 0, 1433, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f80000024ULL }, // Inst #1956 = JMP64m |
| 40145 | { 1955, 1, 0, 0, 840, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x2007f80000134ULL }, // Inst #1955 = JMP32r_NT |
| 40146 | { 1954, 1, 0, 0, 840, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f80000134ULL }, // Inst #1954 = JMP32r |
| 40147 | { 1953, 5, 0, 0, 1433, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x2007f80000124ULL }, // Inst #1953 = JMP32m_NT |
| 40148 | { 1952, 5, 0, 0, 1433, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f80000124ULL }, // Inst #1952 = JMP32m |
| 40149 | { 1951, 1, 0, 0, 840, 0, 0, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x2007f800000b4ULL }, // Inst #1951 = JMP16r_NT |
| 40150 | { 1950, 1, 0, 0, 840, 0, 0, X86ImpOpBase + 0, 577, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f800000b4ULL }, // Inst #1950 = JMP16r |
| 40151 | { 1949, 5, 0, 0, 1433, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x2007f800000a4ULL }, // Inst #1949 = JMP16m_NT |
| 40152 | { 1948, 5, 0, 0, 1433, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f800000a4ULL }, // Inst #1948 = JMP16m |
| 40153 | { 1947, 1, 0, 0, 1488, 1, 0, X86ImpOpBase + 299, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080401ULL }, // Inst #1947 = JECXZ |
| 40154 | { 1946, 1, 0, 0, 661, 1, 0, X86ImpOpBase + 298, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080201ULL }, // Inst #1946 = JCXZ |
| 40155 | { 1945, 2, 0, 0, 4, 1, 0, X86ImpOpBase + 0, 1086, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x40001c2109ULL }, // Inst #1945 = JCC_4 |
| 40156 | { 1944, 2, 0, 0, 4, 1, 0, X86ImpOpBase + 0, 1086, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4000142089ULL }, // Inst #1944 = JCC_2 |
| 40157 | { 1943, 2, 0, 0, 4, 1, 0, X86ImpOpBase + 0, 1086, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3800080009ULL }, // Inst #1943 = JCC_1 |
| 40158 | { 1942, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1942 = Int_eh_sjlj_setup_dispatch |
| 40159 | { 1941, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1941 = IST_Fp64m80 |
| 40160 | { 1940, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1940 = IST_Fp64m64 |
| 40161 | { 1939, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1939 = IST_Fp64m32 |
| 40162 | { 1938, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1938 = IST_Fp32m80 |
| 40163 | { 1937, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1937 = IST_Fp32m64 |
| 40164 | { 1936, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1936 = IST_Fp32m32 |
| 40165 | { 1935, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1935 = IST_Fp16m80 |
| 40166 | { 1934, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1934 = IST_Fp16m64 |
| 40167 | { 1933, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1933 = IST_Fp16m32 |
| 40168 | { 1932, 5, 0, 0, 675, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000027ULL }, // Inst #1932 = IST_FP64m |
| 40169 | { 1931, 5, 0, 0, 675, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000023ULL }, // Inst #1931 = IST_FP32m |
| 40170 | { 1930, 5, 0, 0, 675, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000023ULL }, // Inst #1930 = IST_FP16m |
| 40171 | { 1929, 5, 0, 0, 675, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000022ULL }, // Inst #1929 = IST_F32m |
| 40172 | { 1928, 5, 0, 0, 675, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000022ULL }, // Inst #1928 = IST_F16m |
| 40173 | { 1927, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1927 = ISTT_Fp64m80 |
| 40174 | { 1926, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1926 = ISTT_Fp64m64 |
| 40175 | { 1925, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1925 = ISTT_Fp64m32 |
| 40176 | { 1924, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1924 = ISTT_Fp32m80 |
| 40177 | { 1923, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1923 = ISTT_Fp32m64 |
| 40178 | { 1922, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1922 = ISTT_Fp32m32 |
| 40179 | { 1921, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1921 = ISTT_Fp16m80 |
| 40180 | { 1920, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1920 = ISTT_Fp16m64 |
| 40181 | { 1919, 6, 0, 0, 141, 1, 1, X86ImpOpBase + 79, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException), 0x800000ULL }, // Inst #1919 = ISTT_Fp16m32 |
| 40182 | { 1918, 5, 0, 0, 762, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000021ULL }, // Inst #1918 = ISTT_FP64m |
| 40183 | { 1917, 5, 0, 0, 762, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000021ULL }, // Inst #1917 = ISTT_FP32m |
| 40184 | { 1916, 5, 0, 0, 762, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000021ULL }, // Inst #1916 = ISTT_FP16m |
| 40185 | { 1915, 0, 0, 0, 936, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c20001ULL }, // Inst #1915 = IRET64 |
| 40186 | { 1914, 0, 0, 0, 936, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c00101ULL }, // Inst #1914 = IRET32 |
| 40187 | { 1913, 0, 0, 0, 936, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c00081ULL }, // Inst #1913 = IRET16 |
| 40188 | { 1912, 1, 0, 0, 622, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x1c00000ULL }, // Inst #1912 = IRET |
| 40189 | { 1911, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x78e0011019ULL }, // Inst #1911 = INVVPID64_EVEX |
| 40190 | { 1910, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080004819ULL }, // Inst #1910 = INVVPID64 |
| 40191 | { 1909, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080004819ULL }, // Inst #1909 = INVVPID32 |
| 40192 | { 1908, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7960011019ULL }, // Inst #1908 = INVPCID64_EVEX |
| 40193 | { 1907, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4100004819ULL }, // Inst #1907 = INVPCID64 |
| 40194 | { 1906, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4100004819ULL }, // Inst #1906 = INVPCID32 |
| 40195 | { 1905, 0, 0, 0, 8, 2, 0, X86ImpOpBase + 296, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207eULL }, // Inst #1905 = INVLPGB64 |
| 40196 | { 1904, 0, 0, 0, 8, 2, 0, X86ImpOpBase + 294, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207eULL }, // Inst #1904 = INVLPGB32 |
| 40197 | { 1903, 0, 0, 0, 717, 2, 0, X86ImpOpBase + 292, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205fULL }, // Inst #1903 = INVLPGA64 |
| 40198 | { 1902, 0, 0, 0, 717, 2, 0, X86ImpOpBase + 290, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205fULL }, // Inst #1902 = INVLPGA32 |
| 40199 | { 1901, 5, 0, 0, 1514, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002027ULL }, // Inst #1901 = INVLPG |
| 40200 | { 1900, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7860011019ULL }, // Inst #1900 = INVEPT64_EVEX |
| 40201 | { 1899, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000004819ULL }, // Inst #1899 = INVEPT64 |
| 40202 | { 1898, 6, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000004819ULL }, // Inst #1898 = INVEPT32 |
| 40203 | { 1897, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x400002001ULL }, // Inst #1897 = INVD |
| 40204 | { 1896, 0, 0, 0, 669, 1, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6700000001ULL }, // Inst #1896 = INTO |
| 40205 | { 1895, 0, 0, 0, 728, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6600000001ULL }, // Inst #1895 = INT3 |
| 40206 | { 1894, 1, 0, 0, 727, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6680040001ULL }, // Inst #1894 = INT |
| 40207 | { 1893, 1, 0, 0, 713, 3, 1, X86ImpOpBase + 286, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3680000085ULL }, // Inst #1893 = INSW |
| 40208 | { 1892, 1, 0, 0, 1513, 3, 1, X86ImpOpBase + 286, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3680000105ULL }, // Inst #1892 = INSL |
| 40209 | { 1891, 5, 1, 0, 994, 0, 0, X86ImpOpBase + 0, 1081, 0, 0x3c18043829ULL }, // Inst #1891 = INSERTQI |
| 40210 | { 1890, 3, 1, 0, 1039, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3c98003829ULL }, // Inst #1890 = INSERTQ |
| 40211 | { 1889, 4, 1, 0, 1414, 0, 0, X86ImpOpBase + 0, 563, 0|(1ULL<<MCID::Commutable), 0x1088046829ULL }, // Inst #1889 = INSERTPSrr |
| 40212 | { 1888, 8, 1, 0, 1421, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x1088046819ULL }, // Inst #1888 = INSERTPSrm |
| 40213 | { 1887, 1, 0, 0, 1512, 3, 1, X86ImpOpBase + 286, 1080, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3600000005ULL }, // Inst #1887 = INSB |
| 40214 | { 1886, 1, 0, 0, 8, 1, 1, X86ImpOpBase + 284, 202, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700023035ULL }, // Inst #1886 = INCSSPQ |
| 40215 | { 1885, 1, 0, 0, 8, 1, 1, X86ImpOpBase + 284, 201, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003035ULL }, // Inst #1885 = INCSSPD |
| 40216 | { 1884, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 925, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ff60010030ULL }, // Inst #1884 = INC8r_NF_ND |
| 40217 | { 1883, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 1027, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007f60010030ULL }, // Inst #1883 = INC8r_NF |
| 40218 | { 1882, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 925, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ff60010030ULL }, // Inst #1882 = INC8r_ND |
| 40219 | { 1881, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 1027, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007f60010030ULL }, // Inst #1881 = INC8r_EVEX |
| 40220 | { 1880, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 1027, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f00000030ULL }, // Inst #1880 = INC8r |
| 40221 | { 1879, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x1010ff60010020ULL }, // Inst #1879 = INC8m_NF_ND |
| 40222 | { 1878, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007f60010020ULL }, // Inst #1878 = INC8m_NF |
| 40223 | { 1877, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x10ff60010020ULL }, // Inst #1877 = INC8m_ND |
| 40224 | { 1876, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007f60010020ULL }, // Inst #1876 = INC8m_EVEX |
| 40225 | { 1875, 5, 0, 0, 1452, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f00000020ULL }, // Inst #1875 = INC8m |
| 40226 | { 1874, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0030030ULL }, // Inst #1874 = INC64r_NF_ND |
| 40227 | { 1873, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 300, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0030030ULL }, // Inst #1873 = INC64r_NF |
| 40228 | { 1872, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0030030ULL }, // Inst #1872 = INC64r_ND |
| 40229 | { 1871, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 300, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0030030ULL }, // Inst #1871 = INC64r_EVEX |
| 40230 | { 1870, 2, 1, 0, 1447, 0, 1, X86ImpOpBase + 0, 300, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80020030ULL }, // Inst #1870 = INC64r |
| 40231 | { 1869, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0030020ULL }, // Inst #1869 = INC64m_NF_ND |
| 40232 | { 1868, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0030020ULL }, // Inst #1868 = INC64m_NF |
| 40233 | { 1867, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10ffe0030020ULL }, // Inst #1867 = INC64m_ND |
| 40234 | { 1866, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0030020ULL }, // Inst #1866 = INC64m_EVEX |
| 40235 | { 1865, 5, 0, 0, 1196, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80020020ULL }, // Inst #1865 = INC64m |
| 40236 | { 1864, 2, 1, 0, 1511, 0, 1, X86ImpOpBase + 0, 298, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x2000000102ULL }, // Inst #1864 = INC32r_alt |
| 40237 | { 1863, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0010030ULL }, // Inst #1863 = INC32r_NF_ND |
| 40238 | { 1862, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 298, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0010030ULL }, // Inst #1862 = INC32r_NF |
| 40239 | { 1861, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0010030ULL }, // Inst #1861 = INC32r_ND |
| 40240 | { 1860, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 298, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0010030ULL }, // Inst #1860 = INC32r_EVEX |
| 40241 | { 1859, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 298, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000130ULL }, // Inst #1859 = INC32r |
| 40242 | { 1858, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0010020ULL }, // Inst #1858 = INC32m_NF_ND |
| 40243 | { 1857, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0010020ULL }, // Inst #1857 = INC32m_NF |
| 40244 | { 1856, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10ffe0010020ULL }, // Inst #1856 = INC32m_ND |
| 40245 | { 1855, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0010020ULL }, // Inst #1855 = INC32m_EVEX |
| 40246 | { 1854, 5, 0, 0, 1196, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000120ULL }, // Inst #1854 = INC32m |
| 40247 | { 1853, 2, 1, 0, 1510, 0, 1, X86ImpOpBase + 0, 573, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x2000000082ULL }, // Inst #1853 = INC16r_alt |
| 40248 | { 1852, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0010830ULL }, // Inst #1852 = INC16r_NF_ND |
| 40249 | { 1851, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 573, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0010830ULL }, // Inst #1851 = INC16r_NF |
| 40250 | { 1850, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0010830ULL }, // Inst #1850 = INC16r_ND |
| 40251 | { 1849, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 573, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0010830ULL }, // Inst #1849 = INC16r_EVEX |
| 40252 | { 1848, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 573, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f800000b0ULL }, // Inst #1848 = INC16r |
| 40253 | { 1847, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0010820ULL }, // Inst #1847 = INC16m_NF_ND |
| 40254 | { 1846, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0010820ULL }, // Inst #1846 = INC16m_NF |
| 40255 | { 1845, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10ffe0010820ULL }, // Inst #1845 = INC16m_ND |
| 40256 | { 1844, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0010820ULL }, // Inst #1844 = INC16m_EVEX |
| 40257 | { 1843, 5, 0, 0, 1196, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f800000a0ULL }, // Inst #1843 = INC16m |
| 40258 | { 1842, 0, 0, 0, 724, 1, 1, X86ImpOpBase + 282, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7600000001ULL }, // Inst #1842 = IN8rr |
| 40259 | { 1841, 1, 0, 0, 723, 0, 1, X86ImpOpBase + 281, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7200040001ULL }, // Inst #1841 = IN8ri |
| 40260 | { 1840, 0, 0, 0, 1509, 1, 1, X86ImpOpBase + 279, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7680000101ULL }, // Inst #1840 = IN32rr |
| 40261 | { 1839, 1, 0, 0, 1508, 0, 1, X86ImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7280040101ULL }, // Inst #1839 = IN32ri |
| 40262 | { 1838, 0, 0, 0, 1507, 1, 1, X86ImpOpBase + 277, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7680000081ULL }, // Inst #1838 = IN16rr |
| 40263 | { 1837, 1, 0, 0, 1506, 0, 1, X86ImpOpBase + 276, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7280040081ULL }, // Inst #1837 = IN16ri |
| 40264 | { 1836, 3, 1, 0, 178, 0, 1, X86ImpOpBase + 0, 405, 0, 0x1035e0070029ULL }, // Inst #1836 = IMULZU64rri8 |
| 40265 | { 1835, 3, 1, 0, 178, 0, 1, X86ImpOpBase + 0, 405, 0, 0x1034e0230029ULL }, // Inst #1835 = IMULZU64rri32 |
| 40266 | { 1834, 7, 1, 0, 176, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1035e0070019ULL }, // Inst #1834 = IMULZU64rmi8 |
| 40267 | { 1833, 7, 1, 0, 176, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1034e0230019ULL }, // Inst #1833 = IMULZU64rmi32 |
| 40268 | { 1832, 3, 1, 0, 172, 0, 1, X86ImpOpBase + 0, 374, 0, 0x1035e0050029ULL }, // Inst #1832 = IMULZU32rri8 |
| 40269 | { 1831, 3, 1, 0, 172, 0, 1, X86ImpOpBase + 0, 374, 0, 0x1034e0190029ULL }, // Inst #1831 = IMULZU32rri |
| 40270 | { 1830, 7, 1, 0, 170, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1035e0050019ULL }, // Inst #1830 = IMULZU32rmi8 |
| 40271 | { 1829, 7, 1, 0, 170, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1034e0190019ULL }, // Inst #1829 = IMULZU32rmi |
| 40272 | { 1828, 3, 1, 0, 166, 0, 1, X86ImpOpBase + 0, 340, 0, 0x1035e0050829ULL }, // Inst #1828 = IMULZU16rri8 |
| 40273 | { 1827, 3, 1, 0, 166, 0, 1, X86ImpOpBase + 0, 340, 0, 0x1034e0110829ULL }, // Inst #1827 = IMULZU16rri |
| 40274 | { 1826, 7, 1, 0, 164, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1035e0050819ULL }, // Inst #1826 = IMULZU16rmi8 |
| 40275 | { 1825, 7, 1, 0, 164, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1034e0110819ULL }, // Inst #1825 = IMULZU16rmi |
| 40276 | { 1824, 1, 0, 0, 180, 1, 2, X86ImpOpBase + 273, 1029, 0, 0x10007b60010035ULL }, // Inst #1824 = IMUL8r_NF |
| 40277 | { 1823, 1, 0, 0, 180, 1, 3, X86ImpOpBase + 269, 1029, 0, 0xc007b60010035ULL }, // Inst #1823 = IMUL8r_EVEX |
| 40278 | { 1822, 1, 0, 0, 180, 1, 3, X86ImpOpBase + 269, 1029, 0, 0x7b00000035ULL }, // Inst #1822 = IMUL8r |
| 40279 | { 1821, 5, 0, 0, 179, 1, 2, X86ImpOpBase + 273, 231, 0|(1ULL<<MCID::MayLoad), 0x10007b60010025ULL }, // Inst #1821 = IMUL8m_NF |
| 40280 | { 1820, 5, 0, 0, 179, 1, 3, X86ImpOpBase + 269, 231, 0|(1ULL<<MCID::MayLoad), 0xc007b60010025ULL }, // Inst #1820 = IMUL8m_EVEX |
| 40281 | { 1819, 5, 0, 0, 179, 1, 3, X86ImpOpBase + 269, 231, 0|(1ULL<<MCID::MayLoad), 0x7b00000025ULL }, // Inst #1819 = IMUL8m |
| 40282 | { 1818, 3, 1, 0, 178, 0, 0, X86ImpOpBase + 0, 405, 0, 0x100035e0070029ULL }, // Inst #1818 = IMUL64rri8_NF |
| 40283 | { 1817, 3, 1, 0, 178, 0, 1, X86ImpOpBase + 0, 405, 0, 0xc0035e0070029ULL }, // Inst #1817 = IMUL64rri8_EVEX |
| 40284 | { 1816, 3, 1, 0, 178, 0, 1, X86ImpOpBase + 0, 405, 0, 0x3580060029ULL }, // Inst #1816 = IMUL64rri8 |
| 40285 | { 1815, 3, 1, 0, 178, 0, 0, X86ImpOpBase + 0, 405, 0, 0x100034e0230029ULL }, // Inst #1815 = IMUL64rri32_NF |
| 40286 | { 1814, 3, 1, 0, 178, 0, 1, X86ImpOpBase + 0, 405, 0, 0xc0034e0230029ULL }, // Inst #1814 = IMUL64rri32_EVEX |
| 40287 | { 1813, 3, 1, 0, 178, 0, 1, X86ImpOpBase + 0, 405, 0, 0x3480220029ULL }, // Inst #1813 = IMUL64rri32 |
| 40288 | { 1812, 3, 1, 0, 177, 0, 0, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Commutable), 0x1010d7e0030029ULL }, // Inst #1812 = IMUL64rr_NF_ND |
| 40289 | { 1811, 3, 1, 0, 177, 0, 0, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0x100057e0030029ULL }, // Inst #1811 = IMUL64rr_NF |
| 40290 | { 1810, 3, 1, 0, 177, 0, 1, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Commutable), 0x10d7e0030029ULL }, // Inst #1810 = IMUL64rr_ND |
| 40291 | { 1809, 3, 1, 0, 177, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0xc0057e0030029ULL }, // Inst #1809 = IMUL64rr_EVEX |
| 40292 | { 1808, 3, 1, 0, 177, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0x5780022029ULL }, // Inst #1808 = IMUL64rr |
| 40293 | { 1807, 7, 1, 0, 176, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x100035e0070019ULL }, // Inst #1807 = IMUL64rmi8_NF |
| 40294 | { 1806, 7, 1, 0, 176, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0xc0035e0070019ULL }, // Inst #1806 = IMUL64rmi8_EVEX |
| 40295 | { 1805, 7, 1, 0, 176, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x3580060019ULL }, // Inst #1805 = IMUL64rmi8 |
| 40296 | { 1804, 7, 1, 0, 176, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x100034e0230019ULL }, // Inst #1804 = IMUL64rmi32_NF |
| 40297 | { 1803, 7, 1, 0, 176, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0xc0034e0230019ULL }, // Inst #1803 = IMUL64rmi32_EVEX |
| 40298 | { 1802, 7, 1, 0, 176, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x3480220019ULL }, // Inst #1802 = IMUL64rmi32 |
| 40299 | { 1801, 7, 1, 0, 175, 0, 0, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0x1010d7e0030019ULL }, // Inst #1801 = IMUL64rm_NF_ND |
| 40300 | { 1800, 7, 1, 0, 175, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x100057e0030019ULL }, // Inst #1800 = IMUL64rm_NF |
| 40301 | { 1799, 7, 1, 0, 175, 0, 1, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0x10d7e0030019ULL }, // Inst #1799 = IMUL64rm_ND |
| 40302 | { 1798, 7, 1, 0, 175, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0xc0057e0030019ULL }, // Inst #1798 = IMUL64rm_EVEX |
| 40303 | { 1797, 7, 1, 0, 175, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x5780022019ULL }, // Inst #1797 = IMUL64rm |
| 40304 | { 1796, 1, 0, 0, 174, 1, 2, X86ImpOpBase + 169, 202, 0, 0x10007be0030035ULL }, // Inst #1796 = IMUL64r_NF |
| 40305 | { 1795, 1, 0, 0, 174, 1, 3, X86ImpOpBase + 265, 202, 0, 0xc007be0030035ULL }, // Inst #1795 = IMUL64r_EVEX |
| 40306 | { 1794, 1, 0, 0, 174, 1, 3, X86ImpOpBase + 265, 202, 0, 0x7b80020035ULL }, // Inst #1794 = IMUL64r |
| 40307 | { 1793, 5, 0, 0, 173, 1, 2, X86ImpOpBase + 169, 231, 0|(1ULL<<MCID::MayLoad), 0x10007be0030025ULL }, // Inst #1793 = IMUL64m_NF |
| 40308 | { 1792, 5, 0, 0, 173, 1, 3, X86ImpOpBase + 265, 231, 0|(1ULL<<MCID::MayLoad), 0xc007be0030025ULL }, // Inst #1792 = IMUL64m_EVEX |
| 40309 | { 1791, 5, 0, 0, 173, 1, 3, X86ImpOpBase + 265, 231, 0|(1ULL<<MCID::MayLoad), 0x7b80020025ULL }, // Inst #1791 = IMUL64m |
| 40310 | { 1790, 3, 1, 0, 172, 0, 0, X86ImpOpBase + 0, 374, 0, 0x100034e0190029ULL }, // Inst #1790 = IMUL32rri_NF |
| 40311 | { 1789, 3, 1, 0, 172, 0, 1, X86ImpOpBase + 0, 374, 0, 0xc0034e0190029ULL }, // Inst #1789 = IMUL32rri_EVEX |
| 40312 | { 1788, 3, 1, 0, 172, 0, 0, X86ImpOpBase + 0, 374, 0, 0x100035e0050029ULL }, // Inst #1788 = IMUL32rri8_NF |
| 40313 | { 1787, 3, 1, 0, 172, 0, 1, X86ImpOpBase + 0, 374, 0, 0xc0035e0050029ULL }, // Inst #1787 = IMUL32rri8_EVEX |
| 40314 | { 1786, 3, 1, 0, 172, 0, 1, X86ImpOpBase + 0, 374, 0, 0x3580040129ULL }, // Inst #1786 = IMUL32rri8 |
| 40315 | { 1785, 3, 1, 0, 172, 0, 1, X86ImpOpBase + 0, 374, 0, 0x3480180129ULL }, // Inst #1785 = IMUL32rri |
| 40316 | { 1784, 3, 1, 0, 171, 0, 0, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Commutable), 0x1010d7e0010029ULL }, // Inst #1784 = IMUL32rr_NF_ND |
| 40317 | { 1783, 3, 1, 0, 171, 0, 0, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0x100057e0010029ULL }, // Inst #1783 = IMUL32rr_NF |
| 40318 | { 1782, 3, 1, 0, 171, 0, 1, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Commutable), 0x10d7e0010029ULL }, // Inst #1782 = IMUL32rr_ND |
| 40319 | { 1781, 3, 1, 0, 171, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0xc0057e0010029ULL }, // Inst #1781 = IMUL32rr_EVEX |
| 40320 | { 1780, 3, 1, 0, 171, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0x5780002129ULL }, // Inst #1780 = IMUL32rr |
| 40321 | { 1779, 7, 1, 0, 170, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x100034e0190019ULL }, // Inst #1779 = IMUL32rmi_NF |
| 40322 | { 1778, 7, 1, 0, 170, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0xc0034e0190019ULL }, // Inst #1778 = IMUL32rmi_EVEX |
| 40323 | { 1777, 7, 1, 0, 170, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x100035e0050019ULL }, // Inst #1777 = IMUL32rmi8_NF |
| 40324 | { 1776, 7, 1, 0, 170, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0xc0035e0050019ULL }, // Inst #1776 = IMUL32rmi8_EVEX |
| 40325 | { 1775, 7, 1, 0, 170, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x3580040119ULL }, // Inst #1775 = IMUL32rmi8 |
| 40326 | { 1774, 7, 1, 0, 170, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x3480180119ULL }, // Inst #1774 = IMUL32rmi |
| 40327 | { 1773, 7, 1, 0, 169, 0, 0, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0x1010d7e0010019ULL }, // Inst #1773 = IMUL32rm_NF_ND |
| 40328 | { 1772, 7, 1, 0, 169, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x100057e0010019ULL }, // Inst #1772 = IMUL32rm_NF |
| 40329 | { 1771, 7, 1, 0, 169, 0, 1, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0x10d7e0010019ULL }, // Inst #1771 = IMUL32rm_ND |
| 40330 | { 1770, 7, 1, 0, 169, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0xc0057e0010019ULL }, // Inst #1770 = IMUL32rm_EVEX |
| 40331 | { 1769, 7, 1, 0, 169, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x5780002119ULL }, // Inst #1769 = IMUL32rm |
| 40332 | { 1768, 1, 0, 0, 168, 1, 2, X86ImpOpBase + 116, 201, 0, 0x10007be0010035ULL }, // Inst #1768 = IMUL32r_NF |
| 40333 | { 1767, 1, 0, 0, 168, 1, 3, X86ImpOpBase + 261, 201, 0, 0xc007be0010035ULL }, // Inst #1767 = IMUL32r_EVEX |
| 40334 | { 1766, 1, 0, 0, 168, 1, 3, X86ImpOpBase + 261, 201, 0, 0x7b80000135ULL }, // Inst #1766 = IMUL32r |
| 40335 | { 1765, 5, 0, 0, 167, 1, 2, X86ImpOpBase + 116, 231, 0|(1ULL<<MCID::MayLoad), 0x10007be0010025ULL }, // Inst #1765 = IMUL32m_NF |
| 40336 | { 1764, 5, 0, 0, 167, 1, 3, X86ImpOpBase + 261, 231, 0|(1ULL<<MCID::MayLoad), 0xc007be0010025ULL }, // Inst #1764 = IMUL32m_EVEX |
| 40337 | { 1763, 5, 0, 0, 167, 1, 3, X86ImpOpBase + 261, 231, 0|(1ULL<<MCID::MayLoad), 0x7b80000125ULL }, // Inst #1763 = IMUL32m |
| 40338 | { 1762, 3, 1, 0, 166, 0, 0, X86ImpOpBase + 0, 340, 0, 0x100034e0110829ULL }, // Inst #1762 = IMUL16rri_NF |
| 40339 | { 1761, 3, 1, 0, 166, 0, 1, X86ImpOpBase + 0, 340, 0, 0xc0034e0110829ULL }, // Inst #1761 = IMUL16rri_EVEX |
| 40340 | { 1760, 3, 1, 0, 166, 0, 0, X86ImpOpBase + 0, 340, 0, 0x100035e0050829ULL }, // Inst #1760 = IMUL16rri8_NF |
| 40341 | { 1759, 3, 1, 0, 166, 0, 1, X86ImpOpBase + 0, 340, 0, 0xc0035e0050829ULL }, // Inst #1759 = IMUL16rri8_EVEX |
| 40342 | { 1758, 3, 1, 0, 166, 0, 1, X86ImpOpBase + 0, 340, 0, 0x35800400a9ULL }, // Inst #1758 = IMUL16rri8 |
| 40343 | { 1757, 3, 1, 0, 166, 0, 1, X86ImpOpBase + 0, 340, 0, 0x34801000a9ULL }, // Inst #1757 = IMUL16rri |
| 40344 | { 1756, 3, 1, 0, 165, 0, 0, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Commutable), 0x1010d7e0010829ULL }, // Inst #1756 = IMUL16rr_NF_ND |
| 40345 | { 1755, 3, 1, 0, 165, 0, 0, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0x100057e0010829ULL }, // Inst #1755 = IMUL16rr_NF |
| 40346 | { 1754, 3, 1, 0, 165, 0, 1, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Commutable), 0x10d7e0010829ULL }, // Inst #1754 = IMUL16rr_ND |
| 40347 | { 1753, 3, 1, 0, 165, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0xc0057e0010829ULL }, // Inst #1753 = IMUL16rr_EVEX |
| 40348 | { 1752, 3, 1, 0, 165, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0x57800020a9ULL }, // Inst #1752 = IMUL16rr |
| 40349 | { 1751, 7, 1, 0, 164, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x100034e0110819ULL }, // Inst #1751 = IMUL16rmi_NF |
| 40350 | { 1750, 7, 1, 0, 164, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0xc0034e0110819ULL }, // Inst #1750 = IMUL16rmi_EVEX |
| 40351 | { 1749, 7, 1, 0, 164, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x100035e0050819ULL }, // Inst #1749 = IMUL16rmi8_NF |
| 40352 | { 1748, 7, 1, 0, 164, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0xc0035e0050819ULL }, // Inst #1748 = IMUL16rmi8_EVEX |
| 40353 | { 1747, 7, 1, 0, 164, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x3580040099ULL }, // Inst #1747 = IMUL16rmi8 |
| 40354 | { 1746, 7, 1, 0, 164, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x3480100099ULL }, // Inst #1746 = IMUL16rmi |
| 40355 | { 1745, 7, 1, 0, 163, 0, 0, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::MayLoad), 0x1010d7e0010819ULL }, // Inst #1745 = IMUL16rm_NF_ND |
| 40356 | { 1744, 7, 1, 0, 163, 0, 0, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0x100057e0010819ULL }, // Inst #1744 = IMUL16rm_NF |
| 40357 | { 1743, 7, 1, 0, 163, 0, 1, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::MayLoad), 0x10d7e0010819ULL }, // Inst #1743 = IMUL16rm_ND |
| 40358 | { 1742, 7, 1, 0, 163, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0xc0057e0010819ULL }, // Inst #1742 = IMUL16rm_EVEX |
| 40359 | { 1741, 7, 1, 0, 163, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0x5780002099ULL }, // Inst #1741 = IMUL16rm |
| 40360 | { 1740, 1, 0, 0, 162, 1, 2, X86ImpOpBase + 172, 577, 0, 0x10007be0010835ULL }, // Inst #1740 = IMUL16r_NF |
| 40361 | { 1739, 1, 0, 0, 162, 1, 3, X86ImpOpBase + 257, 577, 0, 0xc007be0010835ULL }, // Inst #1739 = IMUL16r_EVEX |
| 40362 | { 1738, 1, 0, 0, 162, 1, 3, X86ImpOpBase + 257, 577, 0, 0x7b800000b5ULL }, // Inst #1738 = IMUL16r |
| 40363 | { 1737, 5, 0, 0, 161, 1, 2, X86ImpOpBase + 172, 231, 0|(1ULL<<MCID::MayLoad), 0x10007be0010825ULL }, // Inst #1737 = IMUL16m_NF |
| 40364 | { 1736, 5, 0, 0, 161, 1, 3, X86ImpOpBase + 257, 231, 0|(1ULL<<MCID::MayLoad), 0xc007be0010825ULL }, // Inst #1736 = IMUL16m_EVEX |
| 40365 | { 1735, 5, 0, 0, 161, 1, 3, X86ImpOpBase + 257, 231, 0|(1ULL<<MCID::MayLoad), 0x7b800000a5ULL }, // Inst #1735 = IMUL16m |
| 40366 | { 1734, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1074, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1734 = ILD_Fp64m80 |
| 40367 | { 1733, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1068, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1733 = ILD_Fp64m64 |
| 40368 | { 1732, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1062, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1732 = ILD_Fp64m32 |
| 40369 | { 1731, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1074, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1731 = ILD_Fp32m80 |
| 40370 | { 1730, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1068, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1730 = ILD_Fp32m64 |
| 40371 | { 1729, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1062, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1729 = ILD_Fp32m32 |
| 40372 | { 1728, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1074, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1728 = ILD_Fp16m80 |
| 40373 | { 1727, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1068, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1727 = ILD_Fp16m64 |
| 40374 | { 1726, 6, 1, 0, 72, 1, 1, X86ImpOpBase + 79, 1062, 0|(1ULL<<MCID::MayLoad), 0x400000ULL }, // Inst #1726 = ILD_Fp16m32 |
| 40375 | { 1725, 5, 0, 0, 624, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000025ULL }, // Inst #1725 = ILD_F64m |
| 40376 | { 1724, 5, 0, 0, 624, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000020ULL }, // Inst #1724 = ILD_F32m |
| 40377 | { 1723, 5, 0, 0, 624, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000020ULL }, // Inst #1723 = ILD_F16m |
| 40378 | { 1722, 1, 0, 0, 160, 1, 2, X86ImpOpBase + 208, 1029, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007b60010037ULL }, // Inst #1722 = IDIV8r_NF |
| 40379 | { 1721, 1, 0, 0, 160, 1, 3, X86ImpOpBase + 204, 1029, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007b60010037ULL }, // Inst #1721 = IDIV8r_EVEX |
| 40380 | { 1720, 1, 0, 0, 160, 1, 3, X86ImpOpBase + 204, 1029, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000037ULL }, // Inst #1720 = IDIV8r |
| 40381 | { 1719, 5, 0, 0, 159, 1, 2, X86ImpOpBase + 208, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007b60010027ULL }, // Inst #1719 = IDIV8m_NF |
| 40382 | { 1718, 5, 0, 0, 159, 1, 3, X86ImpOpBase + 204, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007b60010027ULL }, // Inst #1718 = IDIV8m_EVEX |
| 40383 | { 1717, 5, 0, 0, 159, 1, 3, X86ImpOpBase + 204, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000027ULL }, // Inst #1717 = IDIV8m |
| 40384 | { 1716, 1, 0, 0, 158, 2, 2, X86ImpOpBase + 200, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0030037ULL }, // Inst #1716 = IDIV64r_NF |
| 40385 | { 1715, 1, 0, 0, 158, 2, 3, X86ImpOpBase + 195, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0030037ULL }, // Inst #1715 = IDIV64r_EVEX |
| 40386 | { 1714, 1, 0, 0, 158, 2, 3, X86ImpOpBase + 195, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020037ULL }, // Inst #1714 = IDIV64r |
| 40387 | { 1713, 5, 0, 0, 157, 2, 2, X86ImpOpBase + 200, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0030027ULL }, // Inst #1713 = IDIV64m_NF |
| 40388 | { 1712, 5, 0, 0, 157, 2, 3, X86ImpOpBase + 195, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0030027ULL }, // Inst #1712 = IDIV64m_EVEX |
| 40389 | { 1711, 5, 0, 0, 157, 2, 3, X86ImpOpBase + 195, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020027ULL }, // Inst #1711 = IDIV64m |
| 40390 | { 1710, 1, 0, 0, 156, 2, 2, X86ImpOpBase + 191, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010037ULL }, // Inst #1710 = IDIV32r_NF |
| 40391 | { 1709, 1, 0, 0, 156, 2, 3, X86ImpOpBase + 186, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010037ULL }, // Inst #1709 = IDIV32r_EVEX |
| 40392 | { 1708, 1, 0, 0, 156, 2, 3, X86ImpOpBase + 186, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000137ULL }, // Inst #1708 = IDIV32r |
| 40393 | { 1707, 5, 0, 0, 155, 2, 2, X86ImpOpBase + 191, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010027ULL }, // Inst #1707 = IDIV32m_NF |
| 40394 | { 1706, 5, 0, 0, 155, 2, 3, X86ImpOpBase + 186, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010027ULL }, // Inst #1706 = IDIV32m_EVEX |
| 40395 | { 1705, 5, 0, 0, 155, 2, 3, X86ImpOpBase + 186, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000127ULL }, // Inst #1705 = IDIV32m |
| 40396 | { 1704, 1, 0, 0, 154, 2, 2, X86ImpOpBase + 182, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010837ULL }, // Inst #1704 = IDIV16r_NF |
| 40397 | { 1703, 1, 0, 0, 154, 2, 3, X86ImpOpBase + 177, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010837ULL }, // Inst #1703 = IDIV16r_EVEX |
| 40398 | { 1702, 1, 0, 0, 154, 2, 3, X86ImpOpBase + 177, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b800000b7ULL }, // Inst #1702 = IDIV16r |
| 40399 | { 1701, 5, 0, 0, 153, 2, 2, X86ImpOpBase + 182, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010827ULL }, // Inst #1701 = IDIV16m_NF |
| 40400 | { 1700, 5, 0, 0, 153, 2, 3, X86ImpOpBase + 177, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010827ULL }, // Inst #1700 = IDIV16m_EVEX |
| 40401 | { 1699, 5, 0, 0, 153, 2, 3, X86ImpOpBase + 177, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b800000a7ULL }, // Inst #1699 = IDIV16m |
| 40402 | { 1698, 3, 1, 0, 152, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x3e88003829ULL }, // Inst #1698 = HSUBPSrr |
| 40403 | { 1697, 7, 1, 0, 151, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3e88003819ULL }, // Inst #1697 = HSUBPSrm |
| 40404 | { 1696, 3, 1, 0, 152, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x3e90002829ULL }, // Inst #1696 = HSUBPDrr |
| 40405 | { 1695, 7, 1, 0, 151, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3e90002819ULL }, // Inst #1695 = HSUBPDrm |
| 40406 | { 1694, 1, 0, 0, 8, 1, 0, X86ImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7800047040ULL }, // Inst #1694 = HRESET |
| 40407 | { 1693, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7a00000001ULL }, // Inst #1693 = HLT |
| 40408 | { 1692, 3, 1, 0, 152, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x3e08003829ULL }, // Inst #1692 = HADDPSrr |
| 40409 | { 1691, 7, 1, 0, 151, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3e08003819ULL }, // Inst #1691 = HADDPSrm |
| 40410 | { 1690, 3, 1, 0, 152, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x3e10002829ULL }, // Inst #1690 = HADDPDrr |
| 40411 | { 1689, 7, 1, 0, 151, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x3e10002819ULL }, // Inst #1689 = HADDPDrm |
| 40412 | { 1688, 0, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x328000000aULL }, // Inst #1688 = GS_PREFIX |
| 40413 | { 1687, 3, 1, 0, 1504, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x6798004829ULL }, // Inst #1687 = GF2P8MULBrr |
| 40414 | { 1686, 7, 1, 0, 1501, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6798004819ULL }, // Inst #1686 = GF2P8MULBrm |
| 40415 | { 1685, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 563, 0, 0x6718046829ULL }, // Inst #1685 = GF2P8AFFINEQBrri |
| 40416 | { 1684, 8, 1, 0, 1500, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x6718046819ULL }, // Inst #1684 = GF2P8AFFINEQBrmi |
| 40417 | { 1683, 4, 1, 0, 149, 0, 0, X86ImpOpBase + 0, 563, 0, 0x6798046829ULL }, // Inst #1683 = GF2P8AFFINEINVQBrri |
| 40418 | { 1682, 8, 1, 0, 1500, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x6798046819ULL }, // Inst #1682 = GF2P8AFFINEINVQBrmi |
| 40419 | { 1681, 0, 0, 0, 8, 4, 3, X86ImpOpBase + 250, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1b80002001ULL }, // Inst #1681 = GETSEC |
| 40420 | { 1680, 0, 0, 0, 732, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000079ULL }, // Inst #1680 = FYL2XP1 |
| 40421 | { 1679, 0, 0, 0, 731, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000071ULL }, // Inst #1679 = FYL2X |
| 40422 | { 1678, 0, 0, 0, 829, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000074ULL }, // Inst #1678 = FXTRACT |
| 40423 | { 1677, 5, 0, 0, 729, 2, 0, X86ImpOpBase + 239, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700022020ULL }, // Inst #1677 = FXSAVE64 |
| 40424 | { 1676, 5, 0, 0, 729, 2, 0, X86ImpOpBase + 239, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002020ULL }, // Inst #1676 = FXSAVE |
| 40425 | { 1675, 5, 0, 0, 897, 0, 2, X86ImpOpBase + 239, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700022021ULL }, // Inst #1675 = FXRSTOR64 |
| 40426 | { 1674, 5, 0, 0, 730, 0, 2, X86ImpOpBase + 239, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002021ULL }, // Inst #1674 = FXRSTOR |
| 40427 | { 1673, 0, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x320000000aULL }, // Inst #1673 = FS_PREFIX |
| 40428 | { 1672, 5, 0, 0, 898, 2, 2, X86ImpOpBase + 246, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000026ULL }, // Inst #1672 = FSTENVm |
| 40429 | { 1671, 0, 0, 0, 734, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007bULL }, // Inst #1671 = FSINCOS |
| 40430 | { 1670, 0, 0, 0, 734, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007eULL }, // Inst #1670 = FSIN |
| 40431 | { 1669, 0, 0, 0, 720, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007dULL }, // Inst #1669 = FSCALE |
| 40432 | { 1668, 5, 0, 0, 827, 2, 2, X86ImpOpBase + 246, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000026ULL }, // Inst #1668 = FSAVEm |
| 40433 | { 1667, 5, 0, 0, 828, 0, 2, X86ImpOpBase + 239, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000024ULL }, // Inst #1667 = FRSTORm |
| 40434 | { 1666, 0, 0, 0, 709, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007cULL }, // Inst #1666 = FRNDINT |
| 40435 | { 1665, 0, 0, 0, 733, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000072ULL }, // Inst #1665 = FPTAN |
| 40436 | { 1664, 0, 0, 0, 716, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000075ULL }, // Inst #1664 = FPREM1 |
| 40437 | { 1663, 0, 0, 0, 712, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000078ULL }, // Inst #1663 = FPREM |
| 40438 | { 1662, 0, 0, 0, 735, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000073ULL }, // Inst #1662 = FPATAN |
| 40439 | { 1661, 6, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1661 = FP80_TO_INT64_IN_MEM |
| 40440 | { 1660, 6, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1660 = FP80_TO_INT32_IN_MEM |
| 40441 | { 1659, 6, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 1056, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1659 = FP80_TO_INT16_IN_MEM |
| 40442 | { 1658, 3, 1, 0, 0, 0, 1, X86ImpOpBase + 0, 516, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1658 = FP80_ADDr |
| 40443 | { 1657, 7, 1, 0, 0, 0, 1, X86ImpOpBase + 0, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1657 = FP80_ADDm32 |
| 40444 | { 1656, 6, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1656 = FP64_TO_INT64_IN_MEM |
| 40445 | { 1655, 6, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1655 = FP64_TO_INT32_IN_MEM |
| 40446 | { 1654, 6, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 1050, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1654 = FP64_TO_INT16_IN_MEM |
| 40447 | { 1653, 6, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1653 = FP32_TO_INT64_IN_MEM |
| 40448 | { 1652, 6, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1652 = FP32_TO_INT32_IN_MEM |
| 40449 | { 1651, 6, 0, 0, 0, 0, 1, X86ImpOpBase + 0, 1044, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1651 = FP32_TO_INT16_IN_MEM |
| 40450 | { 1650, 5, 0, 0, 784, 1, 1, X86ImpOpBase + 244, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000027ULL }, // Inst #1650 = FNSTSWm |
| 40451 | { 1649, 0, 0, 0, 749, 1, 2, X86ImpOpBase + 241, 1, 0, 0x6f80000060ULL }, // Inst #1649 = FNSTSW16r |
| 40452 | { 1648, 5, 0, 0, 681, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000027ULL }, // Inst #1648 = FNSTCW16m |
| 40453 | { 1647, 0, 0, 0, 740, 0, 1, X86ImpOpBase + 52, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000050ULL }, // Inst #1647 = FNOP |
| 40454 | { 1646, 0, 0, 0, 714, 0, 2, X86ImpOpBase + 239, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000063ULL }, // Inst #1646 = FNINIT |
| 40455 | { 1645, 0, 0, 0, 702, 0, 1, X86ImpOpBase + 52, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000062ULL }, // Inst #1645 = FNCLEX |
| 40456 | { 1644, 0, 0, 0, 147, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000006bULL }, // Inst #1644 = FLDPI |
| 40457 | { 1643, 0, 0, 0, 147, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000006dULL }, // Inst #1643 = FLDLN2 |
| 40458 | { 1642, 0, 0, 0, 147, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000006cULL }, // Inst #1642 = FLDLG2 |
| 40459 | { 1641, 0, 0, 0, 147, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000069ULL }, // Inst #1641 = FLDL2T |
| 40460 | { 1640, 0, 0, 0, 147, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000006aULL }, // Inst #1640 = FLDL2E |
| 40461 | { 1639, 5, 0, 0, 896, 0, 2, X86ImpOpBase + 239, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000024ULL }, // Inst #1639 = FLDENVm |
| 40462 | { 1638, 5, 0, 0, 665, 0, 2, X86ImpOpBase + 239, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000025ULL }, // Inst #1638 = FLDCW16m |
| 40463 | { 1637, 0, 0, 0, 841, 0, 1, X86ImpOpBase + 52, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000077ULL }, // Inst #1637 = FINCSTP |
| 40464 | { 1636, 5, 0, 0, 800, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000023ULL }, // Inst #1636 = FICOMP32m |
| 40465 | { 1635, 5, 0, 0, 800, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000023ULL }, // Inst #1635 = FICOMP16m |
| 40466 | { 1634, 5, 0, 0, 800, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000022ULL }, // Inst #1634 = FICOM32m |
| 40467 | { 1633, 5, 0, 0, 800, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000022ULL }, // Inst #1633 = FICOM16m |
| 40468 | { 1632, 1, 0, 0, 826, 0, 1, X86ImpOpBase + 52, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000030ULL }, // Inst #1632 = FFREEP |
| 40469 | { 1631, 1, 0, 0, 826, 0, 1, X86ImpOpBase + 52, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000030ULL }, // Inst #1631 = FFREE |
| 40470 | { 1630, 0, 0, 0, 146, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x700002001ULL }, // Inst #1630 = FEMMS |
| 40471 | { 1629, 0, 0, 0, 739, 0, 1, X86ImpOpBase + 52, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000076ULL }, // Inst #1629 = FDECSTP |
| 40472 | { 1628, 0, 0, 0, 734, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000007fULL }, // Inst #1628 = FCOS |
| 40473 | { 1627, 0, 0, 0, 614, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000059ULL }, // Inst #1627 = FCOMPP |
| 40474 | { 1626, 5, 0, 0, 912, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000023ULL }, // Inst #1626 = FCOMP64m |
| 40475 | { 1625, 5, 0, 0, 912, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000023ULL }, // Inst #1625 = FCOMP32m |
| 40476 | { 1624, 5, 0, 0, 912, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000022ULL }, // Inst #1624 = FCOM64m |
| 40477 | { 1623, 5, 0, 0, 912, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000022ULL }, // Inst #1623 = FCOM32m |
| 40478 | { 1622, 5, 0, 0, 834, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000026ULL }, // Inst #1622 = FBSTPm |
| 40479 | { 1621, 5, 0, 0, 825, 0, 1, X86ImpOpBase + 52, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000024ULL }, // Inst #1621 = FBLDm |
| 40480 | { 1620, 5, 0, 0, 783, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80020025ULL }, // Inst #1620 = FARJMP64m |
| 40481 | { 1619, 5, 0, 0, 6, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80000125ULL }, // Inst #1619 = FARJMP32m |
| 40482 | { 1618, 2, 0, 0, 4, 0, 0, X86ImpOpBase + 0, 21, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7500180108ULL }, // Inst #1618 = FARJMP32i |
| 40483 | { 1617, 5, 0, 0, 6, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f800000a5ULL }, // Inst #1617 = FARJMP16m |
| 40484 | { 1616, 2, 0, 0, 4, 0, 0, X86ImpOpBase + 0, 21, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7500100088ULL }, // Inst #1616 = FARJMP16i |
| 40485 | { 1615, 5, 0, 0, 793, 2, 0, X86ImpOpBase + 1, 231, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80020023ULL }, // Inst #1615 = FARCALL64m |
| 40486 | { 1614, 5, 0, 0, 6, 2, 0, X86ImpOpBase + 112, 231, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80000123ULL }, // Inst #1614 = FARCALL32m |
| 40487 | { 1613, 2, 0, 0, 4, 2, 0, X86ImpOpBase + 112, 21, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x4d00180108ULL }, // Inst #1613 = FARCALL32i |
| 40488 | { 1612, 5, 0, 0, 6, 2, 0, X86ImpOpBase + 112, 231, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f800000a3ULL }, // Inst #1612 = FARCALL16m |
| 40489 | { 1611, 2, 0, 0, 4, 2, 0, X86ImpOpBase + 112, 21, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x4d00100088ULL }, // Inst #1611 = FARCALL16i |
| 40490 | { 1610, 0, 0, 0, 725, 1, 1, X86ImpOpBase + 79, 1, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000070ULL }, // Inst #1610 = F2XM1 |
| 40491 | { 1609, 4, 1, 0, 993, 0, 0, X86ImpOpBase + 0, 1040, 0, 0x3c1804282fULL }, // Inst #1609 = EXTRQI |
| 40492 | { 1608, 3, 1, 0, 1038, 0, 0, X86ImpOpBase + 0, 472, 0, 0x3c98002829ULL }, // Inst #1608 = EXTRQ |
| 40493 | { 1607, 3, 1, 0, 752, 0, 0, X86ImpOpBase + 0, 1037, 0, 0xb88046828ULL }, // Inst #1607 = EXTRACTPSrr |
| 40494 | { 1606, 7, 0, 0, 765, 0, 0, X86ImpOpBase + 0, 1030, 0|(1ULL<<MCID::MayStore), 0xb88046818ULL }, // Inst #1606 = EXTRACTPSmr |
| 40495 | { 1605, 0, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x130000000aULL }, // Inst #1605 = ES_PREFIX |
| 40496 | { 1604, 0, 0, 0, 8, 0, 2, X86ImpOpBase + 237, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000304aULL }, // Inst #1604 = ERETU |
| 40497 | { 1603, 0, 0, 0, 8, 0, 2, X86ImpOpBase + 237, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000384aULL }, // Inst #1603 = ERETS |
| 40498 | { 1602, 2, 0, 0, 706, 0, 0, X86ImpOpBase + 0, 21, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6400100007ULL }, // Inst #1602 = ENTER |
| 40499 | { 1601, 6, 0, 0, 141, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60011619ULL }, // Inst #1601 = ENQCMDS64_EVEX |
| 40500 | { 1600, 6, 0, 0, 1710, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005619ULL }, // Inst #1600 = ENQCMDS64 |
| 40501 | { 1599, 6, 0, 0, 141, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60011419ULL }, // Inst #1599 = ENQCMDS32_EVEX |
| 40502 | { 1598, 6, 0, 0, 1710, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005419ULL }, // Inst #1598 = ENQCMDS32 |
| 40503 | { 1597, 6, 0, 0, 1710, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005219ULL }, // Inst #1597 = ENQCMDS16 |
| 40504 | { 1596, 6, 0, 0, 141, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60011e19ULL }, // Inst #1596 = ENQCMD64_EVEX |
| 40505 | { 1595, 6, 0, 0, 1710, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005e19ULL }, // Inst #1595 = ENQCMD64 |
| 40506 | { 1594, 6, 0, 0, 141, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c60011c19ULL }, // Inst #1594 = ENQCMD32_EVEX |
| 40507 | { 1593, 6, 0, 0, 1710, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005c19ULL }, // Inst #1593 = ENQCMD32 |
| 40508 | { 1592, 6, 0, 0, 1710, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00005a19ULL }, // Inst #1592 = ENQCMD16 |
| 40509 | { 1591, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf0000307aULL }, // Inst #1591 = ENDBR64 |
| 40510 | { 1590, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf0000307bULL }, // Inst #1590 = ENDBR32 |
| 40511 | { 1589, 2, 1, 0, 8, 2, 8, X86ImpOpBase + 227, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d80005029ULL }, // Inst #1589 = ENCODEKEY256 |
| 40512 | { 1588, 2, 1, 0, 8, 1, 7, X86ImpOpBase + 219, 551, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d00005029ULL }, // Inst #1588 = ENCODEKEY128 |
| 40513 | { 1587, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002040ULL }, // Inst #1587 = ENCLV |
| 40514 | { 1586, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80002057ULL }, // Inst #1586 = ENCLU |
| 40515 | { 1585, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000204fULL }, // Inst #1585 = ENCLS |
| 40516 | { 1584, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 578, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1584 = EH_SjLj_Setup |
| 40517 | { 1583, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1583 = EH_SjLj_SetJmp64 |
| 40518 | { 1582, 6, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1582 = EH_SjLj_SetJmp32 |
| 40519 | { 1581, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1581 = EH_SjLj_LongJmp64 |
| 40520 | { 1580, 5, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1580 = EH_SjLj_LongJmp32 |
| 40521 | { 1579, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 202, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x6180000001ULL }, // Inst #1579 = EH_RETURN64 |
| 40522 | { 1578, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x6180000001ULL }, // Inst #1578 = EH_RETURN |
| 40523 | { 1577, 1, 0, 0, 8, 1, 3, X86ImpOpBase + 215, 202, 0, 0x0ULL }, // Inst #1577 = DYN_ALLOCA_64 |
| 40524 | { 1576, 1, 0, 0, 8, 1, 3, X86ImpOpBase + 211, 201, 0, 0x0ULL }, // Inst #1576 = DYN_ALLOCA_32 |
| 40525 | { 1575, 0, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1f0000000aULL }, // Inst #1575 = DS_PREFIX |
| 40526 | { 1574, 4, 1, 0, 140, 1, 0, X86ImpOpBase + 78, 563, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2008046829ULL }, // Inst #1574 = DPPSrri |
| 40527 | { 1573, 8, 1, 0, 139, 1, 0, X86ImpOpBase + 78, 555, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2008046819ULL }, // Inst #1573 = DPPSrmi |
| 40528 | { 1572, 4, 1, 0, 138, 1, 0, X86ImpOpBase + 78, 563, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2090046829ULL }, // Inst #1572 = DPPDrri |
| 40529 | { 1571, 8, 1, 0, 137, 1, 0, X86ImpOpBase + 78, 555, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2090046819ULL }, // Inst #1571 = DPPDrmi |
| 40530 | { 1570, 1, 0, 0, 1496, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000037ULL }, // Inst #1570 = DIV_FrST0 |
| 40531 | { 1569, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1569 = DIV_FpI32m80 |
| 40532 | { 1568, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1568 = DIV_FpI32m64 |
| 40533 | { 1567, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1567 = DIV_FpI32m32 |
| 40534 | { 1566, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1566 = DIV_FpI16m80 |
| 40535 | { 1565, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1565 = DIV_FpI16m64 |
| 40536 | { 1564, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1564 = DIV_FpI16m32 |
| 40537 | { 1563, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1563 = DIV_Fp80m64 |
| 40538 | { 1562, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1562 = DIV_Fp80m32 |
| 40539 | { 1561, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 516, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #1561 = DIV_Fp80 |
| 40540 | { 1560, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1560 = DIV_Fp64m32 |
| 40541 | { 1559, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1559 = DIV_Fp64m |
| 40542 | { 1558, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 506, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #1558 = DIV_Fp64 |
| 40543 | { 1557, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1557 = DIV_Fp32m |
| 40544 | { 1556, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 496, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #1556 = DIV_Fp32 |
| 40545 | { 1555, 1, 0, 0, 888, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000036ULL }, // Inst #1555 = DIV_FST0r |
| 40546 | { 1554, 1, 0, 0, 1496, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000037ULL }, // Inst #1554 = DIV_FPrST0 |
| 40547 | { 1553, 5, 0, 0, 805, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000026ULL }, // Inst #1553 = DIV_FI32m |
| 40548 | { 1552, 5, 0, 0, 805, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000026ULL }, // Inst #1552 = DIV_FI16m |
| 40549 | { 1551, 5, 0, 0, 804, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000026ULL }, // Inst #1551 = DIV_F64m |
| 40550 | { 1550, 5, 0, 0, 804, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000026ULL }, // Inst #1550 = DIV_F32m |
| 40551 | { 1549, 3, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f08003029ULL }, // Inst #1549 = DIVSSrr_Int |
| 40552 | { 1548, 3, 1, 0, 133, 1, 0, X86ImpOpBase + 78, 492, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f08003029ULL }, // Inst #1548 = DIVSSrr |
| 40553 | { 1547, 7, 1, 0, 136, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f08003019ULL }, // Inst #1547 = DIVSSrm_Int |
| 40554 | { 1546, 7, 1, 0, 136, 1, 0, X86ImpOpBase + 78, 485, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f08003019ULL }, // Inst #1546 = DIVSSrm |
| 40555 | { 1545, 3, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f10003829ULL }, // Inst #1545 = DIVSDrr_Int |
| 40556 | { 1544, 3, 1, 0, 135, 1, 0, X86ImpOpBase + 78, 482, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f10003829ULL }, // Inst #1544 = DIVSDrr |
| 40557 | { 1543, 7, 1, 0, 1495, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f10003819ULL }, // Inst #1543 = DIVSDrm_Int |
| 40558 | { 1542, 7, 1, 0, 1706, 1, 0, X86ImpOpBase + 78, 475, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f10003819ULL }, // Inst #1542 = DIVSDrm |
| 40559 | { 1541, 1, 0, 0, 1494, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000036ULL }, // Inst #1541 = DIVR_FrST0 |
| 40560 | { 1540, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1540 = DIVR_FpI32m80 |
| 40561 | { 1539, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1539 = DIVR_FpI32m64 |
| 40562 | { 1538, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1538 = DIVR_FpI32m32 |
| 40563 | { 1537, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1537 = DIVR_FpI16m80 |
| 40564 | { 1536, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1536 = DIVR_FpI16m64 |
| 40565 | { 1535, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1535 = DIVR_FpI16m32 |
| 40566 | { 1534, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1534 = DIVR_Fp80m64 |
| 40567 | { 1533, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1533 = DIVR_Fp80m32 |
| 40568 | { 1532, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1532 = DIVR_Fp64m32 |
| 40569 | { 1531, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1531 = DIVR_Fp64m |
| 40570 | { 1530, 7, 1, 0, 132, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #1530 = DIVR_Fp32m |
| 40571 | { 1529, 1, 0, 0, 891, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000037ULL }, // Inst #1529 = DIVR_FST0r |
| 40572 | { 1528, 1, 0, 0, 1494, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000036ULL }, // Inst #1528 = DIVR_FPrST0 |
| 40573 | { 1527, 5, 0, 0, 890, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000027ULL }, // Inst #1527 = DIVR_FI32m |
| 40574 | { 1526, 5, 0, 0, 890, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000027ULL }, // Inst #1526 = DIVR_FI16m |
| 40575 | { 1525, 5, 0, 0, 889, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000027ULL }, // Inst #1525 = DIVR_F64m |
| 40576 | { 1524, 5, 0, 0, 889, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000027ULL }, // Inst #1524 = DIVR_F32m |
| 40577 | { 1523, 3, 1, 0, 131, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f08002029ULL }, // Inst #1523 = DIVPSrr |
| 40578 | { 1522, 7, 1, 0, 130, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f08002019ULL }, // Inst #1522 = DIVPSrm |
| 40579 | { 1521, 3, 1, 0, 129, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2f10002829ULL }, // Inst #1521 = DIVPDrr |
| 40580 | { 1520, 7, 1, 0, 128, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2f10002819ULL }, // Inst #1520 = DIVPDrm |
| 40581 | { 1519, 1, 0, 0, 127, 1, 2, X86ImpOpBase + 208, 1029, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007b60010036ULL }, // Inst #1519 = DIV8r_NF |
| 40582 | { 1518, 1, 0, 0, 127, 1, 3, X86ImpOpBase + 204, 1029, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007b60010036ULL }, // Inst #1518 = DIV8r_EVEX |
| 40583 | { 1517, 1, 0, 0, 127, 1, 3, X86ImpOpBase + 204, 1029, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000036ULL }, // Inst #1517 = DIV8r |
| 40584 | { 1516, 5, 0, 0, 126, 1, 2, X86ImpOpBase + 208, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007b60010026ULL }, // Inst #1516 = DIV8m_NF |
| 40585 | { 1515, 5, 0, 0, 126, 1, 3, X86ImpOpBase + 204, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007b60010026ULL }, // Inst #1515 = DIV8m_EVEX |
| 40586 | { 1514, 5, 0, 0, 126, 1, 3, X86ImpOpBase + 204, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000026ULL }, // Inst #1514 = DIV8m |
| 40587 | { 1513, 1, 0, 0, 125, 2, 2, X86ImpOpBase + 200, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0030036ULL }, // Inst #1513 = DIV64r_NF |
| 40588 | { 1512, 1, 0, 0, 125, 2, 3, X86ImpOpBase + 195, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0030036ULL }, // Inst #1512 = DIV64r_EVEX |
| 40589 | { 1511, 1, 0, 0, 125, 2, 3, X86ImpOpBase + 195, 202, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020036ULL }, // Inst #1511 = DIV64r |
| 40590 | { 1510, 5, 0, 0, 124, 2, 2, X86ImpOpBase + 200, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0030026ULL }, // Inst #1510 = DIV64m_NF |
| 40591 | { 1509, 5, 0, 0, 124, 2, 3, X86ImpOpBase + 195, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0030026ULL }, // Inst #1509 = DIV64m_EVEX |
| 40592 | { 1508, 5, 0, 0, 124, 2, 3, X86ImpOpBase + 195, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020026ULL }, // Inst #1508 = DIV64m |
| 40593 | { 1507, 1, 0, 0, 123, 2, 2, X86ImpOpBase + 191, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010036ULL }, // Inst #1507 = DIV32r_NF |
| 40594 | { 1506, 1, 0, 0, 123, 2, 3, X86ImpOpBase + 186, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010036ULL }, // Inst #1506 = DIV32r_EVEX |
| 40595 | { 1505, 1, 0, 0, 123, 2, 3, X86ImpOpBase + 186, 201, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000136ULL }, // Inst #1505 = DIV32r |
| 40596 | { 1504, 5, 0, 0, 122, 2, 2, X86ImpOpBase + 191, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010026ULL }, // Inst #1504 = DIV32m_NF |
| 40597 | { 1503, 5, 0, 0, 122, 2, 3, X86ImpOpBase + 186, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010026ULL }, // Inst #1503 = DIV32m_EVEX |
| 40598 | { 1502, 5, 0, 0, 122, 2, 3, X86ImpOpBase + 186, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000126ULL }, // Inst #1502 = DIV32m |
| 40599 | { 1501, 1, 0, 0, 121, 2, 2, X86ImpOpBase + 182, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010836ULL }, // Inst #1501 = DIV16r_NF |
| 40600 | { 1500, 1, 0, 0, 121, 2, 3, X86ImpOpBase + 177, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010836ULL }, // Inst #1500 = DIV16r_EVEX |
| 40601 | { 1499, 1, 0, 0, 121, 2, 3, X86ImpOpBase + 177, 577, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b800000b6ULL }, // Inst #1499 = DIV16r |
| 40602 | { 1498, 5, 0, 0, 120, 2, 2, X86ImpOpBase + 182, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x10007be0010826ULL }, // Inst #1498 = DIV16m_NF |
| 40603 | { 1497, 5, 0, 0, 120, 2, 3, X86ImpOpBase + 177, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xc007be0010826ULL }, // Inst #1497 = DIV16m_EVEX |
| 40604 | { 1496, 5, 0, 0, 120, 2, 3, X86ImpOpBase + 177, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b800000a6ULL }, // Inst #1496 = DIV16m |
| 40605 | { 1495, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 925, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ff60010031ULL }, // Inst #1495 = DEC8r_NF_ND |
| 40606 | { 1494, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 1027, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007f60010031ULL }, // Inst #1494 = DEC8r_NF |
| 40607 | { 1493, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 925, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ff60010031ULL }, // Inst #1493 = DEC8r_ND |
| 40608 | { 1492, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 1027, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007f60010031ULL }, // Inst #1492 = DEC8r_EVEX |
| 40609 | { 1491, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 1027, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f00000031ULL }, // Inst #1491 = DEC8r |
| 40610 | { 1490, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x1010ff60010021ULL }, // Inst #1490 = DEC8m_NF_ND |
| 40611 | { 1489, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007f60010021ULL }, // Inst #1489 = DEC8m_NF |
| 40612 | { 1488, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::MayLoad), 0x10ff60010021ULL }, // Inst #1488 = DEC8m_ND |
| 40613 | { 1487, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007f60010021ULL }, // Inst #1487 = DEC8m_EVEX |
| 40614 | { 1486, 5, 0, 0, 1452, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f00000021ULL }, // Inst #1486 = DEC8m |
| 40615 | { 1485, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0030031ULL }, // Inst #1485 = DEC64r_NF_ND |
| 40616 | { 1484, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 300, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0030031ULL }, // Inst #1484 = DEC64r_NF |
| 40617 | { 1483, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0030031ULL }, // Inst #1483 = DEC64r_ND |
| 40618 | { 1482, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 300, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0030031ULL }, // Inst #1482 = DEC64r_EVEX |
| 40619 | { 1481, 2, 1, 0, 1447, 0, 1, X86ImpOpBase + 0, 300, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80020031ULL }, // Inst #1481 = DEC64r |
| 40620 | { 1480, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0030021ULL }, // Inst #1480 = DEC64m_NF_ND |
| 40621 | { 1479, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0030021ULL }, // Inst #1479 = DEC64m_NF |
| 40622 | { 1478, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x10ffe0030021ULL }, // Inst #1478 = DEC64m_ND |
| 40623 | { 1477, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0030021ULL }, // Inst #1477 = DEC64m_EVEX |
| 40624 | { 1476, 5, 0, 0, 1196, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80020021ULL }, // Inst #1476 = DEC64m |
| 40625 | { 1475, 2, 1, 0, 1493, 0, 1, X86ImpOpBase + 0, 298, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x2400000102ULL }, // Inst #1475 = DEC32r_alt |
| 40626 | { 1474, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0010031ULL }, // Inst #1474 = DEC32r_NF_ND |
| 40627 | { 1473, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 298, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0010031ULL }, // Inst #1473 = DEC32r_NF |
| 40628 | { 1472, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0010031ULL }, // Inst #1472 = DEC32r_ND |
| 40629 | { 1471, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 298, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0010031ULL }, // Inst #1471 = DEC32r_EVEX |
| 40630 | { 1470, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 298, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000131ULL }, // Inst #1470 = DEC32r |
| 40631 | { 1469, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0010021ULL }, // Inst #1469 = DEC32m_NF_ND |
| 40632 | { 1468, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0010021ULL }, // Inst #1468 = DEC32m_NF |
| 40633 | { 1467, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x10ffe0010021ULL }, // Inst #1467 = DEC32m_ND |
| 40634 | { 1466, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0010021ULL }, // Inst #1466 = DEC32m_EVEX |
| 40635 | { 1465, 5, 0, 0, 1196, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000121ULL }, // Inst #1465 = DEC32m |
| 40636 | { 1464, 2, 1, 0, 1491, 0, 1, X86ImpOpBase + 0, 573, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x2400000082ULL }, // Inst #1464 = DEC16r_alt |
| 40637 | { 1463, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010ffe0010831ULL }, // Inst #1463 = DEC16r_NF_ND |
| 40638 | { 1462, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 573, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10007fe0010831ULL }, // Inst #1462 = DEC16r_NF |
| 40639 | { 1461, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10ffe0010831ULL }, // Inst #1461 = DEC16r_ND |
| 40640 | { 1460, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 573, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc007fe0010831ULL }, // Inst #1460 = DEC16r_EVEX |
| 40641 | { 1459, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 573, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f800000b1ULL }, // Inst #1459 = DEC16r |
| 40642 | { 1458, 6, 1, 0, 933, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x1010ffe0010821ULL }, // Inst #1458 = DEC16m_NF_ND |
| 40643 | { 1457, 5, 0, 0, 932, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10007fe0010821ULL }, // Inst #1457 = DEC16m_NF |
| 40644 | { 1456, 6, 1, 0, 933, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x10ffe0010821ULL }, // Inst #1456 = DEC16m_ND |
| 40645 | { 1455, 5, 0, 0, 932, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc007fe0010821ULL }, // Inst #1455 = DEC16m_EVEX |
| 40646 | { 1454, 5, 0, 0, 1196, 0, 1, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f800000a1ULL }, // Inst #1454 = DEC16m |
| 40647 | { 1453, 0, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x330000000aULL }, // Inst #1453 = DATA16_PREFIX |
| 40648 | { 1452, 0, 0, 0, 697, 2, 2, X86ImpOpBase + 65, 1, 0, 0x1780000001ULL }, // Inst #1452 = DAS |
| 40649 | { 1451, 0, 0, 0, 695, 2, 2, X86ImpOpBase + 65, 1, 0, 0x1380000001ULL }, // Inst #1451 = DAA |
| 40650 | { 1450, 0, 0, 0, 1475, 1, 1, X86ImpOpBase + 175, 1, 0, 0x4c00000101ULL }, // Inst #1450 = CWDE |
| 40651 | { 1449, 0, 0, 0, 748, 1, 2, X86ImpOpBase + 172, 1, 0, 0x4c80000081ULL }, // Inst #1449 = CWD |
| 40652 | { 1448, 2, 1, 0, 984, 1, 0, X86ImpOpBase + 78, 1003, 0|(1ULL<<MCID::MayRaiseFPException), 0x1608003029ULL }, // Inst #1448 = CVTTSS2SIrr_Int |
| 40653 | { 1447, 2, 1, 0, 983, 1, 0, X86ImpOpBase + 78, 1025, 0|(1ULL<<MCID::MayRaiseFPException), 0x1608003029ULL }, // Inst #1447 = CVTTSS2SIrr |
| 40654 | { 1446, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1608003019ULL }, // Inst #1446 = CVTTSS2SIrm_Int |
| 40655 | { 1445, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1608003019ULL }, // Inst #1445 = CVTTSS2SIrm |
| 40656 | { 1444, 2, 1, 0, 632, 1, 0, X86ImpOpBase + 78, 999, 0|(1ULL<<MCID::MayRaiseFPException), 0x1608023029ULL }, // Inst #1444 = CVTTSS2SI64rr_Int |
| 40657 | { 1443, 2, 1, 0, 631, 1, 0, X86ImpOpBase + 78, 1023, 0|(1ULL<<MCID::MayRaiseFPException), 0x1608023029ULL }, // Inst #1443 = CVTTSS2SI64rr |
| 40658 | { 1442, 6, 1, 0, 633, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1608023019ULL }, // Inst #1442 = CVTTSS2SI64rm_Int |
| 40659 | { 1441, 6, 1, 0, 633, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1608023019ULL }, // Inst #1441 = CVTTSS2SI64rm |
| 40660 | { 1440, 2, 1, 0, 989, 1, 0, X86ImpOpBase + 78, 1003, 0|(1ULL<<MCID::MayRaiseFPException), 0x1610003829ULL }, // Inst #1440 = CVTTSD2SIrr_Int |
| 40661 | { 1439, 2, 1, 0, 988, 1, 0, X86ImpOpBase + 78, 1001, 0|(1ULL<<MCID::MayRaiseFPException), 0x1610003829ULL }, // Inst #1439 = CVTTSD2SIrr |
| 40662 | { 1438, 6, 1, 0, 1483, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1610003819ULL }, // Inst #1438 = CVTTSD2SIrm_Int |
| 40663 | { 1437, 6, 1, 0, 1483, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1610003819ULL }, // Inst #1437 = CVTTSD2SIrm |
| 40664 | { 1436, 2, 1, 0, 989, 1, 0, X86ImpOpBase + 78, 999, 0|(1ULL<<MCID::MayRaiseFPException), 0x1610023829ULL }, // Inst #1436 = CVTTSD2SI64rr_Int |
| 40665 | { 1435, 2, 1, 0, 988, 1, 0, X86ImpOpBase + 78, 997, 0|(1ULL<<MCID::MayRaiseFPException), 0x1610023829ULL }, // Inst #1435 = CVTTSD2SI64rr |
| 40666 | { 1434, 6, 1, 0, 991, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1610023819ULL }, // Inst #1434 = CVTTSD2SI64rm_Int |
| 40667 | { 1433, 6, 1, 0, 991, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1610023819ULL }, // Inst #1433 = CVTTSD2SI64rm |
| 40668 | { 1432, 2, 1, 0, 1010, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d80003029ULL }, // Inst #1432 = CVTTPS2DQrr |
| 40669 | { 1431, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d80003019ULL }, // Inst #1431 = CVTTPS2DQrm |
| 40670 | { 1430, 2, 1, 0, 977, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x7310002829ULL }, // Inst #1430 = CVTTPD2DQrr |
| 40671 | { 1429, 6, 1, 0, 1375, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7310002819ULL }, // Inst #1429 = CVTTPD2DQrm |
| 40672 | { 1428, 2, 1, 0, 984, 1, 0, X86ImpOpBase + 78, 1003, 0|(1ULL<<MCID::MayRaiseFPException), 0x1688003029ULL }, // Inst #1428 = CVTSS2SIrr_Int |
| 40673 | { 1427, 2, 1, 0, 983, 1, 0, X86ImpOpBase + 78, 1025, 0|(1ULL<<MCID::MayRaiseFPException), 0x1688003029ULL }, // Inst #1427 = CVTSS2SIrr |
| 40674 | { 1426, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1688003019ULL }, // Inst #1426 = CVTSS2SIrm_Int |
| 40675 | { 1425, 6, 1, 0, 985, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1688003019ULL }, // Inst #1425 = CVTSS2SIrm |
| 40676 | { 1424, 2, 1, 0, 632, 1, 0, X86ImpOpBase + 78, 999, 0|(1ULL<<MCID::MayRaiseFPException), 0x1688023029ULL }, // Inst #1424 = CVTSS2SI64rr_Int |
| 40677 | { 1423, 2, 1, 0, 631, 1, 0, X86ImpOpBase + 78, 1023, 0|(1ULL<<MCID::MayRaiseFPException), 0x1688023029ULL }, // Inst #1423 = CVTSS2SI64rr |
| 40678 | { 1422, 6, 1, 0, 633, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1688023019ULL }, // Inst #1422 = CVTSS2SI64rm_Int |
| 40679 | { 1421, 6, 1, 0, 633, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1688023019ULL }, // Inst #1421 = CVTSS2SI64rm |
| 40680 | { 1420, 3, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d08003029ULL }, // Inst #1420 = CVTSS2SDrr_Int |
| 40681 | { 1419, 2, 1, 0, 1268, 1, 0, X86ImpOpBase + 78, 1021, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d08003029ULL }, // Inst #1419 = CVTSS2SDrr |
| 40682 | { 1418, 7, 1, 0, 1357, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d08003019ULL }, // Inst #1418 = CVTSS2SDrm_Int |
| 40683 | { 1417, 6, 1, 0, 1357, 1, 0, X86ImpOpBase + 78, 972, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d08003019ULL }, // Inst #1417 = CVTSS2SDrm |
| 40684 | { 1416, 3, 1, 0, 628, 1, 0, X86ImpOpBase + 78, 1016, 0|(1ULL<<MCID::MayRaiseFPException), 0x1508023029ULL }, // Inst #1416 = CVTSI642SSrr_Int |
| 40685 | { 1415, 2, 1, 0, 627, 1, 0, X86ImpOpBase + 78, 1019, 0|(1ULL<<MCID::MayRaiseFPException), 0x1508023029ULL }, // Inst #1415 = CVTSI642SSrr |
| 40686 | { 1414, 7, 1, 0, 630, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1508023019ULL }, // Inst #1414 = CVTSI642SSrm_Int |
| 40687 | { 1413, 6, 1, 0, 629, 1, 0, X86ImpOpBase + 78, 980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1508023019ULL }, // Inst #1413 = CVTSI642SSrm |
| 40688 | { 1412, 3, 1, 0, 987, 1, 0, X86ImpOpBase + 78, 1016, 0|(1ULL<<MCID::MayRaiseFPException), 0x1510023829ULL }, // Inst #1412 = CVTSI642SDrr_Int |
| 40689 | { 1411, 2, 1, 0, 986, 1, 0, X86ImpOpBase + 78, 1014, 0|(1ULL<<MCID::MayRaiseFPException), 0x1510023829ULL }, // Inst #1411 = CVTSI642SDrr |
| 40690 | { 1410, 7, 1, 0, 626, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1510023819ULL }, // Inst #1410 = CVTSI642SDrm_Int |
| 40691 | { 1409, 6, 1, 0, 625, 1, 0, X86ImpOpBase + 78, 972, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1510023819ULL }, // Inst #1409 = CVTSI642SDrm |
| 40692 | { 1408, 3, 1, 0, 1704, 1, 0, X86ImpOpBase + 78, 1009, 0|(1ULL<<MCID::MayRaiseFPException), 0x1508003029ULL }, // Inst #1408 = CVTSI2SSrr_Int |
| 40693 | { 1407, 2, 1, 0, 1179, 1, 0, X86ImpOpBase + 78, 1012, 0|(1ULL<<MCID::MayRaiseFPException), 0x1508003029ULL }, // Inst #1407 = CVTSI2SSrr |
| 40694 | { 1406, 7, 1, 0, 112, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1508003019ULL }, // Inst #1406 = CVTSI2SSrm_Int |
| 40695 | { 1405, 6, 1, 0, 111, 1, 0, X86ImpOpBase + 78, 980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1508003019ULL }, // Inst #1405 = CVTSI2SSrm |
| 40696 | { 1404, 3, 1, 0, 987, 0, 0, X86ImpOpBase + 0, 1009, 0, 0x1510003829ULL }, // Inst #1404 = CVTSI2SDrr_Int |
| 40697 | { 1403, 2, 1, 0, 986, 0, 0, X86ImpOpBase + 0, 1007, 0, 0x1510003829ULL }, // Inst #1403 = CVTSI2SDrr |
| 40698 | { 1402, 7, 1, 0, 108, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x1510003819ULL }, // Inst #1402 = CVTSI2SDrm_Int |
| 40699 | { 1401, 6, 1, 0, 107, 0, 0, X86ImpOpBase + 0, 972, 0|(1ULL<<MCID::MayLoad), 0x1510003819ULL }, // Inst #1401 = CVTSI2SDrm |
| 40700 | { 1400, 3, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d08003829ULL }, // Inst #1400 = CVTSD2SSrr_Int |
| 40701 | { 1399, 2, 1, 0, 106, 1, 0, X86ImpOpBase + 78, 1005, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d08003829ULL }, // Inst #1399 = CVTSD2SSrr |
| 40702 | { 1398, 7, 1, 0, 105, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d08003819ULL }, // Inst #1398 = CVTSD2SSrm_Int |
| 40703 | { 1397, 6, 1, 0, 105, 1, 0, X86ImpOpBase + 78, 980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d08003819ULL }, // Inst #1397 = CVTSD2SSrm |
| 40704 | { 1396, 2, 1, 0, 989, 1, 0, X86ImpOpBase + 78, 1003, 0|(1ULL<<MCID::MayRaiseFPException), 0x1690003829ULL }, // Inst #1396 = CVTSD2SIrr_Int |
| 40705 | { 1395, 2, 1, 0, 988, 1, 0, X86ImpOpBase + 78, 1001, 0|(1ULL<<MCID::MayRaiseFPException), 0x1690003829ULL }, // Inst #1395 = CVTSD2SIrr |
| 40706 | { 1394, 6, 1, 0, 1483, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1690003819ULL }, // Inst #1394 = CVTSD2SIrm_Int |
| 40707 | { 1393, 6, 1, 0, 1483, 1, 0, X86ImpOpBase + 78, 236, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1690003819ULL }, // Inst #1393 = CVTSD2SIrm |
| 40708 | { 1392, 2, 1, 0, 989, 1, 0, X86ImpOpBase + 78, 999, 0|(1ULL<<MCID::MayRaiseFPException), 0x1690023829ULL }, // Inst #1392 = CVTSD2SI64rr_Int |
| 40709 | { 1391, 2, 1, 0, 988, 1, 0, X86ImpOpBase + 78, 997, 0|(1ULL<<MCID::MayRaiseFPException), 0x1690023829ULL }, // Inst #1391 = CVTSD2SI64rr |
| 40710 | { 1390, 6, 1, 0, 991, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1690023819ULL }, // Inst #1390 = CVTSD2SI64rm_Int |
| 40711 | { 1389, 6, 1, 0, 991, 1, 0, X86ImpOpBase + 78, 242, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1690023819ULL }, // Inst #1389 = CVTSD2SI64rm |
| 40712 | { 1388, 2, 1, 0, 1263, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d00002029ULL }, // Inst #1388 = CVTPS2PDrr |
| 40713 | { 1387, 6, 1, 0, 1340, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d00002019ULL }, // Inst #1387 = CVTPS2PDrm |
| 40714 | { 1386, 2, 1, 0, 1010, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d90002829ULL }, // Inst #1386 = CVTPS2DQrr |
| 40715 | { 1385, 6, 1, 0, 1355, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d90002819ULL }, // Inst #1385 = CVTPS2DQrm |
| 40716 | { 1384, 2, 1, 0, 97, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d10002829ULL }, // Inst #1384 = CVTPD2PSrr |
| 40717 | { 1383, 6, 1, 0, 96, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d10002819ULL }, // Inst #1383 = CVTPD2PSrm |
| 40718 | { 1382, 2, 1, 0, 977, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x7300003829ULL }, // Inst #1382 = CVTPD2DQrr |
| 40719 | { 1381, 6, 1, 0, 1375, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x7300003819ULL }, // Inst #1381 = CVTPD2DQrm |
| 40720 | { 1380, 2, 1, 0, 1008, 1, 0, X86ImpOpBase + 78, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x2d88002029ULL }, // Inst #1380 = CVTDQ2PSrr |
| 40721 | { 1379, 6, 1, 0, 1352, 1, 0, X86ImpOpBase + 78, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2d88002019ULL }, // Inst #1379 = CVTDQ2PSrm |
| 40722 | { 1378, 2, 1, 0, 975, 0, 0, X86ImpOpBase + 0, 535, 0, 0x7300003029ULL }, // Inst #1378 = CVTDQ2PDrr |
| 40723 | { 1377, 6, 1, 0, 1374, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x7300003019ULL }, // Inst #1377 = CVTDQ2PDrm |
| 40724 | { 1376, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 681, 0|(1ULL<<MCID::Commutable), 0x20004260010028ULL }, // Inst #1376 = CTEST8rr |
| 40725 | { 1375, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 669, 0, 0x20007b60050030ULL }, // Inst #1375 = CTEST8ri |
| 40726 | { 1374, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 661, 0|(1ULL<<MCID::MayLoad), 0x20004260010018ULL }, // Inst #1374 = CTEST8mr |
| 40727 | { 1373, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x20007b60050020ULL }, // Inst #1373 = CTEST8mi |
| 40728 | { 1372, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 657, 0|(1ULL<<MCID::Commutable), 0x200042e0030028ULL }, // Inst #1372 = CTEST64rr |
| 40729 | { 1371, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 645, 0, 0x20007be0230030ULL }, // Inst #1371 = CTEST64ri32 |
| 40730 | { 1370, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 637, 0|(1ULL<<MCID::MayLoad), 0x200042e0030018ULL }, // Inst #1370 = CTEST64mr |
| 40731 | { 1369, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x20007be0230020ULL }, // Inst #1369 = CTEST64mi32 |
| 40732 | { 1368, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 633, 0|(1ULL<<MCID::Commutable), 0x200042e0010028ULL }, // Inst #1368 = CTEST32rr |
| 40733 | { 1367, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 621, 0, 0x20007be0190030ULL }, // Inst #1367 = CTEST32ri |
| 40734 | { 1366, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 613, 0|(1ULL<<MCID::MayLoad), 0x200042e0010018ULL }, // Inst #1366 = CTEST32mr |
| 40735 | { 1365, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x20007be0190020ULL }, // Inst #1365 = CTEST32mi |
| 40736 | { 1364, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 609, 0|(1ULL<<MCID::Commutable), 0x200042e0010828ULL }, // Inst #1364 = CTEST16rr |
| 40737 | { 1363, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 597, 0, 0x20007be0110830ULL }, // Inst #1363 = CTEST16ri |
| 40738 | { 1362, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 589, 0|(1ULL<<MCID::MayLoad), 0x200042e0010818ULL }, // Inst #1362 = CTEST16mr |
| 40739 | { 1361, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x20007be0110820ULL }, // Inst #1361 = CTEST16mi |
| 40740 | { 1360, 0, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x170000000aULL }, // Inst #1360 = CS_PREFIX |
| 40741 | { 1359, 3, 1, 0, 89, 0, 0, X86ImpOpBase + 0, 994, 0, 0x7860030029ULL }, // Inst #1359 = CRC32r64r8_EVEX |
| 40742 | { 1358, 3, 1, 0, 89, 0, 0, X86ImpOpBase + 0, 994, 0, 0x7800025829ULL }, // Inst #1358 = CRC32r64r8 |
| 40743 | { 1357, 3, 1, 0, 89, 0, 0, X86ImpOpBase + 0, 167, 0, 0x78e0030029ULL }, // Inst #1357 = CRC32r64r64_EVEX |
| 40744 | { 1356, 3, 1, 0, 1158, 0, 0, X86ImpOpBase + 0, 167, 0, 0x7880025829ULL }, // Inst #1356 = CRC32r64r64 |
| 40745 | { 1355, 7, 1, 0, 88, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x7860030019ULL }, // Inst #1355 = CRC32r64m8_EVEX |
| 40746 | { 1354, 7, 1, 0, 88, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x7800025819ULL }, // Inst #1354 = CRC32r64m8 |
| 40747 | { 1353, 7, 1, 0, 88, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x78e0030019ULL }, // Inst #1353 = CRC32r64m64_EVEX |
| 40748 | { 1352, 7, 1, 0, 88, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x7880025819ULL }, // Inst #1352 = CRC32r64m64 |
| 40749 | { 1351, 3, 1, 0, 89, 0, 0, X86ImpOpBase + 0, 991, 0, 0x7860010029ULL }, // Inst #1351 = CRC32r32r8_EVEX |
| 40750 | { 1350, 3, 1, 0, 89, 0, 0, X86ImpOpBase + 0, 991, 0, 0x7800005829ULL }, // Inst #1350 = CRC32r32r8 |
| 40751 | { 1349, 3, 1, 0, 89, 0, 0, X86ImpOpBase + 0, 161, 0, 0x78e0010029ULL }, // Inst #1349 = CRC32r32r32_EVEX |
| 40752 | { 1348, 3, 1, 0, 1157, 0, 0, X86ImpOpBase + 0, 161, 0, 0x7880005929ULL }, // Inst #1348 = CRC32r32r32 |
| 40753 | { 1347, 3, 1, 0, 89, 0, 0, X86ImpOpBase + 0, 988, 0, 0x78e0010829ULL }, // Inst #1347 = CRC32r32r16_EVEX |
| 40754 | { 1346, 3, 1, 0, 1156, 0, 0, X86ImpOpBase + 0, 988, 0, 0x78800058a9ULL }, // Inst #1346 = CRC32r32r16 |
| 40755 | { 1345, 7, 1, 0, 88, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x7860010019ULL }, // Inst #1345 = CRC32r32m8_EVEX |
| 40756 | { 1344, 7, 1, 0, 88, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x7800005819ULL }, // Inst #1344 = CRC32r32m8 |
| 40757 | { 1343, 7, 1, 0, 88, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x78e0010019ULL }, // Inst #1343 = CRC32r32m32_EVEX |
| 40758 | { 1342, 7, 1, 0, 88, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x7880005919ULL }, // Inst #1342 = CRC32r32m32 |
| 40759 | { 1341, 7, 1, 0, 88, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x78e0010819ULL }, // Inst #1341 = CRC32r32m16_EVEX |
| 40760 | { 1340, 7, 1, 0, 88, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x7880005899ULL }, // Inst #1340 = CRC32r32m16 |
| 40761 | { 1339, 0, 0, 0, 742, 1, 2, X86ImpOpBase + 169, 1, 0, 0x4c80020001ULL }, // Inst #1339 = CQO |
| 40762 | { 1338, 0, 0, 0, 726, 2, 4, X86ImpOpBase + 163, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5100002001ULL }, // Inst #1338 = CPUID |
| 40763 | { 1337, 2, 0, 0, 87, 1, 1, X86ImpOpBase + 79, 312, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1337 = COM_Fpr80 |
| 40764 | { 1336, 2, 0, 0, 87, 1, 1, X86ImpOpBase + 79, 310, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1336 = COM_Fpr64 |
| 40765 | { 1335, 2, 0, 0, 87, 1, 1, X86ImpOpBase + 79, 308, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1335 = COM_Fpr32 |
| 40766 | { 1334, 2, 0, 0, 87, 1, 2, X86ImpOpBase + 160, 312, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1334 = COM_FpIr80 |
| 40767 | { 1333, 2, 0, 0, 87, 1, 2, X86ImpOpBase + 160, 310, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1333 = COM_FpIr64 |
| 40768 | { 1332, 2, 0, 0, 87, 1, 2, X86ImpOpBase + 160, 308, 0|(1ULL<<MCID::MayRaiseFPException), 0x1400000ULL }, // Inst #1332 = COM_FpIr32 |
| 40769 | { 1331, 1, 0, 0, 737, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000032ULL }, // Inst #1331 = COM_FST0r |
| 40770 | { 1330, 1, 0, 0, 756, 2, 2, X86ImpOpBase + 156, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000036ULL }, // Inst #1330 = COM_FIr |
| 40771 | { 1329, 1, 0, 0, 756, 2, 2, X86ImpOpBase + 156, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000036ULL }, // Inst #1329 = COM_FIPr |
| 40772 | { 1328, 1, 0, 0, 737, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000033ULL }, // Inst #1328 = COMP_FST0r |
| 40773 | { 1327, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x1788002029ULL }, // Inst #1327 = COMISSrr_Int |
| 40774 | { 1326, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 986, 0|(1ULL<<MCID::MayRaiseFPException), 0x1788002029ULL }, // Inst #1326 = COMISSrr |
| 40775 | { 1325, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1788002019ULL }, // Inst #1325 = COMISSrm_Int |
| 40776 | { 1324, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 980, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1788002019ULL }, // Inst #1324 = COMISSrm |
| 40777 | { 1323, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 535, 0|(1ULL<<MCID::MayRaiseFPException), 0x1790002829ULL }, // Inst #1323 = COMISDrr_Int |
| 40778 | { 1322, 2, 0, 0, 747, 1, 1, X86ImpOpBase + 154, 978, 0|(1ULL<<MCID::MayRaiseFPException), 0x1790002829ULL }, // Inst #1322 = COMISDrr |
| 40779 | { 1321, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 529, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1790002819ULL }, // Inst #1321 = COMISDrm_Int |
| 40780 | { 1320, 6, 0, 0, 788, 1, 1, X86ImpOpBase + 154, 972, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x1790002819ULL }, // Inst #1320 = COMISDrm |
| 40781 | { 1319, 2, 1, 0, 687, 1, 2, X86ImpOpBase + 75, 925, 0, 0x5800002028ULL }, // Inst #1319 = CMPXCHG8rr |
| 40782 | { 1318, 6, 0, 0, 668, 1, 2, X86ImpOpBase + 75, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5800002018ULL }, // Inst #1318 = CMPXCHG8rm |
| 40783 | { 1317, 5, 0, 0, 694, 4, 3, X86ImpOpBase + 147, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6380002021ULL }, // Inst #1317 = CMPXCHG8B |
| 40784 | { 1316, 2, 1, 0, 1194, 1, 2, X86ImpOpBase + 72, 553, 0, 0x5880022028ULL }, // Inst #1316 = CMPXCHG64rr |
| 40785 | { 1315, 6, 0, 0, 691, 1, 2, X86ImpOpBase + 72, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5880022018ULL }, // Inst #1315 = CMPXCHG64rm |
| 40786 | { 1314, 2, 1, 0, 1194, 1, 2, X86ImpOpBase + 69, 551, 0, 0x5880002128ULL }, // Inst #1314 = CMPXCHG32rr |
| 40787 | { 1313, 6, 0, 0, 691, 1, 2, X86ImpOpBase + 69, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5880002118ULL }, // Inst #1313 = CMPXCHG32rm |
| 40788 | { 1312, 2, 1, 0, 1194, 1, 2, X86ImpOpBase + 46, 547, 0, 0x58800020a8ULL }, // Inst #1312 = CMPXCHG16rr |
| 40789 | { 1311, 6, 0, 0, 691, 1, 2, X86ImpOpBase + 46, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5880002098ULL }, // Inst #1311 = CMPXCHG16rm |
| 40790 | { 1310, 5, 0, 0, 700, 4, 3, X86ImpOpBase + 140, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6380022021ULL }, // Inst #1310 = CMPXCHG16B |
| 40791 | { 1309, 3, 0, 0, 789, 3, 3, X86ImpOpBase + 134, 945, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380000086ULL }, // Inst #1309 = CMPSW |
| 40792 | { 1308, 4, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 563, 0|(1ULL<<MCID::MayRaiseFPException), 0x6108043029ULL }, // Inst #1308 = CMPSSrri_Int |
| 40793 | { 1307, 4, 1, 0, 1117, 1, 0, X86ImpOpBase + 78, 968, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x6108043029ULL }, // Inst #1307 = CMPSSrri |
| 40794 | { 1306, 8, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 555, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6108043019ULL }, // Inst #1306 = CMPSSrmi_Int |
| 40795 | { 1305, 8, 1, 0, 82, 1, 0, X86ImpOpBase + 78, 960, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6108043019ULL }, // Inst #1305 = CMPSSrmi |
| 40796 | { 1304, 3, 0, 0, 789, 3, 3, X86ImpOpBase + 134, 945, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380020006ULL }, // Inst #1304 = CMPSQ |
| 40797 | { 1303, 3, 0, 0, 789, 3, 3, X86ImpOpBase + 134, 945, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380000106ULL }, // Inst #1303 = CMPSL |
| 40798 | { 1302, 4, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 563, 0|(1ULL<<MCID::MayRaiseFPException), 0x6110043829ULL }, // Inst #1302 = CMPSDrri_Int |
| 40799 | { 1301, 4, 1, 0, 1116, 1, 0, X86ImpOpBase + 78, 956, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x6110043829ULL }, // Inst #1301 = CMPSDrri |
| 40800 | { 1300, 8, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 555, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6110043819ULL }, // Inst #1300 = CMPSDrmi_Int |
| 40801 | { 1299, 8, 1, 0, 80, 1, 0, X86ImpOpBase + 78, 948, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6110043819ULL }, // Inst #1299 = CMPSDrmi |
| 40802 | { 1298, 3, 0, 0, 789, 3, 3, X86ImpOpBase + 134, 945, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5300000006ULL }, // Inst #1298 = CMPSB |
| 40803 | { 1297, 4, 1, 0, 1115, 1, 0, X86ImpOpBase + 78, 563, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x6108042029ULL }, // Inst #1297 = CMPPSrri |
| 40804 | { 1296, 8, 1, 0, 78, 1, 0, X86ImpOpBase + 78, 555, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6108042019ULL }, // Inst #1296 = CMPPSrmi |
| 40805 | { 1295, 4, 1, 0, 1114, 1, 0, X86ImpOpBase + 78, 563, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x6110042829ULL }, // Inst #1295 = CMPPDrri |
| 40806 | { 1294, 8, 1, 0, 76, 1, 0, X86ImpOpBase + 78, 555, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6110042819ULL }, // Inst #1294 = CMPPDrmi |
| 40807 | { 1293, 9, 1, 0, 75, 0, 1, X86ImpOpBase + 0, 936, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xf060024814ULL }, // Inst #1293 = CMPCCXADDmr64_EVEX |
| 40808 | { 1292, 9, 1, 0, 75, 0, 1, X86ImpOpBase + 0, 936, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xf020024814ULL }, // Inst #1292 = CMPCCXADDmr64 |
| 40809 | { 1291, 9, 1, 0, 75, 0, 1, X86ImpOpBase + 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xf060004814ULL }, // Inst #1291 = CMPCCXADDmr32_EVEX |
| 40810 | { 1290, 9, 1, 0, 75, 0, 1, X86ImpOpBase + 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xf020004814ULL }, // Inst #1290 = CMPCCXADDmr32 |
| 40811 | { 1289, 2, 0, 0, 1055, 0, 1, X86ImpOpBase + 0, 925, 0|(1ULL<<MCID::Compare), 0x1d00000029ULL }, // Inst #1289 = CMP8rr_REV |
| 40812 | { 1288, 2, 0, 0, 1055, 0, 1, X86ImpOpBase + 0, 925, 0|(1ULL<<MCID::Compare), 0x1c00000028ULL }, // Inst #1288 = CMP8rr |
| 40813 | { 1287, 6, 0, 0, 1445, 0, 1, X86ImpOpBase + 0, 919, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d00000019ULL }, // Inst #1287 = CMP8rm |
| 40814 | { 1286, 2, 0, 0, 1, 0, 1, X86ImpOpBase + 0, 917, 0|(1ULL<<MCID::Compare), 0x4100040037ULL }, // Inst #1286 = CMP8ri8 |
| 40815 | { 1285, 2, 0, 0, 1, 0, 1, X86ImpOpBase + 0, 917, 0|(1ULL<<MCID::Compare), 0x4000040037ULL }, // Inst #1285 = CMP8ri |
| 40816 | { 1284, 6, 0, 0, 1446, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c00000018ULL }, // Inst #1284 = CMP8mr |
| 40817 | { 1283, 6, 0, 0, 1438, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4100040027ULL }, // Inst #1283 = CMP8mi8 |
| 40818 | { 1282, 6, 0, 0, 1438, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4000040027ULL }, // Inst #1282 = CMP8mi |
| 40819 | { 1281, 1, 0, 0, 1, 1, 1, X86ImpOpBase + 132, 1, 0|(1ULL<<MCID::Compare), 0x1e00040001ULL }, // Inst #1281 = CMP8i8 |
| 40820 | { 1280, 2, 0, 0, 1055, 0, 1, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::Compare), 0x1d80020029ULL }, // Inst #1280 = CMP64rr_REV |
| 40821 | { 1279, 2, 0, 0, 1055, 0, 1, X86ImpOpBase + 0, 553, 0|(1ULL<<MCID::Compare), 0x1c80020028ULL }, // Inst #1279 = CMP64rr |
| 40822 | { 1278, 6, 0, 0, 1445, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80020019ULL }, // Inst #1278 = CMP64rm |
| 40823 | { 1277, 2, 0, 0, 1, 0, 1, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::Compare), 0x4180060037ULL }, // Inst #1277 = CMP64ri8 |
| 40824 | { 1276, 2, 0, 0, 1, 0, 1, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::Compare), 0x4080220037ULL }, // Inst #1276 = CMP64ri32 |
| 40825 | { 1275, 6, 0, 0, 1446, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80020018ULL }, // Inst #1275 = CMP64mr |
| 40826 | { 1274, 6, 0, 0, 1438, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4180060027ULL }, // Inst #1274 = CMP64mi8 |
| 40827 | { 1273, 6, 0, 0, 1442, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4080220027ULL }, // Inst #1273 = CMP64mi32 |
| 40828 | { 1272, 1, 0, 0, 1, 1, 1, X86ImpOpBase + 130, 1, 0|(1ULL<<MCID::Compare), 0x1e80220001ULL }, // Inst #1272 = CMP64i32 |
| 40829 | { 1271, 2, 0, 0, 1055, 0, 1, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::Compare), 0x1d80000129ULL }, // Inst #1271 = CMP32rr_REV |
| 40830 | { 1270, 2, 0, 0, 1055, 0, 1, X86ImpOpBase + 0, 551, 0|(1ULL<<MCID::Compare), 0x1c80000128ULL }, // Inst #1270 = CMP32rr |
| 40831 | { 1269, 6, 0, 0, 1445, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80000119ULL }, // Inst #1269 = CMP32rm |
| 40832 | { 1268, 2, 0, 0, 1, 0, 1, X86ImpOpBase + 0, 203, 0|(1ULL<<MCID::Compare), 0x4180040137ULL }, // Inst #1268 = CMP32ri8 |
| 40833 | { 1267, 2, 0, 0, 1, 0, 1, X86ImpOpBase + 0, 203, 0|(1ULL<<MCID::Compare), 0x4080180137ULL }, // Inst #1267 = CMP32ri |
| 40834 | { 1266, 6, 0, 0, 1446, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80000118ULL }, // Inst #1266 = CMP32mr |
| 40835 | { 1265, 6, 0, 0, 1438, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4180040127ULL }, // Inst #1265 = CMP32mi8 |
| 40836 | { 1264, 6, 0, 0, 1438, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4080180127ULL }, // Inst #1264 = CMP32mi |
| 40837 | { 1263, 1, 0, 0, 1, 1, 1, X86ImpOpBase + 128, 1, 0|(1ULL<<MCID::Compare), 0x1e80180101ULL }, // Inst #1263 = CMP32i32 |
| 40838 | { 1262, 2, 0, 0, 1055, 0, 1, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::Compare), 0x1d800000a9ULL }, // Inst #1262 = CMP16rr_REV |
| 40839 | { 1261, 2, 0, 0, 1055, 0, 1, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::Compare), 0x1c800000a8ULL }, // Inst #1261 = CMP16rr |
| 40840 | { 1260, 6, 0, 0, 1445, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80000099ULL }, // Inst #1260 = CMP16rm |
| 40841 | { 1259, 2, 0, 0, 1, 0, 1, X86ImpOpBase + 0, 575, 0|(1ULL<<MCID::Compare), 0x41800400b7ULL }, // Inst #1259 = CMP16ri8 |
| 40842 | { 1258, 2, 0, 0, 1, 0, 1, X86ImpOpBase + 0, 575, 0|(1ULL<<MCID::Compare), 0x40801000b7ULL }, // Inst #1258 = CMP16ri |
| 40843 | { 1257, 6, 0, 0, 1446, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80000098ULL }, // Inst #1257 = CMP16mr |
| 40844 | { 1256, 6, 0, 0, 1438, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x41800400a7ULL }, // Inst #1256 = CMP16mi8 |
| 40845 | { 1255, 6, 0, 0, 1438, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x40801000a7ULL }, // Inst #1255 = CMP16mi |
| 40846 | { 1254, 1, 0, 0, 1, 1, 1, X86ImpOpBase + 126, 1, 0|(1ULL<<MCID::Compare), 0x1e80100081ULL }, // Inst #1254 = CMP16i16 |
| 40847 | { 1253, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 913, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1253 = CMOV_VR64 |
| 40848 | { 1252, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 909, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1252 = CMOV_VR512 |
| 40849 | { 1251, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 905, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1251 = CMOV_VR256X |
| 40850 | { 1250, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 901, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1250 = CMOV_VR256 |
| 40851 | { 1249, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 897, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1249 = CMOV_VR128X |
| 40852 | { 1248, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 893, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1248 = CMOV_VR128 |
| 40853 | { 1247, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 889, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1247 = CMOV_VK8 |
| 40854 | { 1246, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 885, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1246 = CMOV_VK64 |
| 40855 | { 1245, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 881, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1245 = CMOV_VK4 |
| 40856 | { 1244, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 877, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1244 = CMOV_VK32 |
| 40857 | { 1243, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 873, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1243 = CMOV_VK2 |
| 40858 | { 1242, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 869, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1242 = CMOV_VK16 |
| 40859 | { 1241, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 865, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1241 = CMOV_VK1 |
| 40860 | { 1240, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 861, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1240 = CMOV_RFP80 |
| 40861 | { 1239, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 857, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1239 = CMOV_RFP64 |
| 40862 | { 1238, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 853, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1238 = CMOV_RFP32 |
| 40863 | { 1237, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 849, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1237 = CMOV_GR8 |
| 40864 | { 1236, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 845, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1236 = CMOV_GR32 |
| 40865 | { 1235, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 841, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1235 = CMOV_GR16 |
| 40866 | { 1234, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 837, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1234 = CMOV_FR64X |
| 40867 | { 1233, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 833, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1233 = CMOV_FR64 |
| 40868 | { 1232, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 829, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1232 = CMOV_FR32X |
| 40869 | { 1231, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 825, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1231 = CMOV_FR32 |
| 40870 | { 1230, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 821, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1230 = CMOV_FR16X |
| 40871 | { 1229, 4, 1, 0, 0, 1, 0, X86ImpOpBase + 0, 817, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #1229 = CMOV_FR16 |
| 40872 | { 1228, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 814, 0, 0x1800000ULL }, // Inst #1228 = CMOVP_Fp80 |
| 40873 | { 1227, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 811, 0, 0x1800000ULL }, // Inst #1227 = CMOVP_Fp64 |
| 40874 | { 1226, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 808, 0, 0x1800000ULL }, // Inst #1226 = CMOVP_Fp32 |
| 40875 | { 1225, 1, 0, 0, 73, 0, 1, X86ImpOpBase + 52, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000033ULL }, // Inst #1225 = CMOVP_F |
| 40876 | { 1224, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 814, 0, 0x1800000ULL }, // Inst #1224 = CMOVNP_Fp80 |
| 40877 | { 1223, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 811, 0, 0x1800000ULL }, // Inst #1223 = CMOVNP_Fp64 |
| 40878 | { 1222, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 808, 0, 0x1800000ULL }, // Inst #1222 = CMOVNP_Fp32 |
| 40879 | { 1221, 1, 0, 0, 73, 0, 1, X86ImpOpBase + 52, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000033ULL }, // Inst #1221 = CMOVNP_F |
| 40880 | { 1220, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 814, 0, 0x1800000ULL }, // Inst #1220 = CMOVNE_Fp80 |
| 40881 | { 1219, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 811, 0, 0x1800000ULL }, // Inst #1219 = CMOVNE_Fp64 |
| 40882 | { 1218, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 808, 0, 0x1800000ULL }, // Inst #1218 = CMOVNE_Fp32 |
| 40883 | { 1217, 1, 0, 0, 73, 0, 1, X86ImpOpBase + 52, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000031ULL }, // Inst #1217 = CMOVNE_F |
| 40884 | { 1216, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 814, 0, 0x1800000ULL }, // Inst #1216 = CMOVNB_Fp80 |
| 40885 | { 1215, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 811, 0, 0x1800000ULL }, // Inst #1215 = CMOVNB_Fp64 |
| 40886 | { 1214, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 808, 0, 0x1800000ULL }, // Inst #1214 = CMOVNB_Fp32 |
| 40887 | { 1213, 1, 0, 0, 73, 0, 1, X86ImpOpBase + 52, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000030ULL }, // Inst #1213 = CMOVNB_F |
| 40888 | { 1212, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 814, 0, 0x1800000ULL }, // Inst #1212 = CMOVNBE_Fp80 |
| 40889 | { 1211, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 811, 0, 0x1800000ULL }, // Inst #1211 = CMOVNBE_Fp64 |
| 40890 | { 1210, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 808, 0, 0x1800000ULL }, // Inst #1210 = CMOVNBE_Fp32 |
| 40891 | { 1209, 1, 0, 0, 73, 0, 1, X86ImpOpBase + 52, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000032ULL }, // Inst #1209 = CMOVNBE_F |
| 40892 | { 1208, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 814, 0, 0x1800000ULL }, // Inst #1208 = CMOVE_Fp80 |
| 40893 | { 1207, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 811, 0, 0x1800000ULL }, // Inst #1207 = CMOVE_Fp64 |
| 40894 | { 1206, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 808, 0, 0x1800000ULL }, // Inst #1206 = CMOVE_Fp32 |
| 40895 | { 1205, 1, 0, 0, 73, 0, 1, X86ImpOpBase + 52, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000031ULL }, // Inst #1205 = CMOVE_F |
| 40896 | { 1204, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 814, 0, 0x1800000ULL }, // Inst #1204 = CMOVB_Fp80 |
| 40897 | { 1203, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 811, 0, 0x1800000ULL }, // Inst #1203 = CMOVB_Fp64 |
| 40898 | { 1202, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 808, 0, 0x1800000ULL }, // Inst #1202 = CMOVB_Fp32 |
| 40899 | { 1201, 1, 0, 0, 73, 0, 1, X86ImpOpBase + 52, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000030ULL }, // Inst #1201 = CMOVB_F |
| 40900 | { 1200, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 814, 0, 0x1800000ULL }, // Inst #1200 = CMOVBE_Fp80 |
| 40901 | { 1199, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 811, 0, 0x1800000ULL }, // Inst #1199 = CMOVBE_Fp64 |
| 40902 | { 1198, 3, 1, 0, 73, 1, 1, X86ImpOpBase + 124, 808, 0, 0x1800000ULL }, // Inst #1198 = CMOVBE_Fp32 |
| 40903 | { 1197, 1, 0, 0, 73, 0, 1, X86ImpOpBase + 52, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000032ULL }, // Inst #1197 = CMOVBE_F |
| 40904 | { 1196, 4, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 768, 0|(1ULL<<MCID::Commutable), 0x10a06003002cULL }, // Inst #1196 = CMOV64rr_ND |
| 40905 | { 1195, 4, 1, 0, 816, 1, 0, X86ImpOpBase + 0, 804, 0|(1ULL<<MCID::Commutable), 0x200002202cULL }, // Inst #1195 = CMOV64rr |
| 40906 | { 1194, 8, 1, 0, 70, 1, 0, X86ImpOpBase + 0, 757, 0|(1ULL<<MCID::MayLoad), 0x10a06003001cULL }, // Inst #1194 = CMOV64rm_ND |
| 40907 | { 1193, 8, 1, 0, 817, 1, 0, X86ImpOpBase + 0, 796, 0|(1ULL<<MCID::MayLoad), 0x200002201cULL }, // Inst #1193 = CMOV64rm |
| 40908 | { 1192, 4, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 739, 0|(1ULL<<MCID::Commutable), 0x10a06001002cULL }, // Inst #1192 = CMOV32rr_ND |
| 40909 | { 1191, 4, 1, 0, 816, 1, 0, X86ImpOpBase + 0, 792, 0|(1ULL<<MCID::Commutable), 0x200000212cULL }, // Inst #1191 = CMOV32rr |
| 40910 | { 1190, 8, 1, 0, 70, 1, 0, X86ImpOpBase + 0, 728, 0|(1ULL<<MCID::MayLoad), 0x10a06001001cULL }, // Inst #1190 = CMOV32rm_ND |
| 40911 | { 1189, 8, 1, 0, 817, 1, 0, X86ImpOpBase + 0, 784, 0|(1ULL<<MCID::MayLoad), 0x200000211cULL }, // Inst #1189 = CMOV32rm |
| 40912 | { 1188, 4, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 710, 0|(1ULL<<MCID::Commutable), 0x10a06001082cULL }, // Inst #1188 = CMOV16rr_ND |
| 40913 | { 1187, 4, 1, 0, 816, 1, 0, X86ImpOpBase + 0, 780, 0|(1ULL<<MCID::Commutable), 0x20000020acULL }, // Inst #1187 = CMOV16rr |
| 40914 | { 1186, 8, 1, 0, 70, 1, 0, X86ImpOpBase + 0, 699, 0|(1ULL<<MCID::MayLoad), 0x10a06001081cULL }, // Inst #1186 = CMOV16rm_ND |
| 40915 | { 1185, 8, 1, 0, 817, 1, 0, X86ImpOpBase + 0, 772, 0|(1ULL<<MCID::MayLoad), 0x200000209cULL }, // Inst #1185 = CMOV16rm |
| 40916 | { 1184, 0, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7a80000001ULL }, // Inst #1184 = CMC |
| 40917 | { 1183, 0, 0, 0, 72, 1, 0, X86ImpOpBase + 123, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207cULL }, // Inst #1183 = CLZERO64r |
| 40918 | { 1182, 0, 0, 0, 72, 1, 0, X86ImpOpBase + 41, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000207cULL }, // Inst #1182 = CLZERO32r |
| 40919 | { 1181, 5, 0, 0, 1482, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002826ULL }, // Inst #1181 = CLWB |
| 40920 | { 1180, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8000306eULL }, // Inst #1180 = CLUI |
| 40921 | { 1179, 0, 0, 0, 1480, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300002001ULL }, // Inst #1179 = CLTS |
| 40922 | { 1178, 5, 0, 0, 8, 0, 1, X86ImpOpBase + 122, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700003026ULL }, // Inst #1178 = CLRSSBSY |
| 40923 | { 1177, 0, 0, 0, 760, 1, 1, X86ImpOpBase + 31, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d00000001ULL }, // Inst #1177 = CLI |
| 40924 | { 1176, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000205dULL }, // Inst #1176 = CLGI |
| 40925 | { 1175, 5, 0, 0, 769, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002827ULL }, // Inst #1175 = CLFLUSHOPT |
| 40926 | { 1174, 5, 0, 0, 1479, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700002027ULL }, // Inst #1174 = CLFLUSH |
| 40927 | { 1173, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::EHScopeReturn)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1173 = CLEANUPRET |
| 40928 | { 1172, 5, 0, 0, 871, 0, 0, X86ImpOpBase + 0, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0xe00002020ULL }, // Inst #1172 = CLDEMOTE |
| 40929 | { 1171, 0, 0, 0, 649, 0, 1, X86ImpOpBase + 121, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7e00000001ULL }, // Inst #1171 = CLD |
| 40930 | { 1170, 0, 0, 0, 808, 1, 1, X86ImpOpBase + 31, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00000001ULL }, // Inst #1170 = CLC |
| 40931 | { 1169, 0, 0, 0, 1202, 0, 1, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000204aULL }, // Inst #1169 = CLAC |
| 40932 | { 1168, 2, 1, 0, 945, 0, 1, X86ImpOpBase + 52, 312, 0, 0xc00000ULL }, // Inst #1168 = CHS_Fp80 |
| 40933 | { 1167, 2, 1, 0, 945, 0, 1, X86ImpOpBase + 52, 310, 0, 0xc00000ULL }, // Inst #1167 = CHS_Fp64 |
| 40934 | { 1166, 2, 1, 0, 945, 0, 1, X86ImpOpBase + 52, 308, 0, 0xc00000ULL }, // Inst #1166 = CHS_Fp32 |
| 40935 | { 1165, 0, 0, 0, 945, 0, 1, X86ImpOpBase + 52, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000060ULL }, // Inst #1165 = CHS_F |
| 40936 | { 1164, 3, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 765, 0|(1ULL<<MCID::Commutable), 0x206003002cULL }, // Inst #1164 = CFCMOV64rr_REV |
| 40937 | { 1163, 4, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 768, 0|(1ULL<<MCID::Commutable), 0x1010a06003002cULL }, // Inst #1163 = CFCMOV64rr_ND |
| 40938 | { 1162, 3, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 765, 0|(1ULL<<MCID::Commutable), 0x10002060030012ULL }, // Inst #1162 = CFCMOV64rr |
| 40939 | { 1161, 8, 1, 0, 70, 1, 0, X86ImpOpBase + 0, 757, 0|(1ULL<<MCID::MayLoad), 0x1010a06003001cULL }, // Inst #1161 = CFCMOV64rm_ND |
| 40940 | { 1160, 7, 1, 0, 70, 1, 0, X86ImpOpBase + 0, 750, 0|(1ULL<<MCID::MayLoad), 0x206003001cULL }, // Inst #1160 = CFCMOV64rm |
| 40941 | { 1159, 7, 0, 0, 69, 1, 0, X86ImpOpBase + 0, 743, 0|(1ULL<<MCID::MayStore), 0x10002060030013ULL }, // Inst #1159 = CFCMOV64mr |
| 40942 | { 1158, 3, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 736, 0|(1ULL<<MCID::Commutable), 0x206001002cULL }, // Inst #1158 = CFCMOV32rr_REV |
| 40943 | { 1157, 4, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 739, 0|(1ULL<<MCID::Commutable), 0x1010a06001002cULL }, // Inst #1157 = CFCMOV32rr_ND |
| 40944 | { 1156, 3, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 736, 0|(1ULL<<MCID::Commutable), 0x10002060010012ULL }, // Inst #1156 = CFCMOV32rr |
| 40945 | { 1155, 8, 1, 0, 70, 1, 0, X86ImpOpBase + 0, 728, 0|(1ULL<<MCID::MayLoad), 0x1010a06001001cULL }, // Inst #1155 = CFCMOV32rm_ND |
| 40946 | { 1154, 7, 1, 0, 70, 1, 0, X86ImpOpBase + 0, 721, 0|(1ULL<<MCID::MayLoad), 0x206001001cULL }, // Inst #1154 = CFCMOV32rm |
| 40947 | { 1153, 7, 0, 0, 69, 1, 0, X86ImpOpBase + 0, 714, 0|(1ULL<<MCID::MayStore), 0x10002060010013ULL }, // Inst #1153 = CFCMOV32mr |
| 40948 | { 1152, 3, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 707, 0|(1ULL<<MCID::Commutable), 0x206001082cULL }, // Inst #1152 = CFCMOV16rr_REV |
| 40949 | { 1151, 4, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 710, 0|(1ULL<<MCID::Commutable), 0x1010a06001082cULL }, // Inst #1151 = CFCMOV16rr_ND |
| 40950 | { 1150, 3, 1, 0, 71, 1, 0, X86ImpOpBase + 0, 707, 0|(1ULL<<MCID::Commutable), 0x10002060010812ULL }, // Inst #1150 = CFCMOV16rr |
| 40951 | { 1149, 8, 1, 0, 70, 1, 0, X86ImpOpBase + 0, 699, 0|(1ULL<<MCID::MayLoad), 0x1010a06001081cULL }, // Inst #1149 = CFCMOV16rm_ND |
| 40952 | { 1148, 7, 1, 0, 70, 1, 0, X86ImpOpBase + 0, 692, 0|(1ULL<<MCID::MayLoad), 0x206001081cULL }, // Inst #1148 = CFCMOV16rm |
| 40953 | { 1147, 7, 0, 0, 69, 1, 0, X86ImpOpBase + 0, 685, 0|(1ULL<<MCID::MayStore), 0x10002060010813ULL }, // Inst #1147 = CFCMOV16mr |
| 40954 | { 1146, 0, 0, 0, 1475, 1, 1, X86ImpOpBase + 119, 1, 0, 0x4c00020001ULL }, // Inst #1146 = CDQE |
| 40955 | { 1145, 0, 0, 0, 742, 1, 2, X86ImpOpBase + 116, 1, 0, 0x4c80000101ULL }, // Inst #1145 = CDQ |
| 40956 | { 1144, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 681, 0, 0x20001d60010029ULL }, // Inst #1144 = CCMP8rr_REV |
| 40957 | { 1143, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 681, 0, 0x20001c60010028ULL }, // Inst #1143 = CCMP8rr |
| 40958 | { 1142, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 673, 0|(1ULL<<MCID::MayLoad), 0x20001d60010019ULL }, // Inst #1142 = CCMP8rm |
| 40959 | { 1141, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 669, 0, 0x20004060050037ULL }, // Inst #1141 = CCMP8ri |
| 40960 | { 1140, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 661, 0|(1ULL<<MCID::MayLoad), 0x20001c60010018ULL }, // Inst #1140 = CCMP8mr |
| 40961 | { 1139, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x20004060050027ULL }, // Inst #1139 = CCMP8mi |
| 40962 | { 1138, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 657, 0, 0x20001de0030029ULL }, // Inst #1138 = CCMP64rr_REV |
| 40963 | { 1137, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 657, 0, 0x20001ce0030028ULL }, // Inst #1137 = CCMP64rr |
| 40964 | { 1136, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 649, 0|(1ULL<<MCID::MayLoad), 0x20001de0030019ULL }, // Inst #1136 = CCMP64rm |
| 40965 | { 1135, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 645, 0, 0x200041e0070037ULL }, // Inst #1135 = CCMP64ri8 |
| 40966 | { 1134, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 645, 0, 0x200040e0230037ULL }, // Inst #1134 = CCMP64ri32 |
| 40967 | { 1133, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 637, 0|(1ULL<<MCID::MayLoad), 0x20001ce0030018ULL }, // Inst #1133 = CCMP64mr |
| 40968 | { 1132, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x200041e0070027ULL }, // Inst #1132 = CCMP64mi8 |
| 40969 | { 1131, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x200040e0230027ULL }, // Inst #1131 = CCMP64mi32 |
| 40970 | { 1130, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 633, 0, 0x20001de0010029ULL }, // Inst #1130 = CCMP32rr_REV |
| 40971 | { 1129, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 633, 0, 0x20001ce0010028ULL }, // Inst #1129 = CCMP32rr |
| 40972 | { 1128, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 625, 0|(1ULL<<MCID::MayLoad), 0x20001de0010019ULL }, // Inst #1128 = CCMP32rm |
| 40973 | { 1127, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 621, 0, 0x200041e0050037ULL }, // Inst #1127 = CCMP32ri8 |
| 40974 | { 1126, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 621, 0, 0x200040e0190037ULL }, // Inst #1126 = CCMP32ri |
| 40975 | { 1125, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 613, 0|(1ULL<<MCID::MayLoad), 0x20001ce0010018ULL }, // Inst #1125 = CCMP32mr |
| 40976 | { 1124, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x200041e0050027ULL }, // Inst #1124 = CCMP32mi8 |
| 40977 | { 1123, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x200040e0190027ULL }, // Inst #1123 = CCMP32mi |
| 40978 | { 1122, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 609, 0, 0x20001de0010829ULL }, // Inst #1122 = CCMP16rr_REV |
| 40979 | { 1121, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 609, 0, 0x20001ce0010828ULL }, // Inst #1121 = CCMP16rr |
| 40980 | { 1120, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 601, 0|(1ULL<<MCID::MayLoad), 0x20001de0010819ULL }, // Inst #1120 = CCMP16rm |
| 40981 | { 1119, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 597, 0, 0x200041e0050837ULL }, // Inst #1119 = CCMP16ri8 |
| 40982 | { 1118, 4, 0, 0, 1, 1, 1, X86ImpOpBase + 31, 597, 0, 0x200040e0110837ULL }, // Inst #1118 = CCMP16ri |
| 40983 | { 1117, 8, 0, 0, 25, 1, 1, X86ImpOpBase + 31, 589, 0|(1ULL<<MCID::MayLoad), 0x20001ce0010818ULL }, // Inst #1117 = CCMP16mr |
| 40984 | { 1116, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x200041e0050827ULL }, // Inst #1116 = CCMP16mi8 |
| 40985 | { 1115, 8, 0, 0, 48, 1, 1, X86ImpOpBase + 31, 581, 0|(1ULL<<MCID::MayLoad), 0x200040e0110827ULL }, // Inst #1115 = CCMP16mi |
| 40986 | { 1114, 0, 0, 0, 660, 1, 1, X86ImpOpBase + 114, 1, 0, 0x4c00000081ULL }, // Inst #1114 = CBW |
| 40987 | { 1113, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 579, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::EHScopeReturn)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #1113 = CATCHRET |
| 40988 | { 1112, 1, 0, 0, 4, 2, 0, X86ImpOpBase + 112, 578, 0|(1ULL<<MCID::Call), 0x74001c0101ULL }, // Inst #1112 = CALLpcrel32 |
| 40989 | { 1111, 1, 0, 0, 4, 2, 0, X86ImpOpBase + 112, 578, 0|(1ULL<<MCID::Call), 0x7400140081ULL }, // Inst #1111 = CALLpcrel16 |
| 40990 | { 1110, 1, 0, 0, 1474, 2, 0, X86ImpOpBase + 1, 202, 0|(1ULL<<MCID::Call), 0x2007f80000032ULL }, // Inst #1110 = CALL64r_NT |
| 40991 | { 1109, 1, 0, 0, 1474, 2, 0, X86ImpOpBase + 1, 202, 0|(1ULL<<MCID::Call), 0x7f80000032ULL }, // Inst #1109 = CALL64r |
| 40992 | { 1108, 1, 0, 0, 763, 2, 0, X86ImpOpBase + 1, 578, 0|(1ULL<<MCID::Call), 0x74001c0101ULL }, // Inst #1108 = CALL64pcrel32 |
| 40993 | { 1107, 5, 0, 0, 1473, 2, 0, X86ImpOpBase + 1, 231, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x2007f80000022ULL }, // Inst #1107 = CALL64m_NT |
| 40994 | { 1106, 5, 0, 0, 1473, 2, 0, X86ImpOpBase + 1, 231, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f80000022ULL }, // Inst #1106 = CALL64m |
| 40995 | { 1105, 1, 0, 0, 934, 2, 0, X86ImpOpBase + 112, 201, 0|(1ULL<<MCID::Call), 0x2007f80000132ULL }, // Inst #1105 = CALL32r_NT |
| 40996 | { 1104, 1, 0, 0, 934, 2, 0, X86ImpOpBase + 112, 201, 0|(1ULL<<MCID::Call), 0x7f80000132ULL }, // Inst #1104 = CALL32r |
| 40997 | { 1103, 5, 0, 0, 787, 2, 0, X86ImpOpBase + 112, 231, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x2007f80000122ULL }, // Inst #1103 = CALL32m_NT |
| 40998 | { 1102, 5, 0, 0, 787, 2, 0, X86ImpOpBase + 112, 231, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f80000122ULL }, // Inst #1102 = CALL32m |
| 40999 | { 1101, 1, 0, 0, 934, 2, 0, X86ImpOpBase + 112, 577, 0|(1ULL<<MCID::Call), 0x2007f800000b2ULL }, // Inst #1101 = CALL16r_NT |
| 41000 | { 1100, 1, 0, 0, 934, 2, 0, X86ImpOpBase + 112, 577, 0|(1ULL<<MCID::Call), 0x7f800000b2ULL }, // Inst #1100 = CALL16r |
| 41001 | { 1099, 5, 0, 0, 787, 2, 0, X86ImpOpBase + 112, 231, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x2007f800000a2ULL }, // Inst #1099 = CALL16m_NT |
| 41002 | { 1098, 5, 0, 0, 787, 2, 0, X86ImpOpBase + 112, 231, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f800000a2ULL }, // Inst #1098 = CALL16m |
| 41003 | { 1097, 3, 1, 0, 68, 0, 0, X86ImpOpBase + 0, 422, 0, 0x10007ae002402aULL }, // Inst #1097 = BZHI64rr_NF |
| 41004 | { 1096, 3, 1, 0, 68, 0, 1, X86ImpOpBase + 0, 422, 0, 0x7ae002402aULL }, // Inst #1096 = BZHI64rr_EVEX |
| 41005 | { 1095, 3, 1, 0, 68, 0, 1, X86ImpOpBase + 0, 422, 0, 0x7aa002402aULL }, // Inst #1095 = BZHI64rr |
| 41006 | { 1094, 7, 1, 0, 67, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x10007ae002401aULL }, // Inst #1094 = BZHI64rm_NF |
| 41007 | { 1093, 7, 1, 0, 67, 0, 1, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x7ae002401aULL }, // Inst #1093 = BZHI64rm_EVEX |
| 41008 | { 1092, 7, 1, 0, 67, 0, 1, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x7aa002401aULL }, // Inst #1092 = BZHI64rm |
| 41009 | { 1091, 3, 1, 0, 68, 0, 0, X86ImpOpBase + 0, 225, 0, 0x10007ae000402aULL }, // Inst #1091 = BZHI32rr_NF |
| 41010 | { 1090, 3, 1, 0, 68, 0, 1, X86ImpOpBase + 0, 225, 0, 0x7ae000402aULL }, // Inst #1090 = BZHI32rr_EVEX |
| 41011 | { 1089, 3, 1, 0, 68, 0, 1, X86ImpOpBase + 0, 225, 0, 0x7aa000402aULL }, // Inst #1089 = BZHI32rr |
| 41012 | { 1088, 7, 1, 0, 67, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x10007ae000401aULL }, // Inst #1088 = BZHI32rm_NF |
| 41013 | { 1087, 7, 1, 0, 67, 0, 1, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x7ae000401aULL }, // Inst #1087 = BZHI32rm_EVEX |
| 41014 | { 1086, 7, 1, 0, 67, 0, 1, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x7aa000401aULL }, // Inst #1086 = BZHI32rm |
| 41015 | { 1085, 3, 1, 0, 1471, 0, 1, X86ImpOpBase + 0, 167, 0, 0x5580022028ULL }, // Inst #1085 = BTS64rr |
| 41016 | { 1084, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 164, 0, 0x5d00062035ULL }, // Inst #1084 = BTS64ri8 |
| 41017 | { 1083, 6, 0, 0, 1472, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580022018ULL }, // Inst #1083 = BTS64mr |
| 41018 | { 1082, 6, 0, 0, 64, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00062025ULL }, // Inst #1082 = BTS64mi8 |
| 41019 | { 1081, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 161, 0, 0x5580002128ULL }, // Inst #1081 = BTS32rr |
| 41020 | { 1080, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 158, 0, 0x5d00042135ULL }, // Inst #1080 = BTS32ri8 |
| 41021 | { 1079, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580002118ULL }, // Inst #1079 = BTS32mr |
| 41022 | { 1078, 6, 0, 0, 64, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00042125ULL }, // Inst #1078 = BTS32mi8 |
| 41023 | { 1077, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 155, 0, 0x55800020a8ULL }, // Inst #1077 = BTS16rr |
| 41024 | { 1076, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 152, 0, 0x5d000420b5ULL }, // Inst #1076 = BTS16ri8 |
| 41025 | { 1075, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580002098ULL }, // Inst #1075 = BTS16mr |
| 41026 | { 1074, 6, 0, 0, 64, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d000420a5ULL }, // Inst #1074 = BTS16mi8 |
| 41027 | { 1073, 3, 1, 0, 1471, 0, 1, X86ImpOpBase + 0, 167, 0, 0x5980022028ULL }, // Inst #1073 = BTR64rr |
| 41028 | { 1072, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 164, 0, 0x5d00062036ULL }, // Inst #1072 = BTR64ri8 |
| 41029 | { 1071, 6, 0, 0, 1472, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980022018ULL }, // Inst #1071 = BTR64mr |
| 41030 | { 1070, 6, 0, 0, 64, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00062026ULL }, // Inst #1070 = BTR64mi8 |
| 41031 | { 1069, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 161, 0, 0x5980002128ULL }, // Inst #1069 = BTR32rr |
| 41032 | { 1068, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 158, 0, 0x5d00042136ULL }, // Inst #1068 = BTR32ri8 |
| 41033 | { 1067, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980002118ULL }, // Inst #1067 = BTR32mr |
| 41034 | { 1066, 6, 0, 0, 64, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00042126ULL }, // Inst #1066 = BTR32mi8 |
| 41035 | { 1065, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 155, 0, 0x59800020a8ULL }, // Inst #1065 = BTR16rr |
| 41036 | { 1064, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 152, 0, 0x5d000420b6ULL }, // Inst #1064 = BTR16ri8 |
| 41037 | { 1063, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980002098ULL }, // Inst #1063 = BTR16mr |
| 41038 | { 1062, 6, 0, 0, 64, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d000420a6ULL }, // Inst #1062 = BTR16mi8 |
| 41039 | { 1061, 3, 1, 0, 1471, 0, 1, X86ImpOpBase + 0, 167, 0, 0x5d80022028ULL }, // Inst #1061 = BTC64rr |
| 41040 | { 1060, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 164, 0, 0x5d00062037ULL }, // Inst #1060 = BTC64ri8 |
| 41041 | { 1059, 6, 0, 0, 1472, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80022018ULL }, // Inst #1059 = BTC64mr |
| 41042 | { 1058, 6, 0, 0, 64, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00062027ULL }, // Inst #1058 = BTC64mi8 |
| 41043 | { 1057, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 161, 0, 0x5d80002128ULL }, // Inst #1057 = BTC32rr |
| 41044 | { 1056, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 158, 0, 0x5d00042137ULL }, // Inst #1056 = BTC32ri8 |
| 41045 | { 1055, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80002118ULL }, // Inst #1055 = BTC32mr |
| 41046 | { 1054, 6, 0, 0, 64, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d00042127ULL }, // Inst #1054 = BTC32mi8 |
| 41047 | { 1053, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 155, 0, 0x5d800020a8ULL }, // Inst #1053 = BTC16rr |
| 41048 | { 1052, 3, 1, 0, 66, 0, 1, X86ImpOpBase + 0, 152, 0, 0x5d000420b7ULL }, // Inst #1052 = BTC16ri8 |
| 41049 | { 1051, 6, 0, 0, 65, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80002098ULL }, // Inst #1051 = BTC16mr |
| 41050 | { 1050, 6, 0, 0, 64, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d000420a7ULL }, // Inst #1050 = BTC16mi8 |
| 41051 | { 1049, 2, 0, 0, 1470, 0, 1, X86ImpOpBase + 0, 553, 0, 0x5180022028ULL }, // Inst #1049 = BT64rr |
| 41052 | { 1048, 2, 0, 0, 63, 0, 1, X86ImpOpBase + 0, 205, 0, 0x5d00062034ULL }, // Inst #1048 = BT64ri8 |
| 41053 | { 1047, 6, 0, 0, 1469, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad), 0x5180022018ULL }, // Inst #1047 = BT64mr |
| 41054 | { 1046, 6, 0, 0, 61, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad), 0x5d00062024ULL }, // Inst #1046 = BT64mi8 |
| 41055 | { 1045, 2, 0, 0, 63, 0, 1, X86ImpOpBase + 0, 551, 0, 0x5180002128ULL }, // Inst #1045 = BT32rr |
| 41056 | { 1044, 2, 0, 0, 63, 0, 1, X86ImpOpBase + 0, 203, 0, 0x5d00042134ULL }, // Inst #1044 = BT32ri8 |
| 41057 | { 1043, 6, 0, 0, 62, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad), 0x5180002118ULL }, // Inst #1043 = BT32mr |
| 41058 | { 1042, 6, 0, 0, 61, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad), 0x5d00042124ULL }, // Inst #1042 = BT32mi8 |
| 41059 | { 1041, 2, 0, 0, 63, 0, 1, X86ImpOpBase + 0, 547, 0, 0x51800020a8ULL }, // Inst #1041 = BT16rr |
| 41060 | { 1040, 2, 0, 0, 63, 0, 1, X86ImpOpBase + 0, 575, 0, 0x5d000420b4ULL }, // Inst #1040 = BT16ri8 |
| 41061 | { 1039, 6, 0, 0, 62, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad), 0x5180002098ULL }, // Inst #1039 = BT16mr |
| 41062 | { 1038, 6, 0, 0, 61, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad), 0x5d000420a4ULL }, // Inst #1038 = BT16mi8 |
| 41063 | { 1037, 2, 1, 0, 60, 0, 0, X86ImpOpBase + 0, 300, 0, 0x6400022002ULL }, // Inst #1037 = BSWAP64r |
| 41064 | { 1036, 2, 1, 0, 59, 0, 0, X86ImpOpBase + 0, 298, 0, 0x6400002102ULL }, // Inst #1036 = BSWAP32r |
| 41065 | { 1035, 2, 1, 0, 59, 0, 0, X86ImpOpBase + 0, 573, 0, 0x6400002082ULL }, // Inst #1035 = BSWAP16r_BAD |
| 41066 | { 1034, 2, 1, 0, 58, 0, 1, X86ImpOpBase + 0, 553, 0, 0x5e80022029ULL }, // Inst #1034 = BSR64rr |
| 41067 | { 1033, 6, 1, 0, 57, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x5e80022019ULL }, // Inst #1033 = BSR64rm |
| 41068 | { 1032, 2, 1, 0, 58, 0, 1, X86ImpOpBase + 0, 551, 0, 0x5e80002129ULL }, // Inst #1032 = BSR32rr |
| 41069 | { 1031, 6, 1, 0, 57, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x5e80002119ULL }, // Inst #1031 = BSR32rm |
| 41070 | { 1030, 2, 1, 0, 58, 0, 1, X86ImpOpBase + 0, 547, 0, 0x5e800020a9ULL }, // Inst #1030 = BSR16rr |
| 41071 | { 1029, 6, 1, 0, 57, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x5e80002099ULL }, // Inst #1029 = BSR16rm |
| 41072 | { 1028, 2, 1, 0, 56, 0, 1, X86ImpOpBase + 0, 553, 0, 0x5e00022029ULL }, // Inst #1028 = BSF64rr |
| 41073 | { 1027, 6, 1, 0, 55, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x5e00022019ULL }, // Inst #1027 = BSF64rm |
| 41074 | { 1026, 2, 1, 0, 56, 0, 1, X86ImpOpBase + 0, 551, 0, 0x5e00002129ULL }, // Inst #1026 = BSF32rr |
| 41075 | { 1025, 6, 1, 0, 55, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x5e00002119ULL }, // Inst #1025 = BSF32rm |
| 41076 | { 1024, 2, 1, 0, 56, 0, 1, X86ImpOpBase + 0, 547, 0, 0x5e000020a9ULL }, // Inst #1024 = BSF16rr |
| 41077 | { 1023, 6, 1, 0, 55, 0, 1, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::MayLoad), 0x5e00002099ULL }, // Inst #1023 = BSF16rm |
| 41078 | { 1022, 6, 1, 0, 689, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3100000119ULL }, // Inst #1022 = BOUNDS32rm |
| 41079 | { 1021, 6, 1, 0, 689, 0, 0, X86ImpOpBase + 0, 567, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3100000099ULL }, // Inst #1021 = BOUNDS16rm |
| 41080 | { 1020, 2, 1, 0, 54, 0, 0, X86ImpOpBase + 0, 553, 0, 0x1000f9e0024031ULL }, // Inst #1020 = BLSR64rr_NF |
| 41081 | { 1019, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 553, 0, 0xf9e0024031ULL }, // Inst #1019 = BLSR64rr_EVEX |
| 41082 | { 1018, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 553, 0, 0xf9a0024031ULL }, // Inst #1018 = BLSR64rr |
| 41083 | { 1017, 6, 1, 0, 53, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0024021ULL }, // Inst #1017 = BLSR64rm_NF |
| 41084 | { 1016, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0xf9e0024021ULL }, // Inst #1016 = BLSR64rm_EVEX |
| 41085 | { 1015, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0xf9a0024021ULL }, // Inst #1015 = BLSR64rm |
| 41086 | { 1014, 2, 1, 0, 54, 0, 0, X86ImpOpBase + 0, 551, 0, 0x1000f9e0004031ULL }, // Inst #1014 = BLSR32rr_NF |
| 41087 | { 1013, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 551, 0, 0xf9e0004031ULL }, // Inst #1013 = BLSR32rr_EVEX |
| 41088 | { 1012, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 551, 0, 0xf9a0004031ULL }, // Inst #1012 = BLSR32rr |
| 41089 | { 1011, 6, 1, 0, 53, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0004021ULL }, // Inst #1011 = BLSR32rm_NF |
| 41090 | { 1010, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0xf9e0004021ULL }, // Inst #1010 = BLSR32rm_EVEX |
| 41091 | { 1009, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0xf9a0004021ULL }, // Inst #1009 = BLSR32rm |
| 41092 | { 1008, 2, 1, 0, 54, 0, 0, X86ImpOpBase + 0, 553, 0, 0x1000f9e0024032ULL }, // Inst #1008 = BLSMSK64rr_NF |
| 41093 | { 1007, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 553, 0, 0xf9e0024032ULL }, // Inst #1007 = BLSMSK64rr_EVEX |
| 41094 | { 1006, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 553, 0, 0xf9a0024032ULL }, // Inst #1006 = BLSMSK64rr |
| 41095 | { 1005, 6, 1, 0, 53, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0024022ULL }, // Inst #1005 = BLSMSK64rm_NF |
| 41096 | { 1004, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0xf9e0024022ULL }, // Inst #1004 = BLSMSK64rm_EVEX |
| 41097 | { 1003, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0xf9a0024022ULL }, // Inst #1003 = BLSMSK64rm |
| 41098 | { 1002, 2, 1, 0, 54, 0, 0, X86ImpOpBase + 0, 551, 0, 0x1000f9e0004032ULL }, // Inst #1002 = BLSMSK32rr_NF |
| 41099 | { 1001, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 551, 0, 0xf9e0004032ULL }, // Inst #1001 = BLSMSK32rr_EVEX |
| 41100 | { 1000, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 551, 0, 0xf9a0004032ULL }, // Inst #1000 = BLSMSK32rr |
| 41101 | { 999, 6, 1, 0, 53, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0004022ULL }, // Inst #999 = BLSMSK32rm_NF |
| 41102 | { 998, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0xf9e0004022ULL }, // Inst #998 = BLSMSK32rm_EVEX |
| 41103 | { 997, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0xf9a0004022ULL }, // Inst #997 = BLSMSK32rm |
| 41104 | { 996, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 553, 0, 0x80c002a036ULL }, // Inst #996 = BLSIC64rr |
| 41105 | { 995, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x80c002a026ULL }, // Inst #995 = BLSIC64rm |
| 41106 | { 994, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 551, 0, 0x80c000a036ULL }, // Inst #994 = BLSIC32rr |
| 41107 | { 993, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x80c000a026ULL }, // Inst #993 = BLSIC32rm |
| 41108 | { 992, 2, 1, 0, 54, 0, 0, X86ImpOpBase + 0, 553, 0, 0x1000f9e0024033ULL }, // Inst #992 = BLSI64rr_NF |
| 41109 | { 991, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 553, 0, 0xf9e0024033ULL }, // Inst #991 = BLSI64rr_EVEX |
| 41110 | { 990, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 553, 0, 0xf9a0024033ULL }, // Inst #990 = BLSI64rr |
| 41111 | { 989, 6, 1, 0, 53, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0024023ULL }, // Inst #989 = BLSI64rm_NF |
| 41112 | { 988, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0xf9e0024023ULL }, // Inst #988 = BLSI64rm_EVEX |
| 41113 | { 987, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0xf9a0024023ULL }, // Inst #987 = BLSI64rm |
| 41114 | { 986, 2, 1, 0, 54, 0, 0, X86ImpOpBase + 0, 551, 0, 0x1000f9e0004033ULL }, // Inst #986 = BLSI32rr_NF |
| 41115 | { 985, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 551, 0, 0xf9e0004033ULL }, // Inst #985 = BLSI32rr_EVEX |
| 41116 | { 984, 2, 1, 0, 54, 0, 1, X86ImpOpBase + 0, 551, 0, 0xf9a0004033ULL }, // Inst #984 = BLSI32rr |
| 41117 | { 983, 6, 1, 0, 53, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x1000f9e0004023ULL }, // Inst #983 = BLSI32rm_NF |
| 41118 | { 982, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0xf9e0004023ULL }, // Inst #982 = BLSI32rm_EVEX |
| 41119 | { 981, 6, 1, 0, 53, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0xf9a0004023ULL }, // Inst #981 = BLSI32rm |
| 41120 | { 980, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 553, 0, 0x80c002a032ULL }, // Inst #980 = BLSFILL64rr |
| 41121 | { 979, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x80c002a022ULL }, // Inst #979 = BLSFILL64rm |
| 41122 | { 978, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 551, 0, 0x80c000a032ULL }, // Inst #978 = BLSFILL32rr |
| 41123 | { 977, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x80c000a022ULL }, // Inst #977 = BLSFILL32rm |
| 41124 | { 976, 3, 1, 0, 52, 1, 0, X86ImpOpBase + 111, 472, 0, 0xa08004829ULL }, // Inst #976 = BLENDVPSrr0 |
| 41125 | { 975, 7, 1, 0, 51, 1, 0, X86ImpOpBase + 111, 465, 0|(1ULL<<MCID::MayLoad), 0xa08004819ULL }, // Inst #975 = BLENDVPSrm0 |
| 41126 | { 974, 3, 1, 0, 52, 1, 0, X86ImpOpBase + 111, 472, 0, 0xa90004829ULL }, // Inst #974 = BLENDVPDrr0 |
| 41127 | { 973, 7, 1, 0, 51, 1, 0, X86ImpOpBase + 111, 465, 0|(1ULL<<MCID::MayLoad), 0xa90004819ULL }, // Inst #973 = BLENDVPDrm0 |
| 41128 | { 972, 4, 1, 0, 50, 0, 0, X86ImpOpBase + 0, 563, 0|(1ULL<<MCID::Commutable), 0x608046829ULL }, // Inst #972 = BLENDPSrri |
| 41129 | { 971, 8, 1, 0, 49, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x608046819ULL }, // Inst #971 = BLENDPSrmi |
| 41130 | { 970, 4, 1, 0, 50, 0, 0, X86ImpOpBase + 0, 563, 0|(1ULL<<MCID::Commutable), 0x690046829ULL }, // Inst #970 = BLENDPDrri |
| 41131 | { 969, 8, 1, 0, 49, 0, 0, X86ImpOpBase + 0, 555, 0|(1ULL<<MCID::MayLoad), 0x690046819ULL }, // Inst #969 = BLENDPDrmi |
| 41132 | { 968, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 553, 0, 0x80c002a033ULL }, // Inst #968 = BLCS64rr |
| 41133 | { 967, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x80c002a023ULL }, // Inst #967 = BLCS64rm |
| 41134 | { 966, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 551, 0, 0x80c000a033ULL }, // Inst #966 = BLCS32rr |
| 41135 | { 965, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x80c000a023ULL }, // Inst #965 = BLCS32rm |
| 41136 | { 964, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 553, 0, 0x814002a031ULL }, // Inst #964 = BLCMSK64rr |
| 41137 | { 963, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x814002a021ULL }, // Inst #963 = BLCMSK64rm |
| 41138 | { 962, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 551, 0, 0x814000a031ULL }, // Inst #962 = BLCMSK32rr |
| 41139 | { 961, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x814000a021ULL }, // Inst #961 = BLCMSK32rm |
| 41140 | { 960, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 553, 0, 0x80c002a035ULL }, // Inst #960 = BLCIC64rr |
| 41141 | { 959, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x80c002a025ULL }, // Inst #959 = BLCIC64rm |
| 41142 | { 958, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 551, 0, 0x80c000a035ULL }, // Inst #958 = BLCIC32rr |
| 41143 | { 957, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x80c000a025ULL }, // Inst #957 = BLCIC32rm |
| 41144 | { 956, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 553, 0, 0x814002a036ULL }, // Inst #956 = BLCI64rr |
| 41145 | { 955, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x814002a026ULL }, // Inst #955 = BLCI64rm |
| 41146 | { 954, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 551, 0, 0x814000a036ULL }, // Inst #954 = BLCI32rr |
| 41147 | { 953, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x814000a026ULL }, // Inst #953 = BLCI32rm |
| 41148 | { 952, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 553, 0, 0x80c002a031ULL }, // Inst #952 = BLCFILL64rr |
| 41149 | { 951, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::MayLoad), 0x80c002a021ULL }, // Inst #951 = BLCFILL64rm |
| 41150 | { 950, 2, 1, 0, 1153, 0, 1, X86ImpOpBase + 0, 551, 0, 0x80c000a031ULL }, // Inst #950 = BLCFILL32rr |
| 41151 | { 949, 6, 1, 0, 1154, 0, 1, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::MayLoad), 0x80c000a021ULL }, // Inst #949 = BLCFILL32rm |
| 41152 | { 948, 3, 1, 0, 1160, 0, 1, X86ImpOpBase + 0, 405, 0, 0x84022c029ULL }, // Inst #948 = BEXTRI64ri |
| 41153 | { 947, 7, 1, 0, 1161, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x84022c019ULL }, // Inst #947 = BEXTRI64mi |
| 41154 | { 946, 3, 1, 0, 1160, 0, 1, X86ImpOpBase + 0, 374, 0, 0x84018c029ULL }, // Inst #946 = BEXTRI32ri |
| 41155 | { 945, 7, 1, 0, 1161, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x84018c019ULL }, // Inst #945 = BEXTRI32mi |
| 41156 | { 944, 3, 1, 0, 46, 0, 0, X86ImpOpBase + 0, 422, 0, 0x10007be002402aULL }, // Inst #944 = BEXTR64rr_NF |
| 41157 | { 943, 3, 1, 0, 46, 0, 1, X86ImpOpBase + 0, 422, 0, 0x7be002402aULL }, // Inst #943 = BEXTR64rr_EVEX |
| 41158 | { 942, 3, 1, 0, 46, 0, 1, X86ImpOpBase + 0, 422, 0, 0x7ba002402aULL }, // Inst #942 = BEXTR64rr |
| 41159 | { 941, 7, 1, 0, 45, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x10007be002401aULL }, // Inst #941 = BEXTR64rm_NF |
| 41160 | { 940, 7, 1, 0, 45, 0, 1, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x7be002401aULL }, // Inst #940 = BEXTR64rm_EVEX |
| 41161 | { 939, 7, 1, 0, 45, 0, 1, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x7ba002401aULL }, // Inst #939 = BEXTR64rm |
| 41162 | { 938, 3, 1, 0, 46, 0, 0, X86ImpOpBase + 0, 225, 0, 0x10007be000402aULL }, // Inst #938 = BEXTR32rr_NF |
| 41163 | { 937, 3, 1, 0, 46, 0, 1, X86ImpOpBase + 0, 225, 0, 0x7be000402aULL }, // Inst #937 = BEXTR32rr_EVEX |
| 41164 | { 936, 3, 1, 0, 46, 0, 1, X86ImpOpBase + 0, 225, 0, 0x7ba000402aULL }, // Inst #936 = BEXTR32rr |
| 41165 | { 935, 7, 1, 0, 45, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x10007be000401aULL }, // Inst #935 = BEXTR32rm_NF |
| 41166 | { 934, 7, 1, 0, 45, 0, 1, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x7be000401aULL }, // Inst #934 = BEXTR32rm_EVEX |
| 41167 | { 933, 7, 1, 0, 45, 0, 1, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x7ba000401aULL }, // Inst #933 = BEXTR32rm |
| 41168 | { 932, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60031018ULL }, // Inst #932 = AXOR64mr_EVEX |
| 41169 | { 931, 6, 0, 0, 1432, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00025018ULL }, // Inst #931 = AXOR64mr |
| 41170 | { 930, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60011018ULL }, // Inst #930 = AXOR32mr_EVEX |
| 41171 | { 929, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00005018ULL }, // Inst #929 = AXOR32mr |
| 41172 | { 928, 2, 0, 0, 0, 0, 3, X86ImpOpBase + 108, 549, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #928 = ASAN_CHECK_MEMACCESS |
| 41173 | { 927, 2, 1, 0, 701, 0, 0, X86ImpOpBase + 0, 547, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3180000028ULL }, // Inst #927 = ARPL16rr |
| 41174 | { 926, 6, 0, 0, 701, 0, 0, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3180000018ULL }, // Inst #926 = ARPL16mr |
| 41175 | { 925, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60031818ULL }, // Inst #925 = AOR64mr_EVEX |
| 41176 | { 924, 6, 0, 0, 1432, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00025818ULL }, // Inst #924 = AOR64mr |
| 41177 | { 923, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60011818ULL }, // Inst #923 = AOR32mr_EVEX |
| 41178 | { 922, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00005818ULL }, // Inst #922 = AOR32mr |
| 41179 | { 921, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x2a08002029ULL }, // Inst #921 = ANDPSrr |
| 41180 | { 920, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2a08002019ULL }, // Inst #920 = ANDPSrm |
| 41181 | { 919, 3, 1, 0, 44, 0, 0, X86ImpOpBase + 0, 472, 0|(1ULL<<MCID::Commutable), 0x2a10002829ULL }, // Inst #919 = ANDPDrr |
| 41182 | { 918, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2a10002819ULL }, // Inst #918 = ANDPDrm |
| 41183 | { 917, 3, 1, 0, 1189, 0, 0, X86ImpOpBase + 0, 472, 0, 0x2a88002029ULL }, // Inst #917 = ANDNPSrr |
| 41184 | { 916, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2a88002019ULL }, // Inst #916 = ANDNPSrm |
| 41185 | { 915, 3, 1, 0, 1189, 0, 0, X86ImpOpBase + 0, 472, 0, 0x2a90002829ULL }, // Inst #915 = ANDNPDrr |
| 41186 | { 914, 7, 1, 0, 43, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x2a90002819ULL }, // Inst #914 = ANDNPDrm |
| 41187 | { 913, 3, 1, 0, 842, 0, 0, X86ImpOpBase + 0, 422, 0, 0x1000f960024029ULL }, // Inst #913 = ANDN64rr_NF |
| 41188 | { 912, 3, 1, 0, 842, 0, 1, X86ImpOpBase + 0, 422, 0, 0xf960024029ULL }, // Inst #912 = ANDN64rr_EVEX |
| 41189 | { 911, 3, 1, 0, 1468, 0, 1, X86ImpOpBase + 0, 422, 0, 0xf920024029ULL }, // Inst #911 = ANDN64rr |
| 41190 | { 910, 7, 1, 0, 852, 0, 0, X86ImpOpBase + 0, 415, 0, 0x1000f960024019ULL }, // Inst #910 = ANDN64rm_NF |
| 41191 | { 909, 7, 1, 0, 852, 0, 1, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0xf960024019ULL }, // Inst #909 = ANDN64rm_EVEX |
| 41192 | { 908, 7, 1, 0, 1467, 0, 1, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0xf920024019ULL }, // Inst #908 = ANDN64rm |
| 41193 | { 907, 3, 1, 0, 842, 0, 0, X86ImpOpBase + 0, 225, 0, 0x1000f960004029ULL }, // Inst #907 = ANDN32rr_NF |
| 41194 | { 906, 3, 1, 0, 842, 0, 1, X86ImpOpBase + 0, 225, 0, 0xf960004029ULL }, // Inst #906 = ANDN32rr_EVEX |
| 41195 | { 905, 3, 1, 0, 1468, 0, 1, X86ImpOpBase + 0, 225, 0, 0xf920004029ULL }, // Inst #905 = ANDN32rr |
| 41196 | { 904, 7, 1, 0, 852, 0, 0, X86ImpOpBase + 0, 384, 0, 0x1000f960004019ULL }, // Inst #904 = ANDN32rm_NF |
| 41197 | { 903, 7, 1, 0, 852, 0, 1, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0xf960004019ULL }, // Inst #903 = ANDN32rm_EVEX |
| 41198 | { 902, 7, 1, 0, 1467, 0, 1, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0xf920004019ULL }, // Inst #902 = ANDN32rm |
| 41199 | { 901, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 173, 0, 0x1100000029ULL }, // Inst #901 = AND8rr_REV |
| 41200 | { 900, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 173, 0, 0x10001160010029ULL }, // Inst #900 = AND8rr_NF_REV |
| 41201 | { 899, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 462, 0, 0x10109160010029ULL }, // Inst #899 = AND8rr_NF_ND_REV |
| 41202 | { 898, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::Commutable), 0x10109060010028ULL }, // Inst #898 = AND8rr_NF_ND |
| 41203 | { 897, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Commutable), 0x10001060010028ULL }, // Inst #897 = AND8rr_NF |
| 41204 | { 896, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 462, 0, 0x109160010029ULL }, // Inst #896 = AND8rr_ND_REV |
| 41205 | { 895, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::Commutable), 0x109060010028ULL }, // Inst #895 = AND8rr_ND |
| 41206 | { 894, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0, 0xc001160010029ULL }, // Inst #894 = AND8rr_EVEX_REV |
| 41207 | { 893, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Commutable), 0xc001060010028ULL }, // Inst #893 = AND8rr_EVEX |
| 41208 | { 892, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Commutable), 0x1000000028ULL }, // Inst #892 = AND8rr |
| 41209 | { 891, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad), 0x10109160010019ULL }, // Inst #891 = AND8rm_NF_ND |
| 41210 | { 890, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0x10001160010019ULL }, // Inst #890 = AND8rm_NF |
| 41211 | { 889, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad), 0x109160010019ULL }, // Inst #889 = AND8rm_ND |
| 41212 | { 888, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0xc001160010019ULL }, // Inst #888 = AND8rm_EVEX |
| 41213 | { 887, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0x1100000019ULL }, // Inst #887 = AND8rm |
| 41214 | { 886, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 445, 0, 0x1010c060050034ULL }, // Inst #886 = AND8ri_NF_ND |
| 41215 | { 885, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 170, 0, 0x10004060050034ULL }, // Inst #885 = AND8ri_NF |
| 41216 | { 884, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 445, 0, 0x10c060050034ULL }, // Inst #884 = AND8ri_ND |
| 41217 | { 883, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 170, 0, 0xc004060050034ULL }, // Inst #883 = AND8ri_EVEX |
| 41218 | { 882, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 170, 0, 0x4100040034ULL }, // Inst #882 = AND8ri8 |
| 41219 | { 881, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 170, 0, 0x4000040034ULL }, // Inst #881 = AND8ri |
| 41220 | { 880, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 438, 0|(1ULL<<MCID::MayLoad), 0x10109060010018ULL }, // Inst #880 = AND8mr_NF_ND |
| 41221 | { 879, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001060010018ULL }, // Inst #879 = AND8mr_NF |
| 41222 | { 878, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 438, 0|(1ULL<<MCID::MayLoad), 0x109060010018ULL }, // Inst #878 = AND8mr_ND |
| 41223 | { 877, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc001060010018ULL }, // Inst #877 = AND8mr_EVEX |
| 41224 | { 876, 6, 0, 0, 1454, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1000000018ULL }, // Inst #876 = AND8mr |
| 41225 | { 875, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x1010c060050024ULL }, // Inst #875 = AND8mi_NF_ND |
| 41226 | { 874, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10004060050024ULL }, // Inst #874 = AND8mi_NF |
| 41227 | { 873, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x10c060050024ULL }, // Inst #873 = AND8mi_ND |
| 41228 | { 872, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050024ULL }, // Inst #872 = AND8mi_EVEX |
| 41229 | { 871, 6, 0, 0, 1451, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040024ULL }, // Inst #871 = AND8mi8 |
| 41230 | { 870, 6, 0, 0, 1451, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040024ULL }, // Inst #870 = AND8mi |
| 41231 | { 869, 1, 0, 0, 1458, 1, 2, X86ImpOpBase + 75, 1, 0, 0x1200040001ULL }, // Inst #869 = AND8i8 |
| 41232 | { 868, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 167, 0, 0x1180020029ULL }, // Inst #868 = AND64rr_REV |
| 41233 | { 867, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 167, 0, 0x100011e0030029ULL }, // Inst #867 = AND64rr_NF_REV |
| 41234 | { 866, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 422, 0, 0x101091e0030029ULL }, // Inst #866 = AND64rr_NF_ND_REV |
| 41235 | { 865, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Commutable), 0x101090e0030028ULL }, // Inst #865 = AND64rr_NF_ND |
| 41236 | { 864, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0x100010e0030028ULL }, // Inst #864 = AND64rr_NF |
| 41237 | { 863, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 422, 0, 0x1091e0030029ULL }, // Inst #863 = AND64rr_ND_REV |
| 41238 | { 862, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::Commutable), 0x1090e0030028ULL }, // Inst #862 = AND64rr_ND |
| 41239 | { 861, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0, 0xc0011e0030029ULL }, // Inst #861 = AND64rr_EVEX_REV |
| 41240 | { 860, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0xc0010e0030028ULL }, // Inst #860 = AND64rr_EVEX |
| 41241 | { 859, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Commutable), 0x1080020028ULL }, // Inst #859 = AND64rr |
| 41242 | { 858, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0x101091e0030019ULL }, // Inst #858 = AND64rm_NF_ND |
| 41243 | { 857, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x100011e0030019ULL }, // Inst #857 = AND64rm_NF |
| 41244 | { 856, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0x1091e0030019ULL }, // Inst #856 = AND64rm_ND |
| 41245 | { 855, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0xc0011e0030019ULL }, // Inst #855 = AND64rm_EVEX |
| 41246 | { 854, 7, 1, 0, 1465, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x1180020019ULL }, // Inst #854 = AND64rm |
| 41247 | { 853, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 405, 0, 0x1010c1e0070034ULL }, // Inst #853 = AND64ri8_NF_ND |
| 41248 | { 852, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 164, 0, 0x100041e0070034ULL }, // Inst #852 = AND64ri8_NF |
| 41249 | { 851, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 405, 0, 0x10c1e0070034ULL }, // Inst #851 = AND64ri8_ND |
| 41250 | { 850, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0, 0xc0041e0070034ULL }, // Inst #850 = AND64ri8_EVEX |
| 41251 | { 849, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 164, 0, 0x4180060034ULL }, // Inst #849 = AND64ri8 |
| 41252 | { 848, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 405, 0, 0x1010c0e0230034ULL }, // Inst #848 = AND64ri32_NF_ND |
| 41253 | { 847, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 164, 0, 0x100040e0230034ULL }, // Inst #847 = AND64ri32_NF |
| 41254 | { 846, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 405, 0, 0x10c0e0230034ULL }, // Inst #846 = AND64ri32_ND |
| 41255 | { 845, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0, 0xc0040e0230034ULL }, // Inst #845 = AND64ri32_EVEX |
| 41256 | { 844, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 164, 0, 0x4080220034ULL }, // Inst #844 = AND64ri32 |
| 41257 | { 843, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x101090e0030018ULL }, // Inst #843 = AND64mr_NF_ND |
| 41258 | { 842, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100010e0030018ULL }, // Inst #842 = AND64mr_NF |
| 41259 | { 841, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x1090e0030018ULL }, // Inst #841 = AND64mr_ND |
| 41260 | { 840, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0010e0030018ULL }, // Inst #840 = AND64mr_EVEX |
| 41261 | { 839, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080020018ULL }, // Inst #839 = AND64mr |
| 41262 | { 838, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0070024ULL }, // Inst #838 = AND64mi8_NF_ND |
| 41263 | { 837, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0070024ULL }, // Inst #837 = AND64mi8_NF |
| 41264 | { 836, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070024ULL }, // Inst #836 = AND64mi8_ND |
| 41265 | { 835, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070024ULL }, // Inst #835 = AND64mi8_EVEX |
| 41266 | { 834, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060024ULL }, // Inst #834 = AND64mi8 |
| 41267 | { 833, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0230024ULL }, // Inst #833 = AND64mi32_NF_ND |
| 41268 | { 832, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0230024ULL }, // Inst #832 = AND64mi32_NF |
| 41269 | { 831, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230024ULL }, // Inst #831 = AND64mi32_ND |
| 41270 | { 830, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230024ULL }, // Inst #830 = AND64mi32_EVEX |
| 41271 | { 829, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220024ULL }, // Inst #829 = AND64mi32 |
| 41272 | { 828, 1, 0, 0, 1458, 1, 2, X86ImpOpBase + 72, 1, 0, 0x1280220001ULL }, // Inst #828 = AND64i32 |
| 41273 | { 827, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 161, 0, 0x1180000129ULL }, // Inst #827 = AND32rr_REV |
| 41274 | { 826, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 161, 0, 0x100011e0010029ULL }, // Inst #826 = AND32rr_NF_REV |
| 41275 | { 825, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 225, 0, 0x101091e0010029ULL }, // Inst #825 = AND32rr_NF_ND_REV |
| 41276 | { 824, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Commutable), 0x101090e0010028ULL }, // Inst #824 = AND32rr_NF_ND |
| 41277 | { 823, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0x100010e0010028ULL }, // Inst #823 = AND32rr_NF |
| 41278 | { 822, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 225, 0, 0x1091e0010029ULL }, // Inst #822 = AND32rr_ND_REV |
| 41279 | { 821, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Commutable), 0x1090e0010028ULL }, // Inst #821 = AND32rr_ND |
| 41280 | { 820, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0, 0xc0011e0010029ULL }, // Inst #820 = AND32rr_EVEX_REV |
| 41281 | { 819, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0xc0010e0010028ULL }, // Inst #819 = AND32rr_EVEX |
| 41282 | { 818, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Commutable), 0x1080000128ULL }, // Inst #818 = AND32rr |
| 41283 | { 817, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0x101091e0010019ULL }, // Inst #817 = AND32rm_NF_ND |
| 41284 | { 816, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x100011e0010019ULL }, // Inst #816 = AND32rm_NF |
| 41285 | { 815, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0x1091e0010019ULL }, // Inst #815 = AND32rm_ND |
| 41286 | { 814, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0xc0011e0010019ULL }, // Inst #814 = AND32rm_EVEX |
| 41287 | { 813, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x1180000119ULL }, // Inst #813 = AND32rm |
| 41288 | { 812, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 374, 0, 0x1010c0e0190034ULL }, // Inst #812 = AND32ri_NF_ND |
| 41289 | { 811, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 158, 0, 0x100040e0190034ULL }, // Inst #811 = AND32ri_NF |
| 41290 | { 810, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 374, 0, 0x10c0e0190034ULL }, // Inst #810 = AND32ri_ND |
| 41291 | { 809, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0, 0xc0040e0190034ULL }, // Inst #809 = AND32ri_EVEX |
| 41292 | { 808, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 374, 0, 0x1010c1e0050034ULL }, // Inst #808 = AND32ri8_NF_ND |
| 41293 | { 807, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 158, 0, 0x100041e0050034ULL }, // Inst #807 = AND32ri8_NF |
| 41294 | { 806, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 374, 0, 0x10c1e0050034ULL }, // Inst #806 = AND32ri8_ND |
| 41295 | { 805, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0, 0xc0041e0050034ULL }, // Inst #805 = AND32ri8_EVEX |
| 41296 | { 804, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 158, 0, 0x4180040134ULL }, // Inst #804 = AND32ri8 |
| 41297 | { 803, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 158, 0, 0x4080180134ULL }, // Inst #803 = AND32ri |
| 41298 | { 802, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x101090e0010018ULL }, // Inst #802 = AND32mr_NF_ND |
| 41299 | { 801, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100010e0010018ULL }, // Inst #801 = AND32mr_NF |
| 41300 | { 800, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x1090e0010018ULL }, // Inst #800 = AND32mr_ND |
| 41301 | { 799, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0010e0010018ULL }, // Inst #799 = AND32mr_EVEX |
| 41302 | { 798, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080000118ULL }, // Inst #798 = AND32mr |
| 41303 | { 797, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0190024ULL }, // Inst #797 = AND32mi_NF_ND |
| 41304 | { 796, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0190024ULL }, // Inst #796 = AND32mi_NF |
| 41305 | { 795, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190024ULL }, // Inst #795 = AND32mi_ND |
| 41306 | { 794, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190024ULL }, // Inst #794 = AND32mi_EVEX |
| 41307 | { 793, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050024ULL }, // Inst #793 = AND32mi8_NF_ND |
| 41308 | { 792, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050024ULL }, // Inst #792 = AND32mi8_NF |
| 41309 | { 791, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050024ULL }, // Inst #791 = AND32mi8_ND |
| 41310 | { 790, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050024ULL }, // Inst #790 = AND32mi8_EVEX |
| 41311 | { 789, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040124ULL }, // Inst #789 = AND32mi8 |
| 41312 | { 788, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180124ULL }, // Inst #788 = AND32mi |
| 41313 | { 787, 1, 0, 0, 1458, 1, 2, X86ImpOpBase + 69, 1, 0, 0x1280180101ULL }, // Inst #787 = AND32i32 |
| 41314 | { 786, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 155, 0, 0x11800000a9ULL }, // Inst #786 = AND16rr_REV |
| 41315 | { 785, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 155, 0, 0x100011e0010829ULL }, // Inst #785 = AND16rr_NF_REV |
| 41316 | { 784, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 357, 0, 0x101091e0010829ULL }, // Inst #784 = AND16rr_NF_ND_REV |
| 41317 | { 783, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Commutable), 0x101090e0010828ULL }, // Inst #783 = AND16rr_NF_ND |
| 41318 | { 782, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0x100010e0010828ULL }, // Inst #782 = AND16rr_NF |
| 41319 | { 781, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 357, 0, 0x1091e0010829ULL }, // Inst #781 = AND16rr_ND_REV |
| 41320 | { 780, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::Commutable), 0x1090e0010828ULL }, // Inst #780 = AND16rr_ND |
| 41321 | { 779, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0, 0xc0011e0010829ULL }, // Inst #779 = AND16rr_EVEX_REV |
| 41322 | { 778, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0xc0010e0010828ULL }, // Inst #778 = AND16rr_EVEX |
| 41323 | { 777, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Commutable), 0x10800000a8ULL }, // Inst #777 = AND16rr |
| 41324 | { 776, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::MayLoad), 0x101091e0010819ULL }, // Inst #776 = AND16rm_NF_ND |
| 41325 | { 775, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0x100011e0010819ULL }, // Inst #775 = AND16rm_NF |
| 41326 | { 774, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::MayLoad), 0x1091e0010819ULL }, // Inst #774 = AND16rm_ND |
| 41327 | { 773, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0xc0011e0010819ULL }, // Inst #773 = AND16rm_EVEX |
| 41328 | { 772, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0x1180000099ULL }, // Inst #772 = AND16rm |
| 41329 | { 771, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 340, 0, 0x1010c0e0110834ULL }, // Inst #771 = AND16ri_NF_ND |
| 41330 | { 770, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 152, 0, 0x100040e0110834ULL }, // Inst #770 = AND16ri_NF |
| 41331 | { 769, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 340, 0, 0x10c0e0110834ULL }, // Inst #769 = AND16ri_ND |
| 41332 | { 768, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0, 0xc0040e0110834ULL }, // Inst #768 = AND16ri_EVEX |
| 41333 | { 767, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 340, 0, 0x1010c1e0050834ULL }, // Inst #767 = AND16ri8_NF_ND |
| 41334 | { 766, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 152, 0, 0x100041e0050834ULL }, // Inst #766 = AND16ri8_NF |
| 41335 | { 765, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 340, 0, 0x10c1e0050834ULL }, // Inst #765 = AND16ri8_ND |
| 41336 | { 764, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0, 0xc0041e0050834ULL }, // Inst #764 = AND16ri8_EVEX |
| 41337 | { 763, 3, 1, 0, 1457, 0, 1, X86ImpOpBase + 0, 152, 0, 0x41800400b4ULL }, // Inst #763 = AND16ri8 |
| 41338 | { 762, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0, 0x40801000b4ULL }, // Inst #762 = AND16ri |
| 41339 | { 761, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 333, 0|(1ULL<<MCID::MayLoad), 0x101090e0010818ULL }, // Inst #761 = AND16mr_NF_ND |
| 41340 | { 760, 6, 0, 0, 940, 0, 0, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100010e0010818ULL }, // Inst #760 = AND16mr_NF |
| 41341 | { 759, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 333, 0|(1ULL<<MCID::MayLoad), 0x1090e0010818ULL }, // Inst #759 = AND16mr_ND |
| 41342 | { 758, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0010e0010818ULL }, // Inst #758 = AND16mr_EVEX |
| 41343 | { 757, 6, 0, 0, 939, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080000098ULL }, // Inst #757 = AND16mr |
| 41344 | { 756, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0110824ULL }, // Inst #756 = AND16mi_NF_ND |
| 41345 | { 755, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0110824ULL }, // Inst #755 = AND16mi_NF |
| 41346 | { 754, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110824ULL }, // Inst #754 = AND16mi_ND |
| 41347 | { 753, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110824ULL }, // Inst #753 = AND16mi_EVEX |
| 41348 | { 752, 7, 1, 0, 938, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050824ULL }, // Inst #752 = AND16mi8_NF_ND |
| 41349 | { 751, 6, 0, 0, 937, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050824ULL }, // Inst #751 = AND16mi8_NF |
| 41350 | { 750, 7, 1, 0, 938, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050824ULL }, // Inst #750 = AND16mi8_ND |
| 41351 | { 749, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050824ULL }, // Inst #749 = AND16mi8_EVEX |
| 41352 | { 748, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a4ULL }, // Inst #748 = AND16mi8 |
| 41353 | { 747, 6, 0, 0, 937, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a4ULL }, // Inst #747 = AND16mi |
| 41354 | { 746, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 46, 1, 0, 0x1280100081ULL }, // Inst #746 = AND16i16 |
| 41355 | { 745, 3, 1, 0, 42, 0, 0, X86ImpOpBase + 0, 544, 0, 0x6f98046829ULL }, // Inst #745 = AESKEYGENASSIST128rr |
| 41356 | { 744, 7, 1, 0, 41, 0, 0, X86ImpOpBase + 0, 537, 0|(1ULL<<MCID::MayLoad), 0x6f98046819ULL }, // Inst #744 = AESKEYGENASSIST128rm |
| 41357 | { 743, 2, 1, 0, 40, 0, 0, X86ImpOpBase + 0, 535, 0, 0x6d98004829ULL }, // Inst #743 = AESIMCrr |
| 41358 | { 742, 6, 1, 0, 39, 0, 0, X86ImpOpBase + 0, 529, 0|(1ULL<<MCID::MayLoad), 0x6d98004819ULL }, // Inst #742 = AESIMCrm |
| 41359 | { 741, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6e18004829ULL }, // Inst #741 = AESENCrr |
| 41360 | { 740, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6e18004819ULL }, // Inst #740 = AESENCrm |
| 41361 | { 739, 5, 0, 0, 8, 8, 9, X86ImpOpBase + 91, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00005022ULL }, // Inst #739 = AESENCWIDE256KL |
| 41362 | { 738, 5, 0, 0, 8, 8, 9, X86ImpOpBase + 91, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00005020ULL }, // Inst #738 = AESENCWIDE128KL |
| 41363 | { 737, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6e98004829ULL }, // Inst #737 = AESENCLASTrr |
| 41364 | { 736, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6e98004819ULL }, // Inst #736 = AESENCLASTrm |
| 41365 | { 735, 7, 1, 0, 8, 0, 1, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00005019ULL }, // Inst #735 = AESENC256KL |
| 41366 | { 734, 7, 1, 0, 8, 0, 1, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00005019ULL }, // Inst #734 = AESENC128KL |
| 41367 | { 733, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6f18004829ULL }, // Inst #733 = AESDECrr |
| 41368 | { 732, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6f18004819ULL }, // Inst #732 = AESDECrm |
| 41369 | { 731, 5, 0, 0, 8, 8, 9, X86ImpOpBase + 91, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00005023ULL }, // Inst #731 = AESDECWIDE256KL |
| 41370 | { 730, 5, 0, 0, 8, 8, 9, X86ImpOpBase + 91, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00005021ULL }, // Inst #730 = AESDECWIDE128KL |
| 41371 | { 729, 3, 1, 0, 38, 0, 0, X86ImpOpBase + 0, 472, 0, 0x6f98004829ULL }, // Inst #729 = AESDECLASTrr |
| 41372 | { 728, 7, 1, 0, 37, 0, 0, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad), 0x6f98004819ULL }, // Inst #728 = AESDECLASTrm |
| 41373 | { 727, 7, 1, 0, 8, 0, 1, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80005019ULL }, // Inst #727 = AESDEC256KL |
| 41374 | { 726, 7, 1, 0, 8, 0, 1, X86ImpOpBase + 0, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80005019ULL }, // Inst #726 = AESDEC128KL |
| 41375 | { 725, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 422, 0, 0x10b360031029ULL }, // Inst #725 = ADOX64rr_ND |
| 41376 | { 724, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0x3360031029ULL }, // Inst #724 = ADOX64rr_EVEX |
| 41377 | { 723, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0x7b00025029ULL }, // Inst #723 = ADOX64rr |
| 41378 | { 722, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 415, 0|(1ULL<<MCID::MayLoad), 0x10b360031019ULL }, // Inst #722 = ADOX64rm_ND |
| 41379 | { 721, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 408, 0|(1ULL<<MCID::MayLoad), 0x3360031019ULL }, // Inst #721 = ADOX64rm_EVEX |
| 41380 | { 720, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 408, 0|(1ULL<<MCID::MayLoad), 0x7b00025019ULL }, // Inst #720 = ADOX64rm |
| 41381 | { 719, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 225, 0, 0x10b360011029ULL }, // Inst #719 = ADOX32rr_ND |
| 41382 | { 718, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0x3360011029ULL }, // Inst #718 = ADOX32rr_EVEX |
| 41383 | { 717, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0x7b00005029ULL }, // Inst #717 = ADOX32rr |
| 41384 | { 716, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 384, 0|(1ULL<<MCID::MayLoad), 0x10b360011019ULL }, // Inst #716 = ADOX32rm_ND |
| 41385 | { 715, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 377, 0|(1ULL<<MCID::MayLoad), 0x3360011019ULL }, // Inst #715 = ADOX32rm_EVEX |
| 41386 | { 714, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 377, 0|(1ULL<<MCID::MayLoad), 0x7b00005019ULL }, // Inst #714 = ADOX32rm |
| 41387 | { 713, 2, 0, 0, 1, 2, 3, X86ImpOpBase + 86, 21, 0, 0x0ULL }, // Inst #713 = ADJCALLSTACKUP64 |
| 41388 | { 712, 2, 0, 0, 1, 2, 3, X86ImpOpBase + 81, 21, 0, 0x0ULL }, // Inst #712 = ADJCALLSTACKUP32 |
| 41389 | { 711, 3, 0, 0, 1, 2, 3, X86ImpOpBase + 86, 526, 0, 0x0ULL }, // Inst #711 = ADJCALLSTACKDOWN64 |
| 41390 | { 710, 3, 0, 0, 1, 2, 3, X86ImpOpBase + 81, 526, 0, 0x0ULL }, // Inst #710 = ADJCALLSTACKDOWN32 |
| 41391 | { 709, 1, 0, 0, 1676, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000030ULL }, // Inst #709 = ADD_FrST0 |
| 41392 | { 708, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #708 = ADD_FpI32m80 |
| 41393 | { 707, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #707 = ADD_FpI32m64 |
| 41394 | { 706, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #706 = ADD_FpI32m32 |
| 41395 | { 705, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #705 = ADD_FpI16m80 |
| 41396 | { 704, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #704 = ADD_FpI16m64 |
| 41397 | { 703, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #703 = ADD_FpI16m32 |
| 41398 | { 702, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #702 = ADD_Fp80m64 |
| 41399 | { 701, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 519, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #701 = ADD_Fp80m32 |
| 41400 | { 700, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 516, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #700 = ADD_Fp80 |
| 41401 | { 699, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #699 = ADD_Fp64m32 |
| 41402 | { 698, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 509, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #698 = ADD_Fp64m |
| 41403 | { 697, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 506, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #697 = ADD_Fp64 |
| 41404 | { 696, 7, 1, 0, 36, 1, 1, X86ImpOpBase + 79, 499, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0xc00000ULL }, // Inst #696 = ADD_Fp32m |
| 41405 | { 695, 3, 1, 0, 0, 1, 1, X86ImpOpBase + 79, 496, 0|(1ULL<<MCID::MayRaiseFPException), 0x1000000ULL }, // Inst #695 = ADD_Fp32 |
| 41406 | { 694, 1, 0, 0, 1205, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000030ULL }, // Inst #694 = ADD_FST0r |
| 41407 | { 693, 1, 0, 0, 1676, 1, 1, X86ImpOpBase + 79, 495, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000030ULL }, // Inst #693 = ADD_FPrST0 |
| 41408 | { 692, 5, 0, 0, 802, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000020ULL }, // Inst #692 = ADD_FI32m |
| 41409 | { 691, 5, 0, 0, 802, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000020ULL }, // Inst #691 = ADD_FI16m |
| 41410 | { 690, 5, 0, 0, 798, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000020ULL }, // Inst #690 = ADD_F64m |
| 41411 | { 689, 5, 0, 0, 798, 1, 1, X86ImpOpBase + 79, 231, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000020ULL }, // Inst #689 = ADD_F32m |
| 41412 | { 688, 3, 1, 0, 1656, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x6808003829ULL }, // Inst #688 = ADDSUBPSrr |
| 41413 | { 687, 7, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6808003819ULL }, // Inst #687 = ADDSUBPSrm |
| 41414 | { 686, 3, 1, 0, 28, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x6810002829ULL }, // Inst #686 = ADDSUBPDrr |
| 41415 | { 685, 7, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x6810002819ULL }, // Inst #685 = ADDSUBPDrm |
| 41416 | { 684, 3, 1, 0, 1456, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2c08003029ULL }, // Inst #684 = ADDSSrr_Int |
| 41417 | { 683, 3, 1, 0, 1456, 1, 0, X86ImpOpBase + 78, 492, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c08003029ULL }, // Inst #683 = ADDSSrr |
| 41418 | { 682, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c08003019ULL }, // Inst #682 = ADDSSrm_Int |
| 41419 | { 681, 7, 1, 0, 34, 1, 0, X86ImpOpBase + 78, 485, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c08003019ULL }, // Inst #681 = ADDSSrm |
| 41420 | { 680, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException), 0x2c10003829ULL }, // Inst #680 = ADDSDrr_Int |
| 41421 | { 679, 3, 1, 0, 33, 1, 0, X86ImpOpBase + 78, 482, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c10003829ULL }, // Inst #679 = ADDSDrr |
| 41422 | { 678, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c10003819ULL }, // Inst #678 = ADDSDrm_Int |
| 41423 | { 677, 7, 1, 0, 32, 1, 0, X86ImpOpBase + 78, 475, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c10003819ULL }, // Inst #677 = ADDSDrm |
| 41424 | { 676, 0, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x338000000aULL }, // Inst #676 = ADDR32_PREFIX |
| 41425 | { 675, 0, 0, 0, 31, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x338000000aULL }, // Inst #675 = ADDR16_PREFIX |
| 41426 | { 674, 3, 1, 0, 1656, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c08002029ULL }, // Inst #674 = ADDPSrr |
| 41427 | { 673, 7, 1, 0, 1655, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c08002019ULL }, // Inst #673 = ADDPSrm |
| 41428 | { 672, 3, 1, 0, 28, 1, 0, X86ImpOpBase + 78, 472, 0|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable), 0x2c10002829ULL }, // Inst #672 = ADDPDrr |
| 41429 | { 671, 7, 1, 0, 27, 1, 0, X86ImpOpBase + 78, 465, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayRaiseFPException), 0x2c10002819ULL }, // Inst #671 = ADDPDrm |
| 41430 | { 670, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0, 0x100000029ULL }, // Inst #670 = ADD8rr_REV |
| 41431 | { 669, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 173, 0, 0x10000160010029ULL }, // Inst #669 = ADD8rr_NF_REV |
| 41432 | { 668, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 462, 0, 0x10108160010029ULL }, // Inst #668 = ADD8rr_NF_ND_REV |
| 41433 | { 667, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x10108060010028ULL }, // Inst #667 = ADD8rr_NF_ND |
| 41434 | { 666, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x10000060010028ULL }, // Inst #666 = ADD8rr_NF |
| 41435 | { 665, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 462, 0, 0x108160010029ULL }, // Inst #665 = ADD8rr_ND_REV |
| 41436 | { 664, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 462, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x108060010028ULL }, // Inst #664 = ADD8rr_ND |
| 41437 | { 663, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0, 0xc000160010029ULL }, // Inst #663 = ADD8rr_EVEX_REV |
| 41438 | { 662, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0xc000060010028ULL }, // Inst #662 = ADD8rr_EVEX |
| 41439 | { 661, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x28ULL }, // Inst #661 = ADD8rr |
| 41440 | { 660, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad), 0x10108160010019ULL }, // Inst #660 = ADD8rm_NF_ND |
| 41441 | { 659, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0x10000160010019ULL }, // Inst #659 = ADD8rm_NF |
| 41442 | { 658, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 455, 0|(1ULL<<MCID::MayLoad), 0x108160010019ULL }, // Inst #658 = ADD8rm_ND |
| 41443 | { 657, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0xc000160010019ULL }, // Inst #657 = ADD8rm_EVEX |
| 41444 | { 656, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 448, 0|(1ULL<<MCID::MayLoad), 0x100000019ULL }, // Inst #656 = ADD8rm |
| 41445 | { 655, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 445, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c060050030ULL }, // Inst #655 = ADD8ri_NF_ND |
| 41446 | { 654, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10004060050030ULL }, // Inst #654 = ADD8ri_NF |
| 41447 | { 653, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 445, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c060050030ULL }, // Inst #653 = ADD8ri_ND |
| 41448 | { 652, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc004060050030ULL }, // Inst #652 = ADD8ri_EVEX |
| 41449 | { 651, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 170, 0, 0x4100040030ULL }, // Inst #651 = ADD8ri8 |
| 41450 | { 650, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4000040030ULL }, // Inst #650 = ADD8ri |
| 41451 | { 649, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 438, 0|(1ULL<<MCID::MayLoad), 0x10108060010018ULL }, // Inst #649 = ADD8mr_NF_ND |
| 41452 | { 648, 6, 0, 0, 928, 0, 0, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10000060010018ULL }, // Inst #648 = ADD8mr_NF |
| 41453 | { 647, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 438, 0|(1ULL<<MCID::MayLoad), 0x108060010018ULL }, // Inst #647 = ADD8mr_ND |
| 41454 | { 646, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000060010018ULL }, // Inst #646 = ADD8mr_EVEX |
| 41455 | { 645, 6, 0, 0, 1453, 0, 1, X86ImpOpBase + 0, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x18ULL }, // Inst #645 = ADD8mr |
| 41456 | { 644, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x1010c060050020ULL }, // Inst #644 = ADD8mi_NF_ND |
| 41457 | { 643, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10004060050020ULL }, // Inst #643 = ADD8mi_NF |
| 41458 | { 642, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 425, 0|(1ULL<<MCID::MayLoad), 0x10c060050020ULL }, // Inst #642 = ADD8mi_ND |
| 41459 | { 641, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050020ULL }, // Inst #641 = ADD8mi_EVEX |
| 41460 | { 640, 6, 0, 0, 1450, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040020ULL }, // Inst #640 = ADD8mi8 |
| 41461 | { 639, 6, 0, 0, 1450, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040020ULL }, // Inst #639 = ADD8mi |
| 41462 | { 638, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 75, 1, 0, 0x200040001ULL }, // Inst #638 = ADD8i8 |
| 41463 | { 637, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0, 0x180020029ULL }, // Inst #637 = ADD64rr_REV |
| 41464 | { 636, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 167, 0, 0x100001e0030029ULL }, // Inst #636 = ADD64rr_NF_REV |
| 41465 | { 635, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 422, 0, 0x101081e0030029ULL }, // Inst #635 = ADD64rr_NF_ND_REV |
| 41466 | { 634, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x101080e0030028ULL }, // Inst #634 = ADD64rr_NF_ND |
| 41467 | { 633, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x100000e0030028ULL }, // Inst #633 = ADD64rr_NF |
| 41468 | { 632, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 422, 0, 0x1081e0030029ULL }, // Inst #632 = ADD64rr_ND_REV |
| 41469 | { 631, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 422, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x1080e0030028ULL }, // Inst #631 = ADD64rr_ND |
| 41470 | { 630, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0, 0xc0001e0030029ULL }, // Inst #630 = ADD64rr_EVEX_REV |
| 41471 | { 629, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0xc0000e0030028ULL }, // Inst #629 = ADD64rr_EVEX |
| 41472 | { 628, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x80020028ULL }, // Inst #628 = ADD64rr |
| 41473 | { 627, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0x101081e0030019ULL }, // Inst #627 = ADD64rm_NF_ND |
| 41474 | { 626, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x100001e0030019ULL }, // Inst #626 = ADD64rm_NF |
| 41475 | { 625, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 415, 0|(1ULL<<MCID::MayLoad), 0x1081e0030019ULL }, // Inst #625 = ADD64rm_ND |
| 41476 | { 624, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0xc0001e0030019ULL }, // Inst #624 = ADD64rm_EVEX |
| 41477 | { 623, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 408, 0|(1ULL<<MCID::MayLoad), 0x180020019ULL }, // Inst #623 = ADD64rm |
| 41478 | { 622, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 405, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0070030ULL }, // Inst #622 = ADD64ri8_NF_ND |
| 41479 | { 621, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0070030ULL }, // Inst #621 = ADD64ri8_NF |
| 41480 | { 620, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 405, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0070030ULL }, // Inst #620 = ADD64ri8_ND |
| 41481 | { 619, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0070030ULL }, // Inst #619 = ADD64ri8_EVEX |
| 41482 | { 618, 3, 1, 0, 1447, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180060030ULL }, // Inst #618 = ADD64ri8 |
| 41483 | { 617, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 405, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0230030ULL }, // Inst #617 = ADD64ri32_NF_ND |
| 41484 | { 616, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0230030ULL }, // Inst #616 = ADD64ri32_NF |
| 41485 | { 615, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 405, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0230030ULL }, // Inst #615 = ADD64ri32_ND |
| 41486 | { 614, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0230030ULL }, // Inst #614 = ADD64ri32_EVEX |
| 41487 | { 613, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4080220030ULL }, // Inst #613 = ADD64ri32 |
| 41488 | { 612, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x101080e0030018ULL }, // Inst #612 = ADD64mr_NF_ND |
| 41489 | { 611, 6, 0, 0, 928, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100000e0030018ULL }, // Inst #611 = ADD64mr_NF |
| 41490 | { 610, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 398, 0|(1ULL<<MCID::MayLoad), 0x1080e0030018ULL }, // Inst #610 = ADD64mr_ND |
| 41491 | { 609, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0000e0030018ULL }, // Inst #609 = ADD64mr_EVEX |
| 41492 | { 608, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80020018ULL }, // Inst #608 = ADD64mr |
| 41493 | { 607, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0070020ULL }, // Inst #607 = ADD64mi8_NF_ND |
| 41494 | { 606, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0070020ULL }, // Inst #606 = ADD64mi8_NF |
| 41495 | { 605, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070020ULL }, // Inst #605 = ADD64mi8_ND |
| 41496 | { 604, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070020ULL }, // Inst #604 = ADD64mi8_EVEX |
| 41497 | { 603, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060020ULL }, // Inst #603 = ADD64mi8 |
| 41498 | { 602, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0230020ULL }, // Inst #602 = ADD64mi32_NF_ND |
| 41499 | { 601, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0230020ULL }, // Inst #601 = ADD64mi32_NF |
| 41500 | { 600, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 391, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230020ULL }, // Inst #600 = ADD64mi32_ND |
| 41501 | { 599, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230020ULL }, // Inst #599 = ADD64mi32_EVEX |
| 41502 | { 598, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220020ULL }, // Inst #598 = ADD64mi32 |
| 41503 | { 597, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 72, 1, 0, 0x280220001ULL }, // Inst #597 = ADD64i32 |
| 41504 | { 596, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0, 0x180000129ULL }, // Inst #596 = ADD32rr_REV |
| 41505 | { 595, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 161, 0, 0x100001e0010029ULL }, // Inst #595 = ADD32rr_NF_REV |
| 41506 | { 594, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 225, 0, 0x101081e0010029ULL }, // Inst #594 = ADD32rr_NF_ND_REV |
| 41507 | { 593, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x101080e0010028ULL }, // Inst #593 = ADD32rr_NF_ND |
| 41508 | { 592, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x100000e0010028ULL }, // Inst #592 = ADD32rr_NF |
| 41509 | { 591, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 225, 0, 0x1081e0010029ULL }, // Inst #591 = ADD32rr_ND_REV |
| 41510 | { 590, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x1080e0010028ULL }, // Inst #590 = ADD32rr_ND |
| 41511 | { 589, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0, 0xc0001e0010029ULL }, // Inst #589 = ADD32rr_EVEX_REV |
| 41512 | { 588, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0xc0000e0010028ULL }, // Inst #588 = ADD32rr_EVEX |
| 41513 | { 587, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x80000128ULL }, // Inst #587 = ADD32rr |
| 41514 | { 586, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0x101081e0010019ULL }, // Inst #586 = ADD32rm_NF_ND |
| 41515 | { 585, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x100001e0010019ULL }, // Inst #585 = ADD32rm_NF |
| 41516 | { 584, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 384, 0|(1ULL<<MCID::MayLoad), 0x1081e0010019ULL }, // Inst #584 = ADD32rm_ND |
| 41517 | { 583, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0xc0001e0010019ULL }, // Inst #583 = ADD32rm_EVEX |
| 41518 | { 582, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 377, 0|(1ULL<<MCID::MayLoad), 0x180000119ULL }, // Inst #582 = ADD32rm |
| 41519 | { 581, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0190030ULL }, // Inst #581 = ADD32ri_NF_ND |
| 41520 | { 580, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0190030ULL }, // Inst #580 = ADD32ri_NF |
| 41521 | { 579, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0190030ULL }, // Inst #579 = ADD32ri_ND |
| 41522 | { 578, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0190030ULL }, // Inst #578 = ADD32ri_EVEX |
| 41523 | { 577, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0050030ULL }, // Inst #577 = ADD32ri8_NF_ND |
| 41524 | { 576, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0050030ULL }, // Inst #576 = ADD32ri8_NF |
| 41525 | { 575, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 374, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0050030ULL }, // Inst #575 = ADD32ri8_ND |
| 41526 | { 574, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0050030ULL }, // Inst #574 = ADD32ri8_EVEX |
| 41527 | { 573, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180040130ULL }, // Inst #573 = ADD32ri8 |
| 41528 | { 572, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4080180130ULL }, // Inst #572 = ADD32ri |
| 41529 | { 571, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x101080e0010018ULL }, // Inst #571 = ADD32mr_NF_ND |
| 41530 | { 570, 6, 0, 0, 928, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100000e0010018ULL }, // Inst #570 = ADD32mr_NF |
| 41531 | { 569, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 367, 0|(1ULL<<MCID::MayLoad), 0x1080e0010018ULL }, // Inst #569 = ADD32mr_ND |
| 41532 | { 568, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0000e0010018ULL }, // Inst #568 = ADD32mr_EVEX |
| 41533 | { 567, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80000118ULL }, // Inst #567 = ADD32mr |
| 41534 | { 566, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0190020ULL }, // Inst #566 = ADD32mi_NF_ND |
| 41535 | { 565, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0190020ULL }, // Inst #565 = ADD32mi_NF |
| 41536 | { 564, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190020ULL }, // Inst #564 = ADD32mi_ND |
| 41537 | { 563, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190020ULL }, // Inst #563 = ADD32mi_EVEX |
| 41538 | { 562, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050020ULL }, // Inst #562 = ADD32mi8_NF_ND |
| 41539 | { 561, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050020ULL }, // Inst #561 = ADD32mi8_NF |
| 41540 | { 560, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 360, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050020ULL }, // Inst #560 = ADD32mi8_ND |
| 41541 | { 559, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050020ULL }, // Inst #559 = ADD32mi8_EVEX |
| 41542 | { 558, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040120ULL }, // Inst #558 = ADD32mi8 |
| 41543 | { 557, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180120ULL }, // Inst #557 = ADD32mi |
| 41544 | { 556, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 69, 1, 0, 0x280180101ULL }, // Inst #556 = ADD32i32 |
| 41545 | { 555, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0, 0x1800000a9ULL }, // Inst #555 = ADD16rr_REV |
| 41546 | { 554, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 155, 0, 0x100001e0010829ULL }, // Inst #554 = ADD16rr_NF_REV |
| 41547 | { 553, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 357, 0, 0x101081e0010829ULL }, // Inst #553 = ADD16rr_NF_ND_REV |
| 41548 | { 552, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x101080e0010828ULL }, // Inst #552 = ADD16rr_NF_ND |
| 41549 | { 551, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x100000e0010828ULL }, // Inst #551 = ADD16rr_NF |
| 41550 | { 550, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 357, 0, 0x1081e0010829ULL }, // Inst #550 = ADD16rr_ND_REV |
| 41551 | { 549, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 357, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x1080e0010828ULL }, // Inst #549 = ADD16rr_ND |
| 41552 | { 548, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0, 0xc0001e0010829ULL }, // Inst #548 = ADD16rr_EVEX_REV |
| 41553 | { 547, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0xc0000e0010828ULL }, // Inst #547 = ADD16rr_EVEX |
| 41554 | { 546, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x800000a8ULL }, // Inst #546 = ADD16rr |
| 41555 | { 545, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::MayLoad), 0x101081e0010819ULL }, // Inst #545 = ADD16rm_NF_ND |
| 41556 | { 544, 7, 1, 0, 25, 0, 0, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0x100001e0010819ULL }, // Inst #544 = ADD16rm_NF |
| 41557 | { 543, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 350, 0|(1ULL<<MCID::MayLoad), 0x1081e0010819ULL }, // Inst #543 = ADD16rm_ND |
| 41558 | { 542, 7, 1, 0, 25, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0xc0001e0010819ULL }, // Inst #542 = ADD16rm_EVEX |
| 41559 | { 541, 7, 1, 0, 1445, 0, 1, X86ImpOpBase + 0, 343, 0|(1ULL<<MCID::MayLoad), 0x180000099ULL }, // Inst #541 = ADD16rm |
| 41560 | { 540, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 340, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c0e0110830ULL }, // Inst #540 = ADD16ri_NF_ND |
| 41561 | { 539, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100040e0110830ULL }, // Inst #539 = ADD16ri_NF |
| 41562 | { 538, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 340, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c0e0110830ULL }, // Inst #538 = ADD16ri_ND |
| 41563 | { 537, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0040e0110830ULL }, // Inst #537 = ADD16ri_EVEX |
| 41564 | { 536, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 340, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x1010c1e0050830ULL }, // Inst #536 = ADD16ri8_NF_ND |
| 41565 | { 535, 3, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x100041e0050830ULL }, // Inst #535 = ADD16ri8_NF |
| 41566 | { 534, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 340, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x10c1e0050830ULL }, // Inst #534 = ADD16ri8_ND |
| 41567 | { 533, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0xc0041e0050830ULL }, // Inst #533 = ADD16ri8_EVEX |
| 41568 | { 532, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x41800400b0ULL }, // Inst #532 = ADD16ri8 |
| 41569 | { 531, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x40801000b0ULL }, // Inst #531 = ADD16ri |
| 41570 | { 530, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 333, 0|(1ULL<<MCID::MayLoad), 0x101080e0010818ULL }, // Inst #530 = ADD16mr_NF_ND |
| 41571 | { 529, 6, 0, 0, 928, 0, 0, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100000e0010818ULL }, // Inst #529 = ADD16mr_NF |
| 41572 | { 528, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 333, 0|(1ULL<<MCID::MayLoad), 0x1080e0010818ULL }, // Inst #528 = ADD16mr_ND |
| 41573 | { 527, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0000e0010818ULL }, // Inst #527 = ADD16mr_EVEX |
| 41574 | { 526, 6, 0, 0, 927, 0, 1, X86ImpOpBase + 0, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80000098ULL }, // Inst #526 = ADD16mr |
| 41575 | { 525, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010c0e0110820ULL }, // Inst #525 = ADD16mi_NF_ND |
| 41576 | { 524, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100040e0110820ULL }, // Inst #524 = ADD16mi_NF |
| 41577 | { 523, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110820ULL }, // Inst #523 = ADD16mi_ND |
| 41578 | { 522, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110820ULL }, // Inst #522 = ADD16mi_EVEX |
| 41579 | { 521, 7, 1, 0, 926, 0, 0, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x1010c1e0050820ULL }, // Inst #521 = ADD16mi8_NF_ND |
| 41580 | { 520, 6, 0, 0, 925, 0, 0, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100041e0050820ULL }, // Inst #520 = ADD16mi8_NF |
| 41581 | { 519, 7, 1, 0, 926, 0, 1, X86ImpOpBase + 0, 320, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050820ULL }, // Inst #519 = ADD16mi8_ND |
| 41582 | { 518, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050820ULL }, // Inst #518 = ADD16mi8_EVEX |
| 41583 | { 517, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a0ULL }, // Inst #517 = ADD16mi8 |
| 41584 | { 516, 6, 0, 0, 925, 0, 1, X86ImpOpBase + 0, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a0ULL }, // Inst #516 = ADD16mi |
| 41585 | { 515, 1, 0, 0, 1014, 1, 2, X86ImpOpBase + 46, 1, 0, 0x280100081ULL }, // Inst #515 = ADD16i16 |
| 41586 | { 514, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 422, 0, 0x10b360030829ULL }, // Inst #514 = ADCX64rr_ND |
| 41587 | { 513, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0x3360030829ULL }, // Inst #513 = ADCX64rr_EVEX |
| 41588 | { 512, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0x7b00024829ULL }, // Inst #512 = ADCX64rr |
| 41589 | { 511, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 415, 0|(1ULL<<MCID::MayLoad), 0x10b360030819ULL }, // Inst #511 = ADCX64rm_ND |
| 41590 | { 510, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 408, 0|(1ULL<<MCID::MayLoad), 0x3360030819ULL }, // Inst #510 = ADCX64rm_EVEX |
| 41591 | { 509, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 408, 0|(1ULL<<MCID::MayLoad), 0x7b00024819ULL }, // Inst #509 = ADCX64rm |
| 41592 | { 508, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 225, 0, 0x10b360010829ULL }, // Inst #508 = ADCX32rr_ND |
| 41593 | { 507, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0x3360010829ULL }, // Inst #507 = ADCX32rr_EVEX |
| 41594 | { 506, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0x7b00004829ULL }, // Inst #506 = ADCX32rr |
| 41595 | { 505, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 384, 0|(1ULL<<MCID::MayLoad), 0x10b360010819ULL }, // Inst #505 = ADCX32rm_ND |
| 41596 | { 504, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 377, 0|(1ULL<<MCID::MayLoad), 0x3360010819ULL }, // Inst #504 = ADCX32rm_EVEX |
| 41597 | { 503, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 377, 0|(1ULL<<MCID::MayLoad), 0x7b00004819ULL }, // Inst #503 = ADCX32rm |
| 41598 | { 502, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 173, 0, 0x900000029ULL }, // Inst #502 = ADC8rr_REV |
| 41599 | { 501, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 462, 0, 0x108960010029ULL }, // Inst #501 = ADC8rr_ND_REV |
| 41600 | { 500, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 462, 0|(1ULL<<MCID::Commutable), 0x108860010028ULL }, // Inst #500 = ADC8rr_ND |
| 41601 | { 499, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 173, 0, 0xc000960010029ULL }, // Inst #499 = ADC8rr_EVEX_REV |
| 41602 | { 498, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 173, 0, 0xc000860010028ULL }, // Inst #498 = ADC8rr_EVEX |
| 41603 | { 497, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 173, 0|(1ULL<<MCID::Commutable), 0x800000028ULL }, // Inst #497 = ADC8rr |
| 41604 | { 496, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 455, 0|(1ULL<<MCID::MayLoad), 0x108960010019ULL }, // Inst #496 = ADC8rm_ND |
| 41605 | { 495, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 448, 0|(1ULL<<MCID::MayLoad), 0xc000960010019ULL }, // Inst #495 = ADC8rm_EVEX |
| 41606 | { 494, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 448, 0|(1ULL<<MCID::MayLoad), 0x900000019ULL }, // Inst #494 = ADC8rm |
| 41607 | { 493, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 445, 0, 0x10c060050032ULL }, // Inst #493 = ADC8ri_ND |
| 41608 | { 492, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 170, 0, 0xc004060050032ULL }, // Inst #492 = ADC8ri_EVEX |
| 41609 | { 491, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 170, 0, 0x4100040032ULL }, // Inst #491 = ADC8ri8 |
| 41610 | { 490, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 170, 0, 0x4000040032ULL }, // Inst #490 = ADC8ri |
| 41611 | { 489, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 438, 0|(1ULL<<MCID::MayLoad), 0x108860010018ULL }, // Inst #489 = ADC8mr_ND |
| 41612 | { 488, 6, 0, 0, 931, 1, 1, X86ImpOpBase + 31, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc000860010018ULL }, // Inst #488 = ADC8mr_EVEX |
| 41613 | { 487, 6, 0, 0, 1018, 1, 1, X86ImpOpBase + 31, 432, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x800000018ULL }, // Inst #487 = ADC8mr |
| 41614 | { 486, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 425, 0|(1ULL<<MCID::MayLoad), 0x10c060050022ULL }, // Inst #486 = ADC8mi_ND |
| 41615 | { 485, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc004060050022ULL }, // Inst #485 = ADC8mi_EVEX |
| 41616 | { 484, 6, 0, 0, 1437, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040022ULL }, // Inst #484 = ADC8mi8 |
| 41617 | { 483, 6, 0, 0, 1437, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040022ULL }, // Inst #483 = ADC8mi |
| 41618 | { 482, 1, 0, 0, 910, 2, 2, X86ImpOpBase + 65, 1, 0, 0xa00040001ULL }, // Inst #482 = ADC8i8 |
| 41619 | { 481, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0x980020029ULL }, // Inst #481 = ADC64rr_REV |
| 41620 | { 480, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 422, 0, 0x1089e0030029ULL }, // Inst #480 = ADC64rr_ND_REV |
| 41621 | { 479, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 422, 0|(1ULL<<MCID::Commutable), 0x1088e0030028ULL }, // Inst #479 = ADC64rr_ND |
| 41622 | { 478, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0xc0009e0030029ULL }, // Inst #478 = ADC64rr_EVEX_REV |
| 41623 | { 477, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0, 0xc0008e0030028ULL }, // Inst #477 = ADC64rr_EVEX |
| 41624 | { 476, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 167, 0|(1ULL<<MCID::Commutable), 0x880020028ULL }, // Inst #476 = ADC64rr |
| 41625 | { 475, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 415, 0|(1ULL<<MCID::MayLoad), 0x1089e0030019ULL }, // Inst #475 = ADC64rm_ND |
| 41626 | { 474, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 408, 0|(1ULL<<MCID::MayLoad), 0xc0009e0030019ULL }, // Inst #474 = ADC64rm_EVEX |
| 41627 | { 473, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 408, 0|(1ULL<<MCID::MayLoad), 0x980020019ULL }, // Inst #473 = ADC64rm |
| 41628 | { 472, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 405, 0, 0x10c1e0070032ULL }, // Inst #472 = ADC64ri8_ND |
| 41629 | { 471, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 164, 0, 0xc0041e0070032ULL }, // Inst #471 = ADC64ri8_EVEX |
| 41630 | { 470, 3, 1, 0, 909, 1, 1, X86ImpOpBase + 31, 164, 0, 0x4180060032ULL }, // Inst #470 = ADC64ri8 |
| 41631 | { 469, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 405, 0, 0x10c0e0230032ULL }, // Inst #469 = ADC64ri32_ND |
| 41632 | { 468, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 164, 0, 0xc0040e0230032ULL }, // Inst #468 = ADC64ri32_EVEX |
| 41633 | { 467, 3, 1, 0, 1155, 1, 1, X86ImpOpBase + 31, 164, 0, 0x4080220032ULL }, // Inst #467 = ADC64ri32 |
| 41634 | { 466, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 398, 0|(1ULL<<MCID::MayLoad), 0x1088e0030018ULL }, // Inst #466 = ADC64mr_ND |
| 41635 | { 465, 6, 0, 0, 931, 1, 1, X86ImpOpBase + 31, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0008e0030018ULL }, // Inst #465 = ADC64mr_EVEX |
| 41636 | { 464, 6, 0, 0, 797, 1, 1, X86ImpOpBase + 31, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880020018ULL }, // Inst #464 = ADC64mr |
| 41637 | { 463, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 391, 0|(1ULL<<MCID::MayLoad), 0x10c1e0070022ULL }, // Inst #463 = ADC64mi8_ND |
| 41638 | { 462, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0070022ULL }, // Inst #462 = ADC64mi8_EVEX |
| 41639 | { 461, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060022ULL }, // Inst #461 = ADC64mi8 |
| 41640 | { 460, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 391, 0|(1ULL<<MCID::MayLoad), 0x10c0e0230022ULL }, // Inst #460 = ADC64mi32_ND |
| 41641 | { 459, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0230022ULL }, // Inst #459 = ADC64mi32_EVEX |
| 41642 | { 458, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080220022ULL }, // Inst #458 = ADC64mi32 |
| 41643 | { 457, 1, 0, 0, 910, 2, 2, X86ImpOpBase + 61, 1, 0, 0xa80220001ULL }, // Inst #457 = ADC64i32 |
| 41644 | { 456, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0x980000129ULL }, // Inst #456 = ADC32rr_REV |
| 41645 | { 455, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 225, 0, 0x1089e0010029ULL }, // Inst #455 = ADC32rr_ND_REV |
| 41646 | { 454, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 225, 0|(1ULL<<MCID::Commutable), 0x1088e0010028ULL }, // Inst #454 = ADC32rr_ND |
| 41647 | { 453, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0xc0009e0010029ULL }, // Inst #453 = ADC32rr_EVEX_REV |
| 41648 | { 452, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0, 0xc0008e0010028ULL }, // Inst #452 = ADC32rr_EVEX |
| 41649 | { 451, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 161, 0|(1ULL<<MCID::Commutable), 0x880000128ULL }, // Inst #451 = ADC32rr |
| 41650 | { 450, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 384, 0|(1ULL<<MCID::MayLoad), 0x1089e0010019ULL }, // Inst #450 = ADC32rm_ND |
| 41651 | { 449, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 377, 0|(1ULL<<MCID::MayLoad), 0xc0009e0010019ULL }, // Inst #449 = ADC32rm_EVEX |
| 41652 | { 448, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 377, 0|(1ULL<<MCID::MayLoad), 0x980000119ULL }, // Inst #448 = ADC32rm |
| 41653 | { 447, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 374, 0, 0x10c0e0190032ULL }, // Inst #447 = ADC32ri_ND |
| 41654 | { 446, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 158, 0, 0xc0040e0190032ULL }, // Inst #446 = ADC32ri_EVEX |
| 41655 | { 445, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 374, 0, 0x10c1e0050032ULL }, // Inst #445 = ADC32ri8_ND |
| 41656 | { 444, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 158, 0, 0xc0041e0050032ULL }, // Inst #444 = ADC32ri8_EVEX |
| 41657 | { 443, 3, 1, 0, 909, 1, 1, X86ImpOpBase + 31, 158, 0, 0x4180040132ULL }, // Inst #443 = ADC32ri8 |
| 41658 | { 442, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 158, 0, 0x4080180132ULL }, // Inst #442 = ADC32ri |
| 41659 | { 441, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 367, 0|(1ULL<<MCID::MayLoad), 0x1088e0010018ULL }, // Inst #441 = ADC32mr_ND |
| 41660 | { 440, 6, 0, 0, 931, 1, 1, X86ImpOpBase + 31, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0008e0010018ULL }, // Inst #440 = ADC32mr_EVEX |
| 41661 | { 439, 6, 0, 0, 797, 1, 1, X86ImpOpBase + 31, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880000118ULL }, // Inst #439 = ADC32mr |
| 41662 | { 438, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 360, 0|(1ULL<<MCID::MayLoad), 0x10c0e0190022ULL }, // Inst #438 = ADC32mi_ND |
| 41663 | { 437, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0190022ULL }, // Inst #437 = ADC32mi_EVEX |
| 41664 | { 436, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 360, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050022ULL }, // Inst #436 = ADC32mi8_ND |
| 41665 | { 435, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050022ULL }, // Inst #435 = ADC32mi8_EVEX |
| 41666 | { 434, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040122ULL }, // Inst #434 = ADC32mi8 |
| 41667 | { 433, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080180122ULL }, // Inst #433 = ADC32mi |
| 41668 | { 432, 1, 0, 0, 910, 2, 2, X86ImpOpBase + 57, 1, 0, 0xa80180101ULL }, // Inst #432 = ADC32i32 |
| 41669 | { 431, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 155, 0, 0x9800000a9ULL }, // Inst #431 = ADC16rr_REV |
| 41670 | { 430, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 357, 0, 0x1089e0010829ULL }, // Inst #430 = ADC16rr_ND_REV |
| 41671 | { 429, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 357, 0|(1ULL<<MCID::Commutable), 0x1088e0010828ULL }, // Inst #429 = ADC16rr_ND |
| 41672 | { 428, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 155, 0, 0xc0009e0010829ULL }, // Inst #428 = ADC16rr_EVEX_REV |
| 41673 | { 427, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 155, 0, 0xc0008e0010828ULL }, // Inst #427 = ADC16rr_EVEX |
| 41674 | { 426, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 155, 0|(1ULL<<MCID::Commutable), 0x8800000a8ULL }, // Inst #426 = ADC16rr |
| 41675 | { 425, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 350, 0|(1ULL<<MCID::MayLoad), 0x1089e0010819ULL }, // Inst #425 = ADC16rm_ND |
| 41676 | { 424, 7, 1, 0, 23, 1, 1, X86ImpOpBase + 31, 343, 0|(1ULL<<MCID::MayLoad), 0xc0009e0010819ULL }, // Inst #424 = ADC16rm_EVEX |
| 41677 | { 423, 7, 1, 0, 1436, 1, 1, X86ImpOpBase + 31, 343, 0|(1ULL<<MCID::MayLoad), 0x980000099ULL }, // Inst #423 = ADC16rm |
| 41678 | { 422, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 340, 0, 0x10c0e0110832ULL }, // Inst #422 = ADC16ri_ND |
| 41679 | { 421, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 152, 0, 0xc0040e0110832ULL }, // Inst #421 = ADC16ri_EVEX |
| 41680 | { 420, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 340, 0, 0x10c1e0050832ULL }, // Inst #420 = ADC16ri8_ND |
| 41681 | { 419, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 152, 0, 0xc0041e0050832ULL }, // Inst #419 = ADC16ri8_EVEX |
| 41682 | { 418, 3, 1, 0, 909, 1, 1, X86ImpOpBase + 31, 152, 0, 0x41800400b2ULL }, // Inst #418 = ADC16ri8 |
| 41683 | { 417, 3, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 152, 0, 0x40801000b2ULL }, // Inst #417 = ADC16ri |
| 41684 | { 416, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 333, 0|(1ULL<<MCID::MayLoad), 0x1088e0010818ULL }, // Inst #416 = ADC16mr_ND |
| 41685 | { 415, 6, 0, 0, 931, 1, 1, X86ImpOpBase + 31, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0008e0010818ULL }, // Inst #415 = ADC16mr_EVEX |
| 41686 | { 414, 6, 0, 0, 797, 1, 1, X86ImpOpBase + 31, 327, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880000098ULL }, // Inst #414 = ADC16mr |
| 41687 | { 413, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 320, 0|(1ULL<<MCID::MayLoad), 0x10c0e0110822ULL }, // Inst #413 = ADC16mi_ND |
| 41688 | { 412, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0040e0110822ULL }, // Inst #412 = ADC16mi_EVEX |
| 41689 | { 411, 7, 1, 0, 930, 1, 1, X86ImpOpBase + 31, 320, 0|(1ULL<<MCID::MayLoad), 0x10c1e0050822ULL }, // Inst #411 = ADC16mi8_ND |
| 41690 | { 410, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0041e0050822ULL }, // Inst #410 = ADC16mi8_EVEX |
| 41691 | { 409, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x41800400a2ULL }, // Inst #409 = ADC16mi8 |
| 41692 | { 408, 6, 0, 0, 929, 1, 1, X86ImpOpBase + 31, 314, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801000a2ULL }, // Inst #408 = ADC16mi |
| 41693 | { 407, 1, 0, 0, 910, 2, 2, X86ImpOpBase + 53, 1, 0, 0xa80100081ULL }, // Inst #407 = ADC16i16 |
| 41694 | { 406, 2, 1, 0, 19, 0, 1, X86ImpOpBase + 52, 312, 0, 0xc00000ULL }, // Inst #406 = ABS_Fp80 |
| 41695 | { 405, 2, 1, 0, 19, 0, 1, X86ImpOpBase + 52, 310, 0, 0xc00000ULL }, // Inst #405 = ABS_Fp64 |
| 41696 | { 404, 2, 1, 0, 19, 0, 1, X86ImpOpBase + 52, 308, 0, 0xc00000ULL }, // Inst #404 = ABS_Fp32 |
| 41697 | { 403, 0, 0, 0, 19, 0, 1, X86ImpOpBase + 52, 1, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000061ULL }, // Inst #403 = ABS_F |
| 41698 | { 402, 0, 0, 0, 690, 2, 2, X86ImpOpBase + 42, 1, 0, 0x1f80000001ULL }, // Inst #402 = AAS |
| 41699 | { 401, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60030818ULL }, // Inst #401 = AAND64mr_EVEX |
| 41700 | { 400, 6, 0, 0, 1432, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00024818ULL }, // Inst #400 = AAND64mr |
| 41701 | { 399, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60010818ULL }, // Inst #399 = AAND32mr_EVEX |
| 41702 | { 398, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00004818ULL }, // Inst #398 = AAND32mr |
| 41703 | { 397, 1, 0, 0, 698, 1, 2, X86ImpOpBase + 49, 1, 0, 0x6a00040001ULL }, // Inst #397 = AAM8i8 |
| 41704 | { 396, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60030018ULL }, // Inst #396 = AADD64mr_EVEX |
| 41705 | { 395, 6, 0, 0, 1432, 0, 0, X86ImpOpBase + 0, 210, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00024018ULL }, // Inst #395 = AADD64mr |
| 41706 | { 394, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e60010018ULL }, // Inst #394 = AADD32mr_EVEX |
| 41707 | { 393, 6, 0, 0, 18, 0, 0, X86ImpOpBase + 0, 302, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7e00004018ULL }, // Inst #393 = AADD32mr |
| 41708 | { 392, 1, 0, 0, 677, 1, 2, X86ImpOpBase + 46, 1, 0, 0x6a80040001ULL }, // Inst #392 = AAD8i8 |
| 41709 | { 391, 0, 0, 0, 690, 2, 2, X86ImpOpBase + 42, 1, 0, 0x1b80000001ULL }, // Inst #391 = AAA |
| 41710 | { 390, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 300, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #390 = XOR64_FP |
| 41711 | { 389, 2, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 298, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #389 = XOR32_FP |
| 41712 | { 388, 0, 0, 0, 8, 0, 1, X86ImpOpBase + 41, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #388 = XABORT_DEF |
| 41713 | { 387, 1, 0, 0, 10, 1, 3, X86ImpOpBase + 37, 202, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #387 = WRFLAGS64 |
| 41714 | { 386, 1, 0, 0, 10, 1, 3, X86ImpOpBase + 33, 201, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #386 = WRFLAGS32 |
| 41715 | { 385, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 197, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #385 = V_SETALLONES |
| 41716 | { 384, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 197, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #384 = V_SET0 |
| 41717 | { 383, 6, 1, 0, 1319, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #383 = VMOVUPSZ256rm_NOVLX |
| 41718 | { 382, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #382 = VMOVUPSZ256mr_NOVLX |
| 41719 | { 381, 6, 1, 0, 1295, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #381 = VMOVUPSZ128rm_NOVLX |
| 41720 | { 380, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #380 = VMOVUPSZ128mr_NOVLX |
| 41721 | { 379, 6, 1, 0, 1319, 0, 0, X86ImpOpBase + 0, 292, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #379 = VMOVAPSZ256rm_NOVLX |
| 41722 | { 378, 6, 0, 0, 15, 0, 0, X86ImpOpBase + 0, 286, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #378 = VMOVAPSZ256mr_NOVLX |
| 41723 | { 377, 6, 1, 0, 1295, 0, 0, X86ImpOpBase + 0, 280, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #377 = VMOVAPSZ128rm_NOVLX |
| 41724 | { 376, 6, 0, 0, 13, 0, 0, X86ImpOpBase + 0, 274, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #376 = VMOVAPSZ128mr_NOVLX |
| 41725 | { 375, 3, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #375 = SHRDROT64ri |
| 41726 | { 374, 3, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #374 = SHRDROT32ri |
| 41727 | { 373, 3, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #373 = SHLDROT64ri |
| 41728 | { 372, 3, 1, 0, 12, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #372 = SHLDROT32ri |
| 41729 | { 371, 1, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 202, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #371 = SETB_C64r |
| 41730 | { 370, 1, 1, 0, 11, 1, 1, X86ImpOpBase + 31, 201, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #370 = SETB_C32r |
| 41731 | { 369, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #369 = SEH_StackAlloc |
| 41732 | { 368, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #368 = SEH_StackAlign |
| 41733 | { 367, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #367 = SEH_SetFrame |
| 41734 | { 366, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #366 = SEH_SaveXMM |
| 41735 | { 365, 2, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #365 = SEH_SaveReg |
| 41736 | { 364, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #364 = SEH_PushReg |
| 41737 | { 363, 1, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #363 = SEH_PushFrame |
| 41738 | { 362, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #362 = SEH_Epilogue |
| 41739 | { 361, 0, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #361 = SEH_EndPrologue |
| 41740 | { 360, 1, 1, 0, 10, 1, 1, X86ImpOpBase + 29, 202, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #360 = RDFLAGS64 |
| 41741 | { 359, 1, 1, 0, 10, 1, 1, X86ImpOpBase + 27, 201, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #359 = RDFLAGS32 |
| 41742 | { 358, 3, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 271, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #358 = PTILEZEROV |
| 41743 | { 357, 8, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 263, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #357 = PTILESTOREDV |
| 41744 | { 356, 8, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 255, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #356 = PTILELOADDV |
| 41745 | { 355, 8, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 255, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #355 = PTILELOADDT1V |
| 41746 | { 354, 7, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 248, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #354 = PTDPFP16PSV |
| 41747 | { 353, 7, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 248, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #353 = PTDPBUUDV |
| 41748 | { 352, 7, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 248, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #352 = PTDPBUSDV |
| 41749 | { 351, 7, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 248, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #351 = PTDPBSUDV |
| 41750 | { 350, 7, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 248, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #350 = PTDPBSSDV |
| 41751 | { 349, 7, 1, 0, 8, 0, 0, X86ImpOpBase + 0, 248, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #349 = PTDPBF16PSV |
| 41752 | { 348, 6, 1, 0, 9, 0, 0, X86ImpOpBase + 0, 242, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #348 = PLEA64r |
| 41753 | { 347, 6, 1, 0, 9, 0, 0, X86ImpOpBase + 0, 236, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #347 = PLEA32r |
| 41754 | { 346, 5, 0, 0, 8, 0, 8, X86ImpOpBase + 19, 231, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #346 = PLDTILECFGV |
| 41755 | { 345, 3, 1, 0, 8, 2, 1, X86ImpOpBase + 16, 228, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #345 = MWAITX_SAVE_RBX |
| 41756 | { 344, 3, 0, 0, 8, 0, 0, X86ImpOpBase + 0, 225, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #344 = MWAITX |
| 41757 | { 343, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #343 = MOV64ImmSExti8 |
| 41758 | { 342, 2, 1, 0, 7, 0, 0, X86ImpOpBase + 0, 205, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #342 = MOV32ri64 |
| 41759 | { 341, 1, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #341 = MOV32r_1 |
| 41760 | { 340, 1, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #340 = MOV32r1 |
| 41761 | { 339, 1, 1, 0, 2, 0, 1, X86ImpOpBase + 0, 201, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MoveImm)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #339 = MOV32r0 |
| 41762 | { 338, 2, 1, 0, 1, 0, 0, X86ImpOpBase + 0, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #338 = MOV32ImmSExti8 |
| 41763 | { 337, 0, 0, 0, 6, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #337 = MORESTACK_RET_RESTORE_R10 |
| 41764 | { 336, 0, 0, 0, 6, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #336 = MORESTACK_RET |
| 41765 | { 335, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 224, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #335 = MMX_SET0 |
| 41766 | { 334, 8, 1, 0, 5, 3, 4, X86ImpOpBase + 9, 216, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #334 = LCMPXCHG16B_SAVE_RBX |
| 41767 | { 333, 6, 0, 0, 5, 3, 3, X86ImpOpBase + 3, 210, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #333 = LCMPXCHG16B_NO_RBX |
| 41768 | { 332, 1, 1, 0, 1224, 0, 0, X86ImpOpBase + 0, 209, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #332 = KSET1W |
| 41769 | { 331, 1, 1, 0, 1224, 0, 0, X86ImpOpBase + 0, 208, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #331 = KSET1Q |
| 41770 | { 330, 1, 1, 0, 1224, 0, 0, X86ImpOpBase + 0, 207, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #330 = KSET1D |
| 41771 | { 329, 1, 1, 0, 1224, 0, 0, X86ImpOpBase + 0, 209, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #329 = KSET0W |
| 41772 | { 328, 1, 1, 0, 1224, 0, 0, X86ImpOpBase + 0, 208, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #328 = KSET0Q |
| 41773 | { 327, 1, 1, 0, 1224, 0, 0, X86ImpOpBase + 0, 207, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #327 = KSET0D |
| 41774 | { 326, 2, 0, 0, 4, 2, 0, X86ImpOpBase + 1, 205, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #326 = INDIRECT_THUNK_TCRETURN64 |
| 41775 | { 325, 2, 0, 0, 4, 2, 0, X86ImpOpBase + 1, 203, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #325 = INDIRECT_THUNK_TCRETURN32 |
| 41776 | { 324, 1, 0, 0, 4, 2, 0, X86ImpOpBase + 1, 202, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #324 = INDIRECT_THUNK_CALL64 |
| 41777 | { 323, 1, 0, 0, 4, 2, 0, X86ImpOpBase + 1, 201, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL }, // Inst #323 = INDIRECT_THUNK_CALL32 |
| 41778 | { 322, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 200, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #322 = FsFLD0SS |
| 41779 | { 321, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 199, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #321 = FsFLD0SH |
| 41780 | { 320, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 198, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #320 = FsFLD0SD |
| 41781 | { 319, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 197, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #319 = FsFLD0F128 |
| 41782 | { 318, 2, 0, 0, 764, 2, 0, X86ImpOpBase + 1, 195, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // Inst #318 = CALL64r_RVMARKER |
| 41783 | { 317, 2, 0, 0, 4, 2, 0, X86ImpOpBase + 1, 193, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call), 0x0ULL }, // Inst #317 = CALL64pcrel32_RVMARKER |
| 41784 | { 316, 6, 0, 0, 786, 2, 0, X86ImpOpBase + 1, 187, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #316 = CALL64m_RVMARKER |
| 41785 | { 315, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 176, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #315 = AVX_SET0 |
| 41786 | { 314, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 186, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #314 = AVX512_FsFLD0SS |
| 41787 | { 313, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 185, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #313 = AVX512_FsFLD0SH |
| 41788 | { 312, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 184, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #312 = AVX512_FsFLD0SD |
| 41789 | { 311, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #311 = AVX512_FsFLD0F128 |
| 41790 | { 310, 2, 1, 0, 3, 0, 0, X86ImpOpBase + 0, 182, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #310 = AVX512_512_SEXT_MASK_64 |
| 41791 | { 309, 2, 1, 0, 3, 0, 0, X86ImpOpBase + 0, 180, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #309 = AVX512_512_SEXT_MASK_32 |
| 41792 | { 308, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 179, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #308 = AVX512_512_SETALLONES |
| 41793 | { 307, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 179, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #307 = AVX512_512_SET0 |
| 41794 | { 306, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 178, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #306 = AVX512_256_SET0 |
| 41795 | { 305, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 177, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #305 = AVX512_128_SET0 |
| 41796 | { 304, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 176, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #304 = AVX2_SETALLONES |
| 41797 | { 303, 1, 1, 0, 2, 0, 0, X86ImpOpBase + 0, 176, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #303 = AVX1_SETALLONES |
| 41798 | { 302, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 173, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #302 = ADD8rr_DB |
| 41799 | { 301, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 170, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #301 = ADD8ri_DB |
| 41800 | { 300, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 167, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #300 = ADD64rr_DB |
| 41801 | { 299, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 164, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #299 = ADD64ri32_DB |
| 41802 | { 298, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 161, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #298 = ADD32rr_DB |
| 41803 | { 297, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 158, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #297 = ADD32ri_DB |
| 41804 | { 296, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 155, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #296 = ADD16rr_DB |
| 41805 | { 295, 3, 1, 0, 1, 0, 1, X86ImpOpBase + 0, 152, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL }, // Inst #295 = ADD16ri_DB |
| 41806 | { 294, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 148, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #294 = G_UBFX |
| 41807 | { 293, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 148, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #293 = G_SBFX |
| 41808 | { 292, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #292 = G_VECREDUCE_UMIN |
| 41809 | { 291, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #291 = G_VECREDUCE_UMAX |
| 41810 | { 290, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #290 = G_VECREDUCE_SMIN |
| 41811 | { 289, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #289 = G_VECREDUCE_SMAX |
| 41812 | { 288, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #288 = G_VECREDUCE_XOR |
| 41813 | { 287, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #287 = G_VECREDUCE_OR |
| 41814 | { 286, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #286 = G_VECREDUCE_AND |
| 41815 | { 285, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #285 = G_VECREDUCE_MUL |
| 41816 | { 284, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #284 = G_VECREDUCE_ADD |
| 41817 | { 283, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #283 = G_VECREDUCE_FMINIMUM |
| 41818 | { 282, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #282 = G_VECREDUCE_FMAXIMUM |
| 41819 | { 281, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #281 = G_VECREDUCE_FMIN |
| 41820 | { 280, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #280 = G_VECREDUCE_FMAX |
| 41821 | { 279, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #279 = G_VECREDUCE_FMUL |
| 41822 | { 278, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #278 = G_VECREDUCE_FADD |
| 41823 | { 277, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #277 = G_VECREDUCE_SEQ_FMUL |
| 41824 | { 276, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #276 = G_VECREDUCE_SEQ_FADD |
| 41825 | { 275, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #275 = G_UBSANTRAP |
| 41826 | { 274, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #274 = G_DEBUGTRAP |
| 41827 | { 273, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #273 = G_TRAP |
| 41828 | { 272, 3, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 58, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #272 = G_BZERO |
| 41829 | { 271, 4, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 144, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #271 = G_MEMSET |
| 41830 | { 270, 4, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 144, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #270 = G_MEMMOVE |
| 41831 | { 269, 3, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #269 = G_MEMCPY_INLINE |
| 41832 | { 268, 4, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 144, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #268 = G_MEMCPY |
| 41833 | { 267, 2, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 142, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #267 = G_WRITE_REGISTER |
| 41834 | { 266, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #266 = G_READ_REGISTER |
| 41835 | { 265, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #265 = G_STRICT_FLDEXP |
| 41836 | { 264, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #264 = G_STRICT_FSQRT |
| 41837 | { 263, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #263 = G_STRICT_FMA |
| 41838 | { 262, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #262 = G_STRICT_FREM |
| 41839 | { 261, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #261 = G_STRICT_FDIV |
| 41840 | { 260, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #260 = G_STRICT_FMUL |
| 41841 | { 259, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #259 = G_STRICT_FSUB |
| 41842 | { 258, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayRaiseFPException)|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #258 = G_STRICT_FADD |
| 41843 | { 257, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #257 = G_STACKRESTORE |
| 41844 | { 256, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #256 = G_STACKSAVE |
| 41845 | { 255, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 69, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #255 = G_DYN_STACKALLOC |
| 41846 | { 254, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #254 = G_JUMP_TABLE |
| 41847 | { 253, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #253 = G_BLOCK_ADDR |
| 41848 | { 252, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #252 = G_ADDRSPACE_CAST |
| 41849 | { 251, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #251 = G_FNEARBYINT |
| 41850 | { 250, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #250 = G_FRINT |
| 41851 | { 249, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #249 = G_FFLOOR |
| 41852 | { 248, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #248 = G_FSQRT |
| 41853 | { 247, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #247 = G_FTANH |
| 41854 | { 246, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #246 = G_FSINH |
| 41855 | { 245, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #245 = G_FCOSH |
| 41856 | { 244, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #244 = G_FATAN |
| 41857 | { 243, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #243 = G_FASIN |
| 41858 | { 242, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #242 = G_FACOS |
| 41859 | { 241, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #241 = G_FTAN |
| 41860 | { 240, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #240 = G_FSIN |
| 41861 | { 239, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #239 = G_FCOS |
| 41862 | { 238, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #238 = G_FCEIL |
| 41863 | { 237, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #237 = G_BITREVERSE |
| 41864 | { 236, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #236 = G_BSWAP |
| 41865 | { 235, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #235 = G_CTPOP |
| 41866 | { 234, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #234 = G_CTLZ_ZERO_UNDEF |
| 41867 | { 233, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #233 = G_CTLZ |
| 41868 | { 232, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #232 = G_CTTZ_ZERO_UNDEF |
| 41869 | { 231, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #231 = G_CTTZ |
| 41870 | { 230, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 138, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #230 = G_VECTOR_COMPRESS |
| 41871 | { 229, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #229 = G_SPLAT_VECTOR |
| 41872 | { 228, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 134, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #228 = G_SHUFFLE_VECTOR |
| 41873 | { 227, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 131, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #227 = G_EXTRACT_VECTOR_ELT |
| 41874 | { 226, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 127, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #226 = G_INSERT_VECTOR_ELT |
| 41875 | { 225, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #225 = G_EXTRACT_SUBVECTOR |
| 41876 | { 224, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 63, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #224 = G_INSERT_SUBVECTOR |
| 41877 | { 223, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #223 = G_VSCALE |
| 41878 | { 222, 3, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 124, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #222 = G_BRJT |
| 41879 | { 221, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #221 = G_BR |
| 41880 | { 220, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #220 = G_LLROUND |
| 41881 | { 219, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #219 = G_LROUND |
| 41882 | { 218, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #218 = G_ABS |
| 41883 | { 217, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #217 = G_UMAX |
| 41884 | { 216, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #216 = G_UMIN |
| 41885 | { 215, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #215 = G_SMAX |
| 41886 | { 214, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #214 = G_SMIN |
| 41887 | { 213, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #213 = G_PTRMASK |
| 41888 | { 212, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #212 = G_PTR_ADD |
| 41889 | { 211, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #211 = G_RESET_FPMODE |
| 41890 | { 210, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #210 = G_SET_FPMODE |
| 41891 | { 209, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #209 = G_GET_FPMODE |
| 41892 | { 208, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #208 = G_RESET_FPENV |
| 41893 | { 207, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #207 = G_SET_FPENV |
| 41894 | { 206, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #206 = G_GET_FPENV |
| 41895 | { 205, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #205 = G_FMAXIMUM |
| 41896 | { 204, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #204 = G_FMINIMUM |
| 41897 | { 203, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #203 = G_FMAXNUM_IEEE |
| 41898 | { 202, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #202 = G_FMINNUM_IEEE |
| 41899 | { 201, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #201 = G_FMAXNUM |
| 41900 | { 200, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #200 = G_FMINNUM |
| 41901 | { 199, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #199 = G_FCANONICALIZE |
| 41902 | { 198, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 98, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #198 = G_IS_FPCLASS |
| 41903 | { 197, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #197 = G_FCOPYSIGN |
| 41904 | { 196, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #196 = G_FABS |
| 41905 | { 195, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #195 = G_UITOFP |
| 41906 | { 194, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #194 = G_SITOFP |
| 41907 | { 193, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #193 = G_FPTOUI |
| 41908 | { 192, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #192 = G_FPTOSI |
| 41909 | { 191, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #191 = G_FPTRUNC |
| 41910 | { 190, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #190 = G_FPEXT |
| 41911 | { 189, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #189 = G_FNEG |
| 41912 | { 188, 3, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #188 = G_FFREXP |
| 41913 | { 187, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #187 = G_FLDEXP |
| 41914 | { 186, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #186 = G_FLOG10 |
| 41915 | { 185, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #185 = G_FLOG2 |
| 41916 | { 184, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #184 = G_FLOG |
| 41917 | { 183, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #183 = G_FEXP10 |
| 41918 | { 182, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #182 = G_FEXP2 |
| 41919 | { 181, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #181 = G_FEXP |
| 41920 | { 180, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #180 = G_FPOWI |
| 41921 | { 179, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #179 = G_FPOW |
| 41922 | { 178, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #178 = G_FREM |
| 41923 | { 177, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #177 = G_FDIV |
| 41924 | { 176, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #176 = G_FMAD |
| 41925 | { 175, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #175 = G_FMA |
| 41926 | { 174, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #174 = G_FMUL |
| 41927 | { 173, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #173 = G_FSUB |
| 41928 | { 172, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #172 = G_FADD |
| 41929 | { 171, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #171 = G_UDIVFIXSAT |
| 41930 | { 170, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #170 = G_SDIVFIXSAT |
| 41931 | { 169, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #169 = G_UDIVFIX |
| 41932 | { 168, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #168 = G_SDIVFIX |
| 41933 | { 167, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #167 = G_UMULFIXSAT |
| 41934 | { 166, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #166 = G_SMULFIXSAT |
| 41935 | { 165, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #165 = G_UMULFIX |
| 41936 | { 164, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 120, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #164 = G_SMULFIX |
| 41937 | { 163, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #163 = G_SSHLSAT |
| 41938 | { 162, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #162 = G_USHLSAT |
| 41939 | { 161, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #161 = G_SSUBSAT |
| 41940 | { 160, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #160 = G_USUBSAT |
| 41941 | { 159, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #159 = G_SADDSAT |
| 41942 | { 158, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #158 = G_UADDSAT |
| 41943 | { 157, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #157 = G_SMULH |
| 41944 | { 156, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #156 = G_UMULH |
| 41945 | { 155, 4, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #155 = G_SMULO |
| 41946 | { 154, 4, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #154 = G_UMULO |
| 41947 | { 153, 5, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #153 = G_SSUBE |
| 41948 | { 152, 4, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #152 = G_SSUBO |
| 41949 | { 151, 5, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #151 = G_SADDE |
| 41950 | { 150, 4, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #150 = G_SADDO |
| 41951 | { 149, 5, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #149 = G_USUBE |
| 41952 | { 148, 4, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #148 = G_USUBO |
| 41953 | { 147, 5, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 115, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #147 = G_UADDE |
| 41954 | { 146, 4, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #146 = G_UADDO |
| 41955 | { 145, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #145 = G_SELECT |
| 41956 | { 144, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #144 = G_UCMP |
| 41957 | { 143, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 112, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #143 = G_SCMP |
| 41958 | { 142, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 108, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #142 = G_FCMP |
| 41959 | { 141, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 108, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #141 = G_ICMP |
| 41960 | { 140, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #140 = G_ROTL |
| 41961 | { 139, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #139 = G_ROTR |
| 41962 | { 138, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 104, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #138 = G_FSHR |
| 41963 | { 137, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 104, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #137 = G_FSHL |
| 41964 | { 136, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #136 = G_ASHR |
| 41965 | { 135, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #135 = G_LSHR |
| 41966 | { 134, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 101, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #134 = G_SHL |
| 41967 | { 133, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #133 = G_ZEXT |
| 41968 | { 132, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #132 = G_SEXT_INREG |
| 41969 | { 131, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #131 = G_SEXT |
| 41970 | { 130, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 98, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #130 = G_VAARG |
| 41971 | { 129, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #129 = G_VASTART |
| 41972 | { 128, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #128 = G_FCONSTANT |
| 41973 | { 127, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #127 = G_CONSTANT |
| 41974 | { 126, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #126 = G_TRUNC |
| 41975 | { 125, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #125 = G_ANYEXT |
| 41976 | { 124, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #124 = G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS |
| 41977 | { 123, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #123 = G_INTRINSIC_CONVERGENT |
| 41978 | { 122, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #122 = G_INTRINSIC_W_SIDE_EFFECTS |
| 41979 | { 121, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #121 = G_INTRINSIC |
| 41980 | { 120, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #120 = G_INVOKE_REGION_START |
| 41981 | { 119, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #119 = G_BRINDIRECT |
| 41982 | { 118, 2, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x0ULL }, // Inst #118 = G_BRCOND |
| 41983 | { 117, 4, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 94, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #117 = G_PREFETCH |
| 41984 | { 116, 2, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 21, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #116 = G_FENCE |
| 41985 | { 115, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #115 = G_ATOMICRMW_UDEC_WRAP |
| 41986 | { 114, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #114 = G_ATOMICRMW_UINC_WRAP |
| 41987 | { 113, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #113 = G_ATOMICRMW_FMIN |
| 41988 | { 112, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #112 = G_ATOMICRMW_FMAX |
| 41989 | { 111, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #111 = G_ATOMICRMW_FSUB |
| 41990 | { 110, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #110 = G_ATOMICRMW_FADD |
| 41991 | { 109, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #109 = G_ATOMICRMW_UMIN |
| 41992 | { 108, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #108 = G_ATOMICRMW_UMAX |
| 41993 | { 107, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #107 = G_ATOMICRMW_MIN |
| 41994 | { 106, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #106 = G_ATOMICRMW_MAX |
| 41995 | { 105, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #105 = G_ATOMICRMW_XOR |
| 41996 | { 104, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #104 = G_ATOMICRMW_OR |
| 41997 | { 103, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #103 = G_ATOMICRMW_NAND |
| 41998 | { 102, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #102 = G_ATOMICRMW_AND |
| 41999 | { 101, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #101 = G_ATOMICRMW_SUB |
| 42000 | { 100, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #100 = G_ATOMICRMW_ADD |
| 42001 | { 99, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 91, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #99 = G_ATOMICRMW_XCHG |
| 42002 | { 98, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 87, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #98 = G_ATOMIC_CMPXCHG |
| 42003 | { 97, 5, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 82, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #97 = G_ATOMIC_CMPXCHG_WITH_SUCCESS |
| 42004 | { 96, 5, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 77, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #96 = G_INDEXED_STORE |
| 42005 | { 95, 2, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayStore), 0x0ULL }, // Inst #95 = G_STORE |
| 42006 | { 94, 5, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #94 = G_INDEXED_ZEXTLOAD |
| 42007 | { 93, 5, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #93 = G_INDEXED_SEXTLOAD |
| 42008 | { 92, 5, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 72, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #92 = G_INDEXED_LOAD |
| 42009 | { 91, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #91 = G_ZEXTLOAD |
| 42010 | { 90, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #90 = G_SEXTLOAD |
| 42011 | { 89, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad), 0x0ULL }, // Inst #89 = G_LOAD |
| 42012 | { 88, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #88 = G_READSTEADYCOUNTER |
| 42013 | { 87, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #87 = G_READCYCLECOUNTER |
| 42014 | { 86, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #86 = G_INTRINSIC_ROUNDEVEN |
| 42015 | { 85, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #85 = G_INTRINSIC_LLRINT |
| 42016 | { 84, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #84 = G_INTRINSIC_LRINT |
| 42017 | { 83, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #83 = G_INTRINSIC_ROUND |
| 42018 | { 82, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #82 = G_INTRINSIC_TRUNC |
| 42019 | { 81, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 69, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #81 = G_INTRINSIC_FPTRUNC_ROUND |
| 42020 | { 80, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #80 = G_CONSTANT_FOLD_BARRIER |
| 42021 | { 79, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 67, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #79 = G_FREEZE |
| 42022 | { 78, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #78 = G_BITCAST |
| 42023 | { 77, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #77 = G_INTTOPTR |
| 42024 | { 76, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #76 = G_PTRTOINT |
| 42025 | { 75, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #75 = G_CONCAT_VECTORS |
| 42026 | { 74, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #74 = G_BUILD_VECTOR_TRUNC |
| 42027 | { 73, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #73 = G_BUILD_VECTOR |
| 42028 | { 72, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #72 = G_MERGE_VALUES |
| 42029 | { 71, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 63, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #71 = G_INSERT |
| 42030 | { 70, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 61, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #70 = G_UNMERGE_VALUES |
| 42031 | { 69, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 58, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #69 = G_EXTRACT |
| 42032 | { 68, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #68 = G_CONSTANT_POOL |
| 42033 | { 67, 5, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 53, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #67 = G_PTRAUTH_GLOBAL_VALUE |
| 42034 | { 66, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #66 = G_GLOBAL_VALUE |
| 42035 | { 65, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 51, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #65 = G_FRAME_INDEX |
| 42036 | { 64, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #64 = G_PHI |
| 42037 | { 63, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 50, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #63 = G_IMPLICIT_DEF |
| 42038 | { 62, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #62 = G_XOR |
| 42039 | { 61, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #61 = G_OR |
| 42040 | { 60, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #60 = G_AND |
| 42041 | { 59, 4, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #59 = G_UDIVREM |
| 42042 | { 58, 4, 2, 0, 0, 0, 0, X86ImpOpBase + 0, 46, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #58 = G_SDIVREM |
| 42043 | { 57, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #57 = G_UREM |
| 42044 | { 56, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #56 = G_SREM |
| 42045 | { 55, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #55 = G_UDIV |
| 42046 | { 54, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #54 = G_SDIV |
| 42047 | { 53, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #53 = G_MUL |
| 42048 | { 52, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #52 = G_SUB |
| 42049 | { 51, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 43, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL }, // Inst #51 = G_ADD |
| 42050 | { 50, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #50 = G_ASSERT_ALIGN |
| 42051 | { 49, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #49 = G_ASSERT_ZEXT |
| 42052 | { 48, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 40, 0|(1ULL<<MCID::PreISelOpcode)|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #48 = G_ASSERT_SEXT |
| 42053 | { 47, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #47 = CONVERGENCECTRL_GLUE |
| 42054 | { 46, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #46 = CONVERGENCECTRL_LOOP |
| 42055 | { 45, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #45 = CONVERGENCECTRL_ANCHOR |
| 42056 | { 44, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Convergent), 0x0ULL }, // Inst #44 = CONVERGENCECTRL_ENTRY |
| 42057 | { 43, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #43 = JUMP_TABLE_DEBUG_INFO |
| 42058 | { 42, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #42 = MEMBARRIER |
| 42059 | { 41, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #41 = ICALL_BRANCH_FUNNEL |
| 42060 | { 40, 3, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 37, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #40 = PATCHABLE_TYPED_EVENT_CALL |
| 42061 | { 39, 2, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 35, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #39 = PATCHABLE_EVENT_CALL |
| 42062 | { 38, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #38 = PATCHABLE_TAIL_CALL |
| 42063 | { 37, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #37 = PATCHABLE_FUNCTION_EXIT |
| 42064 | { 36, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Return)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #36 = PATCHABLE_RET |
| 42065 | { 35, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #35 = PATCHABLE_FUNCTION_ENTER |
| 42066 | { 34, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #34 = PATCHABLE_OP |
| 42067 | { 33, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #33 = FAULTING_OP |
| 42068 | { 32, 2, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 33, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #32 = LOCAL_ESCAPE |
| 42069 | { 31, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #31 = STATEPOINT |
| 42070 | { 30, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 30, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #30 = PREALLOCATED_ARG |
| 42071 | { 29, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #29 = PREALLOCATED_SETUP |
| 42072 | { 28, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 29, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL }, // Inst #28 = LOAD_STACK_GUARD |
| 42073 | { 27, 6, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 23, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #27 = PATCHPOINT |
| 42074 | { 26, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #26 = FENTRY_CALL |
| 42075 | { 25, 2, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 21, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #25 = STACKMAP |
| 42076 | { 24, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 19, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #24 = ARITH_FENCE |
| 42077 | { 23, 4, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 15, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #23 = PSEUDO_PROBE |
| 42078 | { 22, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #22 = LIFETIME_END |
| 42079 | { 21, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #21 = LIFETIME_START |
| 42080 | { 20, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #20 = BUNDLE |
| 42081 | { 19, 2, 1, 0, 601, 0, 0, X86ImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #19 = COPY |
| 42082 | { 18, 2, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 13, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #18 = REG_SEQUENCE |
| 42083 | { 17, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta), 0x0ULL }, // Inst #17 = DBG_LABEL |
| 42084 | { 16, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #16 = DBG_PHI |
| 42085 | { 15, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #15 = DBG_INSTR_REF |
| 42086 | { 14, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #14 = DBG_VALUE_LIST |
| 42087 | { 13, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #13 = DBG_VALUE |
| 42088 | { 12, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 2, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #12 = COPY_TO_REGCLASS |
| 42089 | { 11, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 9, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #11 = SUBREG_TO_REG |
| 42090 | { 10, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL }, // Inst #10 = IMPLICIT_DEF |
| 42091 | { 9, 4, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 5, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #9 = INSERT_SUBREG |
| 42092 | { 8, 3, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 2, 0|(1ULL<<MCID::Pseudo), 0x0ULL }, // Inst #8 = EXTRACT_SUBREG |
| 42093 | { 7, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #7 = KILL |
| 42094 | { 6, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #6 = ANNOTATION_LABEL |
| 42095 | { 5, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #5 = GC_LABEL |
| 42096 | { 4, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #4 = EH_LABEL |
| 42097 | { 3, 1, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Meta)|(1ULL<<MCID::NotDuplicable), 0x0ULL }, // Inst #3 = CFI_INSTRUCTION |
| 42098 | { 2, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL }, // Inst #2 = INLINEASM_BR |
| 42099 | { 1, 0, 0, 0, 0, 0, 0, X86ImpOpBase + 0, 1, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #1 = INLINEASM |
| 42100 | { 0, 1, 1, 0, 0, 0, 0, X86ImpOpBase + 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL }, // Inst #0 = PHI |
| 42101 | }, { |
| 42102 | /* 0 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42103 | /* 1 */ |
| 42104 | /* 1 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42105 | /* 2 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42106 | /* 5 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42107 | /* 9 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42108 | /* 13 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42109 | /* 15 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42110 | /* 19 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, |
| 42111 | /* 21 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42112 | /* 23 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42113 | /* 29 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
| 42114 | /* 30 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42115 | /* 33 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42116 | /* 35 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42117 | /* 37 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42118 | /* 40 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 42119 | /* 43 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 42120 | /* 46 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 42121 | /* 50 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 42122 | /* 51 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42123 | /* 53 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42124 | /* 58 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 42125 | /* 61 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 42126 | /* 63 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 42127 | /* 67 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 42128 | /* 69 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42129 | /* 72 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42130 | /* 77 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42131 | /* 82 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 42132 | /* 87 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 42133 | /* 91 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 42134 | /* 94 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42135 | /* 98 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42136 | /* 101 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 42137 | /* 104 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 42138 | /* 108 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 42139 | /* 112 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 42140 | /* 115 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 42141 | /* 120 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 42142 | /* 124 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 42143 | /* 127 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
| 42144 | /* 131 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, |
| 42145 | /* 134 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42146 | /* 138 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 42147 | /* 142 */ { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, |
| 42148 | /* 144 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_2, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_IMM_0, 0 }, |
| 42149 | /* 148 */ { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_0, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, { -1, 0, MCOI::OPERAND_GENERIC_1, 0 }, |
| 42150 | /* 152 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42151 | /* 155 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42152 | /* 158 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42153 | /* 161 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42154 | /* 164 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42155 | /* 167 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42156 | /* 170 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42157 | /* 173 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42158 | /* 176 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42159 | /* 177 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42160 | /* 178 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42161 | /* 179 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42162 | /* 180 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42163 | /* 182 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42164 | /* 184 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42165 | /* 185 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42166 | /* 186 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42167 | /* 187 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42168 | /* 193 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, |
| 42169 | /* 195 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42170 | /* 197 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42171 | /* 198 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42172 | /* 199 */ { X86::FR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42173 | /* 200 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42174 | /* 201 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42175 | /* 202 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42176 | /* 203 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42177 | /* 205 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42178 | /* 207 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42179 | /* 208 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42180 | /* 209 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42181 | /* 210 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42182 | /* 216 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 42183 | /* 224 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42184 | /* 225 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42185 | /* 228 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 42186 | /* 231 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42187 | /* 236 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42188 | /* 242 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42189 | /* 248 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42190 | /* 255 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42191 | /* 263 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42192 | /* 271 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42193 | /* 274 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42194 | /* 280 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42195 | /* 286 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42196 | /* 292 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42197 | /* 298 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 42198 | /* 300 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 42199 | /* 302 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42200 | /* 308 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42201 | /* 310 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42202 | /* 312 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42203 | /* 314 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42204 | /* 320 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42205 | /* 327 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42206 | /* 333 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42207 | /* 340 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42208 | /* 343 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42209 | /* 350 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42210 | /* 357 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42211 | /* 360 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42212 | /* 367 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42213 | /* 374 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42214 | /* 377 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42215 | /* 384 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42216 | /* 391 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42217 | /* 398 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42218 | /* 405 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42219 | /* 408 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42220 | /* 415 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42221 | /* 422 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42222 | /* 425 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42223 | /* 432 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42224 | /* 438 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42225 | /* 445 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42226 | /* 448 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42227 | /* 455 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42228 | /* 462 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42229 | /* 465 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42230 | /* 472 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42231 | /* 475 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42232 | /* 482 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42233 | /* 485 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42234 | /* 492 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42235 | /* 495 */ { X86::RSTRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42236 | /* 496 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42237 | /* 499 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42238 | /* 506 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42239 | /* 509 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42240 | /* 516 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42241 | /* 519 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42242 | /* 526 */ { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42243 | /* 529 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42244 | /* 535 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42245 | /* 537 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42246 | /* 544 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42247 | /* 547 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42248 | /* 549 */ { X86::GR64PLTSafeRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42249 | /* 551 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42250 | /* 553 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42251 | /* 555 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42252 | /* 563 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42253 | /* 567 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42254 | /* 573 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 42255 | /* 575 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42256 | /* 577 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42257 | /* 578 */ { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, |
| 42258 | /* 579 */ { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, |
| 42259 | /* 581 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42260 | /* 589 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42261 | /* 597 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42262 | /* 601 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42263 | /* 609 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42264 | /* 613 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42265 | /* 621 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42266 | /* 625 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42267 | /* 633 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42268 | /* 637 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42269 | /* 645 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42270 | /* 649 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42271 | /* 657 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42272 | /* 661 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42273 | /* 669 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42274 | /* 673 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42275 | /* 681 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42276 | /* 685 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42277 | /* 692 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42278 | /* 699 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42279 | /* 707 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42280 | /* 710 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42281 | /* 714 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42282 | /* 721 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42283 | /* 728 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42284 | /* 736 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42285 | /* 739 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42286 | /* 743 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42287 | /* 750 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42288 | /* 757 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42289 | /* 765 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42290 | /* 768 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42291 | /* 772 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42292 | /* 780 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42293 | /* 784 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42294 | /* 792 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42295 | /* 796 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42296 | /* 804 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42297 | /* 808 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42298 | /* 811 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42299 | /* 814 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42300 | /* 817 */ { X86::FR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42301 | /* 821 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42302 | /* 825 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42303 | /* 829 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42304 | /* 833 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42305 | /* 837 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42306 | /* 841 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42307 | /* 845 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42308 | /* 849 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42309 | /* 853 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42310 | /* 857 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42311 | /* 861 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42312 | /* 865 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42313 | /* 869 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42314 | /* 873 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42315 | /* 877 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42316 | /* 881 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42317 | /* 885 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42318 | /* 889 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42319 | /* 893 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42320 | /* 897 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42321 | /* 901 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42322 | /* 905 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42323 | /* 909 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42324 | /* 913 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42325 | /* 917 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42326 | /* 919 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42327 | /* 925 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42328 | /* 927 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42329 | /* 936 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42330 | /* 945 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42331 | /* 948 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42332 | /* 956 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42333 | /* 960 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42334 | /* 968 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42335 | /* 972 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42336 | /* 978 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42337 | /* 980 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42338 | /* 986 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42339 | /* 988 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42340 | /* 991 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42341 | /* 994 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42342 | /* 997 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42343 | /* 999 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42344 | /* 1001 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42345 | /* 1003 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42346 | /* 1005 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42347 | /* 1007 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42348 | /* 1009 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42349 | /* 1012 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42350 | /* 1014 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42351 | /* 1016 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42352 | /* 1019 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42353 | /* 1021 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42354 | /* 1023 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42355 | /* 1025 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42356 | /* 1027 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, |
| 42357 | /* 1029 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42358 | /* 1030 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42359 | /* 1037 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42360 | /* 1040 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42361 | /* 1044 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42362 | /* 1050 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42363 | /* 1056 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42364 | /* 1062 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42365 | /* 1068 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42366 | /* 1074 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42367 | /* 1080 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, |
| 42368 | /* 1081 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42369 | /* 1086 */ { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42370 | /* 1088 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42371 | /* 1091 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42372 | /* 1094 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42373 | /* 1097 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42374 | /* 1100 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42375 | /* 1102 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42376 | /* 1108 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42377 | /* 1110 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42378 | /* 1116 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42379 | /* 1118 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42380 | /* 1120 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42381 | /* 1126 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42382 | /* 1128 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42383 | /* 1134 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42384 | /* 1136 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42385 | /* 1138 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42386 | /* 1144 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42387 | /* 1146 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42388 | /* 1152 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42389 | /* 1154 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42390 | /* 1156 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42391 | /* 1162 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42392 | /* 1164 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42393 | /* 1170 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42394 | /* 1172 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42395 | /* 1175 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42396 | /* 1178 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42397 | /* 1181 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42398 | /* 1184 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42399 | /* 1187 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42400 | /* 1190 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42401 | /* 1193 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42402 | /* 1195 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42403 | /* 1197 */ { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42404 | /* 1198 */ { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42405 | /* 1199 */ { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42406 | /* 1200 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::GR64_NOSPRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42407 | /* 1206 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::GR64_NOSPRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, |
| 42408 | /* 1212 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42409 | /* 1214 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42410 | /* 1217 */ { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42411 | /* 1223 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42412 | /* 1229 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42413 | /* 1235 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42414 | /* 1237 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42415 | /* 1239 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42416 | /* 1242 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42417 | /* 1244 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42418 | /* 1250 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42419 | /* 1252 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42420 | /* 1254 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42421 | /* 1256 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42422 | /* 1258 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42423 | /* 1260 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42424 | /* 1262 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42425 | /* 1269 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42426 | /* 1272 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42427 | /* 1280 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42428 | /* 1284 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42429 | /* 1287 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42430 | /* 1291 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42431 | /* 1298 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42432 | /* 1301 */ { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42433 | /* 1304 */ { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42434 | /* 1306 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42435 | /* 1312 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42436 | /* 1314 */ { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42437 | /* 1320 */ { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42438 | /* 1322 */ { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42439 | /* 1324 */ { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42440 | /* 1326 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42441 | /* 1328 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42442 | /* 1330 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42443 | /* 1332 */ { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42444 | /* 1334 */ { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42445 | /* 1336 */ { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42446 | /* 1338 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42447 | /* 1340 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42448 | /* 1342 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42449 | /* 1344 */ { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42450 | /* 1346 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42451 | /* 1348 */ { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42452 | /* 1354 */ { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42453 | /* 1360 */ { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42454 | /* 1362 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42455 | /* 1368 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42456 | /* 1370 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42457 | /* 1376 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42458 | /* 1382 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42459 | /* 1384 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42460 | /* 1386 */ { X86::GR32_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42461 | /* 1392 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42462 | /* 1394 */ { X86::GR32_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42463 | /* 1396 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42464 | /* 1398 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42465 | /* 1400 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42466 | /* 1403 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42467 | /* 1407 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42468 | /* 1411 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42469 | /* 1414 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42470 | /* 1421 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42471 | /* 1424 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42472 | /* 1431 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42473 | /* 1434 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42474 | /* 1440 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_COND_CODE, 0 }, |
| 42475 | /* 1442 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42476 | /* 1449 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42477 | /* 1457 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42478 | /* 1461 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42479 | /* 1468 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42480 | /* 1476 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42481 | /* 1480 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42482 | /* 1487 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42483 | /* 1495 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42484 | /* 1499 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42485 | /* 1503 */ { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42486 | /* 1505 */ { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42487 | /* 1510 */ { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, |
| 42488 | /* 1511 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42489 | /* 1515 */ { -1, 0|(1<<MCOI::BranchTarget), MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42490 | /* 1518 */ { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42491 | /* 1524 */ { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42492 | /* 1526 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42493 | /* 1532 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42494 | /* 1538 */ { X86::TILERegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42495 | /* 1539 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42496 | /* 1547 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42497 | /* 1556 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42498 | /* 1564 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42499 | /* 1573 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42500 | /* 1582 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42501 | /* 1591 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42502 | /* 1598 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42503 | /* 1601 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42504 | /* 1608 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42505 | /* 1617 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42506 | /* 1625 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42507 | /* 1628 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42508 | /* 1633 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42509 | /* 1637 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42510 | /* 1644 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42511 | /* 1653 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42512 | /* 1661 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42513 | /* 1664 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42514 | /* 1669 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42515 | /* 1673 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42516 | /* 1680 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42517 | /* 1689 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42518 | /* 1697 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42519 | /* 1700 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42520 | /* 1704 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42521 | /* 1710 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42522 | /* 1715 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42523 | /* 1720 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42524 | /* 1724 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42525 | /* 1731 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42526 | /* 1734 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42527 | /* 1743 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42528 | /* 1751 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42529 | /* 1756 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42530 | /* 1760 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42531 | /* 1769 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42532 | /* 1777 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42533 | /* 1782 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42534 | /* 1786 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42535 | /* 1795 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42536 | /* 1803 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42537 | /* 1809 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42538 | /* 1814 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42539 | /* 1819 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42540 | /* 1823 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42541 | /* 1832 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42542 | /* 1840 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42543 | /* 1845 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42544 | /* 1849 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42545 | /* 1858 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42546 | /* 1866 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42547 | /* 1871 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42548 | /* 1875 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42549 | /* 1883 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42550 | /* 1889 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42551 | /* 1894 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42552 | /* 1899 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42553 | /* 1903 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42554 | /* 1910 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42555 | /* 1918 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42556 | /* 1921 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42557 | /* 1926 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42558 | /* 1930 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42559 | /* 1934 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42560 | /* 1940 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42561 | /* 1945 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42562 | /* 1952 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42563 | /* 1955 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42564 | /* 1962 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42565 | /* 1965 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42566 | /* 1972 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42567 | /* 1975 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42568 | /* 1982 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42569 | /* 1985 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42570 | /* 1993 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42571 | /* 2003 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42572 | /* 2012 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42573 | /* 2018 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42574 | /* 2023 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42575 | /* 2031 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42576 | /* 2041 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42577 | /* 2050 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42578 | /* 2056 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42579 | /* 2061 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42580 | /* 2069 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42581 | /* 2079 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42582 | /* 2088 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42583 | /* 2094 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42584 | /* 2099 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42585 | /* 2109 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42586 | /* 2118 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42587 | /* 2124 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42588 | /* 2129 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42589 | /* 2139 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42590 | /* 2148 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42591 | /* 2154 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42592 | /* 2159 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42593 | /* 2169 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42594 | /* 2178 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42595 | /* 2184 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42596 | /* 2189 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42597 | /* 2195 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42598 | /* 2203 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42599 | /* 2211 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42600 | /* 2219 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42601 | /* 2223 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42602 | /* 2231 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42603 | /* 2235 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42604 | /* 2243 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42605 | /* 2250 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42606 | /* 2252 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42607 | /* 2256 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42608 | /* 2259 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42609 | /* 2265 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42610 | /* 2273 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42611 | /* 2280 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42612 | /* 2282 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42613 | /* 2286 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42614 | /* 2289 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42615 | /* 2297 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42616 | /* 2304 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42617 | /* 2312 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42618 | /* 2319 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42619 | /* 2327 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42620 | /* 2334 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42621 | /* 2336 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42622 | /* 2340 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42623 | /* 2343 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42624 | /* 2345 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42625 | /* 2349 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42626 | /* 2352 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42627 | /* 2356 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42628 | /* 2359 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42629 | /* 2367 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42630 | /* 2376 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42631 | /* 2380 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42632 | /* 2385 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42633 | /* 2393 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42634 | /* 2402 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42635 | /* 2406 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42636 | /* 2411 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42637 | /* 2419 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42638 | /* 2428 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42639 | /* 2432 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42640 | /* 2437 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42641 | /* 2445 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42642 | /* 2454 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42643 | /* 2458 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42644 | /* 2463 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42645 | /* 2471 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42646 | /* 2480 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42647 | /* 2484 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42648 | /* 2489 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42649 | /* 2497 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42650 | /* 2506 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42651 | /* 2510 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42652 | /* 2515 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42653 | /* 2523 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42654 | /* 2532 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42655 | /* 2536 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42656 | /* 2541 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42657 | /* 2549 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42658 | /* 2558 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42659 | /* 2562 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42660 | /* 2567 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42661 | /* 2575 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42662 | /* 2584 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42663 | /* 2588 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42664 | /* 2593 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42665 | /* 2601 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42666 | /* 2609 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42667 | /* 2618 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42668 | /* 2622 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42669 | /* 2626 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42670 | /* 2631 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42671 | /* 2639 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42672 | /* 2647 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42673 | /* 2651 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42674 | /* 2659 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42675 | /* 2663 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42676 | /* 2671 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42677 | /* 2677 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42678 | /* 2679 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42679 | /* 2685 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42680 | /* 2687 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42681 | /* 2693 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42682 | /* 2695 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42683 | /* 2702 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42684 | /* 2706 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42685 | /* 2709 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42686 | /* 2716 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42687 | /* 2718 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42688 | /* 2722 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42689 | /* 2725 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42690 | /* 2731 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42691 | /* 2738 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42692 | /* 2740 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42693 | /* 2744 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42694 | /* 2747 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42695 | /* 2754 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42696 | /* 2761 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42697 | /* 2765 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42698 | /* 2768 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42699 | /* 2775 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42700 | /* 2779 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42701 | /* 2782 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42702 | /* 2790 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42703 | /* 2797 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42704 | /* 2799 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42705 | /* 2803 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42706 | /* 2806 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42707 | /* 2814 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42708 | /* 2821 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42709 | /* 2823 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42710 | /* 2827 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42711 | /* 2830 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42712 | /* 2838 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42713 | /* 2845 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42714 | /* 2847 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42715 | /* 2850 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42716 | /* 2855 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42717 | /* 2859 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42718 | /* 2863 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42719 | /* 2866 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42720 | /* 2868 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42721 | /* 2871 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42722 | /* 2876 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42723 | /* 2880 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42724 | /* 2882 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42725 | /* 2886 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42726 | /* 2889 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42727 | /* 2894 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42728 | /* 2898 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42729 | /* 2902 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42730 | /* 2905 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42731 | /* 2907 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42732 | /* 2910 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42733 | /* 2915 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42734 | /* 2919 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42735 | /* 2923 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42736 | /* 2926 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42737 | /* 2931 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42738 | /* 2935 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42739 | /* 2938 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42740 | /* 2943 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42741 | /* 2947 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42742 | /* 2951 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42743 | /* 2954 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42744 | /* 2957 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42745 | /* 2962 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42746 | /* 2966 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42747 | /* 2970 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42748 | /* 2973 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42749 | /* 2977 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42750 | /* 2980 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42751 | /* 2988 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42752 | /* 2995 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42753 | /* 3000 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42754 | /* 3004 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42755 | /* 3008 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42756 | /* 3011 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42757 | /* 3018 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42758 | /* 3021 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42759 | /* 3028 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42760 | /* 3036 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42761 | /* 3039 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42762 | /* 3044 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42763 | /* 3048 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42764 | /* 3055 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42765 | /* 3063 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42766 | /* 3066 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42767 | /* 3071 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42768 | /* 3075 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42769 | /* 3082 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42770 | /* 3090 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42771 | /* 3093 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42772 | /* 3098 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42773 | /* 3102 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42774 | /* 3107 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42775 | /* 3111 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42776 | /* 3114 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42777 | /* 3116 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42778 | /* 3118 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42779 | /* 3121 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42780 | /* 3123 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42781 | /* 3125 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42782 | /* 3128 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42783 | /* 3131 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42784 | /* 3134 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42785 | /* 3137 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42786 | /* 3140 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42787 | /* 3143 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42788 | /* 3146 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42789 | /* 3149 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42790 | /* 3152 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42791 | /* 3155 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42792 | /* 3159 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42793 | /* 3162 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42794 | /* 3165 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42795 | /* 3168 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42796 | /* 3171 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42797 | /* 3175 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42798 | /* 3178 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42799 | /* 3181 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42800 | /* 3184 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42801 | /* 3187 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42802 | /* 3190 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42803 | /* 3193 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42804 | /* 3196 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42805 | /* 3199 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42806 | /* 3201 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42807 | /* 3203 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42808 | /* 3205 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42809 | /* 3207 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42810 | /* 3217 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42811 | /* 3226 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42812 | /* 3232 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42813 | /* 3237 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42814 | /* 3247 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42815 | /* 3256 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42816 | /* 3262 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42817 | /* 3267 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42818 | /* 3277 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42819 | /* 3286 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42820 | /* 3292 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42821 | /* 3297 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42822 | /* 3301 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42823 | /* 3309 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42824 | /* 3313 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42825 | /* 3317 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42826 | /* 3325 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42827 | /* 3330 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42828 | /* 3334 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42829 | /* 3342 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42830 | /* 3345 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42831 | /* 3350 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42832 | /* 3354 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42833 | /* 3362 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42834 | /* 3367 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42835 | /* 3371 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42836 | /* 3379 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42837 | /* 3384 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42838 | /* 3388 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42839 | /* 3396 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42840 | /* 3401 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42841 | /* 3405 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42842 | /* 3410 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42843 | /* 3414 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42844 | /* 3417 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42845 | /* 3425 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42846 | /* 3434 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42847 | /* 3438 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42848 | /* 3443 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42849 | /* 3451 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42850 | /* 3460 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42851 | /* 3464 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42852 | /* 3469 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42853 | /* 3477 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42854 | /* 3486 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42855 | /* 3490 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42856 | /* 3495 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42857 | /* 3501 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42858 | /* 3506 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42859 | /* 3511 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42860 | /* 3517 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42861 | /* 3524 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42862 | /* 3532 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42863 | /* 3535 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42864 | /* 3539 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42865 | /* 3546 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42866 | /* 3554 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42867 | /* 3557 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42868 | /* 3561 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42869 | /* 3568 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42870 | /* 3576 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42871 | /* 3579 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42872 | /* 3583 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42873 | /* 3588 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42874 | /* 3592 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42875 | /* 3601 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42876 | /* 3609 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42877 | /* 3613 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42878 | /* 3619 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42879 | /* 3624 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42880 | /* 3629 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42881 | /* 3633 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42882 | /* 3642 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42883 | /* 3647 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42884 | /* 3656 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42885 | /* 3661 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42886 | /* 3670 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42887 | /* 3675 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42888 | /* 3685 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42889 | /* 3691 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42890 | /* 3699 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42891 | /* 3703 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42892 | /* 3708 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42893 | /* 3716 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42894 | /* 3720 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42895 | /* 3728 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42896 | /* 3732 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42897 | /* 3737 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42898 | /* 3742 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42899 | /* 3750 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42900 | /* 3754 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42901 | /* 3762 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42902 | /* 3766 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42903 | /* 3771 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42904 | /* 3779 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42905 | /* 3783 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, X86::OPERAND_ROUNDING_CONTROL, 0 }, |
| 42906 | /* 3788 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42907 | /* 3796 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42908 | /* 3800 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42909 | /* 3808 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42910 | /* 3816 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42911 | /* 3824 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42912 | /* 3832 */ { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42913 | /* 3836 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42914 | /* 3844 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42915 | /* 3852 */ { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 42916 | /* 3856 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42917 | /* 3863 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42918 | /* 3871 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42919 | /* 3874 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42920 | /* 3878 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42921 | /* 3885 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42922 | /* 3893 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42923 | /* 3896 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42924 | /* 3900 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42925 | /* 3907 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42926 | /* 3915 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42927 | /* 3918 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42928 | /* 3922 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42929 | /* 3925 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42930 | /* 3929 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42931 | /* 3936 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42932 | /* 3944 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42933 | /* 3947 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42934 | /* 3951 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42935 | /* 3958 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42936 | /* 3966 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42937 | /* 3969 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42938 | /* 3973 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42939 | /* 3976 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42940 | /* 3980 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42941 | /* 3983 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42942 | /* 3987 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42943 | /* 3990 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42944 | /* 3994 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42945 | /* 4001 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42946 | /* 4009 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42947 | /* 4012 */ { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42948 | /* 4016 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 42949 | /* 4025 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42950 | /* 4034 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42951 | /* 4043 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42952 | /* 4052 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 42953 | /* 4061 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 42954 | /* 4070 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42955 | /* 4079 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42956 | /* 4088 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42957 | /* 4097 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42958 | /* 4103 */ { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42959 | /* 4109 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42960 | /* 4115 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42961 | /* 4124 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42962 | /* 4133 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 42963 | /* 4142 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42964 | /* 4151 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_EARLY_CLOBBER }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 42965 | /* 4160 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42966 | /* 4167 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42967 | /* 4176 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42968 | /* 4184 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42969 | /* 4189 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42970 | /* 4193 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42971 | /* 4200 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42972 | /* 4209 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42973 | /* 4217 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42974 | /* 4220 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42975 | /* 4225 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42976 | /* 4229 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42977 | /* 4236 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42978 | /* 4245 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42979 | /* 4253 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42980 | /* 4256 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42981 | /* 4261 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42982 | /* 4265 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42983 | /* 4274 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42984 | /* 4282 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42985 | /* 4287 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42986 | /* 4291 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42987 | /* 4300 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42988 | /* 4308 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42989 | /* 4313 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42990 | /* 4317 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42991 | /* 4326 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42992 | /* 4334 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42993 | /* 4339 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42994 | /* 4343 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42995 | /* 4352 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42996 | /* 4360 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42997 | /* 4369 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42998 | /* 4377 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 42999 | /* 4382 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43000 | /* 4386 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43001 | /* 4395 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43002 | /* 4403 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43003 | /* 4408 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43004 | /* 4412 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43005 | /* 4421 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43006 | /* 4426 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43007 | /* 4436 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43008 | /* 4445 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43009 | /* 4451 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43010 | /* 4456 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43011 | /* 4466 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43012 | /* 4475 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43013 | /* 4481 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43014 | /* 4486 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43015 | /* 4496 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43016 | /* 4505 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43017 | /* 4511 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43018 | /* 4516 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43019 | /* 4525 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43020 | /* 4533 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43021 | /* 4538 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43022 | /* 4542 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43023 | /* 4551 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43024 | /* 4559 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43025 | /* 4564 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43026 | /* 4568 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43027 | /* 4577 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43028 | /* 4585 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43029 | /* 4590 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43030 | /* 4594 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43031 | /* 4598 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43032 | /* 4602 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43033 | /* 4608 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43034 | /* 4613 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43035 | /* 4617 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43036 | /* 4623 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43037 | /* 4628 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43038 | /* 4632 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43039 | /* 4638 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43040 | /* 4643 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43041 | /* 4649 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43042 | /* 4654 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43043 | /* 4660 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43044 | /* 4665 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43045 | /* 4671 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43046 | /* 4676 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43047 | /* 4683 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43048 | /* 4690 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43049 | /* 4692 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43050 | /* 4694 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43051 | /* 4700 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43052 | /* 4702 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43053 | /* 4704 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43054 | /* 4711 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43055 | /* 4718 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43056 | /* 4725 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43057 | /* 4732 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43058 | /* 4740 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43059 | /* 4747 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43060 | /* 4751 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43061 | /* 4754 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43062 | /* 4761 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43063 | /* 4769 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43064 | /* 4776 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43065 | /* 4780 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43066 | /* 4783 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43067 | /* 4790 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43068 | /* 4798 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43069 | /* 4805 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43070 | /* 4809 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43071 | /* 4812 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43072 | /* 4814 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43073 | /* 4820 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43074 | /* 4827 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43075 | /* 4835 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43076 | /* 4842 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43077 | /* 4848 */ { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43078 | /* 4854 */ { X86::VK4PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43079 | /* 4861 */ { X86::VK4PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43080 | /* 4864 */ { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43081 | /* 4871 */ { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43082 | /* 4874 */ { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43083 | /* 4881 */ { X86::VK16PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43084 | /* 4884 */ { X86::VK2PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43085 | /* 4891 */ { X86::VK2PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43086 | /* 4894 */ { X86::VK4PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43087 | /* 4901 */ { X86::VK4PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43088 | /* 4904 */ { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43089 | /* 4911 */ { X86::VK8PAIRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43090 | /* 4914 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43091 | /* 4918 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43092 | /* 4921 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43093 | /* 4925 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43094 | /* 4928 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43095 | /* 4932 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43096 | /* 4935 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43097 | /* 4937 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43098 | /* 4941 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43099 | /* 4944 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43100 | /* 4946 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43101 | /* 4950 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43102 | /* 4953 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43103 | /* 4957 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43104 | /* 4960 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43105 | /* 4964 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43106 | /* 4967 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43107 | /* 4971 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43108 | /* 4974 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43109 | /* 4976 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43110 | /* 4978 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43111 | /* 4980 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43112 | /* 4982 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43113 | /* 4984 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43114 | /* 4986 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43115 | /* 4990 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43116 | /* 4993 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43117 | /* 4995 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43118 | /* 4999 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43119 | /* 5002 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43120 | /* 5004 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43121 | /* 5008 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43122 | /* 5011 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43123 | /* 5015 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43124 | /* 5018 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43125 | /* 5022 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43126 | /* 5025 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43127 | /* 5029 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43128 | /* 5032 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43129 | /* 5036 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43130 | /* 5039 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43131 | /* 5043 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43132 | /* 5046 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43133 | /* 5054 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43134 | /* 5063 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43135 | /* 5067 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43136 | /* 5072 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43137 | /* 5080 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43138 | /* 5089 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43139 | /* 5093 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43140 | /* 5098 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43141 | /* 5106 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43142 | /* 5115 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43143 | /* 5119 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43144 | /* 5124 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43145 | /* 5131 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43146 | /* 5139 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43147 | /* 5142 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43148 | /* 5146 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43149 | /* 5153 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43150 | /* 5161 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43151 | /* 5164 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43152 | /* 5168 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43153 | /* 5175 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43154 | /* 5183 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43155 | /* 5186 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43156 | /* 5190 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43157 | /* 5197 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43158 | /* 5205 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43159 | /* 5208 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43160 | /* 5212 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43161 | /* 5219 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43162 | /* 5227 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43163 | /* 5230 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43164 | /* 5234 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43165 | /* 5241 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43166 | /* 5249 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43167 | /* 5252 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43168 | /* 5256 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43169 | /* 5263 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43170 | /* 5271 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43171 | /* 5274 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43172 | /* 5278 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43173 | /* 5285 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43174 | /* 5293 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43175 | /* 5296 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43176 | /* 5300 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43177 | /* 5307 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43178 | /* 5315 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43179 | /* 5318 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43180 | /* 5322 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43181 | /* 5329 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43182 | /* 5337 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43183 | /* 5340 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43184 | /* 5344 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43185 | /* 5351 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43186 | /* 5359 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43187 | /* 5362 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43188 | /* 5366 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43189 | /* 5373 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, |
| 43190 | /* 5381 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43191 | /* 5384 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43192 | /* 5388 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43193 | /* 5397 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43194 | /* 5406 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43195 | /* 5411 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43196 | /* 5420 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43197 | /* 5429 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43198 | /* 5434 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43199 | /* 5441 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43200 | /* 5444 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43201 | /* 5447 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43202 | /* 5451 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43203 | /* 5455 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43204 | /* 5459 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43205 | /* 5463 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43206 | /* 5465 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43207 | /* 5467 */ { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43208 | /* 5469 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43209 | /* 5471 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43210 | /* 5473 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43211 | /* 5475 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43212 | /* 5479 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43213 | /* 5482 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43214 | /* 5484 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43215 | /* 5486 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43216 | /* 5488 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43217 | /* 5490 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43218 | /* 5492 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43219 | /* 5494 */ { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43220 | /* 5496 */ { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43221 | /* 5498 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43222 | /* 5500 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43223 | /* 5504 */ { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43224 | /* 5507 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43225 | /* 5511 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43226 | /* 5514 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43227 | /* 5518 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43228 | /* 5521 */ { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43229 | /* 5523 */ { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43230 | /* 5525 */ { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43231 | /* 5527 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43232 | /* 5534 */ { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43233 | /* 5542 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43234 | /* 5550 */ { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43235 | /* 5558 */ { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43236 | /* 5566 */ { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43237 | /* 5574 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43238 | /* 5582 */ { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43239 | /* 5590 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43240 | /* 5598 */ { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43241 | /* 5606 */ { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43242 | /* 5614 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43243 | /* 5617 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43244 | /* 5620 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43245 | /* 5625 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43246 | /* 5629 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43247 | /* 5632 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43248 | /* 5637 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43249 | /* 5641 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43250 | /* 5646 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43251 | /* 5650 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43252 | /* 5655 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43253 | /* 5659 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43254 | /* 5664 */ { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43255 | /* 5668 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43256 | /* 5673 */ { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43257 | /* 5677 */ { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43258 | /* 5685 */ { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR16XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43259 | /* 5693 */ { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43260 | /* 5701 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43261 | /* 5704 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43262 | /* 5707 */ { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43263 | /* 5711 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43264 | /* 5720 */ { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, |
| 43265 | /* 5725 */ { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 43266 | /* 5729 */ { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 43267 | /* 5733 */ { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 43268 | /* 5737 */ { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(1) }, |
| 43269 | /* 5741 */ { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, MCOI_TIED_TO(0) }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, |
| 43270 | }, { |
| 43271 | /* 0 */ |
| 43272 | /* 0 */ X86::EFLAGS, |
| 43273 | /* 1 */ X86::RSP, X86::SSP, |
| 43274 | /* 3 */ X86::RAX, X86::RCX, X86::RDX, X86::RAX, X86::RDX, X86::EFLAGS, |
| 43275 | /* 9 */ X86::RAX, X86::RCX, X86::RDX, X86::RAX, X86::RDX, X86::RBX, X86::EFLAGS, |
| 43276 | /* 16 */ X86::ECX, X86::EAX, X86::EBX, |
| 43277 | /* 19 */ X86::TMM0, X86::TMM1, X86::TMM2, X86::TMM3, X86::TMM4, X86::TMM5, X86::TMM6, X86::TMM7, |
| 43278 | /* 27 */ X86::ESP, X86::ESP, |
| 43279 | /* 29 */ X86::RSP, X86::ESP, |
| 43280 | /* 31 */ X86::EFLAGS, X86::EFLAGS, |
| 43281 | /* 33 */ X86::ESP, X86::ESP, X86::EFLAGS, X86::DF, |
| 43282 | /* 37 */ X86::RSP, X86::RSP, X86::EFLAGS, X86::DF, |
| 43283 | /* 41 */ X86::EAX, |
| 43284 | /* 42 */ X86::AL, X86::EFLAGS, X86::AX, X86::EFLAGS, |
| 43285 | /* 46 */ X86::AX, X86::AX, X86::EFLAGS, |
| 43286 | /* 49 */ X86::AL, X86::AX, X86::EFLAGS, |
| 43287 | /* 52 */ X86::FPSW, |
| 43288 | /* 53 */ X86::AX, X86::EFLAGS, X86::AX, X86::EFLAGS, |
| 43289 | /* 57 */ X86::EAX, X86::EFLAGS, X86::EAX, X86::EFLAGS, |
| 43290 | /* 61 */ X86::RAX, X86::EFLAGS, X86::RAX, X86::EFLAGS, |
| 43291 | /* 65 */ X86::AL, X86::EFLAGS, X86::AL, X86::EFLAGS, |
| 43292 | /* 69 */ X86::EAX, X86::EAX, X86::EFLAGS, |
| 43293 | /* 72 */ X86::RAX, X86::RAX, X86::EFLAGS, |
| 43294 | /* 75 */ X86::AL, X86::AL, X86::EFLAGS, |
| 43295 | /* 78 */ X86::MXCSR, |
| 43296 | /* 79 */ X86::FPCW, X86::FPSW, |
| 43297 | /* 81 */ X86::ESP, X86::SSP, X86::ESP, X86::EFLAGS, X86::SSP, |
| 43298 | /* 86 */ X86::RSP, X86::SSP, X86::RSP, X86::EFLAGS, X86::SSP, |
| 43299 | /* 91 */ X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::EFLAGS, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, |
| 43300 | /* 108 */ X86::R10, X86::R11, X86::EFLAGS, |
| 43301 | /* 111 */ X86::XMM0, |
| 43302 | /* 112 */ X86::ESP, X86::SSP, |
| 43303 | /* 114 */ X86::AL, X86::AX, |
| 43304 | /* 116 */ X86::EAX, X86::EAX, X86::EDX, |
| 43305 | /* 119 */ X86::EAX, X86::RAX, |
| 43306 | /* 121 */ X86::DF, |
| 43307 | /* 122 */ X86::SSP, |
| 43308 | /* 123 */ X86::RAX, |
| 43309 | /* 124 */ X86::EFLAGS, X86::FPSW, |
| 43310 | /* 126 */ X86::AX, X86::EFLAGS, |
| 43311 | /* 128 */ X86::EAX, X86::EFLAGS, |
| 43312 | /* 130 */ X86::RAX, X86::EFLAGS, |
| 43313 | /* 132 */ X86::AL, X86::EFLAGS, |
| 43314 | /* 134 */ X86::EDI, X86::ESI, X86::DF, X86::EDI, X86::ESI, X86::EFLAGS, |
| 43315 | /* 140 */ X86::RAX, X86::RBX, X86::RCX, X86::RDX, X86::RAX, X86::RDX, X86::EFLAGS, |
| 43316 | /* 147 */ X86::EAX, X86::EBX, X86::ECX, X86::EDX, X86::EAX, X86::EDX, X86::EFLAGS, |
| 43317 | /* 154 */ X86::MXCSR, X86::EFLAGS, |
| 43318 | /* 156 */ X86::ST0, X86::FPCW, X86::EFLAGS, X86::FPSW, |
| 43319 | /* 160 */ X86::FPCW, X86::EFLAGS, X86::FPSW, |
| 43320 | /* 163 */ X86::EAX, X86::ECX, X86::EAX, X86::EBX, X86::ECX, X86::EDX, |
| 43321 | /* 169 */ X86::RAX, X86::RAX, X86::RDX, |
| 43322 | /* 172 */ X86::AX, X86::AX, X86::DX, |
| 43323 | /* 175 */ X86::AX, X86::EAX, |
| 43324 | /* 177 */ X86::AX, X86::DX, X86::AX, X86::DX, X86::EFLAGS, |
| 43325 | /* 182 */ X86::AX, X86::DX, X86::AX, X86::DX, |
| 43326 | /* 186 */ X86::EAX, X86::EDX, X86::EAX, X86::EDX, X86::EFLAGS, |
| 43327 | /* 191 */ X86::EAX, X86::EDX, X86::EAX, X86::EDX, |
| 43328 | /* 195 */ X86::RAX, X86::RDX, X86::RAX, X86::RDX, X86::EFLAGS, |
| 43329 | /* 200 */ X86::RAX, X86::RDX, X86::RAX, X86::RDX, |
| 43330 | /* 204 */ X86::AX, X86::AL, X86::AH, X86::EFLAGS, |
| 43331 | /* 208 */ X86::AX, X86::AL, X86::AH, |
| 43332 | /* 211 */ X86::ESP, X86::EAX, X86::ESP, X86::EFLAGS, |
| 43333 | /* 215 */ X86::RSP, X86::RAX, X86::RSP, X86::EFLAGS, |
| 43334 | /* 219 */ X86::XMM0, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM4, X86::XMM5, X86::XMM6, X86::EFLAGS, |
| 43335 | /* 227 */ X86::XMM0, X86::XMM1, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::EFLAGS, |
| 43336 | /* 237 */ X86::RSP, X86::EFLAGS, |
| 43337 | /* 239 */ X86::FPSW, X86::FPCW, |
| 43338 | /* 241 */ X86::FPSW, X86::AX, X86::FPSW, |
| 43339 | /* 244 */ X86::FPSW, X86::FPSW, |
| 43340 | /* 246 */ X86::FPSW, X86::FPCW, X86::FPSW, X86::FPCW, |
| 43341 | /* 250 */ X86::RAX, X86::RBX, X86::RCX, X86::RDX, X86::RAX, X86::RBX, X86::RCX, |
| 43342 | /* 257 */ X86::AX, X86::AX, X86::DX, X86::EFLAGS, |
| 43343 | /* 261 */ X86::EAX, X86::EAX, X86::EDX, X86::EFLAGS, |
| 43344 | /* 265 */ X86::RAX, X86::RAX, X86::RDX, X86::EFLAGS, |
| 43345 | /* 269 */ X86::AL, X86::AL, X86::EFLAGS, X86::AX, |
| 43346 | /* 273 */ X86::AL, X86::AL, X86::AX, |
| 43347 | /* 276 */ X86::AX, |
| 43348 | /* 277 */ X86::DX, X86::AX, |
| 43349 | /* 279 */ X86::DX, X86::EAX, |
| 43350 | /* 281 */ X86::AL, |
| 43351 | /* 282 */ X86::DX, X86::AL, |
| 43352 | /* 284 */ X86::SSP, X86::SSP, |
| 43353 | /* 286 */ X86::DX, X86::EDI, X86::DF, X86::EDI, |
| 43354 | /* 290 */ X86::EAX, X86::ECX, |
| 43355 | /* 292 */ X86::RAX, X86::ECX, |
| 43356 | /* 294 */ X86::EAX, X86::EDX, |
| 43357 | /* 296 */ X86::RAX, X86::EDX, |
| 43358 | /* 298 */ X86::CX, |
| 43359 | /* 299 */ X86::ECX, |
| 43360 | /* 300 */ X86::RCX, |
| 43361 | /* 301 */ X86::EFLAGS, X86::AH, |
| 43362 | /* 303 */ X86::EBP, X86::ESP, X86::EBP, X86::ESP, |
| 43363 | /* 307 */ X86::RBP, X86::RSP, X86::RBP, X86::RSP, |
| 43364 | /* 311 */ X86::XMM0, X86::EAX, X86::EFLAGS, |
| 43365 | /* 314 */ X86::ESI, X86::DF, X86::AL, X86::ESI, |
| 43366 | /* 318 */ X86::ESI, X86::DF, X86::EAX, X86::ESI, |
| 43367 | /* 322 */ X86::ESI, X86::DF, X86::RAX, X86::ESI, |
| 43368 | /* 326 */ X86::ESI, X86::DF, X86::AX, X86::ESI, |
| 43369 | /* 330 */ X86::EDI, |
| 43370 | /* 331 */ X86::RDI, |
| 43371 | /* 332 */ X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, |
| 43372 | /* 348 */ X86::EAX, X86::ECX, X86::EDX, |
| 43373 | /* 351 */ X86::RAX, X86::ECX, X86::EDX, |
| 43374 | /* 354 */ X86::RAX, X86::RSI, X86::RAX, X86::RDX, X86::RSI, |
| 43375 | /* 359 */ X86::EDI, X86::ESI, X86::DF, X86::EDI, X86::ESI, |
| 43376 | /* 364 */ X86::EDX, |
| 43377 | /* 365 */ X86::RDX, |
| 43378 | /* 366 */ X86::ECX, X86::EAX, |
| 43379 | /* 368 */ X86::DX, X86::ESI, X86::DF, X86::ESI, |
| 43380 | /* 372 */ X86::RBX, X86::RCX, X86::RAX, X86::EFLAGS, |
| 43381 | /* 376 */ X86::EAX, X86::EDX, X86::ECX, X86::EFLAGS, |
| 43382 | /* 380 */ X86::EAX, X86::EDX, X86::XMM0, X86::EFLAGS, |
| 43383 | /* 384 */ X86::ECX, X86::EFLAGS, |
| 43384 | /* 386 */ X86::XMM0, X86::EFLAGS, |
| 43385 | /* 388 */ X86::RAX, X86::RBX, X86::RCX, X86::RDX, X86::RAX, X86::RBX, X86::RCX, X86::RDX, X86::EFLAGS, |
| 43386 | /* 397 */ X86::RSP, X86::RSP, |
| 43387 | /* 399 */ X86::ESP, X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, |
| 43388 | /* 408 */ X86::RAX, X86::EAX, X86::EFLAGS, |
| 43389 | /* 411 */ X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, X86::ESP, |
| 43390 | /* 420 */ X86::ESP, X86::EFLAGS, X86::DF, X86::ESP, |
| 43391 | /* 424 */ X86::RSP, X86::EFLAGS, X86::DF, X86::RSP, |
| 43392 | /* 428 */ X86::EAX, X86::ECX, X86::EDX, X86::EAX, X86::EFLAGS, |
| 43393 | /* 433 */ X86::RAX, X86::RCX, X86::RDX, X86::EAX, X86::EFLAGS, |
| 43394 | /* 438 */ X86::CL, X86::EFLAGS, X86::EFLAGS, |
| 43395 | /* 441 */ X86::ECX, X86::EAX, X86::EDX, |
| 43396 | /* 444 */ X86::RSI, X86::RDI, X86::RCX, |
| 43397 | /* 447 */ X86::ECX, X86::RAX, X86::RDX, |
| 43398 | /* 450 */ X86::RAX, X86::RDX, |
| 43399 | /* 452 */ X86::RAX, X86::RCX, X86::RDX, |
| 43400 | /* 455 */ X86::ECX, X86::DF, X86::ECX, |
| 43401 | /* 458 */ X86::ECX, X86::EDI, X86::ESI, X86::ECX, X86::EDI, X86::ESI, |
| 43402 | /* 464 */ X86::RCX, X86::RDI, X86::RSI, X86::RCX, X86::RDI, X86::RSI, |
| 43403 | /* 470 */ X86::AL, X86::ECX, X86::EDI, X86::ECX, X86::EDI, |
| 43404 | /* 475 */ X86::AL, X86::RCX, X86::RDI, X86::RCX, X86::RDI, |
| 43405 | /* 480 */ X86::EAX, X86::ECX, X86::EDI, X86::ECX, X86::EDI, |
| 43406 | /* 485 */ X86::RAX, X86::RCX, X86::RDI, X86::RCX, X86::RDI, |
| 43407 | /* 490 */ X86::RAX, X86::RCX, X86::RDI, X86::ECX, X86::EDI, |
| 43408 | /* 495 */ X86::AX, X86::ECX, X86::EDI, X86::ECX, X86::EDI, |
| 43409 | /* 500 */ X86::AX, X86::RCX, X86::RDI, X86::RCX, X86::RDI, |
| 43410 | /* 505 */ X86::RAX, X86::RDX, X86::RAX, X86::RCX, X86::RDX, X86::EFLAGS, |
| 43411 | /* 511 */ X86::RAX, X86::RCX, X86::EAX, X86::EFLAGS, |
| 43412 | /* 515 */ X86::CL, X86::EFLAGS, |
| 43413 | /* 517 */ X86::CL, |
| 43414 | /* 518 */ X86::AH, X86::EFLAGS, |
| 43415 | /* 520 */ X86::EFLAGS, X86::AL, |
| 43416 | /* 522 */ X86::AL, X86::EDI, X86::DF, X86::EDI, X86::EFLAGS, |
| 43417 | /* 527 */ X86::EAX, X86::EDI, X86::DF, X86::EDI, X86::EFLAGS, |
| 43418 | /* 532 */ X86::RAX, X86::EDI, X86::DF, X86::EDI, X86::EFLAGS, |
| 43419 | /* 537 */ X86::AX, X86::EDI, X86::DF, X86::EDI, X86::EFLAGS, |
| 43420 | /* 542 */ X86::AL, X86::EDI, X86::DF, X86::EDI, |
| 43421 | /* 546 */ X86::EAX, X86::EDI, X86::DF, X86::EDI, |
| 43422 | /* 550 */ X86::RAX, X86::RDI, X86::DF, X86::RDI, |
| 43423 | /* 554 */ X86::AX, X86::EDI, X86::DF, X86::EDI, |
| 43424 | /* 558 */ X86::RSP, X86::EFLAGS, X86::SSP, |
| 43425 | /* 561 */ X86::ESP, X86::EFLAGS, X86::SSP, |
| 43426 | /* 564 */ X86::ESP, X86::SSP, X86::EAX, X86::ECX, X86::EFLAGS, X86::DF, |
| 43427 | /* 570 */ X86::RSP, X86::SSP, X86::RAX, X86::EFLAGS, X86::DF, |
| 43428 | /* 575 */ X86::ESP, X86::SSP, X86::EAX, X86::ECX, X86::EDX, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, X86::DF, |
| 43429 | /* 622 */ X86::RSP, X86::SSP, X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, X86::DF, |
| 43430 | /* 675 */ X86::RSP, X86::SSP, X86::EAX, X86::EFLAGS, |
| 43431 | /* 679 */ X86::EAX, X86::EDX, X86::EFLAGS, |
| 43432 | /* 682 */ X86::ST0, X86::FPCW, X86::FPSW, |
| 43433 | /* 685 */ X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15, |
| 43434 | /* 701 */ X86::AX, X86::AX, |
| 43435 | /* 703 */ X86::EAX, X86::EAX, |
| 43436 | /* 705 */ X86::RAX, X86::RAX, |
| 43437 | /* 707 */ X86::RBX, X86::RDX, X86::RSI, X86::RDI, X86::RSI, X86::RDI, |
| 43438 | /* 713 */ X86::ECX, X86::EDX, X86::EAX, |
| 43439 | /* 716 */ X86::AL, X86::EBX, X86::AL, |
| 43440 | /* 719 */ X86::EDX, X86::EAX, |
| 43441 | /* 721 */ X86::EDX, X86::EAX, X86::ECX, |
| 43442 | /* 724 */ X86::RAX, X86::RSI, X86::RDI, X86::RAX, X86::RSI, X86::RDI, |
| 43443 | /* 730 */ X86::RDX, X86::RDI, X86::RAX, X86::RDI, |
| 43444 | } |
| 43445 | }; |
| 43446 | |
| 43447 | |
| 43448 | #ifdef __GNUC__ |
| 43449 | #pragma GCC diagnostic push |
| 43450 | #pragma GCC diagnostic ignored "-Woverlength-strings" |
| 43451 | #endif |
| 43452 | extern const char X86InstrNameData[] = { |
| 43453 | /* 0 */ "G_FLOG10\0" |
| 43454 | /* 9 */ "G_FEXP10\0" |
| 43455 | /* 18 */ "MORESTACK_RET_RESTORE_R10\0" |
| 43456 | /* 44 */ "LD_Fp080\0" |
| 43457 | /* 53 */ "LD_Fp180\0" |
| 43458 | /* 62 */ "CMOV_RFP80\0" |
| 43459 | /* 73 */ "SUB_FpI32m80\0" |
| 43460 | /* 86 */ "ADD_FpI32m80\0" |
| 43461 | /* 99 */ "MUL_FpI32m80\0" |
| 43462 | /* 112 */ "SUBR_FpI32m80\0" |
| 43463 | /* 126 */ "DIVR_FpI32m80\0" |
| 43464 | /* 140 */ "DIV_FpI32m80\0" |
| 43465 | /* 153 */ "ILD_Fp32m80\0" |
| 43466 | /* 165 */ "IST_Fp32m80\0" |
| 43467 | /* 177 */ "ISTT_Fp32m80\0" |
| 43468 | /* 190 */ "ILD_Fp64m80\0" |
| 43469 | /* 202 */ "IST_Fp64m80\0" |
| 43470 | /* 214 */ "ISTT_Fp64m80\0" |
| 43471 | /* 227 */ "SUB_FpI16m80\0" |
| 43472 | /* 240 */ "ADD_FpI16m80\0" |
| 43473 | /* 253 */ "MUL_FpI16m80\0" |
| 43474 | /* 266 */ "SUBR_FpI16m80\0" |
| 43475 | /* 280 */ "DIVR_FpI16m80\0" |
| 43476 | /* 294 */ "DIV_FpI16m80\0" |
| 43477 | /* 307 */ "ILD_Fp16m80\0" |
| 43478 | /* 319 */ "IST_Fp16m80\0" |
| 43479 | /* 331 */ "ISTT_Fp16m80\0" |
| 43480 | /* 344 */ "CMOVNB_Fp80\0" |
| 43481 | /* 356 */ "SUB_Fp80\0" |
| 43482 | /* 365 */ "CMOVB_Fp80\0" |
| 43483 | /* 376 */ "ADD_Fp80\0" |
| 43484 | /* 385 */ "CMOVNBE_Fp80\0" |
| 43485 | /* 398 */ "CMOVBE_Fp80\0" |
| 43486 | /* 410 */ "CMOVNE_Fp80\0" |
| 43487 | /* 422 */ "CMOVE_Fp80\0" |
| 43488 | /* 433 */ "MUL_Fp80\0" |
| 43489 | /* 442 */ "XAM_Fp80\0" |
| 43490 | /* 451 */ "CMOVNP_Fp80\0" |
| 43491 | /* 463 */ "CMOVP_Fp80\0" |
| 43492 | /* 474 */ "ABS_Fp80\0" |
| 43493 | /* 483 */ "CHS_Fp80\0" |
| 43494 | /* 492 */ "SQRT_Fp80\0" |
| 43495 | /* 502 */ "TST_Fp80\0" |
| 43496 | /* 511 */ "DIV_Fp80\0" |
| 43497 | /* 520 */ "UCOM_FpIr80\0" |
| 43498 | /* 532 */ "UCOM_Fpr80\0" |
| 43499 | /* 543 */ "LD_F0\0" |
| 43500 | /* 549 */ "AVX512_512_SET0\0" |
| 43501 | /* 565 */ "AVX512_256_SET0\0" |
| 43502 | /* 581 */ "AVX512_128_SET0\0" |
| 43503 | /* 597 */ "V_SET0\0" |
| 43504 | /* 604 */ "MMX_SET0\0" |
| 43505 | /* 613 */ "AVX_SET0\0" |
| 43506 | /* 622 */ "PREFETCHT0\0" |
| 43507 | /* 633 */ "PREFETCHIT0\0" |
| 43508 | /* 645 */ "SUB_FrST0\0" |
| 43509 | /* 655 */ "ADD_FrST0\0" |
| 43510 | /* 665 */ "MUL_FrST0\0" |
| 43511 | /* 675 */ "SUBR_FrST0\0" |
| 43512 | /* 686 */ "DIVR_FrST0\0" |
| 43513 | /* 697 */ "DIV_FrST0\0" |
| 43514 | /* 707 */ "SUB_FPrST0\0" |
| 43515 | /* 718 */ "ADD_FPrST0\0" |
| 43516 | /* 729 */ "MUL_FPrST0\0" |
| 43517 | /* 740 */ "SUBR_FPrST0\0" |
| 43518 | /* 752 */ "DIVR_FPrST0\0" |
| 43519 | /* 764 */ "DIV_FPrST0\0" |
| 43520 | /* 775 */ "PBLENDVBrm0\0" |
| 43521 | /* 787 */ "BLENDVPDrm0\0" |
| 43522 | /* 799 */ "BLENDVPSrm0\0" |
| 43523 | /* 811 */ "MOV32r0\0" |
| 43524 | /* 819 */ "PBLENDVBrr0\0" |
| 43525 | /* 831 */ "BLENDVPDrr0\0" |
| 43526 | /* 843 */ "BLENDVPSrr0\0" |
| 43527 | /* 855 */ "XSHA1\0" |
| 43528 | /* 861 */ "UBSAN_UD1\0" |
| 43529 | /* 871 */ "LD_F1\0" |
| 43530 | /* 877 */ "CMOV_VK1\0" |
| 43531 | /* 886 */ "FPREM1\0" |
| 43532 | /* 893 */ "F2XM1\0" |
| 43533 | /* 899 */ "FYL2XP1\0" |
| 43534 | /* 907 */ "PTILELOADDT1\0" |
| 43535 | /* 920 */ "PREFETCHT1\0" |
| 43536 | /* 931 */ "PREFETCHIT1\0" |
| 43537 | /* 943 */ "PREFETCHWT1\0" |
| 43538 | /* 955 */ "JCC_1\0" |
| 43539 | /* 961 */ "JMP_1\0" |
| 43540 | /* 967 */ "MOV32r_1\0" |
| 43541 | /* 976 */ "RCL32m1\0" |
| 43542 | /* 984 */ "SHL32m1\0" |
| 43543 | /* 992 */ "ROL32m1\0" |
| 43544 | /* 1000 */ "SAR32m1\0" |
| 43545 | /* 1008 */ "RCR32m1\0" |
| 43546 | /* 1016 */ "SHR32m1\0" |
| 43547 | /* 1024 */ "ROR32m1\0" |
| 43548 | /* 1032 */ "RCL64m1\0" |
| 43549 | /* 1040 */ "SHL64m1\0" |
| 43550 | /* 1048 */ "ROL64m1\0" |
| 43551 | /* 1056 */ "SAR64m1\0" |
| 43552 | /* 1064 */ "RCR64m1\0" |
| 43553 | /* 1072 */ "SHR64m1\0" |
| 43554 | /* 1080 */ "ROR64m1\0" |
| 43555 | /* 1088 */ "RCL16m1\0" |
| 43556 | /* 1096 */ "SHL16m1\0" |
| 43557 | /* 1104 */ "ROL16m1\0" |
| 43558 | /* 1112 */ "SAR16m1\0" |
| 43559 | /* 1120 */ "RCR16m1\0" |
| 43560 | /* 1128 */ "SHR16m1\0" |
| 43561 | /* 1136 */ "ROR16m1\0" |
| 43562 | /* 1144 */ "RCL8m1\0" |
| 43563 | /* 1151 */ "SHL8m1\0" |
| 43564 | /* 1158 */ "ROL8m1\0" |
| 43565 | /* 1165 */ "SAR8m1\0" |
| 43566 | /* 1172 */ "RCR8m1\0" |
| 43567 | /* 1179 */ "SHR8m1\0" |
| 43568 | /* 1186 */ "ROR8m1\0" |
| 43569 | /* 1193 */ "RCL32r1\0" |
| 43570 | /* 1201 */ "SHL32r1\0" |
| 43571 | /* 1209 */ "ROL32r1\0" |
| 43572 | /* 1217 */ "SAR32r1\0" |
| 43573 | /* 1225 */ "RCR32r1\0" |
| 43574 | /* 1233 */ "SHR32r1\0" |
| 43575 | /* 1241 */ "ROR32r1\0" |
| 43576 | /* 1249 */ "MOV32r1\0" |
| 43577 | /* 1257 */ "RCL64r1\0" |
| 43578 | /* 1265 */ "SHL64r1\0" |
| 43579 | /* 1273 */ "ROL64r1\0" |
| 43580 | /* 1281 */ "SAR64r1\0" |
| 43581 | /* 1289 */ "RCR64r1\0" |
| 43582 | /* 1297 */ "SHR64r1\0" |
| 43583 | /* 1305 */ "ROR64r1\0" |
| 43584 | /* 1313 */ "RCL16r1\0" |
| 43585 | /* 1321 */ "SHL16r1\0" |
| 43586 | /* 1329 */ "ROL16r1\0" |
| 43587 | /* 1337 */ "SAR16r1\0" |
| 43588 | /* 1345 */ "RCR16r1\0" |
| 43589 | /* 1353 */ "SHR16r1\0" |
| 43590 | /* 1361 */ "ROR16r1\0" |
| 43591 | /* 1369 */ "RCL8r1\0" |
| 43592 | /* 1376 */ "SHL8r1\0" |
| 43593 | /* 1383 */ "ROL8r1\0" |
| 43594 | /* 1390 */ "SAR8r1\0" |
| 43595 | /* 1397 */ "RCR8r1\0" |
| 43596 | /* 1404 */ "SHR8r1\0" |
| 43597 | /* 1411 */ "ROR8r1\0" |
| 43598 | /* 1418 */ "CMOV_VR512\0" |
| 43599 | /* 1429 */ "LD_Fp032\0" |
| 43600 | /* 1438 */ "LD_Fp132\0" |
| 43601 | /* 1447 */ "INVLPGA32\0" |
| 43602 | /* 1457 */ "PUSHA32\0" |
| 43603 | /* 1465 */ "POPA32\0" |
| 43604 | /* 1472 */ "MOVDIR64B32\0" |
| 43605 | /* 1484 */ "INVLPGB32\0" |
| 43606 | /* 1494 */ "VMLOAD32\0" |
| 43607 | /* 1503 */ "LXADD32\0" |
| 43608 | /* 1511 */ "INVPCID32\0" |
| 43609 | /* 1521 */ "RDPID32\0" |
| 43610 | /* 1529 */ "INVVPID32\0" |
| 43611 | /* 1539 */ "ENQCMD32\0" |
| 43612 | /* 1548 */ "PVALIDATE32\0" |
| 43613 | /* 1560 */ "VMSAVE32\0" |
| 43614 | /* 1569 */ "PUSHF32\0" |
| 43615 | /* 1577 */ "POPF32\0" |
| 43616 | /* 1584 */ "LCMPXCHG32\0" |
| 43617 | /* 1595 */ "MOVDIRI32\0" |
| 43618 | /* 1605 */ "LRETI32\0" |
| 43619 | /* 1613 */ "CMOV_VK32\0" |
| 43620 | /* 1623 */ "INDIRECT_THUNK_CALL32\0" |
| 43621 | /* 1645 */ "INDIRECT_THUNK_TCRETURN32\0" |
| 43622 | /* 1671 */ "VMRUN32\0" |
| 43623 | /* 1679 */ "ADJCALLSTACKDOWN32\0" |
| 43624 | /* 1698 */ "CMOV_RFP32\0" |
| 43625 | /* 1709 */ "ADJCALLSTACKUP32\0" |
| 43626 | /* 1726 */ "ENDBR32\0" |
| 43627 | /* 1734 */ "CMOV_FR32\0" |
| 43628 | /* 1744 */ "CMOV_GR32\0" |
| 43629 | /* 1754 */ "UMONITOR32\0" |
| 43630 | /* 1765 */ "PUSHCS32\0" |
| 43631 | /* 1774 */ "PUSHDS32\0" |
| 43632 | /* 1783 */ "ENQCMDS32\0" |
| 43633 | /* 1793 */ "POPDS32\0" |
| 43634 | /* 1801 */ "PUSHES32\0" |
| 43635 | /* 1810 */ "POPES32\0" |
| 43636 | /* 1818 */ "PUSHFS32\0" |
| 43637 | /* 1827 */ "POPFS32\0" |
| 43638 | /* 1835 */ "RDFLAGS32\0" |
| 43639 | /* 1845 */ "WRFLAGS32\0" |
| 43640 | /* 1855 */ "PUSHGS32\0" |
| 43641 | /* 1864 */ "POPGS32\0" |
| 43642 | /* 1872 */ "PUSHSS32\0" |
| 43643 | /* 1881 */ "POPSS32\0" |
| 43644 | /* 1889 */ "IRET32\0" |
| 43645 | /* 1896 */ "LRET32\0" |
| 43646 | /* 1903 */ "INVEPT32\0" |
| 43647 | /* 1912 */ "VAARG_X32\0" |
| 43648 | /* 1922 */ "TLS_addrX32\0" |
| 43649 | /* 1934 */ "TLS_base_addrX32\0" |
| 43650 | /* 1951 */ "PROBED_ALLOCA_32\0" |
| 43651 | /* 1968 */ "SEG_ALLOCA_32\0" |
| 43652 | /* 1982 */ "DYN_ALLOCA_32\0" |
| 43653 | /* 1996 */ "REP_STOSB_32\0" |
| 43654 | /* 2009 */ "REP_MOVSB_32\0" |
| 43655 | /* 2022 */ "REP_STOSD_32\0" |
| 43656 | /* 2035 */ "REP_MOVSD_32\0" |
| 43657 | /* 2048 */ "AVX512_512_SEXT_MASK_32\0" |
| 43658 | /* 2072 */ "REP_STOSQ_32\0" |
| 43659 | /* 2085 */ "REP_MOVSQ_32\0" |
| 43660 | /* 2098 */ "REP_STOSW_32\0" |
| 43661 | /* 2111 */ "REP_MOVSW_32\0" |
| 43662 | /* 2124 */ "TLSCall_32\0" |
| 43663 | /* 2135 */ "TLS_desc32\0" |
| 43664 | /* 2146 */ "SBB32i32\0" |
| 43665 | /* 2155 */ "SUB32i32\0" |
| 43666 | /* 2164 */ "ADC32i32\0" |
| 43667 | /* 2173 */ "ADD32i32\0" |
| 43668 | /* 2182 */ "AND32i32\0" |
| 43669 | /* 2191 */ "CMP32i32\0" |
| 43670 | /* 2200 */ "XOR32i32\0" |
| 43671 | /* 2209 */ "TEST32i32\0" |
| 43672 | /* 2219 */ "SBB64i32\0" |
| 43673 | /* 2228 */ "SUB64i32\0" |
| 43674 | /* 2237 */ "ADC64i32\0" |
| 43675 | /* 2246 */ "ADD64i32\0" |
| 43676 | /* 2255 */ "AND64i32\0" |
| 43677 | /* 2264 */ "PUSH64i32\0" |
| 43678 | /* 2274 */ "CMP64i32\0" |
| 43679 | /* 2283 */ "XOR64i32\0" |
| 43680 | /* 2292 */ "TEST64i32\0" |
| 43681 | /* 2302 */ "SBB64mi32\0" |
| 43682 | /* 2312 */ "LOCK_SUB64mi32\0" |
| 43683 | /* 2327 */ "ADC64mi32\0" |
| 43684 | /* 2337 */ "LOCK_ADD64mi32\0" |
| 43685 | /* 2352 */ "LOCK_AND64mi32\0" |
| 43686 | /* 2367 */ "CCMP64mi32\0" |
| 43687 | /* 2378 */ "LOCK_XOR64mi32\0" |
| 43688 | /* 2393 */ "LOCK_OR64mi32\0" |
| 43689 | /* 2407 */ "CTEST64mi32\0" |
| 43690 | /* 2419 */ "MOV64mi32\0" |
| 43691 | /* 2429 */ "IMUL64rmi32\0" |
| 43692 | /* 2441 */ "IMULZU64rmi32\0" |
| 43693 | /* 2455 */ "SBB64ri32\0" |
| 43694 | /* 2465 */ "SUB64ri32\0" |
| 43695 | /* 2475 */ "ADC64ri32\0" |
| 43696 | /* 2485 */ "ADD64ri32\0" |
| 43697 | /* 2495 */ "AND64ri32\0" |
| 43698 | /* 2505 */ "CCMP64ri32\0" |
| 43699 | /* 2516 */ "XOR64ri32\0" |
| 43700 | /* 2526 */ "CTEST64ri32\0" |
| 43701 | /* 2538 */ "MOV64ri32\0" |
| 43702 | /* 2548 */ "IMUL64rri32\0" |
| 43703 | /* 2560 */ "IMULZU64rri32\0" |
| 43704 | /* 2574 */ "CALL64pcrel32\0" |
| 43705 | /* 2588 */ "CALLpcrel32\0" |
| 43706 | /* 2600 */ "ST_FpP80m32\0" |
| 43707 | /* 2612 */ "SUB_Fp80m32\0" |
| 43708 | /* 2624 */ "ADD_Fp80m32\0" |
| 43709 | /* 2636 */ "MUL_Fp80m32\0" |
| 43710 | /* 2648 */ "SUBR_Fp80m32\0" |
| 43711 | /* 2661 */ "DIVR_Fp80m32\0" |
| 43712 | /* 2674 */ "ST_Fp80m32\0" |
| 43713 | /* 2685 */ "DIV_Fp80m32\0" |
| 43714 | /* 2697 */ "SUB_FpI32m32\0" |
| 43715 | /* 2710 */ "ADD_FpI32m32\0" |
| 43716 | /* 2723 */ "MUL_FpI32m32\0" |
| 43717 | /* 2736 */ "SUBR_FpI32m32\0" |
| 43718 | /* 2750 */ "DIVR_FpI32m32\0" |
| 43719 | /* 2764 */ "DIV_FpI32m32\0" |
| 43720 | /* 2777 */ "ILD_Fp32m32\0" |
| 43721 | /* 2789 */ "IST_Fp32m32\0" |
| 43722 | /* 2801 */ "ISTT_Fp32m32\0" |
| 43723 | /* 2814 */ "CRC32r32m32\0" |
| 43724 | /* 2826 */ "ST_FpP64m32\0" |
| 43725 | /* 2838 */ "SUB_Fp64m32\0" |
| 43726 | /* 2850 */ "ADD_Fp64m32\0" |
| 43727 | /* 2862 */ "ILD_Fp64m32\0" |
| 43728 | /* 2874 */ "MUL_Fp64m32\0" |
| 43729 | /* 2886 */ "SUBR_Fp64m32\0" |
| 43730 | /* 2899 */ "DIVR_Fp64m32\0" |
| 43731 | /* 2912 */ "IST_Fp64m32\0" |
| 43732 | /* 2924 */ "ISTT_Fp64m32\0" |
| 43733 | /* 2937 */ "DIV_Fp64m32\0" |
| 43734 | /* 2949 */ "SUB_FpI16m32\0" |
| 43735 | /* 2962 */ "ADD_FpI16m32\0" |
| 43736 | /* 2975 */ "MUL_FpI16m32\0" |
| 43737 | /* 2988 */ "SUBR_FpI16m32\0" |
| 43738 | /* 3002 */ "DIVR_FpI16m32\0" |
| 43739 | /* 3016 */ "DIV_FpI16m32\0" |
| 43740 | /* 3029 */ "ILD_Fp16m32\0" |
| 43741 | /* 3041 */ "IST_Fp16m32\0" |
| 43742 | /* 3053 */ "ISTT_Fp16m32\0" |
| 43743 | /* 3066 */ "FP80_ADDm32\0" |
| 43744 | /* 3078 */ "MOVSX32rm32\0" |
| 43745 | /* 3090 */ "MOVSX64rm32\0" |
| 43746 | /* 3102 */ "MOVSX16rm32\0" |
| 43747 | /* 3114 */ "MOV32ao32\0" |
| 43748 | /* 3124 */ "MOV64ao32\0" |
| 43749 | /* 3134 */ "MOV16ao32\0" |
| 43750 | /* 3144 */ "MOV8ao32\0" |
| 43751 | /* 3153 */ "CMOVNB_Fp32\0" |
| 43752 | /* 3165 */ "SUB_Fp32\0" |
| 43753 | /* 3174 */ "CMOVB_Fp32\0" |
| 43754 | /* 3185 */ "ADD_Fp32\0" |
| 43755 | /* 3194 */ "CMOVNBE_Fp32\0" |
| 43756 | /* 3207 */ "CMOVBE_Fp32\0" |
| 43757 | /* 3219 */ "CMOVNE_Fp32\0" |
| 43758 | /* 3231 */ "CMOVE_Fp32\0" |
| 43759 | /* 3242 */ "MUL_Fp32\0" |
| 43760 | /* 3251 */ "XAM_Fp32\0" |
| 43761 | /* 3260 */ "CMOVNP_Fp32\0" |
| 43762 | /* 3272 */ "CMOVP_Fp32\0" |
| 43763 | /* 3283 */ "ABS_Fp32\0" |
| 43764 | /* 3292 */ "CHS_Fp32\0" |
| 43765 | /* 3301 */ "SQRT_Fp32\0" |
| 43766 | /* 3311 */ "TST_Fp32\0" |
| 43767 | /* 3320 */ "DIV_Fp32\0" |
| 43768 | /* 3329 */ "EH_SjLj_LongJmp32\0" |
| 43769 | /* 3347 */ "EH_SjLj_SetJmp32\0" |
| 43770 | /* 3364 */ "CRC32r32r32\0" |
| 43771 | /* 3376 */ "UCOM_FpIr32\0" |
| 43772 | /* 3388 */ "TLS_addr32\0" |
| 43773 | /* 3399 */ "TLS_base_addr32\0" |
| 43774 | /* 3415 */ "CMPCCXADDmr32\0" |
| 43775 | /* 3429 */ "UCOM_Fpr32\0" |
| 43776 | /* 3440 */ "MOVSX32rr32\0" |
| 43777 | /* 3452 */ "MOVSX64rr32\0" |
| 43778 | /* 3464 */ "MOVSX16rr32\0" |
| 43779 | /* 3476 */ "FLDLG2\0" |
| 43780 | /* 3483 */ "G_FLOG2\0" |
| 43781 | /* 3491 */ "PUSH2\0" |
| 43782 | /* 3497 */ "CMOV_VK2\0" |
| 43783 | /* 3506 */ "FLDLN2\0" |
| 43784 | /* 3513 */ "POP2\0" |
| 43785 | /* 3518 */ "G_FEXP2\0" |
| 43786 | /* 3526 */ "PREFETCHT2\0" |
| 43787 | /* 3537 */ "JCC_2\0" |
| 43788 | /* 3543 */ "XBEGIN_2\0" |
| 43789 | /* 3552 */ "JMP_2\0" |
| 43790 | /* 3558 */ "INT3\0" |
| 43791 | /* 3563 */ "LD_Fp064\0" |
| 43792 | /* 3572 */ "LD_Fp164\0" |
| 43793 | /* 3581 */ "INVLPGA64\0" |
| 43794 | /* 3591 */ "MOVDIR64B64\0" |
| 43795 | /* 3603 */ "LLWPCB64\0" |
| 43796 | /* 3612 */ "SLWPCB64\0" |
| 43797 | /* 3621 */ "INVLPGB64\0" |
| 43798 | /* 3631 */ "XSAVEC64\0" |
| 43799 | /* 3640 */ "VMLOAD64\0" |
| 43800 | /* 3649 */ "LXADD64\0" |
| 43801 | /* 3657 */ "INVPCID64\0" |
| 43802 | /* 3667 */ "RDPID64\0" |
| 43803 | /* 3675 */ "INVVPID64\0" |
| 43804 | /* 3685 */ "ENQCMD64\0" |
| 43805 | /* 3694 */ "RDFSBASE64\0" |
| 43806 | /* 3705 */ "WRFSBASE64\0" |
| 43807 | /* 3716 */ "RDGSBASE64\0" |
| 43808 | /* 3727 */ "WRGSBASE64\0" |
| 43809 | /* 3738 */ "PVALIDATE64\0" |
| 43810 | /* 3750 */ "LEAVE64\0" |
| 43811 | /* 3758 */ "VMSAVE64\0" |
| 43812 | /* 3767 */ "FXSAVE64\0" |
| 43813 | /* 3776 */ "PUSHF64\0" |
| 43814 | /* 3784 */ "POPF64\0" |
| 43815 | /* 3791 */ "LCMPXCHG64\0" |
| 43816 | /* 3802 */ "MOVDIRI64\0" |
| 43817 | /* 3812 */ "LRETI64\0" |
| 43818 | /* 3820 */ "CMOV_VK64\0" |
| 43819 | /* 3830 */ "INDIRECT_THUNK_CALL64\0" |
| 43820 | /* 3852 */ "INDIRECT_THUNK_TCRETURN64\0" |
| 43821 | /* 3878 */ "EH_RETURN64\0" |
| 43822 | /* 3890 */ "VMRUN64\0" |
| 43823 | /* 3898 */ "ADJCALLSTACKDOWN64\0" |
| 43824 | /* 3917 */ "CMOV_RFP64\0" |
| 43825 | /* 3928 */ "ADJCALLSTACKUP64\0" |
| 43826 | /* 3945 */ "MMX_MASKMOVQ64\0" |
| 43827 | /* 3960 */ "ENDBR64\0" |
| 43828 | /* 3968 */ "CMOV_FR64\0" |
| 43829 | /* 3978 */ "UMONITOR64\0" |
| 43830 | /* 3989 */ "FXRSTOR64\0" |
| 43831 | /* 3999 */ "CMOV_VR64\0" |
| 43832 | /* 4009 */ "ENQCMDS64\0" |
| 43833 | /* 4019 */ "XSAVES64\0" |
| 43834 | /* 4028 */ "PUSHFS64\0" |
| 43835 | /* 4037 */ "POPFS64\0" |
| 43836 | /* 4045 */ "RDFLAGS64\0" |
| 43837 | /* 4055 */ "WRFLAGS64\0" |
| 43838 | /* 4065 */ "PUSHGS64\0" |
| 43839 | /* 4074 */ "POPGS64\0" |
| 43840 | /* 4082 */ "XRSTORS64\0" |
| 43841 | /* 4092 */ "IRET64\0" |
| 43842 | /* 4099 */ "LRET64\0" |
| 43843 | /* 4106 */ "SYSRET64\0" |
| 43844 | /* 4115 */ "SYSEXIT64\0" |
| 43845 | /* 4125 */ "INVEPT64\0" |
| 43846 | /* 4134 */ "XSAVEOPT64\0" |
| 43847 | /* 4145 */ "VMASKMOVDQU64\0" |
| 43848 | /* 4159 */ "PROBED_ALLOCA_64\0" |
| 43849 | /* 4176 */ "SEG_ALLOCA_64\0" |
| 43850 | /* 4190 */ "DYN_ALLOCA_64\0" |
| 43851 | /* 4204 */ "REP_STOSB_64\0" |
| 43852 | /* 4217 */ "REP_MOVSB_64\0" |
| 43853 | /* 4230 */ "REP_STOSD_64\0" |
| 43854 | /* 4243 */ "REP_MOVSD_64\0" |
| 43855 | /* 4256 */ "VAARG_64\0" |
| 43856 | /* 4265 */ "AVX512_512_SEXT_MASK_64\0" |
| 43857 | /* 4289 */ "REP_STOSQ_64\0" |
| 43858 | /* 4302 */ "REP_MOVSQ_64\0" |
| 43859 | /* 4315 */ "REP_STOSW_64\0" |
| 43860 | /* 4328 */ "REP_MOVSW_64\0" |
| 43861 | /* 4341 */ "TLSCall_64\0" |
| 43862 | /* 4352 */ "TLS_desc64\0" |
| 43863 | /* 4363 */ "TAILJMPd64\0" |
| 43864 | /* 4374 */ "TCRETURNdi64\0" |
| 43865 | /* 4387 */ "TCRETURNmi64\0" |
| 43866 | /* 4400 */ "MOV32ri64\0" |
| 43867 | /* 4410 */ "TCRETURNri64\0" |
| 43868 | /* 4423 */ "ST_FpP80m64\0" |
| 43869 | /* 4435 */ "SUB_Fp80m64\0" |
| 43870 | /* 4447 */ "ADD_Fp80m64\0" |
| 43871 | /* 4459 */ "MUL_Fp80m64\0" |
| 43872 | /* 4471 */ "SUBR_Fp80m64\0" |
| 43873 | /* 4484 */ "DIVR_Fp80m64\0" |
| 43874 | /* 4497 */ "ST_Fp80m64\0" |
| 43875 | /* 4508 */ "DIV_Fp80m64\0" |
| 43876 | /* 4520 */ "SUB_FpI32m64\0" |
| 43877 | /* 4533 */ "ADD_FpI32m64\0" |
| 43878 | /* 4546 */ "MUL_FpI32m64\0" |
| 43879 | /* 4559 */ "SUBR_FpI32m64\0" |
| 43880 | /* 4573 */ "DIVR_FpI32m64\0" |
| 43881 | /* 4587 */ "DIV_FpI32m64\0" |
| 43882 | /* 4600 */ "ILD_Fp32m64\0" |
| 43883 | /* 4612 */ "IST_Fp32m64\0" |
| 43884 | /* 4624 */ "ISTT_Fp32m64\0" |
| 43885 | /* 4637 */ "ILD_Fp64m64\0" |
| 43886 | /* 4649 */ "IST_Fp64m64\0" |
| 43887 | /* 4661 */ "ISTT_Fp64m64\0" |
| 43888 | /* 4674 */ "CRC32r64m64\0" |
| 43889 | /* 4686 */ "SUB_FpI16m64\0" |
| 43890 | /* 4699 */ "ADD_FpI16m64\0" |
| 43891 | /* 4712 */ "MUL_FpI16m64\0" |
| 43892 | /* 4725 */ "SUBR_FpI16m64\0" |
| 43893 | /* 4739 */ "DIVR_FpI16m64\0" |
| 43894 | /* 4753 */ "DIV_FpI16m64\0" |
| 43895 | /* 4766 */ "ILD_Fp16m64\0" |
| 43896 | /* 4778 */ "IST_Fp16m64\0" |
| 43897 | /* 4790 */ "ISTT_Fp16m64\0" |
| 43898 | /* 4803 */ "TAILJMPm64\0" |
| 43899 | /* 4814 */ "MOV32ao64\0" |
| 43900 | /* 4824 */ "MOV64ao64\0" |
| 43901 | /* 4834 */ "MOV16ao64\0" |
| 43902 | /* 4844 */ "MOV8ao64\0" |
| 43903 | /* 4853 */ "CMOVNB_Fp64\0" |
| 43904 | /* 4865 */ "SUB_Fp64\0" |
| 43905 | /* 4874 */ "CMOVB_Fp64\0" |
| 43906 | /* 4885 */ "ADD_Fp64\0" |
| 43907 | /* 4894 */ "CMOVNBE_Fp64\0" |
| 43908 | /* 4907 */ "CMOVBE_Fp64\0" |
| 43909 | /* 4919 */ "CMOVNE_Fp64\0" |
| 43910 | /* 4931 */ "CMOVE_Fp64\0" |
| 43911 | /* 4942 */ "MUL_Fp64\0" |
| 43912 | /* 4951 */ "XAM_Fp64\0" |
| 43913 | /* 4960 */ "CMOVNP_Fp64\0" |
| 43914 | /* 4972 */ "CMOVP_Fp64\0" |
| 43915 | /* 4983 */ "ABS_Fp64\0" |
| 43916 | /* 4992 */ "CHS_Fp64\0" |
| 43917 | /* 5001 */ "SQRT_Fp64\0" |
| 43918 | /* 5011 */ "TST_Fp64\0" |
| 43919 | /* 5020 */ "DIV_Fp64\0" |
| 43920 | /* 5029 */ "EH_SjLj_LongJmp64\0" |
| 43921 | /* 5047 */ "EH_SjLj_SetJmp64\0" |
| 43922 | /* 5064 */ "CRC32r64r64\0" |
| 43923 | /* 5076 */ "UCOM_FpIr64\0" |
| 43924 | /* 5088 */ "TAILJMPr64\0" |
| 43925 | /* 5099 */ "TLS_addr64\0" |
| 43926 | /* 5110 */ "TLS_base_addr64\0" |
| 43927 | /* 5126 */ "CMPCCXADDmr64\0" |
| 43928 | /* 5140 */ "UCOM_Fpr64\0" |
| 43929 | /* 5151 */ "CMOV_VK4\0" |
| 43930 | /* 5160 */ "JCC_4\0" |
| 43931 | /* 5166 */ "XBEGIN_4\0" |
| 43932 | /* 5175 */ "JMP_4\0" |
| 43933 | /* 5181 */ "PUSHA16\0" |
| 43934 | /* 5189 */ "POPA16\0" |
| 43935 | /* 5196 */ "MOVDIR64B16\0" |
| 43936 | /* 5208 */ "LXADD16\0" |
| 43937 | /* 5216 */ "ENQCMD16\0" |
| 43938 | /* 5225 */ "PUSHF16\0" |
| 43939 | /* 5233 */ "POPF16\0" |
| 43940 | /* 5240 */ "LCMPXCHG16\0" |
| 43941 | /* 5251 */ "LRETI16\0" |
| 43942 | /* 5259 */ "CMOV_VK16\0" |
| 43943 | /* 5269 */ "CMOV_FR16\0" |
| 43944 | /* 5279 */ "CMOV_GR16\0" |
| 43945 | /* 5289 */ "UMONITOR16\0" |
| 43946 | /* 5300 */ "PUSHCS16\0" |
| 43947 | /* 5309 */ "PUSHDS16\0" |
| 43948 | /* 5318 */ "ENQCMDS16\0" |
| 43949 | /* 5328 */ "POPDS16\0" |
| 43950 | /* 5336 */ "PUSHES16\0" |
| 43951 | /* 5345 */ "POPES16\0" |
| 43952 | /* 5353 */ "PUSHFS16\0" |
| 43953 | /* 5362 */ "POPFS16\0" |
| 43954 | /* 5370 */ "PUSHGS16\0" |
| 43955 | /* 5379 */ "POPGS16\0" |
| 43956 | /* 5387 */ "PUSHSS16\0" |
| 43957 | /* 5396 */ "POPSS16\0" |
| 43958 | /* 5404 */ "IRET16\0" |
| 43959 | /* 5411 */ "LRET16\0" |
| 43960 | /* 5418 */ "SBB16i16\0" |
| 43961 | /* 5427 */ "SUB16i16\0" |
| 43962 | /* 5436 */ "ADC16i16\0" |
| 43963 | /* 5445 */ "ADD16i16\0" |
| 43964 | /* 5454 */ "AND16i16\0" |
| 43965 | /* 5463 */ "CMP16i16\0" |
| 43966 | /* 5472 */ "XOR16i16\0" |
| 43967 | /* 5481 */ "TEST16i16\0" |
| 43968 | /* 5491 */ "CALLpcrel16\0" |
| 43969 | /* 5503 */ "CRC32r32m16\0" |
| 43970 | /* 5515 */ "MOVSX32rm16\0" |
| 43971 | /* 5527 */ "MOVZX32rm16\0" |
| 43972 | /* 5539 */ "MOVSX64rm16\0" |
| 43973 | /* 5551 */ "MOVZX64rm16\0" |
| 43974 | /* 5563 */ "MOVSX16rm16\0" |
| 43975 | /* 5575 */ "MOVZX16rm16\0" |
| 43976 | /* 5587 */ "MOV32ao16\0" |
| 43977 | /* 5597 */ "MOV16ao16\0" |
| 43978 | /* 5607 */ "MOV8ao16\0" |
| 43979 | /* 5616 */ "CRC32r32r16\0" |
| 43980 | /* 5628 */ "MOVSX32rr16\0" |
| 43981 | /* 5640 */ "MOVZX32rr16\0" |
| 43982 | /* 5652 */ "MOVSX64rr16\0" |
| 43983 | /* 5664 */ "MOVZX64rr16\0" |
| 43984 | /* 5676 */ "MOVSX16rr16\0" |
| 43985 | /* 5688 */ "MOVZX16rr16\0" |
| 43986 | /* 5700 */ "XSHA256\0" |
| 43987 | /* 5708 */ "CMOV_VR256\0" |
| 43988 | /* 5719 */ "ENCODEKEY256\0" |
| 43989 | /* 5732 */ "AVX512_FsFLD0F128\0" |
| 43990 | /* 5750 */ "CMOV_VR128\0" |
| 43991 | /* 5761 */ "ENCODEKEY128\0" |
| 43992 | /* 5774 */ "LXADD8\0" |
| 43993 | /* 5781 */ "LCMPXCHG8\0" |
| 43994 | /* 5791 */ "CMOV_VK8\0" |
| 43995 | /* 5800 */ "CMOV_GR8\0" |
| 43996 | /* 5809 */ "PUSH32i8\0" |
| 43997 | /* 5818 */ "PUSH64i8\0" |
| 43998 | /* 5827 */ "PUSH16i8\0" |
| 43999 | /* 5836 */ "SBB8i8\0" |
| 44000 | /* 5843 */ "SUB8i8\0" |
| 44001 | /* 5850 */ "ADC8i8\0" |
| 44002 | /* 5857 */ "AAD8i8\0" |
| 44003 | /* 5864 */ "ADD8i8\0" |
| 44004 | /* 5871 */ "AND8i8\0" |
| 44005 | /* 5878 */ "AAM8i8\0" |
| 44006 | /* 5885 */ "CMP8i8\0" |
| 44007 | /* 5892 */ "XOR8i8\0" |
| 44008 | /* 5899 */ "TEST8i8\0" |
| 44009 | /* 5907 */ "SBB32mi8\0" |
| 44010 | /* 5916 */ "LOCK_SUB32mi8\0" |
| 44011 | /* 5930 */ "ADC32mi8\0" |
| 44012 | /* 5939 */ "BTC32mi8\0" |
| 44013 | /* 5948 */ "LOCK_ADD32mi8\0" |
| 44014 | /* 5962 */ "LOCK_AND32mi8\0" |
| 44015 | /* 5976 */ "CCMP32mi8\0" |
| 44016 | /* 5986 */ "LOCK_XOR32mi8\0" |
| 44017 | /* 6000 */ "LOCK_OR32mi8\0" |
| 44018 | /* 6013 */ "BTR32mi8\0" |
| 44019 | /* 6022 */ "BTS32mi8\0" |
| 44020 | /* 6031 */ "BT32mi8\0" |
| 44021 | /* 6039 */ "SBB64mi8\0" |
| 44022 | /* 6048 */ "LOCK_SUB64mi8\0" |
| 44023 | /* 6062 */ "ADC64mi8\0" |
| 44024 | /* 6071 */ "BTC64mi8\0" |
| 44025 | /* 6080 */ "LOCK_ADD64mi8\0" |
| 44026 | /* 6094 */ "LOCK_AND64mi8\0" |
| 44027 | /* 6108 */ "CCMP64mi8\0" |
| 44028 | /* 6118 */ "LOCK_XOR64mi8\0" |
| 44029 | /* 6132 */ "LOCK_OR64mi8\0" |
| 44030 | /* 6145 */ "BTR64mi8\0" |
| 44031 | /* 6154 */ "BTS64mi8\0" |
| 44032 | /* 6163 */ "BT64mi8\0" |
| 44033 | /* 6171 */ "SBB16mi8\0" |
| 44034 | /* 6180 */ "LOCK_SUB16mi8\0" |
| 44035 | /* 6194 */ "ADC16mi8\0" |
| 44036 | /* 6203 */ "BTC16mi8\0" |
| 44037 | /* 6212 */ "LOCK_ADD16mi8\0" |
| 44038 | /* 6226 */ "LOCK_AND16mi8\0" |
| 44039 | /* 6240 */ "CCMP16mi8\0" |
| 44040 | /* 6250 */ "LOCK_XOR16mi8\0" |
| 44041 | /* 6264 */ "LOCK_OR16mi8\0" |
| 44042 | /* 6277 */ "BTR16mi8\0" |
| 44043 | /* 6286 */ "BTS16mi8\0" |
| 44044 | /* 6295 */ "BT16mi8\0" |
| 44045 | /* 6303 */ "SBB8mi8\0" |
| 44046 | /* 6311 */ "SUB8mi8\0" |
| 44047 | /* 6319 */ "ADC8mi8\0" |
| 44048 | /* 6327 */ "ADD8mi8\0" |
| 44049 | /* 6335 */ "AND8mi8\0" |
| 44050 | /* 6343 */ "CMP8mi8\0" |
| 44051 | /* 6351 */ "XOR8mi8\0" |
| 44052 | /* 6359 */ "IMUL32rmi8\0" |
| 44053 | /* 6370 */ "IMULZU32rmi8\0" |
| 44054 | /* 6383 */ "IMUL64rmi8\0" |
| 44055 | /* 6394 */ "IMULZU64rmi8\0" |
| 44056 | /* 6407 */ "IMUL16rmi8\0" |
| 44057 | /* 6418 */ "IMULZU16rmi8\0" |
| 44058 | /* 6431 */ "SBB32ri8\0" |
| 44059 | /* 6440 */ "SUB32ri8\0" |
| 44060 | /* 6449 */ "ADC32ri8\0" |
| 44061 | /* 6458 */ "BTC32ri8\0" |
| 44062 | /* 6467 */ "ADD32ri8\0" |
| 44063 | /* 6476 */ "AND32ri8\0" |
| 44064 | /* 6485 */ "CCMP32ri8\0" |
| 44065 | /* 6495 */ "XOR32ri8\0" |
| 44066 | /* 6504 */ "BTR32ri8\0" |
| 44067 | /* 6513 */ "BTS32ri8\0" |
| 44068 | /* 6522 */ "BT32ri8\0" |
| 44069 | /* 6530 */ "SBB64ri8\0" |
| 44070 | /* 6539 */ "SUB64ri8\0" |
| 44071 | /* 6548 */ "ADC64ri8\0" |
| 44072 | /* 6557 */ "BTC64ri8\0" |
| 44073 | /* 6566 */ "ADD64ri8\0" |
| 44074 | /* 6575 */ "AND64ri8\0" |
| 44075 | /* 6584 */ "CCMP64ri8\0" |
| 44076 | /* 6594 */ "XOR64ri8\0" |
| 44077 | /* 6603 */ "BTR64ri8\0" |
| 44078 | /* 6612 */ "BTS64ri8\0" |
| 44079 | /* 6621 */ "BT64ri8\0" |
| 44080 | /* 6629 */ "SBB16ri8\0" |
| 44081 | /* 6638 */ "SUB16ri8\0" |
| 44082 | /* 6647 */ "ADC16ri8\0" |
| 44083 | /* 6656 */ "BTC16ri8\0" |
| 44084 | /* 6665 */ "ADD16ri8\0" |
| 44085 | /* 6674 */ "AND16ri8\0" |
| 44086 | /* 6683 */ "CCMP16ri8\0" |
| 44087 | /* 6693 */ "XOR16ri8\0" |
| 44088 | /* 6702 */ "BTR16ri8\0" |
| 44089 | /* 6711 */ "BTS16ri8\0" |
| 44090 | /* 6720 */ "BT16ri8\0" |
| 44091 | /* 6728 */ "SBB8ri8\0" |
| 44092 | /* 6736 */ "SUB8ri8\0" |
| 44093 | /* 6744 */ "ADC8ri8\0" |
| 44094 | /* 6752 */ "ADD8ri8\0" |
| 44095 | /* 6760 */ "AND8ri8\0" |
| 44096 | /* 6768 */ "CMP8ri8\0" |
| 44097 | /* 6776 */ "XOR8ri8\0" |
| 44098 | /* 6784 */ "SHLD32mri8\0" |
| 44099 | /* 6795 */ "SHRD32mri8\0" |
| 44100 | /* 6806 */ "SHLD64mri8\0" |
| 44101 | /* 6817 */ "SHRD64mri8\0" |
| 44102 | /* 6828 */ "SHLD16mri8\0" |
| 44103 | /* 6839 */ "SHRD16mri8\0" |
| 44104 | /* 6850 */ "SHLD32rri8\0" |
| 44105 | /* 6861 */ "SHRD32rri8\0" |
| 44106 | /* 6872 */ "IMUL32rri8\0" |
| 44107 | /* 6883 */ "IMULZU32rri8\0" |
| 44108 | /* 6896 */ "SHLD64rri8\0" |
| 44109 | /* 6907 */ "SHRD64rri8\0" |
| 44110 | /* 6918 */ "IMUL64rri8\0" |
| 44111 | /* 6929 */ "IMULZU64rri8\0" |
| 44112 | /* 6942 */ "SHLD16rri8\0" |
| 44113 | /* 6953 */ "SHRD16rri8\0" |
| 44114 | /* 6964 */ "IMUL16rri8\0" |
| 44115 | /* 6975 */ "IMULZU16rri8\0" |
| 44116 | /* 6988 */ "MOV32ImmSExti8\0" |
| 44117 | /* 7003 */ "MOV64ImmSExti8\0" |
| 44118 | /* 7018 */ "CRC32r32m8\0" |
| 44119 | /* 7029 */ "CRC32r64m8\0" |
| 44120 | /* 7040 */ "MOVSX32rm8\0" |
| 44121 | /* 7051 */ "MOVZX32rm8\0" |
| 44122 | /* 7062 */ "MOVSX64rm8\0" |
| 44123 | /* 7073 */ "MOVZX64rm8\0" |
| 44124 | /* 7084 */ "MOVSX16rm8\0" |
| 44125 | /* 7095 */ "MOVZX16rm8\0" |
| 44126 | /* 7106 */ "CRC32r32r8\0" |
| 44127 | /* 7117 */ "CRC32r64r8\0" |
| 44128 | /* 7128 */ "MOVSX32rr8\0" |
| 44129 | /* 7139 */ "MOVZX32rr8\0" |
| 44130 | /* 7150 */ "MOVSX64rr8\0" |
| 44131 | /* 7161 */ "MOVZX64rr8\0" |
| 44132 | /* 7172 */ "MOVSX16rr8\0" |
| 44133 | /* 7183 */ "MOVZX16rr8\0" |
| 44134 | /* 7194 */ "AAA\0" |
| 44135 | /* 7198 */ "DAA\0" |
| 44136 | /* 7202 */ "G_FMA\0" |
| 44137 | /* 7208 */ "G_STRICT_FMA\0" |
| 44138 | /* 7221 */ "PREFETCHNTA\0" |
| 44139 | /* 7233 */ "LCMPXCHG16B\0" |
| 44140 | /* 7245 */ "LCMPXCHG8B\0" |
| 44141 | /* 7256 */ "XCRYPTECB\0" |
| 44142 | /* 7266 */ "LLWPCB\0" |
| 44143 | /* 7273 */ "SLWPCB\0" |
| 44144 | /* 7280 */ "ADD64ri32_DB\0" |
| 44145 | /* 7293 */ "ADD32ri_DB\0" |
| 44146 | /* 7304 */ "ADD16ri_DB\0" |
| 44147 | /* 7315 */ "ADD8ri_DB\0" |
| 44148 | /* 7325 */ "ADD32rr_DB\0" |
| 44149 | /* 7336 */ "ADD64rr_DB\0" |
| 44150 | /* 7347 */ "ADD16rr_DB\0" |
| 44151 | /* 7358 */ "ADD8rr_DB\0" |
| 44152 | /* 7368 */ "XCRYPTCFB\0" |
| 44153 | /* 7378 */ "XCRYPTOFB\0" |
| 44154 | /* 7388 */ "PBNDKB\0" |
| 44155 | /* 7395 */ "SCASB\0" |
| 44156 | /* 7401 */ "LODSB\0" |
| 44157 | /* 7407 */ "INSB\0" |
| 44158 | /* 7412 */ "STOSB\0" |
| 44159 | /* 7418 */ "CMPSB\0" |
| 44160 | /* 7424 */ "OUTSB\0" |
| 44161 | /* 7430 */ "MOVSB\0" |
| 44162 | /* 7436 */ "G_FSUB\0" |
| 44163 | /* 7443 */ "G_STRICT_FSUB\0" |
| 44164 | /* 7457 */ "G_ATOMICRMW_FSUB\0" |
| 44165 | /* 7474 */ "G_SUB\0" |
| 44166 | /* 7480 */ "G_ATOMICRMW_SUB\0" |
| 44167 | /* 7496 */ "CLWB\0" |
| 44168 | /* 7501 */ "CLAC\0" |
| 44169 | /* 7506 */ "STAC\0" |
| 44170 | /* 7511 */ "XCRYPTCBC\0" |
| 44171 | /* 7521 */ "TAILJMPd64_CC\0" |
| 44172 | /* 7535 */ "TAILJMPd_CC\0" |
| 44173 | /* 7547 */ "GETSEC\0" |
| 44174 | /* 7554 */ "XSAVEC\0" |
| 44175 | /* 7561 */ "G_INTRINSIC\0" |
| 44176 | /* 7573 */ "SALC\0" |
| 44177 | /* 7578 */ "CLC\0" |
| 44178 | /* 7582 */ "CMC\0" |
| 44179 | /* 7586 */ "RDPMC\0" |
| 44180 | /* 7592 */ "VMFUNC\0" |
| 44181 | /* 7599 */ "G_FPTRUNC\0" |
| 44182 | /* 7609 */ "G_INTRINSIC_TRUNC\0" |
| 44183 | /* 7627 */ "G_TRUNC\0" |
| 44184 | /* 7635 */ "G_BUILD_VECTOR_TRUNC\0" |
| 44185 | /* 7656 */ "TLBSYNC\0" |
| 44186 | /* 7664 */ "G_DYN_STACKALLOC\0" |
| 44187 | /* 7681 */ "RDTSC\0" |
| 44188 | /* 7687 */ "STC\0" |
| 44189 | /* 7691 */ "KSET0D\0" |
| 44190 | /* 7698 */ "KSET1D\0" |
| 44191 | /* 7705 */ "BSWAP16r_BAD\0" |
| 44192 | /* 7718 */ "G_FMAD\0" |
| 44193 | /* 7725 */ "MASKPAIR16LOAD\0" |
| 44194 | /* 7740 */ "G_INDEXED_SEXTLOAD\0" |
| 44195 | /* 7759 */ "G_SEXTLOAD\0" |
| 44196 | /* 7770 */ "G_INDEXED_ZEXTLOAD\0" |
| 44197 | /* 7789 */ "G_ZEXTLOAD\0" |
| 44198 | /* 7800 */ "G_INDEXED_LOAD\0" |
| 44199 | /* 7815 */ "G_LOAD\0" |
| 44200 | /* 7822 */ "G_VECREDUCE_FADD\0" |
| 44201 | /* 7839 */ "G_FADD\0" |
| 44202 | /* 7846 */ "G_VECREDUCE_SEQ_FADD\0" |
| 44203 | /* 7867 */ "G_STRICT_FADD\0" |
| 44204 | /* 7881 */ "G_ATOMICRMW_FADD\0" |
| 44205 | /* 7898 */ "PTILELOADD\0" |
| 44206 | /* 7909 */ "G_VECREDUCE_ADD\0" |
| 44207 | /* 7925 */ "G_ADD\0" |
| 44208 | /* 7931 */ "G_PTR_ADD\0" |
| 44209 | /* 7941 */ "G_ATOMICRMW_ADD\0" |
| 44210 | /* 7957 */ "PTILESTORED\0" |
| 44211 | /* 7969 */ "CPUID\0" |
| 44212 | /* 7975 */ "CLD\0" |
| 44213 | /* 7979 */ "G_ATOMICRMW_NAND\0" |
| 44214 | /* 7996 */ "G_VECREDUCE_AND\0" |
| 44215 | /* 8012 */ "G_AND\0" |
| 44216 | /* 8018 */ "G_ATOMICRMW_AND\0" |
| 44217 | /* 8034 */ "XEND\0" |
| 44218 | /* 8039 */ "LIFETIME_END\0" |
| 44219 | /* 8052 */ "G_BRCOND\0" |
| 44220 | /* 8061 */ "G_LLROUND\0" |
| 44221 | /* 8071 */ "G_LROUND\0" |
| 44222 | /* 8080 */ "G_INTRINSIC_ROUND\0" |
| 44223 | /* 8098 */ "G_INTRINSIC_FPTRUNC_ROUND\0" |
| 44224 | /* 8124 */ "RCL32m1_ND\0" |
| 44225 | /* 8135 */ "SHL32m1_ND\0" |
| 44226 | /* 8146 */ "ROL32m1_ND\0" |
| 44227 | /* 8157 */ "SAR32m1_ND\0" |
| 44228 | /* 8168 */ "RCR32m1_ND\0" |
| 44229 | /* 8179 */ "SHR32m1_ND\0" |
| 44230 | /* 8190 */ "ROR32m1_ND\0" |
| 44231 | /* 8201 */ "RCL64m1_ND\0" |
| 44232 | /* 8212 */ "SHL64m1_ND\0" |
| 44233 | /* 8223 */ "ROL64m1_ND\0" |
| 44234 | /* 8234 */ "SAR64m1_ND\0" |
| 44235 | /* 8245 */ "RCR64m1_ND\0" |
| 44236 | /* 8256 */ "SHR64m1_ND\0" |
| 44237 | /* 8267 */ "ROR64m1_ND\0" |
| 44238 | /* 8278 */ "RCL16m1_ND\0" |
| 44239 | /* 8289 */ "SHL16m1_ND\0" |
| 44240 | /* 8300 */ "ROL16m1_ND\0" |
| 44241 | /* 8311 */ "SAR16m1_ND\0" |
| 44242 | /* 8322 */ "RCR16m1_ND\0" |
| 44243 | /* 8333 */ "SHR16m1_ND\0" |
| 44244 | /* 8344 */ "ROR16m1_ND\0" |
| 44245 | /* 8355 */ "RCL8m1_ND\0" |
| 44246 | /* 8365 */ "SHL8m1_ND\0" |
| 44247 | /* 8375 */ "ROL8m1_ND\0" |
| 44248 | /* 8385 */ "SAR8m1_ND\0" |
| 44249 | /* 8395 */ "RCR8m1_ND\0" |
| 44250 | /* 8405 */ "SHR8m1_ND\0" |
| 44251 | /* 8415 */ "ROR8m1_ND\0" |
| 44252 | /* 8425 */ "RCL32r1_ND\0" |
| 44253 | /* 8436 */ "SHL32r1_ND\0" |
| 44254 | /* 8447 */ "ROL32r1_ND\0" |
| 44255 | /* 8458 */ "SAR32r1_ND\0" |
| 44256 | /* 8469 */ "RCR32r1_ND\0" |
| 44257 | /* 8480 */ "SHR32r1_ND\0" |
| 44258 | /* 8491 */ "ROR32r1_ND\0" |
| 44259 | /* 8502 */ "RCL64r1_ND\0" |
| 44260 | /* 8513 */ "SHL64r1_ND\0" |
| 44261 | /* 8524 */ "ROL64r1_ND\0" |
| 44262 | /* 8535 */ "SAR64r1_ND\0" |
| 44263 | /* 8546 */ "RCR64r1_ND\0" |
| 44264 | /* 8557 */ "SHR64r1_ND\0" |
| 44265 | /* 8568 */ "ROR64r1_ND\0" |
| 44266 | /* 8579 */ "RCL16r1_ND\0" |
| 44267 | /* 8590 */ "SHL16r1_ND\0" |
| 44268 | /* 8601 */ "ROL16r1_ND\0" |
| 44269 | /* 8612 */ "SAR16r1_ND\0" |
| 44270 | /* 8623 */ "RCR16r1_ND\0" |
| 44271 | /* 8634 */ "SHR16r1_ND\0" |
| 44272 | /* 8645 */ "ROR16r1_ND\0" |
| 44273 | /* 8656 */ "RCL8r1_ND\0" |
| 44274 | /* 8666 */ "SHL8r1_ND\0" |
| 44275 | /* 8676 */ "ROL8r1_ND\0" |
| 44276 | /* 8686 */ "SAR8r1_ND\0" |
| 44277 | /* 8696 */ "RCR8r1_ND\0" |
| 44278 | /* 8706 */ "SHR8r1_ND\0" |
| 44279 | /* 8716 */ "ROR8r1_ND\0" |
| 44280 | /* 8726 */ "SBB64mi32_ND\0" |
| 44281 | /* 8739 */ "SUB64mi32_ND\0" |
| 44282 | /* 8752 */ "ADC64mi32_ND\0" |
| 44283 | /* 8765 */ "ADD64mi32_ND\0" |
| 44284 | /* 8778 */ "AND64mi32_ND\0" |
| 44285 | /* 8791 */ "XOR64mi32_ND\0" |
| 44286 | /* 8804 */ "SBB64ri32_ND\0" |
| 44287 | /* 8817 */ "SUB64ri32_ND\0" |
| 44288 | /* 8830 */ "ADC64ri32_ND\0" |
| 44289 | /* 8843 */ "ADD64ri32_ND\0" |
| 44290 | /* 8856 */ "AND64ri32_ND\0" |
| 44291 | /* 8869 */ "XOR64ri32_ND\0" |
| 44292 | /* 8882 */ "SBB32mi8_ND\0" |
| 44293 | /* 8894 */ "SUB32mi8_ND\0" |
| 44294 | /* 8906 */ "ADC32mi8_ND\0" |
| 44295 | /* 8918 */ "ADD32mi8_ND\0" |
| 44296 | /* 8930 */ "AND32mi8_ND\0" |
| 44297 | /* 8942 */ "XOR32mi8_ND\0" |
| 44298 | /* 8954 */ "SBB64mi8_ND\0" |
| 44299 | /* 8966 */ "SUB64mi8_ND\0" |
| 44300 | /* 8978 */ "ADC64mi8_ND\0" |
| 44301 | /* 8990 */ "ADD64mi8_ND\0" |
| 44302 | /* 9002 */ "AND64mi8_ND\0" |
| 44303 | /* 9014 */ "XOR64mi8_ND\0" |
| 44304 | /* 9026 */ "SBB16mi8_ND\0" |
| 44305 | /* 9038 */ "SUB16mi8_ND\0" |
| 44306 | /* 9050 */ "ADC16mi8_ND\0" |
| 44307 | /* 9062 */ "ADD16mi8_ND\0" |
| 44308 | /* 9074 */ "AND16mi8_ND\0" |
| 44309 | /* 9086 */ "XOR16mi8_ND\0" |
| 44310 | /* 9098 */ "SBB32ri8_ND\0" |
| 44311 | /* 9110 */ "SUB32ri8_ND\0" |
| 44312 | /* 9122 */ "ADC32ri8_ND\0" |
| 44313 | /* 9134 */ "ADD32ri8_ND\0" |
| 44314 | /* 9146 */ "AND32ri8_ND\0" |
| 44315 | /* 9158 */ "XOR32ri8_ND\0" |
| 44316 | /* 9170 */ "SBB64ri8_ND\0" |
| 44317 | /* 9182 */ "SUB64ri8_ND\0" |
| 44318 | /* 9194 */ "ADC64ri8_ND\0" |
| 44319 | /* 9206 */ "ADD64ri8_ND\0" |
| 44320 | /* 9218 */ "AND64ri8_ND\0" |
| 44321 | /* 9230 */ "XOR64ri8_ND\0" |
| 44322 | /* 9242 */ "SBB16ri8_ND\0" |
| 44323 | /* 9254 */ "SUB16ri8_ND\0" |
| 44324 | /* 9266 */ "ADC16ri8_ND\0" |
| 44325 | /* 9278 */ "ADD16ri8_ND\0" |
| 44326 | /* 9290 */ "AND16ri8_ND\0" |
| 44327 | /* 9302 */ "XOR16ri8_ND\0" |
| 44328 | /* 9314 */ "SHLD32mri8_ND\0" |
| 44329 | /* 9328 */ "SHRD32mri8_ND\0" |
| 44330 | /* 9342 */ "SHLD64mri8_ND\0" |
| 44331 | /* 9356 */ "SHRD64mri8_ND\0" |
| 44332 | /* 9370 */ "SHLD16mri8_ND\0" |
| 44333 | /* 9384 */ "SHRD16mri8_ND\0" |
| 44334 | /* 9398 */ "SHLD32rri8_ND\0" |
| 44335 | /* 9412 */ "SHRD32rri8_ND\0" |
| 44336 | /* 9426 */ "SHLD64rri8_ND\0" |
| 44337 | /* 9440 */ "SHRD64rri8_ND\0" |
| 44338 | /* 9454 */ "SHLD16rri8_ND\0" |
| 44339 | /* 9468 */ "SHRD16rri8_ND\0" |
| 44340 | /* 9482 */ "SHL32m1_NF_ND\0" |
| 44341 | /* 9496 */ "ROL32m1_NF_ND\0" |
| 44342 | /* 9510 */ "SAR32m1_NF_ND\0" |
| 44343 | /* 9524 */ "SHR32m1_NF_ND\0" |
| 44344 | /* 9538 */ "ROR32m1_NF_ND\0" |
| 44345 | /* 9552 */ "SHL64m1_NF_ND\0" |
| 44346 | /* 9566 */ "ROL64m1_NF_ND\0" |
| 44347 | /* 9580 */ "SAR64m1_NF_ND\0" |
| 44348 | /* 9594 */ "SHR64m1_NF_ND\0" |
| 44349 | /* 9608 */ "ROR64m1_NF_ND\0" |
| 44350 | /* 9622 */ "SHL16m1_NF_ND\0" |
| 44351 | /* 9636 */ "ROL16m1_NF_ND\0" |
| 44352 | /* 9650 */ "SAR16m1_NF_ND\0" |
| 44353 | /* 9664 */ "SHR16m1_NF_ND\0" |
| 44354 | /* 9678 */ "ROR16m1_NF_ND\0" |
| 44355 | /* 9692 */ "SHL8m1_NF_ND\0" |
| 44356 | /* 9705 */ "ROL8m1_NF_ND\0" |
| 44357 | /* 9718 */ "SAR8m1_NF_ND\0" |
| 44358 | /* 9731 */ "SHR8m1_NF_ND\0" |
| 44359 | /* 9744 */ "ROR8m1_NF_ND\0" |
| 44360 | /* 9757 */ "SHL32r1_NF_ND\0" |
| 44361 | /* 9771 */ "ROL32r1_NF_ND\0" |
| 44362 | /* 9785 */ "SAR32r1_NF_ND\0" |
| 44363 | /* 9799 */ "SHR32r1_NF_ND\0" |
| 44364 | /* 9813 */ "ROR32r1_NF_ND\0" |
| 44365 | /* 9827 */ "SHL64r1_NF_ND\0" |
| 44366 | /* 9841 */ "ROL64r1_NF_ND\0" |
| 44367 | /* 9855 */ "SAR64r1_NF_ND\0" |
| 44368 | /* 9869 */ "SHR64r1_NF_ND\0" |
| 44369 | /* 9883 */ "ROR64r1_NF_ND\0" |
| 44370 | /* 9897 */ "SHL16r1_NF_ND\0" |
| 44371 | /* 9911 */ "ROL16r1_NF_ND\0" |
| 44372 | /* 9925 */ "SAR16r1_NF_ND\0" |
| 44373 | /* 9939 */ "SHR16r1_NF_ND\0" |
| 44374 | /* 9953 */ "ROR16r1_NF_ND\0" |
| 44375 | /* 9967 */ "SHL8r1_NF_ND\0" |
| 44376 | /* 9980 */ "ROL8r1_NF_ND\0" |
| 44377 | /* 9993 */ "SAR8r1_NF_ND\0" |
| 44378 | /* 10006 */ "SHR8r1_NF_ND\0" |
| 44379 | /* 10019 */ "ROR8r1_NF_ND\0" |
| 44380 | /* 10032 */ "SUB64mi32_NF_ND\0" |
| 44381 | /* 10048 */ "ADD64mi32_NF_ND\0" |
| 44382 | /* 10064 */ "AND64mi32_NF_ND\0" |
| 44383 | /* 10080 */ "XOR64mi32_NF_ND\0" |
| 44384 | /* 10096 */ "SUB64ri32_NF_ND\0" |
| 44385 | /* 10112 */ "ADD64ri32_NF_ND\0" |
| 44386 | /* 10128 */ "AND64ri32_NF_ND\0" |
| 44387 | /* 10144 */ "XOR64ri32_NF_ND\0" |
| 44388 | /* 10160 */ "SUB32mi8_NF_ND\0" |
| 44389 | /* 10175 */ "ADD32mi8_NF_ND\0" |
| 44390 | /* 10190 */ "AND32mi8_NF_ND\0" |
| 44391 | /* 10205 */ "XOR32mi8_NF_ND\0" |
| 44392 | /* 10220 */ "SUB64mi8_NF_ND\0" |
| 44393 | /* 10235 */ "ADD64mi8_NF_ND\0" |
| 44394 | /* 10250 */ "AND64mi8_NF_ND\0" |
| 44395 | /* 10265 */ "XOR64mi8_NF_ND\0" |
| 44396 | /* 10280 */ "SUB16mi8_NF_ND\0" |
| 44397 | /* 10295 */ "ADD16mi8_NF_ND\0" |
| 44398 | /* 10310 */ "AND16mi8_NF_ND\0" |
| 44399 | /* 10325 */ "XOR16mi8_NF_ND\0" |
| 44400 | /* 10340 */ "SUB32ri8_NF_ND\0" |
| 44401 | /* 10355 */ "ADD32ri8_NF_ND\0" |
| 44402 | /* 10370 */ "AND32ri8_NF_ND\0" |
| 44403 | /* 10385 */ "XOR32ri8_NF_ND\0" |
| 44404 | /* 10400 */ "SUB64ri8_NF_ND\0" |
| 44405 | /* 10415 */ "ADD64ri8_NF_ND\0" |
| 44406 | /* 10430 */ "AND64ri8_NF_ND\0" |
| 44407 | /* 10445 */ "XOR64ri8_NF_ND\0" |
| 44408 | /* 10460 */ "SUB16ri8_NF_ND\0" |
| 44409 | /* 10475 */ "ADD16ri8_NF_ND\0" |
| 44410 | /* 10490 */ "AND16ri8_NF_ND\0" |
| 44411 | /* 10505 */ "XOR16ri8_NF_ND\0" |
| 44412 | /* 10520 */ "SHLD32mri8_NF_ND\0" |
| 44413 | /* 10537 */ "SHRD32mri8_NF_ND\0" |
| 44414 | /* 10554 */ "SHLD64mri8_NF_ND\0" |
| 44415 | /* 10571 */ "SHRD64mri8_NF_ND\0" |
| 44416 | /* 10588 */ "SHLD16mri8_NF_ND\0" |
| 44417 | /* 10605 */ "SHRD16mri8_NF_ND\0" |
| 44418 | /* 10622 */ "SHLD32rri8_NF_ND\0" |
| 44419 | /* 10639 */ "SHRD32rri8_NF_ND\0" |
| 44420 | /* 10656 */ "SHLD64rri8_NF_ND\0" |
| 44421 | /* 10673 */ "SHRD64rri8_NF_ND\0" |
| 44422 | /* 10690 */ "SHLD16rri8_NF_ND\0" |
| 44423 | /* 10707 */ "SHRD16rri8_NF_ND\0" |
| 44424 | /* 10724 */ "SHL32mCL_NF_ND\0" |
| 44425 | /* 10739 */ "ROL32mCL_NF_ND\0" |
| 44426 | /* 10754 */ "SAR32mCL_NF_ND\0" |
| 44427 | /* 10769 */ "SHR32mCL_NF_ND\0" |
| 44428 | /* 10784 */ "ROR32mCL_NF_ND\0" |
| 44429 | /* 10799 */ "SHL64mCL_NF_ND\0" |
| 44430 | /* 10814 */ "ROL64mCL_NF_ND\0" |
| 44431 | /* 10829 */ "SAR64mCL_NF_ND\0" |
| 44432 | /* 10844 */ "SHR64mCL_NF_ND\0" |
| 44433 | /* 10859 */ "ROR64mCL_NF_ND\0" |
| 44434 | /* 10874 */ "SHL16mCL_NF_ND\0" |
| 44435 | /* 10889 */ "ROL16mCL_NF_ND\0" |
| 44436 | /* 10904 */ "SAR16mCL_NF_ND\0" |
| 44437 | /* 10919 */ "SHR16mCL_NF_ND\0" |
| 44438 | /* 10934 */ "ROR16mCL_NF_ND\0" |
| 44439 | /* 10949 */ "SHL8mCL_NF_ND\0" |
| 44440 | /* 10963 */ "ROL8mCL_NF_ND\0" |
| 44441 | /* 10977 */ "SAR8mCL_NF_ND\0" |
| 44442 | /* 10991 */ "SHR8mCL_NF_ND\0" |
| 44443 | /* 11005 */ "ROR8mCL_NF_ND\0" |
| 44444 | /* 11019 */ "SHL32rCL_NF_ND\0" |
| 44445 | /* 11034 */ "ROL32rCL_NF_ND\0" |
| 44446 | /* 11049 */ "SAR32rCL_NF_ND\0" |
| 44447 | /* 11064 */ "SHR32rCL_NF_ND\0" |
| 44448 | /* 11079 */ "ROR32rCL_NF_ND\0" |
| 44449 | /* 11094 */ "SHL64rCL_NF_ND\0" |
| 44450 | /* 11109 */ "ROL64rCL_NF_ND\0" |
| 44451 | /* 11124 */ "SAR64rCL_NF_ND\0" |
| 44452 | /* 11139 */ "SHR64rCL_NF_ND\0" |
| 44453 | /* 11154 */ "ROR64rCL_NF_ND\0" |
| 44454 | /* 11169 */ "SHL16rCL_NF_ND\0" |
| 44455 | /* 11184 */ "ROL16rCL_NF_ND\0" |
| 44456 | /* 11199 */ "SAR16rCL_NF_ND\0" |
| 44457 | /* 11214 */ "SHR16rCL_NF_ND\0" |
| 44458 | /* 11229 */ "ROR16rCL_NF_ND\0" |
| 44459 | /* 11244 */ "SHL8rCL_NF_ND\0" |
| 44460 | /* 11258 */ "ROL8rCL_NF_ND\0" |
| 44461 | /* 11272 */ "SAR8rCL_NF_ND\0" |
| 44462 | /* 11286 */ "SHR8rCL_NF_ND\0" |
| 44463 | /* 11300 */ "ROR8rCL_NF_ND\0" |
| 44464 | /* 11314 */ "SHLD32mrCL_NF_ND\0" |
| 44465 | /* 11331 */ "SHRD32mrCL_NF_ND\0" |
| 44466 | /* 11348 */ "SHLD64mrCL_NF_ND\0" |
| 44467 | /* 11365 */ "SHRD64mrCL_NF_ND\0" |
| 44468 | /* 11382 */ "SHLD16mrCL_NF_ND\0" |
| 44469 | /* 11399 */ "SHRD16mrCL_NF_ND\0" |
| 44470 | /* 11416 */ "SHLD32rrCL_NF_ND\0" |
| 44471 | /* 11433 */ "SHRD32rrCL_NF_ND\0" |
| 44472 | /* 11450 */ "SHLD64rrCL_NF_ND\0" |
| 44473 | /* 11467 */ "SHRD64rrCL_NF_ND\0" |
| 44474 | /* 11484 */ "SHLD16rrCL_NF_ND\0" |
| 44475 | /* 11501 */ "SHRD16rrCL_NF_ND\0" |
| 44476 | /* 11518 */ "SUB32mi_NF_ND\0" |
| 44477 | /* 11532 */ "ADD32mi_NF_ND\0" |
| 44478 | /* 11546 */ "AND32mi_NF_ND\0" |
| 44479 | /* 11560 */ "SHL32mi_NF_ND\0" |
| 44480 | /* 11574 */ "ROL32mi_NF_ND\0" |
| 44481 | /* 11588 */ "SAR32mi_NF_ND\0" |
| 44482 | /* 11602 */ "SHR32mi_NF_ND\0" |
| 44483 | /* 11616 */ "ROR32mi_NF_ND\0" |
| 44484 | /* 11630 */ "XOR32mi_NF_ND\0" |
| 44485 | /* 11644 */ "SHL64mi_NF_ND\0" |
| 44486 | /* 11658 */ "ROL64mi_NF_ND\0" |
| 44487 | /* 11672 */ "SAR64mi_NF_ND\0" |
| 44488 | /* 11686 */ "SHR64mi_NF_ND\0" |
| 44489 | /* 11700 */ "ROR64mi_NF_ND\0" |
| 44490 | /* 11714 */ "SUB16mi_NF_ND\0" |
| 44491 | /* 11728 */ "ADD16mi_NF_ND\0" |
| 44492 | /* 11742 */ "AND16mi_NF_ND\0" |
| 44493 | /* 11756 */ "SHL16mi_NF_ND\0" |
| 44494 | /* 11770 */ "ROL16mi_NF_ND\0" |
| 44495 | /* 11784 */ "SAR16mi_NF_ND\0" |
| 44496 | /* 11798 */ "SHR16mi_NF_ND\0" |
| 44497 | /* 11812 */ "ROR16mi_NF_ND\0" |
| 44498 | /* 11826 */ "XOR16mi_NF_ND\0" |
| 44499 | /* 11840 */ "SUB8mi_NF_ND\0" |
| 44500 | /* 11853 */ "ADD8mi_NF_ND\0" |
| 44501 | /* 11866 */ "AND8mi_NF_ND\0" |
| 44502 | /* 11879 */ "SHL8mi_NF_ND\0" |
| 44503 | /* 11892 */ "ROL8mi_NF_ND\0" |
| 44504 | /* 11905 */ "SAR8mi_NF_ND\0" |
| 44505 | /* 11918 */ "SHR8mi_NF_ND\0" |
| 44506 | /* 11931 */ "ROR8mi_NF_ND\0" |
| 44507 | /* 11944 */ "XOR8mi_NF_ND\0" |
| 44508 | /* 11957 */ "SUB32ri_NF_ND\0" |
| 44509 | /* 11971 */ "ADD32ri_NF_ND\0" |
| 44510 | /* 11985 */ "AND32ri_NF_ND\0" |
| 44511 | /* 11999 */ "SHL32ri_NF_ND\0" |
| 44512 | /* 12013 */ "ROL32ri_NF_ND\0" |
| 44513 | /* 12027 */ "SAR32ri_NF_ND\0" |
| 44514 | /* 12041 */ "SHR32ri_NF_ND\0" |
| 44515 | /* 12055 */ "ROR32ri_NF_ND\0" |
| 44516 | /* 12069 */ "XOR32ri_NF_ND\0" |
| 44517 | /* 12083 */ "SHL64ri_NF_ND\0" |
| 44518 | /* 12097 */ "ROL64ri_NF_ND\0" |
| 44519 | /* 12111 */ "SAR64ri_NF_ND\0" |
| 44520 | /* 12125 */ "SHR64ri_NF_ND\0" |
| 44521 | /* 12139 */ "ROR64ri_NF_ND\0" |
| 44522 | /* 12153 */ "SUB16ri_NF_ND\0" |
| 44523 | /* 12167 */ "ADD16ri_NF_ND\0" |
| 44524 | /* 12181 */ "AND16ri_NF_ND\0" |
| 44525 | /* 12195 */ "SHL16ri_NF_ND\0" |
| 44526 | /* 12209 */ "ROL16ri_NF_ND\0" |
| 44527 | /* 12223 */ "SAR16ri_NF_ND\0" |
| 44528 | /* 12237 */ "SHR16ri_NF_ND\0" |
| 44529 | /* 12251 */ "ROR16ri_NF_ND\0" |
| 44530 | /* 12265 */ "XOR16ri_NF_ND\0" |
| 44531 | /* 12279 */ "SUB8ri_NF_ND\0" |
| 44532 | /* 12292 */ "ADD8ri_NF_ND\0" |
| 44533 | /* 12305 */ "AND8ri_NF_ND\0" |
| 44534 | /* 12318 */ "SHL8ri_NF_ND\0" |
| 44535 | /* 12331 */ "ROL8ri_NF_ND\0" |
| 44536 | /* 12344 */ "SAR8ri_NF_ND\0" |
| 44537 | /* 12357 */ "SHR8ri_NF_ND\0" |
| 44538 | /* 12370 */ "ROR8ri_NF_ND\0" |
| 44539 | /* 12383 */ "XOR8ri_NF_ND\0" |
| 44540 | /* 12396 */ "DEC32m_NF_ND\0" |
| 44541 | /* 12409 */ "INC32m_NF_ND\0" |
| 44542 | /* 12422 */ "NEG32m_NF_ND\0" |
| 44543 | /* 12435 */ "DEC64m_NF_ND\0" |
| 44544 | /* 12448 */ "INC64m_NF_ND\0" |
| 44545 | /* 12461 */ "NEG64m_NF_ND\0" |
| 44546 | /* 12474 */ "DEC16m_NF_ND\0" |
| 44547 | /* 12487 */ "INC16m_NF_ND\0" |
| 44548 | /* 12500 */ "NEG16m_NF_ND\0" |
| 44549 | /* 12513 */ "DEC8m_NF_ND\0" |
| 44550 | /* 12525 */ "INC8m_NF_ND\0" |
| 44551 | /* 12537 */ "NEG8m_NF_ND\0" |
| 44552 | /* 12549 */ "SUB32rm_NF_ND\0" |
| 44553 | /* 12563 */ "ADD32rm_NF_ND\0" |
| 44554 | /* 12577 */ "AND32rm_NF_ND\0" |
| 44555 | /* 12591 */ "IMUL32rm_NF_ND\0" |
| 44556 | /* 12606 */ "XOR32rm_NF_ND\0" |
| 44557 | /* 12620 */ "SUB64rm_NF_ND\0" |
| 44558 | /* 12634 */ "ADD64rm_NF_ND\0" |
| 44559 | /* 12648 */ "AND64rm_NF_ND\0" |
| 44560 | /* 12662 */ "IMUL64rm_NF_ND\0" |
| 44561 | /* 12677 */ "XOR64rm_NF_ND\0" |
| 44562 | /* 12691 */ "SUB16rm_NF_ND\0" |
| 44563 | /* 12705 */ "ADD16rm_NF_ND\0" |
| 44564 | /* 12719 */ "AND16rm_NF_ND\0" |
| 44565 | /* 12733 */ "IMUL16rm_NF_ND\0" |
| 44566 | /* 12748 */ "XOR16rm_NF_ND\0" |
| 44567 | /* 12762 */ "SUB8rm_NF_ND\0" |
| 44568 | /* 12775 */ "ADD8rm_NF_ND\0" |
| 44569 | /* 12788 */ "AND8rm_NF_ND\0" |
| 44570 | /* 12801 */ "XOR8rm_NF_ND\0" |
| 44571 | /* 12814 */ "DEC32r_NF_ND\0" |
| 44572 | /* 12827 */ "INC32r_NF_ND\0" |
| 44573 | /* 12840 */ "NEG32r_NF_ND\0" |
| 44574 | /* 12853 */ "DEC64r_NF_ND\0" |
| 44575 | /* 12866 */ "INC64r_NF_ND\0" |
| 44576 | /* 12879 */ "NEG64r_NF_ND\0" |
| 44577 | /* 12892 */ "DEC16r_NF_ND\0" |
| 44578 | /* 12905 */ "INC16r_NF_ND\0" |
| 44579 | /* 12918 */ "NEG16r_NF_ND\0" |
| 44580 | /* 12931 */ "DEC8r_NF_ND\0" |
| 44581 | /* 12943 */ "INC8r_NF_ND\0" |
| 44582 | /* 12955 */ "NEG8r_NF_ND\0" |
| 44583 | /* 12967 */ "SUB32mr_NF_ND\0" |
| 44584 | /* 12981 */ "ADD32mr_NF_ND\0" |
| 44585 | /* 12995 */ "AND32mr_NF_ND\0" |
| 44586 | /* 13009 */ "XOR32mr_NF_ND\0" |
| 44587 | /* 13023 */ "SUB64mr_NF_ND\0" |
| 44588 | /* 13037 */ "ADD64mr_NF_ND\0" |
| 44589 | /* 13051 */ "AND64mr_NF_ND\0" |
| 44590 | /* 13065 */ "XOR64mr_NF_ND\0" |
| 44591 | /* 13079 */ "SUB16mr_NF_ND\0" |
| 44592 | /* 13093 */ "ADD16mr_NF_ND\0" |
| 44593 | /* 13107 */ "AND16mr_NF_ND\0" |
| 44594 | /* 13121 */ "XOR16mr_NF_ND\0" |
| 44595 | /* 13135 */ "SUB8mr_NF_ND\0" |
| 44596 | /* 13148 */ "ADD8mr_NF_ND\0" |
| 44597 | /* 13161 */ "AND8mr_NF_ND\0" |
| 44598 | /* 13174 */ "XOR8mr_NF_ND\0" |
| 44599 | /* 13187 */ "SUB32rr_NF_ND\0" |
| 44600 | /* 13201 */ "ADD32rr_NF_ND\0" |
| 44601 | /* 13215 */ "AND32rr_NF_ND\0" |
| 44602 | /* 13229 */ "IMUL32rr_NF_ND\0" |
| 44603 | /* 13244 */ "XOR32rr_NF_ND\0" |
| 44604 | /* 13258 */ "SUB64rr_NF_ND\0" |
| 44605 | /* 13272 */ "ADD64rr_NF_ND\0" |
| 44606 | /* 13286 */ "AND64rr_NF_ND\0" |
| 44607 | /* 13300 */ "IMUL64rr_NF_ND\0" |
| 44608 | /* 13315 */ "XOR64rr_NF_ND\0" |
| 44609 | /* 13329 */ "SUB16rr_NF_ND\0" |
| 44610 | /* 13343 */ "ADD16rr_NF_ND\0" |
| 44611 | /* 13357 */ "AND16rr_NF_ND\0" |
| 44612 | /* 13371 */ "IMUL16rr_NF_ND\0" |
| 44613 | /* 13386 */ "XOR16rr_NF_ND\0" |
| 44614 | /* 13400 */ "SUB8rr_NF_ND\0" |
| 44615 | /* 13413 */ "ADD8rr_NF_ND\0" |
| 44616 | /* 13426 */ "AND8rr_NF_ND\0" |
| 44617 | /* 13439 */ "XOR8rr_NF_ND\0" |
| 44618 | /* 13452 */ "RCL32mCL_ND\0" |
| 44619 | /* 13464 */ "SHL32mCL_ND\0" |
| 44620 | /* 13476 */ "ROL32mCL_ND\0" |
| 44621 | /* 13488 */ "SAR32mCL_ND\0" |
| 44622 | /* 13500 */ "RCR32mCL_ND\0" |
| 44623 | /* 13512 */ "SHR32mCL_ND\0" |
| 44624 | /* 13524 */ "ROR32mCL_ND\0" |
| 44625 | /* 13536 */ "RCL64mCL_ND\0" |
| 44626 | /* 13548 */ "SHL64mCL_ND\0" |
| 44627 | /* 13560 */ "ROL64mCL_ND\0" |
| 44628 | /* 13572 */ "SAR64mCL_ND\0" |
| 44629 | /* 13584 */ "RCR64mCL_ND\0" |
| 44630 | /* 13596 */ "SHR64mCL_ND\0" |
| 44631 | /* 13608 */ "ROR64mCL_ND\0" |
| 44632 | /* 13620 */ "RCL16mCL_ND\0" |
| 44633 | /* 13632 */ "SHL16mCL_ND\0" |
| 44634 | /* 13644 */ "ROL16mCL_ND\0" |
| 44635 | /* 13656 */ "SAR16mCL_ND\0" |
| 44636 | /* 13668 */ "RCR16mCL_ND\0" |
| 44637 | /* 13680 */ "SHR16mCL_ND\0" |
| 44638 | /* 13692 */ "ROR16mCL_ND\0" |
| 44639 | /* 13704 */ "RCL8mCL_ND\0" |
| 44640 | /* 13715 */ "SHL8mCL_ND\0" |
| 44641 | /* 13726 */ "ROL8mCL_ND\0" |
| 44642 | /* 13737 */ "SAR8mCL_ND\0" |
| 44643 | /* 13748 */ "RCR8mCL_ND\0" |
| 44644 | /* 13759 */ "SHR8mCL_ND\0" |
| 44645 | /* 13770 */ "ROR8mCL_ND\0" |
| 44646 | /* 13781 */ "RCL32rCL_ND\0" |
| 44647 | /* 13793 */ "SHL32rCL_ND\0" |
| 44648 | /* 13805 */ "ROL32rCL_ND\0" |
| 44649 | /* 13817 */ "SAR32rCL_ND\0" |
| 44650 | /* 13829 */ "RCR32rCL_ND\0" |
| 44651 | /* 13841 */ "SHR32rCL_ND\0" |
| 44652 | /* 13853 */ "ROR32rCL_ND\0" |
| 44653 | /* 13865 */ "RCL64rCL_ND\0" |
| 44654 | /* 13877 */ "SHL64rCL_ND\0" |
| 44655 | /* 13889 */ "ROL64rCL_ND\0" |
| 44656 | /* 13901 */ "SAR64rCL_ND\0" |
| 44657 | /* 13913 */ "RCR64rCL_ND\0" |
| 44658 | /* 13925 */ "SHR64rCL_ND\0" |
| 44659 | /* 13937 */ "ROR64rCL_ND\0" |
| 44660 | /* 13949 */ "RCL16rCL_ND\0" |
| 44661 | /* 13961 */ "SHL16rCL_ND\0" |
| 44662 | /* 13973 */ "ROL16rCL_ND\0" |
| 44663 | /* 13985 */ "SAR16rCL_ND\0" |
| 44664 | /* 13997 */ "RCR16rCL_ND\0" |
| 44665 | /* 14009 */ "SHR16rCL_ND\0" |
| 44666 | /* 14021 */ "ROR16rCL_ND\0" |
| 44667 | /* 14033 */ "RCL8rCL_ND\0" |
| 44668 | /* 14044 */ "SHL8rCL_ND\0" |
| 44669 | /* 14055 */ "ROL8rCL_ND\0" |
| 44670 | /* 14066 */ "SAR8rCL_ND\0" |
| 44671 | /* 14077 */ "RCR8rCL_ND\0" |
| 44672 | /* 14088 */ "SHR8rCL_ND\0" |
| 44673 | /* 14099 */ "ROR8rCL_ND\0" |
| 44674 | /* 14110 */ "SHLD32mrCL_ND\0" |
| 44675 | /* 14124 */ "SHRD32mrCL_ND\0" |
| 44676 | /* 14138 */ "SHLD64mrCL_ND\0" |
| 44677 | /* 14152 */ "SHRD64mrCL_ND\0" |
| 44678 | /* 14166 */ "SHLD16mrCL_ND\0" |
| 44679 | /* 14180 */ "SHRD16mrCL_ND\0" |
| 44680 | /* 14194 */ "SHLD32rrCL_ND\0" |
| 44681 | /* 14208 */ "SHRD32rrCL_ND\0" |
| 44682 | /* 14222 */ "SHLD64rrCL_ND\0" |
| 44683 | /* 14236 */ "SHRD64rrCL_ND\0" |
| 44684 | /* 14250 */ "SHLD16rrCL_ND\0" |
| 44685 | /* 14264 */ "SHRD16rrCL_ND\0" |
| 44686 | /* 14278 */ "SBB32mi_ND\0" |
| 44687 | /* 14289 */ "SUB32mi_ND\0" |
| 44688 | /* 14300 */ "ADC32mi_ND\0" |
| 44689 | /* 14311 */ "ADD32mi_ND\0" |
| 44690 | /* 14322 */ "AND32mi_ND\0" |
| 44691 | /* 14333 */ "RCL32mi_ND\0" |
| 44692 | /* 14344 */ "SHL32mi_ND\0" |
| 44693 | /* 14355 */ "ROL32mi_ND\0" |
| 44694 | /* 14366 */ "SAR32mi_ND\0" |
| 44695 | /* 14377 */ "RCR32mi_ND\0" |
| 44696 | /* 14388 */ "SHR32mi_ND\0" |
| 44697 | /* 14399 */ "ROR32mi_ND\0" |
| 44698 | /* 14410 */ "XOR32mi_ND\0" |
| 44699 | /* 14421 */ "RCL64mi_ND\0" |
| 44700 | /* 14432 */ "SHL64mi_ND\0" |
| 44701 | /* 14443 */ "ROL64mi_ND\0" |
| 44702 | /* 14454 */ "SAR64mi_ND\0" |
| 44703 | /* 14465 */ "RCR64mi_ND\0" |
| 44704 | /* 14476 */ "SHR64mi_ND\0" |
| 44705 | /* 14487 */ "ROR64mi_ND\0" |
| 44706 | /* 14498 */ "SBB16mi_ND\0" |
| 44707 | /* 14509 */ "SUB16mi_ND\0" |
| 44708 | /* 14520 */ "ADC16mi_ND\0" |
| 44709 | /* 14531 */ "ADD16mi_ND\0" |
| 44710 | /* 14542 */ "AND16mi_ND\0" |
| 44711 | /* 14553 */ "RCL16mi_ND\0" |
| 44712 | /* 14564 */ "SHL16mi_ND\0" |
| 44713 | /* 14575 */ "ROL16mi_ND\0" |
| 44714 | /* 14586 */ "SAR16mi_ND\0" |
| 44715 | /* 14597 */ "RCR16mi_ND\0" |
| 44716 | /* 14608 */ "SHR16mi_ND\0" |
| 44717 | /* 14619 */ "ROR16mi_ND\0" |
| 44718 | /* 14630 */ "XOR16mi_ND\0" |
| 44719 | /* 14641 */ "SBB8mi_ND\0" |
| 44720 | /* 14651 */ "SUB8mi_ND\0" |
| 44721 | /* 14661 */ "ADC8mi_ND\0" |
| 44722 | /* 14671 */ "ADD8mi_ND\0" |
| 44723 | /* 14681 */ "AND8mi_ND\0" |
| 44724 | /* 14691 */ "RCL8mi_ND\0" |
| 44725 | /* 14701 */ "SHL8mi_ND\0" |
| 44726 | /* 14711 */ "ROL8mi_ND\0" |
| 44727 | /* 14721 */ "SAR8mi_ND\0" |
| 44728 | /* 14731 */ "RCR8mi_ND\0" |
| 44729 | /* 14741 */ "SHR8mi_ND\0" |
| 44730 | /* 14751 */ "ROR8mi_ND\0" |
| 44731 | /* 14761 */ "XOR8mi_ND\0" |
| 44732 | /* 14771 */ "SBB32ri_ND\0" |
| 44733 | /* 14782 */ "SUB32ri_ND\0" |
| 44734 | /* 14793 */ "ADC32ri_ND\0" |
| 44735 | /* 14804 */ "ADD32ri_ND\0" |
| 44736 | /* 14815 */ "AND32ri_ND\0" |
| 44737 | /* 14826 */ "RCL32ri_ND\0" |
| 44738 | /* 14837 */ "SHL32ri_ND\0" |
| 44739 | /* 14848 */ "ROL32ri_ND\0" |
| 44740 | /* 14859 */ "SAR32ri_ND\0" |
| 44741 | /* 14870 */ "RCR32ri_ND\0" |
| 44742 | /* 14881 */ "SHR32ri_ND\0" |
| 44743 | /* 14892 */ "ROR32ri_ND\0" |
| 44744 | /* 14903 */ "XOR32ri_ND\0" |
| 44745 | /* 14914 */ "RCL64ri_ND\0" |
| 44746 | /* 14925 */ "SHL64ri_ND\0" |
| 44747 | /* 14936 */ "ROL64ri_ND\0" |
| 44748 | /* 14947 */ "SAR64ri_ND\0" |
| 44749 | /* 14958 */ "RCR64ri_ND\0" |
| 44750 | /* 14969 */ "SHR64ri_ND\0" |
| 44751 | /* 14980 */ "ROR64ri_ND\0" |
| 44752 | /* 14991 */ "SBB16ri_ND\0" |
| 44753 | /* 15002 */ "SUB16ri_ND\0" |
| 44754 | /* 15013 */ "ADC16ri_ND\0" |
| 44755 | /* 15024 */ "ADD16ri_ND\0" |
| 44756 | /* 15035 */ "AND16ri_ND\0" |
| 44757 | /* 15046 */ "RCL16ri_ND\0" |
| 44758 | /* 15057 */ "SHL16ri_ND\0" |
| 44759 | /* 15068 */ "ROL16ri_ND\0" |
| 44760 | /* 15079 */ "SAR16ri_ND\0" |
| 44761 | /* 15090 */ "RCR16ri_ND\0" |
| 44762 | /* 15101 */ "SHR16ri_ND\0" |
| 44763 | /* 15112 */ "ROR16ri_ND\0" |
| 44764 | /* 15123 */ "XOR16ri_ND\0" |
| 44765 | /* 15134 */ "SBB8ri_ND\0" |
| 44766 | /* 15144 */ "SUB8ri_ND\0" |
| 44767 | /* 15154 */ "ADC8ri_ND\0" |
| 44768 | /* 15164 */ "ADD8ri_ND\0" |
| 44769 | /* 15174 */ "AND8ri_ND\0" |
| 44770 | /* 15184 */ "RCL8ri_ND\0" |
| 44771 | /* 15194 */ "SHL8ri_ND\0" |
| 44772 | /* 15204 */ "ROL8ri_ND\0" |
| 44773 | /* 15214 */ "SAR8ri_ND\0" |
| 44774 | /* 15224 */ "RCR8ri_ND\0" |
| 44775 | /* 15234 */ "SHR8ri_ND\0" |
| 44776 | /* 15244 */ "ROR8ri_ND\0" |
| 44777 | /* 15254 */ "XOR8ri_ND\0" |
| 44778 | /* 15264 */ "DEC32m_ND\0" |
| 44779 | /* 15274 */ "INC32m_ND\0" |
| 44780 | /* 15284 */ "NEG32m_ND\0" |
| 44781 | /* 15294 */ "NOT32m_ND\0" |
| 44782 | /* 15304 */ "DEC64m_ND\0" |
| 44783 | /* 15314 */ "INC64m_ND\0" |
| 44784 | /* 15324 */ "NEG64m_ND\0" |
| 44785 | /* 15334 */ "NOT64m_ND\0" |
| 44786 | /* 15344 */ "DEC16m_ND\0" |
| 44787 | /* 15354 */ "INC16m_ND\0" |
| 44788 | /* 15364 */ "NEG16m_ND\0" |
| 44789 | /* 15374 */ "NOT16m_ND\0" |
| 44790 | /* 15384 */ "DEC8m_ND\0" |
| 44791 | /* 15393 */ "INC8m_ND\0" |
| 44792 | /* 15402 */ "NEG8m_ND\0" |
| 44793 | /* 15411 */ "NOT8m_ND\0" |
| 44794 | /* 15420 */ "SBB32rm_ND\0" |
| 44795 | /* 15431 */ "SUB32rm_ND\0" |
| 44796 | /* 15442 */ "ADC32rm_ND\0" |
| 44797 | /* 15453 */ "ADD32rm_ND\0" |
| 44798 | /* 15464 */ "AND32rm_ND\0" |
| 44799 | /* 15475 */ "IMUL32rm_ND\0" |
| 44800 | /* 15487 */ "XOR32rm_ND\0" |
| 44801 | /* 15498 */ "CFCMOV32rm_ND\0" |
| 44802 | /* 15512 */ "ADCX32rm_ND\0" |
| 44803 | /* 15524 */ "ADOX32rm_ND\0" |
| 44804 | /* 15536 */ "SBB64rm_ND\0" |
| 44805 | /* 15547 */ "SUB64rm_ND\0" |
| 44806 | /* 15558 */ "ADC64rm_ND\0" |
| 44807 | /* 15569 */ "ADD64rm_ND\0" |
| 44808 | /* 15580 */ "AND64rm_ND\0" |
| 44809 | /* 15591 */ "IMUL64rm_ND\0" |
| 44810 | /* 15603 */ "XOR64rm_ND\0" |
| 44811 | /* 15614 */ "CFCMOV64rm_ND\0" |
| 44812 | /* 15628 */ "ADCX64rm_ND\0" |
| 44813 | /* 15640 */ "ADOX64rm_ND\0" |
| 44814 | /* 15652 */ "SBB16rm_ND\0" |
| 44815 | /* 15663 */ "SUB16rm_ND\0" |
| 44816 | /* 15674 */ "ADC16rm_ND\0" |
| 44817 | /* 15685 */ "ADD16rm_ND\0" |
| 44818 | /* 15696 */ "AND16rm_ND\0" |
| 44819 | /* 15707 */ "IMUL16rm_ND\0" |
| 44820 | /* 15719 */ "XOR16rm_ND\0" |
| 44821 | /* 15730 */ "CFCMOV16rm_ND\0" |
| 44822 | /* 15744 */ "SBB8rm_ND\0" |
| 44823 | /* 15754 */ "SUB8rm_ND\0" |
| 44824 | /* 15764 */ "ADC8rm_ND\0" |
| 44825 | /* 15774 */ "ADD8rm_ND\0" |
| 44826 | /* 15784 */ "AND8rm_ND\0" |
| 44827 | /* 15794 */ "XOR8rm_ND\0" |
| 44828 | /* 15804 */ "DEC32r_ND\0" |
| 44829 | /* 15814 */ "INC32r_ND\0" |
| 44830 | /* 15824 */ "NEG32r_ND\0" |
| 44831 | /* 15834 */ "NOT32r_ND\0" |
| 44832 | /* 15844 */ "DEC64r_ND\0" |
| 44833 | /* 15854 */ "INC64r_ND\0" |
| 44834 | /* 15864 */ "NEG64r_ND\0" |
| 44835 | /* 15874 */ "NOT64r_ND\0" |
| 44836 | /* 15884 */ "DEC16r_ND\0" |
| 44837 | /* 15894 */ "INC16r_ND\0" |
| 44838 | /* 15904 */ "NEG16r_ND\0" |
| 44839 | /* 15914 */ "NOT16r_ND\0" |
| 44840 | /* 15924 */ "DEC8r_ND\0" |
| 44841 | /* 15933 */ "INC8r_ND\0" |
| 44842 | /* 15942 */ "NEG8r_ND\0" |
| 44843 | /* 15951 */ "NOT8r_ND\0" |
| 44844 | /* 15960 */ "SBB32mr_ND\0" |
| 44845 | /* 15971 */ "SUB32mr_ND\0" |
| 44846 | /* 15982 */ "ADC32mr_ND\0" |
| 44847 | /* 15993 */ "ADD32mr_ND\0" |
| 44848 | /* 16004 */ "AND32mr_ND\0" |
| 44849 | /* 16015 */ "XOR32mr_ND\0" |
| 44850 | /* 16026 */ "SBB64mr_ND\0" |
| 44851 | /* 16037 */ "SUB64mr_ND\0" |
| 44852 | /* 16048 */ "ADC64mr_ND\0" |
| 44853 | /* 16059 */ "ADD64mr_ND\0" |
| 44854 | /* 16070 */ "AND64mr_ND\0" |
| 44855 | /* 16081 */ "XOR64mr_ND\0" |
| 44856 | /* 16092 */ "SBB16mr_ND\0" |
| 44857 | /* 16103 */ "SUB16mr_ND\0" |
| 44858 | /* 16114 */ "ADC16mr_ND\0" |
| 44859 | /* 16125 */ "ADD16mr_ND\0" |
| 44860 | /* 16136 */ "AND16mr_ND\0" |
| 44861 | /* 16147 */ "XOR16mr_ND\0" |
| 44862 | /* 16158 */ "SBB8mr_ND\0" |
| 44863 | /* 16168 */ "SUB8mr_ND\0" |
| 44864 | /* 16178 */ "ADC8mr_ND\0" |
| 44865 | /* 16188 */ "ADD8mr_ND\0" |
| 44866 | /* 16198 */ "AND8mr_ND\0" |
| 44867 | /* 16208 */ "XOR8mr_ND\0" |
| 44868 | /* 16218 */ "SBB32rr_ND\0" |
| 44869 | /* 16229 */ "SUB32rr_ND\0" |
| 44870 | /* 16240 */ "ADC32rr_ND\0" |
| 44871 | /* 16251 */ "ADD32rr_ND\0" |
| 44872 | /* 16262 */ "AND32rr_ND\0" |
| 44873 | /* 16273 */ "IMUL32rr_ND\0" |
| 44874 | /* 16285 */ "XOR32rr_ND\0" |
| 44875 | /* 16296 */ "CFCMOV32rr_ND\0" |
| 44876 | /* 16310 */ "ADCX32rr_ND\0" |
| 44877 | /* 16322 */ "ADOX32rr_ND\0" |
| 44878 | /* 16334 */ "SBB64rr_ND\0" |
| 44879 | /* 16345 */ "SUB64rr_ND\0" |
| 44880 | /* 16356 */ "ADC64rr_ND\0" |
| 44881 | /* 16367 */ "ADD64rr_ND\0" |
| 44882 | /* 16378 */ "AND64rr_ND\0" |
| 44883 | /* 16389 */ "IMUL64rr_ND\0" |
| 44884 | /* 16401 */ "XOR64rr_ND\0" |
| 44885 | /* 16412 */ "CFCMOV64rr_ND\0" |
| 44886 | /* 16426 */ "ADCX64rr_ND\0" |
| 44887 | /* 16438 */ "ADOX64rr_ND\0" |
| 44888 | /* 16450 */ "SBB16rr_ND\0" |
| 44889 | /* 16461 */ "SUB16rr_ND\0" |
| 44890 | /* 16472 */ "ADC16rr_ND\0" |
| 44891 | /* 16483 */ "ADD16rr_ND\0" |
| 44892 | /* 16494 */ "AND16rr_ND\0" |
| 44893 | /* 16505 */ "IMUL16rr_ND\0" |
| 44894 | /* 16517 */ "XOR16rr_ND\0" |
| 44895 | /* 16528 */ "CFCMOV16rr_ND\0" |
| 44896 | /* 16542 */ "SBB8rr_ND\0" |
| 44897 | /* 16552 */ "SUB8rr_ND\0" |
| 44898 | /* 16562 */ "ADC8rr_ND\0" |
| 44899 | /* 16572 */ "ADD8rr_ND\0" |
| 44900 | /* 16582 */ "AND8rr_ND\0" |
| 44901 | /* 16592 */ "XOR8rr_ND\0" |
| 44902 | /* 16602 */ "INCSSPD\0" |
| 44903 | /* 16610 */ "RDSSPD\0" |
| 44904 | /* 16617 */ "LOAD_STACK_GUARD\0" |
| 44905 | /* 16634 */ "AVX512_FsFLD0SD\0" |
| 44906 | /* 16650 */ "PTDPBSSD\0" |
| 44907 | /* 16659 */ "WRSSD\0" |
| 44908 | /* 16665 */ "WRUSSD\0" |
| 44909 | /* 16672 */ "MOVNTSD\0" |
| 44910 | /* 16680 */ "PTDPBUSD\0" |
| 44911 | /* 16689 */ "STD\0" |
| 44912 | /* 16693 */ "PTDPBSUD\0" |
| 44913 | /* 16702 */ "PTDPBUUD\0" |
| 44914 | /* 16711 */ "WBINVD\0" |
| 44915 | /* 16718 */ "WBNOINVD\0" |
| 44916 | /* 16727 */ "CWD\0" |
| 44917 | /* 16731 */ "FLDL2E\0" |
| 44918 | /* 16738 */ "PSEUDO_PROBE\0" |
| 44919 | /* 16751 */ "G_SSUBE\0" |
| 44920 | /* 16759 */ "G_USUBE\0" |
| 44921 | /* 16767 */ "LFENCE\0" |
| 44922 | /* 16774 */ "MFENCE\0" |
| 44923 | /* 16781 */ "SFENCE\0" |
| 44924 | /* 16788 */ "G_FENCE\0" |
| 44925 | /* 16796 */ "ARITH_FENCE\0" |
| 44926 | /* 16808 */ "REG_SEQUENCE\0" |
| 44927 | /* 16821 */ "G_SADDE\0" |
| 44928 | /* 16829 */ "G_UADDE\0" |
| 44929 | /* 16837 */ "G_GET_FPMODE\0" |
| 44930 | /* 16850 */ "G_RESET_FPMODE\0" |
| 44931 | /* 16865 */ "G_SET_FPMODE\0" |
| 44932 | /* 16878 */ "CWDE\0" |
| 44933 | /* 16883 */ "G_FMINNUM_IEEE\0" |
| 44934 | /* 16898 */ "G_FMAXNUM_IEEE\0" |
| 44935 | /* 16913 */ "FFREE\0" |
| 44936 | /* 16919 */ "FSCALE\0" |
| 44937 | /* 16926 */ "G_VSCALE\0" |
| 44938 | /* 16935 */ "G_JUMP_TABLE\0" |
| 44939 | /* 16948 */ "BUNDLE\0" |
| 44940 | /* 16955 */ "VMRESUME\0" |
| 44941 | /* 16964 */ "G_MEMCPY_INLINE\0" |
| 44942 | /* 16980 */ "LOOPNE\0" |
| 44943 | /* 16987 */ "LOCAL_ESCAPE\0" |
| 44944 | /* 17000 */ "LOOPE\0" |
| 44945 | /* 17006 */ "CDQE\0" |
| 44946 | /* 17011 */ "MASKPAIR16STORE\0" |
| 44947 | /* 17027 */ "G_STACKRESTORE\0" |
| 44948 | /* 17042 */ "XSTORE\0" |
| 44949 | /* 17049 */ "G_INDEXED_STORE\0" |
| 44950 | /* 17065 */ "G_STORE\0" |
| 44951 | /* 17073 */ "RDFSBASE\0" |
| 44952 | /* 17082 */ "WRFSBASE\0" |
| 44953 | /* 17091 */ "RDGSBASE\0" |
| 44954 | /* 17100 */ "WRGSBASE\0" |
| 44955 | /* 17109 */ "TILERELEASE\0" |
| 44956 | /* 17121 */ "G_BITREVERSE\0" |
| 44957 | /* 17134 */ "TPAUSE\0" |
| 44958 | /* 17141 */ "RMPUPDATE\0" |
| 44959 | /* 17151 */ "CLDEMOTE\0" |
| 44960 | /* 17160 */ "DBG_VALUE\0" |
| 44961 | /* 17170 */ "G_GLOBAL_VALUE\0" |
| 44962 | /* 17185 */ "G_PTRAUTH_GLOBAL_VALUE\0" |
| 44963 | /* 17208 */ "CONVERGENCECTRL_GLUE\0" |
| 44964 | /* 17229 */ "LEAVE\0" |
| 44965 | /* 17235 */ "G_STACKSAVE\0" |
| 44966 | /* 17247 */ "FXSAVE\0" |
| 44967 | /* 17254 */ "G_MEMMOVE\0" |
| 44968 | /* 17264 */ "G_FREEZE\0" |
| 44969 | /* 17273 */ "G_FCANONICALIZE\0" |
| 44970 | /* 17289 */ "SERIALIZE\0" |
| 44971 | /* 17299 */ "G_CTLZ_ZERO_UNDEF\0" |
| 44972 | /* 17317 */ "G_CTTZ_ZERO_UNDEF\0" |
| 44973 | /* 17335 */ "G_IMPLICIT_DEF\0" |
| 44974 | /* 17350 */ "XABORT_DEF\0" |
| 44975 | /* 17361 */ "DBG_INSTR_REF\0" |
| 44976 | /* 17375 */ "VMXOFF\0" |
| 44977 | /* 17382 */ "LAHF\0" |
| 44978 | /* 17387 */ "SAHF\0" |
| 44979 | /* 17392 */ "SHL32m1_NF\0" |
| 44980 | /* 17403 */ "ROL32m1_NF\0" |
| 44981 | /* 17414 */ "SAR32m1_NF\0" |
| 44982 | /* 17425 */ "SHR32m1_NF\0" |
| 44983 | /* 17436 */ "ROR32m1_NF\0" |
| 44984 | /* 17447 */ "SHL64m1_NF\0" |
| 44985 | /* 17458 */ "ROL64m1_NF\0" |
| 44986 | /* 17469 */ "SAR64m1_NF\0" |
| 44987 | /* 17480 */ "SHR64m1_NF\0" |
| 44988 | /* 17491 */ "ROR64m1_NF\0" |
| 44989 | /* 17502 */ "SHL16m1_NF\0" |
| 44990 | /* 17513 */ "ROL16m1_NF\0" |
| 44991 | /* 17524 */ "SAR16m1_NF\0" |
| 44992 | /* 17535 */ "SHR16m1_NF\0" |
| 44993 | /* 17546 */ "ROR16m1_NF\0" |
| 44994 | /* 17557 */ "SHL8m1_NF\0" |
| 44995 | /* 17567 */ "ROL8m1_NF\0" |
| 44996 | /* 17577 */ "SAR8m1_NF\0" |
| 44997 | /* 17587 */ "SHR8m1_NF\0" |
| 44998 | /* 17597 */ "ROR8m1_NF\0" |
| 44999 | /* 17607 */ "SHL32r1_NF\0" |
| 45000 | /* 17618 */ "ROL32r1_NF\0" |
| 45001 | /* 17629 */ "SAR32r1_NF\0" |
| 45002 | /* 17640 */ "SHR32r1_NF\0" |
| 45003 | /* 17651 */ "ROR32r1_NF\0" |
| 45004 | /* 17662 */ "SHL64r1_NF\0" |
| 45005 | /* 17673 */ "ROL64r1_NF\0" |
| 45006 | /* 17684 */ "SAR64r1_NF\0" |
| 45007 | /* 17695 */ "SHR64r1_NF\0" |
| 45008 | /* 17706 */ "ROR64r1_NF\0" |
| 45009 | /* 17717 */ "SHL16r1_NF\0" |
| 45010 | /* 17728 */ "ROL16r1_NF\0" |
| 45011 | /* 17739 */ "SAR16r1_NF\0" |
| 45012 | /* 17750 */ "SHR16r1_NF\0" |
| 45013 | /* 17761 */ "ROR16r1_NF\0" |
| 45014 | /* 17772 */ "SHL8r1_NF\0" |
| 45015 | /* 17782 */ "ROL8r1_NF\0" |
| 45016 | /* 17792 */ "SAR8r1_NF\0" |
| 45017 | /* 17802 */ "SHR8r1_NF\0" |
| 45018 | /* 17812 */ "ROR8r1_NF\0" |
| 45019 | /* 17822 */ "SUB64mi32_NF\0" |
| 45020 | /* 17835 */ "ADD64mi32_NF\0" |
| 45021 | /* 17848 */ "AND64mi32_NF\0" |
| 45022 | /* 17861 */ "XOR64mi32_NF\0" |
| 45023 | /* 17874 */ "IMUL64rmi32_NF\0" |
| 45024 | /* 17889 */ "SUB64ri32_NF\0" |
| 45025 | /* 17902 */ "ADD64ri32_NF\0" |
| 45026 | /* 17915 */ "AND64ri32_NF\0" |
| 45027 | /* 17928 */ "XOR64ri32_NF\0" |
| 45028 | /* 17941 */ "IMUL64rri32_NF\0" |
| 45029 | /* 17956 */ "SUB32mi8_NF\0" |
| 45030 | /* 17968 */ "ADD32mi8_NF\0" |
| 45031 | /* 17980 */ "AND32mi8_NF\0" |
| 45032 | /* 17992 */ "XOR32mi8_NF\0" |
| 45033 | /* 18004 */ "SUB64mi8_NF\0" |
| 45034 | /* 18016 */ "ADD64mi8_NF\0" |
| 45035 | /* 18028 */ "AND64mi8_NF\0" |
| 45036 | /* 18040 */ "XOR64mi8_NF\0" |
| 45037 | /* 18052 */ "SUB16mi8_NF\0" |
| 45038 | /* 18064 */ "ADD16mi8_NF\0" |
| 45039 | /* 18076 */ "AND16mi8_NF\0" |
| 45040 | /* 18088 */ "XOR16mi8_NF\0" |
| 45041 | /* 18100 */ "IMUL32rmi8_NF\0" |
| 45042 | /* 18114 */ "IMUL64rmi8_NF\0" |
| 45043 | /* 18128 */ "IMUL16rmi8_NF\0" |
| 45044 | /* 18142 */ "SUB32ri8_NF\0" |
| 45045 | /* 18154 */ "ADD32ri8_NF\0" |
| 45046 | /* 18166 */ "AND32ri8_NF\0" |
| 45047 | /* 18178 */ "XOR32ri8_NF\0" |
| 45048 | /* 18190 */ "SUB64ri8_NF\0" |
| 45049 | /* 18202 */ "ADD64ri8_NF\0" |
| 45050 | /* 18214 */ "AND64ri8_NF\0" |
| 45051 | /* 18226 */ "XOR64ri8_NF\0" |
| 45052 | /* 18238 */ "SUB16ri8_NF\0" |
| 45053 | /* 18250 */ "ADD16ri8_NF\0" |
| 45054 | /* 18262 */ "AND16ri8_NF\0" |
| 45055 | /* 18274 */ "XOR16ri8_NF\0" |
| 45056 | /* 18286 */ "SHLD32mri8_NF\0" |
| 45057 | /* 18300 */ "SHRD32mri8_NF\0" |
| 45058 | /* 18314 */ "SHLD64mri8_NF\0" |
| 45059 | /* 18328 */ "SHRD64mri8_NF\0" |
| 45060 | /* 18342 */ "SHLD16mri8_NF\0" |
| 45061 | /* 18356 */ "SHRD16mri8_NF\0" |
| 45062 | /* 18370 */ "SHLD32rri8_NF\0" |
| 45063 | /* 18384 */ "SHRD32rri8_NF\0" |
| 45064 | /* 18398 */ "IMUL32rri8_NF\0" |
| 45065 | /* 18412 */ "SHLD64rri8_NF\0" |
| 45066 | /* 18426 */ "SHRD64rri8_NF\0" |
| 45067 | /* 18440 */ "IMUL64rri8_NF\0" |
| 45068 | /* 18454 */ "SHLD16rri8_NF\0" |
| 45069 | /* 18468 */ "SHRD16rri8_NF\0" |
| 45070 | /* 18482 */ "IMUL16rri8_NF\0" |
| 45071 | /* 18496 */ "SHL32mCL_NF\0" |
| 45072 | /* 18508 */ "ROL32mCL_NF\0" |
| 45073 | /* 18520 */ "SAR32mCL_NF\0" |
| 45074 | /* 18532 */ "SHR32mCL_NF\0" |
| 45075 | /* 18544 */ "ROR32mCL_NF\0" |
| 45076 | /* 18556 */ "SHL64mCL_NF\0" |
| 45077 | /* 18568 */ "ROL64mCL_NF\0" |
| 45078 | /* 18580 */ "SAR64mCL_NF\0" |
| 45079 | /* 18592 */ "SHR64mCL_NF\0" |
| 45080 | /* 18604 */ "ROR64mCL_NF\0" |
| 45081 | /* 18616 */ "SHL16mCL_NF\0" |
| 45082 | /* 18628 */ "ROL16mCL_NF\0" |
| 45083 | /* 18640 */ "SAR16mCL_NF\0" |
| 45084 | /* 18652 */ "SHR16mCL_NF\0" |
| 45085 | /* 18664 */ "ROR16mCL_NF\0" |
| 45086 | /* 18676 */ "SHL8mCL_NF\0" |
| 45087 | /* 18687 */ "ROL8mCL_NF\0" |
| 45088 | /* 18698 */ "SAR8mCL_NF\0" |
| 45089 | /* 18709 */ "SHR8mCL_NF\0" |
| 45090 | /* 18720 */ "ROR8mCL_NF\0" |
| 45091 | /* 18731 */ "SHL32rCL_NF\0" |
| 45092 | /* 18743 */ "ROL32rCL_NF\0" |
| 45093 | /* 18755 */ "SAR32rCL_NF\0" |
| 45094 | /* 18767 */ "SHR32rCL_NF\0" |
| 45095 | /* 18779 */ "ROR32rCL_NF\0" |
| 45096 | /* 18791 */ "SHL64rCL_NF\0" |
| 45097 | /* 18803 */ "ROL64rCL_NF\0" |
| 45098 | /* 18815 */ "SAR64rCL_NF\0" |
| 45099 | /* 18827 */ "SHR64rCL_NF\0" |
| 45100 | /* 18839 */ "ROR64rCL_NF\0" |
| 45101 | /* 18851 */ "SHL16rCL_NF\0" |
| 45102 | /* 18863 */ "ROL16rCL_NF\0" |
| 45103 | /* 18875 */ "SAR16rCL_NF\0" |
| 45104 | /* 18887 */ "SHR16rCL_NF\0" |
| 45105 | /* 18899 */ "ROR16rCL_NF\0" |
| 45106 | /* 18911 */ "SHL8rCL_NF\0" |
| 45107 | /* 18922 */ "ROL8rCL_NF\0" |
| 45108 | /* 18933 */ "SAR8rCL_NF\0" |
| 45109 | /* 18944 */ "SHR8rCL_NF\0" |
| 45110 | /* 18955 */ "ROR8rCL_NF\0" |
| 45111 | /* 18966 */ "SHLD32mrCL_NF\0" |
| 45112 | /* 18980 */ "SHRD32mrCL_NF\0" |
| 45113 | /* 18994 */ "SHLD64mrCL_NF\0" |
| 45114 | /* 19008 */ "SHRD64mrCL_NF\0" |
| 45115 | /* 19022 */ "SHLD16mrCL_NF\0" |
| 45116 | /* 19036 */ "SHRD16mrCL_NF\0" |
| 45117 | /* 19050 */ "SHLD32rrCL_NF\0" |
| 45118 | /* 19064 */ "SHRD32rrCL_NF\0" |
| 45119 | /* 19078 */ "SHLD64rrCL_NF\0" |
| 45120 | /* 19092 */ "SHRD64rrCL_NF\0" |
| 45121 | /* 19106 */ "SHLD16rrCL_NF\0" |
| 45122 | /* 19120 */ "SHRD16rrCL_NF\0" |
| 45123 | /* 19134 */ "SUB32mi_NF\0" |
| 45124 | /* 19145 */ "ADD32mi_NF\0" |
| 45125 | /* 19156 */ "AND32mi_NF\0" |
| 45126 | /* 19167 */ "SHL32mi_NF\0" |
| 45127 | /* 19178 */ "ROL32mi_NF\0" |
| 45128 | /* 19189 */ "SAR32mi_NF\0" |
| 45129 | /* 19200 */ "SHR32mi_NF\0" |
| 45130 | /* 19211 */ "ROR32mi_NF\0" |
| 45131 | /* 19222 */ "XOR32mi_NF\0" |
| 45132 | /* 19233 */ "SHL64mi_NF\0" |
| 45133 | /* 19244 */ "ROL64mi_NF\0" |
| 45134 | /* 19255 */ "SAR64mi_NF\0" |
| 45135 | /* 19266 */ "SHR64mi_NF\0" |
| 45136 | /* 19277 */ "ROR64mi_NF\0" |
| 45137 | /* 19288 */ "SUB16mi_NF\0" |
| 45138 | /* 19299 */ "ADD16mi_NF\0" |
| 45139 | /* 19310 */ "AND16mi_NF\0" |
| 45140 | /* 19321 */ "SHL16mi_NF\0" |
| 45141 | /* 19332 */ "ROL16mi_NF\0" |
| 45142 | /* 19343 */ "SAR16mi_NF\0" |
| 45143 | /* 19354 */ "SHR16mi_NF\0" |
| 45144 | /* 19365 */ "ROR16mi_NF\0" |
| 45145 | /* 19376 */ "XOR16mi_NF\0" |
| 45146 | /* 19387 */ "SUB8mi_NF\0" |
| 45147 | /* 19397 */ "ADD8mi_NF\0" |
| 45148 | /* 19407 */ "AND8mi_NF\0" |
| 45149 | /* 19417 */ "SHL8mi_NF\0" |
| 45150 | /* 19427 */ "ROL8mi_NF\0" |
| 45151 | /* 19437 */ "SAR8mi_NF\0" |
| 45152 | /* 19447 */ "SHR8mi_NF\0" |
| 45153 | /* 19457 */ "ROR8mi_NF\0" |
| 45154 | /* 19467 */ "XOR8mi_NF\0" |
| 45155 | /* 19477 */ "IMUL32rmi_NF\0" |
| 45156 | /* 19490 */ "IMUL16rmi_NF\0" |
| 45157 | /* 19503 */ "SUB32ri_NF\0" |
| 45158 | /* 19514 */ "ADD32ri_NF\0" |
| 45159 | /* 19525 */ "AND32ri_NF\0" |
| 45160 | /* 19536 */ "SHL32ri_NF\0" |
| 45161 | /* 19547 */ "ROL32ri_NF\0" |
| 45162 | /* 19558 */ "SAR32ri_NF\0" |
| 45163 | /* 19569 */ "SHR32ri_NF\0" |
| 45164 | /* 19580 */ "ROR32ri_NF\0" |
| 45165 | /* 19591 */ "XOR32ri_NF\0" |
| 45166 | /* 19602 */ "SHL64ri_NF\0" |
| 45167 | /* 19613 */ "ROL64ri_NF\0" |
| 45168 | /* 19624 */ "SAR64ri_NF\0" |
| 45169 | /* 19635 */ "SHR64ri_NF\0" |
| 45170 | /* 19646 */ "ROR64ri_NF\0" |
| 45171 | /* 19657 */ "SUB16ri_NF\0" |
| 45172 | /* 19668 */ "ADD16ri_NF\0" |
| 45173 | /* 19679 */ "AND16ri_NF\0" |
| 45174 | /* 19690 */ "SHL16ri_NF\0" |
| 45175 | /* 19701 */ "ROL16ri_NF\0" |
| 45176 | /* 19712 */ "SAR16ri_NF\0" |
| 45177 | /* 19723 */ "SHR16ri_NF\0" |
| 45178 | /* 19734 */ "ROR16ri_NF\0" |
| 45179 | /* 19745 */ "XOR16ri_NF\0" |
| 45180 | /* 19756 */ "SUB8ri_NF\0" |
| 45181 | /* 19766 */ "ADD8ri_NF\0" |
| 45182 | /* 19776 */ "AND8ri_NF\0" |
| 45183 | /* 19786 */ "SHL8ri_NF\0" |
| 45184 | /* 19796 */ "ROL8ri_NF\0" |
| 45185 | /* 19806 */ "SAR8ri_NF\0" |
| 45186 | /* 19816 */ "SHR8ri_NF\0" |
| 45187 | /* 19826 */ "ROR8ri_NF\0" |
| 45188 | /* 19836 */ "XOR8ri_NF\0" |
| 45189 | /* 19846 */ "IMUL32rri_NF\0" |
| 45190 | /* 19859 */ "IMUL16rri_NF\0" |
| 45191 | /* 19872 */ "DEC32m_NF\0" |
| 45192 | /* 19882 */ "INC32m_NF\0" |
| 45193 | /* 19892 */ "NEG32m_NF\0" |
| 45194 | /* 19902 */ "IMUL32m_NF\0" |
| 45195 | /* 19913 */ "IDIV32m_NF\0" |
| 45196 | /* 19924 */ "DEC64m_NF\0" |
| 45197 | /* 19934 */ "INC64m_NF\0" |
| 45198 | /* 19944 */ "NEG64m_NF\0" |
| 45199 | /* 19954 */ "IMUL64m_NF\0" |
| 45200 | /* 19965 */ "IDIV64m_NF\0" |
| 45201 | /* 19976 */ "DEC16m_NF\0" |
| 45202 | /* 19986 */ "INC16m_NF\0" |
| 45203 | /* 19996 */ "NEG16m_NF\0" |
| 45204 | /* 20006 */ "IMUL16m_NF\0" |
| 45205 | /* 20017 */ "IDIV16m_NF\0" |
| 45206 | /* 20028 */ "DEC8m_NF\0" |
| 45207 | /* 20037 */ "INC8m_NF\0" |
| 45208 | /* 20046 */ "NEG8m_NF\0" |
| 45209 | /* 20055 */ "IMUL8m_NF\0" |
| 45210 | /* 20065 */ "IDIV8m_NF\0" |
| 45211 | /* 20075 */ "SUB32rm_NF\0" |
| 45212 | /* 20086 */ "ADD32rm_NF\0" |
| 45213 | /* 20097 */ "AND32rm_NF\0" |
| 45214 | /* 20108 */ "BZHI32rm_NF\0" |
| 45215 | /* 20120 */ "BLSI32rm_NF\0" |
| 45216 | /* 20132 */ "BLSMSK32rm_NF\0" |
| 45217 | /* 20146 */ "IMUL32rm_NF\0" |
| 45218 | /* 20158 */ "ANDN32rm_NF\0" |
| 45219 | /* 20170 */ "XOR32rm_NF\0" |
| 45220 | /* 20181 */ "BLSR32rm_NF\0" |
| 45221 | /* 20193 */ "BEXTR32rm_NF\0" |
| 45222 | /* 20206 */ "POPCNT32rm_NF\0" |
| 45223 | /* 20220 */ "LZCNT32rm_NF\0" |
| 45224 | /* 20233 */ "TZCNT32rm_NF\0" |
| 45225 | /* 20246 */ "SUB64rm_NF\0" |
| 45226 | /* 20257 */ "ADD64rm_NF\0" |
| 45227 | /* 20268 */ "AND64rm_NF\0" |
| 45228 | /* 20279 */ "BZHI64rm_NF\0" |
| 45229 | /* 20291 */ "BLSI64rm_NF\0" |
| 45230 | /* 20303 */ "BLSMSK64rm_NF\0" |
| 45231 | /* 20317 */ "IMUL64rm_NF\0" |
| 45232 | /* 20329 */ "ANDN64rm_NF\0" |
| 45233 | /* 20341 */ "XOR64rm_NF\0" |
| 45234 | /* 20352 */ "BLSR64rm_NF\0" |
| 45235 | /* 20364 */ "BEXTR64rm_NF\0" |
| 45236 | /* 20377 */ "POPCNT64rm_NF\0" |
| 45237 | /* 20391 */ "LZCNT64rm_NF\0" |
| 45238 | /* 20404 */ "TZCNT64rm_NF\0" |
| 45239 | /* 20417 */ "SUB16rm_NF\0" |
| 45240 | /* 20428 */ "ADD16rm_NF\0" |
| 45241 | /* 20439 */ "AND16rm_NF\0" |
| 45242 | /* 20450 */ "IMUL16rm_NF\0" |
| 45243 | /* 20462 */ "XOR16rm_NF\0" |
| 45244 | /* 20473 */ "POPCNT16rm_NF\0" |
| 45245 | /* 20487 */ "LZCNT16rm_NF\0" |
| 45246 | /* 20500 */ "TZCNT16rm_NF\0" |
| 45247 | /* 20513 */ "SUB8rm_NF\0" |
| 45248 | /* 20523 */ "ADD8rm_NF\0" |
| 45249 | /* 20533 */ "AND8rm_NF\0" |
| 45250 | /* 20543 */ "XOR8rm_NF\0" |
| 45251 | /* 20553 */ "DEC32r_NF\0" |
| 45252 | /* 20563 */ "INC32r_NF\0" |
| 45253 | /* 20573 */ "NEG32r_NF\0" |
| 45254 | /* 20583 */ "IMUL32r_NF\0" |
| 45255 | /* 20594 */ "IDIV32r_NF\0" |
| 45256 | /* 20605 */ "DEC64r_NF\0" |
| 45257 | /* 20615 */ "INC64r_NF\0" |
| 45258 | /* 20625 */ "NEG64r_NF\0" |
| 45259 | /* 20635 */ "IMUL64r_NF\0" |
| 45260 | /* 20646 */ "IDIV64r_NF\0" |
| 45261 | /* 20657 */ "DEC16r_NF\0" |
| 45262 | /* 20667 */ "INC16r_NF\0" |
| 45263 | /* 20677 */ "NEG16r_NF\0" |
| 45264 | /* 20687 */ "IMUL16r_NF\0" |
| 45265 | /* 20698 */ "IDIV16r_NF\0" |
| 45266 | /* 20709 */ "DEC8r_NF\0" |
| 45267 | /* 20718 */ "INC8r_NF\0" |
| 45268 | /* 20727 */ "NEG8r_NF\0" |
| 45269 | /* 20736 */ "IMUL8r_NF\0" |
| 45270 | /* 20746 */ "IDIV8r_NF\0" |
| 45271 | /* 20756 */ "SUB32mr_NF\0" |
| 45272 | /* 20767 */ "ADD32mr_NF\0" |
| 45273 | /* 20778 */ "AND32mr_NF\0" |
| 45274 | /* 20789 */ "XOR32mr_NF\0" |
| 45275 | /* 20800 */ "SUB64mr_NF\0" |
| 45276 | /* 20811 */ "ADD64mr_NF\0" |
| 45277 | /* 20822 */ "AND64mr_NF\0" |
| 45278 | /* 20833 */ "XOR64mr_NF\0" |
| 45279 | /* 20844 */ "SUB16mr_NF\0" |
| 45280 | /* 20855 */ "ADD16mr_NF\0" |
| 45281 | /* 20866 */ "AND16mr_NF\0" |
| 45282 | /* 20877 */ "XOR16mr_NF\0" |
| 45283 | /* 20888 */ "SUB8mr_NF\0" |
| 45284 | /* 20898 */ "ADD8mr_NF\0" |
| 45285 | /* 20908 */ "AND8mr_NF\0" |
| 45286 | /* 20918 */ "XOR8mr_NF\0" |
| 45287 | /* 20928 */ "SUB32rr_NF\0" |
| 45288 | /* 20939 */ "ADD32rr_NF\0" |
| 45289 | /* 20950 */ "AND32rr_NF\0" |
| 45290 | /* 20961 */ "BZHI32rr_NF\0" |
| 45291 | /* 20973 */ "BLSI32rr_NF\0" |
| 45292 | /* 20985 */ "BLSMSK32rr_NF\0" |
| 45293 | /* 20999 */ "IMUL32rr_NF\0" |
| 45294 | /* 21011 */ "ANDN32rr_NF\0" |
| 45295 | /* 21023 */ "XOR32rr_NF\0" |
| 45296 | /* 21034 */ "BLSR32rr_NF\0" |
| 45297 | /* 21046 */ "BEXTR32rr_NF\0" |
| 45298 | /* 21059 */ "POPCNT32rr_NF\0" |
| 45299 | /* 21073 */ "LZCNT32rr_NF\0" |
| 45300 | /* 21086 */ "TZCNT32rr_NF\0" |
| 45301 | /* 21099 */ "SUB64rr_NF\0" |
| 45302 | /* 21110 */ "ADD64rr_NF\0" |
| 45303 | /* 21121 */ "AND64rr_NF\0" |
| 45304 | /* 21132 */ "BZHI64rr_NF\0" |
| 45305 | /* 21144 */ "BLSI64rr_NF\0" |
| 45306 | /* 21156 */ "BLSMSK64rr_NF\0" |
| 45307 | /* 21170 */ "IMUL64rr_NF\0" |
| 45308 | /* 21182 */ "ANDN64rr_NF\0" |
| 45309 | /* 21194 */ "XOR64rr_NF\0" |
| 45310 | /* 21205 */ "BLSR64rr_NF\0" |
| 45311 | /* 21217 */ "BEXTR64rr_NF\0" |
| 45312 | /* 21230 */ "POPCNT64rr_NF\0" |
| 45313 | /* 21244 */ "LZCNT64rr_NF\0" |
| 45314 | /* 21257 */ "TZCNT64rr_NF\0" |
| 45315 | /* 21270 */ "SUB16rr_NF\0" |
| 45316 | /* 21281 */ "ADD16rr_NF\0" |
| 45317 | /* 21292 */ "AND16rr_NF\0" |
| 45318 | /* 21303 */ "IMUL16rr_NF\0" |
| 45319 | /* 21315 */ "XOR16rr_NF\0" |
| 45320 | /* 21326 */ "POPCNT16rr_NF\0" |
| 45321 | /* 21340 */ "LZCNT16rr_NF\0" |
| 45322 | /* 21353 */ "TZCNT16rr_NF\0" |
| 45323 | /* 21366 */ "SUB8rr_NF\0" |
| 45324 | /* 21376 */ "ADD8rr_NF\0" |
| 45325 | /* 21386 */ "AND8rr_NF\0" |
| 45326 | /* 21396 */ "XOR8rr_NF\0" |
| 45327 | /* 21406 */ "CMOVNB_F\0" |
| 45328 | /* 21415 */ "CMOVB_F\0" |
| 45329 | /* 21423 */ "CMOVNBE_F\0" |
| 45330 | /* 21433 */ "CMOVBE_F\0" |
| 45331 | /* 21442 */ "CMOVNE_F\0" |
| 45332 | /* 21451 */ "CMOVE_F\0" |
| 45333 | /* 21459 */ "XCH_F\0" |
| 45334 | /* 21465 */ "XAM_F\0" |
| 45335 | /* 21471 */ "CMOVNP_F\0" |
| 45336 | /* 21480 */ "CMOVP_F\0" |
| 45337 | /* 21488 */ "ABS_F\0" |
| 45338 | /* 21494 */ "CHS_F\0" |
| 45339 | /* 21500 */ "SQRT_F\0" |
| 45340 | /* 21507 */ "TST_F\0" |
| 45341 | /* 21513 */ "G_FNEG\0" |
| 45342 | /* 21520 */ "EXTRACT_SUBREG\0" |
| 45343 | /* 21535 */ "INSERT_SUBREG\0" |
| 45344 | /* 21549 */ "G_SEXT_INREG\0" |
| 45345 | /* 21562 */ "SUBREG_TO_REG\0" |
| 45346 | /* 21576 */ "LDTILECFG\0" |
| 45347 | /* 21586 */ "STTILECFG\0" |
| 45348 | /* 21596 */ "G_ATOMIC_CMPXCHG\0" |
| 45349 | /* 21613 */ "G_ATOMICRMW_XCHG\0" |
| 45350 | /* 21630 */ "PCONFIG\0" |
| 45351 | /* 21638 */ "STACKALLOC_W_PROBING\0" |
| 45352 | /* 21659 */ "G_FLOG\0" |
| 45353 | /* 21666 */ "INVLPG\0" |
| 45354 | /* 21673 */ "G_VAARG\0" |
| 45355 | /* 21681 */ "PREALLOCATED_ARG\0" |
| 45356 | /* 21698 */ "VMLAUNCH\0" |
| 45357 | /* 21707 */ "G_PREFETCH\0" |
| 45358 | /* 21718 */ "G_SMULH\0" |
| 45359 | /* 21726 */ "G_UMULH\0" |
| 45360 | /* 21734 */ "G_FTANH\0" |
| 45361 | /* 21742 */ "G_FSINH\0" |
| 45362 | /* 21750 */ "AVX512_FsFLD0SH\0" |
| 45363 | /* 21766 */ "PSMASH\0" |
| 45364 | /* 21773 */ "G_FCOSH\0" |
| 45365 | /* 21781 */ "CLFLUSH\0" |
| 45366 | /* 21789 */ "CLGI\0" |
| 45367 | /* 21794 */ "STGI\0" |
| 45368 | /* 21799 */ "DBG_PHI\0" |
| 45369 | /* 21807 */ "CLI\0" |
| 45370 | /* 21811 */ "FLDPI\0" |
| 45371 | /* 21817 */ "SENDUIPI\0" |
| 45372 | /* 21826 */ "EXTRQI\0" |
| 45373 | /* 21833 */ "INSERTQI\0" |
| 45374 | /* 21842 */ "G_FPTOSI\0" |
| 45375 | /* 21851 */ "STI\0" |
| 45376 | /* 21855 */ "CLUI\0" |
| 45377 | /* 21860 */ "G_FPTOUI\0" |
| 45378 | /* 21869 */ "TESTUI\0" |
| 45379 | /* 21876 */ "G_FPOWI\0" |
| 45380 | /* 21884 */ "KCFI_CHECK\0" |
| 45381 | /* 21895 */ "XRESLDTRK\0" |
| 45382 | /* 21905 */ "XSUSLDTRK\0" |
| 45383 | /* 21915 */ "G_PTRMASK\0" |
| 45384 | /* 21925 */ "RCL32mCL\0" |
| 45385 | /* 21934 */ "SHL32mCL\0" |
| 45386 | /* 21943 */ "ROL32mCL\0" |
| 45387 | /* 21952 */ "SAR32mCL\0" |
| 45388 | /* 21961 */ "RCR32mCL\0" |
| 45389 | /* 21970 */ "SHR32mCL\0" |
| 45390 | /* 21979 */ "ROR32mCL\0" |
| 45391 | /* 21988 */ "RCL64mCL\0" |
| 45392 | /* 21997 */ "SHL64mCL\0" |
| 45393 | /* 22006 */ "ROL64mCL\0" |
| 45394 | /* 22015 */ "SAR64mCL\0" |
| 45395 | /* 22024 */ "RCR64mCL\0" |
| 45396 | /* 22033 */ "SHR64mCL\0" |
| 45397 | /* 22042 */ "ROR64mCL\0" |
| 45398 | /* 22051 */ "RCL16mCL\0" |
| 45399 | /* 22060 */ "SHL16mCL\0" |
| 45400 | /* 22069 */ "ROL16mCL\0" |
| 45401 | /* 22078 */ "SAR16mCL\0" |
| 45402 | /* 22087 */ "RCR16mCL\0" |
| 45403 | /* 22096 */ "SHR16mCL\0" |
| 45404 | /* 22105 */ "ROR16mCL\0" |
| 45405 | /* 22114 */ "RCL8mCL\0" |
| 45406 | /* 22122 */ "SHL8mCL\0" |
| 45407 | /* 22130 */ "ROL8mCL\0" |
| 45408 | /* 22138 */ "SAR8mCL\0" |
| 45409 | /* 22146 */ "RCR8mCL\0" |
| 45410 | /* 22154 */ "SHR8mCL\0" |
| 45411 | /* 22162 */ "ROR8mCL\0" |
| 45412 | /* 22170 */ "RCL32rCL\0" |
| 45413 | /* 22179 */ "SHL32rCL\0" |
| 45414 | /* 22188 */ "ROL32rCL\0" |
| 45415 | /* 22197 */ "SAR32rCL\0" |
| 45416 | /* 22206 */ "RCR32rCL\0" |
| 45417 | /* 22215 */ "SHR32rCL\0" |
| 45418 | /* 22224 */ "ROR32rCL\0" |
| 45419 | /* 22233 */ "RCL64rCL\0" |
| 45420 | /* 22242 */ "SHL64rCL\0" |
| 45421 | /* 22251 */ "ROL64rCL\0" |
| 45422 | /* 22260 */ "SAR64rCL\0" |
| 45423 | /* 22269 */ "RCR64rCL\0" |
| 45424 | /* 22278 */ "SHR64rCL\0" |
| 45425 | /* 22287 */ "ROR64rCL\0" |
| 45426 | /* 22296 */ "RCL16rCL\0" |
| 45427 | /* 22305 */ "SHL16rCL\0" |
| 45428 | /* 22314 */ "ROL16rCL\0" |
| 45429 | /* 22323 */ "SAR16rCL\0" |
| 45430 | /* 22332 */ "RCR16rCL\0" |
| 45431 | /* 22341 */ "SHR16rCL\0" |
| 45432 | /* 22350 */ "ROR16rCL\0" |
| 45433 | /* 22359 */ "RCL8rCL\0" |
| 45434 | /* 22367 */ "SHL8rCL\0" |
| 45435 | /* 22375 */ "ROL8rCL\0" |
| 45436 | /* 22383 */ "SAR8rCL\0" |
| 45437 | /* 22391 */ "RCR8rCL\0" |
| 45438 | /* 22399 */ "SHR8rCL\0" |
| 45439 | /* 22407 */ "ROR8rCL\0" |
| 45440 | /* 22415 */ "SHLD32mrCL\0" |
| 45441 | /* 22426 */ "SHRD32mrCL\0" |
| 45442 | /* 22437 */ "SHLD64mrCL\0" |
| 45443 | /* 22448 */ "SHRD64mrCL\0" |
| 45444 | /* 22459 */ "SHLD16mrCL\0" |
| 45445 | /* 22470 */ "SHRD16mrCL\0" |
| 45446 | /* 22481 */ "SHLD32rrCL\0" |
| 45447 | /* 22492 */ "SHRD32rrCL\0" |
| 45448 | /* 22503 */ "SHLD64rrCL\0" |
| 45449 | /* 22514 */ "SHRD64rrCL\0" |
| 45450 | /* 22525 */ "SHLD16rrCL\0" |
| 45451 | /* 22536 */ "SHRD16rrCL\0" |
| 45452 | /* 22547 */ "GC_LABEL\0" |
| 45453 | /* 22556 */ "DBG_LABEL\0" |
| 45454 | /* 22566 */ "EH_LABEL\0" |
| 45455 | /* 22575 */ "ANNOTATION_LABEL\0" |
| 45456 | /* 22592 */ "ICALL_BRANCH_FUNNEL\0" |
| 45457 | /* 22612 */ "G_FSHL\0" |
| 45458 | /* 22619 */ "G_SHL\0" |
| 45459 | /* 22625 */ "G_FCEIL\0" |
| 45460 | /* 22633 */ "AESDEC256KL\0" |
| 45461 | /* 22645 */ "AESENC256KL\0" |
| 45462 | /* 22657 */ "AESDECWIDE256KL\0" |
| 45463 | /* 22673 */ "AESENCWIDE256KL\0" |
| 45464 | /* 22689 */ "AESDEC128KL\0" |
| 45465 | /* 22701 */ "AESENC128KL\0" |
| 45466 | /* 22713 */ "AESDECWIDE128KL\0" |
| 45467 | /* 22729 */ "AESENCWIDE128KL\0" |
| 45468 | /* 22745 */ "TDCALL\0" |
| 45469 | /* 22752 */ "SEAMCALL\0" |
| 45470 | /* 22761 */ "VMMCALL\0" |
| 45471 | /* 22769 */ "VMCALL\0" |
| 45472 | /* 22776 */ "SYSCALL\0" |
| 45473 | /* 22784 */ "PATCHABLE_TAIL_CALL\0" |
| 45474 | /* 22804 */ "PATCHABLE_TYPED_EVENT_CALL\0" |
| 45475 | /* 22831 */ "PATCHABLE_EVENT_CALL\0" |
| 45476 | /* 22852 */ "FENTRY_CALL\0" |
| 45477 | /* 22864 */ "VZEROALL\0" |
| 45478 | /* 22873 */ "KILL\0" |
| 45479 | /* 22878 */ "G_CONSTANT_POOL\0" |
| 45480 | /* 22894 */ "NOOPL\0" |
| 45481 | /* 22900 */ "SCASL\0" |
| 45482 | /* 22906 */ "LODSL\0" |
| 45483 | /* 22912 */ "INSL\0" |
| 45484 | /* 22917 */ "STOSL\0" |
| 45485 | /* 22923 */ "CMPSL\0" |
| 45486 | /* 22929 */ "OUTSL\0" |
| 45487 | /* 22935 */ "MOVSL\0" |
| 45488 | /* 22941 */ "G_ROTL\0" |
| 45489 | /* 22948 */ "G_VECREDUCE_FMUL\0" |
| 45490 | /* 22965 */ "G_FMUL\0" |
| 45491 | /* 22972 */ "G_VECREDUCE_SEQ_FMUL\0" |
| 45492 | /* 22993 */ "G_STRICT_FMUL\0" |
| 45493 | /* 23007 */ "MONTMUL\0" |
| 45494 | /* 23015 */ "G_VECREDUCE_MUL\0" |
| 45495 | /* 23031 */ "G_MUL\0" |
| 45496 | /* 23037 */ "FP80_TO_INT32_IN_MEM\0" |
| 45497 | /* 23058 */ "FP32_TO_INT32_IN_MEM\0" |
| 45498 | /* 23079 */ "FP64_TO_INT32_IN_MEM\0" |
| 45499 | /* 23100 */ "FP80_TO_INT64_IN_MEM\0" |
| 45500 | /* 23121 */ "FP32_TO_INT64_IN_MEM\0" |
| 45501 | /* 23142 */ "FP64_TO_INT64_IN_MEM\0" |
| 45502 | /* 23163 */ "FP80_TO_INT16_IN_MEM\0" |
| 45503 | /* 23184 */ "FP32_TO_INT16_IN_MEM\0" |
| 45504 | /* 23205 */ "FP64_TO_INT16_IN_MEM\0" |
| 45505 | /* 23226 */ "G_FREM\0" |
| 45506 | /* 23233 */ "G_STRICT_FREM\0" |
| 45507 | /* 23247 */ "FPREM\0" |
| 45508 | /* 23253 */ "G_SREM\0" |
| 45509 | /* 23260 */ "G_UREM\0" |
| 45510 | /* 23267 */ "G_SDIVREM\0" |
| 45511 | /* 23277 */ "G_UDIVREM\0" |
| 45512 | /* 23287 */ "SEH_SaveXMM\0" |
| 45513 | /* 23299 */ "INLINEASM\0" |
| 45514 | /* 23309 */ "RSM\0" |
| 45515 | /* 23313 */ "G_VECREDUCE_FMINIMUM\0" |
| 45516 | /* 23334 */ "G_FMINIMUM\0" |
| 45517 | /* 23345 */ "G_VECREDUCE_FMAXIMUM\0" |
| 45518 | /* 23366 */ "G_FMAXIMUM\0" |
| 45519 | /* 23377 */ "G_FMINNUM\0" |
| 45520 | /* 23387 */ "G_FMAXNUM\0" |
| 45521 | /* 23397 */ "G_FATAN\0" |
| 45522 | /* 23405 */ "FPATAN\0" |
| 45523 | /* 23412 */ "G_FTAN\0" |
| 45524 | /* 23419 */ "FPTAN\0" |
| 45525 | /* 23425 */ "G_INTRINSIC_ROUNDEVEN\0" |
| 45526 | /* 23447 */ "G_ASSERT_ALIGN\0" |
| 45527 | /* 23462 */ "G_FCOPYSIGN\0" |
| 45528 | /* 23474 */ "XBEGIN\0" |
| 45529 | /* 23481 */ "G_VECREDUCE_FMIN\0" |
| 45530 | /* 23498 */ "G_ATOMICRMW_FMIN\0" |
| 45531 | /* 23515 */ "G_VECREDUCE_SMIN\0" |
| 45532 | /* 23532 */ "G_SMIN\0" |
| 45533 | /* 23539 */ "G_VECREDUCE_UMIN\0" |
| 45534 | /* 23556 */ "G_UMIN\0" |
| 45535 | /* 23563 */ "G_ATOMICRMW_UMIN\0" |
| 45536 | /* 23580 */ "G_ATOMICRMW_MIN\0" |
| 45537 | /* 23596 */ "G_FASIN\0" |
| 45538 | /* 23604 */ "G_FSIN\0" |
| 45539 | /* 23611 */ "CFI_INSTRUCTION\0" |
| 45540 | /* 23627 */ "VMXON\0" |
| 45541 | /* 23633 */ "EH_RETURN\0" |
| 45542 | /* 23643 */ "G_SSUBO\0" |
| 45543 | /* 23651 */ "G_USUBO\0" |
| 45544 | /* 23659 */ "G_SADDO\0" |
| 45545 | /* 23667 */ "G_UADDO\0" |
| 45546 | /* 23675 */ "JUMP_TABLE_DEBUG_INFO\0" |
| 45547 | /* 23697 */ "G_SMULO\0" |
| 45548 | /* 23705 */ "G_UMULO\0" |
| 45549 | /* 23713 */ "CQO\0" |
| 45550 | /* 23717 */ "G_BZERO\0" |
| 45551 | /* 23725 */ "PTILEZERO\0" |
| 45552 | /* 23735 */ "INTO\0" |
| 45553 | /* 23740 */ "PUSH2P\0" |
| 45554 | /* 23747 */ "POP2P\0" |
| 45555 | /* 23753 */ "STACKMAP\0" |
| 45556 | /* 23762 */ "G_DEBUGTRAP\0" |
| 45557 | /* 23774 */ "G_UBSANTRAP\0" |
| 45558 | /* 23786 */ "G_TRAP\0" |
| 45559 | /* 23793 */ "G_ATOMICRMW_UDEC_WRAP\0" |
| 45560 | /* 23815 */ "G_ATOMICRMW_UINC_WRAP\0" |
| 45561 | /* 23837 */ "G_BSWAP\0" |
| 45562 | /* 23845 */ "RDTSCP\0" |
| 45563 | /* 23852 */ "FFREEP\0" |
| 45564 | /* 23859 */ "G_SITOFP\0" |
| 45565 | /* 23868 */ "G_UITOFP\0" |
| 45566 | /* 23877 */ "XOR32_FP\0" |
| 45567 | /* 23886 */ "XOR64_FP\0" |
| 45568 | /* 23895 */ "G_FCMP\0" |
| 45569 | /* 23902 */ "G_ICMP\0" |
| 45570 | /* 23909 */ "G_SCMP\0" |
| 45571 | /* 23916 */ "G_UCMP\0" |
| 45572 | /* 23923 */ "FNOP\0" |
| 45573 | /* 23928 */ "CONVERGENCECTRL_LOOP\0" |
| 45574 | /* 23949 */ "NOOP\0" |
| 45575 | /* 23954 */ "G_CTPOP\0" |
| 45576 | /* 23962 */ "PATCHABLE_OP\0" |
| 45577 | /* 23975 */ "FAULTING_OP\0" |
| 45578 | /* 23987 */ "FCOMPP\0" |
| 45579 | /* 23994 */ "RSTORSSP\0" |
| 45580 | /* 24003 */ "SAVEPREVSSP\0" |
| 45581 | /* 24015 */ "FDECSTP\0" |
| 45582 | /* 24023 */ "FINCSTP\0" |
| 45583 | /* 24031 */ "PREALLOCATED_SETUP\0" |
| 45584 | /* 24050 */ "G_FLDEXP\0" |
| 45585 | /* 24059 */ "G_STRICT_FLDEXP\0" |
| 45586 | /* 24075 */ "G_FEXP\0" |
| 45587 | /* 24082 */ "G_FFREXP\0" |
| 45588 | /* 24091 */ "KSET0Q\0" |
| 45589 | /* 24098 */ "KSET1Q\0" |
| 45590 | /* 24105 */ "CDQ\0" |
| 45591 | /* 24109 */ "NOOPQ\0" |
| 45592 | /* 24115 */ "INCSSPQ\0" |
| 45593 | /* 24123 */ "RDSSPQ\0" |
| 45594 | /* 24130 */ "EXTRQ\0" |
| 45595 | /* 24136 */ "SCASQ\0" |
| 45596 | /* 24142 */ "LODSQ\0" |
| 45597 | /* 24148 */ "STOSQ\0" |
| 45598 | /* 24154 */ "CMPSQ\0" |
| 45599 | /* 24160 */ "WRSSQ\0" |
| 45600 | /* 24166 */ "WRUSSQ\0" |
| 45601 | /* 24173 */ "MOVSQ\0" |
| 45602 | /* 24179 */ "INSERTQ\0" |
| 45603 | /* 24187 */ "MMX_MASKMOVQ\0" |
| 45604 | /* 24200 */ "G_BR\0" |
| 45605 | /* 24205 */ "INLINEASM_BR\0" |
| 45606 | /* 24218 */ "G_BLOCK_ADDR\0" |
| 45607 | /* 24231 */ "MEMBARRIER\0" |
| 45608 | /* 24242 */ "G_CONSTANT_FOLD_BARRIER\0" |
| 45609 | /* 24266 */ "CALL64pcrel32_RVMARKER\0" |
| 45610 | /* 24289 */ "CALL64m_RVMARKER\0" |
| 45611 | /* 24306 */ "CALL64r_RVMARKER\0" |
| 45612 | /* 24323 */ "VZEROUPPER\0" |
| 45613 | /* 24334 */ "SYSENTER\0" |
| 45614 | /* 24343 */ "PATCHABLE_FUNCTION_ENTER\0" |
| 45615 | /* 24368 */ "G_READCYCLECOUNTER\0" |
| 45616 | /* 24387 */ "G_READSTEADYCOUNTER\0" |
| 45617 | /* 24407 */ "G_READ_REGISTER\0" |
| 45618 | /* 24423 */ "G_WRITE_REGISTER\0" |
| 45619 | /* 24440 */ "G_ASHR\0" |
| 45620 | /* 24447 */ "G_FSHR\0" |
| 45621 | /* 24454 */ "G_LSHR\0" |
| 45622 | /* 24461 */ "CONVERGENCECTRL_ANCHOR\0" |
| 45623 | /* 24484 */ "G_FFLOOR\0" |
| 45624 | /* 24493 */ "G_EXTRACT_SUBVECTOR\0" |
| 45625 | /* 24513 */ "G_INSERT_SUBVECTOR\0" |
| 45626 | /* 24532 */ "G_BUILD_VECTOR\0" |
| 45627 | /* 24547 */ "G_SHUFFLE_VECTOR\0" |
| 45628 | /* 24564 */ "G_SPLAT_VECTOR\0" |
| 45629 | /* 24579 */ "FXRSTOR\0" |
| 45630 | /* 24587 */ "G_VECREDUCE_XOR\0" |
| 45631 | /* 24603 */ "G_XOR\0" |
| 45632 | /* 24609 */ "G_ATOMICRMW_XOR\0" |
| 45633 | /* 24625 */ "G_VECREDUCE_OR\0" |
| 45634 | /* 24640 */ "G_OR\0" |
| 45635 | /* 24645 */ "G_ATOMICRMW_OR\0" |
| 45636 | /* 24660 */ "VLDMXCSR\0" |
| 45637 | /* 24669 */ "VSTMXCSR\0" |
| 45638 | /* 24678 */ "RDMSR\0" |
| 45639 | /* 24684 */ "WRMSR\0" |
| 45640 | /* 24690 */ "XCRYPTCTR\0" |
| 45641 | /* 24700 */ "G_ROTR\0" |
| 45642 | /* 24707 */ "G_INTTOPTR\0" |
| 45643 | /* 24718 */ "AAS\0" |
| 45644 | /* 24722 */ "DAS\0" |
| 45645 | /* 24726 */ "G_FABS\0" |
| 45646 | /* 24733 */ "G_ABS\0" |
| 45647 | /* 24739 */ "AVX1_SETALLONES\0" |
| 45648 | /* 24755 */ "AVX512_512_SETALLONES\0" |
| 45649 | /* 24777 */ "AVX2_SETALLONES\0" |
| 45650 | /* 24793 */ "V_SETALLONES\0" |
| 45651 | /* 24806 */ "G_UNMERGE_VALUES\0" |
| 45652 | /* 24823 */ "G_MERGE_VALUES\0" |
| 45653 | /* 24838 */ "XSAVES\0" |
| 45654 | /* 24845 */ "VASTART_SAVE_XMM_REGS\0" |
| 45655 | /* 24867 */ "SWAPGS\0" |
| 45656 | /* 24874 */ "ENCLS\0" |
| 45657 | /* 24880 */ "FEMMS\0" |
| 45658 | /* 24886 */ "MMX_EMMS\0" |
| 45659 | /* 24895 */ "WRMSRNS\0" |
| 45660 | /* 24903 */ "G_FACOS\0" |
| 45661 | /* 24911 */ "G_FCOS\0" |
| 45662 | /* 24918 */ "FSINCOS\0" |
| 45663 | /* 24926 */ "PTDPBF16PS\0" |
| 45664 | /* 24937 */ "PTCMMRLFP16PS\0" |
| 45665 | /* 24951 */ "PTCMMIMFP16PS\0" |
| 45666 | /* 24965 */ "PTDPFP16PS\0" |
| 45667 | /* 24976 */ "SEAMOPS\0" |
| 45668 | /* 24984 */ "G_CONCAT_VECTORS\0" |
| 45669 | /* 25001 */ "XRSTORS\0" |
| 45670 | /* 25009 */ "AVX512_FsFLD0SS\0" |
| 45671 | /* 25025 */ "COPY_TO_REGCLASS\0" |
| 45672 | /* 25042 */ "G_IS_FPCLASS\0" |
| 45673 | /* 25055 */ "ASAN_CHECK_MEMACCESS\0" |
| 45674 | /* 25076 */ "G_ATOMIC_CMPXCHG_WITH_SUCCESS\0" |
| 45675 | /* 25106 */ "G_VECTOR_COMPRESS\0" |
| 45676 | /* 25124 */ "MOVNTSS\0" |
| 45677 | /* 25132 */ "G_INTRINSIC_W_SIDE_EFFECTS\0" |
| 45678 | /* 25159 */ "G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS\0" |
| 45679 | /* 25197 */ "ERETS\0" |
| 45680 | /* 25203 */ "CLTS\0" |
| 45681 | /* 25208 */ "FLDL2T\0" |
| 45682 | /* 25215 */ "XLAT\0" |
| 45683 | /* 25220 */ "G_SSUBSAT\0" |
| 45684 | /* 25230 */ "G_USUBSAT\0" |
| 45685 | /* 25240 */ "G_SADDSAT\0" |
| 45686 | /* 25250 */ "G_UADDSAT\0" |
| 45687 | /* 25260 */ "G_SSHLSAT\0" |
| 45688 | /* 25270 */ "G_USHLSAT\0" |
| 45689 | /* 25280 */ "G_SMULFIXSAT\0" |
| 45690 | /* 25293 */ "G_UMULFIXSAT\0" |
| 45691 | /* 25306 */ "G_SDIVFIXSAT\0" |
| 45692 | /* 25319 */ "G_UDIVFIXSAT\0" |
| 45693 | /* 25332 */ "G_EXTRACT\0" |
| 45694 | /* 25342 */ "FXTRACT\0" |
| 45695 | /* 25350 */ "G_SELECT\0" |
| 45696 | /* 25359 */ "G_BRINDIRECT\0" |
| 45697 | /* 25372 */ "CATCHRET\0" |
| 45698 | /* 25381 */ "UIRET\0" |
| 45699 | /* 25387 */ "SEAMRET\0" |
| 45700 | /* 25395 */ "CLEANUPRET\0" |
| 45701 | /* 25406 */ "SYSRET\0" |
| 45702 | /* 25413 */ "PATCHABLE_RET\0" |
| 45703 | /* 25427 */ "MORESTACK_RET\0" |
| 45704 | /* 25441 */ "HRESET\0" |
| 45705 | /* 25448 */ "G_MEMSET\0" |
| 45706 | /* 25457 */ "UMWAIT\0" |
| 45707 | /* 25464 */ "SKINIT\0" |
| 45708 | /* 25471 */ "FNINIT\0" |
| 45709 | /* 25478 */ "SYSEXIT\0" |
| 45710 | /* 25486 */ "PATCHABLE_FUNCTION_EXIT\0" |
| 45711 | /* 25510 */ "G_BRJT\0" |
| 45712 | /* 25517 */ "G_EXTRACT_VECTOR_ELT\0" |
| 45713 | /* 25538 */ "G_INSERT_VECTOR_ELT\0" |
| 45714 | /* 25558 */ "HLT\0" |
| 45715 | /* 25562 */ "G_FCONSTANT\0" |
| 45716 | /* 25574 */ "G_CONSTANT\0" |
| 45717 | /* 25585 */ "G_INTRINSIC_CONVERGENT\0" |
| 45718 | /* 25608 */ "FRNDINT\0" |
| 45719 | /* 25616 */ "STATEPOINT\0" |
| 45720 | /* 25627 */ "PATCHPOINT\0" |
| 45721 | /* 25638 */ "G_PTRTOINT\0" |
| 45722 | /* 25649 */ "G_FRINT\0" |
| 45723 | /* 25657 */ "G_INTRINSIC_LLRINT\0" |
| 45724 | /* 25676 */ "G_INTRINSIC_LRINT\0" |
| 45725 | /* 25694 */ "G_FNEARBYINT\0" |
| 45726 | /* 25707 */ "CALL32m_NT\0" |
| 45727 | /* 25718 */ "JMP32m_NT\0" |
| 45728 | /* 25728 */ "CALL64m_NT\0" |
| 45729 | /* 25739 */ "JMP64m_NT\0" |
| 45730 | /* 25749 */ "CALL16m_NT\0" |
| 45731 | /* 25760 */ "JMP16m_NT\0" |
| 45732 | /* 25770 */ "CALL32r_NT\0" |
| 45733 | /* 25781 */ "JMP32r_NT\0" |
| 45734 | /* 25791 */ "CALL64r_NT\0" |
| 45735 | /* 25802 */ "JMP64r_NT\0" |
| 45736 | /* 25812 */ "CALL16r_NT\0" |
| 45737 | /* 25823 */ "JMP16r_NT\0" |
| 45738 | /* 25833 */ "XSAVEOPT\0" |
| 45739 | /* 25842 */ "CLFLUSHOPT\0" |
| 45740 | /* 25853 */ "G_VASTART\0" |
| 45741 | /* 25863 */ "LIFETIME_START\0" |
| 45742 | /* 25878 */ "G_INVOKE_REGION_START\0" |
| 45743 | /* 25900 */ "G_INSERT\0" |
| 45744 | /* 25909 */ "XABORT\0" |
| 45745 | /* 25916 */ "G_FSQRT\0" |
| 45746 | /* 25924 */ "G_STRICT_FSQRT\0" |
| 45747 | /* 25939 */ "G_BITCAST\0" |
| 45748 | /* 25949 */ "G_ADDRSPACE_CAST\0" |
| 45749 | /* 25966 */ "XTEST\0" |
| 45750 | /* 25972 */ "RDMSRLIST\0" |
| 45751 | /* 25982 */ "WRMSRLIST\0" |
| 45752 | /* 25992 */ "DBG_VALUE_LIST\0" |
| 45753 | /* 26007 */ "RMPADJUST\0" |
| 45754 | /* 26017 */ "G_FPEXT\0" |
| 45755 | /* 26025 */ "G_SEXT\0" |
| 45756 | /* 26032 */ "G_ASSERT_SEXT\0" |
| 45757 | /* 26046 */ "G_ANYEXT\0" |
| 45758 | /* 26055 */ "G_ZEXT\0" |
| 45759 | /* 26062 */ "G_ASSERT_ZEXT\0" |
| 45760 | /* 26076 */ "ENCLU\0" |
| 45761 | /* 26082 */ "VMASKMOVDQU\0" |
| 45762 | /* 26094 */ "RDPRU\0" |
| 45763 | /* 26100 */ "ERETU\0" |
| 45764 | /* 26106 */ "PTILELOADDT1V\0" |
| 45765 | /* 26120 */ "XGETBV\0" |
| 45766 | /* 26127 */ "XSETBV\0" |
| 45767 | /* 26134 */ "PTILELOADDV\0" |
| 45768 | /* 26146 */ "PTILESTOREDV\0" |
| 45769 | /* 26159 */ "PTDPBSSDV\0" |
| 45770 | /* 26169 */ "PTDPBUSDV\0" |
| 45771 | /* 26179 */ "PTDPBSUDV\0" |
| 45772 | /* 26189 */ "PTDPBUUDV\0" |
| 45773 | /* 26199 */ "SUB32rr_NF_ND_REV\0" |
| 45774 | /* 26217 */ "ADD32rr_NF_ND_REV\0" |
| 45775 | /* 26235 */ "AND32rr_NF_ND_REV\0" |
| 45776 | /* 26253 */ "XOR32rr_NF_ND_REV\0" |
| 45777 | /* 26271 */ "SUB64rr_NF_ND_REV\0" |
| 45778 | /* 26289 */ "ADD64rr_NF_ND_REV\0" |
| 45779 | /* 26307 */ "AND64rr_NF_ND_REV\0" |
| 45780 | /* 26325 */ "XOR64rr_NF_ND_REV\0" |
| 45781 | /* 26343 */ "SUB16rr_NF_ND_REV\0" |
| 45782 | /* 26361 */ "ADD16rr_NF_ND_REV\0" |
| 45783 | /* 26379 */ "AND16rr_NF_ND_REV\0" |
| 45784 | /* 26397 */ "XOR16rr_NF_ND_REV\0" |
| 45785 | /* 26415 */ "SUB8rr_NF_ND_REV\0" |
| 45786 | /* 26432 */ "ADD8rr_NF_ND_REV\0" |
| 45787 | /* 26449 */ "AND8rr_NF_ND_REV\0" |
| 45788 | /* 26466 */ "XOR8rr_NF_ND_REV\0" |
| 45789 | /* 26483 */ "SBB32rr_ND_REV\0" |
| 45790 | /* 26498 */ "SUB32rr_ND_REV\0" |
| 45791 | /* 26513 */ "ADC32rr_ND_REV\0" |
| 45792 | /* 26528 */ "ADD32rr_ND_REV\0" |
| 45793 | /* 26543 */ "AND32rr_ND_REV\0" |
| 45794 | /* 26558 */ "XOR32rr_ND_REV\0" |
| 45795 | /* 26573 */ "SBB64rr_ND_REV\0" |
| 45796 | /* 26588 */ "SUB64rr_ND_REV\0" |
| 45797 | /* 26603 */ "ADC64rr_ND_REV\0" |
| 45798 | /* 26618 */ "ADD64rr_ND_REV\0" |
| 45799 | /* 26633 */ "AND64rr_ND_REV\0" |
| 45800 | /* 26648 */ "XOR64rr_ND_REV\0" |
| 45801 | /* 26663 */ "SBB16rr_ND_REV\0" |
| 45802 | /* 26678 */ "SUB16rr_ND_REV\0" |
| 45803 | /* 26693 */ "ADC16rr_ND_REV\0" |
| 45804 | /* 26708 */ "ADD16rr_ND_REV\0" |
| 45805 | /* 26723 */ "AND16rr_ND_REV\0" |
| 45806 | /* 26738 */ "XOR16rr_ND_REV\0" |
| 45807 | /* 26753 */ "SBB8rr_ND_REV\0" |
| 45808 | /* 26767 */ "SUB8rr_ND_REV\0" |
| 45809 | /* 26781 */ "ADC8rr_ND_REV\0" |
| 45810 | /* 26795 */ "ADD8rr_ND_REV\0" |
| 45811 | /* 26809 */ "AND8rr_ND_REV\0" |
| 45812 | /* 26823 */ "XOR8rr_ND_REV\0" |
| 45813 | /* 26837 */ "SUB32rr_NF_REV\0" |
| 45814 | /* 26852 */ "ADD32rr_NF_REV\0" |
| 45815 | /* 26867 */ "AND32rr_NF_REV\0" |
| 45816 | /* 26882 */ "XOR32rr_NF_REV\0" |
| 45817 | /* 26897 */ "SUB64rr_NF_REV\0" |
| 45818 | /* 26912 */ "ADD64rr_NF_REV\0" |
| 45819 | /* 26927 */ "AND64rr_NF_REV\0" |
| 45820 | /* 26942 */ "XOR64rr_NF_REV\0" |
| 45821 | /* 26957 */ "SUB16rr_NF_REV\0" |
| 45822 | /* 26972 */ "ADD16rr_NF_REV\0" |
| 45823 | /* 26987 */ "AND16rr_NF_REV\0" |
| 45824 | /* 27002 */ "XOR16rr_NF_REV\0" |
| 45825 | /* 27017 */ "SUB8rr_NF_REV\0" |
| 45826 | /* 27031 */ "ADD8rr_NF_REV\0" |
| 45827 | /* 27045 */ "AND8rr_NF_REV\0" |
| 45828 | /* 27059 */ "XOR8rr_NF_REV\0" |
| 45829 | /* 27073 */ "SBB32rr_EVEX_REV\0" |
| 45830 | /* 27090 */ "SUB32rr_EVEX_REV\0" |
| 45831 | /* 27107 */ "ADC32rr_EVEX_REV\0" |
| 45832 | /* 27124 */ "ADD32rr_EVEX_REV\0" |
| 45833 | /* 27141 */ "AND32rr_EVEX_REV\0" |
| 45834 | /* 27158 */ "XOR32rr_EVEX_REV\0" |
| 45835 | /* 27175 */ "SBB64rr_EVEX_REV\0" |
| 45836 | /* 27192 */ "SUB64rr_EVEX_REV\0" |
| 45837 | /* 27209 */ "ADC64rr_EVEX_REV\0" |
| 45838 | /* 27226 */ "ADD64rr_EVEX_REV\0" |
| 45839 | /* 27243 */ "AND64rr_EVEX_REV\0" |
| 45840 | /* 27260 */ "XOR64rr_EVEX_REV\0" |
| 45841 | /* 27277 */ "SBB16rr_EVEX_REV\0" |
| 45842 | /* 27294 */ "SUB16rr_EVEX_REV\0" |
| 45843 | /* 27311 */ "ADC16rr_EVEX_REV\0" |
| 45844 | /* 27328 */ "ADD16rr_EVEX_REV\0" |
| 45845 | /* 27345 */ "AND16rr_EVEX_REV\0" |
| 45846 | /* 27362 */ "XOR16rr_EVEX_REV\0" |
| 45847 | /* 27379 */ "SBB8rr_EVEX_REV\0" |
| 45848 | /* 27395 */ "SUB8rr_EVEX_REV\0" |
| 45849 | /* 27411 */ "ADC8rr_EVEX_REV\0" |
| 45850 | /* 27427 */ "ADD8rr_EVEX_REV\0" |
| 45851 | /* 27443 */ "AND8rr_EVEX_REV\0" |
| 45852 | /* 27459 */ "XOR8rr_EVEX_REV\0" |
| 45853 | /* 27475 */ "VMOVDQA32Z256rrk_REV\0" |
| 45854 | /* 27496 */ "VMOVDQU32Z256rrk_REV\0" |
| 45855 | /* 27517 */ "VMOVDQA64Z256rrk_REV\0" |
| 45856 | /* 27538 */ "VMOVDQU64Z256rrk_REV\0" |
| 45857 | /* 27559 */ "VMOVDQU16Z256rrk_REV\0" |
| 45858 | /* 27580 */ "VMOVDQU8Z256rrk_REV\0" |
| 45859 | /* 27600 */ "VMOVAPDZ256rrk_REV\0" |
| 45860 | /* 27619 */ "VMOVUPDZ256rrk_REV\0" |
| 45861 | /* 27638 */ "VMOVAPSZ256rrk_REV\0" |
| 45862 | /* 27657 */ "VMOVUPSZ256rrk_REV\0" |
| 45863 | /* 27676 */ "VMOVDQA32Z128rrk_REV\0" |
| 45864 | /* 27697 */ "VMOVDQU32Z128rrk_REV\0" |
| 45865 | /* 27718 */ "VMOVDQA64Z128rrk_REV\0" |
| 45866 | /* 27739 */ "VMOVDQU64Z128rrk_REV\0" |
| 45867 | /* 27760 */ "VMOVDQU16Z128rrk_REV\0" |
| 45868 | /* 27781 */ "VMOVDQU8Z128rrk_REV\0" |
| 45869 | /* 27801 */ "VMOVAPDZ128rrk_REV\0" |
| 45870 | /* 27820 */ "VMOVUPDZ128rrk_REV\0" |
| 45871 | /* 27839 */ "VMOVAPSZ128rrk_REV\0" |
| 45872 | /* 27858 */ "VMOVUPSZ128rrk_REV\0" |
| 45873 | /* 27877 */ "VMOVDQA32Zrrk_REV\0" |
| 45874 | /* 27895 */ "VMOVDQU32Zrrk_REV\0" |
| 45875 | /* 27913 */ "VMOVDQA64Zrrk_REV\0" |
| 45876 | /* 27931 */ "VMOVDQU64Zrrk_REV\0" |
| 45877 | /* 27949 */ "VMOVDQU16Zrrk_REV\0" |
| 45878 | /* 27967 */ "VMOVDQU8Zrrk_REV\0" |
| 45879 | /* 27984 */ "VMOVAPDZrrk_REV\0" |
| 45880 | /* 28000 */ "VMOVUPDZrrk_REV\0" |
| 45881 | /* 28016 */ "VMOVSDZrrk_REV\0" |
| 45882 | /* 28031 */ "VMOVSHZrrk_REV\0" |
| 45883 | /* 28046 */ "VMOVAPSZrrk_REV\0" |
| 45884 | /* 28062 */ "VMOVUPSZrrk_REV\0" |
| 45885 | /* 28078 */ "VMOVSSZrrk_REV\0" |
| 45886 | /* 28093 */ "SBB32rr_REV\0" |
| 45887 | /* 28105 */ "SUB32rr_REV\0" |
| 45888 | /* 28117 */ "ADC32rr_REV\0" |
| 45889 | /* 28129 */ "ADD32rr_REV\0" |
| 45890 | /* 28141 */ "AND32rr_REV\0" |
| 45891 | /* 28153 */ "MOVBE32rr_REV\0" |
| 45892 | /* 28167 */ "CCMP32rr_REV\0" |
| 45893 | /* 28180 */ "XOR32rr_REV\0" |
| 45894 | /* 28192 */ "CFCMOV32rr_REV\0" |
| 45895 | /* 28207 */ "SBB64rr_REV\0" |
| 45896 | /* 28219 */ "SUB64rr_REV\0" |
| 45897 | /* 28231 */ "ADC64rr_REV\0" |
| 45898 | /* 28243 */ "ADD64rr_REV\0" |
| 45899 | /* 28255 */ "AND64rr_REV\0" |
| 45900 | /* 28267 */ "MOVBE64rr_REV\0" |
| 45901 | /* 28281 */ "CCMP64rr_REV\0" |
| 45902 | /* 28294 */ "MMX_MOVQ64rr_REV\0" |
| 45903 | /* 28311 */ "XOR64rr_REV\0" |
| 45904 | /* 28323 */ "CFCMOV64rr_REV\0" |
| 45905 | /* 28338 */ "VFMADDSUBPD4rr_REV\0" |
| 45906 | /* 28357 */ "VFMSUBPD4rr_REV\0" |
| 45907 | /* 28373 */ "VFNMSUBPD4rr_REV\0" |
| 45908 | /* 28390 */ "VFMSUBADDPD4rr_REV\0" |
| 45909 | /* 28409 */ "VFMADDPD4rr_REV\0" |
| 45910 | /* 28425 */ "VFNMADDPD4rr_REV\0" |
| 45911 | /* 28442 */ "VFMSUBSD4rr_REV\0" |
| 45912 | /* 28458 */ "VFNMSUBSD4rr_REV\0" |
| 45913 | /* 28475 */ "VFMADDSD4rr_REV\0" |
| 45914 | /* 28491 */ "VFNMADDSD4rr_REV\0" |
| 45915 | /* 28508 */ "VFMADDSUBPS4rr_REV\0" |
| 45916 | /* 28527 */ "VFMSUBPS4rr_REV\0" |
| 45917 | /* 28543 */ "VFNMSUBPS4rr_REV\0" |
| 45918 | /* 28560 */ "VFMSUBADDPS4rr_REV\0" |
| 45919 | /* 28579 */ "VFMADDPS4rr_REV\0" |
| 45920 | /* 28595 */ "VFNMADDPS4rr_REV\0" |
| 45921 | /* 28612 */ "VFMSUBSS4rr_REV\0" |
| 45922 | /* 28628 */ "VFNMSUBSS4rr_REV\0" |
| 45923 | /* 28645 */ "VFMADDSS4rr_REV\0" |
| 45924 | /* 28661 */ "VFNMADDSS4rr_REV\0" |
| 45925 | /* 28678 */ "SBB16rr_REV\0" |
| 45926 | /* 28690 */ "SUB16rr_REV\0" |
| 45927 | /* 28702 */ "ADC16rr_REV\0" |
| 45928 | /* 28714 */ "ADD16rr_REV\0" |
| 45929 | /* 28726 */ "AND16rr_REV\0" |
| 45930 | /* 28738 */ "MOVBE16rr_REV\0" |
| 45931 | /* 28752 */ "CCMP16rr_REV\0" |
| 45932 | /* 28765 */ "XOR16rr_REV\0" |
| 45933 | /* 28777 */ "CFCMOV16rr_REV\0" |
| 45934 | /* 28792 */ "VMOVDQA32Z256rr_REV\0" |
| 45935 | /* 28812 */ "VMOVDQU32Z256rr_REV\0" |
| 45936 | /* 28832 */ "VMOVDQA64Z256rr_REV\0" |
| 45937 | /* 28852 */ "VMOVDQU64Z256rr_REV\0" |
| 45938 | /* 28872 */ "VMOVDQU16Z256rr_REV\0" |
| 45939 | /* 28892 */ "VMOVDQU8Z256rr_REV\0" |
| 45940 | /* 28911 */ "VMOVAPDZ256rr_REV\0" |
| 45941 | /* 28929 */ "VMOVUPDZ256rr_REV\0" |
| 45942 | /* 28947 */ "VMOVAPSZ256rr_REV\0" |
| 45943 | /* 28965 */ "VMOVUPSZ256rr_REV\0" |
| 45944 | /* 28983 */ "VMOVDQA32Z128rr_REV\0" |
| 45945 | /* 29003 */ "VMOVDQU32Z128rr_REV\0" |
| 45946 | /* 29023 */ "VMOVDQA64Z128rr_REV\0" |
| 45947 | /* 29043 */ "VMOVDQU64Z128rr_REV\0" |
| 45948 | /* 29063 */ "VMOVDQU16Z128rr_REV\0" |
| 45949 | /* 29083 */ "VMOVDQU8Z128rr_REV\0" |
| 45950 | /* 29102 */ "VMOVAPDZ128rr_REV\0" |
| 45951 | /* 29120 */ "VMOVUPDZ128rr_REV\0" |
| 45952 | /* 29138 */ "VMOVAPSZ128rr_REV\0" |
| 45953 | /* 29156 */ "VMOVUPSZ128rr_REV\0" |
| 45954 | /* 29174 */ "SBB8rr_REV\0" |
| 45955 | /* 29185 */ "SUB8rr_REV\0" |
| 45956 | /* 29196 */ "ADC8rr_REV\0" |
| 45957 | /* 29207 */ "ADD8rr_REV\0" |
| 45958 | /* 29218 */ "AND8rr_REV\0" |
| 45959 | /* 29229 */ "CCMP8rr_REV\0" |
| 45960 | /* 29241 */ "XOR8rr_REV\0" |
| 45961 | /* 29252 */ "MOV8rr_REV\0" |
| 45962 | /* 29263 */ "VMOVDQArr_REV\0" |
| 45963 | /* 29277 */ "VPSHABrr_REV\0" |
| 45964 | /* 29290 */ "VPSHLBrr_REV\0" |
| 45965 | /* 29303 */ "VPROTBrr_REV\0" |
| 45966 | /* 29316 */ "VPSHADrr_REV\0" |
| 45967 | /* 29329 */ "VPSHLDrr_REV\0" |
| 45968 | /* 29342 */ "VPERMIL2PDrr_REV\0" |
| 45969 | /* 29359 */ "VMOVAPDrr_REV\0" |
| 45970 | /* 29373 */ "VMOVUPDrr_REV\0" |
| 45971 | /* 29387 */ "VMOVSDrr_REV\0" |
| 45972 | /* 29400 */ "VPROTDrr_REV\0" |
| 45973 | /* 29413 */ "VPSHAQrr_REV\0" |
| 45974 | /* 29426 */ "VPSHLQrr_REV\0" |
| 45975 | /* 29439 */ "VPROTQrr_REV\0" |
| 45976 | /* 29452 */ "VPERMIL2PSrr_REV\0" |
| 45977 | /* 29469 */ "VMOVAPSrr_REV\0" |
| 45978 | /* 29483 */ "VMOVUPSrr_REV\0" |
| 45979 | /* 29497 */ "VMOVSSrr_REV\0" |
| 45980 | /* 29510 */ "VMOVDQUrr_REV\0" |
| 45981 | /* 29524 */ "VPSHAWrr_REV\0" |
| 45982 | /* 29537 */ "VPSHLWrr_REV\0" |
| 45983 | /* 29550 */ "VPEXTRWrr_REV\0" |
| 45984 | /* 29564 */ "VPROTWrr_REV\0" |
| 45985 | /* 29577 */ "VFMADDSUBPD4Yrr_REV\0" |
| 45986 | /* 29597 */ "VFMSUBPD4Yrr_REV\0" |
| 45987 | /* 29614 */ "VFNMSUBPD4Yrr_REV\0" |
| 45988 | /* 29632 */ "VFMSUBADDPD4Yrr_REV\0" |
| 45989 | /* 29652 */ "VFMADDPD4Yrr_REV\0" |
| 45990 | /* 29669 */ "VFNMADDPD4Yrr_REV\0" |
| 45991 | /* 29687 */ "VFMADDSUBPS4Yrr_REV\0" |
| 45992 | /* 29707 */ "VFMSUBPS4Yrr_REV\0" |
| 45993 | /* 29724 */ "VFNMSUBPS4Yrr_REV\0" |
| 45994 | /* 29742 */ "VFMSUBADDPS4Yrr_REV\0" |
| 45995 | /* 29762 */ "VFMADDPS4Yrr_REV\0" |
| 45996 | /* 29779 */ "VFNMADDPS4Yrr_REV\0" |
| 45997 | /* 29797 */ "VMOVDQAYrr_REV\0" |
| 45998 | /* 29812 */ "VPERMIL2PDYrr_REV\0" |
| 45999 | /* 29830 */ "VMOVAPDYrr_REV\0" |
| 46000 | /* 29845 */ "VMOVUPDYrr_REV\0" |
| 46001 | /* 29860 */ "VPERMIL2PSYrr_REV\0" |
| 46002 | /* 29878 */ "VMOVAPSYrr_REV\0" |
| 46003 | /* 29893 */ "VMOVUPSYrr_REV\0" |
| 46004 | /* 29908 */ "VMOVDQUYrr_REV\0" |
| 46005 | /* 29923 */ "VMOVDQA32Zrr_REV\0" |
| 46006 | /* 29940 */ "VMOVDQU32Zrr_REV\0" |
| 46007 | /* 29957 */ "VMOVDQA64Zrr_REV\0" |
| 46008 | /* 29974 */ "VMOVDQU64Zrr_REV\0" |
| 46009 | /* 29991 */ "VMOVDQU16Zrr_REV\0" |
| 46010 | /* 30008 */ "VMOVDQU8Zrr_REV\0" |
| 46011 | /* 30024 */ "VMOVAPDZrr_REV\0" |
| 46012 | /* 30039 */ "VMOVUPDZrr_REV\0" |
| 46013 | /* 30054 */ "VMOVSDZrr_REV\0" |
| 46014 | /* 30068 */ "VMOVSHZrr_REV\0" |
| 46015 | /* 30082 */ "VMOVAPSZrr_REV\0" |
| 46016 | /* 30097 */ "VMOVUPSZrr_REV\0" |
| 46017 | /* 30112 */ "VMOVSSZrr_REV\0" |
| 46018 | /* 30126 */ "VPEXTRWZrr_REV\0" |
| 46019 | /* 30141 */ "VPPERMrrr_REV\0" |
| 46020 | /* 30155 */ "VPCMOVrrr_REV\0" |
| 46021 | /* 30169 */ "VPCMOVYrrr_REV\0" |
| 46022 | /* 30184 */ "VFMSUBSD4rr_Int_REV\0" |
| 46023 | /* 30204 */ "VFNMSUBSD4rr_Int_REV\0" |
| 46024 | /* 30225 */ "VFMADDSD4rr_Int_REV\0" |
| 46025 | /* 30245 */ "VFNMADDSD4rr_Int_REV\0" |
| 46026 | /* 30266 */ "VFMSUBSS4rr_Int_REV\0" |
| 46027 | /* 30286 */ "VFNMSUBSS4rr_Int_REV\0" |
| 46028 | /* 30307 */ "VFMADDSS4rr_Int_REV\0" |
| 46029 | /* 30327 */ "VFNMADDSS4rr_Int_REV\0" |
| 46030 | /* 30348 */ "VMOVDQA32Z256rrkz_REV\0" |
| 46031 | /* 30370 */ "VMOVDQU32Z256rrkz_REV\0" |
| 46032 | /* 30392 */ "VMOVDQA64Z256rrkz_REV\0" |
| 46033 | /* 30414 */ "VMOVDQU64Z256rrkz_REV\0" |
| 46034 | /* 30436 */ "VMOVDQU16Z256rrkz_REV\0" |
| 46035 | /* 30458 */ "VMOVDQU8Z256rrkz_REV\0" |
| 46036 | /* 30479 */ "VMOVAPDZ256rrkz_REV\0" |
| 46037 | /* 30499 */ "VMOVUPDZ256rrkz_REV\0" |
| 46038 | /* 30519 */ "VMOVAPSZ256rrkz_REV\0" |
| 46039 | /* 30539 */ "VMOVUPSZ256rrkz_REV\0" |
| 46040 | /* 30559 */ "VMOVDQA32Z128rrkz_REV\0" |
| 46041 | /* 30581 */ "VMOVDQU32Z128rrkz_REV\0" |
| 46042 | /* 30603 */ "VMOVDQA64Z128rrkz_REV\0" |
| 46043 | /* 30625 */ "VMOVDQU64Z128rrkz_REV\0" |
| 46044 | /* 30647 */ "VMOVDQU16Z128rrkz_REV\0" |
| 46045 | /* 30669 */ "VMOVDQU8Z128rrkz_REV\0" |
| 46046 | /* 30690 */ "VMOVAPDZ128rrkz_REV\0" |
| 46047 | /* 30710 */ "VMOVUPDZ128rrkz_REV\0" |
| 46048 | /* 30730 */ "VMOVAPSZ128rrkz_REV\0" |
| 46049 | /* 30750 */ "VMOVUPSZ128rrkz_REV\0" |
| 46050 | /* 30770 */ "VMOVDQA32Zrrkz_REV\0" |
| 46051 | /* 30789 */ "VMOVDQU32Zrrkz_REV\0" |
| 46052 | /* 30808 */ "VMOVDQA64Zrrkz_REV\0" |
| 46053 | /* 30827 */ "VMOVDQU64Zrrkz_REV\0" |
| 46054 | /* 30846 */ "VMOVDQU16Zrrkz_REV\0" |
| 46055 | /* 30865 */ "VMOVDQU8Zrrkz_REV\0" |
| 46056 | /* 30883 */ "VMOVAPDZrrkz_REV\0" |
| 46057 | /* 30900 */ "VMOVUPDZrrkz_REV\0" |
| 46058 | /* 30917 */ "VMOVSDZrrkz_REV\0" |
| 46059 | /* 30933 */ "VMOVSHZrrkz_REV\0" |
| 46060 | /* 30949 */ "VMOVAPSZrrkz_REV\0" |
| 46061 | /* 30966 */ "VMOVUPSZrrkz_REV\0" |
| 46062 | /* 30983 */ "VMOVSSZrrkz_REV\0" |
| 46063 | /* 30999 */ "PLDTILECFGV\0" |
| 46064 | /* 31011 */ "G_FDIV\0" |
| 46065 | /* 31018 */ "G_STRICT_FDIV\0" |
| 46066 | /* 31032 */ "G_SDIV\0" |
| 46067 | /* 31039 */ "G_UDIV\0" |
| 46068 | /* 31046 */ "ENCLV\0" |
| 46069 | /* 31052 */ "G_GET_FPENV\0" |
| 46070 | /* 31064 */ "G_RESET_FPENV\0" |
| 46071 | /* 31078 */ "G_SET_FPENV\0" |
| 46072 | /* 31090 */ "PTILEZEROV\0" |
| 46073 | /* 31101 */ "PTDPBF16PSV\0" |
| 46074 | /* 31113 */ "PTCMMRLFP16PSV\0" |
| 46075 | /* 31128 */ "PTCMMIMFP16PSV\0" |
| 46076 | /* 31143 */ "PTDPFP16PSV\0" |
| 46077 | /* 31155 */ "KSET0W\0" |
| 46078 | /* 31162 */ "KSET1W\0" |
| 46079 | /* 31169 */ "CBW\0" |
| 46080 | /* 31173 */ "PREFETCHW\0" |
| 46081 | /* 31183 */ "G_FPOW\0" |
| 46082 | /* 31190 */ "NOOPW\0" |
| 46083 | /* 31196 */ "SCASW\0" |
| 46084 | /* 31202 */ "LODSW\0" |
| 46085 | /* 31208 */ "INSW\0" |
| 46086 | /* 31213 */ "STOSW\0" |
| 46087 | /* 31219 */ "CMPSW\0" |
| 46088 | /* 31225 */ "OUTSW\0" |
| 46089 | /* 31231 */ "MOVSW\0" |
| 46090 | /* 31237 */ "CMOV_FR32X\0" |
| 46091 | /* 31248 */ "FYL2X\0" |
| 46092 | /* 31254 */ "CMOV_FR64X\0" |
| 46093 | /* 31265 */ "CMOV_FR16X\0" |
| 46094 | /* 31276 */ "CMOV_VR256X\0" |
| 46095 | /* 31288 */ "CMOV_VR128X\0" |
| 46096 | /* 31300 */ "G_VECREDUCE_FMAX\0" |
| 46097 | /* 31317 */ "G_ATOMICRMW_FMAX\0" |
| 46098 | /* 31334 */ "G_VECREDUCE_SMAX\0" |
| 46099 | /* 31351 */ "G_SMAX\0" |
| 46100 | /* 31358 */ "G_VECREDUCE_UMAX\0" |
| 46101 | /* 31375 */ "G_UMAX\0" |
| 46102 | /* 31382 */ "G_ATOMICRMW_UMAX\0" |
| 46103 | /* 31399 */ "G_ATOMICRMW_MAX\0" |
| 46104 | /* 31415 */ "LCMPXCHG16B_SAVE_RBX\0" |
| 46105 | /* 31436 */ "MWAITX_SAVE_RBX\0" |
| 46106 | /* 31452 */ "LCMPXCHG16B_NO_RBX\0" |
| 46107 | /* 31471 */ "G_FRAME_INDEX\0" |
| 46108 | /* 31485 */ "FNCLEX\0" |
| 46109 | /* 31492 */ "MOVSX32rm8_NOREX\0" |
| 46110 | /* 31509 */ "MOVZX32rm8_NOREX\0" |
| 46111 | /* 31526 */ "MOVSX32rr8_NOREX\0" |
| 46112 | /* 31543 */ "MOVZX32rr8_NOREX\0" |
| 46113 | /* 31560 */ "MOV8rm_NOREX\0" |
| 46114 | /* 31573 */ "MOV8mr_NOREX\0" |
| 46115 | /* 31586 */ "XOR8rr_NOREX\0" |
| 46116 | /* 31599 */ "MOV8rr_NOREX\0" |
| 46117 | /* 31612 */ "TAILJMPm64_REX\0" |
| 46118 | /* 31627 */ "TAILJMPr64_REX\0" |
| 46119 | /* 31642 */ "JMP64m_REX\0" |
| 46120 | /* 31653 */ "JMP64r_REX\0" |
| 46121 | /* 31664 */ "TILELOADDT1_EVEX\0" |
| 46122 | /* 31681 */ "RCL32m1_EVEX\0" |
| 46123 | /* 31694 */ "SHL32m1_EVEX\0" |
| 46124 | /* 31707 */ "ROL32m1_EVEX\0" |
| 46125 | /* 31720 */ "SAR32m1_EVEX\0" |
| 46126 | /* 31733 */ "RCR32m1_EVEX\0" |
| 46127 | /* 31746 */ "SHR32m1_EVEX\0" |
| 46128 | /* 31759 */ "ROR32m1_EVEX\0" |
| 46129 | /* 31772 */ "RCL64m1_EVEX\0" |
| 46130 | /* 31785 */ "SHL64m1_EVEX\0" |
| 46131 | /* 31798 */ "ROL64m1_EVEX\0" |
| 46132 | /* 31811 */ "SAR64m1_EVEX\0" |
| 46133 | /* 31824 */ "RCR64m1_EVEX\0" |
| 46134 | /* 31837 */ "SHR64m1_EVEX\0" |
| 46135 | /* 31850 */ "ROR64m1_EVEX\0" |
| 46136 | /* 31863 */ "RCL16m1_EVEX\0" |
| 46137 | /* 31876 */ "SHL16m1_EVEX\0" |
| 46138 | /* 31889 */ "ROL16m1_EVEX\0" |
| 46139 | /* 31902 */ "SAR16m1_EVEX\0" |
| 46140 | /* 31915 */ "RCR16m1_EVEX\0" |
| 46141 | /* 31928 */ "SHR16m1_EVEX\0" |
| 46142 | /* 31941 */ "ROR16m1_EVEX\0" |
| 46143 | /* 31954 */ "RCL8m1_EVEX\0" |
| 46144 | /* 31966 */ "SHL8m1_EVEX\0" |
| 46145 | /* 31978 */ "ROL8m1_EVEX\0" |
| 46146 | /* 31990 */ "SAR8m1_EVEX\0" |
| 46147 | /* 32002 */ "RCR8m1_EVEX\0" |
| 46148 | /* 32014 */ "SHR8m1_EVEX\0" |
| 46149 | /* 32026 */ "ROR8m1_EVEX\0" |
| 46150 | /* 32038 */ "RCL32r1_EVEX\0" |
| 46151 | /* 32051 */ "SHL32r1_EVEX\0" |
| 46152 | /* 32064 */ "ROL32r1_EVEX\0" |
| 46153 | /* 32077 */ "SAR32r1_EVEX\0" |
| 46154 | /* 32090 */ "RCR32r1_EVEX\0" |
| 46155 | /* 32103 */ "SHR32r1_EVEX\0" |
| 46156 | /* 32116 */ "ROR32r1_EVEX\0" |
| 46157 | /* 32129 */ "RCL64r1_EVEX\0" |
| 46158 | /* 32142 */ "SHL64r1_EVEX\0" |
| 46159 | /* 32155 */ "ROL64r1_EVEX\0" |
| 46160 | /* 32168 */ "SAR64r1_EVEX\0" |
| 46161 | /* 32181 */ "RCR64r1_EVEX\0" |
| 46162 | /* 32194 */ "SHR64r1_EVEX\0" |
| 46163 | /* 32207 */ "ROR64r1_EVEX\0" |
| 46164 | /* 32220 */ "RCL16r1_EVEX\0" |
| 46165 | /* 32233 */ "SHL16r1_EVEX\0" |
| 46166 | /* 32246 */ "ROL16r1_EVEX\0" |
| 46167 | /* 32259 */ "SAR16r1_EVEX\0" |
| 46168 | /* 32272 */ "RCR16r1_EVEX\0" |
| 46169 | /* 32285 */ "SHR16r1_EVEX\0" |
| 46170 | /* 32298 */ "ROR16r1_EVEX\0" |
| 46171 | /* 32311 */ "RCL8r1_EVEX\0" |
| 46172 | /* 32323 */ "SHL8r1_EVEX\0" |
| 46173 | /* 32335 */ "ROL8r1_EVEX\0" |
| 46174 | /* 32347 */ "SAR8r1_EVEX\0" |
| 46175 | /* 32359 */ "RCR8r1_EVEX\0" |
| 46176 | /* 32371 */ "SHR8r1_EVEX\0" |
| 46177 | /* 32383 */ "ROR8r1_EVEX\0" |
| 46178 | /* 32395 */ "MOVDIR64B32_EVEX\0" |
| 46179 | /* 32412 */ "ENQCMD32_EVEX\0" |
| 46180 | /* 32426 */ "MOVDIRI32_EVEX\0" |
| 46181 | /* 32441 */ "ENQCMDS32_EVEX\0" |
| 46182 | /* 32456 */ "SBB64mi32_EVEX\0" |
| 46183 | /* 32471 */ "SUB64mi32_EVEX\0" |
| 46184 | /* 32486 */ "ADC64mi32_EVEX\0" |
| 46185 | /* 32501 */ "ADD64mi32_EVEX\0" |
| 46186 | /* 32516 */ "AND64mi32_EVEX\0" |
| 46187 | /* 32531 */ "XOR64mi32_EVEX\0" |
| 46188 | /* 32546 */ "IMUL64rmi32_EVEX\0" |
| 46189 | /* 32563 */ "SBB64ri32_EVEX\0" |
| 46190 | /* 32578 */ "SUB64ri32_EVEX\0" |
| 46191 | /* 32593 */ "ADC64ri32_EVEX\0" |
| 46192 | /* 32608 */ "ADD64ri32_EVEX\0" |
| 46193 | /* 32623 */ "AND64ri32_EVEX\0" |
| 46194 | /* 32638 */ "XOR64ri32_EVEX\0" |
| 46195 | /* 32653 */ "IMUL64rri32_EVEX\0" |
| 46196 | /* 32670 */ "CRC32r32m32_EVEX\0" |
| 46197 | /* 32687 */ "CRC32r32r32_EVEX\0" |
| 46198 | /* 32704 */ "CMPCCXADDmr32_EVEX\0" |
| 46199 | /* 32723 */ "MOVDIR64B64_EVEX\0" |
| 46200 | /* 32740 */ "INVPCID64_EVEX\0" |
| 46201 | /* 32755 */ "INVVPID64_EVEX\0" |
| 46202 | /* 32770 */ "ENQCMD64_EVEX\0" |
| 46203 | /* 32784 */ "MOVDIRI64_EVEX\0" |
| 46204 | /* 32799 */ "ENQCMDS64_EVEX\0" |
| 46205 | /* 32814 */ "INVEPT64_EVEX\0" |
| 46206 | /* 32828 */ "CRC32r64m64_EVEX\0" |
| 46207 | /* 32845 */ "CRC32r64r64_EVEX\0" |
| 46208 | /* 32862 */ "CMPCCXADDmr64_EVEX\0" |
| 46209 | /* 32881 */ "CRC32r32m16_EVEX\0" |
| 46210 | /* 32898 */ "CRC32r32r16_EVEX\0" |
| 46211 | /* 32915 */ "SBB32mi8_EVEX\0" |
| 46212 | /* 32929 */ "SUB32mi8_EVEX\0" |
| 46213 | /* 32943 */ "ADC32mi8_EVEX\0" |
| 46214 | /* 32957 */ "ADD32mi8_EVEX\0" |
| 46215 | /* 32971 */ "AND32mi8_EVEX\0" |
| 46216 | /* 32985 */ "XOR32mi8_EVEX\0" |
| 46217 | /* 32999 */ "SBB64mi8_EVEX\0" |
| 46218 | /* 33013 */ "SUB64mi8_EVEX\0" |
| 46219 | /* 33027 */ "ADC64mi8_EVEX\0" |
| 46220 | /* 33041 */ "ADD64mi8_EVEX\0" |
| 46221 | /* 33055 */ "AND64mi8_EVEX\0" |
| 46222 | /* 33069 */ "XOR64mi8_EVEX\0" |
| 46223 | /* 33083 */ "SBB16mi8_EVEX\0" |
| 46224 | /* 33097 */ "SUB16mi8_EVEX\0" |
| 46225 | /* 33111 */ "ADC16mi8_EVEX\0" |
| 46226 | /* 33125 */ "ADD16mi8_EVEX\0" |
| 46227 | /* 33139 */ "AND16mi8_EVEX\0" |
| 46228 | /* 33153 */ "XOR16mi8_EVEX\0" |
| 46229 | /* 33167 */ "IMUL32rmi8_EVEX\0" |
| 46230 | /* 33183 */ "IMUL64rmi8_EVEX\0" |
| 46231 | /* 33199 */ "IMUL16rmi8_EVEX\0" |
| 46232 | /* 33215 */ "SBB32ri8_EVEX\0" |
| 46233 | /* 33229 */ "SUB32ri8_EVEX\0" |
| 46234 | /* 33243 */ "ADC32ri8_EVEX\0" |
| 46235 | /* 33257 */ "ADD32ri8_EVEX\0" |
| 46236 | /* 33271 */ "AND32ri8_EVEX\0" |
| 46237 | /* 33285 */ "XOR32ri8_EVEX\0" |
| 46238 | /* 33299 */ "SBB64ri8_EVEX\0" |
| 46239 | /* 33313 */ "SUB64ri8_EVEX\0" |
| 46240 | /* 33327 */ "ADC64ri8_EVEX\0" |
| 46241 | /* 33341 */ "ADD64ri8_EVEX\0" |
| 46242 | /* 33355 */ "AND64ri8_EVEX\0" |
| 46243 | /* 33369 */ "XOR64ri8_EVEX\0" |
| 46244 | /* 33383 */ "SBB16ri8_EVEX\0" |
| 46245 | /* 33397 */ "SUB16ri8_EVEX\0" |
| 46246 | /* 33411 */ "ADC16ri8_EVEX\0" |
| 46247 | /* 33425 */ "ADD16ri8_EVEX\0" |
| 46248 | /* 33439 */ "AND16ri8_EVEX\0" |
| 46249 | /* 33453 */ "XOR16ri8_EVEX\0" |
| 46250 | /* 33467 */ "SHLD32mri8_EVEX\0" |
| 46251 | /* 33483 */ "SHRD32mri8_EVEX\0" |
| 46252 | /* 33499 */ "SHLD64mri8_EVEX\0" |
| 46253 | /* 33515 */ "SHRD64mri8_EVEX\0" |
| 46254 | /* 33531 */ "SHLD16mri8_EVEX\0" |
| 46255 | /* 33547 */ "SHRD16mri8_EVEX\0" |
| 46256 | /* 33563 */ "SHLD32rri8_EVEX\0" |
| 46257 | /* 33579 */ "SHRD32rri8_EVEX\0" |
| 46258 | /* 33595 */ "IMUL32rri8_EVEX\0" |
| 46259 | /* 33611 */ "SHLD64rri8_EVEX\0" |
| 46260 | /* 33627 */ "SHRD64rri8_EVEX\0" |
| 46261 | /* 33643 */ "IMUL64rri8_EVEX\0" |
| 46262 | /* 33659 */ "SHLD16rri8_EVEX\0" |
| 46263 | /* 33675 */ "SHRD16rri8_EVEX\0" |
| 46264 | /* 33691 */ "IMUL16rri8_EVEX\0" |
| 46265 | /* 33707 */ "CRC32r32m8_EVEX\0" |
| 46266 | /* 33723 */ "CRC32r64m8_EVEX\0" |
| 46267 | /* 33739 */ "CRC32r32r8_EVEX\0" |
| 46268 | /* 33755 */ "CRC32r64r8_EVEX\0" |
| 46269 | /* 33771 */ "TILELOADD_EVEX\0" |
| 46270 | /* 33786 */ "TILESTORED_EVEX\0" |
| 46271 | /* 33802 */ "WRSSD_EVEX\0" |
| 46272 | /* 33813 */ "WRUSSD_EVEX\0" |
| 46273 | /* 33825 */ "LDTILECFG_EVEX\0" |
| 46274 | /* 33840 */ "STTILECFG_EVEX\0" |
| 46275 | /* 33855 */ "RCL32mCL_EVEX\0" |
| 46276 | /* 33869 */ "SHL32mCL_EVEX\0" |
| 46277 | /* 33883 */ "ROL32mCL_EVEX\0" |
| 46278 | /* 33897 */ "SAR32mCL_EVEX\0" |
| 46279 | /* 33911 */ "RCR32mCL_EVEX\0" |
| 46280 | /* 33925 */ "SHR32mCL_EVEX\0" |
| 46281 | /* 33939 */ "ROR32mCL_EVEX\0" |
| 46282 | /* 33953 */ "RCL64mCL_EVEX\0" |
| 46283 | /* 33967 */ "SHL64mCL_EVEX\0" |
| 46284 | /* 33981 */ "ROL64mCL_EVEX\0" |
| 46285 | /* 33995 */ "SAR64mCL_EVEX\0" |
| 46286 | /* 34009 */ "RCR64mCL_EVEX\0" |
| 46287 | /* 34023 */ "SHR64mCL_EVEX\0" |
| 46288 | /* 34037 */ "ROR64mCL_EVEX\0" |
| 46289 | /* 34051 */ "RCL16mCL_EVEX\0" |
| 46290 | /* 34065 */ "SHL16mCL_EVEX\0" |
| 46291 | /* 34079 */ "ROL16mCL_EVEX\0" |
| 46292 | /* 34093 */ "SAR16mCL_EVEX\0" |
| 46293 | /* 34107 */ "RCR16mCL_EVEX\0" |
| 46294 | /* 34121 */ "SHR16mCL_EVEX\0" |
| 46295 | /* 34135 */ "ROR16mCL_EVEX\0" |
| 46296 | /* 34149 */ "RCL8mCL_EVEX\0" |
| 46297 | /* 34162 */ "SHL8mCL_EVEX\0" |
| 46298 | /* 34175 */ "ROL8mCL_EVEX\0" |
| 46299 | /* 34188 */ "SAR8mCL_EVEX\0" |
| 46300 | /* 34201 */ "RCR8mCL_EVEX\0" |
| 46301 | /* 34214 */ "SHR8mCL_EVEX\0" |
| 46302 | /* 34227 */ "ROR8mCL_EVEX\0" |
| 46303 | /* 34240 */ "RCL32rCL_EVEX\0" |
| 46304 | /* 34254 */ "SHL32rCL_EVEX\0" |
| 46305 | /* 34268 */ "ROL32rCL_EVEX\0" |
| 46306 | /* 34282 */ "SAR32rCL_EVEX\0" |
| 46307 | /* 34296 */ "RCR32rCL_EVEX\0" |
| 46308 | /* 34310 */ "SHR32rCL_EVEX\0" |
| 46309 | /* 34324 */ "ROR32rCL_EVEX\0" |
| 46310 | /* 34338 */ "RCL64rCL_EVEX\0" |
| 46311 | /* 34352 */ "SHL64rCL_EVEX\0" |
| 46312 | /* 34366 */ "ROL64rCL_EVEX\0" |
| 46313 | /* 34380 */ "SAR64rCL_EVEX\0" |
| 46314 | /* 34394 */ "RCR64rCL_EVEX\0" |
| 46315 | /* 34408 */ "SHR64rCL_EVEX\0" |
| 46316 | /* 34422 */ "ROR64rCL_EVEX\0" |
| 46317 | /* 34436 */ "RCL16rCL_EVEX\0" |
| 46318 | /* 34450 */ "SHL16rCL_EVEX\0" |
| 46319 | /* 34464 */ "ROL16rCL_EVEX\0" |
| 46320 | /* 34478 */ "SAR16rCL_EVEX\0" |
| 46321 | /* 34492 */ "RCR16rCL_EVEX\0" |
| 46322 | /* 34506 */ "SHR16rCL_EVEX\0" |
| 46323 | /* 34520 */ "ROR16rCL_EVEX\0" |
| 46324 | /* 34534 */ "RCL8rCL_EVEX\0" |
| 46325 | /* 34547 */ "SHL8rCL_EVEX\0" |
| 46326 | /* 34560 */ "ROL8rCL_EVEX\0" |
| 46327 | /* 34573 */ "SAR8rCL_EVEX\0" |
| 46328 | /* 34586 */ "RCR8rCL_EVEX\0" |
| 46329 | /* 34599 */ "SHR8rCL_EVEX\0" |
| 46330 | /* 34612 */ "ROR8rCL_EVEX\0" |
| 46331 | /* 34625 */ "SHLD32mrCL_EVEX\0" |
| 46332 | /* 34641 */ "SHRD32mrCL_EVEX\0" |
| 46333 | /* 34657 */ "SHLD64mrCL_EVEX\0" |
| 46334 | /* 34673 */ "SHRD64mrCL_EVEX\0" |
| 46335 | /* 34689 */ "SHLD16mrCL_EVEX\0" |
| 46336 | /* 34705 */ "SHRD16mrCL_EVEX\0" |
| 46337 | /* 34721 */ "SHLD32rrCL_EVEX\0" |
| 46338 | /* 34737 */ "SHRD32rrCL_EVEX\0" |
| 46339 | /* 34753 */ "SHLD64rrCL_EVEX\0" |
| 46340 | /* 34769 */ "SHRD64rrCL_EVEX\0" |
| 46341 | /* 34785 */ "SHLD16rrCL_EVEX\0" |
| 46342 | /* 34801 */ "SHRD16rrCL_EVEX\0" |
| 46343 | /* 34817 */ "WRSSQ_EVEX\0" |
| 46344 | /* 34828 */ "WRUSSQ_EVEX\0" |
| 46345 | /* 34840 */ "SBB32mi_EVEX\0" |
| 46346 | /* 34853 */ "SUB32mi_EVEX\0" |
| 46347 | /* 34866 */ "ADC32mi_EVEX\0" |
| 46348 | /* 34879 */ "ADD32mi_EVEX\0" |
| 46349 | /* 34892 */ "AND32mi_EVEX\0" |
| 46350 | /* 34905 */ "RCL32mi_EVEX\0" |
| 46351 | /* 34918 */ "SHL32mi_EVEX\0" |
| 46352 | /* 34931 */ "ROL32mi_EVEX\0" |
| 46353 | /* 34944 */ "SAR32mi_EVEX\0" |
| 46354 | /* 34957 */ "RCR32mi_EVEX\0" |
| 46355 | /* 34970 */ "SHR32mi_EVEX\0" |
| 46356 | /* 34983 */ "ROR32mi_EVEX\0" |
| 46357 | /* 34996 */ "XOR32mi_EVEX\0" |
| 46358 | /* 35009 */ "RORX32mi_EVEX\0" |
| 46359 | /* 35023 */ "RCL64mi_EVEX\0" |
| 46360 | /* 35036 */ "SHL64mi_EVEX\0" |
| 46361 | /* 35049 */ "ROL64mi_EVEX\0" |
| 46362 | /* 35062 */ "SAR64mi_EVEX\0" |
| 46363 | /* 35075 */ "RCR64mi_EVEX\0" |
| 46364 | /* 35088 */ "SHR64mi_EVEX\0" |
| 46365 | /* 35101 */ "ROR64mi_EVEX\0" |
| 46366 | /* 35114 */ "RORX64mi_EVEX\0" |
| 46367 | /* 35128 */ "SBB16mi_EVEX\0" |
| 46368 | /* 35141 */ "SUB16mi_EVEX\0" |
| 46369 | /* 35154 */ "ADC16mi_EVEX\0" |
| 46370 | /* 35167 */ "ADD16mi_EVEX\0" |
| 46371 | /* 35180 */ "AND16mi_EVEX\0" |
| 46372 | /* 35193 */ "RCL16mi_EVEX\0" |
| 46373 | /* 35206 */ "SHL16mi_EVEX\0" |
| 46374 | /* 35219 */ "ROL16mi_EVEX\0" |
| 46375 | /* 35232 */ "SAR16mi_EVEX\0" |
| 46376 | /* 35245 */ "RCR16mi_EVEX\0" |
| 46377 | /* 35258 */ "SHR16mi_EVEX\0" |
| 46378 | /* 35271 */ "ROR16mi_EVEX\0" |
| 46379 | /* 35284 */ "XOR16mi_EVEX\0" |
| 46380 | /* 35297 */ "SBB8mi_EVEX\0" |
| 46381 | /* 35309 */ "SUB8mi_EVEX\0" |
| 46382 | /* 35321 */ "ADC8mi_EVEX\0" |
| 46383 | /* 35333 */ "ADD8mi_EVEX\0" |
| 46384 | /* 35345 */ "AND8mi_EVEX\0" |
| 46385 | /* 35357 */ "RCL8mi_EVEX\0" |
| 46386 | /* 35369 */ "SHL8mi_EVEX\0" |
| 46387 | /* 35381 */ "ROL8mi_EVEX\0" |
| 46388 | /* 35393 */ "SAR8mi_EVEX\0" |
| 46389 | /* 35405 */ "RCR8mi_EVEX\0" |
| 46390 | /* 35417 */ "SHR8mi_EVEX\0" |
| 46391 | /* 35429 */ "ROR8mi_EVEX\0" |
| 46392 | /* 35441 */ "XOR8mi_EVEX\0" |
| 46393 | /* 35453 */ "IMUL32rmi_EVEX\0" |
| 46394 | /* 35468 */ "IMUL16rmi_EVEX\0" |
| 46395 | /* 35483 */ "SBB32ri_EVEX\0" |
| 46396 | /* 35496 */ "SUB32ri_EVEX\0" |
| 46397 | /* 35509 */ "ADC32ri_EVEX\0" |
| 46398 | /* 35522 */ "ADD32ri_EVEX\0" |
| 46399 | /* 35535 */ "AND32ri_EVEX\0" |
| 46400 | /* 35548 */ "RCL32ri_EVEX\0" |
| 46401 | /* 35561 */ "SHL32ri_EVEX\0" |
| 46402 | /* 35574 */ "ROL32ri_EVEX\0" |
| 46403 | /* 35587 */ "SAR32ri_EVEX\0" |
| 46404 | /* 35600 */ "RCR32ri_EVEX\0" |
| 46405 | /* 35613 */ "SHR32ri_EVEX\0" |
| 46406 | /* 35626 */ "ROR32ri_EVEX\0" |
| 46407 | /* 35639 */ "XOR32ri_EVEX\0" |
| 46408 | /* 35652 */ "RORX32ri_EVEX\0" |
| 46409 | /* 35666 */ "RCL64ri_EVEX\0" |
| 46410 | /* 35679 */ "SHL64ri_EVEX\0" |
| 46411 | /* 35692 */ "ROL64ri_EVEX\0" |
| 46412 | /* 35705 */ "SAR64ri_EVEX\0" |
| 46413 | /* 35718 */ "RCR64ri_EVEX\0" |
| 46414 | /* 35731 */ "SHR64ri_EVEX\0" |
| 46415 | /* 35744 */ "ROR64ri_EVEX\0" |
| 46416 | /* 35757 */ "RORX64ri_EVEX\0" |
| 46417 | /* 35771 */ "SBB16ri_EVEX\0" |
| 46418 | /* 35784 */ "SUB16ri_EVEX\0" |
| 46419 | /* 35797 */ "ADC16ri_EVEX\0" |
| 46420 | /* 35810 */ "ADD16ri_EVEX\0" |
| 46421 | /* 35823 */ "AND16ri_EVEX\0" |
| 46422 | /* 35836 */ "RCL16ri_EVEX\0" |
| 46423 | /* 35849 */ "SHL16ri_EVEX\0" |
| 46424 | /* 35862 */ "ROL16ri_EVEX\0" |
| 46425 | /* 35875 */ "SAR16ri_EVEX\0" |
| 46426 | /* 35888 */ "RCR16ri_EVEX\0" |
| 46427 | /* 35901 */ "SHR16ri_EVEX\0" |
| 46428 | /* 35914 */ "ROR16ri_EVEX\0" |
| 46429 | /* 35927 */ "XOR16ri_EVEX\0" |
| 46430 | /* 35940 */ "SBB8ri_EVEX\0" |
| 46431 | /* 35952 */ "SUB8ri_EVEX\0" |
| 46432 | /* 35964 */ "ADC8ri_EVEX\0" |
| 46433 | /* 35976 */ "ADD8ri_EVEX\0" |
| 46434 | /* 35988 */ "AND8ri_EVEX\0" |
| 46435 | /* 36000 */ "RCL8ri_EVEX\0" |
| 46436 | /* 36012 */ "SHL8ri_EVEX\0" |
| 46437 | /* 36024 */ "ROL8ri_EVEX\0" |
| 46438 | /* 36036 */ "SAR8ri_EVEX\0" |
| 46439 | /* 36048 */ "RCR8ri_EVEX\0" |
| 46440 | /* 36060 */ "SHR8ri_EVEX\0" |
| 46441 | /* 36072 */ "ROR8ri_EVEX\0" |
| 46442 | /* 36084 */ "XOR8ri_EVEX\0" |
| 46443 | /* 36096 */ "URDMSRri_EVEX\0" |
| 46444 | /* 36110 */ "IMUL32rri_EVEX\0" |
| 46445 | /* 36125 */ "IMUL16rri_EVEX\0" |
| 46446 | /* 36140 */ "KMOVBkk_EVEX\0" |
| 46447 | /* 36153 */ "KMOVDkk_EVEX\0" |
| 46448 | /* 36166 */ "KMOVQkk_EVEX\0" |
| 46449 | /* 36179 */ "KMOVWkk_EVEX\0" |
| 46450 | /* 36192 */ "KMOVBmk_EVEX\0" |
| 46451 | /* 36205 */ "KMOVDmk_EVEX\0" |
| 46452 | /* 36218 */ "KMOVQmk_EVEX\0" |
| 46453 | /* 36231 */ "KMOVWmk_EVEX\0" |
| 46454 | /* 36244 */ "KMOVBrk_EVEX\0" |
| 46455 | /* 36257 */ "KMOVDrk_EVEX\0" |
| 46456 | /* 36270 */ "KMOVQrk_EVEX\0" |
| 46457 | /* 36283 */ "KMOVWrk_EVEX\0" |
| 46458 | /* 36296 */ "DEC32m_EVEX\0" |
| 46459 | /* 36308 */ "INC32m_EVEX\0" |
| 46460 | /* 36320 */ "NEG32m_EVEX\0" |
| 46461 | /* 36332 */ "IMUL32m_EVEX\0" |
| 46462 | /* 36345 */ "NOT32m_EVEX\0" |
| 46463 | /* 36357 */ "IDIV32m_EVEX\0" |
| 46464 | /* 36370 */ "DEC64m_EVEX\0" |
| 46465 | /* 36382 */ "INC64m_EVEX\0" |
| 46466 | /* 36394 */ "NEG64m_EVEX\0" |
| 46467 | /* 36406 */ "IMUL64m_EVEX\0" |
| 46468 | /* 36419 */ "NOT64m_EVEX\0" |
| 46469 | /* 36431 */ "IDIV64m_EVEX\0" |
| 46470 | /* 36444 */ "DEC16m_EVEX\0" |
| 46471 | /* 36456 */ "INC16m_EVEX\0" |
| 46472 | /* 36468 */ "NEG16m_EVEX\0" |
| 46473 | /* 36480 */ "IMUL16m_EVEX\0" |
| 46474 | /* 36493 */ "NOT16m_EVEX\0" |
| 46475 | /* 36505 */ "IDIV16m_EVEX\0" |
| 46476 | /* 36518 */ "DEC8m_EVEX\0" |
| 46477 | /* 36529 */ "INC8m_EVEX\0" |
| 46478 | /* 36540 */ "NEG8m_EVEX\0" |
| 46479 | /* 36551 */ "IMUL8m_EVEX\0" |
| 46480 | /* 36563 */ "NOT8m_EVEX\0" |
| 46481 | /* 36574 */ "IDIV8m_EVEX\0" |
| 46482 | /* 36586 */ "SETCCm_EVEX\0" |
| 46483 | /* 36598 */ "KMOVBkm_EVEX\0" |
| 46484 | /* 36611 */ "KMOVDkm_EVEX\0" |
| 46485 | /* 36624 */ "KMOVQkm_EVEX\0" |
| 46486 | /* 36637 */ "KMOVWkm_EVEX\0" |
| 46487 | /* 36650 */ "SBB32rm_EVEX\0" |
| 46488 | /* 36663 */ "SUB32rm_EVEX\0" |
| 46489 | /* 36676 */ "ADC32rm_EVEX\0" |
| 46490 | /* 36689 */ "ADD32rm_EVEX\0" |
| 46491 | /* 36702 */ "AND32rm_EVEX\0" |
| 46492 | /* 36715 */ "MOVBE32rm_EVEX\0" |
| 46493 | /* 36730 */ "BZHI32rm_EVEX\0" |
| 46494 | /* 36744 */ "BLSI32rm_EVEX\0" |
| 46495 | /* 36758 */ "BLSMSK32rm_EVEX\0" |
| 46496 | /* 36774 */ "IMUL32rm_EVEX\0" |
| 46497 | /* 36788 */ "ANDN32rm_EVEX\0" |
| 46498 | /* 36802 */ "PDEP32rm_EVEX\0" |
| 46499 | /* 36816 */ "XOR32rm_EVEX\0" |
| 46500 | /* 36829 */ "BLSR32rm_EVEX\0" |
| 46501 | /* 36843 */ "BEXTR32rm_EVEX\0" |
| 46502 | /* 36858 */ "POPCNT32rm_EVEX\0" |
| 46503 | /* 36874 */ "LZCNT32rm_EVEX\0" |
| 46504 | /* 36889 */ "TZCNT32rm_EVEX\0" |
| 46505 | /* 36904 */ "PEXT32rm_EVEX\0" |
| 46506 | /* 36918 */ "ADCX32rm_EVEX\0" |
| 46507 | /* 36932 */ "SHLX32rm_EVEX\0" |
| 46508 | /* 36946 */ "MULX32rm_EVEX\0" |
| 46509 | /* 36960 */ "ADOX32rm_EVEX\0" |
| 46510 | /* 36974 */ "SARX32rm_EVEX\0" |
| 46511 | /* 36988 */ "SHRX32rm_EVEX\0" |
| 46512 | /* 37002 */ "SBB64rm_EVEX\0" |
| 46513 | /* 37015 */ "SUB64rm_EVEX\0" |
| 46514 | /* 37028 */ "ADC64rm_EVEX\0" |
| 46515 | /* 37041 */ "ADD64rm_EVEX\0" |
| 46516 | /* 37054 */ "AND64rm_EVEX\0" |
| 46517 | /* 37067 */ "MOVBE64rm_EVEX\0" |
| 46518 | /* 37082 */ "BZHI64rm_EVEX\0" |
| 46519 | /* 37096 */ "BLSI64rm_EVEX\0" |
| 46520 | /* 37110 */ "BLSMSK64rm_EVEX\0" |
| 46521 | /* 37126 */ "IMUL64rm_EVEX\0" |
| 46522 | /* 37140 */ "ANDN64rm_EVEX\0" |
| 46523 | /* 37154 */ "PDEP64rm_EVEX\0" |
| 46524 | /* 37168 */ "XOR64rm_EVEX\0" |
| 46525 | /* 37181 */ "BLSR64rm_EVEX\0" |
| 46526 | /* 37195 */ "BEXTR64rm_EVEX\0" |
| 46527 | /* 37210 */ "POPCNT64rm_EVEX\0" |
| 46528 | /* 37226 */ "LZCNT64rm_EVEX\0" |
| 46529 | /* 37241 */ "TZCNT64rm_EVEX\0" |
| 46530 | /* 37256 */ "PEXT64rm_EVEX\0" |
| 46531 | /* 37270 */ "ADCX64rm_EVEX\0" |
| 46532 | /* 37284 */ "SHLX64rm_EVEX\0" |
| 46533 | /* 37298 */ "MULX64rm_EVEX\0" |
| 46534 | /* 37312 */ "ADOX64rm_EVEX\0" |
| 46535 | /* 37326 */ "SARX64rm_EVEX\0" |
| 46536 | /* 37340 */ "SHRX64rm_EVEX\0" |
| 46537 | /* 37354 */ "SBB16rm_EVEX\0" |
| 46538 | /* 37367 */ "SUB16rm_EVEX\0" |
| 46539 | /* 37380 */ "ADC16rm_EVEX\0" |
| 46540 | /* 37393 */ "ADD16rm_EVEX\0" |
| 46541 | /* 37406 */ "AND16rm_EVEX\0" |
| 46542 | /* 37419 */ "MOVBE16rm_EVEX\0" |
| 46543 | /* 37434 */ "IMUL16rm_EVEX\0" |
| 46544 | /* 37448 */ "XOR16rm_EVEX\0" |
| 46545 | /* 37461 */ "POPCNT16rm_EVEX\0" |
| 46546 | /* 37477 */ "LZCNT16rm_EVEX\0" |
| 46547 | /* 37492 */ "TZCNT16rm_EVEX\0" |
| 46548 | /* 37507 */ "SBB8rm_EVEX\0" |
| 46549 | /* 37519 */ "SUB8rm_EVEX\0" |
| 46550 | /* 37531 */ "ADC8rm_EVEX\0" |
| 46551 | /* 37543 */ "ADD8rm_EVEX\0" |
| 46552 | /* 37555 */ "AND8rm_EVEX\0" |
| 46553 | /* 37567 */ "XOR8rm_EVEX\0" |
| 46554 | /* 37579 */ "DEC32r_EVEX\0" |
| 46555 | /* 37591 */ "INC32r_EVEX\0" |
| 46556 | /* 37603 */ "NEG32r_EVEX\0" |
| 46557 | /* 37615 */ "IMUL32r_EVEX\0" |
| 46558 | /* 37628 */ "NOT32r_EVEX\0" |
| 46559 | /* 37640 */ "IDIV32r_EVEX\0" |
| 46560 | /* 37653 */ "DEC64r_EVEX\0" |
| 46561 | /* 37665 */ "INC64r_EVEX\0" |
| 46562 | /* 37677 */ "NEG64r_EVEX\0" |
| 46563 | /* 37689 */ "IMUL64r_EVEX\0" |
| 46564 | /* 37702 */ "NOT64r_EVEX\0" |
| 46565 | /* 37714 */ "IDIV64r_EVEX\0" |
| 46566 | /* 37727 */ "DEC16r_EVEX\0" |
| 46567 | /* 37739 */ "INC16r_EVEX\0" |
| 46568 | /* 37751 */ "NEG16r_EVEX\0" |
| 46569 | /* 37763 */ "IMUL16r_EVEX\0" |
| 46570 | /* 37776 */ "NOT16r_EVEX\0" |
| 46571 | /* 37788 */ "IDIV16r_EVEX\0" |
| 46572 | /* 37801 */ "DEC8r_EVEX\0" |
| 46573 | /* 37812 */ "INC8r_EVEX\0" |
| 46574 | /* 37823 */ "NEG8r_EVEX\0" |
| 46575 | /* 37834 */ "IMUL8r_EVEX\0" |
| 46576 | /* 37846 */ "NOT8r_EVEX\0" |
| 46577 | /* 37857 */ "IDIV8r_EVEX\0" |
| 46578 | /* 37869 */ "SETCCr_EVEX\0" |
| 46579 | /* 37881 */ "UWRMSRir_EVEX\0" |
| 46580 | /* 37895 */ "KMOVBkr_EVEX\0" |
| 46581 | /* 37908 */ "KMOVDkr_EVEX\0" |
| 46582 | /* 37921 */ "KMOVQkr_EVEX\0" |
| 46583 | /* 37934 */ "KMOVWkr_EVEX\0" |
| 46584 | /* 37947 */ "SBB32mr_EVEX\0" |
| 46585 | /* 37960 */ "SUB32mr_EVEX\0" |
| 46586 | /* 37973 */ "ADC32mr_EVEX\0" |
| 46587 | /* 37986 */ "AADD32mr_EVEX\0" |
| 46588 | /* 38000 */ "AAND32mr_EVEX\0" |
| 46589 | /* 38014 */ "MOVBE32mr_EVEX\0" |
| 46590 | /* 38029 */ "AOR32mr_EVEX\0" |
| 46591 | /* 38042 */ "AXOR32mr_EVEX\0" |
| 46592 | /* 38056 */ "SBB64mr_EVEX\0" |
| 46593 | /* 38069 */ "SUB64mr_EVEX\0" |
| 46594 | /* 38082 */ "ADC64mr_EVEX\0" |
| 46595 | /* 38095 */ "AADD64mr_EVEX\0" |
| 46596 | /* 38109 */ "AAND64mr_EVEX\0" |
| 46597 | /* 38123 */ "MOVBE64mr_EVEX\0" |
| 46598 | /* 38138 */ "AOR64mr_EVEX\0" |
| 46599 | /* 38151 */ "AXOR64mr_EVEX\0" |
| 46600 | /* 38165 */ "SBB16mr_EVEX\0" |
| 46601 | /* 38178 */ "SUB16mr_EVEX\0" |
| 46602 | /* 38191 */ "ADC16mr_EVEX\0" |
| 46603 | /* 38204 */ "ADD16mr_EVEX\0" |
| 46604 | /* 38217 */ "AND16mr_EVEX\0" |
| 46605 | /* 38230 */ "MOVBE16mr_EVEX\0" |
| 46606 | /* 38245 */ "XOR16mr_EVEX\0" |
| 46607 | /* 38258 */ "SBB8mr_EVEX\0" |
| 46608 | /* 38270 */ "SUB8mr_EVEX\0" |
| 46609 | /* 38282 */ "ADC8mr_EVEX\0" |
| 46610 | /* 38294 */ "ADD8mr_EVEX\0" |
| 46611 | /* 38306 */ "AND8mr_EVEX\0" |
| 46612 | /* 38318 */ "XOR8mr_EVEX\0" |
| 46613 | /* 38330 */ "SBB32rr_EVEX\0" |
| 46614 | /* 38343 */ "SUB32rr_EVEX\0" |
| 46615 | /* 38356 */ "ADC32rr_EVEX\0" |
| 46616 | /* 38369 */ "ADD32rr_EVEX\0" |
| 46617 | /* 38382 */ "AND32rr_EVEX\0" |
| 46618 | /* 38395 */ "BZHI32rr_EVEX\0" |
| 46619 | /* 38409 */ "BLSI32rr_EVEX\0" |
| 46620 | /* 38423 */ "BLSMSK32rr_EVEX\0" |
| 46621 | /* 38439 */ "IMUL32rr_EVEX\0" |
| 46622 | /* 38453 */ "ANDN32rr_EVEX\0" |
| 46623 | /* 38467 */ "PDEP32rr_EVEX\0" |
| 46624 | /* 38481 */ "XOR32rr_EVEX\0" |
| 46625 | /* 38494 */ "BLSR32rr_EVEX\0" |
| 46626 | /* 38508 */ "BEXTR32rr_EVEX\0" |
| 46627 | /* 38523 */ "POPCNT32rr_EVEX\0" |
| 46628 | /* 38539 */ "LZCNT32rr_EVEX\0" |
| 46629 | /* 38554 */ "TZCNT32rr_EVEX\0" |
| 46630 | /* 38569 */ "PEXT32rr_EVEX\0" |
| 46631 | /* 38583 */ "ADCX32rr_EVEX\0" |
| 46632 | /* 38597 */ "SHLX32rr_EVEX\0" |
| 46633 | /* 38611 */ "MULX32rr_EVEX\0" |
| 46634 | /* 38625 */ "ADOX32rr_EVEX\0" |
| 46635 | /* 38639 */ "SARX32rr_EVEX\0" |
| 46636 | /* 38653 */ "SHRX32rr_EVEX\0" |
| 46637 | /* 38667 */ "SBB64rr_EVEX\0" |
| 46638 | /* 38680 */ "SUB64rr_EVEX\0" |
| 46639 | /* 38693 */ "ADC64rr_EVEX\0" |
| 46640 | /* 38706 */ "ADD64rr_EVEX\0" |
| 46641 | /* 38719 */ "AND64rr_EVEX\0" |
| 46642 | /* 38732 */ "BZHI64rr_EVEX\0" |
| 46643 | /* 38746 */ "BLSI64rr_EVEX\0" |
| 46644 | /* 38760 */ "BLSMSK64rr_EVEX\0" |
| 46645 | /* 38776 */ "IMUL64rr_EVEX\0" |
| 46646 | /* 38790 */ "ANDN64rr_EVEX\0" |
| 46647 | /* 38804 */ "PDEP64rr_EVEX\0" |
| 46648 | /* 38818 */ "XOR64rr_EVEX\0" |
| 46649 | /* 38831 */ "BLSR64rr_EVEX\0" |
| 46650 | /* 38845 */ "BEXTR64rr_EVEX\0" |
| 46651 | /* 38860 */ "POPCNT64rr_EVEX\0" |
| 46652 | /* 38876 */ "LZCNT64rr_EVEX\0" |
| 46653 | /* 38891 */ "TZCNT64rr_EVEX\0" |
| 46654 | /* 38906 */ "PEXT64rr_EVEX\0" |
| 46655 | /* 38920 */ "ADCX64rr_EVEX\0" |
| 46656 | /* 38934 */ "SHLX64rr_EVEX\0" |
| 46657 | /* 38948 */ "MULX64rr_EVEX\0" |
| 46658 | /* 38962 */ "ADOX64rr_EVEX\0" |
| 46659 | /* 38976 */ "SARX64rr_EVEX\0" |
| 46660 | /* 38990 */ "SHRX64rr_EVEX\0" |
| 46661 | /* 39004 */ "SBB16rr_EVEX\0" |
| 46662 | /* 39017 */ "SUB16rr_EVEX\0" |
| 46663 | /* 39030 */ "ADC16rr_EVEX\0" |
| 46664 | /* 39043 */ "ADD16rr_EVEX\0" |
| 46665 | /* 39056 */ "AND16rr_EVEX\0" |
| 46666 | /* 39069 */ "IMUL16rr_EVEX\0" |
| 46667 | /* 39083 */ "XOR16rr_EVEX\0" |
| 46668 | /* 39096 */ "POPCNT16rr_EVEX\0" |
| 46669 | /* 39112 */ "LZCNT16rr_EVEX\0" |
| 46670 | /* 39127 */ "TZCNT16rr_EVEX\0" |
| 46671 | /* 39142 */ "SBB8rr_EVEX\0" |
| 46672 | /* 39154 */ "SUB8rr_EVEX\0" |
| 46673 | /* 39166 */ "ADC8rr_EVEX\0" |
| 46674 | /* 39178 */ "ADD8rr_EVEX\0" |
| 46675 | /* 39190 */ "AND8rr_EVEX\0" |
| 46676 | /* 39202 */ "XOR8rr_EVEX\0" |
| 46677 | /* 39214 */ "URDMSRrr_EVEX\0" |
| 46678 | /* 39228 */ "UWRMSRrr_EVEX\0" |
| 46679 | /* 39242 */ "G_SBFX\0" |
| 46680 | /* 39249 */ "G_UBFX\0" |
| 46681 | /* 39256 */ "ADDR32_PREFIX\0" |
| 46682 | /* 39270 */ "REX64_PREFIX\0" |
| 46683 | /* 39283 */ "DATA16_PREFIX\0" |
| 46684 | /* 39297 */ "ADDR16_PREFIX\0" |
| 46685 | /* 39311 */ "REPNE_PREFIX\0" |
| 46686 | /* 39324 */ "XACQUIRE_PREFIX\0" |
| 46687 | /* 39340 */ "XRELEASE_PREFIX\0" |
| 46688 | /* 39356 */ "LOCK_PREFIX\0" |
| 46689 | /* 39368 */ "REP_PREFIX\0" |
| 46690 | /* 39379 */ "CS_PREFIX\0" |
| 46691 | /* 39389 */ "DS_PREFIX\0" |
| 46692 | /* 39399 */ "ES_PREFIX\0" |
| 46693 | /* 39409 */ "FS_PREFIX\0" |
| 46694 | /* 39419 */ "GS_PREFIX\0" |
| 46695 | /* 39429 */ "SS_PREFIX\0" |
| 46696 | /* 39439 */ "G_SMULFIX\0" |
| 46697 | /* 39449 */ "G_UMULFIX\0" |
| 46698 | /* 39459 */ "G_SDIVFIX\0" |
| 46699 | /* 39469 */ "G_UDIVFIX\0" |
| 46700 | /* 39479 */ "VMOVAPSZ256rm_NOVLX\0" |
| 46701 | /* 39499 */ "VMOVUPSZ256rm_NOVLX\0" |
| 46702 | /* 39519 */ "VMOVAPSZ128rm_NOVLX\0" |
| 46703 | /* 39539 */ "VMOVUPSZ128rm_NOVLX\0" |
| 46704 | /* 39559 */ "VMOVAPSZ256mr_NOVLX\0" |
| 46705 | /* 39579 */ "VMOVUPSZ256mr_NOVLX\0" |
| 46706 | /* 39599 */ "VMOVAPSZ128mr_NOVLX\0" |
| 46707 | /* 39619 */ "VMOVUPSZ128mr_NOVLX\0" |
| 46708 | /* 39639 */ "MWAITX\0" |
| 46709 | /* 39646 */ "LOADIWKEY\0" |
| 46710 | /* 39656 */ "G_MEMCPY\0" |
| 46711 | /* 39665 */ "COPY\0" |
| 46712 | /* 39670 */ "RMPQUERY\0" |
| 46713 | /* 39679 */ "CONVERGENCECTRL_ENTRY\0" |
| 46714 | /* 39701 */ "CLRSSBSY\0" |
| 46715 | /* 39710 */ "SETSSBSY\0" |
| 46716 | /* 39719 */ "G_CTLZ\0" |
| 46717 | /* 39726 */ "G_CTTZ\0" |
| 46718 | /* 39733 */ "JECXZ\0" |
| 46719 | /* 39739 */ "JCXZ\0" |
| 46720 | /* 39744 */ "JRCXZ\0" |
| 46721 | /* 39750 */ "MOV32o32a\0" |
| 46722 | /* 39760 */ "MOV64o32a\0" |
| 46723 | /* 39770 */ "MOV16o32a\0" |
| 46724 | /* 39780 */ "MOV8o32a\0" |
| 46725 | /* 39789 */ "MOV32o64a\0" |
| 46726 | /* 39799 */ "MOV64o64a\0" |
| 46727 | /* 39809 */ "MOV16o64a\0" |
| 46728 | /* 39819 */ "MOV8o64a\0" |
| 46729 | /* 39828 */ "MOV32o16a\0" |
| 46730 | /* 39838 */ "MOV16o16a\0" |
| 46731 | /* 39848 */ "MOV8o16a\0" |
| 46732 | /* 39857 */ "VPCMPDZ256rmib\0" |
| 46733 | /* 39872 */ "VPCMPUDZ256rmib\0" |
| 46734 | /* 39888 */ "VPCMPQZ256rmib\0" |
| 46735 | /* 39903 */ "VPCMPUQZ256rmib\0" |
| 46736 | /* 39919 */ "VPCMPDZ128rmib\0" |
| 46737 | /* 39934 */ "VPCMPUDZ128rmib\0" |
| 46738 | /* 39950 */ "VPCMPQZ128rmib\0" |
| 46739 | /* 39965 */ "VPCMPUQZ128rmib\0" |
| 46740 | /* 39981 */ "VPCMPDZrmib\0" |
| 46741 | /* 39993 */ "VPCMPUDZrmib\0" |
| 46742 | /* 40006 */ "VPCMPQZrmib\0" |
| 46743 | /* 40018 */ "VPCMPUQZrmib\0" |
| 46744 | /* 40031 */ "VREDUCEPDZrrib\0" |
| 46745 | /* 40046 */ "VRANGEPDZrrib\0" |
| 46746 | /* 40060 */ "VRNDSCALEPDZrrib\0" |
| 46747 | /* 40077 */ "VFIXUPIMMPDZrrib\0" |
| 46748 | /* 40094 */ "VCMPPDZrrib\0" |
| 46749 | /* 40106 */ "VGETMANTPDZrrib\0" |
| 46750 | /* 40122 */ "VREDUCESDZrrib\0" |
| 46751 | /* 40137 */ "VRANGESDZrrib\0" |
| 46752 | /* 40151 */ "VFIXUPIMMSDZrrib\0" |
| 46753 | /* 40168 */ "VGETMANTSDZrrib\0" |
| 46754 | /* 40184 */ "VREDUCEPHZrrib\0" |
| 46755 | /* 40199 */ "VRNDSCALEPHZrrib\0" |
| 46756 | /* 40216 */ "VCMPPHZrrib\0" |
| 46757 | /* 40228 */ "VGETMANTPHZrrib\0" |
| 46758 | /* 40244 */ "VREDUCESHZrrib\0" |
| 46759 | /* 40259 */ "VGETMANTSHZrrib\0" |
| 46760 | /* 40275 */ "VREDUCEPSZrrib\0" |
| 46761 | /* 40290 */ "VRANGEPSZrrib\0" |
| 46762 | /* 40304 */ "VRNDSCALEPSZrrib\0" |
| 46763 | /* 40321 */ "VFIXUPIMMPSZrrib\0" |
| 46764 | /* 40338 */ "VCMPPSZrrib\0" |
| 46765 | /* 40350 */ "VGETMANTPSZrrib\0" |
| 46766 | /* 40366 */ "VREDUCESSZrrib\0" |
| 46767 | /* 40381 */ "VRANGESSZrrib\0" |
| 46768 | /* 40395 */ "VFIXUPIMMSSZrrib\0" |
| 46769 | /* 40412 */ "VGETMANTSSZrrib\0" |
| 46770 | /* 40428 */ "VFMADDSUB231PDZ256mb\0" |
| 46771 | /* 40449 */ "VFMSUB231PDZ256mb\0" |
| 46772 | /* 40467 */ "VFNMSUB231PDZ256mb\0" |
| 46773 | /* 40486 */ "VFMSUBADD231PDZ256mb\0" |
| 46774 | /* 40507 */ "VFMADD231PDZ256mb\0" |
| 46775 | /* 40525 */ "VFNMADD231PDZ256mb\0" |
| 46776 | /* 40544 */ "VFMADDSUB132PDZ256mb\0" |
| 46777 | /* 40565 */ "VFMSUB132PDZ256mb\0" |
| 46778 | /* 40583 */ "VFNMSUB132PDZ256mb\0" |
| 46779 | /* 40602 */ "VFMSUBADD132PDZ256mb\0" |
| 46780 | /* 40623 */ "VFMADD132PDZ256mb\0" |
| 46781 | /* 40641 */ "VFNMADD132PDZ256mb\0" |
| 46782 | /* 40660 */ "VFMADDSUB213PDZ256mb\0" |
| 46783 | /* 40681 */ "VFMSUB213PDZ256mb\0" |
| 46784 | /* 40699 */ "VFNMSUB213PDZ256mb\0" |
| 46785 | /* 40718 */ "VFMSUBADD213PDZ256mb\0" |
| 46786 | /* 40739 */ "VFMADD213PDZ256mb\0" |
| 46787 | /* 40757 */ "VFNMADD213PDZ256mb\0" |
| 46788 | /* 40776 */ "VRCP14PDZ256mb\0" |
| 46789 | /* 40791 */ "VRSQRT14PDZ256mb\0" |
| 46790 | /* 40808 */ "VGETEXPPDZ256mb\0" |
| 46791 | /* 40824 */ "VSQRTPDZ256mb\0" |
| 46792 | /* 40838 */ "VPDPWSSDZ256mb\0" |
| 46793 | /* 40853 */ "VPDPBUSDZ256mb\0" |
| 46794 | /* 40868 */ "VPSHLDVDZ256mb\0" |
| 46795 | /* 40883 */ "VPSHRDVDZ256mb\0" |
| 46796 | /* 40898 */ "VFMADDSUB231PHZ256mb\0" |
| 46797 | /* 40919 */ "VFMSUB231PHZ256mb\0" |
| 46798 | /* 40937 */ "VFNMSUB231PHZ256mb\0" |
| 46799 | /* 40956 */ "VFMSUBADD231PHZ256mb\0" |
| 46800 | /* 40977 */ "VFMADD231PHZ256mb\0" |
| 46801 | /* 40995 */ "VFNMADD231PHZ256mb\0" |
| 46802 | /* 41014 */ "VFMADDSUB132PHZ256mb\0" |
| 46803 | /* 41035 */ "VFMSUB132PHZ256mb\0" |
| 46804 | /* 41053 */ "VFNMSUB132PHZ256mb\0" |
| 46805 | /* 41072 */ "VFMSUBADD132PHZ256mb\0" |
| 46806 | /* 41093 */ "VFMADD132PHZ256mb\0" |
| 46807 | /* 41111 */ "VFNMADD132PHZ256mb\0" |
| 46808 | /* 41130 */ "VFMADDSUB213PHZ256mb\0" |
| 46809 | /* 41151 */ "VFMSUB213PHZ256mb\0" |
| 46810 | /* 41169 */ "VFNMSUB213PHZ256mb\0" |
| 46811 | /* 41188 */ "VFMSUBADD213PHZ256mb\0" |
| 46812 | /* 41209 */ "VFMADD213PHZ256mb\0" |
| 46813 | /* 41227 */ "VFNMADD213PHZ256mb\0" |
| 46814 | /* 41246 */ "VFCMADDCPHZ256mb\0" |
| 46815 | /* 41263 */ "VFMADDCPHZ256mb\0" |
| 46816 | /* 41279 */ "VRCPPHZ256mb\0" |
| 46817 | /* 41292 */ "VGETEXPPHZ256mb\0" |
| 46818 | /* 41308 */ "VRSQRTPHZ256mb\0" |
| 46819 | /* 41323 */ "VSQRTPHZ256mb\0" |
| 46820 | /* 41337 */ "VPMADD52HUQZ256mb\0" |
| 46821 | /* 41355 */ "VPMADD52LUQZ256mb\0" |
| 46822 | /* 41373 */ "VPSHLDVQZ256mb\0" |
| 46823 | /* 41388 */ "VPSHRDVQZ256mb\0" |
| 46824 | /* 41403 */ "VPDPWSSDSZ256mb\0" |
| 46825 | /* 41419 */ "VPDPBUSDSZ256mb\0" |
| 46826 | /* 41435 */ "VFMADDSUB231PSZ256mb\0" |
| 46827 | /* 41456 */ "VFMSUB231PSZ256mb\0" |
| 46828 | /* 41474 */ "VFNMSUB231PSZ256mb\0" |
| 46829 | /* 41493 */ "VFMSUBADD231PSZ256mb\0" |
| 46830 | /* 41514 */ "VFMADD231PSZ256mb\0" |
| 46831 | /* 41532 */ "VFNMADD231PSZ256mb\0" |
| 46832 | /* 41551 */ "VFMADDSUB132PSZ256mb\0" |
| 46833 | /* 41572 */ "VFMSUB132PSZ256mb\0" |
| 46834 | /* 41590 */ "VFNMSUB132PSZ256mb\0" |
| 46835 | /* 41609 */ "VFMSUBADD132PSZ256mb\0" |
| 46836 | /* 41630 */ "VFMADD132PSZ256mb\0" |
| 46837 | /* 41648 */ "VFNMADD132PSZ256mb\0" |
| 46838 | /* 41667 */ "VFMADDSUB213PSZ256mb\0" |
| 46839 | /* 41688 */ "VFMSUB213PSZ256mb\0" |
| 46840 | /* 41706 */ "VFNMSUB213PSZ256mb\0" |
| 46841 | /* 41725 */ "VFMSUBADD213PSZ256mb\0" |
| 46842 | /* 41746 */ "VFMADD213PSZ256mb\0" |
| 46843 | /* 41764 */ "VFNMADD213PSZ256mb\0" |
| 46844 | /* 41783 */ "VRCP14PSZ256mb\0" |
| 46845 | /* 41798 */ "VRSQRT14PSZ256mb\0" |
| 46846 | /* 41815 */ "VDPBF16PSZ256mb\0" |
| 46847 | /* 41831 */ "VGETEXPPSZ256mb\0" |
| 46848 | /* 41847 */ "VSQRTPSZ256mb\0" |
| 46849 | /* 41861 */ "VFMADDSUB231PDZ128mb\0" |
| 46850 | /* 41882 */ "VFMSUB231PDZ128mb\0" |
| 46851 | /* 41900 */ "VFNMSUB231PDZ128mb\0" |
| 46852 | /* 41919 */ "VFMSUBADD231PDZ128mb\0" |
| 46853 | /* 41940 */ "VFMADD231PDZ128mb\0" |
| 46854 | /* 41958 */ "VFNMADD231PDZ128mb\0" |
| 46855 | /* 41977 */ "VFMADDSUB132PDZ128mb\0" |
| 46856 | /* 41998 */ "VFMSUB132PDZ128mb\0" |
| 46857 | /* 42016 */ "VFNMSUB132PDZ128mb\0" |
| 46858 | /* 42035 */ "VFMSUBADD132PDZ128mb\0" |
| 46859 | /* 42056 */ "VFMADD132PDZ128mb\0" |
| 46860 | /* 42074 */ "VFNMADD132PDZ128mb\0" |
| 46861 | /* 42093 */ "VFMADDSUB213PDZ128mb\0" |
| 46862 | /* 42114 */ "VFMSUB213PDZ128mb\0" |
| 46863 | /* 42132 */ "VFNMSUB213PDZ128mb\0" |
| 46864 | /* 42151 */ "VFMSUBADD213PDZ128mb\0" |
| 46865 | /* 42172 */ "VFMADD213PDZ128mb\0" |
| 46866 | /* 42190 */ "VFNMADD213PDZ128mb\0" |
| 46867 | /* 42209 */ "VRCP14PDZ128mb\0" |
| 46868 | /* 42224 */ "VRSQRT14PDZ128mb\0" |
| 46869 | /* 42241 */ "VGETEXPPDZ128mb\0" |
| 46870 | /* 42257 */ "VSQRTPDZ128mb\0" |
| 46871 | /* 42271 */ "VPDPWSSDZ128mb\0" |
| 46872 | /* 42286 */ "VPDPBUSDZ128mb\0" |
| 46873 | /* 42301 */ "VPSHLDVDZ128mb\0" |
| 46874 | /* 42316 */ "VPSHRDVDZ128mb\0" |
| 46875 | /* 42331 */ "VFMADDSUB231PHZ128mb\0" |
| 46876 | /* 42352 */ "VFMSUB231PHZ128mb\0" |
| 46877 | /* 42370 */ "VFNMSUB231PHZ128mb\0" |
| 46878 | /* 42389 */ "VFMSUBADD231PHZ128mb\0" |
| 46879 | /* 42410 */ "VFMADD231PHZ128mb\0" |
| 46880 | /* 42428 */ "VFNMADD231PHZ128mb\0" |
| 46881 | /* 42447 */ "VFMADDSUB132PHZ128mb\0" |
| 46882 | /* 42468 */ "VFMSUB132PHZ128mb\0" |
| 46883 | /* 42486 */ "VFNMSUB132PHZ128mb\0" |
| 46884 | /* 42505 */ "VFMSUBADD132PHZ128mb\0" |
| 46885 | /* 42526 */ "VFMADD132PHZ128mb\0" |
| 46886 | /* 42544 */ "VFNMADD132PHZ128mb\0" |
| 46887 | /* 42563 */ "VFMADDSUB213PHZ128mb\0" |
| 46888 | /* 42584 */ "VFMSUB213PHZ128mb\0" |
| 46889 | /* 42602 */ "VFNMSUB213PHZ128mb\0" |
| 46890 | /* 42621 */ "VFMSUBADD213PHZ128mb\0" |
| 46891 | /* 42642 */ "VFMADD213PHZ128mb\0" |
| 46892 | /* 42660 */ "VFNMADD213PHZ128mb\0" |
| 46893 | /* 42679 */ "VFCMADDCPHZ128mb\0" |
| 46894 | /* 42696 */ "VFMADDCPHZ128mb\0" |
| 46895 | /* 42712 */ "VRCPPHZ128mb\0" |
| 46896 | /* 42725 */ "VGETEXPPHZ128mb\0" |
| 46897 | /* 42741 */ "VRSQRTPHZ128mb\0" |
| 46898 | /* 42756 */ "VSQRTPHZ128mb\0" |
| 46899 | /* 42770 */ "VPMADD52HUQZ128mb\0" |
| 46900 | /* 42788 */ "VPMADD52LUQZ128mb\0" |
| 46901 | /* 42806 */ "VPSHLDVQZ128mb\0" |
| 46902 | /* 42821 */ "VPSHRDVQZ128mb\0" |
| 46903 | /* 42836 */ "VPDPWSSDSZ128mb\0" |
| 46904 | /* 42852 */ "VPDPBUSDSZ128mb\0" |
| 46905 | /* 42868 */ "VFMADDSUB231PSZ128mb\0" |
| 46906 | /* 42889 */ "VFMSUB231PSZ128mb\0" |
| 46907 | /* 42907 */ "VFNMSUB231PSZ128mb\0" |
| 46908 | /* 42926 */ "VFMSUBADD231PSZ128mb\0" |
| 46909 | /* 42947 */ "VFMADD231PSZ128mb\0" |
| 46910 | /* 42965 */ "VFNMADD231PSZ128mb\0" |
| 46911 | /* 42984 */ "VFMADDSUB132PSZ128mb\0" |
| 46912 | /* 43005 */ "VFMSUB132PSZ128mb\0" |
| 46913 | /* 43023 */ "VFNMSUB132PSZ128mb\0" |
| 46914 | /* 43042 */ "VFMSUBADD132PSZ128mb\0" |
| 46915 | /* 43063 */ "VFMADD132PSZ128mb\0" |
| 46916 | /* 43081 */ "VFNMADD132PSZ128mb\0" |
| 46917 | /* 43100 */ "VFMADDSUB213PSZ128mb\0" |
| 46918 | /* 43121 */ "VFMSUB213PSZ128mb\0" |
| 46919 | /* 43139 */ "VFNMSUB213PSZ128mb\0" |
| 46920 | /* 43158 */ "VFMSUBADD213PSZ128mb\0" |
| 46921 | /* 43179 */ "VFMADD213PSZ128mb\0" |
| 46922 | /* 43197 */ "VFNMADD213PSZ128mb\0" |
| 46923 | /* 43216 */ "VRCP14PSZ128mb\0" |
| 46924 | /* 43231 */ "VRSQRT14PSZ128mb\0" |
| 46925 | /* 43248 */ "VDPBF16PSZ128mb\0" |
| 46926 | /* 43264 */ "VGETEXPPSZ128mb\0" |
| 46927 | /* 43280 */ "VSQRTPSZ128mb\0" |
| 46928 | /* 43294 */ "VFMADDSUB231PDZmb\0" |
| 46929 | /* 43312 */ "VFMSUB231PDZmb\0" |
| 46930 | /* 43327 */ "VFNMSUB231PDZmb\0" |
| 46931 | /* 43343 */ "VFMSUBADD231PDZmb\0" |
| 46932 | /* 43361 */ "VFMADD231PDZmb\0" |
| 46933 | /* 43376 */ "VFNMADD231PDZmb\0" |
| 46934 | /* 43392 */ "VFMADDSUB132PDZmb\0" |
| 46935 | /* 43410 */ "VFMSUB132PDZmb\0" |
| 46936 | /* 43425 */ "VFNMSUB132PDZmb\0" |
| 46937 | /* 43441 */ "VFMSUBADD132PDZmb\0" |
| 46938 | /* 43459 */ "VFMADD132PDZmb\0" |
| 46939 | /* 43474 */ "VFNMADD132PDZmb\0" |
| 46940 | /* 43490 */ "VEXP2PDZmb\0" |
| 46941 | /* 43501 */ "VFMADDSUB213PDZmb\0" |
| 46942 | /* 43519 */ "VFMSUB213PDZmb\0" |
| 46943 | /* 43534 */ "VFNMSUB213PDZmb\0" |
| 46944 | /* 43550 */ "VFMSUBADD213PDZmb\0" |
| 46945 | /* 43568 */ "VFMADD213PDZmb\0" |
| 46946 | /* 43583 */ "VFNMADD213PDZmb\0" |
| 46947 | /* 43599 */ "VRCP14PDZmb\0" |
| 46948 | /* 43611 */ "VRSQRT14PDZmb\0" |
| 46949 | /* 43625 */ "VRCP28PDZmb\0" |
| 46950 | /* 43637 */ "VRSQRT28PDZmb\0" |
| 46951 | /* 43651 */ "VGETEXPPDZmb\0" |
| 46952 | /* 43664 */ "VSQRTPDZmb\0" |
| 46953 | /* 43675 */ "VPDPWSSDZmb\0" |
| 46954 | /* 43687 */ "VPDPBUSDZmb\0" |
| 46955 | /* 43699 */ "VPSHLDVDZmb\0" |
| 46956 | /* 43711 */ "VPSHRDVDZmb\0" |
| 46957 | /* 43723 */ "VFMADDSUB231PHZmb\0" |
| 46958 | /* 43741 */ "VFMSUB231PHZmb\0" |
| 46959 | /* 43756 */ "VFNMSUB231PHZmb\0" |
| 46960 | /* 43772 */ "VFMSUBADD231PHZmb\0" |
| 46961 | /* 43790 */ "VFMADD231PHZmb\0" |
| 46962 | /* 43805 */ "VFNMADD231PHZmb\0" |
| 46963 | /* 43821 */ "VFMADDSUB132PHZmb\0" |
| 46964 | /* 43839 */ "VFMSUB132PHZmb\0" |
| 46965 | /* 43854 */ "VFNMSUB132PHZmb\0" |
| 46966 | /* 43870 */ "VFMSUBADD132PHZmb\0" |
| 46967 | /* 43888 */ "VFMADD132PHZmb\0" |
| 46968 | /* 43903 */ "VFNMADD132PHZmb\0" |
| 46969 | /* 43919 */ "VFMADDSUB213PHZmb\0" |
| 46970 | /* 43937 */ "VFMSUB213PHZmb\0" |
| 46971 | /* 43952 */ "VFNMSUB213PHZmb\0" |
| 46972 | /* 43968 */ "VFMSUBADD213PHZmb\0" |
| 46973 | /* 43986 */ "VFMADD213PHZmb\0" |
| 46974 | /* 44001 */ "VFNMADD213PHZmb\0" |
| 46975 | /* 44017 */ "VFCMADDCPHZmb\0" |
| 46976 | /* 44031 */ "VFMADDCPHZmb\0" |
| 46977 | /* 44044 */ "VRCPPHZmb\0" |
| 46978 | /* 44054 */ "VGETEXPPHZmb\0" |
| 46979 | /* 44067 */ "VRSQRTPHZmb\0" |
| 46980 | /* 44079 */ "VSQRTPHZmb\0" |
| 46981 | /* 44090 */ "VPMADD52HUQZmb\0" |
| 46982 | /* 44105 */ "VPMADD52LUQZmb\0" |
| 46983 | /* 44120 */ "VPSHLDVQZmb\0" |
| 46984 | /* 44132 */ "VPSHRDVQZmb\0" |
| 46985 | /* 44144 */ "VPDPWSSDSZmb\0" |
| 46986 | /* 44157 */ "VPDPBUSDSZmb\0" |
| 46987 | /* 44170 */ "VFMADDSUB231PSZmb\0" |
| 46988 | /* 44188 */ "VFMSUB231PSZmb\0" |
| 46989 | /* 44203 */ "VFNMSUB231PSZmb\0" |
| 46990 | /* 44219 */ "VFMSUBADD231PSZmb\0" |
| 46991 | /* 44237 */ "VFMADD231PSZmb\0" |
| 46992 | /* 44252 */ "VFNMADD231PSZmb\0" |
| 46993 | /* 44268 */ "VFMADDSUB132PSZmb\0" |
| 46994 | /* 44286 */ "VFMSUB132PSZmb\0" |
| 46995 | /* 44301 */ "VFNMSUB132PSZmb\0" |
| 46996 | /* 44317 */ "VFMSUBADD132PSZmb\0" |
| 46997 | /* 44335 */ "VFMADD132PSZmb\0" |
| 46998 | /* 44350 */ "VFNMADD132PSZmb\0" |
| 46999 | /* 44366 */ "VEXP2PSZmb\0" |
| 47000 | /* 44377 */ "VFMADDSUB213PSZmb\0" |
| 47001 | /* 44395 */ "VFMSUB213PSZmb\0" |
| 47002 | /* 44410 */ "VFNMSUB213PSZmb\0" |
| 47003 | /* 44426 */ "VFMSUBADD213PSZmb\0" |
| 47004 | /* 44444 */ "VFMADD213PSZmb\0" |
| 47005 | /* 44459 */ "VFNMADD213PSZmb\0" |
| 47006 | /* 44475 */ "VRCP14PSZmb\0" |
| 47007 | /* 44487 */ "VRSQRT14PSZmb\0" |
| 47008 | /* 44501 */ "VDPBF16PSZmb\0" |
| 47009 | /* 44514 */ "VRCP28PSZmb\0" |
| 47010 | /* 44526 */ "VRSQRT28PSZmb\0" |
| 47011 | /* 44540 */ "VGETEXPPSZmb\0" |
| 47012 | /* 44553 */ "VSQRTPSZmb\0" |
| 47013 | /* 44564 */ "VCVTNE2PS2BF16Z256rmb\0" |
| 47014 | /* 44586 */ "VCVTNEPS2BF16Z256rmb\0" |
| 47015 | /* 44607 */ "VPMULTISHIFTQBZ256rmb\0" |
| 47016 | /* 44629 */ "VPERMI2DZ256rmb\0" |
| 47017 | /* 44645 */ "VPERMT2DZ256rmb\0" |
| 47018 | /* 44661 */ "VPSUBDZ256rmb\0" |
| 47019 | /* 44675 */ "VPADDDZ256rmb\0" |
| 47020 | /* 44689 */ "VPANDDZ256rmb\0" |
| 47021 | /* 44703 */ "VPMULLDZ256rmb\0" |
| 47022 | /* 44718 */ "VPBLENDMDZ256rmb\0" |
| 47023 | /* 44735 */ "VPTESTNMDZ256rmb\0" |
| 47024 | /* 44752 */ "VPERMDZ256rmb\0" |
| 47025 | /* 44766 */ "VPTESTMDZ256rmb\0" |
| 47026 | /* 44782 */ "VPANDNDZ256rmb\0" |
| 47027 | /* 44797 */ "VCVTPH2PDZ256rmb\0" |
| 47028 | /* 44814 */ "VPERMI2PDZ256rmb\0" |
| 47029 | /* 44831 */ "VCVTDQ2PDZ256rmb\0" |
| 47030 | /* 44848 */ "VCVTUDQ2PDZ256rmb\0" |
| 47031 | /* 44866 */ "VCVTQQ2PDZ256rmb\0" |
| 47032 | /* 44883 */ "VCVTUQQ2PDZ256rmb\0" |
| 47033 | /* 44901 */ "VCVTPS2PDZ256rmb\0" |
| 47034 | /* 44918 */ "VPERMT2PDZ256rmb\0" |
| 47035 | /* 44935 */ "VSUBPDZ256rmb\0" |
| 47036 | /* 44949 */ "VMINCPDZ256rmb\0" |
| 47037 | /* 44964 */ "VMAXCPDZ256rmb\0" |
| 47038 | /* 44979 */ "VADDPDZ256rmb\0" |
| 47039 | /* 44993 */ "VANDPDZ256rmb\0" |
| 47040 | /* 45007 */ "VSCALEFPDZ256rmb\0" |
| 47041 | /* 45024 */ "VUNPCKHPDZ256rmb\0" |
| 47042 | /* 45041 */ "VPERMILPDZ256rmb\0" |
| 47043 | /* 45058 */ "VUNPCKLPDZ256rmb\0" |
| 47044 | /* 45075 */ "VMULPDZ256rmb\0" |
| 47045 | /* 45089 */ "VBLENDMPDZ256rmb\0" |
| 47046 | /* 45106 */ "VPERMPDZ256rmb\0" |
| 47047 | /* 45121 */ "VANDNPDZ256rmb\0" |
| 47048 | /* 45136 */ "VMINPDZ256rmb\0" |
| 47049 | /* 45150 */ "VORPDZ256rmb\0" |
| 47050 | /* 45163 */ "VXORPDZ256rmb\0" |
| 47051 | /* 45177 */ "VFPCLASSPDZ256rmb\0" |
| 47052 | /* 45195 */ "VDIVPDZ256rmb\0" |
| 47053 | /* 45209 */ "VMAXPDZ256rmb\0" |
| 47054 | /* 45223 */ "VPCMPEQDZ256rmb\0" |
| 47055 | /* 45239 */ "VPORDZ256rmb\0" |
| 47056 | /* 45252 */ "VPXORDZ256rmb\0" |
| 47057 | /* 45266 */ "VPABSDZ256rmb\0" |
| 47058 | /* 45280 */ "VPMINSDZ256rmb\0" |
| 47059 | /* 45295 */ "VPMAXSDZ256rmb\0" |
| 47060 | /* 45310 */ "VP2INTERSECTDZ256rmb\0" |
| 47061 | /* 45331 */ "VPCONFLICTDZ256rmb\0" |
| 47062 | /* 45350 */ "VPCMPGTDZ256rmb\0" |
| 47063 | /* 45366 */ "VPOPCNTDZ256rmb\0" |
| 47064 | /* 45382 */ "VPLZCNTDZ256rmb\0" |
| 47065 | /* 45398 */ "VPMINUDZ256rmb\0" |
| 47066 | /* 45413 */ "VPMAXUDZ256rmb\0" |
| 47067 | /* 45428 */ "VPSRAVDZ256rmb\0" |
| 47068 | /* 45443 */ "VPSLLVDZ256rmb\0" |
| 47069 | /* 45458 */ "VPROLVDZ256rmb\0" |
| 47070 | /* 45473 */ "VPSRLVDZ256rmb\0" |
| 47071 | /* 45488 */ "VPRORVDZ256rmb\0" |
| 47072 | /* 45503 */ "VCVTPD2PHZ256rmb\0" |
| 47073 | /* 45520 */ "VCVTDQ2PHZ256rmb\0" |
| 47074 | /* 45537 */ "VCVTUDQ2PHZ256rmb\0" |
| 47075 | /* 45555 */ "VCVTQQ2PHZ256rmb\0" |
| 47076 | /* 45572 */ "VCVTUQQ2PHZ256rmb\0" |
| 47077 | /* 45590 */ "VCVTW2PHZ256rmb\0" |
| 47078 | /* 45606 */ "VCVTUW2PHZ256rmb\0" |
| 47079 | /* 45623 */ "VSUBPHZ256rmb\0" |
| 47080 | /* 45637 */ "VFCMULCPHZ256rmb\0" |
| 47081 | /* 45654 */ "VFMULCPHZ256rmb\0" |
| 47082 | /* 45670 */ "VMINCPHZ256rmb\0" |
| 47083 | /* 45685 */ "VMAXCPHZ256rmb\0" |
| 47084 | /* 45700 */ "VADDPHZ256rmb\0" |
| 47085 | /* 45714 */ "VSCALEFPHZ256rmb\0" |
| 47086 | /* 45731 */ "VMULPHZ256rmb\0" |
| 47087 | /* 45745 */ "VMINPHZ256rmb\0" |
| 47088 | /* 45759 */ "VFPCLASSPHZ256rmb\0" |
| 47089 | /* 45777 */ "VDIVPHZ256rmb\0" |
| 47090 | /* 45791 */ "VMAXPHZ256rmb\0" |
| 47091 | /* 45805 */ "VPERMI2QZ256rmb\0" |
| 47092 | /* 45821 */ "VPERMT2QZ256rmb\0" |
| 47093 | /* 45837 */ "VPSUBQZ256rmb\0" |
| 47094 | /* 45851 */ "VCVTTPD2DQZ256rmb\0" |
| 47095 | /* 45869 */ "VCVTPD2DQZ256rmb\0" |
| 47096 | /* 45886 */ "VCVTTPH2DQZ256rmb\0" |
| 47097 | /* 45904 */ "VCVTPH2DQZ256rmb\0" |
| 47098 | /* 45921 */ "VCVTTPS2DQZ256rmb\0" |
| 47099 | /* 45939 */ "VCVTPS2DQZ256rmb\0" |
| 47100 | /* 45956 */ "VPADDQZ256rmb\0" |
| 47101 | /* 45970 */ "VPUNPCKHDQZ256rmb\0" |
| 47102 | /* 45988 */ "VPUNPCKLDQZ256rmb\0" |
| 47103 | /* 46006 */ "VPMULDQZ256rmb\0" |
| 47104 | /* 46021 */ "VPANDQZ256rmb\0" |
| 47105 | /* 46035 */ "VPUNPCKHQDQZ256rmb\0" |
| 47106 | /* 46054 */ "VPUNPCKLQDQZ256rmb\0" |
| 47107 | /* 46073 */ "VCVTTPD2UDQZ256rmb\0" |
| 47108 | /* 46092 */ "VCVTPD2UDQZ256rmb\0" |
| 47109 | /* 46110 */ "VCVTTPH2UDQZ256rmb\0" |
| 47110 | /* 46129 */ "VCVTPH2UDQZ256rmb\0" |
| 47111 | /* 46147 */ "VCVTTPS2UDQZ256rmb\0" |
| 47112 | /* 46166 */ "VCVTPS2UDQZ256rmb\0" |
| 47113 | /* 46184 */ "VPMULUDQZ256rmb\0" |
| 47114 | /* 46200 */ "VPMULLQZ256rmb\0" |
| 47115 | /* 46215 */ "VPBLENDMQZ256rmb\0" |
| 47116 | /* 46232 */ "VPTESTNMQZ256rmb\0" |
| 47117 | /* 46249 */ "VPERMQZ256rmb\0" |
| 47118 | /* 46263 */ "VPTESTMQZ256rmb\0" |
| 47119 | /* 46279 */ "VPANDNQZ256rmb\0" |
| 47120 | /* 46294 */ "VCVTTPD2QQZ256rmb\0" |
| 47121 | /* 46312 */ "VCVTPD2QQZ256rmb\0" |
| 47122 | /* 46329 */ "VCVTTPH2QQZ256rmb\0" |
| 47123 | /* 46347 */ "VCVTPH2QQZ256rmb\0" |
| 47124 | /* 46364 */ "VCVTTPS2QQZ256rmb\0" |
| 47125 | /* 46382 */ "VCVTPS2QQZ256rmb\0" |
| 47126 | /* 46399 */ "VPCMPEQQZ256rmb\0" |
| 47127 | /* 46415 */ "VCVTTPD2UQQZ256rmb\0" |
| 47128 | /* 46434 */ "VCVTPD2UQQZ256rmb\0" |
| 47129 | /* 46452 */ "VCVTTPH2UQQZ256rmb\0" |
| 47130 | /* 46471 */ "VCVTPH2UQQZ256rmb\0" |
| 47131 | /* 46489 */ "VCVTTPS2UQQZ256rmb\0" |
| 47132 | /* 46508 */ "VCVTPS2UQQZ256rmb\0" |
| 47133 | /* 46526 */ "VPORQZ256rmb\0" |
| 47134 | /* 46539 */ "VPXORQZ256rmb\0" |
| 47135 | /* 46553 */ "VPABSQZ256rmb\0" |
| 47136 | /* 46567 */ "VPMINSQZ256rmb\0" |
| 47137 | /* 46582 */ "VPMAXSQZ256rmb\0" |
| 47138 | /* 46597 */ "VP2INTERSECTQZ256rmb\0" |
| 47139 | /* 46618 */ "VPCONFLICTQZ256rmb\0" |
| 47140 | /* 46637 */ "VPCMPGTQZ256rmb\0" |
| 47141 | /* 46653 */ "VPOPCNTQZ256rmb\0" |
| 47142 | /* 46669 */ "VPLZCNTQZ256rmb\0" |
| 47143 | /* 46685 */ "VPMINUQZ256rmb\0" |
| 47144 | /* 46700 */ "VPMAXUQZ256rmb\0" |
| 47145 | /* 46715 */ "VPSRAVQZ256rmb\0" |
| 47146 | /* 46730 */ "VPSLLVQZ256rmb\0" |
| 47147 | /* 46745 */ "VPROLVQZ256rmb\0" |
| 47148 | /* 46760 */ "VPSRLVQZ256rmb\0" |
| 47149 | /* 46775 */ "VPRORVQZ256rmb\0" |
| 47150 | /* 46790 */ "VCVTPD2PSZ256rmb\0" |
| 47151 | /* 46807 */ "VPERMI2PSZ256rmb\0" |
| 47152 | /* 46824 */ "VCVTDQ2PSZ256rmb\0" |
| 47153 | /* 46841 */ "VCVTUDQ2PSZ256rmb\0" |
| 47154 | /* 46859 */ "VCVTQQ2PSZ256rmb\0" |
| 47155 | /* 46876 */ "VCVTUQQ2PSZ256rmb\0" |
| 47156 | /* 46894 */ "VPERMT2PSZ256rmb\0" |
| 47157 | /* 46911 */ "VSUBPSZ256rmb\0" |
| 47158 | /* 46925 */ "VMINCPSZ256rmb\0" |
| 47159 | /* 46940 */ "VMAXCPSZ256rmb\0" |
| 47160 | /* 46955 */ "VADDPSZ256rmb\0" |
| 47161 | /* 46969 */ "VANDPSZ256rmb\0" |
| 47162 | /* 46983 */ "VSCALEFPSZ256rmb\0" |
| 47163 | /* 47000 */ "VUNPCKHPSZ256rmb\0" |
| 47164 | /* 47017 */ "VPERMILPSZ256rmb\0" |
| 47165 | /* 47034 */ "VUNPCKLPSZ256rmb\0" |
| 47166 | /* 47051 */ "VMULPSZ256rmb\0" |
| 47167 | /* 47065 */ "VBLENDMPSZ256rmb\0" |
| 47168 | /* 47082 */ "VPERMPSZ256rmb\0" |
| 47169 | /* 47097 */ "VANDNPSZ256rmb\0" |
| 47170 | /* 47112 */ "VMINPSZ256rmb\0" |
| 47171 | /* 47126 */ "VORPSZ256rmb\0" |
| 47172 | /* 47139 */ "VXORPSZ256rmb\0" |
| 47173 | /* 47153 */ "VFPCLASSPSZ256rmb\0" |
| 47174 | /* 47171 */ "VDIVPSZ256rmb\0" |
| 47175 | /* 47185 */ "VMAXPSZ256rmb\0" |
| 47176 | /* 47199 */ "VCVTTPH2WZ256rmb\0" |
| 47177 | /* 47216 */ "VCVTPH2WZ256rmb\0" |
| 47178 | /* 47232 */ "VPACKSSDWZ256rmb\0" |
| 47179 | /* 47249 */ "VPACKUSDWZ256rmb\0" |
| 47180 | /* 47266 */ "VCVTTPH2UWZ256rmb\0" |
| 47181 | /* 47284 */ "VCVTPH2UWZ256rmb\0" |
| 47182 | /* 47301 */ "VCVTPS2PHXZ256rmb\0" |
| 47183 | /* 47319 */ "VCVTPH2PSXZ256rmb\0" |
| 47184 | /* 47337 */ "VCVTNE2PS2BF16Z128rmb\0" |
| 47185 | /* 47359 */ "VCVTNEPS2BF16Z128rmb\0" |
| 47186 | /* 47380 */ "VPMULTISHIFTQBZ128rmb\0" |
| 47187 | /* 47402 */ "VPERMI2DZ128rmb\0" |
| 47188 | /* 47418 */ "VPERMT2DZ128rmb\0" |
| 47189 | /* 47434 */ "VPSUBDZ128rmb\0" |
| 47190 | /* 47448 */ "VPADDDZ128rmb\0" |
| 47191 | /* 47462 */ "VPANDDZ128rmb\0" |
| 47192 | /* 47476 */ "VPMULLDZ128rmb\0" |
| 47193 | /* 47491 */ "VPBLENDMDZ128rmb\0" |
| 47194 | /* 47508 */ "VPTESTNMDZ128rmb\0" |
| 47195 | /* 47525 */ "VPTESTMDZ128rmb\0" |
| 47196 | /* 47541 */ "VPANDNDZ128rmb\0" |
| 47197 | /* 47556 */ "VCVTPH2PDZ128rmb\0" |
| 47198 | /* 47573 */ "VPERMI2PDZ128rmb\0" |
| 47199 | /* 47590 */ "VCVTDQ2PDZ128rmb\0" |
| 47200 | /* 47607 */ "VCVTUDQ2PDZ128rmb\0" |
| 47201 | /* 47625 */ "VCVTQQ2PDZ128rmb\0" |
| 47202 | /* 47642 */ "VCVTUQQ2PDZ128rmb\0" |
| 47203 | /* 47660 */ "VCVTPS2PDZ128rmb\0" |
| 47204 | /* 47677 */ "VPERMT2PDZ128rmb\0" |
| 47205 | /* 47694 */ "VSUBPDZ128rmb\0" |
| 47206 | /* 47708 */ "VMINCPDZ128rmb\0" |
| 47207 | /* 47723 */ "VMAXCPDZ128rmb\0" |
| 47208 | /* 47738 */ "VADDPDZ128rmb\0" |
| 47209 | /* 47752 */ "VANDPDZ128rmb\0" |
| 47210 | /* 47766 */ "VSCALEFPDZ128rmb\0" |
| 47211 | /* 47783 */ "VUNPCKHPDZ128rmb\0" |
| 47212 | /* 47800 */ "VPERMILPDZ128rmb\0" |
| 47213 | /* 47817 */ "VUNPCKLPDZ128rmb\0" |
| 47214 | /* 47834 */ "VMULPDZ128rmb\0" |
| 47215 | /* 47848 */ "VBLENDMPDZ128rmb\0" |
| 47216 | /* 47865 */ "VANDNPDZ128rmb\0" |
| 47217 | /* 47880 */ "VMINPDZ128rmb\0" |
| 47218 | /* 47894 */ "VORPDZ128rmb\0" |
| 47219 | /* 47907 */ "VXORPDZ128rmb\0" |
| 47220 | /* 47921 */ "VFPCLASSPDZ128rmb\0" |
| 47221 | /* 47939 */ "VDIVPDZ128rmb\0" |
| 47222 | /* 47953 */ "VMAXPDZ128rmb\0" |
| 47223 | /* 47967 */ "VPCMPEQDZ128rmb\0" |
| 47224 | /* 47983 */ "VPORDZ128rmb\0" |
| 47225 | /* 47996 */ "VPXORDZ128rmb\0" |
| 47226 | /* 48010 */ "VPABSDZ128rmb\0" |
| 47227 | /* 48024 */ "VPMINSDZ128rmb\0" |
| 47228 | /* 48039 */ "VPMAXSDZ128rmb\0" |
| 47229 | /* 48054 */ "VP2INTERSECTDZ128rmb\0" |
| 47230 | /* 48075 */ "VPCONFLICTDZ128rmb\0" |
| 47231 | /* 48094 */ "VPCMPGTDZ128rmb\0" |
| 47232 | /* 48110 */ "VPOPCNTDZ128rmb\0" |
| 47233 | /* 48126 */ "VPLZCNTDZ128rmb\0" |
| 47234 | /* 48142 */ "VPMINUDZ128rmb\0" |
| 47235 | /* 48157 */ "VPMAXUDZ128rmb\0" |
| 47236 | /* 48172 */ "VPSRAVDZ128rmb\0" |
| 47237 | /* 48187 */ "VPSLLVDZ128rmb\0" |
| 47238 | /* 48202 */ "VPROLVDZ128rmb\0" |
| 47239 | /* 48217 */ "VPSRLVDZ128rmb\0" |
| 47240 | /* 48232 */ "VPRORVDZ128rmb\0" |
| 47241 | /* 48247 */ "VCVTPD2PHZ128rmb\0" |
| 47242 | /* 48264 */ "VCVTDQ2PHZ128rmb\0" |
| 47243 | /* 48281 */ "VCVTUDQ2PHZ128rmb\0" |
| 47244 | /* 48299 */ "VCVTQQ2PHZ128rmb\0" |
| 47245 | /* 48316 */ "VCVTUQQ2PHZ128rmb\0" |
| 47246 | /* 48334 */ "VCVTW2PHZ128rmb\0" |
| 47247 | /* 48350 */ "VCVTUW2PHZ128rmb\0" |
| 47248 | /* 48367 */ "VSUBPHZ128rmb\0" |
| 47249 | /* 48381 */ "VFCMULCPHZ128rmb\0" |
| 47250 | /* 48398 */ "VFMULCPHZ128rmb\0" |
| 47251 | /* 48414 */ "VMINCPHZ128rmb\0" |
| 47252 | /* 48429 */ "VMAXCPHZ128rmb\0" |
| 47253 | /* 48444 */ "VADDPHZ128rmb\0" |
| 47254 | /* 48458 */ "VSCALEFPHZ128rmb\0" |
| 47255 | /* 48475 */ "VMULPHZ128rmb\0" |
| 47256 | /* 48489 */ "VMINPHZ128rmb\0" |
| 47257 | /* 48503 */ "VFPCLASSPHZ128rmb\0" |
| 47258 | /* 48521 */ "VDIVPHZ128rmb\0" |
| 47259 | /* 48535 */ "VMAXPHZ128rmb\0" |
| 47260 | /* 48549 */ "VPERMI2QZ128rmb\0" |
| 47261 | /* 48565 */ "VPERMT2QZ128rmb\0" |
| 47262 | /* 48581 */ "VPSUBQZ128rmb\0" |
| 47263 | /* 48595 */ "VCVTTPD2DQZ128rmb\0" |
| 47264 | /* 48613 */ "VCVTPD2DQZ128rmb\0" |
| 47265 | /* 48630 */ "VCVTTPH2DQZ128rmb\0" |
| 47266 | /* 48648 */ "VCVTPH2DQZ128rmb\0" |
| 47267 | /* 48665 */ "VCVTTPS2DQZ128rmb\0" |
| 47268 | /* 48683 */ "VCVTPS2DQZ128rmb\0" |
| 47269 | /* 48700 */ "VPADDQZ128rmb\0" |
| 47270 | /* 48714 */ "VPUNPCKHDQZ128rmb\0" |
| 47271 | /* 48732 */ "VPUNPCKLDQZ128rmb\0" |
| 47272 | /* 48750 */ "VPMULDQZ128rmb\0" |
| 47273 | /* 48765 */ "VPANDQZ128rmb\0" |
| 47274 | /* 48779 */ "VPUNPCKHQDQZ128rmb\0" |
| 47275 | /* 48798 */ "VPUNPCKLQDQZ128rmb\0" |
| 47276 | /* 48817 */ "VCVTTPD2UDQZ128rmb\0" |
| 47277 | /* 48836 */ "VCVTPD2UDQZ128rmb\0" |
| 47278 | /* 48854 */ "VCVTTPH2UDQZ128rmb\0" |
| 47279 | /* 48873 */ "VCVTPH2UDQZ128rmb\0" |
| 47280 | /* 48891 */ "VCVTTPS2UDQZ128rmb\0" |
| 47281 | /* 48910 */ "VCVTPS2UDQZ128rmb\0" |
| 47282 | /* 48928 */ "VPMULUDQZ128rmb\0" |
| 47283 | /* 48944 */ "VPMULLQZ128rmb\0" |
| 47284 | /* 48959 */ "VPBLENDMQZ128rmb\0" |
| 47285 | /* 48976 */ "VPTESTNMQZ128rmb\0" |
| 47286 | /* 48993 */ "VPTESTMQZ128rmb\0" |
| 47287 | /* 49009 */ "VPANDNQZ128rmb\0" |
| 47288 | /* 49024 */ "VCVTTPD2QQZ128rmb\0" |
| 47289 | /* 49042 */ "VCVTPD2QQZ128rmb\0" |
| 47290 | /* 49059 */ "VCVTTPH2QQZ128rmb\0" |
| 47291 | /* 49077 */ "VCVTPH2QQZ128rmb\0" |
| 47292 | /* 49094 */ "VCVTTPS2QQZ128rmb\0" |
| 47293 | /* 49112 */ "VCVTPS2QQZ128rmb\0" |
| 47294 | /* 49129 */ "VPCMPEQQZ128rmb\0" |
| 47295 | /* 49145 */ "VCVTTPD2UQQZ128rmb\0" |
| 47296 | /* 49164 */ "VCVTPD2UQQZ128rmb\0" |
| 47297 | /* 49182 */ "VCVTTPH2UQQZ128rmb\0" |
| 47298 | /* 49201 */ "VCVTPH2UQQZ128rmb\0" |
| 47299 | /* 49219 */ "VCVTTPS2UQQZ128rmb\0" |
| 47300 | /* 49238 */ "VCVTPS2UQQZ128rmb\0" |
| 47301 | /* 49256 */ "VPORQZ128rmb\0" |
| 47302 | /* 49269 */ "VPXORQZ128rmb\0" |
| 47303 | /* 49283 */ "VPABSQZ128rmb\0" |
| 47304 | /* 49297 */ "VPMINSQZ128rmb\0" |
| 47305 | /* 49312 */ "VPMAXSQZ128rmb\0" |
| 47306 | /* 49327 */ "VP2INTERSECTQZ128rmb\0" |
| 47307 | /* 49348 */ "VPCONFLICTQZ128rmb\0" |
| 47308 | /* 49367 */ "VPCMPGTQZ128rmb\0" |
| 47309 | /* 49383 */ "VPOPCNTQZ128rmb\0" |
| 47310 | /* 49399 */ "VPLZCNTQZ128rmb\0" |
| 47311 | /* 49415 */ "VPMINUQZ128rmb\0" |
| 47312 | /* 49430 */ "VPMAXUQZ128rmb\0" |
| 47313 | /* 49445 */ "VPSRAVQZ128rmb\0" |
| 47314 | /* 49460 */ "VPSLLVQZ128rmb\0" |
| 47315 | /* 49475 */ "VPROLVQZ128rmb\0" |
| 47316 | /* 49490 */ "VPSRLVQZ128rmb\0" |
| 47317 | /* 49505 */ "VPRORVQZ128rmb\0" |
| 47318 | /* 49520 */ "VCVTPD2PSZ128rmb\0" |
| 47319 | /* 49537 */ "VPERMI2PSZ128rmb\0" |
| 47320 | /* 49554 */ "VCVTDQ2PSZ128rmb\0" |
| 47321 | /* 49571 */ "VCVTUDQ2PSZ128rmb\0" |
| 47322 | /* 49589 */ "VCVTQQ2PSZ128rmb\0" |
| 47323 | /* 49606 */ "VCVTUQQ2PSZ128rmb\0" |
| 47324 | /* 49624 */ "VPERMT2PSZ128rmb\0" |
| 47325 | /* 49641 */ "VSUBPSZ128rmb\0" |
| 47326 | /* 49655 */ "VMINCPSZ128rmb\0" |
| 47327 | /* 49670 */ "VMAXCPSZ128rmb\0" |
| 47328 | /* 49685 */ "VADDPSZ128rmb\0" |
| 47329 | /* 49699 */ "VANDPSZ128rmb\0" |
| 47330 | /* 49713 */ "VSCALEFPSZ128rmb\0" |
| 47331 | /* 49730 */ "VUNPCKHPSZ128rmb\0" |
| 47332 | /* 49747 */ "VPERMILPSZ128rmb\0" |
| 47333 | /* 49764 */ "VUNPCKLPSZ128rmb\0" |
| 47334 | /* 49781 */ "VMULPSZ128rmb\0" |
| 47335 | /* 49795 */ "VBLENDMPSZ128rmb\0" |
| 47336 | /* 49812 */ "VANDNPSZ128rmb\0" |
| 47337 | /* 49827 */ "VMINPSZ128rmb\0" |
| 47338 | /* 49841 */ "VORPSZ128rmb\0" |
| 47339 | /* 49854 */ "VXORPSZ128rmb\0" |
| 47340 | /* 49868 */ "VFPCLASSPSZ128rmb\0" |
| 47341 | /* 49886 */ "VDIVPSZ128rmb\0" |
| 47342 | /* 49900 */ "VMAXPSZ128rmb\0" |
| 47343 | /* 49914 */ "VCVTTPH2WZ128rmb\0" |
| 47344 | /* 49931 */ "VCVTPH2WZ128rmb\0" |
| 47345 | /* 49947 */ "VPACKSSDWZ128rmb\0" |
| 47346 | /* 49964 */ "VPACKUSDWZ128rmb\0" |
| 47347 | /* 49981 */ "VCVTTPH2UWZ128rmb\0" |
| 47348 | /* 49999 */ "VCVTPH2UWZ128rmb\0" |
| 47349 | /* 50016 */ "VCVTPS2PHXZ128rmb\0" |
| 47350 | /* 50034 */ "VCVTPH2PSXZ128rmb\0" |
| 47351 | /* 50052 */ "VCVTNE2PS2BF16Zrmb\0" |
| 47352 | /* 50071 */ "VCVTNEPS2BF16Zrmb\0" |
| 47353 | /* 50089 */ "VPMULTISHIFTQBZrmb\0" |
| 47354 | /* 50108 */ "VPERMI2DZrmb\0" |
| 47355 | /* 50121 */ "VPERMT2DZrmb\0" |
| 47356 | /* 50134 */ "VPSUBDZrmb\0" |
| 47357 | /* 50145 */ "VPADDDZrmb\0" |
| 47358 | /* 50156 */ "VPANDDZrmb\0" |
| 47359 | /* 50167 */ "VPMULLDZrmb\0" |
| 47360 | /* 50179 */ "VPBLENDMDZrmb\0" |
| 47361 | /* 50193 */ "VPTESTNMDZrmb\0" |
| 47362 | /* 50207 */ "VPERMDZrmb\0" |
| 47363 | /* 50218 */ "VPTESTMDZrmb\0" |
| 47364 | /* 50231 */ "VPANDNDZrmb\0" |
| 47365 | /* 50243 */ "VCVTPH2PDZrmb\0" |
| 47366 | /* 50257 */ "VPERMI2PDZrmb\0" |
| 47367 | /* 50271 */ "VCVTDQ2PDZrmb\0" |
| 47368 | /* 50285 */ "VCVTUDQ2PDZrmb\0" |
| 47369 | /* 50300 */ "VCVTQQ2PDZrmb\0" |
| 47370 | /* 50314 */ "VCVTUQQ2PDZrmb\0" |
| 47371 | /* 50329 */ "VCVTPS2PDZrmb\0" |
| 47372 | /* 50343 */ "VPERMT2PDZrmb\0" |
| 47373 | /* 50357 */ "VSUBPDZrmb\0" |
| 47374 | /* 50368 */ "VMINCPDZrmb\0" |
| 47375 | /* 50380 */ "VMAXCPDZrmb\0" |
| 47376 | /* 50392 */ "VADDPDZrmb\0" |
| 47377 | /* 50403 */ "VANDPDZrmb\0" |
| 47378 | /* 50414 */ "VSCALEFPDZrmb\0" |
| 47379 | /* 50428 */ "VUNPCKHPDZrmb\0" |
| 47380 | /* 50442 */ "VPERMILPDZrmb\0" |
| 47381 | /* 50456 */ "VUNPCKLPDZrmb\0" |
| 47382 | /* 50470 */ "VMULPDZrmb\0" |
| 47383 | /* 50481 */ "VBLENDMPDZrmb\0" |
| 47384 | /* 50495 */ "VPERMPDZrmb\0" |
| 47385 | /* 50507 */ "VANDNPDZrmb\0" |
| 47386 | /* 50519 */ "VMINPDZrmb\0" |
| 47387 | /* 50530 */ "VORPDZrmb\0" |
| 47388 | /* 50540 */ "VXORPDZrmb\0" |
| 47389 | /* 50551 */ "VFPCLASSPDZrmb\0" |
| 47390 | /* 50566 */ "VDIVPDZrmb\0" |
| 47391 | /* 50577 */ "VMAXPDZrmb\0" |
| 47392 | /* 50588 */ "VPCMPEQDZrmb\0" |
| 47393 | /* 50601 */ "VPORDZrmb\0" |
| 47394 | /* 50611 */ "VPXORDZrmb\0" |
| 47395 | /* 50622 */ "VPABSDZrmb\0" |
| 47396 | /* 50633 */ "VPMINSDZrmb\0" |
| 47397 | /* 50645 */ "VPMAXSDZrmb\0" |
| 47398 | /* 50657 */ "VP2INTERSECTDZrmb\0" |
| 47399 | /* 50675 */ "VPCONFLICTDZrmb\0" |
| 47400 | /* 50691 */ "VPCMPGTDZrmb\0" |
| 47401 | /* 50704 */ "VPOPCNTDZrmb\0" |
| 47402 | /* 50717 */ "VPLZCNTDZrmb\0" |
| 47403 | /* 50730 */ "VPMINUDZrmb\0" |
| 47404 | /* 50742 */ "VPMAXUDZrmb\0" |
| 47405 | /* 50754 */ "VPSRAVDZrmb\0" |
| 47406 | /* 50766 */ "VPSLLVDZrmb\0" |
| 47407 | /* 50778 */ "VPROLVDZrmb\0" |
| 47408 | /* 50790 */ "VPSRLVDZrmb\0" |
| 47409 | /* 50802 */ "VPRORVDZrmb\0" |
| 47410 | /* 50814 */ "VCVTPD2PHZrmb\0" |
| 47411 | /* 50828 */ "VCVTDQ2PHZrmb\0" |
| 47412 | /* 50842 */ "VCVTUDQ2PHZrmb\0" |
| 47413 | /* 50857 */ "VCVTQQ2PHZrmb\0" |
| 47414 | /* 50871 */ "VCVTUQQ2PHZrmb\0" |
| 47415 | /* 50886 */ "VCVTW2PHZrmb\0" |
| 47416 | /* 50899 */ "VCVTUW2PHZrmb\0" |
| 47417 | /* 50913 */ "VSUBPHZrmb\0" |
| 47418 | /* 50924 */ "VFCMULCPHZrmb\0" |
| 47419 | /* 50938 */ "VFMULCPHZrmb\0" |
| 47420 | /* 50951 */ "VMINCPHZrmb\0" |
| 47421 | /* 50963 */ "VMAXCPHZrmb\0" |
| 47422 | /* 50975 */ "VADDPHZrmb\0" |
| 47423 | /* 50986 */ "VSCALEFPHZrmb\0" |
| 47424 | /* 51000 */ "VMULPHZrmb\0" |
| 47425 | /* 51011 */ "VMINPHZrmb\0" |
| 47426 | /* 51022 */ "VFPCLASSPHZrmb\0" |
| 47427 | /* 51037 */ "VDIVPHZrmb\0" |
| 47428 | /* 51048 */ "VMAXPHZrmb\0" |
| 47429 | /* 51059 */ "VPERMI2QZrmb\0" |
| 47430 | /* 51072 */ "VPERMT2QZrmb\0" |
| 47431 | /* 51085 */ "VPSUBQZrmb\0" |
| 47432 | /* 51096 */ "VCVTTPD2DQZrmb\0" |
| 47433 | /* 51111 */ "VCVTPD2DQZrmb\0" |
| 47434 | /* 51125 */ "VCVTTPH2DQZrmb\0" |
| 47435 | /* 51140 */ "VCVTPH2DQZrmb\0" |
| 47436 | /* 51154 */ "VCVTTPS2DQZrmb\0" |
| 47437 | /* 51169 */ "VCVTPS2DQZrmb\0" |
| 47438 | /* 51183 */ "VPADDQZrmb\0" |
| 47439 | /* 51194 */ "VPUNPCKHDQZrmb\0" |
| 47440 | /* 51209 */ "VPUNPCKLDQZrmb\0" |
| 47441 | /* 51224 */ "VPMULDQZrmb\0" |
| 47442 | /* 51236 */ "VPANDQZrmb\0" |
| 47443 | /* 51247 */ "VPUNPCKHQDQZrmb\0" |
| 47444 | /* 51263 */ "VPUNPCKLQDQZrmb\0" |
| 47445 | /* 51279 */ "VCVTTPD2UDQZrmb\0" |
| 47446 | /* 51295 */ "VCVTPD2UDQZrmb\0" |
| 47447 | /* 51310 */ "VCVTTPH2UDQZrmb\0" |
| 47448 | /* 51326 */ "VCVTPH2UDQZrmb\0" |
| 47449 | /* 51341 */ "VCVTTPS2UDQZrmb\0" |
| 47450 | /* 51357 */ "VCVTPS2UDQZrmb\0" |
| 47451 | /* 51372 */ "VPMULUDQZrmb\0" |
| 47452 | /* 51385 */ "VPMULLQZrmb\0" |
| 47453 | /* 51397 */ "VPBLENDMQZrmb\0" |
| 47454 | /* 51411 */ "VPTESTNMQZrmb\0" |
| 47455 | /* 51425 */ "VPERMQZrmb\0" |
| 47456 | /* 51436 */ "VPTESTMQZrmb\0" |
| 47457 | /* 51449 */ "VPANDNQZrmb\0" |
| 47458 | /* 51461 */ "VCVTTPD2QQZrmb\0" |
| 47459 | /* 51476 */ "VCVTPD2QQZrmb\0" |
| 47460 | /* 51490 */ "VCVTTPH2QQZrmb\0" |
| 47461 | /* 51505 */ "VCVTPH2QQZrmb\0" |
| 47462 | /* 51519 */ "VCVTTPS2QQZrmb\0" |
| 47463 | /* 51534 */ "VCVTPS2QQZrmb\0" |
| 47464 | /* 51548 */ "VPCMPEQQZrmb\0" |
| 47465 | /* 51561 */ "VCVTTPD2UQQZrmb\0" |
| 47466 | /* 51577 */ "VCVTPD2UQQZrmb\0" |
| 47467 | /* 51592 */ "VCVTTPH2UQQZrmb\0" |
| 47468 | /* 51608 */ "VCVTPH2UQQZrmb\0" |
| 47469 | /* 51623 */ "VCVTTPS2UQQZrmb\0" |
| 47470 | /* 51639 */ "VCVTPS2UQQZrmb\0" |
| 47471 | /* 51654 */ "VPORQZrmb\0" |
| 47472 | /* 51664 */ "VPXORQZrmb\0" |
| 47473 | /* 51675 */ "VPABSQZrmb\0" |
| 47474 | /* 51686 */ "VPMINSQZrmb\0" |
| 47475 | /* 51698 */ "VPMAXSQZrmb\0" |
| 47476 | /* 51710 */ "VP2INTERSECTQZrmb\0" |
| 47477 | /* 51728 */ "VPCONFLICTQZrmb\0" |
| 47478 | /* 51744 */ "VPCMPGTQZrmb\0" |
| 47479 | /* 51757 */ "VPOPCNTQZrmb\0" |
| 47480 | /* 51770 */ "VPLZCNTQZrmb\0" |
| 47481 | /* 51783 */ "VPMINUQZrmb\0" |
| 47482 | /* 51795 */ "VPMAXUQZrmb\0" |
| 47483 | /* 51807 */ "VPSRAVQZrmb\0" |
| 47484 | /* 51819 */ "VPSLLVQZrmb\0" |
| 47485 | /* 51831 */ "VPROLVQZrmb\0" |
| 47486 | /* 51843 */ "VPSRLVQZrmb\0" |
| 47487 | /* 51855 */ "VPRORVQZrmb\0" |
| 47488 | /* 51867 */ "VCVTPD2PSZrmb\0" |
| 47489 | /* 51881 */ "VPERMI2PSZrmb\0" |
| 47490 | /* 51895 */ "VCVTDQ2PSZrmb\0" |
| 47491 | /* 51909 */ "VCVTUDQ2PSZrmb\0" |
| 47492 | /* 51924 */ "VCVTQQ2PSZrmb\0" |
| 47493 | /* 51938 */ "VCVTUQQ2PSZrmb\0" |
| 47494 | /* 51953 */ "VPERMT2PSZrmb\0" |
| 47495 | /* 51967 */ "VSUBPSZrmb\0" |
| 47496 | /* 51978 */ "VMINCPSZrmb\0" |
| 47497 | /* 51990 */ "VMAXCPSZrmb\0" |
| 47498 | /* 52002 */ "VADDPSZrmb\0" |
| 47499 | /* 52013 */ "VANDPSZrmb\0" |
| 47500 | /* 52024 */ "VSCALEFPSZrmb\0" |
| 47501 | /* 52038 */ "VUNPCKHPSZrmb\0" |
| 47502 | /* 52052 */ "VPERMILPSZrmb\0" |
| 47503 | /* 52066 */ "VUNPCKLPSZrmb\0" |
| 47504 | /* 52080 */ "VMULPSZrmb\0" |
| 47505 | /* 52091 */ "VBLENDMPSZrmb\0" |
| 47506 | /* 52105 */ "VPERMPSZrmb\0" |
| 47507 | /* 52117 */ "VANDNPSZrmb\0" |
| 47508 | /* 52129 */ "VMINPSZrmb\0" |
| 47509 | /* 52140 */ "VORPSZrmb\0" |
| 47510 | /* 52150 */ "VXORPSZrmb\0" |
| 47511 | /* 52161 */ "VFPCLASSPSZrmb\0" |
| 47512 | /* 52176 */ "VDIVPSZrmb\0" |
| 47513 | /* 52187 */ "VMAXPSZrmb\0" |
| 47514 | /* 52198 */ "VCVTTPH2WZrmb\0" |
| 47515 | /* 52212 */ "VCVTPH2WZrmb\0" |
| 47516 | /* 52225 */ "VPACKSSDWZrmb\0" |
| 47517 | /* 52239 */ "VPACKUSDWZrmb\0" |
| 47518 | /* 52253 */ "VCVTTPH2UWZrmb\0" |
| 47519 | /* 52268 */ "VCVTPH2UWZrmb\0" |
| 47520 | /* 52282 */ "VCVTPS2PHXZrmb\0" |
| 47521 | /* 52297 */ "VCVTPH2PSXZrmb\0" |
| 47522 | /* 52312 */ "VFMADDSUB231PDZrb\0" |
| 47523 | /* 52330 */ "VFMSUB231PDZrb\0" |
| 47524 | /* 52345 */ "VFNMSUB231PDZrb\0" |
| 47525 | /* 52361 */ "VFMSUBADD231PDZrb\0" |
| 47526 | /* 52379 */ "VFMADD231PDZrb\0" |
| 47527 | /* 52394 */ "VFNMADD231PDZrb\0" |
| 47528 | /* 52410 */ "VFMADDSUB132PDZrb\0" |
| 47529 | /* 52428 */ "VFMSUB132PDZrb\0" |
| 47530 | /* 52443 */ "VFNMSUB132PDZrb\0" |
| 47531 | /* 52459 */ "VFMSUBADD132PDZrb\0" |
| 47532 | /* 52477 */ "VFMADD132PDZrb\0" |
| 47533 | /* 52492 */ "VFNMADD132PDZrb\0" |
| 47534 | /* 52508 */ "VEXP2PDZrb\0" |
| 47535 | /* 52519 */ "VFMADDSUB213PDZrb\0" |
| 47536 | /* 52537 */ "VFMSUB213PDZrb\0" |
| 47537 | /* 52552 */ "VFNMSUB213PDZrb\0" |
| 47538 | /* 52568 */ "VFMSUBADD213PDZrb\0" |
| 47539 | /* 52586 */ "VFMADD213PDZrb\0" |
| 47540 | /* 52601 */ "VFNMADD213PDZrb\0" |
| 47541 | /* 52617 */ "VRCP28PDZrb\0" |
| 47542 | /* 52629 */ "VRSQRT28PDZrb\0" |
| 47543 | /* 52643 */ "VGETEXPPDZrb\0" |
| 47544 | /* 52656 */ "VSQRTPDZrb\0" |
| 47545 | /* 52667 */ "VFMSUB231SDZrb\0" |
| 47546 | /* 52682 */ "VFNMSUB231SDZrb\0" |
| 47547 | /* 52698 */ "VFMADD231SDZrb\0" |
| 47548 | /* 52713 */ "VFNMADD231SDZrb\0" |
| 47549 | /* 52729 */ "VFMSUB132SDZrb\0" |
| 47550 | /* 52744 */ "VFNMSUB132SDZrb\0" |
| 47551 | /* 52760 */ "VFMADD132SDZrb\0" |
| 47552 | /* 52775 */ "VFNMADD132SDZrb\0" |
| 47553 | /* 52791 */ "VFMSUB213SDZrb\0" |
| 47554 | /* 52806 */ "VFNMSUB213SDZrb\0" |
| 47555 | /* 52822 */ "VFMADD213SDZrb\0" |
| 47556 | /* 52837 */ "VFNMADD213SDZrb\0" |
| 47557 | /* 52853 */ "VRCP28SDZrb\0" |
| 47558 | /* 52865 */ "VRSQRT28SDZrb\0" |
| 47559 | /* 52879 */ "VGETEXPSDZrb\0" |
| 47560 | /* 52892 */ "VFMADDSUB231PHZrb\0" |
| 47561 | /* 52910 */ "VFMSUB231PHZrb\0" |
| 47562 | /* 52925 */ "VFNMSUB231PHZrb\0" |
| 47563 | /* 52941 */ "VFMSUBADD231PHZrb\0" |
| 47564 | /* 52959 */ "VFMADD231PHZrb\0" |
| 47565 | /* 52974 */ "VFNMADD231PHZrb\0" |
| 47566 | /* 52990 */ "VFMADDSUB132PHZrb\0" |
| 47567 | /* 53008 */ "VFMSUB132PHZrb\0" |
| 47568 | /* 53023 */ "VFNMSUB132PHZrb\0" |
| 47569 | /* 53039 */ "VFMSUBADD132PHZrb\0" |
| 47570 | /* 53057 */ "VFMADD132PHZrb\0" |
| 47571 | /* 53072 */ "VFNMADD132PHZrb\0" |
| 47572 | /* 53088 */ "VFMADDSUB213PHZrb\0" |
| 47573 | /* 53106 */ "VFMSUB213PHZrb\0" |
| 47574 | /* 53121 */ "VFNMSUB213PHZrb\0" |
| 47575 | /* 53137 */ "VFMSUBADD213PHZrb\0" |
| 47576 | /* 53155 */ "VFMADD213PHZrb\0" |
| 47577 | /* 53170 */ "VFNMADD213PHZrb\0" |
| 47578 | /* 53186 */ "VFCMADDCPHZrb\0" |
| 47579 | /* 53200 */ "VFMADDCPHZrb\0" |
| 47580 | /* 53213 */ "VGETEXPPHZrb\0" |
| 47581 | /* 53226 */ "VSQRTPHZrb\0" |
| 47582 | /* 53237 */ "VFMSUB231SHZrb\0" |
| 47583 | /* 53252 */ "VFNMSUB231SHZrb\0" |
| 47584 | /* 53268 */ "VFMADD231SHZrb\0" |
| 47585 | /* 53283 */ "VFNMADD231SHZrb\0" |
| 47586 | /* 53299 */ "VFMSUB132SHZrb\0" |
| 47587 | /* 53314 */ "VFNMSUB132SHZrb\0" |
| 47588 | /* 53330 */ "VFMADD132SHZrb\0" |
| 47589 | /* 53345 */ "VFNMADD132SHZrb\0" |
| 47590 | /* 53361 */ "VFMSUB213SHZrb\0" |
| 47591 | /* 53376 */ "VFNMSUB213SHZrb\0" |
| 47592 | /* 53392 */ "VFMADD213SHZrb\0" |
| 47593 | /* 53407 */ "VFNMADD213SHZrb\0" |
| 47594 | /* 53423 */ "VFCMADDCSHZrb\0" |
| 47595 | /* 53437 */ "VFMADDCSHZrb\0" |
| 47596 | /* 53450 */ "VGETEXPSHZrb\0" |
| 47597 | /* 53463 */ "VFMADDSUB231PSZrb\0" |
| 47598 | /* 53481 */ "VFMSUB231PSZrb\0" |
| 47599 | /* 53496 */ "VFNMSUB231PSZrb\0" |
| 47600 | /* 53512 */ "VFMSUBADD231PSZrb\0" |
| 47601 | /* 53530 */ "VFMADD231PSZrb\0" |
| 47602 | /* 53545 */ "VFNMADD231PSZrb\0" |
| 47603 | /* 53561 */ "VFMADDSUB132PSZrb\0" |
| 47604 | /* 53579 */ "VFMSUB132PSZrb\0" |
| 47605 | /* 53594 */ "VFNMSUB132PSZrb\0" |
| 47606 | /* 53610 */ "VFMSUBADD132PSZrb\0" |
| 47607 | /* 53628 */ "VFMADD132PSZrb\0" |
| 47608 | /* 53643 */ "VFNMADD132PSZrb\0" |
| 47609 | /* 53659 */ "VEXP2PSZrb\0" |
| 47610 | /* 53670 */ "VFMADDSUB213PSZrb\0" |
| 47611 | /* 53688 */ "VFMSUB213PSZrb\0" |
| 47612 | /* 53703 */ "VFNMSUB213PSZrb\0" |
| 47613 | /* 53719 */ "VFMSUBADD213PSZrb\0" |
| 47614 | /* 53737 */ "VFMADD213PSZrb\0" |
| 47615 | /* 53752 */ "VFNMADD213PSZrb\0" |
| 47616 | /* 53768 */ "VRCP28PSZrb\0" |
| 47617 | /* 53780 */ "VRSQRT28PSZrb\0" |
| 47618 | /* 53794 */ "VGETEXPPSZrb\0" |
| 47619 | /* 53807 */ "VSQRTPSZrb\0" |
| 47620 | /* 53818 */ "VFMSUB231SSZrb\0" |
| 47621 | /* 53833 */ "VFNMSUB231SSZrb\0" |
| 47622 | /* 53849 */ "VFMADD231SSZrb\0" |
| 47623 | /* 53864 */ "VFNMADD231SSZrb\0" |
| 47624 | /* 53880 */ "VFMSUB132SSZrb\0" |
| 47625 | /* 53895 */ "VFNMSUB132SSZrb\0" |
| 47626 | /* 53911 */ "VFMADD132SSZrb\0" |
| 47627 | /* 53926 */ "VFNMADD132SSZrb\0" |
| 47628 | /* 53942 */ "VFMSUB213SSZrb\0" |
| 47629 | /* 53957 */ "VFNMSUB213SSZrb\0" |
| 47630 | /* 53973 */ "VFMADD213SSZrb\0" |
| 47631 | /* 53988 */ "VFNMADD213SSZrb\0" |
| 47632 | /* 54004 */ "VRCP28SSZrb\0" |
| 47633 | /* 54016 */ "VRSQRT28SSZrb\0" |
| 47634 | /* 54030 */ "VGETEXPSSZrb\0" |
| 47635 | /* 54043 */ "VCVTPH2PDZrrb\0" |
| 47636 | /* 54057 */ "VCVTQQ2PDZrrb\0" |
| 47637 | /* 54071 */ "VCVTUQQ2PDZrrb\0" |
| 47638 | /* 54086 */ "VCVTPS2PDZrrb\0" |
| 47639 | /* 54100 */ "VSUBPDZrrb\0" |
| 47640 | /* 54111 */ "VADDPDZrrb\0" |
| 47641 | /* 54122 */ "VSCALEFPDZrrb\0" |
| 47642 | /* 54136 */ "VMULPDZrrb\0" |
| 47643 | /* 54147 */ "VMINPDZrrb\0" |
| 47644 | /* 54158 */ "VDIVPDZrrb\0" |
| 47645 | /* 54169 */ "VMAXPDZrrb\0" |
| 47646 | /* 54180 */ "VUCOMISDZrrb\0" |
| 47647 | /* 54193 */ "VCOMISDZrrb\0" |
| 47648 | /* 54205 */ "VCVTPD2PHZrrb\0" |
| 47649 | /* 54219 */ "VCVTDQ2PHZrrb\0" |
| 47650 | /* 54233 */ "VCVTUDQ2PHZrrb\0" |
| 47651 | /* 54248 */ "VCVTQQ2PHZrrb\0" |
| 47652 | /* 54262 */ "VCVTUQQ2PHZrrb\0" |
| 47653 | /* 54277 */ "VCVTPS2PHZrrb\0" |
| 47654 | /* 54291 */ "VCVTW2PHZrrb\0" |
| 47655 | /* 54304 */ "VCVTUW2PHZrrb\0" |
| 47656 | /* 54318 */ "VSUBPHZrrb\0" |
| 47657 | /* 54329 */ "VFCMULCPHZrrb\0" |
| 47658 | /* 54343 */ "VFMULCPHZrrb\0" |
| 47659 | /* 54356 */ "VADDPHZrrb\0" |
| 47660 | /* 54367 */ "VSCALEFPHZrrb\0" |
| 47661 | /* 54381 */ "VMULPHZrrb\0" |
| 47662 | /* 54392 */ "VMINPHZrrb\0" |
| 47663 | /* 54403 */ "VDIVPHZrrb\0" |
| 47664 | /* 54414 */ "VMAXPHZrrb\0" |
| 47665 | /* 54425 */ "VFCMULCSHZrrb\0" |
| 47666 | /* 54439 */ "VFMULCSHZrrb\0" |
| 47667 | /* 54452 */ "VUCOMISHZrrb\0" |
| 47668 | /* 54465 */ "VCOMISHZrrb\0" |
| 47669 | /* 54477 */ "VCVTTPD2DQZrrb\0" |
| 47670 | /* 54492 */ "VCVTPD2DQZrrb\0" |
| 47671 | /* 54506 */ "VCVTTPH2DQZrrb\0" |
| 47672 | /* 54521 */ "VCVTPH2DQZrrb\0" |
| 47673 | /* 54535 */ "VCVTTPS2DQZrrb\0" |
| 47674 | /* 54550 */ "VCVTPS2DQZrrb\0" |
| 47675 | /* 54564 */ "VCVTTPD2UDQZrrb\0" |
| 47676 | /* 54580 */ "VCVTPD2UDQZrrb\0" |
| 47677 | /* 54595 */ "VCVTTPH2UDQZrrb\0" |
| 47678 | /* 54611 */ "VCVTPH2UDQZrrb\0" |
| 47679 | /* 54626 */ "VCVTTPS2UDQZrrb\0" |
| 47680 | /* 54642 */ "VCVTPS2UDQZrrb\0" |
| 47681 | /* 54657 */ "VCVTTPD2QQZrrb\0" |
| 47682 | /* 54672 */ "VCVTPD2QQZrrb\0" |
| 47683 | /* 54686 */ "VCVTTPH2QQZrrb\0" |
| 47684 | /* 54701 */ "VCVTPH2QQZrrb\0" |
| 47685 | /* 54715 */ "VCVTTPS2QQZrrb\0" |
| 47686 | /* 54730 */ "VCVTPS2QQZrrb\0" |
| 47687 | /* 54744 */ "VCVTTPD2UQQZrrb\0" |
| 47688 | /* 54760 */ "VCVTPD2UQQZrrb\0" |
| 47689 | /* 54775 */ "VCVTTPH2UQQZrrb\0" |
| 47690 | /* 54791 */ "VCVTPH2UQQZrrb\0" |
| 47691 | /* 54806 */ "VCVTTPS2UQQZrrb\0" |
| 47692 | /* 54822 */ "VCVTPS2UQQZrrb\0" |
| 47693 | /* 54837 */ "VCVTPD2PSZrrb\0" |
| 47694 | /* 54851 */ "VCVTPH2PSZrrb\0" |
| 47695 | /* 54865 */ "VCVTDQ2PSZrrb\0" |
| 47696 | /* 54879 */ "VCVTUDQ2PSZrrb\0" |
| 47697 | /* 54894 */ "VCVTQQ2PSZrrb\0" |
| 47698 | /* 54908 */ "VCVTUQQ2PSZrrb\0" |
| 47699 | /* 54923 */ "VSUBPSZrrb\0" |
| 47700 | /* 54934 */ "VADDPSZrrb\0" |
| 47701 | /* 54945 */ "VSCALEFPSZrrb\0" |
| 47702 | /* 54959 */ "VMULPSZrrb\0" |
| 47703 | /* 54970 */ "VMINPSZrrb\0" |
| 47704 | /* 54981 */ "VDIVPSZrrb\0" |
| 47705 | /* 54992 */ "VMAXPSZrrb\0" |
| 47706 | /* 55003 */ "VUCOMISSZrrb\0" |
| 47707 | /* 55016 */ "VCOMISSZrrb\0" |
| 47708 | /* 55028 */ "VCVTTPH2WZrrb\0" |
| 47709 | /* 55042 */ "VCVTPH2WZrrb\0" |
| 47710 | /* 55055 */ "VCVTTPH2UWZrrb\0" |
| 47711 | /* 55070 */ "VCVTPH2UWZrrb\0" |
| 47712 | /* 55084 */ "VCVTPS2PHXZrrb\0" |
| 47713 | /* 55099 */ "VCVTPH2PSXZrrb\0" |
| 47714 | /* 55114 */ "TCRETURNdi64cc\0" |
| 47715 | /* 55129 */ "TCRETURNdicc\0" |
| 47716 | /* 55142 */ "SEH_StackAlloc\0" |
| 47717 | /* 55157 */ "MOV32rc\0" |
| 47718 | /* 55165 */ "MOV64rc\0" |
| 47719 | /* 55173 */ "TAILJMPd\0" |
| 47720 | /* 55182 */ "OR32mi8Locked\0" |
| 47721 | /* 55196 */ "MOV32rd\0" |
| 47722 | /* 55204 */ "MOV64rd\0" |
| 47723 | /* 55212 */ "SEH_PushFrame\0" |
| 47724 | /* 55226 */ "SEH_SetFrame\0" |
| 47725 | /* 55239 */ "SEH_Epilogue\0" |
| 47726 | /* 55252 */ "SEH_EndPrologue\0" |
| 47727 | /* 55268 */ "SEH_SaveReg\0" |
| 47728 | /* 55280 */ "SEH_PushReg\0" |
| 47729 | /* 55292 */ "Int_eh_sjlj_setup_dispatch\0" |
| 47730 | /* 55319 */ "PUSH32i\0" |
| 47731 | /* 55327 */ "FARCALL32i\0" |
| 47732 | /* 55338 */ "FARJMP32i\0" |
| 47733 | /* 55348 */ "JMPABS64i\0" |
| 47734 | /* 55358 */ "PUSH16i\0" |
| 47735 | /* 55366 */ "FARCALL16i\0" |
| 47736 | /* 55377 */ "FARJMP16i\0" |
| 47737 | /* 55387 */ "VPSRADZ256mbi\0" |
| 47738 | /* 55401 */ "VPSHUFDZ256mbi\0" |
| 47739 | /* 55416 */ "VPSLLDZ256mbi\0" |
| 47740 | /* 55430 */ "VPROLDZ256mbi\0" |
| 47741 | /* 55444 */ "VPSRLDZ256mbi\0" |
| 47742 | /* 55458 */ "VPERMILPDZ256mbi\0" |
| 47743 | /* 55475 */ "VPERMPDZ256mbi\0" |
| 47744 | /* 55490 */ "VPRORDZ256mbi\0" |
| 47745 | /* 55504 */ "VPSRAQZ256mbi\0" |
| 47746 | /* 55518 */ "VPSLLQZ256mbi\0" |
| 47747 | /* 55532 */ "VPROLQZ256mbi\0" |
| 47748 | /* 55546 */ "VPSRLQZ256mbi\0" |
| 47749 | /* 55560 */ "VPERMQZ256mbi\0" |
| 47750 | /* 55574 */ "VPRORQZ256mbi\0" |
| 47751 | /* 55588 */ "VPERMILPSZ256mbi\0" |
| 47752 | /* 55605 */ "VPSRADZ128mbi\0" |
| 47753 | /* 55619 */ "VPSHUFDZ128mbi\0" |
| 47754 | /* 55634 */ "VPSLLDZ128mbi\0" |
| 47755 | /* 55648 */ "VPROLDZ128mbi\0" |
| 47756 | /* 55662 */ "VPSRLDZ128mbi\0" |
| 47757 | /* 55676 */ "VPERMILPDZ128mbi\0" |
| 47758 | /* 55693 */ "VPRORDZ128mbi\0" |
| 47759 | /* 55707 */ "VPSRAQZ128mbi\0" |
| 47760 | /* 55721 */ "VPSLLQZ128mbi\0" |
| 47761 | /* 55735 */ "VPROLQZ128mbi\0" |
| 47762 | /* 55749 */ "VPSRLQZ128mbi\0" |
| 47763 | /* 55763 */ "VPRORQZ128mbi\0" |
| 47764 | /* 55777 */ "VPERMILPSZ128mbi\0" |
| 47765 | /* 55794 */ "VPSRADZmbi\0" |
| 47766 | /* 55805 */ "VPSHUFDZmbi\0" |
| 47767 | /* 55817 */ "VPSLLDZmbi\0" |
| 47768 | /* 55828 */ "VPROLDZmbi\0" |
| 47769 | /* 55839 */ "VPSRLDZmbi\0" |
| 47770 | /* 55850 */ "VPERMILPDZmbi\0" |
| 47771 | /* 55864 */ "VPERMPDZmbi\0" |
| 47772 | /* 55876 */ "VPRORDZmbi\0" |
| 47773 | /* 55887 */ "VPSRAQZmbi\0" |
| 47774 | /* 55898 */ "VPSLLQZmbi\0" |
| 47775 | /* 55909 */ "VPROLQZmbi\0" |
| 47776 | /* 55920 */ "VPSRLQZmbi\0" |
| 47777 | /* 55931 */ "VPERMQZmbi\0" |
| 47778 | /* 55942 */ "VPRORQZmbi\0" |
| 47779 | /* 55953 */ "VPERMILPSZmbi\0" |
| 47780 | /* 55967 */ "VSHUFF64X2Z256rmbi\0" |
| 47781 | /* 55986 */ "VSHUFI64X2Z256rmbi\0" |
| 47782 | /* 56005 */ "VSHUFF32X4Z256rmbi\0" |
| 47783 | /* 56024 */ "VSHUFI32X4Z256rmbi\0" |
| 47784 | /* 56043 */ "VGF2P8AFFINEQBZ256rmbi\0" |
| 47785 | /* 56066 */ "VGF2P8AFFINEINVQBZ256rmbi\0" |
| 47786 | /* 56092 */ "VPSHLDDZ256rmbi\0" |
| 47787 | /* 56108 */ "VPSHRDDZ256rmbi\0" |
| 47788 | /* 56124 */ "VPTERNLOGDZ256rmbi\0" |
| 47789 | /* 56143 */ "VALIGNDZ256rmbi\0" |
| 47790 | /* 56159 */ "VREDUCEPDZ256rmbi\0" |
| 47791 | /* 56177 */ "VRANGEPDZ256rmbi\0" |
| 47792 | /* 56194 */ "VRNDSCALEPDZ256rmbi\0" |
| 47793 | /* 56214 */ "VSHUFPDZ256rmbi\0" |
| 47794 | /* 56230 */ "VFIXUPIMMPDZ256rmbi\0" |
| 47795 | /* 56250 */ "VCMPPDZ256rmbi\0" |
| 47796 | /* 56265 */ "VGETMANTPDZ256rmbi\0" |
| 47797 | /* 56284 */ "VREDUCEPHZ256rmbi\0" |
| 47798 | /* 56302 */ "VRNDSCALEPHZ256rmbi\0" |
| 47799 | /* 56322 */ "VCMPPHZ256rmbi\0" |
| 47800 | /* 56337 */ "VGETMANTPHZ256rmbi\0" |
| 47801 | /* 56356 */ "VPSHLDQZ256rmbi\0" |
| 47802 | /* 56372 */ "VPSHRDQZ256rmbi\0" |
| 47803 | /* 56388 */ "VPTERNLOGQZ256rmbi\0" |
| 47804 | /* 56407 */ "VALIGNQZ256rmbi\0" |
| 47805 | /* 56423 */ "VREDUCEPSZ256rmbi\0" |
| 47806 | /* 56441 */ "VRANGEPSZ256rmbi\0" |
| 47807 | /* 56458 */ "VRNDSCALEPSZ256rmbi\0" |
| 47808 | /* 56478 */ "VSHUFPSZ256rmbi\0" |
| 47809 | /* 56494 */ "VFIXUPIMMPSZ256rmbi\0" |
| 47810 | /* 56514 */ "VCMPPSZ256rmbi\0" |
| 47811 | /* 56529 */ "VGETMANTPSZ256rmbi\0" |
| 47812 | /* 56548 */ "VGF2P8AFFINEQBZ128rmbi\0" |
| 47813 | /* 56571 */ "VGF2P8AFFINEINVQBZ128rmbi\0" |
| 47814 | /* 56597 */ "VPSHLDDZ128rmbi\0" |
| 47815 | /* 56613 */ "VPSHRDDZ128rmbi\0" |
| 47816 | /* 56629 */ "VPTERNLOGDZ128rmbi\0" |
| 47817 | /* 56648 */ "VALIGNDZ128rmbi\0" |
| 47818 | /* 56664 */ "VREDUCEPDZ128rmbi\0" |
| 47819 | /* 56682 */ "VRANGEPDZ128rmbi\0" |
| 47820 | /* 56699 */ "VRNDSCALEPDZ128rmbi\0" |
| 47821 | /* 56719 */ "VSHUFPDZ128rmbi\0" |
| 47822 | /* 56735 */ "VFIXUPIMMPDZ128rmbi\0" |
| 47823 | /* 56755 */ "VCMPPDZ128rmbi\0" |
| 47824 | /* 56770 */ "VGETMANTPDZ128rmbi\0" |
| 47825 | /* 56789 */ "VREDUCEPHZ128rmbi\0" |
| 47826 | /* 56807 */ "VRNDSCALEPHZ128rmbi\0" |
| 47827 | /* 56827 */ "VCMPPHZ128rmbi\0" |
| 47828 | /* 56842 */ "VGETMANTPHZ128rmbi\0" |
| 47829 | /* 56861 */ "VPSHLDQZ128rmbi\0" |
| 47830 | /* 56877 */ "VPSHRDQZ128rmbi\0" |
| 47831 | /* 56893 */ "VPTERNLOGQZ128rmbi\0" |
| 47832 | /* 56912 */ "VALIGNQZ128rmbi\0" |
| 47833 | /* 56928 */ "VREDUCEPSZ128rmbi\0" |
| 47834 | /* 56946 */ "VRANGEPSZ128rmbi\0" |
| 47835 | /* 56963 */ "VRNDSCALEPSZ128rmbi\0" |
| 47836 | /* 56983 */ "VSHUFPSZ128rmbi\0" |
| 47837 | /* 56999 */ "VFIXUPIMMPSZ128rmbi\0" |
| 47838 | /* 57019 */ "VCMPPSZ128rmbi\0" |
| 47839 | /* 57034 */ "VGETMANTPSZ128rmbi\0" |
| 47840 | /* 57053 */ "VSHUFF64X2Zrmbi\0" |
| 47841 | /* 57069 */ "VSHUFI64X2Zrmbi\0" |
| 47842 | /* 57085 */ "VSHUFF32X4Zrmbi\0" |
| 47843 | /* 57101 */ "VSHUFI32X4Zrmbi\0" |
| 47844 | /* 57117 */ "VGF2P8AFFINEQBZrmbi\0" |
| 47845 | /* 57137 */ "VGF2P8AFFINEINVQBZrmbi\0" |
| 47846 | /* 57160 */ "VPSHLDDZrmbi\0" |
| 47847 | /* 57173 */ "VPSHRDDZrmbi\0" |
| 47848 | /* 57186 */ "VPTERNLOGDZrmbi\0" |
| 47849 | /* 57202 */ "VALIGNDZrmbi\0" |
| 47850 | /* 57215 */ "VREDUCEPDZrmbi\0" |
| 47851 | /* 57230 */ "VRANGEPDZrmbi\0" |
| 47852 | /* 57244 */ "VRNDSCALEPDZrmbi\0" |
| 47853 | /* 57261 */ "VSHUFPDZrmbi\0" |
| 47854 | /* 57274 */ "VFIXUPIMMPDZrmbi\0" |
| 47855 | /* 57291 */ "VCMPPDZrmbi\0" |
| 47856 | /* 57303 */ "VGETMANTPDZrmbi\0" |
| 47857 | /* 57319 */ "VREDUCEPHZrmbi\0" |
| 47858 | /* 57334 */ "VRNDSCALEPHZrmbi\0" |
| 47859 | /* 57351 */ "VCMPPHZrmbi\0" |
| 47860 | /* 57363 */ "VGETMANTPHZrmbi\0" |
| 47861 | /* 57379 */ "VPSHLDQZrmbi\0" |
| 47862 | /* 57392 */ "VPSHRDQZrmbi\0" |
| 47863 | /* 57405 */ "VPTERNLOGQZrmbi\0" |
| 47864 | /* 57421 */ "VALIGNQZrmbi\0" |
| 47865 | /* 57434 */ "VREDUCEPSZrmbi\0" |
| 47866 | /* 57449 */ "VRANGEPSZrmbi\0" |
| 47867 | /* 57463 */ "VRNDSCALEPSZrmbi\0" |
| 47868 | /* 57480 */ "VSHUFPSZrmbi\0" |
| 47869 | /* 57493 */ "VFIXUPIMMPSZrmbi\0" |
| 47870 | /* 57510 */ "VCMPPSZrmbi\0" |
| 47871 | /* 57522 */ "VGETMANTPSZrmbi\0" |
| 47872 | /* 57538 */ "TCRETURNdi\0" |
| 47873 | /* 57549 */ "SBB32mi\0" |
| 47874 | /* 57557 */ "LOCK_SUB32mi\0" |
| 47875 | /* 57570 */ "ADC32mi\0" |
| 47876 | /* 57578 */ "LOCK_ADD32mi\0" |
| 47877 | /* 57591 */ "LOCK_AND32mi\0" |
| 47878 | /* 57604 */ "BEXTRI32mi\0" |
| 47879 | /* 57615 */ "RCL32mi\0" |
| 47880 | /* 57623 */ "SHL32mi\0" |
| 47881 | /* 57631 */ "ROL32mi\0" |
| 47882 | /* 57639 */ "CCMP32mi\0" |
| 47883 | /* 57648 */ "SAR32mi\0" |
| 47884 | /* 57656 */ "RCR32mi\0" |
| 47885 | /* 57664 */ "SHR32mi\0" |
| 47886 | /* 57672 */ "ROR32mi\0" |
| 47887 | /* 57680 */ "LOCK_XOR32mi\0" |
| 47888 | /* 57693 */ "LOCK_OR32mi\0" |
| 47889 | /* 57705 */ "CTEST32mi\0" |
| 47890 | /* 57715 */ "MOV32mi\0" |
| 47891 | /* 57723 */ "RORX32mi\0" |
| 47892 | /* 57732 */ "BEXTRI64mi\0" |
| 47893 | /* 57743 */ "RCL64mi\0" |
| 47894 | /* 57751 */ "SHL64mi\0" |
| 47895 | /* 57759 */ "ROL64mi\0" |
| 47896 | /* 57767 */ "SAR64mi\0" |
| 47897 | /* 57775 */ "RCR64mi\0" |
| 47898 | /* 57783 */ "SHR64mi\0" |
| 47899 | /* 57791 */ "ROR64mi\0" |
| 47900 | /* 57799 */ "RORX64mi\0" |
| 47901 | /* 57808 */ "SBB16mi\0" |
| 47902 | /* 57816 */ "LOCK_SUB16mi\0" |
| 47903 | /* 57829 */ "ADC16mi\0" |
| 47904 | /* 57837 */ "LOCK_ADD16mi\0" |
| 47905 | /* 57850 */ "LOCK_AND16mi\0" |
| 47906 | /* 57863 */ "RCL16mi\0" |
| 47907 | /* 57871 */ "SHL16mi\0" |
| 47908 | /* 57879 */ "ROL16mi\0" |
| 47909 | /* 57887 */ "CCMP16mi\0" |
| 47910 | /* 57896 */ "SAR16mi\0" |
| 47911 | /* 57904 */ "RCR16mi\0" |
| 47912 | /* 57912 */ "SHR16mi\0" |
| 47913 | /* 57920 */ "ROR16mi\0" |
| 47914 | /* 57928 */ "LOCK_XOR16mi\0" |
| 47915 | /* 57941 */ "LOCK_OR16mi\0" |
| 47916 | /* 57953 */ "CTEST16mi\0" |
| 47917 | /* 57963 */ "MOV16mi\0" |
| 47918 | /* 57971 */ "VPSRADZ256mi\0" |
| 47919 | /* 57984 */ "VPSHUFDZ256mi\0" |
| 47920 | /* 57998 */ "VPSLLDZ256mi\0" |
| 47921 | /* 58011 */ "VPROLDZ256mi\0" |
| 47922 | /* 58024 */ "VPSRLDZ256mi\0" |
| 47923 | /* 58037 */ "VPERMILPDZ256mi\0" |
| 47924 | /* 58053 */ "VPERMPDZ256mi\0" |
| 47925 | /* 58067 */ "VPRORDZ256mi\0" |
| 47926 | /* 58080 */ "VPSRAQZ256mi\0" |
| 47927 | /* 58093 */ "VPSLLDQZ256mi\0" |
| 47928 | /* 58107 */ "VPSRLDQZ256mi\0" |
| 47929 | /* 58121 */ "VPSLLQZ256mi\0" |
| 47930 | /* 58134 */ "VPROLQZ256mi\0" |
| 47931 | /* 58147 */ "VPSRLQZ256mi\0" |
| 47932 | /* 58160 */ "VPERMQZ256mi\0" |
| 47933 | /* 58173 */ "VPRORQZ256mi\0" |
| 47934 | /* 58186 */ "VPERMILPSZ256mi\0" |
| 47935 | /* 58202 */ "VPSRAWZ256mi\0" |
| 47936 | /* 58215 */ "VPSHUFHWZ256mi\0" |
| 47937 | /* 58230 */ "VPSHUFLWZ256mi\0" |
| 47938 | /* 58245 */ "VPSLLWZ256mi\0" |
| 47939 | /* 58258 */ "VPSRLWZ256mi\0" |
| 47940 | /* 58271 */ "VPSRADZ128mi\0" |
| 47941 | /* 58284 */ "VPSHUFDZ128mi\0" |
| 47942 | /* 58298 */ "VPSLLDZ128mi\0" |
| 47943 | /* 58311 */ "VPROLDZ128mi\0" |
| 47944 | /* 58324 */ "VPSRLDZ128mi\0" |
| 47945 | /* 58337 */ "VPERMILPDZ128mi\0" |
| 47946 | /* 58353 */ "VPRORDZ128mi\0" |
| 47947 | /* 58366 */ "VPSRAQZ128mi\0" |
| 47948 | /* 58379 */ "VPSLLDQZ128mi\0" |
| 47949 | /* 58393 */ "VPSRLDQZ128mi\0" |
| 47950 | /* 58407 */ "VPSLLQZ128mi\0" |
| 47951 | /* 58420 */ "VPROLQZ128mi\0" |
| 47952 | /* 58433 */ "VPSRLQZ128mi\0" |
| 47953 | /* 58446 */ "VPRORQZ128mi\0" |
| 47954 | /* 58459 */ "VPERMILPSZ128mi\0" |
| 47955 | /* 58475 */ "VPSRAWZ128mi\0" |
| 47956 | /* 58488 */ "VPSHUFHWZ128mi\0" |
| 47957 | /* 58503 */ "VPSHUFLWZ128mi\0" |
| 47958 | /* 58518 */ "VPSLLWZ128mi\0" |
| 47959 | /* 58531 */ "VPSRLWZ128mi\0" |
| 47960 | /* 58544 */ "SBB8mi\0" |
| 47961 | /* 58551 */ "LOCK_SUB8mi\0" |
| 47962 | /* 58563 */ "ADC8mi\0" |
| 47963 | /* 58570 */ "LOCK_ADD8mi\0" |
| 47964 | /* 58582 */ "LOCK_AND8mi\0" |
| 47965 | /* 58594 */ "RCL8mi\0" |
| 47966 | /* 58601 */ "SHL8mi\0" |
| 47967 | /* 58608 */ "ROL8mi\0" |
| 47968 | /* 58615 */ "CCMP8mi\0" |
| 47969 | /* 58623 */ "SAR8mi\0" |
| 47970 | /* 58630 */ "RCR8mi\0" |
| 47971 | /* 58637 */ "SHR8mi\0" |
| 47972 | /* 58644 */ "ROR8mi\0" |
| 47973 | /* 58651 */ "LOCK_XOR8mi\0" |
| 47974 | /* 58663 */ "LOCK_OR8mi\0" |
| 47975 | /* 58674 */ "CTEST8mi\0" |
| 47976 | /* 58683 */ "MOV8mi\0" |
| 47977 | /* 58690 */ "VPCOMBmi\0" |
| 47978 | /* 58699 */ "VPROTBmi\0" |
| 47979 | /* 58708 */ "VPCOMUBmi\0" |
| 47980 | /* 58718 */ "VPSHUFDmi\0" |
| 47981 | /* 58728 */ "VPCOMDmi\0" |
| 47982 | /* 58737 */ "VROUNDPDmi\0" |
| 47983 | /* 58748 */ "VPERMILPDmi\0" |
| 47984 | /* 58760 */ "VROUNDSDmi\0" |
| 47985 | /* 58771 */ "VPROTDmi\0" |
| 47986 | /* 58780 */ "VPCOMUDmi\0" |
| 47987 | /* 58790 */ "TCRETURNmi\0" |
| 47988 | /* 58801 */ "VPCOMQmi\0" |
| 47989 | /* 58810 */ "VPROTQmi\0" |
| 47990 | /* 58819 */ "VPCOMUQmi\0" |
| 47991 | /* 58829 */ "VROUNDPSmi\0" |
| 47992 | /* 58840 */ "VPERMILPSmi\0" |
| 47993 | /* 58852 */ "VROUNDSSmi\0" |
| 47994 | /* 58863 */ "MMX_PSHUFWmi\0" |
| 47995 | /* 58876 */ "VPSHUFHWmi\0" |
| 47996 | /* 58887 */ "VPSHUFLWmi\0" |
| 47997 | /* 58898 */ "VPCOMWmi\0" |
| 47998 | /* 58907 */ "VPROTWmi\0" |
| 47999 | /* 58916 */ "VPCOMUWmi\0" |
| 48000 | /* 58926 */ "VPSHUFDYmi\0" |
| 48001 | /* 58937 */ "VROUNDPDYmi\0" |
| 48002 | /* 58949 */ "VPERMILPDYmi\0" |
| 48003 | /* 58962 */ "VPERMPDYmi\0" |
| 48004 | /* 58973 */ "VPERMQYmi\0" |
| 48005 | /* 58983 */ "VROUNDPSYmi\0" |
| 48006 | /* 58995 */ "VPERMILPSYmi\0" |
| 48007 | /* 59008 */ "VPSHUFHWYmi\0" |
| 48008 | /* 59020 */ "VPSHUFLWYmi\0" |
| 48009 | /* 59032 */ "VPSRADZmi\0" |
| 48010 | /* 59042 */ "VPSHUFDZmi\0" |
| 48011 | /* 59053 */ "VPSLLDZmi\0" |
| 48012 | /* 59063 */ "VPROLDZmi\0" |
| 48013 | /* 59073 */ "VPSRLDZmi\0" |
| 48014 | /* 59083 */ "VPERMILPDZmi\0" |
| 48015 | /* 59096 */ "VPERMPDZmi\0" |
| 48016 | /* 59107 */ "VPRORDZmi\0" |
| 48017 | /* 59117 */ "VPSRAQZmi\0" |
| 48018 | /* 59127 */ "VPSLLDQZmi\0" |
| 48019 | /* 59138 */ "VPSRLDQZmi\0" |
| 48020 | /* 59149 */ "VPSLLQZmi\0" |
| 48021 | /* 59159 */ "VPROLQZmi\0" |
| 48022 | /* 59169 */ "VPSRLQZmi\0" |
| 48023 | /* 59179 */ "VPERMQZmi\0" |
| 48024 | /* 59189 */ "VPRORQZmi\0" |
| 48025 | /* 59199 */ "VPERMILPSZmi\0" |
| 48026 | /* 59212 */ "VPSRAWZmi\0" |
| 48027 | /* 59222 */ "VPSHUFHWZmi\0" |
| 48028 | /* 59234 */ "VPSHUFLWZmi\0" |
| 48029 | /* 59246 */ "VPSLLWZmi\0" |
| 48030 | /* 59256 */ "VPSRLWZmi\0" |
| 48031 | /* 59266 */ "LWPVAL32rmi\0" |
| 48032 | /* 59278 */ "IMUL32rmi\0" |
| 48033 | /* 59288 */ "LWPINS32rmi\0" |
| 48034 | /* 59300 */ "IMULZU32rmi\0" |
| 48035 | /* 59312 */ "LWPVAL64rmi\0" |
| 48036 | /* 59324 */ "LWPINS64rmi\0" |
| 48037 | /* 59336 */ "SHA1RNDS4rmi\0" |
| 48038 | /* 59349 */ "IMUL16rmi\0" |
| 48039 | /* 59359 */ "IMULZU16rmi\0" |
| 48040 | /* 59371 */ "VSHUFF64X2Z256rmi\0" |
| 48041 | /* 59389 */ "VSHUFI64X2Z256rmi\0" |
| 48042 | /* 59407 */ "VSHUFF32X4Z256rmi\0" |
| 48043 | /* 59425 */ "VSHUFI32X4Z256rmi\0" |
| 48044 | /* 59443 */ "VPCMPBZ256rmi\0" |
| 48045 | /* 59457 */ "VGF2P8AFFINEQBZ256rmi\0" |
| 48046 | /* 59479 */ "VGF2P8AFFINEINVQBZ256rmi\0" |
| 48047 | /* 59504 */ "VPCMPUBZ256rmi\0" |
| 48048 | /* 59519 */ "VPSHLDDZ256rmi\0" |
| 48049 | /* 59534 */ "VPSHRDDZ256rmi\0" |
| 48050 | /* 59549 */ "VPTERNLOGDZ256rmi\0" |
| 48051 | /* 59567 */ "VALIGNDZ256rmi\0" |
| 48052 | /* 59582 */ "VREDUCEPDZ256rmi\0" |
| 48053 | /* 59599 */ "VRANGEPDZ256rmi\0" |
| 48054 | /* 59615 */ "VRNDSCALEPDZ256rmi\0" |
| 48055 | /* 59634 */ "VSHUFPDZ256rmi\0" |
| 48056 | /* 59649 */ "VPCMPDZ256rmi\0" |
| 48057 | /* 59663 */ "VFIXUPIMMPDZ256rmi\0" |
| 48058 | /* 59682 */ "VCMPPDZ256rmi\0" |
| 48059 | /* 59696 */ "VGETMANTPDZ256rmi\0" |
| 48060 | /* 59714 */ "VPCMPUDZ256rmi\0" |
| 48061 | /* 59729 */ "VREDUCEPHZ256rmi\0" |
| 48062 | /* 59746 */ "VRNDSCALEPHZ256rmi\0" |
| 48063 | /* 59765 */ "VCMPPHZ256rmi\0" |
| 48064 | /* 59779 */ "VGETMANTPHZ256rmi\0" |
| 48065 | /* 59797 */ "VPSHLDQZ256rmi\0" |
| 48066 | /* 59812 */ "VPCLMULQDQZ256rmi\0" |
| 48067 | /* 59830 */ "VPSHRDQZ256rmi\0" |
| 48068 | /* 59845 */ "VPTERNLOGQZ256rmi\0" |
| 48069 | /* 59863 */ "VALIGNQZ256rmi\0" |
| 48070 | /* 59878 */ "VPCMPQZ256rmi\0" |
| 48071 | /* 59892 */ "VPCMPUQZ256rmi\0" |
| 48072 | /* 59907 */ "VPALIGNRZ256rmi\0" |
| 48073 | /* 59923 */ "VREDUCEPSZ256rmi\0" |
| 48074 | /* 59940 */ "VRANGEPSZ256rmi\0" |
| 48075 | /* 59956 */ "VRNDSCALEPSZ256rmi\0" |
| 48076 | /* 59975 */ "VSHUFPSZ256rmi\0" |
| 48077 | /* 59990 */ "VFIXUPIMMPSZ256rmi\0" |
| 48078 | /* 60009 */ "VCMPPSZ256rmi\0" |
| 48079 | /* 60023 */ "VGETMANTPSZ256rmi\0" |
| 48080 | /* 60041 */ "VDBPSADBWZ256rmi\0" |
| 48081 | /* 60058 */ "VPSHLDWZ256rmi\0" |
| 48082 | /* 60073 */ "VPSHRDWZ256rmi\0" |
| 48083 | /* 60088 */ "VPCMPWZ256rmi\0" |
| 48084 | /* 60102 */ "VPCMPUWZ256rmi\0" |
| 48085 | /* 60117 */ "VPCMPBZ128rmi\0" |
| 48086 | /* 60131 */ "VGF2P8AFFINEQBZ128rmi\0" |
| 48087 | /* 60153 */ "VGF2P8AFFINEINVQBZ128rmi\0" |
| 48088 | /* 60178 */ "VPCMPUBZ128rmi\0" |
| 48089 | /* 60193 */ "VPSHLDDZ128rmi\0" |
| 48090 | /* 60208 */ "VPSHRDDZ128rmi\0" |
| 48091 | /* 60223 */ "VPTERNLOGDZ128rmi\0" |
| 48092 | /* 60241 */ "VALIGNDZ128rmi\0" |
| 48093 | /* 60256 */ "VREDUCEPDZ128rmi\0" |
| 48094 | /* 60273 */ "VRANGEPDZ128rmi\0" |
| 48095 | /* 60289 */ "VRNDSCALEPDZ128rmi\0" |
| 48096 | /* 60308 */ "VSHUFPDZ128rmi\0" |
| 48097 | /* 60323 */ "VPCMPDZ128rmi\0" |
| 48098 | /* 60337 */ "VFIXUPIMMPDZ128rmi\0" |
| 48099 | /* 60356 */ "VCMPPDZ128rmi\0" |
| 48100 | /* 60370 */ "VGETMANTPDZ128rmi\0" |
| 48101 | /* 60388 */ "VPCMPUDZ128rmi\0" |
| 48102 | /* 60403 */ "VREDUCEPHZ128rmi\0" |
| 48103 | /* 60420 */ "VRNDSCALEPHZ128rmi\0" |
| 48104 | /* 60439 */ "VCMPPHZ128rmi\0" |
| 48105 | /* 60453 */ "VGETMANTPHZ128rmi\0" |
| 48106 | /* 60471 */ "VPSHLDQZ128rmi\0" |
| 48107 | /* 60486 */ "VPCLMULQDQZ128rmi\0" |
| 48108 | /* 60504 */ "VPSHRDQZ128rmi\0" |
| 48109 | /* 60519 */ "VPTERNLOGQZ128rmi\0" |
| 48110 | /* 60537 */ "VALIGNQZ128rmi\0" |
| 48111 | /* 60552 */ "VPCMPQZ128rmi\0" |
| 48112 | /* 60566 */ "VPCMPUQZ128rmi\0" |
| 48113 | /* 60581 */ "VPALIGNRZ128rmi\0" |
| 48114 | /* 60597 */ "VREDUCEPSZ128rmi\0" |
| 48115 | /* 60614 */ "VRANGEPSZ128rmi\0" |
| 48116 | /* 60630 */ "VRNDSCALEPSZ128rmi\0" |
| 48117 | /* 60649 */ "VSHUFPSZ128rmi\0" |
| 48118 | /* 60664 */ "VFIXUPIMMPSZ128rmi\0" |
| 48119 | /* 60683 */ "VCMPPSZ128rmi\0" |
| 48120 | /* 60697 */ "VGETMANTPSZ128rmi\0" |
| 48121 | /* 60715 */ "VDBPSADBWZ128rmi\0" |
| 48122 | /* 60732 */ "VPSHLDWZ128rmi\0" |
| 48123 | /* 60747 */ "VPSHRDWZ128rmi\0" |
| 48124 | /* 60762 */ "VPCMPWZ128rmi\0" |
| 48125 | /* 60776 */ "VPCMPUWZ128rmi\0" |
| 48126 | /* 60791 */ "VGF2P8AFFINEQBrmi\0" |
| 48127 | /* 60809 */ "VGF2P8AFFINEINVQBrmi\0" |
| 48128 | /* 60830 */ "VPBLENDDrmi\0" |
| 48129 | /* 60842 */ "VBLENDPDrmi\0" |
| 48130 | /* 60854 */ "VSHUFPDrmi\0" |
| 48131 | /* 60865 */ "VDPPDrmi\0" |
| 48132 | /* 60874 */ "VCMPPDrmi\0" |
| 48133 | /* 60884 */ "VCMPSDrmi\0" |
| 48134 | /* 60894 */ "VPCMPESTRIrmi\0" |
| 48135 | /* 60908 */ "VPCMPISTRIrmi\0" |
| 48136 | /* 60922 */ "VPCMPESTRMrmi\0" |
| 48137 | /* 60936 */ "VPCMPISTRMrmi\0" |
| 48138 | /* 60950 */ "VPCLMULQDQrmi\0" |
| 48139 | /* 60964 */ "VPALIGNRrmi\0" |
| 48140 | /* 60976 */ "MMX_PALIGNRrmi\0" |
| 48141 | /* 60991 */ "VBLENDPSrmi\0" |
| 48142 | /* 61003 */ "VSHUFPSrmi\0" |
| 48143 | /* 61014 */ "VDPPSrmi\0" |
| 48144 | /* 61023 */ "VCMPPSrmi\0" |
| 48145 | /* 61033 */ "VCMPSSrmi\0" |
| 48146 | /* 61043 */ "VMPSADBWrmi\0" |
| 48147 | /* 61055 */ "VPBLENDWrmi\0" |
| 48148 | /* 61067 */ "VGF2P8AFFINEQBYrmi\0" |
| 48149 | /* 61086 */ "VGF2P8AFFINEINVQBYrmi\0" |
| 48150 | /* 61108 */ "VPBLENDDYrmi\0" |
| 48151 | /* 61121 */ "VBLENDPDYrmi\0" |
| 48152 | /* 61134 */ "VSHUFPDYrmi\0" |
| 48153 | /* 61146 */ "VCMPPDYrmi\0" |
| 48154 | /* 61157 */ "VPCLMULQDQYrmi\0" |
| 48155 | /* 61172 */ "VPALIGNRYrmi\0" |
| 48156 | /* 61185 */ "VBLENDPSYrmi\0" |
| 48157 | /* 61198 */ "VSHUFPSYrmi\0" |
| 48158 | /* 61210 */ "VDPPSYrmi\0" |
| 48159 | /* 61220 */ "VCMPPSYrmi\0" |
| 48160 | /* 61231 */ "VMPSADBWYrmi\0" |
| 48161 | /* 61244 */ "VPBLENDWYrmi\0" |
| 48162 | /* 61257 */ "VSHUFF64X2Zrmi\0" |
| 48163 | /* 61272 */ "VSHUFI64X2Zrmi\0" |
| 48164 | /* 61287 */ "VSHUFF32X4Zrmi\0" |
| 48165 | /* 61302 */ "VSHUFI32X4Zrmi\0" |
| 48166 | /* 61317 */ "VPCMPBZrmi\0" |
| 48167 | /* 61328 */ "VGF2P8AFFINEQBZrmi\0" |
| 48168 | /* 61347 */ "VGF2P8AFFINEINVQBZrmi\0" |
| 48169 | /* 61369 */ "VPCMPUBZrmi\0" |
| 48170 | /* 61381 */ "VPSHLDDZrmi\0" |
| 48171 | /* 61393 */ "VPSHRDDZrmi\0" |
| 48172 | /* 61405 */ "VPTERNLOGDZrmi\0" |
| 48173 | /* 61420 */ "VALIGNDZrmi\0" |
| 48174 | /* 61432 */ "VREDUCEPDZrmi\0" |
| 48175 | /* 61446 */ "VRANGEPDZrmi\0" |
| 48176 | /* 61459 */ "VRNDSCALEPDZrmi\0" |
| 48177 | /* 61475 */ "VSHUFPDZrmi\0" |
| 48178 | /* 61487 */ "VPCMPDZrmi\0" |
| 48179 | /* 61498 */ "VFIXUPIMMPDZrmi\0" |
| 48180 | /* 61514 */ "VCMPPDZrmi\0" |
| 48181 | /* 61525 */ "VGETMANTPDZrmi\0" |
| 48182 | /* 61540 */ "VREDUCESDZrmi\0" |
| 48183 | /* 61554 */ "VRANGESDZrmi\0" |
| 48184 | /* 61567 */ "VFIXUPIMMSDZrmi\0" |
| 48185 | /* 61583 */ "VCMPSDZrmi\0" |
| 48186 | /* 61594 */ "VGETMANTSDZrmi\0" |
| 48187 | /* 61609 */ "VPCMPUDZrmi\0" |
| 48188 | /* 61621 */ "VREDUCEPHZrmi\0" |
| 48189 | /* 61635 */ "VRNDSCALEPHZrmi\0" |
| 48190 | /* 61651 */ "VCMPPHZrmi\0" |
| 48191 | /* 61662 */ "VGETMANTPHZrmi\0" |
| 48192 | /* 61677 */ "VREDUCESHZrmi\0" |
| 48193 | /* 61691 */ "VCMPSHZrmi\0" |
| 48194 | /* 61702 */ "VGETMANTSHZrmi\0" |
| 48195 | /* 61717 */ "VPSHLDQZrmi\0" |
| 48196 | /* 61729 */ "VPCLMULQDQZrmi\0" |
| 48197 | /* 61744 */ "VPSHRDQZrmi\0" |
| 48198 | /* 61756 */ "VPTERNLOGQZrmi\0" |
| 48199 | /* 61771 */ "VALIGNQZrmi\0" |
| 48200 | /* 61783 */ "VPCMPQZrmi\0" |
| 48201 | /* 61794 */ "VPCMPUQZrmi\0" |
| 48202 | /* 61806 */ "VPALIGNRZrmi\0" |
| 48203 | /* 61819 */ "VREDUCEPSZrmi\0" |
| 48204 | /* 61833 */ "VRANGEPSZrmi\0" |
| 48205 | /* 61846 */ "VRNDSCALEPSZrmi\0" |
| 48206 | /* 61862 */ "VSHUFPSZrmi\0" |
| 48207 | /* 61874 */ "VFIXUPIMMPSZrmi\0" |
| 48208 | /* 61890 */ "VCMPPSZrmi\0" |
| 48209 | /* 61901 */ "VGETMANTPSZrmi\0" |
| 48210 | /* 61916 */ "VREDUCESSZrmi\0" |
| 48211 | /* 61930 */ "VRANGESSZrmi\0" |
| 48212 | /* 61943 */ "VFIXUPIMMSSZrmi\0" |
| 48213 | /* 61959 */ "VCMPSSZrmi\0" |
| 48214 | /* 61970 */ "VGETMANTSSZrmi\0" |
| 48215 | /* 61985 */ "VDBPSADBWZrmi\0" |
| 48216 | /* 61999 */ "VPSHLDWZrmi\0" |
| 48217 | /* 62011 */ "VPSHRDWZrmi\0" |
| 48218 | /* 62023 */ "VPCMPWZrmi\0" |
| 48219 | /* 62034 */ "VPCMPUWZrmi\0" |
| 48220 | /* 62046 */ "SBB32ri\0" |
| 48221 | /* 62054 */ "SUB32ri\0" |
| 48222 | /* 62062 */ "ADC32ri\0" |
| 48223 | /* 62070 */ "ADD32ri\0" |
| 48224 | /* 62078 */ "AND32ri\0" |
| 48225 | /* 62086 */ "BEXTRI32ri\0" |
| 48226 | /* 62097 */ "RCL32ri\0" |
| 48227 | /* 62105 */ "SHL32ri\0" |
| 48228 | /* 62113 */ "ROL32ri\0" |
| 48229 | /* 62121 */ "IN32ri\0" |
| 48230 | /* 62128 */ "CCMP32ri\0" |
| 48231 | /* 62137 */ "SAR32ri\0" |
| 48232 | /* 62145 */ "RCR32ri\0" |
| 48233 | /* 62153 */ "SHR32ri\0" |
| 48234 | /* 62161 */ "ROR32ri\0" |
| 48235 | /* 62169 */ "XOR32ri\0" |
| 48236 | /* 62177 */ "SHLDROT32ri\0" |
| 48237 | /* 62189 */ "SHRDROT32ri\0" |
| 48238 | /* 62201 */ "CTEST32ri\0" |
| 48239 | /* 62211 */ "MOV32ri\0" |
| 48240 | /* 62219 */ "RORX32ri\0" |
| 48241 | /* 62228 */ "BEXTRI64ri\0" |
| 48242 | /* 62239 */ "RCL64ri\0" |
| 48243 | /* 62247 */ "SHL64ri\0" |
| 48244 | /* 62255 */ "ROL64ri\0" |
| 48245 | /* 62263 */ "SAR64ri\0" |
| 48246 | /* 62271 */ "RCR64ri\0" |
| 48247 | /* 62279 */ "SHR64ri\0" |
| 48248 | /* 62287 */ "ROR64ri\0" |
| 48249 | /* 62295 */ "SHLDROT64ri\0" |
| 48250 | /* 62307 */ "SHRDROT64ri\0" |
| 48251 | /* 62319 */ "MOV64ri\0" |
| 48252 | /* 62327 */ "RORX64ri\0" |
| 48253 | /* 62336 */ "SBB16ri\0" |
| 48254 | /* 62344 */ "SUB16ri\0" |
| 48255 | /* 62352 */ "ADC16ri\0" |
| 48256 | /* 62360 */ "ADD16ri\0" |
| 48257 | /* 62368 */ "AND16ri\0" |
| 48258 | /* 62376 */ "RCL16ri\0" |
| 48259 | /* 62384 */ "SHL16ri\0" |
| 48260 | /* 62392 */ "ROL16ri\0" |
| 48261 | /* 62400 */ "IN16ri\0" |
| 48262 | /* 62407 */ "CCMP16ri\0" |
| 48263 | /* 62416 */ "SAR16ri\0" |
| 48264 | /* 62424 */ "RCR16ri\0" |
| 48265 | /* 62432 */ "SHR16ri\0" |
| 48266 | /* 62440 */ "ROR16ri\0" |
| 48267 | /* 62448 */ "XOR16ri\0" |
| 48268 | /* 62456 */ "CTEST16ri\0" |
| 48269 | /* 62466 */ "MOV16ri\0" |
| 48270 | /* 62474 */ "VPSRADZ256ri\0" |
| 48271 | /* 62487 */ "VPSHUFDZ256ri\0" |
| 48272 | /* 62501 */ "VPSLLDZ256ri\0" |
| 48273 | /* 62514 */ "VPROLDZ256ri\0" |
| 48274 | /* 62527 */ "VPSRLDZ256ri\0" |
| 48275 | /* 62540 */ "VPERMILPDZ256ri\0" |
| 48276 | /* 62556 */ "VPERMPDZ256ri\0" |
| 48277 | /* 62570 */ "VPRORDZ256ri\0" |
| 48278 | /* 62583 */ "VPSRAQZ256ri\0" |
| 48279 | /* 62596 */ "VPSLLDQZ256ri\0" |
| 48280 | /* 62610 */ "VPSRLDQZ256ri\0" |
| 48281 | /* 62624 */ "VPSLLQZ256ri\0" |
| 48282 | /* 62637 */ "VPROLQZ256ri\0" |
| 48283 | /* 62650 */ "VPSRLQZ256ri\0" |
| 48284 | /* 62663 */ "VPERMQZ256ri\0" |
| 48285 | /* 62676 */ "VPRORQZ256ri\0" |
| 48286 | /* 62689 */ "VPERMILPSZ256ri\0" |
| 48287 | /* 62705 */ "VPSRAWZ256ri\0" |
| 48288 | /* 62718 */ "VPSHUFHWZ256ri\0" |
| 48289 | /* 62733 */ "VPSHUFLWZ256ri\0" |
| 48290 | /* 62748 */ "VPSLLWZ256ri\0" |
| 48291 | /* 62761 */ "VPSRLWZ256ri\0" |
| 48292 | /* 62774 */ "VPSRADZ128ri\0" |
| 48293 | /* 62787 */ "VPSHUFDZ128ri\0" |
| 48294 | /* 62801 */ "VPSLLDZ128ri\0" |
| 48295 | /* 62814 */ "VPROLDZ128ri\0" |
| 48296 | /* 62827 */ "VPSRLDZ128ri\0" |
| 48297 | /* 62840 */ "VPERMILPDZ128ri\0" |
| 48298 | /* 62856 */ "VPRORDZ128ri\0" |
| 48299 | /* 62869 */ "VPSRAQZ128ri\0" |
| 48300 | /* 62882 */ "VPSLLDQZ128ri\0" |
| 48301 | /* 62896 */ "VPSRLDQZ128ri\0" |
| 48302 | /* 62910 */ "VPSLLQZ128ri\0" |
| 48303 | /* 62923 */ "VPROLQZ128ri\0" |
| 48304 | /* 62936 */ "VPSRLQZ128ri\0" |
| 48305 | /* 62949 */ "VPRORQZ128ri\0" |
| 48306 | /* 62962 */ "VPERMILPSZ128ri\0" |
| 48307 | /* 62978 */ "VPSRAWZ128ri\0" |
| 48308 | /* 62991 */ "VPSHUFHWZ128ri\0" |
| 48309 | /* 63006 */ "VPSHUFLWZ128ri\0" |
| 48310 | /* 63021 */ "VPSLLWZ128ri\0" |
| 48311 | /* 63034 */ "VPSRLWZ128ri\0" |
| 48312 | /* 63047 */ "SBB8ri\0" |
| 48313 | /* 63054 */ "SUB8ri\0" |
| 48314 | /* 63061 */ "ADC8ri\0" |
| 48315 | /* 63068 */ "ADD8ri\0" |
| 48316 | /* 63075 */ "AND8ri\0" |
| 48317 | /* 63082 */ "RCL8ri\0" |
| 48318 | /* 63089 */ "SHL8ri\0" |
| 48319 | /* 63096 */ "ROL8ri\0" |
| 48320 | /* 63103 */ "IN8ri\0" |
| 48321 | /* 63109 */ "CCMP8ri\0" |
| 48322 | /* 63117 */ "SAR8ri\0" |
| 48323 | /* 63124 */ "RCR8ri\0" |
| 48324 | /* 63131 */ "SHR8ri\0" |
| 48325 | /* 63138 */ "ROR8ri\0" |
| 48326 | /* 63145 */ "XOR8ri\0" |
| 48327 | /* 63152 */ "CTEST8ri\0" |
| 48328 | /* 63161 */ "MOV8ri\0" |
| 48329 | /* 63168 */ "KSHIFTLBri\0" |
| 48330 | /* 63179 */ "VPCOMBri\0" |
| 48331 | /* 63188 */ "KSHIFTRBri\0" |
| 48332 | /* 63199 */ "VPROTBri\0" |
| 48333 | /* 63208 */ "VPCOMUBri\0" |
| 48334 | /* 63218 */ "VPSRADri\0" |
| 48335 | /* 63227 */ "MMX_PSRADri\0" |
| 48336 | /* 63239 */ "VPSHUFDri\0" |
| 48337 | /* 63249 */ "VPSLLDri\0" |
| 48338 | /* 63258 */ "MMX_PSLLDri\0" |
| 48339 | /* 63270 */ "VPSRLDri\0" |
| 48340 | /* 63279 */ "MMX_PSRLDri\0" |
| 48341 | /* 63291 */ "KSHIFTLDri\0" |
| 48342 | /* 63302 */ "VPCOMDri\0" |
| 48343 | /* 63311 */ "VROUNDPDri\0" |
| 48344 | /* 63322 */ "VPERMILPDri\0" |
| 48345 | /* 63334 */ "KSHIFTRDri\0" |
| 48346 | /* 63345 */ "VROUNDSDri\0" |
| 48347 | /* 63356 */ "VPROTDri\0" |
| 48348 | /* 63365 */ "VPCOMUDri\0" |
| 48349 | /* 63375 */ "TCRETURNri\0" |
| 48350 | /* 63386 */ "VPSLLDQri\0" |
| 48351 | /* 63396 */ "VPSRLDQri\0" |
| 48352 | /* 63406 */ "VPSLLQri\0" |
| 48353 | /* 63415 */ "MMX_PSLLQri\0" |
| 48354 | /* 63427 */ "VPSRLQri\0" |
| 48355 | /* 63436 */ "MMX_PSRLQri\0" |
| 48356 | /* 63448 */ "KSHIFTLQri\0" |
| 48357 | /* 63459 */ "VPCOMQri\0" |
| 48358 | /* 63468 */ "KSHIFTRQri\0" |
| 48359 | /* 63479 */ "VPROTQri\0" |
| 48360 | /* 63488 */ "VPCOMUQri\0" |
| 48361 | /* 63498 */ "URDMSRri\0" |
| 48362 | /* 63507 */ "VROUNDPSri\0" |
| 48363 | /* 63518 */ "VPERMILPSri\0" |
| 48364 | /* 63530 */ "VROUNDSSri\0" |
| 48365 | /* 63541 */ "VPSRAWri\0" |
| 48366 | /* 63550 */ "MMX_PSRAWri\0" |
| 48367 | /* 63562 */ "MMX_PSHUFWri\0" |
| 48368 | /* 63575 */ "VPSHUFHWri\0" |
| 48369 | /* 63586 */ "VPSHUFLWri\0" |
| 48370 | /* 63597 */ "VPSLLWri\0" |
| 48371 | /* 63606 */ "MMX_PSLLWri\0" |
| 48372 | /* 63618 */ "VPSRLWri\0" |
| 48373 | /* 63627 */ "MMX_PSRLWri\0" |
| 48374 | /* 63639 */ "KSHIFTLWri\0" |
| 48375 | /* 63650 */ "VPCOMWri\0" |
| 48376 | /* 63659 */ "KSHIFTRWri\0" |
| 48377 | /* 63670 */ "VPROTWri\0" |
| 48378 | /* 63679 */ "VPCOMUWri\0" |
| 48379 | /* 63689 */ "VPSRADYri\0" |
| 48380 | /* 63699 */ "VPSHUFDYri\0" |
| 48381 | /* 63710 */ "VPSLLDYri\0" |
| 48382 | /* 63720 */ "VPSRLDYri\0" |
| 48383 | /* 63730 */ "VROUNDPDYri\0" |
| 48384 | /* 63742 */ "VPERMILPDYri\0" |
| 48385 | /* 63755 */ "VPERMPDYri\0" |
| 48386 | /* 63766 */ "VPSLLDQYri\0" |
| 48387 | /* 63777 */ "VPSRLDQYri\0" |
| 48388 | /* 63788 */ "VPSLLQYri\0" |
| 48389 | /* 63798 */ "VPSRLQYri\0" |
| 48390 | /* 63808 */ "VPERMQYri\0" |
| 48391 | /* 63818 */ "VROUNDPSYri\0" |
| 48392 | /* 63830 */ "VPERMILPSYri\0" |
| 48393 | /* 63843 */ "VPSRAWYri\0" |
| 48394 | /* 63853 */ "VPSHUFHWYri\0" |
| 48395 | /* 63865 */ "VPSHUFLWYri\0" |
| 48396 | /* 63877 */ "VPSLLWYri\0" |
| 48397 | /* 63887 */ "VPSRLWYri\0" |
| 48398 | /* 63897 */ "VPSRADZri\0" |
| 48399 | /* 63907 */ "VPSHUFDZri\0" |
| 48400 | /* 63918 */ "VPSLLDZri\0" |
| 48401 | /* 63928 */ "VPROLDZri\0" |
| 48402 | /* 63938 */ "VPSRLDZri\0" |
| 48403 | /* 63948 */ "VPERMILPDZri\0" |
| 48404 | /* 63961 */ "VPERMPDZri\0" |
| 48405 | /* 63972 */ "VPRORDZri\0" |
| 48406 | /* 63982 */ "VPSRAQZri\0" |
| 48407 | /* 63992 */ "VPSLLDQZri\0" |
| 48408 | /* 64003 */ "VPSRLDQZri\0" |
| 48409 | /* 64014 */ "VPSLLQZri\0" |
| 48410 | /* 64024 */ "VPROLQZri\0" |
| 48411 | /* 64034 */ "VPSRLQZri\0" |
| 48412 | /* 64044 */ "VPERMQZri\0" |
| 48413 | /* 64054 */ "VPRORQZri\0" |
| 48414 | /* 64064 */ "VPERMILPSZri\0" |
| 48415 | /* 64077 */ "VPSRAWZri\0" |
| 48416 | /* 64087 */ "VPSHUFHWZri\0" |
| 48417 | /* 64099 */ "VPSHUFLWZri\0" |
| 48418 | /* 64111 */ "VPSLLWZri\0" |
| 48419 | /* 64121 */ "VPSRLWZri\0" |
| 48420 | /* 64131 */ "LWPVAL32rri\0" |
| 48421 | /* 64143 */ "IMUL32rri\0" |
| 48422 | /* 64153 */ "LWPINS32rri\0" |
| 48423 | /* 64165 */ "IMULZU32rri\0" |
| 48424 | /* 64177 */ "LWPVAL64rri\0" |
| 48425 | /* 64189 */ "LWPINS64rri\0" |
| 48426 | /* 64201 */ "SHA1RNDS4rri\0" |
| 48427 | /* 64214 */ "IMUL16rri\0" |
| 48428 | /* 64224 */ "IMULZU16rri\0" |
| 48429 | /* 64236 */ "VSHUFF64X2Z256rri\0" |
| 48430 | /* 64254 */ "VSHUFI64X2Z256rri\0" |
| 48431 | /* 64272 */ "VSHUFF32X4Z256rri\0" |
| 48432 | /* 64290 */ "VSHUFI32X4Z256rri\0" |
| 48433 | /* 64308 */ "VPCMPBZ256rri\0" |
| 48434 | /* 64322 */ "VGF2P8AFFINEQBZ256rri\0" |
| 48435 | /* 64344 */ "VGF2P8AFFINEINVQBZ256rri\0" |
| 48436 | /* 64369 */ "VPCMPUBZ256rri\0" |
| 48437 | /* 64384 */ "VPSHLDDZ256rri\0" |
| 48438 | /* 64399 */ "VPSHRDDZ256rri\0" |
| 48439 | /* 64414 */ "VPTERNLOGDZ256rri\0" |
| 48440 | /* 64432 */ "VALIGNDZ256rri\0" |
| 48441 | /* 64447 */ "VREDUCEPDZ256rri\0" |
| 48442 | /* 64464 */ "VRANGEPDZ256rri\0" |
| 48443 | /* 64480 */ "VRNDSCALEPDZ256rri\0" |
| 48444 | /* 64499 */ "VSHUFPDZ256rri\0" |
| 48445 | /* 64514 */ "VPCMPDZ256rri\0" |
| 48446 | /* 64528 */ "VFIXUPIMMPDZ256rri\0" |
| 48447 | /* 64547 */ "VCMPPDZ256rri\0" |
| 48448 | /* 64561 */ "VGETMANTPDZ256rri\0" |
| 48449 | /* 64579 */ "VPCMPUDZ256rri\0" |
| 48450 | /* 64594 */ "VREDUCEPHZ256rri\0" |
| 48451 | /* 64611 */ "VRNDSCALEPHZ256rri\0" |
| 48452 | /* 64630 */ "VCMPPHZ256rri\0" |
| 48453 | /* 64644 */ "VGETMANTPHZ256rri\0" |
| 48454 | /* 64662 */ "VPSHLDQZ256rri\0" |
| 48455 | /* 64677 */ "VPCLMULQDQZ256rri\0" |
| 48456 | /* 64695 */ "VPSHRDQZ256rri\0" |
| 48457 | /* 64710 */ "VPTERNLOGQZ256rri\0" |
| 48458 | /* 64728 */ "VALIGNQZ256rri\0" |
| 48459 | /* 64743 */ "VPCMPQZ256rri\0" |
| 48460 | /* 64757 */ "VPCMPUQZ256rri\0" |
| 48461 | /* 64772 */ "VPALIGNRZ256rri\0" |
| 48462 | /* 64788 */ "VREDUCEPSZ256rri\0" |
| 48463 | /* 64805 */ "VRANGEPSZ256rri\0" |
| 48464 | /* 64821 */ "VRNDSCALEPSZ256rri\0" |
| 48465 | /* 64840 */ "VSHUFPSZ256rri\0" |
| 48466 | /* 64855 */ "VFIXUPIMMPSZ256rri\0" |
| 48467 | /* 64874 */ "VCMPPSZ256rri\0" |
| 48468 | /* 64888 */ "VGETMANTPSZ256rri\0" |
| 48469 | /* 64906 */ "VDBPSADBWZ256rri\0" |
| 48470 | /* 64923 */ "VPSHLDWZ256rri\0" |
| 48471 | /* 64938 */ "VPSHRDWZ256rri\0" |
| 48472 | /* 64953 */ "VPCMPWZ256rri\0" |
| 48473 | /* 64967 */ "VPCMPUWZ256rri\0" |
| 48474 | /* 64982 */ "VPCMPBZ128rri\0" |
| 48475 | /* 64996 */ "VGF2P8AFFINEQBZ128rri\0" |
| 48476 | /* 65018 */ "VGF2P8AFFINEINVQBZ128rri\0" |
| 48477 | /* 65043 */ "VPCMPUBZ128rri\0" |
| 48478 | /* 65058 */ "VPSHLDDZ128rri\0" |
| 48479 | /* 65073 */ "VPSHRDDZ128rri\0" |
| 48480 | /* 65088 */ "VPTERNLOGDZ128rri\0" |
| 48481 | /* 65106 */ "VALIGNDZ128rri\0" |
| 48482 | /* 65121 */ "VREDUCEPDZ128rri\0" |
| 48483 | /* 65138 */ "VRANGEPDZ128rri\0" |
| 48484 | /* 65154 */ "VRNDSCALEPDZ128rri\0" |
| 48485 | /* 65173 */ "VSHUFPDZ128rri\0" |
| 48486 | /* 65188 */ "VPCMPDZ128rri\0" |
| 48487 | /* 65202 */ "VFIXUPIMMPDZ128rri\0" |
| 48488 | /* 65221 */ "VCMPPDZ128rri\0" |
| 48489 | /* 65235 */ "VGETMANTPDZ128rri\0" |
| 48490 | /* 65253 */ "VPCMPUDZ128rri\0" |
| 48491 | /* 65268 */ "VREDUCEPHZ128rri\0" |
| 48492 | /* 65285 */ "VRNDSCALEPHZ128rri\0" |
| 48493 | /* 65304 */ "VCMPPHZ128rri\0" |
| 48494 | /* 65318 */ "VGETMANTPHZ128rri\0" |
| 48495 | /* 65336 */ "VPSHLDQZ128rri\0" |
| 48496 | /* 65351 */ "VPCLMULQDQZ128rri\0" |
| 48497 | /* 65369 */ "VPSHRDQZ128rri\0" |
| 48498 | /* 65384 */ "VPTERNLOGQZ128rri\0" |
| 48499 | /* 65402 */ "VALIGNQZ128rri\0" |
| 48500 | /* 65417 */ "VPCMPQZ128rri\0" |
| 48501 | /* 65431 */ "VPCMPUQZ128rri\0" |
| 48502 | /* 65446 */ "VPALIGNRZ128rri\0" |
| 48503 | /* 65462 */ "VREDUCEPSZ128rri\0" |
| 48504 | /* 65479 */ "VRANGEPSZ128rri\0" |
| 48505 | /* 65495 */ "VRNDSCALEPSZ128rri\0" |
| 48506 | /* 65514 */ "VSHUFPSZ128rri\0" |
| 48507 | /* 65529 */ "VFIXUPIMMPSZ128rri\0" |
| 48508 | /* 65548 */ "VCMPPSZ128rri\0" |
| 48509 | /* 65562 */ "VGETMANTPSZ128rri\0" |
| 48510 | /* 65580 */ "VDBPSADBWZ128rri\0" |
| 48511 | /* 65597 */ "VPSHLDWZ128rri\0" |
| 48512 | /* 65612 */ "VPSHRDWZ128rri\0" |
| 48513 | /* 65627 */ "VPCMPWZ128rri\0" |
| 48514 | /* 65641 */ "VPCMPUWZ128rri\0" |
| 48515 | /* 65656 */ "VGF2P8AFFINEQBrri\0" |
| 48516 | /* 65674 */ "VGF2P8AFFINEINVQBrri\0" |
| 48517 | /* 65695 */ "VPBLENDDrri\0" |
| 48518 | /* 65707 */ "VBLENDPDrri\0" |
| 48519 | /* 65719 */ "VSHUFPDrri\0" |
| 48520 | /* 65730 */ "VDPPDrri\0" |
| 48521 | /* 65739 */ "VCMPPDrri\0" |
| 48522 | /* 65749 */ "VCMPSDrri\0" |
| 48523 | /* 65759 */ "VPCMPESTRIrri\0" |
| 48524 | /* 65773 */ "VPCMPISTRIrri\0" |
| 48525 | /* 65787 */ "VPCMPESTRMrri\0" |
| 48526 | /* 65801 */ "VPCMPISTRMrri\0" |
| 48527 | /* 65815 */ "VPCLMULQDQrri\0" |
| 48528 | /* 65829 */ "VPALIGNRrri\0" |
| 48529 | /* 65841 */ "MMX_PALIGNRrri\0" |
| 48530 | /* 65856 */ "VBLENDPSrri\0" |
| 48531 | /* 65868 */ "VSHUFPSrri\0" |
| 48532 | /* 65879 */ "VDPPSrri\0" |
| 48533 | /* 65888 */ "VCMPPSrri\0" |
| 48534 | /* 65898 */ "VCMPSSrri\0" |
| 48535 | /* 65908 */ "VMPSADBWrri\0" |
| 48536 | /* 65920 */ "VPBLENDWrri\0" |
| 48537 | /* 65932 */ "VGF2P8AFFINEQBYrri\0" |
| 48538 | /* 65951 */ "VGF2P8AFFINEINVQBYrri\0" |
| 48539 | /* 65973 */ "VPBLENDDYrri\0" |
| 48540 | /* 65986 */ "VBLENDPDYrri\0" |
| 48541 | /* 65999 */ "VSHUFPDYrri\0" |
| 48542 | /* 66011 */ "VCMPPDYrri\0" |
| 48543 | /* 66022 */ "VPCLMULQDQYrri\0" |
| 48544 | /* 66037 */ "VPALIGNRYrri\0" |
| 48545 | /* 66050 */ "VBLENDPSYrri\0" |
| 48546 | /* 66063 */ "VSHUFPSYrri\0" |
| 48547 | /* 66075 */ "VDPPSYrri\0" |
| 48548 | /* 66085 */ "VCMPPSYrri\0" |
| 48549 | /* 66096 */ "VMPSADBWYrri\0" |
| 48550 | /* 66109 */ "VPBLENDWYrri\0" |
| 48551 | /* 66122 */ "VSHUFF64X2Zrri\0" |
| 48552 | /* 66137 */ "VSHUFI64X2Zrri\0" |
| 48553 | /* 66152 */ "VSHUFF32X4Zrri\0" |
| 48554 | /* 66167 */ "VSHUFI32X4Zrri\0" |
| 48555 | /* 66182 */ "VPCMPBZrri\0" |
| 48556 | /* 66193 */ "VGF2P8AFFINEQBZrri\0" |
| 48557 | /* 66212 */ "VGF2P8AFFINEINVQBZrri\0" |
| 48558 | /* 66234 */ "VPCMPUBZrri\0" |
| 48559 | /* 66246 */ "VPSHLDDZrri\0" |
| 48560 | /* 66258 */ "VPSHRDDZrri\0" |
| 48561 | /* 66270 */ "VPTERNLOGDZrri\0" |
| 48562 | /* 66285 */ "VALIGNDZrri\0" |
| 48563 | /* 66297 */ "VREDUCEPDZrri\0" |
| 48564 | /* 66311 */ "VRANGEPDZrri\0" |
| 48565 | /* 66324 */ "VRNDSCALEPDZrri\0" |
| 48566 | /* 66340 */ "VSHUFPDZrri\0" |
| 48567 | /* 66352 */ "VPCMPDZrri\0" |
| 48568 | /* 66363 */ "VFIXUPIMMPDZrri\0" |
| 48569 | /* 66379 */ "VCMPPDZrri\0" |
| 48570 | /* 66390 */ "VGETMANTPDZrri\0" |
| 48571 | /* 66405 */ "VREDUCESDZrri\0" |
| 48572 | /* 66419 */ "VRANGESDZrri\0" |
| 48573 | /* 66432 */ "VFIXUPIMMSDZrri\0" |
| 48574 | /* 66448 */ "VCMPSDZrri\0" |
| 48575 | /* 66459 */ "VGETMANTSDZrri\0" |
| 48576 | /* 66474 */ "VPCMPUDZrri\0" |
| 48577 | /* 66486 */ "VREDUCEPHZrri\0" |
| 48578 | /* 66500 */ "VRNDSCALEPHZrri\0" |
| 48579 | /* 66516 */ "VCMPPHZrri\0" |
| 48580 | /* 66527 */ "VGETMANTPHZrri\0" |
| 48581 | /* 66542 */ "VREDUCESHZrri\0" |
| 48582 | /* 66556 */ "VCMPSHZrri\0" |
| 48583 | /* 66567 */ "VGETMANTSHZrri\0" |
| 48584 | /* 66582 */ "VPSHLDQZrri\0" |
| 48585 | /* 66594 */ "VPCLMULQDQZrri\0" |
| 48586 | /* 66609 */ "VPSHRDQZrri\0" |
| 48587 | /* 66621 */ "VPTERNLOGQZrri\0" |
| 48588 | /* 66636 */ "VALIGNQZrri\0" |
| 48589 | /* 66648 */ "VPCMPQZrri\0" |
| 48590 | /* 66659 */ "VPCMPUQZrri\0" |
| 48591 | /* 66671 */ "VPALIGNRZrri\0" |
| 48592 | /* 66684 */ "VREDUCEPSZrri\0" |
| 48593 | /* 66698 */ "VRANGEPSZrri\0" |
| 48594 | /* 66711 */ "VRNDSCALEPSZrri\0" |
| 48595 | /* 66727 */ "VSHUFPSZrri\0" |
| 48596 | /* 66739 */ "VFIXUPIMMPSZrri\0" |
| 48597 | /* 66755 */ "VCMPPSZrri\0" |
| 48598 | /* 66766 */ "VGETMANTPSZrri\0" |
| 48599 | /* 66781 */ "VREDUCESSZrri\0" |
| 48600 | /* 66795 */ "VRANGESSZrri\0" |
| 48601 | /* 66808 */ "VFIXUPIMMSSZrri\0" |
| 48602 | /* 66824 */ "VCMPSSZrri\0" |
| 48603 | /* 66835 */ "VGETMANTSSZrri\0" |
| 48604 | /* 66850 */ "VDBPSADBWZrri\0" |
| 48605 | /* 66864 */ "VPSHLDWZrri\0" |
| 48606 | /* 66876 */ "VPSHRDWZrri\0" |
| 48607 | /* 66888 */ "VPCMPWZrri\0" |
| 48608 | /* 66899 */ "VPCMPUWZrri\0" |
| 48609 | /* 66911 */ "VPCMPDZ256rmibk\0" |
| 48610 | /* 66927 */ "VPCMPUDZ256rmibk\0" |
| 48611 | /* 66944 */ "VPCMPQZ256rmibk\0" |
| 48612 | /* 66960 */ "VPCMPUQZ256rmibk\0" |
| 48613 | /* 66977 */ "VPCMPDZ128rmibk\0" |
| 48614 | /* 66993 */ "VPCMPUDZ128rmibk\0" |
| 48615 | /* 67010 */ "VPCMPQZ128rmibk\0" |
| 48616 | /* 67026 */ "VPCMPUQZ128rmibk\0" |
| 48617 | /* 67043 */ "VPCMPDZrmibk\0" |
| 48618 | /* 67056 */ "VPCMPUDZrmibk\0" |
| 48619 | /* 67070 */ "VPCMPQZrmibk\0" |
| 48620 | /* 67083 */ "VPCMPUQZrmibk\0" |
| 48621 | /* 67097 */ "VREDUCEPDZrribk\0" |
| 48622 | /* 67113 */ "VRANGEPDZrribk\0" |
| 48623 | /* 67128 */ "VRNDSCALEPDZrribk\0" |
| 48624 | /* 67146 */ "VFIXUPIMMPDZrribk\0" |
| 48625 | /* 67164 */ "VCMPPDZrribk\0" |
| 48626 | /* 67177 */ "VGETMANTPDZrribk\0" |
| 48627 | /* 67194 */ "VREDUCESDZrribk\0" |
| 48628 | /* 67210 */ "VRANGESDZrribk\0" |
| 48629 | /* 67225 */ "VFIXUPIMMSDZrribk\0" |
| 48630 | /* 67243 */ "VGETMANTSDZrribk\0" |
| 48631 | /* 67260 */ "VREDUCEPHZrribk\0" |
| 48632 | /* 67276 */ "VRNDSCALEPHZrribk\0" |
| 48633 | /* 67294 */ "VCMPPHZrribk\0" |
| 48634 | /* 67307 */ "VGETMANTPHZrribk\0" |
| 48635 | /* 67324 */ "VREDUCESHZrribk\0" |
| 48636 | /* 67340 */ "VGETMANTSHZrribk\0" |
| 48637 | /* 67357 */ "VREDUCEPSZrribk\0" |
| 48638 | /* 67373 */ "VRANGEPSZrribk\0" |
| 48639 | /* 67388 */ "VRNDSCALEPSZrribk\0" |
| 48640 | /* 67406 */ "VFIXUPIMMPSZrribk\0" |
| 48641 | /* 67424 */ "VCMPPSZrribk\0" |
| 48642 | /* 67437 */ "VGETMANTPSZrribk\0" |
| 48643 | /* 67454 */ "VREDUCESSZrribk\0" |
| 48644 | /* 67470 */ "VRANGESSZrribk\0" |
| 48645 | /* 67485 */ "VFIXUPIMMSSZrribk\0" |
| 48646 | /* 67503 */ "VGETMANTSSZrribk\0" |
| 48647 | /* 67520 */ "VFMADDSUB231PDZ256mbk\0" |
| 48648 | /* 67542 */ "VFMSUB231PDZ256mbk\0" |
| 48649 | /* 67561 */ "VFNMSUB231PDZ256mbk\0" |
| 48650 | /* 67581 */ "VFMSUBADD231PDZ256mbk\0" |
| 48651 | /* 67603 */ "VFMADD231PDZ256mbk\0" |
| 48652 | /* 67622 */ "VFNMADD231PDZ256mbk\0" |
| 48653 | /* 67642 */ "VFMADDSUB132PDZ256mbk\0" |
| 48654 | /* 67664 */ "VFMSUB132PDZ256mbk\0" |
| 48655 | /* 67683 */ "VFNMSUB132PDZ256mbk\0" |
| 48656 | /* 67703 */ "VFMSUBADD132PDZ256mbk\0" |
| 48657 | /* 67725 */ "VFMADD132PDZ256mbk\0" |
| 48658 | /* 67744 */ "VFNMADD132PDZ256mbk\0" |
| 48659 | /* 67764 */ "VFMADDSUB213PDZ256mbk\0" |
| 48660 | /* 67786 */ "VFMSUB213PDZ256mbk\0" |
| 48661 | /* 67805 */ "VFNMSUB213PDZ256mbk\0" |
| 48662 | /* 67825 */ "VFMSUBADD213PDZ256mbk\0" |
| 48663 | /* 67847 */ "VFMADD213PDZ256mbk\0" |
| 48664 | /* 67866 */ "VFNMADD213PDZ256mbk\0" |
| 48665 | /* 67886 */ "VRCP14PDZ256mbk\0" |
| 48666 | /* 67902 */ "VRSQRT14PDZ256mbk\0" |
| 48667 | /* 67920 */ "VGETEXPPDZ256mbk\0" |
| 48668 | /* 67937 */ "VSQRTPDZ256mbk\0" |
| 48669 | /* 67952 */ "VPDPWSSDZ256mbk\0" |
| 48670 | /* 67968 */ "VPDPBUSDZ256mbk\0" |
| 48671 | /* 67984 */ "VPSHLDVDZ256mbk\0" |
| 48672 | /* 68000 */ "VPSHRDVDZ256mbk\0" |
| 48673 | /* 68016 */ "VFMADDSUB231PHZ256mbk\0" |
| 48674 | /* 68038 */ "VFMSUB231PHZ256mbk\0" |
| 48675 | /* 68057 */ "VFNMSUB231PHZ256mbk\0" |
| 48676 | /* 68077 */ "VFMSUBADD231PHZ256mbk\0" |
| 48677 | /* 68099 */ "VFMADD231PHZ256mbk\0" |
| 48678 | /* 68118 */ "VFNMADD231PHZ256mbk\0" |
| 48679 | /* 68138 */ "VFMADDSUB132PHZ256mbk\0" |
| 48680 | /* 68160 */ "VFMSUB132PHZ256mbk\0" |
| 48681 | /* 68179 */ "VFNMSUB132PHZ256mbk\0" |
| 48682 | /* 68199 */ "VFMSUBADD132PHZ256mbk\0" |
| 48683 | /* 68221 */ "VFMADD132PHZ256mbk\0" |
| 48684 | /* 68240 */ "VFNMADD132PHZ256mbk\0" |
| 48685 | /* 68260 */ "VFMADDSUB213PHZ256mbk\0" |
| 48686 | /* 68282 */ "VFMSUB213PHZ256mbk\0" |
| 48687 | /* 68301 */ "VFNMSUB213PHZ256mbk\0" |
| 48688 | /* 68321 */ "VFMSUBADD213PHZ256mbk\0" |
| 48689 | /* 68343 */ "VFMADD213PHZ256mbk\0" |
| 48690 | /* 68362 */ "VFNMADD213PHZ256mbk\0" |
| 48691 | /* 68382 */ "VFCMADDCPHZ256mbk\0" |
| 48692 | /* 68400 */ "VFMADDCPHZ256mbk\0" |
| 48693 | /* 68417 */ "VRCPPHZ256mbk\0" |
| 48694 | /* 68431 */ "VGETEXPPHZ256mbk\0" |
| 48695 | /* 68448 */ "VRSQRTPHZ256mbk\0" |
| 48696 | /* 68464 */ "VSQRTPHZ256mbk\0" |
| 48697 | /* 68479 */ "VPMADD52HUQZ256mbk\0" |
| 48698 | /* 68498 */ "VPMADD52LUQZ256mbk\0" |
| 48699 | /* 68517 */ "VPSHLDVQZ256mbk\0" |
| 48700 | /* 68533 */ "VPSHRDVQZ256mbk\0" |
| 48701 | /* 68549 */ "VPDPWSSDSZ256mbk\0" |
| 48702 | /* 68566 */ "VPDPBUSDSZ256mbk\0" |
| 48703 | /* 68583 */ "VFMADDSUB231PSZ256mbk\0" |
| 48704 | /* 68605 */ "VFMSUB231PSZ256mbk\0" |
| 48705 | /* 68624 */ "VFNMSUB231PSZ256mbk\0" |
| 48706 | /* 68644 */ "VFMSUBADD231PSZ256mbk\0" |
| 48707 | /* 68666 */ "VFMADD231PSZ256mbk\0" |
| 48708 | /* 68685 */ "VFNMADD231PSZ256mbk\0" |
| 48709 | /* 68705 */ "VFMADDSUB132PSZ256mbk\0" |
| 48710 | /* 68727 */ "VFMSUB132PSZ256mbk\0" |
| 48711 | /* 68746 */ "VFNMSUB132PSZ256mbk\0" |
| 48712 | /* 68766 */ "VFMSUBADD132PSZ256mbk\0" |
| 48713 | /* 68788 */ "VFMADD132PSZ256mbk\0" |
| 48714 | /* 68807 */ "VFNMADD132PSZ256mbk\0" |
| 48715 | /* 68827 */ "VFMADDSUB213PSZ256mbk\0" |
| 48716 | /* 68849 */ "VFMSUB213PSZ256mbk\0" |
| 48717 | /* 68868 */ "VFNMSUB213PSZ256mbk\0" |
| 48718 | /* 68888 */ "VFMSUBADD213PSZ256mbk\0" |
| 48719 | /* 68910 */ "VFMADD213PSZ256mbk\0" |
| 48720 | /* 68929 */ "VFNMADD213PSZ256mbk\0" |
| 48721 | /* 68949 */ "VRCP14PSZ256mbk\0" |
| 48722 | /* 68965 */ "VRSQRT14PSZ256mbk\0" |
| 48723 | /* 68983 */ "VDPBF16PSZ256mbk\0" |
| 48724 | /* 69000 */ "VGETEXPPSZ256mbk\0" |
| 48725 | /* 69017 */ "VSQRTPSZ256mbk\0" |
| 48726 | /* 69032 */ "VFMADDSUB231PDZ128mbk\0" |
| 48727 | /* 69054 */ "VFMSUB231PDZ128mbk\0" |
| 48728 | /* 69073 */ "VFNMSUB231PDZ128mbk\0" |
| 48729 | /* 69093 */ "VFMSUBADD231PDZ128mbk\0" |
| 48730 | /* 69115 */ "VFMADD231PDZ128mbk\0" |
| 48731 | /* 69134 */ "VFNMADD231PDZ128mbk\0" |
| 48732 | /* 69154 */ "VFMADDSUB132PDZ128mbk\0" |
| 48733 | /* 69176 */ "VFMSUB132PDZ128mbk\0" |
| 48734 | /* 69195 */ "VFNMSUB132PDZ128mbk\0" |
| 48735 | /* 69215 */ "VFMSUBADD132PDZ128mbk\0" |
| 48736 | /* 69237 */ "VFMADD132PDZ128mbk\0" |
| 48737 | /* 69256 */ "VFNMADD132PDZ128mbk\0" |
| 48738 | /* 69276 */ "VFMADDSUB213PDZ128mbk\0" |
| 48739 | /* 69298 */ "VFMSUB213PDZ128mbk\0" |
| 48740 | /* 69317 */ "VFNMSUB213PDZ128mbk\0" |
| 48741 | /* 69337 */ "VFMSUBADD213PDZ128mbk\0" |
| 48742 | /* 69359 */ "VFMADD213PDZ128mbk\0" |
| 48743 | /* 69378 */ "VFNMADD213PDZ128mbk\0" |
| 48744 | /* 69398 */ "VRCP14PDZ128mbk\0" |
| 48745 | /* 69414 */ "VRSQRT14PDZ128mbk\0" |
| 48746 | /* 69432 */ "VGETEXPPDZ128mbk\0" |
| 48747 | /* 69449 */ "VSQRTPDZ128mbk\0" |
| 48748 | /* 69464 */ "VPDPWSSDZ128mbk\0" |
| 48749 | /* 69480 */ "VPDPBUSDZ128mbk\0" |
| 48750 | /* 69496 */ "VPSHLDVDZ128mbk\0" |
| 48751 | /* 69512 */ "VPSHRDVDZ128mbk\0" |
| 48752 | /* 69528 */ "VFMADDSUB231PHZ128mbk\0" |
| 48753 | /* 69550 */ "VFMSUB231PHZ128mbk\0" |
| 48754 | /* 69569 */ "VFNMSUB231PHZ128mbk\0" |
| 48755 | /* 69589 */ "VFMSUBADD231PHZ128mbk\0" |
| 48756 | /* 69611 */ "VFMADD231PHZ128mbk\0" |
| 48757 | /* 69630 */ "VFNMADD231PHZ128mbk\0" |
| 48758 | /* 69650 */ "VFMADDSUB132PHZ128mbk\0" |
| 48759 | /* 69672 */ "VFMSUB132PHZ128mbk\0" |
| 48760 | /* 69691 */ "VFNMSUB132PHZ128mbk\0" |
| 48761 | /* 69711 */ "VFMSUBADD132PHZ128mbk\0" |
| 48762 | /* 69733 */ "VFMADD132PHZ128mbk\0" |
| 48763 | /* 69752 */ "VFNMADD132PHZ128mbk\0" |
| 48764 | /* 69772 */ "VFMADDSUB213PHZ128mbk\0" |
| 48765 | /* 69794 */ "VFMSUB213PHZ128mbk\0" |
| 48766 | /* 69813 */ "VFNMSUB213PHZ128mbk\0" |
| 48767 | /* 69833 */ "VFMSUBADD213PHZ128mbk\0" |
| 48768 | /* 69855 */ "VFMADD213PHZ128mbk\0" |
| 48769 | /* 69874 */ "VFNMADD213PHZ128mbk\0" |
| 48770 | /* 69894 */ "VFCMADDCPHZ128mbk\0" |
| 48771 | /* 69912 */ "VFMADDCPHZ128mbk\0" |
| 48772 | /* 69929 */ "VRCPPHZ128mbk\0" |
| 48773 | /* 69943 */ "VGETEXPPHZ128mbk\0" |
| 48774 | /* 69960 */ "VRSQRTPHZ128mbk\0" |
| 48775 | /* 69976 */ "VSQRTPHZ128mbk\0" |
| 48776 | /* 69991 */ "VPMADD52HUQZ128mbk\0" |
| 48777 | /* 70010 */ "VPMADD52LUQZ128mbk\0" |
| 48778 | /* 70029 */ "VPSHLDVQZ128mbk\0" |
| 48779 | /* 70045 */ "VPSHRDVQZ128mbk\0" |
| 48780 | /* 70061 */ "VPDPWSSDSZ128mbk\0" |
| 48781 | /* 70078 */ "VPDPBUSDSZ128mbk\0" |
| 48782 | /* 70095 */ "VFMADDSUB231PSZ128mbk\0" |
| 48783 | /* 70117 */ "VFMSUB231PSZ128mbk\0" |
| 48784 | /* 70136 */ "VFNMSUB231PSZ128mbk\0" |
| 48785 | /* 70156 */ "VFMSUBADD231PSZ128mbk\0" |
| 48786 | /* 70178 */ "VFMADD231PSZ128mbk\0" |
| 48787 | /* 70197 */ "VFNMADD231PSZ128mbk\0" |
| 48788 | /* 70217 */ "VFMADDSUB132PSZ128mbk\0" |
| 48789 | /* 70239 */ "VFMSUB132PSZ128mbk\0" |
| 48790 | /* 70258 */ "VFNMSUB132PSZ128mbk\0" |
| 48791 | /* 70278 */ "VFMSUBADD132PSZ128mbk\0" |
| 48792 | /* 70300 */ "VFMADD132PSZ128mbk\0" |
| 48793 | /* 70319 */ "VFNMADD132PSZ128mbk\0" |
| 48794 | /* 70339 */ "VFMADDSUB213PSZ128mbk\0" |
| 48795 | /* 70361 */ "VFMSUB213PSZ128mbk\0" |
| 48796 | /* 70380 */ "VFNMSUB213PSZ128mbk\0" |
| 48797 | /* 70400 */ "VFMSUBADD213PSZ128mbk\0" |
| 48798 | /* 70422 */ "VFMADD213PSZ128mbk\0" |
| 48799 | /* 70441 */ "VFNMADD213PSZ128mbk\0" |
| 48800 | /* 70461 */ "VRCP14PSZ128mbk\0" |
| 48801 | /* 70477 */ "VRSQRT14PSZ128mbk\0" |
| 48802 | /* 70495 */ "VDPBF16PSZ128mbk\0" |
| 48803 | /* 70512 */ "VGETEXPPSZ128mbk\0" |
| 48804 | /* 70529 */ "VSQRTPSZ128mbk\0" |
| 48805 | /* 70544 */ "VFMADDSUB231PDZmbk\0" |
| 48806 | /* 70563 */ "VFMSUB231PDZmbk\0" |
| 48807 | /* 70579 */ "VFNMSUB231PDZmbk\0" |
| 48808 | /* 70596 */ "VFMSUBADD231PDZmbk\0" |
| 48809 | /* 70615 */ "VFMADD231PDZmbk\0" |
| 48810 | /* 70631 */ "VFNMADD231PDZmbk\0" |
| 48811 | /* 70648 */ "VFMADDSUB132PDZmbk\0" |
| 48812 | /* 70667 */ "VFMSUB132PDZmbk\0" |
| 48813 | /* 70683 */ "VFNMSUB132PDZmbk\0" |
| 48814 | /* 70700 */ "VFMSUBADD132PDZmbk\0" |
| 48815 | /* 70719 */ "VFMADD132PDZmbk\0" |
| 48816 | /* 70735 */ "VFNMADD132PDZmbk\0" |
| 48817 | /* 70752 */ "VEXP2PDZmbk\0" |
| 48818 | /* 70764 */ "VFMADDSUB213PDZmbk\0" |
| 48819 | /* 70783 */ "VFMSUB213PDZmbk\0" |
| 48820 | /* 70799 */ "VFNMSUB213PDZmbk\0" |
| 48821 | /* 70816 */ "VFMSUBADD213PDZmbk\0" |
| 48822 | /* 70835 */ "VFMADD213PDZmbk\0" |
| 48823 | /* 70851 */ "VFNMADD213PDZmbk\0" |
| 48824 | /* 70868 */ "VRCP14PDZmbk\0" |
| 48825 | /* 70881 */ "VRSQRT14PDZmbk\0" |
| 48826 | /* 70896 */ "VRCP28PDZmbk\0" |
| 48827 | /* 70909 */ "VRSQRT28PDZmbk\0" |
| 48828 | /* 70924 */ "VGETEXPPDZmbk\0" |
| 48829 | /* 70938 */ "VSQRTPDZmbk\0" |
| 48830 | /* 70950 */ "VPDPWSSDZmbk\0" |
| 48831 | /* 70963 */ "VPDPBUSDZmbk\0" |
| 48832 | /* 70976 */ "VPSHLDVDZmbk\0" |
| 48833 | /* 70989 */ "VPSHRDVDZmbk\0" |
| 48834 | /* 71002 */ "VFMADDSUB231PHZmbk\0" |
| 48835 | /* 71021 */ "VFMSUB231PHZmbk\0" |
| 48836 | /* 71037 */ "VFNMSUB231PHZmbk\0" |
| 48837 | /* 71054 */ "VFMSUBADD231PHZmbk\0" |
| 48838 | /* 71073 */ "VFMADD231PHZmbk\0" |
| 48839 | /* 71089 */ "VFNMADD231PHZmbk\0" |
| 48840 | /* 71106 */ "VFMADDSUB132PHZmbk\0" |
| 48841 | /* 71125 */ "VFMSUB132PHZmbk\0" |
| 48842 | /* 71141 */ "VFNMSUB132PHZmbk\0" |
| 48843 | /* 71158 */ "VFMSUBADD132PHZmbk\0" |
| 48844 | /* 71177 */ "VFMADD132PHZmbk\0" |
| 48845 | /* 71193 */ "VFNMADD132PHZmbk\0" |
| 48846 | /* 71210 */ "VFMADDSUB213PHZmbk\0" |
| 48847 | /* 71229 */ "VFMSUB213PHZmbk\0" |
| 48848 | /* 71245 */ "VFNMSUB213PHZmbk\0" |
| 48849 | /* 71262 */ "VFMSUBADD213PHZmbk\0" |
| 48850 | /* 71281 */ "VFMADD213PHZmbk\0" |
| 48851 | /* 71297 */ "VFNMADD213PHZmbk\0" |
| 48852 | /* 71314 */ "VFCMADDCPHZmbk\0" |
| 48853 | /* 71329 */ "VFMADDCPHZmbk\0" |
| 48854 | /* 71343 */ "VRCPPHZmbk\0" |
| 48855 | /* 71354 */ "VGETEXPPHZmbk\0" |
| 48856 | /* 71368 */ "VRSQRTPHZmbk\0" |
| 48857 | /* 71381 */ "VSQRTPHZmbk\0" |
| 48858 | /* 71393 */ "VPMADD52HUQZmbk\0" |
| 48859 | /* 71409 */ "VPMADD52LUQZmbk\0" |
| 48860 | /* 71425 */ "VPSHLDVQZmbk\0" |
| 48861 | /* 71438 */ "VPSHRDVQZmbk\0" |
| 48862 | /* 71451 */ "VPDPWSSDSZmbk\0" |
| 48863 | /* 71465 */ "VPDPBUSDSZmbk\0" |
| 48864 | /* 71479 */ "VFMADDSUB231PSZmbk\0" |
| 48865 | /* 71498 */ "VFMSUB231PSZmbk\0" |
| 48866 | /* 71514 */ "VFNMSUB231PSZmbk\0" |
| 48867 | /* 71531 */ "VFMSUBADD231PSZmbk\0" |
| 48868 | /* 71550 */ "VFMADD231PSZmbk\0" |
| 48869 | /* 71566 */ "VFNMADD231PSZmbk\0" |
| 48870 | /* 71583 */ "VFMADDSUB132PSZmbk\0" |
| 48871 | /* 71602 */ "VFMSUB132PSZmbk\0" |
| 48872 | /* 71618 */ "VFNMSUB132PSZmbk\0" |
| 48873 | /* 71635 */ "VFMSUBADD132PSZmbk\0" |
| 48874 | /* 71654 */ "VFMADD132PSZmbk\0" |
| 48875 | /* 71670 */ "VFNMADD132PSZmbk\0" |
| 48876 | /* 71687 */ "VEXP2PSZmbk\0" |
| 48877 | /* 71699 */ "VFMADDSUB213PSZmbk\0" |
| 48878 | /* 71718 */ "VFMSUB213PSZmbk\0" |
| 48879 | /* 71734 */ "VFNMSUB213PSZmbk\0" |
| 48880 | /* 71751 */ "VFMSUBADD213PSZmbk\0" |
| 48881 | /* 71770 */ "VFMADD213PSZmbk\0" |
| 48882 | /* 71786 */ "VFNMADD213PSZmbk\0" |
| 48883 | /* 71803 */ "VRCP14PSZmbk\0" |
| 48884 | /* 71816 */ "VRSQRT14PSZmbk\0" |
| 48885 | /* 71831 */ "VDPBF16PSZmbk\0" |
| 48886 | /* 71845 */ "VRCP28PSZmbk\0" |
| 48887 | /* 71858 */ "VRSQRT28PSZmbk\0" |
| 48888 | /* 71873 */ "VGETEXPPSZmbk\0" |
| 48889 | /* 71887 */ "VSQRTPSZmbk\0" |
| 48890 | /* 71899 */ "VCVTNE2PS2BF16Z256rmbk\0" |
| 48891 | /* 71922 */ "VCVTNEPS2BF16Z256rmbk\0" |
| 48892 | /* 71944 */ "VPMULTISHIFTQBZ256rmbk\0" |
| 48893 | /* 71967 */ "VPERMI2DZ256rmbk\0" |
| 48894 | /* 71984 */ "VPERMT2DZ256rmbk\0" |
| 48895 | /* 72001 */ "VPSUBDZ256rmbk\0" |
| 48896 | /* 72016 */ "VPADDDZ256rmbk\0" |
| 48897 | /* 72031 */ "VPANDDZ256rmbk\0" |
| 48898 | /* 72046 */ "VPMULLDZ256rmbk\0" |
| 48899 | /* 72062 */ "VPBLENDMDZ256rmbk\0" |
| 48900 | /* 72080 */ "VPTESTNMDZ256rmbk\0" |
| 48901 | /* 72098 */ "VPERMDZ256rmbk\0" |
| 48902 | /* 72113 */ "VPTESTMDZ256rmbk\0" |
| 48903 | /* 72130 */ "VPANDNDZ256rmbk\0" |
| 48904 | /* 72146 */ "VCVTPH2PDZ256rmbk\0" |
| 48905 | /* 72164 */ "VPERMI2PDZ256rmbk\0" |
| 48906 | /* 72182 */ "VCVTDQ2PDZ256rmbk\0" |
| 48907 | /* 72200 */ "VCVTUDQ2PDZ256rmbk\0" |
| 48908 | /* 72219 */ "VCVTQQ2PDZ256rmbk\0" |
| 48909 | /* 72237 */ "VCVTUQQ2PDZ256rmbk\0" |
| 48910 | /* 72256 */ "VCVTPS2PDZ256rmbk\0" |
| 48911 | /* 72274 */ "VPERMT2PDZ256rmbk\0" |
| 48912 | /* 72292 */ "VSUBPDZ256rmbk\0" |
| 48913 | /* 72307 */ "VMINCPDZ256rmbk\0" |
| 48914 | /* 72323 */ "VMAXCPDZ256rmbk\0" |
| 48915 | /* 72339 */ "VADDPDZ256rmbk\0" |
| 48916 | /* 72354 */ "VANDPDZ256rmbk\0" |
| 48917 | /* 72369 */ "VSCALEFPDZ256rmbk\0" |
| 48918 | /* 72387 */ "VUNPCKHPDZ256rmbk\0" |
| 48919 | /* 72405 */ "VPERMILPDZ256rmbk\0" |
| 48920 | /* 72423 */ "VUNPCKLPDZ256rmbk\0" |
| 48921 | /* 72441 */ "VMULPDZ256rmbk\0" |
| 48922 | /* 72456 */ "VBLENDMPDZ256rmbk\0" |
| 48923 | /* 72474 */ "VPERMPDZ256rmbk\0" |
| 48924 | /* 72490 */ "VANDNPDZ256rmbk\0" |
| 48925 | /* 72506 */ "VMINPDZ256rmbk\0" |
| 48926 | /* 72521 */ "VORPDZ256rmbk\0" |
| 48927 | /* 72535 */ "VXORPDZ256rmbk\0" |
| 48928 | /* 72550 */ "VFPCLASSPDZ256rmbk\0" |
| 48929 | /* 72569 */ "VDIVPDZ256rmbk\0" |
| 48930 | /* 72584 */ "VMAXPDZ256rmbk\0" |
| 48931 | /* 72599 */ "VPCMPEQDZ256rmbk\0" |
| 48932 | /* 72616 */ "VPORDZ256rmbk\0" |
| 48933 | /* 72630 */ "VPXORDZ256rmbk\0" |
| 48934 | /* 72645 */ "VPABSDZ256rmbk\0" |
| 48935 | /* 72660 */ "VPMINSDZ256rmbk\0" |
| 48936 | /* 72676 */ "VPMAXSDZ256rmbk\0" |
| 48937 | /* 72692 */ "VPCONFLICTDZ256rmbk\0" |
| 48938 | /* 72712 */ "VPCMPGTDZ256rmbk\0" |
| 48939 | /* 72729 */ "VPOPCNTDZ256rmbk\0" |
| 48940 | /* 72746 */ "VPLZCNTDZ256rmbk\0" |
| 48941 | /* 72763 */ "VPMINUDZ256rmbk\0" |
| 48942 | /* 72779 */ "VPMAXUDZ256rmbk\0" |
| 48943 | /* 72795 */ "VPSRAVDZ256rmbk\0" |
| 48944 | /* 72811 */ "VPSLLVDZ256rmbk\0" |
| 48945 | /* 72827 */ "VPROLVDZ256rmbk\0" |
| 48946 | /* 72843 */ "VPSRLVDZ256rmbk\0" |
| 48947 | /* 72859 */ "VPRORVDZ256rmbk\0" |
| 48948 | /* 72875 */ "VCVTPD2PHZ256rmbk\0" |
| 48949 | /* 72893 */ "VCVTDQ2PHZ256rmbk\0" |
| 48950 | /* 72911 */ "VCVTUDQ2PHZ256rmbk\0" |
| 48951 | /* 72930 */ "VCVTQQ2PHZ256rmbk\0" |
| 48952 | /* 72948 */ "VCVTUQQ2PHZ256rmbk\0" |
| 48953 | /* 72967 */ "VCVTW2PHZ256rmbk\0" |
| 48954 | /* 72984 */ "VCVTUW2PHZ256rmbk\0" |
| 48955 | /* 73002 */ "VSUBPHZ256rmbk\0" |
| 48956 | /* 73017 */ "VFCMULCPHZ256rmbk\0" |
| 48957 | /* 73035 */ "VFMULCPHZ256rmbk\0" |
| 48958 | /* 73052 */ "VMINCPHZ256rmbk\0" |
| 48959 | /* 73068 */ "VMAXCPHZ256rmbk\0" |
| 48960 | /* 73084 */ "VADDPHZ256rmbk\0" |
| 48961 | /* 73099 */ "VSCALEFPHZ256rmbk\0" |
| 48962 | /* 73117 */ "VMULPHZ256rmbk\0" |
| 48963 | /* 73132 */ "VMINPHZ256rmbk\0" |
| 48964 | /* 73147 */ "VFPCLASSPHZ256rmbk\0" |
| 48965 | /* 73166 */ "VDIVPHZ256rmbk\0" |
| 48966 | /* 73181 */ "VMAXPHZ256rmbk\0" |
| 48967 | /* 73196 */ "VPERMI2QZ256rmbk\0" |
| 48968 | /* 73213 */ "VPERMT2QZ256rmbk\0" |
| 48969 | /* 73230 */ "VPSUBQZ256rmbk\0" |
| 48970 | /* 73245 */ "VCVTTPD2DQZ256rmbk\0" |
| 48971 | /* 73264 */ "VCVTPD2DQZ256rmbk\0" |
| 48972 | /* 73282 */ "VCVTTPH2DQZ256rmbk\0" |
| 48973 | /* 73301 */ "VCVTPH2DQZ256rmbk\0" |
| 48974 | /* 73319 */ "VCVTTPS2DQZ256rmbk\0" |
| 48975 | /* 73338 */ "VCVTPS2DQZ256rmbk\0" |
| 48976 | /* 73356 */ "VPADDQZ256rmbk\0" |
| 48977 | /* 73371 */ "VPUNPCKHDQZ256rmbk\0" |
| 48978 | /* 73390 */ "VPUNPCKLDQZ256rmbk\0" |
| 48979 | /* 73409 */ "VPMULDQZ256rmbk\0" |
| 48980 | /* 73425 */ "VPANDQZ256rmbk\0" |
| 48981 | /* 73440 */ "VPUNPCKHQDQZ256rmbk\0" |
| 48982 | /* 73460 */ "VPUNPCKLQDQZ256rmbk\0" |
| 48983 | /* 73480 */ "VCVTTPD2UDQZ256rmbk\0" |
| 48984 | /* 73500 */ "VCVTPD2UDQZ256rmbk\0" |
| 48985 | /* 73519 */ "VCVTTPH2UDQZ256rmbk\0" |
| 48986 | /* 73539 */ "VCVTPH2UDQZ256rmbk\0" |
| 48987 | /* 73558 */ "VCVTTPS2UDQZ256rmbk\0" |
| 48988 | /* 73578 */ "VCVTPS2UDQZ256rmbk\0" |
| 48989 | /* 73597 */ "VPMULUDQZ256rmbk\0" |
| 48990 | /* 73614 */ "VPMULLQZ256rmbk\0" |
| 48991 | /* 73630 */ "VPBLENDMQZ256rmbk\0" |
| 48992 | /* 73648 */ "VPTESTNMQZ256rmbk\0" |
| 48993 | /* 73666 */ "VPERMQZ256rmbk\0" |
| 48994 | /* 73681 */ "VPTESTMQZ256rmbk\0" |
| 48995 | /* 73698 */ "VPANDNQZ256rmbk\0" |
| 48996 | /* 73714 */ "VCVTTPD2QQZ256rmbk\0" |
| 48997 | /* 73733 */ "VCVTPD2QQZ256rmbk\0" |
| 48998 | /* 73751 */ "VCVTTPH2QQZ256rmbk\0" |
| 48999 | /* 73770 */ "VCVTPH2QQZ256rmbk\0" |
| 49000 | /* 73788 */ "VCVTTPS2QQZ256rmbk\0" |
| 49001 | /* 73807 */ "VCVTPS2QQZ256rmbk\0" |
| 49002 | /* 73825 */ "VPCMPEQQZ256rmbk\0" |
| 49003 | /* 73842 */ "VCVTTPD2UQQZ256rmbk\0" |
| 49004 | /* 73862 */ "VCVTPD2UQQZ256rmbk\0" |
| 49005 | /* 73881 */ "VCVTTPH2UQQZ256rmbk\0" |
| 49006 | /* 73901 */ "VCVTPH2UQQZ256rmbk\0" |
| 49007 | /* 73920 */ "VCVTTPS2UQQZ256rmbk\0" |
| 49008 | /* 73940 */ "VCVTPS2UQQZ256rmbk\0" |
| 49009 | /* 73959 */ "VPORQZ256rmbk\0" |
| 49010 | /* 73973 */ "VPXORQZ256rmbk\0" |
| 49011 | /* 73988 */ "VPABSQZ256rmbk\0" |
| 49012 | /* 74003 */ "VPMINSQZ256rmbk\0" |
| 49013 | /* 74019 */ "VPMAXSQZ256rmbk\0" |
| 49014 | /* 74035 */ "VPCONFLICTQZ256rmbk\0" |
| 49015 | /* 74055 */ "VPCMPGTQZ256rmbk\0" |
| 49016 | /* 74072 */ "VPOPCNTQZ256rmbk\0" |
| 49017 | /* 74089 */ "VPLZCNTQZ256rmbk\0" |
| 49018 | /* 74106 */ "VPMINUQZ256rmbk\0" |
| 49019 | /* 74122 */ "VPMAXUQZ256rmbk\0" |
| 49020 | /* 74138 */ "VPSRAVQZ256rmbk\0" |
| 49021 | /* 74154 */ "VPSLLVQZ256rmbk\0" |
| 49022 | /* 74170 */ "VPROLVQZ256rmbk\0" |
| 49023 | /* 74186 */ "VPSRLVQZ256rmbk\0" |
| 49024 | /* 74202 */ "VPRORVQZ256rmbk\0" |
| 49025 | /* 74218 */ "VCVTPD2PSZ256rmbk\0" |
| 49026 | /* 74236 */ "VPERMI2PSZ256rmbk\0" |
| 49027 | /* 74254 */ "VCVTDQ2PSZ256rmbk\0" |
| 49028 | /* 74272 */ "VCVTUDQ2PSZ256rmbk\0" |
| 49029 | /* 74291 */ "VCVTQQ2PSZ256rmbk\0" |
| 49030 | /* 74309 */ "VCVTUQQ2PSZ256rmbk\0" |
| 49031 | /* 74328 */ "VPERMT2PSZ256rmbk\0" |
| 49032 | /* 74346 */ "VSUBPSZ256rmbk\0" |
| 49033 | /* 74361 */ "VMINCPSZ256rmbk\0" |
| 49034 | /* 74377 */ "VMAXCPSZ256rmbk\0" |
| 49035 | /* 74393 */ "VADDPSZ256rmbk\0" |
| 49036 | /* 74408 */ "VANDPSZ256rmbk\0" |
| 49037 | /* 74423 */ "VSCALEFPSZ256rmbk\0" |
| 49038 | /* 74441 */ "VUNPCKHPSZ256rmbk\0" |
| 49039 | /* 74459 */ "VPERMILPSZ256rmbk\0" |
| 49040 | /* 74477 */ "VUNPCKLPSZ256rmbk\0" |
| 49041 | /* 74495 */ "VMULPSZ256rmbk\0" |
| 49042 | /* 74510 */ "VBLENDMPSZ256rmbk\0" |
| 49043 | /* 74528 */ "VPERMPSZ256rmbk\0" |
| 49044 | /* 74544 */ "VANDNPSZ256rmbk\0" |
| 49045 | /* 74560 */ "VMINPSZ256rmbk\0" |
| 49046 | /* 74575 */ "VORPSZ256rmbk\0" |
| 49047 | /* 74589 */ "VXORPSZ256rmbk\0" |
| 49048 | /* 74604 */ "VFPCLASSPSZ256rmbk\0" |
| 49049 | /* 74623 */ "VDIVPSZ256rmbk\0" |
| 49050 | /* 74638 */ "VMAXPSZ256rmbk\0" |
| 49051 | /* 74653 */ "VCVTTPH2WZ256rmbk\0" |
| 49052 | /* 74671 */ "VCVTPH2WZ256rmbk\0" |
| 49053 | /* 74688 */ "VPACKSSDWZ256rmbk\0" |
| 49054 | /* 74706 */ "VPACKUSDWZ256rmbk\0" |
| 49055 | /* 74724 */ "VCVTTPH2UWZ256rmbk\0" |
| 49056 | /* 74743 */ "VCVTPH2UWZ256rmbk\0" |
| 49057 | /* 74761 */ "VCVTPS2PHXZ256rmbk\0" |
| 49058 | /* 74780 */ "VCVTPH2PSXZ256rmbk\0" |
| 49059 | /* 74799 */ "VCVTNE2PS2BF16Z128rmbk\0" |
| 49060 | /* 74822 */ "VCVTNEPS2BF16Z128rmbk\0" |
| 49061 | /* 74844 */ "VPMULTISHIFTQBZ128rmbk\0" |
| 49062 | /* 74867 */ "VPERMI2DZ128rmbk\0" |
| 49063 | /* 74884 */ "VPERMT2DZ128rmbk\0" |
| 49064 | /* 74901 */ "VPSUBDZ128rmbk\0" |
| 49065 | /* 74916 */ "VPADDDZ128rmbk\0" |
| 49066 | /* 74931 */ "VPANDDZ128rmbk\0" |
| 49067 | /* 74946 */ "VPMULLDZ128rmbk\0" |
| 49068 | /* 74962 */ "VPBLENDMDZ128rmbk\0" |
| 49069 | /* 74980 */ "VPTESTNMDZ128rmbk\0" |
| 49070 | /* 74998 */ "VPTESTMDZ128rmbk\0" |
| 49071 | /* 75015 */ "VPANDNDZ128rmbk\0" |
| 49072 | /* 75031 */ "VCVTPH2PDZ128rmbk\0" |
| 49073 | /* 75049 */ "VPERMI2PDZ128rmbk\0" |
| 49074 | /* 75067 */ "VCVTDQ2PDZ128rmbk\0" |
| 49075 | /* 75085 */ "VCVTUDQ2PDZ128rmbk\0" |
| 49076 | /* 75104 */ "VCVTQQ2PDZ128rmbk\0" |
| 49077 | /* 75122 */ "VCVTUQQ2PDZ128rmbk\0" |
| 49078 | /* 75141 */ "VCVTPS2PDZ128rmbk\0" |
| 49079 | /* 75159 */ "VPERMT2PDZ128rmbk\0" |
| 49080 | /* 75177 */ "VSUBPDZ128rmbk\0" |
| 49081 | /* 75192 */ "VMINCPDZ128rmbk\0" |
| 49082 | /* 75208 */ "VMAXCPDZ128rmbk\0" |
| 49083 | /* 75224 */ "VADDPDZ128rmbk\0" |
| 49084 | /* 75239 */ "VANDPDZ128rmbk\0" |
| 49085 | /* 75254 */ "VSCALEFPDZ128rmbk\0" |
| 49086 | /* 75272 */ "VUNPCKHPDZ128rmbk\0" |
| 49087 | /* 75290 */ "VPERMILPDZ128rmbk\0" |
| 49088 | /* 75308 */ "VUNPCKLPDZ128rmbk\0" |
| 49089 | /* 75326 */ "VMULPDZ128rmbk\0" |
| 49090 | /* 75341 */ "VBLENDMPDZ128rmbk\0" |
| 49091 | /* 75359 */ "VANDNPDZ128rmbk\0" |
| 49092 | /* 75375 */ "VMINPDZ128rmbk\0" |
| 49093 | /* 75390 */ "VORPDZ128rmbk\0" |
| 49094 | /* 75404 */ "VXORPDZ128rmbk\0" |
| 49095 | /* 75419 */ "VFPCLASSPDZ128rmbk\0" |
| 49096 | /* 75438 */ "VDIVPDZ128rmbk\0" |
| 49097 | /* 75453 */ "VMAXPDZ128rmbk\0" |
| 49098 | /* 75468 */ "VPCMPEQDZ128rmbk\0" |
| 49099 | /* 75485 */ "VPORDZ128rmbk\0" |
| 49100 | /* 75499 */ "VPXORDZ128rmbk\0" |
| 49101 | /* 75514 */ "VPABSDZ128rmbk\0" |
| 49102 | /* 75529 */ "VPMINSDZ128rmbk\0" |
| 49103 | /* 75545 */ "VPMAXSDZ128rmbk\0" |
| 49104 | /* 75561 */ "VPCONFLICTDZ128rmbk\0" |
| 49105 | /* 75581 */ "VPCMPGTDZ128rmbk\0" |
| 49106 | /* 75598 */ "VPOPCNTDZ128rmbk\0" |
| 49107 | /* 75615 */ "VPLZCNTDZ128rmbk\0" |
| 49108 | /* 75632 */ "VPMINUDZ128rmbk\0" |
| 49109 | /* 75648 */ "VPMAXUDZ128rmbk\0" |
| 49110 | /* 75664 */ "VPSRAVDZ128rmbk\0" |
| 49111 | /* 75680 */ "VPSLLVDZ128rmbk\0" |
| 49112 | /* 75696 */ "VPROLVDZ128rmbk\0" |
| 49113 | /* 75712 */ "VPSRLVDZ128rmbk\0" |
| 49114 | /* 75728 */ "VPRORVDZ128rmbk\0" |
| 49115 | /* 75744 */ "VCVTPD2PHZ128rmbk\0" |
| 49116 | /* 75762 */ "VCVTDQ2PHZ128rmbk\0" |
| 49117 | /* 75780 */ "VCVTUDQ2PHZ128rmbk\0" |
| 49118 | /* 75799 */ "VCVTQQ2PHZ128rmbk\0" |
| 49119 | /* 75817 */ "VCVTUQQ2PHZ128rmbk\0" |
| 49120 | /* 75836 */ "VCVTW2PHZ128rmbk\0" |
| 49121 | /* 75853 */ "VCVTUW2PHZ128rmbk\0" |
| 49122 | /* 75871 */ "VSUBPHZ128rmbk\0" |
| 49123 | /* 75886 */ "VFCMULCPHZ128rmbk\0" |
| 49124 | /* 75904 */ "VFMULCPHZ128rmbk\0" |
| 49125 | /* 75921 */ "VMINCPHZ128rmbk\0" |
| 49126 | /* 75937 */ "VMAXCPHZ128rmbk\0" |
| 49127 | /* 75953 */ "VADDPHZ128rmbk\0" |
| 49128 | /* 75968 */ "VSCALEFPHZ128rmbk\0" |
| 49129 | /* 75986 */ "VMULPHZ128rmbk\0" |
| 49130 | /* 76001 */ "VMINPHZ128rmbk\0" |
| 49131 | /* 76016 */ "VFPCLASSPHZ128rmbk\0" |
| 49132 | /* 76035 */ "VDIVPHZ128rmbk\0" |
| 49133 | /* 76050 */ "VMAXPHZ128rmbk\0" |
| 49134 | /* 76065 */ "VPERMI2QZ128rmbk\0" |
| 49135 | /* 76082 */ "VPERMT2QZ128rmbk\0" |
| 49136 | /* 76099 */ "VPSUBQZ128rmbk\0" |
| 49137 | /* 76114 */ "VCVTTPD2DQZ128rmbk\0" |
| 49138 | /* 76133 */ "VCVTPD2DQZ128rmbk\0" |
| 49139 | /* 76151 */ "VCVTTPH2DQZ128rmbk\0" |
| 49140 | /* 76170 */ "VCVTPH2DQZ128rmbk\0" |
| 49141 | /* 76188 */ "VCVTTPS2DQZ128rmbk\0" |
| 49142 | /* 76207 */ "VCVTPS2DQZ128rmbk\0" |
| 49143 | /* 76225 */ "VPADDQZ128rmbk\0" |
| 49144 | /* 76240 */ "VPUNPCKHDQZ128rmbk\0" |
| 49145 | /* 76259 */ "VPUNPCKLDQZ128rmbk\0" |
| 49146 | /* 76278 */ "VPMULDQZ128rmbk\0" |
| 49147 | /* 76294 */ "VPANDQZ128rmbk\0" |
| 49148 | /* 76309 */ "VPUNPCKHQDQZ128rmbk\0" |
| 49149 | /* 76329 */ "VPUNPCKLQDQZ128rmbk\0" |
| 49150 | /* 76349 */ "VCVTTPD2UDQZ128rmbk\0" |
| 49151 | /* 76369 */ "VCVTPD2UDQZ128rmbk\0" |
| 49152 | /* 76388 */ "VCVTTPH2UDQZ128rmbk\0" |
| 49153 | /* 76408 */ "VCVTPH2UDQZ128rmbk\0" |
| 49154 | /* 76427 */ "VCVTTPS2UDQZ128rmbk\0" |
| 49155 | /* 76447 */ "VCVTPS2UDQZ128rmbk\0" |
| 49156 | /* 76466 */ "VPMULUDQZ128rmbk\0" |
| 49157 | /* 76483 */ "VPMULLQZ128rmbk\0" |
| 49158 | /* 76499 */ "VPBLENDMQZ128rmbk\0" |
| 49159 | /* 76517 */ "VPTESTNMQZ128rmbk\0" |
| 49160 | /* 76535 */ "VPTESTMQZ128rmbk\0" |
| 49161 | /* 76552 */ "VPANDNQZ128rmbk\0" |
| 49162 | /* 76568 */ "VCVTTPD2QQZ128rmbk\0" |
| 49163 | /* 76587 */ "VCVTPD2QQZ128rmbk\0" |
| 49164 | /* 76605 */ "VCVTTPH2QQZ128rmbk\0" |
| 49165 | /* 76624 */ "VCVTPH2QQZ128rmbk\0" |
| 49166 | /* 76642 */ "VCVTTPS2QQZ128rmbk\0" |
| 49167 | /* 76661 */ "VCVTPS2QQZ128rmbk\0" |
| 49168 | /* 76679 */ "VPCMPEQQZ128rmbk\0" |
| 49169 | /* 76696 */ "VCVTTPD2UQQZ128rmbk\0" |
| 49170 | /* 76716 */ "VCVTPD2UQQZ128rmbk\0" |
| 49171 | /* 76735 */ "VCVTTPH2UQQZ128rmbk\0" |
| 49172 | /* 76755 */ "VCVTPH2UQQZ128rmbk\0" |
| 49173 | /* 76774 */ "VCVTTPS2UQQZ128rmbk\0" |
| 49174 | /* 76794 */ "VCVTPS2UQQZ128rmbk\0" |
| 49175 | /* 76813 */ "VPORQZ128rmbk\0" |
| 49176 | /* 76827 */ "VPXORQZ128rmbk\0" |
| 49177 | /* 76842 */ "VPABSQZ128rmbk\0" |
| 49178 | /* 76857 */ "VPMINSQZ128rmbk\0" |
| 49179 | /* 76873 */ "VPMAXSQZ128rmbk\0" |
| 49180 | /* 76889 */ "VPCONFLICTQZ128rmbk\0" |
| 49181 | /* 76909 */ "VPCMPGTQZ128rmbk\0" |
| 49182 | /* 76926 */ "VPOPCNTQZ128rmbk\0" |
| 49183 | /* 76943 */ "VPLZCNTQZ128rmbk\0" |
| 49184 | /* 76960 */ "VPMINUQZ128rmbk\0" |
| 49185 | /* 76976 */ "VPMAXUQZ128rmbk\0" |
| 49186 | /* 76992 */ "VPSRAVQZ128rmbk\0" |
| 49187 | /* 77008 */ "VPSLLVQZ128rmbk\0" |
| 49188 | /* 77024 */ "VPROLVQZ128rmbk\0" |
| 49189 | /* 77040 */ "VPSRLVQZ128rmbk\0" |
| 49190 | /* 77056 */ "VPRORVQZ128rmbk\0" |
| 49191 | /* 77072 */ "VCVTPD2PSZ128rmbk\0" |
| 49192 | /* 77090 */ "VPERMI2PSZ128rmbk\0" |
| 49193 | /* 77108 */ "VCVTDQ2PSZ128rmbk\0" |
| 49194 | /* 77126 */ "VCVTUDQ2PSZ128rmbk\0" |
| 49195 | /* 77145 */ "VCVTQQ2PSZ128rmbk\0" |
| 49196 | /* 77163 */ "VCVTUQQ2PSZ128rmbk\0" |
| 49197 | /* 77182 */ "VPERMT2PSZ128rmbk\0" |
| 49198 | /* 77200 */ "VSUBPSZ128rmbk\0" |
| 49199 | /* 77215 */ "VMINCPSZ128rmbk\0" |
| 49200 | /* 77231 */ "VMAXCPSZ128rmbk\0" |
| 49201 | /* 77247 */ "VADDPSZ128rmbk\0" |
| 49202 | /* 77262 */ "VANDPSZ128rmbk\0" |
| 49203 | /* 77277 */ "VSCALEFPSZ128rmbk\0" |
| 49204 | /* 77295 */ "VUNPCKHPSZ128rmbk\0" |
| 49205 | /* 77313 */ "VPERMILPSZ128rmbk\0" |
| 49206 | /* 77331 */ "VUNPCKLPSZ128rmbk\0" |
| 49207 | /* 77349 */ "VMULPSZ128rmbk\0" |
| 49208 | /* 77364 */ "VBLENDMPSZ128rmbk\0" |
| 49209 | /* 77382 */ "VANDNPSZ128rmbk\0" |
| 49210 | /* 77398 */ "VMINPSZ128rmbk\0" |
| 49211 | /* 77413 */ "VORPSZ128rmbk\0" |
| 49212 | /* 77427 */ "VXORPSZ128rmbk\0" |
| 49213 | /* 77442 */ "VFPCLASSPSZ128rmbk\0" |
| 49214 | /* 77461 */ "VDIVPSZ128rmbk\0" |
| 49215 | /* 77476 */ "VMAXPSZ128rmbk\0" |
| 49216 | /* 77491 */ "VCVTTPH2WZ128rmbk\0" |
| 49217 | /* 77509 */ "VCVTPH2WZ128rmbk\0" |
| 49218 | /* 77526 */ "VPACKSSDWZ128rmbk\0" |
| 49219 | /* 77544 */ "VPACKUSDWZ128rmbk\0" |
| 49220 | /* 77562 */ "VCVTTPH2UWZ128rmbk\0" |
| 49221 | /* 77581 */ "VCVTPH2UWZ128rmbk\0" |
| 49222 | /* 77599 */ "VCVTPS2PHXZ128rmbk\0" |
| 49223 | /* 77618 */ "VCVTPH2PSXZ128rmbk\0" |
| 49224 | /* 77637 */ "VCVTNE2PS2BF16Zrmbk\0" |
| 49225 | /* 77657 */ "VCVTNEPS2BF16Zrmbk\0" |
| 49226 | /* 77676 */ "VPMULTISHIFTQBZrmbk\0" |
| 49227 | /* 77696 */ "VPERMI2DZrmbk\0" |
| 49228 | /* 77710 */ "VPERMT2DZrmbk\0" |
| 49229 | /* 77724 */ "VPSUBDZrmbk\0" |
| 49230 | /* 77736 */ "VPADDDZrmbk\0" |
| 49231 | /* 77748 */ "VPANDDZrmbk\0" |
| 49232 | /* 77760 */ "VPMULLDZrmbk\0" |
| 49233 | /* 77773 */ "VPBLENDMDZrmbk\0" |
| 49234 | /* 77788 */ "VPTESTNMDZrmbk\0" |
| 49235 | /* 77803 */ "VPERMDZrmbk\0" |
| 49236 | /* 77815 */ "VPTESTMDZrmbk\0" |
| 49237 | /* 77829 */ "VPANDNDZrmbk\0" |
| 49238 | /* 77842 */ "VCVTPH2PDZrmbk\0" |
| 49239 | /* 77857 */ "VPERMI2PDZrmbk\0" |
| 49240 | /* 77872 */ "VCVTDQ2PDZrmbk\0" |
| 49241 | /* 77887 */ "VCVTUDQ2PDZrmbk\0" |
| 49242 | /* 77903 */ "VCVTQQ2PDZrmbk\0" |
| 49243 | /* 77918 */ "VCVTUQQ2PDZrmbk\0" |
| 49244 | /* 77934 */ "VCVTPS2PDZrmbk\0" |
| 49245 | /* 77949 */ "VPERMT2PDZrmbk\0" |
| 49246 | /* 77964 */ "VSUBPDZrmbk\0" |
| 49247 | /* 77976 */ "VMINCPDZrmbk\0" |
| 49248 | /* 77989 */ "VMAXCPDZrmbk\0" |
| 49249 | /* 78002 */ "VADDPDZrmbk\0" |
| 49250 | /* 78014 */ "VANDPDZrmbk\0" |
| 49251 | /* 78026 */ "VSCALEFPDZrmbk\0" |
| 49252 | /* 78041 */ "VUNPCKHPDZrmbk\0" |
| 49253 | /* 78056 */ "VPERMILPDZrmbk\0" |
| 49254 | /* 78071 */ "VUNPCKLPDZrmbk\0" |
| 49255 | /* 78086 */ "VMULPDZrmbk\0" |
| 49256 | /* 78098 */ "VBLENDMPDZrmbk\0" |
| 49257 | /* 78113 */ "VPERMPDZrmbk\0" |
| 49258 | /* 78126 */ "VANDNPDZrmbk\0" |
| 49259 | /* 78139 */ "VMINPDZrmbk\0" |
| 49260 | /* 78151 */ "VORPDZrmbk\0" |
| 49261 | /* 78162 */ "VXORPDZrmbk\0" |
| 49262 | /* 78174 */ "VFPCLASSPDZrmbk\0" |
| 49263 | /* 78190 */ "VDIVPDZrmbk\0" |
| 49264 | /* 78202 */ "VMAXPDZrmbk\0" |
| 49265 | /* 78214 */ "VPCMPEQDZrmbk\0" |
| 49266 | /* 78228 */ "VPORDZrmbk\0" |
| 49267 | /* 78239 */ "VPXORDZrmbk\0" |
| 49268 | /* 78251 */ "VPABSDZrmbk\0" |
| 49269 | /* 78263 */ "VPMINSDZrmbk\0" |
| 49270 | /* 78276 */ "VPMAXSDZrmbk\0" |
| 49271 | /* 78289 */ "VPCONFLICTDZrmbk\0" |
| 49272 | /* 78306 */ "VPCMPGTDZrmbk\0" |
| 49273 | /* 78320 */ "VPOPCNTDZrmbk\0" |
| 49274 | /* 78334 */ "VPLZCNTDZrmbk\0" |
| 49275 | /* 78348 */ "VPMINUDZrmbk\0" |
| 49276 | /* 78361 */ "VPMAXUDZrmbk\0" |
| 49277 | /* 78374 */ "VPSRAVDZrmbk\0" |
| 49278 | /* 78387 */ "VPSLLVDZrmbk\0" |
| 49279 | /* 78400 */ "VPROLVDZrmbk\0" |
| 49280 | /* 78413 */ "VPSRLVDZrmbk\0" |
| 49281 | /* 78426 */ "VPRORVDZrmbk\0" |
| 49282 | /* 78439 */ "VCVTPD2PHZrmbk\0" |
| 49283 | /* 78454 */ "VCVTDQ2PHZrmbk\0" |
| 49284 | /* 78469 */ "VCVTUDQ2PHZrmbk\0" |
| 49285 | /* 78485 */ "VCVTQQ2PHZrmbk\0" |
| 49286 | /* 78500 */ "VCVTUQQ2PHZrmbk\0" |
| 49287 | /* 78516 */ "VCVTW2PHZrmbk\0" |
| 49288 | /* 78530 */ "VCVTUW2PHZrmbk\0" |
| 49289 | /* 78545 */ "VSUBPHZrmbk\0" |
| 49290 | /* 78557 */ "VFCMULCPHZrmbk\0" |
| 49291 | /* 78572 */ "VFMULCPHZrmbk\0" |
| 49292 | /* 78586 */ "VMINCPHZrmbk\0" |
| 49293 | /* 78599 */ "VMAXCPHZrmbk\0" |
| 49294 | /* 78612 */ "VADDPHZrmbk\0" |
| 49295 | /* 78624 */ "VSCALEFPHZrmbk\0" |
| 49296 | /* 78639 */ "VMULPHZrmbk\0" |
| 49297 | /* 78651 */ "VMINPHZrmbk\0" |
| 49298 | /* 78663 */ "VFPCLASSPHZrmbk\0" |
| 49299 | /* 78679 */ "VDIVPHZrmbk\0" |
| 49300 | /* 78691 */ "VMAXPHZrmbk\0" |
| 49301 | /* 78703 */ "VPERMI2QZrmbk\0" |
| 49302 | /* 78717 */ "VPERMT2QZrmbk\0" |
| 49303 | /* 78731 */ "VPSUBQZrmbk\0" |
| 49304 | /* 78743 */ "VCVTTPD2DQZrmbk\0" |
| 49305 | /* 78759 */ "VCVTPD2DQZrmbk\0" |
| 49306 | /* 78774 */ "VCVTTPH2DQZrmbk\0" |
| 49307 | /* 78790 */ "VCVTPH2DQZrmbk\0" |
| 49308 | /* 78805 */ "VCVTTPS2DQZrmbk\0" |
| 49309 | /* 78821 */ "VCVTPS2DQZrmbk\0" |
| 49310 | /* 78836 */ "VPADDQZrmbk\0" |
| 49311 | /* 78848 */ "VPUNPCKHDQZrmbk\0" |
| 49312 | /* 78864 */ "VPUNPCKLDQZrmbk\0" |
| 49313 | /* 78880 */ "VPMULDQZrmbk\0" |
| 49314 | /* 78893 */ "VPANDQZrmbk\0" |
| 49315 | /* 78905 */ "VPUNPCKHQDQZrmbk\0" |
| 49316 | /* 78922 */ "VPUNPCKLQDQZrmbk\0" |
| 49317 | /* 78939 */ "VCVTTPD2UDQZrmbk\0" |
| 49318 | /* 78956 */ "VCVTPD2UDQZrmbk\0" |
| 49319 | /* 78972 */ "VCVTTPH2UDQZrmbk\0" |
| 49320 | /* 78989 */ "VCVTPH2UDQZrmbk\0" |
| 49321 | /* 79005 */ "VCVTTPS2UDQZrmbk\0" |
| 49322 | /* 79022 */ "VCVTPS2UDQZrmbk\0" |
| 49323 | /* 79038 */ "VPMULUDQZrmbk\0" |
| 49324 | /* 79052 */ "VPMULLQZrmbk\0" |
| 49325 | /* 79065 */ "VPBLENDMQZrmbk\0" |
| 49326 | /* 79080 */ "VPTESTNMQZrmbk\0" |
| 49327 | /* 79095 */ "VPERMQZrmbk\0" |
| 49328 | /* 79107 */ "VPTESTMQZrmbk\0" |
| 49329 | /* 79121 */ "VPANDNQZrmbk\0" |
| 49330 | /* 79134 */ "VCVTTPD2QQZrmbk\0" |
| 49331 | /* 79150 */ "VCVTPD2QQZrmbk\0" |
| 49332 | /* 79165 */ "VCVTTPH2QQZrmbk\0" |
| 49333 | /* 79181 */ "VCVTPH2QQZrmbk\0" |
| 49334 | /* 79196 */ "VCVTTPS2QQZrmbk\0" |
| 49335 | /* 79212 */ "VCVTPS2QQZrmbk\0" |
| 49336 | /* 79227 */ "VPCMPEQQZrmbk\0" |
| 49337 | /* 79241 */ "VCVTTPD2UQQZrmbk\0" |
| 49338 | /* 79258 */ "VCVTPD2UQQZrmbk\0" |
| 49339 | /* 79274 */ "VCVTTPH2UQQZrmbk\0" |
| 49340 | /* 79291 */ "VCVTPH2UQQZrmbk\0" |
| 49341 | /* 79307 */ "VCVTTPS2UQQZrmbk\0" |
| 49342 | /* 79324 */ "VCVTPS2UQQZrmbk\0" |
| 49343 | /* 79340 */ "VPORQZrmbk\0" |
| 49344 | /* 79351 */ "VPXORQZrmbk\0" |
| 49345 | /* 79363 */ "VPABSQZrmbk\0" |
| 49346 | /* 79375 */ "VPMINSQZrmbk\0" |
| 49347 | /* 79388 */ "VPMAXSQZrmbk\0" |
| 49348 | /* 79401 */ "VPCONFLICTQZrmbk\0" |
| 49349 | /* 79418 */ "VPCMPGTQZrmbk\0" |
| 49350 | /* 79432 */ "VPOPCNTQZrmbk\0" |
| 49351 | /* 79446 */ "VPLZCNTQZrmbk\0" |
| 49352 | /* 79460 */ "VPMINUQZrmbk\0" |
| 49353 | /* 79473 */ "VPMAXUQZrmbk\0" |
| 49354 | /* 79486 */ "VPSRAVQZrmbk\0" |
| 49355 | /* 79499 */ "VPSLLVQZrmbk\0" |
| 49356 | /* 79512 */ "VPROLVQZrmbk\0" |
| 49357 | /* 79525 */ "VPSRLVQZrmbk\0" |
| 49358 | /* 79538 */ "VPRORVQZrmbk\0" |
| 49359 | /* 79551 */ "VCVTPD2PSZrmbk\0" |
| 49360 | /* 79566 */ "VPERMI2PSZrmbk\0" |
| 49361 | /* 79581 */ "VCVTDQ2PSZrmbk\0" |
| 49362 | /* 79596 */ "VCVTUDQ2PSZrmbk\0" |
| 49363 | /* 79612 */ "VCVTQQ2PSZrmbk\0" |
| 49364 | /* 79627 */ "VCVTUQQ2PSZrmbk\0" |
| 49365 | /* 79643 */ "VPERMT2PSZrmbk\0" |
| 49366 | /* 79658 */ "VSUBPSZrmbk\0" |
| 49367 | /* 79670 */ "VMINCPSZrmbk\0" |
| 49368 | /* 79683 */ "VMAXCPSZrmbk\0" |
| 49369 | /* 79696 */ "VADDPSZrmbk\0" |
| 49370 | /* 79708 */ "VANDPSZrmbk\0" |
| 49371 | /* 79720 */ "VSCALEFPSZrmbk\0" |
| 49372 | /* 79735 */ "VUNPCKHPSZrmbk\0" |
| 49373 | /* 79750 */ "VPERMILPSZrmbk\0" |
| 49374 | /* 79765 */ "VUNPCKLPSZrmbk\0" |
| 49375 | /* 79780 */ "VMULPSZrmbk\0" |
| 49376 | /* 79792 */ "VBLENDMPSZrmbk\0" |
| 49377 | /* 79807 */ "VPERMPSZrmbk\0" |
| 49378 | /* 79820 */ "VANDNPSZrmbk\0" |
| 49379 | /* 79833 */ "VMINPSZrmbk\0" |
| 49380 | /* 79845 */ "VORPSZrmbk\0" |
| 49381 | /* 79856 */ "VXORPSZrmbk\0" |
| 49382 | /* 79868 */ "VFPCLASSPSZrmbk\0" |
| 49383 | /* 79884 */ "VDIVPSZrmbk\0" |
| 49384 | /* 79896 */ "VMAXPSZrmbk\0" |
| 49385 | /* 79908 */ "VCVTTPH2WZrmbk\0" |
| 49386 | /* 79923 */ "VCVTPH2WZrmbk\0" |
| 49387 | /* 79937 */ "VPACKSSDWZrmbk\0" |
| 49388 | /* 79952 */ "VPACKUSDWZrmbk\0" |
| 49389 | /* 79967 */ "VCVTTPH2UWZrmbk\0" |
| 49390 | /* 79983 */ "VCVTPH2UWZrmbk\0" |
| 49391 | /* 79998 */ "VCVTPS2PHXZrmbk\0" |
| 49392 | /* 80014 */ "VCVTPH2PSXZrmbk\0" |
| 49393 | /* 80030 */ "VFMADDSUB231PDZrbk\0" |
| 49394 | /* 80049 */ "VFMSUB231PDZrbk\0" |
| 49395 | /* 80065 */ "VFNMSUB231PDZrbk\0" |
| 49396 | /* 80082 */ "VFMSUBADD231PDZrbk\0" |
| 49397 | /* 80101 */ "VFMADD231PDZrbk\0" |
| 49398 | /* 80117 */ "VFNMADD231PDZrbk\0" |
| 49399 | /* 80134 */ "VFMADDSUB132PDZrbk\0" |
| 49400 | /* 80153 */ "VFMSUB132PDZrbk\0" |
| 49401 | /* 80169 */ "VFNMSUB132PDZrbk\0" |
| 49402 | /* 80186 */ "VFMSUBADD132PDZrbk\0" |
| 49403 | /* 80205 */ "VFMADD132PDZrbk\0" |
| 49404 | /* 80221 */ "VFNMADD132PDZrbk\0" |
| 49405 | /* 80238 */ "VEXP2PDZrbk\0" |
| 49406 | /* 80250 */ "VFMADDSUB213PDZrbk\0" |
| 49407 | /* 80269 */ "VFMSUB213PDZrbk\0" |
| 49408 | /* 80285 */ "VFNMSUB213PDZrbk\0" |
| 49409 | /* 80302 */ "VFMSUBADD213PDZrbk\0" |
| 49410 | /* 80321 */ "VFMADD213PDZrbk\0" |
| 49411 | /* 80337 */ "VFNMADD213PDZrbk\0" |
| 49412 | /* 80354 */ "VRCP28PDZrbk\0" |
| 49413 | /* 80367 */ "VRSQRT28PDZrbk\0" |
| 49414 | /* 80382 */ "VGETEXPPDZrbk\0" |
| 49415 | /* 80396 */ "VSQRTPDZrbk\0" |
| 49416 | /* 80408 */ "VRCP28SDZrbk\0" |
| 49417 | /* 80421 */ "VRSQRT28SDZrbk\0" |
| 49418 | /* 80436 */ "VGETEXPSDZrbk\0" |
| 49419 | /* 80450 */ "VFMADDSUB231PHZrbk\0" |
| 49420 | /* 80469 */ "VFMSUB231PHZrbk\0" |
| 49421 | /* 80485 */ "VFNMSUB231PHZrbk\0" |
| 49422 | /* 80502 */ "VFMSUBADD231PHZrbk\0" |
| 49423 | /* 80521 */ "VFMADD231PHZrbk\0" |
| 49424 | /* 80537 */ "VFNMADD231PHZrbk\0" |
| 49425 | /* 80554 */ "VFMADDSUB132PHZrbk\0" |
| 49426 | /* 80573 */ "VFMSUB132PHZrbk\0" |
| 49427 | /* 80589 */ "VFNMSUB132PHZrbk\0" |
| 49428 | /* 80606 */ "VFMSUBADD132PHZrbk\0" |
| 49429 | /* 80625 */ "VFMADD132PHZrbk\0" |
| 49430 | /* 80641 */ "VFNMADD132PHZrbk\0" |
| 49431 | /* 80658 */ "VFMADDSUB213PHZrbk\0" |
| 49432 | /* 80677 */ "VFMSUB213PHZrbk\0" |
| 49433 | /* 80693 */ "VFNMSUB213PHZrbk\0" |
| 49434 | /* 80710 */ "VFMSUBADD213PHZrbk\0" |
| 49435 | /* 80729 */ "VFMADD213PHZrbk\0" |
| 49436 | /* 80745 */ "VFNMADD213PHZrbk\0" |
| 49437 | /* 80762 */ "VFCMADDCPHZrbk\0" |
| 49438 | /* 80777 */ "VFMADDCPHZrbk\0" |
| 49439 | /* 80791 */ "VGETEXPPHZrbk\0" |
| 49440 | /* 80805 */ "VSQRTPHZrbk\0" |
| 49441 | /* 80817 */ "VFCMADDCSHZrbk\0" |
| 49442 | /* 80832 */ "VFMADDCSHZrbk\0" |
| 49443 | /* 80846 */ "VGETEXPSHZrbk\0" |
| 49444 | /* 80860 */ "VFMADDSUB231PSZrbk\0" |
| 49445 | /* 80879 */ "VFMSUB231PSZrbk\0" |
| 49446 | /* 80895 */ "VFNMSUB231PSZrbk\0" |
| 49447 | /* 80912 */ "VFMSUBADD231PSZrbk\0" |
| 49448 | /* 80931 */ "VFMADD231PSZrbk\0" |
| 49449 | /* 80947 */ "VFNMADD231PSZrbk\0" |
| 49450 | /* 80964 */ "VFMADDSUB132PSZrbk\0" |
| 49451 | /* 80983 */ "VFMSUB132PSZrbk\0" |
| 49452 | /* 80999 */ "VFNMSUB132PSZrbk\0" |
| 49453 | /* 81016 */ "VFMSUBADD132PSZrbk\0" |
| 49454 | /* 81035 */ "VFMADD132PSZrbk\0" |
| 49455 | /* 81051 */ "VFNMADD132PSZrbk\0" |
| 49456 | /* 81068 */ "VEXP2PSZrbk\0" |
| 49457 | /* 81080 */ "VFMADDSUB213PSZrbk\0" |
| 49458 | /* 81099 */ "VFMSUB213PSZrbk\0" |
| 49459 | /* 81115 */ "VFNMSUB213PSZrbk\0" |
| 49460 | /* 81132 */ "VFMSUBADD213PSZrbk\0" |
| 49461 | /* 81151 */ "VFMADD213PSZrbk\0" |
| 49462 | /* 81167 */ "VFNMADD213PSZrbk\0" |
| 49463 | /* 81184 */ "VRCP28PSZrbk\0" |
| 49464 | /* 81197 */ "VRSQRT28PSZrbk\0" |
| 49465 | /* 81212 */ "VGETEXPPSZrbk\0" |
| 49466 | /* 81226 */ "VSQRTPSZrbk\0" |
| 49467 | /* 81238 */ "VRCP28SSZrbk\0" |
| 49468 | /* 81251 */ "VRSQRT28SSZrbk\0" |
| 49469 | /* 81266 */ "VGETEXPSSZrbk\0" |
| 49470 | /* 81280 */ "VCVTPH2PDZrrbk\0" |
| 49471 | /* 81295 */ "VCVTQQ2PDZrrbk\0" |
| 49472 | /* 81310 */ "VCVTUQQ2PDZrrbk\0" |
| 49473 | /* 81326 */ "VCVTPS2PDZrrbk\0" |
| 49474 | /* 81341 */ "VSUBPDZrrbk\0" |
| 49475 | /* 81353 */ "VADDPDZrrbk\0" |
| 49476 | /* 81365 */ "VSCALEFPDZrrbk\0" |
| 49477 | /* 81380 */ "VMULPDZrrbk\0" |
| 49478 | /* 81392 */ "VMINPDZrrbk\0" |
| 49479 | /* 81404 */ "VDIVPDZrrbk\0" |
| 49480 | /* 81416 */ "VMAXPDZrrbk\0" |
| 49481 | /* 81428 */ "VCVTPD2PHZrrbk\0" |
| 49482 | /* 81443 */ "VCVTDQ2PHZrrbk\0" |
| 49483 | /* 81458 */ "VCVTUDQ2PHZrrbk\0" |
| 49484 | /* 81474 */ "VCVTQQ2PHZrrbk\0" |
| 49485 | /* 81489 */ "VCVTUQQ2PHZrrbk\0" |
| 49486 | /* 81505 */ "VCVTPS2PHZrrbk\0" |
| 49487 | /* 81520 */ "VCVTW2PHZrrbk\0" |
| 49488 | /* 81534 */ "VCVTUW2PHZrrbk\0" |
| 49489 | /* 81549 */ "VSUBPHZrrbk\0" |
| 49490 | /* 81561 */ "VFCMULCPHZrrbk\0" |
| 49491 | /* 81576 */ "VFMULCPHZrrbk\0" |
| 49492 | /* 81590 */ "VADDPHZrrbk\0" |
| 49493 | /* 81602 */ "VSCALEFPHZrrbk\0" |
| 49494 | /* 81617 */ "VMULPHZrrbk\0" |
| 49495 | /* 81629 */ "VMINPHZrrbk\0" |
| 49496 | /* 81641 */ "VDIVPHZrrbk\0" |
| 49497 | /* 81653 */ "VMAXPHZrrbk\0" |
| 49498 | /* 81665 */ "VFCMULCSHZrrbk\0" |
| 49499 | /* 81680 */ "VFMULCSHZrrbk\0" |
| 49500 | /* 81694 */ "VCVTTPD2DQZrrbk\0" |
| 49501 | /* 81710 */ "VCVTPD2DQZrrbk\0" |
| 49502 | /* 81725 */ "VCVTTPH2DQZrrbk\0" |
| 49503 | /* 81741 */ "VCVTPH2DQZrrbk\0" |
| 49504 | /* 81756 */ "VCVTTPS2DQZrrbk\0" |
| 49505 | /* 81772 */ "VCVTPS2DQZrrbk\0" |
| 49506 | /* 81787 */ "VCVTTPD2UDQZrrbk\0" |
| 49507 | /* 81804 */ "VCVTPD2UDQZrrbk\0" |
| 49508 | /* 81820 */ "VCVTTPH2UDQZrrbk\0" |
| 49509 | /* 81837 */ "VCVTPH2UDQZrrbk\0" |
| 49510 | /* 81853 */ "VCVTTPS2UDQZrrbk\0" |
| 49511 | /* 81870 */ "VCVTPS2UDQZrrbk\0" |
| 49512 | /* 81886 */ "VCVTTPD2QQZrrbk\0" |
| 49513 | /* 81902 */ "VCVTPD2QQZrrbk\0" |
| 49514 | /* 81917 */ "VCVTTPH2QQZrrbk\0" |
| 49515 | /* 81933 */ "VCVTPH2QQZrrbk\0" |
| 49516 | /* 81948 */ "VCVTTPS2QQZrrbk\0" |
| 49517 | /* 81964 */ "VCVTPS2QQZrrbk\0" |
| 49518 | /* 81979 */ "VCVTTPD2UQQZrrbk\0" |
| 49519 | /* 81996 */ "VCVTPD2UQQZrrbk\0" |
| 49520 | /* 82012 */ "VCVTTPH2UQQZrrbk\0" |
| 49521 | /* 82029 */ "VCVTPH2UQQZrrbk\0" |
| 49522 | /* 82045 */ "VCVTTPS2UQQZrrbk\0" |
| 49523 | /* 82062 */ "VCVTPS2UQQZrrbk\0" |
| 49524 | /* 82078 */ "VCVTPD2PSZrrbk\0" |
| 49525 | /* 82093 */ "VCVTPH2PSZrrbk\0" |
| 49526 | /* 82108 */ "VCVTDQ2PSZrrbk\0" |
| 49527 | /* 82123 */ "VCVTUDQ2PSZrrbk\0" |
| 49528 | /* 82139 */ "VCVTQQ2PSZrrbk\0" |
| 49529 | /* 82154 */ "VCVTUQQ2PSZrrbk\0" |
| 49530 | /* 82170 */ "VSUBPSZrrbk\0" |
| 49531 | /* 82182 */ "VADDPSZrrbk\0" |
| 49532 | /* 82194 */ "VSCALEFPSZrrbk\0" |
| 49533 | /* 82209 */ "VMULPSZrrbk\0" |
| 49534 | /* 82221 */ "VMINPSZrrbk\0" |
| 49535 | /* 82233 */ "VDIVPSZrrbk\0" |
| 49536 | /* 82245 */ "VMAXPSZrrbk\0" |
| 49537 | /* 82257 */ "VCVTTPH2WZrrbk\0" |
| 49538 | /* 82272 */ "VCVTPH2WZrrbk\0" |
| 49539 | /* 82286 */ "VCVTTPH2UWZrrbk\0" |
| 49540 | /* 82302 */ "VCVTPH2UWZrrbk\0" |
| 49541 | /* 82317 */ "VCVTPS2PHXZrrbk\0" |
| 49542 | /* 82333 */ "VCVTPH2PSXZrrbk\0" |
| 49543 | /* 82349 */ "VPSRADZ256mbik\0" |
| 49544 | /* 82364 */ "VPSHUFDZ256mbik\0" |
| 49545 | /* 82380 */ "VPSLLDZ256mbik\0" |
| 49546 | /* 82395 */ "VPROLDZ256mbik\0" |
| 49547 | /* 82410 */ "VPSRLDZ256mbik\0" |
| 49548 | /* 82425 */ "VPERMILPDZ256mbik\0" |
| 49549 | /* 82443 */ "VPERMPDZ256mbik\0" |
| 49550 | /* 82459 */ "VPRORDZ256mbik\0" |
| 49551 | /* 82474 */ "VPSRAQZ256mbik\0" |
| 49552 | /* 82489 */ "VPSLLQZ256mbik\0" |
| 49553 | /* 82504 */ "VPROLQZ256mbik\0" |
| 49554 | /* 82519 */ "VPSRLQZ256mbik\0" |
| 49555 | /* 82534 */ "VPERMQZ256mbik\0" |
| 49556 | /* 82549 */ "VPRORQZ256mbik\0" |
| 49557 | /* 82564 */ "VPERMILPSZ256mbik\0" |
| 49558 | /* 82582 */ "VPSRADZ128mbik\0" |
| 49559 | /* 82597 */ "VPSHUFDZ128mbik\0" |
| 49560 | /* 82613 */ "VPSLLDZ128mbik\0" |
| 49561 | /* 82628 */ "VPROLDZ128mbik\0" |
| 49562 | /* 82643 */ "VPSRLDZ128mbik\0" |
| 49563 | /* 82658 */ "VPERMILPDZ128mbik\0" |
| 49564 | /* 82676 */ "VPRORDZ128mbik\0" |
| 49565 | /* 82691 */ "VPSRAQZ128mbik\0" |
| 49566 | /* 82706 */ "VPSLLQZ128mbik\0" |
| 49567 | /* 82721 */ "VPROLQZ128mbik\0" |
| 49568 | /* 82736 */ "VPSRLQZ128mbik\0" |
| 49569 | /* 82751 */ "VPRORQZ128mbik\0" |
| 49570 | /* 82766 */ "VPERMILPSZ128mbik\0" |
| 49571 | /* 82784 */ "VPSRADZmbik\0" |
| 49572 | /* 82796 */ "VPSHUFDZmbik\0" |
| 49573 | /* 82809 */ "VPSLLDZmbik\0" |
| 49574 | /* 82821 */ "VPROLDZmbik\0" |
| 49575 | /* 82833 */ "VPSRLDZmbik\0" |
| 49576 | /* 82845 */ "VPERMILPDZmbik\0" |
| 49577 | /* 82860 */ "VPERMPDZmbik\0" |
| 49578 | /* 82873 */ "VPRORDZmbik\0" |
| 49579 | /* 82885 */ "VPSRAQZmbik\0" |
| 49580 | /* 82897 */ "VPSLLQZmbik\0" |
| 49581 | /* 82909 */ "VPROLQZmbik\0" |
| 49582 | /* 82921 */ "VPSRLQZmbik\0" |
| 49583 | /* 82933 */ "VPERMQZmbik\0" |
| 49584 | /* 82945 */ "VPRORQZmbik\0" |
| 49585 | /* 82957 */ "VPERMILPSZmbik\0" |
| 49586 | /* 82972 */ "VSHUFF64X2Z256rmbik\0" |
| 49587 | /* 82992 */ "VSHUFI64X2Z256rmbik\0" |
| 49588 | /* 83012 */ "VSHUFF32X4Z256rmbik\0" |
| 49589 | /* 83032 */ "VSHUFI32X4Z256rmbik\0" |
| 49590 | /* 83052 */ "VGF2P8AFFINEQBZ256rmbik\0" |
| 49591 | /* 83076 */ "VGF2P8AFFINEINVQBZ256rmbik\0" |
| 49592 | /* 83103 */ "VPSHLDDZ256rmbik\0" |
| 49593 | /* 83120 */ "VPSHRDDZ256rmbik\0" |
| 49594 | /* 83137 */ "VPTERNLOGDZ256rmbik\0" |
| 49595 | /* 83157 */ "VALIGNDZ256rmbik\0" |
| 49596 | /* 83174 */ "VREDUCEPDZ256rmbik\0" |
| 49597 | /* 83193 */ "VRANGEPDZ256rmbik\0" |
| 49598 | /* 83211 */ "VRNDSCALEPDZ256rmbik\0" |
| 49599 | /* 83232 */ "VSHUFPDZ256rmbik\0" |
| 49600 | /* 83249 */ "VFIXUPIMMPDZ256rmbik\0" |
| 49601 | /* 83270 */ "VCMPPDZ256rmbik\0" |
| 49602 | /* 83286 */ "VGETMANTPDZ256rmbik\0" |
| 49603 | /* 83306 */ "VREDUCEPHZ256rmbik\0" |
| 49604 | /* 83325 */ "VRNDSCALEPHZ256rmbik\0" |
| 49605 | /* 83346 */ "VCMPPHZ256rmbik\0" |
| 49606 | /* 83362 */ "VGETMANTPHZ256rmbik\0" |
| 49607 | /* 83382 */ "VPSHLDQZ256rmbik\0" |
| 49608 | /* 83399 */ "VPSHRDQZ256rmbik\0" |
| 49609 | /* 83416 */ "VPTERNLOGQZ256rmbik\0" |
| 49610 | /* 83436 */ "VALIGNQZ256rmbik\0" |
| 49611 | /* 83453 */ "VREDUCEPSZ256rmbik\0" |
| 49612 | /* 83472 */ "VRANGEPSZ256rmbik\0" |
| 49613 | /* 83490 */ "VRNDSCALEPSZ256rmbik\0" |
| 49614 | /* 83511 */ "VSHUFPSZ256rmbik\0" |
| 49615 | /* 83528 */ "VFIXUPIMMPSZ256rmbik\0" |
| 49616 | /* 83549 */ "VCMPPSZ256rmbik\0" |
| 49617 | /* 83565 */ "VGETMANTPSZ256rmbik\0" |
| 49618 | /* 83585 */ "VGF2P8AFFINEQBZ128rmbik\0" |
| 49619 | /* 83609 */ "VGF2P8AFFINEINVQBZ128rmbik\0" |
| 49620 | /* 83636 */ "VPSHLDDZ128rmbik\0" |
| 49621 | /* 83653 */ "VPSHRDDZ128rmbik\0" |
| 49622 | /* 83670 */ "VPTERNLOGDZ128rmbik\0" |
| 49623 | /* 83690 */ "VALIGNDZ128rmbik\0" |
| 49624 | /* 83707 */ "VREDUCEPDZ128rmbik\0" |
| 49625 | /* 83726 */ "VRANGEPDZ128rmbik\0" |
| 49626 | /* 83744 */ "VRNDSCALEPDZ128rmbik\0" |
| 49627 | /* 83765 */ "VSHUFPDZ128rmbik\0" |
| 49628 | /* 83782 */ "VFIXUPIMMPDZ128rmbik\0" |
| 49629 | /* 83803 */ "VCMPPDZ128rmbik\0" |
| 49630 | /* 83819 */ "VGETMANTPDZ128rmbik\0" |
| 49631 | /* 83839 */ "VREDUCEPHZ128rmbik\0" |
| 49632 | /* 83858 */ "VRNDSCALEPHZ128rmbik\0" |
| 49633 | /* 83879 */ "VCMPPHZ128rmbik\0" |
| 49634 | /* 83895 */ "VGETMANTPHZ128rmbik\0" |
| 49635 | /* 83915 */ "VPSHLDQZ128rmbik\0" |
| 49636 | /* 83932 */ "VPSHRDQZ128rmbik\0" |
| 49637 | /* 83949 */ "VPTERNLOGQZ128rmbik\0" |
| 49638 | /* 83969 */ "VALIGNQZ128rmbik\0" |
| 49639 | /* 83986 */ "VREDUCEPSZ128rmbik\0" |
| 49640 | /* 84005 */ "VRANGEPSZ128rmbik\0" |
| 49641 | /* 84023 */ "VRNDSCALEPSZ128rmbik\0" |
| 49642 | /* 84044 */ "VSHUFPSZ128rmbik\0" |
| 49643 | /* 84061 */ "VFIXUPIMMPSZ128rmbik\0" |
| 49644 | /* 84082 */ "VCMPPSZ128rmbik\0" |
| 49645 | /* 84098 */ "VGETMANTPSZ128rmbik\0" |
| 49646 | /* 84118 */ "VSHUFF64X2Zrmbik\0" |
| 49647 | /* 84135 */ "VSHUFI64X2Zrmbik\0" |
| 49648 | /* 84152 */ "VSHUFF32X4Zrmbik\0" |
| 49649 | /* 84169 */ "VSHUFI32X4Zrmbik\0" |
| 49650 | /* 84186 */ "VGF2P8AFFINEQBZrmbik\0" |
| 49651 | /* 84207 */ "VGF2P8AFFINEINVQBZrmbik\0" |
| 49652 | /* 84231 */ "VPSHLDDZrmbik\0" |
| 49653 | /* 84245 */ "VPSHRDDZrmbik\0" |
| 49654 | /* 84259 */ "VPTERNLOGDZrmbik\0" |
| 49655 | /* 84276 */ "VALIGNDZrmbik\0" |
| 49656 | /* 84290 */ "VREDUCEPDZrmbik\0" |
| 49657 | /* 84306 */ "VRANGEPDZrmbik\0" |
| 49658 | /* 84321 */ "VRNDSCALEPDZrmbik\0" |
| 49659 | /* 84339 */ "VSHUFPDZrmbik\0" |
| 49660 | /* 84353 */ "VFIXUPIMMPDZrmbik\0" |
| 49661 | /* 84371 */ "VCMPPDZrmbik\0" |
| 49662 | /* 84384 */ "VGETMANTPDZrmbik\0" |
| 49663 | /* 84401 */ "VREDUCEPHZrmbik\0" |
| 49664 | /* 84417 */ "VRNDSCALEPHZrmbik\0" |
| 49665 | /* 84435 */ "VCMPPHZrmbik\0" |
| 49666 | /* 84448 */ "VGETMANTPHZrmbik\0" |
| 49667 | /* 84465 */ "VPSHLDQZrmbik\0" |
| 49668 | /* 84479 */ "VPSHRDQZrmbik\0" |
| 49669 | /* 84493 */ "VPTERNLOGQZrmbik\0" |
| 49670 | /* 84510 */ "VALIGNQZrmbik\0" |
| 49671 | /* 84524 */ "VREDUCEPSZrmbik\0" |
| 49672 | /* 84540 */ "VRANGEPSZrmbik\0" |
| 49673 | /* 84555 */ "VRNDSCALEPSZrmbik\0" |
| 49674 | /* 84573 */ "VSHUFPSZrmbik\0" |
| 49675 | /* 84587 */ "VFIXUPIMMPSZrmbik\0" |
| 49676 | /* 84605 */ "VCMPPSZrmbik\0" |
| 49677 | /* 84618 */ "VGETMANTPSZrmbik\0" |
| 49678 | /* 84635 */ "VPSRADZ256mik\0" |
| 49679 | /* 84649 */ "VPSHUFDZ256mik\0" |
| 49680 | /* 84664 */ "VPSLLDZ256mik\0" |
| 49681 | /* 84678 */ "VPROLDZ256mik\0" |
| 49682 | /* 84692 */ "VPSRLDZ256mik\0" |
| 49683 | /* 84706 */ "VPERMILPDZ256mik\0" |
| 49684 | /* 84723 */ "VPERMPDZ256mik\0" |
| 49685 | /* 84738 */ "VPRORDZ256mik\0" |
| 49686 | /* 84752 */ "VPSRAQZ256mik\0" |
| 49687 | /* 84766 */ "VPSLLQZ256mik\0" |
| 49688 | /* 84780 */ "VPROLQZ256mik\0" |
| 49689 | /* 84794 */ "VPSRLQZ256mik\0" |
| 49690 | /* 84808 */ "VPERMQZ256mik\0" |
| 49691 | /* 84822 */ "VPRORQZ256mik\0" |
| 49692 | /* 84836 */ "VPERMILPSZ256mik\0" |
| 49693 | /* 84853 */ "VPSRAWZ256mik\0" |
| 49694 | /* 84867 */ "VPSHUFHWZ256mik\0" |
| 49695 | /* 84883 */ "VPSHUFLWZ256mik\0" |
| 49696 | /* 84899 */ "VPSLLWZ256mik\0" |
| 49697 | /* 84913 */ "VPSRLWZ256mik\0" |
| 49698 | /* 84927 */ "VPSRADZ128mik\0" |
| 49699 | /* 84941 */ "VPSHUFDZ128mik\0" |
| 49700 | /* 84956 */ "VPSLLDZ128mik\0" |
| 49701 | /* 84970 */ "VPROLDZ128mik\0" |
| 49702 | /* 84984 */ "VPSRLDZ128mik\0" |
| 49703 | /* 84998 */ "VPERMILPDZ128mik\0" |
| 49704 | /* 85015 */ "VPRORDZ128mik\0" |
| 49705 | /* 85029 */ "VPSRAQZ128mik\0" |
| 49706 | /* 85043 */ "VPSLLQZ128mik\0" |
| 49707 | /* 85057 */ "VPROLQZ128mik\0" |
| 49708 | /* 85071 */ "VPSRLQZ128mik\0" |
| 49709 | /* 85085 */ "VPRORQZ128mik\0" |
| 49710 | /* 85099 */ "VPERMILPSZ128mik\0" |
| 49711 | /* 85116 */ "VPSRAWZ128mik\0" |
| 49712 | /* 85130 */ "VPSHUFHWZ128mik\0" |
| 49713 | /* 85146 */ "VPSHUFLWZ128mik\0" |
| 49714 | /* 85162 */ "VPSLLWZ128mik\0" |
| 49715 | /* 85176 */ "VPSRLWZ128mik\0" |
| 49716 | /* 85190 */ "VPSRADZmik\0" |
| 49717 | /* 85201 */ "VPSHUFDZmik\0" |
| 49718 | /* 85213 */ "VPSLLDZmik\0" |
| 49719 | /* 85224 */ "VPROLDZmik\0" |
| 49720 | /* 85235 */ "VPSRLDZmik\0" |
| 49721 | /* 85246 */ "VPERMILPDZmik\0" |
| 49722 | /* 85260 */ "VPERMPDZmik\0" |
| 49723 | /* 85272 */ "VPRORDZmik\0" |
| 49724 | /* 85283 */ "VPSRAQZmik\0" |
| 49725 | /* 85294 */ "VPSLLQZmik\0" |
| 49726 | /* 85305 */ "VPROLQZmik\0" |
| 49727 | /* 85316 */ "VPSRLQZmik\0" |
| 49728 | /* 85327 */ "VPERMQZmik\0" |
| 49729 | /* 85338 */ "VPRORQZmik\0" |
| 49730 | /* 85349 */ "VPERMILPSZmik\0" |
| 49731 | /* 85363 */ "VPSRAWZmik\0" |
| 49732 | /* 85374 */ "VPSHUFHWZmik\0" |
| 49733 | /* 85387 */ "VPSHUFLWZmik\0" |
| 49734 | /* 85400 */ "VPSLLWZmik\0" |
| 49735 | /* 85411 */ "VPSRLWZmik\0" |
| 49736 | /* 85422 */ "VSHUFF64X2Z256rmik\0" |
| 49737 | /* 85441 */ "VSHUFI64X2Z256rmik\0" |
| 49738 | /* 85460 */ "VSHUFF32X4Z256rmik\0" |
| 49739 | /* 85479 */ "VSHUFI32X4Z256rmik\0" |
| 49740 | /* 85498 */ "VPCMPBZ256rmik\0" |
| 49741 | /* 85513 */ "VGF2P8AFFINEQBZ256rmik\0" |
| 49742 | /* 85536 */ "VGF2P8AFFINEINVQBZ256rmik\0" |
| 49743 | /* 85562 */ "VPCMPUBZ256rmik\0" |
| 49744 | /* 85578 */ "VPSHLDDZ256rmik\0" |
| 49745 | /* 85594 */ "VPSHRDDZ256rmik\0" |
| 49746 | /* 85610 */ "VPTERNLOGDZ256rmik\0" |
| 49747 | /* 85629 */ "VALIGNDZ256rmik\0" |
| 49748 | /* 85645 */ "VREDUCEPDZ256rmik\0" |
| 49749 | /* 85663 */ "VRANGEPDZ256rmik\0" |
| 49750 | /* 85680 */ "VRNDSCALEPDZ256rmik\0" |
| 49751 | /* 85700 */ "VSHUFPDZ256rmik\0" |
| 49752 | /* 85716 */ "VPCMPDZ256rmik\0" |
| 49753 | /* 85731 */ "VFIXUPIMMPDZ256rmik\0" |
| 49754 | /* 85751 */ "VCMPPDZ256rmik\0" |
| 49755 | /* 85766 */ "VGETMANTPDZ256rmik\0" |
| 49756 | /* 85785 */ "VPCMPUDZ256rmik\0" |
| 49757 | /* 85801 */ "VREDUCEPHZ256rmik\0" |
| 49758 | /* 85819 */ "VRNDSCALEPHZ256rmik\0" |
| 49759 | /* 85839 */ "VCMPPHZ256rmik\0" |
| 49760 | /* 85854 */ "VGETMANTPHZ256rmik\0" |
| 49761 | /* 85873 */ "VPSHLDQZ256rmik\0" |
| 49762 | /* 85889 */ "VPSHRDQZ256rmik\0" |
| 49763 | /* 85905 */ "VPTERNLOGQZ256rmik\0" |
| 49764 | /* 85924 */ "VALIGNQZ256rmik\0" |
| 49765 | /* 85940 */ "VPCMPQZ256rmik\0" |
| 49766 | /* 85955 */ "VPCMPUQZ256rmik\0" |
| 49767 | /* 85971 */ "VPALIGNRZ256rmik\0" |
| 49768 | /* 85988 */ "VREDUCEPSZ256rmik\0" |
| 49769 | /* 86006 */ "VRANGEPSZ256rmik\0" |
| 49770 | /* 86023 */ "VRNDSCALEPSZ256rmik\0" |
| 49771 | /* 86043 */ "VSHUFPSZ256rmik\0" |
| 49772 | /* 86059 */ "VFIXUPIMMPSZ256rmik\0" |
| 49773 | /* 86079 */ "VCMPPSZ256rmik\0" |
| 49774 | /* 86094 */ "VGETMANTPSZ256rmik\0" |
| 49775 | /* 86113 */ "VDBPSADBWZ256rmik\0" |
| 49776 | /* 86131 */ "VPSHLDWZ256rmik\0" |
| 49777 | /* 86147 */ "VPSHRDWZ256rmik\0" |
| 49778 | /* 86163 */ "VPCMPWZ256rmik\0" |
| 49779 | /* 86178 */ "VPCMPUWZ256rmik\0" |
| 49780 | /* 86194 */ "VPCMPBZ128rmik\0" |
| 49781 | /* 86209 */ "VGF2P8AFFINEQBZ128rmik\0" |
| 49782 | /* 86232 */ "VGF2P8AFFINEINVQBZ128rmik\0" |
| 49783 | /* 86258 */ "VPCMPUBZ128rmik\0" |
| 49784 | /* 86274 */ "VPSHLDDZ128rmik\0" |
| 49785 | /* 86290 */ "VPSHRDDZ128rmik\0" |
| 49786 | /* 86306 */ "VPTERNLOGDZ128rmik\0" |
| 49787 | /* 86325 */ "VALIGNDZ128rmik\0" |
| 49788 | /* 86341 */ "VREDUCEPDZ128rmik\0" |
| 49789 | /* 86359 */ "VRANGEPDZ128rmik\0" |
| 49790 | /* 86376 */ "VRNDSCALEPDZ128rmik\0" |
| 49791 | /* 86396 */ "VSHUFPDZ128rmik\0" |
| 49792 | /* 86412 */ "VPCMPDZ128rmik\0" |
| 49793 | /* 86427 */ "VFIXUPIMMPDZ128rmik\0" |
| 49794 | /* 86447 */ "VCMPPDZ128rmik\0" |
| 49795 | /* 86462 */ "VGETMANTPDZ128rmik\0" |
| 49796 | /* 86481 */ "VPCMPUDZ128rmik\0" |
| 49797 | /* 86497 */ "VREDUCEPHZ128rmik\0" |
| 49798 | /* 86515 */ "VRNDSCALEPHZ128rmik\0" |
| 49799 | /* 86535 */ "VCMPPHZ128rmik\0" |
| 49800 | /* 86550 */ "VGETMANTPHZ128rmik\0" |
| 49801 | /* 86569 */ "VPSHLDQZ128rmik\0" |
| 49802 | /* 86585 */ "VPSHRDQZ128rmik\0" |
| 49803 | /* 86601 */ "VPTERNLOGQZ128rmik\0" |
| 49804 | /* 86620 */ "VALIGNQZ128rmik\0" |
| 49805 | /* 86636 */ "VPCMPQZ128rmik\0" |
| 49806 | /* 86651 */ "VPCMPUQZ128rmik\0" |
| 49807 | /* 86667 */ "VPALIGNRZ128rmik\0" |
| 49808 | /* 86684 */ "VREDUCEPSZ128rmik\0" |
| 49809 | /* 86702 */ "VRANGEPSZ128rmik\0" |
| 49810 | /* 86719 */ "VRNDSCALEPSZ128rmik\0" |
| 49811 | /* 86739 */ "VSHUFPSZ128rmik\0" |
| 49812 | /* 86755 */ "VFIXUPIMMPSZ128rmik\0" |
| 49813 | /* 86775 */ "VCMPPSZ128rmik\0" |
| 49814 | /* 86790 */ "VGETMANTPSZ128rmik\0" |
| 49815 | /* 86809 */ "VDBPSADBWZ128rmik\0" |
| 49816 | /* 86827 */ "VPSHLDWZ128rmik\0" |
| 49817 | /* 86843 */ "VPSHRDWZ128rmik\0" |
| 49818 | /* 86859 */ "VPCMPWZ128rmik\0" |
| 49819 | /* 86874 */ "VPCMPUWZ128rmik\0" |
| 49820 | /* 86890 */ "VSHUFF64X2Zrmik\0" |
| 49821 | /* 86906 */ "VSHUFI64X2Zrmik\0" |
| 49822 | /* 86922 */ "VSHUFF32X4Zrmik\0" |
| 49823 | /* 86938 */ "VSHUFI32X4Zrmik\0" |
| 49824 | /* 86954 */ "VPCMPBZrmik\0" |
| 49825 | /* 86966 */ "VGF2P8AFFINEQBZrmik\0" |
| 49826 | /* 86986 */ "VGF2P8AFFINEINVQBZrmik\0" |
| 49827 | /* 87009 */ "VPCMPUBZrmik\0" |
| 49828 | /* 87022 */ "VPSHLDDZrmik\0" |
| 49829 | /* 87035 */ "VPSHRDDZrmik\0" |
| 49830 | /* 87048 */ "VPTERNLOGDZrmik\0" |
| 49831 | /* 87064 */ "VALIGNDZrmik\0" |
| 49832 | /* 87077 */ "VREDUCEPDZrmik\0" |
| 49833 | /* 87092 */ "VRANGEPDZrmik\0" |
| 49834 | /* 87106 */ "VRNDSCALEPDZrmik\0" |
| 49835 | /* 87123 */ "VSHUFPDZrmik\0" |
| 49836 | /* 87136 */ "VPCMPDZrmik\0" |
| 49837 | /* 87148 */ "VFIXUPIMMPDZrmik\0" |
| 49838 | /* 87165 */ "VCMPPDZrmik\0" |
| 49839 | /* 87177 */ "VGETMANTPDZrmik\0" |
| 49840 | /* 87193 */ "VREDUCESDZrmik\0" |
| 49841 | /* 87208 */ "VRANGESDZrmik\0" |
| 49842 | /* 87222 */ "VFIXUPIMMSDZrmik\0" |
| 49843 | /* 87239 */ "VGETMANTSDZrmik\0" |
| 49844 | /* 87255 */ "VPCMPUDZrmik\0" |
| 49845 | /* 87268 */ "VREDUCEPHZrmik\0" |
| 49846 | /* 87283 */ "VRNDSCALEPHZrmik\0" |
| 49847 | /* 87300 */ "VCMPPHZrmik\0" |
| 49848 | /* 87312 */ "VGETMANTPHZrmik\0" |
| 49849 | /* 87328 */ "VREDUCESHZrmik\0" |
| 49850 | /* 87343 */ "VGETMANTSHZrmik\0" |
| 49851 | /* 87359 */ "VPSHLDQZrmik\0" |
| 49852 | /* 87372 */ "VPSHRDQZrmik\0" |
| 49853 | /* 87385 */ "VPTERNLOGQZrmik\0" |
| 49854 | /* 87401 */ "VALIGNQZrmik\0" |
| 49855 | /* 87414 */ "VPCMPQZrmik\0" |
| 49856 | /* 87426 */ "VPCMPUQZrmik\0" |
| 49857 | /* 87439 */ "VPALIGNRZrmik\0" |
| 49858 | /* 87453 */ "VREDUCEPSZrmik\0" |
| 49859 | /* 87468 */ "VRANGEPSZrmik\0" |
| 49860 | /* 87482 */ "VRNDSCALEPSZrmik\0" |
| 49861 | /* 87499 */ "VSHUFPSZrmik\0" |
| 49862 | /* 87512 */ "VFIXUPIMMPSZrmik\0" |
| 49863 | /* 87529 */ "VCMPPSZrmik\0" |
| 49864 | /* 87541 */ "VGETMANTPSZrmik\0" |
| 49865 | /* 87557 */ "VREDUCESSZrmik\0" |
| 49866 | /* 87572 */ "VRANGESSZrmik\0" |
| 49867 | /* 87586 */ "VFIXUPIMMSSZrmik\0" |
| 49868 | /* 87603 */ "VGETMANTSSZrmik\0" |
| 49869 | /* 87619 */ "VDBPSADBWZrmik\0" |
| 49870 | /* 87634 */ "VPSHLDWZrmik\0" |
| 49871 | /* 87647 */ "VPSHRDWZrmik\0" |
| 49872 | /* 87660 */ "VPCMPWZrmik\0" |
| 49873 | /* 87672 */ "VPCMPUWZrmik\0" |
| 49874 | /* 87685 */ "VPSRADZ256rik\0" |
| 49875 | /* 87699 */ "VPSHUFDZ256rik\0" |
| 49876 | /* 87714 */ "VPSLLDZ256rik\0" |
| 49877 | /* 87728 */ "VPROLDZ256rik\0" |
| 49878 | /* 87742 */ "VPSRLDZ256rik\0" |
| 49879 | /* 87756 */ "VPERMILPDZ256rik\0" |
| 49880 | /* 87773 */ "VPERMPDZ256rik\0" |
| 49881 | /* 87788 */ "VPRORDZ256rik\0" |
| 49882 | /* 87802 */ "VPSRAQZ256rik\0" |
| 49883 | /* 87816 */ "VPSLLQZ256rik\0" |
| 49884 | /* 87830 */ "VPROLQZ256rik\0" |
| 49885 | /* 87844 */ "VPSRLQZ256rik\0" |
| 49886 | /* 87858 */ "VPERMQZ256rik\0" |
| 49887 | /* 87872 */ "VPRORQZ256rik\0" |
| 49888 | /* 87886 */ "VPERMILPSZ256rik\0" |
| 49889 | /* 87903 */ "VPSRAWZ256rik\0" |
| 49890 | /* 87917 */ "VPSHUFHWZ256rik\0" |
| 49891 | /* 87933 */ "VPSHUFLWZ256rik\0" |
| 49892 | /* 87949 */ "VPSLLWZ256rik\0" |
| 49893 | /* 87963 */ "VPSRLWZ256rik\0" |
| 49894 | /* 87977 */ "VPSRADZ128rik\0" |
| 49895 | /* 87991 */ "VPSHUFDZ128rik\0" |
| 49896 | /* 88006 */ "VPSLLDZ128rik\0" |
| 49897 | /* 88020 */ "VPROLDZ128rik\0" |
| 49898 | /* 88034 */ "VPSRLDZ128rik\0" |
| 49899 | /* 88048 */ "VPERMILPDZ128rik\0" |
| 49900 | /* 88065 */ "VPRORDZ128rik\0" |
| 49901 | /* 88079 */ "VPSRAQZ128rik\0" |
| 49902 | /* 88093 */ "VPSLLQZ128rik\0" |
| 49903 | /* 88107 */ "VPROLQZ128rik\0" |
| 49904 | /* 88121 */ "VPSRLQZ128rik\0" |
| 49905 | /* 88135 */ "VPRORQZ128rik\0" |
| 49906 | /* 88149 */ "VPERMILPSZ128rik\0" |
| 49907 | /* 88166 */ "VPSRAWZ128rik\0" |
| 49908 | /* 88180 */ "VPSHUFHWZ128rik\0" |
| 49909 | /* 88196 */ "VPSHUFLWZ128rik\0" |
| 49910 | /* 88212 */ "VPSLLWZ128rik\0" |
| 49911 | /* 88226 */ "VPSRLWZ128rik\0" |
| 49912 | /* 88240 */ "VPSRADZrik\0" |
| 49913 | /* 88251 */ "VPSHUFDZrik\0" |
| 49914 | /* 88263 */ "VPSLLDZrik\0" |
| 49915 | /* 88274 */ "VPROLDZrik\0" |
| 49916 | /* 88285 */ "VPSRLDZrik\0" |
| 49917 | /* 88296 */ "VPERMILPDZrik\0" |
| 49918 | /* 88310 */ "VPERMPDZrik\0" |
| 49919 | /* 88322 */ "VPRORDZrik\0" |
| 49920 | /* 88333 */ "VPSRAQZrik\0" |
| 49921 | /* 88344 */ "VPSLLQZrik\0" |
| 49922 | /* 88355 */ "VPROLQZrik\0" |
| 49923 | /* 88366 */ "VPSRLQZrik\0" |
| 49924 | /* 88377 */ "VPERMQZrik\0" |
| 49925 | /* 88388 */ "VPRORQZrik\0" |
| 49926 | /* 88399 */ "VPERMILPSZrik\0" |
| 49927 | /* 88413 */ "VPSRAWZrik\0" |
| 49928 | /* 88424 */ "VPSHUFHWZrik\0" |
| 49929 | /* 88437 */ "VPSHUFLWZrik\0" |
| 49930 | /* 88450 */ "VPSLLWZrik\0" |
| 49931 | /* 88461 */ "VPSRLWZrik\0" |
| 49932 | /* 88472 */ "VSHUFF64X2Z256rrik\0" |
| 49933 | /* 88491 */ "VSHUFI64X2Z256rrik\0" |
| 49934 | /* 88510 */ "VSHUFF32X4Z256rrik\0" |
| 49935 | /* 88529 */ "VSHUFI32X4Z256rrik\0" |
| 49936 | /* 88548 */ "VPCMPBZ256rrik\0" |
| 49937 | /* 88563 */ "VGF2P8AFFINEQBZ256rrik\0" |
| 49938 | /* 88586 */ "VGF2P8AFFINEINVQBZ256rrik\0" |
| 49939 | /* 88612 */ "VPCMPUBZ256rrik\0" |
| 49940 | /* 88628 */ "VPSHLDDZ256rrik\0" |
| 49941 | /* 88644 */ "VPSHRDDZ256rrik\0" |
| 49942 | /* 88660 */ "VPTERNLOGDZ256rrik\0" |
| 49943 | /* 88679 */ "VALIGNDZ256rrik\0" |
| 49944 | /* 88695 */ "VREDUCEPDZ256rrik\0" |
| 49945 | /* 88713 */ "VRANGEPDZ256rrik\0" |
| 49946 | /* 88730 */ "VRNDSCALEPDZ256rrik\0" |
| 49947 | /* 88750 */ "VSHUFPDZ256rrik\0" |
| 49948 | /* 88766 */ "VPCMPDZ256rrik\0" |
| 49949 | /* 88781 */ "VFIXUPIMMPDZ256rrik\0" |
| 49950 | /* 88801 */ "VCMPPDZ256rrik\0" |
| 49951 | /* 88816 */ "VGETMANTPDZ256rrik\0" |
| 49952 | /* 88835 */ "VPCMPUDZ256rrik\0" |
| 49953 | /* 88851 */ "VREDUCEPHZ256rrik\0" |
| 49954 | /* 88869 */ "VRNDSCALEPHZ256rrik\0" |
| 49955 | /* 88889 */ "VCMPPHZ256rrik\0" |
| 49956 | /* 88904 */ "VGETMANTPHZ256rrik\0" |
| 49957 | /* 88923 */ "VPSHLDQZ256rrik\0" |
| 49958 | /* 88939 */ "VPSHRDQZ256rrik\0" |
| 49959 | /* 88955 */ "VPTERNLOGQZ256rrik\0" |
| 49960 | /* 88974 */ "VALIGNQZ256rrik\0" |
| 49961 | /* 88990 */ "VPCMPQZ256rrik\0" |
| 49962 | /* 89005 */ "VPCMPUQZ256rrik\0" |
| 49963 | /* 89021 */ "VPALIGNRZ256rrik\0" |
| 49964 | /* 89038 */ "VREDUCEPSZ256rrik\0" |
| 49965 | /* 89056 */ "VRANGEPSZ256rrik\0" |
| 49966 | /* 89073 */ "VRNDSCALEPSZ256rrik\0" |
| 49967 | /* 89093 */ "VSHUFPSZ256rrik\0" |
| 49968 | /* 89109 */ "VFIXUPIMMPSZ256rrik\0" |
| 49969 | /* 89129 */ "VCMPPSZ256rrik\0" |
| 49970 | /* 89144 */ "VGETMANTPSZ256rrik\0" |
| 49971 | /* 89163 */ "VDBPSADBWZ256rrik\0" |
| 49972 | /* 89181 */ "VPSHLDWZ256rrik\0" |
| 49973 | /* 89197 */ "VPSHRDWZ256rrik\0" |
| 49974 | /* 89213 */ "VPCMPWZ256rrik\0" |
| 49975 | /* 89228 */ "VPCMPUWZ256rrik\0" |
| 49976 | /* 89244 */ "VPCMPBZ128rrik\0" |
| 49977 | /* 89259 */ "VGF2P8AFFINEQBZ128rrik\0" |
| 49978 | /* 89282 */ "VGF2P8AFFINEINVQBZ128rrik\0" |
| 49979 | /* 89308 */ "VPCMPUBZ128rrik\0" |
| 49980 | /* 89324 */ "VPSHLDDZ128rrik\0" |
| 49981 | /* 89340 */ "VPSHRDDZ128rrik\0" |
| 49982 | /* 89356 */ "VPTERNLOGDZ128rrik\0" |
| 49983 | /* 89375 */ "VALIGNDZ128rrik\0" |
| 49984 | /* 89391 */ "VREDUCEPDZ128rrik\0" |
| 49985 | /* 89409 */ "VRANGEPDZ128rrik\0" |
| 49986 | /* 89426 */ "VRNDSCALEPDZ128rrik\0" |
| 49987 | /* 89446 */ "VSHUFPDZ128rrik\0" |
| 49988 | /* 89462 */ "VPCMPDZ128rrik\0" |
| 49989 | /* 89477 */ "VFIXUPIMMPDZ128rrik\0" |
| 49990 | /* 89497 */ "VCMPPDZ128rrik\0" |
| 49991 | /* 89512 */ "VGETMANTPDZ128rrik\0" |
| 49992 | /* 89531 */ "VPCMPUDZ128rrik\0" |
| 49993 | /* 89547 */ "VREDUCEPHZ128rrik\0" |
| 49994 | /* 89565 */ "VRNDSCALEPHZ128rrik\0" |
| 49995 | /* 89585 */ "VCMPPHZ128rrik\0" |
| 49996 | /* 89600 */ "VGETMANTPHZ128rrik\0" |
| 49997 | /* 89619 */ "VPSHLDQZ128rrik\0" |
| 49998 | /* 89635 */ "VPSHRDQZ128rrik\0" |
| 49999 | /* 89651 */ "VPTERNLOGQZ128rrik\0" |
| 50000 | /* 89670 */ "VALIGNQZ128rrik\0" |
| 50001 | /* 89686 */ "VPCMPQZ128rrik\0" |
| 50002 | /* 89701 */ "VPCMPUQZ128rrik\0" |
| 50003 | /* 89717 */ "VPALIGNRZ128rrik\0" |
| 50004 | /* 89734 */ "VREDUCEPSZ128rrik\0" |
| 50005 | /* 89752 */ "VRANGEPSZ128rrik\0" |
| 50006 | /* 89769 */ "VRNDSCALEPSZ128rrik\0" |
| 50007 | /* 89789 */ "VSHUFPSZ128rrik\0" |
| 50008 | /* 89805 */ "VFIXUPIMMPSZ128rrik\0" |
| 50009 | /* 89825 */ "VCMPPSZ128rrik\0" |
| 50010 | /* 89840 */ "VGETMANTPSZ128rrik\0" |
| 50011 | /* 89859 */ "VDBPSADBWZ128rrik\0" |
| 50012 | /* 89877 */ "VPSHLDWZ128rrik\0" |
| 50013 | /* 89893 */ "VPSHRDWZ128rrik\0" |
| 50014 | /* 89909 */ "VPCMPWZ128rrik\0" |
| 50015 | /* 89924 */ "VPCMPUWZ128rrik\0" |
| 50016 | /* 89940 */ "VSHUFF64X2Zrrik\0" |
| 50017 | /* 89956 */ "VSHUFI64X2Zrrik\0" |
| 50018 | /* 89972 */ "VSHUFF32X4Zrrik\0" |
| 50019 | /* 89988 */ "VSHUFI32X4Zrrik\0" |
| 50020 | /* 90004 */ "VPCMPBZrrik\0" |
| 50021 | /* 90016 */ "VGF2P8AFFINEQBZrrik\0" |
| 50022 | /* 90036 */ "VGF2P8AFFINEINVQBZrrik\0" |
| 50023 | /* 90059 */ "VPCMPUBZrrik\0" |
| 50024 | /* 90072 */ "VPSHLDDZrrik\0" |
| 50025 | /* 90085 */ "VPSHRDDZrrik\0" |
| 50026 | /* 90098 */ "VPTERNLOGDZrrik\0" |
| 50027 | /* 90114 */ "VALIGNDZrrik\0" |
| 50028 | /* 90127 */ "VREDUCEPDZrrik\0" |
| 50029 | /* 90142 */ "VRANGEPDZrrik\0" |
| 50030 | /* 90156 */ "VRNDSCALEPDZrrik\0" |
| 50031 | /* 90173 */ "VSHUFPDZrrik\0" |
| 50032 | /* 90186 */ "VPCMPDZrrik\0" |
| 50033 | /* 90198 */ "VFIXUPIMMPDZrrik\0" |
| 50034 | /* 90215 */ "VCMPPDZrrik\0" |
| 50035 | /* 90227 */ "VGETMANTPDZrrik\0" |
| 50036 | /* 90243 */ "VREDUCESDZrrik\0" |
| 50037 | /* 90258 */ "VRANGESDZrrik\0" |
| 50038 | /* 90272 */ "VFIXUPIMMSDZrrik\0" |
| 50039 | /* 90289 */ "VGETMANTSDZrrik\0" |
| 50040 | /* 90305 */ "VPCMPUDZrrik\0" |
| 50041 | /* 90318 */ "VREDUCEPHZrrik\0" |
| 50042 | /* 90333 */ "VRNDSCALEPHZrrik\0" |
| 50043 | /* 90350 */ "VCMPPHZrrik\0" |
| 50044 | /* 90362 */ "VGETMANTPHZrrik\0" |
| 50045 | /* 90378 */ "VREDUCESHZrrik\0" |
| 50046 | /* 90393 */ "VGETMANTSHZrrik\0" |
| 50047 | /* 90409 */ "VPSHLDQZrrik\0" |
| 50048 | /* 90422 */ "VPSHRDQZrrik\0" |
| 50049 | /* 90435 */ "VPTERNLOGQZrrik\0" |
| 50050 | /* 90451 */ "VALIGNQZrrik\0" |
| 50051 | /* 90464 */ "VPCMPQZrrik\0" |
| 50052 | /* 90476 */ "VPCMPUQZrrik\0" |
| 50053 | /* 90489 */ "VPALIGNRZrrik\0" |
| 50054 | /* 90503 */ "VREDUCEPSZrrik\0" |
| 50055 | /* 90518 */ "VRANGEPSZrrik\0" |
| 50056 | /* 90532 */ "VRNDSCALEPSZrrik\0" |
| 50057 | /* 90549 */ "VSHUFPSZrrik\0" |
| 50058 | /* 90562 */ "VFIXUPIMMPSZrrik\0" |
| 50059 | /* 90579 */ "VCMPPSZrrik\0" |
| 50060 | /* 90591 */ "VGETMANTPSZrrik\0" |
| 50061 | /* 90607 */ "VREDUCESSZrrik\0" |
| 50062 | /* 90622 */ "VRANGESSZrrik\0" |
| 50063 | /* 90636 */ "VFIXUPIMMSSZrrik\0" |
| 50064 | /* 90653 */ "VGETMANTSSZrrik\0" |
| 50065 | /* 90669 */ "VDBPSADBWZrrik\0" |
| 50066 | /* 90684 */ "VPSHLDWZrrik\0" |
| 50067 | /* 90697 */ "VPSHRDWZrrik\0" |
| 50068 | /* 90710 */ "VPCMPWZrrik\0" |
| 50069 | /* 90722 */ "VPCMPUWZrrik\0" |
| 50070 | /* 90735 */ "KMOVBkk\0" |
| 50071 | /* 90743 */ "KMOVDkk\0" |
| 50072 | /* 90751 */ "KMOVQkk\0" |
| 50073 | /* 90759 */ "KMOVWkk\0" |
| 50074 | /* 90767 */ "VFMADDSUB231PDZ256mk\0" |
| 50075 | /* 90788 */ "VFMSUB231PDZ256mk\0" |
| 50076 | /* 90806 */ "VFNMSUB231PDZ256mk\0" |
| 50077 | /* 90825 */ "VFMSUBADD231PDZ256mk\0" |
| 50078 | /* 90846 */ "VFMADD231PDZ256mk\0" |
| 50079 | /* 90864 */ "VFNMADD231PDZ256mk\0" |
| 50080 | /* 90883 */ "VFMADDSUB132PDZ256mk\0" |
| 50081 | /* 90904 */ "VFMSUB132PDZ256mk\0" |
| 50082 | /* 90922 */ "VFNMSUB132PDZ256mk\0" |
| 50083 | /* 90941 */ "VFMSUBADD132PDZ256mk\0" |
| 50084 | /* 90962 */ "VFMADD132PDZ256mk\0" |
| 50085 | /* 90980 */ "VFNMADD132PDZ256mk\0" |
| 50086 | /* 90999 */ "VFMADDSUB213PDZ256mk\0" |
| 50087 | /* 91020 */ "VFMSUB213PDZ256mk\0" |
| 50088 | /* 91038 */ "VFNMSUB213PDZ256mk\0" |
| 50089 | /* 91057 */ "VFMSUBADD213PDZ256mk\0" |
| 50090 | /* 91078 */ "VFMADD213PDZ256mk\0" |
| 50091 | /* 91096 */ "VFNMADD213PDZ256mk\0" |
| 50092 | /* 91115 */ "VRCP14PDZ256mk\0" |
| 50093 | /* 91130 */ "VRSQRT14PDZ256mk\0" |
| 50094 | /* 91147 */ "VGETEXPPDZ256mk\0" |
| 50095 | /* 91163 */ "VSQRTPDZ256mk\0" |
| 50096 | /* 91177 */ "VPDPWSSDZ256mk\0" |
| 50097 | /* 91192 */ "VPDPBUSDZ256mk\0" |
| 50098 | /* 91207 */ "VPSHLDVDZ256mk\0" |
| 50099 | /* 91222 */ "VPSHRDVDZ256mk\0" |
| 50100 | /* 91237 */ "VFMADDSUB231PHZ256mk\0" |
| 50101 | /* 91258 */ "VFMSUB231PHZ256mk\0" |
| 50102 | /* 91276 */ "VFNMSUB231PHZ256mk\0" |
| 50103 | /* 91295 */ "VFMSUBADD231PHZ256mk\0" |
| 50104 | /* 91316 */ "VFMADD231PHZ256mk\0" |
| 50105 | /* 91334 */ "VFNMADD231PHZ256mk\0" |
| 50106 | /* 91353 */ "VFMADDSUB132PHZ256mk\0" |
| 50107 | /* 91374 */ "VFMSUB132PHZ256mk\0" |
| 50108 | /* 91392 */ "VFNMSUB132PHZ256mk\0" |
| 50109 | /* 91411 */ "VFMSUBADD132PHZ256mk\0" |
| 50110 | /* 91432 */ "VFMADD132PHZ256mk\0" |
| 50111 | /* 91450 */ "VFNMADD132PHZ256mk\0" |
| 50112 | /* 91469 */ "VFMADDSUB213PHZ256mk\0" |
| 50113 | /* 91490 */ "VFMSUB213PHZ256mk\0" |
| 50114 | /* 91508 */ "VFNMSUB213PHZ256mk\0" |
| 50115 | /* 91527 */ "VFMSUBADD213PHZ256mk\0" |
| 50116 | /* 91548 */ "VFMADD213PHZ256mk\0" |
| 50117 | /* 91566 */ "VFNMADD213PHZ256mk\0" |
| 50118 | /* 91585 */ "VFCMADDCPHZ256mk\0" |
| 50119 | /* 91602 */ "VFMADDCPHZ256mk\0" |
| 50120 | /* 91618 */ "VRCPPHZ256mk\0" |
| 50121 | /* 91631 */ "VGETEXPPHZ256mk\0" |
| 50122 | /* 91647 */ "VRSQRTPHZ256mk\0" |
| 50123 | /* 91662 */ "VSQRTPHZ256mk\0" |
| 50124 | /* 91676 */ "VPMADD52HUQZ256mk\0" |
| 50125 | /* 91694 */ "VPMADD52LUQZ256mk\0" |
| 50126 | /* 91712 */ "VPSHLDVQZ256mk\0" |
| 50127 | /* 91727 */ "VPSHRDVQZ256mk\0" |
| 50128 | /* 91742 */ "VPDPWSSDSZ256mk\0" |
| 50129 | /* 91758 */ "VPDPBUSDSZ256mk\0" |
| 50130 | /* 91774 */ "VFMADDSUB231PSZ256mk\0" |
| 50131 | /* 91795 */ "VFMSUB231PSZ256mk\0" |
| 50132 | /* 91813 */ "VFNMSUB231PSZ256mk\0" |
| 50133 | /* 91832 */ "VFMSUBADD231PSZ256mk\0" |
| 50134 | /* 91853 */ "VFMADD231PSZ256mk\0" |
| 50135 | /* 91871 */ "VFNMADD231PSZ256mk\0" |
| 50136 | /* 91890 */ "VFMADDSUB132PSZ256mk\0" |
| 50137 | /* 91911 */ "VFMSUB132PSZ256mk\0" |
| 50138 | /* 91929 */ "VFNMSUB132PSZ256mk\0" |
| 50139 | /* 91948 */ "VFMSUBADD132PSZ256mk\0" |
| 50140 | /* 91969 */ "VFMADD132PSZ256mk\0" |
| 50141 | /* 91987 */ "VFNMADD132PSZ256mk\0" |
| 50142 | /* 92006 */ "VFMADDSUB213PSZ256mk\0" |
| 50143 | /* 92027 */ "VFMSUB213PSZ256mk\0" |
| 50144 | /* 92045 */ "VFNMSUB213PSZ256mk\0" |
| 50145 | /* 92064 */ "VFMSUBADD213PSZ256mk\0" |
| 50146 | /* 92085 */ "VFMADD213PSZ256mk\0" |
| 50147 | /* 92103 */ "VFNMADD213PSZ256mk\0" |
| 50148 | /* 92122 */ "VRCP14PSZ256mk\0" |
| 50149 | /* 92137 */ "VRSQRT14PSZ256mk\0" |
| 50150 | /* 92154 */ "VDPBF16PSZ256mk\0" |
| 50151 | /* 92170 */ "VGETEXPPSZ256mk\0" |
| 50152 | /* 92186 */ "VSQRTPSZ256mk\0" |
| 50153 | /* 92200 */ "VPSHLDVWZ256mk\0" |
| 50154 | /* 92215 */ "VPSHRDVWZ256mk\0" |
| 50155 | /* 92230 */ "VFMADDSUB231PDZ128mk\0" |
| 50156 | /* 92251 */ "VFMSUB231PDZ128mk\0" |
| 50157 | /* 92269 */ "VFNMSUB231PDZ128mk\0" |
| 50158 | /* 92288 */ "VFMSUBADD231PDZ128mk\0" |
| 50159 | /* 92309 */ "VFMADD231PDZ128mk\0" |
| 50160 | /* 92327 */ "VFNMADD231PDZ128mk\0" |
| 50161 | /* 92346 */ "VFMADDSUB132PDZ128mk\0" |
| 50162 | /* 92367 */ "VFMSUB132PDZ128mk\0" |
| 50163 | /* 92385 */ "VFNMSUB132PDZ128mk\0" |
| 50164 | /* 92404 */ "VFMSUBADD132PDZ128mk\0" |
| 50165 | /* 92425 */ "VFMADD132PDZ128mk\0" |
| 50166 | /* 92443 */ "VFNMADD132PDZ128mk\0" |
| 50167 | /* 92462 */ "VFMADDSUB213PDZ128mk\0" |
| 50168 | /* 92483 */ "VFMSUB213PDZ128mk\0" |
| 50169 | /* 92501 */ "VFNMSUB213PDZ128mk\0" |
| 50170 | /* 92520 */ "VFMSUBADD213PDZ128mk\0" |
| 50171 | /* 92541 */ "VFMADD213PDZ128mk\0" |
| 50172 | /* 92559 */ "VFNMADD213PDZ128mk\0" |
| 50173 | /* 92578 */ "VRCP14PDZ128mk\0" |
| 50174 | /* 92593 */ "VRSQRT14PDZ128mk\0" |
| 50175 | /* 92610 */ "VGETEXPPDZ128mk\0" |
| 50176 | /* 92626 */ "VSQRTPDZ128mk\0" |
| 50177 | /* 92640 */ "VPDPWSSDZ128mk\0" |
| 50178 | /* 92655 */ "VPDPBUSDZ128mk\0" |
| 50179 | /* 92670 */ "VPSHLDVDZ128mk\0" |
| 50180 | /* 92685 */ "VPSHRDVDZ128mk\0" |
| 50181 | /* 92700 */ "VFMADDSUB231PHZ128mk\0" |
| 50182 | /* 92721 */ "VFMSUB231PHZ128mk\0" |
| 50183 | /* 92739 */ "VFNMSUB231PHZ128mk\0" |
| 50184 | /* 92758 */ "VFMSUBADD231PHZ128mk\0" |
| 50185 | /* 92779 */ "VFMADD231PHZ128mk\0" |
| 50186 | /* 92797 */ "VFNMADD231PHZ128mk\0" |
| 50187 | /* 92816 */ "VFMADDSUB132PHZ128mk\0" |
| 50188 | /* 92837 */ "VFMSUB132PHZ128mk\0" |
| 50189 | /* 92855 */ "VFNMSUB132PHZ128mk\0" |
| 50190 | /* 92874 */ "VFMSUBADD132PHZ128mk\0" |
| 50191 | /* 92895 */ "VFMADD132PHZ128mk\0" |
| 50192 | /* 92913 */ "VFNMADD132PHZ128mk\0" |
| 50193 | /* 92932 */ "VFMADDSUB213PHZ128mk\0" |
| 50194 | /* 92953 */ "VFMSUB213PHZ128mk\0" |
| 50195 | /* 92971 */ "VFNMSUB213PHZ128mk\0" |
| 50196 | /* 92990 */ "VFMSUBADD213PHZ128mk\0" |
| 50197 | /* 93011 */ "VFMADD213PHZ128mk\0" |
| 50198 | /* 93029 */ "VFNMADD213PHZ128mk\0" |
| 50199 | /* 93048 */ "VFCMADDCPHZ128mk\0" |
| 50200 | /* 93065 */ "VFMADDCPHZ128mk\0" |
| 50201 | /* 93081 */ "VRCPPHZ128mk\0" |
| 50202 | /* 93094 */ "VGETEXPPHZ128mk\0" |
| 50203 | /* 93110 */ "VRSQRTPHZ128mk\0" |
| 50204 | /* 93125 */ "VSQRTPHZ128mk\0" |
| 50205 | /* 93139 */ "VPMADD52HUQZ128mk\0" |
| 50206 | /* 93157 */ "VPMADD52LUQZ128mk\0" |
| 50207 | /* 93175 */ "VPSHLDVQZ128mk\0" |
| 50208 | /* 93190 */ "VPSHRDVQZ128mk\0" |
| 50209 | /* 93205 */ "VPDPWSSDSZ128mk\0" |
| 50210 | /* 93221 */ "VPDPBUSDSZ128mk\0" |
| 50211 | /* 93237 */ "VFMADDSUB231PSZ128mk\0" |
| 50212 | /* 93258 */ "VFMSUB231PSZ128mk\0" |
| 50213 | /* 93276 */ "VFNMSUB231PSZ128mk\0" |
| 50214 | /* 93295 */ "VFMSUBADD231PSZ128mk\0" |
| 50215 | /* 93316 */ "VFMADD231PSZ128mk\0" |
| 50216 | /* 93334 */ "VFNMADD231PSZ128mk\0" |
| 50217 | /* 93353 */ "VFMADDSUB132PSZ128mk\0" |
| 50218 | /* 93374 */ "VFMSUB132PSZ128mk\0" |
| 50219 | /* 93392 */ "VFNMSUB132PSZ128mk\0" |
| 50220 | /* 93411 */ "VFMSUBADD132PSZ128mk\0" |
| 50221 | /* 93432 */ "VFMADD132PSZ128mk\0" |
| 50222 | /* 93450 */ "VFNMADD132PSZ128mk\0" |
| 50223 | /* 93469 */ "VFMADDSUB213PSZ128mk\0" |
| 50224 | /* 93490 */ "VFMSUB213PSZ128mk\0" |
| 50225 | /* 93508 */ "VFNMSUB213PSZ128mk\0" |
| 50226 | /* 93527 */ "VFMSUBADD213PSZ128mk\0" |
| 50227 | /* 93548 */ "VFMADD213PSZ128mk\0" |
| 50228 | /* 93566 */ "VFNMADD213PSZ128mk\0" |
| 50229 | /* 93585 */ "VRCP14PSZ128mk\0" |
| 50230 | /* 93600 */ "VRSQRT14PSZ128mk\0" |
| 50231 | /* 93617 */ "VDPBF16PSZ128mk\0" |
| 50232 | /* 93633 */ "VGETEXPPSZ128mk\0" |
| 50233 | /* 93649 */ "VSQRTPSZ128mk\0" |
| 50234 | /* 93663 */ "VPSHLDVWZ128mk\0" |
| 50235 | /* 93678 */ "VPSHRDVWZ128mk\0" |
| 50236 | /* 93693 */ "KMOVBmk\0" |
| 50237 | /* 93701 */ "KMOVDmk\0" |
| 50238 | /* 93709 */ "KMOVQmk\0" |
| 50239 | /* 93717 */ "KMOVWmk\0" |
| 50240 | /* 93725 */ "VFMADDSUB231PDZmk\0" |
| 50241 | /* 93743 */ "VFMSUB231PDZmk\0" |
| 50242 | /* 93758 */ "VFNMSUB231PDZmk\0" |
| 50243 | /* 93774 */ "VFMSUBADD231PDZmk\0" |
| 50244 | /* 93792 */ "VFMADD231PDZmk\0" |
| 50245 | /* 93807 */ "VFNMADD231PDZmk\0" |
| 50246 | /* 93823 */ "VFMADDSUB132PDZmk\0" |
| 50247 | /* 93841 */ "VFMSUB132PDZmk\0" |
| 50248 | /* 93856 */ "VFNMSUB132PDZmk\0" |
| 50249 | /* 93872 */ "VFMSUBADD132PDZmk\0" |
| 50250 | /* 93890 */ "VFMADD132PDZmk\0" |
| 50251 | /* 93905 */ "VFNMADD132PDZmk\0" |
| 50252 | /* 93921 */ "VEXP2PDZmk\0" |
| 50253 | /* 93932 */ "VFMADDSUB213PDZmk\0" |
| 50254 | /* 93950 */ "VFMSUB213PDZmk\0" |
| 50255 | /* 93965 */ "VFNMSUB213PDZmk\0" |
| 50256 | /* 93981 */ "VFMSUBADD213PDZmk\0" |
| 50257 | /* 93999 */ "VFMADD213PDZmk\0" |
| 50258 | /* 94014 */ "VFNMADD213PDZmk\0" |
| 50259 | /* 94030 */ "VRCP14PDZmk\0" |
| 50260 | /* 94042 */ "VRSQRT14PDZmk\0" |
| 50261 | /* 94056 */ "VRCP28PDZmk\0" |
| 50262 | /* 94068 */ "VRSQRT28PDZmk\0" |
| 50263 | /* 94082 */ "VGETEXPPDZmk\0" |
| 50264 | /* 94095 */ "VSQRTPDZmk\0" |
| 50265 | /* 94106 */ "VRCP28SDZmk\0" |
| 50266 | /* 94118 */ "VRSQRT28SDZmk\0" |
| 50267 | /* 94132 */ "VGETEXPSDZmk\0" |
| 50268 | /* 94145 */ "VPDPWSSDZmk\0" |
| 50269 | /* 94157 */ "VPDPBUSDZmk\0" |
| 50270 | /* 94169 */ "VPSHLDVDZmk\0" |
| 50271 | /* 94181 */ "VPSHRDVDZmk\0" |
| 50272 | /* 94193 */ "VFMADDSUB231PHZmk\0" |
| 50273 | /* 94211 */ "VFMSUB231PHZmk\0" |
| 50274 | /* 94226 */ "VFNMSUB231PHZmk\0" |
| 50275 | /* 94242 */ "VFMSUBADD231PHZmk\0" |
| 50276 | /* 94260 */ "VFMADD231PHZmk\0" |
| 50277 | /* 94275 */ "VFNMADD231PHZmk\0" |
| 50278 | /* 94291 */ "VFMADDSUB132PHZmk\0" |
| 50279 | /* 94309 */ "VFMSUB132PHZmk\0" |
| 50280 | /* 94324 */ "VFNMSUB132PHZmk\0" |
| 50281 | /* 94340 */ "VFMSUBADD132PHZmk\0" |
| 50282 | /* 94358 */ "VFMADD132PHZmk\0" |
| 50283 | /* 94373 */ "VFNMADD132PHZmk\0" |
| 50284 | /* 94389 */ "VFMADDSUB213PHZmk\0" |
| 50285 | /* 94407 */ "VFMSUB213PHZmk\0" |
| 50286 | /* 94422 */ "VFNMSUB213PHZmk\0" |
| 50287 | /* 94438 */ "VFMSUBADD213PHZmk\0" |
| 50288 | /* 94456 */ "VFMADD213PHZmk\0" |
| 50289 | /* 94471 */ "VFNMADD213PHZmk\0" |
| 50290 | /* 94487 */ "VFCMADDCPHZmk\0" |
| 50291 | /* 94501 */ "VFMADDCPHZmk\0" |
| 50292 | /* 94514 */ "VRCPPHZmk\0" |
| 50293 | /* 94524 */ "VGETEXPPHZmk\0" |
| 50294 | /* 94537 */ "VRSQRTPHZmk\0" |
| 50295 | /* 94549 */ "VSQRTPHZmk\0" |
| 50296 | /* 94560 */ "VFCMADDCSHZmk\0" |
| 50297 | /* 94574 */ "VFMADDCSHZmk\0" |
| 50298 | /* 94587 */ "VGETEXPSHZmk\0" |
| 50299 | /* 94600 */ "VPMADD52HUQZmk\0" |
| 50300 | /* 94615 */ "VPMADD52LUQZmk\0" |
| 50301 | /* 94630 */ "VPSHLDVQZmk\0" |
| 50302 | /* 94642 */ "VPSHRDVQZmk\0" |
| 50303 | /* 94654 */ "VPDPWSSDSZmk\0" |
| 50304 | /* 94667 */ "VPDPBUSDSZmk\0" |
| 50305 | /* 94680 */ "VFMADDSUB231PSZmk\0" |
| 50306 | /* 94698 */ "VFMSUB231PSZmk\0" |
| 50307 | /* 94713 */ "VFNMSUB231PSZmk\0" |
| 50308 | /* 94729 */ "VFMSUBADD231PSZmk\0" |
| 50309 | /* 94747 */ "VFMADD231PSZmk\0" |
| 50310 | /* 94762 */ "VFNMADD231PSZmk\0" |
| 50311 | /* 94778 */ "VFMADDSUB132PSZmk\0" |
| 50312 | /* 94796 */ "VFMSUB132PSZmk\0" |
| 50313 | /* 94811 */ "VFNMSUB132PSZmk\0" |
| 50314 | /* 94827 */ "VFMSUBADD132PSZmk\0" |
| 50315 | /* 94845 */ "VFMADD132PSZmk\0" |
| 50316 | /* 94860 */ "VFNMADD132PSZmk\0" |
| 50317 | /* 94876 */ "VEXP2PSZmk\0" |
| 50318 | /* 94887 */ "VFMADDSUB213PSZmk\0" |
| 50319 | /* 94905 */ "VFMSUB213PSZmk\0" |
| 50320 | /* 94920 */ "VFNMSUB213PSZmk\0" |
| 50321 | /* 94936 */ "VFMSUBADD213PSZmk\0" |
| 50322 | /* 94954 */ "VFMADD213PSZmk\0" |
| 50323 | /* 94969 */ "VFNMADD213PSZmk\0" |
| 50324 | /* 94985 */ "VRCP14PSZmk\0" |
| 50325 | /* 94997 */ "VRSQRT14PSZmk\0" |
| 50326 | /* 95011 */ "VDPBF16PSZmk\0" |
| 50327 | /* 95024 */ "VRCP28PSZmk\0" |
| 50328 | /* 95036 */ "VRSQRT28PSZmk\0" |
| 50329 | /* 95050 */ "VGETEXPPSZmk\0" |
| 50330 | /* 95063 */ "VSQRTPSZmk\0" |
| 50331 | /* 95074 */ "VRCP28SSZmk\0" |
| 50332 | /* 95086 */ "VRSQRT28SSZmk\0" |
| 50333 | /* 95100 */ "VGETEXPSSZmk\0" |
| 50334 | /* 95113 */ "VPSHLDVWZmk\0" |
| 50335 | /* 95125 */ "VPSHRDVWZmk\0" |
| 50336 | /* 95137 */ "VBROADCASTF64X2rmk\0" |
| 50337 | /* 95156 */ "VBROADCASTI64X2rmk\0" |
| 50338 | /* 95175 */ "VBROADCASTF32X4rmk\0" |
| 50339 | /* 95194 */ "VBROADCASTI32X4rmk\0" |
| 50340 | /* 95213 */ "VBROADCASTF64X4rmk\0" |
| 50341 | /* 95232 */ "VBROADCASTI64X4rmk\0" |
| 50342 | /* 95251 */ "VMOVDQA32Z256rmk\0" |
| 50343 | /* 95268 */ "VMOVDQU32Z256rmk\0" |
| 50344 | /* 95285 */ "VBROADCASTF32X2Z256rmk\0" |
| 50345 | /* 95308 */ "VBROADCASTI32X2Z256rmk\0" |
| 50346 | /* 95331 */ "VINSERTF64x2Z256rmk\0" |
| 50347 | /* 95351 */ "VINSERTI64x2Z256rmk\0" |
| 50348 | /* 95371 */ "VMOVDQA64Z256rmk\0" |
| 50349 | /* 95388 */ "VMOVDQU64Z256rmk\0" |
| 50350 | /* 95405 */ "VBROADCASTF32X4Z256rmk\0" |
| 50351 | /* 95428 */ "VBROADCASTI32X4Z256rmk\0" |
| 50352 | /* 95451 */ "VINSERTF32x4Z256rmk\0" |
| 50353 | /* 95471 */ "VINSERTI32x4Z256rmk\0" |
| 50354 | /* 95491 */ "VCVTNE2PS2BF16Z256rmk\0" |
| 50355 | /* 95513 */ "VCVTNEPS2BF16Z256rmk\0" |
| 50356 | /* 95534 */ "VMOVDQU16Z256rmk\0" |
| 50357 | /* 95551 */ "VMOVDQU8Z256rmk\0" |
| 50358 | /* 95567 */ "VPERMI2BZ256rmk\0" |
| 50359 | /* 95583 */ "VPERMT2BZ256rmk\0" |
| 50360 | /* 95599 */ "VPSUBBZ256rmk\0" |
| 50361 | /* 95613 */ "VPADDBZ256rmk\0" |
| 50362 | /* 95627 */ "VPEXPANDBZ256rmk\0" |
| 50363 | /* 95644 */ "VPSHUFBZ256rmk\0" |
| 50364 | /* 95659 */ "VPAVGBZ256rmk\0" |
| 50365 | /* 95673 */ "VGF2P8MULBZ256rmk\0" |
| 50366 | /* 95691 */ "VPBLENDMBZ256rmk\0" |
| 50367 | /* 95708 */ "VPTESTNMBZ256rmk\0" |
| 50368 | /* 95725 */ "VPSHUFBITQMBZ256rmk\0" |
| 50369 | /* 95745 */ "VPERMBZ256rmk\0" |
| 50370 | /* 95759 */ "VPTESTMBZ256rmk\0" |
| 50371 | /* 95775 */ "VPCMPEQBZ256rmk\0" |
| 50372 | /* 95791 */ "VPMULTISHIFTQBZ256rmk\0" |
| 50373 | /* 95813 */ "VPABSBZ256rmk\0" |
| 50374 | /* 95827 */ "VPSUBSBZ256rmk\0" |
| 50375 | /* 95842 */ "VPADDSBZ256rmk\0" |
| 50376 | /* 95857 */ "VPMINSBZ256rmk\0" |
| 50377 | /* 95872 */ "VPSUBUSBZ256rmk\0" |
| 50378 | /* 95888 */ "VPADDUSBZ256rmk\0" |
| 50379 | /* 95904 */ "VPMAXSBZ256rmk\0" |
| 50380 | /* 95919 */ "VPCMPGTBZ256rmk\0" |
| 50381 | /* 95935 */ "VPOPCNTBZ256rmk\0" |
| 50382 | /* 95951 */ "VPBROADCASTBZ256rmk\0" |
| 50383 | /* 95971 */ "VPMINUBZ256rmk\0" |
| 50384 | /* 95986 */ "VPMAXUBZ256rmk\0" |
| 50385 | /* 96001 */ "VPACKSSWBZ256rmk\0" |
| 50386 | /* 96018 */ "VPACKUSWBZ256rmk\0" |
| 50387 | /* 96035 */ "VPERMI2DZ256rmk\0" |
| 50388 | /* 96051 */ "VPERMT2DZ256rmk\0" |
| 50389 | /* 96067 */ "VPSRADZ256rmk\0" |
| 50390 | /* 96081 */ "VPSUBDZ256rmk\0" |
| 50391 | /* 96095 */ "VPMOVSXBDZ256rmk\0" |
| 50392 | /* 96112 */ "VPMOVZXBDZ256rmk\0" |
| 50393 | /* 96129 */ "VPADDDZ256rmk\0" |
| 50394 | /* 96143 */ "VPANDDZ256rmk\0" |
| 50395 | /* 96157 */ "VPEXPANDDZ256rmk\0" |
| 50396 | /* 96174 */ "VPSLLDZ256rmk\0" |
| 50397 | /* 96188 */ "VPMULLDZ256rmk\0" |
| 50398 | /* 96203 */ "VPSRLDZ256rmk\0" |
| 50399 | /* 96217 */ "VPBLENDMDZ256rmk\0" |
| 50400 | /* 96234 */ "VPTESTNMDZ256rmk\0" |
| 50401 | /* 96251 */ "VPERMDZ256rmk\0" |
| 50402 | /* 96265 */ "VPTESTMDZ256rmk\0" |
| 50403 | /* 96281 */ "VPANDNDZ256rmk\0" |
| 50404 | /* 96296 */ "VCVTPH2PDZ256rmk\0" |
| 50405 | /* 96313 */ "VPERMI2PDZ256rmk\0" |
| 50406 | /* 96330 */ "VCVTDQ2PDZ256rmk\0" |
| 50407 | /* 96347 */ "VCVTUDQ2PDZ256rmk\0" |
| 50408 | /* 96365 */ "VCVTQQ2PDZ256rmk\0" |
| 50409 | /* 96382 */ "VCVTUQQ2PDZ256rmk\0" |
| 50410 | /* 96400 */ "VCVTPS2PDZ256rmk\0" |
| 50411 | /* 96417 */ "VPERMT2PDZ256rmk\0" |
| 50412 | /* 96434 */ "VMOVAPDZ256rmk\0" |
| 50413 | /* 96449 */ "VSUBPDZ256rmk\0" |
| 50414 | /* 96463 */ "VMINCPDZ256rmk\0" |
| 50415 | /* 96478 */ "VMAXCPDZ256rmk\0" |
| 50416 | /* 96493 */ "VADDPDZ256rmk\0" |
| 50417 | /* 96507 */ "VEXPANDPDZ256rmk\0" |
| 50418 | /* 96524 */ "VANDPDZ256rmk\0" |
| 50419 | /* 96538 */ "VSCALEFPDZ256rmk\0" |
| 50420 | /* 96555 */ "VUNPCKHPDZ256rmk\0" |
| 50421 | /* 96572 */ "VPERMILPDZ256rmk\0" |
| 50422 | /* 96589 */ "VUNPCKLPDZ256rmk\0" |
| 50423 | /* 96606 */ "VMULPDZ256rmk\0" |
| 50424 | /* 96620 */ "VBLENDMPDZ256rmk\0" |
| 50425 | /* 96637 */ "VPERMPDZ256rmk\0" |
| 50426 | /* 96652 */ "VANDNPDZ256rmk\0" |
| 50427 | /* 96667 */ "VMINPDZ256rmk\0" |
| 50428 | /* 96681 */ "VORPDZ256rmk\0" |
| 50429 | /* 96694 */ "VXORPDZ256rmk\0" |
| 50430 | /* 96708 */ "VFPCLASSPDZ256rmk\0" |
| 50431 | /* 96726 */ "VMOVUPDZ256rmk\0" |
| 50432 | /* 96741 */ "VDIVPDZ256rmk\0" |
| 50433 | /* 96755 */ "VMAXPDZ256rmk\0" |
| 50434 | /* 96769 */ "VPCMPEQDZ256rmk\0" |
| 50435 | /* 96785 */ "VPORDZ256rmk\0" |
| 50436 | /* 96798 */ "VPXORDZ256rmk\0" |
| 50437 | /* 96812 */ "VPABSDZ256rmk\0" |
| 50438 | /* 96826 */ "VPMINSDZ256rmk\0" |
| 50439 | /* 96841 */ "VBROADCASTSDZ256rmk\0" |
| 50440 | /* 96861 */ "VPMAXSDZ256rmk\0" |
| 50441 | /* 96876 */ "VPCONFLICTDZ256rmk\0" |
| 50442 | /* 96895 */ "VPCMPGTDZ256rmk\0" |
| 50443 | /* 96911 */ "VPOPCNTDZ256rmk\0" |
| 50444 | /* 96927 */ "VPLZCNTDZ256rmk\0" |
| 50445 | /* 96943 */ "VPBROADCASTDZ256rmk\0" |
| 50446 | /* 96963 */ "VPMINUDZ256rmk\0" |
| 50447 | /* 96978 */ "VPMAXUDZ256rmk\0" |
| 50448 | /* 96993 */ "VPSRAVDZ256rmk\0" |
| 50449 | /* 97008 */ "VPSLLVDZ256rmk\0" |
| 50450 | /* 97023 */ "VPROLVDZ256rmk\0" |
| 50451 | /* 97038 */ "VPSRLVDZ256rmk\0" |
| 50452 | /* 97053 */ "VPRORVDZ256rmk\0" |
| 50453 | /* 97068 */ "VPMADDWDZ256rmk\0" |
| 50454 | /* 97084 */ "VPUNPCKHWDZ256rmk\0" |
| 50455 | /* 97102 */ "VPUNPCKLWDZ256rmk\0" |
| 50456 | /* 97120 */ "VPMOVSXWDZ256rmk\0" |
| 50457 | /* 97137 */ "VPMOVZXWDZ256rmk\0" |
| 50458 | /* 97154 */ "VCVTPD2PHZ256rmk\0" |
| 50459 | /* 97171 */ "VCVTDQ2PHZ256rmk\0" |
| 50460 | /* 97188 */ "VCVTUDQ2PHZ256rmk\0" |
| 50461 | /* 97206 */ "VCVTQQ2PHZ256rmk\0" |
| 50462 | /* 97223 */ "VCVTUQQ2PHZ256rmk\0" |
| 50463 | /* 97241 */ "VCVTW2PHZ256rmk\0" |
| 50464 | /* 97257 */ "VCVTUW2PHZ256rmk\0" |
| 50465 | /* 97274 */ "VSUBPHZ256rmk\0" |
| 50466 | /* 97288 */ "VFCMULCPHZ256rmk\0" |
| 50467 | /* 97305 */ "VFMULCPHZ256rmk\0" |
| 50468 | /* 97321 */ "VMINCPHZ256rmk\0" |
| 50469 | /* 97336 */ "VMAXCPHZ256rmk\0" |
| 50470 | /* 97351 */ "VADDPHZ256rmk\0" |
| 50471 | /* 97365 */ "VSCALEFPHZ256rmk\0" |
| 50472 | /* 97382 */ "VMULPHZ256rmk\0" |
| 50473 | /* 97396 */ "VMINPHZ256rmk\0" |
| 50474 | /* 97410 */ "VFPCLASSPHZ256rmk\0" |
| 50475 | /* 97428 */ "VDIVPHZ256rmk\0" |
| 50476 | /* 97442 */ "VMAXPHZ256rmk\0" |
| 50477 | /* 97456 */ "VMOVDDUPZ256rmk\0" |
| 50478 | /* 97472 */ "VMOVSHDUPZ256rmk\0" |
| 50479 | /* 97489 */ "VMOVSLDUPZ256rmk\0" |
| 50480 | /* 97506 */ "VPERMI2QZ256rmk\0" |
| 50481 | /* 97522 */ "VPERMT2QZ256rmk\0" |
| 50482 | /* 97538 */ "VPSRAQZ256rmk\0" |
| 50483 | /* 97552 */ "VPSUBQZ256rmk\0" |
| 50484 | /* 97566 */ "VPMOVSXBQZ256rmk\0" |
| 50485 | /* 97583 */ "VPMOVZXBQZ256rmk\0" |
| 50486 | /* 97600 */ "VCVTTPD2DQZ256rmk\0" |
| 50487 | /* 97618 */ "VCVTPD2DQZ256rmk\0" |
| 50488 | /* 97635 */ "VCVTTPH2DQZ256rmk\0" |
| 50489 | /* 97653 */ "VCVTPH2DQZ256rmk\0" |
| 50490 | /* 97670 */ "VCVTTPS2DQZ256rmk\0" |
| 50491 | /* 97688 */ "VCVTPS2DQZ256rmk\0" |
| 50492 | /* 97705 */ "VPADDQZ256rmk\0" |
| 50493 | /* 97719 */ "VPUNPCKHDQZ256rmk\0" |
| 50494 | /* 97737 */ "VPUNPCKLDQZ256rmk\0" |
| 50495 | /* 97755 */ "VPMULDQZ256rmk\0" |
| 50496 | /* 97770 */ "VPANDQZ256rmk\0" |
| 50497 | /* 97784 */ "VPEXPANDQZ256rmk\0" |
| 50498 | /* 97801 */ "VPUNPCKHQDQZ256rmk\0" |
| 50499 | /* 97820 */ "VPUNPCKLQDQZ256rmk\0" |
| 50500 | /* 97839 */ "VCVTTPD2UDQZ256rmk\0" |
| 50501 | /* 97858 */ "VCVTPD2UDQZ256rmk\0" |
| 50502 | /* 97876 */ "VCVTTPH2UDQZ256rmk\0" |
| 50503 | /* 97895 */ "VCVTPH2UDQZ256rmk\0" |
| 50504 | /* 97913 */ "VCVTTPS2UDQZ256rmk\0" |
| 50505 | /* 97932 */ "VCVTPS2UDQZ256rmk\0" |
| 50506 | /* 97950 */ "VPMULUDQZ256rmk\0" |
| 50507 | /* 97966 */ "VPMOVSXDQZ256rmk\0" |
| 50508 | /* 97983 */ "VPMOVZXDQZ256rmk\0" |
| 50509 | /* 98000 */ "VPSLLQZ256rmk\0" |
| 50510 | /* 98014 */ "VPMULLQZ256rmk\0" |
| 50511 | /* 98029 */ "VPSRLQZ256rmk\0" |
| 50512 | /* 98043 */ "VPBLENDMQZ256rmk\0" |
| 50513 | /* 98060 */ "VPTESTNMQZ256rmk\0" |
| 50514 | /* 98077 */ "VPERMQZ256rmk\0" |
| 50515 | /* 98091 */ "VPTESTMQZ256rmk\0" |
| 50516 | /* 98107 */ "VPANDNQZ256rmk\0" |
| 50517 | /* 98122 */ "VCVTTPD2QQZ256rmk\0" |
| 50518 | /* 98140 */ "VCVTPD2QQZ256rmk\0" |
| 50519 | /* 98157 */ "VCVTTPH2QQZ256rmk\0" |
| 50520 | /* 98175 */ "VCVTPH2QQZ256rmk\0" |
| 50521 | /* 98192 */ "VCVTTPS2QQZ256rmk\0" |
| 50522 | /* 98210 */ "VCVTPS2QQZ256rmk\0" |
| 50523 | /* 98227 */ "VPCMPEQQZ256rmk\0" |
| 50524 | /* 98243 */ "VCVTTPD2UQQZ256rmk\0" |
| 50525 | /* 98262 */ "VCVTPD2UQQZ256rmk\0" |
| 50526 | /* 98280 */ "VCVTTPH2UQQZ256rmk\0" |
| 50527 | /* 98299 */ "VCVTPH2UQQZ256rmk\0" |
| 50528 | /* 98317 */ "VCVTTPS2UQQZ256rmk\0" |
| 50529 | /* 98336 */ "VCVTPS2UQQZ256rmk\0" |
| 50530 | /* 98354 */ "VPORQZ256rmk\0" |
| 50531 | /* 98367 */ "VPXORQZ256rmk\0" |
| 50532 | /* 98381 */ "VPABSQZ256rmk\0" |
| 50533 | /* 98395 */ "VPMINSQZ256rmk\0" |
| 50534 | /* 98410 */ "VPMAXSQZ256rmk\0" |
| 50535 | /* 98425 */ "VPCONFLICTQZ256rmk\0" |
| 50536 | /* 98444 */ "VPCMPGTQZ256rmk\0" |
| 50537 | /* 98460 */ "VPOPCNTQZ256rmk\0" |
| 50538 | /* 98476 */ "VPLZCNTQZ256rmk\0" |
| 50539 | /* 98492 */ "VPBROADCASTQZ256rmk\0" |
| 50540 | /* 98512 */ "VPMINUQZ256rmk\0" |
| 50541 | /* 98527 */ "VPMAXUQZ256rmk\0" |
| 50542 | /* 98542 */ "VPSRAVQZ256rmk\0" |
| 50543 | /* 98557 */ "VPSLLVQZ256rmk\0" |
| 50544 | /* 98572 */ "VPROLVQZ256rmk\0" |
| 50545 | /* 98587 */ "VPSRLVQZ256rmk\0" |
| 50546 | /* 98602 */ "VPRORVQZ256rmk\0" |
| 50547 | /* 98617 */ "VPMOVSXWQZ256rmk\0" |
| 50548 | /* 98634 */ "VPMOVZXWQZ256rmk\0" |
| 50549 | /* 98651 */ "VCVTPD2PSZ256rmk\0" |
| 50550 | /* 98668 */ "VCVTPH2PSZ256rmk\0" |
| 50551 | /* 98685 */ "VPERMI2PSZ256rmk\0" |
| 50552 | /* 98702 */ "VCVTDQ2PSZ256rmk\0" |
| 50553 | /* 98719 */ "VCVTUDQ2PSZ256rmk\0" |
| 50554 | /* 98737 */ "VCVTQQ2PSZ256rmk\0" |
| 50555 | /* 98754 */ "VCVTUQQ2PSZ256rmk\0" |
| 50556 | /* 98772 */ "VPERMT2PSZ256rmk\0" |
| 50557 | /* 98789 */ "VMOVAPSZ256rmk\0" |
| 50558 | /* 98804 */ "VSUBPSZ256rmk\0" |
| 50559 | /* 98818 */ "VMINCPSZ256rmk\0" |
| 50560 | /* 98833 */ "VMAXCPSZ256rmk\0" |
| 50561 | /* 98848 */ "VADDPSZ256rmk\0" |
| 50562 | /* 98862 */ "VEXPANDPSZ256rmk\0" |
| 50563 | /* 98879 */ "VANDPSZ256rmk\0" |
| 50564 | /* 98893 */ "VSCALEFPSZ256rmk\0" |
| 50565 | /* 98910 */ "VUNPCKHPSZ256rmk\0" |
| 50566 | /* 98927 */ "VPERMILPSZ256rmk\0" |
| 50567 | /* 98944 */ "VUNPCKLPSZ256rmk\0" |
| 50568 | /* 98961 */ "VMULPSZ256rmk\0" |
| 50569 | /* 98975 */ "VBLENDMPSZ256rmk\0" |
| 50570 | /* 98992 */ "VPERMPSZ256rmk\0" |
| 50571 | /* 99007 */ "VANDNPSZ256rmk\0" |
| 50572 | /* 99022 */ "VMINPSZ256rmk\0" |
| 50573 | /* 99036 */ "VORPSZ256rmk\0" |
| 50574 | /* 99049 */ "VXORPSZ256rmk\0" |
| 50575 | /* 99063 */ "VFPCLASSPSZ256rmk\0" |
| 50576 | /* 99081 */ "VMOVUPSZ256rmk\0" |
| 50577 | /* 99096 */ "VDIVPSZ256rmk\0" |
| 50578 | /* 99110 */ "VMAXPSZ256rmk\0" |
| 50579 | /* 99124 */ "VBROADCASTSSZ256rmk\0" |
| 50580 | /* 99144 */ "VCVTTPH2WZ256rmk\0" |
| 50581 | /* 99161 */ "VCVTPH2WZ256rmk\0" |
| 50582 | /* 99177 */ "VPERMI2WZ256rmk\0" |
| 50583 | /* 99193 */ "VPERMT2WZ256rmk\0" |
| 50584 | /* 99209 */ "VPSRAWZ256rmk\0" |
| 50585 | /* 99223 */ "VPUNPCKHBWZ256rmk\0" |
| 50586 | /* 99241 */ "VPUNPCKLBWZ256rmk\0" |
| 50587 | /* 99259 */ "VPSUBWZ256rmk\0" |
| 50588 | /* 99273 */ "VPMOVSXBWZ256rmk\0" |
| 50589 | /* 99290 */ "VPMOVZXBWZ256rmk\0" |
| 50590 | /* 99307 */ "VPADDWZ256rmk\0" |
| 50591 | /* 99321 */ "VPEXPANDWZ256rmk\0" |
| 50592 | /* 99338 */ "VPACKSSDWZ256rmk\0" |
| 50593 | /* 99355 */ "VPACKUSDWZ256rmk\0" |
| 50594 | /* 99372 */ "VPAVGWZ256rmk\0" |
| 50595 | /* 99386 */ "VPMULHWZ256rmk\0" |
| 50596 | /* 99401 */ "VPSLLWZ256rmk\0" |
| 50597 | /* 99415 */ "VPMULLWZ256rmk\0" |
| 50598 | /* 99430 */ "VPSRLWZ256rmk\0" |
| 50599 | /* 99444 */ "VPBLENDMWZ256rmk\0" |
| 50600 | /* 99461 */ "VPTESTNMWZ256rmk\0" |
| 50601 | /* 99478 */ "VPERMWZ256rmk\0" |
| 50602 | /* 99492 */ "VPTESTMWZ256rmk\0" |
| 50603 | /* 99508 */ "VPCMPEQWZ256rmk\0" |
| 50604 | /* 99524 */ "VPABSWZ256rmk\0" |
| 50605 | /* 99538 */ "VPMADDUBSWZ256rmk\0" |
| 50606 | /* 99556 */ "VPSUBSWZ256rmk\0" |
| 50607 | /* 99571 */ "VPADDSWZ256rmk\0" |
| 50608 | /* 99586 */ "VPMINSWZ256rmk\0" |
| 50609 | /* 99601 */ "VPMULHRSWZ256rmk\0" |
| 50610 | /* 99618 */ "VPSUBUSWZ256rmk\0" |
| 50611 | /* 99634 */ "VPADDUSWZ256rmk\0" |
| 50612 | /* 99650 */ "VPMAXSWZ256rmk\0" |
| 50613 | /* 99665 */ "VPCMPGTWZ256rmk\0" |
| 50614 | /* 99681 */ "VPOPCNTWZ256rmk\0" |
| 50615 | /* 99697 */ "VPBROADCASTWZ256rmk\0" |
| 50616 | /* 99717 */ "VCVTTPH2UWZ256rmk\0" |
| 50617 | /* 99735 */ "VCVTPH2UWZ256rmk\0" |
| 50618 | /* 99752 */ "VPMULHUWZ256rmk\0" |
| 50619 | /* 99768 */ "VPMINUWZ256rmk\0" |
| 50620 | /* 99783 */ "VPMAXUWZ256rmk\0" |
| 50621 | /* 99798 */ "VPSRAVWZ256rmk\0" |
| 50622 | /* 99813 */ "VPSLLVWZ256rmk\0" |
| 50623 | /* 99828 */ "VPSRLVWZ256rmk\0" |
| 50624 | /* 99843 */ "VCVTPS2PHXZ256rmk\0" |
| 50625 | /* 99861 */ "VCVTPH2PSXZ256rmk\0" |
| 50626 | /* 99879 */ "VMOVDQA32Z128rmk\0" |
| 50627 | /* 99896 */ "VMOVDQU32Z128rmk\0" |
| 50628 | /* 99913 */ "VBROADCASTI32X2Z128rmk\0" |
| 50629 | /* 99936 */ "VBROADCASTF64X2Z128rmk\0" |
| 50630 | /* 99959 */ "VBROADCASTI64X2Z128rmk\0" |
| 50631 | /* 99982 */ "VMOVDQA64Z128rmk\0" |
| 50632 | /* 99999 */ "VMOVDQU64Z128rmk\0" |
| 50633 | /* 100016 */ "VCVTNE2PS2BF16Z128rmk\0" |
| 50634 | /* 100038 */ "VCVTNEPS2BF16Z128rmk\0" |
| 50635 | /* 100059 */ "VMOVDQU16Z128rmk\0" |
| 50636 | /* 100076 */ "VMOVDQU8Z128rmk\0" |
| 50637 | /* 100092 */ "VPERMI2BZ128rmk\0" |
| 50638 | /* 100108 */ "VPERMT2BZ128rmk\0" |
| 50639 | /* 100124 */ "VPSUBBZ128rmk\0" |
| 50640 | /* 100138 */ "VPADDBZ128rmk\0" |
| 50641 | /* 100152 */ "VPEXPANDBZ128rmk\0" |
| 50642 | /* 100169 */ "VPSHUFBZ128rmk\0" |
| 50643 | /* 100184 */ "VPAVGBZ128rmk\0" |
| 50644 | /* 100198 */ "VGF2P8MULBZ128rmk\0" |
| 50645 | /* 100216 */ "VPBLENDMBZ128rmk\0" |
| 50646 | /* 100233 */ "VPTESTNMBZ128rmk\0" |
| 50647 | /* 100250 */ "VPSHUFBITQMBZ128rmk\0" |
| 50648 | /* 100270 */ "VPERMBZ128rmk\0" |
| 50649 | /* 100284 */ "VPTESTMBZ128rmk\0" |
| 50650 | /* 100300 */ "VPCMPEQBZ128rmk\0" |
| 50651 | /* 100316 */ "VPMULTISHIFTQBZ128rmk\0" |
| 50652 | /* 100338 */ "VPABSBZ128rmk\0" |
| 50653 | /* 100352 */ "VPSUBSBZ128rmk\0" |
| 50654 | /* 100367 */ "VPADDSBZ128rmk\0" |
| 50655 | /* 100382 */ "VPMINSBZ128rmk\0" |
| 50656 | /* 100397 */ "VPSUBUSBZ128rmk\0" |
| 50657 | /* 100413 */ "VPADDUSBZ128rmk\0" |
| 50658 | /* 100429 */ "VPMAXSBZ128rmk\0" |
| 50659 | /* 100444 */ "VPCMPGTBZ128rmk\0" |
| 50660 | /* 100460 */ "VPOPCNTBZ128rmk\0" |
| 50661 | /* 100476 */ "VPBROADCASTBZ128rmk\0" |
| 50662 | /* 100496 */ "VPMINUBZ128rmk\0" |
| 50663 | /* 100511 */ "VPMAXUBZ128rmk\0" |
| 50664 | /* 100526 */ "VPACKSSWBZ128rmk\0" |
| 50665 | /* 100543 */ "VPACKUSWBZ128rmk\0" |
| 50666 | /* 100560 */ "VPERMI2DZ128rmk\0" |
| 50667 | /* 100576 */ "VPERMT2DZ128rmk\0" |
| 50668 | /* 100592 */ "VPSRADZ128rmk\0" |
| 50669 | /* 100606 */ "VPSUBDZ128rmk\0" |
| 50670 | /* 100620 */ "VPMOVSXBDZ128rmk\0" |
| 50671 | /* 100637 */ "VPMOVZXBDZ128rmk\0" |
| 50672 | /* 100654 */ "VPADDDZ128rmk\0" |
| 50673 | /* 100668 */ "VPANDDZ128rmk\0" |
| 50674 | /* 100682 */ "VPEXPANDDZ128rmk\0" |
| 50675 | /* 100699 */ "VPSLLDZ128rmk\0" |
| 50676 | /* 100713 */ "VPMULLDZ128rmk\0" |
| 50677 | /* 100728 */ "VPSRLDZ128rmk\0" |
| 50678 | /* 100742 */ "VPBLENDMDZ128rmk\0" |
| 50679 | /* 100759 */ "VPTESTNMDZ128rmk\0" |
| 50680 | /* 100776 */ "VPTESTMDZ128rmk\0" |
| 50681 | /* 100792 */ "VPANDNDZ128rmk\0" |
| 50682 | /* 100807 */ "VCVTPH2PDZ128rmk\0" |
| 50683 | /* 100824 */ "VPERMI2PDZ128rmk\0" |
| 50684 | /* 100841 */ "VCVTDQ2PDZ128rmk\0" |
| 50685 | /* 100858 */ "VCVTUDQ2PDZ128rmk\0" |
| 50686 | /* 100876 */ "VCVTQQ2PDZ128rmk\0" |
| 50687 | /* 100893 */ "VCVTUQQ2PDZ128rmk\0" |
| 50688 | /* 100911 */ "VCVTPS2PDZ128rmk\0" |
| 50689 | /* 100928 */ "VPERMT2PDZ128rmk\0" |
| 50690 | /* 100945 */ "VMOVAPDZ128rmk\0" |
| 50691 | /* 100960 */ "VSUBPDZ128rmk\0" |
| 50692 | /* 100974 */ "VMINCPDZ128rmk\0" |
| 50693 | /* 100989 */ "VMAXCPDZ128rmk\0" |
| 50694 | /* 101004 */ "VADDPDZ128rmk\0" |
| 50695 | /* 101018 */ "VEXPANDPDZ128rmk\0" |
| 50696 | /* 101035 */ "VANDPDZ128rmk\0" |
| 50697 | /* 101049 */ "VSCALEFPDZ128rmk\0" |
| 50698 | /* 101066 */ "VUNPCKHPDZ128rmk\0" |
| 50699 | /* 101083 */ "VPERMILPDZ128rmk\0" |
| 50700 | /* 101100 */ "VUNPCKLPDZ128rmk\0" |
| 50701 | /* 101117 */ "VMULPDZ128rmk\0" |
| 50702 | /* 101131 */ "VBLENDMPDZ128rmk\0" |
| 50703 | /* 101148 */ "VANDNPDZ128rmk\0" |
| 50704 | /* 101163 */ "VMINPDZ128rmk\0" |
| 50705 | /* 101177 */ "VORPDZ128rmk\0" |
| 50706 | /* 101190 */ "VXORPDZ128rmk\0" |
| 50707 | /* 101204 */ "VFPCLASSPDZ128rmk\0" |
| 50708 | /* 101222 */ "VMOVUPDZ128rmk\0" |
| 50709 | /* 101237 */ "VDIVPDZ128rmk\0" |
| 50710 | /* 101251 */ "VMAXPDZ128rmk\0" |
| 50711 | /* 101265 */ "VPCMPEQDZ128rmk\0" |
| 50712 | /* 101281 */ "VPORDZ128rmk\0" |
| 50713 | /* 101294 */ "VPXORDZ128rmk\0" |
| 50714 | /* 101308 */ "VPABSDZ128rmk\0" |
| 50715 | /* 101322 */ "VPMINSDZ128rmk\0" |
| 50716 | /* 101337 */ "VPMAXSDZ128rmk\0" |
| 50717 | /* 101352 */ "VPCONFLICTDZ128rmk\0" |
| 50718 | /* 101371 */ "VPCMPGTDZ128rmk\0" |
| 50719 | /* 101387 */ "VPOPCNTDZ128rmk\0" |
| 50720 | /* 101403 */ "VPLZCNTDZ128rmk\0" |
| 50721 | /* 101419 */ "VPBROADCASTDZ128rmk\0" |
| 50722 | /* 101439 */ "VPMINUDZ128rmk\0" |
| 50723 | /* 101454 */ "VPMAXUDZ128rmk\0" |
| 50724 | /* 101469 */ "VPSRAVDZ128rmk\0" |
| 50725 | /* 101484 */ "VPSLLVDZ128rmk\0" |
| 50726 | /* 101499 */ "VPROLVDZ128rmk\0" |
| 50727 | /* 101514 */ "VPSRLVDZ128rmk\0" |
| 50728 | /* 101529 */ "VPRORVDZ128rmk\0" |
| 50729 | /* 101544 */ "VPMADDWDZ128rmk\0" |
| 50730 | /* 101560 */ "VPUNPCKHWDZ128rmk\0" |
| 50731 | /* 101578 */ "VPUNPCKLWDZ128rmk\0" |
| 50732 | /* 101596 */ "VPMOVSXWDZ128rmk\0" |
| 50733 | /* 101613 */ "VPMOVZXWDZ128rmk\0" |
| 50734 | /* 101630 */ "VCVTPD2PHZ128rmk\0" |
| 50735 | /* 101647 */ "VCVTDQ2PHZ128rmk\0" |
| 50736 | /* 101664 */ "VCVTUDQ2PHZ128rmk\0" |
| 50737 | /* 101682 */ "VCVTQQ2PHZ128rmk\0" |
| 50738 | /* 101699 */ "VCVTUQQ2PHZ128rmk\0" |
| 50739 | /* 101717 */ "VCVTW2PHZ128rmk\0" |
| 50740 | /* 101733 */ "VCVTUW2PHZ128rmk\0" |
| 50741 | /* 101750 */ "VSUBPHZ128rmk\0" |
| 50742 | /* 101764 */ "VFCMULCPHZ128rmk\0" |
| 50743 | /* 101781 */ "VFMULCPHZ128rmk\0" |
| 50744 | /* 101797 */ "VMINCPHZ128rmk\0" |
| 50745 | /* 101812 */ "VMAXCPHZ128rmk\0" |
| 50746 | /* 101827 */ "VADDPHZ128rmk\0" |
| 50747 | /* 101841 */ "VSCALEFPHZ128rmk\0" |
| 50748 | /* 101858 */ "VMULPHZ128rmk\0" |
| 50749 | /* 101872 */ "VMINPHZ128rmk\0" |
| 50750 | /* 101886 */ "VFPCLASSPHZ128rmk\0" |
| 50751 | /* 101904 */ "VDIVPHZ128rmk\0" |
| 50752 | /* 101918 */ "VMAXPHZ128rmk\0" |
| 50753 | /* 101932 */ "VMOVDDUPZ128rmk\0" |
| 50754 | /* 101948 */ "VMOVSHDUPZ128rmk\0" |
| 50755 | /* 101965 */ "VMOVSLDUPZ128rmk\0" |
| 50756 | /* 101982 */ "VPERMI2QZ128rmk\0" |
| 50757 | /* 101998 */ "VPERMT2QZ128rmk\0" |
| 50758 | /* 102014 */ "VPSRAQZ128rmk\0" |
| 50759 | /* 102028 */ "VPSUBQZ128rmk\0" |
| 50760 | /* 102042 */ "VPMOVSXBQZ128rmk\0" |
| 50761 | /* 102059 */ "VPMOVZXBQZ128rmk\0" |
| 50762 | /* 102076 */ "VCVTTPD2DQZ128rmk\0" |
| 50763 | /* 102094 */ "VCVTPD2DQZ128rmk\0" |
| 50764 | /* 102111 */ "VCVTTPH2DQZ128rmk\0" |
| 50765 | /* 102129 */ "VCVTPH2DQZ128rmk\0" |
| 50766 | /* 102146 */ "VCVTTPS2DQZ128rmk\0" |
| 50767 | /* 102164 */ "VCVTPS2DQZ128rmk\0" |
| 50768 | /* 102181 */ "VPADDQZ128rmk\0" |
| 50769 | /* 102195 */ "VPUNPCKHDQZ128rmk\0" |
| 50770 | /* 102213 */ "VPUNPCKLDQZ128rmk\0" |
| 50771 | /* 102231 */ "VPMULDQZ128rmk\0" |
| 50772 | /* 102246 */ "VPANDQZ128rmk\0" |
| 50773 | /* 102260 */ "VPEXPANDQZ128rmk\0" |
| 50774 | /* 102277 */ "VPUNPCKHQDQZ128rmk\0" |
| 50775 | /* 102296 */ "VPUNPCKLQDQZ128rmk\0" |
| 50776 | /* 102315 */ "VCVTTPD2UDQZ128rmk\0" |
| 50777 | /* 102334 */ "VCVTPD2UDQZ128rmk\0" |
| 50778 | /* 102352 */ "VCVTTPH2UDQZ128rmk\0" |
| 50779 | /* 102371 */ "VCVTPH2UDQZ128rmk\0" |
| 50780 | /* 102389 */ "VCVTTPS2UDQZ128rmk\0" |
| 50781 | /* 102408 */ "VCVTPS2UDQZ128rmk\0" |
| 50782 | /* 102426 */ "VPMULUDQZ128rmk\0" |
| 50783 | /* 102442 */ "VPMOVSXDQZ128rmk\0" |
| 50784 | /* 102459 */ "VPMOVZXDQZ128rmk\0" |
| 50785 | /* 102476 */ "VPSLLQZ128rmk\0" |
| 50786 | /* 102490 */ "VPMULLQZ128rmk\0" |
| 50787 | /* 102505 */ "VPSRLQZ128rmk\0" |
| 50788 | /* 102519 */ "VPBLENDMQZ128rmk\0" |
| 50789 | /* 102536 */ "VPTESTNMQZ128rmk\0" |
| 50790 | /* 102553 */ "VPTESTMQZ128rmk\0" |
| 50791 | /* 102569 */ "VPANDNQZ128rmk\0" |
| 50792 | /* 102584 */ "VCVTTPD2QQZ128rmk\0" |
| 50793 | /* 102602 */ "VCVTPD2QQZ128rmk\0" |
| 50794 | /* 102619 */ "VCVTTPH2QQZ128rmk\0" |
| 50795 | /* 102637 */ "VCVTPH2QQZ128rmk\0" |
| 50796 | /* 102654 */ "VCVTTPS2QQZ128rmk\0" |
| 50797 | /* 102672 */ "VCVTPS2QQZ128rmk\0" |
| 50798 | /* 102689 */ "VPCMPEQQZ128rmk\0" |
| 50799 | /* 102705 */ "VCVTTPD2UQQZ128rmk\0" |
| 50800 | /* 102724 */ "VCVTPD2UQQZ128rmk\0" |
| 50801 | /* 102742 */ "VCVTTPH2UQQZ128rmk\0" |
| 50802 | /* 102761 */ "VCVTPH2UQQZ128rmk\0" |
| 50803 | /* 102779 */ "VCVTTPS2UQQZ128rmk\0" |
| 50804 | /* 102798 */ "VCVTPS2UQQZ128rmk\0" |
| 50805 | /* 102816 */ "VPORQZ128rmk\0" |
| 50806 | /* 102829 */ "VPXORQZ128rmk\0" |
| 50807 | /* 102843 */ "VPABSQZ128rmk\0" |
| 50808 | /* 102857 */ "VPMINSQZ128rmk\0" |
| 50809 | /* 102872 */ "VPMAXSQZ128rmk\0" |
| 50810 | /* 102887 */ "VPCONFLICTQZ128rmk\0" |
| 50811 | /* 102906 */ "VPCMPGTQZ128rmk\0" |
| 50812 | /* 102922 */ "VPOPCNTQZ128rmk\0" |
| 50813 | /* 102938 */ "VPLZCNTQZ128rmk\0" |
| 50814 | /* 102954 */ "VPBROADCASTQZ128rmk\0" |
| 50815 | /* 102974 */ "VPMINUQZ128rmk\0" |
| 50816 | /* 102989 */ "VPMAXUQZ128rmk\0" |
| 50817 | /* 103004 */ "VPSRAVQZ128rmk\0" |
| 50818 | /* 103019 */ "VPSLLVQZ128rmk\0" |
| 50819 | /* 103034 */ "VPROLVQZ128rmk\0" |
| 50820 | /* 103049 */ "VPSRLVQZ128rmk\0" |
| 50821 | /* 103064 */ "VPRORVQZ128rmk\0" |
| 50822 | /* 103079 */ "VPMOVSXWQZ128rmk\0" |
| 50823 | /* 103096 */ "VPMOVZXWQZ128rmk\0" |
| 50824 | /* 103113 */ "VCVTPD2PSZ128rmk\0" |
| 50825 | /* 103130 */ "VCVTPH2PSZ128rmk\0" |
| 50826 | /* 103147 */ "VPERMI2PSZ128rmk\0" |
| 50827 | /* 103164 */ "VCVTDQ2PSZ128rmk\0" |
| 50828 | /* 103181 */ "VCVTUDQ2PSZ128rmk\0" |
| 50829 | /* 103199 */ "VCVTQQ2PSZ128rmk\0" |
| 50830 | /* 103216 */ "VCVTUQQ2PSZ128rmk\0" |
| 50831 | /* 103234 */ "VPERMT2PSZ128rmk\0" |
| 50832 | /* 103251 */ "VMOVAPSZ128rmk\0" |
| 50833 | /* 103266 */ "VSUBPSZ128rmk\0" |
| 50834 | /* 103280 */ "VMINCPSZ128rmk\0" |
| 50835 | /* 103295 */ "VMAXCPSZ128rmk\0" |
| 50836 | /* 103310 */ "VADDPSZ128rmk\0" |
| 50837 | /* 103324 */ "VEXPANDPSZ128rmk\0" |
| 50838 | /* 103341 */ "VANDPSZ128rmk\0" |
| 50839 | /* 103355 */ "VSCALEFPSZ128rmk\0" |
| 50840 | /* 103372 */ "VUNPCKHPSZ128rmk\0" |
| 50841 | /* 103389 */ "VPERMILPSZ128rmk\0" |
| 50842 | /* 103406 */ "VUNPCKLPSZ128rmk\0" |
| 50843 | /* 103423 */ "VMULPSZ128rmk\0" |
| 50844 | /* 103437 */ "VBLENDMPSZ128rmk\0" |
| 50845 | /* 103454 */ "VANDNPSZ128rmk\0" |
| 50846 | /* 103469 */ "VMINPSZ128rmk\0" |
| 50847 | /* 103483 */ "VORPSZ128rmk\0" |
| 50848 | /* 103496 */ "VXORPSZ128rmk\0" |
| 50849 | /* 103510 */ "VFPCLASSPSZ128rmk\0" |
| 50850 | /* 103528 */ "VMOVUPSZ128rmk\0" |
| 50851 | /* 103543 */ "VDIVPSZ128rmk\0" |
| 50852 | /* 103557 */ "VMAXPSZ128rmk\0" |
| 50853 | /* 103571 */ "VBROADCASTSSZ128rmk\0" |
| 50854 | /* 103591 */ "VCVTTPH2WZ128rmk\0" |
| 50855 | /* 103608 */ "VCVTPH2WZ128rmk\0" |
| 50856 | /* 103624 */ "VPERMI2WZ128rmk\0" |
| 50857 | /* 103640 */ "VPERMT2WZ128rmk\0" |
| 50858 | /* 103656 */ "VPSRAWZ128rmk\0" |
| 50859 | /* 103670 */ "VPUNPCKHBWZ128rmk\0" |
| 50860 | /* 103688 */ "VPUNPCKLBWZ128rmk\0" |
| 50861 | /* 103706 */ "VPSUBWZ128rmk\0" |
| 50862 | /* 103720 */ "VPMOVSXBWZ128rmk\0" |
| 50863 | /* 103737 */ "VPMOVZXBWZ128rmk\0" |
| 50864 | /* 103754 */ "VPADDWZ128rmk\0" |
| 50865 | /* 103768 */ "VPEXPANDWZ128rmk\0" |
| 50866 | /* 103785 */ "VPACKSSDWZ128rmk\0" |
| 50867 | /* 103802 */ "VPACKUSDWZ128rmk\0" |
| 50868 | /* 103819 */ "VPAVGWZ128rmk\0" |
| 50869 | /* 103833 */ "VPMULHWZ128rmk\0" |
| 50870 | /* 103848 */ "VPSLLWZ128rmk\0" |
| 50871 | /* 103862 */ "VPMULLWZ128rmk\0" |
| 50872 | /* 103877 */ "VPSRLWZ128rmk\0" |
| 50873 | /* 103891 */ "VPBLENDMWZ128rmk\0" |
| 50874 | /* 103908 */ "VPTESTNMWZ128rmk\0" |
| 50875 | /* 103925 */ "VPERMWZ128rmk\0" |
| 50876 | /* 103939 */ "VPTESTMWZ128rmk\0" |
| 50877 | /* 103955 */ "VPCMPEQWZ128rmk\0" |
| 50878 | /* 103971 */ "VPABSWZ128rmk\0" |
| 50879 | /* 103985 */ "VPMADDUBSWZ128rmk\0" |
| 50880 | /* 104003 */ "VPSUBSWZ128rmk\0" |
| 50881 | /* 104018 */ "VPADDSWZ128rmk\0" |
| 50882 | /* 104033 */ "VPMINSWZ128rmk\0" |
| 50883 | /* 104048 */ "VPMULHRSWZ128rmk\0" |
| 50884 | /* 104065 */ "VPSUBUSWZ128rmk\0" |
| 50885 | /* 104081 */ "VPADDUSWZ128rmk\0" |
| 50886 | /* 104097 */ "VPMAXSWZ128rmk\0" |
| 50887 | /* 104112 */ "VPCMPGTWZ128rmk\0" |
| 50888 | /* 104128 */ "VPOPCNTWZ128rmk\0" |
| 50889 | /* 104144 */ "VPBROADCASTWZ128rmk\0" |
| 50890 | /* 104164 */ "VCVTTPH2UWZ128rmk\0" |
| 50891 | /* 104182 */ "VCVTPH2UWZ128rmk\0" |
| 50892 | /* 104199 */ "VPMULHUWZ128rmk\0" |
| 50893 | /* 104215 */ "VPMINUWZ128rmk\0" |
| 50894 | /* 104230 */ "VPMAXUWZ128rmk\0" |
| 50895 | /* 104245 */ "VPSRAVWZ128rmk\0" |
| 50896 | /* 104260 */ "VPSLLVWZ128rmk\0" |
| 50897 | /* 104275 */ "VPSRLVWZ128rmk\0" |
| 50898 | /* 104290 */ "VCVTPS2PHXZ128rmk\0" |
| 50899 | /* 104308 */ "VCVTPH2PSXZ128rmk\0" |
| 50900 | /* 104326 */ "VBROADCASTF32X8rmk\0" |
| 50901 | /* 104345 */ "VBROADCASTI32X8rmk\0" |
| 50902 | /* 104364 */ "VP4DPWSSDrmk\0" |
| 50903 | /* 104377 */ "VP4DPWSSDSrmk\0" |
| 50904 | /* 104391 */ "V4FMADDPSrmk\0" |
| 50905 | /* 104404 */ "V4FNMADDPSrmk\0" |
| 50906 | /* 104418 */ "V4FMADDSSrmk\0" |
| 50907 | /* 104431 */ "V4FNMADDSSrmk\0" |
| 50908 | /* 104445 */ "VMOVDQA32Zrmk\0" |
| 50909 | /* 104459 */ "VMOVDQU32Zrmk\0" |
| 50910 | /* 104473 */ "VBROADCASTF32X2Zrmk\0" |
| 50911 | /* 104493 */ "VBROADCASTI32X2Zrmk\0" |
| 50912 | /* 104513 */ "VINSERTF64x2Zrmk\0" |
| 50913 | /* 104530 */ "VINSERTI64x2Zrmk\0" |
| 50914 | /* 104547 */ "VMOVDQA64Zrmk\0" |
| 50915 | /* 104561 */ "VMOVDQU64Zrmk\0" |
| 50916 | /* 104575 */ "VINSERTF32x4Zrmk\0" |
| 50917 | /* 104592 */ "VINSERTI32x4Zrmk\0" |
| 50918 | /* 104609 */ "VINSERTF64x4Zrmk\0" |
| 50919 | /* 104626 */ "VINSERTI64x4Zrmk\0" |
| 50920 | /* 104643 */ "VCVTNE2PS2BF16Zrmk\0" |
| 50921 | /* 104662 */ "VCVTNEPS2BF16Zrmk\0" |
| 50922 | /* 104680 */ "VMOVDQU16Zrmk\0" |
| 50923 | /* 104694 */ "VMOVDQU8Zrmk\0" |
| 50924 | /* 104707 */ "VINSERTF32x8Zrmk\0" |
| 50925 | /* 104724 */ "VINSERTI32x8Zrmk\0" |
| 50926 | /* 104741 */ "VPERMI2BZrmk\0" |
| 50927 | /* 104754 */ "VPERMT2BZrmk\0" |
| 50928 | /* 104767 */ "VPSUBBZrmk\0" |
| 50929 | /* 104778 */ "VPADDBZrmk\0" |
| 50930 | /* 104789 */ "VPEXPANDBZrmk\0" |
| 50931 | /* 104803 */ "VPSHUFBZrmk\0" |
| 50932 | /* 104815 */ "VPAVGBZrmk\0" |
| 50933 | /* 104826 */ "VGF2P8MULBZrmk\0" |
| 50934 | /* 104841 */ "VPBLENDMBZrmk\0" |
| 50935 | /* 104855 */ "VPTESTNMBZrmk\0" |
| 50936 | /* 104869 */ "VPSHUFBITQMBZrmk\0" |
| 50937 | /* 104886 */ "VPERMBZrmk\0" |
| 50938 | /* 104897 */ "VPTESTMBZrmk\0" |
| 50939 | /* 104910 */ "VPCMPEQBZrmk\0" |
| 50940 | /* 104923 */ "VPMULTISHIFTQBZrmk\0" |
| 50941 | /* 104942 */ "VPABSBZrmk\0" |
| 50942 | /* 104953 */ "VPSUBSBZrmk\0" |
| 50943 | /* 104965 */ "VPADDSBZrmk\0" |
| 50944 | /* 104977 */ "VPMINSBZrmk\0" |
| 50945 | /* 104989 */ "VPSUBUSBZrmk\0" |
| 50946 | /* 105002 */ "VPADDUSBZrmk\0" |
| 50947 | /* 105015 */ "VPMAXSBZrmk\0" |
| 50948 | /* 105027 */ "VPCMPGTBZrmk\0" |
| 50949 | /* 105040 */ "VPOPCNTBZrmk\0" |
| 50950 | /* 105053 */ "VPBROADCASTBZrmk\0" |
| 50951 | /* 105070 */ "VPMINUBZrmk\0" |
| 50952 | /* 105082 */ "VPMAXUBZrmk\0" |
| 50953 | /* 105094 */ "VPACKSSWBZrmk\0" |
| 50954 | /* 105108 */ "VPACKUSWBZrmk\0" |
| 50955 | /* 105122 */ "VPERMI2DZrmk\0" |
| 50956 | /* 105135 */ "VPERMT2DZrmk\0" |
| 50957 | /* 105148 */ "VPSRADZrmk\0" |
| 50958 | /* 105159 */ "VPSUBDZrmk\0" |
| 50959 | /* 105170 */ "VPMOVSXBDZrmk\0" |
| 50960 | /* 105184 */ "VPMOVZXBDZrmk\0" |
| 50961 | /* 105198 */ "VPADDDZrmk\0" |
| 50962 | /* 105209 */ "VPANDDZrmk\0" |
| 50963 | /* 105220 */ "VPEXPANDDZrmk\0" |
| 50964 | /* 105234 */ "VPSLLDZrmk\0" |
| 50965 | /* 105245 */ "VPMULLDZrmk\0" |
| 50966 | /* 105257 */ "VPSRLDZrmk\0" |
| 50967 | /* 105268 */ "VPBLENDMDZrmk\0" |
| 50968 | /* 105282 */ "VPTESTNMDZrmk\0" |
| 50969 | /* 105296 */ "VPERMDZrmk\0" |
| 50970 | /* 105307 */ "VPTESTMDZrmk\0" |
| 50971 | /* 105320 */ "VPANDNDZrmk\0" |
| 50972 | /* 105332 */ "VCVTPH2PDZrmk\0" |
| 50973 | /* 105346 */ "VPERMI2PDZrmk\0" |
| 50974 | /* 105360 */ "VCVTDQ2PDZrmk\0" |
| 50975 | /* 105374 */ "VCVTUDQ2PDZrmk\0" |
| 50976 | /* 105389 */ "VCVTQQ2PDZrmk\0" |
| 50977 | /* 105403 */ "VCVTUQQ2PDZrmk\0" |
| 50978 | /* 105418 */ "VCVTPS2PDZrmk\0" |
| 50979 | /* 105432 */ "VPERMT2PDZrmk\0" |
| 50980 | /* 105446 */ "VMOVAPDZrmk\0" |
| 50981 | /* 105458 */ "VSUBPDZrmk\0" |
| 50982 | /* 105469 */ "VMINCPDZrmk\0" |
| 50983 | /* 105481 */ "VMAXCPDZrmk\0" |
| 50984 | /* 105493 */ "VADDPDZrmk\0" |
| 50985 | /* 105504 */ "VEXPANDPDZrmk\0" |
| 50986 | /* 105518 */ "VANDPDZrmk\0" |
| 50987 | /* 105529 */ "VSCALEFPDZrmk\0" |
| 50988 | /* 105543 */ "VUNPCKHPDZrmk\0" |
| 50989 | /* 105557 */ "VPERMILPDZrmk\0" |
| 50990 | /* 105571 */ "VUNPCKLPDZrmk\0" |
| 50991 | /* 105585 */ "VMULPDZrmk\0" |
| 50992 | /* 105596 */ "VBLENDMPDZrmk\0" |
| 50993 | /* 105610 */ "VPERMPDZrmk\0" |
| 50994 | /* 105622 */ "VANDNPDZrmk\0" |
| 50995 | /* 105634 */ "VMINPDZrmk\0" |
| 50996 | /* 105645 */ "VORPDZrmk\0" |
| 50997 | /* 105655 */ "VXORPDZrmk\0" |
| 50998 | /* 105666 */ "VFPCLASSPDZrmk\0" |
| 50999 | /* 105681 */ "VMOVUPDZrmk\0" |
| 51000 | /* 105693 */ "VDIVPDZrmk\0" |
| 51001 | /* 105704 */ "VMAXPDZrmk\0" |
| 51002 | /* 105715 */ "VPCMPEQDZrmk\0" |
| 51003 | /* 105728 */ "VPORDZrmk\0" |
| 51004 | /* 105738 */ "VPXORDZrmk\0" |
| 51005 | /* 105749 */ "VRCP14SDZrmk\0" |
| 51006 | /* 105762 */ "VRSQRT14SDZrmk\0" |
| 51007 | /* 105777 */ "VPABSDZrmk\0" |
| 51008 | /* 105788 */ "VSCALEFSDZrmk\0" |
| 51009 | /* 105802 */ "VPMINSDZrmk\0" |
| 51010 | /* 105814 */ "VFPCLASSSDZrmk\0" |
| 51011 | /* 105829 */ "VBROADCASTSDZrmk\0" |
| 51012 | /* 105846 */ "VMOVSDZrmk\0" |
| 51013 | /* 105857 */ "VPMAXSDZrmk\0" |
| 51014 | /* 105869 */ "VPCONFLICTDZrmk\0" |
| 51015 | /* 105885 */ "VPCMPGTDZrmk\0" |
| 51016 | /* 105898 */ "VPOPCNTDZrmk\0" |
| 51017 | /* 105911 */ "VPLZCNTDZrmk\0" |
| 51018 | /* 105924 */ "VPBROADCASTDZrmk\0" |
| 51019 | /* 105941 */ "VPMINUDZrmk\0" |
| 51020 | /* 105953 */ "VPMAXUDZrmk\0" |
| 51021 | /* 105965 */ "VPSRAVDZrmk\0" |
| 51022 | /* 105977 */ "VPSLLVDZrmk\0" |
| 51023 | /* 105989 */ "VPROLVDZrmk\0" |
| 51024 | /* 106001 */ "VPSRLVDZrmk\0" |
| 51025 | /* 106013 */ "VPRORVDZrmk\0" |
| 51026 | /* 106025 */ "VPMADDWDZrmk\0" |
| 51027 | /* 106038 */ "VPUNPCKHWDZrmk\0" |
| 51028 | /* 106053 */ "VPUNPCKLWDZrmk\0" |
| 51029 | /* 106068 */ "VPMOVSXWDZrmk\0" |
| 51030 | /* 106082 */ "VPMOVZXWDZrmk\0" |
| 51031 | /* 106096 */ "VCVTPD2PHZrmk\0" |
| 51032 | /* 106110 */ "VCVTDQ2PHZrmk\0" |
| 51033 | /* 106124 */ "VCVTUDQ2PHZrmk\0" |
| 51034 | /* 106139 */ "VCVTQQ2PHZrmk\0" |
| 51035 | /* 106153 */ "VCVTUQQ2PHZrmk\0" |
| 51036 | /* 106168 */ "VCVTW2PHZrmk\0" |
| 51037 | /* 106181 */ "VCVTUW2PHZrmk\0" |
| 51038 | /* 106195 */ "VSUBPHZrmk\0" |
| 51039 | /* 106206 */ "VFCMULCPHZrmk\0" |
| 51040 | /* 106220 */ "VFMULCPHZrmk\0" |
| 51041 | /* 106233 */ "VMINCPHZrmk\0" |
| 51042 | /* 106245 */ "VMAXCPHZrmk\0" |
| 51043 | /* 106257 */ "VADDPHZrmk\0" |
| 51044 | /* 106268 */ "VSCALEFPHZrmk\0" |
| 51045 | /* 106282 */ "VMULPHZrmk\0" |
| 51046 | /* 106293 */ "VMINPHZrmk\0" |
| 51047 | /* 106304 */ "VFPCLASSPHZrmk\0" |
| 51048 | /* 106319 */ "VDIVPHZrmk\0" |
| 51049 | /* 106330 */ "VMAXPHZrmk\0" |
| 51050 | /* 106341 */ "VFCMULCSHZrmk\0" |
| 51051 | /* 106355 */ "VFMULCSHZrmk\0" |
| 51052 | /* 106368 */ "VSCALEFSHZrmk\0" |
| 51053 | /* 106382 */ "VRCPSHZrmk\0" |
| 51054 | /* 106393 */ "VFPCLASSSHZrmk\0" |
| 51055 | /* 106408 */ "VRSQRTSHZrmk\0" |
| 51056 | /* 106421 */ "VMOVSHZrmk\0" |
| 51057 | /* 106432 */ "VMOVDDUPZrmk\0" |
| 51058 | /* 106445 */ "VMOVSHDUPZrmk\0" |
| 51059 | /* 106459 */ "VMOVSLDUPZrmk\0" |
| 51060 | /* 106473 */ "VPERMI2QZrmk\0" |
| 51061 | /* 106486 */ "VPERMT2QZrmk\0" |
| 51062 | /* 106499 */ "VPSRAQZrmk\0" |
| 51063 | /* 106510 */ "VPSUBQZrmk\0" |
| 51064 | /* 106521 */ "VPMOVSXBQZrmk\0" |
| 51065 | /* 106535 */ "VPMOVZXBQZrmk\0" |
| 51066 | /* 106549 */ "VCVTTPD2DQZrmk\0" |
| 51067 | /* 106564 */ "VCVTPD2DQZrmk\0" |
| 51068 | /* 106578 */ "VCVTTPH2DQZrmk\0" |
| 51069 | /* 106593 */ "VCVTPH2DQZrmk\0" |
| 51070 | /* 106607 */ "VCVTTPS2DQZrmk\0" |
| 51071 | /* 106622 */ "VCVTPS2DQZrmk\0" |
| 51072 | /* 106636 */ "VPADDQZrmk\0" |
| 51073 | /* 106647 */ "VPUNPCKHDQZrmk\0" |
| 51074 | /* 106662 */ "VPUNPCKLDQZrmk\0" |
| 51075 | /* 106677 */ "VPMULDQZrmk\0" |
| 51076 | /* 106689 */ "VPANDQZrmk\0" |
| 51077 | /* 106700 */ "VPEXPANDQZrmk\0" |
| 51078 | /* 106714 */ "VPUNPCKHQDQZrmk\0" |
| 51079 | /* 106730 */ "VPUNPCKLQDQZrmk\0" |
| 51080 | /* 106746 */ "VCVTTPD2UDQZrmk\0" |
| 51081 | /* 106762 */ "VCVTPD2UDQZrmk\0" |
| 51082 | /* 106777 */ "VCVTTPH2UDQZrmk\0" |
| 51083 | /* 106793 */ "VCVTPH2UDQZrmk\0" |
| 51084 | /* 106808 */ "VCVTTPS2UDQZrmk\0" |
| 51085 | /* 106824 */ "VCVTPS2UDQZrmk\0" |
| 51086 | /* 106839 */ "VPMULUDQZrmk\0" |
| 51087 | /* 106852 */ "VPMOVSXDQZrmk\0" |
| 51088 | /* 106866 */ "VPMOVZXDQZrmk\0" |
| 51089 | /* 106880 */ "VPSLLQZrmk\0" |
| 51090 | /* 106891 */ "VPMULLQZrmk\0" |
| 51091 | /* 106903 */ "VPSRLQZrmk\0" |
| 51092 | /* 106914 */ "VPBLENDMQZrmk\0" |
| 51093 | /* 106928 */ "VPTESTNMQZrmk\0" |
| 51094 | /* 106942 */ "VPERMQZrmk\0" |
| 51095 | /* 106953 */ "VPTESTMQZrmk\0" |
| 51096 | /* 106966 */ "VPANDNQZrmk\0" |
| 51097 | /* 106978 */ "VCVTTPD2QQZrmk\0" |
| 51098 | /* 106993 */ "VCVTPD2QQZrmk\0" |
| 51099 | /* 107007 */ "VCVTTPH2QQZrmk\0" |
| 51100 | /* 107022 */ "VCVTPH2QQZrmk\0" |
| 51101 | /* 107036 */ "VCVTTPS2QQZrmk\0" |
| 51102 | /* 107051 */ "VCVTPS2QQZrmk\0" |
| 51103 | /* 107065 */ "VPCMPEQQZrmk\0" |
| 51104 | /* 107078 */ "VCVTTPD2UQQZrmk\0" |
| 51105 | /* 107094 */ "VCVTPD2UQQZrmk\0" |
| 51106 | /* 107109 */ "VCVTTPH2UQQZrmk\0" |
| 51107 | /* 107125 */ "VCVTPH2UQQZrmk\0" |
| 51108 | /* 107140 */ "VCVTTPS2UQQZrmk\0" |
| 51109 | /* 107156 */ "VCVTPS2UQQZrmk\0" |
| 51110 | /* 107171 */ "VPORQZrmk\0" |
| 51111 | /* 107181 */ "VPXORQZrmk\0" |
| 51112 | /* 107192 */ "VPABSQZrmk\0" |
| 51113 | /* 107203 */ "VPMINSQZrmk\0" |
| 51114 | /* 107215 */ "VPMAXSQZrmk\0" |
| 51115 | /* 107227 */ "VPCONFLICTQZrmk\0" |
| 51116 | /* 107243 */ "VPCMPGTQZrmk\0" |
| 51117 | /* 107256 */ "VPOPCNTQZrmk\0" |
| 51118 | /* 107269 */ "VPLZCNTQZrmk\0" |
| 51119 | /* 107282 */ "VPBROADCASTQZrmk\0" |
| 51120 | /* 107299 */ "VPMINUQZrmk\0" |
| 51121 | /* 107311 */ "VPMAXUQZrmk\0" |
| 51122 | /* 107323 */ "VPSRAVQZrmk\0" |
| 51123 | /* 107335 */ "VPSLLVQZrmk\0" |
| 51124 | /* 107347 */ "VPROLVQZrmk\0" |
| 51125 | /* 107359 */ "VPSRLVQZrmk\0" |
| 51126 | /* 107371 */ "VPRORVQZrmk\0" |
| 51127 | /* 107383 */ "VPMOVSXWQZrmk\0" |
| 51128 | /* 107397 */ "VPMOVZXWQZrmk\0" |
| 51129 | /* 107411 */ "VCVTPD2PSZrmk\0" |
| 51130 | /* 107425 */ "VCVTPH2PSZrmk\0" |
| 51131 | /* 107439 */ "VPERMI2PSZrmk\0" |
| 51132 | /* 107453 */ "VCVTDQ2PSZrmk\0" |
| 51133 | /* 107467 */ "VCVTUDQ2PSZrmk\0" |
| 51134 | /* 107482 */ "VCVTQQ2PSZrmk\0" |
| 51135 | /* 107496 */ "VCVTUQQ2PSZrmk\0" |
| 51136 | /* 107511 */ "VPERMT2PSZrmk\0" |
| 51137 | /* 107525 */ "VMOVAPSZrmk\0" |
| 51138 | /* 107537 */ "VSUBPSZrmk\0" |
| 51139 | /* 107548 */ "VMINCPSZrmk\0" |
| 51140 | /* 107560 */ "VMAXCPSZrmk\0" |
| 51141 | /* 107572 */ "VADDPSZrmk\0" |
| 51142 | /* 107583 */ "VEXPANDPSZrmk\0" |
| 51143 | /* 107597 */ "VANDPSZrmk\0" |
| 51144 | /* 107608 */ "VSCALEFPSZrmk\0" |
| 51145 | /* 107622 */ "VUNPCKHPSZrmk\0" |
| 51146 | /* 107636 */ "VPERMILPSZrmk\0" |
| 51147 | /* 107650 */ "VUNPCKLPSZrmk\0" |
| 51148 | /* 107664 */ "VMULPSZrmk\0" |
| 51149 | /* 107675 */ "VBLENDMPSZrmk\0" |
| 51150 | /* 107689 */ "VPERMPSZrmk\0" |
| 51151 | /* 107701 */ "VANDNPSZrmk\0" |
| 51152 | /* 107713 */ "VMINPSZrmk\0" |
| 51153 | /* 107724 */ "VORPSZrmk\0" |
| 51154 | /* 107734 */ "VXORPSZrmk\0" |
| 51155 | /* 107745 */ "VFPCLASSPSZrmk\0" |
| 51156 | /* 107760 */ "VMOVUPSZrmk\0" |
| 51157 | /* 107772 */ "VDIVPSZrmk\0" |
| 51158 | /* 107783 */ "VMAXPSZrmk\0" |
| 51159 | /* 107794 */ "VRCP14SSZrmk\0" |
| 51160 | /* 107807 */ "VRSQRT14SSZrmk\0" |
| 51161 | /* 107822 */ "VSCALEFSSZrmk\0" |
| 51162 | /* 107836 */ "VFPCLASSSSZrmk\0" |
| 51163 | /* 107851 */ "VBROADCASTSSZrmk\0" |
| 51164 | /* 107868 */ "VMOVSSZrmk\0" |
| 51165 | /* 107879 */ "VCVTTPH2WZrmk\0" |
| 51166 | /* 107893 */ "VCVTPH2WZrmk\0" |
| 51167 | /* 107906 */ "VPERMI2WZrmk\0" |
| 51168 | /* 107919 */ "VPERMT2WZrmk\0" |
| 51169 | /* 107932 */ "VPSRAWZrmk\0" |
| 51170 | /* 107943 */ "VPUNPCKHBWZrmk\0" |
| 51171 | /* 107958 */ "VPUNPCKLBWZrmk\0" |
| 51172 | /* 107973 */ "VPSUBWZrmk\0" |
| 51173 | /* 107984 */ "VPMOVSXBWZrmk\0" |
| 51174 | /* 107998 */ "VPMOVZXBWZrmk\0" |
| 51175 | /* 108012 */ "VPADDWZrmk\0" |
| 51176 | /* 108023 */ "VPEXPANDWZrmk\0" |
| 51177 | /* 108037 */ "VPACKSSDWZrmk\0" |
| 51178 | /* 108051 */ "VPACKUSDWZrmk\0" |
| 51179 | /* 108065 */ "VPAVGWZrmk\0" |
| 51180 | /* 108076 */ "VPMULHWZrmk\0" |
| 51181 | /* 108088 */ "VPSLLWZrmk\0" |
| 51182 | /* 108099 */ "VPMULLWZrmk\0" |
| 51183 | /* 108111 */ "VPSRLWZrmk\0" |
| 51184 | /* 108122 */ "VPBLENDMWZrmk\0" |
| 51185 | /* 108136 */ "VPTESTNMWZrmk\0" |
| 51186 | /* 108150 */ "VPERMWZrmk\0" |
| 51187 | /* 108161 */ "VPTESTMWZrmk\0" |
| 51188 | /* 108174 */ "VPCMPEQWZrmk\0" |
| 51189 | /* 108187 */ "VPABSWZrmk\0" |
| 51190 | /* 108198 */ "VPMADDUBSWZrmk\0" |
| 51191 | /* 108213 */ "VPSUBSWZrmk\0" |
| 51192 | /* 108225 */ "VPADDSWZrmk\0" |
| 51193 | /* 108237 */ "VPMINSWZrmk\0" |
| 51194 | /* 108249 */ "VPMULHRSWZrmk\0" |
| 51195 | /* 108263 */ "VPSUBUSWZrmk\0" |
| 51196 | /* 108276 */ "VPADDUSWZrmk\0" |
| 51197 | /* 108289 */ "VPMAXSWZrmk\0" |
| 51198 | /* 108301 */ "VPCMPGTWZrmk\0" |
| 51199 | /* 108314 */ "VPOPCNTWZrmk\0" |
| 51200 | /* 108327 */ "VPBROADCASTWZrmk\0" |
| 51201 | /* 108344 */ "VCVTTPH2UWZrmk\0" |
| 51202 | /* 108359 */ "VCVTPH2UWZrmk\0" |
| 51203 | /* 108373 */ "VPMULHUWZrmk\0" |
| 51204 | /* 108386 */ "VPMINUWZrmk\0" |
| 51205 | /* 108398 */ "VPMAXUWZrmk\0" |
| 51206 | /* 108410 */ "VPSRAVWZrmk\0" |
| 51207 | /* 108422 */ "VPSLLVWZrmk\0" |
| 51208 | /* 108434 */ "VPSRLVWZrmk\0" |
| 51209 | /* 108446 */ "VCVTPS2PHXZrmk\0" |
| 51210 | /* 108461 */ "VCVTPH2PSXZrmk\0" |
| 51211 | /* 108476 */ "VFMADDSUB231PDZ256rk\0" |
| 51212 | /* 108497 */ "VFMSUB231PDZ256rk\0" |
| 51213 | /* 108515 */ "VFNMSUB231PDZ256rk\0" |
| 51214 | /* 108534 */ "VFMSUBADD231PDZ256rk\0" |
| 51215 | /* 108555 */ "VFMADD231PDZ256rk\0" |
| 51216 | /* 108573 */ "VFNMADD231PDZ256rk\0" |
| 51217 | /* 108592 */ "VFMADDSUB132PDZ256rk\0" |
| 51218 | /* 108613 */ "VFMSUB132PDZ256rk\0" |
| 51219 | /* 108631 */ "VFNMSUB132PDZ256rk\0" |
| 51220 | /* 108650 */ "VFMSUBADD132PDZ256rk\0" |
| 51221 | /* 108671 */ "VFMADD132PDZ256rk\0" |
| 51222 | /* 108689 */ "VFNMADD132PDZ256rk\0" |
| 51223 | /* 108708 */ "VFMADDSUB213PDZ256rk\0" |
| 51224 | /* 108729 */ "VFMSUB213PDZ256rk\0" |
| 51225 | /* 108747 */ "VFNMSUB213PDZ256rk\0" |
| 51226 | /* 108766 */ "VFMSUBADD213PDZ256rk\0" |
| 51227 | /* 108787 */ "VFMADD213PDZ256rk\0" |
| 51228 | /* 108805 */ "VFNMADD213PDZ256rk\0" |
| 51229 | /* 108824 */ "VRCP14PDZ256rk\0" |
| 51230 | /* 108839 */ "VRSQRT14PDZ256rk\0" |
| 51231 | /* 108856 */ "VGETEXPPDZ256rk\0" |
| 51232 | /* 108872 */ "VSQRTPDZ256rk\0" |
| 51233 | /* 108886 */ "VPDPWSSDZ256rk\0" |
| 51234 | /* 108901 */ "VPDPBUSDZ256rk\0" |
| 51235 | /* 108916 */ "VPSHLDVDZ256rk\0" |
| 51236 | /* 108931 */ "VPSHRDVDZ256rk\0" |
| 51237 | /* 108946 */ "VFMADDSUB231PHZ256rk\0" |
| 51238 | /* 108967 */ "VFMSUB231PHZ256rk\0" |
| 51239 | /* 108985 */ "VFNMSUB231PHZ256rk\0" |
| 51240 | /* 109004 */ "VFMSUBADD231PHZ256rk\0" |
| 51241 | /* 109025 */ "VFMADD231PHZ256rk\0" |
| 51242 | /* 109043 */ "VFNMADD231PHZ256rk\0" |
| 51243 | /* 109062 */ "VFMADDSUB132PHZ256rk\0" |
| 51244 | /* 109083 */ "VFMSUB132PHZ256rk\0" |
| 51245 | /* 109101 */ "VFNMSUB132PHZ256rk\0" |
| 51246 | /* 109120 */ "VFMSUBADD132PHZ256rk\0" |
| 51247 | /* 109141 */ "VFMADD132PHZ256rk\0" |
| 51248 | /* 109159 */ "VFNMADD132PHZ256rk\0" |
| 51249 | /* 109178 */ "VFMADDSUB213PHZ256rk\0" |
| 51250 | /* 109199 */ "VFMSUB213PHZ256rk\0" |
| 51251 | /* 109217 */ "VFNMSUB213PHZ256rk\0" |
| 51252 | /* 109236 */ "VFMSUBADD213PHZ256rk\0" |
| 51253 | /* 109257 */ "VFMADD213PHZ256rk\0" |
| 51254 | /* 109275 */ "VFNMADD213PHZ256rk\0" |
| 51255 | /* 109294 */ "VFCMADDCPHZ256rk\0" |
| 51256 | /* 109311 */ "VFMADDCPHZ256rk\0" |
| 51257 | /* 109327 */ "VRCPPHZ256rk\0" |
| 51258 | /* 109340 */ "VGETEXPPHZ256rk\0" |
| 51259 | /* 109356 */ "VRSQRTPHZ256rk\0" |
| 51260 | /* 109371 */ "VSQRTPHZ256rk\0" |
| 51261 | /* 109385 */ "VPMADD52HUQZ256rk\0" |
| 51262 | /* 109403 */ "VPMADD52LUQZ256rk\0" |
| 51263 | /* 109421 */ "VPSHLDVQZ256rk\0" |
| 51264 | /* 109436 */ "VPSHRDVQZ256rk\0" |
| 51265 | /* 109451 */ "VPDPWSSDSZ256rk\0" |
| 51266 | /* 109467 */ "VPDPBUSDSZ256rk\0" |
| 51267 | /* 109483 */ "VFMADDSUB231PSZ256rk\0" |
| 51268 | /* 109504 */ "VFMSUB231PSZ256rk\0" |
| 51269 | /* 109522 */ "VFNMSUB231PSZ256rk\0" |
| 51270 | /* 109541 */ "VFMSUBADD231PSZ256rk\0" |
| 51271 | /* 109562 */ "VFMADD231PSZ256rk\0" |
| 51272 | /* 109580 */ "VFNMADD231PSZ256rk\0" |
| 51273 | /* 109599 */ "VFMADDSUB132PSZ256rk\0" |
| 51274 | /* 109620 */ "VFMSUB132PSZ256rk\0" |
| 51275 | /* 109638 */ "VFNMSUB132PSZ256rk\0" |
| 51276 | /* 109657 */ "VFMSUBADD132PSZ256rk\0" |
| 51277 | /* 109678 */ "VFMADD132PSZ256rk\0" |
| 51278 | /* 109696 */ "VFNMADD132PSZ256rk\0" |
| 51279 | /* 109715 */ "VFMADDSUB213PSZ256rk\0" |
| 51280 | /* 109736 */ "VFMSUB213PSZ256rk\0" |
| 51281 | /* 109754 */ "VFNMSUB213PSZ256rk\0" |
| 51282 | /* 109773 */ "VFMSUBADD213PSZ256rk\0" |
| 51283 | /* 109794 */ "VFMADD213PSZ256rk\0" |
| 51284 | /* 109812 */ "VFNMADD213PSZ256rk\0" |
| 51285 | /* 109831 */ "VRCP14PSZ256rk\0" |
| 51286 | /* 109846 */ "VRSQRT14PSZ256rk\0" |
| 51287 | /* 109863 */ "VDPBF16PSZ256rk\0" |
| 51288 | /* 109879 */ "VGETEXPPSZ256rk\0" |
| 51289 | /* 109895 */ "VSQRTPSZ256rk\0" |
| 51290 | /* 109909 */ "VPSHLDVWZ256rk\0" |
| 51291 | /* 109924 */ "VPSHRDVWZ256rk\0" |
| 51292 | /* 109939 */ "VFMADDSUB231PDZ128rk\0" |
| 51293 | /* 109960 */ "VFMSUB231PDZ128rk\0" |
| 51294 | /* 109978 */ "VFNMSUB231PDZ128rk\0" |
| 51295 | /* 109997 */ "VFMSUBADD231PDZ128rk\0" |
| 51296 | /* 110018 */ "VFMADD231PDZ128rk\0" |
| 51297 | /* 110036 */ "VFNMADD231PDZ128rk\0" |
| 51298 | /* 110055 */ "VFMADDSUB132PDZ128rk\0" |
| 51299 | /* 110076 */ "VFMSUB132PDZ128rk\0" |
| 51300 | /* 110094 */ "VFNMSUB132PDZ128rk\0" |
| 51301 | /* 110113 */ "VFMSUBADD132PDZ128rk\0" |
| 51302 | /* 110134 */ "VFMADD132PDZ128rk\0" |
| 51303 | /* 110152 */ "VFNMADD132PDZ128rk\0" |
| 51304 | /* 110171 */ "VFMADDSUB213PDZ128rk\0" |
| 51305 | /* 110192 */ "VFMSUB213PDZ128rk\0" |
| 51306 | /* 110210 */ "VFNMSUB213PDZ128rk\0" |
| 51307 | /* 110229 */ "VFMSUBADD213PDZ128rk\0" |
| 51308 | /* 110250 */ "VFMADD213PDZ128rk\0" |
| 51309 | /* 110268 */ "VFNMADD213PDZ128rk\0" |
| 51310 | /* 110287 */ "VRCP14PDZ128rk\0" |
| 51311 | /* 110302 */ "VRSQRT14PDZ128rk\0" |
| 51312 | /* 110319 */ "VGETEXPPDZ128rk\0" |
| 51313 | /* 110335 */ "VSQRTPDZ128rk\0" |
| 51314 | /* 110349 */ "VPDPWSSDZ128rk\0" |
| 51315 | /* 110364 */ "VPDPBUSDZ128rk\0" |
| 51316 | /* 110379 */ "VPSHLDVDZ128rk\0" |
| 51317 | /* 110394 */ "VPSHRDVDZ128rk\0" |
| 51318 | /* 110409 */ "VFMADDSUB231PHZ128rk\0" |
| 51319 | /* 110430 */ "VFMSUB231PHZ128rk\0" |
| 51320 | /* 110448 */ "VFNMSUB231PHZ128rk\0" |
| 51321 | /* 110467 */ "VFMSUBADD231PHZ128rk\0" |
| 51322 | /* 110488 */ "VFMADD231PHZ128rk\0" |
| 51323 | /* 110506 */ "VFNMADD231PHZ128rk\0" |
| 51324 | /* 110525 */ "VFMADDSUB132PHZ128rk\0" |
| 51325 | /* 110546 */ "VFMSUB132PHZ128rk\0" |
| 51326 | /* 110564 */ "VFNMSUB132PHZ128rk\0" |
| 51327 | /* 110583 */ "VFMSUBADD132PHZ128rk\0" |
| 51328 | /* 110604 */ "VFMADD132PHZ128rk\0" |
| 51329 | /* 110622 */ "VFNMADD132PHZ128rk\0" |
| 51330 | /* 110641 */ "VFMADDSUB213PHZ128rk\0" |
| 51331 | /* 110662 */ "VFMSUB213PHZ128rk\0" |
| 51332 | /* 110680 */ "VFNMSUB213PHZ128rk\0" |
| 51333 | /* 110699 */ "VFMSUBADD213PHZ128rk\0" |
| 51334 | /* 110720 */ "VFMADD213PHZ128rk\0" |
| 51335 | /* 110738 */ "VFNMADD213PHZ128rk\0" |
| 51336 | /* 110757 */ "VFCMADDCPHZ128rk\0" |
| 51337 | /* 110774 */ "VFMADDCPHZ128rk\0" |
| 51338 | /* 110790 */ "VRCPPHZ128rk\0" |
| 51339 | /* 110803 */ "VGETEXPPHZ128rk\0" |
| 51340 | /* 110819 */ "VRSQRTPHZ128rk\0" |
| 51341 | /* 110834 */ "VSQRTPHZ128rk\0" |
| 51342 | /* 110848 */ "VPMADD52HUQZ128rk\0" |
| 51343 | /* 110866 */ "VPMADD52LUQZ128rk\0" |
| 51344 | /* 110884 */ "VPSHLDVQZ128rk\0" |
| 51345 | /* 110899 */ "VPSHRDVQZ128rk\0" |
| 51346 | /* 110914 */ "VPDPWSSDSZ128rk\0" |
| 51347 | /* 110930 */ "VPDPBUSDSZ128rk\0" |
| 51348 | /* 110946 */ "VFMADDSUB231PSZ128rk\0" |
| 51349 | /* 110967 */ "VFMSUB231PSZ128rk\0" |
| 51350 | /* 110985 */ "VFNMSUB231PSZ128rk\0" |
| 51351 | /* 111004 */ "VFMSUBADD231PSZ128rk\0" |
| 51352 | /* 111025 */ "VFMADD231PSZ128rk\0" |
| 51353 | /* 111043 */ "VFNMADD231PSZ128rk\0" |
| 51354 | /* 111062 */ "VFMADDSUB132PSZ128rk\0" |
| 51355 | /* 111083 */ "VFMSUB132PSZ128rk\0" |
| 51356 | /* 111101 */ "VFNMSUB132PSZ128rk\0" |
| 51357 | /* 111120 */ "VFMSUBADD132PSZ128rk\0" |
| 51358 | /* 111141 */ "VFMADD132PSZ128rk\0" |
| 51359 | /* 111159 */ "VFNMADD132PSZ128rk\0" |
| 51360 | /* 111178 */ "VFMADDSUB213PSZ128rk\0" |
| 51361 | /* 111199 */ "VFMSUB213PSZ128rk\0" |
| 51362 | /* 111217 */ "VFNMSUB213PSZ128rk\0" |
| 51363 | /* 111236 */ "VFMSUBADD213PSZ128rk\0" |
| 51364 | /* 111257 */ "VFMADD213PSZ128rk\0" |
| 51365 | /* 111275 */ "VFNMADD213PSZ128rk\0" |
| 51366 | /* 111294 */ "VRCP14PSZ128rk\0" |
| 51367 | /* 111309 */ "VRSQRT14PSZ128rk\0" |
| 51368 | /* 111326 */ "VDPBF16PSZ128rk\0" |
| 51369 | /* 111342 */ "VGETEXPPSZ128rk\0" |
| 51370 | /* 111358 */ "VSQRTPSZ128rk\0" |
| 51371 | /* 111372 */ "VPSHLDVWZ128rk\0" |
| 51372 | /* 111387 */ "VPSHRDVWZ128rk\0" |
| 51373 | /* 111402 */ "KMOVBrk\0" |
| 51374 | /* 111410 */ "KMOVDrk\0" |
| 51375 | /* 111418 */ "KMOVQrk\0" |
| 51376 | /* 111426 */ "KMOVWrk\0" |
| 51377 | /* 111434 */ "VFMADDSUB231PDZrk\0" |
| 51378 | /* 111452 */ "VFMSUB231PDZrk\0" |
| 51379 | /* 111467 */ "VFNMSUB231PDZrk\0" |
| 51380 | /* 111483 */ "VFMSUBADD231PDZrk\0" |
| 51381 | /* 111501 */ "VFMADD231PDZrk\0" |
| 51382 | /* 111516 */ "VFNMADD231PDZrk\0" |
| 51383 | /* 111532 */ "VFMADDSUB132PDZrk\0" |
| 51384 | /* 111550 */ "VFMSUB132PDZrk\0" |
| 51385 | /* 111565 */ "VFNMSUB132PDZrk\0" |
| 51386 | /* 111581 */ "VFMSUBADD132PDZrk\0" |
| 51387 | /* 111599 */ "VFMADD132PDZrk\0" |
| 51388 | /* 111614 */ "VFNMADD132PDZrk\0" |
| 51389 | /* 111630 */ "VEXP2PDZrk\0" |
| 51390 | /* 111641 */ "VFMADDSUB213PDZrk\0" |
| 51391 | /* 111659 */ "VFMSUB213PDZrk\0" |
| 51392 | /* 111674 */ "VFNMSUB213PDZrk\0" |
| 51393 | /* 111690 */ "VFMSUBADD213PDZrk\0" |
| 51394 | /* 111708 */ "VFMADD213PDZrk\0" |
| 51395 | /* 111723 */ "VFNMADD213PDZrk\0" |
| 51396 | /* 111739 */ "VRCP14PDZrk\0" |
| 51397 | /* 111751 */ "VRSQRT14PDZrk\0" |
| 51398 | /* 111765 */ "VRCP28PDZrk\0" |
| 51399 | /* 111777 */ "VRSQRT28PDZrk\0" |
| 51400 | /* 111791 */ "VGETEXPPDZrk\0" |
| 51401 | /* 111804 */ "VSQRTPDZrk\0" |
| 51402 | /* 111815 */ "VRCP28SDZrk\0" |
| 51403 | /* 111827 */ "VRSQRT28SDZrk\0" |
| 51404 | /* 111841 */ "VGETEXPSDZrk\0" |
| 51405 | /* 111854 */ "VPDPWSSDZrk\0" |
| 51406 | /* 111866 */ "VPDPBUSDZrk\0" |
| 51407 | /* 111878 */ "VPSHLDVDZrk\0" |
| 51408 | /* 111890 */ "VPSHRDVDZrk\0" |
| 51409 | /* 111902 */ "VFMADDSUB231PHZrk\0" |
| 51410 | /* 111920 */ "VFMSUB231PHZrk\0" |
| 51411 | /* 111935 */ "VFNMSUB231PHZrk\0" |
| 51412 | /* 111951 */ "VFMSUBADD231PHZrk\0" |
| 51413 | /* 111969 */ "VFMADD231PHZrk\0" |
| 51414 | /* 111984 */ "VFNMADD231PHZrk\0" |
| 51415 | /* 112000 */ "VFMADDSUB132PHZrk\0" |
| 51416 | /* 112018 */ "VFMSUB132PHZrk\0" |
| 51417 | /* 112033 */ "VFNMSUB132PHZrk\0" |
| 51418 | /* 112049 */ "VFMSUBADD132PHZrk\0" |
| 51419 | /* 112067 */ "VFMADD132PHZrk\0" |
| 51420 | /* 112082 */ "VFNMADD132PHZrk\0" |
| 51421 | /* 112098 */ "VFMADDSUB213PHZrk\0" |
| 51422 | /* 112116 */ "VFMSUB213PHZrk\0" |
| 51423 | /* 112131 */ "VFNMSUB213PHZrk\0" |
| 51424 | /* 112147 */ "VFMSUBADD213PHZrk\0" |
| 51425 | /* 112165 */ "VFMADD213PHZrk\0" |
| 51426 | /* 112180 */ "VFNMADD213PHZrk\0" |
| 51427 | /* 112196 */ "VFCMADDCPHZrk\0" |
| 51428 | /* 112210 */ "VFMADDCPHZrk\0" |
| 51429 | /* 112223 */ "VRCPPHZrk\0" |
| 51430 | /* 112233 */ "VGETEXPPHZrk\0" |
| 51431 | /* 112246 */ "VRSQRTPHZrk\0" |
| 51432 | /* 112258 */ "VSQRTPHZrk\0" |
| 51433 | /* 112269 */ "VFCMADDCSHZrk\0" |
| 51434 | /* 112283 */ "VFMADDCSHZrk\0" |
| 51435 | /* 112296 */ "VGETEXPSHZrk\0" |
| 51436 | /* 112309 */ "VPMADD52HUQZrk\0" |
| 51437 | /* 112324 */ "VPMADD52LUQZrk\0" |
| 51438 | /* 112339 */ "VPSHLDVQZrk\0" |
| 51439 | /* 112351 */ "VPSHRDVQZrk\0" |
| 51440 | /* 112363 */ "VPDPWSSDSZrk\0" |
| 51441 | /* 112376 */ "VPDPBUSDSZrk\0" |
| 51442 | /* 112389 */ "VFMADDSUB231PSZrk\0" |
| 51443 | /* 112407 */ "VFMSUB231PSZrk\0" |
| 51444 | /* 112422 */ "VFNMSUB231PSZrk\0" |
| 51445 | /* 112438 */ "VFMSUBADD231PSZrk\0" |
| 51446 | /* 112456 */ "VFMADD231PSZrk\0" |
| 51447 | /* 112471 */ "VFNMADD231PSZrk\0" |
| 51448 | /* 112487 */ "VFMADDSUB132PSZrk\0" |
| 51449 | /* 112505 */ "VFMSUB132PSZrk\0" |
| 51450 | /* 112520 */ "VFNMSUB132PSZrk\0" |
| 51451 | /* 112536 */ "VFMSUBADD132PSZrk\0" |
| 51452 | /* 112554 */ "VFMADD132PSZrk\0" |
| 51453 | /* 112569 */ "VFNMADD132PSZrk\0" |
| 51454 | /* 112585 */ "VEXP2PSZrk\0" |
| 51455 | /* 112596 */ "VFMADDSUB213PSZrk\0" |
| 51456 | /* 112614 */ "VFMSUB213PSZrk\0" |
| 51457 | /* 112629 */ "VFNMSUB213PSZrk\0" |
| 51458 | /* 112645 */ "VFMSUBADD213PSZrk\0" |
| 51459 | /* 112663 */ "VFMADD213PSZrk\0" |
| 51460 | /* 112678 */ "VFNMADD213PSZrk\0" |
| 51461 | /* 112694 */ "VRCP14PSZrk\0" |
| 51462 | /* 112706 */ "VRSQRT14PSZrk\0" |
| 51463 | /* 112720 */ "VDPBF16PSZrk\0" |
| 51464 | /* 112733 */ "VRCP28PSZrk\0" |
| 51465 | /* 112745 */ "VRSQRT28PSZrk\0" |
| 51466 | /* 112759 */ "VGETEXPPSZrk\0" |
| 51467 | /* 112772 */ "VSQRTPSZrk\0" |
| 51468 | /* 112783 */ "VRCP28SSZrk\0" |
| 51469 | /* 112795 */ "VRSQRT28SSZrk\0" |
| 51470 | /* 112809 */ "VGETEXPSSZrk\0" |
| 51471 | /* 112822 */ "VPSHLDVWZrk\0" |
| 51472 | /* 112834 */ "VPSHRDVWZrk\0" |
| 51473 | /* 112846 */ "VMOVDQA32Z256mrk\0" |
| 51474 | /* 112863 */ "VMOVDQU32Z256mrk\0" |
| 51475 | /* 112880 */ "VEXTRACTF64x2Z256mrk\0" |
| 51476 | /* 112901 */ "VEXTRACTI64x2Z256mrk\0" |
| 51477 | /* 112922 */ "VMOVDQA64Z256mrk\0" |
| 51478 | /* 112939 */ "VMOVDQU64Z256mrk\0" |
| 51479 | /* 112956 */ "VEXTRACTF32x4Z256mrk\0" |
| 51480 | /* 112977 */ "VEXTRACTI32x4Z256mrk\0" |
| 51481 | /* 112998 */ "VMOVDQU16Z256mrk\0" |
| 51482 | /* 113015 */ "VMOVDQU8Z256mrk\0" |
| 51483 | /* 113031 */ "VPMOVUSDBZ256mrk\0" |
| 51484 | /* 113048 */ "VPMOVSDBZ256mrk\0" |
| 51485 | /* 113064 */ "VPMOVDBZ256mrk\0" |
| 51486 | /* 113079 */ "VPMOVUSQBZ256mrk\0" |
| 51487 | /* 113096 */ "VPMOVSQBZ256mrk\0" |
| 51488 | /* 113112 */ "VPMOVQBZ256mrk\0" |
| 51489 | /* 113127 */ "VPCOMPRESSBZ256mrk\0" |
| 51490 | /* 113146 */ "VPMOVUSWBZ256mrk\0" |
| 51491 | /* 113163 */ "VPMOVSWBZ256mrk\0" |
| 51492 | /* 113179 */ "VPMOVWBZ256mrk\0" |
| 51493 | /* 113194 */ "VMOVAPDZ256mrk\0" |
| 51494 | /* 113209 */ "VCOMPRESSPDZ256mrk\0" |
| 51495 | /* 113228 */ "VMOVUPDZ256mrk\0" |
| 51496 | /* 113243 */ "VPMOVUSQDZ256mrk\0" |
| 51497 | /* 113260 */ "VPMOVSQDZ256mrk\0" |
| 51498 | /* 113276 */ "VPMOVQDZ256mrk\0" |
| 51499 | /* 113291 */ "VPCOMPRESSDZ256mrk\0" |
| 51500 | /* 113310 */ "VCVTPS2PHZ256mrk\0" |
| 51501 | /* 113327 */ "VPCOMPRESSQZ256mrk\0" |
| 51502 | /* 113346 */ "VMOVAPSZ256mrk\0" |
| 51503 | /* 113361 */ "VCOMPRESSPSZ256mrk\0" |
| 51504 | /* 113380 */ "VMOVUPSZ256mrk\0" |
| 51505 | /* 113395 */ "VPMOVUSDWZ256mrk\0" |
| 51506 | /* 113412 */ "VPMOVSDWZ256mrk\0" |
| 51507 | /* 113428 */ "VPMOVDWZ256mrk\0" |
| 51508 | /* 113443 */ "VPMOVUSQWZ256mrk\0" |
| 51509 | /* 113460 */ "VPMOVSQWZ256mrk\0" |
| 51510 | /* 113476 */ "VPMOVQWZ256mrk\0" |
| 51511 | /* 113491 */ "VPCOMPRESSWZ256mrk\0" |
| 51512 | /* 113510 */ "VMOVDQA32Z128mrk\0" |
| 51513 | /* 113527 */ "VMOVDQU32Z128mrk\0" |
| 51514 | /* 113544 */ "VMOVDQA64Z128mrk\0" |
| 51515 | /* 113561 */ "VMOVDQU64Z128mrk\0" |
| 51516 | /* 113578 */ "VMOVDQU16Z128mrk\0" |
| 51517 | /* 113595 */ "VMOVDQU8Z128mrk\0" |
| 51518 | /* 113611 */ "VPMOVUSDBZ128mrk\0" |
| 51519 | /* 113628 */ "VPMOVSDBZ128mrk\0" |
| 51520 | /* 113644 */ "VPMOVDBZ128mrk\0" |
| 51521 | /* 113659 */ "VPMOVUSQBZ128mrk\0" |
| 51522 | /* 113676 */ "VPMOVSQBZ128mrk\0" |
| 51523 | /* 113692 */ "VPMOVQBZ128mrk\0" |
| 51524 | /* 113707 */ "VPCOMPRESSBZ128mrk\0" |
| 51525 | /* 113726 */ "VPMOVUSWBZ128mrk\0" |
| 51526 | /* 113743 */ "VPMOVSWBZ128mrk\0" |
| 51527 | /* 113759 */ "VPMOVWBZ128mrk\0" |
| 51528 | /* 113774 */ "VMOVAPDZ128mrk\0" |
| 51529 | /* 113789 */ "VCOMPRESSPDZ128mrk\0" |
| 51530 | /* 113808 */ "VMOVUPDZ128mrk\0" |
| 51531 | /* 113823 */ "VPMOVUSQDZ128mrk\0" |
| 51532 | /* 113840 */ "VPMOVSQDZ128mrk\0" |
| 51533 | /* 113856 */ "VPMOVQDZ128mrk\0" |
| 51534 | /* 113871 */ "VPCOMPRESSDZ128mrk\0" |
| 51535 | /* 113890 */ "VCVTPS2PHZ128mrk\0" |
| 51536 | /* 113907 */ "VPCOMPRESSQZ128mrk\0" |
| 51537 | /* 113926 */ "VMOVAPSZ128mrk\0" |
| 51538 | /* 113941 */ "VCOMPRESSPSZ128mrk\0" |
| 51539 | /* 113960 */ "VMOVUPSZ128mrk\0" |
| 51540 | /* 113975 */ "VPMOVUSDWZ128mrk\0" |
| 51541 | /* 113992 */ "VPMOVSDWZ128mrk\0" |
| 51542 | /* 114008 */ "VPMOVDWZ128mrk\0" |
| 51543 | /* 114023 */ "VPMOVUSQWZ128mrk\0" |
| 51544 | /* 114040 */ "VPMOVSQWZ128mrk\0" |
| 51545 | /* 114056 */ "VPMOVQWZ128mrk\0" |
| 51546 | /* 114071 */ "VPCOMPRESSWZ128mrk\0" |
| 51547 | /* 114090 */ "VMOVDQA32Zmrk\0" |
| 51548 | /* 114104 */ "VMOVDQU32Zmrk\0" |
| 51549 | /* 114118 */ "VEXTRACTF64x2Zmrk\0" |
| 51550 | /* 114136 */ "VEXTRACTI64x2Zmrk\0" |
| 51551 | /* 114154 */ "VMOVDQA64Zmrk\0" |
| 51552 | /* 114168 */ "VMOVDQU64Zmrk\0" |
| 51553 | /* 114182 */ "VEXTRACTF32x4Zmrk\0" |
| 51554 | /* 114200 */ "VEXTRACTI32x4Zmrk\0" |
| 51555 | /* 114218 */ "VEXTRACTF64x4Zmrk\0" |
| 51556 | /* 114236 */ "VEXTRACTI64x4Zmrk\0" |
| 51557 | /* 114254 */ "VMOVDQU16Zmrk\0" |
| 51558 | /* 114268 */ "VMOVDQU8Zmrk\0" |
| 51559 | /* 114281 */ "VEXTRACTF32x8Zmrk\0" |
| 51560 | /* 114299 */ "VEXTRACTI32x8Zmrk\0" |
| 51561 | /* 114317 */ "VPMOVUSDBZmrk\0" |
| 51562 | /* 114331 */ "VPMOVSDBZmrk\0" |
| 51563 | /* 114344 */ "VPMOVDBZmrk\0" |
| 51564 | /* 114356 */ "VPMOVUSQBZmrk\0" |
| 51565 | /* 114370 */ "VPMOVSQBZmrk\0" |
| 51566 | /* 114383 */ "VPMOVQBZmrk\0" |
| 51567 | /* 114395 */ "VPCOMPRESSBZmrk\0" |
| 51568 | /* 114411 */ "VPMOVUSWBZmrk\0" |
| 51569 | /* 114425 */ "VPMOVSWBZmrk\0" |
| 51570 | /* 114438 */ "VPMOVWBZmrk\0" |
| 51571 | /* 114450 */ "VMOVAPDZmrk\0" |
| 51572 | /* 114462 */ "VCOMPRESSPDZmrk\0" |
| 51573 | /* 114478 */ "VMOVUPDZmrk\0" |
| 51574 | /* 114490 */ "VPMOVUSQDZmrk\0" |
| 51575 | /* 114504 */ "VPMOVSQDZmrk\0" |
| 51576 | /* 114517 */ "VPMOVQDZmrk\0" |
| 51577 | /* 114529 */ "VPCOMPRESSDZmrk\0" |
| 51578 | /* 114545 */ "VMOVSDZmrk\0" |
| 51579 | /* 114556 */ "VCVTPS2PHZmrk\0" |
| 51580 | /* 114570 */ "VMOVSHZmrk\0" |
| 51581 | /* 114581 */ "VPCOMPRESSQZmrk\0" |
| 51582 | /* 114597 */ "VMOVAPSZmrk\0" |
| 51583 | /* 114609 */ "VCOMPRESSPSZmrk\0" |
| 51584 | /* 114625 */ "VMOVUPSZmrk\0" |
| 51585 | /* 114637 */ "VMOVSSZmrk\0" |
| 51586 | /* 114648 */ "VPMOVUSDWZmrk\0" |
| 51587 | /* 114662 */ "VPMOVSDWZmrk\0" |
| 51588 | /* 114675 */ "VPMOVDWZmrk\0" |
| 51589 | /* 114687 */ "VPMOVUSQWZmrk\0" |
| 51590 | /* 114701 */ "VPMOVSQWZmrk\0" |
| 51591 | /* 114714 */ "VPMOVQWZmrk\0" |
| 51592 | /* 114726 */ "VPCOMPRESSWZmrk\0" |
| 51593 | /* 114742 */ "VMOVDQA32Z256rrk\0" |
| 51594 | /* 114759 */ "VMOVDQU32Z256rrk\0" |
| 51595 | /* 114776 */ "VBROADCASTF32X2Z256rrk\0" |
| 51596 | /* 114799 */ "VBROADCASTI32X2Z256rrk\0" |
| 51597 | /* 114822 */ "VEXTRACTF64x2Z256rrk\0" |
| 51598 | /* 114843 */ "VINSERTF64x2Z256rrk\0" |
| 51599 | /* 114863 */ "VEXTRACTI64x2Z256rrk\0" |
| 51600 | /* 114884 */ "VINSERTI64x2Z256rrk\0" |
| 51601 | /* 114904 */ "VMOVDQA64Z256rrk\0" |
| 51602 | /* 114921 */ "VMOVDQU64Z256rrk\0" |
| 51603 | /* 114938 */ "VEXTRACTF32x4Z256rrk\0" |
| 51604 | /* 114959 */ "VINSERTF32x4Z256rrk\0" |
| 51605 | /* 114979 */ "VEXTRACTI32x4Z256rrk\0" |
| 51606 | /* 115000 */ "VINSERTI32x4Z256rrk\0" |
| 51607 | /* 115020 */ "VCVTNE2PS2BF16Z256rrk\0" |
| 51608 | /* 115042 */ "VCVTNEPS2BF16Z256rrk\0" |
| 51609 | /* 115063 */ "VMOVDQU16Z256rrk\0" |
| 51610 | /* 115080 */ "VMOVDQU8Z256rrk\0" |
| 51611 | /* 115096 */ "VPERMI2BZ256rrk\0" |
| 51612 | /* 115112 */ "VPERMT2BZ256rrk\0" |
| 51613 | /* 115128 */ "VPSUBBZ256rrk\0" |
| 51614 | /* 115142 */ "VPADDBZ256rrk\0" |
| 51615 | /* 115156 */ "VPEXPANDBZ256rrk\0" |
| 51616 | /* 115173 */ "VPMOVUSDBZ256rrk\0" |
| 51617 | /* 115190 */ "VPMOVSDBZ256rrk\0" |
| 51618 | /* 115206 */ "VPMOVDBZ256rrk\0" |
| 51619 | /* 115221 */ "VPSHUFBZ256rrk\0" |
| 51620 | /* 115236 */ "VPAVGBZ256rrk\0" |
| 51621 | /* 115250 */ "VGF2P8MULBZ256rrk\0" |
| 51622 | /* 115268 */ "VPBLENDMBZ256rrk\0" |
| 51623 | /* 115285 */ "VPTESTNMBZ256rrk\0" |
| 51624 | /* 115302 */ "VPSHUFBITQMBZ256rrk\0" |
| 51625 | /* 115322 */ "VPERMBZ256rrk\0" |
| 51626 | /* 115336 */ "VPTESTMBZ256rrk\0" |
| 51627 | /* 115352 */ "VPCMPEQBZ256rrk\0" |
| 51628 | /* 115368 */ "VPMOVUSQBZ256rrk\0" |
| 51629 | /* 115385 */ "VPMOVSQBZ256rrk\0" |
| 51630 | /* 115401 */ "VPMULTISHIFTQBZ256rrk\0" |
| 51631 | /* 115423 */ "VPMOVQBZ256rrk\0" |
| 51632 | /* 115438 */ "VPABSBZ256rrk\0" |
| 51633 | /* 115452 */ "VPSUBSBZ256rrk\0" |
| 51634 | /* 115467 */ "VPADDSBZ256rrk\0" |
| 51635 | /* 115482 */ "VPMINSBZ256rrk\0" |
| 51636 | /* 115497 */ "VPCOMPRESSBZ256rrk\0" |
| 51637 | /* 115516 */ "VPSUBUSBZ256rrk\0" |
| 51638 | /* 115532 */ "VPADDUSBZ256rrk\0" |
| 51639 | /* 115548 */ "VPMAXSBZ256rrk\0" |
| 51640 | /* 115563 */ "VPCMPGTBZ256rrk\0" |
| 51641 | /* 115579 */ "VPOPCNTBZ256rrk\0" |
| 51642 | /* 115595 */ "VPBROADCASTBZ256rrk\0" |
| 51643 | /* 115615 */ "VPMINUBZ256rrk\0" |
| 51644 | /* 115630 */ "VPMAXUBZ256rrk\0" |
| 51645 | /* 115645 */ "VPACKSSWBZ256rrk\0" |
| 51646 | /* 115662 */ "VPACKUSWBZ256rrk\0" |
| 51647 | /* 115679 */ "VPMOVUSWBZ256rrk\0" |
| 51648 | /* 115696 */ "VPMOVSWBZ256rrk\0" |
| 51649 | /* 115712 */ "VPMOVWBZ256rrk\0" |
| 51650 | /* 115727 */ "VPERMI2DZ256rrk\0" |
| 51651 | /* 115743 */ "VPERMT2DZ256rrk\0" |
| 51652 | /* 115759 */ "VPSRADZ256rrk\0" |
| 51653 | /* 115773 */ "VPSUBDZ256rrk\0" |
| 51654 | /* 115787 */ "VPMOVSXBDZ256rrk\0" |
| 51655 | /* 115804 */ "VPMOVZXBDZ256rrk\0" |
| 51656 | /* 115821 */ "VPADDDZ256rrk\0" |
| 51657 | /* 115835 */ "VPANDDZ256rrk\0" |
| 51658 | /* 115849 */ "VPEXPANDDZ256rrk\0" |
| 51659 | /* 115866 */ "VPSLLDZ256rrk\0" |
| 51660 | /* 115880 */ "VPMULLDZ256rrk\0" |
| 51661 | /* 115895 */ "VPSRLDZ256rrk\0" |
| 51662 | /* 115909 */ "VPBLENDMDZ256rrk\0" |
| 51663 | /* 115926 */ "VPTESTNMDZ256rrk\0" |
| 51664 | /* 115943 */ "VPERMDZ256rrk\0" |
| 51665 | /* 115957 */ "VPTESTMDZ256rrk\0" |
| 51666 | /* 115973 */ "VPANDNDZ256rrk\0" |
| 51667 | /* 115988 */ "VCVTPH2PDZ256rrk\0" |
| 51668 | /* 116005 */ "VPERMI2PDZ256rrk\0" |
| 51669 | /* 116022 */ "VCVTDQ2PDZ256rrk\0" |
| 51670 | /* 116039 */ "VCVTUDQ2PDZ256rrk\0" |
| 51671 | /* 116057 */ "VCVTQQ2PDZ256rrk\0" |
| 51672 | /* 116074 */ "VCVTUQQ2PDZ256rrk\0" |
| 51673 | /* 116092 */ "VCVTPS2PDZ256rrk\0" |
| 51674 | /* 116109 */ "VPERMT2PDZ256rrk\0" |
| 51675 | /* 116126 */ "VMOVAPDZ256rrk\0" |
| 51676 | /* 116141 */ "VSUBPDZ256rrk\0" |
| 51677 | /* 116155 */ "VMINCPDZ256rrk\0" |
| 51678 | /* 116170 */ "VMAXCPDZ256rrk\0" |
| 51679 | /* 116185 */ "VADDPDZ256rrk\0" |
| 51680 | /* 116199 */ "VEXPANDPDZ256rrk\0" |
| 51681 | /* 116216 */ "VANDPDZ256rrk\0" |
| 51682 | /* 116230 */ "VSCALEFPDZ256rrk\0" |
| 51683 | /* 116247 */ "VUNPCKHPDZ256rrk\0" |
| 51684 | /* 116264 */ "VPERMILPDZ256rrk\0" |
| 51685 | /* 116281 */ "VUNPCKLPDZ256rrk\0" |
| 51686 | /* 116298 */ "VMULPDZ256rrk\0" |
| 51687 | /* 116312 */ "VBLENDMPDZ256rrk\0" |
| 51688 | /* 116329 */ "VPERMPDZ256rrk\0" |
| 51689 | /* 116344 */ "VANDNPDZ256rrk\0" |
| 51690 | /* 116359 */ "VMINPDZ256rrk\0" |
| 51691 | /* 116373 */ "VORPDZ256rrk\0" |
| 51692 | /* 116386 */ "VXORPDZ256rrk\0" |
| 51693 | /* 116400 */ "VFPCLASSPDZ256rrk\0" |
| 51694 | /* 116418 */ "VCOMPRESSPDZ256rrk\0" |
| 51695 | /* 116437 */ "VMOVUPDZ256rrk\0" |
| 51696 | /* 116452 */ "VDIVPDZ256rrk\0" |
| 51697 | /* 116466 */ "VMAXPDZ256rrk\0" |
| 51698 | /* 116480 */ "VPCMPEQDZ256rrk\0" |
| 51699 | /* 116496 */ "VPMOVUSQDZ256rrk\0" |
| 51700 | /* 116513 */ "VPMOVSQDZ256rrk\0" |
| 51701 | /* 116529 */ "VPMOVQDZ256rrk\0" |
| 51702 | /* 116544 */ "VPORDZ256rrk\0" |
| 51703 | /* 116557 */ "VPXORDZ256rrk\0" |
| 51704 | /* 116571 */ "VPABSDZ256rrk\0" |
| 51705 | /* 116585 */ "VPMINSDZ256rrk\0" |
| 51706 | /* 116600 */ "VPCOMPRESSDZ256rrk\0" |
| 51707 | /* 116619 */ "VBROADCASTSDZ256rrk\0" |
| 51708 | /* 116639 */ "VPMAXSDZ256rrk\0" |
| 51709 | /* 116654 */ "VPCONFLICTDZ256rrk\0" |
| 51710 | /* 116673 */ "VPCMPGTDZ256rrk\0" |
| 51711 | /* 116689 */ "VPOPCNTDZ256rrk\0" |
| 51712 | /* 116705 */ "VPLZCNTDZ256rrk\0" |
| 51713 | /* 116721 */ "VPBROADCASTDZ256rrk\0" |
| 51714 | /* 116741 */ "VPMINUDZ256rrk\0" |
| 51715 | /* 116756 */ "VPMAXUDZ256rrk\0" |
| 51716 | /* 116771 */ "VPSRAVDZ256rrk\0" |
| 51717 | /* 116786 */ "VPSLLVDZ256rrk\0" |
| 51718 | /* 116801 */ "VPROLVDZ256rrk\0" |
| 51719 | /* 116816 */ "VPSRLVDZ256rrk\0" |
| 51720 | /* 116831 */ "VPRORVDZ256rrk\0" |
| 51721 | /* 116846 */ "VPMADDWDZ256rrk\0" |
| 51722 | /* 116862 */ "VPUNPCKHWDZ256rrk\0" |
| 51723 | /* 116880 */ "VPUNPCKLWDZ256rrk\0" |
| 51724 | /* 116898 */ "VPMOVSXWDZ256rrk\0" |
| 51725 | /* 116915 */ "VPMOVZXWDZ256rrk\0" |
| 51726 | /* 116932 */ "VCVTPD2PHZ256rrk\0" |
| 51727 | /* 116949 */ "VCVTDQ2PHZ256rrk\0" |
| 51728 | /* 116966 */ "VCVTUDQ2PHZ256rrk\0" |
| 51729 | /* 116984 */ "VCVTQQ2PHZ256rrk\0" |
| 51730 | /* 117001 */ "VCVTUQQ2PHZ256rrk\0" |
| 51731 | /* 117019 */ "VCVTPS2PHZ256rrk\0" |
| 51732 | /* 117036 */ "VCVTW2PHZ256rrk\0" |
| 51733 | /* 117052 */ "VCVTUW2PHZ256rrk\0" |
| 51734 | /* 117069 */ "VSUBPHZ256rrk\0" |
| 51735 | /* 117083 */ "VFCMULCPHZ256rrk\0" |
| 51736 | /* 117100 */ "VFMULCPHZ256rrk\0" |
| 51737 | /* 117116 */ "VMINCPHZ256rrk\0" |
| 51738 | /* 117131 */ "VMAXCPHZ256rrk\0" |
| 51739 | /* 117146 */ "VADDPHZ256rrk\0" |
| 51740 | /* 117160 */ "VSCALEFPHZ256rrk\0" |
| 51741 | /* 117177 */ "VMULPHZ256rrk\0" |
| 51742 | /* 117191 */ "VMINPHZ256rrk\0" |
| 51743 | /* 117205 */ "VFPCLASSPHZ256rrk\0" |
| 51744 | /* 117223 */ "VDIVPHZ256rrk\0" |
| 51745 | /* 117237 */ "VMAXPHZ256rrk\0" |
| 51746 | /* 117251 */ "VMOVDDUPZ256rrk\0" |
| 51747 | /* 117267 */ "VMOVSHDUPZ256rrk\0" |
| 51748 | /* 117284 */ "VMOVSLDUPZ256rrk\0" |
| 51749 | /* 117301 */ "VPERMI2QZ256rrk\0" |
| 51750 | /* 117317 */ "VPERMT2QZ256rrk\0" |
| 51751 | /* 117333 */ "VPSRAQZ256rrk\0" |
| 51752 | /* 117347 */ "VPSUBQZ256rrk\0" |
| 51753 | /* 117361 */ "VPMOVSXBQZ256rrk\0" |
| 51754 | /* 117378 */ "VPMOVZXBQZ256rrk\0" |
| 51755 | /* 117395 */ "VCVTTPD2DQZ256rrk\0" |
| 51756 | /* 117413 */ "VCVTPD2DQZ256rrk\0" |
| 51757 | /* 117430 */ "VCVTTPH2DQZ256rrk\0" |
| 51758 | /* 117448 */ "VCVTPH2DQZ256rrk\0" |
| 51759 | /* 117465 */ "VCVTTPS2DQZ256rrk\0" |
| 51760 | /* 117483 */ "VCVTPS2DQZ256rrk\0" |
| 51761 | /* 117500 */ "VPADDQZ256rrk\0" |
| 51762 | /* 117514 */ "VPUNPCKHDQZ256rrk\0" |
| 51763 | /* 117532 */ "VPUNPCKLDQZ256rrk\0" |
| 51764 | /* 117550 */ "VPMULDQZ256rrk\0" |
| 51765 | /* 117565 */ "VPANDQZ256rrk\0" |
| 51766 | /* 117579 */ "VPEXPANDQZ256rrk\0" |
| 51767 | /* 117596 */ "VPUNPCKHQDQZ256rrk\0" |
| 51768 | /* 117615 */ "VPUNPCKLQDQZ256rrk\0" |
| 51769 | /* 117634 */ "VCVTTPD2UDQZ256rrk\0" |
| 51770 | /* 117653 */ "VCVTPD2UDQZ256rrk\0" |
| 51771 | /* 117671 */ "VCVTTPH2UDQZ256rrk\0" |
| 51772 | /* 117690 */ "VCVTPH2UDQZ256rrk\0" |
| 51773 | /* 117708 */ "VCVTTPS2UDQZ256rrk\0" |
| 51774 | /* 117727 */ "VCVTPS2UDQZ256rrk\0" |
| 51775 | /* 117745 */ "VPMULUDQZ256rrk\0" |
| 51776 | /* 117761 */ "VPMOVSXDQZ256rrk\0" |
| 51777 | /* 117778 */ "VPMOVZXDQZ256rrk\0" |
| 51778 | /* 117795 */ "VPSLLQZ256rrk\0" |
| 51779 | /* 117809 */ "VPMULLQZ256rrk\0" |
| 51780 | /* 117824 */ "VPSRLQZ256rrk\0" |
| 51781 | /* 117838 */ "VPBLENDMQZ256rrk\0" |
| 51782 | /* 117855 */ "VPTESTNMQZ256rrk\0" |
| 51783 | /* 117872 */ "VPERMQZ256rrk\0" |
| 51784 | /* 117886 */ "VPTESTMQZ256rrk\0" |
| 51785 | /* 117902 */ "VPANDNQZ256rrk\0" |
| 51786 | /* 117917 */ "VCVTTPD2QQZ256rrk\0" |
| 51787 | /* 117935 */ "VCVTPD2QQZ256rrk\0" |
| 51788 | /* 117952 */ "VCVTTPH2QQZ256rrk\0" |
| 51789 | /* 117970 */ "VCVTPH2QQZ256rrk\0" |
| 51790 | /* 117987 */ "VCVTTPS2QQZ256rrk\0" |
| 51791 | /* 118005 */ "VCVTPS2QQZ256rrk\0" |
| 51792 | /* 118022 */ "VPCMPEQQZ256rrk\0" |
| 51793 | /* 118038 */ "VCVTTPD2UQQZ256rrk\0" |
| 51794 | /* 118057 */ "VCVTPD2UQQZ256rrk\0" |
| 51795 | /* 118075 */ "VCVTTPH2UQQZ256rrk\0" |
| 51796 | /* 118094 */ "VCVTPH2UQQZ256rrk\0" |
| 51797 | /* 118112 */ "VCVTTPS2UQQZ256rrk\0" |
| 51798 | /* 118131 */ "VCVTPS2UQQZ256rrk\0" |
| 51799 | /* 118149 */ "VPORQZ256rrk\0" |
| 51800 | /* 118162 */ "VPXORQZ256rrk\0" |
| 51801 | /* 118176 */ "VPABSQZ256rrk\0" |
| 51802 | /* 118190 */ "VPMINSQZ256rrk\0" |
| 51803 | /* 118205 */ "VPCOMPRESSQZ256rrk\0" |
| 51804 | /* 118224 */ "VPMAXSQZ256rrk\0" |
| 51805 | /* 118239 */ "VPCONFLICTQZ256rrk\0" |
| 51806 | /* 118258 */ "VPCMPGTQZ256rrk\0" |
| 51807 | /* 118274 */ "VPOPCNTQZ256rrk\0" |
| 51808 | /* 118290 */ "VPLZCNTQZ256rrk\0" |
| 51809 | /* 118306 */ "VPBROADCASTQZ256rrk\0" |
| 51810 | /* 118326 */ "VPMINUQZ256rrk\0" |
| 51811 | /* 118341 */ "VPMAXUQZ256rrk\0" |
| 51812 | /* 118356 */ "VPSRAVQZ256rrk\0" |
| 51813 | /* 118371 */ "VPSLLVQZ256rrk\0" |
| 51814 | /* 118386 */ "VPROLVQZ256rrk\0" |
| 51815 | /* 118401 */ "VPSRLVQZ256rrk\0" |
| 51816 | /* 118416 */ "VPRORVQZ256rrk\0" |
| 51817 | /* 118431 */ "VPMOVSXWQZ256rrk\0" |
| 51818 | /* 118448 */ "VPMOVZXWQZ256rrk\0" |
| 51819 | /* 118465 */ "VCVTPD2PSZ256rrk\0" |
| 51820 | /* 118482 */ "VCVTPH2PSZ256rrk\0" |
| 51821 | /* 118499 */ "VPERMI2PSZ256rrk\0" |
| 51822 | /* 118516 */ "VCVTDQ2PSZ256rrk\0" |
| 51823 | /* 118533 */ "VCVTUDQ2PSZ256rrk\0" |
| 51824 | /* 118551 */ "VCVTQQ2PSZ256rrk\0" |
| 51825 | /* 118568 */ "VCVTUQQ2PSZ256rrk\0" |
| 51826 | /* 118586 */ "VPERMT2PSZ256rrk\0" |
| 51827 | /* 118603 */ "VMOVAPSZ256rrk\0" |
| 51828 | /* 118618 */ "VSUBPSZ256rrk\0" |
| 51829 | /* 118632 */ "VMINCPSZ256rrk\0" |
| 51830 | /* 118647 */ "VMAXCPSZ256rrk\0" |
| 51831 | /* 118662 */ "VADDPSZ256rrk\0" |
| 51832 | /* 118676 */ "VEXPANDPSZ256rrk\0" |
| 51833 | /* 118693 */ "VANDPSZ256rrk\0" |
| 51834 | /* 118707 */ "VSCALEFPSZ256rrk\0" |
| 51835 | /* 118724 */ "VUNPCKHPSZ256rrk\0" |
| 51836 | /* 118741 */ "VPERMILPSZ256rrk\0" |
| 51837 | /* 118758 */ "VUNPCKLPSZ256rrk\0" |
| 51838 | /* 118775 */ "VMULPSZ256rrk\0" |
| 51839 | /* 118789 */ "VBLENDMPSZ256rrk\0" |
| 51840 | /* 118806 */ "VPERMPSZ256rrk\0" |
| 51841 | /* 118821 */ "VANDNPSZ256rrk\0" |
| 51842 | /* 118836 */ "VMINPSZ256rrk\0" |
| 51843 | /* 118850 */ "VORPSZ256rrk\0" |
| 51844 | /* 118863 */ "VXORPSZ256rrk\0" |
| 51845 | /* 118877 */ "VFPCLASSPSZ256rrk\0" |
| 51846 | /* 118895 */ "VCOMPRESSPSZ256rrk\0" |
| 51847 | /* 118914 */ "VMOVUPSZ256rrk\0" |
| 51848 | /* 118929 */ "VDIVPSZ256rrk\0" |
| 51849 | /* 118943 */ "VMAXPSZ256rrk\0" |
| 51850 | /* 118957 */ "VBROADCASTSSZ256rrk\0" |
| 51851 | /* 118977 */ "VCVTTPH2WZ256rrk\0" |
| 51852 | /* 118994 */ "VCVTPH2WZ256rrk\0" |
| 51853 | /* 119010 */ "VPERMI2WZ256rrk\0" |
| 51854 | /* 119026 */ "VPERMT2WZ256rrk\0" |
| 51855 | /* 119042 */ "VPSRAWZ256rrk\0" |
| 51856 | /* 119056 */ "VPUNPCKHBWZ256rrk\0" |
| 51857 | /* 119074 */ "VPUNPCKLBWZ256rrk\0" |
| 51858 | /* 119092 */ "VPSUBWZ256rrk\0" |
| 51859 | /* 119106 */ "VPMOVSXBWZ256rrk\0" |
| 51860 | /* 119123 */ "VPMOVZXBWZ256rrk\0" |
| 51861 | /* 119140 */ "VPADDWZ256rrk\0" |
| 51862 | /* 119154 */ "VPEXPANDWZ256rrk\0" |
| 51863 | /* 119171 */ "VPACKSSDWZ256rrk\0" |
| 51864 | /* 119188 */ "VPACKUSDWZ256rrk\0" |
| 51865 | /* 119205 */ "VPMOVUSDWZ256rrk\0" |
| 51866 | /* 119222 */ "VPMOVSDWZ256rrk\0" |
| 51867 | /* 119238 */ "VPMOVDWZ256rrk\0" |
| 51868 | /* 119253 */ "VPAVGWZ256rrk\0" |
| 51869 | /* 119267 */ "VPMULHWZ256rrk\0" |
| 51870 | /* 119282 */ "VPSLLWZ256rrk\0" |
| 51871 | /* 119296 */ "VPMULLWZ256rrk\0" |
| 51872 | /* 119311 */ "VPSRLWZ256rrk\0" |
| 51873 | /* 119325 */ "VPBLENDMWZ256rrk\0" |
| 51874 | /* 119342 */ "VPTESTNMWZ256rrk\0" |
| 51875 | /* 119359 */ "VPERMWZ256rrk\0" |
| 51876 | /* 119373 */ "VPTESTMWZ256rrk\0" |
| 51877 | /* 119389 */ "VPCMPEQWZ256rrk\0" |
| 51878 | /* 119405 */ "VPMOVUSQWZ256rrk\0" |
| 51879 | /* 119422 */ "VPMOVSQWZ256rrk\0" |
| 51880 | /* 119438 */ "VPMOVQWZ256rrk\0" |
| 51881 | /* 119453 */ "VPABSWZ256rrk\0" |
| 51882 | /* 119467 */ "VPMADDUBSWZ256rrk\0" |
| 51883 | /* 119485 */ "VPSUBSWZ256rrk\0" |
| 51884 | /* 119500 */ "VPADDSWZ256rrk\0" |
| 51885 | /* 119515 */ "VPMINSWZ256rrk\0" |
| 51886 | /* 119530 */ "VPMULHRSWZ256rrk\0" |
| 51887 | /* 119547 */ "VPCOMPRESSWZ256rrk\0" |
| 51888 | /* 119566 */ "VPSUBUSWZ256rrk\0" |
| 51889 | /* 119582 */ "VPADDUSWZ256rrk\0" |
| 51890 | /* 119598 */ "VPMAXSWZ256rrk\0" |
| 51891 | /* 119613 */ "VPCMPGTWZ256rrk\0" |
| 51892 | /* 119629 */ "VPOPCNTWZ256rrk\0" |
| 51893 | /* 119645 */ "VPBROADCASTWZ256rrk\0" |
| 51894 | /* 119665 */ "VCVTTPH2UWZ256rrk\0" |
| 51895 | /* 119683 */ "VCVTPH2UWZ256rrk\0" |
| 51896 | /* 119700 */ "VPMULHUWZ256rrk\0" |
| 51897 | /* 119716 */ "VPMINUWZ256rrk\0" |
| 51898 | /* 119731 */ "VPMAXUWZ256rrk\0" |
| 51899 | /* 119746 */ "VPSRAVWZ256rrk\0" |
| 51900 | /* 119761 */ "VPSLLVWZ256rrk\0" |
| 51901 | /* 119776 */ "VPSRLVWZ256rrk\0" |
| 51902 | /* 119791 */ "VCVTPS2PHXZ256rrk\0" |
| 51903 | /* 119809 */ "VCVTPH2PSXZ256rrk\0" |
| 51904 | /* 119827 */ "VPBROADCASTBrZ256rrk\0" |
| 51905 | /* 119848 */ "VPBROADCASTDrZ256rrk\0" |
| 51906 | /* 119869 */ "VPBROADCASTQrZ256rrk\0" |
| 51907 | /* 119890 */ "VPBROADCASTWrZ256rrk\0" |
| 51908 | /* 119911 */ "VMOVDQA32Z128rrk\0" |
| 51909 | /* 119928 */ "VMOVDQU32Z128rrk\0" |
| 51910 | /* 119945 */ "VBROADCASTI32X2Z128rrk\0" |
| 51911 | /* 119968 */ "VMOVDQA64Z128rrk\0" |
| 51912 | /* 119985 */ "VMOVDQU64Z128rrk\0" |
| 51913 | /* 120002 */ "VCVTNE2PS2BF16Z128rrk\0" |
| 51914 | /* 120024 */ "VCVTNEPS2BF16Z128rrk\0" |
| 51915 | /* 120045 */ "VMOVDQU16Z128rrk\0" |
| 51916 | /* 120062 */ "VMOVDQU8Z128rrk\0" |
| 51917 | /* 120078 */ "VPERMI2BZ128rrk\0" |
| 51918 | /* 120094 */ "VPERMT2BZ128rrk\0" |
| 51919 | /* 120110 */ "VPSUBBZ128rrk\0" |
| 51920 | /* 120124 */ "VPADDBZ128rrk\0" |
| 51921 | /* 120138 */ "VPEXPANDBZ128rrk\0" |
| 51922 | /* 120155 */ "VPMOVUSDBZ128rrk\0" |
| 51923 | /* 120172 */ "VPMOVSDBZ128rrk\0" |
| 51924 | /* 120188 */ "VPMOVDBZ128rrk\0" |
| 51925 | /* 120203 */ "VPSHUFBZ128rrk\0" |
| 51926 | /* 120218 */ "VPAVGBZ128rrk\0" |
| 51927 | /* 120232 */ "VGF2P8MULBZ128rrk\0" |
| 51928 | /* 120250 */ "VPBLENDMBZ128rrk\0" |
| 51929 | /* 120267 */ "VPTESTNMBZ128rrk\0" |
| 51930 | /* 120284 */ "VPSHUFBITQMBZ128rrk\0" |
| 51931 | /* 120304 */ "VPERMBZ128rrk\0" |
| 51932 | /* 120318 */ "VPTESTMBZ128rrk\0" |
| 51933 | /* 120334 */ "VPCMPEQBZ128rrk\0" |
| 51934 | /* 120350 */ "VPMOVUSQBZ128rrk\0" |
| 51935 | /* 120367 */ "VPMOVSQBZ128rrk\0" |
| 51936 | /* 120383 */ "VPMULTISHIFTQBZ128rrk\0" |
| 51937 | /* 120405 */ "VPMOVQBZ128rrk\0" |
| 51938 | /* 120420 */ "VPABSBZ128rrk\0" |
| 51939 | /* 120434 */ "VPSUBSBZ128rrk\0" |
| 51940 | /* 120449 */ "VPADDSBZ128rrk\0" |
| 51941 | /* 120464 */ "VPMINSBZ128rrk\0" |
| 51942 | /* 120479 */ "VPCOMPRESSBZ128rrk\0" |
| 51943 | /* 120498 */ "VPSUBUSBZ128rrk\0" |
| 51944 | /* 120514 */ "VPADDUSBZ128rrk\0" |
| 51945 | /* 120530 */ "VPMAXSBZ128rrk\0" |
| 51946 | /* 120545 */ "VPCMPGTBZ128rrk\0" |
| 51947 | /* 120561 */ "VPOPCNTBZ128rrk\0" |
| 51948 | /* 120577 */ "VPBROADCASTBZ128rrk\0" |
| 51949 | /* 120597 */ "VPMINUBZ128rrk\0" |
| 51950 | /* 120612 */ "VPMAXUBZ128rrk\0" |
| 51951 | /* 120627 */ "VPACKSSWBZ128rrk\0" |
| 51952 | /* 120644 */ "VPACKUSWBZ128rrk\0" |
| 51953 | /* 120661 */ "VPMOVUSWBZ128rrk\0" |
| 51954 | /* 120678 */ "VPMOVSWBZ128rrk\0" |
| 51955 | /* 120694 */ "VPMOVWBZ128rrk\0" |
| 51956 | /* 120709 */ "VPERMI2DZ128rrk\0" |
| 51957 | /* 120725 */ "VPERMT2DZ128rrk\0" |
| 51958 | /* 120741 */ "VPSRADZ128rrk\0" |
| 51959 | /* 120755 */ "VPSUBDZ128rrk\0" |
| 51960 | /* 120769 */ "VPMOVSXBDZ128rrk\0" |
| 51961 | /* 120786 */ "VPMOVZXBDZ128rrk\0" |
| 51962 | /* 120803 */ "VPADDDZ128rrk\0" |
| 51963 | /* 120817 */ "VPANDDZ128rrk\0" |
| 51964 | /* 120831 */ "VPEXPANDDZ128rrk\0" |
| 51965 | /* 120848 */ "VPSLLDZ128rrk\0" |
| 51966 | /* 120862 */ "VPMULLDZ128rrk\0" |
| 51967 | /* 120877 */ "VPSRLDZ128rrk\0" |
| 51968 | /* 120891 */ "VPBLENDMDZ128rrk\0" |
| 51969 | /* 120908 */ "VPTESTNMDZ128rrk\0" |
| 51970 | /* 120925 */ "VPTESTMDZ128rrk\0" |
| 51971 | /* 120941 */ "VPANDNDZ128rrk\0" |
| 51972 | /* 120956 */ "VCVTPH2PDZ128rrk\0" |
| 51973 | /* 120973 */ "VPERMI2PDZ128rrk\0" |
| 51974 | /* 120990 */ "VCVTDQ2PDZ128rrk\0" |
| 51975 | /* 121007 */ "VCVTUDQ2PDZ128rrk\0" |
| 51976 | /* 121025 */ "VCVTQQ2PDZ128rrk\0" |
| 51977 | /* 121042 */ "VCVTUQQ2PDZ128rrk\0" |
| 51978 | /* 121060 */ "VCVTPS2PDZ128rrk\0" |
| 51979 | /* 121077 */ "VPERMT2PDZ128rrk\0" |
| 51980 | /* 121094 */ "VMOVAPDZ128rrk\0" |
| 51981 | /* 121109 */ "VSUBPDZ128rrk\0" |
| 51982 | /* 121123 */ "VMINCPDZ128rrk\0" |
| 51983 | /* 121138 */ "VMAXCPDZ128rrk\0" |
| 51984 | /* 121153 */ "VADDPDZ128rrk\0" |
| 51985 | /* 121167 */ "VEXPANDPDZ128rrk\0" |
| 51986 | /* 121184 */ "VANDPDZ128rrk\0" |
| 51987 | /* 121198 */ "VSCALEFPDZ128rrk\0" |
| 51988 | /* 121215 */ "VUNPCKHPDZ128rrk\0" |
| 51989 | /* 121232 */ "VPERMILPDZ128rrk\0" |
| 51990 | /* 121249 */ "VUNPCKLPDZ128rrk\0" |
| 51991 | /* 121266 */ "VMULPDZ128rrk\0" |
| 51992 | /* 121280 */ "VBLENDMPDZ128rrk\0" |
| 51993 | /* 121297 */ "VANDNPDZ128rrk\0" |
| 51994 | /* 121312 */ "VMINPDZ128rrk\0" |
| 51995 | /* 121326 */ "VORPDZ128rrk\0" |
| 51996 | /* 121339 */ "VXORPDZ128rrk\0" |
| 51997 | /* 121353 */ "VFPCLASSPDZ128rrk\0" |
| 51998 | /* 121371 */ "VCOMPRESSPDZ128rrk\0" |
| 51999 | /* 121390 */ "VMOVUPDZ128rrk\0" |
| 52000 | /* 121405 */ "VDIVPDZ128rrk\0" |
| 52001 | /* 121419 */ "VMAXPDZ128rrk\0" |
| 52002 | /* 121433 */ "VPCMPEQDZ128rrk\0" |
| 52003 | /* 121449 */ "VPMOVUSQDZ128rrk\0" |
| 52004 | /* 121466 */ "VPMOVSQDZ128rrk\0" |
| 52005 | /* 121482 */ "VPMOVQDZ128rrk\0" |
| 52006 | /* 121497 */ "VPORDZ128rrk\0" |
| 52007 | /* 121510 */ "VPXORDZ128rrk\0" |
| 52008 | /* 121524 */ "VPABSDZ128rrk\0" |
| 52009 | /* 121538 */ "VPMINSDZ128rrk\0" |
| 52010 | /* 121553 */ "VPCOMPRESSDZ128rrk\0" |
| 52011 | /* 121572 */ "VPMAXSDZ128rrk\0" |
| 52012 | /* 121587 */ "VPCONFLICTDZ128rrk\0" |
| 52013 | /* 121606 */ "VPCMPGTDZ128rrk\0" |
| 52014 | /* 121622 */ "VPOPCNTDZ128rrk\0" |
| 52015 | /* 121638 */ "VPLZCNTDZ128rrk\0" |
| 52016 | /* 121654 */ "VPBROADCASTDZ128rrk\0" |
| 52017 | /* 121674 */ "VPMINUDZ128rrk\0" |
| 52018 | /* 121689 */ "VPMAXUDZ128rrk\0" |
| 52019 | /* 121704 */ "VPSRAVDZ128rrk\0" |
| 52020 | /* 121719 */ "VPSLLVDZ128rrk\0" |
| 52021 | /* 121734 */ "VPROLVDZ128rrk\0" |
| 52022 | /* 121749 */ "VPSRLVDZ128rrk\0" |
| 52023 | /* 121764 */ "VPRORVDZ128rrk\0" |
| 52024 | /* 121779 */ "VPMADDWDZ128rrk\0" |
| 52025 | /* 121795 */ "VPUNPCKHWDZ128rrk\0" |
| 52026 | /* 121813 */ "VPUNPCKLWDZ128rrk\0" |
| 52027 | /* 121831 */ "VPMOVSXWDZ128rrk\0" |
| 52028 | /* 121848 */ "VPMOVZXWDZ128rrk\0" |
| 52029 | /* 121865 */ "VCVTPD2PHZ128rrk\0" |
| 52030 | /* 121882 */ "VCVTDQ2PHZ128rrk\0" |
| 52031 | /* 121899 */ "VCVTUDQ2PHZ128rrk\0" |
| 52032 | /* 121917 */ "VCVTQQ2PHZ128rrk\0" |
| 52033 | /* 121934 */ "VCVTUQQ2PHZ128rrk\0" |
| 52034 | /* 121952 */ "VCVTPS2PHZ128rrk\0" |
| 52035 | /* 121969 */ "VCVTW2PHZ128rrk\0" |
| 52036 | /* 121985 */ "VCVTUW2PHZ128rrk\0" |
| 52037 | /* 122002 */ "VSUBPHZ128rrk\0" |
| 52038 | /* 122016 */ "VFCMULCPHZ128rrk\0" |
| 52039 | /* 122033 */ "VFMULCPHZ128rrk\0" |
| 52040 | /* 122049 */ "VMINCPHZ128rrk\0" |
| 52041 | /* 122064 */ "VMAXCPHZ128rrk\0" |
| 52042 | /* 122079 */ "VADDPHZ128rrk\0" |
| 52043 | /* 122093 */ "VSCALEFPHZ128rrk\0" |
| 52044 | /* 122110 */ "VMULPHZ128rrk\0" |
| 52045 | /* 122124 */ "VMINPHZ128rrk\0" |
| 52046 | /* 122138 */ "VFPCLASSPHZ128rrk\0" |
| 52047 | /* 122156 */ "VDIVPHZ128rrk\0" |
| 52048 | /* 122170 */ "VMAXPHZ128rrk\0" |
| 52049 | /* 122184 */ "VMOVDDUPZ128rrk\0" |
| 52050 | /* 122200 */ "VMOVSHDUPZ128rrk\0" |
| 52051 | /* 122217 */ "VMOVSLDUPZ128rrk\0" |
| 52052 | /* 122234 */ "VPERMI2QZ128rrk\0" |
| 52053 | /* 122250 */ "VPERMT2QZ128rrk\0" |
| 52054 | /* 122266 */ "VPSRAQZ128rrk\0" |
| 52055 | /* 122280 */ "VPSUBQZ128rrk\0" |
| 52056 | /* 122294 */ "VPMOVSXBQZ128rrk\0" |
| 52057 | /* 122311 */ "VPMOVZXBQZ128rrk\0" |
| 52058 | /* 122328 */ "VCVTTPD2DQZ128rrk\0" |
| 52059 | /* 122346 */ "VCVTPD2DQZ128rrk\0" |
| 52060 | /* 122363 */ "VCVTTPH2DQZ128rrk\0" |
| 52061 | /* 122381 */ "VCVTPH2DQZ128rrk\0" |
| 52062 | /* 122398 */ "VCVTTPS2DQZ128rrk\0" |
| 52063 | /* 122416 */ "VCVTPS2DQZ128rrk\0" |
| 52064 | /* 122433 */ "VPADDQZ128rrk\0" |
| 52065 | /* 122447 */ "VPUNPCKHDQZ128rrk\0" |
| 52066 | /* 122465 */ "VPUNPCKLDQZ128rrk\0" |
| 52067 | /* 122483 */ "VPMULDQZ128rrk\0" |
| 52068 | /* 122498 */ "VPANDQZ128rrk\0" |
| 52069 | /* 122512 */ "VPEXPANDQZ128rrk\0" |
| 52070 | /* 122529 */ "VPUNPCKHQDQZ128rrk\0" |
| 52071 | /* 122548 */ "VPUNPCKLQDQZ128rrk\0" |
| 52072 | /* 122567 */ "VCVTTPD2UDQZ128rrk\0" |
| 52073 | /* 122586 */ "VCVTPD2UDQZ128rrk\0" |
| 52074 | /* 122604 */ "VCVTTPH2UDQZ128rrk\0" |
| 52075 | /* 122623 */ "VCVTPH2UDQZ128rrk\0" |
| 52076 | /* 122641 */ "VCVTTPS2UDQZ128rrk\0" |
| 52077 | /* 122660 */ "VCVTPS2UDQZ128rrk\0" |
| 52078 | /* 122678 */ "VPMULUDQZ128rrk\0" |
| 52079 | /* 122694 */ "VPMOVSXDQZ128rrk\0" |
| 52080 | /* 122711 */ "VPMOVZXDQZ128rrk\0" |
| 52081 | /* 122728 */ "VPSLLQZ128rrk\0" |
| 52082 | /* 122742 */ "VPMULLQZ128rrk\0" |
| 52083 | /* 122757 */ "VPSRLQZ128rrk\0" |
| 52084 | /* 122771 */ "VPBLENDMQZ128rrk\0" |
| 52085 | /* 122788 */ "VPTESTNMQZ128rrk\0" |
| 52086 | /* 122805 */ "VPTESTMQZ128rrk\0" |
| 52087 | /* 122821 */ "VPANDNQZ128rrk\0" |
| 52088 | /* 122836 */ "VCVTTPD2QQZ128rrk\0" |
| 52089 | /* 122854 */ "VCVTPD2QQZ128rrk\0" |
| 52090 | /* 122871 */ "VCVTTPH2QQZ128rrk\0" |
| 52091 | /* 122889 */ "VCVTPH2QQZ128rrk\0" |
| 52092 | /* 122906 */ "VCVTTPS2QQZ128rrk\0" |
| 52093 | /* 122924 */ "VCVTPS2QQZ128rrk\0" |
| 52094 | /* 122941 */ "VPCMPEQQZ128rrk\0" |
| 52095 | /* 122957 */ "VCVTTPD2UQQZ128rrk\0" |
| 52096 | /* 122976 */ "VCVTPD2UQQZ128rrk\0" |
| 52097 | /* 122994 */ "VCVTTPH2UQQZ128rrk\0" |
| 52098 | /* 123013 */ "VCVTPH2UQQZ128rrk\0" |
| 52099 | /* 123031 */ "VCVTTPS2UQQZ128rrk\0" |
| 52100 | /* 123050 */ "VCVTPS2UQQZ128rrk\0" |
| 52101 | /* 123068 */ "VPORQZ128rrk\0" |
| 52102 | /* 123081 */ "VPXORQZ128rrk\0" |
| 52103 | /* 123095 */ "VPABSQZ128rrk\0" |
| 52104 | /* 123109 */ "VPMINSQZ128rrk\0" |
| 52105 | /* 123124 */ "VPCOMPRESSQZ128rrk\0" |
| 52106 | /* 123143 */ "VPMAXSQZ128rrk\0" |
| 52107 | /* 123158 */ "VPCONFLICTQZ128rrk\0" |
| 52108 | /* 123177 */ "VPCMPGTQZ128rrk\0" |
| 52109 | /* 123193 */ "VPOPCNTQZ128rrk\0" |
| 52110 | /* 123209 */ "VPLZCNTQZ128rrk\0" |
| 52111 | /* 123225 */ "VPBROADCASTQZ128rrk\0" |
| 52112 | /* 123245 */ "VPMINUQZ128rrk\0" |
| 52113 | /* 123260 */ "VPMAXUQZ128rrk\0" |
| 52114 | /* 123275 */ "VPSRAVQZ128rrk\0" |
| 52115 | /* 123290 */ "VPSLLVQZ128rrk\0" |
| 52116 | /* 123305 */ "VPROLVQZ128rrk\0" |
| 52117 | /* 123320 */ "VPSRLVQZ128rrk\0" |
| 52118 | /* 123335 */ "VPRORVQZ128rrk\0" |
| 52119 | /* 123350 */ "VPMOVSXWQZ128rrk\0" |
| 52120 | /* 123367 */ "VPMOVZXWQZ128rrk\0" |
| 52121 | /* 123384 */ "VCVTPD2PSZ128rrk\0" |
| 52122 | /* 123401 */ "VCVTPH2PSZ128rrk\0" |
| 52123 | /* 123418 */ "VPERMI2PSZ128rrk\0" |
| 52124 | /* 123435 */ "VCVTDQ2PSZ128rrk\0" |
| 52125 | /* 123452 */ "VCVTUDQ2PSZ128rrk\0" |
| 52126 | /* 123470 */ "VCVTQQ2PSZ128rrk\0" |
| 52127 | /* 123487 */ "VCVTUQQ2PSZ128rrk\0" |
| 52128 | /* 123505 */ "VPERMT2PSZ128rrk\0" |
| 52129 | /* 123522 */ "VMOVAPSZ128rrk\0" |
| 52130 | /* 123537 */ "VSUBPSZ128rrk\0" |
| 52131 | /* 123551 */ "VMINCPSZ128rrk\0" |
| 52132 | /* 123566 */ "VMAXCPSZ128rrk\0" |
| 52133 | /* 123581 */ "VADDPSZ128rrk\0" |
| 52134 | /* 123595 */ "VEXPANDPSZ128rrk\0" |
| 52135 | /* 123612 */ "VANDPSZ128rrk\0" |
| 52136 | /* 123626 */ "VSCALEFPSZ128rrk\0" |
| 52137 | /* 123643 */ "VUNPCKHPSZ128rrk\0" |
| 52138 | /* 123660 */ "VPERMILPSZ128rrk\0" |
| 52139 | /* 123677 */ "VUNPCKLPSZ128rrk\0" |
| 52140 | /* 123694 */ "VMULPSZ128rrk\0" |
| 52141 | /* 123708 */ "VBLENDMPSZ128rrk\0" |
| 52142 | /* 123725 */ "VANDNPSZ128rrk\0" |
| 52143 | /* 123740 */ "VMINPSZ128rrk\0" |
| 52144 | /* 123754 */ "VORPSZ128rrk\0" |
| 52145 | /* 123767 */ "VXORPSZ128rrk\0" |
| 52146 | /* 123781 */ "VFPCLASSPSZ128rrk\0" |
| 52147 | /* 123799 */ "VCOMPRESSPSZ128rrk\0" |
| 52148 | /* 123818 */ "VMOVUPSZ128rrk\0" |
| 52149 | /* 123833 */ "VDIVPSZ128rrk\0" |
| 52150 | /* 123847 */ "VMAXPSZ128rrk\0" |
| 52151 | /* 123861 */ "VBROADCASTSSZ128rrk\0" |
| 52152 | /* 123881 */ "VCVTTPH2WZ128rrk\0" |
| 52153 | /* 123898 */ "VCVTPH2WZ128rrk\0" |
| 52154 | /* 123914 */ "VPERMI2WZ128rrk\0" |
| 52155 | /* 123930 */ "VPERMT2WZ128rrk\0" |
| 52156 | /* 123946 */ "VPSRAWZ128rrk\0" |
| 52157 | /* 123960 */ "VPUNPCKHBWZ128rrk\0" |
| 52158 | /* 123978 */ "VPUNPCKLBWZ128rrk\0" |
| 52159 | /* 123996 */ "VPSUBWZ128rrk\0" |
| 52160 | /* 124010 */ "VPMOVSXBWZ128rrk\0" |
| 52161 | /* 124027 */ "VPMOVZXBWZ128rrk\0" |
| 52162 | /* 124044 */ "VPADDWZ128rrk\0" |
| 52163 | /* 124058 */ "VPEXPANDWZ128rrk\0" |
| 52164 | /* 124075 */ "VPACKSSDWZ128rrk\0" |
| 52165 | /* 124092 */ "VPACKUSDWZ128rrk\0" |
| 52166 | /* 124109 */ "VPMOVUSDWZ128rrk\0" |
| 52167 | /* 124126 */ "VPMOVSDWZ128rrk\0" |
| 52168 | /* 124142 */ "VPMOVDWZ128rrk\0" |
| 52169 | /* 124157 */ "VPAVGWZ128rrk\0" |
| 52170 | /* 124171 */ "VPMULHWZ128rrk\0" |
| 52171 | /* 124186 */ "VPSLLWZ128rrk\0" |
| 52172 | /* 124200 */ "VPMULLWZ128rrk\0" |
| 52173 | /* 124215 */ "VPSRLWZ128rrk\0" |
| 52174 | /* 124229 */ "VPBLENDMWZ128rrk\0" |
| 52175 | /* 124246 */ "VPTESTNMWZ128rrk\0" |
| 52176 | /* 124263 */ "VPERMWZ128rrk\0" |
| 52177 | /* 124277 */ "VPTESTMWZ128rrk\0" |
| 52178 | /* 124293 */ "VPCMPEQWZ128rrk\0" |
| 52179 | /* 124309 */ "VPMOVUSQWZ128rrk\0" |
| 52180 | /* 124326 */ "VPMOVSQWZ128rrk\0" |
| 52181 | /* 124342 */ "VPMOVQWZ128rrk\0" |
| 52182 | /* 124357 */ "VPABSWZ128rrk\0" |
| 52183 | /* 124371 */ "VPMADDUBSWZ128rrk\0" |
| 52184 | /* 124389 */ "VPSUBSWZ128rrk\0" |
| 52185 | /* 124404 */ "VPADDSWZ128rrk\0" |
| 52186 | /* 124419 */ "VPMINSWZ128rrk\0" |
| 52187 | /* 124434 */ "VPMULHRSWZ128rrk\0" |
| 52188 | /* 124451 */ "VPCOMPRESSWZ128rrk\0" |
| 52189 | /* 124470 */ "VPSUBUSWZ128rrk\0" |
| 52190 | /* 124486 */ "VPADDUSWZ128rrk\0" |
| 52191 | /* 124502 */ "VPMAXSWZ128rrk\0" |
| 52192 | /* 124517 */ "VPCMPGTWZ128rrk\0" |
| 52193 | /* 124533 */ "VPOPCNTWZ128rrk\0" |
| 52194 | /* 124549 */ "VPBROADCASTWZ128rrk\0" |
| 52195 | /* 124569 */ "VCVTTPH2UWZ128rrk\0" |
| 52196 | /* 124587 */ "VCVTPH2UWZ128rrk\0" |
| 52197 | /* 124604 */ "VPMULHUWZ128rrk\0" |
| 52198 | /* 124620 */ "VPMINUWZ128rrk\0" |
| 52199 | /* 124635 */ "VPMAXUWZ128rrk\0" |
| 52200 | /* 124650 */ "VPSRAVWZ128rrk\0" |
| 52201 | /* 124665 */ "VPSLLVWZ128rrk\0" |
| 52202 | /* 124680 */ "VPSRLVWZ128rrk\0" |
| 52203 | /* 124695 */ "VCVTPS2PHXZ128rrk\0" |
| 52204 | /* 124713 */ "VCVTPH2PSXZ128rrk\0" |
| 52205 | /* 124731 */ "VPBROADCASTBrZ128rrk\0" |
| 52206 | /* 124752 */ "VPBROADCASTDrZ128rrk\0" |
| 52207 | /* 124773 */ "VPBROADCASTQrZ128rrk\0" |
| 52208 | /* 124794 */ "VPBROADCASTWrZ128rrk\0" |
| 52209 | /* 124815 */ "VMOVDQA32Zrrk\0" |
| 52210 | /* 124829 */ "VMOVDQU32Zrrk\0" |
| 52211 | /* 124843 */ "VBROADCASTF32X2Zrrk\0" |
| 52212 | /* 124863 */ "VBROADCASTI32X2Zrrk\0" |
| 52213 | /* 124883 */ "VEXTRACTF64x2Zrrk\0" |
| 52214 | /* 124901 */ "VINSERTF64x2Zrrk\0" |
| 52215 | /* 124918 */ "VEXTRACTI64x2Zrrk\0" |
| 52216 | /* 124936 */ "VINSERTI64x2Zrrk\0" |
| 52217 | /* 124953 */ "VMOVDQA64Zrrk\0" |
| 52218 | /* 124967 */ "VMOVDQU64Zrrk\0" |
| 52219 | /* 124981 */ "VEXTRACTF32x4Zrrk\0" |
| 52220 | /* 124999 */ "VINSERTF32x4Zrrk\0" |
| 52221 | /* 125016 */ "VEXTRACTI32x4Zrrk\0" |
| 52222 | /* 125034 */ "VINSERTI32x4Zrrk\0" |
| 52223 | /* 125051 */ "VEXTRACTF64x4Zrrk\0" |
| 52224 | /* 125069 */ "VINSERTF64x4Zrrk\0" |
| 52225 | /* 125086 */ "VEXTRACTI64x4Zrrk\0" |
| 52226 | /* 125104 */ "VINSERTI64x4Zrrk\0" |
| 52227 | /* 125121 */ "VCVTNE2PS2BF16Zrrk\0" |
| 52228 | /* 125140 */ "VCVTNEPS2BF16Zrrk\0" |
| 52229 | /* 125158 */ "VMOVDQU16Zrrk\0" |
| 52230 | /* 125172 */ "VMOVDQU8Zrrk\0" |
| 52231 | /* 125185 */ "VEXTRACTF32x8Zrrk\0" |
| 52232 | /* 125203 */ "VINSERTF32x8Zrrk\0" |
| 52233 | /* 125220 */ "VEXTRACTI32x8Zrrk\0" |
| 52234 | /* 125238 */ "VINSERTI32x8Zrrk\0" |
| 52235 | /* 125255 */ "VPERMI2BZrrk\0" |
| 52236 | /* 125268 */ "VPERMT2BZrrk\0" |
| 52237 | /* 125281 */ "VPSUBBZrrk\0" |
| 52238 | /* 125292 */ "VPADDBZrrk\0" |
| 52239 | /* 125303 */ "VPEXPANDBZrrk\0" |
| 52240 | /* 125317 */ "VPMOVUSDBZrrk\0" |
| 52241 | /* 125331 */ "VPMOVSDBZrrk\0" |
| 52242 | /* 125344 */ "VPMOVDBZrrk\0" |
| 52243 | /* 125356 */ "VPSHUFBZrrk\0" |
| 52244 | /* 125368 */ "VPAVGBZrrk\0" |
| 52245 | /* 125379 */ "VGF2P8MULBZrrk\0" |
| 52246 | /* 125394 */ "VPBLENDMBZrrk\0" |
| 52247 | /* 125408 */ "VPTESTNMBZrrk\0" |
| 52248 | /* 125422 */ "VPSHUFBITQMBZrrk\0" |
| 52249 | /* 125439 */ "VPERMBZrrk\0" |
| 52250 | /* 125450 */ "VPTESTMBZrrk\0" |
| 52251 | /* 125463 */ "VPCMPEQBZrrk\0" |
| 52252 | /* 125476 */ "VPMOVUSQBZrrk\0" |
| 52253 | /* 125490 */ "VPMOVSQBZrrk\0" |
| 52254 | /* 125503 */ "VPMULTISHIFTQBZrrk\0" |
| 52255 | /* 125522 */ "VPMOVQBZrrk\0" |
| 52256 | /* 125534 */ "VPABSBZrrk\0" |
| 52257 | /* 125545 */ "VPSUBSBZrrk\0" |
| 52258 | /* 125557 */ "VPADDSBZrrk\0" |
| 52259 | /* 125569 */ "VPMINSBZrrk\0" |
| 52260 | /* 125581 */ "VPCOMPRESSBZrrk\0" |
| 52261 | /* 125597 */ "VPSUBUSBZrrk\0" |
| 52262 | /* 125610 */ "VPADDUSBZrrk\0" |
| 52263 | /* 125623 */ "VPMAXSBZrrk\0" |
| 52264 | /* 125635 */ "VPCMPGTBZrrk\0" |
| 52265 | /* 125648 */ "VPOPCNTBZrrk\0" |
| 52266 | /* 125661 */ "VPBROADCASTBZrrk\0" |
| 52267 | /* 125678 */ "VPMINUBZrrk\0" |
| 52268 | /* 125690 */ "VPMAXUBZrrk\0" |
| 52269 | /* 125702 */ "VPACKSSWBZrrk\0" |
| 52270 | /* 125716 */ "VPACKUSWBZrrk\0" |
| 52271 | /* 125730 */ "VPMOVUSWBZrrk\0" |
| 52272 | /* 125744 */ "VPMOVSWBZrrk\0" |
| 52273 | /* 125757 */ "VPMOVWBZrrk\0" |
| 52274 | /* 125769 */ "VPERMI2DZrrk\0" |
| 52275 | /* 125782 */ "VPERMT2DZrrk\0" |
| 52276 | /* 125795 */ "VPSRADZrrk\0" |
| 52277 | /* 125806 */ "VPSUBDZrrk\0" |
| 52278 | /* 125817 */ "VPMOVSXBDZrrk\0" |
| 52279 | /* 125831 */ "VPMOVZXBDZrrk\0" |
| 52280 | /* 125845 */ "VPADDDZrrk\0" |
| 52281 | /* 125856 */ "VPANDDZrrk\0" |
| 52282 | /* 125867 */ "VPEXPANDDZrrk\0" |
| 52283 | /* 125881 */ "VPSLLDZrrk\0" |
| 52284 | /* 125892 */ "VPMULLDZrrk\0" |
| 52285 | /* 125904 */ "VPSRLDZrrk\0" |
| 52286 | /* 125915 */ "VPBLENDMDZrrk\0" |
| 52287 | /* 125929 */ "VPTESTNMDZrrk\0" |
| 52288 | /* 125943 */ "VPERMDZrrk\0" |
| 52289 | /* 125954 */ "VPTESTMDZrrk\0" |
| 52290 | /* 125967 */ "VPANDNDZrrk\0" |
| 52291 | /* 125979 */ "VCVTPH2PDZrrk\0" |
| 52292 | /* 125993 */ "VPERMI2PDZrrk\0" |
| 52293 | /* 126007 */ "VCVTDQ2PDZrrk\0" |
| 52294 | /* 126021 */ "VCVTUDQ2PDZrrk\0" |
| 52295 | /* 126036 */ "VCVTQQ2PDZrrk\0" |
| 52296 | /* 126050 */ "VCVTUQQ2PDZrrk\0" |
| 52297 | /* 126065 */ "VCVTPS2PDZrrk\0" |
| 52298 | /* 126079 */ "VPERMT2PDZrrk\0" |
| 52299 | /* 126093 */ "VMOVAPDZrrk\0" |
| 52300 | /* 126105 */ "VSUBPDZrrk\0" |
| 52301 | /* 126116 */ "VMINCPDZrrk\0" |
| 52302 | /* 126128 */ "VMAXCPDZrrk\0" |
| 52303 | /* 126140 */ "VADDPDZrrk\0" |
| 52304 | /* 126151 */ "VEXPANDPDZrrk\0" |
| 52305 | /* 126165 */ "VANDPDZrrk\0" |
| 52306 | /* 126176 */ "VSCALEFPDZrrk\0" |
| 52307 | /* 126190 */ "VUNPCKHPDZrrk\0" |
| 52308 | /* 126204 */ "VPERMILPDZrrk\0" |
| 52309 | /* 126218 */ "VUNPCKLPDZrrk\0" |
| 52310 | /* 126232 */ "VMULPDZrrk\0" |
| 52311 | /* 126243 */ "VBLENDMPDZrrk\0" |
| 52312 | /* 126257 */ "VPERMPDZrrk\0" |
| 52313 | /* 126269 */ "VANDNPDZrrk\0" |
| 52314 | /* 126281 */ "VMINPDZrrk\0" |
| 52315 | /* 126292 */ "VORPDZrrk\0" |
| 52316 | /* 126302 */ "VXORPDZrrk\0" |
| 52317 | /* 126313 */ "VFPCLASSPDZrrk\0" |
| 52318 | /* 126328 */ "VCOMPRESSPDZrrk\0" |
| 52319 | /* 126344 */ "VMOVUPDZrrk\0" |
| 52320 | /* 126356 */ "VDIVPDZrrk\0" |
| 52321 | /* 126367 */ "VMAXPDZrrk\0" |
| 52322 | /* 126378 */ "VPCMPEQDZrrk\0" |
| 52323 | /* 126391 */ "VPMOVUSQDZrrk\0" |
| 52324 | /* 126405 */ "VPMOVSQDZrrk\0" |
| 52325 | /* 126418 */ "VPMOVQDZrrk\0" |
| 52326 | /* 126430 */ "VPORDZrrk\0" |
| 52327 | /* 126440 */ "VPXORDZrrk\0" |
| 52328 | /* 126451 */ "VRCP14SDZrrk\0" |
| 52329 | /* 126464 */ "VRSQRT14SDZrrk\0" |
| 52330 | /* 126479 */ "VPABSDZrrk\0" |
| 52331 | /* 126490 */ "VSCALEFSDZrrk\0" |
| 52332 | /* 126504 */ "VPMINSDZrrk\0" |
| 52333 | /* 126516 */ "VPCOMPRESSDZrrk\0" |
| 52334 | /* 126532 */ "VFPCLASSSDZrrk\0" |
| 52335 | /* 126547 */ "VBROADCASTSDZrrk\0" |
| 52336 | /* 126564 */ "VMOVSDZrrk\0" |
| 52337 | /* 126575 */ "VPMAXSDZrrk\0" |
| 52338 | /* 126587 */ "VPCONFLICTDZrrk\0" |
| 52339 | /* 126603 */ "VPCMPGTDZrrk\0" |
| 52340 | /* 126616 */ "VPOPCNTDZrrk\0" |
| 52341 | /* 126629 */ "VPLZCNTDZrrk\0" |
| 52342 | /* 126642 */ "VPBROADCASTDZrrk\0" |
| 52343 | /* 126659 */ "VPMINUDZrrk\0" |
| 52344 | /* 126671 */ "VPMAXUDZrrk\0" |
| 52345 | /* 126683 */ "VPSRAVDZrrk\0" |
| 52346 | /* 126695 */ "VPSLLVDZrrk\0" |
| 52347 | /* 126707 */ "VPROLVDZrrk\0" |
| 52348 | /* 126719 */ "VPSRLVDZrrk\0" |
| 52349 | /* 126731 */ "VPRORVDZrrk\0" |
| 52350 | /* 126743 */ "VPMADDWDZrrk\0" |
| 52351 | /* 126756 */ "VPUNPCKHWDZrrk\0" |
| 52352 | /* 126771 */ "VPUNPCKLWDZrrk\0" |
| 52353 | /* 126786 */ "VPMOVSXWDZrrk\0" |
| 52354 | /* 126800 */ "VPMOVZXWDZrrk\0" |
| 52355 | /* 126814 */ "VCVTPD2PHZrrk\0" |
| 52356 | /* 126828 */ "VCVTDQ2PHZrrk\0" |
| 52357 | /* 126842 */ "VCVTUDQ2PHZrrk\0" |
| 52358 | /* 126857 */ "VCVTQQ2PHZrrk\0" |
| 52359 | /* 126871 */ "VCVTUQQ2PHZrrk\0" |
| 52360 | /* 126886 */ "VCVTPS2PHZrrk\0" |
| 52361 | /* 126900 */ "VCVTW2PHZrrk\0" |
| 52362 | /* 126913 */ "VCVTUW2PHZrrk\0" |
| 52363 | /* 126927 */ "VSUBPHZrrk\0" |
| 52364 | /* 126938 */ "VFCMULCPHZrrk\0" |
| 52365 | /* 126952 */ "VFMULCPHZrrk\0" |
| 52366 | /* 126965 */ "VMINCPHZrrk\0" |
| 52367 | /* 126977 */ "VMAXCPHZrrk\0" |
| 52368 | /* 126989 */ "VADDPHZrrk\0" |
| 52369 | /* 127000 */ "VSCALEFPHZrrk\0" |
| 52370 | /* 127014 */ "VMULPHZrrk\0" |
| 52371 | /* 127025 */ "VMINPHZrrk\0" |
| 52372 | /* 127036 */ "VFPCLASSPHZrrk\0" |
| 52373 | /* 127051 */ "VDIVPHZrrk\0" |
| 52374 | /* 127062 */ "VMAXPHZrrk\0" |
| 52375 | /* 127073 */ "VFCMULCSHZrrk\0" |
| 52376 | /* 127087 */ "VFMULCSHZrrk\0" |
| 52377 | /* 127100 */ "VSCALEFSHZrrk\0" |
| 52378 | /* 127114 */ "VRCPSHZrrk\0" |
| 52379 | /* 127125 */ "VFPCLASSSHZrrk\0" |
| 52380 | /* 127140 */ "VRSQRTSHZrrk\0" |
| 52381 | /* 127153 */ "VMOVSHZrrk\0" |
| 52382 | /* 127164 */ "VMOVDDUPZrrk\0" |
| 52383 | /* 127177 */ "VMOVSHDUPZrrk\0" |
| 52384 | /* 127191 */ "VMOVSLDUPZrrk\0" |
| 52385 | /* 127205 */ "VPERMI2QZrrk\0" |
| 52386 | /* 127218 */ "VPERMT2QZrrk\0" |
| 52387 | /* 127231 */ "VPSRAQZrrk\0" |
| 52388 | /* 127242 */ "VPSUBQZrrk\0" |
| 52389 | /* 127253 */ "VPMOVSXBQZrrk\0" |
| 52390 | /* 127267 */ "VPMOVZXBQZrrk\0" |
| 52391 | /* 127281 */ "VCVTTPD2DQZrrk\0" |
| 52392 | /* 127296 */ "VCVTPD2DQZrrk\0" |
| 52393 | /* 127310 */ "VCVTTPH2DQZrrk\0" |
| 52394 | /* 127325 */ "VCVTPH2DQZrrk\0" |
| 52395 | /* 127339 */ "VCVTTPS2DQZrrk\0" |
| 52396 | /* 127354 */ "VCVTPS2DQZrrk\0" |
| 52397 | /* 127368 */ "VPADDQZrrk\0" |
| 52398 | /* 127379 */ "VPUNPCKHDQZrrk\0" |
| 52399 | /* 127394 */ "VPUNPCKLDQZrrk\0" |
| 52400 | /* 127409 */ "VPMULDQZrrk\0" |
| 52401 | /* 127421 */ "VPANDQZrrk\0" |
| 52402 | /* 127432 */ "VPEXPANDQZrrk\0" |
| 52403 | /* 127446 */ "VPUNPCKHQDQZrrk\0" |
| 52404 | /* 127462 */ "VPUNPCKLQDQZrrk\0" |
| 52405 | /* 127478 */ "VCVTTPD2UDQZrrk\0" |
| 52406 | /* 127494 */ "VCVTPD2UDQZrrk\0" |
| 52407 | /* 127509 */ "VCVTTPH2UDQZrrk\0" |
| 52408 | /* 127525 */ "VCVTPH2UDQZrrk\0" |
| 52409 | /* 127540 */ "VCVTTPS2UDQZrrk\0" |
| 52410 | /* 127556 */ "VCVTPS2UDQZrrk\0" |
| 52411 | /* 127571 */ "VPMULUDQZrrk\0" |
| 52412 | /* 127584 */ "VPMOVSXDQZrrk\0" |
| 52413 | /* 127598 */ "VPMOVZXDQZrrk\0" |
| 52414 | /* 127612 */ "VPSLLQZrrk\0" |
| 52415 | /* 127623 */ "VPMULLQZrrk\0" |
| 52416 | /* 127635 */ "VPSRLQZrrk\0" |
| 52417 | /* 127646 */ "VPBLENDMQZrrk\0" |
| 52418 | /* 127660 */ "VPTESTNMQZrrk\0" |
| 52419 | /* 127674 */ "VPERMQZrrk\0" |
| 52420 | /* 127685 */ "VPTESTMQZrrk\0" |
| 52421 | /* 127698 */ "VPANDNQZrrk\0" |
| 52422 | /* 127710 */ "VCVTTPD2QQZrrk\0" |
| 52423 | /* 127725 */ "VCVTPD2QQZrrk\0" |
| 52424 | /* 127739 */ "VCVTTPH2QQZrrk\0" |
| 52425 | /* 127754 */ "VCVTPH2QQZrrk\0" |
| 52426 | /* 127768 */ "VCVTTPS2QQZrrk\0" |
| 52427 | /* 127783 */ "VCVTPS2QQZrrk\0" |
| 52428 | /* 127797 */ "VPCMPEQQZrrk\0" |
| 52429 | /* 127810 */ "VCVTTPD2UQQZrrk\0" |
| 52430 | /* 127826 */ "VCVTPD2UQQZrrk\0" |
| 52431 | /* 127841 */ "VCVTTPH2UQQZrrk\0" |
| 52432 | /* 127857 */ "VCVTPH2UQQZrrk\0" |
| 52433 | /* 127872 */ "VCVTTPS2UQQZrrk\0" |
| 52434 | /* 127888 */ "VCVTPS2UQQZrrk\0" |
| 52435 | /* 127903 */ "VPORQZrrk\0" |
| 52436 | /* 127913 */ "VPXORQZrrk\0" |
| 52437 | /* 127924 */ "VPABSQZrrk\0" |
| 52438 | /* 127935 */ "VPMINSQZrrk\0" |
| 52439 | /* 127947 */ "VPCOMPRESSQZrrk\0" |
| 52440 | /* 127963 */ "VPMAXSQZrrk\0" |
| 52441 | /* 127975 */ "VPCONFLICTQZrrk\0" |
| 52442 | /* 127991 */ "VPCMPGTQZrrk\0" |
| 52443 | /* 128004 */ "VPOPCNTQZrrk\0" |
| 52444 | /* 128017 */ "VPLZCNTQZrrk\0" |
| 52445 | /* 128030 */ "VPBROADCASTQZrrk\0" |
| 52446 | /* 128047 */ "VPMINUQZrrk\0" |
| 52447 | /* 128059 */ "VPMAXUQZrrk\0" |
| 52448 | /* 128071 */ "VPSRAVQZrrk\0" |
| 52449 | /* 128083 */ "VPSLLVQZrrk\0" |
| 52450 | /* 128095 */ "VPROLVQZrrk\0" |
| 52451 | /* 128107 */ "VPSRLVQZrrk\0" |
| 52452 | /* 128119 */ "VPRORVQZrrk\0" |
| 52453 | /* 128131 */ "VPMOVSXWQZrrk\0" |
| 52454 | /* 128145 */ "VPMOVZXWQZrrk\0" |
| 52455 | /* 128159 */ "VCVTPD2PSZrrk\0" |
| 52456 | /* 128173 */ "VCVTPH2PSZrrk\0" |
| 52457 | /* 128187 */ "VPERMI2PSZrrk\0" |
| 52458 | /* 128201 */ "VCVTDQ2PSZrrk\0" |
| 52459 | /* 128215 */ "VCVTUDQ2PSZrrk\0" |
| 52460 | /* 128230 */ "VCVTQQ2PSZrrk\0" |
| 52461 | /* 128244 */ "VCVTUQQ2PSZrrk\0" |
| 52462 | /* 128259 */ "VPERMT2PSZrrk\0" |
| 52463 | /* 128273 */ "VMOVAPSZrrk\0" |
| 52464 | /* 128285 */ "VSUBPSZrrk\0" |
| 52465 | /* 128296 */ "VMINCPSZrrk\0" |
| 52466 | /* 128308 */ "VMAXCPSZrrk\0" |
| 52467 | /* 128320 */ "VADDPSZrrk\0" |
| 52468 | /* 128331 */ "VEXPANDPSZrrk\0" |
| 52469 | /* 128345 */ "VANDPSZrrk\0" |
| 52470 | /* 128356 */ "VSCALEFPSZrrk\0" |
| 52471 | /* 128370 */ "VUNPCKHPSZrrk\0" |
| 52472 | /* 128384 */ "VPERMILPSZrrk\0" |
| 52473 | /* 128398 */ "VUNPCKLPSZrrk\0" |
| 52474 | /* 128412 */ "VMULPSZrrk\0" |
| 52475 | /* 128423 */ "VBLENDMPSZrrk\0" |
| 52476 | /* 128437 */ "VPERMPSZrrk\0" |
| 52477 | /* 128449 */ "VANDNPSZrrk\0" |
| 52478 | /* 128461 */ "VMINPSZrrk\0" |
| 52479 | /* 128472 */ "VORPSZrrk\0" |
| 52480 | /* 128482 */ "VXORPSZrrk\0" |
| 52481 | /* 128493 */ "VFPCLASSPSZrrk\0" |
| 52482 | /* 128508 */ "VCOMPRESSPSZrrk\0" |
| 52483 | /* 128524 */ "VMOVUPSZrrk\0" |
| 52484 | /* 128536 */ "VDIVPSZrrk\0" |
| 52485 | /* 128547 */ "VMAXPSZrrk\0" |
| 52486 | /* 128558 */ "VRCP14SSZrrk\0" |
| 52487 | /* 128571 */ "VRSQRT14SSZrrk\0" |
| 52488 | /* 128586 */ "VSCALEFSSZrrk\0" |
| 52489 | /* 128600 */ "VFPCLASSSSZrrk\0" |
| 52490 | /* 128615 */ "VBROADCASTSSZrrk\0" |
| 52491 | /* 128632 */ "VMOVSSZrrk\0" |
| 52492 | /* 128643 */ "VCVTTPH2WZrrk\0" |
| 52493 | /* 128657 */ "VCVTPH2WZrrk\0" |
| 52494 | /* 128670 */ "VPERMI2WZrrk\0" |
| 52495 | /* 128683 */ "VPERMT2WZrrk\0" |
| 52496 | /* 128696 */ "VPSRAWZrrk\0" |
| 52497 | /* 128707 */ "VPUNPCKHBWZrrk\0" |
| 52498 | /* 128722 */ "VPUNPCKLBWZrrk\0" |
| 52499 | /* 128737 */ "VPSUBWZrrk\0" |
| 52500 | /* 128748 */ "VPMOVSXBWZrrk\0" |
| 52501 | /* 128762 */ "VPMOVZXBWZrrk\0" |
| 52502 | /* 128776 */ "VPADDWZrrk\0" |
| 52503 | /* 128787 */ "VPEXPANDWZrrk\0" |
| 52504 | /* 128801 */ "VPACKSSDWZrrk\0" |
| 52505 | /* 128815 */ "VPACKUSDWZrrk\0" |
| 52506 | /* 128829 */ "VPMOVUSDWZrrk\0" |
| 52507 | /* 128843 */ "VPMOVSDWZrrk\0" |
| 52508 | /* 128856 */ "VPMOVDWZrrk\0" |
| 52509 | /* 128868 */ "VPAVGWZrrk\0" |
| 52510 | /* 128879 */ "VPMULHWZrrk\0" |
| 52511 | /* 128891 */ "VPSLLWZrrk\0" |
| 52512 | /* 128902 */ "VPMULLWZrrk\0" |
| 52513 | /* 128914 */ "VPSRLWZrrk\0" |
| 52514 | /* 128925 */ "VPBLENDMWZrrk\0" |
| 52515 | /* 128939 */ "VPTESTNMWZrrk\0" |
| 52516 | /* 128953 */ "VPERMWZrrk\0" |
| 52517 | /* 128964 */ "VPTESTMWZrrk\0" |
| 52518 | /* 128977 */ "VPCMPEQWZrrk\0" |
| 52519 | /* 128990 */ "VPMOVUSQWZrrk\0" |
| 52520 | /* 129004 */ "VPMOVSQWZrrk\0" |
| 52521 | /* 129017 */ "VPMOVQWZrrk\0" |
| 52522 | /* 129029 */ "VPABSWZrrk\0" |
| 52523 | /* 129040 */ "VPMADDUBSWZrrk\0" |
| 52524 | /* 129055 */ "VPSUBSWZrrk\0" |
| 52525 | /* 129067 */ "VPADDSWZrrk\0" |
| 52526 | /* 129079 */ "VPMINSWZrrk\0" |
| 52527 | /* 129091 */ "VPMULHRSWZrrk\0" |
| 52528 | /* 129105 */ "VPCOMPRESSWZrrk\0" |
| 52529 | /* 129121 */ "VPSUBUSWZrrk\0" |
| 52530 | /* 129134 */ "VPADDUSWZrrk\0" |
| 52531 | /* 129147 */ "VPMAXSWZrrk\0" |
| 52532 | /* 129159 */ "VPCMPGTWZrrk\0" |
| 52533 | /* 129172 */ "VPOPCNTWZrrk\0" |
| 52534 | /* 129185 */ "VPBROADCASTWZrrk\0" |
| 52535 | /* 129202 */ "VCVTTPH2UWZrrk\0" |
| 52536 | /* 129217 */ "VCVTPH2UWZrrk\0" |
| 52537 | /* 129231 */ "VPMULHUWZrrk\0" |
| 52538 | /* 129244 */ "VPMINUWZrrk\0" |
| 52539 | /* 129256 */ "VPMAXUWZrrk\0" |
| 52540 | /* 129268 */ "VPSRAVWZrrk\0" |
| 52541 | /* 129280 */ "VPSLLVWZrrk\0" |
| 52542 | /* 129292 */ "VPSRLVWZrrk\0" |
| 52543 | /* 129304 */ "VCVTPS2PHXZrrk\0" |
| 52544 | /* 129319 */ "VCVTPH2PSXZrrk\0" |
| 52545 | /* 129334 */ "VPBROADCASTBrZrrk\0" |
| 52546 | /* 129352 */ "VPBROADCASTDrZrrk\0" |
| 52547 | /* 129370 */ "VPBROADCASTQrZrrk\0" |
| 52548 | /* 129388 */ "VPBROADCASTWrZrrk\0" |
| 52549 | /* 129406 */ "VCMPSDZrrib_Intk\0" |
| 52550 | /* 129423 */ "VCMPSHZrrib_Intk\0" |
| 52551 | /* 129440 */ "VCMPSSZrrib_Intk\0" |
| 52552 | /* 129457 */ "VFMSUB231SDZrb_Intk\0" |
| 52553 | /* 129477 */ "VFNMSUB231SDZrb_Intk\0" |
| 52554 | /* 129498 */ "VFMADD231SDZrb_Intk\0" |
| 52555 | /* 129518 */ "VFNMADD231SDZrb_Intk\0" |
| 52556 | /* 129539 */ "VFMSUB132SDZrb_Intk\0" |
| 52557 | /* 129559 */ "VFNMSUB132SDZrb_Intk\0" |
| 52558 | /* 129580 */ "VFMADD132SDZrb_Intk\0" |
| 52559 | /* 129600 */ "VFNMADD132SDZrb_Intk\0" |
| 52560 | /* 129621 */ "VFMSUB213SDZrb_Intk\0" |
| 52561 | /* 129641 */ "VFNMSUB213SDZrb_Intk\0" |
| 52562 | /* 129662 */ "VFMADD213SDZrb_Intk\0" |
| 52563 | /* 129682 */ "VFNMADD213SDZrb_Intk\0" |
| 52564 | /* 129703 */ "VRNDSCALESDZrb_Intk\0" |
| 52565 | /* 129723 */ "VSQRTSDZrb_Intk\0" |
| 52566 | /* 129739 */ "VFMSUB231SHZrb_Intk\0" |
| 52567 | /* 129759 */ "VFNMSUB231SHZrb_Intk\0" |
| 52568 | /* 129780 */ "VFMADD231SHZrb_Intk\0" |
| 52569 | /* 129800 */ "VFNMADD231SHZrb_Intk\0" |
| 52570 | /* 129821 */ "VFMSUB132SHZrb_Intk\0" |
| 52571 | /* 129841 */ "VFNMSUB132SHZrb_Intk\0" |
| 52572 | /* 129862 */ "VFMADD132SHZrb_Intk\0" |
| 52573 | /* 129882 */ "VFNMADD132SHZrb_Intk\0" |
| 52574 | /* 129903 */ "VFMSUB213SHZrb_Intk\0" |
| 52575 | /* 129923 */ "VFNMSUB213SHZrb_Intk\0" |
| 52576 | /* 129944 */ "VFMADD213SHZrb_Intk\0" |
| 52577 | /* 129964 */ "VFNMADD213SHZrb_Intk\0" |
| 52578 | /* 129985 */ "VRNDSCALESHZrb_Intk\0" |
| 52579 | /* 130005 */ "VSQRTSHZrb_Intk\0" |
| 52580 | /* 130021 */ "VFMSUB231SSZrb_Intk\0" |
| 52581 | /* 130041 */ "VFNMSUB231SSZrb_Intk\0" |
| 52582 | /* 130062 */ "VFMADD231SSZrb_Intk\0" |
| 52583 | /* 130082 */ "VFNMADD231SSZrb_Intk\0" |
| 52584 | /* 130103 */ "VFMSUB132SSZrb_Intk\0" |
| 52585 | /* 130123 */ "VFNMSUB132SSZrb_Intk\0" |
| 52586 | /* 130144 */ "VFMADD132SSZrb_Intk\0" |
| 52587 | /* 130164 */ "VFNMADD132SSZrb_Intk\0" |
| 52588 | /* 130185 */ "VFMSUB213SSZrb_Intk\0" |
| 52589 | /* 130205 */ "VFNMSUB213SSZrb_Intk\0" |
| 52590 | /* 130226 */ "VFMADD213SSZrb_Intk\0" |
| 52591 | /* 130246 */ "VFNMADD213SSZrb_Intk\0" |
| 52592 | /* 130267 */ "VRNDSCALESSZrb_Intk\0" |
| 52593 | /* 130287 */ "VSQRTSSZrb_Intk\0" |
| 52594 | /* 130303 */ "VCVTSH2SDZrrb_Intk\0" |
| 52595 | /* 130322 */ "VCVTSS2SDZrrb_Intk\0" |
| 52596 | /* 130341 */ "VSUBSDZrrb_Intk\0" |
| 52597 | /* 130357 */ "VADDSDZrrb_Intk\0" |
| 52598 | /* 130373 */ "VSCALEFSDZrrb_Intk\0" |
| 52599 | /* 130392 */ "VMULSDZrrb_Intk\0" |
| 52600 | /* 130408 */ "VMINSDZrrb_Intk\0" |
| 52601 | /* 130424 */ "VDIVSDZrrb_Intk\0" |
| 52602 | /* 130440 */ "VMAXSDZrrb_Intk\0" |
| 52603 | /* 130456 */ "VCVTSD2SHZrrb_Intk\0" |
| 52604 | /* 130475 */ "VCVTSS2SHZrrb_Intk\0" |
| 52605 | /* 130494 */ "VSUBSHZrrb_Intk\0" |
| 52606 | /* 130510 */ "VADDSHZrrb_Intk\0" |
| 52607 | /* 130526 */ "VSCALEFSHZrrb_Intk\0" |
| 52608 | /* 130545 */ "VMULSHZrrb_Intk\0" |
| 52609 | /* 130561 */ "VMINSHZrrb_Intk\0" |
| 52610 | /* 130577 */ "VDIVSHZrrb_Intk\0" |
| 52611 | /* 130593 */ "VMAXSHZrrb_Intk\0" |
| 52612 | /* 130609 */ "VCVTSD2SSZrrb_Intk\0" |
| 52613 | /* 130628 */ "VCVTSH2SSZrrb_Intk\0" |
| 52614 | /* 130647 */ "VSUBSSZrrb_Intk\0" |
| 52615 | /* 130663 */ "VADDSSZrrb_Intk\0" |
| 52616 | /* 130679 */ "VSCALEFSSZrrb_Intk\0" |
| 52617 | /* 130698 */ "VMULSSZrrb_Intk\0" |
| 52618 | /* 130714 */ "VMINSSZrrb_Intk\0" |
| 52619 | /* 130730 */ "VDIVSSZrrb_Intk\0" |
| 52620 | /* 130746 */ "VMAXSSZrrb_Intk\0" |
| 52621 | /* 130762 */ "VCMPSDZrmi_Intk\0" |
| 52622 | /* 130778 */ "VCMPSHZrmi_Intk\0" |
| 52623 | /* 130794 */ "VCMPSSZrmi_Intk\0" |
| 52624 | /* 130810 */ "VCMPSDZrri_Intk\0" |
| 52625 | /* 130826 */ "VCMPSHZrri_Intk\0" |
| 52626 | /* 130842 */ "VCMPSSZrri_Intk\0" |
| 52627 | /* 130858 */ "VFMSUB231SDZm_Intk\0" |
| 52628 | /* 130877 */ "VFNMSUB231SDZm_Intk\0" |
| 52629 | /* 130897 */ "VFMADD231SDZm_Intk\0" |
| 52630 | /* 130916 */ "VFNMADD231SDZm_Intk\0" |
| 52631 | /* 130936 */ "VFMSUB132SDZm_Intk\0" |
| 52632 | /* 130955 */ "VFNMSUB132SDZm_Intk\0" |
| 52633 | /* 130975 */ "VFMADD132SDZm_Intk\0" |
| 52634 | /* 130994 */ "VFNMADD132SDZm_Intk\0" |
| 52635 | /* 131014 */ "VFMSUB213SDZm_Intk\0" |
| 52636 | /* 131033 */ "VFNMSUB213SDZm_Intk\0" |
| 52637 | /* 131053 */ "VFMADD213SDZm_Intk\0" |
| 52638 | /* 131072 */ "VFNMADD213SDZm_Intk\0" |
| 52639 | /* 131092 */ "VRNDSCALESDZm_Intk\0" |
| 52640 | /* 131111 */ "VSQRTSDZm_Intk\0" |
| 52641 | /* 131126 */ "VFMSUB231SHZm_Intk\0" |
| 52642 | /* 131145 */ "VFNMSUB231SHZm_Intk\0" |
| 52643 | /* 131165 */ "VFMADD231SHZm_Intk\0" |
| 52644 | /* 131184 */ "VFNMADD231SHZm_Intk\0" |
| 52645 | /* 131204 */ "VFMSUB132SHZm_Intk\0" |
| 52646 | /* 131223 */ "VFNMSUB132SHZm_Intk\0" |
| 52647 | /* 131243 */ "VFMADD132SHZm_Intk\0" |
| 52648 | /* 131262 */ "VFNMADD132SHZm_Intk\0" |
| 52649 | /* 131282 */ "VFMSUB213SHZm_Intk\0" |
| 52650 | /* 131301 */ "VFNMSUB213SHZm_Intk\0" |
| 52651 | /* 131321 */ "VFMADD213SHZm_Intk\0" |
| 52652 | /* 131340 */ "VFNMADD213SHZm_Intk\0" |
| 52653 | /* 131360 */ "VRNDSCALESHZm_Intk\0" |
| 52654 | /* 131379 */ "VSQRTSHZm_Intk\0" |
| 52655 | /* 131394 */ "VFMSUB231SSZm_Intk\0" |
| 52656 | /* 131413 */ "VFNMSUB231SSZm_Intk\0" |
| 52657 | /* 131433 */ "VFMADD231SSZm_Intk\0" |
| 52658 | /* 131452 */ "VFNMADD231SSZm_Intk\0" |
| 52659 | /* 131472 */ "VFMSUB132SSZm_Intk\0" |
| 52660 | /* 131491 */ "VFNMSUB132SSZm_Intk\0" |
| 52661 | /* 131511 */ "VFMADD132SSZm_Intk\0" |
| 52662 | /* 131530 */ "VFNMADD132SSZm_Intk\0" |
| 52663 | /* 131550 */ "VFMSUB213SSZm_Intk\0" |
| 52664 | /* 131569 */ "VFNMSUB213SSZm_Intk\0" |
| 52665 | /* 131589 */ "VFMADD213SSZm_Intk\0" |
| 52666 | /* 131608 */ "VFNMADD213SSZm_Intk\0" |
| 52667 | /* 131628 */ "VRNDSCALESSZm_Intk\0" |
| 52668 | /* 131647 */ "VSQRTSSZm_Intk\0" |
| 52669 | /* 131662 */ "VCVTSH2SDZrm_Intk\0" |
| 52670 | /* 131680 */ "VCVTSS2SDZrm_Intk\0" |
| 52671 | /* 131698 */ "VSUBSDZrm_Intk\0" |
| 52672 | /* 131713 */ "VADDSDZrm_Intk\0" |
| 52673 | /* 131728 */ "VMULSDZrm_Intk\0" |
| 52674 | /* 131743 */ "VMINSDZrm_Intk\0" |
| 52675 | /* 131758 */ "VDIVSDZrm_Intk\0" |
| 52676 | /* 131773 */ "VMAXSDZrm_Intk\0" |
| 52677 | /* 131788 */ "VCVTSD2SHZrm_Intk\0" |
| 52678 | /* 131806 */ "VCVTSS2SHZrm_Intk\0" |
| 52679 | /* 131824 */ "VSUBSHZrm_Intk\0" |
| 52680 | /* 131839 */ "VADDSHZrm_Intk\0" |
| 52681 | /* 131854 */ "VMULSHZrm_Intk\0" |
| 52682 | /* 131869 */ "VMINSHZrm_Intk\0" |
| 52683 | /* 131884 */ "VDIVSHZrm_Intk\0" |
| 52684 | /* 131899 */ "VMAXSHZrm_Intk\0" |
| 52685 | /* 131914 */ "VCVTSD2SSZrm_Intk\0" |
| 52686 | /* 131932 */ "VCVTSH2SSZrm_Intk\0" |
| 52687 | /* 131950 */ "VSUBSSZrm_Intk\0" |
| 52688 | /* 131965 */ "VADDSSZrm_Intk\0" |
| 52689 | /* 131980 */ "VMULSSZrm_Intk\0" |
| 52690 | /* 131995 */ "VMINSSZrm_Intk\0" |
| 52691 | /* 132010 */ "VDIVSSZrm_Intk\0" |
| 52692 | /* 132025 */ "VMAXSSZrm_Intk\0" |
| 52693 | /* 132040 */ "VFMSUB231SDZr_Intk\0" |
| 52694 | /* 132059 */ "VFNMSUB231SDZr_Intk\0" |
| 52695 | /* 132079 */ "VFMADD231SDZr_Intk\0" |
| 52696 | /* 132098 */ "VFNMADD231SDZr_Intk\0" |
| 52697 | /* 132118 */ "VFMSUB132SDZr_Intk\0" |
| 52698 | /* 132137 */ "VFNMSUB132SDZr_Intk\0" |
| 52699 | /* 132157 */ "VFMADD132SDZr_Intk\0" |
| 52700 | /* 132176 */ "VFNMADD132SDZr_Intk\0" |
| 52701 | /* 132196 */ "VFMSUB213SDZr_Intk\0" |
| 52702 | /* 132215 */ "VFNMSUB213SDZr_Intk\0" |
| 52703 | /* 132235 */ "VFMADD213SDZr_Intk\0" |
| 52704 | /* 132254 */ "VFNMADD213SDZr_Intk\0" |
| 52705 | /* 132274 */ "VRNDSCALESDZr_Intk\0" |
| 52706 | /* 132293 */ "VSQRTSDZr_Intk\0" |
| 52707 | /* 132308 */ "VFMSUB231SHZr_Intk\0" |
| 52708 | /* 132327 */ "VFNMSUB231SHZr_Intk\0" |
| 52709 | /* 132347 */ "VFMADD231SHZr_Intk\0" |
| 52710 | /* 132366 */ "VFNMADD231SHZr_Intk\0" |
| 52711 | /* 132386 */ "VFMSUB132SHZr_Intk\0" |
| 52712 | /* 132405 */ "VFNMSUB132SHZr_Intk\0" |
| 52713 | /* 132425 */ "VFMADD132SHZr_Intk\0" |
| 52714 | /* 132444 */ "VFNMADD132SHZr_Intk\0" |
| 52715 | /* 132464 */ "VFMSUB213SHZr_Intk\0" |
| 52716 | /* 132483 */ "VFNMSUB213SHZr_Intk\0" |
| 52717 | /* 132503 */ "VFMADD213SHZr_Intk\0" |
| 52718 | /* 132522 */ "VFNMADD213SHZr_Intk\0" |
| 52719 | /* 132542 */ "VRNDSCALESHZr_Intk\0" |
| 52720 | /* 132561 */ "VSQRTSHZr_Intk\0" |
| 52721 | /* 132576 */ "VFMSUB231SSZr_Intk\0" |
| 52722 | /* 132595 */ "VFNMSUB231SSZr_Intk\0" |
| 52723 | /* 132615 */ "VFMADD231SSZr_Intk\0" |
| 52724 | /* 132634 */ "VFNMADD231SSZr_Intk\0" |
| 52725 | /* 132654 */ "VFMSUB132SSZr_Intk\0" |
| 52726 | /* 132673 */ "VFNMSUB132SSZr_Intk\0" |
| 52727 | /* 132693 */ "VFMADD132SSZr_Intk\0" |
| 52728 | /* 132712 */ "VFNMADD132SSZr_Intk\0" |
| 52729 | /* 132732 */ "VFMSUB213SSZr_Intk\0" |
| 52730 | /* 132751 */ "VFNMSUB213SSZr_Intk\0" |
| 52731 | /* 132771 */ "VFMADD213SSZr_Intk\0" |
| 52732 | /* 132790 */ "VFNMADD213SSZr_Intk\0" |
| 52733 | /* 132810 */ "VRNDSCALESSZr_Intk\0" |
| 52734 | /* 132829 */ "VSQRTSSZr_Intk\0" |
| 52735 | /* 132844 */ "VCVTSH2SDZrr_Intk\0" |
| 52736 | /* 132862 */ "VCVTSS2SDZrr_Intk\0" |
| 52737 | /* 132880 */ "VSUBSDZrr_Intk\0" |
| 52738 | /* 132895 */ "VADDSDZrr_Intk\0" |
| 52739 | /* 132910 */ "VMULSDZrr_Intk\0" |
| 52740 | /* 132925 */ "VMINSDZrr_Intk\0" |
| 52741 | /* 132940 */ "VDIVSDZrr_Intk\0" |
| 52742 | /* 132955 */ "VMAXSDZrr_Intk\0" |
| 52743 | /* 132970 */ "VCVTSD2SHZrr_Intk\0" |
| 52744 | /* 132988 */ "VCVTSS2SHZrr_Intk\0" |
| 52745 | /* 133006 */ "VSUBSHZrr_Intk\0" |
| 52746 | /* 133021 */ "VADDSHZrr_Intk\0" |
| 52747 | /* 133036 */ "VMULSHZrr_Intk\0" |
| 52748 | /* 133051 */ "VMINSHZrr_Intk\0" |
| 52749 | /* 133066 */ "VDIVSHZrr_Intk\0" |
| 52750 | /* 133081 */ "VMAXSHZrr_Intk\0" |
| 52751 | /* 133096 */ "VCVTSD2SSZrr_Intk\0" |
| 52752 | /* 133114 */ "VCVTSH2SSZrr_Intk\0" |
| 52753 | /* 133132 */ "VSUBSSZrr_Intk\0" |
| 52754 | /* 133147 */ "VADDSSZrr_Intk\0" |
| 52755 | /* 133162 */ "VMULSSZrr_Intk\0" |
| 52756 | /* 133177 */ "VMINSSZrr_Intk\0" |
| 52757 | /* 133192 */ "VDIVSSZrr_Intk\0" |
| 52758 | /* 133207 */ "VMAXSSZrr_Intk\0" |
| 52759 | /* 133222 */ "LD_F80m\0" |
| 52760 | /* 133230 */ "ST_FP80m\0" |
| 52761 | /* 133239 */ "ST_FpP80m\0" |
| 52762 | /* 133249 */ "LD_Fp80m\0" |
| 52763 | /* 133258 */ "LOCK_DEC32m\0" |
| 52764 | /* 133270 */ "LOCK_INC32m\0" |
| 52765 | /* 133282 */ "LOCK_BTC32m\0" |
| 52766 | /* 133294 */ "SUB_F32m\0" |
| 52767 | /* 133303 */ "ADD_F32m\0" |
| 52768 | /* 133312 */ "ILD_F32m\0" |
| 52769 | /* 133321 */ "MUL_F32m\0" |
| 52770 | /* 133330 */ "SUBR_F32m\0" |
| 52771 | /* 133340 */ "DIVR_F32m\0" |
| 52772 | /* 133350 */ "IST_F32m\0" |
| 52773 | /* 133359 */ "DIV_F32m\0" |
| 52774 | /* 133368 */ "NEG32m\0" |
| 52775 | /* 133375 */ "SUB_FI32m\0" |
| 52776 | /* 133385 */ "ADD_FI32m\0" |
| 52777 | /* 133395 */ "MUL_FI32m\0" |
| 52778 | /* 133405 */ "SUBR_FI32m\0" |
| 52779 | /* 133416 */ "DIVR_FI32m\0" |
| 52780 | /* 133427 */ "DIV_FI32m\0" |
| 52781 | /* 133437 */ "FARCALL32m\0" |
| 52782 | /* 133448 */ "IMUL32m\0" |
| 52783 | /* 133456 */ "FCOM32m\0" |
| 52784 | /* 133464 */ "FICOM32m\0" |
| 52785 | /* 133473 */ "IST_FP32m\0" |
| 52786 | /* 133483 */ "ISTT_FP32m\0" |
| 52787 | /* 133494 */ "FARJMP32m\0" |
| 52788 | /* 133504 */ "FCOMP32m\0" |
| 52789 | /* 133513 */ "FICOMP32m\0" |
| 52790 | /* 133523 */ "ST_FpP32m\0" |
| 52791 | /* 133533 */ "LOCK_BTR32m\0" |
| 52792 | /* 133545 */ "LOCK_BTS32m\0" |
| 52793 | /* 133557 */ "LGDT32m\0" |
| 52794 | /* 133565 */ "SGDT32m\0" |
| 52795 | /* 133573 */ "LIDT32m\0" |
| 52796 | /* 133581 */ "SIDT32m\0" |
| 52797 | /* 133589 */ "NOT32m\0" |
| 52798 | /* 133596 */ "IDIV32m\0" |
| 52799 | /* 133604 */ "SUB_Fp32m\0" |
| 52800 | /* 133614 */ "ADD_Fp32m\0" |
| 52801 | /* 133624 */ "LD_Fp32m\0" |
| 52802 | /* 133633 */ "MUL_Fp32m\0" |
| 52803 | /* 133643 */ "SUBR_Fp32m\0" |
| 52804 | /* 133654 */ "DIVR_Fp32m\0" |
| 52805 | /* 133665 */ "ST_Fp32m\0" |
| 52806 | /* 133674 */ "DIV_Fp32m\0" |
| 52807 | /* 133684 */ "LOCK_DEC64m\0" |
| 52808 | /* 133696 */ "LOCK_INC64m\0" |
| 52809 | /* 133708 */ "LOCK_BTC64m\0" |
| 52810 | /* 133720 */ "PTWRITE64m\0" |
| 52811 | /* 133731 */ "SUB_F64m\0" |
| 52812 | /* 133740 */ "ADD_F64m\0" |
| 52813 | /* 133749 */ "ILD_F64m\0" |
| 52814 | /* 133758 */ "MUL_F64m\0" |
| 52815 | /* 133767 */ "SUBR_F64m\0" |
| 52816 | /* 133777 */ "DIVR_F64m\0" |
| 52817 | /* 133787 */ "ST_F64m\0" |
| 52818 | /* 133795 */ "DIV_F64m\0" |
| 52819 | /* 133804 */ "NEG64m\0" |
| 52820 | /* 133811 */ "FARCALL64m\0" |
| 52821 | /* 133822 */ "IMUL64m\0" |
| 52822 | /* 133830 */ "FCOM64m\0" |
| 52823 | /* 133838 */ "IST_FP64m\0" |
| 52824 | /* 133848 */ "ISTT_FP64m\0" |
| 52825 | /* 133859 */ "FARJMP64m\0" |
| 52826 | /* 133869 */ "FCOMP64m\0" |
| 52827 | /* 133878 */ "ST_FpP64m\0" |
| 52828 | /* 133888 */ "LOCK_BTR64m\0" |
| 52829 | /* 133900 */ "LOCK_BTS64m\0" |
| 52830 | /* 133912 */ "LGDT64m\0" |
| 52831 | /* 133920 */ "SGDT64m\0" |
| 52832 | /* 133928 */ "LIDT64m\0" |
| 52833 | /* 133936 */ "SIDT64m\0" |
| 52834 | /* 133944 */ "NOT64m\0" |
| 52835 | /* 133951 */ "IDIV64m\0" |
| 52836 | /* 133959 */ "SUB_Fp64m\0" |
| 52837 | /* 133969 */ "ADD_Fp64m\0" |
| 52838 | /* 133979 */ "LD_Fp64m\0" |
| 52839 | /* 133988 */ "MUL_Fp64m\0" |
| 52840 | /* 133998 */ "SUBR_Fp64m\0" |
| 52841 | /* 134009 */ "DIVR_Fp64m\0" |
| 52842 | /* 134020 */ "ST_Fp64m\0" |
| 52843 | /* 134029 */ "DIV_Fp64m\0" |
| 52844 | /* 134039 */ "LOCK_DEC16m\0" |
| 52845 | /* 134051 */ "LOCK_INC16m\0" |
| 52846 | /* 134063 */ "LOCK_BTC16m\0" |
| 52847 | /* 134075 */ "ILD_F16m\0" |
| 52848 | /* 134084 */ "IST_F16m\0" |
| 52849 | /* 134093 */ "NEG16m\0" |
| 52850 | /* 134100 */ "SUB_FI16m\0" |
| 52851 | /* 134110 */ "ADD_FI16m\0" |
| 52852 | /* 134120 */ "MUL_FI16m\0" |
| 52853 | /* 134130 */ "SUBR_FI16m\0" |
| 52854 | /* 134141 */ "DIVR_FI16m\0" |
| 52855 | /* 134152 */ "DIV_FI16m\0" |
| 52856 | /* 134162 */ "FARCALL16m\0" |
| 52857 | /* 134173 */ "IMUL16m\0" |
| 52858 | /* 134181 */ "FICOM16m\0" |
| 52859 | /* 134190 */ "IST_FP16m\0" |
| 52860 | /* 134200 */ "ISTT_FP16m\0" |
| 52861 | /* 134211 */ "FARJMP16m\0" |
| 52862 | /* 134221 */ "FICOMP16m\0" |
| 52863 | /* 134231 */ "LOCK_BTR16m\0" |
| 52864 | /* 134243 */ "LKGS16m\0" |
| 52865 | /* 134251 */ "LOCK_BTS16m\0" |
| 52866 | /* 134263 */ "LGDT16m\0" |
| 52867 | /* 134271 */ "SGDT16m\0" |
| 52868 | /* 134279 */ "LIDT16m\0" |
| 52869 | /* 134287 */ "SIDT16m\0" |
| 52870 | /* 134295 */ "LLDT16m\0" |
| 52871 | /* 134303 */ "SLDT16m\0" |
| 52872 | /* 134311 */ "NOT16m\0" |
| 52873 | /* 134318 */ "IDIV16m\0" |
| 52874 | /* 134326 */ "FLDCW16m\0" |
| 52875 | /* 134335 */ "FNSTCW16m\0" |
| 52876 | /* 134345 */ "LMSW16m\0" |
| 52877 | /* 134353 */ "SMSW16m\0" |
| 52878 | /* 134361 */ "VFMADDSUB231PDZ256m\0" |
| 52879 | /* 134381 */ "VFMSUB231PDZ256m\0" |
| 52880 | /* 134398 */ "VFNMSUB231PDZ256m\0" |
| 52881 | /* 134416 */ "VFMSUBADD231PDZ256m\0" |
| 52882 | /* 134436 */ "VFMADD231PDZ256m\0" |
| 52883 | /* 134453 */ "VFNMADD231PDZ256m\0" |
| 52884 | /* 134471 */ "VFMADDSUB132PDZ256m\0" |
| 52885 | /* 134491 */ "VFMSUB132PDZ256m\0" |
| 52886 | /* 134508 */ "VFNMSUB132PDZ256m\0" |
| 52887 | /* 134526 */ "VFMSUBADD132PDZ256m\0" |
| 52888 | /* 134546 */ "VFMADD132PDZ256m\0" |
| 52889 | /* 134563 */ "VFNMADD132PDZ256m\0" |
| 52890 | /* 134581 */ "VFMADDSUB213PDZ256m\0" |
| 52891 | /* 134601 */ "VFMSUB213PDZ256m\0" |
| 52892 | /* 134618 */ "VFNMSUB213PDZ256m\0" |
| 52893 | /* 134636 */ "VFMSUBADD213PDZ256m\0" |
| 52894 | /* 134656 */ "VFMADD213PDZ256m\0" |
| 52895 | /* 134673 */ "VFNMADD213PDZ256m\0" |
| 52896 | /* 134691 */ "VRCP14PDZ256m\0" |
| 52897 | /* 134705 */ "VRSQRT14PDZ256m\0" |
| 52898 | /* 134721 */ "VGETEXPPDZ256m\0" |
| 52899 | /* 134736 */ "VSQRTPDZ256m\0" |
| 52900 | /* 134749 */ "VPDPWSSDZ256m\0" |
| 52901 | /* 134763 */ "VPDPBUSDZ256m\0" |
| 52902 | /* 134777 */ "VPSHLDVDZ256m\0" |
| 52903 | /* 134791 */ "VPSHRDVDZ256m\0" |
| 52904 | /* 134805 */ "VFMADDSUB231PHZ256m\0" |
| 52905 | /* 134825 */ "VFMSUB231PHZ256m\0" |
| 52906 | /* 134842 */ "VFNMSUB231PHZ256m\0" |
| 52907 | /* 134860 */ "VFMSUBADD231PHZ256m\0" |
| 52908 | /* 134880 */ "VFMADD231PHZ256m\0" |
| 52909 | /* 134897 */ "VFNMADD231PHZ256m\0" |
| 52910 | /* 134915 */ "VFMADDSUB132PHZ256m\0" |
| 52911 | /* 134935 */ "VFMSUB132PHZ256m\0" |
| 52912 | /* 134952 */ "VFNMSUB132PHZ256m\0" |
| 52913 | /* 134970 */ "VFMSUBADD132PHZ256m\0" |
| 52914 | /* 134990 */ "VFMADD132PHZ256m\0" |
| 52915 | /* 135007 */ "VFNMADD132PHZ256m\0" |
| 52916 | /* 135025 */ "VFMADDSUB213PHZ256m\0" |
| 52917 | /* 135045 */ "VFMSUB213PHZ256m\0" |
| 52918 | /* 135062 */ "VFNMSUB213PHZ256m\0" |
| 52919 | /* 135080 */ "VFMSUBADD213PHZ256m\0" |
| 52920 | /* 135100 */ "VFMADD213PHZ256m\0" |
| 52921 | /* 135117 */ "VFNMADD213PHZ256m\0" |
| 52922 | /* 135135 */ "VFCMADDCPHZ256m\0" |
| 52923 | /* 135151 */ "VFMADDCPHZ256m\0" |
| 52924 | /* 135166 */ "VRCPPHZ256m\0" |
| 52925 | /* 135178 */ "VGETEXPPHZ256m\0" |
| 52926 | /* 135193 */ "VRSQRTPHZ256m\0" |
| 52927 | /* 135207 */ "VSQRTPHZ256m\0" |
| 52928 | /* 135220 */ "VPMADD52HUQZ256m\0" |
| 52929 | /* 135237 */ "VPMADD52LUQZ256m\0" |
| 52930 | /* 135254 */ "VPSHLDVQZ256m\0" |
| 52931 | /* 135268 */ "VPSHRDVQZ256m\0" |
| 52932 | /* 135282 */ "VPDPWSSDSZ256m\0" |
| 52933 | /* 135297 */ "VPDPBUSDSZ256m\0" |
| 52934 | /* 135312 */ "VFMADDSUB231PSZ256m\0" |
| 52935 | /* 135332 */ "VFMSUB231PSZ256m\0" |
| 52936 | /* 135349 */ "VFNMSUB231PSZ256m\0" |
| 52937 | /* 135367 */ "VFMSUBADD231PSZ256m\0" |
| 52938 | /* 135387 */ "VFMADD231PSZ256m\0" |
| 52939 | /* 135404 */ "VFNMADD231PSZ256m\0" |
| 52940 | /* 135422 */ "VFMADDSUB132PSZ256m\0" |
| 52941 | /* 135442 */ "VFMSUB132PSZ256m\0" |
| 52942 | /* 135459 */ "VFNMSUB132PSZ256m\0" |
| 52943 | /* 135477 */ "VFMSUBADD132PSZ256m\0" |
| 52944 | /* 135497 */ "VFMADD132PSZ256m\0" |
| 52945 | /* 135514 */ "VFNMADD132PSZ256m\0" |
| 52946 | /* 135532 */ "VFMADDSUB213PSZ256m\0" |
| 52947 | /* 135552 */ "VFMSUB213PSZ256m\0" |
| 52948 | /* 135569 */ "VFNMSUB213PSZ256m\0" |
| 52949 | /* 135587 */ "VFMSUBADD213PSZ256m\0" |
| 52950 | /* 135607 */ "VFMADD213PSZ256m\0" |
| 52951 | /* 135624 */ "VFNMADD213PSZ256m\0" |
| 52952 | /* 135642 */ "VRCP14PSZ256m\0" |
| 52953 | /* 135656 */ "VRSQRT14PSZ256m\0" |
| 52954 | /* 135672 */ "VDPBF16PSZ256m\0" |
| 52955 | /* 135687 */ "VGETEXPPSZ256m\0" |
| 52956 | /* 135702 */ "VSQRTPSZ256m\0" |
| 52957 | /* 135715 */ "VPSHLDVWZ256m\0" |
| 52958 | /* 135729 */ "VPSHRDVWZ256m\0" |
| 52959 | /* 135743 */ "VFMADDSUB231PDZ128m\0" |
| 52960 | /* 135763 */ "VFMSUB231PDZ128m\0" |
| 52961 | /* 135780 */ "VFNMSUB231PDZ128m\0" |
| 52962 | /* 135798 */ "VFMSUBADD231PDZ128m\0" |
| 52963 | /* 135818 */ "VFMADD231PDZ128m\0" |
| 52964 | /* 135835 */ "VFNMADD231PDZ128m\0" |
| 52965 | /* 135853 */ "VFMADDSUB132PDZ128m\0" |
| 52966 | /* 135873 */ "VFMSUB132PDZ128m\0" |
| 52967 | /* 135890 */ "VFNMSUB132PDZ128m\0" |
| 52968 | /* 135908 */ "VFMSUBADD132PDZ128m\0" |
| 52969 | /* 135928 */ "VFMADD132PDZ128m\0" |
| 52970 | /* 135945 */ "VFNMADD132PDZ128m\0" |
| 52971 | /* 135963 */ "VFMADDSUB213PDZ128m\0" |
| 52972 | /* 135983 */ "VFMSUB213PDZ128m\0" |
| 52973 | /* 136000 */ "VFNMSUB213PDZ128m\0" |
| 52974 | /* 136018 */ "VFMSUBADD213PDZ128m\0" |
| 52975 | /* 136038 */ "VFMADD213PDZ128m\0" |
| 52976 | /* 136055 */ "VFNMADD213PDZ128m\0" |
| 52977 | /* 136073 */ "VRCP14PDZ128m\0" |
| 52978 | /* 136087 */ "VRSQRT14PDZ128m\0" |
| 52979 | /* 136103 */ "VGETEXPPDZ128m\0" |
| 52980 | /* 136118 */ "VSQRTPDZ128m\0" |
| 52981 | /* 136131 */ "VPDPWSSDZ128m\0" |
| 52982 | /* 136145 */ "VPDPBUSDZ128m\0" |
| 52983 | /* 136159 */ "VPSHLDVDZ128m\0" |
| 52984 | /* 136173 */ "VPSHRDVDZ128m\0" |
| 52985 | /* 136187 */ "VFMADDSUB231PHZ128m\0" |
| 52986 | /* 136207 */ "VFMSUB231PHZ128m\0" |
| 52987 | /* 136224 */ "VFNMSUB231PHZ128m\0" |
| 52988 | /* 136242 */ "VFMSUBADD231PHZ128m\0" |
| 52989 | /* 136262 */ "VFMADD231PHZ128m\0" |
| 52990 | /* 136279 */ "VFNMADD231PHZ128m\0" |
| 52991 | /* 136297 */ "VFMADDSUB132PHZ128m\0" |
| 52992 | /* 136317 */ "VFMSUB132PHZ128m\0" |
| 52993 | /* 136334 */ "VFNMSUB132PHZ128m\0" |
| 52994 | /* 136352 */ "VFMSUBADD132PHZ128m\0" |
| 52995 | /* 136372 */ "VFMADD132PHZ128m\0" |
| 52996 | /* 136389 */ "VFNMADD132PHZ128m\0" |
| 52997 | /* 136407 */ "VFMADDSUB213PHZ128m\0" |
| 52998 | /* 136427 */ "VFMSUB213PHZ128m\0" |
| 52999 | /* 136444 */ "VFNMSUB213PHZ128m\0" |
| 53000 | /* 136462 */ "VFMSUBADD213PHZ128m\0" |
| 53001 | /* 136482 */ "VFMADD213PHZ128m\0" |
| 53002 | /* 136499 */ "VFNMADD213PHZ128m\0" |
| 53003 | /* 136517 */ "VFCMADDCPHZ128m\0" |
| 53004 | /* 136533 */ "VFMADDCPHZ128m\0" |
| 53005 | /* 136548 */ "VRCPPHZ128m\0" |
| 53006 | /* 136560 */ "VGETEXPPHZ128m\0" |
| 53007 | /* 136575 */ "VRSQRTPHZ128m\0" |
| 53008 | /* 136589 */ "VSQRTPHZ128m\0" |
| 53009 | /* 136602 */ "VPMADD52HUQZ128m\0" |
| 53010 | /* 136619 */ "VPMADD52LUQZ128m\0" |
| 53011 | /* 136636 */ "VPSHLDVQZ128m\0" |
| 53012 | /* 136650 */ "VPSHRDVQZ128m\0" |
| 53013 | /* 136664 */ "VPDPWSSDSZ128m\0" |
| 53014 | /* 136679 */ "VPDPBUSDSZ128m\0" |
| 53015 | /* 136694 */ "VFMADDSUB231PSZ128m\0" |
| 53016 | /* 136714 */ "VFMSUB231PSZ128m\0" |
| 53017 | /* 136731 */ "VFNMSUB231PSZ128m\0" |
| 53018 | /* 136749 */ "VFMSUBADD231PSZ128m\0" |
| 53019 | /* 136769 */ "VFMADD231PSZ128m\0" |
| 53020 | /* 136786 */ "VFNMADD231PSZ128m\0" |
| 53021 | /* 136804 */ "VFMADDSUB132PSZ128m\0" |
| 53022 | /* 136824 */ "VFMSUB132PSZ128m\0" |
| 53023 | /* 136841 */ "VFNMSUB132PSZ128m\0" |
| 53024 | /* 136859 */ "VFMSUBADD132PSZ128m\0" |
| 53025 | /* 136879 */ "VFMADD132PSZ128m\0" |
| 53026 | /* 136896 */ "VFNMADD132PSZ128m\0" |
| 53027 | /* 136914 */ "VFMADDSUB213PSZ128m\0" |
| 53028 | /* 136934 */ "VFMSUB213PSZ128m\0" |
| 53029 | /* 136951 */ "VFNMSUB213PSZ128m\0" |
| 53030 | /* 136969 */ "VFMSUBADD213PSZ128m\0" |
| 53031 | /* 136989 */ "VFMADD213PSZ128m\0" |
| 53032 | /* 137006 */ "VFNMADD213PSZ128m\0" |
| 53033 | /* 137024 */ "VRCP14PSZ128m\0" |
| 53034 | /* 137038 */ "VRSQRT14PSZ128m\0" |
| 53035 | /* 137054 */ "VDPBF16PSZ128m\0" |
| 53036 | /* 137069 */ "VGETEXPPSZ128m\0" |
| 53037 | /* 137084 */ "VSQRTPSZ128m\0" |
| 53038 | /* 137097 */ "VPSHLDVWZ128m\0" |
| 53039 | /* 137111 */ "VPSHRDVWZ128m\0" |
| 53040 | /* 137125 */ "LOCK_DEC8m\0" |
| 53041 | /* 137136 */ "LOCK_INC8m\0" |
| 53042 | /* 137147 */ "NEG8m\0" |
| 53043 | /* 137153 */ "IMUL8m\0" |
| 53044 | /* 137160 */ "NOT8m\0" |
| 53045 | /* 137166 */ "IDIV8m\0" |
| 53046 | /* 137173 */ "SETCCm\0" |
| 53047 | /* 137180 */ "SETZUCCm\0" |
| 53048 | /* 137189 */ "FBLDm\0" |
| 53049 | /* 137195 */ "VMPTRLDm\0" |
| 53050 | /* 137204 */ "VFMADDSUB231PDm\0" |
| 53051 | /* 137220 */ "VFMSUB231PDm\0" |
| 53052 | /* 137233 */ "VFNMSUB231PDm\0" |
| 53053 | /* 137247 */ "VFMSUBADD231PDm\0" |
| 53054 | /* 137263 */ "VFMADD231PDm\0" |
| 53055 | /* 137276 */ "VFNMADD231PDm\0" |
| 53056 | /* 137290 */ "VFMADDSUB132PDm\0" |
| 53057 | /* 137306 */ "VFMSUB132PDm\0" |
| 53058 | /* 137319 */ "VFNMSUB132PDm\0" |
| 53059 | /* 137333 */ "VFMSUBADD132PDm\0" |
| 53060 | /* 137349 */ "VFMADD132PDm\0" |
| 53061 | /* 137362 */ "VFNMADD132PDm\0" |
| 53062 | /* 137376 */ "VFMADDSUB213PDm\0" |
| 53063 | /* 137392 */ "VFMSUB213PDm\0" |
| 53064 | /* 137405 */ "VFNMSUB213PDm\0" |
| 53065 | /* 137419 */ "VFMSUBADD213PDm\0" |
| 53066 | /* 137435 */ "VFMADD213PDm\0" |
| 53067 | /* 137448 */ "VFNMADD213PDm\0" |
| 53068 | /* 137462 */ "VGATHERPF0DPDm\0" |
| 53069 | /* 137477 */ "VSCATTERPF0DPDm\0" |
| 53070 | /* 137493 */ "VGATHERPF1DPDm\0" |
| 53071 | /* 137508 */ "VSCATTERPF1DPDm\0" |
| 53072 | /* 137524 */ "VGATHERPF0QPDm\0" |
| 53073 | /* 137539 */ "VSCATTERPF0QPDm\0" |
| 53074 | /* 137555 */ "VGATHERPF1QPDm\0" |
| 53075 | /* 137570 */ "VSCATTERPF1QPDm\0" |
| 53076 | /* 137586 */ "VSQRTPDm\0" |
| 53077 | /* 137595 */ "VFMSUB231SDm\0" |
| 53078 | /* 137608 */ "VFNMSUB231SDm\0" |
| 53079 | /* 137622 */ "VFMADD231SDm\0" |
| 53080 | /* 137635 */ "VFNMADD231SDm\0" |
| 53081 | /* 137649 */ "VFMSUB132SDm\0" |
| 53082 | /* 137662 */ "VFNMSUB132SDm\0" |
| 53083 | /* 137676 */ "VFMADD132SDm\0" |
| 53084 | /* 137689 */ "VFNMADD132SDm\0" |
| 53085 | /* 137703 */ "VFMSUB213SDm\0" |
| 53086 | /* 137716 */ "VFNMSUB213SDm\0" |
| 53087 | /* 137730 */ "VFMADD213SDm\0" |
| 53088 | /* 137743 */ "VFNMADD213SDm\0" |
| 53089 | /* 137757 */ "VSQRTSDm\0" |
| 53090 | /* 137766 */ "PTWRITEm\0" |
| 53091 | /* 137775 */ "FSAVEm\0" |
| 53092 | /* 137782 */ "UD1Lm\0" |
| 53093 | /* 137788 */ "TAILJMPm\0" |
| 53094 | /* 137797 */ "FBSTPm\0" |
| 53095 | /* 137804 */ "UD1Qm\0" |
| 53096 | /* 137810 */ "VMCLEARm\0" |
| 53097 | /* 137819 */ "FRSTORm\0" |
| 53098 | /* 137827 */ "VERRm\0" |
| 53099 | /* 137833 */ "LTRm\0" |
| 53100 | /* 137838 */ "STRm\0" |
| 53101 | /* 137843 */ "VFMADDSUB231PSm\0" |
| 53102 | /* 137859 */ "VFMSUB231PSm\0" |
| 53103 | /* 137872 */ "VFNMSUB231PSm\0" |
| 53104 | /* 137886 */ "VFMSUBADD231PSm\0" |
| 53105 | /* 137902 */ "VFMADD231PSm\0" |
| 53106 | /* 137915 */ "VFNMADD231PSm\0" |
| 53107 | /* 137929 */ "VFMADDSUB132PSm\0" |
| 53108 | /* 137945 */ "VFMSUB132PSm\0" |
| 53109 | /* 137958 */ "VFNMSUB132PSm\0" |
| 53110 | /* 137972 */ "VFMSUBADD132PSm\0" |
| 53111 | /* 137988 */ "VFMADD132PSm\0" |
| 53112 | /* 138001 */ "VFNMADD132PSm\0" |
| 53113 | /* 138015 */ "VFMADDSUB213PSm\0" |
| 53114 | /* 138031 */ "VFMSUB213PSm\0" |
| 53115 | /* 138044 */ "VFNMSUB213PSm\0" |
| 53116 | /* 138058 */ "VFMSUBADD213PSm\0" |
| 53117 | /* 138074 */ "VFMADD213PSm\0" |
| 53118 | /* 138087 */ "VFNMADD213PSm\0" |
| 53119 | /* 138101 */ "VGATHERPF0DPSm\0" |
| 53120 | /* 138116 */ "VSCATTERPF0DPSm\0" |
| 53121 | /* 138132 */ "VGATHERPF1DPSm\0" |
| 53122 | /* 138147 */ "VSCATTERPF1DPSm\0" |
| 53123 | /* 138163 */ "VRCPPSm\0" |
| 53124 | /* 138171 */ "VGATHERPF0QPSm\0" |
| 53125 | /* 138186 */ "VSCATTERPF0QPSm\0" |
| 53126 | /* 138202 */ "VGATHERPF1QPSm\0" |
| 53127 | /* 138217 */ "VSCATTERPF1QPSm\0" |
| 53128 | /* 138233 */ "VRSQRTPSm\0" |
| 53129 | /* 138243 */ "VSQRTPSm\0" |
| 53130 | /* 138252 */ "VFMSUB231SSm\0" |
| 53131 | /* 138265 */ "VFNMSUB231SSm\0" |
| 53132 | /* 138279 */ "VFMADD231SSm\0" |
| 53133 | /* 138292 */ "VFNMADD231SSm\0" |
| 53134 | /* 138306 */ "VFMSUB132SSm\0" |
| 53135 | /* 138319 */ "VFNMSUB132SSm\0" |
| 53136 | /* 138333 */ "VFMADD132SSm\0" |
| 53137 | /* 138346 */ "VFNMADD132SSm\0" |
| 53138 | /* 138360 */ "VFMSUB213SSm\0" |
| 53139 | /* 138373 */ "VFNMSUB213SSm\0" |
| 53140 | /* 138387 */ "VFMADD213SSm\0" |
| 53141 | /* 138400 */ "VFNMADD213SSm\0" |
| 53142 | /* 138414 */ "VRCPSSm\0" |
| 53143 | /* 138422 */ "VRSQRTSSm\0" |
| 53144 | /* 138432 */ "VSQRTSSm\0" |
| 53145 | /* 138441 */ "VMPTRSTm\0" |
| 53146 | /* 138450 */ "FLDENVm\0" |
| 53147 | /* 138458 */ "FSTENVm\0" |
| 53148 | /* 138466 */ "UD1Wm\0" |
| 53149 | /* 138472 */ "VERWm\0" |
| 53150 | /* 138478 */ "FNSTSWm\0" |
| 53151 | /* 138486 */ "VFMADDSUB231PDYm\0" |
| 53152 | /* 138503 */ "VFMSUB231PDYm\0" |
| 53153 | /* 138517 */ "VFNMSUB231PDYm\0" |
| 53154 | /* 138532 */ "VFMSUBADD231PDYm\0" |
| 53155 | /* 138549 */ "VFMADD231PDYm\0" |
| 53156 | /* 138563 */ "VFNMADD231PDYm\0" |
| 53157 | /* 138578 */ "VFMADDSUB132PDYm\0" |
| 53158 | /* 138595 */ "VFMSUB132PDYm\0" |
| 53159 | /* 138609 */ "VFNMSUB132PDYm\0" |
| 53160 | /* 138624 */ "VFMSUBADD132PDYm\0" |
| 53161 | /* 138641 */ "VFMADD132PDYm\0" |
| 53162 | /* 138655 */ "VFNMADD132PDYm\0" |
| 53163 | /* 138670 */ "VFMADDSUB213PDYm\0" |
| 53164 | /* 138687 */ "VFMSUB213PDYm\0" |
| 53165 | /* 138701 */ "VFNMSUB213PDYm\0" |
| 53166 | /* 138716 */ "VFMSUBADD213PDYm\0" |
| 53167 | /* 138733 */ "VFMADD213PDYm\0" |
| 53168 | /* 138747 */ "VFNMADD213PDYm\0" |
| 53169 | /* 138762 */ "VSQRTPDYm\0" |
| 53170 | /* 138772 */ "VFMADDSUB231PSYm\0" |
| 53171 | /* 138789 */ "VFMSUB231PSYm\0" |
| 53172 | /* 138803 */ "VFNMSUB231PSYm\0" |
| 53173 | /* 138818 */ "VFMSUBADD231PSYm\0" |
| 53174 | /* 138835 */ "VFMADD231PSYm\0" |
| 53175 | /* 138849 */ "VFNMADD231PSYm\0" |
| 53176 | /* 138864 */ "VFMADDSUB132PSYm\0" |
| 53177 | /* 138881 */ "VFMSUB132PSYm\0" |
| 53178 | /* 138895 */ "VFNMSUB132PSYm\0" |
| 53179 | /* 138910 */ "VFMSUBADD132PSYm\0" |
| 53180 | /* 138927 */ "VFMADD132PSYm\0" |
| 53181 | /* 138941 */ "VFNMADD132PSYm\0" |
| 53182 | /* 138956 */ "VFMADDSUB213PSYm\0" |
| 53183 | /* 138973 */ "VFMSUB213PSYm\0" |
| 53184 | /* 138987 */ "VFNMSUB213PSYm\0" |
| 53185 | /* 139002 */ "VFMSUBADD213PSYm\0" |
| 53186 | /* 139019 */ "VFMADD213PSYm\0" |
| 53187 | /* 139033 */ "VFNMADD213PSYm\0" |
| 53188 | /* 139048 */ "VRCPPSYm\0" |
| 53189 | /* 139057 */ "VRSQRTPSYm\0" |
| 53190 | /* 139068 */ "VSQRTPSYm\0" |
| 53191 | /* 139078 */ "VFMADDSUB231PDZm\0" |
| 53192 | /* 139095 */ "VFMSUB231PDZm\0" |
| 53193 | /* 139109 */ "VFNMSUB231PDZm\0" |
| 53194 | /* 139124 */ "VFMSUBADD231PDZm\0" |
| 53195 | /* 139141 */ "VFMADD231PDZm\0" |
| 53196 | /* 139155 */ "VFNMADD231PDZm\0" |
| 53197 | /* 139170 */ "VFMADDSUB132PDZm\0" |
| 53198 | /* 139187 */ "VFMSUB132PDZm\0" |
| 53199 | /* 139201 */ "VFNMSUB132PDZm\0" |
| 53200 | /* 139216 */ "VFMSUBADD132PDZm\0" |
| 53201 | /* 139233 */ "VFMADD132PDZm\0" |
| 53202 | /* 139247 */ "VFNMADD132PDZm\0" |
| 53203 | /* 139262 */ "VEXP2PDZm\0" |
| 53204 | /* 139272 */ "VFMADDSUB213PDZm\0" |
| 53205 | /* 139289 */ "VFMSUB213PDZm\0" |
| 53206 | /* 139303 */ "VFNMSUB213PDZm\0" |
| 53207 | /* 139318 */ "VFMSUBADD213PDZm\0" |
| 53208 | /* 139335 */ "VFMADD213PDZm\0" |
| 53209 | /* 139349 */ "VFNMADD213PDZm\0" |
| 53210 | /* 139364 */ "VRCP14PDZm\0" |
| 53211 | /* 139375 */ "VRSQRT14PDZm\0" |
| 53212 | /* 139388 */ "VRCP28PDZm\0" |
| 53213 | /* 139399 */ "VRSQRT28PDZm\0" |
| 53214 | /* 139412 */ "VGETEXPPDZm\0" |
| 53215 | /* 139424 */ "VSQRTPDZm\0" |
| 53216 | /* 139434 */ "VFMSUB231SDZm\0" |
| 53217 | /* 139448 */ "VFNMSUB231SDZm\0" |
| 53218 | /* 139463 */ "VFMADD231SDZm\0" |
| 53219 | /* 139477 */ "VFNMADD231SDZm\0" |
| 53220 | /* 139492 */ "VFMSUB132SDZm\0" |
| 53221 | /* 139506 */ "VFNMSUB132SDZm\0" |
| 53222 | /* 139521 */ "VFMADD132SDZm\0" |
| 53223 | /* 139535 */ "VFNMADD132SDZm\0" |
| 53224 | /* 139550 */ "VFMSUB213SDZm\0" |
| 53225 | /* 139564 */ "VFNMSUB213SDZm\0" |
| 53226 | /* 139579 */ "VFMADD213SDZm\0" |
| 53227 | /* 139593 */ "VFNMADD213SDZm\0" |
| 53228 | /* 139608 */ "VRCP28SDZm\0" |
| 53229 | /* 139619 */ "VRSQRT28SDZm\0" |
| 53230 | /* 139632 */ "VRNDSCALESDZm\0" |
| 53231 | /* 139646 */ "VGETEXPSDZm\0" |
| 53232 | /* 139658 */ "VPDPWSSDZm\0" |
| 53233 | /* 139669 */ "VSQRTSDZm\0" |
| 53234 | /* 139679 */ "VPDPBUSDZm\0" |
| 53235 | /* 139690 */ "VPSHLDVDZm\0" |
| 53236 | /* 139701 */ "VPSHRDVDZm\0" |
| 53237 | /* 139712 */ "VFMADDSUB231PHZm\0" |
| 53238 | /* 139729 */ "VFMSUB231PHZm\0" |
| 53239 | /* 139743 */ "VFNMSUB231PHZm\0" |
| 53240 | /* 139758 */ "VFMSUBADD231PHZm\0" |
| 53241 | /* 139775 */ "VFMADD231PHZm\0" |
| 53242 | /* 139789 */ "VFNMADD231PHZm\0" |
| 53243 | /* 139804 */ "VFMADDSUB132PHZm\0" |
| 53244 | /* 139821 */ "VFMSUB132PHZm\0" |
| 53245 | /* 139835 */ "VFNMSUB132PHZm\0" |
| 53246 | /* 139850 */ "VFMSUBADD132PHZm\0" |
| 53247 | /* 139867 */ "VFMADD132PHZm\0" |
| 53248 | /* 139881 */ "VFNMADD132PHZm\0" |
| 53249 | /* 139896 */ "VFMADDSUB213PHZm\0" |
| 53250 | /* 139913 */ "VFMSUB213PHZm\0" |
| 53251 | /* 139927 */ "VFNMSUB213PHZm\0" |
| 53252 | /* 139942 */ "VFMSUBADD213PHZm\0" |
| 53253 | /* 139959 */ "VFMADD213PHZm\0" |
| 53254 | /* 139973 */ "VFNMADD213PHZm\0" |
| 53255 | /* 139988 */ "VFCMADDCPHZm\0" |
| 53256 | /* 140001 */ "VFMADDCPHZm\0" |
| 53257 | /* 140013 */ "VRCPPHZm\0" |
| 53258 | /* 140022 */ "VGETEXPPHZm\0" |
| 53259 | /* 140034 */ "VRSQRTPHZm\0" |
| 53260 | /* 140045 */ "VSQRTPHZm\0" |
| 53261 | /* 140055 */ "VFMSUB231SHZm\0" |
| 53262 | /* 140069 */ "VFNMSUB231SHZm\0" |
| 53263 | /* 140084 */ "VFMADD231SHZm\0" |
| 53264 | /* 140098 */ "VFNMADD231SHZm\0" |
| 53265 | /* 140113 */ "VFMSUB132SHZm\0" |
| 53266 | /* 140127 */ "VFNMSUB132SHZm\0" |
| 53267 | /* 140142 */ "VFMADD132SHZm\0" |
| 53268 | /* 140156 */ "VFNMADD132SHZm\0" |
| 53269 | /* 140171 */ "VFMSUB213SHZm\0" |
| 53270 | /* 140185 */ "VFNMSUB213SHZm\0" |
| 53271 | /* 140200 */ "VFMADD213SHZm\0" |
| 53272 | /* 140214 */ "VFNMADD213SHZm\0" |
| 53273 | /* 140229 */ "VFCMADDCSHZm\0" |
| 53274 | /* 140242 */ "VFMADDCSHZm\0" |
| 53275 | /* 140254 */ "VRNDSCALESHZm\0" |
| 53276 | /* 140268 */ "VGETEXPSHZm\0" |
| 53277 | /* 140280 */ "VSQRTSHZm\0" |
| 53278 | /* 140290 */ "VPMADD52HUQZm\0" |
| 53279 | /* 140304 */ "VPMADD52LUQZm\0" |
| 53280 | /* 140318 */ "VPSHLDVQZm\0" |
| 53281 | /* 140329 */ "VPSHRDVQZm\0" |
| 53282 | /* 140340 */ "VPDPWSSDSZm\0" |
| 53283 | /* 140352 */ "VPDPBUSDSZm\0" |
| 53284 | /* 140364 */ "VFMADDSUB231PSZm\0" |
| 53285 | /* 140381 */ "VFMSUB231PSZm\0" |
| 53286 | /* 140395 */ "VFNMSUB231PSZm\0" |
| 53287 | /* 140410 */ "VFMSUBADD231PSZm\0" |
| 53288 | /* 140427 */ "VFMADD231PSZm\0" |
| 53289 | /* 140441 */ "VFNMADD231PSZm\0" |
| 53290 | /* 140456 */ "VFMADDSUB132PSZm\0" |
| 53291 | /* 140473 */ "VFMSUB132PSZm\0" |
| 53292 | /* 140487 */ "VFNMSUB132PSZm\0" |
| 53293 | /* 140502 */ "VFMSUBADD132PSZm\0" |
| 53294 | /* 140519 */ "VFMADD132PSZm\0" |
| 53295 | /* 140533 */ "VFNMADD132PSZm\0" |
| 53296 | /* 140548 */ "VEXP2PSZm\0" |
| 53297 | /* 140558 */ "VFMADDSUB213PSZm\0" |
| 53298 | /* 140575 */ "VFMSUB213PSZm\0" |
| 53299 | /* 140589 */ "VFNMSUB213PSZm\0" |
| 53300 | /* 140604 */ "VFMSUBADD213PSZm\0" |
| 53301 | /* 140621 */ "VFMADD213PSZm\0" |
| 53302 | /* 140635 */ "VFNMADD213PSZm\0" |
| 53303 | /* 140650 */ "VRCP14PSZm\0" |
| 53304 | /* 140661 */ "VRSQRT14PSZm\0" |
| 53305 | /* 140674 */ "VDPBF16PSZm\0" |
| 53306 | /* 140686 */ "VRCP28PSZm\0" |
| 53307 | /* 140697 */ "VRSQRT28PSZm\0" |
| 53308 | /* 140710 */ "VGETEXPPSZm\0" |
| 53309 | /* 140722 */ "VSQRTPSZm\0" |
| 53310 | /* 140732 */ "VFMSUB231SSZm\0" |
| 53311 | /* 140746 */ "VFNMSUB231SSZm\0" |
| 53312 | /* 140761 */ "VFMADD231SSZm\0" |
| 53313 | /* 140775 */ "VFNMADD231SSZm\0" |
| 53314 | /* 140790 */ "VFMSUB132SSZm\0" |
| 53315 | /* 140804 */ "VFNMSUB132SSZm\0" |
| 53316 | /* 140819 */ "VFMADD132SSZm\0" |
| 53317 | /* 140833 */ "VFNMADD132SSZm\0" |
| 53318 | /* 140848 */ "VFMSUB213SSZm\0" |
| 53319 | /* 140862 */ "VFNMSUB213SSZm\0" |
| 53320 | /* 140877 */ "VFMADD213SSZm\0" |
| 53321 | /* 140891 */ "VFNMADD213SSZm\0" |
| 53322 | /* 140906 */ "VRCP28SSZm\0" |
| 53323 | /* 140917 */ "VRSQRT28SSZm\0" |
| 53324 | /* 140930 */ "VRNDSCALESSZm\0" |
| 53325 | /* 140944 */ "VGETEXPSSZm\0" |
| 53326 | /* 140956 */ "VSQRTSSZm\0" |
| 53327 | /* 140966 */ "VPSHLDVWZm\0" |
| 53328 | /* 140977 */ "VPSHRDVWZm\0" |
| 53329 | /* 140988 */ "KMOVBkm\0" |
| 53330 | /* 140996 */ "KMOVDkm\0" |
| 53331 | /* 141004 */ "KMOVQkm\0" |
| 53332 | /* 141012 */ "KMOVWkm\0" |
| 53333 | /* 141020 */ "PUSH32rmm\0" |
| 53334 | /* 141030 */ "POP32rmm\0" |
| 53335 | /* 141039 */ "PUSH64rmm\0" |
| 53336 | /* 141049 */ "POP64rmm\0" |
| 53337 | /* 141058 */ "PUSH16rmm\0" |
| 53338 | /* 141068 */ "POP16rmm\0" |
| 53339 | /* 141077 */ "SHA1MSG1rm\0" |
| 53340 | /* 141088 */ "VSM3MSG1rm\0" |
| 53341 | /* 141099 */ "SHA256MSG1rm\0" |
| 53342 | /* 141112 */ "PFRCPIT1rm\0" |
| 53343 | /* 141123 */ "PFRSQIT1rm\0" |
| 53344 | /* 141134 */ "SBB32rm\0" |
| 53345 | /* 141142 */ "SUB32rm\0" |
| 53346 | /* 141150 */ "ADC32rm\0" |
| 53347 | /* 141158 */ "BLCIC32rm\0" |
| 53348 | /* 141168 */ "BLSIC32rm\0" |
| 53349 | /* 141178 */ "T1MSKC32rm\0" |
| 53350 | /* 141189 */ "XADD32rm\0" |
| 53351 | /* 141198 */ "AND32rm\0" |
| 53352 | /* 141206 */ "MOVBE32rm\0" |
| 53353 | /* 141216 */ "VMWRITE32rm\0" |
| 53354 | /* 141228 */ "BSF32rm\0" |
| 53355 | /* 141236 */ "CMPXCHG32rm\0" |
| 53356 | /* 141248 */ "BLCI32rm\0" |
| 53357 | /* 141257 */ "BZHI32rm\0" |
| 53358 | /* 141266 */ "BLSI32rm\0" |
| 53359 | /* 141275 */ "BLCMSK32rm\0" |
| 53360 | /* 141286 */ "BLSMSK32rm\0" |
| 53361 | /* 141297 */ "TZMSK32rm\0" |
| 53362 | /* 141307 */ "BLCFILL32rm\0" |
| 53363 | /* 141319 */ "BLSFILL32rm\0" |
| 53364 | /* 141331 */ "LSL32rm\0" |
| 53365 | /* 141339 */ "IMUL32rm\0" |
| 53366 | /* 141348 */ "LOCK_BTC_RM32rm\0" |
| 53367 | /* 141364 */ "LOCK_BTR_RM32rm\0" |
| 53368 | /* 141380 */ "LOCK_BTS_RM32rm\0" |
| 53369 | /* 141396 */ "ANDN32rm\0" |
| 53370 | /* 141405 */ "PDEP32rm\0" |
| 53371 | /* 141414 */ "CCMP32rm\0" |
| 53372 | /* 141423 */ "LAR32rm\0" |
| 53373 | /* 141431 */ "XOR32rm\0" |
| 53374 | /* 141439 */ "BSR32rm\0" |
| 53375 | /* 141447 */ "BLSR32rm\0" |
| 53376 | /* 141456 */ "BEXTR32rm\0" |
| 53377 | /* 141466 */ "BLCS32rm\0" |
| 53378 | /* 141475 */ "LDS32rm\0" |
| 53379 | /* 141483 */ "BOUNDS32rm\0" |
| 53380 | /* 141494 */ "LES32rm\0" |
| 53381 | /* 141502 */ "LFS32rm\0" |
| 53382 | /* 141510 */ "LGS32rm\0" |
| 53383 | /* 141518 */ "LSS32rm\0" |
| 53384 | /* 141526 */ "POPCNT32rm\0" |
| 53385 | /* 141537 */ "LZCNT32rm\0" |
| 53386 | /* 141547 */ "TZCNT32rm\0" |
| 53387 | /* 141557 */ "PEXT32rm\0" |
| 53388 | /* 141566 */ "CFCMOV32rm\0" |
| 53389 | /* 141577 */ "ADCX32rm\0" |
| 53390 | /* 141586 */ "SHLX32rm\0" |
| 53391 | /* 141595 */ "MULX32rm\0" |
| 53392 | /* 141604 */ "ADOX32rm\0" |
| 53393 | /* 141613 */ "SARX32rm\0" |
| 53394 | /* 141622 */ "SHRX32rm\0" |
| 53395 | /* 141631 */ "SHA1MSG2rm\0" |
| 53396 | /* 141642 */ "VSM3MSG2rm\0" |
| 53397 | /* 141653 */ "SHA256MSG2rm\0" |
| 53398 | /* 141666 */ "VSM3RNDS2rm\0" |
| 53399 | /* 141678 */ "SHA256RNDS2rm\0" |
| 53400 | /* 141692 */ "PFRCPIT2rm\0" |
| 53401 | /* 141703 */ "VBROADCASTF64X2rm\0" |
| 53402 | /* 141721 */ "VBROADCASTI64X2rm\0" |
| 53403 | /* 141739 */ "SBB64rm\0" |
| 53404 | /* 141747 */ "SUB64rm\0" |
| 53405 | /* 141755 */ "ADC64rm\0" |
| 53406 | /* 141763 */ "BLCIC64rm\0" |
| 53407 | /* 141773 */ "BLSIC64rm\0" |
| 53408 | /* 141783 */ "T1MSKC64rm\0" |
| 53409 | /* 141794 */ "XADD64rm\0" |
| 53410 | /* 141803 */ "AND64rm\0" |
| 53411 | /* 141811 */ "MMX_MOVD64rm\0" |
| 53412 | /* 141824 */ "MOVBE64rm\0" |
| 53413 | /* 141834 */ "VMWRITE64rm\0" |
| 53414 | /* 141846 */ "BSF64rm\0" |
| 53415 | /* 141854 */ "CMPXCHG64rm\0" |
| 53416 | /* 141866 */ "BLCI64rm\0" |
| 53417 | /* 141875 */ "BZHI64rm\0" |
| 53418 | /* 141884 */ "VCVTTSD2SI64rm\0" |
| 53419 | /* 141899 */ "VCVTSD2SI64rm\0" |
| 53420 | /* 141913 */ "VCVTTSS2SI64rm\0" |
| 53421 | /* 141928 */ "VCVTSS2SI64rm\0" |
| 53422 | /* 141942 */ "BLSI64rm\0" |
| 53423 | /* 141951 */ "BLCMSK64rm\0" |
| 53424 | /* 141962 */ "BLSMSK64rm\0" |
| 53425 | /* 141973 */ "TZMSK64rm\0" |
| 53426 | /* 141983 */ "BLCFILL64rm\0" |
| 53427 | /* 141995 */ "BLSFILL64rm\0" |
| 53428 | /* 142007 */ "LSL64rm\0" |
| 53429 | /* 142015 */ "IMUL64rm\0" |
| 53430 | /* 142024 */ "LOCK_BTC_RM64rm\0" |
| 53431 | /* 142040 */ "LOCK_BTR_RM64rm\0" |
| 53432 | /* 142056 */ "LOCK_BTS_RM64rm\0" |
| 53433 | /* 142072 */ "ANDN64rm\0" |
| 53434 | /* 142081 */ "PDEP64rm\0" |
| 53435 | /* 142090 */ "CCMP64rm\0" |
| 53436 | /* 142099 */ "MMX_MOVQ64rm\0" |
| 53437 | /* 142112 */ "LAR64rm\0" |
| 53438 | /* 142120 */ "XOR64rm\0" |
| 53439 | /* 142128 */ "BSR64rm\0" |
| 53440 | /* 142136 */ "BLSR64rm\0" |
| 53441 | /* 142145 */ "BEXTR64rm\0" |
| 53442 | /* 142155 */ "BLCS64rm\0" |
| 53443 | /* 142164 */ "LFS64rm\0" |
| 53444 | /* 142172 */ "LGS64rm\0" |
| 53445 | /* 142180 */ "LSS64rm\0" |
| 53446 | /* 142188 */ "POPCNT64rm\0" |
| 53447 | /* 142199 */ "LZCNT64rm\0" |
| 53448 | /* 142209 */ "TZCNT64rm\0" |
| 53449 | /* 142219 */ "PEXT64rm\0" |
| 53450 | /* 142228 */ "CFCMOV64rm\0" |
| 53451 | /* 142239 */ "ADCX64rm\0" |
| 53452 | /* 142248 */ "SHLX64rm\0" |
| 53453 | /* 142257 */ "MULX64rm\0" |
| 53454 | /* 142266 */ "ADOX64rm\0" |
| 53455 | /* 142275 */ "SARX64rm\0" |
| 53456 | /* 142284 */ "SHRX64rm\0" |
| 53457 | /* 142293 */ "MMX_MOVD64to64rm\0" |
| 53458 | /* 142310 */ "VFMADDSUBPD4rm\0" |
| 53459 | /* 142325 */ "VFMSUBPD4rm\0" |
| 53460 | /* 142337 */ "VFNMSUBPD4rm\0" |
| 53461 | /* 142350 */ "VFMSUBADDPD4rm\0" |
| 53462 | /* 142365 */ "VFMADDPD4rm\0" |
| 53463 | /* 142377 */ "VFNMADDPD4rm\0" |
| 53464 | /* 142390 */ "VFMSUBSD4rm\0" |
| 53465 | /* 142402 */ "VFNMSUBSD4rm\0" |
| 53466 | /* 142415 */ "VFMADDSD4rm\0" |
| 53467 | /* 142427 */ "VFNMADDSD4rm\0" |
| 53468 | /* 142440 */ "VSM4RNDS4rm\0" |
| 53469 | /* 142452 */ "VFMADDSUBPS4rm\0" |
| 53470 | /* 142467 */ "VFMSUBPS4rm\0" |
| 53471 | /* 142479 */ "VFNMSUBPS4rm\0" |
| 53472 | /* 142492 */ "VFMSUBADDPS4rm\0" |
| 53473 | /* 142507 */ "VFMADDPS4rm\0" |
| 53474 | /* 142519 */ "VFNMADDPS4rm\0" |
| 53475 | /* 142532 */ "VFMSUBSS4rm\0" |
| 53476 | /* 142544 */ "VFNMSUBSS4rm\0" |
| 53477 | /* 142557 */ "VFMADDSS4rm\0" |
| 53478 | /* 142569 */ "VFNMADDSS4rm\0" |
| 53479 | /* 142582 */ "VBROADCASTF32X4rm\0" |
| 53480 | /* 142600 */ "VBROADCASTI32X4rm\0" |
| 53481 | /* 142618 */ "VBROADCASTF64X4rm\0" |
| 53482 | /* 142636 */ "VBROADCASTI64X4rm\0" |
| 53483 | /* 142654 */ "VSM4KEY4rm\0" |
| 53484 | /* 142665 */ "SBB16rm\0" |
| 53485 | /* 142673 */ "SUB16rm\0" |
| 53486 | /* 142681 */ "ADC16rm\0" |
| 53487 | /* 142689 */ "XADD16rm\0" |
| 53488 | /* 142698 */ "AND16rm\0" |
| 53489 | /* 142706 */ "MOVBE16rm\0" |
| 53490 | /* 142716 */ "VCVTNEPS2BF16rm\0" |
| 53491 | /* 142732 */ "BSF16rm\0" |
| 53492 | /* 142740 */ "CMPXCHG16rm\0" |
| 53493 | /* 142752 */ "LSL16rm\0" |
| 53494 | /* 142760 */ "IMUL16rm\0" |
| 53495 | /* 142769 */ "LOCK_BTC_RM16rm\0" |
| 53496 | /* 142785 */ "LOCK_BTR_RM16rm\0" |
| 53497 | /* 142801 */ "LOCK_BTS_RM16rm\0" |
| 53498 | /* 142817 */ "CCMP16rm\0" |
| 53499 | /* 142826 */ "LAR16rm\0" |
| 53500 | /* 142834 */ "XOR16rm\0" |
| 53501 | /* 142842 */ "BSR16rm\0" |
| 53502 | /* 142850 */ "LDS16rm\0" |
| 53503 | /* 142858 */ "BOUNDS16rm\0" |
| 53504 | /* 142869 */ "LES16rm\0" |
| 53505 | /* 142877 */ "LFS16rm\0" |
| 53506 | /* 142885 */ "LGS16rm\0" |
| 53507 | /* 142893 */ "LSS16rm\0" |
| 53508 | /* 142901 */ "POPCNT16rm\0" |
| 53509 | /* 142912 */ "LZCNT16rm\0" |
| 53510 | /* 142922 */ "TZCNT16rm\0" |
| 53511 | /* 142932 */ "CFCMOV16rm\0" |
| 53512 | /* 142943 */ "VMOVDQA32Z256rm\0" |
| 53513 | /* 142959 */ "VMOVDQU32Z256rm\0" |
| 53514 | /* 142975 */ "VBROADCASTF32X2Z256rm\0" |
| 53515 | /* 142997 */ "VBROADCASTI32X2Z256rm\0" |
| 53516 | /* 143019 */ "VINSERTF64x2Z256rm\0" |
| 53517 | /* 143038 */ "VINSERTI64x2Z256rm\0" |
| 53518 | /* 143057 */ "VMOVDQA64Z256rm\0" |
| 53519 | /* 143073 */ "VMOVDQU64Z256rm\0" |
| 53520 | /* 143089 */ "VBROADCASTF32X4Z256rm\0" |
| 53521 | /* 143111 */ "VBROADCASTI32X4Z256rm\0" |
| 53522 | /* 143133 */ "VINSERTF32x4Z256rm\0" |
| 53523 | /* 143152 */ "VINSERTI32x4Z256rm\0" |
| 53524 | /* 143171 */ "VCVTNE2PS2BF16Z256rm\0" |
| 53525 | /* 143192 */ "VCVTNEPS2BF16Z256rm\0" |
| 53526 | /* 143212 */ "VMOVDQU16Z256rm\0" |
| 53527 | /* 143228 */ "VMOVDQU8Z256rm\0" |
| 53528 | /* 143243 */ "VMOVNTDQAZ256rm\0" |
| 53529 | /* 143259 */ "VPERMI2BZ256rm\0" |
| 53530 | /* 143274 */ "VPERMT2BZ256rm\0" |
| 53531 | /* 143289 */ "VPSUBBZ256rm\0" |
| 53532 | /* 143302 */ "VPADDBZ256rm\0" |
| 53533 | /* 143315 */ "VPEXPANDBZ256rm\0" |
| 53534 | /* 143331 */ "VPSHUFBZ256rm\0" |
| 53535 | /* 143345 */ "VPAVGBZ256rm\0" |
| 53536 | /* 143358 */ "VGF2P8MULBZ256rm\0" |
| 53537 | /* 143375 */ "VPBLENDMBZ256rm\0" |
| 53538 | /* 143391 */ "VPTESTNMBZ256rm\0" |
| 53539 | /* 143407 */ "VPSHUFBITQMBZ256rm\0" |
| 53540 | /* 143426 */ "VPERMBZ256rm\0" |
| 53541 | /* 143439 */ "VPTESTMBZ256rm\0" |
| 53542 | /* 143454 */ "VPCMPEQBZ256rm\0" |
| 53543 | /* 143469 */ "VPMULTISHIFTQBZ256rm\0" |
| 53544 | /* 143490 */ "VPABSBZ256rm\0" |
| 53545 | /* 143503 */ "VPSUBSBZ256rm\0" |
| 53546 | /* 143517 */ "VPADDSBZ256rm\0" |
| 53547 | /* 143531 */ "VPMINSBZ256rm\0" |
| 53548 | /* 143545 */ "VPSUBUSBZ256rm\0" |
| 53549 | /* 143560 */ "VPADDUSBZ256rm\0" |
| 53550 | /* 143575 */ "VPMAXSBZ256rm\0" |
| 53551 | /* 143589 */ "VPCMPGTBZ256rm\0" |
| 53552 | /* 143604 */ "VPOPCNTBZ256rm\0" |
| 53553 | /* 143619 */ "VPBROADCASTBZ256rm\0" |
| 53554 | /* 143638 */ "VPMINUBZ256rm\0" |
| 53555 | /* 143652 */ "VPMAXUBZ256rm\0" |
| 53556 | /* 143666 */ "VPACKSSWBZ256rm\0" |
| 53557 | /* 143682 */ "VPACKUSWBZ256rm\0" |
| 53558 | /* 143698 */ "VAESDECZ256rm\0" |
| 53559 | /* 143712 */ "VAESENCZ256rm\0" |
| 53560 | /* 143726 */ "VPERMI2DZ256rm\0" |
| 53561 | /* 143741 */ "VPERMT2DZ256rm\0" |
| 53562 | /* 143756 */ "VPSRADZ256rm\0" |
| 53563 | /* 143769 */ "VPSUBDZ256rm\0" |
| 53564 | /* 143782 */ "VPMOVSXBDZ256rm\0" |
| 53565 | /* 143798 */ "VPMOVZXBDZ256rm\0" |
| 53566 | /* 143814 */ "VPADDDZ256rm\0" |
| 53567 | /* 143827 */ "VPANDDZ256rm\0" |
| 53568 | /* 143840 */ "VPEXPANDDZ256rm\0" |
| 53569 | /* 143856 */ "VPGATHERDDZ256rm\0" |
| 53570 | /* 143873 */ "VPSLLDZ256rm\0" |
| 53571 | /* 143886 */ "VPMULLDZ256rm\0" |
| 53572 | /* 143900 */ "VPSRLDZ256rm\0" |
| 53573 | /* 143913 */ "VPBLENDMDZ256rm\0" |
| 53574 | /* 143929 */ "VPTESTNMDZ256rm\0" |
| 53575 | /* 143945 */ "VPERMDZ256rm\0" |
| 53576 | /* 143958 */ "VPTESTMDZ256rm\0" |
| 53577 | /* 143973 */ "VPANDNDZ256rm\0" |
| 53578 | /* 143987 */ "VCVTPH2PDZ256rm\0" |
| 53579 | /* 144003 */ "VPERMI2PDZ256rm\0" |
| 53580 | /* 144019 */ "VCVTDQ2PDZ256rm\0" |
| 53581 | /* 144035 */ "VCVTUDQ2PDZ256rm\0" |
| 53582 | /* 144052 */ "VCVTQQ2PDZ256rm\0" |
| 53583 | /* 144068 */ "VCVTUQQ2PDZ256rm\0" |
| 53584 | /* 144085 */ "VCVTPS2PDZ256rm\0" |
| 53585 | /* 144101 */ "VPERMT2PDZ256rm\0" |
| 53586 | /* 144117 */ "VMOVAPDZ256rm\0" |
| 53587 | /* 144131 */ "VSUBPDZ256rm\0" |
| 53588 | /* 144144 */ "VMINCPDZ256rm\0" |
| 53589 | /* 144158 */ "VMAXCPDZ256rm\0" |
| 53590 | /* 144172 */ "VADDPDZ256rm\0" |
| 53591 | /* 144185 */ "VEXPANDPDZ256rm\0" |
| 53592 | /* 144201 */ "VANDPDZ256rm\0" |
| 53593 | /* 144214 */ "VGATHERDPDZ256rm\0" |
| 53594 | /* 144231 */ "VSCALEFPDZ256rm\0" |
| 53595 | /* 144247 */ "VUNPCKHPDZ256rm\0" |
| 53596 | /* 144263 */ "VPERMILPDZ256rm\0" |
| 53597 | /* 144279 */ "VUNPCKLPDZ256rm\0" |
| 53598 | /* 144295 */ "VMULPDZ256rm\0" |
| 53599 | /* 144308 */ "VBLENDMPDZ256rm\0" |
| 53600 | /* 144324 */ "VPERMPDZ256rm\0" |
| 53601 | /* 144338 */ "VANDNPDZ256rm\0" |
| 53602 | /* 144352 */ "VMINPDZ256rm\0" |
| 53603 | /* 144365 */ "VGATHERQPDZ256rm\0" |
| 53604 | /* 144382 */ "VORPDZ256rm\0" |
| 53605 | /* 144394 */ "VXORPDZ256rm\0" |
| 53606 | /* 144407 */ "VFPCLASSPDZ256rm\0" |
| 53607 | /* 144424 */ "VMOVUPDZ256rm\0" |
| 53608 | /* 144438 */ "VDIVPDZ256rm\0" |
| 53609 | /* 144451 */ "VMAXPDZ256rm\0" |
| 53610 | /* 144464 */ "VPCMPEQDZ256rm\0" |
| 53611 | /* 144479 */ "VPGATHERQDZ256rm\0" |
| 53612 | /* 144496 */ "VPORDZ256rm\0" |
| 53613 | /* 144508 */ "VPXORDZ256rm\0" |
| 53614 | /* 144521 */ "VPABSDZ256rm\0" |
| 53615 | /* 144534 */ "VPMINSDZ256rm\0" |
| 53616 | /* 144548 */ "VBROADCASTSDZ256rm\0" |
| 53617 | /* 144567 */ "VPMAXSDZ256rm\0" |
| 53618 | /* 144581 */ "VP2INTERSECTDZ256rm\0" |
| 53619 | /* 144601 */ "VPCONFLICTDZ256rm\0" |
| 53620 | /* 144619 */ "VPCMPGTDZ256rm\0" |
| 53621 | /* 144634 */ "VPOPCNTDZ256rm\0" |
| 53622 | /* 144649 */ "VPLZCNTDZ256rm\0" |
| 53623 | /* 144664 */ "VPBROADCASTDZ256rm\0" |
| 53624 | /* 144683 */ "VPMINUDZ256rm\0" |
| 53625 | /* 144697 */ "VPMAXUDZ256rm\0" |
| 53626 | /* 144711 */ "VPSRAVDZ256rm\0" |
| 53627 | /* 144725 */ "VPSLLVDZ256rm\0" |
| 53628 | /* 144739 */ "VPROLVDZ256rm\0" |
| 53629 | /* 144753 */ "VPSRLVDZ256rm\0" |
| 53630 | /* 144767 */ "VPRORVDZ256rm\0" |
| 53631 | /* 144781 */ "VPMADDWDZ256rm\0" |
| 53632 | /* 144796 */ "VPUNPCKHWDZ256rm\0" |
| 53633 | /* 144813 */ "VPUNPCKLWDZ256rm\0" |
| 53634 | /* 144830 */ "VPMOVSXWDZ256rm\0" |
| 53635 | /* 144846 */ "VPMOVZXWDZ256rm\0" |
| 53636 | /* 144862 */ "VCVTPD2PHZ256rm\0" |
| 53637 | /* 144878 */ "VCVTDQ2PHZ256rm\0" |
| 53638 | /* 144894 */ "VCVTUDQ2PHZ256rm\0" |
| 53639 | /* 144911 */ "VCVTQQ2PHZ256rm\0" |
| 53640 | /* 144927 */ "VCVTUQQ2PHZ256rm\0" |
| 53641 | /* 144944 */ "VCVTW2PHZ256rm\0" |
| 53642 | /* 144959 */ "VCVTUW2PHZ256rm\0" |
| 53643 | /* 144975 */ "VSUBPHZ256rm\0" |
| 53644 | /* 144988 */ "VFCMULCPHZ256rm\0" |
| 53645 | /* 145004 */ "VFMULCPHZ256rm\0" |
| 53646 | /* 145019 */ "VMINCPHZ256rm\0" |
| 53647 | /* 145033 */ "VMAXCPHZ256rm\0" |
| 53648 | /* 145047 */ "VADDPHZ256rm\0" |
| 53649 | /* 145060 */ "VSCALEFPHZ256rm\0" |
| 53650 | /* 145076 */ "VMULPHZ256rm\0" |
| 53651 | /* 145089 */ "VMINPHZ256rm\0" |
| 53652 | /* 145102 */ "VFPCLASSPHZ256rm\0" |
| 53653 | /* 145119 */ "VDIVPHZ256rm\0" |
| 53654 | /* 145132 */ "VMAXPHZ256rm\0" |
| 53655 | /* 145145 */ "VMOVDDUPZ256rm\0" |
| 53656 | /* 145160 */ "VMOVSHDUPZ256rm\0" |
| 53657 | /* 145176 */ "VMOVSLDUPZ256rm\0" |
| 53658 | /* 145192 */ "VPERMI2QZ256rm\0" |
| 53659 | /* 145207 */ "VPERMT2QZ256rm\0" |
| 53660 | /* 145222 */ "VPSRAQZ256rm\0" |
| 53661 | /* 145235 */ "VPSUBQZ256rm\0" |
| 53662 | /* 145248 */ "VPMOVSXBQZ256rm\0" |
| 53663 | /* 145264 */ "VPMOVZXBQZ256rm\0" |
| 53664 | /* 145280 */ "VCVTTPD2DQZ256rm\0" |
| 53665 | /* 145297 */ "VCVTPD2DQZ256rm\0" |
| 53666 | /* 145313 */ "VCVTTPH2DQZ256rm\0" |
| 53667 | /* 145330 */ "VCVTPH2DQZ256rm\0" |
| 53668 | /* 145346 */ "VCVTTPS2DQZ256rm\0" |
| 53669 | /* 145363 */ "VCVTPS2DQZ256rm\0" |
| 53670 | /* 145379 */ "VPADDQZ256rm\0" |
| 53671 | /* 145392 */ "VPUNPCKHDQZ256rm\0" |
| 53672 | /* 145409 */ "VPUNPCKLDQZ256rm\0" |
| 53673 | /* 145426 */ "VPMULDQZ256rm\0" |
| 53674 | /* 145440 */ "VPANDQZ256rm\0" |
| 53675 | /* 145453 */ "VPEXPANDQZ256rm\0" |
| 53676 | /* 145469 */ "VPUNPCKHQDQZ256rm\0" |
| 53677 | /* 145487 */ "VPUNPCKLQDQZ256rm\0" |
| 53678 | /* 145505 */ "VPGATHERDQZ256rm\0" |
| 53679 | /* 145522 */ "VCVTTPD2UDQZ256rm\0" |
| 53680 | /* 145540 */ "VCVTPD2UDQZ256rm\0" |
| 53681 | /* 145557 */ "VCVTTPH2UDQZ256rm\0" |
| 53682 | /* 145575 */ "VCVTPH2UDQZ256rm\0" |
| 53683 | /* 145592 */ "VCVTTPS2UDQZ256rm\0" |
| 53684 | /* 145610 */ "VCVTPS2UDQZ256rm\0" |
| 53685 | /* 145627 */ "VPMULUDQZ256rm\0" |
| 53686 | /* 145642 */ "VPMOVSXDQZ256rm\0" |
| 53687 | /* 145658 */ "VPMOVZXDQZ256rm\0" |
| 53688 | /* 145674 */ "VPSLLQZ256rm\0" |
| 53689 | /* 145687 */ "VPMULLQZ256rm\0" |
| 53690 | /* 145701 */ "VPSRLQZ256rm\0" |
| 53691 | /* 145714 */ "VPBLENDMQZ256rm\0" |
| 53692 | /* 145730 */ "VPTESTNMQZ256rm\0" |
| 53693 | /* 145746 */ "VPERMQZ256rm\0" |
| 53694 | /* 145759 */ "VPTESTMQZ256rm\0" |
| 53695 | /* 145774 */ "VPANDNQZ256rm\0" |
| 53696 | /* 145788 */ "VCVTTPD2QQZ256rm\0" |
| 53697 | /* 145805 */ "VCVTPD2QQZ256rm\0" |
| 53698 | /* 145821 */ "VCVTTPH2QQZ256rm\0" |
| 53699 | /* 145838 */ "VCVTPH2QQZ256rm\0" |
| 53700 | /* 145854 */ "VCVTTPS2QQZ256rm\0" |
| 53701 | /* 145871 */ "VCVTPS2QQZ256rm\0" |
| 53702 | /* 145887 */ "VPCMPEQQZ256rm\0" |
| 53703 | /* 145902 */ "VPGATHERQQZ256rm\0" |
| 53704 | /* 145919 */ "VCVTTPD2UQQZ256rm\0" |
| 53705 | /* 145937 */ "VCVTPD2UQQZ256rm\0" |
| 53706 | /* 145954 */ "VCVTTPH2UQQZ256rm\0" |
| 53707 | /* 145972 */ "VCVTPH2UQQZ256rm\0" |
| 53708 | /* 145989 */ "VCVTTPS2UQQZ256rm\0" |
| 53709 | /* 146007 */ "VCVTPS2UQQZ256rm\0" |
| 53710 | /* 146024 */ "VPORQZ256rm\0" |
| 53711 | /* 146036 */ "VPXORQZ256rm\0" |
| 53712 | /* 146049 */ "VPABSQZ256rm\0" |
| 53713 | /* 146062 */ "VPMINSQZ256rm\0" |
| 53714 | /* 146076 */ "VPMAXSQZ256rm\0" |
| 53715 | /* 146090 */ "VP2INTERSECTQZ256rm\0" |
| 53716 | /* 146110 */ "VPCONFLICTQZ256rm\0" |
| 53717 | /* 146128 */ "VPCMPGTQZ256rm\0" |
| 53718 | /* 146143 */ "VPOPCNTQZ256rm\0" |
| 53719 | /* 146158 */ "VPLZCNTQZ256rm\0" |
| 53720 | /* 146173 */ "VPBROADCASTQZ256rm\0" |
| 53721 | /* 146192 */ "VPMINUQZ256rm\0" |
| 53722 | /* 146206 */ "VPMAXUQZ256rm\0" |
| 53723 | /* 146220 */ "VPSRAVQZ256rm\0" |
| 53724 | /* 146234 */ "VPSLLVQZ256rm\0" |
| 53725 | /* 146248 */ "VPROLVQZ256rm\0" |
| 53726 | /* 146262 */ "VPSRLVQZ256rm\0" |
| 53727 | /* 146276 */ "VPRORVQZ256rm\0" |
| 53728 | /* 146290 */ "VPMOVSXWQZ256rm\0" |
| 53729 | /* 146306 */ "VPMOVZXWQZ256rm\0" |
| 53730 | /* 146322 */ "VCVTPD2PSZ256rm\0" |
| 53731 | /* 146338 */ "VCVTPH2PSZ256rm\0" |
| 53732 | /* 146354 */ "VPERMI2PSZ256rm\0" |
| 53733 | /* 146370 */ "VCVTDQ2PSZ256rm\0" |
| 53734 | /* 146386 */ "VCVTUDQ2PSZ256rm\0" |
| 53735 | /* 146403 */ "VCVTQQ2PSZ256rm\0" |
| 53736 | /* 146419 */ "VCVTUQQ2PSZ256rm\0" |
| 53737 | /* 146436 */ "VPERMT2PSZ256rm\0" |
| 53738 | /* 146452 */ "VMOVAPSZ256rm\0" |
| 53739 | /* 146466 */ "VSUBPSZ256rm\0" |
| 53740 | /* 146479 */ "VMINCPSZ256rm\0" |
| 53741 | /* 146493 */ "VMAXCPSZ256rm\0" |
| 53742 | /* 146507 */ "VADDPSZ256rm\0" |
| 53743 | /* 146520 */ "VEXPANDPSZ256rm\0" |
| 53744 | /* 146536 */ "VANDPSZ256rm\0" |
| 53745 | /* 146549 */ "VGATHERDPSZ256rm\0" |
| 53746 | /* 146566 */ "VSCALEFPSZ256rm\0" |
| 53747 | /* 146582 */ "VUNPCKHPSZ256rm\0" |
| 53748 | /* 146598 */ "VPERMILPSZ256rm\0" |
| 53749 | /* 146614 */ "VUNPCKLPSZ256rm\0" |
| 53750 | /* 146630 */ "VMULPSZ256rm\0" |
| 53751 | /* 146643 */ "VBLENDMPSZ256rm\0" |
| 53752 | /* 146659 */ "VPERMPSZ256rm\0" |
| 53753 | /* 146673 */ "VANDNPSZ256rm\0" |
| 53754 | /* 146687 */ "VMINPSZ256rm\0" |
| 53755 | /* 146700 */ "VGATHERQPSZ256rm\0" |
| 53756 | /* 146717 */ "VORPSZ256rm\0" |
| 53757 | /* 146729 */ "VXORPSZ256rm\0" |
| 53758 | /* 146742 */ "VFPCLASSPSZ256rm\0" |
| 53759 | /* 146759 */ "VMOVUPSZ256rm\0" |
| 53760 | /* 146773 */ "VDIVPSZ256rm\0" |
| 53761 | /* 146786 */ "VMAXPSZ256rm\0" |
| 53762 | /* 146799 */ "VBROADCASTSSZ256rm\0" |
| 53763 | /* 146818 */ "VAESDECLASTZ256rm\0" |
| 53764 | /* 146836 */ "VAESENCLASTZ256rm\0" |
| 53765 | /* 146854 */ "VCVTTPH2WZ256rm\0" |
| 53766 | /* 146870 */ "VCVTPH2WZ256rm\0" |
| 53767 | /* 146885 */ "VPERMI2WZ256rm\0" |
| 53768 | /* 146900 */ "VPERMT2WZ256rm\0" |
| 53769 | /* 146915 */ "VPSRAWZ256rm\0" |
| 53770 | /* 146928 */ "VPSADBWZ256rm\0" |
| 53771 | /* 146942 */ "VPUNPCKHBWZ256rm\0" |
| 53772 | /* 146959 */ "VPUNPCKLBWZ256rm\0" |
| 53773 | /* 146976 */ "VPSUBWZ256rm\0" |
| 53774 | /* 146989 */ "VPMOVSXBWZ256rm\0" |
| 53775 | /* 147005 */ "VPMOVZXBWZ256rm\0" |
| 53776 | /* 147021 */ "VPADDWZ256rm\0" |
| 53777 | /* 147034 */ "VPEXPANDWZ256rm\0" |
| 53778 | /* 147050 */ "VPACKSSDWZ256rm\0" |
| 53779 | /* 147066 */ "VPACKUSDWZ256rm\0" |
| 53780 | /* 147082 */ "VPAVGWZ256rm\0" |
| 53781 | /* 147095 */ "VPMULHWZ256rm\0" |
| 53782 | /* 147109 */ "VPSLLWZ256rm\0" |
| 53783 | /* 147122 */ "VPMULLWZ256rm\0" |
| 53784 | /* 147136 */ "VPSRLWZ256rm\0" |
| 53785 | /* 147149 */ "VPBLENDMWZ256rm\0" |
| 53786 | /* 147165 */ "VPTESTNMWZ256rm\0" |
| 53787 | /* 147181 */ "VPERMWZ256rm\0" |
| 53788 | /* 147194 */ "VPTESTMWZ256rm\0" |
| 53789 | /* 147209 */ "VPCMPEQWZ256rm\0" |
| 53790 | /* 147224 */ "VPABSWZ256rm\0" |
| 53791 | /* 147237 */ "VPMADDUBSWZ256rm\0" |
| 53792 | /* 147254 */ "VPSUBSWZ256rm\0" |
| 53793 | /* 147268 */ "VPADDSWZ256rm\0" |
| 53794 | /* 147282 */ "VPMINSWZ256rm\0" |
| 53795 | /* 147296 */ "VPMULHRSWZ256rm\0" |
| 53796 | /* 147312 */ "VPSUBUSWZ256rm\0" |
| 53797 | /* 147327 */ "VPADDUSWZ256rm\0" |
| 53798 | /* 147342 */ "VPMAXSWZ256rm\0" |
| 53799 | /* 147356 */ "VPCMPGTWZ256rm\0" |
| 53800 | /* 147371 */ "VPOPCNTWZ256rm\0" |
| 53801 | /* 147386 */ "VPBROADCASTWZ256rm\0" |
| 53802 | /* 147405 */ "VCVTTPH2UWZ256rm\0" |
| 53803 | /* 147422 */ "VCVTPH2UWZ256rm\0" |
| 53804 | /* 147438 */ "VPMULHUWZ256rm\0" |
| 53805 | /* 147453 */ "VPMINUWZ256rm\0" |
| 53806 | /* 147467 */ "VPMAXUWZ256rm\0" |
| 53807 | /* 147481 */ "VPSRAVWZ256rm\0" |
| 53808 | /* 147495 */ "VPSLLVWZ256rm\0" |
| 53809 | /* 147509 */ "VPSRLVWZ256rm\0" |
| 53810 | /* 147523 */ "VCVTPS2PHXZ256rm\0" |
| 53811 | /* 147540 */ "VCVTPH2PSXZ256rm\0" |
| 53812 | /* 147557 */ "VPERM2F128rm\0" |
| 53813 | /* 147570 */ "VINSERTF128rm\0" |
| 53814 | /* 147584 */ "VBROADCASTF128rm\0" |
| 53815 | /* 147601 */ "VPERM2I128rm\0" |
| 53816 | /* 147614 */ "VINSERTI128rm\0" |
| 53817 | /* 147628 */ "VBROADCASTI128rm\0" |
| 53818 | /* 147645 */ "VAESKEYGENASSIST128rm\0" |
| 53819 | /* 147667 */ "VMOVDQA32Z128rm\0" |
| 53820 | /* 147683 */ "VMOVDQU32Z128rm\0" |
| 53821 | /* 147699 */ "VBROADCASTI32X2Z128rm\0" |
| 53822 | /* 147721 */ "VBROADCASTF64X2Z128rm\0" |
| 53823 | /* 147743 */ "VBROADCASTI64X2Z128rm\0" |
| 53824 | /* 147765 */ "VMOVDQA64Z128rm\0" |
| 53825 | /* 147781 */ "VMOVDQU64Z128rm\0" |
| 53826 | /* 147797 */ "VCVTNE2PS2BF16Z128rm\0" |
| 53827 | /* 147818 */ "VCVTNEPS2BF16Z128rm\0" |
| 53828 | /* 147838 */ "VMOVDQU16Z128rm\0" |
| 53829 | /* 147854 */ "VMOVDQU8Z128rm\0" |
| 53830 | /* 147869 */ "VMOVNTDQAZ128rm\0" |
| 53831 | /* 147885 */ "VPERMI2BZ128rm\0" |
| 53832 | /* 147900 */ "VPERMT2BZ128rm\0" |
| 53833 | /* 147915 */ "VPSUBBZ128rm\0" |
| 53834 | /* 147928 */ "VPADDBZ128rm\0" |
| 53835 | /* 147941 */ "VPEXPANDBZ128rm\0" |
| 53836 | /* 147957 */ "VPSHUFBZ128rm\0" |
| 53837 | /* 147971 */ "VPAVGBZ128rm\0" |
| 53838 | /* 147984 */ "VGF2P8MULBZ128rm\0" |
| 53839 | /* 148001 */ "VPBLENDMBZ128rm\0" |
| 53840 | /* 148017 */ "VPTESTNMBZ128rm\0" |
| 53841 | /* 148033 */ "VPSHUFBITQMBZ128rm\0" |
| 53842 | /* 148052 */ "VPERMBZ128rm\0" |
| 53843 | /* 148065 */ "VPTESTMBZ128rm\0" |
| 53844 | /* 148080 */ "VPCMPEQBZ128rm\0" |
| 53845 | /* 148095 */ "VPMULTISHIFTQBZ128rm\0" |
| 53846 | /* 148116 */ "VPABSBZ128rm\0" |
| 53847 | /* 148129 */ "VPSUBSBZ128rm\0" |
| 53848 | /* 148143 */ "VPADDSBZ128rm\0" |
| 53849 | /* 148157 */ "VPMINSBZ128rm\0" |
| 53850 | /* 148171 */ "VPSUBUSBZ128rm\0" |
| 53851 | /* 148186 */ "VPADDUSBZ128rm\0" |
| 53852 | /* 148201 */ "VPMAXSBZ128rm\0" |
| 53853 | /* 148215 */ "VPCMPGTBZ128rm\0" |
| 53854 | /* 148230 */ "VPOPCNTBZ128rm\0" |
| 53855 | /* 148245 */ "VPBROADCASTBZ128rm\0" |
| 53856 | /* 148264 */ "VPMINUBZ128rm\0" |
| 53857 | /* 148278 */ "VPMAXUBZ128rm\0" |
| 53858 | /* 148292 */ "VPACKSSWBZ128rm\0" |
| 53859 | /* 148308 */ "VPACKUSWBZ128rm\0" |
| 53860 | /* 148324 */ "VAESDECZ128rm\0" |
| 53861 | /* 148338 */ "VAESENCZ128rm\0" |
| 53862 | /* 148352 */ "VPERMI2DZ128rm\0" |
| 53863 | /* 148367 */ "VPERMT2DZ128rm\0" |
| 53864 | /* 148382 */ "VPSRADZ128rm\0" |
| 53865 | /* 148395 */ "VPSUBDZ128rm\0" |
| 53866 | /* 148408 */ "VPMOVSXBDZ128rm\0" |
| 53867 | /* 148424 */ "VPMOVZXBDZ128rm\0" |
| 53868 | /* 148440 */ "VPADDDZ128rm\0" |
| 53869 | /* 148453 */ "VPANDDZ128rm\0" |
| 53870 | /* 148466 */ "VPEXPANDDZ128rm\0" |
| 53871 | /* 148482 */ "VPGATHERDDZ128rm\0" |
| 53872 | /* 148499 */ "VPSLLDZ128rm\0" |
| 53873 | /* 148512 */ "VPMULLDZ128rm\0" |
| 53874 | /* 148526 */ "VPSRLDZ128rm\0" |
| 53875 | /* 148539 */ "VPBLENDMDZ128rm\0" |
| 53876 | /* 148555 */ "VPTESTNMDZ128rm\0" |
| 53877 | /* 148571 */ "VPTESTMDZ128rm\0" |
| 53878 | /* 148586 */ "VPANDNDZ128rm\0" |
| 53879 | /* 148600 */ "VCVTPH2PDZ128rm\0" |
| 53880 | /* 148616 */ "VPERMI2PDZ128rm\0" |
| 53881 | /* 148632 */ "VCVTDQ2PDZ128rm\0" |
| 53882 | /* 148648 */ "VCVTUDQ2PDZ128rm\0" |
| 53883 | /* 148665 */ "VCVTQQ2PDZ128rm\0" |
| 53884 | /* 148681 */ "VCVTUQQ2PDZ128rm\0" |
| 53885 | /* 148698 */ "VCVTPS2PDZ128rm\0" |
| 53886 | /* 148714 */ "VPERMT2PDZ128rm\0" |
| 53887 | /* 148730 */ "VMOVAPDZ128rm\0" |
| 53888 | /* 148744 */ "VSUBPDZ128rm\0" |
| 53889 | /* 148757 */ "VMINCPDZ128rm\0" |
| 53890 | /* 148771 */ "VMAXCPDZ128rm\0" |
| 53891 | /* 148785 */ "VADDPDZ128rm\0" |
| 53892 | /* 148798 */ "VEXPANDPDZ128rm\0" |
| 53893 | /* 148814 */ "VANDPDZ128rm\0" |
| 53894 | /* 148827 */ "VGATHERDPDZ128rm\0" |
| 53895 | /* 148844 */ "VSCALEFPDZ128rm\0" |
| 53896 | /* 148860 */ "VUNPCKHPDZ128rm\0" |
| 53897 | /* 148876 */ "VMOVHPDZ128rm\0" |
| 53898 | /* 148890 */ "VPERMILPDZ128rm\0" |
| 53899 | /* 148906 */ "VUNPCKLPDZ128rm\0" |
| 53900 | /* 148922 */ "VMULPDZ128rm\0" |
| 53901 | /* 148935 */ "VMOVLPDZ128rm\0" |
| 53902 | /* 148949 */ "VBLENDMPDZ128rm\0" |
| 53903 | /* 148965 */ "VANDNPDZ128rm\0" |
| 53904 | /* 148979 */ "VMINPDZ128rm\0" |
| 53905 | /* 148992 */ "VGATHERQPDZ128rm\0" |
| 53906 | /* 149009 */ "VORPDZ128rm\0" |
| 53907 | /* 149021 */ "VXORPDZ128rm\0" |
| 53908 | /* 149034 */ "VFPCLASSPDZ128rm\0" |
| 53909 | /* 149051 */ "VMOVUPDZ128rm\0" |
| 53910 | /* 149065 */ "VDIVPDZ128rm\0" |
| 53911 | /* 149078 */ "VMAXPDZ128rm\0" |
| 53912 | /* 149091 */ "VPCMPEQDZ128rm\0" |
| 53913 | /* 149106 */ "VPGATHERQDZ128rm\0" |
| 53914 | /* 149123 */ "VPORDZ128rm\0" |
| 53915 | /* 149135 */ "VPXORDZ128rm\0" |
| 53916 | /* 149148 */ "VPABSDZ128rm\0" |
| 53917 | /* 149161 */ "VPMINSDZ128rm\0" |
| 53918 | /* 149175 */ "VPMAXSDZ128rm\0" |
| 53919 | /* 149189 */ "VP2INTERSECTDZ128rm\0" |
| 53920 | /* 149209 */ "VPCONFLICTDZ128rm\0" |
| 53921 | /* 149227 */ "VPCMPGTDZ128rm\0" |
| 53922 | /* 149242 */ "VPOPCNTDZ128rm\0" |
| 53923 | /* 149257 */ "VPLZCNTDZ128rm\0" |
| 53924 | /* 149272 */ "VPBROADCASTDZ128rm\0" |
| 53925 | /* 149291 */ "VPMINUDZ128rm\0" |
| 53926 | /* 149305 */ "VPMAXUDZ128rm\0" |
| 53927 | /* 149319 */ "VPSRAVDZ128rm\0" |
| 53928 | /* 149333 */ "VPSLLVDZ128rm\0" |
| 53929 | /* 149347 */ "VPROLVDZ128rm\0" |
| 53930 | /* 149361 */ "VPSRLVDZ128rm\0" |
| 53931 | /* 149375 */ "VPRORVDZ128rm\0" |
| 53932 | /* 149389 */ "VPMADDWDZ128rm\0" |
| 53933 | /* 149404 */ "VPUNPCKHWDZ128rm\0" |
| 53934 | /* 149421 */ "VPUNPCKLWDZ128rm\0" |
| 53935 | /* 149438 */ "VPMOVSXWDZ128rm\0" |
| 53936 | /* 149454 */ "VPMOVZXWDZ128rm\0" |
| 53937 | /* 149470 */ "VCVTPD2PHZ128rm\0" |
| 53938 | /* 149486 */ "VCVTDQ2PHZ128rm\0" |
| 53939 | /* 149502 */ "VCVTUDQ2PHZ128rm\0" |
| 53940 | /* 149519 */ "VCVTQQ2PHZ128rm\0" |
| 53941 | /* 149535 */ "VCVTUQQ2PHZ128rm\0" |
| 53942 | /* 149552 */ "VCVTW2PHZ128rm\0" |
| 53943 | /* 149567 */ "VCVTUW2PHZ128rm\0" |
| 53944 | /* 149583 */ "VSUBPHZ128rm\0" |
| 53945 | /* 149596 */ "VFCMULCPHZ128rm\0" |
| 53946 | /* 149612 */ "VFMULCPHZ128rm\0" |
| 53947 | /* 149627 */ "VMINCPHZ128rm\0" |
| 53948 | /* 149641 */ "VMAXCPHZ128rm\0" |
| 53949 | /* 149655 */ "VADDPHZ128rm\0" |
| 53950 | /* 149668 */ "VSCALEFPHZ128rm\0" |
| 53951 | /* 149684 */ "VMULPHZ128rm\0" |
| 53952 | /* 149697 */ "VMINPHZ128rm\0" |
| 53953 | /* 149710 */ "VFPCLASSPHZ128rm\0" |
| 53954 | /* 149727 */ "VDIVPHZ128rm\0" |
| 53955 | /* 149740 */ "VMAXPHZ128rm\0" |
| 53956 | /* 149753 */ "VMOVDDUPZ128rm\0" |
| 53957 | /* 149768 */ "VMOVSHDUPZ128rm\0" |
| 53958 | /* 149784 */ "VMOVSLDUPZ128rm\0" |
| 53959 | /* 149800 */ "VPERMI2QZ128rm\0" |
| 53960 | /* 149815 */ "VPERMT2QZ128rm\0" |
| 53961 | /* 149830 */ "VPSRAQZ128rm\0" |
| 53962 | /* 149843 */ "VPSUBQZ128rm\0" |
| 53963 | /* 149856 */ "VPMOVSXBQZ128rm\0" |
| 53964 | /* 149872 */ "VPMOVZXBQZ128rm\0" |
| 53965 | /* 149888 */ "VCVTTPD2DQZ128rm\0" |
| 53966 | /* 149905 */ "VCVTPD2DQZ128rm\0" |
| 53967 | /* 149921 */ "VCVTTPH2DQZ128rm\0" |
| 53968 | /* 149938 */ "VCVTPH2DQZ128rm\0" |
| 53969 | /* 149954 */ "VCVTTPS2DQZ128rm\0" |
| 53970 | /* 149971 */ "VCVTPS2DQZ128rm\0" |
| 53971 | /* 149987 */ "VPADDQZ128rm\0" |
| 53972 | /* 150000 */ "VPUNPCKHDQZ128rm\0" |
| 53973 | /* 150017 */ "VPUNPCKLDQZ128rm\0" |
| 53974 | /* 150034 */ "VPMULDQZ128rm\0" |
| 53975 | /* 150048 */ "VPANDQZ128rm\0" |
| 53976 | /* 150061 */ "VPEXPANDQZ128rm\0" |
| 53977 | /* 150077 */ "VPUNPCKHQDQZ128rm\0" |
| 53978 | /* 150095 */ "VPUNPCKLQDQZ128rm\0" |
| 53979 | /* 150113 */ "VPGATHERDQZ128rm\0" |
| 53980 | /* 150130 */ "VCVTTPD2UDQZ128rm\0" |
| 53981 | /* 150148 */ "VCVTPD2UDQZ128rm\0" |
| 53982 | /* 150165 */ "VCVTTPH2UDQZ128rm\0" |
| 53983 | /* 150183 */ "VCVTPH2UDQZ128rm\0" |
| 53984 | /* 150200 */ "VCVTTPS2UDQZ128rm\0" |
| 53985 | /* 150218 */ "VCVTPS2UDQZ128rm\0" |
| 53986 | /* 150235 */ "VPMULUDQZ128rm\0" |
| 53987 | /* 150250 */ "VPMOVSXDQZ128rm\0" |
| 53988 | /* 150266 */ "VPMOVZXDQZ128rm\0" |
| 53989 | /* 150282 */ "VPSLLQZ128rm\0" |
| 53990 | /* 150295 */ "VPMULLQZ128rm\0" |
| 53991 | /* 150309 */ "VPSRLQZ128rm\0" |
| 53992 | /* 150322 */ "VPBLENDMQZ128rm\0" |
| 53993 | /* 150338 */ "VPTESTNMQZ128rm\0" |
| 53994 | /* 150354 */ "VPTESTMQZ128rm\0" |
| 53995 | /* 150369 */ "VPANDNQZ128rm\0" |
| 53996 | /* 150383 */ "VCVTTPD2QQZ128rm\0" |
| 53997 | /* 150400 */ "VCVTPD2QQZ128rm\0" |
| 53998 | /* 150416 */ "VCVTTPH2QQZ128rm\0" |
| 53999 | /* 150433 */ "VCVTPH2QQZ128rm\0" |
| 54000 | /* 150449 */ "VCVTTPS2QQZ128rm\0" |
| 54001 | /* 150466 */ "VCVTPS2QQZ128rm\0" |
| 54002 | /* 150482 */ "VPCMPEQQZ128rm\0" |
| 54003 | /* 150497 */ "VPGATHERQQZ128rm\0" |
| 54004 | /* 150514 */ "VCVTTPD2UQQZ128rm\0" |
| 54005 | /* 150532 */ "VCVTPD2UQQZ128rm\0" |
| 54006 | /* 150549 */ "VCVTTPH2UQQZ128rm\0" |
| 54007 | /* 150567 */ "VCVTPH2UQQZ128rm\0" |
| 54008 | /* 150584 */ "VCVTTPS2UQQZ128rm\0" |
| 54009 | /* 150602 */ "VCVTPS2UQQZ128rm\0" |
| 54010 | /* 150619 */ "VPORQZ128rm\0" |
| 54011 | /* 150631 */ "VPXORQZ128rm\0" |
| 54012 | /* 150644 */ "VPABSQZ128rm\0" |
| 54013 | /* 150657 */ "VPMINSQZ128rm\0" |
| 54014 | /* 150671 */ "VPMAXSQZ128rm\0" |
| 54015 | /* 150685 */ "VP2INTERSECTQZ128rm\0" |
| 54016 | /* 150705 */ "VPCONFLICTQZ128rm\0" |
| 54017 | /* 150723 */ "VPCMPGTQZ128rm\0" |
| 54018 | /* 150738 */ "VPOPCNTQZ128rm\0" |
| 54019 | /* 150753 */ "VPLZCNTQZ128rm\0" |
| 54020 | /* 150768 */ "VPBROADCASTQZ128rm\0" |
| 54021 | /* 150787 */ "VPMINUQZ128rm\0" |
| 54022 | /* 150801 */ "VPMAXUQZ128rm\0" |
| 54023 | /* 150815 */ "VPSRAVQZ128rm\0" |
| 54024 | /* 150829 */ "VPSLLVQZ128rm\0" |
| 54025 | /* 150843 */ "VPROLVQZ128rm\0" |
| 54026 | /* 150857 */ "VPSRLVQZ128rm\0" |
| 54027 | /* 150871 */ "VPRORVQZ128rm\0" |
| 54028 | /* 150885 */ "VPMOVSXWQZ128rm\0" |
| 54029 | /* 150901 */ "VPMOVZXWQZ128rm\0" |
| 54030 | /* 150917 */ "VCVTPD2PSZ128rm\0" |
| 54031 | /* 150933 */ "VCVTPH2PSZ128rm\0" |
| 54032 | /* 150949 */ "VPERMI2PSZ128rm\0" |
| 54033 | /* 150965 */ "VCVTDQ2PSZ128rm\0" |
| 54034 | /* 150981 */ "VCVTUDQ2PSZ128rm\0" |
| 54035 | /* 150998 */ "VCVTQQ2PSZ128rm\0" |
| 54036 | /* 151014 */ "VCVTUQQ2PSZ128rm\0" |
| 54037 | /* 151031 */ "VPERMT2PSZ128rm\0" |
| 54038 | /* 151047 */ "VMOVAPSZ128rm\0" |
| 54039 | /* 151061 */ "VSUBPSZ128rm\0" |
| 54040 | /* 151074 */ "VMINCPSZ128rm\0" |
| 54041 | /* 151088 */ "VMAXCPSZ128rm\0" |
| 54042 | /* 151102 */ "VADDPSZ128rm\0" |
| 54043 | /* 151115 */ "VEXPANDPSZ128rm\0" |
| 54044 | /* 151131 */ "VANDPSZ128rm\0" |
| 54045 | /* 151144 */ "VGATHERDPSZ128rm\0" |
| 54046 | /* 151161 */ "VSCALEFPSZ128rm\0" |
| 54047 | /* 151177 */ "VUNPCKHPSZ128rm\0" |
| 54048 | /* 151193 */ "VMOVHPSZ128rm\0" |
| 54049 | /* 151207 */ "VPERMILPSZ128rm\0" |
| 54050 | /* 151223 */ "VUNPCKLPSZ128rm\0" |
| 54051 | /* 151239 */ "VMULPSZ128rm\0" |
| 54052 | /* 151252 */ "VMOVLPSZ128rm\0" |
| 54053 | /* 151266 */ "VBLENDMPSZ128rm\0" |
| 54054 | /* 151282 */ "VANDNPSZ128rm\0" |
| 54055 | /* 151296 */ "VMINPSZ128rm\0" |
| 54056 | /* 151309 */ "VGATHERQPSZ128rm\0" |
| 54057 | /* 151326 */ "VORPSZ128rm\0" |
| 54058 | /* 151338 */ "VXORPSZ128rm\0" |
| 54059 | /* 151351 */ "VFPCLASSPSZ128rm\0" |
| 54060 | /* 151368 */ "VMOVUPSZ128rm\0" |
| 54061 | /* 151382 */ "VDIVPSZ128rm\0" |
| 54062 | /* 151395 */ "VMAXPSZ128rm\0" |
| 54063 | /* 151408 */ "VBROADCASTSSZ128rm\0" |
| 54064 | /* 151427 */ "VAESDECLASTZ128rm\0" |
| 54065 | /* 151445 */ "VAESENCLASTZ128rm\0" |
| 54066 | /* 151463 */ "VCVTTPH2WZ128rm\0" |
| 54067 | /* 151479 */ "VCVTPH2WZ128rm\0" |
| 54068 | /* 151494 */ "VPERMI2WZ128rm\0" |
| 54069 | /* 151509 */ "VPERMT2WZ128rm\0" |
| 54070 | /* 151524 */ "VPSRAWZ128rm\0" |
| 54071 | /* 151537 */ "VPSADBWZ128rm\0" |
| 54072 | /* 151551 */ "VPUNPCKHBWZ128rm\0" |
| 54073 | /* 151568 */ "VPUNPCKLBWZ128rm\0" |
| 54074 | /* 151585 */ "VPSUBWZ128rm\0" |
| 54075 | /* 151598 */ "VPMOVSXBWZ128rm\0" |
| 54076 | /* 151614 */ "VPMOVZXBWZ128rm\0" |
| 54077 | /* 151630 */ "VPADDWZ128rm\0" |
| 54078 | /* 151643 */ "VPEXPANDWZ128rm\0" |
| 54079 | /* 151659 */ "VPACKSSDWZ128rm\0" |
| 54080 | /* 151675 */ "VPACKUSDWZ128rm\0" |
| 54081 | /* 151691 */ "VPAVGWZ128rm\0" |
| 54082 | /* 151704 */ "VPMULHWZ128rm\0" |
| 54083 | /* 151718 */ "VPSLLWZ128rm\0" |
| 54084 | /* 151731 */ "VPMULLWZ128rm\0" |
| 54085 | /* 151745 */ "VPSRLWZ128rm\0" |
| 54086 | /* 151758 */ "VPBLENDMWZ128rm\0" |
| 54087 | /* 151774 */ "VPTESTNMWZ128rm\0" |
| 54088 | /* 151790 */ "VPERMWZ128rm\0" |
| 54089 | /* 151803 */ "VPTESTMWZ128rm\0" |
| 54090 | /* 151818 */ "VPCMPEQWZ128rm\0" |
| 54091 | /* 151833 */ "VPABSWZ128rm\0" |
| 54092 | /* 151846 */ "VPMADDUBSWZ128rm\0" |
| 54093 | /* 151863 */ "VPSUBSWZ128rm\0" |
| 54094 | /* 151877 */ "VPADDSWZ128rm\0" |
| 54095 | /* 151891 */ "VPMINSWZ128rm\0" |
| 54096 | /* 151905 */ "VPMULHRSWZ128rm\0" |
| 54097 | /* 151921 */ "VPSUBUSWZ128rm\0" |
| 54098 | /* 151936 */ "VPADDUSWZ128rm\0" |
| 54099 | /* 151951 */ "VPMAXSWZ128rm\0" |
| 54100 | /* 151965 */ "VPCMPGTWZ128rm\0" |
| 54101 | /* 151980 */ "VPOPCNTWZ128rm\0" |
| 54102 | /* 151995 */ "VPBROADCASTWZ128rm\0" |
| 54103 | /* 152014 */ "VCVTTPH2UWZ128rm\0" |
| 54104 | /* 152031 */ "VCVTPH2UWZ128rm\0" |
| 54105 | /* 152047 */ "VPMULHUWZ128rm\0" |
| 54106 | /* 152062 */ "VPMINUWZ128rm\0" |
| 54107 | /* 152076 */ "VPMAXUWZ128rm\0" |
| 54108 | /* 152090 */ "VPSRAVWZ128rm\0" |
| 54109 | /* 152104 */ "VPSLLVWZ128rm\0" |
| 54110 | /* 152118 */ "VPSRLVWZ128rm\0" |
| 54111 | /* 152132 */ "VCVTPS2PHXZ128rm\0" |
| 54112 | /* 152149 */ "VCVTPH2PSXZ128rm\0" |
| 54113 | /* 152166 */ "SBB8rm\0" |
| 54114 | /* 152173 */ "SUB8rm\0" |
| 54115 | /* 152180 */ "ADC8rm\0" |
| 54116 | /* 152187 */ "XADD8rm\0" |
| 54117 | /* 152195 */ "AND8rm\0" |
| 54118 | /* 152202 */ "CMPXCHG8rm\0" |
| 54119 | /* 152213 */ "CCMP8rm\0" |
| 54120 | /* 152221 */ "XOR8rm\0" |
| 54121 | /* 152228 */ "MOV8rm\0" |
| 54122 | /* 152235 */ "VBROADCASTF32X8rm\0" |
| 54123 | /* 152253 */ "VBROADCASTI32X8rm\0" |
| 54124 | /* 152271 */ "VMOVNTDQArm\0" |
| 54125 | /* 152283 */ "VMOVDQArm\0" |
| 54126 | /* 152293 */ "VPSHABrm\0" |
| 54127 | /* 152302 */ "VPSUBBrm\0" |
| 54128 | /* 152311 */ "MMX_PSUBBrm\0" |
| 54129 | /* 152323 */ "VPADDBrm\0" |
| 54130 | /* 152332 */ "MMX_PADDBrm\0" |
| 54131 | /* 152344 */ "VPSHUFBrm\0" |
| 54132 | /* 152354 */ "MMX_PSHUFBrm\0" |
| 54133 | /* 152367 */ "VPAVGBrm\0" |
| 54134 | /* 152376 */ "MMX_PAVGBrm\0" |
| 54135 | /* 152388 */ "VPSHLBrm\0" |
| 54136 | /* 152397 */ "VGF2P8MULBrm\0" |
| 54137 | /* 152410 */ "VPSIGNBrm\0" |
| 54138 | /* 152420 */ "MMX_PSIGNBrm\0" |
| 54139 | /* 152433 */ "VPCMPEQBrm\0" |
| 54140 | /* 152444 */ "MMX_PCMPEQBrm\0" |
| 54141 | /* 152458 */ "VPINSRBrm\0" |
| 54142 | /* 152468 */ "VPABSBrm\0" |
| 54143 | /* 152477 */ "MMX_PABSBrm\0" |
| 54144 | /* 152489 */ "VPSUBSBrm\0" |
| 54145 | /* 152499 */ "MMX_PSUBSBrm\0" |
| 54146 | /* 152512 */ "VPADDSBrm\0" |
| 54147 | /* 152522 */ "MMX_PADDSBrm\0" |
| 54148 | /* 152535 */ "VPMINSBrm\0" |
| 54149 | /* 152545 */ "VPSUBUSBrm\0" |
| 54150 | /* 152556 */ "MMX_PSUBUSBrm\0" |
| 54151 | /* 152570 */ "VPADDUSBrm\0" |
| 54152 | /* 152581 */ "MMX_PADDUSBrm\0" |
| 54153 | /* 152595 */ "PAVGUSBrm\0" |
| 54154 | /* 152605 */ "VPMAXSBrm\0" |
| 54155 | /* 152615 */ "VPCMPGTBrm\0" |
| 54156 | /* 152626 */ "MMX_PCMPGTBrm\0" |
| 54157 | /* 152640 */ "VPROTBrm\0" |
| 54158 | /* 152649 */ "VPBROADCASTBrm\0" |
| 54159 | /* 152664 */ "VPMINUBrm\0" |
| 54160 | /* 152674 */ "MMX_PMINUBrm\0" |
| 54161 | /* 152687 */ "PFSUBrm\0" |
| 54162 | /* 152695 */ "VPMAXUBrm\0" |
| 54163 | /* 152705 */ "MMX_PMAXUBrm\0" |
| 54164 | /* 152718 */ "VPACKSSWBrm\0" |
| 54165 | /* 152730 */ "MMX_PACKSSWBrm\0" |
| 54166 | /* 152745 */ "VPACKUSWBrm\0" |
| 54167 | /* 152757 */ "MMX_PACKUSWBrm\0" |
| 54168 | /* 152772 */ "PFACCrm\0" |
| 54169 | /* 152780 */ "PFNACCrm\0" |
| 54170 | /* 152789 */ "PFPNACCrm\0" |
| 54171 | /* 152799 */ "VAESDECrm\0" |
| 54172 | /* 152809 */ "VAESIMCrm\0" |
| 54173 | /* 152819 */ "VAESENCrm\0" |
| 54174 | /* 152829 */ "VPSHADrm\0" |
| 54175 | /* 152838 */ "VPSRADrm\0" |
| 54176 | /* 152847 */ "MMX_PSRADrm\0" |
| 54177 | /* 152859 */ "VPHADDBDrm\0" |
| 54178 | /* 152870 */ "VPHADDUBDrm\0" |
| 54179 | /* 152882 */ "VPHSUBDrm\0" |
| 54180 | /* 152892 */ "MMX_PHSUBDrm\0" |
| 54181 | /* 152905 */ "VPSUBDrm\0" |
| 54182 | /* 152914 */ "MMX_PSUBDrm\0" |
| 54183 | /* 152926 */ "VPMOVSXBDrm\0" |
| 54184 | /* 152938 */ "VPMOVZXBDrm\0" |
| 54185 | /* 152950 */ "PFADDrm\0" |
| 54186 | /* 152958 */ "VPHADDDrm\0" |
| 54187 | /* 152968 */ "MMX_PHADDDrm\0" |
| 54188 | /* 152981 */ "VPADDDrm\0" |
| 54189 | /* 152990 */ "MMX_PADDDrm\0" |
| 54190 | /* 153002 */ "VPGATHERDDrm\0" |
| 54191 | /* 153015 */ "VPMACSDDrm\0" |
| 54192 | /* 153026 */ "VPMACSSDDrm\0" |
| 54193 | /* 153038 */ "PI2FDrm\0" |
| 54194 | /* 153046 */ "PF2IDrm\0" |
| 54195 | /* 153054 */ "VPSHLDrm\0" |
| 54196 | /* 153063 */ "VPSLLDrm\0" |
| 54197 | /* 153072 */ "MMX_PSLLDrm\0" |
| 54198 | /* 153084 */ "VPMULLDrm\0" |
| 54199 | /* 153094 */ "VPSRLDrm\0" |
| 54200 | /* 153103 */ "MMX_PSRLDrm\0" |
| 54201 | /* 153115 */ "VPANDrm\0" |
| 54202 | /* 153123 */ "MMX_PANDrm\0" |
| 54203 | /* 153134 */ "VPSIGNDrm\0" |
| 54204 | /* 153144 */ "MMX_PSIGNDrm\0" |
| 54205 | /* 153157 */ "MMX_CVTPI2PDrm\0" |
| 54206 | /* 153172 */ "VPERMIL2PDrm\0" |
| 54207 | /* 153185 */ "VCVTDQ2PDrm\0" |
| 54208 | /* 153197 */ "VCVTPS2PDrm\0" |
| 54209 | /* 153209 */ "VMOVAPDrm\0" |
| 54210 | /* 153219 */ "PSWAPDrm\0" |
| 54211 | /* 153228 */ "VADDSUBPDrm\0" |
| 54212 | /* 153240 */ "VHSUBPDrm\0" |
| 54213 | /* 153250 */ "VSUBPDrm\0" |
| 54214 | /* 153259 */ "VMINCPDrm\0" |
| 54215 | /* 153269 */ "VMAXCPDrm\0" |
| 54216 | /* 153279 */ "VHADDPDrm\0" |
| 54217 | /* 153289 */ "VADDPDrm\0" |
| 54218 | /* 153298 */ "VANDPDrm\0" |
| 54219 | /* 153307 */ "VGATHERDPDrm\0" |
| 54220 | /* 153320 */ "VUNPCKHPDrm\0" |
| 54221 | /* 153332 */ "VMOVHPDrm\0" |
| 54222 | /* 153342 */ "VPERMILPDrm\0" |
| 54223 | /* 153354 */ "VUNPCKLPDrm\0" |
| 54224 | /* 153366 */ "VMULPDrm\0" |
| 54225 | /* 153375 */ "VMOVLPDrm\0" |
| 54226 | /* 153385 */ "VANDNPDrm\0" |
| 54227 | /* 153395 */ "VMINPDrm\0" |
| 54228 | /* 153404 */ "VGATHERQPDrm\0" |
| 54229 | /* 153417 */ "VORPDrm\0" |
| 54230 | /* 153425 */ "VXORPDrm\0" |
| 54231 | /* 153434 */ "VTESTPDrm\0" |
| 54232 | /* 153444 */ "VMOVUPDrm\0" |
| 54233 | /* 153454 */ "VDIVPDrm\0" |
| 54234 | /* 153463 */ "VMASKMOVPDrm\0" |
| 54235 | /* 153476 */ "VMAXPDrm\0" |
| 54236 | /* 153485 */ "VFRCZPDrm\0" |
| 54237 | /* 153495 */ "VPCMPEQDrm\0" |
| 54238 | /* 153506 */ "MMX_PCMPEQDrm\0" |
| 54239 | /* 153520 */ "VPGATHERQDrm\0" |
| 54240 | /* 153533 */ "VPINSRDrm\0" |
| 54241 | /* 153543 */ "VCVTSI642SDrm\0" |
| 54242 | /* 153557 */ "VCVTSI2SDrm\0" |
| 54243 | /* 153569 */ "VCVTSS2SDrm\0" |
| 54244 | /* 153581 */ "VPABSDrm\0" |
| 54245 | /* 153590 */ "MMX_PABSDrm\0" |
| 54246 | /* 153602 */ "VSUBSDrm\0" |
| 54247 | /* 153611 */ "VMINCSDrm\0" |
| 54248 | /* 153621 */ "VMAXCSDrm\0" |
| 54249 | /* 153631 */ "VADDSDrm\0" |
| 54250 | /* 153640 */ "VUCOMISDrm\0" |
| 54251 | /* 153651 */ "VCOMISDrm\0" |
| 54252 | /* 153661 */ "VMULSDrm\0" |
| 54253 | /* 153670 */ "VPMINSDrm\0" |
| 54254 | /* 153680 */ "VMINSDrm\0" |
| 54255 | /* 153689 */ "VPDPBSSDrm\0" |
| 54256 | /* 153700 */ "VP4DPWSSDrm\0" |
| 54257 | /* 153712 */ "VPDPWSSDrm\0" |
| 54258 | /* 153723 */ "VPDPBUSDrm\0" |
| 54259 | /* 153734 */ "VPDPWUSDrm\0" |
| 54260 | /* 153745 */ "VDIVSDrm\0" |
| 54261 | /* 153754 */ "VMOVSDrm\0" |
| 54262 | /* 153763 */ "VPMAXSDrm\0" |
| 54263 | /* 153773 */ "VMAXSDrm\0" |
| 54264 | /* 153782 */ "VFRCZSDrm\0" |
| 54265 | /* 153792 */ "VPCMPGTDrm\0" |
| 54266 | /* 153803 */ "MMX_PCMPGTDrm\0" |
| 54267 | /* 153817 */ "VPROTDrm\0" |
| 54268 | /* 153826 */ "VPBROADCASTDrm\0" |
| 54269 | /* 153841 */ "VPMINUDrm\0" |
| 54270 | /* 153851 */ "VPDPBSUDrm\0" |
| 54271 | /* 153862 */ "VPDPWSUDrm\0" |
| 54272 | /* 153873 */ "VPDPBUUDrm\0" |
| 54273 | /* 153884 */ "VPDPWUUDrm\0" |
| 54274 | /* 153895 */ "VPMAXUDrm\0" |
| 54275 | /* 153905 */ "VPSRAVDrm\0" |
| 54276 | /* 153915 */ "VPSLLVDrm\0" |
| 54277 | /* 153925 */ "VPSRLVDrm\0" |
| 54278 | /* 153935 */ "VPMASKMOVDrm\0" |
| 54279 | /* 153948 */ "VPHSUBWDrm\0" |
| 54280 | /* 153959 */ "VPHADDWDrm\0" |
| 54281 | /* 153970 */ "VPMADDWDrm\0" |
| 54282 | /* 153981 */ "MMX_PMADDWDrm\0" |
| 54283 | /* 153995 */ "VPUNPCKHWDrm\0" |
| 54284 | /* 154008 */ "MMX_PUNPCKHWDrm\0" |
| 54285 | /* 154024 */ "VPUNPCKLWDrm\0" |
| 54286 | /* 154037 */ "MMX_PUNPCKLWDrm\0" |
| 54287 | /* 154053 */ "VPMACSWDrm\0" |
| 54288 | /* 154064 */ "VPMADCSWDrm\0" |
| 54289 | /* 154076 */ "VPMACSSWDrm\0" |
| 54290 | /* 154088 */ "VPMADCSSWDrm\0" |
| 54291 | /* 154101 */ "VPHADDUWDrm\0" |
| 54292 | /* 154113 */ "VPMOVSXWDrm\0" |
| 54293 | /* 154125 */ "VPMOVZXWDrm\0" |
| 54294 | /* 154137 */ "PFCMPGErm\0" |
| 54295 | /* 154147 */ "SHA1NEXTErm\0" |
| 54296 | /* 154159 */ "MULX32Hrm\0" |
| 54297 | /* 154169 */ "MULX64Hrm\0" |
| 54298 | /* 154179 */ "VPMACSDQHrm\0" |
| 54299 | /* 154191 */ "VPMACSSDQHrm\0" |
| 54300 | /* 154204 */ "VMOVDI2PDIrm\0" |
| 54301 | /* 154217 */ "MMX_CVTTPD2PIrm\0" |
| 54302 | /* 154233 */ "MMX_CVTPD2PIrm\0" |
| 54303 | /* 154248 */ "MMX_CVTTPS2PIrm\0" |
| 54304 | /* 154264 */ "MMX_CVTPS2PIrm\0" |
| 54305 | /* 154279 */ "VMOVQI2PQIrm\0" |
| 54306 | /* 154292 */ "VMOV64toPQIrm\0" |
| 54307 | /* 154306 */ "VCVTTSD2SIrm\0" |
| 54308 | /* 154319 */ "VCVTSD2SIrm\0" |
| 54309 | /* 154331 */ "VCVTTSS2SIrm\0" |
| 54310 | /* 154344 */ "VCVTSS2SIrm\0" |
| 54311 | /* 154356 */ "VPMACSDQLrm\0" |
| 54312 | /* 154368 */ "VPMACSSDQLrm\0" |
| 54313 | /* 154381 */ "PFMULrm\0" |
| 54314 | /* 154389 */ "VPANDNrm\0" |
| 54315 | /* 154398 */ "MMX_PANDNrm\0" |
| 54316 | /* 154410 */ "PFMINrm\0" |
| 54317 | /* 154418 */ "PFRCPrm\0" |
| 54318 | /* 154426 */ "VMOVDDUPrm\0" |
| 54319 | /* 154437 */ "VMOVSHDUPrm\0" |
| 54320 | /* 154449 */ "VMOVSLDUPrm\0" |
| 54321 | /* 154461 */ "VPSHAQrm\0" |
| 54322 | /* 154470 */ "VPHADDBQrm\0" |
| 54323 | /* 154481 */ "VPHADDUBQrm\0" |
| 54324 | /* 154493 */ "VPSUBQrm\0" |
| 54325 | /* 154502 */ "MMX_PSUBQrm\0" |
| 54326 | /* 154514 */ "VPMOVSXBQrm\0" |
| 54327 | /* 154526 */ "VPMOVZXBQrm\0" |
| 54328 | /* 154538 */ "VCVTTPD2DQrm\0" |
| 54329 | /* 154551 */ "VCVTPD2DQrm\0" |
| 54330 | /* 154563 */ "VCVTTPS2DQrm\0" |
| 54331 | /* 154576 */ "VCVTPS2DQrm\0" |
| 54332 | /* 154588 */ "VPHSUBDQrm\0" |
| 54333 | /* 154599 */ "VPADDQrm\0" |
| 54334 | /* 154608 */ "MMX_PADDQrm\0" |
| 54335 | /* 154620 */ "VPHADDDQrm\0" |
| 54336 | /* 154631 */ "VPUNPCKHDQrm\0" |
| 54337 | /* 154644 */ "MMX_PUNPCKHDQrm\0" |
| 54338 | /* 154660 */ "VPUNPCKLDQrm\0" |
| 54339 | /* 154673 */ "MMX_PUNPCKLDQrm\0" |
| 54340 | /* 154689 */ "VPMULDQrm\0" |
| 54341 | /* 154699 */ "VPUNPCKHQDQrm\0" |
| 54342 | /* 154713 */ "VPUNPCKLQDQrm\0" |
| 54343 | /* 154727 */ "VPGATHERDQrm\0" |
| 54344 | /* 154740 */ "VPHADDUDQrm\0" |
| 54345 | /* 154752 */ "VPMULUDQrm\0" |
| 54346 | /* 154763 */ "MMX_PMULUDQrm\0" |
| 54347 | /* 154777 */ "VPMOVSXDQrm\0" |
| 54348 | /* 154789 */ "VPMOVZXDQrm\0" |
| 54349 | /* 154801 */ "PFCMPEQrm\0" |
| 54350 | /* 154811 */ "VPSHLQrm\0" |
| 54351 | /* 154820 */ "VPSLLQrm\0" |
| 54352 | /* 154829 */ "MMX_PSLLQrm\0" |
| 54353 | /* 154841 */ "VPSRLQrm\0" |
| 54354 | /* 154850 */ "MMX_PSRLQrm\0" |
| 54355 | /* 154862 */ "VPCMPEQQrm\0" |
| 54356 | /* 154873 */ "VPGATHERQQrm\0" |
| 54357 | /* 154886 */ "VPINSRQrm\0" |
| 54358 | /* 154896 */ "VPCMPGTQrm\0" |
| 54359 | /* 154907 */ "VPROTQrm\0" |
| 54360 | /* 154916 */ "VPBROADCASTQrm\0" |
| 54361 | /* 154931 */ "VPMADD52HUQrm\0" |
| 54362 | /* 154945 */ "VPMADD52LUQrm\0" |
| 54363 | /* 154959 */ "VPSLLVQrm\0" |
| 54364 | /* 154969 */ "VPSRLVQrm\0" |
| 54365 | /* 154979 */ "VPMASKMOVQrm\0" |
| 54366 | /* 154992 */ "VPHADDWQrm\0" |
| 54367 | /* 155003 */ "VPHADDUWQrm\0" |
| 54368 | /* 155015 */ "VPMOVSXWQrm\0" |
| 54369 | /* 155027 */ "VPMOVZXWQrm\0" |
| 54370 | /* 155039 */ "PFSUBRrm\0" |
| 54371 | /* 155048 */ "VPORrm\0" |
| 54372 | /* 155055 */ "MMX_PORrm\0" |
| 54373 | /* 155065 */ "VPXORrm\0" |
| 54374 | /* 155073 */ "MMX_PXORrm\0" |
| 54375 | /* 155084 */ "VPDPBSSDSrm\0" |
| 54376 | /* 155096 */ "VP4DPWSSDSrm\0" |
| 54377 | /* 155109 */ "VPDPWSSDSrm\0" |
| 54378 | /* 155121 */ "VPDPBUSDSrm\0" |
| 54379 | /* 155133 */ "VPDPWUSDSrm\0" |
| 54380 | /* 155145 */ "VPDPBSUDSrm\0" |
| 54381 | /* 155157 */ "VPDPWSUDSrm\0" |
| 54382 | /* 155169 */ "VPDPBUUDSrm\0" |
| 54383 | /* 155181 */ "VPDPWUUDSrm\0" |
| 54384 | /* 155193 */ "VCVTNEEBF162PSrm\0" |
| 54385 | /* 155210 */ "VBCSTNEBF162PSrm\0" |
| 54386 | /* 155227 */ "VCVTNEOBF162PSrm\0" |
| 54387 | /* 155244 */ "VCVTPD2PSrm\0" |
| 54388 | /* 155256 */ "VCVTNEEPH2PSrm\0" |
| 54389 | /* 155271 */ "VCVTNEOPH2PSrm\0" |
| 54390 | /* 155286 */ "VCVTPH2PSrm\0" |
| 54391 | /* 155298 */ "VBCSTNESH2PSrm\0" |
| 54392 | /* 155313 */ "MMX_CVTPI2PSrm\0" |
| 54393 | /* 155328 */ "VPERMIL2PSrm\0" |
| 54394 | /* 155341 */ "VCVTDQ2PSrm\0" |
| 54395 | /* 155353 */ "VMOVAPSrm\0" |
| 54396 | /* 155363 */ "VADDSUBPSrm\0" |
| 54397 | /* 155375 */ "VHSUBPSrm\0" |
| 54398 | /* 155385 */ "VSUBPSrm\0" |
| 54399 | /* 155394 */ "VMINCPSrm\0" |
| 54400 | /* 155404 */ "VMAXCPSrm\0" |
| 54401 | /* 155414 */ "VHADDPSrm\0" |
| 54402 | /* 155424 */ "V4FMADDPSrm\0" |
| 54403 | /* 155436 */ "V4FNMADDPSrm\0" |
| 54404 | /* 155449 */ "VADDPSrm\0" |
| 54405 | /* 155458 */ "VANDPSrm\0" |
| 54406 | /* 155467 */ "VGATHERDPSrm\0" |
| 54407 | /* 155480 */ "VUNPCKHPSrm\0" |
| 54408 | /* 155492 */ "VMOVHPSrm\0" |
| 54409 | /* 155502 */ "VPERMILPSrm\0" |
| 54410 | /* 155514 */ "VUNPCKLPSrm\0" |
| 54411 | /* 155526 */ "VMULPSrm\0" |
| 54412 | /* 155535 */ "VMOVLPSrm\0" |
| 54413 | /* 155545 */ "VANDNPSrm\0" |
| 54414 | /* 155555 */ "VMINPSrm\0" |
| 54415 | /* 155564 */ "VGATHERQPSrm\0" |
| 54416 | /* 155577 */ "VORPSrm\0" |
| 54417 | /* 155585 */ "VXORPSrm\0" |
| 54418 | /* 155594 */ "VINSERTPSrm\0" |
| 54419 | /* 155606 */ "VTESTPSrm\0" |
| 54420 | /* 155616 */ "VMOVUPSrm\0" |
| 54421 | /* 155626 */ "VDIVPSrm\0" |
| 54422 | /* 155635 */ "VMASKMOVPSrm\0" |
| 54423 | /* 155648 */ "VMAXPSrm\0" |
| 54424 | /* 155657 */ "VFRCZPSrm\0" |
| 54425 | /* 155667 */ "VCVTSI642SSrm\0" |
| 54426 | /* 155681 */ "VCVTSD2SSrm\0" |
| 54427 | /* 155693 */ "VCVTSI2SSrm\0" |
| 54428 | /* 155705 */ "VSUBSSrm\0" |
| 54429 | /* 155714 */ "VMINCSSrm\0" |
| 54430 | /* 155724 */ "VMAXCSSrm\0" |
| 54431 | /* 155734 */ "V4FMADDSSrm\0" |
| 54432 | /* 155746 */ "V4FNMADDSSrm\0" |
| 54433 | /* 155759 */ "VADDSSrm\0" |
| 54434 | /* 155768 */ "VUCOMISSrm\0" |
| 54435 | /* 155779 */ "VCOMISSrm\0" |
| 54436 | /* 155789 */ "VMULSSrm\0" |
| 54437 | /* 155798 */ "VMINSSrm\0" |
| 54438 | /* 155807 */ "VBROADCASTSSrm\0" |
| 54439 | /* 155822 */ "VDIVSSrm\0" |
| 54440 | /* 155831 */ "VMOVSSrm\0" |
| 54441 | /* 155840 */ "VMAXSSrm\0" |
| 54442 | /* 155849 */ "VFRCZSSrm\0" |
| 54443 | /* 155859 */ "PFCMPGTrm\0" |
| 54444 | /* 155869 */ "PFRSQRTrm\0" |
| 54445 | /* 155879 */ "VAESDECLASTrm\0" |
| 54446 | /* 155893 */ "VAESENCLASTrm\0" |
| 54447 | /* 155907 */ "VPTESTrm\0" |
| 54448 | /* 155916 */ "VLDDQUrm\0" |
| 54449 | /* 155925 */ "VMOVDQUrm\0" |
| 54450 | /* 155935 */ "VPSHAWrm\0" |
| 54451 | /* 155944 */ "VPSRAWrm\0" |
| 54452 | /* 155953 */ "MMX_PSRAWrm\0" |
| 54453 | /* 155965 */ "VPHSUBBWrm\0" |
| 54454 | /* 155976 */ "VPSADBWrm\0" |
| 54455 | /* 155986 */ "MMX_PSADBWrm\0" |
| 54456 | /* 155999 */ "VPHADDBWrm\0" |
| 54457 | /* 156010 */ "VPUNPCKHBWrm\0" |
| 54458 | /* 156023 */ "MMX_PUNPCKHBWrm\0" |
| 54459 | /* 156039 */ "VPUNPCKLBWrm\0" |
| 54460 | /* 156052 */ "MMX_PUNPCKLBWrm\0" |
| 54461 | /* 156068 */ "VPHADDUBWrm\0" |
| 54462 | /* 156080 */ "VPHSUBWrm\0" |
| 54463 | /* 156090 */ "MMX_PHSUBWrm\0" |
| 54464 | /* 156103 */ "VPSUBWrm\0" |
| 54465 | /* 156112 */ "MMX_PSUBWrm\0" |
| 54466 | /* 156124 */ "VPMOVSXBWrm\0" |
| 54467 | /* 156136 */ "VPMOVZXBWrm\0" |
| 54468 | /* 156148 */ "VPHADDWrm\0" |
| 54469 | /* 156158 */ "MMX_PHADDWrm\0" |
| 54470 | /* 156171 */ "VPADDWrm\0" |
| 54471 | /* 156180 */ "MMX_PADDWrm\0" |
| 54472 | /* 156192 */ "VPACKSSDWrm\0" |
| 54473 | /* 156204 */ "MMX_PACKSSDWrm\0" |
| 54474 | /* 156219 */ "VPACKUSDWrm\0" |
| 54475 | /* 156231 */ "PI2FWrm\0" |
| 54476 | /* 156239 */ "VPAVGWrm\0" |
| 54477 | /* 156248 */ "MMX_PAVGWrm\0" |
| 54478 | /* 156260 */ "VPMULHWrm\0" |
| 54479 | /* 156270 */ "MMX_PMULHWrm\0" |
| 54480 | /* 156283 */ "PF2IWrm\0" |
| 54481 | /* 156291 */ "VPSHLWrm\0" |
| 54482 | /* 156300 */ "VPSLLWrm\0" |
| 54483 | /* 156309 */ "MMX_PSLLWrm\0" |
| 54484 | /* 156321 */ "VPMULLWrm\0" |
| 54485 | /* 156331 */ "MMX_PMULLWrm\0" |
| 54486 | /* 156344 */ "VPSRLWrm\0" |
| 54487 | /* 156353 */ "MMX_PSRLWrm\0" |
| 54488 | /* 156365 */ "VPSIGNWrm\0" |
| 54489 | /* 156375 */ "MMX_PSIGNWrm\0" |
| 54490 | /* 156388 */ "VPCMPEQWrm\0" |
| 54491 | /* 156399 */ "MMX_PCMPEQWrm\0" |
| 54492 | /* 156413 */ "PMULHRWrm\0" |
| 54493 | /* 156423 */ "VPINSRWrm\0" |
| 54494 | /* 156433 */ "MMX_PINSRWrm\0" |
| 54495 | /* 156446 */ "VPABSWrm\0" |
| 54496 | /* 156455 */ "MMX_PABSWrm\0" |
| 54497 | /* 156467 */ "VPMADDUBSWrm\0" |
| 54498 | /* 156480 */ "MMX_PMADDUBSWrm\0" |
| 54499 | /* 156496 */ "VPHSUBSWrm\0" |
| 54500 | /* 156507 */ "MMX_PHSUBSWrm\0" |
| 54501 | /* 156521 */ "VPSUBSWrm\0" |
| 54502 | /* 156531 */ "MMX_PSUBSWrm\0" |
| 54503 | /* 156544 */ "VPHADDSWrm\0" |
| 54504 | /* 156555 */ "MMX_PHADDSWrm\0" |
| 54505 | /* 156569 */ "VPADDSWrm\0" |
| 54506 | /* 156579 */ "MMX_PADDSWrm\0" |
| 54507 | /* 156592 */ "VPMINSWrm\0" |
| 54508 | /* 156602 */ "MMX_PMINSWrm\0" |
| 54509 | /* 156615 */ "VPMULHRSWrm\0" |
| 54510 | /* 156627 */ "MMX_PMULHRSWrm\0" |
| 54511 | /* 156642 */ "VPSUBUSWrm\0" |
| 54512 | /* 156653 */ "MMX_PSUBUSWrm\0" |
| 54513 | /* 156667 */ "VPADDUSWrm\0" |
| 54514 | /* 156678 */ "MMX_PADDUSWrm\0" |
| 54515 | /* 156692 */ "VPMAXSWrm\0" |
| 54516 | /* 156702 */ "MMX_PMAXSWrm\0" |
| 54517 | /* 156715 */ "VPCMPGTWrm\0" |
| 54518 | /* 156726 */ "MMX_PCMPGTWrm\0" |
| 54519 | /* 156740 */ "VPROTWrm\0" |
| 54520 | /* 156749 */ "VPBROADCASTWrm\0" |
| 54521 | /* 156764 */ "VPMULHUWrm\0" |
| 54522 | /* 156775 */ "MMX_PMULHUWrm\0" |
| 54523 | /* 156789 */ "VPMINUWrm\0" |
| 54524 | /* 156799 */ "VPHMINPOSUWrm\0" |
| 54525 | /* 156813 */ "VPMAXUWrm\0" |
| 54526 | /* 156823 */ "VMOVWrm\0" |
| 54527 | /* 156831 */ "VPMACSWWrm\0" |
| 54528 | /* 156842 */ "VPMACSSWWrm\0" |
| 54529 | /* 156854 */ "PFMAXrm\0" |
| 54530 | /* 156862 */ "VFMADDSUBPD4Yrm\0" |
| 54531 | /* 156878 */ "VFMSUBPD4Yrm\0" |
| 54532 | /* 156891 */ "VFNMSUBPD4Yrm\0" |
| 54533 | /* 156905 */ "VFMSUBADDPD4Yrm\0" |
| 54534 | /* 156921 */ "VFMADDPD4Yrm\0" |
| 54535 | /* 156934 */ "VFNMADDPD4Yrm\0" |
| 54536 | /* 156948 */ "VSM4RNDS4Yrm\0" |
| 54537 | /* 156961 */ "VFMADDSUBPS4Yrm\0" |
| 54538 | /* 156977 */ "VFMSUBPS4Yrm\0" |
| 54539 | /* 156990 */ "VFNMSUBPS4Yrm\0" |
| 54540 | /* 157004 */ "VFMSUBADDPS4Yrm\0" |
| 54541 | /* 157020 */ "VFMADDPS4Yrm\0" |
| 54542 | /* 157033 */ "VFNMADDPS4Yrm\0" |
| 54543 | /* 157047 */ "VSM4KEY4Yrm\0" |
| 54544 | /* 157059 */ "VCVTNEPS2BF16Yrm\0" |
| 54545 | /* 157076 */ "VMOVNTDQAYrm\0" |
| 54546 | /* 157089 */ "VMOVDQAYrm\0" |
| 54547 | /* 157100 */ "VPSUBBYrm\0" |
| 54548 | /* 157110 */ "VPADDBYrm\0" |
| 54549 | /* 157120 */ "VPSHUFBYrm\0" |
| 54550 | /* 157131 */ "VPAVGBYrm\0" |
| 54551 | /* 157141 */ "VGF2P8MULBYrm\0" |
| 54552 | /* 157155 */ "VPSIGNBYrm\0" |
| 54553 | /* 157166 */ "VPCMPEQBYrm\0" |
| 54554 | /* 157178 */ "VPABSBYrm\0" |
| 54555 | /* 157188 */ "VPSUBSBYrm\0" |
| 54556 | /* 157199 */ "VPADDSBYrm\0" |
| 54557 | /* 157210 */ "VPMINSBYrm\0" |
| 54558 | /* 157221 */ "VPSUBUSBYrm\0" |
| 54559 | /* 157233 */ "VPADDUSBYrm\0" |
| 54560 | /* 157245 */ "VPMAXSBYrm\0" |
| 54561 | /* 157256 */ "VPCMPGTBYrm\0" |
| 54562 | /* 157268 */ "VPBROADCASTBYrm\0" |
| 54563 | /* 157284 */ "VPMINUBYrm\0" |
| 54564 | /* 157295 */ "VPMAXUBYrm\0" |
| 54565 | /* 157306 */ "VPACKSSWBYrm\0" |
| 54566 | /* 157319 */ "VPACKUSWBYrm\0" |
| 54567 | /* 157332 */ "VAESDECYrm\0" |
| 54568 | /* 157343 */ "VAESENCYrm\0" |
| 54569 | /* 157354 */ "VPSRADYrm\0" |
| 54570 | /* 157364 */ "VPHSUBDYrm\0" |
| 54571 | /* 157375 */ "VPSUBDYrm\0" |
| 54572 | /* 157385 */ "VPMOVSXBDYrm\0" |
| 54573 | /* 157398 */ "VPMOVZXBDYrm\0" |
| 54574 | /* 157411 */ "VPHADDDYrm\0" |
| 54575 | /* 157422 */ "VPADDDYrm\0" |
| 54576 | /* 157432 */ "VPGATHERDDYrm\0" |
| 54577 | /* 157446 */ "VPSLLDYrm\0" |
| 54578 | /* 157456 */ "VPMULLDYrm\0" |
| 54579 | /* 157467 */ "VPSRLDYrm\0" |
| 54580 | /* 157477 */ "VPERMDYrm\0" |
| 54581 | /* 157487 */ "VPANDYrm\0" |
| 54582 | /* 157496 */ "VPSIGNDYrm\0" |
| 54583 | /* 157507 */ "VPERMIL2PDYrm\0" |
| 54584 | /* 157521 */ "VCVTDQ2PDYrm\0" |
| 54585 | /* 157534 */ "VCVTPS2PDYrm\0" |
| 54586 | /* 157547 */ "VMOVAPDYrm\0" |
| 54587 | /* 157558 */ "VADDSUBPDYrm\0" |
| 54588 | /* 157571 */ "VHSUBPDYrm\0" |
| 54589 | /* 157582 */ "VSUBPDYrm\0" |
| 54590 | /* 157592 */ "VMINCPDYrm\0" |
| 54591 | /* 157603 */ "VMAXCPDYrm\0" |
| 54592 | /* 157614 */ "VHADDPDYrm\0" |
| 54593 | /* 157625 */ "VADDPDYrm\0" |
| 54594 | /* 157635 */ "VANDPDYrm\0" |
| 54595 | /* 157645 */ "VGATHERDPDYrm\0" |
| 54596 | /* 157659 */ "VUNPCKHPDYrm\0" |
| 54597 | /* 157672 */ "VPERMILPDYrm\0" |
| 54598 | /* 157685 */ "VUNPCKLPDYrm\0" |
| 54599 | /* 157698 */ "VMULPDYrm\0" |
| 54600 | /* 157708 */ "VANDNPDYrm\0" |
| 54601 | /* 157719 */ "VMINPDYrm\0" |
| 54602 | /* 157729 */ "VGATHERQPDYrm\0" |
| 54603 | /* 157743 */ "VORPDYrm\0" |
| 54604 | /* 157752 */ "VXORPDYrm\0" |
| 54605 | /* 157762 */ "VTESTPDYrm\0" |
| 54606 | /* 157773 */ "VMOVUPDYrm\0" |
| 54607 | /* 157784 */ "VDIVPDYrm\0" |
| 54608 | /* 157794 */ "VMASKMOVPDYrm\0" |
| 54609 | /* 157808 */ "VMAXPDYrm\0" |
| 54610 | /* 157818 */ "VFRCZPDYrm\0" |
| 54611 | /* 157829 */ "VPCMPEQDYrm\0" |
| 54612 | /* 157841 */ "VPGATHERQDYrm\0" |
| 54613 | /* 157855 */ "VPABSDYrm\0" |
| 54614 | /* 157865 */ "VPMINSDYrm\0" |
| 54615 | /* 157876 */ "VPDPBSSDYrm\0" |
| 54616 | /* 157888 */ "VPDPWSSDYrm\0" |
| 54617 | /* 157900 */ "VBROADCASTSDYrm\0" |
| 54618 | /* 157916 */ "VPDPBUSDYrm\0" |
| 54619 | /* 157928 */ "VPDPWUSDYrm\0" |
| 54620 | /* 157940 */ "VPMAXSDYrm\0" |
| 54621 | /* 157951 */ "VPCMPGTDYrm\0" |
| 54622 | /* 157963 */ "VPBROADCASTDYrm\0" |
| 54623 | /* 157979 */ "VPMINUDYrm\0" |
| 54624 | /* 157990 */ "VPDPBSUDYrm\0" |
| 54625 | /* 158002 */ "VPDPWSUDYrm\0" |
| 54626 | /* 158014 */ "VPDPBUUDYrm\0" |
| 54627 | /* 158026 */ "VPDPWUUDYrm\0" |
| 54628 | /* 158038 */ "VPMAXUDYrm\0" |
| 54629 | /* 158049 */ "VPSRAVDYrm\0" |
| 54630 | /* 158060 */ "VPSLLVDYrm\0" |
| 54631 | /* 158071 */ "VPSRLVDYrm\0" |
| 54632 | /* 158082 */ "VPMASKMOVDYrm\0" |
| 54633 | /* 158096 */ "VPMADDWDYrm\0" |
| 54634 | /* 158108 */ "VPUNPCKHWDYrm\0" |
| 54635 | /* 158122 */ "VPUNPCKLWDYrm\0" |
| 54636 | /* 158136 */ "VPMOVSXWDYrm\0" |
| 54637 | /* 158149 */ "VPMOVZXWDYrm\0" |
| 54638 | /* 158162 */ "VPANDNYrm\0" |
| 54639 | /* 158172 */ "VMOVDDUPYrm\0" |
| 54640 | /* 158184 */ "VMOVSHDUPYrm\0" |
| 54641 | /* 158197 */ "VMOVSLDUPYrm\0" |
| 54642 | /* 158210 */ "VPSUBQYrm\0" |
| 54643 | /* 158220 */ "VPMOVSXBQYrm\0" |
| 54644 | /* 158233 */ "VPMOVZXBQYrm\0" |
| 54645 | /* 158246 */ "VCVTTPD2DQYrm\0" |
| 54646 | /* 158260 */ "VCVTPD2DQYrm\0" |
| 54647 | /* 158273 */ "VCVTTPS2DQYrm\0" |
| 54648 | /* 158287 */ "VCVTPS2DQYrm\0" |
| 54649 | /* 158300 */ "VPADDQYrm\0" |
| 54650 | /* 158310 */ "VPUNPCKHDQYrm\0" |
| 54651 | /* 158324 */ "VPUNPCKLDQYrm\0" |
| 54652 | /* 158338 */ "VPMULDQYrm\0" |
| 54653 | /* 158349 */ "VPUNPCKHQDQYrm\0" |
| 54654 | /* 158364 */ "VPUNPCKLQDQYrm\0" |
| 54655 | /* 158379 */ "VPGATHERDQYrm\0" |
| 54656 | /* 158393 */ "VPMULUDQYrm\0" |
| 54657 | /* 158405 */ "VPMOVSXDQYrm\0" |
| 54658 | /* 158418 */ "VPMOVZXDQYrm\0" |
| 54659 | /* 158431 */ "VPSLLQYrm\0" |
| 54660 | /* 158441 */ "VPSRLQYrm\0" |
| 54661 | /* 158451 */ "VPCMPEQQYrm\0" |
| 54662 | /* 158463 */ "VPGATHERQQYrm\0" |
| 54663 | /* 158477 */ "VPCMPGTQYrm\0" |
| 54664 | /* 158489 */ "VPBROADCASTQYrm\0" |
| 54665 | /* 158505 */ "VPMADD52HUQYrm\0" |
| 54666 | /* 158520 */ "VPMADD52LUQYrm\0" |
| 54667 | /* 158535 */ "VPSLLVQYrm\0" |
| 54668 | /* 158546 */ "VPSRLVQYrm\0" |
| 54669 | /* 158557 */ "VPMASKMOVQYrm\0" |
| 54670 | /* 158571 */ "VPMOVSXWQYrm\0" |
| 54671 | /* 158584 */ "VPMOVZXWQYrm\0" |
| 54672 | /* 158597 */ "VPORYrm\0" |
| 54673 | /* 158605 */ "VPXORYrm\0" |
| 54674 | /* 158614 */ "VPDPBSSDSYrm\0" |
| 54675 | /* 158627 */ "VPDPWSSDSYrm\0" |
| 54676 | /* 158640 */ "VPDPBUSDSYrm\0" |
| 54677 | /* 158653 */ "VPDPWUSDSYrm\0" |
| 54678 | /* 158666 */ "VPDPBSUDSYrm\0" |
| 54679 | /* 158679 */ "VPDPWSUDSYrm\0" |
| 54680 | /* 158692 */ "VPDPBUUDSYrm\0" |
| 54681 | /* 158705 */ "VPDPWUUDSYrm\0" |
| 54682 | /* 158718 */ "VCVTNEEBF162PSYrm\0" |
| 54683 | /* 158736 */ "VBCSTNEBF162PSYrm\0" |
| 54684 | /* 158754 */ "VCVTNEOBF162PSYrm\0" |
| 54685 | /* 158772 */ "VCVTPD2PSYrm\0" |
| 54686 | /* 158785 */ "VCVTNEEPH2PSYrm\0" |
| 54687 | /* 158801 */ "VCVTNEOPH2PSYrm\0" |
| 54688 | /* 158817 */ "VCVTPH2PSYrm\0" |
| 54689 | /* 158830 */ "VBCSTNESH2PSYrm\0" |
| 54690 | /* 158846 */ "VPERMIL2PSYrm\0" |
| 54691 | /* 158860 */ "VCVTDQ2PSYrm\0" |
| 54692 | /* 158873 */ "VMOVAPSYrm\0" |
| 54693 | /* 158884 */ "VADDSUBPSYrm\0" |
| 54694 | /* 158897 */ "VHSUBPSYrm\0" |
| 54695 | /* 158908 */ "VSUBPSYrm\0" |
| 54696 | /* 158918 */ "VMINCPSYrm\0" |
| 54697 | /* 158929 */ "VMAXCPSYrm\0" |
| 54698 | /* 158940 */ "VHADDPSYrm\0" |
| 54699 | /* 158951 */ "VADDPSYrm\0" |
| 54700 | /* 158961 */ "VANDPSYrm\0" |
| 54701 | /* 158971 */ "VGATHERDPSYrm\0" |
| 54702 | /* 158985 */ "VUNPCKHPSYrm\0" |
| 54703 | /* 158998 */ "VPERMILPSYrm\0" |
| 54704 | /* 159011 */ "VUNPCKLPSYrm\0" |
| 54705 | /* 159024 */ "VMULPSYrm\0" |
| 54706 | /* 159034 */ "VPERMPSYrm\0" |
| 54707 | /* 159045 */ "VANDNPSYrm\0" |
| 54708 | /* 159056 */ "VMINPSYrm\0" |
| 54709 | /* 159066 */ "VGATHERQPSYrm\0" |
| 54710 | /* 159080 */ "VORPSYrm\0" |
| 54711 | /* 159089 */ "VXORPSYrm\0" |
| 54712 | /* 159099 */ "VTESTPSYrm\0" |
| 54713 | /* 159110 */ "VMOVUPSYrm\0" |
| 54714 | /* 159121 */ "VDIVPSYrm\0" |
| 54715 | /* 159131 */ "VMASKMOVPSYrm\0" |
| 54716 | /* 159145 */ "VMAXPSYrm\0" |
| 54717 | /* 159155 */ "VFRCZPSYrm\0" |
| 54718 | /* 159166 */ "VBROADCASTSSYrm\0" |
| 54719 | /* 159182 */ "VAESDECLASTYrm\0" |
| 54720 | /* 159197 */ "VAESENCLASTYrm\0" |
| 54721 | /* 159212 */ "VPTESTYrm\0" |
| 54722 | /* 159222 */ "VLDDQUYrm\0" |
| 54723 | /* 159232 */ "VMOVDQUYrm\0" |
| 54724 | /* 159243 */ "VPSRAWYrm\0" |
| 54725 | /* 159253 */ "VPSADBWYrm\0" |
| 54726 | /* 159264 */ "VPUNPCKHBWYrm\0" |
| 54727 | /* 159278 */ "VPUNPCKLBWYrm\0" |
| 54728 | /* 159292 */ "VPHSUBWYrm\0" |
| 54729 | /* 159303 */ "VPSUBWYrm\0" |
| 54730 | /* 159313 */ "VPMOVSXBWYrm\0" |
| 54731 | /* 159326 */ "VPMOVZXBWYrm\0" |
| 54732 | /* 159339 */ "VPHADDWYrm\0" |
| 54733 | /* 159350 */ "VPADDWYrm\0" |
| 54734 | /* 159360 */ "VPACKSSDWYrm\0" |
| 54735 | /* 159373 */ "VPACKUSDWYrm\0" |
| 54736 | /* 159386 */ "VPAVGWYrm\0" |
| 54737 | /* 159396 */ "VPMULHWYrm\0" |
| 54738 | /* 159407 */ "VPSLLWYrm\0" |
| 54739 | /* 159417 */ "VPMULLWYrm\0" |
| 54740 | /* 159428 */ "VPSRLWYrm\0" |
| 54741 | /* 159438 */ "VPSIGNWYrm\0" |
| 54742 | /* 159449 */ "VPCMPEQWYrm\0" |
| 54743 | /* 159461 */ "VPABSWYrm\0" |
| 54744 | /* 159471 */ "VPMADDUBSWYrm\0" |
| 54745 | /* 159485 */ "VPHSUBSWYrm\0" |
| 54746 | /* 159497 */ "VPSUBSWYrm\0" |
| 54747 | /* 159508 */ "VPHADDSWYrm\0" |
| 54748 | /* 159520 */ "VPADDSWYrm\0" |
| 54749 | /* 159531 */ "VPMINSWYrm\0" |
| 54750 | /* 159542 */ "VPMULHRSWYrm\0" |
| 54751 | /* 159555 */ "VPSUBUSWYrm\0" |
| 54752 | /* 159567 */ "VPADDUSWYrm\0" |
| 54753 | /* 159579 */ "VPMAXSWYrm\0" |
| 54754 | /* 159590 */ "VPCMPGTWYrm\0" |
| 54755 | /* 159602 */ "VPBROADCASTWYrm\0" |
| 54756 | /* 159618 */ "VPMULHUWYrm\0" |
| 54757 | /* 159630 */ "VPMINUWYrm\0" |
| 54758 | /* 159641 */ "VPMAXUWYrm\0" |
| 54759 | /* 159652 */ "VMOVDQA32Zrm\0" |
| 54760 | /* 159665 */ "VMOVDQU32Zrm\0" |
| 54761 | /* 159678 */ "VBROADCASTF32X2Zrm\0" |
| 54762 | /* 159697 */ "VBROADCASTI32X2Zrm\0" |
| 54763 | /* 159716 */ "VINSERTF64x2Zrm\0" |
| 54764 | /* 159732 */ "VINSERTI64x2Zrm\0" |
| 54765 | /* 159748 */ "VMOVDQA64Zrm\0" |
| 54766 | /* 159761 */ "VCVTTSD2SI64Zrm\0" |
| 54767 | /* 159777 */ "VCVTSD2SI64Zrm\0" |
| 54768 | /* 159792 */ "VCVTTSH2SI64Zrm\0" |
| 54769 | /* 159808 */ "VCVTTSS2SI64Zrm\0" |
| 54770 | /* 159824 */ "VCVTSS2SI64Zrm\0" |
| 54771 | /* 159839 */ "VCVTTSD2USI64Zrm\0" |
| 54772 | /* 159856 */ "VCVTTSH2USI64Zrm\0" |
| 54773 | /* 159873 */ "VCVTTSS2USI64Zrm\0" |
| 54774 | /* 159890 */ "VMOVDQU64Zrm\0" |
| 54775 | /* 159903 */ "VINSERTF32x4Zrm\0" |
| 54776 | /* 159919 */ "VINSERTI32x4Zrm\0" |
| 54777 | /* 159935 */ "VINSERTF64x4Zrm\0" |
| 54778 | /* 159951 */ "VINSERTI64x4Zrm\0" |
| 54779 | /* 159967 */ "VCVTNE2PS2BF16Zrm\0" |
| 54780 | /* 159985 */ "VCVTNEPS2BF16Zrm\0" |
| 54781 | /* 160002 */ "VMOVDQU16Zrm\0" |
| 54782 | /* 160015 */ "VMOVDQU8Zrm\0" |
| 54783 | /* 160027 */ "VINSERTF32x8Zrm\0" |
| 54784 | /* 160043 */ "VINSERTI32x8Zrm\0" |
| 54785 | /* 160059 */ "VMOVNTDQAZrm\0" |
| 54786 | /* 160072 */ "VPERMI2BZrm\0" |
| 54787 | /* 160084 */ "VPERMT2BZrm\0" |
| 54788 | /* 160096 */ "VPSUBBZrm\0" |
| 54789 | /* 160106 */ "VPADDBZrm\0" |
| 54790 | /* 160116 */ "VPEXPANDBZrm\0" |
| 54791 | /* 160129 */ "VPSHUFBZrm\0" |
| 54792 | /* 160140 */ "VPAVGBZrm\0" |
| 54793 | /* 160150 */ "VGF2P8MULBZrm\0" |
| 54794 | /* 160164 */ "VPBLENDMBZrm\0" |
| 54795 | /* 160177 */ "VPTESTNMBZrm\0" |
| 54796 | /* 160190 */ "VPSHUFBITQMBZrm\0" |
| 54797 | /* 160206 */ "VPERMBZrm\0" |
| 54798 | /* 160216 */ "VPTESTMBZrm\0" |
| 54799 | /* 160228 */ "VPCMPEQBZrm\0" |
| 54800 | /* 160240 */ "VPMULTISHIFTQBZrm\0" |
| 54801 | /* 160258 */ "VPINSRBZrm\0" |
| 54802 | /* 160269 */ "VPABSBZrm\0" |
| 54803 | /* 160279 */ "VPSUBSBZrm\0" |
| 54804 | /* 160290 */ "VPADDSBZrm\0" |
| 54805 | /* 160301 */ "VPMINSBZrm\0" |
| 54806 | /* 160312 */ "VPSUBUSBZrm\0" |
| 54807 | /* 160324 */ "VPADDUSBZrm\0" |
| 54808 | /* 160336 */ "VPMAXSBZrm\0" |
| 54809 | /* 160347 */ "VPCMPGTBZrm\0" |
| 54810 | /* 160359 */ "VPOPCNTBZrm\0" |
| 54811 | /* 160371 */ "VPBROADCASTBZrm\0" |
| 54812 | /* 160387 */ "VPMINUBZrm\0" |
| 54813 | /* 160398 */ "VPMAXUBZrm\0" |
| 54814 | /* 160409 */ "VPACKSSWBZrm\0" |
| 54815 | /* 160422 */ "VPACKUSWBZrm\0" |
| 54816 | /* 160435 */ "VAESDECZrm\0" |
| 54817 | /* 160446 */ "VAESENCZrm\0" |
| 54818 | /* 160457 */ "VPERMI2DZrm\0" |
| 54819 | /* 160469 */ "VPERMT2DZrm\0" |
| 54820 | /* 160481 */ "VPSRADZrm\0" |
| 54821 | /* 160491 */ "VPSUBDZrm\0" |
| 54822 | /* 160501 */ "VPMOVSXBDZrm\0" |
| 54823 | /* 160514 */ "VPMOVZXBDZrm\0" |
| 54824 | /* 160527 */ "VPADDDZrm\0" |
| 54825 | /* 160537 */ "VPANDDZrm\0" |
| 54826 | /* 160547 */ "VPEXPANDDZrm\0" |
| 54827 | /* 160560 */ "VPGATHERDDZrm\0" |
| 54828 | /* 160574 */ "VPSLLDZrm\0" |
| 54829 | /* 160584 */ "VPMULLDZrm\0" |
| 54830 | /* 160595 */ "VPSRLDZrm\0" |
| 54831 | /* 160605 */ "VPBLENDMDZrm\0" |
| 54832 | /* 160618 */ "VPTESTNMDZrm\0" |
| 54833 | /* 160631 */ "VPERMDZrm\0" |
| 54834 | /* 160641 */ "VPTESTMDZrm\0" |
| 54835 | /* 160653 */ "VPANDNDZrm\0" |
| 54836 | /* 160664 */ "VCVTPH2PDZrm\0" |
| 54837 | /* 160677 */ "VPERMI2PDZrm\0" |
| 54838 | /* 160690 */ "VCVTDQ2PDZrm\0" |
| 54839 | /* 160703 */ "VCVTUDQ2PDZrm\0" |
| 54840 | /* 160717 */ "VCVTQQ2PDZrm\0" |
| 54841 | /* 160730 */ "VCVTUQQ2PDZrm\0" |
| 54842 | /* 160744 */ "VCVTPS2PDZrm\0" |
| 54843 | /* 160757 */ "VPERMT2PDZrm\0" |
| 54844 | /* 160770 */ "VMOVAPDZrm\0" |
| 54845 | /* 160781 */ "VSUBPDZrm\0" |
| 54846 | /* 160791 */ "VMINCPDZrm\0" |
| 54847 | /* 160802 */ "VMAXCPDZrm\0" |
| 54848 | /* 160813 */ "VADDPDZrm\0" |
| 54849 | /* 160823 */ "VEXPANDPDZrm\0" |
| 54850 | /* 160836 */ "VANDPDZrm\0" |
| 54851 | /* 160846 */ "VGATHERDPDZrm\0" |
| 54852 | /* 160860 */ "VSCALEFPDZrm\0" |
| 54853 | /* 160873 */ "VUNPCKHPDZrm\0" |
| 54854 | /* 160886 */ "VPERMILPDZrm\0" |
| 54855 | /* 160899 */ "VUNPCKLPDZrm\0" |
| 54856 | /* 160912 */ "VMULPDZrm\0" |
| 54857 | /* 160922 */ "VBLENDMPDZrm\0" |
| 54858 | /* 160935 */ "VPERMPDZrm\0" |
| 54859 | /* 160946 */ "VANDNPDZrm\0" |
| 54860 | /* 160957 */ "VMINPDZrm\0" |
| 54861 | /* 160967 */ "VGATHERQPDZrm\0" |
| 54862 | /* 160981 */ "VORPDZrm\0" |
| 54863 | /* 160990 */ "VXORPDZrm\0" |
| 54864 | /* 161000 */ "VFPCLASSPDZrm\0" |
| 54865 | /* 161014 */ "VMOVUPDZrm\0" |
| 54866 | /* 161025 */ "VDIVPDZrm\0" |
| 54867 | /* 161035 */ "VMAXPDZrm\0" |
| 54868 | /* 161045 */ "VPCMPEQDZrm\0" |
| 54869 | /* 161057 */ "VPGATHERQDZrm\0" |
| 54870 | /* 161071 */ "VPORDZrm\0" |
| 54871 | /* 161080 */ "VPXORDZrm\0" |
| 54872 | /* 161090 */ "VPINSRDZrm\0" |
| 54873 | /* 161101 */ "VCVTSI642SDZrm\0" |
| 54874 | /* 161116 */ "VCVTUSI642SDZrm\0" |
| 54875 | /* 161132 */ "VCVTSH2SDZrm\0" |
| 54876 | /* 161145 */ "VCVTSI2SDZrm\0" |
| 54877 | /* 161158 */ "VCVTUSI2SDZrm\0" |
| 54878 | /* 161172 */ "VCVTSS2SDZrm\0" |
| 54879 | /* 161185 */ "VRCP14SDZrm\0" |
| 54880 | /* 161197 */ "VRSQRT14SDZrm\0" |
| 54881 | /* 161211 */ "VPABSDZrm\0" |
| 54882 | /* 161221 */ "VSUBSDZrm\0" |
| 54883 | /* 161231 */ "VMINCSDZrm\0" |
| 54884 | /* 161242 */ "VMAXCSDZrm\0" |
| 54885 | /* 161253 */ "VADDSDZrm\0" |
| 54886 | /* 161263 */ "VSCALEFSDZrm\0" |
| 54887 | /* 161276 */ "VUCOMISDZrm\0" |
| 54888 | /* 161288 */ "VCOMISDZrm\0" |
| 54889 | /* 161299 */ "VMULSDZrm\0" |
| 54890 | /* 161309 */ "VPMINSDZrm\0" |
| 54891 | /* 161320 */ "VMINSDZrm\0" |
| 54892 | /* 161330 */ "VFPCLASSSDZrm\0" |
| 54893 | /* 161344 */ "VBROADCASTSDZrm\0" |
| 54894 | /* 161360 */ "VDIVSDZrm\0" |
| 54895 | /* 161370 */ "VMOVSDZrm\0" |
| 54896 | /* 161380 */ "VPMAXSDZrm\0" |
| 54897 | /* 161391 */ "VMAXSDZrm\0" |
| 54898 | /* 161401 */ "VP2INTERSECTDZrm\0" |
| 54899 | /* 161418 */ "VPCONFLICTDZrm\0" |
| 54900 | /* 161433 */ "VPCMPGTDZrm\0" |
| 54901 | /* 161445 */ "VPOPCNTDZrm\0" |
| 54902 | /* 161457 */ "VPLZCNTDZrm\0" |
| 54903 | /* 161469 */ "VPBROADCASTDZrm\0" |
| 54904 | /* 161485 */ "VPMINUDZrm\0" |
| 54905 | /* 161496 */ "VPMAXUDZrm\0" |
| 54906 | /* 161507 */ "VPSRAVDZrm\0" |
| 54907 | /* 161518 */ "VPSLLVDZrm\0" |
| 54908 | /* 161529 */ "VPROLVDZrm\0" |
| 54909 | /* 161540 */ "VPSRLVDZrm\0" |
| 54910 | /* 161551 */ "VPRORVDZrm\0" |
| 54911 | /* 161562 */ "VPMADDWDZrm\0" |
| 54912 | /* 161574 */ "VPUNPCKHWDZrm\0" |
| 54913 | /* 161588 */ "VPUNPCKLWDZrm\0" |
| 54914 | /* 161602 */ "VPMOVSXWDZrm\0" |
| 54915 | /* 161615 */ "VPMOVZXWDZrm\0" |
| 54916 | /* 161628 */ "VCVTPD2PHZrm\0" |
| 54917 | /* 161641 */ "VCVTDQ2PHZrm\0" |
| 54918 | /* 161654 */ "VCVTUDQ2PHZrm\0" |
| 54919 | /* 161668 */ "VCVTQQ2PHZrm\0" |
| 54920 | /* 161681 */ "VCVTUQQ2PHZrm\0" |
| 54921 | /* 161695 */ "VCVTW2PHZrm\0" |
| 54922 | /* 161707 */ "VCVTUW2PHZrm\0" |
| 54923 | /* 161720 */ "VSUBPHZrm\0" |
| 54924 | /* 161730 */ "VFCMULCPHZrm\0" |
| 54925 | /* 161743 */ "VFMULCPHZrm\0" |
| 54926 | /* 161755 */ "VMINCPHZrm\0" |
| 54927 | /* 161766 */ "VMAXCPHZrm\0" |
| 54928 | /* 161777 */ "VADDPHZrm\0" |
| 54929 | /* 161787 */ "VSCALEFPHZrm\0" |
| 54930 | /* 161800 */ "VMULPHZrm\0" |
| 54931 | /* 161810 */ "VMINPHZrm\0" |
| 54932 | /* 161820 */ "VFPCLASSPHZrm\0" |
| 54933 | /* 161834 */ "VDIVPHZrm\0" |
| 54934 | /* 161844 */ "VMAXPHZrm\0" |
| 54935 | /* 161854 */ "VCVTSI642SHZrm\0" |
| 54936 | /* 161869 */ "VCVTUSI642SHZrm\0" |
| 54937 | /* 161885 */ "VCVTSD2SHZrm\0" |
| 54938 | /* 161898 */ "VCVTSI2SHZrm\0" |
| 54939 | /* 161911 */ "VCVTUSI2SHZrm\0" |
| 54940 | /* 161925 */ "VCVTSS2SHZrm\0" |
| 54941 | /* 161938 */ "VSUBSHZrm\0" |
| 54942 | /* 161948 */ "VFCMULCSHZrm\0" |
| 54943 | /* 161961 */ "VFMULCSHZrm\0" |
| 54944 | /* 161973 */ "VMINCSHZrm\0" |
| 54945 | /* 161984 */ "VMAXCSHZrm\0" |
| 54946 | /* 161995 */ "VADDSHZrm\0" |
| 54947 | /* 162005 */ "VSCALEFSHZrm\0" |
| 54948 | /* 162018 */ "VUCOMISHZrm\0" |
| 54949 | /* 162030 */ "VCOMISHZrm\0" |
| 54950 | /* 162041 */ "VMULSHZrm\0" |
| 54951 | /* 162051 */ "VMINSHZrm\0" |
| 54952 | /* 162061 */ "VRCPSHZrm\0" |
| 54953 | /* 162071 */ "VFPCLASSSHZrm\0" |
| 54954 | /* 162085 */ "VRSQRTSHZrm\0" |
| 54955 | /* 162097 */ "VDIVSHZrm\0" |
| 54956 | /* 162107 */ "VMOVSHZrm\0" |
| 54957 | /* 162117 */ "VMAXSHZrm\0" |
| 54958 | /* 162127 */ "VMOVDI2PDIZrm\0" |
| 54959 | /* 162141 */ "VMOVQI2PQIZrm\0" |
| 54960 | /* 162155 */ "VMOV64toPQIZrm\0" |
| 54961 | /* 162170 */ "VCVTTSD2SIZrm\0" |
| 54962 | /* 162184 */ "VCVTSD2SIZrm\0" |
| 54963 | /* 162197 */ "VCVTTSH2SIZrm\0" |
| 54964 | /* 162211 */ "VCVTTSS2SIZrm\0" |
| 54965 | /* 162225 */ "VCVTSS2SIZrm\0" |
| 54966 | /* 162238 */ "VCVTTSD2USIZrm\0" |
| 54967 | /* 162253 */ "VCVTTSH2USIZrm\0" |
| 54968 | /* 162268 */ "VCVTTSS2USIZrm\0" |
| 54969 | /* 162283 */ "VMOVDDUPZrm\0" |
| 54970 | /* 162295 */ "VMOVSHDUPZrm\0" |
| 54971 | /* 162308 */ "VMOVSLDUPZrm\0" |
| 54972 | /* 162321 */ "VPERMI2QZrm\0" |
| 54973 | /* 162333 */ "VPERMT2QZrm\0" |
| 54974 | /* 162345 */ "VPSRAQZrm\0" |
| 54975 | /* 162355 */ "VPSUBQZrm\0" |
| 54976 | /* 162365 */ "VPMOVSXBQZrm\0" |
| 54977 | /* 162378 */ "VPMOVZXBQZrm\0" |
| 54978 | /* 162391 */ "VCVTTPD2DQZrm\0" |
| 54979 | /* 162405 */ "VCVTPD2DQZrm\0" |
| 54980 | /* 162418 */ "VCVTTPH2DQZrm\0" |
| 54981 | /* 162432 */ "VCVTPH2DQZrm\0" |
| 54982 | /* 162445 */ "VCVTTPS2DQZrm\0" |
| 54983 | /* 162459 */ "VCVTPS2DQZrm\0" |
| 54984 | /* 162472 */ "VPADDQZrm\0" |
| 54985 | /* 162482 */ "VPUNPCKHDQZrm\0" |
| 54986 | /* 162496 */ "VPUNPCKLDQZrm\0" |
| 54987 | /* 162510 */ "VPMULDQZrm\0" |
| 54988 | /* 162521 */ "VPANDQZrm\0" |
| 54989 | /* 162531 */ "VPEXPANDQZrm\0" |
| 54990 | /* 162544 */ "VPUNPCKHQDQZrm\0" |
| 54991 | /* 162559 */ "VPUNPCKLQDQZrm\0" |
| 54992 | /* 162574 */ "VPGATHERDQZrm\0" |
| 54993 | /* 162588 */ "VCVTTPD2UDQZrm\0" |
| 54994 | /* 162603 */ "VCVTPD2UDQZrm\0" |
| 54995 | /* 162617 */ "VCVTTPH2UDQZrm\0" |
| 54996 | /* 162632 */ "VCVTPH2UDQZrm\0" |
| 54997 | /* 162646 */ "VCVTTPS2UDQZrm\0" |
| 54998 | /* 162661 */ "VCVTPS2UDQZrm\0" |
| 54999 | /* 162675 */ "VPMULUDQZrm\0" |
| 55000 | /* 162687 */ "VPMOVSXDQZrm\0" |
| 55001 | /* 162700 */ "VPMOVZXDQZrm\0" |
| 55002 | /* 162713 */ "VPSLLQZrm\0" |
| 55003 | /* 162723 */ "VPMULLQZrm\0" |
| 55004 | /* 162734 */ "VPSRLQZrm\0" |
| 55005 | /* 162744 */ "VPBLENDMQZrm\0" |
| 55006 | /* 162757 */ "VPTESTNMQZrm\0" |
| 55007 | /* 162770 */ "VPERMQZrm\0" |
| 55008 | /* 162780 */ "VPTESTMQZrm\0" |
| 55009 | /* 162792 */ "VPANDNQZrm\0" |
| 55010 | /* 162803 */ "VCVTTPD2QQZrm\0" |
| 55011 | /* 162817 */ "VCVTPD2QQZrm\0" |
| 55012 | /* 162830 */ "VCVTTPH2QQZrm\0" |
| 55013 | /* 162844 */ "VCVTPH2QQZrm\0" |
| 55014 | /* 162857 */ "VCVTTPS2QQZrm\0" |
| 55015 | /* 162871 */ "VCVTPS2QQZrm\0" |
| 55016 | /* 162884 */ "VPCMPEQQZrm\0" |
| 55017 | /* 162896 */ "VPGATHERQQZrm\0" |
| 55018 | /* 162910 */ "VCVTTPD2UQQZrm\0" |
| 55019 | /* 162925 */ "VCVTPD2UQQZrm\0" |
| 55020 | /* 162939 */ "VCVTTPH2UQQZrm\0" |
| 55021 | /* 162954 */ "VCVTPH2UQQZrm\0" |
| 55022 | /* 162968 */ "VCVTTPS2UQQZrm\0" |
| 55023 | /* 162983 */ "VCVTPS2UQQZrm\0" |
| 55024 | /* 162997 */ "VPORQZrm\0" |
| 55025 | /* 163006 */ "VPXORQZrm\0" |
| 55026 | /* 163016 */ "VPINSRQZrm\0" |
| 55027 | /* 163027 */ "VPABSQZrm\0" |
| 55028 | /* 163037 */ "VPMINSQZrm\0" |
| 55029 | /* 163048 */ "VPMAXSQZrm\0" |
| 55030 | /* 163059 */ "VP2INTERSECTQZrm\0" |
| 55031 | /* 163076 */ "VPCONFLICTQZrm\0" |
| 55032 | /* 163091 */ "VPCMPGTQZrm\0" |
| 55033 | /* 163103 */ "VPOPCNTQZrm\0" |
| 55034 | /* 163115 */ "VPLZCNTQZrm\0" |
| 55035 | /* 163127 */ "VPBROADCASTQZrm\0" |
| 55036 | /* 163143 */ "VPMINUQZrm\0" |
| 55037 | /* 163154 */ "VPMAXUQZrm\0" |
| 55038 | /* 163165 */ "VPSRAVQZrm\0" |
| 55039 | /* 163176 */ "VPSLLVQZrm\0" |
| 55040 | /* 163187 */ "VPROLVQZrm\0" |
| 55041 | /* 163198 */ "VPSRLVQZrm\0" |
| 55042 | /* 163209 */ "VPRORVQZrm\0" |
| 55043 | /* 163220 */ "VPMOVSXWQZrm\0" |
| 55044 | /* 163233 */ "VPMOVZXWQZrm\0" |
| 55045 | /* 163246 */ "VCVTPD2PSZrm\0" |
| 55046 | /* 163259 */ "VCVTPH2PSZrm\0" |
| 55047 | /* 163272 */ "VPERMI2PSZrm\0" |
| 55048 | /* 163285 */ "VCVTDQ2PSZrm\0" |
| 55049 | /* 163298 */ "VCVTUDQ2PSZrm\0" |
| 55050 | /* 163312 */ "VCVTQQ2PSZrm\0" |
| 55051 | /* 163325 */ "VCVTUQQ2PSZrm\0" |
| 55052 | /* 163339 */ "VPERMT2PSZrm\0" |
| 55053 | /* 163352 */ "VMOVAPSZrm\0" |
| 55054 | /* 163363 */ "VSUBPSZrm\0" |
| 55055 | /* 163373 */ "VMINCPSZrm\0" |
| 55056 | /* 163384 */ "VMAXCPSZrm\0" |
| 55057 | /* 163395 */ "VADDPSZrm\0" |
| 55058 | /* 163405 */ "VEXPANDPSZrm\0" |
| 55059 | /* 163418 */ "VANDPSZrm\0" |
| 55060 | /* 163428 */ "VGATHERDPSZrm\0" |
| 55061 | /* 163442 */ "VSCALEFPSZrm\0" |
| 55062 | /* 163455 */ "VUNPCKHPSZrm\0" |
| 55063 | /* 163468 */ "VPERMILPSZrm\0" |
| 55064 | /* 163481 */ "VUNPCKLPSZrm\0" |
| 55065 | /* 163494 */ "VMULPSZrm\0" |
| 55066 | /* 163504 */ "VBLENDMPSZrm\0" |
| 55067 | /* 163517 */ "VPERMPSZrm\0" |
| 55068 | /* 163528 */ "VANDNPSZrm\0" |
| 55069 | /* 163539 */ "VMINPSZrm\0" |
| 55070 | /* 163549 */ "VGATHERQPSZrm\0" |
| 55071 | /* 163563 */ "VORPSZrm\0" |
| 55072 | /* 163572 */ "VXORPSZrm\0" |
| 55073 | /* 163582 */ "VFPCLASSPSZrm\0" |
| 55074 | /* 163596 */ "VINSERTPSZrm\0" |
| 55075 | /* 163609 */ "VMOVUPSZrm\0" |
| 55076 | /* 163620 */ "VDIVPSZrm\0" |
| 55077 | /* 163630 */ "VMAXPSZrm\0" |
| 55078 | /* 163640 */ "VCVTSI642SSZrm\0" |
| 55079 | /* 163655 */ "VCVTUSI642SSZrm\0" |
| 55080 | /* 163671 */ "VCVTSD2SSZrm\0" |
| 55081 | /* 163684 */ "VCVTSH2SSZrm\0" |
| 55082 | /* 163697 */ "VCVTSI2SSZrm\0" |
| 55083 | /* 163710 */ "VCVTUSI2SSZrm\0" |
| 55084 | /* 163724 */ "VRCP14SSZrm\0" |
| 55085 | /* 163736 */ "VRSQRT14SSZrm\0" |
| 55086 | /* 163750 */ "VSUBSSZrm\0" |
| 55087 | /* 163760 */ "VMINCSSZrm\0" |
| 55088 | /* 163771 */ "VMAXCSSZrm\0" |
| 55089 | /* 163782 */ "VADDSSZrm\0" |
| 55090 | /* 163792 */ "VSCALEFSSZrm\0" |
| 55091 | /* 163805 */ "VUCOMISSZrm\0" |
| 55092 | /* 163817 */ "VCOMISSZrm\0" |
| 55093 | /* 163828 */ "VMULSSZrm\0" |
| 55094 | /* 163838 */ "VMINSSZrm\0" |
| 55095 | /* 163848 */ "VFPCLASSSSZrm\0" |
| 55096 | /* 163862 */ "VBROADCASTSSZrm\0" |
| 55097 | /* 163878 */ "VDIVSSZrm\0" |
| 55098 | /* 163888 */ "VMOVSSZrm\0" |
| 55099 | /* 163898 */ "VMAXSSZrm\0" |
| 55100 | /* 163908 */ "VAESDECLASTZrm\0" |
| 55101 | /* 163923 */ "VAESENCLASTZrm\0" |
| 55102 | /* 163938 */ "VCVTTPH2WZrm\0" |
| 55103 | /* 163951 */ "VCVTPH2WZrm\0" |
| 55104 | /* 163963 */ "VPERMI2WZrm\0" |
| 55105 | /* 163975 */ "VPERMT2WZrm\0" |
| 55106 | /* 163987 */ "VPSRAWZrm\0" |
| 55107 | /* 163997 */ "VPSADBWZrm\0" |
| 55108 | /* 164008 */ "VPUNPCKHBWZrm\0" |
| 55109 | /* 164022 */ "VPUNPCKLBWZrm\0" |
| 55110 | /* 164036 */ "VPSUBWZrm\0" |
| 55111 | /* 164046 */ "VPMOVSXBWZrm\0" |
| 55112 | /* 164059 */ "VPMOVZXBWZrm\0" |
| 55113 | /* 164072 */ "VPADDWZrm\0" |
| 55114 | /* 164082 */ "VPEXPANDWZrm\0" |
| 55115 | /* 164095 */ "VPACKSSDWZrm\0" |
| 55116 | /* 164108 */ "VPACKUSDWZrm\0" |
| 55117 | /* 164121 */ "VPAVGWZrm\0" |
| 55118 | /* 164131 */ "VPMULHWZrm\0" |
| 55119 | /* 164142 */ "VPSLLWZrm\0" |
| 55120 | /* 164152 */ "VPMULLWZrm\0" |
| 55121 | /* 164163 */ "VPSRLWZrm\0" |
| 55122 | /* 164173 */ "VPBLENDMWZrm\0" |
| 55123 | /* 164186 */ "VPTESTNMWZrm\0" |
| 55124 | /* 164199 */ "VPERMWZrm\0" |
| 55125 | /* 164209 */ "VPTESTMWZrm\0" |
| 55126 | /* 164221 */ "VPCMPEQWZrm\0" |
| 55127 | /* 164233 */ "VPINSRWZrm\0" |
| 55128 | /* 164244 */ "VPABSWZrm\0" |
| 55129 | /* 164254 */ "VPMADDUBSWZrm\0" |
| 55130 | /* 164268 */ "VPSUBSWZrm\0" |
| 55131 | /* 164279 */ "VPADDSWZrm\0" |
| 55132 | /* 164290 */ "VPMINSWZrm\0" |
| 55133 | /* 164301 */ "VPMULHRSWZrm\0" |
| 55134 | /* 164314 */ "VPSUBUSWZrm\0" |
| 55135 | /* 164326 */ "VPADDUSWZrm\0" |
| 55136 | /* 164338 */ "VPMAXSWZrm\0" |
| 55137 | /* 164349 */ "VPCMPGTWZrm\0" |
| 55138 | /* 164361 */ "VPOPCNTWZrm\0" |
| 55139 | /* 164373 */ "VPBROADCASTWZrm\0" |
| 55140 | /* 164389 */ "VCVTTPH2UWZrm\0" |
| 55141 | /* 164403 */ "VCVTPH2UWZrm\0" |
| 55142 | /* 164416 */ "VPMULHUWZrm\0" |
| 55143 | /* 164428 */ "VPMINUWZrm\0" |
| 55144 | /* 164439 */ "VPMAXUWZrm\0" |
| 55145 | /* 164450 */ "VPSRAVWZrm\0" |
| 55146 | /* 164461 */ "VPSLLVWZrm\0" |
| 55147 | /* 164472 */ "VPSRLVWZrm\0" |
| 55148 | /* 164483 */ "VCVTPS2PHXZrm\0" |
| 55149 | /* 164497 */ "VCVTPH2PSXZrm\0" |
| 55150 | /* 164511 */ "VPPERMrrm\0" |
| 55151 | /* 164521 */ "VPCMOVrrm\0" |
| 55152 | /* 164531 */ "VPCMOVYrrm\0" |
| 55153 | /* 164542 */ "MOV16sm\0" |
| 55154 | /* 164550 */ "SEH_StackAlign\0" |
| 55155 | /* 164565 */ "EH_SjLj_Setup\0" |
| 55156 | /* 164579 */ "SUB_FST0r\0" |
| 55157 | /* 164589 */ "ADD_FST0r\0" |
| 55158 | /* 164599 */ "MUL_FST0r\0" |
| 55159 | /* 164609 */ "COM_FST0r\0" |
| 55160 | /* 164619 */ "COMP_FST0r\0" |
| 55161 | /* 164630 */ "SUBR_FST0r\0" |
| 55162 | /* 164641 */ "DIVR_FST0r\0" |
| 55163 | /* 164652 */ "DIV_FST0r\0" |
| 55164 | /* 164662 */ "PLEA32r\0" |
| 55165 | /* 164670 */ "DEC32r\0" |
| 55166 | /* 164677 */ "INC32r\0" |
| 55167 | /* 164684 */ "MOVPC32r\0" |
| 55168 | /* 164693 */ "SETB_C32r\0" |
| 55169 | /* 164703 */ "RDSEED32r\0" |
| 55170 | /* 164713 */ "RDRAND32r\0" |
| 55171 | /* 164723 */ "NEG32r\0" |
| 55172 | /* 164730 */ "PUSH32r\0" |
| 55173 | /* 164738 */ "CALL32r\0" |
| 55174 | /* 164746 */ "IMUL32r\0" |
| 55175 | /* 164754 */ "CLZERO32r\0" |
| 55176 | /* 164764 */ "BSWAP32r\0" |
| 55177 | /* 164773 */ "JMP32r\0" |
| 55178 | /* 164780 */ "POP32r\0" |
| 55179 | /* 164787 */ "STR32r\0" |
| 55180 | /* 164794 */ "SLDT32r\0" |
| 55181 | /* 164802 */ "NOT32r\0" |
| 55182 | /* 164809 */ "IDIV32r\0" |
| 55183 | /* 164817 */ "SMSW32r\0" |
| 55184 | /* 164825 */ "LEA64_32r\0" |
| 55185 | /* 164835 */ "PLEA64r\0" |
| 55186 | /* 164843 */ "DEC64r\0" |
| 55187 | /* 164850 */ "INC64r\0" |
| 55188 | /* 164857 */ "SETB_C64r\0" |
| 55189 | /* 164867 */ "RDSEED64r\0" |
| 55190 | /* 164877 */ "RDRAND64r\0" |
| 55191 | /* 164887 */ "PTWRITE64r\0" |
| 55192 | /* 164898 */ "NEG64r\0" |
| 55193 | /* 164905 */ "PUSH64r\0" |
| 55194 | /* 164913 */ "CALL64r\0" |
| 55195 | /* 164921 */ "IMUL64r\0" |
| 55196 | /* 164929 */ "CLZERO64r\0" |
| 55197 | /* 164939 */ "BSWAP64r\0" |
| 55198 | /* 164948 */ "PUSHP64r\0" |
| 55199 | /* 164957 */ "JMP64r\0" |
| 55200 | /* 164964 */ "POP64r\0" |
| 55201 | /* 164971 */ "POPP64r\0" |
| 55202 | /* 164979 */ "STR64r\0" |
| 55203 | /* 164986 */ "SLDT64r\0" |
| 55204 | /* 164994 */ "NOT64r\0" |
| 55205 | /* 165001 */ "IDIV64r\0" |
| 55206 | /* 165009 */ "SMSW64r\0" |
| 55207 | /* 165017 */ "LEA16r\0" |
| 55208 | /* 165024 */ "DEC16r\0" |
| 55209 | /* 165031 */ "INC16r\0" |
| 55210 | /* 165038 */ "RDSEED16r\0" |
| 55211 | /* 165048 */ "RDRAND16r\0" |
| 55212 | /* 165058 */ "NEG16r\0" |
| 55213 | /* 165065 */ "PUSH16r\0" |
| 55214 | /* 165073 */ "CALL16r\0" |
| 55215 | /* 165081 */ "IMUL16r\0" |
| 55216 | /* 165089 */ "JMP16r\0" |
| 55217 | /* 165096 */ "POP16r\0" |
| 55218 | /* 165103 */ "STR16r\0" |
| 55219 | /* 165110 */ "LKGS16r\0" |
| 55220 | /* 165118 */ "LLDT16r\0" |
| 55221 | /* 165126 */ "SLDT16r\0" |
| 55222 | /* 165134 */ "NOT16r\0" |
| 55223 | /* 165141 */ "IDIV16r\0" |
| 55224 | /* 165149 */ "LMSW16r\0" |
| 55225 | /* 165157 */ "SMSW16r\0" |
| 55226 | /* 165165 */ "FNSTSW16r\0" |
| 55227 | /* 165175 */ "VFMADDSUB231PDZ256r\0" |
| 55228 | /* 165195 */ "VFMSUB231PDZ256r\0" |
| 55229 | /* 165212 */ "VFNMSUB231PDZ256r\0" |
| 55230 | /* 165230 */ "VFMSUBADD231PDZ256r\0" |
| 55231 | /* 165250 */ "VFMADD231PDZ256r\0" |
| 55232 | /* 165267 */ "VFNMADD231PDZ256r\0" |
| 55233 | /* 165285 */ "VFMADDSUB132PDZ256r\0" |
| 55234 | /* 165305 */ "VFMSUB132PDZ256r\0" |
| 55235 | /* 165322 */ "VFNMSUB132PDZ256r\0" |
| 55236 | /* 165340 */ "VFMSUBADD132PDZ256r\0" |
| 55237 | /* 165360 */ "VFMADD132PDZ256r\0" |
| 55238 | /* 165377 */ "VFNMADD132PDZ256r\0" |
| 55239 | /* 165395 */ "VFMADDSUB213PDZ256r\0" |
| 55240 | /* 165415 */ "VFMSUB213PDZ256r\0" |
| 55241 | /* 165432 */ "VFNMSUB213PDZ256r\0" |
| 55242 | /* 165450 */ "VFMSUBADD213PDZ256r\0" |
| 55243 | /* 165470 */ "VFMADD213PDZ256r\0" |
| 55244 | /* 165487 */ "VFNMADD213PDZ256r\0" |
| 55245 | /* 165505 */ "VRCP14PDZ256r\0" |
| 55246 | /* 165519 */ "VRSQRT14PDZ256r\0" |
| 55247 | /* 165535 */ "VGETEXPPDZ256r\0" |
| 55248 | /* 165550 */ "VSQRTPDZ256r\0" |
| 55249 | /* 165563 */ "VPDPWSSDZ256r\0" |
| 55250 | /* 165577 */ "VPDPBUSDZ256r\0" |
| 55251 | /* 165591 */ "VPSHLDVDZ256r\0" |
| 55252 | /* 165605 */ "VPSHRDVDZ256r\0" |
| 55253 | /* 165619 */ "VFMADDSUB231PHZ256r\0" |
| 55254 | /* 165639 */ "VFMSUB231PHZ256r\0" |
| 55255 | /* 165656 */ "VFNMSUB231PHZ256r\0" |
| 55256 | /* 165674 */ "VFMSUBADD231PHZ256r\0" |
| 55257 | /* 165694 */ "VFMADD231PHZ256r\0" |
| 55258 | /* 165711 */ "VFNMADD231PHZ256r\0" |
| 55259 | /* 165729 */ "VFMADDSUB132PHZ256r\0" |
| 55260 | /* 165749 */ "VFMSUB132PHZ256r\0" |
| 55261 | /* 165766 */ "VFNMSUB132PHZ256r\0" |
| 55262 | /* 165784 */ "VFMSUBADD132PHZ256r\0" |
| 55263 | /* 165804 */ "VFMADD132PHZ256r\0" |
| 55264 | /* 165821 */ "VFNMADD132PHZ256r\0" |
| 55265 | /* 165839 */ "VFMADDSUB213PHZ256r\0" |
| 55266 | /* 165859 */ "VFMSUB213PHZ256r\0" |
| 55267 | /* 165876 */ "VFNMSUB213PHZ256r\0" |
| 55268 | /* 165894 */ "VFMSUBADD213PHZ256r\0" |
| 55269 | /* 165914 */ "VFMADD213PHZ256r\0" |
| 55270 | /* 165931 */ "VFNMADD213PHZ256r\0" |
| 55271 | /* 165949 */ "VFCMADDCPHZ256r\0" |
| 55272 | /* 165965 */ "VFMADDCPHZ256r\0" |
| 55273 | /* 165980 */ "VRCPPHZ256r\0" |
| 55274 | /* 165992 */ "VGETEXPPHZ256r\0" |
| 55275 | /* 166007 */ "VRSQRTPHZ256r\0" |
| 55276 | /* 166021 */ "VSQRTPHZ256r\0" |
| 55277 | /* 166034 */ "VPMADD52HUQZ256r\0" |
| 55278 | /* 166051 */ "VPMADD52LUQZ256r\0" |
| 55279 | /* 166068 */ "VPSHLDVQZ256r\0" |
| 55280 | /* 166082 */ "VPSHRDVQZ256r\0" |
| 55281 | /* 166096 */ "VPDPWSSDSZ256r\0" |
| 55282 | /* 166111 */ "VPDPBUSDSZ256r\0" |
| 55283 | /* 166126 */ "VFMADDSUB231PSZ256r\0" |
| 55284 | /* 166146 */ "VFMSUB231PSZ256r\0" |
| 55285 | /* 166163 */ "VFNMSUB231PSZ256r\0" |
| 55286 | /* 166181 */ "VFMSUBADD231PSZ256r\0" |
| 55287 | /* 166201 */ "VFMADD231PSZ256r\0" |
| 55288 | /* 166218 */ "VFNMADD231PSZ256r\0" |
| 55289 | /* 166236 */ "VFMADDSUB132PSZ256r\0" |
| 55290 | /* 166256 */ "VFMSUB132PSZ256r\0" |
| 55291 | /* 166273 */ "VFNMSUB132PSZ256r\0" |
| 55292 | /* 166291 */ "VFMSUBADD132PSZ256r\0" |
| 55293 | /* 166311 */ "VFMADD132PSZ256r\0" |
| 55294 | /* 166328 */ "VFNMADD132PSZ256r\0" |
| 55295 | /* 166346 */ "VFMADDSUB213PSZ256r\0" |
| 55296 | /* 166366 */ "VFMSUB213PSZ256r\0" |
| 55297 | /* 166383 */ "VFNMSUB213PSZ256r\0" |
| 55298 | /* 166401 */ "VFMSUBADD213PSZ256r\0" |
| 55299 | /* 166421 */ "VFMADD213PSZ256r\0" |
| 55300 | /* 166438 */ "VFNMADD213PSZ256r\0" |
| 55301 | /* 166456 */ "VRCP14PSZ256r\0" |
| 55302 | /* 166470 */ "VRSQRT14PSZ256r\0" |
| 55303 | /* 166486 */ "VDPBF16PSZ256r\0" |
| 55304 | /* 166501 */ "VGETEXPPSZ256r\0" |
| 55305 | /* 166516 */ "VSQRTPSZ256r\0" |
| 55306 | /* 166529 */ "VPSHLDVWZ256r\0" |
| 55307 | /* 166543 */ "VPSHRDVWZ256r\0" |
| 55308 | /* 166557 */ "VFMADDSUB231PDZ128r\0" |
| 55309 | /* 166577 */ "VFMSUB231PDZ128r\0" |
| 55310 | /* 166594 */ "VFNMSUB231PDZ128r\0" |
| 55311 | /* 166612 */ "VFMSUBADD231PDZ128r\0" |
| 55312 | /* 166632 */ "VFMADD231PDZ128r\0" |
| 55313 | /* 166649 */ "VFNMADD231PDZ128r\0" |
| 55314 | /* 166667 */ "VFMADDSUB132PDZ128r\0" |
| 55315 | /* 166687 */ "VFMSUB132PDZ128r\0" |
| 55316 | /* 166704 */ "VFNMSUB132PDZ128r\0" |
| 55317 | /* 166722 */ "VFMSUBADD132PDZ128r\0" |
| 55318 | /* 166742 */ "VFMADD132PDZ128r\0" |
| 55319 | /* 166759 */ "VFNMADD132PDZ128r\0" |
| 55320 | /* 166777 */ "VFMADDSUB213PDZ128r\0" |
| 55321 | /* 166797 */ "VFMSUB213PDZ128r\0" |
| 55322 | /* 166814 */ "VFNMSUB213PDZ128r\0" |
| 55323 | /* 166832 */ "VFMSUBADD213PDZ128r\0" |
| 55324 | /* 166852 */ "VFMADD213PDZ128r\0" |
| 55325 | /* 166869 */ "VFNMADD213PDZ128r\0" |
| 55326 | /* 166887 */ "VRCP14PDZ128r\0" |
| 55327 | /* 166901 */ "VRSQRT14PDZ128r\0" |
| 55328 | /* 166917 */ "VGETEXPPDZ128r\0" |
| 55329 | /* 166932 */ "VSQRTPDZ128r\0" |
| 55330 | /* 166945 */ "VPDPWSSDZ128r\0" |
| 55331 | /* 166959 */ "VPDPBUSDZ128r\0" |
| 55332 | /* 166973 */ "VPSHLDVDZ128r\0" |
| 55333 | /* 166987 */ "VPSHRDVDZ128r\0" |
| 55334 | /* 167001 */ "VFMADDSUB231PHZ128r\0" |
| 55335 | /* 167021 */ "VFMSUB231PHZ128r\0" |
| 55336 | /* 167038 */ "VFNMSUB231PHZ128r\0" |
| 55337 | /* 167056 */ "VFMSUBADD231PHZ128r\0" |
| 55338 | /* 167076 */ "VFMADD231PHZ128r\0" |
| 55339 | /* 167093 */ "VFNMADD231PHZ128r\0" |
| 55340 | /* 167111 */ "VFMADDSUB132PHZ128r\0" |
| 55341 | /* 167131 */ "VFMSUB132PHZ128r\0" |
| 55342 | /* 167148 */ "VFNMSUB132PHZ128r\0" |
| 55343 | /* 167166 */ "VFMSUBADD132PHZ128r\0" |
| 55344 | /* 167186 */ "VFMADD132PHZ128r\0" |
| 55345 | /* 167203 */ "VFNMADD132PHZ128r\0" |
| 55346 | /* 167221 */ "VFMADDSUB213PHZ128r\0" |
| 55347 | /* 167241 */ "VFMSUB213PHZ128r\0" |
| 55348 | /* 167258 */ "VFNMSUB213PHZ128r\0" |
| 55349 | /* 167276 */ "VFMSUBADD213PHZ128r\0" |
| 55350 | /* 167296 */ "VFMADD213PHZ128r\0" |
| 55351 | /* 167313 */ "VFNMADD213PHZ128r\0" |
| 55352 | /* 167331 */ "VFCMADDCPHZ128r\0" |
| 55353 | /* 167347 */ "VFMADDCPHZ128r\0" |
| 55354 | /* 167362 */ "VRCPPHZ128r\0" |
| 55355 | /* 167374 */ "VGETEXPPHZ128r\0" |
| 55356 | /* 167389 */ "VRSQRTPHZ128r\0" |
| 55357 | /* 167403 */ "VSQRTPHZ128r\0" |
| 55358 | /* 167416 */ "VPMADD52HUQZ128r\0" |
| 55359 | /* 167433 */ "VPMADD52LUQZ128r\0" |
| 55360 | /* 167450 */ "VPSHLDVQZ128r\0" |
| 55361 | /* 167464 */ "VPSHRDVQZ128r\0" |
| 55362 | /* 167478 */ "VPDPWSSDSZ128r\0" |
| 55363 | /* 167493 */ "VPDPBUSDSZ128r\0" |
| 55364 | /* 167508 */ "VFMADDSUB231PSZ128r\0" |
| 55365 | /* 167528 */ "VFMSUB231PSZ128r\0" |
| 55366 | /* 167545 */ "VFNMSUB231PSZ128r\0" |
| 55367 | /* 167563 */ "VFMSUBADD231PSZ128r\0" |
| 55368 | /* 167583 */ "VFMADD231PSZ128r\0" |
| 55369 | /* 167600 */ "VFNMADD231PSZ128r\0" |
| 55370 | /* 167618 */ "VFMADDSUB132PSZ128r\0" |
| 55371 | /* 167638 */ "VFMSUB132PSZ128r\0" |
| 55372 | /* 167655 */ "VFNMSUB132PSZ128r\0" |
| 55373 | /* 167673 */ "VFMSUBADD132PSZ128r\0" |
| 55374 | /* 167693 */ "VFMADD132PSZ128r\0" |
| 55375 | /* 167710 */ "VFNMADD132PSZ128r\0" |
| 55376 | /* 167728 */ "VFMADDSUB213PSZ128r\0" |
| 55377 | /* 167748 */ "VFMSUB213PSZ128r\0" |
| 55378 | /* 167765 */ "VFNMSUB213PSZ128r\0" |
| 55379 | /* 167783 */ "VFMSUBADD213PSZ128r\0" |
| 55380 | /* 167803 */ "VFMADD213PSZ128r\0" |
| 55381 | /* 167820 */ "VFNMADD213PSZ128r\0" |
| 55382 | /* 167838 */ "VRCP14PSZ128r\0" |
| 55383 | /* 167852 */ "VRSQRT14PSZ128r\0" |
| 55384 | /* 167868 */ "VDPBF16PSZ128r\0" |
| 55385 | /* 167883 */ "VGETEXPPSZ128r\0" |
| 55386 | /* 167898 */ "VSQRTPSZ128r\0" |
| 55387 | /* 167911 */ "VPSHLDVWZ128r\0" |
| 55388 | /* 167925 */ "VPSHRDVWZ128r\0" |
| 55389 | /* 167939 */ "DEC8r\0" |
| 55390 | /* 167945 */ "INC8r\0" |
| 55391 | /* 167951 */ "NEG8r\0" |
| 55392 | /* 167957 */ "IMUL8r\0" |
| 55393 | /* 167964 */ "NOT8r\0" |
| 55394 | /* 167970 */ "IDIV8r\0" |
| 55395 | /* 167977 */ "SETCCr\0" |
| 55396 | /* 167984 */ "SETZUCCr\0" |
| 55397 | /* 167993 */ "FP80_ADDr\0" |
| 55398 | /* 168003 */ "VFMADDSUB231PDr\0" |
| 55399 | /* 168019 */ "VFMSUB231PDr\0" |
| 55400 | /* 168032 */ "VFNMSUB231PDr\0" |
| 55401 | /* 168046 */ "VFMSUBADD231PDr\0" |
| 55402 | /* 168062 */ "VFMADD231PDr\0" |
| 55403 | /* 168075 */ "VFNMADD231PDr\0" |
| 55404 | /* 168089 */ "VFMADDSUB132PDr\0" |
| 55405 | /* 168105 */ "VFMSUB132PDr\0" |
| 55406 | /* 168118 */ "VFNMSUB132PDr\0" |
| 55407 | /* 168132 */ "VFMSUBADD132PDr\0" |
| 55408 | /* 168148 */ "VFMADD132PDr\0" |
| 55409 | /* 168161 */ "VFNMADD132PDr\0" |
| 55410 | /* 168175 */ "VFMADDSUB213PDr\0" |
| 55411 | /* 168191 */ "VFMSUB213PDr\0" |
| 55412 | /* 168204 */ "VFNMSUB213PDr\0" |
| 55413 | /* 168218 */ "VFMSUBADD213PDr\0" |
| 55414 | /* 168234 */ "VFMADD213PDr\0" |
| 55415 | /* 168247 */ "VFNMADD213PDr\0" |
| 55416 | /* 168261 */ "VSQRTPDr\0" |
| 55417 | /* 168270 */ "VFMSUB231SDr\0" |
| 55418 | /* 168283 */ "VFNMSUB231SDr\0" |
| 55419 | /* 168297 */ "VFMADD231SDr\0" |
| 55420 | /* 168310 */ "VFNMADD231SDr\0" |
| 55421 | /* 168324 */ "VFMSUB132SDr\0" |
| 55422 | /* 168337 */ "VFNMSUB132SDr\0" |
| 55423 | /* 168351 */ "VFMADD132SDr\0" |
| 55424 | /* 168364 */ "VFNMADD132SDr\0" |
| 55425 | /* 168378 */ "VFMSUB213SDr\0" |
| 55426 | /* 168391 */ "VFNMSUB213SDr\0" |
| 55427 | /* 168405 */ "VFMADD213SDr\0" |
| 55428 | /* 168418 */ "VFNMADD213SDr\0" |
| 55429 | /* 168432 */ "VSQRTSDr\0" |
| 55430 | /* 168441 */ "PTWRITEr\0" |
| 55431 | /* 168450 */ "UCOM_Fr\0" |
| 55432 | /* 168458 */ "UCOM_FIr\0" |
| 55433 | /* 168467 */ "UD1Lr\0" |
| 55434 | /* 168473 */ "NOOPLr\0" |
| 55435 | /* 168480 */ "UCOM_FPr\0" |
| 55436 | /* 168489 */ "UCOM_FIPr\0" |
| 55437 | /* 168499 */ "TAILJMPr\0" |
| 55438 | /* 168508 */ "UCOM_FPPr\0" |
| 55439 | /* 168518 */ "UD1Qr\0" |
| 55440 | /* 168524 */ "NOOPQr\0" |
| 55441 | /* 168531 */ "VERRr\0" |
| 55442 | /* 168537 */ "LTRr\0" |
| 55443 | /* 168542 */ "VFMADDSUB231PSr\0" |
| 55444 | /* 168558 */ "VFMSUB231PSr\0" |
| 55445 | /* 168571 */ "VFNMSUB231PSr\0" |
| 55446 | /* 168585 */ "VFMSUBADD231PSr\0" |
| 55447 | /* 168601 */ "VFMADD231PSr\0" |
| 55448 | /* 168614 */ "VFNMADD231PSr\0" |
| 55449 | /* 168628 */ "VFMADDSUB132PSr\0" |
| 55450 | /* 168644 */ "VFMSUB132PSr\0" |
| 55451 | /* 168657 */ "VFNMSUB132PSr\0" |
| 55452 | /* 168671 */ "VFMSUBADD132PSr\0" |
| 55453 | /* 168687 */ "VFMADD132PSr\0" |
| 55454 | /* 168700 */ "VFNMADD132PSr\0" |
| 55455 | /* 168714 */ "VFMADDSUB213PSr\0" |
| 55456 | /* 168730 */ "VFMSUB213PSr\0" |
| 55457 | /* 168743 */ "VFNMSUB213PSr\0" |
| 55458 | /* 168757 */ "VFMSUBADD213PSr\0" |
| 55459 | /* 168773 */ "VFMADD213PSr\0" |
| 55460 | /* 168786 */ "VFNMADD213PSr\0" |
| 55461 | /* 168800 */ "VRCPPSr\0" |
| 55462 | /* 168808 */ "VRSQRTPSr\0" |
| 55463 | /* 168818 */ "VSQRTPSr\0" |
| 55464 | /* 168827 */ "VFMSUB231SSr\0" |
| 55465 | /* 168840 */ "VFNMSUB231SSr\0" |
| 55466 | /* 168854 */ "VFMADD231SSr\0" |
| 55467 | /* 168867 */ "VFNMADD231SSr\0" |
| 55468 | /* 168881 */ "VFMSUB132SSr\0" |
| 55469 | /* 168894 */ "VFNMSUB132SSr\0" |
| 55470 | /* 168908 */ "VFMADD132SSr\0" |
| 55471 | /* 168921 */ "VFNMADD132SSr\0" |
| 55472 | /* 168935 */ "VFMSUB213SSr\0" |
| 55473 | /* 168948 */ "VFNMSUB213SSr\0" |
| 55474 | /* 168962 */ "VFMADD213SSr\0" |
| 55475 | /* 168975 */ "VFNMADD213SSr\0" |
| 55476 | /* 168989 */ "VRCPSSr\0" |
| 55477 | /* 168997 */ "VRSQRTSSr\0" |
| 55478 | /* 169007 */ "VSQRTSSr\0" |
| 55479 | /* 169016 */ "RDPKRUr\0" |
| 55480 | /* 169024 */ "WRPKRUr\0" |
| 55481 | /* 169032 */ "UD1Wr\0" |
| 55482 | /* 169038 */ "NOOPWr\0" |
| 55483 | /* 169045 */ "VERWr\0" |
| 55484 | /* 169051 */ "VFMADDSUB231PDYr\0" |
| 55485 | /* 169068 */ "VFMSUB231PDYr\0" |
| 55486 | /* 169082 */ "VFNMSUB231PDYr\0" |
| 55487 | /* 169097 */ "VFMSUBADD231PDYr\0" |
| 55488 | /* 169114 */ "VFMADD231PDYr\0" |
| 55489 | /* 169128 */ "VFNMADD231PDYr\0" |
| 55490 | /* 169143 */ "VFMADDSUB132PDYr\0" |
| 55491 | /* 169160 */ "VFMSUB132PDYr\0" |
| 55492 | /* 169174 */ "VFNMSUB132PDYr\0" |
| 55493 | /* 169189 */ "VFMSUBADD132PDYr\0" |
| 55494 | /* 169206 */ "VFMADD132PDYr\0" |
| 55495 | /* 169220 */ "VFNMADD132PDYr\0" |
| 55496 | /* 169235 */ "VFMADDSUB213PDYr\0" |
| 55497 | /* 169252 */ "VFMSUB213PDYr\0" |
| 55498 | /* 169266 */ "VFNMSUB213PDYr\0" |
| 55499 | /* 169281 */ "VFMSUBADD213PDYr\0" |
| 55500 | /* 169298 */ "VFMADD213PDYr\0" |
| 55501 | /* 169312 */ "VFNMADD213PDYr\0" |
| 55502 | /* 169327 */ "VSQRTPDYr\0" |
| 55503 | /* 169337 */ "VFMADDSUB231PSYr\0" |
| 55504 | /* 169354 */ "VFMSUB231PSYr\0" |
| 55505 | /* 169368 */ "VFNMSUB231PSYr\0" |
| 55506 | /* 169383 */ "VFMSUBADD231PSYr\0" |
| 55507 | /* 169400 */ "VFMADD231PSYr\0" |
| 55508 | /* 169414 */ "VFNMADD231PSYr\0" |
| 55509 | /* 169429 */ "VFMADDSUB132PSYr\0" |
| 55510 | /* 169446 */ "VFMSUB132PSYr\0" |
| 55511 | /* 169460 */ "VFNMSUB132PSYr\0" |
| 55512 | /* 169475 */ "VFMSUBADD132PSYr\0" |
| 55513 | /* 169492 */ "VFMADD132PSYr\0" |
| 55514 | /* 169506 */ "VFNMADD132PSYr\0" |
| 55515 | /* 169521 */ "VFMADDSUB213PSYr\0" |
| 55516 | /* 169538 */ "VFMSUB213PSYr\0" |
| 55517 | /* 169552 */ "VFNMSUB213PSYr\0" |
| 55518 | /* 169567 */ "VFMSUBADD213PSYr\0" |
| 55519 | /* 169584 */ "VFMADD213PSYr\0" |
| 55520 | /* 169598 */ "VFNMADD213PSYr\0" |
| 55521 | /* 169613 */ "VRCPPSYr\0" |
| 55522 | /* 169622 */ "VRSQRTPSYr\0" |
| 55523 | /* 169633 */ "VSQRTPSYr\0" |
| 55524 | /* 169643 */ "VFMADDSUB231PDZr\0" |
| 55525 | /* 169660 */ "VFMSUB231PDZr\0" |
| 55526 | /* 169674 */ "VFNMSUB231PDZr\0" |
| 55527 | /* 169689 */ "VFMSUBADD231PDZr\0" |
| 55528 | /* 169706 */ "VFMADD231PDZr\0" |
| 55529 | /* 169720 */ "VFNMADD231PDZr\0" |
| 55530 | /* 169735 */ "VFMADDSUB132PDZr\0" |
| 55531 | /* 169752 */ "VFMSUB132PDZr\0" |
| 55532 | /* 169766 */ "VFNMSUB132PDZr\0" |
| 55533 | /* 169781 */ "VFMSUBADD132PDZr\0" |
| 55534 | /* 169798 */ "VFMADD132PDZr\0" |
| 55535 | /* 169812 */ "VFNMADD132PDZr\0" |
| 55536 | /* 169827 */ "VEXP2PDZr\0" |
| 55537 | /* 169837 */ "VFMADDSUB213PDZr\0" |
| 55538 | /* 169854 */ "VFMSUB213PDZr\0" |
| 55539 | /* 169868 */ "VFNMSUB213PDZr\0" |
| 55540 | /* 169883 */ "VFMSUBADD213PDZr\0" |
| 55541 | /* 169900 */ "VFMADD213PDZr\0" |
| 55542 | /* 169914 */ "VFNMADD213PDZr\0" |
| 55543 | /* 169929 */ "VRCP14PDZr\0" |
| 55544 | /* 169940 */ "VRSQRT14PDZr\0" |
| 55545 | /* 169953 */ "VRCP28PDZr\0" |
| 55546 | /* 169964 */ "VRSQRT28PDZr\0" |
| 55547 | /* 169977 */ "VGETEXPPDZr\0" |
| 55548 | /* 169989 */ "VSQRTPDZr\0" |
| 55549 | /* 169999 */ "VFMSUB231SDZr\0" |
| 55550 | /* 170013 */ "VFNMSUB231SDZr\0" |
| 55551 | /* 170028 */ "VFMADD231SDZr\0" |
| 55552 | /* 170042 */ "VFNMADD231SDZr\0" |
| 55553 | /* 170057 */ "VFMSUB132SDZr\0" |
| 55554 | /* 170071 */ "VFNMSUB132SDZr\0" |
| 55555 | /* 170086 */ "VFMADD132SDZr\0" |
| 55556 | /* 170100 */ "VFNMADD132SDZr\0" |
| 55557 | /* 170115 */ "VFMSUB213SDZr\0" |
| 55558 | /* 170129 */ "VFNMSUB213SDZr\0" |
| 55559 | /* 170144 */ "VFMADD213SDZr\0" |
| 55560 | /* 170158 */ "VFNMADD213SDZr\0" |
| 55561 | /* 170173 */ "VRCP28SDZr\0" |
| 55562 | /* 170184 */ "VRSQRT28SDZr\0" |
| 55563 | /* 170197 */ "VRNDSCALESDZr\0" |
| 55564 | /* 170211 */ "VGETEXPSDZr\0" |
| 55565 | /* 170223 */ "VPDPWSSDZr\0" |
| 55566 | /* 170234 */ "VSQRTSDZr\0" |
| 55567 | /* 170244 */ "VPDPBUSDZr\0" |
| 55568 | /* 170255 */ "VPSHLDVDZr\0" |
| 55569 | /* 170266 */ "VPSHRDVDZr\0" |
| 55570 | /* 170277 */ "VFMADDSUB231PHZr\0" |
| 55571 | /* 170294 */ "VFMSUB231PHZr\0" |
| 55572 | /* 170308 */ "VFNMSUB231PHZr\0" |
| 55573 | /* 170323 */ "VFMSUBADD231PHZr\0" |
| 55574 | /* 170340 */ "VFMADD231PHZr\0" |
| 55575 | /* 170354 */ "VFNMADD231PHZr\0" |
| 55576 | /* 170369 */ "VFMADDSUB132PHZr\0" |
| 55577 | /* 170386 */ "VFMSUB132PHZr\0" |
| 55578 | /* 170400 */ "VFNMSUB132PHZr\0" |
| 55579 | /* 170415 */ "VFMSUBADD132PHZr\0" |
| 55580 | /* 170432 */ "VFMADD132PHZr\0" |
| 55581 | /* 170446 */ "VFNMADD132PHZr\0" |
| 55582 | /* 170461 */ "VFMADDSUB213PHZr\0" |
| 55583 | /* 170478 */ "VFMSUB213PHZr\0" |
| 55584 | /* 170492 */ "VFNMSUB213PHZr\0" |
| 55585 | /* 170507 */ "VFMSUBADD213PHZr\0" |
| 55586 | /* 170524 */ "VFMADD213PHZr\0" |
| 55587 | /* 170538 */ "VFNMADD213PHZr\0" |
| 55588 | /* 170553 */ "VFCMADDCPHZr\0" |
| 55589 | /* 170566 */ "VFMADDCPHZr\0" |
| 55590 | /* 170578 */ "VRCPPHZr\0" |
| 55591 | /* 170587 */ "VGETEXPPHZr\0" |
| 55592 | /* 170599 */ "VRSQRTPHZr\0" |
| 55593 | /* 170610 */ "VSQRTPHZr\0" |
| 55594 | /* 170620 */ "VFMSUB231SHZr\0" |
| 55595 | /* 170634 */ "VFNMSUB231SHZr\0" |
| 55596 | /* 170649 */ "VFMADD231SHZr\0" |
| 55597 | /* 170663 */ "VFNMADD231SHZr\0" |
| 55598 | /* 170678 */ "VFMSUB132SHZr\0" |
| 55599 | /* 170692 */ "VFNMSUB132SHZr\0" |
| 55600 | /* 170707 */ "VFMADD132SHZr\0" |
| 55601 | /* 170721 */ "VFNMADD132SHZr\0" |
| 55602 | /* 170736 */ "VFMSUB213SHZr\0" |
| 55603 | /* 170750 */ "VFNMSUB213SHZr\0" |
| 55604 | /* 170765 */ "VFMADD213SHZr\0" |
| 55605 | /* 170779 */ "VFNMADD213SHZr\0" |
| 55606 | /* 170794 */ "VFCMADDCSHZr\0" |
| 55607 | /* 170807 */ "VFMADDCSHZr\0" |
| 55608 | /* 170819 */ "VRNDSCALESHZr\0" |
| 55609 | /* 170833 */ "VGETEXPSHZr\0" |
| 55610 | /* 170845 */ "VSQRTSHZr\0" |
| 55611 | /* 170855 */ "VPMADD52HUQZr\0" |
| 55612 | /* 170869 */ "VPMADD52LUQZr\0" |
| 55613 | /* 170883 */ "VPSHLDVQZr\0" |
| 55614 | /* 170894 */ "VPSHRDVQZr\0" |
| 55615 | /* 170905 */ "VPDPWSSDSZr\0" |
| 55616 | /* 170917 */ "VPDPBUSDSZr\0" |
| 55617 | /* 170929 */ "VFMADDSUB231PSZr\0" |
| 55618 | /* 170946 */ "VFMSUB231PSZr\0" |
| 55619 | /* 170960 */ "VFNMSUB231PSZr\0" |
| 55620 | /* 170975 */ "VFMSUBADD231PSZr\0" |
| 55621 | /* 170992 */ "VFMADD231PSZr\0" |
| 55622 | /* 171006 */ "VFNMADD231PSZr\0" |
| 55623 | /* 171021 */ "VFMADDSUB132PSZr\0" |
| 55624 | /* 171038 */ "VFMSUB132PSZr\0" |
| 55625 | /* 171052 */ "VFNMSUB132PSZr\0" |
| 55626 | /* 171067 */ "VFMSUBADD132PSZr\0" |
| 55627 | /* 171084 */ "VFMADD132PSZr\0" |
| 55628 | /* 171098 */ "VFNMADD132PSZr\0" |
| 55629 | /* 171113 */ "VEXP2PSZr\0" |
| 55630 | /* 171123 */ "VFMADDSUB213PSZr\0" |
| 55631 | /* 171140 */ "VFMSUB213PSZr\0" |
| 55632 | /* 171154 */ "VFNMSUB213PSZr\0" |
| 55633 | /* 171169 */ "VFMSUBADD213PSZr\0" |
| 55634 | /* 171186 */ "VFMADD213PSZr\0" |
| 55635 | /* 171200 */ "VFNMADD213PSZr\0" |
| 55636 | /* 171215 */ "VRCP14PSZr\0" |
| 55637 | /* 171226 */ "VRSQRT14PSZr\0" |
| 55638 | /* 171239 */ "VDPBF16PSZr\0" |
| 55639 | /* 171251 */ "VRCP28PSZr\0" |
| 55640 | /* 171262 */ "VRSQRT28PSZr\0" |
| 55641 | /* 171275 */ "VGETEXPPSZr\0" |
| 55642 | /* 171287 */ "VSQRTPSZr\0" |
| 55643 | /* 171297 */ "VFMSUB231SSZr\0" |
| 55644 | /* 171311 */ "VFNMSUB231SSZr\0" |
| 55645 | /* 171326 */ "VFMADD231SSZr\0" |
| 55646 | /* 171340 */ "VFNMADD231SSZr\0" |
| 55647 | /* 171355 */ "VFMSUB132SSZr\0" |
| 55648 | /* 171369 */ "VFNMSUB132SSZr\0" |
| 55649 | /* 171384 */ "VFMADD132SSZr\0" |
| 55650 | /* 171398 */ "VFNMADD132SSZr\0" |
| 55651 | /* 171413 */ "VFMSUB213SSZr\0" |
| 55652 | /* 171427 */ "VFNMSUB213SSZr\0" |
| 55653 | /* 171442 */ "VFMADD213SSZr\0" |
| 55654 | /* 171456 */ "VFNMADD213SSZr\0" |
| 55655 | /* 171471 */ "VRCP28SSZr\0" |
| 55656 | /* 171482 */ "VRSQRT28SSZr\0" |
| 55657 | /* 171495 */ "VRNDSCALESSZr\0" |
| 55658 | /* 171509 */ "VGETEXPSSZr\0" |
| 55659 | /* 171521 */ "VSQRTSSZr\0" |
| 55660 | /* 171531 */ "VPSHLDVWZr\0" |
| 55661 | /* 171542 */ "VPSHRDVWZr\0" |
| 55662 | /* 171553 */ "XCHG32ar\0" |
| 55663 | /* 171562 */ "XCHG64ar\0" |
| 55664 | /* 171571 */ "XCHG16ar\0" |
| 55665 | /* 171580 */ "MOV32cr\0" |
| 55666 | /* 171588 */ "MOV64cr\0" |
| 55667 | /* 171596 */ "MOV32dr\0" |
| 55668 | /* 171604 */ "MOV64dr\0" |
| 55669 | /* 171612 */ "OUT32ir\0" |
| 55670 | /* 171620 */ "OUT16ir\0" |
| 55671 | /* 171628 */ "OUT8ir\0" |
| 55672 | /* 171635 */ "UWRMSRir\0" |
| 55673 | /* 171644 */ "KMOVBkr\0" |
| 55674 | /* 171652 */ "KMOVDkr\0" |
| 55675 | /* 171660 */ "KMOVQkr\0" |
| 55676 | /* 171668 */ "KMOVWkr\0" |
| 55677 | /* 171676 */ "SBB32mr\0" |
| 55678 | /* 171684 */ "LOCK_SUB32mr\0" |
| 55679 | /* 171697 */ "ADC32mr\0" |
| 55680 | /* 171705 */ "BTC32mr\0" |
| 55681 | /* 171713 */ "VMREAD32mr\0" |
| 55682 | /* 171724 */ "AADD32mr\0" |
| 55683 | /* 171733 */ "LOCK_ADD32mr\0" |
| 55684 | /* 171746 */ "AAND32mr\0" |
| 55685 | /* 171755 */ "LOCK_AND32mr\0" |
| 55686 | /* 171768 */ "MOVBE32mr\0" |
| 55687 | /* 171778 */ "CCMP32mr\0" |
| 55688 | /* 171787 */ "AOR32mr\0" |
| 55689 | /* 171795 */ "AXOR32mr\0" |
| 55690 | /* 171804 */ "LOCK_XOR32mr\0" |
| 55691 | /* 171817 */ "LOCK_OR32mr\0" |
| 55692 | /* 171829 */ "BTR32mr\0" |
| 55693 | /* 171837 */ "BTS32mr\0" |
| 55694 | /* 171845 */ "BT32mr\0" |
| 55695 | /* 171852 */ "CTEST32mr\0" |
| 55696 | /* 171862 */ "CFCMOV32mr\0" |
| 55697 | /* 171873 */ "SBB64mr\0" |
| 55698 | /* 171881 */ "LOCK_SUB64mr\0" |
| 55699 | /* 171894 */ "ADC64mr\0" |
| 55700 | /* 171902 */ "BTC64mr\0" |
| 55701 | /* 171910 */ "VMREAD64mr\0" |
| 55702 | /* 171921 */ "AADD64mr\0" |
| 55703 | /* 171930 */ "LOCK_ADD64mr\0" |
| 55704 | /* 171943 */ "AAND64mr\0" |
| 55705 | /* 171952 */ "LOCK_AND64mr\0" |
| 55706 | /* 171965 */ "MMX_MOVD64mr\0" |
| 55707 | /* 171978 */ "MOVBE64mr\0" |
| 55708 | /* 171988 */ "CCMP64mr\0" |
| 55709 | /* 171997 */ "MMX_MOVQ64mr\0" |
| 55710 | /* 172010 */ "AOR64mr\0" |
| 55711 | /* 172018 */ "AXOR64mr\0" |
| 55712 | /* 172027 */ "LOCK_XOR64mr\0" |
| 55713 | /* 172040 */ "LOCK_OR64mr\0" |
| 55714 | /* 172052 */ "BTR64mr\0" |
| 55715 | /* 172060 */ "BTS64mr\0" |
| 55716 | /* 172068 */ "BT64mr\0" |
| 55717 | /* 172075 */ "CTEST64mr\0" |
| 55718 | /* 172085 */ "CFCMOV64mr\0" |
| 55719 | /* 172096 */ "MOVNTI_64mr\0" |
| 55720 | /* 172108 */ "MMX_MOVD64from64mr\0" |
| 55721 | /* 172127 */ "VMOVPQIto64mr\0" |
| 55722 | /* 172141 */ "VFMADDSUBPD4mr\0" |
| 55723 | /* 172156 */ "VFMSUBPD4mr\0" |
| 55724 | /* 172168 */ "VFNMSUBPD4mr\0" |
| 55725 | /* 172181 */ "VFMSUBADDPD4mr\0" |
| 55726 | /* 172196 */ "VFMADDPD4mr\0" |
| 55727 | /* 172208 */ "VFNMADDPD4mr\0" |
| 55728 | /* 172221 */ "VFMSUBSD4mr\0" |
| 55729 | /* 172233 */ "VFNMSUBSD4mr\0" |
| 55730 | /* 172246 */ "VFMADDSD4mr\0" |
| 55731 | /* 172258 */ "VFNMADDSD4mr\0" |
| 55732 | /* 172271 */ "VFMADDSUBPS4mr\0" |
| 55733 | /* 172286 */ "VFMSUBPS4mr\0" |
| 55734 | /* 172298 */ "VFNMSUBPS4mr\0" |
| 55735 | /* 172311 */ "VFMSUBADDPS4mr\0" |
| 55736 | /* 172326 */ "VFMADDPS4mr\0" |
| 55737 | /* 172338 */ "VFNMADDPS4mr\0" |
| 55738 | /* 172351 */ "VFMSUBSS4mr\0" |
| 55739 | /* 172363 */ "VFNMSUBSS4mr\0" |
| 55740 | /* 172376 */ "VFMADDSS4mr\0" |
| 55741 | /* 172388 */ "VFNMADDSS4mr\0" |
| 55742 | /* 172401 */ "SBB16mr\0" |
| 55743 | /* 172409 */ "LOCK_SUB16mr\0" |
| 55744 | /* 172422 */ "ADC16mr\0" |
| 55745 | /* 172430 */ "BTC16mr\0" |
| 55746 | /* 172438 */ "LOCK_ADD16mr\0" |
| 55747 | /* 172451 */ "LOCK_AND16mr\0" |
| 55748 | /* 172464 */ "MOVBE16mr\0" |
| 55749 | /* 172474 */ "ARPL16mr\0" |
| 55750 | /* 172483 */ "CCMP16mr\0" |
| 55751 | /* 172492 */ "LOCK_XOR16mr\0" |
| 55752 | /* 172505 */ "LOCK_OR16mr\0" |
| 55753 | /* 172517 */ "BTR16mr\0" |
| 55754 | /* 172525 */ "BTS16mr\0" |
| 55755 | /* 172533 */ "BT16mr\0" |
| 55756 | /* 172540 */ "CTEST16mr\0" |
| 55757 | /* 172550 */ "CFCMOV16mr\0" |
| 55758 | /* 172561 */ "VMOVDQA32Z256mr\0" |
| 55759 | /* 172577 */ "VMOVDQU32Z256mr\0" |
| 55760 | /* 172593 */ "VEXTRACTF64x2Z256mr\0" |
| 55761 | /* 172613 */ "VEXTRACTI64x2Z256mr\0" |
| 55762 | /* 172633 */ "VMOVDQA64Z256mr\0" |
| 55763 | /* 172649 */ "VMOVDQU64Z256mr\0" |
| 55764 | /* 172665 */ "VEXTRACTF32x4Z256mr\0" |
| 55765 | /* 172685 */ "VEXTRACTI32x4Z256mr\0" |
| 55766 | /* 172705 */ "VMOVDQU16Z256mr\0" |
| 55767 | /* 172721 */ "VMOVDQU8Z256mr\0" |
| 55768 | /* 172736 */ "VPMOVUSDBZ256mr\0" |
| 55769 | /* 172752 */ "VPMOVSDBZ256mr\0" |
| 55770 | /* 172767 */ "VPMOVDBZ256mr\0" |
| 55771 | /* 172781 */ "VPMOVUSQBZ256mr\0" |
| 55772 | /* 172797 */ "VPMOVSQBZ256mr\0" |
| 55773 | /* 172812 */ "VPMOVQBZ256mr\0" |
| 55774 | /* 172826 */ "VPCOMPRESSBZ256mr\0" |
| 55775 | /* 172844 */ "VPMOVUSWBZ256mr\0" |
| 55776 | /* 172860 */ "VPMOVSWBZ256mr\0" |
| 55777 | /* 172875 */ "VPMOVWBZ256mr\0" |
| 55778 | /* 172889 */ "VPSCATTERDDZ256mr\0" |
| 55779 | /* 172907 */ "VMOVAPDZ256mr\0" |
| 55780 | /* 172921 */ "VSCATTERDPDZ256mr\0" |
| 55781 | /* 172939 */ "VSCATTERQPDZ256mr\0" |
| 55782 | /* 172957 */ "VCOMPRESSPDZ256mr\0" |
| 55783 | /* 172975 */ "VMOVNTPDZ256mr\0" |
| 55784 | /* 172990 */ "VMOVUPDZ256mr\0" |
| 55785 | /* 173004 */ "VPSCATTERQDZ256mr\0" |
| 55786 | /* 173022 */ "VPMOVUSQDZ256mr\0" |
| 55787 | /* 173038 */ "VPMOVSQDZ256mr\0" |
| 55788 | /* 173053 */ "VPMOVQDZ256mr\0" |
| 55789 | /* 173067 */ "VPCOMPRESSDZ256mr\0" |
| 55790 | /* 173085 */ "VCVTPS2PHZ256mr\0" |
| 55791 | /* 173101 */ "VPSCATTERDQZ256mr\0" |
| 55792 | /* 173119 */ "VMOVNTDQZ256mr\0" |
| 55793 | /* 173134 */ "VPSCATTERQQZ256mr\0" |
| 55794 | /* 173152 */ "VPCOMPRESSQZ256mr\0" |
| 55795 | /* 173170 */ "VMOVAPSZ256mr\0" |
| 55796 | /* 173184 */ "VSCATTERDPSZ256mr\0" |
| 55797 | /* 173202 */ "VSCATTERQPSZ256mr\0" |
| 55798 | /* 173220 */ "VCOMPRESSPSZ256mr\0" |
| 55799 | /* 173238 */ "VMOVNTPSZ256mr\0" |
| 55800 | /* 173253 */ "VMOVUPSZ256mr\0" |
| 55801 | /* 173267 */ "VPMOVUSDWZ256mr\0" |
| 55802 | /* 173283 */ "VPMOVSDWZ256mr\0" |
| 55803 | /* 173298 */ "VPMOVDWZ256mr\0" |
| 55804 | /* 173312 */ "VPMOVUSQWZ256mr\0" |
| 55805 | /* 173328 */ "VPMOVSQWZ256mr\0" |
| 55806 | /* 173343 */ "VPMOVQWZ256mr\0" |
| 55807 | /* 173357 */ "VPCOMPRESSWZ256mr\0" |
| 55808 | /* 173375 */ "VEXTRACTF128mr\0" |
| 55809 | /* 173390 */ "VEXTRACTI128mr\0" |
| 55810 | /* 173405 */ "VMOVDQA32Z128mr\0" |
| 55811 | /* 173421 */ "VMOVDQU32Z128mr\0" |
| 55812 | /* 173437 */ "VMOVDQA64Z128mr\0" |
| 55813 | /* 173453 */ "VMOVDQU64Z128mr\0" |
| 55814 | /* 173469 */ "VMOVDQU16Z128mr\0" |
| 55815 | /* 173485 */ "VMOVDQU8Z128mr\0" |
| 55816 | /* 173500 */ "VPMOVUSDBZ128mr\0" |
| 55817 | /* 173516 */ "VPMOVSDBZ128mr\0" |
| 55818 | /* 173531 */ "VPMOVDBZ128mr\0" |
| 55819 | /* 173545 */ "VPMOVUSQBZ128mr\0" |
| 55820 | /* 173561 */ "VPMOVSQBZ128mr\0" |
| 55821 | /* 173576 */ "VPMOVQBZ128mr\0" |
| 55822 | /* 173590 */ "VPCOMPRESSBZ128mr\0" |
| 55823 | /* 173608 */ "VPMOVUSWBZ128mr\0" |
| 55824 | /* 173624 */ "VPMOVSWBZ128mr\0" |
| 55825 | /* 173639 */ "VPMOVWBZ128mr\0" |
| 55826 | /* 173653 */ "VPSCATTERDDZ128mr\0" |
| 55827 | /* 173671 */ "VMOVAPDZ128mr\0" |
| 55828 | /* 173685 */ "VSCATTERDPDZ128mr\0" |
| 55829 | /* 173703 */ "VMOVHPDZ128mr\0" |
| 55830 | /* 173717 */ "VMOVLPDZ128mr\0" |
| 55831 | /* 173731 */ "VSCATTERQPDZ128mr\0" |
| 55832 | /* 173749 */ "VCOMPRESSPDZ128mr\0" |
| 55833 | /* 173767 */ "VMOVNTPDZ128mr\0" |
| 55834 | /* 173782 */ "VMOVUPDZ128mr\0" |
| 55835 | /* 173796 */ "VPSCATTERQDZ128mr\0" |
| 55836 | /* 173814 */ "VPMOVUSQDZ128mr\0" |
| 55837 | /* 173830 */ "VPMOVSQDZ128mr\0" |
| 55838 | /* 173845 */ "VPMOVQDZ128mr\0" |
| 55839 | /* 173859 */ "VPCOMPRESSDZ128mr\0" |
| 55840 | /* 173877 */ "VCVTPS2PHZ128mr\0" |
| 55841 | /* 173893 */ "VPSCATTERDQZ128mr\0" |
| 55842 | /* 173911 */ "VMOVNTDQZ128mr\0" |
| 55843 | /* 173926 */ "VPSCATTERQQZ128mr\0" |
| 55844 | /* 173944 */ "VPCOMPRESSQZ128mr\0" |
| 55845 | /* 173962 */ "VMOVAPSZ128mr\0" |
| 55846 | /* 173976 */ "VSCATTERDPSZ128mr\0" |
| 55847 | /* 173994 */ "VMOVHPSZ128mr\0" |
| 55848 | /* 174008 */ "VMOVLPSZ128mr\0" |
| 55849 | /* 174022 */ "VSCATTERQPSZ128mr\0" |
| 55850 | /* 174040 */ "VCOMPRESSPSZ128mr\0" |
| 55851 | /* 174058 */ "VMOVNTPSZ128mr\0" |
| 55852 | /* 174073 */ "VMOVUPSZ128mr\0" |
| 55853 | /* 174087 */ "VPMOVUSDWZ128mr\0" |
| 55854 | /* 174103 */ "VPMOVSDWZ128mr\0" |
| 55855 | /* 174118 */ "VPMOVDWZ128mr\0" |
| 55856 | /* 174132 */ "VPMOVUSQWZ128mr\0" |
| 55857 | /* 174148 */ "VPMOVSQWZ128mr\0" |
| 55858 | /* 174163 */ "VPMOVQWZ128mr\0" |
| 55859 | /* 174177 */ "VPCOMPRESSWZ128mr\0" |
| 55860 | /* 174195 */ "SBB8mr\0" |
| 55861 | /* 174202 */ "LOCK_SUB8mr\0" |
| 55862 | /* 174214 */ "ADC8mr\0" |
| 55863 | /* 174221 */ "LOCK_ADD8mr\0" |
| 55864 | /* 174233 */ "LOCK_AND8mr\0" |
| 55865 | /* 174245 */ "CCMP8mr\0" |
| 55866 | /* 174253 */ "LOCK_XOR8mr\0" |
| 55867 | /* 174265 */ "LOCK_OR8mr\0" |
| 55868 | /* 174276 */ "CTEST8mr\0" |
| 55869 | /* 174285 */ "MOV8mr\0" |
| 55870 | /* 174292 */ "VMOVDQAmr\0" |
| 55871 | /* 174302 */ "VPSHABmr\0" |
| 55872 | /* 174311 */ "VPSHLBmr\0" |
| 55873 | /* 174320 */ "VPEXTRBmr\0" |
| 55874 | /* 174330 */ "VPROTBmr\0" |
| 55875 | /* 174339 */ "VPSHADmr\0" |
| 55876 | /* 174348 */ "VPSHLDmr\0" |
| 55877 | /* 174357 */ "VPERMIL2PDmr\0" |
| 55878 | /* 174370 */ "VMOVAPDmr\0" |
| 55879 | /* 174380 */ "VMOVHPDmr\0" |
| 55880 | /* 174390 */ "VMOVLPDmr\0" |
| 55881 | /* 174400 */ "VMOVNTPDmr\0" |
| 55882 | /* 174411 */ "VMOVUPDmr\0" |
| 55883 | /* 174421 */ "VMASKMOVPDmr\0" |
| 55884 | /* 174434 */ "VPEXTRDmr\0" |
| 55885 | /* 174444 */ "VMOVSDmr\0" |
| 55886 | /* 174453 */ "VPROTDmr\0" |
| 55887 | /* 174462 */ "VPMASKMOVDmr\0" |
| 55888 | /* 174475 */ "VCVTPS2PHmr\0" |
| 55889 | /* 174487 */ "VMOVPDI2DImr\0" |
| 55890 | /* 174500 */ "VMOVPQI2QImr\0" |
| 55891 | /* 174513 */ "MOVNTImr\0" |
| 55892 | /* 174522 */ "VPSHAQmr\0" |
| 55893 | /* 174531 */ "VMOVNTDQmr\0" |
| 55894 | /* 174542 */ "VPSHLQmr\0" |
| 55895 | /* 174551 */ "VPEXTRQmr\0" |
| 55896 | /* 174561 */ "MMX_MOVNTQmr\0" |
| 55897 | /* 174574 */ "VPROTQmr\0" |
| 55898 | /* 174583 */ "VPMASKMOVQmr\0" |
| 55899 | /* 174596 */ "VPERMIL2PSmr\0" |
| 55900 | /* 174609 */ "VMOVAPSmr\0" |
| 55901 | /* 174619 */ "VMOVHPSmr\0" |
| 55902 | /* 174629 */ "VMOVLPSmr\0" |
| 55903 | /* 174639 */ "VEXTRACTPSmr\0" |
| 55904 | /* 174652 */ "VMOVNTPSmr\0" |
| 55905 | /* 174663 */ "VMOVUPSmr\0" |
| 55906 | /* 174673 */ "VMASKMOVPSmr\0" |
| 55907 | /* 174686 */ "VMOVSSmr\0" |
| 55908 | /* 174695 */ "VMOVDQUmr\0" |
| 55909 | /* 174705 */ "VPSHAWmr\0" |
| 55910 | /* 174714 */ "VPSHLWmr\0" |
| 55911 | /* 174723 */ "VPEXTRWmr\0" |
| 55912 | /* 174733 */ "VPROTWmr\0" |
| 55913 | /* 174742 */ "VMOVWmr\0" |
| 55914 | /* 174750 */ "VFMADDSUBPD4Ymr\0" |
| 55915 | /* 174766 */ "VFMSUBPD4Ymr\0" |
| 55916 | /* 174779 */ "VFNMSUBPD4Ymr\0" |
| 55917 | /* 174793 */ "VFMSUBADDPD4Ymr\0" |
| 55918 | /* 174809 */ "VFMADDPD4Ymr\0" |
| 55919 | /* 174822 */ "VFNMADDPD4Ymr\0" |
| 55920 | /* 174836 */ "VFMADDSUBPS4Ymr\0" |
| 55921 | /* 174852 */ "VFMSUBPS4Ymr\0" |
| 55922 | /* 174865 */ "VFNMSUBPS4Ymr\0" |
| 55923 | /* 174879 */ "VFMSUBADDPS4Ymr\0" |
| 55924 | /* 174895 */ "VFMADDPS4Ymr\0" |
| 55925 | /* 174908 */ "VFNMADDPS4Ymr\0" |
| 55926 | /* 174922 */ "VMOVDQAYmr\0" |
| 55927 | /* 174933 */ "VPERMIL2PDYmr\0" |
| 55928 | /* 174947 */ "VMOVAPDYmr\0" |
| 55929 | /* 174958 */ "VMOVNTPDYmr\0" |
| 55930 | /* 174970 */ "VMOVUPDYmr\0" |
| 55931 | /* 174981 */ "VMASKMOVPDYmr\0" |
| 55932 | /* 174995 */ "VPMASKMOVDYmr\0" |
| 55933 | /* 175009 */ "VCVTPS2PHYmr\0" |
| 55934 | /* 175022 */ "VMOVNTDQYmr\0" |
| 55935 | /* 175034 */ "VPMASKMOVQYmr\0" |
| 55936 | /* 175048 */ "VPERMIL2PSYmr\0" |
| 55937 | /* 175062 */ "VMOVAPSYmr\0" |
| 55938 | /* 175073 */ "VMOVNTPSYmr\0" |
| 55939 | /* 175085 */ "VMOVUPSYmr\0" |
| 55940 | /* 175096 */ "VMASKMOVPSYmr\0" |
| 55941 | /* 175110 */ "VMOVDQUYmr\0" |
| 55942 | /* 175121 */ "VMOVDQA32Zmr\0" |
| 55943 | /* 175134 */ "VMOVDQU32Zmr\0" |
| 55944 | /* 175147 */ "VEXTRACTF64x2Zmr\0" |
| 55945 | /* 175164 */ "VEXTRACTI64x2Zmr\0" |
| 55946 | /* 175181 */ "VMOVDQA64Zmr\0" |
| 55947 | /* 175194 */ "VMOVDQU64Zmr\0" |
| 55948 | /* 175207 */ "VMOVPQIto64Zmr\0" |
| 55949 | /* 175222 */ "VEXTRACTF32x4Zmr\0" |
| 55950 | /* 175239 */ "VEXTRACTI32x4Zmr\0" |
| 55951 | /* 175256 */ "VEXTRACTF64x4Zmr\0" |
| 55952 | /* 175273 */ "VEXTRACTI64x4Zmr\0" |
| 55953 | /* 175290 */ "VMOVDQU16Zmr\0" |
| 55954 | /* 175303 */ "VMOVDQU8Zmr\0" |
| 55955 | /* 175315 */ "VEXTRACTF32x8Zmr\0" |
| 55956 | /* 175332 */ "VEXTRACTI32x8Zmr\0" |
| 55957 | /* 175349 */ "VPMOVUSDBZmr\0" |
| 55958 | /* 175362 */ "VPMOVSDBZmr\0" |
| 55959 | /* 175374 */ "VPMOVDBZmr\0" |
| 55960 | /* 175385 */ "VPMOVUSQBZmr\0" |
| 55961 | /* 175398 */ "VPMOVSQBZmr\0" |
| 55962 | /* 175410 */ "VPMOVQBZmr\0" |
| 55963 | /* 175421 */ "VPEXTRBZmr\0" |
| 55964 | /* 175432 */ "VPCOMPRESSBZmr\0" |
| 55965 | /* 175447 */ "VPMOVUSWBZmr\0" |
| 55966 | /* 175460 */ "VPMOVSWBZmr\0" |
| 55967 | /* 175472 */ "VPMOVWBZmr\0" |
| 55968 | /* 175483 */ "VPSCATTERDDZmr\0" |
| 55969 | /* 175498 */ "VMOVAPDZmr\0" |
| 55970 | /* 175509 */ "VSCATTERDPDZmr\0" |
| 55971 | /* 175524 */ "VSCATTERQPDZmr\0" |
| 55972 | /* 175539 */ "VCOMPRESSPDZmr\0" |
| 55973 | /* 175554 */ "VMOVNTPDZmr\0" |
| 55974 | /* 175566 */ "VMOVUPDZmr\0" |
| 55975 | /* 175577 */ "VPSCATTERQDZmr\0" |
| 55976 | /* 175592 */ "VPMOVUSQDZmr\0" |
| 55977 | /* 175605 */ "VPMOVSQDZmr\0" |
| 55978 | /* 175617 */ "VPMOVQDZmr\0" |
| 55979 | /* 175628 */ "VPEXTRDZmr\0" |
| 55980 | /* 175639 */ "VPCOMPRESSDZmr\0" |
| 55981 | /* 175654 */ "VMOVSDZmr\0" |
| 55982 | /* 175664 */ "VCVTPS2PHZmr\0" |
| 55983 | /* 175677 */ "VMOVSHZmr\0" |
| 55984 | /* 175687 */ "VMOVPDI2DIZmr\0" |
| 55985 | /* 175701 */ "VMOVPQI2QIZmr\0" |
| 55986 | /* 175715 */ "VPSCATTERDQZmr\0" |
| 55987 | /* 175730 */ "VMOVNTDQZmr\0" |
| 55988 | /* 175742 */ "VPSCATTERQQZmr\0" |
| 55989 | /* 175757 */ "VPEXTRQZmr\0" |
| 55990 | /* 175768 */ "VPCOMPRESSQZmr\0" |
| 55991 | /* 175783 */ "VMOVAPSZmr\0" |
| 55992 | /* 175794 */ "VSCATTERDPSZmr\0" |
| 55993 | /* 175809 */ "VSCATTERQPSZmr\0" |
| 55994 | /* 175824 */ "VCOMPRESSPSZmr\0" |
| 55995 | /* 175839 */ "VEXTRACTPSZmr\0" |
| 55996 | /* 175853 */ "VMOVNTPSZmr\0" |
| 55997 | /* 175865 */ "VMOVUPSZmr\0" |
| 55998 | /* 175876 */ "VMOVSSZmr\0" |
| 55999 | /* 175886 */ "VPMOVUSDWZmr\0" |
| 56000 | /* 175899 */ "VPMOVSDWZmr\0" |
| 56001 | /* 175911 */ "VPMOVDWZmr\0" |
| 56002 | /* 175922 */ "VPMOVUSQWZmr\0" |
| 56003 | /* 175935 */ "VPMOVSQWZmr\0" |
| 56004 | /* 175947 */ "VPMOVQWZmr\0" |
| 56005 | /* 175958 */ "VPEXTRWZmr\0" |
| 56006 | /* 175969 */ "VPCOMPRESSWZmr\0" |
| 56007 | /* 175984 */ "PUSH32rmr\0" |
| 56008 | /* 175994 */ "POP32rmr\0" |
| 56009 | /* 176003 */ "PUSH64rmr\0" |
| 56010 | /* 176013 */ "POP64rmr\0" |
| 56011 | /* 176022 */ "PUSH16rmr\0" |
| 56012 | /* 176032 */ "POP16rmr\0" |
| 56013 | /* 176041 */ "VPBLENDVBrmr\0" |
| 56014 | /* 176054 */ "VBLENDVPDrmr\0" |
| 56015 | /* 176067 */ "VPPERMrmr\0" |
| 56016 | /* 176077 */ "VBLENDVPSrmr\0" |
| 56017 | /* 176090 */ "VPCMOVrmr\0" |
| 56018 | /* 176100 */ "VPBLENDVBYrmr\0" |
| 56019 | /* 176114 */ "VBLENDVPDYrmr\0" |
| 56020 | /* 176128 */ "VBLENDVPSYrmr\0" |
| 56021 | /* 176142 */ "VPCMOVYrmr\0" |
| 56022 | /* 176153 */ "SHA1MSG1rr\0" |
| 56023 | /* 176164 */ "VSHA512MSG1rr\0" |
| 56024 | /* 176178 */ "VSM3MSG1rr\0" |
| 56025 | /* 176189 */ "SHA256MSG1rr\0" |
| 56026 | /* 176202 */ "PFRCPIT1rr\0" |
| 56027 | /* 176213 */ "PFRSQIT1rr\0" |
| 56028 | /* 176224 */ "SBB32rr\0" |
| 56029 | /* 176232 */ "SUB32rr\0" |
| 56030 | /* 176240 */ "ADC32rr\0" |
| 56031 | /* 176248 */ "BLCIC32rr\0" |
| 56032 | /* 176258 */ "BLSIC32rr\0" |
| 56033 | /* 176268 */ "T1MSKC32rr\0" |
| 56034 | /* 176279 */ "BTC32rr\0" |
| 56035 | /* 176287 */ "VMREAD32rr\0" |
| 56036 | /* 176298 */ "XADD32rr\0" |
| 56037 | /* 176307 */ "AND32rr\0" |
| 56038 | /* 176315 */ "MOVBE32rr\0" |
| 56039 | /* 176325 */ "VMWRITE32rr\0" |
| 56040 | /* 176337 */ "BSF32rr\0" |
| 56041 | /* 176345 */ "CMPXCHG32rr\0" |
| 56042 | /* 176357 */ "BLCI32rr\0" |
| 56043 | /* 176366 */ "BZHI32rr\0" |
| 56044 | /* 176375 */ "BLSI32rr\0" |
| 56045 | /* 176384 */ "BLCMSK32rr\0" |
| 56046 | /* 176395 */ "BLSMSK32rr\0" |
| 56047 | /* 176406 */ "TZMSK32rr\0" |
| 56048 | /* 176416 */ "BLCFILL32rr\0" |
| 56049 | /* 176428 */ "BLSFILL32rr\0" |
| 56050 | /* 176440 */ "LSL32rr\0" |
| 56051 | /* 176448 */ "IMUL32rr\0" |
| 56052 | /* 176457 */ "ANDN32rr\0" |
| 56053 | /* 176466 */ "IN32rr\0" |
| 56054 | /* 176473 */ "PDEP32rr\0" |
| 56055 | /* 176482 */ "CCMP32rr\0" |
| 56056 | /* 176491 */ "LAR32rr\0" |
| 56057 | /* 176499 */ "XOR32rr\0" |
| 56058 | /* 176507 */ "BSR32rr\0" |
| 56059 | /* 176515 */ "BLSR32rr\0" |
| 56060 | /* 176524 */ "BTR32rr\0" |
| 56061 | /* 176532 */ "BEXTR32rr\0" |
| 56062 | /* 176542 */ "BLCS32rr\0" |
| 56063 | /* 176551 */ "BTS32rr\0" |
| 56064 | /* 176559 */ "BT32rr\0" |
| 56065 | /* 176566 */ "POPCNT32rr\0" |
| 56066 | /* 176577 */ "LZCNT32rr\0" |
| 56067 | /* 176587 */ "TZCNT32rr\0" |
| 56068 | /* 176597 */ "CTEST32rr\0" |
| 56069 | /* 176607 */ "OUT32rr\0" |
| 56070 | /* 176615 */ "PEXT32rr\0" |
| 56071 | /* 176624 */ "CFCMOV32rr\0" |
| 56072 | /* 176635 */ "ADCX32rr\0" |
| 56073 | /* 176644 */ "SHLX32rr\0" |
| 56074 | /* 176653 */ "MULX32rr\0" |
| 56075 | /* 176662 */ "ADOX32rr\0" |
| 56076 | /* 176671 */ "SARX32rr\0" |
| 56077 | /* 176680 */ "SHRX32rr\0" |
| 56078 | /* 176689 */ "SHA1MSG2rr\0" |
| 56079 | /* 176700 */ "VSHA512MSG2rr\0" |
| 56080 | /* 176714 */ "VSM3MSG2rr\0" |
| 56081 | /* 176725 */ "SHA256MSG2rr\0" |
| 56082 | /* 176738 */ "VSHA512RNDS2rr\0" |
| 56083 | /* 176753 */ "VSM3RNDS2rr\0" |
| 56084 | /* 176765 */ "SHA256RNDS2rr\0" |
| 56085 | /* 176779 */ "PFRCPIT2rr\0" |
| 56086 | /* 176790 */ "SBB64rr\0" |
| 56087 | /* 176798 */ "SUB64rr\0" |
| 56088 | /* 176806 */ "ADC64rr\0" |
| 56089 | /* 176814 */ "BLCIC64rr\0" |
| 56090 | /* 176824 */ "BLSIC64rr\0" |
| 56091 | /* 176834 */ "T1MSKC64rr\0" |
| 56092 | /* 176845 */ "BTC64rr\0" |
| 56093 | /* 176853 */ "VMREAD64rr\0" |
| 56094 | /* 176864 */ "XADD64rr\0" |
| 56095 | /* 176873 */ "AND64rr\0" |
| 56096 | /* 176881 */ "MMX_MOVD64rr\0" |
| 56097 | /* 176894 */ "MOVBE64rr\0" |
| 56098 | /* 176904 */ "VMWRITE64rr\0" |
| 56099 | /* 176916 */ "BSF64rr\0" |
| 56100 | /* 176924 */ "CMPXCHG64rr\0" |
| 56101 | /* 176936 */ "BLCI64rr\0" |
| 56102 | /* 176945 */ "BZHI64rr\0" |
| 56103 | /* 176954 */ "VCVTTSD2SI64rr\0" |
| 56104 | /* 176969 */ "VCVTSD2SI64rr\0" |
| 56105 | /* 176983 */ "VCVTTSS2SI64rr\0" |
| 56106 | /* 176998 */ "VCVTSS2SI64rr\0" |
| 56107 | /* 177012 */ "BLSI64rr\0" |
| 56108 | /* 177021 */ "BLCMSK64rr\0" |
| 56109 | /* 177032 */ "BLSMSK64rr\0" |
| 56110 | /* 177043 */ "TZMSK64rr\0" |
| 56111 | /* 177053 */ "BLCFILL64rr\0" |
| 56112 | /* 177065 */ "BLSFILL64rr\0" |
| 56113 | /* 177077 */ "LSL64rr\0" |
| 56114 | /* 177085 */ "IMUL64rr\0" |
| 56115 | /* 177094 */ "ANDN64rr\0" |
| 56116 | /* 177103 */ "PDEP64rr\0" |
| 56117 | /* 177112 */ "CCMP64rr\0" |
| 56118 | /* 177121 */ "MMX_MOVQ64rr\0" |
| 56119 | /* 177134 */ "LAR64rr\0" |
| 56120 | /* 177142 */ "MMX_MOVQ2FR64rr\0" |
| 56121 | /* 177158 */ "XOR64rr\0" |
| 56122 | /* 177166 */ "BSR64rr\0" |
| 56123 | /* 177174 */ "BLSR64rr\0" |
| 56124 | /* 177183 */ "BTR64rr\0" |
| 56125 | /* 177191 */ "BEXTR64rr\0" |
| 56126 | /* 177201 */ "BLCS64rr\0" |
| 56127 | /* 177210 */ "BTS64rr\0" |
| 56128 | /* 177218 */ "BT64rr\0" |
| 56129 | /* 177225 */ "POPCNT64rr\0" |
| 56130 | /* 177236 */ "LZCNT64rr\0" |
| 56131 | /* 177246 */ "TZCNT64rr\0" |
| 56132 | /* 177256 */ "CTEST64rr\0" |
| 56133 | /* 177266 */ "PEXT64rr\0" |
| 56134 | /* 177275 */ "CFCMOV64rr\0" |
| 56135 | /* 177286 */ "VMOVSHtoW64rr\0" |
| 56136 | /* 177300 */ "ADCX64rr\0" |
| 56137 | /* 177309 */ "SHLX64rr\0" |
| 56138 | /* 177318 */ "MULX64rr\0" |
| 56139 | /* 177327 */ "ADOX64rr\0" |
| 56140 | /* 177336 */ "SARX64rr\0" |
| 56141 | /* 177345 */ "SHRX64rr\0" |
| 56142 | /* 177354 */ "MMX_MOVD64from64rr\0" |
| 56143 | /* 177373 */ "MMX_MOVD64to64rr\0" |
| 56144 | /* 177390 */ "VMOVSDto64rr\0" |
| 56145 | /* 177403 */ "VMOVPQIto64rr\0" |
| 56146 | /* 177417 */ "VFMADDSUBPD4rr\0" |
| 56147 | /* 177432 */ "VFMSUBPD4rr\0" |
| 56148 | /* 177444 */ "VFNMSUBPD4rr\0" |
| 56149 | /* 177457 */ "VFMSUBADDPD4rr\0" |
| 56150 | /* 177472 */ "VFMADDPD4rr\0" |
| 56151 | /* 177484 */ "VFNMADDPD4rr\0" |
| 56152 | /* 177497 */ "VFMSUBSD4rr\0" |
| 56153 | /* 177509 */ "VFNMSUBSD4rr\0" |
| 56154 | /* 177522 */ "VFMADDSD4rr\0" |
| 56155 | /* 177534 */ "VFNMADDSD4rr\0" |
| 56156 | /* 177547 */ "VSM4RNDS4rr\0" |
| 56157 | /* 177559 */ "VFMADDSUBPS4rr\0" |
| 56158 | /* 177574 */ "VFMSUBPS4rr\0" |
| 56159 | /* 177586 */ "VFNMSUBPS4rr\0" |
| 56160 | /* 177599 */ "VFMSUBADDPS4rr\0" |
| 56161 | /* 177614 */ "VFMADDPS4rr\0" |
| 56162 | /* 177626 */ "VFNMADDPS4rr\0" |
| 56163 | /* 177639 */ "VFMSUBSS4rr\0" |
| 56164 | /* 177651 */ "VFNMSUBSS4rr\0" |
| 56165 | /* 177664 */ "VFMADDSS4rr\0" |
| 56166 | /* 177676 */ "VFNMADDSS4rr\0" |
| 56167 | /* 177689 */ "VSM4KEY4rr\0" |
| 56168 | /* 177700 */ "SBB16rr\0" |
| 56169 | /* 177708 */ "SUB16rr\0" |
| 56170 | /* 177716 */ "ADC16rr\0" |
| 56171 | /* 177724 */ "BTC16rr\0" |
| 56172 | /* 177732 */ "XADD16rr\0" |
| 56173 | /* 177741 */ "AND16rr\0" |
| 56174 | /* 177749 */ "MOVBE16rr\0" |
| 56175 | /* 177759 */ "VCVTNEPS2BF16rr\0" |
| 56176 | /* 177775 */ "BSF16rr\0" |
| 56177 | /* 177783 */ "CMPXCHG16rr\0" |
| 56178 | /* 177795 */ "ARPL16rr\0" |
| 56179 | /* 177804 */ "LSL16rr\0" |
| 56180 | /* 177812 */ "IMUL16rr\0" |
| 56181 | /* 177821 */ "IN16rr\0" |
| 56182 | /* 177828 */ "CCMP16rr\0" |
| 56183 | /* 177837 */ "LAR16rr\0" |
| 56184 | /* 177845 */ "XOR16rr\0" |
| 56185 | /* 177853 */ "BSR16rr\0" |
| 56186 | /* 177861 */ "BTR16rr\0" |
| 56187 | /* 177869 */ "BTS16rr\0" |
| 56188 | /* 177877 */ "BT16rr\0" |
| 56189 | /* 177884 */ "POPCNT16rr\0" |
| 56190 | /* 177895 */ "LZCNT16rr\0" |
| 56191 | /* 177905 */ "TZCNT16rr\0" |
| 56192 | /* 177915 */ "CTEST16rr\0" |
| 56193 | /* 177925 */ "OUT16rr\0" |
| 56194 | /* 177933 */ "CFCMOV16rr\0" |
| 56195 | /* 177944 */ "VMOVDQA32Z256rr\0" |
| 56196 | /* 177960 */ "VMOVDQU32Z256rr\0" |
| 56197 | /* 177976 */ "VBROADCASTF32X2Z256rr\0" |
| 56198 | /* 177998 */ "VBROADCASTI32X2Z256rr\0" |
| 56199 | /* 178020 */ "VEXTRACTF64x2Z256rr\0" |
| 56200 | /* 178040 */ "VINSERTF64x2Z256rr\0" |
| 56201 | /* 178059 */ "VEXTRACTI64x2Z256rr\0" |
| 56202 | /* 178079 */ "VINSERTI64x2Z256rr\0" |
| 56203 | /* 178098 */ "VMOVDQA64Z256rr\0" |
| 56204 | /* 178114 */ "VMOVDQU64Z256rr\0" |
| 56205 | /* 178130 */ "VEXTRACTF32x4Z256rr\0" |
| 56206 | /* 178150 */ "VINSERTF32x4Z256rr\0" |
| 56207 | /* 178169 */ "VEXTRACTI32x4Z256rr\0" |
| 56208 | /* 178189 */ "VINSERTI32x4Z256rr\0" |
| 56209 | /* 178208 */ "VCVTNE2PS2BF16Z256rr\0" |
| 56210 | /* 178229 */ "VCVTNEPS2BF16Z256rr\0" |
| 56211 | /* 178249 */ "VMOVDQU16Z256rr\0" |
| 56212 | /* 178265 */ "VMOVDQU8Z256rr\0" |
| 56213 | /* 178280 */ "VPERMI2BZ256rr\0" |
| 56214 | /* 178295 */ "VPMOVM2BZ256rr\0" |
| 56215 | /* 178310 */ "VPERMT2BZ256rr\0" |
| 56216 | /* 178325 */ "VPSUBBZ256rr\0" |
| 56217 | /* 178338 */ "VPADDBZ256rr\0" |
| 56218 | /* 178351 */ "VPEXPANDBZ256rr\0" |
| 56219 | /* 178367 */ "VPMOVUSDBZ256rr\0" |
| 56220 | /* 178383 */ "VPMOVSDBZ256rr\0" |
| 56221 | /* 178398 */ "VPMOVDBZ256rr\0" |
| 56222 | /* 178412 */ "VPSHUFBZ256rr\0" |
| 56223 | /* 178426 */ "VPAVGBZ256rr\0" |
| 56224 | /* 178439 */ "VGF2P8MULBZ256rr\0" |
| 56225 | /* 178456 */ "VPBLENDMBZ256rr\0" |
| 56226 | /* 178472 */ "VPTESTNMBZ256rr\0" |
| 56227 | /* 178488 */ "VPSHUFBITQMBZ256rr\0" |
| 56228 | /* 178507 */ "VPERMBZ256rr\0" |
| 56229 | /* 178520 */ "VPTESTMBZ256rr\0" |
| 56230 | /* 178535 */ "VPCMPEQBZ256rr\0" |
| 56231 | /* 178550 */ "VPMOVUSQBZ256rr\0" |
| 56232 | /* 178566 */ "VPMOVSQBZ256rr\0" |
| 56233 | /* 178581 */ "VPMULTISHIFTQBZ256rr\0" |
| 56234 | /* 178602 */ "VPMOVQBZ256rr\0" |
| 56235 | /* 178616 */ "VPABSBZ256rr\0" |
| 56236 | /* 178629 */ "VPSUBSBZ256rr\0" |
| 56237 | /* 178643 */ "VPADDSBZ256rr\0" |
| 56238 | /* 178657 */ "VPMINSBZ256rr\0" |
| 56239 | /* 178671 */ "VPCOMPRESSBZ256rr\0" |
| 56240 | /* 178689 */ "VPSUBUSBZ256rr\0" |
| 56241 | /* 178704 */ "VPADDUSBZ256rr\0" |
| 56242 | /* 178719 */ "VPMAXSBZ256rr\0" |
| 56243 | /* 178733 */ "VPCMPGTBZ256rr\0" |
| 56244 | /* 178748 */ "VPOPCNTBZ256rr\0" |
| 56245 | /* 178763 */ "VPBROADCASTBZ256rr\0" |
| 56246 | /* 178782 */ "VPMINUBZ256rr\0" |
| 56247 | /* 178796 */ "VPMAXUBZ256rr\0" |
| 56248 | /* 178810 */ "VPACKSSWBZ256rr\0" |
| 56249 | /* 178826 */ "VPACKUSWBZ256rr\0" |
| 56250 | /* 178842 */ "VPMOVUSWBZ256rr\0" |
| 56251 | /* 178858 */ "VPMOVSWBZ256rr\0" |
| 56252 | /* 178873 */ "VPMOVWBZ256rr\0" |
| 56253 | /* 178887 */ "VAESDECZ256rr\0" |
| 56254 | /* 178901 */ "VAESENCZ256rr\0" |
| 56255 | /* 178915 */ "VPERMI2DZ256rr\0" |
| 56256 | /* 178930 */ "VPMOVM2DZ256rr\0" |
| 56257 | /* 178945 */ "VPERMT2DZ256rr\0" |
| 56258 | /* 178960 */ "VPBROADCASTMW2DZ256rr\0" |
| 56259 | /* 178982 */ "VPSRADZ256rr\0" |
| 56260 | /* 178995 */ "VPSUBDZ256rr\0" |
| 56261 | /* 179008 */ "VPMOVSXBDZ256rr\0" |
| 56262 | /* 179024 */ "VPMOVZXBDZ256rr\0" |
| 56263 | /* 179040 */ "VPADDDZ256rr\0" |
| 56264 | /* 179053 */ "VPANDDZ256rr\0" |
| 56265 | /* 179066 */ "VPEXPANDDZ256rr\0" |
| 56266 | /* 179082 */ "VPSLLDZ256rr\0" |
| 56267 | /* 179095 */ "VPMULLDZ256rr\0" |
| 56268 | /* 179109 */ "VPSRLDZ256rr\0" |
| 56269 | /* 179122 */ "VPBLENDMDZ256rr\0" |
| 56270 | /* 179138 */ "VPTESTNMDZ256rr\0" |
| 56271 | /* 179154 */ "VPERMDZ256rr\0" |
| 56272 | /* 179167 */ "VPTESTMDZ256rr\0" |
| 56273 | /* 179182 */ "VPANDNDZ256rr\0" |
| 56274 | /* 179196 */ "VCVTPH2PDZ256rr\0" |
| 56275 | /* 179212 */ "VPERMI2PDZ256rr\0" |
| 56276 | /* 179228 */ "VCVTDQ2PDZ256rr\0" |
| 56277 | /* 179244 */ "VCVTUDQ2PDZ256rr\0" |
| 56278 | /* 179261 */ "VCVTQQ2PDZ256rr\0" |
| 56279 | /* 179277 */ "VCVTUQQ2PDZ256rr\0" |
| 56280 | /* 179294 */ "VCVTPS2PDZ256rr\0" |
| 56281 | /* 179310 */ "VPERMT2PDZ256rr\0" |
| 56282 | /* 179326 */ "VMOVAPDZ256rr\0" |
| 56283 | /* 179340 */ "VSUBPDZ256rr\0" |
| 56284 | /* 179353 */ "VMINCPDZ256rr\0" |
| 56285 | /* 179367 */ "VMAXCPDZ256rr\0" |
| 56286 | /* 179381 */ "VADDPDZ256rr\0" |
| 56287 | /* 179394 */ "VEXPANDPDZ256rr\0" |
| 56288 | /* 179410 */ "VANDPDZ256rr\0" |
| 56289 | /* 179423 */ "VSCALEFPDZ256rr\0" |
| 56290 | /* 179439 */ "VUNPCKHPDZ256rr\0" |
| 56291 | /* 179455 */ "VPERMILPDZ256rr\0" |
| 56292 | /* 179471 */ "VUNPCKLPDZ256rr\0" |
| 56293 | /* 179487 */ "VMULPDZ256rr\0" |
| 56294 | /* 179500 */ "VBLENDMPDZ256rr\0" |
| 56295 | /* 179516 */ "VPERMPDZ256rr\0" |
| 56296 | /* 179530 */ "VANDNPDZ256rr\0" |
| 56297 | /* 179544 */ "VMINPDZ256rr\0" |
| 56298 | /* 179557 */ "VORPDZ256rr\0" |
| 56299 | /* 179569 */ "VXORPDZ256rr\0" |
| 56300 | /* 179582 */ "VFPCLASSPDZ256rr\0" |
| 56301 | /* 179599 */ "VCOMPRESSPDZ256rr\0" |
| 56302 | /* 179617 */ "VMOVUPDZ256rr\0" |
| 56303 | /* 179631 */ "VDIVPDZ256rr\0" |
| 56304 | /* 179644 */ "VMAXPDZ256rr\0" |
| 56305 | /* 179657 */ "VPCMPEQDZ256rr\0" |
| 56306 | /* 179672 */ "VPMOVUSQDZ256rr\0" |
| 56307 | /* 179688 */ "VPMOVSQDZ256rr\0" |
| 56308 | /* 179703 */ "VPMOVQDZ256rr\0" |
| 56309 | /* 179717 */ "VPORDZ256rr\0" |
| 56310 | /* 179729 */ "VPXORDZ256rr\0" |
| 56311 | /* 179742 */ "VPABSDZ256rr\0" |
| 56312 | /* 179755 */ "VPMINSDZ256rr\0" |
| 56313 | /* 179769 */ "VPCOMPRESSDZ256rr\0" |
| 56314 | /* 179787 */ "VBROADCASTSDZ256rr\0" |
| 56315 | /* 179806 */ "VPMAXSDZ256rr\0" |
| 56316 | /* 179820 */ "VP2INTERSECTDZ256rr\0" |
| 56317 | /* 179840 */ "VPCONFLICTDZ256rr\0" |
| 56318 | /* 179858 */ "VPCMPGTDZ256rr\0" |
| 56319 | /* 179873 */ "VPOPCNTDZ256rr\0" |
| 56320 | /* 179888 */ "VPLZCNTDZ256rr\0" |
| 56321 | /* 179903 */ "VPBROADCASTDZ256rr\0" |
| 56322 | /* 179922 */ "VPMINUDZ256rr\0" |
| 56323 | /* 179936 */ "VPMAXUDZ256rr\0" |
| 56324 | /* 179950 */ "VPSRAVDZ256rr\0" |
| 56325 | /* 179964 */ "VPSLLVDZ256rr\0" |
| 56326 | /* 179978 */ "VPROLVDZ256rr\0" |
| 56327 | /* 179992 */ "VPSRLVDZ256rr\0" |
| 56328 | /* 180006 */ "VPRORVDZ256rr\0" |
| 56329 | /* 180020 */ "VPMADDWDZ256rr\0" |
| 56330 | /* 180035 */ "VPUNPCKHWDZ256rr\0" |
| 56331 | /* 180052 */ "VPUNPCKLWDZ256rr\0" |
| 56332 | /* 180069 */ "VPMOVSXWDZ256rr\0" |
| 56333 | /* 180085 */ "VPMOVZXWDZ256rr\0" |
| 56334 | /* 180101 */ "VCVTPD2PHZ256rr\0" |
| 56335 | /* 180117 */ "VCVTDQ2PHZ256rr\0" |
| 56336 | /* 180133 */ "VCVTUDQ2PHZ256rr\0" |
| 56337 | /* 180150 */ "VCVTQQ2PHZ256rr\0" |
| 56338 | /* 180166 */ "VCVTUQQ2PHZ256rr\0" |
| 56339 | /* 180183 */ "VCVTPS2PHZ256rr\0" |
| 56340 | /* 180199 */ "VCVTW2PHZ256rr\0" |
| 56341 | /* 180214 */ "VCVTUW2PHZ256rr\0" |
| 56342 | /* 180230 */ "VSUBPHZ256rr\0" |
| 56343 | /* 180243 */ "VFCMULCPHZ256rr\0" |
| 56344 | /* 180259 */ "VFMULCPHZ256rr\0" |
| 56345 | /* 180274 */ "VMINCPHZ256rr\0" |
| 56346 | /* 180288 */ "VMAXCPHZ256rr\0" |
| 56347 | /* 180302 */ "VADDPHZ256rr\0" |
| 56348 | /* 180315 */ "VSCALEFPHZ256rr\0" |
| 56349 | /* 180331 */ "VMULPHZ256rr\0" |
| 56350 | /* 180344 */ "VMINPHZ256rr\0" |
| 56351 | /* 180357 */ "VFPCLASSPHZ256rr\0" |
| 56352 | /* 180374 */ "VDIVPHZ256rr\0" |
| 56353 | /* 180387 */ "VMAXPHZ256rr\0" |
| 56354 | /* 180400 */ "VPMOVB2MZ256rr\0" |
| 56355 | /* 180415 */ "VPMOVD2MZ256rr\0" |
| 56356 | /* 180430 */ "VPMOVQ2MZ256rr\0" |
| 56357 | /* 180445 */ "VPMOVW2MZ256rr\0" |
| 56358 | /* 180460 */ "VMOVDDUPZ256rr\0" |
| 56359 | /* 180475 */ "VMOVSHDUPZ256rr\0" |
| 56360 | /* 180491 */ "VMOVSLDUPZ256rr\0" |
| 56361 | /* 180507 */ "VPBROADCASTMB2QZ256rr\0" |
| 56362 | /* 180529 */ "VPERMI2QZ256rr\0" |
| 56363 | /* 180544 */ "VPMOVM2QZ256rr\0" |
| 56364 | /* 180559 */ "VPERMT2QZ256rr\0" |
| 56365 | /* 180574 */ "VPSRAQZ256rr\0" |
| 56366 | /* 180587 */ "VPSUBQZ256rr\0" |
| 56367 | /* 180600 */ "VPMOVSXBQZ256rr\0" |
| 56368 | /* 180616 */ "VPMOVZXBQZ256rr\0" |
| 56369 | /* 180632 */ "VCVTTPD2DQZ256rr\0" |
| 56370 | /* 180649 */ "VCVTPD2DQZ256rr\0" |
| 56371 | /* 180665 */ "VCVTTPH2DQZ256rr\0" |
| 56372 | /* 180682 */ "VCVTPH2DQZ256rr\0" |
| 56373 | /* 180698 */ "VCVTTPS2DQZ256rr\0" |
| 56374 | /* 180715 */ "VCVTPS2DQZ256rr\0" |
| 56375 | /* 180731 */ "VPADDQZ256rr\0" |
| 56376 | /* 180744 */ "VPUNPCKHDQZ256rr\0" |
| 56377 | /* 180761 */ "VPUNPCKLDQZ256rr\0" |
| 56378 | /* 180778 */ "VPMULDQZ256rr\0" |
| 56379 | /* 180792 */ "VPANDQZ256rr\0" |
| 56380 | /* 180805 */ "VPEXPANDQZ256rr\0" |
| 56381 | /* 180821 */ "VPUNPCKHQDQZ256rr\0" |
| 56382 | /* 180839 */ "VPUNPCKLQDQZ256rr\0" |
| 56383 | /* 180857 */ "VCVTTPD2UDQZ256rr\0" |
| 56384 | /* 180875 */ "VCVTPD2UDQZ256rr\0" |
| 56385 | /* 180892 */ "VCVTTPH2UDQZ256rr\0" |
| 56386 | /* 180910 */ "VCVTPH2UDQZ256rr\0" |
| 56387 | /* 180927 */ "VCVTTPS2UDQZ256rr\0" |
| 56388 | /* 180945 */ "VCVTPS2UDQZ256rr\0" |
| 56389 | /* 180962 */ "VPMULUDQZ256rr\0" |
| 56390 | /* 180977 */ "VPMOVSXDQZ256rr\0" |
| 56391 | /* 180993 */ "VPMOVZXDQZ256rr\0" |
| 56392 | /* 181009 */ "VPSLLQZ256rr\0" |
| 56393 | /* 181022 */ "VPMULLQZ256rr\0" |
| 56394 | /* 181036 */ "VPSRLQZ256rr\0" |
| 56395 | /* 181049 */ "VPBLENDMQZ256rr\0" |
| 56396 | /* 181065 */ "VPTESTNMQZ256rr\0" |
| 56397 | /* 181081 */ "VPERMQZ256rr\0" |
| 56398 | /* 181094 */ "VPTESTMQZ256rr\0" |
| 56399 | /* 181109 */ "VPANDNQZ256rr\0" |
| 56400 | /* 181123 */ "VCVTTPD2QQZ256rr\0" |
| 56401 | /* 181140 */ "VCVTPD2QQZ256rr\0" |
| 56402 | /* 181156 */ "VCVTTPH2QQZ256rr\0" |
| 56403 | /* 181173 */ "VCVTPH2QQZ256rr\0" |
| 56404 | /* 181189 */ "VCVTTPS2QQZ256rr\0" |
| 56405 | /* 181206 */ "VCVTPS2QQZ256rr\0" |
| 56406 | /* 181222 */ "VPCMPEQQZ256rr\0" |
| 56407 | /* 181237 */ "VCVTTPD2UQQZ256rr\0" |
| 56408 | /* 181255 */ "VCVTPD2UQQZ256rr\0" |
| 56409 | /* 181272 */ "VCVTTPH2UQQZ256rr\0" |
| 56410 | /* 181290 */ "VCVTPH2UQQZ256rr\0" |
| 56411 | /* 181307 */ "VCVTTPS2UQQZ256rr\0" |
| 56412 | /* 181325 */ "VCVTPS2UQQZ256rr\0" |
| 56413 | /* 181342 */ "VPORQZ256rr\0" |
| 56414 | /* 181354 */ "VPXORQZ256rr\0" |
| 56415 | /* 181367 */ "VPABSQZ256rr\0" |
| 56416 | /* 181380 */ "VPMINSQZ256rr\0" |
| 56417 | /* 181394 */ "VPCOMPRESSQZ256rr\0" |
| 56418 | /* 181412 */ "VPMAXSQZ256rr\0" |
| 56419 | /* 181426 */ "VP2INTERSECTQZ256rr\0" |
| 56420 | /* 181446 */ "VPCONFLICTQZ256rr\0" |
| 56421 | /* 181464 */ "VPCMPGTQZ256rr\0" |
| 56422 | /* 181479 */ "VPOPCNTQZ256rr\0" |
| 56423 | /* 181494 */ "VPLZCNTQZ256rr\0" |
| 56424 | /* 181509 */ "VPBROADCASTQZ256rr\0" |
| 56425 | /* 181528 */ "VPMINUQZ256rr\0" |
| 56426 | /* 181542 */ "VPMAXUQZ256rr\0" |
| 56427 | /* 181556 */ "VPSRAVQZ256rr\0" |
| 56428 | /* 181570 */ "VPSLLVQZ256rr\0" |
| 56429 | /* 181584 */ "VPROLVQZ256rr\0" |
| 56430 | /* 181598 */ "VPSRLVQZ256rr\0" |
| 56431 | /* 181612 */ "VPRORVQZ256rr\0" |
| 56432 | /* 181626 */ "VPMOVSXWQZ256rr\0" |
| 56433 | /* 181642 */ "VPMOVZXWQZ256rr\0" |
| 56434 | /* 181658 */ "VCVTPD2PSZ256rr\0" |
| 56435 | /* 181674 */ "VCVTPH2PSZ256rr\0" |
| 56436 | /* 181690 */ "VPERMI2PSZ256rr\0" |
| 56437 | /* 181706 */ "VCVTDQ2PSZ256rr\0" |
| 56438 | /* 181722 */ "VCVTUDQ2PSZ256rr\0" |
| 56439 | /* 181739 */ "VCVTQQ2PSZ256rr\0" |
| 56440 | /* 181755 */ "VCVTUQQ2PSZ256rr\0" |
| 56441 | /* 181772 */ "VPERMT2PSZ256rr\0" |
| 56442 | /* 181788 */ "VMOVAPSZ256rr\0" |
| 56443 | /* 181802 */ "VSUBPSZ256rr\0" |
| 56444 | /* 181815 */ "VMINCPSZ256rr\0" |
| 56445 | /* 181829 */ "VMAXCPSZ256rr\0" |
| 56446 | /* 181843 */ "VADDPSZ256rr\0" |
| 56447 | /* 181856 */ "VEXPANDPSZ256rr\0" |
| 56448 | /* 181872 */ "VANDPSZ256rr\0" |
| 56449 | /* 181885 */ "VSCALEFPSZ256rr\0" |
| 56450 | /* 181901 */ "VUNPCKHPSZ256rr\0" |
| 56451 | /* 181917 */ "VPERMILPSZ256rr\0" |
| 56452 | /* 181933 */ "VUNPCKLPSZ256rr\0" |
| 56453 | /* 181949 */ "VMULPSZ256rr\0" |
| 56454 | /* 181962 */ "VBLENDMPSZ256rr\0" |
| 56455 | /* 181978 */ "VPERMPSZ256rr\0" |
| 56456 | /* 181992 */ "VANDNPSZ256rr\0" |
| 56457 | /* 182006 */ "VMINPSZ256rr\0" |
| 56458 | /* 182019 */ "VORPSZ256rr\0" |
| 56459 | /* 182031 */ "VXORPSZ256rr\0" |
| 56460 | /* 182044 */ "VFPCLASSPSZ256rr\0" |
| 56461 | /* 182061 */ "VCOMPRESSPSZ256rr\0" |
| 56462 | /* 182079 */ "VMOVUPSZ256rr\0" |
| 56463 | /* 182093 */ "VDIVPSZ256rr\0" |
| 56464 | /* 182106 */ "VMAXPSZ256rr\0" |
| 56465 | /* 182119 */ "VBROADCASTSSZ256rr\0" |
| 56466 | /* 182138 */ "VAESDECLASTZ256rr\0" |
| 56467 | /* 182156 */ "VAESENCLASTZ256rr\0" |
| 56468 | /* 182174 */ "VCVTTPH2WZ256rr\0" |
| 56469 | /* 182190 */ "VCVTPH2WZ256rr\0" |
| 56470 | /* 182205 */ "VPERMI2WZ256rr\0" |
| 56471 | /* 182220 */ "VPMOVM2WZ256rr\0" |
| 56472 | /* 182235 */ "VPERMT2WZ256rr\0" |
| 56473 | /* 182250 */ "VPSRAWZ256rr\0" |
| 56474 | /* 182263 */ "VPSADBWZ256rr\0" |
| 56475 | /* 182277 */ "VPUNPCKHBWZ256rr\0" |
| 56476 | /* 182294 */ "VPUNPCKLBWZ256rr\0" |
| 56477 | /* 182311 */ "VPSUBWZ256rr\0" |
| 56478 | /* 182324 */ "VPMOVSXBWZ256rr\0" |
| 56479 | /* 182340 */ "VPMOVZXBWZ256rr\0" |
| 56480 | /* 182356 */ "VPADDWZ256rr\0" |
| 56481 | /* 182369 */ "VPEXPANDWZ256rr\0" |
| 56482 | /* 182385 */ "VPACKSSDWZ256rr\0" |
| 56483 | /* 182401 */ "VPACKUSDWZ256rr\0" |
| 56484 | /* 182417 */ "VPMOVUSDWZ256rr\0" |
| 56485 | /* 182433 */ "VPMOVSDWZ256rr\0" |
| 56486 | /* 182448 */ "VPMOVDWZ256rr\0" |
| 56487 | /* 182462 */ "VPAVGWZ256rr\0" |
| 56488 | /* 182475 */ "VPMULHWZ256rr\0" |
| 56489 | /* 182489 */ "VPSLLWZ256rr\0" |
| 56490 | /* 182502 */ "VPMULLWZ256rr\0" |
| 56491 | /* 182516 */ "VPSRLWZ256rr\0" |
| 56492 | /* 182529 */ "VPBLENDMWZ256rr\0" |
| 56493 | /* 182545 */ "VPTESTNMWZ256rr\0" |
| 56494 | /* 182561 */ "VPERMWZ256rr\0" |
| 56495 | /* 182574 */ "VPTESTMWZ256rr\0" |
| 56496 | /* 182589 */ "VPCMPEQWZ256rr\0" |
| 56497 | /* 182604 */ "VPMOVUSQWZ256rr\0" |
| 56498 | /* 182620 */ "VPMOVSQWZ256rr\0" |
| 56499 | /* 182635 */ "VPMOVQWZ256rr\0" |
| 56500 | /* 182649 */ "VPABSWZ256rr\0" |
| 56501 | /* 182662 */ "VPMADDUBSWZ256rr\0" |
| 56502 | /* 182679 */ "VPSUBSWZ256rr\0" |
| 56503 | /* 182693 */ "VPADDSWZ256rr\0" |
| 56504 | /* 182707 */ "VPMINSWZ256rr\0" |
| 56505 | /* 182721 */ "VPMULHRSWZ256rr\0" |
| 56506 | /* 182737 */ "VPCOMPRESSWZ256rr\0" |
| 56507 | /* 182755 */ "VPSUBUSWZ256rr\0" |
| 56508 | /* 182770 */ "VPADDUSWZ256rr\0" |
| 56509 | /* 182785 */ "VPMAXSWZ256rr\0" |
| 56510 | /* 182799 */ "VPCMPGTWZ256rr\0" |
| 56511 | /* 182814 */ "VPOPCNTWZ256rr\0" |
| 56512 | /* 182829 */ "VPBROADCASTWZ256rr\0" |
| 56513 | /* 182848 */ "VCVTTPH2UWZ256rr\0" |
| 56514 | /* 182865 */ "VCVTPH2UWZ256rr\0" |
| 56515 | /* 182881 */ "VPMULHUWZ256rr\0" |
| 56516 | /* 182896 */ "VPMINUWZ256rr\0" |
| 56517 | /* 182910 */ "VPMAXUWZ256rr\0" |
| 56518 | /* 182924 */ "VPSRAVWZ256rr\0" |
| 56519 | /* 182938 */ "VPSLLVWZ256rr\0" |
| 56520 | /* 182952 */ "VPSRLVWZ256rr\0" |
| 56521 | /* 182966 */ "VCVTPS2PHXZ256rr\0" |
| 56522 | /* 182983 */ "VCVTPH2PSXZ256rr\0" |
| 56523 | /* 183000 */ "VPBROADCASTBrZ256rr\0" |
| 56524 | /* 183020 */ "VPBROADCASTDrZ256rr\0" |
| 56525 | /* 183040 */ "VPBROADCASTQrZ256rr\0" |
| 56526 | /* 183060 */ "VPBROADCASTWrZ256rr\0" |
| 56527 | /* 183080 */ "VPERM2F128rr\0" |
| 56528 | /* 183093 */ "VEXTRACTF128rr\0" |
| 56529 | /* 183108 */ "VINSERTF128rr\0" |
| 56530 | /* 183122 */ "VPERM2I128rr\0" |
| 56531 | /* 183135 */ "VEXTRACTI128rr\0" |
| 56532 | /* 183150 */ "VINSERTI128rr\0" |
| 56533 | /* 183164 */ "VAESKEYGENASSIST128rr\0" |
| 56534 | /* 183186 */ "VMOVDQA32Z128rr\0" |
| 56535 | /* 183202 */ "VMOVDQU32Z128rr\0" |
| 56536 | /* 183218 */ "VBROADCASTI32X2Z128rr\0" |
| 56537 | /* 183240 */ "VMOVDQA64Z128rr\0" |
| 56538 | /* 183256 */ "VMOVDQU64Z128rr\0" |
| 56539 | /* 183272 */ "VCVTNE2PS2BF16Z128rr\0" |
| 56540 | /* 183293 */ "VCVTNEPS2BF16Z128rr\0" |
| 56541 | /* 183313 */ "VMOVDQU16Z128rr\0" |
| 56542 | /* 183329 */ "VMOVDQU8Z128rr\0" |
| 56543 | /* 183344 */ "VPERMI2BZ128rr\0" |
| 56544 | /* 183359 */ "VPMOVM2BZ128rr\0" |
| 56545 | /* 183374 */ "VPERMT2BZ128rr\0" |
| 56546 | /* 183389 */ "VPSUBBZ128rr\0" |
| 56547 | /* 183402 */ "VPADDBZ128rr\0" |
| 56548 | /* 183415 */ "VPEXPANDBZ128rr\0" |
| 56549 | /* 183431 */ "VPMOVUSDBZ128rr\0" |
| 56550 | /* 183447 */ "VPMOVSDBZ128rr\0" |
| 56551 | /* 183462 */ "VPMOVDBZ128rr\0" |
| 56552 | /* 183476 */ "VPSHUFBZ128rr\0" |
| 56553 | /* 183490 */ "VPAVGBZ128rr\0" |
| 56554 | /* 183503 */ "VGF2P8MULBZ128rr\0" |
| 56555 | /* 183520 */ "VPBLENDMBZ128rr\0" |
| 56556 | /* 183536 */ "VPTESTNMBZ128rr\0" |
| 56557 | /* 183552 */ "VPSHUFBITQMBZ128rr\0" |
| 56558 | /* 183571 */ "VPERMBZ128rr\0" |
| 56559 | /* 183584 */ "VPTESTMBZ128rr\0" |
| 56560 | /* 183599 */ "VPCMPEQBZ128rr\0" |
| 56561 | /* 183614 */ "VPMOVUSQBZ128rr\0" |
| 56562 | /* 183630 */ "VPMOVSQBZ128rr\0" |
| 56563 | /* 183645 */ "VPMULTISHIFTQBZ128rr\0" |
| 56564 | /* 183666 */ "VPMOVQBZ128rr\0" |
| 56565 | /* 183680 */ "VPABSBZ128rr\0" |
| 56566 | /* 183693 */ "VPSUBSBZ128rr\0" |
| 56567 | /* 183707 */ "VPADDSBZ128rr\0" |
| 56568 | /* 183721 */ "VPMINSBZ128rr\0" |
| 56569 | /* 183735 */ "VPCOMPRESSBZ128rr\0" |
| 56570 | /* 183753 */ "VPSUBUSBZ128rr\0" |
| 56571 | /* 183768 */ "VPADDUSBZ128rr\0" |
| 56572 | /* 183783 */ "VPMAXSBZ128rr\0" |
| 56573 | /* 183797 */ "VPCMPGTBZ128rr\0" |
| 56574 | /* 183812 */ "VPOPCNTBZ128rr\0" |
| 56575 | /* 183827 */ "VPBROADCASTBZ128rr\0" |
| 56576 | /* 183846 */ "VPMINUBZ128rr\0" |
| 56577 | /* 183860 */ "VPMAXUBZ128rr\0" |
| 56578 | /* 183874 */ "VPACKSSWBZ128rr\0" |
| 56579 | /* 183890 */ "VPACKUSWBZ128rr\0" |
| 56580 | /* 183906 */ "VPMOVUSWBZ128rr\0" |
| 56581 | /* 183922 */ "VPMOVSWBZ128rr\0" |
| 56582 | /* 183937 */ "VPMOVWBZ128rr\0" |
| 56583 | /* 183951 */ "VAESDECZ128rr\0" |
| 56584 | /* 183965 */ "VAESENCZ128rr\0" |
| 56585 | /* 183979 */ "VPERMI2DZ128rr\0" |
| 56586 | /* 183994 */ "VPMOVM2DZ128rr\0" |
| 56587 | /* 184009 */ "VPERMT2DZ128rr\0" |
| 56588 | /* 184024 */ "VPBROADCASTMW2DZ128rr\0" |
| 56589 | /* 184046 */ "VPSRADZ128rr\0" |
| 56590 | /* 184059 */ "VPSUBDZ128rr\0" |
| 56591 | /* 184072 */ "VPMOVSXBDZ128rr\0" |
| 56592 | /* 184088 */ "VPMOVZXBDZ128rr\0" |
| 56593 | /* 184104 */ "VPADDDZ128rr\0" |
| 56594 | /* 184117 */ "VPANDDZ128rr\0" |
| 56595 | /* 184130 */ "VPEXPANDDZ128rr\0" |
| 56596 | /* 184146 */ "VPSLLDZ128rr\0" |
| 56597 | /* 184159 */ "VPMULLDZ128rr\0" |
| 56598 | /* 184173 */ "VPSRLDZ128rr\0" |
| 56599 | /* 184186 */ "VPBLENDMDZ128rr\0" |
| 56600 | /* 184202 */ "VPTESTNMDZ128rr\0" |
| 56601 | /* 184218 */ "VPTESTMDZ128rr\0" |
| 56602 | /* 184233 */ "VPANDNDZ128rr\0" |
| 56603 | /* 184247 */ "VCVTPH2PDZ128rr\0" |
| 56604 | /* 184263 */ "VPERMI2PDZ128rr\0" |
| 56605 | /* 184279 */ "VCVTDQ2PDZ128rr\0" |
| 56606 | /* 184295 */ "VCVTUDQ2PDZ128rr\0" |
| 56607 | /* 184312 */ "VCVTQQ2PDZ128rr\0" |
| 56608 | /* 184328 */ "VCVTUQQ2PDZ128rr\0" |
| 56609 | /* 184345 */ "VCVTPS2PDZ128rr\0" |
| 56610 | /* 184361 */ "VPERMT2PDZ128rr\0" |
| 56611 | /* 184377 */ "VMOVAPDZ128rr\0" |
| 56612 | /* 184391 */ "VSUBPDZ128rr\0" |
| 56613 | /* 184404 */ "VMINCPDZ128rr\0" |
| 56614 | /* 184418 */ "VMAXCPDZ128rr\0" |
| 56615 | /* 184432 */ "VADDPDZ128rr\0" |
| 56616 | /* 184445 */ "VEXPANDPDZ128rr\0" |
| 56617 | /* 184461 */ "VANDPDZ128rr\0" |
| 56618 | /* 184474 */ "VSCALEFPDZ128rr\0" |
| 56619 | /* 184490 */ "VUNPCKHPDZ128rr\0" |
| 56620 | /* 184506 */ "VPERMILPDZ128rr\0" |
| 56621 | /* 184522 */ "VUNPCKLPDZ128rr\0" |
| 56622 | /* 184538 */ "VMULPDZ128rr\0" |
| 56623 | /* 184551 */ "VBLENDMPDZ128rr\0" |
| 56624 | /* 184567 */ "VANDNPDZ128rr\0" |
| 56625 | /* 184581 */ "VMINPDZ128rr\0" |
| 56626 | /* 184594 */ "VORPDZ128rr\0" |
| 56627 | /* 184606 */ "VXORPDZ128rr\0" |
| 56628 | /* 184619 */ "VFPCLASSPDZ128rr\0" |
| 56629 | /* 184636 */ "VCOMPRESSPDZ128rr\0" |
| 56630 | /* 184654 */ "VMOVUPDZ128rr\0" |
| 56631 | /* 184668 */ "VDIVPDZ128rr\0" |
| 56632 | /* 184681 */ "VMAXPDZ128rr\0" |
| 56633 | /* 184694 */ "VPCMPEQDZ128rr\0" |
| 56634 | /* 184709 */ "VPMOVUSQDZ128rr\0" |
| 56635 | /* 184725 */ "VPMOVSQDZ128rr\0" |
| 56636 | /* 184740 */ "VPMOVQDZ128rr\0" |
| 56637 | /* 184754 */ "VPORDZ128rr\0" |
| 56638 | /* 184766 */ "VPXORDZ128rr\0" |
| 56639 | /* 184779 */ "VPABSDZ128rr\0" |
| 56640 | /* 184792 */ "VPMINSDZ128rr\0" |
| 56641 | /* 184806 */ "VPCOMPRESSDZ128rr\0" |
| 56642 | /* 184824 */ "VPMAXSDZ128rr\0" |
| 56643 | /* 184838 */ "VP2INTERSECTDZ128rr\0" |
| 56644 | /* 184858 */ "VPCONFLICTDZ128rr\0" |
| 56645 | /* 184876 */ "VPCMPGTDZ128rr\0" |
| 56646 | /* 184891 */ "VPOPCNTDZ128rr\0" |
| 56647 | /* 184906 */ "VPLZCNTDZ128rr\0" |
| 56648 | /* 184921 */ "VPBROADCASTDZ128rr\0" |
| 56649 | /* 184940 */ "VPMINUDZ128rr\0" |
| 56650 | /* 184954 */ "VPMAXUDZ128rr\0" |
| 56651 | /* 184968 */ "VPSRAVDZ128rr\0" |
| 56652 | /* 184982 */ "VPSLLVDZ128rr\0" |
| 56653 | /* 184996 */ "VPROLVDZ128rr\0" |
| 56654 | /* 185010 */ "VPSRLVDZ128rr\0" |
| 56655 | /* 185024 */ "VPRORVDZ128rr\0" |
| 56656 | /* 185038 */ "VPMADDWDZ128rr\0" |
| 56657 | /* 185053 */ "VPUNPCKHWDZ128rr\0" |
| 56658 | /* 185070 */ "VPUNPCKLWDZ128rr\0" |
| 56659 | /* 185087 */ "VPMOVSXWDZ128rr\0" |
| 56660 | /* 185103 */ "VPMOVZXWDZ128rr\0" |
| 56661 | /* 185119 */ "VCVTPD2PHZ128rr\0" |
| 56662 | /* 185135 */ "VCVTDQ2PHZ128rr\0" |
| 56663 | /* 185151 */ "VCVTUDQ2PHZ128rr\0" |
| 56664 | /* 185168 */ "VCVTQQ2PHZ128rr\0" |
| 56665 | /* 185184 */ "VCVTUQQ2PHZ128rr\0" |
| 56666 | /* 185201 */ "VCVTPS2PHZ128rr\0" |
| 56667 | /* 185217 */ "VCVTW2PHZ128rr\0" |
| 56668 | /* 185232 */ "VCVTUW2PHZ128rr\0" |
| 56669 | /* 185248 */ "VSUBPHZ128rr\0" |
| 56670 | /* 185261 */ "VFCMULCPHZ128rr\0" |
| 56671 | /* 185277 */ "VFMULCPHZ128rr\0" |
| 56672 | /* 185292 */ "VMINCPHZ128rr\0" |
| 56673 | /* 185306 */ "VMAXCPHZ128rr\0" |
| 56674 | /* 185320 */ "VADDPHZ128rr\0" |
| 56675 | /* 185333 */ "VSCALEFPHZ128rr\0" |
| 56676 | /* 185349 */ "VMULPHZ128rr\0" |
| 56677 | /* 185362 */ "VMINPHZ128rr\0" |
| 56678 | /* 185375 */ "VFPCLASSPHZ128rr\0" |
| 56679 | /* 185392 */ "VDIVPHZ128rr\0" |
| 56680 | /* 185405 */ "VMAXPHZ128rr\0" |
| 56681 | /* 185418 */ "VPMOVB2MZ128rr\0" |
| 56682 | /* 185433 */ "VPMOVD2MZ128rr\0" |
| 56683 | /* 185448 */ "VPMOVQ2MZ128rr\0" |
| 56684 | /* 185463 */ "VPMOVW2MZ128rr\0" |
| 56685 | /* 185478 */ "VMOVDDUPZ128rr\0" |
| 56686 | /* 185493 */ "VMOVSHDUPZ128rr\0" |
| 56687 | /* 185509 */ "VMOVSLDUPZ128rr\0" |
| 56688 | /* 185525 */ "VPBROADCASTMB2QZ128rr\0" |
| 56689 | /* 185547 */ "VPERMI2QZ128rr\0" |
| 56690 | /* 185562 */ "VPMOVM2QZ128rr\0" |
| 56691 | /* 185577 */ "VPERMT2QZ128rr\0" |
| 56692 | /* 185592 */ "VPSRAQZ128rr\0" |
| 56693 | /* 185605 */ "VPSUBQZ128rr\0" |
| 56694 | /* 185618 */ "VPMOVSXBQZ128rr\0" |
| 56695 | /* 185634 */ "VPMOVZXBQZ128rr\0" |
| 56696 | /* 185650 */ "VCVTTPD2DQZ128rr\0" |
| 56697 | /* 185667 */ "VCVTPD2DQZ128rr\0" |
| 56698 | /* 185683 */ "VCVTTPH2DQZ128rr\0" |
| 56699 | /* 185700 */ "VCVTPH2DQZ128rr\0" |
| 56700 | /* 185716 */ "VCVTTPS2DQZ128rr\0" |
| 56701 | /* 185733 */ "VCVTPS2DQZ128rr\0" |
| 56702 | /* 185749 */ "VPADDQZ128rr\0" |
| 56703 | /* 185762 */ "VPUNPCKHDQZ128rr\0" |
| 56704 | /* 185779 */ "VPUNPCKLDQZ128rr\0" |
| 56705 | /* 185796 */ "VPMULDQZ128rr\0" |
| 56706 | /* 185810 */ "VPANDQZ128rr\0" |
| 56707 | /* 185823 */ "VPEXPANDQZ128rr\0" |
| 56708 | /* 185839 */ "VPUNPCKHQDQZ128rr\0" |
| 56709 | /* 185857 */ "VPUNPCKLQDQZ128rr\0" |
| 56710 | /* 185875 */ "VCVTTPD2UDQZ128rr\0" |
| 56711 | /* 185893 */ "VCVTPD2UDQZ128rr\0" |
| 56712 | /* 185910 */ "VCVTTPH2UDQZ128rr\0" |
| 56713 | /* 185928 */ "VCVTPH2UDQZ128rr\0" |
| 56714 | /* 185945 */ "VCVTTPS2UDQZ128rr\0" |
| 56715 | /* 185963 */ "VCVTPS2UDQZ128rr\0" |
| 56716 | /* 185980 */ "VPMULUDQZ128rr\0" |
| 56717 | /* 185995 */ "VPMOVSXDQZ128rr\0" |
| 56718 | /* 186011 */ "VPMOVZXDQZ128rr\0" |
| 56719 | /* 186027 */ "VPSLLQZ128rr\0" |
| 56720 | /* 186040 */ "VPMULLQZ128rr\0" |
| 56721 | /* 186054 */ "VPSRLQZ128rr\0" |
| 56722 | /* 186067 */ "VPBLENDMQZ128rr\0" |
| 56723 | /* 186083 */ "VPTESTNMQZ128rr\0" |
| 56724 | /* 186099 */ "VPTESTMQZ128rr\0" |
| 56725 | /* 186114 */ "VPANDNQZ128rr\0" |
| 56726 | /* 186128 */ "VCVTTPD2QQZ128rr\0" |
| 56727 | /* 186145 */ "VCVTPD2QQZ128rr\0" |
| 56728 | /* 186161 */ "VCVTTPH2QQZ128rr\0" |
| 56729 | /* 186178 */ "VCVTPH2QQZ128rr\0" |
| 56730 | /* 186194 */ "VCVTTPS2QQZ128rr\0" |
| 56731 | /* 186211 */ "VCVTPS2QQZ128rr\0" |
| 56732 | /* 186227 */ "VPCMPEQQZ128rr\0" |
| 56733 | /* 186242 */ "VCVTTPD2UQQZ128rr\0" |
| 56734 | /* 186260 */ "VCVTPD2UQQZ128rr\0" |
| 56735 | /* 186277 */ "VCVTTPH2UQQZ128rr\0" |
| 56736 | /* 186295 */ "VCVTPH2UQQZ128rr\0" |
| 56737 | /* 186312 */ "VCVTTPS2UQQZ128rr\0" |
| 56738 | /* 186330 */ "VCVTPS2UQQZ128rr\0" |
| 56739 | /* 186347 */ "VPORQZ128rr\0" |
| 56740 | /* 186359 */ "VPXORQZ128rr\0" |
| 56741 | /* 186372 */ "VPABSQZ128rr\0" |
| 56742 | /* 186385 */ "VPMINSQZ128rr\0" |
| 56743 | /* 186399 */ "VPCOMPRESSQZ128rr\0" |
| 56744 | /* 186417 */ "VPMAXSQZ128rr\0" |
| 56745 | /* 186431 */ "VP2INTERSECTQZ128rr\0" |
| 56746 | /* 186451 */ "VPCONFLICTQZ128rr\0" |
| 56747 | /* 186469 */ "VPCMPGTQZ128rr\0" |
| 56748 | /* 186484 */ "VPOPCNTQZ128rr\0" |
| 56749 | /* 186499 */ "VPLZCNTQZ128rr\0" |
| 56750 | /* 186514 */ "VPBROADCASTQZ128rr\0" |
| 56751 | /* 186533 */ "VPMINUQZ128rr\0" |
| 56752 | /* 186547 */ "VPMAXUQZ128rr\0" |
| 56753 | /* 186561 */ "VPSRAVQZ128rr\0" |
| 56754 | /* 186575 */ "VPSLLVQZ128rr\0" |
| 56755 | /* 186589 */ "VPROLVQZ128rr\0" |
| 56756 | /* 186603 */ "VPSRLVQZ128rr\0" |
| 56757 | /* 186617 */ "VPRORVQZ128rr\0" |
| 56758 | /* 186631 */ "VPMOVSXWQZ128rr\0" |
| 56759 | /* 186647 */ "VPMOVZXWQZ128rr\0" |
| 56760 | /* 186663 */ "VCVTPD2PSZ128rr\0" |
| 56761 | /* 186679 */ "VCVTPH2PSZ128rr\0" |
| 56762 | /* 186695 */ "VPERMI2PSZ128rr\0" |
| 56763 | /* 186711 */ "VCVTDQ2PSZ128rr\0" |
| 56764 | /* 186727 */ "VCVTUDQ2PSZ128rr\0" |
| 56765 | /* 186744 */ "VCVTQQ2PSZ128rr\0" |
| 56766 | /* 186760 */ "VCVTUQQ2PSZ128rr\0" |
| 56767 | /* 186777 */ "VPERMT2PSZ128rr\0" |
| 56768 | /* 186793 */ "VMOVAPSZ128rr\0" |
| 56769 | /* 186807 */ "VSUBPSZ128rr\0" |
| 56770 | /* 186820 */ "VMINCPSZ128rr\0" |
| 56771 | /* 186834 */ "VMAXCPSZ128rr\0" |
| 56772 | /* 186848 */ "VADDPSZ128rr\0" |
| 56773 | /* 186861 */ "VEXPANDPSZ128rr\0" |
| 56774 | /* 186877 */ "VANDPSZ128rr\0" |
| 56775 | /* 186890 */ "VSCALEFPSZ128rr\0" |
| 56776 | /* 186906 */ "VUNPCKHPSZ128rr\0" |
| 56777 | /* 186922 */ "VPERMILPSZ128rr\0" |
| 56778 | /* 186938 */ "VUNPCKLPSZ128rr\0" |
| 56779 | /* 186954 */ "VMULPSZ128rr\0" |
| 56780 | /* 186967 */ "VBLENDMPSZ128rr\0" |
| 56781 | /* 186983 */ "VANDNPSZ128rr\0" |
| 56782 | /* 186997 */ "VMINPSZ128rr\0" |
| 56783 | /* 187010 */ "VORPSZ128rr\0" |
| 56784 | /* 187022 */ "VXORPSZ128rr\0" |
| 56785 | /* 187035 */ "VFPCLASSPSZ128rr\0" |
| 56786 | /* 187052 */ "VCOMPRESSPSZ128rr\0" |
| 56787 | /* 187070 */ "VMOVUPSZ128rr\0" |
| 56788 | /* 187084 */ "VDIVPSZ128rr\0" |
| 56789 | /* 187097 */ "VMAXPSZ128rr\0" |
| 56790 | /* 187110 */ "VBROADCASTSSZ128rr\0" |
| 56791 | /* 187129 */ "VAESDECLASTZ128rr\0" |
| 56792 | /* 187147 */ "VAESENCLASTZ128rr\0" |
| 56793 | /* 187165 */ "VCVTTPH2WZ128rr\0" |
| 56794 | /* 187181 */ "VCVTPH2WZ128rr\0" |
| 56795 | /* 187196 */ "VPERMI2WZ128rr\0" |
| 56796 | /* 187211 */ "VPMOVM2WZ128rr\0" |
| 56797 | /* 187226 */ "VPERMT2WZ128rr\0" |
| 56798 | /* 187241 */ "VPSRAWZ128rr\0" |
| 56799 | /* 187254 */ "VPSADBWZ128rr\0" |
| 56800 | /* 187268 */ "VPUNPCKHBWZ128rr\0" |
| 56801 | /* 187285 */ "VPUNPCKLBWZ128rr\0" |
| 56802 | /* 187302 */ "VPSUBWZ128rr\0" |
| 56803 | /* 187315 */ "VPMOVSXBWZ128rr\0" |
| 56804 | /* 187331 */ "VPMOVZXBWZ128rr\0" |
| 56805 | /* 187347 */ "VPADDWZ128rr\0" |
| 56806 | /* 187360 */ "VPEXPANDWZ128rr\0" |
| 56807 | /* 187376 */ "VPACKSSDWZ128rr\0" |
| 56808 | /* 187392 */ "VPACKUSDWZ128rr\0" |
| 56809 | /* 187408 */ "VPMOVUSDWZ128rr\0" |
| 56810 | /* 187424 */ "VPMOVSDWZ128rr\0" |
| 56811 | /* 187439 */ "VPMOVDWZ128rr\0" |
| 56812 | /* 187453 */ "VPAVGWZ128rr\0" |
| 56813 | /* 187466 */ "VPMULHWZ128rr\0" |
| 56814 | /* 187480 */ "VPSLLWZ128rr\0" |
| 56815 | /* 187493 */ "VPMULLWZ128rr\0" |
| 56816 | /* 187507 */ "VPSRLWZ128rr\0" |
| 56817 | /* 187520 */ "VPBLENDMWZ128rr\0" |
| 56818 | /* 187536 */ "VPTESTNMWZ128rr\0" |
| 56819 | /* 187552 */ "VPERMWZ128rr\0" |
| 56820 | /* 187565 */ "VPTESTMWZ128rr\0" |
| 56821 | /* 187580 */ "VPCMPEQWZ128rr\0" |
| 56822 | /* 187595 */ "VPMOVUSQWZ128rr\0" |
| 56823 | /* 187611 */ "VPMOVSQWZ128rr\0" |
| 56824 | /* 187626 */ "VPMOVQWZ128rr\0" |
| 56825 | /* 187640 */ "VPABSWZ128rr\0" |
| 56826 | /* 187653 */ "VPMADDUBSWZ128rr\0" |
| 56827 | /* 187670 */ "VPSUBSWZ128rr\0" |
| 56828 | /* 187684 */ "VPADDSWZ128rr\0" |
| 56829 | /* 187698 */ "VPMINSWZ128rr\0" |
| 56830 | /* 187712 */ "VPMULHRSWZ128rr\0" |
| 56831 | /* 187728 */ "VPCOMPRESSWZ128rr\0" |
| 56832 | /* 187746 */ "VPSUBUSWZ128rr\0" |
| 56833 | /* 187761 */ "VPADDUSWZ128rr\0" |
| 56834 | /* 187776 */ "VPMAXSWZ128rr\0" |
| 56835 | /* 187790 */ "VPCMPGTWZ128rr\0" |
| 56836 | /* 187805 */ "VPOPCNTWZ128rr\0" |
| 56837 | /* 187820 */ "VPBROADCASTWZ128rr\0" |
| 56838 | /* 187839 */ "VCVTTPH2UWZ128rr\0" |
| 56839 | /* 187856 */ "VCVTPH2UWZ128rr\0" |
| 56840 | /* 187872 */ "VPMULHUWZ128rr\0" |
| 56841 | /* 187887 */ "VPMINUWZ128rr\0" |
| 56842 | /* 187901 */ "VPMAXUWZ128rr\0" |
| 56843 | /* 187915 */ "VPSRAVWZ128rr\0" |
| 56844 | /* 187929 */ "VPSLLVWZ128rr\0" |
| 56845 | /* 187943 */ "VPSRLVWZ128rr\0" |
| 56846 | /* 187957 */ "VCVTPS2PHXZ128rr\0" |
| 56847 | /* 187974 */ "VCVTPH2PSXZ128rr\0" |
| 56848 | /* 187991 */ "VPBROADCASTBrZ128rr\0" |
| 56849 | /* 188011 */ "VPBROADCASTDrZ128rr\0" |
| 56850 | /* 188031 */ "VPBROADCASTQrZ128rr\0" |
| 56851 | /* 188051 */ "VPBROADCASTWrZ128rr\0" |
| 56852 | /* 188071 */ "SBB8rr\0" |
| 56853 | /* 188078 */ "SUB8rr\0" |
| 56854 | /* 188085 */ "ADC8rr\0" |
| 56855 | /* 188092 */ "XADD8rr\0" |
| 56856 | /* 188100 */ "AND8rr\0" |
| 56857 | /* 188107 */ "CMPXCHG8rr\0" |
| 56858 | /* 188118 */ "IN8rr\0" |
| 56859 | /* 188124 */ "CCMP8rr\0" |
| 56860 | /* 188132 */ "XOR8rr\0" |
| 56861 | /* 188139 */ "CTEST8rr\0" |
| 56862 | /* 188148 */ "OUT8rr\0" |
| 56863 | /* 188155 */ "MOV8rr\0" |
| 56864 | /* 188162 */ "VMOVDQArr\0" |
| 56865 | /* 188172 */ "VPSHABrr\0" |
| 56866 | /* 188181 */ "VPSUBBrr\0" |
| 56867 | /* 188190 */ "MMX_PSUBBrr\0" |
| 56868 | /* 188202 */ "KADDBrr\0" |
| 56869 | /* 188210 */ "VPADDBrr\0" |
| 56870 | /* 188219 */ "MMX_PADDBrr\0" |
| 56871 | /* 188231 */ "KANDBrr\0" |
| 56872 | /* 188239 */ "VPSHUFBrr\0" |
| 56873 | /* 188249 */ "MMX_PSHUFBrr\0" |
| 56874 | /* 188262 */ "VPAVGBrr\0" |
| 56875 | /* 188271 */ "MMX_PAVGBrr\0" |
| 56876 | /* 188283 */ "VPMOVMSKBrr\0" |
| 56877 | /* 188295 */ "MMX_PMOVMSKBrr\0" |
| 56878 | /* 188310 */ "VPSHLBrr\0" |
| 56879 | /* 188319 */ "VGF2P8MULBrr\0" |
| 56880 | /* 188332 */ "KANDNBrr\0" |
| 56881 | /* 188341 */ "VPSIGNBrr\0" |
| 56882 | /* 188351 */ "MMX_PSIGNBrr\0" |
| 56883 | /* 188364 */ "VPCMPEQBrr\0" |
| 56884 | /* 188375 */ "MMX_PCMPEQBrr\0" |
| 56885 | /* 188389 */ "KORBrr\0" |
| 56886 | /* 188396 */ "KXNORBrr\0" |
| 56887 | /* 188405 */ "KXORBrr\0" |
| 56888 | /* 188413 */ "VPINSRBrr\0" |
| 56889 | /* 188423 */ "VPEXTRBrr\0" |
| 56890 | /* 188433 */ "VPABSBrr\0" |
| 56891 | /* 188442 */ "MMX_PABSBrr\0" |
| 56892 | /* 188454 */ "VPSUBSBrr\0" |
| 56893 | /* 188464 */ "MMX_PSUBSBrr\0" |
| 56894 | /* 188477 */ "VPADDSBrr\0" |
| 56895 | /* 188487 */ "MMX_PADDSBrr\0" |
| 56896 | /* 188500 */ "VPMINSBrr\0" |
| 56897 | /* 188510 */ "VPSUBUSBrr\0" |
| 56898 | /* 188521 */ "MMX_PSUBUSBrr\0" |
| 56899 | /* 188535 */ "VPADDUSBrr\0" |
| 56900 | /* 188546 */ "MMX_PADDUSBrr\0" |
| 56901 | /* 188560 */ "PAVGUSBrr\0" |
| 56902 | /* 188570 */ "VPMAXSBrr\0" |
| 56903 | /* 188580 */ "VPCMPGTBrr\0" |
| 56904 | /* 188591 */ "MMX_PCMPGTBrr\0" |
| 56905 | /* 188605 */ "KNOTBrr\0" |
| 56906 | /* 188613 */ "VPROTBrr\0" |
| 56907 | /* 188622 */ "VPBROADCASTBrr\0" |
| 56908 | /* 188637 */ "KTESTBrr\0" |
| 56909 | /* 188646 */ "KORTESTBrr\0" |
| 56910 | /* 188657 */ "VPMINUBrr\0" |
| 56911 | /* 188667 */ "MMX_PMINUBrr\0" |
| 56912 | /* 188680 */ "PFSUBrr\0" |
| 56913 | /* 188688 */ "VPMAXUBrr\0" |
| 56914 | /* 188698 */ "MMX_PMAXUBrr\0" |
| 56915 | /* 188711 */ "VPACKSSWBrr\0" |
| 56916 | /* 188723 */ "MMX_PACKSSWBrr\0" |
| 56917 | /* 188738 */ "VPACKUSWBrr\0" |
| 56918 | /* 188750 */ "MMX_PACKUSWBrr\0" |
| 56919 | /* 188765 */ "PFACCrr\0" |
| 56920 | /* 188773 */ "PFNACCrr\0" |
| 56921 | /* 188782 */ "PFPNACCrr\0" |
| 56922 | /* 188792 */ "VAESDECrr\0" |
| 56923 | /* 188802 */ "VAESIMCrr\0" |
| 56924 | /* 188812 */ "VAESENCrr\0" |
| 56925 | /* 188822 */ "VPSHADrr\0" |
| 56926 | /* 188831 */ "VPSRADrr\0" |
| 56927 | /* 188840 */ "MMX_PSRADrr\0" |
| 56928 | /* 188852 */ "VPHADDBDrr\0" |
| 56929 | /* 188863 */ "VPHADDUBDrr\0" |
| 56930 | /* 188875 */ "VPHSUBDrr\0" |
| 56931 | /* 188885 */ "MMX_PHSUBDrr\0" |
| 56932 | /* 188898 */ "VPSUBDrr\0" |
| 56933 | /* 188907 */ "MMX_PSUBDrr\0" |
| 56934 | /* 188919 */ "VPMOVSXBDrr\0" |
| 56935 | /* 188931 */ "VPMOVZXBDrr\0" |
| 56936 | /* 188943 */ "PFADDrr\0" |
| 56937 | /* 188951 */ "VPHADDDrr\0" |
| 56938 | /* 188961 */ "MMX_PHADDDrr\0" |
| 56939 | /* 188974 */ "KADDDrr\0" |
| 56940 | /* 188982 */ "VPADDDrr\0" |
| 56941 | /* 188991 */ "MMX_PADDDrr\0" |
| 56942 | /* 189003 */ "KANDDrr\0" |
| 56943 | /* 189011 */ "VPMACSDDrr\0" |
| 56944 | /* 189022 */ "VPMACSSDDrr\0" |
| 56945 | /* 189034 */ "PI2FDrr\0" |
| 56946 | /* 189042 */ "PF2IDrr\0" |
| 56947 | /* 189050 */ "VPSHLDrr\0" |
| 56948 | /* 189059 */ "VPSLLDrr\0" |
| 56949 | /* 189068 */ "MMX_PSLLDrr\0" |
| 56950 | /* 189080 */ "VPMULLDrr\0" |
| 56951 | /* 189090 */ "VPSRLDrr\0" |
| 56952 | /* 189099 */ "MMX_PSRLDrr\0" |
| 56953 | /* 189111 */ "VPANDrr\0" |
| 56954 | /* 189119 */ "MMX_PANDrr\0" |
| 56955 | /* 189130 */ "KANDNDrr\0" |
| 56956 | /* 189139 */ "VPSIGNDrr\0" |
| 56957 | /* 189149 */ "MMX_PSIGNDrr\0" |
| 56958 | /* 189162 */ "MMX_CVTPI2PDrr\0" |
| 56959 | /* 189177 */ "VPERMIL2PDrr\0" |
| 56960 | /* 189190 */ "VCVTDQ2PDrr\0" |
| 56961 | /* 189202 */ "VCVTPS2PDrr\0" |
| 56962 | /* 189214 */ "VMOVAPDrr\0" |
| 56963 | /* 189224 */ "PSWAPDrr\0" |
| 56964 | /* 189233 */ "VADDSUBPDrr\0" |
| 56965 | /* 189245 */ "VHSUBPDrr\0" |
| 56966 | /* 189255 */ "VSUBPDrr\0" |
| 56967 | /* 189264 */ "VMINCPDrr\0" |
| 56968 | /* 189274 */ "VMAXCPDrr\0" |
| 56969 | /* 189284 */ "VHADDPDrr\0" |
| 56970 | /* 189294 */ "VADDPDrr\0" |
| 56971 | /* 189303 */ "VANDPDrr\0" |
| 56972 | /* 189312 */ "VUNPCKHPDrr\0" |
| 56973 | /* 189324 */ "VMOVMSKPDrr\0" |
| 56974 | /* 189336 */ "VPERMILPDrr\0" |
| 56975 | /* 189348 */ "VUNPCKLPDrr\0" |
| 56976 | /* 189360 */ "VMULPDrr\0" |
| 56977 | /* 189369 */ "VANDNPDrr\0" |
| 56978 | /* 189379 */ "VMINPDrr\0" |
| 56979 | /* 189388 */ "VORPDrr\0" |
| 56980 | /* 189396 */ "VXORPDrr\0" |
| 56981 | /* 189405 */ "VTESTPDrr\0" |
| 56982 | /* 189415 */ "VMOVUPDrr\0" |
| 56983 | /* 189425 */ "VDIVPDrr\0" |
| 56984 | /* 189434 */ "VMAXPDrr\0" |
| 56985 | /* 189443 */ "VFRCZPDrr\0" |
| 56986 | /* 189453 */ "VPCMPEQDrr\0" |
| 56987 | /* 189464 */ "MMX_PCMPEQDrr\0" |
| 56988 | /* 189478 */ "KORDrr\0" |
| 56989 | /* 189485 */ "KXNORDrr\0" |
| 56990 | /* 189494 */ "KXORDrr\0" |
| 56991 | /* 189502 */ "VPINSRDrr\0" |
| 56992 | /* 189512 */ "VPEXTRDrr\0" |
| 56993 | /* 189522 */ "VCVTSI642SDrr\0" |
| 56994 | /* 189536 */ "VCVTSI2SDrr\0" |
| 56995 | /* 189548 */ "VCVTSS2SDrr\0" |
| 56996 | /* 189560 */ "VPABSDrr\0" |
| 56997 | /* 189569 */ "MMX_PABSDrr\0" |
| 56998 | /* 189581 */ "VSUBSDrr\0" |
| 56999 | /* 189590 */ "VMINCSDrr\0" |
| 57000 | /* 189600 */ "VMAXCSDrr\0" |
| 57001 | /* 189610 */ "VADDSDrr\0" |
| 57002 | /* 189619 */ "VUCOMISDrr\0" |
| 57003 | /* 189630 */ "VCOMISDrr\0" |
| 57004 | /* 189640 */ "VMULSDrr\0" |
| 57005 | /* 189649 */ "VPMINSDrr\0" |
| 57006 | /* 189659 */ "VMINSDrr\0" |
| 57007 | /* 189668 */ "VPDPBSSDrr\0" |
| 57008 | /* 189679 */ "VPDPWSSDrr\0" |
| 57009 | /* 189690 */ "VPDPBUSDrr\0" |
| 57010 | /* 189701 */ "VPDPWUSDrr\0" |
| 57011 | /* 189712 */ "VDIVSDrr\0" |
| 57012 | /* 189721 */ "VMOVSDrr\0" |
| 57013 | /* 189730 */ "VPMAXSDrr\0" |
| 57014 | /* 189740 */ "VMAXSDrr\0" |
| 57015 | /* 189749 */ "VFRCZSDrr\0" |
| 57016 | /* 189759 */ "VMOV64toSDrr\0" |
| 57017 | /* 189772 */ "VPCMPGTDrr\0" |
| 57018 | /* 189783 */ "MMX_PCMPGTDrr\0" |
| 57019 | /* 189797 */ "KNOTDrr\0" |
| 57020 | /* 189805 */ "VPROTDrr\0" |
| 57021 | /* 189814 */ "VPBROADCASTDrr\0" |
| 57022 | /* 189829 */ "KTESTDrr\0" |
| 57023 | /* 189838 */ "KORTESTDrr\0" |
| 57024 | /* 189849 */ "VPMINUDrr\0" |
| 57025 | /* 189859 */ "VPDPBSUDrr\0" |
| 57026 | /* 189870 */ "VPDPWSUDrr\0" |
| 57027 | /* 189881 */ "VPDPBUUDrr\0" |
| 57028 | /* 189892 */ "VPDPWUUDrr\0" |
| 57029 | /* 189903 */ "VPMAXUDrr\0" |
| 57030 | /* 189913 */ "VPSRAVDrr\0" |
| 57031 | /* 189923 */ "VPSLLVDrr\0" |
| 57032 | /* 189933 */ "VPSRLVDrr\0" |
| 57033 | /* 189943 */ "VPHSUBWDrr\0" |
| 57034 | /* 189954 */ "VPHADDWDrr\0" |
| 57035 | /* 189965 */ "VPMADDWDrr\0" |
| 57036 | /* 189976 */ "MMX_PMADDWDrr\0" |
| 57037 | /* 189990 */ "VPUNPCKHWDrr\0" |
| 57038 | /* 190003 */ "MMX_PUNPCKHWDrr\0" |
| 57039 | /* 190019 */ "KUNPCKWDrr\0" |
| 57040 | /* 190030 */ "VPUNPCKLWDrr\0" |
| 57041 | /* 190043 */ "MMX_PUNPCKLWDrr\0" |
| 57042 | /* 190059 */ "VPMACSWDrr\0" |
| 57043 | /* 190070 */ "VPMADCSWDrr\0" |
| 57044 | /* 190082 */ "VPMACSSWDrr\0" |
| 57045 | /* 190094 */ "VPMADCSSWDrr\0" |
| 57046 | /* 190107 */ "VPHADDUWDrr\0" |
| 57047 | /* 190119 */ "VPMOVSXWDrr\0" |
| 57048 | /* 190131 */ "VPMOVZXWDrr\0" |
| 57049 | /* 190143 */ "PFCMPGErr\0" |
| 57050 | /* 190153 */ "SHA1NEXTErr\0" |
| 57051 | /* 190165 */ "LD_Frr\0" |
| 57052 | /* 190172 */ "ST_Frr\0" |
| 57053 | /* 190179 */ "MULX32Hrr\0" |
| 57054 | /* 190189 */ "MULX64Hrr\0" |
| 57055 | /* 190199 */ "VCVTPS2PHrr\0" |
| 57056 | /* 190211 */ "VPMACSDQHrr\0" |
| 57057 | /* 190223 */ "VPMACSSDQHrr\0" |
| 57058 | /* 190236 */ "VMOVW2SHrr\0" |
| 57059 | /* 190247 */ "VMOVW64toSHrr\0" |
| 57060 | /* 190261 */ "VMOVPDI2DIrr\0" |
| 57061 | /* 190274 */ "VMOVSS2DIrr\0" |
| 57062 | /* 190286 */ "VMOVDI2PDIrr\0" |
| 57063 | /* 190299 */ "MMX_CVTTPD2PIrr\0" |
| 57064 | /* 190315 */ "MMX_CVTPD2PIrr\0" |
| 57065 | /* 190330 */ "MMX_CVTTPS2PIrr\0" |
| 57066 | /* 190346 */ "MMX_CVTPS2PIrr\0" |
| 57067 | /* 190361 */ "VMOVPQI2QIrr\0" |
| 57068 | /* 190374 */ "VMOVZPQILo2PQIrr\0" |
| 57069 | /* 190391 */ "VMOV64toPQIrr\0" |
| 57070 | /* 190405 */ "VCVTTSD2SIrr\0" |
| 57071 | /* 190418 */ "VCVTSD2SIrr\0" |
| 57072 | /* 190430 */ "VCVTTSS2SIrr\0" |
| 57073 | /* 190443 */ "VCVTSS2SIrr\0" |
| 57074 | /* 190455 */ "VPMACSDQLrr\0" |
| 57075 | /* 190467 */ "VPMACSSDQLrr\0" |
| 57076 | /* 190480 */ "PFMULrr\0" |
| 57077 | /* 190488 */ "VPANDNrr\0" |
| 57078 | /* 190497 */ "MMX_PANDNrr\0" |
| 57079 | /* 190509 */ "PFMINrr\0" |
| 57080 | /* 190517 */ "PFRCPrr\0" |
| 57081 | /* 190525 */ "ST_FPrr\0" |
| 57082 | /* 190533 */ "VMOVDDUPrr\0" |
| 57083 | /* 190544 */ "VMOVSHDUPrr\0" |
| 57084 | /* 190556 */ "VMOVSLDUPrr\0" |
| 57085 | /* 190568 */ "MMX_MOVFR642Qrr\0" |
| 57086 | /* 190584 */ "MMX_MOVDQ2Qrr\0" |
| 57087 | /* 190598 */ "VPSHAQrr\0" |
| 57088 | /* 190607 */ "VPHADDBQrr\0" |
| 57089 | /* 190618 */ "VPHADDUBQrr\0" |
| 57090 | /* 190630 */ "VPSUBQrr\0" |
| 57091 | /* 190639 */ "MMX_PSUBQrr\0" |
| 57092 | /* 190651 */ "VPMOVSXBQrr\0" |
| 57093 | /* 190663 */ "VPMOVZXBQrr\0" |
| 57094 | /* 190675 */ "VCVTTPD2DQrr\0" |
| 57095 | /* 190688 */ "VCVTPD2DQrr\0" |
| 57096 | /* 190700 */ "MMX_MOVQ2DQrr\0" |
| 57097 | /* 190714 */ "VCVTTPS2DQrr\0" |
| 57098 | /* 190727 */ "VCVTPS2DQrr\0" |
| 57099 | /* 190739 */ "VPHSUBDQrr\0" |
| 57100 | /* 190750 */ "KADDQrr\0" |
| 57101 | /* 190758 */ "VPADDQrr\0" |
| 57102 | /* 190767 */ "MMX_PADDQrr\0" |
| 57103 | /* 190779 */ "VPHADDDQrr\0" |
| 57104 | /* 190790 */ "VPUNPCKHDQrr\0" |
| 57105 | /* 190803 */ "MMX_PUNPCKHDQrr\0" |
| 57106 | /* 190819 */ "KUNPCKDQrr\0" |
| 57107 | /* 190830 */ "VPUNPCKLDQrr\0" |
| 57108 | /* 190843 */ "MMX_PUNPCKLDQrr\0" |
| 57109 | /* 190859 */ "VPMULDQrr\0" |
| 57110 | /* 190869 */ "KANDQrr\0" |
| 57111 | /* 190877 */ "VPUNPCKHQDQrr\0" |
| 57112 | /* 190891 */ "VPUNPCKLQDQrr\0" |
| 57113 | /* 190905 */ "VPHADDUDQrr\0" |
| 57114 | /* 190917 */ "VPMULUDQrr\0" |
| 57115 | /* 190928 */ "MMX_PMULUDQrr\0" |
| 57116 | /* 190942 */ "VPMOVSXDQrr\0" |
| 57117 | /* 190954 */ "VPMOVZXDQrr\0" |
| 57118 | /* 190966 */ "PFCMPEQrr\0" |
| 57119 | /* 190976 */ "VPSHLQrr\0" |
| 57120 | /* 190985 */ "VPSLLQrr\0" |
| 57121 | /* 190994 */ "MMX_PSLLQrr\0" |
| 57122 | /* 191006 */ "VPSRLQrr\0" |
| 57123 | /* 191015 */ "MMX_PSRLQrr\0" |
| 57124 | /* 191027 */ "KANDNQrr\0" |
| 57125 | /* 191036 */ "VPCMPEQQrr\0" |
| 57126 | /* 191047 */ "KORQrr\0" |
| 57127 | /* 191054 */ "KXNORQrr\0" |
| 57128 | /* 191063 */ "KXORQrr\0" |
| 57129 | /* 191071 */ "VPINSRQrr\0" |
| 57130 | /* 191081 */ "VPEXTRQrr\0" |
| 57131 | /* 191091 */ "VPCMPGTQrr\0" |
| 57132 | /* 191102 */ "KNOTQrr\0" |
| 57133 | /* 191110 */ "VPROTQrr\0" |
| 57134 | /* 191119 */ "VPBROADCASTQrr\0" |
| 57135 | /* 191134 */ "KTESTQrr\0" |
| 57136 | /* 191143 */ "KORTESTQrr\0" |
| 57137 | /* 191154 */ "VPMADD52HUQrr\0" |
| 57138 | /* 191168 */ "VPMADD52LUQrr\0" |
| 57139 | /* 191182 */ "VPSLLVQrr\0" |
| 57140 | /* 191192 */ "VPSRLVQrr\0" |
| 57141 | /* 191202 */ "VPHADDWQrr\0" |
| 57142 | /* 191213 */ "VPHADDUWQrr\0" |
| 57143 | /* 191225 */ "VPMOVSXWQrr\0" |
| 57144 | /* 191237 */ "VPMOVZXWQrr\0" |
| 57145 | /* 191249 */ "PFSUBRrr\0" |
| 57146 | /* 191258 */ "VPORrr\0" |
| 57147 | /* 191265 */ "MMX_PORrr\0" |
| 57148 | /* 191275 */ "VPXORrr\0" |
| 57149 | /* 191283 */ "MMX_PXORrr\0" |
| 57150 | /* 191294 */ "URDMSRrr\0" |
| 57151 | /* 191303 */ "UWRMSRrr\0" |
| 57152 | /* 191312 */ "VPDPBSSDSrr\0" |
| 57153 | /* 191324 */ "VPDPWSSDSrr\0" |
| 57154 | /* 191336 */ "VPDPBUSDSrr\0" |
| 57155 | /* 191348 */ "VPDPWUSDSrr\0" |
| 57156 | /* 191360 */ "VPDPBSUDSrr\0" |
| 57157 | /* 191372 */ "VPDPWSUDSrr\0" |
| 57158 | /* 191384 */ "VPDPBUUDSrr\0" |
| 57159 | /* 191396 */ "VPDPWUUDSrr\0" |
| 57160 | /* 191408 */ "VCVTPD2PSrr\0" |
| 57161 | /* 191420 */ "VCVTPH2PSrr\0" |
| 57162 | /* 191432 */ "MMX_CVTPI2PSrr\0" |
| 57163 | /* 191447 */ "VPERMIL2PSrr\0" |
| 57164 | /* 191460 */ "VCVTDQ2PSrr\0" |
| 57165 | /* 191472 */ "VMOVAPSrr\0" |
| 57166 | /* 191482 */ "VADDSUBPSrr\0" |
| 57167 | /* 191494 */ "VHSUBPSrr\0" |
| 57168 | /* 191504 */ "VSUBPSrr\0" |
| 57169 | /* 191513 */ "VMINCPSrr\0" |
| 57170 | /* 191523 */ "VMAXCPSrr\0" |
| 57171 | /* 191533 */ "VHADDPSrr\0" |
| 57172 | /* 191543 */ "VADDPSrr\0" |
| 57173 | /* 191552 */ "VANDPSrr\0" |
| 57174 | /* 191561 */ "VUNPCKHPSrr\0" |
| 57175 | /* 191573 */ "VMOVLHPSrr\0" |
| 57176 | /* 191584 */ "VMOVMSKPSrr\0" |
| 57177 | /* 191596 */ "VMOVHLPSrr\0" |
| 57178 | /* 191607 */ "VPERMILPSrr\0" |
| 57179 | /* 191619 */ "VUNPCKLPSrr\0" |
| 57180 | /* 191631 */ "VMULPSrr\0" |
| 57181 | /* 191640 */ "VANDNPSrr\0" |
| 57182 | /* 191650 */ "VMINPSrr\0" |
| 57183 | /* 191659 */ "VORPSrr\0" |
| 57184 | /* 191667 */ "VXORPSrr\0" |
| 57185 | /* 191676 */ "VEXTRACTPSrr\0" |
| 57186 | /* 191689 */ "VINSERTPSrr\0" |
| 57187 | /* 191701 */ "VTESTPSrr\0" |
| 57188 | /* 191711 */ "VMOVUPSrr\0" |
| 57189 | /* 191721 */ "VDIVPSrr\0" |
| 57190 | /* 191730 */ "VMAXPSrr\0" |
| 57191 | /* 191739 */ "VFRCZPSrr\0" |
| 57192 | /* 191749 */ "VCVTSI642SSrr\0" |
| 57193 | /* 191763 */ "VCVTSD2SSrr\0" |
| 57194 | /* 191775 */ "VMOVDI2SSrr\0" |
| 57195 | /* 191787 */ "VCVTSI2SSrr\0" |
| 57196 | /* 191799 */ "VSUBSSrr\0" |
| 57197 | /* 191808 */ "VMINCSSrr\0" |
| 57198 | /* 191818 */ "VMAXCSSrr\0" |
| 57199 | /* 191828 */ "VADDSSrr\0" |
| 57200 | /* 191837 */ "VUCOMISSrr\0" |
| 57201 | /* 191848 */ "VCOMISSrr\0" |
| 57202 | /* 191858 */ "VMULSSrr\0" |
| 57203 | /* 191867 */ "VMINSSrr\0" |
| 57204 | /* 191876 */ "VBROADCASTSSrr\0" |
| 57205 | /* 191891 */ "VDIVSSrr\0" |
| 57206 | /* 191900 */ "VMOVSSrr\0" |
| 57207 | /* 191909 */ "VMAXSSrr\0" |
| 57208 | /* 191918 */ "VFRCZSSrr\0" |
| 57209 | /* 191928 */ "PFCMPGTrr\0" |
| 57210 | /* 191938 */ "MWAITrr\0" |
| 57211 | /* 191946 */ "PFRSQRTrr\0" |
| 57212 | /* 191956 */ "VAESDECLASTrr\0" |
| 57213 | /* 191970 */ "VAESENCLASTrr\0" |
| 57214 | /* 191984 */ "VPTESTrr\0" |
| 57215 | /* 191993 */ "VMOVDQUrr\0" |
| 57216 | /* 192003 */ "VMOVSH2Wrr\0" |
| 57217 | /* 192014 */ "VPSHAWrr\0" |
| 57218 | /* 192023 */ "VPSRAWrr\0" |
| 57219 | /* 192032 */ "MMX_PSRAWrr\0" |
| 57220 | /* 192044 */ "VPHSUBBWrr\0" |
| 57221 | /* 192055 */ "VPSADBWrr\0" |
| 57222 | /* 192065 */ "MMX_PSADBWrr\0" |
| 57223 | /* 192078 */ "VPHADDBWrr\0" |
| 57224 | /* 192089 */ "VPUNPCKHBWrr\0" |
| 57225 | /* 192102 */ "MMX_PUNPCKHBWrr\0" |
| 57226 | /* 192118 */ "KUNPCKBWrr\0" |
| 57227 | /* 192129 */ "VPUNPCKLBWrr\0" |
| 57228 | /* 192142 */ "MMX_PUNPCKLBWrr\0" |
| 57229 | /* 192158 */ "VPHADDUBWrr\0" |
| 57230 | /* 192170 */ "VPHSUBWrr\0" |
| 57231 | /* 192180 */ "MMX_PHSUBWrr\0" |
| 57232 | /* 192193 */ "VPSUBWrr\0" |
| 57233 | /* 192202 */ "MMX_PSUBWrr\0" |
| 57234 | /* 192214 */ "VPMOVSXBWrr\0" |
| 57235 | /* 192226 */ "VPMOVZXBWrr\0" |
| 57236 | /* 192238 */ "VPHADDWrr\0" |
| 57237 | /* 192248 */ "MMX_PHADDWrr\0" |
| 57238 | /* 192261 */ "KADDWrr\0" |
| 57239 | /* 192269 */ "VPADDWrr\0" |
| 57240 | /* 192278 */ "MMX_PADDWrr\0" |
| 57241 | /* 192290 */ "KANDWrr\0" |
| 57242 | /* 192298 */ "VPACKSSDWrr\0" |
| 57243 | /* 192310 */ "MMX_PACKSSDWrr\0" |
| 57244 | /* 192325 */ "VPACKUSDWrr\0" |
| 57245 | /* 192337 */ "PI2FWrr\0" |
| 57246 | /* 192345 */ "VPAVGWrr\0" |
| 57247 | /* 192354 */ "MMX_PAVGWrr\0" |
| 57248 | /* 192366 */ "VPMULHWrr\0" |
| 57249 | /* 192376 */ "MMX_PMULHWrr\0" |
| 57250 | /* 192389 */ "PF2IWrr\0" |
| 57251 | /* 192397 */ "VPSHLWrr\0" |
| 57252 | /* 192406 */ "VPSLLWrr\0" |
| 57253 | /* 192415 */ "MMX_PSLLWrr\0" |
| 57254 | /* 192427 */ "VPMULLWrr\0" |
| 57255 | /* 192437 */ "MMX_PMULLWrr\0" |
| 57256 | /* 192450 */ "VPSRLWrr\0" |
| 57257 | /* 192459 */ "MMX_PSRLWrr\0" |
| 57258 | /* 192471 */ "KANDNWrr\0" |
| 57259 | /* 192480 */ "VPSIGNWrr\0" |
| 57260 | /* 192490 */ "MMX_PSIGNWrr\0" |
| 57261 | /* 192503 */ "VPCMPEQWrr\0" |
| 57262 | /* 192514 */ "MMX_PCMPEQWrr\0" |
| 57263 | /* 192528 */ "PMULHRWrr\0" |
| 57264 | /* 192538 */ "KORWrr\0" |
| 57265 | /* 192545 */ "KXNORWrr\0" |
| 57266 | /* 192554 */ "KXORWrr\0" |
| 57267 | /* 192562 */ "VPINSRWrr\0" |
| 57268 | /* 192572 */ "MMX_PINSRWrr\0" |
| 57269 | /* 192585 */ "VPEXTRWrr\0" |
| 57270 | /* 192595 */ "MMX_PEXTRWrr\0" |
| 57271 | /* 192608 */ "VPABSWrr\0" |
| 57272 | /* 192617 */ "MMX_PABSWrr\0" |
| 57273 | /* 192629 */ "VPMADDUBSWrr\0" |
| 57274 | /* 192642 */ "MMX_PMADDUBSWrr\0" |
| 57275 | /* 192658 */ "VPHSUBSWrr\0" |
| 57276 | /* 192669 */ "MMX_PHSUBSWrr\0" |
| 57277 | /* 192683 */ "VPSUBSWrr\0" |
| 57278 | /* 192693 */ "MMX_PSUBSWrr\0" |
| 57279 | /* 192706 */ "VPHADDSWrr\0" |
| 57280 | /* 192717 */ "MMX_PHADDSWrr\0" |
| 57281 | /* 192731 */ "VPADDSWrr\0" |
| 57282 | /* 192741 */ "MMX_PADDSWrr\0" |
| 57283 | /* 192754 */ "VPMINSWrr\0" |
| 57284 | /* 192764 */ "MMX_PMINSWrr\0" |
| 57285 | /* 192777 */ "VPMULHRSWrr\0" |
| 57286 | /* 192789 */ "MMX_PMULHRSWrr\0" |
| 57287 | /* 192804 */ "VPSUBUSWrr\0" |
| 57288 | /* 192815 */ "MMX_PSUBUSWrr\0" |
| 57289 | /* 192829 */ "VPADDUSWrr\0" |
| 57290 | /* 192840 */ "MMX_PADDUSWrr\0" |
| 57291 | /* 192854 */ "VPMAXSWrr\0" |
| 57292 | /* 192864 */ "MMX_PMAXSWrr\0" |
| 57293 | /* 192877 */ "VPCMPGTWrr\0" |
| 57294 | /* 192888 */ "MMX_PCMPGTWrr\0" |
| 57295 | /* 192902 */ "KNOTWrr\0" |
| 57296 | /* 192910 */ "VPROTWrr\0" |
| 57297 | /* 192919 */ "VPBROADCASTWrr\0" |
| 57298 | /* 192934 */ "KTESTWrr\0" |
| 57299 | /* 192943 */ "KORTESTWrr\0" |
| 57300 | /* 192954 */ "VPMULHUWrr\0" |
| 57301 | /* 192965 */ "MMX_PMULHUWrr\0" |
| 57302 | /* 192979 */ "VPMINUWrr\0" |
| 57303 | /* 192989 */ "VPHMINPOSUWrr\0" |
| 57304 | /* 193003 */ "VPMAXUWrr\0" |
| 57305 | /* 193013 */ "VPMACSWWrr\0" |
| 57306 | /* 193024 */ "VPMACSSWWrr\0" |
| 57307 | /* 193036 */ "PFMAXrr\0" |
| 57308 | /* 193044 */ "VFMADDSUBPD4Yrr\0" |
| 57309 | /* 193060 */ "VFMSUBPD4Yrr\0" |
| 57310 | /* 193073 */ "VFNMSUBPD4Yrr\0" |
| 57311 | /* 193087 */ "VFMSUBADDPD4Yrr\0" |
| 57312 | /* 193103 */ "VFMADDPD4Yrr\0" |
| 57313 | /* 193116 */ "VFNMADDPD4Yrr\0" |
| 57314 | /* 193130 */ "VSM4RNDS4Yrr\0" |
| 57315 | /* 193143 */ "VFMADDSUBPS4Yrr\0" |
| 57316 | /* 193159 */ "VFMSUBPS4Yrr\0" |
| 57317 | /* 193172 */ "VFNMSUBPS4Yrr\0" |
| 57318 | /* 193186 */ "VFMSUBADDPS4Yrr\0" |
| 57319 | /* 193202 */ "VFMADDPS4Yrr\0" |
| 57320 | /* 193215 */ "VFNMADDPS4Yrr\0" |
| 57321 | /* 193229 */ "VSM4KEY4Yrr\0" |
| 57322 | /* 193241 */ "VCVTNEPS2BF16Yrr\0" |
| 57323 | /* 193258 */ "VMOVDQAYrr\0" |
| 57324 | /* 193269 */ "VPSUBBYrr\0" |
| 57325 | /* 193279 */ "VPADDBYrr\0" |
| 57326 | /* 193289 */ "VPSHUFBYrr\0" |
| 57327 | /* 193300 */ "VPAVGBYrr\0" |
| 57328 | /* 193310 */ "VPMOVMSKBYrr\0" |
| 57329 | /* 193323 */ "VGF2P8MULBYrr\0" |
| 57330 | /* 193337 */ "VPSIGNBYrr\0" |
| 57331 | /* 193348 */ "VPCMPEQBYrr\0" |
| 57332 | /* 193360 */ "VPABSBYrr\0" |
| 57333 | /* 193370 */ "VPSUBSBYrr\0" |
| 57334 | /* 193381 */ "VPADDSBYrr\0" |
| 57335 | /* 193392 */ "VPMINSBYrr\0" |
| 57336 | /* 193403 */ "VPSUBUSBYrr\0" |
| 57337 | /* 193415 */ "VPADDUSBYrr\0" |
| 57338 | /* 193427 */ "VPMAXSBYrr\0" |
| 57339 | /* 193438 */ "VPCMPGTBYrr\0" |
| 57340 | /* 193450 */ "VPBROADCASTBYrr\0" |
| 57341 | /* 193466 */ "VPMINUBYrr\0" |
| 57342 | /* 193477 */ "VPMAXUBYrr\0" |
| 57343 | /* 193488 */ "VPACKSSWBYrr\0" |
| 57344 | /* 193501 */ "VPACKUSWBYrr\0" |
| 57345 | /* 193514 */ "VAESDECYrr\0" |
| 57346 | /* 193525 */ "VAESENCYrr\0" |
| 57347 | /* 193536 */ "VPSRADYrr\0" |
| 57348 | /* 193546 */ "VPHSUBDYrr\0" |
| 57349 | /* 193557 */ "VPSUBDYrr\0" |
| 57350 | /* 193567 */ "VPMOVSXBDYrr\0" |
| 57351 | /* 193580 */ "VPMOVZXBDYrr\0" |
| 57352 | /* 193593 */ "VPHADDDYrr\0" |
| 57353 | /* 193604 */ "VPADDDYrr\0" |
| 57354 | /* 193614 */ "VPSLLDYrr\0" |
| 57355 | /* 193624 */ "VPMULLDYrr\0" |
| 57356 | /* 193635 */ "VPSRLDYrr\0" |
| 57357 | /* 193645 */ "VPERMDYrr\0" |
| 57358 | /* 193655 */ "VPANDYrr\0" |
| 57359 | /* 193664 */ "VPSIGNDYrr\0" |
| 57360 | /* 193675 */ "VPERMIL2PDYrr\0" |
| 57361 | /* 193689 */ "VCVTDQ2PDYrr\0" |
| 57362 | /* 193702 */ "VCVTPS2PDYrr\0" |
| 57363 | /* 193715 */ "VMOVAPDYrr\0" |
| 57364 | /* 193726 */ "VADDSUBPDYrr\0" |
| 57365 | /* 193739 */ "VHSUBPDYrr\0" |
| 57366 | /* 193750 */ "VSUBPDYrr\0" |
| 57367 | /* 193760 */ "VMINCPDYrr\0" |
| 57368 | /* 193771 */ "VMAXCPDYrr\0" |
| 57369 | /* 193782 */ "VHADDPDYrr\0" |
| 57370 | /* 193793 */ "VADDPDYrr\0" |
| 57371 | /* 193803 */ "VANDPDYrr\0" |
| 57372 | /* 193813 */ "VUNPCKHPDYrr\0" |
| 57373 | /* 193826 */ "VMOVMSKPDYrr\0" |
| 57374 | /* 193839 */ "VPERMILPDYrr\0" |
| 57375 | /* 193852 */ "VUNPCKLPDYrr\0" |
| 57376 | /* 193865 */ "VMULPDYrr\0" |
| 57377 | /* 193875 */ "VANDNPDYrr\0" |
| 57378 | /* 193886 */ "VMINPDYrr\0" |
| 57379 | /* 193896 */ "VORPDYrr\0" |
| 57380 | /* 193905 */ "VXORPDYrr\0" |
| 57381 | /* 193915 */ "VTESTPDYrr\0" |
| 57382 | /* 193926 */ "VMOVUPDYrr\0" |
| 57383 | /* 193937 */ "VDIVPDYrr\0" |
| 57384 | /* 193947 */ "VMAXPDYrr\0" |
| 57385 | /* 193957 */ "VFRCZPDYrr\0" |
| 57386 | /* 193968 */ "VPCMPEQDYrr\0" |
| 57387 | /* 193980 */ "VPABSDYrr\0" |
| 57388 | /* 193990 */ "VPMINSDYrr\0" |
| 57389 | /* 194001 */ "VPDPBSSDYrr\0" |
| 57390 | /* 194013 */ "VPDPWSSDYrr\0" |
| 57391 | /* 194025 */ "VBROADCASTSDYrr\0" |
| 57392 | /* 194041 */ "VPDPBUSDYrr\0" |
| 57393 | /* 194053 */ "VPDPWUSDYrr\0" |
| 57394 | /* 194065 */ "VPMAXSDYrr\0" |
| 57395 | /* 194076 */ "VPCMPGTDYrr\0" |
| 57396 | /* 194088 */ "VPBROADCASTDYrr\0" |
| 57397 | /* 194104 */ "VPMINUDYrr\0" |
| 57398 | /* 194115 */ "VPDPBSUDYrr\0" |
| 57399 | /* 194127 */ "VPDPWSUDYrr\0" |
| 57400 | /* 194139 */ "VPDPBUUDYrr\0" |
| 57401 | /* 194151 */ "VPDPWUUDYrr\0" |
| 57402 | /* 194163 */ "VPMAXUDYrr\0" |
| 57403 | /* 194174 */ "VPSRAVDYrr\0" |
| 57404 | /* 194185 */ "VPSLLVDYrr\0" |
| 57405 | /* 194196 */ "VPSRLVDYrr\0" |
| 57406 | /* 194207 */ "VPMADDWDYrr\0" |
| 57407 | /* 194219 */ "VPUNPCKHWDYrr\0" |
| 57408 | /* 194233 */ "VPUNPCKLWDYrr\0" |
| 57409 | /* 194247 */ "VPMOVSXWDYrr\0" |
| 57410 | /* 194260 */ "VPMOVZXWDYrr\0" |
| 57411 | /* 194273 */ "VCVTPS2PHYrr\0" |
| 57412 | /* 194286 */ "VPANDNYrr\0" |
| 57413 | /* 194296 */ "VMOVDDUPYrr\0" |
| 57414 | /* 194308 */ "VMOVSHDUPYrr\0" |
| 57415 | /* 194321 */ "VMOVSLDUPYrr\0" |
| 57416 | /* 194334 */ "VPSUBQYrr\0" |
| 57417 | /* 194344 */ "VPMOVSXBQYrr\0" |
| 57418 | /* 194357 */ "VPMOVZXBQYrr\0" |
| 57419 | /* 194370 */ "VCVTTPD2DQYrr\0" |
| 57420 | /* 194384 */ "VCVTPD2DQYrr\0" |
| 57421 | /* 194397 */ "VCVTTPS2DQYrr\0" |
| 57422 | /* 194411 */ "VCVTPS2DQYrr\0" |
| 57423 | /* 194424 */ "VPADDQYrr\0" |
| 57424 | /* 194434 */ "VPUNPCKHDQYrr\0" |
| 57425 | /* 194448 */ "VPUNPCKLDQYrr\0" |
| 57426 | /* 194462 */ "VPMULDQYrr\0" |
| 57427 | /* 194473 */ "VPUNPCKHQDQYrr\0" |
| 57428 | /* 194488 */ "VPUNPCKLQDQYrr\0" |
| 57429 | /* 194503 */ "VPMULUDQYrr\0" |
| 57430 | /* 194515 */ "VPMOVSXDQYrr\0" |
| 57431 | /* 194528 */ "VPMOVZXDQYrr\0" |
| 57432 | /* 194541 */ "VPSLLQYrr\0" |
| 57433 | /* 194551 */ "VPSRLQYrr\0" |
| 57434 | /* 194561 */ "VPCMPEQQYrr\0" |
| 57435 | /* 194573 */ "VPCMPGTQYrr\0" |
| 57436 | /* 194585 */ "VPBROADCASTQYrr\0" |
| 57437 | /* 194601 */ "VPMADD52HUQYrr\0" |
| 57438 | /* 194616 */ "VPMADD52LUQYrr\0" |
| 57439 | /* 194631 */ "VPSLLVQYrr\0" |
| 57440 | /* 194642 */ "VPSRLVQYrr\0" |
| 57441 | /* 194653 */ "VPMOVSXWQYrr\0" |
| 57442 | /* 194666 */ "VPMOVZXWQYrr\0" |
| 57443 | /* 194679 */ "VPORYrr\0" |
| 57444 | /* 194687 */ "VPXORYrr\0" |
| 57445 | /* 194696 */ "VPDPBSSDSYrr\0" |
| 57446 | /* 194709 */ "VPDPWSSDSYrr\0" |
| 57447 | /* 194722 */ "VPDPBUSDSYrr\0" |
| 57448 | /* 194735 */ "VPDPWUSDSYrr\0" |
| 57449 | /* 194748 */ "VPDPBSUDSYrr\0" |
| 57450 | /* 194761 */ "VPDPWSUDSYrr\0" |
| 57451 | /* 194774 */ "VPDPBUUDSYrr\0" |
| 57452 | /* 194787 */ "VPDPWUUDSYrr\0" |
| 57453 | /* 194800 */ "VCVTPD2PSYrr\0" |
| 57454 | /* 194813 */ "VCVTPH2PSYrr\0" |
| 57455 | /* 194826 */ "VPERMIL2PSYrr\0" |
| 57456 | /* 194840 */ "VCVTDQ2PSYrr\0" |
| 57457 | /* 194853 */ "VMOVAPSYrr\0" |
| 57458 | /* 194864 */ "VADDSUBPSYrr\0" |
| 57459 | /* 194877 */ "VHSUBPSYrr\0" |
| 57460 | /* 194888 */ "VSUBPSYrr\0" |
| 57461 | /* 194898 */ "VMINCPSYrr\0" |
| 57462 | /* 194909 */ "VMAXCPSYrr\0" |
| 57463 | /* 194920 */ "VHADDPSYrr\0" |
| 57464 | /* 194931 */ "VADDPSYrr\0" |
| 57465 | /* 194941 */ "VANDPSYrr\0" |
| 57466 | /* 194951 */ "VUNPCKHPSYrr\0" |
| 57467 | /* 194964 */ "VMOVMSKPSYrr\0" |
| 57468 | /* 194977 */ "VPERMILPSYrr\0" |
| 57469 | /* 194990 */ "VUNPCKLPSYrr\0" |
| 57470 | /* 195003 */ "VMULPSYrr\0" |
| 57471 | /* 195013 */ "VPERMPSYrr\0" |
| 57472 | /* 195024 */ "VANDNPSYrr\0" |
| 57473 | /* 195035 */ "VMINPSYrr\0" |
| 57474 | /* 195045 */ "VORPSYrr\0" |
| 57475 | /* 195054 */ "VXORPSYrr\0" |
| 57476 | /* 195064 */ "VTESTPSYrr\0" |
| 57477 | /* 195075 */ "VMOVUPSYrr\0" |
| 57478 | /* 195086 */ "VDIVPSYrr\0" |
| 57479 | /* 195096 */ "VMAXPSYrr\0" |
| 57480 | /* 195106 */ "VFRCZPSYrr\0" |
| 57481 | /* 195117 */ "VBROADCASTSSYrr\0" |
| 57482 | /* 195133 */ "VAESDECLASTYrr\0" |
| 57483 | /* 195148 */ "VAESENCLASTYrr\0" |
| 57484 | /* 195163 */ "VPTESTYrr\0" |
| 57485 | /* 195173 */ "VMOVDQUYrr\0" |
| 57486 | /* 195184 */ "VPSRAWYrr\0" |
| 57487 | /* 195194 */ "VPSADBWYrr\0" |
| 57488 | /* 195205 */ "VPUNPCKHBWYrr\0" |
| 57489 | /* 195219 */ "VPUNPCKLBWYrr\0" |
| 57490 | /* 195233 */ "VPHSUBWYrr\0" |
| 57491 | /* 195244 */ "VPSUBWYrr\0" |
| 57492 | /* 195254 */ "VPMOVSXBWYrr\0" |
| 57493 | /* 195267 */ "VPMOVZXBWYrr\0" |
| 57494 | /* 195280 */ "VPHADDWYrr\0" |
| 57495 | /* 195291 */ "VPADDWYrr\0" |
| 57496 | /* 195301 */ "VPACKSSDWYrr\0" |
| 57497 | /* 195314 */ "VPACKUSDWYrr\0" |
| 57498 | /* 195327 */ "VPAVGWYrr\0" |
| 57499 | /* 195337 */ "VPMULHWYrr\0" |
| 57500 | /* 195348 */ "VPSLLWYrr\0" |
| 57501 | /* 195358 */ "VPMULLWYrr\0" |
| 57502 | /* 195369 */ "VPSRLWYrr\0" |
| 57503 | /* 195379 */ "VPSIGNWYrr\0" |
| 57504 | /* 195390 */ "VPCMPEQWYrr\0" |
| 57505 | /* 195402 */ "VPABSWYrr\0" |
| 57506 | /* 195412 */ "VPMADDUBSWYrr\0" |
| 57507 | /* 195426 */ "VPHSUBSWYrr\0" |
| 57508 | /* 195438 */ "VPSUBSWYrr\0" |
| 57509 | /* 195449 */ "VPHADDSWYrr\0" |
| 57510 | /* 195461 */ "VPADDSWYrr\0" |
| 57511 | /* 195472 */ "VPMINSWYrr\0" |
| 57512 | /* 195483 */ "VPMULHRSWYrr\0" |
| 57513 | /* 195496 */ "VPSUBUSWYrr\0" |
| 57514 | /* 195508 */ "VPADDUSWYrr\0" |
| 57515 | /* 195520 */ "VPMAXSWYrr\0" |
| 57516 | /* 195531 */ "VPCMPGTWYrr\0" |
| 57517 | /* 195543 */ "VPBROADCASTWYrr\0" |
| 57518 | /* 195559 */ "VPMULHUWYrr\0" |
| 57519 | /* 195571 */ "VPMINUWYrr\0" |
| 57520 | /* 195582 */ "VPMAXUWYrr\0" |
| 57521 | /* 195593 */ "VMOVDQA32Zrr\0" |
| 57522 | /* 195606 */ "VMOVDQU32Zrr\0" |
| 57523 | /* 195619 */ "VBROADCASTF32X2Zrr\0" |
| 57524 | /* 195638 */ "VBROADCASTI32X2Zrr\0" |
| 57525 | /* 195657 */ "VEXTRACTF64x2Zrr\0" |
| 57526 | /* 195674 */ "VINSERTF64x2Zrr\0" |
| 57527 | /* 195690 */ "VEXTRACTI64x2Zrr\0" |
| 57528 | /* 195707 */ "VINSERTI64x2Zrr\0" |
| 57529 | /* 195723 */ "VMOVDQA64Zrr\0" |
| 57530 | /* 195736 */ "VCVTTSD2SI64Zrr\0" |
| 57531 | /* 195752 */ "VCVTSD2SI64Zrr\0" |
| 57532 | /* 195767 */ "VCVTTSH2SI64Zrr\0" |
| 57533 | /* 195783 */ "VCVTTSS2SI64Zrr\0" |
| 57534 | /* 195799 */ "VCVTSS2SI64Zrr\0" |
| 57535 | /* 195814 */ "VCVTTSD2USI64Zrr\0" |
| 57536 | /* 195831 */ "VCVTTSH2USI64Zrr\0" |
| 57537 | /* 195848 */ "VCVTTSS2USI64Zrr\0" |
| 57538 | /* 195865 */ "VMOVDQU64Zrr\0" |
| 57539 | /* 195878 */ "VMOVSDto64Zrr\0" |
| 57540 | /* 195892 */ "VMOVPQIto64Zrr\0" |
| 57541 | /* 195907 */ "VEXTRACTF32x4Zrr\0" |
| 57542 | /* 195924 */ "VINSERTF32x4Zrr\0" |
| 57543 | /* 195940 */ "VEXTRACTI32x4Zrr\0" |
| 57544 | /* 195957 */ "VINSERTI32x4Zrr\0" |
| 57545 | /* 195973 */ "VEXTRACTF64x4Zrr\0" |
| 57546 | /* 195990 */ "VINSERTF64x4Zrr\0" |
| 57547 | /* 196006 */ "VEXTRACTI64x4Zrr\0" |
| 57548 | /* 196023 */ "VINSERTI64x4Zrr\0" |
| 57549 | /* 196039 */ "VCVTNE2PS2BF16Zrr\0" |
| 57550 | /* 196057 */ "VCVTNEPS2BF16Zrr\0" |
| 57551 | /* 196074 */ "VMOVDQU16Zrr\0" |
| 57552 | /* 196087 */ "VMOVDQU8Zrr\0" |
| 57553 | /* 196099 */ "VEXTRACTF32x8Zrr\0" |
| 57554 | /* 196116 */ "VINSERTF32x8Zrr\0" |
| 57555 | /* 196132 */ "VEXTRACTI32x8Zrr\0" |
| 57556 | /* 196149 */ "VINSERTI32x8Zrr\0" |
| 57557 | /* 196165 */ "VPERMI2BZrr\0" |
| 57558 | /* 196177 */ "VPMOVM2BZrr\0" |
| 57559 | /* 196189 */ "VPERMT2BZrr\0" |
| 57560 | /* 196201 */ "VPSUBBZrr\0" |
| 57561 | /* 196211 */ "VPADDBZrr\0" |
| 57562 | /* 196221 */ "VPEXPANDBZrr\0" |
| 57563 | /* 196234 */ "VPMOVUSDBZrr\0" |
| 57564 | /* 196247 */ "VPMOVSDBZrr\0" |
| 57565 | /* 196259 */ "VPMOVDBZrr\0" |
| 57566 | /* 196270 */ "VPSHUFBZrr\0" |
| 57567 | /* 196281 */ "VPAVGBZrr\0" |
| 57568 | /* 196291 */ "VGF2P8MULBZrr\0" |
| 57569 | /* 196305 */ "VPBLENDMBZrr\0" |
| 57570 | /* 196318 */ "VPTESTNMBZrr\0" |
| 57571 | /* 196331 */ "VPSHUFBITQMBZrr\0" |
| 57572 | /* 196347 */ "VPERMBZrr\0" |
| 57573 | /* 196357 */ "VPTESTMBZrr\0" |
| 57574 | /* 196369 */ "VPCMPEQBZrr\0" |
| 57575 | /* 196381 */ "VPMOVUSQBZrr\0" |
| 57576 | /* 196394 */ "VPMOVSQBZrr\0" |
| 57577 | /* 196406 */ "VPMULTISHIFTQBZrr\0" |
| 57578 | /* 196424 */ "VPMOVQBZrr\0" |
| 57579 | /* 196435 */ "VPINSRBZrr\0" |
| 57580 | /* 196446 */ "VPEXTRBZrr\0" |
| 57581 | /* 196457 */ "VPABSBZrr\0" |
| 57582 | /* 196467 */ "VPSUBSBZrr\0" |
| 57583 | /* 196478 */ "VPADDSBZrr\0" |
| 57584 | /* 196489 */ "VPMINSBZrr\0" |
| 57585 | /* 196500 */ "VPCOMPRESSBZrr\0" |
| 57586 | /* 196515 */ "VPSUBUSBZrr\0" |
| 57587 | /* 196527 */ "VPADDUSBZrr\0" |
| 57588 | /* 196539 */ "VPMAXSBZrr\0" |
| 57589 | /* 196550 */ "VPCMPGTBZrr\0" |
| 57590 | /* 196562 */ "VPOPCNTBZrr\0" |
| 57591 | /* 196574 */ "VPBROADCASTBZrr\0" |
| 57592 | /* 196590 */ "VPMINUBZrr\0" |
| 57593 | /* 196601 */ "VPMAXUBZrr\0" |
| 57594 | /* 196612 */ "VPACKSSWBZrr\0" |
| 57595 | /* 196625 */ "VPACKUSWBZrr\0" |
| 57596 | /* 196638 */ "VPMOVUSWBZrr\0" |
| 57597 | /* 196651 */ "VPMOVSWBZrr\0" |
| 57598 | /* 196663 */ "VPMOVWBZrr\0" |
| 57599 | /* 196674 */ "VAESDECZrr\0" |
| 57600 | /* 196685 */ "VAESENCZrr\0" |
| 57601 | /* 196696 */ "VPERMI2DZrr\0" |
| 57602 | /* 196708 */ "VPMOVM2DZrr\0" |
| 57603 | /* 196720 */ "VPERMT2DZrr\0" |
| 57604 | /* 196732 */ "VPBROADCASTMW2DZrr\0" |
| 57605 | /* 196751 */ "VPSRADZrr\0" |
| 57606 | /* 196761 */ "VPSUBDZrr\0" |
| 57607 | /* 196771 */ "VPMOVSXBDZrr\0" |
| 57608 | /* 196784 */ "VPMOVZXBDZrr\0" |
| 57609 | /* 196797 */ "VPADDDZrr\0" |
| 57610 | /* 196807 */ "VPANDDZrr\0" |
| 57611 | /* 196817 */ "VPEXPANDDZrr\0" |
| 57612 | /* 196830 */ "VPSLLDZrr\0" |
| 57613 | /* 196840 */ "VPMULLDZrr\0" |
| 57614 | /* 196851 */ "VPSRLDZrr\0" |
| 57615 | /* 196861 */ "VPBLENDMDZrr\0" |
| 57616 | /* 196874 */ "VPTESTNMDZrr\0" |
| 57617 | /* 196887 */ "VPERMDZrr\0" |
| 57618 | /* 196897 */ "VPTESTMDZrr\0" |
| 57619 | /* 196909 */ "VPANDNDZrr\0" |
| 57620 | /* 196920 */ "VCVTPH2PDZrr\0" |
| 57621 | /* 196933 */ "VPERMI2PDZrr\0" |
| 57622 | /* 196946 */ "VCVTDQ2PDZrr\0" |
| 57623 | /* 196959 */ "VCVTUDQ2PDZrr\0" |
| 57624 | /* 196973 */ "VCVTQQ2PDZrr\0" |
| 57625 | /* 196986 */ "VCVTUQQ2PDZrr\0" |
| 57626 | /* 197000 */ "VCVTPS2PDZrr\0" |
| 57627 | /* 197013 */ "VPERMT2PDZrr\0" |
| 57628 | /* 197026 */ "VMOVAPDZrr\0" |
| 57629 | /* 197037 */ "VSUBPDZrr\0" |
| 57630 | /* 197047 */ "VMINCPDZrr\0" |
| 57631 | /* 197058 */ "VMAXCPDZrr\0" |
| 57632 | /* 197069 */ "VADDPDZrr\0" |
| 57633 | /* 197079 */ "VEXPANDPDZrr\0" |
| 57634 | /* 197092 */ "VANDPDZrr\0" |
| 57635 | /* 197102 */ "VSCALEFPDZrr\0" |
| 57636 | /* 197115 */ "VUNPCKHPDZrr\0" |
| 57637 | /* 197128 */ "VPERMILPDZrr\0" |
| 57638 | /* 197141 */ "VUNPCKLPDZrr\0" |
| 57639 | /* 197154 */ "VMULPDZrr\0" |
| 57640 | /* 197164 */ "VBLENDMPDZrr\0" |
| 57641 | /* 197177 */ "VPERMPDZrr\0" |
| 57642 | /* 197188 */ "VANDNPDZrr\0" |
| 57643 | /* 197199 */ "VMINPDZrr\0" |
| 57644 | /* 197209 */ "VORPDZrr\0" |
| 57645 | /* 197218 */ "VXORPDZrr\0" |
| 57646 | /* 197228 */ "VFPCLASSPDZrr\0" |
| 57647 | /* 197242 */ "VCOMPRESSPDZrr\0" |
| 57648 | /* 197257 */ "VMOVUPDZrr\0" |
| 57649 | /* 197268 */ "VDIVPDZrr\0" |
| 57650 | /* 197278 */ "VMAXPDZrr\0" |
| 57651 | /* 197288 */ "VPCMPEQDZrr\0" |
| 57652 | /* 197300 */ "VPMOVUSQDZrr\0" |
| 57653 | /* 197313 */ "VPMOVSQDZrr\0" |
| 57654 | /* 197325 */ "VPMOVQDZrr\0" |
| 57655 | /* 197336 */ "VPORDZrr\0" |
| 57656 | /* 197345 */ "VPXORDZrr\0" |
| 57657 | /* 197355 */ "VPINSRDZrr\0" |
| 57658 | /* 197366 */ "VPEXTRDZrr\0" |
| 57659 | /* 197377 */ "VCVTSI642SDZrr\0" |
| 57660 | /* 197392 */ "VCVTUSI642SDZrr\0" |
| 57661 | /* 197408 */ "VCVTSH2SDZrr\0" |
| 57662 | /* 197421 */ "VCVTSI2SDZrr\0" |
| 57663 | /* 197434 */ "VCVTUSI2SDZrr\0" |
| 57664 | /* 197448 */ "VCVTSS2SDZrr\0" |
| 57665 | /* 197461 */ "VRCP14SDZrr\0" |
| 57666 | /* 197473 */ "VRSQRT14SDZrr\0" |
| 57667 | /* 197487 */ "VPABSDZrr\0" |
| 57668 | /* 197497 */ "VSUBSDZrr\0" |
| 57669 | /* 197507 */ "VMINCSDZrr\0" |
| 57670 | /* 197518 */ "VMAXCSDZrr\0" |
| 57671 | /* 197529 */ "VADDSDZrr\0" |
| 57672 | /* 197539 */ "VSCALEFSDZrr\0" |
| 57673 | /* 197552 */ "VUCOMISDZrr\0" |
| 57674 | /* 197564 */ "VCOMISDZrr\0" |
| 57675 | /* 197575 */ "VMULSDZrr\0" |
| 57676 | /* 197585 */ "VPMINSDZrr\0" |
| 57677 | /* 197596 */ "VMINSDZrr\0" |
| 57678 | /* 197606 */ "VPCOMPRESSDZrr\0" |
| 57679 | /* 197621 */ "VFPCLASSSDZrr\0" |
| 57680 | /* 197635 */ "VBROADCASTSDZrr\0" |
| 57681 | /* 197651 */ "VDIVSDZrr\0" |
| 57682 | /* 197661 */ "VMOVSDZrr\0" |
| 57683 | /* 197671 */ "VPMAXSDZrr\0" |
| 57684 | /* 197682 */ "VMAXSDZrr\0" |
| 57685 | /* 197692 */ "VMOV64toSDZrr\0" |
| 57686 | /* 197706 */ "VP2INTERSECTDZrr\0" |
| 57687 | /* 197723 */ "VPCONFLICTDZrr\0" |
| 57688 | /* 197738 */ "VPCMPGTDZrr\0" |
| 57689 | /* 197750 */ "VPOPCNTDZrr\0" |
| 57690 | /* 197762 */ "VPLZCNTDZrr\0" |
| 57691 | /* 197774 */ "VPBROADCASTDZrr\0" |
| 57692 | /* 197790 */ "VPMINUDZrr\0" |
| 57693 | /* 197801 */ "VPMAXUDZrr\0" |
| 57694 | /* 197812 */ "VPSRAVDZrr\0" |
| 57695 | /* 197823 */ "VPSLLVDZrr\0" |
| 57696 | /* 197834 */ "VPROLVDZrr\0" |
| 57697 | /* 197845 */ "VPSRLVDZrr\0" |
| 57698 | /* 197856 */ "VPRORVDZrr\0" |
| 57699 | /* 197867 */ "VPMADDWDZrr\0" |
| 57700 | /* 197879 */ "VPUNPCKHWDZrr\0" |
| 57701 | /* 197893 */ "VPUNPCKLWDZrr\0" |
| 57702 | /* 197907 */ "VPMOVSXWDZrr\0" |
| 57703 | /* 197920 */ "VPMOVZXWDZrr\0" |
| 57704 | /* 197933 */ "VCVTPD2PHZrr\0" |
| 57705 | /* 197946 */ "VCVTDQ2PHZrr\0" |
| 57706 | /* 197959 */ "VCVTUDQ2PHZrr\0" |
| 57707 | /* 197973 */ "VCVTQQ2PHZrr\0" |
| 57708 | /* 197986 */ "VCVTUQQ2PHZrr\0" |
| 57709 | /* 198000 */ "VCVTPS2PHZrr\0" |
| 57710 | /* 198013 */ "VCVTW2PHZrr\0" |
| 57711 | /* 198025 */ "VCVTUW2PHZrr\0" |
| 57712 | /* 198038 */ "VSUBPHZrr\0" |
| 57713 | /* 198048 */ "VFCMULCPHZrr\0" |
| 57714 | /* 198061 */ "VFMULCPHZrr\0" |
| 57715 | /* 198073 */ "VMINCPHZrr\0" |
| 57716 | /* 198084 */ "VMAXCPHZrr\0" |
| 57717 | /* 198095 */ "VADDPHZrr\0" |
| 57718 | /* 198105 */ "VSCALEFPHZrr\0" |
| 57719 | /* 198118 */ "VMULPHZrr\0" |
| 57720 | /* 198128 */ "VMINPHZrr\0" |
| 57721 | /* 198138 */ "VFPCLASSPHZrr\0" |
| 57722 | /* 198152 */ "VDIVPHZrr\0" |
| 57723 | /* 198162 */ "VMAXPHZrr\0" |
| 57724 | /* 198172 */ "VCVTSI642SHZrr\0" |
| 57725 | /* 198187 */ "VCVTUSI642SHZrr\0" |
| 57726 | /* 198203 */ "VCVTSD2SHZrr\0" |
| 57727 | /* 198216 */ "VCVTSI2SHZrr\0" |
| 57728 | /* 198229 */ "VCVTUSI2SHZrr\0" |
| 57729 | /* 198243 */ "VCVTSS2SHZrr\0" |
| 57730 | /* 198256 */ "VSUBSHZrr\0" |
| 57731 | /* 198266 */ "VFCMULCSHZrr\0" |
| 57732 | /* 198279 */ "VFMULCSHZrr\0" |
| 57733 | /* 198291 */ "VMINCSHZrr\0" |
| 57734 | /* 198302 */ "VMAXCSHZrr\0" |
| 57735 | /* 198313 */ "VADDSHZrr\0" |
| 57736 | /* 198323 */ "VSCALEFSHZrr\0" |
| 57737 | /* 198336 */ "VUCOMISHZrr\0" |
| 57738 | /* 198348 */ "VCOMISHZrr\0" |
| 57739 | /* 198359 */ "VMULSHZrr\0" |
| 57740 | /* 198369 */ "VMINSHZrr\0" |
| 57741 | /* 198379 */ "VRCPSHZrr\0" |
| 57742 | /* 198389 */ "VFPCLASSSHZrr\0" |
| 57743 | /* 198403 */ "VRSQRTSHZrr\0" |
| 57744 | /* 198415 */ "VDIVSHZrr\0" |
| 57745 | /* 198425 */ "VMOVSHZrr\0" |
| 57746 | /* 198435 */ "VMAXSHZrr\0" |
| 57747 | /* 198445 */ "VMOVPDI2DIZrr\0" |
| 57748 | /* 198459 */ "VMOVSS2DIZrr\0" |
| 57749 | /* 198472 */ "VMOVDI2PDIZrr\0" |
| 57750 | /* 198486 */ "VMOVPQI2QIZrr\0" |
| 57751 | /* 198500 */ "VMOVZPQILo2PQIZrr\0" |
| 57752 | /* 198518 */ "VMOV64toPQIZrr\0" |
| 57753 | /* 198533 */ "VCVTTSD2SIZrr\0" |
| 57754 | /* 198547 */ "VCVTSD2SIZrr\0" |
| 57755 | /* 198560 */ "VCVTTSH2SIZrr\0" |
| 57756 | /* 198574 */ "VCVTTSS2SIZrr\0" |
| 57757 | /* 198588 */ "VCVTSS2SIZrr\0" |
| 57758 | /* 198601 */ "VCVTTSD2USIZrr\0" |
| 57759 | /* 198616 */ "VCVTTSH2USIZrr\0" |
| 57760 | /* 198631 */ "VCVTTSS2USIZrr\0" |
| 57761 | /* 198646 */ "VPMOVB2MZrr\0" |
| 57762 | /* 198658 */ "VPMOVD2MZrr\0" |
| 57763 | /* 198670 */ "VPMOVQ2MZrr\0" |
| 57764 | /* 198682 */ "VPMOVW2MZrr\0" |
| 57765 | /* 198694 */ "VMOVDDUPZrr\0" |
| 57766 | /* 198706 */ "VMOVSHDUPZrr\0" |
| 57767 | /* 198719 */ "VMOVSLDUPZrr\0" |
| 57768 | /* 198732 */ "VPBROADCASTMB2QZrr\0" |
| 57769 | /* 198751 */ "VPERMI2QZrr\0" |
| 57770 | /* 198763 */ "VPMOVM2QZrr\0" |
| 57771 | /* 198775 */ "VPERMT2QZrr\0" |
| 57772 | /* 198787 */ "VPSRAQZrr\0" |
| 57773 | /* 198797 */ "VPSUBQZrr\0" |
| 57774 | /* 198807 */ "VPMOVSXBQZrr\0" |
| 57775 | /* 198820 */ "VPMOVZXBQZrr\0" |
| 57776 | /* 198833 */ "VCVTTPD2DQZrr\0" |
| 57777 | /* 198847 */ "VCVTPD2DQZrr\0" |
| 57778 | /* 198860 */ "VCVTTPH2DQZrr\0" |
| 57779 | /* 198874 */ "VCVTPH2DQZrr\0" |
| 57780 | /* 198887 */ "VCVTTPS2DQZrr\0" |
| 57781 | /* 198901 */ "VCVTPS2DQZrr\0" |
| 57782 | /* 198914 */ "VPADDQZrr\0" |
| 57783 | /* 198924 */ "VPUNPCKHDQZrr\0" |
| 57784 | /* 198938 */ "VPUNPCKLDQZrr\0" |
| 57785 | /* 198952 */ "VPMULDQZrr\0" |
| 57786 | /* 198963 */ "VPANDQZrr\0" |
| 57787 | /* 198973 */ "VPEXPANDQZrr\0" |
| 57788 | /* 198986 */ "VPUNPCKHQDQZrr\0" |
| 57789 | /* 199001 */ "VPUNPCKLQDQZrr\0" |
| 57790 | /* 199016 */ "VCVTTPD2UDQZrr\0" |
| 57791 | /* 199031 */ "VCVTPD2UDQZrr\0" |
| 57792 | /* 199045 */ "VCVTTPH2UDQZrr\0" |
| 57793 | /* 199060 */ "VCVTPH2UDQZrr\0" |
| 57794 | /* 199074 */ "VCVTTPS2UDQZrr\0" |
| 57795 | /* 199089 */ "VCVTPS2UDQZrr\0" |
| 57796 | /* 199103 */ "VPMULUDQZrr\0" |
| 57797 | /* 199115 */ "VPMOVSXDQZrr\0" |
| 57798 | /* 199128 */ "VPMOVZXDQZrr\0" |
| 57799 | /* 199141 */ "VPSLLQZrr\0" |
| 57800 | /* 199151 */ "VPMULLQZrr\0" |
| 57801 | /* 199162 */ "VPSRLQZrr\0" |
| 57802 | /* 199172 */ "VPBLENDMQZrr\0" |
| 57803 | /* 199185 */ "VPTESTNMQZrr\0" |
| 57804 | /* 199198 */ "VPERMQZrr\0" |
| 57805 | /* 199208 */ "VPTESTMQZrr\0" |
| 57806 | /* 199220 */ "VPANDNQZrr\0" |
| 57807 | /* 199231 */ "VCVTTPD2QQZrr\0" |
| 57808 | /* 199245 */ "VCVTPD2QQZrr\0" |
| 57809 | /* 199258 */ "VCVTTPH2QQZrr\0" |
| 57810 | /* 199272 */ "VCVTPH2QQZrr\0" |
| 57811 | /* 199285 */ "VCVTTPS2QQZrr\0" |
| 57812 | /* 199299 */ "VCVTPS2QQZrr\0" |
| 57813 | /* 199312 */ "VPCMPEQQZrr\0" |
| 57814 | /* 199324 */ "VCVTTPD2UQQZrr\0" |
| 57815 | /* 199339 */ "VCVTPD2UQQZrr\0" |
| 57816 | /* 199353 */ "VCVTTPH2UQQZrr\0" |
| 57817 | /* 199368 */ "VCVTPH2UQQZrr\0" |
| 57818 | /* 199382 */ "VCVTTPS2UQQZrr\0" |
| 57819 | /* 199397 */ "VCVTPS2UQQZrr\0" |
| 57820 | /* 199411 */ "VPORQZrr\0" |
| 57821 | /* 199420 */ "VPXORQZrr\0" |
| 57822 | /* 199430 */ "VPINSRQZrr\0" |
| 57823 | /* 199441 */ "VPEXTRQZrr\0" |
| 57824 | /* 199452 */ "VPABSQZrr\0" |
| 57825 | /* 199462 */ "VPMINSQZrr\0" |
| 57826 | /* 199473 */ "VPCOMPRESSQZrr\0" |
| 57827 | /* 199488 */ "VPMAXSQZrr\0" |
| 57828 | /* 199499 */ "VP2INTERSECTQZrr\0" |
| 57829 | /* 199516 */ "VPCONFLICTQZrr\0" |
| 57830 | /* 199531 */ "VPCMPGTQZrr\0" |
| 57831 | /* 199543 */ "VPOPCNTQZrr\0" |
| 57832 | /* 199555 */ "VPLZCNTQZrr\0" |
| 57833 | /* 199567 */ "VPBROADCASTQZrr\0" |
| 57834 | /* 199583 */ "VPMINUQZrr\0" |
| 57835 | /* 199594 */ "VPMAXUQZrr\0" |
| 57836 | /* 199605 */ "VPSRAVQZrr\0" |
| 57837 | /* 199616 */ "VPSLLVQZrr\0" |
| 57838 | /* 199627 */ "VPROLVQZrr\0" |
| 57839 | /* 199638 */ "VPSRLVQZrr\0" |
| 57840 | /* 199649 */ "VPRORVQZrr\0" |
| 57841 | /* 199660 */ "VPMOVSXWQZrr\0" |
| 57842 | /* 199673 */ "VPMOVZXWQZrr\0" |
| 57843 | /* 199686 */ "VCVTPD2PSZrr\0" |
| 57844 | /* 199699 */ "VCVTPH2PSZrr\0" |
| 57845 | /* 199712 */ "VPERMI2PSZrr\0" |
| 57846 | /* 199725 */ "VCVTDQ2PSZrr\0" |
| 57847 | /* 199738 */ "VCVTUDQ2PSZrr\0" |
| 57848 | /* 199752 */ "VCVTQQ2PSZrr\0" |
| 57849 | /* 199765 */ "VCVTUQQ2PSZrr\0" |
| 57850 | /* 199779 */ "VPERMT2PSZrr\0" |
| 57851 | /* 199792 */ "VMOVAPSZrr\0" |
| 57852 | /* 199803 */ "VSUBPSZrr\0" |
| 57853 | /* 199813 */ "VMINCPSZrr\0" |
| 57854 | /* 199824 */ "VMAXCPSZrr\0" |
| 57855 | /* 199835 */ "VADDPSZrr\0" |
| 57856 | /* 199845 */ "VEXPANDPSZrr\0" |
| 57857 | /* 199858 */ "VANDPSZrr\0" |
| 57858 | /* 199868 */ "VSCALEFPSZrr\0" |
| 57859 | /* 199881 */ "VUNPCKHPSZrr\0" |
| 57860 | /* 199894 */ "VMOVLHPSZrr\0" |
| 57861 | /* 199906 */ "VMOVHLPSZrr\0" |
| 57862 | /* 199918 */ "VPERMILPSZrr\0" |
| 57863 | /* 199931 */ "VUNPCKLPSZrr\0" |
| 57864 | /* 199944 */ "VMULPSZrr\0" |
| 57865 | /* 199954 */ "VBLENDMPSZrr\0" |
| 57866 | /* 199967 */ "VPERMPSZrr\0" |
| 57867 | /* 199978 */ "VANDNPSZrr\0" |
| 57868 | /* 199989 */ "VMINPSZrr\0" |
| 57869 | /* 199999 */ "VORPSZrr\0" |
| 57870 | /* 200008 */ "VXORPSZrr\0" |
| 57871 | /* 200018 */ "VFPCLASSPSZrr\0" |
| 57872 | /* 200032 */ "VCOMPRESSPSZrr\0" |
| 57873 | /* 200047 */ "VEXTRACTPSZrr\0" |
| 57874 | /* 200061 */ "VINSERTPSZrr\0" |
| 57875 | /* 200074 */ "VMOVUPSZrr\0" |
| 57876 | /* 200085 */ "VDIVPSZrr\0" |
| 57877 | /* 200095 */ "VMAXPSZrr\0" |
| 57878 | /* 200105 */ "VCVTSI642SSZrr\0" |
| 57879 | /* 200120 */ "VCVTUSI642SSZrr\0" |
| 57880 | /* 200136 */ "VCVTSD2SSZrr\0" |
| 57881 | /* 200149 */ "VCVTSH2SSZrr\0" |
| 57882 | /* 200162 */ "VMOVDI2SSZrr\0" |
| 57883 | /* 200175 */ "VCVTSI2SSZrr\0" |
| 57884 | /* 200188 */ "VCVTUSI2SSZrr\0" |
| 57885 | /* 200202 */ "VRCP14SSZrr\0" |
| 57886 | /* 200214 */ "VRSQRT14SSZrr\0" |
| 57887 | /* 200228 */ "VSUBSSZrr\0" |
| 57888 | /* 200238 */ "VMINCSSZrr\0" |
| 57889 | /* 200249 */ "VMAXCSSZrr\0" |
| 57890 | /* 200260 */ "VADDSSZrr\0" |
| 57891 | /* 200270 */ "VSCALEFSSZrr\0" |
| 57892 | /* 200283 */ "VUCOMISSZrr\0" |
| 57893 | /* 200295 */ "VCOMISSZrr\0" |
| 57894 | /* 200306 */ "VMULSSZrr\0" |
| 57895 | /* 200316 */ "VMINSSZrr\0" |
| 57896 | /* 200326 */ "VFPCLASSSSZrr\0" |
| 57897 | /* 200340 */ "VBROADCASTSSZrr\0" |
| 57898 | /* 200356 */ "VDIVSSZrr\0" |
| 57899 | /* 200366 */ "VMOVSSZrr\0" |
| 57900 | /* 200376 */ "VMAXSSZrr\0" |
| 57901 | /* 200386 */ "VAESDECLASTZrr\0" |
| 57902 | /* 200401 */ "VAESENCLASTZrr\0" |
| 57903 | /* 200416 */ "VCVTTPH2WZrr\0" |
| 57904 | /* 200429 */ "VCVTPH2WZrr\0" |
| 57905 | /* 200441 */ "VPERMI2WZrr\0" |
| 57906 | /* 200453 */ "VPMOVM2WZrr\0" |
| 57907 | /* 200465 */ "VPERMT2WZrr\0" |
| 57908 | /* 200477 */ "VPSRAWZrr\0" |
| 57909 | /* 200487 */ "VPSADBWZrr\0" |
| 57910 | /* 200498 */ "VPUNPCKHBWZrr\0" |
| 57911 | /* 200512 */ "VPUNPCKLBWZrr\0" |
| 57912 | /* 200526 */ "VPSUBWZrr\0" |
| 57913 | /* 200536 */ "VPMOVSXBWZrr\0" |
| 57914 | /* 200549 */ "VPMOVZXBWZrr\0" |
| 57915 | /* 200562 */ "VPADDWZrr\0" |
| 57916 | /* 200572 */ "VPEXPANDWZrr\0" |
| 57917 | /* 200585 */ "VPACKSSDWZrr\0" |
| 57918 | /* 200598 */ "VPACKUSDWZrr\0" |
| 57919 | /* 200611 */ "VPMOVUSDWZrr\0" |
| 57920 | /* 200624 */ "VPMOVSDWZrr\0" |
| 57921 | /* 200636 */ "VPMOVDWZrr\0" |
| 57922 | /* 200647 */ "VPAVGWZrr\0" |
| 57923 | /* 200657 */ "VPMULHWZrr\0" |
| 57924 | /* 200668 */ "VPSLLWZrr\0" |
| 57925 | /* 200678 */ "VPMULLWZrr\0" |
| 57926 | /* 200689 */ "VPSRLWZrr\0" |
| 57927 | /* 200699 */ "VPBLENDMWZrr\0" |
| 57928 | /* 200712 */ "VPTESTNMWZrr\0" |
| 57929 | /* 200725 */ "VPERMWZrr\0" |
| 57930 | /* 200735 */ "VPTESTMWZrr\0" |
| 57931 | /* 200747 */ "VPCMPEQWZrr\0" |
| 57932 | /* 200759 */ "VPMOVUSQWZrr\0" |
| 57933 | /* 200772 */ "VPMOVSQWZrr\0" |
| 57934 | /* 200784 */ "VPMOVQWZrr\0" |
| 57935 | /* 200795 */ "VPINSRWZrr\0" |
| 57936 | /* 200806 */ "VPEXTRWZrr\0" |
| 57937 | /* 200817 */ "VPABSWZrr\0" |
| 57938 | /* 200827 */ "VPMADDUBSWZrr\0" |
| 57939 | /* 200841 */ "VPSUBSWZrr\0" |
| 57940 | /* 200852 */ "VPADDSWZrr\0" |
| 57941 | /* 200863 */ "VPMINSWZrr\0" |
| 57942 | /* 200874 */ "VPMULHRSWZrr\0" |
| 57943 | /* 200887 */ "VPCOMPRESSWZrr\0" |
| 57944 | /* 200902 */ "VPSUBUSWZrr\0" |
| 57945 | /* 200914 */ "VPADDUSWZrr\0" |
| 57946 | /* 200926 */ "VPMAXSWZrr\0" |
| 57947 | /* 200937 */ "VPCMPGTWZrr\0" |
| 57948 | /* 200949 */ "VPOPCNTWZrr\0" |
| 57949 | /* 200961 */ "VPBROADCASTWZrr\0" |
| 57950 | /* 200977 */ "VCVTTPH2UWZrr\0" |
| 57951 | /* 200991 */ "VCVTPH2UWZrr\0" |
| 57952 | /* 201004 */ "VPMULHUWZrr\0" |
| 57953 | /* 201016 */ "VPMINUWZrr\0" |
| 57954 | /* 201027 */ "VPMAXUWZrr\0" |
| 57955 | /* 201038 */ "VPSRAVWZrr\0" |
| 57956 | /* 201049 */ "VPSLLVWZrr\0" |
| 57957 | /* 201060 */ "VPSRLVWZrr\0" |
| 57958 | /* 201071 */ "VCVTPS2PHXZrr\0" |
| 57959 | /* 201085 */ "VCVTPH2PSXZrr\0" |
| 57960 | /* 201099 */ "VPBROADCASTBrZrr\0" |
| 57961 | /* 201116 */ "VPBROADCASTDrZrr\0" |
| 57962 | /* 201133 */ "VPBROADCASTQrZrr\0" |
| 57963 | /* 201150 */ "VPBROADCASTWrZrr\0" |
| 57964 | /* 201167 */ "MMX_MOVD64grr\0" |
| 57965 | /* 201181 */ "MONITOR32rrr\0" |
| 57966 | /* 201194 */ "MONITORX32rrr\0" |
| 57967 | /* 201208 */ "MONITOR64rrr\0" |
| 57968 | /* 201221 */ "MONITORX64rrr\0" |
| 57969 | /* 201235 */ "VPBLENDVBrrr\0" |
| 57970 | /* 201248 */ "VBLENDVPDrrr\0" |
| 57971 | /* 201261 */ "VPPERMrrr\0" |
| 57972 | /* 201271 */ "VBLENDVPSrrr\0" |
| 57973 | /* 201284 */ "VPCMOVrrr\0" |
| 57974 | /* 201294 */ "MWAITXrrr\0" |
| 57975 | /* 201304 */ "VPBLENDVBYrrr\0" |
| 57976 | /* 201318 */ "VBLENDVPDYrrr\0" |
| 57977 | /* 201332 */ "VBLENDVPSYrrr\0" |
| 57978 | /* 201346 */ "VPCMOVYrrr\0" |
| 57979 | /* 201357 */ "MOV32sr\0" |
| 57980 | /* 201365 */ "MOV64sr\0" |
| 57981 | /* 201373 */ "MOV16sr\0" |
| 57982 | /* 201381 */ "MOV16ms\0" |
| 57983 | /* 201389 */ "MOV32rs\0" |
| 57984 | /* 201397 */ "MOV64rs\0" |
| 57985 | /* 201405 */ "MOV16rs\0" |
| 57986 | /* 201413 */ "MOV32ri_alt\0" |
| 57987 | /* 201425 */ "MOV16ri_alt\0" |
| 57988 | /* 201437 */ "MOV8ri_alt\0" |
| 57989 | /* 201448 */ "VMOVSDrm_alt\0" |
| 57990 | /* 201461 */ "VMOVSSrm_alt\0" |
| 57991 | /* 201474 */ "VMOVSDZrm_alt\0" |
| 57992 | /* 201488 */ "VMOVSHZrm_alt\0" |
| 57993 | /* 201502 */ "VMOVSSZrm_alt\0" |
| 57994 | /* 201516 */ "DEC32r_alt\0" |
| 57995 | /* 201527 */ "INC32r_alt\0" |
| 57996 | /* 201538 */ "DEC16r_alt\0" |
| 57997 | /* 201549 */ "INC16r_alt\0" |
| 57998 | /* 201560 */ "VCMPSDZrrib_Int\0" |
| 57999 | /* 201576 */ "VCMPSHZrrib_Int\0" |
| 58000 | /* 201592 */ "VCMPSSZrrib_Int\0" |
| 58001 | /* 201608 */ "VFMSUB231SDZrb_Int\0" |
| 58002 | /* 201627 */ "VFNMSUB231SDZrb_Int\0" |
| 58003 | /* 201647 */ "VFMADD231SDZrb_Int\0" |
| 58004 | /* 201666 */ "VFNMADD231SDZrb_Int\0" |
| 58005 | /* 201686 */ "VFMSUB132SDZrb_Int\0" |
| 58006 | /* 201705 */ "VFNMSUB132SDZrb_Int\0" |
| 58007 | /* 201725 */ "VFMADD132SDZrb_Int\0" |
| 58008 | /* 201744 */ "VFNMADD132SDZrb_Int\0" |
| 58009 | /* 201764 */ "VFMSUB213SDZrb_Int\0" |
| 58010 | /* 201783 */ "VFNMSUB213SDZrb_Int\0" |
| 58011 | /* 201803 */ "VFMADD213SDZrb_Int\0" |
| 58012 | /* 201822 */ "VFNMADD213SDZrb_Int\0" |
| 58013 | /* 201842 */ "VRNDSCALESDZrb_Int\0" |
| 58014 | /* 201861 */ "VSQRTSDZrb_Int\0" |
| 58015 | /* 201876 */ "VFMSUB231SHZrb_Int\0" |
| 58016 | /* 201895 */ "VFNMSUB231SHZrb_Int\0" |
| 58017 | /* 201915 */ "VFMADD231SHZrb_Int\0" |
| 58018 | /* 201934 */ "VFNMADD231SHZrb_Int\0" |
| 58019 | /* 201954 */ "VFMSUB132SHZrb_Int\0" |
| 58020 | /* 201973 */ "VFNMSUB132SHZrb_Int\0" |
| 58021 | /* 201993 */ "VFMADD132SHZrb_Int\0" |
| 58022 | /* 202012 */ "VFNMADD132SHZrb_Int\0" |
| 58023 | /* 202032 */ "VFMSUB213SHZrb_Int\0" |
| 58024 | /* 202051 */ "VFNMSUB213SHZrb_Int\0" |
| 58025 | /* 202071 */ "VFMADD213SHZrb_Int\0" |
| 58026 | /* 202090 */ "VFNMADD213SHZrb_Int\0" |
| 58027 | /* 202110 */ "VRNDSCALESHZrb_Int\0" |
| 58028 | /* 202129 */ "VSQRTSHZrb_Int\0" |
| 58029 | /* 202144 */ "VFMSUB231SSZrb_Int\0" |
| 58030 | /* 202163 */ "VFNMSUB231SSZrb_Int\0" |
| 58031 | /* 202183 */ "VFMADD231SSZrb_Int\0" |
| 58032 | /* 202202 */ "VFNMADD231SSZrb_Int\0" |
| 58033 | /* 202222 */ "VFMSUB132SSZrb_Int\0" |
| 58034 | /* 202241 */ "VFNMSUB132SSZrb_Int\0" |
| 58035 | /* 202261 */ "VFMADD132SSZrb_Int\0" |
| 58036 | /* 202280 */ "VFNMADD132SSZrb_Int\0" |
| 58037 | /* 202300 */ "VFMSUB213SSZrb_Int\0" |
| 58038 | /* 202319 */ "VFNMSUB213SSZrb_Int\0" |
| 58039 | /* 202339 */ "VFMADD213SSZrb_Int\0" |
| 58040 | /* 202358 */ "VFNMADD213SSZrb_Int\0" |
| 58041 | /* 202378 */ "VRNDSCALESSZrb_Int\0" |
| 58042 | /* 202397 */ "VSQRTSSZrb_Int\0" |
| 58043 | /* 202412 */ "VCVTTSD2SI64Zrrb_Int\0" |
| 58044 | /* 202433 */ "VCVTSD2SI64Zrrb_Int\0" |
| 58045 | /* 202453 */ "VCVTTSH2SI64Zrrb_Int\0" |
| 58046 | /* 202474 */ "VCVTSH2SI64Zrrb_Int\0" |
| 58047 | /* 202494 */ "VCVTTSS2SI64Zrrb_Int\0" |
| 58048 | /* 202515 */ "VCVTSS2SI64Zrrb_Int\0" |
| 58049 | /* 202535 */ "VCVTTSD2USI64Zrrb_Int\0" |
| 58050 | /* 202557 */ "VCVTSD2USI64Zrrb_Int\0" |
| 58051 | /* 202578 */ "VCVTTSH2USI64Zrrb_Int\0" |
| 58052 | /* 202600 */ "VCVTSH2USI64Zrrb_Int\0" |
| 58053 | /* 202621 */ "VCVTTSS2USI64Zrrb_Int\0" |
| 58054 | /* 202643 */ "VCVTSS2USI64Zrrb_Int\0" |
| 58055 | /* 202664 */ "VCVTSI642SDZrrb_Int\0" |
| 58056 | /* 202684 */ "VCVTUSI642SDZrrb_Int\0" |
| 58057 | /* 202705 */ "VCVTSH2SDZrrb_Int\0" |
| 58058 | /* 202723 */ "VCVTSS2SDZrrb_Int\0" |
| 58059 | /* 202741 */ "VSUBSDZrrb_Int\0" |
| 58060 | /* 202756 */ "VADDSDZrrb_Int\0" |
| 58061 | /* 202771 */ "VSCALEFSDZrrb_Int\0" |
| 58062 | /* 202789 */ "VMULSDZrrb_Int\0" |
| 58063 | /* 202804 */ "VMINSDZrrb_Int\0" |
| 58064 | /* 202819 */ "VDIVSDZrrb_Int\0" |
| 58065 | /* 202834 */ "VMAXSDZrrb_Int\0" |
| 58066 | /* 202849 */ "VCVTSI642SHZrrb_Int\0" |
| 58067 | /* 202869 */ "VCVTUSI642SHZrrb_Int\0" |
| 58068 | /* 202890 */ "VCVTSD2SHZrrb_Int\0" |
| 58069 | /* 202908 */ "VCVTSI2SHZrrb_Int\0" |
| 58070 | /* 202926 */ "VCVTUSI2SHZrrb_Int\0" |
| 58071 | /* 202945 */ "VCVTSS2SHZrrb_Int\0" |
| 58072 | /* 202963 */ "VSUBSHZrrb_Int\0" |
| 58073 | /* 202978 */ "VADDSHZrrb_Int\0" |
| 58074 | /* 202993 */ "VSCALEFSHZrrb_Int\0" |
| 58075 | /* 203011 */ "VMULSHZrrb_Int\0" |
| 58076 | /* 203026 */ "VMINSHZrrb_Int\0" |
| 58077 | /* 203041 */ "VDIVSHZrrb_Int\0" |
| 58078 | /* 203056 */ "VMAXSHZrrb_Int\0" |
| 58079 | /* 203071 */ "VCVTTSD2SIZrrb_Int\0" |
| 58080 | /* 203090 */ "VCVTSD2SIZrrb_Int\0" |
| 58081 | /* 203108 */ "VCVTTSH2SIZrrb_Int\0" |
| 58082 | /* 203127 */ "VCVTSH2SIZrrb_Int\0" |
| 58083 | /* 203145 */ "VCVTTSS2SIZrrb_Int\0" |
| 58084 | /* 203164 */ "VCVTSS2SIZrrb_Int\0" |
| 58085 | /* 203182 */ "VCVTTSD2USIZrrb_Int\0" |
| 58086 | /* 203202 */ "VCVTSD2USIZrrb_Int\0" |
| 58087 | /* 203221 */ "VCVTTSH2USIZrrb_Int\0" |
| 58088 | /* 203241 */ "VCVTSH2USIZrrb_Int\0" |
| 58089 | /* 203260 */ "VCVTTSS2USIZrrb_Int\0" |
| 58090 | /* 203280 */ "VCVTSS2USIZrrb_Int\0" |
| 58091 | /* 203299 */ "VCVTSI642SSZrrb_Int\0" |
| 58092 | /* 203319 */ "VCVTUSI642SSZrrb_Int\0" |
| 58093 | /* 203340 */ "VCVTSD2SSZrrb_Int\0" |
| 58094 | /* 203358 */ "VCVTSH2SSZrrb_Int\0" |
| 58095 | /* 203376 */ "VCVTSI2SSZrrb_Int\0" |
| 58096 | /* 203394 */ "VCVTUSI2SSZrrb_Int\0" |
| 58097 | /* 203413 */ "VSUBSSZrrb_Int\0" |
| 58098 | /* 203428 */ "VADDSSZrrb_Int\0" |
| 58099 | /* 203443 */ "VSCALEFSSZrrb_Int\0" |
| 58100 | /* 203461 */ "VMULSSZrrb_Int\0" |
| 58101 | /* 203476 */ "VMINSSZrrb_Int\0" |
| 58102 | /* 203491 */ "VDIVSSZrrb_Int\0" |
| 58103 | /* 203506 */ "VMAXSSZrrb_Int\0" |
| 58104 | /* 203521 */ "VROUNDSDmi_Int\0" |
| 58105 | /* 203536 */ "VROUNDSSmi_Int\0" |
| 58106 | /* 203551 */ "VCMPSDrmi_Int\0" |
| 58107 | /* 203565 */ "VCMPSSrmi_Int\0" |
| 58108 | /* 203579 */ "VCMPSDZrmi_Int\0" |
| 58109 | /* 203594 */ "VCMPSHZrmi_Int\0" |
| 58110 | /* 203609 */ "VCMPSSZrmi_Int\0" |
| 58111 | /* 203624 */ "VROUNDSDri_Int\0" |
| 58112 | /* 203639 */ "VROUNDSSri_Int\0" |
| 58113 | /* 203654 */ "VCMPSDrri_Int\0" |
| 58114 | /* 203668 */ "VCMPSSrri_Int\0" |
| 58115 | /* 203682 */ "VCMPSDZrri_Int\0" |
| 58116 | /* 203697 */ "VCMPSHZrri_Int\0" |
| 58117 | /* 203712 */ "VCMPSSZrri_Int\0" |
| 58118 | /* 203727 */ "VFMSUB231SDm_Int\0" |
| 58119 | /* 203744 */ "VFNMSUB231SDm_Int\0" |
| 58120 | /* 203762 */ "VFMADD231SDm_Int\0" |
| 58121 | /* 203779 */ "VFNMADD231SDm_Int\0" |
| 58122 | /* 203797 */ "VFMSUB132SDm_Int\0" |
| 58123 | /* 203814 */ "VFNMSUB132SDm_Int\0" |
| 58124 | /* 203832 */ "VFMADD132SDm_Int\0" |
| 58125 | /* 203849 */ "VFNMADD132SDm_Int\0" |
| 58126 | /* 203867 */ "VFMSUB213SDm_Int\0" |
| 58127 | /* 203884 */ "VFNMSUB213SDm_Int\0" |
| 58128 | /* 203902 */ "VFMADD213SDm_Int\0" |
| 58129 | /* 203919 */ "VFNMADD213SDm_Int\0" |
| 58130 | /* 203937 */ "VSQRTSDm_Int\0" |
| 58131 | /* 203950 */ "VFMSUB231SSm_Int\0" |
| 58132 | /* 203967 */ "VFNMSUB231SSm_Int\0" |
| 58133 | /* 203985 */ "VFMADD231SSm_Int\0" |
| 58134 | /* 204002 */ "VFNMADD231SSm_Int\0" |
| 58135 | /* 204020 */ "VFMSUB132SSm_Int\0" |
| 58136 | /* 204037 */ "VFNMSUB132SSm_Int\0" |
| 58137 | /* 204055 */ "VFMADD132SSm_Int\0" |
| 58138 | /* 204072 */ "VFNMADD132SSm_Int\0" |
| 58139 | /* 204090 */ "VFMSUB213SSm_Int\0" |
| 58140 | /* 204107 */ "VFNMSUB213SSm_Int\0" |
| 58141 | /* 204125 */ "VFMADD213SSm_Int\0" |
| 58142 | /* 204142 */ "VFNMADD213SSm_Int\0" |
| 58143 | /* 204160 */ "VRCPSSm_Int\0" |
| 58144 | /* 204172 */ "VRSQRTSSm_Int\0" |
| 58145 | /* 204186 */ "VSQRTSSm_Int\0" |
| 58146 | /* 204199 */ "VFMSUB231SDZm_Int\0" |
| 58147 | /* 204217 */ "VFNMSUB231SDZm_Int\0" |
| 58148 | /* 204236 */ "VFMADD231SDZm_Int\0" |
| 58149 | /* 204254 */ "VFNMADD231SDZm_Int\0" |
| 58150 | /* 204273 */ "VFMSUB132SDZm_Int\0" |
| 58151 | /* 204291 */ "VFNMSUB132SDZm_Int\0" |
| 58152 | /* 204310 */ "VFMADD132SDZm_Int\0" |
| 58153 | /* 204328 */ "VFNMADD132SDZm_Int\0" |
| 58154 | /* 204347 */ "VFMSUB213SDZm_Int\0" |
| 58155 | /* 204365 */ "VFNMSUB213SDZm_Int\0" |
| 58156 | /* 204384 */ "VFMADD213SDZm_Int\0" |
| 58157 | /* 204402 */ "VFNMADD213SDZm_Int\0" |
| 58158 | /* 204421 */ "VRNDSCALESDZm_Int\0" |
| 58159 | /* 204439 */ "VSQRTSDZm_Int\0" |
| 58160 | /* 204453 */ "VFMSUB231SHZm_Int\0" |
| 58161 | /* 204471 */ "VFNMSUB231SHZm_Int\0" |
| 58162 | /* 204490 */ "VFMADD231SHZm_Int\0" |
| 58163 | /* 204508 */ "VFNMADD231SHZm_Int\0" |
| 58164 | /* 204527 */ "VFMSUB132SHZm_Int\0" |
| 58165 | /* 204545 */ "VFNMSUB132SHZm_Int\0" |
| 58166 | /* 204564 */ "VFMADD132SHZm_Int\0" |
| 58167 | /* 204582 */ "VFNMADD132SHZm_Int\0" |
| 58168 | /* 204601 */ "VFMSUB213SHZm_Int\0" |
| 58169 | /* 204619 */ "VFNMSUB213SHZm_Int\0" |
| 58170 | /* 204638 */ "VFMADD213SHZm_Int\0" |
| 58171 | /* 204656 */ "VFNMADD213SHZm_Int\0" |
| 58172 | /* 204675 */ "VRNDSCALESHZm_Int\0" |
| 58173 | /* 204693 */ "VSQRTSHZm_Int\0" |
| 58174 | /* 204707 */ "VFMSUB231SSZm_Int\0" |
| 58175 | /* 204725 */ "VFNMSUB231SSZm_Int\0" |
| 58176 | /* 204744 */ "VFMADD231SSZm_Int\0" |
| 58177 | /* 204762 */ "VFNMADD231SSZm_Int\0" |
| 58178 | /* 204781 */ "VFMSUB132SSZm_Int\0" |
| 58179 | /* 204799 */ "VFNMSUB132SSZm_Int\0" |
| 58180 | /* 204818 */ "VFMADD132SSZm_Int\0" |
| 58181 | /* 204836 */ "VFNMADD132SSZm_Int\0" |
| 58182 | /* 204855 */ "VFMSUB213SSZm_Int\0" |
| 58183 | /* 204873 */ "VFNMSUB213SSZm_Int\0" |
| 58184 | /* 204892 */ "VFMADD213SSZm_Int\0" |
| 58185 | /* 204910 */ "VFNMADD213SSZm_Int\0" |
| 58186 | /* 204929 */ "VRNDSCALESSZm_Int\0" |
| 58187 | /* 204947 */ "VSQRTSSZm_Int\0" |
| 58188 | /* 204961 */ "VCVTTSD2SI64rm_Int\0" |
| 58189 | /* 204980 */ "VCVTSD2SI64rm_Int\0" |
| 58190 | /* 204998 */ "VCVTTSS2SI64rm_Int\0" |
| 58191 | /* 205017 */ "VCVTSS2SI64rm_Int\0" |
| 58192 | /* 205035 */ "VFMSUBSD4rm_Int\0" |
| 58193 | /* 205051 */ "VFNMSUBSD4rm_Int\0" |
| 58194 | /* 205068 */ "VFMADDSD4rm_Int\0" |
| 58195 | /* 205084 */ "VFNMADDSD4rm_Int\0" |
| 58196 | /* 205101 */ "VFMSUBSS4rm_Int\0" |
| 58197 | /* 205117 */ "VFNMSUBSS4rm_Int\0" |
| 58198 | /* 205134 */ "VFMADDSS4rm_Int\0" |
| 58199 | /* 205150 */ "VFNMADDSS4rm_Int\0" |
| 58200 | /* 205167 */ "VCVTSI642SDrm_Int\0" |
| 58201 | /* 205185 */ "VCVTSI2SDrm_Int\0" |
| 58202 | /* 205201 */ "VCVTSS2SDrm_Int\0" |
| 58203 | /* 205217 */ "VSUBSDrm_Int\0" |
| 58204 | /* 205230 */ "VADDSDrm_Int\0" |
| 58205 | /* 205243 */ "VUCOMISDrm_Int\0" |
| 58206 | /* 205258 */ "VCOMISDrm_Int\0" |
| 58207 | /* 205272 */ "VMULSDrm_Int\0" |
| 58208 | /* 205285 */ "VMINSDrm_Int\0" |
| 58209 | /* 205298 */ "VDIVSDrm_Int\0" |
| 58210 | /* 205311 */ "VMAXSDrm_Int\0" |
| 58211 | /* 205324 */ "VCVTTSD2SIrm_Int\0" |
| 58212 | /* 205341 */ "VCVTSD2SIrm_Int\0" |
| 58213 | /* 205357 */ "VCVTTSS2SIrm_Int\0" |
| 58214 | /* 205374 */ "VCVTSS2SIrm_Int\0" |
| 58215 | /* 205390 */ "VCVTSI642SSrm_Int\0" |
| 58216 | /* 205408 */ "VCVTSD2SSrm_Int\0" |
| 58217 | /* 205424 */ "VCVTSI2SSrm_Int\0" |
| 58218 | /* 205440 */ "VSUBSSrm_Int\0" |
| 58219 | /* 205453 */ "VADDSSrm_Int\0" |
| 58220 | /* 205466 */ "VUCOMISSrm_Int\0" |
| 58221 | /* 205481 */ "VCOMISSrm_Int\0" |
| 58222 | /* 205495 */ "VMULSSrm_Int\0" |
| 58223 | /* 205508 */ "VMINSSrm_Int\0" |
| 58224 | /* 205521 */ "VDIVSSrm_Int\0" |
| 58225 | /* 205534 */ "VMAXSSrm_Int\0" |
| 58226 | /* 205547 */ "VCVTTSD2SI64Zrm_Int\0" |
| 58227 | /* 205567 */ "VCVTSD2SI64Zrm_Int\0" |
| 58228 | /* 205586 */ "VCVTTSH2SI64Zrm_Int\0" |
| 58229 | /* 205606 */ "VCVTSH2SI64Zrm_Int\0" |
| 58230 | /* 205625 */ "VCVTTSS2SI64Zrm_Int\0" |
| 58231 | /* 205645 */ "VCVTSS2SI64Zrm_Int\0" |
| 58232 | /* 205664 */ "VCVTTSD2USI64Zrm_Int\0" |
| 58233 | /* 205685 */ "VCVTSD2USI64Zrm_Int\0" |
| 58234 | /* 205705 */ "VCVTTSH2USI64Zrm_Int\0" |
| 58235 | /* 205726 */ "VCVTSH2USI64Zrm_Int\0" |
| 58236 | /* 205746 */ "VCVTTSS2USI64Zrm_Int\0" |
| 58237 | /* 205767 */ "VCVTSS2USI64Zrm_Int\0" |
| 58238 | /* 205787 */ "VCVTSI642SDZrm_Int\0" |
| 58239 | /* 205806 */ "VCVTUSI642SDZrm_Int\0" |
| 58240 | /* 205826 */ "VCVTSH2SDZrm_Int\0" |
| 58241 | /* 205843 */ "VCVTSI2SDZrm_Int\0" |
| 58242 | /* 205860 */ "VCVTUSI2SDZrm_Int\0" |
| 58243 | /* 205878 */ "VCVTSS2SDZrm_Int\0" |
| 58244 | /* 205895 */ "VSUBSDZrm_Int\0" |
| 58245 | /* 205909 */ "VADDSDZrm_Int\0" |
| 58246 | /* 205923 */ "VUCOMISDZrm_Int\0" |
| 58247 | /* 205939 */ "VCOMISDZrm_Int\0" |
| 58248 | /* 205954 */ "VMULSDZrm_Int\0" |
| 58249 | /* 205968 */ "VMINSDZrm_Int\0" |
| 58250 | /* 205982 */ "VDIVSDZrm_Int\0" |
| 58251 | /* 205996 */ "VMAXSDZrm_Int\0" |
| 58252 | /* 206010 */ "VCVTSI642SHZrm_Int\0" |
| 58253 | /* 206029 */ "VCVTUSI642SHZrm_Int\0" |
| 58254 | /* 206049 */ "VCVTSD2SHZrm_Int\0" |
| 58255 | /* 206066 */ "VCVTSI2SHZrm_Int\0" |
| 58256 | /* 206083 */ "VCVTUSI2SHZrm_Int\0" |
| 58257 | /* 206101 */ "VCVTSS2SHZrm_Int\0" |
| 58258 | /* 206118 */ "VSUBSHZrm_Int\0" |
| 58259 | /* 206132 */ "VADDSHZrm_Int\0" |
| 58260 | /* 206146 */ "VUCOMISHZrm_Int\0" |
| 58261 | /* 206162 */ "VCOMISHZrm_Int\0" |
| 58262 | /* 206177 */ "VMULSHZrm_Int\0" |
| 58263 | /* 206191 */ "VMINSHZrm_Int\0" |
| 58264 | /* 206205 */ "VDIVSHZrm_Int\0" |
| 58265 | /* 206219 */ "VMAXSHZrm_Int\0" |
| 58266 | /* 206233 */ "VCVTTSD2SIZrm_Int\0" |
| 58267 | /* 206251 */ "VCVTSD2SIZrm_Int\0" |
| 58268 | /* 206268 */ "VCVTTSH2SIZrm_Int\0" |
| 58269 | /* 206286 */ "VCVTSH2SIZrm_Int\0" |
| 58270 | /* 206303 */ "VCVTTSS2SIZrm_Int\0" |
| 58271 | /* 206321 */ "VCVTSS2SIZrm_Int\0" |
| 58272 | /* 206338 */ "VCVTTSD2USIZrm_Int\0" |
| 58273 | /* 206357 */ "VCVTSD2USIZrm_Int\0" |
| 58274 | /* 206375 */ "VCVTTSH2USIZrm_Int\0" |
| 58275 | /* 206394 */ "VCVTSH2USIZrm_Int\0" |
| 58276 | /* 206412 */ "VCVTTSS2USIZrm_Int\0" |
| 58277 | /* 206431 */ "VCVTSS2USIZrm_Int\0" |
| 58278 | /* 206449 */ "VCVTSI642SSZrm_Int\0" |
| 58279 | /* 206468 */ "VCVTUSI642SSZrm_Int\0" |
| 58280 | /* 206488 */ "VCVTSD2SSZrm_Int\0" |
| 58281 | /* 206505 */ "VCVTSH2SSZrm_Int\0" |
| 58282 | /* 206522 */ "VCVTSI2SSZrm_Int\0" |
| 58283 | /* 206539 */ "VCVTUSI2SSZrm_Int\0" |
| 58284 | /* 206557 */ "VSUBSSZrm_Int\0" |
| 58285 | /* 206571 */ "VADDSSZrm_Int\0" |
| 58286 | /* 206585 */ "VUCOMISSZrm_Int\0" |
| 58287 | /* 206601 */ "VCOMISSZrm_Int\0" |
| 58288 | /* 206616 */ "VMULSSZrm_Int\0" |
| 58289 | /* 206630 */ "VMINSSZrm_Int\0" |
| 58290 | /* 206644 */ "VDIVSSZrm_Int\0" |
| 58291 | /* 206658 */ "VMAXSSZrm_Int\0" |
| 58292 | /* 206672 */ "VFMSUB231SDr_Int\0" |
| 58293 | /* 206689 */ "VFNMSUB231SDr_Int\0" |
| 58294 | /* 206707 */ "VFMADD231SDr_Int\0" |
| 58295 | /* 206724 */ "VFNMADD231SDr_Int\0" |
| 58296 | /* 206742 */ "VFMSUB132SDr_Int\0" |
| 58297 | /* 206759 */ "VFNMSUB132SDr_Int\0" |
| 58298 | /* 206777 */ "VFMADD132SDr_Int\0" |
| 58299 | /* 206794 */ "VFNMADD132SDr_Int\0" |
| 58300 | /* 206812 */ "VFMSUB213SDr_Int\0" |
| 58301 | /* 206829 */ "VFNMSUB213SDr_Int\0" |
| 58302 | /* 206847 */ "VFMADD213SDr_Int\0" |
| 58303 | /* 206864 */ "VFNMADD213SDr_Int\0" |
| 58304 | /* 206882 */ "VSQRTSDr_Int\0" |
| 58305 | /* 206895 */ "VFMSUB231SSr_Int\0" |
| 58306 | /* 206912 */ "VFNMSUB231SSr_Int\0" |
| 58307 | /* 206930 */ "VFMADD231SSr_Int\0" |
| 58308 | /* 206947 */ "VFNMADD231SSr_Int\0" |
| 58309 | /* 206965 */ "VFMSUB132SSr_Int\0" |
| 58310 | /* 206982 */ "VFNMSUB132SSr_Int\0" |
| 58311 | /* 207000 */ "VFMADD132SSr_Int\0" |
| 58312 | /* 207017 */ "VFNMADD132SSr_Int\0" |
| 58313 | /* 207035 */ "VFMSUB213SSr_Int\0" |
| 58314 | /* 207052 */ "VFNMSUB213SSr_Int\0" |
| 58315 | /* 207070 */ "VFMADD213SSr_Int\0" |
| 58316 | /* 207087 */ "VFNMADD213SSr_Int\0" |
| 58317 | /* 207105 */ "VRCPSSr_Int\0" |
| 58318 | /* 207117 */ "VRSQRTSSr_Int\0" |
| 58319 | /* 207131 */ "VSQRTSSr_Int\0" |
| 58320 | /* 207144 */ "VFMSUB231SDZr_Int\0" |
| 58321 | /* 207162 */ "VFNMSUB231SDZr_Int\0" |
| 58322 | /* 207181 */ "VFMADD231SDZr_Int\0" |
| 58323 | /* 207199 */ "VFNMADD231SDZr_Int\0" |
| 58324 | /* 207218 */ "VFMSUB132SDZr_Int\0" |
| 58325 | /* 207236 */ "VFNMSUB132SDZr_Int\0" |
| 58326 | /* 207255 */ "VFMADD132SDZr_Int\0" |
| 58327 | /* 207273 */ "VFNMADD132SDZr_Int\0" |
| 58328 | /* 207292 */ "VFMSUB213SDZr_Int\0" |
| 58329 | /* 207310 */ "VFNMSUB213SDZr_Int\0" |
| 58330 | /* 207329 */ "VFMADD213SDZr_Int\0" |
| 58331 | /* 207347 */ "VFNMADD213SDZr_Int\0" |
| 58332 | /* 207366 */ "VRNDSCALESDZr_Int\0" |
| 58333 | /* 207384 */ "VSQRTSDZr_Int\0" |
| 58334 | /* 207398 */ "VFMSUB231SHZr_Int\0" |
| 58335 | /* 207416 */ "VFNMSUB231SHZr_Int\0" |
| 58336 | /* 207435 */ "VFMADD231SHZr_Int\0" |
| 58337 | /* 207453 */ "VFNMADD231SHZr_Int\0" |
| 58338 | /* 207472 */ "VFMSUB132SHZr_Int\0" |
| 58339 | /* 207490 */ "VFNMSUB132SHZr_Int\0" |
| 58340 | /* 207509 */ "VFMADD132SHZr_Int\0" |
| 58341 | /* 207527 */ "VFNMADD132SHZr_Int\0" |
| 58342 | /* 207546 */ "VFMSUB213SHZr_Int\0" |
| 58343 | /* 207564 */ "VFNMSUB213SHZr_Int\0" |
| 58344 | /* 207583 */ "VFMADD213SHZr_Int\0" |
| 58345 | /* 207601 */ "VFNMADD213SHZr_Int\0" |
| 58346 | /* 207620 */ "VRNDSCALESHZr_Int\0" |
| 58347 | /* 207638 */ "VSQRTSHZr_Int\0" |
| 58348 | /* 207652 */ "VFMSUB231SSZr_Int\0" |
| 58349 | /* 207670 */ "VFNMSUB231SSZr_Int\0" |
| 58350 | /* 207689 */ "VFMADD231SSZr_Int\0" |
| 58351 | /* 207707 */ "VFNMADD231SSZr_Int\0" |
| 58352 | /* 207726 */ "VFMSUB132SSZr_Int\0" |
| 58353 | /* 207744 */ "VFNMSUB132SSZr_Int\0" |
| 58354 | /* 207763 */ "VFMADD132SSZr_Int\0" |
| 58355 | /* 207781 */ "VFNMADD132SSZr_Int\0" |
| 58356 | /* 207800 */ "VFMSUB213SSZr_Int\0" |
| 58357 | /* 207818 */ "VFNMSUB213SSZr_Int\0" |
| 58358 | /* 207837 */ "VFMADD213SSZr_Int\0" |
| 58359 | /* 207855 */ "VFNMADD213SSZr_Int\0" |
| 58360 | /* 207874 */ "VRNDSCALESSZr_Int\0" |
| 58361 | /* 207892 */ "VSQRTSSZr_Int\0" |
| 58362 | /* 207906 */ "VFMSUBSD4mr_Int\0" |
| 58363 | /* 207922 */ "VFNMSUBSD4mr_Int\0" |
| 58364 | /* 207939 */ "VFMADDSD4mr_Int\0" |
| 58365 | /* 207955 */ "VFNMADDSD4mr_Int\0" |
| 58366 | /* 207972 */ "VFMSUBSS4mr_Int\0" |
| 58367 | /* 207988 */ "VFNMSUBSS4mr_Int\0" |
| 58368 | /* 208005 */ "VFMADDSS4mr_Int\0" |
| 58369 | /* 208021 */ "VFNMADDSS4mr_Int\0" |
| 58370 | /* 208038 */ "VCVTTSD2SI64rr_Int\0" |
| 58371 | /* 208057 */ "VCVTSD2SI64rr_Int\0" |
| 58372 | /* 208075 */ "VCVTTSS2SI64rr_Int\0" |
| 58373 | /* 208094 */ "VCVTSS2SI64rr_Int\0" |
| 58374 | /* 208112 */ "VFMSUBSD4rr_Int\0" |
| 58375 | /* 208128 */ "VFNMSUBSD4rr_Int\0" |
| 58376 | /* 208145 */ "VFMADDSD4rr_Int\0" |
| 58377 | /* 208161 */ "VFNMADDSD4rr_Int\0" |
| 58378 | /* 208178 */ "VFMSUBSS4rr_Int\0" |
| 58379 | /* 208194 */ "VFNMSUBSS4rr_Int\0" |
| 58380 | /* 208211 */ "VFMADDSS4rr_Int\0" |
| 58381 | /* 208227 */ "VFNMADDSS4rr_Int\0" |
| 58382 | /* 208244 */ "VCVTSI642SDrr_Int\0" |
| 58383 | /* 208262 */ "VCVTSI2SDrr_Int\0" |
| 58384 | /* 208278 */ "VCVTSS2SDrr_Int\0" |
| 58385 | /* 208294 */ "VSUBSDrr_Int\0" |
| 58386 | /* 208307 */ "VADDSDrr_Int\0" |
| 58387 | /* 208320 */ "VUCOMISDrr_Int\0" |
| 58388 | /* 208335 */ "VCOMISDrr_Int\0" |
| 58389 | /* 208349 */ "VMULSDrr_Int\0" |
| 58390 | /* 208362 */ "VMINSDrr_Int\0" |
| 58391 | /* 208375 */ "VDIVSDrr_Int\0" |
| 58392 | /* 208388 */ "VMAXSDrr_Int\0" |
| 58393 | /* 208401 */ "VCVTTSD2SIrr_Int\0" |
| 58394 | /* 208418 */ "VCVTSD2SIrr_Int\0" |
| 58395 | /* 208434 */ "VCVTTSS2SIrr_Int\0" |
| 58396 | /* 208451 */ "VCVTSS2SIrr_Int\0" |
| 58397 | /* 208467 */ "VCVTSI642SSrr_Int\0" |
| 58398 | /* 208485 */ "VCVTSD2SSrr_Int\0" |
| 58399 | /* 208501 */ "VCVTSI2SSrr_Int\0" |
| 58400 | /* 208517 */ "VSUBSSrr_Int\0" |
| 58401 | /* 208530 */ "VADDSSrr_Int\0" |
| 58402 | /* 208543 */ "VUCOMISSrr_Int\0" |
| 58403 | /* 208558 */ "VCOMISSrr_Int\0" |
| 58404 | /* 208572 */ "VMULSSrr_Int\0" |
| 58405 | /* 208585 */ "VMINSSrr_Int\0" |
| 58406 | /* 208598 */ "VDIVSSrr_Int\0" |
| 58407 | /* 208611 */ "VMAXSSrr_Int\0" |
| 58408 | /* 208624 */ "VCVTTSD2SI64Zrr_Int\0" |
| 58409 | /* 208644 */ "VCVTSD2SI64Zrr_Int\0" |
| 58410 | /* 208663 */ "VCVTTSH2SI64Zrr_Int\0" |
| 58411 | /* 208683 */ "VCVTSH2SI64Zrr_Int\0" |
| 58412 | /* 208702 */ "VCVTTSS2SI64Zrr_Int\0" |
| 58413 | /* 208722 */ "VCVTSS2SI64Zrr_Int\0" |
| 58414 | /* 208741 */ "VCVTTSD2USI64Zrr_Int\0" |
| 58415 | /* 208762 */ "VCVTSD2USI64Zrr_Int\0" |
| 58416 | /* 208782 */ "VCVTTSH2USI64Zrr_Int\0" |
| 58417 | /* 208803 */ "VCVTSH2USI64Zrr_Int\0" |
| 58418 | /* 208823 */ "VCVTTSS2USI64Zrr_Int\0" |
| 58419 | /* 208844 */ "VCVTSS2USI64Zrr_Int\0" |
| 58420 | /* 208864 */ "VCVTSI642SDZrr_Int\0" |
| 58421 | /* 208883 */ "VCVTUSI642SDZrr_Int\0" |
| 58422 | /* 208903 */ "VCVTSH2SDZrr_Int\0" |
| 58423 | /* 208920 */ "VCVTSI2SDZrr_Int\0" |
| 58424 | /* 208937 */ "VCVTUSI2SDZrr_Int\0" |
| 58425 | /* 208955 */ "VCVTSS2SDZrr_Int\0" |
| 58426 | /* 208972 */ "VSUBSDZrr_Int\0" |
| 58427 | /* 208986 */ "VADDSDZrr_Int\0" |
| 58428 | /* 209000 */ "VUCOMISDZrr_Int\0" |
| 58429 | /* 209016 */ "VCOMISDZrr_Int\0" |
| 58430 | /* 209031 */ "VMULSDZrr_Int\0" |
| 58431 | /* 209045 */ "VMINSDZrr_Int\0" |
| 58432 | /* 209059 */ "VDIVSDZrr_Int\0" |
| 58433 | /* 209073 */ "VMAXSDZrr_Int\0" |
| 58434 | /* 209087 */ "VCVTSI642SHZrr_Int\0" |
| 58435 | /* 209106 */ "VCVTUSI642SHZrr_Int\0" |
| 58436 | /* 209126 */ "VCVTSD2SHZrr_Int\0" |
| 58437 | /* 209143 */ "VCVTSI2SHZrr_Int\0" |
| 58438 | /* 209160 */ "VCVTUSI2SHZrr_Int\0" |
| 58439 | /* 209178 */ "VCVTSS2SHZrr_Int\0" |
| 58440 | /* 209195 */ "VSUBSHZrr_Int\0" |
| 58441 | /* 209209 */ "VADDSHZrr_Int\0" |
| 58442 | /* 209223 */ "VUCOMISHZrr_Int\0" |
| 58443 | /* 209239 */ "VCOMISHZrr_Int\0" |
| 58444 | /* 209254 */ "VMULSHZrr_Int\0" |
| 58445 | /* 209268 */ "VMINSHZrr_Int\0" |
| 58446 | /* 209282 */ "VDIVSHZrr_Int\0" |
| 58447 | /* 209296 */ "VMAXSHZrr_Int\0" |
| 58448 | /* 209310 */ "VCVTTSD2SIZrr_Int\0" |
| 58449 | /* 209328 */ "VCVTSD2SIZrr_Int\0" |
| 58450 | /* 209345 */ "VCVTTSH2SIZrr_Int\0" |
| 58451 | /* 209363 */ "VCVTSH2SIZrr_Int\0" |
| 58452 | /* 209380 */ "VCVTTSS2SIZrr_Int\0" |
| 58453 | /* 209398 */ "VCVTSS2SIZrr_Int\0" |
| 58454 | /* 209415 */ "VCVTTSD2USIZrr_Int\0" |
| 58455 | /* 209434 */ "VCVTSD2USIZrr_Int\0" |
| 58456 | /* 209452 */ "VCVTTSH2USIZrr_Int\0" |
| 58457 | /* 209471 */ "VCVTSH2USIZrr_Int\0" |
| 58458 | /* 209489 */ "VCVTTSS2USIZrr_Int\0" |
| 58459 | /* 209508 */ "VCVTSS2USIZrr_Int\0" |
| 58460 | /* 209526 */ "VCVTSI642SSZrr_Int\0" |
| 58461 | /* 209545 */ "VCVTUSI642SSZrr_Int\0" |
| 58462 | /* 209565 */ "VCVTSD2SSZrr_Int\0" |
| 58463 | /* 209582 */ "VCVTSH2SSZrr_Int\0" |
| 58464 | /* 209599 */ "VCVTSI2SSZrr_Int\0" |
| 58465 | /* 209616 */ "VCVTUSI2SSZrr_Int\0" |
| 58466 | /* 209634 */ "VSUBSSZrr_Int\0" |
| 58467 | /* 209648 */ "VADDSSZrr_Int\0" |
| 58468 | /* 209662 */ "VUCOMISSZrr_Int\0" |
| 58469 | /* 209678 */ "VCOMISSZrr_Int\0" |
| 58470 | /* 209693 */ "VMULSSZrr_Int\0" |
| 58471 | /* 209707 */ "VMINSSZrr_Int\0" |
| 58472 | /* 209721 */ "VDIVSSZrr_Int\0" |
| 58473 | /* 209735 */ "VMAXSSZrr_Int\0" |
| 58474 | /* 209749 */ "VREDUCEPDZrribkz\0" |
| 58475 | /* 209766 */ "VRANGEPDZrribkz\0" |
| 58476 | /* 209782 */ "VRNDSCALEPDZrribkz\0" |
| 58477 | /* 209801 */ "VFIXUPIMMPDZrribkz\0" |
| 58478 | /* 209820 */ "VGETMANTPDZrribkz\0" |
| 58479 | /* 209838 */ "VREDUCESDZrribkz\0" |
| 58480 | /* 209855 */ "VRANGESDZrribkz\0" |
| 58481 | /* 209871 */ "VFIXUPIMMSDZrribkz\0" |
| 58482 | /* 209890 */ "VGETMANTSDZrribkz\0" |
| 58483 | /* 209908 */ "VREDUCEPHZrribkz\0" |
| 58484 | /* 209925 */ "VRNDSCALEPHZrribkz\0" |
| 58485 | /* 209944 */ "VGETMANTPHZrribkz\0" |
| 58486 | /* 209962 */ "VREDUCESHZrribkz\0" |
| 58487 | /* 209979 */ "VGETMANTSHZrribkz\0" |
| 58488 | /* 209997 */ "VREDUCEPSZrribkz\0" |
| 58489 | /* 210014 */ "VRANGEPSZrribkz\0" |
| 58490 | /* 210030 */ "VRNDSCALEPSZrribkz\0" |
| 58491 | /* 210049 */ "VFIXUPIMMPSZrribkz\0" |
| 58492 | /* 210068 */ "VGETMANTPSZrribkz\0" |
| 58493 | /* 210086 */ "VREDUCESSZrribkz\0" |
| 58494 | /* 210103 */ "VRANGESSZrribkz\0" |
| 58495 | /* 210119 */ "VFIXUPIMMSSZrribkz\0" |
| 58496 | /* 210138 */ "VGETMANTSSZrribkz\0" |
| 58497 | /* 210156 */ "VFMADDSUB231PDZ256mbkz\0" |
| 58498 | /* 210179 */ "VFMSUB231PDZ256mbkz\0" |
| 58499 | /* 210199 */ "VFNMSUB231PDZ256mbkz\0" |
| 58500 | /* 210220 */ "VFMSUBADD231PDZ256mbkz\0" |
| 58501 | /* 210243 */ "VFMADD231PDZ256mbkz\0" |
| 58502 | /* 210263 */ "VFNMADD231PDZ256mbkz\0" |
| 58503 | /* 210284 */ "VFMADDSUB132PDZ256mbkz\0" |
| 58504 | /* 210307 */ "VFMSUB132PDZ256mbkz\0" |
| 58505 | /* 210327 */ "VFNMSUB132PDZ256mbkz\0" |
| 58506 | /* 210348 */ "VFMSUBADD132PDZ256mbkz\0" |
| 58507 | /* 210371 */ "VFMADD132PDZ256mbkz\0" |
| 58508 | /* 210391 */ "VFNMADD132PDZ256mbkz\0" |
| 58509 | /* 210412 */ "VFMADDSUB213PDZ256mbkz\0" |
| 58510 | /* 210435 */ "VFMSUB213PDZ256mbkz\0" |
| 58511 | /* 210455 */ "VFNMSUB213PDZ256mbkz\0" |
| 58512 | /* 210476 */ "VFMSUBADD213PDZ256mbkz\0" |
| 58513 | /* 210499 */ "VFMADD213PDZ256mbkz\0" |
| 58514 | /* 210519 */ "VFNMADD213PDZ256mbkz\0" |
| 58515 | /* 210540 */ "VRCP14PDZ256mbkz\0" |
| 58516 | /* 210557 */ "VRSQRT14PDZ256mbkz\0" |
| 58517 | /* 210576 */ "VGETEXPPDZ256mbkz\0" |
| 58518 | /* 210594 */ "VSQRTPDZ256mbkz\0" |
| 58519 | /* 210610 */ "VPDPWSSDZ256mbkz\0" |
| 58520 | /* 210627 */ "VPDPBUSDZ256mbkz\0" |
| 58521 | /* 210644 */ "VPSHLDVDZ256mbkz\0" |
| 58522 | /* 210661 */ "VPSHRDVDZ256mbkz\0" |
| 58523 | /* 210678 */ "VFMADDSUB231PHZ256mbkz\0" |
| 58524 | /* 210701 */ "VFMSUB231PHZ256mbkz\0" |
| 58525 | /* 210721 */ "VFNMSUB231PHZ256mbkz\0" |
| 58526 | /* 210742 */ "VFMSUBADD231PHZ256mbkz\0" |
| 58527 | /* 210765 */ "VFMADD231PHZ256mbkz\0" |
| 58528 | /* 210785 */ "VFNMADD231PHZ256mbkz\0" |
| 58529 | /* 210806 */ "VFMADDSUB132PHZ256mbkz\0" |
| 58530 | /* 210829 */ "VFMSUB132PHZ256mbkz\0" |
| 58531 | /* 210849 */ "VFNMSUB132PHZ256mbkz\0" |
| 58532 | /* 210870 */ "VFMSUBADD132PHZ256mbkz\0" |
| 58533 | /* 210893 */ "VFMADD132PHZ256mbkz\0" |
| 58534 | /* 210913 */ "VFNMADD132PHZ256mbkz\0" |
| 58535 | /* 210934 */ "VFMADDSUB213PHZ256mbkz\0" |
| 58536 | /* 210957 */ "VFMSUB213PHZ256mbkz\0" |
| 58537 | /* 210977 */ "VFNMSUB213PHZ256mbkz\0" |
| 58538 | /* 210998 */ "VFMSUBADD213PHZ256mbkz\0" |
| 58539 | /* 211021 */ "VFMADD213PHZ256mbkz\0" |
| 58540 | /* 211041 */ "VFNMADD213PHZ256mbkz\0" |
| 58541 | /* 211062 */ "VFCMADDCPHZ256mbkz\0" |
| 58542 | /* 211081 */ "VFMADDCPHZ256mbkz\0" |
| 58543 | /* 211099 */ "VRCPPHZ256mbkz\0" |
| 58544 | /* 211114 */ "VGETEXPPHZ256mbkz\0" |
| 58545 | /* 211132 */ "VRSQRTPHZ256mbkz\0" |
| 58546 | /* 211149 */ "VSQRTPHZ256mbkz\0" |
| 58547 | /* 211165 */ "VPMADD52HUQZ256mbkz\0" |
| 58548 | /* 211185 */ "VPMADD52LUQZ256mbkz\0" |
| 58549 | /* 211205 */ "VPSHLDVQZ256mbkz\0" |
| 58550 | /* 211222 */ "VPSHRDVQZ256mbkz\0" |
| 58551 | /* 211239 */ "VPDPWSSDSZ256mbkz\0" |
| 58552 | /* 211257 */ "VPDPBUSDSZ256mbkz\0" |
| 58553 | /* 211275 */ "VFMADDSUB231PSZ256mbkz\0" |
| 58554 | /* 211298 */ "VFMSUB231PSZ256mbkz\0" |
| 58555 | /* 211318 */ "VFNMSUB231PSZ256mbkz\0" |
| 58556 | /* 211339 */ "VFMSUBADD231PSZ256mbkz\0" |
| 58557 | /* 211362 */ "VFMADD231PSZ256mbkz\0" |
| 58558 | /* 211382 */ "VFNMADD231PSZ256mbkz\0" |
| 58559 | /* 211403 */ "VFMADDSUB132PSZ256mbkz\0" |
| 58560 | /* 211426 */ "VFMSUB132PSZ256mbkz\0" |
| 58561 | /* 211446 */ "VFNMSUB132PSZ256mbkz\0" |
| 58562 | /* 211467 */ "VFMSUBADD132PSZ256mbkz\0" |
| 58563 | /* 211490 */ "VFMADD132PSZ256mbkz\0" |
| 58564 | /* 211510 */ "VFNMADD132PSZ256mbkz\0" |
| 58565 | /* 211531 */ "VFMADDSUB213PSZ256mbkz\0" |
| 58566 | /* 211554 */ "VFMSUB213PSZ256mbkz\0" |
| 58567 | /* 211574 */ "VFNMSUB213PSZ256mbkz\0" |
| 58568 | /* 211595 */ "VFMSUBADD213PSZ256mbkz\0" |
| 58569 | /* 211618 */ "VFMADD213PSZ256mbkz\0" |
| 58570 | /* 211638 */ "VFNMADD213PSZ256mbkz\0" |
| 58571 | /* 211659 */ "VRCP14PSZ256mbkz\0" |
| 58572 | /* 211676 */ "VRSQRT14PSZ256mbkz\0" |
| 58573 | /* 211695 */ "VDPBF16PSZ256mbkz\0" |
| 58574 | /* 211713 */ "VGETEXPPSZ256mbkz\0" |
| 58575 | /* 211731 */ "VSQRTPSZ256mbkz\0" |
| 58576 | /* 211747 */ "VFMADDSUB231PDZ128mbkz\0" |
| 58577 | /* 211770 */ "VFMSUB231PDZ128mbkz\0" |
| 58578 | /* 211790 */ "VFNMSUB231PDZ128mbkz\0" |
| 58579 | /* 211811 */ "VFMSUBADD231PDZ128mbkz\0" |
| 58580 | /* 211834 */ "VFMADD231PDZ128mbkz\0" |
| 58581 | /* 211854 */ "VFNMADD231PDZ128mbkz\0" |
| 58582 | /* 211875 */ "VFMADDSUB132PDZ128mbkz\0" |
| 58583 | /* 211898 */ "VFMSUB132PDZ128mbkz\0" |
| 58584 | /* 211918 */ "VFNMSUB132PDZ128mbkz\0" |
| 58585 | /* 211939 */ "VFMSUBADD132PDZ128mbkz\0" |
| 58586 | /* 211962 */ "VFMADD132PDZ128mbkz\0" |
| 58587 | /* 211982 */ "VFNMADD132PDZ128mbkz\0" |
| 58588 | /* 212003 */ "VFMADDSUB213PDZ128mbkz\0" |
| 58589 | /* 212026 */ "VFMSUB213PDZ128mbkz\0" |
| 58590 | /* 212046 */ "VFNMSUB213PDZ128mbkz\0" |
| 58591 | /* 212067 */ "VFMSUBADD213PDZ128mbkz\0" |
| 58592 | /* 212090 */ "VFMADD213PDZ128mbkz\0" |
| 58593 | /* 212110 */ "VFNMADD213PDZ128mbkz\0" |
| 58594 | /* 212131 */ "VRCP14PDZ128mbkz\0" |
| 58595 | /* 212148 */ "VRSQRT14PDZ128mbkz\0" |
| 58596 | /* 212167 */ "VGETEXPPDZ128mbkz\0" |
| 58597 | /* 212185 */ "VSQRTPDZ128mbkz\0" |
| 58598 | /* 212201 */ "VPDPWSSDZ128mbkz\0" |
| 58599 | /* 212218 */ "VPDPBUSDZ128mbkz\0" |
| 58600 | /* 212235 */ "VPSHLDVDZ128mbkz\0" |
| 58601 | /* 212252 */ "VPSHRDVDZ128mbkz\0" |
| 58602 | /* 212269 */ "VFMADDSUB231PHZ128mbkz\0" |
| 58603 | /* 212292 */ "VFMSUB231PHZ128mbkz\0" |
| 58604 | /* 212312 */ "VFNMSUB231PHZ128mbkz\0" |
| 58605 | /* 212333 */ "VFMSUBADD231PHZ128mbkz\0" |
| 58606 | /* 212356 */ "VFMADD231PHZ128mbkz\0" |
| 58607 | /* 212376 */ "VFNMADD231PHZ128mbkz\0" |
| 58608 | /* 212397 */ "VFMADDSUB132PHZ128mbkz\0" |
| 58609 | /* 212420 */ "VFMSUB132PHZ128mbkz\0" |
| 58610 | /* 212440 */ "VFNMSUB132PHZ128mbkz\0" |
| 58611 | /* 212461 */ "VFMSUBADD132PHZ128mbkz\0" |
| 58612 | /* 212484 */ "VFMADD132PHZ128mbkz\0" |
| 58613 | /* 212504 */ "VFNMADD132PHZ128mbkz\0" |
| 58614 | /* 212525 */ "VFMADDSUB213PHZ128mbkz\0" |
| 58615 | /* 212548 */ "VFMSUB213PHZ128mbkz\0" |
| 58616 | /* 212568 */ "VFNMSUB213PHZ128mbkz\0" |
| 58617 | /* 212589 */ "VFMSUBADD213PHZ128mbkz\0" |
| 58618 | /* 212612 */ "VFMADD213PHZ128mbkz\0" |
| 58619 | /* 212632 */ "VFNMADD213PHZ128mbkz\0" |
| 58620 | /* 212653 */ "VFCMADDCPHZ128mbkz\0" |
| 58621 | /* 212672 */ "VFMADDCPHZ128mbkz\0" |
| 58622 | /* 212690 */ "VRCPPHZ128mbkz\0" |
| 58623 | /* 212705 */ "VGETEXPPHZ128mbkz\0" |
| 58624 | /* 212723 */ "VRSQRTPHZ128mbkz\0" |
| 58625 | /* 212740 */ "VSQRTPHZ128mbkz\0" |
| 58626 | /* 212756 */ "VPMADD52HUQZ128mbkz\0" |
| 58627 | /* 212776 */ "VPMADD52LUQZ128mbkz\0" |
| 58628 | /* 212796 */ "VPSHLDVQZ128mbkz\0" |
| 58629 | /* 212813 */ "VPSHRDVQZ128mbkz\0" |
| 58630 | /* 212830 */ "VPDPWSSDSZ128mbkz\0" |
| 58631 | /* 212848 */ "VPDPBUSDSZ128mbkz\0" |
| 58632 | /* 212866 */ "VFMADDSUB231PSZ128mbkz\0" |
| 58633 | /* 212889 */ "VFMSUB231PSZ128mbkz\0" |
| 58634 | /* 212909 */ "VFNMSUB231PSZ128mbkz\0" |
| 58635 | /* 212930 */ "VFMSUBADD231PSZ128mbkz\0" |
| 58636 | /* 212953 */ "VFMADD231PSZ128mbkz\0" |
| 58637 | /* 212973 */ "VFNMADD231PSZ128mbkz\0" |
| 58638 | /* 212994 */ "VFMADDSUB132PSZ128mbkz\0" |
| 58639 | /* 213017 */ "VFMSUB132PSZ128mbkz\0" |
| 58640 | /* 213037 */ "VFNMSUB132PSZ128mbkz\0" |
| 58641 | /* 213058 */ "VFMSUBADD132PSZ128mbkz\0" |
| 58642 | /* 213081 */ "VFMADD132PSZ128mbkz\0" |
| 58643 | /* 213101 */ "VFNMADD132PSZ128mbkz\0" |
| 58644 | /* 213122 */ "VFMADDSUB213PSZ128mbkz\0" |
| 58645 | /* 213145 */ "VFMSUB213PSZ128mbkz\0" |
| 58646 | /* 213165 */ "VFNMSUB213PSZ128mbkz\0" |
| 58647 | /* 213186 */ "VFMSUBADD213PSZ128mbkz\0" |
| 58648 | /* 213209 */ "VFMADD213PSZ128mbkz\0" |
| 58649 | /* 213229 */ "VFNMADD213PSZ128mbkz\0" |
| 58650 | /* 213250 */ "VRCP14PSZ128mbkz\0" |
| 58651 | /* 213267 */ "VRSQRT14PSZ128mbkz\0" |
| 58652 | /* 213286 */ "VDPBF16PSZ128mbkz\0" |
| 58653 | /* 213304 */ "VGETEXPPSZ128mbkz\0" |
| 58654 | /* 213322 */ "VSQRTPSZ128mbkz\0" |
| 58655 | /* 213338 */ "VFMADDSUB231PDZmbkz\0" |
| 58656 | /* 213358 */ "VFMSUB231PDZmbkz\0" |
| 58657 | /* 213375 */ "VFNMSUB231PDZmbkz\0" |
| 58658 | /* 213393 */ "VFMSUBADD231PDZmbkz\0" |
| 58659 | /* 213413 */ "VFMADD231PDZmbkz\0" |
| 58660 | /* 213430 */ "VFNMADD231PDZmbkz\0" |
| 58661 | /* 213448 */ "VFMADDSUB132PDZmbkz\0" |
| 58662 | /* 213468 */ "VFMSUB132PDZmbkz\0" |
| 58663 | /* 213485 */ "VFNMSUB132PDZmbkz\0" |
| 58664 | /* 213503 */ "VFMSUBADD132PDZmbkz\0" |
| 58665 | /* 213523 */ "VFMADD132PDZmbkz\0" |
| 58666 | /* 213540 */ "VFNMADD132PDZmbkz\0" |
| 58667 | /* 213558 */ "VEXP2PDZmbkz\0" |
| 58668 | /* 213571 */ "VFMADDSUB213PDZmbkz\0" |
| 58669 | /* 213591 */ "VFMSUB213PDZmbkz\0" |
| 58670 | /* 213608 */ "VFNMSUB213PDZmbkz\0" |
| 58671 | /* 213626 */ "VFMSUBADD213PDZmbkz\0" |
| 58672 | /* 213646 */ "VFMADD213PDZmbkz\0" |
| 58673 | /* 213663 */ "VFNMADD213PDZmbkz\0" |
| 58674 | /* 213681 */ "VRCP14PDZmbkz\0" |
| 58675 | /* 213695 */ "VRSQRT14PDZmbkz\0" |
| 58676 | /* 213711 */ "VRCP28PDZmbkz\0" |
| 58677 | /* 213725 */ "VRSQRT28PDZmbkz\0" |
| 58678 | /* 213741 */ "VGETEXPPDZmbkz\0" |
| 58679 | /* 213756 */ "VSQRTPDZmbkz\0" |
| 58680 | /* 213769 */ "VPDPWSSDZmbkz\0" |
| 58681 | /* 213783 */ "VPDPBUSDZmbkz\0" |
| 58682 | /* 213797 */ "VPSHLDVDZmbkz\0" |
| 58683 | /* 213811 */ "VPSHRDVDZmbkz\0" |
| 58684 | /* 213825 */ "VFMADDSUB231PHZmbkz\0" |
| 58685 | /* 213845 */ "VFMSUB231PHZmbkz\0" |
| 58686 | /* 213862 */ "VFNMSUB231PHZmbkz\0" |
| 58687 | /* 213880 */ "VFMSUBADD231PHZmbkz\0" |
| 58688 | /* 213900 */ "VFMADD231PHZmbkz\0" |
| 58689 | /* 213917 */ "VFNMADD231PHZmbkz\0" |
| 58690 | /* 213935 */ "VFMADDSUB132PHZmbkz\0" |
| 58691 | /* 213955 */ "VFMSUB132PHZmbkz\0" |
| 58692 | /* 213972 */ "VFNMSUB132PHZmbkz\0" |
| 58693 | /* 213990 */ "VFMSUBADD132PHZmbkz\0" |
| 58694 | /* 214010 */ "VFMADD132PHZmbkz\0" |
| 58695 | /* 214027 */ "VFNMADD132PHZmbkz\0" |
| 58696 | /* 214045 */ "VFMADDSUB213PHZmbkz\0" |
| 58697 | /* 214065 */ "VFMSUB213PHZmbkz\0" |
| 58698 | /* 214082 */ "VFNMSUB213PHZmbkz\0" |
| 58699 | /* 214100 */ "VFMSUBADD213PHZmbkz\0" |
| 58700 | /* 214120 */ "VFMADD213PHZmbkz\0" |
| 58701 | /* 214137 */ "VFNMADD213PHZmbkz\0" |
| 58702 | /* 214155 */ "VFCMADDCPHZmbkz\0" |
| 58703 | /* 214171 */ "VFMADDCPHZmbkz\0" |
| 58704 | /* 214186 */ "VRCPPHZmbkz\0" |
| 58705 | /* 214198 */ "VGETEXPPHZmbkz\0" |
| 58706 | /* 214213 */ "VRSQRTPHZmbkz\0" |
| 58707 | /* 214227 */ "VSQRTPHZmbkz\0" |
| 58708 | /* 214240 */ "VPMADD52HUQZmbkz\0" |
| 58709 | /* 214257 */ "VPMADD52LUQZmbkz\0" |
| 58710 | /* 214274 */ "VPSHLDVQZmbkz\0" |
| 58711 | /* 214288 */ "VPSHRDVQZmbkz\0" |
| 58712 | /* 214302 */ "VPDPWSSDSZmbkz\0" |
| 58713 | /* 214317 */ "VPDPBUSDSZmbkz\0" |
| 58714 | /* 214332 */ "VFMADDSUB231PSZmbkz\0" |
| 58715 | /* 214352 */ "VFMSUB231PSZmbkz\0" |
| 58716 | /* 214369 */ "VFNMSUB231PSZmbkz\0" |
| 58717 | /* 214387 */ "VFMSUBADD231PSZmbkz\0" |
| 58718 | /* 214407 */ "VFMADD231PSZmbkz\0" |
| 58719 | /* 214424 */ "VFNMADD231PSZmbkz\0" |
| 58720 | /* 214442 */ "VFMADDSUB132PSZmbkz\0" |
| 58721 | /* 214462 */ "VFMSUB132PSZmbkz\0" |
| 58722 | /* 214479 */ "VFNMSUB132PSZmbkz\0" |
| 58723 | /* 214497 */ "VFMSUBADD132PSZmbkz\0" |
| 58724 | /* 214517 */ "VFMADD132PSZmbkz\0" |
| 58725 | /* 214534 */ "VFNMADD132PSZmbkz\0" |
| 58726 | /* 214552 */ "VEXP2PSZmbkz\0" |
| 58727 | /* 214565 */ "VFMADDSUB213PSZmbkz\0" |
| 58728 | /* 214585 */ "VFMSUB213PSZmbkz\0" |
| 58729 | /* 214602 */ "VFNMSUB213PSZmbkz\0" |
| 58730 | /* 214620 */ "VFMSUBADD213PSZmbkz\0" |
| 58731 | /* 214640 */ "VFMADD213PSZmbkz\0" |
| 58732 | /* 214657 */ "VFNMADD213PSZmbkz\0" |
| 58733 | /* 214675 */ "VRCP14PSZmbkz\0" |
| 58734 | /* 214689 */ "VRSQRT14PSZmbkz\0" |
| 58735 | /* 214705 */ "VDPBF16PSZmbkz\0" |
| 58736 | /* 214720 */ "VRCP28PSZmbkz\0" |
| 58737 | /* 214734 */ "VRSQRT28PSZmbkz\0" |
| 58738 | /* 214750 */ "VGETEXPPSZmbkz\0" |
| 58739 | /* 214765 */ "VSQRTPSZmbkz\0" |
| 58740 | /* 214778 */ "VCVTNE2PS2BF16Z256rmbkz\0" |
| 58741 | /* 214802 */ "VCVTNEPS2BF16Z256rmbkz\0" |
| 58742 | /* 214825 */ "VPMULTISHIFTQBZ256rmbkz\0" |
| 58743 | /* 214849 */ "VPERMI2DZ256rmbkz\0" |
| 58744 | /* 214867 */ "VPERMT2DZ256rmbkz\0" |
| 58745 | /* 214885 */ "VPSUBDZ256rmbkz\0" |
| 58746 | /* 214901 */ "VPADDDZ256rmbkz\0" |
| 58747 | /* 214917 */ "VPANDDZ256rmbkz\0" |
| 58748 | /* 214933 */ "VPMULLDZ256rmbkz\0" |
| 58749 | /* 214950 */ "VPBLENDMDZ256rmbkz\0" |
| 58750 | /* 214969 */ "VPERMDZ256rmbkz\0" |
| 58751 | /* 214985 */ "VPANDNDZ256rmbkz\0" |
| 58752 | /* 215002 */ "VCVTPH2PDZ256rmbkz\0" |
| 58753 | /* 215021 */ "VPERMI2PDZ256rmbkz\0" |
| 58754 | /* 215040 */ "VCVTDQ2PDZ256rmbkz\0" |
| 58755 | /* 215059 */ "VCVTUDQ2PDZ256rmbkz\0" |
| 58756 | /* 215079 */ "VCVTQQ2PDZ256rmbkz\0" |
| 58757 | /* 215098 */ "VCVTUQQ2PDZ256rmbkz\0" |
| 58758 | /* 215118 */ "VCVTPS2PDZ256rmbkz\0" |
| 58759 | /* 215137 */ "VPERMT2PDZ256rmbkz\0" |
| 58760 | /* 215156 */ "VSUBPDZ256rmbkz\0" |
| 58761 | /* 215172 */ "VMINCPDZ256rmbkz\0" |
| 58762 | /* 215189 */ "VMAXCPDZ256rmbkz\0" |
| 58763 | /* 215206 */ "VADDPDZ256rmbkz\0" |
| 58764 | /* 215222 */ "VANDPDZ256rmbkz\0" |
| 58765 | /* 215238 */ "VSCALEFPDZ256rmbkz\0" |
| 58766 | /* 215257 */ "VUNPCKHPDZ256rmbkz\0" |
| 58767 | /* 215276 */ "VPERMILPDZ256rmbkz\0" |
| 58768 | /* 215295 */ "VUNPCKLPDZ256rmbkz\0" |
| 58769 | /* 215314 */ "VMULPDZ256rmbkz\0" |
| 58770 | /* 215330 */ "VBLENDMPDZ256rmbkz\0" |
| 58771 | /* 215349 */ "VPERMPDZ256rmbkz\0" |
| 58772 | /* 215366 */ "VANDNPDZ256rmbkz\0" |
| 58773 | /* 215383 */ "VMINPDZ256rmbkz\0" |
| 58774 | /* 215399 */ "VORPDZ256rmbkz\0" |
| 58775 | /* 215414 */ "VXORPDZ256rmbkz\0" |
| 58776 | /* 215430 */ "VDIVPDZ256rmbkz\0" |
| 58777 | /* 215446 */ "VMAXPDZ256rmbkz\0" |
| 58778 | /* 215462 */ "VPORDZ256rmbkz\0" |
| 58779 | /* 215477 */ "VPXORDZ256rmbkz\0" |
| 58780 | /* 215493 */ "VPABSDZ256rmbkz\0" |
| 58781 | /* 215509 */ "VPMINSDZ256rmbkz\0" |
| 58782 | /* 215526 */ "VPMAXSDZ256rmbkz\0" |
| 58783 | /* 215543 */ "VPCONFLICTDZ256rmbkz\0" |
| 58784 | /* 215564 */ "VPOPCNTDZ256rmbkz\0" |
| 58785 | /* 215582 */ "VPLZCNTDZ256rmbkz\0" |
| 58786 | /* 215600 */ "VPMINUDZ256rmbkz\0" |
| 58787 | /* 215617 */ "VPMAXUDZ256rmbkz\0" |
| 58788 | /* 215634 */ "VPSRAVDZ256rmbkz\0" |
| 58789 | /* 215651 */ "VPSLLVDZ256rmbkz\0" |
| 58790 | /* 215668 */ "VPROLVDZ256rmbkz\0" |
| 58791 | /* 215685 */ "VPSRLVDZ256rmbkz\0" |
| 58792 | /* 215702 */ "VPRORVDZ256rmbkz\0" |
| 58793 | /* 215719 */ "VCVTPD2PHZ256rmbkz\0" |
| 58794 | /* 215738 */ "VCVTDQ2PHZ256rmbkz\0" |
| 58795 | /* 215757 */ "VCVTUDQ2PHZ256rmbkz\0" |
| 58796 | /* 215777 */ "VCVTQQ2PHZ256rmbkz\0" |
| 58797 | /* 215796 */ "VCVTUQQ2PHZ256rmbkz\0" |
| 58798 | /* 215816 */ "VCVTW2PHZ256rmbkz\0" |
| 58799 | /* 215834 */ "VCVTUW2PHZ256rmbkz\0" |
| 58800 | /* 215853 */ "VSUBPHZ256rmbkz\0" |
| 58801 | /* 215869 */ "VFCMULCPHZ256rmbkz\0" |
| 58802 | /* 215888 */ "VFMULCPHZ256rmbkz\0" |
| 58803 | /* 215906 */ "VMINCPHZ256rmbkz\0" |
| 58804 | /* 215923 */ "VMAXCPHZ256rmbkz\0" |
| 58805 | /* 215940 */ "VADDPHZ256rmbkz\0" |
| 58806 | /* 215956 */ "VSCALEFPHZ256rmbkz\0" |
| 58807 | /* 215975 */ "VMULPHZ256rmbkz\0" |
| 58808 | /* 215991 */ "VMINPHZ256rmbkz\0" |
| 58809 | /* 216007 */ "VDIVPHZ256rmbkz\0" |
| 58810 | /* 216023 */ "VMAXPHZ256rmbkz\0" |
| 58811 | /* 216039 */ "VPERMI2QZ256rmbkz\0" |
| 58812 | /* 216057 */ "VPERMT2QZ256rmbkz\0" |
| 58813 | /* 216075 */ "VPSUBQZ256rmbkz\0" |
| 58814 | /* 216091 */ "VCVTTPD2DQZ256rmbkz\0" |
| 58815 | /* 216111 */ "VCVTPD2DQZ256rmbkz\0" |
| 58816 | /* 216130 */ "VCVTTPH2DQZ256rmbkz\0" |
| 58817 | /* 216150 */ "VCVTPH2DQZ256rmbkz\0" |
| 58818 | /* 216169 */ "VCVTTPS2DQZ256rmbkz\0" |
| 58819 | /* 216189 */ "VCVTPS2DQZ256rmbkz\0" |
| 58820 | /* 216208 */ "VPADDQZ256rmbkz\0" |
| 58821 | /* 216224 */ "VPUNPCKHDQZ256rmbkz\0" |
| 58822 | /* 216244 */ "VPUNPCKLDQZ256rmbkz\0" |
| 58823 | /* 216264 */ "VPMULDQZ256rmbkz\0" |
| 58824 | /* 216281 */ "VPANDQZ256rmbkz\0" |
| 58825 | /* 216297 */ "VPUNPCKHQDQZ256rmbkz\0" |
| 58826 | /* 216318 */ "VPUNPCKLQDQZ256rmbkz\0" |
| 58827 | /* 216339 */ "VCVTTPD2UDQZ256rmbkz\0" |
| 58828 | /* 216360 */ "VCVTPD2UDQZ256rmbkz\0" |
| 58829 | /* 216380 */ "VCVTTPH2UDQZ256rmbkz\0" |
| 58830 | /* 216401 */ "VCVTPH2UDQZ256rmbkz\0" |
| 58831 | /* 216421 */ "VCVTTPS2UDQZ256rmbkz\0" |
| 58832 | /* 216442 */ "VCVTPS2UDQZ256rmbkz\0" |
| 58833 | /* 216462 */ "VPMULUDQZ256rmbkz\0" |
| 58834 | /* 216480 */ "VPMULLQZ256rmbkz\0" |
| 58835 | /* 216497 */ "VPBLENDMQZ256rmbkz\0" |
| 58836 | /* 216516 */ "VPERMQZ256rmbkz\0" |
| 58837 | /* 216532 */ "VPANDNQZ256rmbkz\0" |
| 58838 | /* 216549 */ "VCVTTPD2QQZ256rmbkz\0" |
| 58839 | /* 216569 */ "VCVTPD2QQZ256rmbkz\0" |
| 58840 | /* 216588 */ "VCVTTPH2QQZ256rmbkz\0" |
| 58841 | /* 216608 */ "VCVTPH2QQZ256rmbkz\0" |
| 58842 | /* 216627 */ "VCVTTPS2QQZ256rmbkz\0" |
| 58843 | /* 216647 */ "VCVTPS2QQZ256rmbkz\0" |
| 58844 | /* 216666 */ "VCVTTPD2UQQZ256rmbkz\0" |
| 58845 | /* 216687 */ "VCVTPD2UQQZ256rmbkz\0" |
| 58846 | /* 216707 */ "VCVTTPH2UQQZ256rmbkz\0" |
| 58847 | /* 216728 */ "VCVTPH2UQQZ256rmbkz\0" |
| 58848 | /* 216748 */ "VCVTTPS2UQQZ256rmbkz\0" |
| 58849 | /* 216769 */ "VCVTPS2UQQZ256rmbkz\0" |
| 58850 | /* 216789 */ "VPORQZ256rmbkz\0" |
| 58851 | /* 216804 */ "VPXORQZ256rmbkz\0" |
| 58852 | /* 216820 */ "VPABSQZ256rmbkz\0" |
| 58853 | /* 216836 */ "VPMINSQZ256rmbkz\0" |
| 58854 | /* 216853 */ "VPMAXSQZ256rmbkz\0" |
| 58855 | /* 216870 */ "VPCONFLICTQZ256rmbkz\0" |
| 58856 | /* 216891 */ "VPOPCNTQZ256rmbkz\0" |
| 58857 | /* 216909 */ "VPLZCNTQZ256rmbkz\0" |
| 58858 | /* 216927 */ "VPMINUQZ256rmbkz\0" |
| 58859 | /* 216944 */ "VPMAXUQZ256rmbkz\0" |
| 58860 | /* 216961 */ "VPSRAVQZ256rmbkz\0" |
| 58861 | /* 216978 */ "VPSLLVQZ256rmbkz\0" |
| 58862 | /* 216995 */ "VPROLVQZ256rmbkz\0" |
| 58863 | /* 217012 */ "VPSRLVQZ256rmbkz\0" |
| 58864 | /* 217029 */ "VPRORVQZ256rmbkz\0" |
| 58865 | /* 217046 */ "VCVTPD2PSZ256rmbkz\0" |
| 58866 | /* 217065 */ "VPERMI2PSZ256rmbkz\0" |
| 58867 | /* 217084 */ "VCVTDQ2PSZ256rmbkz\0" |
| 58868 | /* 217103 */ "VCVTUDQ2PSZ256rmbkz\0" |
| 58869 | /* 217123 */ "VCVTQQ2PSZ256rmbkz\0" |
| 58870 | /* 217142 */ "VCVTUQQ2PSZ256rmbkz\0" |
| 58871 | /* 217162 */ "VPERMT2PSZ256rmbkz\0" |
| 58872 | /* 217181 */ "VSUBPSZ256rmbkz\0" |
| 58873 | /* 217197 */ "VMINCPSZ256rmbkz\0" |
| 58874 | /* 217214 */ "VMAXCPSZ256rmbkz\0" |
| 58875 | /* 217231 */ "VADDPSZ256rmbkz\0" |
| 58876 | /* 217247 */ "VANDPSZ256rmbkz\0" |
| 58877 | /* 217263 */ "VSCALEFPSZ256rmbkz\0" |
| 58878 | /* 217282 */ "VUNPCKHPSZ256rmbkz\0" |
| 58879 | /* 217301 */ "VPERMILPSZ256rmbkz\0" |
| 58880 | /* 217320 */ "VUNPCKLPSZ256rmbkz\0" |
| 58881 | /* 217339 */ "VMULPSZ256rmbkz\0" |
| 58882 | /* 217355 */ "VBLENDMPSZ256rmbkz\0" |
| 58883 | /* 217374 */ "VPERMPSZ256rmbkz\0" |
| 58884 | /* 217391 */ "VANDNPSZ256rmbkz\0" |
| 58885 | /* 217408 */ "VMINPSZ256rmbkz\0" |
| 58886 | /* 217424 */ "VORPSZ256rmbkz\0" |
| 58887 | /* 217439 */ "VXORPSZ256rmbkz\0" |
| 58888 | /* 217455 */ "VDIVPSZ256rmbkz\0" |
| 58889 | /* 217471 */ "VMAXPSZ256rmbkz\0" |
| 58890 | /* 217487 */ "VCVTTPH2WZ256rmbkz\0" |
| 58891 | /* 217506 */ "VCVTPH2WZ256rmbkz\0" |
| 58892 | /* 217524 */ "VPACKSSDWZ256rmbkz\0" |
| 58893 | /* 217543 */ "VPACKUSDWZ256rmbkz\0" |
| 58894 | /* 217562 */ "VCVTTPH2UWZ256rmbkz\0" |
| 58895 | /* 217582 */ "VCVTPH2UWZ256rmbkz\0" |
| 58896 | /* 217601 */ "VCVTPS2PHXZ256rmbkz\0" |
| 58897 | /* 217621 */ "VCVTPH2PSXZ256rmbkz\0" |
| 58898 | /* 217641 */ "VCVTNE2PS2BF16Z128rmbkz\0" |
| 58899 | /* 217665 */ "VCVTNEPS2BF16Z128rmbkz\0" |
| 58900 | /* 217688 */ "VPMULTISHIFTQBZ128rmbkz\0" |
| 58901 | /* 217712 */ "VPERMI2DZ128rmbkz\0" |
| 58902 | /* 217730 */ "VPERMT2DZ128rmbkz\0" |
| 58903 | /* 217748 */ "VPSUBDZ128rmbkz\0" |
| 58904 | /* 217764 */ "VPADDDZ128rmbkz\0" |
| 58905 | /* 217780 */ "VPANDDZ128rmbkz\0" |
| 58906 | /* 217796 */ "VPMULLDZ128rmbkz\0" |
| 58907 | /* 217813 */ "VPBLENDMDZ128rmbkz\0" |
| 58908 | /* 217832 */ "VPANDNDZ128rmbkz\0" |
| 58909 | /* 217849 */ "VCVTPH2PDZ128rmbkz\0" |
| 58910 | /* 217868 */ "VPERMI2PDZ128rmbkz\0" |
| 58911 | /* 217887 */ "VCVTDQ2PDZ128rmbkz\0" |
| 58912 | /* 217906 */ "VCVTUDQ2PDZ128rmbkz\0" |
| 58913 | /* 217926 */ "VCVTQQ2PDZ128rmbkz\0" |
| 58914 | /* 217945 */ "VCVTUQQ2PDZ128rmbkz\0" |
| 58915 | /* 217965 */ "VCVTPS2PDZ128rmbkz\0" |
| 58916 | /* 217984 */ "VPERMT2PDZ128rmbkz\0" |
| 58917 | /* 218003 */ "VSUBPDZ128rmbkz\0" |
| 58918 | /* 218019 */ "VMINCPDZ128rmbkz\0" |
| 58919 | /* 218036 */ "VMAXCPDZ128rmbkz\0" |
| 58920 | /* 218053 */ "VADDPDZ128rmbkz\0" |
| 58921 | /* 218069 */ "VANDPDZ128rmbkz\0" |
| 58922 | /* 218085 */ "VSCALEFPDZ128rmbkz\0" |
| 58923 | /* 218104 */ "VUNPCKHPDZ128rmbkz\0" |
| 58924 | /* 218123 */ "VPERMILPDZ128rmbkz\0" |
| 58925 | /* 218142 */ "VUNPCKLPDZ128rmbkz\0" |
| 58926 | /* 218161 */ "VMULPDZ128rmbkz\0" |
| 58927 | /* 218177 */ "VBLENDMPDZ128rmbkz\0" |
| 58928 | /* 218196 */ "VANDNPDZ128rmbkz\0" |
| 58929 | /* 218213 */ "VMINPDZ128rmbkz\0" |
| 58930 | /* 218229 */ "VORPDZ128rmbkz\0" |
| 58931 | /* 218244 */ "VXORPDZ128rmbkz\0" |
| 58932 | /* 218260 */ "VDIVPDZ128rmbkz\0" |
| 58933 | /* 218276 */ "VMAXPDZ128rmbkz\0" |
| 58934 | /* 218292 */ "VPORDZ128rmbkz\0" |
| 58935 | /* 218307 */ "VPXORDZ128rmbkz\0" |
| 58936 | /* 218323 */ "VPABSDZ128rmbkz\0" |
| 58937 | /* 218339 */ "VPMINSDZ128rmbkz\0" |
| 58938 | /* 218356 */ "VPMAXSDZ128rmbkz\0" |
| 58939 | /* 218373 */ "VPCONFLICTDZ128rmbkz\0" |
| 58940 | /* 218394 */ "VPOPCNTDZ128rmbkz\0" |
| 58941 | /* 218412 */ "VPLZCNTDZ128rmbkz\0" |
| 58942 | /* 218430 */ "VPMINUDZ128rmbkz\0" |
| 58943 | /* 218447 */ "VPMAXUDZ128rmbkz\0" |
| 58944 | /* 218464 */ "VPSRAVDZ128rmbkz\0" |
| 58945 | /* 218481 */ "VPSLLVDZ128rmbkz\0" |
| 58946 | /* 218498 */ "VPROLVDZ128rmbkz\0" |
| 58947 | /* 218515 */ "VPSRLVDZ128rmbkz\0" |
| 58948 | /* 218532 */ "VPRORVDZ128rmbkz\0" |
| 58949 | /* 218549 */ "VCVTPD2PHZ128rmbkz\0" |
| 58950 | /* 218568 */ "VCVTDQ2PHZ128rmbkz\0" |
| 58951 | /* 218587 */ "VCVTUDQ2PHZ128rmbkz\0" |
| 58952 | /* 218607 */ "VCVTQQ2PHZ128rmbkz\0" |
| 58953 | /* 218626 */ "VCVTUQQ2PHZ128rmbkz\0" |
| 58954 | /* 218646 */ "VCVTW2PHZ128rmbkz\0" |
| 58955 | /* 218664 */ "VCVTUW2PHZ128rmbkz\0" |
| 58956 | /* 218683 */ "VSUBPHZ128rmbkz\0" |
| 58957 | /* 218699 */ "VFCMULCPHZ128rmbkz\0" |
| 58958 | /* 218718 */ "VFMULCPHZ128rmbkz\0" |
| 58959 | /* 218736 */ "VMINCPHZ128rmbkz\0" |
| 58960 | /* 218753 */ "VMAXCPHZ128rmbkz\0" |
| 58961 | /* 218770 */ "VADDPHZ128rmbkz\0" |
| 58962 | /* 218786 */ "VSCALEFPHZ128rmbkz\0" |
| 58963 | /* 218805 */ "VMULPHZ128rmbkz\0" |
| 58964 | /* 218821 */ "VMINPHZ128rmbkz\0" |
| 58965 | /* 218837 */ "VDIVPHZ128rmbkz\0" |
| 58966 | /* 218853 */ "VMAXPHZ128rmbkz\0" |
| 58967 | /* 218869 */ "VPERMI2QZ128rmbkz\0" |
| 58968 | /* 218887 */ "VPERMT2QZ128rmbkz\0" |
| 58969 | /* 218905 */ "VPSUBQZ128rmbkz\0" |
| 58970 | /* 218921 */ "VCVTTPD2DQZ128rmbkz\0" |
| 58971 | /* 218941 */ "VCVTPD2DQZ128rmbkz\0" |
| 58972 | /* 218960 */ "VCVTTPH2DQZ128rmbkz\0" |
| 58973 | /* 218980 */ "VCVTPH2DQZ128rmbkz\0" |
| 58974 | /* 218999 */ "VCVTTPS2DQZ128rmbkz\0" |
| 58975 | /* 219019 */ "VCVTPS2DQZ128rmbkz\0" |
| 58976 | /* 219038 */ "VPADDQZ128rmbkz\0" |
| 58977 | /* 219054 */ "VPUNPCKHDQZ128rmbkz\0" |
| 58978 | /* 219074 */ "VPUNPCKLDQZ128rmbkz\0" |
| 58979 | /* 219094 */ "VPMULDQZ128rmbkz\0" |
| 58980 | /* 219111 */ "VPANDQZ128rmbkz\0" |
| 58981 | /* 219127 */ "VPUNPCKHQDQZ128rmbkz\0" |
| 58982 | /* 219148 */ "VPUNPCKLQDQZ128rmbkz\0" |
| 58983 | /* 219169 */ "VCVTTPD2UDQZ128rmbkz\0" |
| 58984 | /* 219190 */ "VCVTPD2UDQZ128rmbkz\0" |
| 58985 | /* 219210 */ "VCVTTPH2UDQZ128rmbkz\0" |
| 58986 | /* 219231 */ "VCVTPH2UDQZ128rmbkz\0" |
| 58987 | /* 219251 */ "VCVTTPS2UDQZ128rmbkz\0" |
| 58988 | /* 219272 */ "VCVTPS2UDQZ128rmbkz\0" |
| 58989 | /* 219292 */ "VPMULUDQZ128rmbkz\0" |
| 58990 | /* 219310 */ "VPMULLQZ128rmbkz\0" |
| 58991 | /* 219327 */ "VPBLENDMQZ128rmbkz\0" |
| 58992 | /* 219346 */ "VPANDNQZ128rmbkz\0" |
| 58993 | /* 219363 */ "VCVTTPD2QQZ128rmbkz\0" |
| 58994 | /* 219383 */ "VCVTPD2QQZ128rmbkz\0" |
| 58995 | /* 219402 */ "VCVTTPH2QQZ128rmbkz\0" |
| 58996 | /* 219422 */ "VCVTPH2QQZ128rmbkz\0" |
| 58997 | /* 219441 */ "VCVTTPS2QQZ128rmbkz\0" |
| 58998 | /* 219461 */ "VCVTPS2QQZ128rmbkz\0" |
| 58999 | /* 219480 */ "VCVTTPD2UQQZ128rmbkz\0" |
| 59000 | /* 219501 */ "VCVTPD2UQQZ128rmbkz\0" |
| 59001 | /* 219521 */ "VCVTTPH2UQQZ128rmbkz\0" |
| 59002 | /* 219542 */ "VCVTPH2UQQZ128rmbkz\0" |
| 59003 | /* 219562 */ "VCVTTPS2UQQZ128rmbkz\0" |
| 59004 | /* 219583 */ "VCVTPS2UQQZ128rmbkz\0" |
| 59005 | /* 219603 */ "VPORQZ128rmbkz\0" |
| 59006 | /* 219618 */ "VPXORQZ128rmbkz\0" |
| 59007 | /* 219634 */ "VPABSQZ128rmbkz\0" |
| 59008 | /* 219650 */ "VPMINSQZ128rmbkz\0" |
| 59009 | /* 219667 */ "VPMAXSQZ128rmbkz\0" |
| 59010 | /* 219684 */ "VPCONFLICTQZ128rmbkz\0" |
| 59011 | /* 219705 */ "VPOPCNTQZ128rmbkz\0" |
| 59012 | /* 219723 */ "VPLZCNTQZ128rmbkz\0" |
| 59013 | /* 219741 */ "VPMINUQZ128rmbkz\0" |
| 59014 | /* 219758 */ "VPMAXUQZ128rmbkz\0" |
| 59015 | /* 219775 */ "VPSRAVQZ128rmbkz\0" |
| 59016 | /* 219792 */ "VPSLLVQZ128rmbkz\0" |
| 59017 | /* 219809 */ "VPROLVQZ128rmbkz\0" |
| 59018 | /* 219826 */ "VPSRLVQZ128rmbkz\0" |
| 59019 | /* 219843 */ "VPRORVQZ128rmbkz\0" |
| 59020 | /* 219860 */ "VCVTPD2PSZ128rmbkz\0" |
| 59021 | /* 219879 */ "VPERMI2PSZ128rmbkz\0" |
| 59022 | /* 219898 */ "VCVTDQ2PSZ128rmbkz\0" |
| 59023 | /* 219917 */ "VCVTUDQ2PSZ128rmbkz\0" |
| 59024 | /* 219937 */ "VCVTQQ2PSZ128rmbkz\0" |
| 59025 | /* 219956 */ "VCVTUQQ2PSZ128rmbkz\0" |
| 59026 | /* 219976 */ "VPERMT2PSZ128rmbkz\0" |
| 59027 | /* 219995 */ "VSUBPSZ128rmbkz\0" |
| 59028 | /* 220011 */ "VMINCPSZ128rmbkz\0" |
| 59029 | /* 220028 */ "VMAXCPSZ128rmbkz\0" |
| 59030 | /* 220045 */ "VADDPSZ128rmbkz\0" |
| 59031 | /* 220061 */ "VANDPSZ128rmbkz\0" |
| 59032 | /* 220077 */ "VSCALEFPSZ128rmbkz\0" |
| 59033 | /* 220096 */ "VUNPCKHPSZ128rmbkz\0" |
| 59034 | /* 220115 */ "VPERMILPSZ128rmbkz\0" |
| 59035 | /* 220134 */ "VUNPCKLPSZ128rmbkz\0" |
| 59036 | /* 220153 */ "VMULPSZ128rmbkz\0" |
| 59037 | /* 220169 */ "VBLENDMPSZ128rmbkz\0" |
| 59038 | /* 220188 */ "VANDNPSZ128rmbkz\0" |
| 59039 | /* 220205 */ "VMINPSZ128rmbkz\0" |
| 59040 | /* 220221 */ "VORPSZ128rmbkz\0" |
| 59041 | /* 220236 */ "VXORPSZ128rmbkz\0" |
| 59042 | /* 220252 */ "VDIVPSZ128rmbkz\0" |
| 59043 | /* 220268 */ "VMAXPSZ128rmbkz\0" |
| 59044 | /* 220284 */ "VCVTTPH2WZ128rmbkz\0" |
| 59045 | /* 220303 */ "VCVTPH2WZ128rmbkz\0" |
| 59046 | /* 220321 */ "VPACKSSDWZ128rmbkz\0" |
| 59047 | /* 220340 */ "VPACKUSDWZ128rmbkz\0" |
| 59048 | /* 220359 */ "VCVTTPH2UWZ128rmbkz\0" |
| 59049 | /* 220379 */ "VCVTPH2UWZ128rmbkz\0" |
| 59050 | /* 220398 */ "VCVTPS2PHXZ128rmbkz\0" |
| 59051 | /* 220418 */ "VCVTPH2PSXZ128rmbkz\0" |
| 59052 | /* 220438 */ "VCVTNE2PS2BF16Zrmbkz\0" |
| 59053 | /* 220459 */ "VCVTNEPS2BF16Zrmbkz\0" |
| 59054 | /* 220479 */ "VPMULTISHIFTQBZrmbkz\0" |
| 59055 | /* 220500 */ "VPERMI2DZrmbkz\0" |
| 59056 | /* 220515 */ "VPERMT2DZrmbkz\0" |
| 59057 | /* 220530 */ "VPSUBDZrmbkz\0" |
| 59058 | /* 220543 */ "VPADDDZrmbkz\0" |
| 59059 | /* 220556 */ "VPANDDZrmbkz\0" |
| 59060 | /* 220569 */ "VPMULLDZrmbkz\0" |
| 59061 | /* 220583 */ "VPBLENDMDZrmbkz\0" |
| 59062 | /* 220599 */ "VPERMDZrmbkz\0" |
| 59063 | /* 220612 */ "VPANDNDZrmbkz\0" |
| 59064 | /* 220626 */ "VCVTPH2PDZrmbkz\0" |
| 59065 | /* 220642 */ "VPERMI2PDZrmbkz\0" |
| 59066 | /* 220658 */ "VCVTDQ2PDZrmbkz\0" |
| 59067 | /* 220674 */ "VCVTUDQ2PDZrmbkz\0" |
| 59068 | /* 220691 */ "VCVTQQ2PDZrmbkz\0" |
| 59069 | /* 220707 */ "VCVTUQQ2PDZrmbkz\0" |
| 59070 | /* 220724 */ "VCVTPS2PDZrmbkz\0" |
| 59071 | /* 220740 */ "VPERMT2PDZrmbkz\0" |
| 59072 | /* 220756 */ "VSUBPDZrmbkz\0" |
| 59073 | /* 220769 */ "VMINCPDZrmbkz\0" |
| 59074 | /* 220783 */ "VMAXCPDZrmbkz\0" |
| 59075 | /* 220797 */ "VADDPDZrmbkz\0" |
| 59076 | /* 220810 */ "VANDPDZrmbkz\0" |
| 59077 | /* 220823 */ "VSCALEFPDZrmbkz\0" |
| 59078 | /* 220839 */ "VUNPCKHPDZrmbkz\0" |
| 59079 | /* 220855 */ "VPERMILPDZrmbkz\0" |
| 59080 | /* 220871 */ "VUNPCKLPDZrmbkz\0" |
| 59081 | /* 220887 */ "VMULPDZrmbkz\0" |
| 59082 | /* 220900 */ "VBLENDMPDZrmbkz\0" |
| 59083 | /* 220916 */ "VPERMPDZrmbkz\0" |
| 59084 | /* 220930 */ "VANDNPDZrmbkz\0" |
| 59085 | /* 220944 */ "VMINPDZrmbkz\0" |
| 59086 | /* 220957 */ "VORPDZrmbkz\0" |
| 59087 | /* 220969 */ "VXORPDZrmbkz\0" |
| 59088 | /* 220982 */ "VDIVPDZrmbkz\0" |
| 59089 | /* 220995 */ "VMAXPDZrmbkz\0" |
| 59090 | /* 221008 */ "VPORDZrmbkz\0" |
| 59091 | /* 221020 */ "VPXORDZrmbkz\0" |
| 59092 | /* 221033 */ "VPABSDZrmbkz\0" |
| 59093 | /* 221046 */ "VPMINSDZrmbkz\0" |
| 59094 | /* 221060 */ "VPMAXSDZrmbkz\0" |
| 59095 | /* 221074 */ "VPCONFLICTDZrmbkz\0" |
| 59096 | /* 221092 */ "VPOPCNTDZrmbkz\0" |
| 59097 | /* 221107 */ "VPLZCNTDZrmbkz\0" |
| 59098 | /* 221122 */ "VPMINUDZrmbkz\0" |
| 59099 | /* 221136 */ "VPMAXUDZrmbkz\0" |
| 59100 | /* 221150 */ "VPSRAVDZrmbkz\0" |
| 59101 | /* 221164 */ "VPSLLVDZrmbkz\0" |
| 59102 | /* 221178 */ "VPROLVDZrmbkz\0" |
| 59103 | /* 221192 */ "VPSRLVDZrmbkz\0" |
| 59104 | /* 221206 */ "VPRORVDZrmbkz\0" |
| 59105 | /* 221220 */ "VCVTPD2PHZrmbkz\0" |
| 59106 | /* 221236 */ "VCVTDQ2PHZrmbkz\0" |
| 59107 | /* 221252 */ "VCVTUDQ2PHZrmbkz\0" |
| 59108 | /* 221269 */ "VCVTQQ2PHZrmbkz\0" |
| 59109 | /* 221285 */ "VCVTUQQ2PHZrmbkz\0" |
| 59110 | /* 221302 */ "VCVTW2PHZrmbkz\0" |
| 59111 | /* 221317 */ "VCVTUW2PHZrmbkz\0" |
| 59112 | /* 221333 */ "VSUBPHZrmbkz\0" |
| 59113 | /* 221346 */ "VFCMULCPHZrmbkz\0" |
| 59114 | /* 221362 */ "VFMULCPHZrmbkz\0" |
| 59115 | /* 221377 */ "VMINCPHZrmbkz\0" |
| 59116 | /* 221391 */ "VMAXCPHZrmbkz\0" |
| 59117 | /* 221405 */ "VADDPHZrmbkz\0" |
| 59118 | /* 221418 */ "VSCALEFPHZrmbkz\0" |
| 59119 | /* 221434 */ "VMULPHZrmbkz\0" |
| 59120 | /* 221447 */ "VMINPHZrmbkz\0" |
| 59121 | /* 221460 */ "VDIVPHZrmbkz\0" |
| 59122 | /* 221473 */ "VMAXPHZrmbkz\0" |
| 59123 | /* 221486 */ "VPERMI2QZrmbkz\0" |
| 59124 | /* 221501 */ "VPERMT2QZrmbkz\0" |
| 59125 | /* 221516 */ "VPSUBQZrmbkz\0" |
| 59126 | /* 221529 */ "VCVTTPD2DQZrmbkz\0" |
| 59127 | /* 221546 */ "VCVTPD2DQZrmbkz\0" |
| 59128 | /* 221562 */ "VCVTTPH2DQZrmbkz\0" |
| 59129 | /* 221579 */ "VCVTPH2DQZrmbkz\0" |
| 59130 | /* 221595 */ "VCVTTPS2DQZrmbkz\0" |
| 59131 | /* 221612 */ "VCVTPS2DQZrmbkz\0" |
| 59132 | /* 221628 */ "VPADDQZrmbkz\0" |
| 59133 | /* 221641 */ "VPUNPCKHDQZrmbkz\0" |
| 59134 | /* 221658 */ "VPUNPCKLDQZrmbkz\0" |
| 59135 | /* 221675 */ "VPMULDQZrmbkz\0" |
| 59136 | /* 221689 */ "VPANDQZrmbkz\0" |
| 59137 | /* 221702 */ "VPUNPCKHQDQZrmbkz\0" |
| 59138 | /* 221720 */ "VPUNPCKLQDQZrmbkz\0" |
| 59139 | /* 221738 */ "VCVTTPD2UDQZrmbkz\0" |
| 59140 | /* 221756 */ "VCVTPD2UDQZrmbkz\0" |
| 59141 | /* 221773 */ "VCVTTPH2UDQZrmbkz\0" |
| 59142 | /* 221791 */ "VCVTPH2UDQZrmbkz\0" |
| 59143 | /* 221808 */ "VCVTTPS2UDQZrmbkz\0" |
| 59144 | /* 221826 */ "VCVTPS2UDQZrmbkz\0" |
| 59145 | /* 221843 */ "VPMULUDQZrmbkz\0" |
| 59146 | /* 221858 */ "VPMULLQZrmbkz\0" |
| 59147 | /* 221872 */ "VPBLENDMQZrmbkz\0" |
| 59148 | /* 221888 */ "VPERMQZrmbkz\0" |
| 59149 | /* 221901 */ "VPANDNQZrmbkz\0" |
| 59150 | /* 221915 */ "VCVTTPD2QQZrmbkz\0" |
| 59151 | /* 221932 */ "VCVTPD2QQZrmbkz\0" |
| 59152 | /* 221948 */ "VCVTTPH2QQZrmbkz\0" |
| 59153 | /* 221965 */ "VCVTPH2QQZrmbkz\0" |
| 59154 | /* 221981 */ "VCVTTPS2QQZrmbkz\0" |
| 59155 | /* 221998 */ "VCVTPS2QQZrmbkz\0" |
| 59156 | /* 222014 */ "VCVTTPD2UQQZrmbkz\0" |
| 59157 | /* 222032 */ "VCVTPD2UQQZrmbkz\0" |
| 59158 | /* 222049 */ "VCVTTPH2UQQZrmbkz\0" |
| 59159 | /* 222067 */ "VCVTPH2UQQZrmbkz\0" |
| 59160 | /* 222084 */ "VCVTTPS2UQQZrmbkz\0" |
| 59161 | /* 222102 */ "VCVTPS2UQQZrmbkz\0" |
| 59162 | /* 222119 */ "VPORQZrmbkz\0" |
| 59163 | /* 222131 */ "VPXORQZrmbkz\0" |
| 59164 | /* 222144 */ "VPABSQZrmbkz\0" |
| 59165 | /* 222157 */ "VPMINSQZrmbkz\0" |
| 59166 | /* 222171 */ "VPMAXSQZrmbkz\0" |
| 59167 | /* 222185 */ "VPCONFLICTQZrmbkz\0" |
| 59168 | /* 222203 */ "VPOPCNTQZrmbkz\0" |
| 59169 | /* 222218 */ "VPLZCNTQZrmbkz\0" |
| 59170 | /* 222233 */ "VPMINUQZrmbkz\0" |
| 59171 | /* 222247 */ "VPMAXUQZrmbkz\0" |
| 59172 | /* 222261 */ "VPSRAVQZrmbkz\0" |
| 59173 | /* 222275 */ "VPSLLVQZrmbkz\0" |
| 59174 | /* 222289 */ "VPROLVQZrmbkz\0" |
| 59175 | /* 222303 */ "VPSRLVQZrmbkz\0" |
| 59176 | /* 222317 */ "VPRORVQZrmbkz\0" |
| 59177 | /* 222331 */ "VCVTPD2PSZrmbkz\0" |
| 59178 | /* 222347 */ "VPERMI2PSZrmbkz\0" |
| 59179 | /* 222363 */ "VCVTDQ2PSZrmbkz\0" |
| 59180 | /* 222379 */ "VCVTUDQ2PSZrmbkz\0" |
| 59181 | /* 222396 */ "VCVTQQ2PSZrmbkz\0" |
| 59182 | /* 222412 */ "VCVTUQQ2PSZrmbkz\0" |
| 59183 | /* 222429 */ "VPERMT2PSZrmbkz\0" |
| 59184 | /* 222445 */ "VSUBPSZrmbkz\0" |
| 59185 | /* 222458 */ "VMINCPSZrmbkz\0" |
| 59186 | /* 222472 */ "VMAXCPSZrmbkz\0" |
| 59187 | /* 222486 */ "VADDPSZrmbkz\0" |
| 59188 | /* 222499 */ "VANDPSZrmbkz\0" |
| 59189 | /* 222512 */ "VSCALEFPSZrmbkz\0" |
| 59190 | /* 222528 */ "VUNPCKHPSZrmbkz\0" |
| 59191 | /* 222544 */ "VPERMILPSZrmbkz\0" |
| 59192 | /* 222560 */ "VUNPCKLPSZrmbkz\0" |
| 59193 | /* 222576 */ "VMULPSZrmbkz\0" |
| 59194 | /* 222589 */ "VBLENDMPSZrmbkz\0" |
| 59195 | /* 222605 */ "VPERMPSZrmbkz\0" |
| 59196 | /* 222619 */ "VANDNPSZrmbkz\0" |
| 59197 | /* 222633 */ "VMINPSZrmbkz\0" |
| 59198 | /* 222646 */ "VORPSZrmbkz\0" |
| 59199 | /* 222658 */ "VXORPSZrmbkz\0" |
| 59200 | /* 222671 */ "VDIVPSZrmbkz\0" |
| 59201 | /* 222684 */ "VMAXPSZrmbkz\0" |
| 59202 | /* 222697 */ "VCVTTPH2WZrmbkz\0" |
| 59203 | /* 222713 */ "VCVTPH2WZrmbkz\0" |
| 59204 | /* 222728 */ "VPACKSSDWZrmbkz\0" |
| 59205 | /* 222744 */ "VPACKUSDWZrmbkz\0" |
| 59206 | /* 222760 */ "VCVTTPH2UWZrmbkz\0" |
| 59207 | /* 222777 */ "VCVTPH2UWZrmbkz\0" |
| 59208 | /* 222793 */ "VCVTPS2PHXZrmbkz\0" |
| 59209 | /* 222810 */ "VCVTPH2PSXZrmbkz\0" |
| 59210 | /* 222827 */ "VFMADDSUB231PDZrbkz\0" |
| 59211 | /* 222847 */ "VFMSUB231PDZrbkz\0" |
| 59212 | /* 222864 */ "VFNMSUB231PDZrbkz\0" |
| 59213 | /* 222882 */ "VFMSUBADD231PDZrbkz\0" |
| 59214 | /* 222902 */ "VFMADD231PDZrbkz\0" |
| 59215 | /* 222919 */ "VFNMADD231PDZrbkz\0" |
| 59216 | /* 222937 */ "VFMADDSUB132PDZrbkz\0" |
| 59217 | /* 222957 */ "VFMSUB132PDZrbkz\0" |
| 59218 | /* 222974 */ "VFNMSUB132PDZrbkz\0" |
| 59219 | /* 222992 */ "VFMSUBADD132PDZrbkz\0" |
| 59220 | /* 223012 */ "VFMADD132PDZrbkz\0" |
| 59221 | /* 223029 */ "VFNMADD132PDZrbkz\0" |
| 59222 | /* 223047 */ "VEXP2PDZrbkz\0" |
| 59223 | /* 223060 */ "VFMADDSUB213PDZrbkz\0" |
| 59224 | /* 223080 */ "VFMSUB213PDZrbkz\0" |
| 59225 | /* 223097 */ "VFNMSUB213PDZrbkz\0" |
| 59226 | /* 223115 */ "VFMSUBADD213PDZrbkz\0" |
| 59227 | /* 223135 */ "VFMADD213PDZrbkz\0" |
| 59228 | /* 223152 */ "VFNMADD213PDZrbkz\0" |
| 59229 | /* 223170 */ "VRCP28PDZrbkz\0" |
| 59230 | /* 223184 */ "VRSQRT28PDZrbkz\0" |
| 59231 | /* 223200 */ "VGETEXPPDZrbkz\0" |
| 59232 | /* 223215 */ "VSQRTPDZrbkz\0" |
| 59233 | /* 223228 */ "VRCP28SDZrbkz\0" |
| 59234 | /* 223242 */ "VRSQRT28SDZrbkz\0" |
| 59235 | /* 223258 */ "VGETEXPSDZrbkz\0" |
| 59236 | /* 223273 */ "VFMADDSUB231PHZrbkz\0" |
| 59237 | /* 223293 */ "VFMSUB231PHZrbkz\0" |
| 59238 | /* 223310 */ "VFNMSUB231PHZrbkz\0" |
| 59239 | /* 223328 */ "VFMSUBADD231PHZrbkz\0" |
| 59240 | /* 223348 */ "VFMADD231PHZrbkz\0" |
| 59241 | /* 223365 */ "VFNMADD231PHZrbkz\0" |
| 59242 | /* 223383 */ "VFMADDSUB132PHZrbkz\0" |
| 59243 | /* 223403 */ "VFMSUB132PHZrbkz\0" |
| 59244 | /* 223420 */ "VFNMSUB132PHZrbkz\0" |
| 59245 | /* 223438 */ "VFMSUBADD132PHZrbkz\0" |
| 59246 | /* 223458 */ "VFMADD132PHZrbkz\0" |
| 59247 | /* 223475 */ "VFNMADD132PHZrbkz\0" |
| 59248 | /* 223493 */ "VFMADDSUB213PHZrbkz\0" |
| 59249 | /* 223513 */ "VFMSUB213PHZrbkz\0" |
| 59250 | /* 223530 */ "VFNMSUB213PHZrbkz\0" |
| 59251 | /* 223548 */ "VFMSUBADD213PHZrbkz\0" |
| 59252 | /* 223568 */ "VFMADD213PHZrbkz\0" |
| 59253 | /* 223585 */ "VFNMADD213PHZrbkz\0" |
| 59254 | /* 223603 */ "VFCMADDCPHZrbkz\0" |
| 59255 | /* 223619 */ "VFMADDCPHZrbkz\0" |
| 59256 | /* 223634 */ "VGETEXPPHZrbkz\0" |
| 59257 | /* 223649 */ "VSQRTPHZrbkz\0" |
| 59258 | /* 223662 */ "VFCMADDCSHZrbkz\0" |
| 59259 | /* 223678 */ "VFMADDCSHZrbkz\0" |
| 59260 | /* 223693 */ "VGETEXPSHZrbkz\0" |
| 59261 | /* 223708 */ "VFMADDSUB231PSZrbkz\0" |
| 59262 | /* 223728 */ "VFMSUB231PSZrbkz\0" |
| 59263 | /* 223745 */ "VFNMSUB231PSZrbkz\0" |
| 59264 | /* 223763 */ "VFMSUBADD231PSZrbkz\0" |
| 59265 | /* 223783 */ "VFMADD231PSZrbkz\0" |
| 59266 | /* 223800 */ "VFNMADD231PSZrbkz\0" |
| 59267 | /* 223818 */ "VFMADDSUB132PSZrbkz\0" |
| 59268 | /* 223838 */ "VFMSUB132PSZrbkz\0" |
| 59269 | /* 223855 */ "VFNMSUB132PSZrbkz\0" |
| 59270 | /* 223873 */ "VFMSUBADD132PSZrbkz\0" |
| 59271 | /* 223893 */ "VFMADD132PSZrbkz\0" |
| 59272 | /* 223910 */ "VFNMADD132PSZrbkz\0" |
| 59273 | /* 223928 */ "VEXP2PSZrbkz\0" |
| 59274 | /* 223941 */ "VFMADDSUB213PSZrbkz\0" |
| 59275 | /* 223961 */ "VFMSUB213PSZrbkz\0" |
| 59276 | /* 223978 */ "VFNMSUB213PSZrbkz\0" |
| 59277 | /* 223996 */ "VFMSUBADD213PSZrbkz\0" |
| 59278 | /* 224016 */ "VFMADD213PSZrbkz\0" |
| 59279 | /* 224033 */ "VFNMADD213PSZrbkz\0" |
| 59280 | /* 224051 */ "VRCP28PSZrbkz\0" |
| 59281 | /* 224065 */ "VRSQRT28PSZrbkz\0" |
| 59282 | /* 224081 */ "VGETEXPPSZrbkz\0" |
| 59283 | /* 224096 */ "VSQRTPSZrbkz\0" |
| 59284 | /* 224109 */ "VRCP28SSZrbkz\0" |
| 59285 | /* 224123 */ "VRSQRT28SSZrbkz\0" |
| 59286 | /* 224139 */ "VGETEXPSSZrbkz\0" |
| 59287 | /* 224154 */ "VCVTPH2PDZrrbkz\0" |
| 59288 | /* 224170 */ "VCVTQQ2PDZrrbkz\0" |
| 59289 | /* 224186 */ "VCVTUQQ2PDZrrbkz\0" |
| 59290 | /* 224203 */ "VCVTPS2PDZrrbkz\0" |
| 59291 | /* 224219 */ "VSUBPDZrrbkz\0" |
| 59292 | /* 224232 */ "VADDPDZrrbkz\0" |
| 59293 | /* 224245 */ "VSCALEFPDZrrbkz\0" |
| 59294 | /* 224261 */ "VMULPDZrrbkz\0" |
| 59295 | /* 224274 */ "VMINPDZrrbkz\0" |
| 59296 | /* 224287 */ "VDIVPDZrrbkz\0" |
| 59297 | /* 224300 */ "VMAXPDZrrbkz\0" |
| 59298 | /* 224313 */ "VCVTPD2PHZrrbkz\0" |
| 59299 | /* 224329 */ "VCVTDQ2PHZrrbkz\0" |
| 59300 | /* 224345 */ "VCVTUDQ2PHZrrbkz\0" |
| 59301 | /* 224362 */ "VCVTQQ2PHZrrbkz\0" |
| 59302 | /* 224378 */ "VCVTUQQ2PHZrrbkz\0" |
| 59303 | /* 224395 */ "VCVTPS2PHZrrbkz\0" |
| 59304 | /* 224411 */ "VCVTW2PHZrrbkz\0" |
| 59305 | /* 224426 */ "VCVTUW2PHZrrbkz\0" |
| 59306 | /* 224442 */ "VSUBPHZrrbkz\0" |
| 59307 | /* 224455 */ "VFCMULCPHZrrbkz\0" |
| 59308 | /* 224471 */ "VFMULCPHZrrbkz\0" |
| 59309 | /* 224486 */ "VADDPHZrrbkz\0" |
| 59310 | /* 224499 */ "VSCALEFPHZrrbkz\0" |
| 59311 | /* 224515 */ "VMULPHZrrbkz\0" |
| 59312 | /* 224528 */ "VMINPHZrrbkz\0" |
| 59313 | /* 224541 */ "VDIVPHZrrbkz\0" |
| 59314 | /* 224554 */ "VMAXPHZrrbkz\0" |
| 59315 | /* 224567 */ "VFCMULCSHZrrbkz\0" |
| 59316 | /* 224583 */ "VFMULCSHZrrbkz\0" |
| 59317 | /* 224598 */ "VCVTTPD2DQZrrbkz\0" |
| 59318 | /* 224615 */ "VCVTPD2DQZrrbkz\0" |
| 59319 | /* 224631 */ "VCVTTPH2DQZrrbkz\0" |
| 59320 | /* 224648 */ "VCVTPH2DQZrrbkz\0" |
| 59321 | /* 224664 */ "VCVTTPS2DQZrrbkz\0" |
| 59322 | /* 224681 */ "VCVTPS2DQZrrbkz\0" |
| 59323 | /* 224697 */ "VCVTTPD2UDQZrrbkz\0" |
| 59324 | /* 224715 */ "VCVTPD2UDQZrrbkz\0" |
| 59325 | /* 224732 */ "VCVTTPH2UDQZrrbkz\0" |
| 59326 | /* 224750 */ "VCVTPH2UDQZrrbkz\0" |
| 59327 | /* 224767 */ "VCVTTPS2UDQZrrbkz\0" |
| 59328 | /* 224785 */ "VCVTPS2UDQZrrbkz\0" |
| 59329 | /* 224802 */ "VCVTTPD2QQZrrbkz\0" |
| 59330 | /* 224819 */ "VCVTPD2QQZrrbkz\0" |
| 59331 | /* 224835 */ "VCVTTPH2QQZrrbkz\0" |
| 59332 | /* 224852 */ "VCVTPH2QQZrrbkz\0" |
| 59333 | /* 224868 */ "VCVTTPS2QQZrrbkz\0" |
| 59334 | /* 224885 */ "VCVTPS2QQZrrbkz\0" |
| 59335 | /* 224901 */ "VCVTTPD2UQQZrrbkz\0" |
| 59336 | /* 224919 */ "VCVTPD2UQQZrrbkz\0" |
| 59337 | /* 224936 */ "VCVTTPH2UQQZrrbkz\0" |
| 59338 | /* 224954 */ "VCVTPH2UQQZrrbkz\0" |
| 59339 | /* 224971 */ "VCVTTPS2UQQZrrbkz\0" |
| 59340 | /* 224989 */ "VCVTPS2UQQZrrbkz\0" |
| 59341 | /* 225006 */ "VCVTPD2PSZrrbkz\0" |
| 59342 | /* 225022 */ "VCVTPH2PSZrrbkz\0" |
| 59343 | /* 225038 */ "VCVTDQ2PSZrrbkz\0" |
| 59344 | /* 225054 */ "VCVTUDQ2PSZrrbkz\0" |
| 59345 | /* 225071 */ "VCVTQQ2PSZrrbkz\0" |
| 59346 | /* 225087 */ "VCVTUQQ2PSZrrbkz\0" |
| 59347 | /* 225104 */ "VSUBPSZrrbkz\0" |
| 59348 | /* 225117 */ "VADDPSZrrbkz\0" |
| 59349 | /* 225130 */ "VSCALEFPSZrrbkz\0" |
| 59350 | /* 225146 */ "VMULPSZrrbkz\0" |
| 59351 | /* 225159 */ "VMINPSZrrbkz\0" |
| 59352 | /* 225172 */ "VDIVPSZrrbkz\0" |
| 59353 | /* 225185 */ "VMAXPSZrrbkz\0" |
| 59354 | /* 225198 */ "VCVTTPH2WZrrbkz\0" |
| 59355 | /* 225214 */ "VCVTPH2WZrrbkz\0" |
| 59356 | /* 225229 */ "VCVTTPH2UWZrrbkz\0" |
| 59357 | /* 225246 */ "VCVTPH2UWZrrbkz\0" |
| 59358 | /* 225262 */ "VCVTPS2PHXZrrbkz\0" |
| 59359 | /* 225279 */ "VCVTPH2PSXZrrbkz\0" |
| 59360 | /* 225296 */ "VPSRADZ256mbikz\0" |
| 59361 | /* 225312 */ "VPSHUFDZ256mbikz\0" |
| 59362 | /* 225329 */ "VPSLLDZ256mbikz\0" |
| 59363 | /* 225345 */ "VPROLDZ256mbikz\0" |
| 59364 | /* 225361 */ "VPSRLDZ256mbikz\0" |
| 59365 | /* 225377 */ "VPERMILPDZ256mbikz\0" |
| 59366 | /* 225396 */ "VPERMPDZ256mbikz\0" |
| 59367 | /* 225413 */ "VPRORDZ256mbikz\0" |
| 59368 | /* 225429 */ "VPSRAQZ256mbikz\0" |
| 59369 | /* 225445 */ "VPSLLQZ256mbikz\0" |
| 59370 | /* 225461 */ "VPROLQZ256mbikz\0" |
| 59371 | /* 225477 */ "VPSRLQZ256mbikz\0" |
| 59372 | /* 225493 */ "VPERMQZ256mbikz\0" |
| 59373 | /* 225509 */ "VPRORQZ256mbikz\0" |
| 59374 | /* 225525 */ "VPERMILPSZ256mbikz\0" |
| 59375 | /* 225544 */ "VPSRADZ128mbikz\0" |
| 59376 | /* 225560 */ "VPSHUFDZ128mbikz\0" |
| 59377 | /* 225577 */ "VPSLLDZ128mbikz\0" |
| 59378 | /* 225593 */ "VPROLDZ128mbikz\0" |
| 59379 | /* 225609 */ "VPSRLDZ128mbikz\0" |
| 59380 | /* 225625 */ "VPERMILPDZ128mbikz\0" |
| 59381 | /* 225644 */ "VPRORDZ128mbikz\0" |
| 59382 | /* 225660 */ "VPSRAQZ128mbikz\0" |
| 59383 | /* 225676 */ "VPSLLQZ128mbikz\0" |
| 59384 | /* 225692 */ "VPROLQZ128mbikz\0" |
| 59385 | /* 225708 */ "VPSRLQZ128mbikz\0" |
| 59386 | /* 225724 */ "VPRORQZ128mbikz\0" |
| 59387 | /* 225740 */ "VPERMILPSZ128mbikz\0" |
| 59388 | /* 225759 */ "VPSRADZmbikz\0" |
| 59389 | /* 225772 */ "VPSHUFDZmbikz\0" |
| 59390 | /* 225786 */ "VPSLLDZmbikz\0" |
| 59391 | /* 225799 */ "VPROLDZmbikz\0" |
| 59392 | /* 225812 */ "VPSRLDZmbikz\0" |
| 59393 | /* 225825 */ "VPERMILPDZmbikz\0" |
| 59394 | /* 225841 */ "VPERMPDZmbikz\0" |
| 59395 | /* 225855 */ "VPRORDZmbikz\0" |
| 59396 | /* 225868 */ "VPSRAQZmbikz\0" |
| 59397 | /* 225881 */ "VPSLLQZmbikz\0" |
| 59398 | /* 225894 */ "VPROLQZmbikz\0" |
| 59399 | /* 225907 */ "VPSRLQZmbikz\0" |
| 59400 | /* 225920 */ "VPERMQZmbikz\0" |
| 59401 | /* 225933 */ "VPRORQZmbikz\0" |
| 59402 | /* 225946 */ "VPERMILPSZmbikz\0" |
| 59403 | /* 225962 */ "VSHUFF64X2Z256rmbikz\0" |
| 59404 | /* 225983 */ "VSHUFI64X2Z256rmbikz\0" |
| 59405 | /* 226004 */ "VSHUFF32X4Z256rmbikz\0" |
| 59406 | /* 226025 */ "VSHUFI32X4Z256rmbikz\0" |
| 59407 | /* 226046 */ "VGF2P8AFFINEQBZ256rmbikz\0" |
| 59408 | /* 226071 */ "VGF2P8AFFINEINVQBZ256rmbikz\0" |
| 59409 | /* 226099 */ "VPSHLDDZ256rmbikz\0" |
| 59410 | /* 226117 */ "VPSHRDDZ256rmbikz\0" |
| 59411 | /* 226135 */ "VPTERNLOGDZ256rmbikz\0" |
| 59412 | /* 226156 */ "VALIGNDZ256rmbikz\0" |
| 59413 | /* 226174 */ "VREDUCEPDZ256rmbikz\0" |
| 59414 | /* 226194 */ "VRANGEPDZ256rmbikz\0" |
| 59415 | /* 226213 */ "VRNDSCALEPDZ256rmbikz\0" |
| 59416 | /* 226235 */ "VSHUFPDZ256rmbikz\0" |
| 59417 | /* 226253 */ "VFIXUPIMMPDZ256rmbikz\0" |
| 59418 | /* 226275 */ "VGETMANTPDZ256rmbikz\0" |
| 59419 | /* 226296 */ "VREDUCEPHZ256rmbikz\0" |
| 59420 | /* 226316 */ "VRNDSCALEPHZ256rmbikz\0" |
| 59421 | /* 226338 */ "VGETMANTPHZ256rmbikz\0" |
| 59422 | /* 226359 */ "VPSHLDQZ256rmbikz\0" |
| 59423 | /* 226377 */ "VPSHRDQZ256rmbikz\0" |
| 59424 | /* 226395 */ "VPTERNLOGQZ256rmbikz\0" |
| 59425 | /* 226416 */ "VALIGNQZ256rmbikz\0" |
| 59426 | /* 226434 */ "VREDUCEPSZ256rmbikz\0" |
| 59427 | /* 226454 */ "VRANGEPSZ256rmbikz\0" |
| 59428 | /* 226473 */ "VRNDSCALEPSZ256rmbikz\0" |
| 59429 | /* 226495 */ "VSHUFPSZ256rmbikz\0" |
| 59430 | /* 226513 */ "VFIXUPIMMPSZ256rmbikz\0" |
| 59431 | /* 226535 */ "VGETMANTPSZ256rmbikz\0" |
| 59432 | /* 226556 */ "VGF2P8AFFINEQBZ128rmbikz\0" |
| 59433 | /* 226581 */ "VGF2P8AFFINEINVQBZ128rmbikz\0" |
| 59434 | /* 226609 */ "VPSHLDDZ128rmbikz\0" |
| 59435 | /* 226627 */ "VPSHRDDZ128rmbikz\0" |
| 59436 | /* 226645 */ "VPTERNLOGDZ128rmbikz\0" |
| 59437 | /* 226666 */ "VALIGNDZ128rmbikz\0" |
| 59438 | /* 226684 */ "VREDUCEPDZ128rmbikz\0" |
| 59439 | /* 226704 */ "VRANGEPDZ128rmbikz\0" |
| 59440 | /* 226723 */ "VRNDSCALEPDZ128rmbikz\0" |
| 59441 | /* 226745 */ "VSHUFPDZ128rmbikz\0" |
| 59442 | /* 226763 */ "VFIXUPIMMPDZ128rmbikz\0" |
| 59443 | /* 226785 */ "VGETMANTPDZ128rmbikz\0" |
| 59444 | /* 226806 */ "VREDUCEPHZ128rmbikz\0" |
| 59445 | /* 226826 */ "VRNDSCALEPHZ128rmbikz\0" |
| 59446 | /* 226848 */ "VGETMANTPHZ128rmbikz\0" |
| 59447 | /* 226869 */ "VPSHLDQZ128rmbikz\0" |
| 59448 | /* 226887 */ "VPSHRDQZ128rmbikz\0" |
| 59449 | /* 226905 */ "VPTERNLOGQZ128rmbikz\0" |
| 59450 | /* 226926 */ "VALIGNQZ128rmbikz\0" |
| 59451 | /* 226944 */ "VREDUCEPSZ128rmbikz\0" |
| 59452 | /* 226964 */ "VRANGEPSZ128rmbikz\0" |
| 59453 | /* 226983 */ "VRNDSCALEPSZ128rmbikz\0" |
| 59454 | /* 227005 */ "VSHUFPSZ128rmbikz\0" |
| 59455 | /* 227023 */ "VFIXUPIMMPSZ128rmbikz\0" |
| 59456 | /* 227045 */ "VGETMANTPSZ128rmbikz\0" |
| 59457 | /* 227066 */ "VSHUFF64X2Zrmbikz\0" |
| 59458 | /* 227084 */ "VSHUFI64X2Zrmbikz\0" |
| 59459 | /* 227102 */ "VSHUFF32X4Zrmbikz\0" |
| 59460 | /* 227120 */ "VSHUFI32X4Zrmbikz\0" |
| 59461 | /* 227138 */ "VGF2P8AFFINEQBZrmbikz\0" |
| 59462 | /* 227160 */ "VGF2P8AFFINEINVQBZrmbikz\0" |
| 59463 | /* 227185 */ "VPSHLDDZrmbikz\0" |
| 59464 | /* 227200 */ "VPSHRDDZrmbikz\0" |
| 59465 | /* 227215 */ "VPTERNLOGDZrmbikz\0" |
| 59466 | /* 227233 */ "VALIGNDZrmbikz\0" |
| 59467 | /* 227248 */ "VREDUCEPDZrmbikz\0" |
| 59468 | /* 227265 */ "VRANGEPDZrmbikz\0" |
| 59469 | /* 227281 */ "VRNDSCALEPDZrmbikz\0" |
| 59470 | /* 227300 */ "VSHUFPDZrmbikz\0" |
| 59471 | /* 227315 */ "VFIXUPIMMPDZrmbikz\0" |
| 59472 | /* 227334 */ "VGETMANTPDZrmbikz\0" |
| 59473 | /* 227352 */ "VREDUCEPHZrmbikz\0" |
| 59474 | /* 227369 */ "VRNDSCALEPHZrmbikz\0" |
| 59475 | /* 227388 */ "VGETMANTPHZrmbikz\0" |
| 59476 | /* 227406 */ "VPSHLDQZrmbikz\0" |
| 59477 | /* 227421 */ "VPSHRDQZrmbikz\0" |
| 59478 | /* 227436 */ "VPTERNLOGQZrmbikz\0" |
| 59479 | /* 227454 */ "VALIGNQZrmbikz\0" |
| 59480 | /* 227469 */ "VREDUCEPSZrmbikz\0" |
| 59481 | /* 227486 */ "VRANGEPSZrmbikz\0" |
| 59482 | /* 227502 */ "VRNDSCALEPSZrmbikz\0" |
| 59483 | /* 227521 */ "VSHUFPSZrmbikz\0" |
| 59484 | /* 227536 */ "VFIXUPIMMPSZrmbikz\0" |
| 59485 | /* 227555 */ "VGETMANTPSZrmbikz\0" |
| 59486 | /* 227573 */ "VPSRADZ256mikz\0" |
| 59487 | /* 227588 */ "VPSHUFDZ256mikz\0" |
| 59488 | /* 227604 */ "VPSLLDZ256mikz\0" |
| 59489 | /* 227619 */ "VPROLDZ256mikz\0" |
| 59490 | /* 227634 */ "VPSRLDZ256mikz\0" |
| 59491 | /* 227649 */ "VPERMILPDZ256mikz\0" |
| 59492 | /* 227667 */ "VPERMPDZ256mikz\0" |
| 59493 | /* 227683 */ "VPRORDZ256mikz\0" |
| 59494 | /* 227698 */ "VPSRAQZ256mikz\0" |
| 59495 | /* 227713 */ "VPSLLQZ256mikz\0" |
| 59496 | /* 227728 */ "VPROLQZ256mikz\0" |
| 59497 | /* 227743 */ "VPSRLQZ256mikz\0" |
| 59498 | /* 227758 */ "VPERMQZ256mikz\0" |
| 59499 | /* 227773 */ "VPRORQZ256mikz\0" |
| 59500 | /* 227788 */ "VPERMILPSZ256mikz\0" |
| 59501 | /* 227806 */ "VPSRAWZ256mikz\0" |
| 59502 | /* 227821 */ "VPSHUFHWZ256mikz\0" |
| 59503 | /* 227838 */ "VPSHUFLWZ256mikz\0" |
| 59504 | /* 227855 */ "VPSLLWZ256mikz\0" |
| 59505 | /* 227870 */ "VPSRLWZ256mikz\0" |
| 59506 | /* 227885 */ "VPSRADZ128mikz\0" |
| 59507 | /* 227900 */ "VPSHUFDZ128mikz\0" |
| 59508 | /* 227916 */ "VPSLLDZ128mikz\0" |
| 59509 | /* 227931 */ "VPROLDZ128mikz\0" |
| 59510 | /* 227946 */ "VPSRLDZ128mikz\0" |
| 59511 | /* 227961 */ "VPERMILPDZ128mikz\0" |
| 59512 | /* 227979 */ "VPRORDZ128mikz\0" |
| 59513 | /* 227994 */ "VPSRAQZ128mikz\0" |
| 59514 | /* 228009 */ "VPSLLQZ128mikz\0" |
| 59515 | /* 228024 */ "VPROLQZ128mikz\0" |
| 59516 | /* 228039 */ "VPSRLQZ128mikz\0" |
| 59517 | /* 228054 */ "VPRORQZ128mikz\0" |
| 59518 | /* 228069 */ "VPERMILPSZ128mikz\0" |
| 59519 | /* 228087 */ "VPSRAWZ128mikz\0" |
| 59520 | /* 228102 */ "VPSHUFHWZ128mikz\0" |
| 59521 | /* 228119 */ "VPSHUFLWZ128mikz\0" |
| 59522 | /* 228136 */ "VPSLLWZ128mikz\0" |
| 59523 | /* 228151 */ "VPSRLWZ128mikz\0" |
| 59524 | /* 228166 */ "VPSRADZmikz\0" |
| 59525 | /* 228178 */ "VPSHUFDZmikz\0" |
| 59526 | /* 228191 */ "VPSLLDZmikz\0" |
| 59527 | /* 228203 */ "VPROLDZmikz\0" |
| 59528 | /* 228215 */ "VPSRLDZmikz\0" |
| 59529 | /* 228227 */ "VPERMILPDZmikz\0" |
| 59530 | /* 228242 */ "VPERMPDZmikz\0" |
| 59531 | /* 228255 */ "VPRORDZmikz\0" |
| 59532 | /* 228267 */ "VPSRAQZmikz\0" |
| 59533 | /* 228279 */ "VPSLLQZmikz\0" |
| 59534 | /* 228291 */ "VPROLQZmikz\0" |
| 59535 | /* 228303 */ "VPSRLQZmikz\0" |
| 59536 | /* 228315 */ "VPERMQZmikz\0" |
| 59537 | /* 228327 */ "VPRORQZmikz\0" |
| 59538 | /* 228339 */ "VPERMILPSZmikz\0" |
| 59539 | /* 228354 */ "VPSRAWZmikz\0" |
| 59540 | /* 228366 */ "VPSHUFHWZmikz\0" |
| 59541 | /* 228380 */ "VPSHUFLWZmikz\0" |
| 59542 | /* 228394 */ "VPSLLWZmikz\0" |
| 59543 | /* 228406 */ "VPSRLWZmikz\0" |
| 59544 | /* 228418 */ "VSHUFF64X2Z256rmikz\0" |
| 59545 | /* 228438 */ "VSHUFI64X2Z256rmikz\0" |
| 59546 | /* 228458 */ "VSHUFF32X4Z256rmikz\0" |
| 59547 | /* 228478 */ "VSHUFI32X4Z256rmikz\0" |
| 59548 | /* 228498 */ "VGF2P8AFFINEQBZ256rmikz\0" |
| 59549 | /* 228522 */ "VGF2P8AFFINEINVQBZ256rmikz\0" |
| 59550 | /* 228549 */ "VPSHLDDZ256rmikz\0" |
| 59551 | /* 228566 */ "VPSHRDDZ256rmikz\0" |
| 59552 | /* 228583 */ "VPTERNLOGDZ256rmikz\0" |
| 59553 | /* 228603 */ "VALIGNDZ256rmikz\0" |
| 59554 | /* 228620 */ "VREDUCEPDZ256rmikz\0" |
| 59555 | /* 228639 */ "VRANGEPDZ256rmikz\0" |
| 59556 | /* 228657 */ "VRNDSCALEPDZ256rmikz\0" |
| 59557 | /* 228678 */ "VSHUFPDZ256rmikz\0" |
| 59558 | /* 228695 */ "VFIXUPIMMPDZ256rmikz\0" |
| 59559 | /* 228716 */ "VGETMANTPDZ256rmikz\0" |
| 59560 | /* 228736 */ "VREDUCEPHZ256rmikz\0" |
| 59561 | /* 228755 */ "VRNDSCALEPHZ256rmikz\0" |
| 59562 | /* 228776 */ "VGETMANTPHZ256rmikz\0" |
| 59563 | /* 228796 */ "VPSHLDQZ256rmikz\0" |
| 59564 | /* 228813 */ "VPSHRDQZ256rmikz\0" |
| 59565 | /* 228830 */ "VPTERNLOGQZ256rmikz\0" |
| 59566 | /* 228850 */ "VALIGNQZ256rmikz\0" |
| 59567 | /* 228867 */ "VPALIGNRZ256rmikz\0" |
| 59568 | /* 228885 */ "VREDUCEPSZ256rmikz\0" |
| 59569 | /* 228904 */ "VRANGEPSZ256rmikz\0" |
| 59570 | /* 228922 */ "VRNDSCALEPSZ256rmikz\0" |
| 59571 | /* 228943 */ "VSHUFPSZ256rmikz\0" |
| 59572 | /* 228960 */ "VFIXUPIMMPSZ256rmikz\0" |
| 59573 | /* 228981 */ "VGETMANTPSZ256rmikz\0" |
| 59574 | /* 229001 */ "VDBPSADBWZ256rmikz\0" |
| 59575 | /* 229020 */ "VPSHLDWZ256rmikz\0" |
| 59576 | /* 229037 */ "VPSHRDWZ256rmikz\0" |
| 59577 | /* 229054 */ "VGF2P8AFFINEQBZ128rmikz\0" |
| 59578 | /* 229078 */ "VGF2P8AFFINEINVQBZ128rmikz\0" |
| 59579 | /* 229105 */ "VPSHLDDZ128rmikz\0" |
| 59580 | /* 229122 */ "VPSHRDDZ128rmikz\0" |
| 59581 | /* 229139 */ "VPTERNLOGDZ128rmikz\0" |
| 59582 | /* 229159 */ "VALIGNDZ128rmikz\0" |
| 59583 | /* 229176 */ "VREDUCEPDZ128rmikz\0" |
| 59584 | /* 229195 */ "VRANGEPDZ128rmikz\0" |
| 59585 | /* 229213 */ "VRNDSCALEPDZ128rmikz\0" |
| 59586 | /* 229234 */ "VSHUFPDZ128rmikz\0" |
| 59587 | /* 229251 */ "VFIXUPIMMPDZ128rmikz\0" |
| 59588 | /* 229272 */ "VGETMANTPDZ128rmikz\0" |
| 59589 | /* 229292 */ "VREDUCEPHZ128rmikz\0" |
| 59590 | /* 229311 */ "VRNDSCALEPHZ128rmikz\0" |
| 59591 | /* 229332 */ "VGETMANTPHZ128rmikz\0" |
| 59592 | /* 229352 */ "VPSHLDQZ128rmikz\0" |
| 59593 | /* 229369 */ "VPSHRDQZ128rmikz\0" |
| 59594 | /* 229386 */ "VPTERNLOGQZ128rmikz\0" |
| 59595 | /* 229406 */ "VALIGNQZ128rmikz\0" |
| 59596 | /* 229423 */ "VPALIGNRZ128rmikz\0" |
| 59597 | /* 229441 */ "VREDUCEPSZ128rmikz\0" |
| 59598 | /* 229460 */ "VRANGEPSZ128rmikz\0" |
| 59599 | /* 229478 */ "VRNDSCALEPSZ128rmikz\0" |
| 59600 | /* 229499 */ "VSHUFPSZ128rmikz\0" |
| 59601 | /* 229516 */ "VFIXUPIMMPSZ128rmikz\0" |
| 59602 | /* 229537 */ "VGETMANTPSZ128rmikz\0" |
| 59603 | /* 229557 */ "VDBPSADBWZ128rmikz\0" |
| 59604 | /* 229576 */ "VPSHLDWZ128rmikz\0" |
| 59605 | /* 229593 */ "VPSHRDWZ128rmikz\0" |
| 59606 | /* 229610 */ "VSHUFF64X2Zrmikz\0" |
| 59607 | /* 229627 */ "VSHUFI64X2Zrmikz\0" |
| 59608 | /* 229644 */ "VSHUFF32X4Zrmikz\0" |
| 59609 | /* 229661 */ "VSHUFI32X4Zrmikz\0" |
| 59610 | /* 229678 */ "VGF2P8AFFINEQBZrmikz\0" |
| 59611 | /* 229699 */ "VGF2P8AFFINEINVQBZrmikz\0" |
| 59612 | /* 229723 */ "VPSHLDDZrmikz\0" |
| 59613 | /* 229737 */ "VPSHRDDZrmikz\0" |
| 59614 | /* 229751 */ "VPTERNLOGDZrmikz\0" |
| 59615 | /* 229768 */ "VALIGNDZrmikz\0" |
| 59616 | /* 229782 */ "VREDUCEPDZrmikz\0" |
| 59617 | /* 229798 */ "VRANGEPDZrmikz\0" |
| 59618 | /* 229813 */ "VRNDSCALEPDZrmikz\0" |
| 59619 | /* 229831 */ "VSHUFPDZrmikz\0" |
| 59620 | /* 229845 */ "VFIXUPIMMPDZrmikz\0" |
| 59621 | /* 229863 */ "VGETMANTPDZrmikz\0" |
| 59622 | /* 229880 */ "VREDUCESDZrmikz\0" |
| 59623 | /* 229896 */ "VRANGESDZrmikz\0" |
| 59624 | /* 229911 */ "VFIXUPIMMSDZrmikz\0" |
| 59625 | /* 229929 */ "VGETMANTSDZrmikz\0" |
| 59626 | /* 229946 */ "VREDUCEPHZrmikz\0" |
| 59627 | /* 229962 */ "VRNDSCALEPHZrmikz\0" |
| 59628 | /* 229980 */ "VGETMANTPHZrmikz\0" |
| 59629 | /* 229997 */ "VREDUCESHZrmikz\0" |
| 59630 | /* 230013 */ "VGETMANTSHZrmikz\0" |
| 59631 | /* 230030 */ "VPSHLDQZrmikz\0" |
| 59632 | /* 230044 */ "VPSHRDQZrmikz\0" |
| 59633 | /* 230058 */ "VPTERNLOGQZrmikz\0" |
| 59634 | /* 230075 */ "VALIGNQZrmikz\0" |
| 59635 | /* 230089 */ "VPALIGNRZrmikz\0" |
| 59636 | /* 230104 */ "VREDUCEPSZrmikz\0" |
| 59637 | /* 230120 */ "VRANGEPSZrmikz\0" |
| 59638 | /* 230135 */ "VRNDSCALEPSZrmikz\0" |
| 59639 | /* 230153 */ "VSHUFPSZrmikz\0" |
| 59640 | /* 230167 */ "VFIXUPIMMPSZrmikz\0" |
| 59641 | /* 230185 */ "VGETMANTPSZrmikz\0" |
| 59642 | /* 230202 */ "VREDUCESSZrmikz\0" |
| 59643 | /* 230218 */ "VRANGESSZrmikz\0" |
| 59644 | /* 230233 */ "VFIXUPIMMSSZrmikz\0" |
| 59645 | /* 230251 */ "VGETMANTSSZrmikz\0" |
| 59646 | /* 230268 */ "VDBPSADBWZrmikz\0" |
| 59647 | /* 230284 */ "VPSHLDWZrmikz\0" |
| 59648 | /* 230298 */ "VPSHRDWZrmikz\0" |
| 59649 | /* 230312 */ "VPSRADZ256rikz\0" |
| 59650 | /* 230327 */ "VPSHUFDZ256rikz\0" |
| 59651 | /* 230343 */ "VPSLLDZ256rikz\0" |
| 59652 | /* 230358 */ "VPROLDZ256rikz\0" |
| 59653 | /* 230373 */ "VPSRLDZ256rikz\0" |
| 59654 | /* 230388 */ "VPERMILPDZ256rikz\0" |
| 59655 | /* 230406 */ "VPERMPDZ256rikz\0" |
| 59656 | /* 230422 */ "VPRORDZ256rikz\0" |
| 59657 | /* 230437 */ "VPSRAQZ256rikz\0" |
| 59658 | /* 230452 */ "VPSLLQZ256rikz\0" |
| 59659 | /* 230467 */ "VPROLQZ256rikz\0" |
| 59660 | /* 230482 */ "VPSRLQZ256rikz\0" |
| 59661 | /* 230497 */ "VPERMQZ256rikz\0" |
| 59662 | /* 230512 */ "VPRORQZ256rikz\0" |
| 59663 | /* 230527 */ "VPERMILPSZ256rikz\0" |
| 59664 | /* 230545 */ "VPSRAWZ256rikz\0" |
| 59665 | /* 230560 */ "VPSHUFHWZ256rikz\0" |
| 59666 | /* 230577 */ "VPSHUFLWZ256rikz\0" |
| 59667 | /* 230594 */ "VPSLLWZ256rikz\0" |
| 59668 | /* 230609 */ "VPSRLWZ256rikz\0" |
| 59669 | /* 230624 */ "VPSRADZ128rikz\0" |
| 59670 | /* 230639 */ "VPSHUFDZ128rikz\0" |
| 59671 | /* 230655 */ "VPSLLDZ128rikz\0" |
| 59672 | /* 230670 */ "VPROLDZ128rikz\0" |
| 59673 | /* 230685 */ "VPSRLDZ128rikz\0" |
| 59674 | /* 230700 */ "VPERMILPDZ128rikz\0" |
| 59675 | /* 230718 */ "VPRORDZ128rikz\0" |
| 59676 | /* 230733 */ "VPSRAQZ128rikz\0" |
| 59677 | /* 230748 */ "VPSLLQZ128rikz\0" |
| 59678 | /* 230763 */ "VPROLQZ128rikz\0" |
| 59679 | /* 230778 */ "VPSRLQZ128rikz\0" |
| 59680 | /* 230793 */ "VPRORQZ128rikz\0" |
| 59681 | /* 230808 */ "VPERMILPSZ128rikz\0" |
| 59682 | /* 230826 */ "VPSRAWZ128rikz\0" |
| 59683 | /* 230841 */ "VPSHUFHWZ128rikz\0" |
| 59684 | /* 230858 */ "VPSHUFLWZ128rikz\0" |
| 59685 | /* 230875 */ "VPSLLWZ128rikz\0" |
| 59686 | /* 230890 */ "VPSRLWZ128rikz\0" |
| 59687 | /* 230905 */ "VPSRADZrikz\0" |
| 59688 | /* 230917 */ "VPSHUFDZrikz\0" |
| 59689 | /* 230930 */ "VPSLLDZrikz\0" |
| 59690 | /* 230942 */ "VPROLDZrikz\0" |
| 59691 | /* 230954 */ "VPSRLDZrikz\0" |
| 59692 | /* 230966 */ "VPERMILPDZrikz\0" |
| 59693 | /* 230981 */ "VPERMPDZrikz\0" |
| 59694 | /* 230994 */ "VPRORDZrikz\0" |
| 59695 | /* 231006 */ "VPSRAQZrikz\0" |
| 59696 | /* 231018 */ "VPSLLQZrikz\0" |
| 59697 | /* 231030 */ "VPROLQZrikz\0" |
| 59698 | /* 231042 */ "VPSRLQZrikz\0" |
| 59699 | /* 231054 */ "VPERMQZrikz\0" |
| 59700 | /* 231066 */ "VPRORQZrikz\0" |
| 59701 | /* 231078 */ "VPERMILPSZrikz\0" |
| 59702 | /* 231093 */ "VPSRAWZrikz\0" |
| 59703 | /* 231105 */ "VPSHUFHWZrikz\0" |
| 59704 | /* 231119 */ "VPSHUFLWZrikz\0" |
| 59705 | /* 231133 */ "VPSLLWZrikz\0" |
| 59706 | /* 231145 */ "VPSRLWZrikz\0" |
| 59707 | /* 231157 */ "VSHUFF64X2Z256rrikz\0" |
| 59708 | /* 231177 */ "VSHUFI64X2Z256rrikz\0" |
| 59709 | /* 231197 */ "VSHUFF32X4Z256rrikz\0" |
| 59710 | /* 231217 */ "VSHUFI32X4Z256rrikz\0" |
| 59711 | /* 231237 */ "VGF2P8AFFINEQBZ256rrikz\0" |
| 59712 | /* 231261 */ "VGF2P8AFFINEINVQBZ256rrikz\0" |
| 59713 | /* 231288 */ "VPSHLDDZ256rrikz\0" |
| 59714 | /* 231305 */ "VPSHRDDZ256rrikz\0" |
| 59715 | /* 231322 */ "VPTERNLOGDZ256rrikz\0" |
| 59716 | /* 231342 */ "VALIGNDZ256rrikz\0" |
| 59717 | /* 231359 */ "VREDUCEPDZ256rrikz\0" |
| 59718 | /* 231378 */ "VRANGEPDZ256rrikz\0" |
| 59719 | /* 231396 */ "VRNDSCALEPDZ256rrikz\0" |
| 59720 | /* 231417 */ "VSHUFPDZ256rrikz\0" |
| 59721 | /* 231434 */ "VFIXUPIMMPDZ256rrikz\0" |
| 59722 | /* 231455 */ "VGETMANTPDZ256rrikz\0" |
| 59723 | /* 231475 */ "VREDUCEPHZ256rrikz\0" |
| 59724 | /* 231494 */ "VRNDSCALEPHZ256rrikz\0" |
| 59725 | /* 231515 */ "VGETMANTPHZ256rrikz\0" |
| 59726 | /* 231535 */ "VPSHLDQZ256rrikz\0" |
| 59727 | /* 231552 */ "VPSHRDQZ256rrikz\0" |
| 59728 | /* 231569 */ "VPTERNLOGQZ256rrikz\0" |
| 59729 | /* 231589 */ "VALIGNQZ256rrikz\0" |
| 59730 | /* 231606 */ "VPALIGNRZ256rrikz\0" |
| 59731 | /* 231624 */ "VREDUCEPSZ256rrikz\0" |
| 59732 | /* 231643 */ "VRANGEPSZ256rrikz\0" |
| 59733 | /* 231661 */ "VRNDSCALEPSZ256rrikz\0" |
| 59734 | /* 231682 */ "VSHUFPSZ256rrikz\0" |
| 59735 | /* 231699 */ "VFIXUPIMMPSZ256rrikz\0" |
| 59736 | /* 231720 */ "VGETMANTPSZ256rrikz\0" |
| 59737 | /* 231740 */ "VDBPSADBWZ256rrikz\0" |
| 59738 | /* 231759 */ "VPSHLDWZ256rrikz\0" |
| 59739 | /* 231776 */ "VPSHRDWZ256rrikz\0" |
| 59740 | /* 231793 */ "VGF2P8AFFINEQBZ128rrikz\0" |
| 59741 | /* 231817 */ "VGF2P8AFFINEINVQBZ128rrikz\0" |
| 59742 | /* 231844 */ "VPSHLDDZ128rrikz\0" |
| 59743 | /* 231861 */ "VPSHRDDZ128rrikz\0" |
| 59744 | /* 231878 */ "VPTERNLOGDZ128rrikz\0" |
| 59745 | /* 231898 */ "VALIGNDZ128rrikz\0" |
| 59746 | /* 231915 */ "VREDUCEPDZ128rrikz\0" |
| 59747 | /* 231934 */ "VRANGEPDZ128rrikz\0" |
| 59748 | /* 231952 */ "VRNDSCALEPDZ128rrikz\0" |
| 59749 | /* 231973 */ "VSHUFPDZ128rrikz\0" |
| 59750 | /* 231990 */ "VFIXUPIMMPDZ128rrikz\0" |
| 59751 | /* 232011 */ "VGETMANTPDZ128rrikz\0" |
| 59752 | /* 232031 */ "VREDUCEPHZ128rrikz\0" |
| 59753 | /* 232050 */ "VRNDSCALEPHZ128rrikz\0" |
| 59754 | /* 232071 */ "VGETMANTPHZ128rrikz\0" |
| 59755 | /* 232091 */ "VPSHLDQZ128rrikz\0" |
| 59756 | /* 232108 */ "VPSHRDQZ128rrikz\0" |
| 59757 | /* 232125 */ "VPTERNLOGQZ128rrikz\0" |
| 59758 | /* 232145 */ "VALIGNQZ128rrikz\0" |
| 59759 | /* 232162 */ "VPALIGNRZ128rrikz\0" |
| 59760 | /* 232180 */ "VREDUCEPSZ128rrikz\0" |
| 59761 | /* 232199 */ "VRANGEPSZ128rrikz\0" |
| 59762 | /* 232217 */ "VRNDSCALEPSZ128rrikz\0" |
| 59763 | /* 232238 */ "VSHUFPSZ128rrikz\0" |
| 59764 | /* 232255 */ "VFIXUPIMMPSZ128rrikz\0" |
| 59765 | /* 232276 */ "VGETMANTPSZ128rrikz\0" |
| 59766 | /* 232296 */ "VDBPSADBWZ128rrikz\0" |
| 59767 | /* 232315 */ "VPSHLDWZ128rrikz\0" |
| 59768 | /* 232332 */ "VPSHRDWZ128rrikz\0" |
| 59769 | /* 232349 */ "VSHUFF64X2Zrrikz\0" |
| 59770 | /* 232366 */ "VSHUFI64X2Zrrikz\0" |
| 59771 | /* 232383 */ "VSHUFF32X4Zrrikz\0" |
| 59772 | /* 232400 */ "VSHUFI32X4Zrrikz\0" |
| 59773 | /* 232417 */ "VGF2P8AFFINEQBZrrikz\0" |
| 59774 | /* 232438 */ "VGF2P8AFFINEINVQBZrrikz\0" |
| 59775 | /* 232462 */ "VPSHLDDZrrikz\0" |
| 59776 | /* 232476 */ "VPSHRDDZrrikz\0" |
| 59777 | /* 232490 */ "VPTERNLOGDZrrikz\0" |
| 59778 | /* 232507 */ "VALIGNDZrrikz\0" |
| 59779 | /* 232521 */ "VREDUCEPDZrrikz\0" |
| 59780 | /* 232537 */ "VRANGEPDZrrikz\0" |
| 59781 | /* 232552 */ "VRNDSCALEPDZrrikz\0" |
| 59782 | /* 232570 */ "VSHUFPDZrrikz\0" |
| 59783 | /* 232584 */ "VFIXUPIMMPDZrrikz\0" |
| 59784 | /* 232602 */ "VGETMANTPDZrrikz\0" |
| 59785 | /* 232619 */ "VREDUCESDZrrikz\0" |
| 59786 | /* 232635 */ "VRANGESDZrrikz\0" |
| 59787 | /* 232650 */ "VFIXUPIMMSDZrrikz\0" |
| 59788 | /* 232668 */ "VGETMANTSDZrrikz\0" |
| 59789 | /* 232685 */ "VREDUCEPHZrrikz\0" |
| 59790 | /* 232701 */ "VRNDSCALEPHZrrikz\0" |
| 59791 | /* 232719 */ "VGETMANTPHZrrikz\0" |
| 59792 | /* 232736 */ "VREDUCESHZrrikz\0" |
| 59793 | /* 232752 */ "VGETMANTSHZrrikz\0" |
| 59794 | /* 232769 */ "VPSHLDQZrrikz\0" |
| 59795 | /* 232783 */ "VPSHRDQZrrikz\0" |
| 59796 | /* 232797 */ "VPTERNLOGQZrrikz\0" |
| 59797 | /* 232814 */ "VALIGNQZrrikz\0" |
| 59798 | /* 232828 */ "VPALIGNRZrrikz\0" |
| 59799 | /* 232843 */ "VREDUCEPSZrrikz\0" |
| 59800 | /* 232859 */ "VRANGEPSZrrikz\0" |
| 59801 | /* 232874 */ "VRNDSCALEPSZrrikz\0" |
| 59802 | /* 232892 */ "VSHUFPSZrrikz\0" |
| 59803 | /* 232906 */ "VFIXUPIMMPSZrrikz\0" |
| 59804 | /* 232924 */ "VGETMANTPSZrrikz\0" |
| 59805 | /* 232941 */ "VREDUCESSZrrikz\0" |
| 59806 | /* 232957 */ "VRANGESSZrrikz\0" |
| 59807 | /* 232972 */ "VFIXUPIMMSSZrrikz\0" |
| 59808 | /* 232990 */ "VGETMANTSSZrrikz\0" |
| 59809 | /* 233007 */ "VDBPSADBWZrrikz\0" |
| 59810 | /* 233023 */ "VPSHLDWZrrikz\0" |
| 59811 | /* 233037 */ "VPSHRDWZrrikz\0" |
| 59812 | /* 233051 */ "VFMADDSUB231PDZ256mkz\0" |
| 59813 | /* 233073 */ "VFMSUB231PDZ256mkz\0" |
| 59814 | /* 233092 */ "VFNMSUB231PDZ256mkz\0" |
| 59815 | /* 233112 */ "VFMSUBADD231PDZ256mkz\0" |
| 59816 | /* 233134 */ "VFMADD231PDZ256mkz\0" |
| 59817 | /* 233153 */ "VFNMADD231PDZ256mkz\0" |
| 59818 | /* 233173 */ "VFMADDSUB132PDZ256mkz\0" |
| 59819 | /* 233195 */ "VFMSUB132PDZ256mkz\0" |
| 59820 | /* 233214 */ "VFNMSUB132PDZ256mkz\0" |
| 59821 | /* 233234 */ "VFMSUBADD132PDZ256mkz\0" |
| 59822 | /* 233256 */ "VFMADD132PDZ256mkz\0" |
| 59823 | /* 233275 */ "VFNMADD132PDZ256mkz\0" |
| 59824 | /* 233295 */ "VFMADDSUB213PDZ256mkz\0" |
| 59825 | /* 233317 */ "VFMSUB213PDZ256mkz\0" |
| 59826 | /* 233336 */ "VFNMSUB213PDZ256mkz\0" |
| 59827 | /* 233356 */ "VFMSUBADD213PDZ256mkz\0" |
| 59828 | /* 233378 */ "VFMADD213PDZ256mkz\0" |
| 59829 | /* 233397 */ "VFNMADD213PDZ256mkz\0" |
| 59830 | /* 233417 */ "VRCP14PDZ256mkz\0" |
| 59831 | /* 233433 */ "VRSQRT14PDZ256mkz\0" |
| 59832 | /* 233451 */ "VGETEXPPDZ256mkz\0" |
| 59833 | /* 233468 */ "VSQRTPDZ256mkz\0" |
| 59834 | /* 233483 */ "VPDPWSSDZ256mkz\0" |
| 59835 | /* 233499 */ "VPDPBUSDZ256mkz\0" |
| 59836 | /* 233515 */ "VPSHLDVDZ256mkz\0" |
| 59837 | /* 233531 */ "VPSHRDVDZ256mkz\0" |
| 59838 | /* 233547 */ "VFMADDSUB231PHZ256mkz\0" |
| 59839 | /* 233569 */ "VFMSUB231PHZ256mkz\0" |
| 59840 | /* 233588 */ "VFNMSUB231PHZ256mkz\0" |
| 59841 | /* 233608 */ "VFMSUBADD231PHZ256mkz\0" |
| 59842 | /* 233630 */ "VFMADD231PHZ256mkz\0" |
| 59843 | /* 233649 */ "VFNMADD231PHZ256mkz\0" |
| 59844 | /* 233669 */ "VFMADDSUB132PHZ256mkz\0" |
| 59845 | /* 233691 */ "VFMSUB132PHZ256mkz\0" |
| 59846 | /* 233710 */ "VFNMSUB132PHZ256mkz\0" |
| 59847 | /* 233730 */ "VFMSUBADD132PHZ256mkz\0" |
| 59848 | /* 233752 */ "VFMADD132PHZ256mkz\0" |
| 59849 | /* 233771 */ "VFNMADD132PHZ256mkz\0" |
| 59850 | /* 233791 */ "VFMADDSUB213PHZ256mkz\0" |
| 59851 | /* 233813 */ "VFMSUB213PHZ256mkz\0" |
| 59852 | /* 233832 */ "VFNMSUB213PHZ256mkz\0" |
| 59853 | /* 233852 */ "VFMSUBADD213PHZ256mkz\0" |
| 59854 | /* 233874 */ "VFMADD213PHZ256mkz\0" |
| 59855 | /* 233893 */ "VFNMADD213PHZ256mkz\0" |
| 59856 | /* 233913 */ "VFCMADDCPHZ256mkz\0" |
| 59857 | /* 233931 */ "VFMADDCPHZ256mkz\0" |
| 59858 | /* 233948 */ "VRCPPHZ256mkz\0" |
| 59859 | /* 233962 */ "VGETEXPPHZ256mkz\0" |
| 59860 | /* 233979 */ "VRSQRTPHZ256mkz\0" |
| 59861 | /* 233995 */ "VSQRTPHZ256mkz\0" |
| 59862 | /* 234010 */ "VPMADD52HUQZ256mkz\0" |
| 59863 | /* 234029 */ "VPMADD52LUQZ256mkz\0" |
| 59864 | /* 234048 */ "VPSHLDVQZ256mkz\0" |
| 59865 | /* 234064 */ "VPSHRDVQZ256mkz\0" |
| 59866 | /* 234080 */ "VPDPWSSDSZ256mkz\0" |
| 59867 | /* 234097 */ "VPDPBUSDSZ256mkz\0" |
| 59868 | /* 234114 */ "VFMADDSUB231PSZ256mkz\0" |
| 59869 | /* 234136 */ "VFMSUB231PSZ256mkz\0" |
| 59870 | /* 234155 */ "VFNMSUB231PSZ256mkz\0" |
| 59871 | /* 234175 */ "VFMSUBADD231PSZ256mkz\0" |
| 59872 | /* 234197 */ "VFMADD231PSZ256mkz\0" |
| 59873 | /* 234216 */ "VFNMADD231PSZ256mkz\0" |
| 59874 | /* 234236 */ "VFMADDSUB132PSZ256mkz\0" |
| 59875 | /* 234258 */ "VFMSUB132PSZ256mkz\0" |
| 59876 | /* 234277 */ "VFNMSUB132PSZ256mkz\0" |
| 59877 | /* 234297 */ "VFMSUBADD132PSZ256mkz\0" |
| 59878 | /* 234319 */ "VFMADD132PSZ256mkz\0" |
| 59879 | /* 234338 */ "VFNMADD132PSZ256mkz\0" |
| 59880 | /* 234358 */ "VFMADDSUB213PSZ256mkz\0" |
| 59881 | /* 234380 */ "VFMSUB213PSZ256mkz\0" |
| 59882 | /* 234399 */ "VFNMSUB213PSZ256mkz\0" |
| 59883 | /* 234419 */ "VFMSUBADD213PSZ256mkz\0" |
| 59884 | /* 234441 */ "VFMADD213PSZ256mkz\0" |
| 59885 | /* 234460 */ "VFNMADD213PSZ256mkz\0" |
| 59886 | /* 234480 */ "VRCP14PSZ256mkz\0" |
| 59887 | /* 234496 */ "VRSQRT14PSZ256mkz\0" |
| 59888 | /* 234514 */ "VDPBF16PSZ256mkz\0" |
| 59889 | /* 234531 */ "VGETEXPPSZ256mkz\0" |
| 59890 | /* 234548 */ "VSQRTPSZ256mkz\0" |
| 59891 | /* 234563 */ "VPSHLDVWZ256mkz\0" |
| 59892 | /* 234579 */ "VPSHRDVWZ256mkz\0" |
| 59893 | /* 234595 */ "VFMADDSUB231PDZ128mkz\0" |
| 59894 | /* 234617 */ "VFMSUB231PDZ128mkz\0" |
| 59895 | /* 234636 */ "VFNMSUB231PDZ128mkz\0" |
| 59896 | /* 234656 */ "VFMSUBADD231PDZ128mkz\0" |
| 59897 | /* 234678 */ "VFMADD231PDZ128mkz\0" |
| 59898 | /* 234697 */ "VFNMADD231PDZ128mkz\0" |
| 59899 | /* 234717 */ "VFMADDSUB132PDZ128mkz\0" |
| 59900 | /* 234739 */ "VFMSUB132PDZ128mkz\0" |
| 59901 | /* 234758 */ "VFNMSUB132PDZ128mkz\0" |
| 59902 | /* 234778 */ "VFMSUBADD132PDZ128mkz\0" |
| 59903 | /* 234800 */ "VFMADD132PDZ128mkz\0" |
| 59904 | /* 234819 */ "VFNMADD132PDZ128mkz\0" |
| 59905 | /* 234839 */ "VFMADDSUB213PDZ128mkz\0" |
| 59906 | /* 234861 */ "VFMSUB213PDZ128mkz\0" |
| 59907 | /* 234880 */ "VFNMSUB213PDZ128mkz\0" |
| 59908 | /* 234900 */ "VFMSUBADD213PDZ128mkz\0" |
| 59909 | /* 234922 */ "VFMADD213PDZ128mkz\0" |
| 59910 | /* 234941 */ "VFNMADD213PDZ128mkz\0" |
| 59911 | /* 234961 */ "VRCP14PDZ128mkz\0" |
| 59912 | /* 234977 */ "VRSQRT14PDZ128mkz\0" |
| 59913 | /* 234995 */ "VGETEXPPDZ128mkz\0" |
| 59914 | /* 235012 */ "VSQRTPDZ128mkz\0" |
| 59915 | /* 235027 */ "VPDPWSSDZ128mkz\0" |
| 59916 | /* 235043 */ "VPDPBUSDZ128mkz\0" |
| 59917 | /* 235059 */ "VPSHLDVDZ128mkz\0" |
| 59918 | /* 235075 */ "VPSHRDVDZ128mkz\0" |
| 59919 | /* 235091 */ "VFMADDSUB231PHZ128mkz\0" |
| 59920 | /* 235113 */ "VFMSUB231PHZ128mkz\0" |
| 59921 | /* 235132 */ "VFNMSUB231PHZ128mkz\0" |
| 59922 | /* 235152 */ "VFMSUBADD231PHZ128mkz\0" |
| 59923 | /* 235174 */ "VFMADD231PHZ128mkz\0" |
| 59924 | /* 235193 */ "VFNMADD231PHZ128mkz\0" |
| 59925 | /* 235213 */ "VFMADDSUB132PHZ128mkz\0" |
| 59926 | /* 235235 */ "VFMSUB132PHZ128mkz\0" |
| 59927 | /* 235254 */ "VFNMSUB132PHZ128mkz\0" |
| 59928 | /* 235274 */ "VFMSUBADD132PHZ128mkz\0" |
| 59929 | /* 235296 */ "VFMADD132PHZ128mkz\0" |
| 59930 | /* 235315 */ "VFNMADD132PHZ128mkz\0" |
| 59931 | /* 235335 */ "VFMADDSUB213PHZ128mkz\0" |
| 59932 | /* 235357 */ "VFMSUB213PHZ128mkz\0" |
| 59933 | /* 235376 */ "VFNMSUB213PHZ128mkz\0" |
| 59934 | /* 235396 */ "VFMSUBADD213PHZ128mkz\0" |
| 59935 | /* 235418 */ "VFMADD213PHZ128mkz\0" |
| 59936 | /* 235437 */ "VFNMADD213PHZ128mkz\0" |
| 59937 | /* 235457 */ "VFCMADDCPHZ128mkz\0" |
| 59938 | /* 235475 */ "VFMADDCPHZ128mkz\0" |
| 59939 | /* 235492 */ "VRCPPHZ128mkz\0" |
| 59940 | /* 235506 */ "VGETEXPPHZ128mkz\0" |
| 59941 | /* 235523 */ "VRSQRTPHZ128mkz\0" |
| 59942 | /* 235539 */ "VSQRTPHZ128mkz\0" |
| 59943 | /* 235554 */ "VPMADD52HUQZ128mkz\0" |
| 59944 | /* 235573 */ "VPMADD52LUQZ128mkz\0" |
| 59945 | /* 235592 */ "VPSHLDVQZ128mkz\0" |
| 59946 | /* 235608 */ "VPSHRDVQZ128mkz\0" |
| 59947 | /* 235624 */ "VPDPWSSDSZ128mkz\0" |
| 59948 | /* 235641 */ "VPDPBUSDSZ128mkz\0" |
| 59949 | /* 235658 */ "VFMADDSUB231PSZ128mkz\0" |
| 59950 | /* 235680 */ "VFMSUB231PSZ128mkz\0" |
| 59951 | /* 235699 */ "VFNMSUB231PSZ128mkz\0" |
| 59952 | /* 235719 */ "VFMSUBADD231PSZ128mkz\0" |
| 59953 | /* 235741 */ "VFMADD231PSZ128mkz\0" |
| 59954 | /* 235760 */ "VFNMADD231PSZ128mkz\0" |
| 59955 | /* 235780 */ "VFMADDSUB132PSZ128mkz\0" |
| 59956 | /* 235802 */ "VFMSUB132PSZ128mkz\0" |
| 59957 | /* 235821 */ "VFNMSUB132PSZ128mkz\0" |
| 59958 | /* 235841 */ "VFMSUBADD132PSZ128mkz\0" |
| 59959 | /* 235863 */ "VFMADD132PSZ128mkz\0" |
| 59960 | /* 235882 */ "VFNMADD132PSZ128mkz\0" |
| 59961 | /* 235902 */ "VFMADDSUB213PSZ128mkz\0" |
| 59962 | /* 235924 */ "VFMSUB213PSZ128mkz\0" |
| 59963 | /* 235943 */ "VFNMSUB213PSZ128mkz\0" |
| 59964 | /* 235963 */ "VFMSUBADD213PSZ128mkz\0" |
| 59965 | /* 235985 */ "VFMADD213PSZ128mkz\0" |
| 59966 | /* 236004 */ "VFNMADD213PSZ128mkz\0" |
| 59967 | /* 236024 */ "VRCP14PSZ128mkz\0" |
| 59968 | /* 236040 */ "VRSQRT14PSZ128mkz\0" |
| 59969 | /* 236058 */ "VDPBF16PSZ128mkz\0" |
| 59970 | /* 236075 */ "VGETEXPPSZ128mkz\0" |
| 59971 | /* 236092 */ "VSQRTPSZ128mkz\0" |
| 59972 | /* 236107 */ "VPSHLDVWZ128mkz\0" |
| 59973 | /* 236123 */ "VPSHRDVWZ128mkz\0" |
| 59974 | /* 236139 */ "VFMADDSUB231PDZmkz\0" |
| 59975 | /* 236158 */ "VFMSUB231PDZmkz\0" |
| 59976 | /* 236174 */ "VFNMSUB231PDZmkz\0" |
| 59977 | /* 236191 */ "VFMSUBADD231PDZmkz\0" |
| 59978 | /* 236210 */ "VFMADD231PDZmkz\0" |
| 59979 | /* 236226 */ "VFNMADD231PDZmkz\0" |
| 59980 | /* 236243 */ "VFMADDSUB132PDZmkz\0" |
| 59981 | /* 236262 */ "VFMSUB132PDZmkz\0" |
| 59982 | /* 236278 */ "VFNMSUB132PDZmkz\0" |
| 59983 | /* 236295 */ "VFMSUBADD132PDZmkz\0" |
| 59984 | /* 236314 */ "VFMADD132PDZmkz\0" |
| 59985 | /* 236330 */ "VFNMADD132PDZmkz\0" |
| 59986 | /* 236347 */ "VEXP2PDZmkz\0" |
| 59987 | /* 236359 */ "VFMADDSUB213PDZmkz\0" |
| 59988 | /* 236378 */ "VFMSUB213PDZmkz\0" |
| 59989 | /* 236394 */ "VFNMSUB213PDZmkz\0" |
| 59990 | /* 236411 */ "VFMSUBADD213PDZmkz\0" |
| 59991 | /* 236430 */ "VFMADD213PDZmkz\0" |
| 59992 | /* 236446 */ "VFNMADD213PDZmkz\0" |
| 59993 | /* 236463 */ "VRCP14PDZmkz\0" |
| 59994 | /* 236476 */ "VRSQRT14PDZmkz\0" |
| 59995 | /* 236491 */ "VRCP28PDZmkz\0" |
| 59996 | /* 236504 */ "VRSQRT28PDZmkz\0" |
| 59997 | /* 236519 */ "VGETEXPPDZmkz\0" |
| 59998 | /* 236533 */ "VSQRTPDZmkz\0" |
| 59999 | /* 236545 */ "VRCP28SDZmkz\0" |
| 60000 | /* 236558 */ "VRSQRT28SDZmkz\0" |
| 60001 | /* 236573 */ "VGETEXPSDZmkz\0" |
| 60002 | /* 236587 */ "VPDPWSSDZmkz\0" |
| 60003 | /* 236600 */ "VPDPBUSDZmkz\0" |
| 60004 | /* 236613 */ "VPSHLDVDZmkz\0" |
| 60005 | /* 236626 */ "VPSHRDVDZmkz\0" |
| 60006 | /* 236639 */ "VFMADDSUB231PHZmkz\0" |
| 60007 | /* 236658 */ "VFMSUB231PHZmkz\0" |
| 60008 | /* 236674 */ "VFNMSUB231PHZmkz\0" |
| 60009 | /* 236691 */ "VFMSUBADD231PHZmkz\0" |
| 60010 | /* 236710 */ "VFMADD231PHZmkz\0" |
| 60011 | /* 236726 */ "VFNMADD231PHZmkz\0" |
| 60012 | /* 236743 */ "VFMADDSUB132PHZmkz\0" |
| 60013 | /* 236762 */ "VFMSUB132PHZmkz\0" |
| 60014 | /* 236778 */ "VFNMSUB132PHZmkz\0" |
| 60015 | /* 236795 */ "VFMSUBADD132PHZmkz\0" |
| 60016 | /* 236814 */ "VFMADD132PHZmkz\0" |
| 60017 | /* 236830 */ "VFNMADD132PHZmkz\0" |
| 60018 | /* 236847 */ "VFMADDSUB213PHZmkz\0" |
| 60019 | /* 236866 */ "VFMSUB213PHZmkz\0" |
| 60020 | /* 236882 */ "VFNMSUB213PHZmkz\0" |
| 60021 | /* 236899 */ "VFMSUBADD213PHZmkz\0" |
| 60022 | /* 236918 */ "VFMADD213PHZmkz\0" |
| 60023 | /* 236934 */ "VFNMADD213PHZmkz\0" |
| 60024 | /* 236951 */ "VFCMADDCPHZmkz\0" |
| 60025 | /* 236966 */ "VFMADDCPHZmkz\0" |
| 60026 | /* 236980 */ "VRCPPHZmkz\0" |
| 60027 | /* 236991 */ "VGETEXPPHZmkz\0" |
| 60028 | /* 237005 */ "VRSQRTPHZmkz\0" |
| 60029 | /* 237018 */ "VSQRTPHZmkz\0" |
| 60030 | /* 237030 */ "VFCMADDCSHZmkz\0" |
| 60031 | /* 237045 */ "VFMADDCSHZmkz\0" |
| 60032 | /* 237059 */ "VGETEXPSHZmkz\0" |
| 60033 | /* 237073 */ "VPMADD52HUQZmkz\0" |
| 60034 | /* 237089 */ "VPMADD52LUQZmkz\0" |
| 60035 | /* 237105 */ "VPSHLDVQZmkz\0" |
| 60036 | /* 237118 */ "VPSHRDVQZmkz\0" |
| 60037 | /* 237131 */ "VPDPWSSDSZmkz\0" |
| 60038 | /* 237145 */ "VPDPBUSDSZmkz\0" |
| 60039 | /* 237159 */ "VFMADDSUB231PSZmkz\0" |
| 60040 | /* 237178 */ "VFMSUB231PSZmkz\0" |
| 60041 | /* 237194 */ "VFNMSUB231PSZmkz\0" |
| 60042 | /* 237211 */ "VFMSUBADD231PSZmkz\0" |
| 60043 | /* 237230 */ "VFMADD231PSZmkz\0" |
| 60044 | /* 237246 */ "VFNMADD231PSZmkz\0" |
| 60045 | /* 237263 */ "VFMADDSUB132PSZmkz\0" |
| 60046 | /* 237282 */ "VFMSUB132PSZmkz\0" |
| 60047 | /* 237298 */ "VFNMSUB132PSZmkz\0" |
| 60048 | /* 237315 */ "VFMSUBADD132PSZmkz\0" |
| 60049 | /* 237334 */ "VFMADD132PSZmkz\0" |
| 60050 | /* 237350 */ "VFNMADD132PSZmkz\0" |
| 60051 | /* 237367 */ "VEXP2PSZmkz\0" |
| 60052 | /* 237379 */ "VFMADDSUB213PSZmkz\0" |
| 60053 | /* 237398 */ "VFMSUB213PSZmkz\0" |
| 60054 | /* 237414 */ "VFNMSUB213PSZmkz\0" |
| 60055 | /* 237431 */ "VFMSUBADD213PSZmkz\0" |
| 60056 | /* 237450 */ "VFMADD213PSZmkz\0" |
| 60057 | /* 237466 */ "VFNMADD213PSZmkz\0" |
| 60058 | /* 237483 */ "VRCP14PSZmkz\0" |
| 60059 | /* 237496 */ "VRSQRT14PSZmkz\0" |
| 60060 | /* 237511 */ "VDPBF16PSZmkz\0" |
| 60061 | /* 237525 */ "VRCP28PSZmkz\0" |
| 60062 | /* 237538 */ "VRSQRT28PSZmkz\0" |
| 60063 | /* 237553 */ "VGETEXPPSZmkz\0" |
| 60064 | /* 237567 */ "VSQRTPSZmkz\0" |
| 60065 | /* 237579 */ "VRCP28SSZmkz\0" |
| 60066 | /* 237592 */ "VRSQRT28SSZmkz\0" |
| 60067 | /* 237607 */ "VGETEXPSSZmkz\0" |
| 60068 | /* 237621 */ "VPSHLDVWZmkz\0" |
| 60069 | /* 237634 */ "VPSHRDVWZmkz\0" |
| 60070 | /* 237647 */ "VBROADCASTF64X2rmkz\0" |
| 60071 | /* 237667 */ "VBROADCASTI64X2rmkz\0" |
| 60072 | /* 237687 */ "VBROADCASTF32X4rmkz\0" |
| 60073 | /* 237707 */ "VBROADCASTI32X4rmkz\0" |
| 60074 | /* 237727 */ "VBROADCASTF64X4rmkz\0" |
| 60075 | /* 237747 */ "VBROADCASTI64X4rmkz\0" |
| 60076 | /* 237767 */ "VMOVDQA32Z256rmkz\0" |
| 60077 | /* 237785 */ "VMOVDQU32Z256rmkz\0" |
| 60078 | /* 237803 */ "VBROADCASTF32X2Z256rmkz\0" |
| 60079 | /* 237827 */ "VBROADCASTI32X2Z256rmkz\0" |
| 60080 | /* 237851 */ "VINSERTF64x2Z256rmkz\0" |
| 60081 | /* 237872 */ "VINSERTI64x2Z256rmkz\0" |
| 60082 | /* 237893 */ "VMOVDQA64Z256rmkz\0" |
| 60083 | /* 237911 */ "VMOVDQU64Z256rmkz\0" |
| 60084 | /* 237929 */ "VBROADCASTF32X4Z256rmkz\0" |
| 60085 | /* 237953 */ "VBROADCASTI32X4Z256rmkz\0" |
| 60086 | /* 237977 */ "VINSERTF32x4Z256rmkz\0" |
| 60087 | /* 237998 */ "VINSERTI32x4Z256rmkz\0" |
| 60088 | /* 238019 */ "VCVTNE2PS2BF16Z256rmkz\0" |
| 60089 | /* 238042 */ "VCVTNEPS2BF16Z256rmkz\0" |
| 60090 | /* 238064 */ "VMOVDQU16Z256rmkz\0" |
| 60091 | /* 238082 */ "VMOVDQU8Z256rmkz\0" |
| 60092 | /* 238099 */ "VPERMI2BZ256rmkz\0" |
| 60093 | /* 238116 */ "VPERMT2BZ256rmkz\0" |
| 60094 | /* 238133 */ "VPSUBBZ256rmkz\0" |
| 60095 | /* 238148 */ "VPADDBZ256rmkz\0" |
| 60096 | /* 238163 */ "VPEXPANDBZ256rmkz\0" |
| 60097 | /* 238181 */ "VPSHUFBZ256rmkz\0" |
| 60098 | /* 238197 */ "VPAVGBZ256rmkz\0" |
| 60099 | /* 238212 */ "VGF2P8MULBZ256rmkz\0" |
| 60100 | /* 238231 */ "VPBLENDMBZ256rmkz\0" |
| 60101 | /* 238249 */ "VPERMBZ256rmkz\0" |
| 60102 | /* 238264 */ "VPMULTISHIFTQBZ256rmkz\0" |
| 60103 | /* 238287 */ "VPABSBZ256rmkz\0" |
| 60104 | /* 238302 */ "VPSUBSBZ256rmkz\0" |
| 60105 | /* 238318 */ "VPADDSBZ256rmkz\0" |
| 60106 | /* 238334 */ "VPMINSBZ256rmkz\0" |
| 60107 | /* 238350 */ "VPSUBUSBZ256rmkz\0" |
| 60108 | /* 238367 */ "VPADDUSBZ256rmkz\0" |
| 60109 | /* 238384 */ "VPMAXSBZ256rmkz\0" |
| 60110 | /* 238400 */ "VPOPCNTBZ256rmkz\0" |
| 60111 | /* 238417 */ "VPBROADCASTBZ256rmkz\0" |
| 60112 | /* 238438 */ "VPMINUBZ256rmkz\0" |
| 60113 | /* 238454 */ "VPMAXUBZ256rmkz\0" |
| 60114 | /* 238470 */ "VPACKSSWBZ256rmkz\0" |
| 60115 | /* 238488 */ "VPACKUSWBZ256rmkz\0" |
| 60116 | /* 238506 */ "VPERMI2DZ256rmkz\0" |
| 60117 | /* 238523 */ "VPERMT2DZ256rmkz\0" |
| 60118 | /* 238540 */ "VPSRADZ256rmkz\0" |
| 60119 | /* 238555 */ "VPSUBDZ256rmkz\0" |
| 60120 | /* 238570 */ "VPMOVSXBDZ256rmkz\0" |
| 60121 | /* 238588 */ "VPMOVZXBDZ256rmkz\0" |
| 60122 | /* 238606 */ "VPADDDZ256rmkz\0" |
| 60123 | /* 238621 */ "VPANDDZ256rmkz\0" |
| 60124 | /* 238636 */ "VPEXPANDDZ256rmkz\0" |
| 60125 | /* 238654 */ "VPSLLDZ256rmkz\0" |
| 60126 | /* 238669 */ "VPMULLDZ256rmkz\0" |
| 60127 | /* 238685 */ "VPSRLDZ256rmkz\0" |
| 60128 | /* 238700 */ "VPBLENDMDZ256rmkz\0" |
| 60129 | /* 238718 */ "VPERMDZ256rmkz\0" |
| 60130 | /* 238733 */ "VPANDNDZ256rmkz\0" |
| 60131 | /* 238749 */ "VCVTPH2PDZ256rmkz\0" |
| 60132 | /* 238767 */ "VPERMI2PDZ256rmkz\0" |
| 60133 | /* 238785 */ "VCVTDQ2PDZ256rmkz\0" |
| 60134 | /* 238803 */ "VCVTUDQ2PDZ256rmkz\0" |
| 60135 | /* 238822 */ "VCVTQQ2PDZ256rmkz\0" |
| 60136 | /* 238840 */ "VCVTUQQ2PDZ256rmkz\0" |
| 60137 | /* 238859 */ "VCVTPS2PDZ256rmkz\0" |
| 60138 | /* 238877 */ "VPERMT2PDZ256rmkz\0" |
| 60139 | /* 238895 */ "VMOVAPDZ256rmkz\0" |
| 60140 | /* 238911 */ "VSUBPDZ256rmkz\0" |
| 60141 | /* 238926 */ "VMINCPDZ256rmkz\0" |
| 60142 | /* 238942 */ "VMAXCPDZ256rmkz\0" |
| 60143 | /* 238958 */ "VADDPDZ256rmkz\0" |
| 60144 | /* 238973 */ "VEXPANDPDZ256rmkz\0" |
| 60145 | /* 238991 */ "VANDPDZ256rmkz\0" |
| 60146 | /* 239006 */ "VSCALEFPDZ256rmkz\0" |
| 60147 | /* 239024 */ "VUNPCKHPDZ256rmkz\0" |
| 60148 | /* 239042 */ "VPERMILPDZ256rmkz\0" |
| 60149 | /* 239060 */ "VUNPCKLPDZ256rmkz\0" |
| 60150 | /* 239078 */ "VMULPDZ256rmkz\0" |
| 60151 | /* 239093 */ "VBLENDMPDZ256rmkz\0" |
| 60152 | /* 239111 */ "VPERMPDZ256rmkz\0" |
| 60153 | /* 239127 */ "VANDNPDZ256rmkz\0" |
| 60154 | /* 239143 */ "VMINPDZ256rmkz\0" |
| 60155 | /* 239158 */ "VORPDZ256rmkz\0" |
| 60156 | /* 239172 */ "VXORPDZ256rmkz\0" |
| 60157 | /* 239187 */ "VMOVUPDZ256rmkz\0" |
| 60158 | /* 239203 */ "VDIVPDZ256rmkz\0" |
| 60159 | /* 239218 */ "VMAXPDZ256rmkz\0" |
| 60160 | /* 239233 */ "VPORDZ256rmkz\0" |
| 60161 | /* 239247 */ "VPXORDZ256rmkz\0" |
| 60162 | /* 239262 */ "VPABSDZ256rmkz\0" |
| 60163 | /* 239277 */ "VPMINSDZ256rmkz\0" |
| 60164 | /* 239293 */ "VBROADCASTSDZ256rmkz\0" |
| 60165 | /* 239314 */ "VPMAXSDZ256rmkz\0" |
| 60166 | /* 239330 */ "VPCONFLICTDZ256rmkz\0" |
| 60167 | /* 239350 */ "VPOPCNTDZ256rmkz\0" |
| 60168 | /* 239367 */ "VPLZCNTDZ256rmkz\0" |
| 60169 | /* 239384 */ "VPBROADCASTDZ256rmkz\0" |
| 60170 | /* 239405 */ "VPMINUDZ256rmkz\0" |
| 60171 | /* 239421 */ "VPMAXUDZ256rmkz\0" |
| 60172 | /* 239437 */ "VPSRAVDZ256rmkz\0" |
| 60173 | /* 239453 */ "VPSLLVDZ256rmkz\0" |
| 60174 | /* 239469 */ "VPROLVDZ256rmkz\0" |
| 60175 | /* 239485 */ "VPSRLVDZ256rmkz\0" |
| 60176 | /* 239501 */ "VPRORVDZ256rmkz\0" |
| 60177 | /* 239517 */ "VPMADDWDZ256rmkz\0" |
| 60178 | /* 239534 */ "VPUNPCKHWDZ256rmkz\0" |
| 60179 | /* 239553 */ "VPUNPCKLWDZ256rmkz\0" |
| 60180 | /* 239572 */ "VPMOVSXWDZ256rmkz\0" |
| 60181 | /* 239590 */ "VPMOVZXWDZ256rmkz\0" |
| 60182 | /* 239608 */ "VCVTPD2PHZ256rmkz\0" |
| 60183 | /* 239626 */ "VCVTDQ2PHZ256rmkz\0" |
| 60184 | /* 239644 */ "VCVTUDQ2PHZ256rmkz\0" |
| 60185 | /* 239663 */ "VCVTQQ2PHZ256rmkz\0" |
| 60186 | /* 239681 */ "VCVTUQQ2PHZ256rmkz\0" |
| 60187 | /* 239700 */ "VCVTW2PHZ256rmkz\0" |
| 60188 | /* 239717 */ "VCVTUW2PHZ256rmkz\0" |
| 60189 | /* 239735 */ "VSUBPHZ256rmkz\0" |
| 60190 | /* 239750 */ "VFCMULCPHZ256rmkz\0" |
| 60191 | /* 239768 */ "VFMULCPHZ256rmkz\0" |
| 60192 | /* 239785 */ "VMINCPHZ256rmkz\0" |
| 60193 | /* 239801 */ "VMAXCPHZ256rmkz\0" |
| 60194 | /* 239817 */ "VADDPHZ256rmkz\0" |
| 60195 | /* 239832 */ "VSCALEFPHZ256rmkz\0" |
| 60196 | /* 239850 */ "VMULPHZ256rmkz\0" |
| 60197 | /* 239865 */ "VMINPHZ256rmkz\0" |
| 60198 | /* 239880 */ "VDIVPHZ256rmkz\0" |
| 60199 | /* 239895 */ "VMAXPHZ256rmkz\0" |
| 60200 | /* 239910 */ "VMOVDDUPZ256rmkz\0" |
| 60201 | /* 239927 */ "VMOVSHDUPZ256rmkz\0" |
| 60202 | /* 239945 */ "VMOVSLDUPZ256rmkz\0" |
| 60203 | /* 239963 */ "VPERMI2QZ256rmkz\0" |
| 60204 | /* 239980 */ "VPERMT2QZ256rmkz\0" |
| 60205 | /* 239997 */ "VPSRAQZ256rmkz\0" |
| 60206 | /* 240012 */ "VPSUBQZ256rmkz\0" |
| 60207 | /* 240027 */ "VPMOVSXBQZ256rmkz\0" |
| 60208 | /* 240045 */ "VPMOVZXBQZ256rmkz\0" |
| 60209 | /* 240063 */ "VCVTTPD2DQZ256rmkz\0" |
| 60210 | /* 240082 */ "VCVTPD2DQZ256rmkz\0" |
| 60211 | /* 240100 */ "VCVTTPH2DQZ256rmkz\0" |
| 60212 | /* 240119 */ "VCVTPH2DQZ256rmkz\0" |
| 60213 | /* 240137 */ "VCVTTPS2DQZ256rmkz\0" |
| 60214 | /* 240156 */ "VCVTPS2DQZ256rmkz\0" |
| 60215 | /* 240174 */ "VPADDQZ256rmkz\0" |
| 60216 | /* 240189 */ "VPUNPCKHDQZ256rmkz\0" |
| 60217 | /* 240208 */ "VPUNPCKLDQZ256rmkz\0" |
| 60218 | /* 240227 */ "VPMULDQZ256rmkz\0" |
| 60219 | /* 240243 */ "VPANDQZ256rmkz\0" |
| 60220 | /* 240258 */ "VPEXPANDQZ256rmkz\0" |
| 60221 | /* 240276 */ "VPUNPCKHQDQZ256rmkz\0" |
| 60222 | /* 240296 */ "VPUNPCKLQDQZ256rmkz\0" |
| 60223 | /* 240316 */ "VCVTTPD2UDQZ256rmkz\0" |
| 60224 | /* 240336 */ "VCVTPD2UDQZ256rmkz\0" |
| 60225 | /* 240355 */ "VCVTTPH2UDQZ256rmkz\0" |
| 60226 | /* 240375 */ "VCVTPH2UDQZ256rmkz\0" |
| 60227 | /* 240394 */ "VCVTTPS2UDQZ256rmkz\0" |
| 60228 | /* 240414 */ "VCVTPS2UDQZ256rmkz\0" |
| 60229 | /* 240433 */ "VPMULUDQZ256rmkz\0" |
| 60230 | /* 240450 */ "VPMOVSXDQZ256rmkz\0" |
| 60231 | /* 240468 */ "VPMOVZXDQZ256rmkz\0" |
| 60232 | /* 240486 */ "VPSLLQZ256rmkz\0" |
| 60233 | /* 240501 */ "VPMULLQZ256rmkz\0" |
| 60234 | /* 240517 */ "VPSRLQZ256rmkz\0" |
| 60235 | /* 240532 */ "VPBLENDMQZ256rmkz\0" |
| 60236 | /* 240550 */ "VPERMQZ256rmkz\0" |
| 60237 | /* 240565 */ "VPANDNQZ256rmkz\0" |
| 60238 | /* 240581 */ "VCVTTPD2QQZ256rmkz\0" |
| 60239 | /* 240600 */ "VCVTPD2QQZ256rmkz\0" |
| 60240 | /* 240618 */ "VCVTTPH2QQZ256rmkz\0" |
| 60241 | /* 240637 */ "VCVTPH2QQZ256rmkz\0" |
| 60242 | /* 240655 */ "VCVTTPS2QQZ256rmkz\0" |
| 60243 | /* 240674 */ "VCVTPS2QQZ256rmkz\0" |
| 60244 | /* 240692 */ "VCVTTPD2UQQZ256rmkz\0" |
| 60245 | /* 240712 */ "VCVTPD2UQQZ256rmkz\0" |
| 60246 | /* 240731 */ "VCVTTPH2UQQZ256rmkz\0" |
| 60247 | /* 240751 */ "VCVTPH2UQQZ256rmkz\0" |
| 60248 | /* 240770 */ "VCVTTPS2UQQZ256rmkz\0" |
| 60249 | /* 240790 */ "VCVTPS2UQQZ256rmkz\0" |
| 60250 | /* 240809 */ "VPORQZ256rmkz\0" |
| 60251 | /* 240823 */ "VPXORQZ256rmkz\0" |
| 60252 | /* 240838 */ "VPABSQZ256rmkz\0" |
| 60253 | /* 240853 */ "VPMINSQZ256rmkz\0" |
| 60254 | /* 240869 */ "VPMAXSQZ256rmkz\0" |
| 60255 | /* 240885 */ "VPCONFLICTQZ256rmkz\0" |
| 60256 | /* 240905 */ "VPOPCNTQZ256rmkz\0" |
| 60257 | /* 240922 */ "VPLZCNTQZ256rmkz\0" |
| 60258 | /* 240939 */ "VPBROADCASTQZ256rmkz\0" |
| 60259 | /* 240960 */ "VPMINUQZ256rmkz\0" |
| 60260 | /* 240976 */ "VPMAXUQZ256rmkz\0" |
| 60261 | /* 240992 */ "VPSRAVQZ256rmkz\0" |
| 60262 | /* 241008 */ "VPSLLVQZ256rmkz\0" |
| 60263 | /* 241024 */ "VPROLVQZ256rmkz\0" |
| 60264 | /* 241040 */ "VPSRLVQZ256rmkz\0" |
| 60265 | /* 241056 */ "VPRORVQZ256rmkz\0" |
| 60266 | /* 241072 */ "VPMOVSXWQZ256rmkz\0" |
| 60267 | /* 241090 */ "VPMOVZXWQZ256rmkz\0" |
| 60268 | /* 241108 */ "VCVTPD2PSZ256rmkz\0" |
| 60269 | /* 241126 */ "VCVTPH2PSZ256rmkz\0" |
| 60270 | /* 241144 */ "VPERMI2PSZ256rmkz\0" |
| 60271 | /* 241162 */ "VCVTDQ2PSZ256rmkz\0" |
| 60272 | /* 241180 */ "VCVTUDQ2PSZ256rmkz\0" |
| 60273 | /* 241199 */ "VCVTQQ2PSZ256rmkz\0" |
| 60274 | /* 241217 */ "VCVTUQQ2PSZ256rmkz\0" |
| 60275 | /* 241236 */ "VPERMT2PSZ256rmkz\0" |
| 60276 | /* 241254 */ "VMOVAPSZ256rmkz\0" |
| 60277 | /* 241270 */ "VSUBPSZ256rmkz\0" |
| 60278 | /* 241285 */ "VMINCPSZ256rmkz\0" |
| 60279 | /* 241301 */ "VMAXCPSZ256rmkz\0" |
| 60280 | /* 241317 */ "VADDPSZ256rmkz\0" |
| 60281 | /* 241332 */ "VEXPANDPSZ256rmkz\0" |
| 60282 | /* 241350 */ "VANDPSZ256rmkz\0" |
| 60283 | /* 241365 */ "VSCALEFPSZ256rmkz\0" |
| 60284 | /* 241383 */ "VUNPCKHPSZ256rmkz\0" |
| 60285 | /* 241401 */ "VPERMILPSZ256rmkz\0" |
| 60286 | /* 241419 */ "VUNPCKLPSZ256rmkz\0" |
| 60287 | /* 241437 */ "VMULPSZ256rmkz\0" |
| 60288 | /* 241452 */ "VBLENDMPSZ256rmkz\0" |
| 60289 | /* 241470 */ "VPERMPSZ256rmkz\0" |
| 60290 | /* 241486 */ "VANDNPSZ256rmkz\0" |
| 60291 | /* 241502 */ "VMINPSZ256rmkz\0" |
| 60292 | /* 241517 */ "VORPSZ256rmkz\0" |
| 60293 | /* 241531 */ "VXORPSZ256rmkz\0" |
| 60294 | /* 241546 */ "VMOVUPSZ256rmkz\0" |
| 60295 | /* 241562 */ "VDIVPSZ256rmkz\0" |
| 60296 | /* 241577 */ "VMAXPSZ256rmkz\0" |
| 60297 | /* 241592 */ "VBROADCASTSSZ256rmkz\0" |
| 60298 | /* 241613 */ "VCVTTPH2WZ256rmkz\0" |
| 60299 | /* 241631 */ "VCVTPH2WZ256rmkz\0" |
| 60300 | /* 241648 */ "VPERMI2WZ256rmkz\0" |
| 60301 | /* 241665 */ "VPERMT2WZ256rmkz\0" |
| 60302 | /* 241682 */ "VPSRAWZ256rmkz\0" |
| 60303 | /* 241697 */ "VPUNPCKHBWZ256rmkz\0" |
| 60304 | /* 241716 */ "VPUNPCKLBWZ256rmkz\0" |
| 60305 | /* 241735 */ "VPSUBWZ256rmkz\0" |
| 60306 | /* 241750 */ "VPMOVSXBWZ256rmkz\0" |
| 60307 | /* 241768 */ "VPMOVZXBWZ256rmkz\0" |
| 60308 | /* 241786 */ "VPADDWZ256rmkz\0" |
| 60309 | /* 241801 */ "VPEXPANDWZ256rmkz\0" |
| 60310 | /* 241819 */ "VPACKSSDWZ256rmkz\0" |
| 60311 | /* 241837 */ "VPACKUSDWZ256rmkz\0" |
| 60312 | /* 241855 */ "VPAVGWZ256rmkz\0" |
| 60313 | /* 241870 */ "VPMULHWZ256rmkz\0" |
| 60314 | /* 241886 */ "VPSLLWZ256rmkz\0" |
| 60315 | /* 241901 */ "VPMULLWZ256rmkz\0" |
| 60316 | /* 241917 */ "VPSRLWZ256rmkz\0" |
| 60317 | /* 241932 */ "VPBLENDMWZ256rmkz\0" |
| 60318 | /* 241950 */ "VPERMWZ256rmkz\0" |
| 60319 | /* 241965 */ "VPABSWZ256rmkz\0" |
| 60320 | /* 241980 */ "VPMADDUBSWZ256rmkz\0" |
| 60321 | /* 241999 */ "VPSUBSWZ256rmkz\0" |
| 60322 | /* 242015 */ "VPADDSWZ256rmkz\0" |
| 60323 | /* 242031 */ "VPMINSWZ256rmkz\0" |
| 60324 | /* 242047 */ "VPMULHRSWZ256rmkz\0" |
| 60325 | /* 242065 */ "VPSUBUSWZ256rmkz\0" |
| 60326 | /* 242082 */ "VPADDUSWZ256rmkz\0" |
| 60327 | /* 242099 */ "VPMAXSWZ256rmkz\0" |
| 60328 | /* 242115 */ "VPOPCNTWZ256rmkz\0" |
| 60329 | /* 242132 */ "VPBROADCASTWZ256rmkz\0" |
| 60330 | /* 242153 */ "VCVTTPH2UWZ256rmkz\0" |
| 60331 | /* 242172 */ "VCVTPH2UWZ256rmkz\0" |
| 60332 | /* 242190 */ "VPMULHUWZ256rmkz\0" |
| 60333 | /* 242207 */ "VPMINUWZ256rmkz\0" |
| 60334 | /* 242223 */ "VPMAXUWZ256rmkz\0" |
| 60335 | /* 242239 */ "VPSRAVWZ256rmkz\0" |
| 60336 | /* 242255 */ "VPSLLVWZ256rmkz\0" |
| 60337 | /* 242271 */ "VPSRLVWZ256rmkz\0" |
| 60338 | /* 242287 */ "VCVTPS2PHXZ256rmkz\0" |
| 60339 | /* 242306 */ "VCVTPH2PSXZ256rmkz\0" |
| 60340 | /* 242325 */ "VMOVDQA32Z128rmkz\0" |
| 60341 | /* 242343 */ "VMOVDQU32Z128rmkz\0" |
| 60342 | /* 242361 */ "VBROADCASTI32X2Z128rmkz\0" |
| 60343 | /* 242385 */ "VBROADCASTF64X2Z128rmkz\0" |
| 60344 | /* 242409 */ "VBROADCASTI64X2Z128rmkz\0" |
| 60345 | /* 242433 */ "VMOVDQA64Z128rmkz\0" |
| 60346 | /* 242451 */ "VMOVDQU64Z128rmkz\0" |
| 60347 | /* 242469 */ "VCVTNE2PS2BF16Z128rmkz\0" |
| 60348 | /* 242492 */ "VCVTNEPS2BF16Z128rmkz\0" |
| 60349 | /* 242514 */ "VMOVDQU16Z128rmkz\0" |
| 60350 | /* 242532 */ "VMOVDQU8Z128rmkz\0" |
| 60351 | /* 242549 */ "VPERMI2BZ128rmkz\0" |
| 60352 | /* 242566 */ "VPERMT2BZ128rmkz\0" |
| 60353 | /* 242583 */ "VPSUBBZ128rmkz\0" |
| 60354 | /* 242598 */ "VPADDBZ128rmkz\0" |
| 60355 | /* 242613 */ "VPEXPANDBZ128rmkz\0" |
| 60356 | /* 242631 */ "VPSHUFBZ128rmkz\0" |
| 60357 | /* 242647 */ "VPAVGBZ128rmkz\0" |
| 60358 | /* 242662 */ "VGF2P8MULBZ128rmkz\0" |
| 60359 | /* 242681 */ "VPBLENDMBZ128rmkz\0" |
| 60360 | /* 242699 */ "VPERMBZ128rmkz\0" |
| 60361 | /* 242714 */ "VPMULTISHIFTQBZ128rmkz\0" |
| 60362 | /* 242737 */ "VPABSBZ128rmkz\0" |
| 60363 | /* 242752 */ "VPSUBSBZ128rmkz\0" |
| 60364 | /* 242768 */ "VPADDSBZ128rmkz\0" |
| 60365 | /* 242784 */ "VPMINSBZ128rmkz\0" |
| 60366 | /* 242800 */ "VPSUBUSBZ128rmkz\0" |
| 60367 | /* 242817 */ "VPADDUSBZ128rmkz\0" |
| 60368 | /* 242834 */ "VPMAXSBZ128rmkz\0" |
| 60369 | /* 242850 */ "VPOPCNTBZ128rmkz\0" |
| 60370 | /* 242867 */ "VPBROADCASTBZ128rmkz\0" |
| 60371 | /* 242888 */ "VPMINUBZ128rmkz\0" |
| 60372 | /* 242904 */ "VPMAXUBZ128rmkz\0" |
| 60373 | /* 242920 */ "VPACKSSWBZ128rmkz\0" |
| 60374 | /* 242938 */ "VPACKUSWBZ128rmkz\0" |
| 60375 | /* 242956 */ "VPERMI2DZ128rmkz\0" |
| 60376 | /* 242973 */ "VPERMT2DZ128rmkz\0" |
| 60377 | /* 242990 */ "VPSRADZ128rmkz\0" |
| 60378 | /* 243005 */ "VPSUBDZ128rmkz\0" |
| 60379 | /* 243020 */ "VPMOVSXBDZ128rmkz\0" |
| 60380 | /* 243038 */ "VPMOVZXBDZ128rmkz\0" |
| 60381 | /* 243056 */ "VPADDDZ128rmkz\0" |
| 60382 | /* 243071 */ "VPANDDZ128rmkz\0" |
| 60383 | /* 243086 */ "VPEXPANDDZ128rmkz\0" |
| 60384 | /* 243104 */ "VPSLLDZ128rmkz\0" |
| 60385 | /* 243119 */ "VPMULLDZ128rmkz\0" |
| 60386 | /* 243135 */ "VPSRLDZ128rmkz\0" |
| 60387 | /* 243150 */ "VPBLENDMDZ128rmkz\0" |
| 60388 | /* 243168 */ "VPANDNDZ128rmkz\0" |
| 60389 | /* 243184 */ "VCVTPH2PDZ128rmkz\0" |
| 60390 | /* 243202 */ "VPERMI2PDZ128rmkz\0" |
| 60391 | /* 243220 */ "VCVTDQ2PDZ128rmkz\0" |
| 60392 | /* 243238 */ "VCVTUDQ2PDZ128rmkz\0" |
| 60393 | /* 243257 */ "VCVTQQ2PDZ128rmkz\0" |
| 60394 | /* 243275 */ "VCVTUQQ2PDZ128rmkz\0" |
| 60395 | /* 243294 */ "VCVTPS2PDZ128rmkz\0" |
| 60396 | /* 243312 */ "VPERMT2PDZ128rmkz\0" |
| 60397 | /* 243330 */ "VMOVAPDZ128rmkz\0" |
| 60398 | /* 243346 */ "VSUBPDZ128rmkz\0" |
| 60399 | /* 243361 */ "VMINCPDZ128rmkz\0" |
| 60400 | /* 243377 */ "VMAXCPDZ128rmkz\0" |
| 60401 | /* 243393 */ "VADDPDZ128rmkz\0" |
| 60402 | /* 243408 */ "VEXPANDPDZ128rmkz\0" |
| 60403 | /* 243426 */ "VANDPDZ128rmkz\0" |
| 60404 | /* 243441 */ "VSCALEFPDZ128rmkz\0" |
| 60405 | /* 243459 */ "VUNPCKHPDZ128rmkz\0" |
| 60406 | /* 243477 */ "VPERMILPDZ128rmkz\0" |
| 60407 | /* 243495 */ "VUNPCKLPDZ128rmkz\0" |
| 60408 | /* 243513 */ "VMULPDZ128rmkz\0" |
| 60409 | /* 243528 */ "VBLENDMPDZ128rmkz\0" |
| 60410 | /* 243546 */ "VANDNPDZ128rmkz\0" |
| 60411 | /* 243562 */ "VMINPDZ128rmkz\0" |
| 60412 | /* 243577 */ "VORPDZ128rmkz\0" |
| 60413 | /* 243591 */ "VXORPDZ128rmkz\0" |
| 60414 | /* 243606 */ "VMOVUPDZ128rmkz\0" |
| 60415 | /* 243622 */ "VDIVPDZ128rmkz\0" |
| 60416 | /* 243637 */ "VMAXPDZ128rmkz\0" |
| 60417 | /* 243652 */ "VPORDZ128rmkz\0" |
| 60418 | /* 243666 */ "VPXORDZ128rmkz\0" |
| 60419 | /* 243681 */ "VPABSDZ128rmkz\0" |
| 60420 | /* 243696 */ "VPMINSDZ128rmkz\0" |
| 60421 | /* 243712 */ "VPMAXSDZ128rmkz\0" |
| 60422 | /* 243728 */ "VPCONFLICTDZ128rmkz\0" |
| 60423 | /* 243748 */ "VPOPCNTDZ128rmkz\0" |
| 60424 | /* 243765 */ "VPLZCNTDZ128rmkz\0" |
| 60425 | /* 243782 */ "VPBROADCASTDZ128rmkz\0" |
| 60426 | /* 243803 */ "VPMINUDZ128rmkz\0" |
| 60427 | /* 243819 */ "VPMAXUDZ128rmkz\0" |
| 60428 | /* 243835 */ "VPSRAVDZ128rmkz\0" |
| 60429 | /* 243851 */ "VPSLLVDZ128rmkz\0" |
| 60430 | /* 243867 */ "VPROLVDZ128rmkz\0" |
| 60431 | /* 243883 */ "VPSRLVDZ128rmkz\0" |
| 60432 | /* 243899 */ "VPRORVDZ128rmkz\0" |
| 60433 | /* 243915 */ "VPMADDWDZ128rmkz\0" |
| 60434 | /* 243932 */ "VPUNPCKHWDZ128rmkz\0" |
| 60435 | /* 243951 */ "VPUNPCKLWDZ128rmkz\0" |
| 60436 | /* 243970 */ "VPMOVSXWDZ128rmkz\0" |
| 60437 | /* 243988 */ "VPMOVZXWDZ128rmkz\0" |
| 60438 | /* 244006 */ "VCVTPD2PHZ128rmkz\0" |
| 60439 | /* 244024 */ "VCVTDQ2PHZ128rmkz\0" |
| 60440 | /* 244042 */ "VCVTUDQ2PHZ128rmkz\0" |
| 60441 | /* 244061 */ "VCVTQQ2PHZ128rmkz\0" |
| 60442 | /* 244079 */ "VCVTUQQ2PHZ128rmkz\0" |
| 60443 | /* 244098 */ "VCVTW2PHZ128rmkz\0" |
| 60444 | /* 244115 */ "VCVTUW2PHZ128rmkz\0" |
| 60445 | /* 244133 */ "VSUBPHZ128rmkz\0" |
| 60446 | /* 244148 */ "VFCMULCPHZ128rmkz\0" |
| 60447 | /* 244166 */ "VFMULCPHZ128rmkz\0" |
| 60448 | /* 244183 */ "VMINCPHZ128rmkz\0" |
| 60449 | /* 244199 */ "VMAXCPHZ128rmkz\0" |
| 60450 | /* 244215 */ "VADDPHZ128rmkz\0" |
| 60451 | /* 244230 */ "VSCALEFPHZ128rmkz\0" |
| 60452 | /* 244248 */ "VMULPHZ128rmkz\0" |
| 60453 | /* 244263 */ "VMINPHZ128rmkz\0" |
| 60454 | /* 244278 */ "VDIVPHZ128rmkz\0" |
| 60455 | /* 244293 */ "VMAXPHZ128rmkz\0" |
| 60456 | /* 244308 */ "VMOVDDUPZ128rmkz\0" |
| 60457 | /* 244325 */ "VMOVSHDUPZ128rmkz\0" |
| 60458 | /* 244343 */ "VMOVSLDUPZ128rmkz\0" |
| 60459 | /* 244361 */ "VPERMI2QZ128rmkz\0" |
| 60460 | /* 244378 */ "VPERMT2QZ128rmkz\0" |
| 60461 | /* 244395 */ "VPSRAQZ128rmkz\0" |
| 60462 | /* 244410 */ "VPSUBQZ128rmkz\0" |
| 60463 | /* 244425 */ "VPMOVSXBQZ128rmkz\0" |
| 60464 | /* 244443 */ "VPMOVZXBQZ128rmkz\0" |
| 60465 | /* 244461 */ "VCVTTPD2DQZ128rmkz\0" |
| 60466 | /* 244480 */ "VCVTPD2DQZ128rmkz\0" |
| 60467 | /* 244498 */ "VCVTTPH2DQZ128rmkz\0" |
| 60468 | /* 244517 */ "VCVTPH2DQZ128rmkz\0" |
| 60469 | /* 244535 */ "VCVTTPS2DQZ128rmkz\0" |
| 60470 | /* 244554 */ "VCVTPS2DQZ128rmkz\0" |
| 60471 | /* 244572 */ "VPADDQZ128rmkz\0" |
| 60472 | /* 244587 */ "VPUNPCKHDQZ128rmkz\0" |
| 60473 | /* 244606 */ "VPUNPCKLDQZ128rmkz\0" |
| 60474 | /* 244625 */ "VPMULDQZ128rmkz\0" |
| 60475 | /* 244641 */ "VPANDQZ128rmkz\0" |
| 60476 | /* 244656 */ "VPEXPANDQZ128rmkz\0" |
| 60477 | /* 244674 */ "VPUNPCKHQDQZ128rmkz\0" |
| 60478 | /* 244694 */ "VPUNPCKLQDQZ128rmkz\0" |
| 60479 | /* 244714 */ "VCVTTPD2UDQZ128rmkz\0" |
| 60480 | /* 244734 */ "VCVTPD2UDQZ128rmkz\0" |
| 60481 | /* 244753 */ "VCVTTPH2UDQZ128rmkz\0" |
| 60482 | /* 244773 */ "VCVTPH2UDQZ128rmkz\0" |
| 60483 | /* 244792 */ "VCVTTPS2UDQZ128rmkz\0" |
| 60484 | /* 244812 */ "VCVTPS2UDQZ128rmkz\0" |
| 60485 | /* 244831 */ "VPMULUDQZ128rmkz\0" |
| 60486 | /* 244848 */ "VPMOVSXDQZ128rmkz\0" |
| 60487 | /* 244866 */ "VPMOVZXDQZ128rmkz\0" |
| 60488 | /* 244884 */ "VPSLLQZ128rmkz\0" |
| 60489 | /* 244899 */ "VPMULLQZ128rmkz\0" |
| 60490 | /* 244915 */ "VPSRLQZ128rmkz\0" |
| 60491 | /* 244930 */ "VPBLENDMQZ128rmkz\0" |
| 60492 | /* 244948 */ "VPANDNQZ128rmkz\0" |
| 60493 | /* 244964 */ "VCVTTPD2QQZ128rmkz\0" |
| 60494 | /* 244983 */ "VCVTPD2QQZ128rmkz\0" |
| 60495 | /* 245001 */ "VCVTTPH2QQZ128rmkz\0" |
| 60496 | /* 245020 */ "VCVTPH2QQZ128rmkz\0" |
| 60497 | /* 245038 */ "VCVTTPS2QQZ128rmkz\0" |
| 60498 | /* 245057 */ "VCVTPS2QQZ128rmkz\0" |
| 60499 | /* 245075 */ "VCVTTPD2UQQZ128rmkz\0" |
| 60500 | /* 245095 */ "VCVTPD2UQQZ128rmkz\0" |
| 60501 | /* 245114 */ "VCVTTPH2UQQZ128rmkz\0" |
| 60502 | /* 245134 */ "VCVTPH2UQQZ128rmkz\0" |
| 60503 | /* 245153 */ "VCVTTPS2UQQZ128rmkz\0" |
| 60504 | /* 245173 */ "VCVTPS2UQQZ128rmkz\0" |
| 60505 | /* 245192 */ "VPORQZ128rmkz\0" |
| 60506 | /* 245206 */ "VPXORQZ128rmkz\0" |
| 60507 | /* 245221 */ "VPABSQZ128rmkz\0" |
| 60508 | /* 245236 */ "VPMINSQZ128rmkz\0" |
| 60509 | /* 245252 */ "VPMAXSQZ128rmkz\0" |
| 60510 | /* 245268 */ "VPCONFLICTQZ128rmkz\0" |
| 60511 | /* 245288 */ "VPOPCNTQZ128rmkz\0" |
| 60512 | /* 245305 */ "VPLZCNTQZ128rmkz\0" |
| 60513 | /* 245322 */ "VPBROADCASTQZ128rmkz\0" |
| 60514 | /* 245343 */ "VPMINUQZ128rmkz\0" |
| 60515 | /* 245359 */ "VPMAXUQZ128rmkz\0" |
| 60516 | /* 245375 */ "VPSRAVQZ128rmkz\0" |
| 60517 | /* 245391 */ "VPSLLVQZ128rmkz\0" |
| 60518 | /* 245407 */ "VPROLVQZ128rmkz\0" |
| 60519 | /* 245423 */ "VPSRLVQZ128rmkz\0" |
| 60520 | /* 245439 */ "VPRORVQZ128rmkz\0" |
| 60521 | /* 245455 */ "VPMOVSXWQZ128rmkz\0" |
| 60522 | /* 245473 */ "VPMOVZXWQZ128rmkz\0" |
| 60523 | /* 245491 */ "VCVTPD2PSZ128rmkz\0" |
| 60524 | /* 245509 */ "VCVTPH2PSZ128rmkz\0" |
| 60525 | /* 245527 */ "VPERMI2PSZ128rmkz\0" |
| 60526 | /* 245545 */ "VCVTDQ2PSZ128rmkz\0" |
| 60527 | /* 245563 */ "VCVTUDQ2PSZ128rmkz\0" |
| 60528 | /* 245582 */ "VCVTQQ2PSZ128rmkz\0" |
| 60529 | /* 245600 */ "VCVTUQQ2PSZ128rmkz\0" |
| 60530 | /* 245619 */ "VPERMT2PSZ128rmkz\0" |
| 60531 | /* 245637 */ "VMOVAPSZ128rmkz\0" |
| 60532 | /* 245653 */ "VSUBPSZ128rmkz\0" |
| 60533 | /* 245668 */ "VMINCPSZ128rmkz\0" |
| 60534 | /* 245684 */ "VMAXCPSZ128rmkz\0" |
| 60535 | /* 245700 */ "VADDPSZ128rmkz\0" |
| 60536 | /* 245715 */ "VEXPANDPSZ128rmkz\0" |
| 60537 | /* 245733 */ "VANDPSZ128rmkz\0" |
| 60538 | /* 245748 */ "VSCALEFPSZ128rmkz\0" |
| 60539 | /* 245766 */ "VUNPCKHPSZ128rmkz\0" |
| 60540 | /* 245784 */ "VPERMILPSZ128rmkz\0" |
| 60541 | /* 245802 */ "VUNPCKLPSZ128rmkz\0" |
| 60542 | /* 245820 */ "VMULPSZ128rmkz\0" |
| 60543 | /* 245835 */ "VBLENDMPSZ128rmkz\0" |
| 60544 | /* 245853 */ "VANDNPSZ128rmkz\0" |
| 60545 | /* 245869 */ "VMINPSZ128rmkz\0" |
| 60546 | /* 245884 */ "VORPSZ128rmkz\0" |
| 60547 | /* 245898 */ "VXORPSZ128rmkz\0" |
| 60548 | /* 245913 */ "VMOVUPSZ128rmkz\0" |
| 60549 | /* 245929 */ "VDIVPSZ128rmkz\0" |
| 60550 | /* 245944 */ "VMAXPSZ128rmkz\0" |
| 60551 | /* 245959 */ "VBROADCASTSSZ128rmkz\0" |
| 60552 | /* 245980 */ "VCVTTPH2WZ128rmkz\0" |
| 60553 | /* 245998 */ "VCVTPH2WZ128rmkz\0" |
| 60554 | /* 246015 */ "VPERMI2WZ128rmkz\0" |
| 60555 | /* 246032 */ "VPERMT2WZ128rmkz\0" |
| 60556 | /* 246049 */ "VPSRAWZ128rmkz\0" |
| 60557 | /* 246064 */ "VPUNPCKHBWZ128rmkz\0" |
| 60558 | /* 246083 */ "VPUNPCKLBWZ128rmkz\0" |
| 60559 | /* 246102 */ "VPSUBWZ128rmkz\0" |
| 60560 | /* 246117 */ "VPMOVSXBWZ128rmkz\0" |
| 60561 | /* 246135 */ "VPMOVZXBWZ128rmkz\0" |
| 60562 | /* 246153 */ "VPADDWZ128rmkz\0" |
| 60563 | /* 246168 */ "VPEXPANDWZ128rmkz\0" |
| 60564 | /* 246186 */ "VPACKSSDWZ128rmkz\0" |
| 60565 | /* 246204 */ "VPACKUSDWZ128rmkz\0" |
| 60566 | /* 246222 */ "VPAVGWZ128rmkz\0" |
| 60567 | /* 246237 */ "VPMULHWZ128rmkz\0" |
| 60568 | /* 246253 */ "VPSLLWZ128rmkz\0" |
| 60569 | /* 246268 */ "VPMULLWZ128rmkz\0" |
| 60570 | /* 246284 */ "VPSRLWZ128rmkz\0" |
| 60571 | /* 246299 */ "VPBLENDMWZ128rmkz\0" |
| 60572 | /* 246317 */ "VPERMWZ128rmkz\0" |
| 60573 | /* 246332 */ "VPABSWZ128rmkz\0" |
| 60574 | /* 246347 */ "VPMADDUBSWZ128rmkz\0" |
| 60575 | /* 246366 */ "VPSUBSWZ128rmkz\0" |
| 60576 | /* 246382 */ "VPADDSWZ128rmkz\0" |
| 60577 | /* 246398 */ "VPMINSWZ128rmkz\0" |
| 60578 | /* 246414 */ "VPMULHRSWZ128rmkz\0" |
| 60579 | /* 246432 */ "VPSUBUSWZ128rmkz\0" |
| 60580 | /* 246449 */ "VPADDUSWZ128rmkz\0" |
| 60581 | /* 246466 */ "VPMAXSWZ128rmkz\0" |
| 60582 | /* 246482 */ "VPOPCNTWZ128rmkz\0" |
| 60583 | /* 246499 */ "VPBROADCASTWZ128rmkz\0" |
| 60584 | /* 246520 */ "VCVTTPH2UWZ128rmkz\0" |
| 60585 | /* 246539 */ "VCVTPH2UWZ128rmkz\0" |
| 60586 | /* 246557 */ "VPMULHUWZ128rmkz\0" |
| 60587 | /* 246574 */ "VPMINUWZ128rmkz\0" |
| 60588 | /* 246590 */ "VPMAXUWZ128rmkz\0" |
| 60589 | /* 246606 */ "VPSRAVWZ128rmkz\0" |
| 60590 | /* 246622 */ "VPSLLVWZ128rmkz\0" |
| 60591 | /* 246638 */ "VPSRLVWZ128rmkz\0" |
| 60592 | /* 246654 */ "VCVTPS2PHXZ128rmkz\0" |
| 60593 | /* 246673 */ "VCVTPH2PSXZ128rmkz\0" |
| 60594 | /* 246692 */ "VBROADCASTF32X8rmkz\0" |
| 60595 | /* 246712 */ "VBROADCASTI32X8rmkz\0" |
| 60596 | /* 246732 */ "VP4DPWSSDrmkz\0" |
| 60597 | /* 246746 */ "VP4DPWSSDSrmkz\0" |
| 60598 | /* 246761 */ "V4FMADDPSrmkz\0" |
| 60599 | /* 246775 */ "V4FNMADDPSrmkz\0" |
| 60600 | /* 246790 */ "V4FMADDSSrmkz\0" |
| 60601 | /* 246804 */ "V4FNMADDSSrmkz\0" |
| 60602 | /* 246819 */ "VMOVDQA32Zrmkz\0" |
| 60603 | /* 246834 */ "VMOVDQU32Zrmkz\0" |
| 60604 | /* 246849 */ "VBROADCASTF32X2Zrmkz\0" |
| 60605 | /* 246870 */ "VBROADCASTI32X2Zrmkz\0" |
| 60606 | /* 246891 */ "VINSERTF64x2Zrmkz\0" |
| 60607 | /* 246909 */ "VINSERTI64x2Zrmkz\0" |
| 60608 | /* 246927 */ "VMOVDQA64Zrmkz\0" |
| 60609 | /* 246942 */ "VMOVDQU64Zrmkz\0" |
| 60610 | /* 246957 */ "VINSERTF32x4Zrmkz\0" |
| 60611 | /* 246975 */ "VINSERTI32x4Zrmkz\0" |
| 60612 | /* 246993 */ "VINSERTF64x4Zrmkz\0" |
| 60613 | /* 247011 */ "VINSERTI64x4Zrmkz\0" |
| 60614 | /* 247029 */ "VCVTNE2PS2BF16Zrmkz\0" |
| 60615 | /* 247049 */ "VCVTNEPS2BF16Zrmkz\0" |
| 60616 | /* 247068 */ "VMOVDQU16Zrmkz\0" |
| 60617 | /* 247083 */ "VMOVDQU8Zrmkz\0" |
| 60618 | /* 247097 */ "VINSERTF32x8Zrmkz\0" |
| 60619 | /* 247115 */ "VINSERTI32x8Zrmkz\0" |
| 60620 | /* 247133 */ "VPERMI2BZrmkz\0" |
| 60621 | /* 247147 */ "VPERMT2BZrmkz\0" |
| 60622 | /* 247161 */ "VPSUBBZrmkz\0" |
| 60623 | /* 247173 */ "VPADDBZrmkz\0" |
| 60624 | /* 247185 */ "VPEXPANDBZrmkz\0" |
| 60625 | /* 247200 */ "VPSHUFBZrmkz\0" |
| 60626 | /* 247213 */ "VPAVGBZrmkz\0" |
| 60627 | /* 247225 */ "VGF2P8MULBZrmkz\0" |
| 60628 | /* 247241 */ "VPBLENDMBZrmkz\0" |
| 60629 | /* 247256 */ "VPERMBZrmkz\0" |
| 60630 | /* 247268 */ "VPMULTISHIFTQBZrmkz\0" |
| 60631 | /* 247288 */ "VPABSBZrmkz\0" |
| 60632 | /* 247300 */ "VPSUBSBZrmkz\0" |
| 60633 | /* 247313 */ "VPADDSBZrmkz\0" |
| 60634 | /* 247326 */ "VPMINSBZrmkz\0" |
| 60635 | /* 247339 */ "VPSUBUSBZrmkz\0" |
| 60636 | /* 247353 */ "VPADDUSBZrmkz\0" |
| 60637 | /* 247367 */ "VPMAXSBZrmkz\0" |
| 60638 | /* 247380 */ "VPOPCNTBZrmkz\0" |
| 60639 | /* 247394 */ "VPBROADCASTBZrmkz\0" |
| 60640 | /* 247412 */ "VPMINUBZrmkz\0" |
| 60641 | /* 247425 */ "VPMAXUBZrmkz\0" |
| 60642 | /* 247438 */ "VPACKSSWBZrmkz\0" |
| 60643 | /* 247453 */ "VPACKUSWBZrmkz\0" |
| 60644 | /* 247468 */ "VPERMI2DZrmkz\0" |
| 60645 | /* 247482 */ "VPERMT2DZrmkz\0" |
| 60646 | /* 247496 */ "VPSRADZrmkz\0" |
| 60647 | /* 247508 */ "VPSUBDZrmkz\0" |
| 60648 | /* 247520 */ "VPMOVSXBDZrmkz\0" |
| 60649 | /* 247535 */ "VPMOVZXBDZrmkz\0" |
| 60650 | /* 247550 */ "VPADDDZrmkz\0" |
| 60651 | /* 247562 */ "VPANDDZrmkz\0" |
| 60652 | /* 247574 */ "VPEXPANDDZrmkz\0" |
| 60653 | /* 247589 */ "VPSLLDZrmkz\0" |
| 60654 | /* 247601 */ "VPMULLDZrmkz\0" |
| 60655 | /* 247614 */ "VPSRLDZrmkz\0" |
| 60656 | /* 247626 */ "VPBLENDMDZrmkz\0" |
| 60657 | /* 247641 */ "VPERMDZrmkz\0" |
| 60658 | /* 247653 */ "VPANDNDZrmkz\0" |
| 60659 | /* 247666 */ "VCVTPH2PDZrmkz\0" |
| 60660 | /* 247681 */ "VPERMI2PDZrmkz\0" |
| 60661 | /* 247696 */ "VCVTDQ2PDZrmkz\0" |
| 60662 | /* 247711 */ "VCVTUDQ2PDZrmkz\0" |
| 60663 | /* 247727 */ "VCVTQQ2PDZrmkz\0" |
| 60664 | /* 247742 */ "VCVTUQQ2PDZrmkz\0" |
| 60665 | /* 247758 */ "VCVTPS2PDZrmkz\0" |
| 60666 | /* 247773 */ "VPERMT2PDZrmkz\0" |
| 60667 | /* 247788 */ "VMOVAPDZrmkz\0" |
| 60668 | /* 247801 */ "VSUBPDZrmkz\0" |
| 60669 | /* 247813 */ "VMINCPDZrmkz\0" |
| 60670 | /* 247826 */ "VMAXCPDZrmkz\0" |
| 60671 | /* 247839 */ "VADDPDZrmkz\0" |
| 60672 | /* 247851 */ "VEXPANDPDZrmkz\0" |
| 60673 | /* 247866 */ "VANDPDZrmkz\0" |
| 60674 | /* 247878 */ "VSCALEFPDZrmkz\0" |
| 60675 | /* 247893 */ "VUNPCKHPDZrmkz\0" |
| 60676 | /* 247908 */ "VPERMILPDZrmkz\0" |
| 60677 | /* 247923 */ "VUNPCKLPDZrmkz\0" |
| 60678 | /* 247938 */ "VMULPDZrmkz\0" |
| 60679 | /* 247950 */ "VBLENDMPDZrmkz\0" |
| 60680 | /* 247965 */ "VPERMPDZrmkz\0" |
| 60681 | /* 247978 */ "VANDNPDZrmkz\0" |
| 60682 | /* 247991 */ "VMINPDZrmkz\0" |
| 60683 | /* 248003 */ "VORPDZrmkz\0" |
| 60684 | /* 248014 */ "VXORPDZrmkz\0" |
| 60685 | /* 248026 */ "VMOVUPDZrmkz\0" |
| 60686 | /* 248039 */ "VDIVPDZrmkz\0" |
| 60687 | /* 248051 */ "VMAXPDZrmkz\0" |
| 60688 | /* 248063 */ "VPORDZrmkz\0" |
| 60689 | /* 248074 */ "VPXORDZrmkz\0" |
| 60690 | /* 248086 */ "VRCP14SDZrmkz\0" |
| 60691 | /* 248100 */ "VRSQRT14SDZrmkz\0" |
| 60692 | /* 248116 */ "VPABSDZrmkz\0" |
| 60693 | /* 248128 */ "VSCALEFSDZrmkz\0" |
| 60694 | /* 248143 */ "VPMINSDZrmkz\0" |
| 60695 | /* 248156 */ "VBROADCASTSDZrmkz\0" |
| 60696 | /* 248174 */ "VMOVSDZrmkz\0" |
| 60697 | /* 248186 */ "VPMAXSDZrmkz\0" |
| 60698 | /* 248199 */ "VPCONFLICTDZrmkz\0" |
| 60699 | /* 248216 */ "VPOPCNTDZrmkz\0" |
| 60700 | /* 248230 */ "VPLZCNTDZrmkz\0" |
| 60701 | /* 248244 */ "VPBROADCASTDZrmkz\0" |
| 60702 | /* 248262 */ "VPMINUDZrmkz\0" |
| 60703 | /* 248275 */ "VPMAXUDZrmkz\0" |
| 60704 | /* 248288 */ "VPSRAVDZrmkz\0" |
| 60705 | /* 248301 */ "VPSLLVDZrmkz\0" |
| 60706 | /* 248314 */ "VPROLVDZrmkz\0" |
| 60707 | /* 248327 */ "VPSRLVDZrmkz\0" |
| 60708 | /* 248340 */ "VPRORVDZrmkz\0" |
| 60709 | /* 248353 */ "VPMADDWDZrmkz\0" |
| 60710 | /* 248367 */ "VPUNPCKHWDZrmkz\0" |
| 60711 | /* 248383 */ "VPUNPCKLWDZrmkz\0" |
| 60712 | /* 248399 */ "VPMOVSXWDZrmkz\0" |
| 60713 | /* 248414 */ "VPMOVZXWDZrmkz\0" |
| 60714 | /* 248429 */ "VCVTPD2PHZrmkz\0" |
| 60715 | /* 248444 */ "VCVTDQ2PHZrmkz\0" |
| 60716 | /* 248459 */ "VCVTUDQ2PHZrmkz\0" |
| 60717 | /* 248475 */ "VCVTQQ2PHZrmkz\0" |
| 60718 | /* 248490 */ "VCVTUQQ2PHZrmkz\0" |
| 60719 | /* 248506 */ "VCVTW2PHZrmkz\0" |
| 60720 | /* 248520 */ "VCVTUW2PHZrmkz\0" |
| 60721 | /* 248535 */ "VSUBPHZrmkz\0" |
| 60722 | /* 248547 */ "VFCMULCPHZrmkz\0" |
| 60723 | /* 248562 */ "VFMULCPHZrmkz\0" |
| 60724 | /* 248576 */ "VMINCPHZrmkz\0" |
| 60725 | /* 248589 */ "VMAXCPHZrmkz\0" |
| 60726 | /* 248602 */ "VADDPHZrmkz\0" |
| 60727 | /* 248614 */ "VSCALEFPHZrmkz\0" |
| 60728 | /* 248629 */ "VMULPHZrmkz\0" |
| 60729 | /* 248641 */ "VMINPHZrmkz\0" |
| 60730 | /* 248653 */ "VDIVPHZrmkz\0" |
| 60731 | /* 248665 */ "VMAXPHZrmkz\0" |
| 60732 | /* 248677 */ "VFCMULCSHZrmkz\0" |
| 60733 | /* 248692 */ "VFMULCSHZrmkz\0" |
| 60734 | /* 248706 */ "VSCALEFSHZrmkz\0" |
| 60735 | /* 248721 */ "VRCPSHZrmkz\0" |
| 60736 | /* 248733 */ "VRSQRTSHZrmkz\0" |
| 60737 | /* 248747 */ "VMOVSHZrmkz\0" |
| 60738 | /* 248759 */ "VMOVDDUPZrmkz\0" |
| 60739 | /* 248773 */ "VMOVSHDUPZrmkz\0" |
| 60740 | /* 248788 */ "VMOVSLDUPZrmkz\0" |
| 60741 | /* 248803 */ "VPERMI2QZrmkz\0" |
| 60742 | /* 248817 */ "VPERMT2QZrmkz\0" |
| 60743 | /* 248831 */ "VPSRAQZrmkz\0" |
| 60744 | /* 248843 */ "VPSUBQZrmkz\0" |
| 60745 | /* 248855 */ "VPMOVSXBQZrmkz\0" |
| 60746 | /* 248870 */ "VPMOVZXBQZrmkz\0" |
| 60747 | /* 248885 */ "VCVTTPD2DQZrmkz\0" |
| 60748 | /* 248901 */ "VCVTPD2DQZrmkz\0" |
| 60749 | /* 248916 */ "VCVTTPH2DQZrmkz\0" |
| 60750 | /* 248932 */ "VCVTPH2DQZrmkz\0" |
| 60751 | /* 248947 */ "VCVTTPS2DQZrmkz\0" |
| 60752 | /* 248963 */ "VCVTPS2DQZrmkz\0" |
| 60753 | /* 248978 */ "VPADDQZrmkz\0" |
| 60754 | /* 248990 */ "VPUNPCKHDQZrmkz\0" |
| 60755 | /* 249006 */ "VPUNPCKLDQZrmkz\0" |
| 60756 | /* 249022 */ "VPMULDQZrmkz\0" |
| 60757 | /* 249035 */ "VPANDQZrmkz\0" |
| 60758 | /* 249047 */ "VPEXPANDQZrmkz\0" |
| 60759 | /* 249062 */ "VPUNPCKHQDQZrmkz\0" |
| 60760 | /* 249079 */ "VPUNPCKLQDQZrmkz\0" |
| 60761 | /* 249096 */ "VCVTTPD2UDQZrmkz\0" |
| 60762 | /* 249113 */ "VCVTPD2UDQZrmkz\0" |
| 60763 | /* 249129 */ "VCVTTPH2UDQZrmkz\0" |
| 60764 | /* 249146 */ "VCVTPH2UDQZrmkz\0" |
| 60765 | /* 249162 */ "VCVTTPS2UDQZrmkz\0" |
| 60766 | /* 249179 */ "VCVTPS2UDQZrmkz\0" |
| 60767 | /* 249195 */ "VPMULUDQZrmkz\0" |
| 60768 | /* 249209 */ "VPMOVSXDQZrmkz\0" |
| 60769 | /* 249224 */ "VPMOVZXDQZrmkz\0" |
| 60770 | /* 249239 */ "VPSLLQZrmkz\0" |
| 60771 | /* 249251 */ "VPMULLQZrmkz\0" |
| 60772 | /* 249264 */ "VPSRLQZrmkz\0" |
| 60773 | /* 249276 */ "VPBLENDMQZrmkz\0" |
| 60774 | /* 249291 */ "VPERMQZrmkz\0" |
| 60775 | /* 249303 */ "VPANDNQZrmkz\0" |
| 60776 | /* 249316 */ "VCVTTPD2QQZrmkz\0" |
| 60777 | /* 249332 */ "VCVTPD2QQZrmkz\0" |
| 60778 | /* 249347 */ "VCVTTPH2QQZrmkz\0" |
| 60779 | /* 249363 */ "VCVTPH2QQZrmkz\0" |
| 60780 | /* 249378 */ "VCVTTPS2QQZrmkz\0" |
| 60781 | /* 249394 */ "VCVTPS2QQZrmkz\0" |
| 60782 | /* 249409 */ "VCVTTPD2UQQZrmkz\0" |
| 60783 | /* 249426 */ "VCVTPD2UQQZrmkz\0" |
| 60784 | /* 249442 */ "VCVTTPH2UQQZrmkz\0" |
| 60785 | /* 249459 */ "VCVTPH2UQQZrmkz\0" |
| 60786 | /* 249475 */ "VCVTTPS2UQQZrmkz\0" |
| 60787 | /* 249492 */ "VCVTPS2UQQZrmkz\0" |
| 60788 | /* 249508 */ "VPORQZrmkz\0" |
| 60789 | /* 249519 */ "VPXORQZrmkz\0" |
| 60790 | /* 249531 */ "VPABSQZrmkz\0" |
| 60791 | /* 249543 */ "VPMINSQZrmkz\0" |
| 60792 | /* 249556 */ "VPMAXSQZrmkz\0" |
| 60793 | /* 249569 */ "VPCONFLICTQZrmkz\0" |
| 60794 | /* 249586 */ "VPOPCNTQZrmkz\0" |
| 60795 | /* 249600 */ "VPLZCNTQZrmkz\0" |
| 60796 | /* 249614 */ "VPBROADCASTQZrmkz\0" |
| 60797 | /* 249632 */ "VPMINUQZrmkz\0" |
| 60798 | /* 249645 */ "VPMAXUQZrmkz\0" |
| 60799 | /* 249658 */ "VPSRAVQZrmkz\0" |
| 60800 | /* 249671 */ "VPSLLVQZrmkz\0" |
| 60801 | /* 249684 */ "VPROLVQZrmkz\0" |
| 60802 | /* 249697 */ "VPSRLVQZrmkz\0" |
| 60803 | /* 249710 */ "VPRORVQZrmkz\0" |
| 60804 | /* 249723 */ "VPMOVSXWQZrmkz\0" |
| 60805 | /* 249738 */ "VPMOVZXWQZrmkz\0" |
| 60806 | /* 249753 */ "VCVTPD2PSZrmkz\0" |
| 60807 | /* 249768 */ "VCVTPH2PSZrmkz\0" |
| 60808 | /* 249783 */ "VPERMI2PSZrmkz\0" |
| 60809 | /* 249798 */ "VCVTDQ2PSZrmkz\0" |
| 60810 | /* 249813 */ "VCVTUDQ2PSZrmkz\0" |
| 60811 | /* 249829 */ "VCVTQQ2PSZrmkz\0" |
| 60812 | /* 249844 */ "VCVTUQQ2PSZrmkz\0" |
| 60813 | /* 249860 */ "VPERMT2PSZrmkz\0" |
| 60814 | /* 249875 */ "VMOVAPSZrmkz\0" |
| 60815 | /* 249888 */ "VSUBPSZrmkz\0" |
| 60816 | /* 249900 */ "VMINCPSZrmkz\0" |
| 60817 | /* 249913 */ "VMAXCPSZrmkz\0" |
| 60818 | /* 249926 */ "VADDPSZrmkz\0" |
| 60819 | /* 249938 */ "VEXPANDPSZrmkz\0" |
| 60820 | /* 249953 */ "VANDPSZrmkz\0" |
| 60821 | /* 249965 */ "VSCALEFPSZrmkz\0" |
| 60822 | /* 249980 */ "VUNPCKHPSZrmkz\0" |
| 60823 | /* 249995 */ "VPERMILPSZrmkz\0" |
| 60824 | /* 250010 */ "VUNPCKLPSZrmkz\0" |
| 60825 | /* 250025 */ "VMULPSZrmkz\0" |
| 60826 | /* 250037 */ "VBLENDMPSZrmkz\0" |
| 60827 | /* 250052 */ "VPERMPSZrmkz\0" |
| 60828 | /* 250065 */ "VANDNPSZrmkz\0" |
| 60829 | /* 250078 */ "VMINPSZrmkz\0" |
| 60830 | /* 250090 */ "VORPSZrmkz\0" |
| 60831 | /* 250101 */ "VXORPSZrmkz\0" |
| 60832 | /* 250113 */ "VMOVUPSZrmkz\0" |
| 60833 | /* 250126 */ "VDIVPSZrmkz\0" |
| 60834 | /* 250138 */ "VMAXPSZrmkz\0" |
| 60835 | /* 250150 */ "VRCP14SSZrmkz\0" |
| 60836 | /* 250164 */ "VRSQRT14SSZrmkz\0" |
| 60837 | /* 250180 */ "VSCALEFSSZrmkz\0" |
| 60838 | /* 250195 */ "VBROADCASTSSZrmkz\0" |
| 60839 | /* 250213 */ "VMOVSSZrmkz\0" |
| 60840 | /* 250225 */ "VCVTTPH2WZrmkz\0" |
| 60841 | /* 250240 */ "VCVTPH2WZrmkz\0" |
| 60842 | /* 250254 */ "VPERMI2WZrmkz\0" |
| 60843 | /* 250268 */ "VPERMT2WZrmkz\0" |
| 60844 | /* 250282 */ "VPSRAWZrmkz\0" |
| 60845 | /* 250294 */ "VPUNPCKHBWZrmkz\0" |
| 60846 | /* 250310 */ "VPUNPCKLBWZrmkz\0" |
| 60847 | /* 250326 */ "VPSUBWZrmkz\0" |
| 60848 | /* 250338 */ "VPMOVSXBWZrmkz\0" |
| 60849 | /* 250353 */ "VPMOVZXBWZrmkz\0" |
| 60850 | /* 250368 */ "VPADDWZrmkz\0" |
| 60851 | /* 250380 */ "VPEXPANDWZrmkz\0" |
| 60852 | /* 250395 */ "VPACKSSDWZrmkz\0" |
| 60853 | /* 250410 */ "VPACKUSDWZrmkz\0" |
| 60854 | /* 250425 */ "VPAVGWZrmkz\0" |
| 60855 | /* 250437 */ "VPMULHWZrmkz\0" |
| 60856 | /* 250450 */ "VPSLLWZrmkz\0" |
| 60857 | /* 250462 */ "VPMULLWZrmkz\0" |
| 60858 | /* 250475 */ "VPSRLWZrmkz\0" |
| 60859 | /* 250487 */ "VPBLENDMWZrmkz\0" |
| 60860 | /* 250502 */ "VPERMWZrmkz\0" |
| 60861 | /* 250514 */ "VPABSWZrmkz\0" |
| 60862 | /* 250526 */ "VPMADDUBSWZrmkz\0" |
| 60863 | /* 250542 */ "VPSUBSWZrmkz\0" |
| 60864 | /* 250555 */ "VPADDSWZrmkz\0" |
| 60865 | /* 250568 */ "VPMINSWZrmkz\0" |
| 60866 | /* 250581 */ "VPMULHRSWZrmkz\0" |
| 60867 | /* 250596 */ "VPSUBUSWZrmkz\0" |
| 60868 | /* 250610 */ "VPADDUSWZrmkz\0" |
| 60869 | /* 250624 */ "VPMAXSWZrmkz\0" |
| 60870 | /* 250637 */ "VPOPCNTWZrmkz\0" |
| 60871 | /* 250651 */ "VPBROADCASTWZrmkz\0" |
| 60872 | /* 250669 */ "VCVTTPH2UWZrmkz\0" |
| 60873 | /* 250685 */ "VCVTPH2UWZrmkz\0" |
| 60874 | /* 250700 */ "VPMULHUWZrmkz\0" |
| 60875 | /* 250714 */ "VPMINUWZrmkz\0" |
| 60876 | /* 250727 */ "VPMAXUWZrmkz\0" |
| 60877 | /* 250740 */ "VPSRAVWZrmkz\0" |
| 60878 | /* 250753 */ "VPSLLVWZrmkz\0" |
| 60879 | /* 250766 */ "VPSRLVWZrmkz\0" |
| 60880 | /* 250779 */ "VCVTPS2PHXZrmkz\0" |
| 60881 | /* 250795 */ "VCVTPH2PSXZrmkz\0" |
| 60882 | /* 250811 */ "VFMADDSUB231PDZ256rkz\0" |
| 60883 | /* 250833 */ "VFMSUB231PDZ256rkz\0" |
| 60884 | /* 250852 */ "VFNMSUB231PDZ256rkz\0" |
| 60885 | /* 250872 */ "VFMSUBADD231PDZ256rkz\0" |
| 60886 | /* 250894 */ "VFMADD231PDZ256rkz\0" |
| 60887 | /* 250913 */ "VFNMADD231PDZ256rkz\0" |
| 60888 | /* 250933 */ "VFMADDSUB132PDZ256rkz\0" |
| 60889 | /* 250955 */ "VFMSUB132PDZ256rkz\0" |
| 60890 | /* 250974 */ "VFNMSUB132PDZ256rkz\0" |
| 60891 | /* 250994 */ "VFMSUBADD132PDZ256rkz\0" |
| 60892 | /* 251016 */ "VFMADD132PDZ256rkz\0" |
| 60893 | /* 251035 */ "VFNMADD132PDZ256rkz\0" |
| 60894 | /* 251055 */ "VFMADDSUB213PDZ256rkz\0" |
| 60895 | /* 251077 */ "VFMSUB213PDZ256rkz\0" |
| 60896 | /* 251096 */ "VFNMSUB213PDZ256rkz\0" |
| 60897 | /* 251116 */ "VFMSUBADD213PDZ256rkz\0" |
| 60898 | /* 251138 */ "VFMADD213PDZ256rkz\0" |
| 60899 | /* 251157 */ "VFNMADD213PDZ256rkz\0" |
| 60900 | /* 251177 */ "VRCP14PDZ256rkz\0" |
| 60901 | /* 251193 */ "VRSQRT14PDZ256rkz\0" |
| 60902 | /* 251211 */ "VGETEXPPDZ256rkz\0" |
| 60903 | /* 251228 */ "VSQRTPDZ256rkz\0" |
| 60904 | /* 251243 */ "VPDPWSSDZ256rkz\0" |
| 60905 | /* 251259 */ "VPDPBUSDZ256rkz\0" |
| 60906 | /* 251275 */ "VPSHLDVDZ256rkz\0" |
| 60907 | /* 251291 */ "VPSHRDVDZ256rkz\0" |
| 60908 | /* 251307 */ "VFMADDSUB231PHZ256rkz\0" |
| 60909 | /* 251329 */ "VFMSUB231PHZ256rkz\0" |
| 60910 | /* 251348 */ "VFNMSUB231PHZ256rkz\0" |
| 60911 | /* 251368 */ "VFMSUBADD231PHZ256rkz\0" |
| 60912 | /* 251390 */ "VFMADD231PHZ256rkz\0" |
| 60913 | /* 251409 */ "VFNMADD231PHZ256rkz\0" |
| 60914 | /* 251429 */ "VFMADDSUB132PHZ256rkz\0" |
| 60915 | /* 251451 */ "VFMSUB132PHZ256rkz\0" |
| 60916 | /* 251470 */ "VFNMSUB132PHZ256rkz\0" |
| 60917 | /* 251490 */ "VFMSUBADD132PHZ256rkz\0" |
| 60918 | /* 251512 */ "VFMADD132PHZ256rkz\0" |
| 60919 | /* 251531 */ "VFNMADD132PHZ256rkz\0" |
| 60920 | /* 251551 */ "VFMADDSUB213PHZ256rkz\0" |
| 60921 | /* 251573 */ "VFMSUB213PHZ256rkz\0" |
| 60922 | /* 251592 */ "VFNMSUB213PHZ256rkz\0" |
| 60923 | /* 251612 */ "VFMSUBADD213PHZ256rkz\0" |
| 60924 | /* 251634 */ "VFMADD213PHZ256rkz\0" |
| 60925 | /* 251653 */ "VFNMADD213PHZ256rkz\0" |
| 60926 | /* 251673 */ "VFCMADDCPHZ256rkz\0" |
| 60927 | /* 251691 */ "VFMADDCPHZ256rkz\0" |
| 60928 | /* 251708 */ "VRCPPHZ256rkz\0" |
| 60929 | /* 251722 */ "VGETEXPPHZ256rkz\0" |
| 60930 | /* 251739 */ "VRSQRTPHZ256rkz\0" |
| 60931 | /* 251755 */ "VSQRTPHZ256rkz\0" |
| 60932 | /* 251770 */ "VPMADD52HUQZ256rkz\0" |
| 60933 | /* 251789 */ "VPMADD52LUQZ256rkz\0" |
| 60934 | /* 251808 */ "VPSHLDVQZ256rkz\0" |
| 60935 | /* 251824 */ "VPSHRDVQZ256rkz\0" |
| 60936 | /* 251840 */ "VPDPWSSDSZ256rkz\0" |
| 60937 | /* 251857 */ "VPDPBUSDSZ256rkz\0" |
| 60938 | /* 251874 */ "VFMADDSUB231PSZ256rkz\0" |
| 60939 | /* 251896 */ "VFMSUB231PSZ256rkz\0" |
| 60940 | /* 251915 */ "VFNMSUB231PSZ256rkz\0" |
| 60941 | /* 251935 */ "VFMSUBADD231PSZ256rkz\0" |
| 60942 | /* 251957 */ "VFMADD231PSZ256rkz\0" |
| 60943 | /* 251976 */ "VFNMADD231PSZ256rkz\0" |
| 60944 | /* 251996 */ "VFMADDSUB132PSZ256rkz\0" |
| 60945 | /* 252018 */ "VFMSUB132PSZ256rkz\0" |
| 60946 | /* 252037 */ "VFNMSUB132PSZ256rkz\0" |
| 60947 | /* 252057 */ "VFMSUBADD132PSZ256rkz\0" |
| 60948 | /* 252079 */ "VFMADD132PSZ256rkz\0" |
| 60949 | /* 252098 */ "VFNMADD132PSZ256rkz\0" |
| 60950 | /* 252118 */ "VFMADDSUB213PSZ256rkz\0" |
| 60951 | /* 252140 */ "VFMSUB213PSZ256rkz\0" |
| 60952 | /* 252159 */ "VFNMSUB213PSZ256rkz\0" |
| 60953 | /* 252179 */ "VFMSUBADD213PSZ256rkz\0" |
| 60954 | /* 252201 */ "VFMADD213PSZ256rkz\0" |
| 60955 | /* 252220 */ "VFNMADD213PSZ256rkz\0" |
| 60956 | /* 252240 */ "VRCP14PSZ256rkz\0" |
| 60957 | /* 252256 */ "VRSQRT14PSZ256rkz\0" |
| 60958 | /* 252274 */ "VDPBF16PSZ256rkz\0" |
| 60959 | /* 252291 */ "VGETEXPPSZ256rkz\0" |
| 60960 | /* 252308 */ "VSQRTPSZ256rkz\0" |
| 60961 | /* 252323 */ "VPSHLDVWZ256rkz\0" |
| 60962 | /* 252339 */ "VPSHRDVWZ256rkz\0" |
| 60963 | /* 252355 */ "VFMADDSUB231PDZ128rkz\0" |
| 60964 | /* 252377 */ "VFMSUB231PDZ128rkz\0" |
| 60965 | /* 252396 */ "VFNMSUB231PDZ128rkz\0" |
| 60966 | /* 252416 */ "VFMSUBADD231PDZ128rkz\0" |
| 60967 | /* 252438 */ "VFMADD231PDZ128rkz\0" |
| 60968 | /* 252457 */ "VFNMADD231PDZ128rkz\0" |
| 60969 | /* 252477 */ "VFMADDSUB132PDZ128rkz\0" |
| 60970 | /* 252499 */ "VFMSUB132PDZ128rkz\0" |
| 60971 | /* 252518 */ "VFNMSUB132PDZ128rkz\0" |
| 60972 | /* 252538 */ "VFMSUBADD132PDZ128rkz\0" |
| 60973 | /* 252560 */ "VFMADD132PDZ128rkz\0" |
| 60974 | /* 252579 */ "VFNMADD132PDZ128rkz\0" |
| 60975 | /* 252599 */ "VFMADDSUB213PDZ128rkz\0" |
| 60976 | /* 252621 */ "VFMSUB213PDZ128rkz\0" |
| 60977 | /* 252640 */ "VFNMSUB213PDZ128rkz\0" |
| 60978 | /* 252660 */ "VFMSUBADD213PDZ128rkz\0" |
| 60979 | /* 252682 */ "VFMADD213PDZ128rkz\0" |
| 60980 | /* 252701 */ "VFNMADD213PDZ128rkz\0" |
| 60981 | /* 252721 */ "VRCP14PDZ128rkz\0" |
| 60982 | /* 252737 */ "VRSQRT14PDZ128rkz\0" |
| 60983 | /* 252755 */ "VGETEXPPDZ128rkz\0" |
| 60984 | /* 252772 */ "VSQRTPDZ128rkz\0" |
| 60985 | /* 252787 */ "VPDPWSSDZ128rkz\0" |
| 60986 | /* 252803 */ "VPDPBUSDZ128rkz\0" |
| 60987 | /* 252819 */ "VPSHLDVDZ128rkz\0" |
| 60988 | /* 252835 */ "VPSHRDVDZ128rkz\0" |
| 60989 | /* 252851 */ "VFMADDSUB231PHZ128rkz\0" |
| 60990 | /* 252873 */ "VFMSUB231PHZ128rkz\0" |
| 60991 | /* 252892 */ "VFNMSUB231PHZ128rkz\0" |
| 60992 | /* 252912 */ "VFMSUBADD231PHZ128rkz\0" |
| 60993 | /* 252934 */ "VFMADD231PHZ128rkz\0" |
| 60994 | /* 252953 */ "VFNMADD231PHZ128rkz\0" |
| 60995 | /* 252973 */ "VFMADDSUB132PHZ128rkz\0" |
| 60996 | /* 252995 */ "VFMSUB132PHZ128rkz\0" |
| 60997 | /* 253014 */ "VFNMSUB132PHZ128rkz\0" |
| 60998 | /* 253034 */ "VFMSUBADD132PHZ128rkz\0" |
| 60999 | /* 253056 */ "VFMADD132PHZ128rkz\0" |
| 61000 | /* 253075 */ "VFNMADD132PHZ128rkz\0" |
| 61001 | /* 253095 */ "VFMADDSUB213PHZ128rkz\0" |
| 61002 | /* 253117 */ "VFMSUB213PHZ128rkz\0" |
| 61003 | /* 253136 */ "VFNMSUB213PHZ128rkz\0" |
| 61004 | /* 253156 */ "VFMSUBADD213PHZ128rkz\0" |
| 61005 | /* 253178 */ "VFMADD213PHZ128rkz\0" |
| 61006 | /* 253197 */ "VFNMADD213PHZ128rkz\0" |
| 61007 | /* 253217 */ "VFCMADDCPHZ128rkz\0" |
| 61008 | /* 253235 */ "VFMADDCPHZ128rkz\0" |
| 61009 | /* 253252 */ "VRCPPHZ128rkz\0" |
| 61010 | /* 253266 */ "VGETEXPPHZ128rkz\0" |
| 61011 | /* 253283 */ "VRSQRTPHZ128rkz\0" |
| 61012 | /* 253299 */ "VSQRTPHZ128rkz\0" |
| 61013 | /* 253314 */ "VPMADD52HUQZ128rkz\0" |
| 61014 | /* 253333 */ "VPMADD52LUQZ128rkz\0" |
| 61015 | /* 253352 */ "VPSHLDVQZ128rkz\0" |
| 61016 | /* 253368 */ "VPSHRDVQZ128rkz\0" |
| 61017 | /* 253384 */ "VPDPWSSDSZ128rkz\0" |
| 61018 | /* 253401 */ "VPDPBUSDSZ128rkz\0" |
| 61019 | /* 253418 */ "VFMADDSUB231PSZ128rkz\0" |
| 61020 | /* 253440 */ "VFMSUB231PSZ128rkz\0" |
| 61021 | /* 253459 */ "VFNMSUB231PSZ128rkz\0" |
| 61022 | /* 253479 */ "VFMSUBADD231PSZ128rkz\0" |
| 61023 | /* 253501 */ "VFMADD231PSZ128rkz\0" |
| 61024 | /* 253520 */ "VFNMADD231PSZ128rkz\0" |
| 61025 | /* 253540 */ "VFMADDSUB132PSZ128rkz\0" |
| 61026 | /* 253562 */ "VFMSUB132PSZ128rkz\0" |
| 61027 | /* 253581 */ "VFNMSUB132PSZ128rkz\0" |
| 61028 | /* 253601 */ "VFMSUBADD132PSZ128rkz\0" |
| 61029 | /* 253623 */ "VFMADD132PSZ128rkz\0" |
| 61030 | /* 253642 */ "VFNMADD132PSZ128rkz\0" |
| 61031 | /* 253662 */ "VFMADDSUB213PSZ128rkz\0" |
| 61032 | /* 253684 */ "VFMSUB213PSZ128rkz\0" |
| 61033 | /* 253703 */ "VFNMSUB213PSZ128rkz\0" |
| 61034 | /* 253723 */ "VFMSUBADD213PSZ128rkz\0" |
| 61035 | /* 253745 */ "VFMADD213PSZ128rkz\0" |
| 61036 | /* 253764 */ "VFNMADD213PSZ128rkz\0" |
| 61037 | /* 253784 */ "VRCP14PSZ128rkz\0" |
| 61038 | /* 253800 */ "VRSQRT14PSZ128rkz\0" |
| 61039 | /* 253818 */ "VDPBF16PSZ128rkz\0" |
| 61040 | /* 253835 */ "VGETEXPPSZ128rkz\0" |
| 61041 | /* 253852 */ "VSQRTPSZ128rkz\0" |
| 61042 | /* 253867 */ "VPSHLDVWZ128rkz\0" |
| 61043 | /* 253883 */ "VPSHRDVWZ128rkz\0" |
| 61044 | /* 253899 */ "VFMADDSUB231PDZrkz\0" |
| 61045 | /* 253918 */ "VFMSUB231PDZrkz\0" |
| 61046 | /* 253934 */ "VFNMSUB231PDZrkz\0" |
| 61047 | /* 253951 */ "VFMSUBADD231PDZrkz\0" |
| 61048 | /* 253970 */ "VFMADD231PDZrkz\0" |
| 61049 | /* 253986 */ "VFNMADD231PDZrkz\0" |
| 61050 | /* 254003 */ "VFMADDSUB132PDZrkz\0" |
| 61051 | /* 254022 */ "VFMSUB132PDZrkz\0" |
| 61052 | /* 254038 */ "VFNMSUB132PDZrkz\0" |
| 61053 | /* 254055 */ "VFMSUBADD132PDZrkz\0" |
| 61054 | /* 254074 */ "VFMADD132PDZrkz\0" |
| 61055 | /* 254090 */ "VFNMADD132PDZrkz\0" |
| 61056 | /* 254107 */ "VEXP2PDZrkz\0" |
| 61057 | /* 254119 */ "VFMADDSUB213PDZrkz\0" |
| 61058 | /* 254138 */ "VFMSUB213PDZrkz\0" |
| 61059 | /* 254154 */ "VFNMSUB213PDZrkz\0" |
| 61060 | /* 254171 */ "VFMSUBADD213PDZrkz\0" |
| 61061 | /* 254190 */ "VFMADD213PDZrkz\0" |
| 61062 | /* 254206 */ "VFNMADD213PDZrkz\0" |
| 61063 | /* 254223 */ "VRCP14PDZrkz\0" |
| 61064 | /* 254236 */ "VRSQRT14PDZrkz\0" |
| 61065 | /* 254251 */ "VRCP28PDZrkz\0" |
| 61066 | /* 254264 */ "VRSQRT28PDZrkz\0" |
| 61067 | /* 254279 */ "VGETEXPPDZrkz\0" |
| 61068 | /* 254293 */ "VSQRTPDZrkz\0" |
| 61069 | /* 254305 */ "VRCP28SDZrkz\0" |
| 61070 | /* 254318 */ "VRSQRT28SDZrkz\0" |
| 61071 | /* 254333 */ "VGETEXPSDZrkz\0" |
| 61072 | /* 254347 */ "VPDPWSSDZrkz\0" |
| 61073 | /* 254360 */ "VPDPBUSDZrkz\0" |
| 61074 | /* 254373 */ "VPSHLDVDZrkz\0" |
| 61075 | /* 254386 */ "VPSHRDVDZrkz\0" |
| 61076 | /* 254399 */ "VFMADDSUB231PHZrkz\0" |
| 61077 | /* 254418 */ "VFMSUB231PHZrkz\0" |
| 61078 | /* 254434 */ "VFNMSUB231PHZrkz\0" |
| 61079 | /* 254451 */ "VFMSUBADD231PHZrkz\0" |
| 61080 | /* 254470 */ "VFMADD231PHZrkz\0" |
| 61081 | /* 254486 */ "VFNMADD231PHZrkz\0" |
| 61082 | /* 254503 */ "VFMADDSUB132PHZrkz\0" |
| 61083 | /* 254522 */ "VFMSUB132PHZrkz\0" |
| 61084 | /* 254538 */ "VFNMSUB132PHZrkz\0" |
| 61085 | /* 254555 */ "VFMSUBADD132PHZrkz\0" |
| 61086 | /* 254574 */ "VFMADD132PHZrkz\0" |
| 61087 | /* 254590 */ "VFNMADD132PHZrkz\0" |
| 61088 | /* 254607 */ "VFMADDSUB213PHZrkz\0" |
| 61089 | /* 254626 */ "VFMSUB213PHZrkz\0" |
| 61090 | /* 254642 */ "VFNMSUB213PHZrkz\0" |
| 61091 | /* 254659 */ "VFMSUBADD213PHZrkz\0" |
| 61092 | /* 254678 */ "VFMADD213PHZrkz\0" |
| 61093 | /* 254694 */ "VFNMADD213PHZrkz\0" |
| 61094 | /* 254711 */ "VFCMADDCPHZrkz\0" |
| 61095 | /* 254726 */ "VFMADDCPHZrkz\0" |
| 61096 | /* 254740 */ "VRCPPHZrkz\0" |
| 61097 | /* 254751 */ "VGETEXPPHZrkz\0" |
| 61098 | /* 254765 */ "VRSQRTPHZrkz\0" |
| 61099 | /* 254778 */ "VSQRTPHZrkz\0" |
| 61100 | /* 254790 */ "VFCMADDCSHZrkz\0" |
| 61101 | /* 254805 */ "VFMADDCSHZrkz\0" |
| 61102 | /* 254819 */ "VGETEXPSHZrkz\0" |
| 61103 | /* 254833 */ "VPMADD52HUQZrkz\0" |
| 61104 | /* 254849 */ "VPMADD52LUQZrkz\0" |
| 61105 | /* 254865 */ "VPSHLDVQZrkz\0" |
| 61106 | /* 254878 */ "VPSHRDVQZrkz\0" |
| 61107 | /* 254891 */ "VPDPWSSDSZrkz\0" |
| 61108 | /* 254905 */ "VPDPBUSDSZrkz\0" |
| 61109 | /* 254919 */ "VFMADDSUB231PSZrkz\0" |
| 61110 | /* 254938 */ "VFMSUB231PSZrkz\0" |
| 61111 | /* 254954 */ "VFNMSUB231PSZrkz\0" |
| 61112 | /* 254971 */ "VFMSUBADD231PSZrkz\0" |
| 61113 | /* 254990 */ "VFMADD231PSZrkz\0" |
| 61114 | /* 255006 */ "VFNMADD231PSZrkz\0" |
| 61115 | /* 255023 */ "VFMADDSUB132PSZrkz\0" |
| 61116 | /* 255042 */ "VFMSUB132PSZrkz\0" |
| 61117 | /* 255058 */ "VFNMSUB132PSZrkz\0" |
| 61118 | /* 255075 */ "VFMSUBADD132PSZrkz\0" |
| 61119 | /* 255094 */ "VFMADD132PSZrkz\0" |
| 61120 | /* 255110 */ "VFNMADD132PSZrkz\0" |
| 61121 | /* 255127 */ "VEXP2PSZrkz\0" |
| 61122 | /* 255139 */ "VFMADDSUB213PSZrkz\0" |
| 61123 | /* 255158 */ "VFMSUB213PSZrkz\0" |
| 61124 | /* 255174 */ "VFNMSUB213PSZrkz\0" |
| 61125 | /* 255191 */ "VFMSUBADD213PSZrkz\0" |
| 61126 | /* 255210 */ "VFMADD213PSZrkz\0" |
| 61127 | /* 255226 */ "VFNMADD213PSZrkz\0" |
| 61128 | /* 255243 */ "VRCP14PSZrkz\0" |
| 61129 | /* 255256 */ "VRSQRT14PSZrkz\0" |
| 61130 | /* 255271 */ "VDPBF16PSZrkz\0" |
| 61131 | /* 255285 */ "VRCP28PSZrkz\0" |
| 61132 | /* 255298 */ "VRSQRT28PSZrkz\0" |
| 61133 | /* 255313 */ "VGETEXPPSZrkz\0" |
| 61134 | /* 255327 */ "VSQRTPSZrkz\0" |
| 61135 | /* 255339 */ "VRCP28SSZrkz\0" |
| 61136 | /* 255352 */ "VRSQRT28SSZrkz\0" |
| 61137 | /* 255367 */ "VGETEXPSSZrkz\0" |
| 61138 | /* 255381 */ "VPSHLDVWZrkz\0" |
| 61139 | /* 255394 */ "VPSHRDVWZrkz\0" |
| 61140 | /* 255407 */ "VMOVDQA32Z256rrkz\0" |
| 61141 | /* 255425 */ "VMOVDQU32Z256rrkz\0" |
| 61142 | /* 255443 */ "VBROADCASTF32X2Z256rrkz\0" |
| 61143 | /* 255467 */ "VBROADCASTI32X2Z256rrkz\0" |
| 61144 | /* 255491 */ "VEXTRACTF64x2Z256rrkz\0" |
| 61145 | /* 255513 */ "VINSERTF64x2Z256rrkz\0" |
| 61146 | /* 255534 */ "VEXTRACTI64x2Z256rrkz\0" |
| 61147 | /* 255556 */ "VINSERTI64x2Z256rrkz\0" |
| 61148 | /* 255577 */ "VMOVDQA64Z256rrkz\0" |
| 61149 | /* 255595 */ "VMOVDQU64Z256rrkz\0" |
| 61150 | /* 255613 */ "VEXTRACTF32x4Z256rrkz\0" |
| 61151 | /* 255635 */ "VINSERTF32x4Z256rrkz\0" |
| 61152 | /* 255656 */ "VEXTRACTI32x4Z256rrkz\0" |
| 61153 | /* 255678 */ "VINSERTI32x4Z256rrkz\0" |
| 61154 | /* 255699 */ "VCVTNE2PS2BF16Z256rrkz\0" |
| 61155 | /* 255722 */ "VCVTNEPS2BF16Z256rrkz\0" |
| 61156 | /* 255744 */ "VMOVDQU16Z256rrkz\0" |
| 61157 | /* 255762 */ "VMOVDQU8Z256rrkz\0" |
| 61158 | /* 255779 */ "VPERMI2BZ256rrkz\0" |
| 61159 | /* 255796 */ "VPERMT2BZ256rrkz\0" |
| 61160 | /* 255813 */ "VPSUBBZ256rrkz\0" |
| 61161 | /* 255828 */ "VPADDBZ256rrkz\0" |
| 61162 | /* 255843 */ "VPEXPANDBZ256rrkz\0" |
| 61163 | /* 255861 */ "VPMOVUSDBZ256rrkz\0" |
| 61164 | /* 255879 */ "VPMOVSDBZ256rrkz\0" |
| 61165 | /* 255896 */ "VPMOVDBZ256rrkz\0" |
| 61166 | /* 255912 */ "VPSHUFBZ256rrkz\0" |
| 61167 | /* 255928 */ "VPAVGBZ256rrkz\0" |
| 61168 | /* 255943 */ "VGF2P8MULBZ256rrkz\0" |
| 61169 | /* 255962 */ "VPBLENDMBZ256rrkz\0" |
| 61170 | /* 255980 */ "VPERMBZ256rrkz\0" |
| 61171 | /* 255995 */ "VPMOVUSQBZ256rrkz\0" |
| 61172 | /* 256013 */ "VPMOVSQBZ256rrkz\0" |
| 61173 | /* 256030 */ "VPMULTISHIFTQBZ256rrkz\0" |
| 61174 | /* 256053 */ "VPMOVQBZ256rrkz\0" |
| 61175 | /* 256069 */ "VPABSBZ256rrkz\0" |
| 61176 | /* 256084 */ "VPSUBSBZ256rrkz\0" |
| 61177 | /* 256100 */ "VPADDSBZ256rrkz\0" |
| 61178 | /* 256116 */ "VPMINSBZ256rrkz\0" |
| 61179 | /* 256132 */ "VPCOMPRESSBZ256rrkz\0" |
| 61180 | /* 256152 */ "VPSUBUSBZ256rrkz\0" |
| 61181 | /* 256169 */ "VPADDUSBZ256rrkz\0" |
| 61182 | /* 256186 */ "VPMAXSBZ256rrkz\0" |
| 61183 | /* 256202 */ "VPOPCNTBZ256rrkz\0" |
| 61184 | /* 256219 */ "VPBROADCASTBZ256rrkz\0" |
| 61185 | /* 256240 */ "VPMINUBZ256rrkz\0" |
| 61186 | /* 256256 */ "VPMAXUBZ256rrkz\0" |
| 61187 | /* 256272 */ "VPACKSSWBZ256rrkz\0" |
| 61188 | /* 256290 */ "VPACKUSWBZ256rrkz\0" |
| 61189 | /* 256308 */ "VPMOVUSWBZ256rrkz\0" |
| 61190 | /* 256326 */ "VPMOVSWBZ256rrkz\0" |
| 61191 | /* 256343 */ "VPMOVWBZ256rrkz\0" |
| 61192 | /* 256359 */ "VPERMI2DZ256rrkz\0" |
| 61193 | /* 256376 */ "VPERMT2DZ256rrkz\0" |
| 61194 | /* 256393 */ "VPSRADZ256rrkz\0" |
| 61195 | /* 256408 */ "VPSUBDZ256rrkz\0" |
| 61196 | /* 256423 */ "VPMOVSXBDZ256rrkz\0" |
| 61197 | /* 256441 */ "VPMOVZXBDZ256rrkz\0" |
| 61198 | /* 256459 */ "VPADDDZ256rrkz\0" |
| 61199 | /* 256474 */ "VPANDDZ256rrkz\0" |
| 61200 | /* 256489 */ "VPEXPANDDZ256rrkz\0" |
| 61201 | /* 256507 */ "VPSLLDZ256rrkz\0" |
| 61202 | /* 256522 */ "VPMULLDZ256rrkz\0" |
| 61203 | /* 256538 */ "VPSRLDZ256rrkz\0" |
| 61204 | /* 256553 */ "VPBLENDMDZ256rrkz\0" |
| 61205 | /* 256571 */ "VPERMDZ256rrkz\0" |
| 61206 | /* 256586 */ "VPANDNDZ256rrkz\0" |
| 61207 | /* 256602 */ "VCVTPH2PDZ256rrkz\0" |
| 61208 | /* 256620 */ "VPERMI2PDZ256rrkz\0" |
| 61209 | /* 256638 */ "VCVTDQ2PDZ256rrkz\0" |
| 61210 | /* 256656 */ "VCVTUDQ2PDZ256rrkz\0" |
| 61211 | /* 256675 */ "VCVTQQ2PDZ256rrkz\0" |
| 61212 | /* 256693 */ "VCVTUQQ2PDZ256rrkz\0" |
| 61213 | /* 256712 */ "VCVTPS2PDZ256rrkz\0" |
| 61214 | /* 256730 */ "VPERMT2PDZ256rrkz\0" |
| 61215 | /* 256748 */ "VMOVAPDZ256rrkz\0" |
| 61216 | /* 256764 */ "VSUBPDZ256rrkz\0" |
| 61217 | /* 256779 */ "VMINCPDZ256rrkz\0" |
| 61218 | /* 256795 */ "VMAXCPDZ256rrkz\0" |
| 61219 | /* 256811 */ "VADDPDZ256rrkz\0" |
| 61220 | /* 256826 */ "VEXPANDPDZ256rrkz\0" |
| 61221 | /* 256844 */ "VANDPDZ256rrkz\0" |
| 61222 | /* 256859 */ "VSCALEFPDZ256rrkz\0" |
| 61223 | /* 256877 */ "VUNPCKHPDZ256rrkz\0" |
| 61224 | /* 256895 */ "VPERMILPDZ256rrkz\0" |
| 61225 | /* 256913 */ "VUNPCKLPDZ256rrkz\0" |
| 61226 | /* 256931 */ "VMULPDZ256rrkz\0" |
| 61227 | /* 256946 */ "VBLENDMPDZ256rrkz\0" |
| 61228 | /* 256964 */ "VPERMPDZ256rrkz\0" |
| 61229 | /* 256980 */ "VANDNPDZ256rrkz\0" |
| 61230 | /* 256996 */ "VMINPDZ256rrkz\0" |
| 61231 | /* 257011 */ "VORPDZ256rrkz\0" |
| 61232 | /* 257025 */ "VXORPDZ256rrkz\0" |
| 61233 | /* 257040 */ "VCOMPRESSPDZ256rrkz\0" |
| 61234 | /* 257060 */ "VMOVUPDZ256rrkz\0" |
| 61235 | /* 257076 */ "VDIVPDZ256rrkz\0" |
| 61236 | /* 257091 */ "VMAXPDZ256rrkz\0" |
| 61237 | /* 257106 */ "VPMOVUSQDZ256rrkz\0" |
| 61238 | /* 257124 */ "VPMOVSQDZ256rrkz\0" |
| 61239 | /* 257141 */ "VPMOVQDZ256rrkz\0" |
| 61240 | /* 257157 */ "VPORDZ256rrkz\0" |
| 61241 | /* 257171 */ "VPXORDZ256rrkz\0" |
| 61242 | /* 257186 */ "VPABSDZ256rrkz\0" |
| 61243 | /* 257201 */ "VPMINSDZ256rrkz\0" |
| 61244 | /* 257217 */ "VPCOMPRESSDZ256rrkz\0" |
| 61245 | /* 257237 */ "VBROADCASTSDZ256rrkz\0" |
| 61246 | /* 257258 */ "VPMAXSDZ256rrkz\0" |
| 61247 | /* 257274 */ "VPCONFLICTDZ256rrkz\0" |
| 61248 | /* 257294 */ "VPOPCNTDZ256rrkz\0" |
| 61249 | /* 257311 */ "VPLZCNTDZ256rrkz\0" |
| 61250 | /* 257328 */ "VPBROADCASTDZ256rrkz\0" |
| 61251 | /* 257349 */ "VPMINUDZ256rrkz\0" |
| 61252 | /* 257365 */ "VPMAXUDZ256rrkz\0" |
| 61253 | /* 257381 */ "VPSRAVDZ256rrkz\0" |
| 61254 | /* 257397 */ "VPSLLVDZ256rrkz\0" |
| 61255 | /* 257413 */ "VPROLVDZ256rrkz\0" |
| 61256 | /* 257429 */ "VPSRLVDZ256rrkz\0" |
| 61257 | /* 257445 */ "VPRORVDZ256rrkz\0" |
| 61258 | /* 257461 */ "VPMADDWDZ256rrkz\0" |
| 61259 | /* 257478 */ "VPUNPCKHWDZ256rrkz\0" |
| 61260 | /* 257497 */ "VPUNPCKLWDZ256rrkz\0" |
| 61261 | /* 257516 */ "VPMOVSXWDZ256rrkz\0" |
| 61262 | /* 257534 */ "VPMOVZXWDZ256rrkz\0" |
| 61263 | /* 257552 */ "VCVTPD2PHZ256rrkz\0" |
| 61264 | /* 257570 */ "VCVTDQ2PHZ256rrkz\0" |
| 61265 | /* 257588 */ "VCVTUDQ2PHZ256rrkz\0" |
| 61266 | /* 257607 */ "VCVTQQ2PHZ256rrkz\0" |
| 61267 | /* 257625 */ "VCVTUQQ2PHZ256rrkz\0" |
| 61268 | /* 257644 */ "VCVTPS2PHZ256rrkz\0" |
| 61269 | /* 257662 */ "VCVTW2PHZ256rrkz\0" |
| 61270 | /* 257679 */ "VCVTUW2PHZ256rrkz\0" |
| 61271 | /* 257697 */ "VSUBPHZ256rrkz\0" |
| 61272 | /* 257712 */ "VFCMULCPHZ256rrkz\0" |
| 61273 | /* 257730 */ "VFMULCPHZ256rrkz\0" |
| 61274 | /* 257747 */ "VMINCPHZ256rrkz\0" |
| 61275 | /* 257763 */ "VMAXCPHZ256rrkz\0" |
| 61276 | /* 257779 */ "VADDPHZ256rrkz\0" |
| 61277 | /* 257794 */ "VSCALEFPHZ256rrkz\0" |
| 61278 | /* 257812 */ "VMULPHZ256rrkz\0" |
| 61279 | /* 257827 */ "VMINPHZ256rrkz\0" |
| 61280 | /* 257842 */ "VDIVPHZ256rrkz\0" |
| 61281 | /* 257857 */ "VMAXPHZ256rrkz\0" |
| 61282 | /* 257872 */ "VMOVDDUPZ256rrkz\0" |
| 61283 | /* 257889 */ "VMOVSHDUPZ256rrkz\0" |
| 61284 | /* 257907 */ "VMOVSLDUPZ256rrkz\0" |
| 61285 | /* 257925 */ "VPERMI2QZ256rrkz\0" |
| 61286 | /* 257942 */ "VPERMT2QZ256rrkz\0" |
| 61287 | /* 257959 */ "VPSRAQZ256rrkz\0" |
| 61288 | /* 257974 */ "VPSUBQZ256rrkz\0" |
| 61289 | /* 257989 */ "VPMOVSXBQZ256rrkz\0" |
| 61290 | /* 258007 */ "VPMOVZXBQZ256rrkz\0" |
| 61291 | /* 258025 */ "VCVTTPD2DQZ256rrkz\0" |
| 61292 | /* 258044 */ "VCVTPD2DQZ256rrkz\0" |
| 61293 | /* 258062 */ "VCVTTPH2DQZ256rrkz\0" |
| 61294 | /* 258081 */ "VCVTPH2DQZ256rrkz\0" |
| 61295 | /* 258099 */ "VCVTTPS2DQZ256rrkz\0" |
| 61296 | /* 258118 */ "VCVTPS2DQZ256rrkz\0" |
| 61297 | /* 258136 */ "VPADDQZ256rrkz\0" |
| 61298 | /* 258151 */ "VPUNPCKHDQZ256rrkz\0" |
| 61299 | /* 258170 */ "VPUNPCKLDQZ256rrkz\0" |
| 61300 | /* 258189 */ "VPMULDQZ256rrkz\0" |
| 61301 | /* 258205 */ "VPANDQZ256rrkz\0" |
| 61302 | /* 258220 */ "VPEXPANDQZ256rrkz\0" |
| 61303 | /* 258238 */ "VPUNPCKHQDQZ256rrkz\0" |
| 61304 | /* 258258 */ "VPUNPCKLQDQZ256rrkz\0" |
| 61305 | /* 258278 */ "VCVTTPD2UDQZ256rrkz\0" |
| 61306 | /* 258298 */ "VCVTPD2UDQZ256rrkz\0" |
| 61307 | /* 258317 */ "VCVTTPH2UDQZ256rrkz\0" |
| 61308 | /* 258337 */ "VCVTPH2UDQZ256rrkz\0" |
| 61309 | /* 258356 */ "VCVTTPS2UDQZ256rrkz\0" |
| 61310 | /* 258376 */ "VCVTPS2UDQZ256rrkz\0" |
| 61311 | /* 258395 */ "VPMULUDQZ256rrkz\0" |
| 61312 | /* 258412 */ "VPMOVSXDQZ256rrkz\0" |
| 61313 | /* 258430 */ "VPMOVZXDQZ256rrkz\0" |
| 61314 | /* 258448 */ "VPSLLQZ256rrkz\0" |
| 61315 | /* 258463 */ "VPMULLQZ256rrkz\0" |
| 61316 | /* 258479 */ "VPSRLQZ256rrkz\0" |
| 61317 | /* 258494 */ "VPBLENDMQZ256rrkz\0" |
| 61318 | /* 258512 */ "VPERMQZ256rrkz\0" |
| 61319 | /* 258527 */ "VPANDNQZ256rrkz\0" |
| 61320 | /* 258543 */ "VCVTTPD2QQZ256rrkz\0" |
| 61321 | /* 258562 */ "VCVTPD2QQZ256rrkz\0" |
| 61322 | /* 258580 */ "VCVTTPH2QQZ256rrkz\0" |
| 61323 | /* 258599 */ "VCVTPH2QQZ256rrkz\0" |
| 61324 | /* 258617 */ "VCVTTPS2QQZ256rrkz\0" |
| 61325 | /* 258636 */ "VCVTPS2QQZ256rrkz\0" |
| 61326 | /* 258654 */ "VCVTTPD2UQQZ256rrkz\0" |
| 61327 | /* 258674 */ "VCVTPD2UQQZ256rrkz\0" |
| 61328 | /* 258693 */ "VCVTTPH2UQQZ256rrkz\0" |
| 61329 | /* 258713 */ "VCVTPH2UQQZ256rrkz\0" |
| 61330 | /* 258732 */ "VCVTTPS2UQQZ256rrkz\0" |
| 61331 | /* 258752 */ "VCVTPS2UQQZ256rrkz\0" |
| 61332 | /* 258771 */ "VPORQZ256rrkz\0" |
| 61333 | /* 258785 */ "VPXORQZ256rrkz\0" |
| 61334 | /* 258800 */ "VPABSQZ256rrkz\0" |
| 61335 | /* 258815 */ "VPMINSQZ256rrkz\0" |
| 61336 | /* 258831 */ "VPCOMPRESSQZ256rrkz\0" |
| 61337 | /* 258851 */ "VPMAXSQZ256rrkz\0" |
| 61338 | /* 258867 */ "VPCONFLICTQZ256rrkz\0" |
| 61339 | /* 258887 */ "VPOPCNTQZ256rrkz\0" |
| 61340 | /* 258904 */ "VPLZCNTQZ256rrkz\0" |
| 61341 | /* 258921 */ "VPBROADCASTQZ256rrkz\0" |
| 61342 | /* 258942 */ "VPMINUQZ256rrkz\0" |
| 61343 | /* 258958 */ "VPMAXUQZ256rrkz\0" |
| 61344 | /* 258974 */ "VPSRAVQZ256rrkz\0" |
| 61345 | /* 258990 */ "VPSLLVQZ256rrkz\0" |
| 61346 | /* 259006 */ "VPROLVQZ256rrkz\0" |
| 61347 | /* 259022 */ "VPSRLVQZ256rrkz\0" |
| 61348 | /* 259038 */ "VPRORVQZ256rrkz\0" |
| 61349 | /* 259054 */ "VPMOVSXWQZ256rrkz\0" |
| 61350 | /* 259072 */ "VPMOVZXWQZ256rrkz\0" |
| 61351 | /* 259090 */ "VCVTPD2PSZ256rrkz\0" |
| 61352 | /* 259108 */ "VCVTPH2PSZ256rrkz\0" |
| 61353 | /* 259126 */ "VPERMI2PSZ256rrkz\0" |
| 61354 | /* 259144 */ "VCVTDQ2PSZ256rrkz\0" |
| 61355 | /* 259162 */ "VCVTUDQ2PSZ256rrkz\0" |
| 61356 | /* 259181 */ "VCVTQQ2PSZ256rrkz\0" |
| 61357 | /* 259199 */ "VCVTUQQ2PSZ256rrkz\0" |
| 61358 | /* 259218 */ "VPERMT2PSZ256rrkz\0" |
| 61359 | /* 259236 */ "VMOVAPSZ256rrkz\0" |
| 61360 | /* 259252 */ "VSUBPSZ256rrkz\0" |
| 61361 | /* 259267 */ "VMINCPSZ256rrkz\0" |
| 61362 | /* 259283 */ "VMAXCPSZ256rrkz\0" |
| 61363 | /* 259299 */ "VADDPSZ256rrkz\0" |
| 61364 | /* 259314 */ "VEXPANDPSZ256rrkz\0" |
| 61365 | /* 259332 */ "VANDPSZ256rrkz\0" |
| 61366 | /* 259347 */ "VSCALEFPSZ256rrkz\0" |
| 61367 | /* 259365 */ "VUNPCKHPSZ256rrkz\0" |
| 61368 | /* 259383 */ "VPERMILPSZ256rrkz\0" |
| 61369 | /* 259401 */ "VUNPCKLPSZ256rrkz\0" |
| 61370 | /* 259419 */ "VMULPSZ256rrkz\0" |
| 61371 | /* 259434 */ "VBLENDMPSZ256rrkz\0" |
| 61372 | /* 259452 */ "VPERMPSZ256rrkz\0" |
| 61373 | /* 259468 */ "VANDNPSZ256rrkz\0" |
| 61374 | /* 259484 */ "VMINPSZ256rrkz\0" |
| 61375 | /* 259499 */ "VORPSZ256rrkz\0" |
| 61376 | /* 259513 */ "VXORPSZ256rrkz\0" |
| 61377 | /* 259528 */ "VCOMPRESSPSZ256rrkz\0" |
| 61378 | /* 259548 */ "VMOVUPSZ256rrkz\0" |
| 61379 | /* 259564 */ "VDIVPSZ256rrkz\0" |
| 61380 | /* 259579 */ "VMAXPSZ256rrkz\0" |
| 61381 | /* 259594 */ "VBROADCASTSSZ256rrkz\0" |
| 61382 | /* 259615 */ "VCVTTPH2WZ256rrkz\0" |
| 61383 | /* 259633 */ "VCVTPH2WZ256rrkz\0" |
| 61384 | /* 259650 */ "VPERMI2WZ256rrkz\0" |
| 61385 | /* 259667 */ "VPERMT2WZ256rrkz\0" |
| 61386 | /* 259684 */ "VPSRAWZ256rrkz\0" |
| 61387 | /* 259699 */ "VPUNPCKHBWZ256rrkz\0" |
| 61388 | /* 259718 */ "VPUNPCKLBWZ256rrkz\0" |
| 61389 | /* 259737 */ "VPSUBWZ256rrkz\0" |
| 61390 | /* 259752 */ "VPMOVSXBWZ256rrkz\0" |
| 61391 | /* 259770 */ "VPMOVZXBWZ256rrkz\0" |
| 61392 | /* 259788 */ "VPADDWZ256rrkz\0" |
| 61393 | /* 259803 */ "VPEXPANDWZ256rrkz\0" |
| 61394 | /* 259821 */ "VPACKSSDWZ256rrkz\0" |
| 61395 | /* 259839 */ "VPACKUSDWZ256rrkz\0" |
| 61396 | /* 259857 */ "VPMOVUSDWZ256rrkz\0" |
| 61397 | /* 259875 */ "VPMOVSDWZ256rrkz\0" |
| 61398 | /* 259892 */ "VPMOVDWZ256rrkz\0" |
| 61399 | /* 259908 */ "VPAVGWZ256rrkz\0" |
| 61400 | /* 259923 */ "VPMULHWZ256rrkz\0" |
| 61401 | /* 259939 */ "VPSLLWZ256rrkz\0" |
| 61402 | /* 259954 */ "VPMULLWZ256rrkz\0" |
| 61403 | /* 259970 */ "VPSRLWZ256rrkz\0" |
| 61404 | /* 259985 */ "VPBLENDMWZ256rrkz\0" |
| 61405 | /* 260003 */ "VPERMWZ256rrkz\0" |
| 61406 | /* 260018 */ "VPMOVUSQWZ256rrkz\0" |
| 61407 | /* 260036 */ "VPMOVSQWZ256rrkz\0" |
| 61408 | /* 260053 */ "VPMOVQWZ256rrkz\0" |
| 61409 | /* 260069 */ "VPABSWZ256rrkz\0" |
| 61410 | /* 260084 */ "VPMADDUBSWZ256rrkz\0" |
| 61411 | /* 260103 */ "VPSUBSWZ256rrkz\0" |
| 61412 | /* 260119 */ "VPADDSWZ256rrkz\0" |
| 61413 | /* 260135 */ "VPMINSWZ256rrkz\0" |
| 61414 | /* 260151 */ "VPMULHRSWZ256rrkz\0" |
| 61415 | /* 260169 */ "VPCOMPRESSWZ256rrkz\0" |
| 61416 | /* 260189 */ "VPSUBUSWZ256rrkz\0" |
| 61417 | /* 260206 */ "VPADDUSWZ256rrkz\0" |
| 61418 | /* 260223 */ "VPMAXSWZ256rrkz\0" |
| 61419 | /* 260239 */ "VPOPCNTWZ256rrkz\0" |
| 61420 | /* 260256 */ "VPBROADCASTWZ256rrkz\0" |
| 61421 | /* 260277 */ "VCVTTPH2UWZ256rrkz\0" |
| 61422 | /* 260296 */ "VCVTPH2UWZ256rrkz\0" |
| 61423 | /* 260314 */ "VPMULHUWZ256rrkz\0" |
| 61424 | /* 260331 */ "VPMINUWZ256rrkz\0" |
| 61425 | /* 260347 */ "VPMAXUWZ256rrkz\0" |
| 61426 | /* 260363 */ "VPSRAVWZ256rrkz\0" |
| 61427 | /* 260379 */ "VPSLLVWZ256rrkz\0" |
| 61428 | /* 260395 */ "VPSRLVWZ256rrkz\0" |
| 61429 | /* 260411 */ "VCVTPS2PHXZ256rrkz\0" |
| 61430 | /* 260430 */ "VCVTPH2PSXZ256rrkz\0" |
| 61431 | /* 260449 */ "VPBROADCASTBrZ256rrkz\0" |
| 61432 | /* 260471 */ "VPBROADCASTDrZ256rrkz\0" |
| 61433 | /* 260493 */ "VPBROADCASTQrZ256rrkz\0" |
| 61434 | /* 260515 */ "VPBROADCASTWrZ256rrkz\0" |
| 61435 | /* 260537 */ "VMOVDQA32Z128rrkz\0" |
| 61436 | /* 260555 */ "VMOVDQU32Z128rrkz\0" |
| 61437 | /* 260573 */ "VBROADCASTI32X2Z128rrkz\0" |
| 61438 | /* 260597 */ "VMOVDQA64Z128rrkz\0" |
| 61439 | /* 260615 */ "VMOVDQU64Z128rrkz\0" |
| 61440 | /* 260633 */ "VCVTNE2PS2BF16Z128rrkz\0" |
| 61441 | /* 260656 */ "VCVTNEPS2BF16Z128rrkz\0" |
| 61442 | /* 260678 */ "VMOVDQU16Z128rrkz\0" |
| 61443 | /* 260696 */ "VMOVDQU8Z128rrkz\0" |
| 61444 | /* 260713 */ "VPERMI2BZ128rrkz\0" |
| 61445 | /* 260730 */ "VPERMT2BZ128rrkz\0" |
| 61446 | /* 260747 */ "VPSUBBZ128rrkz\0" |
| 61447 | /* 260762 */ "VPADDBZ128rrkz\0" |
| 61448 | /* 260777 */ "VPEXPANDBZ128rrkz\0" |
| 61449 | /* 260795 */ "VPMOVUSDBZ128rrkz\0" |
| 61450 | /* 260813 */ "VPMOVSDBZ128rrkz\0" |
| 61451 | /* 260830 */ "VPMOVDBZ128rrkz\0" |
| 61452 | /* 260846 */ "VPSHUFBZ128rrkz\0" |
| 61453 | /* 260862 */ "VPAVGBZ128rrkz\0" |
| 61454 | /* 260877 */ "VGF2P8MULBZ128rrkz\0" |
| 61455 | /* 260896 */ "VPBLENDMBZ128rrkz\0" |
| 61456 | /* 260914 */ "VPERMBZ128rrkz\0" |
| 61457 | /* 260929 */ "VPMOVUSQBZ128rrkz\0" |
| 61458 | /* 260947 */ "VPMOVSQBZ128rrkz\0" |
| 61459 | /* 260964 */ "VPMULTISHIFTQBZ128rrkz\0" |
| 61460 | /* 260987 */ "VPMOVQBZ128rrkz\0" |
| 61461 | /* 261003 */ "VPABSBZ128rrkz\0" |
| 61462 | /* 261018 */ "VPSUBSBZ128rrkz\0" |
| 61463 | /* 261034 */ "VPADDSBZ128rrkz\0" |
| 61464 | /* 261050 */ "VPMINSBZ128rrkz\0" |
| 61465 | /* 261066 */ "VPCOMPRESSBZ128rrkz\0" |
| 61466 | /* 261086 */ "VPSUBUSBZ128rrkz\0" |
| 61467 | /* 261103 */ "VPADDUSBZ128rrkz\0" |
| 61468 | /* 261120 */ "VPMAXSBZ128rrkz\0" |
| 61469 | /* 261136 */ "VPOPCNTBZ128rrkz\0" |
| 61470 | /* 261153 */ "VPBROADCASTBZ128rrkz\0" |
| 61471 | /* 261174 */ "VPMINUBZ128rrkz\0" |
| 61472 | /* 261190 */ "VPMAXUBZ128rrkz\0" |
| 61473 | /* 261206 */ "VPACKSSWBZ128rrkz\0" |
| 61474 | /* 261224 */ "VPACKUSWBZ128rrkz\0" |
| 61475 | /* 261242 */ "VPMOVUSWBZ128rrkz\0" |
| 61476 | /* 261260 */ "VPMOVSWBZ128rrkz\0" |
| 61477 | /* 261277 */ "VPMOVWBZ128rrkz\0" |
| 61478 | /* 261293 */ "VPERMI2DZ128rrkz\0" |
| 61479 | /* 261310 */ "VPERMT2DZ128rrkz\0" |
| 61480 | /* 261327 */ "VPSRADZ128rrkz\0" |
| 61481 | /* 261342 */ "VPSUBDZ128rrkz\0" |
| 61482 | /* 261357 */ "VPMOVSXBDZ128rrkz\0" |
| 61483 | /* 261375 */ "VPMOVZXBDZ128rrkz\0" |
| 61484 | /* 261393 */ "VPADDDZ128rrkz\0" |
| 61485 | /* 261408 */ "VPANDDZ128rrkz\0" |
| 61486 | /* 261423 */ "VPEXPANDDZ128rrkz\0" |
| 61487 | /* 261441 */ "VPSLLDZ128rrkz\0" |
| 61488 | /* 261456 */ "VPMULLDZ128rrkz\0" |
| 61489 | /* 261472 */ "VPSRLDZ128rrkz\0" |
| 61490 | /* 261487 */ "VPBLENDMDZ128rrkz\0" |
| 61491 | /* 261505 */ "VPANDNDZ128rrkz\0" |
| 61492 | /* 261521 */ "VCVTPH2PDZ128rrkz\0" |
| 61493 | /* 261539 */ "VPERMI2PDZ128rrkz\0" |
| 61494 | /* 261557 */ "VCVTDQ2PDZ128rrkz\0" |
| 61495 | /* 261575 */ "VCVTUDQ2PDZ128rrkz\0" |
| 61496 | /* 261594 */ "VCVTQQ2PDZ128rrkz\0" |
| 61497 | /* 261612 */ "VCVTUQQ2PDZ128rrkz\0" |
| 61498 | /* 261631 */ "VCVTPS2PDZ128rrkz\0" |
| 61499 | /* 261649 */ "VPERMT2PDZ128rrkz\0" |
| 61500 | /* 261667 */ "VMOVAPDZ128rrkz\0" |
| 61501 | /* 261683 */ "VSUBPDZ128rrkz\0" |
| 61502 | /* 261698 */ "VMINCPDZ128rrkz\0" |
| 61503 | /* 261714 */ "VMAXCPDZ128rrkz\0" |
| 61504 | /* 261730 */ "VADDPDZ128rrkz\0" |
| 61505 | /* 261745 */ "VEXPANDPDZ128rrkz\0" |
| 61506 | /* 261763 */ "VANDPDZ128rrkz\0" |
| 61507 | /* 261778 */ "VSCALEFPDZ128rrkz\0" |
| 61508 | /* 261796 */ "VUNPCKHPDZ128rrkz\0" |
| 61509 | /* 261814 */ "VPERMILPDZ128rrkz\0" |
| 61510 | /* 261832 */ "VUNPCKLPDZ128rrkz\0" |
| 61511 | /* 261850 */ "VMULPDZ128rrkz\0" |
| 61512 | /* 261865 */ "VBLENDMPDZ128rrkz\0" |
| 61513 | /* 261883 */ "VANDNPDZ128rrkz\0" |
| 61514 | /* 261899 */ "VMINPDZ128rrkz\0" |
| 61515 | /* 261914 */ "VORPDZ128rrkz\0" |
| 61516 | /* 261928 */ "VXORPDZ128rrkz\0" |
| 61517 | /* 261943 */ "VCOMPRESSPDZ128rrkz\0" |
| 61518 | /* 261963 */ "VMOVUPDZ128rrkz\0" |
| 61519 | /* 261979 */ "VDIVPDZ128rrkz\0" |
| 61520 | /* 261994 */ "VMAXPDZ128rrkz\0" |
| 61521 | /* 262009 */ "VPMOVUSQDZ128rrkz\0" |
| 61522 | /* 262027 */ "VPMOVSQDZ128rrkz\0" |
| 61523 | /* 262044 */ "VPMOVQDZ128rrkz\0" |
| 61524 | /* 262060 */ "VPORDZ128rrkz\0" |
| 61525 | /* 262074 */ "VPXORDZ128rrkz\0" |
| 61526 | /* 262089 */ "VPABSDZ128rrkz\0" |
| 61527 | /* 262104 */ "VPMINSDZ128rrkz\0" |
| 61528 | /* 262120 */ "VPCOMPRESSDZ128rrkz\0" |
| 61529 | /* 262140 */ "VPMAXSDZ128rrkz\0" |
| 61530 | /* 262156 */ "VPCONFLICTDZ128rrkz\0" |
| 61531 | /* 262176 */ "VPOPCNTDZ128rrkz\0" |
| 61532 | /* 262193 */ "VPLZCNTDZ128rrkz\0" |
| 61533 | /* 262210 */ "VPBROADCASTDZ128rrkz\0" |
| 61534 | /* 262231 */ "VPMINUDZ128rrkz\0" |
| 61535 | /* 262247 */ "VPMAXUDZ128rrkz\0" |
| 61536 | /* 262263 */ "VPSRAVDZ128rrkz\0" |
| 61537 | /* 262279 */ "VPSLLVDZ128rrkz\0" |
| 61538 | /* 262295 */ "VPROLVDZ128rrkz\0" |
| 61539 | /* 262311 */ "VPSRLVDZ128rrkz\0" |
| 61540 | /* 262327 */ "VPRORVDZ128rrkz\0" |
| 61541 | /* 262343 */ "VPMADDWDZ128rrkz\0" |
| 61542 | /* 262360 */ "VPUNPCKHWDZ128rrkz\0" |
| 61543 | /* 262379 */ "VPUNPCKLWDZ128rrkz\0" |
| 61544 | /* 262398 */ "VPMOVSXWDZ128rrkz\0" |
| 61545 | /* 262416 */ "VPMOVZXWDZ128rrkz\0" |
| 61546 | /* 262434 */ "VCVTPD2PHZ128rrkz\0" |
| 61547 | /* 262452 */ "VCVTDQ2PHZ128rrkz\0" |
| 61548 | /* 262470 */ "VCVTUDQ2PHZ128rrkz\0" |
| 61549 | /* 262489 */ "VCVTQQ2PHZ128rrkz\0" |
| 61550 | /* 262507 */ "VCVTUQQ2PHZ128rrkz\0" |
| 61551 | /* 262526 */ "VCVTPS2PHZ128rrkz\0" |
| 61552 | /* 262544 */ "VCVTW2PHZ128rrkz\0" |
| 61553 | /* 262561 */ "VCVTUW2PHZ128rrkz\0" |
| 61554 | /* 262579 */ "VSUBPHZ128rrkz\0" |
| 61555 | /* 262594 */ "VFCMULCPHZ128rrkz\0" |
| 61556 | /* 262612 */ "VFMULCPHZ128rrkz\0" |
| 61557 | /* 262629 */ "VMINCPHZ128rrkz\0" |
| 61558 | /* 262645 */ "VMAXCPHZ128rrkz\0" |
| 61559 | /* 262661 */ "VADDPHZ128rrkz\0" |
| 61560 | /* 262676 */ "VSCALEFPHZ128rrkz\0" |
| 61561 | /* 262694 */ "VMULPHZ128rrkz\0" |
| 61562 | /* 262709 */ "VMINPHZ128rrkz\0" |
| 61563 | /* 262724 */ "VDIVPHZ128rrkz\0" |
| 61564 | /* 262739 */ "VMAXPHZ128rrkz\0" |
| 61565 | /* 262754 */ "VMOVDDUPZ128rrkz\0" |
| 61566 | /* 262771 */ "VMOVSHDUPZ128rrkz\0" |
| 61567 | /* 262789 */ "VMOVSLDUPZ128rrkz\0" |
| 61568 | /* 262807 */ "VPERMI2QZ128rrkz\0" |
| 61569 | /* 262824 */ "VPERMT2QZ128rrkz\0" |
| 61570 | /* 262841 */ "VPSRAQZ128rrkz\0" |
| 61571 | /* 262856 */ "VPSUBQZ128rrkz\0" |
| 61572 | /* 262871 */ "VPMOVSXBQZ128rrkz\0" |
| 61573 | /* 262889 */ "VPMOVZXBQZ128rrkz\0" |
| 61574 | /* 262907 */ "VCVTTPD2DQZ128rrkz\0" |
| 61575 | /* 262926 */ "VCVTPD2DQZ128rrkz\0" |
| 61576 | /* 262944 */ "VCVTTPH2DQZ128rrkz\0" |
| 61577 | /* 262963 */ "VCVTPH2DQZ128rrkz\0" |
| 61578 | /* 262981 */ "VCVTTPS2DQZ128rrkz\0" |
| 61579 | /* 263000 */ "VCVTPS2DQZ128rrkz\0" |
| 61580 | /* 263018 */ "VPADDQZ128rrkz\0" |
| 61581 | /* 263033 */ "VPUNPCKHDQZ128rrkz\0" |
| 61582 | /* 263052 */ "VPUNPCKLDQZ128rrkz\0" |
| 61583 | /* 263071 */ "VPMULDQZ128rrkz\0" |
| 61584 | /* 263087 */ "VPANDQZ128rrkz\0" |
| 61585 | /* 263102 */ "VPEXPANDQZ128rrkz\0" |
| 61586 | /* 263120 */ "VPUNPCKHQDQZ128rrkz\0" |
| 61587 | /* 263140 */ "VPUNPCKLQDQZ128rrkz\0" |
| 61588 | /* 263160 */ "VCVTTPD2UDQZ128rrkz\0" |
| 61589 | /* 263180 */ "VCVTPD2UDQZ128rrkz\0" |
| 61590 | /* 263199 */ "VCVTTPH2UDQZ128rrkz\0" |
| 61591 | /* 263219 */ "VCVTPH2UDQZ128rrkz\0" |
| 61592 | /* 263238 */ "VCVTTPS2UDQZ128rrkz\0" |
| 61593 | /* 263258 */ "VCVTPS2UDQZ128rrkz\0" |
| 61594 | /* 263277 */ "VPMULUDQZ128rrkz\0" |
| 61595 | /* 263294 */ "VPMOVSXDQZ128rrkz\0" |
| 61596 | /* 263312 */ "VPMOVZXDQZ128rrkz\0" |
| 61597 | /* 263330 */ "VPSLLQZ128rrkz\0" |
| 61598 | /* 263345 */ "VPMULLQZ128rrkz\0" |
| 61599 | /* 263361 */ "VPSRLQZ128rrkz\0" |
| 61600 | /* 263376 */ "VPBLENDMQZ128rrkz\0" |
| 61601 | /* 263394 */ "VPANDNQZ128rrkz\0" |
| 61602 | /* 263410 */ "VCVTTPD2QQZ128rrkz\0" |
| 61603 | /* 263429 */ "VCVTPD2QQZ128rrkz\0" |
| 61604 | /* 263447 */ "VCVTTPH2QQZ128rrkz\0" |
| 61605 | /* 263466 */ "VCVTPH2QQZ128rrkz\0" |
| 61606 | /* 263484 */ "VCVTTPS2QQZ128rrkz\0" |
| 61607 | /* 263503 */ "VCVTPS2QQZ128rrkz\0" |
| 61608 | /* 263521 */ "VCVTTPD2UQQZ128rrkz\0" |
| 61609 | /* 263541 */ "VCVTPD2UQQZ128rrkz\0" |
| 61610 | /* 263560 */ "VCVTTPH2UQQZ128rrkz\0" |
| 61611 | /* 263580 */ "VCVTPH2UQQZ128rrkz\0" |
| 61612 | /* 263599 */ "VCVTTPS2UQQZ128rrkz\0" |
| 61613 | /* 263619 */ "VCVTPS2UQQZ128rrkz\0" |
| 61614 | /* 263638 */ "VPORQZ128rrkz\0" |
| 61615 | /* 263652 */ "VPXORQZ128rrkz\0" |
| 61616 | /* 263667 */ "VPABSQZ128rrkz\0" |
| 61617 | /* 263682 */ "VPMINSQZ128rrkz\0" |
| 61618 | /* 263698 */ "VPCOMPRESSQZ128rrkz\0" |
| 61619 | /* 263718 */ "VPMAXSQZ128rrkz\0" |
| 61620 | /* 263734 */ "VPCONFLICTQZ128rrkz\0" |
| 61621 | /* 263754 */ "VPOPCNTQZ128rrkz\0" |
| 61622 | /* 263771 */ "VPLZCNTQZ128rrkz\0" |
| 61623 | /* 263788 */ "VPBROADCASTQZ128rrkz\0" |
| 61624 | /* 263809 */ "VPMINUQZ128rrkz\0" |
| 61625 | /* 263825 */ "VPMAXUQZ128rrkz\0" |
| 61626 | /* 263841 */ "VPSRAVQZ128rrkz\0" |
| 61627 | /* 263857 */ "VPSLLVQZ128rrkz\0" |
| 61628 | /* 263873 */ "VPROLVQZ128rrkz\0" |
| 61629 | /* 263889 */ "VPSRLVQZ128rrkz\0" |
| 61630 | /* 263905 */ "VPRORVQZ128rrkz\0" |
| 61631 | /* 263921 */ "VPMOVSXWQZ128rrkz\0" |
| 61632 | /* 263939 */ "VPMOVZXWQZ128rrkz\0" |
| 61633 | /* 263957 */ "VCVTPD2PSZ128rrkz\0" |
| 61634 | /* 263975 */ "VCVTPH2PSZ128rrkz\0" |
| 61635 | /* 263993 */ "VPERMI2PSZ128rrkz\0" |
| 61636 | /* 264011 */ "VCVTDQ2PSZ128rrkz\0" |
| 61637 | /* 264029 */ "VCVTUDQ2PSZ128rrkz\0" |
| 61638 | /* 264048 */ "VCVTQQ2PSZ128rrkz\0" |
| 61639 | /* 264066 */ "VCVTUQQ2PSZ128rrkz\0" |
| 61640 | /* 264085 */ "VPERMT2PSZ128rrkz\0" |
| 61641 | /* 264103 */ "VMOVAPSZ128rrkz\0" |
| 61642 | /* 264119 */ "VSUBPSZ128rrkz\0" |
| 61643 | /* 264134 */ "VMINCPSZ128rrkz\0" |
| 61644 | /* 264150 */ "VMAXCPSZ128rrkz\0" |
| 61645 | /* 264166 */ "VADDPSZ128rrkz\0" |
| 61646 | /* 264181 */ "VEXPANDPSZ128rrkz\0" |
| 61647 | /* 264199 */ "VANDPSZ128rrkz\0" |
| 61648 | /* 264214 */ "VSCALEFPSZ128rrkz\0" |
| 61649 | /* 264232 */ "VUNPCKHPSZ128rrkz\0" |
| 61650 | /* 264250 */ "VPERMILPSZ128rrkz\0" |
| 61651 | /* 264268 */ "VUNPCKLPSZ128rrkz\0" |
| 61652 | /* 264286 */ "VMULPSZ128rrkz\0" |
| 61653 | /* 264301 */ "VBLENDMPSZ128rrkz\0" |
| 61654 | /* 264319 */ "VANDNPSZ128rrkz\0" |
| 61655 | /* 264335 */ "VMINPSZ128rrkz\0" |
| 61656 | /* 264350 */ "VORPSZ128rrkz\0" |
| 61657 | /* 264364 */ "VXORPSZ128rrkz\0" |
| 61658 | /* 264379 */ "VCOMPRESSPSZ128rrkz\0" |
| 61659 | /* 264399 */ "VMOVUPSZ128rrkz\0" |
| 61660 | /* 264415 */ "VDIVPSZ128rrkz\0" |
| 61661 | /* 264430 */ "VMAXPSZ128rrkz\0" |
| 61662 | /* 264445 */ "VBROADCASTSSZ128rrkz\0" |
| 61663 | /* 264466 */ "VCVTTPH2WZ128rrkz\0" |
| 61664 | /* 264484 */ "VCVTPH2WZ128rrkz\0" |
| 61665 | /* 264501 */ "VPERMI2WZ128rrkz\0" |
| 61666 | /* 264518 */ "VPERMT2WZ128rrkz\0" |
| 61667 | /* 264535 */ "VPSRAWZ128rrkz\0" |
| 61668 | /* 264550 */ "VPUNPCKHBWZ128rrkz\0" |
| 61669 | /* 264569 */ "VPUNPCKLBWZ128rrkz\0" |
| 61670 | /* 264588 */ "VPSUBWZ128rrkz\0" |
| 61671 | /* 264603 */ "VPMOVSXBWZ128rrkz\0" |
| 61672 | /* 264621 */ "VPMOVZXBWZ128rrkz\0" |
| 61673 | /* 264639 */ "VPADDWZ128rrkz\0" |
| 61674 | /* 264654 */ "VPEXPANDWZ128rrkz\0" |
| 61675 | /* 264672 */ "VPACKSSDWZ128rrkz\0" |
| 61676 | /* 264690 */ "VPACKUSDWZ128rrkz\0" |
| 61677 | /* 264708 */ "VPMOVUSDWZ128rrkz\0" |
| 61678 | /* 264726 */ "VPMOVSDWZ128rrkz\0" |
| 61679 | /* 264743 */ "VPMOVDWZ128rrkz\0" |
| 61680 | /* 264759 */ "VPAVGWZ128rrkz\0" |
| 61681 | /* 264774 */ "VPMULHWZ128rrkz\0" |
| 61682 | /* 264790 */ "VPSLLWZ128rrkz\0" |
| 61683 | /* 264805 */ "VPMULLWZ128rrkz\0" |
| 61684 | /* 264821 */ "VPSRLWZ128rrkz\0" |
| 61685 | /* 264836 */ "VPBLENDMWZ128rrkz\0" |
| 61686 | /* 264854 */ "VPERMWZ128rrkz\0" |
| 61687 | /* 264869 */ "VPMOVUSQWZ128rrkz\0" |
| 61688 | /* 264887 */ "VPMOVSQWZ128rrkz\0" |
| 61689 | /* 264904 */ "VPMOVQWZ128rrkz\0" |
| 61690 | /* 264920 */ "VPABSWZ128rrkz\0" |
| 61691 | /* 264935 */ "VPMADDUBSWZ128rrkz\0" |
| 61692 | /* 264954 */ "VPSUBSWZ128rrkz\0" |
| 61693 | /* 264970 */ "VPADDSWZ128rrkz\0" |
| 61694 | /* 264986 */ "VPMINSWZ128rrkz\0" |
| 61695 | /* 265002 */ "VPMULHRSWZ128rrkz\0" |
| 61696 | /* 265020 */ "VPCOMPRESSWZ128rrkz\0" |
| 61697 | /* 265040 */ "VPSUBUSWZ128rrkz\0" |
| 61698 | /* 265057 */ "VPADDUSWZ128rrkz\0" |
| 61699 | /* 265074 */ "VPMAXSWZ128rrkz\0" |
| 61700 | /* 265090 */ "VPOPCNTWZ128rrkz\0" |
| 61701 | /* 265107 */ "VPBROADCASTWZ128rrkz\0" |
| 61702 | /* 265128 */ "VCVTTPH2UWZ128rrkz\0" |
| 61703 | /* 265147 */ "VCVTPH2UWZ128rrkz\0" |
| 61704 | /* 265165 */ "VPMULHUWZ128rrkz\0" |
| 61705 | /* 265182 */ "VPMINUWZ128rrkz\0" |
| 61706 | /* 265198 */ "VPMAXUWZ128rrkz\0" |
| 61707 | /* 265214 */ "VPSRAVWZ128rrkz\0" |
| 61708 | /* 265230 */ "VPSLLVWZ128rrkz\0" |
| 61709 | /* 265246 */ "VPSRLVWZ128rrkz\0" |
| 61710 | /* 265262 */ "VCVTPS2PHXZ128rrkz\0" |
| 61711 | /* 265281 */ "VCVTPH2PSXZ128rrkz\0" |
| 61712 | /* 265300 */ "VPBROADCASTBrZ128rrkz\0" |
| 61713 | /* 265322 */ "VPBROADCASTDrZ128rrkz\0" |
| 61714 | /* 265344 */ "VPBROADCASTQrZ128rrkz\0" |
| 61715 | /* 265366 */ "VPBROADCASTWrZ128rrkz\0" |
| 61716 | /* 265388 */ "VMOVDQA32Zrrkz\0" |
| 61717 | /* 265403 */ "VMOVDQU32Zrrkz\0" |
| 61718 | /* 265418 */ "VBROADCASTF32X2Zrrkz\0" |
| 61719 | /* 265439 */ "VBROADCASTI32X2Zrrkz\0" |
| 61720 | /* 265460 */ "VEXTRACTF64x2Zrrkz\0" |
| 61721 | /* 265479 */ "VINSERTF64x2Zrrkz\0" |
| 61722 | /* 265497 */ "VEXTRACTI64x2Zrrkz\0" |
| 61723 | /* 265516 */ "VINSERTI64x2Zrrkz\0" |
| 61724 | /* 265534 */ "VMOVDQA64Zrrkz\0" |
| 61725 | /* 265549 */ "VMOVDQU64Zrrkz\0" |
| 61726 | /* 265564 */ "VEXTRACTF32x4Zrrkz\0" |
| 61727 | /* 265583 */ "VINSERTF32x4Zrrkz\0" |
| 61728 | /* 265601 */ "VEXTRACTI32x4Zrrkz\0" |
| 61729 | /* 265620 */ "VINSERTI32x4Zrrkz\0" |
| 61730 | /* 265638 */ "VEXTRACTF64x4Zrrkz\0" |
| 61731 | /* 265657 */ "VINSERTF64x4Zrrkz\0" |
| 61732 | /* 265675 */ "VEXTRACTI64x4Zrrkz\0" |
| 61733 | /* 265694 */ "VINSERTI64x4Zrrkz\0" |
| 61734 | /* 265712 */ "VCVTNE2PS2BF16Zrrkz\0" |
| 61735 | /* 265732 */ "VCVTNEPS2BF16Zrrkz\0" |
| 61736 | /* 265751 */ "VMOVDQU16Zrrkz\0" |
| 61737 | /* 265766 */ "VMOVDQU8Zrrkz\0" |
| 61738 | /* 265780 */ "VEXTRACTF32x8Zrrkz\0" |
| 61739 | /* 265799 */ "VINSERTF32x8Zrrkz\0" |
| 61740 | /* 265817 */ "VEXTRACTI32x8Zrrkz\0" |
| 61741 | /* 265836 */ "VINSERTI32x8Zrrkz\0" |
| 61742 | /* 265854 */ "VPERMI2BZrrkz\0" |
| 61743 | /* 265868 */ "VPERMT2BZrrkz\0" |
| 61744 | /* 265882 */ "VPSUBBZrrkz\0" |
| 61745 | /* 265894 */ "VPADDBZrrkz\0" |
| 61746 | /* 265906 */ "VPEXPANDBZrrkz\0" |
| 61747 | /* 265921 */ "VPMOVUSDBZrrkz\0" |
| 61748 | /* 265936 */ "VPMOVSDBZrrkz\0" |
| 61749 | /* 265950 */ "VPMOVDBZrrkz\0" |
| 61750 | /* 265963 */ "VPSHUFBZrrkz\0" |
| 61751 | /* 265976 */ "VPAVGBZrrkz\0" |
| 61752 | /* 265988 */ "VGF2P8MULBZrrkz\0" |
| 61753 | /* 266004 */ "VPBLENDMBZrrkz\0" |
| 61754 | /* 266019 */ "VPERMBZrrkz\0" |
| 61755 | /* 266031 */ "VPMOVUSQBZrrkz\0" |
| 61756 | /* 266046 */ "VPMOVSQBZrrkz\0" |
| 61757 | /* 266060 */ "VPMULTISHIFTQBZrrkz\0" |
| 61758 | /* 266080 */ "VPMOVQBZrrkz\0" |
| 61759 | /* 266093 */ "VPABSBZrrkz\0" |
| 61760 | /* 266105 */ "VPSUBSBZrrkz\0" |
| 61761 | /* 266118 */ "VPADDSBZrrkz\0" |
| 61762 | /* 266131 */ "VPMINSBZrrkz\0" |
| 61763 | /* 266144 */ "VPCOMPRESSBZrrkz\0" |
| 61764 | /* 266161 */ "VPSUBUSBZrrkz\0" |
| 61765 | /* 266175 */ "VPADDUSBZrrkz\0" |
| 61766 | /* 266189 */ "VPMAXSBZrrkz\0" |
| 61767 | /* 266202 */ "VPOPCNTBZrrkz\0" |
| 61768 | /* 266216 */ "VPBROADCASTBZrrkz\0" |
| 61769 | /* 266234 */ "VPMINUBZrrkz\0" |
| 61770 | /* 266247 */ "VPMAXUBZrrkz\0" |
| 61771 | /* 266260 */ "VPACKSSWBZrrkz\0" |
| 61772 | /* 266275 */ "VPACKUSWBZrrkz\0" |
| 61773 | /* 266290 */ "VPMOVUSWBZrrkz\0" |
| 61774 | /* 266305 */ "VPMOVSWBZrrkz\0" |
| 61775 | /* 266319 */ "VPMOVWBZrrkz\0" |
| 61776 | /* 266332 */ "VPERMI2DZrrkz\0" |
| 61777 | /* 266346 */ "VPERMT2DZrrkz\0" |
| 61778 | /* 266360 */ "VPSRADZrrkz\0" |
| 61779 | /* 266372 */ "VPSUBDZrrkz\0" |
| 61780 | /* 266384 */ "VPMOVSXBDZrrkz\0" |
| 61781 | /* 266399 */ "VPMOVZXBDZrrkz\0" |
| 61782 | /* 266414 */ "VPADDDZrrkz\0" |
| 61783 | /* 266426 */ "VPANDDZrrkz\0" |
| 61784 | /* 266438 */ "VPEXPANDDZrrkz\0" |
| 61785 | /* 266453 */ "VPSLLDZrrkz\0" |
| 61786 | /* 266465 */ "VPMULLDZrrkz\0" |
| 61787 | /* 266478 */ "VPSRLDZrrkz\0" |
| 61788 | /* 266490 */ "VPBLENDMDZrrkz\0" |
| 61789 | /* 266505 */ "VPERMDZrrkz\0" |
| 61790 | /* 266517 */ "VPANDNDZrrkz\0" |
| 61791 | /* 266530 */ "VCVTPH2PDZrrkz\0" |
| 61792 | /* 266545 */ "VPERMI2PDZrrkz\0" |
| 61793 | /* 266560 */ "VCVTDQ2PDZrrkz\0" |
| 61794 | /* 266575 */ "VCVTUDQ2PDZrrkz\0" |
| 61795 | /* 266591 */ "VCVTQQ2PDZrrkz\0" |
| 61796 | /* 266606 */ "VCVTUQQ2PDZrrkz\0" |
| 61797 | /* 266622 */ "VCVTPS2PDZrrkz\0" |
| 61798 | /* 266637 */ "VPERMT2PDZrrkz\0" |
| 61799 | /* 266652 */ "VMOVAPDZrrkz\0" |
| 61800 | /* 266665 */ "VSUBPDZrrkz\0" |
| 61801 | /* 266677 */ "VMINCPDZrrkz\0" |
| 61802 | /* 266690 */ "VMAXCPDZrrkz\0" |
| 61803 | /* 266703 */ "VADDPDZrrkz\0" |
| 61804 | /* 266715 */ "VEXPANDPDZrrkz\0" |
| 61805 | /* 266730 */ "VANDPDZrrkz\0" |
| 61806 | /* 266742 */ "VSCALEFPDZrrkz\0" |
| 61807 | /* 266757 */ "VUNPCKHPDZrrkz\0" |
| 61808 | /* 266772 */ "VPERMILPDZrrkz\0" |
| 61809 | /* 266787 */ "VUNPCKLPDZrrkz\0" |
| 61810 | /* 266802 */ "VMULPDZrrkz\0" |
| 61811 | /* 266814 */ "VBLENDMPDZrrkz\0" |
| 61812 | /* 266829 */ "VPERMPDZrrkz\0" |
| 61813 | /* 266842 */ "VANDNPDZrrkz\0" |
| 61814 | /* 266855 */ "VMINPDZrrkz\0" |
| 61815 | /* 266867 */ "VORPDZrrkz\0" |
| 61816 | /* 266878 */ "VXORPDZrrkz\0" |
| 61817 | /* 266890 */ "VCOMPRESSPDZrrkz\0" |
| 61818 | /* 266907 */ "VMOVUPDZrrkz\0" |
| 61819 | /* 266920 */ "VDIVPDZrrkz\0" |
| 61820 | /* 266932 */ "VMAXPDZrrkz\0" |
| 61821 | /* 266944 */ "VPMOVUSQDZrrkz\0" |
| 61822 | /* 266959 */ "VPMOVSQDZrrkz\0" |
| 61823 | /* 266973 */ "VPMOVQDZrrkz\0" |
| 61824 | /* 266986 */ "VPORDZrrkz\0" |
| 61825 | /* 266997 */ "VPXORDZrrkz\0" |
| 61826 | /* 267009 */ "VRCP14SDZrrkz\0" |
| 61827 | /* 267023 */ "VRSQRT14SDZrrkz\0" |
| 61828 | /* 267039 */ "VPABSDZrrkz\0" |
| 61829 | /* 267051 */ "VSCALEFSDZrrkz\0" |
| 61830 | /* 267066 */ "VPMINSDZrrkz\0" |
| 61831 | /* 267079 */ "VPCOMPRESSDZrrkz\0" |
| 61832 | /* 267096 */ "VBROADCASTSDZrrkz\0" |
| 61833 | /* 267114 */ "VMOVSDZrrkz\0" |
| 61834 | /* 267126 */ "VPMAXSDZrrkz\0" |
| 61835 | /* 267139 */ "VPCONFLICTDZrrkz\0" |
| 61836 | /* 267156 */ "VPOPCNTDZrrkz\0" |
| 61837 | /* 267170 */ "VPLZCNTDZrrkz\0" |
| 61838 | /* 267184 */ "VPBROADCASTDZrrkz\0" |
| 61839 | /* 267202 */ "VPMINUDZrrkz\0" |
| 61840 | /* 267215 */ "VPMAXUDZrrkz\0" |
| 61841 | /* 267228 */ "VPSRAVDZrrkz\0" |
| 61842 | /* 267241 */ "VPSLLVDZrrkz\0" |
| 61843 | /* 267254 */ "VPROLVDZrrkz\0" |
| 61844 | /* 267267 */ "VPSRLVDZrrkz\0" |
| 61845 | /* 267280 */ "VPRORVDZrrkz\0" |
| 61846 | /* 267293 */ "VPMADDWDZrrkz\0" |
| 61847 | /* 267307 */ "VPUNPCKHWDZrrkz\0" |
| 61848 | /* 267323 */ "VPUNPCKLWDZrrkz\0" |
| 61849 | /* 267339 */ "VPMOVSXWDZrrkz\0" |
| 61850 | /* 267354 */ "VPMOVZXWDZrrkz\0" |
| 61851 | /* 267369 */ "VCVTPD2PHZrrkz\0" |
| 61852 | /* 267384 */ "VCVTDQ2PHZrrkz\0" |
| 61853 | /* 267399 */ "VCVTUDQ2PHZrrkz\0" |
| 61854 | /* 267415 */ "VCVTQQ2PHZrrkz\0" |
| 61855 | /* 267430 */ "VCVTUQQ2PHZrrkz\0" |
| 61856 | /* 267446 */ "VCVTPS2PHZrrkz\0" |
| 61857 | /* 267461 */ "VCVTW2PHZrrkz\0" |
| 61858 | /* 267475 */ "VCVTUW2PHZrrkz\0" |
| 61859 | /* 267490 */ "VSUBPHZrrkz\0" |
| 61860 | /* 267502 */ "VFCMULCPHZrrkz\0" |
| 61861 | /* 267517 */ "VFMULCPHZrrkz\0" |
| 61862 | /* 267531 */ "VMINCPHZrrkz\0" |
| 61863 | /* 267544 */ "VMAXCPHZrrkz\0" |
| 61864 | /* 267557 */ "VADDPHZrrkz\0" |
| 61865 | /* 267569 */ "VSCALEFPHZrrkz\0" |
| 61866 | /* 267584 */ "VMULPHZrrkz\0" |
| 61867 | /* 267596 */ "VMINPHZrrkz\0" |
| 61868 | /* 267608 */ "VDIVPHZrrkz\0" |
| 61869 | /* 267620 */ "VMAXPHZrrkz\0" |
| 61870 | /* 267632 */ "VFCMULCSHZrrkz\0" |
| 61871 | /* 267647 */ "VFMULCSHZrrkz\0" |
| 61872 | /* 267661 */ "VSCALEFSHZrrkz\0" |
| 61873 | /* 267676 */ "VRCPSHZrrkz\0" |
| 61874 | /* 267688 */ "VRSQRTSHZrrkz\0" |
| 61875 | /* 267702 */ "VMOVSHZrrkz\0" |
| 61876 | /* 267714 */ "VMOVDDUPZrrkz\0" |
| 61877 | /* 267728 */ "VMOVSHDUPZrrkz\0" |
| 61878 | /* 267743 */ "VMOVSLDUPZrrkz\0" |
| 61879 | /* 267758 */ "VPERMI2QZrrkz\0" |
| 61880 | /* 267772 */ "VPERMT2QZrrkz\0" |
| 61881 | /* 267786 */ "VPSRAQZrrkz\0" |
| 61882 | /* 267798 */ "VPSUBQZrrkz\0" |
| 61883 | /* 267810 */ "VPMOVSXBQZrrkz\0" |
| 61884 | /* 267825 */ "VPMOVZXBQZrrkz\0" |
| 61885 | /* 267840 */ "VCVTTPD2DQZrrkz\0" |
| 61886 | /* 267856 */ "VCVTPD2DQZrrkz\0" |
| 61887 | /* 267871 */ "VCVTTPH2DQZrrkz\0" |
| 61888 | /* 267887 */ "VCVTPH2DQZrrkz\0" |
| 61889 | /* 267902 */ "VCVTTPS2DQZrrkz\0" |
| 61890 | /* 267918 */ "VCVTPS2DQZrrkz\0" |
| 61891 | /* 267933 */ "VPADDQZrrkz\0" |
| 61892 | /* 267945 */ "VPUNPCKHDQZrrkz\0" |
| 61893 | /* 267961 */ "VPUNPCKLDQZrrkz\0" |
| 61894 | /* 267977 */ "VPMULDQZrrkz\0" |
| 61895 | /* 267990 */ "VPANDQZrrkz\0" |
| 61896 | /* 268002 */ "VPEXPANDQZrrkz\0" |
| 61897 | /* 268017 */ "VPUNPCKHQDQZrrkz\0" |
| 61898 | /* 268034 */ "VPUNPCKLQDQZrrkz\0" |
| 61899 | /* 268051 */ "VCVTTPD2UDQZrrkz\0" |
| 61900 | /* 268068 */ "VCVTPD2UDQZrrkz\0" |
| 61901 | /* 268084 */ "VCVTTPH2UDQZrrkz\0" |
| 61902 | /* 268101 */ "VCVTPH2UDQZrrkz\0" |
| 61903 | /* 268117 */ "VCVTTPS2UDQZrrkz\0" |
| 61904 | /* 268134 */ "VCVTPS2UDQZrrkz\0" |
| 61905 | /* 268150 */ "VPMULUDQZrrkz\0" |
| 61906 | /* 268164 */ "VPMOVSXDQZrrkz\0" |
| 61907 | /* 268179 */ "VPMOVZXDQZrrkz\0" |
| 61908 | /* 268194 */ "VPSLLQZrrkz\0" |
| 61909 | /* 268206 */ "VPMULLQZrrkz\0" |
| 61910 | /* 268219 */ "VPSRLQZrrkz\0" |
| 61911 | /* 268231 */ "VPBLENDMQZrrkz\0" |
| 61912 | /* 268246 */ "VPERMQZrrkz\0" |
| 61913 | /* 268258 */ "VPANDNQZrrkz\0" |
| 61914 | /* 268271 */ "VCVTTPD2QQZrrkz\0" |
| 61915 | /* 268287 */ "VCVTPD2QQZrrkz\0" |
| 61916 | /* 268302 */ "VCVTTPH2QQZrrkz\0" |
| 61917 | /* 268318 */ "VCVTPH2QQZrrkz\0" |
| 61918 | /* 268333 */ "VCVTTPS2QQZrrkz\0" |
| 61919 | /* 268349 */ "VCVTPS2QQZrrkz\0" |
| 61920 | /* 268364 */ "VCVTTPD2UQQZrrkz\0" |
| 61921 | /* 268381 */ "VCVTPD2UQQZrrkz\0" |
| 61922 | /* 268397 */ "VCVTTPH2UQQZrrkz\0" |
| 61923 | /* 268414 */ "VCVTPH2UQQZrrkz\0" |
| 61924 | /* 268430 */ "VCVTTPS2UQQZrrkz\0" |
| 61925 | /* 268447 */ "VCVTPS2UQQZrrkz\0" |
| 61926 | /* 268463 */ "VPORQZrrkz\0" |
| 61927 | /* 268474 */ "VPXORQZrrkz\0" |
| 61928 | /* 268486 */ "VPABSQZrrkz\0" |
| 61929 | /* 268498 */ "VPMINSQZrrkz\0" |
| 61930 | /* 268511 */ "VPCOMPRESSQZrrkz\0" |
| 61931 | /* 268528 */ "VPMAXSQZrrkz\0" |
| 61932 | /* 268541 */ "VPCONFLICTQZrrkz\0" |
| 61933 | /* 268558 */ "VPOPCNTQZrrkz\0" |
| 61934 | /* 268572 */ "VPLZCNTQZrrkz\0" |
| 61935 | /* 268586 */ "VPBROADCASTQZrrkz\0" |
| 61936 | /* 268604 */ "VPMINUQZrrkz\0" |
| 61937 | /* 268617 */ "VPMAXUQZrrkz\0" |
| 61938 | /* 268630 */ "VPSRAVQZrrkz\0" |
| 61939 | /* 268643 */ "VPSLLVQZrrkz\0" |
| 61940 | /* 268656 */ "VPROLVQZrrkz\0" |
| 61941 | /* 268669 */ "VPSRLVQZrrkz\0" |
| 61942 | /* 268682 */ "VPRORVQZrrkz\0" |
| 61943 | /* 268695 */ "VPMOVSXWQZrrkz\0" |
| 61944 | /* 268710 */ "VPMOVZXWQZrrkz\0" |
| 61945 | /* 268725 */ "VCVTPD2PSZrrkz\0" |
| 61946 | /* 268740 */ "VCVTPH2PSZrrkz\0" |
| 61947 | /* 268755 */ "VPERMI2PSZrrkz\0" |
| 61948 | /* 268770 */ "VCVTDQ2PSZrrkz\0" |
| 61949 | /* 268785 */ "VCVTUDQ2PSZrrkz\0" |
| 61950 | /* 268801 */ "VCVTQQ2PSZrrkz\0" |
| 61951 | /* 268816 */ "VCVTUQQ2PSZrrkz\0" |
| 61952 | /* 268832 */ "VPERMT2PSZrrkz\0" |
| 61953 | /* 268847 */ "VMOVAPSZrrkz\0" |
| 61954 | /* 268860 */ "VSUBPSZrrkz\0" |
| 61955 | /* 268872 */ "VMINCPSZrrkz\0" |
| 61956 | /* 268885 */ "VMAXCPSZrrkz\0" |
| 61957 | /* 268898 */ "VADDPSZrrkz\0" |
| 61958 | /* 268910 */ "VEXPANDPSZrrkz\0" |
| 61959 | /* 268925 */ "VANDPSZrrkz\0" |
| 61960 | /* 268937 */ "VSCALEFPSZrrkz\0" |
| 61961 | /* 268952 */ "VUNPCKHPSZrrkz\0" |
| 61962 | /* 268967 */ "VPERMILPSZrrkz\0" |
| 61963 | /* 268982 */ "VUNPCKLPSZrrkz\0" |
| 61964 | /* 268997 */ "VMULPSZrrkz\0" |
| 61965 | /* 269009 */ "VBLENDMPSZrrkz\0" |
| 61966 | /* 269024 */ "VPERMPSZrrkz\0" |
| 61967 | /* 269037 */ "VANDNPSZrrkz\0" |
| 61968 | /* 269050 */ "VMINPSZrrkz\0" |
| 61969 | /* 269062 */ "VORPSZrrkz\0" |
| 61970 | /* 269073 */ "VXORPSZrrkz\0" |
| 61971 | /* 269085 */ "VCOMPRESSPSZrrkz\0" |
| 61972 | /* 269102 */ "VMOVUPSZrrkz\0" |
| 61973 | /* 269115 */ "VDIVPSZrrkz\0" |
| 61974 | /* 269127 */ "VMAXPSZrrkz\0" |
| 61975 | /* 269139 */ "VRCP14SSZrrkz\0" |
| 61976 | /* 269153 */ "VRSQRT14SSZrrkz\0" |
| 61977 | /* 269169 */ "VSCALEFSSZrrkz\0" |
| 61978 | /* 269184 */ "VBROADCASTSSZrrkz\0" |
| 61979 | /* 269202 */ "VMOVSSZrrkz\0" |
| 61980 | /* 269214 */ "VCVTTPH2WZrrkz\0" |
| 61981 | /* 269229 */ "VCVTPH2WZrrkz\0" |
| 61982 | /* 269243 */ "VPERMI2WZrrkz\0" |
| 61983 | /* 269257 */ "VPERMT2WZrrkz\0" |
| 61984 | /* 269271 */ "VPSRAWZrrkz\0" |
| 61985 | /* 269283 */ "VPUNPCKHBWZrrkz\0" |
| 61986 | /* 269299 */ "VPUNPCKLBWZrrkz\0" |
| 61987 | /* 269315 */ "VPSUBWZrrkz\0" |
| 61988 | /* 269327 */ "VPMOVSXBWZrrkz\0" |
| 61989 | /* 269342 */ "VPMOVZXBWZrrkz\0" |
| 61990 | /* 269357 */ "VPADDWZrrkz\0" |
| 61991 | /* 269369 */ "VPEXPANDWZrrkz\0" |
| 61992 | /* 269384 */ "VPACKSSDWZrrkz\0" |
| 61993 | /* 269399 */ "VPACKUSDWZrrkz\0" |
| 61994 | /* 269414 */ "VPMOVUSDWZrrkz\0" |
| 61995 | /* 269429 */ "VPMOVSDWZrrkz\0" |
| 61996 | /* 269443 */ "VPMOVDWZrrkz\0" |
| 61997 | /* 269456 */ "VPAVGWZrrkz\0" |
| 61998 | /* 269468 */ "VPMULHWZrrkz\0" |
| 61999 | /* 269481 */ "VPSLLWZrrkz\0" |
| 62000 | /* 269493 */ "VPMULLWZrrkz\0" |
| 62001 | /* 269506 */ "VPSRLWZrrkz\0" |
| 62002 | /* 269518 */ "VPBLENDMWZrrkz\0" |
| 62003 | /* 269533 */ "VPERMWZrrkz\0" |
| 62004 | /* 269545 */ "VPMOVUSQWZrrkz\0" |
| 62005 | /* 269560 */ "VPMOVSQWZrrkz\0" |
| 62006 | /* 269574 */ "VPMOVQWZrrkz\0" |
| 62007 | /* 269587 */ "VPABSWZrrkz\0" |
| 62008 | /* 269599 */ "VPMADDUBSWZrrkz\0" |
| 62009 | /* 269615 */ "VPSUBSWZrrkz\0" |
| 62010 | /* 269628 */ "VPADDSWZrrkz\0" |
| 62011 | /* 269641 */ "VPMINSWZrrkz\0" |
| 62012 | /* 269654 */ "VPMULHRSWZrrkz\0" |
| 62013 | /* 269669 */ "VPCOMPRESSWZrrkz\0" |
| 62014 | /* 269686 */ "VPSUBUSWZrrkz\0" |
| 62015 | /* 269700 */ "VPADDUSWZrrkz\0" |
| 62016 | /* 269714 */ "VPMAXSWZrrkz\0" |
| 62017 | /* 269727 */ "VPOPCNTWZrrkz\0" |
| 62018 | /* 269741 */ "VPBROADCASTWZrrkz\0" |
| 62019 | /* 269759 */ "VCVTTPH2UWZrrkz\0" |
| 62020 | /* 269775 */ "VCVTPH2UWZrrkz\0" |
| 62021 | /* 269790 */ "VPMULHUWZrrkz\0" |
| 62022 | /* 269804 */ "VPMINUWZrrkz\0" |
| 62023 | /* 269817 */ "VPMAXUWZrrkz\0" |
| 62024 | /* 269830 */ "VPSRAVWZrrkz\0" |
| 62025 | /* 269843 */ "VPSLLVWZrrkz\0" |
| 62026 | /* 269856 */ "VPSRLVWZrrkz\0" |
| 62027 | /* 269869 */ "VCVTPS2PHXZrrkz\0" |
| 62028 | /* 269885 */ "VCVTPH2PSXZrrkz\0" |
| 62029 | /* 269901 */ "VPBROADCASTBrZrrkz\0" |
| 62030 | /* 269920 */ "VPBROADCASTDrZrrkz\0" |
| 62031 | /* 269939 */ "VPBROADCASTQrZrrkz\0" |
| 62032 | /* 269958 */ "VPBROADCASTWrZrrkz\0" |
| 62033 | /* 269977 */ "VFMSUB231SDZrb_Intkz\0" |
| 62034 | /* 269998 */ "VFNMSUB231SDZrb_Intkz\0" |
| 62035 | /* 270020 */ "VFMADD231SDZrb_Intkz\0" |
| 62036 | /* 270041 */ "VFNMADD231SDZrb_Intkz\0" |
| 62037 | /* 270063 */ "VFMSUB132SDZrb_Intkz\0" |
| 62038 | /* 270084 */ "VFNMSUB132SDZrb_Intkz\0" |
| 62039 | /* 270106 */ "VFMADD132SDZrb_Intkz\0" |
| 62040 | /* 270127 */ "VFNMADD132SDZrb_Intkz\0" |
| 62041 | /* 270149 */ "VFMSUB213SDZrb_Intkz\0" |
| 62042 | /* 270170 */ "VFNMSUB213SDZrb_Intkz\0" |
| 62043 | /* 270192 */ "VFMADD213SDZrb_Intkz\0" |
| 62044 | /* 270213 */ "VFNMADD213SDZrb_Intkz\0" |
| 62045 | /* 270235 */ "VRNDSCALESDZrb_Intkz\0" |
| 62046 | /* 270256 */ "VSQRTSDZrb_Intkz\0" |
| 62047 | /* 270273 */ "VFMSUB231SHZrb_Intkz\0" |
| 62048 | /* 270294 */ "VFNMSUB231SHZrb_Intkz\0" |
| 62049 | /* 270316 */ "VFMADD231SHZrb_Intkz\0" |
| 62050 | /* 270337 */ "VFNMADD231SHZrb_Intkz\0" |
| 62051 | /* 270359 */ "VFMSUB132SHZrb_Intkz\0" |
| 62052 | /* 270380 */ "VFNMSUB132SHZrb_Intkz\0" |
| 62053 | /* 270402 */ "VFMADD132SHZrb_Intkz\0" |
| 62054 | /* 270423 */ "VFNMADD132SHZrb_Intkz\0" |
| 62055 | /* 270445 */ "VFMSUB213SHZrb_Intkz\0" |
| 62056 | /* 270466 */ "VFNMSUB213SHZrb_Intkz\0" |
| 62057 | /* 270488 */ "VFMADD213SHZrb_Intkz\0" |
| 62058 | /* 270509 */ "VFNMADD213SHZrb_Intkz\0" |
| 62059 | /* 270531 */ "VRNDSCALESHZrb_Intkz\0" |
| 62060 | /* 270552 */ "VSQRTSHZrb_Intkz\0" |
| 62061 | /* 270569 */ "VFMSUB231SSZrb_Intkz\0" |
| 62062 | /* 270590 */ "VFNMSUB231SSZrb_Intkz\0" |
| 62063 | /* 270612 */ "VFMADD231SSZrb_Intkz\0" |
| 62064 | /* 270633 */ "VFNMADD231SSZrb_Intkz\0" |
| 62065 | /* 270655 */ "VFMSUB132SSZrb_Intkz\0" |
| 62066 | /* 270676 */ "VFNMSUB132SSZrb_Intkz\0" |
| 62067 | /* 270698 */ "VFMADD132SSZrb_Intkz\0" |
| 62068 | /* 270719 */ "VFNMADD132SSZrb_Intkz\0" |
| 62069 | /* 270741 */ "VFMSUB213SSZrb_Intkz\0" |
| 62070 | /* 270762 */ "VFNMSUB213SSZrb_Intkz\0" |
| 62071 | /* 270784 */ "VFMADD213SSZrb_Intkz\0" |
| 62072 | /* 270805 */ "VFNMADD213SSZrb_Intkz\0" |
| 62073 | /* 270827 */ "VRNDSCALESSZrb_Intkz\0" |
| 62074 | /* 270848 */ "VSQRTSSZrb_Intkz\0" |
| 62075 | /* 270865 */ "VCVTSH2SDZrrb_Intkz\0" |
| 62076 | /* 270885 */ "VCVTSS2SDZrrb_Intkz\0" |
| 62077 | /* 270905 */ "VSUBSDZrrb_Intkz\0" |
| 62078 | /* 270922 */ "VADDSDZrrb_Intkz\0" |
| 62079 | /* 270939 */ "VSCALEFSDZrrb_Intkz\0" |
| 62080 | /* 270959 */ "VMULSDZrrb_Intkz\0" |
| 62081 | /* 270976 */ "VMINSDZrrb_Intkz\0" |
| 62082 | /* 270993 */ "VDIVSDZrrb_Intkz\0" |
| 62083 | /* 271010 */ "VMAXSDZrrb_Intkz\0" |
| 62084 | /* 271027 */ "VCVTSD2SHZrrb_Intkz\0" |
| 62085 | /* 271047 */ "VCVTSS2SHZrrb_Intkz\0" |
| 62086 | /* 271067 */ "VSUBSHZrrb_Intkz\0" |
| 62087 | /* 271084 */ "VADDSHZrrb_Intkz\0" |
| 62088 | /* 271101 */ "VSCALEFSHZrrb_Intkz\0" |
| 62089 | /* 271121 */ "VMULSHZrrb_Intkz\0" |
| 62090 | /* 271138 */ "VMINSHZrrb_Intkz\0" |
| 62091 | /* 271155 */ "VDIVSHZrrb_Intkz\0" |
| 62092 | /* 271172 */ "VMAXSHZrrb_Intkz\0" |
| 62093 | /* 271189 */ "VCVTSD2SSZrrb_Intkz\0" |
| 62094 | /* 271209 */ "VCVTSH2SSZrrb_Intkz\0" |
| 62095 | /* 271229 */ "VSUBSSZrrb_Intkz\0" |
| 62096 | /* 271246 */ "VADDSSZrrb_Intkz\0" |
| 62097 | /* 271263 */ "VSCALEFSSZrrb_Intkz\0" |
| 62098 | /* 271283 */ "VMULSSZrrb_Intkz\0" |
| 62099 | /* 271300 */ "VMINSSZrrb_Intkz\0" |
| 62100 | /* 271317 */ "VDIVSSZrrb_Intkz\0" |
| 62101 | /* 271334 */ "VMAXSSZrrb_Intkz\0" |
| 62102 | /* 271351 */ "VFMSUB231SDZm_Intkz\0" |
| 62103 | /* 271371 */ "VFNMSUB231SDZm_Intkz\0" |
| 62104 | /* 271392 */ "VFMADD231SDZm_Intkz\0" |
| 62105 | /* 271412 */ "VFNMADD231SDZm_Intkz\0" |
| 62106 | /* 271433 */ "VFMSUB132SDZm_Intkz\0" |
| 62107 | /* 271453 */ "VFNMSUB132SDZm_Intkz\0" |
| 62108 | /* 271474 */ "VFMADD132SDZm_Intkz\0" |
| 62109 | /* 271494 */ "VFNMADD132SDZm_Intkz\0" |
| 62110 | /* 271515 */ "VFMSUB213SDZm_Intkz\0" |
| 62111 | /* 271535 */ "VFNMSUB213SDZm_Intkz\0" |
| 62112 | /* 271556 */ "VFMADD213SDZm_Intkz\0" |
| 62113 | /* 271576 */ "VFNMADD213SDZm_Intkz\0" |
| 62114 | /* 271597 */ "VRNDSCALESDZm_Intkz\0" |
| 62115 | /* 271617 */ "VSQRTSDZm_Intkz\0" |
| 62116 | /* 271633 */ "VFMSUB231SHZm_Intkz\0" |
| 62117 | /* 271653 */ "VFNMSUB231SHZm_Intkz\0" |
| 62118 | /* 271674 */ "VFMADD231SHZm_Intkz\0" |
| 62119 | /* 271694 */ "VFNMADD231SHZm_Intkz\0" |
| 62120 | /* 271715 */ "VFMSUB132SHZm_Intkz\0" |
| 62121 | /* 271735 */ "VFNMSUB132SHZm_Intkz\0" |
| 62122 | /* 271756 */ "VFMADD132SHZm_Intkz\0" |
| 62123 | /* 271776 */ "VFNMADD132SHZm_Intkz\0" |
| 62124 | /* 271797 */ "VFMSUB213SHZm_Intkz\0" |
| 62125 | /* 271817 */ "VFNMSUB213SHZm_Intkz\0" |
| 62126 | /* 271838 */ "VFMADD213SHZm_Intkz\0" |
| 62127 | /* 271858 */ "VFNMADD213SHZm_Intkz\0" |
| 62128 | /* 271879 */ "VRNDSCALESHZm_Intkz\0" |
| 62129 | /* 271899 */ "VSQRTSHZm_Intkz\0" |
| 62130 | /* 271915 */ "VFMSUB231SSZm_Intkz\0" |
| 62131 | /* 271935 */ "VFNMSUB231SSZm_Intkz\0" |
| 62132 | /* 271956 */ "VFMADD231SSZm_Intkz\0" |
| 62133 | /* 271976 */ "VFNMADD231SSZm_Intkz\0" |
| 62134 | /* 271997 */ "VFMSUB132SSZm_Intkz\0" |
| 62135 | /* 272017 */ "VFNMSUB132SSZm_Intkz\0" |
| 62136 | /* 272038 */ "VFMADD132SSZm_Intkz\0" |
| 62137 | /* 272058 */ "VFNMADD132SSZm_Intkz\0" |
| 62138 | /* 272079 */ "VFMSUB213SSZm_Intkz\0" |
| 62139 | /* 272099 */ "VFNMSUB213SSZm_Intkz\0" |
| 62140 | /* 272120 */ "VFMADD213SSZm_Intkz\0" |
| 62141 | /* 272140 */ "VFNMADD213SSZm_Intkz\0" |
| 62142 | /* 272161 */ "VRNDSCALESSZm_Intkz\0" |
| 62143 | /* 272181 */ "VSQRTSSZm_Intkz\0" |
| 62144 | /* 272197 */ "VCVTSH2SDZrm_Intkz\0" |
| 62145 | /* 272216 */ "VCVTSS2SDZrm_Intkz\0" |
| 62146 | /* 272235 */ "VSUBSDZrm_Intkz\0" |
| 62147 | /* 272251 */ "VADDSDZrm_Intkz\0" |
| 62148 | /* 272267 */ "VMULSDZrm_Intkz\0" |
| 62149 | /* 272283 */ "VMINSDZrm_Intkz\0" |
| 62150 | /* 272299 */ "VDIVSDZrm_Intkz\0" |
| 62151 | /* 272315 */ "VMAXSDZrm_Intkz\0" |
| 62152 | /* 272331 */ "VCVTSD2SHZrm_Intkz\0" |
| 62153 | /* 272350 */ "VCVTSS2SHZrm_Intkz\0" |
| 62154 | /* 272369 */ "VSUBSHZrm_Intkz\0" |
| 62155 | /* 272385 */ "VADDSHZrm_Intkz\0" |
| 62156 | /* 272401 */ "VMULSHZrm_Intkz\0" |
| 62157 | /* 272417 */ "VMINSHZrm_Intkz\0" |
| 62158 | /* 272433 */ "VDIVSHZrm_Intkz\0" |
| 62159 | /* 272449 */ "VMAXSHZrm_Intkz\0" |
| 62160 | /* 272465 */ "VCVTSD2SSZrm_Intkz\0" |
| 62161 | /* 272484 */ "VCVTSH2SSZrm_Intkz\0" |
| 62162 | /* 272503 */ "VSUBSSZrm_Intkz\0" |
| 62163 | /* 272519 */ "VADDSSZrm_Intkz\0" |
| 62164 | /* 272535 */ "VMULSSZrm_Intkz\0" |
| 62165 | /* 272551 */ "VMINSSZrm_Intkz\0" |
| 62166 | /* 272567 */ "VDIVSSZrm_Intkz\0" |
| 62167 | /* 272583 */ "VMAXSSZrm_Intkz\0" |
| 62168 | /* 272599 */ "VFMSUB231SDZr_Intkz\0" |
| 62169 | /* 272619 */ "VFNMSUB231SDZr_Intkz\0" |
| 62170 | /* 272640 */ "VFMADD231SDZr_Intkz\0" |
| 62171 | /* 272660 */ "VFNMADD231SDZr_Intkz\0" |
| 62172 | /* 272681 */ "VFMSUB132SDZr_Intkz\0" |
| 62173 | /* 272701 */ "VFNMSUB132SDZr_Intkz\0" |
| 62174 | /* 272722 */ "VFMADD132SDZr_Intkz\0" |
| 62175 | /* 272742 */ "VFNMADD132SDZr_Intkz\0" |
| 62176 | /* 272763 */ "VFMSUB213SDZr_Intkz\0" |
| 62177 | /* 272783 */ "VFNMSUB213SDZr_Intkz\0" |
| 62178 | /* 272804 */ "VFMADD213SDZr_Intkz\0" |
| 62179 | /* 272824 */ "VFNMADD213SDZr_Intkz\0" |
| 62180 | /* 272845 */ "VRNDSCALESDZr_Intkz\0" |
| 62181 | /* 272865 */ "VSQRTSDZr_Intkz\0" |
| 62182 | /* 272881 */ "VFMSUB231SHZr_Intkz\0" |
| 62183 | /* 272901 */ "VFNMSUB231SHZr_Intkz\0" |
| 62184 | /* 272922 */ "VFMADD231SHZr_Intkz\0" |
| 62185 | /* 272942 */ "VFNMADD231SHZr_Intkz\0" |
| 62186 | /* 272963 */ "VFMSUB132SHZr_Intkz\0" |
| 62187 | /* 272983 */ "VFNMSUB132SHZr_Intkz\0" |
| 62188 | /* 273004 */ "VFMADD132SHZr_Intkz\0" |
| 62189 | /* 273024 */ "VFNMADD132SHZr_Intkz\0" |
| 62190 | /* 273045 */ "VFMSUB213SHZr_Intkz\0" |
| 62191 | /* 273065 */ "VFNMSUB213SHZr_Intkz\0" |
| 62192 | /* 273086 */ "VFMADD213SHZr_Intkz\0" |
| 62193 | /* 273106 */ "VFNMADD213SHZr_Intkz\0" |
| 62194 | /* 273127 */ "VRNDSCALESHZr_Intkz\0" |
| 62195 | /* 273147 */ "VSQRTSHZr_Intkz\0" |
| 62196 | /* 273163 */ "VFMSUB231SSZr_Intkz\0" |
| 62197 | /* 273183 */ "VFNMSUB231SSZr_Intkz\0" |
| 62198 | /* 273204 */ "VFMADD231SSZr_Intkz\0" |
| 62199 | /* 273224 */ "VFNMADD231SSZr_Intkz\0" |
| 62200 | /* 273245 */ "VFMSUB132SSZr_Intkz\0" |
| 62201 | /* 273265 */ "VFNMSUB132SSZr_Intkz\0" |
| 62202 | /* 273286 */ "VFMADD132SSZr_Intkz\0" |
| 62203 | /* 273306 */ "VFNMADD132SSZr_Intkz\0" |
| 62204 | /* 273327 */ "VFMSUB213SSZr_Intkz\0" |
| 62205 | /* 273347 */ "VFNMSUB213SSZr_Intkz\0" |
| 62206 | /* 273368 */ "VFMADD213SSZr_Intkz\0" |
| 62207 | /* 273388 */ "VFNMADD213SSZr_Intkz\0" |
| 62208 | /* 273409 */ "VRNDSCALESSZr_Intkz\0" |
| 62209 | /* 273429 */ "VSQRTSSZr_Intkz\0" |
| 62210 | /* 273445 */ "VCVTSH2SDZrr_Intkz\0" |
| 62211 | /* 273464 */ "VCVTSS2SDZrr_Intkz\0" |
| 62212 | /* 273483 */ "VSUBSDZrr_Intkz\0" |
| 62213 | /* 273499 */ "VADDSDZrr_Intkz\0" |
| 62214 | /* 273515 */ "VMULSDZrr_Intkz\0" |
| 62215 | /* 273531 */ "VMINSDZrr_Intkz\0" |
| 62216 | /* 273547 */ "VDIVSDZrr_Intkz\0" |
| 62217 | /* 273563 */ "VMAXSDZrr_Intkz\0" |
| 62218 | /* 273579 */ "VCVTSD2SHZrr_Intkz\0" |
| 62219 | /* 273598 */ "VCVTSS2SHZrr_Intkz\0" |
| 62220 | /* 273617 */ "VSUBSHZrr_Intkz\0" |
| 62221 | /* 273633 */ "VADDSHZrr_Intkz\0" |
| 62222 | /* 273649 */ "VMULSHZrr_Intkz\0" |
| 62223 | /* 273665 */ "VMINSHZrr_Intkz\0" |
| 62224 | /* 273681 */ "VDIVSHZrr_Intkz\0" |
| 62225 | /* 273697 */ "VMAXSHZrr_Intkz\0" |
| 62226 | /* 273713 */ "VCVTSD2SSZrr_Intkz\0" |
| 62227 | /* 273732 */ "VCVTSH2SSZrr_Intkz\0" |
| 62228 | /* 273751 */ "VSUBSSZrr_Intkz\0" |
| 62229 | /* 273767 */ "VADDSSZrr_Intkz\0" |
| 62230 | /* 273783 */ "VMULSSZrr_Intkz\0" |
| 62231 | /* 273799 */ "VMINSSZrr_Intkz\0" |
| 62232 | /* 273815 */ "VDIVSSZrr_Intkz\0" |
| 62233 | /* 273831 */ "VMAXSSZrr_Intkz\0" |
| 62234 | }; |
| 62235 | #ifdef __GNUC__ |
| 62236 | #pragma GCC diagnostic pop |
| 62237 | #endif |
| 62238 | |
| 62239 | extern const unsigned X86InstrNameIndices[] = { |
| 62240 | 21803U, 23299U, 24205U, 23611U, 22566U, 22547U, 22575U, 22873U, |
| 62241 | 21520U, 21535U, 17337U, 21562U, 25025U, 17160U, 25992U, 17361U, |
| 62242 | 21799U, 22556U, 16808U, 39665U, 16948U, 25863U, 8039U, 16738U, |
| 62243 | 16796U, 23753U, 22852U, 25627U, 16617U, 24031U, 21681U, 25616U, |
| 62244 | 16987U, 23975U, 23962U, 24343U, 25413U, 25486U, 22784U, 22831U, |
| 62245 | 22804U, 22592U, 24231U, 23675U, 39679U, 24461U, 23928U, 17208U, |
| 62246 | 26032U, 26062U, 23447U, 7925U, 7474U, 23031U, 31032U, 31039U, |
| 62247 | 23253U, 23260U, 23267U, 23277U, 8012U, 24640U, 24603U, 17335U, |
| 62248 | 21801U, 31471U, 17170U, 17185U, 22878U, 25332U, 24806U, 25900U, |
| 62249 | 24823U, 24532U, 7635U, 24984U, 25638U, 24707U, 25939U, 17264U, |
| 62250 | 24242U, 8098U, 7609U, 8080U, 25676U, 25657U, 23425U, 24368U, |
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| 62293 | 37380U, 15674U, 177716U, 39030U, 27311U, 16472U, 26693U, 28702U, |
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| 62312 | 18154U, 10355U, 35522U, 14804U, 19514U, 11971U, 141190U, 36689U, |
| 62313 | 15453U, 20086U, 12563U, 176299U, 38369U, 27124U, 16251U, 26528U, |
| 62314 | 20939U, 13201U, 26217U, 26852U, 28129U, 2246U, 2342U, 32501U, |
| 62315 | 8765U, 17835U, 10048U, 6085U, 33041U, 8990U, 18016U, 10235U, |
| 62316 | 171922U, 38096U, 16059U, 20811U, 13037U, 2485U, 32608U, 8843U, |
| 62317 | 17902U, 10112U, 6566U, 33341U, 9206U, 18202U, 10415U, 141795U, |
| 62318 | 37041U, 15569U, 20257U, 12634U, 176865U, 38706U, 27226U, 16367U, |
| 62319 | 26618U, 21110U, 13272U, 26289U, 26912U, 28243U, 5864U, 58575U, |
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| 62324 | 189286U, 155416U, 191535U, 39297U, 39256U, 153632U, 205231U, 189611U, |
| 62325 | 208308U, 155738U, 205454U, 191829U, 208531U, 153229U, 189234U, 155364U, |
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| 62331 | 155880U, 191957U, 22713U, 22657U, 152800U, 188793U, 22701U, 22645U, |
| 62332 | 155894U, 191971U, 22729U, 22673U, 152820U, 188813U, 152810U, 188803U, |
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| 62351 | 37555U, 15784U, 20533U, 12788U, 188100U, 39190U, 27443U, 16582U, |
| 62352 | 26809U, 21386U, 13426U, 26449U, 27045U, 29218U, 141396U, 36788U, |
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| 62354 | 38790U, 21182U, 153386U, 189370U, 155546U, 191641U, 153299U, 189304U, |
| 62355 | 155459U, 191553U, 171787U, 38029U, 172010U, 38138U, 172474U, 177795U, |
| 62356 | 25055U, 171795U, 38042U, 172018U, 38151U, 141456U, 36843U, 20193U, |
| 62357 | 176532U, 38508U, 21046U, 142145U, 37195U, 20364U, 177191U, 38845U, |
| 62358 | 21217U, 57604U, 62086U, 57732U, 62228U, 141307U, 176416U, 141983U, |
| 62359 | 177053U, 141248U, 176357U, 141866U, 176936U, 141158U, 176248U, 141763U, |
| 62360 | 176814U, 141275U, 176384U, 141951U, 177021U, 141466U, 176542U, 142155U, |
| 62361 | 177201U, 60843U, 65708U, 60992U, 65857U, 787U, 831U, 799U, |
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| 62367 | 37181U, 20352U, 177174U, 38831U, 21205U, 142858U, 141483U, 142732U, |
| 62368 | 177775U, 141228U, 176337U, 141846U, 176916U, 142842U, 177853U, 141439U, |
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| 62370 | 6720U, 177877U, 6031U, 171845U, 6522U, 176559U, 6163U, 172068U, |
| 62371 | 6621U, 177218U, 6203U, 172430U, 6656U, 177724U, 5939U, 171705U, |
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| 62375 | 6513U, 176551U, 6154U, 172060U, 6612U, 177210U, 141257U, 36730U, |
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| 62377 | 38732U, 21132U, 134165U, 25749U, 165073U, 25812U, 133440U, 25707U, |
| 62378 | 164738U, 25770U, 133814U, 25728U, 2574U, 164913U, 25791U, 5491U, |
| 62379 | 2588U, 25372U, 31169U, 57887U, 6240U, 172483U, 62407U, 6683U, |
| 62380 | 142817U, 177828U, 28752U, 57639U, 5976U, 171778U, 62128U, 6485U, |
| 62381 | 141414U, 176482U, 28167U, 2367U, 6108U, 171988U, 2505U, 6584U, |
| 62382 | 142090U, 177112U, 28281U, 58615U, 174245U, 63109U, 152213U, 188124U, |
| 62383 | 29229U, 24105U, 17006U, 172550U, 142932U, 15730U, 177933U, 16528U, |
| 62384 | 28777U, 171862U, 141566U, 15498U, 176624U, 16296U, 28192U, 172085U, |
| 62385 | 142228U, 15614U, 177275U, 16412U, 28323U, 21494U, 3292U, 4992U, |
| 62386 | 483U, 7501U, 7578U, 7975U, 17151U, 25395U, 21781U, 25842U, |
| 62387 | 21789U, 21807U, 39701U, 25203U, 21855U, 7496U, 164754U, 164929U, |
| 62388 | 7582U, 142934U, 15732U, 177935U, 16530U, 141568U, 15500U, 176626U, |
| 62389 | 16298U, 142230U, 15616U, 177277U, 16414U, 21433U, 3207U, 4907U, |
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| 62394 | 31237U, 3968U, 31254U, 5279U, 1744U, 5800U, 1698U, 3917U, |
| 62395 | 62U, 877U, 5259U, 3497U, 1613U, 5151U, 3820U, 5791U, |
| 62396 | 5750U, 31288U, 5708U, 31276U, 1418U, 3999U, 5463U, 57888U, |
| 62397 | 6241U, 172484U, 62408U, 6684U, 142818U, 177829U, 28753U, 2191U, |
| 62398 | 57640U, 5977U, 171779U, 62129U, 6486U, 141415U, 176483U, 28168U, |
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| 62400 | 28282U, 5885U, 58616U, 6343U, 174246U, 63110U, 6768U, 152214U, |
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| 62402 | 61024U, 65889U, 7418U, 60885U, 203552U, 65750U, 203655U, 22923U, |
| 62403 | 24154U, 61034U, 203566U, 65899U, 203669U, 31219U, 7234U, 142740U, |
| 62404 | 177783U, 141236U, 176345U, 141854U, 176924U, 7246U, 152202U, 188107U, |
| 62405 | 153642U, 205245U, 189621U, 208322U, 155770U, 205468U, 191839U, 208545U, |
| 62406 | 164619U, 168490U, 168459U, 164609U, 3377U, 5077U, 521U, 3430U, |
| 62407 | 5141U, 533U, 7969U, 23713U, 5503U, 32881U, 2814U, 32670U, |
| 62408 | 7018U, 33707U, 5616U, 32898U, 3364U, 32687U, 7106U, 33739U, |
| 62409 | 4674U, 32828U, 7029U, 33723U, 5064U, 32845U, 7117U, 33755U, |
| 62410 | 39379U, 57953U, 172540U, 62456U, 177915U, 57705U, 171852U, 62201U, |
| 62411 | 176597U, 2407U, 172075U, 2526U, 177256U, 58674U, 174276U, 63152U, |
| 62412 | 188139U, 153186U, 189191U, 155342U, 191461U, 154552U, 190689U, 155245U, |
| 62413 | 191409U, 154577U, 190728U, 153198U, 189203U, 141900U, 204981U, 176970U, |
| 62414 | 208058U, 154320U, 205342U, 190419U, 208419U, 155682U, 205409U, 191764U, |
| 62415 | 208486U, 153558U, 205186U, 189537U, 208263U, 155694U, 205425U, 191788U, |
| 62416 | 208502U, 153544U, 205168U, 189523U, 208245U, 155668U, 205391U, 191750U, |
| 62417 | 208468U, 153570U, 205202U, 189549U, 208279U, 141929U, 205018U, 176999U, |
| 62418 | 208095U, 154345U, 205375U, 190444U, 208452U, 154539U, 190676U, 154564U, |
| 62419 | 190715U, 141885U, 204962U, 176955U, 208039U, 154307U, 205325U, 190406U, |
| 62420 | 208402U, 141914U, 204999U, 176984U, 208076U, 154332U, 205358U, 190431U, |
| 62421 | 208435U, 16727U, 16878U, 7198U, 24722U, 39283U, 134044U, 36444U, |
| 62422 | 15344U, 19976U, 12474U, 165024U, 37727U, 15884U, 20657U, 12892U, |
| 62423 | 201538U, 133263U, 36296U, 15264U, 19872U, 12396U, 164670U, 37579U, |
| 62424 | 15804U, 20553U, 12814U, 201516U, 133689U, 36370U, 15304U, 19924U, |
| 62425 | 12435U, 164843U, 37653U, 15844U, 20605U, 12853U, 137130U, 36518U, |
| 62426 | 15384U, 20028U, 12513U, 167939U, 37801U, 15924U, 20709U, 12931U, |
| 62427 | 134319U, 36506U, 20018U, 165142U, 37789U, 20699U, 133597U, 36358U, |
| 62428 | 19914U, 164810U, 37641U, 20595U, 133952U, 36432U, 19966U, 165002U, |
| 62429 | 37715U, 20647U, 137167U, 36575U, 20066U, 167971U, 37858U, 20747U, |
| 62430 | 153455U, 189426U, 155627U, 191722U, 133340U, 133777U, 134141U, 133416U, |
| 62431 | 752U, 164641U, 133654U, 134009U, 2899U, 2661U, 4484U, 3002U, |
| 62432 | 4739U, 280U, 2750U, 4573U, 126U, 686U, 153746U, 205299U, |
| 62433 | 189713U, 208376U, 155823U, 205522U, 191892U, 208599U, 133359U, 133795U, |
| 62434 | 134152U, 133427U, 764U, 164652U, 3320U, 133674U, 5020U, 134029U, |
| 62435 | 2937U, 511U, 2685U, 4508U, 3016U, 4753U, 294U, 2764U, |
| 62436 | 4587U, 140U, 697U, 60866U, 65731U, 61015U, 65880U, 39389U, |
| 62437 | 1982U, 4190U, 23633U, 3878U, 3329U, 5029U, 3347U, 5047U, |
| 62438 | 164565U, 24874U, 26076U, 31046U, 5761U, 5719U, 1726U, 3960U, |
| 62439 | 5216U, 1539U, 32412U, 3685U, 32770U, 5318U, 1783U, 32441U, |
| 62440 | 4009U, 32799U, 24337U, 25197U, 26100U, 39399U, 174640U, 191677U, |
| 62441 | 24130U, 21826U, 893U, 55366U, 134162U, 55327U, 133437U, 133811U, |
| 62442 | 55377U, 134211U, 55338U, 133494U, 133859U, 137189U, 137797U, 133456U, |
| 62443 | 133830U, 133504U, 133869U, 23987U, 24913U, 24015U, 24880U, 16913U, |
| 62444 | 23852U, 134181U, 133464U, 134221U, 133513U, 24023U, 134326U, 138450U, |
| 62445 | 16731U, 25208U, 3476U, 3506U, 21811U, 31485U, 25471U, 23923U, |
| 62446 | 134335U, 165165U, 138478U, 23184U, 23058U, 23121U, 23205U, 23079U, |
| 62447 | 23142U, 3066U, 167993U, 23163U, 23037U, 23100U, 23405U, 23247U, |
| 62448 | 886U, 23419U, 25608U, 137819U, 137775U, 16919U, 23606U, 24918U, |
| 62449 | 138458U, 39409U, 24579U, 3989U, 17247U, 3767U, 25342U, 31248U, |
| 62450 | 899U, 7547U, 60810U, 65675U, 60792U, 65657U, 152398U, 188320U, |
| 62451 | 39419U, 153280U, 189285U, 155415U, 191534U, 25558U, 25441U, 153241U, |
| 62452 | 189246U, 155376U, 191495U, 134318U, 36505U, 20017U, 165141U, 37788U, |
| 62453 | 20698U, 133596U, 36357U, 19913U, 164809U, 37640U, 20594U, 133951U, |
| 62454 | 36431U, 19965U, 165001U, 37714U, 20646U, 137166U, 36574U, 20065U, |
| 62455 | 167970U, 37857U, 20746U, 134075U, 133312U, 133749U, 3029U, 4766U, |
| 62456 | 307U, 2777U, 4600U, 153U, 2862U, 4637U, 190U, 134173U, |
| 62457 | 36480U, 20006U, 165081U, 37763U, 20687U, 142760U, 37434U, 15707U, |
| 62458 | 20450U, 12733U, 59349U, 6407U, 33199U, 18128U, 35468U, 19490U, |
| 62459 | 177812U, 39069U, 16505U, 21303U, 13371U, 64214U, 6964U, 33691U, |
| 62460 | 18482U, 36125U, 19859U, 133448U, 36332U, 19902U, 164746U, 37615U, |
| 62461 | 20583U, 141339U, 36774U, 15475U, 20146U, 12591U, 59278U, 6359U, |
| 62462 | 33167U, 18100U, 35453U, 19477U, 176448U, 38439U, 16273U, 20999U, |
| 62463 | 13229U, 64143U, 6872U, 33595U, 18398U, 36110U, 19846U, 133822U, |
| 62464 | 36406U, 19954U, 164921U, 37689U, 20635U, 142015U, 37126U, 15591U, |
| 62465 | 20317U, 12662U, 2429U, 32546U, 17874U, 6383U, 33183U, 18114U, |
| 62466 | 177085U, 38776U, 16389U, 21170U, 13300U, 2548U, 32653U, 17941U, |
| 62467 | 6918U, 33643U, 18440U, 137153U, 36551U, 20055U, 167957U, 37834U, |
| 62468 | 20736U, 59359U, 6418U, 64224U, 6975U, 59300U, 6370U, 64165U, |
| 62469 | 6883U, 2441U, 6394U, 2560U, 6929U, 62400U, 177821U, 62121U, |
| 62470 | 176466U, 63103U, 188118U, 134056U, 36456U, 15354U, 19986U, 12487U, |
| 62471 | 165031U, 37739U, 15894U, 20667U, 12905U, 201549U, 133275U, 36308U, |
| 62472 | 15274U, 19882U, 12409U, 164677U, 37591U, 15814U, 20563U, 12827U, |
| 62473 | 201527U, 133701U, 36382U, 15314U, 19934U, 12448U, 164850U, 37665U, |
| 62474 | 15854U, 20615U, 12866U, 137141U, 36529U, 15393U, 20037U, 12525U, |
| 62475 | 167945U, 37812U, 15933U, 20718U, 12943U, 16602U, 24115U, 7407U, |
| 62476 | 155595U, 191690U, 24179U, 21833U, 22912U, 31208U, 25612U, 3558U, |
| 62477 | 23735U, 16713U, 1903U, 4125U, 32814U, 21666U, 1447U, 3581U, |
| 62478 | 1484U, 3621U, 1511U, 3657U, 32740U, 1529U, 3675U, 32755U, |
| 62479 | 25382U, 5404U, 1889U, 4092U, 134200U, 133483U, 133848U, 3053U, |
| 62480 | 4790U, 331U, 2801U, 4624U, 177U, 2924U, 4661U, 214U, |
| 62481 | 134084U, 133350U, 134190U, 133473U, 133838U, 3041U, 4778U, 319U, |
| 62482 | 2789U, 4612U, 165U, 2912U, 4649U, 202U, 55292U, 955U, |
| 62483 | 3537U, 5160U, 39739U, 39733U, 134214U, 25760U, 165089U, 25823U, |
| 62484 | 133497U, 25718U, 164773U, 25781U, 133862U, 25739U, 31642U, 164957U, |
| 62485 | 25802U, 31653U, 55348U, 961U, 3552U, 5175U, 39744U, 188202U, |
| 62486 | 188974U, 190750U, 192261U, 188231U, 189003U, 188332U, 189130U, 191027U, |
| 62487 | 192471U, 190869U, 192290U, 21884U, 90735U, 36140U, 140988U, 36598U, |
| 62488 | 171644U, 37895U, 93693U, 36192U, 111402U, 36244U, 90743U, 36153U, |
| 62489 | 140996U, 36611U, 171652U, 37908U, 93701U, 36205U, 111410U, 36257U, |
| 62490 | 90751U, 36166U, 141004U, 36624U, 171660U, 37921U, 93709U, 36218U, |
| 62491 | 111418U, 36270U, 90759U, 36179U, 141012U, 36637U, 171668U, 37934U, |
| 62492 | 93717U, 36231U, 111426U, 36283U, 188605U, 189797U, 191102U, 192902U, |
| 62493 | 188389U, 189478U, 191047U, 188646U, 189838U, 191143U, 192943U, 192538U, |
| 62494 | 63168U, 63291U, 63448U, 63639U, 63188U, 63334U, 63468U, 63659U, |
| 62495 | 188637U, 189829U, 191134U, 192934U, 192118U, 190819U, 190019U, 188396U, |
| 62496 | 189485U, 191054U, 192545U, 188405U, 189494U, 191063U, 192554U, 17382U, |
| 62497 | 142826U, 177837U, 141423U, 176491U, 142112U, 177134U, 5240U, 7233U, |
| 62498 | 1584U, 3791U, 5781U, 7245U, 155917U, 24661U, 142850U, 141475U, |
| 62499 | 21576U, 33825U, 543U, 871U, 133313U, 133750U, 133222U, 1429U, |
| 62500 | 3563U, 44U, 1438U, 3572U, 53U, 133624U, 4601U, 154U, |
| 62501 | 133979U, 191U, 133249U, 190165U, 165017U, 164663U, 164825U, 164836U, |
| 62502 | 17229U, 3750U, 142869U, 141494U, 16767U, 142877U, 141502U, 142164U, |
| 62503 | 134263U, 133557U, 133912U, 142885U, 141510U, 142172U, 134279U, 133573U, |
| 62504 | 133928U, 134243U, 165110U, 134295U, 165118U, 7266U, 3603U, 134345U, |
| 62505 | 165149U, 39646U, 57837U, 6212U, 172438U, 57578U, 5948U, 171733U, |
| 62506 | 2337U, 6080U, 171930U, 58570U, 174221U, 57850U, 6226U, 172451U, |
| 62507 | 57591U, 5962U, 171755U, 2352U, 6094U, 171952U, 58582U, 174233U, |
| 62508 | 134063U, 133282U, 133708U, 142769U, 141348U, 142024U, 134231U, 133533U, |
| 62509 | 133888U, 142785U, 141364U, 142040U, 134251U, 133545U, 133900U, 142801U, |
| 62510 | 141380U, 142056U, 134039U, 133258U, 133684U, 137125U, 134051U, 133270U, |
| 62511 | 133696U, 137136U, 57941U, 6264U, 172505U, 57693U, 6000U, 171817U, |
| 62512 | 2393U, 6132U, 172040U, 58663U, 174265U, 39356U, 57816U, 6180U, |
| 62513 | 172409U, 57557U, 5916U, 171684U, 2312U, 6048U, 171881U, 58551U, |
| 62514 | 174202U, 57928U, 6250U, 172492U, 57680U, 5986U, 171804U, 2378U, |
| 62515 | 6118U, 172027U, 58651U, 174253U, 7401U, 22906U, 24142U, 31202U, |
| 62516 | 23944U, 17000U, 16980U, 5411U, 1896U, 4099U, 5251U, 1605U, |
| 62517 | 3812U, 142752U, 177804U, 141331U, 176440U, 142007U, 177077U, 142893U, |
| 62518 | 141518U, 142180U, 137833U, 168537U, 59288U, 64153U, 59324U, 64189U, |
| 62519 | 59266U, 64131U, 59312U, 64177U, 5208U, 1503U, 3649U, 5774U, |
| 62520 | 142912U, 37477U, 20487U, 177895U, 39112U, 21340U, 141537U, 36874U, |
| 62521 | 20220U, 176577U, 38539U, 21073U, 142199U, 37226U, 20391U, 177236U, |
| 62522 | 38876U, 21244U, 26083U, 4146U, 7725U, 17011U, 153270U, 189275U, |
| 62523 | 155405U, 191524U, 153622U, 189601U, 155725U, 191819U, 153477U, 189435U, |
| 62524 | 155649U, 191731U, 153765U, 205312U, 189732U, 208389U, 155841U, 205535U, |
| 62525 | 191910U, 208612U, 16774U, 153260U, 189265U, 155395U, 191514U, 153612U, |
| 62526 | 189591U, 155715U, 191809U, 153396U, 189380U, 155556U, 191651U, 153672U, |
| 62527 | 205286U, 189651U, 208363U, 155799U, 205509U, 191868U, 208586U, 154233U, |
| 62528 | 190315U, 153157U, 189162U, 155313U, 191432U, 154264U, 190346U, 154217U, |
| 62529 | 190299U, 154248U, 190330U, 24886U, 24187U, 3945U, 172108U, 177354U, |
| 62530 | 201167U, 171965U, 141811U, 176881U, 142293U, 177373U, 190584U, 190568U, |
| 62531 | 174561U, 190700U, 177142U, 171997U, 142099U, 177121U, 28294U, 152477U, |
| 62532 | 188442U, 153590U, 189569U, 156455U, 192617U, 156204U, 192310U, 152730U, |
| 62533 | 188723U, 152757U, 188750U, 152332U, 188219U, 152990U, 188991U, 154608U, |
| 62534 | 190767U, 152522U, 188487U, 156579U, 192741U, 152581U, 188546U, 156678U, |
| 62535 | 192840U, 156180U, 192278U, 60976U, 65841U, 154398U, 190497U, 153123U, |
| 62536 | 189119U, 152376U, 188271U, 156248U, 192354U, 152444U, 188375U, 153506U, |
| 62537 | 189464U, 156399U, 192514U, 152626U, 188591U, 153803U, 189783U, 156726U, |
| 62538 | 192888U, 192595U, 152968U, 188961U, 156555U, 192717U, 156158U, 192248U, |
| 62539 | 152892U, 188885U, 156507U, 192669U, 156090U, 192180U, 156433U, 192572U, |
| 62540 | 156480U, 192642U, 153981U, 189976U, 156702U, 192864U, 152705U, 188698U, |
| 62541 | 156602U, 192764U, 152674U, 188667U, 188295U, 156627U, 192789U, 156775U, |
| 62542 | 192965U, 156270U, 192376U, 156331U, 192437U, 154763U, 190928U, 155055U, |
| 62543 | 191265U, 155986U, 192065U, 152354U, 188249U, 58863U, 63562U, 152420U, |
| 62544 | 188351U, 153144U, 189149U, 156375U, 192490U, 63258U, 153072U, 189068U, |
| 62545 | 63415U, 154829U, 190994U, 63606U, 156309U, 192415U, 63227U, 152847U, |
| 62546 | 188840U, 63550U, 155953U, 192032U, 63279U, 153103U, 189099U, 63436U, |
| 62547 | 154850U, 191015U, 63627U, 156353U, 192459U, 152311U, 188190U, 152914U, |
| 62548 | 188907U, 154502U, 190639U, 152499U, 188464U, 156531U, 192693U, 152556U, |
| 62549 | 188521U, 156653U, 192815U, 156112U, 192202U, 156023U, 192102U, 154644U, |
| 62550 | 190803U, 154008U, 190003U, 156052U, 192142U, 154673U, 190843U, 154037U, |
| 62551 | 190043U, 155073U, 191283U, 201181U, 201208U, 201194U, 201221U, 23007U, |
| 62552 | 5597U, 3134U, 4834U, 57963U, 172553U, 201381U, 39838U, 39770U, |
| 62553 | 39809U, 62466U, 201425U, 142935U, 177936U, 28780U, 201405U, 164542U, |
| 62554 | 201373U, 5587U, 3114U, 4814U, 171580U, 171596U, 57715U, 171865U, |
| 62555 | 39828U, 39750U, 39789U, 55157U, 55196U, 62211U, 201413U, 141569U, |
| 62556 | 176627U, 28195U, 201389U, 201357U, 3124U, 4824U, 171588U, 171604U, |
| 62557 | 2419U, 172088U, 39760U, 39799U, 55165U, 55204U, 62319U, 2538U, |
| 62558 | 142231U, 177278U, 28326U, 201397U, 201365U, 154293U, 190392U, 189760U, |
| 62559 | 5607U, 3144U, 4844U, 58683U, 174285U, 31573U, 39848U, 39780U, |
| 62560 | 39819U, 63161U, 201437U, 152228U, 31560U, 188155U, 31599U, 29252U, |
| 62561 | 174371U, 153210U, 189215U, 29360U, 174610U, 155354U, 191473U, 29470U, |
| 62562 | 172464U, 38230U, 142706U, 37419U, 177749U, 28738U, 171768U, 38014U, |
| 62563 | 141206U, 36715U, 176315U, 28153U, 171978U, 38123U, 141824U, 37067U, |
| 62564 | 176894U, 28267U, 154427U, 190534U, 154205U, 190287U, 191776U, 5196U, |
| 62565 | 1472U, 32395U, 3591U, 32723U, 1595U, 32426U, 3802U, 32784U, |
| 62566 | 174293U, 152284U, 188163U, 29264U, 174696U, 155926U, 191994U, 29511U, |
| 62567 | 191597U, 174381U, 153333U, 174620U, 155493U, 191574U, 174391U, 153376U, |
| 62568 | 174630U, 155536U, 189325U, 191585U, 152272U, 174532U, 172096U, 174513U, |
| 62569 | 174401U, 174653U, 16672U, 25124U, 164684U, 174488U, 190262U, 174501U, |
| 62570 | 190362U, 172128U, 177404U, 154280U, 7430U, 174445U, 153755U, 201449U, |
| 62571 | 189722U, 29388U, 177391U, 154438U, 190545U, 22935U, 154450U, 190557U, |
| 62572 | 24173U, 190275U, 174687U, 155832U, 201462U, 191901U, 29498U, 31231U, |
| 62573 | 5563U, 3102U, 7084U, 5676U, 3464U, 7172U, 5515U, 3078U, |
| 62574 | 7040U, 31492U, 5628U, 3440U, 7128U, 31526U, 5539U, 3090U, |
| 62575 | 7062U, 5652U, 3452U, 7150U, 174412U, 153445U, 189416U, 29374U, |
| 62576 | 174664U, 155617U, 191712U, 29484U, 190375U, 5575U, 7095U, 5688U, |
| 62577 | 7183U, 5527U, 7051U, 31509U, 5640U, 7139U, 31543U, 5551U, |
| 62578 | 7073U, 5664U, 7161U, 61044U, 65909U, 134174U, 36481U, 20007U, |
| 62579 | 165082U, 37764U, 20688U, 133449U, 36333U, 19903U, 164747U, 37616U, |
| 62580 | 20584U, 133823U, 36407U, 19955U, 164922U, 37690U, 20636U, 137154U, |
| 62581 | 36552U, 20056U, 167958U, 37835U, 20737U, 153367U, 189361U, 155527U, |
| 62582 | 191632U, 153662U, 205273U, 189641U, 208350U, 155790U, 205496U, 191859U, |
| 62583 | 208573U, 154159U, 190179U, 141595U, 36946U, 176653U, 38611U, 154169U, |
| 62584 | 190189U, 142257U, 37298U, 177318U, 38948U, 133321U, 133758U, 134120U, |
| 62585 | 133395U, 729U, 164599U, 3242U, 133633U, 4942U, 133988U, 2874U, |
| 62586 | 433U, 2636U, 4459U, 2975U, 4712U, 253U, 2723U, 4546U, |
| 62587 | 99U, 665U, 201294U, 191938U, 134093U, 36468U, 15364U, 19996U, |
| 62588 | 12500U, 165058U, 37751U, 15904U, 20677U, 12918U, 133368U, 36320U, |
| 62589 | 15284U, 19892U, 12422U, 164723U, 37603U, 15824U, 20573U, 12840U, |
| 62590 | 133804U, 36394U, 15324U, 19944U, 12461U, 164898U, 37677U, 15864U, |
| 62591 | 20625U, 12879U, 137147U, 36540U, 15402U, 20046U, 12537U, 167951U, |
| 62592 | 37823U, 15942U, 20727U, 12955U, 23949U, 22894U, 168473U, 24109U, |
| 62593 | 168524U, 31190U, 169038U, 134311U, 36493U, 15374U, 165134U, 37776U, |
| 62594 | 15914U, 133589U, 36345U, 15294U, 164802U, 37628U, 15834U, 133944U, |
| 62595 | 36419U, 15334U, 164994U, 37702U, 15874U, 137160U, 36563U, 15411U, |
| 62596 | 167964U, 37846U, 15951U, 5473U, 57921U, 6256U, 33154U, 9087U, |
| 62597 | 18089U, 10326U, 35272U, 14620U, 19366U, 11813U, 172498U, 38246U, |
| 62598 | 16148U, 20878U, 13122U, 62441U, 6694U, 33454U, 9303U, 18275U, |
| 62599 | 10506U, 35915U, 15113U, 19735U, 12252U, 142835U, 37449U, 15720U, |
| 62600 | 20463U, 12749U, 177846U, 39084U, 27363U, 16518U, 26739U, 21316U, |
| 62601 | 13387U, 26398U, 27003U, 28766U, 2201U, 57673U, 5992U, 55182U, |
| 62602 | 32986U, 8943U, 17993U, 10206U, 34984U, 14400U, 19212U, 11617U, |
| 62603 | 171788U, 38030U, 16016U, 20790U, 13010U, 62162U, 6496U, 33286U, |
| 62604 | 9159U, 18179U, 10386U, 35627U, 14893U, 19581U, 12056U, 141432U, |
| 62605 | 36817U, 15488U, 20171U, 12607U, 176500U, 38482U, 27159U, 16286U, |
| 62606 | 26559U, 21024U, 13245U, 26254U, 26883U, 28181U, 2284U, 2384U, |
| 62607 | 32532U, 8792U, 17862U, 10081U, 6124U, 33070U, 9015U, 18041U, |
| 62608 | 10266U, 172011U, 38139U, 16082U, 20834U, 13066U, 2517U, 32639U, |
| 62609 | 8870U, 17929U, 10145U, 6595U, 33370U, 9231U, 18227U, 10446U, |
| 62610 | 142121U, 37169U, 15604U, 20342U, 12678U, 177159U, 38819U, 27261U, |
| 62611 | 16402U, 26649U, 21195U, 13316U, 26326U, 26943U, 28312U, 5893U, |
| 62612 | 58645U, 6352U, 35430U, 14752U, 19458U, 11932U, 174259U, 38319U, |
| 62613 | 16209U, 20919U, 13175U, 63139U, 6777U, 36073U, 15245U, 19827U, |
| 62614 | 12371U, 152222U, 37568U, 15795U, 20544U, 12802U, 188133U, 39203U, |
| 62615 | 27460U, 16593U, 26824U, 21397U, 13440U, 26467U, 27060U, 29242U, |
| 62616 | 153418U, 189389U, 155578U, 191660U, 171620U, 177925U, 171612U, 176607U, |
| 62617 | 171628U, 188148U, 7424U, 22929U, 31225U, 152469U, 188434U, 153582U, |
| 62618 | 189561U, 156447U, 192609U, 156193U, 192299U, 152719U, 188712U, 156220U, |
| 62619 | 192326U, 152746U, 188739U, 152324U, 188211U, 152982U, 188983U, 154600U, |
| 62620 | 190759U, 152513U, 188478U, 156570U, 192732U, 152571U, 188536U, 156668U, |
| 62621 | 192830U, 156172U, 192270U, 60965U, 65830U, 154390U, 190489U, 153116U, |
| 62622 | 189112U, 17135U, 152368U, 188263U, 152595U, 188560U, 156240U, 192346U, |
| 62623 | 775U, 819U, 61056U, 65921U, 7388U, 60951U, 65816U, 152434U, |
| 62624 | 188365U, 153496U, 189454U, 154863U, 191037U, 156389U, 192504U, 60895U, |
| 62625 | 65760U, 60923U, 65788U, 152616U, 188581U, 153793U, 189773U, 154897U, |
| 62626 | 191092U, 156716U, 192878U, 60909U, 65774U, 60937U, 65802U, 21630U, |
| 62627 | 141405U, 36802U, 176473U, 38467U, 142081U, 37154U, 177103U, 38804U, |
| 62628 | 141557U, 36904U, 176615U, 38569U, 142219U, 37256U, 177266U, 38906U, |
| 62629 | 174321U, 188424U, 174435U, 189513U, 174552U, 191082U, 174724U, 192586U, |
| 62630 | 29551U, 153046U, 189042U, 156283U, 192389U, 152772U, 188765U, 152950U, |
| 62631 | 188943U, 154801U, 190966U, 154137U, 190143U, 155859U, 191928U, 156854U, |
| 62632 | 193036U, 154410U, 190509U, 154381U, 190480U, 152780U, 188773U, 152789U, |
| 62633 | 188782U, 141112U, 176202U, 141692U, 176779U, 154418U, 190517U, 141123U, |
| 62634 | 176213U, 155869U, 191946U, 155039U, 191249U, 152687U, 188680U, 152959U, |
| 62635 | 188952U, 156545U, 192707U, 156149U, 192239U, 156800U, 192990U, 152883U, |
| 62636 | 188876U, 156497U, 192659U, 156081U, 192171U, 153038U, 189034U, 156231U, |
| 62637 | 192337U, 152459U, 188414U, 153534U, 189503U, 154887U, 191072U, 156424U, |
| 62638 | 192563U, 156468U, 192630U, 153971U, 189966U, 152606U, 188571U, 153764U, |
| 62639 | 189731U, 156693U, 192855U, 152696U, 188689U, 153896U, 189904U, 156814U, |
| 62640 | 193004U, 152536U, 188501U, 153671U, 189650U, 156593U, 192755U, 152665U, |
| 62641 | 188658U, 153842U, 189850U, 156790U, 192980U, 188284U, 152927U, 188920U, |
| 62642 | 154515U, 190652U, 156125U, 192215U, 154778U, 190943U, 154114U, 190120U, |
| 62643 | 155016U, 191226U, 152939U, 188932U, 154527U, 190664U, 156137U, 192227U, |
| 62644 | 154790U, 190955U, 154126U, 190132U, 155028U, 191238U, 154690U, 190860U, |
| 62645 | 156616U, 192778U, 156413U, 192528U, 156765U, 192955U, 156261U, 192367U, |
| 62646 | 153085U, 189081U, 156322U, 192428U, 154753U, 190918U, 165096U, 141068U, |
| 62647 | 176032U, 3513U, 23747U, 164780U, 141030U, 175994U, 164964U, 141049U, |
| 62648 | 176013U, 5189U, 1465U, 142901U, 37461U, 20473U, 177884U, 39096U, |
| 62649 | 21326U, 141526U, 36858U, 20206U, 176566U, 38523U, 21059U, 142188U, |
| 62650 | 37210U, 20377U, 177225U, 38860U, 21230U, 5328U, 1793U, 5345U, |
| 62651 | 1810U, 5233U, 1577U, 3784U, 5362U, 1827U, 4037U, 5379U, |
| 62652 | 1864U, 4074U, 164971U, 5396U, 1881U, 155049U, 191259U, 21709U, |
| 62653 | 633U, 931U, 7221U, 622U, 920U, 3526U, 31173U, 943U, |
| 62654 | 1951U, 4159U, 155977U, 192056U, 152345U, 188240U, 58719U, 63240U, |
| 62655 | 58877U, 63576U, 58888U, 63587U, 152411U, 188342U, 153135U, 189140U, |
| 62656 | 156366U, 192481U, 63387U, 63250U, 153064U, 189060U, 63407U, 154821U, |
| 62657 | 190986U, 63598U, 156301U, 192407U, 21766U, 63219U, 152839U, 188832U, |
| 62658 | 63542U, 155945U, 192024U, 63397U, 63271U, 153095U, 189091U, 63428U, |
| 62659 | 154842U, 191007U, 63619U, 156345U, 192451U, 152303U, 188182U, 152906U, |
| 62660 | 188899U, 154494U, 190631U, 152490U, 188455U, 156522U, 192684U, 152546U, |
| 62661 | 188511U, 156643U, 192805U, 156104U, 192194U, 153219U, 189224U, 24951U, |
| 62662 | 31128U, 24937U, 31113U, 24926U, 16650U, 16693U, 16680U, 16702U, |
| 62663 | 24965U, 155908U, 191985U, 7898U, 907U, 7957U, 23725U, 133720U, |
| 62664 | 164887U, 137766U, 168441U, 156011U, 192090U, 154632U, 190791U, 154700U, |
| 62665 | 190878U, 153996U, 189991U, 156040U, 192130U, 154661U, 190831U, 154714U, |
| 62666 | 190892U, 154025U, 190031U, 55358U, 5827U, 165065U, 141058U, 176022U, |
| 62667 | 3491U, 23740U, 55319U, 5809U, 164730U, 141020U, 175984U, 2264U, |
| 62668 | 5818U, 164905U, 141039U, 176003U, 5181U, 1457U, 5300U, 1765U, |
| 62669 | 5309U, 1774U, 5336U, 1801U, 5225U, 1569U, 3776U, 5353U, |
| 62670 | 1818U, 4028U, 5370U, 1855U, 4065U, 164948U, 5387U, 1872U, |
| 62671 | 1548U, 3738U, 155066U, 191276U, 1088U, 31863U, 8278U, 22051U, |
| 62672 | 34051U, 13620U, 57863U, 35193U, 14553U, 1313U, 32220U, 8579U, |
| 62673 | 22296U, 34436U, 13949U, 62376U, 35836U, 15046U, 976U, 31681U, |
| 62674 | 8124U, 21925U, 33855U, 13452U, 57615U, 34905U, 14333U, 1193U, |
| 62675 | 32038U, 8425U, 22170U, 34240U, 13781U, 62097U, 35548U, 14826U, |
| 62676 | 1032U, 31772U, 8201U, 21988U, 33953U, 13536U, 57743U, 35023U, |
| 62677 | 14421U, 1257U, 32129U, 8502U, 22233U, 34338U, 13865U, 62239U, |
| 62678 | 35666U, 14914U, 1144U, 31954U, 8355U, 22114U, 34149U, 13704U, |
| 62679 | 58594U, 35357U, 14691U, 1369U, 32311U, 8656U, 22359U, 34534U, |
| 62680 | 14033U, 63082U, 36000U, 15184U, 138164U, 168801U, 138415U, 204161U, |
| 62681 | 168990U, 207106U, 1120U, 31915U, 8322U, 22087U, 34107U, 13668U, |
| 62682 | 57904U, 35245U, 14597U, 1345U, 32272U, 8623U, 22332U, 34492U, |
| 62683 | 13997U, 62424U, 35888U, 15090U, 1008U, 31733U, 8168U, 21961U, |
| 62684 | 33911U, 13500U, 57656U, 34957U, 14377U, 1225U, 32090U, 8469U, |
| 62685 | 22206U, 34296U, 13829U, 62145U, 35600U, 14870U, 1064U, 31824U, |
| 62686 | 8245U, 22024U, 34009U, 13584U, 57775U, 35075U, 14465U, 1289U, |
| 62687 | 32181U, 8546U, 22269U, 34394U, 13913U, 62271U, 35718U, 14958U, |
| 62688 | 1172U, 32002U, 8395U, 22146U, 34201U, 13748U, 58630U, 35405U, |
| 62689 | 14731U, 1397U, 32359U, 8696U, 22391U, 34586U, 14077U, 63124U, |
| 62690 | 36048U, 15224U, 17073U, 3694U, 17091U, 3716U, 24678U, 25972U, |
| 62691 | 1521U, 3667U, 169016U, 7586U, 26094U, 165048U, 164713U, 164877U, |
| 62692 | 165038U, 164703U, 164867U, 16610U, 24123U, 7681U, 23845U, 39311U, |
| 62693 | 2009U, 4217U, 2035U, 4243U, 2085U, 4302U, 2111U, 4328U, |
| 62694 | 39368U, 1996U, 4204U, 2022U, 4230U, 2072U, 4289U, 2098U, |
| 62695 | 4315U, 25377U, 5405U, 1890U, 4093U, 5252U, 1606U, 3813U, |
| 62696 | 39270U, 26007U, 39670U, 17141U, 1104U, 31889U, 8300U, 17513U, |
| 62697 | 9636U, 22069U, 34079U, 13644U, 18628U, 10889U, 57879U, 35219U, |
| 62698 | 14575U, 19332U, 11770U, 1329U, 32246U, 8601U, 17728U, 9911U, |
| 62699 | 22314U, 34464U, 13973U, 18863U, 11184U, 62392U, 35862U, 15068U, |
| 62700 | 19701U, 12209U, 992U, 31707U, 8146U, 17403U, 9496U, 21943U, |
| 62701 | 33883U, 13476U, 18508U, 10739U, 57631U, 34931U, 14355U, 19178U, |
| 62702 | 11574U, 1209U, 32064U, 8447U, 17618U, 9771U, 22188U, 34268U, |
| 62703 | 13805U, 18743U, 11034U, 62113U, 35574U, 14848U, 19547U, 12013U, |
| 62704 | 1048U, 31798U, 8223U, 17458U, 9566U, 22006U, 33981U, 13560U, |
| 62705 | 18568U, 10814U, 57759U, 35049U, 14443U, 19244U, 11658U, 1273U, |
| 62706 | 32155U, 8524U, 17673U, 9841U, 22251U, 34366U, 13889U, 18803U, |
| 62707 | 11109U, 62255U, 35692U, 14936U, 19613U, 12097U, 1158U, 31978U, |
| 62708 | 8375U, 17567U, 9705U, 22130U, 34175U, 13726U, 18687U, 10963U, |
| 62709 | 58608U, 35381U, 14711U, 19427U, 11892U, 1383U, 32335U, 8676U, |
| 62710 | 17782U, 9980U, 22375U, 34560U, 14055U, 18922U, 11258U, 63096U, |
| 62711 | 36024U, 15204U, 19796U, 12331U, 1136U, 31941U, 8344U, 17546U, |
| 62712 | 9678U, 22105U, 34135U, 13692U, 18664U, 10934U, 57920U, 35271U, |
| 62713 | 14619U, 19365U, 11812U, 1361U, 32298U, 8645U, 17761U, 9953U, |
| 62714 | 22350U, 34520U, 14021U, 18899U, 11229U, 62440U, 35914U, 15112U, |
| 62715 | 19734U, 12251U, 1024U, 31759U, 8190U, 17436U, 9538U, 21979U, |
| 62716 | 33939U, 13524U, 18544U, 10784U, 57672U, 34983U, 14399U, 19211U, |
| 62717 | 11616U, 1241U, 32116U, 8491U, 17651U, 9813U, 22224U, 34324U, |
| 62718 | 13853U, 18779U, 11079U, 62161U, 35626U, 14892U, 19580U, 12055U, |
| 62719 | 1080U, 31850U, 8267U, 17491U, 9608U, 22042U, 34037U, 13608U, |
| 62720 | 18604U, 10859U, 57791U, 35101U, 14487U, 19277U, 11700U, 1305U, |
| 62721 | 32207U, 8568U, 17706U, 9883U, 22287U, 34422U, 13937U, 18839U, |
| 62722 | 11154U, 62287U, 35744U, 14980U, 19646U, 12139U, 1186U, 32026U, |
| 62723 | 8415U, 17597U, 9744U, 22162U, 34227U, 13770U, 18720U, 11005U, |
| 62724 | 58644U, 35429U, 14751U, 19457U, 11931U, 1411U, 32383U, 8716U, |
| 62725 | 17812U, 10019U, 22407U, 34612U, 14099U, 18955U, 11300U, 63138U, |
| 62726 | 36072U, 15244U, 19826U, 12370U, 57723U, 35009U, 62219U, 35652U, |
| 62727 | 57799U, 35114U, 62327U, 35757U, 58738U, 63312U, 58830U, 63508U, |
| 62728 | 58761U, 203522U, 63346U, 203625U, 58853U, 203537U, 63531U, 203640U, |
| 62729 | 23309U, 138234U, 168809U, 138423U, 204173U, 168998U, 207118U, 23994U, |
| 62730 | 17387U, 7573U, 1112U, 31902U, 8311U, 17524U, 9650U, 22078U, |
| 62731 | 34093U, 13656U, 18640U, 10904U, 57896U, 35232U, 14586U, 19343U, |
| 62732 | 11784U, 1337U, 32259U, 8612U, 17739U, 9925U, 22323U, 34478U, |
| 62733 | 13985U, 18875U, 11199U, 62416U, 35875U, 15079U, 19712U, 12223U, |
| 62734 | 1000U, 31720U, 8157U, 17414U, 9510U, 21952U, 33897U, 13488U, |
| 62735 | 18520U, 10754U, 57648U, 34944U, 14366U, 19189U, 11588U, 1217U, |
| 62736 | 32077U, 8458U, 17629U, 9785U, 22197U, 34282U, 13817U, 18755U, |
| 62737 | 11049U, 62137U, 35587U, 14859U, 19558U, 12027U, 1056U, 31811U, |
| 62738 | 8234U, 17469U, 9580U, 22015U, 33995U, 13572U, 18580U, 10829U, |
| 62739 | 57767U, 35062U, 14454U, 19255U, 11672U, 1281U, 32168U, 8535U, |
| 62740 | 17684U, 9855U, 22260U, 34380U, 13901U, 18815U, 11124U, 62263U, |
| 62741 | 35705U, 14947U, 19624U, 12111U, 1165U, 31990U, 8385U, 17577U, |
| 62742 | 9718U, 22138U, 34188U, 13737U, 18698U, 10977U, 58623U, 35393U, |
| 62743 | 14721U, 19437U, 11905U, 1390U, 32347U, 8686U, 17792U, 9993U, |
| 62744 | 22383U, 34573U, 14066U, 18933U, 11272U, 63117U, 36036U, 15214U, |
| 62745 | 19806U, 12344U, 141613U, 36974U, 176671U, 38639U, 142275U, 37326U, |
| 62746 | 177336U, 38976U, 24003U, 5418U, 57808U, 6171U, 33083U, 9026U, |
| 62747 | 35128U, 14498U, 172401U, 38165U, 16092U, 62336U, 6629U, 33383U, |
| 62748 | 9242U, 35771U, 14991U, 142665U, 37354U, 15652U, 177700U, 39004U, |
| 62749 | 27277U, 16450U, 26663U, 28678U, 2146U, 57549U, 5907U, 32915U, |
| 62750 | 8882U, 34840U, 14278U, 171676U, 37947U, 15960U, 62046U, 6431U, |
| 62751 | 33215U, 9098U, 35483U, 14771U, 141134U, 36650U, 15420U, 176224U, |
| 62752 | 38330U, 27073U, 16218U, 26483U, 28093U, 2219U, 2302U, 32456U, |
| 62753 | 8726U, 6039U, 32999U, 8954U, 171873U, 38056U, 16026U, 2455U, |
| 62754 | 32563U, 8804U, 6530U, 33299U, 9170U, 141739U, 37002U, 15536U, |
| 62755 | 176790U, 38667U, 27175U, 16334U, 26573U, 28207U, 5836U, 58544U, |
| 62756 | 6303U, 35297U, 14641U, 174195U, 38258U, 16158U, 63047U, 6728U, |
| 62757 | 35940U, 15134U, 152166U, 37507U, 15744U, 188071U, 39142U, 27379U, |
| 62758 | 16542U, 26753U, 29174U, 7395U, 22900U, 24136U, 31196U, 22752U, |
| 62759 | 24976U, 25387U, 1968U, 4176U, 21817U, 17289U, 137173U, 36586U, |
| 62760 | 167977U, 37869U, 39710U, 137180U, 167984U, 16781U, 134271U, 133565U, |
| 62761 | 133920U, 141077U, 176153U, 141631U, 176689U, 154147U, 190153U, 59336U, |
| 62762 | 64201U, 141099U, 176189U, 141653U, 176725U, 141678U, 176765U, 1096U, |
| 62763 | 31876U, 8289U, 17502U, 9622U, 22060U, 34065U, 13632U, 18616U, |
| 62764 | 10874U, 57871U, 35206U, 14564U, 19321U, 11756U, 1321U, 32233U, |
| 62765 | 8590U, 17717U, 9897U, 22305U, 34450U, 13961U, 18851U, 11169U, |
| 62766 | 62384U, 35849U, 15057U, 19690U, 12195U, 984U, 31694U, 8135U, |
| 62767 | 17392U, 9482U, 21934U, 33869U, 13464U, 18496U, 10724U, 57623U, |
| 62768 | 34918U, 14344U, 19167U, 11560U, 1201U, 32051U, 8436U, 17607U, |
| 62769 | 9757U, 22179U, 34254U, 13793U, 18731U, 11019U, 62105U, 35561U, |
| 62770 | 14837U, 19536U, 11999U, 1040U, 31785U, 8212U, 17447U, 9552U, |
| 62771 | 21997U, 33967U, 13548U, 18556U, 10799U, 57751U, 35036U, 14432U, |
| 62772 | 19233U, 11644U, 1265U, 32142U, 8513U, 17662U, 9827U, 22242U, |
| 62773 | 34352U, 13877U, 18791U, 11094U, 62247U, 35679U, 14925U, 19602U, |
| 62774 | 12083U, 1151U, 31966U, 8365U, 17557U, 9692U, 22122U, 34162U, |
| 62775 | 13715U, 18676U, 10949U, 58601U, 35369U, 14701U, 19417U, 11879U, |
| 62776 | 1376U, 32323U, 8666U, 17772U, 9967U, 22367U, 34547U, 14044U, |
| 62777 | 18911U, 11244U, 63089U, 36012U, 15194U, 19786U, 12318U, 22459U, |
| 62778 | 34689U, 14166U, 19022U, 11382U, 6828U, 33531U, 9370U, 18342U, |
| 62779 | 10588U, 22525U, 34785U, 14250U, 19106U, 11484U, 6942U, 33659U, |
| 62780 | 9454U, 18454U, 10690U, 22415U, 34625U, 14110U, 18966U, 11314U, |
| 62781 | 6784U, 33467U, 9314U, 18286U, 10520U, 22481U, 34721U, 14194U, |
| 62782 | 19050U, 11416U, 6850U, 33563U, 9398U, 18370U, 10622U, 22437U, |
| 62783 | 34657U, 14138U, 18994U, 11348U, 6806U, 33499U, 9342U, 18314U, |
| 62784 | 10554U, 22503U, 34753U, 14222U, 19078U, 11450U, 6896U, 33611U, |
| 62785 | 9426U, 18412U, 10656U, 141586U, 36932U, 176644U, 38597U, 142248U, |
| 62786 | 37284U, 177309U, 38934U, 1128U, 31928U, 8333U, 17535U, 9664U, |
| 62787 | 22096U, 34121U, 13680U, 18652U, 10919U, 57912U, 35258U, 14608U, |
| 62788 | 19354U, 11798U, 1353U, 32285U, 8634U, 17750U, 9939U, 22341U, |
| 62789 | 34506U, 14009U, 18887U, 11214U, 62432U, 35901U, 15101U, 19723U, |
| 62790 | 12237U, 1016U, 31746U, 8179U, 17425U, 9524U, 21970U, 33925U, |
| 62791 | 13512U, 18532U, 10769U, 57664U, 34970U, 14388U, 19200U, 11602U, |
| 62792 | 1233U, 32103U, 8480U, 17640U, 9799U, 22215U, 34310U, 13841U, |
| 62793 | 18767U, 11064U, 62153U, 35613U, 14881U, 19569U, 12041U, 1072U, |
| 62794 | 31837U, 8256U, 17480U, 9594U, 22033U, 34023U, 13596U, 18592U, |
| 62795 | 10844U, 57783U, 35088U, 14476U, 19266U, 11686U, 1297U, 32194U, |
| 62796 | 8557U, 17695U, 9869U, 22278U, 34408U, 13925U, 18827U, 11139U, |
| 62797 | 62279U, 35731U, 14969U, 19635U, 12125U, 1179U, 32014U, 8405U, |
| 62798 | 17587U, 9731U, 22154U, 34214U, 13759U, 18709U, 10991U, 58637U, |
| 62799 | 35417U, 14741U, 19447U, 11918U, 1404U, 32371U, 8706U, 17802U, |
| 62800 | 10006U, 22399U, 34599U, 14088U, 18944U, 11286U, 63131U, 36060U, |
| 62801 | 15234U, 19816U, 12357U, 22470U, 34705U, 14180U, 19036U, 11399U, |
| 62802 | 6839U, 33547U, 9384U, 18356U, 10605U, 22536U, 34801U, 14264U, |
| 62803 | 19120U, 11501U, 6953U, 33675U, 9468U, 18468U, 10707U, 22426U, |
| 62804 | 34641U, 14124U, 18980U, 11331U, 6795U, 33483U, 9328U, 18300U, |
| 62805 | 10537U, 22492U, 34737U, 14208U, 19064U, 11433U, 6861U, 33579U, |
| 62806 | 9412U, 18384U, 10639U, 22448U, 34673U, 14152U, 19008U, 11365U, |
| 62807 | 6817U, 33515U, 9356U, 18328U, 10571U, 22514U, 34769U, 14236U, |
| 62808 | 19092U, 11467U, 6907U, 33627U, 9440U, 18426U, 10673U, 141622U, |
| 62809 | 36988U, 176680U, 38653U, 142284U, 37340U, 177345U, 38990U, 60855U, |
| 62810 | 65720U, 61004U, 65869U, 134287U, 133581U, 133936U, 25464U, 134303U, |
| 62811 | 165126U, 164794U, 164986U, 7273U, 3612U, 134353U, 165157U, 164817U, |
| 62812 | 165009U, 137587U, 168262U, 138235U, 168810U, 137758U, 203938U, 168433U, |
| 62813 | 206883U, 138424U, 204174U, 168999U, 207119U, 21500U, 3301U, 5001U, |
| 62814 | 492U, 39429U, 7506U, 21638U, 7687U, 16689U, 21794U, 21851U, |
| 62815 | 24670U, 7412U, 22917U, 24148U, 31213U, 165103U, 164787U, 164979U, |
| 62816 | 137838U, 21586U, 33840U, 21871U, 133351U, 133787U, 133474U, 133839U, |
| 62817 | 133230U, 190525U, 133665U, 134020U, 2913U, 2674U, 4497U, 133523U, |
| 62818 | 133878U, 2826U, 133239U, 2600U, 4423U, 190172U, 5427U, 57821U, |
| 62819 | 6185U, 33097U, 9038U, 18052U, 10280U, 35141U, 14509U, 19288U, |
| 62820 | 11714U, 172414U, 38178U, 16103U, 20844U, 13079U, 62344U, 6638U, |
| 62821 | 33397U, 9254U, 18238U, 10460U, 35784U, 15002U, 19657U, 12153U, |
| 62822 | 142673U, 37367U, 15663U, 20417U, 12691U, 177708U, 39017U, 27294U, |
| 62823 | 16461U, 26678U, 21270U, 13329U, 26343U, 26957U, 28690U, 2155U, |
| 62824 | 57562U, 5921U, 32929U, 8894U, 17956U, 10160U, 34853U, 14289U, |
| 62825 | 19134U, 11518U, 171689U, 37960U, 15971U, 20756U, 12967U, 62054U, |
| 62826 | 6440U, 33229U, 9110U, 18142U, 10340U, 35496U, 14782U, 19503U, |
| 62827 | 11957U, 141142U, 36663U, 15431U, 20075U, 12549U, 176232U, 38343U, |
| 62828 | 27090U, 16229U, 26498U, 20928U, 13187U, 26199U, 26837U, 28105U, |
| 62829 | 2228U, 2317U, 32471U, 8739U, 17822U, 10032U, 6053U, 33013U, |
| 62830 | 8966U, 18004U, 10220U, 171886U, 38069U, 16037U, 20800U, 13023U, |
| 62831 | 2465U, 32578U, 8817U, 17889U, 10096U, 6539U, 33313U, 9182U, |
| 62832 | 18190U, 10400U, 141747U, 37015U, 15547U, 20246U, 12620U, 176798U, |
| 62833 | 38680U, 27192U, 16345U, 26588U, 21099U, 13258U, 26271U, 26897U, |
| 62834 | 28219U, 5843U, 58556U, 6311U, 35309U, 14651U, 19387U, 11840U, |
| 62835 | 174207U, 38270U, 16168U, 20888U, 13135U, 63054U, 6736U, 35952U, |
| 62836 | 15144U, 19756U, 12279U, 152173U, 37519U, 15754U, 20513U, 12762U, |
| 62837 | 188078U, 39154U, 27395U, 16552U, 26767U, 21366U, 13400U, 26415U, |
| 62838 | 27017U, 29185U, 153232U, 189237U, 155367U, 191486U, 133330U, 133767U, |
| 62839 | 134130U, 133405U, 740U, 164630U, 133643U, 133998U, 2886U, 2648U, |
| 62840 | 4471U, 2988U, 4725U, 266U, 2736U, 4559U, 112U, 675U, |
| 62841 | 153603U, 205218U, 189582U, 208295U, 155706U, 205441U, 191800U, 208518U, |
| 62842 | 133294U, 133731U, 134100U, 133375U, 707U, 164579U, 3165U, 133604U, |
| 62843 | 4865U, 133959U, 2838U, 356U, 2612U, 4435U, 2949U, 4686U, |
| 62844 | 227U, 2697U, 4520U, 73U, 645U, 24867U, 22776U, 24334U, |
| 62845 | 25478U, 4115U, 25406U, 4106U, 141178U, 176268U, 141783U, 176834U, |
| 62846 | 55173U, 4363U, 7521U, 7535U, 137788U, 4803U, 31612U, 168499U, |
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| 62848 | 58790U, 4387U, 63375U, 4410U, 22745U, 24927U, 16651U, 16694U, |
| 62849 | 16681U, 16703U, 24966U, 5481U, 57954U, 172541U, 62457U, 177916U, |
| 62850 | 2209U, 57706U, 171853U, 62202U, 176598U, 2292U, 2408U, 172076U, |
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| 62852 | 7899U, 908U, 31664U, 33771U, 17109U, 7958U, 33786U, 23726U, |
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| 62854 | 1934U, 2135U, 4352U, 17134U, 23769U, 21507U, 3311U, 5011U, |
| 62855 | 502U, 142922U, 37492U, 20500U, 177905U, 39127U, 21353U, 141547U, |
| 62856 | 36889U, 20233U, 176587U, 38554U, 21086U, 142209U, 37241U, 20404U, |
| 62857 | 177246U, 38891U, 21257U, 141297U, 176406U, 141973U, 177043U, 861U, |
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| 62867 | 44979U, 72339U, 215206U, 96493U, 238958U, 179381U, 116185U, 256811U, |
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| 62990 | 185893U, 122586U, 263180U, 145540U, 46092U, 73500U, 216360U, 97858U, |
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| 62993 | 150532U, 49164U, 76716U, 219501U, 102724U, 245095U, 186260U, 122976U, |
| 62994 | 263541U, 145937U, 46434U, 73862U, 216687U, 98262U, 240712U, 181255U, |
| 62995 | 118057U, 258674U, 162925U, 51577U, 79258U, 222032U, 107094U, 249426U, |
| 62996 | 199339U, 54760U, 81996U, 224919U, 127826U, 268381U, 149938U, 48648U, |
| 62997 | 76170U, 218980U, 102129U, 244517U, 185700U, 122381U, 262963U, 145330U, |
| 62998 | 45904U, 73301U, 216150U, 97653U, 240119U, 180682U, 117448U, 258081U, |
| 62999 | 162432U, 51140U, 78790U, 221579U, 106593U, 248932U, 198874U, 54521U, |
| 63000 | 81741U, 224648U, 127325U, 267887U, 148600U, 47556U, 75031U, 217849U, |
| 63001 | 100807U, 243184U, 184247U, 120956U, 261521U, 143987U, 44797U, 72146U, |
| 63002 | 215002U, 96296U, 238749U, 179196U, 115988U, 256602U, 160664U, 50243U, |
| 63003 | 77842U, 220626U, 105332U, 247666U, 196920U, 54043U, 81280U, 224154U, |
| 63004 | 125979U, 266530U, 152149U, 50034U, 77618U, 220418U, 104308U, 246673U, |
| 63005 | 187974U, 124713U, 265281U, 147540U, 47319U, 74780U, 217621U, 99861U, |
| 63006 | 242306U, 182983U, 119809U, 260430U, 164497U, 52297U, 80014U, 222810U, |
| 63007 | 108461U, 250795U, 201085U, 55099U, 82333U, 225279U, 129319U, 269885U, |
| 63008 | 158817U, 194813U, 150933U, 103130U, 245509U, 186679U, 123401U, 263975U, |
| 63009 | 146338U, 98668U, 241126U, 181674U, 118482U, 259108U, 163259U, 107425U, |
| 63010 | 249768U, 199699U, 54851U, 82093U, 225022U, 128173U, 268740U, 155286U, |
| 63011 | 191420U, 150433U, 49077U, 76624U, 219422U, 102637U, 245020U, 186178U, |
| 63012 | 122889U, 263466U, 145838U, 46347U, 73770U, 216608U, 98175U, 240637U, |
| 63013 | 181173U, 117970U, 258599U, 162844U, 51505U, 79181U, 221965U, 107022U, |
| 63014 | 249363U, 199272U, 54701U, 81933U, 224852U, 127754U, 268318U, 150183U, |
| 63015 | 48873U, 76408U, 219231U, 102371U, 244773U, 185928U, 122623U, 263219U, |
| 63016 | 145575U, 46129U, 73539U, 216401U, 97895U, 240375U, 180910U, 117690U, |
| 63017 | 258337U, 162632U, 51326U, 78989U, 221791U, 106793U, 249146U, 199060U, |
| 63018 | 54611U, 81837U, 224750U, 127525U, 268101U, 150567U, 49201U, 76755U, |
| 63019 | 219542U, 102761U, 245134U, 186295U, 123013U, 263580U, 145972U, 46471U, |
| 63020 | 73901U, 216728U, 98299U, 240751U, 181290U, 118094U, 258713U, 162954U, |
| 63021 | 51608U, 79291U, 222067U, 107125U, 249459U, 199368U, 54791U, 82029U, |
| 63022 | 224954U, 127857U, 268414U, 152031U, 49999U, 77581U, 220379U, 104182U, |
| 63023 | 246539U, 187856U, 124587U, 265147U, 147422U, 47284U, 74743U, 217582U, |
| 63024 | 99735U, 242172U, 182865U, 119683U, 260296U, 164403U, 52268U, 79983U, |
| 63025 | 222777U, 108359U, 250685U, 200991U, 55070U, 82302U, 225246U, 129217U, |
| 63026 | 269775U, 151479U, 49931U, 77509U, 220303U, 103608U, 245998U, 187181U, |
| 63027 | 123898U, 264484U, 146870U, 47216U, 74671U, 217506U, 99161U, 241631U, |
| 63028 | 182190U, 118994U, 259633U, 163951U, 52212U, 79923U, 222713U, 107893U, |
| 63029 | 250240U, 200429U, 55042U, 82272U, 225214U, 128657U, 269229U, 158287U, |
| 63030 | 194411U, 149971U, 48683U, 76207U, 219019U, 102164U, 244554U, 185733U, |
| 63031 | 122416U, 263000U, 145363U, 45939U, 73338U, 216189U, 97688U, 240156U, |
| 63032 | 180715U, 117483U, 258118U, 162459U, 51169U, 78821U, 221612U, 106622U, |
| 63033 | 248963U, 198901U, 54550U, 81772U, 224681U, 127354U, 267918U, 154576U, |
| 63034 | 190727U, 157534U, 193702U, 148698U, 47660U, 75141U, 217965U, 100911U, |
| 63035 | 243294U, 184345U, 121060U, 261631U, 144085U, 44901U, 72256U, 215118U, |
| 63036 | 96400U, 238859U, 179294U, 116092U, 256712U, 160744U, 50329U, 77934U, |
| 63037 | 220724U, 105418U, 247758U, 197000U, 54086U, 81326U, 224203U, 126065U, |
| 63038 | 266622U, 153197U, 189202U, 152132U, 50016U, 77599U, 220398U, 104290U, |
| 63039 | 246654U, 187957U, 124695U, 265262U, 147523U, 47301U, 74761U, 217601U, |
| 63040 | 99843U, 242287U, 182966U, 119791U, 260411U, 164483U, 52282U, 79998U, |
| 63041 | 222793U, 108446U, 250779U, 201071U, 55084U, 82317U, 225262U, 129304U, |
| 63042 | 269869U, 175009U, 194273U, 173877U, 113890U, 185201U, 121952U, 262526U, |
| 63043 | 173085U, 113310U, 180183U, 117019U, 257644U, 175664U, 114556U, 198000U, |
| 63044 | 54277U, 81505U, 224395U, 126886U, 267446U, 174475U, 190199U, 150466U, |
| 63045 | 49112U, 76661U, 219461U, 102672U, 245057U, 186211U, 122924U, 263503U, |
| 63046 | 145871U, 46382U, 73807U, 216647U, 98210U, 240674U, 181206U, 118005U, |
| 63047 | 258636U, 162871U, 51534U, 79212U, 221998U, 107051U, 249394U, 199299U, |
| 63048 | 54730U, 81964U, 224885U, 127783U, 268349U, 150218U, 48910U, 76447U, |
| 63049 | 219272U, 102408U, 244812U, 185963U, 122660U, 263258U, 145610U, 46166U, |
| 63050 | 73578U, 216442U, 97932U, 240414U, 180945U, 117727U, 258376U, 162661U, |
| 63051 | 51357U, 79022U, 221826U, 106824U, 249179U, 199089U, 54642U, 81870U, |
| 63052 | 224785U, 127556U, 268134U, 150602U, 49238U, 76794U, 219583U, 102798U, |
| 63053 | 245173U, 186330U, 123050U, 263619U, 146007U, 46508U, 73940U, 216769U, |
| 63054 | 98336U, 240790U, 181325U, 118131U, 258752U, 162983U, 51639U, 79324U, |
| 63055 | 222102U, 107156U, 249492U, 199397U, 54822U, 82062U, 224989U, 127888U, |
| 63056 | 268447U, 148665U, 47625U, 75104U, 217926U, 100876U, 243257U, 184312U, |
| 63057 | 121025U, 261594U, 144052U, 44866U, 72219U, 215079U, 96365U, 238822U, |
| 63058 | 179261U, 116057U, 256675U, 160717U, 50300U, 77903U, 220691U, 105389U, |
| 63059 | 247727U, 196973U, 54057U, 81295U, 224170U, 126036U, 266591U, 149519U, |
| 63060 | 48299U, 75799U, 218607U, 101682U, 244061U, 185168U, 121917U, 262489U, |
| 63061 | 144911U, 45555U, 72930U, 215777U, 97206U, 239663U, 180150U, 116984U, |
| 63062 | 257607U, 161668U, 50857U, 78485U, 221269U, 106139U, 248475U, 197973U, |
| 63063 | 54248U, 81474U, 224362U, 126857U, 267415U, 150998U, 49589U, 77145U, |
| 63064 | 219937U, 103199U, 245582U, 186744U, 123470U, 264048U, 146403U, 46859U, |
| 63065 | 74291U, 217123U, 98737U, 241199U, 181739U, 118551U, 259181U, 163312U, |
| 63066 | 51924U, 79612U, 222396U, 107482U, 249829U, 199752U, 54894U, 82139U, |
| 63067 | 225071U, 128230U, 268801U, 161885U, 206049U, 131788U, 272331U, 198203U, |
| 63068 | 209126U, 132970U, 273579U, 202890U, 130456U, 271027U, 159777U, 205567U, |
| 63069 | 195752U, 208644U, 202433U, 141899U, 204980U, 176969U, 208057U, 162184U, |
| 63070 | 206251U, 198547U, 209328U, 203090U, 154319U, 205341U, 190418U, 208418U, |
| 63071 | 163671U, 206488U, 131914U, 272465U, 200136U, 209565U, 133096U, 273713U, |
| 63072 | 203340U, 130609U, 271189U, 155681U, 205408U, 191763U, 208485U, 205685U, |
| 63073 | 208762U, 202557U, 206357U, 209434U, 203202U, 161132U, 205826U, 131662U, |
| 63074 | 272197U, 197408U, 208903U, 132844U, 273445U, 202705U, 130303U, 270865U, |
| 63075 | 205606U, 208683U, 202474U, 206286U, 209363U, 203127U, 163684U, 206505U, |
| 63076 | 131932U, 272484U, 200149U, 209582U, 133114U, 273732U, 203358U, 130628U, |
| 63077 | 271209U, 205726U, 208803U, 202600U, 206394U, 209471U, 203241U, 161145U, |
| 63078 | 205843U, 197421U, 208920U, 153557U, 205185U, 189536U, 208262U, 161898U, |
| 63079 | 206066U, 198216U, 209143U, 202908U, 163697U, 206522U, 200175U, 209599U, |
| 63080 | 203376U, 155693U, 205424U, 191787U, 208501U, 161101U, 205787U, 197377U, |
| 63081 | 208864U, 202664U, 153543U, 205167U, 189522U, 208244U, 161854U, 206010U, |
| 63082 | 198172U, 209087U, 202849U, 163640U, 206449U, 200105U, 209526U, 203299U, |
| 63083 | 155667U, 205390U, 191749U, 208467U, 161172U, 205878U, 131680U, 272216U, |
| 63084 | 197448U, 208955U, 132862U, 273464U, 202723U, 130322U, 270885U, 153569U, |
| 63085 | 205201U, 189548U, 208278U, 161925U, 206101U, 131806U, 272350U, 198243U, |
| 63086 | 209178U, 132988U, 273598U, 202945U, 130475U, 271047U, 159824U, 205645U, |
| 63087 | 195799U, 208722U, 202515U, 141928U, 205017U, 176998U, 208094U, 162225U, |
| 63088 | 206321U, 198588U, 209398U, 203164U, 154344U, 205374U, 190443U, 208451U, |
| 63089 | 205767U, 208844U, 202643U, 206431U, 209508U, 203280U, 158246U, 194370U, |
| 63090 | 149888U, 48595U, 76114U, 218921U, 102076U, 244461U, 185650U, 122328U, |
| 63091 | 262907U, 145280U, 45851U, 73245U, 216091U, 97600U, 240063U, 180632U, |
| 63092 | 117395U, 258025U, 162391U, 51096U, 78743U, 221529U, 106549U, 248885U, |
| 63093 | 198833U, 54477U, 81694U, 224598U, 127281U, 267840U, 154538U, 190675U, |
| 63094 | 150383U, 49024U, 76568U, 219363U, 102584U, 244964U, 186128U, 122836U, |
| 63095 | 263410U, 145788U, 46294U, 73714U, 216549U, 98122U, 240581U, 181123U, |
| 63096 | 117917U, 258543U, 162803U, 51461U, 79134U, 221915U, 106978U, 249316U, |
| 63097 | 199231U, 54657U, 81886U, 224802U, 127710U, 268271U, 150130U, 48817U, |
| 63098 | 76349U, 219169U, 102315U, 244714U, 185875U, 122567U, 263160U, 145522U, |
| 63099 | 46073U, 73480U, 216339U, 97839U, 240316U, 180857U, 117634U, 258278U, |
| 63100 | 162588U, 51279U, 78939U, 221738U, 106746U, 249096U, 199016U, 54564U, |
| 63101 | 81787U, 224697U, 127478U, 268051U, 150514U, 49145U, 76696U, 219480U, |
| 63102 | 102705U, 245075U, 186242U, 122957U, 263521U, 145919U, 46415U, 73842U, |
| 63103 | 216666U, 98243U, 240692U, 181237U, 118038U, 258654U, 162910U, 51561U, |
| 63104 | 79241U, 222014U, 107078U, 249409U, 199324U, 54744U, 81979U, 224901U, |
| 63105 | 127810U, 268364U, 149921U, 48630U, 76151U, 218960U, 102111U, 244498U, |
| 63106 | 185683U, 122363U, 262944U, 145313U, 45886U, 73282U, 216130U, 97635U, |
| 63107 | 240100U, 180665U, 117430U, 258062U, 162418U, 51125U, 78774U, 221562U, |
| 63108 | 106578U, 248916U, 198860U, 54506U, 81725U, 224631U, 127310U, 267871U, |
| 63109 | 150416U, 49059U, 76605U, 219402U, 102619U, 245001U, 186161U, 122871U, |
| 63110 | 263447U, 145821U, 46329U, 73751U, 216588U, 98157U, 240618U, 181156U, |
| 63111 | 117952U, 258580U, 162830U, 51490U, 79165U, 221948U, 107007U, 249347U, |
| 63112 | 199258U, 54686U, 81917U, 224835U, 127739U, 268302U, 150165U, 48854U, |
| 63113 | 76388U, 219210U, 102352U, 244753U, 185910U, 122604U, 263199U, 145557U, |
| 63114 | 46110U, 73519U, 216380U, 97876U, 240355U, 180892U, 117671U, 258317U, |
| 63115 | 162617U, 51310U, 78972U, 221773U, 106777U, 249129U, 199045U, 54595U, |
| 63116 | 81820U, 224732U, 127509U, 268084U, 150549U, 49182U, 76735U, 219521U, |
| 63117 | 102742U, 245114U, 186277U, 122994U, 263560U, 145954U, 46452U, 73881U, |
| 63118 | 216707U, 98280U, 240731U, 181272U, 118075U, 258693U, 162939U, 51592U, |
| 63119 | 79274U, 222049U, 107109U, 249442U, 199353U, 54775U, 82012U, 224936U, |
| 63120 | 127841U, 268397U, 152014U, 49981U, 77562U, 220359U, 104164U, 246520U, |
| 63121 | 187839U, 124569U, 265128U, 147405U, 47266U, 74724U, 217562U, 99717U, |
| 63122 | 242153U, 182848U, 119665U, 260277U, 164389U, 52253U, 79967U, 222760U, |
| 63123 | 108344U, 250669U, 200977U, 55055U, 82286U, 225229U, 129202U, 269759U, |
| 63124 | 151463U, 49914U, 77491U, 220284U, 103591U, 245980U, 187165U, 123881U, |
| 63125 | 264466U, 146854U, 47199U, 74653U, 217487U, 99144U, 241613U, 182174U, |
| 63126 | 118977U, 259615U, 163938U, 52198U, 79908U, 222697U, 107879U, 250225U, |
| 63127 | 200416U, 55028U, 82257U, 225198U, 128643U, 269214U, 158273U, 194397U, |
| 63128 | 149954U, 48665U, 76188U, 218999U, 102146U, 244535U, 185716U, 122398U, |
| 63129 | 262981U, 145346U, 45921U, 73319U, 216169U, 97670U, 240137U, 180698U, |
| 63130 | 117465U, 258099U, 162445U, 51154U, 78805U, 221595U, 106607U, 248947U, |
| 63131 | 198887U, 54535U, 81756U, 224664U, 127339U, 267902U, 154563U, 190714U, |
| 63132 | 150449U, 49094U, 76642U, 219441U, 102654U, 245038U, 186194U, 122906U, |
| 63133 | 263484U, 145854U, 46364U, 73788U, 216627U, 98192U, 240655U, 181189U, |
| 63134 | 117987U, 258617U, 162857U, 51519U, 79196U, 221981U, 107036U, 249378U, |
| 63135 | 199285U, 54715U, 81948U, 224868U, 127768U, 268333U, 150200U, 48891U, |
| 63136 | 76427U, 219251U, 102389U, 244792U, 185945U, 122641U, 263238U, 145592U, |
| 63137 | 46147U, 73558U, 216421U, 97913U, 240394U, 180927U, 117708U, 258356U, |
| 63138 | 162646U, 51341U, 79005U, 221808U, 106808U, 249162U, 199074U, 54626U, |
| 63139 | 81853U, 224767U, 127540U, 268117U, 150584U, 49219U, 76774U, 219562U, |
| 63140 | 102779U, 245153U, 186312U, 123031U, 263599U, 145989U, 46489U, 73920U, |
| 63141 | 216748U, 98317U, 240770U, 181307U, 118112U, 258732U, 162968U, 51623U, |
| 63142 | 79307U, 222084U, 107140U, 249475U, 199382U, 54806U, 82045U, 224971U, |
| 63143 | 127872U, 268430U, 159761U, 205547U, 195736U, 208624U, 202412U, 141884U, |
| 63144 | 204961U, 176954U, 208038U, 162170U, 206233U, 198533U, 209310U, 203071U, |
| 63145 | 154306U, 205324U, 190405U, 208401U, 159839U, 205664U, 195814U, 208741U, |
| 63146 | 202535U, 162238U, 206338U, 198601U, 209415U, 203182U, 159792U, 205586U, |
| 63147 | 195767U, 208663U, 202453U, 162197U, 206268U, 198560U, 209345U, 203108U, |
| 63148 | 159856U, 205705U, 195831U, 208782U, 202578U, 162253U, 206375U, 198616U, |
| 63149 | 209452U, 203221U, 159808U, 205625U, 195783U, 208702U, 202494U, 141913U, |
| 63150 | 204998U, 176983U, 208075U, 162211U, 206303U, 198574U, 209380U, 203145U, |
| 63151 | 154331U, 205357U, 190430U, 208434U, 159873U, 205746U, 195848U, 208823U, |
| 63152 | 202621U, 162268U, 206412U, 198631U, 209489U, 203260U, 148648U, 47607U, |
| 63153 | 75085U, 217906U, 100858U, 243238U, 184295U, 121007U, 261575U, 144035U, |
| 63154 | 44848U, 72200U, 215059U, 96347U, 238803U, 179244U, 116039U, 256656U, |
| 63155 | 160703U, 50285U, 77887U, 220674U, 105374U, 247711U, 196959U, 126021U, |
| 63156 | 266575U, 149502U, 48281U, 75780U, 218587U, 101664U, 244042U, 185151U, |
| 63157 | 121899U, 262470U, 144894U, 45537U, 72911U, 215757U, 97188U, 239644U, |
| 63158 | 180133U, 116966U, 257588U, 161654U, 50842U, 78469U, 221252U, 106124U, |
| 63159 | 248459U, 197959U, 54233U, 81458U, 224345U, 126842U, 267399U, 150981U, |
| 63160 | 49571U, 77126U, 219917U, 103181U, 245563U, 186727U, 123452U, 264029U, |
| 63161 | 146386U, 46841U, 74272U, 217103U, 98719U, 241180U, 181722U, 118533U, |
| 63162 | 259162U, 163298U, 51909U, 79596U, 222379U, 107467U, 249813U, 199738U, |
| 63163 | 54879U, 82123U, 225054U, 128215U, 268785U, 148681U, 47642U, 75122U, |
| 63164 | 217945U, 100893U, 243275U, 184328U, 121042U, 261612U, 144068U, 44883U, |
| 63165 | 72237U, 215098U, 96382U, 238840U, 179277U, 116074U, 256693U, 160730U, |
| 63166 | 50314U, 77918U, 220707U, 105403U, 247742U, 196986U, 54071U, 81310U, |
| 63167 | 224186U, 126050U, 266606U, 149535U, 48316U, 75817U, 218626U, 101699U, |
| 63168 | 244079U, 185184U, 121934U, 262507U, 144927U, 45572U, 72948U, 215796U, |
| 63169 | 97223U, 239681U, 180166U, 117001U, 257625U, 161681U, 50871U, 78500U, |
| 63170 | 221285U, 106153U, 248490U, 197986U, 54262U, 81489U, 224378U, 126871U, |
| 63171 | 267430U, 151014U, 49606U, 77163U, 219956U, 103216U, 245600U, 186760U, |
| 63172 | 123487U, 264066U, 146419U, 46876U, 74309U, 217142U, 98754U, 241217U, |
| 63173 | 181755U, 118568U, 259199U, 163325U, 51938U, 79627U, 222412U, 107496U, |
| 63174 | 249844U, 199765U, 54908U, 82154U, 225087U, 128244U, 268816U, 161158U, |
| 63175 | 205860U, 197434U, 208937U, 161911U, 206083U, 198229U, 209160U, 202926U, |
| 63176 | 163710U, 206539U, 200188U, 209616U, 203394U, 161116U, 205806U, 197392U, |
| 63177 | 208883U, 202684U, 161869U, 206029U, 198187U, 209106U, 202869U, 163655U, |
| 63178 | 206468U, 200120U, 209545U, 203319U, 149567U, 48350U, 75853U, 218664U, |
| 63179 | 101733U, 244115U, 185232U, 121985U, 262561U, 144959U, 45606U, 72984U, |
| 63180 | 215834U, 97257U, 239717U, 180214U, 117052U, 257679U, 161707U, 50899U, |
| 63181 | 78530U, 221317U, 106181U, 248520U, 198025U, 54304U, 81534U, 224426U, |
| 63182 | 126913U, 267475U, 149552U, 48334U, 75836U, 218646U, 101717U, 244098U, |
| 63183 | 185217U, 121969U, 262544U, 144944U, 45590U, 72967U, 215816U, 97241U, |
| 63184 | 239700U, 180199U, 117036U, 257662U, 161695U, 50886U, 78516U, 221302U, |
| 63185 | 106168U, 248506U, 198013U, 54291U, 81520U, 224411U, 126900U, 267461U, |
| 63186 | 60715U, 86809U, 229557U, 65580U, 89859U, 232296U, 60041U, 86113U, |
| 63187 | 229001U, 64906U, 89163U, 231740U, 61985U, 87619U, 230268U, 66850U, |
| 63188 | 90669U, 233007U, 157784U, 193937U, 149065U, 47939U, 75438U, 218260U, |
| 63189 | 101237U, 243622U, 184668U, 121405U, 261979U, 144438U, 45195U, 72569U, |
| 63190 | 215430U, 96741U, 239203U, 179631U, 116452U, 257076U, 161025U, 50566U, |
| 63191 | 78190U, 220982U, 105693U, 248039U, 197268U, 54158U, 81404U, 224287U, |
| 63192 | 126356U, 266920U, 153454U, 189425U, 149727U, 48521U, 76035U, 218837U, |
| 63193 | 101904U, 244278U, 185392U, 122156U, 262724U, 145119U, 45777U, 73166U, |
| 63194 | 216007U, 97428U, 239880U, 180374U, 117223U, 257842U, 161834U, 51037U, |
| 63195 | 78679U, 221460U, 106319U, 248653U, 198152U, 54403U, 81641U, 224541U, |
| 63196 | 127051U, 267608U, 159121U, 195086U, 151382U, 49886U, 77461U, 220252U, |
| 63197 | 103543U, 245929U, 187084U, 123833U, 264415U, 146773U, 47171U, 74623U, |
| 63198 | 217455U, 99096U, 241562U, 182093U, 118929U, 259564U, 163620U, 52176U, |
| 63199 | 79884U, 222671U, 107772U, 250126U, 200085U, 54981U, 82233U, 225172U, |
| 63200 | 128536U, 269115U, 155626U, 191721U, 161360U, 205982U, 131758U, 272299U, |
| 63201 | 197651U, 209059U, 132940U, 273547U, 202819U, 130424U, 270993U, 153745U, |
| 63202 | 205298U, 189712U, 208375U, 162097U, 206205U, 131884U, 272433U, 198415U, |
| 63203 | 209282U, 133066U, 273681U, 203041U, 130577U, 271155U, 163878U, 206644U, |
| 63204 | 132010U, 272567U, 200356U, 209721U, 133192U, 273815U, 203491U, 130730U, |
| 63205 | 271317U, 155822U, 205521U, 191891U, 208598U, 137054U, 43248U, 70495U, |
| 63206 | 213286U, 93617U, 236058U, 167868U, 111326U, 253818U, 135672U, 41815U, |
| 63207 | 68983U, 211695U, 92154U, 234514U, 166486U, 109863U, 252274U, 140674U, |
| 63208 | 44501U, 71831U, 214705U, 95011U, 237511U, 171239U, 112720U, 255271U, |
| 63209 | 60865U, 65730U, 61210U, 66075U, 61014U, 65879U, 137827U, 168531U, |
| 63210 | 138472U, 169045U, 139262U, 43490U, 70752U, 213558U, 93921U, 236347U, |
| 63211 | 169827U, 52508U, 80238U, 223047U, 111630U, 254107U, 140548U, 44366U, |
| 63212 | 71687U, 214552U, 94876U, 237367U, 171113U, 53659U, 81068U, 223928U, |
| 63213 | 112585U, 255127U, 148798U, 101018U, 243408U, 184445U, 121167U, 261745U, |
| 63214 | 144185U, 96507U, 238973U, 179394U, 116199U, 256826U, 160823U, 105504U, |
| 63215 | 247851U, 197079U, 126151U, 266715U, 151115U, 103324U, 245715U, 186861U, |
| 63216 | 123595U, 264181U, 146520U, 98862U, 241332U, 181856U, 118676U, 259314U, |
| 63217 | 163405U, 107583U, 249938U, 199845U, 128331U, 268910U, 173375U, 183093U, |
| 63218 | 172665U, 112956U, 178130U, 114938U, 255613U, 175222U, 114182U, 195907U, |
| 63219 | 124981U, 265564U, 175315U, 114281U, 196099U, 125185U, 265780U, 172593U, |
| 63220 | 112880U, 178020U, 114822U, 255491U, 175147U, 114118U, 195657U, 124883U, |
| 63221 | 265460U, 175256U, 114218U, 195973U, 125051U, 265638U, 173390U, 183135U, |
| 63222 | 172685U, 112977U, 178169U, 114979U, 255656U, 175239U, 114200U, 195940U, |
| 63223 | 125016U, 265601U, 175332U, 114299U, 196132U, 125220U, 265817U, 172613U, |
| 63224 | 112901U, 178059U, 114863U, 255534U, 175164U, 114136U, 195690U, 124918U, |
| 63225 | 265497U, 175273U, 114236U, 196006U, 125086U, 265675U, 175839U, 200047U, |
| 63226 | 174639U, 191676U, 136517U, 42679U, 69894U, 212653U, 93048U, 235457U, |
| 63227 | 167331U, 110757U, 253217U, 135135U, 41246U, 68382U, 211062U, 91585U, |
| 63228 | 233913U, 165949U, 109294U, 251673U, 139988U, 44017U, 71314U, 214155U, |
| 63229 | 94487U, 236951U, 170553U, 53186U, 80762U, 223603U, 112196U, 254711U, |
| 63230 | 140229U, 94560U, 237030U, 170794U, 53423U, 80817U, 223662U, 112269U, |
| 63231 | 254790U, 149596U, 48381U, 75886U, 218699U, 101764U, 244148U, 185261U, |
| 63232 | 122016U, 262594U, 144988U, 45637U, 73017U, 215869U, 97288U, 239750U, |
| 63233 | 180243U, 117083U, 257712U, 161730U, 50924U, 78557U, 221346U, 106206U, |
| 63234 | 248547U, 198048U, 54329U, 81561U, 224455U, 126938U, 267502U, 161948U, |
| 63235 | 106341U, 248677U, 198266U, 54425U, 81665U, 224567U, 127073U, 267632U, |
| 63236 | 56735U, 83782U, 226763U, 60337U, 86427U, 229251U, 65202U, 89477U, |
| 63237 | 231990U, 56230U, 83249U, 226253U, 59663U, 85731U, 228695U, 64528U, |
| 63238 | 88781U, 231434U, 57274U, 84353U, 227315U, 61498U, 87148U, 229845U, |
| 63239 | 66363U, 40077U, 67146U, 209801U, 90198U, 232584U, 56999U, 84061U, |
| 63240 | 227023U, 60664U, 86755U, 229516U, 65529U, 89805U, 232255U, 56494U, |
| 63241 | 83528U, 226513U, 59990U, 86059U, 228960U, 64855U, 89109U, 231699U, |
| 63242 | 57493U, 84587U, 227536U, 61874U, 87512U, 230167U, 66739U, 40321U, |
| 63243 | 67406U, 210049U, 90562U, 232906U, 61567U, 87222U, 229911U, 66432U, |
| 63244 | 40151U, 67225U, 209871U, 90272U, 232650U, 61943U, 87586U, 230233U, |
| 63245 | 66808U, 40395U, 67485U, 210119U, 90636U, 232972U, 138641U, 169206U, |
| 63246 | 135928U, 42056U, 69237U, 211962U, 92425U, 234800U, 166742U, 110134U, |
| 63247 | 252560U, 134546U, 40623U, 67725U, 210371U, 90962U, 233256U, 165360U, |
| 63248 | 108671U, 251016U, 139233U, 43459U, 70719U, 213523U, 93890U, 236314U, |
| 63249 | 169798U, 52477U, 80205U, 223012U, 111599U, 254074U, 137349U, 168148U, |
| 63250 | 136372U, 42526U, 69733U, 212484U, 92895U, 235296U, 167186U, 110604U, |
| 63251 | 253056U, 134990U, 41093U, 68221U, 210893U, 91432U, 233752U, 165804U, |
| 63252 | 109141U, 251512U, 139867U, 43888U, 71177U, 214010U, 94358U, 236814U, |
| 63253 | 170432U, 53057U, 80625U, 223458U, 112067U, 254574U, 138927U, 169492U, |
| 63254 | 136879U, 43063U, 70300U, 213081U, 93432U, 235863U, 167693U, 111141U, |
| 63255 | 253623U, 135497U, 41630U, 68788U, 211490U, 91969U, 234319U, 166311U, |
| 63256 | 109678U, 252079U, 140519U, 44335U, 71654U, 214517U, 94845U, 237334U, |
| 63257 | 171084U, 53628U, 81035U, 223893U, 112554U, 255094U, 137988U, 168687U, |
| 63258 | 139521U, 204310U, 130975U, 271474U, 170086U, 207255U, 132157U, 272722U, |
| 63259 | 52760U, 201725U, 129580U, 270106U, 137676U, 203832U, 168351U, 206777U, |
| 63260 | 140142U, 204564U, 131243U, 271756U, 170707U, 207509U, 132425U, 273004U, |
| 63261 | 53330U, 201993U, 129862U, 270402U, 140819U, 204818U, 131511U, 272038U, |
| 63262 | 171384U, 207763U, 132693U, 273286U, 53911U, 202261U, 130144U, 270698U, |
| 63263 | 138333U, 204055U, 168908U, 207000U, 138733U, 169298U, 136038U, 42172U, |
| 63264 | 69359U, 212090U, 92541U, 234922U, 166852U, 110250U, 252682U, 134656U, |
| 63265 | 40739U, 67847U, 210499U, 91078U, 233378U, 165470U, 108787U, 251138U, |
| 63266 | 139335U, 43568U, 70835U, 213646U, 93999U, 236430U, 169900U, 52586U, |
| 63267 | 80321U, 223135U, 111708U, 254190U, 137435U, 168234U, 136482U, 42642U, |
| 63268 | 69855U, 212612U, 93011U, 235418U, 167296U, 110720U, 253178U, 135100U, |
| 63269 | 41209U, 68343U, 211021U, 91548U, 233874U, 165914U, 109257U, 251634U, |
| 63270 | 139959U, 43986U, 71281U, 214120U, 94456U, 236918U, 170524U, 53155U, |
| 63271 | 80729U, 223568U, 112165U, 254678U, 139019U, 169584U, 136989U, 43179U, |
| 63272 | 70422U, 213209U, 93548U, 235985U, 167803U, 111257U, 253745U, 135607U, |
| 63273 | 41746U, 68910U, 211618U, 92085U, 234441U, 166421U, 109794U, 252201U, |
| 63274 | 140621U, 44444U, 71770U, 214640U, 94954U, 237450U, 171186U, 53737U, |
| 63275 | 81151U, 224016U, 112663U, 255210U, 138074U, 168773U, 139579U, 204384U, |
| 63276 | 131053U, 271556U, 170144U, 207329U, 132235U, 272804U, 52822U, 201803U, |
| 63277 | 129662U, 270192U, 137730U, 203902U, 168405U, 206847U, 140200U, 204638U, |
| 63278 | 131321U, 271838U, 170765U, 207583U, 132503U, 273086U, 53392U, 202071U, |
| 63279 | 129944U, 270488U, 140877U, 204892U, 131589U, 272120U, 171442U, 207837U, |
| 63280 | 132771U, 273368U, 53973U, 202339U, 130226U, 270784U, 138387U, 204125U, |
| 63281 | 168962U, 207070U, 138549U, 169114U, 135818U, 41940U, 69115U, 211834U, |
| 63282 | 92309U, 234678U, 166632U, 110018U, 252438U, 134436U, 40507U, 67603U, |
| 63283 | 210243U, 90846U, 233134U, 165250U, 108555U, 250894U, 139141U, 43361U, |
| 63284 | 70615U, 213413U, 93792U, 236210U, 169706U, 52379U, 80101U, 222902U, |
| 63285 | 111501U, 253970U, 137263U, 168062U, 136262U, 42410U, 69611U, 212356U, |
| 63286 | 92779U, 235174U, 167076U, 110488U, 252934U, 134880U, 40977U, 68099U, |
| 63287 | 210765U, 91316U, 233630U, 165694U, 109025U, 251390U, 139775U, 43790U, |
| 63288 | 71073U, 213900U, 94260U, 236710U, 170340U, 52959U, 80521U, 223348U, |
| 63289 | 111969U, 254470U, 138835U, 169400U, 136769U, 42947U, 70178U, 212953U, |
| 63290 | 93316U, 235741U, 167583U, 111025U, 253501U, 135387U, 41514U, 68666U, |
| 63291 | 211362U, 91853U, 234197U, 166201U, 109562U, 251957U, 140427U, 44237U, |
| 63292 | 71550U, 214407U, 94747U, 237230U, 170992U, 53530U, 80931U, 223783U, |
| 63293 | 112456U, 254990U, 137902U, 168601U, 139463U, 204236U, 130897U, 271392U, |
| 63294 | 170028U, 207181U, 132079U, 272640U, 52698U, 201647U, 129498U, 270020U, |
| 63295 | 137622U, 203762U, 168297U, 206707U, 140084U, 204490U, 131165U, 271674U, |
| 63296 | 170649U, 207435U, 132347U, 272922U, 53268U, 201915U, 129780U, 270316U, |
| 63297 | 140761U, 204744U, 131433U, 271956U, 171326U, 207689U, 132615U, 273204U, |
| 63298 | 53849U, 202183U, 130062U, 270612U, 138279U, 203985U, 168854U, 206930U, |
| 63299 | 136533U, 42696U, 69912U, 212672U, 93065U, 235475U, 167347U, 110774U, |
| 63300 | 253235U, 135151U, 41263U, 68400U, 211081U, 91602U, 233931U, 165965U, |
| 63301 | 109311U, 251691U, 140001U, 44031U, 71329U, 214171U, 94501U, 236966U, |
| 63302 | 170566U, 53200U, 80777U, 223619U, 112210U, 254726U, 140242U, 94574U, |
| 63303 | 237045U, 170807U, 53437U, 80832U, 223678U, 112283U, 254805U, 174809U, |
| 63304 | 156921U, 193103U, 29652U, 172196U, 142365U, 177472U, 28409U, 174895U, |
| 63305 | 157020U, 193202U, 29762U, 172326U, 142507U, 177614U, 28579U, 172246U, |
| 63306 | 207939U, 142415U, 205068U, 177522U, 208145U, 30225U, 28475U, 172376U, |
| 63307 | 208005U, 142557U, 205134U, 177664U, 208211U, 30307U, 28645U, 138578U, |
| 63308 | 169143U, 135853U, 41977U, 69154U, 211875U, 92346U, 234717U, 166667U, |
| 63309 | 110055U, 252477U, 134471U, 40544U, 67642U, 210284U, 90883U, 233173U, |
| 63310 | 165285U, 108592U, 250933U, 139170U, 43392U, 70648U, 213448U, 93823U, |
| 63311 | 236243U, 169735U, 52410U, 80134U, 222937U, 111532U, 254003U, 137290U, |
| 63312 | 168089U, 136297U, 42447U, 69650U, 212397U, 92816U, 235213U, 167111U, |
| 63313 | 110525U, 252973U, 134915U, 41014U, 68138U, 210806U, 91353U, 233669U, |
| 63314 | 165729U, 109062U, 251429U, 139804U, 43821U, 71106U, 213935U, 94291U, |
| 63315 | 236743U, 170369U, 52990U, 80554U, 223383U, 112000U, 254503U, 138864U, |
| 63316 | 169429U, 136804U, 42984U, 70217U, 212994U, 93353U, 235780U, 167618U, |
| 63317 | 111062U, 253540U, 135422U, 41551U, 68705U, 211403U, 91890U, 234236U, |
| 63318 | 166236U, 109599U, 251996U, 140456U, 44268U, 71583U, 214442U, 94778U, |
| 63319 | 237263U, 171021U, 53561U, 80964U, 223818U, 112487U, 255023U, 137929U, |
| 63320 | 168628U, 138670U, 169235U, 135963U, 42093U, 69276U, 212003U, 92462U, |
| 63321 | 234839U, 166777U, 110171U, 252599U, 134581U, 40660U, 67764U, 210412U, |
| 63322 | 90999U, 233295U, 165395U, 108708U, 251055U, 139272U, 43501U, 70764U, |
| 63323 | 213571U, 93932U, 236359U, 169837U, 52519U, 80250U, 223060U, 111641U, |
| 63324 | 254119U, 137376U, 168175U, 136407U, 42563U, 69772U, 212525U, 92932U, |
| 63325 | 235335U, 167221U, 110641U, 253095U, 135025U, 41130U, 68260U, 210934U, |
| 63326 | 91469U, 233791U, 165839U, 109178U, 251551U, 139896U, 43919U, 71210U, |
| 63327 | 214045U, 94389U, 236847U, 170461U, 53088U, 80658U, 223493U, 112098U, |
| 63328 | 254607U, 138956U, 169521U, 136914U, 43100U, 70339U, 213122U, 93469U, |
| 63329 | 235902U, 167728U, 111178U, 253662U, 135532U, 41667U, 68827U, 211531U, |
| 63330 | 92006U, 234358U, 166346U, 109715U, 252118U, 140558U, 44377U, 71699U, |
| 63331 | 214565U, 94887U, 237379U, 171123U, 53670U, 81080U, 223941U, 112596U, |
| 63332 | 255139U, 138015U, 168714U, 138486U, 169051U, 135743U, 41861U, 69032U, |
| 63333 | 211747U, 92230U, 234595U, 166557U, 109939U, 252355U, 134361U, 40428U, |
| 63334 | 67520U, 210156U, 90767U, 233051U, 165175U, 108476U, 250811U, 139078U, |
| 63335 | 43294U, 70544U, 213338U, 93725U, 236139U, 169643U, 52312U, 80030U, |
| 63336 | 222827U, 111434U, 253899U, 137204U, 168003U, 136187U, 42331U, 69528U, |
| 63337 | 212269U, 92700U, 235091U, 167001U, 110409U, 252851U, 134805U, 40898U, |
| 63338 | 68016U, 210678U, 91237U, 233547U, 165619U, 108946U, 251307U, 139712U, |
| 63339 | 43723U, 71002U, 213825U, 94193U, 236639U, 170277U, 52892U, 80450U, |
| 63340 | 223273U, 111902U, 254399U, 138772U, 169337U, 136694U, 42868U, 70095U, |
| 63341 | 212866U, 93237U, 235658U, 167508U, 110946U, 253418U, 135312U, 41435U, |
| 63342 | 68583U, 211275U, 91774U, 234114U, 166126U, 109483U, 251874U, 140364U, |
| 63343 | 44170U, 71479U, 214332U, 94680U, 237159U, 170929U, 53463U, 80860U, |
| 63344 | 223708U, 112389U, 254919U, 137843U, 168542U, 174750U, 156862U, 193044U, |
| 63345 | 29577U, 172141U, 142310U, 177417U, 28338U, 174836U, 156961U, 193143U, |
| 63346 | 29687U, 172271U, 142452U, 177559U, 28508U, 138595U, 169160U, 135873U, |
| 63347 | 41998U, 69176U, 211898U, 92367U, 234739U, 166687U, 110076U, 252499U, |
| 63348 | 134491U, 40565U, 67664U, 210307U, 90904U, 233195U, 165305U, 108613U, |
| 63349 | 250955U, 139187U, 43410U, 70667U, 213468U, 93841U, 236262U, 169752U, |
| 63350 | 52428U, 80153U, 222957U, 111550U, 254022U, 137306U, 168105U, 136317U, |
| 63351 | 42468U, 69672U, 212420U, 92837U, 235235U, 167131U, 110546U, 252995U, |
| 63352 | 134935U, 41035U, 68160U, 210829U, 91374U, 233691U, 165749U, 109083U, |
| 63353 | 251451U, 139821U, 43839U, 71125U, 213955U, 94309U, 236762U, 170386U, |
| 63354 | 53008U, 80573U, 223403U, 112018U, 254522U, 138881U, 169446U, 136824U, |
| 63355 | 43005U, 70239U, 213017U, 93374U, 235802U, 167638U, 111083U, 253562U, |
| 63356 | 135442U, 41572U, 68727U, 211426U, 91911U, 234258U, 166256U, 109620U, |
| 63357 | 252018U, 140473U, 44286U, 71602U, 214462U, 94796U, 237282U, 171038U, |
| 63358 | 53579U, 80983U, 223838U, 112505U, 255042U, 137945U, 168644U, 139492U, |
| 63359 | 204273U, 130936U, 271433U, 170057U, 207218U, 132118U, 272681U, 52729U, |
| 63360 | 201686U, 129539U, 270063U, 137649U, 203797U, 168324U, 206742U, 140113U, |
| 63361 | 204527U, 131204U, 271715U, 170678U, 207472U, 132386U, 272963U, 53299U, |
| 63362 | 201954U, 129821U, 270359U, 140790U, 204781U, 131472U, 271997U, 171355U, |
| 63363 | 207726U, 132654U, 273245U, 53880U, 202222U, 130103U, 270655U, 138306U, |
| 63364 | 204020U, 168881U, 206965U, 138687U, 169252U, 135983U, 42114U, 69298U, |
| 63365 | 212026U, 92483U, 234861U, 166797U, 110192U, 252621U, 134601U, 40681U, |
| 63366 | 67786U, 210435U, 91020U, 233317U, 165415U, 108729U, 251077U, 139289U, |
| 63367 | 43519U, 70783U, 213591U, 93950U, 236378U, 169854U, 52537U, 80269U, |
| 63368 | 223080U, 111659U, 254138U, 137392U, 168191U, 136427U, 42584U, 69794U, |
| 63369 | 212548U, 92953U, 235357U, 167241U, 110662U, 253117U, 135045U, 41151U, |
| 63370 | 68282U, 210957U, 91490U, 233813U, 165859U, 109199U, 251573U, 139913U, |
| 63371 | 43937U, 71229U, 214065U, 94407U, 236866U, 170478U, 53106U, 80677U, |
| 63372 | 223513U, 112116U, 254626U, 138973U, 169538U, 136934U, 43121U, 70361U, |
| 63373 | 213145U, 93490U, 235924U, 167748U, 111199U, 253684U, 135552U, 41688U, |
| 63374 | 68849U, 211554U, 92027U, 234380U, 166366U, 109736U, 252140U, 140575U, |
| 63375 | 44395U, 71718U, 214585U, 94905U, 237398U, 171140U, 53688U, 81099U, |
| 63376 | 223961U, 112614U, 255158U, 138031U, 168730U, 139550U, 204347U, 131014U, |
| 63377 | 271515U, 170115U, 207292U, 132196U, 272763U, 52791U, 201764U, 129621U, |
| 63378 | 270149U, 137703U, 203867U, 168378U, 206812U, 140171U, 204601U, 131282U, |
| 63379 | 271797U, 170736U, 207546U, 132464U, 273045U, 53361U, 202032U, 129903U, |
| 63380 | 270445U, 140848U, 204855U, 131550U, 272079U, 171413U, 207800U, 132732U, |
| 63381 | 273327U, 53942U, 202300U, 130185U, 270741U, 138360U, 204090U, 168935U, |
| 63382 | 207035U, 138503U, 169068U, 135763U, 41882U, 69054U, 211770U, 92251U, |
| 63383 | 234617U, 166577U, 109960U, 252377U, 134381U, 40449U, 67542U, 210179U, |
| 63384 | 90788U, 233073U, 165195U, 108497U, 250833U, 139095U, 43312U, 70563U, |
| 63385 | 213358U, 93743U, 236158U, 169660U, 52330U, 80049U, 222847U, 111452U, |
| 63386 | 253918U, 137220U, 168019U, 136207U, 42352U, 69550U, 212292U, 92721U, |
| 63387 | 235113U, 167021U, 110430U, 252873U, 134825U, 40919U, 68038U, 210701U, |
| 63388 | 91258U, 233569U, 165639U, 108967U, 251329U, 139729U, 43741U, 71021U, |
| 63389 | 213845U, 94211U, 236658U, 170294U, 52910U, 80469U, 223293U, 111920U, |
| 63390 | 254418U, 138789U, 169354U, 136714U, 42889U, 70117U, 212889U, 93258U, |
| 63391 | 235680U, 167528U, 110967U, 253440U, 135332U, 41456U, 68605U, 211298U, |
| 63392 | 91795U, 234136U, 166146U, 109504U, 251896U, 140381U, 44188U, 71498U, |
| 63393 | 214352U, 94698U, 237178U, 170946U, 53481U, 80879U, 223728U, 112407U, |
| 63394 | 254938U, 137859U, 168558U, 139434U, 204199U, 130858U, 271351U, 169999U, |
| 63395 | 207144U, 132040U, 272599U, 52667U, 201608U, 129457U, 269977U, 137595U, |
| 63396 | 203727U, 168270U, 206672U, 140055U, 204453U, 131126U, 271633U, 170620U, |
| 63397 | 207398U, 132308U, 272881U, 53237U, 201876U, 129739U, 270273U, 140732U, |
| 63398 | 204707U, 131394U, 271915U, 171297U, 207652U, 132576U, 273163U, 53818U, |
| 63399 | 202144U, 130021U, 270569U, 138252U, 203950U, 168827U, 206895U, 138624U, |
| 63400 | 169189U, 135908U, 42035U, 69215U, 211939U, 92404U, 234778U, 166722U, |
| 63401 | 110113U, 252538U, 134526U, 40602U, 67703U, 210348U, 90941U, 233234U, |
| 63402 | 165340U, 108650U, 250994U, 139216U, 43441U, 70700U, 213503U, 93872U, |
| 63403 | 236295U, 169781U, 52459U, 80186U, 222992U, 111581U, 254055U, 137333U, |
| 63404 | 168132U, 136352U, 42505U, 69711U, 212461U, 92874U, 235274U, 167166U, |
| 63405 | 110583U, 253034U, 134970U, 41072U, 68199U, 210870U, 91411U, 233730U, |
| 63406 | 165784U, 109120U, 251490U, 139850U, 43870U, 71158U, 213990U, 94340U, |
| 63407 | 236795U, 170415U, 53039U, 80606U, 223438U, 112049U, 254555U, 138910U, |
| 63408 | 169475U, 136859U, 43042U, 70278U, 213058U, 93411U, 235841U, 167673U, |
| 63409 | 111120U, 253601U, 135477U, 41609U, 68766U, 211467U, 91948U, 234297U, |
| 63410 | 166291U, 109657U, 252057U, 140502U, 44317U, 71635U, 214497U, 94827U, |
| 63411 | 237315U, 171067U, 53610U, 81016U, 223873U, 112536U, 255075U, 137972U, |
| 63412 | 168671U, 138716U, 169281U, 136018U, 42151U, 69337U, 212067U, 92520U, |
| 63413 | 234900U, 166832U, 110229U, 252660U, 134636U, 40718U, 67825U, 210476U, |
| 63414 | 91057U, 233356U, 165450U, 108766U, 251116U, 139318U, 43550U, 70816U, |
| 63415 | 213626U, 93981U, 236411U, 169883U, 52568U, 80302U, 223115U, 111690U, |
| 63416 | 254171U, 137419U, 168218U, 136462U, 42621U, 69833U, 212589U, 92990U, |
| 63417 | 235396U, 167276U, 110699U, 253156U, 135080U, 41188U, 68321U, 210998U, |
| 63418 | 91527U, 233852U, 165894U, 109236U, 251612U, 139942U, 43968U, 71262U, |
| 63419 | 214100U, 94438U, 236899U, 170507U, 53137U, 80710U, 223548U, 112147U, |
| 63420 | 254659U, 139002U, 169567U, 136969U, 43158U, 70400U, 213186U, 93527U, |
| 63421 | 235963U, 167783U, 111236U, 253723U, 135587U, 41725U, 68888U, 211595U, |
| 63422 | 92064U, 234419U, 166401U, 109773U, 252179U, 140604U, 44426U, 71751U, |
| 63423 | 214620U, 94936U, 237431U, 171169U, 53719U, 81132U, 223996U, 112645U, |
| 63424 | 255191U, 138058U, 168757U, 138532U, 169097U, 135798U, 41919U, 69093U, |
| 63425 | 211811U, 92288U, 234656U, 166612U, 109997U, 252416U, 134416U, 40486U, |
| 63426 | 67581U, 210220U, 90825U, 233112U, 165230U, 108534U, 250872U, 139124U, |
| 63427 | 43343U, 70596U, 213393U, 93774U, 236191U, 169689U, 52361U, 80082U, |
| 63428 | 222882U, 111483U, 253951U, 137247U, 168046U, 136242U, 42389U, 69589U, |
| 63429 | 212333U, 92758U, 235152U, 167056U, 110467U, 252912U, 134860U, 40956U, |
| 63430 | 68077U, 210742U, 91295U, 233608U, 165674U, 109004U, 251368U, 139758U, |
| 63431 | 43772U, 71054U, 213880U, 94242U, 236691U, 170323U, 52941U, 80502U, |
| 63432 | 223328U, 111951U, 254451U, 138818U, 169383U, 136749U, 42926U, 70156U, |
| 63433 | 212930U, 93295U, 235719U, 167563U, 111004U, 253479U, 135367U, 41493U, |
| 63434 | 68644U, 211339U, 91832U, 234175U, 166181U, 109541U, 251935U, 140410U, |
| 63435 | 44219U, 71531U, 214387U, 94729U, 237211U, 170975U, 53512U, 80912U, |
| 63436 | 223763U, 112438U, 254971U, 137886U, 168585U, 174793U, 156905U, 193087U, |
| 63437 | 29632U, 172181U, 142350U, 177457U, 28390U, 174879U, 157004U, 193186U, |
| 63438 | 29742U, 172311U, 142492U, 177599U, 28560U, 174766U, 156878U, 193060U, |
| 63439 | 29597U, 172156U, 142325U, 177432U, 28357U, 174852U, 156977U, 193159U, |
| 63440 | 29707U, 172286U, 142467U, 177574U, 28527U, 172221U, 207906U, 142390U, |
| 63441 | 205035U, 177497U, 208112U, 30184U, 28442U, 172351U, 207972U, 142532U, |
| 63442 | 205101U, 177639U, 208178U, 30266U, 28612U, 149612U, 48398U, 75904U, |
| 63443 | 218718U, 101781U, 244166U, 185277U, 122033U, 262612U, 145004U, 45654U, |
| 63444 | 73035U, 215888U, 97305U, 239768U, 180259U, 117100U, 257730U, 161743U, |
| 63445 | 50938U, 78572U, 221362U, 106220U, 248562U, 198061U, 54343U, 81576U, |
| 63446 | 224471U, 126952U, 267517U, 161961U, 106355U, 248692U, 198279U, 54439U, |
| 63447 | 81680U, 224583U, 127087U, 267647U, 138655U, 169220U, 135945U, 42074U, |
| 63448 | 69256U, 211982U, 92443U, 234819U, 166759U, 110152U, 252579U, 134563U, |
| 63449 | 40641U, 67744U, 210391U, 90980U, 233275U, 165377U, 108689U, 251035U, |
| 63450 | 139247U, 43474U, 70735U, 213540U, 93905U, 236330U, 169812U, 52492U, |
| 63451 | 80221U, 223029U, 111614U, 254090U, 137362U, 168161U, 136389U, 42544U, |
| 63452 | 69752U, 212504U, 92913U, 235315U, 167203U, 110622U, 253075U, 135007U, |
| 63453 | 41111U, 68240U, 210913U, 91450U, 233771U, 165821U, 109159U, 251531U, |
| 63454 | 139881U, 43903U, 71193U, 214027U, 94373U, 236830U, 170446U, 53072U, |
| 63455 | 80641U, 223475U, 112082U, 254590U, 138941U, 169506U, 136896U, 43081U, |
| 63456 | 70319U, 213101U, 93450U, 235882U, 167710U, 111159U, 253642U, 135514U, |
| 63457 | 41648U, 68807U, 211510U, 91987U, 234338U, 166328U, 109696U, 252098U, |
| 63458 | 140533U, 44350U, 71670U, 214534U, 94860U, 237350U, 171098U, 53643U, |
| 63459 | 81051U, 223910U, 112569U, 255110U, 138001U, 168700U, 139535U, 204328U, |
| 63460 | 130994U, 271494U, 170100U, 207273U, 132176U, 272742U, 52775U, 201744U, |
| 63461 | 129600U, 270127U, 137689U, 203849U, 168364U, 206794U, 140156U, 204582U, |
| 63462 | 131262U, 271776U, 170721U, 207527U, 132444U, 273024U, 53345U, 202012U, |
| 63463 | 129882U, 270423U, 140833U, 204836U, 131530U, 272058U, 171398U, 207781U, |
| 63464 | 132712U, 273306U, 53926U, 202280U, 130164U, 270719U, 138346U, 204072U, |
| 63465 | 168921U, 207017U, 138747U, 169312U, 136055U, 42190U, 69378U, 212110U, |
| 63466 | 92559U, 234941U, 166869U, 110268U, 252701U, 134673U, 40757U, 67866U, |
| 63467 | 210519U, 91096U, 233397U, 165487U, 108805U, 251157U, 139349U, 43583U, |
| 63468 | 70851U, 213663U, 94014U, 236446U, 169914U, 52601U, 80337U, 223152U, |
| 63469 | 111723U, 254206U, 137448U, 168247U, 136499U, 42660U, 69874U, 212632U, |
| 63470 | 93029U, 235437U, 167313U, 110738U, 253197U, 135117U, 41227U, 68362U, |
| 63471 | 211041U, 91566U, 233893U, 165931U, 109275U, 251653U, 139973U, 44001U, |
| 63472 | 71297U, 214137U, 94471U, 236934U, 170538U, 53170U, 80745U, 223585U, |
| 63473 | 112180U, 254694U, 139033U, 169598U, 137006U, 43197U, 70441U, 213229U, |
| 63474 | 93566U, 236004U, 167820U, 111275U, 253764U, 135624U, 41764U, 68929U, |
| 63475 | 211638U, 92103U, 234460U, 166438U, 109812U, 252220U, 140635U, 44459U, |
| 63476 | 71786U, 214657U, 94969U, 237466U, 171200U, 53752U, 81167U, 224033U, |
| 63477 | 112678U, 255226U, 138087U, 168786U, 139593U, 204402U, 131072U, 271576U, |
| 63478 | 170158U, 207347U, 132254U, 272824U, 52837U, 201822U, 129682U, 270213U, |
| 63479 | 137743U, 203919U, 168418U, 206864U, 140214U, 204656U, 131340U, 271858U, |
| 63480 | 170779U, 207601U, 132522U, 273106U, 53407U, 202090U, 129964U, 270509U, |
| 63481 | 140891U, 204910U, 131608U, 272140U, 171456U, 207855U, 132790U, 273388U, |
| 63482 | 53988U, 202358U, 130246U, 270805U, 138400U, 204142U, 168975U, 207087U, |
| 63483 | 138563U, 169128U, 135835U, 41958U, 69134U, 211854U, 92327U, 234697U, |
| 63484 | 166649U, 110036U, 252457U, 134453U, 40525U, 67622U, 210263U, 90864U, |
| 63485 | 233153U, 165267U, 108573U, 250913U, 139155U, 43376U, 70631U, 213430U, |
| 63486 | 93807U, 236226U, 169720U, 52394U, 80117U, 222919U, 111516U, 253986U, |
| 63487 | 137276U, 168075U, 136279U, 42428U, 69630U, 212376U, 92797U, 235193U, |
| 63488 | 167093U, 110506U, 252953U, 134897U, 40995U, 68118U, 210785U, 91334U, |
| 63489 | 233649U, 165711U, 109043U, 251409U, 139789U, 43805U, 71089U, 213917U, |
| 63490 | 94275U, 236726U, 170354U, 52974U, 80537U, 223365U, 111984U, 254486U, |
| 63491 | 138849U, 169414U, 136786U, 42965U, 70197U, 212973U, 93334U, 235760U, |
| 63492 | 167600U, 111043U, 253520U, 135404U, 41532U, 68685U, 211382U, 91871U, |
| 63493 | 234216U, 166218U, 109580U, 251976U, 140441U, 44252U, 71566U, 214424U, |
| 63494 | 94762U, 237246U, 171006U, 53545U, 80947U, 223800U, 112471U, 255006U, |
| 63495 | 137915U, 168614U, 139477U, 204254U, 130916U, 271412U, 170042U, 207199U, |
| 63496 | 132098U, 272660U, 52713U, 201666U, 129518U, 270041U, 137635U, 203779U, |
| 63497 | 168310U, 206724U, 140098U, 204508U, 131184U, 271694U, 170663U, 207453U, |
| 63498 | 132366U, 272942U, 53283U, 201934U, 129800U, 270337U, 140775U, 204762U, |
| 63499 | 131452U, 271976U, 171340U, 207707U, 132634U, 273224U, 53864U, 202202U, |
| 63500 | 130082U, 270633U, 138292U, 204002U, 168867U, 206947U, 174822U, 156934U, |
| 63501 | 193116U, 29669U, 172208U, 142377U, 177484U, 28425U, 174908U, 157033U, |
| 63502 | 193215U, 29779U, 172338U, 142519U, 177626U, 28595U, 172258U, 207955U, |
| 63503 | 142427U, 205084U, 177534U, 208161U, 30245U, 28491U, 172388U, 208021U, |
| 63504 | 142569U, 205150U, 177676U, 208227U, 30327U, 28661U, 138609U, 169174U, |
| 63505 | 135890U, 42016U, 69195U, 211918U, 92385U, 234758U, 166704U, 110094U, |
| 63506 | 252518U, 134508U, 40583U, 67683U, 210327U, 90922U, 233214U, 165322U, |
| 63507 | 108631U, 250974U, 139201U, 43425U, 70683U, 213485U, 93856U, 236278U, |
| 63508 | 169766U, 52443U, 80169U, 222974U, 111565U, 254038U, 137319U, 168118U, |
| 63509 | 136334U, 42486U, 69691U, 212440U, 92855U, 235254U, 167148U, 110564U, |
| 63510 | 253014U, 134952U, 41053U, 68179U, 210849U, 91392U, 233710U, 165766U, |
| 63511 | 109101U, 251470U, 139835U, 43854U, 71141U, 213972U, 94324U, 236778U, |
| 63512 | 170400U, 53023U, 80589U, 223420U, 112033U, 254538U, 138895U, 169460U, |
| 63513 | 136841U, 43023U, 70258U, 213037U, 93392U, 235821U, 167655U, 111101U, |
| 63514 | 253581U, 135459U, 41590U, 68746U, 211446U, 91929U, 234277U, 166273U, |
| 63515 | 109638U, 252037U, 140487U, 44301U, 71618U, 214479U, 94811U, 237298U, |
| 63516 | 171052U, 53594U, 80999U, 223855U, 112520U, 255058U, 137958U, 168657U, |
| 63517 | 139506U, 204291U, 130955U, 271453U, 170071U, 207236U, 132137U, 272701U, |
| 63518 | 52744U, 201705U, 129559U, 270084U, 137662U, 203814U, 168337U, 206759U, |
| 63519 | 140127U, 204545U, 131223U, 271735U, 170692U, 207490U, 132405U, 272983U, |
| 63520 | 53314U, 201973U, 129841U, 270380U, 140804U, 204799U, 131491U, 272017U, |
| 63521 | 171369U, 207744U, 132673U, 273265U, 53895U, 202241U, 130123U, 270676U, |
| 63522 | 138319U, 204037U, 168894U, 206982U, 138701U, 169266U, 136000U, 42132U, |
| 63523 | 69317U, 212046U, 92501U, 234880U, 166814U, 110210U, 252640U, 134618U, |
| 63524 | 40699U, 67805U, 210455U, 91038U, 233336U, 165432U, 108747U, 251096U, |
| 63525 | 139303U, 43534U, 70799U, 213608U, 93965U, 236394U, 169868U, 52552U, |
| 63526 | 80285U, 223097U, 111674U, 254154U, 137405U, 168204U, 136444U, 42602U, |
| 63527 | 69813U, 212568U, 92971U, 235376U, 167258U, 110680U, 253136U, 135062U, |
| 63528 | 41169U, 68301U, 210977U, 91508U, 233832U, 165876U, 109217U, 251592U, |
| 63529 | 139927U, 43952U, 71245U, 214082U, 94422U, 236882U, 170492U, 53121U, |
| 63530 | 80693U, 223530U, 112131U, 254642U, 138987U, 169552U, 136951U, 43139U, |
| 63531 | 70380U, 213165U, 93508U, 235943U, 167765U, 111217U, 253703U, 135569U, |
| 63532 | 41706U, 68868U, 211574U, 92045U, 234399U, 166383U, 109754U, 252159U, |
| 63533 | 140589U, 44410U, 71734U, 214602U, 94920U, 237414U, 171154U, 53703U, |
| 63534 | 81115U, 223978U, 112629U, 255174U, 138044U, 168743U, 139564U, 204365U, |
| 63535 | 131033U, 271535U, 170129U, 207310U, 132215U, 272783U, 52806U, 201783U, |
| 63536 | 129641U, 270170U, 137716U, 203884U, 168391U, 206829U, 140185U, 204619U, |
| 63537 | 131301U, 271817U, 170750U, 207564U, 132483U, 273065U, 53376U, 202051U, |
| 63538 | 129923U, 270466U, 140862U, 204873U, 131569U, 272099U, 171427U, 207818U, |
| 63539 | 132751U, 273347U, 53957U, 202319U, 130205U, 270762U, 138373U, 204107U, |
| 63540 | 168948U, 207052U, 138517U, 169082U, 135780U, 41900U, 69073U, 211790U, |
| 63541 | 92269U, 234636U, 166594U, 109978U, 252396U, 134398U, 40467U, 67561U, |
| 63542 | 210199U, 90806U, 233092U, 165212U, 108515U, 250852U, 139109U, 43327U, |
| 63543 | 70579U, 213375U, 93758U, 236174U, 169674U, 52345U, 80065U, 222864U, |
| 63544 | 111467U, 253934U, 137233U, 168032U, 136224U, 42370U, 69569U, 212312U, |
| 63545 | 92739U, 235132U, 167038U, 110448U, 252892U, 134842U, 40937U, 68057U, |
| 63546 | 210721U, 91276U, 233588U, 165656U, 108985U, 251348U, 139743U, 43756U, |
| 63547 | 71037U, 213862U, 94226U, 236674U, 170308U, 52925U, 80485U, 223310U, |
| 63548 | 111935U, 254434U, 138803U, 169368U, 136731U, 42907U, 70136U, 212909U, |
| 63549 | 93276U, 235699U, 167545U, 110985U, 253459U, 135349U, 41474U, 68624U, |
| 63550 | 211318U, 91813U, 234155U, 166163U, 109522U, 251915U, 140395U, 44203U, |
| 63551 | 71514U, 214369U, 94713U, 237194U, 170960U, 53496U, 80895U, 223745U, |
| 63552 | 112422U, 254954U, 137872U, 168571U, 139448U, 204217U, 130877U, 271371U, |
| 63553 | 170013U, 207162U, 132059U, 272619U, 52682U, 201627U, 129477U, 269998U, |
| 63554 | 137608U, 203744U, 168283U, 206689U, 140069U, 204471U, 131145U, 271653U, |
| 63555 | 170634U, 207416U, 132327U, 272901U, 53252U, 201895U, 129759U, 270294U, |
| 63556 | 140746U, 204725U, 131413U, 271935U, 171311U, 207670U, 132595U, 273183U, |
| 63557 | 53833U, 202163U, 130041U, 270590U, 138265U, 203967U, 168840U, 206912U, |
| 63558 | 174779U, 156891U, 193073U, 29614U, 172168U, 142337U, 177444U, 28373U, |
| 63559 | 174865U, 156990U, 193172U, 29724U, 172298U, 142479U, 177586U, 28543U, |
| 63560 | 172233U, 207922U, 142402U, 205051U, 177509U, 208128U, 30204U, 28458U, |
| 63561 | 172363U, 207988U, 142544U, 205117U, 177651U, 208194U, 30286U, 28628U, |
| 63562 | 149034U, 47921U, 75419U, 101204U, 184619U, 121353U, 144407U, 45177U, |
| 63563 | 72550U, 96708U, 179582U, 116400U, 161000U, 50551U, 78174U, 105666U, |
| 63564 | 197228U, 126313U, 149710U, 48503U, 76016U, 101886U, 185375U, 122138U, |
| 63565 | 145102U, 45759U, 73147U, 97410U, 180357U, 117205U, 161820U, 51022U, |
| 63566 | 78663U, 106304U, 198138U, 127036U, 151351U, 49868U, 77442U, 103510U, |
| 63567 | 187035U, 123781U, 146742U, 47153U, 74604U, 99063U, 182044U, 118877U, |
| 63568 | 163582U, 52161U, 79868U, 107745U, 200018U, 128493U, 161330U, 105814U, |
| 63569 | 197621U, 126532U, 162071U, 106393U, 198389U, 127125U, 163848U, 107836U, |
| 63570 | 200326U, 128600U, 157818U, 193957U, 153485U, 189443U, 159155U, 195106U, |
| 63571 | 155657U, 191739U, 153782U, 189749U, 155849U, 191918U, 157645U, 148827U, |
| 63572 | 144214U, 160846U, 153307U, 158971U, 151144U, 146549U, 163428U, 155467U, |
| 63573 | 137462U, 138101U, 137524U, 138171U, 137493U, 138132U, 137555U, 138202U, |
| 63574 | 157729U, 148992U, 144365U, 160967U, 153404U, 159066U, 151309U, 146700U, |
| 63575 | 163549U, 155564U, 136103U, 42241U, 69432U, 212167U, 92610U, 234995U, |
| 63576 | 166917U, 110319U, 252755U, 134721U, 40808U, 67920U, 210576U, 91147U, |
| 63577 | 233451U, 165535U, 108856U, 251211U, 139412U, 43651U, 70924U, 213741U, |
| 63578 | 94082U, 236519U, 169977U, 52643U, 80382U, 223200U, 111791U, 254279U, |
| 63579 | 136560U, 42725U, 69943U, 212705U, 93094U, 235506U, 167374U, 110803U, |
| 63580 | 253266U, 135178U, 41292U, 68431U, 211114U, 91631U, 233962U, 165992U, |
| 63581 | 109340U, 251722U, 140022U, 44054U, 71354U, 214198U, 94524U, 236991U, |
| 63582 | 170587U, 53213U, 80791U, 223634U, 112233U, 254751U, 137069U, 43264U, |
| 63583 | 70512U, 213304U, 93633U, 236075U, 167883U, 111342U, 253835U, 135687U, |
| 63584 | 41831U, 69000U, 211713U, 92170U, 234531U, 166501U, 109879U, 252291U, |
| 63585 | 140710U, 44540U, 71873U, 214750U, 95050U, 237553U, 171275U, 53794U, |
| 63586 | 81212U, 224081U, 112759U, 255313U, 139646U, 94132U, 236573U, 170211U, |
| 63587 | 52879U, 80436U, 223258U, 111841U, 254333U, 140268U, 94587U, 237059U, |
| 63588 | 170833U, 53450U, 80846U, 223693U, 112296U, 254819U, 140944U, 95100U, |
| 63589 | 237607U, 171509U, 54030U, 81266U, 224139U, 112809U, 255367U, 56770U, |
| 63590 | 83819U, 226785U, 60370U, 86462U, 229272U, 65235U, 89512U, 232011U, |
| 63591 | 56265U, 83286U, 226275U, 59696U, 85766U, 228716U, 64561U, 88816U, |
| 63592 | 231455U, 57303U, 84384U, 227334U, 61525U, 87177U, 229863U, 66390U, |
| 63593 | 40106U, 67177U, 209820U, 90227U, 232602U, 56842U, 83895U, 226848U, |
| 63594 | 60453U, 86550U, 229332U, 65318U, 89600U, 232071U, 56337U, 83362U, |
| 63595 | 226338U, 59779U, 85854U, 228776U, 64644U, 88904U, 231515U, 57363U, |
| 63596 | 84448U, 227388U, 61662U, 87312U, 229980U, 66527U, 40228U, 67307U, |
| 63597 | 209944U, 90362U, 232719U, 57034U, 84098U, 227045U, 60697U, 86790U, |
| 63598 | 229537U, 65562U, 89840U, 232276U, 56529U, 83565U, 226535U, 60023U, |
| 63599 | 86094U, 228981U, 64888U, 89144U, 231720U, 57522U, 84618U, 227555U, |
| 63600 | 61901U, 87541U, 230185U, 66766U, 40350U, 67437U, 210068U, 90591U, |
| 63601 | 232924U, 61594U, 87239U, 229929U, 66459U, 40168U, 67243U, 209890U, |
| 63602 | 90289U, 232668U, 61702U, 87343U, 230013U, 66567U, 40259U, 67340U, |
| 63603 | 209979U, 90393U, 232752U, 61970U, 87603U, 230251U, 66835U, 40412U, |
| 63604 | 67503U, 210138U, 90653U, 232990U, 61086U, 65951U, 56571U, 83609U, |
| 63605 | 226581U, 60153U, 86232U, 229078U, 65018U, 89282U, 231817U, 56066U, |
| 63606 | 83076U, 226071U, 59479U, 85536U, 228522U, 64344U, 88586U, 231261U, |
| 63607 | 57137U, 84207U, 227160U, 61347U, 86986U, 229699U, 66212U, 90036U, |
| 63608 | 232438U, 60809U, 65674U, 61067U, 65932U, 56548U, 83585U, 226556U, |
| 63609 | 60131U, 86209U, 229054U, 64996U, 89259U, 231793U, 56043U, 83052U, |
| 63610 | 226046U, 59457U, 85513U, 228498U, 64322U, 88563U, 231237U, 57117U, |
| 63611 | 84186U, 227138U, 61328U, 86966U, 229678U, 66193U, 90016U, 232417U, |
| 63612 | 60791U, 65656U, 157141U, 193323U, 147984U, 100198U, 242662U, 183503U, |
| 63613 | 120232U, 260877U, 143358U, 95673U, 238212U, 178439U, 115250U, 255943U, |
| 63614 | 160150U, 104826U, 247225U, 196291U, 125379U, 265988U, 152397U, 188319U, |
| 63615 | 157614U, 193782U, 153279U, 189284U, 158940U, 194920U, 155414U, 191533U, |
| 63616 | 157571U, 193739U, 153240U, 189245U, 158897U, 194877U, 155375U, 191494U, |
| 63617 | 147570U, 183108U, 143133U, 95451U, 237977U, 178150U, 114959U, 255635U, |
| 63618 | 159903U, 104575U, 246957U, 195924U, 124999U, 265583U, 160027U, 104707U, |
| 63619 | 247097U, 196116U, 125203U, 265799U, 143019U, 95331U, 237851U, 178040U, |
| 63620 | 114843U, 255513U, 159716U, 104513U, 246891U, 195674U, 124901U, 265479U, |
| 63621 | 159935U, 104609U, 246993U, 195990U, 125069U, 265657U, 147614U, 183150U, |
| 63622 | 143152U, 95471U, 237998U, 178189U, 115000U, 255678U, 159919U, 104592U, |
| 63623 | 246975U, 195957U, 125034U, 265620U, 160043U, 104724U, 247115U, 196149U, |
| 63624 | 125238U, 265836U, 143038U, 95351U, 237872U, 178079U, 114884U, 255556U, |
| 63625 | 159732U, 104530U, 246909U, 195707U, 124936U, 265516U, 159951U, 104626U, |
| 63626 | 247011U, 196023U, 125104U, 265694U, 163596U, 200061U, 155594U, 191689U, |
| 63627 | 159222U, 155916U, 24660U, 26082U, 4145U, 174981U, 157794U, 174421U, |
| 63628 | 153463U, 175096U, 159131U, 174673U, 155635U, 157603U, 193771U, 148771U, |
| 63629 | 47723U, 75208U, 218036U, 100989U, 243377U, 184418U, 121138U, 261714U, |
| 63630 | 144158U, 44964U, 72323U, 215189U, 96478U, 238942U, 179367U, 116170U, |
| 63631 | 256795U, 160802U, 50380U, 77989U, 220783U, 105481U, 247826U, 197058U, |
| 63632 | 126128U, 266690U, 153269U, 189274U, 149641U, 48429U, 75937U, 218753U, |
| 63633 | 101812U, 244199U, 185306U, 122064U, 262645U, 145033U, 45685U, 73068U, |
| 63634 | 215923U, 97336U, 239801U, 180288U, 117131U, 257763U, 161766U, 50963U, |
| 63635 | 78599U, 221391U, 106245U, 248589U, 198084U, 126977U, 267544U, 158929U, |
| 63636 | 194909U, 151088U, 49670U, 77231U, 220028U, 103295U, 245684U, 186834U, |
| 63637 | 123566U, 264150U, 146493U, 46940U, 74377U, 217214U, 98833U, 241301U, |
| 63638 | 181829U, 118647U, 259283U, 163384U, 51990U, 79683U, 222472U, 107560U, |
| 63639 | 249913U, 199824U, 128308U, 268885U, 155404U, 191523U, 161242U, 197518U, |
| 63640 | 153621U, 189600U, 161984U, 198302U, 163771U, 200249U, 155724U, 191818U, |
| 63641 | 157808U, 193947U, 149078U, 47953U, 75453U, 218276U, 101251U, 243637U, |
| 63642 | 184681U, 121419U, 261994U, 144451U, 45209U, 72584U, 215446U, 96755U, |
| 63643 | 239218U, 179644U, 116466U, 257091U, 161035U, 50577U, 78202U, 220995U, |
| 63644 | 105704U, 248051U, 197278U, 54169U, 81416U, 224300U, 126367U, 266932U, |
| 63645 | 153476U, 189434U, 149740U, 48535U, 76050U, 218853U, 101918U, 244293U, |
| 63646 | 185405U, 122170U, 262739U, 145132U, 45791U, 73181U, 216023U, 97442U, |
| 63647 | 239895U, 180387U, 117237U, 257857U, 161844U, 51048U, 78691U, 221473U, |
| 63648 | 106330U, 248665U, 198162U, 54414U, 81653U, 224554U, 127062U, 267620U, |
| 63649 | 159145U, 195096U, 151395U, 49900U, 77476U, 220268U, 103557U, 245944U, |
| 63650 | 187097U, 123847U, 264430U, 146786U, 47185U, 74638U, 217471U, 99110U, |
| 63651 | 241577U, 182106U, 118943U, 259579U, 163630U, 52187U, 79896U, 222684U, |
| 63652 | 107783U, 250138U, 200095U, 54992U, 82245U, 225185U, 128547U, 269127U, |
| 63653 | 155648U, 191730U, 161391U, 205996U, 131773U, 272315U, 197682U, 209073U, |
| 63654 | 132955U, 273563U, 202834U, 130440U, 271010U, 153773U, 205311U, 189740U, |
| 63655 | 208388U, 162117U, 206219U, 131899U, 272449U, 198435U, 209296U, 133081U, |
| 63656 | 273697U, 203056U, 130593U, 271172U, 163898U, 206658U, 132025U, 272583U, |
| 63657 | 200376U, 209735U, 133207U, 273831U, 203506U, 130746U, 271334U, 155840U, |
| 63658 | 205534U, 191909U, 208611U, 22769U, 137810U, 7592U, 157592U, 193760U, |
| 63659 | 148757U, 47708U, 75192U, 218019U, 100974U, 243361U, 184404U, 121123U, |
| 63660 | 261698U, 144144U, 44949U, 72307U, 215172U, 96463U, 238926U, 179353U, |
| 63661 | 116155U, 256779U, 160791U, 50368U, 77976U, 220769U, 105469U, 247813U, |
| 63662 | 197047U, 126116U, 266677U, 153259U, 189264U, 149627U, 48414U, 75921U, |
| 63663 | 218736U, 101797U, 244183U, 185292U, 122049U, 262629U, 145019U, 45670U, |
| 63664 | 73052U, 215906U, 97321U, 239785U, 180274U, 117116U, 257747U, 161755U, |
| 63665 | 50951U, 78586U, 221377U, 106233U, 248576U, 198073U, 126965U, 267531U, |
| 63666 | 158918U, 194898U, 151074U, 49655U, 77215U, 220011U, 103280U, 245668U, |
| 63667 | 186820U, 123551U, 264134U, 146479U, 46925U, 74361U, 217197U, 98818U, |
| 63668 | 241285U, 181815U, 118632U, 259267U, 163373U, 51978U, 79670U, 222458U, |
| 63669 | 107548U, 249900U, 199813U, 128296U, 268872U, 155394U, 191513U, 161231U, |
| 63670 | 197507U, 153611U, 189590U, 161973U, 198291U, 163760U, 200238U, 155714U, |
| 63671 | 191808U, 157719U, 193886U, 148979U, 47880U, 75375U, 218213U, 101163U, |
| 63672 | 243562U, 184581U, 121312U, 261899U, 144352U, 45136U, 72506U, 215383U, |
| 63673 | 96667U, 239143U, 179544U, 116359U, 256996U, 160957U, 50519U, 78139U, |
| 63674 | 220944U, 105634U, 247991U, 197199U, 54147U, 81392U, 224274U, 126281U, |
| 63675 | 266855U, 153395U, 189379U, 149697U, 48489U, 76001U, 218821U, 101872U, |
| 63676 | 244263U, 185362U, 122124U, 262709U, 145089U, 45745U, 73132U, 215991U, |
| 63677 | 97396U, 239865U, 180344U, 117191U, 257827U, 161810U, 51011U, 78651U, |
| 63678 | 221447U, 106293U, 248641U, 198128U, 54392U, 81629U, 224528U, 127025U, |
| 63679 | 267596U, 159056U, 195035U, 151296U, 49827U, 77398U, 220205U, 103469U, |
| 63680 | 245869U, 186997U, 123740U, 264335U, 146687U, 47112U, 74560U, 217408U, |
| 63681 | 99022U, 241502U, 182006U, 118836U, 259484U, 163539U, 52129U, 79833U, |
| 63682 | 222633U, 107713U, 250078U, 199989U, 54970U, 82221U, 225159U, 128461U, |
| 63683 | 269050U, 155555U, 191650U, 161320U, 205968U, 131743U, 272283U, 197596U, |
| 63684 | 209045U, 132925U, 273531U, 202804U, 130408U, 270976U, 153680U, 205285U, |
| 63685 | 189659U, 208362U, 162051U, 206191U, 131869U, 272417U, 198369U, 209268U, |
| 63686 | 133051U, 273665U, 203026U, 130561U, 271138U, 163838U, 206630U, 131995U, |
| 63687 | 272551U, 200316U, 209707U, 133177U, 273799U, 203476U, 130714U, 271300U, |
| 63688 | 155798U, 205508U, 191867U, 208585U, 21698U, 1494U, 3640U, 22761U, |
| 63689 | 162155U, 198518U, 154292U, 190391U, 197692U, 189759U, 174947U, 157547U, |
| 63690 | 193715U, 29830U, 173671U, 113774U, 148730U, 100945U, 243330U, 184377U, |
| 63691 | 29102U, 121094U, 27801U, 261667U, 30690U, 172907U, 113194U, 144117U, |
| 63692 | 96434U, 238895U, 179326U, 28911U, 116126U, 27600U, 256748U, 30479U, |
| 63693 | 175498U, 114450U, 160770U, 105446U, 247788U, 197026U, 30024U, 126093U, |
| 63694 | 27984U, 266652U, 30883U, 174370U, 153209U, 189214U, 29359U, 175062U, |
| 63695 | 158873U, 194853U, 29878U, 173962U, 113926U, 151047U, 103251U, 245637U, |
| 63696 | 186793U, 29138U, 123522U, 27839U, 264103U, 30730U, 173170U, 113346U, |
| 63697 | 146452U, 98789U, 241254U, 181788U, 28947U, 118603U, 27638U, 259236U, |
| 63698 | 30519U, 175783U, 114597U, 163352U, 107525U, 249875U, 199792U, 30082U, |
| 63699 | 128273U, 28046U, 268847U, 30949U, 174609U, 155353U, 191472U, 29469U, |
| 63700 | 158172U, 194296U, 149753U, 101932U, 244308U, 185478U, 122184U, 262754U, |
| 63701 | 145145U, 97456U, 239910U, 180460U, 117251U, 257872U, 162283U, 106432U, |
| 63702 | 248759U, 198694U, 127164U, 267714U, 154426U, 190533U, 162127U, 198472U, |
| 63703 | 154204U, 190286U, 200162U, 191775U, 173405U, 113510U, 147667U, 99879U, |
| 63704 | 242325U, 183186U, 28983U, 119911U, 27676U, 260537U, 30559U, 172561U, |
| 63705 | 112846U, 142943U, 95251U, 237767U, 177944U, 28792U, 114742U, 27475U, |
| 63706 | 255407U, 30348U, 175121U, 114090U, 159652U, 104445U, 246819U, 195593U, |
| 63707 | 29923U, 124815U, 27877U, 265388U, 30770U, 173437U, 113544U, 147765U, |
| 63708 | 99982U, 242433U, 183240U, 29023U, 119968U, 27718U, 260597U, 30603U, |
| 63709 | 172633U, 112922U, 143057U, 95371U, 237893U, 178098U, 28832U, 114904U, |
| 63710 | 27517U, 255577U, 30392U, 175181U, 114154U, 159748U, 104547U, 246927U, |
| 63711 | 195723U, 29957U, 124953U, 27913U, 265534U, 30808U, 174922U, 157089U, |
| 63712 | 193258U, 29797U, 174292U, 152283U, 188162U, 29263U, 173469U, 113578U, |
| 63713 | 147838U, 100059U, 242514U, 183313U, 29063U, 120045U, 27760U, 260678U, |
| 63714 | 30647U, 172705U, 112998U, 143212U, 95534U, 238064U, 178249U, 28872U, |
| 63715 | 115063U, 27559U, 255744U, 30436U, 175290U, 114254U, 160002U, 104680U, |
| 63716 | 247068U, 196074U, 29991U, 125158U, 27949U, 265751U, 30846U, 173421U, |
| 63717 | 113527U, 147683U, 99896U, 242343U, 183202U, 29003U, 119928U, 27697U, |
| 63718 | 260555U, 30581U, 172577U, 112863U, 142959U, 95268U, 237785U, 177960U, |
| 63719 | 28812U, 114759U, 27496U, 255425U, 30370U, 175134U, 114104U, 159665U, |
| 63720 | 104459U, 246834U, 195606U, 29940U, 124829U, 27895U, 265403U, 30789U, |
| 63721 | 173453U, 113561U, 147781U, 99999U, 242451U, 183256U, 29043U, 119985U, |
| 63722 | 27739U, 260615U, 30625U, 172649U, 112939U, 143073U, 95388U, 237911U, |
| 63723 | 178114U, 28852U, 114921U, 27538U, 255595U, 30414U, 175194U, 114168U, |
| 63724 | 159890U, 104561U, 246942U, 195865U, 29974U, 124967U, 27931U, 265549U, |
| 63725 | 30827U, 173485U, 113595U, 147854U, 100076U, 242532U, 183329U, 29083U, |
| 63726 | 120062U, 27781U, 260696U, 30669U, 172721U, 113015U, 143228U, 95551U, |
| 63727 | 238082U, 178265U, 28892U, 115080U, 27580U, 255762U, 30458U, 175303U, |
| 63728 | 114268U, 160015U, 104694U, 247083U, 196087U, 30008U, 125172U, 27967U, |
| 63729 | 265766U, 30865U, 175110U, 159232U, 195173U, 29908U, 174695U, 155925U, |
| 63730 | 191993U, 29510U, 199906U, 191596U, 173703U, 148876U, 174380U, 153332U, |
| 63731 | 173994U, 151193U, 174619U, 155492U, 199894U, 191573U, 173717U, 148935U, |
| 63732 | 174390U, 153375U, 174008U, 151252U, 174629U, 155535U, 193826U, 189324U, |
| 63733 | 194964U, 191584U, 157076U, 147869U, 143243U, 160059U, 152271U, 175022U, |
| 63734 | 173911U, 173119U, 175730U, 174531U, 174958U, 173767U, 172975U, 175554U, |
| 63735 | 174400U, 175073U, 174058U, 173238U, 175853U, 174652U, 175687U, 198445U, |
| 63736 | 174487U, 190261U, 175701U, 198486U, 174500U, 190361U, 175207U, 195892U, |
| 63737 | 172127U, 177403U, 162141U, 154279U, 175654U, 114545U, 161370U, 201474U, |
| 63738 | 105846U, 248174U, 197661U, 30054U, 126564U, 28016U, 267114U, 30917U, |
| 63739 | 174444U, 153754U, 201448U, 189721U, 29387U, 195878U, 177390U, 192003U, |
| 63740 | 158184U, 194308U, 149768U, 101948U, 244325U, 185493U, 122200U, 262771U, |
| 63741 | 145160U, 97472U, 239927U, 180475U, 117267U, 257889U, 162295U, 106445U, |
| 63742 | 248773U, 198706U, 127177U, 267728U, 154437U, 190544U, 175677U, 114570U, |
| 63743 | 162107U, 201488U, 106421U, 248747U, 198425U, 30068U, 127153U, 28031U, |
| 63744 | 267702U, 30933U, 177286U, 158197U, 194321U, 149784U, 101965U, 244343U, |
| 63745 | 185509U, 122217U, 262789U, 145176U, 97489U, 239945U, 180491U, 117284U, |
| 63746 | 257907U, 162308U, 106459U, 248788U, 198719U, 127191U, 267743U, 154449U, |
| 63747 | 190556U, 198459U, 190274U, 175876U, 114637U, 163888U, 201502U, 107868U, |
| 63748 | 250213U, 200366U, 30112U, 128632U, 28078U, 269202U, 30983U, 174686U, |
| 63749 | 155831U, 201461U, 191900U, 29497U, 174970U, 157773U, 193926U, 29845U, |
| 63750 | 173782U, 113808U, 149051U, 101222U, 243606U, 184654U, 29120U, 121390U, |
| 63751 | 27820U, 261963U, 30710U, 172990U, 113228U, 144424U, 96726U, 239187U, |
| 63752 | 179617U, 28929U, 116437U, 27619U, 257060U, 30499U, 175566U, 114478U, |
| 63753 | 161014U, 105681U, 248026U, 197257U, 30039U, 126344U, 28000U, 266907U, |
| 63754 | 30900U, 174411U, 153444U, 189415U, 29373U, 175085U, 159110U, 195075U, |
| 63755 | 29893U, 174073U, 113960U, 151368U, 103528U, 245913U, 187070U, 29156U, |
| 63756 | 123818U, 27858U, 264399U, 30750U, 173253U, 113380U, 146759U, 99081U, |
| 63757 | 241546U, 182079U, 28965U, 118914U, 27657U, 259548U, 30539U, 175865U, |
| 63758 | 114625U, 163609U, 107760U, 250113U, 200074U, 30097U, 128524U, 28062U, |
| 63759 | 269102U, 30966U, 174663U, 155616U, 191711U, 29483U, 190236U, 190247U, |
| 63760 | 174742U, 156823U, 198500U, 190374U, 61231U, 66096U, 61043U, 65908U, |
| 63761 | 137195U, 138441U, 171713U, 176287U, 171910U, 176853U, 16955U, 1671U, |
| 63762 | 3890U, 1560U, 3758U, 157698U, 193865U, 148922U, 47834U, 75326U, |
| 63763 | 218161U, 101117U, 243513U, 184538U, 121266U, 261850U, 144295U, 45075U, |
| 63764 | 72441U, 215314U, 96606U, 239078U, 179487U, 116298U, 256931U, 160912U, |
| 63765 | 50470U, 78086U, 220887U, 105585U, 247938U, 197154U, 54136U, 81380U, |
| 63766 | 224261U, 126232U, 266802U, 153366U, 189360U, 149684U, 48475U, 75986U, |
| 63767 | 218805U, 101858U, 244248U, 185349U, 122110U, 262694U, 145076U, 45731U, |
| 63768 | 73117U, 215975U, 97382U, 239850U, 180331U, 117177U, 257812U, 161800U, |
| 63769 | 51000U, 78639U, 221434U, 106282U, 248629U, 198118U, 54381U, 81617U, |
| 63770 | 224515U, 127014U, 267584U, 159024U, 195003U, 151239U, 49781U, 77349U, |
| 63771 | 220153U, 103423U, 245820U, 186954U, 123694U, 264286U, 146630U, 47051U, |
| 63772 | 74495U, 217339U, 98961U, 241437U, 181949U, 118775U, 259419U, 163494U, |
| 63773 | 52080U, 79780U, 222576U, 107664U, 250025U, 199944U, 54959U, 82209U, |
| 63774 | 225146U, 128412U, 268997U, 155526U, 191631U, 161299U, 205954U, 131728U, |
| 63775 | 272267U, 197575U, 209031U, 132910U, 273515U, 202789U, 130392U, 270959U, |
| 63776 | 153661U, 205272U, 189640U, 208349U, 162041U, 206177U, 131854U, 272401U, |
| 63777 | 198359U, 209254U, 133036U, 273649U, 203011U, 130545U, 271121U, 163828U, |
| 63778 | 206616U, 131980U, 272535U, 200306U, 209693U, 133162U, 273783U, 203461U, |
| 63779 | 130698U, 271283U, 155789U, 205495U, 191858U, 208572U, 141216U, 176325U, |
| 63780 | 141834U, 176904U, 17375U, 23627U, 157743U, 193896U, 149009U, 47894U, |
| 63781 | 75390U, 218229U, 101177U, 243577U, 184594U, 121326U, 261914U, 144382U, |
| 63782 | 45150U, 72521U, 215399U, 96681U, 239158U, 179557U, 116373U, 257011U, |
| 63783 | 160981U, 50530U, 78151U, 220957U, 105645U, 248003U, 197209U, 126292U, |
| 63784 | 266867U, 153417U, 189388U, 159080U, 195045U, 151326U, 49841U, 77413U, |
| 63785 | 220221U, 103483U, 245884U, 187010U, 123754U, 264350U, 146717U, 47126U, |
| 63786 | 74575U, 217424U, 99036U, 241517U, 182019U, 118850U, 259499U, 163563U, |
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| 63817 | 152745U, 188738U, 157110U, 193279U, 147928U, 100138U, 242598U, 183402U, |
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| 63825 | 122433U, 263018U, 145379U, 45956U, 73356U, 216208U, 97705U, 240174U, |
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| 63852 | 263394U, 145774U, 46279U, 73698U, 216532U, 98107U, 240565U, 181109U, |
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| 63858 | 127421U, 267990U, 157487U, 193655U, 153115U, 189111U, 157131U, 193300U, |
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| 63860 | 238197U, 178426U, 115236U, 255928U, 160140U, 104815U, 247213U, 196281U, |
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| 63864 | 156239U, 192345U, 61108U, 65973U, 60830U, 65695U, 148001U, 100216U, |
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| 63868 | 261487U, 143913U, 44718U, 72062U, 214950U, 96217U, 238700U, 179122U, |
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| 63875 | 119325U, 259985U, 164173U, 108122U, 250487U, 200699U, 128925U, 269518U, |
| 63876 | 176100U, 201304U, 176041U, 201235U, 61244U, 66109U, 61055U, 65920U, |
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| 63878 | 143619U, 95951U, 238417U, 178763U, 115595U, 256219U, 160371U, 105053U, |
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| 63881 | 194088U, 149272U, 101419U, 243782U, 184921U, 121654U, 262210U, 144664U, |
| 63882 | 96943U, 239384U, 179903U, 116721U, 257328U, 161469U, 105924U, 248244U, |
| 63883 | 197774U, 126642U, 267184U, 188011U, 124752U, 265322U, 183020U, 119848U, |
| 63884 | 260471U, 201116U, 129352U, 269920U, 153826U, 189814U, 185525U, 180507U, |
| 63885 | 198732U, 184024U, 178960U, 196732U, 158489U, 194585U, 150768U, 102954U, |
| 63886 | 245322U, 186514U, 123225U, 263788U, 146173U, 98492U, 240939U, 181509U, |
| 63887 | 118306U, 258921U, 163127U, 107282U, 249614U, 199567U, 128030U, 268586U, |
| 63888 | 188031U, 124773U, 265344U, 183040U, 119869U, 260493U, 201133U, 129370U, |
| 63889 | 269939U, 154916U, 191119U, 159602U, 195543U, 151995U, 104144U, 246499U, |
| 63890 | 187820U, 124549U, 265107U, 147386U, 99697U, 242132U, 182829U, 119645U, |
| 63891 | 260256U, 164373U, 108327U, 250651U, 200961U, 129185U, 269741U, 188051U, |
| 63892 | 124794U, 265366U, 183060U, 119890U, 260515U, 201150U, 129388U, 269958U, |
| 63893 | 156749U, 192919U, 61157U, 66022U, 60486U, 65351U, 59812U, 64677U, |
| 63894 | 61729U, 66594U, 60950U, 65815U, 176142U, 164531U, 201346U, 30169U, |
| 63895 | 176090U, 164521U, 201284U, 30155U, 60117U, 86194U, 64982U, 89244U, |
| 63896 | 59443U, 85498U, 64308U, 88548U, 61317U, 86954U, 66182U, 90004U, |
| 63897 | 60323U, 39919U, 66977U, 86412U, 65188U, 89462U, 59649U, 39857U, |
| 63898 | 66911U, 85716U, 64514U, 88766U, 61487U, 39981U, 67043U, 87136U, |
| 63899 | 66352U, 90186U, 157166U, 193348U, 148080U, 100300U, 183599U, 120334U, |
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| 63901 | 152433U, 188364U, 157829U, 193968U, 149091U, 47967U, 75468U, 101265U, |
| 63902 | 184694U, 121433U, 144464U, 45223U, 72599U, 96769U, 179657U, 116480U, |
| 63903 | 161045U, 50588U, 78214U, 105715U, 197288U, 126378U, 153495U, 189453U, |
| 63904 | 158451U, 194561U, 150482U, 49129U, 76679U, 102689U, 186227U, 122941U, |
| 63905 | 145887U, 46399U, 73825U, 98227U, 181222U, 118022U, 162884U, 51548U, |
| 63906 | 79227U, 107065U, 199312U, 127797U, 154862U, 191036U, 159449U, 195390U, |
| 63907 | 151818U, 103955U, 187580U, 124293U, 147209U, 99508U, 182589U, 119389U, |
| 63908 | 164221U, 108174U, 200747U, 128977U, 156388U, 192503U, 60894U, 65759U, |
| 63909 | 60922U, 65787U, 157256U, 193438U, 148215U, 100444U, 183797U, 120545U, |
| 63910 | 143589U, 95919U, 178733U, 115563U, 160347U, 105027U, 196550U, 125635U, |
| 63911 | 152615U, 188580U, 157951U, 194076U, 149227U, 48094U, 75581U, 101371U, |
| 63912 | 184876U, 121606U, 144619U, 45350U, 72712U, 96895U, 179858U, 116673U, |
| 63913 | 161433U, 50691U, 78306U, 105885U, 197738U, 126603U, 153792U, 189772U, |
| 63914 | 158477U, 194573U, 150723U, 49367U, 76909U, 102906U, 186469U, 123177U, |
| 63915 | 146128U, 46637U, 74055U, 98444U, 181464U, 118258U, 163091U, 51744U, |
| 63916 | 79418U, 107243U, 199531U, 127991U, 154896U, 191091U, 159590U, 195531U, |
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| 63918 | 164349U, 108301U, 200937U, 129159U, 156715U, 192877U, 60908U, 65773U, |
| 63919 | 60936U, 65801U, 60552U, 39950U, 67010U, 86636U, 65417U, 89686U, |
| 63920 | 59878U, 39888U, 66944U, 85940U, 64743U, 88990U, 61783U, 40006U, |
| 63921 | 67070U, 87414U, 66648U, 90464U, 60178U, 86258U, 65043U, 89308U, |
| 63922 | 59504U, 85562U, 64369U, 88612U, 61369U, 87009U, 66234U, 90059U, |
| 63923 | 60388U, 39934U, 66993U, 86481U, 65253U, 89531U, 59714U, 39872U, |
| 63924 | 66927U, 85785U, 64579U, 88835U, 61609U, 39993U, 67056U, 87255U, |
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| 63926 | 59892U, 39903U, 66960U, 85955U, 64757U, 89005U, 61794U, 40018U, |
| 63927 | 67083U, 87426U, 66659U, 90476U, 60776U, 86874U, 65641U, 89924U, |
| 63928 | 60102U, 86178U, 64967U, 89228U, 62034U, 87672U, 66899U, 90722U, |
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| 63930 | 62023U, 87660U, 66888U, 90710U, 58690U, 63179U, 58728U, 63302U, |
| 63931 | 173590U, 113707U, 183735U, 120479U, 261066U, 172826U, 113127U, 178671U, |
| 63932 | 115497U, 256132U, 175432U, 114395U, 196500U, 125581U, 266144U, 173859U, |
| 63933 | 113871U, 184806U, 121553U, 262120U, 173067U, 113291U, 179769U, 116600U, |
| 63934 | 257217U, 175639U, 114529U, 197606U, 126516U, 267079U, 173944U, 113907U, |
| 63935 | 186399U, 123124U, 263698U, 173152U, 113327U, 181394U, 118205U, 258831U, |
| 63936 | 175768U, 114581U, 199473U, 127947U, 268511U, 174177U, 114071U, 187728U, |
| 63937 | 124451U, 265020U, 173357U, 113491U, 182737U, 119547U, 260169U, 175969U, |
| 63938 | 114726U, 200887U, 129105U, 269669U, 58801U, 63459U, 58708U, 63208U, |
| 63939 | 58780U, 63365U, 58819U, 63488U, 58916U, 63679U, 58898U, 63650U, |
| 63940 | 149209U, 48075U, 75561U, 218373U, 101352U, 243728U, 184858U, 121587U, |
| 63941 | 262156U, 144601U, 45331U, 72692U, 215543U, 96876U, 239330U, 179840U, |
| 63942 | 116654U, 257274U, 161418U, 50675U, 78289U, 221074U, 105869U, 248199U, |
| 63943 | 197723U, 126587U, 267139U, 150705U, 49348U, 76889U, 219684U, 102887U, |
| 63944 | 245268U, 186451U, 123158U, 263734U, 146110U, 46618U, 74035U, 216870U, |
| 63945 | 98425U, 240885U, 181446U, 118239U, 258867U, 163076U, 51728U, 79401U, |
| 63946 | 222185U, 107227U, 249569U, 199516U, 127975U, 268541U, 158614U, 194696U, |
| 63947 | 155084U, 191312U, 157876U, 194001U, 153689U, 189668U, 158666U, 194748U, |
| 63948 | 155145U, 191360U, 157990U, 194115U, 153851U, 189859U, 158640U, 194722U, |
| 63949 | 136679U, 42852U, 70078U, 212848U, 93221U, 235641U, 167493U, 110930U, |
| 63950 | 253401U, 135297U, 41419U, 68566U, 211257U, 91758U, 234097U, 166111U, |
| 63951 | 109467U, 251857U, 140352U, 44157U, 71465U, 214317U, 94667U, 237145U, |
| 63952 | 170917U, 112376U, 254905U, 155121U, 191336U, 157916U, 194041U, 136145U, |
| 63953 | 42286U, 69480U, 212218U, 92655U, 235043U, 166959U, 110364U, 252803U, |
| 63954 | 134763U, 40853U, 67968U, 210627U, 91192U, 233499U, 165577U, 108901U, |
| 63955 | 251259U, 139679U, 43687U, 70963U, 213783U, 94157U, 236600U, 170244U, |
| 63956 | 111866U, 254360U, 153723U, 189690U, 158692U, 194774U, 155169U, 191384U, |
| 63957 | 158014U, 194139U, 153873U, 189881U, 158627U, 194709U, 136664U, 42836U, |
| 63958 | 70061U, 212830U, 93205U, 235624U, 167478U, 110914U, 253384U, 135282U, |
| 63959 | 41403U, 68549U, 211239U, 91742U, 234080U, 166096U, 109451U, 251840U, |
| 63960 | 140340U, 44144U, 71451U, 214302U, 94654U, 237131U, 170905U, 112363U, |
| 63961 | 254891U, 155109U, 191324U, 157888U, 194013U, 136131U, 42271U, 69464U, |
| 63962 | 212201U, 92640U, 235027U, 166945U, 110349U, 252787U, 134749U, 40838U, |
| 63963 | 67952U, 210610U, 91177U, 233483U, 165563U, 108886U, 251243U, 139658U, |
| 63964 | 43675U, 70950U, 213769U, 94145U, 236587U, 170223U, 111854U, 254347U, |
| 63965 | 153712U, 189679U, 158679U, 194761U, 155157U, 191372U, 158002U, 194127U, |
| 63966 | 153862U, 189870U, 158653U, 194735U, 155133U, 191348U, 157928U, 194053U, |
| 63967 | 153734U, 189701U, 158705U, 194787U, 155181U, 191396U, 158026U, 194151U, |
| 63968 | 153884U, 189892U, 147557U, 183080U, 147601U, 183122U, 148052U, 100270U, |
| 63969 | 242699U, 183571U, 120304U, 260914U, 143426U, 95745U, 238249U, 178507U, |
| 63970 | 115322U, 255980U, 160206U, 104886U, 247256U, 196347U, 125439U, 266019U, |
| 63971 | 157477U, 193645U, 143945U, 44752U, 72098U, 214969U, 96251U, 238718U, |
| 63972 | 179154U, 115943U, 256571U, 160631U, 50207U, 77803U, 220599U, 105296U, |
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| 64029 | 50343U, 77949U, 220740U, 105432U, 247773U, 197013U, 126079U, 266637U, |
| 64030 | 151031U, 49624U, 77182U, 219976U, 103234U, 245619U, 186777U, 123505U, |
| 64031 | 264085U, 146436U, 46894U, 74328U, 217162U, 98772U, 241236U, 181772U, |
| 64032 | 118586U, 259218U, 163339U, 51953U, 79643U, 222429U, 107511U, 249860U, |
| 64033 | 199779U, 128259U, 268832U, 149815U, 48565U, 76082U, 218887U, 101998U, |
| 64034 | 244378U, 185577U, 122250U, 262824U, 145207U, 45821U, 73213U, 216057U, |
| 64035 | 97522U, 239980U, 180559U, 117317U, 257942U, 162333U, 51072U, 78717U, |
| 64036 | 221501U, 106486U, 248817U, 198775U, 127218U, 267772U, 151509U, 103640U, |
| 64037 | 246032U, 187226U, 123930U, 264518U, 146900U, 99193U, 241665U, 182235U, |
| 64038 | 119026U, 259667U, 163975U, 107919U, 250268U, 200465U, 128683U, 269257U, |
| 64039 | 151790U, 103925U, 246317U, 187552U, 124263U, 264854U, 147181U, 99478U, |
| 64040 | 241950U, 182561U, 119359U, 260003U, 164199U, 108150U, 250502U, 200725U, |
| 64041 | 128953U, 269533U, 147941U, 100152U, 242613U, 183415U, 120138U, 260777U, |
| 64042 | 143315U, 95627U, 238163U, 178351U, 115156U, 255843U, 160116U, 104789U, |
| 64043 | 247185U, 196221U, 125303U, 265906U, 148466U, 100682U, 243086U, 184130U, |
| 64044 | 120831U, 261423U, 143840U, 96157U, 238636U, 179066U, 115849U, 256489U, |
| 64045 | 160547U, 105220U, 247574U, 196817U, 125867U, 266438U, 150061U, 102260U, |
| 64046 | 244656U, 185823U, 122512U, 263102U, 145453U, 97784U, 240258U, 180805U, |
| 64047 | 117579U, 258220U, 162531U, 106700U, 249047U, 198973U, 127432U, 268002U, |
| 64048 | 151643U, 103768U, 246168U, 187360U, 124058U, 264654U, 147034U, 99321U, |
| 64049 | 241801U, 182369U, 119154U, 259803U, 164082U, 108023U, 250380U, 200572U, |
| 64050 | 128787U, 269369U, 175421U, 196446U, 174320U, 188423U, 175628U, 197366U, |
| 64051 | 174434U, 189512U, 175757U, 199441U, 174551U, 191081U, 175958U, 200806U, |
| 64052 | 30126U, 174723U, 192585U, 29550U, 157432U, 148482U, 143856U, 160560U, |
| 64053 | 153002U, 158379U, 150113U, 145505U, 162574U, 154727U, 157841U, 149106U, |
| 64054 | 144479U, 161057U, 153520U, 158463U, 150497U, 145902U, 162896U, 154873U, |
| 64055 | 152859U, 188852U, 154470U, 190607U, 155999U, 192078U, 154620U, 190779U, |
| 64056 | 157411U, 193593U, 152958U, 188951U, 159508U, 195449U, 156544U, 192706U, |
| 64057 | 152870U, 188863U, 154481U, 190618U, 156068U, 192158U, 154740U, 190905U, |
| 64058 | 154101U, 190107U, 155003U, 191213U, 153959U, 189954U, 154992U, 191202U, |
| 64059 | 159339U, 195280U, 156148U, 192238U, 156799U, 192989U, 155965U, 192044U, |
| 64060 | 154588U, 190739U, 157364U, 193546U, 152882U, 188875U, 159485U, 195426U, |
| 64061 | 156496U, 192658U, 153948U, 189943U, 159292U, 195233U, 156080U, 192170U, |
| 64062 | 160258U, 196435U, 152458U, 188413U, 161090U, 197355U, 153533U, 189502U, |
| 64063 | 163016U, 199430U, 154886U, 191071U, 164233U, 200795U, 156423U, 192562U, |
| 64064 | 149257U, 48126U, 75615U, 218412U, 101403U, 243765U, 184906U, 121638U, |
| 64065 | 262193U, 144649U, 45382U, 72746U, 215582U, 96927U, 239367U, 179888U, |
| 64066 | 116705U, 257311U, 161457U, 50717U, 78334U, 221107U, 105911U, 248230U, |
| 64067 | 197762U, 126629U, 267170U, 150753U, 49399U, 76943U, 219723U, 102938U, |
| 64068 | 245305U, 186499U, 123209U, 263771U, 146158U, 46669U, 74089U, 216909U, |
| 64069 | 98476U, 240922U, 181494U, 118290U, 258904U, 163115U, 51770U, 79446U, |
| 64070 | 222218U, 107269U, 249600U, 199555U, 128017U, 268572U, 153015U, 189011U, |
| 64071 | 154179U, 190211U, 154356U, 190455U, 153026U, 189022U, 154191U, 190223U, |
| 64072 | 154368U, 190467U, 154076U, 190082U, 156842U, 193024U, 154053U, 190059U, |
| 64073 | 156831U, 193013U, 154088U, 190094U, 154064U, 190070U, 158505U, 194601U, |
| 64074 | 136602U, 42770U, 69991U, 212756U, 93139U, 235554U, 167416U, 110848U, |
| 64075 | 253314U, 135220U, 41337U, 68479U, 211165U, 91676U, 234010U, 166034U, |
| 64076 | 109385U, 251770U, 140290U, 44090U, 71393U, 214240U, 94600U, 237073U, |
| 64077 | 170855U, 112309U, 254833U, 154931U, 191154U, 158520U, 194616U, 136619U, |
| 64078 | 42788U, 70010U, 212776U, 93157U, 235573U, 167433U, 110866U, 253333U, |
| 64079 | 135237U, 41355U, 68498U, 211185U, 91694U, 234029U, 166051U, 109403U, |
| 64080 | 251789U, 140304U, 44105U, 71409U, 214257U, 94615U, 237089U, 170869U, |
| 64081 | 112324U, 254849U, 154945U, 191168U, 159471U, 195412U, 151846U, 103985U, |
| 64082 | 246347U, 187653U, 124371U, 264935U, 147237U, 99538U, 241980U, 182662U, |
| 64083 | 119467U, 260084U, 164254U, 108198U, 250526U, 200827U, 129040U, 269599U, |
| 64084 | 156467U, 192629U, 158096U, 194207U, 149389U, 101544U, 243915U, 185038U, |
| 64085 | 121779U, 262343U, 144781U, 97068U, 239517U, 180020U, 116846U, 257461U, |
| 64086 | 161562U, 106025U, 248353U, 197867U, 126743U, 267293U, 153970U, 189965U, |
| 64087 | 174995U, 158082U, 174462U, 153935U, 175034U, 158557U, 174583U, 154979U, |
| 64088 | 157245U, 193427U, 148201U, 100429U, 242834U, 183783U, 120530U, 261120U, |
| 64089 | 143575U, 95904U, 238384U, 178719U, 115548U, 256186U, 160336U, 105015U, |
| 64090 | 247367U, 196539U, 125623U, 266189U, 152605U, 188570U, 157940U, 194065U, |
| 64091 | 149175U, 48039U, 75545U, 218356U, 101337U, 243712U, 184824U, 121572U, |
| 64092 | 262140U, 144567U, 45295U, 72676U, 215526U, 96861U, 239314U, 179806U, |
| 64093 | 116639U, 257258U, 161380U, 50645U, 78276U, 221060U, 105857U, 248186U, |
| 64094 | 197671U, 126575U, 267126U, 153763U, 189730U, 150671U, 49312U, 76873U, |
| 64095 | 219667U, 102872U, 245252U, 186417U, 123143U, 263718U, 146076U, 46582U, |
| 64096 | 74019U, 216853U, 98410U, 240869U, 181412U, 118224U, 258851U, 163048U, |
| 64097 | 51698U, 79388U, 222171U, 107215U, 249556U, 199488U, 127963U, 268528U, |
| 64098 | 159579U, 195520U, 151951U, 104097U, 246466U, 187776U, 124502U, 265074U, |
| 64099 | 147342U, 99650U, 242099U, 182785U, 119598U, 260223U, 164338U, 108289U, |
| 64100 | 250624U, 200926U, 129147U, 269714U, 156692U, 192854U, 157295U, 193477U, |
| 64101 | 148278U, 100511U, 242904U, 183860U, 120612U, 261190U, 143652U, 95986U, |
| 64102 | 238454U, 178796U, 115630U, 256256U, 160398U, 105082U, 247425U, 196601U, |
| 64103 | 125690U, 266247U, 152695U, 188688U, 158038U, 194163U, 149305U, 48157U, |
| 64104 | 75648U, 218447U, 101454U, 243819U, 184954U, 121689U, 262247U, 144697U, |
| 64105 | 45413U, 72779U, 215617U, 96978U, 239421U, 179936U, 116756U, 257365U, |
| 64106 | 161496U, 50742U, 78361U, 221136U, 105953U, 248275U, 197801U, 126671U, |
| 64107 | 267215U, 153895U, 189903U, 150801U, 49430U, 76976U, 219758U, 102989U, |
| 64108 | 245359U, 186547U, 123260U, 263825U, 146206U, 46700U, 74122U, 216944U, |
| 64109 | 98527U, 240976U, 181542U, 118341U, 258958U, 163154U, 51795U, 79473U, |
| 64110 | 222247U, 107311U, 249645U, 199594U, 128059U, 268617U, 159641U, 195582U, |
| 64111 | 152076U, 104230U, 246590U, 187901U, 124635U, 265198U, 147467U, 99783U, |
| 64112 | 242223U, 182910U, 119731U, 260347U, 164439U, 108398U, 250727U, 201027U, |
| 64113 | 129256U, 269817U, 156813U, 193003U, 157210U, 193392U, 148157U, 100382U, |
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| 64116 | 152535U, 188500U, 157865U, 193990U, 149161U, 48024U, 75529U, 218339U, |
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| 64118 | 215509U, 96826U, 239277U, 179755U, 116585U, 257201U, 161309U, 50633U, |
| 64119 | 78263U, 221046U, 105802U, 248143U, 197585U, 126504U, 267066U, 153670U, |
| 64120 | 189649U, 150657U, 49297U, 76857U, 219650U, 102857U, 245236U, 186385U, |
| 64121 | 123109U, 263682U, 146062U, 46567U, 74003U, 216836U, 98395U, 240853U, |
| 64122 | 181380U, 118190U, 258815U, 163037U, 51686U, 79375U, 222157U, 107203U, |
| 64123 | 249543U, 199462U, 127935U, 268498U, 159531U, 195472U, 151891U, 104033U, |
| 64124 | 246398U, 187698U, 124419U, 264986U, 147282U, 99586U, 242031U, 182707U, |
| 64125 | 119515U, 260135U, 164290U, 108237U, 250568U, 200863U, 129079U, 269641U, |
| 64126 | 156592U, 192754U, 157284U, 193466U, 148264U, 100496U, 242888U, 183846U, |
| 64127 | 120597U, 261174U, 143638U, 95971U, 238438U, 178782U, 115615U, 256240U, |
| 64128 | 160387U, 105070U, 247412U, 196590U, 125678U, 266234U, 152664U, 188657U, |
| 64129 | 157979U, 194104U, 149291U, 48142U, 75632U, 218430U, 101439U, 243803U, |
| 64130 | 184940U, 121674U, 262231U, 144683U, 45398U, 72763U, 215600U, 96963U, |
| 64131 | 239405U, 179922U, 116741U, 257349U, 161485U, 50730U, 78348U, 221122U, |
| 64132 | 105941U, 248262U, 197790U, 126659U, 267202U, 153841U, 189849U, 150787U, |
| 64133 | 49415U, 76960U, 219741U, 102974U, 245343U, 186533U, 123245U, 263809U, |
| 64134 | 146192U, 46685U, 74106U, 216927U, 98512U, 240960U, 181528U, 118326U, |
| 64135 | 258942U, 163143U, 51783U, 79460U, 222233U, 107299U, 249632U, 199583U, |
| 64136 | 128047U, 268604U, 159630U, 195571U, 152062U, 104215U, 246574U, 187887U, |
| 64137 | 124620U, 265182U, 147453U, 99768U, 242207U, 182896U, 119716U, 260331U, |
| 64138 | 164428U, 108386U, 250714U, 201016U, 129244U, 269804U, 156789U, 192979U, |
| 64139 | 185418U, 180400U, 198646U, 185433U, 180415U, 198658U, 173531U, 113644U, |
| 64140 | 183462U, 120188U, 260830U, 172767U, 113064U, 178398U, 115206U, 255896U, |
| 64141 | 175374U, 114344U, 196259U, 125344U, 265950U, 174118U, 114008U, 187439U, |
| 64142 | 124142U, 264743U, 173298U, 113428U, 182448U, 119238U, 259892U, 175911U, |
| 64143 | 114675U, 200636U, 128856U, 269443U, 183359U, 178295U, 196177U, 183994U, |
| 64144 | 178930U, 196708U, 185562U, 180544U, 198763U, 187211U, 182220U, 200453U, |
| 64145 | 193310U, 188283U, 185448U, 180430U, 198670U, 173576U, 113692U, 183666U, |
| 64146 | 120405U, 260987U, 172812U, 113112U, 178602U, 115423U, 256053U, 175410U, |
| 64147 | 114383U, 196424U, 125522U, 266080U, 173845U, 113856U, 184740U, 121482U, |
| 64148 | 262044U, 173053U, 113276U, 179703U, 116529U, 257141U, 175617U, 114517U, |
| 64149 | 197325U, 126418U, 266973U, 174163U, 114056U, 187626U, 124342U, 264904U, |
| 64150 | 173343U, 113476U, 182635U, 119438U, 260053U, 175947U, 114714U, 200784U, |
| 64151 | 129017U, 269574U, 173516U, 113628U, 183447U, 120172U, 260813U, 172752U, |
| 64152 | 113048U, 178383U, 115190U, 255879U, 175362U, 114331U, 196247U, 125331U, |
| 64153 | 265936U, 174103U, 113992U, 187424U, 124126U, 264726U, 173283U, 113412U, |
| 64154 | 182433U, 119222U, 259875U, 175899U, 114662U, 200624U, 128843U, 269429U, |
| 64155 | 173561U, 113676U, 183630U, 120367U, 260947U, 172797U, 113096U, 178566U, |
| 64156 | 115385U, 256013U, 175398U, 114370U, 196394U, 125490U, 266046U, 173830U, |
| 64157 | 113840U, 184725U, 121466U, 262027U, 173038U, 113260U, 179688U, 116513U, |
| 64158 | 257124U, 175605U, 114504U, 197313U, 126405U, 266959U, 174148U, 114040U, |
| 64159 | 187611U, 124326U, 264887U, 173328U, 113460U, 182620U, 119422U, 260036U, |
| 64160 | 175935U, 114701U, 200772U, 129004U, 269560U, 173624U, 113743U, 183922U, |
| 64161 | 120678U, 261260U, 172860U, 113163U, 178858U, 115696U, 256326U, 175460U, |
| 64162 | 114425U, 196651U, 125744U, 266305U, 157385U, 193567U, 148408U, 100620U, |
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| 64165 | 152926U, 188919U, 158220U, 194344U, 149856U, 102042U, 244425U, 185618U, |
| 64166 | 122294U, 262871U, 145248U, 97566U, 240027U, 180600U, 117361U, 257989U, |
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| 64264 | 231030U, 149347U, 48202U, 75696U, 218498U, 101499U, 243867U, 184996U, |
| 64265 | 121734U, 262295U, 144739U, 45458U, 72827U, 215668U, 97023U, 239469U, |
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| 64268 | 103034U, 245407U, 186589U, 123305U, 263873U, 146248U, 46745U, 74170U, |
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| 64280 | 50802U, 78426U, 221206U, 106013U, 248340U, 197856U, 126731U, 267280U, |
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| 64287 | 156740U, 192910U, 29564U, 159253U, 195194U, 151537U, 187254U, 146928U, |
| 64288 | 182263U, 163997U, 200487U, 155976U, 192055U, 173653U, 172889U, 175483U, |
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| 64300 | 235059U, 166973U, 110379U, 252819U, 134777U, 40868U, 67984U, 210644U, |
| 64301 | 91207U, 233515U, 165591U, 108916U, 251275U, 139690U, 43699U, 70976U, |
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| 64309 | 232315U, 60058U, 86131U, 229020U, 64923U, 89181U, 231759U, 61999U, |
| 64310 | 87634U, 230284U, 66864U, 90684U, 233023U, 174348U, 153054U, 189050U, |
| 64311 | 29329U, 174542U, 154811U, 190976U, 29426U, 174714U, 156291U, 192397U, |
| 64312 | 29537U, 56613U, 83653U, 226627U, 60208U, 86290U, 229122U, 65073U, |
| 64313 | 89340U, 231861U, 56108U, 83120U, 226117U, 59534U, 85594U, 228566U, |
| 64314 | 64399U, 88644U, 231305U, 57173U, 84245U, 227200U, 61393U, 87035U, |
| 64315 | 229737U, 66258U, 90085U, 232476U, 56877U, 83932U, 226887U, 60504U, |
| 64316 | 86585U, 229369U, 65369U, 89635U, 232108U, 56372U, 83399U, 226377U, |
| 64317 | 59830U, 85889U, 228813U, 64695U, 88939U, 231552U, 57392U, 84479U, |
| 64318 | 227421U, 61744U, 87372U, 230044U, 66609U, 90422U, 232783U, 136173U, |
| 64319 | 42316U, 69512U, 212252U, 92685U, 235075U, 166987U, 110394U, 252835U, |
| 64320 | 134791U, 40883U, 68000U, 210661U, 91222U, 233531U, 165605U, 108931U, |
| 64321 | 251291U, 139701U, 43711U, 70989U, 213811U, 94181U, 236626U, 170266U, |
| 64322 | 111890U, 254386U, 136650U, 42821U, 70045U, 212813U, 93190U, 235608U, |
| 64323 | 167464U, 110899U, 253368U, 135268U, 41388U, 68533U, 211222U, 91727U, |
| 64324 | 234064U, 166082U, 109436U, 251824U, 140329U, 44132U, 71438U, 214288U, |
| 64325 | 94642U, 237118U, 170894U, 112351U, 254878U, 137111U, 93678U, 236123U, |
| 64326 | 167925U, 111387U, 253883U, 135729U, 92215U, 234579U, 166543U, 109924U, |
| 64327 | 252339U, 140977U, 95125U, 237634U, 171542U, 112834U, 255394U, 60747U, |
| 64328 | 86843U, 229593U, 65612U, 89893U, 232332U, 60073U, 86147U, 229037U, |
| 64329 | 64938U, 89197U, 231776U, 62011U, 87647U, 230298U, 66876U, 90697U, |
| 64330 | 233037U, 148033U, 100250U, 183552U, 120284U, 143407U, 95725U, 178488U, |
| 64331 | 115302U, 160190U, 104869U, 196331U, 125422U, 157120U, 193289U, 147957U, |
| 64332 | 100169U, 242631U, 183476U, 120203U, 260846U, 143331U, 95644U, 238181U, |
| 64333 | 178412U, 115221U, 255912U, 160129U, 104803U, 247200U, 196270U, 125356U, |
| 64334 | 265963U, 152344U, 188239U, 58926U, 63699U, 55619U, 82597U, 225560U, |
| 64335 | 58284U, 84941U, 227900U, 62787U, 87991U, 230639U, 55401U, 82364U, |
| 64336 | 225312U, 57984U, 84649U, 227588U, 62487U, 87699U, 230327U, 55805U, |
| 64337 | 82796U, 225772U, 59042U, 85201U, 228178U, 63907U, 88251U, 230917U, |
| 64338 | 58718U, 63239U, 59008U, 63853U, 58488U, 85130U, 228102U, 62991U, |
| 64339 | 88180U, 230841U, 58215U, 84867U, 227821U, 62718U, 87917U, 230560U, |
| 64340 | 59222U, 85374U, 228366U, 64087U, 88424U, 231105U, 58876U, 63575U, |
| 64341 | 59020U, 63865U, 58503U, 85146U, 228119U, 63006U, 88196U, 230858U, |
| 64342 | 58230U, 84883U, 227838U, 62733U, 87933U, 230577U, 59234U, 85387U, |
| 64343 | 228380U, 64099U, 88437U, 231119U, 58887U, 63586U, 157155U, 193337U, |
| 64344 | 152410U, 188341U, 157496U, 193664U, 153134U, 189139U, 159438U, 195379U, |
| 64345 | 156365U, 192480U, 63766U, 58379U, 62882U, 58093U, 62596U, 59127U, |
| 64346 | 63992U, 63386U, 63710U, 157446U, 193614U, 55634U, 82613U, 225577U, |
| 64347 | 58298U, 84956U, 227916U, 62801U, 88006U, 230655U, 148499U, 100699U, |
| 64348 | 243104U, 184146U, 120848U, 261441U, 55416U, 82380U, 225329U, 57998U, |
| 64349 | 84664U, 227604U, 62501U, 87714U, 230343U, 143873U, 96174U, 238654U, |
| 64350 | 179082U, 115866U, 256507U, 55817U, 82809U, 225786U, 59053U, 85213U, |
| 64351 | 228191U, 63918U, 88263U, 230930U, 160574U, 105234U, 247589U, 196830U, |
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| 64355 | 82489U, 225445U, 58121U, 84766U, 227713U, 62624U, 87816U, 230452U, |
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| 64359 | 158060U, 194185U, 149333U, 48187U, 75680U, 218481U, 101484U, 243851U, |
| 64360 | 184982U, 121719U, 262279U, 144725U, 45443U, 72811U, 215651U, 97008U, |
| 64361 | 239453U, 179964U, 116786U, 257397U, 161518U, 50766U, 78387U, 221164U, |
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| 64363 | 194631U, 150829U, 49460U, 77008U, 219792U, 103019U, 245391U, 186575U, |
| 64364 | 123290U, 263857U, 146234U, 46730U, 74154U, 216978U, 98557U, 241008U, |
| 64365 | 181570U, 118371U, 258990U, 163176U, 51819U, 79499U, 222275U, 107335U, |
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| 64371 | 84899U, 227855U, 62748U, 87949U, 230594U, 147109U, 99401U, 241886U, |
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| 64380 | 125795U, 266360U, 63218U, 152838U, 188831U, 55707U, 82691U, 225660U, |
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| 64388 | 215634U, 96993U, 239437U, 179950U, 116771U, 257381U, 161507U, 50754U, |
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| 64391 | 123275U, 263841U, 146220U, 46715U, 74138U, 216961U, 98542U, 240992U, |
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| 64401 | 63777U, 58393U, 62896U, 58107U, 62610U, 59138U, 64003U, 63396U, |
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| 64412 | 240517U, 181036U, 117824U, 258479U, 55920U, 82921U, 225907U, 59169U, |
| 64413 | 85316U, 228303U, 64034U, 88366U, 231042U, 162734U, 106903U, 249264U, |
| 64414 | 199162U, 127635U, 268219U, 63427U, 154841U, 191006U, 158071U, 194196U, |
| 64415 | 149361U, 48217U, 75712U, 218515U, 101514U, 243883U, 185010U, 121749U, |
| 64416 | 262311U, 144753U, 45473U, 72843U, 215685U, 97038U, 239485U, 179992U, |
| 64417 | 116816U, 257429U, 161540U, 50790U, 78413U, 221192U, 106001U, 248327U, |
| 64418 | 197845U, 126719U, 267267U, 153925U, 189933U, 158546U, 194642U, 150857U, |
| 64419 | 49490U, 77040U, 219826U, 103049U, 245423U, 186603U, 123320U, 263889U, |
| 64420 | 146262U, 46760U, 74186U, 217012U, 98587U, 241040U, 181598U, 118401U, |
| 64421 | 259022U, 163198U, 51843U, 79525U, 222303U, 107359U, 249697U, 199638U, |
| 64422 | 128107U, 268669U, 154969U, 191192U, 152118U, 104275U, 246638U, 187943U, |
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| 64424 | 164472U, 108434U, 250766U, 201060U, 129292U, 269856U, 63887U, 159428U, |
| 64425 | 195369U, 58531U, 85176U, 228151U, 63034U, 88226U, 230890U, 151745U, |
| 64426 | 103877U, 246284U, 187507U, 124215U, 264821U, 58258U, 84913U, 227870U, |
| 64427 | 62761U, 87963U, 230609U, 147136U, 99430U, 241917U, 182516U, 119311U, |
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| 64431 | 143289U, 95599U, 238133U, 178325U, 115128U, 255813U, 160096U, 104767U, |
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| 64434 | 261342U, 143769U, 44661U, 72001U, 214885U, 96081U, 238555U, 178995U, |
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| 64437 | 48581U, 76099U, 218905U, 102028U, 244410U, 185605U, 122280U, 262856U, |
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| 64440 | 127242U, 267798U, 154493U, 190630U, 157188U, 193370U, 148129U, 100352U, |
| 64441 | 242752U, 183693U, 120434U, 261018U, 143503U, 95827U, 238302U, 178629U, |
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| 64443 | 152489U, 188454U, 159497U, 195438U, 151863U, 104003U, 246366U, 187670U, |
| 64444 | 124389U, 264954U, 147254U, 99556U, 241999U, 182679U, 119485U, 260103U, |
| 64445 | 164268U, 108213U, 250542U, 200841U, 129055U, 269615U, 156521U, 192683U, |
| 64446 | 157221U, 193403U, 148171U, 100397U, 242800U, 183753U, 120498U, 261086U, |
| 64447 | 143545U, 95872U, 238350U, 178689U, 115516U, 256152U, 160312U, 104989U, |
| 64448 | 247339U, 196515U, 125597U, 266161U, 152545U, 188510U, 159555U, 195496U, |
| 64449 | 151921U, 104065U, 246432U, 187746U, 124470U, 265040U, 147312U, 99618U, |
| 64450 | 242065U, 182755U, 119566U, 260189U, 164314U, 108263U, 250596U, 200902U, |
| 64451 | 129121U, 269686U, 156642U, 192804U, 159303U, 195244U, 151585U, 103706U, |
| 64452 | 246102U, 187302U, 123996U, 264588U, 146976U, 99259U, 241735U, 182311U, |
| 64453 | 119092U, 259737U, 164036U, 107973U, 250326U, 200526U, 128737U, 269315U, |
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| 64457 | 87048U, 229751U, 66270U, 90098U, 232490U, 56893U, 83949U, 226905U, |
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| 64460 | 84493U, 227436U, 61756U, 87385U, 230058U, 66621U, 90435U, 232797U, |
| 64461 | 148065U, 100284U, 183584U, 120318U, 143439U, 95759U, 178520U, 115336U, |
| 64462 | 160216U, 104897U, 196357U, 125450U, 148571U, 47525U, 74998U, 100776U, |
| 64463 | 184218U, 120925U, 143958U, 44766U, 72113U, 96265U, 179167U, 115957U, |
| 64464 | 160641U, 50218U, 77815U, 105307U, 196897U, 125954U, 150354U, 48993U, |
| 64465 | 76535U, 102553U, 186099U, 122805U, 145759U, 46263U, 73681U, 98091U, |
| 64466 | 181094U, 117886U, 162780U, 51436U, 79107U, 106953U, 199208U, 127685U, |
| 64467 | 151803U, 103939U, 187565U, 124277U, 147194U, 99492U, 182574U, 119373U, |
| 64468 | 164209U, 108161U, 200735U, 128964U, 148017U, 100233U, 183536U, 120267U, |
| 64469 | 143391U, 95708U, 178472U, 115285U, 160177U, 104855U, 196318U, 125408U, |
| 64470 | 148555U, 47508U, 74980U, 100759U, 184202U, 120908U, 143929U, 44735U, |
| 64471 | 72080U, 96234U, 179138U, 115926U, 160618U, 50193U, 77788U, 105282U, |
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| 64473 | 145730U, 46232U, 73648U, 98060U, 181065U, 117855U, 162757U, 51411U, |
| 64474 | 79080U, 106928U, 199185U, 127660U, 151774U, 103908U, 187536U, 124246U, |
| 64475 | 147165U, 99461U, 182545U, 119342U, 164186U, 108136U, 200712U, 128939U, |
| 64476 | 159212U, 195163U, 155907U, 191984U, 159264U, 195205U, 151551U, 103670U, |
| 64477 | 246064U, 187268U, 123960U, 264550U, 146942U, 99223U, 241697U, 182277U, |
| 64478 | 119056U, 259699U, 164008U, 107943U, 250294U, 200498U, 128707U, 269283U, |
| 64479 | 156010U, 192089U, 158310U, 194434U, 150000U, 48714U, 76240U, 219054U, |
| 64480 | 102195U, 244587U, 185762U, 122447U, 263033U, 145392U, 45970U, 73371U, |
| 64481 | 216224U, 97719U, 240189U, 180744U, 117514U, 258151U, 162482U, 51194U, |
| 64482 | 78848U, 221641U, 106647U, 248990U, 198924U, 127379U, 267945U, 154631U, |
| 64483 | 190790U, 158349U, 194473U, 150077U, 48779U, 76309U, 219127U, 102277U, |
| 64484 | 244674U, 185839U, 122529U, 263120U, 145469U, 46035U, 73440U, 216297U, |
| 64485 | 97801U, 240276U, 180821U, 117596U, 258238U, 162544U, 51247U, 78905U, |
| 64486 | 221702U, 106714U, 249062U, 198986U, 127446U, 268017U, 154699U, 190877U, |
| 64487 | 158108U, 194219U, 149404U, 101560U, 243932U, 185053U, 121795U, 262360U, |
| 64488 | 144796U, 97084U, 239534U, 180035U, 116862U, 257478U, 161574U, 106038U, |
| 64489 | 248367U, 197879U, 126756U, 267307U, 153995U, 189990U, 159278U, 195219U, |
| 64490 | 151568U, 103688U, 246083U, 187285U, 123978U, 264569U, 146959U, 99241U, |
| 64491 | 241716U, 182294U, 119074U, 259718U, 164022U, 107958U, 250310U, 200512U, |
| 64492 | 128722U, 269299U, 156039U, 192129U, 158324U, 194448U, 150017U, 48732U, |
| 64493 | 76259U, 219074U, 102213U, 244606U, 185779U, 122465U, 263052U, 145409U, |
| 64494 | 45988U, 73390U, 216244U, 97737U, 240208U, 180761U, 117532U, 258170U, |
| 64495 | 162496U, 51209U, 78864U, 221658U, 106662U, 249006U, 198938U, 127394U, |
| 64496 | 267961U, 154660U, 190830U, 158364U, 194488U, 150095U, 48798U, 76329U, |
| 64497 | 219148U, 102296U, 244694U, 185857U, 122548U, 263140U, 145487U, 46054U, |
| 64498 | 73460U, 216318U, 97820U, 240296U, 180839U, 117615U, 258258U, 162559U, |
| 64499 | 51263U, 78922U, 221720U, 106730U, 249079U, 199001U, 127462U, 268034U, |
| 64500 | 154713U, 190891U, 158122U, 194233U, 149421U, 101578U, 243951U, 185070U, |
| 64501 | 121813U, 262379U, 144813U, 97102U, 239553U, 180052U, 116880U, 257497U, |
| 64502 | 161588U, 106053U, 248383U, 197893U, 126771U, 267323U, 154024U, 190030U, |
| 64503 | 149135U, 47996U, 75499U, 218307U, 101294U, 243666U, 184766U, 121510U, |
| 64504 | 262074U, 144508U, 45252U, 72630U, 215477U, 96798U, 239247U, 179729U, |
| 64505 | 116557U, 257171U, 161080U, 50611U, 78239U, 221020U, 105738U, 248074U, |
| 64506 | 197345U, 126440U, 266997U, 150631U, 49269U, 76827U, 219618U, 102829U, |
| 64507 | 245206U, 186359U, 123081U, 263652U, 146036U, 46539U, 73973U, 216804U, |
| 64508 | 98367U, 240823U, 181354U, 118162U, 258785U, 163006U, 51664U, 79351U, |
| 64509 | 222131U, 107181U, 249519U, 199420U, 127913U, 268474U, 158605U, 194687U, |
| 64510 | 155065U, 191275U, 56682U, 83726U, 226704U, 60273U, 86359U, 229195U, |
| 64511 | 65138U, 89409U, 231934U, 56177U, 83193U, 226194U, 59599U, 85663U, |
| 64512 | 228639U, 64464U, 88713U, 231378U, 57230U, 84306U, 227265U, 61446U, |
| 64513 | 87092U, 229798U, 66311U, 40046U, 67113U, 209766U, 90142U, 232537U, |
| 64514 | 56946U, 84005U, 226964U, 60614U, 86702U, 229460U, 65479U, 89752U, |
| 64515 | 232199U, 56441U, 83472U, 226454U, 59940U, 86006U, 228904U, 64805U, |
| 64516 | 89056U, 231643U, 57449U, 84540U, 227486U, 61833U, 87468U, 230120U, |
| 64517 | 66698U, 40290U, 67373U, 210014U, 90518U, 232859U, 61554U, 87208U, |
| 64518 | 229896U, 66419U, 40137U, 67210U, 209855U, 90258U, 232635U, 61930U, |
| 64519 | 87572U, 230218U, 66795U, 40381U, 67470U, 210103U, 90622U, 232957U, |
| 64520 | 136073U, 42209U, 69398U, 212131U, 92578U, 234961U, 166887U, 110287U, |
| 64521 | 252721U, 134691U, 40776U, 67886U, 210540U, 91115U, 233417U, 165505U, |
| 64522 | 108824U, 251177U, 139364U, 43599U, 70868U, 213681U, 94030U, 236463U, |
| 64523 | 169929U, 111739U, 254223U, 137024U, 43216U, 70461U, 213250U, 93585U, |
| 64524 | 236024U, 167838U, 111294U, 253784U, 135642U, 41783U, 68949U, 211659U, |
| 64525 | 92122U, 234480U, 166456U, 109831U, 252240U, 140650U, 44475U, 71803U, |
| 64526 | 214675U, 94985U, 237483U, 171215U, 112694U, 255243U, 161185U, 105749U, |
| 64527 | 248086U, 197461U, 126451U, 267009U, 163724U, 107794U, 250150U, 200202U, |
| 64528 | 128558U, 269139U, 139388U, 43625U, 70896U, 213711U, 94056U, 236491U, |
| 64529 | 169953U, 52617U, 80354U, 223170U, 111765U, 254251U, 140686U, 44514U, |
| 64530 | 71845U, 214720U, 95024U, 237525U, 171251U, 53768U, 81184U, 224051U, |
| 64531 | 112733U, 255285U, 139608U, 94106U, 236545U, 170173U, 52853U, 80408U, |
| 64532 | 223228U, 111815U, 254305U, 140906U, 95074U, 237579U, 171471U, 54004U, |
| 64533 | 81238U, 224109U, 112783U, 255339U, 136548U, 42712U, 69929U, 212690U, |
| 64534 | 93081U, 235492U, 167362U, 110790U, 253252U, 135166U, 41279U, 68417U, |
| 64535 | 211099U, 91618U, 233948U, 165980U, 109327U, 251708U, 140013U, 44044U, |
| 64536 | 71343U, 214186U, 94514U, 236980U, 170578U, 112223U, 254740U, 139048U, |
| 64537 | 169613U, 138163U, 168800U, 162061U, 106382U, 248721U, 198379U, 127114U, |
| 64538 | 267676U, 138414U, 204160U, 168989U, 207105U, 56664U, 83707U, 226684U, |
| 64539 | 60256U, 86341U, 229176U, 65121U, 89391U, 231915U, 56159U, 83174U, |
| 64540 | 226174U, 59582U, 85645U, 228620U, 64447U, 88695U, 231359U, 57215U, |
| 64541 | 84290U, 227248U, 61432U, 87077U, 229782U, 66297U, 40031U, 67097U, |
| 64542 | 209749U, 90127U, 232521U, 56789U, 83839U, 226806U, 60403U, 86497U, |
| 64543 | 229292U, 65268U, 89547U, 232031U, 56284U, 83306U, 226296U, 59729U, |
| 64544 | 85801U, 228736U, 64594U, 88851U, 231475U, 57319U, 84401U, 227352U, |
| 64545 | 61621U, 87268U, 229946U, 66486U, 40184U, 67260U, 209908U, 90318U, |
| 64546 | 232685U, 56928U, 83986U, 226944U, 60597U, 86684U, 229441U, 65462U, |
| 64547 | 89734U, 232180U, 56423U, 83453U, 226434U, 59923U, 85988U, 228885U, |
| 64548 | 64788U, 89038U, 231624U, 57434U, 84524U, 227469U, 61819U, 87453U, |
| 64549 | 230104U, 66684U, 40275U, 67357U, 209997U, 90503U, 232843U, 61540U, |
| 64550 | 87193U, 229880U, 66405U, 40122U, 67194U, 209838U, 90243U, 232619U, |
| 64551 | 61677U, 87328U, 229997U, 66542U, 40244U, 67324U, 209962U, 90378U, |
| 64552 | 232736U, 61916U, 87557U, 230202U, 66781U, 40366U, 67454U, 210086U, |
| 64553 | 90607U, 232941U, 56699U, 83744U, 226723U, 60289U, 86376U, 229213U, |
| 64554 | 65154U, 89426U, 231952U, 56194U, 83211U, 226213U, 59615U, 85680U, |
| 64555 | 228657U, 64480U, 88730U, 231396U, 57244U, 84321U, 227281U, 61459U, |
| 64556 | 87106U, 229813U, 66324U, 40060U, 67128U, 209782U, 90156U, 232552U, |
| 64557 | 56807U, 83858U, 226826U, 60420U, 86515U, 229311U, 65285U, 89565U, |
| 64558 | 232050U, 56302U, 83325U, 226316U, 59746U, 85819U, 228755U, 64611U, |
| 64559 | 88869U, 231494U, 57334U, 84417U, 227369U, 61635U, 87283U, 229962U, |
| 64560 | 66500U, 40199U, 67276U, 209925U, 90333U, 232701U, 56963U, 84023U, |
| 64561 | 226983U, 60630U, 86719U, 229478U, 65495U, 89769U, 232217U, 56458U, |
| 64562 | 83490U, 226473U, 59956U, 86023U, 228922U, 64821U, 89073U, 231661U, |
| 64563 | 57463U, 84555U, 227502U, 61846U, 87482U, 230135U, 66711U, 40304U, |
| 64564 | 67388U, 210030U, 90532U, 232874U, 139632U, 204421U, 131092U, 271597U, |
| 64565 | 170197U, 207366U, 132274U, 272845U, 201842U, 129703U, 270235U, 140254U, |
| 64566 | 204675U, 131360U, 271879U, 170819U, 207620U, 132542U, 273127U, 202110U, |
| 64567 | 129985U, 270531U, 140930U, 204929U, 131628U, 272161U, 171495U, 207874U, |
| 64568 | 132810U, 273409U, 202378U, 130267U, 270827U, 58937U, 63730U, 58737U, |
| 64569 | 63311U, 58983U, 63818U, 58829U, 63507U, 58760U, 203521U, 63345U, |
| 64570 | 203624U, 58852U, 203536U, 63530U, 203639U, 136087U, 42224U, 69414U, |
| 64571 | 212148U, 92593U, 234977U, 166901U, 110302U, 252737U, 134705U, 40791U, |
| 64572 | 67902U, 210557U, 91130U, 233433U, 165519U, 108839U, 251193U, 139375U, |
| 64573 | 43611U, 70881U, 213695U, 94042U, 236476U, 169940U, 111751U, 254236U, |
| 64574 | 137038U, 43231U, 70477U, 213267U, 93600U, 236040U, 167852U, 111309U, |
| 64575 | 253800U, 135656U, 41798U, 68965U, 211676U, 92137U, 234496U, 166470U, |
| 64576 | 109846U, 252256U, 140661U, 44487U, 71816U, 214689U, 94997U, 237496U, |
| 64577 | 171226U, 112706U, 255256U, 161197U, 105762U, 248100U, 197473U, 126464U, |
| 64578 | 267023U, 163736U, 107807U, 250164U, 200214U, 128571U, 269153U, 139399U, |
| 64579 | 43637U, 70909U, 213725U, 94068U, 236504U, 169964U, 52629U, 80367U, |
| 64580 | 223184U, 111777U, 254264U, 140697U, 44526U, 71858U, 214734U, 95036U, |
| 64581 | 237538U, 171262U, 53780U, 81197U, 224065U, 112745U, 255298U, 139619U, |
| 64582 | 94118U, 236558U, 170184U, 52865U, 80421U, 223242U, 111827U, 254318U, |
| 64583 | 140917U, 95086U, 237592U, 171482U, 54016U, 81251U, 224123U, 112795U, |
| 64584 | 255352U, 136575U, 42741U, 69960U, 212723U, 93110U, 235523U, 167389U, |
| 64585 | 110819U, 253283U, 135193U, 41308U, 68448U, 211132U, 91647U, 233979U, |
| 64586 | 166007U, 109356U, 251739U, 140034U, 44067U, 71368U, 214213U, 94537U, |
| 64587 | 237005U, 170599U, 112246U, 254765U, 139057U, 169622U, 138233U, 168808U, |
| 64588 | 162085U, 106408U, 248733U, 198403U, 127140U, 267688U, 138422U, 204172U, |
| 64589 | 168997U, 207117U, 148844U, 47766U, 75254U, 218085U, 101049U, 243441U, |
| 64590 | 184474U, 121198U, 261778U, 144231U, 45007U, 72369U, 215238U, 96538U, |
| 64591 | 239006U, 179423U, 116230U, 256859U, 160860U, 50414U, 78026U, 220823U, |
| 64592 | 105529U, 247878U, 197102U, 54122U, 81365U, 224245U, 126176U, 266742U, |
| 64593 | 149668U, 48458U, 75968U, 218786U, 101841U, 244230U, 185333U, 122093U, |
| 64594 | 262676U, 145060U, 45714U, 73099U, 215956U, 97365U, 239832U, 180315U, |
| 64595 | 117160U, 257794U, 161787U, 50986U, 78624U, 221418U, 106268U, 248614U, |
| 64596 | 198105U, 54367U, 81602U, 224499U, 127000U, 267569U, 151161U, 49713U, |
| 64597 | 77277U, 220077U, 103355U, 245748U, 186890U, 123626U, 264214U, 146566U, |
| 64598 | 46983U, 74423U, 217263U, 98893U, 241365U, 181885U, 118707U, 259347U, |
| 64599 | 163442U, 52024U, 79720U, 222512U, 107608U, 249965U, 199868U, 54945U, |
| 64600 | 82194U, 225130U, 128356U, 268937U, 161263U, 105788U, 248128U, 197539U, |
| 64601 | 202771U, 130373U, 270939U, 126490U, 267051U, 162005U, 106368U, 248706U, |
| 64602 | 198323U, 202993U, 130526U, 271101U, 127100U, 267661U, 163792U, 107822U, |
| 64603 | 250180U, 200270U, 203443U, 130679U, 271263U, 128586U, 269169U, 173685U, |
| 64604 | 172921U, 175509U, 173976U, 173184U, 175794U, 137477U, 138116U, 137539U, |
| 64605 | 138186U, 137508U, 138147U, 137570U, 138217U, 173731U, 172939U, 175524U, |
| 64606 | 174022U, 173202U, 175809U, 176164U, 176700U, 176738U, 56005U, 83012U, |
| 64607 | 226004U, 59407U, 85460U, 228458U, 64272U, 88510U, 231197U, 57085U, |
| 64608 | 84152U, 227102U, 61287U, 86922U, 229644U, 66152U, 89972U, 232383U, |
| 64609 | 55967U, 82972U, 225962U, 59371U, 85422U, 228418U, 64236U, 88472U, |
| 64610 | 231157U, 57053U, 84118U, 227066U, 61257U, 86890U, 229610U, 66122U, |
| 64611 | 89940U, 232349U, 56024U, 83032U, 226025U, 59425U, 85479U, 228478U, |
| 64612 | 64290U, 88529U, 231217U, 57101U, 84169U, 227120U, 61302U, 86938U, |
| 64613 | 229661U, 66167U, 89988U, 232400U, 55986U, 82992U, 225983U, 59389U, |
| 64614 | 85441U, 228438U, 64254U, 88491U, 231177U, 57069U, 84135U, 227084U, |
| 64615 | 61272U, 86906U, 229627U, 66137U, 89956U, 232366U, 61134U, 65999U, |
| 64616 | 56719U, 83765U, 226745U, 60308U, 86396U, 229234U, 65173U, 89446U, |
| 64617 | 231973U, 56214U, 83232U, 226235U, 59634U, 85700U, 228678U, 64499U, |
| 64618 | 88750U, 231417U, 57261U, 84339U, 227300U, 61475U, 87123U, 229831U, |
| 64619 | 66340U, 90173U, 232570U, 60854U, 65719U, 61198U, 66063U, 56983U, |
| 64620 | 84044U, 227005U, 60649U, 86739U, 229499U, 65514U, 89789U, 232238U, |
| 64621 | 56478U, 83511U, 226495U, 59975U, 86043U, 228943U, 64840U, 89093U, |
| 64622 | 231682U, 57480U, 84573U, 227521U, 61862U, 87499U, 230153U, 66727U, |
| 64623 | 90549U, 232892U, 61003U, 65868U, 141088U, 176178U, 141642U, 176714U, |
| 64624 | 141666U, 176753U, 157047U, 193229U, 142654U, 177689U, 156948U, 193130U, |
| 64625 | 142440U, 177547U, 138762U, 169327U, 136118U, 42257U, 69449U, 212185U, |
| 64626 | 92626U, 235012U, 166932U, 110335U, 252772U, 134736U, 40824U, 67937U, |
| 64627 | 210594U, 91163U, 233468U, 165550U, 108872U, 251228U, 139424U, 43664U, |
| 64628 | 70938U, 213756U, 94095U, 236533U, 169989U, 52656U, 80396U, 223215U, |
| 64629 | 111804U, 254293U, 137586U, 168261U, 136589U, 42756U, 69976U, 212740U, |
| 64630 | 93125U, 235539U, 167403U, 110834U, 253299U, 135207U, 41323U, 68464U, |
| 64631 | 211149U, 91662U, 233995U, 166021U, 109371U, 251755U, 140045U, 44079U, |
| 64632 | 71381U, 214227U, 94549U, 237018U, 170610U, 53226U, 80805U, 223649U, |
| 64633 | 112258U, 254778U, 139068U, 169633U, 137084U, 43280U, 70529U, 213322U, |
| 64634 | 93649U, 236092U, 167898U, 111358U, 253852U, 135702U, 41847U, 69017U, |
| 64635 | 211731U, 92186U, 234548U, 166516U, 109895U, 252308U, 140722U, 44553U, |
| 64636 | 71887U, 214765U, 95063U, 237567U, 171287U, 53807U, 81226U, 224096U, |
| 64637 | 112772U, 255327U, 138243U, 168818U, 139669U, 204439U, 131111U, 271617U, |
| 64638 | 170234U, 207384U, 132293U, 272865U, 201861U, 129723U, 270256U, 137757U, |
| 64639 | 203937U, 168432U, 206882U, 140280U, 204693U, 131379U, 271899U, 170845U, |
| 64640 | 207638U, 132561U, 273147U, 202129U, 130005U, 270552U, 140956U, 204947U, |
| 64641 | 131647U, 272181U, 171521U, 207892U, 132829U, 273429U, 202397U, 130287U, |
| 64642 | 270848U, 138432U, 204186U, 169007U, 207131U, 24669U, 157582U, 193750U, |
| 64643 | 148744U, 47694U, 75177U, 218003U, 100960U, 243346U, 184391U, 121109U, |
| 64644 | 261683U, 144131U, 44935U, 72292U, 215156U, 96449U, 238911U, 179340U, |
| 64645 | 116141U, 256764U, 160781U, 50357U, 77964U, 220756U, 105458U, 247801U, |
| 64646 | 197037U, 54100U, 81341U, 224219U, 126105U, 266665U, 153250U, 189255U, |
| 64647 | 149583U, 48367U, 75871U, 218683U, 101750U, 244133U, 185248U, 122002U, |
| 64648 | 262579U, 144975U, 45623U, 73002U, 215853U, 97274U, 239735U, 180230U, |
| 64649 | 117069U, 257697U, 161720U, 50913U, 78545U, 221333U, 106195U, 248535U, |
| 64650 | 198038U, 54318U, 81549U, 224442U, 126927U, 267490U, 158908U, 194888U, |
| 64651 | 151061U, 49641U, 77200U, 219995U, 103266U, 245653U, 186807U, 123537U, |
| 64652 | 264119U, 146466U, 46911U, 74346U, 217181U, 98804U, 241270U, 181802U, |
| 64653 | 118618U, 259252U, 163363U, 51967U, 79658U, 222445U, 107537U, 249888U, |
| 64654 | 199803U, 54923U, 82170U, 225104U, 128285U, 268860U, 155385U, 191504U, |
| 64655 | 161221U, 205895U, 131698U, 272235U, 197497U, 208972U, 132880U, 273483U, |
| 64656 | 202741U, 130341U, 270905U, 153602U, 205217U, 189581U, 208294U, 161938U, |
| 64657 | 206118U, 131824U, 272369U, 198256U, 209195U, 133006U, 273617U, 202963U, |
| 64658 | 130494U, 271067U, 163750U, 206557U, 131950U, 272503U, 200228U, 209634U, |
| 64659 | 133132U, 273751U, 203413U, 130647U, 271229U, 155705U, 205440U, 191799U, |
| 64660 | 208517U, 157762U, 193915U, 153434U, 189405U, 159099U, 195064U, 155606U, |
| 64661 | 191701U, 161276U, 205923U, 197552U, 209000U, 54180U, 153640U, 205243U, |
| 64662 | 189619U, 208320U, 162018U, 206146U, 198336U, 209223U, 54452U, 163805U, |
| 64663 | 206585U, 200283U, 209662U, 55003U, 155768U, 205466U, 191837U, 208543U, |
| 64664 | 157659U, 193813U, 148860U, 47783U, 75272U, 218104U, 101066U, 243459U, |
| 64665 | 184490U, 121215U, 261796U, 144247U, 45024U, 72387U, 215257U, 96555U, |
| 64666 | 239024U, 179439U, 116247U, 256877U, 160873U, 50428U, 78041U, 220839U, |
| 64667 | 105543U, 247893U, 197115U, 126190U, 266757U, 153320U, 189312U, 158985U, |
| 64668 | 194951U, 151177U, 49730U, 77295U, 220096U, 103372U, 245766U, 186906U, |
| 64669 | 123643U, 264232U, 146582U, 47000U, 74441U, 217282U, 98910U, 241383U, |
| 64670 | 181901U, 118724U, 259365U, 163455U, 52038U, 79735U, 222528U, 107622U, |
| 64671 | 249980U, 199881U, 128370U, 268952U, 155480U, 191561U, 157685U, 193852U, |
| 64672 | 148906U, 47817U, 75308U, 218142U, 101100U, 243495U, 184522U, 121249U, |
| 64673 | 261832U, 144279U, 45058U, 72423U, 215295U, 96589U, 239060U, 179471U, |
| 64674 | 116281U, 256913U, 160899U, 50456U, 78071U, 220871U, 105571U, 247923U, |
| 64675 | 197141U, 126218U, 266787U, 153354U, 189348U, 159011U, 194990U, 151223U, |
| 64676 | 49764U, 77331U, 220134U, 103406U, 245802U, 186938U, 123677U, 264268U, |
| 64677 | 146614U, 47034U, 74477U, 217320U, 98944U, 241419U, 181933U, 118758U, |
| 64678 | 259401U, 163481U, 52066U, 79765U, 222560U, 107650U, 250010U, 199931U, |
| 64679 | 128398U, 268982U, 155514U, 191619U, 157752U, 193905U, 149021U, 47907U, |
| 64680 | 75404U, 218244U, 101190U, 243591U, 184606U, 121339U, 261928U, 144394U, |
| 64681 | 45163U, 72535U, 215414U, 96694U, 239172U, 179569U, 116386U, 257025U, |
| 64682 | 160990U, 50540U, 78162U, 220969U, 105655U, 248014U, 197218U, 126302U, |
| 64683 | 266878U, 153425U, 189396U, 159089U, 195054U, 151338U, 49854U, 77427U, |
| 64684 | 220236U, 103496U, 245898U, 187022U, 123767U, 264364U, 146729U, 47139U, |
| 64685 | 74589U, 217439U, 99049U, 241531U, 182031U, 118863U, 259513U, 163572U, |
| 64686 | 52150U, 79856U, 222658U, 107734U, 250101U, 200008U, 128482U, 269073U, |
| 64687 | 155585U, 191667U, 22864U, 24323U, 25459U, 16711U, 16718U, 17082U, |
| 64688 | 3705U, 17100U, 3727U, 24684U, 25982U, 24895U, 169024U, 16659U, |
| 64689 | 33802U, 24160U, 34817U, 16665U, 33813U, 24166U, 34828U, 25909U, |
| 64690 | 39324U, 142689U, 177732U, 141189U, 176298U, 141794U, 176864U, 152187U, |
| 64691 | 188092U, 21465U, 3251U, 4951U, 442U, 23474U, 3543U, 5166U, |
| 64692 | 171571U, 142743U, 177786U, 171553U, 141239U, 176348U, 171562U, 141857U, |
| 64693 | 176927U, 152205U, 188110U, 21459U, 7511U, 7368U, 24690U, 7256U, |
| 64694 | 7378U, 8034U, 26120U, 25215U, 5472U, 57933U, 6255U, 33153U, |
| 64695 | 9086U, 18088U, 10325U, 35284U, 14630U, 19376U, 11826U, 172497U, |
| 64696 | 38245U, 16147U, 20877U, 13121U, 62448U, 6693U, 33453U, 9302U, |
| 64697 | 18274U, 10505U, 35927U, 15123U, 19745U, 12265U, 142834U, 37448U, |
| 64698 | 15719U, 20462U, 12748U, 177845U, 39083U, 27362U, 16517U, 26738U, |
| 64699 | 21315U, 13386U, 26397U, 27002U, 28765U, 2200U, 57685U, 5991U, |
| 64700 | 32985U, 8942U, 17992U, 10205U, 34996U, 14410U, 19222U, 11630U, |
| 64701 | 171796U, 38043U, 16015U, 20789U, 13009U, 62169U, 6495U, 33285U, |
| 64702 | 9158U, 18178U, 10385U, 35639U, 14903U, 19591U, 12069U, 141431U, |
| 64703 | 36816U, 15487U, 20170U, 12606U, 176499U, 38481U, 27158U, 16285U, |
| 64704 | 26558U, 21023U, 13244U, 26253U, 26882U, 28180U, 2283U, 2383U, |
| 64705 | 32531U, 8791U, 17861U, 10080U, 6123U, 33069U, 9014U, 18040U, |
| 64706 | 10265U, 172019U, 38152U, 16081U, 20833U, 13065U, 2516U, 32638U, |
| 64707 | 8869U, 17928U, 10144U, 6594U, 33369U, 9230U, 18226U, 10445U, |
| 64708 | 142120U, 37168U, 15603U, 20341U, 12677U, 177158U, 38818U, 27260U, |
| 64709 | 16401U, 26648U, 21194U, 13315U, 26325U, 26942U, 28311U, 5892U, |
| 64710 | 58656U, 6351U, 35441U, 14761U, 19467U, 11944U, 174258U, 38318U, |
| 64711 | 16208U, 20918U, 13174U, 63145U, 6776U, 36084U, 15254U, 19836U, |
| 64712 | 12383U, 152221U, 37567U, 15794U, 20543U, 12801U, 188132U, 39202U, |
| 64713 | 27459U, 16592U, 26823U, 21396U, 13439U, 26466U, 27059U, 31586U, |
| 64714 | 29241U, 153426U, 189397U, 155586U, 191668U, 39340U, 21895U, 24580U, |
| 64715 | 3990U, 25001U, 4082U, 17248U, 3768U, 7554U, 3631U, 25833U, |
| 64716 | 4134U, 24838U, 4019U, 26127U, 855U, 5700U, 17042U, 21905U, |
| 64717 | 25966U, |
| 64718 | }; |
| 64719 | |
| 64720 | static inline void InitX86MCInstrInfo(MCInstrInfo *II) { |
| 64721 | II->InitMCInstrInfo(X86Descs.Insts, X86InstrNameIndices, X86InstrNameData, nullptr, nullptr, 19817); |
| 64722 | } |
| 64723 | |
| 64724 | } // end namespace llvm |
| 64725 | #endif // GET_INSTRINFO_MC_DESC |
| 64726 | |
| 64727 | #ifdef GET_INSTRINFO_HEADER |
| 64728 | #undef GET_INSTRINFO_HEADER |
| 64729 | namespace llvm { |
| 64730 | struct X86GenInstrInfo : public TargetInstrInfo { |
| 64731 | explicit X86GenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u); |
| 64732 | ~X86GenInstrInfo() override = default; |
| 64733 | |
| 64734 | }; |
| 64735 | } // end namespace llvm |
| 64736 | #endif // GET_INSTRINFO_HEADER |
| 64737 | |
| 64738 | #ifdef GET_INSTRINFO_HELPER_DECLS |
| 64739 | #undef GET_INSTRINFO_HELPER_DECLS |
| 64740 | |
| 64741 | static bool isThreeOperandsLEA(const MachineInstr &MI); |
| 64742 | |
| 64743 | #endif // GET_INSTRINFO_HELPER_DECLS |
| 64744 | |
| 64745 | #ifdef GET_INSTRINFO_HELPERS |
| 64746 | #undef GET_INSTRINFO_HELPERS |
| 64747 | |
| 64748 | bool X86InstrInfo::isThreeOperandsLEA(const MachineInstr &MI) { |
| 64749 | switch(MI.getOpcode()) { |
| 64750 | case X86::LEA32r: |
| 64751 | case X86::LEA64r: |
| 64752 | case X86::LEA64_32r: |
| 64753 | case X86::LEA16r: |
| 64754 | return ( |
| 64755 | MI.getOperand(1).isReg() |
| 64756 | && MI.getOperand(1).getReg() != 0 |
| 64757 | && MI.getOperand(3).isReg() |
| 64758 | && MI.getOperand(3).getReg() != 0 |
| 64759 | && ( |
| 64760 | ( |
| 64761 | MI.getOperand(4).isImm() |
| 64762 | && MI.getOperand(4).getImm() != 0 |
| 64763 | ) |
| 64764 | || (MI.getOperand(4).isGlobal()) |
| 64765 | ) |
| 64766 | ); |
| 64767 | default: |
| 64768 | return false; |
| 64769 | } // end of switch-stmt |
| 64770 | } |
| 64771 | |
| 64772 | #endif // GET_INSTRINFO_HELPERS |
| 64773 | |
| 64774 | #ifdef GET_INSTRINFO_CTOR_DTOR |
| 64775 | #undef GET_INSTRINFO_CTOR_DTOR |
| 64776 | namespace llvm { |
| 64777 | extern const X86InstrTable X86Descs; |
| 64778 | extern const unsigned X86InstrNameIndices[]; |
| 64779 | extern const char X86InstrNameData[]; |
| 64780 | X86GenInstrInfo::X86GenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode) |
| 64781 | : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) { |
| 64782 | InitMCInstrInfo(X86Descs.Insts, X86InstrNameIndices, X86InstrNameData, nullptr, nullptr, 19817); |
| 64783 | } |
| 64784 | } // end namespace llvm |
| 64785 | #endif // GET_INSTRINFO_CTOR_DTOR |
| 64786 | |
| 64787 | #ifdef GET_INSTRINFO_OPERAND_ENUM |
| 64788 | #undef GET_INSTRINFO_OPERAND_ENUM |
| 64789 | namespace llvm { |
| 64790 | namespace X86 { |
| 64791 | namespace OpName { |
| 64792 | enum { |
| 64793 | OPERAND_LAST |
| 64794 | }; |
| 64795 | } // end namespace OpName |
| 64796 | } // end namespace X86 |
| 64797 | } // end namespace llvm |
| 64798 | #endif //GET_INSTRINFO_OPERAND_ENUM |
| 64799 | |
| 64800 | #ifdef GET_INSTRINFO_NAMED_OPS |
| 64801 | #undef GET_INSTRINFO_NAMED_OPS |
| 64802 | namespace llvm { |
| 64803 | namespace X86 { |
| 64804 | LLVM_READONLY |
| 64805 | int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { |
| 64806 | return -1; |
| 64807 | } |
| 64808 | } // end namespace X86 |
| 64809 | } // end namespace llvm |
| 64810 | #endif //GET_INSTRINFO_NAMED_OPS |
| 64811 | |
| 64812 | #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM |
| 64813 | #undef GET_INSTRINFO_OPERAND_TYPES_ENUM |
| 64814 | namespace llvm { |
| 64815 | namespace X86 { |
| 64816 | namespace OpTypes { |
| 64817 | enum OperandType { |
| 64818 | AVX512RC = 0, |
| 64819 | anymem = 1, |
| 64820 | brtarget = 2, |
| 64821 | brtarget8 = 3, |
| 64822 | brtarget16 = 4, |
| 64823 | brtarget32 = 5, |
| 64824 | ccode = 6, |
| 64825 | cflags = 7, |
| 64826 | dstidx8 = 8, |
| 64827 | dstidx16 = 9, |
| 64828 | dstidx32 = 10, |
| 64829 | dstidx64 = 11, |
| 64830 | f16mem = 12, |
| 64831 | f32imm = 13, |
| 64832 | f32mem = 14, |
| 64833 | f64imm = 15, |
| 64834 | f64mem = 16, |
| 64835 | f80mem = 17, |
| 64836 | f128mem = 18, |
| 64837 | f256mem = 19, |
| 64838 | f512mem = 20, |
| 64839 | i1imm = 21, |
| 64840 | i8imm = 22, |
| 64841 | i8mem = 23, |
| 64842 | i8mem_NOREX = 24, |
| 64843 | i16i8imm = 25, |
| 64844 | i16imm = 26, |
| 64845 | i16imm_brtarget = 27, |
| 64846 | i16mem = 28, |
| 64847 | i16u8imm = 29, |
| 64848 | i32i8imm = 30, |
| 64849 | i32imm = 31, |
| 64850 | i32imm_brtarget = 32, |
| 64851 | i32mem = 33, |
| 64852 | i32mem_TC = 34, |
| 64853 | i32u8imm = 35, |
| 64854 | i64i8imm = 36, |
| 64855 | i64i32imm = 37, |
| 64856 | i64i32imm_brtarget = 38, |
| 64857 | i64imm = 39, |
| 64858 | i64mem = 40, |
| 64859 | i64mem_TC = 41, |
| 64860 | i64u8imm = 42, |
| 64861 | i128mem = 43, |
| 64862 | i256mem = 44, |
| 64863 | i512mem = 45, |
| 64864 | i512mem_GR16 = 46, |
| 64865 | i512mem_GR32 = 47, |
| 64866 | i512mem_GR64 = 48, |
| 64867 | lea64_32mem = 49, |
| 64868 | lea64mem = 50, |
| 64869 | offset16_8 = 51, |
| 64870 | offset16_16 = 52, |
| 64871 | offset16_32 = 53, |
| 64872 | offset32_8 = 54, |
| 64873 | offset32_16 = 55, |
| 64874 | offset32_32 = 56, |
| 64875 | offset32_64 = 57, |
| 64876 | offset64_8 = 58, |
| 64877 | offset64_16 = 59, |
| 64878 | offset64_32 = 60, |
| 64879 | offset64_64 = 61, |
| 64880 | opaquemem = 62, |
| 64881 | ptype0 = 63, |
| 64882 | ptype1 = 64, |
| 64883 | ptype2 = 65, |
| 64884 | ptype3 = 66, |
| 64885 | ptype4 = 67, |
| 64886 | ptype5 = 68, |
| 64887 | sdmem = 69, |
| 64888 | shmem = 70, |
| 64889 | sibmem = 71, |
| 64890 | srcidx8 = 72, |
| 64891 | srcidx16 = 73, |
| 64892 | srcidx32 = 74, |
| 64893 | srcidx64 = 75, |
| 64894 | ssmem = 76, |
| 64895 | type0 = 77, |
| 64896 | type1 = 78, |
| 64897 | type2 = 79, |
| 64898 | type3 = 80, |
| 64899 | type4 = 81, |
| 64900 | type5 = 82, |
| 64901 | u4imm = 83, |
| 64902 | u8imm = 84, |
| 64903 | untyped_imm_0 = 85, |
| 64904 | vx64mem = 86, |
| 64905 | vx64xmem = 87, |
| 64906 | vx128mem = 88, |
| 64907 | vx128xmem = 89, |
| 64908 | vx256mem = 90, |
| 64909 | vx256xmem = 91, |
| 64910 | vy128mem = 92, |
| 64911 | vy128xmem = 93, |
| 64912 | vy256mem = 94, |
| 64913 | vy256xmem = 95, |
| 64914 | vy512xmem = 96, |
| 64915 | vz256mem = 97, |
| 64916 | vz512mem = 98, |
| 64917 | GR16orGR32orGR64 = 99, |
| 64918 | GR32orGR64 = 100, |
| 64919 | RSTi = 101, |
| 64920 | VK1Pair = 102, |
| 64921 | VK2Pair = 103, |
| 64922 | VK4Pair = 104, |
| 64923 | VK8Pair = 105, |
| 64924 | VK16Pair = 106, |
| 64925 | CCR = 107, |
| 64926 | CONTROL_REG = 108, |
| 64927 | DEBUG_REG = 109, |
| 64928 | DFCCR = 110, |
| 64929 | FPCCR = 111, |
| 64930 | FR16 = 112, |
| 64931 | FR16X = 113, |
| 64932 | FR32 = 114, |
| 64933 | FR32X = 115, |
| 64934 | FR64 = 116, |
| 64935 | FR64X = 117, |
| 64936 | GR8 = 118, |
| 64937 | GR8_ABCD_H = 119, |
| 64938 | GR8_ABCD_L = 120, |
| 64939 | GR8_NOREX = 121, |
| 64940 | GR8_NOREX2 = 122, |
| 64941 | GR16 = 123, |
| 64942 | GR16_ABCD = 124, |
| 64943 | GR16_NOREX = 125, |
| 64944 | GR16_NOREX2 = 126, |
| 64945 | GR32 = 127, |
| 64946 | GR32_ABCD = 128, |
| 64947 | GR32_AD = 129, |
| 64948 | GR32_ArgRef = 130, |
| 64949 | GR32_BPSP = 131, |
| 64950 | GR32_BSI = 132, |
| 64951 | GR32_CB = 133, |
| 64952 | GR32_DC = 134, |
| 64953 | GR32_DIBP = 135, |
| 64954 | GR32_NOREX = 136, |
| 64955 | GR32_NOREX2 = 137, |
| 64956 | GR32_NOREX2_NOSP = 138, |
| 64957 | GR32_NOREX_NOSP = 139, |
| 64958 | GR32_NOSP = 140, |
| 64959 | GR32_SIDI = 141, |
| 64960 | GR32_TC = 142, |
| 64961 | GR64 = 143, |
| 64962 | GR64PLTSafe = 144, |
| 64963 | GR64_ABCD = 145, |
| 64964 | GR64_AD = 146, |
| 64965 | GR64_ArgRef = 147, |
| 64966 | GR64_NOREX = 148, |
| 64967 | GR64_NOREX2 = 149, |
| 64968 | GR64_NOREX2_NOSP = 150, |
| 64969 | GR64_NOREX_NOSP = 151, |
| 64970 | GR64_NOSP = 152, |
| 64971 | GR64_TC = 153, |
| 64972 | GR64_TCW64 = 154, |
| 64973 | GRH8 = 155, |
| 64974 | GRH16 = 156, |
| 64975 | LOW32_ADDR_ACCESS = 157, |
| 64976 | LOW32_ADDR_ACCESS_RBP = 158, |
| 64977 | RFP32 = 159, |
| 64978 | RFP64 = 160, |
| 64979 | RFP80 = 161, |
| 64980 | RFP80_7 = 162, |
| 64981 | RST = 163, |
| 64982 | SEGMENT_REG = 164, |
| 64983 | TILE = 165, |
| 64984 | VK1 = 166, |
| 64985 | VK1PAIR = 167, |
| 64986 | VK1WM = 168, |
| 64987 | VK2 = 169, |
| 64988 | VK2PAIR = 170, |
| 64989 | VK2WM = 171, |
| 64990 | VK4 = 172, |
| 64991 | VK4PAIR = 173, |
| 64992 | VK4WM = 174, |
| 64993 | VK8 = 175, |
| 64994 | VK8PAIR = 176, |
| 64995 | VK8WM = 177, |
| 64996 | VK16 = 178, |
| 64997 | VK16PAIR = 179, |
| 64998 | VK16WM = 180, |
| 64999 | VK32 = 181, |
| 65000 | VK32WM = 182, |
| 65001 | VK64 = 183, |
| 65002 | VK64WM = 184, |
| 65003 | VR64 = 185, |
| 65004 | VR128 = 186, |
| 65005 | VR128X = 187, |
| 65006 | VR256 = 188, |
| 65007 | VR256X = 189, |
| 65008 | VR512 = 190, |
| 65009 | VR512_0_15 = 191, |
| 65010 | OPERAND_TYPE_LIST_END |
| 65011 | }; |
| 65012 | } // end namespace OpTypes |
| 65013 | } // end namespace X86 |
| 65014 | } // end namespace llvm |
| 65015 | #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM |
| 65016 | |
| 65017 | #ifdef GET_INSTRINFO_OPERAND_TYPE |
| 65018 | #undef GET_INSTRINFO_OPERAND_TYPE |
| 65019 | namespace llvm { |
| 65020 | namespace X86 { |
| 65021 | LLVM_READONLY |
| 65022 | static int getOperandType(uint16_t Opcode, uint16_t OpIdx) { |
| 65023 | static const uint32_t Offsets[] = { |
| 65024 | /* PHI */ |
| 65025 | 0, |
| 65026 | /* INLINEASM */ |
| 65027 | 1, |
| 65028 | /* INLINEASM_BR */ |
| 65029 | 1, |
| 65030 | /* CFI_INSTRUCTION */ |
| 65031 | 1, |
| 65032 | /* EH_LABEL */ |
| 65033 | 2, |
| 65034 | /* GC_LABEL */ |
| 65035 | 3, |
| 65036 | /* ANNOTATION_LABEL */ |
| 65037 | 4, |
| 65038 | /* KILL */ |
| 65039 | 5, |
| 65040 | /* EXTRACT_SUBREG */ |
| 65041 | 5, |
| 65042 | /* INSERT_SUBREG */ |
| 65043 | 8, |
| 65044 | /* IMPLICIT_DEF */ |
| 65045 | 12, |
| 65046 | /* SUBREG_TO_REG */ |
| 65047 | 13, |
| 65048 | /* COPY_TO_REGCLASS */ |
| 65049 | 17, |
| 65050 | /* DBG_VALUE */ |
| 65051 | 20, |
| 65052 | /* DBG_VALUE_LIST */ |
| 65053 | 20, |
| 65054 | /* DBG_INSTR_REF */ |
| 65055 | 20, |
| 65056 | /* DBG_PHI */ |
| 65057 | 20, |
| 65058 | /* DBG_LABEL */ |
| 65059 | 20, |
| 65060 | /* REG_SEQUENCE */ |
| 65061 | 21, |
| 65062 | /* COPY */ |
| 65063 | 23, |
| 65064 | /* BUNDLE */ |
| 65065 | 25, |
| 65066 | /* LIFETIME_START */ |
| 65067 | 25, |
| 65068 | /* LIFETIME_END */ |
| 65069 | 26, |
| 65070 | /* PSEUDO_PROBE */ |
| 65071 | 27, |
| 65072 | /* ARITH_FENCE */ |
| 65073 | 31, |
| 65074 | /* STACKMAP */ |
| 65075 | 33, |
| 65076 | /* FENTRY_CALL */ |
| 65077 | 35, |
| 65078 | /* PATCHPOINT */ |
| 65079 | 35, |
| 65080 | /* LOAD_STACK_GUARD */ |
| 65081 | 41, |
| 65082 | /* PREALLOCATED_SETUP */ |
| 65083 | 42, |
| 65084 | /* PREALLOCATED_ARG */ |
| 65085 | 43, |
| 65086 | /* STATEPOINT */ |
| 65087 | 46, |
| 65088 | /* LOCAL_ESCAPE */ |
| 65089 | 46, |
| 65090 | /* FAULTING_OP */ |
| 65091 | 48, |
| 65092 | /* PATCHABLE_OP */ |
| 65093 | 49, |
| 65094 | /* PATCHABLE_FUNCTION_ENTER */ |
| 65095 | 49, |
| 65096 | /* PATCHABLE_RET */ |
| 65097 | 49, |
| 65098 | /* PATCHABLE_FUNCTION_EXIT */ |
| 65099 | 49, |
| 65100 | /* PATCHABLE_TAIL_CALL */ |
| 65101 | 49, |
| 65102 | /* PATCHABLE_EVENT_CALL */ |
| 65103 | 49, |
| 65104 | /* PATCHABLE_TYPED_EVENT_CALL */ |
| 65105 | 51, |
| 65106 | /* ICALL_BRANCH_FUNNEL */ |
| 65107 | 54, |
| 65108 | /* MEMBARRIER */ |
| 65109 | 54, |
| 65110 | /* JUMP_TABLE_DEBUG_INFO */ |
| 65111 | 54, |
| 65112 | /* CONVERGENCECTRL_ENTRY */ |
| 65113 | 55, |
| 65114 | /* CONVERGENCECTRL_ANCHOR */ |
| 65115 | 56, |
| 65116 | /* CONVERGENCECTRL_LOOP */ |
| 65117 | 57, |
| 65118 | /* CONVERGENCECTRL_GLUE */ |
| 65119 | 59, |
| 65120 | /* G_ASSERT_SEXT */ |
| 65121 | 60, |
| 65122 | /* G_ASSERT_ZEXT */ |
| 65123 | 63, |
| 65124 | /* G_ASSERT_ALIGN */ |
| 65125 | 66, |
| 65126 | /* G_ADD */ |
| 65127 | 69, |
| 65128 | /* G_SUB */ |
| 65129 | 72, |
| 65130 | /* G_MUL */ |
| 65131 | 75, |
| 65132 | /* G_SDIV */ |
| 65133 | 78, |
| 65134 | /* G_UDIV */ |
| 65135 | 81, |
| 65136 | /* G_SREM */ |
| 65137 | 84, |
| 65138 | /* G_UREM */ |
| 65139 | 87, |
| 65140 | /* G_SDIVREM */ |
| 65141 | 90, |
| 65142 | /* G_UDIVREM */ |
| 65143 | 94, |
| 65144 | /* G_AND */ |
| 65145 | 98, |
| 65146 | /* G_OR */ |
| 65147 | 101, |
| 65148 | /* G_XOR */ |
| 65149 | 104, |
| 65150 | /* G_IMPLICIT_DEF */ |
| 65151 | 107, |
| 65152 | /* G_PHI */ |
| 65153 | 108, |
| 65154 | /* G_FRAME_INDEX */ |
| 65155 | 109, |
| 65156 | /* G_GLOBAL_VALUE */ |
| 65157 | 111, |
| 65158 | /* G_PTRAUTH_GLOBAL_VALUE */ |
| 65159 | 113, |
| 65160 | /* G_CONSTANT_POOL */ |
| 65161 | 118, |
| 65162 | /* G_EXTRACT */ |
| 65163 | 120, |
| 65164 | /* G_UNMERGE_VALUES */ |
| 65165 | 123, |
| 65166 | /* G_INSERT */ |
| 65167 | 125, |
| 65168 | /* G_MERGE_VALUES */ |
| 65169 | 129, |
| 65170 | /* G_BUILD_VECTOR */ |
| 65171 | 131, |
| 65172 | /* G_BUILD_VECTOR_TRUNC */ |
| 65173 | 133, |
| 65174 | /* G_CONCAT_VECTORS */ |
| 65175 | 135, |
| 65176 | /* G_PTRTOINT */ |
| 65177 | 137, |
| 65178 | /* G_INTTOPTR */ |
| 65179 | 139, |
| 65180 | /* G_BITCAST */ |
| 65181 | 141, |
| 65182 | /* G_FREEZE */ |
| 65183 | 143, |
| 65184 | /* G_CONSTANT_FOLD_BARRIER */ |
| 65185 | 145, |
| 65186 | /* G_INTRINSIC_FPTRUNC_ROUND */ |
| 65187 | 147, |
| 65188 | /* G_INTRINSIC_TRUNC */ |
| 65189 | 150, |
| 65190 | /* G_INTRINSIC_ROUND */ |
| 65191 | 152, |
| 65192 | /* G_INTRINSIC_LRINT */ |
| 65193 | 154, |
| 65194 | /* G_INTRINSIC_LLRINT */ |
| 65195 | 156, |
| 65196 | /* G_INTRINSIC_ROUNDEVEN */ |
| 65197 | 158, |
| 65198 | /* G_READCYCLECOUNTER */ |
| 65199 | 160, |
| 65200 | /* G_READSTEADYCOUNTER */ |
| 65201 | 161, |
| 65202 | /* G_LOAD */ |
| 65203 | 162, |
| 65204 | /* G_SEXTLOAD */ |
| 65205 | 164, |
| 65206 | /* G_ZEXTLOAD */ |
| 65207 | 166, |
| 65208 | /* G_INDEXED_LOAD */ |
| 65209 | 168, |
| 65210 | /* G_INDEXED_SEXTLOAD */ |
| 65211 | 173, |
| 65212 | /* G_INDEXED_ZEXTLOAD */ |
| 65213 | 178, |
| 65214 | /* G_STORE */ |
| 65215 | 183, |
| 65216 | /* G_INDEXED_STORE */ |
| 65217 | 185, |
| 65218 | /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ |
| 65219 | 190, |
| 65220 | /* G_ATOMIC_CMPXCHG */ |
| 65221 | 195, |
| 65222 | /* G_ATOMICRMW_XCHG */ |
| 65223 | 199, |
| 65224 | /* G_ATOMICRMW_ADD */ |
| 65225 | 202, |
| 65226 | /* G_ATOMICRMW_SUB */ |
| 65227 | 205, |
| 65228 | /* G_ATOMICRMW_AND */ |
| 65229 | 208, |
| 65230 | /* G_ATOMICRMW_NAND */ |
| 65231 | 211, |
| 65232 | /* G_ATOMICRMW_OR */ |
| 65233 | 214, |
| 65234 | /* G_ATOMICRMW_XOR */ |
| 65235 | 217, |
| 65236 | /* G_ATOMICRMW_MAX */ |
| 65237 | 220, |
| 65238 | /* G_ATOMICRMW_MIN */ |
| 65239 | 223, |
| 65240 | /* G_ATOMICRMW_UMAX */ |
| 65241 | 226, |
| 65242 | /* G_ATOMICRMW_UMIN */ |
| 65243 | 229, |
| 65244 | /* G_ATOMICRMW_FADD */ |
| 65245 | 232, |
| 65246 | /* G_ATOMICRMW_FSUB */ |
| 65247 | 235, |
| 65248 | /* G_ATOMICRMW_FMAX */ |
| 65249 | 238, |
| 65250 | /* G_ATOMICRMW_FMIN */ |
| 65251 | 241, |
| 65252 | /* G_ATOMICRMW_UINC_WRAP */ |
| 65253 | 244, |
| 65254 | /* G_ATOMICRMW_UDEC_WRAP */ |
| 65255 | 247, |
| 65256 | /* G_FENCE */ |
| 65257 | 250, |
| 65258 | /* G_PREFETCH */ |
| 65259 | 252, |
| 65260 | /* G_BRCOND */ |
| 65261 | 256, |
| 65262 | /* G_BRINDIRECT */ |
| 65263 | 258, |
| 65264 | /* G_INVOKE_REGION_START */ |
| 65265 | 259, |
| 65266 | /* G_INTRINSIC */ |
| 65267 | 259, |
| 65268 | /* G_INTRINSIC_W_SIDE_EFFECTS */ |
| 65269 | 260, |
| 65270 | /* G_INTRINSIC_CONVERGENT */ |
| 65271 | 261, |
| 65272 | /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */ |
| 65273 | 262, |
| 65274 | /* G_ANYEXT */ |
| 65275 | 263, |
| 65276 | /* G_TRUNC */ |
| 65277 | 265, |
| 65278 | /* G_CONSTANT */ |
| 65279 | 267, |
| 65280 | /* G_FCONSTANT */ |
| 65281 | 269, |
| 65282 | /* G_VASTART */ |
| 65283 | 271, |
| 65284 | /* G_VAARG */ |
| 65285 | 272, |
| 65286 | /* G_SEXT */ |
| 65287 | 275, |
| 65288 | /* G_SEXT_INREG */ |
| 65289 | 277, |
| 65290 | /* G_ZEXT */ |
| 65291 | 280, |
| 65292 | /* G_SHL */ |
| 65293 | 282, |
| 65294 | /* G_LSHR */ |
| 65295 | 285, |
| 65296 | /* G_ASHR */ |
| 65297 | 288, |
| 65298 | /* G_FSHL */ |
| 65299 | 291, |
| 65300 | /* G_FSHR */ |
| 65301 | 295, |
| 65302 | /* G_ROTR */ |
| 65303 | 299, |
| 65304 | /* G_ROTL */ |
| 65305 | 302, |
| 65306 | /* G_ICMP */ |
| 65307 | 305, |
| 65308 | /* G_FCMP */ |
| 65309 | 309, |
| 65310 | /* G_SCMP */ |
| 65311 | 313, |
| 65312 | /* G_UCMP */ |
| 65313 | 316, |
| 65314 | /* G_SELECT */ |
| 65315 | 319, |
| 65316 | /* G_UADDO */ |
| 65317 | 323, |
| 65318 | /* G_UADDE */ |
| 65319 | 327, |
| 65320 | /* G_USUBO */ |
| 65321 | 332, |
| 65322 | /* G_USUBE */ |
| 65323 | 336, |
| 65324 | /* G_SADDO */ |
| 65325 | 341, |
| 65326 | /* G_SADDE */ |
| 65327 | 345, |
| 65328 | /* G_SSUBO */ |
| 65329 | 350, |
| 65330 | /* G_SSUBE */ |
| 65331 | 354, |
| 65332 | /* G_UMULO */ |
| 65333 | 359, |
| 65334 | /* G_SMULO */ |
| 65335 | 363, |
| 65336 | /* G_UMULH */ |
| 65337 | 367, |
| 65338 | /* G_SMULH */ |
| 65339 | 370, |
| 65340 | /* G_UADDSAT */ |
| 65341 | 373, |
| 65342 | /* G_SADDSAT */ |
| 65343 | 376, |
| 65344 | /* G_USUBSAT */ |
| 65345 | 379, |
| 65346 | /* G_SSUBSAT */ |
| 65347 | 382, |
| 65348 | /* G_USHLSAT */ |
| 65349 | 385, |
| 65350 | /* G_SSHLSAT */ |
| 65351 | 388, |
| 65352 | /* G_SMULFIX */ |
| 65353 | 391, |
| 65354 | /* G_UMULFIX */ |
| 65355 | 395, |
| 65356 | /* G_SMULFIXSAT */ |
| 65357 | 399, |
| 65358 | /* G_UMULFIXSAT */ |
| 65359 | 403, |
| 65360 | /* G_SDIVFIX */ |
| 65361 | 407, |
| 65362 | /* G_UDIVFIX */ |
| 65363 | 411, |
| 65364 | /* G_SDIVFIXSAT */ |
| 65365 | 415, |
| 65366 | /* G_UDIVFIXSAT */ |
| 65367 | 419, |
| 65368 | /* G_FADD */ |
| 65369 | 423, |
| 65370 | /* G_FSUB */ |
| 65371 | 426, |
| 65372 | /* G_FMUL */ |
| 65373 | 429, |
| 65374 | /* G_FMA */ |
| 65375 | 432, |
| 65376 | /* G_FMAD */ |
| 65377 | 436, |
| 65378 | /* G_FDIV */ |
| 65379 | 440, |
| 65380 | /* G_FREM */ |
| 65381 | 443, |
| 65382 | /* G_FPOW */ |
| 65383 | 446, |
| 65384 | /* G_FPOWI */ |
| 65385 | 449, |
| 65386 | /* G_FEXP */ |
| 65387 | 452, |
| 65388 | /* G_FEXP2 */ |
| 65389 | 454, |
| 65390 | /* G_FEXP10 */ |
| 65391 | 456, |
| 65392 | /* G_FLOG */ |
| 65393 | 458, |
| 65394 | /* G_FLOG2 */ |
| 65395 | 460, |
| 65396 | /* G_FLOG10 */ |
| 65397 | 462, |
| 65398 | /* G_FLDEXP */ |
| 65399 | 464, |
| 65400 | /* G_FFREXP */ |
| 65401 | 467, |
| 65402 | /* G_FNEG */ |
| 65403 | 470, |
| 65404 | /* G_FPEXT */ |
| 65405 | 472, |
| 65406 | /* G_FPTRUNC */ |
| 65407 | 474, |
| 65408 | /* G_FPTOSI */ |
| 65409 | 476, |
| 65410 | /* G_FPTOUI */ |
| 65411 | 478, |
| 65412 | /* G_SITOFP */ |
| 65413 | 480, |
| 65414 | /* G_UITOFP */ |
| 65415 | 482, |
| 65416 | /* G_FABS */ |
| 65417 | 484, |
| 65418 | /* G_FCOPYSIGN */ |
| 65419 | 486, |
| 65420 | /* G_IS_FPCLASS */ |
| 65421 | 489, |
| 65422 | /* G_FCANONICALIZE */ |
| 65423 | 492, |
| 65424 | /* G_FMINNUM */ |
| 65425 | 494, |
| 65426 | /* G_FMAXNUM */ |
| 65427 | 497, |
| 65428 | /* G_FMINNUM_IEEE */ |
| 65429 | 500, |
| 65430 | /* G_FMAXNUM_IEEE */ |
| 65431 | 503, |
| 65432 | /* G_FMINIMUM */ |
| 65433 | 506, |
| 65434 | /* G_FMAXIMUM */ |
| 65435 | 509, |
| 65436 | /* G_GET_FPENV */ |
| 65437 | 512, |
| 65438 | /* G_SET_FPENV */ |
| 65439 | 513, |
| 65440 | /* G_RESET_FPENV */ |
| 65441 | 514, |
| 65442 | /* G_GET_FPMODE */ |
| 65443 | 514, |
| 65444 | /* G_SET_FPMODE */ |
| 65445 | 515, |
| 65446 | /* G_RESET_FPMODE */ |
| 65447 | 516, |
| 65448 | /* G_PTR_ADD */ |
| 65449 | 516, |
| 65450 | /* G_PTRMASK */ |
| 65451 | 519, |
| 65452 | /* G_SMIN */ |
| 65453 | 522, |
| 65454 | /* G_SMAX */ |
| 65455 | 525, |
| 65456 | /* G_UMIN */ |
| 65457 | 528, |
| 65458 | /* G_UMAX */ |
| 65459 | 531, |
| 65460 | /* G_ABS */ |
| 65461 | 534, |
| 65462 | /* G_LROUND */ |
| 65463 | 536, |
| 65464 | /* G_LLROUND */ |
| 65465 | 538, |
| 65466 | /* G_BR */ |
| 65467 | 540, |
| 65468 | /* G_BRJT */ |
| 65469 | 541, |
| 65470 | /* G_VSCALE */ |
| 65471 | 544, |
| 65472 | /* G_INSERT_SUBVECTOR */ |
| 65473 | 546, |
| 65474 | /* G_EXTRACT_SUBVECTOR */ |
| 65475 | 550, |
| 65476 | /* G_INSERT_VECTOR_ELT */ |
| 65477 | 553, |
| 65478 | /* G_EXTRACT_VECTOR_ELT */ |
| 65479 | 557, |
| 65480 | /* G_SHUFFLE_VECTOR */ |
| 65481 | 560, |
| 65482 | /* G_SPLAT_VECTOR */ |
| 65483 | 564, |
| 65484 | /* G_VECTOR_COMPRESS */ |
| 65485 | 566, |
| 65486 | /* G_CTTZ */ |
| 65487 | 570, |
| 65488 | /* G_CTTZ_ZERO_UNDEF */ |
| 65489 | 572, |
| 65490 | /* G_CTLZ */ |
| 65491 | 574, |
| 65492 | /* G_CTLZ_ZERO_UNDEF */ |
| 65493 | 576, |
| 65494 | /* G_CTPOP */ |
| 65495 | 578, |
| 65496 | /* G_BSWAP */ |
| 65497 | 580, |
| 65498 | /* G_BITREVERSE */ |
| 65499 | 582, |
| 65500 | /* G_FCEIL */ |
| 65501 | 584, |
| 65502 | /* G_FCOS */ |
| 65503 | 586, |
| 65504 | /* G_FSIN */ |
| 65505 | 588, |
| 65506 | /* G_FTAN */ |
| 65507 | 590, |
| 65508 | /* G_FACOS */ |
| 65509 | 592, |
| 65510 | /* G_FASIN */ |
| 65511 | 594, |
| 65512 | /* G_FATAN */ |
| 65513 | 596, |
| 65514 | /* G_FCOSH */ |
| 65515 | 598, |
| 65516 | /* G_FSINH */ |
| 65517 | 600, |
| 65518 | /* G_FTANH */ |
| 65519 | 602, |
| 65520 | /* G_FSQRT */ |
| 65521 | 604, |
| 65522 | /* G_FFLOOR */ |
| 65523 | 606, |
| 65524 | /* G_FRINT */ |
| 65525 | 608, |
| 65526 | /* G_FNEARBYINT */ |
| 65527 | 610, |
| 65528 | /* G_ADDRSPACE_CAST */ |
| 65529 | 612, |
| 65530 | /* G_BLOCK_ADDR */ |
| 65531 | 614, |
| 65532 | /* G_JUMP_TABLE */ |
| 65533 | 616, |
| 65534 | /* G_DYN_STACKALLOC */ |
| 65535 | 618, |
| 65536 | /* G_STACKSAVE */ |
| 65537 | 621, |
| 65538 | /* G_STACKRESTORE */ |
| 65539 | 622, |
| 65540 | /* G_STRICT_FADD */ |
| 65541 | 623, |
| 65542 | /* G_STRICT_FSUB */ |
| 65543 | 626, |
| 65544 | /* G_STRICT_FMUL */ |
| 65545 | 629, |
| 65546 | /* G_STRICT_FDIV */ |
| 65547 | 632, |
| 65548 | /* G_STRICT_FREM */ |
| 65549 | 635, |
| 65550 | /* G_STRICT_FMA */ |
| 65551 | 638, |
| 65552 | /* G_STRICT_FSQRT */ |
| 65553 | 642, |
| 65554 | /* G_STRICT_FLDEXP */ |
| 65555 | 644, |
| 65556 | /* G_READ_REGISTER */ |
| 65557 | 647, |
| 65558 | /* G_WRITE_REGISTER */ |
| 65559 | 649, |
| 65560 | /* G_MEMCPY */ |
| 65561 | 651, |
| 65562 | /* G_MEMCPY_INLINE */ |
| 65563 | 655, |
| 65564 | /* G_MEMMOVE */ |
| 65565 | 658, |
| 65566 | /* G_MEMSET */ |
| 65567 | 662, |
| 65568 | /* G_BZERO */ |
| 65569 | 666, |
| 65570 | /* G_TRAP */ |
| 65571 | 669, |
| 65572 | /* G_DEBUGTRAP */ |
| 65573 | 669, |
| 65574 | /* G_UBSANTRAP */ |
| 65575 | 669, |
| 65576 | /* G_VECREDUCE_SEQ_FADD */ |
| 65577 | 670, |
| 65578 | /* G_VECREDUCE_SEQ_FMUL */ |
| 65579 | 673, |
| 65580 | /* G_VECREDUCE_FADD */ |
| 65581 | 676, |
| 65582 | /* G_VECREDUCE_FMUL */ |
| 65583 | 678, |
| 65584 | /* G_VECREDUCE_FMAX */ |
| 65585 | 680, |
| 65586 | /* G_VECREDUCE_FMIN */ |
| 65587 | 682, |
| 65588 | /* G_VECREDUCE_FMAXIMUM */ |
| 65589 | 684, |
| 65590 | /* G_VECREDUCE_FMINIMUM */ |
| 65591 | 686, |
| 65592 | /* G_VECREDUCE_ADD */ |
| 65593 | 688, |
| 65594 | /* G_VECREDUCE_MUL */ |
| 65595 | 690, |
| 65596 | /* G_VECREDUCE_AND */ |
| 65597 | 692, |
| 65598 | /* G_VECREDUCE_OR */ |
| 65599 | 694, |
| 65600 | /* G_VECREDUCE_XOR */ |
| 65601 | 696, |
| 65602 | /* G_VECREDUCE_SMAX */ |
| 65603 | 698, |
| 65604 | /* G_VECREDUCE_SMIN */ |
| 65605 | 700, |
| 65606 | /* G_VECREDUCE_UMAX */ |
| 65607 | 702, |
| 65608 | /* G_VECREDUCE_UMIN */ |
| 65609 | 704, |
| 65610 | /* G_SBFX */ |
| 65611 | 706, |
| 65612 | /* G_UBFX */ |
| 65613 | 710, |
| 65614 | /* ADD16ri_DB */ |
| 65615 | 714, |
| 65616 | /* ADD16rr_DB */ |
| 65617 | 717, |
| 65618 | /* ADD32ri_DB */ |
| 65619 | 720, |
| 65620 | /* ADD32rr_DB */ |
| 65621 | 723, |
| 65622 | /* ADD64ri32_DB */ |
| 65623 | 726, |
| 65624 | /* ADD64rr_DB */ |
| 65625 | 729, |
| 65626 | /* ADD8ri_DB */ |
| 65627 | 732, |
| 65628 | /* ADD8rr_DB */ |
| 65629 | 735, |
| 65630 | /* AVX1_SETALLONES */ |
| 65631 | 738, |
| 65632 | /* AVX2_SETALLONES */ |
| 65633 | 739, |
| 65634 | /* AVX512_128_SET0 */ |
| 65635 | 740, |
| 65636 | /* AVX512_256_SET0 */ |
| 65637 | 741, |
| 65638 | /* AVX512_512_SET0 */ |
| 65639 | 742, |
| 65640 | /* AVX512_512_SETALLONES */ |
| 65641 | 743, |
| 65642 | /* AVX512_512_SEXT_MASK_32 */ |
| 65643 | 744, |
| 65644 | /* AVX512_512_SEXT_MASK_64 */ |
| 65645 | 746, |
| 65646 | /* AVX512_FsFLD0F128 */ |
| 65647 | 748, |
| 65648 | /* AVX512_FsFLD0SD */ |
| 65649 | 749, |
| 65650 | /* AVX512_FsFLD0SH */ |
| 65651 | 750, |
| 65652 | /* AVX512_FsFLD0SS */ |
| 65653 | 751, |
| 65654 | /* AVX_SET0 */ |
| 65655 | 752, |
| 65656 | /* CALL64m_RVMARKER */ |
| 65657 | 753, |
| 65658 | /* CALL64pcrel32_RVMARKER */ |
| 65659 | 755, |
| 65660 | /* CALL64r_RVMARKER */ |
| 65661 | 757, |
| 65662 | /* FsFLD0F128 */ |
| 65663 | 759, |
| 65664 | /* FsFLD0SD */ |
| 65665 | 760, |
| 65666 | /* FsFLD0SH */ |
| 65667 | 761, |
| 65668 | /* FsFLD0SS */ |
| 65669 | 762, |
| 65670 | /* INDIRECT_THUNK_CALL32 */ |
| 65671 | 763, |
| 65672 | /* INDIRECT_THUNK_CALL64 */ |
| 65673 | 764, |
| 65674 | /* INDIRECT_THUNK_TCRETURN32 */ |
| 65675 | 765, |
| 65676 | /* INDIRECT_THUNK_TCRETURN64 */ |
| 65677 | 767, |
| 65678 | /* KSET0D */ |
| 65679 | 769, |
| 65680 | /* KSET0Q */ |
| 65681 | 770, |
| 65682 | /* KSET0W */ |
| 65683 | 771, |
| 65684 | /* KSET1D */ |
| 65685 | 772, |
| 65686 | /* KSET1Q */ |
| 65687 | 773, |
| 65688 | /* KSET1W */ |
| 65689 | 774, |
| 65690 | /* LCMPXCHG16B_NO_RBX */ |
| 65691 | 775, |
| 65692 | /* LCMPXCHG16B_SAVE_RBX */ |
| 65693 | 777, |
| 65694 | /* MMX_SET0 */ |
| 65695 | 781, |
| 65696 | /* MORESTACK_RET */ |
| 65697 | 782, |
| 65698 | /* MORESTACK_RET_RESTORE_R10 */ |
| 65699 | 782, |
| 65700 | /* MOV32ImmSExti8 */ |
| 65701 | 782, |
| 65702 | /* MOV32r0 */ |
| 65703 | 784, |
| 65704 | /* MOV32r1 */ |
| 65705 | 785, |
| 65706 | /* MOV32r_1 */ |
| 65707 | 786, |
| 65708 | /* MOV32ri64 */ |
| 65709 | 787, |
| 65710 | /* MOV64ImmSExti8 */ |
| 65711 | 789, |
| 65712 | /* MWAITX */ |
| 65713 | 791, |
| 65714 | /* MWAITX_SAVE_RBX */ |
| 65715 | 794, |
| 65716 | /* PLDTILECFGV */ |
| 65717 | 797, |
| 65718 | /* PLEA32r */ |
| 65719 | 798, |
| 65720 | /* PLEA64r */ |
| 65721 | 800, |
| 65722 | /* PTDPBF16PSV */ |
| 65723 | 802, |
| 65724 | /* PTDPBSSDV */ |
| 65725 | 809, |
| 65726 | /* PTDPBSUDV */ |
| 65727 | 816, |
| 65728 | /* PTDPBUSDV */ |
| 65729 | 823, |
| 65730 | /* PTDPBUUDV */ |
| 65731 | 830, |
| 65732 | /* PTDPFP16PSV */ |
| 65733 | 837, |
| 65734 | /* PTILELOADDT1V */ |
| 65735 | 844, |
| 65736 | /* PTILELOADDV */ |
| 65737 | 848, |
| 65738 | /* PTILESTOREDV */ |
| 65739 | 852, |
| 65740 | /* PTILEZEROV */ |
| 65741 | 856, |
| 65742 | /* RDFLAGS32 */ |
| 65743 | 859, |
| 65744 | /* RDFLAGS64 */ |
| 65745 | 860, |
| 65746 | /* SEH_EndPrologue */ |
| 65747 | 861, |
| 65748 | /* SEH_Epilogue */ |
| 65749 | 861, |
| 65750 | /* SEH_PushFrame */ |
| 65751 | 861, |
| 65752 | /* SEH_PushReg */ |
| 65753 | 862, |
| 65754 | /* SEH_SaveReg */ |
| 65755 | 863, |
| 65756 | /* SEH_SaveXMM */ |
| 65757 | 865, |
| 65758 | /* SEH_SetFrame */ |
| 65759 | 867, |
| 65760 | /* SEH_StackAlign */ |
| 65761 | 869, |
| 65762 | /* SEH_StackAlloc */ |
| 65763 | 870, |
| 65764 | /* SETB_C32r */ |
| 65765 | 871, |
| 65766 | /* SETB_C64r */ |
| 65767 | 872, |
| 65768 | /* SHLDROT32ri */ |
| 65769 | 873, |
| 65770 | /* SHLDROT64ri */ |
| 65771 | 876, |
| 65772 | /* SHRDROT32ri */ |
| 65773 | 879, |
| 65774 | /* SHRDROT64ri */ |
| 65775 | 882, |
| 65776 | /* VMOVAPSZ128mr_NOVLX */ |
| 65777 | 885, |
| 65778 | /* VMOVAPSZ128rm_NOVLX */ |
| 65779 | 887, |
| 65780 | /* VMOVAPSZ256mr_NOVLX */ |
| 65781 | 889, |
| 65782 | /* VMOVAPSZ256rm_NOVLX */ |
| 65783 | 891, |
| 65784 | /* VMOVUPSZ128mr_NOVLX */ |
| 65785 | 893, |
| 65786 | /* VMOVUPSZ128rm_NOVLX */ |
| 65787 | 895, |
| 65788 | /* VMOVUPSZ256mr_NOVLX */ |
| 65789 | 897, |
| 65790 | /* VMOVUPSZ256rm_NOVLX */ |
| 65791 | 899, |
| 65792 | /* V_SET0 */ |
| 65793 | 901, |
| 65794 | /* V_SETALLONES */ |
| 65795 | 902, |
| 65796 | /* WRFLAGS32 */ |
| 65797 | 903, |
| 65798 | /* WRFLAGS64 */ |
| 65799 | 904, |
| 65800 | /* XABORT_DEF */ |
| 65801 | 905, |
| 65802 | /* XOR32_FP */ |
| 65803 | 905, |
| 65804 | /* XOR64_FP */ |
| 65805 | 907, |
| 65806 | /* AAA */ |
| 65807 | 909, |
| 65808 | /* AAD8i8 */ |
| 65809 | 909, |
| 65810 | /* AADD32mr */ |
| 65811 | 910, |
| 65812 | /* AADD32mr_EVEX */ |
| 65813 | 912, |
| 65814 | /* AADD64mr */ |
| 65815 | 914, |
| 65816 | /* AADD64mr_EVEX */ |
| 65817 | 916, |
| 65818 | /* AAM8i8 */ |
| 65819 | 918, |
| 65820 | /* AAND32mr */ |
| 65821 | 919, |
| 65822 | /* AAND32mr_EVEX */ |
| 65823 | 921, |
| 65824 | /* AAND64mr */ |
| 65825 | 923, |
| 65826 | /* AAND64mr_EVEX */ |
| 65827 | 925, |
| 65828 | /* AAS */ |
| 65829 | 927, |
| 65830 | /* ABS_F */ |
| 65831 | 927, |
| 65832 | /* ABS_Fp32 */ |
| 65833 | 927, |
| 65834 | /* ABS_Fp64 */ |
| 65835 | 929, |
| 65836 | /* ABS_Fp80 */ |
| 65837 | 931, |
| 65838 | /* ADC16i16 */ |
| 65839 | 933, |
| 65840 | /* ADC16mi */ |
| 65841 | 934, |
| 65842 | /* ADC16mi8 */ |
| 65843 | 936, |
| 65844 | /* ADC16mi8_EVEX */ |
| 65845 | 938, |
| 65846 | /* ADC16mi8_ND */ |
| 65847 | 940, |
| 65848 | /* ADC16mi_EVEX */ |
| 65849 | 943, |
| 65850 | /* ADC16mi_ND */ |
| 65851 | 945, |
| 65852 | /* ADC16mr */ |
| 65853 | 948, |
| 65854 | /* ADC16mr_EVEX */ |
| 65855 | 950, |
| 65856 | /* ADC16mr_ND */ |
| 65857 | 952, |
| 65858 | /* ADC16ri */ |
| 65859 | 955, |
| 65860 | /* ADC16ri8 */ |
| 65861 | 958, |
| 65862 | /* ADC16ri8_EVEX */ |
| 65863 | 961, |
| 65864 | /* ADC16ri8_ND */ |
| 65865 | 964, |
| 65866 | /* ADC16ri_EVEX */ |
| 65867 | 967, |
| 65868 | /* ADC16ri_ND */ |
| 65869 | 970, |
| 65870 | /* ADC16rm */ |
| 65871 | 973, |
| 65872 | /* ADC16rm_EVEX */ |
| 65873 | 976, |
| 65874 | /* ADC16rm_ND */ |
| 65875 | 979, |
| 65876 | /* ADC16rr */ |
| 65877 | 982, |
| 65878 | /* ADC16rr_EVEX */ |
| 65879 | 985, |
| 65880 | /* ADC16rr_EVEX_REV */ |
| 65881 | 988, |
| 65882 | /* ADC16rr_ND */ |
| 65883 | 991, |
| 65884 | /* ADC16rr_ND_REV */ |
| 65885 | 994, |
| 65886 | /* ADC16rr_REV */ |
| 65887 | 997, |
| 65888 | /* ADC32i32 */ |
| 65889 | 1000, |
| 65890 | /* ADC32mi */ |
| 65891 | 1001, |
| 65892 | /* ADC32mi8 */ |
| 65893 | 1003, |
| 65894 | /* ADC32mi8_EVEX */ |
| 65895 | 1005, |
| 65896 | /* ADC32mi8_ND */ |
| 65897 | 1007, |
| 65898 | /* ADC32mi_EVEX */ |
| 65899 | 1010, |
| 65900 | /* ADC32mi_ND */ |
| 65901 | 1012, |
| 65902 | /* ADC32mr */ |
| 65903 | 1015, |
| 65904 | /* ADC32mr_EVEX */ |
| 65905 | 1017, |
| 65906 | /* ADC32mr_ND */ |
| 65907 | 1019, |
| 65908 | /* ADC32ri */ |
| 65909 | 1022, |
| 65910 | /* ADC32ri8 */ |
| 65911 | 1025, |
| 65912 | /* ADC32ri8_EVEX */ |
| 65913 | 1028, |
| 65914 | /* ADC32ri8_ND */ |
| 65915 | 1031, |
| 65916 | /* ADC32ri_EVEX */ |
| 65917 | 1034, |
| 65918 | /* ADC32ri_ND */ |
| 65919 | 1037, |
| 65920 | /* ADC32rm */ |
| 65921 | 1040, |
| 65922 | /* ADC32rm_EVEX */ |
| 65923 | 1043, |
| 65924 | /* ADC32rm_ND */ |
| 65925 | 1046, |
| 65926 | /* ADC32rr */ |
| 65927 | 1049, |
| 65928 | /* ADC32rr_EVEX */ |
| 65929 | 1052, |
| 65930 | /* ADC32rr_EVEX_REV */ |
| 65931 | 1055, |
| 65932 | /* ADC32rr_ND */ |
| 65933 | 1058, |
| 65934 | /* ADC32rr_ND_REV */ |
| 65935 | 1061, |
| 65936 | /* ADC32rr_REV */ |
| 65937 | 1064, |
| 65938 | /* ADC64i32 */ |
| 65939 | 1067, |
| 65940 | /* ADC64mi32 */ |
| 65941 | 1068, |
| 65942 | /* ADC64mi32_EVEX */ |
| 65943 | 1070, |
| 65944 | /* ADC64mi32_ND */ |
| 65945 | 1072, |
| 65946 | /* ADC64mi8 */ |
| 65947 | 1075, |
| 65948 | /* ADC64mi8_EVEX */ |
| 65949 | 1077, |
| 65950 | /* ADC64mi8_ND */ |
| 65951 | 1079, |
| 65952 | /* ADC64mr */ |
| 65953 | 1082, |
| 65954 | /* ADC64mr_EVEX */ |
| 65955 | 1084, |
| 65956 | /* ADC64mr_ND */ |
| 65957 | 1086, |
| 65958 | /* ADC64ri32 */ |
| 65959 | 1089, |
| 65960 | /* ADC64ri32_EVEX */ |
| 65961 | 1092, |
| 65962 | /* ADC64ri32_ND */ |
| 65963 | 1095, |
| 65964 | /* ADC64ri8 */ |
| 65965 | 1098, |
| 65966 | /* ADC64ri8_EVEX */ |
| 65967 | 1101, |
| 65968 | /* ADC64ri8_ND */ |
| 65969 | 1104, |
| 65970 | /* ADC64rm */ |
| 65971 | 1107, |
| 65972 | /* ADC64rm_EVEX */ |
| 65973 | 1110, |
| 65974 | /* ADC64rm_ND */ |
| 65975 | 1113, |
| 65976 | /* ADC64rr */ |
| 65977 | 1116, |
| 65978 | /* ADC64rr_EVEX */ |
| 65979 | 1119, |
| 65980 | /* ADC64rr_EVEX_REV */ |
| 65981 | 1122, |
| 65982 | /* ADC64rr_ND */ |
| 65983 | 1125, |
| 65984 | /* ADC64rr_ND_REV */ |
| 65985 | 1128, |
| 65986 | /* ADC64rr_REV */ |
| 65987 | 1131, |
| 65988 | /* ADC8i8 */ |
| 65989 | 1134, |
| 65990 | /* ADC8mi */ |
| 65991 | 1135, |
| 65992 | /* ADC8mi8 */ |
| 65993 | 1137, |
| 65994 | /* ADC8mi_EVEX */ |
| 65995 | 1139, |
| 65996 | /* ADC8mi_ND */ |
| 65997 | 1141, |
| 65998 | /* ADC8mr */ |
| 65999 | 1144, |
| 66000 | /* ADC8mr_EVEX */ |
| 66001 | 1146, |
| 66002 | /* ADC8mr_ND */ |
| 66003 | 1148, |
| 66004 | /* ADC8ri */ |
| 66005 | 1151, |
| 66006 | /* ADC8ri8 */ |
| 66007 | 1154, |
| 66008 | /* ADC8ri_EVEX */ |
| 66009 | 1157, |
| 66010 | /* ADC8ri_ND */ |
| 66011 | 1160, |
| 66012 | /* ADC8rm */ |
| 66013 | 1163, |
| 66014 | /* ADC8rm_EVEX */ |
| 66015 | 1166, |
| 66016 | /* ADC8rm_ND */ |
| 66017 | 1169, |
| 66018 | /* ADC8rr */ |
| 66019 | 1172, |
| 66020 | /* ADC8rr_EVEX */ |
| 66021 | 1175, |
| 66022 | /* ADC8rr_EVEX_REV */ |
| 66023 | 1178, |
| 66024 | /* ADC8rr_ND */ |
| 66025 | 1181, |
| 66026 | /* ADC8rr_ND_REV */ |
| 66027 | 1184, |
| 66028 | /* ADC8rr_REV */ |
| 66029 | 1187, |
| 66030 | /* ADCX32rm */ |
| 66031 | 1190, |
| 66032 | /* ADCX32rm_EVEX */ |
| 66033 | 1193, |
| 66034 | /* ADCX32rm_ND */ |
| 66035 | 1196, |
| 66036 | /* ADCX32rr */ |
| 66037 | 1199, |
| 66038 | /* ADCX32rr_EVEX */ |
| 66039 | 1202, |
| 66040 | /* ADCX32rr_ND */ |
| 66041 | 1205, |
| 66042 | /* ADCX64rm */ |
| 66043 | 1208, |
| 66044 | /* ADCX64rm_EVEX */ |
| 66045 | 1211, |
| 66046 | /* ADCX64rm_ND */ |
| 66047 | 1214, |
| 66048 | /* ADCX64rr */ |
| 66049 | 1217, |
| 66050 | /* ADCX64rr_EVEX */ |
| 66051 | 1220, |
| 66052 | /* ADCX64rr_ND */ |
| 66053 | 1223, |
| 66054 | /* ADD16i16 */ |
| 66055 | 1226, |
| 66056 | /* ADD16mi */ |
| 66057 | 1227, |
| 66058 | /* ADD16mi8 */ |
| 66059 | 1229, |
| 66060 | /* ADD16mi8_EVEX */ |
| 66061 | 1231, |
| 66062 | /* ADD16mi8_ND */ |
| 66063 | 1233, |
| 66064 | /* ADD16mi8_NF */ |
| 66065 | 1236, |
| 66066 | /* ADD16mi8_NF_ND */ |
| 66067 | 1238, |
| 66068 | /* ADD16mi_EVEX */ |
| 66069 | 1241, |
| 66070 | /* ADD16mi_ND */ |
| 66071 | 1243, |
| 66072 | /* ADD16mi_NF */ |
| 66073 | 1246, |
| 66074 | /* ADD16mi_NF_ND */ |
| 66075 | 1248, |
| 66076 | /* ADD16mr */ |
| 66077 | 1251, |
| 66078 | /* ADD16mr_EVEX */ |
| 66079 | 1253, |
| 66080 | /* ADD16mr_ND */ |
| 66081 | 1255, |
| 66082 | /* ADD16mr_NF */ |
| 66083 | 1258, |
| 66084 | /* ADD16mr_NF_ND */ |
| 66085 | 1260, |
| 66086 | /* ADD16ri */ |
| 66087 | 1263, |
| 66088 | /* ADD16ri8 */ |
| 66089 | 1266, |
| 66090 | /* ADD16ri8_EVEX */ |
| 66091 | 1269, |
| 66092 | /* ADD16ri8_ND */ |
| 66093 | 1272, |
| 66094 | /* ADD16ri8_NF */ |
| 66095 | 1275, |
| 66096 | /* ADD16ri8_NF_ND */ |
| 66097 | 1278, |
| 66098 | /* ADD16ri_EVEX */ |
| 66099 | 1281, |
| 66100 | /* ADD16ri_ND */ |
| 66101 | 1284, |
| 66102 | /* ADD16ri_NF */ |
| 66103 | 1287, |
| 66104 | /* ADD16ri_NF_ND */ |
| 66105 | 1290, |
| 66106 | /* ADD16rm */ |
| 66107 | 1293, |
| 66108 | /* ADD16rm_EVEX */ |
| 66109 | 1296, |
| 66110 | /* ADD16rm_ND */ |
| 66111 | 1299, |
| 66112 | /* ADD16rm_NF */ |
| 66113 | 1302, |
| 66114 | /* ADD16rm_NF_ND */ |
| 66115 | 1305, |
| 66116 | /* ADD16rr */ |
| 66117 | 1308, |
| 66118 | /* ADD16rr_EVEX */ |
| 66119 | 1311, |
| 66120 | /* ADD16rr_EVEX_REV */ |
| 66121 | 1314, |
| 66122 | /* ADD16rr_ND */ |
| 66123 | 1317, |
| 66124 | /* ADD16rr_ND_REV */ |
| 66125 | 1320, |
| 66126 | /* ADD16rr_NF */ |
| 66127 | 1323, |
| 66128 | /* ADD16rr_NF_ND */ |
| 66129 | 1326, |
| 66130 | /* ADD16rr_NF_ND_REV */ |
| 66131 | 1329, |
| 66132 | /* ADD16rr_NF_REV */ |
| 66133 | 1332, |
| 66134 | /* ADD16rr_REV */ |
| 66135 | 1335, |
| 66136 | /* ADD32i32 */ |
| 66137 | 1338, |
| 66138 | /* ADD32mi */ |
| 66139 | 1339, |
| 66140 | /* ADD32mi8 */ |
| 66141 | 1341, |
| 66142 | /* ADD32mi8_EVEX */ |
| 66143 | 1343, |
| 66144 | /* ADD32mi8_ND */ |
| 66145 | 1345, |
| 66146 | /* ADD32mi8_NF */ |
| 66147 | 1348, |
| 66148 | /* ADD32mi8_NF_ND */ |
| 66149 | 1350, |
| 66150 | /* ADD32mi_EVEX */ |
| 66151 | 1353, |
| 66152 | /* ADD32mi_ND */ |
| 66153 | 1355, |
| 66154 | /* ADD32mi_NF */ |
| 66155 | 1358, |
| 66156 | /* ADD32mi_NF_ND */ |
| 66157 | 1360, |
| 66158 | /* ADD32mr */ |
| 66159 | 1363, |
| 66160 | /* ADD32mr_EVEX */ |
| 66161 | 1365, |
| 66162 | /* ADD32mr_ND */ |
| 66163 | 1367, |
| 66164 | /* ADD32mr_NF */ |
| 66165 | 1370, |
| 66166 | /* ADD32mr_NF_ND */ |
| 66167 | 1372, |
| 66168 | /* ADD32ri */ |
| 66169 | 1375, |
| 66170 | /* ADD32ri8 */ |
| 66171 | 1378, |
| 66172 | /* ADD32ri8_EVEX */ |
| 66173 | 1381, |
| 66174 | /* ADD32ri8_ND */ |
| 66175 | 1384, |
| 66176 | /* ADD32ri8_NF */ |
| 66177 | 1387, |
| 66178 | /* ADD32ri8_NF_ND */ |
| 66179 | 1390, |
| 66180 | /* ADD32ri_EVEX */ |
| 66181 | 1393, |
| 66182 | /* ADD32ri_ND */ |
| 66183 | 1396, |
| 66184 | /* ADD32ri_NF */ |
| 66185 | 1399, |
| 66186 | /* ADD32ri_NF_ND */ |
| 66187 | 1402, |
| 66188 | /* ADD32rm */ |
| 66189 | 1405, |
| 66190 | /* ADD32rm_EVEX */ |
| 66191 | 1408, |
| 66192 | /* ADD32rm_ND */ |
| 66193 | 1411, |
| 66194 | /* ADD32rm_NF */ |
| 66195 | 1414, |
| 66196 | /* ADD32rm_NF_ND */ |
| 66197 | 1417, |
| 66198 | /* ADD32rr */ |
| 66199 | 1420, |
| 66200 | /* ADD32rr_EVEX */ |
| 66201 | 1423, |
| 66202 | /* ADD32rr_EVEX_REV */ |
| 66203 | 1426, |
| 66204 | /* ADD32rr_ND */ |
| 66205 | 1429, |
| 66206 | /* ADD32rr_ND_REV */ |
| 66207 | 1432, |
| 66208 | /* ADD32rr_NF */ |
| 66209 | 1435, |
| 66210 | /* ADD32rr_NF_ND */ |
| 66211 | 1438, |
| 66212 | /* ADD32rr_NF_ND_REV */ |
| 66213 | 1441, |
| 66214 | /* ADD32rr_NF_REV */ |
| 66215 | 1444, |
| 66216 | /* ADD32rr_REV */ |
| 66217 | 1447, |
| 66218 | /* ADD64i32 */ |
| 66219 | 1450, |
| 66220 | /* ADD64mi32 */ |
| 66221 | 1451, |
| 66222 | /* ADD64mi32_EVEX */ |
| 66223 | 1453, |
| 66224 | /* ADD64mi32_ND */ |
| 66225 | 1455, |
| 66226 | /* ADD64mi32_NF */ |
| 66227 | 1458, |
| 66228 | /* ADD64mi32_NF_ND */ |
| 66229 | 1460, |
| 66230 | /* ADD64mi8 */ |
| 66231 | 1463, |
| 66232 | /* ADD64mi8_EVEX */ |
| 66233 | 1465, |
| 66234 | /* ADD64mi8_ND */ |
| 66235 | 1467, |
| 66236 | /* ADD64mi8_NF */ |
| 66237 | 1470, |
| 66238 | /* ADD64mi8_NF_ND */ |
| 66239 | 1472, |
| 66240 | /* ADD64mr */ |
| 66241 | 1475, |
| 66242 | /* ADD64mr_EVEX */ |
| 66243 | 1477, |
| 66244 | /* ADD64mr_ND */ |
| 66245 | 1479, |
| 66246 | /* ADD64mr_NF */ |
| 66247 | 1482, |
| 66248 | /* ADD64mr_NF_ND */ |
| 66249 | 1484, |
| 66250 | /* ADD64ri32 */ |
| 66251 | 1487, |
| 66252 | /* ADD64ri32_EVEX */ |
| 66253 | 1490, |
| 66254 | /* ADD64ri32_ND */ |
| 66255 | 1493, |
| 66256 | /* ADD64ri32_NF */ |
| 66257 | 1496, |
| 66258 | /* ADD64ri32_NF_ND */ |
| 66259 | 1499, |
| 66260 | /* ADD64ri8 */ |
| 66261 | 1502, |
| 66262 | /* ADD64ri8_EVEX */ |
| 66263 | 1505, |
| 66264 | /* ADD64ri8_ND */ |
| 66265 | 1508, |
| 66266 | /* ADD64ri8_NF */ |
| 66267 | 1511, |
| 66268 | /* ADD64ri8_NF_ND */ |
| 66269 | 1514, |
| 66270 | /* ADD64rm */ |
| 66271 | 1517, |
| 66272 | /* ADD64rm_EVEX */ |
| 66273 | 1520, |
| 66274 | /* ADD64rm_ND */ |
| 66275 | 1523, |
| 66276 | /* ADD64rm_NF */ |
| 66277 | 1526, |
| 66278 | /* ADD64rm_NF_ND */ |
| 66279 | 1529, |
| 66280 | /* ADD64rr */ |
| 66281 | 1532, |
| 66282 | /* ADD64rr_EVEX */ |
| 66283 | 1535, |
| 66284 | /* ADD64rr_EVEX_REV */ |
| 66285 | 1538, |
| 66286 | /* ADD64rr_ND */ |
| 66287 | 1541, |
| 66288 | /* ADD64rr_ND_REV */ |
| 66289 | 1544, |
| 66290 | /* ADD64rr_NF */ |
| 66291 | 1547, |
| 66292 | /* ADD64rr_NF_ND */ |
| 66293 | 1550, |
| 66294 | /* ADD64rr_NF_ND_REV */ |
| 66295 | 1553, |
| 66296 | /* ADD64rr_NF_REV */ |
| 66297 | 1556, |
| 66298 | /* ADD64rr_REV */ |
| 66299 | 1559, |
| 66300 | /* ADD8i8 */ |
| 66301 | 1562, |
| 66302 | /* ADD8mi */ |
| 66303 | 1563, |
| 66304 | /* ADD8mi8 */ |
| 66305 | 1565, |
| 66306 | /* ADD8mi_EVEX */ |
| 66307 | 1567, |
| 66308 | /* ADD8mi_ND */ |
| 66309 | 1569, |
| 66310 | /* ADD8mi_NF */ |
| 66311 | 1572, |
| 66312 | /* ADD8mi_NF_ND */ |
| 66313 | 1574, |
| 66314 | /* ADD8mr */ |
| 66315 | 1577, |
| 66316 | /* ADD8mr_EVEX */ |
| 66317 | 1579, |
| 66318 | /* ADD8mr_ND */ |
| 66319 | 1581, |
| 66320 | /* ADD8mr_NF */ |
| 66321 | 1584, |
| 66322 | /* ADD8mr_NF_ND */ |
| 66323 | 1586, |
| 66324 | /* ADD8ri */ |
| 66325 | 1589, |
| 66326 | /* ADD8ri8 */ |
| 66327 | 1592, |
| 66328 | /* ADD8ri_EVEX */ |
| 66329 | 1595, |
| 66330 | /* ADD8ri_ND */ |
| 66331 | 1598, |
| 66332 | /* ADD8ri_NF */ |
| 66333 | 1601, |
| 66334 | /* ADD8ri_NF_ND */ |
| 66335 | 1604, |
| 66336 | /* ADD8rm */ |
| 66337 | 1607, |
| 66338 | /* ADD8rm_EVEX */ |
| 66339 | 1610, |
| 66340 | /* ADD8rm_ND */ |
| 66341 | 1613, |
| 66342 | /* ADD8rm_NF */ |
| 66343 | 1616, |
| 66344 | /* ADD8rm_NF_ND */ |
| 66345 | 1619, |
| 66346 | /* ADD8rr */ |
| 66347 | 1622, |
| 66348 | /* ADD8rr_EVEX */ |
| 66349 | 1625, |
| 66350 | /* ADD8rr_EVEX_REV */ |
| 66351 | 1628, |
| 66352 | /* ADD8rr_ND */ |
| 66353 | 1631, |
| 66354 | /* ADD8rr_ND_REV */ |
| 66355 | 1634, |
| 66356 | /* ADD8rr_NF */ |
| 66357 | 1637, |
| 66358 | /* ADD8rr_NF_ND */ |
| 66359 | 1640, |
| 66360 | /* ADD8rr_NF_ND_REV */ |
| 66361 | 1643, |
| 66362 | /* ADD8rr_NF_REV */ |
| 66363 | 1646, |
| 66364 | /* ADD8rr_REV */ |
| 66365 | 1649, |
| 66366 | /* ADDPDrm */ |
| 66367 | 1652, |
| 66368 | /* ADDPDrr */ |
| 66369 | 1655, |
| 66370 | /* ADDPSrm */ |
| 66371 | 1658, |
| 66372 | /* ADDPSrr */ |
| 66373 | 1661, |
| 66374 | /* ADDR16_PREFIX */ |
| 66375 | 1664, |
| 66376 | /* ADDR32_PREFIX */ |
| 66377 | 1664, |
| 66378 | /* ADDSDrm */ |
| 66379 | 1664, |
| 66380 | /* ADDSDrm_Int */ |
| 66381 | 1667, |
| 66382 | /* ADDSDrr */ |
| 66383 | 1670, |
| 66384 | /* ADDSDrr_Int */ |
| 66385 | 1673, |
| 66386 | /* ADDSSrm */ |
| 66387 | 1676, |
| 66388 | /* ADDSSrm_Int */ |
| 66389 | 1679, |
| 66390 | /* ADDSSrr */ |
| 66391 | 1682, |
| 66392 | /* ADDSSrr_Int */ |
| 66393 | 1685, |
| 66394 | /* ADDSUBPDrm */ |
| 66395 | 1688, |
| 66396 | /* ADDSUBPDrr */ |
| 66397 | 1691, |
| 66398 | /* ADDSUBPSrm */ |
| 66399 | 1694, |
| 66400 | /* ADDSUBPSrr */ |
| 66401 | 1697, |
| 66402 | /* ADD_F32m */ |
| 66403 | 1700, |
| 66404 | /* ADD_F64m */ |
| 66405 | 1701, |
| 66406 | /* ADD_FI16m */ |
| 66407 | 1702, |
| 66408 | /* ADD_FI32m */ |
| 66409 | 1703, |
| 66410 | /* ADD_FPrST0 */ |
| 66411 | 1704, |
| 66412 | /* ADD_FST0r */ |
| 66413 | 1705, |
| 66414 | /* ADD_Fp32 */ |
| 66415 | 1706, |
| 66416 | /* ADD_Fp32m */ |
| 66417 | 1709, |
| 66418 | /* ADD_Fp64 */ |
| 66419 | 1712, |
| 66420 | /* ADD_Fp64m */ |
| 66421 | 1715, |
| 66422 | /* ADD_Fp64m32 */ |
| 66423 | 1718, |
| 66424 | /* ADD_Fp80 */ |
| 66425 | 1721, |
| 66426 | /* ADD_Fp80m32 */ |
| 66427 | 1724, |
| 66428 | /* ADD_Fp80m64 */ |
| 66429 | 1727, |
| 66430 | /* ADD_FpI16m32 */ |
| 66431 | 1730, |
| 66432 | /* ADD_FpI16m64 */ |
| 66433 | 1733, |
| 66434 | /* ADD_FpI16m80 */ |
| 66435 | 1736, |
| 66436 | /* ADD_FpI32m32 */ |
| 66437 | 1739, |
| 66438 | /* ADD_FpI32m64 */ |
| 66439 | 1742, |
| 66440 | /* ADD_FpI32m80 */ |
| 66441 | 1745, |
| 66442 | /* ADD_FrST0 */ |
| 66443 | 1748, |
| 66444 | /* ADJCALLSTACKDOWN32 */ |
| 66445 | 1749, |
| 66446 | /* ADJCALLSTACKDOWN64 */ |
| 66447 | 1752, |
| 66448 | /* ADJCALLSTACKUP32 */ |
| 66449 | 1755, |
| 66450 | /* ADJCALLSTACKUP64 */ |
| 66451 | 1757, |
| 66452 | /* ADOX32rm */ |
| 66453 | 1759, |
| 66454 | /* ADOX32rm_EVEX */ |
| 66455 | 1762, |
| 66456 | /* ADOX32rm_ND */ |
| 66457 | 1765, |
| 66458 | /* ADOX32rr */ |
| 66459 | 1768, |
| 66460 | /* ADOX32rr_EVEX */ |
| 66461 | 1771, |
| 66462 | /* ADOX32rr_ND */ |
| 66463 | 1774, |
| 66464 | /* ADOX64rm */ |
| 66465 | 1777, |
| 66466 | /* ADOX64rm_EVEX */ |
| 66467 | 1780, |
| 66468 | /* ADOX64rm_ND */ |
| 66469 | 1783, |
| 66470 | /* ADOX64rr */ |
| 66471 | 1786, |
| 66472 | /* ADOX64rr_EVEX */ |
| 66473 | 1789, |
| 66474 | /* ADOX64rr_ND */ |
| 66475 | 1792, |
| 66476 | /* AESDEC128KL */ |
| 66477 | 1795, |
| 66478 | /* AESDEC256KL */ |
| 66479 | 1798, |
| 66480 | /* AESDECLASTrm */ |
| 66481 | 1801, |
| 66482 | /* AESDECLASTrr */ |
| 66483 | 1804, |
| 66484 | /* AESDECWIDE128KL */ |
| 66485 | 1807, |
| 66486 | /* AESDECWIDE256KL */ |
| 66487 | 1808, |
| 66488 | /* AESDECrm */ |
| 66489 | 1809, |
| 66490 | /* AESDECrr */ |
| 66491 | 1812, |
| 66492 | /* AESENC128KL */ |
| 66493 | 1815, |
| 66494 | /* AESENC256KL */ |
| 66495 | 1818, |
| 66496 | /* AESENCLASTrm */ |
| 66497 | 1821, |
| 66498 | /* AESENCLASTrr */ |
| 66499 | 1824, |
| 66500 | /* AESENCWIDE128KL */ |
| 66501 | 1827, |
| 66502 | /* AESENCWIDE256KL */ |
| 66503 | 1828, |
| 66504 | /* AESENCrm */ |
| 66505 | 1829, |
| 66506 | /* AESENCrr */ |
| 66507 | 1832, |
| 66508 | /* AESIMCrm */ |
| 66509 | 1835, |
| 66510 | /* AESIMCrr */ |
| 66511 | 1837, |
| 66512 | /* AESKEYGENASSIST128rm */ |
| 66513 | 1839, |
| 66514 | /* AESKEYGENASSIST128rr */ |
| 66515 | 1842, |
| 66516 | /* AND16i16 */ |
| 66517 | 1845, |
| 66518 | /* AND16mi */ |
| 66519 | 1846, |
| 66520 | /* AND16mi8 */ |
| 66521 | 1848, |
| 66522 | /* AND16mi8_EVEX */ |
| 66523 | 1850, |
| 66524 | /* AND16mi8_ND */ |
| 66525 | 1852, |
| 66526 | /* AND16mi8_NF */ |
| 66527 | 1855, |
| 66528 | /* AND16mi8_NF_ND */ |
| 66529 | 1857, |
| 66530 | /* AND16mi_EVEX */ |
| 66531 | 1860, |
| 66532 | /* AND16mi_ND */ |
| 66533 | 1862, |
| 66534 | /* AND16mi_NF */ |
| 66535 | 1865, |
| 66536 | /* AND16mi_NF_ND */ |
| 66537 | 1867, |
| 66538 | /* AND16mr */ |
| 66539 | 1870, |
| 66540 | /* AND16mr_EVEX */ |
| 66541 | 1872, |
| 66542 | /* AND16mr_ND */ |
| 66543 | 1874, |
| 66544 | /* AND16mr_NF */ |
| 66545 | 1877, |
| 66546 | /* AND16mr_NF_ND */ |
| 66547 | 1879, |
| 66548 | /* AND16ri */ |
| 66549 | 1882, |
| 66550 | /* AND16ri8 */ |
| 66551 | 1885, |
| 66552 | /* AND16ri8_EVEX */ |
| 66553 | 1888, |
| 66554 | /* AND16ri8_ND */ |
| 66555 | 1891, |
| 66556 | /* AND16ri8_NF */ |
| 66557 | 1894, |
| 66558 | /* AND16ri8_NF_ND */ |
| 66559 | 1897, |
| 66560 | /* AND16ri_EVEX */ |
| 66561 | 1900, |
| 66562 | /* AND16ri_ND */ |
| 66563 | 1903, |
| 66564 | /* AND16ri_NF */ |
| 66565 | 1906, |
| 66566 | /* AND16ri_NF_ND */ |
| 66567 | 1909, |
| 66568 | /* AND16rm */ |
| 66569 | 1912, |
| 66570 | /* AND16rm_EVEX */ |
| 66571 | 1915, |
| 66572 | /* AND16rm_ND */ |
| 66573 | 1918, |
| 66574 | /* AND16rm_NF */ |
| 66575 | 1921, |
| 66576 | /* AND16rm_NF_ND */ |
| 66577 | 1924, |
| 66578 | /* AND16rr */ |
| 66579 | 1927, |
| 66580 | /* AND16rr_EVEX */ |
| 66581 | 1930, |
| 66582 | /* AND16rr_EVEX_REV */ |
| 66583 | 1933, |
| 66584 | /* AND16rr_ND */ |
| 66585 | 1936, |
| 66586 | /* AND16rr_ND_REV */ |
| 66587 | 1939, |
| 66588 | /* AND16rr_NF */ |
| 66589 | 1942, |
| 66590 | /* AND16rr_NF_ND */ |
| 66591 | 1945, |
| 66592 | /* AND16rr_NF_ND_REV */ |
| 66593 | 1948, |
| 66594 | /* AND16rr_NF_REV */ |
| 66595 | 1951, |
| 66596 | /* AND16rr_REV */ |
| 66597 | 1954, |
| 66598 | /* AND32i32 */ |
| 66599 | 1957, |
| 66600 | /* AND32mi */ |
| 66601 | 1958, |
| 66602 | /* AND32mi8 */ |
| 66603 | 1960, |
| 66604 | /* AND32mi8_EVEX */ |
| 66605 | 1962, |
| 66606 | /* AND32mi8_ND */ |
| 66607 | 1964, |
| 66608 | /* AND32mi8_NF */ |
| 66609 | 1967, |
| 66610 | /* AND32mi8_NF_ND */ |
| 66611 | 1969, |
| 66612 | /* AND32mi_EVEX */ |
| 66613 | 1972, |
| 66614 | /* AND32mi_ND */ |
| 66615 | 1974, |
| 66616 | /* AND32mi_NF */ |
| 66617 | 1977, |
| 66618 | /* AND32mi_NF_ND */ |
| 66619 | 1979, |
| 66620 | /* AND32mr */ |
| 66621 | 1982, |
| 66622 | /* AND32mr_EVEX */ |
| 66623 | 1984, |
| 66624 | /* AND32mr_ND */ |
| 66625 | 1986, |
| 66626 | /* AND32mr_NF */ |
| 66627 | 1989, |
| 66628 | /* AND32mr_NF_ND */ |
| 66629 | 1991, |
| 66630 | /* AND32ri */ |
| 66631 | 1994, |
| 66632 | /* AND32ri8 */ |
| 66633 | 1997, |
| 66634 | /* AND32ri8_EVEX */ |
| 66635 | 2000, |
| 66636 | /* AND32ri8_ND */ |
| 66637 | 2003, |
| 66638 | /* AND32ri8_NF */ |
| 66639 | 2006, |
| 66640 | /* AND32ri8_NF_ND */ |
| 66641 | 2009, |
| 66642 | /* AND32ri_EVEX */ |
| 66643 | 2012, |
| 66644 | /* AND32ri_ND */ |
| 66645 | 2015, |
| 66646 | /* AND32ri_NF */ |
| 66647 | 2018, |
| 66648 | /* AND32ri_NF_ND */ |
| 66649 | 2021, |
| 66650 | /* AND32rm */ |
| 66651 | 2024, |
| 66652 | /* AND32rm_EVEX */ |
| 66653 | 2027, |
| 66654 | /* AND32rm_ND */ |
| 66655 | 2030, |
| 66656 | /* AND32rm_NF */ |
| 66657 | 2033, |
| 66658 | /* AND32rm_NF_ND */ |
| 66659 | 2036, |
| 66660 | /* AND32rr */ |
| 66661 | 2039, |
| 66662 | /* AND32rr_EVEX */ |
| 66663 | 2042, |
| 66664 | /* AND32rr_EVEX_REV */ |
| 66665 | 2045, |
| 66666 | /* AND32rr_ND */ |
| 66667 | 2048, |
| 66668 | /* AND32rr_ND_REV */ |
| 66669 | 2051, |
| 66670 | /* AND32rr_NF */ |
| 66671 | 2054, |
| 66672 | /* AND32rr_NF_ND */ |
| 66673 | 2057, |
| 66674 | /* AND32rr_NF_ND_REV */ |
| 66675 | 2060, |
| 66676 | /* AND32rr_NF_REV */ |
| 66677 | 2063, |
| 66678 | /* AND32rr_REV */ |
| 66679 | 2066, |
| 66680 | /* AND64i32 */ |
| 66681 | 2069, |
| 66682 | /* AND64mi32 */ |
| 66683 | 2070, |
| 66684 | /* AND64mi32_EVEX */ |
| 66685 | 2072, |
| 66686 | /* AND64mi32_ND */ |
| 66687 | 2074, |
| 66688 | /* AND64mi32_NF */ |
| 66689 | 2077, |
| 66690 | /* AND64mi32_NF_ND */ |
| 66691 | 2079, |
| 66692 | /* AND64mi8 */ |
| 66693 | 2082, |
| 66694 | /* AND64mi8_EVEX */ |
| 66695 | 2084, |
| 66696 | /* AND64mi8_ND */ |
| 66697 | 2086, |
| 66698 | /* AND64mi8_NF */ |
| 66699 | 2089, |
| 66700 | /* AND64mi8_NF_ND */ |
| 66701 | 2091, |
| 66702 | /* AND64mr */ |
| 66703 | 2094, |
| 66704 | /* AND64mr_EVEX */ |
| 66705 | 2096, |
| 66706 | /* AND64mr_ND */ |
| 66707 | 2098, |
| 66708 | /* AND64mr_NF */ |
| 66709 | 2101, |
| 66710 | /* AND64mr_NF_ND */ |
| 66711 | 2103, |
| 66712 | /* AND64ri32 */ |
| 66713 | 2106, |
| 66714 | /* AND64ri32_EVEX */ |
| 66715 | 2109, |
| 66716 | /* AND64ri32_ND */ |
| 66717 | 2112, |
| 66718 | /* AND64ri32_NF */ |
| 66719 | 2115, |
| 66720 | /* AND64ri32_NF_ND */ |
| 66721 | 2118, |
| 66722 | /* AND64ri8 */ |
| 66723 | 2121, |
| 66724 | /* AND64ri8_EVEX */ |
| 66725 | 2124, |
| 66726 | /* AND64ri8_ND */ |
| 66727 | 2127, |
| 66728 | /* AND64ri8_NF */ |
| 66729 | 2130, |
| 66730 | /* AND64ri8_NF_ND */ |
| 66731 | 2133, |
| 66732 | /* AND64rm */ |
| 66733 | 2136, |
| 66734 | /* AND64rm_EVEX */ |
| 66735 | 2139, |
| 66736 | /* AND64rm_ND */ |
| 66737 | 2142, |
| 66738 | /* AND64rm_NF */ |
| 66739 | 2145, |
| 66740 | /* AND64rm_NF_ND */ |
| 66741 | 2148, |
| 66742 | /* AND64rr */ |
| 66743 | 2151, |
| 66744 | /* AND64rr_EVEX */ |
| 66745 | 2154, |
| 66746 | /* AND64rr_EVEX_REV */ |
| 66747 | 2157, |
| 66748 | /* AND64rr_ND */ |
| 66749 | 2160, |
| 66750 | /* AND64rr_ND_REV */ |
| 66751 | 2163, |
| 66752 | /* AND64rr_NF */ |
| 66753 | 2166, |
| 66754 | /* AND64rr_NF_ND */ |
| 66755 | 2169, |
| 66756 | /* AND64rr_NF_ND_REV */ |
| 66757 | 2172, |
| 66758 | /* AND64rr_NF_REV */ |
| 66759 | 2175, |
| 66760 | /* AND64rr_REV */ |
| 66761 | 2178, |
| 66762 | /* AND8i8 */ |
| 66763 | 2181, |
| 66764 | /* AND8mi */ |
| 66765 | 2182, |
| 66766 | /* AND8mi8 */ |
| 66767 | 2184, |
| 66768 | /* AND8mi_EVEX */ |
| 66769 | 2186, |
| 66770 | /* AND8mi_ND */ |
| 66771 | 2188, |
| 66772 | /* AND8mi_NF */ |
| 66773 | 2191, |
| 66774 | /* AND8mi_NF_ND */ |
| 66775 | 2193, |
| 66776 | /* AND8mr */ |
| 66777 | 2196, |
| 66778 | /* AND8mr_EVEX */ |
| 66779 | 2198, |
| 66780 | /* AND8mr_ND */ |
| 66781 | 2200, |
| 66782 | /* AND8mr_NF */ |
| 66783 | 2203, |
| 66784 | /* AND8mr_NF_ND */ |
| 66785 | 2205, |
| 66786 | /* AND8ri */ |
| 66787 | 2208, |
| 66788 | /* AND8ri8 */ |
| 66789 | 2211, |
| 66790 | /* AND8ri_EVEX */ |
| 66791 | 2214, |
| 66792 | /* AND8ri_ND */ |
| 66793 | 2217, |
| 66794 | /* AND8ri_NF */ |
| 66795 | 2220, |
| 66796 | /* AND8ri_NF_ND */ |
| 66797 | 2223, |
| 66798 | /* AND8rm */ |
| 66799 | 2226, |
| 66800 | /* AND8rm_EVEX */ |
| 66801 | 2229, |
| 66802 | /* AND8rm_ND */ |
| 66803 | 2232, |
| 66804 | /* AND8rm_NF */ |
| 66805 | 2235, |
| 66806 | /* AND8rm_NF_ND */ |
| 66807 | 2238, |
| 66808 | /* AND8rr */ |
| 66809 | 2241, |
| 66810 | /* AND8rr_EVEX */ |
| 66811 | 2244, |
| 66812 | /* AND8rr_EVEX_REV */ |
| 66813 | 2247, |
| 66814 | /* AND8rr_ND */ |
| 66815 | 2250, |
| 66816 | /* AND8rr_ND_REV */ |
| 66817 | 2253, |
| 66818 | /* AND8rr_NF */ |
| 66819 | 2256, |
| 66820 | /* AND8rr_NF_ND */ |
| 66821 | 2259, |
| 66822 | /* AND8rr_NF_ND_REV */ |
| 66823 | 2262, |
| 66824 | /* AND8rr_NF_REV */ |
| 66825 | 2265, |
| 66826 | /* AND8rr_REV */ |
| 66827 | 2268, |
| 66828 | /* ANDN32rm */ |
| 66829 | 2271, |
| 66830 | /* ANDN32rm_EVEX */ |
| 66831 | 2274, |
| 66832 | /* ANDN32rm_NF */ |
| 66833 | 2277, |
| 66834 | /* ANDN32rr */ |
| 66835 | 2280, |
| 66836 | /* ANDN32rr_EVEX */ |
| 66837 | 2283, |
| 66838 | /* ANDN32rr_NF */ |
| 66839 | 2286, |
| 66840 | /* ANDN64rm */ |
| 66841 | 2289, |
| 66842 | /* ANDN64rm_EVEX */ |
| 66843 | 2292, |
| 66844 | /* ANDN64rm_NF */ |
| 66845 | 2295, |
| 66846 | /* ANDN64rr */ |
| 66847 | 2298, |
| 66848 | /* ANDN64rr_EVEX */ |
| 66849 | 2301, |
| 66850 | /* ANDN64rr_NF */ |
| 66851 | 2304, |
| 66852 | /* ANDNPDrm */ |
| 66853 | 2307, |
| 66854 | /* ANDNPDrr */ |
| 66855 | 2310, |
| 66856 | /* ANDNPSrm */ |
| 66857 | 2313, |
| 66858 | /* ANDNPSrr */ |
| 66859 | 2316, |
| 66860 | /* ANDPDrm */ |
| 66861 | 2319, |
| 66862 | /* ANDPDrr */ |
| 66863 | 2322, |
| 66864 | /* ANDPSrm */ |
| 66865 | 2325, |
| 66866 | /* ANDPSrr */ |
| 66867 | 2328, |
| 66868 | /* AOR32mr */ |
| 66869 | 2331, |
| 66870 | /* AOR32mr_EVEX */ |
| 66871 | 2333, |
| 66872 | /* AOR64mr */ |
| 66873 | 2335, |
| 66874 | /* AOR64mr_EVEX */ |
| 66875 | 2337, |
| 66876 | /* ARPL16mr */ |
| 66877 | 2339, |
| 66878 | /* ARPL16rr */ |
| 66879 | 2341, |
| 66880 | /* ASAN_CHECK_MEMACCESS */ |
| 66881 | 2343, |
| 66882 | /* AXOR32mr */ |
| 66883 | 2345, |
| 66884 | /* AXOR32mr_EVEX */ |
| 66885 | 2347, |
| 66886 | /* AXOR64mr */ |
| 66887 | 2349, |
| 66888 | /* AXOR64mr_EVEX */ |
| 66889 | 2351, |
| 66890 | /* BEXTR32rm */ |
| 66891 | 2353, |
| 66892 | /* BEXTR32rm_EVEX */ |
| 66893 | 2356, |
| 66894 | /* BEXTR32rm_NF */ |
| 66895 | 2359, |
| 66896 | /* BEXTR32rr */ |
| 66897 | 2362, |
| 66898 | /* BEXTR32rr_EVEX */ |
| 66899 | 2365, |
| 66900 | /* BEXTR32rr_NF */ |
| 66901 | 2368, |
| 66902 | /* BEXTR64rm */ |
| 66903 | 2371, |
| 66904 | /* BEXTR64rm_EVEX */ |
| 66905 | 2374, |
| 66906 | /* BEXTR64rm_NF */ |
| 66907 | 2377, |
| 66908 | /* BEXTR64rr */ |
| 66909 | 2380, |
| 66910 | /* BEXTR64rr_EVEX */ |
| 66911 | 2383, |
| 66912 | /* BEXTR64rr_NF */ |
| 66913 | 2386, |
| 66914 | /* BEXTRI32mi */ |
| 66915 | 2389, |
| 66916 | /* BEXTRI32ri */ |
| 66917 | 2392, |
| 66918 | /* BEXTRI64mi */ |
| 66919 | 2395, |
| 66920 | /* BEXTRI64ri */ |
| 66921 | 2398, |
| 66922 | /* BLCFILL32rm */ |
| 66923 | 2401, |
| 66924 | /* BLCFILL32rr */ |
| 66925 | 2403, |
| 66926 | /* BLCFILL64rm */ |
| 66927 | 2405, |
| 66928 | /* BLCFILL64rr */ |
| 66929 | 2407, |
| 66930 | /* BLCI32rm */ |
| 66931 | 2409, |
| 66932 | /* BLCI32rr */ |
| 66933 | 2411, |
| 66934 | /* BLCI64rm */ |
| 66935 | 2413, |
| 66936 | /* BLCI64rr */ |
| 66937 | 2415, |
| 66938 | /* BLCIC32rm */ |
| 66939 | 2417, |
| 66940 | /* BLCIC32rr */ |
| 66941 | 2419, |
| 66942 | /* BLCIC64rm */ |
| 66943 | 2421, |
| 66944 | /* BLCIC64rr */ |
| 66945 | 2423, |
| 66946 | /* BLCMSK32rm */ |
| 66947 | 2425, |
| 66948 | /* BLCMSK32rr */ |
| 66949 | 2427, |
| 66950 | /* BLCMSK64rm */ |
| 66951 | 2429, |
| 66952 | /* BLCMSK64rr */ |
| 66953 | 2431, |
| 66954 | /* BLCS32rm */ |
| 66955 | 2433, |
| 66956 | /* BLCS32rr */ |
| 66957 | 2435, |
| 66958 | /* BLCS64rm */ |
| 66959 | 2437, |
| 66960 | /* BLCS64rr */ |
| 66961 | 2439, |
| 66962 | /* BLENDPDrmi */ |
| 66963 | 2441, |
| 66964 | /* BLENDPDrri */ |
| 66965 | 2445, |
| 66966 | /* BLENDPSrmi */ |
| 66967 | 2449, |
| 66968 | /* BLENDPSrri */ |
| 66969 | 2453, |
| 66970 | /* BLENDVPDrm0 */ |
| 66971 | 2457, |
| 66972 | /* BLENDVPDrr0 */ |
| 66973 | 2460, |
| 66974 | /* BLENDVPSrm0 */ |
| 66975 | 2463, |
| 66976 | /* BLENDVPSrr0 */ |
| 66977 | 2466, |
| 66978 | /* BLSFILL32rm */ |
| 66979 | 2469, |
| 66980 | /* BLSFILL32rr */ |
| 66981 | 2471, |
| 66982 | /* BLSFILL64rm */ |
| 66983 | 2473, |
| 66984 | /* BLSFILL64rr */ |
| 66985 | 2475, |
| 66986 | /* BLSI32rm */ |
| 66987 | 2477, |
| 66988 | /* BLSI32rm_EVEX */ |
| 66989 | 2479, |
| 66990 | /* BLSI32rm_NF */ |
| 66991 | 2481, |
| 66992 | /* BLSI32rr */ |
| 66993 | 2483, |
| 66994 | /* BLSI32rr_EVEX */ |
| 66995 | 2485, |
| 66996 | /* BLSI32rr_NF */ |
| 66997 | 2487, |
| 66998 | /* BLSI64rm */ |
| 66999 | 2489, |
| 67000 | /* BLSI64rm_EVEX */ |
| 67001 | 2491, |
| 67002 | /* BLSI64rm_NF */ |
| 67003 | 2493, |
| 67004 | /* BLSI64rr */ |
| 67005 | 2495, |
| 67006 | /* BLSI64rr_EVEX */ |
| 67007 | 2497, |
| 67008 | /* BLSI64rr_NF */ |
| 67009 | 2499, |
| 67010 | /* BLSIC32rm */ |
| 67011 | 2501, |
| 67012 | /* BLSIC32rr */ |
| 67013 | 2503, |
| 67014 | /* BLSIC64rm */ |
| 67015 | 2505, |
| 67016 | /* BLSIC64rr */ |
| 67017 | 2507, |
| 67018 | /* BLSMSK32rm */ |
| 67019 | 2509, |
| 67020 | /* BLSMSK32rm_EVEX */ |
| 67021 | 2511, |
| 67022 | /* BLSMSK32rm_NF */ |
| 67023 | 2513, |
| 67024 | /* BLSMSK32rr */ |
| 67025 | 2515, |
| 67026 | /* BLSMSK32rr_EVEX */ |
| 67027 | 2517, |
| 67028 | /* BLSMSK32rr_NF */ |
| 67029 | 2519, |
| 67030 | /* BLSMSK64rm */ |
| 67031 | 2521, |
| 67032 | /* BLSMSK64rm_EVEX */ |
| 67033 | 2523, |
| 67034 | /* BLSMSK64rm_NF */ |
| 67035 | 2525, |
| 67036 | /* BLSMSK64rr */ |
| 67037 | 2527, |
| 67038 | /* BLSMSK64rr_EVEX */ |
| 67039 | 2529, |
| 67040 | /* BLSMSK64rr_NF */ |
| 67041 | 2531, |
| 67042 | /* BLSR32rm */ |
| 67043 | 2533, |
| 67044 | /* BLSR32rm_EVEX */ |
| 67045 | 2535, |
| 67046 | /* BLSR32rm_NF */ |
| 67047 | 2537, |
| 67048 | /* BLSR32rr */ |
| 67049 | 2539, |
| 67050 | /* BLSR32rr_EVEX */ |
| 67051 | 2541, |
| 67052 | /* BLSR32rr_NF */ |
| 67053 | 2543, |
| 67054 | /* BLSR64rm */ |
| 67055 | 2545, |
| 67056 | /* BLSR64rm_EVEX */ |
| 67057 | 2547, |
| 67058 | /* BLSR64rm_NF */ |
| 67059 | 2549, |
| 67060 | /* BLSR64rr */ |
| 67061 | 2551, |
| 67062 | /* BLSR64rr_EVEX */ |
| 67063 | 2553, |
| 67064 | /* BLSR64rr_NF */ |
| 67065 | 2555, |
| 67066 | /* BOUNDS16rm */ |
| 67067 | 2557, |
| 67068 | /* BOUNDS32rm */ |
| 67069 | 2559, |
| 67070 | /* BSF16rm */ |
| 67071 | 2561, |
| 67072 | /* BSF16rr */ |
| 67073 | 2563, |
| 67074 | /* BSF32rm */ |
| 67075 | 2565, |
| 67076 | /* BSF32rr */ |
| 67077 | 2567, |
| 67078 | /* BSF64rm */ |
| 67079 | 2569, |
| 67080 | /* BSF64rr */ |
| 67081 | 2571, |
| 67082 | /* BSR16rm */ |
| 67083 | 2573, |
| 67084 | /* BSR16rr */ |
| 67085 | 2575, |
| 67086 | /* BSR32rm */ |
| 67087 | 2577, |
| 67088 | /* BSR32rr */ |
| 67089 | 2579, |
| 67090 | /* BSR64rm */ |
| 67091 | 2581, |
| 67092 | /* BSR64rr */ |
| 67093 | 2583, |
| 67094 | /* BSWAP16r_BAD */ |
| 67095 | 2585, |
| 67096 | /* BSWAP32r */ |
| 67097 | 2587, |
| 67098 | /* BSWAP64r */ |
| 67099 | 2589, |
| 67100 | /* BT16mi8 */ |
| 67101 | 2591, |
| 67102 | /* BT16mr */ |
| 67103 | 2593, |
| 67104 | /* BT16ri8 */ |
| 67105 | 2595, |
| 67106 | /* BT16rr */ |
| 67107 | 2597, |
| 67108 | /* BT32mi8 */ |
| 67109 | 2599, |
| 67110 | /* BT32mr */ |
| 67111 | 2601, |
| 67112 | /* BT32ri8 */ |
| 67113 | 2603, |
| 67114 | /* BT32rr */ |
| 67115 | 2605, |
| 67116 | /* BT64mi8 */ |
| 67117 | 2607, |
| 67118 | /* BT64mr */ |
| 67119 | 2609, |
| 67120 | /* BT64ri8 */ |
| 67121 | 2611, |
| 67122 | /* BT64rr */ |
| 67123 | 2613, |
| 67124 | /* BTC16mi8 */ |
| 67125 | 2615, |
| 67126 | /* BTC16mr */ |
| 67127 | 2617, |
| 67128 | /* BTC16ri8 */ |
| 67129 | 2619, |
| 67130 | /* BTC16rr */ |
| 67131 | 2622, |
| 67132 | /* BTC32mi8 */ |
| 67133 | 2625, |
| 67134 | /* BTC32mr */ |
| 67135 | 2627, |
| 67136 | /* BTC32ri8 */ |
| 67137 | 2629, |
| 67138 | /* BTC32rr */ |
| 67139 | 2632, |
| 67140 | /* BTC64mi8 */ |
| 67141 | 2635, |
| 67142 | /* BTC64mr */ |
| 67143 | 2637, |
| 67144 | /* BTC64ri8 */ |
| 67145 | 2639, |
| 67146 | /* BTC64rr */ |
| 67147 | 2642, |
| 67148 | /* BTR16mi8 */ |
| 67149 | 2645, |
| 67150 | /* BTR16mr */ |
| 67151 | 2647, |
| 67152 | /* BTR16ri8 */ |
| 67153 | 2649, |
| 67154 | /* BTR16rr */ |
| 67155 | 2652, |
| 67156 | /* BTR32mi8 */ |
| 67157 | 2655, |
| 67158 | /* BTR32mr */ |
| 67159 | 2657, |
| 67160 | /* BTR32ri8 */ |
| 67161 | 2659, |
| 67162 | /* BTR32rr */ |
| 67163 | 2662, |
| 67164 | /* BTR64mi8 */ |
| 67165 | 2665, |
| 67166 | /* BTR64mr */ |
| 67167 | 2667, |
| 67168 | /* BTR64ri8 */ |
| 67169 | 2669, |
| 67170 | /* BTR64rr */ |
| 67171 | 2672, |
| 67172 | /* BTS16mi8 */ |
| 67173 | 2675, |
| 67174 | /* BTS16mr */ |
| 67175 | 2677, |
| 67176 | /* BTS16ri8 */ |
| 67177 | 2679, |
| 67178 | /* BTS16rr */ |
| 67179 | 2682, |
| 67180 | /* BTS32mi8 */ |
| 67181 | 2685, |
| 67182 | /* BTS32mr */ |
| 67183 | 2687, |
| 67184 | /* BTS32ri8 */ |
| 67185 | 2689, |
| 67186 | /* BTS32rr */ |
| 67187 | 2692, |
| 67188 | /* BTS64mi8 */ |
| 67189 | 2695, |
| 67190 | /* BTS64mr */ |
| 67191 | 2697, |
| 67192 | /* BTS64ri8 */ |
| 67193 | 2699, |
| 67194 | /* BTS64rr */ |
| 67195 | 2702, |
| 67196 | /* BZHI32rm */ |
| 67197 | 2705, |
| 67198 | /* BZHI32rm_EVEX */ |
| 67199 | 2708, |
| 67200 | /* BZHI32rm_NF */ |
| 67201 | 2711, |
| 67202 | /* BZHI32rr */ |
| 67203 | 2714, |
| 67204 | /* BZHI32rr_EVEX */ |
| 67205 | 2717, |
| 67206 | /* BZHI32rr_NF */ |
| 67207 | 2720, |
| 67208 | /* BZHI64rm */ |
| 67209 | 2723, |
| 67210 | /* BZHI64rm_EVEX */ |
| 67211 | 2726, |
| 67212 | /* BZHI64rm_NF */ |
| 67213 | 2729, |
| 67214 | /* BZHI64rr */ |
| 67215 | 2732, |
| 67216 | /* BZHI64rr_EVEX */ |
| 67217 | 2735, |
| 67218 | /* BZHI64rr_NF */ |
| 67219 | 2738, |
| 67220 | /* CALL16m */ |
| 67221 | 2741, |
| 67222 | /* CALL16m_NT */ |
| 67223 | 2742, |
| 67224 | /* CALL16r */ |
| 67225 | 2743, |
| 67226 | /* CALL16r_NT */ |
| 67227 | 2744, |
| 67228 | /* CALL32m */ |
| 67229 | 2745, |
| 67230 | /* CALL32m_NT */ |
| 67231 | 2746, |
| 67232 | /* CALL32r */ |
| 67233 | 2747, |
| 67234 | /* CALL32r_NT */ |
| 67235 | 2748, |
| 67236 | /* CALL64m */ |
| 67237 | 2749, |
| 67238 | /* CALL64m_NT */ |
| 67239 | 2750, |
| 67240 | /* CALL64pcrel32 */ |
| 67241 | 2751, |
| 67242 | /* CALL64r */ |
| 67243 | 2752, |
| 67244 | /* CALL64r_NT */ |
| 67245 | 2753, |
| 67246 | /* CALLpcrel16 */ |
| 67247 | 2754, |
| 67248 | /* CALLpcrel32 */ |
| 67249 | 2755, |
| 67250 | /* CATCHRET */ |
| 67251 | 2756, |
| 67252 | /* CBW */ |
| 67253 | 2758, |
| 67254 | /* CCMP16mi */ |
| 67255 | 2758, |
| 67256 | /* CCMP16mi8 */ |
| 67257 | 2762, |
| 67258 | /* CCMP16mr */ |
| 67259 | 2766, |
| 67260 | /* CCMP16ri */ |
| 67261 | 2770, |
| 67262 | /* CCMP16ri8 */ |
| 67263 | 2774, |
| 67264 | /* CCMP16rm */ |
| 67265 | 2778, |
| 67266 | /* CCMP16rr */ |
| 67267 | 2782, |
| 67268 | /* CCMP16rr_REV */ |
| 67269 | 2786, |
| 67270 | /* CCMP32mi */ |
| 67271 | 2790, |
| 67272 | /* CCMP32mi8 */ |
| 67273 | 2794, |
| 67274 | /* CCMP32mr */ |
| 67275 | 2798, |
| 67276 | /* CCMP32ri */ |
| 67277 | 2802, |
| 67278 | /* CCMP32ri8 */ |
| 67279 | 2806, |
| 67280 | /* CCMP32rm */ |
| 67281 | 2810, |
| 67282 | /* CCMP32rr */ |
| 67283 | 2814, |
| 67284 | /* CCMP32rr_REV */ |
| 67285 | 2818, |
| 67286 | /* CCMP64mi32 */ |
| 67287 | 2822, |
| 67288 | /* CCMP64mi8 */ |
| 67289 | 2826, |
| 67290 | /* CCMP64mr */ |
| 67291 | 2830, |
| 67292 | /* CCMP64ri32 */ |
| 67293 | 2834, |
| 67294 | /* CCMP64ri8 */ |
| 67295 | 2838, |
| 67296 | /* CCMP64rm */ |
| 67297 | 2842, |
| 67298 | /* CCMP64rr */ |
| 67299 | 2846, |
| 67300 | /* CCMP64rr_REV */ |
| 67301 | 2850, |
| 67302 | /* CCMP8mi */ |
| 67303 | 2854, |
| 67304 | /* CCMP8mr */ |
| 67305 | 2858, |
| 67306 | /* CCMP8ri */ |
| 67307 | 2862, |
| 67308 | /* CCMP8rm */ |
| 67309 | 2866, |
| 67310 | /* CCMP8rr */ |
| 67311 | 2870, |
| 67312 | /* CCMP8rr_REV */ |
| 67313 | 2874, |
| 67314 | /* CDQ */ |
| 67315 | 2878, |
| 67316 | /* CDQE */ |
| 67317 | 2878, |
| 67318 | /* CFCMOV16mr */ |
| 67319 | 2878, |
| 67320 | /* CFCMOV16rm */ |
| 67321 | 2881, |
| 67322 | /* CFCMOV16rm_ND */ |
| 67323 | 2884, |
| 67324 | /* CFCMOV16rr */ |
| 67325 | 2888, |
| 67326 | /* CFCMOV16rr_ND */ |
| 67327 | 2891, |
| 67328 | /* CFCMOV16rr_REV */ |
| 67329 | 2895, |
| 67330 | /* CFCMOV32mr */ |
| 67331 | 2898, |
| 67332 | /* CFCMOV32rm */ |
| 67333 | 2901, |
| 67334 | /* CFCMOV32rm_ND */ |
| 67335 | 2904, |
| 67336 | /* CFCMOV32rr */ |
| 67337 | 2908, |
| 67338 | /* CFCMOV32rr_ND */ |
| 67339 | 2911, |
| 67340 | /* CFCMOV32rr_REV */ |
| 67341 | 2915, |
| 67342 | /* CFCMOV64mr */ |
| 67343 | 2918, |
| 67344 | /* CFCMOV64rm */ |
| 67345 | 2921, |
| 67346 | /* CFCMOV64rm_ND */ |
| 67347 | 2924, |
| 67348 | /* CFCMOV64rr */ |
| 67349 | 2928, |
| 67350 | /* CFCMOV64rr_ND */ |
| 67351 | 2931, |
| 67352 | /* CFCMOV64rr_REV */ |
| 67353 | 2935, |
| 67354 | /* CHS_F */ |
| 67355 | 2938, |
| 67356 | /* CHS_Fp32 */ |
| 67357 | 2938, |
| 67358 | /* CHS_Fp64 */ |
| 67359 | 2940, |
| 67360 | /* CHS_Fp80 */ |
| 67361 | 2942, |
| 67362 | /* CLAC */ |
| 67363 | 2944, |
| 67364 | /* CLC */ |
| 67365 | 2944, |
| 67366 | /* CLD */ |
| 67367 | 2944, |
| 67368 | /* CLDEMOTE */ |
| 67369 | 2944, |
| 67370 | /* CLEANUPRET */ |
| 67371 | 2945, |
| 67372 | /* CLFLUSH */ |
| 67373 | 2945, |
| 67374 | /* CLFLUSHOPT */ |
| 67375 | 2946, |
| 67376 | /* CLGI */ |
| 67377 | 2947, |
| 67378 | /* CLI */ |
| 67379 | 2947, |
| 67380 | /* CLRSSBSY */ |
| 67381 | 2947, |
| 67382 | /* CLTS */ |
| 67383 | 2948, |
| 67384 | /* CLUI */ |
| 67385 | 2948, |
| 67386 | /* CLWB */ |
| 67387 | 2948, |
| 67388 | /* CLZERO32r */ |
| 67389 | 2949, |
| 67390 | /* CLZERO64r */ |
| 67391 | 2949, |
| 67392 | /* CMC */ |
| 67393 | 2949, |
| 67394 | /* CMOV16rm */ |
| 67395 | 2949, |
| 67396 | /* CMOV16rm_ND */ |
| 67397 | 2953, |
| 67398 | /* CMOV16rr */ |
| 67399 | 2957, |
| 67400 | /* CMOV16rr_ND */ |
| 67401 | 2961, |
| 67402 | /* CMOV32rm */ |
| 67403 | 2965, |
| 67404 | /* CMOV32rm_ND */ |
| 67405 | 2969, |
| 67406 | /* CMOV32rr */ |
| 67407 | 2973, |
| 67408 | /* CMOV32rr_ND */ |
| 67409 | 2977, |
| 67410 | /* CMOV64rm */ |
| 67411 | 2981, |
| 67412 | /* CMOV64rm_ND */ |
| 67413 | 2985, |
| 67414 | /* CMOV64rr */ |
| 67415 | 2989, |
| 67416 | /* CMOV64rr_ND */ |
| 67417 | 2993, |
| 67418 | /* CMOVBE_F */ |
| 67419 | 2997, |
| 67420 | /* CMOVBE_Fp32 */ |
| 67421 | 2998, |
| 67422 | /* CMOVBE_Fp64 */ |
| 67423 | 3001, |
| 67424 | /* CMOVBE_Fp80 */ |
| 67425 | 3004, |
| 67426 | /* CMOVB_F */ |
| 67427 | 3007, |
| 67428 | /* CMOVB_Fp32 */ |
| 67429 | 3008, |
| 67430 | /* CMOVB_Fp64 */ |
| 67431 | 3011, |
| 67432 | /* CMOVB_Fp80 */ |
| 67433 | 3014, |
| 67434 | /* CMOVE_F */ |
| 67435 | 3017, |
| 67436 | /* CMOVE_Fp32 */ |
| 67437 | 3018, |
| 67438 | /* CMOVE_Fp64 */ |
| 67439 | 3021, |
| 67440 | /* CMOVE_Fp80 */ |
| 67441 | 3024, |
| 67442 | /* CMOVNBE_F */ |
| 67443 | 3027, |
| 67444 | /* CMOVNBE_Fp32 */ |
| 67445 | 3028, |
| 67446 | /* CMOVNBE_Fp64 */ |
| 67447 | 3031, |
| 67448 | /* CMOVNBE_Fp80 */ |
| 67449 | 3034, |
| 67450 | /* CMOVNB_F */ |
| 67451 | 3037, |
| 67452 | /* CMOVNB_Fp32 */ |
| 67453 | 3038, |
| 67454 | /* CMOVNB_Fp64 */ |
| 67455 | 3041, |
| 67456 | /* CMOVNB_Fp80 */ |
| 67457 | 3044, |
| 67458 | /* CMOVNE_F */ |
| 67459 | 3047, |
| 67460 | /* CMOVNE_Fp32 */ |
| 67461 | 3048, |
| 67462 | /* CMOVNE_Fp64 */ |
| 67463 | 3051, |
| 67464 | /* CMOVNE_Fp80 */ |
| 67465 | 3054, |
| 67466 | /* CMOVNP_F */ |
| 67467 | 3057, |
| 67468 | /* CMOVNP_Fp32 */ |
| 67469 | 3058, |
| 67470 | /* CMOVNP_Fp64 */ |
| 67471 | 3061, |
| 67472 | /* CMOVNP_Fp80 */ |
| 67473 | 3064, |
| 67474 | /* CMOVP_F */ |
| 67475 | 3067, |
| 67476 | /* CMOVP_Fp32 */ |
| 67477 | 3068, |
| 67478 | /* CMOVP_Fp64 */ |
| 67479 | 3071, |
| 67480 | /* CMOVP_Fp80 */ |
| 67481 | 3074, |
| 67482 | /* CMOV_FR16 */ |
| 67483 | 3077, |
| 67484 | /* CMOV_FR16X */ |
| 67485 | 3081, |
| 67486 | /* CMOV_FR32 */ |
| 67487 | 3085, |
| 67488 | /* CMOV_FR32X */ |
| 67489 | 3089, |
| 67490 | /* CMOV_FR64 */ |
| 67491 | 3093, |
| 67492 | /* CMOV_FR64X */ |
| 67493 | 3097, |
| 67494 | /* CMOV_GR16 */ |
| 67495 | 3101, |
| 67496 | /* CMOV_GR32 */ |
| 67497 | 3105, |
| 67498 | /* CMOV_GR8 */ |
| 67499 | 3109, |
| 67500 | /* CMOV_RFP32 */ |
| 67501 | 3113, |
| 67502 | /* CMOV_RFP64 */ |
| 67503 | 3117, |
| 67504 | /* CMOV_RFP80 */ |
| 67505 | 3121, |
| 67506 | /* CMOV_VK1 */ |
| 67507 | 3125, |
| 67508 | /* CMOV_VK16 */ |
| 67509 | 3129, |
| 67510 | /* CMOV_VK2 */ |
| 67511 | 3133, |
| 67512 | /* CMOV_VK32 */ |
| 67513 | 3137, |
| 67514 | /* CMOV_VK4 */ |
| 67515 | 3141, |
| 67516 | /* CMOV_VK64 */ |
| 67517 | 3145, |
| 67518 | /* CMOV_VK8 */ |
| 67519 | 3149, |
| 67520 | /* CMOV_VR128 */ |
| 67521 | 3153, |
| 67522 | /* CMOV_VR128X */ |
| 67523 | 3157, |
| 67524 | /* CMOV_VR256 */ |
| 67525 | 3161, |
| 67526 | /* CMOV_VR256X */ |
| 67527 | 3165, |
| 67528 | /* CMOV_VR512 */ |
| 67529 | 3169, |
| 67530 | /* CMOV_VR64 */ |
| 67531 | 3173, |
| 67532 | /* CMP16i16 */ |
| 67533 | 3177, |
| 67534 | /* CMP16mi */ |
| 67535 | 3178, |
| 67536 | /* CMP16mi8 */ |
| 67537 | 3180, |
| 67538 | /* CMP16mr */ |
| 67539 | 3182, |
| 67540 | /* CMP16ri */ |
| 67541 | 3184, |
| 67542 | /* CMP16ri8 */ |
| 67543 | 3186, |
| 67544 | /* CMP16rm */ |
| 67545 | 3188, |
| 67546 | /* CMP16rr */ |
| 67547 | 3190, |
| 67548 | /* CMP16rr_REV */ |
| 67549 | 3192, |
| 67550 | /* CMP32i32 */ |
| 67551 | 3194, |
| 67552 | /* CMP32mi */ |
| 67553 | 3195, |
| 67554 | /* CMP32mi8 */ |
| 67555 | 3197, |
| 67556 | /* CMP32mr */ |
| 67557 | 3199, |
| 67558 | /* CMP32ri */ |
| 67559 | 3201, |
| 67560 | /* CMP32ri8 */ |
| 67561 | 3203, |
| 67562 | /* CMP32rm */ |
| 67563 | 3205, |
| 67564 | /* CMP32rr */ |
| 67565 | 3207, |
| 67566 | /* CMP32rr_REV */ |
| 67567 | 3209, |
| 67568 | /* CMP64i32 */ |
| 67569 | 3211, |
| 67570 | /* CMP64mi32 */ |
| 67571 | 3212, |
| 67572 | /* CMP64mi8 */ |
| 67573 | 3214, |
| 67574 | /* CMP64mr */ |
| 67575 | 3216, |
| 67576 | /* CMP64ri32 */ |
| 67577 | 3218, |
| 67578 | /* CMP64ri8 */ |
| 67579 | 3220, |
| 67580 | /* CMP64rm */ |
| 67581 | 3222, |
| 67582 | /* CMP64rr */ |
| 67583 | 3224, |
| 67584 | /* CMP64rr_REV */ |
| 67585 | 3226, |
| 67586 | /* CMP8i8 */ |
| 67587 | 3228, |
| 67588 | /* CMP8mi */ |
| 67589 | 3229, |
| 67590 | /* CMP8mi8 */ |
| 67591 | 3231, |
| 67592 | /* CMP8mr */ |
| 67593 | 3233, |
| 67594 | /* CMP8ri */ |
| 67595 | 3235, |
| 67596 | /* CMP8ri8 */ |
| 67597 | 3237, |
| 67598 | /* CMP8rm */ |
| 67599 | 3239, |
| 67600 | /* CMP8rr */ |
| 67601 | 3241, |
| 67602 | /* CMP8rr_REV */ |
| 67603 | 3243, |
| 67604 | /* CMPCCXADDmr32 */ |
| 67605 | 3245, |
| 67606 | /* CMPCCXADDmr32_EVEX */ |
| 67607 | 3250, |
| 67608 | /* CMPCCXADDmr64 */ |
| 67609 | 3255, |
| 67610 | /* CMPCCXADDmr64_EVEX */ |
| 67611 | 3260, |
| 67612 | /* CMPPDrmi */ |
| 67613 | 3265, |
| 67614 | /* CMPPDrri */ |
| 67615 | 3269, |
| 67616 | /* CMPPSrmi */ |
| 67617 | 3273, |
| 67618 | /* CMPPSrri */ |
| 67619 | 3277, |
| 67620 | /* CMPSB */ |
| 67621 | 3281, |
| 67622 | /* CMPSDrmi */ |
| 67623 | 3283, |
| 67624 | /* CMPSDrmi_Int */ |
| 67625 | 3287, |
| 67626 | /* CMPSDrri */ |
| 67627 | 3291, |
| 67628 | /* CMPSDrri_Int */ |
| 67629 | 3295, |
| 67630 | /* CMPSL */ |
| 67631 | 3299, |
| 67632 | /* CMPSQ */ |
| 67633 | 3301, |
| 67634 | /* CMPSSrmi */ |
| 67635 | 3303, |
| 67636 | /* CMPSSrmi_Int */ |
| 67637 | 3307, |
| 67638 | /* CMPSSrri */ |
| 67639 | 3311, |
| 67640 | /* CMPSSrri_Int */ |
| 67641 | 3315, |
| 67642 | /* CMPSW */ |
| 67643 | 3319, |
| 67644 | /* CMPXCHG16B */ |
| 67645 | 3321, |
| 67646 | /* CMPXCHG16rm */ |
| 67647 | 3322, |
| 67648 | /* CMPXCHG16rr */ |
| 67649 | 3324, |
| 67650 | /* CMPXCHG32rm */ |
| 67651 | 3326, |
| 67652 | /* CMPXCHG32rr */ |
| 67653 | 3328, |
| 67654 | /* CMPXCHG64rm */ |
| 67655 | 3330, |
| 67656 | /* CMPXCHG64rr */ |
| 67657 | 3332, |
| 67658 | /* CMPXCHG8B */ |
| 67659 | 3334, |
| 67660 | /* CMPXCHG8rm */ |
| 67661 | 3335, |
| 67662 | /* CMPXCHG8rr */ |
| 67663 | 3337, |
| 67664 | /* COMISDrm */ |
| 67665 | 3339, |
| 67666 | /* COMISDrm_Int */ |
| 67667 | 3341, |
| 67668 | /* COMISDrr */ |
| 67669 | 3343, |
| 67670 | /* COMISDrr_Int */ |
| 67671 | 3345, |
| 67672 | /* COMISSrm */ |
| 67673 | 3347, |
| 67674 | /* COMISSrm_Int */ |
| 67675 | 3349, |
| 67676 | /* COMISSrr */ |
| 67677 | 3351, |
| 67678 | /* COMISSrr_Int */ |
| 67679 | 3353, |
| 67680 | /* COMP_FST0r */ |
| 67681 | 3355, |
| 67682 | /* COM_FIPr */ |
| 67683 | 3356, |
| 67684 | /* COM_FIr */ |
| 67685 | 3357, |
| 67686 | /* COM_FST0r */ |
| 67687 | 3358, |
| 67688 | /* COM_FpIr32 */ |
| 67689 | 3359, |
| 67690 | /* COM_FpIr64 */ |
| 67691 | 3361, |
| 67692 | /* COM_FpIr80 */ |
| 67693 | 3363, |
| 67694 | /* COM_Fpr32 */ |
| 67695 | 3365, |
| 67696 | /* COM_Fpr64 */ |
| 67697 | 3367, |
| 67698 | /* COM_Fpr80 */ |
| 67699 | 3369, |
| 67700 | /* CPUID */ |
| 67701 | 3371, |
| 67702 | /* CQO */ |
| 67703 | 3371, |
| 67704 | /* CRC32r32m16 */ |
| 67705 | 3371, |
| 67706 | /* CRC32r32m16_EVEX */ |
| 67707 | 3374, |
| 67708 | /* CRC32r32m32 */ |
| 67709 | 3377, |
| 67710 | /* CRC32r32m32_EVEX */ |
| 67711 | 3380, |
| 67712 | /* CRC32r32m8 */ |
| 67713 | 3383, |
| 67714 | /* CRC32r32m8_EVEX */ |
| 67715 | 3386, |
| 67716 | /* CRC32r32r16 */ |
| 67717 | 3389, |
| 67718 | /* CRC32r32r16_EVEX */ |
| 67719 | 3392, |
| 67720 | /* CRC32r32r32 */ |
| 67721 | 3395, |
| 67722 | /* CRC32r32r32_EVEX */ |
| 67723 | 3398, |
| 67724 | /* CRC32r32r8 */ |
| 67725 | 3401, |
| 67726 | /* CRC32r32r8_EVEX */ |
| 67727 | 3404, |
| 67728 | /* CRC32r64m64 */ |
| 67729 | 3407, |
| 67730 | /* CRC32r64m64_EVEX */ |
| 67731 | 3410, |
| 67732 | /* CRC32r64m8 */ |
| 67733 | 3413, |
| 67734 | /* CRC32r64m8_EVEX */ |
| 67735 | 3416, |
| 67736 | /* CRC32r64r64 */ |
| 67737 | 3419, |
| 67738 | /* CRC32r64r64_EVEX */ |
| 67739 | 3422, |
| 67740 | /* CRC32r64r8 */ |
| 67741 | 3425, |
| 67742 | /* CRC32r64r8_EVEX */ |
| 67743 | 3428, |
| 67744 | /* CS_PREFIX */ |
| 67745 | 3431, |
| 67746 | /* CTEST16mi */ |
| 67747 | 3431, |
| 67748 | /* CTEST16mr */ |
| 67749 | 3435, |
| 67750 | /* CTEST16ri */ |
| 67751 | 3439, |
| 67752 | /* CTEST16rr */ |
| 67753 | 3443, |
| 67754 | /* CTEST32mi */ |
| 67755 | 3447, |
| 67756 | /* CTEST32mr */ |
| 67757 | 3451, |
| 67758 | /* CTEST32ri */ |
| 67759 | 3455, |
| 67760 | /* CTEST32rr */ |
| 67761 | 3459, |
| 67762 | /* CTEST64mi32 */ |
| 67763 | 3463, |
| 67764 | /* CTEST64mr */ |
| 67765 | 3467, |
| 67766 | /* CTEST64ri32 */ |
| 67767 | 3471, |
| 67768 | /* CTEST64rr */ |
| 67769 | 3475, |
| 67770 | /* CTEST8mi */ |
| 67771 | 3479, |
| 67772 | /* CTEST8mr */ |
| 67773 | 3483, |
| 67774 | /* CTEST8ri */ |
| 67775 | 3487, |
| 67776 | /* CTEST8rr */ |
| 67777 | 3491, |
| 67778 | /* CVTDQ2PDrm */ |
| 67779 | 3495, |
| 67780 | /* CVTDQ2PDrr */ |
| 67781 | 3497, |
| 67782 | /* CVTDQ2PSrm */ |
| 67783 | 3499, |
| 67784 | /* CVTDQ2PSrr */ |
| 67785 | 3501, |
| 67786 | /* CVTPD2DQrm */ |
| 67787 | 3503, |
| 67788 | /* CVTPD2DQrr */ |
| 67789 | 3505, |
| 67790 | /* CVTPD2PSrm */ |
| 67791 | 3507, |
| 67792 | /* CVTPD2PSrr */ |
| 67793 | 3509, |
| 67794 | /* CVTPS2DQrm */ |
| 67795 | 3511, |
| 67796 | /* CVTPS2DQrr */ |
| 67797 | 3513, |
| 67798 | /* CVTPS2PDrm */ |
| 67799 | 3515, |
| 67800 | /* CVTPS2PDrr */ |
| 67801 | 3517, |
| 67802 | /* CVTSD2SI64rm */ |
| 67803 | 3519, |
| 67804 | /* CVTSD2SI64rm_Int */ |
| 67805 | 3521, |
| 67806 | /* CVTSD2SI64rr */ |
| 67807 | 3523, |
| 67808 | /* CVTSD2SI64rr_Int */ |
| 67809 | 3525, |
| 67810 | /* CVTSD2SIrm */ |
| 67811 | 3527, |
| 67812 | /* CVTSD2SIrm_Int */ |
| 67813 | 3529, |
| 67814 | /* CVTSD2SIrr */ |
| 67815 | 3531, |
| 67816 | /* CVTSD2SIrr_Int */ |
| 67817 | 3533, |
| 67818 | /* CVTSD2SSrm */ |
| 67819 | 3535, |
| 67820 | /* CVTSD2SSrm_Int */ |
| 67821 | 3537, |
| 67822 | /* CVTSD2SSrr */ |
| 67823 | 3540, |
| 67824 | /* CVTSD2SSrr_Int */ |
| 67825 | 3542, |
| 67826 | /* CVTSI2SDrm */ |
| 67827 | 3545, |
| 67828 | /* CVTSI2SDrm_Int */ |
| 67829 | 3547, |
| 67830 | /* CVTSI2SDrr */ |
| 67831 | 3550, |
| 67832 | /* CVTSI2SDrr_Int */ |
| 67833 | 3552, |
| 67834 | /* CVTSI2SSrm */ |
| 67835 | 3555, |
| 67836 | /* CVTSI2SSrm_Int */ |
| 67837 | 3557, |
| 67838 | /* CVTSI2SSrr */ |
| 67839 | 3560, |
| 67840 | /* CVTSI2SSrr_Int */ |
| 67841 | 3562, |
| 67842 | /* CVTSI642SDrm */ |
| 67843 | 3565, |
| 67844 | /* CVTSI642SDrm_Int */ |
| 67845 | 3567, |
| 67846 | /* CVTSI642SDrr */ |
| 67847 | 3570, |
| 67848 | /* CVTSI642SDrr_Int */ |
| 67849 | 3572, |
| 67850 | /* CVTSI642SSrm */ |
| 67851 | 3575, |
| 67852 | /* CVTSI642SSrm_Int */ |
| 67853 | 3577, |
| 67854 | /* CVTSI642SSrr */ |
| 67855 | 3580, |
| 67856 | /* CVTSI642SSrr_Int */ |
| 67857 | 3582, |
| 67858 | /* CVTSS2SDrm */ |
| 67859 | 3585, |
| 67860 | /* CVTSS2SDrm_Int */ |
| 67861 | 3587, |
| 67862 | /* CVTSS2SDrr */ |
| 67863 | 3590, |
| 67864 | /* CVTSS2SDrr_Int */ |
| 67865 | 3592, |
| 67866 | /* CVTSS2SI64rm */ |
| 67867 | 3595, |
| 67868 | /* CVTSS2SI64rm_Int */ |
| 67869 | 3597, |
| 67870 | /* CVTSS2SI64rr */ |
| 67871 | 3599, |
| 67872 | /* CVTSS2SI64rr_Int */ |
| 67873 | 3601, |
| 67874 | /* CVTSS2SIrm */ |
| 67875 | 3603, |
| 67876 | /* CVTSS2SIrm_Int */ |
| 67877 | 3605, |
| 67878 | /* CVTSS2SIrr */ |
| 67879 | 3607, |
| 67880 | /* CVTSS2SIrr_Int */ |
| 67881 | 3609, |
| 67882 | /* CVTTPD2DQrm */ |
| 67883 | 3611, |
| 67884 | /* CVTTPD2DQrr */ |
| 67885 | 3613, |
| 67886 | /* CVTTPS2DQrm */ |
| 67887 | 3615, |
| 67888 | /* CVTTPS2DQrr */ |
| 67889 | 3617, |
| 67890 | /* CVTTSD2SI64rm */ |
| 67891 | 3619, |
| 67892 | /* CVTTSD2SI64rm_Int */ |
| 67893 | 3621, |
| 67894 | /* CVTTSD2SI64rr */ |
| 67895 | 3623, |
| 67896 | /* CVTTSD2SI64rr_Int */ |
| 67897 | 3625, |
| 67898 | /* CVTTSD2SIrm */ |
| 67899 | 3627, |
| 67900 | /* CVTTSD2SIrm_Int */ |
| 67901 | 3629, |
| 67902 | /* CVTTSD2SIrr */ |
| 67903 | 3631, |
| 67904 | /* CVTTSD2SIrr_Int */ |
| 67905 | 3633, |
| 67906 | /* CVTTSS2SI64rm */ |
| 67907 | 3635, |
| 67908 | /* CVTTSS2SI64rm_Int */ |
| 67909 | 3637, |
| 67910 | /* CVTTSS2SI64rr */ |
| 67911 | 3639, |
| 67912 | /* CVTTSS2SI64rr_Int */ |
| 67913 | 3641, |
| 67914 | /* CVTTSS2SIrm */ |
| 67915 | 3643, |
| 67916 | /* CVTTSS2SIrm_Int */ |
| 67917 | 3645, |
| 67918 | /* CVTTSS2SIrr */ |
| 67919 | 3647, |
| 67920 | /* CVTTSS2SIrr_Int */ |
| 67921 | 3649, |
| 67922 | /* CWD */ |
| 67923 | 3651, |
| 67924 | /* CWDE */ |
| 67925 | 3651, |
| 67926 | /* DAA */ |
| 67927 | 3651, |
| 67928 | /* DAS */ |
| 67929 | 3651, |
| 67930 | /* DATA16_PREFIX */ |
| 67931 | 3651, |
| 67932 | /* DEC16m */ |
| 67933 | 3651, |
| 67934 | /* DEC16m_EVEX */ |
| 67935 | 3652, |
| 67936 | /* DEC16m_ND */ |
| 67937 | 3653, |
| 67938 | /* DEC16m_NF */ |
| 67939 | 3655, |
| 67940 | /* DEC16m_NF_ND */ |
| 67941 | 3656, |
| 67942 | /* DEC16r */ |
| 67943 | 3658, |
| 67944 | /* DEC16r_EVEX */ |
| 67945 | 3660, |
| 67946 | /* DEC16r_ND */ |
| 67947 | 3662, |
| 67948 | /* DEC16r_NF */ |
| 67949 | 3664, |
| 67950 | /* DEC16r_NF_ND */ |
| 67951 | 3666, |
| 67952 | /* DEC16r_alt */ |
| 67953 | 3668, |
| 67954 | /* DEC32m */ |
| 67955 | 3670, |
| 67956 | /* DEC32m_EVEX */ |
| 67957 | 3671, |
| 67958 | /* DEC32m_ND */ |
| 67959 | 3672, |
| 67960 | /* DEC32m_NF */ |
| 67961 | 3674, |
| 67962 | /* DEC32m_NF_ND */ |
| 67963 | 3675, |
| 67964 | /* DEC32r */ |
| 67965 | 3677, |
| 67966 | /* DEC32r_EVEX */ |
| 67967 | 3679, |
| 67968 | /* DEC32r_ND */ |
| 67969 | 3681, |
| 67970 | /* DEC32r_NF */ |
| 67971 | 3683, |
| 67972 | /* DEC32r_NF_ND */ |
| 67973 | 3685, |
| 67974 | /* DEC32r_alt */ |
| 67975 | 3687, |
| 67976 | /* DEC64m */ |
| 67977 | 3689, |
| 67978 | /* DEC64m_EVEX */ |
| 67979 | 3690, |
| 67980 | /* DEC64m_ND */ |
| 67981 | 3691, |
| 67982 | /* DEC64m_NF */ |
| 67983 | 3693, |
| 67984 | /* DEC64m_NF_ND */ |
| 67985 | 3694, |
| 67986 | /* DEC64r */ |
| 67987 | 3696, |
| 67988 | /* DEC64r_EVEX */ |
| 67989 | 3698, |
| 67990 | /* DEC64r_ND */ |
| 67991 | 3700, |
| 67992 | /* DEC64r_NF */ |
| 67993 | 3702, |
| 67994 | /* DEC64r_NF_ND */ |
| 67995 | 3704, |
| 67996 | /* DEC8m */ |
| 67997 | 3706, |
| 67998 | /* DEC8m_EVEX */ |
| 67999 | 3707, |
| 68000 | /* DEC8m_ND */ |
| 68001 | 3708, |
| 68002 | /* DEC8m_NF */ |
| 68003 | 3710, |
| 68004 | /* DEC8m_NF_ND */ |
| 68005 | 3711, |
| 68006 | /* DEC8r */ |
| 68007 | 3713, |
| 68008 | /* DEC8r_EVEX */ |
| 68009 | 3715, |
| 68010 | /* DEC8r_ND */ |
| 68011 | 3717, |
| 68012 | /* DEC8r_NF */ |
| 68013 | 3719, |
| 68014 | /* DEC8r_NF_ND */ |
| 68015 | 3721, |
| 68016 | /* DIV16m */ |
| 68017 | 3723, |
| 68018 | /* DIV16m_EVEX */ |
| 68019 | 3724, |
| 68020 | /* DIV16m_NF */ |
| 68021 | 3725, |
| 68022 | /* DIV16r */ |
| 68023 | 3726, |
| 68024 | /* DIV16r_EVEX */ |
| 68025 | 3727, |
| 68026 | /* DIV16r_NF */ |
| 68027 | 3728, |
| 68028 | /* DIV32m */ |
| 68029 | 3729, |
| 68030 | /* DIV32m_EVEX */ |
| 68031 | 3730, |
| 68032 | /* DIV32m_NF */ |
| 68033 | 3731, |
| 68034 | /* DIV32r */ |
| 68035 | 3732, |
| 68036 | /* DIV32r_EVEX */ |
| 68037 | 3733, |
| 68038 | /* DIV32r_NF */ |
| 68039 | 3734, |
| 68040 | /* DIV64m */ |
| 68041 | 3735, |
| 68042 | /* DIV64m_EVEX */ |
| 68043 | 3736, |
| 68044 | /* DIV64m_NF */ |
| 68045 | 3737, |
| 68046 | /* DIV64r */ |
| 68047 | 3738, |
| 68048 | /* DIV64r_EVEX */ |
| 68049 | 3739, |
| 68050 | /* DIV64r_NF */ |
| 68051 | 3740, |
| 68052 | /* DIV8m */ |
| 68053 | 3741, |
| 68054 | /* DIV8m_EVEX */ |
| 68055 | 3742, |
| 68056 | /* DIV8m_NF */ |
| 68057 | 3743, |
| 68058 | /* DIV8r */ |
| 68059 | 3744, |
| 68060 | /* DIV8r_EVEX */ |
| 68061 | 3745, |
| 68062 | /* DIV8r_NF */ |
| 68063 | 3746, |
| 68064 | /* DIVPDrm */ |
| 68065 | 3747, |
| 68066 | /* DIVPDrr */ |
| 68067 | 3750, |
| 68068 | /* DIVPSrm */ |
| 68069 | 3753, |
| 68070 | /* DIVPSrr */ |
| 68071 | 3756, |
| 68072 | /* DIVR_F32m */ |
| 68073 | 3759, |
| 68074 | /* DIVR_F64m */ |
| 68075 | 3760, |
| 68076 | /* DIVR_FI16m */ |
| 68077 | 3761, |
| 68078 | /* DIVR_FI32m */ |
| 68079 | 3762, |
| 68080 | /* DIVR_FPrST0 */ |
| 68081 | 3763, |
| 68082 | /* DIVR_FST0r */ |
| 68083 | 3764, |
| 68084 | /* DIVR_Fp32m */ |
| 68085 | 3765, |
| 68086 | /* DIVR_Fp64m */ |
| 68087 | 3768, |
| 68088 | /* DIVR_Fp64m32 */ |
| 68089 | 3771, |
| 68090 | /* DIVR_Fp80m32 */ |
| 68091 | 3774, |
| 68092 | /* DIVR_Fp80m64 */ |
| 68093 | 3777, |
| 68094 | /* DIVR_FpI16m32 */ |
| 68095 | 3780, |
| 68096 | /* DIVR_FpI16m64 */ |
| 68097 | 3783, |
| 68098 | /* DIVR_FpI16m80 */ |
| 68099 | 3786, |
| 68100 | /* DIVR_FpI32m32 */ |
| 68101 | 3789, |
| 68102 | /* DIVR_FpI32m64 */ |
| 68103 | 3792, |
| 68104 | /* DIVR_FpI32m80 */ |
| 68105 | 3795, |
| 68106 | /* DIVR_FrST0 */ |
| 68107 | 3798, |
| 68108 | /* DIVSDrm */ |
| 68109 | 3799, |
| 68110 | /* DIVSDrm_Int */ |
| 68111 | 3802, |
| 68112 | /* DIVSDrr */ |
| 68113 | 3805, |
| 68114 | /* DIVSDrr_Int */ |
| 68115 | 3808, |
| 68116 | /* DIVSSrm */ |
| 68117 | 3811, |
| 68118 | /* DIVSSrm_Int */ |
| 68119 | 3814, |
| 68120 | /* DIVSSrr */ |
| 68121 | 3817, |
| 68122 | /* DIVSSrr_Int */ |
| 68123 | 3820, |
| 68124 | /* DIV_F32m */ |
| 68125 | 3823, |
| 68126 | /* DIV_F64m */ |
| 68127 | 3824, |
| 68128 | /* DIV_FI16m */ |
| 68129 | 3825, |
| 68130 | /* DIV_FI32m */ |
| 68131 | 3826, |
| 68132 | /* DIV_FPrST0 */ |
| 68133 | 3827, |
| 68134 | /* DIV_FST0r */ |
| 68135 | 3828, |
| 68136 | /* DIV_Fp32 */ |
| 68137 | 3829, |
| 68138 | /* DIV_Fp32m */ |
| 68139 | 3832, |
| 68140 | /* DIV_Fp64 */ |
| 68141 | 3835, |
| 68142 | /* DIV_Fp64m */ |
| 68143 | 3838, |
| 68144 | /* DIV_Fp64m32 */ |
| 68145 | 3841, |
| 68146 | /* DIV_Fp80 */ |
| 68147 | 3844, |
| 68148 | /* DIV_Fp80m32 */ |
| 68149 | 3847, |
| 68150 | /* DIV_Fp80m64 */ |
| 68151 | 3850, |
| 68152 | /* DIV_FpI16m32 */ |
| 68153 | 3853, |
| 68154 | /* DIV_FpI16m64 */ |
| 68155 | 3856, |
| 68156 | /* DIV_FpI16m80 */ |
| 68157 | 3859, |
| 68158 | /* DIV_FpI32m32 */ |
| 68159 | 3862, |
| 68160 | /* DIV_FpI32m64 */ |
| 68161 | 3865, |
| 68162 | /* DIV_FpI32m80 */ |
| 68163 | 3868, |
| 68164 | /* DIV_FrST0 */ |
| 68165 | 3871, |
| 68166 | /* DPPDrmi */ |
| 68167 | 3872, |
| 68168 | /* DPPDrri */ |
| 68169 | 3876, |
| 68170 | /* DPPSrmi */ |
| 68171 | 3880, |
| 68172 | /* DPPSrri */ |
| 68173 | 3884, |
| 68174 | /* DS_PREFIX */ |
| 68175 | 3888, |
| 68176 | /* DYN_ALLOCA_32 */ |
| 68177 | 3888, |
| 68178 | /* DYN_ALLOCA_64 */ |
| 68179 | 3889, |
| 68180 | /* EH_RETURN */ |
| 68181 | 3890, |
| 68182 | /* EH_RETURN64 */ |
| 68183 | 3891, |
| 68184 | /* EH_SjLj_LongJmp32 */ |
| 68185 | 3892, |
| 68186 | /* EH_SjLj_LongJmp64 */ |
| 68187 | 3893, |
| 68188 | /* EH_SjLj_SetJmp32 */ |
| 68189 | 3894, |
| 68190 | /* EH_SjLj_SetJmp64 */ |
| 68191 | 3896, |
| 68192 | /* EH_SjLj_Setup */ |
| 68193 | 3898, |
| 68194 | /* ENCLS */ |
| 68195 | 3899, |
| 68196 | /* ENCLU */ |
| 68197 | 3899, |
| 68198 | /* ENCLV */ |
| 68199 | 3899, |
| 68200 | /* ENCODEKEY128 */ |
| 68201 | 3899, |
| 68202 | /* ENCODEKEY256 */ |
| 68203 | 3901, |
| 68204 | /* ENDBR32 */ |
| 68205 | 3903, |
| 68206 | /* ENDBR64 */ |
| 68207 | 3903, |
| 68208 | /* ENQCMD16 */ |
| 68209 | 3903, |
| 68210 | /* ENQCMD32 */ |
| 68211 | 3905, |
| 68212 | /* ENQCMD32_EVEX */ |
| 68213 | 3907, |
| 68214 | /* ENQCMD64 */ |
| 68215 | 3909, |
| 68216 | /* ENQCMD64_EVEX */ |
| 68217 | 3911, |
| 68218 | /* ENQCMDS16 */ |
| 68219 | 3913, |
| 68220 | /* ENQCMDS32 */ |
| 68221 | 3915, |
| 68222 | /* ENQCMDS32_EVEX */ |
| 68223 | 3917, |
| 68224 | /* ENQCMDS64 */ |
| 68225 | 3919, |
| 68226 | /* ENQCMDS64_EVEX */ |
| 68227 | 3921, |
| 68228 | /* ENTER */ |
| 68229 | 3923, |
| 68230 | /* ERETS */ |
| 68231 | 3925, |
| 68232 | /* ERETU */ |
| 68233 | 3925, |
| 68234 | /* ES_PREFIX */ |
| 68235 | 3925, |
| 68236 | /* EXTRACTPSmr */ |
| 68237 | 3925, |
| 68238 | /* EXTRACTPSrr */ |
| 68239 | 3928, |
| 68240 | /* EXTRQ */ |
| 68241 | 3931, |
| 68242 | /* EXTRQI */ |
| 68243 | 3934, |
| 68244 | /* F2XM1 */ |
| 68245 | 3938, |
| 68246 | /* FARCALL16i */ |
| 68247 | 3938, |
| 68248 | /* FARCALL16m */ |
| 68249 | 3940, |
| 68250 | /* FARCALL32i */ |
| 68251 | 3941, |
| 68252 | /* FARCALL32m */ |
| 68253 | 3943, |
| 68254 | /* FARCALL64m */ |
| 68255 | 3944, |
| 68256 | /* FARJMP16i */ |
| 68257 | 3945, |
| 68258 | /* FARJMP16m */ |
| 68259 | 3947, |
| 68260 | /* FARJMP32i */ |
| 68261 | 3948, |
| 68262 | /* FARJMP32m */ |
| 68263 | 3950, |
| 68264 | /* FARJMP64m */ |
| 68265 | 3951, |
| 68266 | /* FBLDm */ |
| 68267 | 3952, |
| 68268 | /* FBSTPm */ |
| 68269 | 3953, |
| 68270 | /* FCOM32m */ |
| 68271 | 3954, |
| 68272 | /* FCOM64m */ |
| 68273 | 3955, |
| 68274 | /* FCOMP32m */ |
| 68275 | 3956, |
| 68276 | /* FCOMP64m */ |
| 68277 | 3957, |
| 68278 | /* FCOMPP */ |
| 68279 | 3958, |
| 68280 | /* FCOS */ |
| 68281 | 3958, |
| 68282 | /* FDECSTP */ |
| 68283 | 3958, |
| 68284 | /* FEMMS */ |
| 68285 | 3958, |
| 68286 | /* FFREE */ |
| 68287 | 3958, |
| 68288 | /* FFREEP */ |
| 68289 | 3959, |
| 68290 | /* FICOM16m */ |
| 68291 | 3960, |
| 68292 | /* FICOM32m */ |
| 68293 | 3961, |
| 68294 | /* FICOMP16m */ |
| 68295 | 3962, |
| 68296 | /* FICOMP32m */ |
| 68297 | 3963, |
| 68298 | /* FINCSTP */ |
| 68299 | 3964, |
| 68300 | /* FLDCW16m */ |
| 68301 | 3964, |
| 68302 | /* FLDENVm */ |
| 68303 | 3965, |
| 68304 | /* FLDL2E */ |
| 68305 | 3966, |
| 68306 | /* FLDL2T */ |
| 68307 | 3966, |
| 68308 | /* FLDLG2 */ |
| 68309 | 3966, |
| 68310 | /* FLDLN2 */ |
| 68311 | 3966, |
| 68312 | /* FLDPI */ |
| 68313 | 3966, |
| 68314 | /* FNCLEX */ |
| 68315 | 3966, |
| 68316 | /* FNINIT */ |
| 68317 | 3966, |
| 68318 | /* FNOP */ |
| 68319 | 3966, |
| 68320 | /* FNSTCW16m */ |
| 68321 | 3966, |
| 68322 | /* FNSTSW16r */ |
| 68323 | 3967, |
| 68324 | /* FNSTSWm */ |
| 68325 | 3967, |
| 68326 | /* FP32_TO_INT16_IN_MEM */ |
| 68327 | 3968, |
| 68328 | /* FP32_TO_INT32_IN_MEM */ |
| 68329 | 3970, |
| 68330 | /* FP32_TO_INT64_IN_MEM */ |
| 68331 | 3972, |
| 68332 | /* FP64_TO_INT16_IN_MEM */ |
| 68333 | 3974, |
| 68334 | /* FP64_TO_INT32_IN_MEM */ |
| 68335 | 3976, |
| 68336 | /* FP64_TO_INT64_IN_MEM */ |
| 68337 | 3978, |
| 68338 | /* FP80_ADDm32 */ |
| 68339 | 3980, |
| 68340 | /* FP80_ADDr */ |
| 68341 | 3983, |
| 68342 | /* FP80_TO_INT16_IN_MEM */ |
| 68343 | 3986, |
| 68344 | /* FP80_TO_INT32_IN_MEM */ |
| 68345 | 3988, |
| 68346 | /* FP80_TO_INT64_IN_MEM */ |
| 68347 | 3990, |
| 68348 | /* FPATAN */ |
| 68349 | 3992, |
| 68350 | /* FPREM */ |
| 68351 | 3992, |
| 68352 | /* FPREM1 */ |
| 68353 | 3992, |
| 68354 | /* FPTAN */ |
| 68355 | 3992, |
| 68356 | /* FRNDINT */ |
| 68357 | 3992, |
| 68358 | /* FRSTORm */ |
| 68359 | 3992, |
| 68360 | /* FSAVEm */ |
| 68361 | 3993, |
| 68362 | /* FSCALE */ |
| 68363 | 3994, |
| 68364 | /* FSIN */ |
| 68365 | 3994, |
| 68366 | /* FSINCOS */ |
| 68367 | 3994, |
| 68368 | /* FSTENVm */ |
| 68369 | 3994, |
| 68370 | /* FS_PREFIX */ |
| 68371 | 3995, |
| 68372 | /* FXRSTOR */ |
| 68373 | 3995, |
| 68374 | /* FXRSTOR64 */ |
| 68375 | 3996, |
| 68376 | /* FXSAVE */ |
| 68377 | 3997, |
| 68378 | /* FXSAVE64 */ |
| 68379 | 3998, |
| 68380 | /* FXTRACT */ |
| 68381 | 3999, |
| 68382 | /* FYL2X */ |
| 68383 | 3999, |
| 68384 | /* FYL2XP1 */ |
| 68385 | 3999, |
| 68386 | /* GETSEC */ |
| 68387 | 3999, |
| 68388 | /* GF2P8AFFINEINVQBrmi */ |
| 68389 | 3999, |
| 68390 | /* GF2P8AFFINEINVQBrri */ |
| 68391 | 4003, |
| 68392 | /* GF2P8AFFINEQBrmi */ |
| 68393 | 4007, |
| 68394 | /* GF2P8AFFINEQBrri */ |
| 68395 | 4011, |
| 68396 | /* GF2P8MULBrm */ |
| 68397 | 4015, |
| 68398 | /* GF2P8MULBrr */ |
| 68399 | 4018, |
| 68400 | /* GS_PREFIX */ |
| 68401 | 4021, |
| 68402 | /* HADDPDrm */ |
| 68403 | 4021, |
| 68404 | /* HADDPDrr */ |
| 68405 | 4024, |
| 68406 | /* HADDPSrm */ |
| 68407 | 4027, |
| 68408 | /* HADDPSrr */ |
| 68409 | 4030, |
| 68410 | /* HLT */ |
| 68411 | 4033, |
| 68412 | /* HRESET */ |
| 68413 | 4033, |
| 68414 | /* HSUBPDrm */ |
| 68415 | 4034, |
| 68416 | /* HSUBPDrr */ |
| 68417 | 4037, |
| 68418 | /* HSUBPSrm */ |
| 68419 | 4040, |
| 68420 | /* HSUBPSrr */ |
| 68421 | 4043, |
| 68422 | /* IDIV16m */ |
| 68423 | 4046, |
| 68424 | /* IDIV16m_EVEX */ |
| 68425 | 4047, |
| 68426 | /* IDIV16m_NF */ |
| 68427 | 4048, |
| 68428 | /* IDIV16r */ |
| 68429 | 4049, |
| 68430 | /* IDIV16r_EVEX */ |
| 68431 | 4050, |
| 68432 | /* IDIV16r_NF */ |
| 68433 | 4051, |
| 68434 | /* IDIV32m */ |
| 68435 | 4052, |
| 68436 | /* IDIV32m_EVEX */ |
| 68437 | 4053, |
| 68438 | /* IDIV32m_NF */ |
| 68439 | 4054, |
| 68440 | /* IDIV32r */ |
| 68441 | 4055, |
| 68442 | /* IDIV32r_EVEX */ |
| 68443 | 4056, |
| 68444 | /* IDIV32r_NF */ |
| 68445 | 4057, |
| 68446 | /* IDIV64m */ |
| 68447 | 4058, |
| 68448 | /* IDIV64m_EVEX */ |
| 68449 | 4059, |
| 68450 | /* IDIV64m_NF */ |
| 68451 | 4060, |
| 68452 | /* IDIV64r */ |
| 68453 | 4061, |
| 68454 | /* IDIV64r_EVEX */ |
| 68455 | 4062, |
| 68456 | /* IDIV64r_NF */ |
| 68457 | 4063, |
| 68458 | /* IDIV8m */ |
| 68459 | 4064, |
| 68460 | /* IDIV8m_EVEX */ |
| 68461 | 4065, |
| 68462 | /* IDIV8m_NF */ |
| 68463 | 4066, |
| 68464 | /* IDIV8r */ |
| 68465 | 4067, |
| 68466 | /* IDIV8r_EVEX */ |
| 68467 | 4068, |
| 68468 | /* IDIV8r_NF */ |
| 68469 | 4069, |
| 68470 | /* ILD_F16m */ |
| 68471 | 4070, |
| 68472 | /* ILD_F32m */ |
| 68473 | 4071, |
| 68474 | /* ILD_F64m */ |
| 68475 | 4072, |
| 68476 | /* ILD_Fp16m32 */ |
| 68477 | 4073, |
| 68478 | /* ILD_Fp16m64 */ |
| 68479 | 4075, |
| 68480 | /* ILD_Fp16m80 */ |
| 68481 | 4077, |
| 68482 | /* ILD_Fp32m32 */ |
| 68483 | 4079, |
| 68484 | /* ILD_Fp32m64 */ |
| 68485 | 4081, |
| 68486 | /* ILD_Fp32m80 */ |
| 68487 | 4083, |
| 68488 | /* ILD_Fp64m32 */ |
| 68489 | 4085, |
| 68490 | /* ILD_Fp64m64 */ |
| 68491 | 4087, |
| 68492 | /* ILD_Fp64m80 */ |
| 68493 | 4089, |
| 68494 | /* IMUL16m */ |
| 68495 | 4091, |
| 68496 | /* IMUL16m_EVEX */ |
| 68497 | 4092, |
| 68498 | /* IMUL16m_NF */ |
| 68499 | 4093, |
| 68500 | /* IMUL16r */ |
| 68501 | 4094, |
| 68502 | /* IMUL16r_EVEX */ |
| 68503 | 4095, |
| 68504 | /* IMUL16r_NF */ |
| 68505 | 4096, |
| 68506 | /* IMUL16rm */ |
| 68507 | 4097, |
| 68508 | /* IMUL16rm_EVEX */ |
| 68509 | 4100, |
| 68510 | /* IMUL16rm_ND */ |
| 68511 | 4103, |
| 68512 | /* IMUL16rm_NF */ |
| 68513 | 4106, |
| 68514 | /* IMUL16rm_NF_ND */ |
| 68515 | 4109, |
| 68516 | /* IMUL16rmi */ |
| 68517 | 4112, |
| 68518 | /* IMUL16rmi8 */ |
| 68519 | 4115, |
| 68520 | /* IMUL16rmi8_EVEX */ |
| 68521 | 4118, |
| 68522 | /* IMUL16rmi8_NF */ |
| 68523 | 4121, |
| 68524 | /* IMUL16rmi_EVEX */ |
| 68525 | 4124, |
| 68526 | /* IMUL16rmi_NF */ |
| 68527 | 4127, |
| 68528 | /* IMUL16rr */ |
| 68529 | 4130, |
| 68530 | /* IMUL16rr_EVEX */ |
| 68531 | 4133, |
| 68532 | /* IMUL16rr_ND */ |
| 68533 | 4136, |
| 68534 | /* IMUL16rr_NF */ |
| 68535 | 4139, |
| 68536 | /* IMUL16rr_NF_ND */ |
| 68537 | 4142, |
| 68538 | /* IMUL16rri */ |
| 68539 | 4145, |
| 68540 | /* IMUL16rri8 */ |
| 68541 | 4148, |
| 68542 | /* IMUL16rri8_EVEX */ |
| 68543 | 4151, |
| 68544 | /* IMUL16rri8_NF */ |
| 68545 | 4154, |
| 68546 | /* IMUL16rri_EVEX */ |
| 68547 | 4157, |
| 68548 | /* IMUL16rri_NF */ |
| 68549 | 4160, |
| 68550 | /* IMUL32m */ |
| 68551 | 4163, |
| 68552 | /* IMUL32m_EVEX */ |
| 68553 | 4164, |
| 68554 | /* IMUL32m_NF */ |
| 68555 | 4165, |
| 68556 | /* IMUL32r */ |
| 68557 | 4166, |
| 68558 | /* IMUL32r_EVEX */ |
| 68559 | 4167, |
| 68560 | /* IMUL32r_NF */ |
| 68561 | 4168, |
| 68562 | /* IMUL32rm */ |
| 68563 | 4169, |
| 68564 | /* IMUL32rm_EVEX */ |
| 68565 | 4172, |
| 68566 | /* IMUL32rm_ND */ |
| 68567 | 4175, |
| 68568 | /* IMUL32rm_NF */ |
| 68569 | 4178, |
| 68570 | /* IMUL32rm_NF_ND */ |
| 68571 | 4181, |
| 68572 | /* IMUL32rmi */ |
| 68573 | 4184, |
| 68574 | /* IMUL32rmi8 */ |
| 68575 | 4187, |
| 68576 | /* IMUL32rmi8_EVEX */ |
| 68577 | 4190, |
| 68578 | /* IMUL32rmi8_NF */ |
| 68579 | 4193, |
| 68580 | /* IMUL32rmi_EVEX */ |
| 68581 | 4196, |
| 68582 | /* IMUL32rmi_NF */ |
| 68583 | 4199, |
| 68584 | /* IMUL32rr */ |
| 68585 | 4202, |
| 68586 | /* IMUL32rr_EVEX */ |
| 68587 | 4205, |
| 68588 | /* IMUL32rr_ND */ |
| 68589 | 4208, |
| 68590 | /* IMUL32rr_NF */ |
| 68591 | 4211, |
| 68592 | /* IMUL32rr_NF_ND */ |
| 68593 | 4214, |
| 68594 | /* IMUL32rri */ |
| 68595 | 4217, |
| 68596 | /* IMUL32rri8 */ |
| 68597 | 4220, |
| 68598 | /* IMUL32rri8_EVEX */ |
| 68599 | 4223, |
| 68600 | /* IMUL32rri8_NF */ |
| 68601 | 4226, |
| 68602 | /* IMUL32rri_EVEX */ |
| 68603 | 4229, |
| 68604 | /* IMUL32rri_NF */ |
| 68605 | 4232, |
| 68606 | /* IMUL64m */ |
| 68607 | 4235, |
| 68608 | /* IMUL64m_EVEX */ |
| 68609 | 4236, |
| 68610 | /* IMUL64m_NF */ |
| 68611 | 4237, |
| 68612 | /* IMUL64r */ |
| 68613 | 4238, |
| 68614 | /* IMUL64r_EVEX */ |
| 68615 | 4239, |
| 68616 | /* IMUL64r_NF */ |
| 68617 | 4240, |
| 68618 | /* IMUL64rm */ |
| 68619 | 4241, |
| 68620 | /* IMUL64rm_EVEX */ |
| 68621 | 4244, |
| 68622 | /* IMUL64rm_ND */ |
| 68623 | 4247, |
| 68624 | /* IMUL64rm_NF */ |
| 68625 | 4250, |
| 68626 | /* IMUL64rm_NF_ND */ |
| 68627 | 4253, |
| 68628 | /* IMUL64rmi32 */ |
| 68629 | 4256, |
| 68630 | /* IMUL64rmi32_EVEX */ |
| 68631 | 4259, |
| 68632 | /* IMUL64rmi32_NF */ |
| 68633 | 4262, |
| 68634 | /* IMUL64rmi8 */ |
| 68635 | 4265, |
| 68636 | /* IMUL64rmi8_EVEX */ |
| 68637 | 4268, |
| 68638 | /* IMUL64rmi8_NF */ |
| 68639 | 4271, |
| 68640 | /* IMUL64rr */ |
| 68641 | 4274, |
| 68642 | /* IMUL64rr_EVEX */ |
| 68643 | 4277, |
| 68644 | /* IMUL64rr_ND */ |
| 68645 | 4280, |
| 68646 | /* IMUL64rr_NF */ |
| 68647 | 4283, |
| 68648 | /* IMUL64rr_NF_ND */ |
| 68649 | 4286, |
| 68650 | /* IMUL64rri32 */ |
| 68651 | 4289, |
| 68652 | /* IMUL64rri32_EVEX */ |
| 68653 | 4292, |
| 68654 | /* IMUL64rri32_NF */ |
| 68655 | 4295, |
| 68656 | /* IMUL64rri8 */ |
| 68657 | 4298, |
| 68658 | /* IMUL64rri8_EVEX */ |
| 68659 | 4301, |
| 68660 | /* IMUL64rri8_NF */ |
| 68661 | 4304, |
| 68662 | /* IMUL8m */ |
| 68663 | 4307, |
| 68664 | /* IMUL8m_EVEX */ |
| 68665 | 4308, |
| 68666 | /* IMUL8m_NF */ |
| 68667 | 4309, |
| 68668 | /* IMUL8r */ |
| 68669 | 4310, |
| 68670 | /* IMUL8r_EVEX */ |
| 68671 | 4311, |
| 68672 | /* IMUL8r_NF */ |
| 68673 | 4312, |
| 68674 | /* IMULZU16rmi */ |
| 68675 | 4313, |
| 68676 | /* IMULZU16rmi8 */ |
| 68677 | 4316, |
| 68678 | /* IMULZU16rri */ |
| 68679 | 4319, |
| 68680 | /* IMULZU16rri8 */ |
| 68681 | 4322, |
| 68682 | /* IMULZU32rmi */ |
| 68683 | 4325, |
| 68684 | /* IMULZU32rmi8 */ |
| 68685 | 4328, |
| 68686 | /* IMULZU32rri */ |
| 68687 | 4331, |
| 68688 | /* IMULZU32rri8 */ |
| 68689 | 4334, |
| 68690 | /* IMULZU64rmi32 */ |
| 68691 | 4337, |
| 68692 | /* IMULZU64rmi8 */ |
| 68693 | 4340, |
| 68694 | /* IMULZU64rri32 */ |
| 68695 | 4343, |
| 68696 | /* IMULZU64rri8 */ |
| 68697 | 4346, |
| 68698 | /* IN16ri */ |
| 68699 | 4349, |
| 68700 | /* IN16rr */ |
| 68701 | 4350, |
| 68702 | /* IN32ri */ |
| 68703 | 4350, |
| 68704 | /* IN32rr */ |
| 68705 | 4351, |
| 68706 | /* IN8ri */ |
| 68707 | 4351, |
| 68708 | /* IN8rr */ |
| 68709 | 4352, |
| 68710 | /* INC16m */ |
| 68711 | 4352, |
| 68712 | /* INC16m_EVEX */ |
| 68713 | 4353, |
| 68714 | /* INC16m_ND */ |
| 68715 | 4354, |
| 68716 | /* INC16m_NF */ |
| 68717 | 4356, |
| 68718 | /* INC16m_NF_ND */ |
| 68719 | 4357, |
| 68720 | /* INC16r */ |
| 68721 | 4359, |
| 68722 | /* INC16r_EVEX */ |
| 68723 | 4361, |
| 68724 | /* INC16r_ND */ |
| 68725 | 4363, |
| 68726 | /* INC16r_NF */ |
| 68727 | 4365, |
| 68728 | /* INC16r_NF_ND */ |
| 68729 | 4367, |
| 68730 | /* INC16r_alt */ |
| 68731 | 4369, |
| 68732 | /* INC32m */ |
| 68733 | 4371, |
| 68734 | /* INC32m_EVEX */ |
| 68735 | 4372, |
| 68736 | /* INC32m_ND */ |
| 68737 | 4373, |
| 68738 | /* INC32m_NF */ |
| 68739 | 4375, |
| 68740 | /* INC32m_NF_ND */ |
| 68741 | 4376, |
| 68742 | /* INC32r */ |
| 68743 | 4378, |
| 68744 | /* INC32r_EVEX */ |
| 68745 | 4380, |
| 68746 | /* INC32r_ND */ |
| 68747 | 4382, |
| 68748 | /* INC32r_NF */ |
| 68749 | 4384, |
| 68750 | /* INC32r_NF_ND */ |
| 68751 | 4386, |
| 68752 | /* INC32r_alt */ |
| 68753 | 4388, |
| 68754 | /* INC64m */ |
| 68755 | 4390, |
| 68756 | /* INC64m_EVEX */ |
| 68757 | 4391, |
| 68758 | /* INC64m_ND */ |
| 68759 | 4392, |
| 68760 | /* INC64m_NF */ |
| 68761 | 4394, |
| 68762 | /* INC64m_NF_ND */ |
| 68763 | 4395, |
| 68764 | /* INC64r */ |
| 68765 | 4397, |
| 68766 | /* INC64r_EVEX */ |
| 68767 | 4399, |
| 68768 | /* INC64r_ND */ |
| 68769 | 4401, |
| 68770 | /* INC64r_NF */ |
| 68771 | 4403, |
| 68772 | /* INC64r_NF_ND */ |
| 68773 | 4405, |
| 68774 | /* INC8m */ |
| 68775 | 4407, |
| 68776 | /* INC8m_EVEX */ |
| 68777 | 4408, |
| 68778 | /* INC8m_ND */ |
| 68779 | 4409, |
| 68780 | /* INC8m_NF */ |
| 68781 | 4411, |
| 68782 | /* INC8m_NF_ND */ |
| 68783 | 4412, |
| 68784 | /* INC8r */ |
| 68785 | 4414, |
| 68786 | /* INC8r_EVEX */ |
| 68787 | 4416, |
| 68788 | /* INC8r_ND */ |
| 68789 | 4418, |
| 68790 | /* INC8r_NF */ |
| 68791 | 4420, |
| 68792 | /* INC8r_NF_ND */ |
| 68793 | 4422, |
| 68794 | /* INCSSPD */ |
| 68795 | 4424, |
| 68796 | /* INCSSPQ */ |
| 68797 | 4425, |
| 68798 | /* INSB */ |
| 68799 | 4426, |
| 68800 | /* INSERTPSrm */ |
| 68801 | 4427, |
| 68802 | /* INSERTPSrr */ |
| 68803 | 4431, |
| 68804 | /* INSERTQ */ |
| 68805 | 4435, |
| 68806 | /* INSERTQI */ |
| 68807 | 4438, |
| 68808 | /* INSL */ |
| 68809 | 4443, |
| 68810 | /* INSW */ |
| 68811 | 4444, |
| 68812 | /* INT */ |
| 68813 | 4445, |
| 68814 | /* INT3 */ |
| 68815 | 4446, |
| 68816 | /* INTO */ |
| 68817 | 4446, |
| 68818 | /* INVD */ |
| 68819 | 4446, |
| 68820 | /* INVEPT32 */ |
| 68821 | 4446, |
| 68822 | /* INVEPT64 */ |
| 68823 | 4448, |
| 68824 | /* INVEPT64_EVEX */ |
| 68825 | 4450, |
| 68826 | /* INVLPG */ |
| 68827 | 4452, |
| 68828 | /* INVLPGA32 */ |
| 68829 | 4453, |
| 68830 | /* INVLPGA64 */ |
| 68831 | 4453, |
| 68832 | /* INVLPGB32 */ |
| 68833 | 4453, |
| 68834 | /* INVLPGB64 */ |
| 68835 | 4453, |
| 68836 | /* INVPCID32 */ |
| 68837 | 4453, |
| 68838 | /* INVPCID64 */ |
| 68839 | 4455, |
| 68840 | /* INVPCID64_EVEX */ |
| 68841 | 4457, |
| 68842 | /* INVVPID32 */ |
| 68843 | 4459, |
| 68844 | /* INVVPID64 */ |
| 68845 | 4461, |
| 68846 | /* INVVPID64_EVEX */ |
| 68847 | 4463, |
| 68848 | /* IRET */ |
| 68849 | 4465, |
| 68850 | /* IRET16 */ |
| 68851 | 4466, |
| 68852 | /* IRET32 */ |
| 68853 | 4466, |
| 68854 | /* IRET64 */ |
| 68855 | 4466, |
| 68856 | /* ISTT_FP16m */ |
| 68857 | 4466, |
| 68858 | /* ISTT_FP32m */ |
| 68859 | 4467, |
| 68860 | /* ISTT_FP64m */ |
| 68861 | 4468, |
| 68862 | /* ISTT_Fp16m32 */ |
| 68863 | 4469, |
| 68864 | /* ISTT_Fp16m64 */ |
| 68865 | 4471, |
| 68866 | /* ISTT_Fp16m80 */ |
| 68867 | 4473, |
| 68868 | /* ISTT_Fp32m32 */ |
| 68869 | 4475, |
| 68870 | /* ISTT_Fp32m64 */ |
| 68871 | 4477, |
| 68872 | /* ISTT_Fp32m80 */ |
| 68873 | 4479, |
| 68874 | /* ISTT_Fp64m32 */ |
| 68875 | 4481, |
| 68876 | /* ISTT_Fp64m64 */ |
| 68877 | 4483, |
| 68878 | /* ISTT_Fp64m80 */ |
| 68879 | 4485, |
| 68880 | /* IST_F16m */ |
| 68881 | 4487, |
| 68882 | /* IST_F32m */ |
| 68883 | 4488, |
| 68884 | /* IST_FP16m */ |
| 68885 | 4489, |
| 68886 | /* IST_FP32m */ |
| 68887 | 4490, |
| 68888 | /* IST_FP64m */ |
| 68889 | 4491, |
| 68890 | /* IST_Fp16m32 */ |
| 68891 | 4492, |
| 68892 | /* IST_Fp16m64 */ |
| 68893 | 4494, |
| 68894 | /* IST_Fp16m80 */ |
| 68895 | 4496, |
| 68896 | /* IST_Fp32m32 */ |
| 68897 | 4498, |
| 68898 | /* IST_Fp32m64 */ |
| 68899 | 4500, |
| 68900 | /* IST_Fp32m80 */ |
| 68901 | 4502, |
| 68902 | /* IST_Fp64m32 */ |
| 68903 | 4504, |
| 68904 | /* IST_Fp64m64 */ |
| 68905 | 4506, |
| 68906 | /* IST_Fp64m80 */ |
| 68907 | 4508, |
| 68908 | /* Int_eh_sjlj_setup_dispatch */ |
| 68909 | 4510, |
| 68910 | /* JCC_1 */ |
| 68911 | 4510, |
| 68912 | /* JCC_2 */ |
| 68913 | 4512, |
| 68914 | /* JCC_4 */ |
| 68915 | 4514, |
| 68916 | /* JCXZ */ |
| 68917 | 4516, |
| 68918 | /* JECXZ */ |
| 68919 | 4517, |
| 68920 | /* JMP16m */ |
| 68921 | 4518, |
| 68922 | /* JMP16m_NT */ |
| 68923 | 4519, |
| 68924 | /* JMP16r */ |
| 68925 | 4520, |
| 68926 | /* JMP16r_NT */ |
| 68927 | 4521, |
| 68928 | /* JMP32m */ |
| 68929 | 4522, |
| 68930 | /* JMP32m_NT */ |
| 68931 | 4523, |
| 68932 | /* JMP32r */ |
| 68933 | 4524, |
| 68934 | /* JMP32r_NT */ |
| 68935 | 4525, |
| 68936 | /* JMP64m */ |
| 68937 | 4526, |
| 68938 | /* JMP64m_NT */ |
| 68939 | 4527, |
| 68940 | /* JMP64m_REX */ |
| 68941 | 4528, |
| 68942 | /* JMP64r */ |
| 68943 | 4529, |
| 68944 | /* JMP64r_NT */ |
| 68945 | 4530, |
| 68946 | /* JMP64r_REX */ |
| 68947 | 4531, |
| 68948 | /* JMPABS64i */ |
| 68949 | 4532, |
| 68950 | /* JMP_1 */ |
| 68951 | 4533, |
| 68952 | /* JMP_2 */ |
| 68953 | 4534, |
| 68954 | /* JMP_4 */ |
| 68955 | 4535, |
| 68956 | /* JRCXZ */ |
| 68957 | 4536, |
| 68958 | /* KADDBrr */ |
| 68959 | 4537, |
| 68960 | /* KADDDrr */ |
| 68961 | 4540, |
| 68962 | /* KADDQrr */ |
| 68963 | 4543, |
| 68964 | /* KADDWrr */ |
| 68965 | 4546, |
| 68966 | /* KANDBrr */ |
| 68967 | 4549, |
| 68968 | /* KANDDrr */ |
| 68969 | 4552, |
| 68970 | /* KANDNBrr */ |
| 68971 | 4555, |
| 68972 | /* KANDNDrr */ |
| 68973 | 4558, |
| 68974 | /* KANDNQrr */ |
| 68975 | 4561, |
| 68976 | /* KANDNWrr */ |
| 68977 | 4564, |
| 68978 | /* KANDQrr */ |
| 68979 | 4567, |
| 68980 | /* KANDWrr */ |
| 68981 | 4570, |
| 68982 | /* KCFI_CHECK */ |
| 68983 | 4573, |
| 68984 | /* KMOVBkk */ |
| 68985 | 4575, |
| 68986 | /* KMOVBkk_EVEX */ |
| 68987 | 4577, |
| 68988 | /* KMOVBkm */ |
| 68989 | 4579, |
| 68990 | /* KMOVBkm_EVEX */ |
| 68991 | 4581, |
| 68992 | /* KMOVBkr */ |
| 68993 | 4583, |
| 68994 | /* KMOVBkr_EVEX */ |
| 68995 | 4585, |
| 68996 | /* KMOVBmk */ |
| 68997 | 4587, |
| 68998 | /* KMOVBmk_EVEX */ |
| 68999 | 4589, |
| 69000 | /* KMOVBrk */ |
| 69001 | 4591, |
| 69002 | /* KMOVBrk_EVEX */ |
| 69003 | 4593, |
| 69004 | /* KMOVDkk */ |
| 69005 | 4595, |
| 69006 | /* KMOVDkk_EVEX */ |
| 69007 | 4597, |
| 69008 | /* KMOVDkm */ |
| 69009 | 4599, |
| 69010 | /* KMOVDkm_EVEX */ |
| 69011 | 4601, |
| 69012 | /* KMOVDkr */ |
| 69013 | 4603, |
| 69014 | /* KMOVDkr_EVEX */ |
| 69015 | 4605, |
| 69016 | /* KMOVDmk */ |
| 69017 | 4607, |
| 69018 | /* KMOVDmk_EVEX */ |
| 69019 | 4609, |
| 69020 | /* KMOVDrk */ |
| 69021 | 4611, |
| 69022 | /* KMOVDrk_EVEX */ |
| 69023 | 4613, |
| 69024 | /* KMOVQkk */ |
| 69025 | 4615, |
| 69026 | /* KMOVQkk_EVEX */ |
| 69027 | 4617, |
| 69028 | /* KMOVQkm */ |
| 69029 | 4619, |
| 69030 | /* KMOVQkm_EVEX */ |
| 69031 | 4621, |
| 69032 | /* KMOVQkr */ |
| 69033 | 4623, |
| 69034 | /* KMOVQkr_EVEX */ |
| 69035 | 4625, |
| 69036 | /* KMOVQmk */ |
| 69037 | 4627, |
| 69038 | /* KMOVQmk_EVEX */ |
| 69039 | 4629, |
| 69040 | /* KMOVQrk */ |
| 69041 | 4631, |
| 69042 | /* KMOVQrk_EVEX */ |
| 69043 | 4633, |
| 69044 | /* KMOVWkk */ |
| 69045 | 4635, |
| 69046 | /* KMOVWkk_EVEX */ |
| 69047 | 4637, |
| 69048 | /* KMOVWkm */ |
| 69049 | 4639, |
| 69050 | /* KMOVWkm_EVEX */ |
| 69051 | 4641, |
| 69052 | /* KMOVWkr */ |
| 69053 | 4643, |
| 69054 | /* KMOVWkr_EVEX */ |
| 69055 | 4645, |
| 69056 | /* KMOVWmk */ |
| 69057 | 4647, |
| 69058 | /* KMOVWmk_EVEX */ |
| 69059 | 4649, |
| 69060 | /* KMOVWrk */ |
| 69061 | 4651, |
| 69062 | /* KMOVWrk_EVEX */ |
| 69063 | 4653, |
| 69064 | /* KNOTBrr */ |
| 69065 | 4655, |
| 69066 | /* KNOTDrr */ |
| 69067 | 4657, |
| 69068 | /* KNOTQrr */ |
| 69069 | 4659, |
| 69070 | /* KNOTWrr */ |
| 69071 | 4661, |
| 69072 | /* KORBrr */ |
| 69073 | 4663, |
| 69074 | /* KORDrr */ |
| 69075 | 4666, |
| 69076 | /* KORQrr */ |
| 69077 | 4669, |
| 69078 | /* KORTESTBrr */ |
| 69079 | 4672, |
| 69080 | /* KORTESTDrr */ |
| 69081 | 4674, |
| 69082 | /* KORTESTQrr */ |
| 69083 | 4676, |
| 69084 | /* KORTESTWrr */ |
| 69085 | 4678, |
| 69086 | /* KORWrr */ |
| 69087 | 4680, |
| 69088 | /* KSHIFTLBri */ |
| 69089 | 4683, |
| 69090 | /* KSHIFTLDri */ |
| 69091 | 4686, |
| 69092 | /* KSHIFTLQri */ |
| 69093 | 4689, |
| 69094 | /* KSHIFTLWri */ |
| 69095 | 4692, |
| 69096 | /* KSHIFTRBri */ |
| 69097 | 4695, |
| 69098 | /* KSHIFTRDri */ |
| 69099 | 4698, |
| 69100 | /* KSHIFTRQri */ |
| 69101 | 4701, |
| 69102 | /* KSHIFTRWri */ |
| 69103 | 4704, |
| 69104 | /* KTESTBrr */ |
| 69105 | 4707, |
| 69106 | /* KTESTDrr */ |
| 69107 | 4709, |
| 69108 | /* KTESTQrr */ |
| 69109 | 4711, |
| 69110 | /* KTESTWrr */ |
| 69111 | 4713, |
| 69112 | /* KUNPCKBWrr */ |
| 69113 | 4715, |
| 69114 | /* KUNPCKDQrr */ |
| 69115 | 4718, |
| 69116 | /* KUNPCKWDrr */ |
| 69117 | 4721, |
| 69118 | /* KXNORBrr */ |
| 69119 | 4724, |
| 69120 | /* KXNORDrr */ |
| 69121 | 4727, |
| 69122 | /* KXNORQrr */ |
| 69123 | 4730, |
| 69124 | /* KXNORWrr */ |
| 69125 | 4733, |
| 69126 | /* KXORBrr */ |
| 69127 | 4736, |
| 69128 | /* KXORDrr */ |
| 69129 | 4739, |
| 69130 | /* KXORQrr */ |
| 69131 | 4742, |
| 69132 | /* KXORWrr */ |
| 69133 | 4745, |
| 69134 | /* LAHF */ |
| 69135 | 4748, |
| 69136 | /* LAR16rm */ |
| 69137 | 4748, |
| 69138 | /* LAR16rr */ |
| 69139 | 4750, |
| 69140 | /* LAR32rm */ |
| 69141 | 4752, |
| 69142 | /* LAR32rr */ |
| 69143 | 4754, |
| 69144 | /* LAR64rm */ |
| 69145 | 4756, |
| 69146 | /* LAR64rr */ |
| 69147 | 4758, |
| 69148 | /* LCMPXCHG16 */ |
| 69149 | 4760, |
| 69150 | /* LCMPXCHG16B */ |
| 69151 | 4762, |
| 69152 | /* LCMPXCHG32 */ |
| 69153 | 4763, |
| 69154 | /* LCMPXCHG64 */ |
| 69155 | 4765, |
| 69156 | /* LCMPXCHG8 */ |
| 69157 | 4767, |
| 69158 | /* LCMPXCHG8B */ |
| 69159 | 4769, |
| 69160 | /* LDDQUrm */ |
| 69161 | 4770, |
| 69162 | /* LDMXCSR */ |
| 69163 | 4772, |
| 69164 | /* LDS16rm */ |
| 69165 | 4773, |
| 69166 | /* LDS32rm */ |
| 69167 | 4775, |
| 69168 | /* LDTILECFG */ |
| 69169 | 4777, |
| 69170 | /* LDTILECFG_EVEX */ |
| 69171 | 4778, |
| 69172 | /* LD_F0 */ |
| 69173 | 4779, |
| 69174 | /* LD_F1 */ |
| 69175 | 4779, |
| 69176 | /* LD_F32m */ |
| 69177 | 4779, |
| 69178 | /* LD_F64m */ |
| 69179 | 4780, |
| 69180 | /* LD_F80m */ |
| 69181 | 4781, |
| 69182 | /* LD_Fp032 */ |
| 69183 | 4782, |
| 69184 | /* LD_Fp064 */ |
| 69185 | 4783, |
| 69186 | /* LD_Fp080 */ |
| 69187 | 4784, |
| 69188 | /* LD_Fp132 */ |
| 69189 | 4785, |
| 69190 | /* LD_Fp164 */ |
| 69191 | 4786, |
| 69192 | /* LD_Fp180 */ |
| 69193 | 4787, |
| 69194 | /* LD_Fp32m */ |
| 69195 | 4788, |
| 69196 | /* LD_Fp32m64 */ |
| 69197 | 4790, |
| 69198 | /* LD_Fp32m80 */ |
| 69199 | 4792, |
| 69200 | /* LD_Fp64m */ |
| 69201 | 4794, |
| 69202 | /* LD_Fp64m80 */ |
| 69203 | 4796, |
| 69204 | /* LD_Fp80m */ |
| 69205 | 4798, |
| 69206 | /* LD_Frr */ |
| 69207 | 4800, |
| 69208 | /* LEA16r */ |
| 69209 | 4801, |
| 69210 | /* LEA32r */ |
| 69211 | 4803, |
| 69212 | /* LEA64_32r */ |
| 69213 | 4805, |
| 69214 | /* LEA64r */ |
| 69215 | 4807, |
| 69216 | /* LEAVE */ |
| 69217 | 4809, |
| 69218 | /* LEAVE64 */ |
| 69219 | 4809, |
| 69220 | /* LES16rm */ |
| 69221 | 4809, |
| 69222 | /* LES32rm */ |
| 69223 | 4811, |
| 69224 | /* LFENCE */ |
| 69225 | 4813, |
| 69226 | /* LFS16rm */ |
| 69227 | 4813, |
| 69228 | /* LFS32rm */ |
| 69229 | 4815, |
| 69230 | /* LFS64rm */ |
| 69231 | 4817, |
| 69232 | /* LGDT16m */ |
| 69233 | 4819, |
| 69234 | /* LGDT32m */ |
| 69235 | 4820, |
| 69236 | /* LGDT64m */ |
| 69237 | 4821, |
| 69238 | /* LGS16rm */ |
| 69239 | 4822, |
| 69240 | /* LGS32rm */ |
| 69241 | 4824, |
| 69242 | /* LGS64rm */ |
| 69243 | 4826, |
| 69244 | /* LIDT16m */ |
| 69245 | 4828, |
| 69246 | /* LIDT32m */ |
| 69247 | 4829, |
| 69248 | /* LIDT64m */ |
| 69249 | 4830, |
| 69250 | /* LKGS16m */ |
| 69251 | 4831, |
| 69252 | /* LKGS16r */ |
| 69253 | 4832, |
| 69254 | /* LLDT16m */ |
| 69255 | 4833, |
| 69256 | /* LLDT16r */ |
| 69257 | 4834, |
| 69258 | /* LLWPCB */ |
| 69259 | 4835, |
| 69260 | /* LLWPCB64 */ |
| 69261 | 4836, |
| 69262 | /* LMSW16m */ |
| 69263 | 4837, |
| 69264 | /* LMSW16r */ |
| 69265 | 4838, |
| 69266 | /* LOADIWKEY */ |
| 69267 | 4839, |
| 69268 | /* LOCK_ADD16mi */ |
| 69269 | 4841, |
| 69270 | /* LOCK_ADD16mi8 */ |
| 69271 | 4843, |
| 69272 | /* LOCK_ADD16mr */ |
| 69273 | 4845, |
| 69274 | /* LOCK_ADD32mi */ |
| 69275 | 4847, |
| 69276 | /* LOCK_ADD32mi8 */ |
| 69277 | 4849, |
| 69278 | /* LOCK_ADD32mr */ |
| 69279 | 4851, |
| 69280 | /* LOCK_ADD64mi32 */ |
| 69281 | 4853, |
| 69282 | /* LOCK_ADD64mi8 */ |
| 69283 | 4855, |
| 69284 | /* LOCK_ADD64mr */ |
| 69285 | 4857, |
| 69286 | /* LOCK_ADD8mi */ |
| 69287 | 4859, |
| 69288 | /* LOCK_ADD8mr */ |
| 69289 | 4861, |
| 69290 | /* LOCK_AND16mi */ |
| 69291 | 4863, |
| 69292 | /* LOCK_AND16mi8 */ |
| 69293 | 4865, |
| 69294 | /* LOCK_AND16mr */ |
| 69295 | 4867, |
| 69296 | /* LOCK_AND32mi */ |
| 69297 | 4869, |
| 69298 | /* LOCK_AND32mi8 */ |
| 69299 | 4871, |
| 69300 | /* LOCK_AND32mr */ |
| 69301 | 4873, |
| 69302 | /* LOCK_AND64mi32 */ |
| 69303 | 4875, |
| 69304 | /* LOCK_AND64mi8 */ |
| 69305 | 4877, |
| 69306 | /* LOCK_AND64mr */ |
| 69307 | 4879, |
| 69308 | /* LOCK_AND8mi */ |
| 69309 | 4881, |
| 69310 | /* LOCK_AND8mr */ |
| 69311 | 4883, |
| 69312 | /* LOCK_BTC16m */ |
| 69313 | 4885, |
| 69314 | /* LOCK_BTC32m */ |
| 69315 | 4887, |
| 69316 | /* LOCK_BTC64m */ |
| 69317 | 4889, |
| 69318 | /* LOCK_BTC_RM16rm */ |
| 69319 | 4891, |
| 69320 | /* LOCK_BTC_RM32rm */ |
| 69321 | 4893, |
| 69322 | /* LOCK_BTC_RM64rm */ |
| 69323 | 4895, |
| 69324 | /* LOCK_BTR16m */ |
| 69325 | 4897, |
| 69326 | /* LOCK_BTR32m */ |
| 69327 | 4899, |
| 69328 | /* LOCK_BTR64m */ |
| 69329 | 4901, |
| 69330 | /* LOCK_BTR_RM16rm */ |
| 69331 | 4903, |
| 69332 | /* LOCK_BTR_RM32rm */ |
| 69333 | 4905, |
| 69334 | /* LOCK_BTR_RM64rm */ |
| 69335 | 4907, |
| 69336 | /* LOCK_BTS16m */ |
| 69337 | 4909, |
| 69338 | /* LOCK_BTS32m */ |
| 69339 | 4911, |
| 69340 | /* LOCK_BTS64m */ |
| 69341 | 4913, |
| 69342 | /* LOCK_BTS_RM16rm */ |
| 69343 | 4915, |
| 69344 | /* LOCK_BTS_RM32rm */ |
| 69345 | 4917, |
| 69346 | /* LOCK_BTS_RM64rm */ |
| 69347 | 4919, |
| 69348 | /* LOCK_DEC16m */ |
| 69349 | 4921, |
| 69350 | /* LOCK_DEC32m */ |
| 69351 | 4922, |
| 69352 | /* LOCK_DEC64m */ |
| 69353 | 4923, |
| 69354 | /* LOCK_DEC8m */ |
| 69355 | 4924, |
| 69356 | /* LOCK_INC16m */ |
| 69357 | 4925, |
| 69358 | /* LOCK_INC32m */ |
| 69359 | 4926, |
| 69360 | /* LOCK_INC64m */ |
| 69361 | 4927, |
| 69362 | /* LOCK_INC8m */ |
| 69363 | 4928, |
| 69364 | /* LOCK_OR16mi */ |
| 69365 | 4929, |
| 69366 | /* LOCK_OR16mi8 */ |
| 69367 | 4931, |
| 69368 | /* LOCK_OR16mr */ |
| 69369 | 4933, |
| 69370 | /* LOCK_OR32mi */ |
| 69371 | 4935, |
| 69372 | /* LOCK_OR32mi8 */ |
| 69373 | 4937, |
| 69374 | /* LOCK_OR32mr */ |
| 69375 | 4939, |
| 69376 | /* LOCK_OR64mi32 */ |
| 69377 | 4941, |
| 69378 | /* LOCK_OR64mi8 */ |
| 69379 | 4943, |
| 69380 | /* LOCK_OR64mr */ |
| 69381 | 4945, |
| 69382 | /* LOCK_OR8mi */ |
| 69383 | 4947, |
| 69384 | /* LOCK_OR8mr */ |
| 69385 | 4949, |
| 69386 | /* LOCK_PREFIX */ |
| 69387 | 4951, |
| 69388 | /* LOCK_SUB16mi */ |
| 69389 | 4951, |
| 69390 | /* LOCK_SUB16mi8 */ |
| 69391 | 4953, |
| 69392 | /* LOCK_SUB16mr */ |
| 69393 | 4955, |
| 69394 | /* LOCK_SUB32mi */ |
| 69395 | 4957, |
| 69396 | /* LOCK_SUB32mi8 */ |
| 69397 | 4959, |
| 69398 | /* LOCK_SUB32mr */ |
| 69399 | 4961, |
| 69400 | /* LOCK_SUB64mi32 */ |
| 69401 | 4963, |
| 69402 | /* LOCK_SUB64mi8 */ |
| 69403 | 4965, |
| 69404 | /* LOCK_SUB64mr */ |
| 69405 | 4967, |
| 69406 | /* LOCK_SUB8mi */ |
| 69407 | 4969, |
| 69408 | /* LOCK_SUB8mr */ |
| 69409 | 4971, |
| 69410 | /* LOCK_XOR16mi */ |
| 69411 | 4973, |
| 69412 | /* LOCK_XOR16mi8 */ |
| 69413 | 4975, |
| 69414 | /* LOCK_XOR16mr */ |
| 69415 | 4977, |
| 69416 | /* LOCK_XOR32mi */ |
| 69417 | 4979, |
| 69418 | /* LOCK_XOR32mi8 */ |
| 69419 | 4981, |
| 69420 | /* LOCK_XOR32mr */ |
| 69421 | 4983, |
| 69422 | /* LOCK_XOR64mi32 */ |
| 69423 | 4985, |
| 69424 | /* LOCK_XOR64mi8 */ |
| 69425 | 4987, |
| 69426 | /* LOCK_XOR64mr */ |
| 69427 | 4989, |
| 69428 | /* LOCK_XOR8mi */ |
| 69429 | 4991, |
| 69430 | /* LOCK_XOR8mr */ |
| 69431 | 4993, |
| 69432 | /* LODSB */ |
| 69433 | 4995, |
| 69434 | /* LODSL */ |
| 69435 | 4996, |
| 69436 | /* LODSQ */ |
| 69437 | 4997, |
| 69438 | /* LODSW */ |
| 69439 | 4998, |
| 69440 | /* LOOP */ |
| 69441 | 4999, |
| 69442 | /* LOOPE */ |
| 69443 | 5000, |
| 69444 | /* LOOPNE */ |
| 69445 | 5001, |
| 69446 | /* LRET16 */ |
| 69447 | 5002, |
| 69448 | /* LRET32 */ |
| 69449 | 5002, |
| 69450 | /* LRET64 */ |
| 69451 | 5002, |
| 69452 | /* LRETI16 */ |
| 69453 | 5002, |
| 69454 | /* LRETI32 */ |
| 69455 | 5003, |
| 69456 | /* LRETI64 */ |
| 69457 | 5004, |
| 69458 | /* LSL16rm */ |
| 69459 | 5005, |
| 69460 | /* LSL16rr */ |
| 69461 | 5007, |
| 69462 | /* LSL32rm */ |
| 69463 | 5009, |
| 69464 | /* LSL32rr */ |
| 69465 | 5011, |
| 69466 | /* LSL64rm */ |
| 69467 | 5013, |
| 69468 | /* LSL64rr */ |
| 69469 | 5015, |
| 69470 | /* LSS16rm */ |
| 69471 | 5017, |
| 69472 | /* LSS32rm */ |
| 69473 | 5019, |
| 69474 | /* LSS64rm */ |
| 69475 | 5021, |
| 69476 | /* LTRm */ |
| 69477 | 5023, |
| 69478 | /* LTRr */ |
| 69479 | 5024, |
| 69480 | /* LWPINS32rmi */ |
| 69481 | 5025, |
| 69482 | /* LWPINS32rri */ |
| 69483 | 5028, |
| 69484 | /* LWPINS64rmi */ |
| 69485 | 5031, |
| 69486 | /* LWPINS64rri */ |
| 69487 | 5034, |
| 69488 | /* LWPVAL32rmi */ |
| 69489 | 5037, |
| 69490 | /* LWPVAL32rri */ |
| 69491 | 5040, |
| 69492 | /* LWPVAL64rmi */ |
| 69493 | 5043, |
| 69494 | /* LWPVAL64rri */ |
| 69495 | 5046, |
| 69496 | /* LXADD16 */ |
| 69497 | 5049, |
| 69498 | /* LXADD32 */ |
| 69499 | 5052, |
| 69500 | /* LXADD64 */ |
| 69501 | 5055, |
| 69502 | /* LXADD8 */ |
| 69503 | 5058, |
| 69504 | /* LZCNT16rm */ |
| 69505 | 5061, |
| 69506 | /* LZCNT16rm_EVEX */ |
| 69507 | 5063, |
| 69508 | /* LZCNT16rm_NF */ |
| 69509 | 5065, |
| 69510 | /* LZCNT16rr */ |
| 69511 | 5067, |
| 69512 | /* LZCNT16rr_EVEX */ |
| 69513 | 5069, |
| 69514 | /* LZCNT16rr_NF */ |
| 69515 | 5071, |
| 69516 | /* LZCNT32rm */ |
| 69517 | 5073, |
| 69518 | /* LZCNT32rm_EVEX */ |
| 69519 | 5075, |
| 69520 | /* LZCNT32rm_NF */ |
| 69521 | 5077, |
| 69522 | /* LZCNT32rr */ |
| 69523 | 5079, |
| 69524 | /* LZCNT32rr_EVEX */ |
| 69525 | 5081, |
| 69526 | /* LZCNT32rr_NF */ |
| 69527 | 5083, |
| 69528 | /* LZCNT64rm */ |
| 69529 | 5085, |
| 69530 | /* LZCNT64rm_EVEX */ |
| 69531 | 5087, |
| 69532 | /* LZCNT64rm_NF */ |
| 69533 | 5089, |
| 69534 | /* LZCNT64rr */ |
| 69535 | 5091, |
| 69536 | /* LZCNT64rr_EVEX */ |
| 69537 | 5093, |
| 69538 | /* LZCNT64rr_NF */ |
| 69539 | 5095, |
| 69540 | /* MASKMOVDQU */ |
| 69541 | 5097, |
| 69542 | /* MASKMOVDQU64 */ |
| 69543 | 5099, |
| 69544 | /* MASKPAIR16LOAD */ |
| 69545 | 5101, |
| 69546 | /* MASKPAIR16STORE */ |
| 69547 | 5103, |
| 69548 | /* MAXCPDrm */ |
| 69549 | 5105, |
| 69550 | /* MAXCPDrr */ |
| 69551 | 5108, |
| 69552 | /* MAXCPSrm */ |
| 69553 | 5111, |
| 69554 | /* MAXCPSrr */ |
| 69555 | 5114, |
| 69556 | /* MAXCSDrm */ |
| 69557 | 5117, |
| 69558 | /* MAXCSDrr */ |
| 69559 | 5120, |
| 69560 | /* MAXCSSrm */ |
| 69561 | 5123, |
| 69562 | /* MAXCSSrr */ |
| 69563 | 5126, |
| 69564 | /* MAXPDrm */ |
| 69565 | 5129, |
| 69566 | /* MAXPDrr */ |
| 69567 | 5132, |
| 69568 | /* MAXPSrm */ |
| 69569 | 5135, |
| 69570 | /* MAXPSrr */ |
| 69571 | 5138, |
| 69572 | /* MAXSDrm */ |
| 69573 | 5141, |
| 69574 | /* MAXSDrm_Int */ |
| 69575 | 5144, |
| 69576 | /* MAXSDrr */ |
| 69577 | 5147, |
| 69578 | /* MAXSDrr_Int */ |
| 69579 | 5150, |
| 69580 | /* MAXSSrm */ |
| 69581 | 5153, |
| 69582 | /* MAXSSrm_Int */ |
| 69583 | 5156, |
| 69584 | /* MAXSSrr */ |
| 69585 | 5159, |
| 69586 | /* MAXSSrr_Int */ |
| 69587 | 5162, |
| 69588 | /* MFENCE */ |
| 69589 | 5165, |
| 69590 | /* MINCPDrm */ |
| 69591 | 5165, |
| 69592 | /* MINCPDrr */ |
| 69593 | 5168, |
| 69594 | /* MINCPSrm */ |
| 69595 | 5171, |
| 69596 | /* MINCPSrr */ |
| 69597 | 5174, |
| 69598 | /* MINCSDrm */ |
| 69599 | 5177, |
| 69600 | /* MINCSDrr */ |
| 69601 | 5180, |
| 69602 | /* MINCSSrm */ |
| 69603 | 5183, |
| 69604 | /* MINCSSrr */ |
| 69605 | 5186, |
| 69606 | /* MINPDrm */ |
| 69607 | 5189, |
| 69608 | /* MINPDrr */ |
| 69609 | 5192, |
| 69610 | /* MINPSrm */ |
| 69611 | 5195, |
| 69612 | /* MINPSrr */ |
| 69613 | 5198, |
| 69614 | /* MINSDrm */ |
| 69615 | 5201, |
| 69616 | /* MINSDrm_Int */ |
| 69617 | 5204, |
| 69618 | /* MINSDrr */ |
| 69619 | 5207, |
| 69620 | /* MINSDrr_Int */ |
| 69621 | 5210, |
| 69622 | /* MINSSrm */ |
| 69623 | 5213, |
| 69624 | /* MINSSrm_Int */ |
| 69625 | 5216, |
| 69626 | /* MINSSrr */ |
| 69627 | 5219, |
| 69628 | /* MINSSrr_Int */ |
| 69629 | 5222, |
| 69630 | /* MMX_CVTPD2PIrm */ |
| 69631 | 5225, |
| 69632 | /* MMX_CVTPD2PIrr */ |
| 69633 | 5227, |
| 69634 | /* MMX_CVTPI2PDrm */ |
| 69635 | 5229, |
| 69636 | /* MMX_CVTPI2PDrr */ |
| 69637 | 5231, |
| 69638 | /* MMX_CVTPI2PSrm */ |
| 69639 | 5233, |
| 69640 | /* MMX_CVTPI2PSrr */ |
| 69641 | 5236, |
| 69642 | /* MMX_CVTPS2PIrm */ |
| 69643 | 5239, |
| 69644 | /* MMX_CVTPS2PIrr */ |
| 69645 | 5241, |
| 69646 | /* MMX_CVTTPD2PIrm */ |
| 69647 | 5243, |
| 69648 | /* MMX_CVTTPD2PIrr */ |
| 69649 | 5245, |
| 69650 | /* MMX_CVTTPS2PIrm */ |
| 69651 | 5247, |
| 69652 | /* MMX_CVTTPS2PIrr */ |
| 69653 | 5249, |
| 69654 | /* MMX_EMMS */ |
| 69655 | 5251, |
| 69656 | /* MMX_MASKMOVQ */ |
| 69657 | 5251, |
| 69658 | /* MMX_MASKMOVQ64 */ |
| 69659 | 5253, |
| 69660 | /* MMX_MOVD64from64mr */ |
| 69661 | 5255, |
| 69662 | /* MMX_MOVD64from64rr */ |
| 69663 | 5257, |
| 69664 | /* MMX_MOVD64grr */ |
| 69665 | 5259, |
| 69666 | /* MMX_MOVD64mr */ |
| 69667 | 5261, |
| 69668 | /* MMX_MOVD64rm */ |
| 69669 | 5263, |
| 69670 | /* MMX_MOVD64rr */ |
| 69671 | 5265, |
| 69672 | /* MMX_MOVD64to64rm */ |
| 69673 | 5267, |
| 69674 | /* MMX_MOVD64to64rr */ |
| 69675 | 5269, |
| 69676 | /* MMX_MOVDQ2Qrr */ |
| 69677 | 5271, |
| 69678 | /* MMX_MOVFR642Qrr */ |
| 69679 | 5273, |
| 69680 | /* MMX_MOVNTQmr */ |
| 69681 | 5275, |
| 69682 | /* MMX_MOVQ2DQrr */ |
| 69683 | 5277, |
| 69684 | /* MMX_MOVQ2FR64rr */ |
| 69685 | 5279, |
| 69686 | /* MMX_MOVQ64mr */ |
| 69687 | 5281, |
| 69688 | /* MMX_MOVQ64rm */ |
| 69689 | 5283, |
| 69690 | /* MMX_MOVQ64rr */ |
| 69691 | 5285, |
| 69692 | /* MMX_MOVQ64rr_REV */ |
| 69693 | 5287, |
| 69694 | /* MMX_PABSBrm */ |
| 69695 | 5289, |
| 69696 | /* MMX_PABSBrr */ |
| 69697 | 5291, |
| 69698 | /* MMX_PABSDrm */ |
| 69699 | 5293, |
| 69700 | /* MMX_PABSDrr */ |
| 69701 | 5295, |
| 69702 | /* MMX_PABSWrm */ |
| 69703 | 5297, |
| 69704 | /* MMX_PABSWrr */ |
| 69705 | 5299, |
| 69706 | /* MMX_PACKSSDWrm */ |
| 69707 | 5301, |
| 69708 | /* MMX_PACKSSDWrr */ |
| 69709 | 5304, |
| 69710 | /* MMX_PACKSSWBrm */ |
| 69711 | 5307, |
| 69712 | /* MMX_PACKSSWBrr */ |
| 69713 | 5310, |
| 69714 | /* MMX_PACKUSWBrm */ |
| 69715 | 5313, |
| 69716 | /* MMX_PACKUSWBrr */ |
| 69717 | 5316, |
| 69718 | /* MMX_PADDBrm */ |
| 69719 | 5319, |
| 69720 | /* MMX_PADDBrr */ |
| 69721 | 5322, |
| 69722 | /* MMX_PADDDrm */ |
| 69723 | 5325, |
| 69724 | /* MMX_PADDDrr */ |
| 69725 | 5328, |
| 69726 | /* MMX_PADDQrm */ |
| 69727 | 5331, |
| 69728 | /* MMX_PADDQrr */ |
| 69729 | 5334, |
| 69730 | /* MMX_PADDSBrm */ |
| 69731 | 5337, |
| 69732 | /* MMX_PADDSBrr */ |
| 69733 | 5340, |
| 69734 | /* MMX_PADDSWrm */ |
| 69735 | 5343, |
| 69736 | /* MMX_PADDSWrr */ |
| 69737 | 5346, |
| 69738 | /* MMX_PADDUSBrm */ |
| 69739 | 5349, |
| 69740 | /* MMX_PADDUSBrr */ |
| 69741 | 5352, |
| 69742 | /* MMX_PADDUSWrm */ |
| 69743 | 5355, |
| 69744 | /* MMX_PADDUSWrr */ |
| 69745 | 5358, |
| 69746 | /* MMX_PADDWrm */ |
| 69747 | 5361, |
| 69748 | /* MMX_PADDWrr */ |
| 69749 | 5364, |
| 69750 | /* MMX_PALIGNRrmi */ |
| 69751 | 5367, |
| 69752 | /* MMX_PALIGNRrri */ |
| 69753 | 5371, |
| 69754 | /* MMX_PANDNrm */ |
| 69755 | 5375, |
| 69756 | /* MMX_PANDNrr */ |
| 69757 | 5378, |
| 69758 | /* MMX_PANDrm */ |
| 69759 | 5381, |
| 69760 | /* MMX_PANDrr */ |
| 69761 | 5384, |
| 69762 | /* MMX_PAVGBrm */ |
| 69763 | 5387, |
| 69764 | /* MMX_PAVGBrr */ |
| 69765 | 5390, |
| 69766 | /* MMX_PAVGWrm */ |
| 69767 | 5393, |
| 69768 | /* MMX_PAVGWrr */ |
| 69769 | 5396, |
| 69770 | /* MMX_PCMPEQBrm */ |
| 69771 | 5399, |
| 69772 | /* MMX_PCMPEQBrr */ |
| 69773 | 5402, |
| 69774 | /* MMX_PCMPEQDrm */ |
| 69775 | 5405, |
| 69776 | /* MMX_PCMPEQDrr */ |
| 69777 | 5408, |
| 69778 | /* MMX_PCMPEQWrm */ |
| 69779 | 5411, |
| 69780 | /* MMX_PCMPEQWrr */ |
| 69781 | 5414, |
| 69782 | /* MMX_PCMPGTBrm */ |
| 69783 | 5417, |
| 69784 | /* MMX_PCMPGTBrr */ |
| 69785 | 5420, |
| 69786 | /* MMX_PCMPGTDrm */ |
| 69787 | 5423, |
| 69788 | /* MMX_PCMPGTDrr */ |
| 69789 | 5426, |
| 69790 | /* MMX_PCMPGTWrm */ |
| 69791 | 5429, |
| 69792 | /* MMX_PCMPGTWrr */ |
| 69793 | 5432, |
| 69794 | /* MMX_PEXTRWrr */ |
| 69795 | 5435, |
| 69796 | /* MMX_PHADDDrm */ |
| 69797 | 5438, |
| 69798 | /* MMX_PHADDDrr */ |
| 69799 | 5441, |
| 69800 | /* MMX_PHADDSWrm */ |
| 69801 | 5444, |
| 69802 | /* MMX_PHADDSWrr */ |
| 69803 | 5447, |
| 69804 | /* MMX_PHADDWrm */ |
| 69805 | 5450, |
| 69806 | /* MMX_PHADDWrr */ |
| 69807 | 5453, |
| 69808 | /* MMX_PHSUBDrm */ |
| 69809 | 5456, |
| 69810 | /* MMX_PHSUBDrr */ |
| 69811 | 5459, |
| 69812 | /* MMX_PHSUBSWrm */ |
| 69813 | 5462, |
| 69814 | /* MMX_PHSUBSWrr */ |
| 69815 | 5465, |
| 69816 | /* MMX_PHSUBWrm */ |
| 69817 | 5468, |
| 69818 | /* MMX_PHSUBWrr */ |
| 69819 | 5471, |
| 69820 | /* MMX_PINSRWrm */ |
| 69821 | 5474, |
| 69822 | /* MMX_PINSRWrr */ |
| 69823 | 5478, |
| 69824 | /* MMX_PMADDUBSWrm */ |
| 69825 | 5482, |
| 69826 | /* MMX_PMADDUBSWrr */ |
| 69827 | 5485, |
| 69828 | /* MMX_PMADDWDrm */ |
| 69829 | 5488, |
| 69830 | /* MMX_PMADDWDrr */ |
| 69831 | 5491, |
| 69832 | /* MMX_PMAXSWrm */ |
| 69833 | 5494, |
| 69834 | /* MMX_PMAXSWrr */ |
| 69835 | 5497, |
| 69836 | /* MMX_PMAXUBrm */ |
| 69837 | 5500, |
| 69838 | /* MMX_PMAXUBrr */ |
| 69839 | 5503, |
| 69840 | /* MMX_PMINSWrm */ |
| 69841 | 5506, |
| 69842 | /* MMX_PMINSWrr */ |
| 69843 | 5509, |
| 69844 | /* MMX_PMINUBrm */ |
| 69845 | 5512, |
| 69846 | /* MMX_PMINUBrr */ |
| 69847 | 5515, |
| 69848 | /* MMX_PMOVMSKBrr */ |
| 69849 | 5518, |
| 69850 | /* MMX_PMULHRSWrm */ |
| 69851 | 5520, |
| 69852 | /* MMX_PMULHRSWrr */ |
| 69853 | 5523, |
| 69854 | /* MMX_PMULHUWrm */ |
| 69855 | 5526, |
| 69856 | /* MMX_PMULHUWrr */ |
| 69857 | 5529, |
| 69858 | /* MMX_PMULHWrm */ |
| 69859 | 5532, |
| 69860 | /* MMX_PMULHWrr */ |
| 69861 | 5535, |
| 69862 | /* MMX_PMULLWrm */ |
| 69863 | 5538, |
| 69864 | /* MMX_PMULLWrr */ |
| 69865 | 5541, |
| 69866 | /* MMX_PMULUDQrm */ |
| 69867 | 5544, |
| 69868 | /* MMX_PMULUDQrr */ |
| 69869 | 5547, |
| 69870 | /* MMX_PORrm */ |
| 69871 | 5550, |
| 69872 | /* MMX_PORrr */ |
| 69873 | 5553, |
| 69874 | /* MMX_PSADBWrm */ |
| 69875 | 5556, |
| 69876 | /* MMX_PSADBWrr */ |
| 69877 | 5559, |
| 69878 | /* MMX_PSHUFBrm */ |
| 69879 | 5562, |
| 69880 | /* MMX_PSHUFBrr */ |
| 69881 | 5565, |
| 69882 | /* MMX_PSHUFWmi */ |
| 69883 | 5568, |
| 69884 | /* MMX_PSHUFWri */ |
| 69885 | 5571, |
| 69886 | /* MMX_PSIGNBrm */ |
| 69887 | 5574, |
| 69888 | /* MMX_PSIGNBrr */ |
| 69889 | 5577, |
| 69890 | /* MMX_PSIGNDrm */ |
| 69891 | 5580, |
| 69892 | /* MMX_PSIGNDrr */ |
| 69893 | 5583, |
| 69894 | /* MMX_PSIGNWrm */ |
| 69895 | 5586, |
| 69896 | /* MMX_PSIGNWrr */ |
| 69897 | 5589, |
| 69898 | /* MMX_PSLLDri */ |
| 69899 | 5592, |
| 69900 | /* MMX_PSLLDrm */ |
| 69901 | 5595, |
| 69902 | /* MMX_PSLLDrr */ |
| 69903 | 5598, |
| 69904 | /* MMX_PSLLQri */ |
| 69905 | 5601, |
| 69906 | /* MMX_PSLLQrm */ |
| 69907 | 5604, |
| 69908 | /* MMX_PSLLQrr */ |
| 69909 | 5607, |
| 69910 | /* MMX_PSLLWri */ |
| 69911 | 5610, |
| 69912 | /* MMX_PSLLWrm */ |
| 69913 | 5613, |
| 69914 | /* MMX_PSLLWrr */ |
| 69915 | 5616, |
| 69916 | /* MMX_PSRADri */ |
| 69917 | 5619, |
| 69918 | /* MMX_PSRADrm */ |
| 69919 | 5622, |
| 69920 | /* MMX_PSRADrr */ |
| 69921 | 5625, |
| 69922 | /* MMX_PSRAWri */ |
| 69923 | 5628, |
| 69924 | /* MMX_PSRAWrm */ |
| 69925 | 5631, |
| 69926 | /* MMX_PSRAWrr */ |
| 69927 | 5634, |
| 69928 | /* MMX_PSRLDri */ |
| 69929 | 5637, |
| 69930 | /* MMX_PSRLDrm */ |
| 69931 | 5640, |
| 69932 | /* MMX_PSRLDrr */ |
| 69933 | 5643, |
| 69934 | /* MMX_PSRLQri */ |
| 69935 | 5646, |
| 69936 | /* MMX_PSRLQrm */ |
| 69937 | 5649, |
| 69938 | /* MMX_PSRLQrr */ |
| 69939 | 5652, |
| 69940 | /* MMX_PSRLWri */ |
| 69941 | 5655, |
| 69942 | /* MMX_PSRLWrm */ |
| 69943 | 5658, |
| 69944 | /* MMX_PSRLWrr */ |
| 69945 | 5661, |
| 69946 | /* MMX_PSUBBrm */ |
| 69947 | 5664, |
| 69948 | /* MMX_PSUBBrr */ |
| 69949 | 5667, |
| 69950 | /* MMX_PSUBDrm */ |
| 69951 | 5670, |
| 69952 | /* MMX_PSUBDrr */ |
| 69953 | 5673, |
| 69954 | /* MMX_PSUBQrm */ |
| 69955 | 5676, |
| 69956 | /* MMX_PSUBQrr */ |
| 69957 | 5679, |
| 69958 | /* MMX_PSUBSBrm */ |
| 69959 | 5682, |
| 69960 | /* MMX_PSUBSBrr */ |
| 69961 | 5685, |
| 69962 | /* MMX_PSUBSWrm */ |
| 69963 | 5688, |
| 69964 | /* MMX_PSUBSWrr */ |
| 69965 | 5691, |
| 69966 | /* MMX_PSUBUSBrm */ |
| 69967 | 5694, |
| 69968 | /* MMX_PSUBUSBrr */ |
| 69969 | 5697, |
| 69970 | /* MMX_PSUBUSWrm */ |
| 69971 | 5700, |
| 69972 | /* MMX_PSUBUSWrr */ |
| 69973 | 5703, |
| 69974 | /* MMX_PSUBWrm */ |
| 69975 | 5706, |
| 69976 | /* MMX_PSUBWrr */ |
| 69977 | 5709, |
| 69978 | /* MMX_PUNPCKHBWrm */ |
| 69979 | 5712, |
| 69980 | /* MMX_PUNPCKHBWrr */ |
| 69981 | 5715, |
| 69982 | /* MMX_PUNPCKHDQrm */ |
| 69983 | 5718, |
| 69984 | /* MMX_PUNPCKHDQrr */ |
| 69985 | 5721, |
| 69986 | /* MMX_PUNPCKHWDrm */ |
| 69987 | 5724, |
| 69988 | /* MMX_PUNPCKHWDrr */ |
| 69989 | 5727, |
| 69990 | /* MMX_PUNPCKLBWrm */ |
| 69991 | 5730, |
| 69992 | /* MMX_PUNPCKLBWrr */ |
| 69993 | 5733, |
| 69994 | /* MMX_PUNPCKLDQrm */ |
| 69995 | 5736, |
| 69996 | /* MMX_PUNPCKLDQrr */ |
| 69997 | 5739, |
| 69998 | /* MMX_PUNPCKLWDrm */ |
| 69999 | 5742, |
| 70000 | /* MMX_PUNPCKLWDrr */ |
| 70001 | 5745, |
| 70002 | /* MMX_PXORrm */ |
| 70003 | 5748, |
| 70004 | /* MMX_PXORrr */ |
| 70005 | 5751, |
| 70006 | /* MONITOR32rrr */ |
| 70007 | 5754, |
| 70008 | /* MONITOR64rrr */ |
| 70009 | 5754, |
| 70010 | /* MONITORX32rrr */ |
| 70011 | 5754, |
| 70012 | /* MONITORX64rrr */ |
| 70013 | 5754, |
| 70014 | /* MONTMUL */ |
| 70015 | 5754, |
| 70016 | /* MOV16ao16 */ |
| 70017 | 5754, |
| 70018 | /* MOV16ao32 */ |
| 70019 | 5755, |
| 70020 | /* MOV16ao64 */ |
| 70021 | 5756, |
| 70022 | /* MOV16mi */ |
| 70023 | 5757, |
| 70024 | /* MOV16mr */ |
| 70025 | 5759, |
| 70026 | /* MOV16ms */ |
| 70027 | 5761, |
| 70028 | /* MOV16o16a */ |
| 70029 | 5763, |
| 70030 | /* MOV16o32a */ |
| 70031 | 5764, |
| 70032 | /* MOV16o64a */ |
| 70033 | 5765, |
| 70034 | /* MOV16ri */ |
| 70035 | 5766, |
| 70036 | /* MOV16ri_alt */ |
| 70037 | 5768, |
| 70038 | /* MOV16rm */ |
| 70039 | 5770, |
| 70040 | /* MOV16rr */ |
| 70041 | 5772, |
| 70042 | /* MOV16rr_REV */ |
| 70043 | 5774, |
| 70044 | /* MOV16rs */ |
| 70045 | 5776, |
| 70046 | /* MOV16sm */ |
| 70047 | 5778, |
| 70048 | /* MOV16sr */ |
| 70049 | 5780, |
| 70050 | /* MOV32ao16 */ |
| 70051 | 5782, |
| 70052 | /* MOV32ao32 */ |
| 70053 | 5783, |
| 70054 | /* MOV32ao64 */ |
| 70055 | 5784, |
| 70056 | /* MOV32cr */ |
| 70057 | 5785, |
| 70058 | /* MOV32dr */ |
| 70059 | 5787, |
| 70060 | /* MOV32mi */ |
| 70061 | 5789, |
| 70062 | /* MOV32mr */ |
| 70063 | 5791, |
| 70064 | /* MOV32o16a */ |
| 70065 | 5793, |
| 70066 | /* MOV32o32a */ |
| 70067 | 5794, |
| 70068 | /* MOV32o64a */ |
| 70069 | 5795, |
| 70070 | /* MOV32rc */ |
| 70071 | 5796, |
| 70072 | /* MOV32rd */ |
| 70073 | 5798, |
| 70074 | /* MOV32ri */ |
| 70075 | 5800, |
| 70076 | /* MOV32ri_alt */ |
| 70077 | 5802, |
| 70078 | /* MOV32rm */ |
| 70079 | 5804, |
| 70080 | /* MOV32rr */ |
| 70081 | 5806, |
| 70082 | /* MOV32rr_REV */ |
| 70083 | 5808, |
| 70084 | /* MOV32rs */ |
| 70085 | 5810, |
| 70086 | /* MOV32sr */ |
| 70087 | 5812, |
| 70088 | /* MOV64ao32 */ |
| 70089 | 5814, |
| 70090 | /* MOV64ao64 */ |
| 70091 | 5815, |
| 70092 | /* MOV64cr */ |
| 70093 | 5816, |
| 70094 | /* MOV64dr */ |
| 70095 | 5818, |
| 70096 | /* MOV64mi32 */ |
| 70097 | 5820, |
| 70098 | /* MOV64mr */ |
| 70099 | 5822, |
| 70100 | /* MOV64o32a */ |
| 70101 | 5824, |
| 70102 | /* MOV64o64a */ |
| 70103 | 5825, |
| 70104 | /* MOV64rc */ |
| 70105 | 5826, |
| 70106 | /* MOV64rd */ |
| 70107 | 5828, |
| 70108 | /* MOV64ri */ |
| 70109 | 5830, |
| 70110 | /* MOV64ri32 */ |
| 70111 | 5832, |
| 70112 | /* MOV64rm */ |
| 70113 | 5834, |
| 70114 | /* MOV64rr */ |
| 70115 | 5836, |
| 70116 | /* MOV64rr_REV */ |
| 70117 | 5838, |
| 70118 | /* MOV64rs */ |
| 70119 | 5840, |
| 70120 | /* MOV64sr */ |
| 70121 | 5842, |
| 70122 | /* MOV64toPQIrm */ |
| 70123 | 5844, |
| 70124 | /* MOV64toPQIrr */ |
| 70125 | 5846, |
| 70126 | /* MOV64toSDrr */ |
| 70127 | 5848, |
| 70128 | /* MOV8ao16 */ |
| 70129 | 5850, |
| 70130 | /* MOV8ao32 */ |
| 70131 | 5851, |
| 70132 | /* MOV8ao64 */ |
| 70133 | 5852, |
| 70134 | /* MOV8mi */ |
| 70135 | 5853, |
| 70136 | /* MOV8mr */ |
| 70137 | 5855, |
| 70138 | /* MOV8mr_NOREX */ |
| 70139 | 5857, |
| 70140 | /* MOV8o16a */ |
| 70141 | 5859, |
| 70142 | /* MOV8o32a */ |
| 70143 | 5860, |
| 70144 | /* MOV8o64a */ |
| 70145 | 5861, |
| 70146 | /* MOV8ri */ |
| 70147 | 5862, |
| 70148 | /* MOV8ri_alt */ |
| 70149 | 5864, |
| 70150 | /* MOV8rm */ |
| 70151 | 5866, |
| 70152 | /* MOV8rm_NOREX */ |
| 70153 | 5868, |
| 70154 | /* MOV8rr */ |
| 70155 | 5870, |
| 70156 | /* MOV8rr_NOREX */ |
| 70157 | 5872, |
| 70158 | /* MOV8rr_REV */ |
| 70159 | 5874, |
| 70160 | /* MOVAPDmr */ |
| 70161 | 5876, |
| 70162 | /* MOVAPDrm */ |
| 70163 | 5878, |
| 70164 | /* MOVAPDrr */ |
| 70165 | 5880, |
| 70166 | /* MOVAPDrr_REV */ |
| 70167 | 5882, |
| 70168 | /* MOVAPSmr */ |
| 70169 | 5884, |
| 70170 | /* MOVAPSrm */ |
| 70171 | 5886, |
| 70172 | /* MOVAPSrr */ |
| 70173 | 5888, |
| 70174 | /* MOVAPSrr_REV */ |
| 70175 | 5890, |
| 70176 | /* MOVBE16mr */ |
| 70177 | 5892, |
| 70178 | /* MOVBE16mr_EVEX */ |
| 70179 | 5894, |
| 70180 | /* MOVBE16rm */ |
| 70181 | 5896, |
| 70182 | /* MOVBE16rm_EVEX */ |
| 70183 | 5898, |
| 70184 | /* MOVBE16rr */ |
| 70185 | 5900, |
| 70186 | /* MOVBE16rr_REV */ |
| 70187 | 5902, |
| 70188 | /* MOVBE32mr */ |
| 70189 | 5904, |
| 70190 | /* MOVBE32mr_EVEX */ |
| 70191 | 5906, |
| 70192 | /* MOVBE32rm */ |
| 70193 | 5908, |
| 70194 | /* MOVBE32rm_EVEX */ |
| 70195 | 5910, |
| 70196 | /* MOVBE32rr */ |
| 70197 | 5912, |
| 70198 | /* MOVBE32rr_REV */ |
| 70199 | 5914, |
| 70200 | /* MOVBE64mr */ |
| 70201 | 5916, |
| 70202 | /* MOVBE64mr_EVEX */ |
| 70203 | 5918, |
| 70204 | /* MOVBE64rm */ |
| 70205 | 5920, |
| 70206 | /* MOVBE64rm_EVEX */ |
| 70207 | 5922, |
| 70208 | /* MOVBE64rr */ |
| 70209 | 5924, |
| 70210 | /* MOVBE64rr_REV */ |
| 70211 | 5926, |
| 70212 | /* MOVDDUPrm */ |
| 70213 | 5928, |
| 70214 | /* MOVDDUPrr */ |
| 70215 | 5930, |
| 70216 | /* MOVDI2PDIrm */ |
| 70217 | 5932, |
| 70218 | /* MOVDI2PDIrr */ |
| 70219 | 5934, |
| 70220 | /* MOVDI2SSrr */ |
| 70221 | 5936, |
| 70222 | /* MOVDIR64B16 */ |
| 70223 | 5938, |
| 70224 | /* MOVDIR64B32 */ |
| 70225 | 5940, |
| 70226 | /* MOVDIR64B32_EVEX */ |
| 70227 | 5942, |
| 70228 | /* MOVDIR64B64 */ |
| 70229 | 5944, |
| 70230 | /* MOVDIR64B64_EVEX */ |
| 70231 | 5946, |
| 70232 | /* MOVDIRI32 */ |
| 70233 | 5948, |
| 70234 | /* MOVDIRI32_EVEX */ |
| 70235 | 5950, |
| 70236 | /* MOVDIRI64 */ |
| 70237 | 5952, |
| 70238 | /* MOVDIRI64_EVEX */ |
| 70239 | 5954, |
| 70240 | /* MOVDQAmr */ |
| 70241 | 5956, |
| 70242 | /* MOVDQArm */ |
| 70243 | 5958, |
| 70244 | /* MOVDQArr */ |
| 70245 | 5960, |
| 70246 | /* MOVDQArr_REV */ |
| 70247 | 5962, |
| 70248 | /* MOVDQUmr */ |
| 70249 | 5964, |
| 70250 | /* MOVDQUrm */ |
| 70251 | 5966, |
| 70252 | /* MOVDQUrr */ |
| 70253 | 5968, |
| 70254 | /* MOVDQUrr_REV */ |
| 70255 | 5970, |
| 70256 | /* MOVHLPSrr */ |
| 70257 | 5972, |
| 70258 | /* MOVHPDmr */ |
| 70259 | 5975, |
| 70260 | /* MOVHPDrm */ |
| 70261 | 5977, |
| 70262 | /* MOVHPSmr */ |
| 70263 | 5980, |
| 70264 | /* MOVHPSrm */ |
| 70265 | 5982, |
| 70266 | /* MOVLHPSrr */ |
| 70267 | 5985, |
| 70268 | /* MOVLPDmr */ |
| 70269 | 5988, |
| 70270 | /* MOVLPDrm */ |
| 70271 | 5990, |
| 70272 | /* MOVLPSmr */ |
| 70273 | 5993, |
| 70274 | /* MOVLPSrm */ |
| 70275 | 5995, |
| 70276 | /* MOVMSKPDrr */ |
| 70277 | 5998, |
| 70278 | /* MOVMSKPSrr */ |
| 70279 | 6000, |
| 70280 | /* MOVNTDQArm */ |
| 70281 | 6002, |
| 70282 | /* MOVNTDQmr */ |
| 70283 | 6004, |
| 70284 | /* MOVNTI_64mr */ |
| 70285 | 6006, |
| 70286 | /* MOVNTImr */ |
| 70287 | 6008, |
| 70288 | /* MOVNTPDmr */ |
| 70289 | 6010, |
| 70290 | /* MOVNTPSmr */ |
| 70291 | 6012, |
| 70292 | /* MOVNTSD */ |
| 70293 | 6014, |
| 70294 | /* MOVNTSS */ |
| 70295 | 6016, |
| 70296 | /* MOVPC32r */ |
| 70297 | 6018, |
| 70298 | /* MOVPDI2DImr */ |
| 70299 | 6020, |
| 70300 | /* MOVPDI2DIrr */ |
| 70301 | 6022, |
| 70302 | /* MOVPQI2QImr */ |
| 70303 | 6024, |
| 70304 | /* MOVPQI2QIrr */ |
| 70305 | 6026, |
| 70306 | /* MOVPQIto64mr */ |
| 70307 | 6028, |
| 70308 | /* MOVPQIto64rr */ |
| 70309 | 6030, |
| 70310 | /* MOVQI2PQIrm */ |
| 70311 | 6032, |
| 70312 | /* MOVSB */ |
| 70313 | 6034, |
| 70314 | /* MOVSDmr */ |
| 70315 | 6036, |
| 70316 | /* MOVSDrm */ |
| 70317 | 6038, |
| 70318 | /* MOVSDrm_alt */ |
| 70319 | 6040, |
| 70320 | /* MOVSDrr */ |
| 70321 | 6042, |
| 70322 | /* MOVSDrr_REV */ |
| 70323 | 6045, |
| 70324 | /* MOVSDto64rr */ |
| 70325 | 6048, |
| 70326 | /* MOVSHDUPrm */ |
| 70327 | 6050, |
| 70328 | /* MOVSHDUPrr */ |
| 70329 | 6052, |
| 70330 | /* MOVSL */ |
| 70331 | 6054, |
| 70332 | /* MOVSLDUPrm */ |
| 70333 | 6056, |
| 70334 | /* MOVSLDUPrr */ |
| 70335 | 6058, |
| 70336 | /* MOVSQ */ |
| 70337 | 6060, |
| 70338 | /* MOVSS2DIrr */ |
| 70339 | 6062, |
| 70340 | /* MOVSSmr */ |
| 70341 | 6064, |
| 70342 | /* MOVSSrm */ |
| 70343 | 6066, |
| 70344 | /* MOVSSrm_alt */ |
| 70345 | 6068, |
| 70346 | /* MOVSSrr */ |
| 70347 | 6070, |
| 70348 | /* MOVSSrr_REV */ |
| 70349 | 6073, |
| 70350 | /* MOVSW */ |
| 70351 | 6076, |
| 70352 | /* MOVSX16rm16 */ |
| 70353 | 6078, |
| 70354 | /* MOVSX16rm32 */ |
| 70355 | 6080, |
| 70356 | /* MOVSX16rm8 */ |
| 70357 | 6082, |
| 70358 | /* MOVSX16rr16 */ |
| 70359 | 6084, |
| 70360 | /* MOVSX16rr32 */ |
| 70361 | 6086, |
| 70362 | /* MOVSX16rr8 */ |
| 70363 | 6088, |
| 70364 | /* MOVSX32rm16 */ |
| 70365 | 6090, |
| 70366 | /* MOVSX32rm32 */ |
| 70367 | 6092, |
| 70368 | /* MOVSX32rm8 */ |
| 70369 | 6094, |
| 70370 | /* MOVSX32rm8_NOREX */ |
| 70371 | 6096, |
| 70372 | /* MOVSX32rr16 */ |
| 70373 | 6098, |
| 70374 | /* MOVSX32rr32 */ |
| 70375 | 6100, |
| 70376 | /* MOVSX32rr8 */ |
| 70377 | 6102, |
| 70378 | /* MOVSX32rr8_NOREX */ |
| 70379 | 6104, |
| 70380 | /* MOVSX64rm16 */ |
| 70381 | 6106, |
| 70382 | /* MOVSX64rm32 */ |
| 70383 | 6108, |
| 70384 | /* MOVSX64rm8 */ |
| 70385 | 6110, |
| 70386 | /* MOVSX64rr16 */ |
| 70387 | 6112, |
| 70388 | /* MOVSX64rr32 */ |
| 70389 | 6114, |
| 70390 | /* MOVSX64rr8 */ |
| 70391 | 6116, |
| 70392 | /* MOVUPDmr */ |
| 70393 | 6118, |
| 70394 | /* MOVUPDrm */ |
| 70395 | 6120, |
| 70396 | /* MOVUPDrr */ |
| 70397 | 6122, |
| 70398 | /* MOVUPDrr_REV */ |
| 70399 | 6124, |
| 70400 | /* MOVUPSmr */ |
| 70401 | 6126, |
| 70402 | /* MOVUPSrm */ |
| 70403 | 6128, |
| 70404 | /* MOVUPSrr */ |
| 70405 | 6130, |
| 70406 | /* MOVUPSrr_REV */ |
| 70407 | 6132, |
| 70408 | /* MOVZPQILo2PQIrr */ |
| 70409 | 6134, |
| 70410 | /* MOVZX16rm16 */ |
| 70411 | 6136, |
| 70412 | /* MOVZX16rm8 */ |
| 70413 | 6138, |
| 70414 | /* MOVZX16rr16 */ |
| 70415 | 6140, |
| 70416 | /* MOVZX16rr8 */ |
| 70417 | 6142, |
| 70418 | /* MOVZX32rm16 */ |
| 70419 | 6144, |
| 70420 | /* MOVZX32rm8 */ |
| 70421 | 6146, |
| 70422 | /* MOVZX32rm8_NOREX */ |
| 70423 | 6148, |
| 70424 | /* MOVZX32rr16 */ |
| 70425 | 6150, |
| 70426 | /* MOVZX32rr8 */ |
| 70427 | 6152, |
| 70428 | /* MOVZX32rr8_NOREX */ |
| 70429 | 6154, |
| 70430 | /* MOVZX64rm16 */ |
| 70431 | 6156, |
| 70432 | /* MOVZX64rm8 */ |
| 70433 | 6158, |
| 70434 | /* MOVZX64rr16 */ |
| 70435 | 6160, |
| 70436 | /* MOVZX64rr8 */ |
| 70437 | 6162, |
| 70438 | /* MPSADBWrmi */ |
| 70439 | 6164, |
| 70440 | /* MPSADBWrri */ |
| 70441 | 6168, |
| 70442 | /* MUL16m */ |
| 70443 | 6172, |
| 70444 | /* MUL16m_EVEX */ |
| 70445 | 6173, |
| 70446 | /* MUL16m_NF */ |
| 70447 | 6174, |
| 70448 | /* MUL16r */ |
| 70449 | 6175, |
| 70450 | /* MUL16r_EVEX */ |
| 70451 | 6176, |
| 70452 | /* MUL16r_NF */ |
| 70453 | 6177, |
| 70454 | /* MUL32m */ |
| 70455 | 6178, |
| 70456 | /* MUL32m_EVEX */ |
| 70457 | 6179, |
| 70458 | /* MUL32m_NF */ |
| 70459 | 6180, |
| 70460 | /* MUL32r */ |
| 70461 | 6181, |
| 70462 | /* MUL32r_EVEX */ |
| 70463 | 6182, |
| 70464 | /* MUL32r_NF */ |
| 70465 | 6183, |
| 70466 | /* MUL64m */ |
| 70467 | 6184, |
| 70468 | /* MUL64m_EVEX */ |
| 70469 | 6185, |
| 70470 | /* MUL64m_NF */ |
| 70471 | 6186, |
| 70472 | /* MUL64r */ |
| 70473 | 6187, |
| 70474 | /* MUL64r_EVEX */ |
| 70475 | 6188, |
| 70476 | /* MUL64r_NF */ |
| 70477 | 6189, |
| 70478 | /* MUL8m */ |
| 70479 | 6190, |
| 70480 | /* MUL8m_EVEX */ |
| 70481 | 6191, |
| 70482 | /* MUL8m_NF */ |
| 70483 | 6192, |
| 70484 | /* MUL8r */ |
| 70485 | 6193, |
| 70486 | /* MUL8r_EVEX */ |
| 70487 | 6194, |
| 70488 | /* MUL8r_NF */ |
| 70489 | 6195, |
| 70490 | /* MULPDrm */ |
| 70491 | 6196, |
| 70492 | /* MULPDrr */ |
| 70493 | 6199, |
| 70494 | /* MULPSrm */ |
| 70495 | 6202, |
| 70496 | /* MULPSrr */ |
| 70497 | 6205, |
| 70498 | /* MULSDrm */ |
| 70499 | 6208, |
| 70500 | /* MULSDrm_Int */ |
| 70501 | 6211, |
| 70502 | /* MULSDrr */ |
| 70503 | 6214, |
| 70504 | /* MULSDrr_Int */ |
| 70505 | 6217, |
| 70506 | /* MULSSrm */ |
| 70507 | 6220, |
| 70508 | /* MULSSrm_Int */ |
| 70509 | 6223, |
| 70510 | /* MULSSrr */ |
| 70511 | 6226, |
| 70512 | /* MULSSrr_Int */ |
| 70513 | 6229, |
| 70514 | /* MULX32Hrm */ |
| 70515 | 6232, |
| 70516 | /* MULX32Hrr */ |
| 70517 | 6234, |
| 70518 | /* MULX32rm */ |
| 70519 | 6236, |
| 70520 | /* MULX32rm_EVEX */ |
| 70521 | 6239, |
| 70522 | /* MULX32rr */ |
| 70523 | 6242, |
| 70524 | /* MULX32rr_EVEX */ |
| 70525 | 6245, |
| 70526 | /* MULX64Hrm */ |
| 70527 | 6248, |
| 70528 | /* MULX64Hrr */ |
| 70529 | 6250, |
| 70530 | /* MULX64rm */ |
| 70531 | 6252, |
| 70532 | /* MULX64rm_EVEX */ |
| 70533 | 6255, |
| 70534 | /* MULX64rr */ |
| 70535 | 6258, |
| 70536 | /* MULX64rr_EVEX */ |
| 70537 | 6261, |
| 70538 | /* MUL_F32m */ |
| 70539 | 6264, |
| 70540 | /* MUL_F64m */ |
| 70541 | 6265, |
| 70542 | /* MUL_FI16m */ |
| 70543 | 6266, |
| 70544 | /* MUL_FI32m */ |
| 70545 | 6267, |
| 70546 | /* MUL_FPrST0 */ |
| 70547 | 6268, |
| 70548 | /* MUL_FST0r */ |
| 70549 | 6269, |
| 70550 | /* MUL_Fp32 */ |
| 70551 | 6270, |
| 70552 | /* MUL_Fp32m */ |
| 70553 | 6273, |
| 70554 | /* MUL_Fp64 */ |
| 70555 | 6276, |
| 70556 | /* MUL_Fp64m */ |
| 70557 | 6279, |
| 70558 | /* MUL_Fp64m32 */ |
| 70559 | 6282, |
| 70560 | /* MUL_Fp80 */ |
| 70561 | 6285, |
| 70562 | /* MUL_Fp80m32 */ |
| 70563 | 6288, |
| 70564 | /* MUL_Fp80m64 */ |
| 70565 | 6291, |
| 70566 | /* MUL_FpI16m32 */ |
| 70567 | 6294, |
| 70568 | /* MUL_FpI16m64 */ |
| 70569 | 6297, |
| 70570 | /* MUL_FpI16m80 */ |
| 70571 | 6300, |
| 70572 | /* MUL_FpI32m32 */ |
| 70573 | 6303, |
| 70574 | /* MUL_FpI32m64 */ |
| 70575 | 6306, |
| 70576 | /* MUL_FpI32m80 */ |
| 70577 | 6309, |
| 70578 | /* MUL_FrST0 */ |
| 70579 | 6312, |
| 70580 | /* MWAITXrrr */ |
| 70581 | 6313, |
| 70582 | /* MWAITrr */ |
| 70583 | 6313, |
| 70584 | /* NEG16m */ |
| 70585 | 6313, |
| 70586 | /* NEG16m_EVEX */ |
| 70587 | 6314, |
| 70588 | /* NEG16m_ND */ |
| 70589 | 6315, |
| 70590 | /* NEG16m_NF */ |
| 70591 | 6317, |
| 70592 | /* NEG16m_NF_ND */ |
| 70593 | 6318, |
| 70594 | /* NEG16r */ |
| 70595 | 6320, |
| 70596 | /* NEG16r_EVEX */ |
| 70597 | 6322, |
| 70598 | /* NEG16r_ND */ |
| 70599 | 6324, |
| 70600 | /* NEG16r_NF */ |
| 70601 | 6326, |
| 70602 | /* NEG16r_NF_ND */ |
| 70603 | 6328, |
| 70604 | /* NEG32m */ |
| 70605 | 6330, |
| 70606 | /* NEG32m_EVEX */ |
| 70607 | 6331, |
| 70608 | /* NEG32m_ND */ |
| 70609 | 6332, |
| 70610 | /* NEG32m_NF */ |
| 70611 | 6334, |
| 70612 | /* NEG32m_NF_ND */ |
| 70613 | 6335, |
| 70614 | /* NEG32r */ |
| 70615 | 6337, |
| 70616 | /* NEG32r_EVEX */ |
| 70617 | 6339, |
| 70618 | /* NEG32r_ND */ |
| 70619 | 6341, |
| 70620 | /* NEG32r_NF */ |
| 70621 | 6343, |
| 70622 | /* NEG32r_NF_ND */ |
| 70623 | 6345, |
| 70624 | /* NEG64m */ |
| 70625 | 6347, |
| 70626 | /* NEG64m_EVEX */ |
| 70627 | 6348, |
| 70628 | /* NEG64m_ND */ |
| 70629 | 6349, |
| 70630 | /* NEG64m_NF */ |
| 70631 | 6351, |
| 70632 | /* NEG64m_NF_ND */ |
| 70633 | 6352, |
| 70634 | /* NEG64r */ |
| 70635 | 6354, |
| 70636 | /* NEG64r_EVEX */ |
| 70637 | 6356, |
| 70638 | /* NEG64r_ND */ |
| 70639 | 6358, |
| 70640 | /* NEG64r_NF */ |
| 70641 | 6360, |
| 70642 | /* NEG64r_NF_ND */ |
| 70643 | 6362, |
| 70644 | /* NEG8m */ |
| 70645 | 6364, |
| 70646 | /* NEG8m_EVEX */ |
| 70647 | 6365, |
| 70648 | /* NEG8m_ND */ |
| 70649 | 6366, |
| 70650 | /* NEG8m_NF */ |
| 70651 | 6368, |
| 70652 | /* NEG8m_NF_ND */ |
| 70653 | 6369, |
| 70654 | /* NEG8r */ |
| 70655 | 6371, |
| 70656 | /* NEG8r_EVEX */ |
| 70657 | 6373, |
| 70658 | /* NEG8r_ND */ |
| 70659 | 6375, |
| 70660 | /* NEG8r_NF */ |
| 70661 | 6377, |
| 70662 | /* NEG8r_NF_ND */ |
| 70663 | 6379, |
| 70664 | /* NOOP */ |
| 70665 | 6381, |
| 70666 | /* NOOPL */ |
| 70667 | 6381, |
| 70668 | /* NOOPLr */ |
| 70669 | 6382, |
| 70670 | /* NOOPQ */ |
| 70671 | 6383, |
| 70672 | /* NOOPQr */ |
| 70673 | 6384, |
| 70674 | /* NOOPW */ |
| 70675 | 6385, |
| 70676 | /* NOOPWr */ |
| 70677 | 6386, |
| 70678 | /* NOT16m */ |
| 70679 | 6387, |
| 70680 | /* NOT16m_EVEX */ |
| 70681 | 6388, |
| 70682 | /* NOT16m_ND */ |
| 70683 | 6389, |
| 70684 | /* NOT16r */ |
| 70685 | 6391, |
| 70686 | /* NOT16r_EVEX */ |
| 70687 | 6393, |
| 70688 | /* NOT16r_ND */ |
| 70689 | 6395, |
| 70690 | /* NOT32m */ |
| 70691 | 6397, |
| 70692 | /* NOT32m_EVEX */ |
| 70693 | 6398, |
| 70694 | /* NOT32m_ND */ |
| 70695 | 6399, |
| 70696 | /* NOT32r */ |
| 70697 | 6401, |
| 70698 | /* NOT32r_EVEX */ |
| 70699 | 6403, |
| 70700 | /* NOT32r_ND */ |
| 70701 | 6405, |
| 70702 | /* NOT64m */ |
| 70703 | 6407, |
| 70704 | /* NOT64m_EVEX */ |
| 70705 | 6408, |
| 70706 | /* NOT64m_ND */ |
| 70707 | 6409, |
| 70708 | /* NOT64r */ |
| 70709 | 6411, |
| 70710 | /* NOT64r_EVEX */ |
| 70711 | 6413, |
| 70712 | /* NOT64r_ND */ |
| 70713 | 6415, |
| 70714 | /* NOT8m */ |
| 70715 | 6417, |
| 70716 | /* NOT8m_EVEX */ |
| 70717 | 6418, |
| 70718 | /* NOT8m_ND */ |
| 70719 | 6419, |
| 70720 | /* NOT8r */ |
| 70721 | 6421, |
| 70722 | /* NOT8r_EVEX */ |
| 70723 | 6423, |
| 70724 | /* NOT8r_ND */ |
| 70725 | 6425, |
| 70726 | /* OR16i16 */ |
| 70727 | 6427, |
| 70728 | /* OR16mi */ |
| 70729 | 6428, |
| 70730 | /* OR16mi8 */ |
| 70731 | 6430, |
| 70732 | /* OR16mi8_EVEX */ |
| 70733 | 6432, |
| 70734 | /* OR16mi8_ND */ |
| 70735 | 6434, |
| 70736 | /* OR16mi8_NF */ |
| 70737 | 6437, |
| 70738 | /* OR16mi8_NF_ND */ |
| 70739 | 6439, |
| 70740 | /* OR16mi_EVEX */ |
| 70741 | 6442, |
| 70742 | /* OR16mi_ND */ |
| 70743 | 6444, |
| 70744 | /* OR16mi_NF */ |
| 70745 | 6447, |
| 70746 | /* OR16mi_NF_ND */ |
| 70747 | 6449, |
| 70748 | /* OR16mr */ |
| 70749 | 6452, |
| 70750 | /* OR16mr_EVEX */ |
| 70751 | 6454, |
| 70752 | /* OR16mr_ND */ |
| 70753 | 6456, |
| 70754 | /* OR16mr_NF */ |
| 70755 | 6459, |
| 70756 | /* OR16mr_NF_ND */ |
| 70757 | 6461, |
| 70758 | /* OR16ri */ |
| 70759 | 6464, |
| 70760 | /* OR16ri8 */ |
| 70761 | 6467, |
| 70762 | /* OR16ri8_EVEX */ |
| 70763 | 6470, |
| 70764 | /* OR16ri8_ND */ |
| 70765 | 6473, |
| 70766 | /* OR16ri8_NF */ |
| 70767 | 6476, |
| 70768 | /* OR16ri8_NF_ND */ |
| 70769 | 6479, |
| 70770 | /* OR16ri_EVEX */ |
| 70771 | 6482, |
| 70772 | /* OR16ri_ND */ |
| 70773 | 6485, |
| 70774 | /* OR16ri_NF */ |
| 70775 | 6488, |
| 70776 | /* OR16ri_NF_ND */ |
| 70777 | 6491, |
| 70778 | /* OR16rm */ |
| 70779 | 6494, |
| 70780 | /* OR16rm_EVEX */ |
| 70781 | 6497, |
| 70782 | /* OR16rm_ND */ |
| 70783 | 6500, |
| 70784 | /* OR16rm_NF */ |
| 70785 | 6503, |
| 70786 | /* OR16rm_NF_ND */ |
| 70787 | 6506, |
| 70788 | /* OR16rr */ |
| 70789 | 6509, |
| 70790 | /* OR16rr_EVEX */ |
| 70791 | 6512, |
| 70792 | /* OR16rr_EVEX_REV */ |
| 70793 | 6515, |
| 70794 | /* OR16rr_ND */ |
| 70795 | 6518, |
| 70796 | /* OR16rr_ND_REV */ |
| 70797 | 6521, |
| 70798 | /* OR16rr_NF */ |
| 70799 | 6524, |
| 70800 | /* OR16rr_NF_ND */ |
| 70801 | 6527, |
| 70802 | /* OR16rr_NF_ND_REV */ |
| 70803 | 6530, |
| 70804 | /* OR16rr_NF_REV */ |
| 70805 | 6533, |
| 70806 | /* OR16rr_REV */ |
| 70807 | 6536, |
| 70808 | /* OR32i32 */ |
| 70809 | 6539, |
| 70810 | /* OR32mi */ |
| 70811 | 6540, |
| 70812 | /* OR32mi8 */ |
| 70813 | 6542, |
| 70814 | /* OR32mi8Locked */ |
| 70815 | 6544, |
| 70816 | /* OR32mi8_EVEX */ |
| 70817 | 6546, |
| 70818 | /* OR32mi8_ND */ |
| 70819 | 6548, |
| 70820 | /* OR32mi8_NF */ |
| 70821 | 6551, |
| 70822 | /* OR32mi8_NF_ND */ |
| 70823 | 6553, |
| 70824 | /* OR32mi_EVEX */ |
| 70825 | 6556, |
| 70826 | /* OR32mi_ND */ |
| 70827 | 6558, |
| 70828 | /* OR32mi_NF */ |
| 70829 | 6561, |
| 70830 | /* OR32mi_NF_ND */ |
| 70831 | 6563, |
| 70832 | /* OR32mr */ |
| 70833 | 6566, |
| 70834 | /* OR32mr_EVEX */ |
| 70835 | 6568, |
| 70836 | /* OR32mr_ND */ |
| 70837 | 6570, |
| 70838 | /* OR32mr_NF */ |
| 70839 | 6573, |
| 70840 | /* OR32mr_NF_ND */ |
| 70841 | 6575, |
| 70842 | /* OR32ri */ |
| 70843 | 6578, |
| 70844 | /* OR32ri8 */ |
| 70845 | 6581, |
| 70846 | /* OR32ri8_EVEX */ |
| 70847 | 6584, |
| 70848 | /* OR32ri8_ND */ |
| 70849 | 6587, |
| 70850 | /* OR32ri8_NF */ |
| 70851 | 6590, |
| 70852 | /* OR32ri8_NF_ND */ |
| 70853 | 6593, |
| 70854 | /* OR32ri_EVEX */ |
| 70855 | 6596, |
| 70856 | /* OR32ri_ND */ |
| 70857 | 6599, |
| 70858 | /* OR32ri_NF */ |
| 70859 | 6602, |
| 70860 | /* OR32ri_NF_ND */ |
| 70861 | 6605, |
| 70862 | /* OR32rm */ |
| 70863 | 6608, |
| 70864 | /* OR32rm_EVEX */ |
| 70865 | 6611, |
| 70866 | /* OR32rm_ND */ |
| 70867 | 6614, |
| 70868 | /* OR32rm_NF */ |
| 70869 | 6617, |
| 70870 | /* OR32rm_NF_ND */ |
| 70871 | 6620, |
| 70872 | /* OR32rr */ |
| 70873 | 6623, |
| 70874 | /* OR32rr_EVEX */ |
| 70875 | 6626, |
| 70876 | /* OR32rr_EVEX_REV */ |
| 70877 | 6629, |
| 70878 | /* OR32rr_ND */ |
| 70879 | 6632, |
| 70880 | /* OR32rr_ND_REV */ |
| 70881 | 6635, |
| 70882 | /* OR32rr_NF */ |
| 70883 | 6638, |
| 70884 | /* OR32rr_NF_ND */ |
| 70885 | 6641, |
| 70886 | /* OR32rr_NF_ND_REV */ |
| 70887 | 6644, |
| 70888 | /* OR32rr_NF_REV */ |
| 70889 | 6647, |
| 70890 | /* OR32rr_REV */ |
| 70891 | 6650, |
| 70892 | /* OR64i32 */ |
| 70893 | 6653, |
| 70894 | /* OR64mi32 */ |
| 70895 | 6654, |
| 70896 | /* OR64mi32_EVEX */ |
| 70897 | 6656, |
| 70898 | /* OR64mi32_ND */ |
| 70899 | 6658, |
| 70900 | /* OR64mi32_NF */ |
| 70901 | 6661, |
| 70902 | /* OR64mi32_NF_ND */ |
| 70903 | 6663, |
| 70904 | /* OR64mi8 */ |
| 70905 | 6666, |
| 70906 | /* OR64mi8_EVEX */ |
| 70907 | 6668, |
| 70908 | /* OR64mi8_ND */ |
| 70909 | 6670, |
| 70910 | /* OR64mi8_NF */ |
| 70911 | 6673, |
| 70912 | /* OR64mi8_NF_ND */ |
| 70913 | 6675, |
| 70914 | /* OR64mr */ |
| 70915 | 6678, |
| 70916 | /* OR64mr_EVEX */ |
| 70917 | 6680, |
| 70918 | /* OR64mr_ND */ |
| 70919 | 6682, |
| 70920 | /* OR64mr_NF */ |
| 70921 | 6685, |
| 70922 | /* OR64mr_NF_ND */ |
| 70923 | 6687, |
| 70924 | /* OR64ri32 */ |
| 70925 | 6690, |
| 70926 | /* OR64ri32_EVEX */ |
| 70927 | 6693, |
| 70928 | /* OR64ri32_ND */ |
| 70929 | 6696, |
| 70930 | /* OR64ri32_NF */ |
| 70931 | 6699, |
| 70932 | /* OR64ri32_NF_ND */ |
| 70933 | 6702, |
| 70934 | /* OR64ri8 */ |
| 70935 | 6705, |
| 70936 | /* OR64ri8_EVEX */ |
| 70937 | 6708, |
| 70938 | /* OR64ri8_ND */ |
| 70939 | 6711, |
| 70940 | /* OR64ri8_NF */ |
| 70941 | 6714, |
| 70942 | /* OR64ri8_NF_ND */ |
| 70943 | 6717, |
| 70944 | /* OR64rm */ |
| 70945 | 6720, |
| 70946 | /* OR64rm_EVEX */ |
| 70947 | 6723, |
| 70948 | /* OR64rm_ND */ |
| 70949 | 6726, |
| 70950 | /* OR64rm_NF */ |
| 70951 | 6729, |
| 70952 | /* OR64rm_NF_ND */ |
| 70953 | 6732, |
| 70954 | /* OR64rr */ |
| 70955 | 6735, |
| 70956 | /* OR64rr_EVEX */ |
| 70957 | 6738, |
| 70958 | /* OR64rr_EVEX_REV */ |
| 70959 | 6741, |
| 70960 | /* OR64rr_ND */ |
| 70961 | 6744, |
| 70962 | /* OR64rr_ND_REV */ |
| 70963 | 6747, |
| 70964 | /* OR64rr_NF */ |
| 70965 | 6750, |
| 70966 | /* OR64rr_NF_ND */ |
| 70967 | 6753, |
| 70968 | /* OR64rr_NF_ND_REV */ |
| 70969 | 6756, |
| 70970 | /* OR64rr_NF_REV */ |
| 70971 | 6759, |
| 70972 | /* OR64rr_REV */ |
| 70973 | 6762, |
| 70974 | /* OR8i8 */ |
| 70975 | 6765, |
| 70976 | /* OR8mi */ |
| 70977 | 6766, |
| 70978 | /* OR8mi8 */ |
| 70979 | 6768, |
| 70980 | /* OR8mi_EVEX */ |
| 70981 | 6770, |
| 70982 | /* OR8mi_ND */ |
| 70983 | 6772, |
| 70984 | /* OR8mi_NF */ |
| 70985 | 6775, |
| 70986 | /* OR8mi_NF_ND */ |
| 70987 | 6777, |
| 70988 | /* OR8mr */ |
| 70989 | 6780, |
| 70990 | /* OR8mr_EVEX */ |
| 70991 | 6782, |
| 70992 | /* OR8mr_ND */ |
| 70993 | 6784, |
| 70994 | /* OR8mr_NF */ |
| 70995 | 6787, |
| 70996 | /* OR8mr_NF_ND */ |
| 70997 | 6789, |
| 70998 | /* OR8ri */ |
| 70999 | 6792, |
| 71000 | /* OR8ri8 */ |
| 71001 | 6795, |
| 71002 | /* OR8ri_EVEX */ |
| 71003 | 6798, |
| 71004 | /* OR8ri_ND */ |
| 71005 | 6801, |
| 71006 | /* OR8ri_NF */ |
| 71007 | 6804, |
| 71008 | /* OR8ri_NF_ND */ |
| 71009 | 6807, |
| 71010 | /* OR8rm */ |
| 71011 | 6810, |
| 71012 | /* OR8rm_EVEX */ |
| 71013 | 6813, |
| 71014 | /* OR8rm_ND */ |
| 71015 | 6816, |
| 71016 | /* OR8rm_NF */ |
| 71017 | 6819, |
| 71018 | /* OR8rm_NF_ND */ |
| 71019 | 6822, |
| 71020 | /* OR8rr */ |
| 71021 | 6825, |
| 71022 | /* OR8rr_EVEX */ |
| 71023 | 6828, |
| 71024 | /* OR8rr_EVEX_REV */ |
| 71025 | 6831, |
| 71026 | /* OR8rr_ND */ |
| 71027 | 6834, |
| 71028 | /* OR8rr_ND_REV */ |
| 71029 | 6837, |
| 71030 | /* OR8rr_NF */ |
| 71031 | 6840, |
| 71032 | /* OR8rr_NF_ND */ |
| 71033 | 6843, |
| 71034 | /* OR8rr_NF_ND_REV */ |
| 71035 | 6846, |
| 71036 | /* OR8rr_NF_REV */ |
| 71037 | 6849, |
| 71038 | /* OR8rr_REV */ |
| 71039 | 6852, |
| 71040 | /* ORPDrm */ |
| 71041 | 6855, |
| 71042 | /* ORPDrr */ |
| 71043 | 6858, |
| 71044 | /* ORPSrm */ |
| 71045 | 6861, |
| 71046 | /* ORPSrr */ |
| 71047 | 6864, |
| 71048 | /* OUT16ir */ |
| 71049 | 6867, |
| 71050 | /* OUT16rr */ |
| 71051 | 6868, |
| 71052 | /* OUT32ir */ |
| 71053 | 6868, |
| 71054 | /* OUT32rr */ |
| 71055 | 6869, |
| 71056 | /* OUT8ir */ |
| 71057 | 6869, |
| 71058 | /* OUT8rr */ |
| 71059 | 6870, |
| 71060 | /* OUTSB */ |
| 71061 | 6870, |
| 71062 | /* OUTSL */ |
| 71063 | 6871, |
| 71064 | /* OUTSW */ |
| 71065 | 6872, |
| 71066 | /* PABSBrm */ |
| 71067 | 6873, |
| 71068 | /* PABSBrr */ |
| 71069 | 6875, |
| 71070 | /* PABSDrm */ |
| 71071 | 6877, |
| 71072 | /* PABSDrr */ |
| 71073 | 6879, |
| 71074 | /* PABSWrm */ |
| 71075 | 6881, |
| 71076 | /* PABSWrr */ |
| 71077 | 6883, |
| 71078 | /* PACKSSDWrm */ |
| 71079 | 6885, |
| 71080 | /* PACKSSDWrr */ |
| 71081 | 6888, |
| 71082 | /* PACKSSWBrm */ |
| 71083 | 6891, |
| 71084 | /* PACKSSWBrr */ |
| 71085 | 6894, |
| 71086 | /* PACKUSDWrm */ |
| 71087 | 6897, |
| 71088 | /* PACKUSDWrr */ |
| 71089 | 6900, |
| 71090 | /* PACKUSWBrm */ |
| 71091 | 6903, |
| 71092 | /* PACKUSWBrr */ |
| 71093 | 6906, |
| 71094 | /* PADDBrm */ |
| 71095 | 6909, |
| 71096 | /* PADDBrr */ |
| 71097 | 6912, |
| 71098 | /* PADDDrm */ |
| 71099 | 6915, |
| 71100 | /* PADDDrr */ |
| 71101 | 6918, |
| 71102 | /* PADDQrm */ |
| 71103 | 6921, |
| 71104 | /* PADDQrr */ |
| 71105 | 6924, |
| 71106 | /* PADDSBrm */ |
| 71107 | 6927, |
| 71108 | /* PADDSBrr */ |
| 71109 | 6930, |
| 71110 | /* PADDSWrm */ |
| 71111 | 6933, |
| 71112 | /* PADDSWrr */ |
| 71113 | 6936, |
| 71114 | /* PADDUSBrm */ |
| 71115 | 6939, |
| 71116 | /* PADDUSBrr */ |
| 71117 | 6942, |
| 71118 | /* PADDUSWrm */ |
| 71119 | 6945, |
| 71120 | /* PADDUSWrr */ |
| 71121 | 6948, |
| 71122 | /* PADDWrm */ |
| 71123 | 6951, |
| 71124 | /* PADDWrr */ |
| 71125 | 6954, |
| 71126 | /* PALIGNRrmi */ |
| 71127 | 6957, |
| 71128 | /* PALIGNRrri */ |
| 71129 | 6961, |
| 71130 | /* PANDNrm */ |
| 71131 | 6965, |
| 71132 | /* PANDNrr */ |
| 71133 | 6968, |
| 71134 | /* PANDrm */ |
| 71135 | 6971, |
| 71136 | /* PANDrr */ |
| 71137 | 6974, |
| 71138 | /* PAUSE */ |
| 71139 | 6977, |
| 71140 | /* PAVGBrm */ |
| 71141 | 6977, |
| 71142 | /* PAVGBrr */ |
| 71143 | 6980, |
| 71144 | /* PAVGUSBrm */ |
| 71145 | 6983, |
| 71146 | /* PAVGUSBrr */ |
| 71147 | 6986, |
| 71148 | /* PAVGWrm */ |
| 71149 | 6989, |
| 71150 | /* PAVGWrr */ |
| 71151 | 6992, |
| 71152 | /* PBLENDVBrm0 */ |
| 71153 | 6995, |
| 71154 | /* PBLENDVBrr0 */ |
| 71155 | 6998, |
| 71156 | /* PBLENDWrmi */ |
| 71157 | 7001, |
| 71158 | /* PBLENDWrri */ |
| 71159 | 7005, |
| 71160 | /* PBNDKB */ |
| 71161 | 7009, |
| 71162 | /* PCLMULQDQrmi */ |
| 71163 | 7009, |
| 71164 | /* PCLMULQDQrri */ |
| 71165 | 7013, |
| 71166 | /* PCMPEQBrm */ |
| 71167 | 7017, |
| 71168 | /* PCMPEQBrr */ |
| 71169 | 7020, |
| 71170 | /* PCMPEQDrm */ |
| 71171 | 7023, |
| 71172 | /* PCMPEQDrr */ |
| 71173 | 7026, |
| 71174 | /* PCMPEQQrm */ |
| 71175 | 7029, |
| 71176 | /* PCMPEQQrr */ |
| 71177 | 7032, |
| 71178 | /* PCMPEQWrm */ |
| 71179 | 7035, |
| 71180 | /* PCMPEQWrr */ |
| 71181 | 7038, |
| 71182 | /* PCMPESTRIrmi */ |
| 71183 | 7041, |
| 71184 | /* PCMPESTRIrri */ |
| 71185 | 7044, |
| 71186 | /* PCMPESTRMrmi */ |
| 71187 | 7047, |
| 71188 | /* PCMPESTRMrri */ |
| 71189 | 7050, |
| 71190 | /* PCMPGTBrm */ |
| 71191 | 7053, |
| 71192 | /* PCMPGTBrr */ |
| 71193 | 7056, |
| 71194 | /* PCMPGTDrm */ |
| 71195 | 7059, |
| 71196 | /* PCMPGTDrr */ |
| 71197 | 7062, |
| 71198 | /* PCMPGTQrm */ |
| 71199 | 7065, |
| 71200 | /* PCMPGTQrr */ |
| 71201 | 7068, |
| 71202 | /* PCMPGTWrm */ |
| 71203 | 7071, |
| 71204 | /* PCMPGTWrr */ |
| 71205 | 7074, |
| 71206 | /* PCMPISTRIrmi */ |
| 71207 | 7077, |
| 71208 | /* PCMPISTRIrri */ |
| 71209 | 7080, |
| 71210 | /* PCMPISTRMrmi */ |
| 71211 | 7083, |
| 71212 | /* PCMPISTRMrri */ |
| 71213 | 7086, |
| 71214 | /* PCONFIG */ |
| 71215 | 7089, |
| 71216 | /* PDEP32rm */ |
| 71217 | 7089, |
| 71218 | /* PDEP32rm_EVEX */ |
| 71219 | 7092, |
| 71220 | /* PDEP32rr */ |
| 71221 | 7095, |
| 71222 | /* PDEP32rr_EVEX */ |
| 71223 | 7098, |
| 71224 | /* PDEP64rm */ |
| 71225 | 7101, |
| 71226 | /* PDEP64rm_EVEX */ |
| 71227 | 7104, |
| 71228 | /* PDEP64rr */ |
| 71229 | 7107, |
| 71230 | /* PDEP64rr_EVEX */ |
| 71231 | 7110, |
| 71232 | /* PEXT32rm */ |
| 71233 | 7113, |
| 71234 | /* PEXT32rm_EVEX */ |
| 71235 | 7116, |
| 71236 | /* PEXT32rr */ |
| 71237 | 7119, |
| 71238 | /* PEXT32rr_EVEX */ |
| 71239 | 7122, |
| 71240 | /* PEXT64rm */ |
| 71241 | 7125, |
| 71242 | /* PEXT64rm_EVEX */ |
| 71243 | 7128, |
| 71244 | /* PEXT64rr */ |
| 71245 | 7131, |
| 71246 | /* PEXT64rr_EVEX */ |
| 71247 | 7134, |
| 71248 | /* PEXTRBmr */ |
| 71249 | 7137, |
| 71250 | /* PEXTRBrr */ |
| 71251 | 7140, |
| 71252 | /* PEXTRDmr */ |
| 71253 | 7143, |
| 71254 | /* PEXTRDrr */ |
| 71255 | 7146, |
| 71256 | /* PEXTRQmr */ |
| 71257 | 7149, |
| 71258 | /* PEXTRQrr */ |
| 71259 | 7152, |
| 71260 | /* PEXTRWmr */ |
| 71261 | 7155, |
| 71262 | /* PEXTRWrr */ |
| 71263 | 7158, |
| 71264 | /* PEXTRWrr_REV */ |
| 71265 | 7161, |
| 71266 | /* PF2IDrm */ |
| 71267 | 7164, |
| 71268 | /* PF2IDrr */ |
| 71269 | 7166, |
| 71270 | /* PF2IWrm */ |
| 71271 | 7168, |
| 71272 | /* PF2IWrr */ |
| 71273 | 7170, |
| 71274 | /* PFACCrm */ |
| 71275 | 7172, |
| 71276 | /* PFACCrr */ |
| 71277 | 7175, |
| 71278 | /* PFADDrm */ |
| 71279 | 7178, |
| 71280 | /* PFADDrr */ |
| 71281 | 7181, |
| 71282 | /* PFCMPEQrm */ |
| 71283 | 7184, |
| 71284 | /* PFCMPEQrr */ |
| 71285 | 7187, |
| 71286 | /* PFCMPGErm */ |
| 71287 | 7190, |
| 71288 | /* PFCMPGErr */ |
| 71289 | 7193, |
| 71290 | /* PFCMPGTrm */ |
| 71291 | 7196, |
| 71292 | /* PFCMPGTrr */ |
| 71293 | 7199, |
| 71294 | /* PFMAXrm */ |
| 71295 | 7202, |
| 71296 | /* PFMAXrr */ |
| 71297 | 7205, |
| 71298 | /* PFMINrm */ |
| 71299 | 7208, |
| 71300 | /* PFMINrr */ |
| 71301 | 7211, |
| 71302 | /* PFMULrm */ |
| 71303 | 7214, |
| 71304 | /* PFMULrr */ |
| 71305 | 7217, |
| 71306 | /* PFNACCrm */ |
| 71307 | 7220, |
| 71308 | /* PFNACCrr */ |
| 71309 | 7223, |
| 71310 | /* PFPNACCrm */ |
| 71311 | 7226, |
| 71312 | /* PFPNACCrr */ |
| 71313 | 7229, |
| 71314 | /* PFRCPIT1rm */ |
| 71315 | 7232, |
| 71316 | /* PFRCPIT1rr */ |
| 71317 | 7235, |
| 71318 | /* PFRCPIT2rm */ |
| 71319 | 7238, |
| 71320 | /* PFRCPIT2rr */ |
| 71321 | 7241, |
| 71322 | /* PFRCPrm */ |
| 71323 | 7244, |
| 71324 | /* PFRCPrr */ |
| 71325 | 7246, |
| 71326 | /* PFRSQIT1rm */ |
| 71327 | 7248, |
| 71328 | /* PFRSQIT1rr */ |
| 71329 | 7251, |
| 71330 | /* PFRSQRTrm */ |
| 71331 | 7254, |
| 71332 | /* PFRSQRTrr */ |
| 71333 | 7256, |
| 71334 | /* PFSUBRrm */ |
| 71335 | 7258, |
| 71336 | /* PFSUBRrr */ |
| 71337 | 7261, |
| 71338 | /* PFSUBrm */ |
| 71339 | 7264, |
| 71340 | /* PFSUBrr */ |
| 71341 | 7267, |
| 71342 | /* PHADDDrm */ |
| 71343 | 7270, |
| 71344 | /* PHADDDrr */ |
| 71345 | 7273, |
| 71346 | /* PHADDSWrm */ |
| 71347 | 7276, |
| 71348 | /* PHADDSWrr */ |
| 71349 | 7279, |
| 71350 | /* PHADDWrm */ |
| 71351 | 7282, |
| 71352 | /* PHADDWrr */ |
| 71353 | 7285, |
| 71354 | /* PHMINPOSUWrm */ |
| 71355 | 7288, |
| 71356 | /* PHMINPOSUWrr */ |
| 71357 | 7290, |
| 71358 | /* PHSUBDrm */ |
| 71359 | 7292, |
| 71360 | /* PHSUBDrr */ |
| 71361 | 7295, |
| 71362 | /* PHSUBSWrm */ |
| 71363 | 7298, |
| 71364 | /* PHSUBSWrr */ |
| 71365 | 7301, |
| 71366 | /* PHSUBWrm */ |
| 71367 | 7304, |
| 71368 | /* PHSUBWrr */ |
| 71369 | 7307, |
| 71370 | /* PI2FDrm */ |
| 71371 | 7310, |
| 71372 | /* PI2FDrr */ |
| 71373 | 7312, |
| 71374 | /* PI2FWrm */ |
| 71375 | 7314, |
| 71376 | /* PI2FWrr */ |
| 71377 | 7316, |
| 71378 | /* PINSRBrm */ |
| 71379 | 7318, |
| 71380 | /* PINSRBrr */ |
| 71381 | 7322, |
| 71382 | /* PINSRDrm */ |
| 71383 | 7326, |
| 71384 | /* PINSRDrr */ |
| 71385 | 7330, |
| 71386 | /* PINSRQrm */ |
| 71387 | 7334, |
| 71388 | /* PINSRQrr */ |
| 71389 | 7338, |
| 71390 | /* PINSRWrm */ |
| 71391 | 7342, |
| 71392 | /* PINSRWrr */ |
| 71393 | 7346, |
| 71394 | /* PMADDUBSWrm */ |
| 71395 | 7350, |
| 71396 | /* PMADDUBSWrr */ |
| 71397 | 7353, |
| 71398 | /* PMADDWDrm */ |
| 71399 | 7356, |
| 71400 | /* PMADDWDrr */ |
| 71401 | 7359, |
| 71402 | /* PMAXSBrm */ |
| 71403 | 7362, |
| 71404 | /* PMAXSBrr */ |
| 71405 | 7365, |
| 71406 | /* PMAXSDrm */ |
| 71407 | 7368, |
| 71408 | /* PMAXSDrr */ |
| 71409 | 7371, |
| 71410 | /* PMAXSWrm */ |
| 71411 | 7374, |
| 71412 | /* PMAXSWrr */ |
| 71413 | 7377, |
| 71414 | /* PMAXUBrm */ |
| 71415 | 7380, |
| 71416 | /* PMAXUBrr */ |
| 71417 | 7383, |
| 71418 | /* PMAXUDrm */ |
| 71419 | 7386, |
| 71420 | /* PMAXUDrr */ |
| 71421 | 7389, |
| 71422 | /* PMAXUWrm */ |
| 71423 | 7392, |
| 71424 | /* PMAXUWrr */ |
| 71425 | 7395, |
| 71426 | /* PMINSBrm */ |
| 71427 | 7398, |
| 71428 | /* PMINSBrr */ |
| 71429 | 7401, |
| 71430 | /* PMINSDrm */ |
| 71431 | 7404, |
| 71432 | /* PMINSDrr */ |
| 71433 | 7407, |
| 71434 | /* PMINSWrm */ |
| 71435 | 7410, |
| 71436 | /* PMINSWrr */ |
| 71437 | 7413, |
| 71438 | /* PMINUBrm */ |
| 71439 | 7416, |
| 71440 | /* PMINUBrr */ |
| 71441 | 7419, |
| 71442 | /* PMINUDrm */ |
| 71443 | 7422, |
| 71444 | /* PMINUDrr */ |
| 71445 | 7425, |
| 71446 | /* PMINUWrm */ |
| 71447 | 7428, |
| 71448 | /* PMINUWrr */ |
| 71449 | 7431, |
| 71450 | /* PMOVMSKBrr */ |
| 71451 | 7434, |
| 71452 | /* PMOVSXBDrm */ |
| 71453 | 7436, |
| 71454 | /* PMOVSXBDrr */ |
| 71455 | 7438, |
| 71456 | /* PMOVSXBQrm */ |
| 71457 | 7440, |
| 71458 | /* PMOVSXBQrr */ |
| 71459 | 7442, |
| 71460 | /* PMOVSXBWrm */ |
| 71461 | 7444, |
| 71462 | /* PMOVSXBWrr */ |
| 71463 | 7446, |
| 71464 | /* PMOVSXDQrm */ |
| 71465 | 7448, |
| 71466 | /* PMOVSXDQrr */ |
| 71467 | 7450, |
| 71468 | /* PMOVSXWDrm */ |
| 71469 | 7452, |
| 71470 | /* PMOVSXWDrr */ |
| 71471 | 7454, |
| 71472 | /* PMOVSXWQrm */ |
| 71473 | 7456, |
| 71474 | /* PMOVSXWQrr */ |
| 71475 | 7458, |
| 71476 | /* PMOVZXBDrm */ |
| 71477 | 7460, |
| 71478 | /* PMOVZXBDrr */ |
| 71479 | 7462, |
| 71480 | /* PMOVZXBQrm */ |
| 71481 | 7464, |
| 71482 | /* PMOVZXBQrr */ |
| 71483 | 7466, |
| 71484 | /* PMOVZXBWrm */ |
| 71485 | 7468, |
| 71486 | /* PMOVZXBWrr */ |
| 71487 | 7470, |
| 71488 | /* PMOVZXDQrm */ |
| 71489 | 7472, |
| 71490 | /* PMOVZXDQrr */ |
| 71491 | 7474, |
| 71492 | /* PMOVZXWDrm */ |
| 71493 | 7476, |
| 71494 | /* PMOVZXWDrr */ |
| 71495 | 7478, |
| 71496 | /* PMOVZXWQrm */ |
| 71497 | 7480, |
| 71498 | /* PMOVZXWQrr */ |
| 71499 | 7482, |
| 71500 | /* PMULDQrm */ |
| 71501 | 7484, |
| 71502 | /* PMULDQrr */ |
| 71503 | 7487, |
| 71504 | /* PMULHRSWrm */ |
| 71505 | 7490, |
| 71506 | /* PMULHRSWrr */ |
| 71507 | 7493, |
| 71508 | /* PMULHRWrm */ |
| 71509 | 7496, |
| 71510 | /* PMULHRWrr */ |
| 71511 | 7499, |
| 71512 | /* PMULHUWrm */ |
| 71513 | 7502, |
| 71514 | /* PMULHUWrr */ |
| 71515 | 7505, |
| 71516 | /* PMULHWrm */ |
| 71517 | 7508, |
| 71518 | /* PMULHWrr */ |
| 71519 | 7511, |
| 71520 | /* PMULLDrm */ |
| 71521 | 7514, |
| 71522 | /* PMULLDrr */ |
| 71523 | 7517, |
| 71524 | /* PMULLWrm */ |
| 71525 | 7520, |
| 71526 | /* PMULLWrr */ |
| 71527 | 7523, |
| 71528 | /* PMULUDQrm */ |
| 71529 | 7526, |
| 71530 | /* PMULUDQrr */ |
| 71531 | 7529, |
| 71532 | /* POP16r */ |
| 71533 | 7532, |
| 71534 | /* POP16rmm */ |
| 71535 | 7533, |
| 71536 | /* POP16rmr */ |
| 71537 | 7534, |
| 71538 | /* POP2 */ |
| 71539 | 7535, |
| 71540 | /* POP2P */ |
| 71541 | 7537, |
| 71542 | /* POP32r */ |
| 71543 | 7539, |
| 71544 | /* POP32rmm */ |
| 71545 | 7540, |
| 71546 | /* POP32rmr */ |
| 71547 | 7541, |
| 71548 | /* POP64r */ |
| 71549 | 7542, |
| 71550 | /* POP64rmm */ |
| 71551 | 7543, |
| 71552 | /* POP64rmr */ |
| 71553 | 7544, |
| 71554 | /* POPA16 */ |
| 71555 | 7545, |
| 71556 | /* POPA32 */ |
| 71557 | 7545, |
| 71558 | /* POPCNT16rm */ |
| 71559 | 7545, |
| 71560 | /* POPCNT16rm_EVEX */ |
| 71561 | 7547, |
| 71562 | /* POPCNT16rm_NF */ |
| 71563 | 7549, |
| 71564 | /* POPCNT16rr */ |
| 71565 | 7551, |
| 71566 | /* POPCNT16rr_EVEX */ |
| 71567 | 7553, |
| 71568 | /* POPCNT16rr_NF */ |
| 71569 | 7555, |
| 71570 | /* POPCNT32rm */ |
| 71571 | 7557, |
| 71572 | /* POPCNT32rm_EVEX */ |
| 71573 | 7559, |
| 71574 | /* POPCNT32rm_NF */ |
| 71575 | 7561, |
| 71576 | /* POPCNT32rr */ |
| 71577 | 7563, |
| 71578 | /* POPCNT32rr_EVEX */ |
| 71579 | 7565, |
| 71580 | /* POPCNT32rr_NF */ |
| 71581 | 7567, |
| 71582 | /* POPCNT64rm */ |
| 71583 | 7569, |
| 71584 | /* POPCNT64rm_EVEX */ |
| 71585 | 7571, |
| 71586 | /* POPCNT64rm_NF */ |
| 71587 | 7573, |
| 71588 | /* POPCNT64rr */ |
| 71589 | 7575, |
| 71590 | /* POPCNT64rr_EVEX */ |
| 71591 | 7577, |
| 71592 | /* POPCNT64rr_NF */ |
| 71593 | 7579, |
| 71594 | /* POPDS16 */ |
| 71595 | 7581, |
| 71596 | /* POPDS32 */ |
| 71597 | 7581, |
| 71598 | /* POPES16 */ |
| 71599 | 7581, |
| 71600 | /* POPES32 */ |
| 71601 | 7581, |
| 71602 | /* POPF16 */ |
| 71603 | 7581, |
| 71604 | /* POPF32 */ |
| 71605 | 7581, |
| 71606 | /* POPF64 */ |
| 71607 | 7581, |
| 71608 | /* POPFS16 */ |
| 71609 | 7581, |
| 71610 | /* POPFS32 */ |
| 71611 | 7581, |
| 71612 | /* POPFS64 */ |
| 71613 | 7581, |
| 71614 | /* POPGS16 */ |
| 71615 | 7581, |
| 71616 | /* POPGS32 */ |
| 71617 | 7581, |
| 71618 | /* POPGS64 */ |
| 71619 | 7581, |
| 71620 | /* POPP64r */ |
| 71621 | 7581, |
| 71622 | /* POPSS16 */ |
| 71623 | 7582, |
| 71624 | /* POPSS32 */ |
| 71625 | 7582, |
| 71626 | /* PORrm */ |
| 71627 | 7582, |
| 71628 | /* PORrr */ |
| 71629 | 7585, |
| 71630 | /* PREFETCH */ |
| 71631 | 7588, |
| 71632 | /* PREFETCHIT0 */ |
| 71633 | 7589, |
| 71634 | /* PREFETCHIT1 */ |
| 71635 | 7590, |
| 71636 | /* PREFETCHNTA */ |
| 71637 | 7591, |
| 71638 | /* PREFETCHT0 */ |
| 71639 | 7592, |
| 71640 | /* PREFETCHT1 */ |
| 71641 | 7593, |
| 71642 | /* PREFETCHT2 */ |
| 71643 | 7594, |
| 71644 | /* PREFETCHW */ |
| 71645 | 7595, |
| 71646 | /* PREFETCHWT1 */ |
| 71647 | 7596, |
| 71648 | /* PROBED_ALLOCA_32 */ |
| 71649 | 7597, |
| 71650 | /* PROBED_ALLOCA_64 */ |
| 71651 | 7599, |
| 71652 | /* PSADBWrm */ |
| 71653 | 7601, |
| 71654 | /* PSADBWrr */ |
| 71655 | 7604, |
| 71656 | /* PSHUFBrm */ |
| 71657 | 7607, |
| 71658 | /* PSHUFBrr */ |
| 71659 | 7610, |
| 71660 | /* PSHUFDmi */ |
| 71661 | 7613, |
| 71662 | /* PSHUFDri */ |
| 71663 | 7616, |
| 71664 | /* PSHUFHWmi */ |
| 71665 | 7619, |
| 71666 | /* PSHUFHWri */ |
| 71667 | 7622, |
| 71668 | /* PSHUFLWmi */ |
| 71669 | 7625, |
| 71670 | /* PSHUFLWri */ |
| 71671 | 7628, |
| 71672 | /* PSIGNBrm */ |
| 71673 | 7631, |
| 71674 | /* PSIGNBrr */ |
| 71675 | 7634, |
| 71676 | /* PSIGNDrm */ |
| 71677 | 7637, |
| 71678 | /* PSIGNDrr */ |
| 71679 | 7640, |
| 71680 | /* PSIGNWrm */ |
| 71681 | 7643, |
| 71682 | /* PSIGNWrr */ |
| 71683 | 7646, |
| 71684 | /* PSLLDQri */ |
| 71685 | 7649, |
| 71686 | /* PSLLDri */ |
| 71687 | 7652, |
| 71688 | /* PSLLDrm */ |
| 71689 | 7655, |
| 71690 | /* PSLLDrr */ |
| 71691 | 7658, |
| 71692 | /* PSLLQri */ |
| 71693 | 7661, |
| 71694 | /* PSLLQrm */ |
| 71695 | 7664, |
| 71696 | /* PSLLQrr */ |
| 71697 | 7667, |
| 71698 | /* PSLLWri */ |
| 71699 | 7670, |
| 71700 | /* PSLLWrm */ |
| 71701 | 7673, |
| 71702 | /* PSLLWrr */ |
| 71703 | 7676, |
| 71704 | /* PSMASH */ |
| 71705 | 7679, |
| 71706 | /* PSRADri */ |
| 71707 | 7679, |
| 71708 | /* PSRADrm */ |
| 71709 | 7682, |
| 71710 | /* PSRADrr */ |
| 71711 | 7685, |
| 71712 | /* PSRAWri */ |
| 71713 | 7688, |
| 71714 | /* PSRAWrm */ |
| 71715 | 7691, |
| 71716 | /* PSRAWrr */ |
| 71717 | 7694, |
| 71718 | /* PSRLDQri */ |
| 71719 | 7697, |
| 71720 | /* PSRLDri */ |
| 71721 | 7700, |
| 71722 | /* PSRLDrm */ |
| 71723 | 7703, |
| 71724 | /* PSRLDrr */ |
| 71725 | 7706, |
| 71726 | /* PSRLQri */ |
| 71727 | 7709, |
| 71728 | /* PSRLQrm */ |
| 71729 | 7712, |
| 71730 | /* PSRLQrr */ |
| 71731 | 7715, |
| 71732 | /* PSRLWri */ |
| 71733 | 7718, |
| 71734 | /* PSRLWrm */ |
| 71735 | 7721, |
| 71736 | /* PSRLWrr */ |
| 71737 | 7724, |
| 71738 | /* PSUBBrm */ |
| 71739 | 7727, |
| 71740 | /* PSUBBrr */ |
| 71741 | 7730, |
| 71742 | /* PSUBDrm */ |
| 71743 | 7733, |
| 71744 | /* PSUBDrr */ |
| 71745 | 7736, |
| 71746 | /* PSUBQrm */ |
| 71747 | 7739, |
| 71748 | /* PSUBQrr */ |
| 71749 | 7742, |
| 71750 | /* PSUBSBrm */ |
| 71751 | 7745, |
| 71752 | /* PSUBSBrr */ |
| 71753 | 7748, |
| 71754 | /* PSUBSWrm */ |
| 71755 | 7751, |
| 71756 | /* PSUBSWrr */ |
| 71757 | 7754, |
| 71758 | /* PSUBUSBrm */ |
| 71759 | 7757, |
| 71760 | /* PSUBUSBrr */ |
| 71761 | 7760, |
| 71762 | /* PSUBUSWrm */ |
| 71763 | 7763, |
| 71764 | /* PSUBUSWrr */ |
| 71765 | 7766, |
| 71766 | /* PSUBWrm */ |
| 71767 | 7769, |
| 71768 | /* PSUBWrr */ |
| 71769 | 7772, |
| 71770 | /* PSWAPDrm */ |
| 71771 | 7775, |
| 71772 | /* PSWAPDrr */ |
| 71773 | 7777, |
| 71774 | /* PTCMMIMFP16PS */ |
| 71775 | 7779, |
| 71776 | /* PTCMMIMFP16PSV */ |
| 71777 | 7782, |
| 71778 | /* PTCMMRLFP16PS */ |
| 71779 | 7789, |
| 71780 | /* PTCMMRLFP16PSV */ |
| 71781 | 7792, |
| 71782 | /* PTDPBF16PS */ |
| 71783 | 7799, |
| 71784 | /* PTDPBSSD */ |
| 71785 | 7802, |
| 71786 | /* PTDPBSUD */ |
| 71787 | 7805, |
| 71788 | /* PTDPBUSD */ |
| 71789 | 7808, |
| 71790 | /* PTDPBUUD */ |
| 71791 | 7811, |
| 71792 | /* PTDPFP16PS */ |
| 71793 | 7814, |
| 71794 | /* PTESTrm */ |
| 71795 | 7817, |
| 71796 | /* PTESTrr */ |
| 71797 | 7819, |
| 71798 | /* PTILELOADD */ |
| 71799 | 7821, |
| 71800 | /* PTILELOADDT1 */ |
| 71801 | 7823, |
| 71802 | /* PTILESTORED */ |
| 71803 | 7825, |
| 71804 | /* PTILEZERO */ |
| 71805 | 7827, |
| 71806 | /* PTWRITE64m */ |
| 71807 | 7828, |
| 71808 | /* PTWRITE64r */ |
| 71809 | 7829, |
| 71810 | /* PTWRITEm */ |
| 71811 | 7830, |
| 71812 | /* PTWRITEr */ |
| 71813 | 7831, |
| 71814 | /* PUNPCKHBWrm */ |
| 71815 | 7832, |
| 71816 | /* PUNPCKHBWrr */ |
| 71817 | 7835, |
| 71818 | /* PUNPCKHDQrm */ |
| 71819 | 7838, |
| 71820 | /* PUNPCKHDQrr */ |
| 71821 | 7841, |
| 71822 | /* PUNPCKHQDQrm */ |
| 71823 | 7844, |
| 71824 | /* PUNPCKHQDQrr */ |
| 71825 | 7847, |
| 71826 | /* PUNPCKHWDrm */ |
| 71827 | 7850, |
| 71828 | /* PUNPCKHWDrr */ |
| 71829 | 7853, |
| 71830 | /* PUNPCKLBWrm */ |
| 71831 | 7856, |
| 71832 | /* PUNPCKLBWrr */ |
| 71833 | 7859, |
| 71834 | /* PUNPCKLDQrm */ |
| 71835 | 7862, |
| 71836 | /* PUNPCKLDQrr */ |
| 71837 | 7865, |
| 71838 | /* PUNPCKLQDQrm */ |
| 71839 | 7868, |
| 71840 | /* PUNPCKLQDQrr */ |
| 71841 | 7871, |
| 71842 | /* PUNPCKLWDrm */ |
| 71843 | 7874, |
| 71844 | /* PUNPCKLWDrr */ |
| 71845 | 7877, |
| 71846 | /* PUSH16i */ |
| 71847 | 7880, |
| 71848 | /* PUSH16i8 */ |
| 71849 | 7881, |
| 71850 | /* PUSH16r */ |
| 71851 | 7882, |
| 71852 | /* PUSH16rmm */ |
| 71853 | 7883, |
| 71854 | /* PUSH16rmr */ |
| 71855 | 7884, |
| 71856 | /* PUSH2 */ |
| 71857 | 7885, |
| 71858 | /* PUSH2P */ |
| 71859 | 7887, |
| 71860 | /* PUSH32i */ |
| 71861 | 7889, |
| 71862 | /* PUSH32i8 */ |
| 71863 | 7890, |
| 71864 | /* PUSH32r */ |
| 71865 | 7891, |
| 71866 | /* PUSH32rmm */ |
| 71867 | 7892, |
| 71868 | /* PUSH32rmr */ |
| 71869 | 7893, |
| 71870 | /* PUSH64i32 */ |
| 71871 | 7894, |
| 71872 | /* PUSH64i8 */ |
| 71873 | 7895, |
| 71874 | /* PUSH64r */ |
| 71875 | 7896, |
| 71876 | /* PUSH64rmm */ |
| 71877 | 7897, |
| 71878 | /* PUSH64rmr */ |
| 71879 | 7898, |
| 71880 | /* PUSHA16 */ |
| 71881 | 7899, |
| 71882 | /* PUSHA32 */ |
| 71883 | 7899, |
| 71884 | /* PUSHCS16 */ |
| 71885 | 7899, |
| 71886 | /* PUSHCS32 */ |
| 71887 | 7899, |
| 71888 | /* PUSHDS16 */ |
| 71889 | 7899, |
| 71890 | /* PUSHDS32 */ |
| 71891 | 7899, |
| 71892 | /* PUSHES16 */ |
| 71893 | 7899, |
| 71894 | /* PUSHES32 */ |
| 71895 | 7899, |
| 71896 | /* PUSHF16 */ |
| 71897 | 7899, |
| 71898 | /* PUSHF32 */ |
| 71899 | 7899, |
| 71900 | /* PUSHF64 */ |
| 71901 | 7899, |
| 71902 | /* PUSHFS16 */ |
| 71903 | 7899, |
| 71904 | /* PUSHFS32 */ |
| 71905 | 7899, |
| 71906 | /* PUSHFS64 */ |
| 71907 | 7899, |
| 71908 | /* PUSHGS16 */ |
| 71909 | 7899, |
| 71910 | /* PUSHGS32 */ |
| 71911 | 7899, |
| 71912 | /* PUSHGS64 */ |
| 71913 | 7899, |
| 71914 | /* PUSHP64r */ |
| 71915 | 7899, |
| 71916 | /* PUSHSS16 */ |
| 71917 | 7900, |
| 71918 | /* PUSHSS32 */ |
| 71919 | 7900, |
| 71920 | /* PVALIDATE32 */ |
| 71921 | 7900, |
| 71922 | /* PVALIDATE64 */ |
| 71923 | 7900, |
| 71924 | /* PXORrm */ |
| 71925 | 7900, |
| 71926 | /* PXORrr */ |
| 71927 | 7903, |
| 71928 | /* RCL16m1 */ |
| 71929 | 7906, |
| 71930 | /* RCL16m1_EVEX */ |
| 71931 | 7907, |
| 71932 | /* RCL16m1_ND */ |
| 71933 | 7908, |
| 71934 | /* RCL16mCL */ |
| 71935 | 7910, |
| 71936 | /* RCL16mCL_EVEX */ |
| 71937 | 7911, |
| 71938 | /* RCL16mCL_ND */ |
| 71939 | 7912, |
| 71940 | /* RCL16mi */ |
| 71941 | 7914, |
| 71942 | /* RCL16mi_EVEX */ |
| 71943 | 7916, |
| 71944 | /* RCL16mi_ND */ |
| 71945 | 7918, |
| 71946 | /* RCL16r1 */ |
| 71947 | 7921, |
| 71948 | /* RCL16r1_EVEX */ |
| 71949 | 7923, |
| 71950 | /* RCL16r1_ND */ |
| 71951 | 7925, |
| 71952 | /* RCL16rCL */ |
| 71953 | 7927, |
| 71954 | /* RCL16rCL_EVEX */ |
| 71955 | 7929, |
| 71956 | /* RCL16rCL_ND */ |
| 71957 | 7931, |
| 71958 | /* RCL16ri */ |
| 71959 | 7933, |
| 71960 | /* RCL16ri_EVEX */ |
| 71961 | 7936, |
| 71962 | /* RCL16ri_ND */ |
| 71963 | 7939, |
| 71964 | /* RCL32m1 */ |
| 71965 | 7942, |
| 71966 | /* RCL32m1_EVEX */ |
| 71967 | 7943, |
| 71968 | /* RCL32m1_ND */ |
| 71969 | 7944, |
| 71970 | /* RCL32mCL */ |
| 71971 | 7946, |
| 71972 | /* RCL32mCL_EVEX */ |
| 71973 | 7947, |
| 71974 | /* RCL32mCL_ND */ |
| 71975 | 7948, |
| 71976 | /* RCL32mi */ |
| 71977 | 7950, |
| 71978 | /* RCL32mi_EVEX */ |
| 71979 | 7952, |
| 71980 | /* RCL32mi_ND */ |
| 71981 | 7954, |
| 71982 | /* RCL32r1 */ |
| 71983 | 7957, |
| 71984 | /* RCL32r1_EVEX */ |
| 71985 | 7959, |
| 71986 | /* RCL32r1_ND */ |
| 71987 | 7961, |
| 71988 | /* RCL32rCL */ |
| 71989 | 7963, |
| 71990 | /* RCL32rCL_EVEX */ |
| 71991 | 7965, |
| 71992 | /* RCL32rCL_ND */ |
| 71993 | 7967, |
| 71994 | /* RCL32ri */ |
| 71995 | 7969, |
| 71996 | /* RCL32ri_EVEX */ |
| 71997 | 7972, |
| 71998 | /* RCL32ri_ND */ |
| 71999 | 7975, |
| 72000 | /* RCL64m1 */ |
| 72001 | 7978, |
| 72002 | /* RCL64m1_EVEX */ |
| 72003 | 7979, |
| 72004 | /* RCL64m1_ND */ |
| 72005 | 7980, |
| 72006 | /* RCL64mCL */ |
| 72007 | 7982, |
| 72008 | /* RCL64mCL_EVEX */ |
| 72009 | 7983, |
| 72010 | /* RCL64mCL_ND */ |
| 72011 | 7984, |
| 72012 | /* RCL64mi */ |
| 72013 | 7986, |
| 72014 | /* RCL64mi_EVEX */ |
| 72015 | 7988, |
| 72016 | /* RCL64mi_ND */ |
| 72017 | 7990, |
| 72018 | /* RCL64r1 */ |
| 72019 | 7993, |
| 72020 | /* RCL64r1_EVEX */ |
| 72021 | 7995, |
| 72022 | /* RCL64r1_ND */ |
| 72023 | 7997, |
| 72024 | /* RCL64rCL */ |
| 72025 | 7999, |
| 72026 | /* RCL64rCL_EVEX */ |
| 72027 | 8001, |
| 72028 | /* RCL64rCL_ND */ |
| 72029 | 8003, |
| 72030 | /* RCL64ri */ |
| 72031 | 8005, |
| 72032 | /* RCL64ri_EVEX */ |
| 72033 | 8008, |
| 72034 | /* RCL64ri_ND */ |
| 72035 | 8011, |
| 72036 | /* RCL8m1 */ |
| 72037 | 8014, |
| 72038 | /* RCL8m1_EVEX */ |
| 72039 | 8015, |
| 72040 | /* RCL8m1_ND */ |
| 72041 | 8016, |
| 72042 | /* RCL8mCL */ |
| 72043 | 8018, |
| 72044 | /* RCL8mCL_EVEX */ |
| 72045 | 8019, |
| 72046 | /* RCL8mCL_ND */ |
| 72047 | 8020, |
| 72048 | /* RCL8mi */ |
| 72049 | 8022, |
| 72050 | /* RCL8mi_EVEX */ |
| 72051 | 8024, |
| 72052 | /* RCL8mi_ND */ |
| 72053 | 8026, |
| 72054 | /* RCL8r1 */ |
| 72055 | 8029, |
| 72056 | /* RCL8r1_EVEX */ |
| 72057 | 8031, |
| 72058 | /* RCL8r1_ND */ |
| 72059 | 8033, |
| 72060 | /* RCL8rCL */ |
| 72061 | 8035, |
| 72062 | /* RCL8rCL_EVEX */ |
| 72063 | 8037, |
| 72064 | /* RCL8rCL_ND */ |
| 72065 | 8039, |
| 72066 | /* RCL8ri */ |
| 72067 | 8041, |
| 72068 | /* RCL8ri_EVEX */ |
| 72069 | 8044, |
| 72070 | /* RCL8ri_ND */ |
| 72071 | 8047, |
| 72072 | /* RCPPSm */ |
| 72073 | 8050, |
| 72074 | /* RCPPSr */ |
| 72075 | 8052, |
| 72076 | /* RCPSSm */ |
| 72077 | 8054, |
| 72078 | /* RCPSSm_Int */ |
| 72079 | 8056, |
| 72080 | /* RCPSSr */ |
| 72081 | 8059, |
| 72082 | /* RCPSSr_Int */ |
| 72083 | 8061, |
| 72084 | /* RCR16m1 */ |
| 72085 | 8064, |
| 72086 | /* RCR16m1_EVEX */ |
| 72087 | 8065, |
| 72088 | /* RCR16m1_ND */ |
| 72089 | 8066, |
| 72090 | /* RCR16mCL */ |
| 72091 | 8068, |
| 72092 | /* RCR16mCL_EVEX */ |
| 72093 | 8069, |
| 72094 | /* RCR16mCL_ND */ |
| 72095 | 8070, |
| 72096 | /* RCR16mi */ |
| 72097 | 8072, |
| 72098 | /* RCR16mi_EVEX */ |
| 72099 | 8074, |
| 72100 | /* RCR16mi_ND */ |
| 72101 | 8076, |
| 72102 | /* RCR16r1 */ |
| 72103 | 8079, |
| 72104 | /* RCR16r1_EVEX */ |
| 72105 | 8081, |
| 72106 | /* RCR16r1_ND */ |
| 72107 | 8083, |
| 72108 | /* RCR16rCL */ |
| 72109 | 8085, |
| 72110 | /* RCR16rCL_EVEX */ |
| 72111 | 8087, |
| 72112 | /* RCR16rCL_ND */ |
| 72113 | 8089, |
| 72114 | /* RCR16ri */ |
| 72115 | 8091, |
| 72116 | /* RCR16ri_EVEX */ |
| 72117 | 8094, |
| 72118 | /* RCR16ri_ND */ |
| 72119 | 8097, |
| 72120 | /* RCR32m1 */ |
| 72121 | 8100, |
| 72122 | /* RCR32m1_EVEX */ |
| 72123 | 8101, |
| 72124 | /* RCR32m1_ND */ |
| 72125 | 8102, |
| 72126 | /* RCR32mCL */ |
| 72127 | 8104, |
| 72128 | /* RCR32mCL_EVEX */ |
| 72129 | 8105, |
| 72130 | /* RCR32mCL_ND */ |
| 72131 | 8106, |
| 72132 | /* RCR32mi */ |
| 72133 | 8108, |
| 72134 | /* RCR32mi_EVEX */ |
| 72135 | 8110, |
| 72136 | /* RCR32mi_ND */ |
| 72137 | 8112, |
| 72138 | /* RCR32r1 */ |
| 72139 | 8115, |
| 72140 | /* RCR32r1_EVEX */ |
| 72141 | 8117, |
| 72142 | /* RCR32r1_ND */ |
| 72143 | 8119, |
| 72144 | /* RCR32rCL */ |
| 72145 | 8121, |
| 72146 | /* RCR32rCL_EVEX */ |
| 72147 | 8123, |
| 72148 | /* RCR32rCL_ND */ |
| 72149 | 8125, |
| 72150 | /* RCR32ri */ |
| 72151 | 8127, |
| 72152 | /* RCR32ri_EVEX */ |
| 72153 | 8130, |
| 72154 | /* RCR32ri_ND */ |
| 72155 | 8133, |
| 72156 | /* RCR64m1 */ |
| 72157 | 8136, |
| 72158 | /* RCR64m1_EVEX */ |
| 72159 | 8137, |
| 72160 | /* RCR64m1_ND */ |
| 72161 | 8138, |
| 72162 | /* RCR64mCL */ |
| 72163 | 8140, |
| 72164 | /* RCR64mCL_EVEX */ |
| 72165 | 8141, |
| 72166 | /* RCR64mCL_ND */ |
| 72167 | 8142, |
| 72168 | /* RCR64mi */ |
| 72169 | 8144, |
| 72170 | /* RCR64mi_EVEX */ |
| 72171 | 8146, |
| 72172 | /* RCR64mi_ND */ |
| 72173 | 8148, |
| 72174 | /* RCR64r1 */ |
| 72175 | 8151, |
| 72176 | /* RCR64r1_EVEX */ |
| 72177 | 8153, |
| 72178 | /* RCR64r1_ND */ |
| 72179 | 8155, |
| 72180 | /* RCR64rCL */ |
| 72181 | 8157, |
| 72182 | /* RCR64rCL_EVEX */ |
| 72183 | 8159, |
| 72184 | /* RCR64rCL_ND */ |
| 72185 | 8161, |
| 72186 | /* RCR64ri */ |
| 72187 | 8163, |
| 72188 | /* RCR64ri_EVEX */ |
| 72189 | 8166, |
| 72190 | /* RCR64ri_ND */ |
| 72191 | 8169, |
| 72192 | /* RCR8m1 */ |
| 72193 | 8172, |
| 72194 | /* RCR8m1_EVEX */ |
| 72195 | 8173, |
| 72196 | /* RCR8m1_ND */ |
| 72197 | 8174, |
| 72198 | /* RCR8mCL */ |
| 72199 | 8176, |
| 72200 | /* RCR8mCL_EVEX */ |
| 72201 | 8177, |
| 72202 | /* RCR8mCL_ND */ |
| 72203 | 8178, |
| 72204 | /* RCR8mi */ |
| 72205 | 8180, |
| 72206 | /* RCR8mi_EVEX */ |
| 72207 | 8182, |
| 72208 | /* RCR8mi_ND */ |
| 72209 | 8184, |
| 72210 | /* RCR8r1 */ |
| 72211 | 8187, |
| 72212 | /* RCR8r1_EVEX */ |
| 72213 | 8189, |
| 72214 | /* RCR8r1_ND */ |
| 72215 | 8191, |
| 72216 | /* RCR8rCL */ |
| 72217 | 8193, |
| 72218 | /* RCR8rCL_EVEX */ |
| 72219 | 8195, |
| 72220 | /* RCR8rCL_ND */ |
| 72221 | 8197, |
| 72222 | /* RCR8ri */ |
| 72223 | 8199, |
| 72224 | /* RCR8ri_EVEX */ |
| 72225 | 8202, |
| 72226 | /* RCR8ri_ND */ |
| 72227 | 8205, |
| 72228 | /* RDFSBASE */ |
| 72229 | 8208, |
| 72230 | /* RDFSBASE64 */ |
| 72231 | 8209, |
| 72232 | /* RDGSBASE */ |
| 72233 | 8210, |
| 72234 | /* RDGSBASE64 */ |
| 72235 | 8211, |
| 72236 | /* RDMSR */ |
| 72237 | 8212, |
| 72238 | /* RDMSRLIST */ |
| 72239 | 8212, |
| 72240 | /* RDPID32 */ |
| 72241 | 8212, |
| 72242 | /* RDPID64 */ |
| 72243 | 8213, |
| 72244 | /* RDPKRUr */ |
| 72245 | 8214, |
| 72246 | /* RDPMC */ |
| 72247 | 8214, |
| 72248 | /* RDPRU */ |
| 72249 | 8214, |
| 72250 | /* RDRAND16r */ |
| 72251 | 8214, |
| 72252 | /* RDRAND32r */ |
| 72253 | 8215, |
| 72254 | /* RDRAND64r */ |
| 72255 | 8216, |
| 72256 | /* RDSEED16r */ |
| 72257 | 8217, |
| 72258 | /* RDSEED32r */ |
| 72259 | 8218, |
| 72260 | /* RDSEED64r */ |
| 72261 | 8219, |
| 72262 | /* RDSSPD */ |
| 72263 | 8220, |
| 72264 | /* RDSSPQ */ |
| 72265 | 8222, |
| 72266 | /* RDTSC */ |
| 72267 | 8224, |
| 72268 | /* RDTSCP */ |
| 72269 | 8224, |
| 72270 | /* REPNE_PREFIX */ |
| 72271 | 8224, |
| 72272 | /* REP_MOVSB_32 */ |
| 72273 | 8224, |
| 72274 | /* REP_MOVSB_64 */ |
| 72275 | 8224, |
| 72276 | /* REP_MOVSD_32 */ |
| 72277 | 8224, |
| 72278 | /* REP_MOVSD_64 */ |
| 72279 | 8224, |
| 72280 | /* REP_MOVSQ_32 */ |
| 72281 | 8224, |
| 72282 | /* REP_MOVSQ_64 */ |
| 72283 | 8224, |
| 72284 | /* REP_MOVSW_32 */ |
| 72285 | 8224, |
| 72286 | /* REP_MOVSW_64 */ |
| 72287 | 8224, |
| 72288 | /* REP_PREFIX */ |
| 72289 | 8224, |
| 72290 | /* REP_STOSB_32 */ |
| 72291 | 8224, |
| 72292 | /* REP_STOSB_64 */ |
| 72293 | 8224, |
| 72294 | /* REP_STOSD_32 */ |
| 72295 | 8224, |
| 72296 | /* REP_STOSD_64 */ |
| 72297 | 8224, |
| 72298 | /* REP_STOSQ_32 */ |
| 72299 | 8224, |
| 72300 | /* REP_STOSQ_64 */ |
| 72301 | 8224, |
| 72302 | /* REP_STOSW_32 */ |
| 72303 | 8224, |
| 72304 | /* REP_STOSW_64 */ |
| 72305 | 8224, |
| 72306 | /* RET */ |
| 72307 | 8224, |
| 72308 | /* RET16 */ |
| 72309 | 8225, |
| 72310 | /* RET32 */ |
| 72311 | 8225, |
| 72312 | /* RET64 */ |
| 72313 | 8225, |
| 72314 | /* RETI16 */ |
| 72315 | 8225, |
| 72316 | /* RETI32 */ |
| 72317 | 8226, |
| 72318 | /* RETI64 */ |
| 72319 | 8227, |
| 72320 | /* REX64_PREFIX */ |
| 72321 | 8228, |
| 72322 | /* RMPADJUST */ |
| 72323 | 8228, |
| 72324 | /* RMPQUERY */ |
| 72325 | 8228, |
| 72326 | /* RMPUPDATE */ |
| 72327 | 8228, |
| 72328 | /* ROL16m1 */ |
| 72329 | 8228, |
| 72330 | /* ROL16m1_EVEX */ |
| 72331 | 8229, |
| 72332 | /* ROL16m1_ND */ |
| 72333 | 8230, |
| 72334 | /* ROL16m1_NF */ |
| 72335 | 8232, |
| 72336 | /* ROL16m1_NF_ND */ |
| 72337 | 8233, |
| 72338 | /* ROL16mCL */ |
| 72339 | 8235, |
| 72340 | /* ROL16mCL_EVEX */ |
| 72341 | 8236, |
| 72342 | /* ROL16mCL_ND */ |
| 72343 | 8237, |
| 72344 | /* ROL16mCL_NF */ |
| 72345 | 8239, |
| 72346 | /* ROL16mCL_NF_ND */ |
| 72347 | 8240, |
| 72348 | /* ROL16mi */ |
| 72349 | 8242, |
| 72350 | /* ROL16mi_EVEX */ |
| 72351 | 8244, |
| 72352 | /* ROL16mi_ND */ |
| 72353 | 8246, |
| 72354 | /* ROL16mi_NF */ |
| 72355 | 8249, |
| 72356 | /* ROL16mi_NF_ND */ |
| 72357 | 8251, |
| 72358 | /* ROL16r1 */ |
| 72359 | 8254, |
| 72360 | /* ROL16r1_EVEX */ |
| 72361 | 8256, |
| 72362 | /* ROL16r1_ND */ |
| 72363 | 8258, |
| 72364 | /* ROL16r1_NF */ |
| 72365 | 8260, |
| 72366 | /* ROL16r1_NF_ND */ |
| 72367 | 8262, |
| 72368 | /* ROL16rCL */ |
| 72369 | 8264, |
| 72370 | /* ROL16rCL_EVEX */ |
| 72371 | 8266, |
| 72372 | /* ROL16rCL_ND */ |
| 72373 | 8268, |
| 72374 | /* ROL16rCL_NF */ |
| 72375 | 8270, |
| 72376 | /* ROL16rCL_NF_ND */ |
| 72377 | 8272, |
| 72378 | /* ROL16ri */ |
| 72379 | 8274, |
| 72380 | /* ROL16ri_EVEX */ |
| 72381 | 8277, |
| 72382 | /* ROL16ri_ND */ |
| 72383 | 8280, |
| 72384 | /* ROL16ri_NF */ |
| 72385 | 8283, |
| 72386 | /* ROL16ri_NF_ND */ |
| 72387 | 8286, |
| 72388 | /* ROL32m1 */ |
| 72389 | 8289, |
| 72390 | /* ROL32m1_EVEX */ |
| 72391 | 8290, |
| 72392 | /* ROL32m1_ND */ |
| 72393 | 8291, |
| 72394 | /* ROL32m1_NF */ |
| 72395 | 8293, |
| 72396 | /* ROL32m1_NF_ND */ |
| 72397 | 8294, |
| 72398 | /* ROL32mCL */ |
| 72399 | 8296, |
| 72400 | /* ROL32mCL_EVEX */ |
| 72401 | 8297, |
| 72402 | /* ROL32mCL_ND */ |
| 72403 | 8298, |
| 72404 | /* ROL32mCL_NF */ |
| 72405 | 8300, |
| 72406 | /* ROL32mCL_NF_ND */ |
| 72407 | 8301, |
| 72408 | /* ROL32mi */ |
| 72409 | 8303, |
| 72410 | /* ROL32mi_EVEX */ |
| 72411 | 8305, |
| 72412 | /* ROL32mi_ND */ |
| 72413 | 8307, |
| 72414 | /* ROL32mi_NF */ |
| 72415 | 8310, |
| 72416 | /* ROL32mi_NF_ND */ |
| 72417 | 8312, |
| 72418 | /* ROL32r1 */ |
| 72419 | 8315, |
| 72420 | /* ROL32r1_EVEX */ |
| 72421 | 8317, |
| 72422 | /* ROL32r1_ND */ |
| 72423 | 8319, |
| 72424 | /* ROL32r1_NF */ |
| 72425 | 8321, |
| 72426 | /* ROL32r1_NF_ND */ |
| 72427 | 8323, |
| 72428 | /* ROL32rCL */ |
| 72429 | 8325, |
| 72430 | /* ROL32rCL_EVEX */ |
| 72431 | 8327, |
| 72432 | /* ROL32rCL_ND */ |
| 72433 | 8329, |
| 72434 | /* ROL32rCL_NF */ |
| 72435 | 8331, |
| 72436 | /* ROL32rCL_NF_ND */ |
| 72437 | 8333, |
| 72438 | /* ROL32ri */ |
| 72439 | 8335, |
| 72440 | /* ROL32ri_EVEX */ |
| 72441 | 8338, |
| 72442 | /* ROL32ri_ND */ |
| 72443 | 8341, |
| 72444 | /* ROL32ri_NF */ |
| 72445 | 8344, |
| 72446 | /* ROL32ri_NF_ND */ |
| 72447 | 8347, |
| 72448 | /* ROL64m1 */ |
| 72449 | 8350, |
| 72450 | /* ROL64m1_EVEX */ |
| 72451 | 8351, |
| 72452 | /* ROL64m1_ND */ |
| 72453 | 8352, |
| 72454 | /* ROL64m1_NF */ |
| 72455 | 8354, |
| 72456 | /* ROL64m1_NF_ND */ |
| 72457 | 8355, |
| 72458 | /* ROL64mCL */ |
| 72459 | 8357, |
| 72460 | /* ROL64mCL_EVEX */ |
| 72461 | 8358, |
| 72462 | /* ROL64mCL_ND */ |
| 72463 | 8359, |
| 72464 | /* ROL64mCL_NF */ |
| 72465 | 8361, |
| 72466 | /* ROL64mCL_NF_ND */ |
| 72467 | 8362, |
| 72468 | /* ROL64mi */ |
| 72469 | 8364, |
| 72470 | /* ROL64mi_EVEX */ |
| 72471 | 8366, |
| 72472 | /* ROL64mi_ND */ |
| 72473 | 8368, |
| 72474 | /* ROL64mi_NF */ |
| 72475 | 8371, |
| 72476 | /* ROL64mi_NF_ND */ |
| 72477 | 8373, |
| 72478 | /* ROL64r1 */ |
| 72479 | 8376, |
| 72480 | /* ROL64r1_EVEX */ |
| 72481 | 8378, |
| 72482 | /* ROL64r1_ND */ |
| 72483 | 8380, |
| 72484 | /* ROL64r1_NF */ |
| 72485 | 8382, |
| 72486 | /* ROL64r1_NF_ND */ |
| 72487 | 8384, |
| 72488 | /* ROL64rCL */ |
| 72489 | 8386, |
| 72490 | /* ROL64rCL_EVEX */ |
| 72491 | 8388, |
| 72492 | /* ROL64rCL_ND */ |
| 72493 | 8390, |
| 72494 | /* ROL64rCL_NF */ |
| 72495 | 8392, |
| 72496 | /* ROL64rCL_NF_ND */ |
| 72497 | 8394, |
| 72498 | /* ROL64ri */ |
| 72499 | 8396, |
| 72500 | /* ROL64ri_EVEX */ |
| 72501 | 8399, |
| 72502 | /* ROL64ri_ND */ |
| 72503 | 8402, |
| 72504 | /* ROL64ri_NF */ |
| 72505 | 8405, |
| 72506 | /* ROL64ri_NF_ND */ |
| 72507 | 8408, |
| 72508 | /* ROL8m1 */ |
| 72509 | 8411, |
| 72510 | /* ROL8m1_EVEX */ |
| 72511 | 8412, |
| 72512 | /* ROL8m1_ND */ |
| 72513 | 8413, |
| 72514 | /* ROL8m1_NF */ |
| 72515 | 8415, |
| 72516 | /* ROL8m1_NF_ND */ |
| 72517 | 8416, |
| 72518 | /* ROL8mCL */ |
| 72519 | 8418, |
| 72520 | /* ROL8mCL_EVEX */ |
| 72521 | 8419, |
| 72522 | /* ROL8mCL_ND */ |
| 72523 | 8420, |
| 72524 | /* ROL8mCL_NF */ |
| 72525 | 8422, |
| 72526 | /* ROL8mCL_NF_ND */ |
| 72527 | 8423, |
| 72528 | /* ROL8mi */ |
| 72529 | 8425, |
| 72530 | /* ROL8mi_EVEX */ |
| 72531 | 8427, |
| 72532 | /* ROL8mi_ND */ |
| 72533 | 8429, |
| 72534 | /* ROL8mi_NF */ |
| 72535 | 8432, |
| 72536 | /* ROL8mi_NF_ND */ |
| 72537 | 8434, |
| 72538 | /* ROL8r1 */ |
| 72539 | 8437, |
| 72540 | /* ROL8r1_EVEX */ |
| 72541 | 8439, |
| 72542 | /* ROL8r1_ND */ |
| 72543 | 8441, |
| 72544 | /* ROL8r1_NF */ |
| 72545 | 8443, |
| 72546 | /* ROL8r1_NF_ND */ |
| 72547 | 8445, |
| 72548 | /* ROL8rCL */ |
| 72549 | 8447, |
| 72550 | /* ROL8rCL_EVEX */ |
| 72551 | 8449, |
| 72552 | /* ROL8rCL_ND */ |
| 72553 | 8451, |
| 72554 | /* ROL8rCL_NF */ |
| 72555 | 8453, |
| 72556 | /* ROL8rCL_NF_ND */ |
| 72557 | 8455, |
| 72558 | /* ROL8ri */ |
| 72559 | 8457, |
| 72560 | /* ROL8ri_EVEX */ |
| 72561 | 8460, |
| 72562 | /* ROL8ri_ND */ |
| 72563 | 8463, |
| 72564 | /* ROL8ri_NF */ |
| 72565 | 8466, |
| 72566 | /* ROL8ri_NF_ND */ |
| 72567 | 8469, |
| 72568 | /* ROR16m1 */ |
| 72569 | 8472, |
| 72570 | /* ROR16m1_EVEX */ |
| 72571 | 8473, |
| 72572 | /* ROR16m1_ND */ |
| 72573 | 8474, |
| 72574 | /* ROR16m1_NF */ |
| 72575 | 8476, |
| 72576 | /* ROR16m1_NF_ND */ |
| 72577 | 8477, |
| 72578 | /* ROR16mCL */ |
| 72579 | 8479, |
| 72580 | /* ROR16mCL_EVEX */ |
| 72581 | 8480, |
| 72582 | /* ROR16mCL_ND */ |
| 72583 | 8481, |
| 72584 | /* ROR16mCL_NF */ |
| 72585 | 8483, |
| 72586 | /* ROR16mCL_NF_ND */ |
| 72587 | 8484, |
| 72588 | /* ROR16mi */ |
| 72589 | 8486, |
| 72590 | /* ROR16mi_EVEX */ |
| 72591 | 8488, |
| 72592 | /* ROR16mi_ND */ |
| 72593 | 8490, |
| 72594 | /* ROR16mi_NF */ |
| 72595 | 8493, |
| 72596 | /* ROR16mi_NF_ND */ |
| 72597 | 8495, |
| 72598 | /* ROR16r1 */ |
| 72599 | 8498, |
| 72600 | /* ROR16r1_EVEX */ |
| 72601 | 8500, |
| 72602 | /* ROR16r1_ND */ |
| 72603 | 8502, |
| 72604 | /* ROR16r1_NF */ |
| 72605 | 8504, |
| 72606 | /* ROR16r1_NF_ND */ |
| 72607 | 8506, |
| 72608 | /* ROR16rCL */ |
| 72609 | 8508, |
| 72610 | /* ROR16rCL_EVEX */ |
| 72611 | 8510, |
| 72612 | /* ROR16rCL_ND */ |
| 72613 | 8512, |
| 72614 | /* ROR16rCL_NF */ |
| 72615 | 8514, |
| 72616 | /* ROR16rCL_NF_ND */ |
| 72617 | 8516, |
| 72618 | /* ROR16ri */ |
| 72619 | 8518, |
| 72620 | /* ROR16ri_EVEX */ |
| 72621 | 8521, |
| 72622 | /* ROR16ri_ND */ |
| 72623 | 8524, |
| 72624 | /* ROR16ri_NF */ |
| 72625 | 8527, |
| 72626 | /* ROR16ri_NF_ND */ |
| 72627 | 8530, |
| 72628 | /* ROR32m1 */ |
| 72629 | 8533, |
| 72630 | /* ROR32m1_EVEX */ |
| 72631 | 8534, |
| 72632 | /* ROR32m1_ND */ |
| 72633 | 8535, |
| 72634 | /* ROR32m1_NF */ |
| 72635 | 8537, |
| 72636 | /* ROR32m1_NF_ND */ |
| 72637 | 8538, |
| 72638 | /* ROR32mCL */ |
| 72639 | 8540, |
| 72640 | /* ROR32mCL_EVEX */ |
| 72641 | 8541, |
| 72642 | /* ROR32mCL_ND */ |
| 72643 | 8542, |
| 72644 | /* ROR32mCL_NF */ |
| 72645 | 8544, |
| 72646 | /* ROR32mCL_NF_ND */ |
| 72647 | 8545, |
| 72648 | /* ROR32mi */ |
| 72649 | 8547, |
| 72650 | /* ROR32mi_EVEX */ |
| 72651 | 8549, |
| 72652 | /* ROR32mi_ND */ |
| 72653 | 8551, |
| 72654 | /* ROR32mi_NF */ |
| 72655 | 8554, |
| 72656 | /* ROR32mi_NF_ND */ |
| 72657 | 8556, |
| 72658 | /* ROR32r1 */ |
| 72659 | 8559, |
| 72660 | /* ROR32r1_EVEX */ |
| 72661 | 8561, |
| 72662 | /* ROR32r1_ND */ |
| 72663 | 8563, |
| 72664 | /* ROR32r1_NF */ |
| 72665 | 8565, |
| 72666 | /* ROR32r1_NF_ND */ |
| 72667 | 8567, |
| 72668 | /* ROR32rCL */ |
| 72669 | 8569, |
| 72670 | /* ROR32rCL_EVEX */ |
| 72671 | 8571, |
| 72672 | /* ROR32rCL_ND */ |
| 72673 | 8573, |
| 72674 | /* ROR32rCL_NF */ |
| 72675 | 8575, |
| 72676 | /* ROR32rCL_NF_ND */ |
| 72677 | 8577, |
| 72678 | /* ROR32ri */ |
| 72679 | 8579, |
| 72680 | /* ROR32ri_EVEX */ |
| 72681 | 8582, |
| 72682 | /* ROR32ri_ND */ |
| 72683 | 8585, |
| 72684 | /* ROR32ri_NF */ |
| 72685 | 8588, |
| 72686 | /* ROR32ri_NF_ND */ |
| 72687 | 8591, |
| 72688 | /* ROR64m1 */ |
| 72689 | 8594, |
| 72690 | /* ROR64m1_EVEX */ |
| 72691 | 8595, |
| 72692 | /* ROR64m1_ND */ |
| 72693 | 8596, |
| 72694 | /* ROR64m1_NF */ |
| 72695 | 8598, |
| 72696 | /* ROR64m1_NF_ND */ |
| 72697 | 8599, |
| 72698 | /* ROR64mCL */ |
| 72699 | 8601, |
| 72700 | /* ROR64mCL_EVEX */ |
| 72701 | 8602, |
| 72702 | /* ROR64mCL_ND */ |
| 72703 | 8603, |
| 72704 | /* ROR64mCL_NF */ |
| 72705 | 8605, |
| 72706 | /* ROR64mCL_NF_ND */ |
| 72707 | 8606, |
| 72708 | /* ROR64mi */ |
| 72709 | 8608, |
| 72710 | /* ROR64mi_EVEX */ |
| 72711 | 8610, |
| 72712 | /* ROR64mi_ND */ |
| 72713 | 8612, |
| 72714 | /* ROR64mi_NF */ |
| 72715 | 8615, |
| 72716 | /* ROR64mi_NF_ND */ |
| 72717 | 8617, |
| 72718 | /* ROR64r1 */ |
| 72719 | 8620, |
| 72720 | /* ROR64r1_EVEX */ |
| 72721 | 8622, |
| 72722 | /* ROR64r1_ND */ |
| 72723 | 8624, |
| 72724 | /* ROR64r1_NF */ |
| 72725 | 8626, |
| 72726 | /* ROR64r1_NF_ND */ |
| 72727 | 8628, |
| 72728 | /* ROR64rCL */ |
| 72729 | 8630, |
| 72730 | /* ROR64rCL_EVEX */ |
| 72731 | 8632, |
| 72732 | /* ROR64rCL_ND */ |
| 72733 | 8634, |
| 72734 | /* ROR64rCL_NF */ |
| 72735 | 8636, |
| 72736 | /* ROR64rCL_NF_ND */ |
| 72737 | 8638, |
| 72738 | /* ROR64ri */ |
| 72739 | 8640, |
| 72740 | /* ROR64ri_EVEX */ |
| 72741 | 8643, |
| 72742 | /* ROR64ri_ND */ |
| 72743 | 8646, |
| 72744 | /* ROR64ri_NF */ |
| 72745 | 8649, |
| 72746 | /* ROR64ri_NF_ND */ |
| 72747 | 8652, |
| 72748 | /* ROR8m1 */ |
| 72749 | 8655, |
| 72750 | /* ROR8m1_EVEX */ |
| 72751 | 8656, |
| 72752 | /* ROR8m1_ND */ |
| 72753 | 8657, |
| 72754 | /* ROR8m1_NF */ |
| 72755 | 8659, |
| 72756 | /* ROR8m1_NF_ND */ |
| 72757 | 8660, |
| 72758 | /* ROR8mCL */ |
| 72759 | 8662, |
| 72760 | /* ROR8mCL_EVEX */ |
| 72761 | 8663, |
| 72762 | /* ROR8mCL_ND */ |
| 72763 | 8664, |
| 72764 | /* ROR8mCL_NF */ |
| 72765 | 8666, |
| 72766 | /* ROR8mCL_NF_ND */ |
| 72767 | 8667, |
| 72768 | /* ROR8mi */ |
| 72769 | 8669, |
| 72770 | /* ROR8mi_EVEX */ |
| 72771 | 8671, |
| 72772 | /* ROR8mi_ND */ |
| 72773 | 8673, |
| 72774 | /* ROR8mi_NF */ |
| 72775 | 8676, |
| 72776 | /* ROR8mi_NF_ND */ |
| 72777 | 8678, |
| 72778 | /* ROR8r1 */ |
| 72779 | 8681, |
| 72780 | /* ROR8r1_EVEX */ |
| 72781 | 8683, |
| 72782 | /* ROR8r1_ND */ |
| 72783 | 8685, |
| 72784 | /* ROR8r1_NF */ |
| 72785 | 8687, |
| 72786 | /* ROR8r1_NF_ND */ |
| 72787 | 8689, |
| 72788 | /* ROR8rCL */ |
| 72789 | 8691, |
| 72790 | /* ROR8rCL_EVEX */ |
| 72791 | 8693, |
| 72792 | /* ROR8rCL_ND */ |
| 72793 | 8695, |
| 72794 | /* ROR8rCL_NF */ |
| 72795 | 8697, |
| 72796 | /* ROR8rCL_NF_ND */ |
| 72797 | 8699, |
| 72798 | /* ROR8ri */ |
| 72799 | 8701, |
| 72800 | /* ROR8ri_EVEX */ |
| 72801 | 8704, |
| 72802 | /* ROR8ri_ND */ |
| 72803 | 8707, |
| 72804 | /* ROR8ri_NF */ |
| 72805 | 8710, |
| 72806 | /* ROR8ri_NF_ND */ |
| 72807 | 8713, |
| 72808 | /* RORX32mi */ |
| 72809 | 8716, |
| 72810 | /* RORX32mi_EVEX */ |
| 72811 | 8719, |
| 72812 | /* RORX32ri */ |
| 72813 | 8722, |
| 72814 | /* RORX32ri_EVEX */ |
| 72815 | 8725, |
| 72816 | /* RORX64mi */ |
| 72817 | 8728, |
| 72818 | /* RORX64mi_EVEX */ |
| 72819 | 8731, |
| 72820 | /* RORX64ri */ |
| 72821 | 8734, |
| 72822 | /* RORX64ri_EVEX */ |
| 72823 | 8737, |
| 72824 | /* ROUNDPDmi */ |
| 72825 | 8740, |
| 72826 | /* ROUNDPDri */ |
| 72827 | 8743, |
| 72828 | /* ROUNDPSmi */ |
| 72829 | 8746, |
| 72830 | /* ROUNDPSri */ |
| 72831 | 8749, |
| 72832 | /* ROUNDSDmi */ |
| 72833 | 8752, |
| 72834 | /* ROUNDSDmi_Int */ |
| 72835 | 8755, |
| 72836 | /* ROUNDSDri */ |
| 72837 | 8759, |
| 72838 | /* ROUNDSDri_Int */ |
| 72839 | 8762, |
| 72840 | /* ROUNDSSmi */ |
| 72841 | 8766, |
| 72842 | /* ROUNDSSmi_Int */ |
| 72843 | 8769, |
| 72844 | /* ROUNDSSri */ |
| 72845 | 8773, |
| 72846 | /* ROUNDSSri_Int */ |
| 72847 | 8776, |
| 72848 | /* RSM */ |
| 72849 | 8780, |
| 72850 | /* RSQRTPSm */ |
| 72851 | 8780, |
| 72852 | /* RSQRTPSr */ |
| 72853 | 8782, |
| 72854 | /* RSQRTSSm */ |
| 72855 | 8784, |
| 72856 | /* RSQRTSSm_Int */ |
| 72857 | 8786, |
| 72858 | /* RSQRTSSr */ |
| 72859 | 8789, |
| 72860 | /* RSQRTSSr_Int */ |
| 72861 | 8791, |
| 72862 | /* RSTORSSP */ |
| 72863 | 8794, |
| 72864 | /* SAHF */ |
| 72865 | 8795, |
| 72866 | /* SALC */ |
| 72867 | 8795, |
| 72868 | /* SAR16m1 */ |
| 72869 | 8795, |
| 72870 | /* SAR16m1_EVEX */ |
| 72871 | 8796, |
| 72872 | /* SAR16m1_ND */ |
| 72873 | 8797, |
| 72874 | /* SAR16m1_NF */ |
| 72875 | 8799, |
| 72876 | /* SAR16m1_NF_ND */ |
| 72877 | 8800, |
| 72878 | /* SAR16mCL */ |
| 72879 | 8802, |
| 72880 | /* SAR16mCL_EVEX */ |
| 72881 | 8803, |
| 72882 | /* SAR16mCL_ND */ |
| 72883 | 8804, |
| 72884 | /* SAR16mCL_NF */ |
| 72885 | 8806, |
| 72886 | /* SAR16mCL_NF_ND */ |
| 72887 | 8807, |
| 72888 | /* SAR16mi */ |
| 72889 | 8809, |
| 72890 | /* SAR16mi_EVEX */ |
| 72891 | 8811, |
| 72892 | /* SAR16mi_ND */ |
| 72893 | 8813, |
| 72894 | /* SAR16mi_NF */ |
| 72895 | 8816, |
| 72896 | /* SAR16mi_NF_ND */ |
| 72897 | 8818, |
| 72898 | /* SAR16r1 */ |
| 72899 | 8821, |
| 72900 | /* SAR16r1_EVEX */ |
| 72901 | 8823, |
| 72902 | /* SAR16r1_ND */ |
| 72903 | 8825, |
| 72904 | /* SAR16r1_NF */ |
| 72905 | 8827, |
| 72906 | /* SAR16r1_NF_ND */ |
| 72907 | 8829, |
| 72908 | /* SAR16rCL */ |
| 72909 | 8831, |
| 72910 | /* SAR16rCL_EVEX */ |
| 72911 | 8833, |
| 72912 | /* SAR16rCL_ND */ |
| 72913 | 8835, |
| 72914 | /* SAR16rCL_NF */ |
| 72915 | 8837, |
| 72916 | /* SAR16rCL_NF_ND */ |
| 72917 | 8839, |
| 72918 | /* SAR16ri */ |
| 72919 | 8841, |
| 72920 | /* SAR16ri_EVEX */ |
| 72921 | 8844, |
| 72922 | /* SAR16ri_ND */ |
| 72923 | 8847, |
| 72924 | /* SAR16ri_NF */ |
| 72925 | 8850, |
| 72926 | /* SAR16ri_NF_ND */ |
| 72927 | 8853, |
| 72928 | /* SAR32m1 */ |
| 72929 | 8856, |
| 72930 | /* SAR32m1_EVEX */ |
| 72931 | 8857, |
| 72932 | /* SAR32m1_ND */ |
| 72933 | 8858, |
| 72934 | /* SAR32m1_NF */ |
| 72935 | 8860, |
| 72936 | /* SAR32m1_NF_ND */ |
| 72937 | 8861, |
| 72938 | /* SAR32mCL */ |
| 72939 | 8863, |
| 72940 | /* SAR32mCL_EVEX */ |
| 72941 | 8864, |
| 72942 | /* SAR32mCL_ND */ |
| 72943 | 8865, |
| 72944 | /* SAR32mCL_NF */ |
| 72945 | 8867, |
| 72946 | /* SAR32mCL_NF_ND */ |
| 72947 | 8868, |
| 72948 | /* SAR32mi */ |
| 72949 | 8870, |
| 72950 | /* SAR32mi_EVEX */ |
| 72951 | 8872, |
| 72952 | /* SAR32mi_ND */ |
| 72953 | 8874, |
| 72954 | /* SAR32mi_NF */ |
| 72955 | 8877, |
| 72956 | /* SAR32mi_NF_ND */ |
| 72957 | 8879, |
| 72958 | /* SAR32r1 */ |
| 72959 | 8882, |
| 72960 | /* SAR32r1_EVEX */ |
| 72961 | 8884, |
| 72962 | /* SAR32r1_ND */ |
| 72963 | 8886, |
| 72964 | /* SAR32r1_NF */ |
| 72965 | 8888, |
| 72966 | /* SAR32r1_NF_ND */ |
| 72967 | 8890, |
| 72968 | /* SAR32rCL */ |
| 72969 | 8892, |
| 72970 | /* SAR32rCL_EVEX */ |
| 72971 | 8894, |
| 72972 | /* SAR32rCL_ND */ |
| 72973 | 8896, |
| 72974 | /* SAR32rCL_NF */ |
| 72975 | 8898, |
| 72976 | /* SAR32rCL_NF_ND */ |
| 72977 | 8900, |
| 72978 | /* SAR32ri */ |
| 72979 | 8902, |
| 72980 | /* SAR32ri_EVEX */ |
| 72981 | 8905, |
| 72982 | /* SAR32ri_ND */ |
| 72983 | 8908, |
| 72984 | /* SAR32ri_NF */ |
| 72985 | 8911, |
| 72986 | /* SAR32ri_NF_ND */ |
| 72987 | 8914, |
| 72988 | /* SAR64m1 */ |
| 72989 | 8917, |
| 72990 | /* SAR64m1_EVEX */ |
| 72991 | 8918, |
| 72992 | /* SAR64m1_ND */ |
| 72993 | 8919, |
| 72994 | /* SAR64m1_NF */ |
| 72995 | 8921, |
| 72996 | /* SAR64m1_NF_ND */ |
| 72997 | 8922, |
| 72998 | /* SAR64mCL */ |
| 72999 | 8924, |
| 73000 | /* SAR64mCL_EVEX */ |
| 73001 | 8925, |
| 73002 | /* SAR64mCL_ND */ |
| 73003 | 8926, |
| 73004 | /* SAR64mCL_NF */ |
| 73005 | 8928, |
| 73006 | /* SAR64mCL_NF_ND */ |
| 73007 | 8929, |
| 73008 | /* SAR64mi */ |
| 73009 | 8931, |
| 73010 | /* SAR64mi_EVEX */ |
| 73011 | 8933, |
| 73012 | /* SAR64mi_ND */ |
| 73013 | 8935, |
| 73014 | /* SAR64mi_NF */ |
| 73015 | 8938, |
| 73016 | /* SAR64mi_NF_ND */ |
| 73017 | 8940, |
| 73018 | /* SAR64r1 */ |
| 73019 | 8943, |
| 73020 | /* SAR64r1_EVEX */ |
| 73021 | 8945, |
| 73022 | /* SAR64r1_ND */ |
| 73023 | 8947, |
| 73024 | /* SAR64r1_NF */ |
| 73025 | 8949, |
| 73026 | /* SAR64r1_NF_ND */ |
| 73027 | 8951, |
| 73028 | /* SAR64rCL */ |
| 73029 | 8953, |
| 73030 | /* SAR64rCL_EVEX */ |
| 73031 | 8955, |
| 73032 | /* SAR64rCL_ND */ |
| 73033 | 8957, |
| 73034 | /* SAR64rCL_NF */ |
| 73035 | 8959, |
| 73036 | /* SAR64rCL_NF_ND */ |
| 73037 | 8961, |
| 73038 | /* SAR64ri */ |
| 73039 | 8963, |
| 73040 | /* SAR64ri_EVEX */ |
| 73041 | 8966, |
| 73042 | /* SAR64ri_ND */ |
| 73043 | 8969, |
| 73044 | /* SAR64ri_NF */ |
| 73045 | 8972, |
| 73046 | /* SAR64ri_NF_ND */ |
| 73047 | 8975, |
| 73048 | /* SAR8m1 */ |
| 73049 | 8978, |
| 73050 | /* SAR8m1_EVEX */ |
| 73051 | 8979, |
| 73052 | /* SAR8m1_ND */ |
| 73053 | 8980, |
| 73054 | /* SAR8m1_NF */ |
| 73055 | 8982, |
| 73056 | /* SAR8m1_NF_ND */ |
| 73057 | 8983, |
| 73058 | /* SAR8mCL */ |
| 73059 | 8985, |
| 73060 | /* SAR8mCL_EVEX */ |
| 73061 | 8986, |
| 73062 | /* SAR8mCL_ND */ |
| 73063 | 8987, |
| 73064 | /* SAR8mCL_NF */ |
| 73065 | 8989, |
| 73066 | /* SAR8mCL_NF_ND */ |
| 73067 | 8990, |
| 73068 | /* SAR8mi */ |
| 73069 | 8992, |
| 73070 | /* SAR8mi_EVEX */ |
| 73071 | 8994, |
| 73072 | /* SAR8mi_ND */ |
| 73073 | 8996, |
| 73074 | /* SAR8mi_NF */ |
| 73075 | 8999, |
| 73076 | /* SAR8mi_NF_ND */ |
| 73077 | 9001, |
| 73078 | /* SAR8r1 */ |
| 73079 | 9004, |
| 73080 | /* SAR8r1_EVEX */ |
| 73081 | 9006, |
| 73082 | /* SAR8r1_ND */ |
| 73083 | 9008, |
| 73084 | /* SAR8r1_NF */ |
| 73085 | 9010, |
| 73086 | /* SAR8r1_NF_ND */ |
| 73087 | 9012, |
| 73088 | /* SAR8rCL */ |
| 73089 | 9014, |
| 73090 | /* SAR8rCL_EVEX */ |
| 73091 | 9016, |
| 73092 | /* SAR8rCL_ND */ |
| 73093 | 9018, |
| 73094 | /* SAR8rCL_NF */ |
| 73095 | 9020, |
| 73096 | /* SAR8rCL_NF_ND */ |
| 73097 | 9022, |
| 73098 | /* SAR8ri */ |
| 73099 | 9024, |
| 73100 | /* SAR8ri_EVEX */ |
| 73101 | 9027, |
| 73102 | /* SAR8ri_ND */ |
| 73103 | 9030, |
| 73104 | /* SAR8ri_NF */ |
| 73105 | 9033, |
| 73106 | /* SAR8ri_NF_ND */ |
| 73107 | 9036, |
| 73108 | /* SARX32rm */ |
| 73109 | 9039, |
| 73110 | /* SARX32rm_EVEX */ |
| 73111 | 9042, |
| 73112 | /* SARX32rr */ |
| 73113 | 9045, |
| 73114 | /* SARX32rr_EVEX */ |
| 73115 | 9048, |
| 73116 | /* SARX64rm */ |
| 73117 | 9051, |
| 73118 | /* SARX64rm_EVEX */ |
| 73119 | 9054, |
| 73120 | /* SARX64rr */ |
| 73121 | 9057, |
| 73122 | /* SARX64rr_EVEX */ |
| 73123 | 9060, |
| 73124 | /* SAVEPREVSSP */ |
| 73125 | 9063, |
| 73126 | /* SBB16i16 */ |
| 73127 | 9063, |
| 73128 | /* SBB16mi */ |
| 73129 | 9064, |
| 73130 | /* SBB16mi8 */ |
| 73131 | 9066, |
| 73132 | /* SBB16mi8_EVEX */ |
| 73133 | 9068, |
| 73134 | /* SBB16mi8_ND */ |
| 73135 | 9070, |
| 73136 | /* SBB16mi_EVEX */ |
| 73137 | 9073, |
| 73138 | /* SBB16mi_ND */ |
| 73139 | 9075, |
| 73140 | /* SBB16mr */ |
| 73141 | 9078, |
| 73142 | /* SBB16mr_EVEX */ |
| 73143 | 9080, |
| 73144 | /* SBB16mr_ND */ |
| 73145 | 9082, |
| 73146 | /* SBB16ri */ |
| 73147 | 9085, |
| 73148 | /* SBB16ri8 */ |
| 73149 | 9088, |
| 73150 | /* SBB16ri8_EVEX */ |
| 73151 | 9091, |
| 73152 | /* SBB16ri8_ND */ |
| 73153 | 9094, |
| 73154 | /* SBB16ri_EVEX */ |
| 73155 | 9097, |
| 73156 | /* SBB16ri_ND */ |
| 73157 | 9100, |
| 73158 | /* SBB16rm */ |
| 73159 | 9103, |
| 73160 | /* SBB16rm_EVEX */ |
| 73161 | 9106, |
| 73162 | /* SBB16rm_ND */ |
| 73163 | 9109, |
| 73164 | /* SBB16rr */ |
| 73165 | 9112, |
| 73166 | /* SBB16rr_EVEX */ |
| 73167 | 9115, |
| 73168 | /* SBB16rr_EVEX_REV */ |
| 73169 | 9118, |
| 73170 | /* SBB16rr_ND */ |
| 73171 | 9121, |
| 73172 | /* SBB16rr_ND_REV */ |
| 73173 | 9124, |
| 73174 | /* SBB16rr_REV */ |
| 73175 | 9127, |
| 73176 | /* SBB32i32 */ |
| 73177 | 9130, |
| 73178 | /* SBB32mi */ |
| 73179 | 9131, |
| 73180 | /* SBB32mi8 */ |
| 73181 | 9133, |
| 73182 | /* SBB32mi8_EVEX */ |
| 73183 | 9135, |
| 73184 | /* SBB32mi8_ND */ |
| 73185 | 9137, |
| 73186 | /* SBB32mi_EVEX */ |
| 73187 | 9140, |
| 73188 | /* SBB32mi_ND */ |
| 73189 | 9142, |
| 73190 | /* SBB32mr */ |
| 73191 | 9145, |
| 73192 | /* SBB32mr_EVEX */ |
| 73193 | 9147, |
| 73194 | /* SBB32mr_ND */ |
| 73195 | 9149, |
| 73196 | /* SBB32ri */ |
| 73197 | 9152, |
| 73198 | /* SBB32ri8 */ |
| 73199 | 9155, |
| 73200 | /* SBB32ri8_EVEX */ |
| 73201 | 9158, |
| 73202 | /* SBB32ri8_ND */ |
| 73203 | 9161, |
| 73204 | /* SBB32ri_EVEX */ |
| 73205 | 9164, |
| 73206 | /* SBB32ri_ND */ |
| 73207 | 9167, |
| 73208 | /* SBB32rm */ |
| 73209 | 9170, |
| 73210 | /* SBB32rm_EVEX */ |
| 73211 | 9173, |
| 73212 | /* SBB32rm_ND */ |
| 73213 | 9176, |
| 73214 | /* SBB32rr */ |
| 73215 | 9179, |
| 73216 | /* SBB32rr_EVEX */ |
| 73217 | 9182, |
| 73218 | /* SBB32rr_EVEX_REV */ |
| 73219 | 9185, |
| 73220 | /* SBB32rr_ND */ |
| 73221 | 9188, |
| 73222 | /* SBB32rr_ND_REV */ |
| 73223 | 9191, |
| 73224 | /* SBB32rr_REV */ |
| 73225 | 9194, |
| 73226 | /* SBB64i32 */ |
| 73227 | 9197, |
| 73228 | /* SBB64mi32 */ |
| 73229 | 9198, |
| 73230 | /* SBB64mi32_EVEX */ |
| 73231 | 9200, |
| 73232 | /* SBB64mi32_ND */ |
| 73233 | 9202, |
| 73234 | /* SBB64mi8 */ |
| 73235 | 9205, |
| 73236 | /* SBB64mi8_EVEX */ |
| 73237 | 9207, |
| 73238 | /* SBB64mi8_ND */ |
| 73239 | 9209, |
| 73240 | /* SBB64mr */ |
| 73241 | 9212, |
| 73242 | /* SBB64mr_EVEX */ |
| 73243 | 9214, |
| 73244 | /* SBB64mr_ND */ |
| 73245 | 9216, |
| 73246 | /* SBB64ri32 */ |
| 73247 | 9219, |
| 73248 | /* SBB64ri32_EVEX */ |
| 73249 | 9222, |
| 73250 | /* SBB64ri32_ND */ |
| 73251 | 9225, |
| 73252 | /* SBB64ri8 */ |
| 73253 | 9228, |
| 73254 | /* SBB64ri8_EVEX */ |
| 73255 | 9231, |
| 73256 | /* SBB64ri8_ND */ |
| 73257 | 9234, |
| 73258 | /* SBB64rm */ |
| 73259 | 9237, |
| 73260 | /* SBB64rm_EVEX */ |
| 73261 | 9240, |
| 73262 | /* SBB64rm_ND */ |
| 73263 | 9243, |
| 73264 | /* SBB64rr */ |
| 73265 | 9246, |
| 73266 | /* SBB64rr_EVEX */ |
| 73267 | 9249, |
| 73268 | /* SBB64rr_EVEX_REV */ |
| 73269 | 9252, |
| 73270 | /* SBB64rr_ND */ |
| 73271 | 9255, |
| 73272 | /* SBB64rr_ND_REV */ |
| 73273 | 9258, |
| 73274 | /* SBB64rr_REV */ |
| 73275 | 9261, |
| 73276 | /* SBB8i8 */ |
| 73277 | 9264, |
| 73278 | /* SBB8mi */ |
| 73279 | 9265, |
| 73280 | /* SBB8mi8 */ |
| 73281 | 9267, |
| 73282 | /* SBB8mi_EVEX */ |
| 73283 | 9269, |
| 73284 | /* SBB8mi_ND */ |
| 73285 | 9271, |
| 73286 | /* SBB8mr */ |
| 73287 | 9274, |
| 73288 | /* SBB8mr_EVEX */ |
| 73289 | 9276, |
| 73290 | /* SBB8mr_ND */ |
| 73291 | 9278, |
| 73292 | /* SBB8ri */ |
| 73293 | 9281, |
| 73294 | /* SBB8ri8 */ |
| 73295 | 9284, |
| 73296 | /* SBB8ri_EVEX */ |
| 73297 | 9287, |
| 73298 | /* SBB8ri_ND */ |
| 73299 | 9290, |
| 73300 | /* SBB8rm */ |
| 73301 | 9293, |
| 73302 | /* SBB8rm_EVEX */ |
| 73303 | 9296, |
| 73304 | /* SBB8rm_ND */ |
| 73305 | 9299, |
| 73306 | /* SBB8rr */ |
| 73307 | 9302, |
| 73308 | /* SBB8rr_EVEX */ |
| 73309 | 9305, |
| 73310 | /* SBB8rr_EVEX_REV */ |
| 73311 | 9308, |
| 73312 | /* SBB8rr_ND */ |
| 73313 | 9311, |
| 73314 | /* SBB8rr_ND_REV */ |
| 73315 | 9314, |
| 73316 | /* SBB8rr_REV */ |
| 73317 | 9317, |
| 73318 | /* SCASB */ |
| 73319 | 9320, |
| 73320 | /* SCASL */ |
| 73321 | 9321, |
| 73322 | /* SCASQ */ |
| 73323 | 9322, |
| 73324 | /* SCASW */ |
| 73325 | 9323, |
| 73326 | /* SEAMCALL */ |
| 73327 | 9324, |
| 73328 | /* SEAMOPS */ |
| 73329 | 9324, |
| 73330 | /* SEAMRET */ |
| 73331 | 9324, |
| 73332 | /* SEG_ALLOCA_32 */ |
| 73333 | 9324, |
| 73334 | /* SEG_ALLOCA_64 */ |
| 73335 | 9326, |
| 73336 | /* SENDUIPI */ |
| 73337 | 9328, |
| 73338 | /* SERIALIZE */ |
| 73339 | 9329, |
| 73340 | /* SETCCm */ |
| 73341 | 9329, |
| 73342 | /* SETCCm_EVEX */ |
| 73343 | 9331, |
| 73344 | /* SETCCr */ |
| 73345 | 9333, |
| 73346 | /* SETCCr_EVEX */ |
| 73347 | 9335, |
| 73348 | /* SETSSBSY */ |
| 73349 | 9337, |
| 73350 | /* SETZUCCm */ |
| 73351 | 9337, |
| 73352 | /* SETZUCCr */ |
| 73353 | 9339, |
| 73354 | /* SFENCE */ |
| 73355 | 9341, |
| 73356 | /* SGDT16m */ |
| 73357 | 9341, |
| 73358 | /* SGDT32m */ |
| 73359 | 9342, |
| 73360 | /* SGDT64m */ |
| 73361 | 9343, |
| 73362 | /* SHA1MSG1rm */ |
| 73363 | 9344, |
| 73364 | /* SHA1MSG1rr */ |
| 73365 | 9347, |
| 73366 | /* SHA1MSG2rm */ |
| 73367 | 9350, |
| 73368 | /* SHA1MSG2rr */ |
| 73369 | 9353, |
| 73370 | /* SHA1NEXTErm */ |
| 73371 | 9356, |
| 73372 | /* SHA1NEXTErr */ |
| 73373 | 9359, |
| 73374 | /* SHA1RNDS4rmi */ |
| 73375 | 9362, |
| 73376 | /* SHA1RNDS4rri */ |
| 73377 | 9366, |
| 73378 | /* SHA256MSG1rm */ |
| 73379 | 9370, |
| 73380 | /* SHA256MSG1rr */ |
| 73381 | 9373, |
| 73382 | /* SHA256MSG2rm */ |
| 73383 | 9376, |
| 73384 | /* SHA256MSG2rr */ |
| 73385 | 9379, |
| 73386 | /* SHA256RNDS2rm */ |
| 73387 | 9382, |
| 73388 | /* SHA256RNDS2rr */ |
| 73389 | 9385, |
| 73390 | /* SHL16m1 */ |
| 73391 | 9388, |
| 73392 | /* SHL16m1_EVEX */ |
| 73393 | 9389, |
| 73394 | /* SHL16m1_ND */ |
| 73395 | 9390, |
| 73396 | /* SHL16m1_NF */ |
| 73397 | 9392, |
| 73398 | /* SHL16m1_NF_ND */ |
| 73399 | 9393, |
| 73400 | /* SHL16mCL */ |
| 73401 | 9395, |
| 73402 | /* SHL16mCL_EVEX */ |
| 73403 | 9396, |
| 73404 | /* SHL16mCL_ND */ |
| 73405 | 9397, |
| 73406 | /* SHL16mCL_NF */ |
| 73407 | 9399, |
| 73408 | /* SHL16mCL_NF_ND */ |
| 73409 | 9400, |
| 73410 | /* SHL16mi */ |
| 73411 | 9402, |
| 73412 | /* SHL16mi_EVEX */ |
| 73413 | 9404, |
| 73414 | /* SHL16mi_ND */ |
| 73415 | 9406, |
| 73416 | /* SHL16mi_NF */ |
| 73417 | 9409, |
| 73418 | /* SHL16mi_NF_ND */ |
| 73419 | 9411, |
| 73420 | /* SHL16r1 */ |
| 73421 | 9414, |
| 73422 | /* SHL16r1_EVEX */ |
| 73423 | 9416, |
| 73424 | /* SHL16r1_ND */ |
| 73425 | 9418, |
| 73426 | /* SHL16r1_NF */ |
| 73427 | 9420, |
| 73428 | /* SHL16r1_NF_ND */ |
| 73429 | 9422, |
| 73430 | /* SHL16rCL */ |
| 73431 | 9424, |
| 73432 | /* SHL16rCL_EVEX */ |
| 73433 | 9426, |
| 73434 | /* SHL16rCL_ND */ |
| 73435 | 9428, |
| 73436 | /* SHL16rCL_NF */ |
| 73437 | 9430, |
| 73438 | /* SHL16rCL_NF_ND */ |
| 73439 | 9432, |
| 73440 | /* SHL16ri */ |
| 73441 | 9434, |
| 73442 | /* SHL16ri_EVEX */ |
| 73443 | 9437, |
| 73444 | /* SHL16ri_ND */ |
| 73445 | 9440, |
| 73446 | /* SHL16ri_NF */ |
| 73447 | 9443, |
| 73448 | /* SHL16ri_NF_ND */ |
| 73449 | 9446, |
| 73450 | /* SHL32m1 */ |
| 73451 | 9449, |
| 73452 | /* SHL32m1_EVEX */ |
| 73453 | 9450, |
| 73454 | /* SHL32m1_ND */ |
| 73455 | 9451, |
| 73456 | /* SHL32m1_NF */ |
| 73457 | 9453, |
| 73458 | /* SHL32m1_NF_ND */ |
| 73459 | 9454, |
| 73460 | /* SHL32mCL */ |
| 73461 | 9456, |
| 73462 | /* SHL32mCL_EVEX */ |
| 73463 | 9457, |
| 73464 | /* SHL32mCL_ND */ |
| 73465 | 9458, |
| 73466 | /* SHL32mCL_NF */ |
| 73467 | 9460, |
| 73468 | /* SHL32mCL_NF_ND */ |
| 73469 | 9461, |
| 73470 | /* SHL32mi */ |
| 73471 | 9463, |
| 73472 | /* SHL32mi_EVEX */ |
| 73473 | 9465, |
| 73474 | /* SHL32mi_ND */ |
| 73475 | 9467, |
| 73476 | /* SHL32mi_NF */ |
| 73477 | 9470, |
| 73478 | /* SHL32mi_NF_ND */ |
| 73479 | 9472, |
| 73480 | /* SHL32r1 */ |
| 73481 | 9475, |
| 73482 | /* SHL32r1_EVEX */ |
| 73483 | 9477, |
| 73484 | /* SHL32r1_ND */ |
| 73485 | 9479, |
| 73486 | /* SHL32r1_NF */ |
| 73487 | 9481, |
| 73488 | /* SHL32r1_NF_ND */ |
| 73489 | 9483, |
| 73490 | /* SHL32rCL */ |
| 73491 | 9485, |
| 73492 | /* SHL32rCL_EVEX */ |
| 73493 | 9487, |
| 73494 | /* SHL32rCL_ND */ |
| 73495 | 9489, |
| 73496 | /* SHL32rCL_NF */ |
| 73497 | 9491, |
| 73498 | /* SHL32rCL_NF_ND */ |
| 73499 | 9493, |
| 73500 | /* SHL32ri */ |
| 73501 | 9495, |
| 73502 | /* SHL32ri_EVEX */ |
| 73503 | 9498, |
| 73504 | /* SHL32ri_ND */ |
| 73505 | 9501, |
| 73506 | /* SHL32ri_NF */ |
| 73507 | 9504, |
| 73508 | /* SHL32ri_NF_ND */ |
| 73509 | 9507, |
| 73510 | /* SHL64m1 */ |
| 73511 | 9510, |
| 73512 | /* SHL64m1_EVEX */ |
| 73513 | 9511, |
| 73514 | /* SHL64m1_ND */ |
| 73515 | 9512, |
| 73516 | /* SHL64m1_NF */ |
| 73517 | 9514, |
| 73518 | /* SHL64m1_NF_ND */ |
| 73519 | 9515, |
| 73520 | /* SHL64mCL */ |
| 73521 | 9517, |
| 73522 | /* SHL64mCL_EVEX */ |
| 73523 | 9518, |
| 73524 | /* SHL64mCL_ND */ |
| 73525 | 9519, |
| 73526 | /* SHL64mCL_NF */ |
| 73527 | 9521, |
| 73528 | /* SHL64mCL_NF_ND */ |
| 73529 | 9522, |
| 73530 | /* SHL64mi */ |
| 73531 | 9524, |
| 73532 | /* SHL64mi_EVEX */ |
| 73533 | 9526, |
| 73534 | /* SHL64mi_ND */ |
| 73535 | 9528, |
| 73536 | /* SHL64mi_NF */ |
| 73537 | 9531, |
| 73538 | /* SHL64mi_NF_ND */ |
| 73539 | 9533, |
| 73540 | /* SHL64r1 */ |
| 73541 | 9536, |
| 73542 | /* SHL64r1_EVEX */ |
| 73543 | 9538, |
| 73544 | /* SHL64r1_ND */ |
| 73545 | 9540, |
| 73546 | /* SHL64r1_NF */ |
| 73547 | 9542, |
| 73548 | /* SHL64r1_NF_ND */ |
| 73549 | 9544, |
| 73550 | /* SHL64rCL */ |
| 73551 | 9546, |
| 73552 | /* SHL64rCL_EVEX */ |
| 73553 | 9548, |
| 73554 | /* SHL64rCL_ND */ |
| 73555 | 9550, |
| 73556 | /* SHL64rCL_NF */ |
| 73557 | 9552, |
| 73558 | /* SHL64rCL_NF_ND */ |
| 73559 | 9554, |
| 73560 | /* SHL64ri */ |
| 73561 | 9556, |
| 73562 | /* SHL64ri_EVEX */ |
| 73563 | 9559, |
| 73564 | /* SHL64ri_ND */ |
| 73565 | 9562, |
| 73566 | /* SHL64ri_NF */ |
| 73567 | 9565, |
| 73568 | /* SHL64ri_NF_ND */ |
| 73569 | 9568, |
| 73570 | /* SHL8m1 */ |
| 73571 | 9571, |
| 73572 | /* SHL8m1_EVEX */ |
| 73573 | 9572, |
| 73574 | /* SHL8m1_ND */ |
| 73575 | 9573, |
| 73576 | /* SHL8m1_NF */ |
| 73577 | 9575, |
| 73578 | /* SHL8m1_NF_ND */ |
| 73579 | 9576, |
| 73580 | /* SHL8mCL */ |
| 73581 | 9578, |
| 73582 | /* SHL8mCL_EVEX */ |
| 73583 | 9579, |
| 73584 | /* SHL8mCL_ND */ |
| 73585 | 9580, |
| 73586 | /* SHL8mCL_NF */ |
| 73587 | 9582, |
| 73588 | /* SHL8mCL_NF_ND */ |
| 73589 | 9583, |
| 73590 | /* SHL8mi */ |
| 73591 | 9585, |
| 73592 | /* SHL8mi_EVEX */ |
| 73593 | 9587, |
| 73594 | /* SHL8mi_ND */ |
| 73595 | 9589, |
| 73596 | /* SHL8mi_NF */ |
| 73597 | 9592, |
| 73598 | /* SHL8mi_NF_ND */ |
| 73599 | 9594, |
| 73600 | /* SHL8r1 */ |
| 73601 | 9597, |
| 73602 | /* SHL8r1_EVEX */ |
| 73603 | 9599, |
| 73604 | /* SHL8r1_ND */ |
| 73605 | 9601, |
| 73606 | /* SHL8r1_NF */ |
| 73607 | 9603, |
| 73608 | /* SHL8r1_NF_ND */ |
| 73609 | 9605, |
| 73610 | /* SHL8rCL */ |
| 73611 | 9607, |
| 73612 | /* SHL8rCL_EVEX */ |
| 73613 | 9609, |
| 73614 | /* SHL8rCL_ND */ |
| 73615 | 9611, |
| 73616 | /* SHL8rCL_NF */ |
| 73617 | 9613, |
| 73618 | /* SHL8rCL_NF_ND */ |
| 73619 | 9615, |
| 73620 | /* SHL8ri */ |
| 73621 | 9617, |
| 73622 | /* SHL8ri_EVEX */ |
| 73623 | 9620, |
| 73624 | /* SHL8ri_ND */ |
| 73625 | 9623, |
| 73626 | /* SHL8ri_NF */ |
| 73627 | 9626, |
| 73628 | /* SHL8ri_NF_ND */ |
| 73629 | 9629, |
| 73630 | /* SHLD16mrCL */ |
| 73631 | 9632, |
| 73632 | /* SHLD16mrCL_EVEX */ |
| 73633 | 9634, |
| 73634 | /* SHLD16mrCL_ND */ |
| 73635 | 9636, |
| 73636 | /* SHLD16mrCL_NF */ |
| 73637 | 9639, |
| 73638 | /* SHLD16mrCL_NF_ND */ |
| 73639 | 9641, |
| 73640 | /* SHLD16mri8 */ |
| 73641 | 9644, |
| 73642 | /* SHLD16mri8_EVEX */ |
| 73643 | 9647, |
| 73644 | /* SHLD16mri8_ND */ |
| 73645 | 9650, |
| 73646 | /* SHLD16mri8_NF */ |
| 73647 | 9654, |
| 73648 | /* SHLD16mri8_NF_ND */ |
| 73649 | 9657, |
| 73650 | /* SHLD16rrCL */ |
| 73651 | 9661, |
| 73652 | /* SHLD16rrCL_EVEX */ |
| 73653 | 9664, |
| 73654 | /* SHLD16rrCL_ND */ |
| 73655 | 9667, |
| 73656 | /* SHLD16rrCL_NF */ |
| 73657 | 9670, |
| 73658 | /* SHLD16rrCL_NF_ND */ |
| 73659 | 9673, |
| 73660 | /* SHLD16rri8 */ |
| 73661 | 9676, |
| 73662 | /* SHLD16rri8_EVEX */ |
| 73663 | 9680, |
| 73664 | /* SHLD16rri8_ND */ |
| 73665 | 9684, |
| 73666 | /* SHLD16rri8_NF */ |
| 73667 | 9688, |
| 73668 | /* SHLD16rri8_NF_ND */ |
| 73669 | 9692, |
| 73670 | /* SHLD32mrCL */ |
| 73671 | 9696, |
| 73672 | /* SHLD32mrCL_EVEX */ |
| 73673 | 9698, |
| 73674 | /* SHLD32mrCL_ND */ |
| 73675 | 9700, |
| 73676 | /* SHLD32mrCL_NF */ |
| 73677 | 9703, |
| 73678 | /* SHLD32mrCL_NF_ND */ |
| 73679 | 9705, |
| 73680 | /* SHLD32mri8 */ |
| 73681 | 9708, |
| 73682 | /* SHLD32mri8_EVEX */ |
| 73683 | 9711, |
| 73684 | /* SHLD32mri8_ND */ |
| 73685 | 9714, |
| 73686 | /* SHLD32mri8_NF */ |
| 73687 | 9718, |
| 73688 | /* SHLD32mri8_NF_ND */ |
| 73689 | 9721, |
| 73690 | /* SHLD32rrCL */ |
| 73691 | 9725, |
| 73692 | /* SHLD32rrCL_EVEX */ |
| 73693 | 9728, |
| 73694 | /* SHLD32rrCL_ND */ |
| 73695 | 9731, |
| 73696 | /* SHLD32rrCL_NF */ |
| 73697 | 9734, |
| 73698 | /* SHLD32rrCL_NF_ND */ |
| 73699 | 9737, |
| 73700 | /* SHLD32rri8 */ |
| 73701 | 9740, |
| 73702 | /* SHLD32rri8_EVEX */ |
| 73703 | 9744, |
| 73704 | /* SHLD32rri8_ND */ |
| 73705 | 9748, |
| 73706 | /* SHLD32rri8_NF */ |
| 73707 | 9752, |
| 73708 | /* SHLD32rri8_NF_ND */ |
| 73709 | 9756, |
| 73710 | /* SHLD64mrCL */ |
| 73711 | 9760, |
| 73712 | /* SHLD64mrCL_EVEX */ |
| 73713 | 9762, |
| 73714 | /* SHLD64mrCL_ND */ |
| 73715 | 9764, |
| 73716 | /* SHLD64mrCL_NF */ |
| 73717 | 9767, |
| 73718 | /* SHLD64mrCL_NF_ND */ |
| 73719 | 9769, |
| 73720 | /* SHLD64mri8 */ |
| 73721 | 9772, |
| 73722 | /* SHLD64mri8_EVEX */ |
| 73723 | 9775, |
| 73724 | /* SHLD64mri8_ND */ |
| 73725 | 9778, |
| 73726 | /* SHLD64mri8_NF */ |
| 73727 | 9782, |
| 73728 | /* SHLD64mri8_NF_ND */ |
| 73729 | 9785, |
| 73730 | /* SHLD64rrCL */ |
| 73731 | 9789, |
| 73732 | /* SHLD64rrCL_EVEX */ |
| 73733 | 9792, |
| 73734 | /* SHLD64rrCL_ND */ |
| 73735 | 9795, |
| 73736 | /* SHLD64rrCL_NF */ |
| 73737 | 9798, |
| 73738 | /* SHLD64rrCL_NF_ND */ |
| 73739 | 9801, |
| 73740 | /* SHLD64rri8 */ |
| 73741 | 9804, |
| 73742 | /* SHLD64rri8_EVEX */ |
| 73743 | 9808, |
| 73744 | /* SHLD64rri8_ND */ |
| 73745 | 9812, |
| 73746 | /* SHLD64rri8_NF */ |
| 73747 | 9816, |
| 73748 | /* SHLD64rri8_NF_ND */ |
| 73749 | 9820, |
| 73750 | /* SHLX32rm */ |
| 73751 | 9824, |
| 73752 | /* SHLX32rm_EVEX */ |
| 73753 | 9827, |
| 73754 | /* SHLX32rr */ |
| 73755 | 9830, |
| 73756 | /* SHLX32rr_EVEX */ |
| 73757 | 9833, |
| 73758 | /* SHLX64rm */ |
| 73759 | 9836, |
| 73760 | /* SHLX64rm_EVEX */ |
| 73761 | 9839, |
| 73762 | /* SHLX64rr */ |
| 73763 | 9842, |
| 73764 | /* SHLX64rr_EVEX */ |
| 73765 | 9845, |
| 73766 | /* SHR16m1 */ |
| 73767 | 9848, |
| 73768 | /* SHR16m1_EVEX */ |
| 73769 | 9849, |
| 73770 | /* SHR16m1_ND */ |
| 73771 | 9850, |
| 73772 | /* SHR16m1_NF */ |
| 73773 | 9852, |
| 73774 | /* SHR16m1_NF_ND */ |
| 73775 | 9853, |
| 73776 | /* SHR16mCL */ |
| 73777 | 9855, |
| 73778 | /* SHR16mCL_EVEX */ |
| 73779 | 9856, |
| 73780 | /* SHR16mCL_ND */ |
| 73781 | 9857, |
| 73782 | /* SHR16mCL_NF */ |
| 73783 | 9859, |
| 73784 | /* SHR16mCL_NF_ND */ |
| 73785 | 9860, |
| 73786 | /* SHR16mi */ |
| 73787 | 9862, |
| 73788 | /* SHR16mi_EVEX */ |
| 73789 | 9864, |
| 73790 | /* SHR16mi_ND */ |
| 73791 | 9866, |
| 73792 | /* SHR16mi_NF */ |
| 73793 | 9869, |
| 73794 | /* SHR16mi_NF_ND */ |
| 73795 | 9871, |
| 73796 | /* SHR16r1 */ |
| 73797 | 9874, |
| 73798 | /* SHR16r1_EVEX */ |
| 73799 | 9876, |
| 73800 | /* SHR16r1_ND */ |
| 73801 | 9878, |
| 73802 | /* SHR16r1_NF */ |
| 73803 | 9880, |
| 73804 | /* SHR16r1_NF_ND */ |
| 73805 | 9882, |
| 73806 | /* SHR16rCL */ |
| 73807 | 9884, |
| 73808 | /* SHR16rCL_EVEX */ |
| 73809 | 9886, |
| 73810 | /* SHR16rCL_ND */ |
| 73811 | 9888, |
| 73812 | /* SHR16rCL_NF */ |
| 73813 | 9890, |
| 73814 | /* SHR16rCL_NF_ND */ |
| 73815 | 9892, |
| 73816 | /* SHR16ri */ |
| 73817 | 9894, |
| 73818 | /* SHR16ri_EVEX */ |
| 73819 | 9897, |
| 73820 | /* SHR16ri_ND */ |
| 73821 | 9900, |
| 73822 | /* SHR16ri_NF */ |
| 73823 | 9903, |
| 73824 | /* SHR16ri_NF_ND */ |
| 73825 | 9906, |
| 73826 | /* SHR32m1 */ |
| 73827 | 9909, |
| 73828 | /* SHR32m1_EVEX */ |
| 73829 | 9910, |
| 73830 | /* SHR32m1_ND */ |
| 73831 | 9911, |
| 73832 | /* SHR32m1_NF */ |
| 73833 | 9913, |
| 73834 | /* SHR32m1_NF_ND */ |
| 73835 | 9914, |
| 73836 | /* SHR32mCL */ |
| 73837 | 9916, |
| 73838 | /* SHR32mCL_EVEX */ |
| 73839 | 9917, |
| 73840 | /* SHR32mCL_ND */ |
| 73841 | 9918, |
| 73842 | /* SHR32mCL_NF */ |
| 73843 | 9920, |
| 73844 | /* SHR32mCL_NF_ND */ |
| 73845 | 9921, |
| 73846 | /* SHR32mi */ |
| 73847 | 9923, |
| 73848 | /* SHR32mi_EVEX */ |
| 73849 | 9925, |
| 73850 | /* SHR32mi_ND */ |
| 73851 | 9927, |
| 73852 | /* SHR32mi_NF */ |
| 73853 | 9930, |
| 73854 | /* SHR32mi_NF_ND */ |
| 73855 | 9932, |
| 73856 | /* SHR32r1 */ |
| 73857 | 9935, |
| 73858 | /* SHR32r1_EVEX */ |
| 73859 | 9937, |
| 73860 | /* SHR32r1_ND */ |
| 73861 | 9939, |
| 73862 | /* SHR32r1_NF */ |
| 73863 | 9941, |
| 73864 | /* SHR32r1_NF_ND */ |
| 73865 | 9943, |
| 73866 | /* SHR32rCL */ |
| 73867 | 9945, |
| 73868 | /* SHR32rCL_EVEX */ |
| 73869 | 9947, |
| 73870 | /* SHR32rCL_ND */ |
| 73871 | 9949, |
| 73872 | /* SHR32rCL_NF */ |
| 73873 | 9951, |
| 73874 | /* SHR32rCL_NF_ND */ |
| 73875 | 9953, |
| 73876 | /* SHR32ri */ |
| 73877 | 9955, |
| 73878 | /* SHR32ri_EVEX */ |
| 73879 | 9958, |
| 73880 | /* SHR32ri_ND */ |
| 73881 | 9961, |
| 73882 | /* SHR32ri_NF */ |
| 73883 | 9964, |
| 73884 | /* SHR32ri_NF_ND */ |
| 73885 | 9967, |
| 73886 | /* SHR64m1 */ |
| 73887 | 9970, |
| 73888 | /* SHR64m1_EVEX */ |
| 73889 | 9971, |
| 73890 | /* SHR64m1_ND */ |
| 73891 | 9972, |
| 73892 | /* SHR64m1_NF */ |
| 73893 | 9974, |
| 73894 | /* SHR64m1_NF_ND */ |
| 73895 | 9975, |
| 73896 | /* SHR64mCL */ |
| 73897 | 9977, |
| 73898 | /* SHR64mCL_EVEX */ |
| 73899 | 9978, |
| 73900 | /* SHR64mCL_ND */ |
| 73901 | 9979, |
| 73902 | /* SHR64mCL_NF */ |
| 73903 | 9981, |
| 73904 | /* SHR64mCL_NF_ND */ |
| 73905 | 9982, |
| 73906 | /* SHR64mi */ |
| 73907 | 9984, |
| 73908 | /* SHR64mi_EVEX */ |
| 73909 | 9986, |
| 73910 | /* SHR64mi_ND */ |
| 73911 | 9988, |
| 73912 | /* SHR64mi_NF */ |
| 73913 | 9991, |
| 73914 | /* SHR64mi_NF_ND */ |
| 73915 | 9993, |
| 73916 | /* SHR64r1 */ |
| 73917 | 9996, |
| 73918 | /* SHR64r1_EVEX */ |
| 73919 | 9998, |
| 73920 | /* SHR64r1_ND */ |
| 73921 | 10000, |
| 73922 | /* SHR64r1_NF */ |
| 73923 | 10002, |
| 73924 | /* SHR64r1_NF_ND */ |
| 73925 | 10004, |
| 73926 | /* SHR64rCL */ |
| 73927 | 10006, |
| 73928 | /* SHR64rCL_EVEX */ |
| 73929 | 10008, |
| 73930 | /* SHR64rCL_ND */ |
| 73931 | 10010, |
| 73932 | /* SHR64rCL_NF */ |
| 73933 | 10012, |
| 73934 | /* SHR64rCL_NF_ND */ |
| 73935 | 10014, |
| 73936 | /* SHR64ri */ |
| 73937 | 10016, |
| 73938 | /* SHR64ri_EVEX */ |
| 73939 | 10019, |
| 73940 | /* SHR64ri_ND */ |
| 73941 | 10022, |
| 73942 | /* SHR64ri_NF */ |
| 73943 | 10025, |
| 73944 | /* SHR64ri_NF_ND */ |
| 73945 | 10028, |
| 73946 | /* SHR8m1 */ |
| 73947 | 10031, |
| 73948 | /* SHR8m1_EVEX */ |
| 73949 | 10032, |
| 73950 | /* SHR8m1_ND */ |
| 73951 | 10033, |
| 73952 | /* SHR8m1_NF */ |
| 73953 | 10035, |
| 73954 | /* SHR8m1_NF_ND */ |
| 73955 | 10036, |
| 73956 | /* SHR8mCL */ |
| 73957 | 10038, |
| 73958 | /* SHR8mCL_EVEX */ |
| 73959 | 10039, |
| 73960 | /* SHR8mCL_ND */ |
| 73961 | 10040, |
| 73962 | /* SHR8mCL_NF */ |
| 73963 | 10042, |
| 73964 | /* SHR8mCL_NF_ND */ |
| 73965 | 10043, |
| 73966 | /* SHR8mi */ |
| 73967 | 10045, |
| 73968 | /* SHR8mi_EVEX */ |
| 73969 | 10047, |
| 73970 | /* SHR8mi_ND */ |
| 73971 | 10049, |
| 73972 | /* SHR8mi_NF */ |
| 73973 | 10052, |
| 73974 | /* SHR8mi_NF_ND */ |
| 73975 | 10054, |
| 73976 | /* SHR8r1 */ |
| 73977 | 10057, |
| 73978 | /* SHR8r1_EVEX */ |
| 73979 | 10059, |
| 73980 | /* SHR8r1_ND */ |
| 73981 | 10061, |
| 73982 | /* SHR8r1_NF */ |
| 73983 | 10063, |
| 73984 | /* SHR8r1_NF_ND */ |
| 73985 | 10065, |
| 73986 | /* SHR8rCL */ |
| 73987 | 10067, |
| 73988 | /* SHR8rCL_EVEX */ |
| 73989 | 10069, |
| 73990 | /* SHR8rCL_ND */ |
| 73991 | 10071, |
| 73992 | /* SHR8rCL_NF */ |
| 73993 | 10073, |
| 73994 | /* SHR8rCL_NF_ND */ |
| 73995 | 10075, |
| 73996 | /* SHR8ri */ |
| 73997 | 10077, |
| 73998 | /* SHR8ri_EVEX */ |
| 73999 | 10080, |
| 74000 | /* SHR8ri_ND */ |
| 74001 | 10083, |
| 74002 | /* SHR8ri_NF */ |
| 74003 | 10086, |
| 74004 | /* SHR8ri_NF_ND */ |
| 74005 | 10089, |
| 74006 | /* SHRD16mrCL */ |
| 74007 | 10092, |
| 74008 | /* SHRD16mrCL_EVEX */ |
| 74009 | 10094, |
| 74010 | /* SHRD16mrCL_ND */ |
| 74011 | 10096, |
| 74012 | /* SHRD16mrCL_NF */ |
| 74013 | 10099, |
| 74014 | /* SHRD16mrCL_NF_ND */ |
| 74015 | 10101, |
| 74016 | /* SHRD16mri8 */ |
| 74017 | 10104, |
| 74018 | /* SHRD16mri8_EVEX */ |
| 74019 | 10107, |
| 74020 | /* SHRD16mri8_ND */ |
| 74021 | 10110, |
| 74022 | /* SHRD16mri8_NF */ |
| 74023 | 10114, |
| 74024 | /* SHRD16mri8_NF_ND */ |
| 74025 | 10117, |
| 74026 | /* SHRD16rrCL */ |
| 74027 | 10121, |
| 74028 | /* SHRD16rrCL_EVEX */ |
| 74029 | 10124, |
| 74030 | /* SHRD16rrCL_ND */ |
| 74031 | 10127, |
| 74032 | /* SHRD16rrCL_NF */ |
| 74033 | 10130, |
| 74034 | /* SHRD16rrCL_NF_ND */ |
| 74035 | 10133, |
| 74036 | /* SHRD16rri8 */ |
| 74037 | 10136, |
| 74038 | /* SHRD16rri8_EVEX */ |
| 74039 | 10140, |
| 74040 | /* SHRD16rri8_ND */ |
| 74041 | 10144, |
| 74042 | /* SHRD16rri8_NF */ |
| 74043 | 10148, |
| 74044 | /* SHRD16rri8_NF_ND */ |
| 74045 | 10152, |
| 74046 | /* SHRD32mrCL */ |
| 74047 | 10156, |
| 74048 | /* SHRD32mrCL_EVEX */ |
| 74049 | 10158, |
| 74050 | /* SHRD32mrCL_ND */ |
| 74051 | 10160, |
| 74052 | /* SHRD32mrCL_NF */ |
| 74053 | 10163, |
| 74054 | /* SHRD32mrCL_NF_ND */ |
| 74055 | 10165, |
| 74056 | /* SHRD32mri8 */ |
| 74057 | 10168, |
| 74058 | /* SHRD32mri8_EVEX */ |
| 74059 | 10171, |
| 74060 | /* SHRD32mri8_ND */ |
| 74061 | 10174, |
| 74062 | /* SHRD32mri8_NF */ |
| 74063 | 10178, |
| 74064 | /* SHRD32mri8_NF_ND */ |
| 74065 | 10181, |
| 74066 | /* SHRD32rrCL */ |
| 74067 | 10185, |
| 74068 | /* SHRD32rrCL_EVEX */ |
| 74069 | 10188, |
| 74070 | /* SHRD32rrCL_ND */ |
| 74071 | 10191, |
| 74072 | /* SHRD32rrCL_NF */ |
| 74073 | 10194, |
| 74074 | /* SHRD32rrCL_NF_ND */ |
| 74075 | 10197, |
| 74076 | /* SHRD32rri8 */ |
| 74077 | 10200, |
| 74078 | /* SHRD32rri8_EVEX */ |
| 74079 | 10204, |
| 74080 | /* SHRD32rri8_ND */ |
| 74081 | 10208, |
| 74082 | /* SHRD32rri8_NF */ |
| 74083 | 10212, |
| 74084 | /* SHRD32rri8_NF_ND */ |
| 74085 | 10216, |
| 74086 | /* SHRD64mrCL */ |
| 74087 | 10220, |
| 74088 | /* SHRD64mrCL_EVEX */ |
| 74089 | 10222, |
| 74090 | /* SHRD64mrCL_ND */ |
| 74091 | 10224, |
| 74092 | /* SHRD64mrCL_NF */ |
| 74093 | 10227, |
| 74094 | /* SHRD64mrCL_NF_ND */ |
| 74095 | 10229, |
| 74096 | /* SHRD64mri8 */ |
| 74097 | 10232, |
| 74098 | /* SHRD64mri8_EVEX */ |
| 74099 | 10235, |
| 74100 | /* SHRD64mri8_ND */ |
| 74101 | 10238, |
| 74102 | /* SHRD64mri8_NF */ |
| 74103 | 10242, |
| 74104 | /* SHRD64mri8_NF_ND */ |
| 74105 | 10245, |
| 74106 | /* SHRD64rrCL */ |
| 74107 | 10249, |
| 74108 | /* SHRD64rrCL_EVEX */ |
| 74109 | 10252, |
| 74110 | /* SHRD64rrCL_ND */ |
| 74111 | 10255, |
| 74112 | /* SHRD64rrCL_NF */ |
| 74113 | 10258, |
| 74114 | /* SHRD64rrCL_NF_ND */ |
| 74115 | 10261, |
| 74116 | /* SHRD64rri8 */ |
| 74117 | 10264, |
| 74118 | /* SHRD64rri8_EVEX */ |
| 74119 | 10268, |
| 74120 | /* SHRD64rri8_ND */ |
| 74121 | 10272, |
| 74122 | /* SHRD64rri8_NF */ |
| 74123 | 10276, |
| 74124 | /* SHRD64rri8_NF_ND */ |
| 74125 | 10280, |
| 74126 | /* SHRX32rm */ |
| 74127 | 10284, |
| 74128 | /* SHRX32rm_EVEX */ |
| 74129 | 10287, |
| 74130 | /* SHRX32rr */ |
| 74131 | 10290, |
| 74132 | /* SHRX32rr_EVEX */ |
| 74133 | 10293, |
| 74134 | /* SHRX64rm */ |
| 74135 | 10296, |
| 74136 | /* SHRX64rm_EVEX */ |
| 74137 | 10299, |
| 74138 | /* SHRX64rr */ |
| 74139 | 10302, |
| 74140 | /* SHRX64rr_EVEX */ |
| 74141 | 10305, |
| 74142 | /* SHUFPDrmi */ |
| 74143 | 10308, |
| 74144 | /* SHUFPDrri */ |
| 74145 | 10312, |
| 74146 | /* SHUFPSrmi */ |
| 74147 | 10316, |
| 74148 | /* SHUFPSrri */ |
| 74149 | 10320, |
| 74150 | /* SIDT16m */ |
| 74151 | 10324, |
| 74152 | /* SIDT32m */ |
| 74153 | 10325, |
| 74154 | /* SIDT64m */ |
| 74155 | 10326, |
| 74156 | /* SKINIT */ |
| 74157 | 10327, |
| 74158 | /* SLDT16m */ |
| 74159 | 10327, |
| 74160 | /* SLDT16r */ |
| 74161 | 10328, |
| 74162 | /* SLDT32r */ |
| 74163 | 10329, |
| 74164 | /* SLDT64r */ |
| 74165 | 10330, |
| 74166 | /* SLWPCB */ |
| 74167 | 10331, |
| 74168 | /* SLWPCB64 */ |
| 74169 | 10332, |
| 74170 | /* SMSW16m */ |
| 74171 | 10333, |
| 74172 | /* SMSW16r */ |
| 74173 | 10334, |
| 74174 | /* SMSW32r */ |
| 74175 | 10335, |
| 74176 | /* SMSW64r */ |
| 74177 | 10336, |
| 74178 | /* SQRTPDm */ |
| 74179 | 10337, |
| 74180 | /* SQRTPDr */ |
| 74181 | 10339, |
| 74182 | /* SQRTPSm */ |
| 74183 | 10341, |
| 74184 | /* SQRTPSr */ |
| 74185 | 10343, |
| 74186 | /* SQRTSDm */ |
| 74187 | 10345, |
| 74188 | /* SQRTSDm_Int */ |
| 74189 | 10347, |
| 74190 | /* SQRTSDr */ |
| 74191 | 10350, |
| 74192 | /* SQRTSDr_Int */ |
| 74193 | 10352, |
| 74194 | /* SQRTSSm */ |
| 74195 | 10355, |
| 74196 | /* SQRTSSm_Int */ |
| 74197 | 10357, |
| 74198 | /* SQRTSSr */ |
| 74199 | 10360, |
| 74200 | /* SQRTSSr_Int */ |
| 74201 | 10362, |
| 74202 | /* SQRT_F */ |
| 74203 | 10365, |
| 74204 | /* SQRT_Fp32 */ |
| 74205 | 10365, |
| 74206 | /* SQRT_Fp64 */ |
| 74207 | 10367, |
| 74208 | /* SQRT_Fp80 */ |
| 74209 | 10369, |
| 74210 | /* SS_PREFIX */ |
| 74211 | 10371, |
| 74212 | /* STAC */ |
| 74213 | 10371, |
| 74214 | /* STACKALLOC_W_PROBING */ |
| 74215 | 10371, |
| 74216 | /* STC */ |
| 74217 | 10372, |
| 74218 | /* STD */ |
| 74219 | 10372, |
| 74220 | /* STGI */ |
| 74221 | 10372, |
| 74222 | /* STI */ |
| 74223 | 10372, |
| 74224 | /* STMXCSR */ |
| 74225 | 10372, |
| 74226 | /* STOSB */ |
| 74227 | 10373, |
| 74228 | /* STOSL */ |
| 74229 | 10374, |
| 74230 | /* STOSQ */ |
| 74231 | 10375, |
| 74232 | /* STOSW */ |
| 74233 | 10376, |
| 74234 | /* STR16r */ |
| 74235 | 10377, |
| 74236 | /* STR32r */ |
| 74237 | 10378, |
| 74238 | /* STR64r */ |
| 74239 | 10379, |
| 74240 | /* STRm */ |
| 74241 | 10380, |
| 74242 | /* STTILECFG */ |
| 74243 | 10381, |
| 74244 | /* STTILECFG_EVEX */ |
| 74245 | 10382, |
| 74246 | /* STUI */ |
| 74247 | 10383, |
| 74248 | /* ST_F32m */ |
| 74249 | 10383, |
| 74250 | /* ST_F64m */ |
| 74251 | 10384, |
| 74252 | /* ST_FP32m */ |
| 74253 | 10385, |
| 74254 | /* ST_FP64m */ |
| 74255 | 10386, |
| 74256 | /* ST_FP80m */ |
| 74257 | 10387, |
| 74258 | /* ST_FPrr */ |
| 74259 | 10388, |
| 74260 | /* ST_Fp32m */ |
| 74261 | 10389, |
| 74262 | /* ST_Fp64m */ |
| 74263 | 10391, |
| 74264 | /* ST_Fp64m32 */ |
| 74265 | 10393, |
| 74266 | /* ST_Fp80m32 */ |
| 74267 | 10395, |
| 74268 | /* ST_Fp80m64 */ |
| 74269 | 10397, |
| 74270 | /* ST_FpP32m */ |
| 74271 | 10399, |
| 74272 | /* ST_FpP64m */ |
| 74273 | 10401, |
| 74274 | /* ST_FpP64m32 */ |
| 74275 | 10403, |
| 74276 | /* ST_FpP80m */ |
| 74277 | 10405, |
| 74278 | /* ST_FpP80m32 */ |
| 74279 | 10407, |
| 74280 | /* ST_FpP80m64 */ |
| 74281 | 10409, |
| 74282 | /* ST_Frr */ |
| 74283 | 10411, |
| 74284 | /* SUB16i16 */ |
| 74285 | 10412, |
| 74286 | /* SUB16mi */ |
| 74287 | 10413, |
| 74288 | /* SUB16mi8 */ |
| 74289 | 10415, |
| 74290 | /* SUB16mi8_EVEX */ |
| 74291 | 10417, |
| 74292 | /* SUB16mi8_ND */ |
| 74293 | 10419, |
| 74294 | /* SUB16mi8_NF */ |
| 74295 | 10422, |
| 74296 | /* SUB16mi8_NF_ND */ |
| 74297 | 10424, |
| 74298 | /* SUB16mi_EVEX */ |
| 74299 | 10427, |
| 74300 | /* SUB16mi_ND */ |
| 74301 | 10429, |
| 74302 | /* SUB16mi_NF */ |
| 74303 | 10432, |
| 74304 | /* SUB16mi_NF_ND */ |
| 74305 | 10434, |
| 74306 | /* SUB16mr */ |
| 74307 | 10437, |
| 74308 | /* SUB16mr_EVEX */ |
| 74309 | 10439, |
| 74310 | /* SUB16mr_ND */ |
| 74311 | 10441, |
| 74312 | /* SUB16mr_NF */ |
| 74313 | 10444, |
| 74314 | /* SUB16mr_NF_ND */ |
| 74315 | 10446, |
| 74316 | /* SUB16ri */ |
| 74317 | 10449, |
| 74318 | /* SUB16ri8 */ |
| 74319 | 10452, |
| 74320 | /* SUB16ri8_EVEX */ |
| 74321 | 10455, |
| 74322 | /* SUB16ri8_ND */ |
| 74323 | 10458, |
| 74324 | /* SUB16ri8_NF */ |
| 74325 | 10461, |
| 74326 | /* SUB16ri8_NF_ND */ |
| 74327 | 10464, |
| 74328 | /* SUB16ri_EVEX */ |
| 74329 | 10467, |
| 74330 | /* SUB16ri_ND */ |
| 74331 | 10470, |
| 74332 | /* SUB16ri_NF */ |
| 74333 | 10473, |
| 74334 | /* SUB16ri_NF_ND */ |
| 74335 | 10476, |
| 74336 | /* SUB16rm */ |
| 74337 | 10479, |
| 74338 | /* SUB16rm_EVEX */ |
| 74339 | 10482, |
| 74340 | /* SUB16rm_ND */ |
| 74341 | 10485, |
| 74342 | /* SUB16rm_NF */ |
| 74343 | 10488, |
| 74344 | /* SUB16rm_NF_ND */ |
| 74345 | 10491, |
| 74346 | /* SUB16rr */ |
| 74347 | 10494, |
| 74348 | /* SUB16rr_EVEX */ |
| 74349 | 10497, |
| 74350 | /* SUB16rr_EVEX_REV */ |
| 74351 | 10500, |
| 74352 | /* SUB16rr_ND */ |
| 74353 | 10503, |
| 74354 | /* SUB16rr_ND_REV */ |
| 74355 | 10506, |
| 74356 | /* SUB16rr_NF */ |
| 74357 | 10509, |
| 74358 | /* SUB16rr_NF_ND */ |
| 74359 | 10512, |
| 74360 | /* SUB16rr_NF_ND_REV */ |
| 74361 | 10515, |
| 74362 | /* SUB16rr_NF_REV */ |
| 74363 | 10518, |
| 74364 | /* SUB16rr_REV */ |
| 74365 | 10521, |
| 74366 | /* SUB32i32 */ |
| 74367 | 10524, |
| 74368 | /* SUB32mi */ |
| 74369 | 10525, |
| 74370 | /* SUB32mi8 */ |
| 74371 | 10527, |
| 74372 | /* SUB32mi8_EVEX */ |
| 74373 | 10529, |
| 74374 | /* SUB32mi8_ND */ |
| 74375 | 10531, |
| 74376 | /* SUB32mi8_NF */ |
| 74377 | 10534, |
| 74378 | /* SUB32mi8_NF_ND */ |
| 74379 | 10536, |
| 74380 | /* SUB32mi_EVEX */ |
| 74381 | 10539, |
| 74382 | /* SUB32mi_ND */ |
| 74383 | 10541, |
| 74384 | /* SUB32mi_NF */ |
| 74385 | 10544, |
| 74386 | /* SUB32mi_NF_ND */ |
| 74387 | 10546, |
| 74388 | /* SUB32mr */ |
| 74389 | 10549, |
| 74390 | /* SUB32mr_EVEX */ |
| 74391 | 10551, |
| 74392 | /* SUB32mr_ND */ |
| 74393 | 10553, |
| 74394 | /* SUB32mr_NF */ |
| 74395 | 10556, |
| 74396 | /* SUB32mr_NF_ND */ |
| 74397 | 10558, |
| 74398 | /* SUB32ri */ |
| 74399 | 10561, |
| 74400 | /* SUB32ri8 */ |
| 74401 | 10564, |
| 74402 | /* SUB32ri8_EVEX */ |
| 74403 | 10567, |
| 74404 | /* SUB32ri8_ND */ |
| 74405 | 10570, |
| 74406 | /* SUB32ri8_NF */ |
| 74407 | 10573, |
| 74408 | /* SUB32ri8_NF_ND */ |
| 74409 | 10576, |
| 74410 | /* SUB32ri_EVEX */ |
| 74411 | 10579, |
| 74412 | /* SUB32ri_ND */ |
| 74413 | 10582, |
| 74414 | /* SUB32ri_NF */ |
| 74415 | 10585, |
| 74416 | /* SUB32ri_NF_ND */ |
| 74417 | 10588, |
| 74418 | /* SUB32rm */ |
| 74419 | 10591, |
| 74420 | /* SUB32rm_EVEX */ |
| 74421 | 10594, |
| 74422 | /* SUB32rm_ND */ |
| 74423 | 10597, |
| 74424 | /* SUB32rm_NF */ |
| 74425 | 10600, |
| 74426 | /* SUB32rm_NF_ND */ |
| 74427 | 10603, |
| 74428 | /* SUB32rr */ |
| 74429 | 10606, |
| 74430 | /* SUB32rr_EVEX */ |
| 74431 | 10609, |
| 74432 | /* SUB32rr_EVEX_REV */ |
| 74433 | 10612, |
| 74434 | /* SUB32rr_ND */ |
| 74435 | 10615, |
| 74436 | /* SUB32rr_ND_REV */ |
| 74437 | 10618, |
| 74438 | /* SUB32rr_NF */ |
| 74439 | 10621, |
| 74440 | /* SUB32rr_NF_ND */ |
| 74441 | 10624, |
| 74442 | /* SUB32rr_NF_ND_REV */ |
| 74443 | 10627, |
| 74444 | /* SUB32rr_NF_REV */ |
| 74445 | 10630, |
| 74446 | /* SUB32rr_REV */ |
| 74447 | 10633, |
| 74448 | /* SUB64i32 */ |
| 74449 | 10636, |
| 74450 | /* SUB64mi32 */ |
| 74451 | 10637, |
| 74452 | /* SUB64mi32_EVEX */ |
| 74453 | 10639, |
| 74454 | /* SUB64mi32_ND */ |
| 74455 | 10641, |
| 74456 | /* SUB64mi32_NF */ |
| 74457 | 10644, |
| 74458 | /* SUB64mi32_NF_ND */ |
| 74459 | 10646, |
| 74460 | /* SUB64mi8 */ |
| 74461 | 10649, |
| 74462 | /* SUB64mi8_EVEX */ |
| 74463 | 10651, |
| 74464 | /* SUB64mi8_ND */ |
| 74465 | 10653, |
| 74466 | /* SUB64mi8_NF */ |
| 74467 | 10656, |
| 74468 | /* SUB64mi8_NF_ND */ |
| 74469 | 10658, |
| 74470 | /* SUB64mr */ |
| 74471 | 10661, |
| 74472 | /* SUB64mr_EVEX */ |
| 74473 | 10663, |
| 74474 | /* SUB64mr_ND */ |
| 74475 | 10665, |
| 74476 | /* SUB64mr_NF */ |
| 74477 | 10668, |
| 74478 | /* SUB64mr_NF_ND */ |
| 74479 | 10670, |
| 74480 | /* SUB64ri32 */ |
| 74481 | 10673, |
| 74482 | /* SUB64ri32_EVEX */ |
| 74483 | 10676, |
| 74484 | /* SUB64ri32_ND */ |
| 74485 | 10679, |
| 74486 | /* SUB64ri32_NF */ |
| 74487 | 10682, |
| 74488 | /* SUB64ri32_NF_ND */ |
| 74489 | 10685, |
| 74490 | /* SUB64ri8 */ |
| 74491 | 10688, |
| 74492 | /* SUB64ri8_EVEX */ |
| 74493 | 10691, |
| 74494 | /* SUB64ri8_ND */ |
| 74495 | 10694, |
| 74496 | /* SUB64ri8_NF */ |
| 74497 | 10697, |
| 74498 | /* SUB64ri8_NF_ND */ |
| 74499 | 10700, |
| 74500 | /* SUB64rm */ |
| 74501 | 10703, |
| 74502 | /* SUB64rm_EVEX */ |
| 74503 | 10706, |
| 74504 | /* SUB64rm_ND */ |
| 74505 | 10709, |
| 74506 | /* SUB64rm_NF */ |
| 74507 | 10712, |
| 74508 | /* SUB64rm_NF_ND */ |
| 74509 | 10715, |
| 74510 | /* SUB64rr */ |
| 74511 | 10718, |
| 74512 | /* SUB64rr_EVEX */ |
| 74513 | 10721, |
| 74514 | /* SUB64rr_EVEX_REV */ |
| 74515 | 10724, |
| 74516 | /* SUB64rr_ND */ |
| 74517 | 10727, |
| 74518 | /* SUB64rr_ND_REV */ |
| 74519 | 10730, |
| 74520 | /* SUB64rr_NF */ |
| 74521 | 10733, |
| 74522 | /* SUB64rr_NF_ND */ |
| 74523 | 10736, |
| 74524 | /* SUB64rr_NF_ND_REV */ |
| 74525 | 10739, |
| 74526 | /* SUB64rr_NF_REV */ |
| 74527 | 10742, |
| 74528 | /* SUB64rr_REV */ |
| 74529 | 10745, |
| 74530 | /* SUB8i8 */ |
| 74531 | 10748, |
| 74532 | /* SUB8mi */ |
| 74533 | 10749, |
| 74534 | /* SUB8mi8 */ |
| 74535 | 10751, |
| 74536 | /* SUB8mi_EVEX */ |
| 74537 | 10753, |
| 74538 | /* SUB8mi_ND */ |
| 74539 | 10755, |
| 74540 | /* SUB8mi_NF */ |
| 74541 | 10758, |
| 74542 | /* SUB8mi_NF_ND */ |
| 74543 | 10760, |
| 74544 | /* SUB8mr */ |
| 74545 | 10763, |
| 74546 | /* SUB8mr_EVEX */ |
| 74547 | 10765, |
| 74548 | /* SUB8mr_ND */ |
| 74549 | 10767, |
| 74550 | /* SUB8mr_NF */ |
| 74551 | 10770, |
| 74552 | /* SUB8mr_NF_ND */ |
| 74553 | 10772, |
| 74554 | /* SUB8ri */ |
| 74555 | 10775, |
| 74556 | /* SUB8ri8 */ |
| 74557 | 10778, |
| 74558 | /* SUB8ri_EVEX */ |
| 74559 | 10781, |
| 74560 | /* SUB8ri_ND */ |
| 74561 | 10784, |
| 74562 | /* SUB8ri_NF */ |
| 74563 | 10787, |
| 74564 | /* SUB8ri_NF_ND */ |
| 74565 | 10790, |
| 74566 | /* SUB8rm */ |
| 74567 | 10793, |
| 74568 | /* SUB8rm_EVEX */ |
| 74569 | 10796, |
| 74570 | /* SUB8rm_ND */ |
| 74571 | 10799, |
| 74572 | /* SUB8rm_NF */ |
| 74573 | 10802, |
| 74574 | /* SUB8rm_NF_ND */ |
| 74575 | 10805, |
| 74576 | /* SUB8rr */ |
| 74577 | 10808, |
| 74578 | /* SUB8rr_EVEX */ |
| 74579 | 10811, |
| 74580 | /* SUB8rr_EVEX_REV */ |
| 74581 | 10814, |
| 74582 | /* SUB8rr_ND */ |
| 74583 | 10817, |
| 74584 | /* SUB8rr_ND_REV */ |
| 74585 | 10820, |
| 74586 | /* SUB8rr_NF */ |
| 74587 | 10823, |
| 74588 | /* SUB8rr_NF_ND */ |
| 74589 | 10826, |
| 74590 | /* SUB8rr_NF_ND_REV */ |
| 74591 | 10829, |
| 74592 | /* SUB8rr_NF_REV */ |
| 74593 | 10832, |
| 74594 | /* SUB8rr_REV */ |
| 74595 | 10835, |
| 74596 | /* SUBPDrm */ |
| 74597 | 10838, |
| 74598 | /* SUBPDrr */ |
| 74599 | 10841, |
| 74600 | /* SUBPSrm */ |
| 74601 | 10844, |
| 74602 | /* SUBPSrr */ |
| 74603 | 10847, |
| 74604 | /* SUBR_F32m */ |
| 74605 | 10850, |
| 74606 | /* SUBR_F64m */ |
| 74607 | 10851, |
| 74608 | /* SUBR_FI16m */ |
| 74609 | 10852, |
| 74610 | /* SUBR_FI32m */ |
| 74611 | 10853, |
| 74612 | /* SUBR_FPrST0 */ |
| 74613 | 10854, |
| 74614 | /* SUBR_FST0r */ |
| 74615 | 10855, |
| 74616 | /* SUBR_Fp32m */ |
| 74617 | 10856, |
| 74618 | /* SUBR_Fp64m */ |
| 74619 | 10859, |
| 74620 | /* SUBR_Fp64m32 */ |
| 74621 | 10862, |
| 74622 | /* SUBR_Fp80m32 */ |
| 74623 | 10865, |
| 74624 | /* SUBR_Fp80m64 */ |
| 74625 | 10868, |
| 74626 | /* SUBR_FpI16m32 */ |
| 74627 | 10871, |
| 74628 | /* SUBR_FpI16m64 */ |
| 74629 | 10874, |
| 74630 | /* SUBR_FpI16m80 */ |
| 74631 | 10877, |
| 74632 | /* SUBR_FpI32m32 */ |
| 74633 | 10880, |
| 74634 | /* SUBR_FpI32m64 */ |
| 74635 | 10883, |
| 74636 | /* SUBR_FpI32m80 */ |
| 74637 | 10886, |
| 74638 | /* SUBR_FrST0 */ |
| 74639 | 10889, |
| 74640 | /* SUBSDrm */ |
| 74641 | 10890, |
| 74642 | /* SUBSDrm_Int */ |
| 74643 | 10893, |
| 74644 | /* SUBSDrr */ |
| 74645 | 10896, |
| 74646 | /* SUBSDrr_Int */ |
| 74647 | 10899, |
| 74648 | /* SUBSSrm */ |
| 74649 | 10902, |
| 74650 | /* SUBSSrm_Int */ |
| 74651 | 10905, |
| 74652 | /* SUBSSrr */ |
| 74653 | 10908, |
| 74654 | /* SUBSSrr_Int */ |
| 74655 | 10911, |
| 74656 | /* SUB_F32m */ |
| 74657 | 10914, |
| 74658 | /* SUB_F64m */ |
| 74659 | 10915, |
| 74660 | /* SUB_FI16m */ |
| 74661 | 10916, |
| 74662 | /* SUB_FI32m */ |
| 74663 | 10917, |
| 74664 | /* SUB_FPrST0 */ |
| 74665 | 10918, |
| 74666 | /* SUB_FST0r */ |
| 74667 | 10919, |
| 74668 | /* SUB_Fp32 */ |
| 74669 | 10920, |
| 74670 | /* SUB_Fp32m */ |
| 74671 | 10923, |
| 74672 | /* SUB_Fp64 */ |
| 74673 | 10926, |
| 74674 | /* SUB_Fp64m */ |
| 74675 | 10929, |
| 74676 | /* SUB_Fp64m32 */ |
| 74677 | 10932, |
| 74678 | /* SUB_Fp80 */ |
| 74679 | 10935, |
| 74680 | /* SUB_Fp80m32 */ |
| 74681 | 10938, |
| 74682 | /* SUB_Fp80m64 */ |
| 74683 | 10941, |
| 74684 | /* SUB_FpI16m32 */ |
| 74685 | 10944, |
| 74686 | /* SUB_FpI16m64 */ |
| 74687 | 10947, |
| 74688 | /* SUB_FpI16m80 */ |
| 74689 | 10950, |
| 74690 | /* SUB_FpI32m32 */ |
| 74691 | 10953, |
| 74692 | /* SUB_FpI32m64 */ |
| 74693 | 10956, |
| 74694 | /* SUB_FpI32m80 */ |
| 74695 | 10959, |
| 74696 | /* SUB_FrST0 */ |
| 74697 | 10962, |
| 74698 | /* SWAPGS */ |
| 74699 | 10963, |
| 74700 | /* SYSCALL */ |
| 74701 | 10963, |
| 74702 | /* SYSENTER */ |
| 74703 | 10963, |
| 74704 | /* SYSEXIT */ |
| 74705 | 10963, |
| 74706 | /* SYSEXIT64 */ |
| 74707 | 10963, |
| 74708 | /* SYSRET */ |
| 74709 | 10963, |
| 74710 | /* SYSRET64 */ |
| 74711 | 10963, |
| 74712 | /* T1MSKC32rm */ |
| 74713 | 10963, |
| 74714 | /* T1MSKC32rr */ |
| 74715 | 10965, |
| 74716 | /* T1MSKC64rm */ |
| 74717 | 10967, |
| 74718 | /* T1MSKC64rr */ |
| 74719 | 10969, |
| 74720 | /* TAILJMPd */ |
| 74721 | 10971, |
| 74722 | /* TAILJMPd64 */ |
| 74723 | 10972, |
| 74724 | /* TAILJMPd64_CC */ |
| 74725 | 10973, |
| 74726 | /* TAILJMPd_CC */ |
| 74727 | 10975, |
| 74728 | /* TAILJMPm */ |
| 74729 | 10977, |
| 74730 | /* TAILJMPm64 */ |
| 74731 | 10978, |
| 74732 | /* TAILJMPm64_REX */ |
| 74733 | 10979, |
| 74734 | /* TAILJMPr */ |
| 74735 | 10980, |
| 74736 | /* TAILJMPr64 */ |
| 74737 | 10981, |
| 74738 | /* TAILJMPr64_REX */ |
| 74739 | 10982, |
| 74740 | /* TCMMIMFP16PS */ |
| 74741 | 10983, |
| 74742 | /* TCMMRLFP16PS */ |
| 74743 | 10987, |
| 74744 | /* TCRETURNdi */ |
| 74745 | 10991, |
| 74746 | /* TCRETURNdi64 */ |
| 74747 | 10993, |
| 74748 | /* TCRETURNdi64cc */ |
| 74749 | 10995, |
| 74750 | /* TCRETURNdicc */ |
| 74751 | 10998, |
| 74752 | /* TCRETURNmi */ |
| 74753 | 11001, |
| 74754 | /* TCRETURNmi64 */ |
| 74755 | 11003, |
| 74756 | /* TCRETURNri */ |
| 74757 | 11005, |
| 74758 | /* TCRETURNri64 */ |
| 74759 | 11007, |
| 74760 | /* TDCALL */ |
| 74761 | 11009, |
| 74762 | /* TDPBF16PS */ |
| 74763 | 11009, |
| 74764 | /* TDPBSSD */ |
| 74765 | 11013, |
| 74766 | /* TDPBSUD */ |
| 74767 | 11017, |
| 74768 | /* TDPBUSD */ |
| 74769 | 11021, |
| 74770 | /* TDPBUUD */ |
| 74771 | 11025, |
| 74772 | /* TDPFP16PS */ |
| 74773 | 11029, |
| 74774 | /* TEST16i16 */ |
| 74775 | 11033, |
| 74776 | /* TEST16mi */ |
| 74777 | 11034, |
| 74778 | /* TEST16mr */ |
| 74779 | 11036, |
| 74780 | /* TEST16ri */ |
| 74781 | 11038, |
| 74782 | /* TEST16rr */ |
| 74783 | 11040, |
| 74784 | /* TEST32i32 */ |
| 74785 | 11042, |
| 74786 | /* TEST32mi */ |
| 74787 | 11043, |
| 74788 | /* TEST32mr */ |
| 74789 | 11045, |
| 74790 | /* TEST32ri */ |
| 74791 | 11047, |
| 74792 | /* TEST32rr */ |
| 74793 | 11049, |
| 74794 | /* TEST64i32 */ |
| 74795 | 11051, |
| 74796 | /* TEST64mi32 */ |
| 74797 | 11052, |
| 74798 | /* TEST64mr */ |
| 74799 | 11054, |
| 74800 | /* TEST64ri32 */ |
| 74801 | 11056, |
| 74802 | /* TEST64rr */ |
| 74803 | 11058, |
| 74804 | /* TEST8i8 */ |
| 74805 | 11060, |
| 74806 | /* TEST8mi */ |
| 74807 | 11061, |
| 74808 | /* TEST8mr */ |
| 74809 | 11063, |
| 74810 | /* TEST8ri */ |
| 74811 | 11065, |
| 74812 | /* TEST8rr */ |
| 74813 | 11067, |
| 74814 | /* TESTUI */ |
| 74815 | 11069, |
| 74816 | /* TILELOADD */ |
| 74817 | 11069, |
| 74818 | /* TILELOADDT1 */ |
| 74819 | 11071, |
| 74820 | /* TILELOADDT1_EVEX */ |
| 74821 | 11073, |
| 74822 | /* TILELOADD_EVEX */ |
| 74823 | 11075, |
| 74824 | /* TILERELEASE */ |
| 74825 | 11077, |
| 74826 | /* TILESTORED */ |
| 74827 | 11077, |
| 74828 | /* TILESTORED_EVEX */ |
| 74829 | 11079, |
| 74830 | /* TILEZERO */ |
| 74831 | 11081, |
| 74832 | /* TLBSYNC */ |
| 74833 | 11082, |
| 74834 | /* TLSCall_32 */ |
| 74835 | 11082, |
| 74836 | /* TLSCall_64 */ |
| 74837 | 11083, |
| 74838 | /* TLS_addr32 */ |
| 74839 | 11084, |
| 74840 | /* TLS_addr64 */ |
| 74841 | 11085, |
| 74842 | /* TLS_addrX32 */ |
| 74843 | 11086, |
| 74844 | /* TLS_base_addr32 */ |
| 74845 | 11087, |
| 74846 | /* TLS_base_addr64 */ |
| 74847 | 11088, |
| 74848 | /* TLS_base_addrX32 */ |
| 74849 | 11089, |
| 74850 | /* TLS_desc32 */ |
| 74851 | 11090, |
| 74852 | /* TLS_desc64 */ |
| 74853 | 11091, |
| 74854 | /* TPAUSE */ |
| 74855 | 11092, |
| 74856 | /* TRAP */ |
| 74857 | 11093, |
| 74858 | /* TST_F */ |
| 74859 | 11093, |
| 74860 | /* TST_Fp32 */ |
| 74861 | 11093, |
| 74862 | /* TST_Fp64 */ |
| 74863 | 11094, |
| 74864 | /* TST_Fp80 */ |
| 74865 | 11095, |
| 74866 | /* TZCNT16rm */ |
| 74867 | 11096, |
| 74868 | /* TZCNT16rm_EVEX */ |
| 74869 | 11098, |
| 74870 | /* TZCNT16rm_NF */ |
| 74871 | 11100, |
| 74872 | /* TZCNT16rr */ |
| 74873 | 11102, |
| 74874 | /* TZCNT16rr_EVEX */ |
| 74875 | 11104, |
| 74876 | /* TZCNT16rr_NF */ |
| 74877 | 11106, |
| 74878 | /* TZCNT32rm */ |
| 74879 | 11108, |
| 74880 | /* TZCNT32rm_EVEX */ |
| 74881 | 11110, |
| 74882 | /* TZCNT32rm_NF */ |
| 74883 | 11112, |
| 74884 | /* TZCNT32rr */ |
| 74885 | 11114, |
| 74886 | /* TZCNT32rr_EVEX */ |
| 74887 | 11116, |
| 74888 | /* TZCNT32rr_NF */ |
| 74889 | 11118, |
| 74890 | /* TZCNT64rm */ |
| 74891 | 11120, |
| 74892 | /* TZCNT64rm_EVEX */ |
| 74893 | 11122, |
| 74894 | /* TZCNT64rm_NF */ |
| 74895 | 11124, |
| 74896 | /* TZCNT64rr */ |
| 74897 | 11126, |
| 74898 | /* TZCNT64rr_EVEX */ |
| 74899 | 11128, |
| 74900 | /* TZCNT64rr_NF */ |
| 74901 | 11130, |
| 74902 | /* TZMSK32rm */ |
| 74903 | 11132, |
| 74904 | /* TZMSK32rr */ |
| 74905 | 11134, |
| 74906 | /* TZMSK64rm */ |
| 74907 | 11136, |
| 74908 | /* TZMSK64rr */ |
| 74909 | 11138, |
| 74910 | /* UBSAN_UD1 */ |
| 74911 | 11140, |
| 74912 | /* UCOMISDrm */ |
| 74913 | 11141, |
| 74914 | /* UCOMISDrm_Int */ |
| 74915 | 11143, |
| 74916 | /* UCOMISDrr */ |
| 74917 | 11145, |
| 74918 | /* UCOMISDrr_Int */ |
| 74919 | 11147, |
| 74920 | /* UCOMISSrm */ |
| 74921 | 11149, |
| 74922 | /* UCOMISSrm_Int */ |
| 74923 | 11151, |
| 74924 | /* UCOMISSrr */ |
| 74925 | 11153, |
| 74926 | /* UCOMISSrr_Int */ |
| 74927 | 11155, |
| 74928 | /* UCOM_FIPr */ |
| 74929 | 11157, |
| 74930 | /* UCOM_FIr */ |
| 74931 | 11158, |
| 74932 | /* UCOM_FPPr */ |
| 74933 | 11159, |
| 74934 | /* UCOM_FPr */ |
| 74935 | 11159, |
| 74936 | /* UCOM_FpIr32 */ |
| 74937 | 11160, |
| 74938 | /* UCOM_FpIr64 */ |
| 74939 | 11162, |
| 74940 | /* UCOM_FpIr80 */ |
| 74941 | 11164, |
| 74942 | /* UCOM_Fpr32 */ |
| 74943 | 11166, |
| 74944 | /* UCOM_Fpr64 */ |
| 74945 | 11168, |
| 74946 | /* UCOM_Fpr80 */ |
| 74947 | 11170, |
| 74948 | /* UCOM_Fr */ |
| 74949 | 11172, |
| 74950 | /* UD1Lm */ |
| 74951 | 11173, |
| 74952 | /* UD1Lr */ |
| 74953 | 11175, |
| 74954 | /* UD1Qm */ |
| 74955 | 11177, |
| 74956 | /* UD1Qr */ |
| 74957 | 11179, |
| 74958 | /* UD1Wm */ |
| 74959 | 11181, |
| 74960 | /* UD1Wr */ |
| 74961 | 11183, |
| 74962 | /* UIRET */ |
| 74963 | 11185, |
| 74964 | /* UMONITOR16 */ |
| 74965 | 11185, |
| 74966 | /* UMONITOR32 */ |
| 74967 | 11186, |
| 74968 | /* UMONITOR64 */ |
| 74969 | 11187, |
| 74970 | /* UMWAIT */ |
| 74971 | 11188, |
| 74972 | /* UNPCKHPDrm */ |
| 74973 | 11189, |
| 74974 | /* UNPCKHPDrr */ |
| 74975 | 11192, |
| 74976 | /* UNPCKHPSrm */ |
| 74977 | 11195, |
| 74978 | /* UNPCKHPSrr */ |
| 74979 | 11198, |
| 74980 | /* UNPCKLPDrm */ |
| 74981 | 11201, |
| 74982 | /* UNPCKLPDrr */ |
| 74983 | 11204, |
| 74984 | /* UNPCKLPSrm */ |
| 74985 | 11207, |
| 74986 | /* UNPCKLPSrr */ |
| 74987 | 11210, |
| 74988 | /* URDMSRri */ |
| 74989 | 11213, |
| 74990 | /* URDMSRri_EVEX */ |
| 74991 | 11215, |
| 74992 | /* URDMSRrr */ |
| 74993 | 11217, |
| 74994 | /* URDMSRrr_EVEX */ |
| 74995 | 11219, |
| 74996 | /* UWRMSRir */ |
| 74997 | 11221, |
| 74998 | /* UWRMSRir_EVEX */ |
| 74999 | 11223, |
| 75000 | /* UWRMSRrr */ |
| 75001 | 11225, |
| 75002 | /* UWRMSRrr_EVEX */ |
| 75003 | 11227, |
| 75004 | /* V4FMADDPSrm */ |
| 75005 | 11229, |
| 75006 | /* V4FMADDPSrmk */ |
| 75007 | 11233, |
| 75008 | /* V4FMADDPSrmkz */ |
| 75009 | 11238, |
| 75010 | /* V4FMADDSSrm */ |
| 75011 | 11243, |
| 75012 | /* V4FMADDSSrmk */ |
| 75013 | 11247, |
| 75014 | /* V4FMADDSSrmkz */ |
| 75015 | 11252, |
| 75016 | /* V4FNMADDPSrm */ |
| 75017 | 11257, |
| 75018 | /* V4FNMADDPSrmk */ |
| 75019 | 11261, |
| 75020 | /* V4FNMADDPSrmkz */ |
| 75021 | 11266, |
| 75022 | /* V4FNMADDSSrm */ |
| 75023 | 11271, |
| 75024 | /* V4FNMADDSSrmk */ |
| 75025 | 11275, |
| 75026 | /* V4FNMADDSSrmkz */ |
| 75027 | 11280, |
| 75028 | /* VAARG_64 */ |
| 75029 | 11285, |
| 75030 | /* VAARG_X32 */ |
| 75031 | 11290, |
| 75032 | /* VADDPDYrm */ |
| 75033 | 11295, |
| 75034 | /* VADDPDYrr */ |
| 75035 | 11298, |
| 75036 | /* VADDPDZ128rm */ |
| 75037 | 11301, |
| 75038 | /* VADDPDZ128rmb */ |
| 75039 | 11304, |
| 75040 | /* VADDPDZ128rmbk */ |
| 75041 | 11307, |
| 75042 | /* VADDPDZ128rmbkz */ |
| 75043 | 11312, |
| 75044 | /* VADDPDZ128rmk */ |
| 75045 | 11316, |
| 75046 | /* VADDPDZ128rmkz */ |
| 75047 | 11321, |
| 75048 | /* VADDPDZ128rr */ |
| 75049 | 11325, |
| 75050 | /* VADDPDZ128rrk */ |
| 75051 | 11328, |
| 75052 | /* VADDPDZ128rrkz */ |
| 75053 | 11333, |
| 75054 | /* VADDPDZ256rm */ |
| 75055 | 11337, |
| 75056 | /* VADDPDZ256rmb */ |
| 75057 | 11340, |
| 75058 | /* VADDPDZ256rmbk */ |
| 75059 | 11343, |
| 75060 | /* VADDPDZ256rmbkz */ |
| 75061 | 11348, |
| 75062 | /* VADDPDZ256rmk */ |
| 75063 | 11352, |
| 75064 | /* VADDPDZ256rmkz */ |
| 75065 | 11357, |
| 75066 | /* VADDPDZ256rr */ |
| 75067 | 11361, |
| 75068 | /* VADDPDZ256rrk */ |
| 75069 | 11364, |
| 75070 | /* VADDPDZ256rrkz */ |
| 75071 | 11369, |
| 75072 | /* VADDPDZrm */ |
| 75073 | 11373, |
| 75074 | /* VADDPDZrmb */ |
| 75075 | 11376, |
| 75076 | /* VADDPDZrmbk */ |
| 75077 | 11379, |
| 75078 | /* VADDPDZrmbkz */ |
| 75079 | 11384, |
| 75080 | /* VADDPDZrmk */ |
| 75081 | 11388, |
| 75082 | /* VADDPDZrmkz */ |
| 75083 | 11393, |
| 75084 | /* VADDPDZrr */ |
| 75085 | 11397, |
| 75086 | /* VADDPDZrrb */ |
| 75087 | 11400, |
| 75088 | /* VADDPDZrrbk */ |
| 75089 | 11404, |
| 75090 | /* VADDPDZrrbkz */ |
| 75091 | 11410, |
| 75092 | /* VADDPDZrrk */ |
| 75093 | 11415, |
| 75094 | /* VADDPDZrrkz */ |
| 75095 | 11420, |
| 75096 | /* VADDPDrm */ |
| 75097 | 11424, |
| 75098 | /* VADDPDrr */ |
| 75099 | 11427, |
| 75100 | /* VADDPHZ128rm */ |
| 75101 | 11430, |
| 75102 | /* VADDPHZ128rmb */ |
| 75103 | 11433, |
| 75104 | /* VADDPHZ128rmbk */ |
| 75105 | 11436, |
| 75106 | /* VADDPHZ128rmbkz */ |
| 75107 | 11441, |
| 75108 | /* VADDPHZ128rmk */ |
| 75109 | 11445, |
| 75110 | /* VADDPHZ128rmkz */ |
| 75111 | 11450, |
| 75112 | /* VADDPHZ128rr */ |
| 75113 | 11454, |
| 75114 | /* VADDPHZ128rrk */ |
| 75115 | 11457, |
| 75116 | /* VADDPHZ128rrkz */ |
| 75117 | 11462, |
| 75118 | /* VADDPHZ256rm */ |
| 75119 | 11466, |
| 75120 | /* VADDPHZ256rmb */ |
| 75121 | 11469, |
| 75122 | /* VADDPHZ256rmbk */ |
| 75123 | 11472, |
| 75124 | /* VADDPHZ256rmbkz */ |
| 75125 | 11477, |
| 75126 | /* VADDPHZ256rmk */ |
| 75127 | 11481, |
| 75128 | /* VADDPHZ256rmkz */ |
| 75129 | 11486, |
| 75130 | /* VADDPHZ256rr */ |
| 75131 | 11490, |
| 75132 | /* VADDPHZ256rrk */ |
| 75133 | 11493, |
| 75134 | /* VADDPHZ256rrkz */ |
| 75135 | 11498, |
| 75136 | /* VADDPHZrm */ |
| 75137 | 11502, |
| 75138 | /* VADDPHZrmb */ |
| 75139 | 11505, |
| 75140 | /* VADDPHZrmbk */ |
| 75141 | 11508, |
| 75142 | /* VADDPHZrmbkz */ |
| 75143 | 11513, |
| 75144 | /* VADDPHZrmk */ |
| 75145 | 11517, |
| 75146 | /* VADDPHZrmkz */ |
| 75147 | 11522, |
| 75148 | /* VADDPHZrr */ |
| 75149 | 11526, |
| 75150 | /* VADDPHZrrb */ |
| 75151 | 11529, |
| 75152 | /* VADDPHZrrbk */ |
| 75153 | 11533, |
| 75154 | /* VADDPHZrrbkz */ |
| 75155 | 11539, |
| 75156 | /* VADDPHZrrk */ |
| 75157 | 11544, |
| 75158 | /* VADDPHZrrkz */ |
| 75159 | 11549, |
| 75160 | /* VADDPSYrm */ |
| 75161 | 11553, |
| 75162 | /* VADDPSYrr */ |
| 75163 | 11556, |
| 75164 | /* VADDPSZ128rm */ |
| 75165 | 11559, |
| 75166 | /* VADDPSZ128rmb */ |
| 75167 | 11562, |
| 75168 | /* VADDPSZ128rmbk */ |
| 75169 | 11565, |
| 75170 | /* VADDPSZ128rmbkz */ |
| 75171 | 11570, |
| 75172 | /* VADDPSZ128rmk */ |
| 75173 | 11574, |
| 75174 | /* VADDPSZ128rmkz */ |
| 75175 | 11579, |
| 75176 | /* VADDPSZ128rr */ |
| 75177 | 11583, |
| 75178 | /* VADDPSZ128rrk */ |
| 75179 | 11586, |
| 75180 | /* VADDPSZ128rrkz */ |
| 75181 | 11591, |
| 75182 | /* VADDPSZ256rm */ |
| 75183 | 11595, |
| 75184 | /* VADDPSZ256rmb */ |
| 75185 | 11598, |
| 75186 | /* VADDPSZ256rmbk */ |
| 75187 | 11601, |
| 75188 | /* VADDPSZ256rmbkz */ |
| 75189 | 11606, |
| 75190 | /* VADDPSZ256rmk */ |
| 75191 | 11610, |
| 75192 | /* VADDPSZ256rmkz */ |
| 75193 | 11615, |
| 75194 | /* VADDPSZ256rr */ |
| 75195 | 11619, |
| 75196 | /* VADDPSZ256rrk */ |
| 75197 | 11622, |
| 75198 | /* VADDPSZ256rrkz */ |
| 75199 | 11627, |
| 75200 | /* VADDPSZrm */ |
| 75201 | 11631, |
| 75202 | /* VADDPSZrmb */ |
| 75203 | 11634, |
| 75204 | /* VADDPSZrmbk */ |
| 75205 | 11637, |
| 75206 | /* VADDPSZrmbkz */ |
| 75207 | 11642, |
| 75208 | /* VADDPSZrmk */ |
| 75209 | 11646, |
| 75210 | /* VADDPSZrmkz */ |
| 75211 | 11651, |
| 75212 | /* VADDPSZrr */ |
| 75213 | 11655, |
| 75214 | /* VADDPSZrrb */ |
| 75215 | 11658, |
| 75216 | /* VADDPSZrrbk */ |
| 75217 | 11662, |
| 75218 | /* VADDPSZrrbkz */ |
| 75219 | 11668, |
| 75220 | /* VADDPSZrrk */ |
| 75221 | 11673, |
| 75222 | /* VADDPSZrrkz */ |
| 75223 | 11678, |
| 75224 | /* VADDPSrm */ |
| 75225 | 11682, |
| 75226 | /* VADDPSrr */ |
| 75227 | 11685, |
| 75228 | /* VADDSDZrm */ |
| 75229 | 11688, |
| 75230 | /* VADDSDZrm_Int */ |
| 75231 | 11691, |
| 75232 | /* VADDSDZrm_Intk */ |
| 75233 | 11694, |
| 75234 | /* VADDSDZrm_Intkz */ |
| 75235 | 11699, |
| 75236 | /* VADDSDZrr */ |
| 75237 | 11703, |
| 75238 | /* VADDSDZrr_Int */ |
| 75239 | 11706, |
| 75240 | /* VADDSDZrr_Intk */ |
| 75241 | 11709, |
| 75242 | /* VADDSDZrr_Intkz */ |
| 75243 | 11714, |
| 75244 | /* VADDSDZrrb_Int */ |
| 75245 | 11718, |
| 75246 | /* VADDSDZrrb_Intk */ |
| 75247 | 11722, |
| 75248 | /* VADDSDZrrb_Intkz */ |
| 75249 | 11728, |
| 75250 | /* VADDSDrm */ |
| 75251 | 11733, |
| 75252 | /* VADDSDrm_Int */ |
| 75253 | 11736, |
| 75254 | /* VADDSDrr */ |
| 75255 | 11739, |
| 75256 | /* VADDSDrr_Int */ |
| 75257 | 11742, |
| 75258 | /* VADDSHZrm */ |
| 75259 | 11745, |
| 75260 | /* VADDSHZrm_Int */ |
| 75261 | 11748, |
| 75262 | /* VADDSHZrm_Intk */ |
| 75263 | 11751, |
| 75264 | /* VADDSHZrm_Intkz */ |
| 75265 | 11756, |
| 75266 | /* VADDSHZrr */ |
| 75267 | 11760, |
| 75268 | /* VADDSHZrr_Int */ |
| 75269 | 11763, |
| 75270 | /* VADDSHZrr_Intk */ |
| 75271 | 11766, |
| 75272 | /* VADDSHZrr_Intkz */ |
| 75273 | 11771, |
| 75274 | /* VADDSHZrrb_Int */ |
| 75275 | 11775, |
| 75276 | /* VADDSHZrrb_Intk */ |
| 75277 | 11779, |
| 75278 | /* VADDSHZrrb_Intkz */ |
| 75279 | 11785, |
| 75280 | /* VADDSSZrm */ |
| 75281 | 11790, |
| 75282 | /* VADDSSZrm_Int */ |
| 75283 | 11793, |
| 75284 | /* VADDSSZrm_Intk */ |
| 75285 | 11796, |
| 75286 | /* VADDSSZrm_Intkz */ |
| 75287 | 11801, |
| 75288 | /* VADDSSZrr */ |
| 75289 | 11805, |
| 75290 | /* VADDSSZrr_Int */ |
| 75291 | 11808, |
| 75292 | /* VADDSSZrr_Intk */ |
| 75293 | 11811, |
| 75294 | /* VADDSSZrr_Intkz */ |
| 75295 | 11816, |
| 75296 | /* VADDSSZrrb_Int */ |
| 75297 | 11820, |
| 75298 | /* VADDSSZrrb_Intk */ |
| 75299 | 11824, |
| 75300 | /* VADDSSZrrb_Intkz */ |
| 75301 | 11830, |
| 75302 | /* VADDSSrm */ |
| 75303 | 11835, |
| 75304 | /* VADDSSrm_Int */ |
| 75305 | 11838, |
| 75306 | /* VADDSSrr */ |
| 75307 | 11841, |
| 75308 | /* VADDSSrr_Int */ |
| 75309 | 11844, |
| 75310 | /* VADDSUBPDYrm */ |
| 75311 | 11847, |
| 75312 | /* VADDSUBPDYrr */ |
| 75313 | 11850, |
| 75314 | /* VADDSUBPDrm */ |
| 75315 | 11853, |
| 75316 | /* VADDSUBPDrr */ |
| 75317 | 11856, |
| 75318 | /* VADDSUBPSYrm */ |
| 75319 | 11859, |
| 75320 | /* VADDSUBPSYrr */ |
| 75321 | 11862, |
| 75322 | /* VADDSUBPSrm */ |
| 75323 | 11865, |
| 75324 | /* VADDSUBPSrr */ |
| 75325 | 11868, |
| 75326 | /* VAESDECLASTYrm */ |
| 75327 | 11871, |
| 75328 | /* VAESDECLASTYrr */ |
| 75329 | 11874, |
| 75330 | /* VAESDECLASTZ128rm */ |
| 75331 | 11877, |
| 75332 | /* VAESDECLASTZ128rr */ |
| 75333 | 11880, |
| 75334 | /* VAESDECLASTZ256rm */ |
| 75335 | 11883, |
| 75336 | /* VAESDECLASTZ256rr */ |
| 75337 | 11886, |
| 75338 | /* VAESDECLASTZrm */ |
| 75339 | 11889, |
| 75340 | /* VAESDECLASTZrr */ |
| 75341 | 11892, |
| 75342 | /* VAESDECLASTrm */ |
| 75343 | 11895, |
| 75344 | /* VAESDECLASTrr */ |
| 75345 | 11898, |
| 75346 | /* VAESDECYrm */ |
| 75347 | 11901, |
| 75348 | /* VAESDECYrr */ |
| 75349 | 11904, |
| 75350 | /* VAESDECZ128rm */ |
| 75351 | 11907, |
| 75352 | /* VAESDECZ128rr */ |
| 75353 | 11910, |
| 75354 | /* VAESDECZ256rm */ |
| 75355 | 11913, |
| 75356 | /* VAESDECZ256rr */ |
| 75357 | 11916, |
| 75358 | /* VAESDECZrm */ |
| 75359 | 11919, |
| 75360 | /* VAESDECZrr */ |
| 75361 | 11922, |
| 75362 | /* VAESDECrm */ |
| 75363 | 11925, |
| 75364 | /* VAESDECrr */ |
| 75365 | 11928, |
| 75366 | /* VAESENCLASTYrm */ |
| 75367 | 11931, |
| 75368 | /* VAESENCLASTYrr */ |
| 75369 | 11934, |
| 75370 | /* VAESENCLASTZ128rm */ |
| 75371 | 11937, |
| 75372 | /* VAESENCLASTZ128rr */ |
| 75373 | 11940, |
| 75374 | /* VAESENCLASTZ256rm */ |
| 75375 | 11943, |
| 75376 | /* VAESENCLASTZ256rr */ |
| 75377 | 11946, |
| 75378 | /* VAESENCLASTZrm */ |
| 75379 | 11949, |
| 75380 | /* VAESENCLASTZrr */ |
| 75381 | 11952, |
| 75382 | /* VAESENCLASTrm */ |
| 75383 | 11955, |
| 75384 | /* VAESENCLASTrr */ |
| 75385 | 11958, |
| 75386 | /* VAESENCYrm */ |
| 75387 | 11961, |
| 75388 | /* VAESENCYrr */ |
| 75389 | 11964, |
| 75390 | /* VAESENCZ128rm */ |
| 75391 | 11967, |
| 75392 | /* VAESENCZ128rr */ |
| 75393 | 11970, |
| 75394 | /* VAESENCZ256rm */ |
| 75395 | 11973, |
| 75396 | /* VAESENCZ256rr */ |
| 75397 | 11976, |
| 75398 | /* VAESENCZrm */ |
| 75399 | 11979, |
| 75400 | /* VAESENCZrr */ |
| 75401 | 11982, |
| 75402 | /* VAESENCrm */ |
| 75403 | 11985, |
| 75404 | /* VAESENCrr */ |
| 75405 | 11988, |
| 75406 | /* VAESIMCrm */ |
| 75407 | 11991, |
| 75408 | /* VAESIMCrr */ |
| 75409 | 11993, |
| 75410 | /* VAESKEYGENASSIST128rm */ |
| 75411 | 11995, |
| 75412 | /* VAESKEYGENASSIST128rr */ |
| 75413 | 11998, |
| 75414 | /* VALIGNDZ128rmbi */ |
| 75415 | 12001, |
| 75416 | /* VALIGNDZ128rmbik */ |
| 75417 | 12005, |
| 75418 | /* VALIGNDZ128rmbikz */ |
| 75419 | 12011, |
| 75420 | /* VALIGNDZ128rmi */ |
| 75421 | 12016, |
| 75422 | /* VALIGNDZ128rmik */ |
| 75423 | 12020, |
| 75424 | /* VALIGNDZ128rmikz */ |
| 75425 | 12026, |
| 75426 | /* VALIGNDZ128rri */ |
| 75427 | 12031, |
| 75428 | /* VALIGNDZ128rrik */ |
| 75429 | 12035, |
| 75430 | /* VALIGNDZ128rrikz */ |
| 75431 | 12041, |
| 75432 | /* VALIGNDZ256rmbi */ |
| 75433 | 12046, |
| 75434 | /* VALIGNDZ256rmbik */ |
| 75435 | 12050, |
| 75436 | /* VALIGNDZ256rmbikz */ |
| 75437 | 12056, |
| 75438 | /* VALIGNDZ256rmi */ |
| 75439 | 12061, |
| 75440 | /* VALIGNDZ256rmik */ |
| 75441 | 12065, |
| 75442 | /* VALIGNDZ256rmikz */ |
| 75443 | 12071, |
| 75444 | /* VALIGNDZ256rri */ |
| 75445 | 12076, |
| 75446 | /* VALIGNDZ256rrik */ |
| 75447 | 12080, |
| 75448 | /* VALIGNDZ256rrikz */ |
| 75449 | 12086, |
| 75450 | /* VALIGNDZrmbi */ |
| 75451 | 12091, |
| 75452 | /* VALIGNDZrmbik */ |
| 75453 | 12095, |
| 75454 | /* VALIGNDZrmbikz */ |
| 75455 | 12101, |
| 75456 | /* VALIGNDZrmi */ |
| 75457 | 12106, |
| 75458 | /* VALIGNDZrmik */ |
| 75459 | 12110, |
| 75460 | /* VALIGNDZrmikz */ |
| 75461 | 12116, |
| 75462 | /* VALIGNDZrri */ |
| 75463 | 12121, |
| 75464 | /* VALIGNDZrrik */ |
| 75465 | 12125, |
| 75466 | /* VALIGNDZrrikz */ |
| 75467 | 12131, |
| 75468 | /* VALIGNQZ128rmbi */ |
| 75469 | 12136, |
| 75470 | /* VALIGNQZ128rmbik */ |
| 75471 | 12140, |
| 75472 | /* VALIGNQZ128rmbikz */ |
| 75473 | 12146, |
| 75474 | /* VALIGNQZ128rmi */ |
| 75475 | 12151, |
| 75476 | /* VALIGNQZ128rmik */ |
| 75477 | 12155, |
| 75478 | /* VALIGNQZ128rmikz */ |
| 75479 | 12161, |
| 75480 | /* VALIGNQZ128rri */ |
| 75481 | 12166, |
| 75482 | /* VALIGNQZ128rrik */ |
| 75483 | 12170, |
| 75484 | /* VALIGNQZ128rrikz */ |
| 75485 | 12176, |
| 75486 | /* VALIGNQZ256rmbi */ |
| 75487 | 12181, |
| 75488 | /* VALIGNQZ256rmbik */ |
| 75489 | 12185, |
| 75490 | /* VALIGNQZ256rmbikz */ |
| 75491 | 12191, |
| 75492 | /* VALIGNQZ256rmi */ |
| 75493 | 12196, |
| 75494 | /* VALIGNQZ256rmik */ |
| 75495 | 12200, |
| 75496 | /* VALIGNQZ256rmikz */ |
| 75497 | 12206, |
| 75498 | /* VALIGNQZ256rri */ |
| 75499 | 12211, |
| 75500 | /* VALIGNQZ256rrik */ |
| 75501 | 12215, |
| 75502 | /* VALIGNQZ256rrikz */ |
| 75503 | 12221, |
| 75504 | /* VALIGNQZrmbi */ |
| 75505 | 12226, |
| 75506 | /* VALIGNQZrmbik */ |
| 75507 | 12230, |
| 75508 | /* VALIGNQZrmbikz */ |
| 75509 | 12236, |
| 75510 | /* VALIGNQZrmi */ |
| 75511 | 12241, |
| 75512 | /* VALIGNQZrmik */ |
| 75513 | 12245, |
| 75514 | /* VALIGNQZrmikz */ |
| 75515 | 12251, |
| 75516 | /* VALIGNQZrri */ |
| 75517 | 12256, |
| 75518 | /* VALIGNQZrrik */ |
| 75519 | 12260, |
| 75520 | /* VALIGNQZrrikz */ |
| 75521 | 12266, |
| 75522 | /* VANDNPDYrm */ |
| 75523 | 12271, |
| 75524 | /* VANDNPDYrr */ |
| 75525 | 12274, |
| 75526 | /* VANDNPDZ128rm */ |
| 75527 | 12277, |
| 75528 | /* VANDNPDZ128rmb */ |
| 75529 | 12280, |
| 75530 | /* VANDNPDZ128rmbk */ |
| 75531 | 12283, |
| 75532 | /* VANDNPDZ128rmbkz */ |
| 75533 | 12288, |
| 75534 | /* VANDNPDZ128rmk */ |
| 75535 | 12292, |
| 75536 | /* VANDNPDZ128rmkz */ |
| 75537 | 12297, |
| 75538 | /* VANDNPDZ128rr */ |
| 75539 | 12301, |
| 75540 | /* VANDNPDZ128rrk */ |
| 75541 | 12304, |
| 75542 | /* VANDNPDZ128rrkz */ |
| 75543 | 12309, |
| 75544 | /* VANDNPDZ256rm */ |
| 75545 | 12313, |
| 75546 | /* VANDNPDZ256rmb */ |
| 75547 | 12316, |
| 75548 | /* VANDNPDZ256rmbk */ |
| 75549 | 12319, |
| 75550 | /* VANDNPDZ256rmbkz */ |
| 75551 | 12324, |
| 75552 | /* VANDNPDZ256rmk */ |
| 75553 | 12328, |
| 75554 | /* VANDNPDZ256rmkz */ |
| 75555 | 12333, |
| 75556 | /* VANDNPDZ256rr */ |
| 75557 | 12337, |
| 75558 | /* VANDNPDZ256rrk */ |
| 75559 | 12340, |
| 75560 | /* VANDNPDZ256rrkz */ |
| 75561 | 12345, |
| 75562 | /* VANDNPDZrm */ |
| 75563 | 12349, |
| 75564 | /* VANDNPDZrmb */ |
| 75565 | 12352, |
| 75566 | /* VANDNPDZrmbk */ |
| 75567 | 12355, |
| 75568 | /* VANDNPDZrmbkz */ |
| 75569 | 12360, |
| 75570 | /* VANDNPDZrmk */ |
| 75571 | 12364, |
| 75572 | /* VANDNPDZrmkz */ |
| 75573 | 12369, |
| 75574 | /* VANDNPDZrr */ |
| 75575 | 12373, |
| 75576 | /* VANDNPDZrrk */ |
| 75577 | 12376, |
| 75578 | /* VANDNPDZrrkz */ |
| 75579 | 12381, |
| 75580 | /* VANDNPDrm */ |
| 75581 | 12385, |
| 75582 | /* VANDNPDrr */ |
| 75583 | 12388, |
| 75584 | /* VANDNPSYrm */ |
| 75585 | 12391, |
| 75586 | /* VANDNPSYrr */ |
| 75587 | 12394, |
| 75588 | /* VANDNPSZ128rm */ |
| 75589 | 12397, |
| 75590 | /* VANDNPSZ128rmb */ |
| 75591 | 12400, |
| 75592 | /* VANDNPSZ128rmbk */ |
| 75593 | 12403, |
| 75594 | /* VANDNPSZ128rmbkz */ |
| 75595 | 12408, |
| 75596 | /* VANDNPSZ128rmk */ |
| 75597 | 12412, |
| 75598 | /* VANDNPSZ128rmkz */ |
| 75599 | 12417, |
| 75600 | /* VANDNPSZ128rr */ |
| 75601 | 12421, |
| 75602 | /* VANDNPSZ128rrk */ |
| 75603 | 12424, |
| 75604 | /* VANDNPSZ128rrkz */ |
| 75605 | 12429, |
| 75606 | /* VANDNPSZ256rm */ |
| 75607 | 12433, |
| 75608 | /* VANDNPSZ256rmb */ |
| 75609 | 12436, |
| 75610 | /* VANDNPSZ256rmbk */ |
| 75611 | 12439, |
| 75612 | /* VANDNPSZ256rmbkz */ |
| 75613 | 12444, |
| 75614 | /* VANDNPSZ256rmk */ |
| 75615 | 12448, |
| 75616 | /* VANDNPSZ256rmkz */ |
| 75617 | 12453, |
| 75618 | /* VANDNPSZ256rr */ |
| 75619 | 12457, |
| 75620 | /* VANDNPSZ256rrk */ |
| 75621 | 12460, |
| 75622 | /* VANDNPSZ256rrkz */ |
| 75623 | 12465, |
| 75624 | /* VANDNPSZrm */ |
| 75625 | 12469, |
| 75626 | /* VANDNPSZrmb */ |
| 75627 | 12472, |
| 75628 | /* VANDNPSZrmbk */ |
| 75629 | 12475, |
| 75630 | /* VANDNPSZrmbkz */ |
| 75631 | 12480, |
| 75632 | /* VANDNPSZrmk */ |
| 75633 | 12484, |
| 75634 | /* VANDNPSZrmkz */ |
| 75635 | 12489, |
| 75636 | /* VANDNPSZrr */ |
| 75637 | 12493, |
| 75638 | /* VANDNPSZrrk */ |
| 75639 | 12496, |
| 75640 | /* VANDNPSZrrkz */ |
| 75641 | 12501, |
| 75642 | /* VANDNPSrm */ |
| 75643 | 12505, |
| 75644 | /* VANDNPSrr */ |
| 75645 | 12508, |
| 75646 | /* VANDPDYrm */ |
| 75647 | 12511, |
| 75648 | /* VANDPDYrr */ |
| 75649 | 12514, |
| 75650 | /* VANDPDZ128rm */ |
| 75651 | 12517, |
| 75652 | /* VANDPDZ128rmb */ |
| 75653 | 12520, |
| 75654 | /* VANDPDZ128rmbk */ |
| 75655 | 12523, |
| 75656 | /* VANDPDZ128rmbkz */ |
| 75657 | 12528, |
| 75658 | /* VANDPDZ128rmk */ |
| 75659 | 12532, |
| 75660 | /* VANDPDZ128rmkz */ |
| 75661 | 12537, |
| 75662 | /* VANDPDZ128rr */ |
| 75663 | 12541, |
| 75664 | /* VANDPDZ128rrk */ |
| 75665 | 12544, |
| 75666 | /* VANDPDZ128rrkz */ |
| 75667 | 12549, |
| 75668 | /* VANDPDZ256rm */ |
| 75669 | 12553, |
| 75670 | /* VANDPDZ256rmb */ |
| 75671 | 12556, |
| 75672 | /* VANDPDZ256rmbk */ |
| 75673 | 12559, |
| 75674 | /* VANDPDZ256rmbkz */ |
| 75675 | 12564, |
| 75676 | /* VANDPDZ256rmk */ |
| 75677 | 12568, |
| 75678 | /* VANDPDZ256rmkz */ |
| 75679 | 12573, |
| 75680 | /* VANDPDZ256rr */ |
| 75681 | 12577, |
| 75682 | /* VANDPDZ256rrk */ |
| 75683 | 12580, |
| 75684 | /* VANDPDZ256rrkz */ |
| 75685 | 12585, |
| 75686 | /* VANDPDZrm */ |
| 75687 | 12589, |
| 75688 | /* VANDPDZrmb */ |
| 75689 | 12592, |
| 75690 | /* VANDPDZrmbk */ |
| 75691 | 12595, |
| 75692 | /* VANDPDZrmbkz */ |
| 75693 | 12600, |
| 75694 | /* VANDPDZrmk */ |
| 75695 | 12604, |
| 75696 | /* VANDPDZrmkz */ |
| 75697 | 12609, |
| 75698 | /* VANDPDZrr */ |
| 75699 | 12613, |
| 75700 | /* VANDPDZrrk */ |
| 75701 | 12616, |
| 75702 | /* VANDPDZrrkz */ |
| 75703 | 12621, |
| 75704 | /* VANDPDrm */ |
| 75705 | 12625, |
| 75706 | /* VANDPDrr */ |
| 75707 | 12628, |
| 75708 | /* VANDPSYrm */ |
| 75709 | 12631, |
| 75710 | /* VANDPSYrr */ |
| 75711 | 12634, |
| 75712 | /* VANDPSZ128rm */ |
| 75713 | 12637, |
| 75714 | /* VANDPSZ128rmb */ |
| 75715 | 12640, |
| 75716 | /* VANDPSZ128rmbk */ |
| 75717 | 12643, |
| 75718 | /* VANDPSZ128rmbkz */ |
| 75719 | 12648, |
| 75720 | /* VANDPSZ128rmk */ |
| 75721 | 12652, |
| 75722 | /* VANDPSZ128rmkz */ |
| 75723 | 12657, |
| 75724 | /* VANDPSZ128rr */ |
| 75725 | 12661, |
| 75726 | /* VANDPSZ128rrk */ |
| 75727 | 12664, |
| 75728 | /* VANDPSZ128rrkz */ |
| 75729 | 12669, |
| 75730 | /* VANDPSZ256rm */ |
| 75731 | 12673, |
| 75732 | /* VANDPSZ256rmb */ |
| 75733 | 12676, |
| 75734 | /* VANDPSZ256rmbk */ |
| 75735 | 12679, |
| 75736 | /* VANDPSZ256rmbkz */ |
| 75737 | 12684, |
| 75738 | /* VANDPSZ256rmk */ |
| 75739 | 12688, |
| 75740 | /* VANDPSZ256rmkz */ |
| 75741 | 12693, |
| 75742 | /* VANDPSZ256rr */ |
| 75743 | 12697, |
| 75744 | /* VANDPSZ256rrk */ |
| 75745 | 12700, |
| 75746 | /* VANDPSZ256rrkz */ |
| 75747 | 12705, |
| 75748 | /* VANDPSZrm */ |
| 75749 | 12709, |
| 75750 | /* VANDPSZrmb */ |
| 75751 | 12712, |
| 75752 | /* VANDPSZrmbk */ |
| 75753 | 12715, |
| 75754 | /* VANDPSZrmbkz */ |
| 75755 | 12720, |
| 75756 | /* VANDPSZrmk */ |
| 75757 | 12724, |
| 75758 | /* VANDPSZrmkz */ |
| 75759 | 12729, |
| 75760 | /* VANDPSZrr */ |
| 75761 | 12733, |
| 75762 | /* VANDPSZrrk */ |
| 75763 | 12736, |
| 75764 | /* VANDPSZrrkz */ |
| 75765 | 12741, |
| 75766 | /* VANDPSrm */ |
| 75767 | 12745, |
| 75768 | /* VANDPSrr */ |
| 75769 | 12748, |
| 75770 | /* VASTART_SAVE_XMM_REGS */ |
| 75771 | 12751, |
| 75772 | /* VBCSTNEBF162PSYrm */ |
| 75773 | 12753, |
| 75774 | /* VBCSTNEBF162PSrm */ |
| 75775 | 12755, |
| 75776 | /* VBCSTNESH2PSYrm */ |
| 75777 | 12757, |
| 75778 | /* VBCSTNESH2PSrm */ |
| 75779 | 12759, |
| 75780 | /* VBLENDMPDZ128rm */ |
| 75781 | 12761, |
| 75782 | /* VBLENDMPDZ128rmb */ |
| 75783 | 12764, |
| 75784 | /* VBLENDMPDZ128rmbk */ |
| 75785 | 12767, |
| 75786 | /* VBLENDMPDZ128rmbkz */ |
| 75787 | 12771, |
| 75788 | /* VBLENDMPDZ128rmk */ |
| 75789 | 12775, |
| 75790 | /* VBLENDMPDZ128rmkz */ |
| 75791 | 12779, |
| 75792 | /* VBLENDMPDZ128rr */ |
| 75793 | 12783, |
| 75794 | /* VBLENDMPDZ128rrk */ |
| 75795 | 12786, |
| 75796 | /* VBLENDMPDZ128rrkz */ |
| 75797 | 12790, |
| 75798 | /* VBLENDMPDZ256rm */ |
| 75799 | 12794, |
| 75800 | /* VBLENDMPDZ256rmb */ |
| 75801 | 12797, |
| 75802 | /* VBLENDMPDZ256rmbk */ |
| 75803 | 12800, |
| 75804 | /* VBLENDMPDZ256rmbkz */ |
| 75805 | 12804, |
| 75806 | /* VBLENDMPDZ256rmk */ |
| 75807 | 12808, |
| 75808 | /* VBLENDMPDZ256rmkz */ |
| 75809 | 12812, |
| 75810 | /* VBLENDMPDZ256rr */ |
| 75811 | 12816, |
| 75812 | /* VBLENDMPDZ256rrk */ |
| 75813 | 12819, |
| 75814 | /* VBLENDMPDZ256rrkz */ |
| 75815 | 12823, |
| 75816 | /* VBLENDMPDZrm */ |
| 75817 | 12827, |
| 75818 | /* VBLENDMPDZrmb */ |
| 75819 | 12830, |
| 75820 | /* VBLENDMPDZrmbk */ |
| 75821 | 12833, |
| 75822 | /* VBLENDMPDZrmbkz */ |
| 75823 | 12837, |
| 75824 | /* VBLENDMPDZrmk */ |
| 75825 | 12841, |
| 75826 | /* VBLENDMPDZrmkz */ |
| 75827 | 12845, |
| 75828 | /* VBLENDMPDZrr */ |
| 75829 | 12849, |
| 75830 | /* VBLENDMPDZrrk */ |
| 75831 | 12852, |
| 75832 | /* VBLENDMPDZrrkz */ |
| 75833 | 12856, |
| 75834 | /* VBLENDMPSZ128rm */ |
| 75835 | 12860, |
| 75836 | /* VBLENDMPSZ128rmb */ |
| 75837 | 12863, |
| 75838 | /* VBLENDMPSZ128rmbk */ |
| 75839 | 12866, |
| 75840 | /* VBLENDMPSZ128rmbkz */ |
| 75841 | 12870, |
| 75842 | /* VBLENDMPSZ128rmk */ |
| 75843 | 12874, |
| 75844 | /* VBLENDMPSZ128rmkz */ |
| 75845 | 12878, |
| 75846 | /* VBLENDMPSZ128rr */ |
| 75847 | 12882, |
| 75848 | /* VBLENDMPSZ128rrk */ |
| 75849 | 12885, |
| 75850 | /* VBLENDMPSZ128rrkz */ |
| 75851 | 12889, |
| 75852 | /* VBLENDMPSZ256rm */ |
| 75853 | 12893, |
| 75854 | /* VBLENDMPSZ256rmb */ |
| 75855 | 12896, |
| 75856 | /* VBLENDMPSZ256rmbk */ |
| 75857 | 12899, |
| 75858 | /* VBLENDMPSZ256rmbkz */ |
| 75859 | 12903, |
| 75860 | /* VBLENDMPSZ256rmk */ |
| 75861 | 12907, |
| 75862 | /* VBLENDMPSZ256rmkz */ |
| 75863 | 12911, |
| 75864 | /* VBLENDMPSZ256rr */ |
| 75865 | 12915, |
| 75866 | /* VBLENDMPSZ256rrk */ |
| 75867 | 12918, |
| 75868 | /* VBLENDMPSZ256rrkz */ |
| 75869 | 12922, |
| 75870 | /* VBLENDMPSZrm */ |
| 75871 | 12926, |
| 75872 | /* VBLENDMPSZrmb */ |
| 75873 | 12929, |
| 75874 | /* VBLENDMPSZrmbk */ |
| 75875 | 12932, |
| 75876 | /* VBLENDMPSZrmbkz */ |
| 75877 | 12936, |
| 75878 | /* VBLENDMPSZrmk */ |
| 75879 | 12940, |
| 75880 | /* VBLENDMPSZrmkz */ |
| 75881 | 12944, |
| 75882 | /* VBLENDMPSZrr */ |
| 75883 | 12948, |
| 75884 | /* VBLENDMPSZrrk */ |
| 75885 | 12951, |
| 75886 | /* VBLENDMPSZrrkz */ |
| 75887 | 12955, |
| 75888 | /* VBLENDPDYrmi */ |
| 75889 | 12959, |
| 75890 | /* VBLENDPDYrri */ |
| 75891 | 12963, |
| 75892 | /* VBLENDPDrmi */ |
| 75893 | 12967, |
| 75894 | /* VBLENDPDrri */ |
| 75895 | 12971, |
| 75896 | /* VBLENDPSYrmi */ |
| 75897 | 12975, |
| 75898 | /* VBLENDPSYrri */ |
| 75899 | 12979, |
| 75900 | /* VBLENDPSrmi */ |
| 75901 | 12983, |
| 75902 | /* VBLENDPSrri */ |
| 75903 | 12987, |
| 75904 | /* VBLENDVPDYrmr */ |
| 75905 | 12991, |
| 75906 | /* VBLENDVPDYrrr */ |
| 75907 | 12995, |
| 75908 | /* VBLENDVPDrmr */ |
| 75909 | 12999, |
| 75910 | /* VBLENDVPDrrr */ |
| 75911 | 13003, |
| 75912 | /* VBLENDVPSYrmr */ |
| 75913 | 13007, |
| 75914 | /* VBLENDVPSYrrr */ |
| 75915 | 13011, |
| 75916 | /* VBLENDVPSrmr */ |
| 75917 | 13015, |
| 75918 | /* VBLENDVPSrrr */ |
| 75919 | 13019, |
| 75920 | /* VBROADCASTF128rm */ |
| 75921 | 13023, |
| 75922 | /* VBROADCASTF32X2Z256rm */ |
| 75923 | 13025, |
| 75924 | /* VBROADCASTF32X2Z256rmk */ |
| 75925 | 13027, |
| 75926 | /* VBROADCASTF32X2Z256rmkz */ |
| 75927 | 13031, |
| 75928 | /* VBROADCASTF32X2Z256rr */ |
| 75929 | 13034, |
| 75930 | /* VBROADCASTF32X2Z256rrk */ |
| 75931 | 13036, |
| 75932 | /* VBROADCASTF32X2Z256rrkz */ |
| 75933 | 13040, |
| 75934 | /* VBROADCASTF32X2Zrm */ |
| 75935 | 13043, |
| 75936 | /* VBROADCASTF32X2Zrmk */ |
| 75937 | 13045, |
| 75938 | /* VBROADCASTF32X2Zrmkz */ |
| 75939 | 13049, |
| 75940 | /* VBROADCASTF32X2Zrr */ |
| 75941 | 13052, |
| 75942 | /* VBROADCASTF32X2Zrrk */ |
| 75943 | 13054, |
| 75944 | /* VBROADCASTF32X2Zrrkz */ |
| 75945 | 13058, |
| 75946 | /* VBROADCASTF32X4Z256rm */ |
| 75947 | 13061, |
| 75948 | /* VBROADCASTF32X4Z256rmk */ |
| 75949 | 13063, |
| 75950 | /* VBROADCASTF32X4Z256rmkz */ |
| 75951 | 13067, |
| 75952 | /* VBROADCASTF32X4rm */ |
| 75953 | 13070, |
| 75954 | /* VBROADCASTF32X4rmk */ |
| 75955 | 13072, |
| 75956 | /* VBROADCASTF32X4rmkz */ |
| 75957 | 13076, |
| 75958 | /* VBROADCASTF32X8rm */ |
| 75959 | 13079, |
| 75960 | /* VBROADCASTF32X8rmk */ |
| 75961 | 13081, |
| 75962 | /* VBROADCASTF32X8rmkz */ |
| 75963 | 13085, |
| 75964 | /* VBROADCASTF64X2Z128rm */ |
| 75965 | 13088, |
| 75966 | /* VBROADCASTF64X2Z128rmk */ |
| 75967 | 13090, |
| 75968 | /* VBROADCASTF64X2Z128rmkz */ |
| 75969 | 13094, |
| 75970 | /* VBROADCASTF64X2rm */ |
| 75971 | 13097, |
| 75972 | /* VBROADCASTF64X2rmk */ |
| 75973 | 13099, |
| 75974 | /* VBROADCASTF64X2rmkz */ |
| 75975 | 13103, |
| 75976 | /* VBROADCASTF64X4rm */ |
| 75977 | 13106, |
| 75978 | /* VBROADCASTF64X4rmk */ |
| 75979 | 13108, |
| 75980 | /* VBROADCASTF64X4rmkz */ |
| 75981 | 13112, |
| 75982 | /* VBROADCASTI128rm */ |
| 75983 | 13115, |
| 75984 | /* VBROADCASTI32X2Z128rm */ |
| 75985 | 13117, |
| 75986 | /* VBROADCASTI32X2Z128rmk */ |
| 75987 | 13119, |
| 75988 | /* VBROADCASTI32X2Z128rmkz */ |
| 75989 | 13123, |
| 75990 | /* VBROADCASTI32X2Z128rr */ |
| 75991 | 13126, |
| 75992 | /* VBROADCASTI32X2Z128rrk */ |
| 75993 | 13128, |
| 75994 | /* VBROADCASTI32X2Z128rrkz */ |
| 75995 | 13132, |
| 75996 | /* VBROADCASTI32X2Z256rm */ |
| 75997 | 13135, |
| 75998 | /* VBROADCASTI32X2Z256rmk */ |
| 75999 | 13137, |
| 76000 | /* VBROADCASTI32X2Z256rmkz */ |
| 76001 | 13141, |
| 76002 | /* VBROADCASTI32X2Z256rr */ |
| 76003 | 13144, |
| 76004 | /* VBROADCASTI32X2Z256rrk */ |
| 76005 | 13146, |
| 76006 | /* VBROADCASTI32X2Z256rrkz */ |
| 76007 | 13150, |
| 76008 | /* VBROADCASTI32X2Zrm */ |
| 76009 | 13153, |
| 76010 | /* VBROADCASTI32X2Zrmk */ |
| 76011 | 13155, |
| 76012 | /* VBROADCASTI32X2Zrmkz */ |
| 76013 | 13159, |
| 76014 | /* VBROADCASTI32X2Zrr */ |
| 76015 | 13162, |
| 76016 | /* VBROADCASTI32X2Zrrk */ |
| 76017 | 13164, |
| 76018 | /* VBROADCASTI32X2Zrrkz */ |
| 76019 | 13168, |
| 76020 | /* VBROADCASTI32X4Z256rm */ |
| 76021 | 13171, |
| 76022 | /* VBROADCASTI32X4Z256rmk */ |
| 76023 | 13173, |
| 76024 | /* VBROADCASTI32X4Z256rmkz */ |
| 76025 | 13177, |
| 76026 | /* VBROADCASTI32X4rm */ |
| 76027 | 13180, |
| 76028 | /* VBROADCASTI32X4rmk */ |
| 76029 | 13182, |
| 76030 | /* VBROADCASTI32X4rmkz */ |
| 76031 | 13186, |
| 76032 | /* VBROADCASTI32X8rm */ |
| 76033 | 13189, |
| 76034 | /* VBROADCASTI32X8rmk */ |
| 76035 | 13191, |
| 76036 | /* VBROADCASTI32X8rmkz */ |
| 76037 | 13195, |
| 76038 | /* VBROADCASTI64X2Z128rm */ |
| 76039 | 13198, |
| 76040 | /* VBROADCASTI64X2Z128rmk */ |
| 76041 | 13200, |
| 76042 | /* VBROADCASTI64X2Z128rmkz */ |
| 76043 | 13204, |
| 76044 | /* VBROADCASTI64X2rm */ |
| 76045 | 13207, |
| 76046 | /* VBROADCASTI64X2rmk */ |
| 76047 | 13209, |
| 76048 | /* VBROADCASTI64X2rmkz */ |
| 76049 | 13213, |
| 76050 | /* VBROADCASTI64X4rm */ |
| 76051 | 13216, |
| 76052 | /* VBROADCASTI64X4rmk */ |
| 76053 | 13218, |
| 76054 | /* VBROADCASTI64X4rmkz */ |
| 76055 | 13222, |
| 76056 | /* VBROADCASTSDYrm */ |
| 76057 | 13225, |
| 76058 | /* VBROADCASTSDYrr */ |
| 76059 | 13227, |
| 76060 | /* VBROADCASTSDZ256rm */ |
| 76061 | 13229, |
| 76062 | /* VBROADCASTSDZ256rmk */ |
| 76063 | 13231, |
| 76064 | /* VBROADCASTSDZ256rmkz */ |
| 76065 | 13235, |
| 76066 | /* VBROADCASTSDZ256rr */ |
| 76067 | 13238, |
| 76068 | /* VBROADCASTSDZ256rrk */ |
| 76069 | 13240, |
| 76070 | /* VBROADCASTSDZ256rrkz */ |
| 76071 | 13244, |
| 76072 | /* VBROADCASTSDZrm */ |
| 76073 | 13247, |
| 76074 | /* VBROADCASTSDZrmk */ |
| 76075 | 13249, |
| 76076 | /* VBROADCASTSDZrmkz */ |
| 76077 | 13253, |
| 76078 | /* VBROADCASTSDZrr */ |
| 76079 | 13256, |
| 76080 | /* VBROADCASTSDZrrk */ |
| 76081 | 13258, |
| 76082 | /* VBROADCASTSDZrrkz */ |
| 76083 | 13262, |
| 76084 | /* VBROADCASTSSYrm */ |
| 76085 | 13265, |
| 76086 | /* VBROADCASTSSYrr */ |
| 76087 | 13267, |
| 76088 | /* VBROADCASTSSZ128rm */ |
| 76089 | 13269, |
| 76090 | /* VBROADCASTSSZ128rmk */ |
| 76091 | 13271, |
| 76092 | /* VBROADCASTSSZ128rmkz */ |
| 76093 | 13275, |
| 76094 | /* VBROADCASTSSZ128rr */ |
| 76095 | 13278, |
| 76096 | /* VBROADCASTSSZ128rrk */ |
| 76097 | 13280, |
| 76098 | /* VBROADCASTSSZ128rrkz */ |
| 76099 | 13284, |
| 76100 | /* VBROADCASTSSZ256rm */ |
| 76101 | 13287, |
| 76102 | /* VBROADCASTSSZ256rmk */ |
| 76103 | 13289, |
| 76104 | /* VBROADCASTSSZ256rmkz */ |
| 76105 | 13293, |
| 76106 | /* VBROADCASTSSZ256rr */ |
| 76107 | 13296, |
| 76108 | /* VBROADCASTSSZ256rrk */ |
| 76109 | 13298, |
| 76110 | /* VBROADCASTSSZ256rrkz */ |
| 76111 | 13302, |
| 76112 | /* VBROADCASTSSZrm */ |
| 76113 | 13305, |
| 76114 | /* VBROADCASTSSZrmk */ |
| 76115 | 13307, |
| 76116 | /* VBROADCASTSSZrmkz */ |
| 76117 | 13311, |
| 76118 | /* VBROADCASTSSZrr */ |
| 76119 | 13314, |
| 76120 | /* VBROADCASTSSZrrk */ |
| 76121 | 13316, |
| 76122 | /* VBROADCASTSSZrrkz */ |
| 76123 | 13320, |
| 76124 | /* VBROADCASTSSrm */ |
| 76125 | 13323, |
| 76126 | /* VBROADCASTSSrr */ |
| 76127 | 13325, |
| 76128 | /* VCMPPDYrmi */ |
| 76129 | 13327, |
| 76130 | /* VCMPPDYrri */ |
| 76131 | 13331, |
| 76132 | /* VCMPPDZ128rmbi */ |
| 76133 | 13335, |
| 76134 | /* VCMPPDZ128rmbik */ |
| 76135 | 13339, |
| 76136 | /* VCMPPDZ128rmi */ |
| 76137 | 13344, |
| 76138 | /* VCMPPDZ128rmik */ |
| 76139 | 13348, |
| 76140 | /* VCMPPDZ128rri */ |
| 76141 | 13353, |
| 76142 | /* VCMPPDZ128rrik */ |
| 76143 | 13357, |
| 76144 | /* VCMPPDZ256rmbi */ |
| 76145 | 13362, |
| 76146 | /* VCMPPDZ256rmbik */ |
| 76147 | 13366, |
| 76148 | /* VCMPPDZ256rmi */ |
| 76149 | 13371, |
| 76150 | /* VCMPPDZ256rmik */ |
| 76151 | 13375, |
| 76152 | /* VCMPPDZ256rri */ |
| 76153 | 13380, |
| 76154 | /* VCMPPDZ256rrik */ |
| 76155 | 13384, |
| 76156 | /* VCMPPDZrmbi */ |
| 76157 | 13389, |
| 76158 | /* VCMPPDZrmbik */ |
| 76159 | 13393, |
| 76160 | /* VCMPPDZrmi */ |
| 76161 | 13398, |
| 76162 | /* VCMPPDZrmik */ |
| 76163 | 13402, |
| 76164 | /* VCMPPDZrri */ |
| 76165 | 13407, |
| 76166 | /* VCMPPDZrrib */ |
| 76167 | 13411, |
| 76168 | /* VCMPPDZrribk */ |
| 76169 | 13415, |
| 76170 | /* VCMPPDZrrik */ |
| 76171 | 13420, |
| 76172 | /* VCMPPDrmi */ |
| 76173 | 13425, |
| 76174 | /* VCMPPDrri */ |
| 76175 | 13429, |
| 76176 | /* VCMPPHZ128rmbi */ |
| 76177 | 13433, |
| 76178 | /* VCMPPHZ128rmbik */ |
| 76179 | 13437, |
| 76180 | /* VCMPPHZ128rmi */ |
| 76181 | 13442, |
| 76182 | /* VCMPPHZ128rmik */ |
| 76183 | 13446, |
| 76184 | /* VCMPPHZ128rri */ |
| 76185 | 13451, |
| 76186 | /* VCMPPHZ128rrik */ |
| 76187 | 13455, |
| 76188 | /* VCMPPHZ256rmbi */ |
| 76189 | 13460, |
| 76190 | /* VCMPPHZ256rmbik */ |
| 76191 | 13464, |
| 76192 | /* VCMPPHZ256rmi */ |
| 76193 | 13469, |
| 76194 | /* VCMPPHZ256rmik */ |
| 76195 | 13473, |
| 76196 | /* VCMPPHZ256rri */ |
| 76197 | 13478, |
| 76198 | /* VCMPPHZ256rrik */ |
| 76199 | 13482, |
| 76200 | /* VCMPPHZrmbi */ |
| 76201 | 13487, |
| 76202 | /* VCMPPHZrmbik */ |
| 76203 | 13491, |
| 76204 | /* VCMPPHZrmi */ |
| 76205 | 13496, |
| 76206 | /* VCMPPHZrmik */ |
| 76207 | 13500, |
| 76208 | /* VCMPPHZrri */ |
| 76209 | 13505, |
| 76210 | /* VCMPPHZrrib */ |
| 76211 | 13509, |
| 76212 | /* VCMPPHZrribk */ |
| 76213 | 13513, |
| 76214 | /* VCMPPHZrrik */ |
| 76215 | 13518, |
| 76216 | /* VCMPPSYrmi */ |
| 76217 | 13523, |
| 76218 | /* VCMPPSYrri */ |
| 76219 | 13527, |
| 76220 | /* VCMPPSZ128rmbi */ |
| 76221 | 13531, |
| 76222 | /* VCMPPSZ128rmbik */ |
| 76223 | 13535, |
| 76224 | /* VCMPPSZ128rmi */ |
| 76225 | 13540, |
| 76226 | /* VCMPPSZ128rmik */ |
| 76227 | 13544, |
| 76228 | /* VCMPPSZ128rri */ |
| 76229 | 13549, |
| 76230 | /* VCMPPSZ128rrik */ |
| 76231 | 13553, |
| 76232 | /* VCMPPSZ256rmbi */ |
| 76233 | 13558, |
| 76234 | /* VCMPPSZ256rmbik */ |
| 76235 | 13562, |
| 76236 | /* VCMPPSZ256rmi */ |
| 76237 | 13567, |
| 76238 | /* VCMPPSZ256rmik */ |
| 76239 | 13571, |
| 76240 | /* VCMPPSZ256rri */ |
| 76241 | 13576, |
| 76242 | /* VCMPPSZ256rrik */ |
| 76243 | 13580, |
| 76244 | /* VCMPPSZrmbi */ |
| 76245 | 13585, |
| 76246 | /* VCMPPSZrmbik */ |
| 76247 | 13589, |
| 76248 | /* VCMPPSZrmi */ |
| 76249 | 13594, |
| 76250 | /* VCMPPSZrmik */ |
| 76251 | 13598, |
| 76252 | /* VCMPPSZrri */ |
| 76253 | 13603, |
| 76254 | /* VCMPPSZrrib */ |
| 76255 | 13607, |
| 76256 | /* VCMPPSZrribk */ |
| 76257 | 13611, |
| 76258 | /* VCMPPSZrrik */ |
| 76259 | 13616, |
| 76260 | /* VCMPPSrmi */ |
| 76261 | 13621, |
| 76262 | /* VCMPPSrri */ |
| 76263 | 13625, |
| 76264 | /* VCMPSDZrmi */ |
| 76265 | 13629, |
| 76266 | /* VCMPSDZrmi_Int */ |
| 76267 | 13633, |
| 76268 | /* VCMPSDZrmi_Intk */ |
| 76269 | 13637, |
| 76270 | /* VCMPSDZrri */ |
| 76271 | 13642, |
| 76272 | /* VCMPSDZrri_Int */ |
| 76273 | 13646, |
| 76274 | /* VCMPSDZrri_Intk */ |
| 76275 | 13650, |
| 76276 | /* VCMPSDZrrib_Int */ |
| 76277 | 13655, |
| 76278 | /* VCMPSDZrrib_Intk */ |
| 76279 | 13659, |
| 76280 | /* VCMPSDrmi */ |
| 76281 | 13664, |
| 76282 | /* VCMPSDrmi_Int */ |
| 76283 | 13668, |
| 76284 | /* VCMPSDrri */ |
| 76285 | 13672, |
| 76286 | /* VCMPSDrri_Int */ |
| 76287 | 13676, |
| 76288 | /* VCMPSHZrmi */ |
| 76289 | 13680, |
| 76290 | /* VCMPSHZrmi_Int */ |
| 76291 | 13684, |
| 76292 | /* VCMPSHZrmi_Intk */ |
| 76293 | 13688, |
| 76294 | /* VCMPSHZrri */ |
| 76295 | 13693, |
| 76296 | /* VCMPSHZrri_Int */ |
| 76297 | 13697, |
| 76298 | /* VCMPSHZrri_Intk */ |
| 76299 | 13701, |
| 76300 | /* VCMPSHZrrib_Int */ |
| 76301 | 13706, |
| 76302 | /* VCMPSHZrrib_Intk */ |
| 76303 | 13710, |
| 76304 | /* VCMPSSZrmi */ |
| 76305 | 13715, |
| 76306 | /* VCMPSSZrmi_Int */ |
| 76307 | 13719, |
| 76308 | /* VCMPSSZrmi_Intk */ |
| 76309 | 13723, |
| 76310 | /* VCMPSSZrri */ |
| 76311 | 13728, |
| 76312 | /* VCMPSSZrri_Int */ |
| 76313 | 13732, |
| 76314 | /* VCMPSSZrri_Intk */ |
| 76315 | 13736, |
| 76316 | /* VCMPSSZrrib_Int */ |
| 76317 | 13741, |
| 76318 | /* VCMPSSZrrib_Intk */ |
| 76319 | 13745, |
| 76320 | /* VCMPSSrmi */ |
| 76321 | 13750, |
| 76322 | /* VCMPSSrmi_Int */ |
| 76323 | 13754, |
| 76324 | /* VCMPSSrri */ |
| 76325 | 13758, |
| 76326 | /* VCMPSSrri_Int */ |
| 76327 | 13762, |
| 76328 | /* VCOMISDZrm */ |
| 76329 | 13766, |
| 76330 | /* VCOMISDZrm_Int */ |
| 76331 | 13768, |
| 76332 | /* VCOMISDZrr */ |
| 76333 | 13770, |
| 76334 | /* VCOMISDZrr_Int */ |
| 76335 | 13772, |
| 76336 | /* VCOMISDZrrb */ |
| 76337 | 13774, |
| 76338 | /* VCOMISDrm */ |
| 76339 | 13776, |
| 76340 | /* VCOMISDrm_Int */ |
| 76341 | 13778, |
| 76342 | /* VCOMISDrr */ |
| 76343 | 13780, |
| 76344 | /* VCOMISDrr_Int */ |
| 76345 | 13782, |
| 76346 | /* VCOMISHZrm */ |
| 76347 | 13784, |
| 76348 | /* VCOMISHZrm_Int */ |
| 76349 | 13786, |
| 76350 | /* VCOMISHZrr */ |
| 76351 | 13788, |
| 76352 | /* VCOMISHZrr_Int */ |
| 76353 | 13790, |
| 76354 | /* VCOMISHZrrb */ |
| 76355 | 13792, |
| 76356 | /* VCOMISSZrm */ |
| 76357 | 13794, |
| 76358 | /* VCOMISSZrm_Int */ |
| 76359 | 13796, |
| 76360 | /* VCOMISSZrr */ |
| 76361 | 13798, |
| 76362 | /* VCOMISSZrr_Int */ |
| 76363 | 13800, |
| 76364 | /* VCOMISSZrrb */ |
| 76365 | 13802, |
| 76366 | /* VCOMISSrm */ |
| 76367 | 13804, |
| 76368 | /* VCOMISSrm_Int */ |
| 76369 | 13806, |
| 76370 | /* VCOMISSrr */ |
| 76371 | 13808, |
| 76372 | /* VCOMISSrr_Int */ |
| 76373 | 13810, |
| 76374 | /* VCOMPRESSPDZ128mr */ |
| 76375 | 13812, |
| 76376 | /* VCOMPRESSPDZ128mrk */ |
| 76377 | 13814, |
| 76378 | /* VCOMPRESSPDZ128rr */ |
| 76379 | 13817, |
| 76380 | /* VCOMPRESSPDZ128rrk */ |
| 76381 | 13819, |
| 76382 | /* VCOMPRESSPDZ128rrkz */ |
| 76383 | 13823, |
| 76384 | /* VCOMPRESSPDZ256mr */ |
| 76385 | 13826, |
| 76386 | /* VCOMPRESSPDZ256mrk */ |
| 76387 | 13828, |
| 76388 | /* VCOMPRESSPDZ256rr */ |
| 76389 | 13831, |
| 76390 | /* VCOMPRESSPDZ256rrk */ |
| 76391 | 13833, |
| 76392 | /* VCOMPRESSPDZ256rrkz */ |
| 76393 | 13837, |
| 76394 | /* VCOMPRESSPDZmr */ |
| 76395 | 13840, |
| 76396 | /* VCOMPRESSPDZmrk */ |
| 76397 | 13842, |
| 76398 | /* VCOMPRESSPDZrr */ |
| 76399 | 13845, |
| 76400 | /* VCOMPRESSPDZrrk */ |
| 76401 | 13847, |
| 76402 | /* VCOMPRESSPDZrrkz */ |
| 76403 | 13851, |
| 76404 | /* VCOMPRESSPSZ128mr */ |
| 76405 | 13854, |
| 76406 | /* VCOMPRESSPSZ128mrk */ |
| 76407 | 13856, |
| 76408 | /* VCOMPRESSPSZ128rr */ |
| 76409 | 13859, |
| 76410 | /* VCOMPRESSPSZ128rrk */ |
| 76411 | 13861, |
| 76412 | /* VCOMPRESSPSZ128rrkz */ |
| 76413 | 13865, |
| 76414 | /* VCOMPRESSPSZ256mr */ |
| 76415 | 13868, |
| 76416 | /* VCOMPRESSPSZ256mrk */ |
| 76417 | 13870, |
| 76418 | /* VCOMPRESSPSZ256rr */ |
| 76419 | 13873, |
| 76420 | /* VCOMPRESSPSZ256rrk */ |
| 76421 | 13875, |
| 76422 | /* VCOMPRESSPSZ256rrkz */ |
| 76423 | 13879, |
| 76424 | /* VCOMPRESSPSZmr */ |
| 76425 | 13882, |
| 76426 | /* VCOMPRESSPSZmrk */ |
| 76427 | 13884, |
| 76428 | /* VCOMPRESSPSZrr */ |
| 76429 | 13887, |
| 76430 | /* VCOMPRESSPSZrrk */ |
| 76431 | 13889, |
| 76432 | /* VCOMPRESSPSZrrkz */ |
| 76433 | 13893, |
| 76434 | /* VCVTDQ2PDYrm */ |
| 76435 | 13896, |
| 76436 | /* VCVTDQ2PDYrr */ |
| 76437 | 13898, |
| 76438 | /* VCVTDQ2PDZ128rm */ |
| 76439 | 13900, |
| 76440 | /* VCVTDQ2PDZ128rmb */ |
| 76441 | 13902, |
| 76442 | /* VCVTDQ2PDZ128rmbk */ |
| 76443 | 13904, |
| 76444 | /* VCVTDQ2PDZ128rmbkz */ |
| 76445 | 13908, |
| 76446 | /* VCVTDQ2PDZ128rmk */ |
| 76447 | 13911, |
| 76448 | /* VCVTDQ2PDZ128rmkz */ |
| 76449 | 13915, |
| 76450 | /* VCVTDQ2PDZ128rr */ |
| 76451 | 13918, |
| 76452 | /* VCVTDQ2PDZ128rrk */ |
| 76453 | 13920, |
| 76454 | /* VCVTDQ2PDZ128rrkz */ |
| 76455 | 13924, |
| 76456 | /* VCVTDQ2PDZ256rm */ |
| 76457 | 13927, |
| 76458 | /* VCVTDQ2PDZ256rmb */ |
| 76459 | 13929, |
| 76460 | /* VCVTDQ2PDZ256rmbk */ |
| 76461 | 13931, |
| 76462 | /* VCVTDQ2PDZ256rmbkz */ |
| 76463 | 13935, |
| 76464 | /* VCVTDQ2PDZ256rmk */ |
| 76465 | 13938, |
| 76466 | /* VCVTDQ2PDZ256rmkz */ |
| 76467 | 13942, |
| 76468 | /* VCVTDQ2PDZ256rr */ |
| 76469 | 13945, |
| 76470 | /* VCVTDQ2PDZ256rrk */ |
| 76471 | 13947, |
| 76472 | /* VCVTDQ2PDZ256rrkz */ |
| 76473 | 13951, |
| 76474 | /* VCVTDQ2PDZrm */ |
| 76475 | 13954, |
| 76476 | /* VCVTDQ2PDZrmb */ |
| 76477 | 13956, |
| 76478 | /* VCVTDQ2PDZrmbk */ |
| 76479 | 13958, |
| 76480 | /* VCVTDQ2PDZrmbkz */ |
| 76481 | 13962, |
| 76482 | /* VCVTDQ2PDZrmk */ |
| 76483 | 13965, |
| 76484 | /* VCVTDQ2PDZrmkz */ |
| 76485 | 13969, |
| 76486 | /* VCVTDQ2PDZrr */ |
| 76487 | 13972, |
| 76488 | /* VCVTDQ2PDZrrk */ |
| 76489 | 13974, |
| 76490 | /* VCVTDQ2PDZrrkz */ |
| 76491 | 13978, |
| 76492 | /* VCVTDQ2PDrm */ |
| 76493 | 13981, |
| 76494 | /* VCVTDQ2PDrr */ |
| 76495 | 13983, |
| 76496 | /* VCVTDQ2PHZ128rm */ |
| 76497 | 13985, |
| 76498 | /* VCVTDQ2PHZ128rmb */ |
| 76499 | 13987, |
| 76500 | /* VCVTDQ2PHZ128rmbk */ |
| 76501 | 13989, |
| 76502 | /* VCVTDQ2PHZ128rmbkz */ |
| 76503 | 13993, |
| 76504 | /* VCVTDQ2PHZ128rmk */ |
| 76505 | 13996, |
| 76506 | /* VCVTDQ2PHZ128rmkz */ |
| 76507 | 14000, |
| 76508 | /* VCVTDQ2PHZ128rr */ |
| 76509 | 14003, |
| 76510 | /* VCVTDQ2PHZ128rrk */ |
| 76511 | 14005, |
| 76512 | /* VCVTDQ2PHZ128rrkz */ |
| 76513 | 14009, |
| 76514 | /* VCVTDQ2PHZ256rm */ |
| 76515 | 14012, |
| 76516 | /* VCVTDQ2PHZ256rmb */ |
| 76517 | 14014, |
| 76518 | /* VCVTDQ2PHZ256rmbk */ |
| 76519 | 14016, |
| 76520 | /* VCVTDQ2PHZ256rmbkz */ |
| 76521 | 14020, |
| 76522 | /* VCVTDQ2PHZ256rmk */ |
| 76523 | 14023, |
| 76524 | /* VCVTDQ2PHZ256rmkz */ |
| 76525 | 14027, |
| 76526 | /* VCVTDQ2PHZ256rr */ |
| 76527 | 14030, |
| 76528 | /* VCVTDQ2PHZ256rrk */ |
| 76529 | 14032, |
| 76530 | /* VCVTDQ2PHZ256rrkz */ |
| 76531 | 14036, |
| 76532 | /* VCVTDQ2PHZrm */ |
| 76533 | 14039, |
| 76534 | /* VCVTDQ2PHZrmb */ |
| 76535 | 14041, |
| 76536 | /* VCVTDQ2PHZrmbk */ |
| 76537 | 14043, |
| 76538 | /* VCVTDQ2PHZrmbkz */ |
| 76539 | 14047, |
| 76540 | /* VCVTDQ2PHZrmk */ |
| 76541 | 14050, |
| 76542 | /* VCVTDQ2PHZrmkz */ |
| 76543 | 14054, |
| 76544 | /* VCVTDQ2PHZrr */ |
| 76545 | 14057, |
| 76546 | /* VCVTDQ2PHZrrb */ |
| 76547 | 14059, |
| 76548 | /* VCVTDQ2PHZrrbk */ |
| 76549 | 14062, |
| 76550 | /* VCVTDQ2PHZrrbkz */ |
| 76551 | 14067, |
| 76552 | /* VCVTDQ2PHZrrk */ |
| 76553 | 14071, |
| 76554 | /* VCVTDQ2PHZrrkz */ |
| 76555 | 14075, |
| 76556 | /* VCVTDQ2PSYrm */ |
| 76557 | 14078, |
| 76558 | /* VCVTDQ2PSYrr */ |
| 76559 | 14080, |
| 76560 | /* VCVTDQ2PSZ128rm */ |
| 76561 | 14082, |
| 76562 | /* VCVTDQ2PSZ128rmb */ |
| 76563 | 14084, |
| 76564 | /* VCVTDQ2PSZ128rmbk */ |
| 76565 | 14086, |
| 76566 | /* VCVTDQ2PSZ128rmbkz */ |
| 76567 | 14090, |
| 76568 | /* VCVTDQ2PSZ128rmk */ |
| 76569 | 14093, |
| 76570 | /* VCVTDQ2PSZ128rmkz */ |
| 76571 | 14097, |
| 76572 | /* VCVTDQ2PSZ128rr */ |
| 76573 | 14100, |
| 76574 | /* VCVTDQ2PSZ128rrk */ |
| 76575 | 14102, |
| 76576 | /* VCVTDQ2PSZ128rrkz */ |
| 76577 | 14106, |
| 76578 | /* VCVTDQ2PSZ256rm */ |
| 76579 | 14109, |
| 76580 | /* VCVTDQ2PSZ256rmb */ |
| 76581 | 14111, |
| 76582 | /* VCVTDQ2PSZ256rmbk */ |
| 76583 | 14113, |
| 76584 | /* VCVTDQ2PSZ256rmbkz */ |
| 76585 | 14117, |
| 76586 | /* VCVTDQ2PSZ256rmk */ |
| 76587 | 14120, |
| 76588 | /* VCVTDQ2PSZ256rmkz */ |
| 76589 | 14124, |
| 76590 | /* VCVTDQ2PSZ256rr */ |
| 76591 | 14127, |
| 76592 | /* VCVTDQ2PSZ256rrk */ |
| 76593 | 14129, |
| 76594 | /* VCVTDQ2PSZ256rrkz */ |
| 76595 | 14133, |
| 76596 | /* VCVTDQ2PSZrm */ |
| 76597 | 14136, |
| 76598 | /* VCVTDQ2PSZrmb */ |
| 76599 | 14138, |
| 76600 | /* VCVTDQ2PSZrmbk */ |
| 76601 | 14140, |
| 76602 | /* VCVTDQ2PSZrmbkz */ |
| 76603 | 14144, |
| 76604 | /* VCVTDQ2PSZrmk */ |
| 76605 | 14147, |
| 76606 | /* VCVTDQ2PSZrmkz */ |
| 76607 | 14151, |
| 76608 | /* VCVTDQ2PSZrr */ |
| 76609 | 14154, |
| 76610 | /* VCVTDQ2PSZrrb */ |
| 76611 | 14156, |
| 76612 | /* VCVTDQ2PSZrrbk */ |
| 76613 | 14159, |
| 76614 | /* VCVTDQ2PSZrrbkz */ |
| 76615 | 14164, |
| 76616 | /* VCVTDQ2PSZrrk */ |
| 76617 | 14168, |
| 76618 | /* VCVTDQ2PSZrrkz */ |
| 76619 | 14172, |
| 76620 | /* VCVTDQ2PSrm */ |
| 76621 | 14175, |
| 76622 | /* VCVTDQ2PSrr */ |
| 76623 | 14177, |
| 76624 | /* VCVTNE2PS2BF16Z128rm */ |
| 76625 | 14179, |
| 76626 | /* VCVTNE2PS2BF16Z128rmb */ |
| 76627 | 14182, |
| 76628 | /* VCVTNE2PS2BF16Z128rmbk */ |
| 76629 | 14185, |
| 76630 | /* VCVTNE2PS2BF16Z128rmbkz */ |
| 76631 | 14190, |
| 76632 | /* VCVTNE2PS2BF16Z128rmk */ |
| 76633 | 14194, |
| 76634 | /* VCVTNE2PS2BF16Z128rmkz */ |
| 76635 | 14199, |
| 76636 | /* VCVTNE2PS2BF16Z128rr */ |
| 76637 | 14203, |
| 76638 | /* VCVTNE2PS2BF16Z128rrk */ |
| 76639 | 14206, |
| 76640 | /* VCVTNE2PS2BF16Z128rrkz */ |
| 76641 | 14211, |
| 76642 | /* VCVTNE2PS2BF16Z256rm */ |
| 76643 | 14215, |
| 76644 | /* VCVTNE2PS2BF16Z256rmb */ |
| 76645 | 14218, |
| 76646 | /* VCVTNE2PS2BF16Z256rmbk */ |
| 76647 | 14221, |
| 76648 | /* VCVTNE2PS2BF16Z256rmbkz */ |
| 76649 | 14226, |
| 76650 | /* VCVTNE2PS2BF16Z256rmk */ |
| 76651 | 14230, |
| 76652 | /* VCVTNE2PS2BF16Z256rmkz */ |
| 76653 | 14235, |
| 76654 | /* VCVTNE2PS2BF16Z256rr */ |
| 76655 | 14239, |
| 76656 | /* VCVTNE2PS2BF16Z256rrk */ |
| 76657 | 14242, |
| 76658 | /* VCVTNE2PS2BF16Z256rrkz */ |
| 76659 | 14247, |
| 76660 | /* VCVTNE2PS2BF16Zrm */ |
| 76661 | 14251, |
| 76662 | /* VCVTNE2PS2BF16Zrmb */ |
| 76663 | 14254, |
| 76664 | /* VCVTNE2PS2BF16Zrmbk */ |
| 76665 | 14257, |
| 76666 | /* VCVTNE2PS2BF16Zrmbkz */ |
| 76667 | 14262, |
| 76668 | /* VCVTNE2PS2BF16Zrmk */ |
| 76669 | 14266, |
| 76670 | /* VCVTNE2PS2BF16Zrmkz */ |
| 76671 | 14271, |
| 76672 | /* VCVTNE2PS2BF16Zrr */ |
| 76673 | 14275, |
| 76674 | /* VCVTNE2PS2BF16Zrrk */ |
| 76675 | 14278, |
| 76676 | /* VCVTNE2PS2BF16Zrrkz */ |
| 76677 | 14283, |
| 76678 | /* VCVTNEEBF162PSYrm */ |
| 76679 | 14287, |
| 76680 | /* VCVTNEEBF162PSrm */ |
| 76681 | 14289, |
| 76682 | /* VCVTNEEPH2PSYrm */ |
| 76683 | 14291, |
| 76684 | /* VCVTNEEPH2PSrm */ |
| 76685 | 14293, |
| 76686 | /* VCVTNEOBF162PSYrm */ |
| 76687 | 14295, |
| 76688 | /* VCVTNEOBF162PSrm */ |
| 76689 | 14297, |
| 76690 | /* VCVTNEOPH2PSYrm */ |
| 76691 | 14299, |
| 76692 | /* VCVTNEOPH2PSrm */ |
| 76693 | 14301, |
| 76694 | /* VCVTNEPS2BF16Yrm */ |
| 76695 | 14303, |
| 76696 | /* VCVTNEPS2BF16Yrr */ |
| 76697 | 14305, |
| 76698 | /* VCVTNEPS2BF16Z128rm */ |
| 76699 | 14307, |
| 76700 | /* VCVTNEPS2BF16Z128rmb */ |
| 76701 | 14309, |
| 76702 | /* VCVTNEPS2BF16Z128rmbk */ |
| 76703 | 14311, |
| 76704 | /* VCVTNEPS2BF16Z128rmbkz */ |
| 76705 | 14315, |
| 76706 | /* VCVTNEPS2BF16Z128rmk */ |
| 76707 | 14318, |
| 76708 | /* VCVTNEPS2BF16Z128rmkz */ |
| 76709 | 14322, |
| 76710 | /* VCVTNEPS2BF16Z128rr */ |
| 76711 | 14325, |
| 76712 | /* VCVTNEPS2BF16Z128rrk */ |
| 76713 | 14327, |
| 76714 | /* VCVTNEPS2BF16Z128rrkz */ |
| 76715 | 14331, |
| 76716 | /* VCVTNEPS2BF16Z256rm */ |
| 76717 | 14334, |
| 76718 | /* VCVTNEPS2BF16Z256rmb */ |
| 76719 | 14336, |
| 76720 | /* VCVTNEPS2BF16Z256rmbk */ |
| 76721 | 14338, |
| 76722 | /* VCVTNEPS2BF16Z256rmbkz */ |
| 76723 | 14342, |
| 76724 | /* VCVTNEPS2BF16Z256rmk */ |
| 76725 | 14345, |
| 76726 | /* VCVTNEPS2BF16Z256rmkz */ |
| 76727 | 14349, |
| 76728 | /* VCVTNEPS2BF16Z256rr */ |
| 76729 | 14352, |
| 76730 | /* VCVTNEPS2BF16Z256rrk */ |
| 76731 | 14354, |
| 76732 | /* VCVTNEPS2BF16Z256rrkz */ |
| 76733 | 14358, |
| 76734 | /* VCVTNEPS2BF16Zrm */ |
| 76735 | 14361, |
| 76736 | /* VCVTNEPS2BF16Zrmb */ |
| 76737 | 14363, |
| 76738 | /* VCVTNEPS2BF16Zrmbk */ |
| 76739 | 14365, |
| 76740 | /* VCVTNEPS2BF16Zrmbkz */ |
| 76741 | 14369, |
| 76742 | /* VCVTNEPS2BF16Zrmk */ |
| 76743 | 14372, |
| 76744 | /* VCVTNEPS2BF16Zrmkz */ |
| 76745 | 14376, |
| 76746 | /* VCVTNEPS2BF16Zrr */ |
| 76747 | 14379, |
| 76748 | /* VCVTNEPS2BF16Zrrk */ |
| 76749 | 14381, |
| 76750 | /* VCVTNEPS2BF16Zrrkz */ |
| 76751 | 14385, |
| 76752 | /* VCVTNEPS2BF16rm */ |
| 76753 | 14388, |
| 76754 | /* VCVTNEPS2BF16rr */ |
| 76755 | 14390, |
| 76756 | /* VCVTPD2DQYrm */ |
| 76757 | 14392, |
| 76758 | /* VCVTPD2DQYrr */ |
| 76759 | 14394, |
| 76760 | /* VCVTPD2DQZ128rm */ |
| 76761 | 14396, |
| 76762 | /* VCVTPD2DQZ128rmb */ |
| 76763 | 14398, |
| 76764 | /* VCVTPD2DQZ128rmbk */ |
| 76765 | 14400, |
| 76766 | /* VCVTPD2DQZ128rmbkz */ |
| 76767 | 14404, |
| 76768 | /* VCVTPD2DQZ128rmk */ |
| 76769 | 14407, |
| 76770 | /* VCVTPD2DQZ128rmkz */ |
| 76771 | 14411, |
| 76772 | /* VCVTPD2DQZ128rr */ |
| 76773 | 14414, |
| 76774 | /* VCVTPD2DQZ128rrk */ |
| 76775 | 14416, |
| 76776 | /* VCVTPD2DQZ128rrkz */ |
| 76777 | 14420, |
| 76778 | /* VCVTPD2DQZ256rm */ |
| 76779 | 14423, |
| 76780 | /* VCVTPD2DQZ256rmb */ |
| 76781 | 14425, |
| 76782 | /* VCVTPD2DQZ256rmbk */ |
| 76783 | 14427, |
| 76784 | /* VCVTPD2DQZ256rmbkz */ |
| 76785 | 14431, |
| 76786 | /* VCVTPD2DQZ256rmk */ |
| 76787 | 14434, |
| 76788 | /* VCVTPD2DQZ256rmkz */ |
| 76789 | 14438, |
| 76790 | /* VCVTPD2DQZ256rr */ |
| 76791 | 14441, |
| 76792 | /* VCVTPD2DQZ256rrk */ |
| 76793 | 14443, |
| 76794 | /* VCVTPD2DQZ256rrkz */ |
| 76795 | 14447, |
| 76796 | /* VCVTPD2DQZrm */ |
| 76797 | 14450, |
| 76798 | /* VCVTPD2DQZrmb */ |
| 76799 | 14452, |
| 76800 | /* VCVTPD2DQZrmbk */ |
| 76801 | 14454, |
| 76802 | /* VCVTPD2DQZrmbkz */ |
| 76803 | 14458, |
| 76804 | /* VCVTPD2DQZrmk */ |
| 76805 | 14461, |
| 76806 | /* VCVTPD2DQZrmkz */ |
| 76807 | 14465, |
| 76808 | /* VCVTPD2DQZrr */ |
| 76809 | 14468, |
| 76810 | /* VCVTPD2DQZrrb */ |
| 76811 | 14470, |
| 76812 | /* VCVTPD2DQZrrbk */ |
| 76813 | 14473, |
| 76814 | /* VCVTPD2DQZrrbkz */ |
| 76815 | 14478, |
| 76816 | /* VCVTPD2DQZrrk */ |
| 76817 | 14482, |
| 76818 | /* VCVTPD2DQZrrkz */ |
| 76819 | 14486, |
| 76820 | /* VCVTPD2DQrm */ |
| 76821 | 14489, |
| 76822 | /* VCVTPD2DQrr */ |
| 76823 | 14491, |
| 76824 | /* VCVTPD2PHZ128rm */ |
| 76825 | 14493, |
| 76826 | /* VCVTPD2PHZ128rmb */ |
| 76827 | 14495, |
| 76828 | /* VCVTPD2PHZ128rmbk */ |
| 76829 | 14497, |
| 76830 | /* VCVTPD2PHZ128rmbkz */ |
| 76831 | 14501, |
| 76832 | /* VCVTPD2PHZ128rmk */ |
| 76833 | 14504, |
| 76834 | /* VCVTPD2PHZ128rmkz */ |
| 76835 | 14508, |
| 76836 | /* VCVTPD2PHZ128rr */ |
| 76837 | 14511, |
| 76838 | /* VCVTPD2PHZ128rrk */ |
| 76839 | 14513, |
| 76840 | /* VCVTPD2PHZ128rrkz */ |
| 76841 | 14517, |
| 76842 | /* VCVTPD2PHZ256rm */ |
| 76843 | 14520, |
| 76844 | /* VCVTPD2PHZ256rmb */ |
| 76845 | 14522, |
| 76846 | /* VCVTPD2PHZ256rmbk */ |
| 76847 | 14524, |
| 76848 | /* VCVTPD2PHZ256rmbkz */ |
| 76849 | 14528, |
| 76850 | /* VCVTPD2PHZ256rmk */ |
| 76851 | 14531, |
| 76852 | /* VCVTPD2PHZ256rmkz */ |
| 76853 | 14535, |
| 76854 | /* VCVTPD2PHZ256rr */ |
| 76855 | 14538, |
| 76856 | /* VCVTPD2PHZ256rrk */ |
| 76857 | 14540, |
| 76858 | /* VCVTPD2PHZ256rrkz */ |
| 76859 | 14544, |
| 76860 | /* VCVTPD2PHZrm */ |
| 76861 | 14547, |
| 76862 | /* VCVTPD2PHZrmb */ |
| 76863 | 14549, |
| 76864 | /* VCVTPD2PHZrmbk */ |
| 76865 | 14551, |
| 76866 | /* VCVTPD2PHZrmbkz */ |
| 76867 | 14555, |
| 76868 | /* VCVTPD2PHZrmk */ |
| 76869 | 14558, |
| 76870 | /* VCVTPD2PHZrmkz */ |
| 76871 | 14562, |
| 76872 | /* VCVTPD2PHZrr */ |
| 76873 | 14565, |
| 76874 | /* VCVTPD2PHZrrb */ |
| 76875 | 14567, |
| 76876 | /* VCVTPD2PHZrrbk */ |
| 76877 | 14570, |
| 76878 | /* VCVTPD2PHZrrbkz */ |
| 76879 | 14575, |
| 76880 | /* VCVTPD2PHZrrk */ |
| 76881 | 14579, |
| 76882 | /* VCVTPD2PHZrrkz */ |
| 76883 | 14583, |
| 76884 | /* VCVTPD2PSYrm */ |
| 76885 | 14586, |
| 76886 | /* VCVTPD2PSYrr */ |
| 76887 | 14588, |
| 76888 | /* VCVTPD2PSZ128rm */ |
| 76889 | 14590, |
| 76890 | /* VCVTPD2PSZ128rmb */ |
| 76891 | 14592, |
| 76892 | /* VCVTPD2PSZ128rmbk */ |
| 76893 | 14594, |
| 76894 | /* VCVTPD2PSZ128rmbkz */ |
| 76895 | 14598, |
| 76896 | /* VCVTPD2PSZ128rmk */ |
| 76897 | 14601, |
| 76898 | /* VCVTPD2PSZ128rmkz */ |
| 76899 | 14605, |
| 76900 | /* VCVTPD2PSZ128rr */ |
| 76901 | 14608, |
| 76902 | /* VCVTPD2PSZ128rrk */ |
| 76903 | 14610, |
| 76904 | /* VCVTPD2PSZ128rrkz */ |
| 76905 | 14614, |
| 76906 | /* VCVTPD2PSZ256rm */ |
| 76907 | 14617, |
| 76908 | /* VCVTPD2PSZ256rmb */ |
| 76909 | 14619, |
| 76910 | /* VCVTPD2PSZ256rmbk */ |
| 76911 | 14621, |
| 76912 | /* VCVTPD2PSZ256rmbkz */ |
| 76913 | 14625, |
| 76914 | /* VCVTPD2PSZ256rmk */ |
| 76915 | 14628, |
| 76916 | /* VCVTPD2PSZ256rmkz */ |
| 76917 | 14632, |
| 76918 | /* VCVTPD2PSZ256rr */ |
| 76919 | 14635, |
| 76920 | /* VCVTPD2PSZ256rrk */ |
| 76921 | 14637, |
| 76922 | /* VCVTPD2PSZ256rrkz */ |
| 76923 | 14641, |
| 76924 | /* VCVTPD2PSZrm */ |
| 76925 | 14644, |
| 76926 | /* VCVTPD2PSZrmb */ |
| 76927 | 14646, |
| 76928 | /* VCVTPD2PSZrmbk */ |
| 76929 | 14648, |
| 76930 | /* VCVTPD2PSZrmbkz */ |
| 76931 | 14652, |
| 76932 | /* VCVTPD2PSZrmk */ |
| 76933 | 14655, |
| 76934 | /* VCVTPD2PSZrmkz */ |
| 76935 | 14659, |
| 76936 | /* VCVTPD2PSZrr */ |
| 76937 | 14662, |
| 76938 | /* VCVTPD2PSZrrb */ |
| 76939 | 14664, |
| 76940 | /* VCVTPD2PSZrrbk */ |
| 76941 | 14667, |
| 76942 | /* VCVTPD2PSZrrbkz */ |
| 76943 | 14672, |
| 76944 | /* VCVTPD2PSZrrk */ |
| 76945 | 14676, |
| 76946 | /* VCVTPD2PSZrrkz */ |
| 76947 | 14680, |
| 76948 | /* VCVTPD2PSrm */ |
| 76949 | 14683, |
| 76950 | /* VCVTPD2PSrr */ |
| 76951 | 14685, |
| 76952 | /* VCVTPD2QQZ128rm */ |
| 76953 | 14687, |
| 76954 | /* VCVTPD2QQZ128rmb */ |
| 76955 | 14689, |
| 76956 | /* VCVTPD2QQZ128rmbk */ |
| 76957 | 14691, |
| 76958 | /* VCVTPD2QQZ128rmbkz */ |
| 76959 | 14695, |
| 76960 | /* VCVTPD2QQZ128rmk */ |
| 76961 | 14698, |
| 76962 | /* VCVTPD2QQZ128rmkz */ |
| 76963 | 14702, |
| 76964 | /* VCVTPD2QQZ128rr */ |
| 76965 | 14705, |
| 76966 | /* VCVTPD2QQZ128rrk */ |
| 76967 | 14707, |
| 76968 | /* VCVTPD2QQZ128rrkz */ |
| 76969 | 14711, |
| 76970 | /* VCVTPD2QQZ256rm */ |
| 76971 | 14714, |
| 76972 | /* VCVTPD2QQZ256rmb */ |
| 76973 | 14716, |
| 76974 | /* VCVTPD2QQZ256rmbk */ |
| 76975 | 14718, |
| 76976 | /* VCVTPD2QQZ256rmbkz */ |
| 76977 | 14722, |
| 76978 | /* VCVTPD2QQZ256rmk */ |
| 76979 | 14725, |
| 76980 | /* VCVTPD2QQZ256rmkz */ |
| 76981 | 14729, |
| 76982 | /* VCVTPD2QQZ256rr */ |
| 76983 | 14732, |
| 76984 | /* VCVTPD2QQZ256rrk */ |
| 76985 | 14734, |
| 76986 | /* VCVTPD2QQZ256rrkz */ |
| 76987 | 14738, |
| 76988 | /* VCVTPD2QQZrm */ |
| 76989 | 14741, |
| 76990 | /* VCVTPD2QQZrmb */ |
| 76991 | 14743, |
| 76992 | /* VCVTPD2QQZrmbk */ |
| 76993 | 14745, |
| 76994 | /* VCVTPD2QQZrmbkz */ |
| 76995 | 14749, |
| 76996 | /* VCVTPD2QQZrmk */ |
| 76997 | 14752, |
| 76998 | /* VCVTPD2QQZrmkz */ |
| 76999 | 14756, |
| 77000 | /* VCVTPD2QQZrr */ |
| 77001 | 14759, |
| 77002 | /* VCVTPD2QQZrrb */ |
| 77003 | 14761, |
| 77004 | /* VCVTPD2QQZrrbk */ |
| 77005 | 14764, |
| 77006 | /* VCVTPD2QQZrrbkz */ |
| 77007 | 14769, |
| 77008 | /* VCVTPD2QQZrrk */ |
| 77009 | 14773, |
| 77010 | /* VCVTPD2QQZrrkz */ |
| 77011 | 14777, |
| 77012 | /* VCVTPD2UDQZ128rm */ |
| 77013 | 14780, |
| 77014 | /* VCVTPD2UDQZ128rmb */ |
| 77015 | 14782, |
| 77016 | /* VCVTPD2UDQZ128rmbk */ |
| 77017 | 14784, |
| 77018 | /* VCVTPD2UDQZ128rmbkz */ |
| 77019 | 14788, |
| 77020 | /* VCVTPD2UDQZ128rmk */ |
| 77021 | 14791, |
| 77022 | /* VCVTPD2UDQZ128rmkz */ |
| 77023 | 14795, |
| 77024 | /* VCVTPD2UDQZ128rr */ |
| 77025 | 14798, |
| 77026 | /* VCVTPD2UDQZ128rrk */ |
| 77027 | 14800, |
| 77028 | /* VCVTPD2UDQZ128rrkz */ |
| 77029 | 14804, |
| 77030 | /* VCVTPD2UDQZ256rm */ |
| 77031 | 14807, |
| 77032 | /* VCVTPD2UDQZ256rmb */ |
| 77033 | 14809, |
| 77034 | /* VCVTPD2UDQZ256rmbk */ |
| 77035 | 14811, |
| 77036 | /* VCVTPD2UDQZ256rmbkz */ |
| 77037 | 14815, |
| 77038 | /* VCVTPD2UDQZ256rmk */ |
| 77039 | 14818, |
| 77040 | /* VCVTPD2UDQZ256rmkz */ |
| 77041 | 14822, |
| 77042 | /* VCVTPD2UDQZ256rr */ |
| 77043 | 14825, |
| 77044 | /* VCVTPD2UDQZ256rrk */ |
| 77045 | 14827, |
| 77046 | /* VCVTPD2UDQZ256rrkz */ |
| 77047 | 14831, |
| 77048 | /* VCVTPD2UDQZrm */ |
| 77049 | 14834, |
| 77050 | /* VCVTPD2UDQZrmb */ |
| 77051 | 14836, |
| 77052 | /* VCVTPD2UDQZrmbk */ |
| 77053 | 14838, |
| 77054 | /* VCVTPD2UDQZrmbkz */ |
| 77055 | 14842, |
| 77056 | /* VCVTPD2UDQZrmk */ |
| 77057 | 14845, |
| 77058 | /* VCVTPD2UDQZrmkz */ |
| 77059 | 14849, |
| 77060 | /* VCVTPD2UDQZrr */ |
| 77061 | 14852, |
| 77062 | /* VCVTPD2UDQZrrb */ |
| 77063 | 14854, |
| 77064 | /* VCVTPD2UDQZrrbk */ |
| 77065 | 14857, |
| 77066 | /* VCVTPD2UDQZrrbkz */ |
| 77067 | 14862, |
| 77068 | /* VCVTPD2UDQZrrk */ |
| 77069 | 14866, |
| 77070 | /* VCVTPD2UDQZrrkz */ |
| 77071 | 14870, |
| 77072 | /* VCVTPD2UQQZ128rm */ |
| 77073 | 14873, |
| 77074 | /* VCVTPD2UQQZ128rmb */ |
| 77075 | 14875, |
| 77076 | /* VCVTPD2UQQZ128rmbk */ |
| 77077 | 14877, |
| 77078 | /* VCVTPD2UQQZ128rmbkz */ |
| 77079 | 14881, |
| 77080 | /* VCVTPD2UQQZ128rmk */ |
| 77081 | 14884, |
| 77082 | /* VCVTPD2UQQZ128rmkz */ |
| 77083 | 14888, |
| 77084 | /* VCVTPD2UQQZ128rr */ |
| 77085 | 14891, |
| 77086 | /* VCVTPD2UQQZ128rrk */ |
| 77087 | 14893, |
| 77088 | /* VCVTPD2UQQZ128rrkz */ |
| 77089 | 14897, |
| 77090 | /* VCVTPD2UQQZ256rm */ |
| 77091 | 14900, |
| 77092 | /* VCVTPD2UQQZ256rmb */ |
| 77093 | 14902, |
| 77094 | /* VCVTPD2UQQZ256rmbk */ |
| 77095 | 14904, |
| 77096 | /* VCVTPD2UQQZ256rmbkz */ |
| 77097 | 14908, |
| 77098 | /* VCVTPD2UQQZ256rmk */ |
| 77099 | 14911, |
| 77100 | /* VCVTPD2UQQZ256rmkz */ |
| 77101 | 14915, |
| 77102 | /* VCVTPD2UQQZ256rr */ |
| 77103 | 14918, |
| 77104 | /* VCVTPD2UQQZ256rrk */ |
| 77105 | 14920, |
| 77106 | /* VCVTPD2UQQZ256rrkz */ |
| 77107 | 14924, |
| 77108 | /* VCVTPD2UQQZrm */ |
| 77109 | 14927, |
| 77110 | /* VCVTPD2UQQZrmb */ |
| 77111 | 14929, |
| 77112 | /* VCVTPD2UQQZrmbk */ |
| 77113 | 14931, |
| 77114 | /* VCVTPD2UQQZrmbkz */ |
| 77115 | 14935, |
| 77116 | /* VCVTPD2UQQZrmk */ |
| 77117 | 14938, |
| 77118 | /* VCVTPD2UQQZrmkz */ |
| 77119 | 14942, |
| 77120 | /* VCVTPD2UQQZrr */ |
| 77121 | 14945, |
| 77122 | /* VCVTPD2UQQZrrb */ |
| 77123 | 14947, |
| 77124 | /* VCVTPD2UQQZrrbk */ |
| 77125 | 14950, |
| 77126 | /* VCVTPD2UQQZrrbkz */ |
| 77127 | 14955, |
| 77128 | /* VCVTPD2UQQZrrk */ |
| 77129 | 14959, |
| 77130 | /* VCVTPD2UQQZrrkz */ |
| 77131 | 14963, |
| 77132 | /* VCVTPH2DQZ128rm */ |
| 77133 | 14966, |
| 77134 | /* VCVTPH2DQZ128rmb */ |
| 77135 | 14968, |
| 77136 | /* VCVTPH2DQZ128rmbk */ |
| 77137 | 14970, |
| 77138 | /* VCVTPH2DQZ128rmbkz */ |
| 77139 | 14974, |
| 77140 | /* VCVTPH2DQZ128rmk */ |
| 77141 | 14977, |
| 77142 | /* VCVTPH2DQZ128rmkz */ |
| 77143 | 14981, |
| 77144 | /* VCVTPH2DQZ128rr */ |
| 77145 | 14984, |
| 77146 | /* VCVTPH2DQZ128rrk */ |
| 77147 | 14986, |
| 77148 | /* VCVTPH2DQZ128rrkz */ |
| 77149 | 14990, |
| 77150 | /* VCVTPH2DQZ256rm */ |
| 77151 | 14993, |
| 77152 | /* VCVTPH2DQZ256rmb */ |
| 77153 | 14995, |
| 77154 | /* VCVTPH2DQZ256rmbk */ |
| 77155 | 14997, |
| 77156 | /* VCVTPH2DQZ256rmbkz */ |
| 77157 | 15001, |
| 77158 | /* VCVTPH2DQZ256rmk */ |
| 77159 | 15004, |
| 77160 | /* VCVTPH2DQZ256rmkz */ |
| 77161 | 15008, |
| 77162 | /* VCVTPH2DQZ256rr */ |
| 77163 | 15011, |
| 77164 | /* VCVTPH2DQZ256rrk */ |
| 77165 | 15013, |
| 77166 | /* VCVTPH2DQZ256rrkz */ |
| 77167 | 15017, |
| 77168 | /* VCVTPH2DQZrm */ |
| 77169 | 15020, |
| 77170 | /* VCVTPH2DQZrmb */ |
| 77171 | 15022, |
| 77172 | /* VCVTPH2DQZrmbk */ |
| 77173 | 15024, |
| 77174 | /* VCVTPH2DQZrmbkz */ |
| 77175 | 15028, |
| 77176 | /* VCVTPH2DQZrmk */ |
| 77177 | 15031, |
| 77178 | /* VCVTPH2DQZrmkz */ |
| 77179 | 15035, |
| 77180 | /* VCVTPH2DQZrr */ |
| 77181 | 15038, |
| 77182 | /* VCVTPH2DQZrrb */ |
| 77183 | 15040, |
| 77184 | /* VCVTPH2DQZrrbk */ |
| 77185 | 15043, |
| 77186 | /* VCVTPH2DQZrrbkz */ |
| 77187 | 15048, |
| 77188 | /* VCVTPH2DQZrrk */ |
| 77189 | 15052, |
| 77190 | /* VCVTPH2DQZrrkz */ |
| 77191 | 15056, |
| 77192 | /* VCVTPH2PDZ128rm */ |
| 77193 | 15059, |
| 77194 | /* VCVTPH2PDZ128rmb */ |
| 77195 | 15061, |
| 77196 | /* VCVTPH2PDZ128rmbk */ |
| 77197 | 15063, |
| 77198 | /* VCVTPH2PDZ128rmbkz */ |
| 77199 | 15067, |
| 77200 | /* VCVTPH2PDZ128rmk */ |
| 77201 | 15070, |
| 77202 | /* VCVTPH2PDZ128rmkz */ |
| 77203 | 15074, |
| 77204 | /* VCVTPH2PDZ128rr */ |
| 77205 | 15077, |
| 77206 | /* VCVTPH2PDZ128rrk */ |
| 77207 | 15079, |
| 77208 | /* VCVTPH2PDZ128rrkz */ |
| 77209 | 15083, |
| 77210 | /* VCVTPH2PDZ256rm */ |
| 77211 | 15086, |
| 77212 | /* VCVTPH2PDZ256rmb */ |
| 77213 | 15088, |
| 77214 | /* VCVTPH2PDZ256rmbk */ |
| 77215 | 15090, |
| 77216 | /* VCVTPH2PDZ256rmbkz */ |
| 77217 | 15094, |
| 77218 | /* VCVTPH2PDZ256rmk */ |
| 77219 | 15097, |
| 77220 | /* VCVTPH2PDZ256rmkz */ |
| 77221 | 15101, |
| 77222 | /* VCVTPH2PDZ256rr */ |
| 77223 | 15104, |
| 77224 | /* VCVTPH2PDZ256rrk */ |
| 77225 | 15106, |
| 77226 | /* VCVTPH2PDZ256rrkz */ |
| 77227 | 15110, |
| 77228 | /* VCVTPH2PDZrm */ |
| 77229 | 15113, |
| 77230 | /* VCVTPH2PDZrmb */ |
| 77231 | 15115, |
| 77232 | /* VCVTPH2PDZrmbk */ |
| 77233 | 15117, |
| 77234 | /* VCVTPH2PDZrmbkz */ |
| 77235 | 15121, |
| 77236 | /* VCVTPH2PDZrmk */ |
| 77237 | 15124, |
| 77238 | /* VCVTPH2PDZrmkz */ |
| 77239 | 15128, |
| 77240 | /* VCVTPH2PDZrr */ |
| 77241 | 15131, |
| 77242 | /* VCVTPH2PDZrrb */ |
| 77243 | 15133, |
| 77244 | /* VCVTPH2PDZrrbk */ |
| 77245 | 15135, |
| 77246 | /* VCVTPH2PDZrrbkz */ |
| 77247 | 15139, |
| 77248 | /* VCVTPH2PDZrrk */ |
| 77249 | 15142, |
| 77250 | /* VCVTPH2PDZrrkz */ |
| 77251 | 15146, |
| 77252 | /* VCVTPH2PSXZ128rm */ |
| 77253 | 15149, |
| 77254 | /* VCVTPH2PSXZ128rmb */ |
| 77255 | 15151, |
| 77256 | /* VCVTPH2PSXZ128rmbk */ |
| 77257 | 15153, |
| 77258 | /* VCVTPH2PSXZ128rmbkz */ |
| 77259 | 15157, |
| 77260 | /* VCVTPH2PSXZ128rmk */ |
| 77261 | 15160, |
| 77262 | /* VCVTPH2PSXZ128rmkz */ |
| 77263 | 15164, |
| 77264 | /* VCVTPH2PSXZ128rr */ |
| 77265 | 15167, |
| 77266 | /* VCVTPH2PSXZ128rrk */ |
| 77267 | 15169, |
| 77268 | /* VCVTPH2PSXZ128rrkz */ |
| 77269 | 15173, |
| 77270 | /* VCVTPH2PSXZ256rm */ |
| 77271 | 15176, |
| 77272 | /* VCVTPH2PSXZ256rmb */ |
| 77273 | 15178, |
| 77274 | /* VCVTPH2PSXZ256rmbk */ |
| 77275 | 15180, |
| 77276 | /* VCVTPH2PSXZ256rmbkz */ |
| 77277 | 15184, |
| 77278 | /* VCVTPH2PSXZ256rmk */ |
| 77279 | 15187, |
| 77280 | /* VCVTPH2PSXZ256rmkz */ |
| 77281 | 15191, |
| 77282 | /* VCVTPH2PSXZ256rr */ |
| 77283 | 15194, |
| 77284 | /* VCVTPH2PSXZ256rrk */ |
| 77285 | 15196, |
| 77286 | /* VCVTPH2PSXZ256rrkz */ |
| 77287 | 15200, |
| 77288 | /* VCVTPH2PSXZrm */ |
| 77289 | 15203, |
| 77290 | /* VCVTPH2PSXZrmb */ |
| 77291 | 15205, |
| 77292 | /* VCVTPH2PSXZrmbk */ |
| 77293 | 15207, |
| 77294 | /* VCVTPH2PSXZrmbkz */ |
| 77295 | 15211, |
| 77296 | /* VCVTPH2PSXZrmk */ |
| 77297 | 15214, |
| 77298 | /* VCVTPH2PSXZrmkz */ |
| 77299 | 15218, |
| 77300 | /* VCVTPH2PSXZrr */ |
| 77301 | 15221, |
| 77302 | /* VCVTPH2PSXZrrb */ |
| 77303 | 15223, |
| 77304 | /* VCVTPH2PSXZrrbk */ |
| 77305 | 15225, |
| 77306 | /* VCVTPH2PSXZrrbkz */ |
| 77307 | 15229, |
| 77308 | /* VCVTPH2PSXZrrk */ |
| 77309 | 15232, |
| 77310 | /* VCVTPH2PSXZrrkz */ |
| 77311 | 15236, |
| 77312 | /* VCVTPH2PSYrm */ |
| 77313 | 15239, |
| 77314 | /* VCVTPH2PSYrr */ |
| 77315 | 15241, |
| 77316 | /* VCVTPH2PSZ128rm */ |
| 77317 | 15243, |
| 77318 | /* VCVTPH2PSZ128rmk */ |
| 77319 | 15245, |
| 77320 | /* VCVTPH2PSZ128rmkz */ |
| 77321 | 15249, |
| 77322 | /* VCVTPH2PSZ128rr */ |
| 77323 | 15252, |
| 77324 | /* VCVTPH2PSZ128rrk */ |
| 77325 | 15254, |
| 77326 | /* VCVTPH2PSZ128rrkz */ |
| 77327 | 15258, |
| 77328 | /* VCVTPH2PSZ256rm */ |
| 77329 | 15261, |
| 77330 | /* VCVTPH2PSZ256rmk */ |
| 77331 | 15263, |
| 77332 | /* VCVTPH2PSZ256rmkz */ |
| 77333 | 15267, |
| 77334 | /* VCVTPH2PSZ256rr */ |
| 77335 | 15270, |
| 77336 | /* VCVTPH2PSZ256rrk */ |
| 77337 | 15272, |
| 77338 | /* VCVTPH2PSZ256rrkz */ |
| 77339 | 15276, |
| 77340 | /* VCVTPH2PSZrm */ |
| 77341 | 15279, |
| 77342 | /* VCVTPH2PSZrmk */ |
| 77343 | 15281, |
| 77344 | /* VCVTPH2PSZrmkz */ |
| 77345 | 15285, |
| 77346 | /* VCVTPH2PSZrr */ |
| 77347 | 15288, |
| 77348 | /* VCVTPH2PSZrrb */ |
| 77349 | 15290, |
| 77350 | /* VCVTPH2PSZrrbk */ |
| 77351 | 15292, |
| 77352 | /* VCVTPH2PSZrrbkz */ |
| 77353 | 15296, |
| 77354 | /* VCVTPH2PSZrrk */ |
| 77355 | 15299, |
| 77356 | /* VCVTPH2PSZrrkz */ |
| 77357 | 15303, |
| 77358 | /* VCVTPH2PSrm */ |
| 77359 | 15306, |
| 77360 | /* VCVTPH2PSrr */ |
| 77361 | 15308, |
| 77362 | /* VCVTPH2QQZ128rm */ |
| 77363 | 15310, |
| 77364 | /* VCVTPH2QQZ128rmb */ |
| 77365 | 15312, |
| 77366 | /* VCVTPH2QQZ128rmbk */ |
| 77367 | 15314, |
| 77368 | /* VCVTPH2QQZ128rmbkz */ |
| 77369 | 15318, |
| 77370 | /* VCVTPH2QQZ128rmk */ |
| 77371 | 15321, |
| 77372 | /* VCVTPH2QQZ128rmkz */ |
| 77373 | 15325, |
| 77374 | /* VCVTPH2QQZ128rr */ |
| 77375 | 15328, |
| 77376 | /* VCVTPH2QQZ128rrk */ |
| 77377 | 15330, |
| 77378 | /* VCVTPH2QQZ128rrkz */ |
| 77379 | 15334, |
| 77380 | /* VCVTPH2QQZ256rm */ |
| 77381 | 15337, |
| 77382 | /* VCVTPH2QQZ256rmb */ |
| 77383 | 15339, |
| 77384 | /* VCVTPH2QQZ256rmbk */ |
| 77385 | 15341, |
| 77386 | /* VCVTPH2QQZ256rmbkz */ |
| 77387 | 15345, |
| 77388 | /* VCVTPH2QQZ256rmk */ |
| 77389 | 15348, |
| 77390 | /* VCVTPH2QQZ256rmkz */ |
| 77391 | 15352, |
| 77392 | /* VCVTPH2QQZ256rr */ |
| 77393 | 15355, |
| 77394 | /* VCVTPH2QQZ256rrk */ |
| 77395 | 15357, |
| 77396 | /* VCVTPH2QQZ256rrkz */ |
| 77397 | 15361, |
| 77398 | /* VCVTPH2QQZrm */ |
| 77399 | 15364, |
| 77400 | /* VCVTPH2QQZrmb */ |
| 77401 | 15366, |
| 77402 | /* VCVTPH2QQZrmbk */ |
| 77403 | 15368, |
| 77404 | /* VCVTPH2QQZrmbkz */ |
| 77405 | 15372, |
| 77406 | /* VCVTPH2QQZrmk */ |
| 77407 | 15375, |
| 77408 | /* VCVTPH2QQZrmkz */ |
| 77409 | 15379, |
| 77410 | /* VCVTPH2QQZrr */ |
| 77411 | 15382, |
| 77412 | /* VCVTPH2QQZrrb */ |
| 77413 | 15384, |
| 77414 | /* VCVTPH2QQZrrbk */ |
| 77415 | 15387, |
| 77416 | /* VCVTPH2QQZrrbkz */ |
| 77417 | 15392, |
| 77418 | /* VCVTPH2QQZrrk */ |
| 77419 | 15396, |
| 77420 | /* VCVTPH2QQZrrkz */ |
| 77421 | 15400, |
| 77422 | /* VCVTPH2UDQZ128rm */ |
| 77423 | 15403, |
| 77424 | /* VCVTPH2UDQZ128rmb */ |
| 77425 | 15405, |
| 77426 | /* VCVTPH2UDQZ128rmbk */ |
| 77427 | 15407, |
| 77428 | /* VCVTPH2UDQZ128rmbkz */ |
| 77429 | 15411, |
| 77430 | /* VCVTPH2UDQZ128rmk */ |
| 77431 | 15414, |
| 77432 | /* VCVTPH2UDQZ128rmkz */ |
| 77433 | 15418, |
| 77434 | /* VCVTPH2UDQZ128rr */ |
| 77435 | 15421, |
| 77436 | /* VCVTPH2UDQZ128rrk */ |
| 77437 | 15423, |
| 77438 | /* VCVTPH2UDQZ128rrkz */ |
| 77439 | 15427, |
| 77440 | /* VCVTPH2UDQZ256rm */ |
| 77441 | 15430, |
| 77442 | /* VCVTPH2UDQZ256rmb */ |
| 77443 | 15432, |
| 77444 | /* VCVTPH2UDQZ256rmbk */ |
| 77445 | 15434, |
| 77446 | /* VCVTPH2UDQZ256rmbkz */ |
| 77447 | 15438, |
| 77448 | /* VCVTPH2UDQZ256rmk */ |
| 77449 | 15441, |
| 77450 | /* VCVTPH2UDQZ256rmkz */ |
| 77451 | 15445, |
| 77452 | /* VCVTPH2UDQZ256rr */ |
| 77453 | 15448, |
| 77454 | /* VCVTPH2UDQZ256rrk */ |
| 77455 | 15450, |
| 77456 | /* VCVTPH2UDQZ256rrkz */ |
| 77457 | 15454, |
| 77458 | /* VCVTPH2UDQZrm */ |
| 77459 | 15457, |
| 77460 | /* VCVTPH2UDQZrmb */ |
| 77461 | 15459, |
| 77462 | /* VCVTPH2UDQZrmbk */ |
| 77463 | 15461, |
| 77464 | /* VCVTPH2UDQZrmbkz */ |
| 77465 | 15465, |
| 77466 | /* VCVTPH2UDQZrmk */ |
| 77467 | 15468, |
| 77468 | /* VCVTPH2UDQZrmkz */ |
| 77469 | 15472, |
| 77470 | /* VCVTPH2UDQZrr */ |
| 77471 | 15475, |
| 77472 | /* VCVTPH2UDQZrrb */ |
| 77473 | 15477, |
| 77474 | /* VCVTPH2UDQZrrbk */ |
| 77475 | 15480, |
| 77476 | /* VCVTPH2UDQZrrbkz */ |
| 77477 | 15485, |
| 77478 | /* VCVTPH2UDQZrrk */ |
| 77479 | 15489, |
| 77480 | /* VCVTPH2UDQZrrkz */ |
| 77481 | 15493, |
| 77482 | /* VCVTPH2UQQZ128rm */ |
| 77483 | 15496, |
| 77484 | /* VCVTPH2UQQZ128rmb */ |
| 77485 | 15498, |
| 77486 | /* VCVTPH2UQQZ128rmbk */ |
| 77487 | 15500, |
| 77488 | /* VCVTPH2UQQZ128rmbkz */ |
| 77489 | 15504, |
| 77490 | /* VCVTPH2UQQZ128rmk */ |
| 77491 | 15507, |
| 77492 | /* VCVTPH2UQQZ128rmkz */ |
| 77493 | 15511, |
| 77494 | /* VCVTPH2UQQZ128rr */ |
| 77495 | 15514, |
| 77496 | /* VCVTPH2UQQZ128rrk */ |
| 77497 | 15516, |
| 77498 | /* VCVTPH2UQQZ128rrkz */ |
| 77499 | 15520, |
| 77500 | /* VCVTPH2UQQZ256rm */ |
| 77501 | 15523, |
| 77502 | /* VCVTPH2UQQZ256rmb */ |
| 77503 | 15525, |
| 77504 | /* VCVTPH2UQQZ256rmbk */ |
| 77505 | 15527, |
| 77506 | /* VCVTPH2UQQZ256rmbkz */ |
| 77507 | 15531, |
| 77508 | /* VCVTPH2UQQZ256rmk */ |
| 77509 | 15534, |
| 77510 | /* VCVTPH2UQQZ256rmkz */ |
| 77511 | 15538, |
| 77512 | /* VCVTPH2UQQZ256rr */ |
| 77513 | 15541, |
| 77514 | /* VCVTPH2UQQZ256rrk */ |
| 77515 | 15543, |
| 77516 | /* VCVTPH2UQQZ256rrkz */ |
| 77517 | 15547, |
| 77518 | /* VCVTPH2UQQZrm */ |
| 77519 | 15550, |
| 77520 | /* VCVTPH2UQQZrmb */ |
| 77521 | 15552, |
| 77522 | /* VCVTPH2UQQZrmbk */ |
| 77523 | 15554, |
| 77524 | /* VCVTPH2UQQZrmbkz */ |
| 77525 | 15558, |
| 77526 | /* VCVTPH2UQQZrmk */ |
| 77527 | 15561, |
| 77528 | /* VCVTPH2UQQZrmkz */ |
| 77529 | 15565, |
| 77530 | /* VCVTPH2UQQZrr */ |
| 77531 | 15568, |
| 77532 | /* VCVTPH2UQQZrrb */ |
| 77533 | 15570, |
| 77534 | /* VCVTPH2UQQZrrbk */ |
| 77535 | 15573, |
| 77536 | /* VCVTPH2UQQZrrbkz */ |
| 77537 | 15578, |
| 77538 | /* VCVTPH2UQQZrrk */ |
| 77539 | 15582, |
| 77540 | /* VCVTPH2UQQZrrkz */ |
| 77541 | 15586, |
| 77542 | /* VCVTPH2UWZ128rm */ |
| 77543 | 15589, |
| 77544 | /* VCVTPH2UWZ128rmb */ |
| 77545 | 15591, |
| 77546 | /* VCVTPH2UWZ128rmbk */ |
| 77547 | 15593, |
| 77548 | /* VCVTPH2UWZ128rmbkz */ |
| 77549 | 15597, |
| 77550 | /* VCVTPH2UWZ128rmk */ |
| 77551 | 15600, |
| 77552 | /* VCVTPH2UWZ128rmkz */ |
| 77553 | 15604, |
| 77554 | /* VCVTPH2UWZ128rr */ |
| 77555 | 15607, |
| 77556 | /* VCVTPH2UWZ128rrk */ |
| 77557 | 15609, |
| 77558 | /* VCVTPH2UWZ128rrkz */ |
| 77559 | 15613, |
| 77560 | /* VCVTPH2UWZ256rm */ |
| 77561 | 15616, |
| 77562 | /* VCVTPH2UWZ256rmb */ |
| 77563 | 15618, |
| 77564 | /* VCVTPH2UWZ256rmbk */ |
| 77565 | 15620, |
| 77566 | /* VCVTPH2UWZ256rmbkz */ |
| 77567 | 15624, |
| 77568 | /* VCVTPH2UWZ256rmk */ |
| 77569 | 15627, |
| 77570 | /* VCVTPH2UWZ256rmkz */ |
| 77571 | 15631, |
| 77572 | /* VCVTPH2UWZ256rr */ |
| 77573 | 15634, |
| 77574 | /* VCVTPH2UWZ256rrk */ |
| 77575 | 15636, |
| 77576 | /* VCVTPH2UWZ256rrkz */ |
| 77577 | 15640, |
| 77578 | /* VCVTPH2UWZrm */ |
| 77579 | 15643, |
| 77580 | /* VCVTPH2UWZrmb */ |
| 77581 | 15645, |
| 77582 | /* VCVTPH2UWZrmbk */ |
| 77583 | 15647, |
| 77584 | /* VCVTPH2UWZrmbkz */ |
| 77585 | 15651, |
| 77586 | /* VCVTPH2UWZrmk */ |
| 77587 | 15654, |
| 77588 | /* VCVTPH2UWZrmkz */ |
| 77589 | 15658, |
| 77590 | /* VCVTPH2UWZrr */ |
| 77591 | 15661, |
| 77592 | /* VCVTPH2UWZrrb */ |
| 77593 | 15663, |
| 77594 | /* VCVTPH2UWZrrbk */ |
| 77595 | 15666, |
| 77596 | /* VCVTPH2UWZrrbkz */ |
| 77597 | 15671, |
| 77598 | /* VCVTPH2UWZrrk */ |
| 77599 | 15675, |
| 77600 | /* VCVTPH2UWZrrkz */ |
| 77601 | 15679, |
| 77602 | /* VCVTPH2WZ128rm */ |
| 77603 | 15682, |
| 77604 | /* VCVTPH2WZ128rmb */ |
| 77605 | 15684, |
| 77606 | /* VCVTPH2WZ128rmbk */ |
| 77607 | 15686, |
| 77608 | /* VCVTPH2WZ128rmbkz */ |
| 77609 | 15690, |
| 77610 | /* VCVTPH2WZ128rmk */ |
| 77611 | 15693, |
| 77612 | /* VCVTPH2WZ128rmkz */ |
| 77613 | 15697, |
| 77614 | /* VCVTPH2WZ128rr */ |
| 77615 | 15700, |
| 77616 | /* VCVTPH2WZ128rrk */ |
| 77617 | 15702, |
| 77618 | /* VCVTPH2WZ128rrkz */ |
| 77619 | 15706, |
| 77620 | /* VCVTPH2WZ256rm */ |
| 77621 | 15709, |
| 77622 | /* VCVTPH2WZ256rmb */ |
| 77623 | 15711, |
| 77624 | /* VCVTPH2WZ256rmbk */ |
| 77625 | 15713, |
| 77626 | /* VCVTPH2WZ256rmbkz */ |
| 77627 | 15717, |
| 77628 | /* VCVTPH2WZ256rmk */ |
| 77629 | 15720, |
| 77630 | /* VCVTPH2WZ256rmkz */ |
| 77631 | 15724, |
| 77632 | /* VCVTPH2WZ256rr */ |
| 77633 | 15727, |
| 77634 | /* VCVTPH2WZ256rrk */ |
| 77635 | 15729, |
| 77636 | /* VCVTPH2WZ256rrkz */ |
| 77637 | 15733, |
| 77638 | /* VCVTPH2WZrm */ |
| 77639 | 15736, |
| 77640 | /* VCVTPH2WZrmb */ |
| 77641 | 15738, |
| 77642 | /* VCVTPH2WZrmbk */ |
| 77643 | 15740, |
| 77644 | /* VCVTPH2WZrmbkz */ |
| 77645 | 15744, |
| 77646 | /* VCVTPH2WZrmk */ |
| 77647 | 15747, |
| 77648 | /* VCVTPH2WZrmkz */ |
| 77649 | 15751, |
| 77650 | /* VCVTPH2WZrr */ |
| 77651 | 15754, |
| 77652 | /* VCVTPH2WZrrb */ |
| 77653 | 15756, |
| 77654 | /* VCVTPH2WZrrbk */ |
| 77655 | 15759, |
| 77656 | /* VCVTPH2WZrrbkz */ |
| 77657 | 15764, |
| 77658 | /* VCVTPH2WZrrk */ |
| 77659 | 15768, |
| 77660 | /* VCVTPH2WZrrkz */ |
| 77661 | 15772, |
| 77662 | /* VCVTPS2DQYrm */ |
| 77663 | 15775, |
| 77664 | /* VCVTPS2DQYrr */ |
| 77665 | 15777, |
| 77666 | /* VCVTPS2DQZ128rm */ |
| 77667 | 15779, |
| 77668 | /* VCVTPS2DQZ128rmb */ |
| 77669 | 15781, |
| 77670 | /* VCVTPS2DQZ128rmbk */ |
| 77671 | 15783, |
| 77672 | /* VCVTPS2DQZ128rmbkz */ |
| 77673 | 15787, |
| 77674 | /* VCVTPS2DQZ128rmk */ |
| 77675 | 15790, |
| 77676 | /* VCVTPS2DQZ128rmkz */ |
| 77677 | 15794, |
| 77678 | /* VCVTPS2DQZ128rr */ |
| 77679 | 15797, |
| 77680 | /* VCVTPS2DQZ128rrk */ |
| 77681 | 15799, |
| 77682 | /* VCVTPS2DQZ128rrkz */ |
| 77683 | 15803, |
| 77684 | /* VCVTPS2DQZ256rm */ |
| 77685 | 15806, |
| 77686 | /* VCVTPS2DQZ256rmb */ |
| 77687 | 15808, |
| 77688 | /* VCVTPS2DQZ256rmbk */ |
| 77689 | 15810, |
| 77690 | /* VCVTPS2DQZ256rmbkz */ |
| 77691 | 15814, |
| 77692 | /* VCVTPS2DQZ256rmk */ |
| 77693 | 15817, |
| 77694 | /* VCVTPS2DQZ256rmkz */ |
| 77695 | 15821, |
| 77696 | /* VCVTPS2DQZ256rr */ |
| 77697 | 15824, |
| 77698 | /* VCVTPS2DQZ256rrk */ |
| 77699 | 15826, |
| 77700 | /* VCVTPS2DQZ256rrkz */ |
| 77701 | 15830, |
| 77702 | /* VCVTPS2DQZrm */ |
| 77703 | 15833, |
| 77704 | /* VCVTPS2DQZrmb */ |
| 77705 | 15835, |
| 77706 | /* VCVTPS2DQZrmbk */ |
| 77707 | 15837, |
| 77708 | /* VCVTPS2DQZrmbkz */ |
| 77709 | 15841, |
| 77710 | /* VCVTPS2DQZrmk */ |
| 77711 | 15844, |
| 77712 | /* VCVTPS2DQZrmkz */ |
| 77713 | 15848, |
| 77714 | /* VCVTPS2DQZrr */ |
| 77715 | 15851, |
| 77716 | /* VCVTPS2DQZrrb */ |
| 77717 | 15853, |
| 77718 | /* VCVTPS2DQZrrbk */ |
| 77719 | 15856, |
| 77720 | /* VCVTPS2DQZrrbkz */ |
| 77721 | 15861, |
| 77722 | /* VCVTPS2DQZrrk */ |
| 77723 | 15865, |
| 77724 | /* VCVTPS2DQZrrkz */ |
| 77725 | 15869, |
| 77726 | /* VCVTPS2DQrm */ |
| 77727 | 15872, |
| 77728 | /* VCVTPS2DQrr */ |
| 77729 | 15874, |
| 77730 | /* VCVTPS2PDYrm */ |
| 77731 | 15876, |
| 77732 | /* VCVTPS2PDYrr */ |
| 77733 | 15878, |
| 77734 | /* VCVTPS2PDZ128rm */ |
| 77735 | 15880, |
| 77736 | /* VCVTPS2PDZ128rmb */ |
| 77737 | 15882, |
| 77738 | /* VCVTPS2PDZ128rmbk */ |
| 77739 | 15884, |
| 77740 | /* VCVTPS2PDZ128rmbkz */ |
| 77741 | 15888, |
| 77742 | /* VCVTPS2PDZ128rmk */ |
| 77743 | 15891, |
| 77744 | /* VCVTPS2PDZ128rmkz */ |
| 77745 | 15895, |
| 77746 | /* VCVTPS2PDZ128rr */ |
| 77747 | 15898, |
| 77748 | /* VCVTPS2PDZ128rrk */ |
| 77749 | 15900, |
| 77750 | /* VCVTPS2PDZ128rrkz */ |
| 77751 | 15904, |
| 77752 | /* VCVTPS2PDZ256rm */ |
| 77753 | 15907, |
| 77754 | /* VCVTPS2PDZ256rmb */ |
| 77755 | 15909, |
| 77756 | /* VCVTPS2PDZ256rmbk */ |
| 77757 | 15911, |
| 77758 | /* VCVTPS2PDZ256rmbkz */ |
| 77759 | 15915, |
| 77760 | /* VCVTPS2PDZ256rmk */ |
| 77761 | 15918, |
| 77762 | /* VCVTPS2PDZ256rmkz */ |
| 77763 | 15922, |
| 77764 | /* VCVTPS2PDZ256rr */ |
| 77765 | 15925, |
| 77766 | /* VCVTPS2PDZ256rrk */ |
| 77767 | 15927, |
| 77768 | /* VCVTPS2PDZ256rrkz */ |
| 77769 | 15931, |
| 77770 | /* VCVTPS2PDZrm */ |
| 77771 | 15934, |
| 77772 | /* VCVTPS2PDZrmb */ |
| 77773 | 15936, |
| 77774 | /* VCVTPS2PDZrmbk */ |
| 77775 | 15938, |
| 77776 | /* VCVTPS2PDZrmbkz */ |
| 77777 | 15942, |
| 77778 | /* VCVTPS2PDZrmk */ |
| 77779 | 15945, |
| 77780 | /* VCVTPS2PDZrmkz */ |
| 77781 | 15949, |
| 77782 | /* VCVTPS2PDZrr */ |
| 77783 | 15952, |
| 77784 | /* VCVTPS2PDZrrb */ |
| 77785 | 15954, |
| 77786 | /* VCVTPS2PDZrrbk */ |
| 77787 | 15956, |
| 77788 | /* VCVTPS2PDZrrbkz */ |
| 77789 | 15960, |
| 77790 | /* VCVTPS2PDZrrk */ |
| 77791 | 15963, |
| 77792 | /* VCVTPS2PDZrrkz */ |
| 77793 | 15967, |
| 77794 | /* VCVTPS2PDrm */ |
| 77795 | 15970, |
| 77796 | /* VCVTPS2PDrr */ |
| 77797 | 15972, |
| 77798 | /* VCVTPS2PHXZ128rm */ |
| 77799 | 15974, |
| 77800 | /* VCVTPS2PHXZ128rmb */ |
| 77801 | 15976, |
| 77802 | /* VCVTPS2PHXZ128rmbk */ |
| 77803 | 15978, |
| 77804 | /* VCVTPS2PHXZ128rmbkz */ |
| 77805 | 15982, |
| 77806 | /* VCVTPS2PHXZ128rmk */ |
| 77807 | 15985, |
| 77808 | /* VCVTPS2PHXZ128rmkz */ |
| 77809 | 15989, |
| 77810 | /* VCVTPS2PHXZ128rr */ |
| 77811 | 15992, |
| 77812 | /* VCVTPS2PHXZ128rrk */ |
| 77813 | 15994, |
| 77814 | /* VCVTPS2PHXZ128rrkz */ |
| 77815 | 15998, |
| 77816 | /* VCVTPS2PHXZ256rm */ |
| 77817 | 16001, |
| 77818 | /* VCVTPS2PHXZ256rmb */ |
| 77819 | 16003, |
| 77820 | /* VCVTPS2PHXZ256rmbk */ |
| 77821 | 16005, |
| 77822 | /* VCVTPS2PHXZ256rmbkz */ |
| 77823 | 16009, |
| 77824 | /* VCVTPS2PHXZ256rmk */ |
| 77825 | 16012, |
| 77826 | /* VCVTPS2PHXZ256rmkz */ |
| 77827 | 16016, |
| 77828 | /* VCVTPS2PHXZ256rr */ |
| 77829 | 16019, |
| 77830 | /* VCVTPS2PHXZ256rrk */ |
| 77831 | 16021, |
| 77832 | /* VCVTPS2PHXZ256rrkz */ |
| 77833 | 16025, |
| 77834 | /* VCVTPS2PHXZrm */ |
| 77835 | 16028, |
| 77836 | /* VCVTPS2PHXZrmb */ |
| 77837 | 16030, |
| 77838 | /* VCVTPS2PHXZrmbk */ |
| 77839 | 16032, |
| 77840 | /* VCVTPS2PHXZrmbkz */ |
| 77841 | 16036, |
| 77842 | /* VCVTPS2PHXZrmk */ |
| 77843 | 16039, |
| 77844 | /* VCVTPS2PHXZrmkz */ |
| 77845 | 16043, |
| 77846 | /* VCVTPS2PHXZrr */ |
| 77847 | 16046, |
| 77848 | /* VCVTPS2PHXZrrb */ |
| 77849 | 16048, |
| 77850 | /* VCVTPS2PHXZrrbk */ |
| 77851 | 16051, |
| 77852 | /* VCVTPS2PHXZrrbkz */ |
| 77853 | 16056, |
| 77854 | /* VCVTPS2PHXZrrk */ |
| 77855 | 16060, |
| 77856 | /* VCVTPS2PHXZrrkz */ |
| 77857 | 16064, |
| 77858 | /* VCVTPS2PHYmr */ |
| 77859 | 16067, |
| 77860 | /* VCVTPS2PHYrr */ |
| 77861 | 16070, |
| 77862 | /* VCVTPS2PHZ128mr */ |
| 77863 | 16073, |
| 77864 | /* VCVTPS2PHZ128mrk */ |
| 77865 | 16076, |
| 77866 | /* VCVTPS2PHZ128rr */ |
| 77867 | 16080, |
| 77868 | /* VCVTPS2PHZ128rrk */ |
| 77869 | 16083, |
| 77870 | /* VCVTPS2PHZ128rrkz */ |
| 77871 | 16088, |
| 77872 | /* VCVTPS2PHZ256mr */ |
| 77873 | 16092, |
| 77874 | /* VCVTPS2PHZ256mrk */ |
| 77875 | 16095, |
| 77876 | /* VCVTPS2PHZ256rr */ |
| 77877 | 16099, |
| 77878 | /* VCVTPS2PHZ256rrk */ |
| 77879 | 16102, |
| 77880 | /* VCVTPS2PHZ256rrkz */ |
| 77881 | 16107, |
| 77882 | /* VCVTPS2PHZmr */ |
| 77883 | 16111, |
| 77884 | /* VCVTPS2PHZmrk */ |
| 77885 | 16114, |
| 77886 | /* VCVTPS2PHZrr */ |
| 77887 | 16118, |
| 77888 | /* VCVTPS2PHZrrb */ |
| 77889 | 16121, |
| 77890 | /* VCVTPS2PHZrrbk */ |
| 77891 | 16124, |
| 77892 | /* VCVTPS2PHZrrbkz */ |
| 77893 | 16129, |
| 77894 | /* VCVTPS2PHZrrk */ |
| 77895 | 16133, |
| 77896 | /* VCVTPS2PHZrrkz */ |
| 77897 | 16138, |
| 77898 | /* VCVTPS2PHmr */ |
| 77899 | 16142, |
| 77900 | /* VCVTPS2PHrr */ |
| 77901 | 16145, |
| 77902 | /* VCVTPS2QQZ128rm */ |
| 77903 | 16148, |
| 77904 | /* VCVTPS2QQZ128rmb */ |
| 77905 | 16150, |
| 77906 | /* VCVTPS2QQZ128rmbk */ |
| 77907 | 16152, |
| 77908 | /* VCVTPS2QQZ128rmbkz */ |
| 77909 | 16156, |
| 77910 | /* VCVTPS2QQZ128rmk */ |
| 77911 | 16159, |
| 77912 | /* VCVTPS2QQZ128rmkz */ |
| 77913 | 16163, |
| 77914 | /* VCVTPS2QQZ128rr */ |
| 77915 | 16166, |
| 77916 | /* VCVTPS2QQZ128rrk */ |
| 77917 | 16168, |
| 77918 | /* VCVTPS2QQZ128rrkz */ |
| 77919 | 16172, |
| 77920 | /* VCVTPS2QQZ256rm */ |
| 77921 | 16175, |
| 77922 | /* VCVTPS2QQZ256rmb */ |
| 77923 | 16177, |
| 77924 | /* VCVTPS2QQZ256rmbk */ |
| 77925 | 16179, |
| 77926 | /* VCVTPS2QQZ256rmbkz */ |
| 77927 | 16183, |
| 77928 | /* VCVTPS2QQZ256rmk */ |
| 77929 | 16186, |
| 77930 | /* VCVTPS2QQZ256rmkz */ |
| 77931 | 16190, |
| 77932 | /* VCVTPS2QQZ256rr */ |
| 77933 | 16193, |
| 77934 | /* VCVTPS2QQZ256rrk */ |
| 77935 | 16195, |
| 77936 | /* VCVTPS2QQZ256rrkz */ |
| 77937 | 16199, |
| 77938 | /* VCVTPS2QQZrm */ |
| 77939 | 16202, |
| 77940 | /* VCVTPS2QQZrmb */ |
| 77941 | 16204, |
| 77942 | /* VCVTPS2QQZrmbk */ |
| 77943 | 16206, |
| 77944 | /* VCVTPS2QQZrmbkz */ |
| 77945 | 16210, |
| 77946 | /* VCVTPS2QQZrmk */ |
| 77947 | 16213, |
| 77948 | /* VCVTPS2QQZrmkz */ |
| 77949 | 16217, |
| 77950 | /* VCVTPS2QQZrr */ |
| 77951 | 16220, |
| 77952 | /* VCVTPS2QQZrrb */ |
| 77953 | 16222, |
| 77954 | /* VCVTPS2QQZrrbk */ |
| 77955 | 16225, |
| 77956 | /* VCVTPS2QQZrrbkz */ |
| 77957 | 16230, |
| 77958 | /* VCVTPS2QQZrrk */ |
| 77959 | 16234, |
| 77960 | /* VCVTPS2QQZrrkz */ |
| 77961 | 16238, |
| 77962 | /* VCVTPS2UDQZ128rm */ |
| 77963 | 16241, |
| 77964 | /* VCVTPS2UDQZ128rmb */ |
| 77965 | 16243, |
| 77966 | /* VCVTPS2UDQZ128rmbk */ |
| 77967 | 16245, |
| 77968 | /* VCVTPS2UDQZ128rmbkz */ |
| 77969 | 16249, |
| 77970 | /* VCVTPS2UDQZ128rmk */ |
| 77971 | 16252, |
| 77972 | /* VCVTPS2UDQZ128rmkz */ |
| 77973 | 16256, |
| 77974 | /* VCVTPS2UDQZ128rr */ |
| 77975 | 16259, |
| 77976 | /* VCVTPS2UDQZ128rrk */ |
| 77977 | 16261, |
| 77978 | /* VCVTPS2UDQZ128rrkz */ |
| 77979 | 16265, |
| 77980 | /* VCVTPS2UDQZ256rm */ |
| 77981 | 16268, |
| 77982 | /* VCVTPS2UDQZ256rmb */ |
| 77983 | 16270, |
| 77984 | /* VCVTPS2UDQZ256rmbk */ |
| 77985 | 16272, |
| 77986 | /* VCVTPS2UDQZ256rmbkz */ |
| 77987 | 16276, |
| 77988 | /* VCVTPS2UDQZ256rmk */ |
| 77989 | 16279, |
| 77990 | /* VCVTPS2UDQZ256rmkz */ |
| 77991 | 16283, |
| 77992 | /* VCVTPS2UDQZ256rr */ |
| 77993 | 16286, |
| 77994 | /* VCVTPS2UDQZ256rrk */ |
| 77995 | 16288, |
| 77996 | /* VCVTPS2UDQZ256rrkz */ |
| 77997 | 16292, |
| 77998 | /* VCVTPS2UDQZrm */ |
| 77999 | 16295, |
| 78000 | /* VCVTPS2UDQZrmb */ |
| 78001 | 16297, |
| 78002 | /* VCVTPS2UDQZrmbk */ |
| 78003 | 16299, |
| 78004 | /* VCVTPS2UDQZrmbkz */ |
| 78005 | 16303, |
| 78006 | /* VCVTPS2UDQZrmk */ |
| 78007 | 16306, |
| 78008 | /* VCVTPS2UDQZrmkz */ |
| 78009 | 16310, |
| 78010 | /* VCVTPS2UDQZrr */ |
| 78011 | 16313, |
| 78012 | /* VCVTPS2UDQZrrb */ |
| 78013 | 16315, |
| 78014 | /* VCVTPS2UDQZrrbk */ |
| 78015 | 16318, |
| 78016 | /* VCVTPS2UDQZrrbkz */ |
| 78017 | 16323, |
| 78018 | /* VCVTPS2UDQZrrk */ |
| 78019 | 16327, |
| 78020 | /* VCVTPS2UDQZrrkz */ |
| 78021 | 16331, |
| 78022 | /* VCVTPS2UQQZ128rm */ |
| 78023 | 16334, |
| 78024 | /* VCVTPS2UQQZ128rmb */ |
| 78025 | 16336, |
| 78026 | /* VCVTPS2UQQZ128rmbk */ |
| 78027 | 16338, |
| 78028 | /* VCVTPS2UQQZ128rmbkz */ |
| 78029 | 16342, |
| 78030 | /* VCVTPS2UQQZ128rmk */ |
| 78031 | 16345, |
| 78032 | /* VCVTPS2UQQZ128rmkz */ |
| 78033 | 16349, |
| 78034 | /* VCVTPS2UQQZ128rr */ |
| 78035 | 16352, |
| 78036 | /* VCVTPS2UQQZ128rrk */ |
| 78037 | 16354, |
| 78038 | /* VCVTPS2UQQZ128rrkz */ |
| 78039 | 16358, |
| 78040 | /* VCVTPS2UQQZ256rm */ |
| 78041 | 16361, |
| 78042 | /* VCVTPS2UQQZ256rmb */ |
| 78043 | 16363, |
| 78044 | /* VCVTPS2UQQZ256rmbk */ |
| 78045 | 16365, |
| 78046 | /* VCVTPS2UQQZ256rmbkz */ |
| 78047 | 16369, |
| 78048 | /* VCVTPS2UQQZ256rmk */ |
| 78049 | 16372, |
| 78050 | /* VCVTPS2UQQZ256rmkz */ |
| 78051 | 16376, |
| 78052 | /* VCVTPS2UQQZ256rr */ |
| 78053 | 16379, |
| 78054 | /* VCVTPS2UQQZ256rrk */ |
| 78055 | 16381, |
| 78056 | /* VCVTPS2UQQZ256rrkz */ |
| 78057 | 16385, |
| 78058 | /* VCVTPS2UQQZrm */ |
| 78059 | 16388, |
| 78060 | /* VCVTPS2UQQZrmb */ |
| 78061 | 16390, |
| 78062 | /* VCVTPS2UQQZrmbk */ |
| 78063 | 16392, |
| 78064 | /* VCVTPS2UQQZrmbkz */ |
| 78065 | 16396, |
| 78066 | /* VCVTPS2UQQZrmk */ |
| 78067 | 16399, |
| 78068 | /* VCVTPS2UQQZrmkz */ |
| 78069 | 16403, |
| 78070 | /* VCVTPS2UQQZrr */ |
| 78071 | 16406, |
| 78072 | /* VCVTPS2UQQZrrb */ |
| 78073 | 16408, |
| 78074 | /* VCVTPS2UQQZrrbk */ |
| 78075 | 16411, |
| 78076 | /* VCVTPS2UQQZrrbkz */ |
| 78077 | 16416, |
| 78078 | /* VCVTPS2UQQZrrk */ |
| 78079 | 16420, |
| 78080 | /* VCVTPS2UQQZrrkz */ |
| 78081 | 16424, |
| 78082 | /* VCVTQQ2PDZ128rm */ |
| 78083 | 16427, |
| 78084 | /* VCVTQQ2PDZ128rmb */ |
| 78085 | 16429, |
| 78086 | /* VCVTQQ2PDZ128rmbk */ |
| 78087 | 16431, |
| 78088 | /* VCVTQQ2PDZ128rmbkz */ |
| 78089 | 16435, |
| 78090 | /* VCVTQQ2PDZ128rmk */ |
| 78091 | 16438, |
| 78092 | /* VCVTQQ2PDZ128rmkz */ |
| 78093 | 16442, |
| 78094 | /* VCVTQQ2PDZ128rr */ |
| 78095 | 16445, |
| 78096 | /* VCVTQQ2PDZ128rrk */ |
| 78097 | 16447, |
| 78098 | /* VCVTQQ2PDZ128rrkz */ |
| 78099 | 16451, |
| 78100 | /* VCVTQQ2PDZ256rm */ |
| 78101 | 16454, |
| 78102 | /* VCVTQQ2PDZ256rmb */ |
| 78103 | 16456, |
| 78104 | /* VCVTQQ2PDZ256rmbk */ |
| 78105 | 16458, |
| 78106 | /* VCVTQQ2PDZ256rmbkz */ |
| 78107 | 16462, |
| 78108 | /* VCVTQQ2PDZ256rmk */ |
| 78109 | 16465, |
| 78110 | /* VCVTQQ2PDZ256rmkz */ |
| 78111 | 16469, |
| 78112 | /* VCVTQQ2PDZ256rr */ |
| 78113 | 16472, |
| 78114 | /* VCVTQQ2PDZ256rrk */ |
| 78115 | 16474, |
| 78116 | /* VCVTQQ2PDZ256rrkz */ |
| 78117 | 16478, |
| 78118 | /* VCVTQQ2PDZrm */ |
| 78119 | 16481, |
| 78120 | /* VCVTQQ2PDZrmb */ |
| 78121 | 16483, |
| 78122 | /* VCVTQQ2PDZrmbk */ |
| 78123 | 16485, |
| 78124 | /* VCVTQQ2PDZrmbkz */ |
| 78125 | 16489, |
| 78126 | /* VCVTQQ2PDZrmk */ |
| 78127 | 16492, |
| 78128 | /* VCVTQQ2PDZrmkz */ |
| 78129 | 16496, |
| 78130 | /* VCVTQQ2PDZrr */ |
| 78131 | 16499, |
| 78132 | /* VCVTQQ2PDZrrb */ |
| 78133 | 16501, |
| 78134 | /* VCVTQQ2PDZrrbk */ |
| 78135 | 16504, |
| 78136 | /* VCVTQQ2PDZrrbkz */ |
| 78137 | 16509, |
| 78138 | /* VCVTQQ2PDZrrk */ |
| 78139 | 16513, |
| 78140 | /* VCVTQQ2PDZrrkz */ |
| 78141 | 16517, |
| 78142 | /* VCVTQQ2PHZ128rm */ |
| 78143 | 16520, |
| 78144 | /* VCVTQQ2PHZ128rmb */ |
| 78145 | 16522, |
| 78146 | /* VCVTQQ2PHZ128rmbk */ |
| 78147 | 16524, |
| 78148 | /* VCVTQQ2PHZ128rmbkz */ |
| 78149 | 16528, |
| 78150 | /* VCVTQQ2PHZ128rmk */ |
| 78151 | 16531, |
| 78152 | /* VCVTQQ2PHZ128rmkz */ |
| 78153 | 16535, |
| 78154 | /* VCVTQQ2PHZ128rr */ |
| 78155 | 16538, |
| 78156 | /* VCVTQQ2PHZ128rrk */ |
| 78157 | 16540, |
| 78158 | /* VCVTQQ2PHZ128rrkz */ |
| 78159 | 16544, |
| 78160 | /* VCVTQQ2PHZ256rm */ |
| 78161 | 16547, |
| 78162 | /* VCVTQQ2PHZ256rmb */ |
| 78163 | 16549, |
| 78164 | /* VCVTQQ2PHZ256rmbk */ |
| 78165 | 16551, |
| 78166 | /* VCVTQQ2PHZ256rmbkz */ |
| 78167 | 16555, |
| 78168 | /* VCVTQQ2PHZ256rmk */ |
| 78169 | 16558, |
| 78170 | /* VCVTQQ2PHZ256rmkz */ |
| 78171 | 16562, |
| 78172 | /* VCVTQQ2PHZ256rr */ |
| 78173 | 16565, |
| 78174 | /* VCVTQQ2PHZ256rrk */ |
| 78175 | 16567, |
| 78176 | /* VCVTQQ2PHZ256rrkz */ |
| 78177 | 16571, |
| 78178 | /* VCVTQQ2PHZrm */ |
| 78179 | 16574, |
| 78180 | /* VCVTQQ2PHZrmb */ |
| 78181 | 16576, |
| 78182 | /* VCVTQQ2PHZrmbk */ |
| 78183 | 16578, |
| 78184 | /* VCVTQQ2PHZrmbkz */ |
| 78185 | 16582, |
| 78186 | /* VCVTQQ2PHZrmk */ |
| 78187 | 16585, |
| 78188 | /* VCVTQQ2PHZrmkz */ |
| 78189 | 16589, |
| 78190 | /* VCVTQQ2PHZrr */ |
| 78191 | 16592, |
| 78192 | /* VCVTQQ2PHZrrb */ |
| 78193 | 16594, |
| 78194 | /* VCVTQQ2PHZrrbk */ |
| 78195 | 16597, |
| 78196 | /* VCVTQQ2PHZrrbkz */ |
| 78197 | 16602, |
| 78198 | /* VCVTQQ2PHZrrk */ |
| 78199 | 16606, |
| 78200 | /* VCVTQQ2PHZrrkz */ |
| 78201 | 16610, |
| 78202 | /* VCVTQQ2PSZ128rm */ |
| 78203 | 16613, |
| 78204 | /* VCVTQQ2PSZ128rmb */ |
| 78205 | 16615, |
| 78206 | /* VCVTQQ2PSZ128rmbk */ |
| 78207 | 16617, |
| 78208 | /* VCVTQQ2PSZ128rmbkz */ |
| 78209 | 16621, |
| 78210 | /* VCVTQQ2PSZ128rmk */ |
| 78211 | 16624, |
| 78212 | /* VCVTQQ2PSZ128rmkz */ |
| 78213 | 16628, |
| 78214 | /* VCVTQQ2PSZ128rr */ |
| 78215 | 16631, |
| 78216 | /* VCVTQQ2PSZ128rrk */ |
| 78217 | 16633, |
| 78218 | /* VCVTQQ2PSZ128rrkz */ |
| 78219 | 16637, |
| 78220 | /* VCVTQQ2PSZ256rm */ |
| 78221 | 16640, |
| 78222 | /* VCVTQQ2PSZ256rmb */ |
| 78223 | 16642, |
| 78224 | /* VCVTQQ2PSZ256rmbk */ |
| 78225 | 16644, |
| 78226 | /* VCVTQQ2PSZ256rmbkz */ |
| 78227 | 16648, |
| 78228 | /* VCVTQQ2PSZ256rmk */ |
| 78229 | 16651, |
| 78230 | /* VCVTQQ2PSZ256rmkz */ |
| 78231 | 16655, |
| 78232 | /* VCVTQQ2PSZ256rr */ |
| 78233 | 16658, |
| 78234 | /* VCVTQQ2PSZ256rrk */ |
| 78235 | 16660, |
| 78236 | /* VCVTQQ2PSZ256rrkz */ |
| 78237 | 16664, |
| 78238 | /* VCVTQQ2PSZrm */ |
| 78239 | 16667, |
| 78240 | /* VCVTQQ2PSZrmb */ |
| 78241 | 16669, |
| 78242 | /* VCVTQQ2PSZrmbk */ |
| 78243 | 16671, |
| 78244 | /* VCVTQQ2PSZrmbkz */ |
| 78245 | 16675, |
| 78246 | /* VCVTQQ2PSZrmk */ |
| 78247 | 16678, |
| 78248 | /* VCVTQQ2PSZrmkz */ |
| 78249 | 16682, |
| 78250 | /* VCVTQQ2PSZrr */ |
| 78251 | 16685, |
| 78252 | /* VCVTQQ2PSZrrb */ |
| 78253 | 16687, |
| 78254 | /* VCVTQQ2PSZrrbk */ |
| 78255 | 16690, |
| 78256 | /* VCVTQQ2PSZrrbkz */ |
| 78257 | 16695, |
| 78258 | /* VCVTQQ2PSZrrk */ |
| 78259 | 16699, |
| 78260 | /* VCVTQQ2PSZrrkz */ |
| 78261 | 16703, |
| 78262 | /* VCVTSD2SHZrm */ |
| 78263 | 16706, |
| 78264 | /* VCVTSD2SHZrm_Int */ |
| 78265 | 16709, |
| 78266 | /* VCVTSD2SHZrm_Intk */ |
| 78267 | 16712, |
| 78268 | /* VCVTSD2SHZrm_Intkz */ |
| 78269 | 16717, |
| 78270 | /* VCVTSD2SHZrr */ |
| 78271 | 16721, |
| 78272 | /* VCVTSD2SHZrr_Int */ |
| 78273 | 16724, |
| 78274 | /* VCVTSD2SHZrr_Intk */ |
| 78275 | 16727, |
| 78276 | /* VCVTSD2SHZrr_Intkz */ |
| 78277 | 16732, |
| 78278 | /* VCVTSD2SHZrrb_Int */ |
| 78279 | 16736, |
| 78280 | /* VCVTSD2SHZrrb_Intk */ |
| 78281 | 16740, |
| 78282 | /* VCVTSD2SHZrrb_Intkz */ |
| 78283 | 16746, |
| 78284 | /* VCVTSD2SI64Zrm */ |
| 78285 | 16751, |
| 78286 | /* VCVTSD2SI64Zrm_Int */ |
| 78287 | 16753, |
| 78288 | /* VCVTSD2SI64Zrr */ |
| 78289 | 16755, |
| 78290 | /* VCVTSD2SI64Zrr_Int */ |
| 78291 | 16757, |
| 78292 | /* VCVTSD2SI64Zrrb_Int */ |
| 78293 | 16759, |
| 78294 | /* VCVTSD2SI64rm */ |
| 78295 | 16762, |
| 78296 | /* VCVTSD2SI64rm_Int */ |
| 78297 | 16764, |
| 78298 | /* VCVTSD2SI64rr */ |
| 78299 | 16766, |
| 78300 | /* VCVTSD2SI64rr_Int */ |
| 78301 | 16768, |
| 78302 | /* VCVTSD2SIZrm */ |
| 78303 | 16770, |
| 78304 | /* VCVTSD2SIZrm_Int */ |
| 78305 | 16772, |
| 78306 | /* VCVTSD2SIZrr */ |
| 78307 | 16774, |
| 78308 | /* VCVTSD2SIZrr_Int */ |
| 78309 | 16776, |
| 78310 | /* VCVTSD2SIZrrb_Int */ |
| 78311 | 16778, |
| 78312 | /* VCVTSD2SIrm */ |
| 78313 | 16781, |
| 78314 | /* VCVTSD2SIrm_Int */ |
| 78315 | 16783, |
| 78316 | /* VCVTSD2SIrr */ |
| 78317 | 16785, |
| 78318 | /* VCVTSD2SIrr_Int */ |
| 78319 | 16787, |
| 78320 | /* VCVTSD2SSZrm */ |
| 78321 | 16789, |
| 78322 | /* VCVTSD2SSZrm_Int */ |
| 78323 | 16792, |
| 78324 | /* VCVTSD2SSZrm_Intk */ |
| 78325 | 16795, |
| 78326 | /* VCVTSD2SSZrm_Intkz */ |
| 78327 | 16800, |
| 78328 | /* VCVTSD2SSZrr */ |
| 78329 | 16804, |
| 78330 | /* VCVTSD2SSZrr_Int */ |
| 78331 | 16807, |
| 78332 | /* VCVTSD2SSZrr_Intk */ |
| 78333 | 16810, |
| 78334 | /* VCVTSD2SSZrr_Intkz */ |
| 78335 | 16815, |
| 78336 | /* VCVTSD2SSZrrb_Int */ |
| 78337 | 16819, |
| 78338 | /* VCVTSD2SSZrrb_Intk */ |
| 78339 | 16823, |
| 78340 | /* VCVTSD2SSZrrb_Intkz */ |
| 78341 | 16829, |
| 78342 | /* VCVTSD2SSrm */ |
| 78343 | 16834, |
| 78344 | /* VCVTSD2SSrm_Int */ |
| 78345 | 16837, |
| 78346 | /* VCVTSD2SSrr */ |
| 78347 | 16840, |
| 78348 | /* VCVTSD2SSrr_Int */ |
| 78349 | 16843, |
| 78350 | /* VCVTSD2USI64Zrm_Int */ |
| 78351 | 16846, |
| 78352 | /* VCVTSD2USI64Zrr_Int */ |
| 78353 | 16848, |
| 78354 | /* VCVTSD2USI64Zrrb_Int */ |
| 78355 | 16850, |
| 78356 | /* VCVTSD2USIZrm_Int */ |
| 78357 | 16853, |
| 78358 | /* VCVTSD2USIZrr_Int */ |
| 78359 | 16855, |
| 78360 | /* VCVTSD2USIZrrb_Int */ |
| 78361 | 16857, |
| 78362 | /* VCVTSH2SDZrm */ |
| 78363 | 16860, |
| 78364 | /* VCVTSH2SDZrm_Int */ |
| 78365 | 16863, |
| 78366 | /* VCVTSH2SDZrm_Intk */ |
| 78367 | 16866, |
| 78368 | /* VCVTSH2SDZrm_Intkz */ |
| 78369 | 16871, |
| 78370 | /* VCVTSH2SDZrr */ |
| 78371 | 16875, |
| 78372 | /* VCVTSH2SDZrr_Int */ |
| 78373 | 16878, |
| 78374 | /* VCVTSH2SDZrr_Intk */ |
| 78375 | 16881, |
| 78376 | /* VCVTSH2SDZrr_Intkz */ |
| 78377 | 16886, |
| 78378 | /* VCVTSH2SDZrrb_Int */ |
| 78379 | 16890, |
| 78380 | /* VCVTSH2SDZrrb_Intk */ |
| 78381 | 16893, |
| 78382 | /* VCVTSH2SDZrrb_Intkz */ |
| 78383 | 16898, |
| 78384 | /* VCVTSH2SI64Zrm_Int */ |
| 78385 | 16902, |
| 78386 | /* VCVTSH2SI64Zrr_Int */ |
| 78387 | 16904, |
| 78388 | /* VCVTSH2SI64Zrrb_Int */ |
| 78389 | 16906, |
| 78390 | /* VCVTSH2SIZrm_Int */ |
| 78391 | 16909, |
| 78392 | /* VCVTSH2SIZrr_Int */ |
| 78393 | 16911, |
| 78394 | /* VCVTSH2SIZrrb_Int */ |
| 78395 | 16913, |
| 78396 | /* VCVTSH2SSZrm */ |
| 78397 | 16916, |
| 78398 | /* VCVTSH2SSZrm_Int */ |
| 78399 | 16919, |
| 78400 | /* VCVTSH2SSZrm_Intk */ |
| 78401 | 16922, |
| 78402 | /* VCVTSH2SSZrm_Intkz */ |
| 78403 | 16927, |
| 78404 | /* VCVTSH2SSZrr */ |
| 78405 | 16931, |
| 78406 | /* VCVTSH2SSZrr_Int */ |
| 78407 | 16934, |
| 78408 | /* VCVTSH2SSZrr_Intk */ |
| 78409 | 16937, |
| 78410 | /* VCVTSH2SSZrr_Intkz */ |
| 78411 | 16942, |
| 78412 | /* VCVTSH2SSZrrb_Int */ |
| 78413 | 16946, |
| 78414 | /* VCVTSH2SSZrrb_Intk */ |
| 78415 | 16949, |
| 78416 | /* VCVTSH2SSZrrb_Intkz */ |
| 78417 | 16954, |
| 78418 | /* VCVTSH2USI64Zrm_Int */ |
| 78419 | 16958, |
| 78420 | /* VCVTSH2USI64Zrr_Int */ |
| 78421 | 16960, |
| 78422 | /* VCVTSH2USI64Zrrb_Int */ |
| 78423 | 16962, |
| 78424 | /* VCVTSH2USIZrm_Int */ |
| 78425 | 16965, |
| 78426 | /* VCVTSH2USIZrr_Int */ |
| 78427 | 16967, |
| 78428 | /* VCVTSH2USIZrrb_Int */ |
| 78429 | 16969, |
| 78430 | /* VCVTSI2SDZrm */ |
| 78431 | 16972, |
| 78432 | /* VCVTSI2SDZrm_Int */ |
| 78433 | 16975, |
| 78434 | /* VCVTSI2SDZrr */ |
| 78435 | 16978, |
| 78436 | /* VCVTSI2SDZrr_Int */ |
| 78437 | 16981, |
| 78438 | /* VCVTSI2SDrm */ |
| 78439 | 16984, |
| 78440 | /* VCVTSI2SDrm_Int */ |
| 78441 | 16987, |
| 78442 | /* VCVTSI2SDrr */ |
| 78443 | 16990, |
| 78444 | /* VCVTSI2SDrr_Int */ |
| 78445 | 16993, |
| 78446 | /* VCVTSI2SHZrm */ |
| 78447 | 16996, |
| 78448 | /* VCVTSI2SHZrm_Int */ |
| 78449 | 16999, |
| 78450 | /* VCVTSI2SHZrr */ |
| 78451 | 17002, |
| 78452 | /* VCVTSI2SHZrr_Int */ |
| 78453 | 17005, |
| 78454 | /* VCVTSI2SHZrrb_Int */ |
| 78455 | 17008, |
| 78456 | /* VCVTSI2SSZrm */ |
| 78457 | 17012, |
| 78458 | /* VCVTSI2SSZrm_Int */ |
| 78459 | 17015, |
| 78460 | /* VCVTSI2SSZrr */ |
| 78461 | 17018, |
| 78462 | /* VCVTSI2SSZrr_Int */ |
| 78463 | 17021, |
| 78464 | /* VCVTSI2SSZrrb_Int */ |
| 78465 | 17024, |
| 78466 | /* VCVTSI2SSrm */ |
| 78467 | 17028, |
| 78468 | /* VCVTSI2SSrm_Int */ |
| 78469 | 17031, |
| 78470 | /* VCVTSI2SSrr */ |
| 78471 | 17034, |
| 78472 | /* VCVTSI2SSrr_Int */ |
| 78473 | 17037, |
| 78474 | /* VCVTSI642SDZrm */ |
| 78475 | 17040, |
| 78476 | /* VCVTSI642SDZrm_Int */ |
| 78477 | 17043, |
| 78478 | /* VCVTSI642SDZrr */ |
| 78479 | 17046, |
| 78480 | /* VCVTSI642SDZrr_Int */ |
| 78481 | 17049, |
| 78482 | /* VCVTSI642SDZrrb_Int */ |
| 78483 | 17052, |
| 78484 | /* VCVTSI642SDrm */ |
| 78485 | 17056, |
| 78486 | /* VCVTSI642SDrm_Int */ |
| 78487 | 17059, |
| 78488 | /* VCVTSI642SDrr */ |
| 78489 | 17062, |
| 78490 | /* VCVTSI642SDrr_Int */ |
| 78491 | 17065, |
| 78492 | /* VCVTSI642SHZrm */ |
| 78493 | 17068, |
| 78494 | /* VCVTSI642SHZrm_Int */ |
| 78495 | 17071, |
| 78496 | /* VCVTSI642SHZrr */ |
| 78497 | 17074, |
| 78498 | /* VCVTSI642SHZrr_Int */ |
| 78499 | 17077, |
| 78500 | /* VCVTSI642SHZrrb_Int */ |
| 78501 | 17080, |
| 78502 | /* VCVTSI642SSZrm */ |
| 78503 | 17084, |
| 78504 | /* VCVTSI642SSZrm_Int */ |
| 78505 | 17087, |
| 78506 | /* VCVTSI642SSZrr */ |
| 78507 | 17090, |
| 78508 | /* VCVTSI642SSZrr_Int */ |
| 78509 | 17093, |
| 78510 | /* VCVTSI642SSZrrb_Int */ |
| 78511 | 17096, |
| 78512 | /* VCVTSI642SSrm */ |
| 78513 | 17100, |
| 78514 | /* VCVTSI642SSrm_Int */ |
| 78515 | 17103, |
| 78516 | /* VCVTSI642SSrr */ |
| 78517 | 17106, |
| 78518 | /* VCVTSI642SSrr_Int */ |
| 78519 | 17109, |
| 78520 | /* VCVTSS2SDZrm */ |
| 78521 | 17112, |
| 78522 | /* VCVTSS2SDZrm_Int */ |
| 78523 | 17115, |
| 78524 | /* VCVTSS2SDZrm_Intk */ |
| 78525 | 17118, |
| 78526 | /* VCVTSS2SDZrm_Intkz */ |
| 78527 | 17123, |
| 78528 | /* VCVTSS2SDZrr */ |
| 78529 | 17127, |
| 78530 | /* VCVTSS2SDZrr_Int */ |
| 78531 | 17130, |
| 78532 | /* VCVTSS2SDZrr_Intk */ |
| 78533 | 17133, |
| 78534 | /* VCVTSS2SDZrr_Intkz */ |
| 78535 | 17138, |
| 78536 | /* VCVTSS2SDZrrb_Int */ |
| 78537 | 17142, |
| 78538 | /* VCVTSS2SDZrrb_Intk */ |
| 78539 | 17145, |
| 78540 | /* VCVTSS2SDZrrb_Intkz */ |
| 78541 | 17150, |
| 78542 | /* VCVTSS2SDrm */ |
| 78543 | 17154, |
| 78544 | /* VCVTSS2SDrm_Int */ |
| 78545 | 17157, |
| 78546 | /* VCVTSS2SDrr */ |
| 78547 | 17160, |
| 78548 | /* VCVTSS2SDrr_Int */ |
| 78549 | 17163, |
| 78550 | /* VCVTSS2SHZrm */ |
| 78551 | 17166, |
| 78552 | /* VCVTSS2SHZrm_Int */ |
| 78553 | 17169, |
| 78554 | /* VCVTSS2SHZrm_Intk */ |
| 78555 | 17172, |
| 78556 | /* VCVTSS2SHZrm_Intkz */ |
| 78557 | 17177, |
| 78558 | /* VCVTSS2SHZrr */ |
| 78559 | 17181, |
| 78560 | /* VCVTSS2SHZrr_Int */ |
| 78561 | 17184, |
| 78562 | /* VCVTSS2SHZrr_Intk */ |
| 78563 | 17187, |
| 78564 | /* VCVTSS2SHZrr_Intkz */ |
| 78565 | 17192, |
| 78566 | /* VCVTSS2SHZrrb_Int */ |
| 78567 | 17196, |
| 78568 | /* VCVTSS2SHZrrb_Intk */ |
| 78569 | 17200, |
| 78570 | /* VCVTSS2SHZrrb_Intkz */ |
| 78571 | 17206, |
| 78572 | /* VCVTSS2SI64Zrm */ |
| 78573 | 17211, |
| 78574 | /* VCVTSS2SI64Zrm_Int */ |
| 78575 | 17213, |
| 78576 | /* VCVTSS2SI64Zrr */ |
| 78577 | 17215, |
| 78578 | /* VCVTSS2SI64Zrr_Int */ |
| 78579 | 17217, |
| 78580 | /* VCVTSS2SI64Zrrb_Int */ |
| 78581 | 17219, |
| 78582 | /* VCVTSS2SI64rm */ |
| 78583 | 17222, |
| 78584 | /* VCVTSS2SI64rm_Int */ |
| 78585 | 17224, |
| 78586 | /* VCVTSS2SI64rr */ |
| 78587 | 17226, |
| 78588 | /* VCVTSS2SI64rr_Int */ |
| 78589 | 17228, |
| 78590 | /* VCVTSS2SIZrm */ |
| 78591 | 17230, |
| 78592 | /* VCVTSS2SIZrm_Int */ |
| 78593 | 17232, |
| 78594 | /* VCVTSS2SIZrr */ |
| 78595 | 17234, |
| 78596 | /* VCVTSS2SIZrr_Int */ |
| 78597 | 17236, |
| 78598 | /* VCVTSS2SIZrrb_Int */ |
| 78599 | 17238, |
| 78600 | /* VCVTSS2SIrm */ |
| 78601 | 17241, |
| 78602 | /* VCVTSS2SIrm_Int */ |
| 78603 | 17243, |
| 78604 | /* VCVTSS2SIrr */ |
| 78605 | 17245, |
| 78606 | /* VCVTSS2SIrr_Int */ |
| 78607 | 17247, |
| 78608 | /* VCVTSS2USI64Zrm_Int */ |
| 78609 | 17249, |
| 78610 | /* VCVTSS2USI64Zrr_Int */ |
| 78611 | 17251, |
| 78612 | /* VCVTSS2USI64Zrrb_Int */ |
| 78613 | 17253, |
| 78614 | /* VCVTSS2USIZrm_Int */ |
| 78615 | 17256, |
| 78616 | /* VCVTSS2USIZrr_Int */ |
| 78617 | 17258, |
| 78618 | /* VCVTSS2USIZrrb_Int */ |
| 78619 | 17260, |
| 78620 | /* VCVTTPD2DQYrm */ |
| 78621 | 17263, |
| 78622 | /* VCVTTPD2DQYrr */ |
| 78623 | 17265, |
| 78624 | /* VCVTTPD2DQZ128rm */ |
| 78625 | 17267, |
| 78626 | /* VCVTTPD2DQZ128rmb */ |
| 78627 | 17269, |
| 78628 | /* VCVTTPD2DQZ128rmbk */ |
| 78629 | 17271, |
| 78630 | /* VCVTTPD2DQZ128rmbkz */ |
| 78631 | 17275, |
| 78632 | /* VCVTTPD2DQZ128rmk */ |
| 78633 | 17278, |
| 78634 | /* VCVTTPD2DQZ128rmkz */ |
| 78635 | 17282, |
| 78636 | /* VCVTTPD2DQZ128rr */ |
| 78637 | 17285, |
| 78638 | /* VCVTTPD2DQZ128rrk */ |
| 78639 | 17287, |
| 78640 | /* VCVTTPD2DQZ128rrkz */ |
| 78641 | 17291, |
| 78642 | /* VCVTTPD2DQZ256rm */ |
| 78643 | 17294, |
| 78644 | /* VCVTTPD2DQZ256rmb */ |
| 78645 | 17296, |
| 78646 | /* VCVTTPD2DQZ256rmbk */ |
| 78647 | 17298, |
| 78648 | /* VCVTTPD2DQZ256rmbkz */ |
| 78649 | 17302, |
| 78650 | /* VCVTTPD2DQZ256rmk */ |
| 78651 | 17305, |
| 78652 | /* VCVTTPD2DQZ256rmkz */ |
| 78653 | 17309, |
| 78654 | /* VCVTTPD2DQZ256rr */ |
| 78655 | 17312, |
| 78656 | /* VCVTTPD2DQZ256rrk */ |
| 78657 | 17314, |
| 78658 | /* VCVTTPD2DQZ256rrkz */ |
| 78659 | 17318, |
| 78660 | /* VCVTTPD2DQZrm */ |
| 78661 | 17321, |
| 78662 | /* VCVTTPD2DQZrmb */ |
| 78663 | 17323, |
| 78664 | /* VCVTTPD2DQZrmbk */ |
| 78665 | 17325, |
| 78666 | /* VCVTTPD2DQZrmbkz */ |
| 78667 | 17329, |
| 78668 | /* VCVTTPD2DQZrmk */ |
| 78669 | 17332, |
| 78670 | /* VCVTTPD2DQZrmkz */ |
| 78671 | 17336, |
| 78672 | /* VCVTTPD2DQZrr */ |
| 78673 | 17339, |
| 78674 | /* VCVTTPD2DQZrrb */ |
| 78675 | 17341, |
| 78676 | /* VCVTTPD2DQZrrbk */ |
| 78677 | 17343, |
| 78678 | /* VCVTTPD2DQZrrbkz */ |
| 78679 | 17347, |
| 78680 | /* VCVTTPD2DQZrrk */ |
| 78681 | 17350, |
| 78682 | /* VCVTTPD2DQZrrkz */ |
| 78683 | 17354, |
| 78684 | /* VCVTTPD2DQrm */ |
| 78685 | 17357, |
| 78686 | /* VCVTTPD2DQrr */ |
| 78687 | 17359, |
| 78688 | /* VCVTTPD2QQZ128rm */ |
| 78689 | 17361, |
| 78690 | /* VCVTTPD2QQZ128rmb */ |
| 78691 | 17363, |
| 78692 | /* VCVTTPD2QQZ128rmbk */ |
| 78693 | 17365, |
| 78694 | /* VCVTTPD2QQZ128rmbkz */ |
| 78695 | 17369, |
| 78696 | /* VCVTTPD2QQZ128rmk */ |
| 78697 | 17372, |
| 78698 | /* VCVTTPD2QQZ128rmkz */ |
| 78699 | 17376, |
| 78700 | /* VCVTTPD2QQZ128rr */ |
| 78701 | 17379, |
| 78702 | /* VCVTTPD2QQZ128rrk */ |
| 78703 | 17381, |
| 78704 | /* VCVTTPD2QQZ128rrkz */ |
| 78705 | 17385, |
| 78706 | /* VCVTTPD2QQZ256rm */ |
| 78707 | 17388, |
| 78708 | /* VCVTTPD2QQZ256rmb */ |
| 78709 | 17390, |
| 78710 | /* VCVTTPD2QQZ256rmbk */ |
| 78711 | 17392, |
| 78712 | /* VCVTTPD2QQZ256rmbkz */ |
| 78713 | 17396, |
| 78714 | /* VCVTTPD2QQZ256rmk */ |
| 78715 | 17399, |
| 78716 | /* VCVTTPD2QQZ256rmkz */ |
| 78717 | 17403, |
| 78718 | /* VCVTTPD2QQZ256rr */ |
| 78719 | 17406, |
| 78720 | /* VCVTTPD2QQZ256rrk */ |
| 78721 | 17408, |
| 78722 | /* VCVTTPD2QQZ256rrkz */ |
| 78723 | 17412, |
| 78724 | /* VCVTTPD2QQZrm */ |
| 78725 | 17415, |
| 78726 | /* VCVTTPD2QQZrmb */ |
| 78727 | 17417, |
| 78728 | /* VCVTTPD2QQZrmbk */ |
| 78729 | 17419, |
| 78730 | /* VCVTTPD2QQZrmbkz */ |
| 78731 | 17423, |
| 78732 | /* VCVTTPD2QQZrmk */ |
| 78733 | 17426, |
| 78734 | /* VCVTTPD2QQZrmkz */ |
| 78735 | 17430, |
| 78736 | /* VCVTTPD2QQZrr */ |
| 78737 | 17433, |
| 78738 | /* VCVTTPD2QQZrrb */ |
| 78739 | 17435, |
| 78740 | /* VCVTTPD2QQZrrbk */ |
| 78741 | 17437, |
| 78742 | /* VCVTTPD2QQZrrbkz */ |
| 78743 | 17441, |
| 78744 | /* VCVTTPD2QQZrrk */ |
| 78745 | 17444, |
| 78746 | /* VCVTTPD2QQZrrkz */ |
| 78747 | 17448, |
| 78748 | /* VCVTTPD2UDQZ128rm */ |
| 78749 | 17451, |
| 78750 | /* VCVTTPD2UDQZ128rmb */ |
| 78751 | 17453, |
| 78752 | /* VCVTTPD2UDQZ128rmbk */ |
| 78753 | 17455, |
| 78754 | /* VCVTTPD2UDQZ128rmbkz */ |
| 78755 | 17459, |
| 78756 | /* VCVTTPD2UDQZ128rmk */ |
| 78757 | 17462, |
| 78758 | /* VCVTTPD2UDQZ128rmkz */ |
| 78759 | 17466, |
| 78760 | /* VCVTTPD2UDQZ128rr */ |
| 78761 | 17469, |
| 78762 | /* VCVTTPD2UDQZ128rrk */ |
| 78763 | 17471, |
| 78764 | /* VCVTTPD2UDQZ128rrkz */ |
| 78765 | 17475, |
| 78766 | /* VCVTTPD2UDQZ256rm */ |
| 78767 | 17478, |
| 78768 | /* VCVTTPD2UDQZ256rmb */ |
| 78769 | 17480, |
| 78770 | /* VCVTTPD2UDQZ256rmbk */ |
| 78771 | 17482, |
| 78772 | /* VCVTTPD2UDQZ256rmbkz */ |
| 78773 | 17486, |
| 78774 | /* VCVTTPD2UDQZ256rmk */ |
| 78775 | 17489, |
| 78776 | /* VCVTTPD2UDQZ256rmkz */ |
| 78777 | 17493, |
| 78778 | /* VCVTTPD2UDQZ256rr */ |
| 78779 | 17496, |
| 78780 | /* VCVTTPD2UDQZ256rrk */ |
| 78781 | 17498, |
| 78782 | /* VCVTTPD2UDQZ256rrkz */ |
| 78783 | 17502, |
| 78784 | /* VCVTTPD2UDQZrm */ |
| 78785 | 17505, |
| 78786 | /* VCVTTPD2UDQZrmb */ |
| 78787 | 17507, |
| 78788 | /* VCVTTPD2UDQZrmbk */ |
| 78789 | 17509, |
| 78790 | /* VCVTTPD2UDQZrmbkz */ |
| 78791 | 17513, |
| 78792 | /* VCVTTPD2UDQZrmk */ |
| 78793 | 17516, |
| 78794 | /* VCVTTPD2UDQZrmkz */ |
| 78795 | 17520, |
| 78796 | /* VCVTTPD2UDQZrr */ |
| 78797 | 17523, |
| 78798 | /* VCVTTPD2UDQZrrb */ |
| 78799 | 17525, |
| 78800 | /* VCVTTPD2UDQZrrbk */ |
| 78801 | 17527, |
| 78802 | /* VCVTTPD2UDQZrrbkz */ |
| 78803 | 17531, |
| 78804 | /* VCVTTPD2UDQZrrk */ |
| 78805 | 17534, |
| 78806 | /* VCVTTPD2UDQZrrkz */ |
| 78807 | 17538, |
| 78808 | /* VCVTTPD2UQQZ128rm */ |
| 78809 | 17541, |
| 78810 | /* VCVTTPD2UQQZ128rmb */ |
| 78811 | 17543, |
| 78812 | /* VCVTTPD2UQQZ128rmbk */ |
| 78813 | 17545, |
| 78814 | /* VCVTTPD2UQQZ128rmbkz */ |
| 78815 | 17549, |
| 78816 | /* VCVTTPD2UQQZ128rmk */ |
| 78817 | 17552, |
| 78818 | /* VCVTTPD2UQQZ128rmkz */ |
| 78819 | 17556, |
| 78820 | /* VCVTTPD2UQQZ128rr */ |
| 78821 | 17559, |
| 78822 | /* VCVTTPD2UQQZ128rrk */ |
| 78823 | 17561, |
| 78824 | /* VCVTTPD2UQQZ128rrkz */ |
| 78825 | 17565, |
| 78826 | /* VCVTTPD2UQQZ256rm */ |
| 78827 | 17568, |
| 78828 | /* VCVTTPD2UQQZ256rmb */ |
| 78829 | 17570, |
| 78830 | /* VCVTTPD2UQQZ256rmbk */ |
| 78831 | 17572, |
| 78832 | /* VCVTTPD2UQQZ256rmbkz */ |
| 78833 | 17576, |
| 78834 | /* VCVTTPD2UQQZ256rmk */ |
| 78835 | 17579, |
| 78836 | /* VCVTTPD2UQQZ256rmkz */ |
| 78837 | 17583, |
| 78838 | /* VCVTTPD2UQQZ256rr */ |
| 78839 | 17586, |
| 78840 | /* VCVTTPD2UQQZ256rrk */ |
| 78841 | 17588, |
| 78842 | /* VCVTTPD2UQQZ256rrkz */ |
| 78843 | 17592, |
| 78844 | /* VCVTTPD2UQQZrm */ |
| 78845 | 17595, |
| 78846 | /* VCVTTPD2UQQZrmb */ |
| 78847 | 17597, |
| 78848 | /* VCVTTPD2UQQZrmbk */ |
| 78849 | 17599, |
| 78850 | /* VCVTTPD2UQQZrmbkz */ |
| 78851 | 17603, |
| 78852 | /* VCVTTPD2UQQZrmk */ |
| 78853 | 17606, |
| 78854 | /* VCVTTPD2UQQZrmkz */ |
| 78855 | 17610, |
| 78856 | /* VCVTTPD2UQQZrr */ |
| 78857 | 17613, |
| 78858 | /* VCVTTPD2UQQZrrb */ |
| 78859 | 17615, |
| 78860 | /* VCVTTPD2UQQZrrbk */ |
| 78861 | 17617, |
| 78862 | /* VCVTTPD2UQQZrrbkz */ |
| 78863 | 17621, |
| 78864 | /* VCVTTPD2UQQZrrk */ |
| 78865 | 17624, |
| 78866 | /* VCVTTPD2UQQZrrkz */ |
| 78867 | 17628, |
| 78868 | /* VCVTTPH2DQZ128rm */ |
| 78869 | 17631, |
| 78870 | /* VCVTTPH2DQZ128rmb */ |
| 78871 | 17633, |
| 78872 | /* VCVTTPH2DQZ128rmbk */ |
| 78873 | 17635, |
| 78874 | /* VCVTTPH2DQZ128rmbkz */ |
| 78875 | 17639, |
| 78876 | /* VCVTTPH2DQZ128rmk */ |
| 78877 | 17642, |
| 78878 | /* VCVTTPH2DQZ128rmkz */ |
| 78879 | 17646, |
| 78880 | /* VCVTTPH2DQZ128rr */ |
| 78881 | 17649, |
| 78882 | /* VCVTTPH2DQZ128rrk */ |
| 78883 | 17651, |
| 78884 | /* VCVTTPH2DQZ128rrkz */ |
| 78885 | 17655, |
| 78886 | /* VCVTTPH2DQZ256rm */ |
| 78887 | 17658, |
| 78888 | /* VCVTTPH2DQZ256rmb */ |
| 78889 | 17660, |
| 78890 | /* VCVTTPH2DQZ256rmbk */ |
| 78891 | 17662, |
| 78892 | /* VCVTTPH2DQZ256rmbkz */ |
| 78893 | 17666, |
| 78894 | /* VCVTTPH2DQZ256rmk */ |
| 78895 | 17669, |
| 78896 | /* VCVTTPH2DQZ256rmkz */ |
| 78897 | 17673, |
| 78898 | /* VCVTTPH2DQZ256rr */ |
| 78899 | 17676, |
| 78900 | /* VCVTTPH2DQZ256rrk */ |
| 78901 | 17678, |
| 78902 | /* VCVTTPH2DQZ256rrkz */ |
| 78903 | 17682, |
| 78904 | /* VCVTTPH2DQZrm */ |
| 78905 | 17685, |
| 78906 | /* VCVTTPH2DQZrmb */ |
| 78907 | 17687, |
| 78908 | /* VCVTTPH2DQZrmbk */ |
| 78909 | 17689, |
| 78910 | /* VCVTTPH2DQZrmbkz */ |
| 78911 | 17693, |
| 78912 | /* VCVTTPH2DQZrmk */ |
| 78913 | 17696, |
| 78914 | /* VCVTTPH2DQZrmkz */ |
| 78915 | 17700, |
| 78916 | /* VCVTTPH2DQZrr */ |
| 78917 | 17703, |
| 78918 | /* VCVTTPH2DQZrrb */ |
| 78919 | 17705, |
| 78920 | /* VCVTTPH2DQZrrbk */ |
| 78921 | 17707, |
| 78922 | /* VCVTTPH2DQZrrbkz */ |
| 78923 | 17711, |
| 78924 | /* VCVTTPH2DQZrrk */ |
| 78925 | 17714, |
| 78926 | /* VCVTTPH2DQZrrkz */ |
| 78927 | 17718, |
| 78928 | /* VCVTTPH2QQZ128rm */ |
| 78929 | 17721, |
| 78930 | /* VCVTTPH2QQZ128rmb */ |
| 78931 | 17723, |
| 78932 | /* VCVTTPH2QQZ128rmbk */ |
| 78933 | 17725, |
| 78934 | /* VCVTTPH2QQZ128rmbkz */ |
| 78935 | 17729, |
| 78936 | /* VCVTTPH2QQZ128rmk */ |
| 78937 | 17732, |
| 78938 | /* VCVTTPH2QQZ128rmkz */ |
| 78939 | 17736, |
| 78940 | /* VCVTTPH2QQZ128rr */ |
| 78941 | 17739, |
| 78942 | /* VCVTTPH2QQZ128rrk */ |
| 78943 | 17741, |
| 78944 | /* VCVTTPH2QQZ128rrkz */ |
| 78945 | 17745, |
| 78946 | /* VCVTTPH2QQZ256rm */ |
| 78947 | 17748, |
| 78948 | /* VCVTTPH2QQZ256rmb */ |
| 78949 | 17750, |
| 78950 | /* VCVTTPH2QQZ256rmbk */ |
| 78951 | 17752, |
| 78952 | /* VCVTTPH2QQZ256rmbkz */ |
| 78953 | 17756, |
| 78954 | /* VCVTTPH2QQZ256rmk */ |
| 78955 | 17759, |
| 78956 | /* VCVTTPH2QQZ256rmkz */ |
| 78957 | 17763, |
| 78958 | /* VCVTTPH2QQZ256rr */ |
| 78959 | 17766, |
| 78960 | /* VCVTTPH2QQZ256rrk */ |
| 78961 | 17768, |
| 78962 | /* VCVTTPH2QQZ256rrkz */ |
| 78963 | 17772, |
| 78964 | /* VCVTTPH2QQZrm */ |
| 78965 | 17775, |
| 78966 | /* VCVTTPH2QQZrmb */ |
| 78967 | 17777, |
| 78968 | /* VCVTTPH2QQZrmbk */ |
| 78969 | 17779, |
| 78970 | /* VCVTTPH2QQZrmbkz */ |
| 78971 | 17783, |
| 78972 | /* VCVTTPH2QQZrmk */ |
| 78973 | 17786, |
| 78974 | /* VCVTTPH2QQZrmkz */ |
| 78975 | 17790, |
| 78976 | /* VCVTTPH2QQZrr */ |
| 78977 | 17793, |
| 78978 | /* VCVTTPH2QQZrrb */ |
| 78979 | 17795, |
| 78980 | /* VCVTTPH2QQZrrbk */ |
| 78981 | 17797, |
| 78982 | /* VCVTTPH2QQZrrbkz */ |
| 78983 | 17801, |
| 78984 | /* VCVTTPH2QQZrrk */ |
| 78985 | 17804, |
| 78986 | /* VCVTTPH2QQZrrkz */ |
| 78987 | 17808, |
| 78988 | /* VCVTTPH2UDQZ128rm */ |
| 78989 | 17811, |
| 78990 | /* VCVTTPH2UDQZ128rmb */ |
| 78991 | 17813, |
| 78992 | /* VCVTTPH2UDQZ128rmbk */ |
| 78993 | 17815, |
| 78994 | /* VCVTTPH2UDQZ128rmbkz */ |
| 78995 | 17819, |
| 78996 | /* VCVTTPH2UDQZ128rmk */ |
| 78997 | 17822, |
| 78998 | /* VCVTTPH2UDQZ128rmkz */ |
| 78999 | 17826, |
| 79000 | /* VCVTTPH2UDQZ128rr */ |
| 79001 | 17829, |
| 79002 | /* VCVTTPH2UDQZ128rrk */ |
| 79003 | 17831, |
| 79004 | /* VCVTTPH2UDQZ128rrkz */ |
| 79005 | 17835, |
| 79006 | /* VCVTTPH2UDQZ256rm */ |
| 79007 | 17838, |
| 79008 | /* VCVTTPH2UDQZ256rmb */ |
| 79009 | 17840, |
| 79010 | /* VCVTTPH2UDQZ256rmbk */ |
| 79011 | 17842, |
| 79012 | /* VCVTTPH2UDQZ256rmbkz */ |
| 79013 | 17846, |
| 79014 | /* VCVTTPH2UDQZ256rmk */ |
| 79015 | 17849, |
| 79016 | /* VCVTTPH2UDQZ256rmkz */ |
| 79017 | 17853, |
| 79018 | /* VCVTTPH2UDQZ256rr */ |
| 79019 | 17856, |
| 79020 | /* VCVTTPH2UDQZ256rrk */ |
| 79021 | 17858, |
| 79022 | /* VCVTTPH2UDQZ256rrkz */ |
| 79023 | 17862, |
| 79024 | /* VCVTTPH2UDQZrm */ |
| 79025 | 17865, |
| 79026 | /* VCVTTPH2UDQZrmb */ |
| 79027 | 17867, |
| 79028 | /* VCVTTPH2UDQZrmbk */ |
| 79029 | 17869, |
| 79030 | /* VCVTTPH2UDQZrmbkz */ |
| 79031 | 17873, |
| 79032 | /* VCVTTPH2UDQZrmk */ |
| 79033 | 17876, |
| 79034 | /* VCVTTPH2UDQZrmkz */ |
| 79035 | 17880, |
| 79036 | /* VCVTTPH2UDQZrr */ |
| 79037 | 17883, |
| 79038 | /* VCVTTPH2UDQZrrb */ |
| 79039 | 17885, |
| 79040 | /* VCVTTPH2UDQZrrbk */ |
| 79041 | 17887, |
| 79042 | /* VCVTTPH2UDQZrrbkz */ |
| 79043 | 17891, |
| 79044 | /* VCVTTPH2UDQZrrk */ |
| 79045 | 17894, |
| 79046 | /* VCVTTPH2UDQZrrkz */ |
| 79047 | 17898, |
| 79048 | /* VCVTTPH2UQQZ128rm */ |
| 79049 | 17901, |
| 79050 | /* VCVTTPH2UQQZ128rmb */ |
| 79051 | 17903, |
| 79052 | /* VCVTTPH2UQQZ128rmbk */ |
| 79053 | 17905, |
| 79054 | /* VCVTTPH2UQQZ128rmbkz */ |
| 79055 | 17909, |
| 79056 | /* VCVTTPH2UQQZ128rmk */ |
| 79057 | 17912, |
| 79058 | /* VCVTTPH2UQQZ128rmkz */ |
| 79059 | 17916, |
| 79060 | /* VCVTTPH2UQQZ128rr */ |
| 79061 | 17919, |
| 79062 | /* VCVTTPH2UQQZ128rrk */ |
| 79063 | 17921, |
| 79064 | /* VCVTTPH2UQQZ128rrkz */ |
| 79065 | 17925, |
| 79066 | /* VCVTTPH2UQQZ256rm */ |
| 79067 | 17928, |
| 79068 | /* VCVTTPH2UQQZ256rmb */ |
| 79069 | 17930, |
| 79070 | /* VCVTTPH2UQQZ256rmbk */ |
| 79071 | 17932, |
| 79072 | /* VCVTTPH2UQQZ256rmbkz */ |
| 79073 | 17936, |
| 79074 | /* VCVTTPH2UQQZ256rmk */ |
| 79075 | 17939, |
| 79076 | /* VCVTTPH2UQQZ256rmkz */ |
| 79077 | 17943, |
| 79078 | /* VCVTTPH2UQQZ256rr */ |
| 79079 | 17946, |
| 79080 | /* VCVTTPH2UQQZ256rrk */ |
| 79081 | 17948, |
| 79082 | /* VCVTTPH2UQQZ256rrkz */ |
| 79083 | 17952, |
| 79084 | /* VCVTTPH2UQQZrm */ |
| 79085 | 17955, |
| 79086 | /* VCVTTPH2UQQZrmb */ |
| 79087 | 17957, |
| 79088 | /* VCVTTPH2UQQZrmbk */ |
| 79089 | 17959, |
| 79090 | /* VCVTTPH2UQQZrmbkz */ |
| 79091 | 17963, |
| 79092 | /* VCVTTPH2UQQZrmk */ |
| 79093 | 17966, |
| 79094 | /* VCVTTPH2UQQZrmkz */ |
| 79095 | 17970, |
| 79096 | /* VCVTTPH2UQQZrr */ |
| 79097 | 17973, |
| 79098 | /* VCVTTPH2UQQZrrb */ |
| 79099 | 17975, |
| 79100 | /* VCVTTPH2UQQZrrbk */ |
| 79101 | 17977, |
| 79102 | /* VCVTTPH2UQQZrrbkz */ |
| 79103 | 17981, |
| 79104 | /* VCVTTPH2UQQZrrk */ |
| 79105 | 17984, |
| 79106 | /* VCVTTPH2UQQZrrkz */ |
| 79107 | 17988, |
| 79108 | /* VCVTTPH2UWZ128rm */ |
| 79109 | 17991, |
| 79110 | /* VCVTTPH2UWZ128rmb */ |
| 79111 | 17993, |
| 79112 | /* VCVTTPH2UWZ128rmbk */ |
| 79113 | 17995, |
| 79114 | /* VCVTTPH2UWZ128rmbkz */ |
| 79115 | 17999, |
| 79116 | /* VCVTTPH2UWZ128rmk */ |
| 79117 | 18002, |
| 79118 | /* VCVTTPH2UWZ128rmkz */ |
| 79119 | 18006, |
| 79120 | /* VCVTTPH2UWZ128rr */ |
| 79121 | 18009, |
| 79122 | /* VCVTTPH2UWZ128rrk */ |
| 79123 | 18011, |
| 79124 | /* VCVTTPH2UWZ128rrkz */ |
| 79125 | 18015, |
| 79126 | /* VCVTTPH2UWZ256rm */ |
| 79127 | 18018, |
| 79128 | /* VCVTTPH2UWZ256rmb */ |
| 79129 | 18020, |
| 79130 | /* VCVTTPH2UWZ256rmbk */ |
| 79131 | 18022, |
| 79132 | /* VCVTTPH2UWZ256rmbkz */ |
| 79133 | 18026, |
| 79134 | /* VCVTTPH2UWZ256rmk */ |
| 79135 | 18029, |
| 79136 | /* VCVTTPH2UWZ256rmkz */ |
| 79137 | 18033, |
| 79138 | /* VCVTTPH2UWZ256rr */ |
| 79139 | 18036, |
| 79140 | /* VCVTTPH2UWZ256rrk */ |
| 79141 | 18038, |
| 79142 | /* VCVTTPH2UWZ256rrkz */ |
| 79143 | 18042, |
| 79144 | /* VCVTTPH2UWZrm */ |
| 79145 | 18045, |
| 79146 | /* VCVTTPH2UWZrmb */ |
| 79147 | 18047, |
| 79148 | /* VCVTTPH2UWZrmbk */ |
| 79149 | 18049, |
| 79150 | /* VCVTTPH2UWZrmbkz */ |
| 79151 | 18053, |
| 79152 | /* VCVTTPH2UWZrmk */ |
| 79153 | 18056, |
| 79154 | /* VCVTTPH2UWZrmkz */ |
| 79155 | 18060, |
| 79156 | /* VCVTTPH2UWZrr */ |
| 79157 | 18063, |
| 79158 | /* VCVTTPH2UWZrrb */ |
| 79159 | 18065, |
| 79160 | /* VCVTTPH2UWZrrbk */ |
| 79161 | 18067, |
| 79162 | /* VCVTTPH2UWZrrbkz */ |
| 79163 | 18071, |
| 79164 | /* VCVTTPH2UWZrrk */ |
| 79165 | 18074, |
| 79166 | /* VCVTTPH2UWZrrkz */ |
| 79167 | 18078, |
| 79168 | /* VCVTTPH2WZ128rm */ |
| 79169 | 18081, |
| 79170 | /* VCVTTPH2WZ128rmb */ |
| 79171 | 18083, |
| 79172 | /* VCVTTPH2WZ128rmbk */ |
| 79173 | 18085, |
| 79174 | /* VCVTTPH2WZ128rmbkz */ |
| 79175 | 18089, |
| 79176 | /* VCVTTPH2WZ128rmk */ |
| 79177 | 18092, |
| 79178 | /* VCVTTPH2WZ128rmkz */ |
| 79179 | 18096, |
| 79180 | /* VCVTTPH2WZ128rr */ |
| 79181 | 18099, |
| 79182 | /* VCVTTPH2WZ128rrk */ |
| 79183 | 18101, |
| 79184 | /* VCVTTPH2WZ128rrkz */ |
| 79185 | 18105, |
| 79186 | /* VCVTTPH2WZ256rm */ |
| 79187 | 18108, |
| 79188 | /* VCVTTPH2WZ256rmb */ |
| 79189 | 18110, |
| 79190 | /* VCVTTPH2WZ256rmbk */ |
| 79191 | 18112, |
| 79192 | /* VCVTTPH2WZ256rmbkz */ |
| 79193 | 18116, |
| 79194 | /* VCVTTPH2WZ256rmk */ |
| 79195 | 18119, |
| 79196 | /* VCVTTPH2WZ256rmkz */ |
| 79197 | 18123, |
| 79198 | /* VCVTTPH2WZ256rr */ |
| 79199 | 18126, |
| 79200 | /* VCVTTPH2WZ256rrk */ |
| 79201 | 18128, |
| 79202 | /* VCVTTPH2WZ256rrkz */ |
| 79203 | 18132, |
| 79204 | /* VCVTTPH2WZrm */ |
| 79205 | 18135, |
| 79206 | /* VCVTTPH2WZrmb */ |
| 79207 | 18137, |
| 79208 | /* VCVTTPH2WZrmbk */ |
| 79209 | 18139, |
| 79210 | /* VCVTTPH2WZrmbkz */ |
| 79211 | 18143, |
| 79212 | /* VCVTTPH2WZrmk */ |
| 79213 | 18146, |
| 79214 | /* VCVTTPH2WZrmkz */ |
| 79215 | 18150, |
| 79216 | /* VCVTTPH2WZrr */ |
| 79217 | 18153, |
| 79218 | /* VCVTTPH2WZrrb */ |
| 79219 | 18155, |
| 79220 | /* VCVTTPH2WZrrbk */ |
| 79221 | 18157, |
| 79222 | /* VCVTTPH2WZrrbkz */ |
| 79223 | 18161, |
| 79224 | /* VCVTTPH2WZrrk */ |
| 79225 | 18164, |
| 79226 | /* VCVTTPH2WZrrkz */ |
| 79227 | 18168, |
| 79228 | /* VCVTTPS2DQYrm */ |
| 79229 | 18171, |
| 79230 | /* VCVTTPS2DQYrr */ |
| 79231 | 18173, |
| 79232 | /* VCVTTPS2DQZ128rm */ |
| 79233 | 18175, |
| 79234 | /* VCVTTPS2DQZ128rmb */ |
| 79235 | 18177, |
| 79236 | /* VCVTTPS2DQZ128rmbk */ |
| 79237 | 18179, |
| 79238 | /* VCVTTPS2DQZ128rmbkz */ |
| 79239 | 18183, |
| 79240 | /* VCVTTPS2DQZ128rmk */ |
| 79241 | 18186, |
| 79242 | /* VCVTTPS2DQZ128rmkz */ |
| 79243 | 18190, |
| 79244 | /* VCVTTPS2DQZ128rr */ |
| 79245 | 18193, |
| 79246 | /* VCVTTPS2DQZ128rrk */ |
| 79247 | 18195, |
| 79248 | /* VCVTTPS2DQZ128rrkz */ |
| 79249 | 18199, |
| 79250 | /* VCVTTPS2DQZ256rm */ |
| 79251 | 18202, |
| 79252 | /* VCVTTPS2DQZ256rmb */ |
| 79253 | 18204, |
| 79254 | /* VCVTTPS2DQZ256rmbk */ |
| 79255 | 18206, |
| 79256 | /* VCVTTPS2DQZ256rmbkz */ |
| 79257 | 18210, |
| 79258 | /* VCVTTPS2DQZ256rmk */ |
| 79259 | 18213, |
| 79260 | /* VCVTTPS2DQZ256rmkz */ |
| 79261 | 18217, |
| 79262 | /* VCVTTPS2DQZ256rr */ |
| 79263 | 18220, |
| 79264 | /* VCVTTPS2DQZ256rrk */ |
| 79265 | 18222, |
| 79266 | /* VCVTTPS2DQZ256rrkz */ |
| 79267 | 18226, |
| 79268 | /* VCVTTPS2DQZrm */ |
| 79269 | 18229, |
| 79270 | /* VCVTTPS2DQZrmb */ |
| 79271 | 18231, |
| 79272 | /* VCVTTPS2DQZrmbk */ |
| 79273 | 18233, |
| 79274 | /* VCVTTPS2DQZrmbkz */ |
| 79275 | 18237, |
| 79276 | /* VCVTTPS2DQZrmk */ |
| 79277 | 18240, |
| 79278 | /* VCVTTPS2DQZrmkz */ |
| 79279 | 18244, |
| 79280 | /* VCVTTPS2DQZrr */ |
| 79281 | 18247, |
| 79282 | /* VCVTTPS2DQZrrb */ |
| 79283 | 18249, |
| 79284 | /* VCVTTPS2DQZrrbk */ |
| 79285 | 18251, |
| 79286 | /* VCVTTPS2DQZrrbkz */ |
| 79287 | 18255, |
| 79288 | /* VCVTTPS2DQZrrk */ |
| 79289 | 18258, |
| 79290 | /* VCVTTPS2DQZrrkz */ |
| 79291 | 18262, |
| 79292 | /* VCVTTPS2DQrm */ |
| 79293 | 18265, |
| 79294 | /* VCVTTPS2DQrr */ |
| 79295 | 18267, |
| 79296 | /* VCVTTPS2QQZ128rm */ |
| 79297 | 18269, |
| 79298 | /* VCVTTPS2QQZ128rmb */ |
| 79299 | 18271, |
| 79300 | /* VCVTTPS2QQZ128rmbk */ |
| 79301 | 18273, |
| 79302 | /* VCVTTPS2QQZ128rmbkz */ |
| 79303 | 18277, |
| 79304 | /* VCVTTPS2QQZ128rmk */ |
| 79305 | 18280, |
| 79306 | /* VCVTTPS2QQZ128rmkz */ |
| 79307 | 18284, |
| 79308 | /* VCVTTPS2QQZ128rr */ |
| 79309 | 18287, |
| 79310 | /* VCVTTPS2QQZ128rrk */ |
| 79311 | 18289, |
| 79312 | /* VCVTTPS2QQZ128rrkz */ |
| 79313 | 18293, |
| 79314 | /* VCVTTPS2QQZ256rm */ |
| 79315 | 18296, |
| 79316 | /* VCVTTPS2QQZ256rmb */ |
| 79317 | 18298, |
| 79318 | /* VCVTTPS2QQZ256rmbk */ |
| 79319 | 18300, |
| 79320 | /* VCVTTPS2QQZ256rmbkz */ |
| 79321 | 18304, |
| 79322 | /* VCVTTPS2QQZ256rmk */ |
| 79323 | 18307, |
| 79324 | /* VCVTTPS2QQZ256rmkz */ |
| 79325 | 18311, |
| 79326 | /* VCVTTPS2QQZ256rr */ |
| 79327 | 18314, |
| 79328 | /* VCVTTPS2QQZ256rrk */ |
| 79329 | 18316, |
| 79330 | /* VCVTTPS2QQZ256rrkz */ |
| 79331 | 18320, |
| 79332 | /* VCVTTPS2QQZrm */ |
| 79333 | 18323, |
| 79334 | /* VCVTTPS2QQZrmb */ |
| 79335 | 18325, |
| 79336 | /* VCVTTPS2QQZrmbk */ |
| 79337 | 18327, |
| 79338 | /* VCVTTPS2QQZrmbkz */ |
| 79339 | 18331, |
| 79340 | /* VCVTTPS2QQZrmk */ |
| 79341 | 18334, |
| 79342 | /* VCVTTPS2QQZrmkz */ |
| 79343 | 18338, |
| 79344 | /* VCVTTPS2QQZrr */ |
| 79345 | 18341, |
| 79346 | /* VCVTTPS2QQZrrb */ |
| 79347 | 18343, |
| 79348 | /* VCVTTPS2QQZrrbk */ |
| 79349 | 18345, |
| 79350 | /* VCVTTPS2QQZrrbkz */ |
| 79351 | 18349, |
| 79352 | /* VCVTTPS2QQZrrk */ |
| 79353 | 18352, |
| 79354 | /* VCVTTPS2QQZrrkz */ |
| 79355 | 18356, |
| 79356 | /* VCVTTPS2UDQZ128rm */ |
| 79357 | 18359, |
| 79358 | /* VCVTTPS2UDQZ128rmb */ |
| 79359 | 18361, |
| 79360 | /* VCVTTPS2UDQZ128rmbk */ |
| 79361 | 18363, |
| 79362 | /* VCVTTPS2UDQZ128rmbkz */ |
| 79363 | 18367, |
| 79364 | /* VCVTTPS2UDQZ128rmk */ |
| 79365 | 18370, |
| 79366 | /* VCVTTPS2UDQZ128rmkz */ |
| 79367 | 18374, |
| 79368 | /* VCVTTPS2UDQZ128rr */ |
| 79369 | 18377, |
| 79370 | /* VCVTTPS2UDQZ128rrk */ |
| 79371 | 18379, |
| 79372 | /* VCVTTPS2UDQZ128rrkz */ |
| 79373 | 18383, |
| 79374 | /* VCVTTPS2UDQZ256rm */ |
| 79375 | 18386, |
| 79376 | /* VCVTTPS2UDQZ256rmb */ |
| 79377 | 18388, |
| 79378 | /* VCVTTPS2UDQZ256rmbk */ |
| 79379 | 18390, |
| 79380 | /* VCVTTPS2UDQZ256rmbkz */ |
| 79381 | 18394, |
| 79382 | /* VCVTTPS2UDQZ256rmk */ |
| 79383 | 18397, |
| 79384 | /* VCVTTPS2UDQZ256rmkz */ |
| 79385 | 18401, |
| 79386 | /* VCVTTPS2UDQZ256rr */ |
| 79387 | 18404, |
| 79388 | /* VCVTTPS2UDQZ256rrk */ |
| 79389 | 18406, |
| 79390 | /* VCVTTPS2UDQZ256rrkz */ |
| 79391 | 18410, |
| 79392 | /* VCVTTPS2UDQZrm */ |
| 79393 | 18413, |
| 79394 | /* VCVTTPS2UDQZrmb */ |
| 79395 | 18415, |
| 79396 | /* VCVTTPS2UDQZrmbk */ |
| 79397 | 18417, |
| 79398 | /* VCVTTPS2UDQZrmbkz */ |
| 79399 | 18421, |
| 79400 | /* VCVTTPS2UDQZrmk */ |
| 79401 | 18424, |
| 79402 | /* VCVTTPS2UDQZrmkz */ |
| 79403 | 18428, |
| 79404 | /* VCVTTPS2UDQZrr */ |
| 79405 | 18431, |
| 79406 | /* VCVTTPS2UDQZrrb */ |
| 79407 | 18433, |
| 79408 | /* VCVTTPS2UDQZrrbk */ |
| 79409 | 18435, |
| 79410 | /* VCVTTPS2UDQZrrbkz */ |
| 79411 | 18439, |
| 79412 | /* VCVTTPS2UDQZrrk */ |
| 79413 | 18442, |
| 79414 | /* VCVTTPS2UDQZrrkz */ |
| 79415 | 18446, |
| 79416 | /* VCVTTPS2UQQZ128rm */ |
| 79417 | 18449, |
| 79418 | /* VCVTTPS2UQQZ128rmb */ |
| 79419 | 18451, |
| 79420 | /* VCVTTPS2UQQZ128rmbk */ |
| 79421 | 18453, |
| 79422 | /* VCVTTPS2UQQZ128rmbkz */ |
| 79423 | 18457, |
| 79424 | /* VCVTTPS2UQQZ128rmk */ |
| 79425 | 18460, |
| 79426 | /* VCVTTPS2UQQZ128rmkz */ |
| 79427 | 18464, |
| 79428 | /* VCVTTPS2UQQZ128rr */ |
| 79429 | 18467, |
| 79430 | /* VCVTTPS2UQQZ128rrk */ |
| 79431 | 18469, |
| 79432 | /* VCVTTPS2UQQZ128rrkz */ |
| 79433 | 18473, |
| 79434 | /* VCVTTPS2UQQZ256rm */ |
| 79435 | 18476, |
| 79436 | /* VCVTTPS2UQQZ256rmb */ |
| 79437 | 18478, |
| 79438 | /* VCVTTPS2UQQZ256rmbk */ |
| 79439 | 18480, |
| 79440 | /* VCVTTPS2UQQZ256rmbkz */ |
| 79441 | 18484, |
| 79442 | /* VCVTTPS2UQQZ256rmk */ |
| 79443 | 18487, |
| 79444 | /* VCVTTPS2UQQZ256rmkz */ |
| 79445 | 18491, |
| 79446 | /* VCVTTPS2UQQZ256rr */ |
| 79447 | 18494, |
| 79448 | /* VCVTTPS2UQQZ256rrk */ |
| 79449 | 18496, |
| 79450 | /* VCVTTPS2UQQZ256rrkz */ |
| 79451 | 18500, |
| 79452 | /* VCVTTPS2UQQZrm */ |
| 79453 | 18503, |
| 79454 | /* VCVTTPS2UQQZrmb */ |
| 79455 | 18505, |
| 79456 | /* VCVTTPS2UQQZrmbk */ |
| 79457 | 18507, |
| 79458 | /* VCVTTPS2UQQZrmbkz */ |
| 79459 | 18511, |
| 79460 | /* VCVTTPS2UQQZrmk */ |
| 79461 | 18514, |
| 79462 | /* VCVTTPS2UQQZrmkz */ |
| 79463 | 18518, |
| 79464 | /* VCVTTPS2UQQZrr */ |
| 79465 | 18521, |
| 79466 | /* VCVTTPS2UQQZrrb */ |
| 79467 | 18523, |
| 79468 | /* VCVTTPS2UQQZrrbk */ |
| 79469 | 18525, |
| 79470 | /* VCVTTPS2UQQZrrbkz */ |
| 79471 | 18529, |
| 79472 | /* VCVTTPS2UQQZrrk */ |
| 79473 | 18532, |
| 79474 | /* VCVTTPS2UQQZrrkz */ |
| 79475 | 18536, |
| 79476 | /* VCVTTSD2SI64Zrm */ |
| 79477 | 18539, |
| 79478 | /* VCVTTSD2SI64Zrm_Int */ |
| 79479 | 18541, |
| 79480 | /* VCVTTSD2SI64Zrr */ |
| 79481 | 18543, |
| 79482 | /* VCVTTSD2SI64Zrr_Int */ |
| 79483 | 18545, |
| 79484 | /* VCVTTSD2SI64Zrrb_Int */ |
| 79485 | 18547, |
| 79486 | /* VCVTTSD2SI64rm */ |
| 79487 | 18549, |
| 79488 | /* VCVTTSD2SI64rm_Int */ |
| 79489 | 18551, |
| 79490 | /* VCVTTSD2SI64rr */ |
| 79491 | 18553, |
| 79492 | /* VCVTTSD2SI64rr_Int */ |
| 79493 | 18555, |
| 79494 | /* VCVTTSD2SIZrm */ |
| 79495 | 18557, |
| 79496 | /* VCVTTSD2SIZrm_Int */ |
| 79497 | 18559, |
| 79498 | /* VCVTTSD2SIZrr */ |
| 79499 | 18561, |
| 79500 | /* VCVTTSD2SIZrr_Int */ |
| 79501 | 18563, |
| 79502 | /* VCVTTSD2SIZrrb_Int */ |
| 79503 | 18565, |
| 79504 | /* VCVTTSD2SIrm */ |
| 79505 | 18567, |
| 79506 | /* VCVTTSD2SIrm_Int */ |
| 79507 | 18569, |
| 79508 | /* VCVTTSD2SIrr */ |
| 79509 | 18571, |
| 79510 | /* VCVTTSD2SIrr_Int */ |
| 79511 | 18573, |
| 79512 | /* VCVTTSD2USI64Zrm */ |
| 79513 | 18575, |
| 79514 | /* VCVTTSD2USI64Zrm_Int */ |
| 79515 | 18577, |
| 79516 | /* VCVTTSD2USI64Zrr */ |
| 79517 | 18579, |
| 79518 | /* VCVTTSD2USI64Zrr_Int */ |
| 79519 | 18581, |
| 79520 | /* VCVTTSD2USI64Zrrb_Int */ |
| 79521 | 18583, |
| 79522 | /* VCVTTSD2USIZrm */ |
| 79523 | 18585, |
| 79524 | /* VCVTTSD2USIZrm_Int */ |
| 79525 | 18587, |
| 79526 | /* VCVTTSD2USIZrr */ |
| 79527 | 18589, |
| 79528 | /* VCVTTSD2USIZrr_Int */ |
| 79529 | 18591, |
| 79530 | /* VCVTTSD2USIZrrb_Int */ |
| 79531 | 18593, |
| 79532 | /* VCVTTSH2SI64Zrm */ |
| 79533 | 18595, |
| 79534 | /* VCVTTSH2SI64Zrm_Int */ |
| 79535 | 18597, |
| 79536 | /* VCVTTSH2SI64Zrr */ |
| 79537 | 18599, |
| 79538 | /* VCVTTSH2SI64Zrr_Int */ |
| 79539 | 18601, |
| 79540 | /* VCVTTSH2SI64Zrrb_Int */ |
| 79541 | 18603, |
| 79542 | /* VCVTTSH2SIZrm */ |
| 79543 | 18605, |
| 79544 | /* VCVTTSH2SIZrm_Int */ |
| 79545 | 18607, |
| 79546 | /* VCVTTSH2SIZrr */ |
| 79547 | 18609, |
| 79548 | /* VCVTTSH2SIZrr_Int */ |
| 79549 | 18611, |
| 79550 | /* VCVTTSH2SIZrrb_Int */ |
| 79551 | 18613, |
| 79552 | /* VCVTTSH2USI64Zrm */ |
| 79553 | 18615, |
| 79554 | /* VCVTTSH2USI64Zrm_Int */ |
| 79555 | 18617, |
| 79556 | /* VCVTTSH2USI64Zrr */ |
| 79557 | 18619, |
| 79558 | /* VCVTTSH2USI64Zrr_Int */ |
| 79559 | 18621, |
| 79560 | /* VCVTTSH2USI64Zrrb_Int */ |
| 79561 | 18623, |
| 79562 | /* VCVTTSH2USIZrm */ |
| 79563 | 18625, |
| 79564 | /* VCVTTSH2USIZrm_Int */ |
| 79565 | 18627, |
| 79566 | /* VCVTTSH2USIZrr */ |
| 79567 | 18629, |
| 79568 | /* VCVTTSH2USIZrr_Int */ |
| 79569 | 18631, |
| 79570 | /* VCVTTSH2USIZrrb_Int */ |
| 79571 | 18633, |
| 79572 | /* VCVTTSS2SI64Zrm */ |
| 79573 | 18635, |
| 79574 | /* VCVTTSS2SI64Zrm_Int */ |
| 79575 | 18637, |
| 79576 | /* VCVTTSS2SI64Zrr */ |
| 79577 | 18639, |
| 79578 | /* VCVTTSS2SI64Zrr_Int */ |
| 79579 | 18641, |
| 79580 | /* VCVTTSS2SI64Zrrb_Int */ |
| 79581 | 18643, |
| 79582 | /* VCVTTSS2SI64rm */ |
| 79583 | 18645, |
| 79584 | /* VCVTTSS2SI64rm_Int */ |
| 79585 | 18647, |
| 79586 | /* VCVTTSS2SI64rr */ |
| 79587 | 18649, |
| 79588 | /* VCVTTSS2SI64rr_Int */ |
| 79589 | 18651, |
| 79590 | /* VCVTTSS2SIZrm */ |
| 79591 | 18653, |
| 79592 | /* VCVTTSS2SIZrm_Int */ |
| 79593 | 18655, |
| 79594 | /* VCVTTSS2SIZrr */ |
| 79595 | 18657, |
| 79596 | /* VCVTTSS2SIZrr_Int */ |
| 79597 | 18659, |
| 79598 | /* VCVTTSS2SIZrrb_Int */ |
| 79599 | 18661, |
| 79600 | /* VCVTTSS2SIrm */ |
| 79601 | 18663, |
| 79602 | /* VCVTTSS2SIrm_Int */ |
| 79603 | 18665, |
| 79604 | /* VCVTTSS2SIrr */ |
| 79605 | 18667, |
| 79606 | /* VCVTTSS2SIrr_Int */ |
| 79607 | 18669, |
| 79608 | /* VCVTTSS2USI64Zrm */ |
| 79609 | 18671, |
| 79610 | /* VCVTTSS2USI64Zrm_Int */ |
| 79611 | 18673, |
| 79612 | /* VCVTTSS2USI64Zrr */ |
| 79613 | 18675, |
| 79614 | /* VCVTTSS2USI64Zrr_Int */ |
| 79615 | 18677, |
| 79616 | /* VCVTTSS2USI64Zrrb_Int */ |
| 79617 | 18679, |
| 79618 | /* VCVTTSS2USIZrm */ |
| 79619 | 18681, |
| 79620 | /* VCVTTSS2USIZrm_Int */ |
| 79621 | 18683, |
| 79622 | /* VCVTTSS2USIZrr */ |
| 79623 | 18685, |
| 79624 | /* VCVTTSS2USIZrr_Int */ |
| 79625 | 18687, |
| 79626 | /* VCVTTSS2USIZrrb_Int */ |
| 79627 | 18689, |
| 79628 | /* VCVTUDQ2PDZ128rm */ |
| 79629 | 18691, |
| 79630 | /* VCVTUDQ2PDZ128rmb */ |
| 79631 | 18693, |
| 79632 | /* VCVTUDQ2PDZ128rmbk */ |
| 79633 | 18695, |
| 79634 | /* VCVTUDQ2PDZ128rmbkz */ |
| 79635 | 18699, |
| 79636 | /* VCVTUDQ2PDZ128rmk */ |
| 79637 | 18702, |
| 79638 | /* VCVTUDQ2PDZ128rmkz */ |
| 79639 | 18706, |
| 79640 | /* VCVTUDQ2PDZ128rr */ |
| 79641 | 18709, |
| 79642 | /* VCVTUDQ2PDZ128rrk */ |
| 79643 | 18711, |
| 79644 | /* VCVTUDQ2PDZ128rrkz */ |
| 79645 | 18715, |
| 79646 | /* VCVTUDQ2PDZ256rm */ |
| 79647 | 18718, |
| 79648 | /* VCVTUDQ2PDZ256rmb */ |
| 79649 | 18720, |
| 79650 | /* VCVTUDQ2PDZ256rmbk */ |
| 79651 | 18722, |
| 79652 | /* VCVTUDQ2PDZ256rmbkz */ |
| 79653 | 18726, |
| 79654 | /* VCVTUDQ2PDZ256rmk */ |
| 79655 | 18729, |
| 79656 | /* VCVTUDQ2PDZ256rmkz */ |
| 79657 | 18733, |
| 79658 | /* VCVTUDQ2PDZ256rr */ |
| 79659 | 18736, |
| 79660 | /* VCVTUDQ2PDZ256rrk */ |
| 79661 | 18738, |
| 79662 | /* VCVTUDQ2PDZ256rrkz */ |
| 79663 | 18742, |
| 79664 | /* VCVTUDQ2PDZrm */ |
| 79665 | 18745, |
| 79666 | /* VCVTUDQ2PDZrmb */ |
| 79667 | 18747, |
| 79668 | /* VCVTUDQ2PDZrmbk */ |
| 79669 | 18749, |
| 79670 | /* VCVTUDQ2PDZrmbkz */ |
| 79671 | 18753, |
| 79672 | /* VCVTUDQ2PDZrmk */ |
| 79673 | 18756, |
| 79674 | /* VCVTUDQ2PDZrmkz */ |
| 79675 | 18760, |
| 79676 | /* VCVTUDQ2PDZrr */ |
| 79677 | 18763, |
| 79678 | /* VCVTUDQ2PDZrrk */ |
| 79679 | 18765, |
| 79680 | /* VCVTUDQ2PDZrrkz */ |
| 79681 | 18769, |
| 79682 | /* VCVTUDQ2PHZ128rm */ |
| 79683 | 18772, |
| 79684 | /* VCVTUDQ2PHZ128rmb */ |
| 79685 | 18774, |
| 79686 | /* VCVTUDQ2PHZ128rmbk */ |
| 79687 | 18776, |
| 79688 | /* VCVTUDQ2PHZ128rmbkz */ |
| 79689 | 18780, |
| 79690 | /* VCVTUDQ2PHZ128rmk */ |
| 79691 | 18783, |
| 79692 | /* VCVTUDQ2PHZ128rmkz */ |
| 79693 | 18787, |
| 79694 | /* VCVTUDQ2PHZ128rr */ |
| 79695 | 18790, |
| 79696 | /* VCVTUDQ2PHZ128rrk */ |
| 79697 | 18792, |
| 79698 | /* VCVTUDQ2PHZ128rrkz */ |
| 79699 | 18796, |
| 79700 | /* VCVTUDQ2PHZ256rm */ |
| 79701 | 18799, |
| 79702 | /* VCVTUDQ2PHZ256rmb */ |
| 79703 | 18801, |
| 79704 | /* VCVTUDQ2PHZ256rmbk */ |
| 79705 | 18803, |
| 79706 | /* VCVTUDQ2PHZ256rmbkz */ |
| 79707 | 18807, |
| 79708 | /* VCVTUDQ2PHZ256rmk */ |
| 79709 | 18810, |
| 79710 | /* VCVTUDQ2PHZ256rmkz */ |
| 79711 | 18814, |
| 79712 | /* VCVTUDQ2PHZ256rr */ |
| 79713 | 18817, |
| 79714 | /* VCVTUDQ2PHZ256rrk */ |
| 79715 | 18819, |
| 79716 | /* VCVTUDQ2PHZ256rrkz */ |
| 79717 | 18823, |
| 79718 | /* VCVTUDQ2PHZrm */ |
| 79719 | 18826, |
| 79720 | /* VCVTUDQ2PHZrmb */ |
| 79721 | 18828, |
| 79722 | /* VCVTUDQ2PHZrmbk */ |
| 79723 | 18830, |
| 79724 | /* VCVTUDQ2PHZrmbkz */ |
| 79725 | 18834, |
| 79726 | /* VCVTUDQ2PHZrmk */ |
| 79727 | 18837, |
| 79728 | /* VCVTUDQ2PHZrmkz */ |
| 79729 | 18841, |
| 79730 | /* VCVTUDQ2PHZrr */ |
| 79731 | 18844, |
| 79732 | /* VCVTUDQ2PHZrrb */ |
| 79733 | 18846, |
| 79734 | /* VCVTUDQ2PHZrrbk */ |
| 79735 | 18849, |
| 79736 | /* VCVTUDQ2PHZrrbkz */ |
| 79737 | 18854, |
| 79738 | /* VCVTUDQ2PHZrrk */ |
| 79739 | 18858, |
| 79740 | /* VCVTUDQ2PHZrrkz */ |
| 79741 | 18862, |
| 79742 | /* VCVTUDQ2PSZ128rm */ |
| 79743 | 18865, |
| 79744 | /* VCVTUDQ2PSZ128rmb */ |
| 79745 | 18867, |
| 79746 | /* VCVTUDQ2PSZ128rmbk */ |
| 79747 | 18869, |
| 79748 | /* VCVTUDQ2PSZ128rmbkz */ |
| 79749 | 18873, |
| 79750 | /* VCVTUDQ2PSZ128rmk */ |
| 79751 | 18876, |
| 79752 | /* VCVTUDQ2PSZ128rmkz */ |
| 79753 | 18880, |
| 79754 | /* VCVTUDQ2PSZ128rr */ |
| 79755 | 18883, |
| 79756 | /* VCVTUDQ2PSZ128rrk */ |
| 79757 | 18885, |
| 79758 | /* VCVTUDQ2PSZ128rrkz */ |
| 79759 | 18889, |
| 79760 | /* VCVTUDQ2PSZ256rm */ |
| 79761 | 18892, |
| 79762 | /* VCVTUDQ2PSZ256rmb */ |
| 79763 | 18894, |
| 79764 | /* VCVTUDQ2PSZ256rmbk */ |
| 79765 | 18896, |
| 79766 | /* VCVTUDQ2PSZ256rmbkz */ |
| 79767 | 18900, |
| 79768 | /* VCVTUDQ2PSZ256rmk */ |
| 79769 | 18903, |
| 79770 | /* VCVTUDQ2PSZ256rmkz */ |
| 79771 | 18907, |
| 79772 | /* VCVTUDQ2PSZ256rr */ |
| 79773 | 18910, |
| 79774 | /* VCVTUDQ2PSZ256rrk */ |
| 79775 | 18912, |
| 79776 | /* VCVTUDQ2PSZ256rrkz */ |
| 79777 | 18916, |
| 79778 | /* VCVTUDQ2PSZrm */ |
| 79779 | 18919, |
| 79780 | /* VCVTUDQ2PSZrmb */ |
| 79781 | 18921, |
| 79782 | /* VCVTUDQ2PSZrmbk */ |
| 79783 | 18923, |
| 79784 | /* VCVTUDQ2PSZrmbkz */ |
| 79785 | 18927, |
| 79786 | /* VCVTUDQ2PSZrmk */ |
| 79787 | 18930, |
| 79788 | /* VCVTUDQ2PSZrmkz */ |
| 79789 | 18934, |
| 79790 | /* VCVTUDQ2PSZrr */ |
| 79791 | 18937, |
| 79792 | /* VCVTUDQ2PSZrrb */ |
| 79793 | 18939, |
| 79794 | /* VCVTUDQ2PSZrrbk */ |
| 79795 | 18942, |
| 79796 | /* VCVTUDQ2PSZrrbkz */ |
| 79797 | 18947, |
| 79798 | /* VCVTUDQ2PSZrrk */ |
| 79799 | 18951, |
| 79800 | /* VCVTUDQ2PSZrrkz */ |
| 79801 | 18955, |
| 79802 | /* VCVTUQQ2PDZ128rm */ |
| 79803 | 18958, |
| 79804 | /* VCVTUQQ2PDZ128rmb */ |
| 79805 | 18960, |
| 79806 | /* VCVTUQQ2PDZ128rmbk */ |
| 79807 | 18962, |
| 79808 | /* VCVTUQQ2PDZ128rmbkz */ |
| 79809 | 18966, |
| 79810 | /* VCVTUQQ2PDZ128rmk */ |
| 79811 | 18969, |
| 79812 | /* VCVTUQQ2PDZ128rmkz */ |
| 79813 | 18973, |
| 79814 | /* VCVTUQQ2PDZ128rr */ |
| 79815 | 18976, |
| 79816 | /* VCVTUQQ2PDZ128rrk */ |
| 79817 | 18978, |
| 79818 | /* VCVTUQQ2PDZ128rrkz */ |
| 79819 | 18982, |
| 79820 | /* VCVTUQQ2PDZ256rm */ |
| 79821 | 18985, |
| 79822 | /* VCVTUQQ2PDZ256rmb */ |
| 79823 | 18987, |
| 79824 | /* VCVTUQQ2PDZ256rmbk */ |
| 79825 | 18989, |
| 79826 | /* VCVTUQQ2PDZ256rmbkz */ |
| 79827 | 18993, |
| 79828 | /* VCVTUQQ2PDZ256rmk */ |
| 79829 | 18996, |
| 79830 | /* VCVTUQQ2PDZ256rmkz */ |
| 79831 | 19000, |
| 79832 | /* VCVTUQQ2PDZ256rr */ |
| 79833 | 19003, |
| 79834 | /* VCVTUQQ2PDZ256rrk */ |
| 79835 | 19005, |
| 79836 | /* VCVTUQQ2PDZ256rrkz */ |
| 79837 | 19009, |
| 79838 | /* VCVTUQQ2PDZrm */ |
| 79839 | 19012, |
| 79840 | /* VCVTUQQ2PDZrmb */ |
| 79841 | 19014, |
| 79842 | /* VCVTUQQ2PDZrmbk */ |
| 79843 | 19016, |
| 79844 | /* VCVTUQQ2PDZrmbkz */ |
| 79845 | 19020, |
| 79846 | /* VCVTUQQ2PDZrmk */ |
| 79847 | 19023, |
| 79848 | /* VCVTUQQ2PDZrmkz */ |
| 79849 | 19027, |
| 79850 | /* VCVTUQQ2PDZrr */ |
| 79851 | 19030, |
| 79852 | /* VCVTUQQ2PDZrrb */ |
| 79853 | 19032, |
| 79854 | /* VCVTUQQ2PDZrrbk */ |
| 79855 | 19035, |
| 79856 | /* VCVTUQQ2PDZrrbkz */ |
| 79857 | 19040, |
| 79858 | /* VCVTUQQ2PDZrrk */ |
| 79859 | 19044, |
| 79860 | /* VCVTUQQ2PDZrrkz */ |
| 79861 | 19048, |
| 79862 | /* VCVTUQQ2PHZ128rm */ |
| 79863 | 19051, |
| 79864 | /* VCVTUQQ2PHZ128rmb */ |
| 79865 | 19053, |
| 79866 | /* VCVTUQQ2PHZ128rmbk */ |
| 79867 | 19055, |
| 79868 | /* VCVTUQQ2PHZ128rmbkz */ |
| 79869 | 19059, |
| 79870 | /* VCVTUQQ2PHZ128rmk */ |
| 79871 | 19062, |
| 79872 | /* VCVTUQQ2PHZ128rmkz */ |
| 79873 | 19066, |
| 79874 | /* VCVTUQQ2PHZ128rr */ |
| 79875 | 19069, |
| 79876 | /* VCVTUQQ2PHZ128rrk */ |
| 79877 | 19071, |
| 79878 | /* VCVTUQQ2PHZ128rrkz */ |
| 79879 | 19075, |
| 79880 | /* VCVTUQQ2PHZ256rm */ |
| 79881 | 19078, |
| 79882 | /* VCVTUQQ2PHZ256rmb */ |
| 79883 | 19080, |
| 79884 | /* VCVTUQQ2PHZ256rmbk */ |
| 79885 | 19082, |
| 79886 | /* VCVTUQQ2PHZ256rmbkz */ |
| 79887 | 19086, |
| 79888 | /* VCVTUQQ2PHZ256rmk */ |
| 79889 | 19089, |
| 79890 | /* VCVTUQQ2PHZ256rmkz */ |
| 79891 | 19093, |
| 79892 | /* VCVTUQQ2PHZ256rr */ |
| 79893 | 19096, |
| 79894 | /* VCVTUQQ2PHZ256rrk */ |
| 79895 | 19098, |
| 79896 | /* VCVTUQQ2PHZ256rrkz */ |
| 79897 | 19102, |
| 79898 | /* VCVTUQQ2PHZrm */ |
| 79899 | 19105, |
| 79900 | /* VCVTUQQ2PHZrmb */ |
| 79901 | 19107, |
| 79902 | /* VCVTUQQ2PHZrmbk */ |
| 79903 | 19109, |
| 79904 | /* VCVTUQQ2PHZrmbkz */ |
| 79905 | 19113, |
| 79906 | /* VCVTUQQ2PHZrmk */ |
| 79907 | 19116, |
| 79908 | /* VCVTUQQ2PHZrmkz */ |
| 79909 | 19120, |
| 79910 | /* VCVTUQQ2PHZrr */ |
| 79911 | 19123, |
| 79912 | /* VCVTUQQ2PHZrrb */ |
| 79913 | 19125, |
| 79914 | /* VCVTUQQ2PHZrrbk */ |
| 79915 | 19128, |
| 79916 | /* VCVTUQQ2PHZrrbkz */ |
| 79917 | 19133, |
| 79918 | /* VCVTUQQ2PHZrrk */ |
| 79919 | 19137, |
| 79920 | /* VCVTUQQ2PHZrrkz */ |
| 79921 | 19141, |
| 79922 | /* VCVTUQQ2PSZ128rm */ |
| 79923 | 19144, |
| 79924 | /* VCVTUQQ2PSZ128rmb */ |
| 79925 | 19146, |
| 79926 | /* VCVTUQQ2PSZ128rmbk */ |
| 79927 | 19148, |
| 79928 | /* VCVTUQQ2PSZ128rmbkz */ |
| 79929 | 19152, |
| 79930 | /* VCVTUQQ2PSZ128rmk */ |
| 79931 | 19155, |
| 79932 | /* VCVTUQQ2PSZ128rmkz */ |
| 79933 | 19159, |
| 79934 | /* VCVTUQQ2PSZ128rr */ |
| 79935 | 19162, |
| 79936 | /* VCVTUQQ2PSZ128rrk */ |
| 79937 | 19164, |
| 79938 | /* VCVTUQQ2PSZ128rrkz */ |
| 79939 | 19168, |
| 79940 | /* VCVTUQQ2PSZ256rm */ |
| 79941 | 19171, |
| 79942 | /* VCVTUQQ2PSZ256rmb */ |
| 79943 | 19173, |
| 79944 | /* VCVTUQQ2PSZ256rmbk */ |
| 79945 | 19175, |
| 79946 | /* VCVTUQQ2PSZ256rmbkz */ |
| 79947 | 19179, |
| 79948 | /* VCVTUQQ2PSZ256rmk */ |
| 79949 | 19182, |
| 79950 | /* VCVTUQQ2PSZ256rmkz */ |
| 79951 | 19186, |
| 79952 | /* VCVTUQQ2PSZ256rr */ |
| 79953 | 19189, |
| 79954 | /* VCVTUQQ2PSZ256rrk */ |
| 79955 | 19191, |
| 79956 | /* VCVTUQQ2PSZ256rrkz */ |
| 79957 | 19195, |
| 79958 | /* VCVTUQQ2PSZrm */ |
| 79959 | 19198, |
| 79960 | /* VCVTUQQ2PSZrmb */ |
| 79961 | 19200, |
| 79962 | /* VCVTUQQ2PSZrmbk */ |
| 79963 | 19202, |
| 79964 | /* VCVTUQQ2PSZrmbkz */ |
| 79965 | 19206, |
| 79966 | /* VCVTUQQ2PSZrmk */ |
| 79967 | 19209, |
| 79968 | /* VCVTUQQ2PSZrmkz */ |
| 79969 | 19213, |
| 79970 | /* VCVTUQQ2PSZrr */ |
| 79971 | 19216, |
| 79972 | /* VCVTUQQ2PSZrrb */ |
| 79973 | 19218, |
| 79974 | /* VCVTUQQ2PSZrrbk */ |
| 79975 | 19221, |
| 79976 | /* VCVTUQQ2PSZrrbkz */ |
| 79977 | 19226, |
| 79978 | /* VCVTUQQ2PSZrrk */ |
| 79979 | 19230, |
| 79980 | /* VCVTUQQ2PSZrrkz */ |
| 79981 | 19234, |
| 79982 | /* VCVTUSI2SDZrm */ |
| 79983 | 19237, |
| 79984 | /* VCVTUSI2SDZrm_Int */ |
| 79985 | 19240, |
| 79986 | /* VCVTUSI2SDZrr */ |
| 79987 | 19243, |
| 79988 | /* VCVTUSI2SDZrr_Int */ |
| 79989 | 19246, |
| 79990 | /* VCVTUSI2SHZrm */ |
| 79991 | 19249, |
| 79992 | /* VCVTUSI2SHZrm_Int */ |
| 79993 | 19252, |
| 79994 | /* VCVTUSI2SHZrr */ |
| 79995 | 19255, |
| 79996 | /* VCVTUSI2SHZrr_Int */ |
| 79997 | 19258, |
| 79998 | /* VCVTUSI2SHZrrb_Int */ |
| 79999 | 19261, |
| 80000 | /* VCVTUSI2SSZrm */ |
| 80001 | 19265, |
| 80002 | /* VCVTUSI2SSZrm_Int */ |
| 80003 | 19268, |
| 80004 | /* VCVTUSI2SSZrr */ |
| 80005 | 19271, |
| 80006 | /* VCVTUSI2SSZrr_Int */ |
| 80007 | 19274, |
| 80008 | /* VCVTUSI2SSZrrb_Int */ |
| 80009 | 19277, |
| 80010 | /* VCVTUSI642SDZrm */ |
| 80011 | 19281, |
| 80012 | /* VCVTUSI642SDZrm_Int */ |
| 80013 | 19284, |
| 80014 | /* VCVTUSI642SDZrr */ |
| 80015 | 19287, |
| 80016 | /* VCVTUSI642SDZrr_Int */ |
| 80017 | 19290, |
| 80018 | /* VCVTUSI642SDZrrb_Int */ |
| 80019 | 19293, |
| 80020 | /* VCVTUSI642SHZrm */ |
| 80021 | 19297, |
| 80022 | /* VCVTUSI642SHZrm_Int */ |
| 80023 | 19300, |
| 80024 | /* VCVTUSI642SHZrr */ |
| 80025 | 19303, |
| 80026 | /* VCVTUSI642SHZrr_Int */ |
| 80027 | 19306, |
| 80028 | /* VCVTUSI642SHZrrb_Int */ |
| 80029 | 19309, |
| 80030 | /* VCVTUSI642SSZrm */ |
| 80031 | 19313, |
| 80032 | /* VCVTUSI642SSZrm_Int */ |
| 80033 | 19316, |
| 80034 | /* VCVTUSI642SSZrr */ |
| 80035 | 19319, |
| 80036 | /* VCVTUSI642SSZrr_Int */ |
| 80037 | 19322, |
| 80038 | /* VCVTUSI642SSZrrb_Int */ |
| 80039 | 19325, |
| 80040 | /* VCVTUW2PHZ128rm */ |
| 80041 | 19329, |
| 80042 | /* VCVTUW2PHZ128rmb */ |
| 80043 | 19331, |
| 80044 | /* VCVTUW2PHZ128rmbk */ |
| 80045 | 19333, |
| 80046 | /* VCVTUW2PHZ128rmbkz */ |
| 80047 | 19337, |
| 80048 | /* VCVTUW2PHZ128rmk */ |
| 80049 | 19340, |
| 80050 | /* VCVTUW2PHZ128rmkz */ |
| 80051 | 19344, |
| 80052 | /* VCVTUW2PHZ128rr */ |
| 80053 | 19347, |
| 80054 | /* VCVTUW2PHZ128rrk */ |
| 80055 | 19349, |
| 80056 | /* VCVTUW2PHZ128rrkz */ |
| 80057 | 19353, |
| 80058 | /* VCVTUW2PHZ256rm */ |
| 80059 | 19356, |
| 80060 | /* VCVTUW2PHZ256rmb */ |
| 80061 | 19358, |
| 80062 | /* VCVTUW2PHZ256rmbk */ |
| 80063 | 19360, |
| 80064 | /* VCVTUW2PHZ256rmbkz */ |
| 80065 | 19364, |
| 80066 | /* VCVTUW2PHZ256rmk */ |
| 80067 | 19367, |
| 80068 | /* VCVTUW2PHZ256rmkz */ |
| 80069 | 19371, |
| 80070 | /* VCVTUW2PHZ256rr */ |
| 80071 | 19374, |
| 80072 | /* VCVTUW2PHZ256rrk */ |
| 80073 | 19376, |
| 80074 | /* VCVTUW2PHZ256rrkz */ |
| 80075 | 19380, |
| 80076 | /* VCVTUW2PHZrm */ |
| 80077 | 19383, |
| 80078 | /* VCVTUW2PHZrmb */ |
| 80079 | 19385, |
| 80080 | /* VCVTUW2PHZrmbk */ |
| 80081 | 19387, |
| 80082 | /* VCVTUW2PHZrmbkz */ |
| 80083 | 19391, |
| 80084 | /* VCVTUW2PHZrmk */ |
| 80085 | 19394, |
| 80086 | /* VCVTUW2PHZrmkz */ |
| 80087 | 19398, |
| 80088 | /* VCVTUW2PHZrr */ |
| 80089 | 19401, |
| 80090 | /* VCVTUW2PHZrrb */ |
| 80091 | 19403, |
| 80092 | /* VCVTUW2PHZrrbk */ |
| 80093 | 19406, |
| 80094 | /* VCVTUW2PHZrrbkz */ |
| 80095 | 19411, |
| 80096 | /* VCVTUW2PHZrrk */ |
| 80097 | 19415, |
| 80098 | /* VCVTUW2PHZrrkz */ |
| 80099 | 19419, |
| 80100 | /* VCVTW2PHZ128rm */ |
| 80101 | 19422, |
| 80102 | /* VCVTW2PHZ128rmb */ |
| 80103 | 19424, |
| 80104 | /* VCVTW2PHZ128rmbk */ |
| 80105 | 19426, |
| 80106 | /* VCVTW2PHZ128rmbkz */ |
| 80107 | 19430, |
| 80108 | /* VCVTW2PHZ128rmk */ |
| 80109 | 19433, |
| 80110 | /* VCVTW2PHZ128rmkz */ |
| 80111 | 19437, |
| 80112 | /* VCVTW2PHZ128rr */ |
| 80113 | 19440, |
| 80114 | /* VCVTW2PHZ128rrk */ |
| 80115 | 19442, |
| 80116 | /* VCVTW2PHZ128rrkz */ |
| 80117 | 19446, |
| 80118 | /* VCVTW2PHZ256rm */ |
| 80119 | 19449, |
| 80120 | /* VCVTW2PHZ256rmb */ |
| 80121 | 19451, |
| 80122 | /* VCVTW2PHZ256rmbk */ |
| 80123 | 19453, |
| 80124 | /* VCVTW2PHZ256rmbkz */ |
| 80125 | 19457, |
| 80126 | /* VCVTW2PHZ256rmk */ |
| 80127 | 19460, |
| 80128 | /* VCVTW2PHZ256rmkz */ |
| 80129 | 19464, |
| 80130 | /* VCVTW2PHZ256rr */ |
| 80131 | 19467, |
| 80132 | /* VCVTW2PHZ256rrk */ |
| 80133 | 19469, |
| 80134 | /* VCVTW2PHZ256rrkz */ |
| 80135 | 19473, |
| 80136 | /* VCVTW2PHZrm */ |
| 80137 | 19476, |
| 80138 | /* VCVTW2PHZrmb */ |
| 80139 | 19478, |
| 80140 | /* VCVTW2PHZrmbk */ |
| 80141 | 19480, |
| 80142 | /* VCVTW2PHZrmbkz */ |
| 80143 | 19484, |
| 80144 | /* VCVTW2PHZrmk */ |
| 80145 | 19487, |
| 80146 | /* VCVTW2PHZrmkz */ |
| 80147 | 19491, |
| 80148 | /* VCVTW2PHZrr */ |
| 80149 | 19494, |
| 80150 | /* VCVTW2PHZrrb */ |
| 80151 | 19496, |
| 80152 | /* VCVTW2PHZrrbk */ |
| 80153 | 19499, |
| 80154 | /* VCVTW2PHZrrbkz */ |
| 80155 | 19504, |
| 80156 | /* VCVTW2PHZrrk */ |
| 80157 | 19508, |
| 80158 | /* VCVTW2PHZrrkz */ |
| 80159 | 19512, |
| 80160 | /* VDBPSADBWZ128rmi */ |
| 80161 | 19515, |
| 80162 | /* VDBPSADBWZ128rmik */ |
| 80163 | 19519, |
| 80164 | /* VDBPSADBWZ128rmikz */ |
| 80165 | 19525, |
| 80166 | /* VDBPSADBWZ128rri */ |
| 80167 | 19530, |
| 80168 | /* VDBPSADBWZ128rrik */ |
| 80169 | 19534, |
| 80170 | /* VDBPSADBWZ128rrikz */ |
| 80171 | 19540, |
| 80172 | /* VDBPSADBWZ256rmi */ |
| 80173 | 19545, |
| 80174 | /* VDBPSADBWZ256rmik */ |
| 80175 | 19549, |
| 80176 | /* VDBPSADBWZ256rmikz */ |
| 80177 | 19555, |
| 80178 | /* VDBPSADBWZ256rri */ |
| 80179 | 19560, |
| 80180 | /* VDBPSADBWZ256rrik */ |
| 80181 | 19564, |
| 80182 | /* VDBPSADBWZ256rrikz */ |
| 80183 | 19570, |
| 80184 | /* VDBPSADBWZrmi */ |
| 80185 | 19575, |
| 80186 | /* VDBPSADBWZrmik */ |
| 80187 | 19579, |
| 80188 | /* VDBPSADBWZrmikz */ |
| 80189 | 19585, |
| 80190 | /* VDBPSADBWZrri */ |
| 80191 | 19590, |
| 80192 | /* VDBPSADBWZrrik */ |
| 80193 | 19594, |
| 80194 | /* VDBPSADBWZrrikz */ |
| 80195 | 19600, |
| 80196 | /* VDIVPDYrm */ |
| 80197 | 19605, |
| 80198 | /* VDIVPDYrr */ |
| 80199 | 19608, |
| 80200 | /* VDIVPDZ128rm */ |
| 80201 | 19611, |
| 80202 | /* VDIVPDZ128rmb */ |
| 80203 | 19614, |
| 80204 | /* VDIVPDZ128rmbk */ |
| 80205 | 19617, |
| 80206 | /* VDIVPDZ128rmbkz */ |
| 80207 | 19622, |
| 80208 | /* VDIVPDZ128rmk */ |
| 80209 | 19626, |
| 80210 | /* VDIVPDZ128rmkz */ |
| 80211 | 19631, |
| 80212 | /* VDIVPDZ128rr */ |
| 80213 | 19635, |
| 80214 | /* VDIVPDZ128rrk */ |
| 80215 | 19638, |
| 80216 | /* VDIVPDZ128rrkz */ |
| 80217 | 19643, |
| 80218 | /* VDIVPDZ256rm */ |
| 80219 | 19647, |
| 80220 | /* VDIVPDZ256rmb */ |
| 80221 | 19650, |
| 80222 | /* VDIVPDZ256rmbk */ |
| 80223 | 19653, |
| 80224 | /* VDIVPDZ256rmbkz */ |
| 80225 | 19658, |
| 80226 | /* VDIVPDZ256rmk */ |
| 80227 | 19662, |
| 80228 | /* VDIVPDZ256rmkz */ |
| 80229 | 19667, |
| 80230 | /* VDIVPDZ256rr */ |
| 80231 | 19671, |
| 80232 | /* VDIVPDZ256rrk */ |
| 80233 | 19674, |
| 80234 | /* VDIVPDZ256rrkz */ |
| 80235 | 19679, |
| 80236 | /* VDIVPDZrm */ |
| 80237 | 19683, |
| 80238 | /* VDIVPDZrmb */ |
| 80239 | 19686, |
| 80240 | /* VDIVPDZrmbk */ |
| 80241 | 19689, |
| 80242 | /* VDIVPDZrmbkz */ |
| 80243 | 19694, |
| 80244 | /* VDIVPDZrmk */ |
| 80245 | 19698, |
| 80246 | /* VDIVPDZrmkz */ |
| 80247 | 19703, |
| 80248 | /* VDIVPDZrr */ |
| 80249 | 19707, |
| 80250 | /* VDIVPDZrrb */ |
| 80251 | 19710, |
| 80252 | /* VDIVPDZrrbk */ |
| 80253 | 19714, |
| 80254 | /* VDIVPDZrrbkz */ |
| 80255 | 19720, |
| 80256 | /* VDIVPDZrrk */ |
| 80257 | 19725, |
| 80258 | /* VDIVPDZrrkz */ |
| 80259 | 19730, |
| 80260 | /* VDIVPDrm */ |
| 80261 | 19734, |
| 80262 | /* VDIVPDrr */ |
| 80263 | 19737, |
| 80264 | /* VDIVPHZ128rm */ |
| 80265 | 19740, |
| 80266 | /* VDIVPHZ128rmb */ |
| 80267 | 19743, |
| 80268 | /* VDIVPHZ128rmbk */ |
| 80269 | 19746, |
| 80270 | /* VDIVPHZ128rmbkz */ |
| 80271 | 19751, |
| 80272 | /* VDIVPHZ128rmk */ |
| 80273 | 19755, |
| 80274 | /* VDIVPHZ128rmkz */ |
| 80275 | 19760, |
| 80276 | /* VDIVPHZ128rr */ |
| 80277 | 19764, |
| 80278 | /* VDIVPHZ128rrk */ |
| 80279 | 19767, |
| 80280 | /* VDIVPHZ128rrkz */ |
| 80281 | 19772, |
| 80282 | /* VDIVPHZ256rm */ |
| 80283 | 19776, |
| 80284 | /* VDIVPHZ256rmb */ |
| 80285 | 19779, |
| 80286 | /* VDIVPHZ256rmbk */ |
| 80287 | 19782, |
| 80288 | /* VDIVPHZ256rmbkz */ |
| 80289 | 19787, |
| 80290 | /* VDIVPHZ256rmk */ |
| 80291 | 19791, |
| 80292 | /* VDIVPHZ256rmkz */ |
| 80293 | 19796, |
| 80294 | /* VDIVPHZ256rr */ |
| 80295 | 19800, |
| 80296 | /* VDIVPHZ256rrk */ |
| 80297 | 19803, |
| 80298 | /* VDIVPHZ256rrkz */ |
| 80299 | 19808, |
| 80300 | /* VDIVPHZrm */ |
| 80301 | 19812, |
| 80302 | /* VDIVPHZrmb */ |
| 80303 | 19815, |
| 80304 | /* VDIVPHZrmbk */ |
| 80305 | 19818, |
| 80306 | /* VDIVPHZrmbkz */ |
| 80307 | 19823, |
| 80308 | /* VDIVPHZrmk */ |
| 80309 | 19827, |
| 80310 | /* VDIVPHZrmkz */ |
| 80311 | 19832, |
| 80312 | /* VDIVPHZrr */ |
| 80313 | 19836, |
| 80314 | /* VDIVPHZrrb */ |
| 80315 | 19839, |
| 80316 | /* VDIVPHZrrbk */ |
| 80317 | 19843, |
| 80318 | /* VDIVPHZrrbkz */ |
| 80319 | 19849, |
| 80320 | /* VDIVPHZrrk */ |
| 80321 | 19854, |
| 80322 | /* VDIVPHZrrkz */ |
| 80323 | 19859, |
| 80324 | /* VDIVPSYrm */ |
| 80325 | 19863, |
| 80326 | /* VDIVPSYrr */ |
| 80327 | 19866, |
| 80328 | /* VDIVPSZ128rm */ |
| 80329 | 19869, |
| 80330 | /* VDIVPSZ128rmb */ |
| 80331 | 19872, |
| 80332 | /* VDIVPSZ128rmbk */ |
| 80333 | 19875, |
| 80334 | /* VDIVPSZ128rmbkz */ |
| 80335 | 19880, |
| 80336 | /* VDIVPSZ128rmk */ |
| 80337 | 19884, |
| 80338 | /* VDIVPSZ128rmkz */ |
| 80339 | 19889, |
| 80340 | /* VDIVPSZ128rr */ |
| 80341 | 19893, |
| 80342 | /* VDIVPSZ128rrk */ |
| 80343 | 19896, |
| 80344 | /* VDIVPSZ128rrkz */ |
| 80345 | 19901, |
| 80346 | /* VDIVPSZ256rm */ |
| 80347 | 19905, |
| 80348 | /* VDIVPSZ256rmb */ |
| 80349 | 19908, |
| 80350 | /* VDIVPSZ256rmbk */ |
| 80351 | 19911, |
| 80352 | /* VDIVPSZ256rmbkz */ |
| 80353 | 19916, |
| 80354 | /* VDIVPSZ256rmk */ |
| 80355 | 19920, |
| 80356 | /* VDIVPSZ256rmkz */ |
| 80357 | 19925, |
| 80358 | /* VDIVPSZ256rr */ |
| 80359 | 19929, |
| 80360 | /* VDIVPSZ256rrk */ |
| 80361 | 19932, |
| 80362 | /* VDIVPSZ256rrkz */ |
| 80363 | 19937, |
| 80364 | /* VDIVPSZrm */ |
| 80365 | 19941, |
| 80366 | /* VDIVPSZrmb */ |
| 80367 | 19944, |
| 80368 | /* VDIVPSZrmbk */ |
| 80369 | 19947, |
| 80370 | /* VDIVPSZrmbkz */ |
| 80371 | 19952, |
| 80372 | /* VDIVPSZrmk */ |
| 80373 | 19956, |
| 80374 | /* VDIVPSZrmkz */ |
| 80375 | 19961, |
| 80376 | /* VDIVPSZrr */ |
| 80377 | 19965, |
| 80378 | /* VDIVPSZrrb */ |
| 80379 | 19968, |
| 80380 | /* VDIVPSZrrbk */ |
| 80381 | 19972, |
| 80382 | /* VDIVPSZrrbkz */ |
| 80383 | 19978, |
| 80384 | /* VDIVPSZrrk */ |
| 80385 | 19983, |
| 80386 | /* VDIVPSZrrkz */ |
| 80387 | 19988, |
| 80388 | /* VDIVPSrm */ |
| 80389 | 19992, |
| 80390 | /* VDIVPSrr */ |
| 80391 | 19995, |
| 80392 | /* VDIVSDZrm */ |
| 80393 | 19998, |
| 80394 | /* VDIVSDZrm_Int */ |
| 80395 | 20001, |
| 80396 | /* VDIVSDZrm_Intk */ |
| 80397 | 20004, |
| 80398 | /* VDIVSDZrm_Intkz */ |
| 80399 | 20009, |
| 80400 | /* VDIVSDZrr */ |
| 80401 | 20013, |
| 80402 | /* VDIVSDZrr_Int */ |
| 80403 | 20016, |
| 80404 | /* VDIVSDZrr_Intk */ |
| 80405 | 20019, |
| 80406 | /* VDIVSDZrr_Intkz */ |
| 80407 | 20024, |
| 80408 | /* VDIVSDZrrb_Int */ |
| 80409 | 20028, |
| 80410 | /* VDIVSDZrrb_Intk */ |
| 80411 | 20032, |
| 80412 | /* VDIVSDZrrb_Intkz */ |
| 80413 | 20038, |
| 80414 | /* VDIVSDrm */ |
| 80415 | 20043, |
| 80416 | /* VDIVSDrm_Int */ |
| 80417 | 20046, |
| 80418 | /* VDIVSDrr */ |
| 80419 | 20049, |
| 80420 | /* VDIVSDrr_Int */ |
| 80421 | 20052, |
| 80422 | /* VDIVSHZrm */ |
| 80423 | 20055, |
| 80424 | /* VDIVSHZrm_Int */ |
| 80425 | 20058, |
| 80426 | /* VDIVSHZrm_Intk */ |
| 80427 | 20061, |
| 80428 | /* VDIVSHZrm_Intkz */ |
| 80429 | 20066, |
| 80430 | /* VDIVSHZrr */ |
| 80431 | 20070, |
| 80432 | /* VDIVSHZrr_Int */ |
| 80433 | 20073, |
| 80434 | /* VDIVSHZrr_Intk */ |
| 80435 | 20076, |
| 80436 | /* VDIVSHZrr_Intkz */ |
| 80437 | 20081, |
| 80438 | /* VDIVSHZrrb_Int */ |
| 80439 | 20085, |
| 80440 | /* VDIVSHZrrb_Intk */ |
| 80441 | 20089, |
| 80442 | /* VDIVSHZrrb_Intkz */ |
| 80443 | 20095, |
| 80444 | /* VDIVSSZrm */ |
| 80445 | 20100, |
| 80446 | /* VDIVSSZrm_Int */ |
| 80447 | 20103, |
| 80448 | /* VDIVSSZrm_Intk */ |
| 80449 | 20106, |
| 80450 | /* VDIVSSZrm_Intkz */ |
| 80451 | 20111, |
| 80452 | /* VDIVSSZrr */ |
| 80453 | 20115, |
| 80454 | /* VDIVSSZrr_Int */ |
| 80455 | 20118, |
| 80456 | /* VDIVSSZrr_Intk */ |
| 80457 | 20121, |
| 80458 | /* VDIVSSZrr_Intkz */ |
| 80459 | 20126, |
| 80460 | /* VDIVSSZrrb_Int */ |
| 80461 | 20130, |
| 80462 | /* VDIVSSZrrb_Intk */ |
| 80463 | 20134, |
| 80464 | /* VDIVSSZrrb_Intkz */ |
| 80465 | 20140, |
| 80466 | /* VDIVSSrm */ |
| 80467 | 20145, |
| 80468 | /* VDIVSSrm_Int */ |
| 80469 | 20148, |
| 80470 | /* VDIVSSrr */ |
| 80471 | 20151, |
| 80472 | /* VDIVSSrr_Int */ |
| 80473 | 20154, |
| 80474 | /* VDPBF16PSZ128m */ |
| 80475 | 20157, |
| 80476 | /* VDPBF16PSZ128mb */ |
| 80477 | 20161, |
| 80478 | /* VDPBF16PSZ128mbk */ |
| 80479 | 20165, |
| 80480 | /* VDPBF16PSZ128mbkz */ |
| 80481 | 20170, |
| 80482 | /* VDPBF16PSZ128mk */ |
| 80483 | 20175, |
| 80484 | /* VDPBF16PSZ128mkz */ |
| 80485 | 20180, |
| 80486 | /* VDPBF16PSZ128r */ |
| 80487 | 20185, |
| 80488 | /* VDPBF16PSZ128rk */ |
| 80489 | 20189, |
| 80490 | /* VDPBF16PSZ128rkz */ |
| 80491 | 20194, |
| 80492 | /* VDPBF16PSZ256m */ |
| 80493 | 20199, |
| 80494 | /* VDPBF16PSZ256mb */ |
| 80495 | 20203, |
| 80496 | /* VDPBF16PSZ256mbk */ |
| 80497 | 20207, |
| 80498 | /* VDPBF16PSZ256mbkz */ |
| 80499 | 20212, |
| 80500 | /* VDPBF16PSZ256mk */ |
| 80501 | 20217, |
| 80502 | /* VDPBF16PSZ256mkz */ |
| 80503 | 20222, |
| 80504 | /* VDPBF16PSZ256r */ |
| 80505 | 20227, |
| 80506 | /* VDPBF16PSZ256rk */ |
| 80507 | 20231, |
| 80508 | /* VDPBF16PSZ256rkz */ |
| 80509 | 20236, |
| 80510 | /* VDPBF16PSZm */ |
| 80511 | 20241, |
| 80512 | /* VDPBF16PSZmb */ |
| 80513 | 20245, |
| 80514 | /* VDPBF16PSZmbk */ |
| 80515 | 20249, |
| 80516 | /* VDPBF16PSZmbkz */ |
| 80517 | 20254, |
| 80518 | /* VDPBF16PSZmk */ |
| 80519 | 20259, |
| 80520 | /* VDPBF16PSZmkz */ |
| 80521 | 20264, |
| 80522 | /* VDPBF16PSZr */ |
| 80523 | 20269, |
| 80524 | /* VDPBF16PSZrk */ |
| 80525 | 20273, |
| 80526 | /* VDPBF16PSZrkz */ |
| 80527 | 20278, |
| 80528 | /* VDPPDrmi */ |
| 80529 | 20283, |
| 80530 | /* VDPPDrri */ |
| 80531 | 20287, |
| 80532 | /* VDPPSYrmi */ |
| 80533 | 20291, |
| 80534 | /* VDPPSYrri */ |
| 80535 | 20295, |
| 80536 | /* VDPPSrmi */ |
| 80537 | 20299, |
| 80538 | /* VDPPSrri */ |
| 80539 | 20303, |
| 80540 | /* VERRm */ |
| 80541 | 20307, |
| 80542 | /* VERRr */ |
| 80543 | 20308, |
| 80544 | /* VERWm */ |
| 80545 | 20309, |
| 80546 | /* VERWr */ |
| 80547 | 20310, |
| 80548 | /* VEXP2PDZm */ |
| 80549 | 20311, |
| 80550 | /* VEXP2PDZmb */ |
| 80551 | 20313, |
| 80552 | /* VEXP2PDZmbk */ |
| 80553 | 20315, |
| 80554 | /* VEXP2PDZmbkz */ |
| 80555 | 20319, |
| 80556 | /* VEXP2PDZmk */ |
| 80557 | 20322, |
| 80558 | /* VEXP2PDZmkz */ |
| 80559 | 20326, |
| 80560 | /* VEXP2PDZr */ |
| 80561 | 20329, |
| 80562 | /* VEXP2PDZrb */ |
| 80563 | 20331, |
| 80564 | /* VEXP2PDZrbk */ |
| 80565 | 20333, |
| 80566 | /* VEXP2PDZrbkz */ |
| 80567 | 20337, |
| 80568 | /* VEXP2PDZrk */ |
| 80569 | 20340, |
| 80570 | /* VEXP2PDZrkz */ |
| 80571 | 20344, |
| 80572 | /* VEXP2PSZm */ |
| 80573 | 20347, |
| 80574 | /* VEXP2PSZmb */ |
| 80575 | 20349, |
| 80576 | /* VEXP2PSZmbk */ |
| 80577 | 20351, |
| 80578 | /* VEXP2PSZmbkz */ |
| 80579 | 20355, |
| 80580 | /* VEXP2PSZmk */ |
| 80581 | 20358, |
| 80582 | /* VEXP2PSZmkz */ |
| 80583 | 20362, |
| 80584 | /* VEXP2PSZr */ |
| 80585 | 20365, |
| 80586 | /* VEXP2PSZrb */ |
| 80587 | 20367, |
| 80588 | /* VEXP2PSZrbk */ |
| 80589 | 20369, |
| 80590 | /* VEXP2PSZrbkz */ |
| 80591 | 20373, |
| 80592 | /* VEXP2PSZrk */ |
| 80593 | 20376, |
| 80594 | /* VEXP2PSZrkz */ |
| 80595 | 20380, |
| 80596 | /* VEXPANDPDZ128rm */ |
| 80597 | 20383, |
| 80598 | /* VEXPANDPDZ128rmk */ |
| 80599 | 20385, |
| 80600 | /* VEXPANDPDZ128rmkz */ |
| 80601 | 20389, |
| 80602 | /* VEXPANDPDZ128rr */ |
| 80603 | 20392, |
| 80604 | /* VEXPANDPDZ128rrk */ |
| 80605 | 20394, |
| 80606 | /* VEXPANDPDZ128rrkz */ |
| 80607 | 20398, |
| 80608 | /* VEXPANDPDZ256rm */ |
| 80609 | 20401, |
| 80610 | /* VEXPANDPDZ256rmk */ |
| 80611 | 20403, |
| 80612 | /* VEXPANDPDZ256rmkz */ |
| 80613 | 20407, |
| 80614 | /* VEXPANDPDZ256rr */ |
| 80615 | 20410, |
| 80616 | /* VEXPANDPDZ256rrk */ |
| 80617 | 20412, |
| 80618 | /* VEXPANDPDZ256rrkz */ |
| 80619 | 20416, |
| 80620 | /* VEXPANDPDZrm */ |
| 80621 | 20419, |
| 80622 | /* VEXPANDPDZrmk */ |
| 80623 | 20421, |
| 80624 | /* VEXPANDPDZrmkz */ |
| 80625 | 20425, |
| 80626 | /* VEXPANDPDZrr */ |
| 80627 | 20428, |
| 80628 | /* VEXPANDPDZrrk */ |
| 80629 | 20430, |
| 80630 | /* VEXPANDPDZrrkz */ |
| 80631 | 20434, |
| 80632 | /* VEXPANDPSZ128rm */ |
| 80633 | 20437, |
| 80634 | /* VEXPANDPSZ128rmk */ |
| 80635 | 20439, |
| 80636 | /* VEXPANDPSZ128rmkz */ |
| 80637 | 20443, |
| 80638 | /* VEXPANDPSZ128rr */ |
| 80639 | 20446, |
| 80640 | /* VEXPANDPSZ128rrk */ |
| 80641 | 20448, |
| 80642 | /* VEXPANDPSZ128rrkz */ |
| 80643 | 20452, |
| 80644 | /* VEXPANDPSZ256rm */ |
| 80645 | 20455, |
| 80646 | /* VEXPANDPSZ256rmk */ |
| 80647 | 20457, |
| 80648 | /* VEXPANDPSZ256rmkz */ |
| 80649 | 20461, |
| 80650 | /* VEXPANDPSZ256rr */ |
| 80651 | 20464, |
| 80652 | /* VEXPANDPSZ256rrk */ |
| 80653 | 20466, |
| 80654 | /* VEXPANDPSZ256rrkz */ |
| 80655 | 20470, |
| 80656 | /* VEXPANDPSZrm */ |
| 80657 | 20473, |
| 80658 | /* VEXPANDPSZrmk */ |
| 80659 | 20475, |
| 80660 | /* VEXPANDPSZrmkz */ |
| 80661 | 20479, |
| 80662 | /* VEXPANDPSZrr */ |
| 80663 | 20482, |
| 80664 | /* VEXPANDPSZrrk */ |
| 80665 | 20484, |
| 80666 | /* VEXPANDPSZrrkz */ |
| 80667 | 20488, |
| 80668 | /* VEXTRACTF128mr */ |
| 80669 | 20491, |
| 80670 | /* VEXTRACTF128rr */ |
| 80671 | 20494, |
| 80672 | /* VEXTRACTF32x4Z256mr */ |
| 80673 | 20497, |
| 80674 | /* VEXTRACTF32x4Z256mrk */ |
| 80675 | 20500, |
| 80676 | /* VEXTRACTF32x4Z256rr */ |
| 80677 | 20504, |
| 80678 | /* VEXTRACTF32x4Z256rrk */ |
| 80679 | 20507, |
| 80680 | /* VEXTRACTF32x4Z256rrkz */ |
| 80681 | 20512, |
| 80682 | /* VEXTRACTF32x4Zmr */ |
| 80683 | 20516, |
| 80684 | /* VEXTRACTF32x4Zmrk */ |
| 80685 | 20519, |
| 80686 | /* VEXTRACTF32x4Zrr */ |
| 80687 | 20523, |
| 80688 | /* VEXTRACTF32x4Zrrk */ |
| 80689 | 20526, |
| 80690 | /* VEXTRACTF32x4Zrrkz */ |
| 80691 | 20531, |
| 80692 | /* VEXTRACTF32x8Zmr */ |
| 80693 | 20535, |
| 80694 | /* VEXTRACTF32x8Zmrk */ |
| 80695 | 20538, |
| 80696 | /* VEXTRACTF32x8Zrr */ |
| 80697 | 20542, |
| 80698 | /* VEXTRACTF32x8Zrrk */ |
| 80699 | 20545, |
| 80700 | /* VEXTRACTF32x8Zrrkz */ |
| 80701 | 20550, |
| 80702 | /* VEXTRACTF64x2Z256mr */ |
| 80703 | 20554, |
| 80704 | /* VEXTRACTF64x2Z256mrk */ |
| 80705 | 20557, |
| 80706 | /* VEXTRACTF64x2Z256rr */ |
| 80707 | 20561, |
| 80708 | /* VEXTRACTF64x2Z256rrk */ |
| 80709 | 20564, |
| 80710 | /* VEXTRACTF64x2Z256rrkz */ |
| 80711 | 20569, |
| 80712 | /* VEXTRACTF64x2Zmr */ |
| 80713 | 20573, |
| 80714 | /* VEXTRACTF64x2Zmrk */ |
| 80715 | 20576, |
| 80716 | /* VEXTRACTF64x2Zrr */ |
| 80717 | 20580, |
| 80718 | /* VEXTRACTF64x2Zrrk */ |
| 80719 | 20583, |
| 80720 | /* VEXTRACTF64x2Zrrkz */ |
| 80721 | 20588, |
| 80722 | /* VEXTRACTF64x4Zmr */ |
| 80723 | 20592, |
| 80724 | /* VEXTRACTF64x4Zmrk */ |
| 80725 | 20595, |
| 80726 | /* VEXTRACTF64x4Zrr */ |
| 80727 | 20599, |
| 80728 | /* VEXTRACTF64x4Zrrk */ |
| 80729 | 20602, |
| 80730 | /* VEXTRACTF64x4Zrrkz */ |
| 80731 | 20607, |
| 80732 | /* VEXTRACTI128mr */ |
| 80733 | 20611, |
| 80734 | /* VEXTRACTI128rr */ |
| 80735 | 20614, |
| 80736 | /* VEXTRACTI32x4Z256mr */ |
| 80737 | 20617, |
| 80738 | /* VEXTRACTI32x4Z256mrk */ |
| 80739 | 20620, |
| 80740 | /* VEXTRACTI32x4Z256rr */ |
| 80741 | 20624, |
| 80742 | /* VEXTRACTI32x4Z256rrk */ |
| 80743 | 20627, |
| 80744 | /* VEXTRACTI32x4Z256rrkz */ |
| 80745 | 20632, |
| 80746 | /* VEXTRACTI32x4Zmr */ |
| 80747 | 20636, |
| 80748 | /* VEXTRACTI32x4Zmrk */ |
| 80749 | 20639, |
| 80750 | /* VEXTRACTI32x4Zrr */ |
| 80751 | 20643, |
| 80752 | /* VEXTRACTI32x4Zrrk */ |
| 80753 | 20646, |
| 80754 | /* VEXTRACTI32x4Zrrkz */ |
| 80755 | 20651, |
| 80756 | /* VEXTRACTI32x8Zmr */ |
| 80757 | 20655, |
| 80758 | /* VEXTRACTI32x8Zmrk */ |
| 80759 | 20658, |
| 80760 | /* VEXTRACTI32x8Zrr */ |
| 80761 | 20662, |
| 80762 | /* VEXTRACTI32x8Zrrk */ |
| 80763 | 20665, |
| 80764 | /* VEXTRACTI32x8Zrrkz */ |
| 80765 | 20670, |
| 80766 | /* VEXTRACTI64x2Z256mr */ |
| 80767 | 20674, |
| 80768 | /* VEXTRACTI64x2Z256mrk */ |
| 80769 | 20677, |
| 80770 | /* VEXTRACTI64x2Z256rr */ |
| 80771 | 20681, |
| 80772 | /* VEXTRACTI64x2Z256rrk */ |
| 80773 | 20684, |
| 80774 | /* VEXTRACTI64x2Z256rrkz */ |
| 80775 | 20689, |
| 80776 | /* VEXTRACTI64x2Zmr */ |
| 80777 | 20693, |
| 80778 | /* VEXTRACTI64x2Zmrk */ |
| 80779 | 20696, |
| 80780 | /* VEXTRACTI64x2Zrr */ |
| 80781 | 20700, |
| 80782 | /* VEXTRACTI64x2Zrrk */ |
| 80783 | 20703, |
| 80784 | /* VEXTRACTI64x2Zrrkz */ |
| 80785 | 20708, |
| 80786 | /* VEXTRACTI64x4Zmr */ |
| 80787 | 20712, |
| 80788 | /* VEXTRACTI64x4Zmrk */ |
| 80789 | 20715, |
| 80790 | /* VEXTRACTI64x4Zrr */ |
| 80791 | 20719, |
| 80792 | /* VEXTRACTI64x4Zrrk */ |
| 80793 | 20722, |
| 80794 | /* VEXTRACTI64x4Zrrkz */ |
| 80795 | 20727, |
| 80796 | /* VEXTRACTPSZmr */ |
| 80797 | 20731, |
| 80798 | /* VEXTRACTPSZrr */ |
| 80799 | 20734, |
| 80800 | /* VEXTRACTPSmr */ |
| 80801 | 20737, |
| 80802 | /* VEXTRACTPSrr */ |
| 80803 | 20740, |
| 80804 | /* VFCMADDCPHZ128m */ |
| 80805 | 20743, |
| 80806 | /* VFCMADDCPHZ128mb */ |
| 80807 | 20747, |
| 80808 | /* VFCMADDCPHZ128mbk */ |
| 80809 | 20751, |
| 80810 | /* VFCMADDCPHZ128mbkz */ |
| 80811 | 20756, |
| 80812 | /* VFCMADDCPHZ128mk */ |
| 80813 | 20761, |
| 80814 | /* VFCMADDCPHZ128mkz */ |
| 80815 | 20766, |
| 80816 | /* VFCMADDCPHZ128r */ |
| 80817 | 20771, |
| 80818 | /* VFCMADDCPHZ128rk */ |
| 80819 | 20775, |
| 80820 | /* VFCMADDCPHZ128rkz */ |
| 80821 | 20780, |
| 80822 | /* VFCMADDCPHZ256m */ |
| 80823 | 20785, |
| 80824 | /* VFCMADDCPHZ256mb */ |
| 80825 | 20789, |
| 80826 | /* VFCMADDCPHZ256mbk */ |
| 80827 | 20793, |
| 80828 | /* VFCMADDCPHZ256mbkz */ |
| 80829 | 20798, |
| 80830 | /* VFCMADDCPHZ256mk */ |
| 80831 | 20803, |
| 80832 | /* VFCMADDCPHZ256mkz */ |
| 80833 | 20808, |
| 80834 | /* VFCMADDCPHZ256r */ |
| 80835 | 20813, |
| 80836 | /* VFCMADDCPHZ256rk */ |
| 80837 | 20817, |
| 80838 | /* VFCMADDCPHZ256rkz */ |
| 80839 | 20822, |
| 80840 | /* VFCMADDCPHZm */ |
| 80841 | 20827, |
| 80842 | /* VFCMADDCPHZmb */ |
| 80843 | 20831, |
| 80844 | /* VFCMADDCPHZmbk */ |
| 80845 | 20835, |
| 80846 | /* VFCMADDCPHZmbkz */ |
| 80847 | 20840, |
| 80848 | /* VFCMADDCPHZmk */ |
| 80849 | 20845, |
| 80850 | /* VFCMADDCPHZmkz */ |
| 80851 | 20850, |
| 80852 | /* VFCMADDCPHZr */ |
| 80853 | 20855, |
| 80854 | /* VFCMADDCPHZrb */ |
| 80855 | 20859, |
| 80856 | /* VFCMADDCPHZrbk */ |
| 80857 | 20864, |
| 80858 | /* VFCMADDCPHZrbkz */ |
| 80859 | 20870, |
| 80860 | /* VFCMADDCPHZrk */ |
| 80861 | 20876, |
| 80862 | /* VFCMADDCPHZrkz */ |
| 80863 | 20881, |
| 80864 | /* VFCMADDCSHZm */ |
| 80865 | 20886, |
| 80866 | /* VFCMADDCSHZmk */ |
| 80867 | 20890, |
| 80868 | /* VFCMADDCSHZmkz */ |
| 80869 | 20895, |
| 80870 | /* VFCMADDCSHZr */ |
| 80871 | 20900, |
| 80872 | /* VFCMADDCSHZrb */ |
| 80873 | 20904, |
| 80874 | /* VFCMADDCSHZrbk */ |
| 80875 | 20909, |
| 80876 | /* VFCMADDCSHZrbkz */ |
| 80877 | 20915, |
| 80878 | /* VFCMADDCSHZrk */ |
| 80879 | 20921, |
| 80880 | /* VFCMADDCSHZrkz */ |
| 80881 | 20926, |
| 80882 | /* VFCMULCPHZ128rm */ |
| 80883 | 20931, |
| 80884 | /* VFCMULCPHZ128rmb */ |
| 80885 | 20934, |
| 80886 | /* VFCMULCPHZ128rmbk */ |
| 80887 | 20937, |
| 80888 | /* VFCMULCPHZ128rmbkz */ |
| 80889 | 20942, |
| 80890 | /* VFCMULCPHZ128rmk */ |
| 80891 | 20946, |
| 80892 | /* VFCMULCPHZ128rmkz */ |
| 80893 | 20951, |
| 80894 | /* VFCMULCPHZ128rr */ |
| 80895 | 20955, |
| 80896 | /* VFCMULCPHZ128rrk */ |
| 80897 | 20958, |
| 80898 | /* VFCMULCPHZ128rrkz */ |
| 80899 | 20963, |
| 80900 | /* VFCMULCPHZ256rm */ |
| 80901 | 20967, |
| 80902 | /* VFCMULCPHZ256rmb */ |
| 80903 | 20970, |
| 80904 | /* VFCMULCPHZ256rmbk */ |
| 80905 | 20973, |
| 80906 | /* VFCMULCPHZ256rmbkz */ |
| 80907 | 20978, |
| 80908 | /* VFCMULCPHZ256rmk */ |
| 80909 | 20982, |
| 80910 | /* VFCMULCPHZ256rmkz */ |
| 80911 | 20987, |
| 80912 | /* VFCMULCPHZ256rr */ |
| 80913 | 20991, |
| 80914 | /* VFCMULCPHZ256rrk */ |
| 80915 | 20994, |
| 80916 | /* VFCMULCPHZ256rrkz */ |
| 80917 | 20999, |
| 80918 | /* VFCMULCPHZrm */ |
| 80919 | 21003, |
| 80920 | /* VFCMULCPHZrmb */ |
| 80921 | 21006, |
| 80922 | /* VFCMULCPHZrmbk */ |
| 80923 | 21009, |
| 80924 | /* VFCMULCPHZrmbkz */ |
| 80925 | 21014, |
| 80926 | /* VFCMULCPHZrmk */ |
| 80927 | 21018, |
| 80928 | /* VFCMULCPHZrmkz */ |
| 80929 | 21023, |
| 80930 | /* VFCMULCPHZrr */ |
| 80931 | 21027, |
| 80932 | /* VFCMULCPHZrrb */ |
| 80933 | 21030, |
| 80934 | /* VFCMULCPHZrrbk */ |
| 80935 | 21034, |
| 80936 | /* VFCMULCPHZrrbkz */ |
| 80937 | 21040, |
| 80938 | /* VFCMULCPHZrrk */ |
| 80939 | 21045, |
| 80940 | /* VFCMULCPHZrrkz */ |
| 80941 | 21050, |
| 80942 | /* VFCMULCSHZrm */ |
| 80943 | 21054, |
| 80944 | /* VFCMULCSHZrmk */ |
| 80945 | 21057, |
| 80946 | /* VFCMULCSHZrmkz */ |
| 80947 | 21062, |
| 80948 | /* VFCMULCSHZrr */ |
| 80949 | 21066, |
| 80950 | /* VFCMULCSHZrrb */ |
| 80951 | 21069, |
| 80952 | /* VFCMULCSHZrrbk */ |
| 80953 | 21073, |
| 80954 | /* VFCMULCSHZrrbkz */ |
| 80955 | 21079, |
| 80956 | /* VFCMULCSHZrrk */ |
| 80957 | 21084, |
| 80958 | /* VFCMULCSHZrrkz */ |
| 80959 | 21089, |
| 80960 | /* VFIXUPIMMPDZ128rmbi */ |
| 80961 | 21093, |
| 80962 | /* VFIXUPIMMPDZ128rmbik */ |
| 80963 | 21098, |
| 80964 | /* VFIXUPIMMPDZ128rmbikz */ |
| 80965 | 21104, |
| 80966 | /* VFIXUPIMMPDZ128rmi */ |
| 80967 | 21110, |
| 80968 | /* VFIXUPIMMPDZ128rmik */ |
| 80969 | 21115, |
| 80970 | /* VFIXUPIMMPDZ128rmikz */ |
| 80971 | 21121, |
| 80972 | /* VFIXUPIMMPDZ128rri */ |
| 80973 | 21127, |
| 80974 | /* VFIXUPIMMPDZ128rrik */ |
| 80975 | 21132, |
| 80976 | /* VFIXUPIMMPDZ128rrikz */ |
| 80977 | 21138, |
| 80978 | /* VFIXUPIMMPDZ256rmbi */ |
| 80979 | 21144, |
| 80980 | /* VFIXUPIMMPDZ256rmbik */ |
| 80981 | 21149, |
| 80982 | /* VFIXUPIMMPDZ256rmbikz */ |
| 80983 | 21155, |
| 80984 | /* VFIXUPIMMPDZ256rmi */ |
| 80985 | 21161, |
| 80986 | /* VFIXUPIMMPDZ256rmik */ |
| 80987 | 21166, |
| 80988 | /* VFIXUPIMMPDZ256rmikz */ |
| 80989 | 21172, |
| 80990 | /* VFIXUPIMMPDZ256rri */ |
| 80991 | 21178, |
| 80992 | /* VFIXUPIMMPDZ256rrik */ |
| 80993 | 21183, |
| 80994 | /* VFIXUPIMMPDZ256rrikz */ |
| 80995 | 21189, |
| 80996 | /* VFIXUPIMMPDZrmbi */ |
| 80997 | 21195, |
| 80998 | /* VFIXUPIMMPDZrmbik */ |
| 80999 | 21200, |
| 81000 | /* VFIXUPIMMPDZrmbikz */ |
| 81001 | 21206, |
| 81002 | /* VFIXUPIMMPDZrmi */ |
| 81003 | 21212, |
| 81004 | /* VFIXUPIMMPDZrmik */ |
| 81005 | 21217, |
| 81006 | /* VFIXUPIMMPDZrmikz */ |
| 81007 | 21223, |
| 81008 | /* VFIXUPIMMPDZrri */ |
| 81009 | 21229, |
| 81010 | /* VFIXUPIMMPDZrrib */ |
| 81011 | 21234, |
| 81012 | /* VFIXUPIMMPDZrribk */ |
| 81013 | 21239, |
| 81014 | /* VFIXUPIMMPDZrribkz */ |
| 81015 | 21245, |
| 81016 | /* VFIXUPIMMPDZrrik */ |
| 81017 | 21251, |
| 81018 | /* VFIXUPIMMPDZrrikz */ |
| 81019 | 21257, |
| 81020 | /* VFIXUPIMMPSZ128rmbi */ |
| 81021 | 21263, |
| 81022 | /* VFIXUPIMMPSZ128rmbik */ |
| 81023 | 21268, |
| 81024 | /* VFIXUPIMMPSZ128rmbikz */ |
| 81025 | 21274, |
| 81026 | /* VFIXUPIMMPSZ128rmi */ |
| 81027 | 21280, |
| 81028 | /* VFIXUPIMMPSZ128rmik */ |
| 81029 | 21285, |
| 81030 | /* VFIXUPIMMPSZ128rmikz */ |
| 81031 | 21291, |
| 81032 | /* VFIXUPIMMPSZ128rri */ |
| 81033 | 21297, |
| 81034 | /* VFIXUPIMMPSZ128rrik */ |
| 81035 | 21302, |
| 81036 | /* VFIXUPIMMPSZ128rrikz */ |
| 81037 | 21308, |
| 81038 | /* VFIXUPIMMPSZ256rmbi */ |
| 81039 | 21314, |
| 81040 | /* VFIXUPIMMPSZ256rmbik */ |
| 81041 | 21319, |
| 81042 | /* VFIXUPIMMPSZ256rmbikz */ |
| 81043 | 21325, |
| 81044 | /* VFIXUPIMMPSZ256rmi */ |
| 81045 | 21331, |
| 81046 | /* VFIXUPIMMPSZ256rmik */ |
| 81047 | 21336, |
| 81048 | /* VFIXUPIMMPSZ256rmikz */ |
| 81049 | 21342, |
| 81050 | /* VFIXUPIMMPSZ256rri */ |
| 81051 | 21348, |
| 81052 | /* VFIXUPIMMPSZ256rrik */ |
| 81053 | 21353, |
| 81054 | /* VFIXUPIMMPSZ256rrikz */ |
| 81055 | 21359, |
| 81056 | /* VFIXUPIMMPSZrmbi */ |
| 81057 | 21365, |
| 81058 | /* VFIXUPIMMPSZrmbik */ |
| 81059 | 21370, |
| 81060 | /* VFIXUPIMMPSZrmbikz */ |
| 81061 | 21376, |
| 81062 | /* VFIXUPIMMPSZrmi */ |
| 81063 | 21382, |
| 81064 | /* VFIXUPIMMPSZrmik */ |
| 81065 | 21387, |
| 81066 | /* VFIXUPIMMPSZrmikz */ |
| 81067 | 21393, |
| 81068 | /* VFIXUPIMMPSZrri */ |
| 81069 | 21399, |
| 81070 | /* VFIXUPIMMPSZrrib */ |
| 81071 | 21404, |
| 81072 | /* VFIXUPIMMPSZrribk */ |
| 81073 | 21409, |
| 81074 | /* VFIXUPIMMPSZrribkz */ |
| 81075 | 21415, |
| 81076 | /* VFIXUPIMMPSZrrik */ |
| 81077 | 21421, |
| 81078 | /* VFIXUPIMMPSZrrikz */ |
| 81079 | 21427, |
| 81080 | /* VFIXUPIMMSDZrmi */ |
| 81081 | 21433, |
| 81082 | /* VFIXUPIMMSDZrmik */ |
| 81083 | 21438, |
| 81084 | /* VFIXUPIMMSDZrmikz */ |
| 81085 | 21444, |
| 81086 | /* VFIXUPIMMSDZrri */ |
| 81087 | 21450, |
| 81088 | /* VFIXUPIMMSDZrrib */ |
| 81089 | 21455, |
| 81090 | /* VFIXUPIMMSDZrribk */ |
| 81091 | 21460, |
| 81092 | /* VFIXUPIMMSDZrribkz */ |
| 81093 | 21466, |
| 81094 | /* VFIXUPIMMSDZrrik */ |
| 81095 | 21472, |
| 81096 | /* VFIXUPIMMSDZrrikz */ |
| 81097 | 21478, |
| 81098 | /* VFIXUPIMMSSZrmi */ |
| 81099 | 21484, |
| 81100 | /* VFIXUPIMMSSZrmik */ |
| 81101 | 21489, |
| 81102 | /* VFIXUPIMMSSZrmikz */ |
| 81103 | 21495, |
| 81104 | /* VFIXUPIMMSSZrri */ |
| 81105 | 21501, |
| 81106 | /* VFIXUPIMMSSZrrib */ |
| 81107 | 21506, |
| 81108 | /* VFIXUPIMMSSZrribk */ |
| 81109 | 21511, |
| 81110 | /* VFIXUPIMMSSZrribkz */ |
| 81111 | 21517, |
| 81112 | /* VFIXUPIMMSSZrrik */ |
| 81113 | 21523, |
| 81114 | /* VFIXUPIMMSSZrrikz */ |
| 81115 | 21529, |
| 81116 | /* VFMADD132PDYm */ |
| 81117 | 21535, |
| 81118 | /* VFMADD132PDYr */ |
| 81119 | 21539, |
| 81120 | /* VFMADD132PDZ128m */ |
| 81121 | 21543, |
| 81122 | /* VFMADD132PDZ128mb */ |
| 81123 | 21547, |
| 81124 | /* VFMADD132PDZ128mbk */ |
| 81125 | 21551, |
| 81126 | /* VFMADD132PDZ128mbkz */ |
| 81127 | 21556, |
| 81128 | /* VFMADD132PDZ128mk */ |
| 81129 | 21561, |
| 81130 | /* VFMADD132PDZ128mkz */ |
| 81131 | 21566, |
| 81132 | /* VFMADD132PDZ128r */ |
| 81133 | 21571, |
| 81134 | /* VFMADD132PDZ128rk */ |
| 81135 | 21575, |
| 81136 | /* VFMADD132PDZ128rkz */ |
| 81137 | 21580, |
| 81138 | /* VFMADD132PDZ256m */ |
| 81139 | 21585, |
| 81140 | /* VFMADD132PDZ256mb */ |
| 81141 | 21589, |
| 81142 | /* VFMADD132PDZ256mbk */ |
| 81143 | 21593, |
| 81144 | /* VFMADD132PDZ256mbkz */ |
| 81145 | 21598, |
| 81146 | /* VFMADD132PDZ256mk */ |
| 81147 | 21603, |
| 81148 | /* VFMADD132PDZ256mkz */ |
| 81149 | 21608, |
| 81150 | /* VFMADD132PDZ256r */ |
| 81151 | 21613, |
| 81152 | /* VFMADD132PDZ256rk */ |
| 81153 | 21617, |
| 81154 | /* VFMADD132PDZ256rkz */ |
| 81155 | 21622, |
| 81156 | /* VFMADD132PDZm */ |
| 81157 | 21627, |
| 81158 | /* VFMADD132PDZmb */ |
| 81159 | 21631, |
| 81160 | /* VFMADD132PDZmbk */ |
| 81161 | 21635, |
| 81162 | /* VFMADD132PDZmbkz */ |
| 81163 | 21640, |
| 81164 | /* VFMADD132PDZmk */ |
| 81165 | 21645, |
| 81166 | /* VFMADD132PDZmkz */ |
| 81167 | 21650, |
| 81168 | /* VFMADD132PDZr */ |
| 81169 | 21655, |
| 81170 | /* VFMADD132PDZrb */ |
| 81171 | 21659, |
| 81172 | /* VFMADD132PDZrbk */ |
| 81173 | 21664, |
| 81174 | /* VFMADD132PDZrbkz */ |
| 81175 | 21670, |
| 81176 | /* VFMADD132PDZrk */ |
| 81177 | 21676, |
| 81178 | /* VFMADD132PDZrkz */ |
| 81179 | 21681, |
| 81180 | /* VFMADD132PDm */ |
| 81181 | 21686, |
| 81182 | /* VFMADD132PDr */ |
| 81183 | 21690, |
| 81184 | /* VFMADD132PHZ128m */ |
| 81185 | 21694, |
| 81186 | /* VFMADD132PHZ128mb */ |
| 81187 | 21698, |
| 81188 | /* VFMADD132PHZ128mbk */ |
| 81189 | 21702, |
| 81190 | /* VFMADD132PHZ128mbkz */ |
| 81191 | 21707, |
| 81192 | /* VFMADD132PHZ128mk */ |
| 81193 | 21712, |
| 81194 | /* VFMADD132PHZ128mkz */ |
| 81195 | 21717, |
| 81196 | /* VFMADD132PHZ128r */ |
| 81197 | 21722, |
| 81198 | /* VFMADD132PHZ128rk */ |
| 81199 | 21726, |
| 81200 | /* VFMADD132PHZ128rkz */ |
| 81201 | 21731, |
| 81202 | /* VFMADD132PHZ256m */ |
| 81203 | 21736, |
| 81204 | /* VFMADD132PHZ256mb */ |
| 81205 | 21740, |
| 81206 | /* VFMADD132PHZ256mbk */ |
| 81207 | 21744, |
| 81208 | /* VFMADD132PHZ256mbkz */ |
| 81209 | 21749, |
| 81210 | /* VFMADD132PHZ256mk */ |
| 81211 | 21754, |
| 81212 | /* VFMADD132PHZ256mkz */ |
| 81213 | 21759, |
| 81214 | /* VFMADD132PHZ256r */ |
| 81215 | 21764, |
| 81216 | /* VFMADD132PHZ256rk */ |
| 81217 | 21768, |
| 81218 | /* VFMADD132PHZ256rkz */ |
| 81219 | 21773, |
| 81220 | /* VFMADD132PHZm */ |
| 81221 | 21778, |
| 81222 | /* VFMADD132PHZmb */ |
| 81223 | 21782, |
| 81224 | /* VFMADD132PHZmbk */ |
| 81225 | 21786, |
| 81226 | /* VFMADD132PHZmbkz */ |
| 81227 | 21791, |
| 81228 | /* VFMADD132PHZmk */ |
| 81229 | 21796, |
| 81230 | /* VFMADD132PHZmkz */ |
| 81231 | 21801, |
| 81232 | /* VFMADD132PHZr */ |
| 81233 | 21806, |
| 81234 | /* VFMADD132PHZrb */ |
| 81235 | 21810, |
| 81236 | /* VFMADD132PHZrbk */ |
| 81237 | 21815, |
| 81238 | /* VFMADD132PHZrbkz */ |
| 81239 | 21821, |
| 81240 | /* VFMADD132PHZrk */ |
| 81241 | 21827, |
| 81242 | /* VFMADD132PHZrkz */ |
| 81243 | 21832, |
| 81244 | /* VFMADD132PSYm */ |
| 81245 | 21837, |
| 81246 | /* VFMADD132PSYr */ |
| 81247 | 21841, |
| 81248 | /* VFMADD132PSZ128m */ |
| 81249 | 21845, |
| 81250 | /* VFMADD132PSZ128mb */ |
| 81251 | 21849, |
| 81252 | /* VFMADD132PSZ128mbk */ |
| 81253 | 21853, |
| 81254 | /* VFMADD132PSZ128mbkz */ |
| 81255 | 21858, |
| 81256 | /* VFMADD132PSZ128mk */ |
| 81257 | 21863, |
| 81258 | /* VFMADD132PSZ128mkz */ |
| 81259 | 21868, |
| 81260 | /* VFMADD132PSZ128r */ |
| 81261 | 21873, |
| 81262 | /* VFMADD132PSZ128rk */ |
| 81263 | 21877, |
| 81264 | /* VFMADD132PSZ128rkz */ |
| 81265 | 21882, |
| 81266 | /* VFMADD132PSZ256m */ |
| 81267 | 21887, |
| 81268 | /* VFMADD132PSZ256mb */ |
| 81269 | 21891, |
| 81270 | /* VFMADD132PSZ256mbk */ |
| 81271 | 21895, |
| 81272 | /* VFMADD132PSZ256mbkz */ |
| 81273 | 21900, |
| 81274 | /* VFMADD132PSZ256mk */ |
| 81275 | 21905, |
| 81276 | /* VFMADD132PSZ256mkz */ |
| 81277 | 21910, |
| 81278 | /* VFMADD132PSZ256r */ |
| 81279 | 21915, |
| 81280 | /* VFMADD132PSZ256rk */ |
| 81281 | 21919, |
| 81282 | /* VFMADD132PSZ256rkz */ |
| 81283 | 21924, |
| 81284 | /* VFMADD132PSZm */ |
| 81285 | 21929, |
| 81286 | /* VFMADD132PSZmb */ |
| 81287 | 21933, |
| 81288 | /* VFMADD132PSZmbk */ |
| 81289 | 21937, |
| 81290 | /* VFMADD132PSZmbkz */ |
| 81291 | 21942, |
| 81292 | /* VFMADD132PSZmk */ |
| 81293 | 21947, |
| 81294 | /* VFMADD132PSZmkz */ |
| 81295 | 21952, |
| 81296 | /* VFMADD132PSZr */ |
| 81297 | 21957, |
| 81298 | /* VFMADD132PSZrb */ |
| 81299 | 21961, |
| 81300 | /* VFMADD132PSZrbk */ |
| 81301 | 21966, |
| 81302 | /* VFMADD132PSZrbkz */ |
| 81303 | 21972, |
| 81304 | /* VFMADD132PSZrk */ |
| 81305 | 21978, |
| 81306 | /* VFMADD132PSZrkz */ |
| 81307 | 21983, |
| 81308 | /* VFMADD132PSm */ |
| 81309 | 21988, |
| 81310 | /* VFMADD132PSr */ |
| 81311 | 21992, |
| 81312 | /* VFMADD132SDZm */ |
| 81313 | 21996, |
| 81314 | /* VFMADD132SDZm_Int */ |
| 81315 | 22000, |
| 81316 | /* VFMADD132SDZm_Intk */ |
| 81317 | 22004, |
| 81318 | /* VFMADD132SDZm_Intkz */ |
| 81319 | 22009, |
| 81320 | /* VFMADD132SDZr */ |
| 81321 | 22014, |
| 81322 | /* VFMADD132SDZr_Int */ |
| 81323 | 22018, |
| 81324 | /* VFMADD132SDZr_Intk */ |
| 81325 | 22022, |
| 81326 | /* VFMADD132SDZr_Intkz */ |
| 81327 | 22027, |
| 81328 | /* VFMADD132SDZrb */ |
| 81329 | 22032, |
| 81330 | /* VFMADD132SDZrb_Int */ |
| 81331 | 22037, |
| 81332 | /* VFMADD132SDZrb_Intk */ |
| 81333 | 22042, |
| 81334 | /* VFMADD132SDZrb_Intkz */ |
| 81335 | 22048, |
| 81336 | /* VFMADD132SDm */ |
| 81337 | 22054, |
| 81338 | /* VFMADD132SDm_Int */ |
| 81339 | 22058, |
| 81340 | /* VFMADD132SDr */ |
| 81341 | 22062, |
| 81342 | /* VFMADD132SDr_Int */ |
| 81343 | 22066, |
| 81344 | /* VFMADD132SHZm */ |
| 81345 | 22070, |
| 81346 | /* VFMADD132SHZm_Int */ |
| 81347 | 22074, |
| 81348 | /* VFMADD132SHZm_Intk */ |
| 81349 | 22078, |
| 81350 | /* VFMADD132SHZm_Intkz */ |
| 81351 | 22083, |
| 81352 | /* VFMADD132SHZr */ |
| 81353 | 22088, |
| 81354 | /* VFMADD132SHZr_Int */ |
| 81355 | 22092, |
| 81356 | /* VFMADD132SHZr_Intk */ |
| 81357 | 22096, |
| 81358 | /* VFMADD132SHZr_Intkz */ |
| 81359 | 22101, |
| 81360 | /* VFMADD132SHZrb */ |
| 81361 | 22106, |
| 81362 | /* VFMADD132SHZrb_Int */ |
| 81363 | 22111, |
| 81364 | /* VFMADD132SHZrb_Intk */ |
| 81365 | 22116, |
| 81366 | /* VFMADD132SHZrb_Intkz */ |
| 81367 | 22122, |
| 81368 | /* VFMADD132SSZm */ |
| 81369 | 22128, |
| 81370 | /* VFMADD132SSZm_Int */ |
| 81371 | 22132, |
| 81372 | /* VFMADD132SSZm_Intk */ |
| 81373 | 22136, |
| 81374 | /* VFMADD132SSZm_Intkz */ |
| 81375 | 22141, |
| 81376 | /* VFMADD132SSZr */ |
| 81377 | 22146, |
| 81378 | /* VFMADD132SSZr_Int */ |
| 81379 | 22150, |
| 81380 | /* VFMADD132SSZr_Intk */ |
| 81381 | 22154, |
| 81382 | /* VFMADD132SSZr_Intkz */ |
| 81383 | 22159, |
| 81384 | /* VFMADD132SSZrb */ |
| 81385 | 22164, |
| 81386 | /* VFMADD132SSZrb_Int */ |
| 81387 | 22169, |
| 81388 | /* VFMADD132SSZrb_Intk */ |
| 81389 | 22174, |
| 81390 | /* VFMADD132SSZrb_Intkz */ |
| 81391 | 22180, |
| 81392 | /* VFMADD132SSm */ |
| 81393 | 22186, |
| 81394 | /* VFMADD132SSm_Int */ |
| 81395 | 22190, |
| 81396 | /* VFMADD132SSr */ |
| 81397 | 22194, |
| 81398 | /* VFMADD132SSr_Int */ |
| 81399 | 22198, |
| 81400 | /* VFMADD213PDYm */ |
| 81401 | 22202, |
| 81402 | /* VFMADD213PDYr */ |
| 81403 | 22206, |
| 81404 | /* VFMADD213PDZ128m */ |
| 81405 | 22210, |
| 81406 | /* VFMADD213PDZ128mb */ |
| 81407 | 22214, |
| 81408 | /* VFMADD213PDZ128mbk */ |
| 81409 | 22218, |
| 81410 | /* VFMADD213PDZ128mbkz */ |
| 81411 | 22223, |
| 81412 | /* VFMADD213PDZ128mk */ |
| 81413 | 22228, |
| 81414 | /* VFMADD213PDZ128mkz */ |
| 81415 | 22233, |
| 81416 | /* VFMADD213PDZ128r */ |
| 81417 | 22238, |
| 81418 | /* VFMADD213PDZ128rk */ |
| 81419 | 22242, |
| 81420 | /* VFMADD213PDZ128rkz */ |
| 81421 | 22247, |
| 81422 | /* VFMADD213PDZ256m */ |
| 81423 | 22252, |
| 81424 | /* VFMADD213PDZ256mb */ |
| 81425 | 22256, |
| 81426 | /* VFMADD213PDZ256mbk */ |
| 81427 | 22260, |
| 81428 | /* VFMADD213PDZ256mbkz */ |
| 81429 | 22265, |
| 81430 | /* VFMADD213PDZ256mk */ |
| 81431 | 22270, |
| 81432 | /* VFMADD213PDZ256mkz */ |
| 81433 | 22275, |
| 81434 | /* VFMADD213PDZ256r */ |
| 81435 | 22280, |
| 81436 | /* VFMADD213PDZ256rk */ |
| 81437 | 22284, |
| 81438 | /* VFMADD213PDZ256rkz */ |
| 81439 | 22289, |
| 81440 | /* VFMADD213PDZm */ |
| 81441 | 22294, |
| 81442 | /* VFMADD213PDZmb */ |
| 81443 | 22298, |
| 81444 | /* VFMADD213PDZmbk */ |
| 81445 | 22302, |
| 81446 | /* VFMADD213PDZmbkz */ |
| 81447 | 22307, |
| 81448 | /* VFMADD213PDZmk */ |
| 81449 | 22312, |
| 81450 | /* VFMADD213PDZmkz */ |
| 81451 | 22317, |
| 81452 | /* VFMADD213PDZr */ |
| 81453 | 22322, |
| 81454 | /* VFMADD213PDZrb */ |
| 81455 | 22326, |
| 81456 | /* VFMADD213PDZrbk */ |
| 81457 | 22331, |
| 81458 | /* VFMADD213PDZrbkz */ |
| 81459 | 22337, |
| 81460 | /* VFMADD213PDZrk */ |
| 81461 | 22343, |
| 81462 | /* VFMADD213PDZrkz */ |
| 81463 | 22348, |
| 81464 | /* VFMADD213PDm */ |
| 81465 | 22353, |
| 81466 | /* VFMADD213PDr */ |
| 81467 | 22357, |
| 81468 | /* VFMADD213PHZ128m */ |
| 81469 | 22361, |
| 81470 | /* VFMADD213PHZ128mb */ |
| 81471 | 22365, |
| 81472 | /* VFMADD213PHZ128mbk */ |
| 81473 | 22369, |
| 81474 | /* VFMADD213PHZ128mbkz */ |
| 81475 | 22374, |
| 81476 | /* VFMADD213PHZ128mk */ |
| 81477 | 22379, |
| 81478 | /* VFMADD213PHZ128mkz */ |
| 81479 | 22384, |
| 81480 | /* VFMADD213PHZ128r */ |
| 81481 | 22389, |
| 81482 | /* VFMADD213PHZ128rk */ |
| 81483 | 22393, |
| 81484 | /* VFMADD213PHZ128rkz */ |
| 81485 | 22398, |
| 81486 | /* VFMADD213PHZ256m */ |
| 81487 | 22403, |
| 81488 | /* VFMADD213PHZ256mb */ |
| 81489 | 22407, |
| 81490 | /* VFMADD213PHZ256mbk */ |
| 81491 | 22411, |
| 81492 | /* VFMADD213PHZ256mbkz */ |
| 81493 | 22416, |
| 81494 | /* VFMADD213PHZ256mk */ |
| 81495 | 22421, |
| 81496 | /* VFMADD213PHZ256mkz */ |
| 81497 | 22426, |
| 81498 | /* VFMADD213PHZ256r */ |
| 81499 | 22431, |
| 81500 | /* VFMADD213PHZ256rk */ |
| 81501 | 22435, |
| 81502 | /* VFMADD213PHZ256rkz */ |
| 81503 | 22440, |
| 81504 | /* VFMADD213PHZm */ |
| 81505 | 22445, |
| 81506 | /* VFMADD213PHZmb */ |
| 81507 | 22449, |
| 81508 | /* VFMADD213PHZmbk */ |
| 81509 | 22453, |
| 81510 | /* VFMADD213PHZmbkz */ |
| 81511 | 22458, |
| 81512 | /* VFMADD213PHZmk */ |
| 81513 | 22463, |
| 81514 | /* VFMADD213PHZmkz */ |
| 81515 | 22468, |
| 81516 | /* VFMADD213PHZr */ |
| 81517 | 22473, |
| 81518 | /* VFMADD213PHZrb */ |
| 81519 | 22477, |
| 81520 | /* VFMADD213PHZrbk */ |
| 81521 | 22482, |
| 81522 | /* VFMADD213PHZrbkz */ |
| 81523 | 22488, |
| 81524 | /* VFMADD213PHZrk */ |
| 81525 | 22494, |
| 81526 | /* VFMADD213PHZrkz */ |
| 81527 | 22499, |
| 81528 | /* VFMADD213PSYm */ |
| 81529 | 22504, |
| 81530 | /* VFMADD213PSYr */ |
| 81531 | 22508, |
| 81532 | /* VFMADD213PSZ128m */ |
| 81533 | 22512, |
| 81534 | /* VFMADD213PSZ128mb */ |
| 81535 | 22516, |
| 81536 | /* VFMADD213PSZ128mbk */ |
| 81537 | 22520, |
| 81538 | /* VFMADD213PSZ128mbkz */ |
| 81539 | 22525, |
| 81540 | /* VFMADD213PSZ128mk */ |
| 81541 | 22530, |
| 81542 | /* VFMADD213PSZ128mkz */ |
| 81543 | 22535, |
| 81544 | /* VFMADD213PSZ128r */ |
| 81545 | 22540, |
| 81546 | /* VFMADD213PSZ128rk */ |
| 81547 | 22544, |
| 81548 | /* VFMADD213PSZ128rkz */ |
| 81549 | 22549, |
| 81550 | /* VFMADD213PSZ256m */ |
| 81551 | 22554, |
| 81552 | /* VFMADD213PSZ256mb */ |
| 81553 | 22558, |
| 81554 | /* VFMADD213PSZ256mbk */ |
| 81555 | 22562, |
| 81556 | /* VFMADD213PSZ256mbkz */ |
| 81557 | 22567, |
| 81558 | /* VFMADD213PSZ256mk */ |
| 81559 | 22572, |
| 81560 | /* VFMADD213PSZ256mkz */ |
| 81561 | 22577, |
| 81562 | /* VFMADD213PSZ256r */ |
| 81563 | 22582, |
| 81564 | /* VFMADD213PSZ256rk */ |
| 81565 | 22586, |
| 81566 | /* VFMADD213PSZ256rkz */ |
| 81567 | 22591, |
| 81568 | /* VFMADD213PSZm */ |
| 81569 | 22596, |
| 81570 | /* VFMADD213PSZmb */ |
| 81571 | 22600, |
| 81572 | /* VFMADD213PSZmbk */ |
| 81573 | 22604, |
| 81574 | /* VFMADD213PSZmbkz */ |
| 81575 | 22609, |
| 81576 | /* VFMADD213PSZmk */ |
| 81577 | 22614, |
| 81578 | /* VFMADD213PSZmkz */ |
| 81579 | 22619, |
| 81580 | /* VFMADD213PSZr */ |
| 81581 | 22624, |
| 81582 | /* VFMADD213PSZrb */ |
| 81583 | 22628, |
| 81584 | /* VFMADD213PSZrbk */ |
| 81585 | 22633, |
| 81586 | /* VFMADD213PSZrbkz */ |
| 81587 | 22639, |
| 81588 | /* VFMADD213PSZrk */ |
| 81589 | 22645, |
| 81590 | /* VFMADD213PSZrkz */ |
| 81591 | 22650, |
| 81592 | /* VFMADD213PSm */ |
| 81593 | 22655, |
| 81594 | /* VFMADD213PSr */ |
| 81595 | 22659, |
| 81596 | /* VFMADD213SDZm */ |
| 81597 | 22663, |
| 81598 | /* VFMADD213SDZm_Int */ |
| 81599 | 22667, |
| 81600 | /* VFMADD213SDZm_Intk */ |
| 81601 | 22671, |
| 81602 | /* VFMADD213SDZm_Intkz */ |
| 81603 | 22676, |
| 81604 | /* VFMADD213SDZr */ |
| 81605 | 22681, |
| 81606 | /* VFMADD213SDZr_Int */ |
| 81607 | 22685, |
| 81608 | /* VFMADD213SDZr_Intk */ |
| 81609 | 22689, |
| 81610 | /* VFMADD213SDZr_Intkz */ |
| 81611 | 22694, |
| 81612 | /* VFMADD213SDZrb */ |
| 81613 | 22699, |
| 81614 | /* VFMADD213SDZrb_Int */ |
| 81615 | 22704, |
| 81616 | /* VFMADD213SDZrb_Intk */ |
| 81617 | 22709, |
| 81618 | /* VFMADD213SDZrb_Intkz */ |
| 81619 | 22715, |
| 81620 | /* VFMADD213SDm */ |
| 81621 | 22721, |
| 81622 | /* VFMADD213SDm_Int */ |
| 81623 | 22725, |
| 81624 | /* VFMADD213SDr */ |
| 81625 | 22729, |
| 81626 | /* VFMADD213SDr_Int */ |
| 81627 | 22733, |
| 81628 | /* VFMADD213SHZm */ |
| 81629 | 22737, |
| 81630 | /* VFMADD213SHZm_Int */ |
| 81631 | 22741, |
| 81632 | /* VFMADD213SHZm_Intk */ |
| 81633 | 22745, |
| 81634 | /* VFMADD213SHZm_Intkz */ |
| 81635 | 22750, |
| 81636 | /* VFMADD213SHZr */ |
| 81637 | 22755, |
| 81638 | /* VFMADD213SHZr_Int */ |
| 81639 | 22759, |
| 81640 | /* VFMADD213SHZr_Intk */ |
| 81641 | 22763, |
| 81642 | /* VFMADD213SHZr_Intkz */ |
| 81643 | 22768, |
| 81644 | /* VFMADD213SHZrb */ |
| 81645 | 22773, |
| 81646 | /* VFMADD213SHZrb_Int */ |
| 81647 | 22778, |
| 81648 | /* VFMADD213SHZrb_Intk */ |
| 81649 | 22783, |
| 81650 | /* VFMADD213SHZrb_Intkz */ |
| 81651 | 22789, |
| 81652 | /* VFMADD213SSZm */ |
| 81653 | 22795, |
| 81654 | /* VFMADD213SSZm_Int */ |
| 81655 | 22799, |
| 81656 | /* VFMADD213SSZm_Intk */ |
| 81657 | 22803, |
| 81658 | /* VFMADD213SSZm_Intkz */ |
| 81659 | 22808, |
| 81660 | /* VFMADD213SSZr */ |
| 81661 | 22813, |
| 81662 | /* VFMADD213SSZr_Int */ |
| 81663 | 22817, |
| 81664 | /* VFMADD213SSZr_Intk */ |
| 81665 | 22821, |
| 81666 | /* VFMADD213SSZr_Intkz */ |
| 81667 | 22826, |
| 81668 | /* VFMADD213SSZrb */ |
| 81669 | 22831, |
| 81670 | /* VFMADD213SSZrb_Int */ |
| 81671 | 22836, |
| 81672 | /* VFMADD213SSZrb_Intk */ |
| 81673 | 22841, |
| 81674 | /* VFMADD213SSZrb_Intkz */ |
| 81675 | 22847, |
| 81676 | /* VFMADD213SSm */ |
| 81677 | 22853, |
| 81678 | /* VFMADD213SSm_Int */ |
| 81679 | 22857, |
| 81680 | /* VFMADD213SSr */ |
| 81681 | 22861, |
| 81682 | /* VFMADD213SSr_Int */ |
| 81683 | 22865, |
| 81684 | /* VFMADD231PDYm */ |
| 81685 | 22869, |
| 81686 | /* VFMADD231PDYr */ |
| 81687 | 22873, |
| 81688 | /* VFMADD231PDZ128m */ |
| 81689 | 22877, |
| 81690 | /* VFMADD231PDZ128mb */ |
| 81691 | 22881, |
| 81692 | /* VFMADD231PDZ128mbk */ |
| 81693 | 22885, |
| 81694 | /* VFMADD231PDZ128mbkz */ |
| 81695 | 22890, |
| 81696 | /* VFMADD231PDZ128mk */ |
| 81697 | 22895, |
| 81698 | /* VFMADD231PDZ128mkz */ |
| 81699 | 22900, |
| 81700 | /* VFMADD231PDZ128r */ |
| 81701 | 22905, |
| 81702 | /* VFMADD231PDZ128rk */ |
| 81703 | 22909, |
| 81704 | /* VFMADD231PDZ128rkz */ |
| 81705 | 22914, |
| 81706 | /* VFMADD231PDZ256m */ |
| 81707 | 22919, |
| 81708 | /* VFMADD231PDZ256mb */ |
| 81709 | 22923, |
| 81710 | /* VFMADD231PDZ256mbk */ |
| 81711 | 22927, |
| 81712 | /* VFMADD231PDZ256mbkz */ |
| 81713 | 22932, |
| 81714 | /* VFMADD231PDZ256mk */ |
| 81715 | 22937, |
| 81716 | /* VFMADD231PDZ256mkz */ |
| 81717 | 22942, |
| 81718 | /* VFMADD231PDZ256r */ |
| 81719 | 22947, |
| 81720 | /* VFMADD231PDZ256rk */ |
| 81721 | 22951, |
| 81722 | /* VFMADD231PDZ256rkz */ |
| 81723 | 22956, |
| 81724 | /* VFMADD231PDZm */ |
| 81725 | 22961, |
| 81726 | /* VFMADD231PDZmb */ |
| 81727 | 22965, |
| 81728 | /* VFMADD231PDZmbk */ |
| 81729 | 22969, |
| 81730 | /* VFMADD231PDZmbkz */ |
| 81731 | 22974, |
| 81732 | /* VFMADD231PDZmk */ |
| 81733 | 22979, |
| 81734 | /* VFMADD231PDZmkz */ |
| 81735 | 22984, |
| 81736 | /* VFMADD231PDZr */ |
| 81737 | 22989, |
| 81738 | /* VFMADD231PDZrb */ |
| 81739 | 22993, |
| 81740 | /* VFMADD231PDZrbk */ |
| 81741 | 22998, |
| 81742 | /* VFMADD231PDZrbkz */ |
| 81743 | 23004, |
| 81744 | /* VFMADD231PDZrk */ |
| 81745 | 23010, |
| 81746 | /* VFMADD231PDZrkz */ |
| 81747 | 23015, |
| 81748 | /* VFMADD231PDm */ |
| 81749 | 23020, |
| 81750 | /* VFMADD231PDr */ |
| 81751 | 23024, |
| 81752 | /* VFMADD231PHZ128m */ |
| 81753 | 23028, |
| 81754 | /* VFMADD231PHZ128mb */ |
| 81755 | 23032, |
| 81756 | /* VFMADD231PHZ128mbk */ |
| 81757 | 23036, |
| 81758 | /* VFMADD231PHZ128mbkz */ |
| 81759 | 23041, |
| 81760 | /* VFMADD231PHZ128mk */ |
| 81761 | 23046, |
| 81762 | /* VFMADD231PHZ128mkz */ |
| 81763 | 23051, |
| 81764 | /* VFMADD231PHZ128r */ |
| 81765 | 23056, |
| 81766 | /* VFMADD231PHZ128rk */ |
| 81767 | 23060, |
| 81768 | /* VFMADD231PHZ128rkz */ |
| 81769 | 23065, |
| 81770 | /* VFMADD231PHZ256m */ |
| 81771 | 23070, |
| 81772 | /* VFMADD231PHZ256mb */ |
| 81773 | 23074, |
| 81774 | /* VFMADD231PHZ256mbk */ |
| 81775 | 23078, |
| 81776 | /* VFMADD231PHZ256mbkz */ |
| 81777 | 23083, |
| 81778 | /* VFMADD231PHZ256mk */ |
| 81779 | 23088, |
| 81780 | /* VFMADD231PHZ256mkz */ |
| 81781 | 23093, |
| 81782 | /* VFMADD231PHZ256r */ |
| 81783 | 23098, |
| 81784 | /* VFMADD231PHZ256rk */ |
| 81785 | 23102, |
| 81786 | /* VFMADD231PHZ256rkz */ |
| 81787 | 23107, |
| 81788 | /* VFMADD231PHZm */ |
| 81789 | 23112, |
| 81790 | /* VFMADD231PHZmb */ |
| 81791 | 23116, |
| 81792 | /* VFMADD231PHZmbk */ |
| 81793 | 23120, |
| 81794 | /* VFMADD231PHZmbkz */ |
| 81795 | 23125, |
| 81796 | /* VFMADD231PHZmk */ |
| 81797 | 23130, |
| 81798 | /* VFMADD231PHZmkz */ |
| 81799 | 23135, |
| 81800 | /* VFMADD231PHZr */ |
| 81801 | 23140, |
| 81802 | /* VFMADD231PHZrb */ |
| 81803 | 23144, |
| 81804 | /* VFMADD231PHZrbk */ |
| 81805 | 23149, |
| 81806 | /* VFMADD231PHZrbkz */ |
| 81807 | 23155, |
| 81808 | /* VFMADD231PHZrk */ |
| 81809 | 23161, |
| 81810 | /* VFMADD231PHZrkz */ |
| 81811 | 23166, |
| 81812 | /* VFMADD231PSYm */ |
| 81813 | 23171, |
| 81814 | /* VFMADD231PSYr */ |
| 81815 | 23175, |
| 81816 | /* VFMADD231PSZ128m */ |
| 81817 | 23179, |
| 81818 | /* VFMADD231PSZ128mb */ |
| 81819 | 23183, |
| 81820 | /* VFMADD231PSZ128mbk */ |
| 81821 | 23187, |
| 81822 | /* VFMADD231PSZ128mbkz */ |
| 81823 | 23192, |
| 81824 | /* VFMADD231PSZ128mk */ |
| 81825 | 23197, |
| 81826 | /* VFMADD231PSZ128mkz */ |
| 81827 | 23202, |
| 81828 | /* VFMADD231PSZ128r */ |
| 81829 | 23207, |
| 81830 | /* VFMADD231PSZ128rk */ |
| 81831 | 23211, |
| 81832 | /* VFMADD231PSZ128rkz */ |
| 81833 | 23216, |
| 81834 | /* VFMADD231PSZ256m */ |
| 81835 | 23221, |
| 81836 | /* VFMADD231PSZ256mb */ |
| 81837 | 23225, |
| 81838 | /* VFMADD231PSZ256mbk */ |
| 81839 | 23229, |
| 81840 | /* VFMADD231PSZ256mbkz */ |
| 81841 | 23234, |
| 81842 | /* VFMADD231PSZ256mk */ |
| 81843 | 23239, |
| 81844 | /* VFMADD231PSZ256mkz */ |
| 81845 | 23244, |
| 81846 | /* VFMADD231PSZ256r */ |
| 81847 | 23249, |
| 81848 | /* VFMADD231PSZ256rk */ |
| 81849 | 23253, |
| 81850 | /* VFMADD231PSZ256rkz */ |
| 81851 | 23258, |
| 81852 | /* VFMADD231PSZm */ |
| 81853 | 23263, |
| 81854 | /* VFMADD231PSZmb */ |
| 81855 | 23267, |
| 81856 | /* VFMADD231PSZmbk */ |
| 81857 | 23271, |
| 81858 | /* VFMADD231PSZmbkz */ |
| 81859 | 23276, |
| 81860 | /* VFMADD231PSZmk */ |
| 81861 | 23281, |
| 81862 | /* VFMADD231PSZmkz */ |
| 81863 | 23286, |
| 81864 | /* VFMADD231PSZr */ |
| 81865 | 23291, |
| 81866 | /* VFMADD231PSZrb */ |
| 81867 | 23295, |
| 81868 | /* VFMADD231PSZrbk */ |
| 81869 | 23300, |
| 81870 | /* VFMADD231PSZrbkz */ |
| 81871 | 23306, |
| 81872 | /* VFMADD231PSZrk */ |
| 81873 | 23312, |
| 81874 | /* VFMADD231PSZrkz */ |
| 81875 | 23317, |
| 81876 | /* VFMADD231PSm */ |
| 81877 | 23322, |
| 81878 | /* VFMADD231PSr */ |
| 81879 | 23326, |
| 81880 | /* VFMADD231SDZm */ |
| 81881 | 23330, |
| 81882 | /* VFMADD231SDZm_Int */ |
| 81883 | 23334, |
| 81884 | /* VFMADD231SDZm_Intk */ |
| 81885 | 23338, |
| 81886 | /* VFMADD231SDZm_Intkz */ |
| 81887 | 23343, |
| 81888 | /* VFMADD231SDZr */ |
| 81889 | 23348, |
| 81890 | /* VFMADD231SDZr_Int */ |
| 81891 | 23352, |
| 81892 | /* VFMADD231SDZr_Intk */ |
| 81893 | 23356, |
| 81894 | /* VFMADD231SDZr_Intkz */ |
| 81895 | 23361, |
| 81896 | /* VFMADD231SDZrb */ |
| 81897 | 23366, |
| 81898 | /* VFMADD231SDZrb_Int */ |
| 81899 | 23371, |
| 81900 | /* VFMADD231SDZrb_Intk */ |
| 81901 | 23376, |
| 81902 | /* VFMADD231SDZrb_Intkz */ |
| 81903 | 23382, |
| 81904 | /* VFMADD231SDm */ |
| 81905 | 23388, |
| 81906 | /* VFMADD231SDm_Int */ |
| 81907 | 23392, |
| 81908 | /* VFMADD231SDr */ |
| 81909 | 23396, |
| 81910 | /* VFMADD231SDr_Int */ |
| 81911 | 23400, |
| 81912 | /* VFMADD231SHZm */ |
| 81913 | 23404, |
| 81914 | /* VFMADD231SHZm_Int */ |
| 81915 | 23408, |
| 81916 | /* VFMADD231SHZm_Intk */ |
| 81917 | 23412, |
| 81918 | /* VFMADD231SHZm_Intkz */ |
| 81919 | 23417, |
| 81920 | /* VFMADD231SHZr */ |
| 81921 | 23422, |
| 81922 | /* VFMADD231SHZr_Int */ |
| 81923 | 23426, |
| 81924 | /* VFMADD231SHZr_Intk */ |
| 81925 | 23430, |
| 81926 | /* VFMADD231SHZr_Intkz */ |
| 81927 | 23435, |
| 81928 | /* VFMADD231SHZrb */ |
| 81929 | 23440, |
| 81930 | /* VFMADD231SHZrb_Int */ |
| 81931 | 23445, |
| 81932 | /* VFMADD231SHZrb_Intk */ |
| 81933 | 23450, |
| 81934 | /* VFMADD231SHZrb_Intkz */ |
| 81935 | 23456, |
| 81936 | /* VFMADD231SSZm */ |
| 81937 | 23462, |
| 81938 | /* VFMADD231SSZm_Int */ |
| 81939 | 23466, |
| 81940 | /* VFMADD231SSZm_Intk */ |
| 81941 | 23470, |
| 81942 | /* VFMADD231SSZm_Intkz */ |
| 81943 | 23475, |
| 81944 | /* VFMADD231SSZr */ |
| 81945 | 23480, |
| 81946 | /* VFMADD231SSZr_Int */ |
| 81947 | 23484, |
| 81948 | /* VFMADD231SSZr_Intk */ |
| 81949 | 23488, |
| 81950 | /* VFMADD231SSZr_Intkz */ |
| 81951 | 23493, |
| 81952 | /* VFMADD231SSZrb */ |
| 81953 | 23498, |
| 81954 | /* VFMADD231SSZrb_Int */ |
| 81955 | 23503, |
| 81956 | /* VFMADD231SSZrb_Intk */ |
| 81957 | 23508, |
| 81958 | /* VFMADD231SSZrb_Intkz */ |
| 81959 | 23514, |
| 81960 | /* VFMADD231SSm */ |
| 81961 | 23520, |
| 81962 | /* VFMADD231SSm_Int */ |
| 81963 | 23524, |
| 81964 | /* VFMADD231SSr */ |
| 81965 | 23528, |
| 81966 | /* VFMADD231SSr_Int */ |
| 81967 | 23532, |
| 81968 | /* VFMADDCPHZ128m */ |
| 81969 | 23536, |
| 81970 | /* VFMADDCPHZ128mb */ |
| 81971 | 23540, |
| 81972 | /* VFMADDCPHZ128mbk */ |
| 81973 | 23544, |
| 81974 | /* VFMADDCPHZ128mbkz */ |
| 81975 | 23549, |
| 81976 | /* VFMADDCPHZ128mk */ |
| 81977 | 23554, |
| 81978 | /* VFMADDCPHZ128mkz */ |
| 81979 | 23559, |
| 81980 | /* VFMADDCPHZ128r */ |
| 81981 | 23564, |
| 81982 | /* VFMADDCPHZ128rk */ |
| 81983 | 23568, |
| 81984 | /* VFMADDCPHZ128rkz */ |
| 81985 | 23573, |
| 81986 | /* VFMADDCPHZ256m */ |
| 81987 | 23578, |
| 81988 | /* VFMADDCPHZ256mb */ |
| 81989 | 23582, |
| 81990 | /* VFMADDCPHZ256mbk */ |
| 81991 | 23586, |
| 81992 | /* VFMADDCPHZ256mbkz */ |
| 81993 | 23591, |
| 81994 | /* VFMADDCPHZ256mk */ |
| 81995 | 23596, |
| 81996 | /* VFMADDCPHZ256mkz */ |
| 81997 | 23601, |
| 81998 | /* VFMADDCPHZ256r */ |
| 81999 | 23606, |
| 82000 | /* VFMADDCPHZ256rk */ |
| 82001 | 23610, |
| 82002 | /* VFMADDCPHZ256rkz */ |
| 82003 | 23615, |
| 82004 | /* VFMADDCPHZm */ |
| 82005 | 23620, |
| 82006 | /* VFMADDCPHZmb */ |
| 82007 | 23624, |
| 82008 | /* VFMADDCPHZmbk */ |
| 82009 | 23628, |
| 82010 | /* VFMADDCPHZmbkz */ |
| 82011 | 23633, |
| 82012 | /* VFMADDCPHZmk */ |
| 82013 | 23638, |
| 82014 | /* VFMADDCPHZmkz */ |
| 82015 | 23643, |
| 82016 | /* VFMADDCPHZr */ |
| 82017 | 23648, |
| 82018 | /* VFMADDCPHZrb */ |
| 82019 | 23652, |
| 82020 | /* VFMADDCPHZrbk */ |
| 82021 | 23657, |
| 82022 | /* VFMADDCPHZrbkz */ |
| 82023 | 23663, |
| 82024 | /* VFMADDCPHZrk */ |
| 82025 | 23669, |
| 82026 | /* VFMADDCPHZrkz */ |
| 82027 | 23674, |
| 82028 | /* VFMADDCSHZm */ |
| 82029 | 23679, |
| 82030 | /* VFMADDCSHZmk */ |
| 82031 | 23683, |
| 82032 | /* VFMADDCSHZmkz */ |
| 82033 | 23688, |
| 82034 | /* VFMADDCSHZr */ |
| 82035 | 23693, |
| 82036 | /* VFMADDCSHZrb */ |
| 82037 | 23697, |
| 82038 | /* VFMADDCSHZrbk */ |
| 82039 | 23702, |
| 82040 | /* VFMADDCSHZrbkz */ |
| 82041 | 23708, |
| 82042 | /* VFMADDCSHZrk */ |
| 82043 | 23714, |
| 82044 | /* VFMADDCSHZrkz */ |
| 82045 | 23719, |
| 82046 | /* VFMADDPD4Ymr */ |
| 82047 | 23724, |
| 82048 | /* VFMADDPD4Yrm */ |
| 82049 | 23728, |
| 82050 | /* VFMADDPD4Yrr */ |
| 82051 | 23732, |
| 82052 | /* VFMADDPD4Yrr_REV */ |
| 82053 | 23736, |
| 82054 | /* VFMADDPD4mr */ |
| 82055 | 23740, |
| 82056 | /* VFMADDPD4rm */ |
| 82057 | 23744, |
| 82058 | /* VFMADDPD4rr */ |
| 82059 | 23748, |
| 82060 | /* VFMADDPD4rr_REV */ |
| 82061 | 23752, |
| 82062 | /* VFMADDPS4Ymr */ |
| 82063 | 23756, |
| 82064 | /* VFMADDPS4Yrm */ |
| 82065 | 23760, |
| 82066 | /* VFMADDPS4Yrr */ |
| 82067 | 23764, |
| 82068 | /* VFMADDPS4Yrr_REV */ |
| 82069 | 23768, |
| 82070 | /* VFMADDPS4mr */ |
| 82071 | 23772, |
| 82072 | /* VFMADDPS4rm */ |
| 82073 | 23776, |
| 82074 | /* VFMADDPS4rr */ |
| 82075 | 23780, |
| 82076 | /* VFMADDPS4rr_REV */ |
| 82077 | 23784, |
| 82078 | /* VFMADDSD4mr */ |
| 82079 | 23788, |
| 82080 | /* VFMADDSD4mr_Int */ |
| 82081 | 23792, |
| 82082 | /* VFMADDSD4rm */ |
| 82083 | 23796, |
| 82084 | /* VFMADDSD4rm_Int */ |
| 82085 | 23800, |
| 82086 | /* VFMADDSD4rr */ |
| 82087 | 23804, |
| 82088 | /* VFMADDSD4rr_Int */ |
| 82089 | 23808, |
| 82090 | /* VFMADDSD4rr_Int_REV */ |
| 82091 | 23812, |
| 82092 | /* VFMADDSD4rr_REV */ |
| 82093 | 23816, |
| 82094 | /* VFMADDSS4mr */ |
| 82095 | 23820, |
| 82096 | /* VFMADDSS4mr_Int */ |
| 82097 | 23824, |
| 82098 | /* VFMADDSS4rm */ |
| 82099 | 23828, |
| 82100 | /* VFMADDSS4rm_Int */ |
| 82101 | 23832, |
| 82102 | /* VFMADDSS4rr */ |
| 82103 | 23836, |
| 82104 | /* VFMADDSS4rr_Int */ |
| 82105 | 23840, |
| 82106 | /* VFMADDSS4rr_Int_REV */ |
| 82107 | 23844, |
| 82108 | /* VFMADDSS4rr_REV */ |
| 82109 | 23848, |
| 82110 | /* VFMADDSUB132PDYm */ |
| 82111 | 23852, |
| 82112 | /* VFMADDSUB132PDYr */ |
| 82113 | 23856, |
| 82114 | /* VFMADDSUB132PDZ128m */ |
| 82115 | 23860, |
| 82116 | /* VFMADDSUB132PDZ128mb */ |
| 82117 | 23864, |
| 82118 | /* VFMADDSUB132PDZ128mbk */ |
| 82119 | 23868, |
| 82120 | /* VFMADDSUB132PDZ128mbkz */ |
| 82121 | 23873, |
| 82122 | /* VFMADDSUB132PDZ128mk */ |
| 82123 | 23878, |
| 82124 | /* VFMADDSUB132PDZ128mkz */ |
| 82125 | 23883, |
| 82126 | /* VFMADDSUB132PDZ128r */ |
| 82127 | 23888, |
| 82128 | /* VFMADDSUB132PDZ128rk */ |
| 82129 | 23892, |
| 82130 | /* VFMADDSUB132PDZ128rkz */ |
| 82131 | 23897, |
| 82132 | /* VFMADDSUB132PDZ256m */ |
| 82133 | 23902, |
| 82134 | /* VFMADDSUB132PDZ256mb */ |
| 82135 | 23906, |
| 82136 | /* VFMADDSUB132PDZ256mbk */ |
| 82137 | 23910, |
| 82138 | /* VFMADDSUB132PDZ256mbkz */ |
| 82139 | 23915, |
| 82140 | /* VFMADDSUB132PDZ256mk */ |
| 82141 | 23920, |
| 82142 | /* VFMADDSUB132PDZ256mkz */ |
| 82143 | 23925, |
| 82144 | /* VFMADDSUB132PDZ256r */ |
| 82145 | 23930, |
| 82146 | /* VFMADDSUB132PDZ256rk */ |
| 82147 | 23934, |
| 82148 | /* VFMADDSUB132PDZ256rkz */ |
| 82149 | 23939, |
| 82150 | /* VFMADDSUB132PDZm */ |
| 82151 | 23944, |
| 82152 | /* VFMADDSUB132PDZmb */ |
| 82153 | 23948, |
| 82154 | /* VFMADDSUB132PDZmbk */ |
| 82155 | 23952, |
| 82156 | /* VFMADDSUB132PDZmbkz */ |
| 82157 | 23957, |
| 82158 | /* VFMADDSUB132PDZmk */ |
| 82159 | 23962, |
| 82160 | /* VFMADDSUB132PDZmkz */ |
| 82161 | 23967, |
| 82162 | /* VFMADDSUB132PDZr */ |
| 82163 | 23972, |
| 82164 | /* VFMADDSUB132PDZrb */ |
| 82165 | 23976, |
| 82166 | /* VFMADDSUB132PDZrbk */ |
| 82167 | 23981, |
| 82168 | /* VFMADDSUB132PDZrbkz */ |
| 82169 | 23987, |
| 82170 | /* VFMADDSUB132PDZrk */ |
| 82171 | 23993, |
| 82172 | /* VFMADDSUB132PDZrkz */ |
| 82173 | 23998, |
| 82174 | /* VFMADDSUB132PDm */ |
| 82175 | 24003, |
| 82176 | /* VFMADDSUB132PDr */ |
| 82177 | 24007, |
| 82178 | /* VFMADDSUB132PHZ128m */ |
| 82179 | 24011, |
| 82180 | /* VFMADDSUB132PHZ128mb */ |
| 82181 | 24015, |
| 82182 | /* VFMADDSUB132PHZ128mbk */ |
| 82183 | 24019, |
| 82184 | /* VFMADDSUB132PHZ128mbkz */ |
| 82185 | 24024, |
| 82186 | /* VFMADDSUB132PHZ128mk */ |
| 82187 | 24029, |
| 82188 | /* VFMADDSUB132PHZ128mkz */ |
| 82189 | 24034, |
| 82190 | /* VFMADDSUB132PHZ128r */ |
| 82191 | 24039, |
| 82192 | /* VFMADDSUB132PHZ128rk */ |
| 82193 | 24043, |
| 82194 | /* VFMADDSUB132PHZ128rkz */ |
| 82195 | 24048, |
| 82196 | /* VFMADDSUB132PHZ256m */ |
| 82197 | 24053, |
| 82198 | /* VFMADDSUB132PHZ256mb */ |
| 82199 | 24057, |
| 82200 | /* VFMADDSUB132PHZ256mbk */ |
| 82201 | 24061, |
| 82202 | /* VFMADDSUB132PHZ256mbkz */ |
| 82203 | 24066, |
| 82204 | /* VFMADDSUB132PHZ256mk */ |
| 82205 | 24071, |
| 82206 | /* VFMADDSUB132PHZ256mkz */ |
| 82207 | 24076, |
| 82208 | /* VFMADDSUB132PHZ256r */ |
| 82209 | 24081, |
| 82210 | /* VFMADDSUB132PHZ256rk */ |
| 82211 | 24085, |
| 82212 | /* VFMADDSUB132PHZ256rkz */ |
| 82213 | 24090, |
| 82214 | /* VFMADDSUB132PHZm */ |
| 82215 | 24095, |
| 82216 | /* VFMADDSUB132PHZmb */ |
| 82217 | 24099, |
| 82218 | /* VFMADDSUB132PHZmbk */ |
| 82219 | 24103, |
| 82220 | /* VFMADDSUB132PHZmbkz */ |
| 82221 | 24108, |
| 82222 | /* VFMADDSUB132PHZmk */ |
| 82223 | 24113, |
| 82224 | /* VFMADDSUB132PHZmkz */ |
| 82225 | 24118, |
| 82226 | /* VFMADDSUB132PHZr */ |
| 82227 | 24123, |
| 82228 | /* VFMADDSUB132PHZrb */ |
| 82229 | 24127, |
| 82230 | /* VFMADDSUB132PHZrbk */ |
| 82231 | 24132, |
| 82232 | /* VFMADDSUB132PHZrbkz */ |
| 82233 | 24138, |
| 82234 | /* VFMADDSUB132PHZrk */ |
| 82235 | 24144, |
| 82236 | /* VFMADDSUB132PHZrkz */ |
| 82237 | 24149, |
| 82238 | /* VFMADDSUB132PSYm */ |
| 82239 | 24154, |
| 82240 | /* VFMADDSUB132PSYr */ |
| 82241 | 24158, |
| 82242 | /* VFMADDSUB132PSZ128m */ |
| 82243 | 24162, |
| 82244 | /* VFMADDSUB132PSZ128mb */ |
| 82245 | 24166, |
| 82246 | /* VFMADDSUB132PSZ128mbk */ |
| 82247 | 24170, |
| 82248 | /* VFMADDSUB132PSZ128mbkz */ |
| 82249 | 24175, |
| 82250 | /* VFMADDSUB132PSZ128mk */ |
| 82251 | 24180, |
| 82252 | /* VFMADDSUB132PSZ128mkz */ |
| 82253 | 24185, |
| 82254 | /* VFMADDSUB132PSZ128r */ |
| 82255 | 24190, |
| 82256 | /* VFMADDSUB132PSZ128rk */ |
| 82257 | 24194, |
| 82258 | /* VFMADDSUB132PSZ128rkz */ |
| 82259 | 24199, |
| 82260 | /* VFMADDSUB132PSZ256m */ |
| 82261 | 24204, |
| 82262 | /* VFMADDSUB132PSZ256mb */ |
| 82263 | 24208, |
| 82264 | /* VFMADDSUB132PSZ256mbk */ |
| 82265 | 24212, |
| 82266 | /* VFMADDSUB132PSZ256mbkz */ |
| 82267 | 24217, |
| 82268 | /* VFMADDSUB132PSZ256mk */ |
| 82269 | 24222, |
| 82270 | /* VFMADDSUB132PSZ256mkz */ |
| 82271 | 24227, |
| 82272 | /* VFMADDSUB132PSZ256r */ |
| 82273 | 24232, |
| 82274 | /* VFMADDSUB132PSZ256rk */ |
| 82275 | 24236, |
| 82276 | /* VFMADDSUB132PSZ256rkz */ |
| 82277 | 24241, |
| 82278 | /* VFMADDSUB132PSZm */ |
| 82279 | 24246, |
| 82280 | /* VFMADDSUB132PSZmb */ |
| 82281 | 24250, |
| 82282 | /* VFMADDSUB132PSZmbk */ |
| 82283 | 24254, |
| 82284 | /* VFMADDSUB132PSZmbkz */ |
| 82285 | 24259, |
| 82286 | /* VFMADDSUB132PSZmk */ |
| 82287 | 24264, |
| 82288 | /* VFMADDSUB132PSZmkz */ |
| 82289 | 24269, |
| 82290 | /* VFMADDSUB132PSZr */ |
| 82291 | 24274, |
| 82292 | /* VFMADDSUB132PSZrb */ |
| 82293 | 24278, |
| 82294 | /* VFMADDSUB132PSZrbk */ |
| 82295 | 24283, |
| 82296 | /* VFMADDSUB132PSZrbkz */ |
| 82297 | 24289, |
| 82298 | /* VFMADDSUB132PSZrk */ |
| 82299 | 24295, |
| 82300 | /* VFMADDSUB132PSZrkz */ |
| 82301 | 24300, |
| 82302 | /* VFMADDSUB132PSm */ |
| 82303 | 24305, |
| 82304 | /* VFMADDSUB132PSr */ |
| 82305 | 24309, |
| 82306 | /* VFMADDSUB213PDYm */ |
| 82307 | 24313, |
| 82308 | /* VFMADDSUB213PDYr */ |
| 82309 | 24317, |
| 82310 | /* VFMADDSUB213PDZ128m */ |
| 82311 | 24321, |
| 82312 | /* VFMADDSUB213PDZ128mb */ |
| 82313 | 24325, |
| 82314 | /* VFMADDSUB213PDZ128mbk */ |
| 82315 | 24329, |
| 82316 | /* VFMADDSUB213PDZ128mbkz */ |
| 82317 | 24334, |
| 82318 | /* VFMADDSUB213PDZ128mk */ |
| 82319 | 24339, |
| 82320 | /* VFMADDSUB213PDZ128mkz */ |
| 82321 | 24344, |
| 82322 | /* VFMADDSUB213PDZ128r */ |
| 82323 | 24349, |
| 82324 | /* VFMADDSUB213PDZ128rk */ |
| 82325 | 24353, |
| 82326 | /* VFMADDSUB213PDZ128rkz */ |
| 82327 | 24358, |
| 82328 | /* VFMADDSUB213PDZ256m */ |
| 82329 | 24363, |
| 82330 | /* VFMADDSUB213PDZ256mb */ |
| 82331 | 24367, |
| 82332 | /* VFMADDSUB213PDZ256mbk */ |
| 82333 | 24371, |
| 82334 | /* VFMADDSUB213PDZ256mbkz */ |
| 82335 | 24376, |
| 82336 | /* VFMADDSUB213PDZ256mk */ |
| 82337 | 24381, |
| 82338 | /* VFMADDSUB213PDZ256mkz */ |
| 82339 | 24386, |
| 82340 | /* VFMADDSUB213PDZ256r */ |
| 82341 | 24391, |
| 82342 | /* VFMADDSUB213PDZ256rk */ |
| 82343 | 24395, |
| 82344 | /* VFMADDSUB213PDZ256rkz */ |
| 82345 | 24400, |
| 82346 | /* VFMADDSUB213PDZm */ |
| 82347 | 24405, |
| 82348 | /* VFMADDSUB213PDZmb */ |
| 82349 | 24409, |
| 82350 | /* VFMADDSUB213PDZmbk */ |
| 82351 | 24413, |
| 82352 | /* VFMADDSUB213PDZmbkz */ |
| 82353 | 24418, |
| 82354 | /* VFMADDSUB213PDZmk */ |
| 82355 | 24423, |
| 82356 | /* VFMADDSUB213PDZmkz */ |
| 82357 | 24428, |
| 82358 | /* VFMADDSUB213PDZr */ |
| 82359 | 24433, |
| 82360 | /* VFMADDSUB213PDZrb */ |
| 82361 | 24437, |
| 82362 | /* VFMADDSUB213PDZrbk */ |
| 82363 | 24442, |
| 82364 | /* VFMADDSUB213PDZrbkz */ |
| 82365 | 24448, |
| 82366 | /* VFMADDSUB213PDZrk */ |
| 82367 | 24454, |
| 82368 | /* VFMADDSUB213PDZrkz */ |
| 82369 | 24459, |
| 82370 | /* VFMADDSUB213PDm */ |
| 82371 | 24464, |
| 82372 | /* VFMADDSUB213PDr */ |
| 82373 | 24468, |
| 82374 | /* VFMADDSUB213PHZ128m */ |
| 82375 | 24472, |
| 82376 | /* VFMADDSUB213PHZ128mb */ |
| 82377 | 24476, |
| 82378 | /* VFMADDSUB213PHZ128mbk */ |
| 82379 | 24480, |
| 82380 | /* VFMADDSUB213PHZ128mbkz */ |
| 82381 | 24485, |
| 82382 | /* VFMADDSUB213PHZ128mk */ |
| 82383 | 24490, |
| 82384 | /* VFMADDSUB213PHZ128mkz */ |
| 82385 | 24495, |
| 82386 | /* VFMADDSUB213PHZ128r */ |
| 82387 | 24500, |
| 82388 | /* VFMADDSUB213PHZ128rk */ |
| 82389 | 24504, |
| 82390 | /* VFMADDSUB213PHZ128rkz */ |
| 82391 | 24509, |
| 82392 | /* VFMADDSUB213PHZ256m */ |
| 82393 | 24514, |
| 82394 | /* VFMADDSUB213PHZ256mb */ |
| 82395 | 24518, |
| 82396 | /* VFMADDSUB213PHZ256mbk */ |
| 82397 | 24522, |
| 82398 | /* VFMADDSUB213PHZ256mbkz */ |
| 82399 | 24527, |
| 82400 | /* VFMADDSUB213PHZ256mk */ |
| 82401 | 24532, |
| 82402 | /* VFMADDSUB213PHZ256mkz */ |
| 82403 | 24537, |
| 82404 | /* VFMADDSUB213PHZ256r */ |
| 82405 | 24542, |
| 82406 | /* VFMADDSUB213PHZ256rk */ |
| 82407 | 24546, |
| 82408 | /* VFMADDSUB213PHZ256rkz */ |
| 82409 | 24551, |
| 82410 | /* VFMADDSUB213PHZm */ |
| 82411 | 24556, |
| 82412 | /* VFMADDSUB213PHZmb */ |
| 82413 | 24560, |
| 82414 | /* VFMADDSUB213PHZmbk */ |
| 82415 | 24564, |
| 82416 | /* VFMADDSUB213PHZmbkz */ |
| 82417 | 24569, |
| 82418 | /* VFMADDSUB213PHZmk */ |
| 82419 | 24574, |
| 82420 | /* VFMADDSUB213PHZmkz */ |
| 82421 | 24579, |
| 82422 | /* VFMADDSUB213PHZr */ |
| 82423 | 24584, |
| 82424 | /* VFMADDSUB213PHZrb */ |
| 82425 | 24588, |
| 82426 | /* VFMADDSUB213PHZrbk */ |
| 82427 | 24593, |
| 82428 | /* VFMADDSUB213PHZrbkz */ |
| 82429 | 24599, |
| 82430 | /* VFMADDSUB213PHZrk */ |
| 82431 | 24605, |
| 82432 | /* VFMADDSUB213PHZrkz */ |
| 82433 | 24610, |
| 82434 | /* VFMADDSUB213PSYm */ |
| 82435 | 24615, |
| 82436 | /* VFMADDSUB213PSYr */ |
| 82437 | 24619, |
| 82438 | /* VFMADDSUB213PSZ128m */ |
| 82439 | 24623, |
| 82440 | /* VFMADDSUB213PSZ128mb */ |
| 82441 | 24627, |
| 82442 | /* VFMADDSUB213PSZ128mbk */ |
| 82443 | 24631, |
| 82444 | /* VFMADDSUB213PSZ128mbkz */ |
| 82445 | 24636, |
| 82446 | /* VFMADDSUB213PSZ128mk */ |
| 82447 | 24641, |
| 82448 | /* VFMADDSUB213PSZ128mkz */ |
| 82449 | 24646, |
| 82450 | /* VFMADDSUB213PSZ128r */ |
| 82451 | 24651, |
| 82452 | /* VFMADDSUB213PSZ128rk */ |
| 82453 | 24655, |
| 82454 | /* VFMADDSUB213PSZ128rkz */ |
| 82455 | 24660, |
| 82456 | /* VFMADDSUB213PSZ256m */ |
| 82457 | 24665, |
| 82458 | /* VFMADDSUB213PSZ256mb */ |
| 82459 | 24669, |
| 82460 | /* VFMADDSUB213PSZ256mbk */ |
| 82461 | 24673, |
| 82462 | /* VFMADDSUB213PSZ256mbkz */ |
| 82463 | 24678, |
| 82464 | /* VFMADDSUB213PSZ256mk */ |
| 82465 | 24683, |
| 82466 | /* VFMADDSUB213PSZ256mkz */ |
| 82467 | 24688, |
| 82468 | /* VFMADDSUB213PSZ256r */ |
| 82469 | 24693, |
| 82470 | /* VFMADDSUB213PSZ256rk */ |
| 82471 | 24697, |
| 82472 | /* VFMADDSUB213PSZ256rkz */ |
| 82473 | 24702, |
| 82474 | /* VFMADDSUB213PSZm */ |
| 82475 | 24707, |
| 82476 | /* VFMADDSUB213PSZmb */ |
| 82477 | 24711, |
| 82478 | /* VFMADDSUB213PSZmbk */ |
| 82479 | 24715, |
| 82480 | /* VFMADDSUB213PSZmbkz */ |
| 82481 | 24720, |
| 82482 | /* VFMADDSUB213PSZmk */ |
| 82483 | 24725, |
| 82484 | /* VFMADDSUB213PSZmkz */ |
| 82485 | 24730, |
| 82486 | /* VFMADDSUB213PSZr */ |
| 82487 | 24735, |
| 82488 | /* VFMADDSUB213PSZrb */ |
| 82489 | 24739, |
| 82490 | /* VFMADDSUB213PSZrbk */ |
| 82491 | 24744, |
| 82492 | /* VFMADDSUB213PSZrbkz */ |
| 82493 | 24750, |
| 82494 | /* VFMADDSUB213PSZrk */ |
| 82495 | 24756, |
| 82496 | /* VFMADDSUB213PSZrkz */ |
| 82497 | 24761, |
| 82498 | /* VFMADDSUB213PSm */ |
| 82499 | 24766, |
| 82500 | /* VFMADDSUB213PSr */ |
| 82501 | 24770, |
| 82502 | /* VFMADDSUB231PDYm */ |
| 82503 | 24774, |
| 82504 | /* VFMADDSUB231PDYr */ |
| 82505 | 24778, |
| 82506 | /* VFMADDSUB231PDZ128m */ |
| 82507 | 24782, |
| 82508 | /* VFMADDSUB231PDZ128mb */ |
| 82509 | 24786, |
| 82510 | /* VFMADDSUB231PDZ128mbk */ |
| 82511 | 24790, |
| 82512 | /* VFMADDSUB231PDZ128mbkz */ |
| 82513 | 24795, |
| 82514 | /* VFMADDSUB231PDZ128mk */ |
| 82515 | 24800, |
| 82516 | /* VFMADDSUB231PDZ128mkz */ |
| 82517 | 24805, |
| 82518 | /* VFMADDSUB231PDZ128r */ |
| 82519 | 24810, |
| 82520 | /* VFMADDSUB231PDZ128rk */ |
| 82521 | 24814, |
| 82522 | /* VFMADDSUB231PDZ128rkz */ |
| 82523 | 24819, |
| 82524 | /* VFMADDSUB231PDZ256m */ |
| 82525 | 24824, |
| 82526 | /* VFMADDSUB231PDZ256mb */ |
| 82527 | 24828, |
| 82528 | /* VFMADDSUB231PDZ256mbk */ |
| 82529 | 24832, |
| 82530 | /* VFMADDSUB231PDZ256mbkz */ |
| 82531 | 24837, |
| 82532 | /* VFMADDSUB231PDZ256mk */ |
| 82533 | 24842, |
| 82534 | /* VFMADDSUB231PDZ256mkz */ |
| 82535 | 24847, |
| 82536 | /* VFMADDSUB231PDZ256r */ |
| 82537 | 24852, |
| 82538 | /* VFMADDSUB231PDZ256rk */ |
| 82539 | 24856, |
| 82540 | /* VFMADDSUB231PDZ256rkz */ |
| 82541 | 24861, |
| 82542 | /* VFMADDSUB231PDZm */ |
| 82543 | 24866, |
| 82544 | /* VFMADDSUB231PDZmb */ |
| 82545 | 24870, |
| 82546 | /* VFMADDSUB231PDZmbk */ |
| 82547 | 24874, |
| 82548 | /* VFMADDSUB231PDZmbkz */ |
| 82549 | 24879, |
| 82550 | /* VFMADDSUB231PDZmk */ |
| 82551 | 24884, |
| 82552 | /* VFMADDSUB231PDZmkz */ |
| 82553 | 24889, |
| 82554 | /* VFMADDSUB231PDZr */ |
| 82555 | 24894, |
| 82556 | /* VFMADDSUB231PDZrb */ |
| 82557 | 24898, |
| 82558 | /* VFMADDSUB231PDZrbk */ |
| 82559 | 24903, |
| 82560 | /* VFMADDSUB231PDZrbkz */ |
| 82561 | 24909, |
| 82562 | /* VFMADDSUB231PDZrk */ |
| 82563 | 24915, |
| 82564 | /* VFMADDSUB231PDZrkz */ |
| 82565 | 24920, |
| 82566 | /* VFMADDSUB231PDm */ |
| 82567 | 24925, |
| 82568 | /* VFMADDSUB231PDr */ |
| 82569 | 24929, |
| 82570 | /* VFMADDSUB231PHZ128m */ |
| 82571 | 24933, |
| 82572 | /* VFMADDSUB231PHZ128mb */ |
| 82573 | 24937, |
| 82574 | /* VFMADDSUB231PHZ128mbk */ |
| 82575 | 24941, |
| 82576 | /* VFMADDSUB231PHZ128mbkz */ |
| 82577 | 24946, |
| 82578 | /* VFMADDSUB231PHZ128mk */ |
| 82579 | 24951, |
| 82580 | /* VFMADDSUB231PHZ128mkz */ |
| 82581 | 24956, |
| 82582 | /* VFMADDSUB231PHZ128r */ |
| 82583 | 24961, |
| 82584 | /* VFMADDSUB231PHZ128rk */ |
| 82585 | 24965, |
| 82586 | /* VFMADDSUB231PHZ128rkz */ |
| 82587 | 24970, |
| 82588 | /* VFMADDSUB231PHZ256m */ |
| 82589 | 24975, |
| 82590 | /* VFMADDSUB231PHZ256mb */ |
| 82591 | 24979, |
| 82592 | /* VFMADDSUB231PHZ256mbk */ |
| 82593 | 24983, |
| 82594 | /* VFMADDSUB231PHZ256mbkz */ |
| 82595 | 24988, |
| 82596 | /* VFMADDSUB231PHZ256mk */ |
| 82597 | 24993, |
| 82598 | /* VFMADDSUB231PHZ256mkz */ |
| 82599 | 24998, |
| 82600 | /* VFMADDSUB231PHZ256r */ |
| 82601 | 25003, |
| 82602 | /* VFMADDSUB231PHZ256rk */ |
| 82603 | 25007, |
| 82604 | /* VFMADDSUB231PHZ256rkz */ |
| 82605 | 25012, |
| 82606 | /* VFMADDSUB231PHZm */ |
| 82607 | 25017, |
| 82608 | /* VFMADDSUB231PHZmb */ |
| 82609 | 25021, |
| 82610 | /* VFMADDSUB231PHZmbk */ |
| 82611 | 25025, |
| 82612 | /* VFMADDSUB231PHZmbkz */ |
| 82613 | 25030, |
| 82614 | /* VFMADDSUB231PHZmk */ |
| 82615 | 25035, |
| 82616 | /* VFMADDSUB231PHZmkz */ |
| 82617 | 25040, |
| 82618 | /* VFMADDSUB231PHZr */ |
| 82619 | 25045, |
| 82620 | /* VFMADDSUB231PHZrb */ |
| 82621 | 25049, |
| 82622 | /* VFMADDSUB231PHZrbk */ |
| 82623 | 25054, |
| 82624 | /* VFMADDSUB231PHZrbkz */ |
| 82625 | 25060, |
| 82626 | /* VFMADDSUB231PHZrk */ |
| 82627 | 25066, |
| 82628 | /* VFMADDSUB231PHZrkz */ |
| 82629 | 25071, |
| 82630 | /* VFMADDSUB231PSYm */ |
| 82631 | 25076, |
| 82632 | /* VFMADDSUB231PSYr */ |
| 82633 | 25080, |
| 82634 | /* VFMADDSUB231PSZ128m */ |
| 82635 | 25084, |
| 82636 | /* VFMADDSUB231PSZ128mb */ |
| 82637 | 25088, |
| 82638 | /* VFMADDSUB231PSZ128mbk */ |
| 82639 | 25092, |
| 82640 | /* VFMADDSUB231PSZ128mbkz */ |
| 82641 | 25097, |
| 82642 | /* VFMADDSUB231PSZ128mk */ |
| 82643 | 25102, |
| 82644 | /* VFMADDSUB231PSZ128mkz */ |
| 82645 | 25107, |
| 82646 | /* VFMADDSUB231PSZ128r */ |
| 82647 | 25112, |
| 82648 | /* VFMADDSUB231PSZ128rk */ |
| 82649 | 25116, |
| 82650 | /* VFMADDSUB231PSZ128rkz */ |
| 82651 | 25121, |
| 82652 | /* VFMADDSUB231PSZ256m */ |
| 82653 | 25126, |
| 82654 | /* VFMADDSUB231PSZ256mb */ |
| 82655 | 25130, |
| 82656 | /* VFMADDSUB231PSZ256mbk */ |
| 82657 | 25134, |
| 82658 | /* VFMADDSUB231PSZ256mbkz */ |
| 82659 | 25139, |
| 82660 | /* VFMADDSUB231PSZ256mk */ |
| 82661 | 25144, |
| 82662 | /* VFMADDSUB231PSZ256mkz */ |
| 82663 | 25149, |
| 82664 | /* VFMADDSUB231PSZ256r */ |
| 82665 | 25154, |
| 82666 | /* VFMADDSUB231PSZ256rk */ |
| 82667 | 25158, |
| 82668 | /* VFMADDSUB231PSZ256rkz */ |
| 82669 | 25163, |
| 82670 | /* VFMADDSUB231PSZm */ |
| 82671 | 25168, |
| 82672 | /* VFMADDSUB231PSZmb */ |
| 82673 | 25172, |
| 82674 | /* VFMADDSUB231PSZmbk */ |
| 82675 | 25176, |
| 82676 | /* VFMADDSUB231PSZmbkz */ |
| 82677 | 25181, |
| 82678 | /* VFMADDSUB231PSZmk */ |
| 82679 | 25186, |
| 82680 | /* VFMADDSUB231PSZmkz */ |
| 82681 | 25191, |
| 82682 | /* VFMADDSUB231PSZr */ |
| 82683 | 25196, |
| 82684 | /* VFMADDSUB231PSZrb */ |
| 82685 | 25200, |
| 82686 | /* VFMADDSUB231PSZrbk */ |
| 82687 | 25205, |
| 82688 | /* VFMADDSUB231PSZrbkz */ |
| 82689 | 25211, |
| 82690 | /* VFMADDSUB231PSZrk */ |
| 82691 | 25217, |
| 82692 | /* VFMADDSUB231PSZrkz */ |
| 82693 | 25222, |
| 82694 | /* VFMADDSUB231PSm */ |
| 82695 | 25227, |
| 82696 | /* VFMADDSUB231PSr */ |
| 82697 | 25231, |
| 82698 | /* VFMADDSUBPD4Ymr */ |
| 82699 | 25235, |
| 82700 | /* VFMADDSUBPD4Yrm */ |
| 82701 | 25239, |
| 82702 | /* VFMADDSUBPD4Yrr */ |
| 82703 | 25243, |
| 82704 | /* VFMADDSUBPD4Yrr_REV */ |
| 82705 | 25247, |
| 82706 | /* VFMADDSUBPD4mr */ |
| 82707 | 25251, |
| 82708 | /* VFMADDSUBPD4rm */ |
| 82709 | 25255, |
| 82710 | /* VFMADDSUBPD4rr */ |
| 82711 | 25259, |
| 82712 | /* VFMADDSUBPD4rr_REV */ |
| 82713 | 25263, |
| 82714 | /* VFMADDSUBPS4Ymr */ |
| 82715 | 25267, |
| 82716 | /* VFMADDSUBPS4Yrm */ |
| 82717 | 25271, |
| 82718 | /* VFMADDSUBPS4Yrr */ |
| 82719 | 25275, |
| 82720 | /* VFMADDSUBPS4Yrr_REV */ |
| 82721 | 25279, |
| 82722 | /* VFMADDSUBPS4mr */ |
| 82723 | 25283, |
| 82724 | /* VFMADDSUBPS4rm */ |
| 82725 | 25287, |
| 82726 | /* VFMADDSUBPS4rr */ |
| 82727 | 25291, |
| 82728 | /* VFMADDSUBPS4rr_REV */ |
| 82729 | 25295, |
| 82730 | /* VFMSUB132PDYm */ |
| 82731 | 25299, |
| 82732 | /* VFMSUB132PDYr */ |
| 82733 | 25303, |
| 82734 | /* VFMSUB132PDZ128m */ |
| 82735 | 25307, |
| 82736 | /* VFMSUB132PDZ128mb */ |
| 82737 | 25311, |
| 82738 | /* VFMSUB132PDZ128mbk */ |
| 82739 | 25315, |
| 82740 | /* VFMSUB132PDZ128mbkz */ |
| 82741 | 25320, |
| 82742 | /* VFMSUB132PDZ128mk */ |
| 82743 | 25325, |
| 82744 | /* VFMSUB132PDZ128mkz */ |
| 82745 | 25330, |
| 82746 | /* VFMSUB132PDZ128r */ |
| 82747 | 25335, |
| 82748 | /* VFMSUB132PDZ128rk */ |
| 82749 | 25339, |
| 82750 | /* VFMSUB132PDZ128rkz */ |
| 82751 | 25344, |
| 82752 | /* VFMSUB132PDZ256m */ |
| 82753 | 25349, |
| 82754 | /* VFMSUB132PDZ256mb */ |
| 82755 | 25353, |
| 82756 | /* VFMSUB132PDZ256mbk */ |
| 82757 | 25357, |
| 82758 | /* VFMSUB132PDZ256mbkz */ |
| 82759 | 25362, |
| 82760 | /* VFMSUB132PDZ256mk */ |
| 82761 | 25367, |
| 82762 | /* VFMSUB132PDZ256mkz */ |
| 82763 | 25372, |
| 82764 | /* VFMSUB132PDZ256r */ |
| 82765 | 25377, |
| 82766 | /* VFMSUB132PDZ256rk */ |
| 82767 | 25381, |
| 82768 | /* VFMSUB132PDZ256rkz */ |
| 82769 | 25386, |
| 82770 | /* VFMSUB132PDZm */ |
| 82771 | 25391, |
| 82772 | /* VFMSUB132PDZmb */ |
| 82773 | 25395, |
| 82774 | /* VFMSUB132PDZmbk */ |
| 82775 | 25399, |
| 82776 | /* VFMSUB132PDZmbkz */ |
| 82777 | 25404, |
| 82778 | /* VFMSUB132PDZmk */ |
| 82779 | 25409, |
| 82780 | /* VFMSUB132PDZmkz */ |
| 82781 | 25414, |
| 82782 | /* VFMSUB132PDZr */ |
| 82783 | 25419, |
| 82784 | /* VFMSUB132PDZrb */ |
| 82785 | 25423, |
| 82786 | /* VFMSUB132PDZrbk */ |
| 82787 | 25428, |
| 82788 | /* VFMSUB132PDZrbkz */ |
| 82789 | 25434, |
| 82790 | /* VFMSUB132PDZrk */ |
| 82791 | 25440, |
| 82792 | /* VFMSUB132PDZrkz */ |
| 82793 | 25445, |
| 82794 | /* VFMSUB132PDm */ |
| 82795 | 25450, |
| 82796 | /* VFMSUB132PDr */ |
| 82797 | 25454, |
| 82798 | /* VFMSUB132PHZ128m */ |
| 82799 | 25458, |
| 82800 | /* VFMSUB132PHZ128mb */ |
| 82801 | 25462, |
| 82802 | /* VFMSUB132PHZ128mbk */ |
| 82803 | 25466, |
| 82804 | /* VFMSUB132PHZ128mbkz */ |
| 82805 | 25471, |
| 82806 | /* VFMSUB132PHZ128mk */ |
| 82807 | 25476, |
| 82808 | /* VFMSUB132PHZ128mkz */ |
| 82809 | 25481, |
| 82810 | /* VFMSUB132PHZ128r */ |
| 82811 | 25486, |
| 82812 | /* VFMSUB132PHZ128rk */ |
| 82813 | 25490, |
| 82814 | /* VFMSUB132PHZ128rkz */ |
| 82815 | 25495, |
| 82816 | /* VFMSUB132PHZ256m */ |
| 82817 | 25500, |
| 82818 | /* VFMSUB132PHZ256mb */ |
| 82819 | 25504, |
| 82820 | /* VFMSUB132PHZ256mbk */ |
| 82821 | 25508, |
| 82822 | /* VFMSUB132PHZ256mbkz */ |
| 82823 | 25513, |
| 82824 | /* VFMSUB132PHZ256mk */ |
| 82825 | 25518, |
| 82826 | /* VFMSUB132PHZ256mkz */ |
| 82827 | 25523, |
| 82828 | /* VFMSUB132PHZ256r */ |
| 82829 | 25528, |
| 82830 | /* VFMSUB132PHZ256rk */ |
| 82831 | 25532, |
| 82832 | /* VFMSUB132PHZ256rkz */ |
| 82833 | 25537, |
| 82834 | /* VFMSUB132PHZm */ |
| 82835 | 25542, |
| 82836 | /* VFMSUB132PHZmb */ |
| 82837 | 25546, |
| 82838 | /* VFMSUB132PHZmbk */ |
| 82839 | 25550, |
| 82840 | /* VFMSUB132PHZmbkz */ |
| 82841 | 25555, |
| 82842 | /* VFMSUB132PHZmk */ |
| 82843 | 25560, |
| 82844 | /* VFMSUB132PHZmkz */ |
| 82845 | 25565, |
| 82846 | /* VFMSUB132PHZr */ |
| 82847 | 25570, |
| 82848 | /* VFMSUB132PHZrb */ |
| 82849 | 25574, |
| 82850 | /* VFMSUB132PHZrbk */ |
| 82851 | 25579, |
| 82852 | /* VFMSUB132PHZrbkz */ |
| 82853 | 25585, |
| 82854 | /* VFMSUB132PHZrk */ |
| 82855 | 25591, |
| 82856 | /* VFMSUB132PHZrkz */ |
| 82857 | 25596, |
| 82858 | /* VFMSUB132PSYm */ |
| 82859 | 25601, |
| 82860 | /* VFMSUB132PSYr */ |
| 82861 | 25605, |
| 82862 | /* VFMSUB132PSZ128m */ |
| 82863 | 25609, |
| 82864 | /* VFMSUB132PSZ128mb */ |
| 82865 | 25613, |
| 82866 | /* VFMSUB132PSZ128mbk */ |
| 82867 | 25617, |
| 82868 | /* VFMSUB132PSZ128mbkz */ |
| 82869 | 25622, |
| 82870 | /* VFMSUB132PSZ128mk */ |
| 82871 | 25627, |
| 82872 | /* VFMSUB132PSZ128mkz */ |
| 82873 | 25632, |
| 82874 | /* VFMSUB132PSZ128r */ |
| 82875 | 25637, |
| 82876 | /* VFMSUB132PSZ128rk */ |
| 82877 | 25641, |
| 82878 | /* VFMSUB132PSZ128rkz */ |
| 82879 | 25646, |
| 82880 | /* VFMSUB132PSZ256m */ |
| 82881 | 25651, |
| 82882 | /* VFMSUB132PSZ256mb */ |
| 82883 | 25655, |
| 82884 | /* VFMSUB132PSZ256mbk */ |
| 82885 | 25659, |
| 82886 | /* VFMSUB132PSZ256mbkz */ |
| 82887 | 25664, |
| 82888 | /* VFMSUB132PSZ256mk */ |
| 82889 | 25669, |
| 82890 | /* VFMSUB132PSZ256mkz */ |
| 82891 | 25674, |
| 82892 | /* VFMSUB132PSZ256r */ |
| 82893 | 25679, |
| 82894 | /* VFMSUB132PSZ256rk */ |
| 82895 | 25683, |
| 82896 | /* VFMSUB132PSZ256rkz */ |
| 82897 | 25688, |
| 82898 | /* VFMSUB132PSZm */ |
| 82899 | 25693, |
| 82900 | /* VFMSUB132PSZmb */ |
| 82901 | 25697, |
| 82902 | /* VFMSUB132PSZmbk */ |
| 82903 | 25701, |
| 82904 | /* VFMSUB132PSZmbkz */ |
| 82905 | 25706, |
| 82906 | /* VFMSUB132PSZmk */ |
| 82907 | 25711, |
| 82908 | /* VFMSUB132PSZmkz */ |
| 82909 | 25716, |
| 82910 | /* VFMSUB132PSZr */ |
| 82911 | 25721, |
| 82912 | /* VFMSUB132PSZrb */ |
| 82913 | 25725, |
| 82914 | /* VFMSUB132PSZrbk */ |
| 82915 | 25730, |
| 82916 | /* VFMSUB132PSZrbkz */ |
| 82917 | 25736, |
| 82918 | /* VFMSUB132PSZrk */ |
| 82919 | 25742, |
| 82920 | /* VFMSUB132PSZrkz */ |
| 82921 | 25747, |
| 82922 | /* VFMSUB132PSm */ |
| 82923 | 25752, |
| 82924 | /* VFMSUB132PSr */ |
| 82925 | 25756, |
| 82926 | /* VFMSUB132SDZm */ |
| 82927 | 25760, |
| 82928 | /* VFMSUB132SDZm_Int */ |
| 82929 | 25764, |
| 82930 | /* VFMSUB132SDZm_Intk */ |
| 82931 | 25768, |
| 82932 | /* VFMSUB132SDZm_Intkz */ |
| 82933 | 25773, |
| 82934 | /* VFMSUB132SDZr */ |
| 82935 | 25778, |
| 82936 | /* VFMSUB132SDZr_Int */ |
| 82937 | 25782, |
| 82938 | /* VFMSUB132SDZr_Intk */ |
| 82939 | 25786, |
| 82940 | /* VFMSUB132SDZr_Intkz */ |
| 82941 | 25791, |
| 82942 | /* VFMSUB132SDZrb */ |
| 82943 | 25796, |
| 82944 | /* VFMSUB132SDZrb_Int */ |
| 82945 | 25801, |
| 82946 | /* VFMSUB132SDZrb_Intk */ |
| 82947 | 25806, |
| 82948 | /* VFMSUB132SDZrb_Intkz */ |
| 82949 | 25812, |
| 82950 | /* VFMSUB132SDm */ |
| 82951 | 25818, |
| 82952 | /* VFMSUB132SDm_Int */ |
| 82953 | 25822, |
| 82954 | /* VFMSUB132SDr */ |
| 82955 | 25826, |
| 82956 | /* VFMSUB132SDr_Int */ |
| 82957 | 25830, |
| 82958 | /* VFMSUB132SHZm */ |
| 82959 | 25834, |
| 82960 | /* VFMSUB132SHZm_Int */ |
| 82961 | 25838, |
| 82962 | /* VFMSUB132SHZm_Intk */ |
| 82963 | 25842, |
| 82964 | /* VFMSUB132SHZm_Intkz */ |
| 82965 | 25847, |
| 82966 | /* VFMSUB132SHZr */ |
| 82967 | 25852, |
| 82968 | /* VFMSUB132SHZr_Int */ |
| 82969 | 25856, |
| 82970 | /* VFMSUB132SHZr_Intk */ |
| 82971 | 25860, |
| 82972 | /* VFMSUB132SHZr_Intkz */ |
| 82973 | 25865, |
| 82974 | /* VFMSUB132SHZrb */ |
| 82975 | 25870, |
| 82976 | /* VFMSUB132SHZrb_Int */ |
| 82977 | 25875, |
| 82978 | /* VFMSUB132SHZrb_Intk */ |
| 82979 | 25880, |
| 82980 | /* VFMSUB132SHZrb_Intkz */ |
| 82981 | 25886, |
| 82982 | /* VFMSUB132SSZm */ |
| 82983 | 25892, |
| 82984 | /* VFMSUB132SSZm_Int */ |
| 82985 | 25896, |
| 82986 | /* VFMSUB132SSZm_Intk */ |
| 82987 | 25900, |
| 82988 | /* VFMSUB132SSZm_Intkz */ |
| 82989 | 25905, |
| 82990 | /* VFMSUB132SSZr */ |
| 82991 | 25910, |
| 82992 | /* VFMSUB132SSZr_Int */ |
| 82993 | 25914, |
| 82994 | /* VFMSUB132SSZr_Intk */ |
| 82995 | 25918, |
| 82996 | /* VFMSUB132SSZr_Intkz */ |
| 82997 | 25923, |
| 82998 | /* VFMSUB132SSZrb */ |
| 82999 | 25928, |
| 83000 | /* VFMSUB132SSZrb_Int */ |
| 83001 | 25933, |
| 83002 | /* VFMSUB132SSZrb_Intk */ |
| 83003 | 25938, |
| 83004 | /* VFMSUB132SSZrb_Intkz */ |
| 83005 | 25944, |
| 83006 | /* VFMSUB132SSm */ |
| 83007 | 25950, |
| 83008 | /* VFMSUB132SSm_Int */ |
| 83009 | 25954, |
| 83010 | /* VFMSUB132SSr */ |
| 83011 | 25958, |
| 83012 | /* VFMSUB132SSr_Int */ |
| 83013 | 25962, |
| 83014 | /* VFMSUB213PDYm */ |
| 83015 | 25966, |
| 83016 | /* VFMSUB213PDYr */ |
| 83017 | 25970, |
| 83018 | /* VFMSUB213PDZ128m */ |
| 83019 | 25974, |
| 83020 | /* VFMSUB213PDZ128mb */ |
| 83021 | 25978, |
| 83022 | /* VFMSUB213PDZ128mbk */ |
| 83023 | 25982, |
| 83024 | /* VFMSUB213PDZ128mbkz */ |
| 83025 | 25987, |
| 83026 | /* VFMSUB213PDZ128mk */ |
| 83027 | 25992, |
| 83028 | /* VFMSUB213PDZ128mkz */ |
| 83029 | 25997, |
| 83030 | /* VFMSUB213PDZ128r */ |
| 83031 | 26002, |
| 83032 | /* VFMSUB213PDZ128rk */ |
| 83033 | 26006, |
| 83034 | /* VFMSUB213PDZ128rkz */ |
| 83035 | 26011, |
| 83036 | /* VFMSUB213PDZ256m */ |
| 83037 | 26016, |
| 83038 | /* VFMSUB213PDZ256mb */ |
| 83039 | 26020, |
| 83040 | /* VFMSUB213PDZ256mbk */ |
| 83041 | 26024, |
| 83042 | /* VFMSUB213PDZ256mbkz */ |
| 83043 | 26029, |
| 83044 | /* VFMSUB213PDZ256mk */ |
| 83045 | 26034, |
| 83046 | /* VFMSUB213PDZ256mkz */ |
| 83047 | 26039, |
| 83048 | /* VFMSUB213PDZ256r */ |
| 83049 | 26044, |
| 83050 | /* VFMSUB213PDZ256rk */ |
| 83051 | 26048, |
| 83052 | /* VFMSUB213PDZ256rkz */ |
| 83053 | 26053, |
| 83054 | /* VFMSUB213PDZm */ |
| 83055 | 26058, |
| 83056 | /* VFMSUB213PDZmb */ |
| 83057 | 26062, |
| 83058 | /* VFMSUB213PDZmbk */ |
| 83059 | 26066, |
| 83060 | /* VFMSUB213PDZmbkz */ |
| 83061 | 26071, |
| 83062 | /* VFMSUB213PDZmk */ |
| 83063 | 26076, |
| 83064 | /* VFMSUB213PDZmkz */ |
| 83065 | 26081, |
| 83066 | /* VFMSUB213PDZr */ |
| 83067 | 26086, |
| 83068 | /* VFMSUB213PDZrb */ |
| 83069 | 26090, |
| 83070 | /* VFMSUB213PDZrbk */ |
| 83071 | 26095, |
| 83072 | /* VFMSUB213PDZrbkz */ |
| 83073 | 26101, |
| 83074 | /* VFMSUB213PDZrk */ |
| 83075 | 26107, |
| 83076 | /* VFMSUB213PDZrkz */ |
| 83077 | 26112, |
| 83078 | /* VFMSUB213PDm */ |
| 83079 | 26117, |
| 83080 | /* VFMSUB213PDr */ |
| 83081 | 26121, |
| 83082 | /* VFMSUB213PHZ128m */ |
| 83083 | 26125, |
| 83084 | /* VFMSUB213PHZ128mb */ |
| 83085 | 26129, |
| 83086 | /* VFMSUB213PHZ128mbk */ |
| 83087 | 26133, |
| 83088 | /* VFMSUB213PHZ128mbkz */ |
| 83089 | 26138, |
| 83090 | /* VFMSUB213PHZ128mk */ |
| 83091 | 26143, |
| 83092 | /* VFMSUB213PHZ128mkz */ |
| 83093 | 26148, |
| 83094 | /* VFMSUB213PHZ128r */ |
| 83095 | 26153, |
| 83096 | /* VFMSUB213PHZ128rk */ |
| 83097 | 26157, |
| 83098 | /* VFMSUB213PHZ128rkz */ |
| 83099 | 26162, |
| 83100 | /* VFMSUB213PHZ256m */ |
| 83101 | 26167, |
| 83102 | /* VFMSUB213PHZ256mb */ |
| 83103 | 26171, |
| 83104 | /* VFMSUB213PHZ256mbk */ |
| 83105 | 26175, |
| 83106 | /* VFMSUB213PHZ256mbkz */ |
| 83107 | 26180, |
| 83108 | /* VFMSUB213PHZ256mk */ |
| 83109 | 26185, |
| 83110 | /* VFMSUB213PHZ256mkz */ |
| 83111 | 26190, |
| 83112 | /* VFMSUB213PHZ256r */ |
| 83113 | 26195, |
| 83114 | /* VFMSUB213PHZ256rk */ |
| 83115 | 26199, |
| 83116 | /* VFMSUB213PHZ256rkz */ |
| 83117 | 26204, |
| 83118 | /* VFMSUB213PHZm */ |
| 83119 | 26209, |
| 83120 | /* VFMSUB213PHZmb */ |
| 83121 | 26213, |
| 83122 | /* VFMSUB213PHZmbk */ |
| 83123 | 26217, |
| 83124 | /* VFMSUB213PHZmbkz */ |
| 83125 | 26222, |
| 83126 | /* VFMSUB213PHZmk */ |
| 83127 | 26227, |
| 83128 | /* VFMSUB213PHZmkz */ |
| 83129 | 26232, |
| 83130 | /* VFMSUB213PHZr */ |
| 83131 | 26237, |
| 83132 | /* VFMSUB213PHZrb */ |
| 83133 | 26241, |
| 83134 | /* VFMSUB213PHZrbk */ |
| 83135 | 26246, |
| 83136 | /* VFMSUB213PHZrbkz */ |
| 83137 | 26252, |
| 83138 | /* VFMSUB213PHZrk */ |
| 83139 | 26258, |
| 83140 | /* VFMSUB213PHZrkz */ |
| 83141 | 26263, |
| 83142 | /* VFMSUB213PSYm */ |
| 83143 | 26268, |
| 83144 | /* VFMSUB213PSYr */ |
| 83145 | 26272, |
| 83146 | /* VFMSUB213PSZ128m */ |
| 83147 | 26276, |
| 83148 | /* VFMSUB213PSZ128mb */ |
| 83149 | 26280, |
| 83150 | /* VFMSUB213PSZ128mbk */ |
| 83151 | 26284, |
| 83152 | /* VFMSUB213PSZ128mbkz */ |
| 83153 | 26289, |
| 83154 | /* VFMSUB213PSZ128mk */ |
| 83155 | 26294, |
| 83156 | /* VFMSUB213PSZ128mkz */ |
| 83157 | 26299, |
| 83158 | /* VFMSUB213PSZ128r */ |
| 83159 | 26304, |
| 83160 | /* VFMSUB213PSZ128rk */ |
| 83161 | 26308, |
| 83162 | /* VFMSUB213PSZ128rkz */ |
| 83163 | 26313, |
| 83164 | /* VFMSUB213PSZ256m */ |
| 83165 | 26318, |
| 83166 | /* VFMSUB213PSZ256mb */ |
| 83167 | 26322, |
| 83168 | /* VFMSUB213PSZ256mbk */ |
| 83169 | 26326, |
| 83170 | /* VFMSUB213PSZ256mbkz */ |
| 83171 | 26331, |
| 83172 | /* VFMSUB213PSZ256mk */ |
| 83173 | 26336, |
| 83174 | /* VFMSUB213PSZ256mkz */ |
| 83175 | 26341, |
| 83176 | /* VFMSUB213PSZ256r */ |
| 83177 | 26346, |
| 83178 | /* VFMSUB213PSZ256rk */ |
| 83179 | 26350, |
| 83180 | /* VFMSUB213PSZ256rkz */ |
| 83181 | 26355, |
| 83182 | /* VFMSUB213PSZm */ |
| 83183 | 26360, |
| 83184 | /* VFMSUB213PSZmb */ |
| 83185 | 26364, |
| 83186 | /* VFMSUB213PSZmbk */ |
| 83187 | 26368, |
| 83188 | /* VFMSUB213PSZmbkz */ |
| 83189 | 26373, |
| 83190 | /* VFMSUB213PSZmk */ |
| 83191 | 26378, |
| 83192 | /* VFMSUB213PSZmkz */ |
| 83193 | 26383, |
| 83194 | /* VFMSUB213PSZr */ |
| 83195 | 26388, |
| 83196 | /* VFMSUB213PSZrb */ |
| 83197 | 26392, |
| 83198 | /* VFMSUB213PSZrbk */ |
| 83199 | 26397, |
| 83200 | /* VFMSUB213PSZrbkz */ |
| 83201 | 26403, |
| 83202 | /* VFMSUB213PSZrk */ |
| 83203 | 26409, |
| 83204 | /* VFMSUB213PSZrkz */ |
| 83205 | 26414, |
| 83206 | /* VFMSUB213PSm */ |
| 83207 | 26419, |
| 83208 | /* VFMSUB213PSr */ |
| 83209 | 26423, |
| 83210 | /* VFMSUB213SDZm */ |
| 83211 | 26427, |
| 83212 | /* VFMSUB213SDZm_Int */ |
| 83213 | 26431, |
| 83214 | /* VFMSUB213SDZm_Intk */ |
| 83215 | 26435, |
| 83216 | /* VFMSUB213SDZm_Intkz */ |
| 83217 | 26440, |
| 83218 | /* VFMSUB213SDZr */ |
| 83219 | 26445, |
| 83220 | /* VFMSUB213SDZr_Int */ |
| 83221 | 26449, |
| 83222 | /* VFMSUB213SDZr_Intk */ |
| 83223 | 26453, |
| 83224 | /* VFMSUB213SDZr_Intkz */ |
| 83225 | 26458, |
| 83226 | /* VFMSUB213SDZrb */ |
| 83227 | 26463, |
| 83228 | /* VFMSUB213SDZrb_Int */ |
| 83229 | 26468, |
| 83230 | /* VFMSUB213SDZrb_Intk */ |
| 83231 | 26473, |
| 83232 | /* VFMSUB213SDZrb_Intkz */ |
| 83233 | 26479, |
| 83234 | /* VFMSUB213SDm */ |
| 83235 | 26485, |
| 83236 | /* VFMSUB213SDm_Int */ |
| 83237 | 26489, |
| 83238 | /* VFMSUB213SDr */ |
| 83239 | 26493, |
| 83240 | /* VFMSUB213SDr_Int */ |
| 83241 | 26497, |
| 83242 | /* VFMSUB213SHZm */ |
| 83243 | 26501, |
| 83244 | /* VFMSUB213SHZm_Int */ |
| 83245 | 26505, |
| 83246 | /* VFMSUB213SHZm_Intk */ |
| 83247 | 26509, |
| 83248 | /* VFMSUB213SHZm_Intkz */ |
| 83249 | 26514, |
| 83250 | /* VFMSUB213SHZr */ |
| 83251 | 26519, |
| 83252 | /* VFMSUB213SHZr_Int */ |
| 83253 | 26523, |
| 83254 | /* VFMSUB213SHZr_Intk */ |
| 83255 | 26527, |
| 83256 | /* VFMSUB213SHZr_Intkz */ |
| 83257 | 26532, |
| 83258 | /* VFMSUB213SHZrb */ |
| 83259 | 26537, |
| 83260 | /* VFMSUB213SHZrb_Int */ |
| 83261 | 26542, |
| 83262 | /* VFMSUB213SHZrb_Intk */ |
| 83263 | 26547, |
| 83264 | /* VFMSUB213SHZrb_Intkz */ |
| 83265 | 26553, |
| 83266 | /* VFMSUB213SSZm */ |
| 83267 | 26559, |
| 83268 | /* VFMSUB213SSZm_Int */ |
| 83269 | 26563, |
| 83270 | /* VFMSUB213SSZm_Intk */ |
| 83271 | 26567, |
| 83272 | /* VFMSUB213SSZm_Intkz */ |
| 83273 | 26572, |
| 83274 | /* VFMSUB213SSZr */ |
| 83275 | 26577, |
| 83276 | /* VFMSUB213SSZr_Int */ |
| 83277 | 26581, |
| 83278 | /* VFMSUB213SSZr_Intk */ |
| 83279 | 26585, |
| 83280 | /* VFMSUB213SSZr_Intkz */ |
| 83281 | 26590, |
| 83282 | /* VFMSUB213SSZrb */ |
| 83283 | 26595, |
| 83284 | /* VFMSUB213SSZrb_Int */ |
| 83285 | 26600, |
| 83286 | /* VFMSUB213SSZrb_Intk */ |
| 83287 | 26605, |
| 83288 | /* VFMSUB213SSZrb_Intkz */ |
| 83289 | 26611, |
| 83290 | /* VFMSUB213SSm */ |
| 83291 | 26617, |
| 83292 | /* VFMSUB213SSm_Int */ |
| 83293 | 26621, |
| 83294 | /* VFMSUB213SSr */ |
| 83295 | 26625, |
| 83296 | /* VFMSUB213SSr_Int */ |
| 83297 | 26629, |
| 83298 | /* VFMSUB231PDYm */ |
| 83299 | 26633, |
| 83300 | /* VFMSUB231PDYr */ |
| 83301 | 26637, |
| 83302 | /* VFMSUB231PDZ128m */ |
| 83303 | 26641, |
| 83304 | /* VFMSUB231PDZ128mb */ |
| 83305 | 26645, |
| 83306 | /* VFMSUB231PDZ128mbk */ |
| 83307 | 26649, |
| 83308 | /* VFMSUB231PDZ128mbkz */ |
| 83309 | 26654, |
| 83310 | /* VFMSUB231PDZ128mk */ |
| 83311 | 26659, |
| 83312 | /* VFMSUB231PDZ128mkz */ |
| 83313 | 26664, |
| 83314 | /* VFMSUB231PDZ128r */ |
| 83315 | 26669, |
| 83316 | /* VFMSUB231PDZ128rk */ |
| 83317 | 26673, |
| 83318 | /* VFMSUB231PDZ128rkz */ |
| 83319 | 26678, |
| 83320 | /* VFMSUB231PDZ256m */ |
| 83321 | 26683, |
| 83322 | /* VFMSUB231PDZ256mb */ |
| 83323 | 26687, |
| 83324 | /* VFMSUB231PDZ256mbk */ |
| 83325 | 26691, |
| 83326 | /* VFMSUB231PDZ256mbkz */ |
| 83327 | 26696, |
| 83328 | /* VFMSUB231PDZ256mk */ |
| 83329 | 26701, |
| 83330 | /* VFMSUB231PDZ256mkz */ |
| 83331 | 26706, |
| 83332 | /* VFMSUB231PDZ256r */ |
| 83333 | 26711, |
| 83334 | /* VFMSUB231PDZ256rk */ |
| 83335 | 26715, |
| 83336 | /* VFMSUB231PDZ256rkz */ |
| 83337 | 26720, |
| 83338 | /* VFMSUB231PDZm */ |
| 83339 | 26725, |
| 83340 | /* VFMSUB231PDZmb */ |
| 83341 | 26729, |
| 83342 | /* VFMSUB231PDZmbk */ |
| 83343 | 26733, |
| 83344 | /* VFMSUB231PDZmbkz */ |
| 83345 | 26738, |
| 83346 | /* VFMSUB231PDZmk */ |
| 83347 | 26743, |
| 83348 | /* VFMSUB231PDZmkz */ |
| 83349 | 26748, |
| 83350 | /* VFMSUB231PDZr */ |
| 83351 | 26753, |
| 83352 | /* VFMSUB231PDZrb */ |
| 83353 | 26757, |
| 83354 | /* VFMSUB231PDZrbk */ |
| 83355 | 26762, |
| 83356 | /* VFMSUB231PDZrbkz */ |
| 83357 | 26768, |
| 83358 | /* VFMSUB231PDZrk */ |
| 83359 | 26774, |
| 83360 | /* VFMSUB231PDZrkz */ |
| 83361 | 26779, |
| 83362 | /* VFMSUB231PDm */ |
| 83363 | 26784, |
| 83364 | /* VFMSUB231PDr */ |
| 83365 | 26788, |
| 83366 | /* VFMSUB231PHZ128m */ |
| 83367 | 26792, |
| 83368 | /* VFMSUB231PHZ128mb */ |
| 83369 | 26796, |
| 83370 | /* VFMSUB231PHZ128mbk */ |
| 83371 | 26800, |
| 83372 | /* VFMSUB231PHZ128mbkz */ |
| 83373 | 26805, |
| 83374 | /* VFMSUB231PHZ128mk */ |
| 83375 | 26810, |
| 83376 | /* VFMSUB231PHZ128mkz */ |
| 83377 | 26815, |
| 83378 | /* VFMSUB231PHZ128r */ |
| 83379 | 26820, |
| 83380 | /* VFMSUB231PHZ128rk */ |
| 83381 | 26824, |
| 83382 | /* VFMSUB231PHZ128rkz */ |
| 83383 | 26829, |
| 83384 | /* VFMSUB231PHZ256m */ |
| 83385 | 26834, |
| 83386 | /* VFMSUB231PHZ256mb */ |
| 83387 | 26838, |
| 83388 | /* VFMSUB231PHZ256mbk */ |
| 83389 | 26842, |
| 83390 | /* VFMSUB231PHZ256mbkz */ |
| 83391 | 26847, |
| 83392 | /* VFMSUB231PHZ256mk */ |
| 83393 | 26852, |
| 83394 | /* VFMSUB231PHZ256mkz */ |
| 83395 | 26857, |
| 83396 | /* VFMSUB231PHZ256r */ |
| 83397 | 26862, |
| 83398 | /* VFMSUB231PHZ256rk */ |
| 83399 | 26866, |
| 83400 | /* VFMSUB231PHZ256rkz */ |
| 83401 | 26871, |
| 83402 | /* VFMSUB231PHZm */ |
| 83403 | 26876, |
| 83404 | /* VFMSUB231PHZmb */ |
| 83405 | 26880, |
| 83406 | /* VFMSUB231PHZmbk */ |
| 83407 | 26884, |
| 83408 | /* VFMSUB231PHZmbkz */ |
| 83409 | 26889, |
| 83410 | /* VFMSUB231PHZmk */ |
| 83411 | 26894, |
| 83412 | /* VFMSUB231PHZmkz */ |
| 83413 | 26899, |
| 83414 | /* VFMSUB231PHZr */ |
| 83415 | 26904, |
| 83416 | /* VFMSUB231PHZrb */ |
| 83417 | 26908, |
| 83418 | /* VFMSUB231PHZrbk */ |
| 83419 | 26913, |
| 83420 | /* VFMSUB231PHZrbkz */ |
| 83421 | 26919, |
| 83422 | /* VFMSUB231PHZrk */ |
| 83423 | 26925, |
| 83424 | /* VFMSUB231PHZrkz */ |
| 83425 | 26930, |
| 83426 | /* VFMSUB231PSYm */ |
| 83427 | 26935, |
| 83428 | /* VFMSUB231PSYr */ |
| 83429 | 26939, |
| 83430 | /* VFMSUB231PSZ128m */ |
| 83431 | 26943, |
| 83432 | /* VFMSUB231PSZ128mb */ |
| 83433 | 26947, |
| 83434 | /* VFMSUB231PSZ128mbk */ |
| 83435 | 26951, |
| 83436 | /* VFMSUB231PSZ128mbkz */ |
| 83437 | 26956, |
| 83438 | /* VFMSUB231PSZ128mk */ |
| 83439 | 26961, |
| 83440 | /* VFMSUB231PSZ128mkz */ |
| 83441 | 26966, |
| 83442 | /* VFMSUB231PSZ128r */ |
| 83443 | 26971, |
| 83444 | /* VFMSUB231PSZ128rk */ |
| 83445 | 26975, |
| 83446 | /* VFMSUB231PSZ128rkz */ |
| 83447 | 26980, |
| 83448 | /* VFMSUB231PSZ256m */ |
| 83449 | 26985, |
| 83450 | /* VFMSUB231PSZ256mb */ |
| 83451 | 26989, |
| 83452 | /* VFMSUB231PSZ256mbk */ |
| 83453 | 26993, |
| 83454 | /* VFMSUB231PSZ256mbkz */ |
| 83455 | 26998, |
| 83456 | /* VFMSUB231PSZ256mk */ |
| 83457 | 27003, |
| 83458 | /* VFMSUB231PSZ256mkz */ |
| 83459 | 27008, |
| 83460 | /* VFMSUB231PSZ256r */ |
| 83461 | 27013, |
| 83462 | /* VFMSUB231PSZ256rk */ |
| 83463 | 27017, |
| 83464 | /* VFMSUB231PSZ256rkz */ |
| 83465 | 27022, |
| 83466 | /* VFMSUB231PSZm */ |
| 83467 | 27027, |
| 83468 | /* VFMSUB231PSZmb */ |
| 83469 | 27031, |
| 83470 | /* VFMSUB231PSZmbk */ |
| 83471 | 27035, |
| 83472 | /* VFMSUB231PSZmbkz */ |
| 83473 | 27040, |
| 83474 | /* VFMSUB231PSZmk */ |
| 83475 | 27045, |
| 83476 | /* VFMSUB231PSZmkz */ |
| 83477 | 27050, |
| 83478 | /* VFMSUB231PSZr */ |
| 83479 | 27055, |
| 83480 | /* VFMSUB231PSZrb */ |
| 83481 | 27059, |
| 83482 | /* VFMSUB231PSZrbk */ |
| 83483 | 27064, |
| 83484 | /* VFMSUB231PSZrbkz */ |
| 83485 | 27070, |
| 83486 | /* VFMSUB231PSZrk */ |
| 83487 | 27076, |
| 83488 | /* VFMSUB231PSZrkz */ |
| 83489 | 27081, |
| 83490 | /* VFMSUB231PSm */ |
| 83491 | 27086, |
| 83492 | /* VFMSUB231PSr */ |
| 83493 | 27090, |
| 83494 | /* VFMSUB231SDZm */ |
| 83495 | 27094, |
| 83496 | /* VFMSUB231SDZm_Int */ |
| 83497 | 27098, |
| 83498 | /* VFMSUB231SDZm_Intk */ |
| 83499 | 27102, |
| 83500 | /* VFMSUB231SDZm_Intkz */ |
| 83501 | 27107, |
| 83502 | /* VFMSUB231SDZr */ |
| 83503 | 27112, |
| 83504 | /* VFMSUB231SDZr_Int */ |
| 83505 | 27116, |
| 83506 | /* VFMSUB231SDZr_Intk */ |
| 83507 | 27120, |
| 83508 | /* VFMSUB231SDZr_Intkz */ |
| 83509 | 27125, |
| 83510 | /* VFMSUB231SDZrb */ |
| 83511 | 27130, |
| 83512 | /* VFMSUB231SDZrb_Int */ |
| 83513 | 27135, |
| 83514 | /* VFMSUB231SDZrb_Intk */ |
| 83515 | 27140, |
| 83516 | /* VFMSUB231SDZrb_Intkz */ |
| 83517 | 27146, |
| 83518 | /* VFMSUB231SDm */ |
| 83519 | 27152, |
| 83520 | /* VFMSUB231SDm_Int */ |
| 83521 | 27156, |
| 83522 | /* VFMSUB231SDr */ |
| 83523 | 27160, |
| 83524 | /* VFMSUB231SDr_Int */ |
| 83525 | 27164, |
| 83526 | /* VFMSUB231SHZm */ |
| 83527 | 27168, |
| 83528 | /* VFMSUB231SHZm_Int */ |
| 83529 | 27172, |
| 83530 | /* VFMSUB231SHZm_Intk */ |
| 83531 | 27176, |
| 83532 | /* VFMSUB231SHZm_Intkz */ |
| 83533 | 27181, |
| 83534 | /* VFMSUB231SHZr */ |
| 83535 | 27186, |
| 83536 | /* VFMSUB231SHZr_Int */ |
| 83537 | 27190, |
| 83538 | /* VFMSUB231SHZr_Intk */ |
| 83539 | 27194, |
| 83540 | /* VFMSUB231SHZr_Intkz */ |
| 83541 | 27199, |
| 83542 | /* VFMSUB231SHZrb */ |
| 83543 | 27204, |
| 83544 | /* VFMSUB231SHZrb_Int */ |
| 83545 | 27209, |
| 83546 | /* VFMSUB231SHZrb_Intk */ |
| 83547 | 27214, |
| 83548 | /* VFMSUB231SHZrb_Intkz */ |
| 83549 | 27220, |
| 83550 | /* VFMSUB231SSZm */ |
| 83551 | 27226, |
| 83552 | /* VFMSUB231SSZm_Int */ |
| 83553 | 27230, |
| 83554 | /* VFMSUB231SSZm_Intk */ |
| 83555 | 27234, |
| 83556 | /* VFMSUB231SSZm_Intkz */ |
| 83557 | 27239, |
| 83558 | /* VFMSUB231SSZr */ |
| 83559 | 27244, |
| 83560 | /* VFMSUB231SSZr_Int */ |
| 83561 | 27248, |
| 83562 | /* VFMSUB231SSZr_Intk */ |
| 83563 | 27252, |
| 83564 | /* VFMSUB231SSZr_Intkz */ |
| 83565 | 27257, |
| 83566 | /* VFMSUB231SSZrb */ |
| 83567 | 27262, |
| 83568 | /* VFMSUB231SSZrb_Int */ |
| 83569 | 27267, |
| 83570 | /* VFMSUB231SSZrb_Intk */ |
| 83571 | 27272, |
| 83572 | /* VFMSUB231SSZrb_Intkz */ |
| 83573 | 27278, |
| 83574 | /* VFMSUB231SSm */ |
| 83575 | 27284, |
| 83576 | /* VFMSUB231SSm_Int */ |
| 83577 | 27288, |
| 83578 | /* VFMSUB231SSr */ |
| 83579 | 27292, |
| 83580 | /* VFMSUB231SSr_Int */ |
| 83581 | 27296, |
| 83582 | /* VFMSUBADD132PDYm */ |
| 83583 | 27300, |
| 83584 | /* VFMSUBADD132PDYr */ |
| 83585 | 27304, |
| 83586 | /* VFMSUBADD132PDZ128m */ |
| 83587 | 27308, |
| 83588 | /* VFMSUBADD132PDZ128mb */ |
| 83589 | 27312, |
| 83590 | /* VFMSUBADD132PDZ128mbk */ |
| 83591 | 27316, |
| 83592 | /* VFMSUBADD132PDZ128mbkz */ |
| 83593 | 27321, |
| 83594 | /* VFMSUBADD132PDZ128mk */ |
| 83595 | 27326, |
| 83596 | /* VFMSUBADD132PDZ128mkz */ |
| 83597 | 27331, |
| 83598 | /* VFMSUBADD132PDZ128r */ |
| 83599 | 27336, |
| 83600 | /* VFMSUBADD132PDZ128rk */ |
| 83601 | 27340, |
| 83602 | /* VFMSUBADD132PDZ128rkz */ |
| 83603 | 27345, |
| 83604 | /* VFMSUBADD132PDZ256m */ |
| 83605 | 27350, |
| 83606 | /* VFMSUBADD132PDZ256mb */ |
| 83607 | 27354, |
| 83608 | /* VFMSUBADD132PDZ256mbk */ |
| 83609 | 27358, |
| 83610 | /* VFMSUBADD132PDZ256mbkz */ |
| 83611 | 27363, |
| 83612 | /* VFMSUBADD132PDZ256mk */ |
| 83613 | 27368, |
| 83614 | /* VFMSUBADD132PDZ256mkz */ |
| 83615 | 27373, |
| 83616 | /* VFMSUBADD132PDZ256r */ |
| 83617 | 27378, |
| 83618 | /* VFMSUBADD132PDZ256rk */ |
| 83619 | 27382, |
| 83620 | /* VFMSUBADD132PDZ256rkz */ |
| 83621 | 27387, |
| 83622 | /* VFMSUBADD132PDZm */ |
| 83623 | 27392, |
| 83624 | /* VFMSUBADD132PDZmb */ |
| 83625 | 27396, |
| 83626 | /* VFMSUBADD132PDZmbk */ |
| 83627 | 27400, |
| 83628 | /* VFMSUBADD132PDZmbkz */ |
| 83629 | 27405, |
| 83630 | /* VFMSUBADD132PDZmk */ |
| 83631 | 27410, |
| 83632 | /* VFMSUBADD132PDZmkz */ |
| 83633 | 27415, |
| 83634 | /* VFMSUBADD132PDZr */ |
| 83635 | 27420, |
| 83636 | /* VFMSUBADD132PDZrb */ |
| 83637 | 27424, |
| 83638 | /* VFMSUBADD132PDZrbk */ |
| 83639 | 27429, |
| 83640 | /* VFMSUBADD132PDZrbkz */ |
| 83641 | 27435, |
| 83642 | /* VFMSUBADD132PDZrk */ |
| 83643 | 27441, |
| 83644 | /* VFMSUBADD132PDZrkz */ |
| 83645 | 27446, |
| 83646 | /* VFMSUBADD132PDm */ |
| 83647 | 27451, |
| 83648 | /* VFMSUBADD132PDr */ |
| 83649 | 27455, |
| 83650 | /* VFMSUBADD132PHZ128m */ |
| 83651 | 27459, |
| 83652 | /* VFMSUBADD132PHZ128mb */ |
| 83653 | 27463, |
| 83654 | /* VFMSUBADD132PHZ128mbk */ |
| 83655 | 27467, |
| 83656 | /* VFMSUBADD132PHZ128mbkz */ |
| 83657 | 27472, |
| 83658 | /* VFMSUBADD132PHZ128mk */ |
| 83659 | 27477, |
| 83660 | /* VFMSUBADD132PHZ128mkz */ |
| 83661 | 27482, |
| 83662 | /* VFMSUBADD132PHZ128r */ |
| 83663 | 27487, |
| 83664 | /* VFMSUBADD132PHZ128rk */ |
| 83665 | 27491, |
| 83666 | /* VFMSUBADD132PHZ128rkz */ |
| 83667 | 27496, |
| 83668 | /* VFMSUBADD132PHZ256m */ |
| 83669 | 27501, |
| 83670 | /* VFMSUBADD132PHZ256mb */ |
| 83671 | 27505, |
| 83672 | /* VFMSUBADD132PHZ256mbk */ |
| 83673 | 27509, |
| 83674 | /* VFMSUBADD132PHZ256mbkz */ |
| 83675 | 27514, |
| 83676 | /* VFMSUBADD132PHZ256mk */ |
| 83677 | 27519, |
| 83678 | /* VFMSUBADD132PHZ256mkz */ |
| 83679 | 27524, |
| 83680 | /* VFMSUBADD132PHZ256r */ |
| 83681 | 27529, |
| 83682 | /* VFMSUBADD132PHZ256rk */ |
| 83683 | 27533, |
| 83684 | /* VFMSUBADD132PHZ256rkz */ |
| 83685 | 27538, |
| 83686 | /* VFMSUBADD132PHZm */ |
| 83687 | 27543, |
| 83688 | /* VFMSUBADD132PHZmb */ |
| 83689 | 27547, |
| 83690 | /* VFMSUBADD132PHZmbk */ |
| 83691 | 27551, |
| 83692 | /* VFMSUBADD132PHZmbkz */ |
| 83693 | 27556, |
| 83694 | /* VFMSUBADD132PHZmk */ |
| 83695 | 27561, |
| 83696 | /* VFMSUBADD132PHZmkz */ |
| 83697 | 27566, |
| 83698 | /* VFMSUBADD132PHZr */ |
| 83699 | 27571, |
| 83700 | /* VFMSUBADD132PHZrb */ |
| 83701 | 27575, |
| 83702 | /* VFMSUBADD132PHZrbk */ |
| 83703 | 27580, |
| 83704 | /* VFMSUBADD132PHZrbkz */ |
| 83705 | 27586, |
| 83706 | /* VFMSUBADD132PHZrk */ |
| 83707 | 27592, |
| 83708 | /* VFMSUBADD132PHZrkz */ |
| 83709 | 27597, |
| 83710 | /* VFMSUBADD132PSYm */ |
| 83711 | 27602, |
| 83712 | /* VFMSUBADD132PSYr */ |
| 83713 | 27606, |
| 83714 | /* VFMSUBADD132PSZ128m */ |
| 83715 | 27610, |
| 83716 | /* VFMSUBADD132PSZ128mb */ |
| 83717 | 27614, |
| 83718 | /* VFMSUBADD132PSZ128mbk */ |
| 83719 | 27618, |
| 83720 | /* VFMSUBADD132PSZ128mbkz */ |
| 83721 | 27623, |
| 83722 | /* VFMSUBADD132PSZ128mk */ |
| 83723 | 27628, |
| 83724 | /* VFMSUBADD132PSZ128mkz */ |
| 83725 | 27633, |
| 83726 | /* VFMSUBADD132PSZ128r */ |
| 83727 | 27638, |
| 83728 | /* VFMSUBADD132PSZ128rk */ |
| 83729 | 27642, |
| 83730 | /* VFMSUBADD132PSZ128rkz */ |
| 83731 | 27647, |
| 83732 | /* VFMSUBADD132PSZ256m */ |
| 83733 | 27652, |
| 83734 | /* VFMSUBADD132PSZ256mb */ |
| 83735 | 27656, |
| 83736 | /* VFMSUBADD132PSZ256mbk */ |
| 83737 | 27660, |
| 83738 | /* VFMSUBADD132PSZ256mbkz */ |
| 83739 | 27665, |
| 83740 | /* VFMSUBADD132PSZ256mk */ |
| 83741 | 27670, |
| 83742 | /* VFMSUBADD132PSZ256mkz */ |
| 83743 | 27675, |
| 83744 | /* VFMSUBADD132PSZ256r */ |
| 83745 | 27680, |
| 83746 | /* VFMSUBADD132PSZ256rk */ |
| 83747 | 27684, |
| 83748 | /* VFMSUBADD132PSZ256rkz */ |
| 83749 | 27689, |
| 83750 | /* VFMSUBADD132PSZm */ |
| 83751 | 27694, |
| 83752 | /* VFMSUBADD132PSZmb */ |
| 83753 | 27698, |
| 83754 | /* VFMSUBADD132PSZmbk */ |
| 83755 | 27702, |
| 83756 | /* VFMSUBADD132PSZmbkz */ |
| 83757 | 27707, |
| 83758 | /* VFMSUBADD132PSZmk */ |
| 83759 | 27712, |
| 83760 | /* VFMSUBADD132PSZmkz */ |
| 83761 | 27717, |
| 83762 | /* VFMSUBADD132PSZr */ |
| 83763 | 27722, |
| 83764 | /* VFMSUBADD132PSZrb */ |
| 83765 | 27726, |
| 83766 | /* VFMSUBADD132PSZrbk */ |
| 83767 | 27731, |
| 83768 | /* VFMSUBADD132PSZrbkz */ |
| 83769 | 27737, |
| 83770 | /* VFMSUBADD132PSZrk */ |
| 83771 | 27743, |
| 83772 | /* VFMSUBADD132PSZrkz */ |
| 83773 | 27748, |
| 83774 | /* VFMSUBADD132PSm */ |
| 83775 | 27753, |
| 83776 | /* VFMSUBADD132PSr */ |
| 83777 | 27757, |
| 83778 | /* VFMSUBADD213PDYm */ |
| 83779 | 27761, |
| 83780 | /* VFMSUBADD213PDYr */ |
| 83781 | 27765, |
| 83782 | /* VFMSUBADD213PDZ128m */ |
| 83783 | 27769, |
| 83784 | /* VFMSUBADD213PDZ128mb */ |
| 83785 | 27773, |
| 83786 | /* VFMSUBADD213PDZ128mbk */ |
| 83787 | 27777, |
| 83788 | /* VFMSUBADD213PDZ128mbkz */ |
| 83789 | 27782, |
| 83790 | /* VFMSUBADD213PDZ128mk */ |
| 83791 | 27787, |
| 83792 | /* VFMSUBADD213PDZ128mkz */ |
| 83793 | 27792, |
| 83794 | /* VFMSUBADD213PDZ128r */ |
| 83795 | 27797, |
| 83796 | /* VFMSUBADD213PDZ128rk */ |
| 83797 | 27801, |
| 83798 | /* VFMSUBADD213PDZ128rkz */ |
| 83799 | 27806, |
| 83800 | /* VFMSUBADD213PDZ256m */ |
| 83801 | 27811, |
| 83802 | /* VFMSUBADD213PDZ256mb */ |
| 83803 | 27815, |
| 83804 | /* VFMSUBADD213PDZ256mbk */ |
| 83805 | 27819, |
| 83806 | /* VFMSUBADD213PDZ256mbkz */ |
| 83807 | 27824, |
| 83808 | /* VFMSUBADD213PDZ256mk */ |
| 83809 | 27829, |
| 83810 | /* VFMSUBADD213PDZ256mkz */ |
| 83811 | 27834, |
| 83812 | /* VFMSUBADD213PDZ256r */ |
| 83813 | 27839, |
| 83814 | /* VFMSUBADD213PDZ256rk */ |
| 83815 | 27843, |
| 83816 | /* VFMSUBADD213PDZ256rkz */ |
| 83817 | 27848, |
| 83818 | /* VFMSUBADD213PDZm */ |
| 83819 | 27853, |
| 83820 | /* VFMSUBADD213PDZmb */ |
| 83821 | 27857, |
| 83822 | /* VFMSUBADD213PDZmbk */ |
| 83823 | 27861, |
| 83824 | /* VFMSUBADD213PDZmbkz */ |
| 83825 | 27866, |
| 83826 | /* VFMSUBADD213PDZmk */ |
| 83827 | 27871, |
| 83828 | /* VFMSUBADD213PDZmkz */ |
| 83829 | 27876, |
| 83830 | /* VFMSUBADD213PDZr */ |
| 83831 | 27881, |
| 83832 | /* VFMSUBADD213PDZrb */ |
| 83833 | 27885, |
| 83834 | /* VFMSUBADD213PDZrbk */ |
| 83835 | 27890, |
| 83836 | /* VFMSUBADD213PDZrbkz */ |
| 83837 | 27896, |
| 83838 | /* VFMSUBADD213PDZrk */ |
| 83839 | 27902, |
| 83840 | /* VFMSUBADD213PDZrkz */ |
| 83841 | 27907, |
| 83842 | /* VFMSUBADD213PDm */ |
| 83843 | 27912, |
| 83844 | /* VFMSUBADD213PDr */ |
| 83845 | 27916, |
| 83846 | /* VFMSUBADD213PHZ128m */ |
| 83847 | 27920, |
| 83848 | /* VFMSUBADD213PHZ128mb */ |
| 83849 | 27924, |
| 83850 | /* VFMSUBADD213PHZ128mbk */ |
| 83851 | 27928, |
| 83852 | /* VFMSUBADD213PHZ128mbkz */ |
| 83853 | 27933, |
| 83854 | /* VFMSUBADD213PHZ128mk */ |
| 83855 | 27938, |
| 83856 | /* VFMSUBADD213PHZ128mkz */ |
| 83857 | 27943, |
| 83858 | /* VFMSUBADD213PHZ128r */ |
| 83859 | 27948, |
| 83860 | /* VFMSUBADD213PHZ128rk */ |
| 83861 | 27952, |
| 83862 | /* VFMSUBADD213PHZ128rkz */ |
| 83863 | 27957, |
| 83864 | /* VFMSUBADD213PHZ256m */ |
| 83865 | 27962, |
| 83866 | /* VFMSUBADD213PHZ256mb */ |
| 83867 | 27966, |
| 83868 | /* VFMSUBADD213PHZ256mbk */ |
| 83869 | 27970, |
| 83870 | /* VFMSUBADD213PHZ256mbkz */ |
| 83871 | 27975, |
| 83872 | /* VFMSUBADD213PHZ256mk */ |
| 83873 | 27980, |
| 83874 | /* VFMSUBADD213PHZ256mkz */ |
| 83875 | 27985, |
| 83876 | /* VFMSUBADD213PHZ256r */ |
| 83877 | 27990, |
| 83878 | /* VFMSUBADD213PHZ256rk */ |
| 83879 | 27994, |
| 83880 | /* VFMSUBADD213PHZ256rkz */ |
| 83881 | 27999, |
| 83882 | /* VFMSUBADD213PHZm */ |
| 83883 | 28004, |
| 83884 | /* VFMSUBADD213PHZmb */ |
| 83885 | 28008, |
| 83886 | /* VFMSUBADD213PHZmbk */ |
| 83887 | 28012, |
| 83888 | /* VFMSUBADD213PHZmbkz */ |
| 83889 | 28017, |
| 83890 | /* VFMSUBADD213PHZmk */ |
| 83891 | 28022, |
| 83892 | /* VFMSUBADD213PHZmkz */ |
| 83893 | 28027, |
| 83894 | /* VFMSUBADD213PHZr */ |
| 83895 | 28032, |
| 83896 | /* VFMSUBADD213PHZrb */ |
| 83897 | 28036, |
| 83898 | /* VFMSUBADD213PHZrbk */ |
| 83899 | 28041, |
| 83900 | /* VFMSUBADD213PHZrbkz */ |
| 83901 | 28047, |
| 83902 | /* VFMSUBADD213PHZrk */ |
| 83903 | 28053, |
| 83904 | /* VFMSUBADD213PHZrkz */ |
| 83905 | 28058, |
| 83906 | /* VFMSUBADD213PSYm */ |
| 83907 | 28063, |
| 83908 | /* VFMSUBADD213PSYr */ |
| 83909 | 28067, |
| 83910 | /* VFMSUBADD213PSZ128m */ |
| 83911 | 28071, |
| 83912 | /* VFMSUBADD213PSZ128mb */ |
| 83913 | 28075, |
| 83914 | /* VFMSUBADD213PSZ128mbk */ |
| 83915 | 28079, |
| 83916 | /* VFMSUBADD213PSZ128mbkz */ |
| 83917 | 28084, |
| 83918 | /* VFMSUBADD213PSZ128mk */ |
| 83919 | 28089, |
| 83920 | /* VFMSUBADD213PSZ128mkz */ |
| 83921 | 28094, |
| 83922 | /* VFMSUBADD213PSZ128r */ |
| 83923 | 28099, |
| 83924 | /* VFMSUBADD213PSZ128rk */ |
| 83925 | 28103, |
| 83926 | /* VFMSUBADD213PSZ128rkz */ |
| 83927 | 28108, |
| 83928 | /* VFMSUBADD213PSZ256m */ |
| 83929 | 28113, |
| 83930 | /* VFMSUBADD213PSZ256mb */ |
| 83931 | 28117, |
| 83932 | /* VFMSUBADD213PSZ256mbk */ |
| 83933 | 28121, |
| 83934 | /* VFMSUBADD213PSZ256mbkz */ |
| 83935 | 28126, |
| 83936 | /* VFMSUBADD213PSZ256mk */ |
| 83937 | 28131, |
| 83938 | /* VFMSUBADD213PSZ256mkz */ |
| 83939 | 28136, |
| 83940 | /* VFMSUBADD213PSZ256r */ |
| 83941 | 28141, |
| 83942 | /* VFMSUBADD213PSZ256rk */ |
| 83943 | 28145, |
| 83944 | /* VFMSUBADD213PSZ256rkz */ |
| 83945 | 28150, |
| 83946 | /* VFMSUBADD213PSZm */ |
| 83947 | 28155, |
| 83948 | /* VFMSUBADD213PSZmb */ |
| 83949 | 28159, |
| 83950 | /* VFMSUBADD213PSZmbk */ |
| 83951 | 28163, |
| 83952 | /* VFMSUBADD213PSZmbkz */ |
| 83953 | 28168, |
| 83954 | /* VFMSUBADD213PSZmk */ |
| 83955 | 28173, |
| 83956 | /* VFMSUBADD213PSZmkz */ |
| 83957 | 28178, |
| 83958 | /* VFMSUBADD213PSZr */ |
| 83959 | 28183, |
| 83960 | /* VFMSUBADD213PSZrb */ |
| 83961 | 28187, |
| 83962 | /* VFMSUBADD213PSZrbk */ |
| 83963 | 28192, |
| 83964 | /* VFMSUBADD213PSZrbkz */ |
| 83965 | 28198, |
| 83966 | /* VFMSUBADD213PSZrk */ |
| 83967 | 28204, |
| 83968 | /* VFMSUBADD213PSZrkz */ |
| 83969 | 28209, |
| 83970 | /* VFMSUBADD213PSm */ |
| 83971 | 28214, |
| 83972 | /* VFMSUBADD213PSr */ |
| 83973 | 28218, |
| 83974 | /* VFMSUBADD231PDYm */ |
| 83975 | 28222, |
| 83976 | /* VFMSUBADD231PDYr */ |
| 83977 | 28226, |
| 83978 | /* VFMSUBADD231PDZ128m */ |
| 83979 | 28230, |
| 83980 | /* VFMSUBADD231PDZ128mb */ |
| 83981 | 28234, |
| 83982 | /* VFMSUBADD231PDZ128mbk */ |
| 83983 | 28238, |
| 83984 | /* VFMSUBADD231PDZ128mbkz */ |
| 83985 | 28243, |
| 83986 | /* VFMSUBADD231PDZ128mk */ |
| 83987 | 28248, |
| 83988 | /* VFMSUBADD231PDZ128mkz */ |
| 83989 | 28253, |
| 83990 | /* VFMSUBADD231PDZ128r */ |
| 83991 | 28258, |
| 83992 | /* VFMSUBADD231PDZ128rk */ |
| 83993 | 28262, |
| 83994 | /* VFMSUBADD231PDZ128rkz */ |
| 83995 | 28267, |
| 83996 | /* VFMSUBADD231PDZ256m */ |
| 83997 | 28272, |
| 83998 | /* VFMSUBADD231PDZ256mb */ |
| 83999 | 28276, |
| 84000 | /* VFMSUBADD231PDZ256mbk */ |
| 84001 | 28280, |
| 84002 | /* VFMSUBADD231PDZ256mbkz */ |
| 84003 | 28285, |
| 84004 | /* VFMSUBADD231PDZ256mk */ |
| 84005 | 28290, |
| 84006 | /* VFMSUBADD231PDZ256mkz */ |
| 84007 | 28295, |
| 84008 | /* VFMSUBADD231PDZ256r */ |
| 84009 | 28300, |
| 84010 | /* VFMSUBADD231PDZ256rk */ |
| 84011 | 28304, |
| 84012 | /* VFMSUBADD231PDZ256rkz */ |
| 84013 | 28309, |
| 84014 | /* VFMSUBADD231PDZm */ |
| 84015 | 28314, |
| 84016 | /* VFMSUBADD231PDZmb */ |
| 84017 | 28318, |
| 84018 | /* VFMSUBADD231PDZmbk */ |
| 84019 | 28322, |
| 84020 | /* VFMSUBADD231PDZmbkz */ |
| 84021 | 28327, |
| 84022 | /* VFMSUBADD231PDZmk */ |
| 84023 | 28332, |
| 84024 | /* VFMSUBADD231PDZmkz */ |
| 84025 | 28337, |
| 84026 | /* VFMSUBADD231PDZr */ |
| 84027 | 28342, |
| 84028 | /* VFMSUBADD231PDZrb */ |
| 84029 | 28346, |
| 84030 | /* VFMSUBADD231PDZrbk */ |
| 84031 | 28351, |
| 84032 | /* VFMSUBADD231PDZrbkz */ |
| 84033 | 28357, |
| 84034 | /* VFMSUBADD231PDZrk */ |
| 84035 | 28363, |
| 84036 | /* VFMSUBADD231PDZrkz */ |
| 84037 | 28368, |
| 84038 | /* VFMSUBADD231PDm */ |
| 84039 | 28373, |
| 84040 | /* VFMSUBADD231PDr */ |
| 84041 | 28377, |
| 84042 | /* VFMSUBADD231PHZ128m */ |
| 84043 | 28381, |
| 84044 | /* VFMSUBADD231PHZ128mb */ |
| 84045 | 28385, |
| 84046 | /* VFMSUBADD231PHZ128mbk */ |
| 84047 | 28389, |
| 84048 | /* VFMSUBADD231PHZ128mbkz */ |
| 84049 | 28394, |
| 84050 | /* VFMSUBADD231PHZ128mk */ |
| 84051 | 28399, |
| 84052 | /* VFMSUBADD231PHZ128mkz */ |
| 84053 | 28404, |
| 84054 | /* VFMSUBADD231PHZ128r */ |
| 84055 | 28409, |
| 84056 | /* VFMSUBADD231PHZ128rk */ |
| 84057 | 28413, |
| 84058 | /* VFMSUBADD231PHZ128rkz */ |
| 84059 | 28418, |
| 84060 | /* VFMSUBADD231PHZ256m */ |
| 84061 | 28423, |
| 84062 | /* VFMSUBADD231PHZ256mb */ |
| 84063 | 28427, |
| 84064 | /* VFMSUBADD231PHZ256mbk */ |
| 84065 | 28431, |
| 84066 | /* VFMSUBADD231PHZ256mbkz */ |
| 84067 | 28436, |
| 84068 | /* VFMSUBADD231PHZ256mk */ |
| 84069 | 28441, |
| 84070 | /* VFMSUBADD231PHZ256mkz */ |
| 84071 | 28446, |
| 84072 | /* VFMSUBADD231PHZ256r */ |
| 84073 | 28451, |
| 84074 | /* VFMSUBADD231PHZ256rk */ |
| 84075 | 28455, |
| 84076 | /* VFMSUBADD231PHZ256rkz */ |
| 84077 | 28460, |
| 84078 | /* VFMSUBADD231PHZm */ |
| 84079 | 28465, |
| 84080 | /* VFMSUBADD231PHZmb */ |
| 84081 | 28469, |
| 84082 | /* VFMSUBADD231PHZmbk */ |
| 84083 | 28473, |
| 84084 | /* VFMSUBADD231PHZmbkz */ |
| 84085 | 28478, |
| 84086 | /* VFMSUBADD231PHZmk */ |
| 84087 | 28483, |
| 84088 | /* VFMSUBADD231PHZmkz */ |
| 84089 | 28488, |
| 84090 | /* VFMSUBADD231PHZr */ |
| 84091 | 28493, |
| 84092 | /* VFMSUBADD231PHZrb */ |
| 84093 | 28497, |
| 84094 | /* VFMSUBADD231PHZrbk */ |
| 84095 | 28502, |
| 84096 | /* VFMSUBADD231PHZrbkz */ |
| 84097 | 28508, |
| 84098 | /* VFMSUBADD231PHZrk */ |
| 84099 | 28514, |
| 84100 | /* VFMSUBADD231PHZrkz */ |
| 84101 | 28519, |
| 84102 | /* VFMSUBADD231PSYm */ |
| 84103 | 28524, |
| 84104 | /* VFMSUBADD231PSYr */ |
| 84105 | 28528, |
| 84106 | /* VFMSUBADD231PSZ128m */ |
| 84107 | 28532, |
| 84108 | /* VFMSUBADD231PSZ128mb */ |
| 84109 | 28536, |
| 84110 | /* VFMSUBADD231PSZ128mbk */ |
| 84111 | 28540, |
| 84112 | /* VFMSUBADD231PSZ128mbkz */ |
| 84113 | 28545, |
| 84114 | /* VFMSUBADD231PSZ128mk */ |
| 84115 | 28550, |
| 84116 | /* VFMSUBADD231PSZ128mkz */ |
| 84117 | 28555, |
| 84118 | /* VFMSUBADD231PSZ128r */ |
| 84119 | 28560, |
| 84120 | /* VFMSUBADD231PSZ128rk */ |
| 84121 | 28564, |
| 84122 | /* VFMSUBADD231PSZ128rkz */ |
| 84123 | 28569, |
| 84124 | /* VFMSUBADD231PSZ256m */ |
| 84125 | 28574, |
| 84126 | /* VFMSUBADD231PSZ256mb */ |
| 84127 | 28578, |
| 84128 | /* VFMSUBADD231PSZ256mbk */ |
| 84129 | 28582, |
| 84130 | /* VFMSUBADD231PSZ256mbkz */ |
| 84131 | 28587, |
| 84132 | /* VFMSUBADD231PSZ256mk */ |
| 84133 | 28592, |
| 84134 | /* VFMSUBADD231PSZ256mkz */ |
| 84135 | 28597, |
| 84136 | /* VFMSUBADD231PSZ256r */ |
| 84137 | 28602, |
| 84138 | /* VFMSUBADD231PSZ256rk */ |
| 84139 | 28606, |
| 84140 | /* VFMSUBADD231PSZ256rkz */ |
| 84141 | 28611, |
| 84142 | /* VFMSUBADD231PSZm */ |
| 84143 | 28616, |
| 84144 | /* VFMSUBADD231PSZmb */ |
| 84145 | 28620, |
| 84146 | /* VFMSUBADD231PSZmbk */ |
| 84147 | 28624, |
| 84148 | /* VFMSUBADD231PSZmbkz */ |
| 84149 | 28629, |
| 84150 | /* VFMSUBADD231PSZmk */ |
| 84151 | 28634, |
| 84152 | /* VFMSUBADD231PSZmkz */ |
| 84153 | 28639, |
| 84154 | /* VFMSUBADD231PSZr */ |
| 84155 | 28644, |
| 84156 | /* VFMSUBADD231PSZrb */ |
| 84157 | 28648, |
| 84158 | /* VFMSUBADD231PSZrbk */ |
| 84159 | 28653, |
| 84160 | /* VFMSUBADD231PSZrbkz */ |
| 84161 | 28659, |
| 84162 | /* VFMSUBADD231PSZrk */ |
| 84163 | 28665, |
| 84164 | /* VFMSUBADD231PSZrkz */ |
| 84165 | 28670, |
| 84166 | /* VFMSUBADD231PSm */ |
| 84167 | 28675, |
| 84168 | /* VFMSUBADD231PSr */ |
| 84169 | 28679, |
| 84170 | /* VFMSUBADDPD4Ymr */ |
| 84171 | 28683, |
| 84172 | /* VFMSUBADDPD4Yrm */ |
| 84173 | 28687, |
| 84174 | /* VFMSUBADDPD4Yrr */ |
| 84175 | 28691, |
| 84176 | /* VFMSUBADDPD4Yrr_REV */ |
| 84177 | 28695, |
| 84178 | /* VFMSUBADDPD4mr */ |
| 84179 | 28699, |
| 84180 | /* VFMSUBADDPD4rm */ |
| 84181 | 28703, |
| 84182 | /* VFMSUBADDPD4rr */ |
| 84183 | 28707, |
| 84184 | /* VFMSUBADDPD4rr_REV */ |
| 84185 | 28711, |
| 84186 | /* VFMSUBADDPS4Ymr */ |
| 84187 | 28715, |
| 84188 | /* VFMSUBADDPS4Yrm */ |
| 84189 | 28719, |
| 84190 | /* VFMSUBADDPS4Yrr */ |
| 84191 | 28723, |
| 84192 | /* VFMSUBADDPS4Yrr_REV */ |
| 84193 | 28727, |
| 84194 | /* VFMSUBADDPS4mr */ |
| 84195 | 28731, |
| 84196 | /* VFMSUBADDPS4rm */ |
| 84197 | 28735, |
| 84198 | /* VFMSUBADDPS4rr */ |
| 84199 | 28739, |
| 84200 | /* VFMSUBADDPS4rr_REV */ |
| 84201 | 28743, |
| 84202 | /* VFMSUBPD4Ymr */ |
| 84203 | 28747, |
| 84204 | /* VFMSUBPD4Yrm */ |
| 84205 | 28751, |
| 84206 | /* VFMSUBPD4Yrr */ |
| 84207 | 28755, |
| 84208 | /* VFMSUBPD4Yrr_REV */ |
| 84209 | 28759, |
| 84210 | /* VFMSUBPD4mr */ |
| 84211 | 28763, |
| 84212 | /* VFMSUBPD4rm */ |
| 84213 | 28767, |
| 84214 | /* VFMSUBPD4rr */ |
| 84215 | 28771, |
| 84216 | /* VFMSUBPD4rr_REV */ |
| 84217 | 28775, |
| 84218 | /* VFMSUBPS4Ymr */ |
| 84219 | 28779, |
| 84220 | /* VFMSUBPS4Yrm */ |
| 84221 | 28783, |
| 84222 | /* VFMSUBPS4Yrr */ |
| 84223 | 28787, |
| 84224 | /* VFMSUBPS4Yrr_REV */ |
| 84225 | 28791, |
| 84226 | /* VFMSUBPS4mr */ |
| 84227 | 28795, |
| 84228 | /* VFMSUBPS4rm */ |
| 84229 | 28799, |
| 84230 | /* VFMSUBPS4rr */ |
| 84231 | 28803, |
| 84232 | /* VFMSUBPS4rr_REV */ |
| 84233 | 28807, |
| 84234 | /* VFMSUBSD4mr */ |
| 84235 | 28811, |
| 84236 | /* VFMSUBSD4mr_Int */ |
| 84237 | 28815, |
| 84238 | /* VFMSUBSD4rm */ |
| 84239 | 28819, |
| 84240 | /* VFMSUBSD4rm_Int */ |
| 84241 | 28823, |
| 84242 | /* VFMSUBSD4rr */ |
| 84243 | 28827, |
| 84244 | /* VFMSUBSD4rr_Int */ |
| 84245 | 28831, |
| 84246 | /* VFMSUBSD4rr_Int_REV */ |
| 84247 | 28835, |
| 84248 | /* VFMSUBSD4rr_REV */ |
| 84249 | 28839, |
| 84250 | /* VFMSUBSS4mr */ |
| 84251 | 28843, |
| 84252 | /* VFMSUBSS4mr_Int */ |
| 84253 | 28847, |
| 84254 | /* VFMSUBSS4rm */ |
| 84255 | 28851, |
| 84256 | /* VFMSUBSS4rm_Int */ |
| 84257 | 28855, |
| 84258 | /* VFMSUBSS4rr */ |
| 84259 | 28859, |
| 84260 | /* VFMSUBSS4rr_Int */ |
| 84261 | 28863, |
| 84262 | /* VFMSUBSS4rr_Int_REV */ |
| 84263 | 28867, |
| 84264 | /* VFMSUBSS4rr_REV */ |
| 84265 | 28871, |
| 84266 | /* VFMULCPHZ128rm */ |
| 84267 | 28875, |
| 84268 | /* VFMULCPHZ128rmb */ |
| 84269 | 28878, |
| 84270 | /* VFMULCPHZ128rmbk */ |
| 84271 | 28881, |
| 84272 | /* VFMULCPHZ128rmbkz */ |
| 84273 | 28886, |
| 84274 | /* VFMULCPHZ128rmk */ |
| 84275 | 28890, |
| 84276 | /* VFMULCPHZ128rmkz */ |
| 84277 | 28895, |
| 84278 | /* VFMULCPHZ128rr */ |
| 84279 | 28899, |
| 84280 | /* VFMULCPHZ128rrk */ |
| 84281 | 28902, |
| 84282 | /* VFMULCPHZ128rrkz */ |
| 84283 | 28907, |
| 84284 | /* VFMULCPHZ256rm */ |
| 84285 | 28911, |
| 84286 | /* VFMULCPHZ256rmb */ |
| 84287 | 28914, |
| 84288 | /* VFMULCPHZ256rmbk */ |
| 84289 | 28917, |
| 84290 | /* VFMULCPHZ256rmbkz */ |
| 84291 | 28922, |
| 84292 | /* VFMULCPHZ256rmk */ |
| 84293 | 28926, |
| 84294 | /* VFMULCPHZ256rmkz */ |
| 84295 | 28931, |
| 84296 | /* VFMULCPHZ256rr */ |
| 84297 | 28935, |
| 84298 | /* VFMULCPHZ256rrk */ |
| 84299 | 28938, |
| 84300 | /* VFMULCPHZ256rrkz */ |
| 84301 | 28943, |
| 84302 | /* VFMULCPHZrm */ |
| 84303 | 28947, |
| 84304 | /* VFMULCPHZrmb */ |
| 84305 | 28950, |
| 84306 | /* VFMULCPHZrmbk */ |
| 84307 | 28953, |
| 84308 | /* VFMULCPHZrmbkz */ |
| 84309 | 28958, |
| 84310 | /* VFMULCPHZrmk */ |
| 84311 | 28962, |
| 84312 | /* VFMULCPHZrmkz */ |
| 84313 | 28967, |
| 84314 | /* VFMULCPHZrr */ |
| 84315 | 28971, |
| 84316 | /* VFMULCPHZrrb */ |
| 84317 | 28974, |
| 84318 | /* VFMULCPHZrrbk */ |
| 84319 | 28978, |
| 84320 | /* VFMULCPHZrrbkz */ |
| 84321 | 28984, |
| 84322 | /* VFMULCPHZrrk */ |
| 84323 | 28989, |
| 84324 | /* VFMULCPHZrrkz */ |
| 84325 | 28994, |
| 84326 | /* VFMULCSHZrm */ |
| 84327 | 28998, |
| 84328 | /* VFMULCSHZrmk */ |
| 84329 | 29001, |
| 84330 | /* VFMULCSHZrmkz */ |
| 84331 | 29006, |
| 84332 | /* VFMULCSHZrr */ |
| 84333 | 29010, |
| 84334 | /* VFMULCSHZrrb */ |
| 84335 | 29013, |
| 84336 | /* VFMULCSHZrrbk */ |
| 84337 | 29017, |
| 84338 | /* VFMULCSHZrrbkz */ |
| 84339 | 29023, |
| 84340 | /* VFMULCSHZrrk */ |
| 84341 | 29028, |
| 84342 | /* VFMULCSHZrrkz */ |
| 84343 | 29033, |
| 84344 | /* VFNMADD132PDYm */ |
| 84345 | 29037, |
| 84346 | /* VFNMADD132PDYr */ |
| 84347 | 29041, |
| 84348 | /* VFNMADD132PDZ128m */ |
| 84349 | 29045, |
| 84350 | /* VFNMADD132PDZ128mb */ |
| 84351 | 29049, |
| 84352 | /* VFNMADD132PDZ128mbk */ |
| 84353 | 29053, |
| 84354 | /* VFNMADD132PDZ128mbkz */ |
| 84355 | 29058, |
| 84356 | /* VFNMADD132PDZ128mk */ |
| 84357 | 29063, |
| 84358 | /* VFNMADD132PDZ128mkz */ |
| 84359 | 29068, |
| 84360 | /* VFNMADD132PDZ128r */ |
| 84361 | 29073, |
| 84362 | /* VFNMADD132PDZ128rk */ |
| 84363 | 29077, |
| 84364 | /* VFNMADD132PDZ128rkz */ |
| 84365 | 29082, |
| 84366 | /* VFNMADD132PDZ256m */ |
| 84367 | 29087, |
| 84368 | /* VFNMADD132PDZ256mb */ |
| 84369 | 29091, |
| 84370 | /* VFNMADD132PDZ256mbk */ |
| 84371 | 29095, |
| 84372 | /* VFNMADD132PDZ256mbkz */ |
| 84373 | 29100, |
| 84374 | /* VFNMADD132PDZ256mk */ |
| 84375 | 29105, |
| 84376 | /* VFNMADD132PDZ256mkz */ |
| 84377 | 29110, |
| 84378 | /* VFNMADD132PDZ256r */ |
| 84379 | 29115, |
| 84380 | /* VFNMADD132PDZ256rk */ |
| 84381 | 29119, |
| 84382 | /* VFNMADD132PDZ256rkz */ |
| 84383 | 29124, |
| 84384 | /* VFNMADD132PDZm */ |
| 84385 | 29129, |
| 84386 | /* VFNMADD132PDZmb */ |
| 84387 | 29133, |
| 84388 | /* VFNMADD132PDZmbk */ |
| 84389 | 29137, |
| 84390 | /* VFNMADD132PDZmbkz */ |
| 84391 | 29142, |
| 84392 | /* VFNMADD132PDZmk */ |
| 84393 | 29147, |
| 84394 | /* VFNMADD132PDZmkz */ |
| 84395 | 29152, |
| 84396 | /* VFNMADD132PDZr */ |
| 84397 | 29157, |
| 84398 | /* VFNMADD132PDZrb */ |
| 84399 | 29161, |
| 84400 | /* VFNMADD132PDZrbk */ |
| 84401 | 29166, |
| 84402 | /* VFNMADD132PDZrbkz */ |
| 84403 | 29172, |
| 84404 | /* VFNMADD132PDZrk */ |
| 84405 | 29178, |
| 84406 | /* VFNMADD132PDZrkz */ |
| 84407 | 29183, |
| 84408 | /* VFNMADD132PDm */ |
| 84409 | 29188, |
| 84410 | /* VFNMADD132PDr */ |
| 84411 | 29192, |
| 84412 | /* VFNMADD132PHZ128m */ |
| 84413 | 29196, |
| 84414 | /* VFNMADD132PHZ128mb */ |
| 84415 | 29200, |
| 84416 | /* VFNMADD132PHZ128mbk */ |
| 84417 | 29204, |
| 84418 | /* VFNMADD132PHZ128mbkz */ |
| 84419 | 29209, |
| 84420 | /* VFNMADD132PHZ128mk */ |
| 84421 | 29214, |
| 84422 | /* VFNMADD132PHZ128mkz */ |
| 84423 | 29219, |
| 84424 | /* VFNMADD132PHZ128r */ |
| 84425 | 29224, |
| 84426 | /* VFNMADD132PHZ128rk */ |
| 84427 | 29228, |
| 84428 | /* VFNMADD132PHZ128rkz */ |
| 84429 | 29233, |
| 84430 | /* VFNMADD132PHZ256m */ |
| 84431 | 29238, |
| 84432 | /* VFNMADD132PHZ256mb */ |
| 84433 | 29242, |
| 84434 | /* VFNMADD132PHZ256mbk */ |
| 84435 | 29246, |
| 84436 | /* VFNMADD132PHZ256mbkz */ |
| 84437 | 29251, |
| 84438 | /* VFNMADD132PHZ256mk */ |
| 84439 | 29256, |
| 84440 | /* VFNMADD132PHZ256mkz */ |
| 84441 | 29261, |
| 84442 | /* VFNMADD132PHZ256r */ |
| 84443 | 29266, |
| 84444 | /* VFNMADD132PHZ256rk */ |
| 84445 | 29270, |
| 84446 | /* VFNMADD132PHZ256rkz */ |
| 84447 | 29275, |
| 84448 | /* VFNMADD132PHZm */ |
| 84449 | 29280, |
| 84450 | /* VFNMADD132PHZmb */ |
| 84451 | 29284, |
| 84452 | /* VFNMADD132PHZmbk */ |
| 84453 | 29288, |
| 84454 | /* VFNMADD132PHZmbkz */ |
| 84455 | 29293, |
| 84456 | /* VFNMADD132PHZmk */ |
| 84457 | 29298, |
| 84458 | /* VFNMADD132PHZmkz */ |
| 84459 | 29303, |
| 84460 | /* VFNMADD132PHZr */ |
| 84461 | 29308, |
| 84462 | /* VFNMADD132PHZrb */ |
| 84463 | 29312, |
| 84464 | /* VFNMADD132PHZrbk */ |
| 84465 | 29317, |
| 84466 | /* VFNMADD132PHZrbkz */ |
| 84467 | 29323, |
| 84468 | /* VFNMADD132PHZrk */ |
| 84469 | 29329, |
| 84470 | /* VFNMADD132PHZrkz */ |
| 84471 | 29334, |
| 84472 | /* VFNMADD132PSYm */ |
| 84473 | 29339, |
| 84474 | /* VFNMADD132PSYr */ |
| 84475 | 29343, |
| 84476 | /* VFNMADD132PSZ128m */ |
| 84477 | 29347, |
| 84478 | /* VFNMADD132PSZ128mb */ |
| 84479 | 29351, |
| 84480 | /* VFNMADD132PSZ128mbk */ |
| 84481 | 29355, |
| 84482 | /* VFNMADD132PSZ128mbkz */ |
| 84483 | 29360, |
| 84484 | /* VFNMADD132PSZ128mk */ |
| 84485 | 29365, |
| 84486 | /* VFNMADD132PSZ128mkz */ |
| 84487 | 29370, |
| 84488 | /* VFNMADD132PSZ128r */ |
| 84489 | 29375, |
| 84490 | /* VFNMADD132PSZ128rk */ |
| 84491 | 29379, |
| 84492 | /* VFNMADD132PSZ128rkz */ |
| 84493 | 29384, |
| 84494 | /* VFNMADD132PSZ256m */ |
| 84495 | 29389, |
| 84496 | /* VFNMADD132PSZ256mb */ |
| 84497 | 29393, |
| 84498 | /* VFNMADD132PSZ256mbk */ |
| 84499 | 29397, |
| 84500 | /* VFNMADD132PSZ256mbkz */ |
| 84501 | 29402, |
| 84502 | /* VFNMADD132PSZ256mk */ |
| 84503 | 29407, |
| 84504 | /* VFNMADD132PSZ256mkz */ |
| 84505 | 29412, |
| 84506 | /* VFNMADD132PSZ256r */ |
| 84507 | 29417, |
| 84508 | /* VFNMADD132PSZ256rk */ |
| 84509 | 29421, |
| 84510 | /* VFNMADD132PSZ256rkz */ |
| 84511 | 29426, |
| 84512 | /* VFNMADD132PSZm */ |
| 84513 | 29431, |
| 84514 | /* VFNMADD132PSZmb */ |
| 84515 | 29435, |
| 84516 | /* VFNMADD132PSZmbk */ |
| 84517 | 29439, |
| 84518 | /* VFNMADD132PSZmbkz */ |
| 84519 | 29444, |
| 84520 | /* VFNMADD132PSZmk */ |
| 84521 | 29449, |
| 84522 | /* VFNMADD132PSZmkz */ |
| 84523 | 29454, |
| 84524 | /* VFNMADD132PSZr */ |
| 84525 | 29459, |
| 84526 | /* VFNMADD132PSZrb */ |
| 84527 | 29463, |
| 84528 | /* VFNMADD132PSZrbk */ |
| 84529 | 29468, |
| 84530 | /* VFNMADD132PSZrbkz */ |
| 84531 | 29474, |
| 84532 | /* VFNMADD132PSZrk */ |
| 84533 | 29480, |
| 84534 | /* VFNMADD132PSZrkz */ |
| 84535 | 29485, |
| 84536 | /* VFNMADD132PSm */ |
| 84537 | 29490, |
| 84538 | /* VFNMADD132PSr */ |
| 84539 | 29494, |
| 84540 | /* VFNMADD132SDZm */ |
| 84541 | 29498, |
| 84542 | /* VFNMADD132SDZm_Int */ |
| 84543 | 29502, |
| 84544 | /* VFNMADD132SDZm_Intk */ |
| 84545 | 29506, |
| 84546 | /* VFNMADD132SDZm_Intkz */ |
| 84547 | 29511, |
| 84548 | /* VFNMADD132SDZr */ |
| 84549 | 29516, |
| 84550 | /* VFNMADD132SDZr_Int */ |
| 84551 | 29520, |
| 84552 | /* VFNMADD132SDZr_Intk */ |
| 84553 | 29524, |
| 84554 | /* VFNMADD132SDZr_Intkz */ |
| 84555 | 29529, |
| 84556 | /* VFNMADD132SDZrb */ |
| 84557 | 29534, |
| 84558 | /* VFNMADD132SDZrb_Int */ |
| 84559 | 29539, |
| 84560 | /* VFNMADD132SDZrb_Intk */ |
| 84561 | 29544, |
| 84562 | /* VFNMADD132SDZrb_Intkz */ |
| 84563 | 29550, |
| 84564 | /* VFNMADD132SDm */ |
| 84565 | 29556, |
| 84566 | /* VFNMADD132SDm_Int */ |
| 84567 | 29560, |
| 84568 | /* VFNMADD132SDr */ |
| 84569 | 29564, |
| 84570 | /* VFNMADD132SDr_Int */ |
| 84571 | 29568, |
| 84572 | /* VFNMADD132SHZm */ |
| 84573 | 29572, |
| 84574 | /* VFNMADD132SHZm_Int */ |
| 84575 | 29576, |
| 84576 | /* VFNMADD132SHZm_Intk */ |
| 84577 | 29580, |
| 84578 | /* VFNMADD132SHZm_Intkz */ |
| 84579 | 29585, |
| 84580 | /* VFNMADD132SHZr */ |
| 84581 | 29590, |
| 84582 | /* VFNMADD132SHZr_Int */ |
| 84583 | 29594, |
| 84584 | /* VFNMADD132SHZr_Intk */ |
| 84585 | 29598, |
| 84586 | /* VFNMADD132SHZr_Intkz */ |
| 84587 | 29603, |
| 84588 | /* VFNMADD132SHZrb */ |
| 84589 | 29608, |
| 84590 | /* VFNMADD132SHZrb_Int */ |
| 84591 | 29613, |
| 84592 | /* VFNMADD132SHZrb_Intk */ |
| 84593 | 29618, |
| 84594 | /* VFNMADD132SHZrb_Intkz */ |
| 84595 | 29624, |
| 84596 | /* VFNMADD132SSZm */ |
| 84597 | 29630, |
| 84598 | /* VFNMADD132SSZm_Int */ |
| 84599 | 29634, |
| 84600 | /* VFNMADD132SSZm_Intk */ |
| 84601 | 29638, |
| 84602 | /* VFNMADD132SSZm_Intkz */ |
| 84603 | 29643, |
| 84604 | /* VFNMADD132SSZr */ |
| 84605 | 29648, |
| 84606 | /* VFNMADD132SSZr_Int */ |
| 84607 | 29652, |
| 84608 | /* VFNMADD132SSZr_Intk */ |
| 84609 | 29656, |
| 84610 | /* VFNMADD132SSZr_Intkz */ |
| 84611 | 29661, |
| 84612 | /* VFNMADD132SSZrb */ |
| 84613 | 29666, |
| 84614 | /* VFNMADD132SSZrb_Int */ |
| 84615 | 29671, |
| 84616 | /* VFNMADD132SSZrb_Intk */ |
| 84617 | 29676, |
| 84618 | /* VFNMADD132SSZrb_Intkz */ |
| 84619 | 29682, |
| 84620 | /* VFNMADD132SSm */ |
| 84621 | 29688, |
| 84622 | /* VFNMADD132SSm_Int */ |
| 84623 | 29692, |
| 84624 | /* VFNMADD132SSr */ |
| 84625 | 29696, |
| 84626 | /* VFNMADD132SSr_Int */ |
| 84627 | 29700, |
| 84628 | /* VFNMADD213PDYm */ |
| 84629 | 29704, |
| 84630 | /* VFNMADD213PDYr */ |
| 84631 | 29708, |
| 84632 | /* VFNMADD213PDZ128m */ |
| 84633 | 29712, |
| 84634 | /* VFNMADD213PDZ128mb */ |
| 84635 | 29716, |
| 84636 | /* VFNMADD213PDZ128mbk */ |
| 84637 | 29720, |
| 84638 | /* VFNMADD213PDZ128mbkz */ |
| 84639 | 29725, |
| 84640 | /* VFNMADD213PDZ128mk */ |
| 84641 | 29730, |
| 84642 | /* VFNMADD213PDZ128mkz */ |
| 84643 | 29735, |
| 84644 | /* VFNMADD213PDZ128r */ |
| 84645 | 29740, |
| 84646 | /* VFNMADD213PDZ128rk */ |
| 84647 | 29744, |
| 84648 | /* VFNMADD213PDZ128rkz */ |
| 84649 | 29749, |
| 84650 | /* VFNMADD213PDZ256m */ |
| 84651 | 29754, |
| 84652 | /* VFNMADD213PDZ256mb */ |
| 84653 | 29758, |
| 84654 | /* VFNMADD213PDZ256mbk */ |
| 84655 | 29762, |
| 84656 | /* VFNMADD213PDZ256mbkz */ |
| 84657 | 29767, |
| 84658 | /* VFNMADD213PDZ256mk */ |
| 84659 | 29772, |
| 84660 | /* VFNMADD213PDZ256mkz */ |
| 84661 | 29777, |
| 84662 | /* VFNMADD213PDZ256r */ |
| 84663 | 29782, |
| 84664 | /* VFNMADD213PDZ256rk */ |
| 84665 | 29786, |
| 84666 | /* VFNMADD213PDZ256rkz */ |
| 84667 | 29791, |
| 84668 | /* VFNMADD213PDZm */ |
| 84669 | 29796, |
| 84670 | /* VFNMADD213PDZmb */ |
| 84671 | 29800, |
| 84672 | /* VFNMADD213PDZmbk */ |
| 84673 | 29804, |
| 84674 | /* VFNMADD213PDZmbkz */ |
| 84675 | 29809, |
| 84676 | /* VFNMADD213PDZmk */ |
| 84677 | 29814, |
| 84678 | /* VFNMADD213PDZmkz */ |
| 84679 | 29819, |
| 84680 | /* VFNMADD213PDZr */ |
| 84681 | 29824, |
| 84682 | /* VFNMADD213PDZrb */ |
| 84683 | 29828, |
| 84684 | /* VFNMADD213PDZrbk */ |
| 84685 | 29833, |
| 84686 | /* VFNMADD213PDZrbkz */ |
| 84687 | 29839, |
| 84688 | /* VFNMADD213PDZrk */ |
| 84689 | 29845, |
| 84690 | /* VFNMADD213PDZrkz */ |
| 84691 | 29850, |
| 84692 | /* VFNMADD213PDm */ |
| 84693 | 29855, |
| 84694 | /* VFNMADD213PDr */ |
| 84695 | 29859, |
| 84696 | /* VFNMADD213PHZ128m */ |
| 84697 | 29863, |
| 84698 | /* VFNMADD213PHZ128mb */ |
| 84699 | 29867, |
| 84700 | /* VFNMADD213PHZ128mbk */ |
| 84701 | 29871, |
| 84702 | /* VFNMADD213PHZ128mbkz */ |
| 84703 | 29876, |
| 84704 | /* VFNMADD213PHZ128mk */ |
| 84705 | 29881, |
| 84706 | /* VFNMADD213PHZ128mkz */ |
| 84707 | 29886, |
| 84708 | /* VFNMADD213PHZ128r */ |
| 84709 | 29891, |
| 84710 | /* VFNMADD213PHZ128rk */ |
| 84711 | 29895, |
| 84712 | /* VFNMADD213PHZ128rkz */ |
| 84713 | 29900, |
| 84714 | /* VFNMADD213PHZ256m */ |
| 84715 | 29905, |
| 84716 | /* VFNMADD213PHZ256mb */ |
| 84717 | 29909, |
| 84718 | /* VFNMADD213PHZ256mbk */ |
| 84719 | 29913, |
| 84720 | /* VFNMADD213PHZ256mbkz */ |
| 84721 | 29918, |
| 84722 | /* VFNMADD213PHZ256mk */ |
| 84723 | 29923, |
| 84724 | /* VFNMADD213PHZ256mkz */ |
| 84725 | 29928, |
| 84726 | /* VFNMADD213PHZ256r */ |
| 84727 | 29933, |
| 84728 | /* VFNMADD213PHZ256rk */ |
| 84729 | 29937, |
| 84730 | /* VFNMADD213PHZ256rkz */ |
| 84731 | 29942, |
| 84732 | /* VFNMADD213PHZm */ |
| 84733 | 29947, |
| 84734 | /* VFNMADD213PHZmb */ |
| 84735 | 29951, |
| 84736 | /* VFNMADD213PHZmbk */ |
| 84737 | 29955, |
| 84738 | /* VFNMADD213PHZmbkz */ |
| 84739 | 29960, |
| 84740 | /* VFNMADD213PHZmk */ |
| 84741 | 29965, |
| 84742 | /* VFNMADD213PHZmkz */ |
| 84743 | 29970, |
| 84744 | /* VFNMADD213PHZr */ |
| 84745 | 29975, |
| 84746 | /* VFNMADD213PHZrb */ |
| 84747 | 29979, |
| 84748 | /* VFNMADD213PHZrbk */ |
| 84749 | 29984, |
| 84750 | /* VFNMADD213PHZrbkz */ |
| 84751 | 29990, |
| 84752 | /* VFNMADD213PHZrk */ |
| 84753 | 29996, |
| 84754 | /* VFNMADD213PHZrkz */ |
| 84755 | 30001, |
| 84756 | /* VFNMADD213PSYm */ |
| 84757 | 30006, |
| 84758 | /* VFNMADD213PSYr */ |
| 84759 | 30010, |
| 84760 | /* VFNMADD213PSZ128m */ |
| 84761 | 30014, |
| 84762 | /* VFNMADD213PSZ128mb */ |
| 84763 | 30018, |
| 84764 | /* VFNMADD213PSZ128mbk */ |
| 84765 | 30022, |
| 84766 | /* VFNMADD213PSZ128mbkz */ |
| 84767 | 30027, |
| 84768 | /* VFNMADD213PSZ128mk */ |
| 84769 | 30032, |
| 84770 | /* VFNMADD213PSZ128mkz */ |
| 84771 | 30037, |
| 84772 | /* VFNMADD213PSZ128r */ |
| 84773 | 30042, |
| 84774 | /* VFNMADD213PSZ128rk */ |
| 84775 | 30046, |
| 84776 | /* VFNMADD213PSZ128rkz */ |
| 84777 | 30051, |
| 84778 | /* VFNMADD213PSZ256m */ |
| 84779 | 30056, |
| 84780 | /* VFNMADD213PSZ256mb */ |
| 84781 | 30060, |
| 84782 | /* VFNMADD213PSZ256mbk */ |
| 84783 | 30064, |
| 84784 | /* VFNMADD213PSZ256mbkz */ |
| 84785 | 30069, |
| 84786 | /* VFNMADD213PSZ256mk */ |
| 84787 | 30074, |
| 84788 | /* VFNMADD213PSZ256mkz */ |
| 84789 | 30079, |
| 84790 | /* VFNMADD213PSZ256r */ |
| 84791 | 30084, |
| 84792 | /* VFNMADD213PSZ256rk */ |
| 84793 | 30088, |
| 84794 | /* VFNMADD213PSZ256rkz */ |
| 84795 | 30093, |
| 84796 | /* VFNMADD213PSZm */ |
| 84797 | 30098, |
| 84798 | /* VFNMADD213PSZmb */ |
| 84799 | 30102, |
| 84800 | /* VFNMADD213PSZmbk */ |
| 84801 | 30106, |
| 84802 | /* VFNMADD213PSZmbkz */ |
| 84803 | 30111, |
| 84804 | /* VFNMADD213PSZmk */ |
| 84805 | 30116, |
| 84806 | /* VFNMADD213PSZmkz */ |
| 84807 | 30121, |
| 84808 | /* VFNMADD213PSZr */ |
| 84809 | 30126, |
| 84810 | /* VFNMADD213PSZrb */ |
| 84811 | 30130, |
| 84812 | /* VFNMADD213PSZrbk */ |
| 84813 | 30135, |
| 84814 | /* VFNMADD213PSZrbkz */ |
| 84815 | 30141, |
| 84816 | /* VFNMADD213PSZrk */ |
| 84817 | 30147, |
| 84818 | /* VFNMADD213PSZrkz */ |
| 84819 | 30152, |
| 84820 | /* VFNMADD213PSm */ |
| 84821 | 30157, |
| 84822 | /* VFNMADD213PSr */ |
| 84823 | 30161, |
| 84824 | /* VFNMADD213SDZm */ |
| 84825 | 30165, |
| 84826 | /* VFNMADD213SDZm_Int */ |
| 84827 | 30169, |
| 84828 | /* VFNMADD213SDZm_Intk */ |
| 84829 | 30173, |
| 84830 | /* VFNMADD213SDZm_Intkz */ |
| 84831 | 30178, |
| 84832 | /* VFNMADD213SDZr */ |
| 84833 | 30183, |
| 84834 | /* VFNMADD213SDZr_Int */ |
| 84835 | 30187, |
| 84836 | /* VFNMADD213SDZr_Intk */ |
| 84837 | 30191, |
| 84838 | /* VFNMADD213SDZr_Intkz */ |
| 84839 | 30196, |
| 84840 | /* VFNMADD213SDZrb */ |
| 84841 | 30201, |
| 84842 | /* VFNMADD213SDZrb_Int */ |
| 84843 | 30206, |
| 84844 | /* VFNMADD213SDZrb_Intk */ |
| 84845 | 30211, |
| 84846 | /* VFNMADD213SDZrb_Intkz */ |
| 84847 | 30217, |
| 84848 | /* VFNMADD213SDm */ |
| 84849 | 30223, |
| 84850 | /* VFNMADD213SDm_Int */ |
| 84851 | 30227, |
| 84852 | /* VFNMADD213SDr */ |
| 84853 | 30231, |
| 84854 | /* VFNMADD213SDr_Int */ |
| 84855 | 30235, |
| 84856 | /* VFNMADD213SHZm */ |
| 84857 | 30239, |
| 84858 | /* VFNMADD213SHZm_Int */ |
| 84859 | 30243, |
| 84860 | /* VFNMADD213SHZm_Intk */ |
| 84861 | 30247, |
| 84862 | /* VFNMADD213SHZm_Intkz */ |
| 84863 | 30252, |
| 84864 | /* VFNMADD213SHZr */ |
| 84865 | 30257, |
| 84866 | /* VFNMADD213SHZr_Int */ |
| 84867 | 30261, |
| 84868 | /* VFNMADD213SHZr_Intk */ |
| 84869 | 30265, |
| 84870 | /* VFNMADD213SHZr_Intkz */ |
| 84871 | 30270, |
| 84872 | /* VFNMADD213SHZrb */ |
| 84873 | 30275, |
| 84874 | /* VFNMADD213SHZrb_Int */ |
| 84875 | 30280, |
| 84876 | /* VFNMADD213SHZrb_Intk */ |
| 84877 | 30285, |
| 84878 | /* VFNMADD213SHZrb_Intkz */ |
| 84879 | 30291, |
| 84880 | /* VFNMADD213SSZm */ |
| 84881 | 30297, |
| 84882 | /* VFNMADD213SSZm_Int */ |
| 84883 | 30301, |
| 84884 | /* VFNMADD213SSZm_Intk */ |
| 84885 | 30305, |
| 84886 | /* VFNMADD213SSZm_Intkz */ |
| 84887 | 30310, |
| 84888 | /* VFNMADD213SSZr */ |
| 84889 | 30315, |
| 84890 | /* VFNMADD213SSZr_Int */ |
| 84891 | 30319, |
| 84892 | /* VFNMADD213SSZr_Intk */ |
| 84893 | 30323, |
| 84894 | /* VFNMADD213SSZr_Intkz */ |
| 84895 | 30328, |
| 84896 | /* VFNMADD213SSZrb */ |
| 84897 | 30333, |
| 84898 | /* VFNMADD213SSZrb_Int */ |
| 84899 | 30338, |
| 84900 | /* VFNMADD213SSZrb_Intk */ |
| 84901 | 30343, |
| 84902 | /* VFNMADD213SSZrb_Intkz */ |
| 84903 | 30349, |
| 84904 | /* VFNMADD213SSm */ |
| 84905 | 30355, |
| 84906 | /* VFNMADD213SSm_Int */ |
| 84907 | 30359, |
| 84908 | /* VFNMADD213SSr */ |
| 84909 | 30363, |
| 84910 | /* VFNMADD213SSr_Int */ |
| 84911 | 30367, |
| 84912 | /* VFNMADD231PDYm */ |
| 84913 | 30371, |
| 84914 | /* VFNMADD231PDYr */ |
| 84915 | 30375, |
| 84916 | /* VFNMADD231PDZ128m */ |
| 84917 | 30379, |
| 84918 | /* VFNMADD231PDZ128mb */ |
| 84919 | 30383, |
| 84920 | /* VFNMADD231PDZ128mbk */ |
| 84921 | 30387, |
| 84922 | /* VFNMADD231PDZ128mbkz */ |
| 84923 | 30392, |
| 84924 | /* VFNMADD231PDZ128mk */ |
| 84925 | 30397, |
| 84926 | /* VFNMADD231PDZ128mkz */ |
| 84927 | 30402, |
| 84928 | /* VFNMADD231PDZ128r */ |
| 84929 | 30407, |
| 84930 | /* VFNMADD231PDZ128rk */ |
| 84931 | 30411, |
| 84932 | /* VFNMADD231PDZ128rkz */ |
| 84933 | 30416, |
| 84934 | /* VFNMADD231PDZ256m */ |
| 84935 | 30421, |
| 84936 | /* VFNMADD231PDZ256mb */ |
| 84937 | 30425, |
| 84938 | /* VFNMADD231PDZ256mbk */ |
| 84939 | 30429, |
| 84940 | /* VFNMADD231PDZ256mbkz */ |
| 84941 | 30434, |
| 84942 | /* VFNMADD231PDZ256mk */ |
| 84943 | 30439, |
| 84944 | /* VFNMADD231PDZ256mkz */ |
| 84945 | 30444, |
| 84946 | /* VFNMADD231PDZ256r */ |
| 84947 | 30449, |
| 84948 | /* VFNMADD231PDZ256rk */ |
| 84949 | 30453, |
| 84950 | /* VFNMADD231PDZ256rkz */ |
| 84951 | 30458, |
| 84952 | /* VFNMADD231PDZm */ |
| 84953 | 30463, |
| 84954 | /* VFNMADD231PDZmb */ |
| 84955 | 30467, |
| 84956 | /* VFNMADD231PDZmbk */ |
| 84957 | 30471, |
| 84958 | /* VFNMADD231PDZmbkz */ |
| 84959 | 30476, |
| 84960 | /* VFNMADD231PDZmk */ |
| 84961 | 30481, |
| 84962 | /* VFNMADD231PDZmkz */ |
| 84963 | 30486, |
| 84964 | /* VFNMADD231PDZr */ |
| 84965 | 30491, |
| 84966 | /* VFNMADD231PDZrb */ |
| 84967 | 30495, |
| 84968 | /* VFNMADD231PDZrbk */ |
| 84969 | 30500, |
| 84970 | /* VFNMADD231PDZrbkz */ |
| 84971 | 30506, |
| 84972 | /* VFNMADD231PDZrk */ |
| 84973 | 30512, |
| 84974 | /* VFNMADD231PDZrkz */ |
| 84975 | 30517, |
| 84976 | /* VFNMADD231PDm */ |
| 84977 | 30522, |
| 84978 | /* VFNMADD231PDr */ |
| 84979 | 30526, |
| 84980 | /* VFNMADD231PHZ128m */ |
| 84981 | 30530, |
| 84982 | /* VFNMADD231PHZ128mb */ |
| 84983 | 30534, |
| 84984 | /* VFNMADD231PHZ128mbk */ |
| 84985 | 30538, |
| 84986 | /* VFNMADD231PHZ128mbkz */ |
| 84987 | 30543, |
| 84988 | /* VFNMADD231PHZ128mk */ |
| 84989 | 30548, |
| 84990 | /* VFNMADD231PHZ128mkz */ |
| 84991 | 30553, |
| 84992 | /* VFNMADD231PHZ128r */ |
| 84993 | 30558, |
| 84994 | /* VFNMADD231PHZ128rk */ |
| 84995 | 30562, |
| 84996 | /* VFNMADD231PHZ128rkz */ |
| 84997 | 30567, |
| 84998 | /* VFNMADD231PHZ256m */ |
| 84999 | 30572, |
| 85000 | /* VFNMADD231PHZ256mb */ |
| 85001 | 30576, |
| 85002 | /* VFNMADD231PHZ256mbk */ |
| 85003 | 30580, |
| 85004 | /* VFNMADD231PHZ256mbkz */ |
| 85005 | 30585, |
| 85006 | /* VFNMADD231PHZ256mk */ |
| 85007 | 30590, |
| 85008 | /* VFNMADD231PHZ256mkz */ |
| 85009 | 30595, |
| 85010 | /* VFNMADD231PHZ256r */ |
| 85011 | 30600, |
| 85012 | /* VFNMADD231PHZ256rk */ |
| 85013 | 30604, |
| 85014 | /* VFNMADD231PHZ256rkz */ |
| 85015 | 30609, |
| 85016 | /* VFNMADD231PHZm */ |
| 85017 | 30614, |
| 85018 | /* VFNMADD231PHZmb */ |
| 85019 | 30618, |
| 85020 | /* VFNMADD231PHZmbk */ |
| 85021 | 30622, |
| 85022 | /* VFNMADD231PHZmbkz */ |
| 85023 | 30627, |
| 85024 | /* VFNMADD231PHZmk */ |
| 85025 | 30632, |
| 85026 | /* VFNMADD231PHZmkz */ |
| 85027 | 30637, |
| 85028 | /* VFNMADD231PHZr */ |
| 85029 | 30642, |
| 85030 | /* VFNMADD231PHZrb */ |
| 85031 | 30646, |
| 85032 | /* VFNMADD231PHZrbk */ |
| 85033 | 30651, |
| 85034 | /* VFNMADD231PHZrbkz */ |
| 85035 | 30657, |
| 85036 | /* VFNMADD231PHZrk */ |
| 85037 | 30663, |
| 85038 | /* VFNMADD231PHZrkz */ |
| 85039 | 30668, |
| 85040 | /* VFNMADD231PSYm */ |
| 85041 | 30673, |
| 85042 | /* VFNMADD231PSYr */ |
| 85043 | 30677, |
| 85044 | /* VFNMADD231PSZ128m */ |
| 85045 | 30681, |
| 85046 | /* VFNMADD231PSZ128mb */ |
| 85047 | 30685, |
| 85048 | /* VFNMADD231PSZ128mbk */ |
| 85049 | 30689, |
| 85050 | /* VFNMADD231PSZ128mbkz */ |
| 85051 | 30694, |
| 85052 | /* VFNMADD231PSZ128mk */ |
| 85053 | 30699, |
| 85054 | /* VFNMADD231PSZ128mkz */ |
| 85055 | 30704, |
| 85056 | /* VFNMADD231PSZ128r */ |
| 85057 | 30709, |
| 85058 | /* VFNMADD231PSZ128rk */ |
| 85059 | 30713, |
| 85060 | /* VFNMADD231PSZ128rkz */ |
| 85061 | 30718, |
| 85062 | /* VFNMADD231PSZ256m */ |
| 85063 | 30723, |
| 85064 | /* VFNMADD231PSZ256mb */ |
| 85065 | 30727, |
| 85066 | /* VFNMADD231PSZ256mbk */ |
| 85067 | 30731, |
| 85068 | /* VFNMADD231PSZ256mbkz */ |
| 85069 | 30736, |
| 85070 | /* VFNMADD231PSZ256mk */ |
| 85071 | 30741, |
| 85072 | /* VFNMADD231PSZ256mkz */ |
| 85073 | 30746, |
| 85074 | /* VFNMADD231PSZ256r */ |
| 85075 | 30751, |
| 85076 | /* VFNMADD231PSZ256rk */ |
| 85077 | 30755, |
| 85078 | /* VFNMADD231PSZ256rkz */ |
| 85079 | 30760, |
| 85080 | /* VFNMADD231PSZm */ |
| 85081 | 30765, |
| 85082 | /* VFNMADD231PSZmb */ |
| 85083 | 30769, |
| 85084 | /* VFNMADD231PSZmbk */ |
| 85085 | 30773, |
| 85086 | /* VFNMADD231PSZmbkz */ |
| 85087 | 30778, |
| 85088 | /* VFNMADD231PSZmk */ |
| 85089 | 30783, |
| 85090 | /* VFNMADD231PSZmkz */ |
| 85091 | 30788, |
| 85092 | /* VFNMADD231PSZr */ |
| 85093 | 30793, |
| 85094 | /* VFNMADD231PSZrb */ |
| 85095 | 30797, |
| 85096 | /* VFNMADD231PSZrbk */ |
| 85097 | 30802, |
| 85098 | /* VFNMADD231PSZrbkz */ |
| 85099 | 30808, |
| 85100 | /* VFNMADD231PSZrk */ |
| 85101 | 30814, |
| 85102 | /* VFNMADD231PSZrkz */ |
| 85103 | 30819, |
| 85104 | /* VFNMADD231PSm */ |
| 85105 | 30824, |
| 85106 | /* VFNMADD231PSr */ |
| 85107 | 30828, |
| 85108 | /* VFNMADD231SDZm */ |
| 85109 | 30832, |
| 85110 | /* VFNMADD231SDZm_Int */ |
| 85111 | 30836, |
| 85112 | /* VFNMADD231SDZm_Intk */ |
| 85113 | 30840, |
| 85114 | /* VFNMADD231SDZm_Intkz */ |
| 85115 | 30845, |
| 85116 | /* VFNMADD231SDZr */ |
| 85117 | 30850, |
| 85118 | /* VFNMADD231SDZr_Int */ |
| 85119 | 30854, |
| 85120 | /* VFNMADD231SDZr_Intk */ |
| 85121 | 30858, |
| 85122 | /* VFNMADD231SDZr_Intkz */ |
| 85123 | 30863, |
| 85124 | /* VFNMADD231SDZrb */ |
| 85125 | 30868, |
| 85126 | /* VFNMADD231SDZrb_Int */ |
| 85127 | 30873, |
| 85128 | /* VFNMADD231SDZrb_Intk */ |
| 85129 | 30878, |
| 85130 | /* VFNMADD231SDZrb_Intkz */ |
| 85131 | 30884, |
| 85132 | /* VFNMADD231SDm */ |
| 85133 | 30890, |
| 85134 | /* VFNMADD231SDm_Int */ |
| 85135 | 30894, |
| 85136 | /* VFNMADD231SDr */ |
| 85137 | 30898, |
| 85138 | /* VFNMADD231SDr_Int */ |
| 85139 | 30902, |
| 85140 | /* VFNMADD231SHZm */ |
| 85141 | 30906, |
| 85142 | /* VFNMADD231SHZm_Int */ |
| 85143 | 30910, |
| 85144 | /* VFNMADD231SHZm_Intk */ |
| 85145 | 30914, |
| 85146 | /* VFNMADD231SHZm_Intkz */ |
| 85147 | 30919, |
| 85148 | /* VFNMADD231SHZr */ |
| 85149 | 30924, |
| 85150 | /* VFNMADD231SHZr_Int */ |
| 85151 | 30928, |
| 85152 | /* VFNMADD231SHZr_Intk */ |
| 85153 | 30932, |
| 85154 | /* VFNMADD231SHZr_Intkz */ |
| 85155 | 30937, |
| 85156 | /* VFNMADD231SHZrb */ |
| 85157 | 30942, |
| 85158 | /* VFNMADD231SHZrb_Int */ |
| 85159 | 30947, |
| 85160 | /* VFNMADD231SHZrb_Intk */ |
| 85161 | 30952, |
| 85162 | /* VFNMADD231SHZrb_Intkz */ |
| 85163 | 30958, |
| 85164 | /* VFNMADD231SSZm */ |
| 85165 | 30964, |
| 85166 | /* VFNMADD231SSZm_Int */ |
| 85167 | 30968, |
| 85168 | /* VFNMADD231SSZm_Intk */ |
| 85169 | 30972, |
| 85170 | /* VFNMADD231SSZm_Intkz */ |
| 85171 | 30977, |
| 85172 | /* VFNMADD231SSZr */ |
| 85173 | 30982, |
| 85174 | /* VFNMADD231SSZr_Int */ |
| 85175 | 30986, |
| 85176 | /* VFNMADD231SSZr_Intk */ |
| 85177 | 30990, |
| 85178 | /* VFNMADD231SSZr_Intkz */ |
| 85179 | 30995, |
| 85180 | /* VFNMADD231SSZrb */ |
| 85181 | 31000, |
| 85182 | /* VFNMADD231SSZrb_Int */ |
| 85183 | 31005, |
| 85184 | /* VFNMADD231SSZrb_Intk */ |
| 85185 | 31010, |
| 85186 | /* VFNMADD231SSZrb_Intkz */ |
| 85187 | 31016, |
| 85188 | /* VFNMADD231SSm */ |
| 85189 | 31022, |
| 85190 | /* VFNMADD231SSm_Int */ |
| 85191 | 31026, |
| 85192 | /* VFNMADD231SSr */ |
| 85193 | 31030, |
| 85194 | /* VFNMADD231SSr_Int */ |
| 85195 | 31034, |
| 85196 | /* VFNMADDPD4Ymr */ |
| 85197 | 31038, |
| 85198 | /* VFNMADDPD4Yrm */ |
| 85199 | 31042, |
| 85200 | /* VFNMADDPD4Yrr */ |
| 85201 | 31046, |
| 85202 | /* VFNMADDPD4Yrr_REV */ |
| 85203 | 31050, |
| 85204 | /* VFNMADDPD4mr */ |
| 85205 | 31054, |
| 85206 | /* VFNMADDPD4rm */ |
| 85207 | 31058, |
| 85208 | /* VFNMADDPD4rr */ |
| 85209 | 31062, |
| 85210 | /* VFNMADDPD4rr_REV */ |
| 85211 | 31066, |
| 85212 | /* VFNMADDPS4Ymr */ |
| 85213 | 31070, |
| 85214 | /* VFNMADDPS4Yrm */ |
| 85215 | 31074, |
| 85216 | /* VFNMADDPS4Yrr */ |
| 85217 | 31078, |
| 85218 | /* VFNMADDPS4Yrr_REV */ |
| 85219 | 31082, |
| 85220 | /* VFNMADDPS4mr */ |
| 85221 | 31086, |
| 85222 | /* VFNMADDPS4rm */ |
| 85223 | 31090, |
| 85224 | /* VFNMADDPS4rr */ |
| 85225 | 31094, |
| 85226 | /* VFNMADDPS4rr_REV */ |
| 85227 | 31098, |
| 85228 | /* VFNMADDSD4mr */ |
| 85229 | 31102, |
| 85230 | /* VFNMADDSD4mr_Int */ |
| 85231 | 31106, |
| 85232 | /* VFNMADDSD4rm */ |
| 85233 | 31110, |
| 85234 | /* VFNMADDSD4rm_Int */ |
| 85235 | 31114, |
| 85236 | /* VFNMADDSD4rr */ |
| 85237 | 31118, |
| 85238 | /* VFNMADDSD4rr_Int */ |
| 85239 | 31122, |
| 85240 | /* VFNMADDSD4rr_Int_REV */ |
| 85241 | 31126, |
| 85242 | /* VFNMADDSD4rr_REV */ |
| 85243 | 31130, |
| 85244 | /* VFNMADDSS4mr */ |
| 85245 | 31134, |
| 85246 | /* VFNMADDSS4mr_Int */ |
| 85247 | 31138, |
| 85248 | /* VFNMADDSS4rm */ |
| 85249 | 31142, |
| 85250 | /* VFNMADDSS4rm_Int */ |
| 85251 | 31146, |
| 85252 | /* VFNMADDSS4rr */ |
| 85253 | 31150, |
| 85254 | /* VFNMADDSS4rr_Int */ |
| 85255 | 31154, |
| 85256 | /* VFNMADDSS4rr_Int_REV */ |
| 85257 | 31158, |
| 85258 | /* VFNMADDSS4rr_REV */ |
| 85259 | 31162, |
| 85260 | /* VFNMSUB132PDYm */ |
| 85261 | 31166, |
| 85262 | /* VFNMSUB132PDYr */ |
| 85263 | 31170, |
| 85264 | /* VFNMSUB132PDZ128m */ |
| 85265 | 31174, |
| 85266 | /* VFNMSUB132PDZ128mb */ |
| 85267 | 31178, |
| 85268 | /* VFNMSUB132PDZ128mbk */ |
| 85269 | 31182, |
| 85270 | /* VFNMSUB132PDZ128mbkz */ |
| 85271 | 31187, |
| 85272 | /* VFNMSUB132PDZ128mk */ |
| 85273 | 31192, |
| 85274 | /* VFNMSUB132PDZ128mkz */ |
| 85275 | 31197, |
| 85276 | /* VFNMSUB132PDZ128r */ |
| 85277 | 31202, |
| 85278 | /* VFNMSUB132PDZ128rk */ |
| 85279 | 31206, |
| 85280 | /* VFNMSUB132PDZ128rkz */ |
| 85281 | 31211, |
| 85282 | /* VFNMSUB132PDZ256m */ |
| 85283 | 31216, |
| 85284 | /* VFNMSUB132PDZ256mb */ |
| 85285 | 31220, |
| 85286 | /* VFNMSUB132PDZ256mbk */ |
| 85287 | 31224, |
| 85288 | /* VFNMSUB132PDZ256mbkz */ |
| 85289 | 31229, |
| 85290 | /* VFNMSUB132PDZ256mk */ |
| 85291 | 31234, |
| 85292 | /* VFNMSUB132PDZ256mkz */ |
| 85293 | 31239, |
| 85294 | /* VFNMSUB132PDZ256r */ |
| 85295 | 31244, |
| 85296 | /* VFNMSUB132PDZ256rk */ |
| 85297 | 31248, |
| 85298 | /* VFNMSUB132PDZ256rkz */ |
| 85299 | 31253, |
| 85300 | /* VFNMSUB132PDZm */ |
| 85301 | 31258, |
| 85302 | /* VFNMSUB132PDZmb */ |
| 85303 | 31262, |
| 85304 | /* VFNMSUB132PDZmbk */ |
| 85305 | 31266, |
| 85306 | /* VFNMSUB132PDZmbkz */ |
| 85307 | 31271, |
| 85308 | /* VFNMSUB132PDZmk */ |
| 85309 | 31276, |
| 85310 | /* VFNMSUB132PDZmkz */ |
| 85311 | 31281, |
| 85312 | /* VFNMSUB132PDZr */ |
| 85313 | 31286, |
| 85314 | /* VFNMSUB132PDZrb */ |
| 85315 | 31290, |
| 85316 | /* VFNMSUB132PDZrbk */ |
| 85317 | 31295, |
| 85318 | /* VFNMSUB132PDZrbkz */ |
| 85319 | 31301, |
| 85320 | /* VFNMSUB132PDZrk */ |
| 85321 | 31307, |
| 85322 | /* VFNMSUB132PDZrkz */ |
| 85323 | 31312, |
| 85324 | /* VFNMSUB132PDm */ |
| 85325 | 31317, |
| 85326 | /* VFNMSUB132PDr */ |
| 85327 | 31321, |
| 85328 | /* VFNMSUB132PHZ128m */ |
| 85329 | 31325, |
| 85330 | /* VFNMSUB132PHZ128mb */ |
| 85331 | 31329, |
| 85332 | /* VFNMSUB132PHZ128mbk */ |
| 85333 | 31333, |
| 85334 | /* VFNMSUB132PHZ128mbkz */ |
| 85335 | 31338, |
| 85336 | /* VFNMSUB132PHZ128mk */ |
| 85337 | 31343, |
| 85338 | /* VFNMSUB132PHZ128mkz */ |
| 85339 | 31348, |
| 85340 | /* VFNMSUB132PHZ128r */ |
| 85341 | 31353, |
| 85342 | /* VFNMSUB132PHZ128rk */ |
| 85343 | 31357, |
| 85344 | /* VFNMSUB132PHZ128rkz */ |
| 85345 | 31362, |
| 85346 | /* VFNMSUB132PHZ256m */ |
| 85347 | 31367, |
| 85348 | /* VFNMSUB132PHZ256mb */ |
| 85349 | 31371, |
| 85350 | /* VFNMSUB132PHZ256mbk */ |
| 85351 | 31375, |
| 85352 | /* VFNMSUB132PHZ256mbkz */ |
| 85353 | 31380, |
| 85354 | /* VFNMSUB132PHZ256mk */ |
| 85355 | 31385, |
| 85356 | /* VFNMSUB132PHZ256mkz */ |
| 85357 | 31390, |
| 85358 | /* VFNMSUB132PHZ256r */ |
| 85359 | 31395, |
| 85360 | /* VFNMSUB132PHZ256rk */ |
| 85361 | 31399, |
| 85362 | /* VFNMSUB132PHZ256rkz */ |
| 85363 | 31404, |
| 85364 | /* VFNMSUB132PHZm */ |
| 85365 | 31409, |
| 85366 | /* VFNMSUB132PHZmb */ |
| 85367 | 31413, |
| 85368 | /* VFNMSUB132PHZmbk */ |
| 85369 | 31417, |
| 85370 | /* VFNMSUB132PHZmbkz */ |
| 85371 | 31422, |
| 85372 | /* VFNMSUB132PHZmk */ |
| 85373 | 31427, |
| 85374 | /* VFNMSUB132PHZmkz */ |
| 85375 | 31432, |
| 85376 | /* VFNMSUB132PHZr */ |
| 85377 | 31437, |
| 85378 | /* VFNMSUB132PHZrb */ |
| 85379 | 31441, |
| 85380 | /* VFNMSUB132PHZrbk */ |
| 85381 | 31446, |
| 85382 | /* VFNMSUB132PHZrbkz */ |
| 85383 | 31452, |
| 85384 | /* VFNMSUB132PHZrk */ |
| 85385 | 31458, |
| 85386 | /* VFNMSUB132PHZrkz */ |
| 85387 | 31463, |
| 85388 | /* VFNMSUB132PSYm */ |
| 85389 | 31468, |
| 85390 | /* VFNMSUB132PSYr */ |
| 85391 | 31472, |
| 85392 | /* VFNMSUB132PSZ128m */ |
| 85393 | 31476, |
| 85394 | /* VFNMSUB132PSZ128mb */ |
| 85395 | 31480, |
| 85396 | /* VFNMSUB132PSZ128mbk */ |
| 85397 | 31484, |
| 85398 | /* VFNMSUB132PSZ128mbkz */ |
| 85399 | 31489, |
| 85400 | /* VFNMSUB132PSZ128mk */ |
| 85401 | 31494, |
| 85402 | /* VFNMSUB132PSZ128mkz */ |
| 85403 | 31499, |
| 85404 | /* VFNMSUB132PSZ128r */ |
| 85405 | 31504, |
| 85406 | /* VFNMSUB132PSZ128rk */ |
| 85407 | 31508, |
| 85408 | /* VFNMSUB132PSZ128rkz */ |
| 85409 | 31513, |
| 85410 | /* VFNMSUB132PSZ256m */ |
| 85411 | 31518, |
| 85412 | /* VFNMSUB132PSZ256mb */ |
| 85413 | 31522, |
| 85414 | /* VFNMSUB132PSZ256mbk */ |
| 85415 | 31526, |
| 85416 | /* VFNMSUB132PSZ256mbkz */ |
| 85417 | 31531, |
| 85418 | /* VFNMSUB132PSZ256mk */ |
| 85419 | 31536, |
| 85420 | /* VFNMSUB132PSZ256mkz */ |
| 85421 | 31541, |
| 85422 | /* VFNMSUB132PSZ256r */ |
| 85423 | 31546, |
| 85424 | /* VFNMSUB132PSZ256rk */ |
| 85425 | 31550, |
| 85426 | /* VFNMSUB132PSZ256rkz */ |
| 85427 | 31555, |
| 85428 | /* VFNMSUB132PSZm */ |
| 85429 | 31560, |
| 85430 | /* VFNMSUB132PSZmb */ |
| 85431 | 31564, |
| 85432 | /* VFNMSUB132PSZmbk */ |
| 85433 | 31568, |
| 85434 | /* VFNMSUB132PSZmbkz */ |
| 85435 | 31573, |
| 85436 | /* VFNMSUB132PSZmk */ |
| 85437 | 31578, |
| 85438 | /* VFNMSUB132PSZmkz */ |
| 85439 | 31583, |
| 85440 | /* VFNMSUB132PSZr */ |
| 85441 | 31588, |
| 85442 | /* VFNMSUB132PSZrb */ |
| 85443 | 31592, |
| 85444 | /* VFNMSUB132PSZrbk */ |
| 85445 | 31597, |
| 85446 | /* VFNMSUB132PSZrbkz */ |
| 85447 | 31603, |
| 85448 | /* VFNMSUB132PSZrk */ |
| 85449 | 31609, |
| 85450 | /* VFNMSUB132PSZrkz */ |
| 85451 | 31614, |
| 85452 | /* VFNMSUB132PSm */ |
| 85453 | 31619, |
| 85454 | /* VFNMSUB132PSr */ |
| 85455 | 31623, |
| 85456 | /* VFNMSUB132SDZm */ |
| 85457 | 31627, |
| 85458 | /* VFNMSUB132SDZm_Int */ |
| 85459 | 31631, |
| 85460 | /* VFNMSUB132SDZm_Intk */ |
| 85461 | 31635, |
| 85462 | /* VFNMSUB132SDZm_Intkz */ |
| 85463 | 31640, |
| 85464 | /* VFNMSUB132SDZr */ |
| 85465 | 31645, |
| 85466 | /* VFNMSUB132SDZr_Int */ |
| 85467 | 31649, |
| 85468 | /* VFNMSUB132SDZr_Intk */ |
| 85469 | 31653, |
| 85470 | /* VFNMSUB132SDZr_Intkz */ |
| 85471 | 31658, |
| 85472 | /* VFNMSUB132SDZrb */ |
| 85473 | 31663, |
| 85474 | /* VFNMSUB132SDZrb_Int */ |
| 85475 | 31668, |
| 85476 | /* VFNMSUB132SDZrb_Intk */ |
| 85477 | 31673, |
| 85478 | /* VFNMSUB132SDZrb_Intkz */ |
| 85479 | 31679, |
| 85480 | /* VFNMSUB132SDm */ |
| 85481 | 31685, |
| 85482 | /* VFNMSUB132SDm_Int */ |
| 85483 | 31689, |
| 85484 | /* VFNMSUB132SDr */ |
| 85485 | 31693, |
| 85486 | /* VFNMSUB132SDr_Int */ |
| 85487 | 31697, |
| 85488 | /* VFNMSUB132SHZm */ |
| 85489 | 31701, |
| 85490 | /* VFNMSUB132SHZm_Int */ |
| 85491 | 31705, |
| 85492 | /* VFNMSUB132SHZm_Intk */ |
| 85493 | 31709, |
| 85494 | /* VFNMSUB132SHZm_Intkz */ |
| 85495 | 31714, |
| 85496 | /* VFNMSUB132SHZr */ |
| 85497 | 31719, |
| 85498 | /* VFNMSUB132SHZr_Int */ |
| 85499 | 31723, |
| 85500 | /* VFNMSUB132SHZr_Intk */ |
| 85501 | 31727, |
| 85502 | /* VFNMSUB132SHZr_Intkz */ |
| 85503 | 31732, |
| 85504 | /* VFNMSUB132SHZrb */ |
| 85505 | 31737, |
| 85506 | /* VFNMSUB132SHZrb_Int */ |
| 85507 | 31742, |
| 85508 | /* VFNMSUB132SHZrb_Intk */ |
| 85509 | 31747, |
| 85510 | /* VFNMSUB132SHZrb_Intkz */ |
| 85511 | 31753, |
| 85512 | /* VFNMSUB132SSZm */ |
| 85513 | 31759, |
| 85514 | /* VFNMSUB132SSZm_Int */ |
| 85515 | 31763, |
| 85516 | /* VFNMSUB132SSZm_Intk */ |
| 85517 | 31767, |
| 85518 | /* VFNMSUB132SSZm_Intkz */ |
| 85519 | 31772, |
| 85520 | /* VFNMSUB132SSZr */ |
| 85521 | 31777, |
| 85522 | /* VFNMSUB132SSZr_Int */ |
| 85523 | 31781, |
| 85524 | /* VFNMSUB132SSZr_Intk */ |
| 85525 | 31785, |
| 85526 | /* VFNMSUB132SSZr_Intkz */ |
| 85527 | 31790, |
| 85528 | /* VFNMSUB132SSZrb */ |
| 85529 | 31795, |
| 85530 | /* VFNMSUB132SSZrb_Int */ |
| 85531 | 31800, |
| 85532 | /* VFNMSUB132SSZrb_Intk */ |
| 85533 | 31805, |
| 85534 | /* VFNMSUB132SSZrb_Intkz */ |
| 85535 | 31811, |
| 85536 | /* VFNMSUB132SSm */ |
| 85537 | 31817, |
| 85538 | /* VFNMSUB132SSm_Int */ |
| 85539 | 31821, |
| 85540 | /* VFNMSUB132SSr */ |
| 85541 | 31825, |
| 85542 | /* VFNMSUB132SSr_Int */ |
| 85543 | 31829, |
| 85544 | /* VFNMSUB213PDYm */ |
| 85545 | 31833, |
| 85546 | /* VFNMSUB213PDYr */ |
| 85547 | 31837, |
| 85548 | /* VFNMSUB213PDZ128m */ |
| 85549 | 31841, |
| 85550 | /* VFNMSUB213PDZ128mb */ |
| 85551 | 31845, |
| 85552 | /* VFNMSUB213PDZ128mbk */ |
| 85553 | 31849, |
| 85554 | /* VFNMSUB213PDZ128mbkz */ |
| 85555 | 31854, |
| 85556 | /* VFNMSUB213PDZ128mk */ |
| 85557 | 31859, |
| 85558 | /* VFNMSUB213PDZ128mkz */ |
| 85559 | 31864, |
| 85560 | /* VFNMSUB213PDZ128r */ |
| 85561 | 31869, |
| 85562 | /* VFNMSUB213PDZ128rk */ |
| 85563 | 31873, |
| 85564 | /* VFNMSUB213PDZ128rkz */ |
| 85565 | 31878, |
| 85566 | /* VFNMSUB213PDZ256m */ |
| 85567 | 31883, |
| 85568 | /* VFNMSUB213PDZ256mb */ |
| 85569 | 31887, |
| 85570 | /* VFNMSUB213PDZ256mbk */ |
| 85571 | 31891, |
| 85572 | /* VFNMSUB213PDZ256mbkz */ |
| 85573 | 31896, |
| 85574 | /* VFNMSUB213PDZ256mk */ |
| 85575 | 31901, |
| 85576 | /* VFNMSUB213PDZ256mkz */ |
| 85577 | 31906, |
| 85578 | /* VFNMSUB213PDZ256r */ |
| 85579 | 31911, |
| 85580 | /* VFNMSUB213PDZ256rk */ |
| 85581 | 31915, |
| 85582 | /* VFNMSUB213PDZ256rkz */ |
| 85583 | 31920, |
| 85584 | /* VFNMSUB213PDZm */ |
| 85585 | 31925, |
| 85586 | /* VFNMSUB213PDZmb */ |
| 85587 | 31929, |
| 85588 | /* VFNMSUB213PDZmbk */ |
| 85589 | 31933, |
| 85590 | /* VFNMSUB213PDZmbkz */ |
| 85591 | 31938, |
| 85592 | /* VFNMSUB213PDZmk */ |
| 85593 | 31943, |
| 85594 | /* VFNMSUB213PDZmkz */ |
| 85595 | 31948, |
| 85596 | /* VFNMSUB213PDZr */ |
| 85597 | 31953, |
| 85598 | /* VFNMSUB213PDZrb */ |
| 85599 | 31957, |
| 85600 | /* VFNMSUB213PDZrbk */ |
| 85601 | 31962, |
| 85602 | /* VFNMSUB213PDZrbkz */ |
| 85603 | 31968, |
| 85604 | /* VFNMSUB213PDZrk */ |
| 85605 | 31974, |
| 85606 | /* VFNMSUB213PDZrkz */ |
| 85607 | 31979, |
| 85608 | /* VFNMSUB213PDm */ |
| 85609 | 31984, |
| 85610 | /* VFNMSUB213PDr */ |
| 85611 | 31988, |
| 85612 | /* VFNMSUB213PHZ128m */ |
| 85613 | 31992, |
| 85614 | /* VFNMSUB213PHZ128mb */ |
| 85615 | 31996, |
| 85616 | /* VFNMSUB213PHZ128mbk */ |
| 85617 | 32000, |
| 85618 | /* VFNMSUB213PHZ128mbkz */ |
| 85619 | 32005, |
| 85620 | /* VFNMSUB213PHZ128mk */ |
| 85621 | 32010, |
| 85622 | /* VFNMSUB213PHZ128mkz */ |
| 85623 | 32015, |
| 85624 | /* VFNMSUB213PHZ128r */ |
| 85625 | 32020, |
| 85626 | /* VFNMSUB213PHZ128rk */ |
| 85627 | 32024, |
| 85628 | /* VFNMSUB213PHZ128rkz */ |
| 85629 | 32029, |
| 85630 | /* VFNMSUB213PHZ256m */ |
| 85631 | 32034, |
| 85632 | /* VFNMSUB213PHZ256mb */ |
| 85633 | 32038, |
| 85634 | /* VFNMSUB213PHZ256mbk */ |
| 85635 | 32042, |
| 85636 | /* VFNMSUB213PHZ256mbkz */ |
| 85637 | 32047, |
| 85638 | /* VFNMSUB213PHZ256mk */ |
| 85639 | 32052, |
| 85640 | /* VFNMSUB213PHZ256mkz */ |
| 85641 | 32057, |
| 85642 | /* VFNMSUB213PHZ256r */ |
| 85643 | 32062, |
| 85644 | /* VFNMSUB213PHZ256rk */ |
| 85645 | 32066, |
| 85646 | /* VFNMSUB213PHZ256rkz */ |
| 85647 | 32071, |
| 85648 | /* VFNMSUB213PHZm */ |
| 85649 | 32076, |
| 85650 | /* VFNMSUB213PHZmb */ |
| 85651 | 32080, |
| 85652 | /* VFNMSUB213PHZmbk */ |
| 85653 | 32084, |
| 85654 | /* VFNMSUB213PHZmbkz */ |
| 85655 | 32089, |
| 85656 | /* VFNMSUB213PHZmk */ |
| 85657 | 32094, |
| 85658 | /* VFNMSUB213PHZmkz */ |
| 85659 | 32099, |
| 85660 | /* VFNMSUB213PHZr */ |
| 85661 | 32104, |
| 85662 | /* VFNMSUB213PHZrb */ |
| 85663 | 32108, |
| 85664 | /* VFNMSUB213PHZrbk */ |
| 85665 | 32113, |
| 85666 | /* VFNMSUB213PHZrbkz */ |
| 85667 | 32119, |
| 85668 | /* VFNMSUB213PHZrk */ |
| 85669 | 32125, |
| 85670 | /* VFNMSUB213PHZrkz */ |
| 85671 | 32130, |
| 85672 | /* VFNMSUB213PSYm */ |
| 85673 | 32135, |
| 85674 | /* VFNMSUB213PSYr */ |
| 85675 | 32139, |
| 85676 | /* VFNMSUB213PSZ128m */ |
| 85677 | 32143, |
| 85678 | /* VFNMSUB213PSZ128mb */ |
| 85679 | 32147, |
| 85680 | /* VFNMSUB213PSZ128mbk */ |
| 85681 | 32151, |
| 85682 | /* VFNMSUB213PSZ128mbkz */ |
| 85683 | 32156, |
| 85684 | /* VFNMSUB213PSZ128mk */ |
| 85685 | 32161, |
| 85686 | /* VFNMSUB213PSZ128mkz */ |
| 85687 | 32166, |
| 85688 | /* VFNMSUB213PSZ128r */ |
| 85689 | 32171, |
| 85690 | /* VFNMSUB213PSZ128rk */ |
| 85691 | 32175, |
| 85692 | /* VFNMSUB213PSZ128rkz */ |
| 85693 | 32180, |
| 85694 | /* VFNMSUB213PSZ256m */ |
| 85695 | 32185, |
| 85696 | /* VFNMSUB213PSZ256mb */ |
| 85697 | 32189, |
| 85698 | /* VFNMSUB213PSZ256mbk */ |
| 85699 | 32193, |
| 85700 | /* VFNMSUB213PSZ256mbkz */ |
| 85701 | 32198, |
| 85702 | /* VFNMSUB213PSZ256mk */ |
| 85703 | 32203, |
| 85704 | /* VFNMSUB213PSZ256mkz */ |
| 85705 | 32208, |
| 85706 | /* VFNMSUB213PSZ256r */ |
| 85707 | 32213, |
| 85708 | /* VFNMSUB213PSZ256rk */ |
| 85709 | 32217, |
| 85710 | /* VFNMSUB213PSZ256rkz */ |
| 85711 | 32222, |
| 85712 | /* VFNMSUB213PSZm */ |
| 85713 | 32227, |
| 85714 | /* VFNMSUB213PSZmb */ |
| 85715 | 32231, |
| 85716 | /* VFNMSUB213PSZmbk */ |
| 85717 | 32235, |
| 85718 | /* VFNMSUB213PSZmbkz */ |
| 85719 | 32240, |
| 85720 | /* VFNMSUB213PSZmk */ |
| 85721 | 32245, |
| 85722 | /* VFNMSUB213PSZmkz */ |
| 85723 | 32250, |
| 85724 | /* VFNMSUB213PSZr */ |
| 85725 | 32255, |
| 85726 | /* VFNMSUB213PSZrb */ |
| 85727 | 32259, |
| 85728 | /* VFNMSUB213PSZrbk */ |
| 85729 | 32264, |
| 85730 | /* VFNMSUB213PSZrbkz */ |
| 85731 | 32270, |
| 85732 | /* VFNMSUB213PSZrk */ |
| 85733 | 32276, |
| 85734 | /* VFNMSUB213PSZrkz */ |
| 85735 | 32281, |
| 85736 | /* VFNMSUB213PSm */ |
| 85737 | 32286, |
| 85738 | /* VFNMSUB213PSr */ |
| 85739 | 32290, |
| 85740 | /* VFNMSUB213SDZm */ |
| 85741 | 32294, |
| 85742 | /* VFNMSUB213SDZm_Int */ |
| 85743 | 32298, |
| 85744 | /* VFNMSUB213SDZm_Intk */ |
| 85745 | 32302, |
| 85746 | /* VFNMSUB213SDZm_Intkz */ |
| 85747 | 32307, |
| 85748 | /* VFNMSUB213SDZr */ |
| 85749 | 32312, |
| 85750 | /* VFNMSUB213SDZr_Int */ |
| 85751 | 32316, |
| 85752 | /* VFNMSUB213SDZr_Intk */ |
| 85753 | 32320, |
| 85754 | /* VFNMSUB213SDZr_Intkz */ |
| 85755 | 32325, |
| 85756 | /* VFNMSUB213SDZrb */ |
| 85757 | 32330, |
| 85758 | /* VFNMSUB213SDZrb_Int */ |
| 85759 | 32335, |
| 85760 | /* VFNMSUB213SDZrb_Intk */ |
| 85761 | 32340, |
| 85762 | /* VFNMSUB213SDZrb_Intkz */ |
| 85763 | 32346, |
| 85764 | /* VFNMSUB213SDm */ |
| 85765 | 32352, |
| 85766 | /* VFNMSUB213SDm_Int */ |
| 85767 | 32356, |
| 85768 | /* VFNMSUB213SDr */ |
| 85769 | 32360, |
| 85770 | /* VFNMSUB213SDr_Int */ |
| 85771 | 32364, |
| 85772 | /* VFNMSUB213SHZm */ |
| 85773 | 32368, |
| 85774 | /* VFNMSUB213SHZm_Int */ |
| 85775 | 32372, |
| 85776 | /* VFNMSUB213SHZm_Intk */ |
| 85777 | 32376, |
| 85778 | /* VFNMSUB213SHZm_Intkz */ |
| 85779 | 32381, |
| 85780 | /* VFNMSUB213SHZr */ |
| 85781 | 32386, |
| 85782 | /* VFNMSUB213SHZr_Int */ |
| 85783 | 32390, |
| 85784 | /* VFNMSUB213SHZr_Intk */ |
| 85785 | 32394, |
| 85786 | /* VFNMSUB213SHZr_Intkz */ |
| 85787 | 32399, |
| 85788 | /* VFNMSUB213SHZrb */ |
| 85789 | 32404, |
| 85790 | /* VFNMSUB213SHZrb_Int */ |
| 85791 | 32409, |
| 85792 | /* VFNMSUB213SHZrb_Intk */ |
| 85793 | 32414, |
| 85794 | /* VFNMSUB213SHZrb_Intkz */ |
| 85795 | 32420, |
| 85796 | /* VFNMSUB213SSZm */ |
| 85797 | 32426, |
| 85798 | /* VFNMSUB213SSZm_Int */ |
| 85799 | 32430, |
| 85800 | /* VFNMSUB213SSZm_Intk */ |
| 85801 | 32434, |
| 85802 | /* VFNMSUB213SSZm_Intkz */ |
| 85803 | 32439, |
| 85804 | /* VFNMSUB213SSZr */ |
| 85805 | 32444, |
| 85806 | /* VFNMSUB213SSZr_Int */ |
| 85807 | 32448, |
| 85808 | /* VFNMSUB213SSZr_Intk */ |
| 85809 | 32452, |
| 85810 | /* VFNMSUB213SSZr_Intkz */ |
| 85811 | 32457, |
| 85812 | /* VFNMSUB213SSZrb */ |
| 85813 | 32462, |
| 85814 | /* VFNMSUB213SSZrb_Int */ |
| 85815 | 32467, |
| 85816 | /* VFNMSUB213SSZrb_Intk */ |
| 85817 | 32472, |
| 85818 | /* VFNMSUB213SSZrb_Intkz */ |
| 85819 | 32478, |
| 85820 | /* VFNMSUB213SSm */ |
| 85821 | 32484, |
| 85822 | /* VFNMSUB213SSm_Int */ |
| 85823 | 32488, |
| 85824 | /* VFNMSUB213SSr */ |
| 85825 | 32492, |
| 85826 | /* VFNMSUB213SSr_Int */ |
| 85827 | 32496, |
| 85828 | /* VFNMSUB231PDYm */ |
| 85829 | 32500, |
| 85830 | /* VFNMSUB231PDYr */ |
| 85831 | 32504, |
| 85832 | /* VFNMSUB231PDZ128m */ |
| 85833 | 32508, |
| 85834 | /* VFNMSUB231PDZ128mb */ |
| 85835 | 32512, |
| 85836 | /* VFNMSUB231PDZ128mbk */ |
| 85837 | 32516, |
| 85838 | /* VFNMSUB231PDZ128mbkz */ |
| 85839 | 32521, |
| 85840 | /* VFNMSUB231PDZ128mk */ |
| 85841 | 32526, |
| 85842 | /* VFNMSUB231PDZ128mkz */ |
| 85843 | 32531, |
| 85844 | /* VFNMSUB231PDZ128r */ |
| 85845 | 32536, |
| 85846 | /* VFNMSUB231PDZ128rk */ |
| 85847 | 32540, |
| 85848 | /* VFNMSUB231PDZ128rkz */ |
| 85849 | 32545, |
| 85850 | /* VFNMSUB231PDZ256m */ |
| 85851 | 32550, |
| 85852 | /* VFNMSUB231PDZ256mb */ |
| 85853 | 32554, |
| 85854 | /* VFNMSUB231PDZ256mbk */ |
| 85855 | 32558, |
| 85856 | /* VFNMSUB231PDZ256mbkz */ |
| 85857 | 32563, |
| 85858 | /* VFNMSUB231PDZ256mk */ |
| 85859 | 32568, |
| 85860 | /* VFNMSUB231PDZ256mkz */ |
| 85861 | 32573, |
| 85862 | /* VFNMSUB231PDZ256r */ |
| 85863 | 32578, |
| 85864 | /* VFNMSUB231PDZ256rk */ |
| 85865 | 32582, |
| 85866 | /* VFNMSUB231PDZ256rkz */ |
| 85867 | 32587, |
| 85868 | /* VFNMSUB231PDZm */ |
| 85869 | 32592, |
| 85870 | /* VFNMSUB231PDZmb */ |
| 85871 | 32596, |
| 85872 | /* VFNMSUB231PDZmbk */ |
| 85873 | 32600, |
| 85874 | /* VFNMSUB231PDZmbkz */ |
| 85875 | 32605, |
| 85876 | /* VFNMSUB231PDZmk */ |
| 85877 | 32610, |
| 85878 | /* VFNMSUB231PDZmkz */ |
| 85879 | 32615, |
| 85880 | /* VFNMSUB231PDZr */ |
| 85881 | 32620, |
| 85882 | /* VFNMSUB231PDZrb */ |
| 85883 | 32624, |
| 85884 | /* VFNMSUB231PDZrbk */ |
| 85885 | 32629, |
| 85886 | /* VFNMSUB231PDZrbkz */ |
| 85887 | 32635, |
| 85888 | /* VFNMSUB231PDZrk */ |
| 85889 | 32641, |
| 85890 | /* VFNMSUB231PDZrkz */ |
| 85891 | 32646, |
| 85892 | /* VFNMSUB231PDm */ |
| 85893 | 32651, |
| 85894 | /* VFNMSUB231PDr */ |
| 85895 | 32655, |
| 85896 | /* VFNMSUB231PHZ128m */ |
| 85897 | 32659, |
| 85898 | /* VFNMSUB231PHZ128mb */ |
| 85899 | 32663, |
| 85900 | /* VFNMSUB231PHZ128mbk */ |
| 85901 | 32667, |
| 85902 | /* VFNMSUB231PHZ128mbkz */ |
| 85903 | 32672, |
| 85904 | /* VFNMSUB231PHZ128mk */ |
| 85905 | 32677, |
| 85906 | /* VFNMSUB231PHZ128mkz */ |
| 85907 | 32682, |
| 85908 | /* VFNMSUB231PHZ128r */ |
| 85909 | 32687, |
| 85910 | /* VFNMSUB231PHZ128rk */ |
| 85911 | 32691, |
| 85912 | /* VFNMSUB231PHZ128rkz */ |
| 85913 | 32696, |
| 85914 | /* VFNMSUB231PHZ256m */ |
| 85915 | 32701, |
| 85916 | /* VFNMSUB231PHZ256mb */ |
| 85917 | 32705, |
| 85918 | /* VFNMSUB231PHZ256mbk */ |
| 85919 | 32709, |
| 85920 | /* VFNMSUB231PHZ256mbkz */ |
| 85921 | 32714, |
| 85922 | /* VFNMSUB231PHZ256mk */ |
| 85923 | 32719, |
| 85924 | /* VFNMSUB231PHZ256mkz */ |
| 85925 | 32724, |
| 85926 | /* VFNMSUB231PHZ256r */ |
| 85927 | 32729, |
| 85928 | /* VFNMSUB231PHZ256rk */ |
| 85929 | 32733, |
| 85930 | /* VFNMSUB231PHZ256rkz */ |
| 85931 | 32738, |
| 85932 | /* VFNMSUB231PHZm */ |
| 85933 | 32743, |
| 85934 | /* VFNMSUB231PHZmb */ |
| 85935 | 32747, |
| 85936 | /* VFNMSUB231PHZmbk */ |
| 85937 | 32751, |
| 85938 | /* VFNMSUB231PHZmbkz */ |
| 85939 | 32756, |
| 85940 | /* VFNMSUB231PHZmk */ |
| 85941 | 32761, |
| 85942 | /* VFNMSUB231PHZmkz */ |
| 85943 | 32766, |
| 85944 | /* VFNMSUB231PHZr */ |
| 85945 | 32771, |
| 85946 | /* VFNMSUB231PHZrb */ |
| 85947 | 32775, |
| 85948 | /* VFNMSUB231PHZrbk */ |
| 85949 | 32780, |
| 85950 | /* VFNMSUB231PHZrbkz */ |
| 85951 | 32786, |
| 85952 | /* VFNMSUB231PHZrk */ |
| 85953 | 32792, |
| 85954 | /* VFNMSUB231PHZrkz */ |
| 85955 | 32797, |
| 85956 | /* VFNMSUB231PSYm */ |
| 85957 | 32802, |
| 85958 | /* VFNMSUB231PSYr */ |
| 85959 | 32806, |
| 85960 | /* VFNMSUB231PSZ128m */ |
| 85961 | 32810, |
| 85962 | /* VFNMSUB231PSZ128mb */ |
| 85963 | 32814, |
| 85964 | /* VFNMSUB231PSZ128mbk */ |
| 85965 | 32818, |
| 85966 | /* VFNMSUB231PSZ128mbkz */ |
| 85967 | 32823, |
| 85968 | /* VFNMSUB231PSZ128mk */ |
| 85969 | 32828, |
| 85970 | /* VFNMSUB231PSZ128mkz */ |
| 85971 | 32833, |
| 85972 | /* VFNMSUB231PSZ128r */ |
| 85973 | 32838, |
| 85974 | /* VFNMSUB231PSZ128rk */ |
| 85975 | 32842, |
| 85976 | /* VFNMSUB231PSZ128rkz */ |
| 85977 | 32847, |
| 85978 | /* VFNMSUB231PSZ256m */ |
| 85979 | 32852, |
| 85980 | /* VFNMSUB231PSZ256mb */ |
| 85981 | 32856, |
| 85982 | /* VFNMSUB231PSZ256mbk */ |
| 85983 | 32860, |
| 85984 | /* VFNMSUB231PSZ256mbkz */ |
| 85985 | 32865, |
| 85986 | /* VFNMSUB231PSZ256mk */ |
| 85987 | 32870, |
| 85988 | /* VFNMSUB231PSZ256mkz */ |
| 85989 | 32875, |
| 85990 | /* VFNMSUB231PSZ256r */ |
| 85991 | 32880, |
| 85992 | /* VFNMSUB231PSZ256rk */ |
| 85993 | 32884, |
| 85994 | /* VFNMSUB231PSZ256rkz */ |
| 85995 | 32889, |
| 85996 | /* VFNMSUB231PSZm */ |
| 85997 | 32894, |
| 85998 | /* VFNMSUB231PSZmb */ |
| 85999 | 32898, |
| 86000 | /* VFNMSUB231PSZmbk */ |
| 86001 | 32902, |
| 86002 | /* VFNMSUB231PSZmbkz */ |
| 86003 | 32907, |
| 86004 | /* VFNMSUB231PSZmk */ |
| 86005 | 32912, |
| 86006 | /* VFNMSUB231PSZmkz */ |
| 86007 | 32917, |
| 86008 | /* VFNMSUB231PSZr */ |
| 86009 | 32922, |
| 86010 | /* VFNMSUB231PSZrb */ |
| 86011 | 32926, |
| 86012 | /* VFNMSUB231PSZrbk */ |
| 86013 | 32931, |
| 86014 | /* VFNMSUB231PSZrbkz */ |
| 86015 | 32937, |
| 86016 | /* VFNMSUB231PSZrk */ |
| 86017 | 32943, |
| 86018 | /* VFNMSUB231PSZrkz */ |
| 86019 | 32948, |
| 86020 | /* VFNMSUB231PSm */ |
| 86021 | 32953, |
| 86022 | /* VFNMSUB231PSr */ |
| 86023 | 32957, |
| 86024 | /* VFNMSUB231SDZm */ |
| 86025 | 32961, |
| 86026 | /* VFNMSUB231SDZm_Int */ |
| 86027 | 32965, |
| 86028 | /* VFNMSUB231SDZm_Intk */ |
| 86029 | 32969, |
| 86030 | /* VFNMSUB231SDZm_Intkz */ |
| 86031 | 32974, |
| 86032 | /* VFNMSUB231SDZr */ |
| 86033 | 32979, |
| 86034 | /* VFNMSUB231SDZr_Int */ |
| 86035 | 32983, |
| 86036 | /* VFNMSUB231SDZr_Intk */ |
| 86037 | 32987, |
| 86038 | /* VFNMSUB231SDZr_Intkz */ |
| 86039 | 32992, |
| 86040 | /* VFNMSUB231SDZrb */ |
| 86041 | 32997, |
| 86042 | /* VFNMSUB231SDZrb_Int */ |
| 86043 | 33002, |
| 86044 | /* VFNMSUB231SDZrb_Intk */ |
| 86045 | 33007, |
| 86046 | /* VFNMSUB231SDZrb_Intkz */ |
| 86047 | 33013, |
| 86048 | /* VFNMSUB231SDm */ |
| 86049 | 33019, |
| 86050 | /* VFNMSUB231SDm_Int */ |
| 86051 | 33023, |
| 86052 | /* VFNMSUB231SDr */ |
| 86053 | 33027, |
| 86054 | /* VFNMSUB231SDr_Int */ |
| 86055 | 33031, |
| 86056 | /* VFNMSUB231SHZm */ |
| 86057 | 33035, |
| 86058 | /* VFNMSUB231SHZm_Int */ |
| 86059 | 33039, |
| 86060 | /* VFNMSUB231SHZm_Intk */ |
| 86061 | 33043, |
| 86062 | /* VFNMSUB231SHZm_Intkz */ |
| 86063 | 33048, |
| 86064 | /* VFNMSUB231SHZr */ |
| 86065 | 33053, |
| 86066 | /* VFNMSUB231SHZr_Int */ |
| 86067 | 33057, |
| 86068 | /* VFNMSUB231SHZr_Intk */ |
| 86069 | 33061, |
| 86070 | /* VFNMSUB231SHZr_Intkz */ |
| 86071 | 33066, |
| 86072 | /* VFNMSUB231SHZrb */ |
| 86073 | 33071, |
| 86074 | /* VFNMSUB231SHZrb_Int */ |
| 86075 | 33076, |
| 86076 | /* VFNMSUB231SHZrb_Intk */ |
| 86077 | 33081, |
| 86078 | /* VFNMSUB231SHZrb_Intkz */ |
| 86079 | 33087, |
| 86080 | /* VFNMSUB231SSZm */ |
| 86081 | 33093, |
| 86082 | /* VFNMSUB231SSZm_Int */ |
| 86083 | 33097, |
| 86084 | /* VFNMSUB231SSZm_Intk */ |
| 86085 | 33101, |
| 86086 | /* VFNMSUB231SSZm_Intkz */ |
| 86087 | 33106, |
| 86088 | /* VFNMSUB231SSZr */ |
| 86089 | 33111, |
| 86090 | /* VFNMSUB231SSZr_Int */ |
| 86091 | 33115, |
| 86092 | /* VFNMSUB231SSZr_Intk */ |
| 86093 | 33119, |
| 86094 | /* VFNMSUB231SSZr_Intkz */ |
| 86095 | 33124, |
| 86096 | /* VFNMSUB231SSZrb */ |
| 86097 | 33129, |
| 86098 | /* VFNMSUB231SSZrb_Int */ |
| 86099 | 33134, |
| 86100 | /* VFNMSUB231SSZrb_Intk */ |
| 86101 | 33139, |
| 86102 | /* VFNMSUB231SSZrb_Intkz */ |
| 86103 | 33145, |
| 86104 | /* VFNMSUB231SSm */ |
| 86105 | 33151, |
| 86106 | /* VFNMSUB231SSm_Int */ |
| 86107 | 33155, |
| 86108 | /* VFNMSUB231SSr */ |
| 86109 | 33159, |
| 86110 | /* VFNMSUB231SSr_Int */ |
| 86111 | 33163, |
| 86112 | /* VFNMSUBPD4Ymr */ |
| 86113 | 33167, |
| 86114 | /* VFNMSUBPD4Yrm */ |
| 86115 | 33171, |
| 86116 | /* VFNMSUBPD4Yrr */ |
| 86117 | 33175, |
| 86118 | /* VFNMSUBPD4Yrr_REV */ |
| 86119 | 33179, |
| 86120 | /* VFNMSUBPD4mr */ |
| 86121 | 33183, |
| 86122 | /* VFNMSUBPD4rm */ |
| 86123 | 33187, |
| 86124 | /* VFNMSUBPD4rr */ |
| 86125 | 33191, |
| 86126 | /* VFNMSUBPD4rr_REV */ |
| 86127 | 33195, |
| 86128 | /* VFNMSUBPS4Ymr */ |
| 86129 | 33199, |
| 86130 | /* VFNMSUBPS4Yrm */ |
| 86131 | 33203, |
| 86132 | /* VFNMSUBPS4Yrr */ |
| 86133 | 33207, |
| 86134 | /* VFNMSUBPS4Yrr_REV */ |
| 86135 | 33211, |
| 86136 | /* VFNMSUBPS4mr */ |
| 86137 | 33215, |
| 86138 | /* VFNMSUBPS4rm */ |
| 86139 | 33219, |
| 86140 | /* VFNMSUBPS4rr */ |
| 86141 | 33223, |
| 86142 | /* VFNMSUBPS4rr_REV */ |
| 86143 | 33227, |
| 86144 | /* VFNMSUBSD4mr */ |
| 86145 | 33231, |
| 86146 | /* VFNMSUBSD4mr_Int */ |
| 86147 | 33235, |
| 86148 | /* VFNMSUBSD4rm */ |
| 86149 | 33239, |
| 86150 | /* VFNMSUBSD4rm_Int */ |
| 86151 | 33243, |
| 86152 | /* VFNMSUBSD4rr */ |
| 86153 | 33247, |
| 86154 | /* VFNMSUBSD4rr_Int */ |
| 86155 | 33251, |
| 86156 | /* VFNMSUBSD4rr_Int_REV */ |
| 86157 | 33255, |
| 86158 | /* VFNMSUBSD4rr_REV */ |
| 86159 | 33259, |
| 86160 | /* VFNMSUBSS4mr */ |
| 86161 | 33263, |
| 86162 | /* VFNMSUBSS4mr_Int */ |
| 86163 | 33267, |
| 86164 | /* VFNMSUBSS4rm */ |
| 86165 | 33271, |
| 86166 | /* VFNMSUBSS4rm_Int */ |
| 86167 | 33275, |
| 86168 | /* VFNMSUBSS4rr */ |
| 86169 | 33279, |
| 86170 | /* VFNMSUBSS4rr_Int */ |
| 86171 | 33283, |
| 86172 | /* VFNMSUBSS4rr_Int_REV */ |
| 86173 | 33287, |
| 86174 | /* VFNMSUBSS4rr_REV */ |
| 86175 | 33291, |
| 86176 | /* VFPCLASSPDZ128rm */ |
| 86177 | 33295, |
| 86178 | /* VFPCLASSPDZ128rmb */ |
| 86179 | 33298, |
| 86180 | /* VFPCLASSPDZ128rmbk */ |
| 86181 | 33301, |
| 86182 | /* VFPCLASSPDZ128rmk */ |
| 86183 | 33305, |
| 86184 | /* VFPCLASSPDZ128rr */ |
| 86185 | 33309, |
| 86186 | /* VFPCLASSPDZ128rrk */ |
| 86187 | 33312, |
| 86188 | /* VFPCLASSPDZ256rm */ |
| 86189 | 33316, |
| 86190 | /* VFPCLASSPDZ256rmb */ |
| 86191 | 33319, |
| 86192 | /* VFPCLASSPDZ256rmbk */ |
| 86193 | 33322, |
| 86194 | /* VFPCLASSPDZ256rmk */ |
| 86195 | 33326, |
| 86196 | /* VFPCLASSPDZ256rr */ |
| 86197 | 33330, |
| 86198 | /* VFPCLASSPDZ256rrk */ |
| 86199 | 33333, |
| 86200 | /* VFPCLASSPDZrm */ |
| 86201 | 33337, |
| 86202 | /* VFPCLASSPDZrmb */ |
| 86203 | 33340, |
| 86204 | /* VFPCLASSPDZrmbk */ |
| 86205 | 33343, |
| 86206 | /* VFPCLASSPDZrmk */ |
| 86207 | 33347, |
| 86208 | /* VFPCLASSPDZrr */ |
| 86209 | 33351, |
| 86210 | /* VFPCLASSPDZrrk */ |
| 86211 | 33354, |
| 86212 | /* VFPCLASSPHZ128rm */ |
| 86213 | 33358, |
| 86214 | /* VFPCLASSPHZ128rmb */ |
| 86215 | 33361, |
| 86216 | /* VFPCLASSPHZ128rmbk */ |
| 86217 | 33364, |
| 86218 | /* VFPCLASSPHZ128rmk */ |
| 86219 | 33368, |
| 86220 | /* VFPCLASSPHZ128rr */ |
| 86221 | 33372, |
| 86222 | /* VFPCLASSPHZ128rrk */ |
| 86223 | 33375, |
| 86224 | /* VFPCLASSPHZ256rm */ |
| 86225 | 33379, |
| 86226 | /* VFPCLASSPHZ256rmb */ |
| 86227 | 33382, |
| 86228 | /* VFPCLASSPHZ256rmbk */ |
| 86229 | 33385, |
| 86230 | /* VFPCLASSPHZ256rmk */ |
| 86231 | 33389, |
| 86232 | /* VFPCLASSPHZ256rr */ |
| 86233 | 33393, |
| 86234 | /* VFPCLASSPHZ256rrk */ |
| 86235 | 33396, |
| 86236 | /* VFPCLASSPHZrm */ |
| 86237 | 33400, |
| 86238 | /* VFPCLASSPHZrmb */ |
| 86239 | 33403, |
| 86240 | /* VFPCLASSPHZrmbk */ |
| 86241 | 33406, |
| 86242 | /* VFPCLASSPHZrmk */ |
| 86243 | 33410, |
| 86244 | /* VFPCLASSPHZrr */ |
| 86245 | 33414, |
| 86246 | /* VFPCLASSPHZrrk */ |
| 86247 | 33417, |
| 86248 | /* VFPCLASSPSZ128rm */ |
| 86249 | 33421, |
| 86250 | /* VFPCLASSPSZ128rmb */ |
| 86251 | 33424, |
| 86252 | /* VFPCLASSPSZ128rmbk */ |
| 86253 | 33427, |
| 86254 | /* VFPCLASSPSZ128rmk */ |
| 86255 | 33431, |
| 86256 | /* VFPCLASSPSZ128rr */ |
| 86257 | 33435, |
| 86258 | /* VFPCLASSPSZ128rrk */ |
| 86259 | 33438, |
| 86260 | /* VFPCLASSPSZ256rm */ |
| 86261 | 33442, |
| 86262 | /* VFPCLASSPSZ256rmb */ |
| 86263 | 33445, |
| 86264 | /* VFPCLASSPSZ256rmbk */ |
| 86265 | 33448, |
| 86266 | /* VFPCLASSPSZ256rmk */ |
| 86267 | 33452, |
| 86268 | /* VFPCLASSPSZ256rr */ |
| 86269 | 33456, |
| 86270 | /* VFPCLASSPSZ256rrk */ |
| 86271 | 33459, |
| 86272 | /* VFPCLASSPSZrm */ |
| 86273 | 33463, |
| 86274 | /* VFPCLASSPSZrmb */ |
| 86275 | 33466, |
| 86276 | /* VFPCLASSPSZrmbk */ |
| 86277 | 33469, |
| 86278 | /* VFPCLASSPSZrmk */ |
| 86279 | 33473, |
| 86280 | /* VFPCLASSPSZrr */ |
| 86281 | 33477, |
| 86282 | /* VFPCLASSPSZrrk */ |
| 86283 | 33480, |
| 86284 | /* VFPCLASSSDZrm */ |
| 86285 | 33484, |
| 86286 | /* VFPCLASSSDZrmk */ |
| 86287 | 33487, |
| 86288 | /* VFPCLASSSDZrr */ |
| 86289 | 33491, |
| 86290 | /* VFPCLASSSDZrrk */ |
| 86291 | 33494, |
| 86292 | /* VFPCLASSSHZrm */ |
| 86293 | 33498, |
| 86294 | /* VFPCLASSSHZrmk */ |
| 86295 | 33501, |
| 86296 | /* VFPCLASSSHZrr */ |
| 86297 | 33505, |
| 86298 | /* VFPCLASSSHZrrk */ |
| 86299 | 33508, |
| 86300 | /* VFPCLASSSSZrm */ |
| 86301 | 33512, |
| 86302 | /* VFPCLASSSSZrmk */ |
| 86303 | 33515, |
| 86304 | /* VFPCLASSSSZrr */ |
| 86305 | 33519, |
| 86306 | /* VFPCLASSSSZrrk */ |
| 86307 | 33522, |
| 86308 | /* VFRCZPDYrm */ |
| 86309 | 33526, |
| 86310 | /* VFRCZPDYrr */ |
| 86311 | 33528, |
| 86312 | /* VFRCZPDrm */ |
| 86313 | 33530, |
| 86314 | /* VFRCZPDrr */ |
| 86315 | 33532, |
| 86316 | /* VFRCZPSYrm */ |
| 86317 | 33534, |
| 86318 | /* VFRCZPSYrr */ |
| 86319 | 33536, |
| 86320 | /* VFRCZPSrm */ |
| 86321 | 33538, |
| 86322 | /* VFRCZPSrr */ |
| 86323 | 33540, |
| 86324 | /* VFRCZSDrm */ |
| 86325 | 33542, |
| 86326 | /* VFRCZSDrr */ |
| 86327 | 33544, |
| 86328 | /* VFRCZSSrm */ |
| 86329 | 33546, |
| 86330 | /* VFRCZSSrr */ |
| 86331 | 33548, |
| 86332 | /* VGATHERDPDYrm */ |
| 86333 | 33550, |
| 86334 | /* VGATHERDPDZ128rm */ |
| 86335 | 33555, |
| 86336 | /* VGATHERDPDZ256rm */ |
| 86337 | 33560, |
| 86338 | /* VGATHERDPDZrm */ |
| 86339 | 33565, |
| 86340 | /* VGATHERDPDrm */ |
| 86341 | 33570, |
| 86342 | /* VGATHERDPSYrm */ |
| 86343 | 33575, |
| 86344 | /* VGATHERDPSZ128rm */ |
| 86345 | 33580, |
| 86346 | /* VGATHERDPSZ256rm */ |
| 86347 | 33585, |
| 86348 | /* VGATHERDPSZrm */ |
| 86349 | 33590, |
| 86350 | /* VGATHERDPSrm */ |
| 86351 | 33595, |
| 86352 | /* VGATHERPF0DPDm */ |
| 86353 | 33600, |
| 86354 | /* VGATHERPF0DPSm */ |
| 86355 | 33602, |
| 86356 | /* VGATHERPF0QPDm */ |
| 86357 | 33604, |
| 86358 | /* VGATHERPF0QPSm */ |
| 86359 | 33606, |
| 86360 | /* VGATHERPF1DPDm */ |
| 86361 | 33608, |
| 86362 | /* VGATHERPF1DPSm */ |
| 86363 | 33610, |
| 86364 | /* VGATHERPF1QPDm */ |
| 86365 | 33612, |
| 86366 | /* VGATHERPF1QPSm */ |
| 86367 | 33614, |
| 86368 | /* VGATHERQPDYrm */ |
| 86369 | 33616, |
| 86370 | /* VGATHERQPDZ128rm */ |
| 86371 | 33621, |
| 86372 | /* VGATHERQPDZ256rm */ |
| 86373 | 33626, |
| 86374 | /* VGATHERQPDZrm */ |
| 86375 | 33631, |
| 86376 | /* VGATHERQPDrm */ |
| 86377 | 33636, |
| 86378 | /* VGATHERQPSYrm */ |
| 86379 | 33641, |
| 86380 | /* VGATHERQPSZ128rm */ |
| 86381 | 33646, |
| 86382 | /* VGATHERQPSZ256rm */ |
| 86383 | 33651, |
| 86384 | /* VGATHERQPSZrm */ |
| 86385 | 33656, |
| 86386 | /* VGATHERQPSrm */ |
| 86387 | 33661, |
| 86388 | /* VGETEXPPDZ128m */ |
| 86389 | 33666, |
| 86390 | /* VGETEXPPDZ128mb */ |
| 86391 | 33668, |
| 86392 | /* VGETEXPPDZ128mbk */ |
| 86393 | 33670, |
| 86394 | /* VGETEXPPDZ128mbkz */ |
| 86395 | 33674, |
| 86396 | /* VGETEXPPDZ128mk */ |
| 86397 | 33677, |
| 86398 | /* VGETEXPPDZ128mkz */ |
| 86399 | 33681, |
| 86400 | /* VGETEXPPDZ128r */ |
| 86401 | 33684, |
| 86402 | /* VGETEXPPDZ128rk */ |
| 86403 | 33686, |
| 86404 | /* VGETEXPPDZ128rkz */ |
| 86405 | 33690, |
| 86406 | /* VGETEXPPDZ256m */ |
| 86407 | 33693, |
| 86408 | /* VGETEXPPDZ256mb */ |
| 86409 | 33695, |
| 86410 | /* VGETEXPPDZ256mbk */ |
| 86411 | 33697, |
| 86412 | /* VGETEXPPDZ256mbkz */ |
| 86413 | 33701, |
| 86414 | /* VGETEXPPDZ256mk */ |
| 86415 | 33704, |
| 86416 | /* VGETEXPPDZ256mkz */ |
| 86417 | 33708, |
| 86418 | /* VGETEXPPDZ256r */ |
| 86419 | 33711, |
| 86420 | /* VGETEXPPDZ256rk */ |
| 86421 | 33713, |
| 86422 | /* VGETEXPPDZ256rkz */ |
| 86423 | 33717, |
| 86424 | /* VGETEXPPDZm */ |
| 86425 | 33720, |
| 86426 | /* VGETEXPPDZmb */ |
| 86427 | 33722, |
| 86428 | /* VGETEXPPDZmbk */ |
| 86429 | 33724, |
| 86430 | /* VGETEXPPDZmbkz */ |
| 86431 | 33728, |
| 86432 | /* VGETEXPPDZmk */ |
| 86433 | 33731, |
| 86434 | /* VGETEXPPDZmkz */ |
| 86435 | 33735, |
| 86436 | /* VGETEXPPDZr */ |
| 86437 | 33738, |
| 86438 | /* VGETEXPPDZrb */ |
| 86439 | 33740, |
| 86440 | /* VGETEXPPDZrbk */ |
| 86441 | 33742, |
| 86442 | /* VGETEXPPDZrbkz */ |
| 86443 | 33746, |
| 86444 | /* VGETEXPPDZrk */ |
| 86445 | 33749, |
| 86446 | /* VGETEXPPDZrkz */ |
| 86447 | 33753, |
| 86448 | /* VGETEXPPHZ128m */ |
| 86449 | 33756, |
| 86450 | /* VGETEXPPHZ128mb */ |
| 86451 | 33758, |
| 86452 | /* VGETEXPPHZ128mbk */ |
| 86453 | 33760, |
| 86454 | /* VGETEXPPHZ128mbkz */ |
| 86455 | 33764, |
| 86456 | /* VGETEXPPHZ128mk */ |
| 86457 | 33767, |
| 86458 | /* VGETEXPPHZ128mkz */ |
| 86459 | 33771, |
| 86460 | /* VGETEXPPHZ128r */ |
| 86461 | 33774, |
| 86462 | /* VGETEXPPHZ128rk */ |
| 86463 | 33776, |
| 86464 | /* VGETEXPPHZ128rkz */ |
| 86465 | 33780, |
| 86466 | /* VGETEXPPHZ256m */ |
| 86467 | 33783, |
| 86468 | /* VGETEXPPHZ256mb */ |
| 86469 | 33785, |
| 86470 | /* VGETEXPPHZ256mbk */ |
| 86471 | 33787, |
| 86472 | /* VGETEXPPHZ256mbkz */ |
| 86473 | 33791, |
| 86474 | /* VGETEXPPHZ256mk */ |
| 86475 | 33794, |
| 86476 | /* VGETEXPPHZ256mkz */ |
| 86477 | 33798, |
| 86478 | /* VGETEXPPHZ256r */ |
| 86479 | 33801, |
| 86480 | /* VGETEXPPHZ256rk */ |
| 86481 | 33803, |
| 86482 | /* VGETEXPPHZ256rkz */ |
| 86483 | 33807, |
| 86484 | /* VGETEXPPHZm */ |
| 86485 | 33810, |
| 86486 | /* VGETEXPPHZmb */ |
| 86487 | 33812, |
| 86488 | /* VGETEXPPHZmbk */ |
| 86489 | 33814, |
| 86490 | /* VGETEXPPHZmbkz */ |
| 86491 | 33818, |
| 86492 | /* VGETEXPPHZmk */ |
| 86493 | 33821, |
| 86494 | /* VGETEXPPHZmkz */ |
| 86495 | 33825, |
| 86496 | /* VGETEXPPHZr */ |
| 86497 | 33828, |
| 86498 | /* VGETEXPPHZrb */ |
| 86499 | 33830, |
| 86500 | /* VGETEXPPHZrbk */ |
| 86501 | 33832, |
| 86502 | /* VGETEXPPHZrbkz */ |
| 86503 | 33836, |
| 86504 | /* VGETEXPPHZrk */ |
| 86505 | 33839, |
| 86506 | /* VGETEXPPHZrkz */ |
| 86507 | 33843, |
| 86508 | /* VGETEXPPSZ128m */ |
| 86509 | 33846, |
| 86510 | /* VGETEXPPSZ128mb */ |
| 86511 | 33848, |
| 86512 | /* VGETEXPPSZ128mbk */ |
| 86513 | 33850, |
| 86514 | /* VGETEXPPSZ128mbkz */ |
| 86515 | 33854, |
| 86516 | /* VGETEXPPSZ128mk */ |
| 86517 | 33857, |
| 86518 | /* VGETEXPPSZ128mkz */ |
| 86519 | 33861, |
| 86520 | /* VGETEXPPSZ128r */ |
| 86521 | 33864, |
| 86522 | /* VGETEXPPSZ128rk */ |
| 86523 | 33866, |
| 86524 | /* VGETEXPPSZ128rkz */ |
| 86525 | 33870, |
| 86526 | /* VGETEXPPSZ256m */ |
| 86527 | 33873, |
| 86528 | /* VGETEXPPSZ256mb */ |
| 86529 | 33875, |
| 86530 | /* VGETEXPPSZ256mbk */ |
| 86531 | 33877, |
| 86532 | /* VGETEXPPSZ256mbkz */ |
| 86533 | 33881, |
| 86534 | /* VGETEXPPSZ256mk */ |
| 86535 | 33884, |
| 86536 | /* VGETEXPPSZ256mkz */ |
| 86537 | 33888, |
| 86538 | /* VGETEXPPSZ256r */ |
| 86539 | 33891, |
| 86540 | /* VGETEXPPSZ256rk */ |
| 86541 | 33893, |
| 86542 | /* VGETEXPPSZ256rkz */ |
| 86543 | 33897, |
| 86544 | /* VGETEXPPSZm */ |
| 86545 | 33900, |
| 86546 | /* VGETEXPPSZmb */ |
| 86547 | 33902, |
| 86548 | /* VGETEXPPSZmbk */ |
| 86549 | 33904, |
| 86550 | /* VGETEXPPSZmbkz */ |
| 86551 | 33908, |
| 86552 | /* VGETEXPPSZmk */ |
| 86553 | 33911, |
| 86554 | /* VGETEXPPSZmkz */ |
| 86555 | 33915, |
| 86556 | /* VGETEXPPSZr */ |
| 86557 | 33918, |
| 86558 | /* VGETEXPPSZrb */ |
| 86559 | 33920, |
| 86560 | /* VGETEXPPSZrbk */ |
| 86561 | 33922, |
| 86562 | /* VGETEXPPSZrbkz */ |
| 86563 | 33926, |
| 86564 | /* VGETEXPPSZrk */ |
| 86565 | 33929, |
| 86566 | /* VGETEXPPSZrkz */ |
| 86567 | 33933, |
| 86568 | /* VGETEXPSDZm */ |
| 86569 | 33936, |
| 86570 | /* VGETEXPSDZmk */ |
| 86571 | 33939, |
| 86572 | /* VGETEXPSDZmkz */ |
| 86573 | 33944, |
| 86574 | /* VGETEXPSDZr */ |
| 86575 | 33948, |
| 86576 | /* VGETEXPSDZrb */ |
| 86577 | 33951, |
| 86578 | /* VGETEXPSDZrbk */ |
| 86579 | 33954, |
| 86580 | /* VGETEXPSDZrbkz */ |
| 86581 | 33959, |
| 86582 | /* VGETEXPSDZrk */ |
| 86583 | 33963, |
| 86584 | /* VGETEXPSDZrkz */ |
| 86585 | 33968, |
| 86586 | /* VGETEXPSHZm */ |
| 86587 | 33972, |
| 86588 | /* VGETEXPSHZmk */ |
| 86589 | 33975, |
| 86590 | /* VGETEXPSHZmkz */ |
| 86591 | 33980, |
| 86592 | /* VGETEXPSHZr */ |
| 86593 | 33984, |
| 86594 | /* VGETEXPSHZrb */ |
| 86595 | 33987, |
| 86596 | /* VGETEXPSHZrbk */ |
| 86597 | 33990, |
| 86598 | /* VGETEXPSHZrbkz */ |
| 86599 | 33995, |
| 86600 | /* VGETEXPSHZrk */ |
| 86601 | 33999, |
| 86602 | /* VGETEXPSHZrkz */ |
| 86603 | 34004, |
| 86604 | /* VGETEXPSSZm */ |
| 86605 | 34008, |
| 86606 | /* VGETEXPSSZmk */ |
| 86607 | 34011, |
| 86608 | /* VGETEXPSSZmkz */ |
| 86609 | 34016, |
| 86610 | /* VGETEXPSSZr */ |
| 86611 | 34020, |
| 86612 | /* VGETEXPSSZrb */ |
| 86613 | 34023, |
| 86614 | /* VGETEXPSSZrbk */ |
| 86615 | 34026, |
| 86616 | /* VGETEXPSSZrbkz */ |
| 86617 | 34031, |
| 86618 | /* VGETEXPSSZrk */ |
| 86619 | 34035, |
| 86620 | /* VGETEXPSSZrkz */ |
| 86621 | 34040, |
| 86622 | /* VGETMANTPDZ128rmbi */ |
| 86623 | 34044, |
| 86624 | /* VGETMANTPDZ128rmbik */ |
| 86625 | 34047, |
| 86626 | /* VGETMANTPDZ128rmbikz */ |
| 86627 | 34052, |
| 86628 | /* VGETMANTPDZ128rmi */ |
| 86629 | 34056, |
| 86630 | /* VGETMANTPDZ128rmik */ |
| 86631 | 34059, |
| 86632 | /* VGETMANTPDZ128rmikz */ |
| 86633 | 34064, |
| 86634 | /* VGETMANTPDZ128rri */ |
| 86635 | 34068, |
| 86636 | /* VGETMANTPDZ128rrik */ |
| 86637 | 34071, |
| 86638 | /* VGETMANTPDZ128rrikz */ |
| 86639 | 34076, |
| 86640 | /* VGETMANTPDZ256rmbi */ |
| 86641 | 34080, |
| 86642 | /* VGETMANTPDZ256rmbik */ |
| 86643 | 34083, |
| 86644 | /* VGETMANTPDZ256rmbikz */ |
| 86645 | 34088, |
| 86646 | /* VGETMANTPDZ256rmi */ |
| 86647 | 34092, |
| 86648 | /* VGETMANTPDZ256rmik */ |
| 86649 | 34095, |
| 86650 | /* VGETMANTPDZ256rmikz */ |
| 86651 | 34100, |
| 86652 | /* VGETMANTPDZ256rri */ |
| 86653 | 34104, |
| 86654 | /* VGETMANTPDZ256rrik */ |
| 86655 | 34107, |
| 86656 | /* VGETMANTPDZ256rrikz */ |
| 86657 | 34112, |
| 86658 | /* VGETMANTPDZrmbi */ |
| 86659 | 34116, |
| 86660 | /* VGETMANTPDZrmbik */ |
| 86661 | 34119, |
| 86662 | /* VGETMANTPDZrmbikz */ |
| 86663 | 34124, |
| 86664 | /* VGETMANTPDZrmi */ |
| 86665 | 34128, |
| 86666 | /* VGETMANTPDZrmik */ |
| 86667 | 34131, |
| 86668 | /* VGETMANTPDZrmikz */ |
| 86669 | 34136, |
| 86670 | /* VGETMANTPDZrri */ |
| 86671 | 34140, |
| 86672 | /* VGETMANTPDZrrib */ |
| 86673 | 34143, |
| 86674 | /* VGETMANTPDZrribk */ |
| 86675 | 34146, |
| 86676 | /* VGETMANTPDZrribkz */ |
| 86677 | 34151, |
| 86678 | /* VGETMANTPDZrrik */ |
| 86679 | 34155, |
| 86680 | /* VGETMANTPDZrrikz */ |
| 86681 | 34160, |
| 86682 | /* VGETMANTPHZ128rmbi */ |
| 86683 | 34164, |
| 86684 | /* VGETMANTPHZ128rmbik */ |
| 86685 | 34167, |
| 86686 | /* VGETMANTPHZ128rmbikz */ |
| 86687 | 34172, |
| 86688 | /* VGETMANTPHZ128rmi */ |
| 86689 | 34176, |
| 86690 | /* VGETMANTPHZ128rmik */ |
| 86691 | 34179, |
| 86692 | /* VGETMANTPHZ128rmikz */ |
| 86693 | 34184, |
| 86694 | /* VGETMANTPHZ128rri */ |
| 86695 | 34188, |
| 86696 | /* VGETMANTPHZ128rrik */ |
| 86697 | 34191, |
| 86698 | /* VGETMANTPHZ128rrikz */ |
| 86699 | 34196, |
| 86700 | /* VGETMANTPHZ256rmbi */ |
| 86701 | 34200, |
| 86702 | /* VGETMANTPHZ256rmbik */ |
| 86703 | 34203, |
| 86704 | /* VGETMANTPHZ256rmbikz */ |
| 86705 | 34208, |
| 86706 | /* VGETMANTPHZ256rmi */ |
| 86707 | 34212, |
| 86708 | /* VGETMANTPHZ256rmik */ |
| 86709 | 34215, |
| 86710 | /* VGETMANTPHZ256rmikz */ |
| 86711 | 34220, |
| 86712 | /* VGETMANTPHZ256rri */ |
| 86713 | 34224, |
| 86714 | /* VGETMANTPHZ256rrik */ |
| 86715 | 34227, |
| 86716 | /* VGETMANTPHZ256rrikz */ |
| 86717 | 34232, |
| 86718 | /* VGETMANTPHZrmbi */ |
| 86719 | 34236, |
| 86720 | /* VGETMANTPHZrmbik */ |
| 86721 | 34239, |
| 86722 | /* VGETMANTPHZrmbikz */ |
| 86723 | 34244, |
| 86724 | /* VGETMANTPHZrmi */ |
| 86725 | 34248, |
| 86726 | /* VGETMANTPHZrmik */ |
| 86727 | 34251, |
| 86728 | /* VGETMANTPHZrmikz */ |
| 86729 | 34256, |
| 86730 | /* VGETMANTPHZrri */ |
| 86731 | 34260, |
| 86732 | /* VGETMANTPHZrrib */ |
| 86733 | 34263, |
| 86734 | /* VGETMANTPHZrribk */ |
| 86735 | 34266, |
| 86736 | /* VGETMANTPHZrribkz */ |
| 86737 | 34271, |
| 86738 | /* VGETMANTPHZrrik */ |
| 86739 | 34275, |
| 86740 | /* VGETMANTPHZrrikz */ |
| 86741 | 34280, |
| 86742 | /* VGETMANTPSZ128rmbi */ |
| 86743 | 34284, |
| 86744 | /* VGETMANTPSZ128rmbik */ |
| 86745 | 34287, |
| 86746 | /* VGETMANTPSZ128rmbikz */ |
| 86747 | 34292, |
| 86748 | /* VGETMANTPSZ128rmi */ |
| 86749 | 34296, |
| 86750 | /* VGETMANTPSZ128rmik */ |
| 86751 | 34299, |
| 86752 | /* VGETMANTPSZ128rmikz */ |
| 86753 | 34304, |
| 86754 | /* VGETMANTPSZ128rri */ |
| 86755 | 34308, |
| 86756 | /* VGETMANTPSZ128rrik */ |
| 86757 | 34311, |
| 86758 | /* VGETMANTPSZ128rrikz */ |
| 86759 | 34316, |
| 86760 | /* VGETMANTPSZ256rmbi */ |
| 86761 | 34320, |
| 86762 | /* VGETMANTPSZ256rmbik */ |
| 86763 | 34323, |
| 86764 | /* VGETMANTPSZ256rmbikz */ |
| 86765 | 34328, |
| 86766 | /* VGETMANTPSZ256rmi */ |
| 86767 | 34332, |
| 86768 | /* VGETMANTPSZ256rmik */ |
| 86769 | 34335, |
| 86770 | /* VGETMANTPSZ256rmikz */ |
| 86771 | 34340, |
| 86772 | /* VGETMANTPSZ256rri */ |
| 86773 | 34344, |
| 86774 | /* VGETMANTPSZ256rrik */ |
| 86775 | 34347, |
| 86776 | /* VGETMANTPSZ256rrikz */ |
| 86777 | 34352, |
| 86778 | /* VGETMANTPSZrmbi */ |
| 86779 | 34356, |
| 86780 | /* VGETMANTPSZrmbik */ |
| 86781 | 34359, |
| 86782 | /* VGETMANTPSZrmbikz */ |
| 86783 | 34364, |
| 86784 | /* VGETMANTPSZrmi */ |
| 86785 | 34368, |
| 86786 | /* VGETMANTPSZrmik */ |
| 86787 | 34371, |
| 86788 | /* VGETMANTPSZrmikz */ |
| 86789 | 34376, |
| 86790 | /* VGETMANTPSZrri */ |
| 86791 | 34380, |
| 86792 | /* VGETMANTPSZrrib */ |
| 86793 | 34383, |
| 86794 | /* VGETMANTPSZrribk */ |
| 86795 | 34386, |
| 86796 | /* VGETMANTPSZrribkz */ |
| 86797 | 34391, |
| 86798 | /* VGETMANTPSZrrik */ |
| 86799 | 34395, |
| 86800 | /* VGETMANTPSZrrikz */ |
| 86801 | 34400, |
| 86802 | /* VGETMANTSDZrmi */ |
| 86803 | 34404, |
| 86804 | /* VGETMANTSDZrmik */ |
| 86805 | 34408, |
| 86806 | /* VGETMANTSDZrmikz */ |
| 86807 | 34414, |
| 86808 | /* VGETMANTSDZrri */ |
| 86809 | 34419, |
| 86810 | /* VGETMANTSDZrrib */ |
| 86811 | 34423, |
| 86812 | /* VGETMANTSDZrribk */ |
| 86813 | 34427, |
| 86814 | /* VGETMANTSDZrribkz */ |
| 86815 | 34433, |
| 86816 | /* VGETMANTSDZrrik */ |
| 86817 | 34438, |
| 86818 | /* VGETMANTSDZrrikz */ |
| 86819 | 34444, |
| 86820 | /* VGETMANTSHZrmi */ |
| 86821 | 34449, |
| 86822 | /* VGETMANTSHZrmik */ |
| 86823 | 34453, |
| 86824 | /* VGETMANTSHZrmikz */ |
| 86825 | 34459, |
| 86826 | /* VGETMANTSHZrri */ |
| 86827 | 34464, |
| 86828 | /* VGETMANTSHZrrib */ |
| 86829 | 34468, |
| 86830 | /* VGETMANTSHZrribk */ |
| 86831 | 34472, |
| 86832 | /* VGETMANTSHZrribkz */ |
| 86833 | 34478, |
| 86834 | /* VGETMANTSHZrrik */ |
| 86835 | 34483, |
| 86836 | /* VGETMANTSHZrrikz */ |
| 86837 | 34489, |
| 86838 | /* VGETMANTSSZrmi */ |
| 86839 | 34494, |
| 86840 | /* VGETMANTSSZrmik */ |
| 86841 | 34498, |
| 86842 | /* VGETMANTSSZrmikz */ |
| 86843 | 34504, |
| 86844 | /* VGETMANTSSZrri */ |
| 86845 | 34509, |
| 86846 | /* VGETMANTSSZrrib */ |
| 86847 | 34513, |
| 86848 | /* VGETMANTSSZrribk */ |
| 86849 | 34517, |
| 86850 | /* VGETMANTSSZrribkz */ |
| 86851 | 34523, |
| 86852 | /* VGETMANTSSZrrik */ |
| 86853 | 34528, |
| 86854 | /* VGETMANTSSZrrikz */ |
| 86855 | 34534, |
| 86856 | /* VGF2P8AFFINEINVQBYrmi */ |
| 86857 | 34539, |
| 86858 | /* VGF2P8AFFINEINVQBYrri */ |
| 86859 | 34543, |
| 86860 | /* VGF2P8AFFINEINVQBZ128rmbi */ |
| 86861 | 34547, |
| 86862 | /* VGF2P8AFFINEINVQBZ128rmbik */ |
| 86863 | 34551, |
| 86864 | /* VGF2P8AFFINEINVQBZ128rmbikz */ |
| 86865 | 34557, |
| 86866 | /* VGF2P8AFFINEINVQBZ128rmi */ |
| 86867 | 34562, |
| 86868 | /* VGF2P8AFFINEINVQBZ128rmik */ |
| 86869 | 34566, |
| 86870 | /* VGF2P8AFFINEINVQBZ128rmikz */ |
| 86871 | 34572, |
| 86872 | /* VGF2P8AFFINEINVQBZ128rri */ |
| 86873 | 34577, |
| 86874 | /* VGF2P8AFFINEINVQBZ128rrik */ |
| 86875 | 34581, |
| 86876 | /* VGF2P8AFFINEINVQBZ128rrikz */ |
| 86877 | 34587, |
| 86878 | /* VGF2P8AFFINEINVQBZ256rmbi */ |
| 86879 | 34592, |
| 86880 | /* VGF2P8AFFINEINVQBZ256rmbik */ |
| 86881 | 34596, |
| 86882 | /* VGF2P8AFFINEINVQBZ256rmbikz */ |
| 86883 | 34602, |
| 86884 | /* VGF2P8AFFINEINVQBZ256rmi */ |
| 86885 | 34607, |
| 86886 | /* VGF2P8AFFINEINVQBZ256rmik */ |
| 86887 | 34611, |
| 86888 | /* VGF2P8AFFINEINVQBZ256rmikz */ |
| 86889 | 34617, |
| 86890 | /* VGF2P8AFFINEINVQBZ256rri */ |
| 86891 | 34622, |
| 86892 | /* VGF2P8AFFINEINVQBZ256rrik */ |
| 86893 | 34626, |
| 86894 | /* VGF2P8AFFINEINVQBZ256rrikz */ |
| 86895 | 34632, |
| 86896 | /* VGF2P8AFFINEINVQBZrmbi */ |
| 86897 | 34637, |
| 86898 | /* VGF2P8AFFINEINVQBZrmbik */ |
| 86899 | 34641, |
| 86900 | /* VGF2P8AFFINEINVQBZrmbikz */ |
| 86901 | 34647, |
| 86902 | /* VGF2P8AFFINEINVQBZrmi */ |
| 86903 | 34652, |
| 86904 | /* VGF2P8AFFINEINVQBZrmik */ |
| 86905 | 34656, |
| 86906 | /* VGF2P8AFFINEINVQBZrmikz */ |
| 86907 | 34662, |
| 86908 | /* VGF2P8AFFINEINVQBZrri */ |
| 86909 | 34667, |
| 86910 | /* VGF2P8AFFINEINVQBZrrik */ |
| 86911 | 34671, |
| 86912 | /* VGF2P8AFFINEINVQBZrrikz */ |
| 86913 | 34677, |
| 86914 | /* VGF2P8AFFINEINVQBrmi */ |
| 86915 | 34682, |
| 86916 | /* VGF2P8AFFINEINVQBrri */ |
| 86917 | 34686, |
| 86918 | /* VGF2P8AFFINEQBYrmi */ |
| 86919 | 34690, |
| 86920 | /* VGF2P8AFFINEQBYrri */ |
| 86921 | 34694, |
| 86922 | /* VGF2P8AFFINEQBZ128rmbi */ |
| 86923 | 34698, |
| 86924 | /* VGF2P8AFFINEQBZ128rmbik */ |
| 86925 | 34702, |
| 86926 | /* VGF2P8AFFINEQBZ128rmbikz */ |
| 86927 | 34708, |
| 86928 | /* VGF2P8AFFINEQBZ128rmi */ |
| 86929 | 34713, |
| 86930 | /* VGF2P8AFFINEQBZ128rmik */ |
| 86931 | 34717, |
| 86932 | /* VGF2P8AFFINEQBZ128rmikz */ |
| 86933 | 34723, |
| 86934 | /* VGF2P8AFFINEQBZ128rri */ |
| 86935 | 34728, |
| 86936 | /* VGF2P8AFFINEQBZ128rrik */ |
| 86937 | 34732, |
| 86938 | /* VGF2P8AFFINEQBZ128rrikz */ |
| 86939 | 34738, |
| 86940 | /* VGF2P8AFFINEQBZ256rmbi */ |
| 86941 | 34743, |
| 86942 | /* VGF2P8AFFINEQBZ256rmbik */ |
| 86943 | 34747, |
| 86944 | /* VGF2P8AFFINEQBZ256rmbikz */ |
| 86945 | 34753, |
| 86946 | /* VGF2P8AFFINEQBZ256rmi */ |
| 86947 | 34758, |
| 86948 | /* VGF2P8AFFINEQBZ256rmik */ |
| 86949 | 34762, |
| 86950 | /* VGF2P8AFFINEQBZ256rmikz */ |
| 86951 | 34768, |
| 86952 | /* VGF2P8AFFINEQBZ256rri */ |
| 86953 | 34773, |
| 86954 | /* VGF2P8AFFINEQBZ256rrik */ |
| 86955 | 34777, |
| 86956 | /* VGF2P8AFFINEQBZ256rrikz */ |
| 86957 | 34783, |
| 86958 | /* VGF2P8AFFINEQBZrmbi */ |
| 86959 | 34788, |
| 86960 | /* VGF2P8AFFINEQBZrmbik */ |
| 86961 | 34792, |
| 86962 | /* VGF2P8AFFINEQBZrmbikz */ |
| 86963 | 34798, |
| 86964 | /* VGF2P8AFFINEQBZrmi */ |
| 86965 | 34803, |
| 86966 | /* VGF2P8AFFINEQBZrmik */ |
| 86967 | 34807, |
| 86968 | /* VGF2P8AFFINEQBZrmikz */ |
| 86969 | 34813, |
| 86970 | /* VGF2P8AFFINEQBZrri */ |
| 86971 | 34818, |
| 86972 | /* VGF2P8AFFINEQBZrrik */ |
| 86973 | 34822, |
| 86974 | /* VGF2P8AFFINEQBZrrikz */ |
| 86975 | 34828, |
| 86976 | /* VGF2P8AFFINEQBrmi */ |
| 86977 | 34833, |
| 86978 | /* VGF2P8AFFINEQBrri */ |
| 86979 | 34837, |
| 86980 | /* VGF2P8MULBYrm */ |
| 86981 | 34841, |
| 86982 | /* VGF2P8MULBYrr */ |
| 86983 | 34844, |
| 86984 | /* VGF2P8MULBZ128rm */ |
| 86985 | 34847, |
| 86986 | /* VGF2P8MULBZ128rmk */ |
| 86987 | 34850, |
| 86988 | /* VGF2P8MULBZ128rmkz */ |
| 86989 | 34855, |
| 86990 | /* VGF2P8MULBZ128rr */ |
| 86991 | 34859, |
| 86992 | /* VGF2P8MULBZ128rrk */ |
| 86993 | 34862, |
| 86994 | /* VGF2P8MULBZ128rrkz */ |
| 86995 | 34867, |
| 86996 | /* VGF2P8MULBZ256rm */ |
| 86997 | 34871, |
| 86998 | /* VGF2P8MULBZ256rmk */ |
| 86999 | 34874, |
| 87000 | /* VGF2P8MULBZ256rmkz */ |
| 87001 | 34879, |
| 87002 | /* VGF2P8MULBZ256rr */ |
| 87003 | 34883, |
| 87004 | /* VGF2P8MULBZ256rrk */ |
| 87005 | 34886, |
| 87006 | /* VGF2P8MULBZ256rrkz */ |
| 87007 | 34891, |
| 87008 | /* VGF2P8MULBZrm */ |
| 87009 | 34895, |
| 87010 | /* VGF2P8MULBZrmk */ |
| 87011 | 34898, |
| 87012 | /* VGF2P8MULBZrmkz */ |
| 87013 | 34903, |
| 87014 | /* VGF2P8MULBZrr */ |
| 87015 | 34907, |
| 87016 | /* VGF2P8MULBZrrk */ |
| 87017 | 34910, |
| 87018 | /* VGF2P8MULBZrrkz */ |
| 87019 | 34915, |
| 87020 | /* VGF2P8MULBrm */ |
| 87021 | 34919, |
| 87022 | /* VGF2P8MULBrr */ |
| 87023 | 34922, |
| 87024 | /* VHADDPDYrm */ |
| 87025 | 34925, |
| 87026 | /* VHADDPDYrr */ |
| 87027 | 34928, |
| 87028 | /* VHADDPDrm */ |
| 87029 | 34931, |
| 87030 | /* VHADDPDrr */ |
| 87031 | 34934, |
| 87032 | /* VHADDPSYrm */ |
| 87033 | 34937, |
| 87034 | /* VHADDPSYrr */ |
| 87035 | 34940, |
| 87036 | /* VHADDPSrm */ |
| 87037 | 34943, |
| 87038 | /* VHADDPSrr */ |
| 87039 | 34946, |
| 87040 | /* VHSUBPDYrm */ |
| 87041 | 34949, |
| 87042 | /* VHSUBPDYrr */ |
| 87043 | 34952, |
| 87044 | /* VHSUBPDrm */ |
| 87045 | 34955, |
| 87046 | /* VHSUBPDrr */ |
| 87047 | 34958, |
| 87048 | /* VHSUBPSYrm */ |
| 87049 | 34961, |
| 87050 | /* VHSUBPSYrr */ |
| 87051 | 34964, |
| 87052 | /* VHSUBPSrm */ |
| 87053 | 34967, |
| 87054 | /* VHSUBPSrr */ |
| 87055 | 34970, |
| 87056 | /* VINSERTF128rm */ |
| 87057 | 34973, |
| 87058 | /* VINSERTF128rr */ |
| 87059 | 34977, |
| 87060 | /* VINSERTF32x4Z256rm */ |
| 87061 | 34981, |
| 87062 | /* VINSERTF32x4Z256rmk */ |
| 87063 | 34985, |
| 87064 | /* VINSERTF32x4Z256rmkz */ |
| 87065 | 34991, |
| 87066 | /* VINSERTF32x4Z256rr */ |
| 87067 | 34996, |
| 87068 | /* VINSERTF32x4Z256rrk */ |
| 87069 | 35000, |
| 87070 | /* VINSERTF32x4Z256rrkz */ |
| 87071 | 35006, |
| 87072 | /* VINSERTF32x4Zrm */ |
| 87073 | 35011, |
| 87074 | /* VINSERTF32x4Zrmk */ |
| 87075 | 35015, |
| 87076 | /* VINSERTF32x4Zrmkz */ |
| 87077 | 35021, |
| 87078 | /* VINSERTF32x4Zrr */ |
| 87079 | 35026, |
| 87080 | /* VINSERTF32x4Zrrk */ |
| 87081 | 35030, |
| 87082 | /* VINSERTF32x4Zrrkz */ |
| 87083 | 35036, |
| 87084 | /* VINSERTF32x8Zrm */ |
| 87085 | 35041, |
| 87086 | /* VINSERTF32x8Zrmk */ |
| 87087 | 35045, |
| 87088 | /* VINSERTF32x8Zrmkz */ |
| 87089 | 35051, |
| 87090 | /* VINSERTF32x8Zrr */ |
| 87091 | 35056, |
| 87092 | /* VINSERTF32x8Zrrk */ |
| 87093 | 35060, |
| 87094 | /* VINSERTF32x8Zrrkz */ |
| 87095 | 35066, |
| 87096 | /* VINSERTF64x2Z256rm */ |
| 87097 | 35071, |
| 87098 | /* VINSERTF64x2Z256rmk */ |
| 87099 | 35075, |
| 87100 | /* VINSERTF64x2Z256rmkz */ |
| 87101 | 35081, |
| 87102 | /* VINSERTF64x2Z256rr */ |
| 87103 | 35086, |
| 87104 | /* VINSERTF64x2Z256rrk */ |
| 87105 | 35090, |
| 87106 | /* VINSERTF64x2Z256rrkz */ |
| 87107 | 35096, |
| 87108 | /* VINSERTF64x2Zrm */ |
| 87109 | 35101, |
| 87110 | /* VINSERTF64x2Zrmk */ |
| 87111 | 35105, |
| 87112 | /* VINSERTF64x2Zrmkz */ |
| 87113 | 35111, |
| 87114 | /* VINSERTF64x2Zrr */ |
| 87115 | 35116, |
| 87116 | /* VINSERTF64x2Zrrk */ |
| 87117 | 35120, |
| 87118 | /* VINSERTF64x2Zrrkz */ |
| 87119 | 35126, |
| 87120 | /* VINSERTF64x4Zrm */ |
| 87121 | 35131, |
| 87122 | /* VINSERTF64x4Zrmk */ |
| 87123 | 35135, |
| 87124 | /* VINSERTF64x4Zrmkz */ |
| 87125 | 35141, |
| 87126 | /* VINSERTF64x4Zrr */ |
| 87127 | 35146, |
| 87128 | /* VINSERTF64x4Zrrk */ |
| 87129 | 35150, |
| 87130 | /* VINSERTF64x4Zrrkz */ |
| 87131 | 35156, |
| 87132 | /* VINSERTI128rm */ |
| 87133 | 35161, |
| 87134 | /* VINSERTI128rr */ |
| 87135 | 35165, |
| 87136 | /* VINSERTI32x4Z256rm */ |
| 87137 | 35169, |
| 87138 | /* VINSERTI32x4Z256rmk */ |
| 87139 | 35173, |
| 87140 | /* VINSERTI32x4Z256rmkz */ |
| 87141 | 35179, |
| 87142 | /* VINSERTI32x4Z256rr */ |
| 87143 | 35184, |
| 87144 | /* VINSERTI32x4Z256rrk */ |
| 87145 | 35188, |
| 87146 | /* VINSERTI32x4Z256rrkz */ |
| 87147 | 35194, |
| 87148 | /* VINSERTI32x4Zrm */ |
| 87149 | 35199, |
| 87150 | /* VINSERTI32x4Zrmk */ |
| 87151 | 35203, |
| 87152 | /* VINSERTI32x4Zrmkz */ |
| 87153 | 35209, |
| 87154 | /* VINSERTI32x4Zrr */ |
| 87155 | 35214, |
| 87156 | /* VINSERTI32x4Zrrk */ |
| 87157 | 35218, |
| 87158 | /* VINSERTI32x4Zrrkz */ |
| 87159 | 35224, |
| 87160 | /* VINSERTI32x8Zrm */ |
| 87161 | 35229, |
| 87162 | /* VINSERTI32x8Zrmk */ |
| 87163 | 35233, |
| 87164 | /* VINSERTI32x8Zrmkz */ |
| 87165 | 35239, |
| 87166 | /* VINSERTI32x8Zrr */ |
| 87167 | 35244, |
| 87168 | /* VINSERTI32x8Zrrk */ |
| 87169 | 35248, |
| 87170 | /* VINSERTI32x8Zrrkz */ |
| 87171 | 35254, |
| 87172 | /* VINSERTI64x2Z256rm */ |
| 87173 | 35259, |
| 87174 | /* VINSERTI64x2Z256rmk */ |
| 87175 | 35263, |
| 87176 | /* VINSERTI64x2Z256rmkz */ |
| 87177 | 35269, |
| 87178 | /* VINSERTI64x2Z256rr */ |
| 87179 | 35274, |
| 87180 | /* VINSERTI64x2Z256rrk */ |
| 87181 | 35278, |
| 87182 | /* VINSERTI64x2Z256rrkz */ |
| 87183 | 35284, |
| 87184 | /* VINSERTI64x2Zrm */ |
| 87185 | 35289, |
| 87186 | /* VINSERTI64x2Zrmk */ |
| 87187 | 35293, |
| 87188 | /* VINSERTI64x2Zrmkz */ |
| 87189 | 35299, |
| 87190 | /* VINSERTI64x2Zrr */ |
| 87191 | 35304, |
| 87192 | /* VINSERTI64x2Zrrk */ |
| 87193 | 35308, |
| 87194 | /* VINSERTI64x2Zrrkz */ |
| 87195 | 35314, |
| 87196 | /* VINSERTI64x4Zrm */ |
| 87197 | 35319, |
| 87198 | /* VINSERTI64x4Zrmk */ |
| 87199 | 35323, |
| 87200 | /* VINSERTI64x4Zrmkz */ |
| 87201 | 35329, |
| 87202 | /* VINSERTI64x4Zrr */ |
| 87203 | 35334, |
| 87204 | /* VINSERTI64x4Zrrk */ |
| 87205 | 35338, |
| 87206 | /* VINSERTI64x4Zrrkz */ |
| 87207 | 35344, |
| 87208 | /* VINSERTPSZrm */ |
| 87209 | 35349, |
| 87210 | /* VINSERTPSZrr */ |
| 87211 | 35353, |
| 87212 | /* VINSERTPSrm */ |
| 87213 | 35357, |
| 87214 | /* VINSERTPSrr */ |
| 87215 | 35361, |
| 87216 | /* VLDDQUYrm */ |
| 87217 | 35365, |
| 87218 | /* VLDDQUrm */ |
| 87219 | 35367, |
| 87220 | /* VLDMXCSR */ |
| 87221 | 35369, |
| 87222 | /* VMASKMOVDQU */ |
| 87223 | 35370, |
| 87224 | /* VMASKMOVDQU64 */ |
| 87225 | 35372, |
| 87226 | /* VMASKMOVPDYmr */ |
| 87227 | 35374, |
| 87228 | /* VMASKMOVPDYrm */ |
| 87229 | 35377, |
| 87230 | /* VMASKMOVPDmr */ |
| 87231 | 35380, |
| 87232 | /* VMASKMOVPDrm */ |
| 87233 | 35383, |
| 87234 | /* VMASKMOVPSYmr */ |
| 87235 | 35386, |
| 87236 | /* VMASKMOVPSYrm */ |
| 87237 | 35389, |
| 87238 | /* VMASKMOVPSmr */ |
| 87239 | 35392, |
| 87240 | /* VMASKMOVPSrm */ |
| 87241 | 35395, |
| 87242 | /* VMAXCPDYrm */ |
| 87243 | 35398, |
| 87244 | /* VMAXCPDYrr */ |
| 87245 | 35401, |
| 87246 | /* VMAXCPDZ128rm */ |
| 87247 | 35404, |
| 87248 | /* VMAXCPDZ128rmb */ |
| 87249 | 35407, |
| 87250 | /* VMAXCPDZ128rmbk */ |
| 87251 | 35410, |
| 87252 | /* VMAXCPDZ128rmbkz */ |
| 87253 | 35415, |
| 87254 | /* VMAXCPDZ128rmk */ |
| 87255 | 35419, |
| 87256 | /* VMAXCPDZ128rmkz */ |
| 87257 | 35424, |
| 87258 | /* VMAXCPDZ128rr */ |
| 87259 | 35428, |
| 87260 | /* VMAXCPDZ128rrk */ |
| 87261 | 35431, |
| 87262 | /* VMAXCPDZ128rrkz */ |
| 87263 | 35436, |
| 87264 | /* VMAXCPDZ256rm */ |
| 87265 | 35440, |
| 87266 | /* VMAXCPDZ256rmb */ |
| 87267 | 35443, |
| 87268 | /* VMAXCPDZ256rmbk */ |
| 87269 | 35446, |
| 87270 | /* VMAXCPDZ256rmbkz */ |
| 87271 | 35451, |
| 87272 | /* VMAXCPDZ256rmk */ |
| 87273 | 35455, |
| 87274 | /* VMAXCPDZ256rmkz */ |
| 87275 | 35460, |
| 87276 | /* VMAXCPDZ256rr */ |
| 87277 | 35464, |
| 87278 | /* VMAXCPDZ256rrk */ |
| 87279 | 35467, |
| 87280 | /* VMAXCPDZ256rrkz */ |
| 87281 | 35472, |
| 87282 | /* VMAXCPDZrm */ |
| 87283 | 35476, |
| 87284 | /* VMAXCPDZrmb */ |
| 87285 | 35479, |
| 87286 | /* VMAXCPDZrmbk */ |
| 87287 | 35482, |
| 87288 | /* VMAXCPDZrmbkz */ |
| 87289 | 35487, |
| 87290 | /* VMAXCPDZrmk */ |
| 87291 | 35491, |
| 87292 | /* VMAXCPDZrmkz */ |
| 87293 | 35496, |
| 87294 | /* VMAXCPDZrr */ |
| 87295 | 35500, |
| 87296 | /* VMAXCPDZrrk */ |
| 87297 | 35503, |
| 87298 | /* VMAXCPDZrrkz */ |
| 87299 | 35508, |
| 87300 | /* VMAXCPDrm */ |
| 87301 | 35512, |
| 87302 | /* VMAXCPDrr */ |
| 87303 | 35515, |
| 87304 | /* VMAXCPHZ128rm */ |
| 87305 | 35518, |
| 87306 | /* VMAXCPHZ128rmb */ |
| 87307 | 35521, |
| 87308 | /* VMAXCPHZ128rmbk */ |
| 87309 | 35524, |
| 87310 | /* VMAXCPHZ128rmbkz */ |
| 87311 | 35529, |
| 87312 | /* VMAXCPHZ128rmk */ |
| 87313 | 35533, |
| 87314 | /* VMAXCPHZ128rmkz */ |
| 87315 | 35538, |
| 87316 | /* VMAXCPHZ128rr */ |
| 87317 | 35542, |
| 87318 | /* VMAXCPHZ128rrk */ |
| 87319 | 35545, |
| 87320 | /* VMAXCPHZ128rrkz */ |
| 87321 | 35550, |
| 87322 | /* VMAXCPHZ256rm */ |
| 87323 | 35554, |
| 87324 | /* VMAXCPHZ256rmb */ |
| 87325 | 35557, |
| 87326 | /* VMAXCPHZ256rmbk */ |
| 87327 | 35560, |
| 87328 | /* VMAXCPHZ256rmbkz */ |
| 87329 | 35565, |
| 87330 | /* VMAXCPHZ256rmk */ |
| 87331 | 35569, |
| 87332 | /* VMAXCPHZ256rmkz */ |
| 87333 | 35574, |
| 87334 | /* VMAXCPHZ256rr */ |
| 87335 | 35578, |
| 87336 | /* VMAXCPHZ256rrk */ |
| 87337 | 35581, |
| 87338 | /* VMAXCPHZ256rrkz */ |
| 87339 | 35586, |
| 87340 | /* VMAXCPHZrm */ |
| 87341 | 35590, |
| 87342 | /* VMAXCPHZrmb */ |
| 87343 | 35593, |
| 87344 | /* VMAXCPHZrmbk */ |
| 87345 | 35596, |
| 87346 | /* VMAXCPHZrmbkz */ |
| 87347 | 35601, |
| 87348 | /* VMAXCPHZrmk */ |
| 87349 | 35605, |
| 87350 | /* VMAXCPHZrmkz */ |
| 87351 | 35610, |
| 87352 | /* VMAXCPHZrr */ |
| 87353 | 35614, |
| 87354 | /* VMAXCPHZrrk */ |
| 87355 | 35617, |
| 87356 | /* VMAXCPHZrrkz */ |
| 87357 | 35622, |
| 87358 | /* VMAXCPSYrm */ |
| 87359 | 35626, |
| 87360 | /* VMAXCPSYrr */ |
| 87361 | 35629, |
| 87362 | /* VMAXCPSZ128rm */ |
| 87363 | 35632, |
| 87364 | /* VMAXCPSZ128rmb */ |
| 87365 | 35635, |
| 87366 | /* VMAXCPSZ128rmbk */ |
| 87367 | 35638, |
| 87368 | /* VMAXCPSZ128rmbkz */ |
| 87369 | 35643, |
| 87370 | /* VMAXCPSZ128rmk */ |
| 87371 | 35647, |
| 87372 | /* VMAXCPSZ128rmkz */ |
| 87373 | 35652, |
| 87374 | /* VMAXCPSZ128rr */ |
| 87375 | 35656, |
| 87376 | /* VMAXCPSZ128rrk */ |
| 87377 | 35659, |
| 87378 | /* VMAXCPSZ128rrkz */ |
| 87379 | 35664, |
| 87380 | /* VMAXCPSZ256rm */ |
| 87381 | 35668, |
| 87382 | /* VMAXCPSZ256rmb */ |
| 87383 | 35671, |
| 87384 | /* VMAXCPSZ256rmbk */ |
| 87385 | 35674, |
| 87386 | /* VMAXCPSZ256rmbkz */ |
| 87387 | 35679, |
| 87388 | /* VMAXCPSZ256rmk */ |
| 87389 | 35683, |
| 87390 | /* VMAXCPSZ256rmkz */ |
| 87391 | 35688, |
| 87392 | /* VMAXCPSZ256rr */ |
| 87393 | 35692, |
| 87394 | /* VMAXCPSZ256rrk */ |
| 87395 | 35695, |
| 87396 | /* VMAXCPSZ256rrkz */ |
| 87397 | 35700, |
| 87398 | /* VMAXCPSZrm */ |
| 87399 | 35704, |
| 87400 | /* VMAXCPSZrmb */ |
| 87401 | 35707, |
| 87402 | /* VMAXCPSZrmbk */ |
| 87403 | 35710, |
| 87404 | /* VMAXCPSZrmbkz */ |
| 87405 | 35715, |
| 87406 | /* VMAXCPSZrmk */ |
| 87407 | 35719, |
| 87408 | /* VMAXCPSZrmkz */ |
| 87409 | 35724, |
| 87410 | /* VMAXCPSZrr */ |
| 87411 | 35728, |
| 87412 | /* VMAXCPSZrrk */ |
| 87413 | 35731, |
| 87414 | /* VMAXCPSZrrkz */ |
| 87415 | 35736, |
| 87416 | /* VMAXCPSrm */ |
| 87417 | 35740, |
| 87418 | /* VMAXCPSrr */ |
| 87419 | 35743, |
| 87420 | /* VMAXCSDZrm */ |
| 87421 | 35746, |
| 87422 | /* VMAXCSDZrr */ |
| 87423 | 35749, |
| 87424 | /* VMAXCSDrm */ |
| 87425 | 35752, |
| 87426 | /* VMAXCSDrr */ |
| 87427 | 35755, |
| 87428 | /* VMAXCSHZrm */ |
| 87429 | 35758, |
| 87430 | /* VMAXCSHZrr */ |
| 87431 | 35761, |
| 87432 | /* VMAXCSSZrm */ |
| 87433 | 35764, |
| 87434 | /* VMAXCSSZrr */ |
| 87435 | 35767, |
| 87436 | /* VMAXCSSrm */ |
| 87437 | 35770, |
| 87438 | /* VMAXCSSrr */ |
| 87439 | 35773, |
| 87440 | /* VMAXPDYrm */ |
| 87441 | 35776, |
| 87442 | /* VMAXPDYrr */ |
| 87443 | 35779, |
| 87444 | /* VMAXPDZ128rm */ |
| 87445 | 35782, |
| 87446 | /* VMAXPDZ128rmb */ |
| 87447 | 35785, |
| 87448 | /* VMAXPDZ128rmbk */ |
| 87449 | 35788, |
| 87450 | /* VMAXPDZ128rmbkz */ |
| 87451 | 35793, |
| 87452 | /* VMAXPDZ128rmk */ |
| 87453 | 35797, |
| 87454 | /* VMAXPDZ128rmkz */ |
| 87455 | 35802, |
| 87456 | /* VMAXPDZ128rr */ |
| 87457 | 35806, |
| 87458 | /* VMAXPDZ128rrk */ |
| 87459 | 35809, |
| 87460 | /* VMAXPDZ128rrkz */ |
| 87461 | 35814, |
| 87462 | /* VMAXPDZ256rm */ |
| 87463 | 35818, |
| 87464 | /* VMAXPDZ256rmb */ |
| 87465 | 35821, |
| 87466 | /* VMAXPDZ256rmbk */ |
| 87467 | 35824, |
| 87468 | /* VMAXPDZ256rmbkz */ |
| 87469 | 35829, |
| 87470 | /* VMAXPDZ256rmk */ |
| 87471 | 35833, |
| 87472 | /* VMAXPDZ256rmkz */ |
| 87473 | 35838, |
| 87474 | /* VMAXPDZ256rr */ |
| 87475 | 35842, |
| 87476 | /* VMAXPDZ256rrk */ |
| 87477 | 35845, |
| 87478 | /* VMAXPDZ256rrkz */ |
| 87479 | 35850, |
| 87480 | /* VMAXPDZrm */ |
| 87481 | 35854, |
| 87482 | /* VMAXPDZrmb */ |
| 87483 | 35857, |
| 87484 | /* VMAXPDZrmbk */ |
| 87485 | 35860, |
| 87486 | /* VMAXPDZrmbkz */ |
| 87487 | 35865, |
| 87488 | /* VMAXPDZrmk */ |
| 87489 | 35869, |
| 87490 | /* VMAXPDZrmkz */ |
| 87491 | 35874, |
| 87492 | /* VMAXPDZrr */ |
| 87493 | 35878, |
| 87494 | /* VMAXPDZrrb */ |
| 87495 | 35881, |
| 87496 | /* VMAXPDZrrbk */ |
| 87497 | 35884, |
| 87498 | /* VMAXPDZrrbkz */ |
| 87499 | 35889, |
| 87500 | /* VMAXPDZrrk */ |
| 87501 | 35893, |
| 87502 | /* VMAXPDZrrkz */ |
| 87503 | 35898, |
| 87504 | /* VMAXPDrm */ |
| 87505 | 35902, |
| 87506 | /* VMAXPDrr */ |
| 87507 | 35905, |
| 87508 | /* VMAXPHZ128rm */ |
| 87509 | 35908, |
| 87510 | /* VMAXPHZ128rmb */ |
| 87511 | 35911, |
| 87512 | /* VMAXPHZ128rmbk */ |
| 87513 | 35914, |
| 87514 | /* VMAXPHZ128rmbkz */ |
| 87515 | 35919, |
| 87516 | /* VMAXPHZ128rmk */ |
| 87517 | 35923, |
| 87518 | /* VMAXPHZ128rmkz */ |
| 87519 | 35928, |
| 87520 | /* VMAXPHZ128rr */ |
| 87521 | 35932, |
| 87522 | /* VMAXPHZ128rrk */ |
| 87523 | 35935, |
| 87524 | /* VMAXPHZ128rrkz */ |
| 87525 | 35940, |
| 87526 | /* VMAXPHZ256rm */ |
| 87527 | 35944, |
| 87528 | /* VMAXPHZ256rmb */ |
| 87529 | 35947, |
| 87530 | /* VMAXPHZ256rmbk */ |
| 87531 | 35950, |
| 87532 | /* VMAXPHZ256rmbkz */ |
| 87533 | 35955, |
| 87534 | /* VMAXPHZ256rmk */ |
| 87535 | 35959, |
| 87536 | /* VMAXPHZ256rmkz */ |
| 87537 | 35964, |
| 87538 | /* VMAXPHZ256rr */ |
| 87539 | 35968, |
| 87540 | /* VMAXPHZ256rrk */ |
| 87541 | 35971, |
| 87542 | /* VMAXPHZ256rrkz */ |
| 87543 | 35976, |
| 87544 | /* VMAXPHZrm */ |
| 87545 | 35980, |
| 87546 | /* VMAXPHZrmb */ |
| 87547 | 35983, |
| 87548 | /* VMAXPHZrmbk */ |
| 87549 | 35986, |
| 87550 | /* VMAXPHZrmbkz */ |
| 87551 | 35991, |
| 87552 | /* VMAXPHZrmk */ |
| 87553 | 35995, |
| 87554 | /* VMAXPHZrmkz */ |
| 87555 | 36000, |
| 87556 | /* VMAXPHZrr */ |
| 87557 | 36004, |
| 87558 | /* VMAXPHZrrb */ |
| 87559 | 36007, |
| 87560 | /* VMAXPHZrrbk */ |
| 87561 | 36010, |
| 87562 | /* VMAXPHZrrbkz */ |
| 87563 | 36015, |
| 87564 | /* VMAXPHZrrk */ |
| 87565 | 36019, |
| 87566 | /* VMAXPHZrrkz */ |
| 87567 | 36024, |
| 87568 | /* VMAXPSYrm */ |
| 87569 | 36028, |
| 87570 | /* VMAXPSYrr */ |
| 87571 | 36031, |
| 87572 | /* VMAXPSZ128rm */ |
| 87573 | 36034, |
| 87574 | /* VMAXPSZ128rmb */ |
| 87575 | 36037, |
| 87576 | /* VMAXPSZ128rmbk */ |
| 87577 | 36040, |
| 87578 | /* VMAXPSZ128rmbkz */ |
| 87579 | 36045, |
| 87580 | /* VMAXPSZ128rmk */ |
| 87581 | 36049, |
| 87582 | /* VMAXPSZ128rmkz */ |
| 87583 | 36054, |
| 87584 | /* VMAXPSZ128rr */ |
| 87585 | 36058, |
| 87586 | /* VMAXPSZ128rrk */ |
| 87587 | 36061, |
| 87588 | /* VMAXPSZ128rrkz */ |
| 87589 | 36066, |
| 87590 | /* VMAXPSZ256rm */ |
| 87591 | 36070, |
| 87592 | /* VMAXPSZ256rmb */ |
| 87593 | 36073, |
| 87594 | /* VMAXPSZ256rmbk */ |
| 87595 | 36076, |
| 87596 | /* VMAXPSZ256rmbkz */ |
| 87597 | 36081, |
| 87598 | /* VMAXPSZ256rmk */ |
| 87599 | 36085, |
| 87600 | /* VMAXPSZ256rmkz */ |
| 87601 | 36090, |
| 87602 | /* VMAXPSZ256rr */ |
| 87603 | 36094, |
| 87604 | /* VMAXPSZ256rrk */ |
| 87605 | 36097, |
| 87606 | /* VMAXPSZ256rrkz */ |
| 87607 | 36102, |
| 87608 | /* VMAXPSZrm */ |
| 87609 | 36106, |
| 87610 | /* VMAXPSZrmb */ |
| 87611 | 36109, |
| 87612 | /* VMAXPSZrmbk */ |
| 87613 | 36112, |
| 87614 | /* VMAXPSZrmbkz */ |
| 87615 | 36117, |
| 87616 | /* VMAXPSZrmk */ |
| 87617 | 36121, |
| 87618 | /* VMAXPSZrmkz */ |
| 87619 | 36126, |
| 87620 | /* VMAXPSZrr */ |
| 87621 | 36130, |
| 87622 | /* VMAXPSZrrb */ |
| 87623 | 36133, |
| 87624 | /* VMAXPSZrrbk */ |
| 87625 | 36136, |
| 87626 | /* VMAXPSZrrbkz */ |
| 87627 | 36141, |
| 87628 | /* VMAXPSZrrk */ |
| 87629 | 36145, |
| 87630 | /* VMAXPSZrrkz */ |
| 87631 | 36150, |
| 87632 | /* VMAXPSrm */ |
| 87633 | 36154, |
| 87634 | /* VMAXPSrr */ |
| 87635 | 36157, |
| 87636 | /* VMAXSDZrm */ |
| 87637 | 36160, |
| 87638 | /* VMAXSDZrm_Int */ |
| 87639 | 36163, |
| 87640 | /* VMAXSDZrm_Intk */ |
| 87641 | 36166, |
| 87642 | /* VMAXSDZrm_Intkz */ |
| 87643 | 36171, |
| 87644 | /* VMAXSDZrr */ |
| 87645 | 36175, |
| 87646 | /* VMAXSDZrr_Int */ |
| 87647 | 36178, |
| 87648 | /* VMAXSDZrr_Intk */ |
| 87649 | 36181, |
| 87650 | /* VMAXSDZrr_Intkz */ |
| 87651 | 36186, |
| 87652 | /* VMAXSDZrrb_Int */ |
| 87653 | 36190, |
| 87654 | /* VMAXSDZrrb_Intk */ |
| 87655 | 36193, |
| 87656 | /* VMAXSDZrrb_Intkz */ |
| 87657 | 36198, |
| 87658 | /* VMAXSDrm */ |
| 87659 | 36202, |
| 87660 | /* VMAXSDrm_Int */ |
| 87661 | 36205, |
| 87662 | /* VMAXSDrr */ |
| 87663 | 36208, |
| 87664 | /* VMAXSDrr_Int */ |
| 87665 | 36211, |
| 87666 | /* VMAXSHZrm */ |
| 87667 | 36214, |
| 87668 | /* VMAXSHZrm_Int */ |
| 87669 | 36217, |
| 87670 | /* VMAXSHZrm_Intk */ |
| 87671 | 36220, |
| 87672 | /* VMAXSHZrm_Intkz */ |
| 87673 | 36225, |
| 87674 | /* VMAXSHZrr */ |
| 87675 | 36229, |
| 87676 | /* VMAXSHZrr_Int */ |
| 87677 | 36232, |
| 87678 | /* VMAXSHZrr_Intk */ |
| 87679 | 36235, |
| 87680 | /* VMAXSHZrr_Intkz */ |
| 87681 | 36240, |
| 87682 | /* VMAXSHZrrb_Int */ |
| 87683 | 36244, |
| 87684 | /* VMAXSHZrrb_Intk */ |
| 87685 | 36247, |
| 87686 | /* VMAXSHZrrb_Intkz */ |
| 87687 | 36252, |
| 87688 | /* VMAXSSZrm */ |
| 87689 | 36256, |
| 87690 | /* VMAXSSZrm_Int */ |
| 87691 | 36259, |
| 87692 | /* VMAXSSZrm_Intk */ |
| 87693 | 36262, |
| 87694 | /* VMAXSSZrm_Intkz */ |
| 87695 | 36267, |
| 87696 | /* VMAXSSZrr */ |
| 87697 | 36271, |
| 87698 | /* VMAXSSZrr_Int */ |
| 87699 | 36274, |
| 87700 | /* VMAXSSZrr_Intk */ |
| 87701 | 36277, |
| 87702 | /* VMAXSSZrr_Intkz */ |
| 87703 | 36282, |
| 87704 | /* VMAXSSZrrb_Int */ |
| 87705 | 36286, |
| 87706 | /* VMAXSSZrrb_Intk */ |
| 87707 | 36289, |
| 87708 | /* VMAXSSZrrb_Intkz */ |
| 87709 | 36294, |
| 87710 | /* VMAXSSrm */ |
| 87711 | 36298, |
| 87712 | /* VMAXSSrm_Int */ |
| 87713 | 36301, |
| 87714 | /* VMAXSSrr */ |
| 87715 | 36304, |
| 87716 | /* VMAXSSrr_Int */ |
| 87717 | 36307, |
| 87718 | /* VMCALL */ |
| 87719 | 36310, |
| 87720 | /* VMCLEARm */ |
| 87721 | 36310, |
| 87722 | /* VMFUNC */ |
| 87723 | 36311, |
| 87724 | /* VMINCPDYrm */ |
| 87725 | 36311, |
| 87726 | /* VMINCPDYrr */ |
| 87727 | 36314, |
| 87728 | /* VMINCPDZ128rm */ |
| 87729 | 36317, |
| 87730 | /* VMINCPDZ128rmb */ |
| 87731 | 36320, |
| 87732 | /* VMINCPDZ128rmbk */ |
| 87733 | 36323, |
| 87734 | /* VMINCPDZ128rmbkz */ |
| 87735 | 36328, |
| 87736 | /* VMINCPDZ128rmk */ |
| 87737 | 36332, |
| 87738 | /* VMINCPDZ128rmkz */ |
| 87739 | 36337, |
| 87740 | /* VMINCPDZ128rr */ |
| 87741 | 36341, |
| 87742 | /* VMINCPDZ128rrk */ |
| 87743 | 36344, |
| 87744 | /* VMINCPDZ128rrkz */ |
| 87745 | 36349, |
| 87746 | /* VMINCPDZ256rm */ |
| 87747 | 36353, |
| 87748 | /* VMINCPDZ256rmb */ |
| 87749 | 36356, |
| 87750 | /* VMINCPDZ256rmbk */ |
| 87751 | 36359, |
| 87752 | /* VMINCPDZ256rmbkz */ |
| 87753 | 36364, |
| 87754 | /* VMINCPDZ256rmk */ |
| 87755 | 36368, |
| 87756 | /* VMINCPDZ256rmkz */ |
| 87757 | 36373, |
| 87758 | /* VMINCPDZ256rr */ |
| 87759 | 36377, |
| 87760 | /* VMINCPDZ256rrk */ |
| 87761 | 36380, |
| 87762 | /* VMINCPDZ256rrkz */ |
| 87763 | 36385, |
| 87764 | /* VMINCPDZrm */ |
| 87765 | 36389, |
| 87766 | /* VMINCPDZrmb */ |
| 87767 | 36392, |
| 87768 | /* VMINCPDZrmbk */ |
| 87769 | 36395, |
| 87770 | /* VMINCPDZrmbkz */ |
| 87771 | 36400, |
| 87772 | /* VMINCPDZrmk */ |
| 87773 | 36404, |
| 87774 | /* VMINCPDZrmkz */ |
| 87775 | 36409, |
| 87776 | /* VMINCPDZrr */ |
| 87777 | 36413, |
| 87778 | /* VMINCPDZrrk */ |
| 87779 | 36416, |
| 87780 | /* VMINCPDZrrkz */ |
| 87781 | 36421, |
| 87782 | /* VMINCPDrm */ |
| 87783 | 36425, |
| 87784 | /* VMINCPDrr */ |
| 87785 | 36428, |
| 87786 | /* VMINCPHZ128rm */ |
| 87787 | 36431, |
| 87788 | /* VMINCPHZ128rmb */ |
| 87789 | 36434, |
| 87790 | /* VMINCPHZ128rmbk */ |
| 87791 | 36437, |
| 87792 | /* VMINCPHZ128rmbkz */ |
| 87793 | 36442, |
| 87794 | /* VMINCPHZ128rmk */ |
| 87795 | 36446, |
| 87796 | /* VMINCPHZ128rmkz */ |
| 87797 | 36451, |
| 87798 | /* VMINCPHZ128rr */ |
| 87799 | 36455, |
| 87800 | /* VMINCPHZ128rrk */ |
| 87801 | 36458, |
| 87802 | /* VMINCPHZ128rrkz */ |
| 87803 | 36463, |
| 87804 | /* VMINCPHZ256rm */ |
| 87805 | 36467, |
| 87806 | /* VMINCPHZ256rmb */ |
| 87807 | 36470, |
| 87808 | /* VMINCPHZ256rmbk */ |
| 87809 | 36473, |
| 87810 | /* VMINCPHZ256rmbkz */ |
| 87811 | 36478, |
| 87812 | /* VMINCPHZ256rmk */ |
| 87813 | 36482, |
| 87814 | /* VMINCPHZ256rmkz */ |
| 87815 | 36487, |
| 87816 | /* VMINCPHZ256rr */ |
| 87817 | 36491, |
| 87818 | /* VMINCPHZ256rrk */ |
| 87819 | 36494, |
| 87820 | /* VMINCPHZ256rrkz */ |
| 87821 | 36499, |
| 87822 | /* VMINCPHZrm */ |
| 87823 | 36503, |
| 87824 | /* VMINCPHZrmb */ |
| 87825 | 36506, |
| 87826 | /* VMINCPHZrmbk */ |
| 87827 | 36509, |
| 87828 | /* VMINCPHZrmbkz */ |
| 87829 | 36514, |
| 87830 | /* VMINCPHZrmk */ |
| 87831 | 36518, |
| 87832 | /* VMINCPHZrmkz */ |
| 87833 | 36523, |
| 87834 | /* VMINCPHZrr */ |
| 87835 | 36527, |
| 87836 | /* VMINCPHZrrk */ |
| 87837 | 36530, |
| 87838 | /* VMINCPHZrrkz */ |
| 87839 | 36535, |
| 87840 | /* VMINCPSYrm */ |
| 87841 | 36539, |
| 87842 | /* VMINCPSYrr */ |
| 87843 | 36542, |
| 87844 | /* VMINCPSZ128rm */ |
| 87845 | 36545, |
| 87846 | /* VMINCPSZ128rmb */ |
| 87847 | 36548, |
| 87848 | /* VMINCPSZ128rmbk */ |
| 87849 | 36551, |
| 87850 | /* VMINCPSZ128rmbkz */ |
| 87851 | 36556, |
| 87852 | /* VMINCPSZ128rmk */ |
| 87853 | 36560, |
| 87854 | /* VMINCPSZ128rmkz */ |
| 87855 | 36565, |
| 87856 | /* VMINCPSZ128rr */ |
| 87857 | 36569, |
| 87858 | /* VMINCPSZ128rrk */ |
| 87859 | 36572, |
| 87860 | /* VMINCPSZ128rrkz */ |
| 87861 | 36577, |
| 87862 | /* VMINCPSZ256rm */ |
| 87863 | 36581, |
| 87864 | /* VMINCPSZ256rmb */ |
| 87865 | 36584, |
| 87866 | /* VMINCPSZ256rmbk */ |
| 87867 | 36587, |
| 87868 | /* VMINCPSZ256rmbkz */ |
| 87869 | 36592, |
| 87870 | /* VMINCPSZ256rmk */ |
| 87871 | 36596, |
| 87872 | /* VMINCPSZ256rmkz */ |
| 87873 | 36601, |
| 87874 | /* VMINCPSZ256rr */ |
| 87875 | 36605, |
| 87876 | /* VMINCPSZ256rrk */ |
| 87877 | 36608, |
| 87878 | /* VMINCPSZ256rrkz */ |
| 87879 | 36613, |
| 87880 | /* VMINCPSZrm */ |
| 87881 | 36617, |
| 87882 | /* VMINCPSZrmb */ |
| 87883 | 36620, |
| 87884 | /* VMINCPSZrmbk */ |
| 87885 | 36623, |
| 87886 | /* VMINCPSZrmbkz */ |
| 87887 | 36628, |
| 87888 | /* VMINCPSZrmk */ |
| 87889 | 36632, |
| 87890 | /* VMINCPSZrmkz */ |
| 87891 | 36637, |
| 87892 | /* VMINCPSZrr */ |
| 87893 | 36641, |
| 87894 | /* VMINCPSZrrk */ |
| 87895 | 36644, |
| 87896 | /* VMINCPSZrrkz */ |
| 87897 | 36649, |
| 87898 | /* VMINCPSrm */ |
| 87899 | 36653, |
| 87900 | /* VMINCPSrr */ |
| 87901 | 36656, |
| 87902 | /* VMINCSDZrm */ |
| 87903 | 36659, |
| 87904 | /* VMINCSDZrr */ |
| 87905 | 36662, |
| 87906 | /* VMINCSDrm */ |
| 87907 | 36665, |
| 87908 | /* VMINCSDrr */ |
| 87909 | 36668, |
| 87910 | /* VMINCSHZrm */ |
| 87911 | 36671, |
| 87912 | /* VMINCSHZrr */ |
| 87913 | 36674, |
| 87914 | /* VMINCSSZrm */ |
| 87915 | 36677, |
| 87916 | /* VMINCSSZrr */ |
| 87917 | 36680, |
| 87918 | /* VMINCSSrm */ |
| 87919 | 36683, |
| 87920 | /* VMINCSSrr */ |
| 87921 | 36686, |
| 87922 | /* VMINPDYrm */ |
| 87923 | 36689, |
| 87924 | /* VMINPDYrr */ |
| 87925 | 36692, |
| 87926 | /* VMINPDZ128rm */ |
| 87927 | 36695, |
| 87928 | /* VMINPDZ128rmb */ |
| 87929 | 36698, |
| 87930 | /* VMINPDZ128rmbk */ |
| 87931 | 36701, |
| 87932 | /* VMINPDZ128rmbkz */ |
| 87933 | 36706, |
| 87934 | /* VMINPDZ128rmk */ |
| 87935 | 36710, |
| 87936 | /* VMINPDZ128rmkz */ |
| 87937 | 36715, |
| 87938 | /* VMINPDZ128rr */ |
| 87939 | 36719, |
| 87940 | /* VMINPDZ128rrk */ |
| 87941 | 36722, |
| 87942 | /* VMINPDZ128rrkz */ |
| 87943 | 36727, |
| 87944 | /* VMINPDZ256rm */ |
| 87945 | 36731, |
| 87946 | /* VMINPDZ256rmb */ |
| 87947 | 36734, |
| 87948 | /* VMINPDZ256rmbk */ |
| 87949 | 36737, |
| 87950 | /* VMINPDZ256rmbkz */ |
| 87951 | 36742, |
| 87952 | /* VMINPDZ256rmk */ |
| 87953 | 36746, |
| 87954 | /* VMINPDZ256rmkz */ |
| 87955 | 36751, |
| 87956 | /* VMINPDZ256rr */ |
| 87957 | 36755, |
| 87958 | /* VMINPDZ256rrk */ |
| 87959 | 36758, |
| 87960 | /* VMINPDZ256rrkz */ |
| 87961 | 36763, |
| 87962 | /* VMINPDZrm */ |
| 87963 | 36767, |
| 87964 | /* VMINPDZrmb */ |
| 87965 | 36770, |
| 87966 | /* VMINPDZrmbk */ |
| 87967 | 36773, |
| 87968 | /* VMINPDZrmbkz */ |
| 87969 | 36778, |
| 87970 | /* VMINPDZrmk */ |
| 87971 | 36782, |
| 87972 | /* VMINPDZrmkz */ |
| 87973 | 36787, |
| 87974 | /* VMINPDZrr */ |
| 87975 | 36791, |
| 87976 | /* VMINPDZrrb */ |
| 87977 | 36794, |
| 87978 | /* VMINPDZrrbk */ |
| 87979 | 36797, |
| 87980 | /* VMINPDZrrbkz */ |
| 87981 | 36802, |
| 87982 | /* VMINPDZrrk */ |
| 87983 | 36806, |
| 87984 | /* VMINPDZrrkz */ |
| 87985 | 36811, |
| 87986 | /* VMINPDrm */ |
| 87987 | 36815, |
| 87988 | /* VMINPDrr */ |
| 87989 | 36818, |
| 87990 | /* VMINPHZ128rm */ |
| 87991 | 36821, |
| 87992 | /* VMINPHZ128rmb */ |
| 87993 | 36824, |
| 87994 | /* VMINPHZ128rmbk */ |
| 87995 | 36827, |
| 87996 | /* VMINPHZ128rmbkz */ |
| 87997 | 36832, |
| 87998 | /* VMINPHZ128rmk */ |
| 87999 | 36836, |
| 88000 | /* VMINPHZ128rmkz */ |
| 88001 | 36841, |
| 88002 | /* VMINPHZ128rr */ |
| 88003 | 36845, |
| 88004 | /* VMINPHZ128rrk */ |
| 88005 | 36848, |
| 88006 | /* VMINPHZ128rrkz */ |
| 88007 | 36853, |
| 88008 | /* VMINPHZ256rm */ |
| 88009 | 36857, |
| 88010 | /* VMINPHZ256rmb */ |
| 88011 | 36860, |
| 88012 | /* VMINPHZ256rmbk */ |
| 88013 | 36863, |
| 88014 | /* VMINPHZ256rmbkz */ |
| 88015 | 36868, |
| 88016 | /* VMINPHZ256rmk */ |
| 88017 | 36872, |
| 88018 | /* VMINPHZ256rmkz */ |
| 88019 | 36877, |
| 88020 | /* VMINPHZ256rr */ |
| 88021 | 36881, |
| 88022 | /* VMINPHZ256rrk */ |
| 88023 | 36884, |
| 88024 | /* VMINPHZ256rrkz */ |
| 88025 | 36889, |
| 88026 | /* VMINPHZrm */ |
| 88027 | 36893, |
| 88028 | /* VMINPHZrmb */ |
| 88029 | 36896, |
| 88030 | /* VMINPHZrmbk */ |
| 88031 | 36899, |
| 88032 | /* VMINPHZrmbkz */ |
| 88033 | 36904, |
| 88034 | /* VMINPHZrmk */ |
| 88035 | 36908, |
| 88036 | /* VMINPHZrmkz */ |
| 88037 | 36913, |
| 88038 | /* VMINPHZrr */ |
| 88039 | 36917, |
| 88040 | /* VMINPHZrrb */ |
| 88041 | 36920, |
| 88042 | /* VMINPHZrrbk */ |
| 88043 | 36923, |
| 88044 | /* VMINPHZrrbkz */ |
| 88045 | 36928, |
| 88046 | /* VMINPHZrrk */ |
| 88047 | 36932, |
| 88048 | /* VMINPHZrrkz */ |
| 88049 | 36937, |
| 88050 | /* VMINPSYrm */ |
| 88051 | 36941, |
| 88052 | /* VMINPSYrr */ |
| 88053 | 36944, |
| 88054 | /* VMINPSZ128rm */ |
| 88055 | 36947, |
| 88056 | /* VMINPSZ128rmb */ |
| 88057 | 36950, |
| 88058 | /* VMINPSZ128rmbk */ |
| 88059 | 36953, |
| 88060 | /* VMINPSZ128rmbkz */ |
| 88061 | 36958, |
| 88062 | /* VMINPSZ128rmk */ |
| 88063 | 36962, |
| 88064 | /* VMINPSZ128rmkz */ |
| 88065 | 36967, |
| 88066 | /* VMINPSZ128rr */ |
| 88067 | 36971, |
| 88068 | /* VMINPSZ128rrk */ |
| 88069 | 36974, |
| 88070 | /* VMINPSZ128rrkz */ |
| 88071 | 36979, |
| 88072 | /* VMINPSZ256rm */ |
| 88073 | 36983, |
| 88074 | /* VMINPSZ256rmb */ |
| 88075 | 36986, |
| 88076 | /* VMINPSZ256rmbk */ |
| 88077 | 36989, |
| 88078 | /* VMINPSZ256rmbkz */ |
| 88079 | 36994, |
| 88080 | /* VMINPSZ256rmk */ |
| 88081 | 36998, |
| 88082 | /* VMINPSZ256rmkz */ |
| 88083 | 37003, |
| 88084 | /* VMINPSZ256rr */ |
| 88085 | 37007, |
| 88086 | /* VMINPSZ256rrk */ |
| 88087 | 37010, |
| 88088 | /* VMINPSZ256rrkz */ |
| 88089 | 37015, |
| 88090 | /* VMINPSZrm */ |
| 88091 | 37019, |
| 88092 | /* VMINPSZrmb */ |
| 88093 | 37022, |
| 88094 | /* VMINPSZrmbk */ |
| 88095 | 37025, |
| 88096 | /* VMINPSZrmbkz */ |
| 88097 | 37030, |
| 88098 | /* VMINPSZrmk */ |
| 88099 | 37034, |
| 88100 | /* VMINPSZrmkz */ |
| 88101 | 37039, |
| 88102 | /* VMINPSZrr */ |
| 88103 | 37043, |
| 88104 | /* VMINPSZrrb */ |
| 88105 | 37046, |
| 88106 | /* VMINPSZrrbk */ |
| 88107 | 37049, |
| 88108 | /* VMINPSZrrbkz */ |
| 88109 | 37054, |
| 88110 | /* VMINPSZrrk */ |
| 88111 | 37058, |
| 88112 | /* VMINPSZrrkz */ |
| 88113 | 37063, |
| 88114 | /* VMINPSrm */ |
| 88115 | 37067, |
| 88116 | /* VMINPSrr */ |
| 88117 | 37070, |
| 88118 | /* VMINSDZrm */ |
| 88119 | 37073, |
| 88120 | /* VMINSDZrm_Int */ |
| 88121 | 37076, |
| 88122 | /* VMINSDZrm_Intk */ |
| 88123 | 37079, |
| 88124 | /* VMINSDZrm_Intkz */ |
| 88125 | 37084, |
| 88126 | /* VMINSDZrr */ |
| 88127 | 37088, |
| 88128 | /* VMINSDZrr_Int */ |
| 88129 | 37091, |
| 88130 | /* VMINSDZrr_Intk */ |
| 88131 | 37094, |
| 88132 | /* VMINSDZrr_Intkz */ |
| 88133 | 37099, |
| 88134 | /* VMINSDZrrb_Int */ |
| 88135 | 37103, |
| 88136 | /* VMINSDZrrb_Intk */ |
| 88137 | 37106, |
| 88138 | /* VMINSDZrrb_Intkz */ |
| 88139 | 37111, |
| 88140 | /* VMINSDrm */ |
| 88141 | 37115, |
| 88142 | /* VMINSDrm_Int */ |
| 88143 | 37118, |
| 88144 | /* VMINSDrr */ |
| 88145 | 37121, |
| 88146 | /* VMINSDrr_Int */ |
| 88147 | 37124, |
| 88148 | /* VMINSHZrm */ |
| 88149 | 37127, |
| 88150 | /* VMINSHZrm_Int */ |
| 88151 | 37130, |
| 88152 | /* VMINSHZrm_Intk */ |
| 88153 | 37133, |
| 88154 | /* VMINSHZrm_Intkz */ |
| 88155 | 37138, |
| 88156 | /* VMINSHZrr */ |
| 88157 | 37142, |
| 88158 | /* VMINSHZrr_Int */ |
| 88159 | 37145, |
| 88160 | /* VMINSHZrr_Intk */ |
| 88161 | 37148, |
| 88162 | /* VMINSHZrr_Intkz */ |
| 88163 | 37153, |
| 88164 | /* VMINSHZrrb_Int */ |
| 88165 | 37157, |
| 88166 | /* VMINSHZrrb_Intk */ |
| 88167 | 37160, |
| 88168 | /* VMINSHZrrb_Intkz */ |
| 88169 | 37165, |
| 88170 | /* VMINSSZrm */ |
| 88171 | 37169, |
| 88172 | /* VMINSSZrm_Int */ |
| 88173 | 37172, |
| 88174 | /* VMINSSZrm_Intk */ |
| 88175 | 37175, |
| 88176 | /* VMINSSZrm_Intkz */ |
| 88177 | 37180, |
| 88178 | /* VMINSSZrr */ |
| 88179 | 37184, |
| 88180 | /* VMINSSZrr_Int */ |
| 88181 | 37187, |
| 88182 | /* VMINSSZrr_Intk */ |
| 88183 | 37190, |
| 88184 | /* VMINSSZrr_Intkz */ |
| 88185 | 37195, |
| 88186 | /* VMINSSZrrb_Int */ |
| 88187 | 37199, |
| 88188 | /* VMINSSZrrb_Intk */ |
| 88189 | 37202, |
| 88190 | /* VMINSSZrrb_Intkz */ |
| 88191 | 37207, |
| 88192 | /* VMINSSrm */ |
| 88193 | 37211, |
| 88194 | /* VMINSSrm_Int */ |
| 88195 | 37214, |
| 88196 | /* VMINSSrr */ |
| 88197 | 37217, |
| 88198 | /* VMINSSrr_Int */ |
| 88199 | 37220, |
| 88200 | /* VMLAUNCH */ |
| 88201 | 37223, |
| 88202 | /* VMLOAD32 */ |
| 88203 | 37223, |
| 88204 | /* VMLOAD64 */ |
| 88205 | 37223, |
| 88206 | /* VMMCALL */ |
| 88207 | 37223, |
| 88208 | /* VMOV64toPQIZrm */ |
| 88209 | 37223, |
| 88210 | /* VMOV64toPQIZrr */ |
| 88211 | 37225, |
| 88212 | /* VMOV64toPQIrm */ |
| 88213 | 37227, |
| 88214 | /* VMOV64toPQIrr */ |
| 88215 | 37229, |
| 88216 | /* VMOV64toSDZrr */ |
| 88217 | 37231, |
| 88218 | /* VMOV64toSDrr */ |
| 88219 | 37233, |
| 88220 | /* VMOVAPDYmr */ |
| 88221 | 37235, |
| 88222 | /* VMOVAPDYrm */ |
| 88223 | 37237, |
| 88224 | /* VMOVAPDYrr */ |
| 88225 | 37239, |
| 88226 | /* VMOVAPDYrr_REV */ |
| 88227 | 37241, |
| 88228 | /* VMOVAPDZ128mr */ |
| 88229 | 37243, |
| 88230 | /* VMOVAPDZ128mrk */ |
| 88231 | 37245, |
| 88232 | /* VMOVAPDZ128rm */ |
| 88233 | 37248, |
| 88234 | /* VMOVAPDZ128rmk */ |
| 88235 | 37250, |
| 88236 | /* VMOVAPDZ128rmkz */ |
| 88237 | 37254, |
| 88238 | /* VMOVAPDZ128rr */ |
| 88239 | 37257, |
| 88240 | /* VMOVAPDZ128rr_REV */ |
| 88241 | 37259, |
| 88242 | /* VMOVAPDZ128rrk */ |
| 88243 | 37261, |
| 88244 | /* VMOVAPDZ128rrk_REV */ |
| 88245 | 37265, |
| 88246 | /* VMOVAPDZ128rrkz */ |
| 88247 | 37268, |
| 88248 | /* VMOVAPDZ128rrkz_REV */ |
| 88249 | 37271, |
| 88250 | /* VMOVAPDZ256mr */ |
| 88251 | 37274, |
| 88252 | /* VMOVAPDZ256mrk */ |
| 88253 | 37276, |
| 88254 | /* VMOVAPDZ256rm */ |
| 88255 | 37279, |
| 88256 | /* VMOVAPDZ256rmk */ |
| 88257 | 37281, |
| 88258 | /* VMOVAPDZ256rmkz */ |
| 88259 | 37285, |
| 88260 | /* VMOVAPDZ256rr */ |
| 88261 | 37288, |
| 88262 | /* VMOVAPDZ256rr_REV */ |
| 88263 | 37290, |
| 88264 | /* VMOVAPDZ256rrk */ |
| 88265 | 37292, |
| 88266 | /* VMOVAPDZ256rrk_REV */ |
| 88267 | 37296, |
| 88268 | /* VMOVAPDZ256rrkz */ |
| 88269 | 37299, |
| 88270 | /* VMOVAPDZ256rrkz_REV */ |
| 88271 | 37302, |
| 88272 | /* VMOVAPDZmr */ |
| 88273 | 37305, |
| 88274 | /* VMOVAPDZmrk */ |
| 88275 | 37307, |
| 88276 | /* VMOVAPDZrm */ |
| 88277 | 37310, |
| 88278 | /* VMOVAPDZrmk */ |
| 88279 | 37312, |
| 88280 | /* VMOVAPDZrmkz */ |
| 88281 | 37316, |
| 88282 | /* VMOVAPDZrr */ |
| 88283 | 37319, |
| 88284 | /* VMOVAPDZrr_REV */ |
| 88285 | 37321, |
| 88286 | /* VMOVAPDZrrk */ |
| 88287 | 37323, |
| 88288 | /* VMOVAPDZrrk_REV */ |
| 88289 | 37327, |
| 88290 | /* VMOVAPDZrrkz */ |
| 88291 | 37330, |
| 88292 | /* VMOVAPDZrrkz_REV */ |
| 88293 | 37333, |
| 88294 | /* VMOVAPDmr */ |
| 88295 | 37336, |
| 88296 | /* VMOVAPDrm */ |
| 88297 | 37338, |
| 88298 | /* VMOVAPDrr */ |
| 88299 | 37340, |
| 88300 | /* VMOVAPDrr_REV */ |
| 88301 | 37342, |
| 88302 | /* VMOVAPSYmr */ |
| 88303 | 37344, |
| 88304 | /* VMOVAPSYrm */ |
| 88305 | 37346, |
| 88306 | /* VMOVAPSYrr */ |
| 88307 | 37348, |
| 88308 | /* VMOVAPSYrr_REV */ |
| 88309 | 37350, |
| 88310 | /* VMOVAPSZ128mr */ |
| 88311 | 37352, |
| 88312 | /* VMOVAPSZ128mrk */ |
| 88313 | 37354, |
| 88314 | /* VMOVAPSZ128rm */ |
| 88315 | 37357, |
| 88316 | /* VMOVAPSZ128rmk */ |
| 88317 | 37359, |
| 88318 | /* VMOVAPSZ128rmkz */ |
| 88319 | 37363, |
| 88320 | /* VMOVAPSZ128rr */ |
| 88321 | 37366, |
| 88322 | /* VMOVAPSZ128rr_REV */ |
| 88323 | 37368, |
| 88324 | /* VMOVAPSZ128rrk */ |
| 88325 | 37370, |
| 88326 | /* VMOVAPSZ128rrk_REV */ |
| 88327 | 37374, |
| 88328 | /* VMOVAPSZ128rrkz */ |
| 88329 | 37377, |
| 88330 | /* VMOVAPSZ128rrkz_REV */ |
| 88331 | 37380, |
| 88332 | /* VMOVAPSZ256mr */ |
| 88333 | 37383, |
| 88334 | /* VMOVAPSZ256mrk */ |
| 88335 | 37385, |
| 88336 | /* VMOVAPSZ256rm */ |
| 88337 | 37388, |
| 88338 | /* VMOVAPSZ256rmk */ |
| 88339 | 37390, |
| 88340 | /* VMOVAPSZ256rmkz */ |
| 88341 | 37394, |
| 88342 | /* VMOVAPSZ256rr */ |
| 88343 | 37397, |
| 88344 | /* VMOVAPSZ256rr_REV */ |
| 88345 | 37399, |
| 88346 | /* VMOVAPSZ256rrk */ |
| 88347 | 37401, |
| 88348 | /* VMOVAPSZ256rrk_REV */ |
| 88349 | 37405, |
| 88350 | /* VMOVAPSZ256rrkz */ |
| 88351 | 37408, |
| 88352 | /* VMOVAPSZ256rrkz_REV */ |
| 88353 | 37411, |
| 88354 | /* VMOVAPSZmr */ |
| 88355 | 37414, |
| 88356 | /* VMOVAPSZmrk */ |
| 88357 | 37416, |
| 88358 | /* VMOVAPSZrm */ |
| 88359 | 37419, |
| 88360 | /* VMOVAPSZrmk */ |
| 88361 | 37421, |
| 88362 | /* VMOVAPSZrmkz */ |
| 88363 | 37425, |
| 88364 | /* VMOVAPSZrr */ |
| 88365 | 37428, |
| 88366 | /* VMOVAPSZrr_REV */ |
| 88367 | 37430, |
| 88368 | /* VMOVAPSZrrk */ |
| 88369 | 37432, |
| 88370 | /* VMOVAPSZrrk_REV */ |
| 88371 | 37436, |
| 88372 | /* VMOVAPSZrrkz */ |
| 88373 | 37439, |
| 88374 | /* VMOVAPSZrrkz_REV */ |
| 88375 | 37442, |
| 88376 | /* VMOVAPSmr */ |
| 88377 | 37445, |
| 88378 | /* VMOVAPSrm */ |
| 88379 | 37447, |
| 88380 | /* VMOVAPSrr */ |
| 88381 | 37449, |
| 88382 | /* VMOVAPSrr_REV */ |
| 88383 | 37451, |
| 88384 | /* VMOVDDUPYrm */ |
| 88385 | 37453, |
| 88386 | /* VMOVDDUPYrr */ |
| 88387 | 37455, |
| 88388 | /* VMOVDDUPZ128rm */ |
| 88389 | 37457, |
| 88390 | /* VMOVDDUPZ128rmk */ |
| 88391 | 37459, |
| 88392 | /* VMOVDDUPZ128rmkz */ |
| 88393 | 37463, |
| 88394 | /* VMOVDDUPZ128rr */ |
| 88395 | 37466, |
| 88396 | /* VMOVDDUPZ128rrk */ |
| 88397 | 37468, |
| 88398 | /* VMOVDDUPZ128rrkz */ |
| 88399 | 37472, |
| 88400 | /* VMOVDDUPZ256rm */ |
| 88401 | 37475, |
| 88402 | /* VMOVDDUPZ256rmk */ |
| 88403 | 37477, |
| 88404 | /* VMOVDDUPZ256rmkz */ |
| 88405 | 37481, |
| 88406 | /* VMOVDDUPZ256rr */ |
| 88407 | 37484, |
| 88408 | /* VMOVDDUPZ256rrk */ |
| 88409 | 37486, |
| 88410 | /* VMOVDDUPZ256rrkz */ |
| 88411 | 37490, |
| 88412 | /* VMOVDDUPZrm */ |
| 88413 | 37493, |
| 88414 | /* VMOVDDUPZrmk */ |
| 88415 | 37495, |
| 88416 | /* VMOVDDUPZrmkz */ |
| 88417 | 37499, |
| 88418 | /* VMOVDDUPZrr */ |
| 88419 | 37502, |
| 88420 | /* VMOVDDUPZrrk */ |
| 88421 | 37504, |
| 88422 | /* VMOVDDUPZrrkz */ |
| 88423 | 37508, |
| 88424 | /* VMOVDDUPrm */ |
| 88425 | 37511, |
| 88426 | /* VMOVDDUPrr */ |
| 88427 | 37513, |
| 88428 | /* VMOVDI2PDIZrm */ |
| 88429 | 37515, |
| 88430 | /* VMOVDI2PDIZrr */ |
| 88431 | 37517, |
| 88432 | /* VMOVDI2PDIrm */ |
| 88433 | 37519, |
| 88434 | /* VMOVDI2PDIrr */ |
| 88435 | 37521, |
| 88436 | /* VMOVDI2SSZrr */ |
| 88437 | 37523, |
| 88438 | /* VMOVDI2SSrr */ |
| 88439 | 37525, |
| 88440 | /* VMOVDQA32Z128mr */ |
| 88441 | 37527, |
| 88442 | /* VMOVDQA32Z128mrk */ |
| 88443 | 37529, |
| 88444 | /* VMOVDQA32Z128rm */ |
| 88445 | 37532, |
| 88446 | /* VMOVDQA32Z128rmk */ |
| 88447 | 37534, |
| 88448 | /* VMOVDQA32Z128rmkz */ |
| 88449 | 37538, |
| 88450 | /* VMOVDQA32Z128rr */ |
| 88451 | 37541, |
| 88452 | /* VMOVDQA32Z128rr_REV */ |
| 88453 | 37543, |
| 88454 | /* VMOVDQA32Z128rrk */ |
| 88455 | 37545, |
| 88456 | /* VMOVDQA32Z128rrk_REV */ |
| 88457 | 37549, |
| 88458 | /* VMOVDQA32Z128rrkz */ |
| 88459 | 37552, |
| 88460 | /* VMOVDQA32Z128rrkz_REV */ |
| 88461 | 37555, |
| 88462 | /* VMOVDQA32Z256mr */ |
| 88463 | 37558, |
| 88464 | /* VMOVDQA32Z256mrk */ |
| 88465 | 37560, |
| 88466 | /* VMOVDQA32Z256rm */ |
| 88467 | 37563, |
| 88468 | /* VMOVDQA32Z256rmk */ |
| 88469 | 37565, |
| 88470 | /* VMOVDQA32Z256rmkz */ |
| 88471 | 37569, |
| 88472 | /* VMOVDQA32Z256rr */ |
| 88473 | 37572, |
| 88474 | /* VMOVDQA32Z256rr_REV */ |
| 88475 | 37574, |
| 88476 | /* VMOVDQA32Z256rrk */ |
| 88477 | 37576, |
| 88478 | /* VMOVDQA32Z256rrk_REV */ |
| 88479 | 37580, |
| 88480 | /* VMOVDQA32Z256rrkz */ |
| 88481 | 37583, |
| 88482 | /* VMOVDQA32Z256rrkz_REV */ |
| 88483 | 37586, |
| 88484 | /* VMOVDQA32Zmr */ |
| 88485 | 37589, |
| 88486 | /* VMOVDQA32Zmrk */ |
| 88487 | 37591, |
| 88488 | /* VMOVDQA32Zrm */ |
| 88489 | 37594, |
| 88490 | /* VMOVDQA32Zrmk */ |
| 88491 | 37596, |
| 88492 | /* VMOVDQA32Zrmkz */ |
| 88493 | 37600, |
| 88494 | /* VMOVDQA32Zrr */ |
| 88495 | 37603, |
| 88496 | /* VMOVDQA32Zrr_REV */ |
| 88497 | 37605, |
| 88498 | /* VMOVDQA32Zrrk */ |
| 88499 | 37607, |
| 88500 | /* VMOVDQA32Zrrk_REV */ |
| 88501 | 37611, |
| 88502 | /* VMOVDQA32Zrrkz */ |
| 88503 | 37614, |
| 88504 | /* VMOVDQA32Zrrkz_REV */ |
| 88505 | 37617, |
| 88506 | /* VMOVDQA64Z128mr */ |
| 88507 | 37620, |
| 88508 | /* VMOVDQA64Z128mrk */ |
| 88509 | 37622, |
| 88510 | /* VMOVDQA64Z128rm */ |
| 88511 | 37625, |
| 88512 | /* VMOVDQA64Z128rmk */ |
| 88513 | 37627, |
| 88514 | /* VMOVDQA64Z128rmkz */ |
| 88515 | 37631, |
| 88516 | /* VMOVDQA64Z128rr */ |
| 88517 | 37634, |
| 88518 | /* VMOVDQA64Z128rr_REV */ |
| 88519 | 37636, |
| 88520 | /* VMOVDQA64Z128rrk */ |
| 88521 | 37638, |
| 88522 | /* VMOVDQA64Z128rrk_REV */ |
| 88523 | 37642, |
| 88524 | /* VMOVDQA64Z128rrkz */ |
| 88525 | 37645, |
| 88526 | /* VMOVDQA64Z128rrkz_REV */ |
| 88527 | 37648, |
| 88528 | /* VMOVDQA64Z256mr */ |
| 88529 | 37651, |
| 88530 | /* VMOVDQA64Z256mrk */ |
| 88531 | 37653, |
| 88532 | /* VMOVDQA64Z256rm */ |
| 88533 | 37656, |
| 88534 | /* VMOVDQA64Z256rmk */ |
| 88535 | 37658, |
| 88536 | /* VMOVDQA64Z256rmkz */ |
| 88537 | 37662, |
| 88538 | /* VMOVDQA64Z256rr */ |
| 88539 | 37665, |
| 88540 | /* VMOVDQA64Z256rr_REV */ |
| 88541 | 37667, |
| 88542 | /* VMOVDQA64Z256rrk */ |
| 88543 | 37669, |
| 88544 | /* VMOVDQA64Z256rrk_REV */ |
| 88545 | 37673, |
| 88546 | /* VMOVDQA64Z256rrkz */ |
| 88547 | 37676, |
| 88548 | /* VMOVDQA64Z256rrkz_REV */ |
| 88549 | 37679, |
| 88550 | /* VMOVDQA64Zmr */ |
| 88551 | 37682, |
| 88552 | /* VMOVDQA64Zmrk */ |
| 88553 | 37684, |
| 88554 | /* VMOVDQA64Zrm */ |
| 88555 | 37687, |
| 88556 | /* VMOVDQA64Zrmk */ |
| 88557 | 37689, |
| 88558 | /* VMOVDQA64Zrmkz */ |
| 88559 | 37693, |
| 88560 | /* VMOVDQA64Zrr */ |
| 88561 | 37696, |
| 88562 | /* VMOVDQA64Zrr_REV */ |
| 88563 | 37698, |
| 88564 | /* VMOVDQA64Zrrk */ |
| 88565 | 37700, |
| 88566 | /* VMOVDQA64Zrrk_REV */ |
| 88567 | 37704, |
| 88568 | /* VMOVDQA64Zrrkz */ |
| 88569 | 37707, |
| 88570 | /* VMOVDQA64Zrrkz_REV */ |
| 88571 | 37710, |
| 88572 | /* VMOVDQAYmr */ |
| 88573 | 37713, |
| 88574 | /* VMOVDQAYrm */ |
| 88575 | 37715, |
| 88576 | /* VMOVDQAYrr */ |
| 88577 | 37717, |
| 88578 | /* VMOVDQAYrr_REV */ |
| 88579 | 37719, |
| 88580 | /* VMOVDQAmr */ |
| 88581 | 37721, |
| 88582 | /* VMOVDQArm */ |
| 88583 | 37723, |
| 88584 | /* VMOVDQArr */ |
| 88585 | 37725, |
| 88586 | /* VMOVDQArr_REV */ |
| 88587 | 37727, |
| 88588 | /* VMOVDQU16Z128mr */ |
| 88589 | 37729, |
| 88590 | /* VMOVDQU16Z128mrk */ |
| 88591 | 37731, |
| 88592 | /* VMOVDQU16Z128rm */ |
| 88593 | 37734, |
| 88594 | /* VMOVDQU16Z128rmk */ |
| 88595 | 37736, |
| 88596 | /* VMOVDQU16Z128rmkz */ |
| 88597 | 37740, |
| 88598 | /* VMOVDQU16Z128rr */ |
| 88599 | 37743, |
| 88600 | /* VMOVDQU16Z128rr_REV */ |
| 88601 | 37745, |
| 88602 | /* VMOVDQU16Z128rrk */ |
| 88603 | 37747, |
| 88604 | /* VMOVDQU16Z128rrk_REV */ |
| 88605 | 37751, |
| 88606 | /* VMOVDQU16Z128rrkz */ |
| 88607 | 37754, |
| 88608 | /* VMOVDQU16Z128rrkz_REV */ |
| 88609 | 37757, |
| 88610 | /* VMOVDQU16Z256mr */ |
| 88611 | 37760, |
| 88612 | /* VMOVDQU16Z256mrk */ |
| 88613 | 37762, |
| 88614 | /* VMOVDQU16Z256rm */ |
| 88615 | 37765, |
| 88616 | /* VMOVDQU16Z256rmk */ |
| 88617 | 37767, |
| 88618 | /* VMOVDQU16Z256rmkz */ |
| 88619 | 37771, |
| 88620 | /* VMOVDQU16Z256rr */ |
| 88621 | 37774, |
| 88622 | /* VMOVDQU16Z256rr_REV */ |
| 88623 | 37776, |
| 88624 | /* VMOVDQU16Z256rrk */ |
| 88625 | 37778, |
| 88626 | /* VMOVDQU16Z256rrk_REV */ |
| 88627 | 37782, |
| 88628 | /* VMOVDQU16Z256rrkz */ |
| 88629 | 37785, |
| 88630 | /* VMOVDQU16Z256rrkz_REV */ |
| 88631 | 37788, |
| 88632 | /* VMOVDQU16Zmr */ |
| 88633 | 37791, |
| 88634 | /* VMOVDQU16Zmrk */ |
| 88635 | 37793, |
| 88636 | /* VMOVDQU16Zrm */ |
| 88637 | 37796, |
| 88638 | /* VMOVDQU16Zrmk */ |
| 88639 | 37798, |
| 88640 | /* VMOVDQU16Zrmkz */ |
| 88641 | 37802, |
| 88642 | /* VMOVDQU16Zrr */ |
| 88643 | 37805, |
| 88644 | /* VMOVDQU16Zrr_REV */ |
| 88645 | 37807, |
| 88646 | /* VMOVDQU16Zrrk */ |
| 88647 | 37809, |
| 88648 | /* VMOVDQU16Zrrk_REV */ |
| 88649 | 37813, |
| 88650 | /* VMOVDQU16Zrrkz */ |
| 88651 | 37816, |
| 88652 | /* VMOVDQU16Zrrkz_REV */ |
| 88653 | 37819, |
| 88654 | /* VMOVDQU32Z128mr */ |
| 88655 | 37822, |
| 88656 | /* VMOVDQU32Z128mrk */ |
| 88657 | 37824, |
| 88658 | /* VMOVDQU32Z128rm */ |
| 88659 | 37827, |
| 88660 | /* VMOVDQU32Z128rmk */ |
| 88661 | 37829, |
| 88662 | /* VMOVDQU32Z128rmkz */ |
| 88663 | 37833, |
| 88664 | /* VMOVDQU32Z128rr */ |
| 88665 | 37836, |
| 88666 | /* VMOVDQU32Z128rr_REV */ |
| 88667 | 37838, |
| 88668 | /* VMOVDQU32Z128rrk */ |
| 88669 | 37840, |
| 88670 | /* VMOVDQU32Z128rrk_REV */ |
| 88671 | 37844, |
| 88672 | /* VMOVDQU32Z128rrkz */ |
| 88673 | 37847, |
| 88674 | /* VMOVDQU32Z128rrkz_REV */ |
| 88675 | 37850, |
| 88676 | /* VMOVDQU32Z256mr */ |
| 88677 | 37853, |
| 88678 | /* VMOVDQU32Z256mrk */ |
| 88679 | 37855, |
| 88680 | /* VMOVDQU32Z256rm */ |
| 88681 | 37858, |
| 88682 | /* VMOVDQU32Z256rmk */ |
| 88683 | 37860, |
| 88684 | /* VMOVDQU32Z256rmkz */ |
| 88685 | 37864, |
| 88686 | /* VMOVDQU32Z256rr */ |
| 88687 | 37867, |
| 88688 | /* VMOVDQU32Z256rr_REV */ |
| 88689 | 37869, |
| 88690 | /* VMOVDQU32Z256rrk */ |
| 88691 | 37871, |
| 88692 | /* VMOVDQU32Z256rrk_REV */ |
| 88693 | 37875, |
| 88694 | /* VMOVDQU32Z256rrkz */ |
| 88695 | 37878, |
| 88696 | /* VMOVDQU32Z256rrkz_REV */ |
| 88697 | 37881, |
| 88698 | /* VMOVDQU32Zmr */ |
| 88699 | 37884, |
| 88700 | /* VMOVDQU32Zmrk */ |
| 88701 | 37886, |
| 88702 | /* VMOVDQU32Zrm */ |
| 88703 | 37889, |
| 88704 | /* VMOVDQU32Zrmk */ |
| 88705 | 37891, |
| 88706 | /* VMOVDQU32Zrmkz */ |
| 88707 | 37895, |
| 88708 | /* VMOVDQU32Zrr */ |
| 88709 | 37898, |
| 88710 | /* VMOVDQU32Zrr_REV */ |
| 88711 | 37900, |
| 88712 | /* VMOVDQU32Zrrk */ |
| 88713 | 37902, |
| 88714 | /* VMOVDQU32Zrrk_REV */ |
| 88715 | 37906, |
| 88716 | /* VMOVDQU32Zrrkz */ |
| 88717 | 37909, |
| 88718 | /* VMOVDQU32Zrrkz_REV */ |
| 88719 | 37912, |
| 88720 | /* VMOVDQU64Z128mr */ |
| 88721 | 37915, |
| 88722 | /* VMOVDQU64Z128mrk */ |
| 88723 | 37917, |
| 88724 | /* VMOVDQU64Z128rm */ |
| 88725 | 37920, |
| 88726 | /* VMOVDQU64Z128rmk */ |
| 88727 | 37922, |
| 88728 | /* VMOVDQU64Z128rmkz */ |
| 88729 | 37926, |
| 88730 | /* VMOVDQU64Z128rr */ |
| 88731 | 37929, |
| 88732 | /* VMOVDQU64Z128rr_REV */ |
| 88733 | 37931, |
| 88734 | /* VMOVDQU64Z128rrk */ |
| 88735 | 37933, |
| 88736 | /* VMOVDQU64Z128rrk_REV */ |
| 88737 | 37937, |
| 88738 | /* VMOVDQU64Z128rrkz */ |
| 88739 | 37940, |
| 88740 | /* VMOVDQU64Z128rrkz_REV */ |
| 88741 | 37943, |
| 88742 | /* VMOVDQU64Z256mr */ |
| 88743 | 37946, |
| 88744 | /* VMOVDQU64Z256mrk */ |
| 88745 | 37948, |
| 88746 | /* VMOVDQU64Z256rm */ |
| 88747 | 37951, |
| 88748 | /* VMOVDQU64Z256rmk */ |
| 88749 | 37953, |
| 88750 | /* VMOVDQU64Z256rmkz */ |
| 88751 | 37957, |
| 88752 | /* VMOVDQU64Z256rr */ |
| 88753 | 37960, |
| 88754 | /* VMOVDQU64Z256rr_REV */ |
| 88755 | 37962, |
| 88756 | /* VMOVDQU64Z256rrk */ |
| 88757 | 37964, |
| 88758 | /* VMOVDQU64Z256rrk_REV */ |
| 88759 | 37968, |
| 88760 | /* VMOVDQU64Z256rrkz */ |
| 88761 | 37971, |
| 88762 | /* VMOVDQU64Z256rrkz_REV */ |
| 88763 | 37974, |
| 88764 | /* VMOVDQU64Zmr */ |
| 88765 | 37977, |
| 88766 | /* VMOVDQU64Zmrk */ |
| 88767 | 37979, |
| 88768 | /* VMOVDQU64Zrm */ |
| 88769 | 37982, |
| 88770 | /* VMOVDQU64Zrmk */ |
| 88771 | 37984, |
| 88772 | /* VMOVDQU64Zrmkz */ |
| 88773 | 37988, |
| 88774 | /* VMOVDQU64Zrr */ |
| 88775 | 37991, |
| 88776 | /* VMOVDQU64Zrr_REV */ |
| 88777 | 37993, |
| 88778 | /* VMOVDQU64Zrrk */ |
| 88779 | 37995, |
| 88780 | /* VMOVDQU64Zrrk_REV */ |
| 88781 | 37999, |
| 88782 | /* VMOVDQU64Zrrkz */ |
| 88783 | 38002, |
| 88784 | /* VMOVDQU64Zrrkz_REV */ |
| 88785 | 38005, |
| 88786 | /* VMOVDQU8Z128mr */ |
| 88787 | 38008, |
| 88788 | /* VMOVDQU8Z128mrk */ |
| 88789 | 38010, |
| 88790 | /* VMOVDQU8Z128rm */ |
| 88791 | 38013, |
| 88792 | /* VMOVDQU8Z128rmk */ |
| 88793 | 38015, |
| 88794 | /* VMOVDQU8Z128rmkz */ |
| 88795 | 38019, |
| 88796 | /* VMOVDQU8Z128rr */ |
| 88797 | 38022, |
| 88798 | /* VMOVDQU8Z128rr_REV */ |
| 88799 | 38024, |
| 88800 | /* VMOVDQU8Z128rrk */ |
| 88801 | 38026, |
| 88802 | /* VMOVDQU8Z128rrk_REV */ |
| 88803 | 38030, |
| 88804 | /* VMOVDQU8Z128rrkz */ |
| 88805 | 38033, |
| 88806 | /* VMOVDQU8Z128rrkz_REV */ |
| 88807 | 38036, |
| 88808 | /* VMOVDQU8Z256mr */ |
| 88809 | 38039, |
| 88810 | /* VMOVDQU8Z256mrk */ |
| 88811 | 38041, |
| 88812 | /* VMOVDQU8Z256rm */ |
| 88813 | 38044, |
| 88814 | /* VMOVDQU8Z256rmk */ |
| 88815 | 38046, |
| 88816 | /* VMOVDQU8Z256rmkz */ |
| 88817 | 38050, |
| 88818 | /* VMOVDQU8Z256rr */ |
| 88819 | 38053, |
| 88820 | /* VMOVDQU8Z256rr_REV */ |
| 88821 | 38055, |
| 88822 | /* VMOVDQU8Z256rrk */ |
| 88823 | 38057, |
| 88824 | /* VMOVDQU8Z256rrk_REV */ |
| 88825 | 38061, |
| 88826 | /* VMOVDQU8Z256rrkz */ |
| 88827 | 38064, |
| 88828 | /* VMOVDQU8Z256rrkz_REV */ |
| 88829 | 38067, |
| 88830 | /* VMOVDQU8Zmr */ |
| 88831 | 38070, |
| 88832 | /* VMOVDQU8Zmrk */ |
| 88833 | 38072, |
| 88834 | /* VMOVDQU8Zrm */ |
| 88835 | 38075, |
| 88836 | /* VMOVDQU8Zrmk */ |
| 88837 | 38077, |
| 88838 | /* VMOVDQU8Zrmkz */ |
| 88839 | 38081, |
| 88840 | /* VMOVDQU8Zrr */ |
| 88841 | 38084, |
| 88842 | /* VMOVDQU8Zrr_REV */ |
| 88843 | 38086, |
| 88844 | /* VMOVDQU8Zrrk */ |
| 88845 | 38088, |
| 88846 | /* VMOVDQU8Zrrk_REV */ |
| 88847 | 38092, |
| 88848 | /* VMOVDQU8Zrrkz */ |
| 88849 | 38095, |
| 88850 | /* VMOVDQU8Zrrkz_REV */ |
| 88851 | 38098, |
| 88852 | /* VMOVDQUYmr */ |
| 88853 | 38101, |
| 88854 | /* VMOVDQUYrm */ |
| 88855 | 38103, |
| 88856 | /* VMOVDQUYrr */ |
| 88857 | 38105, |
| 88858 | /* VMOVDQUYrr_REV */ |
| 88859 | 38107, |
| 88860 | /* VMOVDQUmr */ |
| 88861 | 38109, |
| 88862 | /* VMOVDQUrm */ |
| 88863 | 38111, |
| 88864 | /* VMOVDQUrr */ |
| 88865 | 38113, |
| 88866 | /* VMOVDQUrr_REV */ |
| 88867 | 38115, |
| 88868 | /* VMOVHLPSZrr */ |
| 88869 | 38117, |
| 88870 | /* VMOVHLPSrr */ |
| 88871 | 38120, |
| 88872 | /* VMOVHPDZ128mr */ |
| 88873 | 38123, |
| 88874 | /* VMOVHPDZ128rm */ |
| 88875 | 38125, |
| 88876 | /* VMOVHPDmr */ |
| 88877 | 38128, |
| 88878 | /* VMOVHPDrm */ |
| 88879 | 38130, |
| 88880 | /* VMOVHPSZ128mr */ |
| 88881 | 38133, |
| 88882 | /* VMOVHPSZ128rm */ |
| 88883 | 38135, |
| 88884 | /* VMOVHPSmr */ |
| 88885 | 38138, |
| 88886 | /* VMOVHPSrm */ |
| 88887 | 38140, |
| 88888 | /* VMOVLHPSZrr */ |
| 88889 | 38143, |
| 88890 | /* VMOVLHPSrr */ |
| 88891 | 38146, |
| 88892 | /* VMOVLPDZ128mr */ |
| 88893 | 38149, |
| 88894 | /* VMOVLPDZ128rm */ |
| 88895 | 38151, |
| 88896 | /* VMOVLPDmr */ |
| 88897 | 38154, |
| 88898 | /* VMOVLPDrm */ |
| 88899 | 38156, |
| 88900 | /* VMOVLPSZ128mr */ |
| 88901 | 38159, |
| 88902 | /* VMOVLPSZ128rm */ |
| 88903 | 38161, |
| 88904 | /* VMOVLPSmr */ |
| 88905 | 38164, |
| 88906 | /* VMOVLPSrm */ |
| 88907 | 38166, |
| 88908 | /* VMOVMSKPDYrr */ |
| 88909 | 38169, |
| 88910 | /* VMOVMSKPDrr */ |
| 88911 | 38171, |
| 88912 | /* VMOVMSKPSYrr */ |
| 88913 | 38173, |
| 88914 | /* VMOVMSKPSrr */ |
| 88915 | 38175, |
| 88916 | /* VMOVNTDQAYrm */ |
| 88917 | 38177, |
| 88918 | /* VMOVNTDQAZ128rm */ |
| 88919 | 38179, |
| 88920 | /* VMOVNTDQAZ256rm */ |
| 88921 | 38181, |
| 88922 | /* VMOVNTDQAZrm */ |
| 88923 | 38183, |
| 88924 | /* VMOVNTDQArm */ |
| 88925 | 38185, |
| 88926 | /* VMOVNTDQYmr */ |
| 88927 | 38187, |
| 88928 | /* VMOVNTDQZ128mr */ |
| 88929 | 38189, |
| 88930 | /* VMOVNTDQZ256mr */ |
| 88931 | 38191, |
| 88932 | /* VMOVNTDQZmr */ |
| 88933 | 38193, |
| 88934 | /* VMOVNTDQmr */ |
| 88935 | 38195, |
| 88936 | /* VMOVNTPDYmr */ |
| 88937 | 38197, |
| 88938 | /* VMOVNTPDZ128mr */ |
| 88939 | 38199, |
| 88940 | /* VMOVNTPDZ256mr */ |
| 88941 | 38201, |
| 88942 | /* VMOVNTPDZmr */ |
| 88943 | 38203, |
| 88944 | /* VMOVNTPDmr */ |
| 88945 | 38205, |
| 88946 | /* VMOVNTPSYmr */ |
| 88947 | 38207, |
| 88948 | /* VMOVNTPSZ128mr */ |
| 88949 | 38209, |
| 88950 | /* VMOVNTPSZ256mr */ |
| 88951 | 38211, |
| 88952 | /* VMOVNTPSZmr */ |
| 88953 | 38213, |
| 88954 | /* VMOVNTPSmr */ |
| 88955 | 38215, |
| 88956 | /* VMOVPDI2DIZmr */ |
| 88957 | 38217, |
| 88958 | /* VMOVPDI2DIZrr */ |
| 88959 | 38219, |
| 88960 | /* VMOVPDI2DImr */ |
| 88961 | 38221, |
| 88962 | /* VMOVPDI2DIrr */ |
| 88963 | 38223, |
| 88964 | /* VMOVPQI2QIZmr */ |
| 88965 | 38225, |
| 88966 | /* VMOVPQI2QIZrr */ |
| 88967 | 38227, |
| 88968 | /* VMOVPQI2QImr */ |
| 88969 | 38229, |
| 88970 | /* VMOVPQI2QIrr */ |
| 88971 | 38231, |
| 88972 | /* VMOVPQIto64Zmr */ |
| 88973 | 38233, |
| 88974 | /* VMOVPQIto64Zrr */ |
| 88975 | 38235, |
| 88976 | /* VMOVPQIto64mr */ |
| 88977 | 38237, |
| 88978 | /* VMOVPQIto64rr */ |
| 88979 | 38239, |
| 88980 | /* VMOVQI2PQIZrm */ |
| 88981 | 38241, |
| 88982 | /* VMOVQI2PQIrm */ |
| 88983 | 38243, |
| 88984 | /* VMOVSDZmr */ |
| 88985 | 38245, |
| 88986 | /* VMOVSDZmrk */ |
| 88987 | 38247, |
| 88988 | /* VMOVSDZrm */ |
| 88989 | 38250, |
| 88990 | /* VMOVSDZrm_alt */ |
| 88991 | 38252, |
| 88992 | /* VMOVSDZrmk */ |
| 88993 | 38254, |
| 88994 | /* VMOVSDZrmkz */ |
| 88995 | 38258, |
| 88996 | /* VMOVSDZrr */ |
| 88997 | 38261, |
| 88998 | /* VMOVSDZrr_REV */ |
| 88999 | 38264, |
| 89000 | /* VMOVSDZrrk */ |
| 89001 | 38267, |
| 89002 | /* VMOVSDZrrk_REV */ |
| 89003 | 38272, |
| 89004 | /* VMOVSDZrrkz */ |
| 89005 | 38277, |
| 89006 | /* VMOVSDZrrkz_REV */ |
| 89007 | 38281, |
| 89008 | /* VMOVSDmr */ |
| 89009 | 38285, |
| 89010 | /* VMOVSDrm */ |
| 89011 | 38287, |
| 89012 | /* VMOVSDrm_alt */ |
| 89013 | 38289, |
| 89014 | /* VMOVSDrr */ |
| 89015 | 38291, |
| 89016 | /* VMOVSDrr_REV */ |
| 89017 | 38294, |
| 89018 | /* VMOVSDto64Zrr */ |
| 89019 | 38297, |
| 89020 | /* VMOVSDto64rr */ |
| 89021 | 38299, |
| 89022 | /* VMOVSH2Wrr */ |
| 89023 | 38301, |
| 89024 | /* VMOVSHDUPYrm */ |
| 89025 | 38303, |
| 89026 | /* VMOVSHDUPYrr */ |
| 89027 | 38305, |
| 89028 | /* VMOVSHDUPZ128rm */ |
| 89029 | 38307, |
| 89030 | /* VMOVSHDUPZ128rmk */ |
| 89031 | 38309, |
| 89032 | /* VMOVSHDUPZ128rmkz */ |
| 89033 | 38313, |
| 89034 | /* VMOVSHDUPZ128rr */ |
| 89035 | 38316, |
| 89036 | /* VMOVSHDUPZ128rrk */ |
| 89037 | 38318, |
| 89038 | /* VMOVSHDUPZ128rrkz */ |
| 89039 | 38322, |
| 89040 | /* VMOVSHDUPZ256rm */ |
| 89041 | 38325, |
| 89042 | /* VMOVSHDUPZ256rmk */ |
| 89043 | 38327, |
| 89044 | /* VMOVSHDUPZ256rmkz */ |
| 89045 | 38331, |
| 89046 | /* VMOVSHDUPZ256rr */ |
| 89047 | 38334, |
| 89048 | /* VMOVSHDUPZ256rrk */ |
| 89049 | 38336, |
| 89050 | /* VMOVSHDUPZ256rrkz */ |
| 89051 | 38340, |
| 89052 | /* VMOVSHDUPZrm */ |
| 89053 | 38343, |
| 89054 | /* VMOVSHDUPZrmk */ |
| 89055 | 38345, |
| 89056 | /* VMOVSHDUPZrmkz */ |
| 89057 | 38349, |
| 89058 | /* VMOVSHDUPZrr */ |
| 89059 | 38352, |
| 89060 | /* VMOVSHDUPZrrk */ |
| 89061 | 38354, |
| 89062 | /* VMOVSHDUPZrrkz */ |
| 89063 | 38358, |
| 89064 | /* VMOVSHDUPrm */ |
| 89065 | 38361, |
| 89066 | /* VMOVSHDUPrr */ |
| 89067 | 38363, |
| 89068 | /* VMOVSHZmr */ |
| 89069 | 38365, |
| 89070 | /* VMOVSHZmrk */ |
| 89071 | 38367, |
| 89072 | /* VMOVSHZrm */ |
| 89073 | 38370, |
| 89074 | /* VMOVSHZrm_alt */ |
| 89075 | 38372, |
| 89076 | /* VMOVSHZrmk */ |
| 89077 | 38374, |
| 89078 | /* VMOVSHZrmkz */ |
| 89079 | 38378, |
| 89080 | /* VMOVSHZrr */ |
| 89081 | 38381, |
| 89082 | /* VMOVSHZrr_REV */ |
| 89083 | 38384, |
| 89084 | /* VMOVSHZrrk */ |
| 89085 | 38387, |
| 89086 | /* VMOVSHZrrk_REV */ |
| 89087 | 38392, |
| 89088 | /* VMOVSHZrrkz */ |
| 89089 | 38397, |
| 89090 | /* VMOVSHZrrkz_REV */ |
| 89091 | 38401, |
| 89092 | /* VMOVSHtoW64rr */ |
| 89093 | 38405, |
| 89094 | /* VMOVSLDUPYrm */ |
| 89095 | 38407, |
| 89096 | /* VMOVSLDUPYrr */ |
| 89097 | 38409, |
| 89098 | /* VMOVSLDUPZ128rm */ |
| 89099 | 38411, |
| 89100 | /* VMOVSLDUPZ128rmk */ |
| 89101 | 38413, |
| 89102 | /* VMOVSLDUPZ128rmkz */ |
| 89103 | 38417, |
| 89104 | /* VMOVSLDUPZ128rr */ |
| 89105 | 38420, |
| 89106 | /* VMOVSLDUPZ128rrk */ |
| 89107 | 38422, |
| 89108 | /* VMOVSLDUPZ128rrkz */ |
| 89109 | 38426, |
| 89110 | /* VMOVSLDUPZ256rm */ |
| 89111 | 38429, |
| 89112 | /* VMOVSLDUPZ256rmk */ |
| 89113 | 38431, |
| 89114 | /* VMOVSLDUPZ256rmkz */ |
| 89115 | 38435, |
| 89116 | /* VMOVSLDUPZ256rr */ |
| 89117 | 38438, |
| 89118 | /* VMOVSLDUPZ256rrk */ |
| 89119 | 38440, |
| 89120 | /* VMOVSLDUPZ256rrkz */ |
| 89121 | 38444, |
| 89122 | /* VMOVSLDUPZrm */ |
| 89123 | 38447, |
| 89124 | /* VMOVSLDUPZrmk */ |
| 89125 | 38449, |
| 89126 | /* VMOVSLDUPZrmkz */ |
| 89127 | 38453, |
| 89128 | /* VMOVSLDUPZrr */ |
| 89129 | 38456, |
| 89130 | /* VMOVSLDUPZrrk */ |
| 89131 | 38458, |
| 89132 | /* VMOVSLDUPZrrkz */ |
| 89133 | 38462, |
| 89134 | /* VMOVSLDUPrm */ |
| 89135 | 38465, |
| 89136 | /* VMOVSLDUPrr */ |
| 89137 | 38467, |
| 89138 | /* VMOVSS2DIZrr */ |
| 89139 | 38469, |
| 89140 | /* VMOVSS2DIrr */ |
| 89141 | 38471, |
| 89142 | /* VMOVSSZmr */ |
| 89143 | 38473, |
| 89144 | /* VMOVSSZmrk */ |
| 89145 | 38475, |
| 89146 | /* VMOVSSZrm */ |
| 89147 | 38478, |
| 89148 | /* VMOVSSZrm_alt */ |
| 89149 | 38480, |
| 89150 | /* VMOVSSZrmk */ |
| 89151 | 38482, |
| 89152 | /* VMOVSSZrmkz */ |
| 89153 | 38486, |
| 89154 | /* VMOVSSZrr */ |
| 89155 | 38489, |
| 89156 | /* VMOVSSZrr_REV */ |
| 89157 | 38492, |
| 89158 | /* VMOVSSZrrk */ |
| 89159 | 38495, |
| 89160 | /* VMOVSSZrrk_REV */ |
| 89161 | 38500, |
| 89162 | /* VMOVSSZrrkz */ |
| 89163 | 38505, |
| 89164 | /* VMOVSSZrrkz_REV */ |
| 89165 | 38509, |
| 89166 | /* VMOVSSmr */ |
| 89167 | 38513, |
| 89168 | /* VMOVSSrm */ |
| 89169 | 38515, |
| 89170 | /* VMOVSSrm_alt */ |
| 89171 | 38517, |
| 89172 | /* VMOVSSrr */ |
| 89173 | 38519, |
| 89174 | /* VMOVSSrr_REV */ |
| 89175 | 38522, |
| 89176 | /* VMOVUPDYmr */ |
| 89177 | 38525, |
| 89178 | /* VMOVUPDYrm */ |
| 89179 | 38527, |
| 89180 | /* VMOVUPDYrr */ |
| 89181 | 38529, |
| 89182 | /* VMOVUPDYrr_REV */ |
| 89183 | 38531, |
| 89184 | /* VMOVUPDZ128mr */ |
| 89185 | 38533, |
| 89186 | /* VMOVUPDZ128mrk */ |
| 89187 | 38535, |
| 89188 | /* VMOVUPDZ128rm */ |
| 89189 | 38538, |
| 89190 | /* VMOVUPDZ128rmk */ |
| 89191 | 38540, |
| 89192 | /* VMOVUPDZ128rmkz */ |
| 89193 | 38544, |
| 89194 | /* VMOVUPDZ128rr */ |
| 89195 | 38547, |
| 89196 | /* VMOVUPDZ128rr_REV */ |
| 89197 | 38549, |
| 89198 | /* VMOVUPDZ128rrk */ |
| 89199 | 38551, |
| 89200 | /* VMOVUPDZ128rrk_REV */ |
| 89201 | 38555, |
| 89202 | /* VMOVUPDZ128rrkz */ |
| 89203 | 38558, |
| 89204 | /* VMOVUPDZ128rrkz_REV */ |
| 89205 | 38561, |
| 89206 | /* VMOVUPDZ256mr */ |
| 89207 | 38564, |
| 89208 | /* VMOVUPDZ256mrk */ |
| 89209 | 38566, |
| 89210 | /* VMOVUPDZ256rm */ |
| 89211 | 38569, |
| 89212 | /* VMOVUPDZ256rmk */ |
| 89213 | 38571, |
| 89214 | /* VMOVUPDZ256rmkz */ |
| 89215 | 38575, |
| 89216 | /* VMOVUPDZ256rr */ |
| 89217 | 38578, |
| 89218 | /* VMOVUPDZ256rr_REV */ |
| 89219 | 38580, |
| 89220 | /* VMOVUPDZ256rrk */ |
| 89221 | 38582, |
| 89222 | /* VMOVUPDZ256rrk_REV */ |
| 89223 | 38586, |
| 89224 | /* VMOVUPDZ256rrkz */ |
| 89225 | 38589, |
| 89226 | /* VMOVUPDZ256rrkz_REV */ |
| 89227 | 38592, |
| 89228 | /* VMOVUPDZmr */ |
| 89229 | 38595, |
| 89230 | /* VMOVUPDZmrk */ |
| 89231 | 38597, |
| 89232 | /* VMOVUPDZrm */ |
| 89233 | 38600, |
| 89234 | /* VMOVUPDZrmk */ |
| 89235 | 38602, |
| 89236 | /* VMOVUPDZrmkz */ |
| 89237 | 38606, |
| 89238 | /* VMOVUPDZrr */ |
| 89239 | 38609, |
| 89240 | /* VMOVUPDZrr_REV */ |
| 89241 | 38611, |
| 89242 | /* VMOVUPDZrrk */ |
| 89243 | 38613, |
| 89244 | /* VMOVUPDZrrk_REV */ |
| 89245 | 38617, |
| 89246 | /* VMOVUPDZrrkz */ |
| 89247 | 38620, |
| 89248 | /* VMOVUPDZrrkz_REV */ |
| 89249 | 38623, |
| 89250 | /* VMOVUPDmr */ |
| 89251 | 38626, |
| 89252 | /* VMOVUPDrm */ |
| 89253 | 38628, |
| 89254 | /* VMOVUPDrr */ |
| 89255 | 38630, |
| 89256 | /* VMOVUPDrr_REV */ |
| 89257 | 38632, |
| 89258 | /* VMOVUPSYmr */ |
| 89259 | 38634, |
| 89260 | /* VMOVUPSYrm */ |
| 89261 | 38636, |
| 89262 | /* VMOVUPSYrr */ |
| 89263 | 38638, |
| 89264 | /* VMOVUPSYrr_REV */ |
| 89265 | 38640, |
| 89266 | /* VMOVUPSZ128mr */ |
| 89267 | 38642, |
| 89268 | /* VMOVUPSZ128mrk */ |
| 89269 | 38644, |
| 89270 | /* VMOVUPSZ128rm */ |
| 89271 | 38647, |
| 89272 | /* VMOVUPSZ128rmk */ |
| 89273 | 38649, |
| 89274 | /* VMOVUPSZ128rmkz */ |
| 89275 | 38653, |
| 89276 | /* VMOVUPSZ128rr */ |
| 89277 | 38656, |
| 89278 | /* VMOVUPSZ128rr_REV */ |
| 89279 | 38658, |
| 89280 | /* VMOVUPSZ128rrk */ |
| 89281 | 38660, |
| 89282 | /* VMOVUPSZ128rrk_REV */ |
| 89283 | 38664, |
| 89284 | /* VMOVUPSZ128rrkz */ |
| 89285 | 38667, |
| 89286 | /* VMOVUPSZ128rrkz_REV */ |
| 89287 | 38670, |
| 89288 | /* VMOVUPSZ256mr */ |
| 89289 | 38673, |
| 89290 | /* VMOVUPSZ256mrk */ |
| 89291 | 38675, |
| 89292 | /* VMOVUPSZ256rm */ |
| 89293 | 38678, |
| 89294 | /* VMOVUPSZ256rmk */ |
| 89295 | 38680, |
| 89296 | /* VMOVUPSZ256rmkz */ |
| 89297 | 38684, |
| 89298 | /* VMOVUPSZ256rr */ |
| 89299 | 38687, |
| 89300 | /* VMOVUPSZ256rr_REV */ |
| 89301 | 38689, |
| 89302 | /* VMOVUPSZ256rrk */ |
| 89303 | 38691, |
| 89304 | /* VMOVUPSZ256rrk_REV */ |
| 89305 | 38695, |
| 89306 | /* VMOVUPSZ256rrkz */ |
| 89307 | 38698, |
| 89308 | /* VMOVUPSZ256rrkz_REV */ |
| 89309 | 38701, |
| 89310 | /* VMOVUPSZmr */ |
| 89311 | 38704, |
| 89312 | /* VMOVUPSZmrk */ |
| 89313 | 38706, |
| 89314 | /* VMOVUPSZrm */ |
| 89315 | 38709, |
| 89316 | /* VMOVUPSZrmk */ |
| 89317 | 38711, |
| 89318 | /* VMOVUPSZrmkz */ |
| 89319 | 38715, |
| 89320 | /* VMOVUPSZrr */ |
| 89321 | 38718, |
| 89322 | /* VMOVUPSZrr_REV */ |
| 89323 | 38720, |
| 89324 | /* VMOVUPSZrrk */ |
| 89325 | 38722, |
| 89326 | /* VMOVUPSZrrk_REV */ |
| 89327 | 38726, |
| 89328 | /* VMOVUPSZrrkz */ |
| 89329 | 38729, |
| 89330 | /* VMOVUPSZrrkz_REV */ |
| 89331 | 38732, |
| 89332 | /* VMOVUPSmr */ |
| 89333 | 38735, |
| 89334 | /* VMOVUPSrm */ |
| 89335 | 38737, |
| 89336 | /* VMOVUPSrr */ |
| 89337 | 38739, |
| 89338 | /* VMOVUPSrr_REV */ |
| 89339 | 38741, |
| 89340 | /* VMOVW2SHrr */ |
| 89341 | 38743, |
| 89342 | /* VMOVW64toSHrr */ |
| 89343 | 38745, |
| 89344 | /* VMOVWmr */ |
| 89345 | 38747, |
| 89346 | /* VMOVWrm */ |
| 89347 | 38749, |
| 89348 | /* VMOVZPQILo2PQIZrr */ |
| 89349 | 38751, |
| 89350 | /* VMOVZPQILo2PQIrr */ |
| 89351 | 38753, |
| 89352 | /* VMPSADBWYrmi */ |
| 89353 | 38755, |
| 89354 | /* VMPSADBWYrri */ |
| 89355 | 38759, |
| 89356 | /* VMPSADBWrmi */ |
| 89357 | 38763, |
| 89358 | /* VMPSADBWrri */ |
| 89359 | 38767, |
| 89360 | /* VMPTRLDm */ |
| 89361 | 38771, |
| 89362 | /* VMPTRSTm */ |
| 89363 | 38772, |
| 89364 | /* VMREAD32mr */ |
| 89365 | 38773, |
| 89366 | /* VMREAD32rr */ |
| 89367 | 38775, |
| 89368 | /* VMREAD64mr */ |
| 89369 | 38777, |
| 89370 | /* VMREAD64rr */ |
| 89371 | 38779, |
| 89372 | /* VMRESUME */ |
| 89373 | 38781, |
| 89374 | /* VMRUN32 */ |
| 89375 | 38781, |
| 89376 | /* VMRUN64 */ |
| 89377 | 38781, |
| 89378 | /* VMSAVE32 */ |
| 89379 | 38781, |
| 89380 | /* VMSAVE64 */ |
| 89381 | 38781, |
| 89382 | /* VMULPDYrm */ |
| 89383 | 38781, |
| 89384 | /* VMULPDYrr */ |
| 89385 | 38784, |
| 89386 | /* VMULPDZ128rm */ |
| 89387 | 38787, |
| 89388 | /* VMULPDZ128rmb */ |
| 89389 | 38790, |
| 89390 | /* VMULPDZ128rmbk */ |
| 89391 | 38793, |
| 89392 | /* VMULPDZ128rmbkz */ |
| 89393 | 38798, |
| 89394 | /* VMULPDZ128rmk */ |
| 89395 | 38802, |
| 89396 | /* VMULPDZ128rmkz */ |
| 89397 | 38807, |
| 89398 | /* VMULPDZ128rr */ |
| 89399 | 38811, |
| 89400 | /* VMULPDZ128rrk */ |
| 89401 | 38814, |
| 89402 | /* VMULPDZ128rrkz */ |
| 89403 | 38819, |
| 89404 | /* VMULPDZ256rm */ |
| 89405 | 38823, |
| 89406 | /* VMULPDZ256rmb */ |
| 89407 | 38826, |
| 89408 | /* VMULPDZ256rmbk */ |
| 89409 | 38829, |
| 89410 | /* VMULPDZ256rmbkz */ |
| 89411 | 38834, |
| 89412 | /* VMULPDZ256rmk */ |
| 89413 | 38838, |
| 89414 | /* VMULPDZ256rmkz */ |
| 89415 | 38843, |
| 89416 | /* VMULPDZ256rr */ |
| 89417 | 38847, |
| 89418 | /* VMULPDZ256rrk */ |
| 89419 | 38850, |
| 89420 | /* VMULPDZ256rrkz */ |
| 89421 | 38855, |
| 89422 | /* VMULPDZrm */ |
| 89423 | 38859, |
| 89424 | /* VMULPDZrmb */ |
| 89425 | 38862, |
| 89426 | /* VMULPDZrmbk */ |
| 89427 | 38865, |
| 89428 | /* VMULPDZrmbkz */ |
| 89429 | 38870, |
| 89430 | /* VMULPDZrmk */ |
| 89431 | 38874, |
| 89432 | /* VMULPDZrmkz */ |
| 89433 | 38879, |
| 89434 | /* VMULPDZrr */ |
| 89435 | 38883, |
| 89436 | /* VMULPDZrrb */ |
| 89437 | 38886, |
| 89438 | /* VMULPDZrrbk */ |
| 89439 | 38890, |
| 89440 | /* VMULPDZrrbkz */ |
| 89441 | 38896, |
| 89442 | /* VMULPDZrrk */ |
| 89443 | 38901, |
| 89444 | /* VMULPDZrrkz */ |
| 89445 | 38906, |
| 89446 | /* VMULPDrm */ |
| 89447 | 38910, |
| 89448 | /* VMULPDrr */ |
| 89449 | 38913, |
| 89450 | /* VMULPHZ128rm */ |
| 89451 | 38916, |
| 89452 | /* VMULPHZ128rmb */ |
| 89453 | 38919, |
| 89454 | /* VMULPHZ128rmbk */ |
| 89455 | 38922, |
| 89456 | /* VMULPHZ128rmbkz */ |
| 89457 | 38927, |
| 89458 | /* VMULPHZ128rmk */ |
| 89459 | 38931, |
| 89460 | /* VMULPHZ128rmkz */ |
| 89461 | 38936, |
| 89462 | /* VMULPHZ128rr */ |
| 89463 | 38940, |
| 89464 | /* VMULPHZ128rrk */ |
| 89465 | 38943, |
| 89466 | /* VMULPHZ128rrkz */ |
| 89467 | 38948, |
| 89468 | /* VMULPHZ256rm */ |
| 89469 | 38952, |
| 89470 | /* VMULPHZ256rmb */ |
| 89471 | 38955, |
| 89472 | /* VMULPHZ256rmbk */ |
| 89473 | 38958, |
| 89474 | /* VMULPHZ256rmbkz */ |
| 89475 | 38963, |
| 89476 | /* VMULPHZ256rmk */ |
| 89477 | 38967, |
| 89478 | /* VMULPHZ256rmkz */ |
| 89479 | 38972, |
| 89480 | /* VMULPHZ256rr */ |
| 89481 | 38976, |
| 89482 | /* VMULPHZ256rrk */ |
| 89483 | 38979, |
| 89484 | /* VMULPHZ256rrkz */ |
| 89485 | 38984, |
| 89486 | /* VMULPHZrm */ |
| 89487 | 38988, |
| 89488 | /* VMULPHZrmb */ |
| 89489 | 38991, |
| 89490 | /* VMULPHZrmbk */ |
| 89491 | 38994, |
| 89492 | /* VMULPHZrmbkz */ |
| 89493 | 38999, |
| 89494 | /* VMULPHZrmk */ |
| 89495 | 39003, |
| 89496 | /* VMULPHZrmkz */ |
| 89497 | 39008, |
| 89498 | /* VMULPHZrr */ |
| 89499 | 39012, |
| 89500 | /* VMULPHZrrb */ |
| 89501 | 39015, |
| 89502 | /* VMULPHZrrbk */ |
| 89503 | 39019, |
| 89504 | /* VMULPHZrrbkz */ |
| 89505 | 39025, |
| 89506 | /* VMULPHZrrk */ |
| 89507 | 39030, |
| 89508 | /* VMULPHZrrkz */ |
| 89509 | 39035, |
| 89510 | /* VMULPSYrm */ |
| 89511 | 39039, |
| 89512 | /* VMULPSYrr */ |
| 89513 | 39042, |
| 89514 | /* VMULPSZ128rm */ |
| 89515 | 39045, |
| 89516 | /* VMULPSZ128rmb */ |
| 89517 | 39048, |
| 89518 | /* VMULPSZ128rmbk */ |
| 89519 | 39051, |
| 89520 | /* VMULPSZ128rmbkz */ |
| 89521 | 39056, |
| 89522 | /* VMULPSZ128rmk */ |
| 89523 | 39060, |
| 89524 | /* VMULPSZ128rmkz */ |
| 89525 | 39065, |
| 89526 | /* VMULPSZ128rr */ |
| 89527 | 39069, |
| 89528 | /* VMULPSZ128rrk */ |
| 89529 | 39072, |
| 89530 | /* VMULPSZ128rrkz */ |
| 89531 | 39077, |
| 89532 | /* VMULPSZ256rm */ |
| 89533 | 39081, |
| 89534 | /* VMULPSZ256rmb */ |
| 89535 | 39084, |
| 89536 | /* VMULPSZ256rmbk */ |
| 89537 | 39087, |
| 89538 | /* VMULPSZ256rmbkz */ |
| 89539 | 39092, |
| 89540 | /* VMULPSZ256rmk */ |
| 89541 | 39096, |
| 89542 | /* VMULPSZ256rmkz */ |
| 89543 | 39101, |
| 89544 | /* VMULPSZ256rr */ |
| 89545 | 39105, |
| 89546 | /* VMULPSZ256rrk */ |
| 89547 | 39108, |
| 89548 | /* VMULPSZ256rrkz */ |
| 89549 | 39113, |
| 89550 | /* VMULPSZrm */ |
| 89551 | 39117, |
| 89552 | /* VMULPSZrmb */ |
| 89553 | 39120, |
| 89554 | /* VMULPSZrmbk */ |
| 89555 | 39123, |
| 89556 | /* VMULPSZrmbkz */ |
| 89557 | 39128, |
| 89558 | /* VMULPSZrmk */ |
| 89559 | 39132, |
| 89560 | /* VMULPSZrmkz */ |
| 89561 | 39137, |
| 89562 | /* VMULPSZrr */ |
| 89563 | 39141, |
| 89564 | /* VMULPSZrrb */ |
| 89565 | 39144, |
| 89566 | /* VMULPSZrrbk */ |
| 89567 | 39148, |
| 89568 | /* VMULPSZrrbkz */ |
| 89569 | 39154, |
| 89570 | /* VMULPSZrrk */ |
| 89571 | 39159, |
| 89572 | /* VMULPSZrrkz */ |
| 89573 | 39164, |
| 89574 | /* VMULPSrm */ |
| 89575 | 39168, |
| 89576 | /* VMULPSrr */ |
| 89577 | 39171, |
| 89578 | /* VMULSDZrm */ |
| 89579 | 39174, |
| 89580 | /* VMULSDZrm_Int */ |
| 89581 | 39177, |
| 89582 | /* VMULSDZrm_Intk */ |
| 89583 | 39180, |
| 89584 | /* VMULSDZrm_Intkz */ |
| 89585 | 39185, |
| 89586 | /* VMULSDZrr */ |
| 89587 | 39189, |
| 89588 | /* VMULSDZrr_Int */ |
| 89589 | 39192, |
| 89590 | /* VMULSDZrr_Intk */ |
| 89591 | 39195, |
| 89592 | /* VMULSDZrr_Intkz */ |
| 89593 | 39200, |
| 89594 | /* VMULSDZrrb_Int */ |
| 89595 | 39204, |
| 89596 | /* VMULSDZrrb_Intk */ |
| 89597 | 39208, |
| 89598 | /* VMULSDZrrb_Intkz */ |
| 89599 | 39214, |
| 89600 | /* VMULSDrm */ |
| 89601 | 39219, |
| 89602 | /* VMULSDrm_Int */ |
| 89603 | 39222, |
| 89604 | /* VMULSDrr */ |
| 89605 | 39225, |
| 89606 | /* VMULSDrr_Int */ |
| 89607 | 39228, |
| 89608 | /* VMULSHZrm */ |
| 89609 | 39231, |
| 89610 | /* VMULSHZrm_Int */ |
| 89611 | 39234, |
| 89612 | /* VMULSHZrm_Intk */ |
| 89613 | 39237, |
| 89614 | /* VMULSHZrm_Intkz */ |
| 89615 | 39242, |
| 89616 | /* VMULSHZrr */ |
| 89617 | 39246, |
| 89618 | /* VMULSHZrr_Int */ |
| 89619 | 39249, |
| 89620 | /* VMULSHZrr_Intk */ |
| 89621 | 39252, |
| 89622 | /* VMULSHZrr_Intkz */ |
| 89623 | 39257, |
| 89624 | /* VMULSHZrrb_Int */ |
| 89625 | 39261, |
| 89626 | /* VMULSHZrrb_Intk */ |
| 89627 | 39265, |
| 89628 | /* VMULSHZrrb_Intkz */ |
| 89629 | 39271, |
| 89630 | /* VMULSSZrm */ |
| 89631 | 39276, |
| 89632 | /* VMULSSZrm_Int */ |
| 89633 | 39279, |
| 89634 | /* VMULSSZrm_Intk */ |
| 89635 | 39282, |
| 89636 | /* VMULSSZrm_Intkz */ |
| 89637 | 39287, |
| 89638 | /* VMULSSZrr */ |
| 89639 | 39291, |
| 89640 | /* VMULSSZrr_Int */ |
| 89641 | 39294, |
| 89642 | /* VMULSSZrr_Intk */ |
| 89643 | 39297, |
| 89644 | /* VMULSSZrr_Intkz */ |
| 89645 | 39302, |
| 89646 | /* VMULSSZrrb_Int */ |
| 89647 | 39306, |
| 89648 | /* VMULSSZrrb_Intk */ |
| 89649 | 39310, |
| 89650 | /* VMULSSZrrb_Intkz */ |
| 89651 | 39316, |
| 89652 | /* VMULSSrm */ |
| 89653 | 39321, |
| 89654 | /* VMULSSrm_Int */ |
| 89655 | 39324, |
| 89656 | /* VMULSSrr */ |
| 89657 | 39327, |
| 89658 | /* VMULSSrr_Int */ |
| 89659 | 39330, |
| 89660 | /* VMWRITE32rm */ |
| 89661 | 39333, |
| 89662 | /* VMWRITE32rr */ |
| 89663 | 39335, |
| 89664 | /* VMWRITE64rm */ |
| 89665 | 39337, |
| 89666 | /* VMWRITE64rr */ |
| 89667 | 39339, |
| 89668 | /* VMXOFF */ |
| 89669 | 39341, |
| 89670 | /* VMXON */ |
| 89671 | 39341, |
| 89672 | /* VORPDYrm */ |
| 89673 | 39342, |
| 89674 | /* VORPDYrr */ |
| 89675 | 39345, |
| 89676 | /* VORPDZ128rm */ |
| 89677 | 39348, |
| 89678 | /* VORPDZ128rmb */ |
| 89679 | 39351, |
| 89680 | /* VORPDZ128rmbk */ |
| 89681 | 39354, |
| 89682 | /* VORPDZ128rmbkz */ |
| 89683 | 39359, |
| 89684 | /* VORPDZ128rmk */ |
| 89685 | 39363, |
| 89686 | /* VORPDZ128rmkz */ |
| 89687 | 39368, |
| 89688 | /* VORPDZ128rr */ |
| 89689 | 39372, |
| 89690 | /* VORPDZ128rrk */ |
| 89691 | 39375, |
| 89692 | /* VORPDZ128rrkz */ |
| 89693 | 39380, |
| 89694 | /* VORPDZ256rm */ |
| 89695 | 39384, |
| 89696 | /* VORPDZ256rmb */ |
| 89697 | 39387, |
| 89698 | /* VORPDZ256rmbk */ |
| 89699 | 39390, |
| 89700 | /* VORPDZ256rmbkz */ |
| 89701 | 39395, |
| 89702 | /* VORPDZ256rmk */ |
| 89703 | 39399, |
| 89704 | /* VORPDZ256rmkz */ |
| 89705 | 39404, |
| 89706 | /* VORPDZ256rr */ |
| 89707 | 39408, |
| 89708 | /* VORPDZ256rrk */ |
| 89709 | 39411, |
| 89710 | /* VORPDZ256rrkz */ |
| 89711 | 39416, |
| 89712 | /* VORPDZrm */ |
| 89713 | 39420, |
| 89714 | /* VORPDZrmb */ |
| 89715 | 39423, |
| 89716 | /* VORPDZrmbk */ |
| 89717 | 39426, |
| 89718 | /* VORPDZrmbkz */ |
| 89719 | 39431, |
| 89720 | /* VORPDZrmk */ |
| 89721 | 39435, |
| 89722 | /* VORPDZrmkz */ |
| 89723 | 39440, |
| 89724 | /* VORPDZrr */ |
| 89725 | 39444, |
| 89726 | /* VORPDZrrk */ |
| 89727 | 39447, |
| 89728 | /* VORPDZrrkz */ |
| 89729 | 39452, |
| 89730 | /* VORPDrm */ |
| 89731 | 39456, |
| 89732 | /* VORPDrr */ |
| 89733 | 39459, |
| 89734 | /* VORPSYrm */ |
| 89735 | 39462, |
| 89736 | /* VORPSYrr */ |
| 89737 | 39465, |
| 89738 | /* VORPSZ128rm */ |
| 89739 | 39468, |
| 89740 | /* VORPSZ128rmb */ |
| 89741 | 39471, |
| 89742 | /* VORPSZ128rmbk */ |
| 89743 | 39474, |
| 89744 | /* VORPSZ128rmbkz */ |
| 89745 | 39479, |
| 89746 | /* VORPSZ128rmk */ |
| 89747 | 39483, |
| 89748 | /* VORPSZ128rmkz */ |
| 89749 | 39488, |
| 89750 | /* VORPSZ128rr */ |
| 89751 | 39492, |
| 89752 | /* VORPSZ128rrk */ |
| 89753 | 39495, |
| 89754 | /* VORPSZ128rrkz */ |
| 89755 | 39500, |
| 89756 | /* VORPSZ256rm */ |
| 89757 | 39504, |
| 89758 | /* VORPSZ256rmb */ |
| 89759 | 39507, |
| 89760 | /* VORPSZ256rmbk */ |
| 89761 | 39510, |
| 89762 | /* VORPSZ256rmbkz */ |
| 89763 | 39515, |
| 89764 | /* VORPSZ256rmk */ |
| 89765 | 39519, |
| 89766 | /* VORPSZ256rmkz */ |
| 89767 | 39524, |
| 89768 | /* VORPSZ256rr */ |
| 89769 | 39528, |
| 89770 | /* VORPSZ256rrk */ |
| 89771 | 39531, |
| 89772 | /* VORPSZ256rrkz */ |
| 89773 | 39536, |
| 89774 | /* VORPSZrm */ |
| 89775 | 39540, |
| 89776 | /* VORPSZrmb */ |
| 89777 | 39543, |
| 89778 | /* VORPSZrmbk */ |
| 89779 | 39546, |
| 89780 | /* VORPSZrmbkz */ |
| 89781 | 39551, |
| 89782 | /* VORPSZrmk */ |
| 89783 | 39555, |
| 89784 | /* VORPSZrmkz */ |
| 89785 | 39560, |
| 89786 | /* VORPSZrr */ |
| 89787 | 39564, |
| 89788 | /* VORPSZrrk */ |
| 89789 | 39567, |
| 89790 | /* VORPSZrrkz */ |
| 89791 | 39572, |
| 89792 | /* VORPSrm */ |
| 89793 | 39576, |
| 89794 | /* VORPSrr */ |
| 89795 | 39579, |
| 89796 | /* VP2INTERSECTDZ128rm */ |
| 89797 | 39582, |
| 89798 | /* VP2INTERSECTDZ128rmb */ |
| 89799 | 39585, |
| 89800 | /* VP2INTERSECTDZ128rr */ |
| 89801 | 39588, |
| 89802 | /* VP2INTERSECTDZ256rm */ |
| 89803 | 39591, |
| 89804 | /* VP2INTERSECTDZ256rmb */ |
| 89805 | 39594, |
| 89806 | /* VP2INTERSECTDZ256rr */ |
| 89807 | 39597, |
| 89808 | /* VP2INTERSECTDZrm */ |
| 89809 | 39600, |
| 89810 | /* VP2INTERSECTDZrmb */ |
| 89811 | 39603, |
| 89812 | /* VP2INTERSECTDZrr */ |
| 89813 | 39606, |
| 89814 | /* VP2INTERSECTQZ128rm */ |
| 89815 | 39609, |
| 89816 | /* VP2INTERSECTQZ128rmb */ |
| 89817 | 39612, |
| 89818 | /* VP2INTERSECTQZ128rr */ |
| 89819 | 39615, |
| 89820 | /* VP2INTERSECTQZ256rm */ |
| 89821 | 39618, |
| 89822 | /* VP2INTERSECTQZ256rmb */ |
| 89823 | 39621, |
| 89824 | /* VP2INTERSECTQZ256rr */ |
| 89825 | 39624, |
| 89826 | /* VP2INTERSECTQZrm */ |
| 89827 | 39627, |
| 89828 | /* VP2INTERSECTQZrmb */ |
| 89829 | 39630, |
| 89830 | /* VP2INTERSECTQZrr */ |
| 89831 | 39633, |
| 89832 | /* VP4DPWSSDSrm */ |
| 89833 | 39636, |
| 89834 | /* VP4DPWSSDSrmk */ |
| 89835 | 39640, |
| 89836 | /* VP4DPWSSDSrmkz */ |
| 89837 | 39645, |
| 89838 | /* VP4DPWSSDrm */ |
| 89839 | 39650, |
| 89840 | /* VP4DPWSSDrmk */ |
| 89841 | 39654, |
| 89842 | /* VP4DPWSSDrmkz */ |
| 89843 | 39659, |
| 89844 | /* VPABSBYrm */ |
| 89845 | 39664, |
| 89846 | /* VPABSBYrr */ |
| 89847 | 39666, |
| 89848 | /* VPABSBZ128rm */ |
| 89849 | 39668, |
| 89850 | /* VPABSBZ128rmk */ |
| 89851 | 39670, |
| 89852 | /* VPABSBZ128rmkz */ |
| 89853 | 39674, |
| 89854 | /* VPABSBZ128rr */ |
| 89855 | 39677, |
| 89856 | /* VPABSBZ128rrk */ |
| 89857 | 39679, |
| 89858 | /* VPABSBZ128rrkz */ |
| 89859 | 39683, |
| 89860 | /* VPABSBZ256rm */ |
| 89861 | 39686, |
| 89862 | /* VPABSBZ256rmk */ |
| 89863 | 39688, |
| 89864 | /* VPABSBZ256rmkz */ |
| 89865 | 39692, |
| 89866 | /* VPABSBZ256rr */ |
| 89867 | 39695, |
| 89868 | /* VPABSBZ256rrk */ |
| 89869 | 39697, |
| 89870 | /* VPABSBZ256rrkz */ |
| 89871 | 39701, |
| 89872 | /* VPABSBZrm */ |
| 89873 | 39704, |
| 89874 | /* VPABSBZrmk */ |
| 89875 | 39706, |
| 89876 | /* VPABSBZrmkz */ |
| 89877 | 39710, |
| 89878 | /* VPABSBZrr */ |
| 89879 | 39713, |
| 89880 | /* VPABSBZrrk */ |
| 89881 | 39715, |
| 89882 | /* VPABSBZrrkz */ |
| 89883 | 39719, |
| 89884 | /* VPABSBrm */ |
| 89885 | 39722, |
| 89886 | /* VPABSBrr */ |
| 89887 | 39724, |
| 89888 | /* VPABSDYrm */ |
| 89889 | 39726, |
| 89890 | /* VPABSDYrr */ |
| 89891 | 39728, |
| 89892 | /* VPABSDZ128rm */ |
| 89893 | 39730, |
| 89894 | /* VPABSDZ128rmb */ |
| 89895 | 39732, |
| 89896 | /* VPABSDZ128rmbk */ |
| 89897 | 39734, |
| 89898 | /* VPABSDZ128rmbkz */ |
| 89899 | 39738, |
| 89900 | /* VPABSDZ128rmk */ |
| 89901 | 39741, |
| 89902 | /* VPABSDZ128rmkz */ |
| 89903 | 39745, |
| 89904 | /* VPABSDZ128rr */ |
| 89905 | 39748, |
| 89906 | /* VPABSDZ128rrk */ |
| 89907 | 39750, |
| 89908 | /* VPABSDZ128rrkz */ |
| 89909 | 39754, |
| 89910 | /* VPABSDZ256rm */ |
| 89911 | 39757, |
| 89912 | /* VPABSDZ256rmb */ |
| 89913 | 39759, |
| 89914 | /* VPABSDZ256rmbk */ |
| 89915 | 39761, |
| 89916 | /* VPABSDZ256rmbkz */ |
| 89917 | 39765, |
| 89918 | /* VPABSDZ256rmk */ |
| 89919 | 39768, |
| 89920 | /* VPABSDZ256rmkz */ |
| 89921 | 39772, |
| 89922 | /* VPABSDZ256rr */ |
| 89923 | 39775, |
| 89924 | /* VPABSDZ256rrk */ |
| 89925 | 39777, |
| 89926 | /* VPABSDZ256rrkz */ |
| 89927 | 39781, |
| 89928 | /* VPABSDZrm */ |
| 89929 | 39784, |
| 89930 | /* VPABSDZrmb */ |
| 89931 | 39786, |
| 89932 | /* VPABSDZrmbk */ |
| 89933 | 39788, |
| 89934 | /* VPABSDZrmbkz */ |
| 89935 | 39792, |
| 89936 | /* VPABSDZrmk */ |
| 89937 | 39795, |
| 89938 | /* VPABSDZrmkz */ |
| 89939 | 39799, |
| 89940 | /* VPABSDZrr */ |
| 89941 | 39802, |
| 89942 | /* VPABSDZrrk */ |
| 89943 | 39804, |
| 89944 | /* VPABSDZrrkz */ |
| 89945 | 39808, |
| 89946 | /* VPABSDrm */ |
| 89947 | 39811, |
| 89948 | /* VPABSDrr */ |
| 89949 | 39813, |
| 89950 | /* VPABSQZ128rm */ |
| 89951 | 39815, |
| 89952 | /* VPABSQZ128rmb */ |
| 89953 | 39817, |
| 89954 | /* VPABSQZ128rmbk */ |
| 89955 | 39819, |
| 89956 | /* VPABSQZ128rmbkz */ |
| 89957 | 39823, |
| 89958 | /* VPABSQZ128rmk */ |
| 89959 | 39826, |
| 89960 | /* VPABSQZ128rmkz */ |
| 89961 | 39830, |
| 89962 | /* VPABSQZ128rr */ |
| 89963 | 39833, |
| 89964 | /* VPABSQZ128rrk */ |
| 89965 | 39835, |
| 89966 | /* VPABSQZ128rrkz */ |
| 89967 | 39839, |
| 89968 | /* VPABSQZ256rm */ |
| 89969 | 39842, |
| 89970 | /* VPABSQZ256rmb */ |
| 89971 | 39844, |
| 89972 | /* VPABSQZ256rmbk */ |
| 89973 | 39846, |
| 89974 | /* VPABSQZ256rmbkz */ |
| 89975 | 39850, |
| 89976 | /* VPABSQZ256rmk */ |
| 89977 | 39853, |
| 89978 | /* VPABSQZ256rmkz */ |
| 89979 | 39857, |
| 89980 | /* VPABSQZ256rr */ |
| 89981 | 39860, |
| 89982 | /* VPABSQZ256rrk */ |
| 89983 | 39862, |
| 89984 | /* VPABSQZ256rrkz */ |
| 89985 | 39866, |
| 89986 | /* VPABSQZrm */ |
| 89987 | 39869, |
| 89988 | /* VPABSQZrmb */ |
| 89989 | 39871, |
| 89990 | /* VPABSQZrmbk */ |
| 89991 | 39873, |
| 89992 | /* VPABSQZrmbkz */ |
| 89993 | 39877, |
| 89994 | /* VPABSQZrmk */ |
| 89995 | 39880, |
| 89996 | /* VPABSQZrmkz */ |
| 89997 | 39884, |
| 89998 | /* VPABSQZrr */ |
| 89999 | 39887, |
| 90000 | /* VPABSQZrrk */ |
| 90001 | 39889, |
| 90002 | /* VPABSQZrrkz */ |
| 90003 | 39893, |
| 90004 | /* VPABSWYrm */ |
| 90005 | 39896, |
| 90006 | /* VPABSWYrr */ |
| 90007 | 39898, |
| 90008 | /* VPABSWZ128rm */ |
| 90009 | 39900, |
| 90010 | /* VPABSWZ128rmk */ |
| 90011 | 39902, |
| 90012 | /* VPABSWZ128rmkz */ |
| 90013 | 39906, |
| 90014 | /* VPABSWZ128rr */ |
| 90015 | 39909, |
| 90016 | /* VPABSWZ128rrk */ |
| 90017 | 39911, |
| 90018 | /* VPABSWZ128rrkz */ |
| 90019 | 39915, |
| 90020 | /* VPABSWZ256rm */ |
| 90021 | 39918, |
| 90022 | /* VPABSWZ256rmk */ |
| 90023 | 39920, |
| 90024 | /* VPABSWZ256rmkz */ |
| 90025 | 39924, |
| 90026 | /* VPABSWZ256rr */ |
| 90027 | 39927, |
| 90028 | /* VPABSWZ256rrk */ |
| 90029 | 39929, |
| 90030 | /* VPABSWZ256rrkz */ |
| 90031 | 39933, |
| 90032 | /* VPABSWZrm */ |
| 90033 | 39936, |
| 90034 | /* VPABSWZrmk */ |
| 90035 | 39938, |
| 90036 | /* VPABSWZrmkz */ |
| 90037 | 39942, |
| 90038 | /* VPABSWZrr */ |
| 90039 | 39945, |
| 90040 | /* VPABSWZrrk */ |
| 90041 | 39947, |
| 90042 | /* VPABSWZrrkz */ |
| 90043 | 39951, |
| 90044 | /* VPABSWrm */ |
| 90045 | 39954, |
| 90046 | /* VPABSWrr */ |
| 90047 | 39956, |
| 90048 | /* VPACKSSDWYrm */ |
| 90049 | 39958, |
| 90050 | /* VPACKSSDWYrr */ |
| 90051 | 39961, |
| 90052 | /* VPACKSSDWZ128rm */ |
| 90053 | 39964, |
| 90054 | /* VPACKSSDWZ128rmb */ |
| 90055 | 39967, |
| 90056 | /* VPACKSSDWZ128rmbk */ |
| 90057 | 39970, |
| 90058 | /* VPACKSSDWZ128rmbkz */ |
| 90059 | 39975, |
| 90060 | /* VPACKSSDWZ128rmk */ |
| 90061 | 39979, |
| 90062 | /* VPACKSSDWZ128rmkz */ |
| 90063 | 39984, |
| 90064 | /* VPACKSSDWZ128rr */ |
| 90065 | 39988, |
| 90066 | /* VPACKSSDWZ128rrk */ |
| 90067 | 39991, |
| 90068 | /* VPACKSSDWZ128rrkz */ |
| 90069 | 39996, |
| 90070 | /* VPACKSSDWZ256rm */ |
| 90071 | 40000, |
| 90072 | /* VPACKSSDWZ256rmb */ |
| 90073 | 40003, |
| 90074 | /* VPACKSSDWZ256rmbk */ |
| 90075 | 40006, |
| 90076 | /* VPACKSSDWZ256rmbkz */ |
| 90077 | 40011, |
| 90078 | /* VPACKSSDWZ256rmk */ |
| 90079 | 40015, |
| 90080 | /* VPACKSSDWZ256rmkz */ |
| 90081 | 40020, |
| 90082 | /* VPACKSSDWZ256rr */ |
| 90083 | 40024, |
| 90084 | /* VPACKSSDWZ256rrk */ |
| 90085 | 40027, |
| 90086 | /* VPACKSSDWZ256rrkz */ |
| 90087 | 40032, |
| 90088 | /* VPACKSSDWZrm */ |
| 90089 | 40036, |
| 90090 | /* VPACKSSDWZrmb */ |
| 90091 | 40039, |
| 90092 | /* VPACKSSDWZrmbk */ |
| 90093 | 40042, |
| 90094 | /* VPACKSSDWZrmbkz */ |
| 90095 | 40047, |
| 90096 | /* VPACKSSDWZrmk */ |
| 90097 | 40051, |
| 90098 | /* VPACKSSDWZrmkz */ |
| 90099 | 40056, |
| 90100 | /* VPACKSSDWZrr */ |
| 90101 | 40060, |
| 90102 | /* VPACKSSDWZrrk */ |
| 90103 | 40063, |
| 90104 | /* VPACKSSDWZrrkz */ |
| 90105 | 40068, |
| 90106 | /* VPACKSSDWrm */ |
| 90107 | 40072, |
| 90108 | /* VPACKSSDWrr */ |
| 90109 | 40075, |
| 90110 | /* VPACKSSWBYrm */ |
| 90111 | 40078, |
| 90112 | /* VPACKSSWBYrr */ |
| 90113 | 40081, |
| 90114 | /* VPACKSSWBZ128rm */ |
| 90115 | 40084, |
| 90116 | /* VPACKSSWBZ128rmk */ |
| 90117 | 40087, |
| 90118 | /* VPACKSSWBZ128rmkz */ |
| 90119 | 40092, |
| 90120 | /* VPACKSSWBZ128rr */ |
| 90121 | 40096, |
| 90122 | /* VPACKSSWBZ128rrk */ |
| 90123 | 40099, |
| 90124 | /* VPACKSSWBZ128rrkz */ |
| 90125 | 40104, |
| 90126 | /* VPACKSSWBZ256rm */ |
| 90127 | 40108, |
| 90128 | /* VPACKSSWBZ256rmk */ |
| 90129 | 40111, |
| 90130 | /* VPACKSSWBZ256rmkz */ |
| 90131 | 40116, |
| 90132 | /* VPACKSSWBZ256rr */ |
| 90133 | 40120, |
| 90134 | /* VPACKSSWBZ256rrk */ |
| 90135 | 40123, |
| 90136 | /* VPACKSSWBZ256rrkz */ |
| 90137 | 40128, |
| 90138 | /* VPACKSSWBZrm */ |
| 90139 | 40132, |
| 90140 | /* VPACKSSWBZrmk */ |
| 90141 | 40135, |
| 90142 | /* VPACKSSWBZrmkz */ |
| 90143 | 40140, |
| 90144 | /* VPACKSSWBZrr */ |
| 90145 | 40144, |
| 90146 | /* VPACKSSWBZrrk */ |
| 90147 | 40147, |
| 90148 | /* VPACKSSWBZrrkz */ |
| 90149 | 40152, |
| 90150 | /* VPACKSSWBrm */ |
| 90151 | 40156, |
| 90152 | /* VPACKSSWBrr */ |
| 90153 | 40159, |
| 90154 | /* VPACKUSDWYrm */ |
| 90155 | 40162, |
| 90156 | /* VPACKUSDWYrr */ |
| 90157 | 40165, |
| 90158 | /* VPACKUSDWZ128rm */ |
| 90159 | 40168, |
| 90160 | /* VPACKUSDWZ128rmb */ |
| 90161 | 40171, |
| 90162 | /* VPACKUSDWZ128rmbk */ |
| 90163 | 40174, |
| 90164 | /* VPACKUSDWZ128rmbkz */ |
| 90165 | 40179, |
| 90166 | /* VPACKUSDWZ128rmk */ |
| 90167 | 40183, |
| 90168 | /* VPACKUSDWZ128rmkz */ |
| 90169 | 40188, |
| 90170 | /* VPACKUSDWZ128rr */ |
| 90171 | 40192, |
| 90172 | /* VPACKUSDWZ128rrk */ |
| 90173 | 40195, |
| 90174 | /* VPACKUSDWZ128rrkz */ |
| 90175 | 40200, |
| 90176 | /* VPACKUSDWZ256rm */ |
| 90177 | 40204, |
| 90178 | /* VPACKUSDWZ256rmb */ |
| 90179 | 40207, |
| 90180 | /* VPACKUSDWZ256rmbk */ |
| 90181 | 40210, |
| 90182 | /* VPACKUSDWZ256rmbkz */ |
| 90183 | 40215, |
| 90184 | /* VPACKUSDWZ256rmk */ |
| 90185 | 40219, |
| 90186 | /* VPACKUSDWZ256rmkz */ |
| 90187 | 40224, |
| 90188 | /* VPACKUSDWZ256rr */ |
| 90189 | 40228, |
| 90190 | /* VPACKUSDWZ256rrk */ |
| 90191 | 40231, |
| 90192 | /* VPACKUSDWZ256rrkz */ |
| 90193 | 40236, |
| 90194 | /* VPACKUSDWZrm */ |
| 90195 | 40240, |
| 90196 | /* VPACKUSDWZrmb */ |
| 90197 | 40243, |
| 90198 | /* VPACKUSDWZrmbk */ |
| 90199 | 40246, |
| 90200 | /* VPACKUSDWZrmbkz */ |
| 90201 | 40251, |
| 90202 | /* VPACKUSDWZrmk */ |
| 90203 | 40255, |
| 90204 | /* VPACKUSDWZrmkz */ |
| 90205 | 40260, |
| 90206 | /* VPACKUSDWZrr */ |
| 90207 | 40264, |
| 90208 | /* VPACKUSDWZrrk */ |
| 90209 | 40267, |
| 90210 | /* VPACKUSDWZrrkz */ |
| 90211 | 40272, |
| 90212 | /* VPACKUSDWrm */ |
| 90213 | 40276, |
| 90214 | /* VPACKUSDWrr */ |
| 90215 | 40279, |
| 90216 | /* VPACKUSWBYrm */ |
| 90217 | 40282, |
| 90218 | /* VPACKUSWBYrr */ |
| 90219 | 40285, |
| 90220 | /* VPACKUSWBZ128rm */ |
| 90221 | 40288, |
| 90222 | /* VPACKUSWBZ128rmk */ |
| 90223 | 40291, |
| 90224 | /* VPACKUSWBZ128rmkz */ |
| 90225 | 40296, |
| 90226 | /* VPACKUSWBZ128rr */ |
| 90227 | 40300, |
| 90228 | /* VPACKUSWBZ128rrk */ |
| 90229 | 40303, |
| 90230 | /* VPACKUSWBZ128rrkz */ |
| 90231 | 40308, |
| 90232 | /* VPACKUSWBZ256rm */ |
| 90233 | 40312, |
| 90234 | /* VPACKUSWBZ256rmk */ |
| 90235 | 40315, |
| 90236 | /* VPACKUSWBZ256rmkz */ |
| 90237 | 40320, |
| 90238 | /* VPACKUSWBZ256rr */ |
| 90239 | 40324, |
| 90240 | /* VPACKUSWBZ256rrk */ |
| 90241 | 40327, |
| 90242 | /* VPACKUSWBZ256rrkz */ |
| 90243 | 40332, |
| 90244 | /* VPACKUSWBZrm */ |
| 90245 | 40336, |
| 90246 | /* VPACKUSWBZrmk */ |
| 90247 | 40339, |
| 90248 | /* VPACKUSWBZrmkz */ |
| 90249 | 40344, |
| 90250 | /* VPACKUSWBZrr */ |
| 90251 | 40348, |
| 90252 | /* VPACKUSWBZrrk */ |
| 90253 | 40351, |
| 90254 | /* VPACKUSWBZrrkz */ |
| 90255 | 40356, |
| 90256 | /* VPACKUSWBrm */ |
| 90257 | 40360, |
| 90258 | /* VPACKUSWBrr */ |
| 90259 | 40363, |
| 90260 | /* VPADDBYrm */ |
| 90261 | 40366, |
| 90262 | /* VPADDBYrr */ |
| 90263 | 40369, |
| 90264 | /* VPADDBZ128rm */ |
| 90265 | 40372, |
| 90266 | /* VPADDBZ128rmk */ |
| 90267 | 40375, |
| 90268 | /* VPADDBZ128rmkz */ |
| 90269 | 40380, |
| 90270 | /* VPADDBZ128rr */ |
| 90271 | 40384, |
| 90272 | /* VPADDBZ128rrk */ |
| 90273 | 40387, |
| 90274 | /* VPADDBZ128rrkz */ |
| 90275 | 40392, |
| 90276 | /* VPADDBZ256rm */ |
| 90277 | 40396, |
| 90278 | /* VPADDBZ256rmk */ |
| 90279 | 40399, |
| 90280 | /* VPADDBZ256rmkz */ |
| 90281 | 40404, |
| 90282 | /* VPADDBZ256rr */ |
| 90283 | 40408, |
| 90284 | /* VPADDBZ256rrk */ |
| 90285 | 40411, |
| 90286 | /* VPADDBZ256rrkz */ |
| 90287 | 40416, |
| 90288 | /* VPADDBZrm */ |
| 90289 | 40420, |
| 90290 | /* VPADDBZrmk */ |
| 90291 | 40423, |
| 90292 | /* VPADDBZrmkz */ |
| 90293 | 40428, |
| 90294 | /* VPADDBZrr */ |
| 90295 | 40432, |
| 90296 | /* VPADDBZrrk */ |
| 90297 | 40435, |
| 90298 | /* VPADDBZrrkz */ |
| 90299 | 40440, |
| 90300 | /* VPADDBrm */ |
| 90301 | 40444, |
| 90302 | /* VPADDBrr */ |
| 90303 | 40447, |
| 90304 | /* VPADDDYrm */ |
| 90305 | 40450, |
| 90306 | /* VPADDDYrr */ |
| 90307 | 40453, |
| 90308 | /* VPADDDZ128rm */ |
| 90309 | 40456, |
| 90310 | /* VPADDDZ128rmb */ |
| 90311 | 40459, |
| 90312 | /* VPADDDZ128rmbk */ |
| 90313 | 40462, |
| 90314 | /* VPADDDZ128rmbkz */ |
| 90315 | 40467, |
| 90316 | /* VPADDDZ128rmk */ |
| 90317 | 40471, |
| 90318 | /* VPADDDZ128rmkz */ |
| 90319 | 40476, |
| 90320 | /* VPADDDZ128rr */ |
| 90321 | 40480, |
| 90322 | /* VPADDDZ128rrk */ |
| 90323 | 40483, |
| 90324 | /* VPADDDZ128rrkz */ |
| 90325 | 40488, |
| 90326 | /* VPADDDZ256rm */ |
| 90327 | 40492, |
| 90328 | /* VPADDDZ256rmb */ |
| 90329 | 40495, |
| 90330 | /* VPADDDZ256rmbk */ |
| 90331 | 40498, |
| 90332 | /* VPADDDZ256rmbkz */ |
| 90333 | 40503, |
| 90334 | /* VPADDDZ256rmk */ |
| 90335 | 40507, |
| 90336 | /* VPADDDZ256rmkz */ |
| 90337 | 40512, |
| 90338 | /* VPADDDZ256rr */ |
| 90339 | 40516, |
| 90340 | /* VPADDDZ256rrk */ |
| 90341 | 40519, |
| 90342 | /* VPADDDZ256rrkz */ |
| 90343 | 40524, |
| 90344 | /* VPADDDZrm */ |
| 90345 | 40528, |
| 90346 | /* VPADDDZrmb */ |
| 90347 | 40531, |
| 90348 | /* VPADDDZrmbk */ |
| 90349 | 40534, |
| 90350 | /* VPADDDZrmbkz */ |
| 90351 | 40539, |
| 90352 | /* VPADDDZrmk */ |
| 90353 | 40543, |
| 90354 | /* VPADDDZrmkz */ |
| 90355 | 40548, |
| 90356 | /* VPADDDZrr */ |
| 90357 | 40552, |
| 90358 | /* VPADDDZrrk */ |
| 90359 | 40555, |
| 90360 | /* VPADDDZrrkz */ |
| 90361 | 40560, |
| 90362 | /* VPADDDrm */ |
| 90363 | 40564, |
| 90364 | /* VPADDDrr */ |
| 90365 | 40567, |
| 90366 | /* VPADDQYrm */ |
| 90367 | 40570, |
| 90368 | /* VPADDQYrr */ |
| 90369 | 40573, |
| 90370 | /* VPADDQZ128rm */ |
| 90371 | 40576, |
| 90372 | /* VPADDQZ128rmb */ |
| 90373 | 40579, |
| 90374 | /* VPADDQZ128rmbk */ |
| 90375 | 40582, |
| 90376 | /* VPADDQZ128rmbkz */ |
| 90377 | 40587, |
| 90378 | /* VPADDQZ128rmk */ |
| 90379 | 40591, |
| 90380 | /* VPADDQZ128rmkz */ |
| 90381 | 40596, |
| 90382 | /* VPADDQZ128rr */ |
| 90383 | 40600, |
| 90384 | /* VPADDQZ128rrk */ |
| 90385 | 40603, |
| 90386 | /* VPADDQZ128rrkz */ |
| 90387 | 40608, |
| 90388 | /* VPADDQZ256rm */ |
| 90389 | 40612, |
| 90390 | /* VPADDQZ256rmb */ |
| 90391 | 40615, |
| 90392 | /* VPADDQZ256rmbk */ |
| 90393 | 40618, |
| 90394 | /* VPADDQZ256rmbkz */ |
| 90395 | 40623, |
| 90396 | /* VPADDQZ256rmk */ |
| 90397 | 40627, |
| 90398 | /* VPADDQZ256rmkz */ |
| 90399 | 40632, |
| 90400 | /* VPADDQZ256rr */ |
| 90401 | 40636, |
| 90402 | /* VPADDQZ256rrk */ |
| 90403 | 40639, |
| 90404 | /* VPADDQZ256rrkz */ |
| 90405 | 40644, |
| 90406 | /* VPADDQZrm */ |
| 90407 | 40648, |
| 90408 | /* VPADDQZrmb */ |
| 90409 | 40651, |
| 90410 | /* VPADDQZrmbk */ |
| 90411 | 40654, |
| 90412 | /* VPADDQZrmbkz */ |
| 90413 | 40659, |
| 90414 | /* VPADDQZrmk */ |
| 90415 | 40663, |
| 90416 | /* VPADDQZrmkz */ |
| 90417 | 40668, |
| 90418 | /* VPADDQZrr */ |
| 90419 | 40672, |
| 90420 | /* VPADDQZrrk */ |
| 90421 | 40675, |
| 90422 | /* VPADDQZrrkz */ |
| 90423 | 40680, |
| 90424 | /* VPADDQrm */ |
| 90425 | 40684, |
| 90426 | /* VPADDQrr */ |
| 90427 | 40687, |
| 90428 | /* VPADDSBYrm */ |
| 90429 | 40690, |
| 90430 | /* VPADDSBYrr */ |
| 90431 | 40693, |
| 90432 | /* VPADDSBZ128rm */ |
| 90433 | 40696, |
| 90434 | /* VPADDSBZ128rmk */ |
| 90435 | 40699, |
| 90436 | /* VPADDSBZ128rmkz */ |
| 90437 | 40704, |
| 90438 | /* VPADDSBZ128rr */ |
| 90439 | 40708, |
| 90440 | /* VPADDSBZ128rrk */ |
| 90441 | 40711, |
| 90442 | /* VPADDSBZ128rrkz */ |
| 90443 | 40716, |
| 90444 | /* VPADDSBZ256rm */ |
| 90445 | 40720, |
| 90446 | /* VPADDSBZ256rmk */ |
| 90447 | 40723, |
| 90448 | /* VPADDSBZ256rmkz */ |
| 90449 | 40728, |
| 90450 | /* VPADDSBZ256rr */ |
| 90451 | 40732, |
| 90452 | /* VPADDSBZ256rrk */ |
| 90453 | 40735, |
| 90454 | /* VPADDSBZ256rrkz */ |
| 90455 | 40740, |
| 90456 | /* VPADDSBZrm */ |
| 90457 | 40744, |
| 90458 | /* VPADDSBZrmk */ |
| 90459 | 40747, |
| 90460 | /* VPADDSBZrmkz */ |
| 90461 | 40752, |
| 90462 | /* VPADDSBZrr */ |
| 90463 | 40756, |
| 90464 | /* VPADDSBZrrk */ |
| 90465 | 40759, |
| 90466 | /* VPADDSBZrrkz */ |
| 90467 | 40764, |
| 90468 | /* VPADDSBrm */ |
| 90469 | 40768, |
| 90470 | /* VPADDSBrr */ |
| 90471 | 40771, |
| 90472 | /* VPADDSWYrm */ |
| 90473 | 40774, |
| 90474 | /* VPADDSWYrr */ |
| 90475 | 40777, |
| 90476 | /* VPADDSWZ128rm */ |
| 90477 | 40780, |
| 90478 | /* VPADDSWZ128rmk */ |
| 90479 | 40783, |
| 90480 | /* VPADDSWZ128rmkz */ |
| 90481 | 40788, |
| 90482 | /* VPADDSWZ128rr */ |
| 90483 | 40792, |
| 90484 | /* VPADDSWZ128rrk */ |
| 90485 | 40795, |
| 90486 | /* VPADDSWZ128rrkz */ |
| 90487 | 40800, |
| 90488 | /* VPADDSWZ256rm */ |
| 90489 | 40804, |
| 90490 | /* VPADDSWZ256rmk */ |
| 90491 | 40807, |
| 90492 | /* VPADDSWZ256rmkz */ |
| 90493 | 40812, |
| 90494 | /* VPADDSWZ256rr */ |
| 90495 | 40816, |
| 90496 | /* VPADDSWZ256rrk */ |
| 90497 | 40819, |
| 90498 | /* VPADDSWZ256rrkz */ |
| 90499 | 40824, |
| 90500 | /* VPADDSWZrm */ |
| 90501 | 40828, |
| 90502 | /* VPADDSWZrmk */ |
| 90503 | 40831, |
| 90504 | /* VPADDSWZrmkz */ |
| 90505 | 40836, |
| 90506 | /* VPADDSWZrr */ |
| 90507 | 40840, |
| 90508 | /* VPADDSWZrrk */ |
| 90509 | 40843, |
| 90510 | /* VPADDSWZrrkz */ |
| 90511 | 40848, |
| 90512 | /* VPADDSWrm */ |
| 90513 | 40852, |
| 90514 | /* VPADDSWrr */ |
| 90515 | 40855, |
| 90516 | /* VPADDUSBYrm */ |
| 90517 | 40858, |
| 90518 | /* VPADDUSBYrr */ |
| 90519 | 40861, |
| 90520 | /* VPADDUSBZ128rm */ |
| 90521 | 40864, |
| 90522 | /* VPADDUSBZ128rmk */ |
| 90523 | 40867, |
| 90524 | /* VPADDUSBZ128rmkz */ |
| 90525 | 40872, |
| 90526 | /* VPADDUSBZ128rr */ |
| 90527 | 40876, |
| 90528 | /* VPADDUSBZ128rrk */ |
| 90529 | 40879, |
| 90530 | /* VPADDUSBZ128rrkz */ |
| 90531 | 40884, |
| 90532 | /* VPADDUSBZ256rm */ |
| 90533 | 40888, |
| 90534 | /* VPADDUSBZ256rmk */ |
| 90535 | 40891, |
| 90536 | /* VPADDUSBZ256rmkz */ |
| 90537 | 40896, |
| 90538 | /* VPADDUSBZ256rr */ |
| 90539 | 40900, |
| 90540 | /* VPADDUSBZ256rrk */ |
| 90541 | 40903, |
| 90542 | /* VPADDUSBZ256rrkz */ |
| 90543 | 40908, |
| 90544 | /* VPADDUSBZrm */ |
| 90545 | 40912, |
| 90546 | /* VPADDUSBZrmk */ |
| 90547 | 40915, |
| 90548 | /* VPADDUSBZrmkz */ |
| 90549 | 40920, |
| 90550 | /* VPADDUSBZrr */ |
| 90551 | 40924, |
| 90552 | /* VPADDUSBZrrk */ |
| 90553 | 40927, |
| 90554 | /* VPADDUSBZrrkz */ |
| 90555 | 40932, |
| 90556 | /* VPADDUSBrm */ |
| 90557 | 40936, |
| 90558 | /* VPADDUSBrr */ |
| 90559 | 40939, |
| 90560 | /* VPADDUSWYrm */ |
| 90561 | 40942, |
| 90562 | /* VPADDUSWYrr */ |
| 90563 | 40945, |
| 90564 | /* VPADDUSWZ128rm */ |
| 90565 | 40948, |
| 90566 | /* VPADDUSWZ128rmk */ |
| 90567 | 40951, |
| 90568 | /* VPADDUSWZ128rmkz */ |
| 90569 | 40956, |
| 90570 | /* VPADDUSWZ128rr */ |
| 90571 | 40960, |
| 90572 | /* VPADDUSWZ128rrk */ |
| 90573 | 40963, |
| 90574 | /* VPADDUSWZ128rrkz */ |
| 90575 | 40968, |
| 90576 | /* VPADDUSWZ256rm */ |
| 90577 | 40972, |
| 90578 | /* VPADDUSWZ256rmk */ |
| 90579 | 40975, |
| 90580 | /* VPADDUSWZ256rmkz */ |
| 90581 | 40980, |
| 90582 | /* VPADDUSWZ256rr */ |
| 90583 | 40984, |
| 90584 | /* VPADDUSWZ256rrk */ |
| 90585 | 40987, |
| 90586 | /* VPADDUSWZ256rrkz */ |
| 90587 | 40992, |
| 90588 | /* VPADDUSWZrm */ |
| 90589 | 40996, |
| 90590 | /* VPADDUSWZrmk */ |
| 90591 | 40999, |
| 90592 | /* VPADDUSWZrmkz */ |
| 90593 | 41004, |
| 90594 | /* VPADDUSWZrr */ |
| 90595 | 41008, |
| 90596 | /* VPADDUSWZrrk */ |
| 90597 | 41011, |
| 90598 | /* VPADDUSWZrrkz */ |
| 90599 | 41016, |
| 90600 | /* VPADDUSWrm */ |
| 90601 | 41020, |
| 90602 | /* VPADDUSWrr */ |
| 90603 | 41023, |
| 90604 | /* VPADDWYrm */ |
| 90605 | 41026, |
| 90606 | /* VPADDWYrr */ |
| 90607 | 41029, |
| 90608 | /* VPADDWZ128rm */ |
| 90609 | 41032, |
| 90610 | /* VPADDWZ128rmk */ |
| 90611 | 41035, |
| 90612 | /* VPADDWZ128rmkz */ |
| 90613 | 41040, |
| 90614 | /* VPADDWZ128rr */ |
| 90615 | 41044, |
| 90616 | /* VPADDWZ128rrk */ |
| 90617 | 41047, |
| 90618 | /* VPADDWZ128rrkz */ |
| 90619 | 41052, |
| 90620 | /* VPADDWZ256rm */ |
| 90621 | 41056, |
| 90622 | /* VPADDWZ256rmk */ |
| 90623 | 41059, |
| 90624 | /* VPADDWZ256rmkz */ |
| 90625 | 41064, |
| 90626 | /* VPADDWZ256rr */ |
| 90627 | 41068, |
| 90628 | /* VPADDWZ256rrk */ |
| 90629 | 41071, |
| 90630 | /* VPADDWZ256rrkz */ |
| 90631 | 41076, |
| 90632 | /* VPADDWZrm */ |
| 90633 | 41080, |
| 90634 | /* VPADDWZrmk */ |
| 90635 | 41083, |
| 90636 | /* VPADDWZrmkz */ |
| 90637 | 41088, |
| 90638 | /* VPADDWZrr */ |
| 90639 | 41092, |
| 90640 | /* VPADDWZrrk */ |
| 90641 | 41095, |
| 90642 | /* VPADDWZrrkz */ |
| 90643 | 41100, |
| 90644 | /* VPADDWrm */ |
| 90645 | 41104, |
| 90646 | /* VPADDWrr */ |
| 90647 | 41107, |
| 90648 | /* VPALIGNRYrmi */ |
| 90649 | 41110, |
| 90650 | /* VPALIGNRYrri */ |
| 90651 | 41114, |
| 90652 | /* VPALIGNRZ128rmi */ |
| 90653 | 41118, |
| 90654 | /* VPALIGNRZ128rmik */ |
| 90655 | 41122, |
| 90656 | /* VPALIGNRZ128rmikz */ |
| 90657 | 41128, |
| 90658 | /* VPALIGNRZ128rri */ |
| 90659 | 41133, |
| 90660 | /* VPALIGNRZ128rrik */ |
| 90661 | 41137, |
| 90662 | /* VPALIGNRZ128rrikz */ |
| 90663 | 41143, |
| 90664 | /* VPALIGNRZ256rmi */ |
| 90665 | 41148, |
| 90666 | /* VPALIGNRZ256rmik */ |
| 90667 | 41152, |
| 90668 | /* VPALIGNRZ256rmikz */ |
| 90669 | 41158, |
| 90670 | /* VPALIGNRZ256rri */ |
| 90671 | 41163, |
| 90672 | /* VPALIGNRZ256rrik */ |
| 90673 | 41167, |
| 90674 | /* VPALIGNRZ256rrikz */ |
| 90675 | 41173, |
| 90676 | /* VPALIGNRZrmi */ |
| 90677 | 41178, |
| 90678 | /* VPALIGNRZrmik */ |
| 90679 | 41182, |
| 90680 | /* VPALIGNRZrmikz */ |
| 90681 | 41188, |
| 90682 | /* VPALIGNRZrri */ |
| 90683 | 41193, |
| 90684 | /* VPALIGNRZrrik */ |
| 90685 | 41197, |
| 90686 | /* VPALIGNRZrrikz */ |
| 90687 | 41203, |
| 90688 | /* VPALIGNRrmi */ |
| 90689 | 41208, |
| 90690 | /* VPALIGNRrri */ |
| 90691 | 41212, |
| 90692 | /* VPANDDZ128rm */ |
| 90693 | 41216, |
| 90694 | /* VPANDDZ128rmb */ |
| 90695 | 41219, |
| 90696 | /* VPANDDZ128rmbk */ |
| 90697 | 41222, |
| 90698 | /* VPANDDZ128rmbkz */ |
| 90699 | 41227, |
| 90700 | /* VPANDDZ128rmk */ |
| 90701 | 41231, |
| 90702 | /* VPANDDZ128rmkz */ |
| 90703 | 41236, |
| 90704 | /* VPANDDZ128rr */ |
| 90705 | 41240, |
| 90706 | /* VPANDDZ128rrk */ |
| 90707 | 41243, |
| 90708 | /* VPANDDZ128rrkz */ |
| 90709 | 41248, |
| 90710 | /* VPANDDZ256rm */ |
| 90711 | 41252, |
| 90712 | /* VPANDDZ256rmb */ |
| 90713 | 41255, |
| 90714 | /* VPANDDZ256rmbk */ |
| 90715 | 41258, |
| 90716 | /* VPANDDZ256rmbkz */ |
| 90717 | 41263, |
| 90718 | /* VPANDDZ256rmk */ |
| 90719 | 41267, |
| 90720 | /* VPANDDZ256rmkz */ |
| 90721 | 41272, |
| 90722 | /* VPANDDZ256rr */ |
| 90723 | 41276, |
| 90724 | /* VPANDDZ256rrk */ |
| 90725 | 41279, |
| 90726 | /* VPANDDZ256rrkz */ |
| 90727 | 41284, |
| 90728 | /* VPANDDZrm */ |
| 90729 | 41288, |
| 90730 | /* VPANDDZrmb */ |
| 90731 | 41291, |
| 90732 | /* VPANDDZrmbk */ |
| 90733 | 41294, |
| 90734 | /* VPANDDZrmbkz */ |
| 90735 | 41299, |
| 90736 | /* VPANDDZrmk */ |
| 90737 | 41303, |
| 90738 | /* VPANDDZrmkz */ |
| 90739 | 41308, |
| 90740 | /* VPANDDZrr */ |
| 90741 | 41312, |
| 90742 | /* VPANDDZrrk */ |
| 90743 | 41315, |
| 90744 | /* VPANDDZrrkz */ |
| 90745 | 41320, |
| 90746 | /* VPANDNDZ128rm */ |
| 90747 | 41324, |
| 90748 | /* VPANDNDZ128rmb */ |
| 90749 | 41327, |
| 90750 | /* VPANDNDZ128rmbk */ |
| 90751 | 41330, |
| 90752 | /* VPANDNDZ128rmbkz */ |
| 90753 | 41335, |
| 90754 | /* VPANDNDZ128rmk */ |
| 90755 | 41339, |
| 90756 | /* VPANDNDZ128rmkz */ |
| 90757 | 41344, |
| 90758 | /* VPANDNDZ128rr */ |
| 90759 | 41348, |
| 90760 | /* VPANDNDZ128rrk */ |
| 90761 | 41351, |
| 90762 | /* VPANDNDZ128rrkz */ |
| 90763 | 41356, |
| 90764 | /* VPANDNDZ256rm */ |
| 90765 | 41360, |
| 90766 | /* VPANDNDZ256rmb */ |
| 90767 | 41363, |
| 90768 | /* VPANDNDZ256rmbk */ |
| 90769 | 41366, |
| 90770 | /* VPANDNDZ256rmbkz */ |
| 90771 | 41371, |
| 90772 | /* VPANDNDZ256rmk */ |
| 90773 | 41375, |
| 90774 | /* VPANDNDZ256rmkz */ |
| 90775 | 41380, |
| 90776 | /* VPANDNDZ256rr */ |
| 90777 | 41384, |
| 90778 | /* VPANDNDZ256rrk */ |
| 90779 | 41387, |
| 90780 | /* VPANDNDZ256rrkz */ |
| 90781 | 41392, |
| 90782 | /* VPANDNDZrm */ |
| 90783 | 41396, |
| 90784 | /* VPANDNDZrmb */ |
| 90785 | 41399, |
| 90786 | /* VPANDNDZrmbk */ |
| 90787 | 41402, |
| 90788 | /* VPANDNDZrmbkz */ |
| 90789 | 41407, |
| 90790 | /* VPANDNDZrmk */ |
| 90791 | 41411, |
| 90792 | /* VPANDNDZrmkz */ |
| 90793 | 41416, |
| 90794 | /* VPANDNDZrr */ |
| 90795 | 41420, |
| 90796 | /* VPANDNDZrrk */ |
| 90797 | 41423, |
| 90798 | /* VPANDNDZrrkz */ |
| 90799 | 41428, |
| 90800 | /* VPANDNQZ128rm */ |
| 90801 | 41432, |
| 90802 | /* VPANDNQZ128rmb */ |
| 90803 | 41435, |
| 90804 | /* VPANDNQZ128rmbk */ |
| 90805 | 41438, |
| 90806 | /* VPANDNQZ128rmbkz */ |
| 90807 | 41443, |
| 90808 | /* VPANDNQZ128rmk */ |
| 90809 | 41447, |
| 90810 | /* VPANDNQZ128rmkz */ |
| 90811 | 41452, |
| 90812 | /* VPANDNQZ128rr */ |
| 90813 | 41456, |
| 90814 | /* VPANDNQZ128rrk */ |
| 90815 | 41459, |
| 90816 | /* VPANDNQZ128rrkz */ |
| 90817 | 41464, |
| 90818 | /* VPANDNQZ256rm */ |
| 90819 | 41468, |
| 90820 | /* VPANDNQZ256rmb */ |
| 90821 | 41471, |
| 90822 | /* VPANDNQZ256rmbk */ |
| 90823 | 41474, |
| 90824 | /* VPANDNQZ256rmbkz */ |
| 90825 | 41479, |
| 90826 | /* VPANDNQZ256rmk */ |
| 90827 | 41483, |
| 90828 | /* VPANDNQZ256rmkz */ |
| 90829 | 41488, |
| 90830 | /* VPANDNQZ256rr */ |
| 90831 | 41492, |
| 90832 | /* VPANDNQZ256rrk */ |
| 90833 | 41495, |
| 90834 | /* VPANDNQZ256rrkz */ |
| 90835 | 41500, |
| 90836 | /* VPANDNQZrm */ |
| 90837 | 41504, |
| 90838 | /* VPANDNQZrmb */ |
| 90839 | 41507, |
| 90840 | /* VPANDNQZrmbk */ |
| 90841 | 41510, |
| 90842 | /* VPANDNQZrmbkz */ |
| 90843 | 41515, |
| 90844 | /* VPANDNQZrmk */ |
| 90845 | 41519, |
| 90846 | /* VPANDNQZrmkz */ |
| 90847 | 41524, |
| 90848 | /* VPANDNQZrr */ |
| 90849 | 41528, |
| 90850 | /* VPANDNQZrrk */ |
| 90851 | 41531, |
| 90852 | /* VPANDNQZrrkz */ |
| 90853 | 41536, |
| 90854 | /* VPANDNYrm */ |
| 90855 | 41540, |
| 90856 | /* VPANDNYrr */ |
| 90857 | 41543, |
| 90858 | /* VPANDNrm */ |
| 90859 | 41546, |
| 90860 | /* VPANDNrr */ |
| 90861 | 41549, |
| 90862 | /* VPANDQZ128rm */ |
| 90863 | 41552, |
| 90864 | /* VPANDQZ128rmb */ |
| 90865 | 41555, |
| 90866 | /* VPANDQZ128rmbk */ |
| 90867 | 41558, |
| 90868 | /* VPANDQZ128rmbkz */ |
| 90869 | 41563, |
| 90870 | /* VPANDQZ128rmk */ |
| 90871 | 41567, |
| 90872 | /* VPANDQZ128rmkz */ |
| 90873 | 41572, |
| 90874 | /* VPANDQZ128rr */ |
| 90875 | 41576, |
| 90876 | /* VPANDQZ128rrk */ |
| 90877 | 41579, |
| 90878 | /* VPANDQZ128rrkz */ |
| 90879 | 41584, |
| 90880 | /* VPANDQZ256rm */ |
| 90881 | 41588, |
| 90882 | /* VPANDQZ256rmb */ |
| 90883 | 41591, |
| 90884 | /* VPANDQZ256rmbk */ |
| 90885 | 41594, |
| 90886 | /* VPANDQZ256rmbkz */ |
| 90887 | 41599, |
| 90888 | /* VPANDQZ256rmk */ |
| 90889 | 41603, |
| 90890 | /* VPANDQZ256rmkz */ |
| 90891 | 41608, |
| 90892 | /* VPANDQZ256rr */ |
| 90893 | 41612, |
| 90894 | /* VPANDQZ256rrk */ |
| 90895 | 41615, |
| 90896 | /* VPANDQZ256rrkz */ |
| 90897 | 41620, |
| 90898 | /* VPANDQZrm */ |
| 90899 | 41624, |
| 90900 | /* VPANDQZrmb */ |
| 90901 | 41627, |
| 90902 | /* VPANDQZrmbk */ |
| 90903 | 41630, |
| 90904 | /* VPANDQZrmbkz */ |
| 90905 | 41635, |
| 90906 | /* VPANDQZrmk */ |
| 90907 | 41639, |
| 90908 | /* VPANDQZrmkz */ |
| 90909 | 41644, |
| 90910 | /* VPANDQZrr */ |
| 90911 | 41648, |
| 90912 | /* VPANDQZrrk */ |
| 90913 | 41651, |
| 90914 | /* VPANDQZrrkz */ |
| 90915 | 41656, |
| 90916 | /* VPANDYrm */ |
| 90917 | 41660, |
| 90918 | /* VPANDYrr */ |
| 90919 | 41663, |
| 90920 | /* VPANDrm */ |
| 90921 | 41666, |
| 90922 | /* VPANDrr */ |
| 90923 | 41669, |
| 90924 | /* VPAVGBYrm */ |
| 90925 | 41672, |
| 90926 | /* VPAVGBYrr */ |
| 90927 | 41675, |
| 90928 | /* VPAVGBZ128rm */ |
| 90929 | 41678, |
| 90930 | /* VPAVGBZ128rmk */ |
| 90931 | 41681, |
| 90932 | /* VPAVGBZ128rmkz */ |
| 90933 | 41686, |
| 90934 | /* VPAVGBZ128rr */ |
| 90935 | 41690, |
| 90936 | /* VPAVGBZ128rrk */ |
| 90937 | 41693, |
| 90938 | /* VPAVGBZ128rrkz */ |
| 90939 | 41698, |
| 90940 | /* VPAVGBZ256rm */ |
| 90941 | 41702, |
| 90942 | /* VPAVGBZ256rmk */ |
| 90943 | 41705, |
| 90944 | /* VPAVGBZ256rmkz */ |
| 90945 | 41710, |
| 90946 | /* VPAVGBZ256rr */ |
| 90947 | 41714, |
| 90948 | /* VPAVGBZ256rrk */ |
| 90949 | 41717, |
| 90950 | /* VPAVGBZ256rrkz */ |
| 90951 | 41722, |
| 90952 | /* VPAVGBZrm */ |
| 90953 | 41726, |
| 90954 | /* VPAVGBZrmk */ |
| 90955 | 41729, |
| 90956 | /* VPAVGBZrmkz */ |
| 90957 | 41734, |
| 90958 | /* VPAVGBZrr */ |
| 90959 | 41738, |
| 90960 | /* VPAVGBZrrk */ |
| 90961 | 41741, |
| 90962 | /* VPAVGBZrrkz */ |
| 90963 | 41746, |
| 90964 | /* VPAVGBrm */ |
| 90965 | 41750, |
| 90966 | /* VPAVGBrr */ |
| 90967 | 41753, |
| 90968 | /* VPAVGWYrm */ |
| 90969 | 41756, |
| 90970 | /* VPAVGWYrr */ |
| 90971 | 41759, |
| 90972 | /* VPAVGWZ128rm */ |
| 90973 | 41762, |
| 90974 | /* VPAVGWZ128rmk */ |
| 90975 | 41765, |
| 90976 | /* VPAVGWZ128rmkz */ |
| 90977 | 41770, |
| 90978 | /* VPAVGWZ128rr */ |
| 90979 | 41774, |
| 90980 | /* VPAVGWZ128rrk */ |
| 90981 | 41777, |
| 90982 | /* VPAVGWZ128rrkz */ |
| 90983 | 41782, |
| 90984 | /* VPAVGWZ256rm */ |
| 90985 | 41786, |
| 90986 | /* VPAVGWZ256rmk */ |
| 90987 | 41789, |
| 90988 | /* VPAVGWZ256rmkz */ |
| 90989 | 41794, |
| 90990 | /* VPAVGWZ256rr */ |
| 90991 | 41798, |
| 90992 | /* VPAVGWZ256rrk */ |
| 90993 | 41801, |
| 90994 | /* VPAVGWZ256rrkz */ |
| 90995 | 41806, |
| 90996 | /* VPAVGWZrm */ |
| 90997 | 41810, |
| 90998 | /* VPAVGWZrmk */ |
| 90999 | 41813, |
| 91000 | /* VPAVGWZrmkz */ |
| 91001 | 41818, |
| 91002 | /* VPAVGWZrr */ |
| 91003 | 41822, |
| 91004 | /* VPAVGWZrrk */ |
| 91005 | 41825, |
| 91006 | /* VPAVGWZrrkz */ |
| 91007 | 41830, |
| 91008 | /* VPAVGWrm */ |
| 91009 | 41834, |
| 91010 | /* VPAVGWrr */ |
| 91011 | 41837, |
| 91012 | /* VPBLENDDYrmi */ |
| 91013 | 41840, |
| 91014 | /* VPBLENDDYrri */ |
| 91015 | 41844, |
| 91016 | /* VPBLENDDrmi */ |
| 91017 | 41848, |
| 91018 | /* VPBLENDDrri */ |
| 91019 | 41852, |
| 91020 | /* VPBLENDMBZ128rm */ |
| 91021 | 41856, |
| 91022 | /* VPBLENDMBZ128rmk */ |
| 91023 | 41859, |
| 91024 | /* VPBLENDMBZ128rmkz */ |
| 91025 | 41863, |
| 91026 | /* VPBLENDMBZ128rr */ |
| 91027 | 41867, |
| 91028 | /* VPBLENDMBZ128rrk */ |
| 91029 | 41870, |
| 91030 | /* VPBLENDMBZ128rrkz */ |
| 91031 | 41874, |
| 91032 | /* VPBLENDMBZ256rm */ |
| 91033 | 41878, |
| 91034 | /* VPBLENDMBZ256rmk */ |
| 91035 | 41881, |
| 91036 | /* VPBLENDMBZ256rmkz */ |
| 91037 | 41885, |
| 91038 | /* VPBLENDMBZ256rr */ |
| 91039 | 41889, |
| 91040 | /* VPBLENDMBZ256rrk */ |
| 91041 | 41892, |
| 91042 | /* VPBLENDMBZ256rrkz */ |
| 91043 | 41896, |
| 91044 | /* VPBLENDMBZrm */ |
| 91045 | 41900, |
| 91046 | /* VPBLENDMBZrmk */ |
| 91047 | 41903, |
| 91048 | /* VPBLENDMBZrmkz */ |
| 91049 | 41907, |
| 91050 | /* VPBLENDMBZrr */ |
| 91051 | 41911, |
| 91052 | /* VPBLENDMBZrrk */ |
| 91053 | 41914, |
| 91054 | /* VPBLENDMBZrrkz */ |
| 91055 | 41918, |
| 91056 | /* VPBLENDMDZ128rm */ |
| 91057 | 41922, |
| 91058 | /* VPBLENDMDZ128rmb */ |
| 91059 | 41925, |
| 91060 | /* VPBLENDMDZ128rmbk */ |
| 91061 | 41928, |
| 91062 | /* VPBLENDMDZ128rmbkz */ |
| 91063 | 41932, |
| 91064 | /* VPBLENDMDZ128rmk */ |
| 91065 | 41936, |
| 91066 | /* VPBLENDMDZ128rmkz */ |
| 91067 | 41940, |
| 91068 | /* VPBLENDMDZ128rr */ |
| 91069 | 41944, |
| 91070 | /* VPBLENDMDZ128rrk */ |
| 91071 | 41947, |
| 91072 | /* VPBLENDMDZ128rrkz */ |
| 91073 | 41951, |
| 91074 | /* VPBLENDMDZ256rm */ |
| 91075 | 41955, |
| 91076 | /* VPBLENDMDZ256rmb */ |
| 91077 | 41958, |
| 91078 | /* VPBLENDMDZ256rmbk */ |
| 91079 | 41961, |
| 91080 | /* VPBLENDMDZ256rmbkz */ |
| 91081 | 41965, |
| 91082 | /* VPBLENDMDZ256rmk */ |
| 91083 | 41969, |
| 91084 | /* VPBLENDMDZ256rmkz */ |
| 91085 | 41973, |
| 91086 | /* VPBLENDMDZ256rr */ |
| 91087 | 41977, |
| 91088 | /* VPBLENDMDZ256rrk */ |
| 91089 | 41980, |
| 91090 | /* VPBLENDMDZ256rrkz */ |
| 91091 | 41984, |
| 91092 | /* VPBLENDMDZrm */ |
| 91093 | 41988, |
| 91094 | /* VPBLENDMDZrmb */ |
| 91095 | 41991, |
| 91096 | /* VPBLENDMDZrmbk */ |
| 91097 | 41994, |
| 91098 | /* VPBLENDMDZrmbkz */ |
| 91099 | 41998, |
| 91100 | /* VPBLENDMDZrmk */ |
| 91101 | 42002, |
| 91102 | /* VPBLENDMDZrmkz */ |
| 91103 | 42006, |
| 91104 | /* VPBLENDMDZrr */ |
| 91105 | 42010, |
| 91106 | /* VPBLENDMDZrrk */ |
| 91107 | 42013, |
| 91108 | /* VPBLENDMDZrrkz */ |
| 91109 | 42017, |
| 91110 | /* VPBLENDMQZ128rm */ |
| 91111 | 42021, |
| 91112 | /* VPBLENDMQZ128rmb */ |
| 91113 | 42024, |
| 91114 | /* VPBLENDMQZ128rmbk */ |
| 91115 | 42027, |
| 91116 | /* VPBLENDMQZ128rmbkz */ |
| 91117 | 42031, |
| 91118 | /* VPBLENDMQZ128rmk */ |
| 91119 | 42035, |
| 91120 | /* VPBLENDMQZ128rmkz */ |
| 91121 | 42039, |
| 91122 | /* VPBLENDMQZ128rr */ |
| 91123 | 42043, |
| 91124 | /* VPBLENDMQZ128rrk */ |
| 91125 | 42046, |
| 91126 | /* VPBLENDMQZ128rrkz */ |
| 91127 | 42050, |
| 91128 | /* VPBLENDMQZ256rm */ |
| 91129 | 42054, |
| 91130 | /* VPBLENDMQZ256rmb */ |
| 91131 | 42057, |
| 91132 | /* VPBLENDMQZ256rmbk */ |
| 91133 | 42060, |
| 91134 | /* VPBLENDMQZ256rmbkz */ |
| 91135 | 42064, |
| 91136 | /* VPBLENDMQZ256rmk */ |
| 91137 | 42068, |
| 91138 | /* VPBLENDMQZ256rmkz */ |
| 91139 | 42072, |
| 91140 | /* VPBLENDMQZ256rr */ |
| 91141 | 42076, |
| 91142 | /* VPBLENDMQZ256rrk */ |
| 91143 | 42079, |
| 91144 | /* VPBLENDMQZ256rrkz */ |
| 91145 | 42083, |
| 91146 | /* VPBLENDMQZrm */ |
| 91147 | 42087, |
| 91148 | /* VPBLENDMQZrmb */ |
| 91149 | 42090, |
| 91150 | /* VPBLENDMQZrmbk */ |
| 91151 | 42093, |
| 91152 | /* VPBLENDMQZrmbkz */ |
| 91153 | 42097, |
| 91154 | /* VPBLENDMQZrmk */ |
| 91155 | 42101, |
| 91156 | /* VPBLENDMQZrmkz */ |
| 91157 | 42105, |
| 91158 | /* VPBLENDMQZrr */ |
| 91159 | 42109, |
| 91160 | /* VPBLENDMQZrrk */ |
| 91161 | 42112, |
| 91162 | /* VPBLENDMQZrrkz */ |
| 91163 | 42116, |
| 91164 | /* VPBLENDMWZ128rm */ |
| 91165 | 42120, |
| 91166 | /* VPBLENDMWZ128rmk */ |
| 91167 | 42123, |
| 91168 | /* VPBLENDMWZ128rmkz */ |
| 91169 | 42127, |
| 91170 | /* VPBLENDMWZ128rr */ |
| 91171 | 42131, |
| 91172 | /* VPBLENDMWZ128rrk */ |
| 91173 | 42134, |
| 91174 | /* VPBLENDMWZ128rrkz */ |
| 91175 | 42138, |
| 91176 | /* VPBLENDMWZ256rm */ |
| 91177 | 42142, |
| 91178 | /* VPBLENDMWZ256rmk */ |
| 91179 | 42145, |
| 91180 | /* VPBLENDMWZ256rmkz */ |
| 91181 | 42149, |
| 91182 | /* VPBLENDMWZ256rr */ |
| 91183 | 42153, |
| 91184 | /* VPBLENDMWZ256rrk */ |
| 91185 | 42156, |
| 91186 | /* VPBLENDMWZ256rrkz */ |
| 91187 | 42160, |
| 91188 | /* VPBLENDMWZrm */ |
| 91189 | 42164, |
| 91190 | /* VPBLENDMWZrmk */ |
| 91191 | 42167, |
| 91192 | /* VPBLENDMWZrmkz */ |
| 91193 | 42171, |
| 91194 | /* VPBLENDMWZrr */ |
| 91195 | 42175, |
| 91196 | /* VPBLENDMWZrrk */ |
| 91197 | 42178, |
| 91198 | /* VPBLENDMWZrrkz */ |
| 91199 | 42182, |
| 91200 | /* VPBLENDVBYrmr */ |
| 91201 | 42186, |
| 91202 | /* VPBLENDVBYrrr */ |
| 91203 | 42190, |
| 91204 | /* VPBLENDVBrmr */ |
| 91205 | 42194, |
| 91206 | /* VPBLENDVBrrr */ |
| 91207 | 42198, |
| 91208 | /* VPBLENDWYrmi */ |
| 91209 | 42202, |
| 91210 | /* VPBLENDWYrri */ |
| 91211 | 42206, |
| 91212 | /* VPBLENDWrmi */ |
| 91213 | 42210, |
| 91214 | /* VPBLENDWrri */ |
| 91215 | 42214, |
| 91216 | /* VPBROADCASTBYrm */ |
| 91217 | 42218, |
| 91218 | /* VPBROADCASTBYrr */ |
| 91219 | 42220, |
| 91220 | /* VPBROADCASTBZ128rm */ |
| 91221 | 42222, |
| 91222 | /* VPBROADCASTBZ128rmk */ |
| 91223 | 42224, |
| 91224 | /* VPBROADCASTBZ128rmkz */ |
| 91225 | 42228, |
| 91226 | /* VPBROADCASTBZ128rr */ |
| 91227 | 42231, |
| 91228 | /* VPBROADCASTBZ128rrk */ |
| 91229 | 42233, |
| 91230 | /* VPBROADCASTBZ128rrkz */ |
| 91231 | 42237, |
| 91232 | /* VPBROADCASTBZ256rm */ |
| 91233 | 42240, |
| 91234 | /* VPBROADCASTBZ256rmk */ |
| 91235 | 42242, |
| 91236 | /* VPBROADCASTBZ256rmkz */ |
| 91237 | 42246, |
| 91238 | /* VPBROADCASTBZ256rr */ |
| 91239 | 42249, |
| 91240 | /* VPBROADCASTBZ256rrk */ |
| 91241 | 42251, |
| 91242 | /* VPBROADCASTBZ256rrkz */ |
| 91243 | 42255, |
| 91244 | /* VPBROADCASTBZrm */ |
| 91245 | 42258, |
| 91246 | /* VPBROADCASTBZrmk */ |
| 91247 | 42260, |
| 91248 | /* VPBROADCASTBZrmkz */ |
| 91249 | 42264, |
| 91250 | /* VPBROADCASTBZrr */ |
| 91251 | 42267, |
| 91252 | /* VPBROADCASTBZrrk */ |
| 91253 | 42269, |
| 91254 | /* VPBROADCASTBZrrkz */ |
| 91255 | 42273, |
| 91256 | /* VPBROADCASTBrZ128rr */ |
| 91257 | 42276, |
| 91258 | /* VPBROADCASTBrZ128rrk */ |
| 91259 | 42278, |
| 91260 | /* VPBROADCASTBrZ128rrkz */ |
| 91261 | 42282, |
| 91262 | /* VPBROADCASTBrZ256rr */ |
| 91263 | 42285, |
| 91264 | /* VPBROADCASTBrZ256rrk */ |
| 91265 | 42287, |
| 91266 | /* VPBROADCASTBrZ256rrkz */ |
| 91267 | 42291, |
| 91268 | /* VPBROADCASTBrZrr */ |
| 91269 | 42294, |
| 91270 | /* VPBROADCASTBrZrrk */ |
| 91271 | 42296, |
| 91272 | /* VPBROADCASTBrZrrkz */ |
| 91273 | 42300, |
| 91274 | /* VPBROADCASTBrm */ |
| 91275 | 42303, |
| 91276 | /* VPBROADCASTBrr */ |
| 91277 | 42305, |
| 91278 | /* VPBROADCASTDYrm */ |
| 91279 | 42307, |
| 91280 | /* VPBROADCASTDYrr */ |
| 91281 | 42309, |
| 91282 | /* VPBROADCASTDZ128rm */ |
| 91283 | 42311, |
| 91284 | /* VPBROADCASTDZ128rmk */ |
| 91285 | 42313, |
| 91286 | /* VPBROADCASTDZ128rmkz */ |
| 91287 | 42317, |
| 91288 | /* VPBROADCASTDZ128rr */ |
| 91289 | 42320, |
| 91290 | /* VPBROADCASTDZ128rrk */ |
| 91291 | 42322, |
| 91292 | /* VPBROADCASTDZ128rrkz */ |
| 91293 | 42326, |
| 91294 | /* VPBROADCASTDZ256rm */ |
| 91295 | 42329, |
| 91296 | /* VPBROADCASTDZ256rmk */ |
| 91297 | 42331, |
| 91298 | /* VPBROADCASTDZ256rmkz */ |
| 91299 | 42335, |
| 91300 | /* VPBROADCASTDZ256rr */ |
| 91301 | 42338, |
| 91302 | /* VPBROADCASTDZ256rrk */ |
| 91303 | 42340, |
| 91304 | /* VPBROADCASTDZ256rrkz */ |
| 91305 | 42344, |
| 91306 | /* VPBROADCASTDZrm */ |
| 91307 | 42347, |
| 91308 | /* VPBROADCASTDZrmk */ |
| 91309 | 42349, |
| 91310 | /* VPBROADCASTDZrmkz */ |
| 91311 | 42353, |
| 91312 | /* VPBROADCASTDZrr */ |
| 91313 | 42356, |
| 91314 | /* VPBROADCASTDZrrk */ |
| 91315 | 42358, |
| 91316 | /* VPBROADCASTDZrrkz */ |
| 91317 | 42362, |
| 91318 | /* VPBROADCASTDrZ128rr */ |
| 91319 | 42365, |
| 91320 | /* VPBROADCASTDrZ128rrk */ |
| 91321 | 42367, |
| 91322 | /* VPBROADCASTDrZ128rrkz */ |
| 91323 | 42371, |
| 91324 | /* VPBROADCASTDrZ256rr */ |
| 91325 | 42374, |
| 91326 | /* VPBROADCASTDrZ256rrk */ |
| 91327 | 42376, |
| 91328 | /* VPBROADCASTDrZ256rrkz */ |
| 91329 | 42380, |
| 91330 | /* VPBROADCASTDrZrr */ |
| 91331 | 42383, |
| 91332 | /* VPBROADCASTDrZrrk */ |
| 91333 | 42385, |
| 91334 | /* VPBROADCASTDrZrrkz */ |
| 91335 | 42389, |
| 91336 | /* VPBROADCASTDrm */ |
| 91337 | 42392, |
| 91338 | /* VPBROADCASTDrr */ |
| 91339 | 42394, |
| 91340 | /* VPBROADCASTMB2QZ128rr */ |
| 91341 | 42396, |
| 91342 | /* VPBROADCASTMB2QZ256rr */ |
| 91343 | 42398, |
| 91344 | /* VPBROADCASTMB2QZrr */ |
| 91345 | 42400, |
| 91346 | /* VPBROADCASTMW2DZ128rr */ |
| 91347 | 42402, |
| 91348 | /* VPBROADCASTMW2DZ256rr */ |
| 91349 | 42404, |
| 91350 | /* VPBROADCASTMW2DZrr */ |
| 91351 | 42406, |
| 91352 | /* VPBROADCASTQYrm */ |
| 91353 | 42408, |
| 91354 | /* VPBROADCASTQYrr */ |
| 91355 | 42410, |
| 91356 | /* VPBROADCASTQZ128rm */ |
| 91357 | 42412, |
| 91358 | /* VPBROADCASTQZ128rmk */ |
| 91359 | 42414, |
| 91360 | /* VPBROADCASTQZ128rmkz */ |
| 91361 | 42418, |
| 91362 | /* VPBROADCASTQZ128rr */ |
| 91363 | 42421, |
| 91364 | /* VPBROADCASTQZ128rrk */ |
| 91365 | 42423, |
| 91366 | /* VPBROADCASTQZ128rrkz */ |
| 91367 | 42427, |
| 91368 | /* VPBROADCASTQZ256rm */ |
| 91369 | 42430, |
| 91370 | /* VPBROADCASTQZ256rmk */ |
| 91371 | 42432, |
| 91372 | /* VPBROADCASTQZ256rmkz */ |
| 91373 | 42436, |
| 91374 | /* VPBROADCASTQZ256rr */ |
| 91375 | 42439, |
| 91376 | /* VPBROADCASTQZ256rrk */ |
| 91377 | 42441, |
| 91378 | /* VPBROADCASTQZ256rrkz */ |
| 91379 | 42445, |
| 91380 | /* VPBROADCASTQZrm */ |
| 91381 | 42448, |
| 91382 | /* VPBROADCASTQZrmk */ |
| 91383 | 42450, |
| 91384 | /* VPBROADCASTQZrmkz */ |
| 91385 | 42454, |
| 91386 | /* VPBROADCASTQZrr */ |
| 91387 | 42457, |
| 91388 | /* VPBROADCASTQZrrk */ |
| 91389 | 42459, |
| 91390 | /* VPBROADCASTQZrrkz */ |
| 91391 | 42463, |
| 91392 | /* VPBROADCASTQrZ128rr */ |
| 91393 | 42466, |
| 91394 | /* VPBROADCASTQrZ128rrk */ |
| 91395 | 42468, |
| 91396 | /* VPBROADCASTQrZ128rrkz */ |
| 91397 | 42472, |
| 91398 | /* VPBROADCASTQrZ256rr */ |
| 91399 | 42475, |
| 91400 | /* VPBROADCASTQrZ256rrk */ |
| 91401 | 42477, |
| 91402 | /* VPBROADCASTQrZ256rrkz */ |
| 91403 | 42481, |
| 91404 | /* VPBROADCASTQrZrr */ |
| 91405 | 42484, |
| 91406 | /* VPBROADCASTQrZrrk */ |
| 91407 | 42486, |
| 91408 | /* VPBROADCASTQrZrrkz */ |
| 91409 | 42490, |
| 91410 | /* VPBROADCASTQrm */ |
| 91411 | 42493, |
| 91412 | /* VPBROADCASTQrr */ |
| 91413 | 42495, |
| 91414 | /* VPBROADCASTWYrm */ |
| 91415 | 42497, |
| 91416 | /* VPBROADCASTWYrr */ |
| 91417 | 42499, |
| 91418 | /* VPBROADCASTWZ128rm */ |
| 91419 | 42501, |
| 91420 | /* VPBROADCASTWZ128rmk */ |
| 91421 | 42503, |
| 91422 | /* VPBROADCASTWZ128rmkz */ |
| 91423 | 42507, |
| 91424 | /* VPBROADCASTWZ128rr */ |
| 91425 | 42510, |
| 91426 | /* VPBROADCASTWZ128rrk */ |
| 91427 | 42512, |
| 91428 | /* VPBROADCASTWZ128rrkz */ |
| 91429 | 42516, |
| 91430 | /* VPBROADCASTWZ256rm */ |
| 91431 | 42519, |
| 91432 | /* VPBROADCASTWZ256rmk */ |
| 91433 | 42521, |
| 91434 | /* VPBROADCASTWZ256rmkz */ |
| 91435 | 42525, |
| 91436 | /* VPBROADCASTWZ256rr */ |
| 91437 | 42528, |
| 91438 | /* VPBROADCASTWZ256rrk */ |
| 91439 | 42530, |
| 91440 | /* VPBROADCASTWZ256rrkz */ |
| 91441 | 42534, |
| 91442 | /* VPBROADCASTWZrm */ |
| 91443 | 42537, |
| 91444 | /* VPBROADCASTWZrmk */ |
| 91445 | 42539, |
| 91446 | /* VPBROADCASTWZrmkz */ |
| 91447 | 42543, |
| 91448 | /* VPBROADCASTWZrr */ |
| 91449 | 42546, |
| 91450 | /* VPBROADCASTWZrrk */ |
| 91451 | 42548, |
| 91452 | /* VPBROADCASTWZrrkz */ |
| 91453 | 42552, |
| 91454 | /* VPBROADCASTWrZ128rr */ |
| 91455 | 42555, |
| 91456 | /* VPBROADCASTWrZ128rrk */ |
| 91457 | 42557, |
| 91458 | /* VPBROADCASTWrZ128rrkz */ |
| 91459 | 42561, |
| 91460 | /* VPBROADCASTWrZ256rr */ |
| 91461 | 42564, |
| 91462 | /* VPBROADCASTWrZ256rrk */ |
| 91463 | 42566, |
| 91464 | /* VPBROADCASTWrZ256rrkz */ |
| 91465 | 42570, |
| 91466 | /* VPBROADCASTWrZrr */ |
| 91467 | 42573, |
| 91468 | /* VPBROADCASTWrZrrk */ |
| 91469 | 42575, |
| 91470 | /* VPBROADCASTWrZrrkz */ |
| 91471 | 42579, |
| 91472 | /* VPBROADCASTWrm */ |
| 91473 | 42582, |
| 91474 | /* VPBROADCASTWrr */ |
| 91475 | 42584, |
| 91476 | /* VPCLMULQDQYrmi */ |
| 91477 | 42586, |
| 91478 | /* VPCLMULQDQYrri */ |
| 91479 | 42590, |
| 91480 | /* VPCLMULQDQZ128rmi */ |
| 91481 | 42594, |
| 91482 | /* VPCLMULQDQZ128rri */ |
| 91483 | 42598, |
| 91484 | /* VPCLMULQDQZ256rmi */ |
| 91485 | 42602, |
| 91486 | /* VPCLMULQDQZ256rri */ |
| 91487 | 42606, |
| 91488 | /* VPCLMULQDQZrmi */ |
| 91489 | 42610, |
| 91490 | /* VPCLMULQDQZrri */ |
| 91491 | 42614, |
| 91492 | /* VPCLMULQDQrmi */ |
| 91493 | 42618, |
| 91494 | /* VPCLMULQDQrri */ |
| 91495 | 42622, |
| 91496 | /* VPCMOVYrmr */ |
| 91497 | 42626, |
| 91498 | /* VPCMOVYrrm */ |
| 91499 | 42630, |
| 91500 | /* VPCMOVYrrr */ |
| 91501 | 42634, |
| 91502 | /* VPCMOVYrrr_REV */ |
| 91503 | 42638, |
| 91504 | /* VPCMOVrmr */ |
| 91505 | 42642, |
| 91506 | /* VPCMOVrrm */ |
| 91507 | 42646, |
| 91508 | /* VPCMOVrrr */ |
| 91509 | 42650, |
| 91510 | /* VPCMOVrrr_REV */ |
| 91511 | 42654, |
| 91512 | /* VPCMPBZ128rmi */ |
| 91513 | 42658, |
| 91514 | /* VPCMPBZ128rmik */ |
| 91515 | 42662, |
| 91516 | /* VPCMPBZ128rri */ |
| 91517 | 42667, |
| 91518 | /* VPCMPBZ128rrik */ |
| 91519 | 42671, |
| 91520 | /* VPCMPBZ256rmi */ |
| 91521 | 42676, |
| 91522 | /* VPCMPBZ256rmik */ |
| 91523 | 42680, |
| 91524 | /* VPCMPBZ256rri */ |
| 91525 | 42685, |
| 91526 | /* VPCMPBZ256rrik */ |
| 91527 | 42689, |
| 91528 | /* VPCMPBZrmi */ |
| 91529 | 42694, |
| 91530 | /* VPCMPBZrmik */ |
| 91531 | 42698, |
| 91532 | /* VPCMPBZrri */ |
| 91533 | 42703, |
| 91534 | /* VPCMPBZrrik */ |
| 91535 | 42707, |
| 91536 | /* VPCMPDZ128rmi */ |
| 91537 | 42712, |
| 91538 | /* VPCMPDZ128rmib */ |
| 91539 | 42716, |
| 91540 | /* VPCMPDZ128rmibk */ |
| 91541 | 42720, |
| 91542 | /* VPCMPDZ128rmik */ |
| 91543 | 42725, |
| 91544 | /* VPCMPDZ128rri */ |
| 91545 | 42730, |
| 91546 | /* VPCMPDZ128rrik */ |
| 91547 | 42734, |
| 91548 | /* VPCMPDZ256rmi */ |
| 91549 | 42739, |
| 91550 | /* VPCMPDZ256rmib */ |
| 91551 | 42743, |
| 91552 | /* VPCMPDZ256rmibk */ |
| 91553 | 42747, |
| 91554 | /* VPCMPDZ256rmik */ |
| 91555 | 42752, |
| 91556 | /* VPCMPDZ256rri */ |
| 91557 | 42757, |
| 91558 | /* VPCMPDZ256rrik */ |
| 91559 | 42761, |
| 91560 | /* VPCMPDZrmi */ |
| 91561 | 42766, |
| 91562 | /* VPCMPDZrmib */ |
| 91563 | 42770, |
| 91564 | /* VPCMPDZrmibk */ |
| 91565 | 42774, |
| 91566 | /* VPCMPDZrmik */ |
| 91567 | 42779, |
| 91568 | /* VPCMPDZrri */ |
| 91569 | 42784, |
| 91570 | /* VPCMPDZrrik */ |
| 91571 | 42788, |
| 91572 | /* VPCMPEQBYrm */ |
| 91573 | 42793, |
| 91574 | /* VPCMPEQBYrr */ |
| 91575 | 42796, |
| 91576 | /* VPCMPEQBZ128rm */ |
| 91577 | 42799, |
| 91578 | /* VPCMPEQBZ128rmk */ |
| 91579 | 42802, |
| 91580 | /* VPCMPEQBZ128rr */ |
| 91581 | 42806, |
| 91582 | /* VPCMPEQBZ128rrk */ |
| 91583 | 42809, |
| 91584 | /* VPCMPEQBZ256rm */ |
| 91585 | 42813, |
| 91586 | /* VPCMPEQBZ256rmk */ |
| 91587 | 42816, |
| 91588 | /* VPCMPEQBZ256rr */ |
| 91589 | 42820, |
| 91590 | /* VPCMPEQBZ256rrk */ |
| 91591 | 42823, |
| 91592 | /* VPCMPEQBZrm */ |
| 91593 | 42827, |
| 91594 | /* VPCMPEQBZrmk */ |
| 91595 | 42830, |
| 91596 | /* VPCMPEQBZrr */ |
| 91597 | 42834, |
| 91598 | /* VPCMPEQBZrrk */ |
| 91599 | 42837, |
| 91600 | /* VPCMPEQBrm */ |
| 91601 | 42841, |
| 91602 | /* VPCMPEQBrr */ |
| 91603 | 42844, |
| 91604 | /* VPCMPEQDYrm */ |
| 91605 | 42847, |
| 91606 | /* VPCMPEQDYrr */ |
| 91607 | 42850, |
| 91608 | /* VPCMPEQDZ128rm */ |
| 91609 | 42853, |
| 91610 | /* VPCMPEQDZ128rmb */ |
| 91611 | 42856, |
| 91612 | /* VPCMPEQDZ128rmbk */ |
| 91613 | 42859, |
| 91614 | /* VPCMPEQDZ128rmk */ |
| 91615 | 42863, |
| 91616 | /* VPCMPEQDZ128rr */ |
| 91617 | 42867, |
| 91618 | /* VPCMPEQDZ128rrk */ |
| 91619 | 42870, |
| 91620 | /* VPCMPEQDZ256rm */ |
| 91621 | 42874, |
| 91622 | /* VPCMPEQDZ256rmb */ |
| 91623 | 42877, |
| 91624 | /* VPCMPEQDZ256rmbk */ |
| 91625 | 42880, |
| 91626 | /* VPCMPEQDZ256rmk */ |
| 91627 | 42884, |
| 91628 | /* VPCMPEQDZ256rr */ |
| 91629 | 42888, |
| 91630 | /* VPCMPEQDZ256rrk */ |
| 91631 | 42891, |
| 91632 | /* VPCMPEQDZrm */ |
| 91633 | 42895, |
| 91634 | /* VPCMPEQDZrmb */ |
| 91635 | 42898, |
| 91636 | /* VPCMPEQDZrmbk */ |
| 91637 | 42901, |
| 91638 | /* VPCMPEQDZrmk */ |
| 91639 | 42905, |
| 91640 | /* VPCMPEQDZrr */ |
| 91641 | 42909, |
| 91642 | /* VPCMPEQDZrrk */ |
| 91643 | 42912, |
| 91644 | /* VPCMPEQDrm */ |
| 91645 | 42916, |
| 91646 | /* VPCMPEQDrr */ |
| 91647 | 42919, |
| 91648 | /* VPCMPEQQYrm */ |
| 91649 | 42922, |
| 91650 | /* VPCMPEQQYrr */ |
| 91651 | 42925, |
| 91652 | /* VPCMPEQQZ128rm */ |
| 91653 | 42928, |
| 91654 | /* VPCMPEQQZ128rmb */ |
| 91655 | 42931, |
| 91656 | /* VPCMPEQQZ128rmbk */ |
| 91657 | 42934, |
| 91658 | /* VPCMPEQQZ128rmk */ |
| 91659 | 42938, |
| 91660 | /* VPCMPEQQZ128rr */ |
| 91661 | 42942, |
| 91662 | /* VPCMPEQQZ128rrk */ |
| 91663 | 42945, |
| 91664 | /* VPCMPEQQZ256rm */ |
| 91665 | 42949, |
| 91666 | /* VPCMPEQQZ256rmb */ |
| 91667 | 42952, |
| 91668 | /* VPCMPEQQZ256rmbk */ |
| 91669 | 42955, |
| 91670 | /* VPCMPEQQZ256rmk */ |
| 91671 | 42959, |
| 91672 | /* VPCMPEQQZ256rr */ |
| 91673 | 42963, |
| 91674 | /* VPCMPEQQZ256rrk */ |
| 91675 | 42966, |
| 91676 | /* VPCMPEQQZrm */ |
| 91677 | 42970, |
| 91678 | /* VPCMPEQQZrmb */ |
| 91679 | 42973, |
| 91680 | /* VPCMPEQQZrmbk */ |
| 91681 | 42976, |
| 91682 | /* VPCMPEQQZrmk */ |
| 91683 | 42980, |
| 91684 | /* VPCMPEQQZrr */ |
| 91685 | 42984, |
| 91686 | /* VPCMPEQQZrrk */ |
| 91687 | 42987, |
| 91688 | /* VPCMPEQQrm */ |
| 91689 | 42991, |
| 91690 | /* VPCMPEQQrr */ |
| 91691 | 42994, |
| 91692 | /* VPCMPEQWYrm */ |
| 91693 | 42997, |
| 91694 | /* VPCMPEQWYrr */ |
| 91695 | 43000, |
| 91696 | /* VPCMPEQWZ128rm */ |
| 91697 | 43003, |
| 91698 | /* VPCMPEQWZ128rmk */ |
| 91699 | 43006, |
| 91700 | /* VPCMPEQWZ128rr */ |
| 91701 | 43010, |
| 91702 | /* VPCMPEQWZ128rrk */ |
| 91703 | 43013, |
| 91704 | /* VPCMPEQWZ256rm */ |
| 91705 | 43017, |
| 91706 | /* VPCMPEQWZ256rmk */ |
| 91707 | 43020, |
| 91708 | /* VPCMPEQWZ256rr */ |
| 91709 | 43024, |
| 91710 | /* VPCMPEQWZ256rrk */ |
| 91711 | 43027, |
| 91712 | /* VPCMPEQWZrm */ |
| 91713 | 43031, |
| 91714 | /* VPCMPEQWZrmk */ |
| 91715 | 43034, |
| 91716 | /* VPCMPEQWZrr */ |
| 91717 | 43038, |
| 91718 | /* VPCMPEQWZrrk */ |
| 91719 | 43041, |
| 91720 | /* VPCMPEQWrm */ |
| 91721 | 43045, |
| 91722 | /* VPCMPEQWrr */ |
| 91723 | 43048, |
| 91724 | /* VPCMPESTRIrmi */ |
| 91725 | 43051, |
| 91726 | /* VPCMPESTRIrri */ |
| 91727 | 43054, |
| 91728 | /* VPCMPESTRMrmi */ |
| 91729 | 43057, |
| 91730 | /* VPCMPESTRMrri */ |
| 91731 | 43060, |
| 91732 | /* VPCMPGTBYrm */ |
| 91733 | 43063, |
| 91734 | /* VPCMPGTBYrr */ |
| 91735 | 43066, |
| 91736 | /* VPCMPGTBZ128rm */ |
| 91737 | 43069, |
| 91738 | /* VPCMPGTBZ128rmk */ |
| 91739 | 43072, |
| 91740 | /* VPCMPGTBZ128rr */ |
| 91741 | 43076, |
| 91742 | /* VPCMPGTBZ128rrk */ |
| 91743 | 43079, |
| 91744 | /* VPCMPGTBZ256rm */ |
| 91745 | 43083, |
| 91746 | /* VPCMPGTBZ256rmk */ |
| 91747 | 43086, |
| 91748 | /* VPCMPGTBZ256rr */ |
| 91749 | 43090, |
| 91750 | /* VPCMPGTBZ256rrk */ |
| 91751 | 43093, |
| 91752 | /* VPCMPGTBZrm */ |
| 91753 | 43097, |
| 91754 | /* VPCMPGTBZrmk */ |
| 91755 | 43100, |
| 91756 | /* VPCMPGTBZrr */ |
| 91757 | 43104, |
| 91758 | /* VPCMPGTBZrrk */ |
| 91759 | 43107, |
| 91760 | /* VPCMPGTBrm */ |
| 91761 | 43111, |
| 91762 | /* VPCMPGTBrr */ |
| 91763 | 43114, |
| 91764 | /* VPCMPGTDYrm */ |
| 91765 | 43117, |
| 91766 | /* VPCMPGTDYrr */ |
| 91767 | 43120, |
| 91768 | /* VPCMPGTDZ128rm */ |
| 91769 | 43123, |
| 91770 | /* VPCMPGTDZ128rmb */ |
| 91771 | 43126, |
| 91772 | /* VPCMPGTDZ128rmbk */ |
| 91773 | 43129, |
| 91774 | /* VPCMPGTDZ128rmk */ |
| 91775 | 43133, |
| 91776 | /* VPCMPGTDZ128rr */ |
| 91777 | 43137, |
| 91778 | /* VPCMPGTDZ128rrk */ |
| 91779 | 43140, |
| 91780 | /* VPCMPGTDZ256rm */ |
| 91781 | 43144, |
| 91782 | /* VPCMPGTDZ256rmb */ |
| 91783 | 43147, |
| 91784 | /* VPCMPGTDZ256rmbk */ |
| 91785 | 43150, |
| 91786 | /* VPCMPGTDZ256rmk */ |
| 91787 | 43154, |
| 91788 | /* VPCMPGTDZ256rr */ |
| 91789 | 43158, |
| 91790 | /* VPCMPGTDZ256rrk */ |
| 91791 | 43161, |
| 91792 | /* VPCMPGTDZrm */ |
| 91793 | 43165, |
| 91794 | /* VPCMPGTDZrmb */ |
| 91795 | 43168, |
| 91796 | /* VPCMPGTDZrmbk */ |
| 91797 | 43171, |
| 91798 | /* VPCMPGTDZrmk */ |
| 91799 | 43175, |
| 91800 | /* VPCMPGTDZrr */ |
| 91801 | 43179, |
| 91802 | /* VPCMPGTDZrrk */ |
| 91803 | 43182, |
| 91804 | /* VPCMPGTDrm */ |
| 91805 | 43186, |
| 91806 | /* VPCMPGTDrr */ |
| 91807 | 43189, |
| 91808 | /* VPCMPGTQYrm */ |
| 91809 | 43192, |
| 91810 | /* VPCMPGTQYrr */ |
| 91811 | 43195, |
| 91812 | /* VPCMPGTQZ128rm */ |
| 91813 | 43198, |
| 91814 | /* VPCMPGTQZ128rmb */ |
| 91815 | 43201, |
| 91816 | /* VPCMPGTQZ128rmbk */ |
| 91817 | 43204, |
| 91818 | /* VPCMPGTQZ128rmk */ |
| 91819 | 43208, |
| 91820 | /* VPCMPGTQZ128rr */ |
| 91821 | 43212, |
| 91822 | /* VPCMPGTQZ128rrk */ |
| 91823 | 43215, |
| 91824 | /* VPCMPGTQZ256rm */ |
| 91825 | 43219, |
| 91826 | /* VPCMPGTQZ256rmb */ |
| 91827 | 43222, |
| 91828 | /* VPCMPGTQZ256rmbk */ |
| 91829 | 43225, |
| 91830 | /* VPCMPGTQZ256rmk */ |
| 91831 | 43229, |
| 91832 | /* VPCMPGTQZ256rr */ |
| 91833 | 43233, |
| 91834 | /* VPCMPGTQZ256rrk */ |
| 91835 | 43236, |
| 91836 | /* VPCMPGTQZrm */ |
| 91837 | 43240, |
| 91838 | /* VPCMPGTQZrmb */ |
| 91839 | 43243, |
| 91840 | /* VPCMPGTQZrmbk */ |
| 91841 | 43246, |
| 91842 | /* VPCMPGTQZrmk */ |
| 91843 | 43250, |
| 91844 | /* VPCMPGTQZrr */ |
| 91845 | 43254, |
| 91846 | /* VPCMPGTQZrrk */ |
| 91847 | 43257, |
| 91848 | /* VPCMPGTQrm */ |
| 91849 | 43261, |
| 91850 | /* VPCMPGTQrr */ |
| 91851 | 43264, |
| 91852 | /* VPCMPGTWYrm */ |
| 91853 | 43267, |
| 91854 | /* VPCMPGTWYrr */ |
| 91855 | 43270, |
| 91856 | /* VPCMPGTWZ128rm */ |
| 91857 | 43273, |
| 91858 | /* VPCMPGTWZ128rmk */ |
| 91859 | 43276, |
| 91860 | /* VPCMPGTWZ128rr */ |
| 91861 | 43280, |
| 91862 | /* VPCMPGTWZ128rrk */ |
| 91863 | 43283, |
| 91864 | /* VPCMPGTWZ256rm */ |
| 91865 | 43287, |
| 91866 | /* VPCMPGTWZ256rmk */ |
| 91867 | 43290, |
| 91868 | /* VPCMPGTWZ256rr */ |
| 91869 | 43294, |
| 91870 | /* VPCMPGTWZ256rrk */ |
| 91871 | 43297, |
| 91872 | /* VPCMPGTWZrm */ |
| 91873 | 43301, |
| 91874 | /* VPCMPGTWZrmk */ |
| 91875 | 43304, |
| 91876 | /* VPCMPGTWZrr */ |
| 91877 | 43308, |
| 91878 | /* VPCMPGTWZrrk */ |
| 91879 | 43311, |
| 91880 | /* VPCMPGTWrm */ |
| 91881 | 43315, |
| 91882 | /* VPCMPGTWrr */ |
| 91883 | 43318, |
| 91884 | /* VPCMPISTRIrmi */ |
| 91885 | 43321, |
| 91886 | /* VPCMPISTRIrri */ |
| 91887 | 43324, |
| 91888 | /* VPCMPISTRMrmi */ |
| 91889 | 43327, |
| 91890 | /* VPCMPISTRMrri */ |
| 91891 | 43330, |
| 91892 | /* VPCMPQZ128rmi */ |
| 91893 | 43333, |
| 91894 | /* VPCMPQZ128rmib */ |
| 91895 | 43337, |
| 91896 | /* VPCMPQZ128rmibk */ |
| 91897 | 43341, |
| 91898 | /* VPCMPQZ128rmik */ |
| 91899 | 43346, |
| 91900 | /* VPCMPQZ128rri */ |
| 91901 | 43351, |
| 91902 | /* VPCMPQZ128rrik */ |
| 91903 | 43355, |
| 91904 | /* VPCMPQZ256rmi */ |
| 91905 | 43360, |
| 91906 | /* VPCMPQZ256rmib */ |
| 91907 | 43364, |
| 91908 | /* VPCMPQZ256rmibk */ |
| 91909 | 43368, |
| 91910 | /* VPCMPQZ256rmik */ |
| 91911 | 43373, |
| 91912 | /* VPCMPQZ256rri */ |
| 91913 | 43378, |
| 91914 | /* VPCMPQZ256rrik */ |
| 91915 | 43382, |
| 91916 | /* VPCMPQZrmi */ |
| 91917 | 43387, |
| 91918 | /* VPCMPQZrmib */ |
| 91919 | 43391, |
| 91920 | /* VPCMPQZrmibk */ |
| 91921 | 43395, |
| 91922 | /* VPCMPQZrmik */ |
| 91923 | 43400, |
| 91924 | /* VPCMPQZrri */ |
| 91925 | 43405, |
| 91926 | /* VPCMPQZrrik */ |
| 91927 | 43409, |
| 91928 | /* VPCMPUBZ128rmi */ |
| 91929 | 43414, |
| 91930 | /* VPCMPUBZ128rmik */ |
| 91931 | 43418, |
| 91932 | /* VPCMPUBZ128rri */ |
| 91933 | 43423, |
| 91934 | /* VPCMPUBZ128rrik */ |
| 91935 | 43427, |
| 91936 | /* VPCMPUBZ256rmi */ |
| 91937 | 43432, |
| 91938 | /* VPCMPUBZ256rmik */ |
| 91939 | 43436, |
| 91940 | /* VPCMPUBZ256rri */ |
| 91941 | 43441, |
| 91942 | /* VPCMPUBZ256rrik */ |
| 91943 | 43445, |
| 91944 | /* VPCMPUBZrmi */ |
| 91945 | 43450, |
| 91946 | /* VPCMPUBZrmik */ |
| 91947 | 43454, |
| 91948 | /* VPCMPUBZrri */ |
| 91949 | 43459, |
| 91950 | /* VPCMPUBZrrik */ |
| 91951 | 43463, |
| 91952 | /* VPCMPUDZ128rmi */ |
| 91953 | 43468, |
| 91954 | /* VPCMPUDZ128rmib */ |
| 91955 | 43472, |
| 91956 | /* VPCMPUDZ128rmibk */ |
| 91957 | 43476, |
| 91958 | /* VPCMPUDZ128rmik */ |
| 91959 | 43481, |
| 91960 | /* VPCMPUDZ128rri */ |
| 91961 | 43486, |
| 91962 | /* VPCMPUDZ128rrik */ |
| 91963 | 43490, |
| 91964 | /* VPCMPUDZ256rmi */ |
| 91965 | 43495, |
| 91966 | /* VPCMPUDZ256rmib */ |
| 91967 | 43499, |
| 91968 | /* VPCMPUDZ256rmibk */ |
| 91969 | 43503, |
| 91970 | /* VPCMPUDZ256rmik */ |
| 91971 | 43508, |
| 91972 | /* VPCMPUDZ256rri */ |
| 91973 | 43513, |
| 91974 | /* VPCMPUDZ256rrik */ |
| 91975 | 43517, |
| 91976 | /* VPCMPUDZrmi */ |
| 91977 | 43522, |
| 91978 | /* VPCMPUDZrmib */ |
| 91979 | 43526, |
| 91980 | /* VPCMPUDZrmibk */ |
| 91981 | 43530, |
| 91982 | /* VPCMPUDZrmik */ |
| 91983 | 43535, |
| 91984 | /* VPCMPUDZrri */ |
| 91985 | 43540, |
| 91986 | /* VPCMPUDZrrik */ |
| 91987 | 43544, |
| 91988 | /* VPCMPUQZ128rmi */ |
| 91989 | 43549, |
| 91990 | /* VPCMPUQZ128rmib */ |
| 91991 | 43553, |
| 91992 | /* VPCMPUQZ128rmibk */ |
| 91993 | 43557, |
| 91994 | /* VPCMPUQZ128rmik */ |
| 91995 | 43562, |
| 91996 | /* VPCMPUQZ128rri */ |
| 91997 | 43567, |
| 91998 | /* VPCMPUQZ128rrik */ |
| 91999 | 43571, |
| 92000 | /* VPCMPUQZ256rmi */ |
| 92001 | 43576, |
| 92002 | /* VPCMPUQZ256rmib */ |
| 92003 | 43580, |
| 92004 | /* VPCMPUQZ256rmibk */ |
| 92005 | 43584, |
| 92006 | /* VPCMPUQZ256rmik */ |
| 92007 | 43589, |
| 92008 | /* VPCMPUQZ256rri */ |
| 92009 | 43594, |
| 92010 | /* VPCMPUQZ256rrik */ |
| 92011 | 43598, |
| 92012 | /* VPCMPUQZrmi */ |
| 92013 | 43603, |
| 92014 | /* VPCMPUQZrmib */ |
| 92015 | 43607, |
| 92016 | /* VPCMPUQZrmibk */ |
| 92017 | 43611, |
| 92018 | /* VPCMPUQZrmik */ |
| 92019 | 43616, |
| 92020 | /* VPCMPUQZrri */ |
| 92021 | 43621, |
| 92022 | /* VPCMPUQZrrik */ |
| 92023 | 43625, |
| 92024 | /* VPCMPUWZ128rmi */ |
| 92025 | 43630, |
| 92026 | /* VPCMPUWZ128rmik */ |
| 92027 | 43634, |
| 92028 | /* VPCMPUWZ128rri */ |
| 92029 | 43639, |
| 92030 | /* VPCMPUWZ128rrik */ |
| 92031 | 43643, |
| 92032 | /* VPCMPUWZ256rmi */ |
| 92033 | 43648, |
| 92034 | /* VPCMPUWZ256rmik */ |
| 92035 | 43652, |
| 92036 | /* VPCMPUWZ256rri */ |
| 92037 | 43657, |
| 92038 | /* VPCMPUWZ256rrik */ |
| 92039 | 43661, |
| 92040 | /* VPCMPUWZrmi */ |
| 92041 | 43666, |
| 92042 | /* VPCMPUWZrmik */ |
| 92043 | 43670, |
| 92044 | /* VPCMPUWZrri */ |
| 92045 | 43675, |
| 92046 | /* VPCMPUWZrrik */ |
| 92047 | 43679, |
| 92048 | /* VPCMPWZ128rmi */ |
| 92049 | 43684, |
| 92050 | /* VPCMPWZ128rmik */ |
| 92051 | 43688, |
| 92052 | /* VPCMPWZ128rri */ |
| 92053 | 43693, |
| 92054 | /* VPCMPWZ128rrik */ |
| 92055 | 43697, |
| 92056 | /* VPCMPWZ256rmi */ |
| 92057 | 43702, |
| 92058 | /* VPCMPWZ256rmik */ |
| 92059 | 43706, |
| 92060 | /* VPCMPWZ256rri */ |
| 92061 | 43711, |
| 92062 | /* VPCMPWZ256rrik */ |
| 92063 | 43715, |
| 92064 | /* VPCMPWZrmi */ |
| 92065 | 43720, |
| 92066 | /* VPCMPWZrmik */ |
| 92067 | 43724, |
| 92068 | /* VPCMPWZrri */ |
| 92069 | 43729, |
| 92070 | /* VPCMPWZrrik */ |
| 92071 | 43733, |
| 92072 | /* VPCOMBmi */ |
| 92073 | 43738, |
| 92074 | /* VPCOMBri */ |
| 92075 | 43742, |
| 92076 | /* VPCOMDmi */ |
| 92077 | 43746, |
| 92078 | /* VPCOMDri */ |
| 92079 | 43750, |
| 92080 | /* VPCOMPRESSBZ128mr */ |
| 92081 | 43754, |
| 92082 | /* VPCOMPRESSBZ128mrk */ |
| 92083 | 43756, |
| 92084 | /* VPCOMPRESSBZ128rr */ |
| 92085 | 43759, |
| 92086 | /* VPCOMPRESSBZ128rrk */ |
| 92087 | 43761, |
| 92088 | /* VPCOMPRESSBZ128rrkz */ |
| 92089 | 43765, |
| 92090 | /* VPCOMPRESSBZ256mr */ |
| 92091 | 43768, |
| 92092 | /* VPCOMPRESSBZ256mrk */ |
| 92093 | 43770, |
| 92094 | /* VPCOMPRESSBZ256rr */ |
| 92095 | 43773, |
| 92096 | /* VPCOMPRESSBZ256rrk */ |
| 92097 | 43775, |
| 92098 | /* VPCOMPRESSBZ256rrkz */ |
| 92099 | 43779, |
| 92100 | /* VPCOMPRESSBZmr */ |
| 92101 | 43782, |
| 92102 | /* VPCOMPRESSBZmrk */ |
| 92103 | 43784, |
| 92104 | /* VPCOMPRESSBZrr */ |
| 92105 | 43787, |
| 92106 | /* VPCOMPRESSBZrrk */ |
| 92107 | 43789, |
| 92108 | /* VPCOMPRESSBZrrkz */ |
| 92109 | 43793, |
| 92110 | /* VPCOMPRESSDZ128mr */ |
| 92111 | 43796, |
| 92112 | /* VPCOMPRESSDZ128mrk */ |
| 92113 | 43798, |
| 92114 | /* VPCOMPRESSDZ128rr */ |
| 92115 | 43801, |
| 92116 | /* VPCOMPRESSDZ128rrk */ |
| 92117 | 43803, |
| 92118 | /* VPCOMPRESSDZ128rrkz */ |
| 92119 | 43807, |
| 92120 | /* VPCOMPRESSDZ256mr */ |
| 92121 | 43810, |
| 92122 | /* VPCOMPRESSDZ256mrk */ |
| 92123 | 43812, |
| 92124 | /* VPCOMPRESSDZ256rr */ |
| 92125 | 43815, |
| 92126 | /* VPCOMPRESSDZ256rrk */ |
| 92127 | 43817, |
| 92128 | /* VPCOMPRESSDZ256rrkz */ |
| 92129 | 43821, |
| 92130 | /* VPCOMPRESSDZmr */ |
| 92131 | 43824, |
| 92132 | /* VPCOMPRESSDZmrk */ |
| 92133 | 43826, |
| 92134 | /* VPCOMPRESSDZrr */ |
| 92135 | 43829, |
| 92136 | /* VPCOMPRESSDZrrk */ |
| 92137 | 43831, |
| 92138 | /* VPCOMPRESSDZrrkz */ |
| 92139 | 43835, |
| 92140 | /* VPCOMPRESSQZ128mr */ |
| 92141 | 43838, |
| 92142 | /* VPCOMPRESSQZ128mrk */ |
| 92143 | 43840, |
| 92144 | /* VPCOMPRESSQZ128rr */ |
| 92145 | 43843, |
| 92146 | /* VPCOMPRESSQZ128rrk */ |
| 92147 | 43845, |
| 92148 | /* VPCOMPRESSQZ128rrkz */ |
| 92149 | 43849, |
| 92150 | /* VPCOMPRESSQZ256mr */ |
| 92151 | 43852, |
| 92152 | /* VPCOMPRESSQZ256mrk */ |
| 92153 | 43854, |
| 92154 | /* VPCOMPRESSQZ256rr */ |
| 92155 | 43857, |
| 92156 | /* VPCOMPRESSQZ256rrk */ |
| 92157 | 43859, |
| 92158 | /* VPCOMPRESSQZ256rrkz */ |
| 92159 | 43863, |
| 92160 | /* VPCOMPRESSQZmr */ |
| 92161 | 43866, |
| 92162 | /* VPCOMPRESSQZmrk */ |
| 92163 | 43868, |
| 92164 | /* VPCOMPRESSQZrr */ |
| 92165 | 43871, |
| 92166 | /* VPCOMPRESSQZrrk */ |
| 92167 | 43873, |
| 92168 | /* VPCOMPRESSQZrrkz */ |
| 92169 | 43877, |
| 92170 | /* VPCOMPRESSWZ128mr */ |
| 92171 | 43880, |
| 92172 | /* VPCOMPRESSWZ128mrk */ |
| 92173 | 43882, |
| 92174 | /* VPCOMPRESSWZ128rr */ |
| 92175 | 43885, |
| 92176 | /* VPCOMPRESSWZ128rrk */ |
| 92177 | 43887, |
| 92178 | /* VPCOMPRESSWZ128rrkz */ |
| 92179 | 43891, |
| 92180 | /* VPCOMPRESSWZ256mr */ |
| 92181 | 43894, |
| 92182 | /* VPCOMPRESSWZ256mrk */ |
| 92183 | 43896, |
| 92184 | /* VPCOMPRESSWZ256rr */ |
| 92185 | 43899, |
| 92186 | /* VPCOMPRESSWZ256rrk */ |
| 92187 | 43901, |
| 92188 | /* VPCOMPRESSWZ256rrkz */ |
| 92189 | 43905, |
| 92190 | /* VPCOMPRESSWZmr */ |
| 92191 | 43908, |
| 92192 | /* VPCOMPRESSWZmrk */ |
| 92193 | 43910, |
| 92194 | /* VPCOMPRESSWZrr */ |
| 92195 | 43913, |
| 92196 | /* VPCOMPRESSWZrrk */ |
| 92197 | 43915, |
| 92198 | /* VPCOMPRESSWZrrkz */ |
| 92199 | 43919, |
| 92200 | /* VPCOMQmi */ |
| 92201 | 43922, |
| 92202 | /* VPCOMQri */ |
| 92203 | 43926, |
| 92204 | /* VPCOMUBmi */ |
| 92205 | 43930, |
| 92206 | /* VPCOMUBri */ |
| 92207 | 43934, |
| 92208 | /* VPCOMUDmi */ |
| 92209 | 43938, |
| 92210 | /* VPCOMUDri */ |
| 92211 | 43942, |
| 92212 | /* VPCOMUQmi */ |
| 92213 | 43946, |
| 92214 | /* VPCOMUQri */ |
| 92215 | 43950, |
| 92216 | /* VPCOMUWmi */ |
| 92217 | 43954, |
| 92218 | /* VPCOMUWri */ |
| 92219 | 43958, |
| 92220 | /* VPCOMWmi */ |
| 92221 | 43962, |
| 92222 | /* VPCOMWri */ |
| 92223 | 43966, |
| 92224 | /* VPCONFLICTDZ128rm */ |
| 92225 | 43970, |
| 92226 | /* VPCONFLICTDZ128rmb */ |
| 92227 | 43972, |
| 92228 | /* VPCONFLICTDZ128rmbk */ |
| 92229 | 43974, |
| 92230 | /* VPCONFLICTDZ128rmbkz */ |
| 92231 | 43978, |
| 92232 | /* VPCONFLICTDZ128rmk */ |
| 92233 | 43981, |
| 92234 | /* VPCONFLICTDZ128rmkz */ |
| 92235 | 43985, |
| 92236 | /* VPCONFLICTDZ128rr */ |
| 92237 | 43988, |
| 92238 | /* VPCONFLICTDZ128rrk */ |
| 92239 | 43990, |
| 92240 | /* VPCONFLICTDZ128rrkz */ |
| 92241 | 43994, |
| 92242 | /* VPCONFLICTDZ256rm */ |
| 92243 | 43997, |
| 92244 | /* VPCONFLICTDZ256rmb */ |
| 92245 | 43999, |
| 92246 | /* VPCONFLICTDZ256rmbk */ |
| 92247 | 44001, |
| 92248 | /* VPCONFLICTDZ256rmbkz */ |
| 92249 | 44005, |
| 92250 | /* VPCONFLICTDZ256rmk */ |
| 92251 | 44008, |
| 92252 | /* VPCONFLICTDZ256rmkz */ |
| 92253 | 44012, |
| 92254 | /* VPCONFLICTDZ256rr */ |
| 92255 | 44015, |
| 92256 | /* VPCONFLICTDZ256rrk */ |
| 92257 | 44017, |
| 92258 | /* VPCONFLICTDZ256rrkz */ |
| 92259 | 44021, |
| 92260 | /* VPCONFLICTDZrm */ |
| 92261 | 44024, |
| 92262 | /* VPCONFLICTDZrmb */ |
| 92263 | 44026, |
| 92264 | /* VPCONFLICTDZrmbk */ |
| 92265 | 44028, |
| 92266 | /* VPCONFLICTDZrmbkz */ |
| 92267 | 44032, |
| 92268 | /* VPCONFLICTDZrmk */ |
| 92269 | 44035, |
| 92270 | /* VPCONFLICTDZrmkz */ |
| 92271 | 44039, |
| 92272 | /* VPCONFLICTDZrr */ |
| 92273 | 44042, |
| 92274 | /* VPCONFLICTDZrrk */ |
| 92275 | 44044, |
| 92276 | /* VPCONFLICTDZrrkz */ |
| 92277 | 44048, |
| 92278 | /* VPCONFLICTQZ128rm */ |
| 92279 | 44051, |
| 92280 | /* VPCONFLICTQZ128rmb */ |
| 92281 | 44053, |
| 92282 | /* VPCONFLICTQZ128rmbk */ |
| 92283 | 44055, |
| 92284 | /* VPCONFLICTQZ128rmbkz */ |
| 92285 | 44059, |
| 92286 | /* VPCONFLICTQZ128rmk */ |
| 92287 | 44062, |
| 92288 | /* VPCONFLICTQZ128rmkz */ |
| 92289 | 44066, |
| 92290 | /* VPCONFLICTQZ128rr */ |
| 92291 | 44069, |
| 92292 | /* VPCONFLICTQZ128rrk */ |
| 92293 | 44071, |
| 92294 | /* VPCONFLICTQZ128rrkz */ |
| 92295 | 44075, |
| 92296 | /* VPCONFLICTQZ256rm */ |
| 92297 | 44078, |
| 92298 | /* VPCONFLICTQZ256rmb */ |
| 92299 | 44080, |
| 92300 | /* VPCONFLICTQZ256rmbk */ |
| 92301 | 44082, |
| 92302 | /* VPCONFLICTQZ256rmbkz */ |
| 92303 | 44086, |
| 92304 | /* VPCONFLICTQZ256rmk */ |
| 92305 | 44089, |
| 92306 | /* VPCONFLICTQZ256rmkz */ |
| 92307 | 44093, |
| 92308 | /* VPCONFLICTQZ256rr */ |
| 92309 | 44096, |
| 92310 | /* VPCONFLICTQZ256rrk */ |
| 92311 | 44098, |
| 92312 | /* VPCONFLICTQZ256rrkz */ |
| 92313 | 44102, |
| 92314 | /* VPCONFLICTQZrm */ |
| 92315 | 44105, |
| 92316 | /* VPCONFLICTQZrmb */ |
| 92317 | 44107, |
| 92318 | /* VPCONFLICTQZrmbk */ |
| 92319 | 44109, |
| 92320 | /* VPCONFLICTQZrmbkz */ |
| 92321 | 44113, |
| 92322 | /* VPCONFLICTQZrmk */ |
| 92323 | 44116, |
| 92324 | /* VPCONFLICTQZrmkz */ |
| 92325 | 44120, |
| 92326 | /* VPCONFLICTQZrr */ |
| 92327 | 44123, |
| 92328 | /* VPCONFLICTQZrrk */ |
| 92329 | 44125, |
| 92330 | /* VPCONFLICTQZrrkz */ |
| 92331 | 44129, |
| 92332 | /* VPDPBSSDSYrm */ |
| 92333 | 44132, |
| 92334 | /* VPDPBSSDSYrr */ |
| 92335 | 44136, |
| 92336 | /* VPDPBSSDSrm */ |
| 92337 | 44140, |
| 92338 | /* VPDPBSSDSrr */ |
| 92339 | 44144, |
| 92340 | /* VPDPBSSDYrm */ |
| 92341 | 44148, |
| 92342 | /* VPDPBSSDYrr */ |
| 92343 | 44152, |
| 92344 | /* VPDPBSSDrm */ |
| 92345 | 44156, |
| 92346 | /* VPDPBSSDrr */ |
| 92347 | 44160, |
| 92348 | /* VPDPBSUDSYrm */ |
| 92349 | 44164, |
| 92350 | /* VPDPBSUDSYrr */ |
| 92351 | 44168, |
| 92352 | /* VPDPBSUDSrm */ |
| 92353 | 44172, |
| 92354 | /* VPDPBSUDSrr */ |
| 92355 | 44176, |
| 92356 | /* VPDPBSUDYrm */ |
| 92357 | 44180, |
| 92358 | /* VPDPBSUDYrr */ |
| 92359 | 44184, |
| 92360 | /* VPDPBSUDrm */ |
| 92361 | 44188, |
| 92362 | /* VPDPBSUDrr */ |
| 92363 | 44192, |
| 92364 | /* VPDPBUSDSYrm */ |
| 92365 | 44196, |
| 92366 | /* VPDPBUSDSYrr */ |
| 92367 | 44200, |
| 92368 | /* VPDPBUSDSZ128m */ |
| 92369 | 44204, |
| 92370 | /* VPDPBUSDSZ128mb */ |
| 92371 | 44208, |
| 92372 | /* VPDPBUSDSZ128mbk */ |
| 92373 | 44212, |
| 92374 | /* VPDPBUSDSZ128mbkz */ |
| 92375 | 44217, |
| 92376 | /* VPDPBUSDSZ128mk */ |
| 92377 | 44222, |
| 92378 | /* VPDPBUSDSZ128mkz */ |
| 92379 | 44227, |
| 92380 | /* VPDPBUSDSZ128r */ |
| 92381 | 44232, |
| 92382 | /* VPDPBUSDSZ128rk */ |
| 92383 | 44236, |
| 92384 | /* VPDPBUSDSZ128rkz */ |
| 92385 | 44241, |
| 92386 | /* VPDPBUSDSZ256m */ |
| 92387 | 44246, |
| 92388 | /* VPDPBUSDSZ256mb */ |
| 92389 | 44250, |
| 92390 | /* VPDPBUSDSZ256mbk */ |
| 92391 | 44254, |
| 92392 | /* VPDPBUSDSZ256mbkz */ |
| 92393 | 44259, |
| 92394 | /* VPDPBUSDSZ256mk */ |
| 92395 | 44264, |
| 92396 | /* VPDPBUSDSZ256mkz */ |
| 92397 | 44269, |
| 92398 | /* VPDPBUSDSZ256r */ |
| 92399 | 44274, |
| 92400 | /* VPDPBUSDSZ256rk */ |
| 92401 | 44278, |
| 92402 | /* VPDPBUSDSZ256rkz */ |
| 92403 | 44283, |
| 92404 | /* VPDPBUSDSZm */ |
| 92405 | 44288, |
| 92406 | /* VPDPBUSDSZmb */ |
| 92407 | 44292, |
| 92408 | /* VPDPBUSDSZmbk */ |
| 92409 | 44296, |
| 92410 | /* VPDPBUSDSZmbkz */ |
| 92411 | 44301, |
| 92412 | /* VPDPBUSDSZmk */ |
| 92413 | 44306, |
| 92414 | /* VPDPBUSDSZmkz */ |
| 92415 | 44311, |
| 92416 | /* VPDPBUSDSZr */ |
| 92417 | 44316, |
| 92418 | /* VPDPBUSDSZrk */ |
| 92419 | 44320, |
| 92420 | /* VPDPBUSDSZrkz */ |
| 92421 | 44325, |
| 92422 | /* VPDPBUSDSrm */ |
| 92423 | 44330, |
| 92424 | /* VPDPBUSDSrr */ |
| 92425 | 44334, |
| 92426 | /* VPDPBUSDYrm */ |
| 92427 | 44338, |
| 92428 | /* VPDPBUSDYrr */ |
| 92429 | 44342, |
| 92430 | /* VPDPBUSDZ128m */ |
| 92431 | 44346, |
| 92432 | /* VPDPBUSDZ128mb */ |
| 92433 | 44350, |
| 92434 | /* VPDPBUSDZ128mbk */ |
| 92435 | 44354, |
| 92436 | /* VPDPBUSDZ128mbkz */ |
| 92437 | 44359, |
| 92438 | /* VPDPBUSDZ128mk */ |
| 92439 | 44364, |
| 92440 | /* VPDPBUSDZ128mkz */ |
| 92441 | 44369, |
| 92442 | /* VPDPBUSDZ128r */ |
| 92443 | 44374, |
| 92444 | /* VPDPBUSDZ128rk */ |
| 92445 | 44378, |
| 92446 | /* VPDPBUSDZ128rkz */ |
| 92447 | 44383, |
| 92448 | /* VPDPBUSDZ256m */ |
| 92449 | 44388, |
| 92450 | /* VPDPBUSDZ256mb */ |
| 92451 | 44392, |
| 92452 | /* VPDPBUSDZ256mbk */ |
| 92453 | 44396, |
| 92454 | /* VPDPBUSDZ256mbkz */ |
| 92455 | 44401, |
| 92456 | /* VPDPBUSDZ256mk */ |
| 92457 | 44406, |
| 92458 | /* VPDPBUSDZ256mkz */ |
| 92459 | 44411, |
| 92460 | /* VPDPBUSDZ256r */ |
| 92461 | 44416, |
| 92462 | /* VPDPBUSDZ256rk */ |
| 92463 | 44420, |
| 92464 | /* VPDPBUSDZ256rkz */ |
| 92465 | 44425, |
| 92466 | /* VPDPBUSDZm */ |
| 92467 | 44430, |
| 92468 | /* VPDPBUSDZmb */ |
| 92469 | 44434, |
| 92470 | /* VPDPBUSDZmbk */ |
| 92471 | 44438, |
| 92472 | /* VPDPBUSDZmbkz */ |
| 92473 | 44443, |
| 92474 | /* VPDPBUSDZmk */ |
| 92475 | 44448, |
| 92476 | /* VPDPBUSDZmkz */ |
| 92477 | 44453, |
| 92478 | /* VPDPBUSDZr */ |
| 92479 | 44458, |
| 92480 | /* VPDPBUSDZrk */ |
| 92481 | 44462, |
| 92482 | /* VPDPBUSDZrkz */ |
| 92483 | 44467, |
| 92484 | /* VPDPBUSDrm */ |
| 92485 | 44472, |
| 92486 | /* VPDPBUSDrr */ |
| 92487 | 44476, |
| 92488 | /* VPDPBUUDSYrm */ |
| 92489 | 44480, |
| 92490 | /* VPDPBUUDSYrr */ |
| 92491 | 44484, |
| 92492 | /* VPDPBUUDSrm */ |
| 92493 | 44488, |
| 92494 | /* VPDPBUUDSrr */ |
| 92495 | 44492, |
| 92496 | /* VPDPBUUDYrm */ |
| 92497 | 44496, |
| 92498 | /* VPDPBUUDYrr */ |
| 92499 | 44500, |
| 92500 | /* VPDPBUUDrm */ |
| 92501 | 44504, |
| 92502 | /* VPDPBUUDrr */ |
| 92503 | 44508, |
| 92504 | /* VPDPWSSDSYrm */ |
| 92505 | 44512, |
| 92506 | /* VPDPWSSDSYrr */ |
| 92507 | 44516, |
| 92508 | /* VPDPWSSDSZ128m */ |
| 92509 | 44520, |
| 92510 | /* VPDPWSSDSZ128mb */ |
| 92511 | 44524, |
| 92512 | /* VPDPWSSDSZ128mbk */ |
| 92513 | 44528, |
| 92514 | /* VPDPWSSDSZ128mbkz */ |
| 92515 | 44533, |
| 92516 | /* VPDPWSSDSZ128mk */ |
| 92517 | 44538, |
| 92518 | /* VPDPWSSDSZ128mkz */ |
| 92519 | 44543, |
| 92520 | /* VPDPWSSDSZ128r */ |
| 92521 | 44548, |
| 92522 | /* VPDPWSSDSZ128rk */ |
| 92523 | 44552, |
| 92524 | /* VPDPWSSDSZ128rkz */ |
| 92525 | 44557, |
| 92526 | /* VPDPWSSDSZ256m */ |
| 92527 | 44562, |
| 92528 | /* VPDPWSSDSZ256mb */ |
| 92529 | 44566, |
| 92530 | /* VPDPWSSDSZ256mbk */ |
| 92531 | 44570, |
| 92532 | /* VPDPWSSDSZ256mbkz */ |
| 92533 | 44575, |
| 92534 | /* VPDPWSSDSZ256mk */ |
| 92535 | 44580, |
| 92536 | /* VPDPWSSDSZ256mkz */ |
| 92537 | 44585, |
| 92538 | /* VPDPWSSDSZ256r */ |
| 92539 | 44590, |
| 92540 | /* VPDPWSSDSZ256rk */ |
| 92541 | 44594, |
| 92542 | /* VPDPWSSDSZ256rkz */ |
| 92543 | 44599, |
| 92544 | /* VPDPWSSDSZm */ |
| 92545 | 44604, |
| 92546 | /* VPDPWSSDSZmb */ |
| 92547 | 44608, |
| 92548 | /* VPDPWSSDSZmbk */ |
| 92549 | 44612, |
| 92550 | /* VPDPWSSDSZmbkz */ |
| 92551 | 44617, |
| 92552 | /* VPDPWSSDSZmk */ |
| 92553 | 44622, |
| 92554 | /* VPDPWSSDSZmkz */ |
| 92555 | 44627, |
| 92556 | /* VPDPWSSDSZr */ |
| 92557 | 44632, |
| 92558 | /* VPDPWSSDSZrk */ |
| 92559 | 44636, |
| 92560 | /* VPDPWSSDSZrkz */ |
| 92561 | 44641, |
| 92562 | /* VPDPWSSDSrm */ |
| 92563 | 44646, |
| 92564 | /* VPDPWSSDSrr */ |
| 92565 | 44650, |
| 92566 | /* VPDPWSSDYrm */ |
| 92567 | 44654, |
| 92568 | /* VPDPWSSDYrr */ |
| 92569 | 44658, |
| 92570 | /* VPDPWSSDZ128m */ |
| 92571 | 44662, |
| 92572 | /* VPDPWSSDZ128mb */ |
| 92573 | 44666, |
| 92574 | /* VPDPWSSDZ128mbk */ |
| 92575 | 44670, |
| 92576 | /* VPDPWSSDZ128mbkz */ |
| 92577 | 44675, |
| 92578 | /* VPDPWSSDZ128mk */ |
| 92579 | 44680, |
| 92580 | /* VPDPWSSDZ128mkz */ |
| 92581 | 44685, |
| 92582 | /* VPDPWSSDZ128r */ |
| 92583 | 44690, |
| 92584 | /* VPDPWSSDZ128rk */ |
| 92585 | 44694, |
| 92586 | /* VPDPWSSDZ128rkz */ |
| 92587 | 44699, |
| 92588 | /* VPDPWSSDZ256m */ |
| 92589 | 44704, |
| 92590 | /* VPDPWSSDZ256mb */ |
| 92591 | 44708, |
| 92592 | /* VPDPWSSDZ256mbk */ |
| 92593 | 44712, |
| 92594 | /* VPDPWSSDZ256mbkz */ |
| 92595 | 44717, |
| 92596 | /* VPDPWSSDZ256mk */ |
| 92597 | 44722, |
| 92598 | /* VPDPWSSDZ256mkz */ |
| 92599 | 44727, |
| 92600 | /* VPDPWSSDZ256r */ |
| 92601 | 44732, |
| 92602 | /* VPDPWSSDZ256rk */ |
| 92603 | 44736, |
| 92604 | /* VPDPWSSDZ256rkz */ |
| 92605 | 44741, |
| 92606 | /* VPDPWSSDZm */ |
| 92607 | 44746, |
| 92608 | /* VPDPWSSDZmb */ |
| 92609 | 44750, |
| 92610 | /* VPDPWSSDZmbk */ |
| 92611 | 44754, |
| 92612 | /* VPDPWSSDZmbkz */ |
| 92613 | 44759, |
| 92614 | /* VPDPWSSDZmk */ |
| 92615 | 44764, |
| 92616 | /* VPDPWSSDZmkz */ |
| 92617 | 44769, |
| 92618 | /* VPDPWSSDZr */ |
| 92619 | 44774, |
| 92620 | /* VPDPWSSDZrk */ |
| 92621 | 44778, |
| 92622 | /* VPDPWSSDZrkz */ |
| 92623 | 44783, |
| 92624 | /* VPDPWSSDrm */ |
| 92625 | 44788, |
| 92626 | /* VPDPWSSDrr */ |
| 92627 | 44792, |
| 92628 | /* VPDPWSUDSYrm */ |
| 92629 | 44796, |
| 92630 | /* VPDPWSUDSYrr */ |
| 92631 | 44800, |
| 92632 | /* VPDPWSUDSrm */ |
| 92633 | 44804, |
| 92634 | /* VPDPWSUDSrr */ |
| 92635 | 44808, |
| 92636 | /* VPDPWSUDYrm */ |
| 92637 | 44812, |
| 92638 | /* VPDPWSUDYrr */ |
| 92639 | 44816, |
| 92640 | /* VPDPWSUDrm */ |
| 92641 | 44820, |
| 92642 | /* VPDPWSUDrr */ |
| 92643 | 44824, |
| 92644 | /* VPDPWUSDSYrm */ |
| 92645 | 44828, |
| 92646 | /* VPDPWUSDSYrr */ |
| 92647 | 44832, |
| 92648 | /* VPDPWUSDSrm */ |
| 92649 | 44836, |
| 92650 | /* VPDPWUSDSrr */ |
| 92651 | 44840, |
| 92652 | /* VPDPWUSDYrm */ |
| 92653 | 44844, |
| 92654 | /* VPDPWUSDYrr */ |
| 92655 | 44848, |
| 92656 | /* VPDPWUSDrm */ |
| 92657 | 44852, |
| 92658 | /* VPDPWUSDrr */ |
| 92659 | 44856, |
| 92660 | /* VPDPWUUDSYrm */ |
| 92661 | 44860, |
| 92662 | /* VPDPWUUDSYrr */ |
| 92663 | 44864, |
| 92664 | /* VPDPWUUDSrm */ |
| 92665 | 44868, |
| 92666 | /* VPDPWUUDSrr */ |
| 92667 | 44872, |
| 92668 | /* VPDPWUUDYrm */ |
| 92669 | 44876, |
| 92670 | /* VPDPWUUDYrr */ |
| 92671 | 44880, |
| 92672 | /* VPDPWUUDrm */ |
| 92673 | 44884, |
| 92674 | /* VPDPWUUDrr */ |
| 92675 | 44888, |
| 92676 | /* VPERM2F128rm */ |
| 92677 | 44892, |
| 92678 | /* VPERM2F128rr */ |
| 92679 | 44896, |
| 92680 | /* VPERM2I128rm */ |
| 92681 | 44900, |
| 92682 | /* VPERM2I128rr */ |
| 92683 | 44904, |
| 92684 | /* VPERMBZ128rm */ |
| 92685 | 44908, |
| 92686 | /* VPERMBZ128rmk */ |
| 92687 | 44911, |
| 92688 | /* VPERMBZ128rmkz */ |
| 92689 | 44916, |
| 92690 | /* VPERMBZ128rr */ |
| 92691 | 44920, |
| 92692 | /* VPERMBZ128rrk */ |
| 92693 | 44923, |
| 92694 | /* VPERMBZ128rrkz */ |
| 92695 | 44928, |
| 92696 | /* VPERMBZ256rm */ |
| 92697 | 44932, |
| 92698 | /* VPERMBZ256rmk */ |
| 92699 | 44935, |
| 92700 | /* VPERMBZ256rmkz */ |
| 92701 | 44940, |
| 92702 | /* VPERMBZ256rr */ |
| 92703 | 44944, |
| 92704 | /* VPERMBZ256rrk */ |
| 92705 | 44947, |
| 92706 | /* VPERMBZ256rrkz */ |
| 92707 | 44952, |
| 92708 | /* VPERMBZrm */ |
| 92709 | 44956, |
| 92710 | /* VPERMBZrmk */ |
| 92711 | 44959, |
| 92712 | /* VPERMBZrmkz */ |
| 92713 | 44964, |
| 92714 | /* VPERMBZrr */ |
| 92715 | 44968, |
| 92716 | /* VPERMBZrrk */ |
| 92717 | 44971, |
| 92718 | /* VPERMBZrrkz */ |
| 92719 | 44976, |
| 92720 | /* VPERMDYrm */ |
| 92721 | 44980, |
| 92722 | /* VPERMDYrr */ |
| 92723 | 44983, |
| 92724 | /* VPERMDZ256rm */ |
| 92725 | 44986, |
| 92726 | /* VPERMDZ256rmb */ |
| 92727 | 44989, |
| 92728 | /* VPERMDZ256rmbk */ |
| 92729 | 44992, |
| 92730 | /* VPERMDZ256rmbkz */ |
| 92731 | 44997, |
| 92732 | /* VPERMDZ256rmk */ |
| 92733 | 45001, |
| 92734 | /* VPERMDZ256rmkz */ |
| 92735 | 45006, |
| 92736 | /* VPERMDZ256rr */ |
| 92737 | 45010, |
| 92738 | /* VPERMDZ256rrk */ |
| 92739 | 45013, |
| 92740 | /* VPERMDZ256rrkz */ |
| 92741 | 45018, |
| 92742 | /* VPERMDZrm */ |
| 92743 | 45022, |
| 92744 | /* VPERMDZrmb */ |
| 92745 | 45025, |
| 92746 | /* VPERMDZrmbk */ |
| 92747 | 45028, |
| 92748 | /* VPERMDZrmbkz */ |
| 92749 | 45033, |
| 92750 | /* VPERMDZrmk */ |
| 92751 | 45037, |
| 92752 | /* VPERMDZrmkz */ |
| 92753 | 45042, |
| 92754 | /* VPERMDZrr */ |
| 92755 | 45046, |
| 92756 | /* VPERMDZrrk */ |
| 92757 | 45049, |
| 92758 | /* VPERMDZrrkz */ |
| 92759 | 45054, |
| 92760 | /* VPERMI2BZ128rm */ |
| 92761 | 45058, |
| 92762 | /* VPERMI2BZ128rmk */ |
| 92763 | 45062, |
| 92764 | /* VPERMI2BZ128rmkz */ |
| 92765 | 45067, |
| 92766 | /* VPERMI2BZ128rr */ |
| 92767 | 45072, |
| 92768 | /* VPERMI2BZ128rrk */ |
| 92769 | 45076, |
| 92770 | /* VPERMI2BZ128rrkz */ |
| 92771 | 45081, |
| 92772 | /* VPERMI2BZ256rm */ |
| 92773 | 45086, |
| 92774 | /* VPERMI2BZ256rmk */ |
| 92775 | 45090, |
| 92776 | /* VPERMI2BZ256rmkz */ |
| 92777 | 45095, |
| 92778 | /* VPERMI2BZ256rr */ |
| 92779 | 45100, |
| 92780 | /* VPERMI2BZ256rrk */ |
| 92781 | 45104, |
| 92782 | /* VPERMI2BZ256rrkz */ |
| 92783 | 45109, |
| 92784 | /* VPERMI2BZrm */ |
| 92785 | 45114, |
| 92786 | /* VPERMI2BZrmk */ |
| 92787 | 45118, |
| 92788 | /* VPERMI2BZrmkz */ |
| 92789 | 45123, |
| 92790 | /* VPERMI2BZrr */ |
| 92791 | 45128, |
| 92792 | /* VPERMI2BZrrk */ |
| 92793 | 45132, |
| 92794 | /* VPERMI2BZrrkz */ |
| 92795 | 45137, |
| 92796 | /* VPERMI2DZ128rm */ |
| 92797 | 45142, |
| 92798 | /* VPERMI2DZ128rmb */ |
| 92799 | 45146, |
| 92800 | /* VPERMI2DZ128rmbk */ |
| 92801 | 45150, |
| 92802 | /* VPERMI2DZ128rmbkz */ |
| 92803 | 45155, |
| 92804 | /* VPERMI2DZ128rmk */ |
| 92805 | 45160, |
| 92806 | /* VPERMI2DZ128rmkz */ |
| 92807 | 45165, |
| 92808 | /* VPERMI2DZ128rr */ |
| 92809 | 45170, |
| 92810 | /* VPERMI2DZ128rrk */ |
| 92811 | 45174, |
| 92812 | /* VPERMI2DZ128rrkz */ |
| 92813 | 45179, |
| 92814 | /* VPERMI2DZ256rm */ |
| 92815 | 45184, |
| 92816 | /* VPERMI2DZ256rmb */ |
| 92817 | 45188, |
| 92818 | /* VPERMI2DZ256rmbk */ |
| 92819 | 45192, |
| 92820 | /* VPERMI2DZ256rmbkz */ |
| 92821 | 45197, |
| 92822 | /* VPERMI2DZ256rmk */ |
| 92823 | 45202, |
| 92824 | /* VPERMI2DZ256rmkz */ |
| 92825 | 45207, |
| 92826 | /* VPERMI2DZ256rr */ |
| 92827 | 45212, |
| 92828 | /* VPERMI2DZ256rrk */ |
| 92829 | 45216, |
| 92830 | /* VPERMI2DZ256rrkz */ |
| 92831 | 45221, |
| 92832 | /* VPERMI2DZrm */ |
| 92833 | 45226, |
| 92834 | /* VPERMI2DZrmb */ |
| 92835 | 45230, |
| 92836 | /* VPERMI2DZrmbk */ |
| 92837 | 45234, |
| 92838 | /* VPERMI2DZrmbkz */ |
| 92839 | 45239, |
| 92840 | /* VPERMI2DZrmk */ |
| 92841 | 45244, |
| 92842 | /* VPERMI2DZrmkz */ |
| 92843 | 45249, |
| 92844 | /* VPERMI2DZrr */ |
| 92845 | 45254, |
| 92846 | /* VPERMI2DZrrk */ |
| 92847 | 45258, |
| 92848 | /* VPERMI2DZrrkz */ |
| 92849 | 45263, |
| 92850 | /* VPERMI2PDZ128rm */ |
| 92851 | 45268, |
| 92852 | /* VPERMI2PDZ128rmb */ |
| 92853 | 45272, |
| 92854 | /* VPERMI2PDZ128rmbk */ |
| 92855 | 45276, |
| 92856 | /* VPERMI2PDZ128rmbkz */ |
| 92857 | 45281, |
| 92858 | /* VPERMI2PDZ128rmk */ |
| 92859 | 45286, |
| 92860 | /* VPERMI2PDZ128rmkz */ |
| 92861 | 45291, |
| 92862 | /* VPERMI2PDZ128rr */ |
| 92863 | 45296, |
| 92864 | /* VPERMI2PDZ128rrk */ |
| 92865 | 45300, |
| 92866 | /* VPERMI2PDZ128rrkz */ |
| 92867 | 45305, |
| 92868 | /* VPERMI2PDZ256rm */ |
| 92869 | 45310, |
| 92870 | /* VPERMI2PDZ256rmb */ |
| 92871 | 45314, |
| 92872 | /* VPERMI2PDZ256rmbk */ |
| 92873 | 45318, |
| 92874 | /* VPERMI2PDZ256rmbkz */ |
| 92875 | 45323, |
| 92876 | /* VPERMI2PDZ256rmk */ |
| 92877 | 45328, |
| 92878 | /* VPERMI2PDZ256rmkz */ |
| 92879 | 45333, |
| 92880 | /* VPERMI2PDZ256rr */ |
| 92881 | 45338, |
| 92882 | /* VPERMI2PDZ256rrk */ |
| 92883 | 45342, |
| 92884 | /* VPERMI2PDZ256rrkz */ |
| 92885 | 45347, |
| 92886 | /* VPERMI2PDZrm */ |
| 92887 | 45352, |
| 92888 | /* VPERMI2PDZrmb */ |
| 92889 | 45356, |
| 92890 | /* VPERMI2PDZrmbk */ |
| 92891 | 45360, |
| 92892 | /* VPERMI2PDZrmbkz */ |
| 92893 | 45365, |
| 92894 | /* VPERMI2PDZrmk */ |
| 92895 | 45370, |
| 92896 | /* VPERMI2PDZrmkz */ |
| 92897 | 45375, |
| 92898 | /* VPERMI2PDZrr */ |
| 92899 | 45380, |
| 92900 | /* VPERMI2PDZrrk */ |
| 92901 | 45384, |
| 92902 | /* VPERMI2PDZrrkz */ |
| 92903 | 45389, |
| 92904 | /* VPERMI2PSZ128rm */ |
| 92905 | 45394, |
| 92906 | /* VPERMI2PSZ128rmb */ |
| 92907 | 45398, |
| 92908 | /* VPERMI2PSZ128rmbk */ |
| 92909 | 45402, |
| 92910 | /* VPERMI2PSZ128rmbkz */ |
| 92911 | 45407, |
| 92912 | /* VPERMI2PSZ128rmk */ |
| 92913 | 45412, |
| 92914 | /* VPERMI2PSZ128rmkz */ |
| 92915 | 45417, |
| 92916 | /* VPERMI2PSZ128rr */ |
| 92917 | 45422, |
| 92918 | /* VPERMI2PSZ128rrk */ |
| 92919 | 45426, |
| 92920 | /* VPERMI2PSZ128rrkz */ |
| 92921 | 45431, |
| 92922 | /* VPERMI2PSZ256rm */ |
| 92923 | 45436, |
| 92924 | /* VPERMI2PSZ256rmb */ |
| 92925 | 45440, |
| 92926 | /* VPERMI2PSZ256rmbk */ |
| 92927 | 45444, |
| 92928 | /* VPERMI2PSZ256rmbkz */ |
| 92929 | 45449, |
| 92930 | /* VPERMI2PSZ256rmk */ |
| 92931 | 45454, |
| 92932 | /* VPERMI2PSZ256rmkz */ |
| 92933 | 45459, |
| 92934 | /* VPERMI2PSZ256rr */ |
| 92935 | 45464, |
| 92936 | /* VPERMI2PSZ256rrk */ |
| 92937 | 45468, |
| 92938 | /* VPERMI2PSZ256rrkz */ |
| 92939 | 45473, |
| 92940 | /* VPERMI2PSZrm */ |
| 92941 | 45478, |
| 92942 | /* VPERMI2PSZrmb */ |
| 92943 | 45482, |
| 92944 | /* VPERMI2PSZrmbk */ |
| 92945 | 45486, |
| 92946 | /* VPERMI2PSZrmbkz */ |
| 92947 | 45491, |
| 92948 | /* VPERMI2PSZrmk */ |
| 92949 | 45496, |
| 92950 | /* VPERMI2PSZrmkz */ |
| 92951 | 45501, |
| 92952 | /* VPERMI2PSZrr */ |
| 92953 | 45506, |
| 92954 | /* VPERMI2PSZrrk */ |
| 92955 | 45510, |
| 92956 | /* VPERMI2PSZrrkz */ |
| 92957 | 45515, |
| 92958 | /* VPERMI2QZ128rm */ |
| 92959 | 45520, |
| 92960 | /* VPERMI2QZ128rmb */ |
| 92961 | 45524, |
| 92962 | /* VPERMI2QZ128rmbk */ |
| 92963 | 45528, |
| 92964 | /* VPERMI2QZ128rmbkz */ |
| 92965 | 45533, |
| 92966 | /* VPERMI2QZ128rmk */ |
| 92967 | 45538, |
| 92968 | /* VPERMI2QZ128rmkz */ |
| 92969 | 45543, |
| 92970 | /* VPERMI2QZ128rr */ |
| 92971 | 45548, |
| 92972 | /* VPERMI2QZ128rrk */ |
| 92973 | 45552, |
| 92974 | /* VPERMI2QZ128rrkz */ |
| 92975 | 45557, |
| 92976 | /* VPERMI2QZ256rm */ |
| 92977 | 45562, |
| 92978 | /* VPERMI2QZ256rmb */ |
| 92979 | 45566, |
| 92980 | /* VPERMI2QZ256rmbk */ |
| 92981 | 45570, |
| 92982 | /* VPERMI2QZ256rmbkz */ |
| 92983 | 45575, |
| 92984 | /* VPERMI2QZ256rmk */ |
| 92985 | 45580, |
| 92986 | /* VPERMI2QZ256rmkz */ |
| 92987 | 45585, |
| 92988 | /* VPERMI2QZ256rr */ |
| 92989 | 45590, |
| 92990 | /* VPERMI2QZ256rrk */ |
| 92991 | 45594, |
| 92992 | /* VPERMI2QZ256rrkz */ |
| 92993 | 45599, |
| 92994 | /* VPERMI2QZrm */ |
| 92995 | 45604, |
| 92996 | /* VPERMI2QZrmb */ |
| 92997 | 45608, |
| 92998 | /* VPERMI2QZrmbk */ |
| 92999 | 45612, |
| 93000 | /* VPERMI2QZrmbkz */ |
| 93001 | 45617, |
| 93002 | /* VPERMI2QZrmk */ |
| 93003 | 45622, |
| 93004 | /* VPERMI2QZrmkz */ |
| 93005 | 45627, |
| 93006 | /* VPERMI2QZrr */ |
| 93007 | 45632, |
| 93008 | /* VPERMI2QZrrk */ |
| 93009 | 45636, |
| 93010 | /* VPERMI2QZrrkz */ |
| 93011 | 45641, |
| 93012 | /* VPERMI2WZ128rm */ |
| 93013 | 45646, |
| 93014 | /* VPERMI2WZ128rmk */ |
| 93015 | 45650, |
| 93016 | /* VPERMI2WZ128rmkz */ |
| 93017 | 45655, |
| 93018 | /* VPERMI2WZ128rr */ |
| 93019 | 45660, |
| 93020 | /* VPERMI2WZ128rrk */ |
| 93021 | 45664, |
| 93022 | /* VPERMI2WZ128rrkz */ |
| 93023 | 45669, |
| 93024 | /* VPERMI2WZ256rm */ |
| 93025 | 45674, |
| 93026 | /* VPERMI2WZ256rmk */ |
| 93027 | 45678, |
| 93028 | /* VPERMI2WZ256rmkz */ |
| 93029 | 45683, |
| 93030 | /* VPERMI2WZ256rr */ |
| 93031 | 45688, |
| 93032 | /* VPERMI2WZ256rrk */ |
| 93033 | 45692, |
| 93034 | /* VPERMI2WZ256rrkz */ |
| 93035 | 45697, |
| 93036 | /* VPERMI2WZrm */ |
| 93037 | 45702, |
| 93038 | /* VPERMI2WZrmk */ |
| 93039 | 45706, |
| 93040 | /* VPERMI2WZrmkz */ |
| 93041 | 45711, |
| 93042 | /* VPERMI2WZrr */ |
| 93043 | 45716, |
| 93044 | /* VPERMI2WZrrk */ |
| 93045 | 45720, |
| 93046 | /* VPERMI2WZrrkz */ |
| 93047 | 45725, |
| 93048 | /* VPERMIL2PDYmr */ |
| 93049 | 45730, |
| 93050 | /* VPERMIL2PDYrm */ |
| 93051 | 45735, |
| 93052 | /* VPERMIL2PDYrr */ |
| 93053 | 45740, |
| 93054 | /* VPERMIL2PDYrr_REV */ |
| 93055 | 45745, |
| 93056 | /* VPERMIL2PDmr */ |
| 93057 | 45750, |
| 93058 | /* VPERMIL2PDrm */ |
| 93059 | 45755, |
| 93060 | /* VPERMIL2PDrr */ |
| 93061 | 45760, |
| 93062 | /* VPERMIL2PDrr_REV */ |
| 93063 | 45765, |
| 93064 | /* VPERMIL2PSYmr */ |
| 93065 | 45770, |
| 93066 | /* VPERMIL2PSYrm */ |
| 93067 | 45775, |
| 93068 | /* VPERMIL2PSYrr */ |
| 93069 | 45780, |
| 93070 | /* VPERMIL2PSYrr_REV */ |
| 93071 | 45785, |
| 93072 | /* VPERMIL2PSmr */ |
| 93073 | 45790, |
| 93074 | /* VPERMIL2PSrm */ |
| 93075 | 45795, |
| 93076 | /* VPERMIL2PSrr */ |
| 93077 | 45800, |
| 93078 | /* VPERMIL2PSrr_REV */ |
| 93079 | 45805, |
| 93080 | /* VPERMILPDYmi */ |
| 93081 | 45810, |
| 93082 | /* VPERMILPDYri */ |
| 93083 | 45813, |
| 93084 | /* VPERMILPDYrm */ |
| 93085 | 45816, |
| 93086 | /* VPERMILPDYrr */ |
| 93087 | 45819, |
| 93088 | /* VPERMILPDZ128mbi */ |
| 93089 | 45822, |
| 93090 | /* VPERMILPDZ128mbik */ |
| 93091 | 45825, |
| 93092 | /* VPERMILPDZ128mbikz */ |
| 93093 | 45830, |
| 93094 | /* VPERMILPDZ128mi */ |
| 93095 | 45834, |
| 93096 | /* VPERMILPDZ128mik */ |
| 93097 | 45837, |
| 93098 | /* VPERMILPDZ128mikz */ |
| 93099 | 45842, |
| 93100 | /* VPERMILPDZ128ri */ |
| 93101 | 45846, |
| 93102 | /* VPERMILPDZ128rik */ |
| 93103 | 45849, |
| 93104 | /* VPERMILPDZ128rikz */ |
| 93105 | 45854, |
| 93106 | /* VPERMILPDZ128rm */ |
| 93107 | 45858, |
| 93108 | /* VPERMILPDZ128rmb */ |
| 93109 | 45861, |
| 93110 | /* VPERMILPDZ128rmbk */ |
| 93111 | 45864, |
| 93112 | /* VPERMILPDZ128rmbkz */ |
| 93113 | 45869, |
| 93114 | /* VPERMILPDZ128rmk */ |
| 93115 | 45873, |
| 93116 | /* VPERMILPDZ128rmkz */ |
| 93117 | 45878, |
| 93118 | /* VPERMILPDZ128rr */ |
| 93119 | 45882, |
| 93120 | /* VPERMILPDZ128rrk */ |
| 93121 | 45885, |
| 93122 | /* VPERMILPDZ128rrkz */ |
| 93123 | 45890, |
| 93124 | /* VPERMILPDZ256mbi */ |
| 93125 | 45894, |
| 93126 | /* VPERMILPDZ256mbik */ |
| 93127 | 45897, |
| 93128 | /* VPERMILPDZ256mbikz */ |
| 93129 | 45902, |
| 93130 | /* VPERMILPDZ256mi */ |
| 93131 | 45906, |
| 93132 | /* VPERMILPDZ256mik */ |
| 93133 | 45909, |
| 93134 | /* VPERMILPDZ256mikz */ |
| 93135 | 45914, |
| 93136 | /* VPERMILPDZ256ri */ |
| 93137 | 45918, |
| 93138 | /* VPERMILPDZ256rik */ |
| 93139 | 45921, |
| 93140 | /* VPERMILPDZ256rikz */ |
| 93141 | 45926, |
| 93142 | /* VPERMILPDZ256rm */ |
| 93143 | 45930, |
| 93144 | /* VPERMILPDZ256rmb */ |
| 93145 | 45933, |
| 93146 | /* VPERMILPDZ256rmbk */ |
| 93147 | 45936, |
| 93148 | /* VPERMILPDZ256rmbkz */ |
| 93149 | 45941, |
| 93150 | /* VPERMILPDZ256rmk */ |
| 93151 | 45945, |
| 93152 | /* VPERMILPDZ256rmkz */ |
| 93153 | 45950, |
| 93154 | /* VPERMILPDZ256rr */ |
| 93155 | 45954, |
| 93156 | /* VPERMILPDZ256rrk */ |
| 93157 | 45957, |
| 93158 | /* VPERMILPDZ256rrkz */ |
| 93159 | 45962, |
| 93160 | /* VPERMILPDZmbi */ |
| 93161 | 45966, |
| 93162 | /* VPERMILPDZmbik */ |
| 93163 | 45969, |
| 93164 | /* VPERMILPDZmbikz */ |
| 93165 | 45974, |
| 93166 | /* VPERMILPDZmi */ |
| 93167 | 45978, |
| 93168 | /* VPERMILPDZmik */ |
| 93169 | 45981, |
| 93170 | /* VPERMILPDZmikz */ |
| 93171 | 45986, |
| 93172 | /* VPERMILPDZri */ |
| 93173 | 45990, |
| 93174 | /* VPERMILPDZrik */ |
| 93175 | 45993, |
| 93176 | /* VPERMILPDZrikz */ |
| 93177 | 45998, |
| 93178 | /* VPERMILPDZrm */ |
| 93179 | 46002, |
| 93180 | /* VPERMILPDZrmb */ |
| 93181 | 46005, |
| 93182 | /* VPERMILPDZrmbk */ |
| 93183 | 46008, |
| 93184 | /* VPERMILPDZrmbkz */ |
| 93185 | 46013, |
| 93186 | /* VPERMILPDZrmk */ |
| 93187 | 46017, |
| 93188 | /* VPERMILPDZrmkz */ |
| 93189 | 46022, |
| 93190 | /* VPERMILPDZrr */ |
| 93191 | 46026, |
| 93192 | /* VPERMILPDZrrk */ |
| 93193 | 46029, |
| 93194 | /* VPERMILPDZrrkz */ |
| 93195 | 46034, |
| 93196 | /* VPERMILPDmi */ |
| 93197 | 46038, |
| 93198 | /* VPERMILPDri */ |
| 93199 | 46041, |
| 93200 | /* VPERMILPDrm */ |
| 93201 | 46044, |
| 93202 | /* VPERMILPDrr */ |
| 93203 | 46047, |
| 93204 | /* VPERMILPSYmi */ |
| 93205 | 46050, |
| 93206 | /* VPERMILPSYri */ |
| 93207 | 46053, |
| 93208 | /* VPERMILPSYrm */ |
| 93209 | 46056, |
| 93210 | /* VPERMILPSYrr */ |
| 93211 | 46059, |
| 93212 | /* VPERMILPSZ128mbi */ |
| 93213 | 46062, |
| 93214 | /* VPERMILPSZ128mbik */ |
| 93215 | 46065, |
| 93216 | /* VPERMILPSZ128mbikz */ |
| 93217 | 46070, |
| 93218 | /* VPERMILPSZ128mi */ |
| 93219 | 46074, |
| 93220 | /* VPERMILPSZ128mik */ |
| 93221 | 46077, |
| 93222 | /* VPERMILPSZ128mikz */ |
| 93223 | 46082, |
| 93224 | /* VPERMILPSZ128ri */ |
| 93225 | 46086, |
| 93226 | /* VPERMILPSZ128rik */ |
| 93227 | 46089, |
| 93228 | /* VPERMILPSZ128rikz */ |
| 93229 | 46094, |
| 93230 | /* VPERMILPSZ128rm */ |
| 93231 | 46098, |
| 93232 | /* VPERMILPSZ128rmb */ |
| 93233 | 46101, |
| 93234 | /* VPERMILPSZ128rmbk */ |
| 93235 | 46104, |
| 93236 | /* VPERMILPSZ128rmbkz */ |
| 93237 | 46109, |
| 93238 | /* VPERMILPSZ128rmk */ |
| 93239 | 46113, |
| 93240 | /* VPERMILPSZ128rmkz */ |
| 93241 | 46118, |
| 93242 | /* VPERMILPSZ128rr */ |
| 93243 | 46122, |
| 93244 | /* VPERMILPSZ128rrk */ |
| 93245 | 46125, |
| 93246 | /* VPERMILPSZ128rrkz */ |
| 93247 | 46130, |
| 93248 | /* VPERMILPSZ256mbi */ |
| 93249 | 46134, |
| 93250 | /* VPERMILPSZ256mbik */ |
| 93251 | 46137, |
| 93252 | /* VPERMILPSZ256mbikz */ |
| 93253 | 46142, |
| 93254 | /* VPERMILPSZ256mi */ |
| 93255 | 46146, |
| 93256 | /* VPERMILPSZ256mik */ |
| 93257 | 46149, |
| 93258 | /* VPERMILPSZ256mikz */ |
| 93259 | 46154, |
| 93260 | /* VPERMILPSZ256ri */ |
| 93261 | 46158, |
| 93262 | /* VPERMILPSZ256rik */ |
| 93263 | 46161, |
| 93264 | /* VPERMILPSZ256rikz */ |
| 93265 | 46166, |
| 93266 | /* VPERMILPSZ256rm */ |
| 93267 | 46170, |
| 93268 | /* VPERMILPSZ256rmb */ |
| 93269 | 46173, |
| 93270 | /* VPERMILPSZ256rmbk */ |
| 93271 | 46176, |
| 93272 | /* VPERMILPSZ256rmbkz */ |
| 93273 | 46181, |
| 93274 | /* VPERMILPSZ256rmk */ |
| 93275 | 46185, |
| 93276 | /* VPERMILPSZ256rmkz */ |
| 93277 | 46190, |
| 93278 | /* VPERMILPSZ256rr */ |
| 93279 | 46194, |
| 93280 | /* VPERMILPSZ256rrk */ |
| 93281 | 46197, |
| 93282 | /* VPERMILPSZ256rrkz */ |
| 93283 | 46202, |
| 93284 | /* VPERMILPSZmbi */ |
| 93285 | 46206, |
| 93286 | /* VPERMILPSZmbik */ |
| 93287 | 46209, |
| 93288 | /* VPERMILPSZmbikz */ |
| 93289 | 46214, |
| 93290 | /* VPERMILPSZmi */ |
| 93291 | 46218, |
| 93292 | /* VPERMILPSZmik */ |
| 93293 | 46221, |
| 93294 | /* VPERMILPSZmikz */ |
| 93295 | 46226, |
| 93296 | /* VPERMILPSZri */ |
| 93297 | 46230, |
| 93298 | /* VPERMILPSZrik */ |
| 93299 | 46233, |
| 93300 | /* VPERMILPSZrikz */ |
| 93301 | 46238, |
| 93302 | /* VPERMILPSZrm */ |
| 93303 | 46242, |
| 93304 | /* VPERMILPSZrmb */ |
| 93305 | 46245, |
| 93306 | /* VPERMILPSZrmbk */ |
| 93307 | 46248, |
| 93308 | /* VPERMILPSZrmbkz */ |
| 93309 | 46253, |
| 93310 | /* VPERMILPSZrmk */ |
| 93311 | 46257, |
| 93312 | /* VPERMILPSZrmkz */ |
| 93313 | 46262, |
| 93314 | /* VPERMILPSZrr */ |
| 93315 | 46266, |
| 93316 | /* VPERMILPSZrrk */ |
| 93317 | 46269, |
| 93318 | /* VPERMILPSZrrkz */ |
| 93319 | 46274, |
| 93320 | /* VPERMILPSmi */ |
| 93321 | 46278, |
| 93322 | /* VPERMILPSri */ |
| 93323 | 46281, |
| 93324 | /* VPERMILPSrm */ |
| 93325 | 46284, |
| 93326 | /* VPERMILPSrr */ |
| 93327 | 46287, |
| 93328 | /* VPERMPDYmi */ |
| 93329 | 46290, |
| 93330 | /* VPERMPDYri */ |
| 93331 | 46293, |
| 93332 | /* VPERMPDZ256mbi */ |
| 93333 | 46296, |
| 93334 | /* VPERMPDZ256mbik */ |
| 93335 | 46299, |
| 93336 | /* VPERMPDZ256mbikz */ |
| 93337 | 46304, |
| 93338 | /* VPERMPDZ256mi */ |
| 93339 | 46308, |
| 93340 | /* VPERMPDZ256mik */ |
| 93341 | 46311, |
| 93342 | /* VPERMPDZ256mikz */ |
| 93343 | 46316, |
| 93344 | /* VPERMPDZ256ri */ |
| 93345 | 46320, |
| 93346 | /* VPERMPDZ256rik */ |
| 93347 | 46323, |
| 93348 | /* VPERMPDZ256rikz */ |
| 93349 | 46328, |
| 93350 | /* VPERMPDZ256rm */ |
| 93351 | 46332, |
| 93352 | /* VPERMPDZ256rmb */ |
| 93353 | 46335, |
| 93354 | /* VPERMPDZ256rmbk */ |
| 93355 | 46338, |
| 93356 | /* VPERMPDZ256rmbkz */ |
| 93357 | 46343, |
| 93358 | /* VPERMPDZ256rmk */ |
| 93359 | 46347, |
| 93360 | /* VPERMPDZ256rmkz */ |
| 93361 | 46352, |
| 93362 | /* VPERMPDZ256rr */ |
| 93363 | 46356, |
| 93364 | /* VPERMPDZ256rrk */ |
| 93365 | 46359, |
| 93366 | /* VPERMPDZ256rrkz */ |
| 93367 | 46364, |
| 93368 | /* VPERMPDZmbi */ |
| 93369 | 46368, |
| 93370 | /* VPERMPDZmbik */ |
| 93371 | 46371, |
| 93372 | /* VPERMPDZmbikz */ |
| 93373 | 46376, |
| 93374 | /* VPERMPDZmi */ |
| 93375 | 46380, |
| 93376 | /* VPERMPDZmik */ |
| 93377 | 46383, |
| 93378 | /* VPERMPDZmikz */ |
| 93379 | 46388, |
| 93380 | /* VPERMPDZri */ |
| 93381 | 46392, |
| 93382 | /* VPERMPDZrik */ |
| 93383 | 46395, |
| 93384 | /* VPERMPDZrikz */ |
| 93385 | 46400, |
| 93386 | /* VPERMPDZrm */ |
| 93387 | 46404, |
| 93388 | /* VPERMPDZrmb */ |
| 93389 | 46407, |
| 93390 | /* VPERMPDZrmbk */ |
| 93391 | 46410, |
| 93392 | /* VPERMPDZrmbkz */ |
| 93393 | 46415, |
| 93394 | /* VPERMPDZrmk */ |
| 93395 | 46419, |
| 93396 | /* VPERMPDZrmkz */ |
| 93397 | 46424, |
| 93398 | /* VPERMPDZrr */ |
| 93399 | 46428, |
| 93400 | /* VPERMPDZrrk */ |
| 93401 | 46431, |
| 93402 | /* VPERMPDZrrkz */ |
| 93403 | 46436, |
| 93404 | /* VPERMPSYrm */ |
| 93405 | 46440, |
| 93406 | /* VPERMPSYrr */ |
| 93407 | 46443, |
| 93408 | /* VPERMPSZ256rm */ |
| 93409 | 46446, |
| 93410 | /* VPERMPSZ256rmb */ |
| 93411 | 46449, |
| 93412 | /* VPERMPSZ256rmbk */ |
| 93413 | 46452, |
| 93414 | /* VPERMPSZ256rmbkz */ |
| 93415 | 46457, |
| 93416 | /* VPERMPSZ256rmk */ |
| 93417 | 46461, |
| 93418 | /* VPERMPSZ256rmkz */ |
| 93419 | 46466, |
| 93420 | /* VPERMPSZ256rr */ |
| 93421 | 46470, |
| 93422 | /* VPERMPSZ256rrk */ |
| 93423 | 46473, |
| 93424 | /* VPERMPSZ256rrkz */ |
| 93425 | 46478, |
| 93426 | /* VPERMPSZrm */ |
| 93427 | 46482, |
| 93428 | /* VPERMPSZrmb */ |
| 93429 | 46485, |
| 93430 | /* VPERMPSZrmbk */ |
| 93431 | 46488, |
| 93432 | /* VPERMPSZrmbkz */ |
| 93433 | 46493, |
| 93434 | /* VPERMPSZrmk */ |
| 93435 | 46497, |
| 93436 | /* VPERMPSZrmkz */ |
| 93437 | 46502, |
| 93438 | /* VPERMPSZrr */ |
| 93439 | 46506, |
| 93440 | /* VPERMPSZrrk */ |
| 93441 | 46509, |
| 93442 | /* VPERMPSZrrkz */ |
| 93443 | 46514, |
| 93444 | /* VPERMQYmi */ |
| 93445 | 46518, |
| 93446 | /* VPERMQYri */ |
| 93447 | 46521, |
| 93448 | /* VPERMQZ256mbi */ |
| 93449 | 46524, |
| 93450 | /* VPERMQZ256mbik */ |
| 93451 | 46527, |
| 93452 | /* VPERMQZ256mbikz */ |
| 93453 | 46532, |
| 93454 | /* VPERMQZ256mi */ |
| 93455 | 46536, |
| 93456 | /* VPERMQZ256mik */ |
| 93457 | 46539, |
| 93458 | /* VPERMQZ256mikz */ |
| 93459 | 46544, |
| 93460 | /* VPERMQZ256ri */ |
| 93461 | 46548, |
| 93462 | /* VPERMQZ256rik */ |
| 93463 | 46551, |
| 93464 | /* VPERMQZ256rikz */ |
| 93465 | 46556, |
| 93466 | /* VPERMQZ256rm */ |
| 93467 | 46560, |
| 93468 | /* VPERMQZ256rmb */ |
| 93469 | 46563, |
| 93470 | /* VPERMQZ256rmbk */ |
| 93471 | 46566, |
| 93472 | /* VPERMQZ256rmbkz */ |
| 93473 | 46571, |
| 93474 | /* VPERMQZ256rmk */ |
| 93475 | 46575, |
| 93476 | /* VPERMQZ256rmkz */ |
| 93477 | 46580, |
| 93478 | /* VPERMQZ256rr */ |
| 93479 | 46584, |
| 93480 | /* VPERMQZ256rrk */ |
| 93481 | 46587, |
| 93482 | /* VPERMQZ256rrkz */ |
| 93483 | 46592, |
| 93484 | /* VPERMQZmbi */ |
| 93485 | 46596, |
| 93486 | /* VPERMQZmbik */ |
| 93487 | 46599, |
| 93488 | /* VPERMQZmbikz */ |
| 93489 | 46604, |
| 93490 | /* VPERMQZmi */ |
| 93491 | 46608, |
| 93492 | /* VPERMQZmik */ |
| 93493 | 46611, |
| 93494 | /* VPERMQZmikz */ |
| 93495 | 46616, |
| 93496 | /* VPERMQZri */ |
| 93497 | 46620, |
| 93498 | /* VPERMQZrik */ |
| 93499 | 46623, |
| 93500 | /* VPERMQZrikz */ |
| 93501 | 46628, |
| 93502 | /* VPERMQZrm */ |
| 93503 | 46632, |
| 93504 | /* VPERMQZrmb */ |
| 93505 | 46635, |
| 93506 | /* VPERMQZrmbk */ |
| 93507 | 46638, |
| 93508 | /* VPERMQZrmbkz */ |
| 93509 | 46643, |
| 93510 | /* VPERMQZrmk */ |
| 93511 | 46647, |
| 93512 | /* VPERMQZrmkz */ |
| 93513 | 46652, |
| 93514 | /* VPERMQZrr */ |
| 93515 | 46656, |
| 93516 | /* VPERMQZrrk */ |
| 93517 | 46659, |
| 93518 | /* VPERMQZrrkz */ |
| 93519 | 46664, |
| 93520 | /* VPERMT2BZ128rm */ |
| 93521 | 46668, |
| 93522 | /* VPERMT2BZ128rmk */ |
| 93523 | 46672, |
| 93524 | /* VPERMT2BZ128rmkz */ |
| 93525 | 46677, |
| 93526 | /* VPERMT2BZ128rr */ |
| 93527 | 46682, |
| 93528 | /* VPERMT2BZ128rrk */ |
| 93529 | 46686, |
| 93530 | /* VPERMT2BZ128rrkz */ |
| 93531 | 46691, |
| 93532 | /* VPERMT2BZ256rm */ |
| 93533 | 46696, |
| 93534 | /* VPERMT2BZ256rmk */ |
| 93535 | 46700, |
| 93536 | /* VPERMT2BZ256rmkz */ |
| 93537 | 46705, |
| 93538 | /* VPERMT2BZ256rr */ |
| 93539 | 46710, |
| 93540 | /* VPERMT2BZ256rrk */ |
| 93541 | 46714, |
| 93542 | /* VPERMT2BZ256rrkz */ |
| 93543 | 46719, |
| 93544 | /* VPERMT2BZrm */ |
| 93545 | 46724, |
| 93546 | /* VPERMT2BZrmk */ |
| 93547 | 46728, |
| 93548 | /* VPERMT2BZrmkz */ |
| 93549 | 46733, |
| 93550 | /* VPERMT2BZrr */ |
| 93551 | 46738, |
| 93552 | /* VPERMT2BZrrk */ |
| 93553 | 46742, |
| 93554 | /* VPERMT2BZrrkz */ |
| 93555 | 46747, |
| 93556 | /* VPERMT2DZ128rm */ |
| 93557 | 46752, |
| 93558 | /* VPERMT2DZ128rmb */ |
| 93559 | 46756, |
| 93560 | /* VPERMT2DZ128rmbk */ |
| 93561 | 46760, |
| 93562 | /* VPERMT2DZ128rmbkz */ |
| 93563 | 46765, |
| 93564 | /* VPERMT2DZ128rmk */ |
| 93565 | 46770, |
| 93566 | /* VPERMT2DZ128rmkz */ |
| 93567 | 46775, |
| 93568 | /* VPERMT2DZ128rr */ |
| 93569 | 46780, |
| 93570 | /* VPERMT2DZ128rrk */ |
| 93571 | 46784, |
| 93572 | /* VPERMT2DZ128rrkz */ |
| 93573 | 46789, |
| 93574 | /* VPERMT2DZ256rm */ |
| 93575 | 46794, |
| 93576 | /* VPERMT2DZ256rmb */ |
| 93577 | 46798, |
| 93578 | /* VPERMT2DZ256rmbk */ |
| 93579 | 46802, |
| 93580 | /* VPERMT2DZ256rmbkz */ |
| 93581 | 46807, |
| 93582 | /* VPERMT2DZ256rmk */ |
| 93583 | 46812, |
| 93584 | /* VPERMT2DZ256rmkz */ |
| 93585 | 46817, |
| 93586 | /* VPERMT2DZ256rr */ |
| 93587 | 46822, |
| 93588 | /* VPERMT2DZ256rrk */ |
| 93589 | 46826, |
| 93590 | /* VPERMT2DZ256rrkz */ |
| 93591 | 46831, |
| 93592 | /* VPERMT2DZrm */ |
| 93593 | 46836, |
| 93594 | /* VPERMT2DZrmb */ |
| 93595 | 46840, |
| 93596 | /* VPERMT2DZrmbk */ |
| 93597 | 46844, |
| 93598 | /* VPERMT2DZrmbkz */ |
| 93599 | 46849, |
| 93600 | /* VPERMT2DZrmk */ |
| 93601 | 46854, |
| 93602 | /* VPERMT2DZrmkz */ |
| 93603 | 46859, |
| 93604 | /* VPERMT2DZrr */ |
| 93605 | 46864, |
| 93606 | /* VPERMT2DZrrk */ |
| 93607 | 46868, |
| 93608 | /* VPERMT2DZrrkz */ |
| 93609 | 46873, |
| 93610 | /* VPERMT2PDZ128rm */ |
| 93611 | 46878, |
| 93612 | /* VPERMT2PDZ128rmb */ |
| 93613 | 46882, |
| 93614 | /* VPERMT2PDZ128rmbk */ |
| 93615 | 46886, |
| 93616 | /* VPERMT2PDZ128rmbkz */ |
| 93617 | 46891, |
| 93618 | /* VPERMT2PDZ128rmk */ |
| 93619 | 46896, |
| 93620 | /* VPERMT2PDZ128rmkz */ |
| 93621 | 46901, |
| 93622 | /* VPERMT2PDZ128rr */ |
| 93623 | 46906, |
| 93624 | /* VPERMT2PDZ128rrk */ |
| 93625 | 46910, |
| 93626 | /* VPERMT2PDZ128rrkz */ |
| 93627 | 46915, |
| 93628 | /* VPERMT2PDZ256rm */ |
| 93629 | 46920, |
| 93630 | /* VPERMT2PDZ256rmb */ |
| 93631 | 46924, |
| 93632 | /* VPERMT2PDZ256rmbk */ |
| 93633 | 46928, |
| 93634 | /* VPERMT2PDZ256rmbkz */ |
| 93635 | 46933, |
| 93636 | /* VPERMT2PDZ256rmk */ |
| 93637 | 46938, |
| 93638 | /* VPERMT2PDZ256rmkz */ |
| 93639 | 46943, |
| 93640 | /* VPERMT2PDZ256rr */ |
| 93641 | 46948, |
| 93642 | /* VPERMT2PDZ256rrk */ |
| 93643 | 46952, |
| 93644 | /* VPERMT2PDZ256rrkz */ |
| 93645 | 46957, |
| 93646 | /* VPERMT2PDZrm */ |
| 93647 | 46962, |
| 93648 | /* VPERMT2PDZrmb */ |
| 93649 | 46966, |
| 93650 | /* VPERMT2PDZrmbk */ |
| 93651 | 46970, |
| 93652 | /* VPERMT2PDZrmbkz */ |
| 93653 | 46975, |
| 93654 | /* VPERMT2PDZrmk */ |
| 93655 | 46980, |
| 93656 | /* VPERMT2PDZrmkz */ |
| 93657 | 46985, |
| 93658 | /* VPERMT2PDZrr */ |
| 93659 | 46990, |
| 93660 | /* VPERMT2PDZrrk */ |
| 93661 | 46994, |
| 93662 | /* VPERMT2PDZrrkz */ |
| 93663 | 46999, |
| 93664 | /* VPERMT2PSZ128rm */ |
| 93665 | 47004, |
| 93666 | /* VPERMT2PSZ128rmb */ |
| 93667 | 47008, |
| 93668 | /* VPERMT2PSZ128rmbk */ |
| 93669 | 47012, |
| 93670 | /* VPERMT2PSZ128rmbkz */ |
| 93671 | 47017, |
| 93672 | /* VPERMT2PSZ128rmk */ |
| 93673 | 47022, |
| 93674 | /* VPERMT2PSZ128rmkz */ |
| 93675 | 47027, |
| 93676 | /* VPERMT2PSZ128rr */ |
| 93677 | 47032, |
| 93678 | /* VPERMT2PSZ128rrk */ |
| 93679 | 47036, |
| 93680 | /* VPERMT2PSZ128rrkz */ |
| 93681 | 47041, |
| 93682 | /* VPERMT2PSZ256rm */ |
| 93683 | 47046, |
| 93684 | /* VPERMT2PSZ256rmb */ |
| 93685 | 47050, |
| 93686 | /* VPERMT2PSZ256rmbk */ |
| 93687 | 47054, |
| 93688 | /* VPERMT2PSZ256rmbkz */ |
| 93689 | 47059, |
| 93690 | /* VPERMT2PSZ256rmk */ |
| 93691 | 47064, |
| 93692 | /* VPERMT2PSZ256rmkz */ |
| 93693 | 47069, |
| 93694 | /* VPERMT2PSZ256rr */ |
| 93695 | 47074, |
| 93696 | /* VPERMT2PSZ256rrk */ |
| 93697 | 47078, |
| 93698 | /* VPERMT2PSZ256rrkz */ |
| 93699 | 47083, |
| 93700 | /* VPERMT2PSZrm */ |
| 93701 | 47088, |
| 93702 | /* VPERMT2PSZrmb */ |
| 93703 | 47092, |
| 93704 | /* VPERMT2PSZrmbk */ |
| 93705 | 47096, |
| 93706 | /* VPERMT2PSZrmbkz */ |
| 93707 | 47101, |
| 93708 | /* VPERMT2PSZrmk */ |
| 93709 | 47106, |
| 93710 | /* VPERMT2PSZrmkz */ |
| 93711 | 47111, |
| 93712 | /* VPERMT2PSZrr */ |
| 93713 | 47116, |
| 93714 | /* VPERMT2PSZrrk */ |
| 93715 | 47120, |
| 93716 | /* VPERMT2PSZrrkz */ |
| 93717 | 47125, |
| 93718 | /* VPERMT2QZ128rm */ |
| 93719 | 47130, |
| 93720 | /* VPERMT2QZ128rmb */ |
| 93721 | 47134, |
| 93722 | /* VPERMT2QZ128rmbk */ |
| 93723 | 47138, |
| 93724 | /* VPERMT2QZ128rmbkz */ |
| 93725 | 47143, |
| 93726 | /* VPERMT2QZ128rmk */ |
| 93727 | 47148, |
| 93728 | /* VPERMT2QZ128rmkz */ |
| 93729 | 47153, |
| 93730 | /* VPERMT2QZ128rr */ |
| 93731 | 47158, |
| 93732 | /* VPERMT2QZ128rrk */ |
| 93733 | 47162, |
| 93734 | /* VPERMT2QZ128rrkz */ |
| 93735 | 47167, |
| 93736 | /* VPERMT2QZ256rm */ |
| 93737 | 47172, |
| 93738 | /* VPERMT2QZ256rmb */ |
| 93739 | 47176, |
| 93740 | /* VPERMT2QZ256rmbk */ |
| 93741 | 47180, |
| 93742 | /* VPERMT2QZ256rmbkz */ |
| 93743 | 47185, |
| 93744 | /* VPERMT2QZ256rmk */ |
| 93745 | 47190, |
| 93746 | /* VPERMT2QZ256rmkz */ |
| 93747 | 47195, |
| 93748 | /* VPERMT2QZ256rr */ |
| 93749 | 47200, |
| 93750 | /* VPERMT2QZ256rrk */ |
| 93751 | 47204, |
| 93752 | /* VPERMT2QZ256rrkz */ |
| 93753 | 47209, |
| 93754 | /* VPERMT2QZrm */ |
| 93755 | 47214, |
| 93756 | /* VPERMT2QZrmb */ |
| 93757 | 47218, |
| 93758 | /* VPERMT2QZrmbk */ |
| 93759 | 47222, |
| 93760 | /* VPERMT2QZrmbkz */ |
| 93761 | 47227, |
| 93762 | /* VPERMT2QZrmk */ |
| 93763 | 47232, |
| 93764 | /* VPERMT2QZrmkz */ |
| 93765 | 47237, |
| 93766 | /* VPERMT2QZrr */ |
| 93767 | 47242, |
| 93768 | /* VPERMT2QZrrk */ |
| 93769 | 47246, |
| 93770 | /* VPERMT2QZrrkz */ |
| 93771 | 47251, |
| 93772 | /* VPERMT2WZ128rm */ |
| 93773 | 47256, |
| 93774 | /* VPERMT2WZ128rmk */ |
| 93775 | 47260, |
| 93776 | /* VPERMT2WZ128rmkz */ |
| 93777 | 47265, |
| 93778 | /* VPERMT2WZ128rr */ |
| 93779 | 47270, |
| 93780 | /* VPERMT2WZ128rrk */ |
| 93781 | 47274, |
| 93782 | /* VPERMT2WZ128rrkz */ |
| 93783 | 47279, |
| 93784 | /* VPERMT2WZ256rm */ |
| 93785 | 47284, |
| 93786 | /* VPERMT2WZ256rmk */ |
| 93787 | 47288, |
| 93788 | /* VPERMT2WZ256rmkz */ |
| 93789 | 47293, |
| 93790 | /* VPERMT2WZ256rr */ |
| 93791 | 47298, |
| 93792 | /* VPERMT2WZ256rrk */ |
| 93793 | 47302, |
| 93794 | /* VPERMT2WZ256rrkz */ |
| 93795 | 47307, |
| 93796 | /* VPERMT2WZrm */ |
| 93797 | 47312, |
| 93798 | /* VPERMT2WZrmk */ |
| 93799 | 47316, |
| 93800 | /* VPERMT2WZrmkz */ |
| 93801 | 47321, |
| 93802 | /* VPERMT2WZrr */ |
| 93803 | 47326, |
| 93804 | /* VPERMT2WZrrk */ |
| 93805 | 47330, |
| 93806 | /* VPERMT2WZrrkz */ |
| 93807 | 47335, |
| 93808 | /* VPERMWZ128rm */ |
| 93809 | 47340, |
| 93810 | /* VPERMWZ128rmk */ |
| 93811 | 47343, |
| 93812 | /* VPERMWZ128rmkz */ |
| 93813 | 47348, |
| 93814 | /* VPERMWZ128rr */ |
| 93815 | 47352, |
| 93816 | /* VPERMWZ128rrk */ |
| 93817 | 47355, |
| 93818 | /* VPERMWZ128rrkz */ |
| 93819 | 47360, |
| 93820 | /* VPERMWZ256rm */ |
| 93821 | 47364, |
| 93822 | /* VPERMWZ256rmk */ |
| 93823 | 47367, |
| 93824 | /* VPERMWZ256rmkz */ |
| 93825 | 47372, |
| 93826 | /* VPERMWZ256rr */ |
| 93827 | 47376, |
| 93828 | /* VPERMWZ256rrk */ |
| 93829 | 47379, |
| 93830 | /* VPERMWZ256rrkz */ |
| 93831 | 47384, |
| 93832 | /* VPERMWZrm */ |
| 93833 | 47388, |
| 93834 | /* VPERMWZrmk */ |
| 93835 | 47391, |
| 93836 | /* VPERMWZrmkz */ |
| 93837 | 47396, |
| 93838 | /* VPERMWZrr */ |
| 93839 | 47400, |
| 93840 | /* VPERMWZrrk */ |
| 93841 | 47403, |
| 93842 | /* VPERMWZrrkz */ |
| 93843 | 47408, |
| 93844 | /* VPEXPANDBZ128rm */ |
| 93845 | 47412, |
| 93846 | /* VPEXPANDBZ128rmk */ |
| 93847 | 47414, |
| 93848 | /* VPEXPANDBZ128rmkz */ |
| 93849 | 47418, |
| 93850 | /* VPEXPANDBZ128rr */ |
| 93851 | 47421, |
| 93852 | /* VPEXPANDBZ128rrk */ |
| 93853 | 47423, |
| 93854 | /* VPEXPANDBZ128rrkz */ |
| 93855 | 47427, |
| 93856 | /* VPEXPANDBZ256rm */ |
| 93857 | 47430, |
| 93858 | /* VPEXPANDBZ256rmk */ |
| 93859 | 47432, |
| 93860 | /* VPEXPANDBZ256rmkz */ |
| 93861 | 47436, |
| 93862 | /* VPEXPANDBZ256rr */ |
| 93863 | 47439, |
| 93864 | /* VPEXPANDBZ256rrk */ |
| 93865 | 47441, |
| 93866 | /* VPEXPANDBZ256rrkz */ |
| 93867 | 47445, |
| 93868 | /* VPEXPANDBZrm */ |
| 93869 | 47448, |
| 93870 | /* VPEXPANDBZrmk */ |
| 93871 | 47450, |
| 93872 | /* VPEXPANDBZrmkz */ |
| 93873 | 47454, |
| 93874 | /* VPEXPANDBZrr */ |
| 93875 | 47457, |
| 93876 | /* VPEXPANDBZrrk */ |
| 93877 | 47459, |
| 93878 | /* VPEXPANDBZrrkz */ |
| 93879 | 47463, |
| 93880 | /* VPEXPANDDZ128rm */ |
| 93881 | 47466, |
| 93882 | /* VPEXPANDDZ128rmk */ |
| 93883 | 47468, |
| 93884 | /* VPEXPANDDZ128rmkz */ |
| 93885 | 47472, |
| 93886 | /* VPEXPANDDZ128rr */ |
| 93887 | 47475, |
| 93888 | /* VPEXPANDDZ128rrk */ |
| 93889 | 47477, |
| 93890 | /* VPEXPANDDZ128rrkz */ |
| 93891 | 47481, |
| 93892 | /* VPEXPANDDZ256rm */ |
| 93893 | 47484, |
| 93894 | /* VPEXPANDDZ256rmk */ |
| 93895 | 47486, |
| 93896 | /* VPEXPANDDZ256rmkz */ |
| 93897 | 47490, |
| 93898 | /* VPEXPANDDZ256rr */ |
| 93899 | 47493, |
| 93900 | /* VPEXPANDDZ256rrk */ |
| 93901 | 47495, |
| 93902 | /* VPEXPANDDZ256rrkz */ |
| 93903 | 47499, |
| 93904 | /* VPEXPANDDZrm */ |
| 93905 | 47502, |
| 93906 | /* VPEXPANDDZrmk */ |
| 93907 | 47504, |
| 93908 | /* VPEXPANDDZrmkz */ |
| 93909 | 47508, |
| 93910 | /* VPEXPANDDZrr */ |
| 93911 | 47511, |
| 93912 | /* VPEXPANDDZrrk */ |
| 93913 | 47513, |
| 93914 | /* VPEXPANDDZrrkz */ |
| 93915 | 47517, |
| 93916 | /* VPEXPANDQZ128rm */ |
| 93917 | 47520, |
| 93918 | /* VPEXPANDQZ128rmk */ |
| 93919 | 47522, |
| 93920 | /* VPEXPANDQZ128rmkz */ |
| 93921 | 47526, |
| 93922 | /* VPEXPANDQZ128rr */ |
| 93923 | 47529, |
| 93924 | /* VPEXPANDQZ128rrk */ |
| 93925 | 47531, |
| 93926 | /* VPEXPANDQZ128rrkz */ |
| 93927 | 47535, |
| 93928 | /* VPEXPANDQZ256rm */ |
| 93929 | 47538, |
| 93930 | /* VPEXPANDQZ256rmk */ |
| 93931 | 47540, |
| 93932 | /* VPEXPANDQZ256rmkz */ |
| 93933 | 47544, |
| 93934 | /* VPEXPANDQZ256rr */ |
| 93935 | 47547, |
| 93936 | /* VPEXPANDQZ256rrk */ |
| 93937 | 47549, |
| 93938 | /* VPEXPANDQZ256rrkz */ |
| 93939 | 47553, |
| 93940 | /* VPEXPANDQZrm */ |
| 93941 | 47556, |
| 93942 | /* VPEXPANDQZrmk */ |
| 93943 | 47558, |
| 93944 | /* VPEXPANDQZrmkz */ |
| 93945 | 47562, |
| 93946 | /* VPEXPANDQZrr */ |
| 93947 | 47565, |
| 93948 | /* VPEXPANDQZrrk */ |
| 93949 | 47567, |
| 93950 | /* VPEXPANDQZrrkz */ |
| 93951 | 47571, |
| 93952 | /* VPEXPANDWZ128rm */ |
| 93953 | 47574, |
| 93954 | /* VPEXPANDWZ128rmk */ |
| 93955 | 47576, |
| 93956 | /* VPEXPANDWZ128rmkz */ |
| 93957 | 47580, |
| 93958 | /* VPEXPANDWZ128rr */ |
| 93959 | 47583, |
| 93960 | /* VPEXPANDWZ128rrk */ |
| 93961 | 47585, |
| 93962 | /* VPEXPANDWZ128rrkz */ |
| 93963 | 47589, |
| 93964 | /* VPEXPANDWZ256rm */ |
| 93965 | 47592, |
| 93966 | /* VPEXPANDWZ256rmk */ |
| 93967 | 47594, |
| 93968 | /* VPEXPANDWZ256rmkz */ |
| 93969 | 47598, |
| 93970 | /* VPEXPANDWZ256rr */ |
| 93971 | 47601, |
| 93972 | /* VPEXPANDWZ256rrk */ |
| 93973 | 47603, |
| 93974 | /* VPEXPANDWZ256rrkz */ |
| 93975 | 47607, |
| 93976 | /* VPEXPANDWZrm */ |
| 93977 | 47610, |
| 93978 | /* VPEXPANDWZrmk */ |
| 93979 | 47612, |
| 93980 | /* VPEXPANDWZrmkz */ |
| 93981 | 47616, |
| 93982 | /* VPEXPANDWZrr */ |
| 93983 | 47619, |
| 93984 | /* VPEXPANDWZrrk */ |
| 93985 | 47621, |
| 93986 | /* VPEXPANDWZrrkz */ |
| 93987 | 47625, |
| 93988 | /* VPEXTRBZmr */ |
| 93989 | 47628, |
| 93990 | /* VPEXTRBZrr */ |
| 93991 | 47631, |
| 93992 | /* VPEXTRBmr */ |
| 93993 | 47634, |
| 93994 | /* VPEXTRBrr */ |
| 93995 | 47637, |
| 93996 | /* VPEXTRDZmr */ |
| 93997 | 47640, |
| 93998 | /* VPEXTRDZrr */ |
| 93999 | 47643, |
| 94000 | /* VPEXTRDmr */ |
| 94001 | 47646, |
| 94002 | /* VPEXTRDrr */ |
| 94003 | 47649, |
| 94004 | /* VPEXTRQZmr */ |
| 94005 | 47652, |
| 94006 | /* VPEXTRQZrr */ |
| 94007 | 47655, |
| 94008 | /* VPEXTRQmr */ |
| 94009 | 47658, |
| 94010 | /* VPEXTRQrr */ |
| 94011 | 47661, |
| 94012 | /* VPEXTRWZmr */ |
| 94013 | 47664, |
| 94014 | /* VPEXTRWZrr */ |
| 94015 | 47667, |
| 94016 | /* VPEXTRWZrr_REV */ |
| 94017 | 47670, |
| 94018 | /* VPEXTRWmr */ |
| 94019 | 47673, |
| 94020 | /* VPEXTRWrr */ |
| 94021 | 47676, |
| 94022 | /* VPEXTRWrr_REV */ |
| 94023 | 47679, |
| 94024 | /* VPGATHERDDYrm */ |
| 94025 | 47682, |
| 94026 | /* VPGATHERDDZ128rm */ |
| 94027 | 47687, |
| 94028 | /* VPGATHERDDZ256rm */ |
| 94029 | 47692, |
| 94030 | /* VPGATHERDDZrm */ |
| 94031 | 47697, |
| 94032 | /* VPGATHERDDrm */ |
| 94033 | 47702, |
| 94034 | /* VPGATHERDQYrm */ |
| 94035 | 47707, |
| 94036 | /* VPGATHERDQZ128rm */ |
| 94037 | 47712, |
| 94038 | /* VPGATHERDQZ256rm */ |
| 94039 | 47717, |
| 94040 | /* VPGATHERDQZrm */ |
| 94041 | 47722, |
| 94042 | /* VPGATHERDQrm */ |
| 94043 | 47727, |
| 94044 | /* VPGATHERQDYrm */ |
| 94045 | 47732, |
| 94046 | /* VPGATHERQDZ128rm */ |
| 94047 | 47737, |
| 94048 | /* VPGATHERQDZ256rm */ |
| 94049 | 47742, |
| 94050 | /* VPGATHERQDZrm */ |
| 94051 | 47747, |
| 94052 | /* VPGATHERQDrm */ |
| 94053 | 47752, |
| 94054 | /* VPGATHERQQYrm */ |
| 94055 | 47757, |
| 94056 | /* VPGATHERQQZ128rm */ |
| 94057 | 47762, |
| 94058 | /* VPGATHERQQZ256rm */ |
| 94059 | 47767, |
| 94060 | /* VPGATHERQQZrm */ |
| 94061 | 47772, |
| 94062 | /* VPGATHERQQrm */ |
| 94063 | 47777, |
| 94064 | /* VPHADDBDrm */ |
| 94065 | 47782, |
| 94066 | /* VPHADDBDrr */ |
| 94067 | 47784, |
| 94068 | /* VPHADDBQrm */ |
| 94069 | 47786, |
| 94070 | /* VPHADDBQrr */ |
| 94071 | 47788, |
| 94072 | /* VPHADDBWrm */ |
| 94073 | 47790, |
| 94074 | /* VPHADDBWrr */ |
| 94075 | 47792, |
| 94076 | /* VPHADDDQrm */ |
| 94077 | 47794, |
| 94078 | /* VPHADDDQrr */ |
| 94079 | 47796, |
| 94080 | /* VPHADDDYrm */ |
| 94081 | 47798, |
| 94082 | /* VPHADDDYrr */ |
| 94083 | 47801, |
| 94084 | /* VPHADDDrm */ |
| 94085 | 47804, |
| 94086 | /* VPHADDDrr */ |
| 94087 | 47807, |
| 94088 | /* VPHADDSWYrm */ |
| 94089 | 47810, |
| 94090 | /* VPHADDSWYrr */ |
| 94091 | 47813, |
| 94092 | /* VPHADDSWrm */ |
| 94093 | 47816, |
| 94094 | /* VPHADDSWrr */ |
| 94095 | 47819, |
| 94096 | /* VPHADDUBDrm */ |
| 94097 | 47822, |
| 94098 | /* VPHADDUBDrr */ |
| 94099 | 47824, |
| 94100 | /* VPHADDUBQrm */ |
| 94101 | 47826, |
| 94102 | /* VPHADDUBQrr */ |
| 94103 | 47828, |
| 94104 | /* VPHADDUBWrm */ |
| 94105 | 47830, |
| 94106 | /* VPHADDUBWrr */ |
| 94107 | 47832, |
| 94108 | /* VPHADDUDQrm */ |
| 94109 | 47834, |
| 94110 | /* VPHADDUDQrr */ |
| 94111 | 47836, |
| 94112 | /* VPHADDUWDrm */ |
| 94113 | 47838, |
| 94114 | /* VPHADDUWDrr */ |
| 94115 | 47840, |
| 94116 | /* VPHADDUWQrm */ |
| 94117 | 47842, |
| 94118 | /* VPHADDUWQrr */ |
| 94119 | 47844, |
| 94120 | /* VPHADDWDrm */ |
| 94121 | 47846, |
| 94122 | /* VPHADDWDrr */ |
| 94123 | 47848, |
| 94124 | /* VPHADDWQrm */ |
| 94125 | 47850, |
| 94126 | /* VPHADDWQrr */ |
| 94127 | 47852, |
| 94128 | /* VPHADDWYrm */ |
| 94129 | 47854, |
| 94130 | /* VPHADDWYrr */ |
| 94131 | 47857, |
| 94132 | /* VPHADDWrm */ |
| 94133 | 47860, |
| 94134 | /* VPHADDWrr */ |
| 94135 | 47863, |
| 94136 | /* VPHMINPOSUWrm */ |
| 94137 | 47866, |
| 94138 | /* VPHMINPOSUWrr */ |
| 94139 | 47868, |
| 94140 | /* VPHSUBBWrm */ |
| 94141 | 47870, |
| 94142 | /* VPHSUBBWrr */ |
| 94143 | 47872, |
| 94144 | /* VPHSUBDQrm */ |
| 94145 | 47874, |
| 94146 | /* VPHSUBDQrr */ |
| 94147 | 47876, |
| 94148 | /* VPHSUBDYrm */ |
| 94149 | 47878, |
| 94150 | /* VPHSUBDYrr */ |
| 94151 | 47881, |
| 94152 | /* VPHSUBDrm */ |
| 94153 | 47884, |
| 94154 | /* VPHSUBDrr */ |
| 94155 | 47887, |
| 94156 | /* VPHSUBSWYrm */ |
| 94157 | 47890, |
| 94158 | /* VPHSUBSWYrr */ |
| 94159 | 47893, |
| 94160 | /* VPHSUBSWrm */ |
| 94161 | 47896, |
| 94162 | /* VPHSUBSWrr */ |
| 94163 | 47899, |
| 94164 | /* VPHSUBWDrm */ |
| 94165 | 47902, |
| 94166 | /* VPHSUBWDrr */ |
| 94167 | 47904, |
| 94168 | /* VPHSUBWYrm */ |
| 94169 | 47906, |
| 94170 | /* VPHSUBWYrr */ |
| 94171 | 47909, |
| 94172 | /* VPHSUBWrm */ |
| 94173 | 47912, |
| 94174 | /* VPHSUBWrr */ |
| 94175 | 47915, |
| 94176 | /* VPINSRBZrm */ |
| 94177 | 47918, |
| 94178 | /* VPINSRBZrr */ |
| 94179 | 47922, |
| 94180 | /* VPINSRBrm */ |
| 94181 | 47926, |
| 94182 | /* VPINSRBrr */ |
| 94183 | 47930, |
| 94184 | /* VPINSRDZrm */ |
| 94185 | 47934, |
| 94186 | /* VPINSRDZrr */ |
| 94187 | 47938, |
| 94188 | /* VPINSRDrm */ |
| 94189 | 47942, |
| 94190 | /* VPINSRDrr */ |
| 94191 | 47946, |
| 94192 | /* VPINSRQZrm */ |
| 94193 | 47950, |
| 94194 | /* VPINSRQZrr */ |
| 94195 | 47954, |
| 94196 | /* VPINSRQrm */ |
| 94197 | 47958, |
| 94198 | /* VPINSRQrr */ |
| 94199 | 47962, |
| 94200 | /* VPINSRWZrm */ |
| 94201 | 47966, |
| 94202 | /* VPINSRWZrr */ |
| 94203 | 47970, |
| 94204 | /* VPINSRWrm */ |
| 94205 | 47974, |
| 94206 | /* VPINSRWrr */ |
| 94207 | 47978, |
| 94208 | /* VPLZCNTDZ128rm */ |
| 94209 | 47982, |
| 94210 | /* VPLZCNTDZ128rmb */ |
| 94211 | 47984, |
| 94212 | /* VPLZCNTDZ128rmbk */ |
| 94213 | 47986, |
| 94214 | /* VPLZCNTDZ128rmbkz */ |
| 94215 | 47990, |
| 94216 | /* VPLZCNTDZ128rmk */ |
| 94217 | 47993, |
| 94218 | /* VPLZCNTDZ128rmkz */ |
| 94219 | 47997, |
| 94220 | /* VPLZCNTDZ128rr */ |
| 94221 | 48000, |
| 94222 | /* VPLZCNTDZ128rrk */ |
| 94223 | 48002, |
| 94224 | /* VPLZCNTDZ128rrkz */ |
| 94225 | 48006, |
| 94226 | /* VPLZCNTDZ256rm */ |
| 94227 | 48009, |
| 94228 | /* VPLZCNTDZ256rmb */ |
| 94229 | 48011, |
| 94230 | /* VPLZCNTDZ256rmbk */ |
| 94231 | 48013, |
| 94232 | /* VPLZCNTDZ256rmbkz */ |
| 94233 | 48017, |
| 94234 | /* VPLZCNTDZ256rmk */ |
| 94235 | 48020, |
| 94236 | /* VPLZCNTDZ256rmkz */ |
| 94237 | 48024, |
| 94238 | /* VPLZCNTDZ256rr */ |
| 94239 | 48027, |
| 94240 | /* VPLZCNTDZ256rrk */ |
| 94241 | 48029, |
| 94242 | /* VPLZCNTDZ256rrkz */ |
| 94243 | 48033, |
| 94244 | /* VPLZCNTDZrm */ |
| 94245 | 48036, |
| 94246 | /* VPLZCNTDZrmb */ |
| 94247 | 48038, |
| 94248 | /* VPLZCNTDZrmbk */ |
| 94249 | 48040, |
| 94250 | /* VPLZCNTDZrmbkz */ |
| 94251 | 48044, |
| 94252 | /* VPLZCNTDZrmk */ |
| 94253 | 48047, |
| 94254 | /* VPLZCNTDZrmkz */ |
| 94255 | 48051, |
| 94256 | /* VPLZCNTDZrr */ |
| 94257 | 48054, |
| 94258 | /* VPLZCNTDZrrk */ |
| 94259 | 48056, |
| 94260 | /* VPLZCNTDZrrkz */ |
| 94261 | 48060, |
| 94262 | /* VPLZCNTQZ128rm */ |
| 94263 | 48063, |
| 94264 | /* VPLZCNTQZ128rmb */ |
| 94265 | 48065, |
| 94266 | /* VPLZCNTQZ128rmbk */ |
| 94267 | 48067, |
| 94268 | /* VPLZCNTQZ128rmbkz */ |
| 94269 | 48071, |
| 94270 | /* VPLZCNTQZ128rmk */ |
| 94271 | 48074, |
| 94272 | /* VPLZCNTQZ128rmkz */ |
| 94273 | 48078, |
| 94274 | /* VPLZCNTQZ128rr */ |
| 94275 | 48081, |
| 94276 | /* VPLZCNTQZ128rrk */ |
| 94277 | 48083, |
| 94278 | /* VPLZCNTQZ128rrkz */ |
| 94279 | 48087, |
| 94280 | /* VPLZCNTQZ256rm */ |
| 94281 | 48090, |
| 94282 | /* VPLZCNTQZ256rmb */ |
| 94283 | 48092, |
| 94284 | /* VPLZCNTQZ256rmbk */ |
| 94285 | 48094, |
| 94286 | /* VPLZCNTQZ256rmbkz */ |
| 94287 | 48098, |
| 94288 | /* VPLZCNTQZ256rmk */ |
| 94289 | 48101, |
| 94290 | /* VPLZCNTQZ256rmkz */ |
| 94291 | 48105, |
| 94292 | /* VPLZCNTQZ256rr */ |
| 94293 | 48108, |
| 94294 | /* VPLZCNTQZ256rrk */ |
| 94295 | 48110, |
| 94296 | /* VPLZCNTQZ256rrkz */ |
| 94297 | 48114, |
| 94298 | /* VPLZCNTQZrm */ |
| 94299 | 48117, |
| 94300 | /* VPLZCNTQZrmb */ |
| 94301 | 48119, |
| 94302 | /* VPLZCNTQZrmbk */ |
| 94303 | 48121, |
| 94304 | /* VPLZCNTQZrmbkz */ |
| 94305 | 48125, |
| 94306 | /* VPLZCNTQZrmk */ |
| 94307 | 48128, |
| 94308 | /* VPLZCNTQZrmkz */ |
| 94309 | 48132, |
| 94310 | /* VPLZCNTQZrr */ |
| 94311 | 48135, |
| 94312 | /* VPLZCNTQZrrk */ |
| 94313 | 48137, |
| 94314 | /* VPLZCNTQZrrkz */ |
| 94315 | 48141, |
| 94316 | /* VPMACSDDrm */ |
| 94317 | 48144, |
| 94318 | /* VPMACSDDrr */ |
| 94319 | 48148, |
| 94320 | /* VPMACSDQHrm */ |
| 94321 | 48152, |
| 94322 | /* VPMACSDQHrr */ |
| 94323 | 48156, |
| 94324 | /* VPMACSDQLrm */ |
| 94325 | 48160, |
| 94326 | /* VPMACSDQLrr */ |
| 94327 | 48164, |
| 94328 | /* VPMACSSDDrm */ |
| 94329 | 48168, |
| 94330 | /* VPMACSSDDrr */ |
| 94331 | 48172, |
| 94332 | /* VPMACSSDQHrm */ |
| 94333 | 48176, |
| 94334 | /* VPMACSSDQHrr */ |
| 94335 | 48180, |
| 94336 | /* VPMACSSDQLrm */ |
| 94337 | 48184, |
| 94338 | /* VPMACSSDQLrr */ |
| 94339 | 48188, |
| 94340 | /* VPMACSSWDrm */ |
| 94341 | 48192, |
| 94342 | /* VPMACSSWDrr */ |
| 94343 | 48196, |
| 94344 | /* VPMACSSWWrm */ |
| 94345 | 48200, |
| 94346 | /* VPMACSSWWrr */ |
| 94347 | 48204, |
| 94348 | /* VPMACSWDrm */ |
| 94349 | 48208, |
| 94350 | /* VPMACSWDrr */ |
| 94351 | 48212, |
| 94352 | /* VPMACSWWrm */ |
| 94353 | 48216, |
| 94354 | /* VPMACSWWrr */ |
| 94355 | 48220, |
| 94356 | /* VPMADCSSWDrm */ |
| 94357 | 48224, |
| 94358 | /* VPMADCSSWDrr */ |
| 94359 | 48228, |
| 94360 | /* VPMADCSWDrm */ |
| 94361 | 48232, |
| 94362 | /* VPMADCSWDrr */ |
| 94363 | 48236, |
| 94364 | /* VPMADD52HUQYrm */ |
| 94365 | 48240, |
| 94366 | /* VPMADD52HUQYrr */ |
| 94367 | 48244, |
| 94368 | /* VPMADD52HUQZ128m */ |
| 94369 | 48248, |
| 94370 | /* VPMADD52HUQZ128mb */ |
| 94371 | 48252, |
| 94372 | /* VPMADD52HUQZ128mbk */ |
| 94373 | 48256, |
| 94374 | /* VPMADD52HUQZ128mbkz */ |
| 94375 | 48261, |
| 94376 | /* VPMADD52HUQZ128mk */ |
| 94377 | 48266, |
| 94378 | /* VPMADD52HUQZ128mkz */ |
| 94379 | 48271, |
| 94380 | /* VPMADD52HUQZ128r */ |
| 94381 | 48276, |
| 94382 | /* VPMADD52HUQZ128rk */ |
| 94383 | 48280, |
| 94384 | /* VPMADD52HUQZ128rkz */ |
| 94385 | 48285, |
| 94386 | /* VPMADD52HUQZ256m */ |
| 94387 | 48290, |
| 94388 | /* VPMADD52HUQZ256mb */ |
| 94389 | 48294, |
| 94390 | /* VPMADD52HUQZ256mbk */ |
| 94391 | 48298, |
| 94392 | /* VPMADD52HUQZ256mbkz */ |
| 94393 | 48303, |
| 94394 | /* VPMADD52HUQZ256mk */ |
| 94395 | 48308, |
| 94396 | /* VPMADD52HUQZ256mkz */ |
| 94397 | 48313, |
| 94398 | /* VPMADD52HUQZ256r */ |
| 94399 | 48318, |
| 94400 | /* VPMADD52HUQZ256rk */ |
| 94401 | 48322, |
| 94402 | /* VPMADD52HUQZ256rkz */ |
| 94403 | 48327, |
| 94404 | /* VPMADD52HUQZm */ |
| 94405 | 48332, |
| 94406 | /* VPMADD52HUQZmb */ |
| 94407 | 48336, |
| 94408 | /* VPMADD52HUQZmbk */ |
| 94409 | 48340, |
| 94410 | /* VPMADD52HUQZmbkz */ |
| 94411 | 48345, |
| 94412 | /* VPMADD52HUQZmk */ |
| 94413 | 48350, |
| 94414 | /* VPMADD52HUQZmkz */ |
| 94415 | 48355, |
| 94416 | /* VPMADD52HUQZr */ |
| 94417 | 48360, |
| 94418 | /* VPMADD52HUQZrk */ |
| 94419 | 48364, |
| 94420 | /* VPMADD52HUQZrkz */ |
| 94421 | 48369, |
| 94422 | /* VPMADD52HUQrm */ |
| 94423 | 48374, |
| 94424 | /* VPMADD52HUQrr */ |
| 94425 | 48378, |
| 94426 | /* VPMADD52LUQYrm */ |
| 94427 | 48382, |
| 94428 | /* VPMADD52LUQYrr */ |
| 94429 | 48386, |
| 94430 | /* VPMADD52LUQZ128m */ |
| 94431 | 48390, |
| 94432 | /* VPMADD52LUQZ128mb */ |
| 94433 | 48394, |
| 94434 | /* VPMADD52LUQZ128mbk */ |
| 94435 | 48398, |
| 94436 | /* VPMADD52LUQZ128mbkz */ |
| 94437 | 48403, |
| 94438 | /* VPMADD52LUQZ128mk */ |
| 94439 | 48408, |
| 94440 | /* VPMADD52LUQZ128mkz */ |
| 94441 | 48413, |
| 94442 | /* VPMADD52LUQZ128r */ |
| 94443 | 48418, |
| 94444 | /* VPMADD52LUQZ128rk */ |
| 94445 | 48422, |
| 94446 | /* VPMADD52LUQZ128rkz */ |
| 94447 | 48427, |
| 94448 | /* VPMADD52LUQZ256m */ |
| 94449 | 48432, |
| 94450 | /* VPMADD52LUQZ256mb */ |
| 94451 | 48436, |
| 94452 | /* VPMADD52LUQZ256mbk */ |
| 94453 | 48440, |
| 94454 | /* VPMADD52LUQZ256mbkz */ |
| 94455 | 48445, |
| 94456 | /* VPMADD52LUQZ256mk */ |
| 94457 | 48450, |
| 94458 | /* VPMADD52LUQZ256mkz */ |
| 94459 | 48455, |
| 94460 | /* VPMADD52LUQZ256r */ |
| 94461 | 48460, |
| 94462 | /* VPMADD52LUQZ256rk */ |
| 94463 | 48464, |
| 94464 | /* VPMADD52LUQZ256rkz */ |
| 94465 | 48469, |
| 94466 | /* VPMADD52LUQZm */ |
| 94467 | 48474, |
| 94468 | /* VPMADD52LUQZmb */ |
| 94469 | 48478, |
| 94470 | /* VPMADD52LUQZmbk */ |
| 94471 | 48482, |
| 94472 | /* VPMADD52LUQZmbkz */ |
| 94473 | 48487, |
| 94474 | /* VPMADD52LUQZmk */ |
| 94475 | 48492, |
| 94476 | /* VPMADD52LUQZmkz */ |
| 94477 | 48497, |
| 94478 | /* VPMADD52LUQZr */ |
| 94479 | 48502, |
| 94480 | /* VPMADD52LUQZrk */ |
| 94481 | 48506, |
| 94482 | /* VPMADD52LUQZrkz */ |
| 94483 | 48511, |
| 94484 | /* VPMADD52LUQrm */ |
| 94485 | 48516, |
| 94486 | /* VPMADD52LUQrr */ |
| 94487 | 48520, |
| 94488 | /* VPMADDUBSWYrm */ |
| 94489 | 48524, |
| 94490 | /* VPMADDUBSWYrr */ |
| 94491 | 48527, |
| 94492 | /* VPMADDUBSWZ128rm */ |
| 94493 | 48530, |
| 94494 | /* VPMADDUBSWZ128rmk */ |
| 94495 | 48533, |
| 94496 | /* VPMADDUBSWZ128rmkz */ |
| 94497 | 48538, |
| 94498 | /* VPMADDUBSWZ128rr */ |
| 94499 | 48542, |
| 94500 | /* VPMADDUBSWZ128rrk */ |
| 94501 | 48545, |
| 94502 | /* VPMADDUBSWZ128rrkz */ |
| 94503 | 48550, |
| 94504 | /* VPMADDUBSWZ256rm */ |
| 94505 | 48554, |
| 94506 | /* VPMADDUBSWZ256rmk */ |
| 94507 | 48557, |
| 94508 | /* VPMADDUBSWZ256rmkz */ |
| 94509 | 48562, |
| 94510 | /* VPMADDUBSWZ256rr */ |
| 94511 | 48566, |
| 94512 | /* VPMADDUBSWZ256rrk */ |
| 94513 | 48569, |
| 94514 | /* VPMADDUBSWZ256rrkz */ |
| 94515 | 48574, |
| 94516 | /* VPMADDUBSWZrm */ |
| 94517 | 48578, |
| 94518 | /* VPMADDUBSWZrmk */ |
| 94519 | 48581, |
| 94520 | /* VPMADDUBSWZrmkz */ |
| 94521 | 48586, |
| 94522 | /* VPMADDUBSWZrr */ |
| 94523 | 48590, |
| 94524 | /* VPMADDUBSWZrrk */ |
| 94525 | 48593, |
| 94526 | /* VPMADDUBSWZrrkz */ |
| 94527 | 48598, |
| 94528 | /* VPMADDUBSWrm */ |
| 94529 | 48602, |
| 94530 | /* VPMADDUBSWrr */ |
| 94531 | 48605, |
| 94532 | /* VPMADDWDYrm */ |
| 94533 | 48608, |
| 94534 | /* VPMADDWDYrr */ |
| 94535 | 48611, |
| 94536 | /* VPMADDWDZ128rm */ |
| 94537 | 48614, |
| 94538 | /* VPMADDWDZ128rmk */ |
| 94539 | 48617, |
| 94540 | /* VPMADDWDZ128rmkz */ |
| 94541 | 48622, |
| 94542 | /* VPMADDWDZ128rr */ |
| 94543 | 48626, |
| 94544 | /* VPMADDWDZ128rrk */ |
| 94545 | 48629, |
| 94546 | /* VPMADDWDZ128rrkz */ |
| 94547 | 48634, |
| 94548 | /* VPMADDWDZ256rm */ |
| 94549 | 48638, |
| 94550 | /* VPMADDWDZ256rmk */ |
| 94551 | 48641, |
| 94552 | /* VPMADDWDZ256rmkz */ |
| 94553 | 48646, |
| 94554 | /* VPMADDWDZ256rr */ |
| 94555 | 48650, |
| 94556 | /* VPMADDWDZ256rrk */ |
| 94557 | 48653, |
| 94558 | /* VPMADDWDZ256rrkz */ |
| 94559 | 48658, |
| 94560 | /* VPMADDWDZrm */ |
| 94561 | 48662, |
| 94562 | /* VPMADDWDZrmk */ |
| 94563 | 48665, |
| 94564 | /* VPMADDWDZrmkz */ |
| 94565 | 48670, |
| 94566 | /* VPMADDWDZrr */ |
| 94567 | 48674, |
| 94568 | /* VPMADDWDZrrk */ |
| 94569 | 48677, |
| 94570 | /* VPMADDWDZrrkz */ |
| 94571 | 48682, |
| 94572 | /* VPMADDWDrm */ |
| 94573 | 48686, |
| 94574 | /* VPMADDWDrr */ |
| 94575 | 48689, |
| 94576 | /* VPMASKMOVDYmr */ |
| 94577 | 48692, |
| 94578 | /* VPMASKMOVDYrm */ |
| 94579 | 48695, |
| 94580 | /* VPMASKMOVDmr */ |
| 94581 | 48698, |
| 94582 | /* VPMASKMOVDrm */ |
| 94583 | 48701, |
| 94584 | /* VPMASKMOVQYmr */ |
| 94585 | 48704, |
| 94586 | /* VPMASKMOVQYrm */ |
| 94587 | 48707, |
| 94588 | /* VPMASKMOVQmr */ |
| 94589 | 48710, |
| 94590 | /* VPMASKMOVQrm */ |
| 94591 | 48713, |
| 94592 | /* VPMAXSBYrm */ |
| 94593 | 48716, |
| 94594 | /* VPMAXSBYrr */ |
| 94595 | 48719, |
| 94596 | /* VPMAXSBZ128rm */ |
| 94597 | 48722, |
| 94598 | /* VPMAXSBZ128rmk */ |
| 94599 | 48725, |
| 94600 | /* VPMAXSBZ128rmkz */ |
| 94601 | 48730, |
| 94602 | /* VPMAXSBZ128rr */ |
| 94603 | 48734, |
| 94604 | /* VPMAXSBZ128rrk */ |
| 94605 | 48737, |
| 94606 | /* VPMAXSBZ128rrkz */ |
| 94607 | 48742, |
| 94608 | /* VPMAXSBZ256rm */ |
| 94609 | 48746, |
| 94610 | /* VPMAXSBZ256rmk */ |
| 94611 | 48749, |
| 94612 | /* VPMAXSBZ256rmkz */ |
| 94613 | 48754, |
| 94614 | /* VPMAXSBZ256rr */ |
| 94615 | 48758, |
| 94616 | /* VPMAXSBZ256rrk */ |
| 94617 | 48761, |
| 94618 | /* VPMAXSBZ256rrkz */ |
| 94619 | 48766, |
| 94620 | /* VPMAXSBZrm */ |
| 94621 | 48770, |
| 94622 | /* VPMAXSBZrmk */ |
| 94623 | 48773, |
| 94624 | /* VPMAXSBZrmkz */ |
| 94625 | 48778, |
| 94626 | /* VPMAXSBZrr */ |
| 94627 | 48782, |
| 94628 | /* VPMAXSBZrrk */ |
| 94629 | 48785, |
| 94630 | /* VPMAXSBZrrkz */ |
| 94631 | 48790, |
| 94632 | /* VPMAXSBrm */ |
| 94633 | 48794, |
| 94634 | /* VPMAXSBrr */ |
| 94635 | 48797, |
| 94636 | /* VPMAXSDYrm */ |
| 94637 | 48800, |
| 94638 | /* VPMAXSDYrr */ |
| 94639 | 48803, |
| 94640 | /* VPMAXSDZ128rm */ |
| 94641 | 48806, |
| 94642 | /* VPMAXSDZ128rmb */ |
| 94643 | 48809, |
| 94644 | /* VPMAXSDZ128rmbk */ |
| 94645 | 48812, |
| 94646 | /* VPMAXSDZ128rmbkz */ |
| 94647 | 48817, |
| 94648 | /* VPMAXSDZ128rmk */ |
| 94649 | 48821, |
| 94650 | /* VPMAXSDZ128rmkz */ |
| 94651 | 48826, |
| 94652 | /* VPMAXSDZ128rr */ |
| 94653 | 48830, |
| 94654 | /* VPMAXSDZ128rrk */ |
| 94655 | 48833, |
| 94656 | /* VPMAXSDZ128rrkz */ |
| 94657 | 48838, |
| 94658 | /* VPMAXSDZ256rm */ |
| 94659 | 48842, |
| 94660 | /* VPMAXSDZ256rmb */ |
| 94661 | 48845, |
| 94662 | /* VPMAXSDZ256rmbk */ |
| 94663 | 48848, |
| 94664 | /* VPMAXSDZ256rmbkz */ |
| 94665 | 48853, |
| 94666 | /* VPMAXSDZ256rmk */ |
| 94667 | 48857, |
| 94668 | /* VPMAXSDZ256rmkz */ |
| 94669 | 48862, |
| 94670 | /* VPMAXSDZ256rr */ |
| 94671 | 48866, |
| 94672 | /* VPMAXSDZ256rrk */ |
| 94673 | 48869, |
| 94674 | /* VPMAXSDZ256rrkz */ |
| 94675 | 48874, |
| 94676 | /* VPMAXSDZrm */ |
| 94677 | 48878, |
| 94678 | /* VPMAXSDZrmb */ |
| 94679 | 48881, |
| 94680 | /* VPMAXSDZrmbk */ |
| 94681 | 48884, |
| 94682 | /* VPMAXSDZrmbkz */ |
| 94683 | 48889, |
| 94684 | /* VPMAXSDZrmk */ |
| 94685 | 48893, |
| 94686 | /* VPMAXSDZrmkz */ |
| 94687 | 48898, |
| 94688 | /* VPMAXSDZrr */ |
| 94689 | 48902, |
| 94690 | /* VPMAXSDZrrk */ |
| 94691 | 48905, |
| 94692 | /* VPMAXSDZrrkz */ |
| 94693 | 48910, |
| 94694 | /* VPMAXSDrm */ |
| 94695 | 48914, |
| 94696 | /* VPMAXSDrr */ |
| 94697 | 48917, |
| 94698 | /* VPMAXSQZ128rm */ |
| 94699 | 48920, |
| 94700 | /* VPMAXSQZ128rmb */ |
| 94701 | 48923, |
| 94702 | /* VPMAXSQZ128rmbk */ |
| 94703 | 48926, |
| 94704 | /* VPMAXSQZ128rmbkz */ |
| 94705 | 48931, |
| 94706 | /* VPMAXSQZ128rmk */ |
| 94707 | 48935, |
| 94708 | /* VPMAXSQZ128rmkz */ |
| 94709 | 48940, |
| 94710 | /* VPMAXSQZ128rr */ |
| 94711 | 48944, |
| 94712 | /* VPMAXSQZ128rrk */ |
| 94713 | 48947, |
| 94714 | /* VPMAXSQZ128rrkz */ |
| 94715 | 48952, |
| 94716 | /* VPMAXSQZ256rm */ |
| 94717 | 48956, |
| 94718 | /* VPMAXSQZ256rmb */ |
| 94719 | 48959, |
| 94720 | /* VPMAXSQZ256rmbk */ |
| 94721 | 48962, |
| 94722 | /* VPMAXSQZ256rmbkz */ |
| 94723 | 48967, |
| 94724 | /* VPMAXSQZ256rmk */ |
| 94725 | 48971, |
| 94726 | /* VPMAXSQZ256rmkz */ |
| 94727 | 48976, |
| 94728 | /* VPMAXSQZ256rr */ |
| 94729 | 48980, |
| 94730 | /* VPMAXSQZ256rrk */ |
| 94731 | 48983, |
| 94732 | /* VPMAXSQZ256rrkz */ |
| 94733 | 48988, |
| 94734 | /* VPMAXSQZrm */ |
| 94735 | 48992, |
| 94736 | /* VPMAXSQZrmb */ |
| 94737 | 48995, |
| 94738 | /* VPMAXSQZrmbk */ |
| 94739 | 48998, |
| 94740 | /* VPMAXSQZrmbkz */ |
| 94741 | 49003, |
| 94742 | /* VPMAXSQZrmk */ |
| 94743 | 49007, |
| 94744 | /* VPMAXSQZrmkz */ |
| 94745 | 49012, |
| 94746 | /* VPMAXSQZrr */ |
| 94747 | 49016, |
| 94748 | /* VPMAXSQZrrk */ |
| 94749 | 49019, |
| 94750 | /* VPMAXSQZrrkz */ |
| 94751 | 49024, |
| 94752 | /* VPMAXSWYrm */ |
| 94753 | 49028, |
| 94754 | /* VPMAXSWYrr */ |
| 94755 | 49031, |
| 94756 | /* VPMAXSWZ128rm */ |
| 94757 | 49034, |
| 94758 | /* VPMAXSWZ128rmk */ |
| 94759 | 49037, |
| 94760 | /* VPMAXSWZ128rmkz */ |
| 94761 | 49042, |
| 94762 | /* VPMAXSWZ128rr */ |
| 94763 | 49046, |
| 94764 | /* VPMAXSWZ128rrk */ |
| 94765 | 49049, |
| 94766 | /* VPMAXSWZ128rrkz */ |
| 94767 | 49054, |
| 94768 | /* VPMAXSWZ256rm */ |
| 94769 | 49058, |
| 94770 | /* VPMAXSWZ256rmk */ |
| 94771 | 49061, |
| 94772 | /* VPMAXSWZ256rmkz */ |
| 94773 | 49066, |
| 94774 | /* VPMAXSWZ256rr */ |
| 94775 | 49070, |
| 94776 | /* VPMAXSWZ256rrk */ |
| 94777 | 49073, |
| 94778 | /* VPMAXSWZ256rrkz */ |
| 94779 | 49078, |
| 94780 | /* VPMAXSWZrm */ |
| 94781 | 49082, |
| 94782 | /* VPMAXSWZrmk */ |
| 94783 | 49085, |
| 94784 | /* VPMAXSWZrmkz */ |
| 94785 | 49090, |
| 94786 | /* VPMAXSWZrr */ |
| 94787 | 49094, |
| 94788 | /* VPMAXSWZrrk */ |
| 94789 | 49097, |
| 94790 | /* VPMAXSWZrrkz */ |
| 94791 | 49102, |
| 94792 | /* VPMAXSWrm */ |
| 94793 | 49106, |
| 94794 | /* VPMAXSWrr */ |
| 94795 | 49109, |
| 94796 | /* VPMAXUBYrm */ |
| 94797 | 49112, |
| 94798 | /* VPMAXUBYrr */ |
| 94799 | 49115, |
| 94800 | /* VPMAXUBZ128rm */ |
| 94801 | 49118, |
| 94802 | /* VPMAXUBZ128rmk */ |
| 94803 | 49121, |
| 94804 | /* VPMAXUBZ128rmkz */ |
| 94805 | 49126, |
| 94806 | /* VPMAXUBZ128rr */ |
| 94807 | 49130, |
| 94808 | /* VPMAXUBZ128rrk */ |
| 94809 | 49133, |
| 94810 | /* VPMAXUBZ128rrkz */ |
| 94811 | 49138, |
| 94812 | /* VPMAXUBZ256rm */ |
| 94813 | 49142, |
| 94814 | /* VPMAXUBZ256rmk */ |
| 94815 | 49145, |
| 94816 | /* VPMAXUBZ256rmkz */ |
| 94817 | 49150, |
| 94818 | /* VPMAXUBZ256rr */ |
| 94819 | 49154, |
| 94820 | /* VPMAXUBZ256rrk */ |
| 94821 | 49157, |
| 94822 | /* VPMAXUBZ256rrkz */ |
| 94823 | 49162, |
| 94824 | /* VPMAXUBZrm */ |
| 94825 | 49166, |
| 94826 | /* VPMAXUBZrmk */ |
| 94827 | 49169, |
| 94828 | /* VPMAXUBZrmkz */ |
| 94829 | 49174, |
| 94830 | /* VPMAXUBZrr */ |
| 94831 | 49178, |
| 94832 | /* VPMAXUBZrrk */ |
| 94833 | 49181, |
| 94834 | /* VPMAXUBZrrkz */ |
| 94835 | 49186, |
| 94836 | /* VPMAXUBrm */ |
| 94837 | 49190, |
| 94838 | /* VPMAXUBrr */ |
| 94839 | 49193, |
| 94840 | /* VPMAXUDYrm */ |
| 94841 | 49196, |
| 94842 | /* VPMAXUDYrr */ |
| 94843 | 49199, |
| 94844 | /* VPMAXUDZ128rm */ |
| 94845 | 49202, |
| 94846 | /* VPMAXUDZ128rmb */ |
| 94847 | 49205, |
| 94848 | /* VPMAXUDZ128rmbk */ |
| 94849 | 49208, |
| 94850 | /* VPMAXUDZ128rmbkz */ |
| 94851 | 49213, |
| 94852 | /* VPMAXUDZ128rmk */ |
| 94853 | 49217, |
| 94854 | /* VPMAXUDZ128rmkz */ |
| 94855 | 49222, |
| 94856 | /* VPMAXUDZ128rr */ |
| 94857 | 49226, |
| 94858 | /* VPMAXUDZ128rrk */ |
| 94859 | 49229, |
| 94860 | /* VPMAXUDZ128rrkz */ |
| 94861 | 49234, |
| 94862 | /* VPMAXUDZ256rm */ |
| 94863 | 49238, |
| 94864 | /* VPMAXUDZ256rmb */ |
| 94865 | 49241, |
| 94866 | /* VPMAXUDZ256rmbk */ |
| 94867 | 49244, |
| 94868 | /* VPMAXUDZ256rmbkz */ |
| 94869 | 49249, |
| 94870 | /* VPMAXUDZ256rmk */ |
| 94871 | 49253, |
| 94872 | /* VPMAXUDZ256rmkz */ |
| 94873 | 49258, |
| 94874 | /* VPMAXUDZ256rr */ |
| 94875 | 49262, |
| 94876 | /* VPMAXUDZ256rrk */ |
| 94877 | 49265, |
| 94878 | /* VPMAXUDZ256rrkz */ |
| 94879 | 49270, |
| 94880 | /* VPMAXUDZrm */ |
| 94881 | 49274, |
| 94882 | /* VPMAXUDZrmb */ |
| 94883 | 49277, |
| 94884 | /* VPMAXUDZrmbk */ |
| 94885 | 49280, |
| 94886 | /* VPMAXUDZrmbkz */ |
| 94887 | 49285, |
| 94888 | /* VPMAXUDZrmk */ |
| 94889 | 49289, |
| 94890 | /* VPMAXUDZrmkz */ |
| 94891 | 49294, |
| 94892 | /* VPMAXUDZrr */ |
| 94893 | 49298, |
| 94894 | /* VPMAXUDZrrk */ |
| 94895 | 49301, |
| 94896 | /* VPMAXUDZrrkz */ |
| 94897 | 49306, |
| 94898 | /* VPMAXUDrm */ |
| 94899 | 49310, |
| 94900 | /* VPMAXUDrr */ |
| 94901 | 49313, |
| 94902 | /* VPMAXUQZ128rm */ |
| 94903 | 49316, |
| 94904 | /* VPMAXUQZ128rmb */ |
| 94905 | 49319, |
| 94906 | /* VPMAXUQZ128rmbk */ |
| 94907 | 49322, |
| 94908 | /* VPMAXUQZ128rmbkz */ |
| 94909 | 49327, |
| 94910 | /* VPMAXUQZ128rmk */ |
| 94911 | 49331, |
| 94912 | /* VPMAXUQZ128rmkz */ |
| 94913 | 49336, |
| 94914 | /* VPMAXUQZ128rr */ |
| 94915 | 49340, |
| 94916 | /* VPMAXUQZ128rrk */ |
| 94917 | 49343, |
| 94918 | /* VPMAXUQZ128rrkz */ |
| 94919 | 49348, |
| 94920 | /* VPMAXUQZ256rm */ |
| 94921 | 49352, |
| 94922 | /* VPMAXUQZ256rmb */ |
| 94923 | 49355, |
| 94924 | /* VPMAXUQZ256rmbk */ |
| 94925 | 49358, |
| 94926 | /* VPMAXUQZ256rmbkz */ |
| 94927 | 49363, |
| 94928 | /* VPMAXUQZ256rmk */ |
| 94929 | 49367, |
| 94930 | /* VPMAXUQZ256rmkz */ |
| 94931 | 49372, |
| 94932 | /* VPMAXUQZ256rr */ |
| 94933 | 49376, |
| 94934 | /* VPMAXUQZ256rrk */ |
| 94935 | 49379, |
| 94936 | /* VPMAXUQZ256rrkz */ |
| 94937 | 49384, |
| 94938 | /* VPMAXUQZrm */ |
| 94939 | 49388, |
| 94940 | /* VPMAXUQZrmb */ |
| 94941 | 49391, |
| 94942 | /* VPMAXUQZrmbk */ |
| 94943 | 49394, |
| 94944 | /* VPMAXUQZrmbkz */ |
| 94945 | 49399, |
| 94946 | /* VPMAXUQZrmk */ |
| 94947 | 49403, |
| 94948 | /* VPMAXUQZrmkz */ |
| 94949 | 49408, |
| 94950 | /* VPMAXUQZrr */ |
| 94951 | 49412, |
| 94952 | /* VPMAXUQZrrk */ |
| 94953 | 49415, |
| 94954 | /* VPMAXUQZrrkz */ |
| 94955 | 49420, |
| 94956 | /* VPMAXUWYrm */ |
| 94957 | 49424, |
| 94958 | /* VPMAXUWYrr */ |
| 94959 | 49427, |
| 94960 | /* VPMAXUWZ128rm */ |
| 94961 | 49430, |
| 94962 | /* VPMAXUWZ128rmk */ |
| 94963 | 49433, |
| 94964 | /* VPMAXUWZ128rmkz */ |
| 94965 | 49438, |
| 94966 | /* VPMAXUWZ128rr */ |
| 94967 | 49442, |
| 94968 | /* VPMAXUWZ128rrk */ |
| 94969 | 49445, |
| 94970 | /* VPMAXUWZ128rrkz */ |
| 94971 | 49450, |
| 94972 | /* VPMAXUWZ256rm */ |
| 94973 | 49454, |
| 94974 | /* VPMAXUWZ256rmk */ |
| 94975 | 49457, |
| 94976 | /* VPMAXUWZ256rmkz */ |
| 94977 | 49462, |
| 94978 | /* VPMAXUWZ256rr */ |
| 94979 | 49466, |
| 94980 | /* VPMAXUWZ256rrk */ |
| 94981 | 49469, |
| 94982 | /* VPMAXUWZ256rrkz */ |
| 94983 | 49474, |
| 94984 | /* VPMAXUWZrm */ |
| 94985 | 49478, |
| 94986 | /* VPMAXUWZrmk */ |
| 94987 | 49481, |
| 94988 | /* VPMAXUWZrmkz */ |
| 94989 | 49486, |
| 94990 | /* VPMAXUWZrr */ |
| 94991 | 49490, |
| 94992 | /* VPMAXUWZrrk */ |
| 94993 | 49493, |
| 94994 | /* VPMAXUWZrrkz */ |
| 94995 | 49498, |
| 94996 | /* VPMAXUWrm */ |
| 94997 | 49502, |
| 94998 | /* VPMAXUWrr */ |
| 94999 | 49505, |
| 95000 | /* VPMINSBYrm */ |
| 95001 | 49508, |
| 95002 | /* VPMINSBYrr */ |
| 95003 | 49511, |
| 95004 | /* VPMINSBZ128rm */ |
| 95005 | 49514, |
| 95006 | /* VPMINSBZ128rmk */ |
| 95007 | 49517, |
| 95008 | /* VPMINSBZ128rmkz */ |
| 95009 | 49522, |
| 95010 | /* VPMINSBZ128rr */ |
| 95011 | 49526, |
| 95012 | /* VPMINSBZ128rrk */ |
| 95013 | 49529, |
| 95014 | /* VPMINSBZ128rrkz */ |
| 95015 | 49534, |
| 95016 | /* VPMINSBZ256rm */ |
| 95017 | 49538, |
| 95018 | /* VPMINSBZ256rmk */ |
| 95019 | 49541, |
| 95020 | /* VPMINSBZ256rmkz */ |
| 95021 | 49546, |
| 95022 | /* VPMINSBZ256rr */ |
| 95023 | 49550, |
| 95024 | /* VPMINSBZ256rrk */ |
| 95025 | 49553, |
| 95026 | /* VPMINSBZ256rrkz */ |
| 95027 | 49558, |
| 95028 | /* VPMINSBZrm */ |
| 95029 | 49562, |
| 95030 | /* VPMINSBZrmk */ |
| 95031 | 49565, |
| 95032 | /* VPMINSBZrmkz */ |
| 95033 | 49570, |
| 95034 | /* VPMINSBZrr */ |
| 95035 | 49574, |
| 95036 | /* VPMINSBZrrk */ |
| 95037 | 49577, |
| 95038 | /* VPMINSBZrrkz */ |
| 95039 | 49582, |
| 95040 | /* VPMINSBrm */ |
| 95041 | 49586, |
| 95042 | /* VPMINSBrr */ |
| 95043 | 49589, |
| 95044 | /* VPMINSDYrm */ |
| 95045 | 49592, |
| 95046 | /* VPMINSDYrr */ |
| 95047 | 49595, |
| 95048 | /* VPMINSDZ128rm */ |
| 95049 | 49598, |
| 95050 | /* VPMINSDZ128rmb */ |
| 95051 | 49601, |
| 95052 | /* VPMINSDZ128rmbk */ |
| 95053 | 49604, |
| 95054 | /* VPMINSDZ128rmbkz */ |
| 95055 | 49609, |
| 95056 | /* VPMINSDZ128rmk */ |
| 95057 | 49613, |
| 95058 | /* VPMINSDZ128rmkz */ |
| 95059 | 49618, |
| 95060 | /* VPMINSDZ128rr */ |
| 95061 | 49622, |
| 95062 | /* VPMINSDZ128rrk */ |
| 95063 | 49625, |
| 95064 | /* VPMINSDZ128rrkz */ |
| 95065 | 49630, |
| 95066 | /* VPMINSDZ256rm */ |
| 95067 | 49634, |
| 95068 | /* VPMINSDZ256rmb */ |
| 95069 | 49637, |
| 95070 | /* VPMINSDZ256rmbk */ |
| 95071 | 49640, |
| 95072 | /* VPMINSDZ256rmbkz */ |
| 95073 | 49645, |
| 95074 | /* VPMINSDZ256rmk */ |
| 95075 | 49649, |
| 95076 | /* VPMINSDZ256rmkz */ |
| 95077 | 49654, |
| 95078 | /* VPMINSDZ256rr */ |
| 95079 | 49658, |
| 95080 | /* VPMINSDZ256rrk */ |
| 95081 | 49661, |
| 95082 | /* VPMINSDZ256rrkz */ |
| 95083 | 49666, |
| 95084 | /* VPMINSDZrm */ |
| 95085 | 49670, |
| 95086 | /* VPMINSDZrmb */ |
| 95087 | 49673, |
| 95088 | /* VPMINSDZrmbk */ |
| 95089 | 49676, |
| 95090 | /* VPMINSDZrmbkz */ |
| 95091 | 49681, |
| 95092 | /* VPMINSDZrmk */ |
| 95093 | 49685, |
| 95094 | /* VPMINSDZrmkz */ |
| 95095 | 49690, |
| 95096 | /* VPMINSDZrr */ |
| 95097 | 49694, |
| 95098 | /* VPMINSDZrrk */ |
| 95099 | 49697, |
| 95100 | /* VPMINSDZrrkz */ |
| 95101 | 49702, |
| 95102 | /* VPMINSDrm */ |
| 95103 | 49706, |
| 95104 | /* VPMINSDrr */ |
| 95105 | 49709, |
| 95106 | /* VPMINSQZ128rm */ |
| 95107 | 49712, |
| 95108 | /* VPMINSQZ128rmb */ |
| 95109 | 49715, |
| 95110 | /* VPMINSQZ128rmbk */ |
| 95111 | 49718, |
| 95112 | /* VPMINSQZ128rmbkz */ |
| 95113 | 49723, |
| 95114 | /* VPMINSQZ128rmk */ |
| 95115 | 49727, |
| 95116 | /* VPMINSQZ128rmkz */ |
| 95117 | 49732, |
| 95118 | /* VPMINSQZ128rr */ |
| 95119 | 49736, |
| 95120 | /* VPMINSQZ128rrk */ |
| 95121 | 49739, |
| 95122 | /* VPMINSQZ128rrkz */ |
| 95123 | 49744, |
| 95124 | /* VPMINSQZ256rm */ |
| 95125 | 49748, |
| 95126 | /* VPMINSQZ256rmb */ |
| 95127 | 49751, |
| 95128 | /* VPMINSQZ256rmbk */ |
| 95129 | 49754, |
| 95130 | /* VPMINSQZ256rmbkz */ |
| 95131 | 49759, |
| 95132 | /* VPMINSQZ256rmk */ |
| 95133 | 49763, |
| 95134 | /* VPMINSQZ256rmkz */ |
| 95135 | 49768, |
| 95136 | /* VPMINSQZ256rr */ |
| 95137 | 49772, |
| 95138 | /* VPMINSQZ256rrk */ |
| 95139 | 49775, |
| 95140 | /* VPMINSQZ256rrkz */ |
| 95141 | 49780, |
| 95142 | /* VPMINSQZrm */ |
| 95143 | 49784, |
| 95144 | /* VPMINSQZrmb */ |
| 95145 | 49787, |
| 95146 | /* VPMINSQZrmbk */ |
| 95147 | 49790, |
| 95148 | /* VPMINSQZrmbkz */ |
| 95149 | 49795, |
| 95150 | /* VPMINSQZrmk */ |
| 95151 | 49799, |
| 95152 | /* VPMINSQZrmkz */ |
| 95153 | 49804, |
| 95154 | /* VPMINSQZrr */ |
| 95155 | 49808, |
| 95156 | /* VPMINSQZrrk */ |
| 95157 | 49811, |
| 95158 | /* VPMINSQZrrkz */ |
| 95159 | 49816, |
| 95160 | /* VPMINSWYrm */ |
| 95161 | 49820, |
| 95162 | /* VPMINSWYrr */ |
| 95163 | 49823, |
| 95164 | /* VPMINSWZ128rm */ |
| 95165 | 49826, |
| 95166 | /* VPMINSWZ128rmk */ |
| 95167 | 49829, |
| 95168 | /* VPMINSWZ128rmkz */ |
| 95169 | 49834, |
| 95170 | /* VPMINSWZ128rr */ |
| 95171 | 49838, |
| 95172 | /* VPMINSWZ128rrk */ |
| 95173 | 49841, |
| 95174 | /* VPMINSWZ128rrkz */ |
| 95175 | 49846, |
| 95176 | /* VPMINSWZ256rm */ |
| 95177 | 49850, |
| 95178 | /* VPMINSWZ256rmk */ |
| 95179 | 49853, |
| 95180 | /* VPMINSWZ256rmkz */ |
| 95181 | 49858, |
| 95182 | /* VPMINSWZ256rr */ |
| 95183 | 49862, |
| 95184 | /* VPMINSWZ256rrk */ |
| 95185 | 49865, |
| 95186 | /* VPMINSWZ256rrkz */ |
| 95187 | 49870, |
| 95188 | /* VPMINSWZrm */ |
| 95189 | 49874, |
| 95190 | /* VPMINSWZrmk */ |
| 95191 | 49877, |
| 95192 | /* VPMINSWZrmkz */ |
| 95193 | 49882, |
| 95194 | /* VPMINSWZrr */ |
| 95195 | 49886, |
| 95196 | /* VPMINSWZrrk */ |
| 95197 | 49889, |
| 95198 | /* VPMINSWZrrkz */ |
| 95199 | 49894, |
| 95200 | /* VPMINSWrm */ |
| 95201 | 49898, |
| 95202 | /* VPMINSWrr */ |
| 95203 | 49901, |
| 95204 | /* VPMINUBYrm */ |
| 95205 | 49904, |
| 95206 | /* VPMINUBYrr */ |
| 95207 | 49907, |
| 95208 | /* VPMINUBZ128rm */ |
| 95209 | 49910, |
| 95210 | /* VPMINUBZ128rmk */ |
| 95211 | 49913, |
| 95212 | /* VPMINUBZ128rmkz */ |
| 95213 | 49918, |
| 95214 | /* VPMINUBZ128rr */ |
| 95215 | 49922, |
| 95216 | /* VPMINUBZ128rrk */ |
| 95217 | 49925, |
| 95218 | /* VPMINUBZ128rrkz */ |
| 95219 | 49930, |
| 95220 | /* VPMINUBZ256rm */ |
| 95221 | 49934, |
| 95222 | /* VPMINUBZ256rmk */ |
| 95223 | 49937, |
| 95224 | /* VPMINUBZ256rmkz */ |
| 95225 | 49942, |
| 95226 | /* VPMINUBZ256rr */ |
| 95227 | 49946, |
| 95228 | /* VPMINUBZ256rrk */ |
| 95229 | 49949, |
| 95230 | /* VPMINUBZ256rrkz */ |
| 95231 | 49954, |
| 95232 | /* VPMINUBZrm */ |
| 95233 | 49958, |
| 95234 | /* VPMINUBZrmk */ |
| 95235 | 49961, |
| 95236 | /* VPMINUBZrmkz */ |
| 95237 | 49966, |
| 95238 | /* VPMINUBZrr */ |
| 95239 | 49970, |
| 95240 | /* VPMINUBZrrk */ |
| 95241 | 49973, |
| 95242 | /* VPMINUBZrrkz */ |
| 95243 | 49978, |
| 95244 | /* VPMINUBrm */ |
| 95245 | 49982, |
| 95246 | /* VPMINUBrr */ |
| 95247 | 49985, |
| 95248 | /* VPMINUDYrm */ |
| 95249 | 49988, |
| 95250 | /* VPMINUDYrr */ |
| 95251 | 49991, |
| 95252 | /* VPMINUDZ128rm */ |
| 95253 | 49994, |
| 95254 | /* VPMINUDZ128rmb */ |
| 95255 | 49997, |
| 95256 | /* VPMINUDZ128rmbk */ |
| 95257 | 50000, |
| 95258 | /* VPMINUDZ128rmbkz */ |
| 95259 | 50005, |
| 95260 | /* VPMINUDZ128rmk */ |
| 95261 | 50009, |
| 95262 | /* VPMINUDZ128rmkz */ |
| 95263 | 50014, |
| 95264 | /* VPMINUDZ128rr */ |
| 95265 | 50018, |
| 95266 | /* VPMINUDZ128rrk */ |
| 95267 | 50021, |
| 95268 | /* VPMINUDZ128rrkz */ |
| 95269 | 50026, |
| 95270 | /* VPMINUDZ256rm */ |
| 95271 | 50030, |
| 95272 | /* VPMINUDZ256rmb */ |
| 95273 | 50033, |
| 95274 | /* VPMINUDZ256rmbk */ |
| 95275 | 50036, |
| 95276 | /* VPMINUDZ256rmbkz */ |
| 95277 | 50041, |
| 95278 | /* VPMINUDZ256rmk */ |
| 95279 | 50045, |
| 95280 | /* VPMINUDZ256rmkz */ |
| 95281 | 50050, |
| 95282 | /* VPMINUDZ256rr */ |
| 95283 | 50054, |
| 95284 | /* VPMINUDZ256rrk */ |
| 95285 | 50057, |
| 95286 | /* VPMINUDZ256rrkz */ |
| 95287 | 50062, |
| 95288 | /* VPMINUDZrm */ |
| 95289 | 50066, |
| 95290 | /* VPMINUDZrmb */ |
| 95291 | 50069, |
| 95292 | /* VPMINUDZrmbk */ |
| 95293 | 50072, |
| 95294 | /* VPMINUDZrmbkz */ |
| 95295 | 50077, |
| 95296 | /* VPMINUDZrmk */ |
| 95297 | 50081, |
| 95298 | /* VPMINUDZrmkz */ |
| 95299 | 50086, |
| 95300 | /* VPMINUDZrr */ |
| 95301 | 50090, |
| 95302 | /* VPMINUDZrrk */ |
| 95303 | 50093, |
| 95304 | /* VPMINUDZrrkz */ |
| 95305 | 50098, |
| 95306 | /* VPMINUDrm */ |
| 95307 | 50102, |
| 95308 | /* VPMINUDrr */ |
| 95309 | 50105, |
| 95310 | /* VPMINUQZ128rm */ |
| 95311 | 50108, |
| 95312 | /* VPMINUQZ128rmb */ |
| 95313 | 50111, |
| 95314 | /* VPMINUQZ128rmbk */ |
| 95315 | 50114, |
| 95316 | /* VPMINUQZ128rmbkz */ |
| 95317 | 50119, |
| 95318 | /* VPMINUQZ128rmk */ |
| 95319 | 50123, |
| 95320 | /* VPMINUQZ128rmkz */ |
| 95321 | 50128, |
| 95322 | /* VPMINUQZ128rr */ |
| 95323 | 50132, |
| 95324 | /* VPMINUQZ128rrk */ |
| 95325 | 50135, |
| 95326 | /* VPMINUQZ128rrkz */ |
| 95327 | 50140, |
| 95328 | /* VPMINUQZ256rm */ |
| 95329 | 50144, |
| 95330 | /* VPMINUQZ256rmb */ |
| 95331 | 50147, |
| 95332 | /* VPMINUQZ256rmbk */ |
| 95333 | 50150, |
| 95334 | /* VPMINUQZ256rmbkz */ |
| 95335 | 50155, |
| 95336 | /* VPMINUQZ256rmk */ |
| 95337 | 50159, |
| 95338 | /* VPMINUQZ256rmkz */ |
| 95339 | 50164, |
| 95340 | /* VPMINUQZ256rr */ |
| 95341 | 50168, |
| 95342 | /* VPMINUQZ256rrk */ |
| 95343 | 50171, |
| 95344 | /* VPMINUQZ256rrkz */ |
| 95345 | 50176, |
| 95346 | /* VPMINUQZrm */ |
| 95347 | 50180, |
| 95348 | /* VPMINUQZrmb */ |
| 95349 | 50183, |
| 95350 | /* VPMINUQZrmbk */ |
| 95351 | 50186, |
| 95352 | /* VPMINUQZrmbkz */ |
| 95353 | 50191, |
| 95354 | /* VPMINUQZrmk */ |
| 95355 | 50195, |
| 95356 | /* VPMINUQZrmkz */ |
| 95357 | 50200, |
| 95358 | /* VPMINUQZrr */ |
| 95359 | 50204, |
| 95360 | /* VPMINUQZrrk */ |
| 95361 | 50207, |
| 95362 | /* VPMINUQZrrkz */ |
| 95363 | 50212, |
| 95364 | /* VPMINUWYrm */ |
| 95365 | 50216, |
| 95366 | /* VPMINUWYrr */ |
| 95367 | 50219, |
| 95368 | /* VPMINUWZ128rm */ |
| 95369 | 50222, |
| 95370 | /* VPMINUWZ128rmk */ |
| 95371 | 50225, |
| 95372 | /* VPMINUWZ128rmkz */ |
| 95373 | 50230, |
| 95374 | /* VPMINUWZ128rr */ |
| 95375 | 50234, |
| 95376 | /* VPMINUWZ128rrk */ |
| 95377 | 50237, |
| 95378 | /* VPMINUWZ128rrkz */ |
| 95379 | 50242, |
| 95380 | /* VPMINUWZ256rm */ |
| 95381 | 50246, |
| 95382 | /* VPMINUWZ256rmk */ |
| 95383 | 50249, |
| 95384 | /* VPMINUWZ256rmkz */ |
| 95385 | 50254, |
| 95386 | /* VPMINUWZ256rr */ |
| 95387 | 50258, |
| 95388 | /* VPMINUWZ256rrk */ |
| 95389 | 50261, |
| 95390 | /* VPMINUWZ256rrkz */ |
| 95391 | 50266, |
| 95392 | /* VPMINUWZrm */ |
| 95393 | 50270, |
| 95394 | /* VPMINUWZrmk */ |
| 95395 | 50273, |
| 95396 | /* VPMINUWZrmkz */ |
| 95397 | 50278, |
| 95398 | /* VPMINUWZrr */ |
| 95399 | 50282, |
| 95400 | /* VPMINUWZrrk */ |
| 95401 | 50285, |
| 95402 | /* VPMINUWZrrkz */ |
| 95403 | 50290, |
| 95404 | /* VPMINUWrm */ |
| 95405 | 50294, |
| 95406 | /* VPMINUWrr */ |
| 95407 | 50297, |
| 95408 | /* VPMOVB2MZ128rr */ |
| 95409 | 50300, |
| 95410 | /* VPMOVB2MZ256rr */ |
| 95411 | 50302, |
| 95412 | /* VPMOVB2MZrr */ |
| 95413 | 50304, |
| 95414 | /* VPMOVD2MZ128rr */ |
| 95415 | 50306, |
| 95416 | /* VPMOVD2MZ256rr */ |
| 95417 | 50308, |
| 95418 | /* VPMOVD2MZrr */ |
| 95419 | 50310, |
| 95420 | /* VPMOVDBZ128mr */ |
| 95421 | 50312, |
| 95422 | /* VPMOVDBZ128mrk */ |
| 95423 | 50314, |
| 95424 | /* VPMOVDBZ128rr */ |
| 95425 | 50317, |
| 95426 | /* VPMOVDBZ128rrk */ |
| 95427 | 50319, |
| 95428 | /* VPMOVDBZ128rrkz */ |
| 95429 | 50323, |
| 95430 | /* VPMOVDBZ256mr */ |
| 95431 | 50326, |
| 95432 | /* VPMOVDBZ256mrk */ |
| 95433 | 50328, |
| 95434 | /* VPMOVDBZ256rr */ |
| 95435 | 50331, |
| 95436 | /* VPMOVDBZ256rrk */ |
| 95437 | 50333, |
| 95438 | /* VPMOVDBZ256rrkz */ |
| 95439 | 50337, |
| 95440 | /* VPMOVDBZmr */ |
| 95441 | 50340, |
| 95442 | /* VPMOVDBZmrk */ |
| 95443 | 50342, |
| 95444 | /* VPMOVDBZrr */ |
| 95445 | 50345, |
| 95446 | /* VPMOVDBZrrk */ |
| 95447 | 50347, |
| 95448 | /* VPMOVDBZrrkz */ |
| 95449 | 50351, |
| 95450 | /* VPMOVDWZ128mr */ |
| 95451 | 50354, |
| 95452 | /* VPMOVDWZ128mrk */ |
| 95453 | 50356, |
| 95454 | /* VPMOVDWZ128rr */ |
| 95455 | 50359, |
| 95456 | /* VPMOVDWZ128rrk */ |
| 95457 | 50361, |
| 95458 | /* VPMOVDWZ128rrkz */ |
| 95459 | 50365, |
| 95460 | /* VPMOVDWZ256mr */ |
| 95461 | 50368, |
| 95462 | /* VPMOVDWZ256mrk */ |
| 95463 | 50370, |
| 95464 | /* VPMOVDWZ256rr */ |
| 95465 | 50373, |
| 95466 | /* VPMOVDWZ256rrk */ |
| 95467 | 50375, |
| 95468 | /* VPMOVDWZ256rrkz */ |
| 95469 | 50379, |
| 95470 | /* VPMOVDWZmr */ |
| 95471 | 50382, |
| 95472 | /* VPMOVDWZmrk */ |
| 95473 | 50384, |
| 95474 | /* VPMOVDWZrr */ |
| 95475 | 50387, |
| 95476 | /* VPMOVDWZrrk */ |
| 95477 | 50389, |
| 95478 | /* VPMOVDWZrrkz */ |
| 95479 | 50393, |
| 95480 | /* VPMOVM2BZ128rr */ |
| 95481 | 50396, |
| 95482 | /* VPMOVM2BZ256rr */ |
| 95483 | 50398, |
| 95484 | /* VPMOVM2BZrr */ |
| 95485 | 50400, |
| 95486 | /* VPMOVM2DZ128rr */ |
| 95487 | 50402, |
| 95488 | /* VPMOVM2DZ256rr */ |
| 95489 | 50404, |
| 95490 | /* VPMOVM2DZrr */ |
| 95491 | 50406, |
| 95492 | /* VPMOVM2QZ128rr */ |
| 95493 | 50408, |
| 95494 | /* VPMOVM2QZ256rr */ |
| 95495 | 50410, |
| 95496 | /* VPMOVM2QZrr */ |
| 95497 | 50412, |
| 95498 | /* VPMOVM2WZ128rr */ |
| 95499 | 50414, |
| 95500 | /* VPMOVM2WZ256rr */ |
| 95501 | 50416, |
| 95502 | /* VPMOVM2WZrr */ |
| 95503 | 50418, |
| 95504 | /* VPMOVMSKBYrr */ |
| 95505 | 50420, |
| 95506 | /* VPMOVMSKBrr */ |
| 95507 | 50422, |
| 95508 | /* VPMOVQ2MZ128rr */ |
| 95509 | 50424, |
| 95510 | /* VPMOVQ2MZ256rr */ |
| 95511 | 50426, |
| 95512 | /* VPMOVQ2MZrr */ |
| 95513 | 50428, |
| 95514 | /* VPMOVQBZ128mr */ |
| 95515 | 50430, |
| 95516 | /* VPMOVQBZ128mrk */ |
| 95517 | 50432, |
| 95518 | /* VPMOVQBZ128rr */ |
| 95519 | 50435, |
| 95520 | /* VPMOVQBZ128rrk */ |
| 95521 | 50437, |
| 95522 | /* VPMOVQBZ128rrkz */ |
| 95523 | 50441, |
| 95524 | /* VPMOVQBZ256mr */ |
| 95525 | 50444, |
| 95526 | /* VPMOVQBZ256mrk */ |
| 95527 | 50446, |
| 95528 | /* VPMOVQBZ256rr */ |
| 95529 | 50449, |
| 95530 | /* VPMOVQBZ256rrk */ |
| 95531 | 50451, |
| 95532 | /* VPMOVQBZ256rrkz */ |
| 95533 | 50455, |
| 95534 | /* VPMOVQBZmr */ |
| 95535 | 50458, |
| 95536 | /* VPMOVQBZmrk */ |
| 95537 | 50460, |
| 95538 | /* VPMOVQBZrr */ |
| 95539 | 50463, |
| 95540 | /* VPMOVQBZrrk */ |
| 95541 | 50465, |
| 95542 | /* VPMOVQBZrrkz */ |
| 95543 | 50469, |
| 95544 | /* VPMOVQDZ128mr */ |
| 95545 | 50472, |
| 95546 | /* VPMOVQDZ128mrk */ |
| 95547 | 50474, |
| 95548 | /* VPMOVQDZ128rr */ |
| 95549 | 50477, |
| 95550 | /* VPMOVQDZ128rrk */ |
| 95551 | 50479, |
| 95552 | /* VPMOVQDZ128rrkz */ |
| 95553 | 50483, |
| 95554 | /* VPMOVQDZ256mr */ |
| 95555 | 50486, |
| 95556 | /* VPMOVQDZ256mrk */ |
| 95557 | 50488, |
| 95558 | /* VPMOVQDZ256rr */ |
| 95559 | 50491, |
| 95560 | /* VPMOVQDZ256rrk */ |
| 95561 | 50493, |
| 95562 | /* VPMOVQDZ256rrkz */ |
| 95563 | 50497, |
| 95564 | /* VPMOVQDZmr */ |
| 95565 | 50500, |
| 95566 | /* VPMOVQDZmrk */ |
| 95567 | 50502, |
| 95568 | /* VPMOVQDZrr */ |
| 95569 | 50505, |
| 95570 | /* VPMOVQDZrrk */ |
| 95571 | 50507, |
| 95572 | /* VPMOVQDZrrkz */ |
| 95573 | 50511, |
| 95574 | /* VPMOVQWZ128mr */ |
| 95575 | 50514, |
| 95576 | /* VPMOVQWZ128mrk */ |
| 95577 | 50516, |
| 95578 | /* VPMOVQWZ128rr */ |
| 95579 | 50519, |
| 95580 | /* VPMOVQWZ128rrk */ |
| 95581 | 50521, |
| 95582 | /* VPMOVQWZ128rrkz */ |
| 95583 | 50525, |
| 95584 | /* VPMOVQWZ256mr */ |
| 95585 | 50528, |
| 95586 | /* VPMOVQWZ256mrk */ |
| 95587 | 50530, |
| 95588 | /* VPMOVQWZ256rr */ |
| 95589 | 50533, |
| 95590 | /* VPMOVQWZ256rrk */ |
| 95591 | 50535, |
| 95592 | /* VPMOVQWZ256rrkz */ |
| 95593 | 50539, |
| 95594 | /* VPMOVQWZmr */ |
| 95595 | 50542, |
| 95596 | /* VPMOVQWZmrk */ |
| 95597 | 50544, |
| 95598 | /* VPMOVQWZrr */ |
| 95599 | 50547, |
| 95600 | /* VPMOVQWZrrk */ |
| 95601 | 50549, |
| 95602 | /* VPMOVQWZrrkz */ |
| 95603 | 50553, |
| 95604 | /* VPMOVSDBZ128mr */ |
| 95605 | 50556, |
| 95606 | /* VPMOVSDBZ128mrk */ |
| 95607 | 50558, |
| 95608 | /* VPMOVSDBZ128rr */ |
| 95609 | 50561, |
| 95610 | /* VPMOVSDBZ128rrk */ |
| 95611 | 50563, |
| 95612 | /* VPMOVSDBZ128rrkz */ |
| 95613 | 50567, |
| 95614 | /* VPMOVSDBZ256mr */ |
| 95615 | 50570, |
| 95616 | /* VPMOVSDBZ256mrk */ |
| 95617 | 50572, |
| 95618 | /* VPMOVSDBZ256rr */ |
| 95619 | 50575, |
| 95620 | /* VPMOVSDBZ256rrk */ |
| 95621 | 50577, |
| 95622 | /* VPMOVSDBZ256rrkz */ |
| 95623 | 50581, |
| 95624 | /* VPMOVSDBZmr */ |
| 95625 | 50584, |
| 95626 | /* VPMOVSDBZmrk */ |
| 95627 | 50586, |
| 95628 | /* VPMOVSDBZrr */ |
| 95629 | 50589, |
| 95630 | /* VPMOVSDBZrrk */ |
| 95631 | 50591, |
| 95632 | /* VPMOVSDBZrrkz */ |
| 95633 | 50595, |
| 95634 | /* VPMOVSDWZ128mr */ |
| 95635 | 50598, |
| 95636 | /* VPMOVSDWZ128mrk */ |
| 95637 | 50600, |
| 95638 | /* VPMOVSDWZ128rr */ |
| 95639 | 50603, |
| 95640 | /* VPMOVSDWZ128rrk */ |
| 95641 | 50605, |
| 95642 | /* VPMOVSDWZ128rrkz */ |
| 95643 | 50609, |
| 95644 | /* VPMOVSDWZ256mr */ |
| 95645 | 50612, |
| 95646 | /* VPMOVSDWZ256mrk */ |
| 95647 | 50614, |
| 95648 | /* VPMOVSDWZ256rr */ |
| 95649 | 50617, |
| 95650 | /* VPMOVSDWZ256rrk */ |
| 95651 | 50619, |
| 95652 | /* VPMOVSDWZ256rrkz */ |
| 95653 | 50623, |
| 95654 | /* VPMOVSDWZmr */ |
| 95655 | 50626, |
| 95656 | /* VPMOVSDWZmrk */ |
| 95657 | 50628, |
| 95658 | /* VPMOVSDWZrr */ |
| 95659 | 50631, |
| 95660 | /* VPMOVSDWZrrk */ |
| 95661 | 50633, |
| 95662 | /* VPMOVSDWZrrkz */ |
| 95663 | 50637, |
| 95664 | /* VPMOVSQBZ128mr */ |
| 95665 | 50640, |
| 95666 | /* VPMOVSQBZ128mrk */ |
| 95667 | 50642, |
| 95668 | /* VPMOVSQBZ128rr */ |
| 95669 | 50645, |
| 95670 | /* VPMOVSQBZ128rrk */ |
| 95671 | 50647, |
| 95672 | /* VPMOVSQBZ128rrkz */ |
| 95673 | 50651, |
| 95674 | /* VPMOVSQBZ256mr */ |
| 95675 | 50654, |
| 95676 | /* VPMOVSQBZ256mrk */ |
| 95677 | 50656, |
| 95678 | /* VPMOVSQBZ256rr */ |
| 95679 | 50659, |
| 95680 | /* VPMOVSQBZ256rrk */ |
| 95681 | 50661, |
| 95682 | /* VPMOVSQBZ256rrkz */ |
| 95683 | 50665, |
| 95684 | /* VPMOVSQBZmr */ |
| 95685 | 50668, |
| 95686 | /* VPMOVSQBZmrk */ |
| 95687 | 50670, |
| 95688 | /* VPMOVSQBZrr */ |
| 95689 | 50673, |
| 95690 | /* VPMOVSQBZrrk */ |
| 95691 | 50675, |
| 95692 | /* VPMOVSQBZrrkz */ |
| 95693 | 50679, |
| 95694 | /* VPMOVSQDZ128mr */ |
| 95695 | 50682, |
| 95696 | /* VPMOVSQDZ128mrk */ |
| 95697 | 50684, |
| 95698 | /* VPMOVSQDZ128rr */ |
| 95699 | 50687, |
| 95700 | /* VPMOVSQDZ128rrk */ |
| 95701 | 50689, |
| 95702 | /* VPMOVSQDZ128rrkz */ |
| 95703 | 50693, |
| 95704 | /* VPMOVSQDZ256mr */ |
| 95705 | 50696, |
| 95706 | /* VPMOVSQDZ256mrk */ |
| 95707 | 50698, |
| 95708 | /* VPMOVSQDZ256rr */ |
| 95709 | 50701, |
| 95710 | /* VPMOVSQDZ256rrk */ |
| 95711 | 50703, |
| 95712 | /* VPMOVSQDZ256rrkz */ |
| 95713 | 50707, |
| 95714 | /* VPMOVSQDZmr */ |
| 95715 | 50710, |
| 95716 | /* VPMOVSQDZmrk */ |
| 95717 | 50712, |
| 95718 | /* VPMOVSQDZrr */ |
| 95719 | 50715, |
| 95720 | /* VPMOVSQDZrrk */ |
| 95721 | 50717, |
| 95722 | /* VPMOVSQDZrrkz */ |
| 95723 | 50721, |
| 95724 | /* VPMOVSQWZ128mr */ |
| 95725 | 50724, |
| 95726 | /* VPMOVSQWZ128mrk */ |
| 95727 | 50726, |
| 95728 | /* VPMOVSQWZ128rr */ |
| 95729 | 50729, |
| 95730 | /* VPMOVSQWZ128rrk */ |
| 95731 | 50731, |
| 95732 | /* VPMOVSQWZ128rrkz */ |
| 95733 | 50735, |
| 95734 | /* VPMOVSQWZ256mr */ |
| 95735 | 50738, |
| 95736 | /* VPMOVSQWZ256mrk */ |
| 95737 | 50740, |
| 95738 | /* VPMOVSQWZ256rr */ |
| 95739 | 50743, |
| 95740 | /* VPMOVSQWZ256rrk */ |
| 95741 | 50745, |
| 95742 | /* VPMOVSQWZ256rrkz */ |
| 95743 | 50749, |
| 95744 | /* VPMOVSQWZmr */ |
| 95745 | 50752, |
| 95746 | /* VPMOVSQWZmrk */ |
| 95747 | 50754, |
| 95748 | /* VPMOVSQWZrr */ |
| 95749 | 50757, |
| 95750 | /* VPMOVSQWZrrk */ |
| 95751 | 50759, |
| 95752 | /* VPMOVSQWZrrkz */ |
| 95753 | 50763, |
| 95754 | /* VPMOVSWBZ128mr */ |
| 95755 | 50766, |
| 95756 | /* VPMOVSWBZ128mrk */ |
| 95757 | 50768, |
| 95758 | /* VPMOVSWBZ128rr */ |
| 95759 | 50771, |
| 95760 | /* VPMOVSWBZ128rrk */ |
| 95761 | 50773, |
| 95762 | /* VPMOVSWBZ128rrkz */ |
| 95763 | 50777, |
| 95764 | /* VPMOVSWBZ256mr */ |
| 95765 | 50780, |
| 95766 | /* VPMOVSWBZ256mrk */ |
| 95767 | 50782, |
| 95768 | /* VPMOVSWBZ256rr */ |
| 95769 | 50785, |
| 95770 | /* VPMOVSWBZ256rrk */ |
| 95771 | 50787, |
| 95772 | /* VPMOVSWBZ256rrkz */ |
| 95773 | 50791, |
| 95774 | /* VPMOVSWBZmr */ |
| 95775 | 50794, |
| 95776 | /* VPMOVSWBZmrk */ |
| 95777 | 50796, |
| 95778 | /* VPMOVSWBZrr */ |
| 95779 | 50799, |
| 95780 | /* VPMOVSWBZrrk */ |
| 95781 | 50801, |
| 95782 | /* VPMOVSWBZrrkz */ |
| 95783 | 50805, |
| 95784 | /* VPMOVSXBDYrm */ |
| 95785 | 50808, |
| 95786 | /* VPMOVSXBDYrr */ |
| 95787 | 50810, |
| 95788 | /* VPMOVSXBDZ128rm */ |
| 95789 | 50812, |
| 95790 | /* VPMOVSXBDZ128rmk */ |
| 95791 | 50814, |
| 95792 | /* VPMOVSXBDZ128rmkz */ |
| 95793 | 50818, |
| 95794 | /* VPMOVSXBDZ128rr */ |
| 95795 | 50821, |
| 95796 | /* VPMOVSXBDZ128rrk */ |
| 95797 | 50823, |
| 95798 | /* VPMOVSXBDZ128rrkz */ |
| 95799 | 50827, |
| 95800 | /* VPMOVSXBDZ256rm */ |
| 95801 | 50830, |
| 95802 | /* VPMOVSXBDZ256rmk */ |
| 95803 | 50832, |
| 95804 | /* VPMOVSXBDZ256rmkz */ |
| 95805 | 50836, |
| 95806 | /* VPMOVSXBDZ256rr */ |
| 95807 | 50839, |
| 95808 | /* VPMOVSXBDZ256rrk */ |
| 95809 | 50841, |
| 95810 | /* VPMOVSXBDZ256rrkz */ |
| 95811 | 50845, |
| 95812 | /* VPMOVSXBDZrm */ |
| 95813 | 50848, |
| 95814 | /* VPMOVSXBDZrmk */ |
| 95815 | 50850, |
| 95816 | /* VPMOVSXBDZrmkz */ |
| 95817 | 50854, |
| 95818 | /* VPMOVSXBDZrr */ |
| 95819 | 50857, |
| 95820 | /* VPMOVSXBDZrrk */ |
| 95821 | 50859, |
| 95822 | /* VPMOVSXBDZrrkz */ |
| 95823 | 50863, |
| 95824 | /* VPMOVSXBDrm */ |
| 95825 | 50866, |
| 95826 | /* VPMOVSXBDrr */ |
| 95827 | 50868, |
| 95828 | /* VPMOVSXBQYrm */ |
| 95829 | 50870, |
| 95830 | /* VPMOVSXBQYrr */ |
| 95831 | 50872, |
| 95832 | /* VPMOVSXBQZ128rm */ |
| 95833 | 50874, |
| 95834 | /* VPMOVSXBQZ128rmk */ |
| 95835 | 50876, |
| 95836 | /* VPMOVSXBQZ128rmkz */ |
| 95837 | 50880, |
| 95838 | /* VPMOVSXBQZ128rr */ |
| 95839 | 50883, |
| 95840 | /* VPMOVSXBQZ128rrk */ |
| 95841 | 50885, |
| 95842 | /* VPMOVSXBQZ128rrkz */ |
| 95843 | 50889, |
| 95844 | /* VPMOVSXBQZ256rm */ |
| 95845 | 50892, |
| 95846 | /* VPMOVSXBQZ256rmk */ |
| 95847 | 50894, |
| 95848 | /* VPMOVSXBQZ256rmkz */ |
| 95849 | 50898, |
| 95850 | /* VPMOVSXBQZ256rr */ |
| 95851 | 50901, |
| 95852 | /* VPMOVSXBQZ256rrk */ |
| 95853 | 50903, |
| 95854 | /* VPMOVSXBQZ256rrkz */ |
| 95855 | 50907, |
| 95856 | /* VPMOVSXBQZrm */ |
| 95857 | 50910, |
| 95858 | /* VPMOVSXBQZrmk */ |
| 95859 | 50912, |
| 95860 | /* VPMOVSXBQZrmkz */ |
| 95861 | 50916, |
| 95862 | /* VPMOVSXBQZrr */ |
| 95863 | 50919, |
| 95864 | /* VPMOVSXBQZrrk */ |
| 95865 | 50921, |
| 95866 | /* VPMOVSXBQZrrkz */ |
| 95867 | 50925, |
| 95868 | /* VPMOVSXBQrm */ |
| 95869 | 50928, |
| 95870 | /* VPMOVSXBQrr */ |
| 95871 | 50930, |
| 95872 | /* VPMOVSXBWYrm */ |
| 95873 | 50932, |
| 95874 | /* VPMOVSXBWYrr */ |
| 95875 | 50934, |
| 95876 | /* VPMOVSXBWZ128rm */ |
| 95877 | 50936, |
| 95878 | /* VPMOVSXBWZ128rmk */ |
| 95879 | 50938, |
| 95880 | /* VPMOVSXBWZ128rmkz */ |
| 95881 | 50942, |
| 95882 | /* VPMOVSXBWZ128rr */ |
| 95883 | 50945, |
| 95884 | /* VPMOVSXBWZ128rrk */ |
| 95885 | 50947, |
| 95886 | /* VPMOVSXBWZ128rrkz */ |
| 95887 | 50951, |
| 95888 | /* VPMOVSXBWZ256rm */ |
| 95889 | 50954, |
| 95890 | /* VPMOVSXBWZ256rmk */ |
| 95891 | 50956, |
| 95892 | /* VPMOVSXBWZ256rmkz */ |
| 95893 | 50960, |
| 95894 | /* VPMOVSXBWZ256rr */ |
| 95895 | 50963, |
| 95896 | /* VPMOVSXBWZ256rrk */ |
| 95897 | 50965, |
| 95898 | /* VPMOVSXBWZ256rrkz */ |
| 95899 | 50969, |
| 95900 | /* VPMOVSXBWZrm */ |
| 95901 | 50972, |
| 95902 | /* VPMOVSXBWZrmk */ |
| 95903 | 50974, |
| 95904 | /* VPMOVSXBWZrmkz */ |
| 95905 | 50978, |
| 95906 | /* VPMOVSXBWZrr */ |
| 95907 | 50981, |
| 95908 | /* VPMOVSXBWZrrk */ |
| 95909 | 50983, |
| 95910 | /* VPMOVSXBWZrrkz */ |
| 95911 | 50987, |
| 95912 | /* VPMOVSXBWrm */ |
| 95913 | 50990, |
| 95914 | /* VPMOVSXBWrr */ |
| 95915 | 50992, |
| 95916 | /* VPMOVSXDQYrm */ |
| 95917 | 50994, |
| 95918 | /* VPMOVSXDQYrr */ |
| 95919 | 50996, |
| 95920 | /* VPMOVSXDQZ128rm */ |
| 95921 | 50998, |
| 95922 | /* VPMOVSXDQZ128rmk */ |
| 95923 | 51000, |
| 95924 | /* VPMOVSXDQZ128rmkz */ |
| 95925 | 51004, |
| 95926 | /* VPMOVSXDQZ128rr */ |
| 95927 | 51007, |
| 95928 | /* VPMOVSXDQZ128rrk */ |
| 95929 | 51009, |
| 95930 | /* VPMOVSXDQZ128rrkz */ |
| 95931 | 51013, |
| 95932 | /* VPMOVSXDQZ256rm */ |
| 95933 | 51016, |
| 95934 | /* VPMOVSXDQZ256rmk */ |
| 95935 | 51018, |
| 95936 | /* VPMOVSXDQZ256rmkz */ |
| 95937 | 51022, |
| 95938 | /* VPMOVSXDQZ256rr */ |
| 95939 | 51025, |
| 95940 | /* VPMOVSXDQZ256rrk */ |
| 95941 | 51027, |
| 95942 | /* VPMOVSXDQZ256rrkz */ |
| 95943 | 51031, |
| 95944 | /* VPMOVSXDQZrm */ |
| 95945 | 51034, |
| 95946 | /* VPMOVSXDQZrmk */ |
| 95947 | 51036, |
| 95948 | /* VPMOVSXDQZrmkz */ |
| 95949 | 51040, |
| 95950 | /* VPMOVSXDQZrr */ |
| 95951 | 51043, |
| 95952 | /* VPMOVSXDQZrrk */ |
| 95953 | 51045, |
| 95954 | /* VPMOVSXDQZrrkz */ |
| 95955 | 51049, |
| 95956 | /* VPMOVSXDQrm */ |
| 95957 | 51052, |
| 95958 | /* VPMOVSXDQrr */ |
| 95959 | 51054, |
| 95960 | /* VPMOVSXWDYrm */ |
| 95961 | 51056, |
| 95962 | /* VPMOVSXWDYrr */ |
| 95963 | 51058, |
| 95964 | /* VPMOVSXWDZ128rm */ |
| 95965 | 51060, |
| 95966 | /* VPMOVSXWDZ128rmk */ |
| 95967 | 51062, |
| 95968 | /* VPMOVSXWDZ128rmkz */ |
| 95969 | 51066, |
| 95970 | /* VPMOVSXWDZ128rr */ |
| 95971 | 51069, |
| 95972 | /* VPMOVSXWDZ128rrk */ |
| 95973 | 51071, |
| 95974 | /* VPMOVSXWDZ128rrkz */ |
| 95975 | 51075, |
| 95976 | /* VPMOVSXWDZ256rm */ |
| 95977 | 51078, |
| 95978 | /* VPMOVSXWDZ256rmk */ |
| 95979 | 51080, |
| 95980 | /* VPMOVSXWDZ256rmkz */ |
| 95981 | 51084, |
| 95982 | /* VPMOVSXWDZ256rr */ |
| 95983 | 51087, |
| 95984 | /* VPMOVSXWDZ256rrk */ |
| 95985 | 51089, |
| 95986 | /* VPMOVSXWDZ256rrkz */ |
| 95987 | 51093, |
| 95988 | /* VPMOVSXWDZrm */ |
| 95989 | 51096, |
| 95990 | /* VPMOVSXWDZrmk */ |
| 95991 | 51098, |
| 95992 | /* VPMOVSXWDZrmkz */ |
| 95993 | 51102, |
| 95994 | /* VPMOVSXWDZrr */ |
| 95995 | 51105, |
| 95996 | /* VPMOVSXWDZrrk */ |
| 95997 | 51107, |
| 95998 | /* VPMOVSXWDZrrkz */ |
| 95999 | 51111, |
| 96000 | /* VPMOVSXWDrm */ |
| 96001 | 51114, |
| 96002 | /* VPMOVSXWDrr */ |
| 96003 | 51116, |
| 96004 | /* VPMOVSXWQYrm */ |
| 96005 | 51118, |
| 96006 | /* VPMOVSXWQYrr */ |
| 96007 | 51120, |
| 96008 | /* VPMOVSXWQZ128rm */ |
| 96009 | 51122, |
| 96010 | /* VPMOVSXWQZ128rmk */ |
| 96011 | 51124, |
| 96012 | /* VPMOVSXWQZ128rmkz */ |
| 96013 | 51128, |
| 96014 | /* VPMOVSXWQZ128rr */ |
| 96015 | 51131, |
| 96016 | /* VPMOVSXWQZ128rrk */ |
| 96017 | 51133, |
| 96018 | /* VPMOVSXWQZ128rrkz */ |
| 96019 | 51137, |
| 96020 | /* VPMOVSXWQZ256rm */ |
| 96021 | 51140, |
| 96022 | /* VPMOVSXWQZ256rmk */ |
| 96023 | 51142, |
| 96024 | /* VPMOVSXWQZ256rmkz */ |
| 96025 | 51146, |
| 96026 | /* VPMOVSXWQZ256rr */ |
| 96027 | 51149, |
| 96028 | /* VPMOVSXWQZ256rrk */ |
| 96029 | 51151, |
| 96030 | /* VPMOVSXWQZ256rrkz */ |
| 96031 | 51155, |
| 96032 | /* VPMOVSXWQZrm */ |
| 96033 | 51158, |
| 96034 | /* VPMOVSXWQZrmk */ |
| 96035 | 51160, |
| 96036 | /* VPMOVSXWQZrmkz */ |
| 96037 | 51164, |
| 96038 | /* VPMOVSXWQZrr */ |
| 96039 | 51167, |
| 96040 | /* VPMOVSXWQZrrk */ |
| 96041 | 51169, |
| 96042 | /* VPMOVSXWQZrrkz */ |
| 96043 | 51173, |
| 96044 | /* VPMOVSXWQrm */ |
| 96045 | 51176, |
| 96046 | /* VPMOVSXWQrr */ |
| 96047 | 51178, |
| 96048 | /* VPMOVUSDBZ128mr */ |
| 96049 | 51180, |
| 96050 | /* VPMOVUSDBZ128mrk */ |
| 96051 | 51182, |
| 96052 | /* VPMOVUSDBZ128rr */ |
| 96053 | 51185, |
| 96054 | /* VPMOVUSDBZ128rrk */ |
| 96055 | 51187, |
| 96056 | /* VPMOVUSDBZ128rrkz */ |
| 96057 | 51191, |
| 96058 | /* VPMOVUSDBZ256mr */ |
| 96059 | 51194, |
| 96060 | /* VPMOVUSDBZ256mrk */ |
| 96061 | 51196, |
| 96062 | /* VPMOVUSDBZ256rr */ |
| 96063 | 51199, |
| 96064 | /* VPMOVUSDBZ256rrk */ |
| 96065 | 51201, |
| 96066 | /* VPMOVUSDBZ256rrkz */ |
| 96067 | 51205, |
| 96068 | /* VPMOVUSDBZmr */ |
| 96069 | 51208, |
| 96070 | /* VPMOVUSDBZmrk */ |
| 96071 | 51210, |
| 96072 | /* VPMOVUSDBZrr */ |
| 96073 | 51213, |
| 96074 | /* VPMOVUSDBZrrk */ |
| 96075 | 51215, |
| 96076 | /* VPMOVUSDBZrrkz */ |
| 96077 | 51219, |
| 96078 | /* VPMOVUSDWZ128mr */ |
| 96079 | 51222, |
| 96080 | /* VPMOVUSDWZ128mrk */ |
| 96081 | 51224, |
| 96082 | /* VPMOVUSDWZ128rr */ |
| 96083 | 51227, |
| 96084 | /* VPMOVUSDWZ128rrk */ |
| 96085 | 51229, |
| 96086 | /* VPMOVUSDWZ128rrkz */ |
| 96087 | 51233, |
| 96088 | /* VPMOVUSDWZ256mr */ |
| 96089 | 51236, |
| 96090 | /* VPMOVUSDWZ256mrk */ |
| 96091 | 51238, |
| 96092 | /* VPMOVUSDWZ256rr */ |
| 96093 | 51241, |
| 96094 | /* VPMOVUSDWZ256rrk */ |
| 96095 | 51243, |
| 96096 | /* VPMOVUSDWZ256rrkz */ |
| 96097 | 51247, |
| 96098 | /* VPMOVUSDWZmr */ |
| 96099 | 51250, |
| 96100 | /* VPMOVUSDWZmrk */ |
| 96101 | 51252, |
| 96102 | /* VPMOVUSDWZrr */ |
| 96103 | 51255, |
| 96104 | /* VPMOVUSDWZrrk */ |
| 96105 | 51257, |
| 96106 | /* VPMOVUSDWZrrkz */ |
| 96107 | 51261, |
| 96108 | /* VPMOVUSQBZ128mr */ |
| 96109 | 51264, |
| 96110 | /* VPMOVUSQBZ128mrk */ |
| 96111 | 51266, |
| 96112 | /* VPMOVUSQBZ128rr */ |
| 96113 | 51269, |
| 96114 | /* VPMOVUSQBZ128rrk */ |
| 96115 | 51271, |
| 96116 | /* VPMOVUSQBZ128rrkz */ |
| 96117 | 51275, |
| 96118 | /* VPMOVUSQBZ256mr */ |
| 96119 | 51278, |
| 96120 | /* VPMOVUSQBZ256mrk */ |
| 96121 | 51280, |
| 96122 | /* VPMOVUSQBZ256rr */ |
| 96123 | 51283, |
| 96124 | /* VPMOVUSQBZ256rrk */ |
| 96125 | 51285, |
| 96126 | /* VPMOVUSQBZ256rrkz */ |
| 96127 | 51289, |
| 96128 | /* VPMOVUSQBZmr */ |
| 96129 | 51292, |
| 96130 | /* VPMOVUSQBZmrk */ |
| 96131 | 51294, |
| 96132 | /* VPMOVUSQBZrr */ |
| 96133 | 51297, |
| 96134 | /* VPMOVUSQBZrrk */ |
| 96135 | 51299, |
| 96136 | /* VPMOVUSQBZrrkz */ |
| 96137 | 51303, |
| 96138 | /* VPMOVUSQDZ128mr */ |
| 96139 | 51306, |
| 96140 | /* VPMOVUSQDZ128mrk */ |
| 96141 | 51308, |
| 96142 | /* VPMOVUSQDZ128rr */ |
| 96143 | 51311, |
| 96144 | /* VPMOVUSQDZ128rrk */ |
| 96145 | 51313, |
| 96146 | /* VPMOVUSQDZ128rrkz */ |
| 96147 | 51317, |
| 96148 | /* VPMOVUSQDZ256mr */ |
| 96149 | 51320, |
| 96150 | /* VPMOVUSQDZ256mrk */ |
| 96151 | 51322, |
| 96152 | /* VPMOVUSQDZ256rr */ |
| 96153 | 51325, |
| 96154 | /* VPMOVUSQDZ256rrk */ |
| 96155 | 51327, |
| 96156 | /* VPMOVUSQDZ256rrkz */ |
| 96157 | 51331, |
| 96158 | /* VPMOVUSQDZmr */ |
| 96159 | 51334, |
| 96160 | /* VPMOVUSQDZmrk */ |
| 96161 | 51336, |
| 96162 | /* VPMOVUSQDZrr */ |
| 96163 | 51339, |
| 96164 | /* VPMOVUSQDZrrk */ |
| 96165 | 51341, |
| 96166 | /* VPMOVUSQDZrrkz */ |
| 96167 | 51345, |
| 96168 | /* VPMOVUSQWZ128mr */ |
| 96169 | 51348, |
| 96170 | /* VPMOVUSQWZ128mrk */ |
| 96171 | 51350, |
| 96172 | /* VPMOVUSQWZ128rr */ |
| 96173 | 51353, |
| 96174 | /* VPMOVUSQWZ128rrk */ |
| 96175 | 51355, |
| 96176 | /* VPMOVUSQWZ128rrkz */ |
| 96177 | 51359, |
| 96178 | /* VPMOVUSQWZ256mr */ |
| 96179 | 51362, |
| 96180 | /* VPMOVUSQWZ256mrk */ |
| 96181 | 51364, |
| 96182 | /* VPMOVUSQWZ256rr */ |
| 96183 | 51367, |
| 96184 | /* VPMOVUSQWZ256rrk */ |
| 96185 | 51369, |
| 96186 | /* VPMOVUSQWZ256rrkz */ |
| 96187 | 51373, |
| 96188 | /* VPMOVUSQWZmr */ |
| 96189 | 51376, |
| 96190 | /* VPMOVUSQWZmrk */ |
| 96191 | 51378, |
| 96192 | /* VPMOVUSQWZrr */ |
| 96193 | 51381, |
| 96194 | /* VPMOVUSQWZrrk */ |
| 96195 | 51383, |
| 96196 | /* VPMOVUSQWZrrkz */ |
| 96197 | 51387, |
| 96198 | /* VPMOVUSWBZ128mr */ |
| 96199 | 51390, |
| 96200 | /* VPMOVUSWBZ128mrk */ |
| 96201 | 51392, |
| 96202 | /* VPMOVUSWBZ128rr */ |
| 96203 | 51395, |
| 96204 | /* VPMOVUSWBZ128rrk */ |
| 96205 | 51397, |
| 96206 | /* VPMOVUSWBZ128rrkz */ |
| 96207 | 51401, |
| 96208 | /* VPMOVUSWBZ256mr */ |
| 96209 | 51404, |
| 96210 | /* VPMOVUSWBZ256mrk */ |
| 96211 | 51406, |
| 96212 | /* VPMOVUSWBZ256rr */ |
| 96213 | 51409, |
| 96214 | /* VPMOVUSWBZ256rrk */ |
| 96215 | 51411, |
| 96216 | /* VPMOVUSWBZ256rrkz */ |
| 96217 | 51415, |
| 96218 | /* VPMOVUSWBZmr */ |
| 96219 | 51418, |
| 96220 | /* VPMOVUSWBZmrk */ |
| 96221 | 51420, |
| 96222 | /* VPMOVUSWBZrr */ |
| 96223 | 51423, |
| 96224 | /* VPMOVUSWBZrrk */ |
| 96225 | 51425, |
| 96226 | /* VPMOVUSWBZrrkz */ |
| 96227 | 51429, |
| 96228 | /* VPMOVW2MZ128rr */ |
| 96229 | 51432, |
| 96230 | /* VPMOVW2MZ256rr */ |
| 96231 | 51434, |
| 96232 | /* VPMOVW2MZrr */ |
| 96233 | 51436, |
| 96234 | /* VPMOVWBZ128mr */ |
| 96235 | 51438, |
| 96236 | /* VPMOVWBZ128mrk */ |
| 96237 | 51440, |
| 96238 | /* VPMOVWBZ128rr */ |
| 96239 | 51443, |
| 96240 | /* VPMOVWBZ128rrk */ |
| 96241 | 51445, |
| 96242 | /* VPMOVWBZ128rrkz */ |
| 96243 | 51449, |
| 96244 | /* VPMOVWBZ256mr */ |
| 96245 | 51452, |
| 96246 | /* VPMOVWBZ256mrk */ |
| 96247 | 51454, |
| 96248 | /* VPMOVWBZ256rr */ |
| 96249 | 51457, |
| 96250 | /* VPMOVWBZ256rrk */ |
| 96251 | 51459, |
| 96252 | /* VPMOVWBZ256rrkz */ |
| 96253 | 51463, |
| 96254 | /* VPMOVWBZmr */ |
| 96255 | 51466, |
| 96256 | /* VPMOVWBZmrk */ |
| 96257 | 51468, |
| 96258 | /* VPMOVWBZrr */ |
| 96259 | 51471, |
| 96260 | /* VPMOVWBZrrk */ |
| 96261 | 51473, |
| 96262 | /* VPMOVWBZrrkz */ |
| 96263 | 51477, |
| 96264 | /* VPMOVZXBDYrm */ |
| 96265 | 51480, |
| 96266 | /* VPMOVZXBDYrr */ |
| 96267 | 51482, |
| 96268 | /* VPMOVZXBDZ128rm */ |
| 96269 | 51484, |
| 96270 | /* VPMOVZXBDZ128rmk */ |
| 96271 | 51486, |
| 96272 | /* VPMOVZXBDZ128rmkz */ |
| 96273 | 51490, |
| 96274 | /* VPMOVZXBDZ128rr */ |
| 96275 | 51493, |
| 96276 | /* VPMOVZXBDZ128rrk */ |
| 96277 | 51495, |
| 96278 | /* VPMOVZXBDZ128rrkz */ |
| 96279 | 51499, |
| 96280 | /* VPMOVZXBDZ256rm */ |
| 96281 | 51502, |
| 96282 | /* VPMOVZXBDZ256rmk */ |
| 96283 | 51504, |
| 96284 | /* VPMOVZXBDZ256rmkz */ |
| 96285 | 51508, |
| 96286 | /* VPMOVZXBDZ256rr */ |
| 96287 | 51511, |
| 96288 | /* VPMOVZXBDZ256rrk */ |
| 96289 | 51513, |
| 96290 | /* VPMOVZXBDZ256rrkz */ |
| 96291 | 51517, |
| 96292 | /* VPMOVZXBDZrm */ |
| 96293 | 51520, |
| 96294 | /* VPMOVZXBDZrmk */ |
| 96295 | 51522, |
| 96296 | /* VPMOVZXBDZrmkz */ |
| 96297 | 51526, |
| 96298 | /* VPMOVZXBDZrr */ |
| 96299 | 51529, |
| 96300 | /* VPMOVZXBDZrrk */ |
| 96301 | 51531, |
| 96302 | /* VPMOVZXBDZrrkz */ |
| 96303 | 51535, |
| 96304 | /* VPMOVZXBDrm */ |
| 96305 | 51538, |
| 96306 | /* VPMOVZXBDrr */ |
| 96307 | 51540, |
| 96308 | /* VPMOVZXBQYrm */ |
| 96309 | 51542, |
| 96310 | /* VPMOVZXBQYrr */ |
| 96311 | 51544, |
| 96312 | /* VPMOVZXBQZ128rm */ |
| 96313 | 51546, |
| 96314 | /* VPMOVZXBQZ128rmk */ |
| 96315 | 51548, |
| 96316 | /* VPMOVZXBQZ128rmkz */ |
| 96317 | 51552, |
| 96318 | /* VPMOVZXBQZ128rr */ |
| 96319 | 51555, |
| 96320 | /* VPMOVZXBQZ128rrk */ |
| 96321 | 51557, |
| 96322 | /* VPMOVZXBQZ128rrkz */ |
| 96323 | 51561, |
| 96324 | /* VPMOVZXBQZ256rm */ |
| 96325 | 51564, |
| 96326 | /* VPMOVZXBQZ256rmk */ |
| 96327 | 51566, |
| 96328 | /* VPMOVZXBQZ256rmkz */ |
| 96329 | 51570, |
| 96330 | /* VPMOVZXBQZ256rr */ |
| 96331 | 51573, |
| 96332 | /* VPMOVZXBQZ256rrk */ |
| 96333 | 51575, |
| 96334 | /* VPMOVZXBQZ256rrkz */ |
| 96335 | 51579, |
| 96336 | /* VPMOVZXBQZrm */ |
| 96337 | 51582, |
| 96338 | /* VPMOVZXBQZrmk */ |
| 96339 | 51584, |
| 96340 | /* VPMOVZXBQZrmkz */ |
| 96341 | 51588, |
| 96342 | /* VPMOVZXBQZrr */ |
| 96343 | 51591, |
| 96344 | /* VPMOVZXBQZrrk */ |
| 96345 | 51593, |
| 96346 | /* VPMOVZXBQZrrkz */ |
| 96347 | 51597, |
| 96348 | /* VPMOVZXBQrm */ |
| 96349 | 51600, |
| 96350 | /* VPMOVZXBQrr */ |
| 96351 | 51602, |
| 96352 | /* VPMOVZXBWYrm */ |
| 96353 | 51604, |
| 96354 | /* VPMOVZXBWYrr */ |
| 96355 | 51606, |
| 96356 | /* VPMOVZXBWZ128rm */ |
| 96357 | 51608, |
| 96358 | /* VPMOVZXBWZ128rmk */ |
| 96359 | 51610, |
| 96360 | /* VPMOVZXBWZ128rmkz */ |
| 96361 | 51614, |
| 96362 | /* VPMOVZXBWZ128rr */ |
| 96363 | 51617, |
| 96364 | /* VPMOVZXBWZ128rrk */ |
| 96365 | 51619, |
| 96366 | /* VPMOVZXBWZ128rrkz */ |
| 96367 | 51623, |
| 96368 | /* VPMOVZXBWZ256rm */ |
| 96369 | 51626, |
| 96370 | /* VPMOVZXBWZ256rmk */ |
| 96371 | 51628, |
| 96372 | /* VPMOVZXBWZ256rmkz */ |
| 96373 | 51632, |
| 96374 | /* VPMOVZXBWZ256rr */ |
| 96375 | 51635, |
| 96376 | /* VPMOVZXBWZ256rrk */ |
| 96377 | 51637, |
| 96378 | /* VPMOVZXBWZ256rrkz */ |
| 96379 | 51641, |
| 96380 | /* VPMOVZXBWZrm */ |
| 96381 | 51644, |
| 96382 | /* VPMOVZXBWZrmk */ |
| 96383 | 51646, |
| 96384 | /* VPMOVZXBWZrmkz */ |
| 96385 | 51650, |
| 96386 | /* VPMOVZXBWZrr */ |
| 96387 | 51653, |
| 96388 | /* VPMOVZXBWZrrk */ |
| 96389 | 51655, |
| 96390 | /* VPMOVZXBWZrrkz */ |
| 96391 | 51659, |
| 96392 | /* VPMOVZXBWrm */ |
| 96393 | 51662, |
| 96394 | /* VPMOVZXBWrr */ |
| 96395 | 51664, |
| 96396 | /* VPMOVZXDQYrm */ |
| 96397 | 51666, |
| 96398 | /* VPMOVZXDQYrr */ |
| 96399 | 51668, |
| 96400 | /* VPMOVZXDQZ128rm */ |
| 96401 | 51670, |
| 96402 | /* VPMOVZXDQZ128rmk */ |
| 96403 | 51672, |
| 96404 | /* VPMOVZXDQZ128rmkz */ |
| 96405 | 51676, |
| 96406 | /* VPMOVZXDQZ128rr */ |
| 96407 | 51679, |
| 96408 | /* VPMOVZXDQZ128rrk */ |
| 96409 | 51681, |
| 96410 | /* VPMOVZXDQZ128rrkz */ |
| 96411 | 51685, |
| 96412 | /* VPMOVZXDQZ256rm */ |
| 96413 | 51688, |
| 96414 | /* VPMOVZXDQZ256rmk */ |
| 96415 | 51690, |
| 96416 | /* VPMOVZXDQZ256rmkz */ |
| 96417 | 51694, |
| 96418 | /* VPMOVZXDQZ256rr */ |
| 96419 | 51697, |
| 96420 | /* VPMOVZXDQZ256rrk */ |
| 96421 | 51699, |
| 96422 | /* VPMOVZXDQZ256rrkz */ |
| 96423 | 51703, |
| 96424 | /* VPMOVZXDQZrm */ |
| 96425 | 51706, |
| 96426 | /* VPMOVZXDQZrmk */ |
| 96427 | 51708, |
| 96428 | /* VPMOVZXDQZrmkz */ |
| 96429 | 51712, |
| 96430 | /* VPMOVZXDQZrr */ |
| 96431 | 51715, |
| 96432 | /* VPMOVZXDQZrrk */ |
| 96433 | 51717, |
| 96434 | /* VPMOVZXDQZrrkz */ |
| 96435 | 51721, |
| 96436 | /* VPMOVZXDQrm */ |
| 96437 | 51724, |
| 96438 | /* VPMOVZXDQrr */ |
| 96439 | 51726, |
| 96440 | /* VPMOVZXWDYrm */ |
| 96441 | 51728, |
| 96442 | /* VPMOVZXWDYrr */ |
| 96443 | 51730, |
| 96444 | /* VPMOVZXWDZ128rm */ |
| 96445 | 51732, |
| 96446 | /* VPMOVZXWDZ128rmk */ |
| 96447 | 51734, |
| 96448 | /* VPMOVZXWDZ128rmkz */ |
| 96449 | 51738, |
| 96450 | /* VPMOVZXWDZ128rr */ |
| 96451 | 51741, |
| 96452 | /* VPMOVZXWDZ128rrk */ |
| 96453 | 51743, |
| 96454 | /* VPMOVZXWDZ128rrkz */ |
| 96455 | 51747, |
| 96456 | /* VPMOVZXWDZ256rm */ |
| 96457 | 51750, |
| 96458 | /* VPMOVZXWDZ256rmk */ |
| 96459 | 51752, |
| 96460 | /* VPMOVZXWDZ256rmkz */ |
| 96461 | 51756, |
| 96462 | /* VPMOVZXWDZ256rr */ |
| 96463 | 51759, |
| 96464 | /* VPMOVZXWDZ256rrk */ |
| 96465 | 51761, |
| 96466 | /* VPMOVZXWDZ256rrkz */ |
| 96467 | 51765, |
| 96468 | /* VPMOVZXWDZrm */ |
| 96469 | 51768, |
| 96470 | /* VPMOVZXWDZrmk */ |
| 96471 | 51770, |
| 96472 | /* VPMOVZXWDZrmkz */ |
| 96473 | 51774, |
| 96474 | /* VPMOVZXWDZrr */ |
| 96475 | 51777, |
| 96476 | /* VPMOVZXWDZrrk */ |
| 96477 | 51779, |
| 96478 | /* VPMOVZXWDZrrkz */ |
| 96479 | 51783, |
| 96480 | /* VPMOVZXWDrm */ |
| 96481 | 51786, |
| 96482 | /* VPMOVZXWDrr */ |
| 96483 | 51788, |
| 96484 | /* VPMOVZXWQYrm */ |
| 96485 | 51790, |
| 96486 | /* VPMOVZXWQYrr */ |
| 96487 | 51792, |
| 96488 | /* VPMOVZXWQZ128rm */ |
| 96489 | 51794, |
| 96490 | /* VPMOVZXWQZ128rmk */ |
| 96491 | 51796, |
| 96492 | /* VPMOVZXWQZ128rmkz */ |
| 96493 | 51800, |
| 96494 | /* VPMOVZXWQZ128rr */ |
| 96495 | 51803, |
| 96496 | /* VPMOVZXWQZ128rrk */ |
| 96497 | 51805, |
| 96498 | /* VPMOVZXWQZ128rrkz */ |
| 96499 | 51809, |
| 96500 | /* VPMOVZXWQZ256rm */ |
| 96501 | 51812, |
| 96502 | /* VPMOVZXWQZ256rmk */ |
| 96503 | 51814, |
| 96504 | /* VPMOVZXWQZ256rmkz */ |
| 96505 | 51818, |
| 96506 | /* VPMOVZXWQZ256rr */ |
| 96507 | 51821, |
| 96508 | /* VPMOVZXWQZ256rrk */ |
| 96509 | 51823, |
| 96510 | /* VPMOVZXWQZ256rrkz */ |
| 96511 | 51827, |
| 96512 | /* VPMOVZXWQZrm */ |
| 96513 | 51830, |
| 96514 | /* VPMOVZXWQZrmk */ |
| 96515 | 51832, |
| 96516 | /* VPMOVZXWQZrmkz */ |
| 96517 | 51836, |
| 96518 | /* VPMOVZXWQZrr */ |
| 96519 | 51839, |
| 96520 | /* VPMOVZXWQZrrk */ |
| 96521 | 51841, |
| 96522 | /* VPMOVZXWQZrrkz */ |
| 96523 | 51845, |
| 96524 | /* VPMOVZXWQrm */ |
| 96525 | 51848, |
| 96526 | /* VPMOVZXWQrr */ |
| 96527 | 51850, |
| 96528 | /* VPMULDQYrm */ |
| 96529 | 51852, |
| 96530 | /* VPMULDQYrr */ |
| 96531 | 51855, |
| 96532 | /* VPMULDQZ128rm */ |
| 96533 | 51858, |
| 96534 | /* VPMULDQZ128rmb */ |
| 96535 | 51861, |
| 96536 | /* VPMULDQZ128rmbk */ |
| 96537 | 51864, |
| 96538 | /* VPMULDQZ128rmbkz */ |
| 96539 | 51869, |
| 96540 | /* VPMULDQZ128rmk */ |
| 96541 | 51873, |
| 96542 | /* VPMULDQZ128rmkz */ |
| 96543 | 51878, |
| 96544 | /* VPMULDQZ128rr */ |
| 96545 | 51882, |
| 96546 | /* VPMULDQZ128rrk */ |
| 96547 | 51885, |
| 96548 | /* VPMULDQZ128rrkz */ |
| 96549 | 51890, |
| 96550 | /* VPMULDQZ256rm */ |
| 96551 | 51894, |
| 96552 | /* VPMULDQZ256rmb */ |
| 96553 | 51897, |
| 96554 | /* VPMULDQZ256rmbk */ |
| 96555 | 51900, |
| 96556 | /* VPMULDQZ256rmbkz */ |
| 96557 | 51905, |
| 96558 | /* VPMULDQZ256rmk */ |
| 96559 | 51909, |
| 96560 | /* VPMULDQZ256rmkz */ |
| 96561 | 51914, |
| 96562 | /* VPMULDQZ256rr */ |
| 96563 | 51918, |
| 96564 | /* VPMULDQZ256rrk */ |
| 96565 | 51921, |
| 96566 | /* VPMULDQZ256rrkz */ |
| 96567 | 51926, |
| 96568 | /* VPMULDQZrm */ |
| 96569 | 51930, |
| 96570 | /* VPMULDQZrmb */ |
| 96571 | 51933, |
| 96572 | /* VPMULDQZrmbk */ |
| 96573 | 51936, |
| 96574 | /* VPMULDQZrmbkz */ |
| 96575 | 51941, |
| 96576 | /* VPMULDQZrmk */ |
| 96577 | 51945, |
| 96578 | /* VPMULDQZrmkz */ |
| 96579 | 51950, |
| 96580 | /* VPMULDQZrr */ |
| 96581 | 51954, |
| 96582 | /* VPMULDQZrrk */ |
| 96583 | 51957, |
| 96584 | /* VPMULDQZrrkz */ |
| 96585 | 51962, |
| 96586 | /* VPMULDQrm */ |
| 96587 | 51966, |
| 96588 | /* VPMULDQrr */ |
| 96589 | 51969, |
| 96590 | /* VPMULHRSWYrm */ |
| 96591 | 51972, |
| 96592 | /* VPMULHRSWYrr */ |
| 96593 | 51975, |
| 96594 | /* VPMULHRSWZ128rm */ |
| 96595 | 51978, |
| 96596 | /* VPMULHRSWZ128rmk */ |
| 96597 | 51981, |
| 96598 | /* VPMULHRSWZ128rmkz */ |
| 96599 | 51986, |
| 96600 | /* VPMULHRSWZ128rr */ |
| 96601 | 51990, |
| 96602 | /* VPMULHRSWZ128rrk */ |
| 96603 | 51993, |
| 96604 | /* VPMULHRSWZ128rrkz */ |
| 96605 | 51998, |
| 96606 | /* VPMULHRSWZ256rm */ |
| 96607 | 52002, |
| 96608 | /* VPMULHRSWZ256rmk */ |
| 96609 | 52005, |
| 96610 | /* VPMULHRSWZ256rmkz */ |
| 96611 | 52010, |
| 96612 | /* VPMULHRSWZ256rr */ |
| 96613 | 52014, |
| 96614 | /* VPMULHRSWZ256rrk */ |
| 96615 | 52017, |
| 96616 | /* VPMULHRSWZ256rrkz */ |
| 96617 | 52022, |
| 96618 | /* VPMULHRSWZrm */ |
| 96619 | 52026, |
| 96620 | /* VPMULHRSWZrmk */ |
| 96621 | 52029, |
| 96622 | /* VPMULHRSWZrmkz */ |
| 96623 | 52034, |
| 96624 | /* VPMULHRSWZrr */ |
| 96625 | 52038, |
| 96626 | /* VPMULHRSWZrrk */ |
| 96627 | 52041, |
| 96628 | /* VPMULHRSWZrrkz */ |
| 96629 | 52046, |
| 96630 | /* VPMULHRSWrm */ |
| 96631 | 52050, |
| 96632 | /* VPMULHRSWrr */ |
| 96633 | 52053, |
| 96634 | /* VPMULHUWYrm */ |
| 96635 | 52056, |
| 96636 | /* VPMULHUWYrr */ |
| 96637 | 52059, |
| 96638 | /* VPMULHUWZ128rm */ |
| 96639 | 52062, |
| 96640 | /* VPMULHUWZ128rmk */ |
| 96641 | 52065, |
| 96642 | /* VPMULHUWZ128rmkz */ |
| 96643 | 52070, |
| 96644 | /* VPMULHUWZ128rr */ |
| 96645 | 52074, |
| 96646 | /* VPMULHUWZ128rrk */ |
| 96647 | 52077, |
| 96648 | /* VPMULHUWZ128rrkz */ |
| 96649 | 52082, |
| 96650 | /* VPMULHUWZ256rm */ |
| 96651 | 52086, |
| 96652 | /* VPMULHUWZ256rmk */ |
| 96653 | 52089, |
| 96654 | /* VPMULHUWZ256rmkz */ |
| 96655 | 52094, |
| 96656 | /* VPMULHUWZ256rr */ |
| 96657 | 52098, |
| 96658 | /* VPMULHUWZ256rrk */ |
| 96659 | 52101, |
| 96660 | /* VPMULHUWZ256rrkz */ |
| 96661 | 52106, |
| 96662 | /* VPMULHUWZrm */ |
| 96663 | 52110, |
| 96664 | /* VPMULHUWZrmk */ |
| 96665 | 52113, |
| 96666 | /* VPMULHUWZrmkz */ |
| 96667 | 52118, |
| 96668 | /* VPMULHUWZrr */ |
| 96669 | 52122, |
| 96670 | /* VPMULHUWZrrk */ |
| 96671 | 52125, |
| 96672 | /* VPMULHUWZrrkz */ |
| 96673 | 52130, |
| 96674 | /* VPMULHUWrm */ |
| 96675 | 52134, |
| 96676 | /* VPMULHUWrr */ |
| 96677 | 52137, |
| 96678 | /* VPMULHWYrm */ |
| 96679 | 52140, |
| 96680 | /* VPMULHWYrr */ |
| 96681 | 52143, |
| 96682 | /* VPMULHWZ128rm */ |
| 96683 | 52146, |
| 96684 | /* VPMULHWZ128rmk */ |
| 96685 | 52149, |
| 96686 | /* VPMULHWZ128rmkz */ |
| 96687 | 52154, |
| 96688 | /* VPMULHWZ128rr */ |
| 96689 | 52158, |
| 96690 | /* VPMULHWZ128rrk */ |
| 96691 | 52161, |
| 96692 | /* VPMULHWZ128rrkz */ |
| 96693 | 52166, |
| 96694 | /* VPMULHWZ256rm */ |
| 96695 | 52170, |
| 96696 | /* VPMULHWZ256rmk */ |
| 96697 | 52173, |
| 96698 | /* VPMULHWZ256rmkz */ |
| 96699 | 52178, |
| 96700 | /* VPMULHWZ256rr */ |
| 96701 | 52182, |
| 96702 | /* VPMULHWZ256rrk */ |
| 96703 | 52185, |
| 96704 | /* VPMULHWZ256rrkz */ |
| 96705 | 52190, |
| 96706 | /* VPMULHWZrm */ |
| 96707 | 52194, |
| 96708 | /* VPMULHWZrmk */ |
| 96709 | 52197, |
| 96710 | /* VPMULHWZrmkz */ |
| 96711 | 52202, |
| 96712 | /* VPMULHWZrr */ |
| 96713 | 52206, |
| 96714 | /* VPMULHWZrrk */ |
| 96715 | 52209, |
| 96716 | /* VPMULHWZrrkz */ |
| 96717 | 52214, |
| 96718 | /* VPMULHWrm */ |
| 96719 | 52218, |
| 96720 | /* VPMULHWrr */ |
| 96721 | 52221, |
| 96722 | /* VPMULLDYrm */ |
| 96723 | 52224, |
| 96724 | /* VPMULLDYrr */ |
| 96725 | 52227, |
| 96726 | /* VPMULLDZ128rm */ |
| 96727 | 52230, |
| 96728 | /* VPMULLDZ128rmb */ |
| 96729 | 52233, |
| 96730 | /* VPMULLDZ128rmbk */ |
| 96731 | 52236, |
| 96732 | /* VPMULLDZ128rmbkz */ |
| 96733 | 52241, |
| 96734 | /* VPMULLDZ128rmk */ |
| 96735 | 52245, |
| 96736 | /* VPMULLDZ128rmkz */ |
| 96737 | 52250, |
| 96738 | /* VPMULLDZ128rr */ |
| 96739 | 52254, |
| 96740 | /* VPMULLDZ128rrk */ |
| 96741 | 52257, |
| 96742 | /* VPMULLDZ128rrkz */ |
| 96743 | 52262, |
| 96744 | /* VPMULLDZ256rm */ |
| 96745 | 52266, |
| 96746 | /* VPMULLDZ256rmb */ |
| 96747 | 52269, |
| 96748 | /* VPMULLDZ256rmbk */ |
| 96749 | 52272, |
| 96750 | /* VPMULLDZ256rmbkz */ |
| 96751 | 52277, |
| 96752 | /* VPMULLDZ256rmk */ |
| 96753 | 52281, |
| 96754 | /* VPMULLDZ256rmkz */ |
| 96755 | 52286, |
| 96756 | /* VPMULLDZ256rr */ |
| 96757 | 52290, |
| 96758 | /* VPMULLDZ256rrk */ |
| 96759 | 52293, |
| 96760 | /* VPMULLDZ256rrkz */ |
| 96761 | 52298, |
| 96762 | /* VPMULLDZrm */ |
| 96763 | 52302, |
| 96764 | /* VPMULLDZrmb */ |
| 96765 | 52305, |
| 96766 | /* VPMULLDZrmbk */ |
| 96767 | 52308, |
| 96768 | /* VPMULLDZrmbkz */ |
| 96769 | 52313, |
| 96770 | /* VPMULLDZrmk */ |
| 96771 | 52317, |
| 96772 | /* VPMULLDZrmkz */ |
| 96773 | 52322, |
| 96774 | /* VPMULLDZrr */ |
| 96775 | 52326, |
| 96776 | /* VPMULLDZrrk */ |
| 96777 | 52329, |
| 96778 | /* VPMULLDZrrkz */ |
| 96779 | 52334, |
| 96780 | /* VPMULLDrm */ |
| 96781 | 52338, |
| 96782 | /* VPMULLDrr */ |
| 96783 | 52341, |
| 96784 | /* VPMULLQZ128rm */ |
| 96785 | 52344, |
| 96786 | /* VPMULLQZ128rmb */ |
| 96787 | 52347, |
| 96788 | /* VPMULLQZ128rmbk */ |
| 96789 | 52350, |
| 96790 | /* VPMULLQZ128rmbkz */ |
| 96791 | 52355, |
| 96792 | /* VPMULLQZ128rmk */ |
| 96793 | 52359, |
| 96794 | /* VPMULLQZ128rmkz */ |
| 96795 | 52364, |
| 96796 | /* VPMULLQZ128rr */ |
| 96797 | 52368, |
| 96798 | /* VPMULLQZ128rrk */ |
| 96799 | 52371, |
| 96800 | /* VPMULLQZ128rrkz */ |
| 96801 | 52376, |
| 96802 | /* VPMULLQZ256rm */ |
| 96803 | 52380, |
| 96804 | /* VPMULLQZ256rmb */ |
| 96805 | 52383, |
| 96806 | /* VPMULLQZ256rmbk */ |
| 96807 | 52386, |
| 96808 | /* VPMULLQZ256rmbkz */ |
| 96809 | 52391, |
| 96810 | /* VPMULLQZ256rmk */ |
| 96811 | 52395, |
| 96812 | /* VPMULLQZ256rmkz */ |
| 96813 | 52400, |
| 96814 | /* VPMULLQZ256rr */ |
| 96815 | 52404, |
| 96816 | /* VPMULLQZ256rrk */ |
| 96817 | 52407, |
| 96818 | /* VPMULLQZ256rrkz */ |
| 96819 | 52412, |
| 96820 | /* VPMULLQZrm */ |
| 96821 | 52416, |
| 96822 | /* VPMULLQZrmb */ |
| 96823 | 52419, |
| 96824 | /* VPMULLQZrmbk */ |
| 96825 | 52422, |
| 96826 | /* VPMULLQZrmbkz */ |
| 96827 | 52427, |
| 96828 | /* VPMULLQZrmk */ |
| 96829 | 52431, |
| 96830 | /* VPMULLQZrmkz */ |
| 96831 | 52436, |
| 96832 | /* VPMULLQZrr */ |
| 96833 | 52440, |
| 96834 | /* VPMULLQZrrk */ |
| 96835 | 52443, |
| 96836 | /* VPMULLQZrrkz */ |
| 96837 | 52448, |
| 96838 | /* VPMULLWYrm */ |
| 96839 | 52452, |
| 96840 | /* VPMULLWYrr */ |
| 96841 | 52455, |
| 96842 | /* VPMULLWZ128rm */ |
| 96843 | 52458, |
| 96844 | /* VPMULLWZ128rmk */ |
| 96845 | 52461, |
| 96846 | /* VPMULLWZ128rmkz */ |
| 96847 | 52466, |
| 96848 | /* VPMULLWZ128rr */ |
| 96849 | 52470, |
| 96850 | /* VPMULLWZ128rrk */ |
| 96851 | 52473, |
| 96852 | /* VPMULLWZ128rrkz */ |
| 96853 | 52478, |
| 96854 | /* VPMULLWZ256rm */ |
| 96855 | 52482, |
| 96856 | /* VPMULLWZ256rmk */ |
| 96857 | 52485, |
| 96858 | /* VPMULLWZ256rmkz */ |
| 96859 | 52490, |
| 96860 | /* VPMULLWZ256rr */ |
| 96861 | 52494, |
| 96862 | /* VPMULLWZ256rrk */ |
| 96863 | 52497, |
| 96864 | /* VPMULLWZ256rrkz */ |
| 96865 | 52502, |
| 96866 | /* VPMULLWZrm */ |
| 96867 | 52506, |
| 96868 | /* VPMULLWZrmk */ |
| 96869 | 52509, |
| 96870 | /* VPMULLWZrmkz */ |
| 96871 | 52514, |
| 96872 | /* VPMULLWZrr */ |
| 96873 | 52518, |
| 96874 | /* VPMULLWZrrk */ |
| 96875 | 52521, |
| 96876 | /* VPMULLWZrrkz */ |
| 96877 | 52526, |
| 96878 | /* VPMULLWrm */ |
| 96879 | 52530, |
| 96880 | /* VPMULLWrr */ |
| 96881 | 52533, |
| 96882 | /* VPMULTISHIFTQBZ128rm */ |
| 96883 | 52536, |
| 96884 | /* VPMULTISHIFTQBZ128rmb */ |
| 96885 | 52539, |
| 96886 | /* VPMULTISHIFTQBZ128rmbk */ |
| 96887 | 52542, |
| 96888 | /* VPMULTISHIFTQBZ128rmbkz */ |
| 96889 | 52547, |
| 96890 | /* VPMULTISHIFTQBZ128rmk */ |
| 96891 | 52551, |
| 96892 | /* VPMULTISHIFTQBZ128rmkz */ |
| 96893 | 52556, |
| 96894 | /* VPMULTISHIFTQBZ128rr */ |
| 96895 | 52560, |
| 96896 | /* VPMULTISHIFTQBZ128rrk */ |
| 96897 | 52563, |
| 96898 | /* VPMULTISHIFTQBZ128rrkz */ |
| 96899 | 52568, |
| 96900 | /* VPMULTISHIFTQBZ256rm */ |
| 96901 | 52572, |
| 96902 | /* VPMULTISHIFTQBZ256rmb */ |
| 96903 | 52575, |
| 96904 | /* VPMULTISHIFTQBZ256rmbk */ |
| 96905 | 52578, |
| 96906 | /* VPMULTISHIFTQBZ256rmbkz */ |
| 96907 | 52583, |
| 96908 | /* VPMULTISHIFTQBZ256rmk */ |
| 96909 | 52587, |
| 96910 | /* VPMULTISHIFTQBZ256rmkz */ |
| 96911 | 52592, |
| 96912 | /* VPMULTISHIFTQBZ256rr */ |
| 96913 | 52596, |
| 96914 | /* VPMULTISHIFTQBZ256rrk */ |
| 96915 | 52599, |
| 96916 | /* VPMULTISHIFTQBZ256rrkz */ |
| 96917 | 52604, |
| 96918 | /* VPMULTISHIFTQBZrm */ |
| 96919 | 52608, |
| 96920 | /* VPMULTISHIFTQBZrmb */ |
| 96921 | 52611, |
| 96922 | /* VPMULTISHIFTQBZrmbk */ |
| 96923 | 52614, |
| 96924 | /* VPMULTISHIFTQBZrmbkz */ |
| 96925 | 52619, |
| 96926 | /* VPMULTISHIFTQBZrmk */ |
| 96927 | 52623, |
| 96928 | /* VPMULTISHIFTQBZrmkz */ |
| 96929 | 52628, |
| 96930 | /* VPMULTISHIFTQBZrr */ |
| 96931 | 52632, |
| 96932 | /* VPMULTISHIFTQBZrrk */ |
| 96933 | 52635, |
| 96934 | /* VPMULTISHIFTQBZrrkz */ |
| 96935 | 52640, |
| 96936 | /* VPMULUDQYrm */ |
| 96937 | 52644, |
| 96938 | /* VPMULUDQYrr */ |
| 96939 | 52647, |
| 96940 | /* VPMULUDQZ128rm */ |
| 96941 | 52650, |
| 96942 | /* VPMULUDQZ128rmb */ |
| 96943 | 52653, |
| 96944 | /* VPMULUDQZ128rmbk */ |
| 96945 | 52656, |
| 96946 | /* VPMULUDQZ128rmbkz */ |
| 96947 | 52661, |
| 96948 | /* VPMULUDQZ128rmk */ |
| 96949 | 52665, |
| 96950 | /* VPMULUDQZ128rmkz */ |
| 96951 | 52670, |
| 96952 | /* VPMULUDQZ128rr */ |
| 96953 | 52674, |
| 96954 | /* VPMULUDQZ128rrk */ |
| 96955 | 52677, |
| 96956 | /* VPMULUDQZ128rrkz */ |
| 96957 | 52682, |
| 96958 | /* VPMULUDQZ256rm */ |
| 96959 | 52686, |
| 96960 | /* VPMULUDQZ256rmb */ |
| 96961 | 52689, |
| 96962 | /* VPMULUDQZ256rmbk */ |
| 96963 | 52692, |
| 96964 | /* VPMULUDQZ256rmbkz */ |
| 96965 | 52697, |
| 96966 | /* VPMULUDQZ256rmk */ |
| 96967 | 52701, |
| 96968 | /* VPMULUDQZ256rmkz */ |
| 96969 | 52706, |
| 96970 | /* VPMULUDQZ256rr */ |
| 96971 | 52710, |
| 96972 | /* VPMULUDQZ256rrk */ |
| 96973 | 52713, |
| 96974 | /* VPMULUDQZ256rrkz */ |
| 96975 | 52718, |
| 96976 | /* VPMULUDQZrm */ |
| 96977 | 52722, |
| 96978 | /* VPMULUDQZrmb */ |
| 96979 | 52725, |
| 96980 | /* VPMULUDQZrmbk */ |
| 96981 | 52728, |
| 96982 | /* VPMULUDQZrmbkz */ |
| 96983 | 52733, |
| 96984 | /* VPMULUDQZrmk */ |
| 96985 | 52737, |
| 96986 | /* VPMULUDQZrmkz */ |
| 96987 | 52742, |
| 96988 | /* VPMULUDQZrr */ |
| 96989 | 52746, |
| 96990 | /* VPMULUDQZrrk */ |
| 96991 | 52749, |
| 96992 | /* VPMULUDQZrrkz */ |
| 96993 | 52754, |
| 96994 | /* VPMULUDQrm */ |
| 96995 | 52758, |
| 96996 | /* VPMULUDQrr */ |
| 96997 | 52761, |
| 96998 | /* VPOPCNTBZ128rm */ |
| 96999 | 52764, |
| 97000 | /* VPOPCNTBZ128rmk */ |
| 97001 | 52766, |
| 97002 | /* VPOPCNTBZ128rmkz */ |
| 97003 | 52770, |
| 97004 | /* VPOPCNTBZ128rr */ |
| 97005 | 52773, |
| 97006 | /* VPOPCNTBZ128rrk */ |
| 97007 | 52775, |
| 97008 | /* VPOPCNTBZ128rrkz */ |
| 97009 | 52779, |
| 97010 | /* VPOPCNTBZ256rm */ |
| 97011 | 52782, |
| 97012 | /* VPOPCNTBZ256rmk */ |
| 97013 | 52784, |
| 97014 | /* VPOPCNTBZ256rmkz */ |
| 97015 | 52788, |
| 97016 | /* VPOPCNTBZ256rr */ |
| 97017 | 52791, |
| 97018 | /* VPOPCNTBZ256rrk */ |
| 97019 | 52793, |
| 97020 | /* VPOPCNTBZ256rrkz */ |
| 97021 | 52797, |
| 97022 | /* VPOPCNTBZrm */ |
| 97023 | 52800, |
| 97024 | /* VPOPCNTBZrmk */ |
| 97025 | 52802, |
| 97026 | /* VPOPCNTBZrmkz */ |
| 97027 | 52806, |
| 97028 | /* VPOPCNTBZrr */ |
| 97029 | 52809, |
| 97030 | /* VPOPCNTBZrrk */ |
| 97031 | 52811, |
| 97032 | /* VPOPCNTBZrrkz */ |
| 97033 | 52815, |
| 97034 | /* VPOPCNTDZ128rm */ |
| 97035 | 52818, |
| 97036 | /* VPOPCNTDZ128rmb */ |
| 97037 | 52820, |
| 97038 | /* VPOPCNTDZ128rmbk */ |
| 97039 | 52822, |
| 97040 | /* VPOPCNTDZ128rmbkz */ |
| 97041 | 52826, |
| 97042 | /* VPOPCNTDZ128rmk */ |
| 97043 | 52829, |
| 97044 | /* VPOPCNTDZ128rmkz */ |
| 97045 | 52833, |
| 97046 | /* VPOPCNTDZ128rr */ |
| 97047 | 52836, |
| 97048 | /* VPOPCNTDZ128rrk */ |
| 97049 | 52838, |
| 97050 | /* VPOPCNTDZ128rrkz */ |
| 97051 | 52842, |
| 97052 | /* VPOPCNTDZ256rm */ |
| 97053 | 52845, |
| 97054 | /* VPOPCNTDZ256rmb */ |
| 97055 | 52847, |
| 97056 | /* VPOPCNTDZ256rmbk */ |
| 97057 | 52849, |
| 97058 | /* VPOPCNTDZ256rmbkz */ |
| 97059 | 52853, |
| 97060 | /* VPOPCNTDZ256rmk */ |
| 97061 | 52856, |
| 97062 | /* VPOPCNTDZ256rmkz */ |
| 97063 | 52860, |
| 97064 | /* VPOPCNTDZ256rr */ |
| 97065 | 52863, |
| 97066 | /* VPOPCNTDZ256rrk */ |
| 97067 | 52865, |
| 97068 | /* VPOPCNTDZ256rrkz */ |
| 97069 | 52869, |
| 97070 | /* VPOPCNTDZrm */ |
| 97071 | 52872, |
| 97072 | /* VPOPCNTDZrmb */ |
| 97073 | 52874, |
| 97074 | /* VPOPCNTDZrmbk */ |
| 97075 | 52876, |
| 97076 | /* VPOPCNTDZrmbkz */ |
| 97077 | 52880, |
| 97078 | /* VPOPCNTDZrmk */ |
| 97079 | 52883, |
| 97080 | /* VPOPCNTDZrmkz */ |
| 97081 | 52887, |
| 97082 | /* VPOPCNTDZrr */ |
| 97083 | 52890, |
| 97084 | /* VPOPCNTDZrrk */ |
| 97085 | 52892, |
| 97086 | /* VPOPCNTDZrrkz */ |
| 97087 | 52896, |
| 97088 | /* VPOPCNTQZ128rm */ |
| 97089 | 52899, |
| 97090 | /* VPOPCNTQZ128rmb */ |
| 97091 | 52901, |
| 97092 | /* VPOPCNTQZ128rmbk */ |
| 97093 | 52903, |
| 97094 | /* VPOPCNTQZ128rmbkz */ |
| 97095 | 52907, |
| 97096 | /* VPOPCNTQZ128rmk */ |
| 97097 | 52910, |
| 97098 | /* VPOPCNTQZ128rmkz */ |
| 97099 | 52914, |
| 97100 | /* VPOPCNTQZ128rr */ |
| 97101 | 52917, |
| 97102 | /* VPOPCNTQZ128rrk */ |
| 97103 | 52919, |
| 97104 | /* VPOPCNTQZ128rrkz */ |
| 97105 | 52923, |
| 97106 | /* VPOPCNTQZ256rm */ |
| 97107 | 52926, |
| 97108 | /* VPOPCNTQZ256rmb */ |
| 97109 | 52928, |
| 97110 | /* VPOPCNTQZ256rmbk */ |
| 97111 | 52930, |
| 97112 | /* VPOPCNTQZ256rmbkz */ |
| 97113 | 52934, |
| 97114 | /* VPOPCNTQZ256rmk */ |
| 97115 | 52937, |
| 97116 | /* VPOPCNTQZ256rmkz */ |
| 97117 | 52941, |
| 97118 | /* VPOPCNTQZ256rr */ |
| 97119 | 52944, |
| 97120 | /* VPOPCNTQZ256rrk */ |
| 97121 | 52946, |
| 97122 | /* VPOPCNTQZ256rrkz */ |
| 97123 | 52950, |
| 97124 | /* VPOPCNTQZrm */ |
| 97125 | 52953, |
| 97126 | /* VPOPCNTQZrmb */ |
| 97127 | 52955, |
| 97128 | /* VPOPCNTQZrmbk */ |
| 97129 | 52957, |
| 97130 | /* VPOPCNTQZrmbkz */ |
| 97131 | 52961, |
| 97132 | /* VPOPCNTQZrmk */ |
| 97133 | 52964, |
| 97134 | /* VPOPCNTQZrmkz */ |
| 97135 | 52968, |
| 97136 | /* VPOPCNTQZrr */ |
| 97137 | 52971, |
| 97138 | /* VPOPCNTQZrrk */ |
| 97139 | 52973, |
| 97140 | /* VPOPCNTQZrrkz */ |
| 97141 | 52977, |
| 97142 | /* VPOPCNTWZ128rm */ |
| 97143 | 52980, |
| 97144 | /* VPOPCNTWZ128rmk */ |
| 97145 | 52982, |
| 97146 | /* VPOPCNTWZ128rmkz */ |
| 97147 | 52986, |
| 97148 | /* VPOPCNTWZ128rr */ |
| 97149 | 52989, |
| 97150 | /* VPOPCNTWZ128rrk */ |
| 97151 | 52991, |
| 97152 | /* VPOPCNTWZ128rrkz */ |
| 97153 | 52995, |
| 97154 | /* VPOPCNTWZ256rm */ |
| 97155 | 52998, |
| 97156 | /* VPOPCNTWZ256rmk */ |
| 97157 | 53000, |
| 97158 | /* VPOPCNTWZ256rmkz */ |
| 97159 | 53004, |
| 97160 | /* VPOPCNTWZ256rr */ |
| 97161 | 53007, |
| 97162 | /* VPOPCNTWZ256rrk */ |
| 97163 | 53009, |
| 97164 | /* VPOPCNTWZ256rrkz */ |
| 97165 | 53013, |
| 97166 | /* VPOPCNTWZrm */ |
| 97167 | 53016, |
| 97168 | /* VPOPCNTWZrmk */ |
| 97169 | 53018, |
| 97170 | /* VPOPCNTWZrmkz */ |
| 97171 | 53022, |
| 97172 | /* VPOPCNTWZrr */ |
| 97173 | 53025, |
| 97174 | /* VPOPCNTWZrrk */ |
| 97175 | 53027, |
| 97176 | /* VPOPCNTWZrrkz */ |
| 97177 | 53031, |
| 97178 | /* VPORDZ128rm */ |
| 97179 | 53034, |
| 97180 | /* VPORDZ128rmb */ |
| 97181 | 53037, |
| 97182 | /* VPORDZ128rmbk */ |
| 97183 | 53040, |
| 97184 | /* VPORDZ128rmbkz */ |
| 97185 | 53045, |
| 97186 | /* VPORDZ128rmk */ |
| 97187 | 53049, |
| 97188 | /* VPORDZ128rmkz */ |
| 97189 | 53054, |
| 97190 | /* VPORDZ128rr */ |
| 97191 | 53058, |
| 97192 | /* VPORDZ128rrk */ |
| 97193 | 53061, |
| 97194 | /* VPORDZ128rrkz */ |
| 97195 | 53066, |
| 97196 | /* VPORDZ256rm */ |
| 97197 | 53070, |
| 97198 | /* VPORDZ256rmb */ |
| 97199 | 53073, |
| 97200 | /* VPORDZ256rmbk */ |
| 97201 | 53076, |
| 97202 | /* VPORDZ256rmbkz */ |
| 97203 | 53081, |
| 97204 | /* VPORDZ256rmk */ |
| 97205 | 53085, |
| 97206 | /* VPORDZ256rmkz */ |
| 97207 | 53090, |
| 97208 | /* VPORDZ256rr */ |
| 97209 | 53094, |
| 97210 | /* VPORDZ256rrk */ |
| 97211 | 53097, |
| 97212 | /* VPORDZ256rrkz */ |
| 97213 | 53102, |
| 97214 | /* VPORDZrm */ |
| 97215 | 53106, |
| 97216 | /* VPORDZrmb */ |
| 97217 | 53109, |
| 97218 | /* VPORDZrmbk */ |
| 97219 | 53112, |
| 97220 | /* VPORDZrmbkz */ |
| 97221 | 53117, |
| 97222 | /* VPORDZrmk */ |
| 97223 | 53121, |
| 97224 | /* VPORDZrmkz */ |
| 97225 | 53126, |
| 97226 | /* VPORDZrr */ |
| 97227 | 53130, |
| 97228 | /* VPORDZrrk */ |
| 97229 | 53133, |
| 97230 | /* VPORDZrrkz */ |
| 97231 | 53138, |
| 97232 | /* VPORQZ128rm */ |
| 97233 | 53142, |
| 97234 | /* VPORQZ128rmb */ |
| 97235 | 53145, |
| 97236 | /* VPORQZ128rmbk */ |
| 97237 | 53148, |
| 97238 | /* VPORQZ128rmbkz */ |
| 97239 | 53153, |
| 97240 | /* VPORQZ128rmk */ |
| 97241 | 53157, |
| 97242 | /* VPORQZ128rmkz */ |
| 97243 | 53162, |
| 97244 | /* VPORQZ128rr */ |
| 97245 | 53166, |
| 97246 | /* VPORQZ128rrk */ |
| 97247 | 53169, |
| 97248 | /* VPORQZ128rrkz */ |
| 97249 | 53174, |
| 97250 | /* VPORQZ256rm */ |
| 97251 | 53178, |
| 97252 | /* VPORQZ256rmb */ |
| 97253 | 53181, |
| 97254 | /* VPORQZ256rmbk */ |
| 97255 | 53184, |
| 97256 | /* VPORQZ256rmbkz */ |
| 97257 | 53189, |
| 97258 | /* VPORQZ256rmk */ |
| 97259 | 53193, |
| 97260 | /* VPORQZ256rmkz */ |
| 97261 | 53198, |
| 97262 | /* VPORQZ256rr */ |
| 97263 | 53202, |
| 97264 | /* VPORQZ256rrk */ |
| 97265 | 53205, |
| 97266 | /* VPORQZ256rrkz */ |
| 97267 | 53210, |
| 97268 | /* VPORQZrm */ |
| 97269 | 53214, |
| 97270 | /* VPORQZrmb */ |
| 97271 | 53217, |
| 97272 | /* VPORQZrmbk */ |
| 97273 | 53220, |
| 97274 | /* VPORQZrmbkz */ |
| 97275 | 53225, |
| 97276 | /* VPORQZrmk */ |
| 97277 | 53229, |
| 97278 | /* VPORQZrmkz */ |
| 97279 | 53234, |
| 97280 | /* VPORQZrr */ |
| 97281 | 53238, |
| 97282 | /* VPORQZrrk */ |
| 97283 | 53241, |
| 97284 | /* VPORQZrrkz */ |
| 97285 | 53246, |
| 97286 | /* VPORYrm */ |
| 97287 | 53250, |
| 97288 | /* VPORYrr */ |
| 97289 | 53253, |
| 97290 | /* VPORrm */ |
| 97291 | 53256, |
| 97292 | /* VPORrr */ |
| 97293 | 53259, |
| 97294 | /* VPPERMrmr */ |
| 97295 | 53262, |
| 97296 | /* VPPERMrrm */ |
| 97297 | 53266, |
| 97298 | /* VPPERMrrr */ |
| 97299 | 53270, |
| 97300 | /* VPPERMrrr_REV */ |
| 97301 | 53274, |
| 97302 | /* VPROLDZ128mbi */ |
| 97303 | 53278, |
| 97304 | /* VPROLDZ128mbik */ |
| 97305 | 53281, |
| 97306 | /* VPROLDZ128mbikz */ |
| 97307 | 53286, |
| 97308 | /* VPROLDZ128mi */ |
| 97309 | 53290, |
| 97310 | /* VPROLDZ128mik */ |
| 97311 | 53293, |
| 97312 | /* VPROLDZ128mikz */ |
| 97313 | 53298, |
| 97314 | /* VPROLDZ128ri */ |
| 97315 | 53302, |
| 97316 | /* VPROLDZ128rik */ |
| 97317 | 53305, |
| 97318 | /* VPROLDZ128rikz */ |
| 97319 | 53310, |
| 97320 | /* VPROLDZ256mbi */ |
| 97321 | 53314, |
| 97322 | /* VPROLDZ256mbik */ |
| 97323 | 53317, |
| 97324 | /* VPROLDZ256mbikz */ |
| 97325 | 53322, |
| 97326 | /* VPROLDZ256mi */ |
| 97327 | 53326, |
| 97328 | /* VPROLDZ256mik */ |
| 97329 | 53329, |
| 97330 | /* VPROLDZ256mikz */ |
| 97331 | 53334, |
| 97332 | /* VPROLDZ256ri */ |
| 97333 | 53338, |
| 97334 | /* VPROLDZ256rik */ |
| 97335 | 53341, |
| 97336 | /* VPROLDZ256rikz */ |
| 97337 | 53346, |
| 97338 | /* VPROLDZmbi */ |
| 97339 | 53350, |
| 97340 | /* VPROLDZmbik */ |
| 97341 | 53353, |
| 97342 | /* VPROLDZmbikz */ |
| 97343 | 53358, |
| 97344 | /* VPROLDZmi */ |
| 97345 | 53362, |
| 97346 | /* VPROLDZmik */ |
| 97347 | 53365, |
| 97348 | /* VPROLDZmikz */ |
| 97349 | 53370, |
| 97350 | /* VPROLDZri */ |
| 97351 | 53374, |
| 97352 | /* VPROLDZrik */ |
| 97353 | 53377, |
| 97354 | /* VPROLDZrikz */ |
| 97355 | 53382, |
| 97356 | /* VPROLQZ128mbi */ |
| 97357 | 53386, |
| 97358 | /* VPROLQZ128mbik */ |
| 97359 | 53389, |
| 97360 | /* VPROLQZ128mbikz */ |
| 97361 | 53394, |
| 97362 | /* VPROLQZ128mi */ |
| 97363 | 53398, |
| 97364 | /* VPROLQZ128mik */ |
| 97365 | 53401, |
| 97366 | /* VPROLQZ128mikz */ |
| 97367 | 53406, |
| 97368 | /* VPROLQZ128ri */ |
| 97369 | 53410, |
| 97370 | /* VPROLQZ128rik */ |
| 97371 | 53413, |
| 97372 | /* VPROLQZ128rikz */ |
| 97373 | 53418, |
| 97374 | /* VPROLQZ256mbi */ |
| 97375 | 53422, |
| 97376 | /* VPROLQZ256mbik */ |
| 97377 | 53425, |
| 97378 | /* VPROLQZ256mbikz */ |
| 97379 | 53430, |
| 97380 | /* VPROLQZ256mi */ |
| 97381 | 53434, |
| 97382 | /* VPROLQZ256mik */ |
| 97383 | 53437, |
| 97384 | /* VPROLQZ256mikz */ |
| 97385 | 53442, |
| 97386 | /* VPROLQZ256ri */ |
| 97387 | 53446, |
| 97388 | /* VPROLQZ256rik */ |
| 97389 | 53449, |
| 97390 | /* VPROLQZ256rikz */ |
| 97391 | 53454, |
| 97392 | /* VPROLQZmbi */ |
| 97393 | 53458, |
| 97394 | /* VPROLQZmbik */ |
| 97395 | 53461, |
| 97396 | /* VPROLQZmbikz */ |
| 97397 | 53466, |
| 97398 | /* VPROLQZmi */ |
| 97399 | 53470, |
| 97400 | /* VPROLQZmik */ |
| 97401 | 53473, |
| 97402 | /* VPROLQZmikz */ |
| 97403 | 53478, |
| 97404 | /* VPROLQZri */ |
| 97405 | 53482, |
| 97406 | /* VPROLQZrik */ |
| 97407 | 53485, |
| 97408 | /* VPROLQZrikz */ |
| 97409 | 53490, |
| 97410 | /* VPROLVDZ128rm */ |
| 97411 | 53494, |
| 97412 | /* VPROLVDZ128rmb */ |
| 97413 | 53497, |
| 97414 | /* VPROLVDZ128rmbk */ |
| 97415 | 53500, |
| 97416 | /* VPROLVDZ128rmbkz */ |
| 97417 | 53505, |
| 97418 | /* VPROLVDZ128rmk */ |
| 97419 | 53509, |
| 97420 | /* VPROLVDZ128rmkz */ |
| 97421 | 53514, |
| 97422 | /* VPROLVDZ128rr */ |
| 97423 | 53518, |
| 97424 | /* VPROLVDZ128rrk */ |
| 97425 | 53521, |
| 97426 | /* VPROLVDZ128rrkz */ |
| 97427 | 53526, |
| 97428 | /* VPROLVDZ256rm */ |
| 97429 | 53530, |
| 97430 | /* VPROLVDZ256rmb */ |
| 97431 | 53533, |
| 97432 | /* VPROLVDZ256rmbk */ |
| 97433 | 53536, |
| 97434 | /* VPROLVDZ256rmbkz */ |
| 97435 | 53541, |
| 97436 | /* VPROLVDZ256rmk */ |
| 97437 | 53545, |
| 97438 | /* VPROLVDZ256rmkz */ |
| 97439 | 53550, |
| 97440 | /* VPROLVDZ256rr */ |
| 97441 | 53554, |
| 97442 | /* VPROLVDZ256rrk */ |
| 97443 | 53557, |
| 97444 | /* VPROLVDZ256rrkz */ |
| 97445 | 53562, |
| 97446 | /* VPROLVDZrm */ |
| 97447 | 53566, |
| 97448 | /* VPROLVDZrmb */ |
| 97449 | 53569, |
| 97450 | /* VPROLVDZrmbk */ |
| 97451 | 53572, |
| 97452 | /* VPROLVDZrmbkz */ |
| 97453 | 53577, |
| 97454 | /* VPROLVDZrmk */ |
| 97455 | 53581, |
| 97456 | /* VPROLVDZrmkz */ |
| 97457 | 53586, |
| 97458 | /* VPROLVDZrr */ |
| 97459 | 53590, |
| 97460 | /* VPROLVDZrrk */ |
| 97461 | 53593, |
| 97462 | /* VPROLVDZrrkz */ |
| 97463 | 53598, |
| 97464 | /* VPROLVQZ128rm */ |
| 97465 | 53602, |
| 97466 | /* VPROLVQZ128rmb */ |
| 97467 | 53605, |
| 97468 | /* VPROLVQZ128rmbk */ |
| 97469 | 53608, |
| 97470 | /* VPROLVQZ128rmbkz */ |
| 97471 | 53613, |
| 97472 | /* VPROLVQZ128rmk */ |
| 97473 | 53617, |
| 97474 | /* VPROLVQZ128rmkz */ |
| 97475 | 53622, |
| 97476 | /* VPROLVQZ128rr */ |
| 97477 | 53626, |
| 97478 | /* VPROLVQZ128rrk */ |
| 97479 | 53629, |
| 97480 | /* VPROLVQZ128rrkz */ |
| 97481 | 53634, |
| 97482 | /* VPROLVQZ256rm */ |
| 97483 | 53638, |
| 97484 | /* VPROLVQZ256rmb */ |
| 97485 | 53641, |
| 97486 | /* VPROLVQZ256rmbk */ |
| 97487 | 53644, |
| 97488 | /* VPROLVQZ256rmbkz */ |
| 97489 | 53649, |
| 97490 | /* VPROLVQZ256rmk */ |
| 97491 | 53653, |
| 97492 | /* VPROLVQZ256rmkz */ |
| 97493 | 53658, |
| 97494 | /* VPROLVQZ256rr */ |
| 97495 | 53662, |
| 97496 | /* VPROLVQZ256rrk */ |
| 97497 | 53665, |
| 97498 | /* VPROLVQZ256rrkz */ |
| 97499 | 53670, |
| 97500 | /* VPROLVQZrm */ |
| 97501 | 53674, |
| 97502 | /* VPROLVQZrmb */ |
| 97503 | 53677, |
| 97504 | /* VPROLVQZrmbk */ |
| 97505 | 53680, |
| 97506 | /* VPROLVQZrmbkz */ |
| 97507 | 53685, |
| 97508 | /* VPROLVQZrmk */ |
| 97509 | 53689, |
| 97510 | /* VPROLVQZrmkz */ |
| 97511 | 53694, |
| 97512 | /* VPROLVQZrr */ |
| 97513 | 53698, |
| 97514 | /* VPROLVQZrrk */ |
| 97515 | 53701, |
| 97516 | /* VPROLVQZrrkz */ |
| 97517 | 53706, |
| 97518 | /* VPRORDZ128mbi */ |
| 97519 | 53710, |
| 97520 | /* VPRORDZ128mbik */ |
| 97521 | 53713, |
| 97522 | /* VPRORDZ128mbikz */ |
| 97523 | 53718, |
| 97524 | /* VPRORDZ128mi */ |
| 97525 | 53722, |
| 97526 | /* VPRORDZ128mik */ |
| 97527 | 53725, |
| 97528 | /* VPRORDZ128mikz */ |
| 97529 | 53730, |
| 97530 | /* VPRORDZ128ri */ |
| 97531 | 53734, |
| 97532 | /* VPRORDZ128rik */ |
| 97533 | 53737, |
| 97534 | /* VPRORDZ128rikz */ |
| 97535 | 53742, |
| 97536 | /* VPRORDZ256mbi */ |
| 97537 | 53746, |
| 97538 | /* VPRORDZ256mbik */ |
| 97539 | 53749, |
| 97540 | /* VPRORDZ256mbikz */ |
| 97541 | 53754, |
| 97542 | /* VPRORDZ256mi */ |
| 97543 | 53758, |
| 97544 | /* VPRORDZ256mik */ |
| 97545 | 53761, |
| 97546 | /* VPRORDZ256mikz */ |
| 97547 | 53766, |
| 97548 | /* VPRORDZ256ri */ |
| 97549 | 53770, |
| 97550 | /* VPRORDZ256rik */ |
| 97551 | 53773, |
| 97552 | /* VPRORDZ256rikz */ |
| 97553 | 53778, |
| 97554 | /* VPRORDZmbi */ |
| 97555 | 53782, |
| 97556 | /* VPRORDZmbik */ |
| 97557 | 53785, |
| 97558 | /* VPRORDZmbikz */ |
| 97559 | 53790, |
| 97560 | /* VPRORDZmi */ |
| 97561 | 53794, |
| 97562 | /* VPRORDZmik */ |
| 97563 | 53797, |
| 97564 | /* VPRORDZmikz */ |
| 97565 | 53802, |
| 97566 | /* VPRORDZri */ |
| 97567 | 53806, |
| 97568 | /* VPRORDZrik */ |
| 97569 | 53809, |
| 97570 | /* VPRORDZrikz */ |
| 97571 | 53814, |
| 97572 | /* VPRORQZ128mbi */ |
| 97573 | 53818, |
| 97574 | /* VPRORQZ128mbik */ |
| 97575 | 53821, |
| 97576 | /* VPRORQZ128mbikz */ |
| 97577 | 53826, |
| 97578 | /* VPRORQZ128mi */ |
| 97579 | 53830, |
| 97580 | /* VPRORQZ128mik */ |
| 97581 | 53833, |
| 97582 | /* VPRORQZ128mikz */ |
| 97583 | 53838, |
| 97584 | /* VPRORQZ128ri */ |
| 97585 | 53842, |
| 97586 | /* VPRORQZ128rik */ |
| 97587 | 53845, |
| 97588 | /* VPRORQZ128rikz */ |
| 97589 | 53850, |
| 97590 | /* VPRORQZ256mbi */ |
| 97591 | 53854, |
| 97592 | /* VPRORQZ256mbik */ |
| 97593 | 53857, |
| 97594 | /* VPRORQZ256mbikz */ |
| 97595 | 53862, |
| 97596 | /* VPRORQZ256mi */ |
| 97597 | 53866, |
| 97598 | /* VPRORQZ256mik */ |
| 97599 | 53869, |
| 97600 | /* VPRORQZ256mikz */ |
| 97601 | 53874, |
| 97602 | /* VPRORQZ256ri */ |
| 97603 | 53878, |
| 97604 | /* VPRORQZ256rik */ |
| 97605 | 53881, |
| 97606 | /* VPRORQZ256rikz */ |
| 97607 | 53886, |
| 97608 | /* VPRORQZmbi */ |
| 97609 | 53890, |
| 97610 | /* VPRORQZmbik */ |
| 97611 | 53893, |
| 97612 | /* VPRORQZmbikz */ |
| 97613 | 53898, |
| 97614 | /* VPRORQZmi */ |
| 97615 | 53902, |
| 97616 | /* VPRORQZmik */ |
| 97617 | 53905, |
| 97618 | /* VPRORQZmikz */ |
| 97619 | 53910, |
| 97620 | /* VPRORQZri */ |
| 97621 | 53914, |
| 97622 | /* VPRORQZrik */ |
| 97623 | 53917, |
| 97624 | /* VPRORQZrikz */ |
| 97625 | 53922, |
| 97626 | /* VPRORVDZ128rm */ |
| 97627 | 53926, |
| 97628 | /* VPRORVDZ128rmb */ |
| 97629 | 53929, |
| 97630 | /* VPRORVDZ128rmbk */ |
| 97631 | 53932, |
| 97632 | /* VPRORVDZ128rmbkz */ |
| 97633 | 53937, |
| 97634 | /* VPRORVDZ128rmk */ |
| 97635 | 53941, |
| 97636 | /* VPRORVDZ128rmkz */ |
| 97637 | 53946, |
| 97638 | /* VPRORVDZ128rr */ |
| 97639 | 53950, |
| 97640 | /* VPRORVDZ128rrk */ |
| 97641 | 53953, |
| 97642 | /* VPRORVDZ128rrkz */ |
| 97643 | 53958, |
| 97644 | /* VPRORVDZ256rm */ |
| 97645 | 53962, |
| 97646 | /* VPRORVDZ256rmb */ |
| 97647 | 53965, |
| 97648 | /* VPRORVDZ256rmbk */ |
| 97649 | 53968, |
| 97650 | /* VPRORVDZ256rmbkz */ |
| 97651 | 53973, |
| 97652 | /* VPRORVDZ256rmk */ |
| 97653 | 53977, |
| 97654 | /* VPRORVDZ256rmkz */ |
| 97655 | 53982, |
| 97656 | /* VPRORVDZ256rr */ |
| 97657 | 53986, |
| 97658 | /* VPRORVDZ256rrk */ |
| 97659 | 53989, |
| 97660 | /* VPRORVDZ256rrkz */ |
| 97661 | 53994, |
| 97662 | /* VPRORVDZrm */ |
| 97663 | 53998, |
| 97664 | /* VPRORVDZrmb */ |
| 97665 | 54001, |
| 97666 | /* VPRORVDZrmbk */ |
| 97667 | 54004, |
| 97668 | /* VPRORVDZrmbkz */ |
| 97669 | 54009, |
| 97670 | /* VPRORVDZrmk */ |
| 97671 | 54013, |
| 97672 | /* VPRORVDZrmkz */ |
| 97673 | 54018, |
| 97674 | /* VPRORVDZrr */ |
| 97675 | 54022, |
| 97676 | /* VPRORVDZrrk */ |
| 97677 | 54025, |
| 97678 | /* VPRORVDZrrkz */ |
| 97679 | 54030, |
| 97680 | /* VPRORVQZ128rm */ |
| 97681 | 54034, |
| 97682 | /* VPRORVQZ128rmb */ |
| 97683 | 54037, |
| 97684 | /* VPRORVQZ128rmbk */ |
| 97685 | 54040, |
| 97686 | /* VPRORVQZ128rmbkz */ |
| 97687 | 54045, |
| 97688 | /* VPRORVQZ128rmk */ |
| 97689 | 54049, |
| 97690 | /* VPRORVQZ128rmkz */ |
| 97691 | 54054, |
| 97692 | /* VPRORVQZ128rr */ |
| 97693 | 54058, |
| 97694 | /* VPRORVQZ128rrk */ |
| 97695 | 54061, |
| 97696 | /* VPRORVQZ128rrkz */ |
| 97697 | 54066, |
| 97698 | /* VPRORVQZ256rm */ |
| 97699 | 54070, |
| 97700 | /* VPRORVQZ256rmb */ |
| 97701 | 54073, |
| 97702 | /* VPRORVQZ256rmbk */ |
| 97703 | 54076, |
| 97704 | /* VPRORVQZ256rmbkz */ |
| 97705 | 54081, |
| 97706 | /* VPRORVQZ256rmk */ |
| 97707 | 54085, |
| 97708 | /* VPRORVQZ256rmkz */ |
| 97709 | 54090, |
| 97710 | /* VPRORVQZ256rr */ |
| 97711 | 54094, |
| 97712 | /* VPRORVQZ256rrk */ |
| 97713 | 54097, |
| 97714 | /* VPRORVQZ256rrkz */ |
| 97715 | 54102, |
| 97716 | /* VPRORVQZrm */ |
| 97717 | 54106, |
| 97718 | /* VPRORVQZrmb */ |
| 97719 | 54109, |
| 97720 | /* VPRORVQZrmbk */ |
| 97721 | 54112, |
| 97722 | /* VPRORVQZrmbkz */ |
| 97723 | 54117, |
| 97724 | /* VPRORVQZrmk */ |
| 97725 | 54121, |
| 97726 | /* VPRORVQZrmkz */ |
| 97727 | 54126, |
| 97728 | /* VPRORVQZrr */ |
| 97729 | 54130, |
| 97730 | /* VPRORVQZrrk */ |
| 97731 | 54133, |
| 97732 | /* VPRORVQZrrkz */ |
| 97733 | 54138, |
| 97734 | /* VPROTBmi */ |
| 97735 | 54142, |
| 97736 | /* VPROTBmr */ |
| 97737 | 54145, |
| 97738 | /* VPROTBri */ |
| 97739 | 54148, |
| 97740 | /* VPROTBrm */ |
| 97741 | 54151, |
| 97742 | /* VPROTBrr */ |
| 97743 | 54154, |
| 97744 | /* VPROTBrr_REV */ |
| 97745 | 54157, |
| 97746 | /* VPROTDmi */ |
| 97747 | 54160, |
| 97748 | /* VPROTDmr */ |
| 97749 | 54163, |
| 97750 | /* VPROTDri */ |
| 97751 | 54166, |
| 97752 | /* VPROTDrm */ |
| 97753 | 54169, |
| 97754 | /* VPROTDrr */ |
| 97755 | 54172, |
| 97756 | /* VPROTDrr_REV */ |
| 97757 | 54175, |
| 97758 | /* VPROTQmi */ |
| 97759 | 54178, |
| 97760 | /* VPROTQmr */ |
| 97761 | 54181, |
| 97762 | /* VPROTQri */ |
| 97763 | 54184, |
| 97764 | /* VPROTQrm */ |
| 97765 | 54187, |
| 97766 | /* VPROTQrr */ |
| 97767 | 54190, |
| 97768 | /* VPROTQrr_REV */ |
| 97769 | 54193, |
| 97770 | /* VPROTWmi */ |
| 97771 | 54196, |
| 97772 | /* VPROTWmr */ |
| 97773 | 54199, |
| 97774 | /* VPROTWri */ |
| 97775 | 54202, |
| 97776 | /* VPROTWrm */ |
| 97777 | 54205, |
| 97778 | /* VPROTWrr */ |
| 97779 | 54208, |
| 97780 | /* VPROTWrr_REV */ |
| 97781 | 54211, |
| 97782 | /* VPSADBWYrm */ |
| 97783 | 54214, |
| 97784 | /* VPSADBWYrr */ |
| 97785 | 54217, |
| 97786 | /* VPSADBWZ128rm */ |
| 97787 | 54220, |
| 97788 | /* VPSADBWZ128rr */ |
| 97789 | 54223, |
| 97790 | /* VPSADBWZ256rm */ |
| 97791 | 54226, |
| 97792 | /* VPSADBWZ256rr */ |
| 97793 | 54229, |
| 97794 | /* VPSADBWZrm */ |
| 97795 | 54232, |
| 97796 | /* VPSADBWZrr */ |
| 97797 | 54235, |
| 97798 | /* VPSADBWrm */ |
| 97799 | 54238, |
| 97800 | /* VPSADBWrr */ |
| 97801 | 54241, |
| 97802 | /* VPSCATTERDDZ128mr */ |
| 97803 | 54244, |
| 97804 | /* VPSCATTERDDZ256mr */ |
| 97805 | 54248, |
| 97806 | /* VPSCATTERDDZmr */ |
| 97807 | 54252, |
| 97808 | /* VPSCATTERDQZ128mr */ |
| 97809 | 54256, |
| 97810 | /* VPSCATTERDQZ256mr */ |
| 97811 | 54260, |
| 97812 | /* VPSCATTERDQZmr */ |
| 97813 | 54264, |
| 97814 | /* VPSCATTERQDZ128mr */ |
| 97815 | 54268, |
| 97816 | /* VPSCATTERQDZ256mr */ |
| 97817 | 54272, |
| 97818 | /* VPSCATTERQDZmr */ |
| 97819 | 54276, |
| 97820 | /* VPSCATTERQQZ128mr */ |
| 97821 | 54280, |
| 97822 | /* VPSCATTERQQZ256mr */ |
| 97823 | 54284, |
| 97824 | /* VPSCATTERQQZmr */ |
| 97825 | 54288, |
| 97826 | /* VPSHABmr */ |
| 97827 | 54292, |
| 97828 | /* VPSHABrm */ |
| 97829 | 54295, |
| 97830 | /* VPSHABrr */ |
| 97831 | 54298, |
| 97832 | /* VPSHABrr_REV */ |
| 97833 | 54301, |
| 97834 | /* VPSHADmr */ |
| 97835 | 54304, |
| 97836 | /* VPSHADrm */ |
| 97837 | 54307, |
| 97838 | /* VPSHADrr */ |
| 97839 | 54310, |
| 97840 | /* VPSHADrr_REV */ |
| 97841 | 54313, |
| 97842 | /* VPSHAQmr */ |
| 97843 | 54316, |
| 97844 | /* VPSHAQrm */ |
| 97845 | 54319, |
| 97846 | /* VPSHAQrr */ |
| 97847 | 54322, |
| 97848 | /* VPSHAQrr_REV */ |
| 97849 | 54325, |
| 97850 | /* VPSHAWmr */ |
| 97851 | 54328, |
| 97852 | /* VPSHAWrm */ |
| 97853 | 54331, |
| 97854 | /* VPSHAWrr */ |
| 97855 | 54334, |
| 97856 | /* VPSHAWrr_REV */ |
| 97857 | 54337, |
| 97858 | /* VPSHLBmr */ |
| 97859 | 54340, |
| 97860 | /* VPSHLBrm */ |
| 97861 | 54343, |
| 97862 | /* VPSHLBrr */ |
| 97863 | 54346, |
| 97864 | /* VPSHLBrr_REV */ |
| 97865 | 54349, |
| 97866 | /* VPSHLDDZ128rmbi */ |
| 97867 | 54352, |
| 97868 | /* VPSHLDDZ128rmbik */ |
| 97869 | 54356, |
| 97870 | /* VPSHLDDZ128rmbikz */ |
| 97871 | 54362, |
| 97872 | /* VPSHLDDZ128rmi */ |
| 97873 | 54367, |
| 97874 | /* VPSHLDDZ128rmik */ |
| 97875 | 54371, |
| 97876 | /* VPSHLDDZ128rmikz */ |
| 97877 | 54377, |
| 97878 | /* VPSHLDDZ128rri */ |
| 97879 | 54382, |
| 97880 | /* VPSHLDDZ128rrik */ |
| 97881 | 54386, |
| 97882 | /* VPSHLDDZ128rrikz */ |
| 97883 | 54392, |
| 97884 | /* VPSHLDDZ256rmbi */ |
| 97885 | 54397, |
| 97886 | /* VPSHLDDZ256rmbik */ |
| 97887 | 54401, |
| 97888 | /* VPSHLDDZ256rmbikz */ |
| 97889 | 54407, |
| 97890 | /* VPSHLDDZ256rmi */ |
| 97891 | 54412, |
| 97892 | /* VPSHLDDZ256rmik */ |
| 97893 | 54416, |
| 97894 | /* VPSHLDDZ256rmikz */ |
| 97895 | 54422, |
| 97896 | /* VPSHLDDZ256rri */ |
| 97897 | 54427, |
| 97898 | /* VPSHLDDZ256rrik */ |
| 97899 | 54431, |
| 97900 | /* VPSHLDDZ256rrikz */ |
| 97901 | 54437, |
| 97902 | /* VPSHLDDZrmbi */ |
| 97903 | 54442, |
| 97904 | /* VPSHLDDZrmbik */ |
| 97905 | 54446, |
| 97906 | /* VPSHLDDZrmbikz */ |
| 97907 | 54452, |
| 97908 | /* VPSHLDDZrmi */ |
| 97909 | 54457, |
| 97910 | /* VPSHLDDZrmik */ |
| 97911 | 54461, |
| 97912 | /* VPSHLDDZrmikz */ |
| 97913 | 54467, |
| 97914 | /* VPSHLDDZrri */ |
| 97915 | 54472, |
| 97916 | /* VPSHLDDZrrik */ |
| 97917 | 54476, |
| 97918 | /* VPSHLDDZrrikz */ |
| 97919 | 54482, |
| 97920 | /* VPSHLDQZ128rmbi */ |
| 97921 | 54487, |
| 97922 | /* VPSHLDQZ128rmbik */ |
| 97923 | 54491, |
| 97924 | /* VPSHLDQZ128rmbikz */ |
| 97925 | 54497, |
| 97926 | /* VPSHLDQZ128rmi */ |
| 97927 | 54502, |
| 97928 | /* VPSHLDQZ128rmik */ |
| 97929 | 54506, |
| 97930 | /* VPSHLDQZ128rmikz */ |
| 97931 | 54512, |
| 97932 | /* VPSHLDQZ128rri */ |
| 97933 | 54517, |
| 97934 | /* VPSHLDQZ128rrik */ |
| 97935 | 54521, |
| 97936 | /* VPSHLDQZ128rrikz */ |
| 97937 | 54527, |
| 97938 | /* VPSHLDQZ256rmbi */ |
| 97939 | 54532, |
| 97940 | /* VPSHLDQZ256rmbik */ |
| 97941 | 54536, |
| 97942 | /* VPSHLDQZ256rmbikz */ |
| 97943 | 54542, |
| 97944 | /* VPSHLDQZ256rmi */ |
| 97945 | 54547, |
| 97946 | /* VPSHLDQZ256rmik */ |
| 97947 | 54551, |
| 97948 | /* VPSHLDQZ256rmikz */ |
| 97949 | 54557, |
| 97950 | /* VPSHLDQZ256rri */ |
| 97951 | 54562, |
| 97952 | /* VPSHLDQZ256rrik */ |
| 97953 | 54566, |
| 97954 | /* VPSHLDQZ256rrikz */ |
| 97955 | 54572, |
| 97956 | /* VPSHLDQZrmbi */ |
| 97957 | 54577, |
| 97958 | /* VPSHLDQZrmbik */ |
| 97959 | 54581, |
| 97960 | /* VPSHLDQZrmbikz */ |
| 97961 | 54587, |
| 97962 | /* VPSHLDQZrmi */ |
| 97963 | 54592, |
| 97964 | /* VPSHLDQZrmik */ |
| 97965 | 54596, |
| 97966 | /* VPSHLDQZrmikz */ |
| 97967 | 54602, |
| 97968 | /* VPSHLDQZrri */ |
| 97969 | 54607, |
| 97970 | /* VPSHLDQZrrik */ |
| 97971 | 54611, |
| 97972 | /* VPSHLDQZrrikz */ |
| 97973 | 54617, |
| 97974 | /* VPSHLDVDZ128m */ |
| 97975 | 54622, |
| 97976 | /* VPSHLDVDZ128mb */ |
| 97977 | 54626, |
| 97978 | /* VPSHLDVDZ128mbk */ |
| 97979 | 54630, |
| 97980 | /* VPSHLDVDZ128mbkz */ |
| 97981 | 54635, |
| 97982 | /* VPSHLDVDZ128mk */ |
| 97983 | 54640, |
| 97984 | /* VPSHLDVDZ128mkz */ |
| 97985 | 54645, |
| 97986 | /* VPSHLDVDZ128r */ |
| 97987 | 54650, |
| 97988 | /* VPSHLDVDZ128rk */ |
| 97989 | 54654, |
| 97990 | /* VPSHLDVDZ128rkz */ |
| 97991 | 54659, |
| 97992 | /* VPSHLDVDZ256m */ |
| 97993 | 54664, |
| 97994 | /* VPSHLDVDZ256mb */ |
| 97995 | 54668, |
| 97996 | /* VPSHLDVDZ256mbk */ |
| 97997 | 54672, |
| 97998 | /* VPSHLDVDZ256mbkz */ |
| 97999 | 54677, |
| 98000 | /* VPSHLDVDZ256mk */ |
| 98001 | 54682, |
| 98002 | /* VPSHLDVDZ256mkz */ |
| 98003 | 54687, |
| 98004 | /* VPSHLDVDZ256r */ |
| 98005 | 54692, |
| 98006 | /* VPSHLDVDZ256rk */ |
| 98007 | 54696, |
| 98008 | /* VPSHLDVDZ256rkz */ |
| 98009 | 54701, |
| 98010 | /* VPSHLDVDZm */ |
| 98011 | 54706, |
| 98012 | /* VPSHLDVDZmb */ |
| 98013 | 54710, |
| 98014 | /* VPSHLDVDZmbk */ |
| 98015 | 54714, |
| 98016 | /* VPSHLDVDZmbkz */ |
| 98017 | 54719, |
| 98018 | /* VPSHLDVDZmk */ |
| 98019 | 54724, |
| 98020 | /* VPSHLDVDZmkz */ |
| 98021 | 54729, |
| 98022 | /* VPSHLDVDZr */ |
| 98023 | 54734, |
| 98024 | /* VPSHLDVDZrk */ |
| 98025 | 54738, |
| 98026 | /* VPSHLDVDZrkz */ |
| 98027 | 54743, |
| 98028 | /* VPSHLDVQZ128m */ |
| 98029 | 54748, |
| 98030 | /* VPSHLDVQZ128mb */ |
| 98031 | 54752, |
| 98032 | /* VPSHLDVQZ128mbk */ |
| 98033 | 54756, |
| 98034 | /* VPSHLDVQZ128mbkz */ |
| 98035 | 54761, |
| 98036 | /* VPSHLDVQZ128mk */ |
| 98037 | 54766, |
| 98038 | /* VPSHLDVQZ128mkz */ |
| 98039 | 54771, |
| 98040 | /* VPSHLDVQZ128r */ |
| 98041 | 54776, |
| 98042 | /* VPSHLDVQZ128rk */ |
| 98043 | 54780, |
| 98044 | /* VPSHLDVQZ128rkz */ |
| 98045 | 54785, |
| 98046 | /* VPSHLDVQZ256m */ |
| 98047 | 54790, |
| 98048 | /* VPSHLDVQZ256mb */ |
| 98049 | 54794, |
| 98050 | /* VPSHLDVQZ256mbk */ |
| 98051 | 54798, |
| 98052 | /* VPSHLDVQZ256mbkz */ |
| 98053 | 54803, |
| 98054 | /* VPSHLDVQZ256mk */ |
| 98055 | 54808, |
| 98056 | /* VPSHLDVQZ256mkz */ |
| 98057 | 54813, |
| 98058 | /* VPSHLDVQZ256r */ |
| 98059 | 54818, |
| 98060 | /* VPSHLDVQZ256rk */ |
| 98061 | 54822, |
| 98062 | /* VPSHLDVQZ256rkz */ |
| 98063 | 54827, |
| 98064 | /* VPSHLDVQZm */ |
| 98065 | 54832, |
| 98066 | /* VPSHLDVQZmb */ |
| 98067 | 54836, |
| 98068 | /* VPSHLDVQZmbk */ |
| 98069 | 54840, |
| 98070 | /* VPSHLDVQZmbkz */ |
| 98071 | 54845, |
| 98072 | /* VPSHLDVQZmk */ |
| 98073 | 54850, |
| 98074 | /* VPSHLDVQZmkz */ |
| 98075 | 54855, |
| 98076 | /* VPSHLDVQZr */ |
| 98077 | 54860, |
| 98078 | /* VPSHLDVQZrk */ |
| 98079 | 54864, |
| 98080 | /* VPSHLDVQZrkz */ |
| 98081 | 54869, |
| 98082 | /* VPSHLDVWZ128m */ |
| 98083 | 54874, |
| 98084 | /* VPSHLDVWZ128mk */ |
| 98085 | 54878, |
| 98086 | /* VPSHLDVWZ128mkz */ |
| 98087 | 54883, |
| 98088 | /* VPSHLDVWZ128r */ |
| 98089 | 54888, |
| 98090 | /* VPSHLDVWZ128rk */ |
| 98091 | 54892, |
| 98092 | /* VPSHLDVWZ128rkz */ |
| 98093 | 54897, |
| 98094 | /* VPSHLDVWZ256m */ |
| 98095 | 54902, |
| 98096 | /* VPSHLDVWZ256mk */ |
| 98097 | 54906, |
| 98098 | /* VPSHLDVWZ256mkz */ |
| 98099 | 54911, |
| 98100 | /* VPSHLDVWZ256r */ |
| 98101 | 54916, |
| 98102 | /* VPSHLDVWZ256rk */ |
| 98103 | 54920, |
| 98104 | /* VPSHLDVWZ256rkz */ |
| 98105 | 54925, |
| 98106 | /* VPSHLDVWZm */ |
| 98107 | 54930, |
| 98108 | /* VPSHLDVWZmk */ |
| 98109 | 54934, |
| 98110 | /* VPSHLDVWZmkz */ |
| 98111 | 54939, |
| 98112 | /* VPSHLDVWZr */ |
| 98113 | 54944, |
| 98114 | /* VPSHLDVWZrk */ |
| 98115 | 54948, |
| 98116 | /* VPSHLDVWZrkz */ |
| 98117 | 54953, |
| 98118 | /* VPSHLDWZ128rmi */ |
| 98119 | 54958, |
| 98120 | /* VPSHLDWZ128rmik */ |
| 98121 | 54962, |
| 98122 | /* VPSHLDWZ128rmikz */ |
| 98123 | 54968, |
| 98124 | /* VPSHLDWZ128rri */ |
| 98125 | 54973, |
| 98126 | /* VPSHLDWZ128rrik */ |
| 98127 | 54977, |
| 98128 | /* VPSHLDWZ128rrikz */ |
| 98129 | 54983, |
| 98130 | /* VPSHLDWZ256rmi */ |
| 98131 | 54988, |
| 98132 | /* VPSHLDWZ256rmik */ |
| 98133 | 54992, |
| 98134 | /* VPSHLDWZ256rmikz */ |
| 98135 | 54998, |
| 98136 | /* VPSHLDWZ256rri */ |
| 98137 | 55003, |
| 98138 | /* VPSHLDWZ256rrik */ |
| 98139 | 55007, |
| 98140 | /* VPSHLDWZ256rrikz */ |
| 98141 | 55013, |
| 98142 | /* VPSHLDWZrmi */ |
| 98143 | 55018, |
| 98144 | /* VPSHLDWZrmik */ |
| 98145 | 55022, |
| 98146 | /* VPSHLDWZrmikz */ |
| 98147 | 55028, |
| 98148 | /* VPSHLDWZrri */ |
| 98149 | 55033, |
| 98150 | /* VPSHLDWZrrik */ |
| 98151 | 55037, |
| 98152 | /* VPSHLDWZrrikz */ |
| 98153 | 55043, |
| 98154 | /* VPSHLDmr */ |
| 98155 | 55048, |
| 98156 | /* VPSHLDrm */ |
| 98157 | 55051, |
| 98158 | /* VPSHLDrr */ |
| 98159 | 55054, |
| 98160 | /* VPSHLDrr_REV */ |
| 98161 | 55057, |
| 98162 | /* VPSHLQmr */ |
| 98163 | 55060, |
| 98164 | /* VPSHLQrm */ |
| 98165 | 55063, |
| 98166 | /* VPSHLQrr */ |
| 98167 | 55066, |
| 98168 | /* VPSHLQrr_REV */ |
| 98169 | 55069, |
| 98170 | /* VPSHLWmr */ |
| 98171 | 55072, |
| 98172 | /* VPSHLWrm */ |
| 98173 | 55075, |
| 98174 | /* VPSHLWrr */ |
| 98175 | 55078, |
| 98176 | /* VPSHLWrr_REV */ |
| 98177 | 55081, |
| 98178 | /* VPSHRDDZ128rmbi */ |
| 98179 | 55084, |
| 98180 | /* VPSHRDDZ128rmbik */ |
| 98181 | 55088, |
| 98182 | /* VPSHRDDZ128rmbikz */ |
| 98183 | 55094, |
| 98184 | /* VPSHRDDZ128rmi */ |
| 98185 | 55099, |
| 98186 | /* VPSHRDDZ128rmik */ |
| 98187 | 55103, |
| 98188 | /* VPSHRDDZ128rmikz */ |
| 98189 | 55109, |
| 98190 | /* VPSHRDDZ128rri */ |
| 98191 | 55114, |
| 98192 | /* VPSHRDDZ128rrik */ |
| 98193 | 55118, |
| 98194 | /* VPSHRDDZ128rrikz */ |
| 98195 | 55124, |
| 98196 | /* VPSHRDDZ256rmbi */ |
| 98197 | 55129, |
| 98198 | /* VPSHRDDZ256rmbik */ |
| 98199 | 55133, |
| 98200 | /* VPSHRDDZ256rmbikz */ |
| 98201 | 55139, |
| 98202 | /* VPSHRDDZ256rmi */ |
| 98203 | 55144, |
| 98204 | /* VPSHRDDZ256rmik */ |
| 98205 | 55148, |
| 98206 | /* VPSHRDDZ256rmikz */ |
| 98207 | 55154, |
| 98208 | /* VPSHRDDZ256rri */ |
| 98209 | 55159, |
| 98210 | /* VPSHRDDZ256rrik */ |
| 98211 | 55163, |
| 98212 | /* VPSHRDDZ256rrikz */ |
| 98213 | 55169, |
| 98214 | /* VPSHRDDZrmbi */ |
| 98215 | 55174, |
| 98216 | /* VPSHRDDZrmbik */ |
| 98217 | 55178, |
| 98218 | /* VPSHRDDZrmbikz */ |
| 98219 | 55184, |
| 98220 | /* VPSHRDDZrmi */ |
| 98221 | 55189, |
| 98222 | /* VPSHRDDZrmik */ |
| 98223 | 55193, |
| 98224 | /* VPSHRDDZrmikz */ |
| 98225 | 55199, |
| 98226 | /* VPSHRDDZrri */ |
| 98227 | 55204, |
| 98228 | /* VPSHRDDZrrik */ |
| 98229 | 55208, |
| 98230 | /* VPSHRDDZrrikz */ |
| 98231 | 55214, |
| 98232 | /* VPSHRDQZ128rmbi */ |
| 98233 | 55219, |
| 98234 | /* VPSHRDQZ128rmbik */ |
| 98235 | 55223, |
| 98236 | /* VPSHRDQZ128rmbikz */ |
| 98237 | 55229, |
| 98238 | /* VPSHRDQZ128rmi */ |
| 98239 | 55234, |
| 98240 | /* VPSHRDQZ128rmik */ |
| 98241 | 55238, |
| 98242 | /* VPSHRDQZ128rmikz */ |
| 98243 | 55244, |
| 98244 | /* VPSHRDQZ128rri */ |
| 98245 | 55249, |
| 98246 | /* VPSHRDQZ128rrik */ |
| 98247 | 55253, |
| 98248 | /* VPSHRDQZ128rrikz */ |
| 98249 | 55259, |
| 98250 | /* VPSHRDQZ256rmbi */ |
| 98251 | 55264, |
| 98252 | /* VPSHRDQZ256rmbik */ |
| 98253 | 55268, |
| 98254 | /* VPSHRDQZ256rmbikz */ |
| 98255 | 55274, |
| 98256 | /* VPSHRDQZ256rmi */ |
| 98257 | 55279, |
| 98258 | /* VPSHRDQZ256rmik */ |
| 98259 | 55283, |
| 98260 | /* VPSHRDQZ256rmikz */ |
| 98261 | 55289, |
| 98262 | /* VPSHRDQZ256rri */ |
| 98263 | 55294, |
| 98264 | /* VPSHRDQZ256rrik */ |
| 98265 | 55298, |
| 98266 | /* VPSHRDQZ256rrikz */ |
| 98267 | 55304, |
| 98268 | /* VPSHRDQZrmbi */ |
| 98269 | 55309, |
| 98270 | /* VPSHRDQZrmbik */ |
| 98271 | 55313, |
| 98272 | /* VPSHRDQZrmbikz */ |
| 98273 | 55319, |
| 98274 | /* VPSHRDQZrmi */ |
| 98275 | 55324, |
| 98276 | /* VPSHRDQZrmik */ |
| 98277 | 55328, |
| 98278 | /* VPSHRDQZrmikz */ |
| 98279 | 55334, |
| 98280 | /* VPSHRDQZrri */ |
| 98281 | 55339, |
| 98282 | /* VPSHRDQZrrik */ |
| 98283 | 55343, |
| 98284 | /* VPSHRDQZrrikz */ |
| 98285 | 55349, |
| 98286 | /* VPSHRDVDZ128m */ |
| 98287 | 55354, |
| 98288 | /* VPSHRDVDZ128mb */ |
| 98289 | 55358, |
| 98290 | /* VPSHRDVDZ128mbk */ |
| 98291 | 55362, |
| 98292 | /* VPSHRDVDZ128mbkz */ |
| 98293 | 55367, |
| 98294 | /* VPSHRDVDZ128mk */ |
| 98295 | 55372, |
| 98296 | /* VPSHRDVDZ128mkz */ |
| 98297 | 55377, |
| 98298 | /* VPSHRDVDZ128r */ |
| 98299 | 55382, |
| 98300 | /* VPSHRDVDZ128rk */ |
| 98301 | 55386, |
| 98302 | /* VPSHRDVDZ128rkz */ |
| 98303 | 55391, |
| 98304 | /* VPSHRDVDZ256m */ |
| 98305 | 55396, |
| 98306 | /* VPSHRDVDZ256mb */ |
| 98307 | 55400, |
| 98308 | /* VPSHRDVDZ256mbk */ |
| 98309 | 55404, |
| 98310 | /* VPSHRDVDZ256mbkz */ |
| 98311 | 55409, |
| 98312 | /* VPSHRDVDZ256mk */ |
| 98313 | 55414, |
| 98314 | /* VPSHRDVDZ256mkz */ |
| 98315 | 55419, |
| 98316 | /* VPSHRDVDZ256r */ |
| 98317 | 55424, |
| 98318 | /* VPSHRDVDZ256rk */ |
| 98319 | 55428, |
| 98320 | /* VPSHRDVDZ256rkz */ |
| 98321 | 55433, |
| 98322 | /* VPSHRDVDZm */ |
| 98323 | 55438, |
| 98324 | /* VPSHRDVDZmb */ |
| 98325 | 55442, |
| 98326 | /* VPSHRDVDZmbk */ |
| 98327 | 55446, |
| 98328 | /* VPSHRDVDZmbkz */ |
| 98329 | 55451, |
| 98330 | /* VPSHRDVDZmk */ |
| 98331 | 55456, |
| 98332 | /* VPSHRDVDZmkz */ |
| 98333 | 55461, |
| 98334 | /* VPSHRDVDZr */ |
| 98335 | 55466, |
| 98336 | /* VPSHRDVDZrk */ |
| 98337 | 55470, |
| 98338 | /* VPSHRDVDZrkz */ |
| 98339 | 55475, |
| 98340 | /* VPSHRDVQZ128m */ |
| 98341 | 55480, |
| 98342 | /* VPSHRDVQZ128mb */ |
| 98343 | 55484, |
| 98344 | /* VPSHRDVQZ128mbk */ |
| 98345 | 55488, |
| 98346 | /* VPSHRDVQZ128mbkz */ |
| 98347 | 55493, |
| 98348 | /* VPSHRDVQZ128mk */ |
| 98349 | 55498, |
| 98350 | /* VPSHRDVQZ128mkz */ |
| 98351 | 55503, |
| 98352 | /* VPSHRDVQZ128r */ |
| 98353 | 55508, |
| 98354 | /* VPSHRDVQZ128rk */ |
| 98355 | 55512, |
| 98356 | /* VPSHRDVQZ128rkz */ |
| 98357 | 55517, |
| 98358 | /* VPSHRDVQZ256m */ |
| 98359 | 55522, |
| 98360 | /* VPSHRDVQZ256mb */ |
| 98361 | 55526, |
| 98362 | /* VPSHRDVQZ256mbk */ |
| 98363 | 55530, |
| 98364 | /* VPSHRDVQZ256mbkz */ |
| 98365 | 55535, |
| 98366 | /* VPSHRDVQZ256mk */ |
| 98367 | 55540, |
| 98368 | /* VPSHRDVQZ256mkz */ |
| 98369 | 55545, |
| 98370 | /* VPSHRDVQZ256r */ |
| 98371 | 55550, |
| 98372 | /* VPSHRDVQZ256rk */ |
| 98373 | 55554, |
| 98374 | /* VPSHRDVQZ256rkz */ |
| 98375 | 55559, |
| 98376 | /* VPSHRDVQZm */ |
| 98377 | 55564, |
| 98378 | /* VPSHRDVQZmb */ |
| 98379 | 55568, |
| 98380 | /* VPSHRDVQZmbk */ |
| 98381 | 55572, |
| 98382 | /* VPSHRDVQZmbkz */ |
| 98383 | 55577, |
| 98384 | /* VPSHRDVQZmk */ |
| 98385 | 55582, |
| 98386 | /* VPSHRDVQZmkz */ |
| 98387 | 55587, |
| 98388 | /* VPSHRDVQZr */ |
| 98389 | 55592, |
| 98390 | /* VPSHRDVQZrk */ |
| 98391 | 55596, |
| 98392 | /* VPSHRDVQZrkz */ |
| 98393 | 55601, |
| 98394 | /* VPSHRDVWZ128m */ |
| 98395 | 55606, |
| 98396 | /* VPSHRDVWZ128mk */ |
| 98397 | 55610, |
| 98398 | /* VPSHRDVWZ128mkz */ |
| 98399 | 55615, |
| 98400 | /* VPSHRDVWZ128r */ |
| 98401 | 55620, |
| 98402 | /* VPSHRDVWZ128rk */ |
| 98403 | 55624, |
| 98404 | /* VPSHRDVWZ128rkz */ |
| 98405 | 55629, |
| 98406 | /* VPSHRDVWZ256m */ |
| 98407 | 55634, |
| 98408 | /* VPSHRDVWZ256mk */ |
| 98409 | 55638, |
| 98410 | /* VPSHRDVWZ256mkz */ |
| 98411 | 55643, |
| 98412 | /* VPSHRDVWZ256r */ |
| 98413 | 55648, |
| 98414 | /* VPSHRDVWZ256rk */ |
| 98415 | 55652, |
| 98416 | /* VPSHRDVWZ256rkz */ |
| 98417 | 55657, |
| 98418 | /* VPSHRDVWZm */ |
| 98419 | 55662, |
| 98420 | /* VPSHRDVWZmk */ |
| 98421 | 55666, |
| 98422 | /* VPSHRDVWZmkz */ |
| 98423 | 55671, |
| 98424 | /* VPSHRDVWZr */ |
| 98425 | 55676, |
| 98426 | /* VPSHRDVWZrk */ |
| 98427 | 55680, |
| 98428 | /* VPSHRDVWZrkz */ |
| 98429 | 55685, |
| 98430 | /* VPSHRDWZ128rmi */ |
| 98431 | 55690, |
| 98432 | /* VPSHRDWZ128rmik */ |
| 98433 | 55694, |
| 98434 | /* VPSHRDWZ128rmikz */ |
| 98435 | 55700, |
| 98436 | /* VPSHRDWZ128rri */ |
| 98437 | 55705, |
| 98438 | /* VPSHRDWZ128rrik */ |
| 98439 | 55709, |
| 98440 | /* VPSHRDWZ128rrikz */ |
| 98441 | 55715, |
| 98442 | /* VPSHRDWZ256rmi */ |
| 98443 | 55720, |
| 98444 | /* VPSHRDWZ256rmik */ |
| 98445 | 55724, |
| 98446 | /* VPSHRDWZ256rmikz */ |
| 98447 | 55730, |
| 98448 | /* VPSHRDWZ256rri */ |
| 98449 | 55735, |
| 98450 | /* VPSHRDWZ256rrik */ |
| 98451 | 55739, |
| 98452 | /* VPSHRDWZ256rrikz */ |
| 98453 | 55745, |
| 98454 | /* VPSHRDWZrmi */ |
| 98455 | 55750, |
| 98456 | /* VPSHRDWZrmik */ |
| 98457 | 55754, |
| 98458 | /* VPSHRDWZrmikz */ |
| 98459 | 55760, |
| 98460 | /* VPSHRDWZrri */ |
| 98461 | 55765, |
| 98462 | /* VPSHRDWZrrik */ |
| 98463 | 55769, |
| 98464 | /* VPSHRDWZrrikz */ |
| 98465 | 55775, |
| 98466 | /* VPSHUFBITQMBZ128rm */ |
| 98467 | 55780, |
| 98468 | /* VPSHUFBITQMBZ128rmk */ |
| 98469 | 55783, |
| 98470 | /* VPSHUFBITQMBZ128rr */ |
| 98471 | 55787, |
| 98472 | /* VPSHUFBITQMBZ128rrk */ |
| 98473 | 55790, |
| 98474 | /* VPSHUFBITQMBZ256rm */ |
| 98475 | 55794, |
| 98476 | /* VPSHUFBITQMBZ256rmk */ |
| 98477 | 55797, |
| 98478 | /* VPSHUFBITQMBZ256rr */ |
| 98479 | 55801, |
| 98480 | /* VPSHUFBITQMBZ256rrk */ |
| 98481 | 55804, |
| 98482 | /* VPSHUFBITQMBZrm */ |
| 98483 | 55808, |
| 98484 | /* VPSHUFBITQMBZrmk */ |
| 98485 | 55811, |
| 98486 | /* VPSHUFBITQMBZrr */ |
| 98487 | 55815, |
| 98488 | /* VPSHUFBITQMBZrrk */ |
| 98489 | 55818, |
| 98490 | /* VPSHUFBYrm */ |
| 98491 | 55822, |
| 98492 | /* VPSHUFBYrr */ |
| 98493 | 55825, |
| 98494 | /* VPSHUFBZ128rm */ |
| 98495 | 55828, |
| 98496 | /* VPSHUFBZ128rmk */ |
| 98497 | 55831, |
| 98498 | /* VPSHUFBZ128rmkz */ |
| 98499 | 55836, |
| 98500 | /* VPSHUFBZ128rr */ |
| 98501 | 55840, |
| 98502 | /* VPSHUFBZ128rrk */ |
| 98503 | 55843, |
| 98504 | /* VPSHUFBZ128rrkz */ |
| 98505 | 55848, |
| 98506 | /* VPSHUFBZ256rm */ |
| 98507 | 55852, |
| 98508 | /* VPSHUFBZ256rmk */ |
| 98509 | 55855, |
| 98510 | /* VPSHUFBZ256rmkz */ |
| 98511 | 55860, |
| 98512 | /* VPSHUFBZ256rr */ |
| 98513 | 55864, |
| 98514 | /* VPSHUFBZ256rrk */ |
| 98515 | 55867, |
| 98516 | /* VPSHUFBZ256rrkz */ |
| 98517 | 55872, |
| 98518 | /* VPSHUFBZrm */ |
| 98519 | 55876, |
| 98520 | /* VPSHUFBZrmk */ |
| 98521 | 55879, |
| 98522 | /* VPSHUFBZrmkz */ |
| 98523 | 55884, |
| 98524 | /* VPSHUFBZrr */ |
| 98525 | 55888, |
| 98526 | /* VPSHUFBZrrk */ |
| 98527 | 55891, |
| 98528 | /* VPSHUFBZrrkz */ |
| 98529 | 55896, |
| 98530 | /* VPSHUFBrm */ |
| 98531 | 55900, |
| 98532 | /* VPSHUFBrr */ |
| 98533 | 55903, |
| 98534 | /* VPSHUFDYmi */ |
| 98535 | 55906, |
| 98536 | /* VPSHUFDYri */ |
| 98537 | 55909, |
| 98538 | /* VPSHUFDZ128mbi */ |
| 98539 | 55912, |
| 98540 | /* VPSHUFDZ128mbik */ |
| 98541 | 55915, |
| 98542 | /* VPSHUFDZ128mbikz */ |
| 98543 | 55920, |
| 98544 | /* VPSHUFDZ128mi */ |
| 98545 | 55924, |
| 98546 | /* VPSHUFDZ128mik */ |
| 98547 | 55927, |
| 98548 | /* VPSHUFDZ128mikz */ |
| 98549 | 55932, |
| 98550 | /* VPSHUFDZ128ri */ |
| 98551 | 55936, |
| 98552 | /* VPSHUFDZ128rik */ |
| 98553 | 55939, |
| 98554 | /* VPSHUFDZ128rikz */ |
| 98555 | 55944, |
| 98556 | /* VPSHUFDZ256mbi */ |
| 98557 | 55948, |
| 98558 | /* VPSHUFDZ256mbik */ |
| 98559 | 55951, |
| 98560 | /* VPSHUFDZ256mbikz */ |
| 98561 | 55956, |
| 98562 | /* VPSHUFDZ256mi */ |
| 98563 | 55960, |
| 98564 | /* VPSHUFDZ256mik */ |
| 98565 | 55963, |
| 98566 | /* VPSHUFDZ256mikz */ |
| 98567 | 55968, |
| 98568 | /* VPSHUFDZ256ri */ |
| 98569 | 55972, |
| 98570 | /* VPSHUFDZ256rik */ |
| 98571 | 55975, |
| 98572 | /* VPSHUFDZ256rikz */ |
| 98573 | 55980, |
| 98574 | /* VPSHUFDZmbi */ |
| 98575 | 55984, |
| 98576 | /* VPSHUFDZmbik */ |
| 98577 | 55987, |
| 98578 | /* VPSHUFDZmbikz */ |
| 98579 | 55992, |
| 98580 | /* VPSHUFDZmi */ |
| 98581 | 55996, |
| 98582 | /* VPSHUFDZmik */ |
| 98583 | 55999, |
| 98584 | /* VPSHUFDZmikz */ |
| 98585 | 56004, |
| 98586 | /* VPSHUFDZri */ |
| 98587 | 56008, |
| 98588 | /* VPSHUFDZrik */ |
| 98589 | 56011, |
| 98590 | /* VPSHUFDZrikz */ |
| 98591 | 56016, |
| 98592 | /* VPSHUFDmi */ |
| 98593 | 56020, |
| 98594 | /* VPSHUFDri */ |
| 98595 | 56023, |
| 98596 | /* VPSHUFHWYmi */ |
| 98597 | 56026, |
| 98598 | /* VPSHUFHWYri */ |
| 98599 | 56029, |
| 98600 | /* VPSHUFHWZ128mi */ |
| 98601 | 56032, |
| 98602 | /* VPSHUFHWZ128mik */ |
| 98603 | 56035, |
| 98604 | /* VPSHUFHWZ128mikz */ |
| 98605 | 56040, |
| 98606 | /* VPSHUFHWZ128ri */ |
| 98607 | 56044, |
| 98608 | /* VPSHUFHWZ128rik */ |
| 98609 | 56047, |
| 98610 | /* VPSHUFHWZ128rikz */ |
| 98611 | 56052, |
| 98612 | /* VPSHUFHWZ256mi */ |
| 98613 | 56056, |
| 98614 | /* VPSHUFHWZ256mik */ |
| 98615 | 56059, |
| 98616 | /* VPSHUFHWZ256mikz */ |
| 98617 | 56064, |
| 98618 | /* VPSHUFHWZ256ri */ |
| 98619 | 56068, |
| 98620 | /* VPSHUFHWZ256rik */ |
| 98621 | 56071, |
| 98622 | /* VPSHUFHWZ256rikz */ |
| 98623 | 56076, |
| 98624 | /* VPSHUFHWZmi */ |
| 98625 | 56080, |
| 98626 | /* VPSHUFHWZmik */ |
| 98627 | 56083, |
| 98628 | /* VPSHUFHWZmikz */ |
| 98629 | 56088, |
| 98630 | /* VPSHUFHWZri */ |
| 98631 | 56092, |
| 98632 | /* VPSHUFHWZrik */ |
| 98633 | 56095, |
| 98634 | /* VPSHUFHWZrikz */ |
| 98635 | 56100, |
| 98636 | /* VPSHUFHWmi */ |
| 98637 | 56104, |
| 98638 | /* VPSHUFHWri */ |
| 98639 | 56107, |
| 98640 | /* VPSHUFLWYmi */ |
| 98641 | 56110, |
| 98642 | /* VPSHUFLWYri */ |
| 98643 | 56113, |
| 98644 | /* VPSHUFLWZ128mi */ |
| 98645 | 56116, |
| 98646 | /* VPSHUFLWZ128mik */ |
| 98647 | 56119, |
| 98648 | /* VPSHUFLWZ128mikz */ |
| 98649 | 56124, |
| 98650 | /* VPSHUFLWZ128ri */ |
| 98651 | 56128, |
| 98652 | /* VPSHUFLWZ128rik */ |
| 98653 | 56131, |
| 98654 | /* VPSHUFLWZ128rikz */ |
| 98655 | 56136, |
| 98656 | /* VPSHUFLWZ256mi */ |
| 98657 | 56140, |
| 98658 | /* VPSHUFLWZ256mik */ |
| 98659 | 56143, |
| 98660 | /* VPSHUFLWZ256mikz */ |
| 98661 | 56148, |
| 98662 | /* VPSHUFLWZ256ri */ |
| 98663 | 56152, |
| 98664 | /* VPSHUFLWZ256rik */ |
| 98665 | 56155, |
| 98666 | /* VPSHUFLWZ256rikz */ |
| 98667 | 56160, |
| 98668 | /* VPSHUFLWZmi */ |
| 98669 | 56164, |
| 98670 | /* VPSHUFLWZmik */ |
| 98671 | 56167, |
| 98672 | /* VPSHUFLWZmikz */ |
| 98673 | 56172, |
| 98674 | /* VPSHUFLWZri */ |
| 98675 | 56176, |
| 98676 | /* VPSHUFLWZrik */ |
| 98677 | 56179, |
| 98678 | /* VPSHUFLWZrikz */ |
| 98679 | 56184, |
| 98680 | /* VPSHUFLWmi */ |
| 98681 | 56188, |
| 98682 | /* VPSHUFLWri */ |
| 98683 | 56191, |
| 98684 | /* VPSIGNBYrm */ |
| 98685 | 56194, |
| 98686 | /* VPSIGNBYrr */ |
| 98687 | 56197, |
| 98688 | /* VPSIGNBrm */ |
| 98689 | 56200, |
| 98690 | /* VPSIGNBrr */ |
| 98691 | 56203, |
| 98692 | /* VPSIGNDYrm */ |
| 98693 | 56206, |
| 98694 | /* VPSIGNDYrr */ |
| 98695 | 56209, |
| 98696 | /* VPSIGNDrm */ |
| 98697 | 56212, |
| 98698 | /* VPSIGNDrr */ |
| 98699 | 56215, |
| 98700 | /* VPSIGNWYrm */ |
| 98701 | 56218, |
| 98702 | /* VPSIGNWYrr */ |
| 98703 | 56221, |
| 98704 | /* VPSIGNWrm */ |
| 98705 | 56224, |
| 98706 | /* VPSIGNWrr */ |
| 98707 | 56227, |
| 98708 | /* VPSLLDQYri */ |
| 98709 | 56230, |
| 98710 | /* VPSLLDQZ128mi */ |
| 98711 | 56233, |
| 98712 | /* VPSLLDQZ128ri */ |
| 98713 | 56236, |
| 98714 | /* VPSLLDQZ256mi */ |
| 98715 | 56239, |
| 98716 | /* VPSLLDQZ256ri */ |
| 98717 | 56242, |
| 98718 | /* VPSLLDQZmi */ |
| 98719 | 56245, |
| 98720 | /* VPSLLDQZri */ |
| 98721 | 56248, |
| 98722 | /* VPSLLDQri */ |
| 98723 | 56251, |
| 98724 | /* VPSLLDYri */ |
| 98725 | 56254, |
| 98726 | /* VPSLLDYrm */ |
| 98727 | 56257, |
| 98728 | /* VPSLLDYrr */ |
| 98729 | 56260, |
| 98730 | /* VPSLLDZ128mbi */ |
| 98731 | 56263, |
| 98732 | /* VPSLLDZ128mbik */ |
| 98733 | 56266, |
| 98734 | /* VPSLLDZ128mbikz */ |
| 98735 | 56271, |
| 98736 | /* VPSLLDZ128mi */ |
| 98737 | 56275, |
| 98738 | /* VPSLLDZ128mik */ |
| 98739 | 56278, |
| 98740 | /* VPSLLDZ128mikz */ |
| 98741 | 56283, |
| 98742 | /* VPSLLDZ128ri */ |
| 98743 | 56287, |
| 98744 | /* VPSLLDZ128rik */ |
| 98745 | 56290, |
| 98746 | /* VPSLLDZ128rikz */ |
| 98747 | 56295, |
| 98748 | /* VPSLLDZ128rm */ |
| 98749 | 56299, |
| 98750 | /* VPSLLDZ128rmk */ |
| 98751 | 56302, |
| 98752 | /* VPSLLDZ128rmkz */ |
| 98753 | 56307, |
| 98754 | /* VPSLLDZ128rr */ |
| 98755 | 56311, |
| 98756 | /* VPSLLDZ128rrk */ |
| 98757 | 56314, |
| 98758 | /* VPSLLDZ128rrkz */ |
| 98759 | 56319, |
| 98760 | /* VPSLLDZ256mbi */ |
| 98761 | 56323, |
| 98762 | /* VPSLLDZ256mbik */ |
| 98763 | 56326, |
| 98764 | /* VPSLLDZ256mbikz */ |
| 98765 | 56331, |
| 98766 | /* VPSLLDZ256mi */ |
| 98767 | 56335, |
| 98768 | /* VPSLLDZ256mik */ |
| 98769 | 56338, |
| 98770 | /* VPSLLDZ256mikz */ |
| 98771 | 56343, |
| 98772 | /* VPSLLDZ256ri */ |
| 98773 | 56347, |
| 98774 | /* VPSLLDZ256rik */ |
| 98775 | 56350, |
| 98776 | /* VPSLLDZ256rikz */ |
| 98777 | 56355, |
| 98778 | /* VPSLLDZ256rm */ |
| 98779 | 56359, |
| 98780 | /* VPSLLDZ256rmk */ |
| 98781 | 56362, |
| 98782 | /* VPSLLDZ256rmkz */ |
| 98783 | 56367, |
| 98784 | /* VPSLLDZ256rr */ |
| 98785 | 56371, |
| 98786 | /* VPSLLDZ256rrk */ |
| 98787 | 56374, |
| 98788 | /* VPSLLDZ256rrkz */ |
| 98789 | 56379, |
| 98790 | /* VPSLLDZmbi */ |
| 98791 | 56383, |
| 98792 | /* VPSLLDZmbik */ |
| 98793 | 56386, |
| 98794 | /* VPSLLDZmbikz */ |
| 98795 | 56391, |
| 98796 | /* VPSLLDZmi */ |
| 98797 | 56395, |
| 98798 | /* VPSLLDZmik */ |
| 98799 | 56398, |
| 98800 | /* VPSLLDZmikz */ |
| 98801 | 56403, |
| 98802 | /* VPSLLDZri */ |
| 98803 | 56407, |
| 98804 | /* VPSLLDZrik */ |
| 98805 | 56410, |
| 98806 | /* VPSLLDZrikz */ |
| 98807 | 56415, |
| 98808 | /* VPSLLDZrm */ |
| 98809 | 56419, |
| 98810 | /* VPSLLDZrmk */ |
| 98811 | 56422, |
| 98812 | /* VPSLLDZrmkz */ |
| 98813 | 56427, |
| 98814 | /* VPSLLDZrr */ |
| 98815 | 56431, |
| 98816 | /* VPSLLDZrrk */ |
| 98817 | 56434, |
| 98818 | /* VPSLLDZrrkz */ |
| 98819 | 56439, |
| 98820 | /* VPSLLDri */ |
| 98821 | 56443, |
| 98822 | /* VPSLLDrm */ |
| 98823 | 56446, |
| 98824 | /* VPSLLDrr */ |
| 98825 | 56449, |
| 98826 | /* VPSLLQYri */ |
| 98827 | 56452, |
| 98828 | /* VPSLLQYrm */ |
| 98829 | 56455, |
| 98830 | /* VPSLLQYrr */ |
| 98831 | 56458, |
| 98832 | /* VPSLLQZ128mbi */ |
| 98833 | 56461, |
| 98834 | /* VPSLLQZ128mbik */ |
| 98835 | 56464, |
| 98836 | /* VPSLLQZ128mbikz */ |
| 98837 | 56469, |
| 98838 | /* VPSLLQZ128mi */ |
| 98839 | 56473, |
| 98840 | /* VPSLLQZ128mik */ |
| 98841 | 56476, |
| 98842 | /* VPSLLQZ128mikz */ |
| 98843 | 56481, |
| 98844 | /* VPSLLQZ128ri */ |
| 98845 | 56485, |
| 98846 | /* VPSLLQZ128rik */ |
| 98847 | 56488, |
| 98848 | /* VPSLLQZ128rikz */ |
| 98849 | 56493, |
| 98850 | /* VPSLLQZ128rm */ |
| 98851 | 56497, |
| 98852 | /* VPSLLQZ128rmk */ |
| 98853 | 56500, |
| 98854 | /* VPSLLQZ128rmkz */ |
| 98855 | 56505, |
| 98856 | /* VPSLLQZ128rr */ |
| 98857 | 56509, |
| 98858 | /* VPSLLQZ128rrk */ |
| 98859 | 56512, |
| 98860 | /* VPSLLQZ128rrkz */ |
| 98861 | 56517, |
| 98862 | /* VPSLLQZ256mbi */ |
| 98863 | 56521, |
| 98864 | /* VPSLLQZ256mbik */ |
| 98865 | 56524, |
| 98866 | /* VPSLLQZ256mbikz */ |
| 98867 | 56529, |
| 98868 | /* VPSLLQZ256mi */ |
| 98869 | 56533, |
| 98870 | /* VPSLLQZ256mik */ |
| 98871 | 56536, |
| 98872 | /* VPSLLQZ256mikz */ |
| 98873 | 56541, |
| 98874 | /* VPSLLQZ256ri */ |
| 98875 | 56545, |
| 98876 | /* VPSLLQZ256rik */ |
| 98877 | 56548, |
| 98878 | /* VPSLLQZ256rikz */ |
| 98879 | 56553, |
| 98880 | /* VPSLLQZ256rm */ |
| 98881 | 56557, |
| 98882 | /* VPSLLQZ256rmk */ |
| 98883 | 56560, |
| 98884 | /* VPSLLQZ256rmkz */ |
| 98885 | 56565, |
| 98886 | /* VPSLLQZ256rr */ |
| 98887 | 56569, |
| 98888 | /* VPSLLQZ256rrk */ |
| 98889 | 56572, |
| 98890 | /* VPSLLQZ256rrkz */ |
| 98891 | 56577, |
| 98892 | /* VPSLLQZmbi */ |
| 98893 | 56581, |
| 98894 | /* VPSLLQZmbik */ |
| 98895 | 56584, |
| 98896 | /* VPSLLQZmbikz */ |
| 98897 | 56589, |
| 98898 | /* VPSLLQZmi */ |
| 98899 | 56593, |
| 98900 | /* VPSLLQZmik */ |
| 98901 | 56596, |
| 98902 | /* VPSLLQZmikz */ |
| 98903 | 56601, |
| 98904 | /* VPSLLQZri */ |
| 98905 | 56605, |
| 98906 | /* VPSLLQZrik */ |
| 98907 | 56608, |
| 98908 | /* VPSLLQZrikz */ |
| 98909 | 56613, |
| 98910 | /* VPSLLQZrm */ |
| 98911 | 56617, |
| 98912 | /* VPSLLQZrmk */ |
| 98913 | 56620, |
| 98914 | /* VPSLLQZrmkz */ |
| 98915 | 56625, |
| 98916 | /* VPSLLQZrr */ |
| 98917 | 56629, |
| 98918 | /* VPSLLQZrrk */ |
| 98919 | 56632, |
| 98920 | /* VPSLLQZrrkz */ |
| 98921 | 56637, |
| 98922 | /* VPSLLQri */ |
| 98923 | 56641, |
| 98924 | /* VPSLLQrm */ |
| 98925 | 56644, |
| 98926 | /* VPSLLQrr */ |
| 98927 | 56647, |
| 98928 | /* VPSLLVDYrm */ |
| 98929 | 56650, |
| 98930 | /* VPSLLVDYrr */ |
| 98931 | 56653, |
| 98932 | /* VPSLLVDZ128rm */ |
| 98933 | 56656, |
| 98934 | /* VPSLLVDZ128rmb */ |
| 98935 | 56659, |
| 98936 | /* VPSLLVDZ128rmbk */ |
| 98937 | 56662, |
| 98938 | /* VPSLLVDZ128rmbkz */ |
| 98939 | 56667, |
| 98940 | /* VPSLLVDZ128rmk */ |
| 98941 | 56671, |
| 98942 | /* VPSLLVDZ128rmkz */ |
| 98943 | 56676, |
| 98944 | /* VPSLLVDZ128rr */ |
| 98945 | 56680, |
| 98946 | /* VPSLLVDZ128rrk */ |
| 98947 | 56683, |
| 98948 | /* VPSLLVDZ128rrkz */ |
| 98949 | 56688, |
| 98950 | /* VPSLLVDZ256rm */ |
| 98951 | 56692, |
| 98952 | /* VPSLLVDZ256rmb */ |
| 98953 | 56695, |
| 98954 | /* VPSLLVDZ256rmbk */ |
| 98955 | 56698, |
| 98956 | /* VPSLLVDZ256rmbkz */ |
| 98957 | 56703, |
| 98958 | /* VPSLLVDZ256rmk */ |
| 98959 | 56707, |
| 98960 | /* VPSLLVDZ256rmkz */ |
| 98961 | 56712, |
| 98962 | /* VPSLLVDZ256rr */ |
| 98963 | 56716, |
| 98964 | /* VPSLLVDZ256rrk */ |
| 98965 | 56719, |
| 98966 | /* VPSLLVDZ256rrkz */ |
| 98967 | 56724, |
| 98968 | /* VPSLLVDZrm */ |
| 98969 | 56728, |
| 98970 | /* VPSLLVDZrmb */ |
| 98971 | 56731, |
| 98972 | /* VPSLLVDZrmbk */ |
| 98973 | 56734, |
| 98974 | /* VPSLLVDZrmbkz */ |
| 98975 | 56739, |
| 98976 | /* VPSLLVDZrmk */ |
| 98977 | 56743, |
| 98978 | /* VPSLLVDZrmkz */ |
| 98979 | 56748, |
| 98980 | /* VPSLLVDZrr */ |
| 98981 | 56752, |
| 98982 | /* VPSLLVDZrrk */ |
| 98983 | 56755, |
| 98984 | /* VPSLLVDZrrkz */ |
| 98985 | 56760, |
| 98986 | /* VPSLLVDrm */ |
| 98987 | 56764, |
| 98988 | /* VPSLLVDrr */ |
| 98989 | 56767, |
| 98990 | /* VPSLLVQYrm */ |
| 98991 | 56770, |
| 98992 | /* VPSLLVQYrr */ |
| 98993 | 56773, |
| 98994 | /* VPSLLVQZ128rm */ |
| 98995 | 56776, |
| 98996 | /* VPSLLVQZ128rmb */ |
| 98997 | 56779, |
| 98998 | /* VPSLLVQZ128rmbk */ |
| 98999 | 56782, |
| 99000 | /* VPSLLVQZ128rmbkz */ |
| 99001 | 56787, |
| 99002 | /* VPSLLVQZ128rmk */ |
| 99003 | 56791, |
| 99004 | /* VPSLLVQZ128rmkz */ |
| 99005 | 56796, |
| 99006 | /* VPSLLVQZ128rr */ |
| 99007 | 56800, |
| 99008 | /* VPSLLVQZ128rrk */ |
| 99009 | 56803, |
| 99010 | /* VPSLLVQZ128rrkz */ |
| 99011 | 56808, |
| 99012 | /* VPSLLVQZ256rm */ |
| 99013 | 56812, |
| 99014 | /* VPSLLVQZ256rmb */ |
| 99015 | 56815, |
| 99016 | /* VPSLLVQZ256rmbk */ |
| 99017 | 56818, |
| 99018 | /* VPSLLVQZ256rmbkz */ |
| 99019 | 56823, |
| 99020 | /* VPSLLVQZ256rmk */ |
| 99021 | 56827, |
| 99022 | /* VPSLLVQZ256rmkz */ |
| 99023 | 56832, |
| 99024 | /* VPSLLVQZ256rr */ |
| 99025 | 56836, |
| 99026 | /* VPSLLVQZ256rrk */ |
| 99027 | 56839, |
| 99028 | /* VPSLLVQZ256rrkz */ |
| 99029 | 56844, |
| 99030 | /* VPSLLVQZrm */ |
| 99031 | 56848, |
| 99032 | /* VPSLLVQZrmb */ |
| 99033 | 56851, |
| 99034 | /* VPSLLVQZrmbk */ |
| 99035 | 56854, |
| 99036 | /* VPSLLVQZrmbkz */ |
| 99037 | 56859, |
| 99038 | /* VPSLLVQZrmk */ |
| 99039 | 56863, |
| 99040 | /* VPSLLVQZrmkz */ |
| 99041 | 56868, |
| 99042 | /* VPSLLVQZrr */ |
| 99043 | 56872, |
| 99044 | /* VPSLLVQZrrk */ |
| 99045 | 56875, |
| 99046 | /* VPSLLVQZrrkz */ |
| 99047 | 56880, |
| 99048 | /* VPSLLVQrm */ |
| 99049 | 56884, |
| 99050 | /* VPSLLVQrr */ |
| 99051 | 56887, |
| 99052 | /* VPSLLVWZ128rm */ |
| 99053 | 56890, |
| 99054 | /* VPSLLVWZ128rmk */ |
| 99055 | 56893, |
| 99056 | /* VPSLLVWZ128rmkz */ |
| 99057 | 56898, |
| 99058 | /* VPSLLVWZ128rr */ |
| 99059 | 56902, |
| 99060 | /* VPSLLVWZ128rrk */ |
| 99061 | 56905, |
| 99062 | /* VPSLLVWZ128rrkz */ |
| 99063 | 56910, |
| 99064 | /* VPSLLVWZ256rm */ |
| 99065 | 56914, |
| 99066 | /* VPSLLVWZ256rmk */ |
| 99067 | 56917, |
| 99068 | /* VPSLLVWZ256rmkz */ |
| 99069 | 56922, |
| 99070 | /* VPSLLVWZ256rr */ |
| 99071 | 56926, |
| 99072 | /* VPSLLVWZ256rrk */ |
| 99073 | 56929, |
| 99074 | /* VPSLLVWZ256rrkz */ |
| 99075 | 56934, |
| 99076 | /* VPSLLVWZrm */ |
| 99077 | 56938, |
| 99078 | /* VPSLLVWZrmk */ |
| 99079 | 56941, |
| 99080 | /* VPSLLVWZrmkz */ |
| 99081 | 56946, |
| 99082 | /* VPSLLVWZrr */ |
| 99083 | 56950, |
| 99084 | /* VPSLLVWZrrk */ |
| 99085 | 56953, |
| 99086 | /* VPSLLVWZrrkz */ |
| 99087 | 56958, |
| 99088 | /* VPSLLWYri */ |
| 99089 | 56962, |
| 99090 | /* VPSLLWYrm */ |
| 99091 | 56965, |
| 99092 | /* VPSLLWYrr */ |
| 99093 | 56968, |
| 99094 | /* VPSLLWZ128mi */ |
| 99095 | 56971, |
| 99096 | /* VPSLLWZ128mik */ |
| 99097 | 56974, |
| 99098 | /* VPSLLWZ128mikz */ |
| 99099 | 56979, |
| 99100 | /* VPSLLWZ128ri */ |
| 99101 | 56983, |
| 99102 | /* VPSLLWZ128rik */ |
| 99103 | 56986, |
| 99104 | /* VPSLLWZ128rikz */ |
| 99105 | 56991, |
| 99106 | /* VPSLLWZ128rm */ |
| 99107 | 56995, |
| 99108 | /* VPSLLWZ128rmk */ |
| 99109 | 56998, |
| 99110 | /* VPSLLWZ128rmkz */ |
| 99111 | 57003, |
| 99112 | /* VPSLLWZ128rr */ |
| 99113 | 57007, |
| 99114 | /* VPSLLWZ128rrk */ |
| 99115 | 57010, |
| 99116 | /* VPSLLWZ128rrkz */ |
| 99117 | 57015, |
| 99118 | /* VPSLLWZ256mi */ |
| 99119 | 57019, |
| 99120 | /* VPSLLWZ256mik */ |
| 99121 | 57022, |
| 99122 | /* VPSLLWZ256mikz */ |
| 99123 | 57027, |
| 99124 | /* VPSLLWZ256ri */ |
| 99125 | 57031, |
| 99126 | /* VPSLLWZ256rik */ |
| 99127 | 57034, |
| 99128 | /* VPSLLWZ256rikz */ |
| 99129 | 57039, |
| 99130 | /* VPSLLWZ256rm */ |
| 99131 | 57043, |
| 99132 | /* VPSLLWZ256rmk */ |
| 99133 | 57046, |
| 99134 | /* VPSLLWZ256rmkz */ |
| 99135 | 57051, |
| 99136 | /* VPSLLWZ256rr */ |
| 99137 | 57055, |
| 99138 | /* VPSLLWZ256rrk */ |
| 99139 | 57058, |
| 99140 | /* VPSLLWZ256rrkz */ |
| 99141 | 57063, |
| 99142 | /* VPSLLWZmi */ |
| 99143 | 57067, |
| 99144 | /* VPSLLWZmik */ |
| 99145 | 57070, |
| 99146 | /* VPSLLWZmikz */ |
| 99147 | 57075, |
| 99148 | /* VPSLLWZri */ |
| 99149 | 57079, |
| 99150 | /* VPSLLWZrik */ |
| 99151 | 57082, |
| 99152 | /* VPSLLWZrikz */ |
| 99153 | 57087, |
| 99154 | /* VPSLLWZrm */ |
| 99155 | 57091, |
| 99156 | /* VPSLLWZrmk */ |
| 99157 | 57094, |
| 99158 | /* VPSLLWZrmkz */ |
| 99159 | 57099, |
| 99160 | /* VPSLLWZrr */ |
| 99161 | 57103, |
| 99162 | /* VPSLLWZrrk */ |
| 99163 | 57106, |
| 99164 | /* VPSLLWZrrkz */ |
| 99165 | 57111, |
| 99166 | /* VPSLLWri */ |
| 99167 | 57115, |
| 99168 | /* VPSLLWrm */ |
| 99169 | 57118, |
| 99170 | /* VPSLLWrr */ |
| 99171 | 57121, |
| 99172 | /* VPSRADYri */ |
| 99173 | 57124, |
| 99174 | /* VPSRADYrm */ |
| 99175 | 57127, |
| 99176 | /* VPSRADYrr */ |
| 99177 | 57130, |
| 99178 | /* VPSRADZ128mbi */ |
| 99179 | 57133, |
| 99180 | /* VPSRADZ128mbik */ |
| 99181 | 57136, |
| 99182 | /* VPSRADZ128mbikz */ |
| 99183 | 57141, |
| 99184 | /* VPSRADZ128mi */ |
| 99185 | 57145, |
| 99186 | /* VPSRADZ128mik */ |
| 99187 | 57148, |
| 99188 | /* VPSRADZ128mikz */ |
| 99189 | 57153, |
| 99190 | /* VPSRADZ128ri */ |
| 99191 | 57157, |
| 99192 | /* VPSRADZ128rik */ |
| 99193 | 57160, |
| 99194 | /* VPSRADZ128rikz */ |
| 99195 | 57165, |
| 99196 | /* VPSRADZ128rm */ |
| 99197 | 57169, |
| 99198 | /* VPSRADZ128rmk */ |
| 99199 | 57172, |
| 99200 | /* VPSRADZ128rmkz */ |
| 99201 | 57177, |
| 99202 | /* VPSRADZ128rr */ |
| 99203 | 57181, |
| 99204 | /* VPSRADZ128rrk */ |
| 99205 | 57184, |
| 99206 | /* VPSRADZ128rrkz */ |
| 99207 | 57189, |
| 99208 | /* VPSRADZ256mbi */ |
| 99209 | 57193, |
| 99210 | /* VPSRADZ256mbik */ |
| 99211 | 57196, |
| 99212 | /* VPSRADZ256mbikz */ |
| 99213 | 57201, |
| 99214 | /* VPSRADZ256mi */ |
| 99215 | 57205, |
| 99216 | /* VPSRADZ256mik */ |
| 99217 | 57208, |
| 99218 | /* VPSRADZ256mikz */ |
| 99219 | 57213, |
| 99220 | /* VPSRADZ256ri */ |
| 99221 | 57217, |
| 99222 | /* VPSRADZ256rik */ |
| 99223 | 57220, |
| 99224 | /* VPSRADZ256rikz */ |
| 99225 | 57225, |
| 99226 | /* VPSRADZ256rm */ |
| 99227 | 57229, |
| 99228 | /* VPSRADZ256rmk */ |
| 99229 | 57232, |
| 99230 | /* VPSRADZ256rmkz */ |
| 99231 | 57237, |
| 99232 | /* VPSRADZ256rr */ |
| 99233 | 57241, |
| 99234 | /* VPSRADZ256rrk */ |
| 99235 | 57244, |
| 99236 | /* VPSRADZ256rrkz */ |
| 99237 | 57249, |
| 99238 | /* VPSRADZmbi */ |
| 99239 | 57253, |
| 99240 | /* VPSRADZmbik */ |
| 99241 | 57256, |
| 99242 | /* VPSRADZmbikz */ |
| 99243 | 57261, |
| 99244 | /* VPSRADZmi */ |
| 99245 | 57265, |
| 99246 | /* VPSRADZmik */ |
| 99247 | 57268, |
| 99248 | /* VPSRADZmikz */ |
| 99249 | 57273, |
| 99250 | /* VPSRADZri */ |
| 99251 | 57277, |
| 99252 | /* VPSRADZrik */ |
| 99253 | 57280, |
| 99254 | /* VPSRADZrikz */ |
| 99255 | 57285, |
| 99256 | /* VPSRADZrm */ |
| 99257 | 57289, |
| 99258 | /* VPSRADZrmk */ |
| 99259 | 57292, |
| 99260 | /* VPSRADZrmkz */ |
| 99261 | 57297, |
| 99262 | /* VPSRADZrr */ |
| 99263 | 57301, |
| 99264 | /* VPSRADZrrk */ |
| 99265 | 57304, |
| 99266 | /* VPSRADZrrkz */ |
| 99267 | 57309, |
| 99268 | /* VPSRADri */ |
| 99269 | 57313, |
| 99270 | /* VPSRADrm */ |
| 99271 | 57316, |
| 99272 | /* VPSRADrr */ |
| 99273 | 57319, |
| 99274 | /* VPSRAQZ128mbi */ |
| 99275 | 57322, |
| 99276 | /* VPSRAQZ128mbik */ |
| 99277 | 57325, |
| 99278 | /* VPSRAQZ128mbikz */ |
| 99279 | 57330, |
| 99280 | /* VPSRAQZ128mi */ |
| 99281 | 57334, |
| 99282 | /* VPSRAQZ128mik */ |
| 99283 | 57337, |
| 99284 | /* VPSRAQZ128mikz */ |
| 99285 | 57342, |
| 99286 | /* VPSRAQZ128ri */ |
| 99287 | 57346, |
| 99288 | /* VPSRAQZ128rik */ |
| 99289 | 57349, |
| 99290 | /* VPSRAQZ128rikz */ |
| 99291 | 57354, |
| 99292 | /* VPSRAQZ128rm */ |
| 99293 | 57358, |
| 99294 | /* VPSRAQZ128rmk */ |
| 99295 | 57361, |
| 99296 | /* VPSRAQZ128rmkz */ |
| 99297 | 57366, |
| 99298 | /* VPSRAQZ128rr */ |
| 99299 | 57370, |
| 99300 | /* VPSRAQZ128rrk */ |
| 99301 | 57373, |
| 99302 | /* VPSRAQZ128rrkz */ |
| 99303 | 57378, |
| 99304 | /* VPSRAQZ256mbi */ |
| 99305 | 57382, |
| 99306 | /* VPSRAQZ256mbik */ |
| 99307 | 57385, |
| 99308 | /* VPSRAQZ256mbikz */ |
| 99309 | 57390, |
| 99310 | /* VPSRAQZ256mi */ |
| 99311 | 57394, |
| 99312 | /* VPSRAQZ256mik */ |
| 99313 | 57397, |
| 99314 | /* VPSRAQZ256mikz */ |
| 99315 | 57402, |
| 99316 | /* VPSRAQZ256ri */ |
| 99317 | 57406, |
| 99318 | /* VPSRAQZ256rik */ |
| 99319 | 57409, |
| 99320 | /* VPSRAQZ256rikz */ |
| 99321 | 57414, |
| 99322 | /* VPSRAQZ256rm */ |
| 99323 | 57418, |
| 99324 | /* VPSRAQZ256rmk */ |
| 99325 | 57421, |
| 99326 | /* VPSRAQZ256rmkz */ |
| 99327 | 57426, |
| 99328 | /* VPSRAQZ256rr */ |
| 99329 | 57430, |
| 99330 | /* VPSRAQZ256rrk */ |
| 99331 | 57433, |
| 99332 | /* VPSRAQZ256rrkz */ |
| 99333 | 57438, |
| 99334 | /* VPSRAQZmbi */ |
| 99335 | 57442, |
| 99336 | /* VPSRAQZmbik */ |
| 99337 | 57445, |
| 99338 | /* VPSRAQZmbikz */ |
| 99339 | 57450, |
| 99340 | /* VPSRAQZmi */ |
| 99341 | 57454, |
| 99342 | /* VPSRAQZmik */ |
| 99343 | 57457, |
| 99344 | /* VPSRAQZmikz */ |
| 99345 | 57462, |
| 99346 | /* VPSRAQZri */ |
| 99347 | 57466, |
| 99348 | /* VPSRAQZrik */ |
| 99349 | 57469, |
| 99350 | /* VPSRAQZrikz */ |
| 99351 | 57474, |
| 99352 | /* VPSRAQZrm */ |
| 99353 | 57478, |
| 99354 | /* VPSRAQZrmk */ |
| 99355 | 57481, |
| 99356 | /* VPSRAQZrmkz */ |
| 99357 | 57486, |
| 99358 | /* VPSRAQZrr */ |
| 99359 | 57490, |
| 99360 | /* VPSRAQZrrk */ |
| 99361 | 57493, |
| 99362 | /* VPSRAQZrrkz */ |
| 99363 | 57498, |
| 99364 | /* VPSRAVDYrm */ |
| 99365 | 57502, |
| 99366 | /* VPSRAVDYrr */ |
| 99367 | 57505, |
| 99368 | /* VPSRAVDZ128rm */ |
| 99369 | 57508, |
| 99370 | /* VPSRAVDZ128rmb */ |
| 99371 | 57511, |
| 99372 | /* VPSRAVDZ128rmbk */ |
| 99373 | 57514, |
| 99374 | /* VPSRAVDZ128rmbkz */ |
| 99375 | 57519, |
| 99376 | /* VPSRAVDZ128rmk */ |
| 99377 | 57523, |
| 99378 | /* VPSRAVDZ128rmkz */ |
| 99379 | 57528, |
| 99380 | /* VPSRAVDZ128rr */ |
| 99381 | 57532, |
| 99382 | /* VPSRAVDZ128rrk */ |
| 99383 | 57535, |
| 99384 | /* VPSRAVDZ128rrkz */ |
| 99385 | 57540, |
| 99386 | /* VPSRAVDZ256rm */ |
| 99387 | 57544, |
| 99388 | /* VPSRAVDZ256rmb */ |
| 99389 | 57547, |
| 99390 | /* VPSRAVDZ256rmbk */ |
| 99391 | 57550, |
| 99392 | /* VPSRAVDZ256rmbkz */ |
| 99393 | 57555, |
| 99394 | /* VPSRAVDZ256rmk */ |
| 99395 | 57559, |
| 99396 | /* VPSRAVDZ256rmkz */ |
| 99397 | 57564, |
| 99398 | /* VPSRAVDZ256rr */ |
| 99399 | 57568, |
| 99400 | /* VPSRAVDZ256rrk */ |
| 99401 | 57571, |
| 99402 | /* VPSRAVDZ256rrkz */ |
| 99403 | 57576, |
| 99404 | /* VPSRAVDZrm */ |
| 99405 | 57580, |
| 99406 | /* VPSRAVDZrmb */ |
| 99407 | 57583, |
| 99408 | /* VPSRAVDZrmbk */ |
| 99409 | 57586, |
| 99410 | /* VPSRAVDZrmbkz */ |
| 99411 | 57591, |
| 99412 | /* VPSRAVDZrmk */ |
| 99413 | 57595, |
| 99414 | /* VPSRAVDZrmkz */ |
| 99415 | 57600, |
| 99416 | /* VPSRAVDZrr */ |
| 99417 | 57604, |
| 99418 | /* VPSRAVDZrrk */ |
| 99419 | 57607, |
| 99420 | /* VPSRAVDZrrkz */ |
| 99421 | 57612, |
| 99422 | /* VPSRAVDrm */ |
| 99423 | 57616, |
| 99424 | /* VPSRAVDrr */ |
| 99425 | 57619, |
| 99426 | /* VPSRAVQZ128rm */ |
| 99427 | 57622, |
| 99428 | /* VPSRAVQZ128rmb */ |
| 99429 | 57625, |
| 99430 | /* VPSRAVQZ128rmbk */ |
| 99431 | 57628, |
| 99432 | /* VPSRAVQZ128rmbkz */ |
| 99433 | 57633, |
| 99434 | /* VPSRAVQZ128rmk */ |
| 99435 | 57637, |
| 99436 | /* VPSRAVQZ128rmkz */ |
| 99437 | 57642, |
| 99438 | /* VPSRAVQZ128rr */ |
| 99439 | 57646, |
| 99440 | /* VPSRAVQZ128rrk */ |
| 99441 | 57649, |
| 99442 | /* VPSRAVQZ128rrkz */ |
| 99443 | 57654, |
| 99444 | /* VPSRAVQZ256rm */ |
| 99445 | 57658, |
| 99446 | /* VPSRAVQZ256rmb */ |
| 99447 | 57661, |
| 99448 | /* VPSRAVQZ256rmbk */ |
| 99449 | 57664, |
| 99450 | /* VPSRAVQZ256rmbkz */ |
| 99451 | 57669, |
| 99452 | /* VPSRAVQZ256rmk */ |
| 99453 | 57673, |
| 99454 | /* VPSRAVQZ256rmkz */ |
| 99455 | 57678, |
| 99456 | /* VPSRAVQZ256rr */ |
| 99457 | 57682, |
| 99458 | /* VPSRAVQZ256rrk */ |
| 99459 | 57685, |
| 99460 | /* VPSRAVQZ256rrkz */ |
| 99461 | 57690, |
| 99462 | /* VPSRAVQZrm */ |
| 99463 | 57694, |
| 99464 | /* VPSRAVQZrmb */ |
| 99465 | 57697, |
| 99466 | /* VPSRAVQZrmbk */ |
| 99467 | 57700, |
| 99468 | /* VPSRAVQZrmbkz */ |
| 99469 | 57705, |
| 99470 | /* VPSRAVQZrmk */ |
| 99471 | 57709, |
| 99472 | /* VPSRAVQZrmkz */ |
| 99473 | 57714, |
| 99474 | /* VPSRAVQZrr */ |
| 99475 | 57718, |
| 99476 | /* VPSRAVQZrrk */ |
| 99477 | 57721, |
| 99478 | /* VPSRAVQZrrkz */ |
| 99479 | 57726, |
| 99480 | /* VPSRAVWZ128rm */ |
| 99481 | 57730, |
| 99482 | /* VPSRAVWZ128rmk */ |
| 99483 | 57733, |
| 99484 | /* VPSRAVWZ128rmkz */ |
| 99485 | 57738, |
| 99486 | /* VPSRAVWZ128rr */ |
| 99487 | 57742, |
| 99488 | /* VPSRAVWZ128rrk */ |
| 99489 | 57745, |
| 99490 | /* VPSRAVWZ128rrkz */ |
| 99491 | 57750, |
| 99492 | /* VPSRAVWZ256rm */ |
| 99493 | 57754, |
| 99494 | /* VPSRAVWZ256rmk */ |
| 99495 | 57757, |
| 99496 | /* VPSRAVWZ256rmkz */ |
| 99497 | 57762, |
| 99498 | /* VPSRAVWZ256rr */ |
| 99499 | 57766, |
| 99500 | /* VPSRAVWZ256rrk */ |
| 99501 | 57769, |
| 99502 | /* VPSRAVWZ256rrkz */ |
| 99503 | 57774, |
| 99504 | /* VPSRAVWZrm */ |
| 99505 | 57778, |
| 99506 | /* VPSRAVWZrmk */ |
| 99507 | 57781, |
| 99508 | /* VPSRAVWZrmkz */ |
| 99509 | 57786, |
| 99510 | /* VPSRAVWZrr */ |
| 99511 | 57790, |
| 99512 | /* VPSRAVWZrrk */ |
| 99513 | 57793, |
| 99514 | /* VPSRAVWZrrkz */ |
| 99515 | 57798, |
| 99516 | /* VPSRAWYri */ |
| 99517 | 57802, |
| 99518 | /* VPSRAWYrm */ |
| 99519 | 57805, |
| 99520 | /* VPSRAWYrr */ |
| 99521 | 57808, |
| 99522 | /* VPSRAWZ128mi */ |
| 99523 | 57811, |
| 99524 | /* VPSRAWZ128mik */ |
| 99525 | 57814, |
| 99526 | /* VPSRAWZ128mikz */ |
| 99527 | 57819, |
| 99528 | /* VPSRAWZ128ri */ |
| 99529 | 57823, |
| 99530 | /* VPSRAWZ128rik */ |
| 99531 | 57826, |
| 99532 | /* VPSRAWZ128rikz */ |
| 99533 | 57831, |
| 99534 | /* VPSRAWZ128rm */ |
| 99535 | 57835, |
| 99536 | /* VPSRAWZ128rmk */ |
| 99537 | 57838, |
| 99538 | /* VPSRAWZ128rmkz */ |
| 99539 | 57843, |
| 99540 | /* VPSRAWZ128rr */ |
| 99541 | 57847, |
| 99542 | /* VPSRAWZ128rrk */ |
| 99543 | 57850, |
| 99544 | /* VPSRAWZ128rrkz */ |
| 99545 | 57855, |
| 99546 | /* VPSRAWZ256mi */ |
| 99547 | 57859, |
| 99548 | /* VPSRAWZ256mik */ |
| 99549 | 57862, |
| 99550 | /* VPSRAWZ256mikz */ |
| 99551 | 57867, |
| 99552 | /* VPSRAWZ256ri */ |
| 99553 | 57871, |
| 99554 | /* VPSRAWZ256rik */ |
| 99555 | 57874, |
| 99556 | /* VPSRAWZ256rikz */ |
| 99557 | 57879, |
| 99558 | /* VPSRAWZ256rm */ |
| 99559 | 57883, |
| 99560 | /* VPSRAWZ256rmk */ |
| 99561 | 57886, |
| 99562 | /* VPSRAWZ256rmkz */ |
| 99563 | 57891, |
| 99564 | /* VPSRAWZ256rr */ |
| 99565 | 57895, |
| 99566 | /* VPSRAWZ256rrk */ |
| 99567 | 57898, |
| 99568 | /* VPSRAWZ256rrkz */ |
| 99569 | 57903, |
| 99570 | /* VPSRAWZmi */ |
| 99571 | 57907, |
| 99572 | /* VPSRAWZmik */ |
| 99573 | 57910, |
| 99574 | /* VPSRAWZmikz */ |
| 99575 | 57915, |
| 99576 | /* VPSRAWZri */ |
| 99577 | 57919, |
| 99578 | /* VPSRAWZrik */ |
| 99579 | 57922, |
| 99580 | /* VPSRAWZrikz */ |
| 99581 | 57927, |
| 99582 | /* VPSRAWZrm */ |
| 99583 | 57931, |
| 99584 | /* VPSRAWZrmk */ |
| 99585 | 57934, |
| 99586 | /* VPSRAWZrmkz */ |
| 99587 | 57939, |
| 99588 | /* VPSRAWZrr */ |
| 99589 | 57943, |
| 99590 | /* VPSRAWZrrk */ |
| 99591 | 57946, |
| 99592 | /* VPSRAWZrrkz */ |
| 99593 | 57951, |
| 99594 | /* VPSRAWri */ |
| 99595 | 57955, |
| 99596 | /* VPSRAWrm */ |
| 99597 | 57958, |
| 99598 | /* VPSRAWrr */ |
| 99599 | 57961, |
| 99600 | /* VPSRLDQYri */ |
| 99601 | 57964, |
| 99602 | /* VPSRLDQZ128mi */ |
| 99603 | 57967, |
| 99604 | /* VPSRLDQZ128ri */ |
| 99605 | 57970, |
| 99606 | /* VPSRLDQZ256mi */ |
| 99607 | 57973, |
| 99608 | /* VPSRLDQZ256ri */ |
| 99609 | 57976, |
| 99610 | /* VPSRLDQZmi */ |
| 99611 | 57979, |
| 99612 | /* VPSRLDQZri */ |
| 99613 | 57982, |
| 99614 | /* VPSRLDQri */ |
| 99615 | 57985, |
| 99616 | /* VPSRLDYri */ |
| 99617 | 57988, |
| 99618 | /* VPSRLDYrm */ |
| 99619 | 57991, |
| 99620 | /* VPSRLDYrr */ |
| 99621 | 57994, |
| 99622 | /* VPSRLDZ128mbi */ |
| 99623 | 57997, |
| 99624 | /* VPSRLDZ128mbik */ |
| 99625 | 58000, |
| 99626 | /* VPSRLDZ128mbikz */ |
| 99627 | 58005, |
| 99628 | /* VPSRLDZ128mi */ |
| 99629 | 58009, |
| 99630 | /* VPSRLDZ128mik */ |
| 99631 | 58012, |
| 99632 | /* VPSRLDZ128mikz */ |
| 99633 | 58017, |
| 99634 | /* VPSRLDZ128ri */ |
| 99635 | 58021, |
| 99636 | /* VPSRLDZ128rik */ |
| 99637 | 58024, |
| 99638 | /* VPSRLDZ128rikz */ |
| 99639 | 58029, |
| 99640 | /* VPSRLDZ128rm */ |
| 99641 | 58033, |
| 99642 | /* VPSRLDZ128rmk */ |
| 99643 | 58036, |
| 99644 | /* VPSRLDZ128rmkz */ |
| 99645 | 58041, |
| 99646 | /* VPSRLDZ128rr */ |
| 99647 | 58045, |
| 99648 | /* VPSRLDZ128rrk */ |
| 99649 | 58048, |
| 99650 | /* VPSRLDZ128rrkz */ |
| 99651 | 58053, |
| 99652 | /* VPSRLDZ256mbi */ |
| 99653 | 58057, |
| 99654 | /* VPSRLDZ256mbik */ |
| 99655 | 58060, |
| 99656 | /* VPSRLDZ256mbikz */ |
| 99657 | 58065, |
| 99658 | /* VPSRLDZ256mi */ |
| 99659 | 58069, |
| 99660 | /* VPSRLDZ256mik */ |
| 99661 | 58072, |
| 99662 | /* VPSRLDZ256mikz */ |
| 99663 | 58077, |
| 99664 | /* VPSRLDZ256ri */ |
| 99665 | 58081, |
| 99666 | /* VPSRLDZ256rik */ |
| 99667 | 58084, |
| 99668 | /* VPSRLDZ256rikz */ |
| 99669 | 58089, |
| 99670 | /* VPSRLDZ256rm */ |
| 99671 | 58093, |
| 99672 | /* VPSRLDZ256rmk */ |
| 99673 | 58096, |
| 99674 | /* VPSRLDZ256rmkz */ |
| 99675 | 58101, |
| 99676 | /* VPSRLDZ256rr */ |
| 99677 | 58105, |
| 99678 | /* VPSRLDZ256rrk */ |
| 99679 | 58108, |
| 99680 | /* VPSRLDZ256rrkz */ |
| 99681 | 58113, |
| 99682 | /* VPSRLDZmbi */ |
| 99683 | 58117, |
| 99684 | /* VPSRLDZmbik */ |
| 99685 | 58120, |
| 99686 | /* VPSRLDZmbikz */ |
| 99687 | 58125, |
| 99688 | /* VPSRLDZmi */ |
| 99689 | 58129, |
| 99690 | /* VPSRLDZmik */ |
| 99691 | 58132, |
| 99692 | /* VPSRLDZmikz */ |
| 99693 | 58137, |
| 99694 | /* VPSRLDZri */ |
| 99695 | 58141, |
| 99696 | /* VPSRLDZrik */ |
| 99697 | 58144, |
| 99698 | /* VPSRLDZrikz */ |
| 99699 | 58149, |
| 99700 | /* VPSRLDZrm */ |
| 99701 | 58153, |
| 99702 | /* VPSRLDZrmk */ |
| 99703 | 58156, |
| 99704 | /* VPSRLDZrmkz */ |
| 99705 | 58161, |
| 99706 | /* VPSRLDZrr */ |
| 99707 | 58165, |
| 99708 | /* VPSRLDZrrk */ |
| 99709 | 58168, |
| 99710 | /* VPSRLDZrrkz */ |
| 99711 | 58173, |
| 99712 | /* VPSRLDri */ |
| 99713 | 58177, |
| 99714 | /* VPSRLDrm */ |
| 99715 | 58180, |
| 99716 | /* VPSRLDrr */ |
| 99717 | 58183, |
| 99718 | /* VPSRLQYri */ |
| 99719 | 58186, |
| 99720 | /* VPSRLQYrm */ |
| 99721 | 58189, |
| 99722 | /* VPSRLQYrr */ |
| 99723 | 58192, |
| 99724 | /* VPSRLQZ128mbi */ |
| 99725 | 58195, |
| 99726 | /* VPSRLQZ128mbik */ |
| 99727 | 58198, |
| 99728 | /* VPSRLQZ128mbikz */ |
| 99729 | 58203, |
| 99730 | /* VPSRLQZ128mi */ |
| 99731 | 58207, |
| 99732 | /* VPSRLQZ128mik */ |
| 99733 | 58210, |
| 99734 | /* VPSRLQZ128mikz */ |
| 99735 | 58215, |
| 99736 | /* VPSRLQZ128ri */ |
| 99737 | 58219, |
| 99738 | /* VPSRLQZ128rik */ |
| 99739 | 58222, |
| 99740 | /* VPSRLQZ128rikz */ |
| 99741 | 58227, |
| 99742 | /* VPSRLQZ128rm */ |
| 99743 | 58231, |
| 99744 | /* VPSRLQZ128rmk */ |
| 99745 | 58234, |
| 99746 | /* VPSRLQZ128rmkz */ |
| 99747 | 58239, |
| 99748 | /* VPSRLQZ128rr */ |
| 99749 | 58243, |
| 99750 | /* VPSRLQZ128rrk */ |
| 99751 | 58246, |
| 99752 | /* VPSRLQZ128rrkz */ |
| 99753 | 58251, |
| 99754 | /* VPSRLQZ256mbi */ |
| 99755 | 58255, |
| 99756 | /* VPSRLQZ256mbik */ |
| 99757 | 58258, |
| 99758 | /* VPSRLQZ256mbikz */ |
| 99759 | 58263, |
| 99760 | /* VPSRLQZ256mi */ |
| 99761 | 58267, |
| 99762 | /* VPSRLQZ256mik */ |
| 99763 | 58270, |
| 99764 | /* VPSRLQZ256mikz */ |
| 99765 | 58275, |
| 99766 | /* VPSRLQZ256ri */ |
| 99767 | 58279, |
| 99768 | /* VPSRLQZ256rik */ |
| 99769 | 58282, |
| 99770 | /* VPSRLQZ256rikz */ |
| 99771 | 58287, |
| 99772 | /* VPSRLQZ256rm */ |
| 99773 | 58291, |
| 99774 | /* VPSRLQZ256rmk */ |
| 99775 | 58294, |
| 99776 | /* VPSRLQZ256rmkz */ |
| 99777 | 58299, |
| 99778 | /* VPSRLQZ256rr */ |
| 99779 | 58303, |
| 99780 | /* VPSRLQZ256rrk */ |
| 99781 | 58306, |
| 99782 | /* VPSRLQZ256rrkz */ |
| 99783 | 58311, |
| 99784 | /* VPSRLQZmbi */ |
| 99785 | 58315, |
| 99786 | /* VPSRLQZmbik */ |
| 99787 | 58318, |
| 99788 | /* VPSRLQZmbikz */ |
| 99789 | 58323, |
| 99790 | /* VPSRLQZmi */ |
| 99791 | 58327, |
| 99792 | /* VPSRLQZmik */ |
| 99793 | 58330, |
| 99794 | /* VPSRLQZmikz */ |
| 99795 | 58335, |
| 99796 | /* VPSRLQZri */ |
| 99797 | 58339, |
| 99798 | /* VPSRLQZrik */ |
| 99799 | 58342, |
| 99800 | /* VPSRLQZrikz */ |
| 99801 | 58347, |
| 99802 | /* VPSRLQZrm */ |
| 99803 | 58351, |
| 99804 | /* VPSRLQZrmk */ |
| 99805 | 58354, |
| 99806 | /* VPSRLQZrmkz */ |
| 99807 | 58359, |
| 99808 | /* VPSRLQZrr */ |
| 99809 | 58363, |
| 99810 | /* VPSRLQZrrk */ |
| 99811 | 58366, |
| 99812 | /* VPSRLQZrrkz */ |
| 99813 | 58371, |
| 99814 | /* VPSRLQri */ |
| 99815 | 58375, |
| 99816 | /* VPSRLQrm */ |
| 99817 | 58378, |
| 99818 | /* VPSRLQrr */ |
| 99819 | 58381, |
| 99820 | /* VPSRLVDYrm */ |
| 99821 | 58384, |
| 99822 | /* VPSRLVDYrr */ |
| 99823 | 58387, |
| 99824 | /* VPSRLVDZ128rm */ |
| 99825 | 58390, |
| 99826 | /* VPSRLVDZ128rmb */ |
| 99827 | 58393, |
| 99828 | /* VPSRLVDZ128rmbk */ |
| 99829 | 58396, |
| 99830 | /* VPSRLVDZ128rmbkz */ |
| 99831 | 58401, |
| 99832 | /* VPSRLVDZ128rmk */ |
| 99833 | 58405, |
| 99834 | /* VPSRLVDZ128rmkz */ |
| 99835 | 58410, |
| 99836 | /* VPSRLVDZ128rr */ |
| 99837 | 58414, |
| 99838 | /* VPSRLVDZ128rrk */ |
| 99839 | 58417, |
| 99840 | /* VPSRLVDZ128rrkz */ |
| 99841 | 58422, |
| 99842 | /* VPSRLVDZ256rm */ |
| 99843 | 58426, |
| 99844 | /* VPSRLVDZ256rmb */ |
| 99845 | 58429, |
| 99846 | /* VPSRLVDZ256rmbk */ |
| 99847 | 58432, |
| 99848 | /* VPSRLVDZ256rmbkz */ |
| 99849 | 58437, |
| 99850 | /* VPSRLVDZ256rmk */ |
| 99851 | 58441, |
| 99852 | /* VPSRLVDZ256rmkz */ |
| 99853 | 58446, |
| 99854 | /* VPSRLVDZ256rr */ |
| 99855 | 58450, |
| 99856 | /* VPSRLVDZ256rrk */ |
| 99857 | 58453, |
| 99858 | /* VPSRLVDZ256rrkz */ |
| 99859 | 58458, |
| 99860 | /* VPSRLVDZrm */ |
| 99861 | 58462, |
| 99862 | /* VPSRLVDZrmb */ |
| 99863 | 58465, |
| 99864 | /* VPSRLVDZrmbk */ |
| 99865 | 58468, |
| 99866 | /* VPSRLVDZrmbkz */ |
| 99867 | 58473, |
| 99868 | /* VPSRLVDZrmk */ |
| 99869 | 58477, |
| 99870 | /* VPSRLVDZrmkz */ |
| 99871 | 58482, |
| 99872 | /* VPSRLVDZrr */ |
| 99873 | 58486, |
| 99874 | /* VPSRLVDZrrk */ |
| 99875 | 58489, |
| 99876 | /* VPSRLVDZrrkz */ |
| 99877 | 58494, |
| 99878 | /* VPSRLVDrm */ |
| 99879 | 58498, |
| 99880 | /* VPSRLVDrr */ |
| 99881 | 58501, |
| 99882 | /* VPSRLVQYrm */ |
| 99883 | 58504, |
| 99884 | /* VPSRLVQYrr */ |
| 99885 | 58507, |
| 99886 | /* VPSRLVQZ128rm */ |
| 99887 | 58510, |
| 99888 | /* VPSRLVQZ128rmb */ |
| 99889 | 58513, |
| 99890 | /* VPSRLVQZ128rmbk */ |
| 99891 | 58516, |
| 99892 | /* VPSRLVQZ128rmbkz */ |
| 99893 | 58521, |
| 99894 | /* VPSRLVQZ128rmk */ |
| 99895 | 58525, |
| 99896 | /* VPSRLVQZ128rmkz */ |
| 99897 | 58530, |
| 99898 | /* VPSRLVQZ128rr */ |
| 99899 | 58534, |
| 99900 | /* VPSRLVQZ128rrk */ |
| 99901 | 58537, |
| 99902 | /* VPSRLVQZ128rrkz */ |
| 99903 | 58542, |
| 99904 | /* VPSRLVQZ256rm */ |
| 99905 | 58546, |
| 99906 | /* VPSRLVQZ256rmb */ |
| 99907 | 58549, |
| 99908 | /* VPSRLVQZ256rmbk */ |
| 99909 | 58552, |
| 99910 | /* VPSRLVQZ256rmbkz */ |
| 99911 | 58557, |
| 99912 | /* VPSRLVQZ256rmk */ |
| 99913 | 58561, |
| 99914 | /* VPSRLVQZ256rmkz */ |
| 99915 | 58566, |
| 99916 | /* VPSRLVQZ256rr */ |
| 99917 | 58570, |
| 99918 | /* VPSRLVQZ256rrk */ |
| 99919 | 58573, |
| 99920 | /* VPSRLVQZ256rrkz */ |
| 99921 | 58578, |
| 99922 | /* VPSRLVQZrm */ |
| 99923 | 58582, |
| 99924 | /* VPSRLVQZrmb */ |
| 99925 | 58585, |
| 99926 | /* VPSRLVQZrmbk */ |
| 99927 | 58588, |
| 99928 | /* VPSRLVQZrmbkz */ |
| 99929 | 58593, |
| 99930 | /* VPSRLVQZrmk */ |
| 99931 | 58597, |
| 99932 | /* VPSRLVQZrmkz */ |
| 99933 | 58602, |
| 99934 | /* VPSRLVQZrr */ |
| 99935 | 58606, |
| 99936 | /* VPSRLVQZrrk */ |
| 99937 | 58609, |
| 99938 | /* VPSRLVQZrrkz */ |
| 99939 | 58614, |
| 99940 | /* VPSRLVQrm */ |
| 99941 | 58618, |
| 99942 | /* VPSRLVQrr */ |
| 99943 | 58621, |
| 99944 | /* VPSRLVWZ128rm */ |
| 99945 | 58624, |
| 99946 | /* VPSRLVWZ128rmk */ |
| 99947 | 58627, |
| 99948 | /* VPSRLVWZ128rmkz */ |
| 99949 | 58632, |
| 99950 | /* VPSRLVWZ128rr */ |
| 99951 | 58636, |
| 99952 | /* VPSRLVWZ128rrk */ |
| 99953 | 58639, |
| 99954 | /* VPSRLVWZ128rrkz */ |
| 99955 | 58644, |
| 99956 | /* VPSRLVWZ256rm */ |
| 99957 | 58648, |
| 99958 | /* VPSRLVWZ256rmk */ |
| 99959 | 58651, |
| 99960 | /* VPSRLVWZ256rmkz */ |
| 99961 | 58656, |
| 99962 | /* VPSRLVWZ256rr */ |
| 99963 | 58660, |
| 99964 | /* VPSRLVWZ256rrk */ |
| 99965 | 58663, |
| 99966 | /* VPSRLVWZ256rrkz */ |
| 99967 | 58668, |
| 99968 | /* VPSRLVWZrm */ |
| 99969 | 58672, |
| 99970 | /* VPSRLVWZrmk */ |
| 99971 | 58675, |
| 99972 | /* VPSRLVWZrmkz */ |
| 99973 | 58680, |
| 99974 | /* VPSRLVWZrr */ |
| 99975 | 58684, |
| 99976 | /* VPSRLVWZrrk */ |
| 99977 | 58687, |
| 99978 | /* VPSRLVWZrrkz */ |
| 99979 | 58692, |
| 99980 | /* VPSRLWYri */ |
| 99981 | 58696, |
| 99982 | /* VPSRLWYrm */ |
| 99983 | 58699, |
| 99984 | /* VPSRLWYrr */ |
| 99985 | 58702, |
| 99986 | /* VPSRLWZ128mi */ |
| 99987 | 58705, |
| 99988 | /* VPSRLWZ128mik */ |
| 99989 | 58708, |
| 99990 | /* VPSRLWZ128mikz */ |
| 99991 | 58713, |
| 99992 | /* VPSRLWZ128ri */ |
| 99993 | 58717, |
| 99994 | /* VPSRLWZ128rik */ |
| 99995 | 58720, |
| 99996 | /* VPSRLWZ128rikz */ |
| 99997 | 58725, |
| 99998 | /* VPSRLWZ128rm */ |
| 99999 | 58729, |
| 100000 | /* VPSRLWZ128rmk */ |
| 100001 | 58732, |
| 100002 | /* VPSRLWZ128rmkz */ |
| 100003 | 58737, |
| 100004 | /* VPSRLWZ128rr */ |
| 100005 | 58741, |
| 100006 | /* VPSRLWZ128rrk */ |
| 100007 | 58744, |
| 100008 | /* VPSRLWZ128rrkz */ |
| 100009 | 58749, |
| 100010 | /* VPSRLWZ256mi */ |
| 100011 | 58753, |
| 100012 | /* VPSRLWZ256mik */ |
| 100013 | 58756, |
| 100014 | /* VPSRLWZ256mikz */ |
| 100015 | 58761, |
| 100016 | /* VPSRLWZ256ri */ |
| 100017 | 58765, |
| 100018 | /* VPSRLWZ256rik */ |
| 100019 | 58768, |
| 100020 | /* VPSRLWZ256rikz */ |
| 100021 | 58773, |
| 100022 | /* VPSRLWZ256rm */ |
| 100023 | 58777, |
| 100024 | /* VPSRLWZ256rmk */ |
| 100025 | 58780, |
| 100026 | /* VPSRLWZ256rmkz */ |
| 100027 | 58785, |
| 100028 | /* VPSRLWZ256rr */ |
| 100029 | 58789, |
| 100030 | /* VPSRLWZ256rrk */ |
| 100031 | 58792, |
| 100032 | /* VPSRLWZ256rrkz */ |
| 100033 | 58797, |
| 100034 | /* VPSRLWZmi */ |
| 100035 | 58801, |
| 100036 | /* VPSRLWZmik */ |
| 100037 | 58804, |
| 100038 | /* VPSRLWZmikz */ |
| 100039 | 58809, |
| 100040 | /* VPSRLWZri */ |
| 100041 | 58813, |
| 100042 | /* VPSRLWZrik */ |
| 100043 | 58816, |
| 100044 | /* VPSRLWZrikz */ |
| 100045 | 58821, |
| 100046 | /* VPSRLWZrm */ |
| 100047 | 58825, |
| 100048 | /* VPSRLWZrmk */ |
| 100049 | 58828, |
| 100050 | /* VPSRLWZrmkz */ |
| 100051 | 58833, |
| 100052 | /* VPSRLWZrr */ |
| 100053 | 58837, |
| 100054 | /* VPSRLWZrrk */ |
| 100055 | 58840, |
| 100056 | /* VPSRLWZrrkz */ |
| 100057 | 58845, |
| 100058 | /* VPSRLWri */ |
| 100059 | 58849, |
| 100060 | /* VPSRLWrm */ |
| 100061 | 58852, |
| 100062 | /* VPSRLWrr */ |
| 100063 | 58855, |
| 100064 | /* VPSUBBYrm */ |
| 100065 | 58858, |
| 100066 | /* VPSUBBYrr */ |
| 100067 | 58861, |
| 100068 | /* VPSUBBZ128rm */ |
| 100069 | 58864, |
| 100070 | /* VPSUBBZ128rmk */ |
| 100071 | 58867, |
| 100072 | /* VPSUBBZ128rmkz */ |
| 100073 | 58872, |
| 100074 | /* VPSUBBZ128rr */ |
| 100075 | 58876, |
| 100076 | /* VPSUBBZ128rrk */ |
| 100077 | 58879, |
| 100078 | /* VPSUBBZ128rrkz */ |
| 100079 | 58884, |
| 100080 | /* VPSUBBZ256rm */ |
| 100081 | 58888, |
| 100082 | /* VPSUBBZ256rmk */ |
| 100083 | 58891, |
| 100084 | /* VPSUBBZ256rmkz */ |
| 100085 | 58896, |
| 100086 | /* VPSUBBZ256rr */ |
| 100087 | 58900, |
| 100088 | /* VPSUBBZ256rrk */ |
| 100089 | 58903, |
| 100090 | /* VPSUBBZ256rrkz */ |
| 100091 | 58908, |
| 100092 | /* VPSUBBZrm */ |
| 100093 | 58912, |
| 100094 | /* VPSUBBZrmk */ |
| 100095 | 58915, |
| 100096 | /* VPSUBBZrmkz */ |
| 100097 | 58920, |
| 100098 | /* VPSUBBZrr */ |
| 100099 | 58924, |
| 100100 | /* VPSUBBZrrk */ |
| 100101 | 58927, |
| 100102 | /* VPSUBBZrrkz */ |
| 100103 | 58932, |
| 100104 | /* VPSUBBrm */ |
| 100105 | 58936, |
| 100106 | /* VPSUBBrr */ |
| 100107 | 58939, |
| 100108 | /* VPSUBDYrm */ |
| 100109 | 58942, |
| 100110 | /* VPSUBDYrr */ |
| 100111 | 58945, |
| 100112 | /* VPSUBDZ128rm */ |
| 100113 | 58948, |
| 100114 | /* VPSUBDZ128rmb */ |
| 100115 | 58951, |
| 100116 | /* VPSUBDZ128rmbk */ |
| 100117 | 58954, |
| 100118 | /* VPSUBDZ128rmbkz */ |
| 100119 | 58959, |
| 100120 | /* VPSUBDZ128rmk */ |
| 100121 | 58963, |
| 100122 | /* VPSUBDZ128rmkz */ |
| 100123 | 58968, |
| 100124 | /* VPSUBDZ128rr */ |
| 100125 | 58972, |
| 100126 | /* VPSUBDZ128rrk */ |
| 100127 | 58975, |
| 100128 | /* VPSUBDZ128rrkz */ |
| 100129 | 58980, |
| 100130 | /* VPSUBDZ256rm */ |
| 100131 | 58984, |
| 100132 | /* VPSUBDZ256rmb */ |
| 100133 | 58987, |
| 100134 | /* VPSUBDZ256rmbk */ |
| 100135 | 58990, |
| 100136 | /* VPSUBDZ256rmbkz */ |
| 100137 | 58995, |
| 100138 | /* VPSUBDZ256rmk */ |
| 100139 | 58999, |
| 100140 | /* VPSUBDZ256rmkz */ |
| 100141 | 59004, |
| 100142 | /* VPSUBDZ256rr */ |
| 100143 | 59008, |
| 100144 | /* VPSUBDZ256rrk */ |
| 100145 | 59011, |
| 100146 | /* VPSUBDZ256rrkz */ |
| 100147 | 59016, |
| 100148 | /* VPSUBDZrm */ |
| 100149 | 59020, |
| 100150 | /* VPSUBDZrmb */ |
| 100151 | 59023, |
| 100152 | /* VPSUBDZrmbk */ |
| 100153 | 59026, |
| 100154 | /* VPSUBDZrmbkz */ |
| 100155 | 59031, |
| 100156 | /* VPSUBDZrmk */ |
| 100157 | 59035, |
| 100158 | /* VPSUBDZrmkz */ |
| 100159 | 59040, |
| 100160 | /* VPSUBDZrr */ |
| 100161 | 59044, |
| 100162 | /* VPSUBDZrrk */ |
| 100163 | 59047, |
| 100164 | /* VPSUBDZrrkz */ |
| 100165 | 59052, |
| 100166 | /* VPSUBDrm */ |
| 100167 | 59056, |
| 100168 | /* VPSUBDrr */ |
| 100169 | 59059, |
| 100170 | /* VPSUBQYrm */ |
| 100171 | 59062, |
| 100172 | /* VPSUBQYrr */ |
| 100173 | 59065, |
| 100174 | /* VPSUBQZ128rm */ |
| 100175 | 59068, |
| 100176 | /* VPSUBQZ128rmb */ |
| 100177 | 59071, |
| 100178 | /* VPSUBQZ128rmbk */ |
| 100179 | 59074, |
| 100180 | /* VPSUBQZ128rmbkz */ |
| 100181 | 59079, |
| 100182 | /* VPSUBQZ128rmk */ |
| 100183 | 59083, |
| 100184 | /* VPSUBQZ128rmkz */ |
| 100185 | 59088, |
| 100186 | /* VPSUBQZ128rr */ |
| 100187 | 59092, |
| 100188 | /* VPSUBQZ128rrk */ |
| 100189 | 59095, |
| 100190 | /* VPSUBQZ128rrkz */ |
| 100191 | 59100, |
| 100192 | /* VPSUBQZ256rm */ |
| 100193 | 59104, |
| 100194 | /* VPSUBQZ256rmb */ |
| 100195 | 59107, |
| 100196 | /* VPSUBQZ256rmbk */ |
| 100197 | 59110, |
| 100198 | /* VPSUBQZ256rmbkz */ |
| 100199 | 59115, |
| 100200 | /* VPSUBQZ256rmk */ |
| 100201 | 59119, |
| 100202 | /* VPSUBQZ256rmkz */ |
| 100203 | 59124, |
| 100204 | /* VPSUBQZ256rr */ |
| 100205 | 59128, |
| 100206 | /* VPSUBQZ256rrk */ |
| 100207 | 59131, |
| 100208 | /* VPSUBQZ256rrkz */ |
| 100209 | 59136, |
| 100210 | /* VPSUBQZrm */ |
| 100211 | 59140, |
| 100212 | /* VPSUBQZrmb */ |
| 100213 | 59143, |
| 100214 | /* VPSUBQZrmbk */ |
| 100215 | 59146, |
| 100216 | /* VPSUBQZrmbkz */ |
| 100217 | 59151, |
| 100218 | /* VPSUBQZrmk */ |
| 100219 | 59155, |
| 100220 | /* VPSUBQZrmkz */ |
| 100221 | 59160, |
| 100222 | /* VPSUBQZrr */ |
| 100223 | 59164, |
| 100224 | /* VPSUBQZrrk */ |
| 100225 | 59167, |
| 100226 | /* VPSUBQZrrkz */ |
| 100227 | 59172, |
| 100228 | /* VPSUBQrm */ |
| 100229 | 59176, |
| 100230 | /* VPSUBQrr */ |
| 100231 | 59179, |
| 100232 | /* VPSUBSBYrm */ |
| 100233 | 59182, |
| 100234 | /* VPSUBSBYrr */ |
| 100235 | 59185, |
| 100236 | /* VPSUBSBZ128rm */ |
| 100237 | 59188, |
| 100238 | /* VPSUBSBZ128rmk */ |
| 100239 | 59191, |
| 100240 | /* VPSUBSBZ128rmkz */ |
| 100241 | 59196, |
| 100242 | /* VPSUBSBZ128rr */ |
| 100243 | 59200, |
| 100244 | /* VPSUBSBZ128rrk */ |
| 100245 | 59203, |
| 100246 | /* VPSUBSBZ128rrkz */ |
| 100247 | 59208, |
| 100248 | /* VPSUBSBZ256rm */ |
| 100249 | 59212, |
| 100250 | /* VPSUBSBZ256rmk */ |
| 100251 | 59215, |
| 100252 | /* VPSUBSBZ256rmkz */ |
| 100253 | 59220, |
| 100254 | /* VPSUBSBZ256rr */ |
| 100255 | 59224, |
| 100256 | /* VPSUBSBZ256rrk */ |
| 100257 | 59227, |
| 100258 | /* VPSUBSBZ256rrkz */ |
| 100259 | 59232, |
| 100260 | /* VPSUBSBZrm */ |
| 100261 | 59236, |
| 100262 | /* VPSUBSBZrmk */ |
| 100263 | 59239, |
| 100264 | /* VPSUBSBZrmkz */ |
| 100265 | 59244, |
| 100266 | /* VPSUBSBZrr */ |
| 100267 | 59248, |
| 100268 | /* VPSUBSBZrrk */ |
| 100269 | 59251, |
| 100270 | /* VPSUBSBZrrkz */ |
| 100271 | 59256, |
| 100272 | /* VPSUBSBrm */ |
| 100273 | 59260, |
| 100274 | /* VPSUBSBrr */ |
| 100275 | 59263, |
| 100276 | /* VPSUBSWYrm */ |
| 100277 | 59266, |
| 100278 | /* VPSUBSWYrr */ |
| 100279 | 59269, |
| 100280 | /* VPSUBSWZ128rm */ |
| 100281 | 59272, |
| 100282 | /* VPSUBSWZ128rmk */ |
| 100283 | 59275, |
| 100284 | /* VPSUBSWZ128rmkz */ |
| 100285 | 59280, |
| 100286 | /* VPSUBSWZ128rr */ |
| 100287 | 59284, |
| 100288 | /* VPSUBSWZ128rrk */ |
| 100289 | 59287, |
| 100290 | /* VPSUBSWZ128rrkz */ |
| 100291 | 59292, |
| 100292 | /* VPSUBSWZ256rm */ |
| 100293 | 59296, |
| 100294 | /* VPSUBSWZ256rmk */ |
| 100295 | 59299, |
| 100296 | /* VPSUBSWZ256rmkz */ |
| 100297 | 59304, |
| 100298 | /* VPSUBSWZ256rr */ |
| 100299 | 59308, |
| 100300 | /* VPSUBSWZ256rrk */ |
| 100301 | 59311, |
| 100302 | /* VPSUBSWZ256rrkz */ |
| 100303 | 59316, |
| 100304 | /* VPSUBSWZrm */ |
| 100305 | 59320, |
| 100306 | /* VPSUBSWZrmk */ |
| 100307 | 59323, |
| 100308 | /* VPSUBSWZrmkz */ |
| 100309 | 59328, |
| 100310 | /* VPSUBSWZrr */ |
| 100311 | 59332, |
| 100312 | /* VPSUBSWZrrk */ |
| 100313 | 59335, |
| 100314 | /* VPSUBSWZrrkz */ |
| 100315 | 59340, |
| 100316 | /* VPSUBSWrm */ |
| 100317 | 59344, |
| 100318 | /* VPSUBSWrr */ |
| 100319 | 59347, |
| 100320 | /* VPSUBUSBYrm */ |
| 100321 | 59350, |
| 100322 | /* VPSUBUSBYrr */ |
| 100323 | 59353, |
| 100324 | /* VPSUBUSBZ128rm */ |
| 100325 | 59356, |
| 100326 | /* VPSUBUSBZ128rmk */ |
| 100327 | 59359, |
| 100328 | /* VPSUBUSBZ128rmkz */ |
| 100329 | 59364, |
| 100330 | /* VPSUBUSBZ128rr */ |
| 100331 | 59368, |
| 100332 | /* VPSUBUSBZ128rrk */ |
| 100333 | 59371, |
| 100334 | /* VPSUBUSBZ128rrkz */ |
| 100335 | 59376, |
| 100336 | /* VPSUBUSBZ256rm */ |
| 100337 | 59380, |
| 100338 | /* VPSUBUSBZ256rmk */ |
| 100339 | 59383, |
| 100340 | /* VPSUBUSBZ256rmkz */ |
| 100341 | 59388, |
| 100342 | /* VPSUBUSBZ256rr */ |
| 100343 | 59392, |
| 100344 | /* VPSUBUSBZ256rrk */ |
| 100345 | 59395, |
| 100346 | /* VPSUBUSBZ256rrkz */ |
| 100347 | 59400, |
| 100348 | /* VPSUBUSBZrm */ |
| 100349 | 59404, |
| 100350 | /* VPSUBUSBZrmk */ |
| 100351 | 59407, |
| 100352 | /* VPSUBUSBZrmkz */ |
| 100353 | 59412, |
| 100354 | /* VPSUBUSBZrr */ |
| 100355 | 59416, |
| 100356 | /* VPSUBUSBZrrk */ |
| 100357 | 59419, |
| 100358 | /* VPSUBUSBZrrkz */ |
| 100359 | 59424, |
| 100360 | /* VPSUBUSBrm */ |
| 100361 | 59428, |
| 100362 | /* VPSUBUSBrr */ |
| 100363 | 59431, |
| 100364 | /* VPSUBUSWYrm */ |
| 100365 | 59434, |
| 100366 | /* VPSUBUSWYrr */ |
| 100367 | 59437, |
| 100368 | /* VPSUBUSWZ128rm */ |
| 100369 | 59440, |
| 100370 | /* VPSUBUSWZ128rmk */ |
| 100371 | 59443, |
| 100372 | /* VPSUBUSWZ128rmkz */ |
| 100373 | 59448, |
| 100374 | /* VPSUBUSWZ128rr */ |
| 100375 | 59452, |
| 100376 | /* VPSUBUSWZ128rrk */ |
| 100377 | 59455, |
| 100378 | /* VPSUBUSWZ128rrkz */ |
| 100379 | 59460, |
| 100380 | /* VPSUBUSWZ256rm */ |
| 100381 | 59464, |
| 100382 | /* VPSUBUSWZ256rmk */ |
| 100383 | 59467, |
| 100384 | /* VPSUBUSWZ256rmkz */ |
| 100385 | 59472, |
| 100386 | /* VPSUBUSWZ256rr */ |
| 100387 | 59476, |
| 100388 | /* VPSUBUSWZ256rrk */ |
| 100389 | 59479, |
| 100390 | /* VPSUBUSWZ256rrkz */ |
| 100391 | 59484, |
| 100392 | /* VPSUBUSWZrm */ |
| 100393 | 59488, |
| 100394 | /* VPSUBUSWZrmk */ |
| 100395 | 59491, |
| 100396 | /* VPSUBUSWZrmkz */ |
| 100397 | 59496, |
| 100398 | /* VPSUBUSWZrr */ |
| 100399 | 59500, |
| 100400 | /* VPSUBUSWZrrk */ |
| 100401 | 59503, |
| 100402 | /* VPSUBUSWZrrkz */ |
| 100403 | 59508, |
| 100404 | /* VPSUBUSWrm */ |
| 100405 | 59512, |
| 100406 | /* VPSUBUSWrr */ |
| 100407 | 59515, |
| 100408 | /* VPSUBWYrm */ |
| 100409 | 59518, |
| 100410 | /* VPSUBWYrr */ |
| 100411 | 59521, |
| 100412 | /* VPSUBWZ128rm */ |
| 100413 | 59524, |
| 100414 | /* VPSUBWZ128rmk */ |
| 100415 | 59527, |
| 100416 | /* VPSUBWZ128rmkz */ |
| 100417 | 59532, |
| 100418 | /* VPSUBWZ128rr */ |
| 100419 | 59536, |
| 100420 | /* VPSUBWZ128rrk */ |
| 100421 | 59539, |
| 100422 | /* VPSUBWZ128rrkz */ |
| 100423 | 59544, |
| 100424 | /* VPSUBWZ256rm */ |
| 100425 | 59548, |
| 100426 | /* VPSUBWZ256rmk */ |
| 100427 | 59551, |
| 100428 | /* VPSUBWZ256rmkz */ |
| 100429 | 59556, |
| 100430 | /* VPSUBWZ256rr */ |
| 100431 | 59560, |
| 100432 | /* VPSUBWZ256rrk */ |
| 100433 | 59563, |
| 100434 | /* VPSUBWZ256rrkz */ |
| 100435 | 59568, |
| 100436 | /* VPSUBWZrm */ |
| 100437 | 59572, |
| 100438 | /* VPSUBWZrmk */ |
| 100439 | 59575, |
| 100440 | /* VPSUBWZrmkz */ |
| 100441 | 59580, |
| 100442 | /* VPSUBWZrr */ |
| 100443 | 59584, |
| 100444 | /* VPSUBWZrrk */ |
| 100445 | 59587, |
| 100446 | /* VPSUBWZrrkz */ |
| 100447 | 59592, |
| 100448 | /* VPSUBWrm */ |
| 100449 | 59596, |
| 100450 | /* VPSUBWrr */ |
| 100451 | 59599, |
| 100452 | /* VPTERNLOGDZ128rmbi */ |
| 100453 | 59602, |
| 100454 | /* VPTERNLOGDZ128rmbik */ |
| 100455 | 59607, |
| 100456 | /* VPTERNLOGDZ128rmbikz */ |
| 100457 | 59613, |
| 100458 | /* VPTERNLOGDZ128rmi */ |
| 100459 | 59619, |
| 100460 | /* VPTERNLOGDZ128rmik */ |
| 100461 | 59624, |
| 100462 | /* VPTERNLOGDZ128rmikz */ |
| 100463 | 59630, |
| 100464 | /* VPTERNLOGDZ128rri */ |
| 100465 | 59636, |
| 100466 | /* VPTERNLOGDZ128rrik */ |
| 100467 | 59641, |
| 100468 | /* VPTERNLOGDZ128rrikz */ |
| 100469 | 59647, |
| 100470 | /* VPTERNLOGDZ256rmbi */ |
| 100471 | 59653, |
| 100472 | /* VPTERNLOGDZ256rmbik */ |
| 100473 | 59658, |
| 100474 | /* VPTERNLOGDZ256rmbikz */ |
| 100475 | 59664, |
| 100476 | /* VPTERNLOGDZ256rmi */ |
| 100477 | 59670, |
| 100478 | /* VPTERNLOGDZ256rmik */ |
| 100479 | 59675, |
| 100480 | /* VPTERNLOGDZ256rmikz */ |
| 100481 | 59681, |
| 100482 | /* VPTERNLOGDZ256rri */ |
| 100483 | 59687, |
| 100484 | /* VPTERNLOGDZ256rrik */ |
| 100485 | 59692, |
| 100486 | /* VPTERNLOGDZ256rrikz */ |
| 100487 | 59698, |
| 100488 | /* VPTERNLOGDZrmbi */ |
| 100489 | 59704, |
| 100490 | /* VPTERNLOGDZrmbik */ |
| 100491 | 59709, |
| 100492 | /* VPTERNLOGDZrmbikz */ |
| 100493 | 59715, |
| 100494 | /* VPTERNLOGDZrmi */ |
| 100495 | 59721, |
| 100496 | /* VPTERNLOGDZrmik */ |
| 100497 | 59726, |
| 100498 | /* VPTERNLOGDZrmikz */ |
| 100499 | 59732, |
| 100500 | /* VPTERNLOGDZrri */ |
| 100501 | 59738, |
| 100502 | /* VPTERNLOGDZrrik */ |
| 100503 | 59743, |
| 100504 | /* VPTERNLOGDZrrikz */ |
| 100505 | 59749, |
| 100506 | /* VPTERNLOGQZ128rmbi */ |
| 100507 | 59755, |
| 100508 | /* VPTERNLOGQZ128rmbik */ |
| 100509 | 59760, |
| 100510 | /* VPTERNLOGQZ128rmbikz */ |
| 100511 | 59766, |
| 100512 | /* VPTERNLOGQZ128rmi */ |
| 100513 | 59772, |
| 100514 | /* VPTERNLOGQZ128rmik */ |
| 100515 | 59777, |
| 100516 | /* VPTERNLOGQZ128rmikz */ |
| 100517 | 59783, |
| 100518 | /* VPTERNLOGQZ128rri */ |
| 100519 | 59789, |
| 100520 | /* VPTERNLOGQZ128rrik */ |
| 100521 | 59794, |
| 100522 | /* VPTERNLOGQZ128rrikz */ |
| 100523 | 59800, |
| 100524 | /* VPTERNLOGQZ256rmbi */ |
| 100525 | 59806, |
| 100526 | /* VPTERNLOGQZ256rmbik */ |
| 100527 | 59811, |
| 100528 | /* VPTERNLOGQZ256rmbikz */ |
| 100529 | 59817, |
| 100530 | /* VPTERNLOGQZ256rmi */ |
| 100531 | 59823, |
| 100532 | /* VPTERNLOGQZ256rmik */ |
| 100533 | 59828, |
| 100534 | /* VPTERNLOGQZ256rmikz */ |
| 100535 | 59834, |
| 100536 | /* VPTERNLOGQZ256rri */ |
| 100537 | 59840, |
| 100538 | /* VPTERNLOGQZ256rrik */ |
| 100539 | 59845, |
| 100540 | /* VPTERNLOGQZ256rrikz */ |
| 100541 | 59851, |
| 100542 | /* VPTERNLOGQZrmbi */ |
| 100543 | 59857, |
| 100544 | /* VPTERNLOGQZrmbik */ |
| 100545 | 59862, |
| 100546 | /* VPTERNLOGQZrmbikz */ |
| 100547 | 59868, |
| 100548 | /* VPTERNLOGQZrmi */ |
| 100549 | 59874, |
| 100550 | /* VPTERNLOGQZrmik */ |
| 100551 | 59879, |
| 100552 | /* VPTERNLOGQZrmikz */ |
| 100553 | 59885, |
| 100554 | /* VPTERNLOGQZrri */ |
| 100555 | 59891, |
| 100556 | /* VPTERNLOGQZrrik */ |
| 100557 | 59896, |
| 100558 | /* VPTERNLOGQZrrikz */ |
| 100559 | 59902, |
| 100560 | /* VPTESTMBZ128rm */ |
| 100561 | 59908, |
| 100562 | /* VPTESTMBZ128rmk */ |
| 100563 | 59911, |
| 100564 | /* VPTESTMBZ128rr */ |
| 100565 | 59915, |
| 100566 | /* VPTESTMBZ128rrk */ |
| 100567 | 59918, |
| 100568 | /* VPTESTMBZ256rm */ |
| 100569 | 59922, |
| 100570 | /* VPTESTMBZ256rmk */ |
| 100571 | 59925, |
| 100572 | /* VPTESTMBZ256rr */ |
| 100573 | 59929, |
| 100574 | /* VPTESTMBZ256rrk */ |
| 100575 | 59932, |
| 100576 | /* VPTESTMBZrm */ |
| 100577 | 59936, |
| 100578 | /* VPTESTMBZrmk */ |
| 100579 | 59939, |
| 100580 | /* VPTESTMBZrr */ |
| 100581 | 59943, |
| 100582 | /* VPTESTMBZrrk */ |
| 100583 | 59946, |
| 100584 | /* VPTESTMDZ128rm */ |
| 100585 | 59950, |
| 100586 | /* VPTESTMDZ128rmb */ |
| 100587 | 59953, |
| 100588 | /* VPTESTMDZ128rmbk */ |
| 100589 | 59956, |
| 100590 | /* VPTESTMDZ128rmk */ |
| 100591 | 59960, |
| 100592 | /* VPTESTMDZ128rr */ |
| 100593 | 59964, |
| 100594 | /* VPTESTMDZ128rrk */ |
| 100595 | 59967, |
| 100596 | /* VPTESTMDZ256rm */ |
| 100597 | 59971, |
| 100598 | /* VPTESTMDZ256rmb */ |
| 100599 | 59974, |
| 100600 | /* VPTESTMDZ256rmbk */ |
| 100601 | 59977, |
| 100602 | /* VPTESTMDZ256rmk */ |
| 100603 | 59981, |
| 100604 | /* VPTESTMDZ256rr */ |
| 100605 | 59985, |
| 100606 | /* VPTESTMDZ256rrk */ |
| 100607 | 59988, |
| 100608 | /* VPTESTMDZrm */ |
| 100609 | 59992, |
| 100610 | /* VPTESTMDZrmb */ |
| 100611 | 59995, |
| 100612 | /* VPTESTMDZrmbk */ |
| 100613 | 59998, |
| 100614 | /* VPTESTMDZrmk */ |
| 100615 | 60002, |
| 100616 | /* VPTESTMDZrr */ |
| 100617 | 60006, |
| 100618 | /* VPTESTMDZrrk */ |
| 100619 | 60009, |
| 100620 | /* VPTESTMQZ128rm */ |
| 100621 | 60013, |
| 100622 | /* VPTESTMQZ128rmb */ |
| 100623 | 60016, |
| 100624 | /* VPTESTMQZ128rmbk */ |
| 100625 | 60019, |
| 100626 | /* VPTESTMQZ128rmk */ |
| 100627 | 60023, |
| 100628 | /* VPTESTMQZ128rr */ |
| 100629 | 60027, |
| 100630 | /* VPTESTMQZ128rrk */ |
| 100631 | 60030, |
| 100632 | /* VPTESTMQZ256rm */ |
| 100633 | 60034, |
| 100634 | /* VPTESTMQZ256rmb */ |
| 100635 | 60037, |
| 100636 | /* VPTESTMQZ256rmbk */ |
| 100637 | 60040, |
| 100638 | /* VPTESTMQZ256rmk */ |
| 100639 | 60044, |
| 100640 | /* VPTESTMQZ256rr */ |
| 100641 | 60048, |
| 100642 | /* VPTESTMQZ256rrk */ |
| 100643 | 60051, |
| 100644 | /* VPTESTMQZrm */ |
| 100645 | 60055, |
| 100646 | /* VPTESTMQZrmb */ |
| 100647 | 60058, |
| 100648 | /* VPTESTMQZrmbk */ |
| 100649 | 60061, |
| 100650 | /* VPTESTMQZrmk */ |
| 100651 | 60065, |
| 100652 | /* VPTESTMQZrr */ |
| 100653 | 60069, |
| 100654 | /* VPTESTMQZrrk */ |
| 100655 | 60072, |
| 100656 | /* VPTESTMWZ128rm */ |
| 100657 | 60076, |
| 100658 | /* VPTESTMWZ128rmk */ |
| 100659 | 60079, |
| 100660 | /* VPTESTMWZ128rr */ |
| 100661 | 60083, |
| 100662 | /* VPTESTMWZ128rrk */ |
| 100663 | 60086, |
| 100664 | /* VPTESTMWZ256rm */ |
| 100665 | 60090, |
| 100666 | /* VPTESTMWZ256rmk */ |
| 100667 | 60093, |
| 100668 | /* VPTESTMWZ256rr */ |
| 100669 | 60097, |
| 100670 | /* VPTESTMWZ256rrk */ |
| 100671 | 60100, |
| 100672 | /* VPTESTMWZrm */ |
| 100673 | 60104, |
| 100674 | /* VPTESTMWZrmk */ |
| 100675 | 60107, |
| 100676 | /* VPTESTMWZrr */ |
| 100677 | 60111, |
| 100678 | /* VPTESTMWZrrk */ |
| 100679 | 60114, |
| 100680 | /* VPTESTNMBZ128rm */ |
| 100681 | 60118, |
| 100682 | /* VPTESTNMBZ128rmk */ |
| 100683 | 60121, |
| 100684 | /* VPTESTNMBZ128rr */ |
| 100685 | 60125, |
| 100686 | /* VPTESTNMBZ128rrk */ |
| 100687 | 60128, |
| 100688 | /* VPTESTNMBZ256rm */ |
| 100689 | 60132, |
| 100690 | /* VPTESTNMBZ256rmk */ |
| 100691 | 60135, |
| 100692 | /* VPTESTNMBZ256rr */ |
| 100693 | 60139, |
| 100694 | /* VPTESTNMBZ256rrk */ |
| 100695 | 60142, |
| 100696 | /* VPTESTNMBZrm */ |
| 100697 | 60146, |
| 100698 | /* VPTESTNMBZrmk */ |
| 100699 | 60149, |
| 100700 | /* VPTESTNMBZrr */ |
| 100701 | 60153, |
| 100702 | /* VPTESTNMBZrrk */ |
| 100703 | 60156, |
| 100704 | /* VPTESTNMDZ128rm */ |
| 100705 | 60160, |
| 100706 | /* VPTESTNMDZ128rmb */ |
| 100707 | 60163, |
| 100708 | /* VPTESTNMDZ128rmbk */ |
| 100709 | 60166, |
| 100710 | /* VPTESTNMDZ128rmk */ |
| 100711 | 60170, |
| 100712 | /* VPTESTNMDZ128rr */ |
| 100713 | 60174, |
| 100714 | /* VPTESTNMDZ128rrk */ |
| 100715 | 60177, |
| 100716 | /* VPTESTNMDZ256rm */ |
| 100717 | 60181, |
| 100718 | /* VPTESTNMDZ256rmb */ |
| 100719 | 60184, |
| 100720 | /* VPTESTNMDZ256rmbk */ |
| 100721 | 60187, |
| 100722 | /* VPTESTNMDZ256rmk */ |
| 100723 | 60191, |
| 100724 | /* VPTESTNMDZ256rr */ |
| 100725 | 60195, |
| 100726 | /* VPTESTNMDZ256rrk */ |
| 100727 | 60198, |
| 100728 | /* VPTESTNMDZrm */ |
| 100729 | 60202, |
| 100730 | /* VPTESTNMDZrmb */ |
| 100731 | 60205, |
| 100732 | /* VPTESTNMDZrmbk */ |
| 100733 | 60208, |
| 100734 | /* VPTESTNMDZrmk */ |
| 100735 | 60212, |
| 100736 | /* VPTESTNMDZrr */ |
| 100737 | 60216, |
| 100738 | /* VPTESTNMDZrrk */ |
| 100739 | 60219, |
| 100740 | /* VPTESTNMQZ128rm */ |
| 100741 | 60223, |
| 100742 | /* VPTESTNMQZ128rmb */ |
| 100743 | 60226, |
| 100744 | /* VPTESTNMQZ128rmbk */ |
| 100745 | 60229, |
| 100746 | /* VPTESTNMQZ128rmk */ |
| 100747 | 60233, |
| 100748 | /* VPTESTNMQZ128rr */ |
| 100749 | 60237, |
| 100750 | /* VPTESTNMQZ128rrk */ |
| 100751 | 60240, |
| 100752 | /* VPTESTNMQZ256rm */ |
| 100753 | 60244, |
| 100754 | /* VPTESTNMQZ256rmb */ |
| 100755 | 60247, |
| 100756 | /* VPTESTNMQZ256rmbk */ |
| 100757 | 60250, |
| 100758 | /* VPTESTNMQZ256rmk */ |
| 100759 | 60254, |
| 100760 | /* VPTESTNMQZ256rr */ |
| 100761 | 60258, |
| 100762 | /* VPTESTNMQZ256rrk */ |
| 100763 | 60261, |
| 100764 | /* VPTESTNMQZrm */ |
| 100765 | 60265, |
| 100766 | /* VPTESTNMQZrmb */ |
| 100767 | 60268, |
| 100768 | /* VPTESTNMQZrmbk */ |
| 100769 | 60271, |
| 100770 | /* VPTESTNMQZrmk */ |
| 100771 | 60275, |
| 100772 | /* VPTESTNMQZrr */ |
| 100773 | 60279, |
| 100774 | /* VPTESTNMQZrrk */ |
| 100775 | 60282, |
| 100776 | /* VPTESTNMWZ128rm */ |
| 100777 | 60286, |
| 100778 | /* VPTESTNMWZ128rmk */ |
| 100779 | 60289, |
| 100780 | /* VPTESTNMWZ128rr */ |
| 100781 | 60293, |
| 100782 | /* VPTESTNMWZ128rrk */ |
| 100783 | 60296, |
| 100784 | /* VPTESTNMWZ256rm */ |
| 100785 | 60300, |
| 100786 | /* VPTESTNMWZ256rmk */ |
| 100787 | 60303, |
| 100788 | /* VPTESTNMWZ256rr */ |
| 100789 | 60307, |
| 100790 | /* VPTESTNMWZ256rrk */ |
| 100791 | 60310, |
| 100792 | /* VPTESTNMWZrm */ |
| 100793 | 60314, |
| 100794 | /* VPTESTNMWZrmk */ |
| 100795 | 60317, |
| 100796 | /* VPTESTNMWZrr */ |
| 100797 | 60321, |
| 100798 | /* VPTESTNMWZrrk */ |
| 100799 | 60324, |
| 100800 | /* VPTESTYrm */ |
| 100801 | 60328, |
| 100802 | /* VPTESTYrr */ |
| 100803 | 60330, |
| 100804 | /* VPTESTrm */ |
| 100805 | 60332, |
| 100806 | /* VPTESTrr */ |
| 100807 | 60334, |
| 100808 | /* VPUNPCKHBWYrm */ |
| 100809 | 60336, |
| 100810 | /* VPUNPCKHBWYrr */ |
| 100811 | 60339, |
| 100812 | /* VPUNPCKHBWZ128rm */ |
| 100813 | 60342, |
| 100814 | /* VPUNPCKHBWZ128rmk */ |
| 100815 | 60345, |
| 100816 | /* VPUNPCKHBWZ128rmkz */ |
| 100817 | 60350, |
| 100818 | /* VPUNPCKHBWZ128rr */ |
| 100819 | 60354, |
| 100820 | /* VPUNPCKHBWZ128rrk */ |
| 100821 | 60357, |
| 100822 | /* VPUNPCKHBWZ128rrkz */ |
| 100823 | 60362, |
| 100824 | /* VPUNPCKHBWZ256rm */ |
| 100825 | 60366, |
| 100826 | /* VPUNPCKHBWZ256rmk */ |
| 100827 | 60369, |
| 100828 | /* VPUNPCKHBWZ256rmkz */ |
| 100829 | 60374, |
| 100830 | /* VPUNPCKHBWZ256rr */ |
| 100831 | 60378, |
| 100832 | /* VPUNPCKHBWZ256rrk */ |
| 100833 | 60381, |
| 100834 | /* VPUNPCKHBWZ256rrkz */ |
| 100835 | 60386, |
| 100836 | /* VPUNPCKHBWZrm */ |
| 100837 | 60390, |
| 100838 | /* VPUNPCKHBWZrmk */ |
| 100839 | 60393, |
| 100840 | /* VPUNPCKHBWZrmkz */ |
| 100841 | 60398, |
| 100842 | /* VPUNPCKHBWZrr */ |
| 100843 | 60402, |
| 100844 | /* VPUNPCKHBWZrrk */ |
| 100845 | 60405, |
| 100846 | /* VPUNPCKHBWZrrkz */ |
| 100847 | 60410, |
| 100848 | /* VPUNPCKHBWrm */ |
| 100849 | 60414, |
| 100850 | /* VPUNPCKHBWrr */ |
| 100851 | 60417, |
| 100852 | /* VPUNPCKHDQYrm */ |
| 100853 | 60420, |
| 100854 | /* VPUNPCKHDQYrr */ |
| 100855 | 60423, |
| 100856 | /* VPUNPCKHDQZ128rm */ |
| 100857 | 60426, |
| 100858 | /* VPUNPCKHDQZ128rmb */ |
| 100859 | 60429, |
| 100860 | /* VPUNPCKHDQZ128rmbk */ |
| 100861 | 60432, |
| 100862 | /* VPUNPCKHDQZ128rmbkz */ |
| 100863 | 60437, |
| 100864 | /* VPUNPCKHDQZ128rmk */ |
| 100865 | 60441, |
| 100866 | /* VPUNPCKHDQZ128rmkz */ |
| 100867 | 60446, |
| 100868 | /* VPUNPCKHDQZ128rr */ |
| 100869 | 60450, |
| 100870 | /* VPUNPCKHDQZ128rrk */ |
| 100871 | 60453, |
| 100872 | /* VPUNPCKHDQZ128rrkz */ |
| 100873 | 60458, |
| 100874 | /* VPUNPCKHDQZ256rm */ |
| 100875 | 60462, |
| 100876 | /* VPUNPCKHDQZ256rmb */ |
| 100877 | 60465, |
| 100878 | /* VPUNPCKHDQZ256rmbk */ |
| 100879 | 60468, |
| 100880 | /* VPUNPCKHDQZ256rmbkz */ |
| 100881 | 60473, |
| 100882 | /* VPUNPCKHDQZ256rmk */ |
| 100883 | 60477, |
| 100884 | /* VPUNPCKHDQZ256rmkz */ |
| 100885 | 60482, |
| 100886 | /* VPUNPCKHDQZ256rr */ |
| 100887 | 60486, |
| 100888 | /* VPUNPCKHDQZ256rrk */ |
| 100889 | 60489, |
| 100890 | /* VPUNPCKHDQZ256rrkz */ |
| 100891 | 60494, |
| 100892 | /* VPUNPCKHDQZrm */ |
| 100893 | 60498, |
| 100894 | /* VPUNPCKHDQZrmb */ |
| 100895 | 60501, |
| 100896 | /* VPUNPCKHDQZrmbk */ |
| 100897 | 60504, |
| 100898 | /* VPUNPCKHDQZrmbkz */ |
| 100899 | 60509, |
| 100900 | /* VPUNPCKHDQZrmk */ |
| 100901 | 60513, |
| 100902 | /* VPUNPCKHDQZrmkz */ |
| 100903 | 60518, |
| 100904 | /* VPUNPCKHDQZrr */ |
| 100905 | 60522, |
| 100906 | /* VPUNPCKHDQZrrk */ |
| 100907 | 60525, |
| 100908 | /* VPUNPCKHDQZrrkz */ |
| 100909 | 60530, |
| 100910 | /* VPUNPCKHDQrm */ |
| 100911 | 60534, |
| 100912 | /* VPUNPCKHDQrr */ |
| 100913 | 60537, |
| 100914 | /* VPUNPCKHQDQYrm */ |
| 100915 | 60540, |
| 100916 | /* VPUNPCKHQDQYrr */ |
| 100917 | 60543, |
| 100918 | /* VPUNPCKHQDQZ128rm */ |
| 100919 | 60546, |
| 100920 | /* VPUNPCKHQDQZ128rmb */ |
| 100921 | 60549, |
| 100922 | /* VPUNPCKHQDQZ128rmbk */ |
| 100923 | 60552, |
| 100924 | /* VPUNPCKHQDQZ128rmbkz */ |
| 100925 | 60557, |
| 100926 | /* VPUNPCKHQDQZ128rmk */ |
| 100927 | 60561, |
| 100928 | /* VPUNPCKHQDQZ128rmkz */ |
| 100929 | 60566, |
| 100930 | /* VPUNPCKHQDQZ128rr */ |
| 100931 | 60570, |
| 100932 | /* VPUNPCKHQDQZ128rrk */ |
| 100933 | 60573, |
| 100934 | /* VPUNPCKHQDQZ128rrkz */ |
| 100935 | 60578, |
| 100936 | /* VPUNPCKHQDQZ256rm */ |
| 100937 | 60582, |
| 100938 | /* VPUNPCKHQDQZ256rmb */ |
| 100939 | 60585, |
| 100940 | /* VPUNPCKHQDQZ256rmbk */ |
| 100941 | 60588, |
| 100942 | /* VPUNPCKHQDQZ256rmbkz */ |
| 100943 | 60593, |
| 100944 | /* VPUNPCKHQDQZ256rmk */ |
| 100945 | 60597, |
| 100946 | /* VPUNPCKHQDQZ256rmkz */ |
| 100947 | 60602, |
| 100948 | /* VPUNPCKHQDQZ256rr */ |
| 100949 | 60606, |
| 100950 | /* VPUNPCKHQDQZ256rrk */ |
| 100951 | 60609, |
| 100952 | /* VPUNPCKHQDQZ256rrkz */ |
| 100953 | 60614, |
| 100954 | /* VPUNPCKHQDQZrm */ |
| 100955 | 60618, |
| 100956 | /* VPUNPCKHQDQZrmb */ |
| 100957 | 60621, |
| 100958 | /* VPUNPCKHQDQZrmbk */ |
| 100959 | 60624, |
| 100960 | /* VPUNPCKHQDQZrmbkz */ |
| 100961 | 60629, |
| 100962 | /* VPUNPCKHQDQZrmk */ |
| 100963 | 60633, |
| 100964 | /* VPUNPCKHQDQZrmkz */ |
| 100965 | 60638, |
| 100966 | /* VPUNPCKHQDQZrr */ |
| 100967 | 60642, |
| 100968 | /* VPUNPCKHQDQZrrk */ |
| 100969 | 60645, |
| 100970 | /* VPUNPCKHQDQZrrkz */ |
| 100971 | 60650, |
| 100972 | /* VPUNPCKHQDQrm */ |
| 100973 | 60654, |
| 100974 | /* VPUNPCKHQDQrr */ |
| 100975 | 60657, |
| 100976 | /* VPUNPCKHWDYrm */ |
| 100977 | 60660, |
| 100978 | /* VPUNPCKHWDYrr */ |
| 100979 | 60663, |
| 100980 | /* VPUNPCKHWDZ128rm */ |
| 100981 | 60666, |
| 100982 | /* VPUNPCKHWDZ128rmk */ |
| 100983 | 60669, |
| 100984 | /* VPUNPCKHWDZ128rmkz */ |
| 100985 | 60674, |
| 100986 | /* VPUNPCKHWDZ128rr */ |
| 100987 | 60678, |
| 100988 | /* VPUNPCKHWDZ128rrk */ |
| 100989 | 60681, |
| 100990 | /* VPUNPCKHWDZ128rrkz */ |
| 100991 | 60686, |
| 100992 | /* VPUNPCKHWDZ256rm */ |
| 100993 | 60690, |
| 100994 | /* VPUNPCKHWDZ256rmk */ |
| 100995 | 60693, |
| 100996 | /* VPUNPCKHWDZ256rmkz */ |
| 100997 | 60698, |
| 100998 | /* VPUNPCKHWDZ256rr */ |
| 100999 | 60702, |
| 101000 | /* VPUNPCKHWDZ256rrk */ |
| 101001 | 60705, |
| 101002 | /* VPUNPCKHWDZ256rrkz */ |
| 101003 | 60710, |
| 101004 | /* VPUNPCKHWDZrm */ |
| 101005 | 60714, |
| 101006 | /* VPUNPCKHWDZrmk */ |
| 101007 | 60717, |
| 101008 | /* VPUNPCKHWDZrmkz */ |
| 101009 | 60722, |
| 101010 | /* VPUNPCKHWDZrr */ |
| 101011 | 60726, |
| 101012 | /* VPUNPCKHWDZrrk */ |
| 101013 | 60729, |
| 101014 | /* VPUNPCKHWDZrrkz */ |
| 101015 | 60734, |
| 101016 | /* VPUNPCKHWDrm */ |
| 101017 | 60738, |
| 101018 | /* VPUNPCKHWDrr */ |
| 101019 | 60741, |
| 101020 | /* VPUNPCKLBWYrm */ |
| 101021 | 60744, |
| 101022 | /* VPUNPCKLBWYrr */ |
| 101023 | 60747, |
| 101024 | /* VPUNPCKLBWZ128rm */ |
| 101025 | 60750, |
| 101026 | /* VPUNPCKLBWZ128rmk */ |
| 101027 | 60753, |
| 101028 | /* VPUNPCKLBWZ128rmkz */ |
| 101029 | 60758, |
| 101030 | /* VPUNPCKLBWZ128rr */ |
| 101031 | 60762, |
| 101032 | /* VPUNPCKLBWZ128rrk */ |
| 101033 | 60765, |
| 101034 | /* VPUNPCKLBWZ128rrkz */ |
| 101035 | 60770, |
| 101036 | /* VPUNPCKLBWZ256rm */ |
| 101037 | 60774, |
| 101038 | /* VPUNPCKLBWZ256rmk */ |
| 101039 | 60777, |
| 101040 | /* VPUNPCKLBWZ256rmkz */ |
| 101041 | 60782, |
| 101042 | /* VPUNPCKLBWZ256rr */ |
| 101043 | 60786, |
| 101044 | /* VPUNPCKLBWZ256rrk */ |
| 101045 | 60789, |
| 101046 | /* VPUNPCKLBWZ256rrkz */ |
| 101047 | 60794, |
| 101048 | /* VPUNPCKLBWZrm */ |
| 101049 | 60798, |
| 101050 | /* VPUNPCKLBWZrmk */ |
| 101051 | 60801, |
| 101052 | /* VPUNPCKLBWZrmkz */ |
| 101053 | 60806, |
| 101054 | /* VPUNPCKLBWZrr */ |
| 101055 | 60810, |
| 101056 | /* VPUNPCKLBWZrrk */ |
| 101057 | 60813, |
| 101058 | /* VPUNPCKLBWZrrkz */ |
| 101059 | 60818, |
| 101060 | /* VPUNPCKLBWrm */ |
| 101061 | 60822, |
| 101062 | /* VPUNPCKLBWrr */ |
| 101063 | 60825, |
| 101064 | /* VPUNPCKLDQYrm */ |
| 101065 | 60828, |
| 101066 | /* VPUNPCKLDQYrr */ |
| 101067 | 60831, |
| 101068 | /* VPUNPCKLDQZ128rm */ |
| 101069 | 60834, |
| 101070 | /* VPUNPCKLDQZ128rmb */ |
| 101071 | 60837, |
| 101072 | /* VPUNPCKLDQZ128rmbk */ |
| 101073 | 60840, |
| 101074 | /* VPUNPCKLDQZ128rmbkz */ |
| 101075 | 60845, |
| 101076 | /* VPUNPCKLDQZ128rmk */ |
| 101077 | 60849, |
| 101078 | /* VPUNPCKLDQZ128rmkz */ |
| 101079 | 60854, |
| 101080 | /* VPUNPCKLDQZ128rr */ |
| 101081 | 60858, |
| 101082 | /* VPUNPCKLDQZ128rrk */ |
| 101083 | 60861, |
| 101084 | /* VPUNPCKLDQZ128rrkz */ |
| 101085 | 60866, |
| 101086 | /* VPUNPCKLDQZ256rm */ |
| 101087 | 60870, |
| 101088 | /* VPUNPCKLDQZ256rmb */ |
| 101089 | 60873, |
| 101090 | /* VPUNPCKLDQZ256rmbk */ |
| 101091 | 60876, |
| 101092 | /* VPUNPCKLDQZ256rmbkz */ |
| 101093 | 60881, |
| 101094 | /* VPUNPCKLDQZ256rmk */ |
| 101095 | 60885, |
| 101096 | /* VPUNPCKLDQZ256rmkz */ |
| 101097 | 60890, |
| 101098 | /* VPUNPCKLDQZ256rr */ |
| 101099 | 60894, |
| 101100 | /* VPUNPCKLDQZ256rrk */ |
| 101101 | 60897, |
| 101102 | /* VPUNPCKLDQZ256rrkz */ |
| 101103 | 60902, |
| 101104 | /* VPUNPCKLDQZrm */ |
| 101105 | 60906, |
| 101106 | /* VPUNPCKLDQZrmb */ |
| 101107 | 60909, |
| 101108 | /* VPUNPCKLDQZrmbk */ |
| 101109 | 60912, |
| 101110 | /* VPUNPCKLDQZrmbkz */ |
| 101111 | 60917, |
| 101112 | /* VPUNPCKLDQZrmk */ |
| 101113 | 60921, |
| 101114 | /* VPUNPCKLDQZrmkz */ |
| 101115 | 60926, |
| 101116 | /* VPUNPCKLDQZrr */ |
| 101117 | 60930, |
| 101118 | /* VPUNPCKLDQZrrk */ |
| 101119 | 60933, |
| 101120 | /* VPUNPCKLDQZrrkz */ |
| 101121 | 60938, |
| 101122 | /* VPUNPCKLDQrm */ |
| 101123 | 60942, |
| 101124 | /* VPUNPCKLDQrr */ |
| 101125 | 60945, |
| 101126 | /* VPUNPCKLQDQYrm */ |
| 101127 | 60948, |
| 101128 | /* VPUNPCKLQDQYrr */ |
| 101129 | 60951, |
| 101130 | /* VPUNPCKLQDQZ128rm */ |
| 101131 | 60954, |
| 101132 | /* VPUNPCKLQDQZ128rmb */ |
| 101133 | 60957, |
| 101134 | /* VPUNPCKLQDQZ128rmbk */ |
| 101135 | 60960, |
| 101136 | /* VPUNPCKLQDQZ128rmbkz */ |
| 101137 | 60965, |
| 101138 | /* VPUNPCKLQDQZ128rmk */ |
| 101139 | 60969, |
| 101140 | /* VPUNPCKLQDQZ128rmkz */ |
| 101141 | 60974, |
| 101142 | /* VPUNPCKLQDQZ128rr */ |
| 101143 | 60978, |
| 101144 | /* VPUNPCKLQDQZ128rrk */ |
| 101145 | 60981, |
| 101146 | /* VPUNPCKLQDQZ128rrkz */ |
| 101147 | 60986, |
| 101148 | /* VPUNPCKLQDQZ256rm */ |
| 101149 | 60990, |
| 101150 | /* VPUNPCKLQDQZ256rmb */ |
| 101151 | 60993, |
| 101152 | /* VPUNPCKLQDQZ256rmbk */ |
| 101153 | 60996, |
| 101154 | /* VPUNPCKLQDQZ256rmbkz */ |
| 101155 | 61001, |
| 101156 | /* VPUNPCKLQDQZ256rmk */ |
| 101157 | 61005, |
| 101158 | /* VPUNPCKLQDQZ256rmkz */ |
| 101159 | 61010, |
| 101160 | /* VPUNPCKLQDQZ256rr */ |
| 101161 | 61014, |
| 101162 | /* VPUNPCKLQDQZ256rrk */ |
| 101163 | 61017, |
| 101164 | /* VPUNPCKLQDQZ256rrkz */ |
| 101165 | 61022, |
| 101166 | /* VPUNPCKLQDQZrm */ |
| 101167 | 61026, |
| 101168 | /* VPUNPCKLQDQZrmb */ |
| 101169 | 61029, |
| 101170 | /* VPUNPCKLQDQZrmbk */ |
| 101171 | 61032, |
| 101172 | /* VPUNPCKLQDQZrmbkz */ |
| 101173 | 61037, |
| 101174 | /* VPUNPCKLQDQZrmk */ |
| 101175 | 61041, |
| 101176 | /* VPUNPCKLQDQZrmkz */ |
| 101177 | 61046, |
| 101178 | /* VPUNPCKLQDQZrr */ |
| 101179 | 61050, |
| 101180 | /* VPUNPCKLQDQZrrk */ |
| 101181 | 61053, |
| 101182 | /* VPUNPCKLQDQZrrkz */ |
| 101183 | 61058, |
| 101184 | /* VPUNPCKLQDQrm */ |
| 101185 | 61062, |
| 101186 | /* VPUNPCKLQDQrr */ |
| 101187 | 61065, |
| 101188 | /* VPUNPCKLWDYrm */ |
| 101189 | 61068, |
| 101190 | /* VPUNPCKLWDYrr */ |
| 101191 | 61071, |
| 101192 | /* VPUNPCKLWDZ128rm */ |
| 101193 | 61074, |
| 101194 | /* VPUNPCKLWDZ128rmk */ |
| 101195 | 61077, |
| 101196 | /* VPUNPCKLWDZ128rmkz */ |
| 101197 | 61082, |
| 101198 | /* VPUNPCKLWDZ128rr */ |
| 101199 | 61086, |
| 101200 | /* VPUNPCKLWDZ128rrk */ |
| 101201 | 61089, |
| 101202 | /* VPUNPCKLWDZ128rrkz */ |
| 101203 | 61094, |
| 101204 | /* VPUNPCKLWDZ256rm */ |
| 101205 | 61098, |
| 101206 | /* VPUNPCKLWDZ256rmk */ |
| 101207 | 61101, |
| 101208 | /* VPUNPCKLWDZ256rmkz */ |
| 101209 | 61106, |
| 101210 | /* VPUNPCKLWDZ256rr */ |
| 101211 | 61110, |
| 101212 | /* VPUNPCKLWDZ256rrk */ |
| 101213 | 61113, |
| 101214 | /* VPUNPCKLWDZ256rrkz */ |
| 101215 | 61118, |
| 101216 | /* VPUNPCKLWDZrm */ |
| 101217 | 61122, |
| 101218 | /* VPUNPCKLWDZrmk */ |
| 101219 | 61125, |
| 101220 | /* VPUNPCKLWDZrmkz */ |
| 101221 | 61130, |
| 101222 | /* VPUNPCKLWDZrr */ |
| 101223 | 61134, |
| 101224 | /* VPUNPCKLWDZrrk */ |
| 101225 | 61137, |
| 101226 | /* VPUNPCKLWDZrrkz */ |
| 101227 | 61142, |
| 101228 | /* VPUNPCKLWDrm */ |
| 101229 | 61146, |
| 101230 | /* VPUNPCKLWDrr */ |
| 101231 | 61149, |
| 101232 | /* VPXORDZ128rm */ |
| 101233 | 61152, |
| 101234 | /* VPXORDZ128rmb */ |
| 101235 | 61155, |
| 101236 | /* VPXORDZ128rmbk */ |
| 101237 | 61158, |
| 101238 | /* VPXORDZ128rmbkz */ |
| 101239 | 61163, |
| 101240 | /* VPXORDZ128rmk */ |
| 101241 | 61167, |
| 101242 | /* VPXORDZ128rmkz */ |
| 101243 | 61172, |
| 101244 | /* VPXORDZ128rr */ |
| 101245 | 61176, |
| 101246 | /* VPXORDZ128rrk */ |
| 101247 | 61179, |
| 101248 | /* VPXORDZ128rrkz */ |
| 101249 | 61184, |
| 101250 | /* VPXORDZ256rm */ |
| 101251 | 61188, |
| 101252 | /* VPXORDZ256rmb */ |
| 101253 | 61191, |
| 101254 | /* VPXORDZ256rmbk */ |
| 101255 | 61194, |
| 101256 | /* VPXORDZ256rmbkz */ |
| 101257 | 61199, |
| 101258 | /* VPXORDZ256rmk */ |
| 101259 | 61203, |
| 101260 | /* VPXORDZ256rmkz */ |
| 101261 | 61208, |
| 101262 | /* VPXORDZ256rr */ |
| 101263 | 61212, |
| 101264 | /* VPXORDZ256rrk */ |
| 101265 | 61215, |
| 101266 | /* VPXORDZ256rrkz */ |
| 101267 | 61220, |
| 101268 | /* VPXORDZrm */ |
| 101269 | 61224, |
| 101270 | /* VPXORDZrmb */ |
| 101271 | 61227, |
| 101272 | /* VPXORDZrmbk */ |
| 101273 | 61230, |
| 101274 | /* VPXORDZrmbkz */ |
| 101275 | 61235, |
| 101276 | /* VPXORDZrmk */ |
| 101277 | 61239, |
| 101278 | /* VPXORDZrmkz */ |
| 101279 | 61244, |
| 101280 | /* VPXORDZrr */ |
| 101281 | 61248, |
| 101282 | /* VPXORDZrrk */ |
| 101283 | 61251, |
| 101284 | /* VPXORDZrrkz */ |
| 101285 | 61256, |
| 101286 | /* VPXORQZ128rm */ |
| 101287 | 61260, |
| 101288 | /* VPXORQZ128rmb */ |
| 101289 | 61263, |
| 101290 | /* VPXORQZ128rmbk */ |
| 101291 | 61266, |
| 101292 | /* VPXORQZ128rmbkz */ |
| 101293 | 61271, |
| 101294 | /* VPXORQZ128rmk */ |
| 101295 | 61275, |
| 101296 | /* VPXORQZ128rmkz */ |
| 101297 | 61280, |
| 101298 | /* VPXORQZ128rr */ |
| 101299 | 61284, |
| 101300 | /* VPXORQZ128rrk */ |
| 101301 | 61287, |
| 101302 | /* VPXORQZ128rrkz */ |
| 101303 | 61292, |
| 101304 | /* VPXORQZ256rm */ |
| 101305 | 61296, |
| 101306 | /* VPXORQZ256rmb */ |
| 101307 | 61299, |
| 101308 | /* VPXORQZ256rmbk */ |
| 101309 | 61302, |
| 101310 | /* VPXORQZ256rmbkz */ |
| 101311 | 61307, |
| 101312 | /* VPXORQZ256rmk */ |
| 101313 | 61311, |
| 101314 | /* VPXORQZ256rmkz */ |
| 101315 | 61316, |
| 101316 | /* VPXORQZ256rr */ |
| 101317 | 61320, |
| 101318 | /* VPXORQZ256rrk */ |
| 101319 | 61323, |
| 101320 | /* VPXORQZ256rrkz */ |
| 101321 | 61328, |
| 101322 | /* VPXORQZrm */ |
| 101323 | 61332, |
| 101324 | /* VPXORQZrmb */ |
| 101325 | 61335, |
| 101326 | /* VPXORQZrmbk */ |
| 101327 | 61338, |
| 101328 | /* VPXORQZrmbkz */ |
| 101329 | 61343, |
| 101330 | /* VPXORQZrmk */ |
| 101331 | 61347, |
| 101332 | /* VPXORQZrmkz */ |
| 101333 | 61352, |
| 101334 | /* VPXORQZrr */ |
| 101335 | 61356, |
| 101336 | /* VPXORQZrrk */ |
| 101337 | 61359, |
| 101338 | /* VPXORQZrrkz */ |
| 101339 | 61364, |
| 101340 | /* VPXORYrm */ |
| 101341 | 61368, |
| 101342 | /* VPXORYrr */ |
| 101343 | 61371, |
| 101344 | /* VPXORrm */ |
| 101345 | 61374, |
| 101346 | /* VPXORrr */ |
| 101347 | 61377, |
| 101348 | /* VRANGEPDZ128rmbi */ |
| 101349 | 61380, |
| 101350 | /* VRANGEPDZ128rmbik */ |
| 101351 | 61384, |
| 101352 | /* VRANGEPDZ128rmbikz */ |
| 101353 | 61390, |
| 101354 | /* VRANGEPDZ128rmi */ |
| 101355 | 61395, |
| 101356 | /* VRANGEPDZ128rmik */ |
| 101357 | 61399, |
| 101358 | /* VRANGEPDZ128rmikz */ |
| 101359 | 61405, |
| 101360 | /* VRANGEPDZ128rri */ |
| 101361 | 61410, |
| 101362 | /* VRANGEPDZ128rrik */ |
| 101363 | 61414, |
| 101364 | /* VRANGEPDZ128rrikz */ |
| 101365 | 61420, |
| 101366 | /* VRANGEPDZ256rmbi */ |
| 101367 | 61425, |
| 101368 | /* VRANGEPDZ256rmbik */ |
| 101369 | 61429, |
| 101370 | /* VRANGEPDZ256rmbikz */ |
| 101371 | 61435, |
| 101372 | /* VRANGEPDZ256rmi */ |
| 101373 | 61440, |
| 101374 | /* VRANGEPDZ256rmik */ |
| 101375 | 61444, |
| 101376 | /* VRANGEPDZ256rmikz */ |
| 101377 | 61450, |
| 101378 | /* VRANGEPDZ256rri */ |
| 101379 | 61455, |
| 101380 | /* VRANGEPDZ256rrik */ |
| 101381 | 61459, |
| 101382 | /* VRANGEPDZ256rrikz */ |
| 101383 | 61465, |
| 101384 | /* VRANGEPDZrmbi */ |
| 101385 | 61470, |
| 101386 | /* VRANGEPDZrmbik */ |
| 101387 | 61474, |
| 101388 | /* VRANGEPDZrmbikz */ |
| 101389 | 61480, |
| 101390 | /* VRANGEPDZrmi */ |
| 101391 | 61485, |
| 101392 | /* VRANGEPDZrmik */ |
| 101393 | 61489, |
| 101394 | /* VRANGEPDZrmikz */ |
| 101395 | 61495, |
| 101396 | /* VRANGEPDZrri */ |
| 101397 | 61500, |
| 101398 | /* VRANGEPDZrrib */ |
| 101399 | 61504, |
| 101400 | /* VRANGEPDZrribk */ |
| 101401 | 61508, |
| 101402 | /* VRANGEPDZrribkz */ |
| 101403 | 61514, |
| 101404 | /* VRANGEPDZrrik */ |
| 101405 | 61519, |
| 101406 | /* VRANGEPDZrrikz */ |
| 101407 | 61525, |
| 101408 | /* VRANGEPSZ128rmbi */ |
| 101409 | 61530, |
| 101410 | /* VRANGEPSZ128rmbik */ |
| 101411 | 61534, |
| 101412 | /* VRANGEPSZ128rmbikz */ |
| 101413 | 61540, |
| 101414 | /* VRANGEPSZ128rmi */ |
| 101415 | 61545, |
| 101416 | /* VRANGEPSZ128rmik */ |
| 101417 | 61549, |
| 101418 | /* VRANGEPSZ128rmikz */ |
| 101419 | 61555, |
| 101420 | /* VRANGEPSZ128rri */ |
| 101421 | 61560, |
| 101422 | /* VRANGEPSZ128rrik */ |
| 101423 | 61564, |
| 101424 | /* VRANGEPSZ128rrikz */ |
| 101425 | 61570, |
| 101426 | /* VRANGEPSZ256rmbi */ |
| 101427 | 61575, |
| 101428 | /* VRANGEPSZ256rmbik */ |
| 101429 | 61579, |
| 101430 | /* VRANGEPSZ256rmbikz */ |
| 101431 | 61585, |
| 101432 | /* VRANGEPSZ256rmi */ |
| 101433 | 61590, |
| 101434 | /* VRANGEPSZ256rmik */ |
| 101435 | 61594, |
| 101436 | /* VRANGEPSZ256rmikz */ |
| 101437 | 61600, |
| 101438 | /* VRANGEPSZ256rri */ |
| 101439 | 61605, |
| 101440 | /* VRANGEPSZ256rrik */ |
| 101441 | 61609, |
| 101442 | /* VRANGEPSZ256rrikz */ |
| 101443 | 61615, |
| 101444 | /* VRANGEPSZrmbi */ |
| 101445 | 61620, |
| 101446 | /* VRANGEPSZrmbik */ |
| 101447 | 61624, |
| 101448 | /* VRANGEPSZrmbikz */ |
| 101449 | 61630, |
| 101450 | /* VRANGEPSZrmi */ |
| 101451 | 61635, |
| 101452 | /* VRANGEPSZrmik */ |
| 101453 | 61639, |
| 101454 | /* VRANGEPSZrmikz */ |
| 101455 | 61645, |
| 101456 | /* VRANGEPSZrri */ |
| 101457 | 61650, |
| 101458 | /* VRANGEPSZrrib */ |
| 101459 | 61654, |
| 101460 | /* VRANGEPSZrribk */ |
| 101461 | 61658, |
| 101462 | /* VRANGEPSZrribkz */ |
| 101463 | 61664, |
| 101464 | /* VRANGEPSZrrik */ |
| 101465 | 61669, |
| 101466 | /* VRANGEPSZrrikz */ |
| 101467 | 61675, |
| 101468 | /* VRANGESDZrmi */ |
| 101469 | 61680, |
| 101470 | /* VRANGESDZrmik */ |
| 101471 | 61684, |
| 101472 | /* VRANGESDZrmikz */ |
| 101473 | 61690, |
| 101474 | /* VRANGESDZrri */ |
| 101475 | 61695, |
| 101476 | /* VRANGESDZrrib */ |
| 101477 | 61699, |
| 101478 | /* VRANGESDZrribk */ |
| 101479 | 61703, |
| 101480 | /* VRANGESDZrribkz */ |
| 101481 | 61709, |
| 101482 | /* VRANGESDZrrik */ |
| 101483 | 61714, |
| 101484 | /* VRANGESDZrrikz */ |
| 101485 | 61720, |
| 101486 | /* VRANGESSZrmi */ |
| 101487 | 61725, |
| 101488 | /* VRANGESSZrmik */ |
| 101489 | 61729, |
| 101490 | /* VRANGESSZrmikz */ |
| 101491 | 61735, |
| 101492 | /* VRANGESSZrri */ |
| 101493 | 61740, |
| 101494 | /* VRANGESSZrrib */ |
| 101495 | 61744, |
| 101496 | /* VRANGESSZrribk */ |
| 101497 | 61748, |
| 101498 | /* VRANGESSZrribkz */ |
| 101499 | 61754, |
| 101500 | /* VRANGESSZrrik */ |
| 101501 | 61759, |
| 101502 | /* VRANGESSZrrikz */ |
| 101503 | 61765, |
| 101504 | /* VRCP14PDZ128m */ |
| 101505 | 61770, |
| 101506 | /* VRCP14PDZ128mb */ |
| 101507 | 61772, |
| 101508 | /* VRCP14PDZ128mbk */ |
| 101509 | 61774, |
| 101510 | /* VRCP14PDZ128mbkz */ |
| 101511 | 61778, |
| 101512 | /* VRCP14PDZ128mk */ |
| 101513 | 61781, |
| 101514 | /* VRCP14PDZ128mkz */ |
| 101515 | 61785, |
| 101516 | /* VRCP14PDZ128r */ |
| 101517 | 61788, |
| 101518 | /* VRCP14PDZ128rk */ |
| 101519 | 61790, |
| 101520 | /* VRCP14PDZ128rkz */ |
| 101521 | 61794, |
| 101522 | /* VRCP14PDZ256m */ |
| 101523 | 61797, |
| 101524 | /* VRCP14PDZ256mb */ |
| 101525 | 61799, |
| 101526 | /* VRCP14PDZ256mbk */ |
| 101527 | 61801, |
| 101528 | /* VRCP14PDZ256mbkz */ |
| 101529 | 61805, |
| 101530 | /* VRCP14PDZ256mk */ |
| 101531 | 61808, |
| 101532 | /* VRCP14PDZ256mkz */ |
| 101533 | 61812, |
| 101534 | /* VRCP14PDZ256r */ |
| 101535 | 61815, |
| 101536 | /* VRCP14PDZ256rk */ |
| 101537 | 61817, |
| 101538 | /* VRCP14PDZ256rkz */ |
| 101539 | 61821, |
| 101540 | /* VRCP14PDZm */ |
| 101541 | 61824, |
| 101542 | /* VRCP14PDZmb */ |
| 101543 | 61826, |
| 101544 | /* VRCP14PDZmbk */ |
| 101545 | 61828, |
| 101546 | /* VRCP14PDZmbkz */ |
| 101547 | 61832, |
| 101548 | /* VRCP14PDZmk */ |
| 101549 | 61835, |
| 101550 | /* VRCP14PDZmkz */ |
| 101551 | 61839, |
| 101552 | /* VRCP14PDZr */ |
| 101553 | 61842, |
| 101554 | /* VRCP14PDZrk */ |
| 101555 | 61844, |
| 101556 | /* VRCP14PDZrkz */ |
| 101557 | 61848, |
| 101558 | /* VRCP14PSZ128m */ |
| 101559 | 61851, |
| 101560 | /* VRCP14PSZ128mb */ |
| 101561 | 61853, |
| 101562 | /* VRCP14PSZ128mbk */ |
| 101563 | 61855, |
| 101564 | /* VRCP14PSZ128mbkz */ |
| 101565 | 61859, |
| 101566 | /* VRCP14PSZ128mk */ |
| 101567 | 61862, |
| 101568 | /* VRCP14PSZ128mkz */ |
| 101569 | 61866, |
| 101570 | /* VRCP14PSZ128r */ |
| 101571 | 61869, |
| 101572 | /* VRCP14PSZ128rk */ |
| 101573 | 61871, |
| 101574 | /* VRCP14PSZ128rkz */ |
| 101575 | 61875, |
| 101576 | /* VRCP14PSZ256m */ |
| 101577 | 61878, |
| 101578 | /* VRCP14PSZ256mb */ |
| 101579 | 61880, |
| 101580 | /* VRCP14PSZ256mbk */ |
| 101581 | 61882, |
| 101582 | /* VRCP14PSZ256mbkz */ |
| 101583 | 61886, |
| 101584 | /* VRCP14PSZ256mk */ |
| 101585 | 61889, |
| 101586 | /* VRCP14PSZ256mkz */ |
| 101587 | 61893, |
| 101588 | /* VRCP14PSZ256r */ |
| 101589 | 61896, |
| 101590 | /* VRCP14PSZ256rk */ |
| 101591 | 61898, |
| 101592 | /* VRCP14PSZ256rkz */ |
| 101593 | 61902, |
| 101594 | /* VRCP14PSZm */ |
| 101595 | 61905, |
| 101596 | /* VRCP14PSZmb */ |
| 101597 | 61907, |
| 101598 | /* VRCP14PSZmbk */ |
| 101599 | 61909, |
| 101600 | /* VRCP14PSZmbkz */ |
| 101601 | 61913, |
| 101602 | /* VRCP14PSZmk */ |
| 101603 | 61916, |
| 101604 | /* VRCP14PSZmkz */ |
| 101605 | 61920, |
| 101606 | /* VRCP14PSZr */ |
| 101607 | 61923, |
| 101608 | /* VRCP14PSZrk */ |
| 101609 | 61925, |
| 101610 | /* VRCP14PSZrkz */ |
| 101611 | 61929, |
| 101612 | /* VRCP14SDZrm */ |
| 101613 | 61932, |
| 101614 | /* VRCP14SDZrmk */ |
| 101615 | 61935, |
| 101616 | /* VRCP14SDZrmkz */ |
| 101617 | 61940, |
| 101618 | /* VRCP14SDZrr */ |
| 101619 | 61944, |
| 101620 | /* VRCP14SDZrrk */ |
| 101621 | 61947, |
| 101622 | /* VRCP14SDZrrkz */ |
| 101623 | 61952, |
| 101624 | /* VRCP14SSZrm */ |
| 101625 | 61956, |
| 101626 | /* VRCP14SSZrmk */ |
| 101627 | 61959, |
| 101628 | /* VRCP14SSZrmkz */ |
| 101629 | 61964, |
| 101630 | /* VRCP14SSZrr */ |
| 101631 | 61968, |
| 101632 | /* VRCP14SSZrrk */ |
| 101633 | 61971, |
| 101634 | /* VRCP14SSZrrkz */ |
| 101635 | 61976, |
| 101636 | /* VRCP28PDZm */ |
| 101637 | 61980, |
| 101638 | /* VRCP28PDZmb */ |
| 101639 | 61982, |
| 101640 | /* VRCP28PDZmbk */ |
| 101641 | 61984, |
| 101642 | /* VRCP28PDZmbkz */ |
| 101643 | 61988, |
| 101644 | /* VRCP28PDZmk */ |
| 101645 | 61991, |
| 101646 | /* VRCP28PDZmkz */ |
| 101647 | 61995, |
| 101648 | /* VRCP28PDZr */ |
| 101649 | 61998, |
| 101650 | /* VRCP28PDZrb */ |
| 101651 | 62000, |
| 101652 | /* VRCP28PDZrbk */ |
| 101653 | 62002, |
| 101654 | /* VRCP28PDZrbkz */ |
| 101655 | 62006, |
| 101656 | /* VRCP28PDZrk */ |
| 101657 | 62009, |
| 101658 | /* VRCP28PDZrkz */ |
| 101659 | 62013, |
| 101660 | /* VRCP28PSZm */ |
| 101661 | 62016, |
| 101662 | /* VRCP28PSZmb */ |
| 101663 | 62018, |
| 101664 | /* VRCP28PSZmbk */ |
| 101665 | 62020, |
| 101666 | /* VRCP28PSZmbkz */ |
| 101667 | 62024, |
| 101668 | /* VRCP28PSZmk */ |
| 101669 | 62027, |
| 101670 | /* VRCP28PSZmkz */ |
| 101671 | 62031, |
| 101672 | /* VRCP28PSZr */ |
| 101673 | 62034, |
| 101674 | /* VRCP28PSZrb */ |
| 101675 | 62036, |
| 101676 | /* VRCP28PSZrbk */ |
| 101677 | 62038, |
| 101678 | /* VRCP28PSZrbkz */ |
| 101679 | 62042, |
| 101680 | /* VRCP28PSZrk */ |
| 101681 | 62045, |
| 101682 | /* VRCP28PSZrkz */ |
| 101683 | 62049, |
| 101684 | /* VRCP28SDZm */ |
| 101685 | 62052, |
| 101686 | /* VRCP28SDZmk */ |
| 101687 | 62055, |
| 101688 | /* VRCP28SDZmkz */ |
| 101689 | 62060, |
| 101690 | /* VRCP28SDZr */ |
| 101691 | 62064, |
| 101692 | /* VRCP28SDZrb */ |
| 101693 | 62067, |
| 101694 | /* VRCP28SDZrbk */ |
| 101695 | 62070, |
| 101696 | /* VRCP28SDZrbkz */ |
| 101697 | 62075, |
| 101698 | /* VRCP28SDZrk */ |
| 101699 | 62079, |
| 101700 | /* VRCP28SDZrkz */ |
| 101701 | 62084, |
| 101702 | /* VRCP28SSZm */ |
| 101703 | 62088, |
| 101704 | /* VRCP28SSZmk */ |
| 101705 | 62091, |
| 101706 | /* VRCP28SSZmkz */ |
| 101707 | 62096, |
| 101708 | /* VRCP28SSZr */ |
| 101709 | 62100, |
| 101710 | /* VRCP28SSZrb */ |
| 101711 | 62103, |
| 101712 | /* VRCP28SSZrbk */ |
| 101713 | 62106, |
| 101714 | /* VRCP28SSZrbkz */ |
| 101715 | 62111, |
| 101716 | /* VRCP28SSZrk */ |
| 101717 | 62115, |
| 101718 | /* VRCP28SSZrkz */ |
| 101719 | 62120, |
| 101720 | /* VRCPPHZ128m */ |
| 101721 | 62124, |
| 101722 | /* VRCPPHZ128mb */ |
| 101723 | 62126, |
| 101724 | /* VRCPPHZ128mbk */ |
| 101725 | 62128, |
| 101726 | /* VRCPPHZ128mbkz */ |
| 101727 | 62132, |
| 101728 | /* VRCPPHZ128mk */ |
| 101729 | 62135, |
| 101730 | /* VRCPPHZ128mkz */ |
| 101731 | 62139, |
| 101732 | /* VRCPPHZ128r */ |
| 101733 | 62142, |
| 101734 | /* VRCPPHZ128rk */ |
| 101735 | 62144, |
| 101736 | /* VRCPPHZ128rkz */ |
| 101737 | 62148, |
| 101738 | /* VRCPPHZ256m */ |
| 101739 | 62151, |
| 101740 | /* VRCPPHZ256mb */ |
| 101741 | 62153, |
| 101742 | /* VRCPPHZ256mbk */ |
| 101743 | 62155, |
| 101744 | /* VRCPPHZ256mbkz */ |
| 101745 | 62159, |
| 101746 | /* VRCPPHZ256mk */ |
| 101747 | 62162, |
| 101748 | /* VRCPPHZ256mkz */ |
| 101749 | 62166, |
| 101750 | /* VRCPPHZ256r */ |
| 101751 | 62169, |
| 101752 | /* VRCPPHZ256rk */ |
| 101753 | 62171, |
| 101754 | /* VRCPPHZ256rkz */ |
| 101755 | 62175, |
| 101756 | /* VRCPPHZm */ |
| 101757 | 62178, |
| 101758 | /* VRCPPHZmb */ |
| 101759 | 62180, |
| 101760 | /* VRCPPHZmbk */ |
| 101761 | 62182, |
| 101762 | /* VRCPPHZmbkz */ |
| 101763 | 62186, |
| 101764 | /* VRCPPHZmk */ |
| 101765 | 62189, |
| 101766 | /* VRCPPHZmkz */ |
| 101767 | 62193, |
| 101768 | /* VRCPPHZr */ |
| 101769 | 62196, |
| 101770 | /* VRCPPHZrk */ |
| 101771 | 62198, |
| 101772 | /* VRCPPHZrkz */ |
| 101773 | 62202, |
| 101774 | /* VRCPPSYm */ |
| 101775 | 62205, |
| 101776 | /* VRCPPSYr */ |
| 101777 | 62207, |
| 101778 | /* VRCPPSm */ |
| 101779 | 62209, |
| 101780 | /* VRCPPSr */ |
| 101781 | 62211, |
| 101782 | /* VRCPSHZrm */ |
| 101783 | 62213, |
| 101784 | /* VRCPSHZrmk */ |
| 101785 | 62216, |
| 101786 | /* VRCPSHZrmkz */ |
| 101787 | 62221, |
| 101788 | /* VRCPSHZrr */ |
| 101789 | 62225, |
| 101790 | /* VRCPSHZrrk */ |
| 101791 | 62228, |
| 101792 | /* VRCPSHZrrkz */ |
| 101793 | 62233, |
| 101794 | /* VRCPSSm */ |
| 101795 | 62237, |
| 101796 | /* VRCPSSm_Int */ |
| 101797 | 62240, |
| 101798 | /* VRCPSSr */ |
| 101799 | 62243, |
| 101800 | /* VRCPSSr_Int */ |
| 101801 | 62246, |
| 101802 | /* VREDUCEPDZ128rmbi */ |
| 101803 | 62249, |
| 101804 | /* VREDUCEPDZ128rmbik */ |
| 101805 | 62252, |
| 101806 | /* VREDUCEPDZ128rmbikz */ |
| 101807 | 62257, |
| 101808 | /* VREDUCEPDZ128rmi */ |
| 101809 | 62261, |
| 101810 | /* VREDUCEPDZ128rmik */ |
| 101811 | 62264, |
| 101812 | /* VREDUCEPDZ128rmikz */ |
| 101813 | 62269, |
| 101814 | /* VREDUCEPDZ128rri */ |
| 101815 | 62273, |
| 101816 | /* VREDUCEPDZ128rrik */ |
| 101817 | 62276, |
| 101818 | /* VREDUCEPDZ128rrikz */ |
| 101819 | 62281, |
| 101820 | /* VREDUCEPDZ256rmbi */ |
| 101821 | 62285, |
| 101822 | /* VREDUCEPDZ256rmbik */ |
| 101823 | 62288, |
| 101824 | /* VREDUCEPDZ256rmbikz */ |
| 101825 | 62293, |
| 101826 | /* VREDUCEPDZ256rmi */ |
| 101827 | 62297, |
| 101828 | /* VREDUCEPDZ256rmik */ |
| 101829 | 62300, |
| 101830 | /* VREDUCEPDZ256rmikz */ |
| 101831 | 62305, |
| 101832 | /* VREDUCEPDZ256rri */ |
| 101833 | 62309, |
| 101834 | /* VREDUCEPDZ256rrik */ |
| 101835 | 62312, |
| 101836 | /* VREDUCEPDZ256rrikz */ |
| 101837 | 62317, |
| 101838 | /* VREDUCEPDZrmbi */ |
| 101839 | 62321, |
| 101840 | /* VREDUCEPDZrmbik */ |
| 101841 | 62324, |
| 101842 | /* VREDUCEPDZrmbikz */ |
| 101843 | 62329, |
| 101844 | /* VREDUCEPDZrmi */ |
| 101845 | 62333, |
| 101846 | /* VREDUCEPDZrmik */ |
| 101847 | 62336, |
| 101848 | /* VREDUCEPDZrmikz */ |
| 101849 | 62341, |
| 101850 | /* VREDUCEPDZrri */ |
| 101851 | 62345, |
| 101852 | /* VREDUCEPDZrrib */ |
| 101853 | 62348, |
| 101854 | /* VREDUCEPDZrribk */ |
| 101855 | 62351, |
| 101856 | /* VREDUCEPDZrribkz */ |
| 101857 | 62356, |
| 101858 | /* VREDUCEPDZrrik */ |
| 101859 | 62360, |
| 101860 | /* VREDUCEPDZrrikz */ |
| 101861 | 62365, |
| 101862 | /* VREDUCEPHZ128rmbi */ |
| 101863 | 62369, |
| 101864 | /* VREDUCEPHZ128rmbik */ |
| 101865 | 62372, |
| 101866 | /* VREDUCEPHZ128rmbikz */ |
| 101867 | 62377, |
| 101868 | /* VREDUCEPHZ128rmi */ |
| 101869 | 62381, |
| 101870 | /* VREDUCEPHZ128rmik */ |
| 101871 | 62384, |
| 101872 | /* VREDUCEPHZ128rmikz */ |
| 101873 | 62389, |
| 101874 | /* VREDUCEPHZ128rri */ |
| 101875 | 62393, |
| 101876 | /* VREDUCEPHZ128rrik */ |
| 101877 | 62396, |
| 101878 | /* VREDUCEPHZ128rrikz */ |
| 101879 | 62401, |
| 101880 | /* VREDUCEPHZ256rmbi */ |
| 101881 | 62405, |
| 101882 | /* VREDUCEPHZ256rmbik */ |
| 101883 | 62408, |
| 101884 | /* VREDUCEPHZ256rmbikz */ |
| 101885 | 62413, |
| 101886 | /* VREDUCEPHZ256rmi */ |
| 101887 | 62417, |
| 101888 | /* VREDUCEPHZ256rmik */ |
| 101889 | 62420, |
| 101890 | /* VREDUCEPHZ256rmikz */ |
| 101891 | 62425, |
| 101892 | /* VREDUCEPHZ256rri */ |
| 101893 | 62429, |
| 101894 | /* VREDUCEPHZ256rrik */ |
| 101895 | 62432, |
| 101896 | /* VREDUCEPHZ256rrikz */ |
| 101897 | 62437, |
| 101898 | /* VREDUCEPHZrmbi */ |
| 101899 | 62441, |
| 101900 | /* VREDUCEPHZrmbik */ |
| 101901 | 62444, |
| 101902 | /* VREDUCEPHZrmbikz */ |
| 101903 | 62449, |
| 101904 | /* VREDUCEPHZrmi */ |
| 101905 | 62453, |
| 101906 | /* VREDUCEPHZrmik */ |
| 101907 | 62456, |
| 101908 | /* VREDUCEPHZrmikz */ |
| 101909 | 62461, |
| 101910 | /* VREDUCEPHZrri */ |
| 101911 | 62465, |
| 101912 | /* VREDUCEPHZrrib */ |
| 101913 | 62468, |
| 101914 | /* VREDUCEPHZrribk */ |
| 101915 | 62471, |
| 101916 | /* VREDUCEPHZrribkz */ |
| 101917 | 62476, |
| 101918 | /* VREDUCEPHZrrik */ |
| 101919 | 62480, |
| 101920 | /* VREDUCEPHZrrikz */ |
| 101921 | 62485, |
| 101922 | /* VREDUCEPSZ128rmbi */ |
| 101923 | 62489, |
| 101924 | /* VREDUCEPSZ128rmbik */ |
| 101925 | 62492, |
| 101926 | /* VREDUCEPSZ128rmbikz */ |
| 101927 | 62497, |
| 101928 | /* VREDUCEPSZ128rmi */ |
| 101929 | 62501, |
| 101930 | /* VREDUCEPSZ128rmik */ |
| 101931 | 62504, |
| 101932 | /* VREDUCEPSZ128rmikz */ |
| 101933 | 62509, |
| 101934 | /* VREDUCEPSZ128rri */ |
| 101935 | 62513, |
| 101936 | /* VREDUCEPSZ128rrik */ |
| 101937 | 62516, |
| 101938 | /* VREDUCEPSZ128rrikz */ |
| 101939 | 62521, |
| 101940 | /* VREDUCEPSZ256rmbi */ |
| 101941 | 62525, |
| 101942 | /* VREDUCEPSZ256rmbik */ |
| 101943 | 62528, |
| 101944 | /* VREDUCEPSZ256rmbikz */ |
| 101945 | 62533, |
| 101946 | /* VREDUCEPSZ256rmi */ |
| 101947 | 62537, |
| 101948 | /* VREDUCEPSZ256rmik */ |
| 101949 | 62540, |
| 101950 | /* VREDUCEPSZ256rmikz */ |
| 101951 | 62545, |
| 101952 | /* VREDUCEPSZ256rri */ |
| 101953 | 62549, |
| 101954 | /* VREDUCEPSZ256rrik */ |
| 101955 | 62552, |
| 101956 | /* VREDUCEPSZ256rrikz */ |
| 101957 | 62557, |
| 101958 | /* VREDUCEPSZrmbi */ |
| 101959 | 62561, |
| 101960 | /* VREDUCEPSZrmbik */ |
| 101961 | 62564, |
| 101962 | /* VREDUCEPSZrmbikz */ |
| 101963 | 62569, |
| 101964 | /* VREDUCEPSZrmi */ |
| 101965 | 62573, |
| 101966 | /* VREDUCEPSZrmik */ |
| 101967 | 62576, |
| 101968 | /* VREDUCEPSZrmikz */ |
| 101969 | 62581, |
| 101970 | /* VREDUCEPSZrri */ |
| 101971 | 62585, |
| 101972 | /* VREDUCEPSZrrib */ |
| 101973 | 62588, |
| 101974 | /* VREDUCEPSZrribk */ |
| 101975 | 62591, |
| 101976 | /* VREDUCEPSZrribkz */ |
| 101977 | 62596, |
| 101978 | /* VREDUCEPSZrrik */ |
| 101979 | 62600, |
| 101980 | /* VREDUCEPSZrrikz */ |
| 101981 | 62605, |
| 101982 | /* VREDUCESDZrmi */ |
| 101983 | 62609, |
| 101984 | /* VREDUCESDZrmik */ |
| 101985 | 62613, |
| 101986 | /* VREDUCESDZrmikz */ |
| 101987 | 62619, |
| 101988 | /* VREDUCESDZrri */ |
| 101989 | 62624, |
| 101990 | /* VREDUCESDZrrib */ |
| 101991 | 62628, |
| 101992 | /* VREDUCESDZrribk */ |
| 101993 | 62632, |
| 101994 | /* VREDUCESDZrribkz */ |
| 101995 | 62638, |
| 101996 | /* VREDUCESDZrrik */ |
| 101997 | 62643, |
| 101998 | /* VREDUCESDZrrikz */ |
| 101999 | 62649, |
| 102000 | /* VREDUCESHZrmi */ |
| 102001 | 62654, |
| 102002 | /* VREDUCESHZrmik */ |
| 102003 | 62658, |
| 102004 | /* VREDUCESHZrmikz */ |
| 102005 | 62664, |
| 102006 | /* VREDUCESHZrri */ |
| 102007 | 62669, |
| 102008 | /* VREDUCESHZrrib */ |
| 102009 | 62673, |
| 102010 | /* VREDUCESHZrribk */ |
| 102011 | 62677, |
| 102012 | /* VREDUCESHZrribkz */ |
| 102013 | 62683, |
| 102014 | /* VREDUCESHZrrik */ |
| 102015 | 62688, |
| 102016 | /* VREDUCESHZrrikz */ |
| 102017 | 62694, |
| 102018 | /* VREDUCESSZrmi */ |
| 102019 | 62699, |
| 102020 | /* VREDUCESSZrmik */ |
| 102021 | 62703, |
| 102022 | /* VREDUCESSZrmikz */ |
| 102023 | 62709, |
| 102024 | /* VREDUCESSZrri */ |
| 102025 | 62714, |
| 102026 | /* VREDUCESSZrrib */ |
| 102027 | 62718, |
| 102028 | /* VREDUCESSZrribk */ |
| 102029 | 62722, |
| 102030 | /* VREDUCESSZrribkz */ |
| 102031 | 62728, |
| 102032 | /* VREDUCESSZrrik */ |
| 102033 | 62733, |
| 102034 | /* VREDUCESSZrrikz */ |
| 102035 | 62739, |
| 102036 | /* VRNDSCALEPDZ128rmbi */ |
| 102037 | 62744, |
| 102038 | /* VRNDSCALEPDZ128rmbik */ |
| 102039 | 62747, |
| 102040 | /* VRNDSCALEPDZ128rmbikz */ |
| 102041 | 62752, |
| 102042 | /* VRNDSCALEPDZ128rmi */ |
| 102043 | 62756, |
| 102044 | /* VRNDSCALEPDZ128rmik */ |
| 102045 | 62759, |
| 102046 | /* VRNDSCALEPDZ128rmikz */ |
| 102047 | 62764, |
| 102048 | /* VRNDSCALEPDZ128rri */ |
| 102049 | 62768, |
| 102050 | /* VRNDSCALEPDZ128rrik */ |
| 102051 | 62771, |
| 102052 | /* VRNDSCALEPDZ128rrikz */ |
| 102053 | 62776, |
| 102054 | /* VRNDSCALEPDZ256rmbi */ |
| 102055 | 62780, |
| 102056 | /* VRNDSCALEPDZ256rmbik */ |
| 102057 | 62783, |
| 102058 | /* VRNDSCALEPDZ256rmbikz */ |
| 102059 | 62788, |
| 102060 | /* VRNDSCALEPDZ256rmi */ |
| 102061 | 62792, |
| 102062 | /* VRNDSCALEPDZ256rmik */ |
| 102063 | 62795, |
| 102064 | /* VRNDSCALEPDZ256rmikz */ |
| 102065 | 62800, |
| 102066 | /* VRNDSCALEPDZ256rri */ |
| 102067 | 62804, |
| 102068 | /* VRNDSCALEPDZ256rrik */ |
| 102069 | 62807, |
| 102070 | /* VRNDSCALEPDZ256rrikz */ |
| 102071 | 62812, |
| 102072 | /* VRNDSCALEPDZrmbi */ |
| 102073 | 62816, |
| 102074 | /* VRNDSCALEPDZrmbik */ |
| 102075 | 62819, |
| 102076 | /* VRNDSCALEPDZrmbikz */ |
| 102077 | 62824, |
| 102078 | /* VRNDSCALEPDZrmi */ |
| 102079 | 62828, |
| 102080 | /* VRNDSCALEPDZrmik */ |
| 102081 | 62831, |
| 102082 | /* VRNDSCALEPDZrmikz */ |
| 102083 | 62836, |
| 102084 | /* VRNDSCALEPDZrri */ |
| 102085 | 62840, |
| 102086 | /* VRNDSCALEPDZrrib */ |
| 102087 | 62843, |
| 102088 | /* VRNDSCALEPDZrribk */ |
| 102089 | 62846, |
| 102090 | /* VRNDSCALEPDZrribkz */ |
| 102091 | 62851, |
| 102092 | /* VRNDSCALEPDZrrik */ |
| 102093 | 62855, |
| 102094 | /* VRNDSCALEPDZrrikz */ |
| 102095 | 62860, |
| 102096 | /* VRNDSCALEPHZ128rmbi */ |
| 102097 | 62864, |
| 102098 | /* VRNDSCALEPHZ128rmbik */ |
| 102099 | 62867, |
| 102100 | /* VRNDSCALEPHZ128rmbikz */ |
| 102101 | 62872, |
| 102102 | /* VRNDSCALEPHZ128rmi */ |
| 102103 | 62876, |
| 102104 | /* VRNDSCALEPHZ128rmik */ |
| 102105 | 62879, |
| 102106 | /* VRNDSCALEPHZ128rmikz */ |
| 102107 | 62884, |
| 102108 | /* VRNDSCALEPHZ128rri */ |
| 102109 | 62888, |
| 102110 | /* VRNDSCALEPHZ128rrik */ |
| 102111 | 62891, |
| 102112 | /* VRNDSCALEPHZ128rrikz */ |
| 102113 | 62896, |
| 102114 | /* VRNDSCALEPHZ256rmbi */ |
| 102115 | 62900, |
| 102116 | /* VRNDSCALEPHZ256rmbik */ |
| 102117 | 62903, |
| 102118 | /* VRNDSCALEPHZ256rmbikz */ |
| 102119 | 62908, |
| 102120 | /* VRNDSCALEPHZ256rmi */ |
| 102121 | 62912, |
| 102122 | /* VRNDSCALEPHZ256rmik */ |
| 102123 | 62915, |
| 102124 | /* VRNDSCALEPHZ256rmikz */ |
| 102125 | 62920, |
| 102126 | /* VRNDSCALEPHZ256rri */ |
| 102127 | 62924, |
| 102128 | /* VRNDSCALEPHZ256rrik */ |
| 102129 | 62927, |
| 102130 | /* VRNDSCALEPHZ256rrikz */ |
| 102131 | 62932, |
| 102132 | /* VRNDSCALEPHZrmbi */ |
| 102133 | 62936, |
| 102134 | /* VRNDSCALEPHZrmbik */ |
| 102135 | 62939, |
| 102136 | /* VRNDSCALEPHZrmbikz */ |
| 102137 | 62944, |
| 102138 | /* VRNDSCALEPHZrmi */ |
| 102139 | 62948, |
| 102140 | /* VRNDSCALEPHZrmik */ |
| 102141 | 62951, |
| 102142 | /* VRNDSCALEPHZrmikz */ |
| 102143 | 62956, |
| 102144 | /* VRNDSCALEPHZrri */ |
| 102145 | 62960, |
| 102146 | /* VRNDSCALEPHZrrib */ |
| 102147 | 62963, |
| 102148 | /* VRNDSCALEPHZrribk */ |
| 102149 | 62966, |
| 102150 | /* VRNDSCALEPHZrribkz */ |
| 102151 | 62971, |
| 102152 | /* VRNDSCALEPHZrrik */ |
| 102153 | 62975, |
| 102154 | /* VRNDSCALEPHZrrikz */ |
| 102155 | 62980, |
| 102156 | /* VRNDSCALEPSZ128rmbi */ |
| 102157 | 62984, |
| 102158 | /* VRNDSCALEPSZ128rmbik */ |
| 102159 | 62987, |
| 102160 | /* VRNDSCALEPSZ128rmbikz */ |
| 102161 | 62992, |
| 102162 | /* VRNDSCALEPSZ128rmi */ |
| 102163 | 62996, |
| 102164 | /* VRNDSCALEPSZ128rmik */ |
| 102165 | 62999, |
| 102166 | /* VRNDSCALEPSZ128rmikz */ |
| 102167 | 63004, |
| 102168 | /* VRNDSCALEPSZ128rri */ |
| 102169 | 63008, |
| 102170 | /* VRNDSCALEPSZ128rrik */ |
| 102171 | 63011, |
| 102172 | /* VRNDSCALEPSZ128rrikz */ |
| 102173 | 63016, |
| 102174 | /* VRNDSCALEPSZ256rmbi */ |
| 102175 | 63020, |
| 102176 | /* VRNDSCALEPSZ256rmbik */ |
| 102177 | 63023, |
| 102178 | /* VRNDSCALEPSZ256rmbikz */ |
| 102179 | 63028, |
| 102180 | /* VRNDSCALEPSZ256rmi */ |
| 102181 | 63032, |
| 102182 | /* VRNDSCALEPSZ256rmik */ |
| 102183 | 63035, |
| 102184 | /* VRNDSCALEPSZ256rmikz */ |
| 102185 | 63040, |
| 102186 | /* VRNDSCALEPSZ256rri */ |
| 102187 | 63044, |
| 102188 | /* VRNDSCALEPSZ256rrik */ |
| 102189 | 63047, |
| 102190 | /* VRNDSCALEPSZ256rrikz */ |
| 102191 | 63052, |
| 102192 | /* VRNDSCALEPSZrmbi */ |
| 102193 | 63056, |
| 102194 | /* VRNDSCALEPSZrmbik */ |
| 102195 | 63059, |
| 102196 | /* VRNDSCALEPSZrmbikz */ |
| 102197 | 63064, |
| 102198 | /* VRNDSCALEPSZrmi */ |
| 102199 | 63068, |
| 102200 | /* VRNDSCALEPSZrmik */ |
| 102201 | 63071, |
| 102202 | /* VRNDSCALEPSZrmikz */ |
| 102203 | 63076, |
| 102204 | /* VRNDSCALEPSZrri */ |
| 102205 | 63080, |
| 102206 | /* VRNDSCALEPSZrrib */ |
| 102207 | 63083, |
| 102208 | /* VRNDSCALEPSZrribk */ |
| 102209 | 63086, |
| 102210 | /* VRNDSCALEPSZrribkz */ |
| 102211 | 63091, |
| 102212 | /* VRNDSCALEPSZrrik */ |
| 102213 | 63095, |
| 102214 | /* VRNDSCALEPSZrrikz */ |
| 102215 | 63100, |
| 102216 | /* VRNDSCALESDZm */ |
| 102217 | 63104, |
| 102218 | /* VRNDSCALESDZm_Int */ |
| 102219 | 63108, |
| 102220 | /* VRNDSCALESDZm_Intk */ |
| 102221 | 63112, |
| 102222 | /* VRNDSCALESDZm_Intkz */ |
| 102223 | 63118, |
| 102224 | /* VRNDSCALESDZr */ |
| 102225 | 63123, |
| 102226 | /* VRNDSCALESDZr_Int */ |
| 102227 | 63127, |
| 102228 | /* VRNDSCALESDZr_Intk */ |
| 102229 | 63131, |
| 102230 | /* VRNDSCALESDZr_Intkz */ |
| 102231 | 63137, |
| 102232 | /* VRNDSCALESDZrb_Int */ |
| 102233 | 63142, |
| 102234 | /* VRNDSCALESDZrb_Intk */ |
| 102235 | 63146, |
| 102236 | /* VRNDSCALESDZrb_Intkz */ |
| 102237 | 63152, |
| 102238 | /* VRNDSCALESHZm */ |
| 102239 | 63157, |
| 102240 | /* VRNDSCALESHZm_Int */ |
| 102241 | 63161, |
| 102242 | /* VRNDSCALESHZm_Intk */ |
| 102243 | 63165, |
| 102244 | /* VRNDSCALESHZm_Intkz */ |
| 102245 | 63171, |
| 102246 | /* VRNDSCALESHZr */ |
| 102247 | 63176, |
| 102248 | /* VRNDSCALESHZr_Int */ |
| 102249 | 63180, |
| 102250 | /* VRNDSCALESHZr_Intk */ |
| 102251 | 63184, |
| 102252 | /* VRNDSCALESHZr_Intkz */ |
| 102253 | 63190, |
| 102254 | /* VRNDSCALESHZrb_Int */ |
| 102255 | 63195, |
| 102256 | /* VRNDSCALESHZrb_Intk */ |
| 102257 | 63199, |
| 102258 | /* VRNDSCALESHZrb_Intkz */ |
| 102259 | 63205, |
| 102260 | /* VRNDSCALESSZm */ |
| 102261 | 63210, |
| 102262 | /* VRNDSCALESSZm_Int */ |
| 102263 | 63214, |
| 102264 | /* VRNDSCALESSZm_Intk */ |
| 102265 | 63218, |
| 102266 | /* VRNDSCALESSZm_Intkz */ |
| 102267 | 63224, |
| 102268 | /* VRNDSCALESSZr */ |
| 102269 | 63229, |
| 102270 | /* VRNDSCALESSZr_Int */ |
| 102271 | 63233, |
| 102272 | /* VRNDSCALESSZr_Intk */ |
| 102273 | 63237, |
| 102274 | /* VRNDSCALESSZr_Intkz */ |
| 102275 | 63243, |
| 102276 | /* VRNDSCALESSZrb_Int */ |
| 102277 | 63248, |
| 102278 | /* VRNDSCALESSZrb_Intk */ |
| 102279 | 63252, |
| 102280 | /* VRNDSCALESSZrb_Intkz */ |
| 102281 | 63258, |
| 102282 | /* VROUNDPDYmi */ |
| 102283 | 63263, |
| 102284 | /* VROUNDPDYri */ |
| 102285 | 63266, |
| 102286 | /* VROUNDPDmi */ |
| 102287 | 63269, |
| 102288 | /* VROUNDPDri */ |
| 102289 | 63272, |
| 102290 | /* VROUNDPSYmi */ |
| 102291 | 63275, |
| 102292 | /* VROUNDPSYri */ |
| 102293 | 63278, |
| 102294 | /* VROUNDPSmi */ |
| 102295 | 63281, |
| 102296 | /* VROUNDPSri */ |
| 102297 | 63284, |
| 102298 | /* VROUNDSDmi */ |
| 102299 | 63287, |
| 102300 | /* VROUNDSDmi_Int */ |
| 102301 | 63291, |
| 102302 | /* VROUNDSDri */ |
| 102303 | 63295, |
| 102304 | /* VROUNDSDri_Int */ |
| 102305 | 63299, |
| 102306 | /* VROUNDSSmi */ |
| 102307 | 63303, |
| 102308 | /* VROUNDSSmi_Int */ |
| 102309 | 63307, |
| 102310 | /* VROUNDSSri */ |
| 102311 | 63311, |
| 102312 | /* VROUNDSSri_Int */ |
| 102313 | 63315, |
| 102314 | /* VRSQRT14PDZ128m */ |
| 102315 | 63319, |
| 102316 | /* VRSQRT14PDZ128mb */ |
| 102317 | 63321, |
| 102318 | /* VRSQRT14PDZ128mbk */ |
| 102319 | 63323, |
| 102320 | /* VRSQRT14PDZ128mbkz */ |
| 102321 | 63327, |
| 102322 | /* VRSQRT14PDZ128mk */ |
| 102323 | 63330, |
| 102324 | /* VRSQRT14PDZ128mkz */ |
| 102325 | 63334, |
| 102326 | /* VRSQRT14PDZ128r */ |
| 102327 | 63337, |
| 102328 | /* VRSQRT14PDZ128rk */ |
| 102329 | 63339, |
| 102330 | /* VRSQRT14PDZ128rkz */ |
| 102331 | 63343, |
| 102332 | /* VRSQRT14PDZ256m */ |
| 102333 | 63346, |
| 102334 | /* VRSQRT14PDZ256mb */ |
| 102335 | 63348, |
| 102336 | /* VRSQRT14PDZ256mbk */ |
| 102337 | 63350, |
| 102338 | /* VRSQRT14PDZ256mbkz */ |
| 102339 | 63354, |
| 102340 | /* VRSQRT14PDZ256mk */ |
| 102341 | 63357, |
| 102342 | /* VRSQRT14PDZ256mkz */ |
| 102343 | 63361, |
| 102344 | /* VRSQRT14PDZ256r */ |
| 102345 | 63364, |
| 102346 | /* VRSQRT14PDZ256rk */ |
| 102347 | 63366, |
| 102348 | /* VRSQRT14PDZ256rkz */ |
| 102349 | 63370, |
| 102350 | /* VRSQRT14PDZm */ |
| 102351 | 63373, |
| 102352 | /* VRSQRT14PDZmb */ |
| 102353 | 63375, |
| 102354 | /* VRSQRT14PDZmbk */ |
| 102355 | 63377, |
| 102356 | /* VRSQRT14PDZmbkz */ |
| 102357 | 63381, |
| 102358 | /* VRSQRT14PDZmk */ |
| 102359 | 63384, |
| 102360 | /* VRSQRT14PDZmkz */ |
| 102361 | 63388, |
| 102362 | /* VRSQRT14PDZr */ |
| 102363 | 63391, |
| 102364 | /* VRSQRT14PDZrk */ |
| 102365 | 63393, |
| 102366 | /* VRSQRT14PDZrkz */ |
| 102367 | 63397, |
| 102368 | /* VRSQRT14PSZ128m */ |
| 102369 | 63400, |
| 102370 | /* VRSQRT14PSZ128mb */ |
| 102371 | 63402, |
| 102372 | /* VRSQRT14PSZ128mbk */ |
| 102373 | 63404, |
| 102374 | /* VRSQRT14PSZ128mbkz */ |
| 102375 | 63408, |
| 102376 | /* VRSQRT14PSZ128mk */ |
| 102377 | 63411, |
| 102378 | /* VRSQRT14PSZ128mkz */ |
| 102379 | 63415, |
| 102380 | /* VRSQRT14PSZ128r */ |
| 102381 | 63418, |
| 102382 | /* VRSQRT14PSZ128rk */ |
| 102383 | 63420, |
| 102384 | /* VRSQRT14PSZ128rkz */ |
| 102385 | 63424, |
| 102386 | /* VRSQRT14PSZ256m */ |
| 102387 | 63427, |
| 102388 | /* VRSQRT14PSZ256mb */ |
| 102389 | 63429, |
| 102390 | /* VRSQRT14PSZ256mbk */ |
| 102391 | 63431, |
| 102392 | /* VRSQRT14PSZ256mbkz */ |
| 102393 | 63435, |
| 102394 | /* VRSQRT14PSZ256mk */ |
| 102395 | 63438, |
| 102396 | /* VRSQRT14PSZ256mkz */ |
| 102397 | 63442, |
| 102398 | /* VRSQRT14PSZ256r */ |
| 102399 | 63445, |
| 102400 | /* VRSQRT14PSZ256rk */ |
| 102401 | 63447, |
| 102402 | /* VRSQRT14PSZ256rkz */ |
| 102403 | 63451, |
| 102404 | /* VRSQRT14PSZm */ |
| 102405 | 63454, |
| 102406 | /* VRSQRT14PSZmb */ |
| 102407 | 63456, |
| 102408 | /* VRSQRT14PSZmbk */ |
| 102409 | 63458, |
| 102410 | /* VRSQRT14PSZmbkz */ |
| 102411 | 63462, |
| 102412 | /* VRSQRT14PSZmk */ |
| 102413 | 63465, |
| 102414 | /* VRSQRT14PSZmkz */ |
| 102415 | 63469, |
| 102416 | /* VRSQRT14PSZr */ |
| 102417 | 63472, |
| 102418 | /* VRSQRT14PSZrk */ |
| 102419 | 63474, |
| 102420 | /* VRSQRT14PSZrkz */ |
| 102421 | 63478, |
| 102422 | /* VRSQRT14SDZrm */ |
| 102423 | 63481, |
| 102424 | /* VRSQRT14SDZrmk */ |
| 102425 | 63484, |
| 102426 | /* VRSQRT14SDZrmkz */ |
| 102427 | 63489, |
| 102428 | /* VRSQRT14SDZrr */ |
| 102429 | 63493, |
| 102430 | /* VRSQRT14SDZrrk */ |
| 102431 | 63496, |
| 102432 | /* VRSQRT14SDZrrkz */ |
| 102433 | 63501, |
| 102434 | /* VRSQRT14SSZrm */ |
| 102435 | 63505, |
| 102436 | /* VRSQRT14SSZrmk */ |
| 102437 | 63508, |
| 102438 | /* VRSQRT14SSZrmkz */ |
| 102439 | 63513, |
| 102440 | /* VRSQRT14SSZrr */ |
| 102441 | 63517, |
| 102442 | /* VRSQRT14SSZrrk */ |
| 102443 | 63520, |
| 102444 | /* VRSQRT14SSZrrkz */ |
| 102445 | 63525, |
| 102446 | /* VRSQRT28PDZm */ |
| 102447 | 63529, |
| 102448 | /* VRSQRT28PDZmb */ |
| 102449 | 63531, |
| 102450 | /* VRSQRT28PDZmbk */ |
| 102451 | 63533, |
| 102452 | /* VRSQRT28PDZmbkz */ |
| 102453 | 63537, |
| 102454 | /* VRSQRT28PDZmk */ |
| 102455 | 63540, |
| 102456 | /* VRSQRT28PDZmkz */ |
| 102457 | 63544, |
| 102458 | /* VRSQRT28PDZr */ |
| 102459 | 63547, |
| 102460 | /* VRSQRT28PDZrb */ |
| 102461 | 63549, |
| 102462 | /* VRSQRT28PDZrbk */ |
| 102463 | 63551, |
| 102464 | /* VRSQRT28PDZrbkz */ |
| 102465 | 63555, |
| 102466 | /* VRSQRT28PDZrk */ |
| 102467 | 63558, |
| 102468 | /* VRSQRT28PDZrkz */ |
| 102469 | 63562, |
| 102470 | /* VRSQRT28PSZm */ |
| 102471 | 63565, |
| 102472 | /* VRSQRT28PSZmb */ |
| 102473 | 63567, |
| 102474 | /* VRSQRT28PSZmbk */ |
| 102475 | 63569, |
| 102476 | /* VRSQRT28PSZmbkz */ |
| 102477 | 63573, |
| 102478 | /* VRSQRT28PSZmk */ |
| 102479 | 63576, |
| 102480 | /* VRSQRT28PSZmkz */ |
| 102481 | 63580, |
| 102482 | /* VRSQRT28PSZr */ |
| 102483 | 63583, |
| 102484 | /* VRSQRT28PSZrb */ |
| 102485 | 63585, |
| 102486 | /* VRSQRT28PSZrbk */ |
| 102487 | 63587, |
| 102488 | /* VRSQRT28PSZrbkz */ |
| 102489 | 63591, |
| 102490 | /* VRSQRT28PSZrk */ |
| 102491 | 63594, |
| 102492 | /* VRSQRT28PSZrkz */ |
| 102493 | 63598, |
| 102494 | /* VRSQRT28SDZm */ |
| 102495 | 63601, |
| 102496 | /* VRSQRT28SDZmk */ |
| 102497 | 63604, |
| 102498 | /* VRSQRT28SDZmkz */ |
| 102499 | 63609, |
| 102500 | /* VRSQRT28SDZr */ |
| 102501 | 63613, |
| 102502 | /* VRSQRT28SDZrb */ |
| 102503 | 63616, |
| 102504 | /* VRSQRT28SDZrbk */ |
| 102505 | 63619, |
| 102506 | /* VRSQRT28SDZrbkz */ |
| 102507 | 63624, |
| 102508 | /* VRSQRT28SDZrk */ |
| 102509 | 63628, |
| 102510 | /* VRSQRT28SDZrkz */ |
| 102511 | 63633, |
| 102512 | /* VRSQRT28SSZm */ |
| 102513 | 63637, |
| 102514 | /* VRSQRT28SSZmk */ |
| 102515 | 63640, |
| 102516 | /* VRSQRT28SSZmkz */ |
| 102517 | 63645, |
| 102518 | /* VRSQRT28SSZr */ |
| 102519 | 63649, |
| 102520 | /* VRSQRT28SSZrb */ |
| 102521 | 63652, |
| 102522 | /* VRSQRT28SSZrbk */ |
| 102523 | 63655, |
| 102524 | /* VRSQRT28SSZrbkz */ |
| 102525 | 63660, |
| 102526 | /* VRSQRT28SSZrk */ |
| 102527 | 63664, |
| 102528 | /* VRSQRT28SSZrkz */ |
| 102529 | 63669, |
| 102530 | /* VRSQRTPHZ128m */ |
| 102531 | 63673, |
| 102532 | /* VRSQRTPHZ128mb */ |
| 102533 | 63675, |
| 102534 | /* VRSQRTPHZ128mbk */ |
| 102535 | 63677, |
| 102536 | /* VRSQRTPHZ128mbkz */ |
| 102537 | 63681, |
| 102538 | /* VRSQRTPHZ128mk */ |
| 102539 | 63684, |
| 102540 | /* VRSQRTPHZ128mkz */ |
| 102541 | 63688, |
| 102542 | /* VRSQRTPHZ128r */ |
| 102543 | 63691, |
| 102544 | /* VRSQRTPHZ128rk */ |
| 102545 | 63693, |
| 102546 | /* VRSQRTPHZ128rkz */ |
| 102547 | 63697, |
| 102548 | /* VRSQRTPHZ256m */ |
| 102549 | 63700, |
| 102550 | /* VRSQRTPHZ256mb */ |
| 102551 | 63702, |
| 102552 | /* VRSQRTPHZ256mbk */ |
| 102553 | 63704, |
| 102554 | /* VRSQRTPHZ256mbkz */ |
| 102555 | 63708, |
| 102556 | /* VRSQRTPHZ256mk */ |
| 102557 | 63711, |
| 102558 | /* VRSQRTPHZ256mkz */ |
| 102559 | 63715, |
| 102560 | /* VRSQRTPHZ256r */ |
| 102561 | 63718, |
| 102562 | /* VRSQRTPHZ256rk */ |
| 102563 | 63720, |
| 102564 | /* VRSQRTPHZ256rkz */ |
| 102565 | 63724, |
| 102566 | /* VRSQRTPHZm */ |
| 102567 | 63727, |
| 102568 | /* VRSQRTPHZmb */ |
| 102569 | 63729, |
| 102570 | /* VRSQRTPHZmbk */ |
| 102571 | 63731, |
| 102572 | /* VRSQRTPHZmbkz */ |
| 102573 | 63735, |
| 102574 | /* VRSQRTPHZmk */ |
| 102575 | 63738, |
| 102576 | /* VRSQRTPHZmkz */ |
| 102577 | 63742, |
| 102578 | /* VRSQRTPHZr */ |
| 102579 | 63745, |
| 102580 | /* VRSQRTPHZrk */ |
| 102581 | 63747, |
| 102582 | /* VRSQRTPHZrkz */ |
| 102583 | 63751, |
| 102584 | /* VRSQRTPSYm */ |
| 102585 | 63754, |
| 102586 | /* VRSQRTPSYr */ |
| 102587 | 63756, |
| 102588 | /* VRSQRTPSm */ |
| 102589 | 63758, |
| 102590 | /* VRSQRTPSr */ |
| 102591 | 63760, |
| 102592 | /* VRSQRTSHZrm */ |
| 102593 | 63762, |
| 102594 | /* VRSQRTSHZrmk */ |
| 102595 | 63765, |
| 102596 | /* VRSQRTSHZrmkz */ |
| 102597 | 63770, |
| 102598 | /* VRSQRTSHZrr */ |
| 102599 | 63774, |
| 102600 | /* VRSQRTSHZrrk */ |
| 102601 | 63777, |
| 102602 | /* VRSQRTSHZrrkz */ |
| 102603 | 63782, |
| 102604 | /* VRSQRTSSm */ |
| 102605 | 63786, |
| 102606 | /* VRSQRTSSm_Int */ |
| 102607 | 63789, |
| 102608 | /* VRSQRTSSr */ |
| 102609 | 63792, |
| 102610 | /* VRSQRTSSr_Int */ |
| 102611 | 63795, |
| 102612 | /* VSCALEFPDZ128rm */ |
| 102613 | 63798, |
| 102614 | /* VSCALEFPDZ128rmb */ |
| 102615 | 63801, |
| 102616 | /* VSCALEFPDZ128rmbk */ |
| 102617 | 63804, |
| 102618 | /* VSCALEFPDZ128rmbkz */ |
| 102619 | 63809, |
| 102620 | /* VSCALEFPDZ128rmk */ |
| 102621 | 63813, |
| 102622 | /* VSCALEFPDZ128rmkz */ |
| 102623 | 63818, |
| 102624 | /* VSCALEFPDZ128rr */ |
| 102625 | 63822, |
| 102626 | /* VSCALEFPDZ128rrk */ |
| 102627 | 63825, |
| 102628 | /* VSCALEFPDZ128rrkz */ |
| 102629 | 63830, |
| 102630 | /* VSCALEFPDZ256rm */ |
| 102631 | 63834, |
| 102632 | /* VSCALEFPDZ256rmb */ |
| 102633 | 63837, |
| 102634 | /* VSCALEFPDZ256rmbk */ |
| 102635 | 63840, |
| 102636 | /* VSCALEFPDZ256rmbkz */ |
| 102637 | 63845, |
| 102638 | /* VSCALEFPDZ256rmk */ |
| 102639 | 63849, |
| 102640 | /* VSCALEFPDZ256rmkz */ |
| 102641 | 63854, |
| 102642 | /* VSCALEFPDZ256rr */ |
| 102643 | 63858, |
| 102644 | /* VSCALEFPDZ256rrk */ |
| 102645 | 63861, |
| 102646 | /* VSCALEFPDZ256rrkz */ |
| 102647 | 63866, |
| 102648 | /* VSCALEFPDZrm */ |
| 102649 | 63870, |
| 102650 | /* VSCALEFPDZrmb */ |
| 102651 | 63873, |
| 102652 | /* VSCALEFPDZrmbk */ |
| 102653 | 63876, |
| 102654 | /* VSCALEFPDZrmbkz */ |
| 102655 | 63881, |
| 102656 | /* VSCALEFPDZrmk */ |
| 102657 | 63885, |
| 102658 | /* VSCALEFPDZrmkz */ |
| 102659 | 63890, |
| 102660 | /* VSCALEFPDZrr */ |
| 102661 | 63894, |
| 102662 | /* VSCALEFPDZrrb */ |
| 102663 | 63897, |
| 102664 | /* VSCALEFPDZrrbk */ |
| 102665 | 63901, |
| 102666 | /* VSCALEFPDZrrbkz */ |
| 102667 | 63907, |
| 102668 | /* VSCALEFPDZrrk */ |
| 102669 | 63912, |
| 102670 | /* VSCALEFPDZrrkz */ |
| 102671 | 63917, |
| 102672 | /* VSCALEFPHZ128rm */ |
| 102673 | 63921, |
| 102674 | /* VSCALEFPHZ128rmb */ |
| 102675 | 63924, |
| 102676 | /* VSCALEFPHZ128rmbk */ |
| 102677 | 63927, |
| 102678 | /* VSCALEFPHZ128rmbkz */ |
| 102679 | 63932, |
| 102680 | /* VSCALEFPHZ128rmk */ |
| 102681 | 63936, |
| 102682 | /* VSCALEFPHZ128rmkz */ |
| 102683 | 63941, |
| 102684 | /* VSCALEFPHZ128rr */ |
| 102685 | 63945, |
| 102686 | /* VSCALEFPHZ128rrk */ |
| 102687 | 63948, |
| 102688 | /* VSCALEFPHZ128rrkz */ |
| 102689 | 63953, |
| 102690 | /* VSCALEFPHZ256rm */ |
| 102691 | 63957, |
| 102692 | /* VSCALEFPHZ256rmb */ |
| 102693 | 63960, |
| 102694 | /* VSCALEFPHZ256rmbk */ |
| 102695 | 63963, |
| 102696 | /* VSCALEFPHZ256rmbkz */ |
| 102697 | 63968, |
| 102698 | /* VSCALEFPHZ256rmk */ |
| 102699 | 63972, |
| 102700 | /* VSCALEFPHZ256rmkz */ |
| 102701 | 63977, |
| 102702 | /* VSCALEFPHZ256rr */ |
| 102703 | 63981, |
| 102704 | /* VSCALEFPHZ256rrk */ |
| 102705 | 63984, |
| 102706 | /* VSCALEFPHZ256rrkz */ |
| 102707 | 63989, |
| 102708 | /* VSCALEFPHZrm */ |
| 102709 | 63993, |
| 102710 | /* VSCALEFPHZrmb */ |
| 102711 | 63996, |
| 102712 | /* VSCALEFPHZrmbk */ |
| 102713 | 63999, |
| 102714 | /* VSCALEFPHZrmbkz */ |
| 102715 | 64004, |
| 102716 | /* VSCALEFPHZrmk */ |
| 102717 | 64008, |
| 102718 | /* VSCALEFPHZrmkz */ |
| 102719 | 64013, |
| 102720 | /* VSCALEFPHZrr */ |
| 102721 | 64017, |
| 102722 | /* VSCALEFPHZrrb */ |
| 102723 | 64020, |
| 102724 | /* VSCALEFPHZrrbk */ |
| 102725 | 64024, |
| 102726 | /* VSCALEFPHZrrbkz */ |
| 102727 | 64030, |
| 102728 | /* VSCALEFPHZrrk */ |
| 102729 | 64035, |
| 102730 | /* VSCALEFPHZrrkz */ |
| 102731 | 64040, |
| 102732 | /* VSCALEFPSZ128rm */ |
| 102733 | 64044, |
| 102734 | /* VSCALEFPSZ128rmb */ |
| 102735 | 64047, |
| 102736 | /* VSCALEFPSZ128rmbk */ |
| 102737 | 64050, |
| 102738 | /* VSCALEFPSZ128rmbkz */ |
| 102739 | 64055, |
| 102740 | /* VSCALEFPSZ128rmk */ |
| 102741 | 64059, |
| 102742 | /* VSCALEFPSZ128rmkz */ |
| 102743 | 64064, |
| 102744 | /* VSCALEFPSZ128rr */ |
| 102745 | 64068, |
| 102746 | /* VSCALEFPSZ128rrk */ |
| 102747 | 64071, |
| 102748 | /* VSCALEFPSZ128rrkz */ |
| 102749 | 64076, |
| 102750 | /* VSCALEFPSZ256rm */ |
| 102751 | 64080, |
| 102752 | /* VSCALEFPSZ256rmb */ |
| 102753 | 64083, |
| 102754 | /* VSCALEFPSZ256rmbk */ |
| 102755 | 64086, |
| 102756 | /* VSCALEFPSZ256rmbkz */ |
| 102757 | 64091, |
| 102758 | /* VSCALEFPSZ256rmk */ |
| 102759 | 64095, |
| 102760 | /* VSCALEFPSZ256rmkz */ |
| 102761 | 64100, |
| 102762 | /* VSCALEFPSZ256rr */ |
| 102763 | 64104, |
| 102764 | /* VSCALEFPSZ256rrk */ |
| 102765 | 64107, |
| 102766 | /* VSCALEFPSZ256rrkz */ |
| 102767 | 64112, |
| 102768 | /* VSCALEFPSZrm */ |
| 102769 | 64116, |
| 102770 | /* VSCALEFPSZrmb */ |
| 102771 | 64119, |
| 102772 | /* VSCALEFPSZrmbk */ |
| 102773 | 64122, |
| 102774 | /* VSCALEFPSZrmbkz */ |
| 102775 | 64127, |
| 102776 | /* VSCALEFPSZrmk */ |
| 102777 | 64131, |
| 102778 | /* VSCALEFPSZrmkz */ |
| 102779 | 64136, |
| 102780 | /* VSCALEFPSZrr */ |
| 102781 | 64140, |
| 102782 | /* VSCALEFPSZrrb */ |
| 102783 | 64143, |
| 102784 | /* VSCALEFPSZrrbk */ |
| 102785 | 64147, |
| 102786 | /* VSCALEFPSZrrbkz */ |
| 102787 | 64153, |
| 102788 | /* VSCALEFPSZrrk */ |
| 102789 | 64158, |
| 102790 | /* VSCALEFPSZrrkz */ |
| 102791 | 64163, |
| 102792 | /* VSCALEFSDZrm */ |
| 102793 | 64167, |
| 102794 | /* VSCALEFSDZrmk */ |
| 102795 | 64170, |
| 102796 | /* VSCALEFSDZrmkz */ |
| 102797 | 64175, |
| 102798 | /* VSCALEFSDZrr */ |
| 102799 | 64179, |
| 102800 | /* VSCALEFSDZrrb_Int */ |
| 102801 | 64182, |
| 102802 | /* VSCALEFSDZrrb_Intk */ |
| 102803 | 64186, |
| 102804 | /* VSCALEFSDZrrb_Intkz */ |
| 102805 | 64192, |
| 102806 | /* VSCALEFSDZrrk */ |
| 102807 | 64197, |
| 102808 | /* VSCALEFSDZrrkz */ |
| 102809 | 64202, |
| 102810 | /* VSCALEFSHZrm */ |
| 102811 | 64206, |
| 102812 | /* VSCALEFSHZrmk */ |
| 102813 | 64209, |
| 102814 | /* VSCALEFSHZrmkz */ |
| 102815 | 64214, |
| 102816 | /* VSCALEFSHZrr */ |
| 102817 | 64218, |
| 102818 | /* VSCALEFSHZrrb_Int */ |
| 102819 | 64221, |
| 102820 | /* VSCALEFSHZrrb_Intk */ |
| 102821 | 64225, |
| 102822 | /* VSCALEFSHZrrb_Intkz */ |
| 102823 | 64231, |
| 102824 | /* VSCALEFSHZrrk */ |
| 102825 | 64236, |
| 102826 | /* VSCALEFSHZrrkz */ |
| 102827 | 64241, |
| 102828 | /* VSCALEFSSZrm */ |
| 102829 | 64245, |
| 102830 | /* VSCALEFSSZrmk */ |
| 102831 | 64248, |
| 102832 | /* VSCALEFSSZrmkz */ |
| 102833 | 64253, |
| 102834 | /* VSCALEFSSZrr */ |
| 102835 | 64257, |
| 102836 | /* VSCALEFSSZrrb_Int */ |
| 102837 | 64260, |
| 102838 | /* VSCALEFSSZrrb_Intk */ |
| 102839 | 64264, |
| 102840 | /* VSCALEFSSZrrb_Intkz */ |
| 102841 | 64270, |
| 102842 | /* VSCALEFSSZrrk */ |
| 102843 | 64275, |
| 102844 | /* VSCALEFSSZrrkz */ |
| 102845 | 64280, |
| 102846 | /* VSCATTERDPDZ128mr */ |
| 102847 | 64284, |
| 102848 | /* VSCATTERDPDZ256mr */ |
| 102849 | 64288, |
| 102850 | /* VSCATTERDPDZmr */ |
| 102851 | 64292, |
| 102852 | /* VSCATTERDPSZ128mr */ |
| 102853 | 64296, |
| 102854 | /* VSCATTERDPSZ256mr */ |
| 102855 | 64300, |
| 102856 | /* VSCATTERDPSZmr */ |
| 102857 | 64304, |
| 102858 | /* VSCATTERPF0DPDm */ |
| 102859 | 64308, |
| 102860 | /* VSCATTERPF0DPSm */ |
| 102861 | 64310, |
| 102862 | /* VSCATTERPF0QPDm */ |
| 102863 | 64312, |
| 102864 | /* VSCATTERPF0QPSm */ |
| 102865 | 64314, |
| 102866 | /* VSCATTERPF1DPDm */ |
| 102867 | 64316, |
| 102868 | /* VSCATTERPF1DPSm */ |
| 102869 | 64318, |
| 102870 | /* VSCATTERPF1QPDm */ |
| 102871 | 64320, |
| 102872 | /* VSCATTERPF1QPSm */ |
| 102873 | 64322, |
| 102874 | /* VSCATTERQPDZ128mr */ |
| 102875 | 64324, |
| 102876 | /* VSCATTERQPDZ256mr */ |
| 102877 | 64328, |
| 102878 | /* VSCATTERQPDZmr */ |
| 102879 | 64332, |
| 102880 | /* VSCATTERQPSZ128mr */ |
| 102881 | 64336, |
| 102882 | /* VSCATTERQPSZ256mr */ |
| 102883 | 64340, |
| 102884 | /* VSCATTERQPSZmr */ |
| 102885 | 64344, |
| 102886 | /* VSHA512MSG1rr */ |
| 102887 | 64348, |
| 102888 | /* VSHA512MSG2rr */ |
| 102889 | 64351, |
| 102890 | /* VSHA512RNDS2rr */ |
| 102891 | 64354, |
| 102892 | /* VSHUFF32X4Z256rmbi */ |
| 102893 | 64358, |
| 102894 | /* VSHUFF32X4Z256rmbik */ |
| 102895 | 64362, |
| 102896 | /* VSHUFF32X4Z256rmbikz */ |
| 102897 | 64368, |
| 102898 | /* VSHUFF32X4Z256rmi */ |
| 102899 | 64373, |
| 102900 | /* VSHUFF32X4Z256rmik */ |
| 102901 | 64377, |
| 102902 | /* VSHUFF32X4Z256rmikz */ |
| 102903 | 64383, |
| 102904 | /* VSHUFF32X4Z256rri */ |
| 102905 | 64388, |
| 102906 | /* VSHUFF32X4Z256rrik */ |
| 102907 | 64392, |
| 102908 | /* VSHUFF32X4Z256rrikz */ |
| 102909 | 64398, |
| 102910 | /* VSHUFF32X4Zrmbi */ |
| 102911 | 64403, |
| 102912 | /* VSHUFF32X4Zrmbik */ |
| 102913 | 64407, |
| 102914 | /* VSHUFF32X4Zrmbikz */ |
| 102915 | 64413, |
| 102916 | /* VSHUFF32X4Zrmi */ |
| 102917 | 64418, |
| 102918 | /* VSHUFF32X4Zrmik */ |
| 102919 | 64422, |
| 102920 | /* VSHUFF32X4Zrmikz */ |
| 102921 | 64428, |
| 102922 | /* VSHUFF32X4Zrri */ |
| 102923 | 64433, |
| 102924 | /* VSHUFF32X4Zrrik */ |
| 102925 | 64437, |
| 102926 | /* VSHUFF32X4Zrrikz */ |
| 102927 | 64443, |
| 102928 | /* VSHUFF64X2Z256rmbi */ |
| 102929 | 64448, |
| 102930 | /* VSHUFF64X2Z256rmbik */ |
| 102931 | 64452, |
| 102932 | /* VSHUFF64X2Z256rmbikz */ |
| 102933 | 64458, |
| 102934 | /* VSHUFF64X2Z256rmi */ |
| 102935 | 64463, |
| 102936 | /* VSHUFF64X2Z256rmik */ |
| 102937 | 64467, |
| 102938 | /* VSHUFF64X2Z256rmikz */ |
| 102939 | 64473, |
| 102940 | /* VSHUFF64X2Z256rri */ |
| 102941 | 64478, |
| 102942 | /* VSHUFF64X2Z256rrik */ |
| 102943 | 64482, |
| 102944 | /* VSHUFF64X2Z256rrikz */ |
| 102945 | 64488, |
| 102946 | /* VSHUFF64X2Zrmbi */ |
| 102947 | 64493, |
| 102948 | /* VSHUFF64X2Zrmbik */ |
| 102949 | 64497, |
| 102950 | /* VSHUFF64X2Zrmbikz */ |
| 102951 | 64503, |
| 102952 | /* VSHUFF64X2Zrmi */ |
| 102953 | 64508, |
| 102954 | /* VSHUFF64X2Zrmik */ |
| 102955 | 64512, |
| 102956 | /* VSHUFF64X2Zrmikz */ |
| 102957 | 64518, |
| 102958 | /* VSHUFF64X2Zrri */ |
| 102959 | 64523, |
| 102960 | /* VSHUFF64X2Zrrik */ |
| 102961 | 64527, |
| 102962 | /* VSHUFF64X2Zrrikz */ |
| 102963 | 64533, |
| 102964 | /* VSHUFI32X4Z256rmbi */ |
| 102965 | 64538, |
| 102966 | /* VSHUFI32X4Z256rmbik */ |
| 102967 | 64542, |
| 102968 | /* VSHUFI32X4Z256rmbikz */ |
| 102969 | 64548, |
| 102970 | /* VSHUFI32X4Z256rmi */ |
| 102971 | 64553, |
| 102972 | /* VSHUFI32X4Z256rmik */ |
| 102973 | 64557, |
| 102974 | /* VSHUFI32X4Z256rmikz */ |
| 102975 | 64563, |
| 102976 | /* VSHUFI32X4Z256rri */ |
| 102977 | 64568, |
| 102978 | /* VSHUFI32X4Z256rrik */ |
| 102979 | 64572, |
| 102980 | /* VSHUFI32X4Z256rrikz */ |
| 102981 | 64578, |
| 102982 | /* VSHUFI32X4Zrmbi */ |
| 102983 | 64583, |
| 102984 | /* VSHUFI32X4Zrmbik */ |
| 102985 | 64587, |
| 102986 | /* VSHUFI32X4Zrmbikz */ |
| 102987 | 64593, |
| 102988 | /* VSHUFI32X4Zrmi */ |
| 102989 | 64598, |
| 102990 | /* VSHUFI32X4Zrmik */ |
| 102991 | 64602, |
| 102992 | /* VSHUFI32X4Zrmikz */ |
| 102993 | 64608, |
| 102994 | /* VSHUFI32X4Zrri */ |
| 102995 | 64613, |
| 102996 | /* VSHUFI32X4Zrrik */ |
| 102997 | 64617, |
| 102998 | /* VSHUFI32X4Zrrikz */ |
| 102999 | 64623, |
| 103000 | /* VSHUFI64X2Z256rmbi */ |
| 103001 | 64628, |
| 103002 | /* VSHUFI64X2Z256rmbik */ |
| 103003 | 64632, |
| 103004 | /* VSHUFI64X2Z256rmbikz */ |
| 103005 | 64638, |
| 103006 | /* VSHUFI64X2Z256rmi */ |
| 103007 | 64643, |
| 103008 | /* VSHUFI64X2Z256rmik */ |
| 103009 | 64647, |
| 103010 | /* VSHUFI64X2Z256rmikz */ |
| 103011 | 64653, |
| 103012 | /* VSHUFI64X2Z256rri */ |
| 103013 | 64658, |
| 103014 | /* VSHUFI64X2Z256rrik */ |
| 103015 | 64662, |
| 103016 | /* VSHUFI64X2Z256rrikz */ |
| 103017 | 64668, |
| 103018 | /* VSHUFI64X2Zrmbi */ |
| 103019 | 64673, |
| 103020 | /* VSHUFI64X2Zrmbik */ |
| 103021 | 64677, |
| 103022 | /* VSHUFI64X2Zrmbikz */ |
| 103023 | 64683, |
| 103024 | /* VSHUFI64X2Zrmi */ |
| 103025 | 64688, |
| 103026 | /* VSHUFI64X2Zrmik */ |
| 103027 | 64692, |
| 103028 | /* VSHUFI64X2Zrmikz */ |
| 103029 | 64698, |
| 103030 | /* VSHUFI64X2Zrri */ |
| 103031 | 64703, |
| 103032 | /* VSHUFI64X2Zrrik */ |
| 103033 | 64707, |
| 103034 | /* VSHUFI64X2Zrrikz */ |
| 103035 | 64713, |
| 103036 | /* VSHUFPDYrmi */ |
| 103037 | 64718, |
| 103038 | /* VSHUFPDYrri */ |
| 103039 | 64722, |
| 103040 | /* VSHUFPDZ128rmbi */ |
| 103041 | 64726, |
| 103042 | /* VSHUFPDZ128rmbik */ |
| 103043 | 64730, |
| 103044 | /* VSHUFPDZ128rmbikz */ |
| 103045 | 64736, |
| 103046 | /* VSHUFPDZ128rmi */ |
| 103047 | 64741, |
| 103048 | /* VSHUFPDZ128rmik */ |
| 103049 | 64745, |
| 103050 | /* VSHUFPDZ128rmikz */ |
| 103051 | 64751, |
| 103052 | /* VSHUFPDZ128rri */ |
| 103053 | 64756, |
| 103054 | /* VSHUFPDZ128rrik */ |
| 103055 | 64760, |
| 103056 | /* VSHUFPDZ128rrikz */ |
| 103057 | 64766, |
| 103058 | /* VSHUFPDZ256rmbi */ |
| 103059 | 64771, |
| 103060 | /* VSHUFPDZ256rmbik */ |
| 103061 | 64775, |
| 103062 | /* VSHUFPDZ256rmbikz */ |
| 103063 | 64781, |
| 103064 | /* VSHUFPDZ256rmi */ |
| 103065 | 64786, |
| 103066 | /* VSHUFPDZ256rmik */ |
| 103067 | 64790, |
| 103068 | /* VSHUFPDZ256rmikz */ |
| 103069 | 64796, |
| 103070 | /* VSHUFPDZ256rri */ |
| 103071 | 64801, |
| 103072 | /* VSHUFPDZ256rrik */ |
| 103073 | 64805, |
| 103074 | /* VSHUFPDZ256rrikz */ |
| 103075 | 64811, |
| 103076 | /* VSHUFPDZrmbi */ |
| 103077 | 64816, |
| 103078 | /* VSHUFPDZrmbik */ |
| 103079 | 64820, |
| 103080 | /* VSHUFPDZrmbikz */ |
| 103081 | 64826, |
| 103082 | /* VSHUFPDZrmi */ |
| 103083 | 64831, |
| 103084 | /* VSHUFPDZrmik */ |
| 103085 | 64835, |
| 103086 | /* VSHUFPDZrmikz */ |
| 103087 | 64841, |
| 103088 | /* VSHUFPDZrri */ |
| 103089 | 64846, |
| 103090 | /* VSHUFPDZrrik */ |
| 103091 | 64850, |
| 103092 | /* VSHUFPDZrrikz */ |
| 103093 | 64856, |
| 103094 | /* VSHUFPDrmi */ |
| 103095 | 64861, |
| 103096 | /* VSHUFPDrri */ |
| 103097 | 64865, |
| 103098 | /* VSHUFPSYrmi */ |
| 103099 | 64869, |
| 103100 | /* VSHUFPSYrri */ |
| 103101 | 64873, |
| 103102 | /* VSHUFPSZ128rmbi */ |
| 103103 | 64877, |
| 103104 | /* VSHUFPSZ128rmbik */ |
| 103105 | 64881, |
| 103106 | /* VSHUFPSZ128rmbikz */ |
| 103107 | 64887, |
| 103108 | /* VSHUFPSZ128rmi */ |
| 103109 | 64892, |
| 103110 | /* VSHUFPSZ128rmik */ |
| 103111 | 64896, |
| 103112 | /* VSHUFPSZ128rmikz */ |
| 103113 | 64902, |
| 103114 | /* VSHUFPSZ128rri */ |
| 103115 | 64907, |
| 103116 | /* VSHUFPSZ128rrik */ |
| 103117 | 64911, |
| 103118 | /* VSHUFPSZ128rrikz */ |
| 103119 | 64917, |
| 103120 | /* VSHUFPSZ256rmbi */ |
| 103121 | 64922, |
| 103122 | /* VSHUFPSZ256rmbik */ |
| 103123 | 64926, |
| 103124 | /* VSHUFPSZ256rmbikz */ |
| 103125 | 64932, |
| 103126 | /* VSHUFPSZ256rmi */ |
| 103127 | 64937, |
| 103128 | /* VSHUFPSZ256rmik */ |
| 103129 | 64941, |
| 103130 | /* VSHUFPSZ256rmikz */ |
| 103131 | 64947, |
| 103132 | /* VSHUFPSZ256rri */ |
| 103133 | 64952, |
| 103134 | /* VSHUFPSZ256rrik */ |
| 103135 | 64956, |
| 103136 | /* VSHUFPSZ256rrikz */ |
| 103137 | 64962, |
| 103138 | /* VSHUFPSZrmbi */ |
| 103139 | 64967, |
| 103140 | /* VSHUFPSZrmbik */ |
| 103141 | 64971, |
| 103142 | /* VSHUFPSZrmbikz */ |
| 103143 | 64977, |
| 103144 | /* VSHUFPSZrmi */ |
| 103145 | 64982, |
| 103146 | /* VSHUFPSZrmik */ |
| 103147 | 64986, |
| 103148 | /* VSHUFPSZrmikz */ |
| 103149 | 64992, |
| 103150 | /* VSHUFPSZrri */ |
| 103151 | 64997, |
| 103152 | /* VSHUFPSZrrik */ |
| 103153 | 65001, |
| 103154 | /* VSHUFPSZrrikz */ |
| 103155 | 65007, |
| 103156 | /* VSHUFPSrmi */ |
| 103157 | 65012, |
| 103158 | /* VSHUFPSrri */ |
| 103159 | 65016, |
| 103160 | /* VSM3MSG1rm */ |
| 103161 | 65020, |
| 103162 | /* VSM3MSG1rr */ |
| 103163 | 65024, |
| 103164 | /* VSM3MSG2rm */ |
| 103165 | 65028, |
| 103166 | /* VSM3MSG2rr */ |
| 103167 | 65032, |
| 103168 | /* VSM3RNDS2rm */ |
| 103169 | 65036, |
| 103170 | /* VSM3RNDS2rr */ |
| 103171 | 65041, |
| 103172 | /* VSM4KEY4Yrm */ |
| 103173 | 65046, |
| 103174 | /* VSM4KEY4Yrr */ |
| 103175 | 65049, |
| 103176 | /* VSM4KEY4rm */ |
| 103177 | 65052, |
| 103178 | /* VSM4KEY4rr */ |
| 103179 | 65055, |
| 103180 | /* VSM4RNDS4Yrm */ |
| 103181 | 65058, |
| 103182 | /* VSM4RNDS4Yrr */ |
| 103183 | 65061, |
| 103184 | /* VSM4RNDS4rm */ |
| 103185 | 65064, |
| 103186 | /* VSM4RNDS4rr */ |
| 103187 | 65067, |
| 103188 | /* VSQRTPDYm */ |
| 103189 | 65070, |
| 103190 | /* VSQRTPDYr */ |
| 103191 | 65072, |
| 103192 | /* VSQRTPDZ128m */ |
| 103193 | 65074, |
| 103194 | /* VSQRTPDZ128mb */ |
| 103195 | 65076, |
| 103196 | /* VSQRTPDZ128mbk */ |
| 103197 | 65078, |
| 103198 | /* VSQRTPDZ128mbkz */ |
| 103199 | 65082, |
| 103200 | /* VSQRTPDZ128mk */ |
| 103201 | 65085, |
| 103202 | /* VSQRTPDZ128mkz */ |
| 103203 | 65089, |
| 103204 | /* VSQRTPDZ128r */ |
| 103205 | 65092, |
| 103206 | /* VSQRTPDZ128rk */ |
| 103207 | 65094, |
| 103208 | /* VSQRTPDZ128rkz */ |
| 103209 | 65098, |
| 103210 | /* VSQRTPDZ256m */ |
| 103211 | 65101, |
| 103212 | /* VSQRTPDZ256mb */ |
| 103213 | 65103, |
| 103214 | /* VSQRTPDZ256mbk */ |
| 103215 | 65105, |
| 103216 | /* VSQRTPDZ256mbkz */ |
| 103217 | 65109, |
| 103218 | /* VSQRTPDZ256mk */ |
| 103219 | 65112, |
| 103220 | /* VSQRTPDZ256mkz */ |
| 103221 | 65116, |
| 103222 | /* VSQRTPDZ256r */ |
| 103223 | 65119, |
| 103224 | /* VSQRTPDZ256rk */ |
| 103225 | 65121, |
| 103226 | /* VSQRTPDZ256rkz */ |
| 103227 | 65125, |
| 103228 | /* VSQRTPDZm */ |
| 103229 | 65128, |
| 103230 | /* VSQRTPDZmb */ |
| 103231 | 65130, |
| 103232 | /* VSQRTPDZmbk */ |
| 103233 | 65132, |
| 103234 | /* VSQRTPDZmbkz */ |
| 103235 | 65136, |
| 103236 | /* VSQRTPDZmk */ |
| 103237 | 65139, |
| 103238 | /* VSQRTPDZmkz */ |
| 103239 | 65143, |
| 103240 | /* VSQRTPDZr */ |
| 103241 | 65146, |
| 103242 | /* VSQRTPDZrb */ |
| 103243 | 65148, |
| 103244 | /* VSQRTPDZrbk */ |
| 103245 | 65151, |
| 103246 | /* VSQRTPDZrbkz */ |
| 103247 | 65156, |
| 103248 | /* VSQRTPDZrk */ |
| 103249 | 65160, |
| 103250 | /* VSQRTPDZrkz */ |
| 103251 | 65164, |
| 103252 | /* VSQRTPDm */ |
| 103253 | 65167, |
| 103254 | /* VSQRTPDr */ |
| 103255 | 65169, |
| 103256 | /* VSQRTPHZ128m */ |
| 103257 | 65171, |
| 103258 | /* VSQRTPHZ128mb */ |
| 103259 | 65173, |
| 103260 | /* VSQRTPHZ128mbk */ |
| 103261 | 65175, |
| 103262 | /* VSQRTPHZ128mbkz */ |
| 103263 | 65179, |
| 103264 | /* VSQRTPHZ128mk */ |
| 103265 | 65182, |
| 103266 | /* VSQRTPHZ128mkz */ |
| 103267 | 65186, |
| 103268 | /* VSQRTPHZ128r */ |
| 103269 | 65189, |
| 103270 | /* VSQRTPHZ128rk */ |
| 103271 | 65191, |
| 103272 | /* VSQRTPHZ128rkz */ |
| 103273 | 65195, |
| 103274 | /* VSQRTPHZ256m */ |
| 103275 | 65198, |
| 103276 | /* VSQRTPHZ256mb */ |
| 103277 | 65200, |
| 103278 | /* VSQRTPHZ256mbk */ |
| 103279 | 65202, |
| 103280 | /* VSQRTPHZ256mbkz */ |
| 103281 | 65206, |
| 103282 | /* VSQRTPHZ256mk */ |
| 103283 | 65209, |
| 103284 | /* VSQRTPHZ256mkz */ |
| 103285 | 65213, |
| 103286 | /* VSQRTPHZ256r */ |
| 103287 | 65216, |
| 103288 | /* VSQRTPHZ256rk */ |
| 103289 | 65218, |
| 103290 | /* VSQRTPHZ256rkz */ |
| 103291 | 65222, |
| 103292 | /* VSQRTPHZm */ |
| 103293 | 65225, |
| 103294 | /* VSQRTPHZmb */ |
| 103295 | 65227, |
| 103296 | /* VSQRTPHZmbk */ |
| 103297 | 65229, |
| 103298 | /* VSQRTPHZmbkz */ |
| 103299 | 65233, |
| 103300 | /* VSQRTPHZmk */ |
| 103301 | 65236, |
| 103302 | /* VSQRTPHZmkz */ |
| 103303 | 65240, |
| 103304 | /* VSQRTPHZr */ |
| 103305 | 65243, |
| 103306 | /* VSQRTPHZrb */ |
| 103307 | 65245, |
| 103308 | /* VSQRTPHZrbk */ |
| 103309 | 65248, |
| 103310 | /* VSQRTPHZrbkz */ |
| 103311 | 65253, |
| 103312 | /* VSQRTPHZrk */ |
| 103313 | 65257, |
| 103314 | /* VSQRTPHZrkz */ |
| 103315 | 65261, |
| 103316 | /* VSQRTPSYm */ |
| 103317 | 65264, |
| 103318 | /* VSQRTPSYr */ |
| 103319 | 65266, |
| 103320 | /* VSQRTPSZ128m */ |
| 103321 | 65268, |
| 103322 | /* VSQRTPSZ128mb */ |
| 103323 | 65270, |
| 103324 | /* VSQRTPSZ128mbk */ |
| 103325 | 65272, |
| 103326 | /* VSQRTPSZ128mbkz */ |
| 103327 | 65276, |
| 103328 | /* VSQRTPSZ128mk */ |
| 103329 | 65279, |
| 103330 | /* VSQRTPSZ128mkz */ |
| 103331 | 65283, |
| 103332 | /* VSQRTPSZ128r */ |
| 103333 | 65286, |
| 103334 | /* VSQRTPSZ128rk */ |
| 103335 | 65288, |
| 103336 | /* VSQRTPSZ128rkz */ |
| 103337 | 65292, |
| 103338 | /* VSQRTPSZ256m */ |
| 103339 | 65295, |
| 103340 | /* VSQRTPSZ256mb */ |
| 103341 | 65297, |
| 103342 | /* VSQRTPSZ256mbk */ |
| 103343 | 65299, |
| 103344 | /* VSQRTPSZ256mbkz */ |
| 103345 | 65303, |
| 103346 | /* VSQRTPSZ256mk */ |
| 103347 | 65306, |
| 103348 | /* VSQRTPSZ256mkz */ |
| 103349 | 65310, |
| 103350 | /* VSQRTPSZ256r */ |
| 103351 | 65313, |
| 103352 | /* VSQRTPSZ256rk */ |
| 103353 | 65315, |
| 103354 | /* VSQRTPSZ256rkz */ |
| 103355 | 65319, |
| 103356 | /* VSQRTPSZm */ |
| 103357 | 65322, |
| 103358 | /* VSQRTPSZmb */ |
| 103359 | 65324, |
| 103360 | /* VSQRTPSZmbk */ |
| 103361 | 65326, |
| 103362 | /* VSQRTPSZmbkz */ |
| 103363 | 65330, |
| 103364 | /* VSQRTPSZmk */ |
| 103365 | 65333, |
| 103366 | /* VSQRTPSZmkz */ |
| 103367 | 65337, |
| 103368 | /* VSQRTPSZr */ |
| 103369 | 65340, |
| 103370 | /* VSQRTPSZrb */ |
| 103371 | 65342, |
| 103372 | /* VSQRTPSZrbk */ |
| 103373 | 65345, |
| 103374 | /* VSQRTPSZrbkz */ |
| 103375 | 65350, |
| 103376 | /* VSQRTPSZrk */ |
| 103377 | 65354, |
| 103378 | /* VSQRTPSZrkz */ |
| 103379 | 65358, |
| 103380 | /* VSQRTPSm */ |
| 103381 | 65361, |
| 103382 | /* VSQRTPSr */ |
| 103383 | 65363, |
| 103384 | /* VSQRTSDZm */ |
| 103385 | 65365, |
| 103386 | /* VSQRTSDZm_Int */ |
| 103387 | 65368, |
| 103388 | /* VSQRTSDZm_Intk */ |
| 103389 | 65371, |
| 103390 | /* VSQRTSDZm_Intkz */ |
| 103391 | 65376, |
| 103392 | /* VSQRTSDZr */ |
| 103393 | 65380, |
| 103394 | /* VSQRTSDZr_Int */ |
| 103395 | 65383, |
| 103396 | /* VSQRTSDZr_Intk */ |
| 103397 | 65386, |
| 103398 | /* VSQRTSDZr_Intkz */ |
| 103399 | 65391, |
| 103400 | /* VSQRTSDZrb_Int */ |
| 103401 | 65395, |
| 103402 | /* VSQRTSDZrb_Intk */ |
| 103403 | 65399, |
| 103404 | /* VSQRTSDZrb_Intkz */ |
| 103405 | 65405, |
| 103406 | /* VSQRTSDm */ |
| 103407 | 65410, |
| 103408 | /* VSQRTSDm_Int */ |
| 103409 | 65413, |
| 103410 | /* VSQRTSDr */ |
| 103411 | 65416, |
| 103412 | /* VSQRTSDr_Int */ |
| 103413 | 65419, |
| 103414 | /* VSQRTSHZm */ |
| 103415 | 65422, |
| 103416 | /* VSQRTSHZm_Int */ |
| 103417 | 65425, |
| 103418 | /* VSQRTSHZm_Intk */ |
| 103419 | 65428, |
| 103420 | /* VSQRTSHZm_Intkz */ |
| 103421 | 65433, |
| 103422 | /* VSQRTSHZr */ |
| 103423 | 65437, |
| 103424 | /* VSQRTSHZr_Int */ |
| 103425 | 65440, |
| 103426 | /* VSQRTSHZr_Intk */ |
| 103427 | 65443, |
| 103428 | /* VSQRTSHZr_Intkz */ |
| 103429 | 65448, |
| 103430 | /* VSQRTSHZrb_Int */ |
| 103431 | 65452, |
| 103432 | /* VSQRTSHZrb_Intk */ |
| 103433 | 65456, |
| 103434 | /* VSQRTSHZrb_Intkz */ |
| 103435 | 65462, |
| 103436 | /* VSQRTSSZm */ |
| 103437 | 65467, |
| 103438 | /* VSQRTSSZm_Int */ |
| 103439 | 65470, |
| 103440 | /* VSQRTSSZm_Intk */ |
| 103441 | 65473, |
| 103442 | /* VSQRTSSZm_Intkz */ |
| 103443 | 65478, |
| 103444 | /* VSQRTSSZr */ |
| 103445 | 65482, |
| 103446 | /* VSQRTSSZr_Int */ |
| 103447 | 65485, |
| 103448 | /* VSQRTSSZr_Intk */ |
| 103449 | 65488, |
| 103450 | /* VSQRTSSZr_Intkz */ |
| 103451 | 65493, |
| 103452 | /* VSQRTSSZrb_Int */ |
| 103453 | 65497, |
| 103454 | /* VSQRTSSZrb_Intk */ |
| 103455 | 65501, |
| 103456 | /* VSQRTSSZrb_Intkz */ |
| 103457 | 65507, |
| 103458 | /* VSQRTSSm */ |
| 103459 | 65512, |
| 103460 | /* VSQRTSSm_Int */ |
| 103461 | 65515, |
| 103462 | /* VSQRTSSr */ |
| 103463 | 65518, |
| 103464 | /* VSQRTSSr_Int */ |
| 103465 | 65521, |
| 103466 | /* VSTMXCSR */ |
| 103467 | 65524, |
| 103468 | /* VSUBPDYrm */ |
| 103469 | 65525, |
| 103470 | /* VSUBPDYrr */ |
| 103471 | 65528, |
| 103472 | /* VSUBPDZ128rm */ |
| 103473 | 65531, |
| 103474 | /* VSUBPDZ128rmb */ |
| 103475 | 65534, |
| 103476 | /* VSUBPDZ128rmbk */ |
| 103477 | 65537, |
| 103478 | /* VSUBPDZ128rmbkz */ |
| 103479 | 65542, |
| 103480 | /* VSUBPDZ128rmk */ |
| 103481 | 65546, |
| 103482 | /* VSUBPDZ128rmkz */ |
| 103483 | 65551, |
| 103484 | /* VSUBPDZ128rr */ |
| 103485 | 65555, |
| 103486 | /* VSUBPDZ128rrk */ |
| 103487 | 65558, |
| 103488 | /* VSUBPDZ128rrkz */ |
| 103489 | 65563, |
| 103490 | /* VSUBPDZ256rm */ |
| 103491 | 65567, |
| 103492 | /* VSUBPDZ256rmb */ |
| 103493 | 65570, |
| 103494 | /* VSUBPDZ256rmbk */ |
| 103495 | 65573, |
| 103496 | /* VSUBPDZ256rmbkz */ |
| 103497 | 65578, |
| 103498 | /* VSUBPDZ256rmk */ |
| 103499 | 65582, |
| 103500 | /* VSUBPDZ256rmkz */ |
| 103501 | 65587, |
| 103502 | /* VSUBPDZ256rr */ |
| 103503 | 65591, |
| 103504 | /* VSUBPDZ256rrk */ |
| 103505 | 65594, |
| 103506 | /* VSUBPDZ256rrkz */ |
| 103507 | 65599, |
| 103508 | /* VSUBPDZrm */ |
| 103509 | 65603, |
| 103510 | /* VSUBPDZrmb */ |
| 103511 | 65606, |
| 103512 | /* VSUBPDZrmbk */ |
| 103513 | 65609, |
| 103514 | /* VSUBPDZrmbkz */ |
| 103515 | 65614, |
| 103516 | /* VSUBPDZrmk */ |
| 103517 | 65618, |
| 103518 | /* VSUBPDZrmkz */ |
| 103519 | 65623, |
| 103520 | /* VSUBPDZrr */ |
| 103521 | 65627, |
| 103522 | /* VSUBPDZrrb */ |
| 103523 | 65630, |
| 103524 | /* VSUBPDZrrbk */ |
| 103525 | 65634, |
| 103526 | /* VSUBPDZrrbkz */ |
| 103527 | 65640, |
| 103528 | /* VSUBPDZrrk */ |
| 103529 | 65645, |
| 103530 | /* VSUBPDZrrkz */ |
| 103531 | 65650, |
| 103532 | /* VSUBPDrm */ |
| 103533 | 65654, |
| 103534 | /* VSUBPDrr */ |
| 103535 | 65657, |
| 103536 | /* VSUBPHZ128rm */ |
| 103537 | 65660, |
| 103538 | /* VSUBPHZ128rmb */ |
| 103539 | 65663, |
| 103540 | /* VSUBPHZ128rmbk */ |
| 103541 | 65666, |
| 103542 | /* VSUBPHZ128rmbkz */ |
| 103543 | 65671, |
| 103544 | /* VSUBPHZ128rmk */ |
| 103545 | 65675, |
| 103546 | /* VSUBPHZ128rmkz */ |
| 103547 | 65680, |
| 103548 | /* VSUBPHZ128rr */ |
| 103549 | 65684, |
| 103550 | /* VSUBPHZ128rrk */ |
| 103551 | 65687, |
| 103552 | /* VSUBPHZ128rrkz */ |
| 103553 | 65692, |
| 103554 | /* VSUBPHZ256rm */ |
| 103555 | 65696, |
| 103556 | /* VSUBPHZ256rmb */ |
| 103557 | 65699, |
| 103558 | /* VSUBPHZ256rmbk */ |
| 103559 | 65702, |
| 103560 | /* VSUBPHZ256rmbkz */ |
| 103561 | 65707, |
| 103562 | /* VSUBPHZ256rmk */ |
| 103563 | 65711, |
| 103564 | /* VSUBPHZ256rmkz */ |
| 103565 | 65716, |
| 103566 | /* VSUBPHZ256rr */ |
| 103567 | 65720, |
| 103568 | /* VSUBPHZ256rrk */ |
| 103569 | 65723, |
| 103570 | /* VSUBPHZ256rrkz */ |
| 103571 | 65728, |
| 103572 | /* VSUBPHZrm */ |
| 103573 | 65732, |
| 103574 | /* VSUBPHZrmb */ |
| 103575 | 65735, |
| 103576 | /* VSUBPHZrmbk */ |
| 103577 | 65738, |
| 103578 | /* VSUBPHZrmbkz */ |
| 103579 | 65743, |
| 103580 | /* VSUBPHZrmk */ |
| 103581 | 65747, |
| 103582 | /* VSUBPHZrmkz */ |
| 103583 | 65752, |
| 103584 | /* VSUBPHZrr */ |
| 103585 | 65756, |
| 103586 | /* VSUBPHZrrb */ |
| 103587 | 65759, |
| 103588 | /* VSUBPHZrrbk */ |
| 103589 | 65763, |
| 103590 | /* VSUBPHZrrbkz */ |
| 103591 | 65769, |
| 103592 | /* VSUBPHZrrk */ |
| 103593 | 65774, |
| 103594 | /* VSUBPHZrrkz */ |
| 103595 | 65779, |
| 103596 | /* VSUBPSYrm */ |
| 103597 | 65783, |
| 103598 | /* VSUBPSYrr */ |
| 103599 | 65786, |
| 103600 | /* VSUBPSZ128rm */ |
| 103601 | 65789, |
| 103602 | /* VSUBPSZ128rmb */ |
| 103603 | 65792, |
| 103604 | /* VSUBPSZ128rmbk */ |
| 103605 | 65795, |
| 103606 | /* VSUBPSZ128rmbkz */ |
| 103607 | 65800, |
| 103608 | /* VSUBPSZ128rmk */ |
| 103609 | 65804, |
| 103610 | /* VSUBPSZ128rmkz */ |
| 103611 | 65809, |
| 103612 | /* VSUBPSZ128rr */ |
| 103613 | 65813, |
| 103614 | /* VSUBPSZ128rrk */ |
| 103615 | 65816, |
| 103616 | /* VSUBPSZ128rrkz */ |
| 103617 | 65821, |
| 103618 | /* VSUBPSZ256rm */ |
| 103619 | 65825, |
| 103620 | /* VSUBPSZ256rmb */ |
| 103621 | 65828, |
| 103622 | /* VSUBPSZ256rmbk */ |
| 103623 | 65831, |
| 103624 | /* VSUBPSZ256rmbkz */ |
| 103625 | 65836, |
| 103626 | /* VSUBPSZ256rmk */ |
| 103627 | 65840, |
| 103628 | /* VSUBPSZ256rmkz */ |
| 103629 | 65845, |
| 103630 | /* VSUBPSZ256rr */ |
| 103631 | 65849, |
| 103632 | /* VSUBPSZ256rrk */ |
| 103633 | 65852, |
| 103634 | /* VSUBPSZ256rrkz */ |
| 103635 | 65857, |
| 103636 | /* VSUBPSZrm */ |
| 103637 | 65861, |
| 103638 | /* VSUBPSZrmb */ |
| 103639 | 65864, |
| 103640 | /* VSUBPSZrmbk */ |
| 103641 | 65867, |
| 103642 | /* VSUBPSZrmbkz */ |
| 103643 | 65872, |
| 103644 | /* VSUBPSZrmk */ |
| 103645 | 65876, |
| 103646 | /* VSUBPSZrmkz */ |
| 103647 | 65881, |
| 103648 | /* VSUBPSZrr */ |
| 103649 | 65885, |
| 103650 | /* VSUBPSZrrb */ |
| 103651 | 65888, |
| 103652 | /* VSUBPSZrrbk */ |
| 103653 | 65892, |
| 103654 | /* VSUBPSZrrbkz */ |
| 103655 | 65898, |
| 103656 | /* VSUBPSZrrk */ |
| 103657 | 65903, |
| 103658 | /* VSUBPSZrrkz */ |
| 103659 | 65908, |
| 103660 | /* VSUBPSrm */ |
| 103661 | 65912, |
| 103662 | /* VSUBPSrr */ |
| 103663 | 65915, |
| 103664 | /* VSUBSDZrm */ |
| 103665 | 65918, |
| 103666 | /* VSUBSDZrm_Int */ |
| 103667 | 65921, |
| 103668 | /* VSUBSDZrm_Intk */ |
| 103669 | 65924, |
| 103670 | /* VSUBSDZrm_Intkz */ |
| 103671 | 65929, |
| 103672 | /* VSUBSDZrr */ |
| 103673 | 65933, |
| 103674 | /* VSUBSDZrr_Int */ |
| 103675 | 65936, |
| 103676 | /* VSUBSDZrr_Intk */ |
| 103677 | 65939, |
| 103678 | /* VSUBSDZrr_Intkz */ |
| 103679 | 65944, |
| 103680 | /* VSUBSDZrrb_Int */ |
| 103681 | 65948, |
| 103682 | /* VSUBSDZrrb_Intk */ |
| 103683 | 65952, |
| 103684 | /* VSUBSDZrrb_Intkz */ |
| 103685 | 65958, |
| 103686 | /* VSUBSDrm */ |
| 103687 | 65963, |
| 103688 | /* VSUBSDrm_Int */ |
| 103689 | 65966, |
| 103690 | /* VSUBSDrr */ |
| 103691 | 65969, |
| 103692 | /* VSUBSDrr_Int */ |
| 103693 | 65972, |
| 103694 | /* VSUBSHZrm */ |
| 103695 | 65975, |
| 103696 | /* VSUBSHZrm_Int */ |
| 103697 | 65978, |
| 103698 | /* VSUBSHZrm_Intk */ |
| 103699 | 65981, |
| 103700 | /* VSUBSHZrm_Intkz */ |
| 103701 | 65986, |
| 103702 | /* VSUBSHZrr */ |
| 103703 | 65990, |
| 103704 | /* VSUBSHZrr_Int */ |
| 103705 | 65993, |
| 103706 | /* VSUBSHZrr_Intk */ |
| 103707 | 65996, |
| 103708 | /* VSUBSHZrr_Intkz */ |
| 103709 | 66001, |
| 103710 | /* VSUBSHZrrb_Int */ |
| 103711 | 66005, |
| 103712 | /* VSUBSHZrrb_Intk */ |
| 103713 | 66009, |
| 103714 | /* VSUBSHZrrb_Intkz */ |
| 103715 | 66015, |
| 103716 | /* VSUBSSZrm */ |
| 103717 | 66020, |
| 103718 | /* VSUBSSZrm_Int */ |
| 103719 | 66023, |
| 103720 | /* VSUBSSZrm_Intk */ |
| 103721 | 66026, |
| 103722 | /* VSUBSSZrm_Intkz */ |
| 103723 | 66031, |
| 103724 | /* VSUBSSZrr */ |
| 103725 | 66035, |
| 103726 | /* VSUBSSZrr_Int */ |
| 103727 | 66038, |
| 103728 | /* VSUBSSZrr_Intk */ |
| 103729 | 66041, |
| 103730 | /* VSUBSSZrr_Intkz */ |
| 103731 | 66046, |
| 103732 | /* VSUBSSZrrb_Int */ |
| 103733 | 66050, |
| 103734 | /* VSUBSSZrrb_Intk */ |
| 103735 | 66054, |
| 103736 | /* VSUBSSZrrb_Intkz */ |
| 103737 | 66060, |
| 103738 | /* VSUBSSrm */ |
| 103739 | 66065, |
| 103740 | /* VSUBSSrm_Int */ |
| 103741 | 66068, |
| 103742 | /* VSUBSSrr */ |
| 103743 | 66071, |
| 103744 | /* VSUBSSrr_Int */ |
| 103745 | 66074, |
| 103746 | /* VTESTPDYrm */ |
| 103747 | 66077, |
| 103748 | /* VTESTPDYrr */ |
| 103749 | 66079, |
| 103750 | /* VTESTPDrm */ |
| 103751 | 66081, |
| 103752 | /* VTESTPDrr */ |
| 103753 | 66083, |
| 103754 | /* VTESTPSYrm */ |
| 103755 | 66085, |
| 103756 | /* VTESTPSYrr */ |
| 103757 | 66087, |
| 103758 | /* VTESTPSrm */ |
| 103759 | 66089, |
| 103760 | /* VTESTPSrr */ |
| 103761 | 66091, |
| 103762 | /* VUCOMISDZrm */ |
| 103763 | 66093, |
| 103764 | /* VUCOMISDZrm_Int */ |
| 103765 | 66095, |
| 103766 | /* VUCOMISDZrr */ |
| 103767 | 66097, |
| 103768 | /* VUCOMISDZrr_Int */ |
| 103769 | 66099, |
| 103770 | /* VUCOMISDZrrb */ |
| 103771 | 66101, |
| 103772 | /* VUCOMISDrm */ |
| 103773 | 66103, |
| 103774 | /* VUCOMISDrm_Int */ |
| 103775 | 66105, |
| 103776 | /* VUCOMISDrr */ |
| 103777 | 66107, |
| 103778 | /* VUCOMISDrr_Int */ |
| 103779 | 66109, |
| 103780 | /* VUCOMISHZrm */ |
| 103781 | 66111, |
| 103782 | /* VUCOMISHZrm_Int */ |
| 103783 | 66113, |
| 103784 | /* VUCOMISHZrr */ |
| 103785 | 66115, |
| 103786 | /* VUCOMISHZrr_Int */ |
| 103787 | 66117, |
| 103788 | /* VUCOMISHZrrb */ |
| 103789 | 66119, |
| 103790 | /* VUCOMISSZrm */ |
| 103791 | 66121, |
| 103792 | /* VUCOMISSZrm_Int */ |
| 103793 | 66123, |
| 103794 | /* VUCOMISSZrr */ |
| 103795 | 66125, |
| 103796 | /* VUCOMISSZrr_Int */ |
| 103797 | 66127, |
| 103798 | /* VUCOMISSZrrb */ |
| 103799 | 66129, |
| 103800 | /* VUCOMISSrm */ |
| 103801 | 66131, |
| 103802 | /* VUCOMISSrm_Int */ |
| 103803 | 66133, |
| 103804 | /* VUCOMISSrr */ |
| 103805 | 66135, |
| 103806 | /* VUCOMISSrr_Int */ |
| 103807 | 66137, |
| 103808 | /* VUNPCKHPDYrm */ |
| 103809 | 66139, |
| 103810 | /* VUNPCKHPDYrr */ |
| 103811 | 66142, |
| 103812 | /* VUNPCKHPDZ128rm */ |
| 103813 | 66145, |
| 103814 | /* VUNPCKHPDZ128rmb */ |
| 103815 | 66148, |
| 103816 | /* VUNPCKHPDZ128rmbk */ |
| 103817 | 66151, |
| 103818 | /* VUNPCKHPDZ128rmbkz */ |
| 103819 | 66156, |
| 103820 | /* VUNPCKHPDZ128rmk */ |
| 103821 | 66160, |
| 103822 | /* VUNPCKHPDZ128rmkz */ |
| 103823 | 66165, |
| 103824 | /* VUNPCKHPDZ128rr */ |
| 103825 | 66169, |
| 103826 | /* VUNPCKHPDZ128rrk */ |
| 103827 | 66172, |
| 103828 | /* VUNPCKHPDZ128rrkz */ |
| 103829 | 66177, |
| 103830 | /* VUNPCKHPDZ256rm */ |
| 103831 | 66181, |
| 103832 | /* VUNPCKHPDZ256rmb */ |
| 103833 | 66184, |
| 103834 | /* VUNPCKHPDZ256rmbk */ |
| 103835 | 66187, |
| 103836 | /* VUNPCKHPDZ256rmbkz */ |
| 103837 | 66192, |
| 103838 | /* VUNPCKHPDZ256rmk */ |
| 103839 | 66196, |
| 103840 | /* VUNPCKHPDZ256rmkz */ |
| 103841 | 66201, |
| 103842 | /* VUNPCKHPDZ256rr */ |
| 103843 | 66205, |
| 103844 | /* VUNPCKHPDZ256rrk */ |
| 103845 | 66208, |
| 103846 | /* VUNPCKHPDZ256rrkz */ |
| 103847 | 66213, |
| 103848 | /* VUNPCKHPDZrm */ |
| 103849 | 66217, |
| 103850 | /* VUNPCKHPDZrmb */ |
| 103851 | 66220, |
| 103852 | /* VUNPCKHPDZrmbk */ |
| 103853 | 66223, |
| 103854 | /* VUNPCKHPDZrmbkz */ |
| 103855 | 66228, |
| 103856 | /* VUNPCKHPDZrmk */ |
| 103857 | 66232, |
| 103858 | /* VUNPCKHPDZrmkz */ |
| 103859 | 66237, |
| 103860 | /* VUNPCKHPDZrr */ |
| 103861 | 66241, |
| 103862 | /* VUNPCKHPDZrrk */ |
| 103863 | 66244, |
| 103864 | /* VUNPCKHPDZrrkz */ |
| 103865 | 66249, |
| 103866 | /* VUNPCKHPDrm */ |
| 103867 | 66253, |
| 103868 | /* VUNPCKHPDrr */ |
| 103869 | 66256, |
| 103870 | /* VUNPCKHPSYrm */ |
| 103871 | 66259, |
| 103872 | /* VUNPCKHPSYrr */ |
| 103873 | 66262, |
| 103874 | /* VUNPCKHPSZ128rm */ |
| 103875 | 66265, |
| 103876 | /* VUNPCKHPSZ128rmb */ |
| 103877 | 66268, |
| 103878 | /* VUNPCKHPSZ128rmbk */ |
| 103879 | 66271, |
| 103880 | /* VUNPCKHPSZ128rmbkz */ |
| 103881 | 66276, |
| 103882 | /* VUNPCKHPSZ128rmk */ |
| 103883 | 66280, |
| 103884 | /* VUNPCKHPSZ128rmkz */ |
| 103885 | 66285, |
| 103886 | /* VUNPCKHPSZ128rr */ |
| 103887 | 66289, |
| 103888 | /* VUNPCKHPSZ128rrk */ |
| 103889 | 66292, |
| 103890 | /* VUNPCKHPSZ128rrkz */ |
| 103891 | 66297, |
| 103892 | /* VUNPCKHPSZ256rm */ |
| 103893 | 66301, |
| 103894 | /* VUNPCKHPSZ256rmb */ |
| 103895 | 66304, |
| 103896 | /* VUNPCKHPSZ256rmbk */ |
| 103897 | 66307, |
| 103898 | /* VUNPCKHPSZ256rmbkz */ |
| 103899 | 66312, |
| 103900 | /* VUNPCKHPSZ256rmk */ |
| 103901 | 66316, |
| 103902 | /* VUNPCKHPSZ256rmkz */ |
| 103903 | 66321, |
| 103904 | /* VUNPCKHPSZ256rr */ |
| 103905 | 66325, |
| 103906 | /* VUNPCKHPSZ256rrk */ |
| 103907 | 66328, |
| 103908 | /* VUNPCKHPSZ256rrkz */ |
| 103909 | 66333, |
| 103910 | /* VUNPCKHPSZrm */ |
| 103911 | 66337, |
| 103912 | /* VUNPCKHPSZrmb */ |
| 103913 | 66340, |
| 103914 | /* VUNPCKHPSZrmbk */ |
| 103915 | 66343, |
| 103916 | /* VUNPCKHPSZrmbkz */ |
| 103917 | 66348, |
| 103918 | /* VUNPCKHPSZrmk */ |
| 103919 | 66352, |
| 103920 | /* VUNPCKHPSZrmkz */ |
| 103921 | 66357, |
| 103922 | /* VUNPCKHPSZrr */ |
| 103923 | 66361, |
| 103924 | /* VUNPCKHPSZrrk */ |
| 103925 | 66364, |
| 103926 | /* VUNPCKHPSZrrkz */ |
| 103927 | 66369, |
| 103928 | /* VUNPCKHPSrm */ |
| 103929 | 66373, |
| 103930 | /* VUNPCKHPSrr */ |
| 103931 | 66376, |
| 103932 | /* VUNPCKLPDYrm */ |
| 103933 | 66379, |
| 103934 | /* VUNPCKLPDYrr */ |
| 103935 | 66382, |
| 103936 | /* VUNPCKLPDZ128rm */ |
| 103937 | 66385, |
| 103938 | /* VUNPCKLPDZ128rmb */ |
| 103939 | 66388, |
| 103940 | /* VUNPCKLPDZ128rmbk */ |
| 103941 | 66391, |
| 103942 | /* VUNPCKLPDZ128rmbkz */ |
| 103943 | 66396, |
| 103944 | /* VUNPCKLPDZ128rmk */ |
| 103945 | 66400, |
| 103946 | /* VUNPCKLPDZ128rmkz */ |
| 103947 | 66405, |
| 103948 | /* VUNPCKLPDZ128rr */ |
| 103949 | 66409, |
| 103950 | /* VUNPCKLPDZ128rrk */ |
| 103951 | 66412, |
| 103952 | /* VUNPCKLPDZ128rrkz */ |
| 103953 | 66417, |
| 103954 | /* VUNPCKLPDZ256rm */ |
| 103955 | 66421, |
| 103956 | /* VUNPCKLPDZ256rmb */ |
| 103957 | 66424, |
| 103958 | /* VUNPCKLPDZ256rmbk */ |
| 103959 | 66427, |
| 103960 | /* VUNPCKLPDZ256rmbkz */ |
| 103961 | 66432, |
| 103962 | /* VUNPCKLPDZ256rmk */ |
| 103963 | 66436, |
| 103964 | /* VUNPCKLPDZ256rmkz */ |
| 103965 | 66441, |
| 103966 | /* VUNPCKLPDZ256rr */ |
| 103967 | 66445, |
| 103968 | /* VUNPCKLPDZ256rrk */ |
| 103969 | 66448, |
| 103970 | /* VUNPCKLPDZ256rrkz */ |
| 103971 | 66453, |
| 103972 | /* VUNPCKLPDZrm */ |
| 103973 | 66457, |
| 103974 | /* VUNPCKLPDZrmb */ |
| 103975 | 66460, |
| 103976 | /* VUNPCKLPDZrmbk */ |
| 103977 | 66463, |
| 103978 | /* VUNPCKLPDZrmbkz */ |
| 103979 | 66468, |
| 103980 | /* VUNPCKLPDZrmk */ |
| 103981 | 66472, |
| 103982 | /* VUNPCKLPDZrmkz */ |
| 103983 | 66477, |
| 103984 | /* VUNPCKLPDZrr */ |
| 103985 | 66481, |
| 103986 | /* VUNPCKLPDZrrk */ |
| 103987 | 66484, |
| 103988 | /* VUNPCKLPDZrrkz */ |
| 103989 | 66489, |
| 103990 | /* VUNPCKLPDrm */ |
| 103991 | 66493, |
| 103992 | /* VUNPCKLPDrr */ |
| 103993 | 66496, |
| 103994 | /* VUNPCKLPSYrm */ |
| 103995 | 66499, |
| 103996 | /* VUNPCKLPSYrr */ |
| 103997 | 66502, |
| 103998 | /* VUNPCKLPSZ128rm */ |
| 103999 | 66505, |
| 104000 | /* VUNPCKLPSZ128rmb */ |
| 104001 | 66508, |
| 104002 | /* VUNPCKLPSZ128rmbk */ |
| 104003 | 66511, |
| 104004 | /* VUNPCKLPSZ128rmbkz */ |
| 104005 | 66516, |
| 104006 | /* VUNPCKLPSZ128rmk */ |
| 104007 | 66520, |
| 104008 | /* VUNPCKLPSZ128rmkz */ |
| 104009 | 66525, |
| 104010 | /* VUNPCKLPSZ128rr */ |
| 104011 | 66529, |
| 104012 | /* VUNPCKLPSZ128rrk */ |
| 104013 | 66532, |
| 104014 | /* VUNPCKLPSZ128rrkz */ |
| 104015 | 66537, |
| 104016 | /* VUNPCKLPSZ256rm */ |
| 104017 | 66541, |
| 104018 | /* VUNPCKLPSZ256rmb */ |
| 104019 | 66544, |
| 104020 | /* VUNPCKLPSZ256rmbk */ |
| 104021 | 66547, |
| 104022 | /* VUNPCKLPSZ256rmbkz */ |
| 104023 | 66552, |
| 104024 | /* VUNPCKLPSZ256rmk */ |
| 104025 | 66556, |
| 104026 | /* VUNPCKLPSZ256rmkz */ |
| 104027 | 66561, |
| 104028 | /* VUNPCKLPSZ256rr */ |
| 104029 | 66565, |
| 104030 | /* VUNPCKLPSZ256rrk */ |
| 104031 | 66568, |
| 104032 | /* VUNPCKLPSZ256rrkz */ |
| 104033 | 66573, |
| 104034 | /* VUNPCKLPSZrm */ |
| 104035 | 66577, |
| 104036 | /* VUNPCKLPSZrmb */ |
| 104037 | 66580, |
| 104038 | /* VUNPCKLPSZrmbk */ |
| 104039 | 66583, |
| 104040 | /* VUNPCKLPSZrmbkz */ |
| 104041 | 66588, |
| 104042 | /* VUNPCKLPSZrmk */ |
| 104043 | 66592, |
| 104044 | /* VUNPCKLPSZrmkz */ |
| 104045 | 66597, |
| 104046 | /* VUNPCKLPSZrr */ |
| 104047 | 66601, |
| 104048 | /* VUNPCKLPSZrrk */ |
| 104049 | 66604, |
| 104050 | /* VUNPCKLPSZrrkz */ |
| 104051 | 66609, |
| 104052 | /* VUNPCKLPSrm */ |
| 104053 | 66613, |
| 104054 | /* VUNPCKLPSrr */ |
| 104055 | 66616, |
| 104056 | /* VXORPDYrm */ |
| 104057 | 66619, |
| 104058 | /* VXORPDYrr */ |
| 104059 | 66622, |
| 104060 | /* VXORPDZ128rm */ |
| 104061 | 66625, |
| 104062 | /* VXORPDZ128rmb */ |
| 104063 | 66628, |
| 104064 | /* VXORPDZ128rmbk */ |
| 104065 | 66631, |
| 104066 | /* VXORPDZ128rmbkz */ |
| 104067 | 66636, |
| 104068 | /* VXORPDZ128rmk */ |
| 104069 | 66640, |
| 104070 | /* VXORPDZ128rmkz */ |
| 104071 | 66645, |
| 104072 | /* VXORPDZ128rr */ |
| 104073 | 66649, |
| 104074 | /* VXORPDZ128rrk */ |
| 104075 | 66652, |
| 104076 | /* VXORPDZ128rrkz */ |
| 104077 | 66657, |
| 104078 | /* VXORPDZ256rm */ |
| 104079 | 66661, |
| 104080 | /* VXORPDZ256rmb */ |
| 104081 | 66664, |
| 104082 | /* VXORPDZ256rmbk */ |
| 104083 | 66667, |
| 104084 | /* VXORPDZ256rmbkz */ |
| 104085 | 66672, |
| 104086 | /* VXORPDZ256rmk */ |
| 104087 | 66676, |
| 104088 | /* VXORPDZ256rmkz */ |
| 104089 | 66681, |
| 104090 | /* VXORPDZ256rr */ |
| 104091 | 66685, |
| 104092 | /* VXORPDZ256rrk */ |
| 104093 | 66688, |
| 104094 | /* VXORPDZ256rrkz */ |
| 104095 | 66693, |
| 104096 | /* VXORPDZrm */ |
| 104097 | 66697, |
| 104098 | /* VXORPDZrmb */ |
| 104099 | 66700, |
| 104100 | /* VXORPDZrmbk */ |
| 104101 | 66703, |
| 104102 | /* VXORPDZrmbkz */ |
| 104103 | 66708, |
| 104104 | /* VXORPDZrmk */ |
| 104105 | 66712, |
| 104106 | /* VXORPDZrmkz */ |
| 104107 | 66717, |
| 104108 | /* VXORPDZrr */ |
| 104109 | 66721, |
| 104110 | /* VXORPDZrrk */ |
| 104111 | 66724, |
| 104112 | /* VXORPDZrrkz */ |
| 104113 | 66729, |
| 104114 | /* VXORPDrm */ |
| 104115 | 66733, |
| 104116 | /* VXORPDrr */ |
| 104117 | 66736, |
| 104118 | /* VXORPSYrm */ |
| 104119 | 66739, |
| 104120 | /* VXORPSYrr */ |
| 104121 | 66742, |
| 104122 | /* VXORPSZ128rm */ |
| 104123 | 66745, |
| 104124 | /* VXORPSZ128rmb */ |
| 104125 | 66748, |
| 104126 | /* VXORPSZ128rmbk */ |
| 104127 | 66751, |
| 104128 | /* VXORPSZ128rmbkz */ |
| 104129 | 66756, |
| 104130 | /* VXORPSZ128rmk */ |
| 104131 | 66760, |
| 104132 | /* VXORPSZ128rmkz */ |
| 104133 | 66765, |
| 104134 | /* VXORPSZ128rr */ |
| 104135 | 66769, |
| 104136 | /* VXORPSZ128rrk */ |
| 104137 | 66772, |
| 104138 | /* VXORPSZ128rrkz */ |
| 104139 | 66777, |
| 104140 | /* VXORPSZ256rm */ |
| 104141 | 66781, |
| 104142 | /* VXORPSZ256rmb */ |
| 104143 | 66784, |
| 104144 | /* VXORPSZ256rmbk */ |
| 104145 | 66787, |
| 104146 | /* VXORPSZ256rmbkz */ |
| 104147 | 66792, |
| 104148 | /* VXORPSZ256rmk */ |
| 104149 | 66796, |
| 104150 | /* VXORPSZ256rmkz */ |
| 104151 | 66801, |
| 104152 | /* VXORPSZ256rr */ |
| 104153 | 66805, |
| 104154 | /* VXORPSZ256rrk */ |
| 104155 | 66808, |
| 104156 | /* VXORPSZ256rrkz */ |
| 104157 | 66813, |
| 104158 | /* VXORPSZrm */ |
| 104159 | 66817, |
| 104160 | /* VXORPSZrmb */ |
| 104161 | 66820, |
| 104162 | /* VXORPSZrmbk */ |
| 104163 | 66823, |
| 104164 | /* VXORPSZrmbkz */ |
| 104165 | 66828, |
| 104166 | /* VXORPSZrmk */ |
| 104167 | 66832, |
| 104168 | /* VXORPSZrmkz */ |
| 104169 | 66837, |
| 104170 | /* VXORPSZrr */ |
| 104171 | 66841, |
| 104172 | /* VXORPSZrrk */ |
| 104173 | 66844, |
| 104174 | /* VXORPSZrrkz */ |
| 104175 | 66849, |
| 104176 | /* VXORPSrm */ |
| 104177 | 66853, |
| 104178 | /* VXORPSrr */ |
| 104179 | 66856, |
| 104180 | /* VZEROALL */ |
| 104181 | 66859, |
| 104182 | /* VZEROUPPER */ |
| 104183 | 66859, |
| 104184 | /* WAIT */ |
| 104185 | 66859, |
| 104186 | /* WBINVD */ |
| 104187 | 66859, |
| 104188 | /* WBNOINVD */ |
| 104189 | 66859, |
| 104190 | /* WRFSBASE */ |
| 104191 | 66859, |
| 104192 | /* WRFSBASE64 */ |
| 104193 | 66860, |
| 104194 | /* WRGSBASE */ |
| 104195 | 66861, |
| 104196 | /* WRGSBASE64 */ |
| 104197 | 66862, |
| 104198 | /* WRMSR */ |
| 104199 | 66863, |
| 104200 | /* WRMSRLIST */ |
| 104201 | 66863, |
| 104202 | /* WRMSRNS */ |
| 104203 | 66863, |
| 104204 | /* WRPKRUr */ |
| 104205 | 66863, |
| 104206 | /* WRSSD */ |
| 104207 | 66863, |
| 104208 | /* WRSSD_EVEX */ |
| 104209 | 66865, |
| 104210 | /* WRSSQ */ |
| 104211 | 66867, |
| 104212 | /* WRSSQ_EVEX */ |
| 104213 | 66869, |
| 104214 | /* WRUSSD */ |
| 104215 | 66871, |
| 104216 | /* WRUSSD_EVEX */ |
| 104217 | 66873, |
| 104218 | /* WRUSSQ */ |
| 104219 | 66875, |
| 104220 | /* WRUSSQ_EVEX */ |
| 104221 | 66877, |
| 104222 | /* XABORT */ |
| 104223 | 66879, |
| 104224 | /* XACQUIRE_PREFIX */ |
| 104225 | 66880, |
| 104226 | /* XADD16rm */ |
| 104227 | 66880, |
| 104228 | /* XADD16rr */ |
| 104229 | 66883, |
| 104230 | /* XADD32rm */ |
| 104231 | 66887, |
| 104232 | /* XADD32rr */ |
| 104233 | 66890, |
| 104234 | /* XADD64rm */ |
| 104235 | 66894, |
| 104236 | /* XADD64rr */ |
| 104237 | 66897, |
| 104238 | /* XADD8rm */ |
| 104239 | 66901, |
| 104240 | /* XADD8rr */ |
| 104241 | 66904, |
| 104242 | /* XAM_F */ |
| 104243 | 66908, |
| 104244 | /* XAM_Fp32 */ |
| 104245 | 66908, |
| 104246 | /* XAM_Fp64 */ |
| 104247 | 66909, |
| 104248 | /* XAM_Fp80 */ |
| 104249 | 66910, |
| 104250 | /* XBEGIN */ |
| 104251 | 66911, |
| 104252 | /* XBEGIN_2 */ |
| 104253 | 66912, |
| 104254 | /* XBEGIN_4 */ |
| 104255 | 66913, |
| 104256 | /* XCHG16ar */ |
| 104257 | 66914, |
| 104258 | /* XCHG16rm */ |
| 104259 | 66916, |
| 104260 | /* XCHG16rr */ |
| 104261 | 66919, |
| 104262 | /* XCHG32ar */ |
| 104263 | 66923, |
| 104264 | /* XCHG32rm */ |
| 104265 | 66925, |
| 104266 | /* XCHG32rr */ |
| 104267 | 66928, |
| 104268 | /* XCHG64ar */ |
| 104269 | 66932, |
| 104270 | /* XCHG64rm */ |
| 104271 | 66934, |
| 104272 | /* XCHG64rr */ |
| 104273 | 66937, |
| 104274 | /* XCHG8rm */ |
| 104275 | 66941, |
| 104276 | /* XCHG8rr */ |
| 104277 | 66944, |
| 104278 | /* XCH_F */ |
| 104279 | 66948, |
| 104280 | /* XCRYPTCBC */ |
| 104281 | 66949, |
| 104282 | /* XCRYPTCFB */ |
| 104283 | 66949, |
| 104284 | /* XCRYPTCTR */ |
| 104285 | 66949, |
| 104286 | /* XCRYPTECB */ |
| 104287 | 66949, |
| 104288 | /* XCRYPTOFB */ |
| 104289 | 66949, |
| 104290 | /* XEND */ |
| 104291 | 66949, |
| 104292 | /* XGETBV */ |
| 104293 | 66949, |
| 104294 | /* XLAT */ |
| 104295 | 66949, |
| 104296 | /* XOR16i16 */ |
| 104297 | 66949, |
| 104298 | /* XOR16mi */ |
| 104299 | 66950, |
| 104300 | /* XOR16mi8 */ |
| 104301 | 66952, |
| 104302 | /* XOR16mi8_EVEX */ |
| 104303 | 66954, |
| 104304 | /* XOR16mi8_ND */ |
| 104305 | 66956, |
| 104306 | /* XOR16mi8_NF */ |
| 104307 | 66959, |
| 104308 | /* XOR16mi8_NF_ND */ |
| 104309 | 66961, |
| 104310 | /* XOR16mi_EVEX */ |
| 104311 | 66964, |
| 104312 | /* XOR16mi_ND */ |
| 104313 | 66966, |
| 104314 | /* XOR16mi_NF */ |
| 104315 | 66969, |
| 104316 | /* XOR16mi_NF_ND */ |
| 104317 | 66971, |
| 104318 | /* XOR16mr */ |
| 104319 | 66974, |
| 104320 | /* XOR16mr_EVEX */ |
| 104321 | 66976, |
| 104322 | /* XOR16mr_ND */ |
| 104323 | 66978, |
| 104324 | /* XOR16mr_NF */ |
| 104325 | 66981, |
| 104326 | /* XOR16mr_NF_ND */ |
| 104327 | 66983, |
| 104328 | /* XOR16ri */ |
| 104329 | 66986, |
| 104330 | /* XOR16ri8 */ |
| 104331 | 66989, |
| 104332 | /* XOR16ri8_EVEX */ |
| 104333 | 66992, |
| 104334 | /* XOR16ri8_ND */ |
| 104335 | 66995, |
| 104336 | /* XOR16ri8_NF */ |
| 104337 | 66998, |
| 104338 | /* XOR16ri8_NF_ND */ |
| 104339 | 67001, |
| 104340 | /* XOR16ri_EVEX */ |
| 104341 | 67004, |
| 104342 | /* XOR16ri_ND */ |
| 104343 | 67007, |
| 104344 | /* XOR16ri_NF */ |
| 104345 | 67010, |
| 104346 | /* XOR16ri_NF_ND */ |
| 104347 | 67013, |
| 104348 | /* XOR16rm */ |
| 104349 | 67016, |
| 104350 | /* XOR16rm_EVEX */ |
| 104351 | 67019, |
| 104352 | /* XOR16rm_ND */ |
| 104353 | 67022, |
| 104354 | /* XOR16rm_NF */ |
| 104355 | 67025, |
| 104356 | /* XOR16rm_NF_ND */ |
| 104357 | 67028, |
| 104358 | /* XOR16rr */ |
| 104359 | 67031, |
| 104360 | /* XOR16rr_EVEX */ |
| 104361 | 67034, |
| 104362 | /* XOR16rr_EVEX_REV */ |
| 104363 | 67037, |
| 104364 | /* XOR16rr_ND */ |
| 104365 | 67040, |
| 104366 | /* XOR16rr_ND_REV */ |
| 104367 | 67043, |
| 104368 | /* XOR16rr_NF */ |
| 104369 | 67046, |
| 104370 | /* XOR16rr_NF_ND */ |
| 104371 | 67049, |
| 104372 | /* XOR16rr_NF_ND_REV */ |
| 104373 | 67052, |
| 104374 | /* XOR16rr_NF_REV */ |
| 104375 | 67055, |
| 104376 | /* XOR16rr_REV */ |
| 104377 | 67058, |
| 104378 | /* XOR32i32 */ |
| 104379 | 67061, |
| 104380 | /* XOR32mi */ |
| 104381 | 67062, |
| 104382 | /* XOR32mi8 */ |
| 104383 | 67064, |
| 104384 | /* XOR32mi8_EVEX */ |
| 104385 | 67066, |
| 104386 | /* XOR32mi8_ND */ |
| 104387 | 67068, |
| 104388 | /* XOR32mi8_NF */ |
| 104389 | 67071, |
| 104390 | /* XOR32mi8_NF_ND */ |
| 104391 | 67073, |
| 104392 | /* XOR32mi_EVEX */ |
| 104393 | 67076, |
| 104394 | /* XOR32mi_ND */ |
| 104395 | 67078, |
| 104396 | /* XOR32mi_NF */ |
| 104397 | 67081, |
| 104398 | /* XOR32mi_NF_ND */ |
| 104399 | 67083, |
| 104400 | /* XOR32mr */ |
| 104401 | 67086, |
| 104402 | /* XOR32mr_EVEX */ |
| 104403 | 67088, |
| 104404 | /* XOR32mr_ND */ |
| 104405 | 67090, |
| 104406 | /* XOR32mr_NF */ |
| 104407 | 67093, |
| 104408 | /* XOR32mr_NF_ND */ |
| 104409 | 67095, |
| 104410 | /* XOR32ri */ |
| 104411 | 67098, |
| 104412 | /* XOR32ri8 */ |
| 104413 | 67101, |
| 104414 | /* XOR32ri8_EVEX */ |
| 104415 | 67104, |
| 104416 | /* XOR32ri8_ND */ |
| 104417 | 67107, |
| 104418 | /* XOR32ri8_NF */ |
| 104419 | 67110, |
| 104420 | /* XOR32ri8_NF_ND */ |
| 104421 | 67113, |
| 104422 | /* XOR32ri_EVEX */ |
| 104423 | 67116, |
| 104424 | /* XOR32ri_ND */ |
| 104425 | 67119, |
| 104426 | /* XOR32ri_NF */ |
| 104427 | 67122, |
| 104428 | /* XOR32ri_NF_ND */ |
| 104429 | 67125, |
| 104430 | /* XOR32rm */ |
| 104431 | 67128, |
| 104432 | /* XOR32rm_EVEX */ |
| 104433 | 67131, |
| 104434 | /* XOR32rm_ND */ |
| 104435 | 67134, |
| 104436 | /* XOR32rm_NF */ |
| 104437 | 67137, |
| 104438 | /* XOR32rm_NF_ND */ |
| 104439 | 67140, |
| 104440 | /* XOR32rr */ |
| 104441 | 67143, |
| 104442 | /* XOR32rr_EVEX */ |
| 104443 | 67146, |
| 104444 | /* XOR32rr_EVEX_REV */ |
| 104445 | 67149, |
| 104446 | /* XOR32rr_ND */ |
| 104447 | 67152, |
| 104448 | /* XOR32rr_ND_REV */ |
| 104449 | 67155, |
| 104450 | /* XOR32rr_NF */ |
| 104451 | 67158, |
| 104452 | /* XOR32rr_NF_ND */ |
| 104453 | 67161, |
| 104454 | /* XOR32rr_NF_ND_REV */ |
| 104455 | 67164, |
| 104456 | /* XOR32rr_NF_REV */ |
| 104457 | 67167, |
| 104458 | /* XOR32rr_REV */ |
| 104459 | 67170, |
| 104460 | /* XOR64i32 */ |
| 104461 | 67173, |
| 104462 | /* XOR64mi32 */ |
| 104463 | 67174, |
| 104464 | /* XOR64mi32_EVEX */ |
| 104465 | 67176, |
| 104466 | /* XOR64mi32_ND */ |
| 104467 | 67178, |
| 104468 | /* XOR64mi32_NF */ |
| 104469 | 67181, |
| 104470 | /* XOR64mi32_NF_ND */ |
| 104471 | 67183, |
| 104472 | /* XOR64mi8 */ |
| 104473 | 67186, |
| 104474 | /* XOR64mi8_EVEX */ |
| 104475 | 67188, |
| 104476 | /* XOR64mi8_ND */ |
| 104477 | 67190, |
| 104478 | /* XOR64mi8_NF */ |
| 104479 | 67193, |
| 104480 | /* XOR64mi8_NF_ND */ |
| 104481 | 67195, |
| 104482 | /* XOR64mr */ |
| 104483 | 67198, |
| 104484 | /* XOR64mr_EVEX */ |
| 104485 | 67200, |
| 104486 | /* XOR64mr_ND */ |
| 104487 | 67202, |
| 104488 | /* XOR64mr_NF */ |
| 104489 | 67205, |
| 104490 | /* XOR64mr_NF_ND */ |
| 104491 | 67207, |
| 104492 | /* XOR64ri32 */ |
| 104493 | 67210, |
| 104494 | /* XOR64ri32_EVEX */ |
| 104495 | 67213, |
| 104496 | /* XOR64ri32_ND */ |
| 104497 | 67216, |
| 104498 | /* XOR64ri32_NF */ |
| 104499 | 67219, |
| 104500 | /* XOR64ri32_NF_ND */ |
| 104501 | 67222, |
| 104502 | /* XOR64ri8 */ |
| 104503 | 67225, |
| 104504 | /* XOR64ri8_EVEX */ |
| 104505 | 67228, |
| 104506 | /* XOR64ri8_ND */ |
| 104507 | 67231, |
| 104508 | /* XOR64ri8_NF */ |
| 104509 | 67234, |
| 104510 | /* XOR64ri8_NF_ND */ |
| 104511 | 67237, |
| 104512 | /* XOR64rm */ |
| 104513 | 67240, |
| 104514 | /* XOR64rm_EVEX */ |
| 104515 | 67243, |
| 104516 | /* XOR64rm_ND */ |
| 104517 | 67246, |
| 104518 | /* XOR64rm_NF */ |
| 104519 | 67249, |
| 104520 | /* XOR64rm_NF_ND */ |
| 104521 | 67252, |
| 104522 | /* XOR64rr */ |
| 104523 | 67255, |
| 104524 | /* XOR64rr_EVEX */ |
| 104525 | 67258, |
| 104526 | /* XOR64rr_EVEX_REV */ |
| 104527 | 67261, |
| 104528 | /* XOR64rr_ND */ |
| 104529 | 67264, |
| 104530 | /* XOR64rr_ND_REV */ |
| 104531 | 67267, |
| 104532 | /* XOR64rr_NF */ |
| 104533 | 67270, |
| 104534 | /* XOR64rr_NF_ND */ |
| 104535 | 67273, |
| 104536 | /* XOR64rr_NF_ND_REV */ |
| 104537 | 67276, |
| 104538 | /* XOR64rr_NF_REV */ |
| 104539 | 67279, |
| 104540 | /* XOR64rr_REV */ |
| 104541 | 67282, |
| 104542 | /* XOR8i8 */ |
| 104543 | 67285, |
| 104544 | /* XOR8mi */ |
| 104545 | 67286, |
| 104546 | /* XOR8mi8 */ |
| 104547 | 67288, |
| 104548 | /* XOR8mi_EVEX */ |
| 104549 | 67290, |
| 104550 | /* XOR8mi_ND */ |
| 104551 | 67292, |
| 104552 | /* XOR8mi_NF */ |
| 104553 | 67295, |
| 104554 | /* XOR8mi_NF_ND */ |
| 104555 | 67297, |
| 104556 | /* XOR8mr */ |
| 104557 | 67300, |
| 104558 | /* XOR8mr_EVEX */ |
| 104559 | 67302, |
| 104560 | /* XOR8mr_ND */ |
| 104561 | 67304, |
| 104562 | /* XOR8mr_NF */ |
| 104563 | 67307, |
| 104564 | /* XOR8mr_NF_ND */ |
| 104565 | 67309, |
| 104566 | /* XOR8ri */ |
| 104567 | 67312, |
| 104568 | /* XOR8ri8 */ |
| 104569 | 67315, |
| 104570 | /* XOR8ri_EVEX */ |
| 104571 | 67318, |
| 104572 | /* XOR8ri_ND */ |
| 104573 | 67321, |
| 104574 | /* XOR8ri_NF */ |
| 104575 | 67324, |
| 104576 | /* XOR8ri_NF_ND */ |
| 104577 | 67327, |
| 104578 | /* XOR8rm */ |
| 104579 | 67330, |
| 104580 | /* XOR8rm_EVEX */ |
| 104581 | 67333, |
| 104582 | /* XOR8rm_ND */ |
| 104583 | 67336, |
| 104584 | /* XOR8rm_NF */ |
| 104585 | 67339, |
| 104586 | /* XOR8rm_NF_ND */ |
| 104587 | 67342, |
| 104588 | /* XOR8rr */ |
| 104589 | 67345, |
| 104590 | /* XOR8rr_EVEX */ |
| 104591 | 67348, |
| 104592 | /* XOR8rr_EVEX_REV */ |
| 104593 | 67351, |
| 104594 | /* XOR8rr_ND */ |
| 104595 | 67354, |
| 104596 | /* XOR8rr_ND_REV */ |
| 104597 | 67357, |
| 104598 | /* XOR8rr_NF */ |
| 104599 | 67360, |
| 104600 | /* XOR8rr_NF_ND */ |
| 104601 | 67363, |
| 104602 | /* XOR8rr_NF_ND_REV */ |
| 104603 | 67366, |
| 104604 | /* XOR8rr_NF_REV */ |
| 104605 | 67369, |
| 104606 | /* XOR8rr_NOREX */ |
| 104607 | 67372, |
| 104608 | /* XOR8rr_REV */ |
| 104609 | 67375, |
| 104610 | /* XORPDrm */ |
| 104611 | 67378, |
| 104612 | /* XORPDrr */ |
| 104613 | 67381, |
| 104614 | /* XORPSrm */ |
| 104615 | 67384, |
| 104616 | /* XORPSrr */ |
| 104617 | 67387, |
| 104618 | /* XRELEASE_PREFIX */ |
| 104619 | 67390, |
| 104620 | /* XRESLDTRK */ |
| 104621 | 67390, |
| 104622 | /* XRSTOR */ |
| 104623 | 67390, |
| 104624 | /* XRSTOR64 */ |
| 104625 | 67391, |
| 104626 | /* XRSTORS */ |
| 104627 | 67392, |
| 104628 | /* XRSTORS64 */ |
| 104629 | 67393, |
| 104630 | /* XSAVE */ |
| 104631 | 67394, |
| 104632 | /* XSAVE64 */ |
| 104633 | 67395, |
| 104634 | /* XSAVEC */ |
| 104635 | 67396, |
| 104636 | /* XSAVEC64 */ |
| 104637 | 67397, |
| 104638 | /* XSAVEOPT */ |
| 104639 | 67398, |
| 104640 | /* XSAVEOPT64 */ |
| 104641 | 67399, |
| 104642 | /* XSAVES */ |
| 104643 | 67400, |
| 104644 | /* XSAVES64 */ |
| 104645 | 67401, |
| 104646 | /* XSETBV */ |
| 104647 | 67402, |
| 104648 | /* XSHA1 */ |
| 104649 | 67402, |
| 104650 | /* XSHA256 */ |
| 104651 | 67402, |
| 104652 | /* XSTORE */ |
| 104653 | 67402, |
| 104654 | /* XSUSLDTRK */ |
| 104655 | 67402, |
| 104656 | /* XTEST */ |
| 104657 | 67402, |
| 104658 | }; |
| 104659 | |
| 104660 | using namespace OpTypes; |
| 104661 | static const int16_t OpcodeOperandTypes[] = { |
| 104662 | |
| 104663 | /* PHI */ |
| 104664 | -1, |
| 104665 | /* INLINEASM */ |
| 104666 | /* INLINEASM_BR */ |
| 104667 | /* CFI_INSTRUCTION */ |
| 104668 | i32imm, |
| 104669 | /* EH_LABEL */ |
| 104670 | i32imm, |
| 104671 | /* GC_LABEL */ |
| 104672 | i32imm, |
| 104673 | /* ANNOTATION_LABEL */ |
| 104674 | i32imm, |
| 104675 | /* KILL */ |
| 104676 | /* EXTRACT_SUBREG */ |
| 104677 | -1, -1, i32imm, |
| 104678 | /* INSERT_SUBREG */ |
| 104679 | -1, -1, -1, i32imm, |
| 104680 | /* IMPLICIT_DEF */ |
| 104681 | -1, |
| 104682 | /* SUBREG_TO_REG */ |
| 104683 | -1, -1, -1, i32imm, |
| 104684 | /* COPY_TO_REGCLASS */ |
| 104685 | -1, -1, i32imm, |
| 104686 | /* DBG_VALUE */ |
| 104687 | /* DBG_VALUE_LIST */ |
| 104688 | /* DBG_INSTR_REF */ |
| 104689 | /* DBG_PHI */ |
| 104690 | /* DBG_LABEL */ |
| 104691 | -1, |
| 104692 | /* REG_SEQUENCE */ |
| 104693 | -1, -1, |
| 104694 | /* COPY */ |
| 104695 | -1, -1, |
| 104696 | /* BUNDLE */ |
| 104697 | /* LIFETIME_START */ |
| 104698 | i32imm, |
| 104699 | /* LIFETIME_END */ |
| 104700 | i32imm, |
| 104701 | /* PSEUDO_PROBE */ |
| 104702 | i64imm, i64imm, i8imm, i32imm, |
| 104703 | /* ARITH_FENCE */ |
| 104704 | -1, -1, |
| 104705 | /* STACKMAP */ |
| 104706 | i64imm, i32imm, |
| 104707 | /* FENTRY_CALL */ |
| 104708 | /* PATCHPOINT */ |
| 104709 | -1, i64imm, i32imm, -1, i32imm, i32imm, |
| 104710 | /* LOAD_STACK_GUARD */ |
| 104711 | -1, |
| 104712 | /* PREALLOCATED_SETUP */ |
| 104713 | i32imm, |
| 104714 | /* PREALLOCATED_ARG */ |
| 104715 | -1, i32imm, i32imm, |
| 104716 | /* STATEPOINT */ |
| 104717 | /* LOCAL_ESCAPE */ |
| 104718 | -1, i32imm, |
| 104719 | /* FAULTING_OP */ |
| 104720 | -1, |
| 104721 | /* PATCHABLE_OP */ |
| 104722 | /* PATCHABLE_FUNCTION_ENTER */ |
| 104723 | /* PATCHABLE_RET */ |
| 104724 | /* PATCHABLE_FUNCTION_EXIT */ |
| 104725 | /* PATCHABLE_TAIL_CALL */ |
| 104726 | /* PATCHABLE_EVENT_CALL */ |
| 104727 | -1, -1, |
| 104728 | /* PATCHABLE_TYPED_EVENT_CALL */ |
| 104729 | -1, -1, -1, |
| 104730 | /* ICALL_BRANCH_FUNNEL */ |
| 104731 | /* MEMBARRIER */ |
| 104732 | /* JUMP_TABLE_DEBUG_INFO */ |
| 104733 | i64imm, |
| 104734 | /* CONVERGENCECTRL_ENTRY */ |
| 104735 | -1, |
| 104736 | /* CONVERGENCECTRL_ANCHOR */ |
| 104737 | -1, |
| 104738 | /* CONVERGENCECTRL_LOOP */ |
| 104739 | -1, -1, |
| 104740 | /* CONVERGENCECTRL_GLUE */ |
| 104741 | -1, |
| 104742 | /* G_ASSERT_SEXT */ |
| 104743 | type0, type0, untyped_imm_0, |
| 104744 | /* G_ASSERT_ZEXT */ |
| 104745 | type0, type0, untyped_imm_0, |
| 104746 | /* G_ASSERT_ALIGN */ |
| 104747 | type0, type0, untyped_imm_0, |
| 104748 | /* G_ADD */ |
| 104749 | type0, type0, type0, |
| 104750 | /* G_SUB */ |
| 104751 | type0, type0, type0, |
| 104752 | /* G_MUL */ |
| 104753 | type0, type0, type0, |
| 104754 | /* G_SDIV */ |
| 104755 | type0, type0, type0, |
| 104756 | /* G_UDIV */ |
| 104757 | type0, type0, type0, |
| 104758 | /* G_SREM */ |
| 104759 | type0, type0, type0, |
| 104760 | /* G_UREM */ |
| 104761 | type0, type0, type0, |
| 104762 | /* G_SDIVREM */ |
| 104763 | type0, type0, type0, type0, |
| 104764 | /* G_UDIVREM */ |
| 104765 | type0, type0, type0, type0, |
| 104766 | /* G_AND */ |
| 104767 | type0, type0, type0, |
| 104768 | /* G_OR */ |
| 104769 | type0, type0, type0, |
| 104770 | /* G_XOR */ |
| 104771 | type0, type0, type0, |
| 104772 | /* G_IMPLICIT_DEF */ |
| 104773 | type0, |
| 104774 | /* G_PHI */ |
| 104775 | type0, |
| 104776 | /* G_FRAME_INDEX */ |
| 104777 | type0, -1, |
| 104778 | /* G_GLOBAL_VALUE */ |
| 104779 | type0, -1, |
| 104780 | /* G_PTRAUTH_GLOBAL_VALUE */ |
| 104781 | type0, -1, i32imm, type1, i64imm, |
| 104782 | /* G_CONSTANT_POOL */ |
| 104783 | type0, -1, |
| 104784 | /* G_EXTRACT */ |
| 104785 | type0, type1, untyped_imm_0, |
| 104786 | /* G_UNMERGE_VALUES */ |
| 104787 | type0, type1, |
| 104788 | /* G_INSERT */ |
| 104789 | type0, type0, type1, untyped_imm_0, |
| 104790 | /* G_MERGE_VALUES */ |
| 104791 | type0, type1, |
| 104792 | /* G_BUILD_VECTOR */ |
| 104793 | type0, type1, |
| 104794 | /* G_BUILD_VECTOR_TRUNC */ |
| 104795 | type0, type1, |
| 104796 | /* G_CONCAT_VECTORS */ |
| 104797 | type0, type1, |
| 104798 | /* G_PTRTOINT */ |
| 104799 | type0, type1, |
| 104800 | /* G_INTTOPTR */ |
| 104801 | type0, type1, |
| 104802 | /* G_BITCAST */ |
| 104803 | type0, type1, |
| 104804 | /* G_FREEZE */ |
| 104805 | type0, type0, |
| 104806 | /* G_CONSTANT_FOLD_BARRIER */ |
| 104807 | type0, type0, |
| 104808 | /* G_INTRINSIC_FPTRUNC_ROUND */ |
| 104809 | type0, type1, i32imm, |
| 104810 | /* G_INTRINSIC_TRUNC */ |
| 104811 | type0, type0, |
| 104812 | /* G_INTRINSIC_ROUND */ |
| 104813 | type0, type0, |
| 104814 | /* G_INTRINSIC_LRINT */ |
| 104815 | type0, type1, |
| 104816 | /* G_INTRINSIC_LLRINT */ |
| 104817 | type0, type1, |
| 104818 | /* G_INTRINSIC_ROUNDEVEN */ |
| 104819 | type0, type0, |
| 104820 | /* G_READCYCLECOUNTER */ |
| 104821 | type0, |
| 104822 | /* G_READSTEADYCOUNTER */ |
| 104823 | type0, |
| 104824 | /* G_LOAD */ |
| 104825 | type0, ptype1, |
| 104826 | /* G_SEXTLOAD */ |
| 104827 | type0, ptype1, |
| 104828 | /* G_ZEXTLOAD */ |
| 104829 | type0, ptype1, |
| 104830 | /* G_INDEXED_LOAD */ |
| 104831 | type0, ptype1, ptype1, type2, -1, |
| 104832 | /* G_INDEXED_SEXTLOAD */ |
| 104833 | type0, ptype1, ptype1, type2, -1, |
| 104834 | /* G_INDEXED_ZEXTLOAD */ |
| 104835 | type0, ptype1, ptype1, type2, -1, |
| 104836 | /* G_STORE */ |
| 104837 | type0, ptype1, |
| 104838 | /* G_INDEXED_STORE */ |
| 104839 | ptype0, type1, ptype0, ptype2, -1, |
| 104840 | /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ |
| 104841 | type0, type1, type2, type0, type0, |
| 104842 | /* G_ATOMIC_CMPXCHG */ |
| 104843 | type0, ptype1, type0, type0, |
| 104844 | /* G_ATOMICRMW_XCHG */ |
| 104845 | type0, ptype1, type0, |
| 104846 | /* G_ATOMICRMW_ADD */ |
| 104847 | type0, ptype1, type0, |
| 104848 | /* G_ATOMICRMW_SUB */ |
| 104849 | type0, ptype1, type0, |
| 104850 | /* G_ATOMICRMW_AND */ |
| 104851 | type0, ptype1, type0, |
| 104852 | /* G_ATOMICRMW_NAND */ |
| 104853 | type0, ptype1, type0, |
| 104854 | /* G_ATOMICRMW_OR */ |
| 104855 | type0, ptype1, type0, |
| 104856 | /* G_ATOMICRMW_XOR */ |
| 104857 | type0, ptype1, type0, |
| 104858 | /* G_ATOMICRMW_MAX */ |
| 104859 | type0, ptype1, type0, |
| 104860 | /* G_ATOMICRMW_MIN */ |
| 104861 | type0, ptype1, type0, |
| 104862 | /* G_ATOMICRMW_UMAX */ |
| 104863 | type0, ptype1, type0, |
| 104864 | /* G_ATOMICRMW_UMIN */ |
| 104865 | type0, ptype1, type0, |
| 104866 | /* G_ATOMICRMW_FADD */ |
| 104867 | type0, ptype1, type0, |
| 104868 | /* G_ATOMICRMW_FSUB */ |
| 104869 | type0, ptype1, type0, |
| 104870 | /* G_ATOMICRMW_FMAX */ |
| 104871 | type0, ptype1, type0, |
| 104872 | /* G_ATOMICRMW_FMIN */ |
| 104873 | type0, ptype1, type0, |
| 104874 | /* G_ATOMICRMW_UINC_WRAP */ |
| 104875 | type0, ptype1, type0, |
| 104876 | /* G_ATOMICRMW_UDEC_WRAP */ |
| 104877 | type0, ptype1, type0, |
| 104878 | /* G_FENCE */ |
| 104879 | i32imm, i32imm, |
| 104880 | /* G_PREFETCH */ |
| 104881 | ptype0, i32imm, i32imm, i32imm, |
| 104882 | /* G_BRCOND */ |
| 104883 | type0, -1, |
| 104884 | /* G_BRINDIRECT */ |
| 104885 | type0, |
| 104886 | /* G_INVOKE_REGION_START */ |
| 104887 | /* G_INTRINSIC */ |
| 104888 | -1, |
| 104889 | /* G_INTRINSIC_W_SIDE_EFFECTS */ |
| 104890 | -1, |
| 104891 | /* G_INTRINSIC_CONVERGENT */ |
| 104892 | -1, |
| 104893 | /* G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS */ |
| 104894 | -1, |
| 104895 | /* G_ANYEXT */ |
| 104896 | type0, type1, |
| 104897 | /* G_TRUNC */ |
| 104898 | type0, type1, |
| 104899 | /* G_CONSTANT */ |
| 104900 | type0, -1, |
| 104901 | /* G_FCONSTANT */ |
| 104902 | type0, -1, |
| 104903 | /* G_VASTART */ |
| 104904 | type0, |
| 104905 | /* G_VAARG */ |
| 104906 | type0, type1, -1, |
| 104907 | /* G_SEXT */ |
| 104908 | type0, type1, |
| 104909 | /* G_SEXT_INREG */ |
| 104910 | type0, type0, untyped_imm_0, |
| 104911 | /* G_ZEXT */ |
| 104912 | type0, type1, |
| 104913 | /* G_SHL */ |
| 104914 | type0, type0, type1, |
| 104915 | /* G_LSHR */ |
| 104916 | type0, type0, type1, |
| 104917 | /* G_ASHR */ |
| 104918 | type0, type0, type1, |
| 104919 | /* G_FSHL */ |
| 104920 | type0, type0, type0, type1, |
| 104921 | /* G_FSHR */ |
| 104922 | type0, type0, type0, type1, |
| 104923 | /* G_ROTR */ |
| 104924 | type0, type0, type1, |
| 104925 | /* G_ROTL */ |
| 104926 | type0, type0, type1, |
| 104927 | /* G_ICMP */ |
| 104928 | type0, -1, type1, type1, |
| 104929 | /* G_FCMP */ |
| 104930 | type0, -1, type1, type1, |
| 104931 | /* G_SCMP */ |
| 104932 | type0, type1, type1, |
| 104933 | /* G_UCMP */ |
| 104934 | type0, type1, type1, |
| 104935 | /* G_SELECT */ |
| 104936 | type0, type1, type0, type0, |
| 104937 | /* G_UADDO */ |
| 104938 | type0, type1, type0, type0, |
| 104939 | /* G_UADDE */ |
| 104940 | type0, type1, type0, type0, type1, |
| 104941 | /* G_USUBO */ |
| 104942 | type0, type1, type0, type0, |
| 104943 | /* G_USUBE */ |
| 104944 | type0, type1, type0, type0, type1, |
| 104945 | /* G_SADDO */ |
| 104946 | type0, type1, type0, type0, |
| 104947 | /* G_SADDE */ |
| 104948 | type0, type1, type0, type0, type1, |
| 104949 | /* G_SSUBO */ |
| 104950 | type0, type1, type0, type0, |
| 104951 | /* G_SSUBE */ |
| 104952 | type0, type1, type0, type0, type1, |
| 104953 | /* G_UMULO */ |
| 104954 | type0, type1, type0, type0, |
| 104955 | /* G_SMULO */ |
| 104956 | type0, type1, type0, type0, |
| 104957 | /* G_UMULH */ |
| 104958 | type0, type0, type0, |
| 104959 | /* G_SMULH */ |
| 104960 | type0, type0, type0, |
| 104961 | /* G_UADDSAT */ |
| 104962 | type0, type0, type0, |
| 104963 | /* G_SADDSAT */ |
| 104964 | type0, type0, type0, |
| 104965 | /* G_USUBSAT */ |
| 104966 | type0, type0, type0, |
| 104967 | /* G_SSUBSAT */ |
| 104968 | type0, type0, type0, |
| 104969 | /* G_USHLSAT */ |
| 104970 | type0, type0, type1, |
| 104971 | /* G_SSHLSAT */ |
| 104972 | type0, type0, type1, |
| 104973 | /* G_SMULFIX */ |
| 104974 | type0, type0, type0, untyped_imm_0, |
| 104975 | /* G_UMULFIX */ |
| 104976 | type0, type0, type0, untyped_imm_0, |
| 104977 | /* G_SMULFIXSAT */ |
| 104978 | type0, type0, type0, untyped_imm_0, |
| 104979 | /* G_UMULFIXSAT */ |
| 104980 | type0, type0, type0, untyped_imm_0, |
| 104981 | /* G_SDIVFIX */ |
| 104982 | type0, type0, type0, untyped_imm_0, |
| 104983 | /* G_UDIVFIX */ |
| 104984 | type0, type0, type0, untyped_imm_0, |
| 104985 | /* G_SDIVFIXSAT */ |
| 104986 | type0, type0, type0, untyped_imm_0, |
| 104987 | /* G_UDIVFIXSAT */ |
| 104988 | type0, type0, type0, untyped_imm_0, |
| 104989 | /* G_FADD */ |
| 104990 | type0, type0, type0, |
| 104991 | /* G_FSUB */ |
| 104992 | type0, type0, type0, |
| 104993 | /* G_FMUL */ |
| 104994 | type0, type0, type0, |
| 104995 | /* G_FMA */ |
| 104996 | type0, type0, type0, type0, |
| 104997 | /* G_FMAD */ |
| 104998 | type0, type0, type0, type0, |
| 104999 | /* G_FDIV */ |
| 105000 | type0, type0, type0, |
| 105001 | /* G_FREM */ |
| 105002 | type0, type0, type0, |
| 105003 | /* G_FPOW */ |
| 105004 | type0, type0, type0, |
| 105005 | /* G_FPOWI */ |
| 105006 | type0, type0, type1, |
| 105007 | /* G_FEXP */ |
| 105008 | type0, type0, |
| 105009 | /* G_FEXP2 */ |
| 105010 | type0, type0, |
| 105011 | /* G_FEXP10 */ |
| 105012 | type0, type0, |
| 105013 | /* G_FLOG */ |
| 105014 | type0, type0, |
| 105015 | /* G_FLOG2 */ |
| 105016 | type0, type0, |
| 105017 | /* G_FLOG10 */ |
| 105018 | type0, type0, |
| 105019 | /* G_FLDEXP */ |
| 105020 | type0, type0, type1, |
| 105021 | /* G_FFREXP */ |
| 105022 | type0, type1, type0, |
| 105023 | /* G_FNEG */ |
| 105024 | type0, type0, |
| 105025 | /* G_FPEXT */ |
| 105026 | type0, type1, |
| 105027 | /* G_FPTRUNC */ |
| 105028 | type0, type1, |
| 105029 | /* G_FPTOSI */ |
| 105030 | type0, type1, |
| 105031 | /* G_FPTOUI */ |
| 105032 | type0, type1, |
| 105033 | /* G_SITOFP */ |
| 105034 | type0, type1, |
| 105035 | /* G_UITOFP */ |
| 105036 | type0, type1, |
| 105037 | /* G_FABS */ |
| 105038 | type0, type0, |
| 105039 | /* G_FCOPYSIGN */ |
| 105040 | type0, type0, type1, |
| 105041 | /* G_IS_FPCLASS */ |
| 105042 | type0, type1, -1, |
| 105043 | /* G_FCANONICALIZE */ |
| 105044 | type0, type0, |
| 105045 | /* G_FMINNUM */ |
| 105046 | type0, type0, type0, |
| 105047 | /* G_FMAXNUM */ |
| 105048 | type0, type0, type0, |
| 105049 | /* G_FMINNUM_IEEE */ |
| 105050 | type0, type0, type0, |
| 105051 | /* G_FMAXNUM_IEEE */ |
| 105052 | type0, type0, type0, |
| 105053 | /* G_FMINIMUM */ |
| 105054 | type0, type0, type0, |
| 105055 | /* G_FMAXIMUM */ |
| 105056 | type0, type0, type0, |
| 105057 | /* G_GET_FPENV */ |
| 105058 | type0, |
| 105059 | /* G_SET_FPENV */ |
| 105060 | type0, |
| 105061 | /* G_RESET_FPENV */ |
| 105062 | /* G_GET_FPMODE */ |
| 105063 | type0, |
| 105064 | /* G_SET_FPMODE */ |
| 105065 | type0, |
| 105066 | /* G_RESET_FPMODE */ |
| 105067 | /* G_PTR_ADD */ |
| 105068 | ptype0, ptype0, type1, |
| 105069 | /* G_PTRMASK */ |
| 105070 | ptype0, ptype0, type1, |
| 105071 | /* G_SMIN */ |
| 105072 | type0, type0, type0, |
| 105073 | /* G_SMAX */ |
| 105074 | type0, type0, type0, |
| 105075 | /* G_UMIN */ |
| 105076 | type0, type0, type0, |
| 105077 | /* G_UMAX */ |
| 105078 | type0, type0, type0, |
| 105079 | /* G_ABS */ |
| 105080 | type0, type0, |
| 105081 | /* G_LROUND */ |
| 105082 | type0, type1, |
| 105083 | /* G_LLROUND */ |
| 105084 | type0, type1, |
| 105085 | /* G_BR */ |
| 105086 | -1, |
| 105087 | /* G_BRJT */ |
| 105088 | ptype0, -1, type1, |
| 105089 | /* G_VSCALE */ |
| 105090 | type0, -1, |
| 105091 | /* G_INSERT_SUBVECTOR */ |
| 105092 | type0, type0, type1, untyped_imm_0, |
| 105093 | /* G_EXTRACT_SUBVECTOR */ |
| 105094 | type0, type0, untyped_imm_0, |
| 105095 | /* G_INSERT_VECTOR_ELT */ |
| 105096 | type0, type0, type1, type2, |
| 105097 | /* G_EXTRACT_VECTOR_ELT */ |
| 105098 | type0, type1, type2, |
| 105099 | /* G_SHUFFLE_VECTOR */ |
| 105100 | type0, type1, type1, -1, |
| 105101 | /* G_SPLAT_VECTOR */ |
| 105102 | type0, type1, |
| 105103 | /* G_VECTOR_COMPRESS */ |
| 105104 | type0, type0, type1, type0, |
| 105105 | /* G_CTTZ */ |
| 105106 | type0, type1, |
| 105107 | /* G_CTTZ_ZERO_UNDEF */ |
| 105108 | type0, type1, |
| 105109 | /* G_CTLZ */ |
| 105110 | type0, type1, |
| 105111 | /* G_CTLZ_ZERO_UNDEF */ |
| 105112 | type0, type1, |
| 105113 | /* G_CTPOP */ |
| 105114 | type0, type1, |
| 105115 | /* G_BSWAP */ |
| 105116 | type0, type0, |
| 105117 | /* G_BITREVERSE */ |
| 105118 | type0, type0, |
| 105119 | /* G_FCEIL */ |
| 105120 | type0, type0, |
| 105121 | /* G_FCOS */ |
| 105122 | type0, type0, |
| 105123 | /* G_FSIN */ |
| 105124 | type0, type0, |
| 105125 | /* G_FTAN */ |
| 105126 | type0, type0, |
| 105127 | /* G_FACOS */ |
| 105128 | type0, type0, |
| 105129 | /* G_FASIN */ |
| 105130 | type0, type0, |
| 105131 | /* G_FATAN */ |
| 105132 | type0, type0, |
| 105133 | /* G_FCOSH */ |
| 105134 | type0, type0, |
| 105135 | /* G_FSINH */ |
| 105136 | type0, type0, |
| 105137 | /* G_FTANH */ |
| 105138 | type0, type0, |
| 105139 | /* G_FSQRT */ |
| 105140 | type0, type0, |
| 105141 | /* G_FFLOOR */ |
| 105142 | type0, type0, |
| 105143 | /* G_FRINT */ |
| 105144 | type0, type0, |
| 105145 | /* G_FNEARBYINT */ |
| 105146 | type0, type0, |
| 105147 | /* G_ADDRSPACE_CAST */ |
| 105148 | type0, type1, |
| 105149 | /* G_BLOCK_ADDR */ |
| 105150 | type0, -1, |
| 105151 | /* G_JUMP_TABLE */ |
| 105152 | type0, -1, |
| 105153 | /* G_DYN_STACKALLOC */ |
| 105154 | ptype0, type1, i32imm, |
| 105155 | /* G_STACKSAVE */ |
| 105156 | ptype0, |
| 105157 | /* G_STACKRESTORE */ |
| 105158 | ptype0, |
| 105159 | /* G_STRICT_FADD */ |
| 105160 | type0, type0, type0, |
| 105161 | /* G_STRICT_FSUB */ |
| 105162 | type0, type0, type0, |
| 105163 | /* G_STRICT_FMUL */ |
| 105164 | type0, type0, type0, |
| 105165 | /* G_STRICT_FDIV */ |
| 105166 | type0, type0, type0, |
| 105167 | /* G_STRICT_FREM */ |
| 105168 | type0, type0, type0, |
| 105169 | /* G_STRICT_FMA */ |
| 105170 | type0, type0, type0, type0, |
| 105171 | /* G_STRICT_FSQRT */ |
| 105172 | type0, type0, |
| 105173 | /* G_STRICT_FLDEXP */ |
| 105174 | type0, type0, type1, |
| 105175 | /* G_READ_REGISTER */ |
| 105176 | type0, -1, |
| 105177 | /* G_WRITE_REGISTER */ |
| 105178 | -1, type0, |
| 105179 | /* G_MEMCPY */ |
| 105180 | ptype0, ptype1, type2, untyped_imm_0, |
| 105181 | /* G_MEMCPY_INLINE */ |
| 105182 | ptype0, ptype1, type2, |
| 105183 | /* G_MEMMOVE */ |
| 105184 | ptype0, ptype1, type2, untyped_imm_0, |
| 105185 | /* G_MEMSET */ |
| 105186 | ptype0, type1, type2, untyped_imm_0, |
| 105187 | /* G_BZERO */ |
| 105188 | ptype0, type1, untyped_imm_0, |
| 105189 | /* G_TRAP */ |
| 105190 | /* G_DEBUGTRAP */ |
| 105191 | /* G_UBSANTRAP */ |
| 105192 | i8imm, |
| 105193 | /* G_VECREDUCE_SEQ_FADD */ |
| 105194 | type0, type1, type2, |
| 105195 | /* G_VECREDUCE_SEQ_FMUL */ |
| 105196 | type0, type1, type2, |
| 105197 | /* G_VECREDUCE_FADD */ |
| 105198 | type0, type1, |
| 105199 | /* G_VECREDUCE_FMUL */ |
| 105200 | type0, type1, |
| 105201 | /* G_VECREDUCE_FMAX */ |
| 105202 | type0, type1, |
| 105203 | /* G_VECREDUCE_FMIN */ |
| 105204 | type0, type1, |
| 105205 | /* G_VECREDUCE_FMAXIMUM */ |
| 105206 | type0, type1, |
| 105207 | /* G_VECREDUCE_FMINIMUM */ |
| 105208 | type0, type1, |
| 105209 | /* G_VECREDUCE_ADD */ |
| 105210 | type0, type1, |
| 105211 | /* G_VECREDUCE_MUL */ |
| 105212 | type0, type1, |
| 105213 | /* G_VECREDUCE_AND */ |
| 105214 | type0, type1, |
| 105215 | /* G_VECREDUCE_OR */ |
| 105216 | type0, type1, |
| 105217 | /* G_VECREDUCE_XOR */ |
| 105218 | type0, type1, |
| 105219 | /* G_VECREDUCE_SMAX */ |
| 105220 | type0, type1, |
| 105221 | /* G_VECREDUCE_SMIN */ |
| 105222 | type0, type1, |
| 105223 | /* G_VECREDUCE_UMAX */ |
| 105224 | type0, type1, |
| 105225 | /* G_VECREDUCE_UMIN */ |
| 105226 | type0, type1, |
| 105227 | /* G_SBFX */ |
| 105228 | type0, type0, type1, type1, |
| 105229 | /* G_UBFX */ |
| 105230 | type0, type0, type1, type1, |
| 105231 | /* ADD16ri_DB */ |
| 105232 | GR16, GR16, i16imm, |
| 105233 | /* ADD16rr_DB */ |
| 105234 | GR16, GR16, GR16, |
| 105235 | /* ADD32ri_DB */ |
| 105236 | GR32, GR32, i32imm, |
| 105237 | /* ADD32rr_DB */ |
| 105238 | GR32, GR32, GR32, |
| 105239 | /* ADD64ri32_DB */ |
| 105240 | GR64, GR64, i64i32imm, |
| 105241 | /* ADD64rr_DB */ |
| 105242 | GR64, GR64, GR64, |
| 105243 | /* ADD8ri_DB */ |
| 105244 | GR8, GR8, i8imm, |
| 105245 | /* ADD8rr_DB */ |
| 105246 | GR8, GR8, GR8, |
| 105247 | /* AVX1_SETALLONES */ |
| 105248 | VR256, |
| 105249 | /* AVX2_SETALLONES */ |
| 105250 | VR256, |
| 105251 | /* AVX512_128_SET0 */ |
| 105252 | VR128X, |
| 105253 | /* AVX512_256_SET0 */ |
| 105254 | VR256X, |
| 105255 | /* AVX512_512_SET0 */ |
| 105256 | VR512, |
| 105257 | /* AVX512_512_SETALLONES */ |
| 105258 | VR512, |
| 105259 | /* AVX512_512_SEXT_MASK_32 */ |
| 105260 | VR512, VK16WM, |
| 105261 | /* AVX512_512_SEXT_MASK_64 */ |
| 105262 | VR512, VK8WM, |
| 105263 | /* AVX512_FsFLD0F128 */ |
| 105264 | VR128X, |
| 105265 | /* AVX512_FsFLD0SD */ |
| 105266 | FR64X, |
| 105267 | /* AVX512_FsFLD0SH */ |
| 105268 | FR16X, |
| 105269 | /* AVX512_FsFLD0SS */ |
| 105270 | FR32X, |
| 105271 | /* AVX_SET0 */ |
| 105272 | VR256, |
| 105273 | /* CALL64m_RVMARKER */ |
| 105274 | i64imm, i64mem, |
| 105275 | /* CALL64pcrel32_RVMARKER */ |
| 105276 | i64imm, i64i32imm_brtarget, |
| 105277 | /* CALL64r_RVMARKER */ |
| 105278 | i64imm, GR64, |
| 105279 | /* FsFLD0F128 */ |
| 105280 | VR128, |
| 105281 | /* FsFLD0SD */ |
| 105282 | FR64, |
| 105283 | /* FsFLD0SH */ |
| 105284 | FR16, |
| 105285 | /* FsFLD0SS */ |
| 105286 | FR32, |
| 105287 | /* INDIRECT_THUNK_CALL32 */ |
| 105288 | GR32, |
| 105289 | /* INDIRECT_THUNK_CALL64 */ |
| 105290 | GR64, |
| 105291 | /* INDIRECT_THUNK_TCRETURN32 */ |
| 105292 | GR32, i32imm, |
| 105293 | /* INDIRECT_THUNK_TCRETURN64 */ |
| 105294 | GR64, i32imm, |
| 105295 | /* KSET0D */ |
| 105296 | VK32, |
| 105297 | /* KSET0Q */ |
| 105298 | VK64, |
| 105299 | /* KSET0W */ |
| 105300 | VK16, |
| 105301 | /* KSET1D */ |
| 105302 | VK32, |
| 105303 | /* KSET1Q */ |
| 105304 | VK64, |
| 105305 | /* KSET1W */ |
| 105306 | VK16, |
| 105307 | /* LCMPXCHG16B_NO_RBX */ |
| 105308 | i128mem, GR64, |
| 105309 | /* LCMPXCHG16B_SAVE_RBX */ |
| 105310 | GR64, i128mem, GR64, GR64, |
| 105311 | /* MMX_SET0 */ |
| 105312 | VR64, |
| 105313 | /* MORESTACK_RET */ |
| 105314 | /* MORESTACK_RET_RESTORE_R10 */ |
| 105315 | /* MOV32ImmSExti8 */ |
| 105316 | GR32, i32i8imm, |
| 105317 | /* MOV32r0 */ |
| 105318 | GR32, |
| 105319 | /* MOV32r1 */ |
| 105320 | GR32, |
| 105321 | /* MOV32r_1 */ |
| 105322 | GR32, |
| 105323 | /* MOV32ri64 */ |
| 105324 | GR64, i64i32imm, |
| 105325 | /* MOV64ImmSExti8 */ |
| 105326 | GR64, i64i8imm, |
| 105327 | /* MWAITX */ |
| 105328 | GR32, GR32, GR32, |
| 105329 | /* MWAITX_SAVE_RBX */ |
| 105330 | GR64, GR32, GR64, |
| 105331 | /* PLDTILECFGV */ |
| 105332 | opaquemem, |
| 105333 | /* PLEA32r */ |
| 105334 | GR32, anymem, |
| 105335 | /* PLEA64r */ |
| 105336 | GR64, anymem, |
| 105337 | /* PTDPBF16PSV */ |
| 105338 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 105339 | /* PTDPBSSDV */ |
| 105340 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 105341 | /* PTDPBSUDV */ |
| 105342 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 105343 | /* PTDPBUSDV */ |
| 105344 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 105345 | /* PTDPBUUDV */ |
| 105346 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 105347 | /* PTDPFP16PSV */ |
| 105348 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 105349 | /* PTILELOADDT1V */ |
| 105350 | TILE, GR16, GR16, opaquemem, |
| 105351 | /* PTILELOADDV */ |
| 105352 | TILE, GR16, GR16, opaquemem, |
| 105353 | /* PTILESTOREDV */ |
| 105354 | GR16, GR16, opaquemem, TILE, |
| 105355 | /* PTILEZEROV */ |
| 105356 | TILE, GR16, GR16, |
| 105357 | /* RDFLAGS32 */ |
| 105358 | GR32, |
| 105359 | /* RDFLAGS64 */ |
| 105360 | GR64, |
| 105361 | /* SEH_EndPrologue */ |
| 105362 | /* SEH_Epilogue */ |
| 105363 | /* SEH_PushFrame */ |
| 105364 | i1imm, |
| 105365 | /* SEH_PushReg */ |
| 105366 | i32imm, |
| 105367 | /* SEH_SaveReg */ |
| 105368 | i32imm, i32imm, |
| 105369 | /* SEH_SaveXMM */ |
| 105370 | i32imm, i32imm, |
| 105371 | /* SEH_SetFrame */ |
| 105372 | i32imm, i32imm, |
| 105373 | /* SEH_StackAlign */ |
| 105374 | i32imm, |
| 105375 | /* SEH_StackAlloc */ |
| 105376 | i32imm, |
| 105377 | /* SETB_C32r */ |
| 105378 | GR32, |
| 105379 | /* SETB_C64r */ |
| 105380 | GR64, |
| 105381 | /* SHLDROT32ri */ |
| 105382 | GR32, GR32, u8imm, |
| 105383 | /* SHLDROT64ri */ |
| 105384 | GR64, GR64, u8imm, |
| 105385 | /* SHRDROT32ri */ |
| 105386 | GR32, GR32, u8imm, |
| 105387 | /* SHRDROT64ri */ |
| 105388 | GR64, GR64, u8imm, |
| 105389 | /* VMOVAPSZ128mr_NOVLX */ |
| 105390 | f128mem, VR128X, |
| 105391 | /* VMOVAPSZ128rm_NOVLX */ |
| 105392 | VR128X, f128mem, |
| 105393 | /* VMOVAPSZ256mr_NOVLX */ |
| 105394 | f256mem, VR256X, |
| 105395 | /* VMOVAPSZ256rm_NOVLX */ |
| 105396 | VR256X, f256mem, |
| 105397 | /* VMOVUPSZ128mr_NOVLX */ |
| 105398 | f128mem, VR128X, |
| 105399 | /* VMOVUPSZ128rm_NOVLX */ |
| 105400 | VR128X, f128mem, |
| 105401 | /* VMOVUPSZ256mr_NOVLX */ |
| 105402 | f256mem, VR256X, |
| 105403 | /* VMOVUPSZ256rm_NOVLX */ |
| 105404 | VR256X, f256mem, |
| 105405 | /* V_SET0 */ |
| 105406 | VR128, |
| 105407 | /* V_SETALLONES */ |
| 105408 | VR128, |
| 105409 | /* WRFLAGS32 */ |
| 105410 | GR32, |
| 105411 | /* WRFLAGS64 */ |
| 105412 | GR64, |
| 105413 | /* XABORT_DEF */ |
| 105414 | /* XOR32_FP */ |
| 105415 | GR32, GR32, |
| 105416 | /* XOR64_FP */ |
| 105417 | GR64, GR64, |
| 105418 | /* AAA */ |
| 105419 | /* AAD8i8 */ |
| 105420 | i8imm, |
| 105421 | /* AADD32mr */ |
| 105422 | i32mem, GR32, |
| 105423 | /* AADD32mr_EVEX */ |
| 105424 | i32mem, GR32, |
| 105425 | /* AADD64mr */ |
| 105426 | i64mem, GR64, |
| 105427 | /* AADD64mr_EVEX */ |
| 105428 | i64mem, GR64, |
| 105429 | /* AAM8i8 */ |
| 105430 | i8imm, |
| 105431 | /* AAND32mr */ |
| 105432 | i32mem, GR32, |
| 105433 | /* AAND32mr_EVEX */ |
| 105434 | i32mem, GR32, |
| 105435 | /* AAND64mr */ |
| 105436 | i64mem, GR64, |
| 105437 | /* AAND64mr_EVEX */ |
| 105438 | i64mem, GR64, |
| 105439 | /* AAS */ |
| 105440 | /* ABS_F */ |
| 105441 | /* ABS_Fp32 */ |
| 105442 | RFP32, RFP32, |
| 105443 | /* ABS_Fp64 */ |
| 105444 | RFP64, RFP64, |
| 105445 | /* ABS_Fp80 */ |
| 105446 | RFP80, RFP80, |
| 105447 | /* ADC16i16 */ |
| 105448 | i16imm, |
| 105449 | /* ADC16mi */ |
| 105450 | i16mem, i16imm, |
| 105451 | /* ADC16mi8 */ |
| 105452 | i16mem, i16i8imm, |
| 105453 | /* ADC16mi8_EVEX */ |
| 105454 | i16mem, i16i8imm, |
| 105455 | /* ADC16mi8_ND */ |
| 105456 | GR16, i16mem, i16i8imm, |
| 105457 | /* ADC16mi_EVEX */ |
| 105458 | i16mem, i16imm, |
| 105459 | /* ADC16mi_ND */ |
| 105460 | GR16, i16mem, i16imm, |
| 105461 | /* ADC16mr */ |
| 105462 | i16mem, GR16, |
| 105463 | /* ADC16mr_EVEX */ |
| 105464 | i16mem, GR16, |
| 105465 | /* ADC16mr_ND */ |
| 105466 | GR16, i16mem, GR16, |
| 105467 | /* ADC16ri */ |
| 105468 | GR16, GR16, i16imm, |
| 105469 | /* ADC16ri8 */ |
| 105470 | GR16, GR16, i16i8imm, |
| 105471 | /* ADC16ri8_EVEX */ |
| 105472 | GR16, GR16, i16i8imm, |
| 105473 | /* ADC16ri8_ND */ |
| 105474 | GR16, GR16, i16i8imm, |
| 105475 | /* ADC16ri_EVEX */ |
| 105476 | GR16, GR16, i16imm, |
| 105477 | /* ADC16ri_ND */ |
| 105478 | GR16, GR16, i16imm, |
| 105479 | /* ADC16rm */ |
| 105480 | GR16, GR16, i16mem, |
| 105481 | /* ADC16rm_EVEX */ |
| 105482 | GR16, GR16, i16mem, |
| 105483 | /* ADC16rm_ND */ |
| 105484 | GR16, GR16, i16mem, |
| 105485 | /* ADC16rr */ |
| 105486 | GR16, GR16, GR16, |
| 105487 | /* ADC16rr_EVEX */ |
| 105488 | GR16, GR16, GR16, |
| 105489 | /* ADC16rr_EVEX_REV */ |
| 105490 | GR16, GR16, GR16, |
| 105491 | /* ADC16rr_ND */ |
| 105492 | GR16, GR16, GR16, |
| 105493 | /* ADC16rr_ND_REV */ |
| 105494 | GR16, GR16, GR16, |
| 105495 | /* ADC16rr_REV */ |
| 105496 | GR16, GR16, GR16, |
| 105497 | /* ADC32i32 */ |
| 105498 | i32imm, |
| 105499 | /* ADC32mi */ |
| 105500 | i32mem, i32imm, |
| 105501 | /* ADC32mi8 */ |
| 105502 | i32mem, i32i8imm, |
| 105503 | /* ADC32mi8_EVEX */ |
| 105504 | i32mem, i32i8imm, |
| 105505 | /* ADC32mi8_ND */ |
| 105506 | GR32, i32mem, i32i8imm, |
| 105507 | /* ADC32mi_EVEX */ |
| 105508 | i32mem, i32imm, |
| 105509 | /* ADC32mi_ND */ |
| 105510 | GR32, i32mem, i32imm, |
| 105511 | /* ADC32mr */ |
| 105512 | i32mem, GR32, |
| 105513 | /* ADC32mr_EVEX */ |
| 105514 | i32mem, GR32, |
| 105515 | /* ADC32mr_ND */ |
| 105516 | GR32, i32mem, GR32, |
| 105517 | /* ADC32ri */ |
| 105518 | GR32, GR32, i32imm, |
| 105519 | /* ADC32ri8 */ |
| 105520 | GR32, GR32, i32i8imm, |
| 105521 | /* ADC32ri8_EVEX */ |
| 105522 | GR32, GR32, i32i8imm, |
| 105523 | /* ADC32ri8_ND */ |
| 105524 | GR32, GR32, i32i8imm, |
| 105525 | /* ADC32ri_EVEX */ |
| 105526 | GR32, GR32, i32imm, |
| 105527 | /* ADC32ri_ND */ |
| 105528 | GR32, GR32, i32imm, |
| 105529 | /* ADC32rm */ |
| 105530 | GR32, GR32, i32mem, |
| 105531 | /* ADC32rm_EVEX */ |
| 105532 | GR32, GR32, i32mem, |
| 105533 | /* ADC32rm_ND */ |
| 105534 | GR32, GR32, i32mem, |
| 105535 | /* ADC32rr */ |
| 105536 | GR32, GR32, GR32, |
| 105537 | /* ADC32rr_EVEX */ |
| 105538 | GR32, GR32, GR32, |
| 105539 | /* ADC32rr_EVEX_REV */ |
| 105540 | GR32, GR32, GR32, |
| 105541 | /* ADC32rr_ND */ |
| 105542 | GR32, GR32, GR32, |
| 105543 | /* ADC32rr_ND_REV */ |
| 105544 | GR32, GR32, GR32, |
| 105545 | /* ADC32rr_REV */ |
| 105546 | GR32, GR32, GR32, |
| 105547 | /* ADC64i32 */ |
| 105548 | i64i32imm, |
| 105549 | /* ADC64mi32 */ |
| 105550 | i64mem, i64i32imm, |
| 105551 | /* ADC64mi32_EVEX */ |
| 105552 | i64mem, i64i32imm, |
| 105553 | /* ADC64mi32_ND */ |
| 105554 | GR64, i64mem, i64i32imm, |
| 105555 | /* ADC64mi8 */ |
| 105556 | i64mem, i64i8imm, |
| 105557 | /* ADC64mi8_EVEX */ |
| 105558 | i64mem, i64i8imm, |
| 105559 | /* ADC64mi8_ND */ |
| 105560 | GR64, i64mem, i64i8imm, |
| 105561 | /* ADC64mr */ |
| 105562 | i64mem, GR64, |
| 105563 | /* ADC64mr_EVEX */ |
| 105564 | i64mem, GR64, |
| 105565 | /* ADC64mr_ND */ |
| 105566 | GR64, i64mem, GR64, |
| 105567 | /* ADC64ri32 */ |
| 105568 | GR64, GR64, i64i32imm, |
| 105569 | /* ADC64ri32_EVEX */ |
| 105570 | GR64, GR64, i64i32imm, |
| 105571 | /* ADC64ri32_ND */ |
| 105572 | GR64, GR64, i64i32imm, |
| 105573 | /* ADC64ri8 */ |
| 105574 | GR64, GR64, i64i8imm, |
| 105575 | /* ADC64ri8_EVEX */ |
| 105576 | GR64, GR64, i64i8imm, |
| 105577 | /* ADC64ri8_ND */ |
| 105578 | GR64, GR64, i64i8imm, |
| 105579 | /* ADC64rm */ |
| 105580 | GR64, GR64, i64mem, |
| 105581 | /* ADC64rm_EVEX */ |
| 105582 | GR64, GR64, i64mem, |
| 105583 | /* ADC64rm_ND */ |
| 105584 | GR64, GR64, i64mem, |
| 105585 | /* ADC64rr */ |
| 105586 | GR64, GR64, GR64, |
| 105587 | /* ADC64rr_EVEX */ |
| 105588 | GR64, GR64, GR64, |
| 105589 | /* ADC64rr_EVEX_REV */ |
| 105590 | GR64, GR64, GR64, |
| 105591 | /* ADC64rr_ND */ |
| 105592 | GR64, GR64, GR64, |
| 105593 | /* ADC64rr_ND_REV */ |
| 105594 | GR64, GR64, GR64, |
| 105595 | /* ADC64rr_REV */ |
| 105596 | GR64, GR64, GR64, |
| 105597 | /* ADC8i8 */ |
| 105598 | i8imm, |
| 105599 | /* ADC8mi */ |
| 105600 | i8mem, i8imm, |
| 105601 | /* ADC8mi8 */ |
| 105602 | i8mem, i8imm, |
| 105603 | /* ADC8mi_EVEX */ |
| 105604 | i8mem, i8imm, |
| 105605 | /* ADC8mi_ND */ |
| 105606 | GR8, i8mem, i8imm, |
| 105607 | /* ADC8mr */ |
| 105608 | i8mem, GR8, |
| 105609 | /* ADC8mr_EVEX */ |
| 105610 | i8mem, GR8, |
| 105611 | /* ADC8mr_ND */ |
| 105612 | GR8, i8mem, GR8, |
| 105613 | /* ADC8ri */ |
| 105614 | GR8, GR8, i8imm, |
| 105615 | /* ADC8ri8 */ |
| 105616 | GR8, GR8, i8imm, |
| 105617 | /* ADC8ri_EVEX */ |
| 105618 | GR8, GR8, i8imm, |
| 105619 | /* ADC8ri_ND */ |
| 105620 | GR8, GR8, i8imm, |
| 105621 | /* ADC8rm */ |
| 105622 | GR8, GR8, i8mem, |
| 105623 | /* ADC8rm_EVEX */ |
| 105624 | GR8, GR8, i8mem, |
| 105625 | /* ADC8rm_ND */ |
| 105626 | GR8, GR8, i8mem, |
| 105627 | /* ADC8rr */ |
| 105628 | GR8, GR8, GR8, |
| 105629 | /* ADC8rr_EVEX */ |
| 105630 | GR8, GR8, GR8, |
| 105631 | /* ADC8rr_EVEX_REV */ |
| 105632 | GR8, GR8, GR8, |
| 105633 | /* ADC8rr_ND */ |
| 105634 | GR8, GR8, GR8, |
| 105635 | /* ADC8rr_ND_REV */ |
| 105636 | GR8, GR8, GR8, |
| 105637 | /* ADC8rr_REV */ |
| 105638 | GR8, GR8, GR8, |
| 105639 | /* ADCX32rm */ |
| 105640 | GR32, GR32, i32mem, |
| 105641 | /* ADCX32rm_EVEX */ |
| 105642 | GR32, GR32, i32mem, |
| 105643 | /* ADCX32rm_ND */ |
| 105644 | GR32, GR32, i32mem, |
| 105645 | /* ADCX32rr */ |
| 105646 | GR32, GR32, GR32, |
| 105647 | /* ADCX32rr_EVEX */ |
| 105648 | GR32, GR32, GR32, |
| 105649 | /* ADCX32rr_ND */ |
| 105650 | GR32, GR32, GR32, |
| 105651 | /* ADCX64rm */ |
| 105652 | GR64, GR64, i64mem, |
| 105653 | /* ADCX64rm_EVEX */ |
| 105654 | GR64, GR64, i64mem, |
| 105655 | /* ADCX64rm_ND */ |
| 105656 | GR64, GR64, i64mem, |
| 105657 | /* ADCX64rr */ |
| 105658 | GR64, GR64, GR64, |
| 105659 | /* ADCX64rr_EVEX */ |
| 105660 | GR64, GR64, GR64, |
| 105661 | /* ADCX64rr_ND */ |
| 105662 | GR64, GR64, GR64, |
| 105663 | /* ADD16i16 */ |
| 105664 | i16imm, |
| 105665 | /* ADD16mi */ |
| 105666 | i16mem, i16imm, |
| 105667 | /* ADD16mi8 */ |
| 105668 | i16mem, i16i8imm, |
| 105669 | /* ADD16mi8_EVEX */ |
| 105670 | i16mem, i16i8imm, |
| 105671 | /* ADD16mi8_ND */ |
| 105672 | GR16, i16mem, i16i8imm, |
| 105673 | /* ADD16mi8_NF */ |
| 105674 | i16mem, i16i8imm, |
| 105675 | /* ADD16mi8_NF_ND */ |
| 105676 | GR16, i16mem, i16i8imm, |
| 105677 | /* ADD16mi_EVEX */ |
| 105678 | i16mem, i16imm, |
| 105679 | /* ADD16mi_ND */ |
| 105680 | GR16, i16mem, i16imm, |
| 105681 | /* ADD16mi_NF */ |
| 105682 | i16mem, i16imm, |
| 105683 | /* ADD16mi_NF_ND */ |
| 105684 | GR16, i16mem, i16imm, |
| 105685 | /* ADD16mr */ |
| 105686 | i16mem, GR16, |
| 105687 | /* ADD16mr_EVEX */ |
| 105688 | i16mem, GR16, |
| 105689 | /* ADD16mr_ND */ |
| 105690 | GR16, i16mem, GR16, |
| 105691 | /* ADD16mr_NF */ |
| 105692 | i16mem, GR16, |
| 105693 | /* ADD16mr_NF_ND */ |
| 105694 | GR16, i16mem, GR16, |
| 105695 | /* ADD16ri */ |
| 105696 | GR16, GR16, i16imm, |
| 105697 | /* ADD16ri8 */ |
| 105698 | GR16, GR16, i16i8imm, |
| 105699 | /* ADD16ri8_EVEX */ |
| 105700 | GR16, GR16, i16i8imm, |
| 105701 | /* ADD16ri8_ND */ |
| 105702 | GR16, GR16, i16i8imm, |
| 105703 | /* ADD16ri8_NF */ |
| 105704 | GR16, GR16, i16i8imm, |
| 105705 | /* ADD16ri8_NF_ND */ |
| 105706 | GR16, GR16, i16i8imm, |
| 105707 | /* ADD16ri_EVEX */ |
| 105708 | GR16, GR16, i16imm, |
| 105709 | /* ADD16ri_ND */ |
| 105710 | GR16, GR16, i16imm, |
| 105711 | /* ADD16ri_NF */ |
| 105712 | GR16, GR16, i16imm, |
| 105713 | /* ADD16ri_NF_ND */ |
| 105714 | GR16, GR16, i16imm, |
| 105715 | /* ADD16rm */ |
| 105716 | GR16, GR16, i16mem, |
| 105717 | /* ADD16rm_EVEX */ |
| 105718 | GR16, GR16, i16mem, |
| 105719 | /* ADD16rm_ND */ |
| 105720 | GR16, GR16, i16mem, |
| 105721 | /* ADD16rm_NF */ |
| 105722 | GR16, GR16, i16mem, |
| 105723 | /* ADD16rm_NF_ND */ |
| 105724 | GR16, GR16, i16mem, |
| 105725 | /* ADD16rr */ |
| 105726 | GR16, GR16, GR16, |
| 105727 | /* ADD16rr_EVEX */ |
| 105728 | GR16, GR16, GR16, |
| 105729 | /* ADD16rr_EVEX_REV */ |
| 105730 | GR16, GR16, GR16, |
| 105731 | /* ADD16rr_ND */ |
| 105732 | GR16, GR16, GR16, |
| 105733 | /* ADD16rr_ND_REV */ |
| 105734 | GR16, GR16, GR16, |
| 105735 | /* ADD16rr_NF */ |
| 105736 | GR16, GR16, GR16, |
| 105737 | /* ADD16rr_NF_ND */ |
| 105738 | GR16, GR16, GR16, |
| 105739 | /* ADD16rr_NF_ND_REV */ |
| 105740 | GR16, GR16, GR16, |
| 105741 | /* ADD16rr_NF_REV */ |
| 105742 | GR16, GR16, GR16, |
| 105743 | /* ADD16rr_REV */ |
| 105744 | GR16, GR16, GR16, |
| 105745 | /* ADD32i32 */ |
| 105746 | i32imm, |
| 105747 | /* ADD32mi */ |
| 105748 | i32mem, i32imm, |
| 105749 | /* ADD32mi8 */ |
| 105750 | i32mem, i32i8imm, |
| 105751 | /* ADD32mi8_EVEX */ |
| 105752 | i32mem, i32i8imm, |
| 105753 | /* ADD32mi8_ND */ |
| 105754 | GR32, i32mem, i32i8imm, |
| 105755 | /* ADD32mi8_NF */ |
| 105756 | i32mem, i32i8imm, |
| 105757 | /* ADD32mi8_NF_ND */ |
| 105758 | GR32, i32mem, i32i8imm, |
| 105759 | /* ADD32mi_EVEX */ |
| 105760 | i32mem, i32imm, |
| 105761 | /* ADD32mi_ND */ |
| 105762 | GR32, i32mem, i32imm, |
| 105763 | /* ADD32mi_NF */ |
| 105764 | i32mem, i32imm, |
| 105765 | /* ADD32mi_NF_ND */ |
| 105766 | GR32, i32mem, i32imm, |
| 105767 | /* ADD32mr */ |
| 105768 | i32mem, GR32, |
| 105769 | /* ADD32mr_EVEX */ |
| 105770 | i32mem, GR32, |
| 105771 | /* ADD32mr_ND */ |
| 105772 | GR32, i32mem, GR32, |
| 105773 | /* ADD32mr_NF */ |
| 105774 | i32mem, GR32, |
| 105775 | /* ADD32mr_NF_ND */ |
| 105776 | GR32, i32mem, GR32, |
| 105777 | /* ADD32ri */ |
| 105778 | GR32, GR32, i32imm, |
| 105779 | /* ADD32ri8 */ |
| 105780 | GR32, GR32, i32i8imm, |
| 105781 | /* ADD32ri8_EVEX */ |
| 105782 | GR32, GR32, i32i8imm, |
| 105783 | /* ADD32ri8_ND */ |
| 105784 | GR32, GR32, i32i8imm, |
| 105785 | /* ADD32ri8_NF */ |
| 105786 | GR32, GR32, i32i8imm, |
| 105787 | /* ADD32ri8_NF_ND */ |
| 105788 | GR32, GR32, i32i8imm, |
| 105789 | /* ADD32ri_EVEX */ |
| 105790 | GR32, GR32, i32imm, |
| 105791 | /* ADD32ri_ND */ |
| 105792 | GR32, GR32, i32imm, |
| 105793 | /* ADD32ri_NF */ |
| 105794 | GR32, GR32, i32imm, |
| 105795 | /* ADD32ri_NF_ND */ |
| 105796 | GR32, GR32, i32imm, |
| 105797 | /* ADD32rm */ |
| 105798 | GR32, GR32, i32mem, |
| 105799 | /* ADD32rm_EVEX */ |
| 105800 | GR32, GR32, i32mem, |
| 105801 | /* ADD32rm_ND */ |
| 105802 | GR32, GR32, i32mem, |
| 105803 | /* ADD32rm_NF */ |
| 105804 | GR32, GR32, i32mem, |
| 105805 | /* ADD32rm_NF_ND */ |
| 105806 | GR32, GR32, i32mem, |
| 105807 | /* ADD32rr */ |
| 105808 | GR32, GR32, GR32, |
| 105809 | /* ADD32rr_EVEX */ |
| 105810 | GR32, GR32, GR32, |
| 105811 | /* ADD32rr_EVEX_REV */ |
| 105812 | GR32, GR32, GR32, |
| 105813 | /* ADD32rr_ND */ |
| 105814 | GR32, GR32, GR32, |
| 105815 | /* ADD32rr_ND_REV */ |
| 105816 | GR32, GR32, GR32, |
| 105817 | /* ADD32rr_NF */ |
| 105818 | GR32, GR32, GR32, |
| 105819 | /* ADD32rr_NF_ND */ |
| 105820 | GR32, GR32, GR32, |
| 105821 | /* ADD32rr_NF_ND_REV */ |
| 105822 | GR32, GR32, GR32, |
| 105823 | /* ADD32rr_NF_REV */ |
| 105824 | GR32, GR32, GR32, |
| 105825 | /* ADD32rr_REV */ |
| 105826 | GR32, GR32, GR32, |
| 105827 | /* ADD64i32 */ |
| 105828 | i64i32imm, |
| 105829 | /* ADD64mi32 */ |
| 105830 | i64mem, i64i32imm, |
| 105831 | /* ADD64mi32_EVEX */ |
| 105832 | i64mem, i64i32imm, |
| 105833 | /* ADD64mi32_ND */ |
| 105834 | GR64, i64mem, i64i32imm, |
| 105835 | /* ADD64mi32_NF */ |
| 105836 | i64mem, i64i32imm, |
| 105837 | /* ADD64mi32_NF_ND */ |
| 105838 | GR64, i64mem, i64i32imm, |
| 105839 | /* ADD64mi8 */ |
| 105840 | i64mem, i64i8imm, |
| 105841 | /* ADD64mi8_EVEX */ |
| 105842 | i64mem, i64i8imm, |
| 105843 | /* ADD64mi8_ND */ |
| 105844 | GR64, i64mem, i64i8imm, |
| 105845 | /* ADD64mi8_NF */ |
| 105846 | i64mem, i64i8imm, |
| 105847 | /* ADD64mi8_NF_ND */ |
| 105848 | GR64, i64mem, i64i8imm, |
| 105849 | /* ADD64mr */ |
| 105850 | i64mem, GR64, |
| 105851 | /* ADD64mr_EVEX */ |
| 105852 | i64mem, GR64, |
| 105853 | /* ADD64mr_ND */ |
| 105854 | GR64, i64mem, GR64, |
| 105855 | /* ADD64mr_NF */ |
| 105856 | i64mem, GR64, |
| 105857 | /* ADD64mr_NF_ND */ |
| 105858 | GR64, i64mem, GR64, |
| 105859 | /* ADD64ri32 */ |
| 105860 | GR64, GR64, i64i32imm, |
| 105861 | /* ADD64ri32_EVEX */ |
| 105862 | GR64, GR64, i64i32imm, |
| 105863 | /* ADD64ri32_ND */ |
| 105864 | GR64, GR64, i64i32imm, |
| 105865 | /* ADD64ri32_NF */ |
| 105866 | GR64, GR64, i64i32imm, |
| 105867 | /* ADD64ri32_NF_ND */ |
| 105868 | GR64, GR64, i64i32imm, |
| 105869 | /* ADD64ri8 */ |
| 105870 | GR64, GR64, i64i8imm, |
| 105871 | /* ADD64ri8_EVEX */ |
| 105872 | GR64, GR64, i64i8imm, |
| 105873 | /* ADD64ri8_ND */ |
| 105874 | GR64, GR64, i64i8imm, |
| 105875 | /* ADD64ri8_NF */ |
| 105876 | GR64, GR64, i64i8imm, |
| 105877 | /* ADD64ri8_NF_ND */ |
| 105878 | GR64, GR64, i64i8imm, |
| 105879 | /* ADD64rm */ |
| 105880 | GR64, GR64, i64mem, |
| 105881 | /* ADD64rm_EVEX */ |
| 105882 | GR64, GR64, i64mem, |
| 105883 | /* ADD64rm_ND */ |
| 105884 | GR64, GR64, i64mem, |
| 105885 | /* ADD64rm_NF */ |
| 105886 | GR64, GR64, i64mem, |
| 105887 | /* ADD64rm_NF_ND */ |
| 105888 | GR64, GR64, i64mem, |
| 105889 | /* ADD64rr */ |
| 105890 | GR64, GR64, GR64, |
| 105891 | /* ADD64rr_EVEX */ |
| 105892 | GR64, GR64, GR64, |
| 105893 | /* ADD64rr_EVEX_REV */ |
| 105894 | GR64, GR64, GR64, |
| 105895 | /* ADD64rr_ND */ |
| 105896 | GR64, GR64, GR64, |
| 105897 | /* ADD64rr_ND_REV */ |
| 105898 | GR64, GR64, GR64, |
| 105899 | /* ADD64rr_NF */ |
| 105900 | GR64, GR64, GR64, |
| 105901 | /* ADD64rr_NF_ND */ |
| 105902 | GR64, GR64, GR64, |
| 105903 | /* ADD64rr_NF_ND_REV */ |
| 105904 | GR64, GR64, GR64, |
| 105905 | /* ADD64rr_NF_REV */ |
| 105906 | GR64, GR64, GR64, |
| 105907 | /* ADD64rr_REV */ |
| 105908 | GR64, GR64, GR64, |
| 105909 | /* ADD8i8 */ |
| 105910 | i8imm, |
| 105911 | /* ADD8mi */ |
| 105912 | i8mem, i8imm, |
| 105913 | /* ADD8mi8 */ |
| 105914 | i8mem, i8imm, |
| 105915 | /* ADD8mi_EVEX */ |
| 105916 | i8mem, i8imm, |
| 105917 | /* ADD8mi_ND */ |
| 105918 | GR8, i8mem, i8imm, |
| 105919 | /* ADD8mi_NF */ |
| 105920 | i8mem, i8imm, |
| 105921 | /* ADD8mi_NF_ND */ |
| 105922 | GR8, i8mem, i8imm, |
| 105923 | /* ADD8mr */ |
| 105924 | i8mem, GR8, |
| 105925 | /* ADD8mr_EVEX */ |
| 105926 | i8mem, GR8, |
| 105927 | /* ADD8mr_ND */ |
| 105928 | GR8, i8mem, GR8, |
| 105929 | /* ADD8mr_NF */ |
| 105930 | i8mem, GR8, |
| 105931 | /* ADD8mr_NF_ND */ |
| 105932 | GR8, i8mem, GR8, |
| 105933 | /* ADD8ri */ |
| 105934 | GR8, GR8, i8imm, |
| 105935 | /* ADD8ri8 */ |
| 105936 | GR8, GR8, i8imm, |
| 105937 | /* ADD8ri_EVEX */ |
| 105938 | GR8, GR8, i8imm, |
| 105939 | /* ADD8ri_ND */ |
| 105940 | GR8, GR8, i8imm, |
| 105941 | /* ADD8ri_NF */ |
| 105942 | GR8, GR8, i8imm, |
| 105943 | /* ADD8ri_NF_ND */ |
| 105944 | GR8, GR8, i8imm, |
| 105945 | /* ADD8rm */ |
| 105946 | GR8, GR8, i8mem, |
| 105947 | /* ADD8rm_EVEX */ |
| 105948 | GR8, GR8, i8mem, |
| 105949 | /* ADD8rm_ND */ |
| 105950 | GR8, GR8, i8mem, |
| 105951 | /* ADD8rm_NF */ |
| 105952 | GR8, GR8, i8mem, |
| 105953 | /* ADD8rm_NF_ND */ |
| 105954 | GR8, GR8, i8mem, |
| 105955 | /* ADD8rr */ |
| 105956 | GR8, GR8, GR8, |
| 105957 | /* ADD8rr_EVEX */ |
| 105958 | GR8, GR8, GR8, |
| 105959 | /* ADD8rr_EVEX_REV */ |
| 105960 | GR8, GR8, GR8, |
| 105961 | /* ADD8rr_ND */ |
| 105962 | GR8, GR8, GR8, |
| 105963 | /* ADD8rr_ND_REV */ |
| 105964 | GR8, GR8, GR8, |
| 105965 | /* ADD8rr_NF */ |
| 105966 | GR8, GR8, GR8, |
| 105967 | /* ADD8rr_NF_ND */ |
| 105968 | GR8, GR8, GR8, |
| 105969 | /* ADD8rr_NF_ND_REV */ |
| 105970 | GR8, GR8, GR8, |
| 105971 | /* ADD8rr_NF_REV */ |
| 105972 | GR8, GR8, GR8, |
| 105973 | /* ADD8rr_REV */ |
| 105974 | GR8, GR8, GR8, |
| 105975 | /* ADDPDrm */ |
| 105976 | VR128, VR128, f128mem, |
| 105977 | /* ADDPDrr */ |
| 105978 | VR128, VR128, VR128, |
| 105979 | /* ADDPSrm */ |
| 105980 | VR128, VR128, f128mem, |
| 105981 | /* ADDPSrr */ |
| 105982 | VR128, VR128, VR128, |
| 105983 | /* ADDR16_PREFIX */ |
| 105984 | /* ADDR32_PREFIX */ |
| 105985 | /* ADDSDrm */ |
| 105986 | FR64, FR64, f64mem, |
| 105987 | /* ADDSDrm_Int */ |
| 105988 | VR128, VR128, sdmem, |
| 105989 | /* ADDSDrr */ |
| 105990 | FR64, FR64, FR64, |
| 105991 | /* ADDSDrr_Int */ |
| 105992 | VR128, VR128, VR128, |
| 105993 | /* ADDSSrm */ |
| 105994 | FR32, FR32, f32mem, |
| 105995 | /* ADDSSrm_Int */ |
| 105996 | VR128, VR128, ssmem, |
| 105997 | /* ADDSSrr */ |
| 105998 | FR32, FR32, FR32, |
| 105999 | /* ADDSSrr_Int */ |
| 106000 | VR128, VR128, VR128, |
| 106001 | /* ADDSUBPDrm */ |
| 106002 | VR128, VR128, f128mem, |
| 106003 | /* ADDSUBPDrr */ |
| 106004 | VR128, VR128, VR128, |
| 106005 | /* ADDSUBPSrm */ |
| 106006 | VR128, VR128, f128mem, |
| 106007 | /* ADDSUBPSrr */ |
| 106008 | VR128, VR128, VR128, |
| 106009 | /* ADD_F32m */ |
| 106010 | f32mem, |
| 106011 | /* ADD_F64m */ |
| 106012 | f64mem, |
| 106013 | /* ADD_FI16m */ |
| 106014 | i16mem, |
| 106015 | /* ADD_FI32m */ |
| 106016 | i32mem, |
| 106017 | /* ADD_FPrST0 */ |
| 106018 | RSTi, |
| 106019 | /* ADD_FST0r */ |
| 106020 | RSTi, |
| 106021 | /* ADD_Fp32 */ |
| 106022 | RFP32, RFP32, RFP32, |
| 106023 | /* ADD_Fp32m */ |
| 106024 | RFP32, RFP32, f32mem, |
| 106025 | /* ADD_Fp64 */ |
| 106026 | RFP64, RFP64, RFP64, |
| 106027 | /* ADD_Fp64m */ |
| 106028 | RFP64, RFP64, f64mem, |
| 106029 | /* ADD_Fp64m32 */ |
| 106030 | RFP64, RFP64, f32mem, |
| 106031 | /* ADD_Fp80 */ |
| 106032 | RFP80, RFP80, RFP80, |
| 106033 | /* ADD_Fp80m32 */ |
| 106034 | RFP80, RFP80, f32mem, |
| 106035 | /* ADD_Fp80m64 */ |
| 106036 | RFP80, RFP80, f64mem, |
| 106037 | /* ADD_FpI16m32 */ |
| 106038 | RFP32, RFP32, i16mem, |
| 106039 | /* ADD_FpI16m64 */ |
| 106040 | RFP64, RFP64, i16mem, |
| 106041 | /* ADD_FpI16m80 */ |
| 106042 | RFP80, RFP80, i16mem, |
| 106043 | /* ADD_FpI32m32 */ |
| 106044 | RFP32, RFP32, i32mem, |
| 106045 | /* ADD_FpI32m64 */ |
| 106046 | RFP64, RFP64, i32mem, |
| 106047 | /* ADD_FpI32m80 */ |
| 106048 | RFP80, RFP80, i32mem, |
| 106049 | /* ADD_FrST0 */ |
| 106050 | RSTi, |
| 106051 | /* ADJCALLSTACKDOWN32 */ |
| 106052 | i32imm, i32imm, i32imm, |
| 106053 | /* ADJCALLSTACKDOWN64 */ |
| 106054 | i32imm, i32imm, i32imm, |
| 106055 | /* ADJCALLSTACKUP32 */ |
| 106056 | i32imm, i32imm, |
| 106057 | /* ADJCALLSTACKUP64 */ |
| 106058 | i32imm, i32imm, |
| 106059 | /* ADOX32rm */ |
| 106060 | GR32, GR32, i32mem, |
| 106061 | /* ADOX32rm_EVEX */ |
| 106062 | GR32, GR32, i32mem, |
| 106063 | /* ADOX32rm_ND */ |
| 106064 | GR32, GR32, i32mem, |
| 106065 | /* ADOX32rr */ |
| 106066 | GR32, GR32, GR32, |
| 106067 | /* ADOX32rr_EVEX */ |
| 106068 | GR32, GR32, GR32, |
| 106069 | /* ADOX32rr_ND */ |
| 106070 | GR32, GR32, GR32, |
| 106071 | /* ADOX64rm */ |
| 106072 | GR64, GR64, i64mem, |
| 106073 | /* ADOX64rm_EVEX */ |
| 106074 | GR64, GR64, i64mem, |
| 106075 | /* ADOX64rm_ND */ |
| 106076 | GR64, GR64, i64mem, |
| 106077 | /* ADOX64rr */ |
| 106078 | GR64, GR64, GR64, |
| 106079 | /* ADOX64rr_EVEX */ |
| 106080 | GR64, GR64, GR64, |
| 106081 | /* ADOX64rr_ND */ |
| 106082 | GR64, GR64, GR64, |
| 106083 | /* AESDEC128KL */ |
| 106084 | VR128, VR128, opaquemem, |
| 106085 | /* AESDEC256KL */ |
| 106086 | VR128, VR128, opaquemem, |
| 106087 | /* AESDECLASTrm */ |
| 106088 | VR128, VR128, i128mem, |
| 106089 | /* AESDECLASTrr */ |
| 106090 | VR128, VR128, VR128, |
| 106091 | /* AESDECWIDE128KL */ |
| 106092 | opaquemem, |
| 106093 | /* AESDECWIDE256KL */ |
| 106094 | opaquemem, |
| 106095 | /* AESDECrm */ |
| 106096 | VR128, VR128, i128mem, |
| 106097 | /* AESDECrr */ |
| 106098 | VR128, VR128, VR128, |
| 106099 | /* AESENC128KL */ |
| 106100 | VR128, VR128, opaquemem, |
| 106101 | /* AESENC256KL */ |
| 106102 | VR128, VR128, opaquemem, |
| 106103 | /* AESENCLASTrm */ |
| 106104 | VR128, VR128, i128mem, |
| 106105 | /* AESENCLASTrr */ |
| 106106 | VR128, VR128, VR128, |
| 106107 | /* AESENCWIDE128KL */ |
| 106108 | opaquemem, |
| 106109 | /* AESENCWIDE256KL */ |
| 106110 | opaquemem, |
| 106111 | /* AESENCrm */ |
| 106112 | VR128, VR128, i128mem, |
| 106113 | /* AESENCrr */ |
| 106114 | VR128, VR128, VR128, |
| 106115 | /* AESIMCrm */ |
| 106116 | VR128, i128mem, |
| 106117 | /* AESIMCrr */ |
| 106118 | VR128, VR128, |
| 106119 | /* AESKEYGENASSIST128rm */ |
| 106120 | VR128, i128mem, u8imm, |
| 106121 | /* AESKEYGENASSIST128rr */ |
| 106122 | VR128, VR128, u8imm, |
| 106123 | /* AND16i16 */ |
| 106124 | i16imm, |
| 106125 | /* AND16mi */ |
| 106126 | i16mem, i16imm, |
| 106127 | /* AND16mi8 */ |
| 106128 | i16mem, i16i8imm, |
| 106129 | /* AND16mi8_EVEX */ |
| 106130 | i16mem, i16i8imm, |
| 106131 | /* AND16mi8_ND */ |
| 106132 | GR16, i16mem, i16i8imm, |
| 106133 | /* AND16mi8_NF */ |
| 106134 | i16mem, i16i8imm, |
| 106135 | /* AND16mi8_NF_ND */ |
| 106136 | GR16, i16mem, i16i8imm, |
| 106137 | /* AND16mi_EVEX */ |
| 106138 | i16mem, i16imm, |
| 106139 | /* AND16mi_ND */ |
| 106140 | GR16, i16mem, i16imm, |
| 106141 | /* AND16mi_NF */ |
| 106142 | i16mem, i16imm, |
| 106143 | /* AND16mi_NF_ND */ |
| 106144 | GR16, i16mem, i16imm, |
| 106145 | /* AND16mr */ |
| 106146 | i16mem, GR16, |
| 106147 | /* AND16mr_EVEX */ |
| 106148 | i16mem, GR16, |
| 106149 | /* AND16mr_ND */ |
| 106150 | GR16, i16mem, GR16, |
| 106151 | /* AND16mr_NF */ |
| 106152 | i16mem, GR16, |
| 106153 | /* AND16mr_NF_ND */ |
| 106154 | GR16, i16mem, GR16, |
| 106155 | /* AND16ri */ |
| 106156 | GR16, GR16, i16imm, |
| 106157 | /* AND16ri8 */ |
| 106158 | GR16, GR16, i16i8imm, |
| 106159 | /* AND16ri8_EVEX */ |
| 106160 | GR16, GR16, i16i8imm, |
| 106161 | /* AND16ri8_ND */ |
| 106162 | GR16, GR16, i16i8imm, |
| 106163 | /* AND16ri8_NF */ |
| 106164 | GR16, GR16, i16i8imm, |
| 106165 | /* AND16ri8_NF_ND */ |
| 106166 | GR16, GR16, i16i8imm, |
| 106167 | /* AND16ri_EVEX */ |
| 106168 | GR16, GR16, i16imm, |
| 106169 | /* AND16ri_ND */ |
| 106170 | GR16, GR16, i16imm, |
| 106171 | /* AND16ri_NF */ |
| 106172 | GR16, GR16, i16imm, |
| 106173 | /* AND16ri_NF_ND */ |
| 106174 | GR16, GR16, i16imm, |
| 106175 | /* AND16rm */ |
| 106176 | GR16, GR16, i16mem, |
| 106177 | /* AND16rm_EVEX */ |
| 106178 | GR16, GR16, i16mem, |
| 106179 | /* AND16rm_ND */ |
| 106180 | GR16, GR16, i16mem, |
| 106181 | /* AND16rm_NF */ |
| 106182 | GR16, GR16, i16mem, |
| 106183 | /* AND16rm_NF_ND */ |
| 106184 | GR16, GR16, i16mem, |
| 106185 | /* AND16rr */ |
| 106186 | GR16, GR16, GR16, |
| 106187 | /* AND16rr_EVEX */ |
| 106188 | GR16, GR16, GR16, |
| 106189 | /* AND16rr_EVEX_REV */ |
| 106190 | GR16, GR16, GR16, |
| 106191 | /* AND16rr_ND */ |
| 106192 | GR16, GR16, GR16, |
| 106193 | /* AND16rr_ND_REV */ |
| 106194 | GR16, GR16, GR16, |
| 106195 | /* AND16rr_NF */ |
| 106196 | GR16, GR16, GR16, |
| 106197 | /* AND16rr_NF_ND */ |
| 106198 | GR16, GR16, GR16, |
| 106199 | /* AND16rr_NF_ND_REV */ |
| 106200 | GR16, GR16, GR16, |
| 106201 | /* AND16rr_NF_REV */ |
| 106202 | GR16, GR16, GR16, |
| 106203 | /* AND16rr_REV */ |
| 106204 | GR16, GR16, GR16, |
| 106205 | /* AND32i32 */ |
| 106206 | i32imm, |
| 106207 | /* AND32mi */ |
| 106208 | i32mem, i32imm, |
| 106209 | /* AND32mi8 */ |
| 106210 | i32mem, i32i8imm, |
| 106211 | /* AND32mi8_EVEX */ |
| 106212 | i32mem, i32i8imm, |
| 106213 | /* AND32mi8_ND */ |
| 106214 | GR32, i32mem, i32i8imm, |
| 106215 | /* AND32mi8_NF */ |
| 106216 | i32mem, i32i8imm, |
| 106217 | /* AND32mi8_NF_ND */ |
| 106218 | GR32, i32mem, i32i8imm, |
| 106219 | /* AND32mi_EVEX */ |
| 106220 | i32mem, i32imm, |
| 106221 | /* AND32mi_ND */ |
| 106222 | GR32, i32mem, i32imm, |
| 106223 | /* AND32mi_NF */ |
| 106224 | i32mem, i32imm, |
| 106225 | /* AND32mi_NF_ND */ |
| 106226 | GR32, i32mem, i32imm, |
| 106227 | /* AND32mr */ |
| 106228 | i32mem, GR32, |
| 106229 | /* AND32mr_EVEX */ |
| 106230 | i32mem, GR32, |
| 106231 | /* AND32mr_ND */ |
| 106232 | GR32, i32mem, GR32, |
| 106233 | /* AND32mr_NF */ |
| 106234 | i32mem, GR32, |
| 106235 | /* AND32mr_NF_ND */ |
| 106236 | GR32, i32mem, GR32, |
| 106237 | /* AND32ri */ |
| 106238 | GR32, GR32, i32imm, |
| 106239 | /* AND32ri8 */ |
| 106240 | GR32, GR32, i32i8imm, |
| 106241 | /* AND32ri8_EVEX */ |
| 106242 | GR32, GR32, i32i8imm, |
| 106243 | /* AND32ri8_ND */ |
| 106244 | GR32, GR32, i32i8imm, |
| 106245 | /* AND32ri8_NF */ |
| 106246 | GR32, GR32, i32i8imm, |
| 106247 | /* AND32ri8_NF_ND */ |
| 106248 | GR32, GR32, i32i8imm, |
| 106249 | /* AND32ri_EVEX */ |
| 106250 | GR32, GR32, i32imm, |
| 106251 | /* AND32ri_ND */ |
| 106252 | GR32, GR32, i32imm, |
| 106253 | /* AND32ri_NF */ |
| 106254 | GR32, GR32, i32imm, |
| 106255 | /* AND32ri_NF_ND */ |
| 106256 | GR32, GR32, i32imm, |
| 106257 | /* AND32rm */ |
| 106258 | GR32, GR32, i32mem, |
| 106259 | /* AND32rm_EVEX */ |
| 106260 | GR32, GR32, i32mem, |
| 106261 | /* AND32rm_ND */ |
| 106262 | GR32, GR32, i32mem, |
| 106263 | /* AND32rm_NF */ |
| 106264 | GR32, GR32, i32mem, |
| 106265 | /* AND32rm_NF_ND */ |
| 106266 | GR32, GR32, i32mem, |
| 106267 | /* AND32rr */ |
| 106268 | GR32, GR32, GR32, |
| 106269 | /* AND32rr_EVEX */ |
| 106270 | GR32, GR32, GR32, |
| 106271 | /* AND32rr_EVEX_REV */ |
| 106272 | GR32, GR32, GR32, |
| 106273 | /* AND32rr_ND */ |
| 106274 | GR32, GR32, GR32, |
| 106275 | /* AND32rr_ND_REV */ |
| 106276 | GR32, GR32, GR32, |
| 106277 | /* AND32rr_NF */ |
| 106278 | GR32, GR32, GR32, |
| 106279 | /* AND32rr_NF_ND */ |
| 106280 | GR32, GR32, GR32, |
| 106281 | /* AND32rr_NF_ND_REV */ |
| 106282 | GR32, GR32, GR32, |
| 106283 | /* AND32rr_NF_REV */ |
| 106284 | GR32, GR32, GR32, |
| 106285 | /* AND32rr_REV */ |
| 106286 | GR32, GR32, GR32, |
| 106287 | /* AND64i32 */ |
| 106288 | i64i32imm, |
| 106289 | /* AND64mi32 */ |
| 106290 | i64mem, i64i32imm, |
| 106291 | /* AND64mi32_EVEX */ |
| 106292 | i64mem, i64i32imm, |
| 106293 | /* AND64mi32_ND */ |
| 106294 | GR64, i64mem, i64i32imm, |
| 106295 | /* AND64mi32_NF */ |
| 106296 | i64mem, i64i32imm, |
| 106297 | /* AND64mi32_NF_ND */ |
| 106298 | GR64, i64mem, i64i32imm, |
| 106299 | /* AND64mi8 */ |
| 106300 | i64mem, i64i8imm, |
| 106301 | /* AND64mi8_EVEX */ |
| 106302 | i64mem, i64i8imm, |
| 106303 | /* AND64mi8_ND */ |
| 106304 | GR64, i64mem, i64i8imm, |
| 106305 | /* AND64mi8_NF */ |
| 106306 | i64mem, i64i8imm, |
| 106307 | /* AND64mi8_NF_ND */ |
| 106308 | GR64, i64mem, i64i8imm, |
| 106309 | /* AND64mr */ |
| 106310 | i64mem, GR64, |
| 106311 | /* AND64mr_EVEX */ |
| 106312 | i64mem, GR64, |
| 106313 | /* AND64mr_ND */ |
| 106314 | GR64, i64mem, GR64, |
| 106315 | /* AND64mr_NF */ |
| 106316 | i64mem, GR64, |
| 106317 | /* AND64mr_NF_ND */ |
| 106318 | GR64, i64mem, GR64, |
| 106319 | /* AND64ri32 */ |
| 106320 | GR64, GR64, i64i32imm, |
| 106321 | /* AND64ri32_EVEX */ |
| 106322 | GR64, GR64, i64i32imm, |
| 106323 | /* AND64ri32_ND */ |
| 106324 | GR64, GR64, i64i32imm, |
| 106325 | /* AND64ri32_NF */ |
| 106326 | GR64, GR64, i64i32imm, |
| 106327 | /* AND64ri32_NF_ND */ |
| 106328 | GR64, GR64, i64i32imm, |
| 106329 | /* AND64ri8 */ |
| 106330 | GR64, GR64, i64i8imm, |
| 106331 | /* AND64ri8_EVEX */ |
| 106332 | GR64, GR64, i64i8imm, |
| 106333 | /* AND64ri8_ND */ |
| 106334 | GR64, GR64, i64i8imm, |
| 106335 | /* AND64ri8_NF */ |
| 106336 | GR64, GR64, i64i8imm, |
| 106337 | /* AND64ri8_NF_ND */ |
| 106338 | GR64, GR64, i64i8imm, |
| 106339 | /* AND64rm */ |
| 106340 | GR64, GR64, i64mem, |
| 106341 | /* AND64rm_EVEX */ |
| 106342 | GR64, GR64, i64mem, |
| 106343 | /* AND64rm_ND */ |
| 106344 | GR64, GR64, i64mem, |
| 106345 | /* AND64rm_NF */ |
| 106346 | GR64, GR64, i64mem, |
| 106347 | /* AND64rm_NF_ND */ |
| 106348 | GR64, GR64, i64mem, |
| 106349 | /* AND64rr */ |
| 106350 | GR64, GR64, GR64, |
| 106351 | /* AND64rr_EVEX */ |
| 106352 | GR64, GR64, GR64, |
| 106353 | /* AND64rr_EVEX_REV */ |
| 106354 | GR64, GR64, GR64, |
| 106355 | /* AND64rr_ND */ |
| 106356 | GR64, GR64, GR64, |
| 106357 | /* AND64rr_ND_REV */ |
| 106358 | GR64, GR64, GR64, |
| 106359 | /* AND64rr_NF */ |
| 106360 | GR64, GR64, GR64, |
| 106361 | /* AND64rr_NF_ND */ |
| 106362 | GR64, GR64, GR64, |
| 106363 | /* AND64rr_NF_ND_REV */ |
| 106364 | GR64, GR64, GR64, |
| 106365 | /* AND64rr_NF_REV */ |
| 106366 | GR64, GR64, GR64, |
| 106367 | /* AND64rr_REV */ |
| 106368 | GR64, GR64, GR64, |
| 106369 | /* AND8i8 */ |
| 106370 | i8imm, |
| 106371 | /* AND8mi */ |
| 106372 | i8mem, i8imm, |
| 106373 | /* AND8mi8 */ |
| 106374 | i8mem, i8imm, |
| 106375 | /* AND8mi_EVEX */ |
| 106376 | i8mem, i8imm, |
| 106377 | /* AND8mi_ND */ |
| 106378 | GR8, i8mem, i8imm, |
| 106379 | /* AND8mi_NF */ |
| 106380 | i8mem, i8imm, |
| 106381 | /* AND8mi_NF_ND */ |
| 106382 | GR8, i8mem, i8imm, |
| 106383 | /* AND8mr */ |
| 106384 | i8mem, GR8, |
| 106385 | /* AND8mr_EVEX */ |
| 106386 | i8mem, GR8, |
| 106387 | /* AND8mr_ND */ |
| 106388 | GR8, i8mem, GR8, |
| 106389 | /* AND8mr_NF */ |
| 106390 | i8mem, GR8, |
| 106391 | /* AND8mr_NF_ND */ |
| 106392 | GR8, i8mem, GR8, |
| 106393 | /* AND8ri */ |
| 106394 | GR8, GR8, i8imm, |
| 106395 | /* AND8ri8 */ |
| 106396 | GR8, GR8, i8imm, |
| 106397 | /* AND8ri_EVEX */ |
| 106398 | GR8, GR8, i8imm, |
| 106399 | /* AND8ri_ND */ |
| 106400 | GR8, GR8, i8imm, |
| 106401 | /* AND8ri_NF */ |
| 106402 | GR8, GR8, i8imm, |
| 106403 | /* AND8ri_NF_ND */ |
| 106404 | GR8, GR8, i8imm, |
| 106405 | /* AND8rm */ |
| 106406 | GR8, GR8, i8mem, |
| 106407 | /* AND8rm_EVEX */ |
| 106408 | GR8, GR8, i8mem, |
| 106409 | /* AND8rm_ND */ |
| 106410 | GR8, GR8, i8mem, |
| 106411 | /* AND8rm_NF */ |
| 106412 | GR8, GR8, i8mem, |
| 106413 | /* AND8rm_NF_ND */ |
| 106414 | GR8, GR8, i8mem, |
| 106415 | /* AND8rr */ |
| 106416 | GR8, GR8, GR8, |
| 106417 | /* AND8rr_EVEX */ |
| 106418 | GR8, GR8, GR8, |
| 106419 | /* AND8rr_EVEX_REV */ |
| 106420 | GR8, GR8, GR8, |
| 106421 | /* AND8rr_ND */ |
| 106422 | GR8, GR8, GR8, |
| 106423 | /* AND8rr_ND_REV */ |
| 106424 | GR8, GR8, GR8, |
| 106425 | /* AND8rr_NF */ |
| 106426 | GR8, GR8, GR8, |
| 106427 | /* AND8rr_NF_ND */ |
| 106428 | GR8, GR8, GR8, |
| 106429 | /* AND8rr_NF_ND_REV */ |
| 106430 | GR8, GR8, GR8, |
| 106431 | /* AND8rr_NF_REV */ |
| 106432 | GR8, GR8, GR8, |
| 106433 | /* AND8rr_REV */ |
| 106434 | GR8, GR8, GR8, |
| 106435 | /* ANDN32rm */ |
| 106436 | GR32, GR32, i32mem, |
| 106437 | /* ANDN32rm_EVEX */ |
| 106438 | GR32, GR32, i32mem, |
| 106439 | /* ANDN32rm_NF */ |
| 106440 | GR32, GR32, i32mem, |
| 106441 | /* ANDN32rr */ |
| 106442 | GR32, GR32, GR32, |
| 106443 | /* ANDN32rr_EVEX */ |
| 106444 | GR32, GR32, GR32, |
| 106445 | /* ANDN32rr_NF */ |
| 106446 | GR32, GR32, GR32, |
| 106447 | /* ANDN64rm */ |
| 106448 | GR64, GR64, i64mem, |
| 106449 | /* ANDN64rm_EVEX */ |
| 106450 | GR64, GR64, i64mem, |
| 106451 | /* ANDN64rm_NF */ |
| 106452 | GR64, GR64, i64mem, |
| 106453 | /* ANDN64rr */ |
| 106454 | GR64, GR64, GR64, |
| 106455 | /* ANDN64rr_EVEX */ |
| 106456 | GR64, GR64, GR64, |
| 106457 | /* ANDN64rr_NF */ |
| 106458 | GR64, GR64, GR64, |
| 106459 | /* ANDNPDrm */ |
| 106460 | VR128, VR128, f128mem, |
| 106461 | /* ANDNPDrr */ |
| 106462 | VR128, VR128, VR128, |
| 106463 | /* ANDNPSrm */ |
| 106464 | VR128, VR128, f128mem, |
| 106465 | /* ANDNPSrr */ |
| 106466 | VR128, VR128, VR128, |
| 106467 | /* ANDPDrm */ |
| 106468 | VR128, VR128, f128mem, |
| 106469 | /* ANDPDrr */ |
| 106470 | VR128, VR128, VR128, |
| 106471 | /* ANDPSrm */ |
| 106472 | VR128, VR128, f128mem, |
| 106473 | /* ANDPSrr */ |
| 106474 | VR128, VR128, VR128, |
| 106475 | /* AOR32mr */ |
| 106476 | i32mem, GR32, |
| 106477 | /* AOR32mr_EVEX */ |
| 106478 | i32mem, GR32, |
| 106479 | /* AOR64mr */ |
| 106480 | i64mem, GR64, |
| 106481 | /* AOR64mr_EVEX */ |
| 106482 | i64mem, GR64, |
| 106483 | /* ARPL16mr */ |
| 106484 | i16mem, GR16, |
| 106485 | /* ARPL16rr */ |
| 106486 | GR16, GR16, |
| 106487 | /* ASAN_CHECK_MEMACCESS */ |
| 106488 | GR64PLTSafe, i32imm, |
| 106489 | /* AXOR32mr */ |
| 106490 | i32mem, GR32, |
| 106491 | /* AXOR32mr_EVEX */ |
| 106492 | i32mem, GR32, |
| 106493 | /* AXOR64mr */ |
| 106494 | i64mem, GR64, |
| 106495 | /* AXOR64mr_EVEX */ |
| 106496 | i64mem, GR64, |
| 106497 | /* BEXTR32rm */ |
| 106498 | GR32, i32mem, GR32, |
| 106499 | /* BEXTR32rm_EVEX */ |
| 106500 | GR32, i32mem, GR32, |
| 106501 | /* BEXTR32rm_NF */ |
| 106502 | GR32, i32mem, GR32, |
| 106503 | /* BEXTR32rr */ |
| 106504 | GR32, GR32, GR32, |
| 106505 | /* BEXTR32rr_EVEX */ |
| 106506 | GR32, GR32, GR32, |
| 106507 | /* BEXTR32rr_NF */ |
| 106508 | GR32, GR32, GR32, |
| 106509 | /* BEXTR64rm */ |
| 106510 | GR64, i64mem, GR64, |
| 106511 | /* BEXTR64rm_EVEX */ |
| 106512 | GR64, i64mem, GR64, |
| 106513 | /* BEXTR64rm_NF */ |
| 106514 | GR64, i64mem, GR64, |
| 106515 | /* BEXTR64rr */ |
| 106516 | GR64, GR64, GR64, |
| 106517 | /* BEXTR64rr_EVEX */ |
| 106518 | GR64, GR64, GR64, |
| 106519 | /* BEXTR64rr_NF */ |
| 106520 | GR64, GR64, GR64, |
| 106521 | /* BEXTRI32mi */ |
| 106522 | GR32, i32mem, i32imm, |
| 106523 | /* BEXTRI32ri */ |
| 106524 | GR32, GR32, i32imm, |
| 106525 | /* BEXTRI64mi */ |
| 106526 | GR64, i64mem, i64i32imm, |
| 106527 | /* BEXTRI64ri */ |
| 106528 | GR64, GR64, i64i32imm, |
| 106529 | /* BLCFILL32rm */ |
| 106530 | GR32, i32mem, |
| 106531 | /* BLCFILL32rr */ |
| 106532 | GR32, GR32, |
| 106533 | /* BLCFILL64rm */ |
| 106534 | GR64, i64mem, |
| 106535 | /* BLCFILL64rr */ |
| 106536 | GR64, GR64, |
| 106537 | /* BLCI32rm */ |
| 106538 | GR32, i32mem, |
| 106539 | /* BLCI32rr */ |
| 106540 | GR32, GR32, |
| 106541 | /* BLCI64rm */ |
| 106542 | GR64, i64mem, |
| 106543 | /* BLCI64rr */ |
| 106544 | GR64, GR64, |
| 106545 | /* BLCIC32rm */ |
| 106546 | GR32, i32mem, |
| 106547 | /* BLCIC32rr */ |
| 106548 | GR32, GR32, |
| 106549 | /* BLCIC64rm */ |
| 106550 | GR64, i64mem, |
| 106551 | /* BLCIC64rr */ |
| 106552 | GR64, GR64, |
| 106553 | /* BLCMSK32rm */ |
| 106554 | GR32, i32mem, |
| 106555 | /* BLCMSK32rr */ |
| 106556 | GR32, GR32, |
| 106557 | /* BLCMSK64rm */ |
| 106558 | GR64, i64mem, |
| 106559 | /* BLCMSK64rr */ |
| 106560 | GR64, GR64, |
| 106561 | /* BLCS32rm */ |
| 106562 | GR32, i32mem, |
| 106563 | /* BLCS32rr */ |
| 106564 | GR32, GR32, |
| 106565 | /* BLCS64rm */ |
| 106566 | GR64, i64mem, |
| 106567 | /* BLCS64rr */ |
| 106568 | GR64, GR64, |
| 106569 | /* BLENDPDrmi */ |
| 106570 | VR128, VR128, f128mem, u8imm, |
| 106571 | /* BLENDPDrri */ |
| 106572 | VR128, VR128, VR128, u8imm, |
| 106573 | /* BLENDPSrmi */ |
| 106574 | VR128, VR128, f128mem, u8imm, |
| 106575 | /* BLENDPSrri */ |
| 106576 | VR128, VR128, VR128, u8imm, |
| 106577 | /* BLENDVPDrm0 */ |
| 106578 | VR128, VR128, f128mem, |
| 106579 | /* BLENDVPDrr0 */ |
| 106580 | VR128, VR128, VR128, |
| 106581 | /* BLENDVPSrm0 */ |
| 106582 | VR128, VR128, f128mem, |
| 106583 | /* BLENDVPSrr0 */ |
| 106584 | VR128, VR128, VR128, |
| 106585 | /* BLSFILL32rm */ |
| 106586 | GR32, i32mem, |
| 106587 | /* BLSFILL32rr */ |
| 106588 | GR32, GR32, |
| 106589 | /* BLSFILL64rm */ |
| 106590 | GR64, i64mem, |
| 106591 | /* BLSFILL64rr */ |
| 106592 | GR64, GR64, |
| 106593 | /* BLSI32rm */ |
| 106594 | GR32, i32mem, |
| 106595 | /* BLSI32rm_EVEX */ |
| 106596 | GR32, i32mem, |
| 106597 | /* BLSI32rm_NF */ |
| 106598 | GR32, i32mem, |
| 106599 | /* BLSI32rr */ |
| 106600 | GR32, GR32, |
| 106601 | /* BLSI32rr_EVEX */ |
| 106602 | GR32, GR32, |
| 106603 | /* BLSI32rr_NF */ |
| 106604 | GR32, GR32, |
| 106605 | /* BLSI64rm */ |
| 106606 | GR64, i64mem, |
| 106607 | /* BLSI64rm_EVEX */ |
| 106608 | GR64, i64mem, |
| 106609 | /* BLSI64rm_NF */ |
| 106610 | GR64, i64mem, |
| 106611 | /* BLSI64rr */ |
| 106612 | GR64, GR64, |
| 106613 | /* BLSI64rr_EVEX */ |
| 106614 | GR64, GR64, |
| 106615 | /* BLSI64rr_NF */ |
| 106616 | GR64, GR64, |
| 106617 | /* BLSIC32rm */ |
| 106618 | GR32, i32mem, |
| 106619 | /* BLSIC32rr */ |
| 106620 | GR32, GR32, |
| 106621 | /* BLSIC64rm */ |
| 106622 | GR64, i64mem, |
| 106623 | /* BLSIC64rr */ |
| 106624 | GR64, GR64, |
| 106625 | /* BLSMSK32rm */ |
| 106626 | GR32, i32mem, |
| 106627 | /* BLSMSK32rm_EVEX */ |
| 106628 | GR32, i32mem, |
| 106629 | /* BLSMSK32rm_NF */ |
| 106630 | GR32, i32mem, |
| 106631 | /* BLSMSK32rr */ |
| 106632 | GR32, GR32, |
| 106633 | /* BLSMSK32rr_EVEX */ |
| 106634 | GR32, GR32, |
| 106635 | /* BLSMSK32rr_NF */ |
| 106636 | GR32, GR32, |
| 106637 | /* BLSMSK64rm */ |
| 106638 | GR64, i64mem, |
| 106639 | /* BLSMSK64rm_EVEX */ |
| 106640 | GR64, i64mem, |
| 106641 | /* BLSMSK64rm_NF */ |
| 106642 | GR64, i64mem, |
| 106643 | /* BLSMSK64rr */ |
| 106644 | GR64, GR64, |
| 106645 | /* BLSMSK64rr_EVEX */ |
| 106646 | GR64, GR64, |
| 106647 | /* BLSMSK64rr_NF */ |
| 106648 | GR64, GR64, |
| 106649 | /* BLSR32rm */ |
| 106650 | GR32, i32mem, |
| 106651 | /* BLSR32rm_EVEX */ |
| 106652 | GR32, i32mem, |
| 106653 | /* BLSR32rm_NF */ |
| 106654 | GR32, i32mem, |
| 106655 | /* BLSR32rr */ |
| 106656 | GR32, GR32, |
| 106657 | /* BLSR32rr_EVEX */ |
| 106658 | GR32, GR32, |
| 106659 | /* BLSR32rr_NF */ |
| 106660 | GR32, GR32, |
| 106661 | /* BLSR64rm */ |
| 106662 | GR64, i64mem, |
| 106663 | /* BLSR64rm_EVEX */ |
| 106664 | GR64, i64mem, |
| 106665 | /* BLSR64rm_NF */ |
| 106666 | GR64, i64mem, |
| 106667 | /* BLSR64rr */ |
| 106668 | GR64, GR64, |
| 106669 | /* BLSR64rr_EVEX */ |
| 106670 | GR64, GR64, |
| 106671 | /* BLSR64rr_NF */ |
| 106672 | GR64, GR64, |
| 106673 | /* BOUNDS16rm */ |
| 106674 | GR16, i16mem, |
| 106675 | /* BOUNDS32rm */ |
| 106676 | GR32, i32mem, |
| 106677 | /* BSF16rm */ |
| 106678 | GR16, i16mem, |
| 106679 | /* BSF16rr */ |
| 106680 | GR16, GR16, |
| 106681 | /* BSF32rm */ |
| 106682 | GR32, i32mem, |
| 106683 | /* BSF32rr */ |
| 106684 | GR32, GR32, |
| 106685 | /* BSF64rm */ |
| 106686 | GR64, i64mem, |
| 106687 | /* BSF64rr */ |
| 106688 | GR64, GR64, |
| 106689 | /* BSR16rm */ |
| 106690 | GR16, i16mem, |
| 106691 | /* BSR16rr */ |
| 106692 | GR16, GR16, |
| 106693 | /* BSR32rm */ |
| 106694 | GR32, i32mem, |
| 106695 | /* BSR32rr */ |
| 106696 | GR32, GR32, |
| 106697 | /* BSR64rm */ |
| 106698 | GR64, i64mem, |
| 106699 | /* BSR64rr */ |
| 106700 | GR64, GR64, |
| 106701 | /* BSWAP16r_BAD */ |
| 106702 | GR16, GR16, |
| 106703 | /* BSWAP32r */ |
| 106704 | GR32, GR32, |
| 106705 | /* BSWAP64r */ |
| 106706 | GR64, GR64, |
| 106707 | /* BT16mi8 */ |
| 106708 | i16mem, i16u8imm, |
| 106709 | /* BT16mr */ |
| 106710 | i16mem, GR16, |
| 106711 | /* BT16ri8 */ |
| 106712 | GR16, i16u8imm, |
| 106713 | /* BT16rr */ |
| 106714 | GR16, GR16, |
| 106715 | /* BT32mi8 */ |
| 106716 | i32mem, i32u8imm, |
| 106717 | /* BT32mr */ |
| 106718 | i32mem, GR32, |
| 106719 | /* BT32ri8 */ |
| 106720 | GR32, i32u8imm, |
| 106721 | /* BT32rr */ |
| 106722 | GR32, GR32, |
| 106723 | /* BT64mi8 */ |
| 106724 | i64mem, i64u8imm, |
| 106725 | /* BT64mr */ |
| 106726 | i64mem, GR64, |
| 106727 | /* BT64ri8 */ |
| 106728 | GR64, i64u8imm, |
| 106729 | /* BT64rr */ |
| 106730 | GR64, GR64, |
| 106731 | /* BTC16mi8 */ |
| 106732 | i16mem, i16u8imm, |
| 106733 | /* BTC16mr */ |
| 106734 | i16mem, GR16, |
| 106735 | /* BTC16ri8 */ |
| 106736 | GR16, GR16, i16u8imm, |
| 106737 | /* BTC16rr */ |
| 106738 | GR16, GR16, GR16, |
| 106739 | /* BTC32mi8 */ |
| 106740 | i32mem, i32u8imm, |
| 106741 | /* BTC32mr */ |
| 106742 | i32mem, GR32, |
| 106743 | /* BTC32ri8 */ |
| 106744 | GR32, GR32, i32u8imm, |
| 106745 | /* BTC32rr */ |
| 106746 | GR32, GR32, GR32, |
| 106747 | /* BTC64mi8 */ |
| 106748 | i64mem, i64u8imm, |
| 106749 | /* BTC64mr */ |
| 106750 | i64mem, GR64, |
| 106751 | /* BTC64ri8 */ |
| 106752 | GR64, GR64, i64u8imm, |
| 106753 | /* BTC64rr */ |
| 106754 | GR64, GR64, GR64, |
| 106755 | /* BTR16mi8 */ |
| 106756 | i16mem, i16u8imm, |
| 106757 | /* BTR16mr */ |
| 106758 | i16mem, GR16, |
| 106759 | /* BTR16ri8 */ |
| 106760 | GR16, GR16, i16u8imm, |
| 106761 | /* BTR16rr */ |
| 106762 | GR16, GR16, GR16, |
| 106763 | /* BTR32mi8 */ |
| 106764 | i32mem, i32u8imm, |
| 106765 | /* BTR32mr */ |
| 106766 | i32mem, GR32, |
| 106767 | /* BTR32ri8 */ |
| 106768 | GR32, GR32, i32u8imm, |
| 106769 | /* BTR32rr */ |
| 106770 | GR32, GR32, GR32, |
| 106771 | /* BTR64mi8 */ |
| 106772 | i64mem, i64u8imm, |
| 106773 | /* BTR64mr */ |
| 106774 | i64mem, GR64, |
| 106775 | /* BTR64ri8 */ |
| 106776 | GR64, GR64, i64u8imm, |
| 106777 | /* BTR64rr */ |
| 106778 | GR64, GR64, GR64, |
| 106779 | /* BTS16mi8 */ |
| 106780 | i16mem, i16u8imm, |
| 106781 | /* BTS16mr */ |
| 106782 | i16mem, GR16, |
| 106783 | /* BTS16ri8 */ |
| 106784 | GR16, GR16, i16u8imm, |
| 106785 | /* BTS16rr */ |
| 106786 | GR16, GR16, GR16, |
| 106787 | /* BTS32mi8 */ |
| 106788 | i32mem, i32u8imm, |
| 106789 | /* BTS32mr */ |
| 106790 | i32mem, GR32, |
| 106791 | /* BTS32ri8 */ |
| 106792 | GR32, GR32, i32u8imm, |
| 106793 | /* BTS32rr */ |
| 106794 | GR32, GR32, GR32, |
| 106795 | /* BTS64mi8 */ |
| 106796 | i64mem, i64u8imm, |
| 106797 | /* BTS64mr */ |
| 106798 | i64mem, GR64, |
| 106799 | /* BTS64ri8 */ |
| 106800 | GR64, GR64, i64u8imm, |
| 106801 | /* BTS64rr */ |
| 106802 | GR64, GR64, GR64, |
| 106803 | /* BZHI32rm */ |
| 106804 | GR32, i32mem, GR32, |
| 106805 | /* BZHI32rm_EVEX */ |
| 106806 | GR32, i32mem, GR32, |
| 106807 | /* BZHI32rm_NF */ |
| 106808 | GR32, i32mem, GR32, |
| 106809 | /* BZHI32rr */ |
| 106810 | GR32, GR32, GR32, |
| 106811 | /* BZHI32rr_EVEX */ |
| 106812 | GR32, GR32, GR32, |
| 106813 | /* BZHI32rr_NF */ |
| 106814 | GR32, GR32, GR32, |
| 106815 | /* BZHI64rm */ |
| 106816 | GR64, i64mem, GR64, |
| 106817 | /* BZHI64rm_EVEX */ |
| 106818 | GR64, i64mem, GR64, |
| 106819 | /* BZHI64rm_NF */ |
| 106820 | GR64, i64mem, GR64, |
| 106821 | /* BZHI64rr */ |
| 106822 | GR64, GR64, GR64, |
| 106823 | /* BZHI64rr_EVEX */ |
| 106824 | GR64, GR64, GR64, |
| 106825 | /* BZHI64rr_NF */ |
| 106826 | GR64, GR64, GR64, |
| 106827 | /* CALL16m */ |
| 106828 | i16mem, |
| 106829 | /* CALL16m_NT */ |
| 106830 | i16mem, |
| 106831 | /* CALL16r */ |
| 106832 | GR16, |
| 106833 | /* CALL16r_NT */ |
| 106834 | GR16, |
| 106835 | /* CALL32m */ |
| 106836 | i32mem, |
| 106837 | /* CALL32m_NT */ |
| 106838 | i32mem, |
| 106839 | /* CALL32r */ |
| 106840 | GR32, |
| 106841 | /* CALL32r_NT */ |
| 106842 | GR32, |
| 106843 | /* CALL64m */ |
| 106844 | i64mem, |
| 106845 | /* CALL64m_NT */ |
| 106846 | i64mem, |
| 106847 | /* CALL64pcrel32 */ |
| 106848 | i64i32imm_brtarget, |
| 106849 | /* CALL64r */ |
| 106850 | GR64, |
| 106851 | /* CALL64r_NT */ |
| 106852 | GR64, |
| 106853 | /* CALLpcrel16 */ |
| 106854 | i16imm_brtarget, |
| 106855 | /* CALLpcrel32 */ |
| 106856 | i32imm_brtarget, |
| 106857 | /* CATCHRET */ |
| 106858 | brtarget32, brtarget32, |
| 106859 | /* CBW */ |
| 106860 | /* CCMP16mi */ |
| 106861 | i16mem, i16imm, cflags, ccode, |
| 106862 | /* CCMP16mi8 */ |
| 106863 | i16mem, i16i8imm, cflags, ccode, |
| 106864 | /* CCMP16mr */ |
| 106865 | i16mem, GR16, cflags, ccode, |
| 106866 | /* CCMP16ri */ |
| 106867 | GR16, i16imm, cflags, ccode, |
| 106868 | /* CCMP16ri8 */ |
| 106869 | GR16, i16i8imm, cflags, ccode, |
| 106870 | /* CCMP16rm */ |
| 106871 | GR16, i16mem, cflags, ccode, |
| 106872 | /* CCMP16rr */ |
| 106873 | GR16, GR16, cflags, ccode, |
| 106874 | /* CCMP16rr_REV */ |
| 106875 | GR16, GR16, cflags, ccode, |
| 106876 | /* CCMP32mi */ |
| 106877 | i32mem, i32imm, cflags, ccode, |
| 106878 | /* CCMP32mi8 */ |
| 106879 | i32mem, i32i8imm, cflags, ccode, |
| 106880 | /* CCMP32mr */ |
| 106881 | i32mem, GR32, cflags, ccode, |
| 106882 | /* CCMP32ri */ |
| 106883 | GR32, i32imm, cflags, ccode, |
| 106884 | /* CCMP32ri8 */ |
| 106885 | GR32, i32i8imm, cflags, ccode, |
| 106886 | /* CCMP32rm */ |
| 106887 | GR32, i32mem, cflags, ccode, |
| 106888 | /* CCMP32rr */ |
| 106889 | GR32, GR32, cflags, ccode, |
| 106890 | /* CCMP32rr_REV */ |
| 106891 | GR32, GR32, cflags, ccode, |
| 106892 | /* CCMP64mi32 */ |
| 106893 | i64mem, i64i32imm, cflags, ccode, |
| 106894 | /* CCMP64mi8 */ |
| 106895 | i64mem, i64i8imm, cflags, ccode, |
| 106896 | /* CCMP64mr */ |
| 106897 | i64mem, GR64, cflags, ccode, |
| 106898 | /* CCMP64ri32 */ |
| 106899 | GR64, i64i32imm, cflags, ccode, |
| 106900 | /* CCMP64ri8 */ |
| 106901 | GR64, i64i8imm, cflags, ccode, |
| 106902 | /* CCMP64rm */ |
| 106903 | GR64, i64mem, cflags, ccode, |
| 106904 | /* CCMP64rr */ |
| 106905 | GR64, GR64, cflags, ccode, |
| 106906 | /* CCMP64rr_REV */ |
| 106907 | GR64, GR64, cflags, ccode, |
| 106908 | /* CCMP8mi */ |
| 106909 | i8mem, i8imm, cflags, ccode, |
| 106910 | /* CCMP8mr */ |
| 106911 | i8mem, GR8, cflags, ccode, |
| 106912 | /* CCMP8ri */ |
| 106913 | GR8, i8imm, cflags, ccode, |
| 106914 | /* CCMP8rm */ |
| 106915 | GR8, i8mem, cflags, ccode, |
| 106916 | /* CCMP8rr */ |
| 106917 | GR8, GR8, cflags, ccode, |
| 106918 | /* CCMP8rr_REV */ |
| 106919 | GR8, GR8, cflags, ccode, |
| 106920 | /* CDQ */ |
| 106921 | /* CDQE */ |
| 106922 | /* CFCMOV16mr */ |
| 106923 | i16mem, GR16, ccode, |
| 106924 | /* CFCMOV16rm */ |
| 106925 | GR16, i16mem, ccode, |
| 106926 | /* CFCMOV16rm_ND */ |
| 106927 | GR16, GR16, i16mem, ccode, |
| 106928 | /* CFCMOV16rr */ |
| 106929 | GR16, GR16, ccode, |
| 106930 | /* CFCMOV16rr_ND */ |
| 106931 | GR16, GR16, GR16, ccode, |
| 106932 | /* CFCMOV16rr_REV */ |
| 106933 | GR16, GR16, ccode, |
| 106934 | /* CFCMOV32mr */ |
| 106935 | i32mem, GR32, ccode, |
| 106936 | /* CFCMOV32rm */ |
| 106937 | GR32, i32mem, ccode, |
| 106938 | /* CFCMOV32rm_ND */ |
| 106939 | GR32, GR32, i32mem, ccode, |
| 106940 | /* CFCMOV32rr */ |
| 106941 | GR32, GR32, ccode, |
| 106942 | /* CFCMOV32rr_ND */ |
| 106943 | GR32, GR32, GR32, ccode, |
| 106944 | /* CFCMOV32rr_REV */ |
| 106945 | GR32, GR32, ccode, |
| 106946 | /* CFCMOV64mr */ |
| 106947 | i64mem, GR64, ccode, |
| 106948 | /* CFCMOV64rm */ |
| 106949 | GR64, i64mem, ccode, |
| 106950 | /* CFCMOV64rm_ND */ |
| 106951 | GR64, GR64, i64mem, ccode, |
| 106952 | /* CFCMOV64rr */ |
| 106953 | GR64, GR64, ccode, |
| 106954 | /* CFCMOV64rr_ND */ |
| 106955 | GR64, GR64, GR64, ccode, |
| 106956 | /* CFCMOV64rr_REV */ |
| 106957 | GR64, GR64, ccode, |
| 106958 | /* CHS_F */ |
| 106959 | /* CHS_Fp32 */ |
| 106960 | RFP32, RFP32, |
| 106961 | /* CHS_Fp64 */ |
| 106962 | RFP64, RFP64, |
| 106963 | /* CHS_Fp80 */ |
| 106964 | RFP80, RFP80, |
| 106965 | /* CLAC */ |
| 106966 | /* CLC */ |
| 106967 | /* CLD */ |
| 106968 | /* CLDEMOTE */ |
| 106969 | i8mem, |
| 106970 | /* CLEANUPRET */ |
| 106971 | /* CLFLUSH */ |
| 106972 | i8mem, |
| 106973 | /* CLFLUSHOPT */ |
| 106974 | i8mem, |
| 106975 | /* CLGI */ |
| 106976 | /* CLI */ |
| 106977 | /* CLRSSBSY */ |
| 106978 | i32mem, |
| 106979 | /* CLTS */ |
| 106980 | /* CLUI */ |
| 106981 | /* CLWB */ |
| 106982 | i8mem, |
| 106983 | /* CLZERO32r */ |
| 106984 | /* CLZERO64r */ |
| 106985 | /* CMC */ |
| 106986 | /* CMOV16rm */ |
| 106987 | GR16, GR16, i16mem, ccode, |
| 106988 | /* CMOV16rm_ND */ |
| 106989 | GR16, GR16, i16mem, ccode, |
| 106990 | /* CMOV16rr */ |
| 106991 | GR16, GR16, GR16, ccode, |
| 106992 | /* CMOV16rr_ND */ |
| 106993 | GR16, GR16, GR16, ccode, |
| 106994 | /* CMOV32rm */ |
| 106995 | GR32, GR32, i32mem, ccode, |
| 106996 | /* CMOV32rm_ND */ |
| 106997 | GR32, GR32, i32mem, ccode, |
| 106998 | /* CMOV32rr */ |
| 106999 | GR32, GR32, GR32, ccode, |
| 107000 | /* CMOV32rr_ND */ |
| 107001 | GR32, GR32, GR32, ccode, |
| 107002 | /* CMOV64rm */ |
| 107003 | GR64, GR64, i64mem, ccode, |
| 107004 | /* CMOV64rm_ND */ |
| 107005 | GR64, GR64, i64mem, ccode, |
| 107006 | /* CMOV64rr */ |
| 107007 | GR64, GR64, GR64, ccode, |
| 107008 | /* CMOV64rr_ND */ |
| 107009 | GR64, GR64, GR64, ccode, |
| 107010 | /* CMOVBE_F */ |
| 107011 | RSTi, |
| 107012 | /* CMOVBE_Fp32 */ |
| 107013 | RFP32, RFP32, RFP32, |
| 107014 | /* CMOVBE_Fp64 */ |
| 107015 | RFP64, RFP64, RFP64, |
| 107016 | /* CMOVBE_Fp80 */ |
| 107017 | RFP80, RFP80, RFP80, |
| 107018 | /* CMOVB_F */ |
| 107019 | RSTi, |
| 107020 | /* CMOVB_Fp32 */ |
| 107021 | RFP32, RFP32, RFP32, |
| 107022 | /* CMOVB_Fp64 */ |
| 107023 | RFP64, RFP64, RFP64, |
| 107024 | /* CMOVB_Fp80 */ |
| 107025 | RFP80, RFP80, RFP80, |
| 107026 | /* CMOVE_F */ |
| 107027 | RSTi, |
| 107028 | /* CMOVE_Fp32 */ |
| 107029 | RFP32, RFP32, RFP32, |
| 107030 | /* CMOVE_Fp64 */ |
| 107031 | RFP64, RFP64, RFP64, |
| 107032 | /* CMOVE_Fp80 */ |
| 107033 | RFP80, RFP80, RFP80, |
| 107034 | /* CMOVNBE_F */ |
| 107035 | RSTi, |
| 107036 | /* CMOVNBE_Fp32 */ |
| 107037 | RFP32, RFP32, RFP32, |
| 107038 | /* CMOVNBE_Fp64 */ |
| 107039 | RFP64, RFP64, RFP64, |
| 107040 | /* CMOVNBE_Fp80 */ |
| 107041 | RFP80, RFP80, RFP80, |
| 107042 | /* CMOVNB_F */ |
| 107043 | RSTi, |
| 107044 | /* CMOVNB_Fp32 */ |
| 107045 | RFP32, RFP32, RFP32, |
| 107046 | /* CMOVNB_Fp64 */ |
| 107047 | RFP64, RFP64, RFP64, |
| 107048 | /* CMOVNB_Fp80 */ |
| 107049 | RFP80, RFP80, RFP80, |
| 107050 | /* CMOVNE_F */ |
| 107051 | RSTi, |
| 107052 | /* CMOVNE_Fp32 */ |
| 107053 | RFP32, RFP32, RFP32, |
| 107054 | /* CMOVNE_Fp64 */ |
| 107055 | RFP64, RFP64, RFP64, |
| 107056 | /* CMOVNE_Fp80 */ |
| 107057 | RFP80, RFP80, RFP80, |
| 107058 | /* CMOVNP_F */ |
| 107059 | RSTi, |
| 107060 | /* CMOVNP_Fp32 */ |
| 107061 | RFP32, RFP32, RFP32, |
| 107062 | /* CMOVNP_Fp64 */ |
| 107063 | RFP64, RFP64, RFP64, |
| 107064 | /* CMOVNP_Fp80 */ |
| 107065 | RFP80, RFP80, RFP80, |
| 107066 | /* CMOVP_F */ |
| 107067 | RSTi, |
| 107068 | /* CMOVP_Fp32 */ |
| 107069 | RFP32, RFP32, RFP32, |
| 107070 | /* CMOVP_Fp64 */ |
| 107071 | RFP64, RFP64, RFP64, |
| 107072 | /* CMOVP_Fp80 */ |
| 107073 | RFP80, RFP80, RFP80, |
| 107074 | /* CMOV_FR16 */ |
| 107075 | FR16, FR16, FR16, i8imm, |
| 107076 | /* CMOV_FR16X */ |
| 107077 | FR16X, FR16X, FR16X, i8imm, |
| 107078 | /* CMOV_FR32 */ |
| 107079 | FR32, FR32, FR32, i8imm, |
| 107080 | /* CMOV_FR32X */ |
| 107081 | FR32X, FR32X, FR32X, i8imm, |
| 107082 | /* CMOV_FR64 */ |
| 107083 | FR64, FR64, FR64, i8imm, |
| 107084 | /* CMOV_FR64X */ |
| 107085 | FR64X, FR64X, FR64X, i8imm, |
| 107086 | /* CMOV_GR16 */ |
| 107087 | GR16, GR16, GR16, i8imm, |
| 107088 | /* CMOV_GR32 */ |
| 107089 | GR32, GR32, GR32, i8imm, |
| 107090 | /* CMOV_GR8 */ |
| 107091 | GR8, GR8, GR8, i8imm, |
| 107092 | /* CMOV_RFP32 */ |
| 107093 | RFP32, RFP32, RFP32, i8imm, |
| 107094 | /* CMOV_RFP64 */ |
| 107095 | RFP64, RFP64, RFP64, i8imm, |
| 107096 | /* CMOV_RFP80 */ |
| 107097 | RFP80, RFP80, RFP80, i8imm, |
| 107098 | /* CMOV_VK1 */ |
| 107099 | VK1, VK1, VK1, i8imm, |
| 107100 | /* CMOV_VK16 */ |
| 107101 | VK16, VK16, VK16, i8imm, |
| 107102 | /* CMOV_VK2 */ |
| 107103 | VK2, VK2, VK2, i8imm, |
| 107104 | /* CMOV_VK32 */ |
| 107105 | VK32, VK32, VK32, i8imm, |
| 107106 | /* CMOV_VK4 */ |
| 107107 | VK4, VK4, VK4, i8imm, |
| 107108 | /* CMOV_VK64 */ |
| 107109 | VK64, VK64, VK64, i8imm, |
| 107110 | /* CMOV_VK8 */ |
| 107111 | VK8, VK8, VK8, i8imm, |
| 107112 | /* CMOV_VR128 */ |
| 107113 | VR128, VR128, VR128, i8imm, |
| 107114 | /* CMOV_VR128X */ |
| 107115 | VR128X, VR128X, VR128X, i8imm, |
| 107116 | /* CMOV_VR256 */ |
| 107117 | VR256, VR256, VR256, i8imm, |
| 107118 | /* CMOV_VR256X */ |
| 107119 | VR256X, VR256X, VR256X, i8imm, |
| 107120 | /* CMOV_VR512 */ |
| 107121 | VR512, VR512, VR512, i8imm, |
| 107122 | /* CMOV_VR64 */ |
| 107123 | VR64, VR64, VR64, i8imm, |
| 107124 | /* CMP16i16 */ |
| 107125 | i16imm, |
| 107126 | /* CMP16mi */ |
| 107127 | i16mem, i16imm, |
| 107128 | /* CMP16mi8 */ |
| 107129 | i16mem, i16i8imm, |
| 107130 | /* CMP16mr */ |
| 107131 | i16mem, GR16, |
| 107132 | /* CMP16ri */ |
| 107133 | GR16, i16imm, |
| 107134 | /* CMP16ri8 */ |
| 107135 | GR16, i16i8imm, |
| 107136 | /* CMP16rm */ |
| 107137 | GR16, i16mem, |
| 107138 | /* CMP16rr */ |
| 107139 | GR16, GR16, |
| 107140 | /* CMP16rr_REV */ |
| 107141 | GR16, GR16, |
| 107142 | /* CMP32i32 */ |
| 107143 | i32imm, |
| 107144 | /* CMP32mi */ |
| 107145 | i32mem, i32imm, |
| 107146 | /* CMP32mi8 */ |
| 107147 | i32mem, i32i8imm, |
| 107148 | /* CMP32mr */ |
| 107149 | i32mem, GR32, |
| 107150 | /* CMP32ri */ |
| 107151 | GR32, i32imm, |
| 107152 | /* CMP32ri8 */ |
| 107153 | GR32, i32i8imm, |
| 107154 | /* CMP32rm */ |
| 107155 | GR32, i32mem, |
| 107156 | /* CMP32rr */ |
| 107157 | GR32, GR32, |
| 107158 | /* CMP32rr_REV */ |
| 107159 | GR32, GR32, |
| 107160 | /* CMP64i32 */ |
| 107161 | i64i32imm, |
| 107162 | /* CMP64mi32 */ |
| 107163 | i64mem, i64i32imm, |
| 107164 | /* CMP64mi8 */ |
| 107165 | i64mem, i64i8imm, |
| 107166 | /* CMP64mr */ |
| 107167 | i64mem, GR64, |
| 107168 | /* CMP64ri32 */ |
| 107169 | GR64, i64i32imm, |
| 107170 | /* CMP64ri8 */ |
| 107171 | GR64, i64i8imm, |
| 107172 | /* CMP64rm */ |
| 107173 | GR64, i64mem, |
| 107174 | /* CMP64rr */ |
| 107175 | GR64, GR64, |
| 107176 | /* CMP64rr_REV */ |
| 107177 | GR64, GR64, |
| 107178 | /* CMP8i8 */ |
| 107179 | i8imm, |
| 107180 | /* CMP8mi */ |
| 107181 | i8mem, i8imm, |
| 107182 | /* CMP8mi8 */ |
| 107183 | i8mem, i8imm, |
| 107184 | /* CMP8mr */ |
| 107185 | i8mem, GR8, |
| 107186 | /* CMP8ri */ |
| 107187 | GR8, i8imm, |
| 107188 | /* CMP8ri8 */ |
| 107189 | GR8, i8imm, |
| 107190 | /* CMP8rm */ |
| 107191 | GR8, i8mem, |
| 107192 | /* CMP8rr */ |
| 107193 | GR8, GR8, |
| 107194 | /* CMP8rr_REV */ |
| 107195 | GR8, GR8, |
| 107196 | /* CMPCCXADDmr32 */ |
| 107197 | GR32, GR32, i32mem, GR32, ccode, |
| 107198 | /* CMPCCXADDmr32_EVEX */ |
| 107199 | GR32, GR32, i32mem, GR32, ccode, |
| 107200 | /* CMPCCXADDmr64 */ |
| 107201 | GR64, GR64, i64mem, GR64, ccode, |
| 107202 | /* CMPCCXADDmr64_EVEX */ |
| 107203 | GR64, GR64, i64mem, GR64, ccode, |
| 107204 | /* CMPPDrmi */ |
| 107205 | VR128, VR128, f128mem, u8imm, |
| 107206 | /* CMPPDrri */ |
| 107207 | VR128, VR128, VR128, u8imm, |
| 107208 | /* CMPPSrmi */ |
| 107209 | VR128, VR128, f128mem, u8imm, |
| 107210 | /* CMPPSrri */ |
| 107211 | VR128, VR128, VR128, u8imm, |
| 107212 | /* CMPSB */ |
| 107213 | dstidx8, srcidx8, |
| 107214 | /* CMPSDrmi */ |
| 107215 | FR64, FR64, f64mem, u8imm, |
| 107216 | /* CMPSDrmi_Int */ |
| 107217 | VR128, VR128, sdmem, u8imm, |
| 107218 | /* CMPSDrri */ |
| 107219 | FR64, FR64, FR64, u8imm, |
| 107220 | /* CMPSDrri_Int */ |
| 107221 | VR128, VR128, VR128, u8imm, |
| 107222 | /* CMPSL */ |
| 107223 | dstidx32, srcidx32, |
| 107224 | /* CMPSQ */ |
| 107225 | dstidx64, srcidx64, |
| 107226 | /* CMPSSrmi */ |
| 107227 | FR32, FR32, f32mem, u8imm, |
| 107228 | /* CMPSSrmi_Int */ |
| 107229 | VR128, VR128, ssmem, u8imm, |
| 107230 | /* CMPSSrri */ |
| 107231 | FR32, FR32, FR32, u8imm, |
| 107232 | /* CMPSSrri_Int */ |
| 107233 | VR128, VR128, VR128, u8imm, |
| 107234 | /* CMPSW */ |
| 107235 | dstidx16, srcidx16, |
| 107236 | /* CMPXCHG16B */ |
| 107237 | i128mem, |
| 107238 | /* CMPXCHG16rm */ |
| 107239 | i16mem, GR16, |
| 107240 | /* CMPXCHG16rr */ |
| 107241 | GR16, GR16, |
| 107242 | /* CMPXCHG32rm */ |
| 107243 | i32mem, GR32, |
| 107244 | /* CMPXCHG32rr */ |
| 107245 | GR32, GR32, |
| 107246 | /* CMPXCHG64rm */ |
| 107247 | i64mem, GR64, |
| 107248 | /* CMPXCHG64rr */ |
| 107249 | GR64, GR64, |
| 107250 | /* CMPXCHG8B */ |
| 107251 | i64mem, |
| 107252 | /* CMPXCHG8rm */ |
| 107253 | i8mem, GR8, |
| 107254 | /* CMPXCHG8rr */ |
| 107255 | GR8, GR8, |
| 107256 | /* COMISDrm */ |
| 107257 | FR64, f64mem, |
| 107258 | /* COMISDrm_Int */ |
| 107259 | VR128, sdmem, |
| 107260 | /* COMISDrr */ |
| 107261 | FR64, FR64, |
| 107262 | /* COMISDrr_Int */ |
| 107263 | VR128, VR128, |
| 107264 | /* COMISSrm */ |
| 107265 | FR32, f32mem, |
| 107266 | /* COMISSrm_Int */ |
| 107267 | VR128, ssmem, |
| 107268 | /* COMISSrr */ |
| 107269 | FR32, FR32, |
| 107270 | /* COMISSrr_Int */ |
| 107271 | VR128, VR128, |
| 107272 | /* COMP_FST0r */ |
| 107273 | RSTi, |
| 107274 | /* COM_FIPr */ |
| 107275 | RSTi, |
| 107276 | /* COM_FIr */ |
| 107277 | RSTi, |
| 107278 | /* COM_FST0r */ |
| 107279 | RSTi, |
| 107280 | /* COM_FpIr32 */ |
| 107281 | RFP32, RFP32, |
| 107282 | /* COM_FpIr64 */ |
| 107283 | RFP64, RFP64, |
| 107284 | /* COM_FpIr80 */ |
| 107285 | RFP80, RFP80, |
| 107286 | /* COM_Fpr32 */ |
| 107287 | RFP32, RFP32, |
| 107288 | /* COM_Fpr64 */ |
| 107289 | RFP64, RFP64, |
| 107290 | /* COM_Fpr80 */ |
| 107291 | RFP80, RFP80, |
| 107292 | /* CPUID */ |
| 107293 | /* CQO */ |
| 107294 | /* CRC32r32m16 */ |
| 107295 | GR32, GR32, i16mem, |
| 107296 | /* CRC32r32m16_EVEX */ |
| 107297 | GR32, GR32, i16mem, |
| 107298 | /* CRC32r32m32 */ |
| 107299 | GR32, GR32, i32mem, |
| 107300 | /* CRC32r32m32_EVEX */ |
| 107301 | GR32, GR32, i32mem, |
| 107302 | /* CRC32r32m8 */ |
| 107303 | GR32, GR32, i8mem, |
| 107304 | /* CRC32r32m8_EVEX */ |
| 107305 | GR32, GR32, i8mem, |
| 107306 | /* CRC32r32r16 */ |
| 107307 | GR32, GR32, GR16, |
| 107308 | /* CRC32r32r16_EVEX */ |
| 107309 | GR32, GR32, GR16, |
| 107310 | /* CRC32r32r32 */ |
| 107311 | GR32, GR32, GR32, |
| 107312 | /* CRC32r32r32_EVEX */ |
| 107313 | GR32, GR32, GR32, |
| 107314 | /* CRC32r32r8 */ |
| 107315 | GR32, GR32, GR8, |
| 107316 | /* CRC32r32r8_EVEX */ |
| 107317 | GR32, GR32, GR8, |
| 107318 | /* CRC32r64m64 */ |
| 107319 | GR64, GR64, i64mem, |
| 107320 | /* CRC32r64m64_EVEX */ |
| 107321 | GR64, GR64, i64mem, |
| 107322 | /* CRC32r64m8 */ |
| 107323 | GR64, GR64, i8mem, |
| 107324 | /* CRC32r64m8_EVEX */ |
| 107325 | GR64, GR64, i8mem, |
| 107326 | /* CRC32r64r64 */ |
| 107327 | GR64, GR64, GR64, |
| 107328 | /* CRC32r64r64_EVEX */ |
| 107329 | GR64, GR64, GR64, |
| 107330 | /* CRC32r64r8 */ |
| 107331 | GR64, GR64, GR8, |
| 107332 | /* CRC32r64r8_EVEX */ |
| 107333 | GR64, GR64, GR8, |
| 107334 | /* CS_PREFIX */ |
| 107335 | /* CTEST16mi */ |
| 107336 | i16mem, i16imm, cflags, ccode, |
| 107337 | /* CTEST16mr */ |
| 107338 | i16mem, GR16, cflags, ccode, |
| 107339 | /* CTEST16ri */ |
| 107340 | GR16, i16imm, cflags, ccode, |
| 107341 | /* CTEST16rr */ |
| 107342 | GR16, GR16, cflags, ccode, |
| 107343 | /* CTEST32mi */ |
| 107344 | i32mem, i32imm, cflags, ccode, |
| 107345 | /* CTEST32mr */ |
| 107346 | i32mem, GR32, cflags, ccode, |
| 107347 | /* CTEST32ri */ |
| 107348 | GR32, i32imm, cflags, ccode, |
| 107349 | /* CTEST32rr */ |
| 107350 | GR32, GR32, cflags, ccode, |
| 107351 | /* CTEST64mi32 */ |
| 107352 | i64mem, i64i32imm, cflags, ccode, |
| 107353 | /* CTEST64mr */ |
| 107354 | i64mem, GR64, cflags, ccode, |
| 107355 | /* CTEST64ri32 */ |
| 107356 | GR64, i64i32imm, cflags, ccode, |
| 107357 | /* CTEST64rr */ |
| 107358 | GR64, GR64, cflags, ccode, |
| 107359 | /* CTEST8mi */ |
| 107360 | i8mem, i8imm, cflags, ccode, |
| 107361 | /* CTEST8mr */ |
| 107362 | i8mem, GR8, cflags, ccode, |
| 107363 | /* CTEST8ri */ |
| 107364 | GR8, i8imm, cflags, ccode, |
| 107365 | /* CTEST8rr */ |
| 107366 | GR8, GR8, cflags, ccode, |
| 107367 | /* CVTDQ2PDrm */ |
| 107368 | VR128, i64mem, |
| 107369 | /* CVTDQ2PDrr */ |
| 107370 | VR128, VR128, |
| 107371 | /* CVTDQ2PSrm */ |
| 107372 | VR128, i128mem, |
| 107373 | /* CVTDQ2PSrr */ |
| 107374 | VR128, VR128, |
| 107375 | /* CVTPD2DQrm */ |
| 107376 | VR128, f128mem, |
| 107377 | /* CVTPD2DQrr */ |
| 107378 | VR128, VR128, |
| 107379 | /* CVTPD2PSrm */ |
| 107380 | VR128, f128mem, |
| 107381 | /* CVTPD2PSrr */ |
| 107382 | VR128, VR128, |
| 107383 | /* CVTPS2DQrm */ |
| 107384 | VR128, f128mem, |
| 107385 | /* CVTPS2DQrr */ |
| 107386 | VR128, VR128, |
| 107387 | /* CVTPS2PDrm */ |
| 107388 | VR128, f64mem, |
| 107389 | /* CVTPS2PDrr */ |
| 107390 | VR128, VR128, |
| 107391 | /* CVTSD2SI64rm */ |
| 107392 | GR64, f64mem, |
| 107393 | /* CVTSD2SI64rm_Int */ |
| 107394 | GR64, sdmem, |
| 107395 | /* CVTSD2SI64rr */ |
| 107396 | GR64, FR64, |
| 107397 | /* CVTSD2SI64rr_Int */ |
| 107398 | GR64, VR128, |
| 107399 | /* CVTSD2SIrm */ |
| 107400 | GR32, f64mem, |
| 107401 | /* CVTSD2SIrm_Int */ |
| 107402 | GR32, sdmem, |
| 107403 | /* CVTSD2SIrr */ |
| 107404 | GR32, FR64, |
| 107405 | /* CVTSD2SIrr_Int */ |
| 107406 | GR32, VR128, |
| 107407 | /* CVTSD2SSrm */ |
| 107408 | FR32, f64mem, |
| 107409 | /* CVTSD2SSrm_Int */ |
| 107410 | VR128, VR128, sdmem, |
| 107411 | /* CVTSD2SSrr */ |
| 107412 | FR32, FR64, |
| 107413 | /* CVTSD2SSrr_Int */ |
| 107414 | VR128, VR128, VR128, |
| 107415 | /* CVTSI2SDrm */ |
| 107416 | FR64, i32mem, |
| 107417 | /* CVTSI2SDrm_Int */ |
| 107418 | VR128, VR128, i32mem, |
| 107419 | /* CVTSI2SDrr */ |
| 107420 | FR64, GR32, |
| 107421 | /* CVTSI2SDrr_Int */ |
| 107422 | VR128, VR128, GR32, |
| 107423 | /* CVTSI2SSrm */ |
| 107424 | FR32, i32mem, |
| 107425 | /* CVTSI2SSrm_Int */ |
| 107426 | VR128, VR128, i32mem, |
| 107427 | /* CVTSI2SSrr */ |
| 107428 | FR32, GR32, |
| 107429 | /* CVTSI2SSrr_Int */ |
| 107430 | VR128, VR128, GR32, |
| 107431 | /* CVTSI642SDrm */ |
| 107432 | FR64, i64mem, |
| 107433 | /* CVTSI642SDrm_Int */ |
| 107434 | VR128, VR128, i64mem, |
| 107435 | /* CVTSI642SDrr */ |
| 107436 | FR64, GR64, |
| 107437 | /* CVTSI642SDrr_Int */ |
| 107438 | VR128, VR128, GR64, |
| 107439 | /* CVTSI642SSrm */ |
| 107440 | FR32, i64mem, |
| 107441 | /* CVTSI642SSrm_Int */ |
| 107442 | VR128, VR128, i64mem, |
| 107443 | /* CVTSI642SSrr */ |
| 107444 | FR32, GR64, |
| 107445 | /* CVTSI642SSrr_Int */ |
| 107446 | VR128, VR128, GR64, |
| 107447 | /* CVTSS2SDrm */ |
| 107448 | FR64, f32mem, |
| 107449 | /* CVTSS2SDrm_Int */ |
| 107450 | VR128, VR128, ssmem, |
| 107451 | /* CVTSS2SDrr */ |
| 107452 | FR64, FR32, |
| 107453 | /* CVTSS2SDrr_Int */ |
| 107454 | VR128, VR128, VR128, |
| 107455 | /* CVTSS2SI64rm */ |
| 107456 | GR64, f32mem, |
| 107457 | /* CVTSS2SI64rm_Int */ |
| 107458 | GR64, ssmem, |
| 107459 | /* CVTSS2SI64rr */ |
| 107460 | GR64, FR32, |
| 107461 | /* CVTSS2SI64rr_Int */ |
| 107462 | GR64, VR128, |
| 107463 | /* CVTSS2SIrm */ |
| 107464 | GR32, f32mem, |
| 107465 | /* CVTSS2SIrm_Int */ |
| 107466 | GR32, ssmem, |
| 107467 | /* CVTSS2SIrr */ |
| 107468 | GR32, FR32, |
| 107469 | /* CVTSS2SIrr_Int */ |
| 107470 | GR32, VR128, |
| 107471 | /* CVTTPD2DQrm */ |
| 107472 | VR128, f128mem, |
| 107473 | /* CVTTPD2DQrr */ |
| 107474 | VR128, VR128, |
| 107475 | /* CVTTPS2DQrm */ |
| 107476 | VR128, f128mem, |
| 107477 | /* CVTTPS2DQrr */ |
| 107478 | VR128, VR128, |
| 107479 | /* CVTTSD2SI64rm */ |
| 107480 | GR64, f64mem, |
| 107481 | /* CVTTSD2SI64rm_Int */ |
| 107482 | GR64, sdmem, |
| 107483 | /* CVTTSD2SI64rr */ |
| 107484 | GR64, FR64, |
| 107485 | /* CVTTSD2SI64rr_Int */ |
| 107486 | GR64, VR128, |
| 107487 | /* CVTTSD2SIrm */ |
| 107488 | GR32, f64mem, |
| 107489 | /* CVTTSD2SIrm_Int */ |
| 107490 | GR32, sdmem, |
| 107491 | /* CVTTSD2SIrr */ |
| 107492 | GR32, FR64, |
| 107493 | /* CVTTSD2SIrr_Int */ |
| 107494 | GR32, VR128, |
| 107495 | /* CVTTSS2SI64rm */ |
| 107496 | GR64, f32mem, |
| 107497 | /* CVTTSS2SI64rm_Int */ |
| 107498 | GR64, ssmem, |
| 107499 | /* CVTTSS2SI64rr */ |
| 107500 | GR64, FR32, |
| 107501 | /* CVTTSS2SI64rr_Int */ |
| 107502 | GR64, VR128, |
| 107503 | /* CVTTSS2SIrm */ |
| 107504 | GR32, f32mem, |
| 107505 | /* CVTTSS2SIrm_Int */ |
| 107506 | GR32, ssmem, |
| 107507 | /* CVTTSS2SIrr */ |
| 107508 | GR32, FR32, |
| 107509 | /* CVTTSS2SIrr_Int */ |
| 107510 | GR32, VR128, |
| 107511 | /* CWD */ |
| 107512 | /* CWDE */ |
| 107513 | /* DAA */ |
| 107514 | /* DAS */ |
| 107515 | /* DATA16_PREFIX */ |
| 107516 | /* DEC16m */ |
| 107517 | i16mem, |
| 107518 | /* DEC16m_EVEX */ |
| 107519 | i16mem, |
| 107520 | /* DEC16m_ND */ |
| 107521 | GR16, i16mem, |
| 107522 | /* DEC16m_NF */ |
| 107523 | i16mem, |
| 107524 | /* DEC16m_NF_ND */ |
| 107525 | GR16, i16mem, |
| 107526 | /* DEC16r */ |
| 107527 | GR16, GR16, |
| 107528 | /* DEC16r_EVEX */ |
| 107529 | GR16, GR16, |
| 107530 | /* DEC16r_ND */ |
| 107531 | GR16, GR16, |
| 107532 | /* DEC16r_NF */ |
| 107533 | GR16, GR16, |
| 107534 | /* DEC16r_NF_ND */ |
| 107535 | GR16, GR16, |
| 107536 | /* DEC16r_alt */ |
| 107537 | GR16, GR16, |
| 107538 | /* DEC32m */ |
| 107539 | i32mem, |
| 107540 | /* DEC32m_EVEX */ |
| 107541 | i32mem, |
| 107542 | /* DEC32m_ND */ |
| 107543 | GR32, i32mem, |
| 107544 | /* DEC32m_NF */ |
| 107545 | i32mem, |
| 107546 | /* DEC32m_NF_ND */ |
| 107547 | GR32, i32mem, |
| 107548 | /* DEC32r */ |
| 107549 | GR32, GR32, |
| 107550 | /* DEC32r_EVEX */ |
| 107551 | GR32, GR32, |
| 107552 | /* DEC32r_ND */ |
| 107553 | GR32, GR32, |
| 107554 | /* DEC32r_NF */ |
| 107555 | GR32, GR32, |
| 107556 | /* DEC32r_NF_ND */ |
| 107557 | GR32, GR32, |
| 107558 | /* DEC32r_alt */ |
| 107559 | GR32, GR32, |
| 107560 | /* DEC64m */ |
| 107561 | i64mem, |
| 107562 | /* DEC64m_EVEX */ |
| 107563 | i64mem, |
| 107564 | /* DEC64m_ND */ |
| 107565 | GR64, i64mem, |
| 107566 | /* DEC64m_NF */ |
| 107567 | i64mem, |
| 107568 | /* DEC64m_NF_ND */ |
| 107569 | GR64, i64mem, |
| 107570 | /* DEC64r */ |
| 107571 | GR64, GR64, |
| 107572 | /* DEC64r_EVEX */ |
| 107573 | GR64, GR64, |
| 107574 | /* DEC64r_ND */ |
| 107575 | GR64, GR64, |
| 107576 | /* DEC64r_NF */ |
| 107577 | GR64, GR64, |
| 107578 | /* DEC64r_NF_ND */ |
| 107579 | GR64, GR64, |
| 107580 | /* DEC8m */ |
| 107581 | i8mem, |
| 107582 | /* DEC8m_EVEX */ |
| 107583 | i8mem, |
| 107584 | /* DEC8m_ND */ |
| 107585 | GR8, i8mem, |
| 107586 | /* DEC8m_NF */ |
| 107587 | i8mem, |
| 107588 | /* DEC8m_NF_ND */ |
| 107589 | GR8, i8mem, |
| 107590 | /* DEC8r */ |
| 107591 | GR8, GR8, |
| 107592 | /* DEC8r_EVEX */ |
| 107593 | GR8, GR8, |
| 107594 | /* DEC8r_ND */ |
| 107595 | GR8, GR8, |
| 107596 | /* DEC8r_NF */ |
| 107597 | GR8, GR8, |
| 107598 | /* DEC8r_NF_ND */ |
| 107599 | GR8, GR8, |
| 107600 | /* DIV16m */ |
| 107601 | i16mem, |
| 107602 | /* DIV16m_EVEX */ |
| 107603 | i16mem, |
| 107604 | /* DIV16m_NF */ |
| 107605 | i16mem, |
| 107606 | /* DIV16r */ |
| 107607 | GR16, |
| 107608 | /* DIV16r_EVEX */ |
| 107609 | GR16, |
| 107610 | /* DIV16r_NF */ |
| 107611 | GR16, |
| 107612 | /* DIV32m */ |
| 107613 | i32mem, |
| 107614 | /* DIV32m_EVEX */ |
| 107615 | i32mem, |
| 107616 | /* DIV32m_NF */ |
| 107617 | i32mem, |
| 107618 | /* DIV32r */ |
| 107619 | GR32, |
| 107620 | /* DIV32r_EVEX */ |
| 107621 | GR32, |
| 107622 | /* DIV32r_NF */ |
| 107623 | GR32, |
| 107624 | /* DIV64m */ |
| 107625 | i64mem, |
| 107626 | /* DIV64m_EVEX */ |
| 107627 | i64mem, |
| 107628 | /* DIV64m_NF */ |
| 107629 | i64mem, |
| 107630 | /* DIV64r */ |
| 107631 | GR64, |
| 107632 | /* DIV64r_EVEX */ |
| 107633 | GR64, |
| 107634 | /* DIV64r_NF */ |
| 107635 | GR64, |
| 107636 | /* DIV8m */ |
| 107637 | i8mem, |
| 107638 | /* DIV8m_EVEX */ |
| 107639 | i8mem, |
| 107640 | /* DIV8m_NF */ |
| 107641 | i8mem, |
| 107642 | /* DIV8r */ |
| 107643 | GR8, |
| 107644 | /* DIV8r_EVEX */ |
| 107645 | GR8, |
| 107646 | /* DIV8r_NF */ |
| 107647 | GR8, |
| 107648 | /* DIVPDrm */ |
| 107649 | VR128, VR128, f128mem, |
| 107650 | /* DIVPDrr */ |
| 107651 | VR128, VR128, VR128, |
| 107652 | /* DIVPSrm */ |
| 107653 | VR128, VR128, f128mem, |
| 107654 | /* DIVPSrr */ |
| 107655 | VR128, VR128, VR128, |
| 107656 | /* DIVR_F32m */ |
| 107657 | f32mem, |
| 107658 | /* DIVR_F64m */ |
| 107659 | f64mem, |
| 107660 | /* DIVR_FI16m */ |
| 107661 | i16mem, |
| 107662 | /* DIVR_FI32m */ |
| 107663 | i32mem, |
| 107664 | /* DIVR_FPrST0 */ |
| 107665 | RSTi, |
| 107666 | /* DIVR_FST0r */ |
| 107667 | RSTi, |
| 107668 | /* DIVR_Fp32m */ |
| 107669 | RFP32, RFP32, f32mem, |
| 107670 | /* DIVR_Fp64m */ |
| 107671 | RFP64, RFP64, f64mem, |
| 107672 | /* DIVR_Fp64m32 */ |
| 107673 | RFP64, RFP64, f32mem, |
| 107674 | /* DIVR_Fp80m32 */ |
| 107675 | RFP80, RFP80, f32mem, |
| 107676 | /* DIVR_Fp80m64 */ |
| 107677 | RFP80, RFP80, f64mem, |
| 107678 | /* DIVR_FpI16m32 */ |
| 107679 | RFP32, RFP32, i16mem, |
| 107680 | /* DIVR_FpI16m64 */ |
| 107681 | RFP64, RFP64, i16mem, |
| 107682 | /* DIVR_FpI16m80 */ |
| 107683 | RFP80, RFP80, i16mem, |
| 107684 | /* DIVR_FpI32m32 */ |
| 107685 | RFP32, RFP32, i32mem, |
| 107686 | /* DIVR_FpI32m64 */ |
| 107687 | RFP64, RFP64, i32mem, |
| 107688 | /* DIVR_FpI32m80 */ |
| 107689 | RFP80, RFP80, i32mem, |
| 107690 | /* DIVR_FrST0 */ |
| 107691 | RSTi, |
| 107692 | /* DIVSDrm */ |
| 107693 | FR64, FR64, f64mem, |
| 107694 | /* DIVSDrm_Int */ |
| 107695 | VR128, VR128, sdmem, |
| 107696 | /* DIVSDrr */ |
| 107697 | FR64, FR64, FR64, |
| 107698 | /* DIVSDrr_Int */ |
| 107699 | VR128, VR128, VR128, |
| 107700 | /* DIVSSrm */ |
| 107701 | FR32, FR32, f32mem, |
| 107702 | /* DIVSSrm_Int */ |
| 107703 | VR128, VR128, ssmem, |
| 107704 | /* DIVSSrr */ |
| 107705 | FR32, FR32, FR32, |
| 107706 | /* DIVSSrr_Int */ |
| 107707 | VR128, VR128, VR128, |
| 107708 | /* DIV_F32m */ |
| 107709 | f32mem, |
| 107710 | /* DIV_F64m */ |
| 107711 | f64mem, |
| 107712 | /* DIV_FI16m */ |
| 107713 | i16mem, |
| 107714 | /* DIV_FI32m */ |
| 107715 | i32mem, |
| 107716 | /* DIV_FPrST0 */ |
| 107717 | RSTi, |
| 107718 | /* DIV_FST0r */ |
| 107719 | RSTi, |
| 107720 | /* DIV_Fp32 */ |
| 107721 | RFP32, RFP32, RFP32, |
| 107722 | /* DIV_Fp32m */ |
| 107723 | RFP32, RFP32, f32mem, |
| 107724 | /* DIV_Fp64 */ |
| 107725 | RFP64, RFP64, RFP64, |
| 107726 | /* DIV_Fp64m */ |
| 107727 | RFP64, RFP64, f64mem, |
| 107728 | /* DIV_Fp64m32 */ |
| 107729 | RFP64, RFP64, f32mem, |
| 107730 | /* DIV_Fp80 */ |
| 107731 | RFP80, RFP80, RFP80, |
| 107732 | /* DIV_Fp80m32 */ |
| 107733 | RFP80, RFP80, f32mem, |
| 107734 | /* DIV_Fp80m64 */ |
| 107735 | RFP80, RFP80, f64mem, |
| 107736 | /* DIV_FpI16m32 */ |
| 107737 | RFP32, RFP32, i16mem, |
| 107738 | /* DIV_FpI16m64 */ |
| 107739 | RFP64, RFP64, i16mem, |
| 107740 | /* DIV_FpI16m80 */ |
| 107741 | RFP80, RFP80, i16mem, |
| 107742 | /* DIV_FpI32m32 */ |
| 107743 | RFP32, RFP32, i32mem, |
| 107744 | /* DIV_FpI32m64 */ |
| 107745 | RFP64, RFP64, i32mem, |
| 107746 | /* DIV_FpI32m80 */ |
| 107747 | RFP80, RFP80, i32mem, |
| 107748 | /* DIV_FrST0 */ |
| 107749 | RSTi, |
| 107750 | /* DPPDrmi */ |
| 107751 | VR128, VR128, f128mem, u8imm, |
| 107752 | /* DPPDrri */ |
| 107753 | VR128, VR128, VR128, u8imm, |
| 107754 | /* DPPSrmi */ |
| 107755 | VR128, VR128, f128mem, u8imm, |
| 107756 | /* DPPSrri */ |
| 107757 | VR128, VR128, VR128, u8imm, |
| 107758 | /* DS_PREFIX */ |
| 107759 | /* DYN_ALLOCA_32 */ |
| 107760 | GR32, |
| 107761 | /* DYN_ALLOCA_64 */ |
| 107762 | GR64, |
| 107763 | /* EH_RETURN */ |
| 107764 | GR32, |
| 107765 | /* EH_RETURN64 */ |
| 107766 | GR64, |
| 107767 | /* EH_SjLj_LongJmp32 */ |
| 107768 | i32mem, |
| 107769 | /* EH_SjLj_LongJmp64 */ |
| 107770 | i64mem, |
| 107771 | /* EH_SjLj_SetJmp32 */ |
| 107772 | GR32, i32mem, |
| 107773 | /* EH_SjLj_SetJmp64 */ |
| 107774 | GR32, i64mem, |
| 107775 | /* EH_SjLj_Setup */ |
| 107776 | brtarget, |
| 107777 | /* ENCLS */ |
| 107778 | /* ENCLU */ |
| 107779 | /* ENCLV */ |
| 107780 | /* ENCODEKEY128 */ |
| 107781 | GR32, GR32, |
| 107782 | /* ENCODEKEY256 */ |
| 107783 | GR32, GR32, |
| 107784 | /* ENDBR32 */ |
| 107785 | /* ENDBR64 */ |
| 107786 | /* ENQCMD16 */ |
| 107787 | GR16, i512mem_GR16, |
| 107788 | /* ENQCMD32 */ |
| 107789 | GR32, i512mem_GR32, |
| 107790 | /* ENQCMD32_EVEX */ |
| 107791 | GR32, i512mem_GR32, |
| 107792 | /* ENQCMD64 */ |
| 107793 | GR64, i512mem_GR64, |
| 107794 | /* ENQCMD64_EVEX */ |
| 107795 | GR64, i512mem_GR64, |
| 107796 | /* ENQCMDS16 */ |
| 107797 | GR16, i512mem_GR16, |
| 107798 | /* ENQCMDS32 */ |
| 107799 | GR32, i512mem_GR32, |
| 107800 | /* ENQCMDS32_EVEX */ |
| 107801 | GR32, i512mem_GR32, |
| 107802 | /* ENQCMDS64 */ |
| 107803 | GR64, i512mem_GR64, |
| 107804 | /* ENQCMDS64_EVEX */ |
| 107805 | GR64, i512mem_GR64, |
| 107806 | /* ENTER */ |
| 107807 | i16imm, i8imm, |
| 107808 | /* ERETS */ |
| 107809 | /* ERETU */ |
| 107810 | /* ES_PREFIX */ |
| 107811 | /* EXTRACTPSmr */ |
| 107812 | f32mem, VR128, u8imm, |
| 107813 | /* EXTRACTPSrr */ |
| 107814 | GR32orGR64, VR128, u8imm, |
| 107815 | /* EXTRQ */ |
| 107816 | VR128, VR128, VR128, |
| 107817 | /* EXTRQI */ |
| 107818 | VR128, VR128, u8imm, u8imm, |
| 107819 | /* F2XM1 */ |
| 107820 | /* FARCALL16i */ |
| 107821 | i16imm, i16imm, |
| 107822 | /* FARCALL16m */ |
| 107823 | opaquemem, |
| 107824 | /* FARCALL32i */ |
| 107825 | i32imm, i16imm, |
| 107826 | /* FARCALL32m */ |
| 107827 | opaquemem, |
| 107828 | /* FARCALL64m */ |
| 107829 | opaquemem, |
| 107830 | /* FARJMP16i */ |
| 107831 | i16imm, i16imm, |
| 107832 | /* FARJMP16m */ |
| 107833 | opaquemem, |
| 107834 | /* FARJMP32i */ |
| 107835 | i32imm, i16imm, |
| 107836 | /* FARJMP32m */ |
| 107837 | opaquemem, |
| 107838 | /* FARJMP64m */ |
| 107839 | opaquemem, |
| 107840 | /* FBLDm */ |
| 107841 | f80mem, |
| 107842 | /* FBSTPm */ |
| 107843 | f80mem, |
| 107844 | /* FCOM32m */ |
| 107845 | f32mem, |
| 107846 | /* FCOM64m */ |
| 107847 | f64mem, |
| 107848 | /* FCOMP32m */ |
| 107849 | f32mem, |
| 107850 | /* FCOMP64m */ |
| 107851 | f64mem, |
| 107852 | /* FCOMPP */ |
| 107853 | /* FCOS */ |
| 107854 | /* FDECSTP */ |
| 107855 | /* FEMMS */ |
| 107856 | /* FFREE */ |
| 107857 | RSTi, |
| 107858 | /* FFREEP */ |
| 107859 | RSTi, |
| 107860 | /* FICOM16m */ |
| 107861 | i16mem, |
| 107862 | /* FICOM32m */ |
| 107863 | i32mem, |
| 107864 | /* FICOMP16m */ |
| 107865 | i16mem, |
| 107866 | /* FICOMP32m */ |
| 107867 | i32mem, |
| 107868 | /* FINCSTP */ |
| 107869 | /* FLDCW16m */ |
| 107870 | i16mem, |
| 107871 | /* FLDENVm */ |
| 107872 | anymem, |
| 107873 | /* FLDL2E */ |
| 107874 | /* FLDL2T */ |
| 107875 | /* FLDLG2 */ |
| 107876 | /* FLDLN2 */ |
| 107877 | /* FLDPI */ |
| 107878 | /* FNCLEX */ |
| 107879 | /* FNINIT */ |
| 107880 | /* FNOP */ |
| 107881 | /* FNSTCW16m */ |
| 107882 | i16mem, |
| 107883 | /* FNSTSW16r */ |
| 107884 | /* FNSTSWm */ |
| 107885 | i16mem, |
| 107886 | /* FP32_TO_INT16_IN_MEM */ |
| 107887 | i16mem, RFP32, |
| 107888 | /* FP32_TO_INT32_IN_MEM */ |
| 107889 | i32mem, RFP32, |
| 107890 | /* FP32_TO_INT64_IN_MEM */ |
| 107891 | i64mem, RFP32, |
| 107892 | /* FP64_TO_INT16_IN_MEM */ |
| 107893 | i16mem, RFP64, |
| 107894 | /* FP64_TO_INT32_IN_MEM */ |
| 107895 | i32mem, RFP64, |
| 107896 | /* FP64_TO_INT64_IN_MEM */ |
| 107897 | i64mem, RFP64, |
| 107898 | /* FP80_ADDm32 */ |
| 107899 | RFP80, RFP80, f32mem, |
| 107900 | /* FP80_ADDr */ |
| 107901 | RFP80, RFP80, RFP80, |
| 107902 | /* FP80_TO_INT16_IN_MEM */ |
| 107903 | i16mem, RFP80, |
| 107904 | /* FP80_TO_INT32_IN_MEM */ |
| 107905 | i32mem, RFP80, |
| 107906 | /* FP80_TO_INT64_IN_MEM */ |
| 107907 | i64mem, RFP80, |
| 107908 | /* FPATAN */ |
| 107909 | /* FPREM */ |
| 107910 | /* FPREM1 */ |
| 107911 | /* FPTAN */ |
| 107912 | /* FRNDINT */ |
| 107913 | /* FRSTORm */ |
| 107914 | anymem, |
| 107915 | /* FSAVEm */ |
| 107916 | anymem, |
| 107917 | /* FSCALE */ |
| 107918 | /* FSIN */ |
| 107919 | /* FSINCOS */ |
| 107920 | /* FSTENVm */ |
| 107921 | anymem, |
| 107922 | /* FS_PREFIX */ |
| 107923 | /* FXRSTOR */ |
| 107924 | opaquemem, |
| 107925 | /* FXRSTOR64 */ |
| 107926 | opaquemem, |
| 107927 | /* FXSAVE */ |
| 107928 | opaquemem, |
| 107929 | /* FXSAVE64 */ |
| 107930 | opaquemem, |
| 107931 | /* FXTRACT */ |
| 107932 | /* FYL2X */ |
| 107933 | /* FYL2XP1 */ |
| 107934 | /* GETSEC */ |
| 107935 | /* GF2P8AFFINEINVQBrmi */ |
| 107936 | VR128, VR128, i128mem, u8imm, |
| 107937 | /* GF2P8AFFINEINVQBrri */ |
| 107938 | VR128, VR128, VR128, u8imm, |
| 107939 | /* GF2P8AFFINEQBrmi */ |
| 107940 | VR128, VR128, i128mem, u8imm, |
| 107941 | /* GF2P8AFFINEQBrri */ |
| 107942 | VR128, VR128, VR128, u8imm, |
| 107943 | /* GF2P8MULBrm */ |
| 107944 | VR128, VR128, i128mem, |
| 107945 | /* GF2P8MULBrr */ |
| 107946 | VR128, VR128, VR128, |
| 107947 | /* GS_PREFIX */ |
| 107948 | /* HADDPDrm */ |
| 107949 | VR128, VR128, f128mem, |
| 107950 | /* HADDPDrr */ |
| 107951 | VR128, VR128, VR128, |
| 107952 | /* HADDPSrm */ |
| 107953 | VR128, VR128, f128mem, |
| 107954 | /* HADDPSrr */ |
| 107955 | VR128, VR128, VR128, |
| 107956 | /* HLT */ |
| 107957 | /* HRESET */ |
| 107958 | i32u8imm, |
| 107959 | /* HSUBPDrm */ |
| 107960 | VR128, VR128, f128mem, |
| 107961 | /* HSUBPDrr */ |
| 107962 | VR128, VR128, VR128, |
| 107963 | /* HSUBPSrm */ |
| 107964 | VR128, VR128, f128mem, |
| 107965 | /* HSUBPSrr */ |
| 107966 | VR128, VR128, VR128, |
| 107967 | /* IDIV16m */ |
| 107968 | i16mem, |
| 107969 | /* IDIV16m_EVEX */ |
| 107970 | i16mem, |
| 107971 | /* IDIV16m_NF */ |
| 107972 | i16mem, |
| 107973 | /* IDIV16r */ |
| 107974 | GR16, |
| 107975 | /* IDIV16r_EVEX */ |
| 107976 | GR16, |
| 107977 | /* IDIV16r_NF */ |
| 107978 | GR16, |
| 107979 | /* IDIV32m */ |
| 107980 | i32mem, |
| 107981 | /* IDIV32m_EVEX */ |
| 107982 | i32mem, |
| 107983 | /* IDIV32m_NF */ |
| 107984 | i32mem, |
| 107985 | /* IDIV32r */ |
| 107986 | GR32, |
| 107987 | /* IDIV32r_EVEX */ |
| 107988 | GR32, |
| 107989 | /* IDIV32r_NF */ |
| 107990 | GR32, |
| 107991 | /* IDIV64m */ |
| 107992 | i64mem, |
| 107993 | /* IDIV64m_EVEX */ |
| 107994 | i64mem, |
| 107995 | /* IDIV64m_NF */ |
| 107996 | i64mem, |
| 107997 | /* IDIV64r */ |
| 107998 | GR64, |
| 107999 | /* IDIV64r_EVEX */ |
| 108000 | GR64, |
| 108001 | /* IDIV64r_NF */ |
| 108002 | GR64, |
| 108003 | /* IDIV8m */ |
| 108004 | i8mem, |
| 108005 | /* IDIV8m_EVEX */ |
| 108006 | i8mem, |
| 108007 | /* IDIV8m_NF */ |
| 108008 | i8mem, |
| 108009 | /* IDIV8r */ |
| 108010 | GR8, |
| 108011 | /* IDIV8r_EVEX */ |
| 108012 | GR8, |
| 108013 | /* IDIV8r_NF */ |
| 108014 | GR8, |
| 108015 | /* ILD_F16m */ |
| 108016 | i16mem, |
| 108017 | /* ILD_F32m */ |
| 108018 | i32mem, |
| 108019 | /* ILD_F64m */ |
| 108020 | i64mem, |
| 108021 | /* ILD_Fp16m32 */ |
| 108022 | RFP32, i16mem, |
| 108023 | /* ILD_Fp16m64 */ |
| 108024 | RFP64, i16mem, |
| 108025 | /* ILD_Fp16m80 */ |
| 108026 | RFP80, i16mem, |
| 108027 | /* ILD_Fp32m32 */ |
| 108028 | RFP32, i32mem, |
| 108029 | /* ILD_Fp32m64 */ |
| 108030 | RFP64, i32mem, |
| 108031 | /* ILD_Fp32m80 */ |
| 108032 | RFP80, i32mem, |
| 108033 | /* ILD_Fp64m32 */ |
| 108034 | RFP32, i64mem, |
| 108035 | /* ILD_Fp64m64 */ |
| 108036 | RFP64, i64mem, |
| 108037 | /* ILD_Fp64m80 */ |
| 108038 | RFP80, i64mem, |
| 108039 | /* IMUL16m */ |
| 108040 | i16mem, |
| 108041 | /* IMUL16m_EVEX */ |
| 108042 | i16mem, |
| 108043 | /* IMUL16m_NF */ |
| 108044 | i16mem, |
| 108045 | /* IMUL16r */ |
| 108046 | GR16, |
| 108047 | /* IMUL16r_EVEX */ |
| 108048 | GR16, |
| 108049 | /* IMUL16r_NF */ |
| 108050 | GR16, |
| 108051 | /* IMUL16rm */ |
| 108052 | GR16, GR16, i16mem, |
| 108053 | /* IMUL16rm_EVEX */ |
| 108054 | GR16, GR16, i16mem, |
| 108055 | /* IMUL16rm_ND */ |
| 108056 | GR16, GR16, i16mem, |
| 108057 | /* IMUL16rm_NF */ |
| 108058 | GR16, GR16, i16mem, |
| 108059 | /* IMUL16rm_NF_ND */ |
| 108060 | GR16, GR16, i16mem, |
| 108061 | /* IMUL16rmi */ |
| 108062 | GR16, i16mem, i16imm, |
| 108063 | /* IMUL16rmi8 */ |
| 108064 | GR16, i16mem, i16i8imm, |
| 108065 | /* IMUL16rmi8_EVEX */ |
| 108066 | GR16, i16mem, i16i8imm, |
| 108067 | /* IMUL16rmi8_NF */ |
| 108068 | GR16, i16mem, i16i8imm, |
| 108069 | /* IMUL16rmi_EVEX */ |
| 108070 | GR16, i16mem, i16imm, |
| 108071 | /* IMUL16rmi_NF */ |
| 108072 | GR16, i16mem, i16imm, |
| 108073 | /* IMUL16rr */ |
| 108074 | GR16, GR16, GR16, |
| 108075 | /* IMUL16rr_EVEX */ |
| 108076 | GR16, GR16, GR16, |
| 108077 | /* IMUL16rr_ND */ |
| 108078 | GR16, GR16, GR16, |
| 108079 | /* IMUL16rr_NF */ |
| 108080 | GR16, GR16, GR16, |
| 108081 | /* IMUL16rr_NF_ND */ |
| 108082 | GR16, GR16, GR16, |
| 108083 | /* IMUL16rri */ |
| 108084 | GR16, GR16, i16imm, |
| 108085 | /* IMUL16rri8 */ |
| 108086 | GR16, GR16, i16i8imm, |
| 108087 | /* IMUL16rri8_EVEX */ |
| 108088 | GR16, GR16, i16i8imm, |
| 108089 | /* IMUL16rri8_NF */ |
| 108090 | GR16, GR16, i16i8imm, |
| 108091 | /* IMUL16rri_EVEX */ |
| 108092 | GR16, GR16, i16imm, |
| 108093 | /* IMUL16rri_NF */ |
| 108094 | GR16, GR16, i16imm, |
| 108095 | /* IMUL32m */ |
| 108096 | i32mem, |
| 108097 | /* IMUL32m_EVEX */ |
| 108098 | i32mem, |
| 108099 | /* IMUL32m_NF */ |
| 108100 | i32mem, |
| 108101 | /* IMUL32r */ |
| 108102 | GR32, |
| 108103 | /* IMUL32r_EVEX */ |
| 108104 | GR32, |
| 108105 | /* IMUL32r_NF */ |
| 108106 | GR32, |
| 108107 | /* IMUL32rm */ |
| 108108 | GR32, GR32, i32mem, |
| 108109 | /* IMUL32rm_EVEX */ |
| 108110 | GR32, GR32, i32mem, |
| 108111 | /* IMUL32rm_ND */ |
| 108112 | GR32, GR32, i32mem, |
| 108113 | /* IMUL32rm_NF */ |
| 108114 | GR32, GR32, i32mem, |
| 108115 | /* IMUL32rm_NF_ND */ |
| 108116 | GR32, GR32, i32mem, |
| 108117 | /* IMUL32rmi */ |
| 108118 | GR32, i32mem, i32imm, |
| 108119 | /* IMUL32rmi8 */ |
| 108120 | GR32, i32mem, i32i8imm, |
| 108121 | /* IMUL32rmi8_EVEX */ |
| 108122 | GR32, i32mem, i32i8imm, |
| 108123 | /* IMUL32rmi8_NF */ |
| 108124 | GR32, i32mem, i32i8imm, |
| 108125 | /* IMUL32rmi_EVEX */ |
| 108126 | GR32, i32mem, i32imm, |
| 108127 | /* IMUL32rmi_NF */ |
| 108128 | GR32, i32mem, i32imm, |
| 108129 | /* IMUL32rr */ |
| 108130 | GR32, GR32, GR32, |
| 108131 | /* IMUL32rr_EVEX */ |
| 108132 | GR32, GR32, GR32, |
| 108133 | /* IMUL32rr_ND */ |
| 108134 | GR32, GR32, GR32, |
| 108135 | /* IMUL32rr_NF */ |
| 108136 | GR32, GR32, GR32, |
| 108137 | /* IMUL32rr_NF_ND */ |
| 108138 | GR32, GR32, GR32, |
| 108139 | /* IMUL32rri */ |
| 108140 | GR32, GR32, i32imm, |
| 108141 | /* IMUL32rri8 */ |
| 108142 | GR32, GR32, i32i8imm, |
| 108143 | /* IMUL32rri8_EVEX */ |
| 108144 | GR32, GR32, i32i8imm, |
| 108145 | /* IMUL32rri8_NF */ |
| 108146 | GR32, GR32, i32i8imm, |
| 108147 | /* IMUL32rri_EVEX */ |
| 108148 | GR32, GR32, i32imm, |
| 108149 | /* IMUL32rri_NF */ |
| 108150 | GR32, GR32, i32imm, |
| 108151 | /* IMUL64m */ |
| 108152 | i64mem, |
| 108153 | /* IMUL64m_EVEX */ |
| 108154 | i64mem, |
| 108155 | /* IMUL64m_NF */ |
| 108156 | i64mem, |
| 108157 | /* IMUL64r */ |
| 108158 | GR64, |
| 108159 | /* IMUL64r_EVEX */ |
| 108160 | GR64, |
| 108161 | /* IMUL64r_NF */ |
| 108162 | GR64, |
| 108163 | /* IMUL64rm */ |
| 108164 | GR64, GR64, i64mem, |
| 108165 | /* IMUL64rm_EVEX */ |
| 108166 | GR64, GR64, i64mem, |
| 108167 | /* IMUL64rm_ND */ |
| 108168 | GR64, GR64, i64mem, |
| 108169 | /* IMUL64rm_NF */ |
| 108170 | GR64, GR64, i64mem, |
| 108171 | /* IMUL64rm_NF_ND */ |
| 108172 | GR64, GR64, i64mem, |
| 108173 | /* IMUL64rmi32 */ |
| 108174 | GR64, i64mem, i64i32imm, |
| 108175 | /* IMUL64rmi32_EVEX */ |
| 108176 | GR64, i64mem, i64i32imm, |
| 108177 | /* IMUL64rmi32_NF */ |
| 108178 | GR64, i64mem, i64i32imm, |
| 108179 | /* IMUL64rmi8 */ |
| 108180 | GR64, i64mem, i64i8imm, |
| 108181 | /* IMUL64rmi8_EVEX */ |
| 108182 | GR64, i64mem, i64i8imm, |
| 108183 | /* IMUL64rmi8_NF */ |
| 108184 | GR64, i64mem, i64i8imm, |
| 108185 | /* IMUL64rr */ |
| 108186 | GR64, GR64, GR64, |
| 108187 | /* IMUL64rr_EVEX */ |
| 108188 | GR64, GR64, GR64, |
| 108189 | /* IMUL64rr_ND */ |
| 108190 | GR64, GR64, GR64, |
| 108191 | /* IMUL64rr_NF */ |
| 108192 | GR64, GR64, GR64, |
| 108193 | /* IMUL64rr_NF_ND */ |
| 108194 | GR64, GR64, GR64, |
| 108195 | /* IMUL64rri32 */ |
| 108196 | GR64, GR64, i64i32imm, |
| 108197 | /* IMUL64rri32_EVEX */ |
| 108198 | GR64, GR64, i64i32imm, |
| 108199 | /* IMUL64rri32_NF */ |
| 108200 | GR64, GR64, i64i32imm, |
| 108201 | /* IMUL64rri8 */ |
| 108202 | GR64, GR64, i64i8imm, |
| 108203 | /* IMUL64rri8_EVEX */ |
| 108204 | GR64, GR64, i64i8imm, |
| 108205 | /* IMUL64rri8_NF */ |
| 108206 | GR64, GR64, i64i8imm, |
| 108207 | /* IMUL8m */ |
| 108208 | i8mem, |
| 108209 | /* IMUL8m_EVEX */ |
| 108210 | i8mem, |
| 108211 | /* IMUL8m_NF */ |
| 108212 | i8mem, |
| 108213 | /* IMUL8r */ |
| 108214 | GR8, |
| 108215 | /* IMUL8r_EVEX */ |
| 108216 | GR8, |
| 108217 | /* IMUL8r_NF */ |
| 108218 | GR8, |
| 108219 | /* IMULZU16rmi */ |
| 108220 | GR16, i16mem, i16imm, |
| 108221 | /* IMULZU16rmi8 */ |
| 108222 | GR16, i16mem, i16i8imm, |
| 108223 | /* IMULZU16rri */ |
| 108224 | GR16, GR16, i16imm, |
| 108225 | /* IMULZU16rri8 */ |
| 108226 | GR16, GR16, i16i8imm, |
| 108227 | /* IMULZU32rmi */ |
| 108228 | GR32, i32mem, i32imm, |
| 108229 | /* IMULZU32rmi8 */ |
| 108230 | GR32, i32mem, i32i8imm, |
| 108231 | /* IMULZU32rri */ |
| 108232 | GR32, GR32, i32imm, |
| 108233 | /* IMULZU32rri8 */ |
| 108234 | GR32, GR32, i32i8imm, |
| 108235 | /* IMULZU64rmi32 */ |
| 108236 | GR64, i64mem, i64i32imm, |
| 108237 | /* IMULZU64rmi8 */ |
| 108238 | GR64, i64mem, i64i8imm, |
| 108239 | /* IMULZU64rri32 */ |
| 108240 | GR64, GR64, i64i32imm, |
| 108241 | /* IMULZU64rri8 */ |
| 108242 | GR64, GR64, i64i8imm, |
| 108243 | /* IN16ri */ |
| 108244 | u8imm, |
| 108245 | /* IN16rr */ |
| 108246 | /* IN32ri */ |
| 108247 | u8imm, |
| 108248 | /* IN32rr */ |
| 108249 | /* IN8ri */ |
| 108250 | u8imm, |
| 108251 | /* IN8rr */ |
| 108252 | /* INC16m */ |
| 108253 | i16mem, |
| 108254 | /* INC16m_EVEX */ |
| 108255 | i16mem, |
| 108256 | /* INC16m_ND */ |
| 108257 | GR16, i16mem, |
| 108258 | /* INC16m_NF */ |
| 108259 | i16mem, |
| 108260 | /* INC16m_NF_ND */ |
| 108261 | GR16, i16mem, |
| 108262 | /* INC16r */ |
| 108263 | GR16, GR16, |
| 108264 | /* INC16r_EVEX */ |
| 108265 | GR16, GR16, |
| 108266 | /* INC16r_ND */ |
| 108267 | GR16, GR16, |
| 108268 | /* INC16r_NF */ |
| 108269 | GR16, GR16, |
| 108270 | /* INC16r_NF_ND */ |
| 108271 | GR16, GR16, |
| 108272 | /* INC16r_alt */ |
| 108273 | GR16, GR16, |
| 108274 | /* INC32m */ |
| 108275 | i32mem, |
| 108276 | /* INC32m_EVEX */ |
| 108277 | i32mem, |
| 108278 | /* INC32m_ND */ |
| 108279 | GR32, i32mem, |
| 108280 | /* INC32m_NF */ |
| 108281 | i32mem, |
| 108282 | /* INC32m_NF_ND */ |
| 108283 | GR32, i32mem, |
| 108284 | /* INC32r */ |
| 108285 | GR32, GR32, |
| 108286 | /* INC32r_EVEX */ |
| 108287 | GR32, GR32, |
| 108288 | /* INC32r_ND */ |
| 108289 | GR32, GR32, |
| 108290 | /* INC32r_NF */ |
| 108291 | GR32, GR32, |
| 108292 | /* INC32r_NF_ND */ |
| 108293 | GR32, GR32, |
| 108294 | /* INC32r_alt */ |
| 108295 | GR32, GR32, |
| 108296 | /* INC64m */ |
| 108297 | i64mem, |
| 108298 | /* INC64m_EVEX */ |
| 108299 | i64mem, |
| 108300 | /* INC64m_ND */ |
| 108301 | GR64, i64mem, |
| 108302 | /* INC64m_NF */ |
| 108303 | i64mem, |
| 108304 | /* INC64m_NF_ND */ |
| 108305 | GR64, i64mem, |
| 108306 | /* INC64r */ |
| 108307 | GR64, GR64, |
| 108308 | /* INC64r_EVEX */ |
| 108309 | GR64, GR64, |
| 108310 | /* INC64r_ND */ |
| 108311 | GR64, GR64, |
| 108312 | /* INC64r_NF */ |
| 108313 | GR64, GR64, |
| 108314 | /* INC64r_NF_ND */ |
| 108315 | GR64, GR64, |
| 108316 | /* INC8m */ |
| 108317 | i8mem, |
| 108318 | /* INC8m_EVEX */ |
| 108319 | i8mem, |
| 108320 | /* INC8m_ND */ |
| 108321 | GR8, i8mem, |
| 108322 | /* INC8m_NF */ |
| 108323 | i8mem, |
| 108324 | /* INC8m_NF_ND */ |
| 108325 | GR8, i8mem, |
| 108326 | /* INC8r */ |
| 108327 | GR8, GR8, |
| 108328 | /* INC8r_EVEX */ |
| 108329 | GR8, GR8, |
| 108330 | /* INC8r_ND */ |
| 108331 | GR8, GR8, |
| 108332 | /* INC8r_NF */ |
| 108333 | GR8, GR8, |
| 108334 | /* INC8r_NF_ND */ |
| 108335 | GR8, GR8, |
| 108336 | /* INCSSPD */ |
| 108337 | GR32, |
| 108338 | /* INCSSPQ */ |
| 108339 | GR64, |
| 108340 | /* INSB */ |
| 108341 | dstidx8, |
| 108342 | /* INSERTPSrm */ |
| 108343 | VR128, VR128, f32mem, u8imm, |
| 108344 | /* INSERTPSrr */ |
| 108345 | VR128, VR128, VR128, u8imm, |
| 108346 | /* INSERTQ */ |
| 108347 | VR128, VR128, VR128, |
| 108348 | /* INSERTQI */ |
| 108349 | VR128, VR128, VR128, u8imm, u8imm, |
| 108350 | /* INSL */ |
| 108351 | dstidx32, |
| 108352 | /* INSW */ |
| 108353 | dstidx16, |
| 108354 | /* INT */ |
| 108355 | u8imm, |
| 108356 | /* INT3 */ |
| 108357 | /* INTO */ |
| 108358 | /* INVD */ |
| 108359 | /* INVEPT32 */ |
| 108360 | GR32, i128mem, |
| 108361 | /* INVEPT64 */ |
| 108362 | GR64, i128mem, |
| 108363 | /* INVEPT64_EVEX */ |
| 108364 | GR64, i128mem, |
| 108365 | /* INVLPG */ |
| 108366 | i8mem, |
| 108367 | /* INVLPGA32 */ |
| 108368 | /* INVLPGA64 */ |
| 108369 | /* INVLPGB32 */ |
| 108370 | /* INVLPGB64 */ |
| 108371 | /* INVPCID32 */ |
| 108372 | GR32, i128mem, |
| 108373 | /* INVPCID64 */ |
| 108374 | GR64, i128mem, |
| 108375 | /* INVPCID64_EVEX */ |
| 108376 | GR64, i128mem, |
| 108377 | /* INVVPID32 */ |
| 108378 | GR32, i128mem, |
| 108379 | /* INVVPID64 */ |
| 108380 | GR64, i128mem, |
| 108381 | /* INVVPID64_EVEX */ |
| 108382 | GR64, i128mem, |
| 108383 | /* IRET */ |
| 108384 | i32imm, |
| 108385 | /* IRET16 */ |
| 108386 | /* IRET32 */ |
| 108387 | /* IRET64 */ |
| 108388 | /* ISTT_FP16m */ |
| 108389 | i16mem, |
| 108390 | /* ISTT_FP32m */ |
| 108391 | i32mem, |
| 108392 | /* ISTT_FP64m */ |
| 108393 | i64mem, |
| 108394 | /* ISTT_Fp16m32 */ |
| 108395 | i16mem, RFP32, |
| 108396 | /* ISTT_Fp16m64 */ |
| 108397 | i16mem, RFP64, |
| 108398 | /* ISTT_Fp16m80 */ |
| 108399 | i16mem, RFP80, |
| 108400 | /* ISTT_Fp32m32 */ |
| 108401 | i32mem, RFP32, |
| 108402 | /* ISTT_Fp32m64 */ |
| 108403 | i32mem, RFP64, |
| 108404 | /* ISTT_Fp32m80 */ |
| 108405 | i32mem, RFP80, |
| 108406 | /* ISTT_Fp64m32 */ |
| 108407 | i64mem, RFP32, |
| 108408 | /* ISTT_Fp64m64 */ |
| 108409 | i64mem, RFP64, |
| 108410 | /* ISTT_Fp64m80 */ |
| 108411 | i64mem, RFP80, |
| 108412 | /* IST_F16m */ |
| 108413 | i16mem, |
| 108414 | /* IST_F32m */ |
| 108415 | i32mem, |
| 108416 | /* IST_FP16m */ |
| 108417 | i16mem, |
| 108418 | /* IST_FP32m */ |
| 108419 | i32mem, |
| 108420 | /* IST_FP64m */ |
| 108421 | i64mem, |
| 108422 | /* IST_Fp16m32 */ |
| 108423 | i16mem, RFP32, |
| 108424 | /* IST_Fp16m64 */ |
| 108425 | i16mem, RFP64, |
| 108426 | /* IST_Fp16m80 */ |
| 108427 | i16mem, RFP80, |
| 108428 | /* IST_Fp32m32 */ |
| 108429 | i32mem, RFP32, |
| 108430 | /* IST_Fp32m64 */ |
| 108431 | i32mem, RFP64, |
| 108432 | /* IST_Fp32m80 */ |
| 108433 | i32mem, RFP80, |
| 108434 | /* IST_Fp64m32 */ |
| 108435 | i64mem, RFP32, |
| 108436 | /* IST_Fp64m64 */ |
| 108437 | i64mem, RFP64, |
| 108438 | /* IST_Fp64m80 */ |
| 108439 | i64mem, RFP80, |
| 108440 | /* Int_eh_sjlj_setup_dispatch */ |
| 108441 | /* JCC_1 */ |
| 108442 | brtarget8, ccode, |
| 108443 | /* JCC_2 */ |
| 108444 | brtarget16, ccode, |
| 108445 | /* JCC_4 */ |
| 108446 | brtarget32, ccode, |
| 108447 | /* JCXZ */ |
| 108448 | brtarget8, |
| 108449 | /* JECXZ */ |
| 108450 | brtarget8, |
| 108451 | /* JMP16m */ |
| 108452 | i16mem, |
| 108453 | /* JMP16m_NT */ |
| 108454 | i16mem, |
| 108455 | /* JMP16r */ |
| 108456 | GR16, |
| 108457 | /* JMP16r_NT */ |
| 108458 | GR16, |
| 108459 | /* JMP32m */ |
| 108460 | i32mem, |
| 108461 | /* JMP32m_NT */ |
| 108462 | i32mem, |
| 108463 | /* JMP32r */ |
| 108464 | GR32, |
| 108465 | /* JMP32r_NT */ |
| 108466 | GR32, |
| 108467 | /* JMP64m */ |
| 108468 | i64mem, |
| 108469 | /* JMP64m_NT */ |
| 108470 | i64mem, |
| 108471 | /* JMP64m_REX */ |
| 108472 | i64mem, |
| 108473 | /* JMP64r */ |
| 108474 | GR64, |
| 108475 | /* JMP64r_NT */ |
| 108476 | GR64, |
| 108477 | /* JMP64r_REX */ |
| 108478 | GR64, |
| 108479 | /* JMPABS64i */ |
| 108480 | i64imm, |
| 108481 | /* JMP_1 */ |
| 108482 | brtarget8, |
| 108483 | /* JMP_2 */ |
| 108484 | brtarget16, |
| 108485 | /* JMP_4 */ |
| 108486 | brtarget32, |
| 108487 | /* JRCXZ */ |
| 108488 | brtarget8, |
| 108489 | /* KADDBrr */ |
| 108490 | VK8, VK8, VK8, |
| 108491 | /* KADDDrr */ |
| 108492 | VK32, VK32, VK32, |
| 108493 | /* KADDQrr */ |
| 108494 | VK64, VK64, VK64, |
| 108495 | /* KADDWrr */ |
| 108496 | VK16, VK16, VK16, |
| 108497 | /* KANDBrr */ |
| 108498 | VK8, VK8, VK8, |
| 108499 | /* KANDDrr */ |
| 108500 | VK32, VK32, VK32, |
| 108501 | /* KANDNBrr */ |
| 108502 | VK8, VK8, VK8, |
| 108503 | /* KANDNDrr */ |
| 108504 | VK32, VK32, VK32, |
| 108505 | /* KANDNQrr */ |
| 108506 | VK64, VK64, VK64, |
| 108507 | /* KANDNWrr */ |
| 108508 | VK16, VK16, VK16, |
| 108509 | /* KANDQrr */ |
| 108510 | VK64, VK64, VK64, |
| 108511 | /* KANDWrr */ |
| 108512 | VK16, VK16, VK16, |
| 108513 | /* KCFI_CHECK */ |
| 108514 | GR64, i32imm, |
| 108515 | /* KMOVBkk */ |
| 108516 | VK8, VK8, |
| 108517 | /* KMOVBkk_EVEX */ |
| 108518 | VK8, VK8, |
| 108519 | /* KMOVBkm */ |
| 108520 | VK8, i8mem, |
| 108521 | /* KMOVBkm_EVEX */ |
| 108522 | VK8, i8mem, |
| 108523 | /* KMOVBkr */ |
| 108524 | VK8, GR32, |
| 108525 | /* KMOVBkr_EVEX */ |
| 108526 | VK8, GR32, |
| 108527 | /* KMOVBmk */ |
| 108528 | i8mem, VK8, |
| 108529 | /* KMOVBmk_EVEX */ |
| 108530 | i8mem, VK8, |
| 108531 | /* KMOVBrk */ |
| 108532 | GR32, VK8, |
| 108533 | /* KMOVBrk_EVEX */ |
| 108534 | GR32, VK8, |
| 108535 | /* KMOVDkk */ |
| 108536 | VK32, VK32, |
| 108537 | /* KMOVDkk_EVEX */ |
| 108538 | VK32, VK32, |
| 108539 | /* KMOVDkm */ |
| 108540 | VK32, i32mem, |
| 108541 | /* KMOVDkm_EVEX */ |
| 108542 | VK32, i32mem, |
| 108543 | /* KMOVDkr */ |
| 108544 | VK32, GR32, |
| 108545 | /* KMOVDkr_EVEX */ |
| 108546 | VK32, GR32, |
| 108547 | /* KMOVDmk */ |
| 108548 | i32mem, VK32, |
| 108549 | /* KMOVDmk_EVEX */ |
| 108550 | i32mem, VK32, |
| 108551 | /* KMOVDrk */ |
| 108552 | GR32, VK32, |
| 108553 | /* KMOVDrk_EVEX */ |
| 108554 | GR32, VK32, |
| 108555 | /* KMOVQkk */ |
| 108556 | VK64, VK64, |
| 108557 | /* KMOVQkk_EVEX */ |
| 108558 | VK64, VK64, |
| 108559 | /* KMOVQkm */ |
| 108560 | VK64, i64mem, |
| 108561 | /* KMOVQkm_EVEX */ |
| 108562 | VK64, i64mem, |
| 108563 | /* KMOVQkr */ |
| 108564 | VK64, GR64, |
| 108565 | /* KMOVQkr_EVEX */ |
| 108566 | VK64, GR64, |
| 108567 | /* KMOVQmk */ |
| 108568 | i64mem, VK64, |
| 108569 | /* KMOVQmk_EVEX */ |
| 108570 | i64mem, VK64, |
| 108571 | /* KMOVQrk */ |
| 108572 | GR64, VK64, |
| 108573 | /* KMOVQrk_EVEX */ |
| 108574 | GR64, VK64, |
| 108575 | /* KMOVWkk */ |
| 108576 | VK16, VK16, |
| 108577 | /* KMOVWkk_EVEX */ |
| 108578 | VK16, VK16, |
| 108579 | /* KMOVWkm */ |
| 108580 | VK16, i16mem, |
| 108581 | /* KMOVWkm_EVEX */ |
| 108582 | VK16, i16mem, |
| 108583 | /* KMOVWkr */ |
| 108584 | VK16, GR32, |
| 108585 | /* KMOVWkr_EVEX */ |
| 108586 | VK16, GR32, |
| 108587 | /* KMOVWmk */ |
| 108588 | i16mem, VK16, |
| 108589 | /* KMOVWmk_EVEX */ |
| 108590 | i16mem, VK16, |
| 108591 | /* KMOVWrk */ |
| 108592 | GR32, VK16, |
| 108593 | /* KMOVWrk_EVEX */ |
| 108594 | GR32, VK16, |
| 108595 | /* KNOTBrr */ |
| 108596 | VK8, VK8, |
| 108597 | /* KNOTDrr */ |
| 108598 | VK32, VK32, |
| 108599 | /* KNOTQrr */ |
| 108600 | VK64, VK64, |
| 108601 | /* KNOTWrr */ |
| 108602 | VK16, VK16, |
| 108603 | /* KORBrr */ |
| 108604 | VK8, VK8, VK8, |
| 108605 | /* KORDrr */ |
| 108606 | VK32, VK32, VK32, |
| 108607 | /* KORQrr */ |
| 108608 | VK64, VK64, VK64, |
| 108609 | /* KORTESTBrr */ |
| 108610 | VK8, VK8, |
| 108611 | /* KORTESTDrr */ |
| 108612 | VK32, VK32, |
| 108613 | /* KORTESTQrr */ |
| 108614 | VK64, VK64, |
| 108615 | /* KORTESTWrr */ |
| 108616 | VK16, VK16, |
| 108617 | /* KORWrr */ |
| 108618 | VK16, VK16, VK16, |
| 108619 | /* KSHIFTLBri */ |
| 108620 | VK8, VK8, u8imm, |
| 108621 | /* KSHIFTLDri */ |
| 108622 | VK32, VK32, u8imm, |
| 108623 | /* KSHIFTLQri */ |
| 108624 | VK64, VK64, u8imm, |
| 108625 | /* KSHIFTLWri */ |
| 108626 | VK16, VK16, u8imm, |
| 108627 | /* KSHIFTRBri */ |
| 108628 | VK8, VK8, u8imm, |
| 108629 | /* KSHIFTRDri */ |
| 108630 | VK32, VK32, u8imm, |
| 108631 | /* KSHIFTRQri */ |
| 108632 | VK64, VK64, u8imm, |
| 108633 | /* KSHIFTRWri */ |
| 108634 | VK16, VK16, u8imm, |
| 108635 | /* KTESTBrr */ |
| 108636 | VK8, VK8, |
| 108637 | /* KTESTDrr */ |
| 108638 | VK32, VK32, |
| 108639 | /* KTESTQrr */ |
| 108640 | VK64, VK64, |
| 108641 | /* KTESTWrr */ |
| 108642 | VK16, VK16, |
| 108643 | /* KUNPCKBWrr */ |
| 108644 | VK16, VK8, VK8, |
| 108645 | /* KUNPCKDQrr */ |
| 108646 | VK64, VK32, VK32, |
| 108647 | /* KUNPCKWDrr */ |
| 108648 | VK32, VK16, VK16, |
| 108649 | /* KXNORBrr */ |
| 108650 | VK8, VK8, VK8, |
| 108651 | /* KXNORDrr */ |
| 108652 | VK32, VK32, VK32, |
| 108653 | /* KXNORQrr */ |
| 108654 | VK64, VK64, VK64, |
| 108655 | /* KXNORWrr */ |
| 108656 | VK16, VK16, VK16, |
| 108657 | /* KXORBrr */ |
| 108658 | VK8, VK8, VK8, |
| 108659 | /* KXORDrr */ |
| 108660 | VK32, VK32, VK32, |
| 108661 | /* KXORQrr */ |
| 108662 | VK64, VK64, VK64, |
| 108663 | /* KXORWrr */ |
| 108664 | VK16, VK16, VK16, |
| 108665 | /* LAHF */ |
| 108666 | /* LAR16rm */ |
| 108667 | GR16, i16mem, |
| 108668 | /* LAR16rr */ |
| 108669 | GR16, GR16orGR32orGR64, |
| 108670 | /* LAR32rm */ |
| 108671 | GR32, i16mem, |
| 108672 | /* LAR32rr */ |
| 108673 | GR32, GR16orGR32orGR64, |
| 108674 | /* LAR64rm */ |
| 108675 | GR64, i16mem, |
| 108676 | /* LAR64rr */ |
| 108677 | GR64, GR16orGR32orGR64, |
| 108678 | /* LCMPXCHG16 */ |
| 108679 | i16mem, GR16, |
| 108680 | /* LCMPXCHG16B */ |
| 108681 | i128mem, |
| 108682 | /* LCMPXCHG32 */ |
| 108683 | i32mem, GR32, |
| 108684 | /* LCMPXCHG64 */ |
| 108685 | i64mem, GR64, |
| 108686 | /* LCMPXCHG8 */ |
| 108687 | i8mem, GR8, |
| 108688 | /* LCMPXCHG8B */ |
| 108689 | i64mem, |
| 108690 | /* LDDQUrm */ |
| 108691 | VR128, i128mem, |
| 108692 | /* LDMXCSR */ |
| 108693 | i32mem, |
| 108694 | /* LDS16rm */ |
| 108695 | GR16, opaquemem, |
| 108696 | /* LDS32rm */ |
| 108697 | GR32, opaquemem, |
| 108698 | /* LDTILECFG */ |
| 108699 | opaquemem, |
| 108700 | /* LDTILECFG_EVEX */ |
| 108701 | opaquemem, |
| 108702 | /* LD_F0 */ |
| 108703 | /* LD_F1 */ |
| 108704 | /* LD_F32m */ |
| 108705 | f32mem, |
| 108706 | /* LD_F64m */ |
| 108707 | f64mem, |
| 108708 | /* LD_F80m */ |
| 108709 | f80mem, |
| 108710 | /* LD_Fp032 */ |
| 108711 | RFP32, |
| 108712 | /* LD_Fp064 */ |
| 108713 | RFP64, |
| 108714 | /* LD_Fp080 */ |
| 108715 | RFP80, |
| 108716 | /* LD_Fp132 */ |
| 108717 | RFP32, |
| 108718 | /* LD_Fp164 */ |
| 108719 | RFP64, |
| 108720 | /* LD_Fp180 */ |
| 108721 | RFP80, |
| 108722 | /* LD_Fp32m */ |
| 108723 | RFP32, f32mem, |
| 108724 | /* LD_Fp32m64 */ |
| 108725 | RFP64, f32mem, |
| 108726 | /* LD_Fp32m80 */ |
| 108727 | RFP80, f32mem, |
| 108728 | /* LD_Fp64m */ |
| 108729 | RFP64, f64mem, |
| 108730 | /* LD_Fp64m80 */ |
| 108731 | RFP80, f64mem, |
| 108732 | /* LD_Fp80m */ |
| 108733 | RFP80, f80mem, |
| 108734 | /* LD_Frr */ |
| 108735 | RSTi, |
| 108736 | /* LEA16r */ |
| 108737 | GR16, anymem, |
| 108738 | /* LEA32r */ |
| 108739 | GR32, anymem, |
| 108740 | /* LEA64_32r */ |
| 108741 | GR32, lea64_32mem, |
| 108742 | /* LEA64r */ |
| 108743 | GR64, lea64mem, |
| 108744 | /* LEAVE */ |
| 108745 | /* LEAVE64 */ |
| 108746 | /* LES16rm */ |
| 108747 | GR16, opaquemem, |
| 108748 | /* LES32rm */ |
| 108749 | GR32, opaquemem, |
| 108750 | /* LFENCE */ |
| 108751 | /* LFS16rm */ |
| 108752 | GR16, opaquemem, |
| 108753 | /* LFS32rm */ |
| 108754 | GR32, opaquemem, |
| 108755 | /* LFS64rm */ |
| 108756 | GR64, opaquemem, |
| 108757 | /* LGDT16m */ |
| 108758 | opaquemem, |
| 108759 | /* LGDT32m */ |
| 108760 | opaquemem, |
| 108761 | /* LGDT64m */ |
| 108762 | opaquemem, |
| 108763 | /* LGS16rm */ |
| 108764 | GR16, opaquemem, |
| 108765 | /* LGS32rm */ |
| 108766 | GR32, opaquemem, |
| 108767 | /* LGS64rm */ |
| 108768 | GR64, opaquemem, |
| 108769 | /* LIDT16m */ |
| 108770 | opaquemem, |
| 108771 | /* LIDT32m */ |
| 108772 | opaquemem, |
| 108773 | /* LIDT64m */ |
| 108774 | opaquemem, |
| 108775 | /* LKGS16m */ |
| 108776 | i16mem, |
| 108777 | /* LKGS16r */ |
| 108778 | GR16, |
| 108779 | /* LLDT16m */ |
| 108780 | i16mem, |
| 108781 | /* LLDT16r */ |
| 108782 | GR16, |
| 108783 | /* LLWPCB */ |
| 108784 | GR32, |
| 108785 | /* LLWPCB64 */ |
| 108786 | GR64, |
| 108787 | /* LMSW16m */ |
| 108788 | i16mem, |
| 108789 | /* LMSW16r */ |
| 108790 | GR16, |
| 108791 | /* LOADIWKEY */ |
| 108792 | VR128, VR128, |
| 108793 | /* LOCK_ADD16mi */ |
| 108794 | i16mem, i16imm, |
| 108795 | /* LOCK_ADD16mi8 */ |
| 108796 | i16mem, i16i8imm, |
| 108797 | /* LOCK_ADD16mr */ |
| 108798 | i16mem, GR16, |
| 108799 | /* LOCK_ADD32mi */ |
| 108800 | i32mem, i32imm, |
| 108801 | /* LOCK_ADD32mi8 */ |
| 108802 | i32mem, i32i8imm, |
| 108803 | /* LOCK_ADD32mr */ |
| 108804 | i32mem, GR32, |
| 108805 | /* LOCK_ADD64mi32 */ |
| 108806 | i64mem, i64i32imm, |
| 108807 | /* LOCK_ADD64mi8 */ |
| 108808 | i64mem, i64i8imm, |
| 108809 | /* LOCK_ADD64mr */ |
| 108810 | i64mem, GR64, |
| 108811 | /* LOCK_ADD8mi */ |
| 108812 | i8mem, i8imm, |
| 108813 | /* LOCK_ADD8mr */ |
| 108814 | i8mem, GR8, |
| 108815 | /* LOCK_AND16mi */ |
| 108816 | i16mem, i16imm, |
| 108817 | /* LOCK_AND16mi8 */ |
| 108818 | i16mem, i16i8imm, |
| 108819 | /* LOCK_AND16mr */ |
| 108820 | i16mem, GR16, |
| 108821 | /* LOCK_AND32mi */ |
| 108822 | i32mem, i32imm, |
| 108823 | /* LOCK_AND32mi8 */ |
| 108824 | i32mem, i32i8imm, |
| 108825 | /* LOCK_AND32mr */ |
| 108826 | i32mem, GR32, |
| 108827 | /* LOCK_AND64mi32 */ |
| 108828 | i64mem, i64i32imm, |
| 108829 | /* LOCK_AND64mi8 */ |
| 108830 | i64mem, i64i8imm, |
| 108831 | /* LOCK_AND64mr */ |
| 108832 | i64mem, GR64, |
| 108833 | /* LOCK_AND8mi */ |
| 108834 | i8mem, i8imm, |
| 108835 | /* LOCK_AND8mr */ |
| 108836 | i8mem, GR8, |
| 108837 | /* LOCK_BTC16m */ |
| 108838 | i16mem, i8imm, |
| 108839 | /* LOCK_BTC32m */ |
| 108840 | i32mem, i8imm, |
| 108841 | /* LOCK_BTC64m */ |
| 108842 | i64mem, i8imm, |
| 108843 | /* LOCK_BTC_RM16rm */ |
| 108844 | i16mem, GR16, |
| 108845 | /* LOCK_BTC_RM32rm */ |
| 108846 | i32mem, GR32, |
| 108847 | /* LOCK_BTC_RM64rm */ |
| 108848 | i64mem, GR64, |
| 108849 | /* LOCK_BTR16m */ |
| 108850 | i16mem, i8imm, |
| 108851 | /* LOCK_BTR32m */ |
| 108852 | i32mem, i8imm, |
| 108853 | /* LOCK_BTR64m */ |
| 108854 | i64mem, i8imm, |
| 108855 | /* LOCK_BTR_RM16rm */ |
| 108856 | i16mem, GR16, |
| 108857 | /* LOCK_BTR_RM32rm */ |
| 108858 | i32mem, GR32, |
| 108859 | /* LOCK_BTR_RM64rm */ |
| 108860 | i64mem, GR64, |
| 108861 | /* LOCK_BTS16m */ |
| 108862 | i16mem, i8imm, |
| 108863 | /* LOCK_BTS32m */ |
| 108864 | i32mem, i8imm, |
| 108865 | /* LOCK_BTS64m */ |
| 108866 | i64mem, i8imm, |
| 108867 | /* LOCK_BTS_RM16rm */ |
| 108868 | i16mem, GR16, |
| 108869 | /* LOCK_BTS_RM32rm */ |
| 108870 | i32mem, GR32, |
| 108871 | /* LOCK_BTS_RM64rm */ |
| 108872 | i64mem, GR64, |
| 108873 | /* LOCK_DEC16m */ |
| 108874 | i16mem, |
| 108875 | /* LOCK_DEC32m */ |
| 108876 | i32mem, |
| 108877 | /* LOCK_DEC64m */ |
| 108878 | i64mem, |
| 108879 | /* LOCK_DEC8m */ |
| 108880 | i8mem, |
| 108881 | /* LOCK_INC16m */ |
| 108882 | i16mem, |
| 108883 | /* LOCK_INC32m */ |
| 108884 | i32mem, |
| 108885 | /* LOCK_INC64m */ |
| 108886 | i64mem, |
| 108887 | /* LOCK_INC8m */ |
| 108888 | i8mem, |
| 108889 | /* LOCK_OR16mi */ |
| 108890 | i16mem, i16imm, |
| 108891 | /* LOCK_OR16mi8 */ |
| 108892 | i16mem, i16i8imm, |
| 108893 | /* LOCK_OR16mr */ |
| 108894 | i16mem, GR16, |
| 108895 | /* LOCK_OR32mi */ |
| 108896 | i32mem, i32imm, |
| 108897 | /* LOCK_OR32mi8 */ |
| 108898 | i32mem, i32i8imm, |
| 108899 | /* LOCK_OR32mr */ |
| 108900 | i32mem, GR32, |
| 108901 | /* LOCK_OR64mi32 */ |
| 108902 | i64mem, i64i32imm, |
| 108903 | /* LOCK_OR64mi8 */ |
| 108904 | i64mem, i64i8imm, |
| 108905 | /* LOCK_OR64mr */ |
| 108906 | i64mem, GR64, |
| 108907 | /* LOCK_OR8mi */ |
| 108908 | i8mem, i8imm, |
| 108909 | /* LOCK_OR8mr */ |
| 108910 | i8mem, GR8, |
| 108911 | /* LOCK_PREFIX */ |
| 108912 | /* LOCK_SUB16mi */ |
| 108913 | i16mem, i16imm, |
| 108914 | /* LOCK_SUB16mi8 */ |
| 108915 | i16mem, i16i8imm, |
| 108916 | /* LOCK_SUB16mr */ |
| 108917 | i16mem, GR16, |
| 108918 | /* LOCK_SUB32mi */ |
| 108919 | i32mem, i32imm, |
| 108920 | /* LOCK_SUB32mi8 */ |
| 108921 | i32mem, i32i8imm, |
| 108922 | /* LOCK_SUB32mr */ |
| 108923 | i32mem, GR32, |
| 108924 | /* LOCK_SUB64mi32 */ |
| 108925 | i64mem, i64i32imm, |
| 108926 | /* LOCK_SUB64mi8 */ |
| 108927 | i64mem, i64i8imm, |
| 108928 | /* LOCK_SUB64mr */ |
| 108929 | i64mem, GR64, |
| 108930 | /* LOCK_SUB8mi */ |
| 108931 | i8mem, i8imm, |
| 108932 | /* LOCK_SUB8mr */ |
| 108933 | i8mem, GR8, |
| 108934 | /* LOCK_XOR16mi */ |
| 108935 | i16mem, i16imm, |
| 108936 | /* LOCK_XOR16mi8 */ |
| 108937 | i16mem, i16i8imm, |
| 108938 | /* LOCK_XOR16mr */ |
| 108939 | i16mem, GR16, |
| 108940 | /* LOCK_XOR32mi */ |
| 108941 | i32mem, i32imm, |
| 108942 | /* LOCK_XOR32mi8 */ |
| 108943 | i32mem, i32i8imm, |
| 108944 | /* LOCK_XOR32mr */ |
| 108945 | i32mem, GR32, |
| 108946 | /* LOCK_XOR64mi32 */ |
| 108947 | i64mem, i64i32imm, |
| 108948 | /* LOCK_XOR64mi8 */ |
| 108949 | i64mem, i64i8imm, |
| 108950 | /* LOCK_XOR64mr */ |
| 108951 | i64mem, GR64, |
| 108952 | /* LOCK_XOR8mi */ |
| 108953 | i8mem, i8imm, |
| 108954 | /* LOCK_XOR8mr */ |
| 108955 | i8mem, GR8, |
| 108956 | /* LODSB */ |
| 108957 | srcidx8, |
| 108958 | /* LODSL */ |
| 108959 | srcidx32, |
| 108960 | /* LODSQ */ |
| 108961 | srcidx64, |
| 108962 | /* LODSW */ |
| 108963 | srcidx16, |
| 108964 | /* LOOP */ |
| 108965 | brtarget8, |
| 108966 | /* LOOPE */ |
| 108967 | brtarget8, |
| 108968 | /* LOOPNE */ |
| 108969 | brtarget8, |
| 108970 | /* LRET16 */ |
| 108971 | /* LRET32 */ |
| 108972 | /* LRET64 */ |
| 108973 | /* LRETI16 */ |
| 108974 | i16imm, |
| 108975 | /* LRETI32 */ |
| 108976 | i16imm, |
| 108977 | /* LRETI64 */ |
| 108978 | i16imm, |
| 108979 | /* LSL16rm */ |
| 108980 | GR16, i16mem, |
| 108981 | /* LSL16rr */ |
| 108982 | GR16, GR16orGR32orGR64, |
| 108983 | /* LSL32rm */ |
| 108984 | GR32, i16mem, |
| 108985 | /* LSL32rr */ |
| 108986 | GR32, GR16orGR32orGR64, |
| 108987 | /* LSL64rm */ |
| 108988 | GR64, i16mem, |
| 108989 | /* LSL64rr */ |
| 108990 | GR64, GR16orGR32orGR64, |
| 108991 | /* LSS16rm */ |
| 108992 | GR16, opaquemem, |
| 108993 | /* LSS32rm */ |
| 108994 | GR32, opaquemem, |
| 108995 | /* LSS64rm */ |
| 108996 | GR64, opaquemem, |
| 108997 | /* LTRm */ |
| 108998 | i16mem, |
| 108999 | /* LTRr */ |
| 109000 | GR16, |
| 109001 | /* LWPINS32rmi */ |
| 109002 | GR32, i32mem, i32imm, |
| 109003 | /* LWPINS32rri */ |
| 109004 | GR32, GR32, i32imm, |
| 109005 | /* LWPINS64rmi */ |
| 109006 | GR64, i32mem, i32imm, |
| 109007 | /* LWPINS64rri */ |
| 109008 | GR64, GR32, i32imm, |
| 109009 | /* LWPVAL32rmi */ |
| 109010 | GR32, i32mem, i32imm, |
| 109011 | /* LWPVAL32rri */ |
| 109012 | GR32, GR32, i32imm, |
| 109013 | /* LWPVAL64rmi */ |
| 109014 | GR64, i32mem, i32imm, |
| 109015 | /* LWPVAL64rri */ |
| 109016 | GR64, GR32, i32imm, |
| 109017 | /* LXADD16 */ |
| 109018 | GR16, GR16, i16mem, |
| 109019 | /* LXADD32 */ |
| 109020 | GR32, GR32, i32mem, |
| 109021 | /* LXADD64 */ |
| 109022 | GR64, GR64, i64mem, |
| 109023 | /* LXADD8 */ |
| 109024 | GR8, GR8, i8mem, |
| 109025 | /* LZCNT16rm */ |
| 109026 | GR16, i16mem, |
| 109027 | /* LZCNT16rm_EVEX */ |
| 109028 | GR16, i16mem, |
| 109029 | /* LZCNT16rm_NF */ |
| 109030 | GR16, i16mem, |
| 109031 | /* LZCNT16rr */ |
| 109032 | GR16, GR16, |
| 109033 | /* LZCNT16rr_EVEX */ |
| 109034 | GR16, GR16, |
| 109035 | /* LZCNT16rr_NF */ |
| 109036 | GR16, GR16, |
| 109037 | /* LZCNT32rm */ |
| 109038 | GR32, i32mem, |
| 109039 | /* LZCNT32rm_EVEX */ |
| 109040 | GR32, i32mem, |
| 109041 | /* LZCNT32rm_NF */ |
| 109042 | GR32, i32mem, |
| 109043 | /* LZCNT32rr */ |
| 109044 | GR32, GR32, |
| 109045 | /* LZCNT32rr_EVEX */ |
| 109046 | GR32, GR32, |
| 109047 | /* LZCNT32rr_NF */ |
| 109048 | GR32, GR32, |
| 109049 | /* LZCNT64rm */ |
| 109050 | GR64, i64mem, |
| 109051 | /* LZCNT64rm_EVEX */ |
| 109052 | GR64, i64mem, |
| 109053 | /* LZCNT64rm_NF */ |
| 109054 | GR64, i64mem, |
| 109055 | /* LZCNT64rr */ |
| 109056 | GR64, GR64, |
| 109057 | /* LZCNT64rr_EVEX */ |
| 109058 | GR64, GR64, |
| 109059 | /* LZCNT64rr_NF */ |
| 109060 | GR64, GR64, |
| 109061 | /* MASKMOVDQU */ |
| 109062 | VR128, VR128, |
| 109063 | /* MASKMOVDQU64 */ |
| 109064 | VR128, VR128, |
| 109065 | /* MASKPAIR16LOAD */ |
| 109066 | VK16PAIR, anymem, |
| 109067 | /* MASKPAIR16STORE */ |
| 109068 | anymem, VK16PAIR, |
| 109069 | /* MAXCPDrm */ |
| 109070 | VR128, VR128, f128mem, |
| 109071 | /* MAXCPDrr */ |
| 109072 | VR128, VR128, VR128, |
| 109073 | /* MAXCPSrm */ |
| 109074 | VR128, VR128, f128mem, |
| 109075 | /* MAXCPSrr */ |
| 109076 | VR128, VR128, VR128, |
| 109077 | /* MAXCSDrm */ |
| 109078 | FR64, FR64, f64mem, |
| 109079 | /* MAXCSDrr */ |
| 109080 | FR64, FR64, FR64, |
| 109081 | /* MAXCSSrm */ |
| 109082 | FR32, FR32, f32mem, |
| 109083 | /* MAXCSSrr */ |
| 109084 | FR32, FR32, FR32, |
| 109085 | /* MAXPDrm */ |
| 109086 | VR128, VR128, f128mem, |
| 109087 | /* MAXPDrr */ |
| 109088 | VR128, VR128, VR128, |
| 109089 | /* MAXPSrm */ |
| 109090 | VR128, VR128, f128mem, |
| 109091 | /* MAXPSrr */ |
| 109092 | VR128, VR128, VR128, |
| 109093 | /* MAXSDrm */ |
| 109094 | FR64, FR64, f64mem, |
| 109095 | /* MAXSDrm_Int */ |
| 109096 | VR128, VR128, sdmem, |
| 109097 | /* MAXSDrr */ |
| 109098 | FR64, FR64, FR64, |
| 109099 | /* MAXSDrr_Int */ |
| 109100 | VR128, VR128, VR128, |
| 109101 | /* MAXSSrm */ |
| 109102 | FR32, FR32, f32mem, |
| 109103 | /* MAXSSrm_Int */ |
| 109104 | VR128, VR128, ssmem, |
| 109105 | /* MAXSSrr */ |
| 109106 | FR32, FR32, FR32, |
| 109107 | /* MAXSSrr_Int */ |
| 109108 | VR128, VR128, VR128, |
| 109109 | /* MFENCE */ |
| 109110 | /* MINCPDrm */ |
| 109111 | VR128, VR128, f128mem, |
| 109112 | /* MINCPDrr */ |
| 109113 | VR128, VR128, VR128, |
| 109114 | /* MINCPSrm */ |
| 109115 | VR128, VR128, f128mem, |
| 109116 | /* MINCPSrr */ |
| 109117 | VR128, VR128, VR128, |
| 109118 | /* MINCSDrm */ |
| 109119 | FR64, FR64, f64mem, |
| 109120 | /* MINCSDrr */ |
| 109121 | FR64, FR64, FR64, |
| 109122 | /* MINCSSrm */ |
| 109123 | FR32, FR32, f32mem, |
| 109124 | /* MINCSSrr */ |
| 109125 | FR32, FR32, FR32, |
| 109126 | /* MINPDrm */ |
| 109127 | VR128, VR128, f128mem, |
| 109128 | /* MINPDrr */ |
| 109129 | VR128, VR128, VR128, |
| 109130 | /* MINPSrm */ |
| 109131 | VR128, VR128, f128mem, |
| 109132 | /* MINPSrr */ |
| 109133 | VR128, VR128, VR128, |
| 109134 | /* MINSDrm */ |
| 109135 | FR64, FR64, f64mem, |
| 109136 | /* MINSDrm_Int */ |
| 109137 | VR128, VR128, sdmem, |
| 109138 | /* MINSDrr */ |
| 109139 | FR64, FR64, FR64, |
| 109140 | /* MINSDrr_Int */ |
| 109141 | VR128, VR128, VR128, |
| 109142 | /* MINSSrm */ |
| 109143 | FR32, FR32, f32mem, |
| 109144 | /* MINSSrm_Int */ |
| 109145 | VR128, VR128, ssmem, |
| 109146 | /* MINSSrr */ |
| 109147 | FR32, FR32, FR32, |
| 109148 | /* MINSSrr_Int */ |
| 109149 | VR128, VR128, VR128, |
| 109150 | /* MMX_CVTPD2PIrm */ |
| 109151 | VR64, f128mem, |
| 109152 | /* MMX_CVTPD2PIrr */ |
| 109153 | VR64, VR128, |
| 109154 | /* MMX_CVTPI2PDrm */ |
| 109155 | VR128, i64mem, |
| 109156 | /* MMX_CVTPI2PDrr */ |
| 109157 | VR128, VR64, |
| 109158 | /* MMX_CVTPI2PSrm */ |
| 109159 | VR128, VR128, i64mem, |
| 109160 | /* MMX_CVTPI2PSrr */ |
| 109161 | VR128, VR128, VR64, |
| 109162 | /* MMX_CVTPS2PIrm */ |
| 109163 | VR64, f64mem, |
| 109164 | /* MMX_CVTPS2PIrr */ |
| 109165 | VR64, VR128, |
| 109166 | /* MMX_CVTTPD2PIrm */ |
| 109167 | VR64, f128mem, |
| 109168 | /* MMX_CVTTPD2PIrr */ |
| 109169 | VR64, VR128, |
| 109170 | /* MMX_CVTTPS2PIrm */ |
| 109171 | VR64, f64mem, |
| 109172 | /* MMX_CVTTPS2PIrr */ |
| 109173 | VR64, VR128, |
| 109174 | /* MMX_EMMS */ |
| 109175 | /* MMX_MASKMOVQ */ |
| 109176 | VR64, VR64, |
| 109177 | /* MMX_MASKMOVQ64 */ |
| 109178 | VR64, VR64, |
| 109179 | /* MMX_MOVD64from64mr */ |
| 109180 | i64mem, VR64, |
| 109181 | /* MMX_MOVD64from64rr */ |
| 109182 | GR64, VR64, |
| 109183 | /* MMX_MOVD64grr */ |
| 109184 | GR32, VR64, |
| 109185 | /* MMX_MOVD64mr */ |
| 109186 | i32mem, VR64, |
| 109187 | /* MMX_MOVD64rm */ |
| 109188 | VR64, i32mem, |
| 109189 | /* MMX_MOVD64rr */ |
| 109190 | VR64, GR32, |
| 109191 | /* MMX_MOVD64to64rm */ |
| 109192 | VR64, i64mem, |
| 109193 | /* MMX_MOVD64to64rr */ |
| 109194 | VR64, GR64, |
| 109195 | /* MMX_MOVDQ2Qrr */ |
| 109196 | VR64, VR128, |
| 109197 | /* MMX_MOVFR642Qrr */ |
| 109198 | VR64, FR64, |
| 109199 | /* MMX_MOVNTQmr */ |
| 109200 | i64mem, VR64, |
| 109201 | /* MMX_MOVQ2DQrr */ |
| 109202 | VR128, VR64, |
| 109203 | /* MMX_MOVQ2FR64rr */ |
| 109204 | FR64, VR64, |
| 109205 | /* MMX_MOVQ64mr */ |
| 109206 | i64mem, VR64, |
| 109207 | /* MMX_MOVQ64rm */ |
| 109208 | VR64, i64mem, |
| 109209 | /* MMX_MOVQ64rr */ |
| 109210 | VR64, VR64, |
| 109211 | /* MMX_MOVQ64rr_REV */ |
| 109212 | VR64, VR64, |
| 109213 | /* MMX_PABSBrm */ |
| 109214 | VR64, i64mem, |
| 109215 | /* MMX_PABSBrr */ |
| 109216 | VR64, VR64, |
| 109217 | /* MMX_PABSDrm */ |
| 109218 | VR64, i64mem, |
| 109219 | /* MMX_PABSDrr */ |
| 109220 | VR64, VR64, |
| 109221 | /* MMX_PABSWrm */ |
| 109222 | VR64, i64mem, |
| 109223 | /* MMX_PABSWrr */ |
| 109224 | VR64, VR64, |
| 109225 | /* MMX_PACKSSDWrm */ |
| 109226 | VR64, VR64, i64mem, |
| 109227 | /* MMX_PACKSSDWrr */ |
| 109228 | VR64, VR64, VR64, |
| 109229 | /* MMX_PACKSSWBrm */ |
| 109230 | VR64, VR64, i64mem, |
| 109231 | /* MMX_PACKSSWBrr */ |
| 109232 | VR64, VR64, VR64, |
| 109233 | /* MMX_PACKUSWBrm */ |
| 109234 | VR64, VR64, i64mem, |
| 109235 | /* MMX_PACKUSWBrr */ |
| 109236 | VR64, VR64, VR64, |
| 109237 | /* MMX_PADDBrm */ |
| 109238 | VR64, VR64, i64mem, |
| 109239 | /* MMX_PADDBrr */ |
| 109240 | VR64, VR64, VR64, |
| 109241 | /* MMX_PADDDrm */ |
| 109242 | VR64, VR64, i64mem, |
| 109243 | /* MMX_PADDDrr */ |
| 109244 | VR64, VR64, VR64, |
| 109245 | /* MMX_PADDQrm */ |
| 109246 | VR64, VR64, i64mem, |
| 109247 | /* MMX_PADDQrr */ |
| 109248 | VR64, VR64, VR64, |
| 109249 | /* MMX_PADDSBrm */ |
| 109250 | VR64, VR64, i64mem, |
| 109251 | /* MMX_PADDSBrr */ |
| 109252 | VR64, VR64, VR64, |
| 109253 | /* MMX_PADDSWrm */ |
| 109254 | VR64, VR64, i64mem, |
| 109255 | /* MMX_PADDSWrr */ |
| 109256 | VR64, VR64, VR64, |
| 109257 | /* MMX_PADDUSBrm */ |
| 109258 | VR64, VR64, i64mem, |
| 109259 | /* MMX_PADDUSBrr */ |
| 109260 | VR64, VR64, VR64, |
| 109261 | /* MMX_PADDUSWrm */ |
| 109262 | VR64, VR64, i64mem, |
| 109263 | /* MMX_PADDUSWrr */ |
| 109264 | VR64, VR64, VR64, |
| 109265 | /* MMX_PADDWrm */ |
| 109266 | VR64, VR64, i64mem, |
| 109267 | /* MMX_PADDWrr */ |
| 109268 | VR64, VR64, VR64, |
| 109269 | /* MMX_PALIGNRrmi */ |
| 109270 | VR64, VR64, i64mem, u8imm, |
| 109271 | /* MMX_PALIGNRrri */ |
| 109272 | VR64, VR64, VR64, u8imm, |
| 109273 | /* MMX_PANDNrm */ |
| 109274 | VR64, VR64, i64mem, |
| 109275 | /* MMX_PANDNrr */ |
| 109276 | VR64, VR64, VR64, |
| 109277 | /* MMX_PANDrm */ |
| 109278 | VR64, VR64, i64mem, |
| 109279 | /* MMX_PANDrr */ |
| 109280 | VR64, VR64, VR64, |
| 109281 | /* MMX_PAVGBrm */ |
| 109282 | VR64, VR64, i64mem, |
| 109283 | /* MMX_PAVGBrr */ |
| 109284 | VR64, VR64, VR64, |
| 109285 | /* MMX_PAVGWrm */ |
| 109286 | VR64, VR64, i64mem, |
| 109287 | /* MMX_PAVGWrr */ |
| 109288 | VR64, VR64, VR64, |
| 109289 | /* MMX_PCMPEQBrm */ |
| 109290 | VR64, VR64, i64mem, |
| 109291 | /* MMX_PCMPEQBrr */ |
| 109292 | VR64, VR64, VR64, |
| 109293 | /* MMX_PCMPEQDrm */ |
| 109294 | VR64, VR64, i64mem, |
| 109295 | /* MMX_PCMPEQDrr */ |
| 109296 | VR64, VR64, VR64, |
| 109297 | /* MMX_PCMPEQWrm */ |
| 109298 | VR64, VR64, i64mem, |
| 109299 | /* MMX_PCMPEQWrr */ |
| 109300 | VR64, VR64, VR64, |
| 109301 | /* MMX_PCMPGTBrm */ |
| 109302 | VR64, VR64, i64mem, |
| 109303 | /* MMX_PCMPGTBrr */ |
| 109304 | VR64, VR64, VR64, |
| 109305 | /* MMX_PCMPGTDrm */ |
| 109306 | VR64, VR64, i64mem, |
| 109307 | /* MMX_PCMPGTDrr */ |
| 109308 | VR64, VR64, VR64, |
| 109309 | /* MMX_PCMPGTWrm */ |
| 109310 | VR64, VR64, i64mem, |
| 109311 | /* MMX_PCMPGTWrr */ |
| 109312 | VR64, VR64, VR64, |
| 109313 | /* MMX_PEXTRWrr */ |
| 109314 | GR32orGR64, VR64, i32u8imm, |
| 109315 | /* MMX_PHADDDrm */ |
| 109316 | VR64, VR64, i64mem, |
| 109317 | /* MMX_PHADDDrr */ |
| 109318 | VR64, VR64, VR64, |
| 109319 | /* MMX_PHADDSWrm */ |
| 109320 | VR64, VR64, i64mem, |
| 109321 | /* MMX_PHADDSWrr */ |
| 109322 | VR64, VR64, VR64, |
| 109323 | /* MMX_PHADDWrm */ |
| 109324 | VR64, VR64, i64mem, |
| 109325 | /* MMX_PHADDWrr */ |
| 109326 | VR64, VR64, VR64, |
| 109327 | /* MMX_PHSUBDrm */ |
| 109328 | VR64, VR64, i64mem, |
| 109329 | /* MMX_PHSUBDrr */ |
| 109330 | VR64, VR64, VR64, |
| 109331 | /* MMX_PHSUBSWrm */ |
| 109332 | VR64, VR64, i64mem, |
| 109333 | /* MMX_PHSUBSWrr */ |
| 109334 | VR64, VR64, VR64, |
| 109335 | /* MMX_PHSUBWrm */ |
| 109336 | VR64, VR64, i64mem, |
| 109337 | /* MMX_PHSUBWrr */ |
| 109338 | VR64, VR64, VR64, |
| 109339 | /* MMX_PINSRWrm */ |
| 109340 | VR64, VR64, i16mem, i32u8imm, |
| 109341 | /* MMX_PINSRWrr */ |
| 109342 | VR64, VR64, GR32orGR64, i32u8imm, |
| 109343 | /* MMX_PMADDUBSWrm */ |
| 109344 | VR64, VR64, i64mem, |
| 109345 | /* MMX_PMADDUBSWrr */ |
| 109346 | VR64, VR64, VR64, |
| 109347 | /* MMX_PMADDWDrm */ |
| 109348 | VR64, VR64, i64mem, |
| 109349 | /* MMX_PMADDWDrr */ |
| 109350 | VR64, VR64, VR64, |
| 109351 | /* MMX_PMAXSWrm */ |
| 109352 | VR64, VR64, i64mem, |
| 109353 | /* MMX_PMAXSWrr */ |
| 109354 | VR64, VR64, VR64, |
| 109355 | /* MMX_PMAXUBrm */ |
| 109356 | VR64, VR64, i64mem, |
| 109357 | /* MMX_PMAXUBrr */ |
| 109358 | VR64, VR64, VR64, |
| 109359 | /* MMX_PMINSWrm */ |
| 109360 | VR64, VR64, i64mem, |
| 109361 | /* MMX_PMINSWrr */ |
| 109362 | VR64, VR64, VR64, |
| 109363 | /* MMX_PMINUBrm */ |
| 109364 | VR64, VR64, i64mem, |
| 109365 | /* MMX_PMINUBrr */ |
| 109366 | VR64, VR64, VR64, |
| 109367 | /* MMX_PMOVMSKBrr */ |
| 109368 | GR32orGR64, VR64, |
| 109369 | /* MMX_PMULHRSWrm */ |
| 109370 | VR64, VR64, i64mem, |
| 109371 | /* MMX_PMULHRSWrr */ |
| 109372 | VR64, VR64, VR64, |
| 109373 | /* MMX_PMULHUWrm */ |
| 109374 | VR64, VR64, i64mem, |
| 109375 | /* MMX_PMULHUWrr */ |
| 109376 | VR64, VR64, VR64, |
| 109377 | /* MMX_PMULHWrm */ |
| 109378 | VR64, VR64, i64mem, |
| 109379 | /* MMX_PMULHWrr */ |
| 109380 | VR64, VR64, VR64, |
| 109381 | /* MMX_PMULLWrm */ |
| 109382 | VR64, VR64, i64mem, |
| 109383 | /* MMX_PMULLWrr */ |
| 109384 | VR64, VR64, VR64, |
| 109385 | /* MMX_PMULUDQrm */ |
| 109386 | VR64, VR64, i64mem, |
| 109387 | /* MMX_PMULUDQrr */ |
| 109388 | VR64, VR64, VR64, |
| 109389 | /* MMX_PORrm */ |
| 109390 | VR64, VR64, i64mem, |
| 109391 | /* MMX_PORrr */ |
| 109392 | VR64, VR64, VR64, |
| 109393 | /* MMX_PSADBWrm */ |
| 109394 | VR64, VR64, i64mem, |
| 109395 | /* MMX_PSADBWrr */ |
| 109396 | VR64, VR64, VR64, |
| 109397 | /* MMX_PSHUFBrm */ |
| 109398 | VR64, VR64, i64mem, |
| 109399 | /* MMX_PSHUFBrr */ |
| 109400 | VR64, VR64, VR64, |
| 109401 | /* MMX_PSHUFWmi */ |
| 109402 | VR64, i64mem, u8imm, |
| 109403 | /* MMX_PSHUFWri */ |
| 109404 | VR64, VR64, u8imm, |
| 109405 | /* MMX_PSIGNBrm */ |
| 109406 | VR64, VR64, i64mem, |
| 109407 | /* MMX_PSIGNBrr */ |
| 109408 | VR64, VR64, VR64, |
| 109409 | /* MMX_PSIGNDrm */ |
| 109410 | VR64, VR64, i64mem, |
| 109411 | /* MMX_PSIGNDrr */ |
| 109412 | VR64, VR64, VR64, |
| 109413 | /* MMX_PSIGNWrm */ |
| 109414 | VR64, VR64, i64mem, |
| 109415 | /* MMX_PSIGNWrr */ |
| 109416 | VR64, VR64, VR64, |
| 109417 | /* MMX_PSLLDri */ |
| 109418 | VR64, VR64, i32u8imm, |
| 109419 | /* MMX_PSLLDrm */ |
| 109420 | VR64, VR64, i64mem, |
| 109421 | /* MMX_PSLLDrr */ |
| 109422 | VR64, VR64, VR64, |
| 109423 | /* MMX_PSLLQri */ |
| 109424 | VR64, VR64, i32u8imm, |
| 109425 | /* MMX_PSLLQrm */ |
| 109426 | VR64, VR64, i64mem, |
| 109427 | /* MMX_PSLLQrr */ |
| 109428 | VR64, VR64, VR64, |
| 109429 | /* MMX_PSLLWri */ |
| 109430 | VR64, VR64, i32u8imm, |
| 109431 | /* MMX_PSLLWrm */ |
| 109432 | VR64, VR64, i64mem, |
| 109433 | /* MMX_PSLLWrr */ |
| 109434 | VR64, VR64, VR64, |
| 109435 | /* MMX_PSRADri */ |
| 109436 | VR64, VR64, i32u8imm, |
| 109437 | /* MMX_PSRADrm */ |
| 109438 | VR64, VR64, i64mem, |
| 109439 | /* MMX_PSRADrr */ |
| 109440 | VR64, VR64, VR64, |
| 109441 | /* MMX_PSRAWri */ |
| 109442 | VR64, VR64, i32u8imm, |
| 109443 | /* MMX_PSRAWrm */ |
| 109444 | VR64, VR64, i64mem, |
| 109445 | /* MMX_PSRAWrr */ |
| 109446 | VR64, VR64, VR64, |
| 109447 | /* MMX_PSRLDri */ |
| 109448 | VR64, VR64, i32u8imm, |
| 109449 | /* MMX_PSRLDrm */ |
| 109450 | VR64, VR64, i64mem, |
| 109451 | /* MMX_PSRLDrr */ |
| 109452 | VR64, VR64, VR64, |
| 109453 | /* MMX_PSRLQri */ |
| 109454 | VR64, VR64, i32u8imm, |
| 109455 | /* MMX_PSRLQrm */ |
| 109456 | VR64, VR64, i64mem, |
| 109457 | /* MMX_PSRLQrr */ |
| 109458 | VR64, VR64, VR64, |
| 109459 | /* MMX_PSRLWri */ |
| 109460 | VR64, VR64, i32u8imm, |
| 109461 | /* MMX_PSRLWrm */ |
| 109462 | VR64, VR64, i64mem, |
| 109463 | /* MMX_PSRLWrr */ |
| 109464 | VR64, VR64, VR64, |
| 109465 | /* MMX_PSUBBrm */ |
| 109466 | VR64, VR64, i64mem, |
| 109467 | /* MMX_PSUBBrr */ |
| 109468 | VR64, VR64, VR64, |
| 109469 | /* MMX_PSUBDrm */ |
| 109470 | VR64, VR64, i64mem, |
| 109471 | /* MMX_PSUBDrr */ |
| 109472 | VR64, VR64, VR64, |
| 109473 | /* MMX_PSUBQrm */ |
| 109474 | VR64, VR64, i64mem, |
| 109475 | /* MMX_PSUBQrr */ |
| 109476 | VR64, VR64, VR64, |
| 109477 | /* MMX_PSUBSBrm */ |
| 109478 | VR64, VR64, i64mem, |
| 109479 | /* MMX_PSUBSBrr */ |
| 109480 | VR64, VR64, VR64, |
| 109481 | /* MMX_PSUBSWrm */ |
| 109482 | VR64, VR64, i64mem, |
| 109483 | /* MMX_PSUBSWrr */ |
| 109484 | VR64, VR64, VR64, |
| 109485 | /* MMX_PSUBUSBrm */ |
| 109486 | VR64, VR64, i64mem, |
| 109487 | /* MMX_PSUBUSBrr */ |
| 109488 | VR64, VR64, VR64, |
| 109489 | /* MMX_PSUBUSWrm */ |
| 109490 | VR64, VR64, i64mem, |
| 109491 | /* MMX_PSUBUSWrr */ |
| 109492 | VR64, VR64, VR64, |
| 109493 | /* MMX_PSUBWrm */ |
| 109494 | VR64, VR64, i64mem, |
| 109495 | /* MMX_PSUBWrr */ |
| 109496 | VR64, VR64, VR64, |
| 109497 | /* MMX_PUNPCKHBWrm */ |
| 109498 | VR64, VR64, i64mem, |
| 109499 | /* MMX_PUNPCKHBWrr */ |
| 109500 | VR64, VR64, VR64, |
| 109501 | /* MMX_PUNPCKHDQrm */ |
| 109502 | VR64, VR64, i64mem, |
| 109503 | /* MMX_PUNPCKHDQrr */ |
| 109504 | VR64, VR64, VR64, |
| 109505 | /* MMX_PUNPCKHWDrm */ |
| 109506 | VR64, VR64, i64mem, |
| 109507 | /* MMX_PUNPCKHWDrr */ |
| 109508 | VR64, VR64, VR64, |
| 109509 | /* MMX_PUNPCKLBWrm */ |
| 109510 | VR64, VR64, i32mem, |
| 109511 | /* MMX_PUNPCKLBWrr */ |
| 109512 | VR64, VR64, VR64, |
| 109513 | /* MMX_PUNPCKLDQrm */ |
| 109514 | VR64, VR64, i32mem, |
| 109515 | /* MMX_PUNPCKLDQrr */ |
| 109516 | VR64, VR64, VR64, |
| 109517 | /* MMX_PUNPCKLWDrm */ |
| 109518 | VR64, VR64, i32mem, |
| 109519 | /* MMX_PUNPCKLWDrr */ |
| 109520 | VR64, VR64, VR64, |
| 109521 | /* MMX_PXORrm */ |
| 109522 | VR64, VR64, i64mem, |
| 109523 | /* MMX_PXORrr */ |
| 109524 | VR64, VR64, VR64, |
| 109525 | /* MONITOR32rrr */ |
| 109526 | /* MONITOR64rrr */ |
| 109527 | /* MONITORX32rrr */ |
| 109528 | /* MONITORX64rrr */ |
| 109529 | /* MONTMUL */ |
| 109530 | /* MOV16ao16 */ |
| 109531 | offset16_16, |
| 109532 | /* MOV16ao32 */ |
| 109533 | offset32_16, |
| 109534 | /* MOV16ao64 */ |
| 109535 | offset64_16, |
| 109536 | /* MOV16mi */ |
| 109537 | i16mem, i16imm, |
| 109538 | /* MOV16mr */ |
| 109539 | i16mem, GR16, |
| 109540 | /* MOV16ms */ |
| 109541 | i16mem, SEGMENT_REG, |
| 109542 | /* MOV16o16a */ |
| 109543 | offset16_16, |
| 109544 | /* MOV16o32a */ |
| 109545 | offset32_16, |
| 109546 | /* MOV16o64a */ |
| 109547 | offset64_16, |
| 109548 | /* MOV16ri */ |
| 109549 | GR16, i16imm, |
| 109550 | /* MOV16ri_alt */ |
| 109551 | GR16, i16imm, |
| 109552 | /* MOV16rm */ |
| 109553 | GR16, i16mem, |
| 109554 | /* MOV16rr */ |
| 109555 | GR16, GR16, |
| 109556 | /* MOV16rr_REV */ |
| 109557 | GR16, GR16, |
| 109558 | /* MOV16rs */ |
| 109559 | GR16, SEGMENT_REG, |
| 109560 | /* MOV16sm */ |
| 109561 | SEGMENT_REG, i16mem, |
| 109562 | /* MOV16sr */ |
| 109563 | SEGMENT_REG, GR16, |
| 109564 | /* MOV32ao16 */ |
| 109565 | offset16_32, |
| 109566 | /* MOV32ao32 */ |
| 109567 | offset32_32, |
| 109568 | /* MOV32ao64 */ |
| 109569 | offset64_32, |
| 109570 | /* MOV32cr */ |
| 109571 | CONTROL_REG, GR32, |
| 109572 | /* MOV32dr */ |
| 109573 | DEBUG_REG, GR32, |
| 109574 | /* MOV32mi */ |
| 109575 | i32mem, i32imm, |
| 109576 | /* MOV32mr */ |
| 109577 | i32mem, GR32, |
| 109578 | /* MOV32o16a */ |
| 109579 | offset16_32, |
| 109580 | /* MOV32o32a */ |
| 109581 | offset32_32, |
| 109582 | /* MOV32o64a */ |
| 109583 | offset64_32, |
| 109584 | /* MOV32rc */ |
| 109585 | GR32, CONTROL_REG, |
| 109586 | /* MOV32rd */ |
| 109587 | GR32, DEBUG_REG, |
| 109588 | /* MOV32ri */ |
| 109589 | GR32, i32imm, |
| 109590 | /* MOV32ri_alt */ |
| 109591 | GR32, i32imm, |
| 109592 | /* MOV32rm */ |
| 109593 | GR32, i32mem, |
| 109594 | /* MOV32rr */ |
| 109595 | GR32, GR32, |
| 109596 | /* MOV32rr_REV */ |
| 109597 | GR32, GR32, |
| 109598 | /* MOV32rs */ |
| 109599 | GR32, SEGMENT_REG, |
| 109600 | /* MOV32sr */ |
| 109601 | SEGMENT_REG, GR32, |
| 109602 | /* MOV64ao32 */ |
| 109603 | offset32_64, |
| 109604 | /* MOV64ao64 */ |
| 109605 | offset64_64, |
| 109606 | /* MOV64cr */ |
| 109607 | CONTROL_REG, GR64, |
| 109608 | /* MOV64dr */ |
| 109609 | DEBUG_REG, GR64, |
| 109610 | /* MOV64mi32 */ |
| 109611 | i64mem, i64i32imm, |
| 109612 | /* MOV64mr */ |
| 109613 | i64mem, GR64, |
| 109614 | /* MOV64o32a */ |
| 109615 | offset32_64, |
| 109616 | /* MOV64o64a */ |
| 109617 | offset64_64, |
| 109618 | /* MOV64rc */ |
| 109619 | GR64, CONTROL_REG, |
| 109620 | /* MOV64rd */ |
| 109621 | GR64, DEBUG_REG, |
| 109622 | /* MOV64ri */ |
| 109623 | GR64, i64imm, |
| 109624 | /* MOV64ri32 */ |
| 109625 | GR64, i64i32imm, |
| 109626 | /* MOV64rm */ |
| 109627 | GR64, i64mem, |
| 109628 | /* MOV64rr */ |
| 109629 | GR64, GR64, |
| 109630 | /* MOV64rr_REV */ |
| 109631 | GR64, GR64, |
| 109632 | /* MOV64rs */ |
| 109633 | GR64, SEGMENT_REG, |
| 109634 | /* MOV64sr */ |
| 109635 | SEGMENT_REG, GR64, |
| 109636 | /* MOV64toPQIrm */ |
| 109637 | VR128, i64mem, |
| 109638 | /* MOV64toPQIrr */ |
| 109639 | VR128, GR64, |
| 109640 | /* MOV64toSDrr */ |
| 109641 | FR64, GR64, |
| 109642 | /* MOV8ao16 */ |
| 109643 | offset16_8, |
| 109644 | /* MOV8ao32 */ |
| 109645 | offset32_8, |
| 109646 | /* MOV8ao64 */ |
| 109647 | offset64_8, |
| 109648 | /* MOV8mi */ |
| 109649 | i8mem, i8imm, |
| 109650 | /* MOV8mr */ |
| 109651 | i8mem, GR8, |
| 109652 | /* MOV8mr_NOREX */ |
| 109653 | i8mem_NOREX, GR8_NOREX, |
| 109654 | /* MOV8o16a */ |
| 109655 | offset16_8, |
| 109656 | /* MOV8o32a */ |
| 109657 | offset32_8, |
| 109658 | /* MOV8o64a */ |
| 109659 | offset64_8, |
| 109660 | /* MOV8ri */ |
| 109661 | GR8, i8imm, |
| 109662 | /* MOV8ri_alt */ |
| 109663 | GR8, i8imm, |
| 109664 | /* MOV8rm */ |
| 109665 | GR8, i8mem, |
| 109666 | /* MOV8rm_NOREX */ |
| 109667 | GR8_NOREX, i8mem_NOREX, |
| 109668 | /* MOV8rr */ |
| 109669 | GR8, GR8, |
| 109670 | /* MOV8rr_NOREX */ |
| 109671 | GR8_NOREX, GR8_NOREX, |
| 109672 | /* MOV8rr_REV */ |
| 109673 | GR8, GR8, |
| 109674 | /* MOVAPDmr */ |
| 109675 | f128mem, VR128, |
| 109676 | /* MOVAPDrm */ |
| 109677 | VR128, f128mem, |
| 109678 | /* MOVAPDrr */ |
| 109679 | VR128, VR128, |
| 109680 | /* MOVAPDrr_REV */ |
| 109681 | VR128, VR128, |
| 109682 | /* MOVAPSmr */ |
| 109683 | f128mem, VR128, |
| 109684 | /* MOVAPSrm */ |
| 109685 | VR128, f128mem, |
| 109686 | /* MOVAPSrr */ |
| 109687 | VR128, VR128, |
| 109688 | /* MOVAPSrr_REV */ |
| 109689 | VR128, VR128, |
| 109690 | /* MOVBE16mr */ |
| 109691 | i16mem, GR16, |
| 109692 | /* MOVBE16mr_EVEX */ |
| 109693 | i16mem, GR16, |
| 109694 | /* MOVBE16rm */ |
| 109695 | GR16, i16mem, |
| 109696 | /* MOVBE16rm_EVEX */ |
| 109697 | GR16, i16mem, |
| 109698 | /* MOVBE16rr */ |
| 109699 | GR16, GR16, |
| 109700 | /* MOVBE16rr_REV */ |
| 109701 | GR16, GR16, |
| 109702 | /* MOVBE32mr */ |
| 109703 | i32mem, GR32, |
| 109704 | /* MOVBE32mr_EVEX */ |
| 109705 | i32mem, GR32, |
| 109706 | /* MOVBE32rm */ |
| 109707 | GR32, i32mem, |
| 109708 | /* MOVBE32rm_EVEX */ |
| 109709 | GR32, i32mem, |
| 109710 | /* MOVBE32rr */ |
| 109711 | GR32, GR32, |
| 109712 | /* MOVBE32rr_REV */ |
| 109713 | GR32, GR32, |
| 109714 | /* MOVBE64mr */ |
| 109715 | i64mem, GR64, |
| 109716 | /* MOVBE64mr_EVEX */ |
| 109717 | i64mem, GR64, |
| 109718 | /* MOVBE64rm */ |
| 109719 | GR64, i64mem, |
| 109720 | /* MOVBE64rm_EVEX */ |
| 109721 | GR64, i64mem, |
| 109722 | /* MOVBE64rr */ |
| 109723 | GR64, GR64, |
| 109724 | /* MOVBE64rr_REV */ |
| 109725 | GR64, GR64, |
| 109726 | /* MOVDDUPrm */ |
| 109727 | VR128, f64mem, |
| 109728 | /* MOVDDUPrr */ |
| 109729 | VR128, VR128, |
| 109730 | /* MOVDI2PDIrm */ |
| 109731 | VR128, i32mem, |
| 109732 | /* MOVDI2PDIrr */ |
| 109733 | VR128, GR32, |
| 109734 | /* MOVDI2SSrr */ |
| 109735 | FR32, GR32, |
| 109736 | /* MOVDIR64B16 */ |
| 109737 | GR16, i512mem_GR16, |
| 109738 | /* MOVDIR64B32 */ |
| 109739 | GR32, i512mem_GR32, |
| 109740 | /* MOVDIR64B32_EVEX */ |
| 109741 | GR32, i512mem_GR32, |
| 109742 | /* MOVDIR64B64 */ |
| 109743 | GR64, i512mem_GR64, |
| 109744 | /* MOVDIR64B64_EVEX */ |
| 109745 | GR64, i512mem_GR64, |
| 109746 | /* MOVDIRI32 */ |
| 109747 | i32mem, GR32, |
| 109748 | /* MOVDIRI32_EVEX */ |
| 109749 | i32mem, GR32, |
| 109750 | /* MOVDIRI64 */ |
| 109751 | i64mem, GR64, |
| 109752 | /* MOVDIRI64_EVEX */ |
| 109753 | i64mem, GR64, |
| 109754 | /* MOVDQAmr */ |
| 109755 | i128mem, VR128, |
| 109756 | /* MOVDQArm */ |
| 109757 | VR128, i128mem, |
| 109758 | /* MOVDQArr */ |
| 109759 | VR128, VR128, |
| 109760 | /* MOVDQArr_REV */ |
| 109761 | VR128, VR128, |
| 109762 | /* MOVDQUmr */ |
| 109763 | i128mem, VR128, |
| 109764 | /* MOVDQUrm */ |
| 109765 | VR128, i128mem, |
| 109766 | /* MOVDQUrr */ |
| 109767 | VR128, VR128, |
| 109768 | /* MOVDQUrr_REV */ |
| 109769 | VR128, VR128, |
| 109770 | /* MOVHLPSrr */ |
| 109771 | VR128, VR128, VR128, |
| 109772 | /* MOVHPDmr */ |
| 109773 | f64mem, VR128, |
| 109774 | /* MOVHPDrm */ |
| 109775 | VR128, VR128, f64mem, |
| 109776 | /* MOVHPSmr */ |
| 109777 | f64mem, VR128, |
| 109778 | /* MOVHPSrm */ |
| 109779 | VR128, VR128, f64mem, |
| 109780 | /* MOVLHPSrr */ |
| 109781 | VR128, VR128, VR128, |
| 109782 | /* MOVLPDmr */ |
| 109783 | f64mem, VR128, |
| 109784 | /* MOVLPDrm */ |
| 109785 | VR128, VR128, f64mem, |
| 109786 | /* MOVLPSmr */ |
| 109787 | f64mem, VR128, |
| 109788 | /* MOVLPSrm */ |
| 109789 | VR128, VR128, f64mem, |
| 109790 | /* MOVMSKPDrr */ |
| 109791 | GR32orGR64, VR128, |
| 109792 | /* MOVMSKPSrr */ |
| 109793 | GR32orGR64, VR128, |
| 109794 | /* MOVNTDQArm */ |
| 109795 | VR128, i128mem, |
| 109796 | /* MOVNTDQmr */ |
| 109797 | f128mem, VR128, |
| 109798 | /* MOVNTI_64mr */ |
| 109799 | i64mem, GR64, |
| 109800 | /* MOVNTImr */ |
| 109801 | i32mem, GR32, |
| 109802 | /* MOVNTPDmr */ |
| 109803 | f128mem, VR128, |
| 109804 | /* MOVNTPSmr */ |
| 109805 | f128mem, VR128, |
| 109806 | /* MOVNTSD */ |
| 109807 | f64mem, VR128, |
| 109808 | /* MOVNTSS */ |
| 109809 | f32mem, VR128, |
| 109810 | /* MOVPC32r */ |
| 109811 | GR32, i32imm, |
| 109812 | /* MOVPDI2DImr */ |
| 109813 | i32mem, VR128, |
| 109814 | /* MOVPDI2DIrr */ |
| 109815 | GR32, VR128, |
| 109816 | /* MOVPQI2QImr */ |
| 109817 | i64mem, VR128, |
| 109818 | /* MOVPQI2QIrr */ |
| 109819 | VR128, VR128, |
| 109820 | /* MOVPQIto64mr */ |
| 109821 | i64mem, VR128, |
| 109822 | /* MOVPQIto64rr */ |
| 109823 | GR64, VR128, |
| 109824 | /* MOVQI2PQIrm */ |
| 109825 | VR128, i64mem, |
| 109826 | /* MOVSB */ |
| 109827 | dstidx8, srcidx8, |
| 109828 | /* MOVSDmr */ |
| 109829 | f64mem, FR64, |
| 109830 | /* MOVSDrm */ |
| 109831 | VR128, f64mem, |
| 109832 | /* MOVSDrm_alt */ |
| 109833 | FR64, f64mem, |
| 109834 | /* MOVSDrr */ |
| 109835 | VR128, VR128, VR128, |
| 109836 | /* MOVSDrr_REV */ |
| 109837 | VR128, VR128, VR128, |
| 109838 | /* MOVSDto64rr */ |
| 109839 | GR64, FR64, |
| 109840 | /* MOVSHDUPrm */ |
| 109841 | VR128, f128mem, |
| 109842 | /* MOVSHDUPrr */ |
| 109843 | VR128, VR128, |
| 109844 | /* MOVSL */ |
| 109845 | dstidx32, srcidx32, |
| 109846 | /* MOVSLDUPrm */ |
| 109847 | VR128, f128mem, |
| 109848 | /* MOVSLDUPrr */ |
| 109849 | VR128, VR128, |
| 109850 | /* MOVSQ */ |
| 109851 | dstidx64, srcidx64, |
| 109852 | /* MOVSS2DIrr */ |
| 109853 | GR32, FR32, |
| 109854 | /* MOVSSmr */ |
| 109855 | f32mem, FR32, |
| 109856 | /* MOVSSrm */ |
| 109857 | VR128, f32mem, |
| 109858 | /* MOVSSrm_alt */ |
| 109859 | FR32, f32mem, |
| 109860 | /* MOVSSrr */ |
| 109861 | VR128, VR128, VR128, |
| 109862 | /* MOVSSrr_REV */ |
| 109863 | VR128, VR128, VR128, |
| 109864 | /* MOVSW */ |
| 109865 | dstidx16, srcidx16, |
| 109866 | /* MOVSX16rm16 */ |
| 109867 | GR16, i16mem, |
| 109868 | /* MOVSX16rm32 */ |
| 109869 | GR16, i32mem, |
| 109870 | /* MOVSX16rm8 */ |
| 109871 | GR16, i8mem, |
| 109872 | /* MOVSX16rr16 */ |
| 109873 | GR16, GR16, |
| 109874 | /* MOVSX16rr32 */ |
| 109875 | GR16, GR32, |
| 109876 | /* MOVSX16rr8 */ |
| 109877 | GR16, GR8, |
| 109878 | /* MOVSX32rm16 */ |
| 109879 | GR32, i16mem, |
| 109880 | /* MOVSX32rm32 */ |
| 109881 | GR32, i32mem, |
| 109882 | /* MOVSX32rm8 */ |
| 109883 | GR32, i8mem, |
| 109884 | /* MOVSX32rm8_NOREX */ |
| 109885 | GR32_NOREX, i8mem_NOREX, |
| 109886 | /* MOVSX32rr16 */ |
| 109887 | GR32, GR16, |
| 109888 | /* MOVSX32rr32 */ |
| 109889 | GR32, GR32, |
| 109890 | /* MOVSX32rr8 */ |
| 109891 | GR32, GR8, |
| 109892 | /* MOVSX32rr8_NOREX */ |
| 109893 | GR32_NOREX, GR8_NOREX, |
| 109894 | /* MOVSX64rm16 */ |
| 109895 | GR64, i16mem, |
| 109896 | /* MOVSX64rm32 */ |
| 109897 | GR64, i32mem, |
| 109898 | /* MOVSX64rm8 */ |
| 109899 | GR64, i8mem, |
| 109900 | /* MOVSX64rr16 */ |
| 109901 | GR64, GR16, |
| 109902 | /* MOVSX64rr32 */ |
| 109903 | GR64, GR32, |
| 109904 | /* MOVSX64rr8 */ |
| 109905 | GR64, GR8, |
| 109906 | /* MOVUPDmr */ |
| 109907 | f128mem, VR128, |
| 109908 | /* MOVUPDrm */ |
| 109909 | VR128, f128mem, |
| 109910 | /* MOVUPDrr */ |
| 109911 | VR128, VR128, |
| 109912 | /* MOVUPDrr_REV */ |
| 109913 | VR128, VR128, |
| 109914 | /* MOVUPSmr */ |
| 109915 | f128mem, VR128, |
| 109916 | /* MOVUPSrm */ |
| 109917 | VR128, f128mem, |
| 109918 | /* MOVUPSrr */ |
| 109919 | VR128, VR128, |
| 109920 | /* MOVUPSrr_REV */ |
| 109921 | VR128, VR128, |
| 109922 | /* MOVZPQILo2PQIrr */ |
| 109923 | VR128, VR128, |
| 109924 | /* MOVZX16rm16 */ |
| 109925 | GR16, i16mem, |
| 109926 | /* MOVZX16rm8 */ |
| 109927 | GR16, i8mem, |
| 109928 | /* MOVZX16rr16 */ |
| 109929 | GR16, GR16, |
| 109930 | /* MOVZX16rr8 */ |
| 109931 | GR16, GR8, |
| 109932 | /* MOVZX32rm16 */ |
| 109933 | GR32, i16mem, |
| 109934 | /* MOVZX32rm8 */ |
| 109935 | GR32, i8mem, |
| 109936 | /* MOVZX32rm8_NOREX */ |
| 109937 | GR32_NOREX, i8mem_NOREX, |
| 109938 | /* MOVZX32rr16 */ |
| 109939 | GR32, GR16, |
| 109940 | /* MOVZX32rr8 */ |
| 109941 | GR32, GR8, |
| 109942 | /* MOVZX32rr8_NOREX */ |
| 109943 | GR32_NOREX, GR8_NOREX, |
| 109944 | /* MOVZX64rm16 */ |
| 109945 | GR64, i16mem, |
| 109946 | /* MOVZX64rm8 */ |
| 109947 | GR64, i8mem, |
| 109948 | /* MOVZX64rr16 */ |
| 109949 | GR64, GR16, |
| 109950 | /* MOVZX64rr8 */ |
| 109951 | GR64, GR8, |
| 109952 | /* MPSADBWrmi */ |
| 109953 | VR128, VR128, i128mem, u8imm, |
| 109954 | /* MPSADBWrri */ |
| 109955 | VR128, VR128, VR128, u8imm, |
| 109956 | /* MUL16m */ |
| 109957 | i16mem, |
| 109958 | /* MUL16m_EVEX */ |
| 109959 | i16mem, |
| 109960 | /* MUL16m_NF */ |
| 109961 | i16mem, |
| 109962 | /* MUL16r */ |
| 109963 | GR16, |
| 109964 | /* MUL16r_EVEX */ |
| 109965 | GR16, |
| 109966 | /* MUL16r_NF */ |
| 109967 | GR16, |
| 109968 | /* MUL32m */ |
| 109969 | i32mem, |
| 109970 | /* MUL32m_EVEX */ |
| 109971 | i32mem, |
| 109972 | /* MUL32m_NF */ |
| 109973 | i32mem, |
| 109974 | /* MUL32r */ |
| 109975 | GR32, |
| 109976 | /* MUL32r_EVEX */ |
| 109977 | GR32, |
| 109978 | /* MUL32r_NF */ |
| 109979 | GR32, |
| 109980 | /* MUL64m */ |
| 109981 | i64mem, |
| 109982 | /* MUL64m_EVEX */ |
| 109983 | i64mem, |
| 109984 | /* MUL64m_NF */ |
| 109985 | i64mem, |
| 109986 | /* MUL64r */ |
| 109987 | GR64, |
| 109988 | /* MUL64r_EVEX */ |
| 109989 | GR64, |
| 109990 | /* MUL64r_NF */ |
| 109991 | GR64, |
| 109992 | /* MUL8m */ |
| 109993 | i8mem, |
| 109994 | /* MUL8m_EVEX */ |
| 109995 | i8mem, |
| 109996 | /* MUL8m_NF */ |
| 109997 | i8mem, |
| 109998 | /* MUL8r */ |
| 109999 | GR8, |
| 110000 | /* MUL8r_EVEX */ |
| 110001 | GR8, |
| 110002 | /* MUL8r_NF */ |
| 110003 | GR8, |
| 110004 | /* MULPDrm */ |
| 110005 | VR128, VR128, f128mem, |
| 110006 | /* MULPDrr */ |
| 110007 | VR128, VR128, VR128, |
| 110008 | /* MULPSrm */ |
| 110009 | VR128, VR128, f128mem, |
| 110010 | /* MULPSrr */ |
| 110011 | VR128, VR128, VR128, |
| 110012 | /* MULSDrm */ |
| 110013 | FR64, FR64, f64mem, |
| 110014 | /* MULSDrm_Int */ |
| 110015 | VR128, VR128, sdmem, |
| 110016 | /* MULSDrr */ |
| 110017 | FR64, FR64, FR64, |
| 110018 | /* MULSDrr_Int */ |
| 110019 | VR128, VR128, VR128, |
| 110020 | /* MULSSrm */ |
| 110021 | FR32, FR32, f32mem, |
| 110022 | /* MULSSrm_Int */ |
| 110023 | VR128, VR128, ssmem, |
| 110024 | /* MULSSrr */ |
| 110025 | FR32, FR32, FR32, |
| 110026 | /* MULSSrr_Int */ |
| 110027 | VR128, VR128, VR128, |
| 110028 | /* MULX32Hrm */ |
| 110029 | GR32, i32mem, |
| 110030 | /* MULX32Hrr */ |
| 110031 | GR32, GR32, |
| 110032 | /* MULX32rm */ |
| 110033 | GR32, GR32, i32mem, |
| 110034 | /* MULX32rm_EVEX */ |
| 110035 | GR32, GR32, i32mem, |
| 110036 | /* MULX32rr */ |
| 110037 | GR32, GR32, GR32, |
| 110038 | /* MULX32rr_EVEX */ |
| 110039 | GR32, GR32, GR32, |
| 110040 | /* MULX64Hrm */ |
| 110041 | GR64, i64mem, |
| 110042 | /* MULX64Hrr */ |
| 110043 | GR64, GR64, |
| 110044 | /* MULX64rm */ |
| 110045 | GR64, GR64, i64mem, |
| 110046 | /* MULX64rm_EVEX */ |
| 110047 | GR64, GR64, i64mem, |
| 110048 | /* MULX64rr */ |
| 110049 | GR64, GR64, GR64, |
| 110050 | /* MULX64rr_EVEX */ |
| 110051 | GR64, GR64, GR64, |
| 110052 | /* MUL_F32m */ |
| 110053 | f32mem, |
| 110054 | /* MUL_F64m */ |
| 110055 | f64mem, |
| 110056 | /* MUL_FI16m */ |
| 110057 | i16mem, |
| 110058 | /* MUL_FI32m */ |
| 110059 | i32mem, |
| 110060 | /* MUL_FPrST0 */ |
| 110061 | RSTi, |
| 110062 | /* MUL_FST0r */ |
| 110063 | RSTi, |
| 110064 | /* MUL_Fp32 */ |
| 110065 | RFP32, RFP32, RFP32, |
| 110066 | /* MUL_Fp32m */ |
| 110067 | RFP32, RFP32, f32mem, |
| 110068 | /* MUL_Fp64 */ |
| 110069 | RFP64, RFP64, RFP64, |
| 110070 | /* MUL_Fp64m */ |
| 110071 | RFP64, RFP64, f64mem, |
| 110072 | /* MUL_Fp64m32 */ |
| 110073 | RFP64, RFP64, f32mem, |
| 110074 | /* MUL_Fp80 */ |
| 110075 | RFP80, RFP80, RFP80, |
| 110076 | /* MUL_Fp80m32 */ |
| 110077 | RFP80, RFP80, f32mem, |
| 110078 | /* MUL_Fp80m64 */ |
| 110079 | RFP80, RFP80, f64mem, |
| 110080 | /* MUL_FpI16m32 */ |
| 110081 | RFP32, RFP32, i16mem, |
| 110082 | /* MUL_FpI16m64 */ |
| 110083 | RFP64, RFP64, i16mem, |
| 110084 | /* MUL_FpI16m80 */ |
| 110085 | RFP80, RFP80, i16mem, |
| 110086 | /* MUL_FpI32m32 */ |
| 110087 | RFP32, RFP32, i32mem, |
| 110088 | /* MUL_FpI32m64 */ |
| 110089 | RFP64, RFP64, i32mem, |
| 110090 | /* MUL_FpI32m80 */ |
| 110091 | RFP80, RFP80, i32mem, |
| 110092 | /* MUL_FrST0 */ |
| 110093 | RSTi, |
| 110094 | /* MWAITXrrr */ |
| 110095 | /* MWAITrr */ |
| 110096 | /* NEG16m */ |
| 110097 | i16mem, |
| 110098 | /* NEG16m_EVEX */ |
| 110099 | i16mem, |
| 110100 | /* NEG16m_ND */ |
| 110101 | GR16, i16mem, |
| 110102 | /* NEG16m_NF */ |
| 110103 | i16mem, |
| 110104 | /* NEG16m_NF_ND */ |
| 110105 | GR16, i16mem, |
| 110106 | /* NEG16r */ |
| 110107 | GR16, GR16, |
| 110108 | /* NEG16r_EVEX */ |
| 110109 | GR16, GR16, |
| 110110 | /* NEG16r_ND */ |
| 110111 | GR16, GR16, |
| 110112 | /* NEG16r_NF */ |
| 110113 | GR16, GR16, |
| 110114 | /* NEG16r_NF_ND */ |
| 110115 | GR16, GR16, |
| 110116 | /* NEG32m */ |
| 110117 | i32mem, |
| 110118 | /* NEG32m_EVEX */ |
| 110119 | i32mem, |
| 110120 | /* NEG32m_ND */ |
| 110121 | GR32, i32mem, |
| 110122 | /* NEG32m_NF */ |
| 110123 | i32mem, |
| 110124 | /* NEG32m_NF_ND */ |
| 110125 | GR32, i32mem, |
| 110126 | /* NEG32r */ |
| 110127 | GR32, GR32, |
| 110128 | /* NEG32r_EVEX */ |
| 110129 | GR32, GR32, |
| 110130 | /* NEG32r_ND */ |
| 110131 | GR32, GR32, |
| 110132 | /* NEG32r_NF */ |
| 110133 | GR32, GR32, |
| 110134 | /* NEG32r_NF_ND */ |
| 110135 | GR32, GR32, |
| 110136 | /* NEG64m */ |
| 110137 | i64mem, |
| 110138 | /* NEG64m_EVEX */ |
| 110139 | i64mem, |
| 110140 | /* NEG64m_ND */ |
| 110141 | GR64, i64mem, |
| 110142 | /* NEG64m_NF */ |
| 110143 | i64mem, |
| 110144 | /* NEG64m_NF_ND */ |
| 110145 | GR64, i64mem, |
| 110146 | /* NEG64r */ |
| 110147 | GR64, GR64, |
| 110148 | /* NEG64r_EVEX */ |
| 110149 | GR64, GR64, |
| 110150 | /* NEG64r_ND */ |
| 110151 | GR64, GR64, |
| 110152 | /* NEG64r_NF */ |
| 110153 | GR64, GR64, |
| 110154 | /* NEG64r_NF_ND */ |
| 110155 | GR64, GR64, |
| 110156 | /* NEG8m */ |
| 110157 | i8mem, |
| 110158 | /* NEG8m_EVEX */ |
| 110159 | i8mem, |
| 110160 | /* NEG8m_ND */ |
| 110161 | GR8, i8mem, |
| 110162 | /* NEG8m_NF */ |
| 110163 | i8mem, |
| 110164 | /* NEG8m_NF_ND */ |
| 110165 | GR8, i8mem, |
| 110166 | /* NEG8r */ |
| 110167 | GR8, GR8, |
| 110168 | /* NEG8r_EVEX */ |
| 110169 | GR8, GR8, |
| 110170 | /* NEG8r_ND */ |
| 110171 | GR8, GR8, |
| 110172 | /* NEG8r_NF */ |
| 110173 | GR8, GR8, |
| 110174 | /* NEG8r_NF_ND */ |
| 110175 | GR8, GR8, |
| 110176 | /* NOOP */ |
| 110177 | /* NOOPL */ |
| 110178 | i32mem, |
| 110179 | /* NOOPLr */ |
| 110180 | GR32, |
| 110181 | /* NOOPQ */ |
| 110182 | i64mem, |
| 110183 | /* NOOPQr */ |
| 110184 | GR64, |
| 110185 | /* NOOPW */ |
| 110186 | i16mem, |
| 110187 | /* NOOPWr */ |
| 110188 | GR16, |
| 110189 | /* NOT16m */ |
| 110190 | i16mem, |
| 110191 | /* NOT16m_EVEX */ |
| 110192 | i16mem, |
| 110193 | /* NOT16m_ND */ |
| 110194 | GR16, i16mem, |
| 110195 | /* NOT16r */ |
| 110196 | GR16, GR16, |
| 110197 | /* NOT16r_EVEX */ |
| 110198 | GR16, GR16, |
| 110199 | /* NOT16r_ND */ |
| 110200 | GR16, GR16, |
| 110201 | /* NOT32m */ |
| 110202 | i32mem, |
| 110203 | /* NOT32m_EVEX */ |
| 110204 | i32mem, |
| 110205 | /* NOT32m_ND */ |
| 110206 | GR32, i32mem, |
| 110207 | /* NOT32r */ |
| 110208 | GR32, GR32, |
| 110209 | /* NOT32r_EVEX */ |
| 110210 | GR32, GR32, |
| 110211 | /* NOT32r_ND */ |
| 110212 | GR32, GR32, |
| 110213 | /* NOT64m */ |
| 110214 | i64mem, |
| 110215 | /* NOT64m_EVEX */ |
| 110216 | i64mem, |
| 110217 | /* NOT64m_ND */ |
| 110218 | GR64, i64mem, |
| 110219 | /* NOT64r */ |
| 110220 | GR64, GR64, |
| 110221 | /* NOT64r_EVEX */ |
| 110222 | GR64, GR64, |
| 110223 | /* NOT64r_ND */ |
| 110224 | GR64, GR64, |
| 110225 | /* NOT8m */ |
| 110226 | i8mem, |
| 110227 | /* NOT8m_EVEX */ |
| 110228 | i8mem, |
| 110229 | /* NOT8m_ND */ |
| 110230 | GR8, i8mem, |
| 110231 | /* NOT8r */ |
| 110232 | GR8, GR8, |
| 110233 | /* NOT8r_EVEX */ |
| 110234 | GR8, GR8, |
| 110235 | /* NOT8r_ND */ |
| 110236 | GR8, GR8, |
| 110237 | /* OR16i16 */ |
| 110238 | i16imm, |
| 110239 | /* OR16mi */ |
| 110240 | i16mem, i16imm, |
| 110241 | /* OR16mi8 */ |
| 110242 | i16mem, i16i8imm, |
| 110243 | /* OR16mi8_EVEX */ |
| 110244 | i16mem, i16i8imm, |
| 110245 | /* OR16mi8_ND */ |
| 110246 | GR16, i16mem, i16i8imm, |
| 110247 | /* OR16mi8_NF */ |
| 110248 | i16mem, i16i8imm, |
| 110249 | /* OR16mi8_NF_ND */ |
| 110250 | GR16, i16mem, i16i8imm, |
| 110251 | /* OR16mi_EVEX */ |
| 110252 | i16mem, i16imm, |
| 110253 | /* OR16mi_ND */ |
| 110254 | GR16, i16mem, i16imm, |
| 110255 | /* OR16mi_NF */ |
| 110256 | i16mem, i16imm, |
| 110257 | /* OR16mi_NF_ND */ |
| 110258 | GR16, i16mem, i16imm, |
| 110259 | /* OR16mr */ |
| 110260 | i16mem, GR16, |
| 110261 | /* OR16mr_EVEX */ |
| 110262 | i16mem, GR16, |
| 110263 | /* OR16mr_ND */ |
| 110264 | GR16, i16mem, GR16, |
| 110265 | /* OR16mr_NF */ |
| 110266 | i16mem, GR16, |
| 110267 | /* OR16mr_NF_ND */ |
| 110268 | GR16, i16mem, GR16, |
| 110269 | /* OR16ri */ |
| 110270 | GR16, GR16, i16imm, |
| 110271 | /* OR16ri8 */ |
| 110272 | GR16, GR16, i16i8imm, |
| 110273 | /* OR16ri8_EVEX */ |
| 110274 | GR16, GR16, i16i8imm, |
| 110275 | /* OR16ri8_ND */ |
| 110276 | GR16, GR16, i16i8imm, |
| 110277 | /* OR16ri8_NF */ |
| 110278 | GR16, GR16, i16i8imm, |
| 110279 | /* OR16ri8_NF_ND */ |
| 110280 | GR16, GR16, i16i8imm, |
| 110281 | /* OR16ri_EVEX */ |
| 110282 | GR16, GR16, i16imm, |
| 110283 | /* OR16ri_ND */ |
| 110284 | GR16, GR16, i16imm, |
| 110285 | /* OR16ri_NF */ |
| 110286 | GR16, GR16, i16imm, |
| 110287 | /* OR16ri_NF_ND */ |
| 110288 | GR16, GR16, i16imm, |
| 110289 | /* OR16rm */ |
| 110290 | GR16, GR16, i16mem, |
| 110291 | /* OR16rm_EVEX */ |
| 110292 | GR16, GR16, i16mem, |
| 110293 | /* OR16rm_ND */ |
| 110294 | GR16, GR16, i16mem, |
| 110295 | /* OR16rm_NF */ |
| 110296 | GR16, GR16, i16mem, |
| 110297 | /* OR16rm_NF_ND */ |
| 110298 | GR16, GR16, i16mem, |
| 110299 | /* OR16rr */ |
| 110300 | GR16, GR16, GR16, |
| 110301 | /* OR16rr_EVEX */ |
| 110302 | GR16, GR16, GR16, |
| 110303 | /* OR16rr_EVEX_REV */ |
| 110304 | GR16, GR16, GR16, |
| 110305 | /* OR16rr_ND */ |
| 110306 | GR16, GR16, GR16, |
| 110307 | /* OR16rr_ND_REV */ |
| 110308 | GR16, GR16, GR16, |
| 110309 | /* OR16rr_NF */ |
| 110310 | GR16, GR16, GR16, |
| 110311 | /* OR16rr_NF_ND */ |
| 110312 | GR16, GR16, GR16, |
| 110313 | /* OR16rr_NF_ND_REV */ |
| 110314 | GR16, GR16, GR16, |
| 110315 | /* OR16rr_NF_REV */ |
| 110316 | GR16, GR16, GR16, |
| 110317 | /* OR16rr_REV */ |
| 110318 | GR16, GR16, GR16, |
| 110319 | /* OR32i32 */ |
| 110320 | i32imm, |
| 110321 | /* OR32mi */ |
| 110322 | i32mem, i32imm, |
| 110323 | /* OR32mi8 */ |
| 110324 | i32mem, i32i8imm, |
| 110325 | /* OR32mi8Locked */ |
| 110326 | i32mem, i32i8imm, |
| 110327 | /* OR32mi8_EVEX */ |
| 110328 | i32mem, i32i8imm, |
| 110329 | /* OR32mi8_ND */ |
| 110330 | GR32, i32mem, i32i8imm, |
| 110331 | /* OR32mi8_NF */ |
| 110332 | i32mem, i32i8imm, |
| 110333 | /* OR32mi8_NF_ND */ |
| 110334 | GR32, i32mem, i32i8imm, |
| 110335 | /* OR32mi_EVEX */ |
| 110336 | i32mem, i32imm, |
| 110337 | /* OR32mi_ND */ |
| 110338 | GR32, i32mem, i32imm, |
| 110339 | /* OR32mi_NF */ |
| 110340 | i32mem, i32imm, |
| 110341 | /* OR32mi_NF_ND */ |
| 110342 | GR32, i32mem, i32imm, |
| 110343 | /* OR32mr */ |
| 110344 | i32mem, GR32, |
| 110345 | /* OR32mr_EVEX */ |
| 110346 | i32mem, GR32, |
| 110347 | /* OR32mr_ND */ |
| 110348 | GR32, i32mem, GR32, |
| 110349 | /* OR32mr_NF */ |
| 110350 | i32mem, GR32, |
| 110351 | /* OR32mr_NF_ND */ |
| 110352 | GR32, i32mem, GR32, |
| 110353 | /* OR32ri */ |
| 110354 | GR32, GR32, i32imm, |
| 110355 | /* OR32ri8 */ |
| 110356 | GR32, GR32, i32i8imm, |
| 110357 | /* OR32ri8_EVEX */ |
| 110358 | GR32, GR32, i32i8imm, |
| 110359 | /* OR32ri8_ND */ |
| 110360 | GR32, GR32, i32i8imm, |
| 110361 | /* OR32ri8_NF */ |
| 110362 | GR32, GR32, i32i8imm, |
| 110363 | /* OR32ri8_NF_ND */ |
| 110364 | GR32, GR32, i32i8imm, |
| 110365 | /* OR32ri_EVEX */ |
| 110366 | GR32, GR32, i32imm, |
| 110367 | /* OR32ri_ND */ |
| 110368 | GR32, GR32, i32imm, |
| 110369 | /* OR32ri_NF */ |
| 110370 | GR32, GR32, i32imm, |
| 110371 | /* OR32ri_NF_ND */ |
| 110372 | GR32, GR32, i32imm, |
| 110373 | /* OR32rm */ |
| 110374 | GR32, GR32, i32mem, |
| 110375 | /* OR32rm_EVEX */ |
| 110376 | GR32, GR32, i32mem, |
| 110377 | /* OR32rm_ND */ |
| 110378 | GR32, GR32, i32mem, |
| 110379 | /* OR32rm_NF */ |
| 110380 | GR32, GR32, i32mem, |
| 110381 | /* OR32rm_NF_ND */ |
| 110382 | GR32, GR32, i32mem, |
| 110383 | /* OR32rr */ |
| 110384 | GR32, GR32, GR32, |
| 110385 | /* OR32rr_EVEX */ |
| 110386 | GR32, GR32, GR32, |
| 110387 | /* OR32rr_EVEX_REV */ |
| 110388 | GR32, GR32, GR32, |
| 110389 | /* OR32rr_ND */ |
| 110390 | GR32, GR32, GR32, |
| 110391 | /* OR32rr_ND_REV */ |
| 110392 | GR32, GR32, GR32, |
| 110393 | /* OR32rr_NF */ |
| 110394 | GR32, GR32, GR32, |
| 110395 | /* OR32rr_NF_ND */ |
| 110396 | GR32, GR32, GR32, |
| 110397 | /* OR32rr_NF_ND_REV */ |
| 110398 | GR32, GR32, GR32, |
| 110399 | /* OR32rr_NF_REV */ |
| 110400 | GR32, GR32, GR32, |
| 110401 | /* OR32rr_REV */ |
| 110402 | GR32, GR32, GR32, |
| 110403 | /* OR64i32 */ |
| 110404 | i64i32imm, |
| 110405 | /* OR64mi32 */ |
| 110406 | i64mem, i64i32imm, |
| 110407 | /* OR64mi32_EVEX */ |
| 110408 | i64mem, i64i32imm, |
| 110409 | /* OR64mi32_ND */ |
| 110410 | GR64, i64mem, i64i32imm, |
| 110411 | /* OR64mi32_NF */ |
| 110412 | i64mem, i64i32imm, |
| 110413 | /* OR64mi32_NF_ND */ |
| 110414 | GR64, i64mem, i64i32imm, |
| 110415 | /* OR64mi8 */ |
| 110416 | i64mem, i64i8imm, |
| 110417 | /* OR64mi8_EVEX */ |
| 110418 | i64mem, i64i8imm, |
| 110419 | /* OR64mi8_ND */ |
| 110420 | GR64, i64mem, i64i8imm, |
| 110421 | /* OR64mi8_NF */ |
| 110422 | i64mem, i64i8imm, |
| 110423 | /* OR64mi8_NF_ND */ |
| 110424 | GR64, i64mem, i64i8imm, |
| 110425 | /* OR64mr */ |
| 110426 | i64mem, GR64, |
| 110427 | /* OR64mr_EVEX */ |
| 110428 | i64mem, GR64, |
| 110429 | /* OR64mr_ND */ |
| 110430 | GR64, i64mem, GR64, |
| 110431 | /* OR64mr_NF */ |
| 110432 | i64mem, GR64, |
| 110433 | /* OR64mr_NF_ND */ |
| 110434 | GR64, i64mem, GR64, |
| 110435 | /* OR64ri32 */ |
| 110436 | GR64, GR64, i64i32imm, |
| 110437 | /* OR64ri32_EVEX */ |
| 110438 | GR64, GR64, i64i32imm, |
| 110439 | /* OR64ri32_ND */ |
| 110440 | GR64, GR64, i64i32imm, |
| 110441 | /* OR64ri32_NF */ |
| 110442 | GR64, GR64, i64i32imm, |
| 110443 | /* OR64ri32_NF_ND */ |
| 110444 | GR64, GR64, i64i32imm, |
| 110445 | /* OR64ri8 */ |
| 110446 | GR64, GR64, i64i8imm, |
| 110447 | /* OR64ri8_EVEX */ |
| 110448 | GR64, GR64, i64i8imm, |
| 110449 | /* OR64ri8_ND */ |
| 110450 | GR64, GR64, i64i8imm, |
| 110451 | /* OR64ri8_NF */ |
| 110452 | GR64, GR64, i64i8imm, |
| 110453 | /* OR64ri8_NF_ND */ |
| 110454 | GR64, GR64, i64i8imm, |
| 110455 | /* OR64rm */ |
| 110456 | GR64, GR64, i64mem, |
| 110457 | /* OR64rm_EVEX */ |
| 110458 | GR64, GR64, i64mem, |
| 110459 | /* OR64rm_ND */ |
| 110460 | GR64, GR64, i64mem, |
| 110461 | /* OR64rm_NF */ |
| 110462 | GR64, GR64, i64mem, |
| 110463 | /* OR64rm_NF_ND */ |
| 110464 | GR64, GR64, i64mem, |
| 110465 | /* OR64rr */ |
| 110466 | GR64, GR64, GR64, |
| 110467 | /* OR64rr_EVEX */ |
| 110468 | GR64, GR64, GR64, |
| 110469 | /* OR64rr_EVEX_REV */ |
| 110470 | GR64, GR64, GR64, |
| 110471 | /* OR64rr_ND */ |
| 110472 | GR64, GR64, GR64, |
| 110473 | /* OR64rr_ND_REV */ |
| 110474 | GR64, GR64, GR64, |
| 110475 | /* OR64rr_NF */ |
| 110476 | GR64, GR64, GR64, |
| 110477 | /* OR64rr_NF_ND */ |
| 110478 | GR64, GR64, GR64, |
| 110479 | /* OR64rr_NF_ND_REV */ |
| 110480 | GR64, GR64, GR64, |
| 110481 | /* OR64rr_NF_REV */ |
| 110482 | GR64, GR64, GR64, |
| 110483 | /* OR64rr_REV */ |
| 110484 | GR64, GR64, GR64, |
| 110485 | /* OR8i8 */ |
| 110486 | i8imm, |
| 110487 | /* OR8mi */ |
| 110488 | i8mem, i8imm, |
| 110489 | /* OR8mi8 */ |
| 110490 | i8mem, i8imm, |
| 110491 | /* OR8mi_EVEX */ |
| 110492 | i8mem, i8imm, |
| 110493 | /* OR8mi_ND */ |
| 110494 | GR8, i8mem, i8imm, |
| 110495 | /* OR8mi_NF */ |
| 110496 | i8mem, i8imm, |
| 110497 | /* OR8mi_NF_ND */ |
| 110498 | GR8, i8mem, i8imm, |
| 110499 | /* OR8mr */ |
| 110500 | i8mem, GR8, |
| 110501 | /* OR8mr_EVEX */ |
| 110502 | i8mem, GR8, |
| 110503 | /* OR8mr_ND */ |
| 110504 | GR8, i8mem, GR8, |
| 110505 | /* OR8mr_NF */ |
| 110506 | i8mem, GR8, |
| 110507 | /* OR8mr_NF_ND */ |
| 110508 | GR8, i8mem, GR8, |
| 110509 | /* OR8ri */ |
| 110510 | GR8, GR8, i8imm, |
| 110511 | /* OR8ri8 */ |
| 110512 | GR8, GR8, i8imm, |
| 110513 | /* OR8ri_EVEX */ |
| 110514 | GR8, GR8, i8imm, |
| 110515 | /* OR8ri_ND */ |
| 110516 | GR8, GR8, i8imm, |
| 110517 | /* OR8ri_NF */ |
| 110518 | GR8, GR8, i8imm, |
| 110519 | /* OR8ri_NF_ND */ |
| 110520 | GR8, GR8, i8imm, |
| 110521 | /* OR8rm */ |
| 110522 | GR8, GR8, i8mem, |
| 110523 | /* OR8rm_EVEX */ |
| 110524 | GR8, GR8, i8mem, |
| 110525 | /* OR8rm_ND */ |
| 110526 | GR8, GR8, i8mem, |
| 110527 | /* OR8rm_NF */ |
| 110528 | GR8, GR8, i8mem, |
| 110529 | /* OR8rm_NF_ND */ |
| 110530 | GR8, GR8, i8mem, |
| 110531 | /* OR8rr */ |
| 110532 | GR8, GR8, GR8, |
| 110533 | /* OR8rr_EVEX */ |
| 110534 | GR8, GR8, GR8, |
| 110535 | /* OR8rr_EVEX_REV */ |
| 110536 | GR8, GR8, GR8, |
| 110537 | /* OR8rr_ND */ |
| 110538 | GR8, GR8, GR8, |
| 110539 | /* OR8rr_ND_REV */ |
| 110540 | GR8, GR8, GR8, |
| 110541 | /* OR8rr_NF */ |
| 110542 | GR8, GR8, GR8, |
| 110543 | /* OR8rr_NF_ND */ |
| 110544 | GR8, GR8, GR8, |
| 110545 | /* OR8rr_NF_ND_REV */ |
| 110546 | GR8, GR8, GR8, |
| 110547 | /* OR8rr_NF_REV */ |
| 110548 | GR8, GR8, GR8, |
| 110549 | /* OR8rr_REV */ |
| 110550 | GR8, GR8, GR8, |
| 110551 | /* ORPDrm */ |
| 110552 | VR128, VR128, f128mem, |
| 110553 | /* ORPDrr */ |
| 110554 | VR128, VR128, VR128, |
| 110555 | /* ORPSrm */ |
| 110556 | VR128, VR128, f128mem, |
| 110557 | /* ORPSrr */ |
| 110558 | VR128, VR128, VR128, |
| 110559 | /* OUT16ir */ |
| 110560 | u8imm, |
| 110561 | /* OUT16rr */ |
| 110562 | /* OUT32ir */ |
| 110563 | u8imm, |
| 110564 | /* OUT32rr */ |
| 110565 | /* OUT8ir */ |
| 110566 | u8imm, |
| 110567 | /* OUT8rr */ |
| 110568 | /* OUTSB */ |
| 110569 | srcidx8, |
| 110570 | /* OUTSL */ |
| 110571 | srcidx32, |
| 110572 | /* OUTSW */ |
| 110573 | srcidx16, |
| 110574 | /* PABSBrm */ |
| 110575 | VR128, i128mem, |
| 110576 | /* PABSBrr */ |
| 110577 | VR128, VR128, |
| 110578 | /* PABSDrm */ |
| 110579 | VR128, i128mem, |
| 110580 | /* PABSDrr */ |
| 110581 | VR128, VR128, |
| 110582 | /* PABSWrm */ |
| 110583 | VR128, i128mem, |
| 110584 | /* PABSWrr */ |
| 110585 | VR128, VR128, |
| 110586 | /* PACKSSDWrm */ |
| 110587 | VR128, VR128, i128mem, |
| 110588 | /* PACKSSDWrr */ |
| 110589 | VR128, VR128, VR128, |
| 110590 | /* PACKSSWBrm */ |
| 110591 | VR128, VR128, i128mem, |
| 110592 | /* PACKSSWBrr */ |
| 110593 | VR128, VR128, VR128, |
| 110594 | /* PACKUSDWrm */ |
| 110595 | VR128, VR128, i128mem, |
| 110596 | /* PACKUSDWrr */ |
| 110597 | VR128, VR128, VR128, |
| 110598 | /* PACKUSWBrm */ |
| 110599 | VR128, VR128, i128mem, |
| 110600 | /* PACKUSWBrr */ |
| 110601 | VR128, VR128, VR128, |
| 110602 | /* PADDBrm */ |
| 110603 | VR128, VR128, i128mem, |
| 110604 | /* PADDBrr */ |
| 110605 | VR128, VR128, VR128, |
| 110606 | /* PADDDrm */ |
| 110607 | VR128, VR128, i128mem, |
| 110608 | /* PADDDrr */ |
| 110609 | VR128, VR128, VR128, |
| 110610 | /* PADDQrm */ |
| 110611 | VR128, VR128, i128mem, |
| 110612 | /* PADDQrr */ |
| 110613 | VR128, VR128, VR128, |
| 110614 | /* PADDSBrm */ |
| 110615 | VR128, VR128, i128mem, |
| 110616 | /* PADDSBrr */ |
| 110617 | VR128, VR128, VR128, |
| 110618 | /* PADDSWrm */ |
| 110619 | VR128, VR128, i128mem, |
| 110620 | /* PADDSWrr */ |
| 110621 | VR128, VR128, VR128, |
| 110622 | /* PADDUSBrm */ |
| 110623 | VR128, VR128, i128mem, |
| 110624 | /* PADDUSBrr */ |
| 110625 | VR128, VR128, VR128, |
| 110626 | /* PADDUSWrm */ |
| 110627 | VR128, VR128, i128mem, |
| 110628 | /* PADDUSWrr */ |
| 110629 | VR128, VR128, VR128, |
| 110630 | /* PADDWrm */ |
| 110631 | VR128, VR128, i128mem, |
| 110632 | /* PADDWrr */ |
| 110633 | VR128, VR128, VR128, |
| 110634 | /* PALIGNRrmi */ |
| 110635 | VR128, VR128, i128mem, u8imm, |
| 110636 | /* PALIGNRrri */ |
| 110637 | VR128, VR128, VR128, u8imm, |
| 110638 | /* PANDNrm */ |
| 110639 | VR128, VR128, i128mem, |
| 110640 | /* PANDNrr */ |
| 110641 | VR128, VR128, VR128, |
| 110642 | /* PANDrm */ |
| 110643 | VR128, VR128, i128mem, |
| 110644 | /* PANDrr */ |
| 110645 | VR128, VR128, VR128, |
| 110646 | /* PAUSE */ |
| 110647 | /* PAVGBrm */ |
| 110648 | VR128, VR128, i128mem, |
| 110649 | /* PAVGBrr */ |
| 110650 | VR128, VR128, VR128, |
| 110651 | /* PAVGUSBrm */ |
| 110652 | VR64, VR64, i64mem, |
| 110653 | /* PAVGUSBrr */ |
| 110654 | VR64, VR64, VR64, |
| 110655 | /* PAVGWrm */ |
| 110656 | VR128, VR128, i128mem, |
| 110657 | /* PAVGWrr */ |
| 110658 | VR128, VR128, VR128, |
| 110659 | /* PBLENDVBrm0 */ |
| 110660 | VR128, VR128, i128mem, |
| 110661 | /* PBLENDVBrr0 */ |
| 110662 | VR128, VR128, VR128, |
| 110663 | /* PBLENDWrmi */ |
| 110664 | VR128, VR128, i128mem, u8imm, |
| 110665 | /* PBLENDWrri */ |
| 110666 | VR128, VR128, VR128, u8imm, |
| 110667 | /* PBNDKB */ |
| 110668 | /* PCLMULQDQrmi */ |
| 110669 | VR128, VR128, i128mem, u8imm, |
| 110670 | /* PCLMULQDQrri */ |
| 110671 | VR128, VR128, VR128, u8imm, |
| 110672 | /* PCMPEQBrm */ |
| 110673 | VR128, VR128, i128mem, |
| 110674 | /* PCMPEQBrr */ |
| 110675 | VR128, VR128, VR128, |
| 110676 | /* PCMPEQDrm */ |
| 110677 | VR128, VR128, i128mem, |
| 110678 | /* PCMPEQDrr */ |
| 110679 | VR128, VR128, VR128, |
| 110680 | /* PCMPEQQrm */ |
| 110681 | VR128, VR128, i128mem, |
| 110682 | /* PCMPEQQrr */ |
| 110683 | VR128, VR128, VR128, |
| 110684 | /* PCMPEQWrm */ |
| 110685 | VR128, VR128, i128mem, |
| 110686 | /* PCMPEQWrr */ |
| 110687 | VR128, VR128, VR128, |
| 110688 | /* PCMPESTRIrmi */ |
| 110689 | VR128, i128mem, u8imm, |
| 110690 | /* PCMPESTRIrri */ |
| 110691 | VR128, VR128, u8imm, |
| 110692 | /* PCMPESTRMrmi */ |
| 110693 | VR128, i128mem, u8imm, |
| 110694 | /* PCMPESTRMrri */ |
| 110695 | VR128, VR128, u8imm, |
| 110696 | /* PCMPGTBrm */ |
| 110697 | VR128, VR128, i128mem, |
| 110698 | /* PCMPGTBrr */ |
| 110699 | VR128, VR128, VR128, |
| 110700 | /* PCMPGTDrm */ |
| 110701 | VR128, VR128, i128mem, |
| 110702 | /* PCMPGTDrr */ |
| 110703 | VR128, VR128, VR128, |
| 110704 | /* PCMPGTQrm */ |
| 110705 | VR128, VR128, i128mem, |
| 110706 | /* PCMPGTQrr */ |
| 110707 | VR128, VR128, VR128, |
| 110708 | /* PCMPGTWrm */ |
| 110709 | VR128, VR128, i128mem, |
| 110710 | /* PCMPGTWrr */ |
| 110711 | VR128, VR128, VR128, |
| 110712 | /* PCMPISTRIrmi */ |
| 110713 | VR128, i128mem, u8imm, |
| 110714 | /* PCMPISTRIrri */ |
| 110715 | VR128, VR128, u8imm, |
| 110716 | /* PCMPISTRMrmi */ |
| 110717 | VR128, i128mem, u8imm, |
| 110718 | /* PCMPISTRMrri */ |
| 110719 | VR128, VR128, u8imm, |
| 110720 | /* PCONFIG */ |
| 110721 | /* PDEP32rm */ |
| 110722 | GR32, GR32, i32mem, |
| 110723 | /* PDEP32rm_EVEX */ |
| 110724 | GR32, GR32, i32mem, |
| 110725 | /* PDEP32rr */ |
| 110726 | GR32, GR32, GR32, |
| 110727 | /* PDEP32rr_EVEX */ |
| 110728 | GR32, GR32, GR32, |
| 110729 | /* PDEP64rm */ |
| 110730 | GR64, GR64, i64mem, |
| 110731 | /* PDEP64rm_EVEX */ |
| 110732 | GR64, GR64, i64mem, |
| 110733 | /* PDEP64rr */ |
| 110734 | GR64, GR64, GR64, |
| 110735 | /* PDEP64rr_EVEX */ |
| 110736 | GR64, GR64, GR64, |
| 110737 | /* PEXT32rm */ |
| 110738 | GR32, GR32, i32mem, |
| 110739 | /* PEXT32rm_EVEX */ |
| 110740 | GR32, GR32, i32mem, |
| 110741 | /* PEXT32rr */ |
| 110742 | GR32, GR32, GR32, |
| 110743 | /* PEXT32rr_EVEX */ |
| 110744 | GR32, GR32, GR32, |
| 110745 | /* PEXT64rm */ |
| 110746 | GR64, GR64, i64mem, |
| 110747 | /* PEXT64rm_EVEX */ |
| 110748 | GR64, GR64, i64mem, |
| 110749 | /* PEXT64rr */ |
| 110750 | GR64, GR64, GR64, |
| 110751 | /* PEXT64rr_EVEX */ |
| 110752 | GR64, GR64, GR64, |
| 110753 | /* PEXTRBmr */ |
| 110754 | i8mem, VR128, u8imm, |
| 110755 | /* PEXTRBrr */ |
| 110756 | GR32orGR64, VR128, u8imm, |
| 110757 | /* PEXTRDmr */ |
| 110758 | i32mem, VR128, u8imm, |
| 110759 | /* PEXTRDrr */ |
| 110760 | GR32, VR128, u8imm, |
| 110761 | /* PEXTRQmr */ |
| 110762 | i64mem, VR128, u8imm, |
| 110763 | /* PEXTRQrr */ |
| 110764 | GR64, VR128, u8imm, |
| 110765 | /* PEXTRWmr */ |
| 110766 | i16mem, VR128, u8imm, |
| 110767 | /* PEXTRWrr */ |
| 110768 | GR32orGR64, VR128, u8imm, |
| 110769 | /* PEXTRWrr_REV */ |
| 110770 | GR32orGR64, VR128, u8imm, |
| 110771 | /* PF2IDrm */ |
| 110772 | VR64, i64mem, |
| 110773 | /* PF2IDrr */ |
| 110774 | VR64, VR64, |
| 110775 | /* PF2IWrm */ |
| 110776 | VR64, i64mem, |
| 110777 | /* PF2IWrr */ |
| 110778 | VR64, VR64, |
| 110779 | /* PFACCrm */ |
| 110780 | VR64, VR64, i64mem, |
| 110781 | /* PFACCrr */ |
| 110782 | VR64, VR64, VR64, |
| 110783 | /* PFADDrm */ |
| 110784 | VR64, VR64, i64mem, |
| 110785 | /* PFADDrr */ |
| 110786 | VR64, VR64, VR64, |
| 110787 | /* PFCMPEQrm */ |
| 110788 | VR64, VR64, i64mem, |
| 110789 | /* PFCMPEQrr */ |
| 110790 | VR64, VR64, VR64, |
| 110791 | /* PFCMPGErm */ |
| 110792 | VR64, VR64, i64mem, |
| 110793 | /* PFCMPGErr */ |
| 110794 | VR64, VR64, VR64, |
| 110795 | /* PFCMPGTrm */ |
| 110796 | VR64, VR64, i64mem, |
| 110797 | /* PFCMPGTrr */ |
| 110798 | VR64, VR64, VR64, |
| 110799 | /* PFMAXrm */ |
| 110800 | VR64, VR64, i64mem, |
| 110801 | /* PFMAXrr */ |
| 110802 | VR64, VR64, VR64, |
| 110803 | /* PFMINrm */ |
| 110804 | VR64, VR64, i64mem, |
| 110805 | /* PFMINrr */ |
| 110806 | VR64, VR64, VR64, |
| 110807 | /* PFMULrm */ |
| 110808 | VR64, VR64, i64mem, |
| 110809 | /* PFMULrr */ |
| 110810 | VR64, VR64, VR64, |
| 110811 | /* PFNACCrm */ |
| 110812 | VR64, VR64, i64mem, |
| 110813 | /* PFNACCrr */ |
| 110814 | VR64, VR64, VR64, |
| 110815 | /* PFPNACCrm */ |
| 110816 | VR64, VR64, i64mem, |
| 110817 | /* PFPNACCrr */ |
| 110818 | VR64, VR64, VR64, |
| 110819 | /* PFRCPIT1rm */ |
| 110820 | VR64, VR64, i64mem, |
| 110821 | /* PFRCPIT1rr */ |
| 110822 | VR64, VR64, VR64, |
| 110823 | /* PFRCPIT2rm */ |
| 110824 | VR64, VR64, i64mem, |
| 110825 | /* PFRCPIT2rr */ |
| 110826 | VR64, VR64, VR64, |
| 110827 | /* PFRCPrm */ |
| 110828 | VR64, i64mem, |
| 110829 | /* PFRCPrr */ |
| 110830 | VR64, VR64, |
| 110831 | /* PFRSQIT1rm */ |
| 110832 | VR64, VR64, i64mem, |
| 110833 | /* PFRSQIT1rr */ |
| 110834 | VR64, VR64, VR64, |
| 110835 | /* PFRSQRTrm */ |
| 110836 | VR64, i64mem, |
| 110837 | /* PFRSQRTrr */ |
| 110838 | VR64, VR64, |
| 110839 | /* PFSUBRrm */ |
| 110840 | VR64, VR64, i64mem, |
| 110841 | /* PFSUBRrr */ |
| 110842 | VR64, VR64, VR64, |
| 110843 | /* PFSUBrm */ |
| 110844 | VR64, VR64, i64mem, |
| 110845 | /* PFSUBrr */ |
| 110846 | VR64, VR64, VR64, |
| 110847 | /* PHADDDrm */ |
| 110848 | VR128, VR128, i128mem, |
| 110849 | /* PHADDDrr */ |
| 110850 | VR128, VR128, VR128, |
| 110851 | /* PHADDSWrm */ |
| 110852 | VR128, VR128, i128mem, |
| 110853 | /* PHADDSWrr */ |
| 110854 | VR128, VR128, VR128, |
| 110855 | /* PHADDWrm */ |
| 110856 | VR128, VR128, i128mem, |
| 110857 | /* PHADDWrr */ |
| 110858 | VR128, VR128, VR128, |
| 110859 | /* PHMINPOSUWrm */ |
| 110860 | VR128, i128mem, |
| 110861 | /* PHMINPOSUWrr */ |
| 110862 | VR128, VR128, |
| 110863 | /* PHSUBDrm */ |
| 110864 | VR128, VR128, i128mem, |
| 110865 | /* PHSUBDrr */ |
| 110866 | VR128, VR128, VR128, |
| 110867 | /* PHSUBSWrm */ |
| 110868 | VR128, VR128, i128mem, |
| 110869 | /* PHSUBSWrr */ |
| 110870 | VR128, VR128, VR128, |
| 110871 | /* PHSUBWrm */ |
| 110872 | VR128, VR128, i128mem, |
| 110873 | /* PHSUBWrr */ |
| 110874 | VR128, VR128, VR128, |
| 110875 | /* PI2FDrm */ |
| 110876 | VR64, i64mem, |
| 110877 | /* PI2FDrr */ |
| 110878 | VR64, VR64, |
| 110879 | /* PI2FWrm */ |
| 110880 | VR64, i64mem, |
| 110881 | /* PI2FWrr */ |
| 110882 | VR64, VR64, |
| 110883 | /* PINSRBrm */ |
| 110884 | VR128, VR128, i8mem, u8imm, |
| 110885 | /* PINSRBrr */ |
| 110886 | VR128, VR128, GR32orGR64, u8imm, |
| 110887 | /* PINSRDrm */ |
| 110888 | VR128, VR128, i32mem, u8imm, |
| 110889 | /* PINSRDrr */ |
| 110890 | VR128, VR128, GR32, u8imm, |
| 110891 | /* PINSRQrm */ |
| 110892 | VR128, VR128, i64mem, u8imm, |
| 110893 | /* PINSRQrr */ |
| 110894 | VR128, VR128, GR64, u8imm, |
| 110895 | /* PINSRWrm */ |
| 110896 | VR128, VR128, i16mem, u8imm, |
| 110897 | /* PINSRWrr */ |
| 110898 | VR128, VR128, GR32orGR64, u8imm, |
| 110899 | /* PMADDUBSWrm */ |
| 110900 | VR128, VR128, i128mem, |
| 110901 | /* PMADDUBSWrr */ |
| 110902 | VR128, VR128, VR128, |
| 110903 | /* PMADDWDrm */ |
| 110904 | VR128, VR128, i128mem, |
| 110905 | /* PMADDWDrr */ |
| 110906 | VR128, VR128, VR128, |
| 110907 | /* PMAXSBrm */ |
| 110908 | VR128, VR128, i128mem, |
| 110909 | /* PMAXSBrr */ |
| 110910 | VR128, VR128, VR128, |
| 110911 | /* PMAXSDrm */ |
| 110912 | VR128, VR128, i128mem, |
| 110913 | /* PMAXSDrr */ |
| 110914 | VR128, VR128, VR128, |
| 110915 | /* PMAXSWrm */ |
| 110916 | VR128, VR128, i128mem, |
| 110917 | /* PMAXSWrr */ |
| 110918 | VR128, VR128, VR128, |
| 110919 | /* PMAXUBrm */ |
| 110920 | VR128, VR128, i128mem, |
| 110921 | /* PMAXUBrr */ |
| 110922 | VR128, VR128, VR128, |
| 110923 | /* PMAXUDrm */ |
| 110924 | VR128, VR128, i128mem, |
| 110925 | /* PMAXUDrr */ |
| 110926 | VR128, VR128, VR128, |
| 110927 | /* PMAXUWrm */ |
| 110928 | VR128, VR128, i128mem, |
| 110929 | /* PMAXUWrr */ |
| 110930 | VR128, VR128, VR128, |
| 110931 | /* PMINSBrm */ |
| 110932 | VR128, VR128, i128mem, |
| 110933 | /* PMINSBrr */ |
| 110934 | VR128, VR128, VR128, |
| 110935 | /* PMINSDrm */ |
| 110936 | VR128, VR128, i128mem, |
| 110937 | /* PMINSDrr */ |
| 110938 | VR128, VR128, VR128, |
| 110939 | /* PMINSWrm */ |
| 110940 | VR128, VR128, i128mem, |
| 110941 | /* PMINSWrr */ |
| 110942 | VR128, VR128, VR128, |
| 110943 | /* PMINUBrm */ |
| 110944 | VR128, VR128, i128mem, |
| 110945 | /* PMINUBrr */ |
| 110946 | VR128, VR128, VR128, |
| 110947 | /* PMINUDrm */ |
| 110948 | VR128, VR128, i128mem, |
| 110949 | /* PMINUDrr */ |
| 110950 | VR128, VR128, VR128, |
| 110951 | /* PMINUWrm */ |
| 110952 | VR128, VR128, i128mem, |
| 110953 | /* PMINUWrr */ |
| 110954 | VR128, VR128, VR128, |
| 110955 | /* PMOVMSKBrr */ |
| 110956 | GR32orGR64, VR128, |
| 110957 | /* PMOVSXBDrm */ |
| 110958 | VR128, i32mem, |
| 110959 | /* PMOVSXBDrr */ |
| 110960 | VR128, VR128, |
| 110961 | /* PMOVSXBQrm */ |
| 110962 | VR128, i16mem, |
| 110963 | /* PMOVSXBQrr */ |
| 110964 | VR128, VR128, |
| 110965 | /* PMOVSXBWrm */ |
| 110966 | VR128, i64mem, |
| 110967 | /* PMOVSXBWrr */ |
| 110968 | VR128, VR128, |
| 110969 | /* PMOVSXDQrm */ |
| 110970 | VR128, i64mem, |
| 110971 | /* PMOVSXDQrr */ |
| 110972 | VR128, VR128, |
| 110973 | /* PMOVSXWDrm */ |
| 110974 | VR128, i64mem, |
| 110975 | /* PMOVSXWDrr */ |
| 110976 | VR128, VR128, |
| 110977 | /* PMOVSXWQrm */ |
| 110978 | VR128, i32mem, |
| 110979 | /* PMOVSXWQrr */ |
| 110980 | VR128, VR128, |
| 110981 | /* PMOVZXBDrm */ |
| 110982 | VR128, i32mem, |
| 110983 | /* PMOVZXBDrr */ |
| 110984 | VR128, VR128, |
| 110985 | /* PMOVZXBQrm */ |
| 110986 | VR128, i16mem, |
| 110987 | /* PMOVZXBQrr */ |
| 110988 | VR128, VR128, |
| 110989 | /* PMOVZXBWrm */ |
| 110990 | VR128, i64mem, |
| 110991 | /* PMOVZXBWrr */ |
| 110992 | VR128, VR128, |
| 110993 | /* PMOVZXDQrm */ |
| 110994 | VR128, i64mem, |
| 110995 | /* PMOVZXDQrr */ |
| 110996 | VR128, VR128, |
| 110997 | /* PMOVZXWDrm */ |
| 110998 | VR128, i64mem, |
| 110999 | /* PMOVZXWDrr */ |
| 111000 | VR128, VR128, |
| 111001 | /* PMOVZXWQrm */ |
| 111002 | VR128, i32mem, |
| 111003 | /* PMOVZXWQrr */ |
| 111004 | VR128, VR128, |
| 111005 | /* PMULDQrm */ |
| 111006 | VR128, VR128, i128mem, |
| 111007 | /* PMULDQrr */ |
| 111008 | VR128, VR128, VR128, |
| 111009 | /* PMULHRSWrm */ |
| 111010 | VR128, VR128, i128mem, |
| 111011 | /* PMULHRSWrr */ |
| 111012 | VR128, VR128, VR128, |
| 111013 | /* PMULHRWrm */ |
| 111014 | VR64, VR64, i64mem, |
| 111015 | /* PMULHRWrr */ |
| 111016 | VR64, VR64, VR64, |
| 111017 | /* PMULHUWrm */ |
| 111018 | VR128, VR128, i128mem, |
| 111019 | /* PMULHUWrr */ |
| 111020 | VR128, VR128, VR128, |
| 111021 | /* PMULHWrm */ |
| 111022 | VR128, VR128, i128mem, |
| 111023 | /* PMULHWrr */ |
| 111024 | VR128, VR128, VR128, |
| 111025 | /* PMULLDrm */ |
| 111026 | VR128, VR128, i128mem, |
| 111027 | /* PMULLDrr */ |
| 111028 | VR128, VR128, VR128, |
| 111029 | /* PMULLWrm */ |
| 111030 | VR128, VR128, i128mem, |
| 111031 | /* PMULLWrr */ |
| 111032 | VR128, VR128, VR128, |
| 111033 | /* PMULUDQrm */ |
| 111034 | VR128, VR128, i128mem, |
| 111035 | /* PMULUDQrr */ |
| 111036 | VR128, VR128, VR128, |
| 111037 | /* POP16r */ |
| 111038 | GR16, |
| 111039 | /* POP16rmm */ |
| 111040 | i16mem, |
| 111041 | /* POP16rmr */ |
| 111042 | GR16, |
| 111043 | /* POP2 */ |
| 111044 | GR64, GR64, |
| 111045 | /* POP2P */ |
| 111046 | GR64, GR64, |
| 111047 | /* POP32r */ |
| 111048 | GR32, |
| 111049 | /* POP32rmm */ |
| 111050 | i32mem, |
| 111051 | /* POP32rmr */ |
| 111052 | GR32, |
| 111053 | /* POP64r */ |
| 111054 | GR64, |
| 111055 | /* POP64rmm */ |
| 111056 | i64mem, |
| 111057 | /* POP64rmr */ |
| 111058 | GR64, |
| 111059 | /* POPA16 */ |
| 111060 | /* POPA32 */ |
| 111061 | /* POPCNT16rm */ |
| 111062 | GR16, i16mem, |
| 111063 | /* POPCNT16rm_EVEX */ |
| 111064 | GR16, i16mem, |
| 111065 | /* POPCNT16rm_NF */ |
| 111066 | GR16, i16mem, |
| 111067 | /* POPCNT16rr */ |
| 111068 | GR16, GR16, |
| 111069 | /* POPCNT16rr_EVEX */ |
| 111070 | GR16, GR16, |
| 111071 | /* POPCNT16rr_NF */ |
| 111072 | GR16, GR16, |
| 111073 | /* POPCNT32rm */ |
| 111074 | GR32, i32mem, |
| 111075 | /* POPCNT32rm_EVEX */ |
| 111076 | GR32, i32mem, |
| 111077 | /* POPCNT32rm_NF */ |
| 111078 | GR32, i32mem, |
| 111079 | /* POPCNT32rr */ |
| 111080 | GR32, GR32, |
| 111081 | /* POPCNT32rr_EVEX */ |
| 111082 | GR32, GR32, |
| 111083 | /* POPCNT32rr_NF */ |
| 111084 | GR32, GR32, |
| 111085 | /* POPCNT64rm */ |
| 111086 | GR64, i64mem, |
| 111087 | /* POPCNT64rm_EVEX */ |
| 111088 | GR64, i64mem, |
| 111089 | /* POPCNT64rm_NF */ |
| 111090 | GR64, i64mem, |
| 111091 | /* POPCNT64rr */ |
| 111092 | GR64, GR64, |
| 111093 | /* POPCNT64rr_EVEX */ |
| 111094 | GR64, GR64, |
| 111095 | /* POPCNT64rr_NF */ |
| 111096 | GR64, GR64, |
| 111097 | /* POPDS16 */ |
| 111098 | /* POPDS32 */ |
| 111099 | /* POPES16 */ |
| 111100 | /* POPES32 */ |
| 111101 | /* POPF16 */ |
| 111102 | /* POPF32 */ |
| 111103 | /* POPF64 */ |
| 111104 | /* POPFS16 */ |
| 111105 | /* POPFS32 */ |
| 111106 | /* POPFS64 */ |
| 111107 | /* POPGS16 */ |
| 111108 | /* POPGS32 */ |
| 111109 | /* POPGS64 */ |
| 111110 | /* POPP64r */ |
| 111111 | GR64, |
| 111112 | /* POPSS16 */ |
| 111113 | /* POPSS32 */ |
| 111114 | /* PORrm */ |
| 111115 | VR128, VR128, i128mem, |
| 111116 | /* PORrr */ |
| 111117 | VR128, VR128, VR128, |
| 111118 | /* PREFETCH */ |
| 111119 | i8mem, |
| 111120 | /* PREFETCHIT0 */ |
| 111121 | i8mem, |
| 111122 | /* PREFETCHIT1 */ |
| 111123 | i8mem, |
| 111124 | /* PREFETCHNTA */ |
| 111125 | i8mem, |
| 111126 | /* PREFETCHT0 */ |
| 111127 | i8mem, |
| 111128 | /* PREFETCHT1 */ |
| 111129 | i8mem, |
| 111130 | /* PREFETCHT2 */ |
| 111131 | i8mem, |
| 111132 | /* PREFETCHW */ |
| 111133 | i8mem, |
| 111134 | /* PREFETCHWT1 */ |
| 111135 | i8mem, |
| 111136 | /* PROBED_ALLOCA_32 */ |
| 111137 | GR32, GR32, |
| 111138 | /* PROBED_ALLOCA_64 */ |
| 111139 | GR64, GR64, |
| 111140 | /* PSADBWrm */ |
| 111141 | VR128, VR128, i128mem, |
| 111142 | /* PSADBWrr */ |
| 111143 | VR128, VR128, VR128, |
| 111144 | /* PSHUFBrm */ |
| 111145 | VR128, VR128, i128mem, |
| 111146 | /* PSHUFBrr */ |
| 111147 | VR128, VR128, VR128, |
| 111148 | /* PSHUFDmi */ |
| 111149 | VR128, i128mem, u8imm, |
| 111150 | /* PSHUFDri */ |
| 111151 | VR128, VR128, u8imm, |
| 111152 | /* PSHUFHWmi */ |
| 111153 | VR128, i128mem, u8imm, |
| 111154 | /* PSHUFHWri */ |
| 111155 | VR128, VR128, u8imm, |
| 111156 | /* PSHUFLWmi */ |
| 111157 | VR128, i128mem, u8imm, |
| 111158 | /* PSHUFLWri */ |
| 111159 | VR128, VR128, u8imm, |
| 111160 | /* PSIGNBrm */ |
| 111161 | VR128, VR128, i128mem, |
| 111162 | /* PSIGNBrr */ |
| 111163 | VR128, VR128, VR128, |
| 111164 | /* PSIGNDrm */ |
| 111165 | VR128, VR128, i128mem, |
| 111166 | /* PSIGNDrr */ |
| 111167 | VR128, VR128, VR128, |
| 111168 | /* PSIGNWrm */ |
| 111169 | VR128, VR128, i128mem, |
| 111170 | /* PSIGNWrr */ |
| 111171 | VR128, VR128, VR128, |
| 111172 | /* PSLLDQri */ |
| 111173 | VR128, VR128, u8imm, |
| 111174 | /* PSLLDri */ |
| 111175 | VR128, VR128, u8imm, |
| 111176 | /* PSLLDrm */ |
| 111177 | VR128, VR128, i128mem, |
| 111178 | /* PSLLDrr */ |
| 111179 | VR128, VR128, VR128, |
| 111180 | /* PSLLQri */ |
| 111181 | VR128, VR128, u8imm, |
| 111182 | /* PSLLQrm */ |
| 111183 | VR128, VR128, i128mem, |
| 111184 | /* PSLLQrr */ |
| 111185 | VR128, VR128, VR128, |
| 111186 | /* PSLLWri */ |
| 111187 | VR128, VR128, u8imm, |
| 111188 | /* PSLLWrm */ |
| 111189 | VR128, VR128, i128mem, |
| 111190 | /* PSLLWrr */ |
| 111191 | VR128, VR128, VR128, |
| 111192 | /* PSMASH */ |
| 111193 | /* PSRADri */ |
| 111194 | VR128, VR128, u8imm, |
| 111195 | /* PSRADrm */ |
| 111196 | VR128, VR128, i128mem, |
| 111197 | /* PSRADrr */ |
| 111198 | VR128, VR128, VR128, |
| 111199 | /* PSRAWri */ |
| 111200 | VR128, VR128, u8imm, |
| 111201 | /* PSRAWrm */ |
| 111202 | VR128, VR128, i128mem, |
| 111203 | /* PSRAWrr */ |
| 111204 | VR128, VR128, VR128, |
| 111205 | /* PSRLDQri */ |
| 111206 | VR128, VR128, u8imm, |
| 111207 | /* PSRLDri */ |
| 111208 | VR128, VR128, u8imm, |
| 111209 | /* PSRLDrm */ |
| 111210 | VR128, VR128, i128mem, |
| 111211 | /* PSRLDrr */ |
| 111212 | VR128, VR128, VR128, |
| 111213 | /* PSRLQri */ |
| 111214 | VR128, VR128, u8imm, |
| 111215 | /* PSRLQrm */ |
| 111216 | VR128, VR128, i128mem, |
| 111217 | /* PSRLQrr */ |
| 111218 | VR128, VR128, VR128, |
| 111219 | /* PSRLWri */ |
| 111220 | VR128, VR128, u8imm, |
| 111221 | /* PSRLWrm */ |
| 111222 | VR128, VR128, i128mem, |
| 111223 | /* PSRLWrr */ |
| 111224 | VR128, VR128, VR128, |
| 111225 | /* PSUBBrm */ |
| 111226 | VR128, VR128, i128mem, |
| 111227 | /* PSUBBrr */ |
| 111228 | VR128, VR128, VR128, |
| 111229 | /* PSUBDrm */ |
| 111230 | VR128, VR128, i128mem, |
| 111231 | /* PSUBDrr */ |
| 111232 | VR128, VR128, VR128, |
| 111233 | /* PSUBQrm */ |
| 111234 | VR128, VR128, i128mem, |
| 111235 | /* PSUBQrr */ |
| 111236 | VR128, VR128, VR128, |
| 111237 | /* PSUBSBrm */ |
| 111238 | VR128, VR128, i128mem, |
| 111239 | /* PSUBSBrr */ |
| 111240 | VR128, VR128, VR128, |
| 111241 | /* PSUBSWrm */ |
| 111242 | VR128, VR128, i128mem, |
| 111243 | /* PSUBSWrr */ |
| 111244 | VR128, VR128, VR128, |
| 111245 | /* PSUBUSBrm */ |
| 111246 | VR128, VR128, i128mem, |
| 111247 | /* PSUBUSBrr */ |
| 111248 | VR128, VR128, VR128, |
| 111249 | /* PSUBUSWrm */ |
| 111250 | VR128, VR128, i128mem, |
| 111251 | /* PSUBUSWrr */ |
| 111252 | VR128, VR128, VR128, |
| 111253 | /* PSUBWrm */ |
| 111254 | VR128, VR128, i128mem, |
| 111255 | /* PSUBWrr */ |
| 111256 | VR128, VR128, VR128, |
| 111257 | /* PSWAPDrm */ |
| 111258 | VR64, i64mem, |
| 111259 | /* PSWAPDrr */ |
| 111260 | VR64, VR64, |
| 111261 | /* PTCMMIMFP16PS */ |
| 111262 | u8imm, u8imm, u8imm, |
| 111263 | /* PTCMMIMFP16PSV */ |
| 111264 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 111265 | /* PTCMMRLFP16PS */ |
| 111266 | u8imm, u8imm, u8imm, |
| 111267 | /* PTCMMRLFP16PSV */ |
| 111268 | TILE, GR16, GR16, GR16, TILE, TILE, TILE, |
| 111269 | /* PTDPBF16PS */ |
| 111270 | u8imm, u8imm, u8imm, |
| 111271 | /* PTDPBSSD */ |
| 111272 | u8imm, u8imm, u8imm, |
| 111273 | /* PTDPBSUD */ |
| 111274 | u8imm, u8imm, u8imm, |
| 111275 | /* PTDPBUSD */ |
| 111276 | u8imm, u8imm, u8imm, |
| 111277 | /* PTDPBUUD */ |
| 111278 | u8imm, u8imm, u8imm, |
| 111279 | /* PTDPFP16PS */ |
| 111280 | u8imm, u8imm, u8imm, |
| 111281 | /* PTESTrm */ |
| 111282 | VR128, f128mem, |
| 111283 | /* PTESTrr */ |
| 111284 | VR128, VR128, |
| 111285 | /* PTILELOADD */ |
| 111286 | u8imm, sibmem, |
| 111287 | /* PTILELOADDT1 */ |
| 111288 | u8imm, sibmem, |
| 111289 | /* PTILESTORED */ |
| 111290 | i8mem, u8imm, |
| 111291 | /* PTILEZERO */ |
| 111292 | u8imm, |
| 111293 | /* PTWRITE64m */ |
| 111294 | i64mem, |
| 111295 | /* PTWRITE64r */ |
| 111296 | GR64, |
| 111297 | /* PTWRITEm */ |
| 111298 | i32mem, |
| 111299 | /* PTWRITEr */ |
| 111300 | GR32, |
| 111301 | /* PUNPCKHBWrm */ |
| 111302 | VR128, VR128, i128mem, |
| 111303 | /* PUNPCKHBWrr */ |
| 111304 | VR128, VR128, VR128, |
| 111305 | /* PUNPCKHDQrm */ |
| 111306 | VR128, VR128, i128mem, |
| 111307 | /* PUNPCKHDQrr */ |
| 111308 | VR128, VR128, VR128, |
| 111309 | /* PUNPCKHQDQrm */ |
| 111310 | VR128, VR128, i128mem, |
| 111311 | /* PUNPCKHQDQrr */ |
| 111312 | VR128, VR128, VR128, |
| 111313 | /* PUNPCKHWDrm */ |
| 111314 | VR128, VR128, i128mem, |
| 111315 | /* PUNPCKHWDrr */ |
| 111316 | VR128, VR128, VR128, |
| 111317 | /* PUNPCKLBWrm */ |
| 111318 | VR128, VR128, i128mem, |
| 111319 | /* PUNPCKLBWrr */ |
| 111320 | VR128, VR128, VR128, |
| 111321 | /* PUNPCKLDQrm */ |
| 111322 | VR128, VR128, i128mem, |
| 111323 | /* PUNPCKLDQrr */ |
| 111324 | VR128, VR128, VR128, |
| 111325 | /* PUNPCKLQDQrm */ |
| 111326 | VR128, VR128, i128mem, |
| 111327 | /* PUNPCKLQDQrr */ |
| 111328 | VR128, VR128, VR128, |
| 111329 | /* PUNPCKLWDrm */ |
| 111330 | VR128, VR128, i128mem, |
| 111331 | /* PUNPCKLWDrr */ |
| 111332 | VR128, VR128, VR128, |
| 111333 | /* PUSH16i */ |
| 111334 | i16imm, |
| 111335 | /* PUSH16i8 */ |
| 111336 | i16i8imm, |
| 111337 | /* PUSH16r */ |
| 111338 | GR16, |
| 111339 | /* PUSH16rmm */ |
| 111340 | i16mem, |
| 111341 | /* PUSH16rmr */ |
| 111342 | GR16, |
| 111343 | /* PUSH2 */ |
| 111344 | GR64, GR64, |
| 111345 | /* PUSH2P */ |
| 111346 | GR64, GR64, |
| 111347 | /* PUSH32i */ |
| 111348 | i32imm, |
| 111349 | /* PUSH32i8 */ |
| 111350 | i32i8imm, |
| 111351 | /* PUSH32r */ |
| 111352 | GR32, |
| 111353 | /* PUSH32rmm */ |
| 111354 | i32mem, |
| 111355 | /* PUSH32rmr */ |
| 111356 | GR32, |
| 111357 | /* PUSH64i32 */ |
| 111358 | i64i32imm, |
| 111359 | /* PUSH64i8 */ |
| 111360 | i64i8imm, |
| 111361 | /* PUSH64r */ |
| 111362 | GR64, |
| 111363 | /* PUSH64rmm */ |
| 111364 | i64mem, |
| 111365 | /* PUSH64rmr */ |
| 111366 | GR64, |
| 111367 | /* PUSHA16 */ |
| 111368 | /* PUSHA32 */ |
| 111369 | /* PUSHCS16 */ |
| 111370 | /* PUSHCS32 */ |
| 111371 | /* PUSHDS16 */ |
| 111372 | /* PUSHDS32 */ |
| 111373 | /* PUSHES16 */ |
| 111374 | /* PUSHES32 */ |
| 111375 | /* PUSHF16 */ |
| 111376 | /* PUSHF32 */ |
| 111377 | /* PUSHF64 */ |
| 111378 | /* PUSHFS16 */ |
| 111379 | /* PUSHFS32 */ |
| 111380 | /* PUSHFS64 */ |
| 111381 | /* PUSHGS16 */ |
| 111382 | /* PUSHGS32 */ |
| 111383 | /* PUSHGS64 */ |
| 111384 | /* PUSHP64r */ |
| 111385 | GR64, |
| 111386 | /* PUSHSS16 */ |
| 111387 | /* PUSHSS32 */ |
| 111388 | /* PVALIDATE32 */ |
| 111389 | /* PVALIDATE64 */ |
| 111390 | /* PXORrm */ |
| 111391 | VR128, VR128, i128mem, |
| 111392 | /* PXORrr */ |
| 111393 | VR128, VR128, VR128, |
| 111394 | /* RCL16m1 */ |
| 111395 | i16mem, |
| 111396 | /* RCL16m1_EVEX */ |
| 111397 | i16mem, |
| 111398 | /* RCL16m1_ND */ |
| 111399 | GR16, i16mem, |
| 111400 | /* RCL16mCL */ |
| 111401 | i16mem, |
| 111402 | /* RCL16mCL_EVEX */ |
| 111403 | i16mem, |
| 111404 | /* RCL16mCL_ND */ |
| 111405 | GR16, i16mem, |
| 111406 | /* RCL16mi */ |
| 111407 | i16mem, u8imm, |
| 111408 | /* RCL16mi_EVEX */ |
| 111409 | i16mem, u8imm, |
| 111410 | /* RCL16mi_ND */ |
| 111411 | GR16, i16mem, u8imm, |
| 111412 | /* RCL16r1 */ |
| 111413 | GR16, GR16, |
| 111414 | /* RCL16r1_EVEX */ |
| 111415 | GR16, GR16, |
| 111416 | /* RCL16r1_ND */ |
| 111417 | GR16, GR16, |
| 111418 | /* RCL16rCL */ |
| 111419 | GR16, GR16, |
| 111420 | /* RCL16rCL_EVEX */ |
| 111421 | GR16, GR16, |
| 111422 | /* RCL16rCL_ND */ |
| 111423 | GR16, GR16, |
| 111424 | /* RCL16ri */ |
| 111425 | GR16, GR16, u8imm, |
| 111426 | /* RCL16ri_EVEX */ |
| 111427 | GR16, GR16, u8imm, |
| 111428 | /* RCL16ri_ND */ |
| 111429 | GR16, GR16, u8imm, |
| 111430 | /* RCL32m1 */ |
| 111431 | i32mem, |
| 111432 | /* RCL32m1_EVEX */ |
| 111433 | i32mem, |
| 111434 | /* RCL32m1_ND */ |
| 111435 | GR32, i32mem, |
| 111436 | /* RCL32mCL */ |
| 111437 | i32mem, |
| 111438 | /* RCL32mCL_EVEX */ |
| 111439 | i32mem, |
| 111440 | /* RCL32mCL_ND */ |
| 111441 | GR32, i32mem, |
| 111442 | /* RCL32mi */ |
| 111443 | i32mem, u8imm, |
| 111444 | /* RCL32mi_EVEX */ |
| 111445 | i32mem, u8imm, |
| 111446 | /* RCL32mi_ND */ |
| 111447 | GR32, i32mem, u8imm, |
| 111448 | /* RCL32r1 */ |
| 111449 | GR32, GR32, |
| 111450 | /* RCL32r1_EVEX */ |
| 111451 | GR32, GR32, |
| 111452 | /* RCL32r1_ND */ |
| 111453 | GR32, GR32, |
| 111454 | /* RCL32rCL */ |
| 111455 | GR32, GR32, |
| 111456 | /* RCL32rCL_EVEX */ |
| 111457 | GR32, GR32, |
| 111458 | /* RCL32rCL_ND */ |
| 111459 | GR32, GR32, |
| 111460 | /* RCL32ri */ |
| 111461 | GR32, GR32, u8imm, |
| 111462 | /* RCL32ri_EVEX */ |
| 111463 | GR32, GR32, u8imm, |
| 111464 | /* RCL32ri_ND */ |
| 111465 | GR32, GR32, u8imm, |
| 111466 | /* RCL64m1 */ |
| 111467 | i64mem, |
| 111468 | /* RCL64m1_EVEX */ |
| 111469 | i64mem, |
| 111470 | /* RCL64m1_ND */ |
| 111471 | GR64, i64mem, |
| 111472 | /* RCL64mCL */ |
| 111473 | i64mem, |
| 111474 | /* RCL64mCL_EVEX */ |
| 111475 | i64mem, |
| 111476 | /* RCL64mCL_ND */ |
| 111477 | GR64, i64mem, |
| 111478 | /* RCL64mi */ |
| 111479 | i64mem, u8imm, |
| 111480 | /* RCL64mi_EVEX */ |
| 111481 | i64mem, u8imm, |
| 111482 | /* RCL64mi_ND */ |
| 111483 | GR64, i64mem, u8imm, |
| 111484 | /* RCL64r1 */ |
| 111485 | GR64, GR64, |
| 111486 | /* RCL64r1_EVEX */ |
| 111487 | GR64, GR64, |
| 111488 | /* RCL64r1_ND */ |
| 111489 | GR64, GR64, |
| 111490 | /* RCL64rCL */ |
| 111491 | GR64, GR64, |
| 111492 | /* RCL64rCL_EVEX */ |
| 111493 | GR64, GR64, |
| 111494 | /* RCL64rCL_ND */ |
| 111495 | GR64, GR64, |
| 111496 | /* RCL64ri */ |
| 111497 | GR64, GR64, u8imm, |
| 111498 | /* RCL64ri_EVEX */ |
| 111499 | GR64, GR64, u8imm, |
| 111500 | /* RCL64ri_ND */ |
| 111501 | GR64, GR64, u8imm, |
| 111502 | /* RCL8m1 */ |
| 111503 | i8mem, |
| 111504 | /* RCL8m1_EVEX */ |
| 111505 | i8mem, |
| 111506 | /* RCL8m1_ND */ |
| 111507 | GR8, i8mem, |
| 111508 | /* RCL8mCL */ |
| 111509 | i8mem, |
| 111510 | /* RCL8mCL_EVEX */ |
| 111511 | i8mem, |
| 111512 | /* RCL8mCL_ND */ |
| 111513 | GR8, i8mem, |
| 111514 | /* RCL8mi */ |
| 111515 | i8mem, u8imm, |
| 111516 | /* RCL8mi_EVEX */ |
| 111517 | i8mem, u8imm, |
| 111518 | /* RCL8mi_ND */ |
| 111519 | GR8, i8mem, u8imm, |
| 111520 | /* RCL8r1 */ |
| 111521 | GR8, GR8, |
| 111522 | /* RCL8r1_EVEX */ |
| 111523 | GR8, GR8, |
| 111524 | /* RCL8r1_ND */ |
| 111525 | GR8, GR8, |
| 111526 | /* RCL8rCL */ |
| 111527 | GR8, GR8, |
| 111528 | /* RCL8rCL_EVEX */ |
| 111529 | GR8, GR8, |
| 111530 | /* RCL8rCL_ND */ |
| 111531 | GR8, GR8, |
| 111532 | /* RCL8ri */ |
| 111533 | GR8, GR8, u8imm, |
| 111534 | /* RCL8ri_EVEX */ |
| 111535 | GR8, GR8, u8imm, |
| 111536 | /* RCL8ri_ND */ |
| 111537 | GR8, GR8, u8imm, |
| 111538 | /* RCPPSm */ |
| 111539 | VR128, f128mem, |
| 111540 | /* RCPPSr */ |
| 111541 | VR128, VR128, |
| 111542 | /* RCPSSm */ |
| 111543 | FR32, f32mem, |
| 111544 | /* RCPSSm_Int */ |
| 111545 | VR128, VR128, ssmem, |
| 111546 | /* RCPSSr */ |
| 111547 | FR32, FR32, |
| 111548 | /* RCPSSr_Int */ |
| 111549 | VR128, VR128, VR128, |
| 111550 | /* RCR16m1 */ |
| 111551 | i16mem, |
| 111552 | /* RCR16m1_EVEX */ |
| 111553 | i16mem, |
| 111554 | /* RCR16m1_ND */ |
| 111555 | GR16, i16mem, |
| 111556 | /* RCR16mCL */ |
| 111557 | i16mem, |
| 111558 | /* RCR16mCL_EVEX */ |
| 111559 | i16mem, |
| 111560 | /* RCR16mCL_ND */ |
| 111561 | GR16, i16mem, |
| 111562 | /* RCR16mi */ |
| 111563 | i16mem, u8imm, |
| 111564 | /* RCR16mi_EVEX */ |
| 111565 | i16mem, u8imm, |
| 111566 | /* RCR16mi_ND */ |
| 111567 | GR16, i16mem, u8imm, |
| 111568 | /* RCR16r1 */ |
| 111569 | GR16, GR16, |
| 111570 | /* RCR16r1_EVEX */ |
| 111571 | GR16, GR16, |
| 111572 | /* RCR16r1_ND */ |
| 111573 | GR16, GR16, |
| 111574 | /* RCR16rCL */ |
| 111575 | GR16, GR16, |
| 111576 | /* RCR16rCL_EVEX */ |
| 111577 | GR16, GR16, |
| 111578 | /* RCR16rCL_ND */ |
| 111579 | GR16, GR16, |
| 111580 | /* RCR16ri */ |
| 111581 | GR16, GR16, u8imm, |
| 111582 | /* RCR16ri_EVEX */ |
| 111583 | GR16, GR16, u8imm, |
| 111584 | /* RCR16ri_ND */ |
| 111585 | GR16, GR16, u8imm, |
| 111586 | /* RCR32m1 */ |
| 111587 | i32mem, |
| 111588 | /* RCR32m1_EVEX */ |
| 111589 | i32mem, |
| 111590 | /* RCR32m1_ND */ |
| 111591 | GR32, i32mem, |
| 111592 | /* RCR32mCL */ |
| 111593 | i32mem, |
| 111594 | /* RCR32mCL_EVEX */ |
| 111595 | i32mem, |
| 111596 | /* RCR32mCL_ND */ |
| 111597 | GR32, i32mem, |
| 111598 | /* RCR32mi */ |
| 111599 | i32mem, u8imm, |
| 111600 | /* RCR32mi_EVEX */ |
| 111601 | i32mem, u8imm, |
| 111602 | /* RCR32mi_ND */ |
| 111603 | GR32, i32mem, u8imm, |
| 111604 | /* RCR32r1 */ |
| 111605 | GR32, GR32, |
| 111606 | /* RCR32r1_EVEX */ |
| 111607 | GR32, GR32, |
| 111608 | /* RCR32r1_ND */ |
| 111609 | GR32, GR32, |
| 111610 | /* RCR32rCL */ |
| 111611 | GR32, GR32, |
| 111612 | /* RCR32rCL_EVEX */ |
| 111613 | GR32, GR32, |
| 111614 | /* RCR32rCL_ND */ |
| 111615 | GR32, GR32, |
| 111616 | /* RCR32ri */ |
| 111617 | GR32, GR32, u8imm, |
| 111618 | /* RCR32ri_EVEX */ |
| 111619 | GR32, GR32, u8imm, |
| 111620 | /* RCR32ri_ND */ |
| 111621 | GR32, GR32, u8imm, |
| 111622 | /* RCR64m1 */ |
| 111623 | i64mem, |
| 111624 | /* RCR64m1_EVEX */ |
| 111625 | i64mem, |
| 111626 | /* RCR64m1_ND */ |
| 111627 | GR64, i64mem, |
| 111628 | /* RCR64mCL */ |
| 111629 | i64mem, |
| 111630 | /* RCR64mCL_EVEX */ |
| 111631 | i64mem, |
| 111632 | /* RCR64mCL_ND */ |
| 111633 | GR64, i64mem, |
| 111634 | /* RCR64mi */ |
| 111635 | i64mem, u8imm, |
| 111636 | /* RCR64mi_EVEX */ |
| 111637 | i64mem, u8imm, |
| 111638 | /* RCR64mi_ND */ |
| 111639 | GR64, i64mem, u8imm, |
| 111640 | /* RCR64r1 */ |
| 111641 | GR64, GR64, |
| 111642 | /* RCR64r1_EVEX */ |
| 111643 | GR64, GR64, |
| 111644 | /* RCR64r1_ND */ |
| 111645 | GR64, GR64, |
| 111646 | /* RCR64rCL */ |
| 111647 | GR64, GR64, |
| 111648 | /* RCR64rCL_EVEX */ |
| 111649 | GR64, GR64, |
| 111650 | /* RCR64rCL_ND */ |
| 111651 | GR64, GR64, |
| 111652 | /* RCR64ri */ |
| 111653 | GR64, GR64, u8imm, |
| 111654 | /* RCR64ri_EVEX */ |
| 111655 | GR64, GR64, u8imm, |
| 111656 | /* RCR64ri_ND */ |
| 111657 | GR64, GR64, u8imm, |
| 111658 | /* RCR8m1 */ |
| 111659 | i8mem, |
| 111660 | /* RCR8m1_EVEX */ |
| 111661 | i8mem, |
| 111662 | /* RCR8m1_ND */ |
| 111663 | GR8, i8mem, |
| 111664 | /* RCR8mCL */ |
| 111665 | i8mem, |
| 111666 | /* RCR8mCL_EVEX */ |
| 111667 | i8mem, |
| 111668 | /* RCR8mCL_ND */ |
| 111669 | GR8, i8mem, |
| 111670 | /* RCR8mi */ |
| 111671 | i8mem, u8imm, |
| 111672 | /* RCR8mi_EVEX */ |
| 111673 | i8mem, u8imm, |
| 111674 | /* RCR8mi_ND */ |
| 111675 | GR8, i8mem, u8imm, |
| 111676 | /* RCR8r1 */ |
| 111677 | GR8, GR8, |
| 111678 | /* RCR8r1_EVEX */ |
| 111679 | GR8, GR8, |
| 111680 | /* RCR8r1_ND */ |
| 111681 | GR8, GR8, |
| 111682 | /* RCR8rCL */ |
| 111683 | GR8, GR8, |
| 111684 | /* RCR8rCL_EVEX */ |
| 111685 | GR8, GR8, |
| 111686 | /* RCR8rCL_ND */ |
| 111687 | GR8, GR8, |
| 111688 | /* RCR8ri */ |
| 111689 | GR8, GR8, u8imm, |
| 111690 | /* RCR8ri_EVEX */ |
| 111691 | GR8, GR8, u8imm, |
| 111692 | /* RCR8ri_ND */ |
| 111693 | GR8, GR8, u8imm, |
| 111694 | /* RDFSBASE */ |
| 111695 | GR32, |
| 111696 | /* RDFSBASE64 */ |
| 111697 | GR64, |
| 111698 | /* RDGSBASE */ |
| 111699 | GR32, |
| 111700 | /* RDGSBASE64 */ |
| 111701 | GR64, |
| 111702 | /* RDMSR */ |
| 111703 | /* RDMSRLIST */ |
| 111704 | /* RDPID32 */ |
| 111705 | GR32, |
| 111706 | /* RDPID64 */ |
| 111707 | GR64, |
| 111708 | /* RDPKRUr */ |
| 111709 | /* RDPMC */ |
| 111710 | /* RDPRU */ |
| 111711 | /* RDRAND16r */ |
| 111712 | GR16, |
| 111713 | /* RDRAND32r */ |
| 111714 | GR32, |
| 111715 | /* RDRAND64r */ |
| 111716 | GR64, |
| 111717 | /* RDSEED16r */ |
| 111718 | GR16, |
| 111719 | /* RDSEED32r */ |
| 111720 | GR32, |
| 111721 | /* RDSEED64r */ |
| 111722 | GR64, |
| 111723 | /* RDSSPD */ |
| 111724 | GR32, GR32, |
| 111725 | /* RDSSPQ */ |
| 111726 | GR64, GR64, |
| 111727 | /* RDTSC */ |
| 111728 | /* RDTSCP */ |
| 111729 | /* REPNE_PREFIX */ |
| 111730 | /* REP_MOVSB_32 */ |
| 111731 | /* REP_MOVSB_64 */ |
| 111732 | /* REP_MOVSD_32 */ |
| 111733 | /* REP_MOVSD_64 */ |
| 111734 | /* REP_MOVSQ_32 */ |
| 111735 | /* REP_MOVSQ_64 */ |
| 111736 | /* REP_MOVSW_32 */ |
| 111737 | /* REP_MOVSW_64 */ |
| 111738 | /* REP_PREFIX */ |
| 111739 | /* REP_STOSB_32 */ |
| 111740 | /* REP_STOSB_64 */ |
| 111741 | /* REP_STOSD_32 */ |
| 111742 | /* REP_STOSD_64 */ |
| 111743 | /* REP_STOSQ_32 */ |
| 111744 | /* REP_STOSQ_64 */ |
| 111745 | /* REP_STOSW_32 */ |
| 111746 | /* REP_STOSW_64 */ |
| 111747 | /* RET */ |
| 111748 | i32imm, |
| 111749 | /* RET16 */ |
| 111750 | /* RET32 */ |
| 111751 | /* RET64 */ |
| 111752 | /* RETI16 */ |
| 111753 | i16imm, |
| 111754 | /* RETI32 */ |
| 111755 | i16imm, |
| 111756 | /* RETI64 */ |
| 111757 | i16imm, |
| 111758 | /* REX64_PREFIX */ |
| 111759 | /* RMPADJUST */ |
| 111760 | /* RMPQUERY */ |
| 111761 | /* RMPUPDATE */ |
| 111762 | /* ROL16m1 */ |
| 111763 | i16mem, |
| 111764 | /* ROL16m1_EVEX */ |
| 111765 | i16mem, |
| 111766 | /* ROL16m1_ND */ |
| 111767 | GR16, i16mem, |
| 111768 | /* ROL16m1_NF */ |
| 111769 | i16mem, |
| 111770 | /* ROL16m1_NF_ND */ |
| 111771 | GR16, i16mem, |
| 111772 | /* ROL16mCL */ |
| 111773 | i16mem, |
| 111774 | /* ROL16mCL_EVEX */ |
| 111775 | i16mem, |
| 111776 | /* ROL16mCL_ND */ |
| 111777 | GR16, i16mem, |
| 111778 | /* ROL16mCL_NF */ |
| 111779 | i16mem, |
| 111780 | /* ROL16mCL_NF_ND */ |
| 111781 | GR16, i16mem, |
| 111782 | /* ROL16mi */ |
| 111783 | i16mem, u8imm, |
| 111784 | /* ROL16mi_EVEX */ |
| 111785 | i16mem, u8imm, |
| 111786 | /* ROL16mi_ND */ |
| 111787 | GR16, i16mem, u8imm, |
| 111788 | /* ROL16mi_NF */ |
| 111789 | i16mem, u8imm, |
| 111790 | /* ROL16mi_NF_ND */ |
| 111791 | GR16, i16mem, u8imm, |
| 111792 | /* ROL16r1 */ |
| 111793 | GR16, GR16, |
| 111794 | /* ROL16r1_EVEX */ |
| 111795 | GR16, GR16, |
| 111796 | /* ROL16r1_ND */ |
| 111797 | GR16, GR16, |
| 111798 | /* ROL16r1_NF */ |
| 111799 | GR16, GR16, |
| 111800 | /* ROL16r1_NF_ND */ |
| 111801 | GR16, GR16, |
| 111802 | /* ROL16rCL */ |
| 111803 | GR16, GR16, |
| 111804 | /* ROL16rCL_EVEX */ |
| 111805 | GR16, GR16, |
| 111806 | /* ROL16rCL_ND */ |
| 111807 | GR16, GR16, |
| 111808 | /* ROL16rCL_NF */ |
| 111809 | GR16, GR16, |
| 111810 | /* ROL16rCL_NF_ND */ |
| 111811 | GR16, GR16, |
| 111812 | /* ROL16ri */ |
| 111813 | GR16, GR16, u8imm, |
| 111814 | /* ROL16ri_EVEX */ |
| 111815 | GR16, GR16, u8imm, |
| 111816 | /* ROL16ri_ND */ |
| 111817 | GR16, GR16, u8imm, |
| 111818 | /* ROL16ri_NF */ |
| 111819 | GR16, GR16, u8imm, |
| 111820 | /* ROL16ri_NF_ND */ |
| 111821 | GR16, GR16, u8imm, |
| 111822 | /* ROL32m1 */ |
| 111823 | i32mem, |
| 111824 | /* ROL32m1_EVEX */ |
| 111825 | i32mem, |
| 111826 | /* ROL32m1_ND */ |
| 111827 | GR32, i32mem, |
| 111828 | /* ROL32m1_NF */ |
| 111829 | i32mem, |
| 111830 | /* ROL32m1_NF_ND */ |
| 111831 | GR32, i32mem, |
| 111832 | /* ROL32mCL */ |
| 111833 | i32mem, |
| 111834 | /* ROL32mCL_EVEX */ |
| 111835 | i32mem, |
| 111836 | /* ROL32mCL_ND */ |
| 111837 | GR32, i32mem, |
| 111838 | /* ROL32mCL_NF */ |
| 111839 | i32mem, |
| 111840 | /* ROL32mCL_NF_ND */ |
| 111841 | GR32, i32mem, |
| 111842 | /* ROL32mi */ |
| 111843 | i32mem, u8imm, |
| 111844 | /* ROL32mi_EVEX */ |
| 111845 | i32mem, u8imm, |
| 111846 | /* ROL32mi_ND */ |
| 111847 | GR32, i32mem, u8imm, |
| 111848 | /* ROL32mi_NF */ |
| 111849 | i32mem, u8imm, |
| 111850 | /* ROL32mi_NF_ND */ |
| 111851 | GR32, i32mem, u8imm, |
| 111852 | /* ROL32r1 */ |
| 111853 | GR32, GR32, |
| 111854 | /* ROL32r1_EVEX */ |
| 111855 | GR32, GR32, |
| 111856 | /* ROL32r1_ND */ |
| 111857 | GR32, GR32, |
| 111858 | /* ROL32r1_NF */ |
| 111859 | GR32, GR32, |
| 111860 | /* ROL32r1_NF_ND */ |
| 111861 | GR32, GR32, |
| 111862 | /* ROL32rCL */ |
| 111863 | GR32, GR32, |
| 111864 | /* ROL32rCL_EVEX */ |
| 111865 | GR32, GR32, |
| 111866 | /* ROL32rCL_ND */ |
| 111867 | GR32, GR32, |
| 111868 | /* ROL32rCL_NF */ |
| 111869 | GR32, GR32, |
| 111870 | /* ROL32rCL_NF_ND */ |
| 111871 | GR32, GR32, |
| 111872 | /* ROL32ri */ |
| 111873 | GR32, GR32, u8imm, |
| 111874 | /* ROL32ri_EVEX */ |
| 111875 | GR32, GR32, u8imm, |
| 111876 | /* ROL32ri_ND */ |
| 111877 | GR32, GR32, u8imm, |
| 111878 | /* ROL32ri_NF */ |
| 111879 | GR32, GR32, u8imm, |
| 111880 | /* ROL32ri_NF_ND */ |
| 111881 | GR32, GR32, u8imm, |
| 111882 | /* ROL64m1 */ |
| 111883 | i64mem, |
| 111884 | /* ROL64m1_EVEX */ |
| 111885 | i64mem, |
| 111886 | /* ROL64m1_ND */ |
| 111887 | GR64, i64mem, |
| 111888 | /* ROL64m1_NF */ |
| 111889 | i64mem, |
| 111890 | /* ROL64m1_NF_ND */ |
| 111891 | GR64, i64mem, |
| 111892 | /* ROL64mCL */ |
| 111893 | i64mem, |
| 111894 | /* ROL64mCL_EVEX */ |
| 111895 | i64mem, |
| 111896 | /* ROL64mCL_ND */ |
| 111897 | GR64, i64mem, |
| 111898 | /* ROL64mCL_NF */ |
| 111899 | i64mem, |
| 111900 | /* ROL64mCL_NF_ND */ |
| 111901 | GR64, i64mem, |
| 111902 | /* ROL64mi */ |
| 111903 | i64mem, u8imm, |
| 111904 | /* ROL64mi_EVEX */ |
| 111905 | i64mem, u8imm, |
| 111906 | /* ROL64mi_ND */ |
| 111907 | GR64, i64mem, u8imm, |
| 111908 | /* ROL64mi_NF */ |
| 111909 | i64mem, u8imm, |
| 111910 | /* ROL64mi_NF_ND */ |
| 111911 | GR64, i64mem, u8imm, |
| 111912 | /* ROL64r1 */ |
| 111913 | GR64, GR64, |
| 111914 | /* ROL64r1_EVEX */ |
| 111915 | GR64, GR64, |
| 111916 | /* ROL64r1_ND */ |
| 111917 | GR64, GR64, |
| 111918 | /* ROL64r1_NF */ |
| 111919 | GR64, GR64, |
| 111920 | /* ROL64r1_NF_ND */ |
| 111921 | GR64, GR64, |
| 111922 | /* ROL64rCL */ |
| 111923 | GR64, GR64, |
| 111924 | /* ROL64rCL_EVEX */ |
| 111925 | GR64, GR64, |
| 111926 | /* ROL64rCL_ND */ |
| 111927 | GR64, GR64, |
| 111928 | /* ROL64rCL_NF */ |
| 111929 | GR64, GR64, |
| 111930 | /* ROL64rCL_NF_ND */ |
| 111931 | GR64, GR64, |
| 111932 | /* ROL64ri */ |
| 111933 | GR64, GR64, u8imm, |
| 111934 | /* ROL64ri_EVEX */ |
| 111935 | GR64, GR64, u8imm, |
| 111936 | /* ROL64ri_ND */ |
| 111937 | GR64, GR64, u8imm, |
| 111938 | /* ROL64ri_NF */ |
| 111939 | GR64, GR64, u8imm, |
| 111940 | /* ROL64ri_NF_ND */ |
| 111941 | GR64, GR64, u8imm, |
| 111942 | /* ROL8m1 */ |
| 111943 | i8mem, |
| 111944 | /* ROL8m1_EVEX */ |
| 111945 | i8mem, |
| 111946 | /* ROL8m1_ND */ |
| 111947 | GR8, i8mem, |
| 111948 | /* ROL8m1_NF */ |
| 111949 | i8mem, |
| 111950 | /* ROL8m1_NF_ND */ |
| 111951 | GR8, i8mem, |
| 111952 | /* ROL8mCL */ |
| 111953 | i8mem, |
| 111954 | /* ROL8mCL_EVEX */ |
| 111955 | i8mem, |
| 111956 | /* ROL8mCL_ND */ |
| 111957 | GR8, i8mem, |
| 111958 | /* ROL8mCL_NF */ |
| 111959 | i8mem, |
| 111960 | /* ROL8mCL_NF_ND */ |
| 111961 | GR8, i8mem, |
| 111962 | /* ROL8mi */ |
| 111963 | i8mem, u8imm, |
| 111964 | /* ROL8mi_EVEX */ |
| 111965 | i8mem, u8imm, |
| 111966 | /* ROL8mi_ND */ |
| 111967 | GR8, i8mem, u8imm, |
| 111968 | /* ROL8mi_NF */ |
| 111969 | i8mem, u8imm, |
| 111970 | /* ROL8mi_NF_ND */ |
| 111971 | GR8, i8mem, u8imm, |
| 111972 | /* ROL8r1 */ |
| 111973 | GR8, GR8, |
| 111974 | /* ROL8r1_EVEX */ |
| 111975 | GR8, GR8, |
| 111976 | /* ROL8r1_ND */ |
| 111977 | GR8, GR8, |
| 111978 | /* ROL8r1_NF */ |
| 111979 | GR8, GR8, |
| 111980 | /* ROL8r1_NF_ND */ |
| 111981 | GR8, GR8, |
| 111982 | /* ROL8rCL */ |
| 111983 | GR8, GR8, |
| 111984 | /* ROL8rCL_EVEX */ |
| 111985 | GR8, GR8, |
| 111986 | /* ROL8rCL_ND */ |
| 111987 | GR8, GR8, |
| 111988 | /* ROL8rCL_NF */ |
| 111989 | GR8, GR8, |
| 111990 | /* ROL8rCL_NF_ND */ |
| 111991 | GR8, GR8, |
| 111992 | /* ROL8ri */ |
| 111993 | GR8, GR8, u8imm, |
| 111994 | /* ROL8ri_EVEX */ |
| 111995 | GR8, GR8, u8imm, |
| 111996 | /* ROL8ri_ND */ |
| 111997 | GR8, GR8, u8imm, |
| 111998 | /* ROL8ri_NF */ |
| 111999 | GR8, GR8, u8imm, |
| 112000 | /* ROL8ri_NF_ND */ |
| 112001 | GR8, GR8, u8imm, |
| 112002 | /* ROR16m1 */ |
| 112003 | i16mem, |
| 112004 | /* ROR16m1_EVEX */ |
| 112005 | i16mem, |
| 112006 | /* ROR16m1_ND */ |
| 112007 | GR16, i16mem, |
| 112008 | /* ROR16m1_NF */ |
| 112009 | i16mem, |
| 112010 | /* ROR16m1_NF_ND */ |
| 112011 | GR16, i16mem, |
| 112012 | /* ROR16mCL */ |
| 112013 | i16mem, |
| 112014 | /* ROR16mCL_EVEX */ |
| 112015 | i16mem, |
| 112016 | /* ROR16mCL_ND */ |
| 112017 | GR16, i16mem, |
| 112018 | /* ROR16mCL_NF */ |
| 112019 | i16mem, |
| 112020 | /* ROR16mCL_NF_ND */ |
| 112021 | GR16, i16mem, |
| 112022 | /* ROR16mi */ |
| 112023 | i16mem, u8imm, |
| 112024 | /* ROR16mi_EVEX */ |
| 112025 | i16mem, u8imm, |
| 112026 | /* ROR16mi_ND */ |
| 112027 | GR16, i16mem, u8imm, |
| 112028 | /* ROR16mi_NF */ |
| 112029 | i16mem, u8imm, |
| 112030 | /* ROR16mi_NF_ND */ |
| 112031 | GR16, i16mem, u8imm, |
| 112032 | /* ROR16r1 */ |
| 112033 | GR16, GR16, |
| 112034 | /* ROR16r1_EVEX */ |
| 112035 | GR16, GR16, |
| 112036 | /* ROR16r1_ND */ |
| 112037 | GR16, GR16, |
| 112038 | /* ROR16r1_NF */ |
| 112039 | GR16, GR16, |
| 112040 | /* ROR16r1_NF_ND */ |
| 112041 | GR16, GR16, |
| 112042 | /* ROR16rCL */ |
| 112043 | GR16, GR16, |
| 112044 | /* ROR16rCL_EVEX */ |
| 112045 | GR16, GR16, |
| 112046 | /* ROR16rCL_ND */ |
| 112047 | GR16, GR16, |
| 112048 | /* ROR16rCL_NF */ |
| 112049 | GR16, GR16, |
| 112050 | /* ROR16rCL_NF_ND */ |
| 112051 | GR16, GR16, |
| 112052 | /* ROR16ri */ |
| 112053 | GR16, GR16, u8imm, |
| 112054 | /* ROR16ri_EVEX */ |
| 112055 | GR16, GR16, u8imm, |
| 112056 | /* ROR16ri_ND */ |
| 112057 | GR16, GR16, u8imm, |
| 112058 | /* ROR16ri_NF */ |
| 112059 | GR16, GR16, u8imm, |
| 112060 | /* ROR16ri_NF_ND */ |
| 112061 | GR16, GR16, u8imm, |
| 112062 | /* ROR32m1 */ |
| 112063 | i32mem, |
| 112064 | /* ROR32m1_EVEX */ |
| 112065 | i32mem, |
| 112066 | /* ROR32m1_ND */ |
| 112067 | GR32, i32mem, |
| 112068 | /* ROR32m1_NF */ |
| 112069 | i32mem, |
| 112070 | /* ROR32m1_NF_ND */ |
| 112071 | GR32, i32mem, |
| 112072 | /* ROR32mCL */ |
| 112073 | i32mem, |
| 112074 | /* ROR32mCL_EVEX */ |
| 112075 | i32mem, |
| 112076 | /* ROR32mCL_ND */ |
| 112077 | GR32, i32mem, |
| 112078 | /* ROR32mCL_NF */ |
| 112079 | i32mem, |
| 112080 | /* ROR32mCL_NF_ND */ |
| 112081 | GR32, i32mem, |
| 112082 | /* ROR32mi */ |
| 112083 | i32mem, u8imm, |
| 112084 | /* ROR32mi_EVEX */ |
| 112085 | i32mem, u8imm, |
| 112086 | /* ROR32mi_ND */ |
| 112087 | GR32, i32mem, u8imm, |
| 112088 | /* ROR32mi_NF */ |
| 112089 | i32mem, u8imm, |
| 112090 | /* ROR32mi_NF_ND */ |
| 112091 | GR32, i32mem, u8imm, |
| 112092 | /* ROR32r1 */ |
| 112093 | GR32, GR32, |
| 112094 | /* ROR32r1_EVEX */ |
| 112095 | GR32, GR32, |
| 112096 | /* ROR32r1_ND */ |
| 112097 | GR32, GR32, |
| 112098 | /* ROR32r1_NF */ |
| 112099 | GR32, GR32, |
| 112100 | /* ROR32r1_NF_ND */ |
| 112101 | GR32, GR32, |
| 112102 | /* ROR32rCL */ |
| 112103 | GR32, GR32, |
| 112104 | /* ROR32rCL_EVEX */ |
| 112105 | GR32, GR32, |
| 112106 | /* ROR32rCL_ND */ |
| 112107 | GR32, GR32, |
| 112108 | /* ROR32rCL_NF */ |
| 112109 | GR32, GR32, |
| 112110 | /* ROR32rCL_NF_ND */ |
| 112111 | GR32, GR32, |
| 112112 | /* ROR32ri */ |
| 112113 | GR32, GR32, u8imm, |
| 112114 | /* ROR32ri_EVEX */ |
| 112115 | GR32, GR32, u8imm, |
| 112116 | /* ROR32ri_ND */ |
| 112117 | GR32, GR32, u8imm, |
| 112118 | /* ROR32ri_NF */ |
| 112119 | GR32, GR32, u8imm, |
| 112120 | /* ROR32ri_NF_ND */ |
| 112121 | GR32, GR32, u8imm, |
| 112122 | /* ROR64m1 */ |
| 112123 | i64mem, |
| 112124 | /* ROR64m1_EVEX */ |
| 112125 | i64mem, |
| 112126 | /* ROR64m1_ND */ |
| 112127 | GR64, i64mem, |
| 112128 | /* ROR64m1_NF */ |
| 112129 | i64mem, |
| 112130 | /* ROR64m1_NF_ND */ |
| 112131 | GR64, i64mem, |
| 112132 | /* ROR64mCL */ |
| 112133 | i64mem, |
| 112134 | /* ROR64mCL_EVEX */ |
| 112135 | i64mem, |
| 112136 | /* ROR64mCL_ND */ |
| 112137 | GR64, i64mem, |
| 112138 | /* ROR64mCL_NF */ |
| 112139 | i64mem, |
| 112140 | /* ROR64mCL_NF_ND */ |
| 112141 | GR64, i64mem, |
| 112142 | /* ROR64mi */ |
| 112143 | i64mem, u8imm, |
| 112144 | /* ROR64mi_EVEX */ |
| 112145 | i64mem, u8imm, |
| 112146 | /* ROR64mi_ND */ |
| 112147 | GR64, i64mem, u8imm, |
| 112148 | /* ROR64mi_NF */ |
| 112149 | i64mem, u8imm, |
| 112150 | /* ROR64mi_NF_ND */ |
| 112151 | GR64, i64mem, u8imm, |
| 112152 | /* ROR64r1 */ |
| 112153 | GR64, GR64, |
| 112154 | /* ROR64r1_EVEX */ |
| 112155 | GR64, GR64, |
| 112156 | /* ROR64r1_ND */ |
| 112157 | GR64, GR64, |
| 112158 | /* ROR64r1_NF */ |
| 112159 | GR64, GR64, |
| 112160 | /* ROR64r1_NF_ND */ |
| 112161 | GR64, GR64, |
| 112162 | /* ROR64rCL */ |
| 112163 | GR64, GR64, |
| 112164 | /* ROR64rCL_EVEX */ |
| 112165 | GR64, GR64, |
| 112166 | /* ROR64rCL_ND */ |
| 112167 | GR64, GR64, |
| 112168 | /* ROR64rCL_NF */ |
| 112169 | GR64, GR64, |
| 112170 | /* ROR64rCL_NF_ND */ |
| 112171 | GR64, GR64, |
| 112172 | /* ROR64ri */ |
| 112173 | GR64, GR64, u8imm, |
| 112174 | /* ROR64ri_EVEX */ |
| 112175 | GR64, GR64, u8imm, |
| 112176 | /* ROR64ri_ND */ |
| 112177 | GR64, GR64, u8imm, |
| 112178 | /* ROR64ri_NF */ |
| 112179 | GR64, GR64, u8imm, |
| 112180 | /* ROR64ri_NF_ND */ |
| 112181 | GR64, GR64, u8imm, |
| 112182 | /* ROR8m1 */ |
| 112183 | i8mem, |
| 112184 | /* ROR8m1_EVEX */ |
| 112185 | i8mem, |
| 112186 | /* ROR8m1_ND */ |
| 112187 | GR8, i8mem, |
| 112188 | /* ROR8m1_NF */ |
| 112189 | i8mem, |
| 112190 | /* ROR8m1_NF_ND */ |
| 112191 | GR8, i8mem, |
| 112192 | /* ROR8mCL */ |
| 112193 | i8mem, |
| 112194 | /* ROR8mCL_EVEX */ |
| 112195 | i8mem, |
| 112196 | /* ROR8mCL_ND */ |
| 112197 | GR8, i8mem, |
| 112198 | /* ROR8mCL_NF */ |
| 112199 | i8mem, |
| 112200 | /* ROR8mCL_NF_ND */ |
| 112201 | GR8, i8mem, |
| 112202 | /* ROR8mi */ |
| 112203 | i8mem, u8imm, |
| 112204 | /* ROR8mi_EVEX */ |
| 112205 | i8mem, u8imm, |
| 112206 | /* ROR8mi_ND */ |
| 112207 | GR8, i8mem, u8imm, |
| 112208 | /* ROR8mi_NF */ |
| 112209 | i8mem, u8imm, |
| 112210 | /* ROR8mi_NF_ND */ |
| 112211 | GR8, i8mem, u8imm, |
| 112212 | /* ROR8r1 */ |
| 112213 | GR8, GR8, |
| 112214 | /* ROR8r1_EVEX */ |
| 112215 | GR8, GR8, |
| 112216 | /* ROR8r1_ND */ |
| 112217 | GR8, GR8, |
| 112218 | /* ROR8r1_NF */ |
| 112219 | GR8, GR8, |
| 112220 | /* ROR8r1_NF_ND */ |
| 112221 | GR8, GR8, |
| 112222 | /* ROR8rCL */ |
| 112223 | GR8, GR8, |
| 112224 | /* ROR8rCL_EVEX */ |
| 112225 | GR8, GR8, |
| 112226 | /* ROR8rCL_ND */ |
| 112227 | GR8, GR8, |
| 112228 | /* ROR8rCL_NF */ |
| 112229 | GR8, GR8, |
| 112230 | /* ROR8rCL_NF_ND */ |
| 112231 | GR8, GR8, |
| 112232 | /* ROR8ri */ |
| 112233 | GR8, GR8, u8imm, |
| 112234 | /* ROR8ri_EVEX */ |
| 112235 | GR8, GR8, u8imm, |
| 112236 | /* ROR8ri_ND */ |
| 112237 | GR8, GR8, u8imm, |
| 112238 | /* ROR8ri_NF */ |
| 112239 | GR8, GR8, u8imm, |
| 112240 | /* ROR8ri_NF_ND */ |
| 112241 | GR8, GR8, u8imm, |
| 112242 | /* RORX32mi */ |
| 112243 | GR32, i32mem, u8imm, |
| 112244 | /* RORX32mi_EVEX */ |
| 112245 | GR32, i32mem, u8imm, |
| 112246 | /* RORX32ri */ |
| 112247 | GR32, GR32, u8imm, |
| 112248 | /* RORX32ri_EVEX */ |
| 112249 | GR32, GR32, u8imm, |
| 112250 | /* RORX64mi */ |
| 112251 | GR64, i64mem, u8imm, |
| 112252 | /* RORX64mi_EVEX */ |
| 112253 | GR64, i64mem, u8imm, |
| 112254 | /* RORX64ri */ |
| 112255 | GR64, GR64, u8imm, |
| 112256 | /* RORX64ri_EVEX */ |
| 112257 | GR64, GR64, u8imm, |
| 112258 | /* ROUNDPDmi */ |
| 112259 | VR128, f128mem, i32u8imm, |
| 112260 | /* ROUNDPDri */ |
| 112261 | VR128, VR128, i32u8imm, |
| 112262 | /* ROUNDPSmi */ |
| 112263 | VR128, f128mem, i32u8imm, |
| 112264 | /* ROUNDPSri */ |
| 112265 | VR128, VR128, i32u8imm, |
| 112266 | /* ROUNDSDmi */ |
| 112267 | FR64, f64mem, i32u8imm, |
| 112268 | /* ROUNDSDmi_Int */ |
| 112269 | VR128, VR128, sdmem, i32u8imm, |
| 112270 | /* ROUNDSDri */ |
| 112271 | FR64, FR64, i32u8imm, |
| 112272 | /* ROUNDSDri_Int */ |
| 112273 | VR128, VR128, VR128, i32u8imm, |
| 112274 | /* ROUNDSSmi */ |
| 112275 | FR32, f32mem, i32u8imm, |
| 112276 | /* ROUNDSSmi_Int */ |
| 112277 | VR128, VR128, ssmem, i32u8imm, |
| 112278 | /* ROUNDSSri */ |
| 112279 | FR32, FR32, i32u8imm, |
| 112280 | /* ROUNDSSri_Int */ |
| 112281 | VR128, VR128, VR128, i32u8imm, |
| 112282 | /* RSM */ |
| 112283 | /* RSQRTPSm */ |
| 112284 | VR128, f128mem, |
| 112285 | /* RSQRTPSr */ |
| 112286 | VR128, VR128, |
| 112287 | /* RSQRTSSm */ |
| 112288 | FR32, f32mem, |
| 112289 | /* RSQRTSSm_Int */ |
| 112290 | VR128, VR128, ssmem, |
| 112291 | /* RSQRTSSr */ |
| 112292 | FR32, FR32, |
| 112293 | /* RSQRTSSr_Int */ |
| 112294 | VR128, VR128, VR128, |
| 112295 | /* RSTORSSP */ |
| 112296 | i32mem, |
| 112297 | /* SAHF */ |
| 112298 | /* SALC */ |
| 112299 | /* SAR16m1 */ |
| 112300 | i16mem, |
| 112301 | /* SAR16m1_EVEX */ |
| 112302 | i16mem, |
| 112303 | /* SAR16m1_ND */ |
| 112304 | GR16, i16mem, |
| 112305 | /* SAR16m1_NF */ |
| 112306 | i16mem, |
| 112307 | /* SAR16m1_NF_ND */ |
| 112308 | GR16, i16mem, |
| 112309 | /* SAR16mCL */ |
| 112310 | i16mem, |
| 112311 | /* SAR16mCL_EVEX */ |
| 112312 | i16mem, |
| 112313 | /* SAR16mCL_ND */ |
| 112314 | GR16, i16mem, |
| 112315 | /* SAR16mCL_NF */ |
| 112316 | i16mem, |
| 112317 | /* SAR16mCL_NF_ND */ |
| 112318 | GR16, i16mem, |
| 112319 | /* SAR16mi */ |
| 112320 | i16mem, u8imm, |
| 112321 | /* SAR16mi_EVEX */ |
| 112322 | i16mem, u8imm, |
| 112323 | /* SAR16mi_ND */ |
| 112324 | GR16, i16mem, u8imm, |
| 112325 | /* SAR16mi_NF */ |
| 112326 | i16mem, u8imm, |
| 112327 | /* SAR16mi_NF_ND */ |
| 112328 | GR16, i16mem, u8imm, |
| 112329 | /* SAR16r1 */ |
| 112330 | GR16, GR16, |
| 112331 | /* SAR16r1_EVEX */ |
| 112332 | GR16, GR16, |
| 112333 | /* SAR16r1_ND */ |
| 112334 | GR16, GR16, |
| 112335 | /* SAR16r1_NF */ |
| 112336 | GR16, GR16, |
| 112337 | /* SAR16r1_NF_ND */ |
| 112338 | GR16, GR16, |
| 112339 | /* SAR16rCL */ |
| 112340 | GR16, GR16, |
| 112341 | /* SAR16rCL_EVEX */ |
| 112342 | GR16, GR16, |
| 112343 | /* SAR16rCL_ND */ |
| 112344 | GR16, GR16, |
| 112345 | /* SAR16rCL_NF */ |
| 112346 | GR16, GR16, |
| 112347 | /* SAR16rCL_NF_ND */ |
| 112348 | GR16, GR16, |
| 112349 | /* SAR16ri */ |
| 112350 | GR16, GR16, u8imm, |
| 112351 | /* SAR16ri_EVEX */ |
| 112352 | GR16, GR16, u8imm, |
| 112353 | /* SAR16ri_ND */ |
| 112354 | GR16, GR16, u8imm, |
| 112355 | /* SAR16ri_NF */ |
| 112356 | GR16, GR16, u8imm, |
| 112357 | /* SAR16ri_NF_ND */ |
| 112358 | GR16, GR16, u8imm, |
| 112359 | /* SAR32m1 */ |
| 112360 | i32mem, |
| 112361 | /* SAR32m1_EVEX */ |
| 112362 | i32mem, |
| 112363 | /* SAR32m1_ND */ |
| 112364 | GR32, i32mem, |
| 112365 | /* SAR32m1_NF */ |
| 112366 | i32mem, |
| 112367 | /* SAR32m1_NF_ND */ |
| 112368 | GR32, i32mem, |
| 112369 | /* SAR32mCL */ |
| 112370 | i32mem, |
| 112371 | /* SAR32mCL_EVEX */ |
| 112372 | i32mem, |
| 112373 | /* SAR32mCL_ND */ |
| 112374 | GR32, i32mem, |
| 112375 | /* SAR32mCL_NF */ |
| 112376 | i32mem, |
| 112377 | /* SAR32mCL_NF_ND */ |
| 112378 | GR32, i32mem, |
| 112379 | /* SAR32mi */ |
| 112380 | i32mem, u8imm, |
| 112381 | /* SAR32mi_EVEX */ |
| 112382 | i32mem, u8imm, |
| 112383 | /* SAR32mi_ND */ |
| 112384 | GR32, i32mem, u8imm, |
| 112385 | /* SAR32mi_NF */ |
| 112386 | i32mem, u8imm, |
| 112387 | /* SAR32mi_NF_ND */ |
| 112388 | GR32, i32mem, u8imm, |
| 112389 | /* SAR32r1 */ |
| 112390 | GR32, GR32, |
| 112391 | /* SAR32r1_EVEX */ |
| 112392 | GR32, GR32, |
| 112393 | /* SAR32r1_ND */ |
| 112394 | GR32, GR32, |
| 112395 | /* SAR32r1_NF */ |
| 112396 | GR32, GR32, |
| 112397 | /* SAR32r1_NF_ND */ |
| 112398 | GR32, GR32, |
| 112399 | /* SAR32rCL */ |
| 112400 | GR32, GR32, |
| 112401 | /* SAR32rCL_EVEX */ |
| 112402 | GR32, GR32, |
| 112403 | /* SAR32rCL_ND */ |
| 112404 | GR32, GR32, |
| 112405 | /* SAR32rCL_NF */ |
| 112406 | GR32, GR32, |
| 112407 | /* SAR32rCL_NF_ND */ |
| 112408 | GR32, GR32, |
| 112409 | /* SAR32ri */ |
| 112410 | GR32, GR32, u8imm, |
| 112411 | /* SAR32ri_EVEX */ |
| 112412 | GR32, GR32, u8imm, |
| 112413 | /* SAR32ri_ND */ |
| 112414 | GR32, GR32, u8imm, |
| 112415 | /* SAR32ri_NF */ |
| 112416 | GR32, GR32, u8imm, |
| 112417 | /* SAR32ri_NF_ND */ |
| 112418 | GR32, GR32, u8imm, |
| 112419 | /* SAR64m1 */ |
| 112420 | i64mem, |
| 112421 | /* SAR64m1_EVEX */ |
| 112422 | i64mem, |
| 112423 | /* SAR64m1_ND */ |
| 112424 | GR64, i64mem, |
| 112425 | /* SAR64m1_NF */ |
| 112426 | i64mem, |
| 112427 | /* SAR64m1_NF_ND */ |
| 112428 | GR64, i64mem, |
| 112429 | /* SAR64mCL */ |
| 112430 | i64mem, |
| 112431 | /* SAR64mCL_EVEX */ |
| 112432 | i64mem, |
| 112433 | /* SAR64mCL_ND */ |
| 112434 | GR64, i64mem, |
| 112435 | /* SAR64mCL_NF */ |
| 112436 | i64mem, |
| 112437 | /* SAR64mCL_NF_ND */ |
| 112438 | GR64, i64mem, |
| 112439 | /* SAR64mi */ |
| 112440 | i64mem, u8imm, |
| 112441 | /* SAR64mi_EVEX */ |
| 112442 | i64mem, u8imm, |
| 112443 | /* SAR64mi_ND */ |
| 112444 | GR64, i64mem, u8imm, |
| 112445 | /* SAR64mi_NF */ |
| 112446 | i64mem, u8imm, |
| 112447 | /* SAR64mi_NF_ND */ |
| 112448 | GR64, i64mem, u8imm, |
| 112449 | /* SAR64r1 */ |
| 112450 | GR64, GR64, |
| 112451 | /* SAR64r1_EVEX */ |
| 112452 | GR64, GR64, |
| 112453 | /* SAR64r1_ND */ |
| 112454 | GR64, GR64, |
| 112455 | /* SAR64r1_NF */ |
| 112456 | GR64, GR64, |
| 112457 | /* SAR64r1_NF_ND */ |
| 112458 | GR64, GR64, |
| 112459 | /* SAR64rCL */ |
| 112460 | GR64, GR64, |
| 112461 | /* SAR64rCL_EVEX */ |
| 112462 | GR64, GR64, |
| 112463 | /* SAR64rCL_ND */ |
| 112464 | GR64, GR64, |
| 112465 | /* SAR64rCL_NF */ |
| 112466 | GR64, GR64, |
| 112467 | /* SAR64rCL_NF_ND */ |
| 112468 | GR64, GR64, |
| 112469 | /* SAR64ri */ |
| 112470 | GR64, GR64, u8imm, |
| 112471 | /* SAR64ri_EVEX */ |
| 112472 | GR64, GR64, u8imm, |
| 112473 | /* SAR64ri_ND */ |
| 112474 | GR64, GR64, u8imm, |
| 112475 | /* SAR64ri_NF */ |
| 112476 | GR64, GR64, u8imm, |
| 112477 | /* SAR64ri_NF_ND */ |
| 112478 | GR64, GR64, u8imm, |
| 112479 | /* SAR8m1 */ |
| 112480 | i8mem, |
| 112481 | /* SAR8m1_EVEX */ |
| 112482 | i8mem, |
| 112483 | /* SAR8m1_ND */ |
| 112484 | GR8, i8mem, |
| 112485 | /* SAR8m1_NF */ |
| 112486 | i8mem, |
| 112487 | /* SAR8m1_NF_ND */ |
| 112488 | GR8, i8mem, |
| 112489 | /* SAR8mCL */ |
| 112490 | i8mem, |
| 112491 | /* SAR8mCL_EVEX */ |
| 112492 | i8mem, |
| 112493 | /* SAR8mCL_ND */ |
| 112494 | GR8, i8mem, |
| 112495 | /* SAR8mCL_NF */ |
| 112496 | i8mem, |
| 112497 | /* SAR8mCL_NF_ND */ |
| 112498 | GR8, i8mem, |
| 112499 | /* SAR8mi */ |
| 112500 | i8mem, u8imm, |
| 112501 | /* SAR8mi_EVEX */ |
| 112502 | i8mem, u8imm, |
| 112503 | /* SAR8mi_ND */ |
| 112504 | GR8, i8mem, u8imm, |
| 112505 | /* SAR8mi_NF */ |
| 112506 | i8mem, u8imm, |
| 112507 | /* SAR8mi_NF_ND */ |
| 112508 | GR8, i8mem, u8imm, |
| 112509 | /* SAR8r1 */ |
| 112510 | GR8, GR8, |
| 112511 | /* SAR8r1_EVEX */ |
| 112512 | GR8, GR8, |
| 112513 | /* SAR8r1_ND */ |
| 112514 | GR8, GR8, |
| 112515 | /* SAR8r1_NF */ |
| 112516 | GR8, GR8, |
| 112517 | /* SAR8r1_NF_ND */ |
| 112518 | GR8, GR8, |
| 112519 | /* SAR8rCL */ |
| 112520 | GR8, GR8, |
| 112521 | /* SAR8rCL_EVEX */ |
| 112522 | GR8, GR8, |
| 112523 | /* SAR8rCL_ND */ |
| 112524 | GR8, GR8, |
| 112525 | /* SAR8rCL_NF */ |
| 112526 | GR8, GR8, |
| 112527 | /* SAR8rCL_NF_ND */ |
| 112528 | GR8, GR8, |
| 112529 | /* SAR8ri */ |
| 112530 | GR8, GR8, u8imm, |
| 112531 | /* SAR8ri_EVEX */ |
| 112532 | GR8, GR8, u8imm, |
| 112533 | /* SAR8ri_ND */ |
| 112534 | GR8, GR8, u8imm, |
| 112535 | /* SAR8ri_NF */ |
| 112536 | GR8, GR8, u8imm, |
| 112537 | /* SAR8ri_NF_ND */ |
| 112538 | GR8, GR8, u8imm, |
| 112539 | /* SARX32rm */ |
| 112540 | GR32, i32mem, GR32, |
| 112541 | /* SARX32rm_EVEX */ |
| 112542 | GR32, i32mem, GR32, |
| 112543 | /* SARX32rr */ |
| 112544 | GR32, GR32, GR32, |
| 112545 | /* SARX32rr_EVEX */ |
| 112546 | GR32, GR32, GR32, |
| 112547 | /* SARX64rm */ |
| 112548 | GR64, i64mem, GR64, |
| 112549 | /* SARX64rm_EVEX */ |
| 112550 | GR64, i64mem, GR64, |
| 112551 | /* SARX64rr */ |
| 112552 | GR64, GR64, GR64, |
| 112553 | /* SARX64rr_EVEX */ |
| 112554 | GR64, GR64, GR64, |
| 112555 | /* SAVEPREVSSP */ |
| 112556 | /* SBB16i16 */ |
| 112557 | i16imm, |
| 112558 | /* SBB16mi */ |
| 112559 | i16mem, i16imm, |
| 112560 | /* SBB16mi8 */ |
| 112561 | i16mem, i16i8imm, |
| 112562 | /* SBB16mi8_EVEX */ |
| 112563 | i16mem, i16i8imm, |
| 112564 | /* SBB16mi8_ND */ |
| 112565 | GR16, i16mem, i16i8imm, |
| 112566 | /* SBB16mi_EVEX */ |
| 112567 | i16mem, i16imm, |
| 112568 | /* SBB16mi_ND */ |
| 112569 | GR16, i16mem, i16imm, |
| 112570 | /* SBB16mr */ |
| 112571 | i16mem, GR16, |
| 112572 | /* SBB16mr_EVEX */ |
| 112573 | i16mem, GR16, |
| 112574 | /* SBB16mr_ND */ |
| 112575 | GR16, i16mem, GR16, |
| 112576 | /* SBB16ri */ |
| 112577 | GR16, GR16, i16imm, |
| 112578 | /* SBB16ri8 */ |
| 112579 | GR16, GR16, i16i8imm, |
| 112580 | /* SBB16ri8_EVEX */ |
| 112581 | GR16, GR16, i16i8imm, |
| 112582 | /* SBB16ri8_ND */ |
| 112583 | GR16, GR16, i16i8imm, |
| 112584 | /* SBB16ri_EVEX */ |
| 112585 | GR16, GR16, i16imm, |
| 112586 | /* SBB16ri_ND */ |
| 112587 | GR16, GR16, i16imm, |
| 112588 | /* SBB16rm */ |
| 112589 | GR16, GR16, i16mem, |
| 112590 | /* SBB16rm_EVEX */ |
| 112591 | GR16, GR16, i16mem, |
| 112592 | /* SBB16rm_ND */ |
| 112593 | GR16, GR16, i16mem, |
| 112594 | /* SBB16rr */ |
| 112595 | GR16, GR16, GR16, |
| 112596 | /* SBB16rr_EVEX */ |
| 112597 | GR16, GR16, GR16, |
| 112598 | /* SBB16rr_EVEX_REV */ |
| 112599 | GR16, GR16, GR16, |
| 112600 | /* SBB16rr_ND */ |
| 112601 | GR16, GR16, GR16, |
| 112602 | /* SBB16rr_ND_REV */ |
| 112603 | GR16, GR16, GR16, |
| 112604 | /* SBB16rr_REV */ |
| 112605 | GR16, GR16, GR16, |
| 112606 | /* SBB32i32 */ |
| 112607 | i32imm, |
| 112608 | /* SBB32mi */ |
| 112609 | i32mem, i32imm, |
| 112610 | /* SBB32mi8 */ |
| 112611 | i32mem, i32i8imm, |
| 112612 | /* SBB32mi8_EVEX */ |
| 112613 | i32mem, i32i8imm, |
| 112614 | /* SBB32mi8_ND */ |
| 112615 | GR32, i32mem, i32i8imm, |
| 112616 | /* SBB32mi_EVEX */ |
| 112617 | i32mem, i32imm, |
| 112618 | /* SBB32mi_ND */ |
| 112619 | GR32, i32mem, i32imm, |
| 112620 | /* SBB32mr */ |
| 112621 | i32mem, GR32, |
| 112622 | /* SBB32mr_EVEX */ |
| 112623 | i32mem, GR32, |
| 112624 | /* SBB32mr_ND */ |
| 112625 | GR32, i32mem, GR32, |
| 112626 | /* SBB32ri */ |
| 112627 | GR32, GR32, i32imm, |
| 112628 | /* SBB32ri8 */ |
| 112629 | GR32, GR32, i32i8imm, |
| 112630 | /* SBB32ri8_EVEX */ |
| 112631 | GR32, GR32, i32i8imm, |
| 112632 | /* SBB32ri8_ND */ |
| 112633 | GR32, GR32, i32i8imm, |
| 112634 | /* SBB32ri_EVEX */ |
| 112635 | GR32, GR32, i32imm, |
| 112636 | /* SBB32ri_ND */ |
| 112637 | GR32, GR32, i32imm, |
| 112638 | /* SBB32rm */ |
| 112639 | GR32, GR32, i32mem, |
| 112640 | /* SBB32rm_EVEX */ |
| 112641 | GR32, GR32, i32mem, |
| 112642 | /* SBB32rm_ND */ |
| 112643 | GR32, GR32, i32mem, |
| 112644 | /* SBB32rr */ |
| 112645 | GR32, GR32, GR32, |
| 112646 | /* SBB32rr_EVEX */ |
| 112647 | GR32, GR32, GR32, |
| 112648 | /* SBB32rr_EVEX_REV */ |
| 112649 | GR32, GR32, GR32, |
| 112650 | /* SBB32rr_ND */ |
| 112651 | GR32, GR32, GR32, |
| 112652 | /* SBB32rr_ND_REV */ |
| 112653 | GR32, GR32, GR32, |
| 112654 | /* SBB32rr_REV */ |
| 112655 | GR32, GR32, GR32, |
| 112656 | /* SBB64i32 */ |
| 112657 | i64i32imm, |
| 112658 | /* SBB64mi32 */ |
| 112659 | i64mem, i64i32imm, |
| 112660 | /* SBB64mi32_EVEX */ |
| 112661 | i64mem, i64i32imm, |
| 112662 | /* SBB64mi32_ND */ |
| 112663 | GR64, i64mem, i64i32imm, |
| 112664 | /* SBB64mi8 */ |
| 112665 | i64mem, i64i8imm, |
| 112666 | /* SBB64mi8_EVEX */ |
| 112667 | i64mem, i64i8imm, |
| 112668 | /* SBB64mi8_ND */ |
| 112669 | GR64, i64mem, i64i8imm, |
| 112670 | /* SBB64mr */ |
| 112671 | i64mem, GR64, |
| 112672 | /* SBB64mr_EVEX */ |
| 112673 | i64mem, GR64, |
| 112674 | /* SBB64mr_ND */ |
| 112675 | GR64, i64mem, GR64, |
| 112676 | /* SBB64ri32 */ |
| 112677 | GR64, GR64, i64i32imm, |
| 112678 | /* SBB64ri32_EVEX */ |
| 112679 | GR64, GR64, i64i32imm, |
| 112680 | /* SBB64ri32_ND */ |
| 112681 | GR64, GR64, i64i32imm, |
| 112682 | /* SBB64ri8 */ |
| 112683 | GR64, GR64, i64i8imm, |
| 112684 | /* SBB64ri8_EVEX */ |
| 112685 | GR64, GR64, i64i8imm, |
| 112686 | /* SBB64ri8_ND */ |
| 112687 | GR64, GR64, i64i8imm, |
| 112688 | /* SBB64rm */ |
| 112689 | GR64, GR64, i64mem, |
| 112690 | /* SBB64rm_EVEX */ |
| 112691 | GR64, GR64, i64mem, |
| 112692 | /* SBB64rm_ND */ |
| 112693 | GR64, GR64, i64mem, |
| 112694 | /* SBB64rr */ |
| 112695 | GR64, GR64, GR64, |
| 112696 | /* SBB64rr_EVEX */ |
| 112697 | GR64, GR64, GR64, |
| 112698 | /* SBB64rr_EVEX_REV */ |
| 112699 | GR64, GR64, GR64, |
| 112700 | /* SBB64rr_ND */ |
| 112701 | GR64, GR64, GR64, |
| 112702 | /* SBB64rr_ND_REV */ |
| 112703 | GR64, GR64, GR64, |
| 112704 | /* SBB64rr_REV */ |
| 112705 | GR64, GR64, GR64, |
| 112706 | /* SBB8i8 */ |
| 112707 | i8imm, |
| 112708 | /* SBB8mi */ |
| 112709 | i8mem, i8imm, |
| 112710 | /* SBB8mi8 */ |
| 112711 | i8mem, i8imm, |
| 112712 | /* SBB8mi_EVEX */ |
| 112713 | i8mem, i8imm, |
| 112714 | /* SBB8mi_ND */ |
| 112715 | GR8, i8mem, i8imm, |
| 112716 | /* SBB8mr */ |
| 112717 | i8mem, GR8, |
| 112718 | /* SBB8mr_EVEX */ |
| 112719 | i8mem, GR8, |
| 112720 | /* SBB8mr_ND */ |
| 112721 | GR8, i8mem, GR8, |
| 112722 | /* SBB8ri */ |
| 112723 | GR8, GR8, i8imm, |
| 112724 | /* SBB8ri8 */ |
| 112725 | GR8, GR8, i8imm, |
| 112726 | /* SBB8ri_EVEX */ |
| 112727 | GR8, GR8, i8imm, |
| 112728 | /* SBB8ri_ND */ |
| 112729 | GR8, GR8, i8imm, |
| 112730 | /* SBB8rm */ |
| 112731 | GR8, GR8, i8mem, |
| 112732 | /* SBB8rm_EVEX */ |
| 112733 | GR8, GR8, i8mem, |
| 112734 | /* SBB8rm_ND */ |
| 112735 | GR8, GR8, i8mem, |
| 112736 | /* SBB8rr */ |
| 112737 | GR8, GR8, GR8, |
| 112738 | /* SBB8rr_EVEX */ |
| 112739 | GR8, GR8, GR8, |
| 112740 | /* SBB8rr_EVEX_REV */ |
| 112741 | GR8, GR8, GR8, |
| 112742 | /* SBB8rr_ND */ |
| 112743 | GR8, GR8, GR8, |
| 112744 | /* SBB8rr_ND_REV */ |
| 112745 | GR8, GR8, GR8, |
| 112746 | /* SBB8rr_REV */ |
| 112747 | GR8, GR8, GR8, |
| 112748 | /* SCASB */ |
| 112749 | dstidx8, |
| 112750 | /* SCASL */ |
| 112751 | dstidx32, |
| 112752 | /* SCASQ */ |
| 112753 | dstidx64, |
| 112754 | /* SCASW */ |
| 112755 | dstidx16, |
| 112756 | /* SEAMCALL */ |
| 112757 | /* SEAMOPS */ |
| 112758 | /* SEAMRET */ |
| 112759 | /* SEG_ALLOCA_32 */ |
| 112760 | GR32, GR32, |
| 112761 | /* SEG_ALLOCA_64 */ |
| 112762 | GR64, GR64, |
| 112763 | /* SENDUIPI */ |
| 112764 | GR64, |
| 112765 | /* SERIALIZE */ |
| 112766 | /* SETCCm */ |
| 112767 | i8mem, ccode, |
| 112768 | /* SETCCm_EVEX */ |
| 112769 | i8mem, ccode, |
| 112770 | /* SETCCr */ |
| 112771 | GR8, ccode, |
| 112772 | /* SETCCr_EVEX */ |
| 112773 | GR8, ccode, |
| 112774 | /* SETSSBSY */ |
| 112775 | /* SETZUCCm */ |
| 112776 | i8mem, ccode, |
| 112777 | /* SETZUCCr */ |
| 112778 | GR8, ccode, |
| 112779 | /* SFENCE */ |
| 112780 | /* SGDT16m */ |
| 112781 | opaquemem, |
| 112782 | /* SGDT32m */ |
| 112783 | opaquemem, |
| 112784 | /* SGDT64m */ |
| 112785 | opaquemem, |
| 112786 | /* SHA1MSG1rm */ |
| 112787 | VR128, VR128, i128mem, |
| 112788 | /* SHA1MSG1rr */ |
| 112789 | VR128, VR128, VR128, |
| 112790 | /* SHA1MSG2rm */ |
| 112791 | VR128, VR128, i128mem, |
| 112792 | /* SHA1MSG2rr */ |
| 112793 | VR128, VR128, VR128, |
| 112794 | /* SHA1NEXTErm */ |
| 112795 | VR128, VR128, i128mem, |
| 112796 | /* SHA1NEXTErr */ |
| 112797 | VR128, VR128, VR128, |
| 112798 | /* SHA1RNDS4rmi */ |
| 112799 | VR128, VR128, i128mem, u8imm, |
| 112800 | /* SHA1RNDS4rri */ |
| 112801 | VR128, VR128, VR128, u8imm, |
| 112802 | /* SHA256MSG1rm */ |
| 112803 | VR128, VR128, i128mem, |
| 112804 | /* SHA256MSG1rr */ |
| 112805 | VR128, VR128, VR128, |
| 112806 | /* SHA256MSG2rm */ |
| 112807 | VR128, VR128, i128mem, |
| 112808 | /* SHA256MSG2rr */ |
| 112809 | VR128, VR128, VR128, |
| 112810 | /* SHA256RNDS2rm */ |
| 112811 | VR128, VR128, i128mem, |
| 112812 | /* SHA256RNDS2rr */ |
| 112813 | VR128, VR128, VR128, |
| 112814 | /* SHL16m1 */ |
| 112815 | i16mem, |
| 112816 | /* SHL16m1_EVEX */ |
| 112817 | i16mem, |
| 112818 | /* SHL16m1_ND */ |
| 112819 | GR16, i16mem, |
| 112820 | /* SHL16m1_NF */ |
| 112821 | i16mem, |
| 112822 | /* SHL16m1_NF_ND */ |
| 112823 | GR16, i16mem, |
| 112824 | /* SHL16mCL */ |
| 112825 | i16mem, |
| 112826 | /* SHL16mCL_EVEX */ |
| 112827 | i16mem, |
| 112828 | /* SHL16mCL_ND */ |
| 112829 | GR16, i16mem, |
| 112830 | /* SHL16mCL_NF */ |
| 112831 | i16mem, |
| 112832 | /* SHL16mCL_NF_ND */ |
| 112833 | GR16, i16mem, |
| 112834 | /* SHL16mi */ |
| 112835 | i16mem, u8imm, |
| 112836 | /* SHL16mi_EVEX */ |
| 112837 | i16mem, u8imm, |
| 112838 | /* SHL16mi_ND */ |
| 112839 | GR16, i16mem, u8imm, |
| 112840 | /* SHL16mi_NF */ |
| 112841 | i16mem, u8imm, |
| 112842 | /* SHL16mi_NF_ND */ |
| 112843 | GR16, i16mem, u8imm, |
| 112844 | /* SHL16r1 */ |
| 112845 | GR16, GR16, |
| 112846 | /* SHL16r1_EVEX */ |
| 112847 | GR16, GR16, |
| 112848 | /* SHL16r1_ND */ |
| 112849 | GR16, GR16, |
| 112850 | /* SHL16r1_NF */ |
| 112851 | GR16, GR16, |
| 112852 | /* SHL16r1_NF_ND */ |
| 112853 | GR16, GR16, |
| 112854 | /* SHL16rCL */ |
| 112855 | GR16, GR16, |
| 112856 | /* SHL16rCL_EVEX */ |
| 112857 | GR16, GR16, |
| 112858 | /* SHL16rCL_ND */ |
| 112859 | GR16, GR16, |
| 112860 | /* SHL16rCL_NF */ |
| 112861 | GR16, GR16, |
| 112862 | /* SHL16rCL_NF_ND */ |
| 112863 | GR16, GR16, |
| 112864 | /* SHL16ri */ |
| 112865 | GR16, GR16, u8imm, |
| 112866 | /* SHL16ri_EVEX */ |
| 112867 | GR16, GR16, u8imm, |
| 112868 | /* SHL16ri_ND */ |
| 112869 | GR16, GR16, u8imm, |
| 112870 | /* SHL16ri_NF */ |
| 112871 | GR16, GR16, u8imm, |
| 112872 | /* SHL16ri_NF_ND */ |
| 112873 | GR16, GR16, u8imm, |
| 112874 | /* SHL32m1 */ |
| 112875 | i32mem, |
| 112876 | /* SHL32m1_EVEX */ |
| 112877 | i32mem, |
| 112878 | /* SHL32m1_ND */ |
| 112879 | GR32, i32mem, |
| 112880 | /* SHL32m1_NF */ |
| 112881 | i32mem, |
| 112882 | /* SHL32m1_NF_ND */ |
| 112883 | GR32, i32mem, |
| 112884 | /* SHL32mCL */ |
| 112885 | i32mem, |
| 112886 | /* SHL32mCL_EVEX */ |
| 112887 | i32mem, |
| 112888 | /* SHL32mCL_ND */ |
| 112889 | GR32, i32mem, |
| 112890 | /* SHL32mCL_NF */ |
| 112891 | i32mem, |
| 112892 | /* SHL32mCL_NF_ND */ |
| 112893 | GR32, i32mem, |
| 112894 | /* SHL32mi */ |
| 112895 | i32mem, u8imm, |
| 112896 | /* SHL32mi_EVEX */ |
| 112897 | i32mem, u8imm, |
| 112898 | /* SHL32mi_ND */ |
| 112899 | GR32, i32mem, u8imm, |
| 112900 | /* SHL32mi_NF */ |
| 112901 | i32mem, u8imm, |
| 112902 | /* SHL32mi_NF_ND */ |
| 112903 | GR32, i32mem, u8imm, |
| 112904 | /* SHL32r1 */ |
| 112905 | GR32, GR32, |
| 112906 | /* SHL32r1_EVEX */ |
| 112907 | GR32, GR32, |
| 112908 | /* SHL32r1_ND */ |
| 112909 | GR32, GR32, |
| 112910 | /* SHL32r1_NF */ |
| 112911 | GR32, GR32, |
| 112912 | /* SHL32r1_NF_ND */ |
| 112913 | GR32, GR32, |
| 112914 | /* SHL32rCL */ |
| 112915 | GR32, GR32, |
| 112916 | /* SHL32rCL_EVEX */ |
| 112917 | GR32, GR32, |
| 112918 | /* SHL32rCL_ND */ |
| 112919 | GR32, GR32, |
| 112920 | /* SHL32rCL_NF */ |
| 112921 | GR32, GR32, |
| 112922 | /* SHL32rCL_NF_ND */ |
| 112923 | GR32, GR32, |
| 112924 | /* SHL32ri */ |
| 112925 | GR32, GR32, u8imm, |
| 112926 | /* SHL32ri_EVEX */ |
| 112927 | GR32, GR32, u8imm, |
| 112928 | /* SHL32ri_ND */ |
| 112929 | GR32, GR32, u8imm, |
| 112930 | /* SHL32ri_NF */ |
| 112931 | GR32, GR32, u8imm, |
| 112932 | /* SHL32ri_NF_ND */ |
| 112933 | GR32, GR32, u8imm, |
| 112934 | /* SHL64m1 */ |
| 112935 | i64mem, |
| 112936 | /* SHL64m1_EVEX */ |
| 112937 | i64mem, |
| 112938 | /* SHL64m1_ND */ |
| 112939 | GR64, i64mem, |
| 112940 | /* SHL64m1_NF */ |
| 112941 | i64mem, |
| 112942 | /* SHL64m1_NF_ND */ |
| 112943 | GR64, i64mem, |
| 112944 | /* SHL64mCL */ |
| 112945 | i64mem, |
| 112946 | /* SHL64mCL_EVEX */ |
| 112947 | i64mem, |
| 112948 | /* SHL64mCL_ND */ |
| 112949 | GR64, i64mem, |
| 112950 | /* SHL64mCL_NF */ |
| 112951 | i64mem, |
| 112952 | /* SHL64mCL_NF_ND */ |
| 112953 | GR64, i64mem, |
| 112954 | /* SHL64mi */ |
| 112955 | i64mem, u8imm, |
| 112956 | /* SHL64mi_EVEX */ |
| 112957 | i64mem, u8imm, |
| 112958 | /* SHL64mi_ND */ |
| 112959 | GR64, i64mem, u8imm, |
| 112960 | /* SHL64mi_NF */ |
| 112961 | i64mem, u8imm, |
| 112962 | /* SHL64mi_NF_ND */ |
| 112963 | GR64, i64mem, u8imm, |
| 112964 | /* SHL64r1 */ |
| 112965 | GR64, GR64, |
| 112966 | /* SHL64r1_EVEX */ |
| 112967 | GR64, GR64, |
| 112968 | /* SHL64r1_ND */ |
| 112969 | GR64, GR64, |
| 112970 | /* SHL64r1_NF */ |
| 112971 | GR64, GR64, |
| 112972 | /* SHL64r1_NF_ND */ |
| 112973 | GR64, GR64, |
| 112974 | /* SHL64rCL */ |
| 112975 | GR64, GR64, |
| 112976 | /* SHL64rCL_EVEX */ |
| 112977 | GR64, GR64, |
| 112978 | /* SHL64rCL_ND */ |
| 112979 | GR64, GR64, |
| 112980 | /* SHL64rCL_NF */ |
| 112981 | GR64, GR64, |
| 112982 | /* SHL64rCL_NF_ND */ |
| 112983 | GR64, GR64, |
| 112984 | /* SHL64ri */ |
| 112985 | GR64, GR64, u8imm, |
| 112986 | /* SHL64ri_EVEX */ |
| 112987 | GR64, GR64, u8imm, |
| 112988 | /* SHL64ri_ND */ |
| 112989 | GR64, GR64, u8imm, |
| 112990 | /* SHL64ri_NF */ |
| 112991 | GR64, GR64, u8imm, |
| 112992 | /* SHL64ri_NF_ND */ |
| 112993 | GR64, GR64, u8imm, |
| 112994 | /* SHL8m1 */ |
| 112995 | i8mem, |
| 112996 | /* SHL8m1_EVEX */ |
| 112997 | i8mem, |
| 112998 | /* SHL8m1_ND */ |
| 112999 | GR8, i8mem, |
| 113000 | /* SHL8m1_NF */ |
| 113001 | i8mem, |
| 113002 | /* SHL8m1_NF_ND */ |
| 113003 | GR8, i8mem, |
| 113004 | /* SHL8mCL */ |
| 113005 | i8mem, |
| 113006 | /* SHL8mCL_EVEX */ |
| 113007 | i8mem, |
| 113008 | /* SHL8mCL_ND */ |
| 113009 | GR8, i8mem, |
| 113010 | /* SHL8mCL_NF */ |
| 113011 | i8mem, |
| 113012 | /* SHL8mCL_NF_ND */ |
| 113013 | GR8, i8mem, |
| 113014 | /* SHL8mi */ |
| 113015 | i8mem, u8imm, |
| 113016 | /* SHL8mi_EVEX */ |
| 113017 | i8mem, u8imm, |
| 113018 | /* SHL8mi_ND */ |
| 113019 | GR8, i8mem, u8imm, |
| 113020 | /* SHL8mi_NF */ |
| 113021 | i8mem, u8imm, |
| 113022 | /* SHL8mi_NF_ND */ |
| 113023 | GR8, i8mem, u8imm, |
| 113024 | /* SHL8r1 */ |
| 113025 | GR8, GR8, |
| 113026 | /* SHL8r1_EVEX */ |
| 113027 | GR8, GR8, |
| 113028 | /* SHL8r1_ND */ |
| 113029 | GR8, GR8, |
| 113030 | /* SHL8r1_NF */ |
| 113031 | GR8, GR8, |
| 113032 | /* SHL8r1_NF_ND */ |
| 113033 | GR8, GR8, |
| 113034 | /* SHL8rCL */ |
| 113035 | GR8, GR8, |
| 113036 | /* SHL8rCL_EVEX */ |
| 113037 | GR8, GR8, |
| 113038 | /* SHL8rCL_ND */ |
| 113039 | GR8, GR8, |
| 113040 | /* SHL8rCL_NF */ |
| 113041 | GR8, GR8, |
| 113042 | /* SHL8rCL_NF_ND */ |
| 113043 | GR8, GR8, |
| 113044 | /* SHL8ri */ |
| 113045 | GR8, GR8, u8imm, |
| 113046 | /* SHL8ri_EVEX */ |
| 113047 | GR8, GR8, u8imm, |
| 113048 | /* SHL8ri_ND */ |
| 113049 | GR8, GR8, u8imm, |
| 113050 | /* SHL8ri_NF */ |
| 113051 | GR8, GR8, u8imm, |
| 113052 | /* SHL8ri_NF_ND */ |
| 113053 | GR8, GR8, u8imm, |
| 113054 | /* SHLD16mrCL */ |
| 113055 | i16mem, GR16, |
| 113056 | /* SHLD16mrCL_EVEX */ |
| 113057 | i16mem, GR16, |
| 113058 | /* SHLD16mrCL_ND */ |
| 113059 | GR16, i16mem, GR16, |
| 113060 | /* SHLD16mrCL_NF */ |
| 113061 | i16mem, GR16, |
| 113062 | /* SHLD16mrCL_NF_ND */ |
| 113063 | GR16, i16mem, GR16, |
| 113064 | /* SHLD16mri8 */ |
| 113065 | i16mem, GR16, u8imm, |
| 113066 | /* SHLD16mri8_EVEX */ |
| 113067 | i16mem, GR16, u8imm, |
| 113068 | /* SHLD16mri8_ND */ |
| 113069 | GR16, i16mem, GR16, u8imm, |
| 113070 | /* SHLD16mri8_NF */ |
| 113071 | i16mem, GR16, u8imm, |
| 113072 | /* SHLD16mri8_NF_ND */ |
| 113073 | GR16, i16mem, GR16, u8imm, |
| 113074 | /* SHLD16rrCL */ |
| 113075 | GR16, GR16, GR16, |
| 113076 | /* SHLD16rrCL_EVEX */ |
| 113077 | GR16, GR16, GR16, |
| 113078 | /* SHLD16rrCL_ND */ |
| 113079 | GR16, GR16, GR16, |
| 113080 | /* SHLD16rrCL_NF */ |
| 113081 | GR16, GR16, GR16, |
| 113082 | /* SHLD16rrCL_NF_ND */ |
| 113083 | GR16, GR16, GR16, |
| 113084 | /* SHLD16rri8 */ |
| 113085 | GR16, GR16, GR16, u8imm, |
| 113086 | /* SHLD16rri8_EVEX */ |
| 113087 | GR16, GR16, GR16, u8imm, |
| 113088 | /* SHLD16rri8_ND */ |
| 113089 | GR16, GR16, GR16, u8imm, |
| 113090 | /* SHLD16rri8_NF */ |
| 113091 | GR16, GR16, GR16, u8imm, |
| 113092 | /* SHLD16rri8_NF_ND */ |
| 113093 | GR16, GR16, GR16, u8imm, |
| 113094 | /* SHLD32mrCL */ |
| 113095 | i32mem, GR32, |
| 113096 | /* SHLD32mrCL_EVEX */ |
| 113097 | i32mem, GR32, |
| 113098 | /* SHLD32mrCL_ND */ |
| 113099 | GR32, i32mem, GR32, |
| 113100 | /* SHLD32mrCL_NF */ |
| 113101 | i32mem, GR32, |
| 113102 | /* SHLD32mrCL_NF_ND */ |
| 113103 | GR32, i32mem, GR32, |
| 113104 | /* SHLD32mri8 */ |
| 113105 | i32mem, GR32, u8imm, |
| 113106 | /* SHLD32mri8_EVEX */ |
| 113107 | i32mem, GR32, u8imm, |
| 113108 | /* SHLD32mri8_ND */ |
| 113109 | GR32, i32mem, GR32, u8imm, |
| 113110 | /* SHLD32mri8_NF */ |
| 113111 | i32mem, GR32, u8imm, |
| 113112 | /* SHLD32mri8_NF_ND */ |
| 113113 | GR32, i32mem, GR32, u8imm, |
| 113114 | /* SHLD32rrCL */ |
| 113115 | GR32, GR32, GR32, |
| 113116 | /* SHLD32rrCL_EVEX */ |
| 113117 | GR32, GR32, GR32, |
| 113118 | /* SHLD32rrCL_ND */ |
| 113119 | GR32, GR32, GR32, |
| 113120 | /* SHLD32rrCL_NF */ |
| 113121 | GR32, GR32, GR32, |
| 113122 | /* SHLD32rrCL_NF_ND */ |
| 113123 | GR32, GR32, GR32, |
| 113124 | /* SHLD32rri8 */ |
| 113125 | GR32, GR32, GR32, u8imm, |
| 113126 | /* SHLD32rri8_EVEX */ |
| 113127 | GR32, GR32, GR32, u8imm, |
| 113128 | /* SHLD32rri8_ND */ |
| 113129 | GR32, GR32, GR32, u8imm, |
| 113130 | /* SHLD32rri8_NF */ |
| 113131 | GR32, GR32, GR32, u8imm, |
| 113132 | /* SHLD32rri8_NF_ND */ |
| 113133 | GR32, GR32, GR32, u8imm, |
| 113134 | /* SHLD64mrCL */ |
| 113135 | i64mem, GR64, |
| 113136 | /* SHLD64mrCL_EVEX */ |
| 113137 | i64mem, GR64, |
| 113138 | /* SHLD64mrCL_ND */ |
| 113139 | GR64, i64mem, GR64, |
| 113140 | /* SHLD64mrCL_NF */ |
| 113141 | i64mem, GR64, |
| 113142 | /* SHLD64mrCL_NF_ND */ |
| 113143 | GR64, i64mem, GR64, |
| 113144 | /* SHLD64mri8 */ |
| 113145 | i64mem, GR64, u8imm, |
| 113146 | /* SHLD64mri8_EVEX */ |
| 113147 | i64mem, GR64, u8imm, |
| 113148 | /* SHLD64mri8_ND */ |
| 113149 | GR64, i64mem, GR64, u8imm, |
| 113150 | /* SHLD64mri8_NF */ |
| 113151 | i64mem, GR64, u8imm, |
| 113152 | /* SHLD64mri8_NF_ND */ |
| 113153 | GR64, i64mem, GR64, u8imm, |
| 113154 | /* SHLD64rrCL */ |
| 113155 | GR64, GR64, GR64, |
| 113156 | /* SHLD64rrCL_EVEX */ |
| 113157 | GR64, GR64, GR64, |
| 113158 | /* SHLD64rrCL_ND */ |
| 113159 | GR64, GR64, GR64, |
| 113160 | /* SHLD64rrCL_NF */ |
| 113161 | GR64, GR64, GR64, |
| 113162 | /* SHLD64rrCL_NF_ND */ |
| 113163 | GR64, GR64, GR64, |
| 113164 | /* SHLD64rri8 */ |
| 113165 | GR64, GR64, GR64, u8imm, |
| 113166 | /* SHLD64rri8_EVEX */ |
| 113167 | GR64, GR64, GR64, u8imm, |
| 113168 | /* SHLD64rri8_ND */ |
| 113169 | GR64, GR64, GR64, u8imm, |
| 113170 | /* SHLD64rri8_NF */ |
| 113171 | GR64, GR64, GR64, u8imm, |
| 113172 | /* SHLD64rri8_NF_ND */ |
| 113173 | GR64, GR64, GR64, u8imm, |
| 113174 | /* SHLX32rm */ |
| 113175 | GR32, i32mem, GR32, |
| 113176 | /* SHLX32rm_EVEX */ |
| 113177 | GR32, i32mem, GR32, |
| 113178 | /* SHLX32rr */ |
| 113179 | GR32, GR32, GR32, |
| 113180 | /* SHLX32rr_EVEX */ |
| 113181 | GR32, GR32, GR32, |
| 113182 | /* SHLX64rm */ |
| 113183 | GR64, i64mem, GR64, |
| 113184 | /* SHLX64rm_EVEX */ |
| 113185 | GR64, i64mem, GR64, |
| 113186 | /* SHLX64rr */ |
| 113187 | GR64, GR64, GR64, |
| 113188 | /* SHLX64rr_EVEX */ |
| 113189 | GR64, GR64, GR64, |
| 113190 | /* SHR16m1 */ |
| 113191 | i16mem, |
| 113192 | /* SHR16m1_EVEX */ |
| 113193 | i16mem, |
| 113194 | /* SHR16m1_ND */ |
| 113195 | GR16, i16mem, |
| 113196 | /* SHR16m1_NF */ |
| 113197 | i16mem, |
| 113198 | /* SHR16m1_NF_ND */ |
| 113199 | GR16, i16mem, |
| 113200 | /* SHR16mCL */ |
| 113201 | i16mem, |
| 113202 | /* SHR16mCL_EVEX */ |
| 113203 | i16mem, |
| 113204 | /* SHR16mCL_ND */ |
| 113205 | GR16, i16mem, |
| 113206 | /* SHR16mCL_NF */ |
| 113207 | i16mem, |
| 113208 | /* SHR16mCL_NF_ND */ |
| 113209 | GR16, i16mem, |
| 113210 | /* SHR16mi */ |
| 113211 | i16mem, u8imm, |
| 113212 | /* SHR16mi_EVEX */ |
| 113213 | i16mem, u8imm, |
| 113214 | /* SHR16mi_ND */ |
| 113215 | GR16, i16mem, u8imm, |
| 113216 | /* SHR16mi_NF */ |
| 113217 | i16mem, u8imm, |
| 113218 | /* SHR16mi_NF_ND */ |
| 113219 | GR16, i16mem, u8imm, |
| 113220 | /* SHR16r1 */ |
| 113221 | GR16, GR16, |
| 113222 | /* SHR16r1_EVEX */ |
| 113223 | GR16, GR16, |
| 113224 | /* SHR16r1_ND */ |
| 113225 | GR16, GR16, |
| 113226 | /* SHR16r1_NF */ |
| 113227 | GR16, GR16, |
| 113228 | /* SHR16r1_NF_ND */ |
| 113229 | GR16, GR16, |
| 113230 | /* SHR16rCL */ |
| 113231 | GR16, GR16, |
| 113232 | /* SHR16rCL_EVEX */ |
| 113233 | GR16, GR16, |
| 113234 | /* SHR16rCL_ND */ |
| 113235 | GR16, GR16, |
| 113236 | /* SHR16rCL_NF */ |
| 113237 | GR16, GR16, |
| 113238 | /* SHR16rCL_NF_ND */ |
| 113239 | GR16, GR16, |
| 113240 | /* SHR16ri */ |
| 113241 | GR16, GR16, u8imm, |
| 113242 | /* SHR16ri_EVEX */ |
| 113243 | GR16, GR16, u8imm, |
| 113244 | /* SHR16ri_ND */ |
| 113245 | GR16, GR16, u8imm, |
| 113246 | /* SHR16ri_NF */ |
| 113247 | GR16, GR16, u8imm, |
| 113248 | /* SHR16ri_NF_ND */ |
| 113249 | GR16, GR16, u8imm, |
| 113250 | /* SHR32m1 */ |
| 113251 | i32mem, |
| 113252 | /* SHR32m1_EVEX */ |
| 113253 | i32mem, |
| 113254 | /* SHR32m1_ND */ |
| 113255 | GR32, i32mem, |
| 113256 | /* SHR32m1_NF */ |
| 113257 | i32mem, |
| 113258 | /* SHR32m1_NF_ND */ |
| 113259 | GR32, i32mem, |
| 113260 | /* SHR32mCL */ |
| 113261 | i32mem, |
| 113262 | /* SHR32mCL_EVEX */ |
| 113263 | i32mem, |
| 113264 | /* SHR32mCL_ND */ |
| 113265 | GR32, i32mem, |
| 113266 | /* SHR32mCL_NF */ |
| 113267 | i32mem, |
| 113268 | /* SHR32mCL_NF_ND */ |
| 113269 | GR32, i32mem, |
| 113270 | /* SHR32mi */ |
| 113271 | i32mem, u8imm, |
| 113272 | /* SHR32mi_EVEX */ |
| 113273 | i32mem, u8imm, |
| 113274 | /* SHR32mi_ND */ |
| 113275 | GR32, i32mem, u8imm, |
| 113276 | /* SHR32mi_NF */ |
| 113277 | i32mem, u8imm, |
| 113278 | /* SHR32mi_NF_ND */ |
| 113279 | GR32, i32mem, u8imm, |
| 113280 | /* SHR32r1 */ |
| 113281 | GR32, GR32, |
| 113282 | /* SHR32r1_EVEX */ |
| 113283 | GR32, GR32, |
| 113284 | /* SHR32r1_ND */ |
| 113285 | GR32, GR32, |
| 113286 | /* SHR32r1_NF */ |
| 113287 | GR32, GR32, |
| 113288 | /* SHR32r1_NF_ND */ |
| 113289 | GR32, GR32, |
| 113290 | /* SHR32rCL */ |
| 113291 | GR32, GR32, |
| 113292 | /* SHR32rCL_EVEX */ |
| 113293 | GR32, GR32, |
| 113294 | /* SHR32rCL_ND */ |
| 113295 | GR32, GR32, |
| 113296 | /* SHR32rCL_NF */ |
| 113297 | GR32, GR32, |
| 113298 | /* SHR32rCL_NF_ND */ |
| 113299 | GR32, GR32, |
| 113300 | /* SHR32ri */ |
| 113301 | GR32, GR32, u8imm, |
| 113302 | /* SHR32ri_EVEX */ |
| 113303 | GR32, GR32, u8imm, |
| 113304 | /* SHR32ri_ND */ |
| 113305 | GR32, GR32, u8imm, |
| 113306 | /* SHR32ri_NF */ |
| 113307 | GR32, GR32, u8imm, |
| 113308 | /* SHR32ri_NF_ND */ |
| 113309 | GR32, GR32, u8imm, |
| 113310 | /* SHR64m1 */ |
| 113311 | i64mem, |
| 113312 | /* SHR64m1_EVEX */ |
| 113313 | i64mem, |
| 113314 | /* SHR64m1_ND */ |
| 113315 | GR64, i64mem, |
| 113316 | /* SHR64m1_NF */ |
| 113317 | i64mem, |
| 113318 | /* SHR64m1_NF_ND */ |
| 113319 | GR64, i64mem, |
| 113320 | /* SHR64mCL */ |
| 113321 | i64mem, |
| 113322 | /* SHR64mCL_EVEX */ |
| 113323 | i64mem, |
| 113324 | /* SHR64mCL_ND */ |
| 113325 | GR64, i64mem, |
| 113326 | /* SHR64mCL_NF */ |
| 113327 | i64mem, |
| 113328 | /* SHR64mCL_NF_ND */ |
| 113329 | GR64, i64mem, |
| 113330 | /* SHR64mi */ |
| 113331 | i64mem, u8imm, |
| 113332 | /* SHR64mi_EVEX */ |
| 113333 | i64mem, u8imm, |
| 113334 | /* SHR64mi_ND */ |
| 113335 | GR64, i64mem, u8imm, |
| 113336 | /* SHR64mi_NF */ |
| 113337 | i64mem, u8imm, |
| 113338 | /* SHR64mi_NF_ND */ |
| 113339 | GR64, i64mem, u8imm, |
| 113340 | /* SHR64r1 */ |
| 113341 | GR64, GR64, |
| 113342 | /* SHR64r1_EVEX */ |
| 113343 | GR64, GR64, |
| 113344 | /* SHR64r1_ND */ |
| 113345 | GR64, GR64, |
| 113346 | /* SHR64r1_NF */ |
| 113347 | GR64, GR64, |
| 113348 | /* SHR64r1_NF_ND */ |
| 113349 | GR64, GR64, |
| 113350 | /* SHR64rCL */ |
| 113351 | GR64, GR64, |
| 113352 | /* SHR64rCL_EVEX */ |
| 113353 | GR64, GR64, |
| 113354 | /* SHR64rCL_ND */ |
| 113355 | GR64, GR64, |
| 113356 | /* SHR64rCL_NF */ |
| 113357 | GR64, GR64, |
| 113358 | /* SHR64rCL_NF_ND */ |
| 113359 | GR64, GR64, |
| 113360 | /* SHR64ri */ |
| 113361 | GR64, GR64, u8imm, |
| 113362 | /* SHR64ri_EVEX */ |
| 113363 | GR64, GR64, u8imm, |
| 113364 | /* SHR64ri_ND */ |
| 113365 | GR64, GR64, u8imm, |
| 113366 | /* SHR64ri_NF */ |
| 113367 | GR64, GR64, u8imm, |
| 113368 | /* SHR64ri_NF_ND */ |
| 113369 | GR64, GR64, u8imm, |
| 113370 | /* SHR8m1 */ |
| 113371 | i8mem, |
| 113372 | /* SHR8m1_EVEX */ |
| 113373 | i8mem, |
| 113374 | /* SHR8m1_ND */ |
| 113375 | GR8, i8mem, |
| 113376 | /* SHR8m1_NF */ |
| 113377 | i8mem, |
| 113378 | /* SHR8m1_NF_ND */ |
| 113379 | GR8, i8mem, |
| 113380 | /* SHR8mCL */ |
| 113381 | i8mem, |
| 113382 | /* SHR8mCL_EVEX */ |
| 113383 | i8mem, |
| 113384 | /* SHR8mCL_ND */ |
| 113385 | GR8, i8mem, |
| 113386 | /* SHR8mCL_NF */ |
| 113387 | i8mem, |
| 113388 | /* SHR8mCL_NF_ND */ |
| 113389 | GR8, i8mem, |
| 113390 | /* SHR8mi */ |
| 113391 | i8mem, u8imm, |
| 113392 | /* SHR8mi_EVEX */ |
| 113393 | i8mem, u8imm, |
| 113394 | /* SHR8mi_ND */ |
| 113395 | GR8, i8mem, u8imm, |
| 113396 | /* SHR8mi_NF */ |
| 113397 | i8mem, u8imm, |
| 113398 | /* SHR8mi_NF_ND */ |
| 113399 | GR8, i8mem, u8imm, |
| 113400 | /* SHR8r1 */ |
| 113401 | GR8, GR8, |
| 113402 | /* SHR8r1_EVEX */ |
| 113403 | GR8, GR8, |
| 113404 | /* SHR8r1_ND */ |
| 113405 | GR8, GR8, |
| 113406 | /* SHR8r1_NF */ |
| 113407 | GR8, GR8, |
| 113408 | /* SHR8r1_NF_ND */ |
| 113409 | GR8, GR8, |
| 113410 | /* SHR8rCL */ |
| 113411 | GR8, GR8, |
| 113412 | /* SHR8rCL_EVEX */ |
| 113413 | GR8, GR8, |
| 113414 | /* SHR8rCL_ND */ |
| 113415 | GR8, GR8, |
| 113416 | /* SHR8rCL_NF */ |
| 113417 | GR8, GR8, |
| 113418 | /* SHR8rCL_NF_ND */ |
| 113419 | GR8, GR8, |
| 113420 | /* SHR8ri */ |
| 113421 | GR8, GR8, u8imm, |
| 113422 | /* SHR8ri_EVEX */ |
| 113423 | GR8, GR8, u8imm, |
| 113424 | /* SHR8ri_ND */ |
| 113425 | GR8, GR8, u8imm, |
| 113426 | /* SHR8ri_NF */ |
| 113427 | GR8, GR8, u8imm, |
| 113428 | /* SHR8ri_NF_ND */ |
| 113429 | GR8, GR8, u8imm, |
| 113430 | /* SHRD16mrCL */ |
| 113431 | i16mem, GR16, |
| 113432 | /* SHRD16mrCL_EVEX */ |
| 113433 | i16mem, GR16, |
| 113434 | /* SHRD16mrCL_ND */ |
| 113435 | GR16, i16mem, GR16, |
| 113436 | /* SHRD16mrCL_NF */ |
| 113437 | i16mem, GR16, |
| 113438 | /* SHRD16mrCL_NF_ND */ |
| 113439 | GR16, i16mem, GR16, |
| 113440 | /* SHRD16mri8 */ |
| 113441 | i16mem, GR16, u8imm, |
| 113442 | /* SHRD16mri8_EVEX */ |
| 113443 | i16mem, GR16, u8imm, |
| 113444 | /* SHRD16mri8_ND */ |
| 113445 | GR16, i16mem, GR16, u8imm, |
| 113446 | /* SHRD16mri8_NF */ |
| 113447 | i16mem, GR16, u8imm, |
| 113448 | /* SHRD16mri8_NF_ND */ |
| 113449 | GR16, i16mem, GR16, u8imm, |
| 113450 | /* SHRD16rrCL */ |
| 113451 | GR16, GR16, GR16, |
| 113452 | /* SHRD16rrCL_EVEX */ |
| 113453 | GR16, GR16, GR16, |
| 113454 | /* SHRD16rrCL_ND */ |
| 113455 | GR16, GR16, GR16, |
| 113456 | /* SHRD16rrCL_NF */ |
| 113457 | GR16, GR16, GR16, |
| 113458 | /* SHRD16rrCL_NF_ND */ |
| 113459 | GR16, GR16, GR16, |
| 113460 | /* SHRD16rri8 */ |
| 113461 | GR16, GR16, GR16, u8imm, |
| 113462 | /* SHRD16rri8_EVEX */ |
| 113463 | GR16, GR16, GR16, u8imm, |
| 113464 | /* SHRD16rri8_ND */ |
| 113465 | GR16, GR16, GR16, u8imm, |
| 113466 | /* SHRD16rri8_NF */ |
| 113467 | GR16, GR16, GR16, u8imm, |
| 113468 | /* SHRD16rri8_NF_ND */ |
| 113469 | GR16, GR16, GR16, u8imm, |
| 113470 | /* SHRD32mrCL */ |
| 113471 | i32mem, GR32, |
| 113472 | /* SHRD32mrCL_EVEX */ |
| 113473 | i32mem, GR32, |
| 113474 | /* SHRD32mrCL_ND */ |
| 113475 | GR32, i32mem, GR32, |
| 113476 | /* SHRD32mrCL_NF */ |
| 113477 | i32mem, GR32, |
| 113478 | /* SHRD32mrCL_NF_ND */ |
| 113479 | GR32, i32mem, GR32, |
| 113480 | /* SHRD32mri8 */ |
| 113481 | i32mem, GR32, u8imm, |
| 113482 | /* SHRD32mri8_EVEX */ |
| 113483 | i32mem, GR32, u8imm, |
| 113484 | /* SHRD32mri8_ND */ |
| 113485 | GR32, i32mem, GR32, u8imm, |
| 113486 | /* SHRD32mri8_NF */ |
| 113487 | i32mem, GR32, u8imm, |
| 113488 | /* SHRD32mri8_NF_ND */ |
| 113489 | GR32, i32mem, GR32, u8imm, |
| 113490 | /* SHRD32rrCL */ |
| 113491 | GR32, GR32, GR32, |
| 113492 | /* SHRD32rrCL_EVEX */ |
| 113493 | GR32, GR32, GR32, |
| 113494 | /* SHRD32rrCL_ND */ |
| 113495 | GR32, GR32, GR32, |
| 113496 | /* SHRD32rrCL_NF */ |
| 113497 | GR32, GR32, GR32, |
| 113498 | /* SHRD32rrCL_NF_ND */ |
| 113499 | GR32, GR32, GR32, |
| 113500 | /* SHRD32rri8 */ |
| 113501 | GR32, GR32, GR32, u8imm, |
| 113502 | /* SHRD32rri8_EVEX */ |
| 113503 | GR32, GR32, GR32, u8imm, |
| 113504 | /* SHRD32rri8_ND */ |
| 113505 | GR32, GR32, GR32, u8imm, |
| 113506 | /* SHRD32rri8_NF */ |
| 113507 | GR32, GR32, GR32, u8imm, |
| 113508 | /* SHRD32rri8_NF_ND */ |
| 113509 | GR32, GR32, GR32, u8imm, |
| 113510 | /* SHRD64mrCL */ |
| 113511 | i64mem, GR64, |
| 113512 | /* SHRD64mrCL_EVEX */ |
| 113513 | i64mem, GR64, |
| 113514 | /* SHRD64mrCL_ND */ |
| 113515 | GR64, i64mem, GR64, |
| 113516 | /* SHRD64mrCL_NF */ |
| 113517 | i64mem, GR64, |
| 113518 | /* SHRD64mrCL_NF_ND */ |
| 113519 | GR64, i64mem, GR64, |
| 113520 | /* SHRD64mri8 */ |
| 113521 | i64mem, GR64, u8imm, |
| 113522 | /* SHRD64mri8_EVEX */ |
| 113523 | i64mem, GR64, u8imm, |
| 113524 | /* SHRD64mri8_ND */ |
| 113525 | GR64, i64mem, GR64, u8imm, |
| 113526 | /* SHRD64mri8_NF */ |
| 113527 | i64mem, GR64, u8imm, |
| 113528 | /* SHRD64mri8_NF_ND */ |
| 113529 | GR64, i64mem, GR64, u8imm, |
| 113530 | /* SHRD64rrCL */ |
| 113531 | GR64, GR64, GR64, |
| 113532 | /* SHRD64rrCL_EVEX */ |
| 113533 | GR64, GR64, GR64, |
| 113534 | /* SHRD64rrCL_ND */ |
| 113535 | GR64, GR64, GR64, |
| 113536 | /* SHRD64rrCL_NF */ |
| 113537 | GR64, GR64, GR64, |
| 113538 | /* SHRD64rrCL_NF_ND */ |
| 113539 | GR64, GR64, GR64, |
| 113540 | /* SHRD64rri8 */ |
| 113541 | GR64, GR64, GR64, u8imm, |
| 113542 | /* SHRD64rri8_EVEX */ |
| 113543 | GR64, GR64, GR64, u8imm, |
| 113544 | /* SHRD64rri8_ND */ |
| 113545 | GR64, GR64, GR64, u8imm, |
| 113546 | /* SHRD64rri8_NF */ |
| 113547 | GR64, GR64, GR64, u8imm, |
| 113548 | /* SHRD64rri8_NF_ND */ |
| 113549 | GR64, GR64, GR64, u8imm, |
| 113550 | /* SHRX32rm */ |
| 113551 | GR32, i32mem, GR32, |
| 113552 | /* SHRX32rm_EVEX */ |
| 113553 | GR32, i32mem, GR32, |
| 113554 | /* SHRX32rr */ |
| 113555 | GR32, GR32, GR32, |
| 113556 | /* SHRX32rr_EVEX */ |
| 113557 | GR32, GR32, GR32, |
| 113558 | /* SHRX64rm */ |
| 113559 | GR64, i64mem, GR64, |
| 113560 | /* SHRX64rm_EVEX */ |
| 113561 | GR64, i64mem, GR64, |
| 113562 | /* SHRX64rr */ |
| 113563 | GR64, GR64, GR64, |
| 113564 | /* SHRX64rr_EVEX */ |
| 113565 | GR64, GR64, GR64, |
| 113566 | /* SHUFPDrmi */ |
| 113567 | VR128, VR128, f128mem, u8imm, |
| 113568 | /* SHUFPDrri */ |
| 113569 | VR128, VR128, VR128, u8imm, |
| 113570 | /* SHUFPSrmi */ |
| 113571 | VR128, VR128, f128mem, u8imm, |
| 113572 | /* SHUFPSrri */ |
| 113573 | VR128, VR128, VR128, u8imm, |
| 113574 | /* SIDT16m */ |
| 113575 | opaquemem, |
| 113576 | /* SIDT32m */ |
| 113577 | opaquemem, |
| 113578 | /* SIDT64m */ |
| 113579 | opaquemem, |
| 113580 | /* SKINIT */ |
| 113581 | /* SLDT16m */ |
| 113582 | i16mem, |
| 113583 | /* SLDT16r */ |
| 113584 | GR16, |
| 113585 | /* SLDT32r */ |
| 113586 | GR32, |
| 113587 | /* SLDT64r */ |
| 113588 | GR64, |
| 113589 | /* SLWPCB */ |
| 113590 | GR32, |
| 113591 | /* SLWPCB64 */ |
| 113592 | GR64, |
| 113593 | /* SMSW16m */ |
| 113594 | i16mem, |
| 113595 | /* SMSW16r */ |
| 113596 | GR16, |
| 113597 | /* SMSW32r */ |
| 113598 | GR32, |
| 113599 | /* SMSW64r */ |
| 113600 | GR64, |
| 113601 | /* SQRTPDm */ |
| 113602 | VR128, f128mem, |
| 113603 | /* SQRTPDr */ |
| 113604 | VR128, VR128, |
| 113605 | /* SQRTPSm */ |
| 113606 | VR128, f128mem, |
| 113607 | /* SQRTPSr */ |
| 113608 | VR128, VR128, |
| 113609 | /* SQRTSDm */ |
| 113610 | FR64, f64mem, |
| 113611 | /* SQRTSDm_Int */ |
| 113612 | VR128, VR128, sdmem, |
| 113613 | /* SQRTSDr */ |
| 113614 | FR64, FR64, |
| 113615 | /* SQRTSDr_Int */ |
| 113616 | VR128, VR128, VR128, |
| 113617 | /* SQRTSSm */ |
| 113618 | FR32, f32mem, |
| 113619 | /* SQRTSSm_Int */ |
| 113620 | VR128, VR128, ssmem, |
| 113621 | /* SQRTSSr */ |
| 113622 | FR32, FR32, |
| 113623 | /* SQRTSSr_Int */ |
| 113624 | VR128, VR128, VR128, |
| 113625 | /* SQRT_F */ |
| 113626 | /* SQRT_Fp32 */ |
| 113627 | RFP32, RFP32, |
| 113628 | /* SQRT_Fp64 */ |
| 113629 | RFP64, RFP64, |
| 113630 | /* SQRT_Fp80 */ |
| 113631 | RFP80, RFP80, |
| 113632 | /* SS_PREFIX */ |
| 113633 | /* STAC */ |
| 113634 | /* STACKALLOC_W_PROBING */ |
| 113635 | i64imm, |
| 113636 | /* STC */ |
| 113637 | /* STD */ |
| 113638 | /* STGI */ |
| 113639 | /* STI */ |
| 113640 | /* STMXCSR */ |
| 113641 | i32mem, |
| 113642 | /* STOSB */ |
| 113643 | dstidx8, |
| 113644 | /* STOSL */ |
| 113645 | dstidx32, |
| 113646 | /* STOSQ */ |
| 113647 | dstidx64, |
| 113648 | /* STOSW */ |
| 113649 | dstidx16, |
| 113650 | /* STR16r */ |
| 113651 | GR16, |
| 113652 | /* STR32r */ |
| 113653 | GR32, |
| 113654 | /* STR64r */ |
| 113655 | GR64, |
| 113656 | /* STRm */ |
| 113657 | i16mem, |
| 113658 | /* STTILECFG */ |
| 113659 | opaquemem, |
| 113660 | /* STTILECFG_EVEX */ |
| 113661 | opaquemem, |
| 113662 | /* STUI */ |
| 113663 | /* ST_F32m */ |
| 113664 | f32mem, |
| 113665 | /* ST_F64m */ |
| 113666 | f64mem, |
| 113667 | /* ST_FP32m */ |
| 113668 | f32mem, |
| 113669 | /* ST_FP64m */ |
| 113670 | f64mem, |
| 113671 | /* ST_FP80m */ |
| 113672 | f80mem, |
| 113673 | /* ST_FPrr */ |
| 113674 | RSTi, |
| 113675 | /* ST_Fp32m */ |
| 113676 | f32mem, RFP32, |
| 113677 | /* ST_Fp64m */ |
| 113678 | f64mem, RFP64, |
| 113679 | /* ST_Fp64m32 */ |
| 113680 | f32mem, RFP64, |
| 113681 | /* ST_Fp80m32 */ |
| 113682 | f32mem, RFP80, |
| 113683 | /* ST_Fp80m64 */ |
| 113684 | f64mem, RFP80, |
| 113685 | /* ST_FpP32m */ |
| 113686 | f32mem, RFP32, |
| 113687 | /* ST_FpP64m */ |
| 113688 | f64mem, RFP64, |
| 113689 | /* ST_FpP64m32 */ |
| 113690 | f32mem, RFP64, |
| 113691 | /* ST_FpP80m */ |
| 113692 | f80mem, RFP80, |
| 113693 | /* ST_FpP80m32 */ |
| 113694 | f32mem, RFP80, |
| 113695 | /* ST_FpP80m64 */ |
| 113696 | f64mem, RFP80, |
| 113697 | /* ST_Frr */ |
| 113698 | RSTi, |
| 113699 | /* SUB16i16 */ |
| 113700 | i16imm, |
| 113701 | /* SUB16mi */ |
| 113702 | i16mem, i16imm, |
| 113703 | /* SUB16mi8 */ |
| 113704 | i16mem, i16i8imm, |
| 113705 | /* SUB16mi8_EVEX */ |
| 113706 | i16mem, i16i8imm, |
| 113707 | /* SUB16mi8_ND */ |
| 113708 | GR16, i16mem, i16i8imm, |
| 113709 | /* SUB16mi8_NF */ |
| 113710 | i16mem, i16i8imm, |
| 113711 | /* SUB16mi8_NF_ND */ |
| 113712 | GR16, i16mem, i16i8imm, |
| 113713 | /* SUB16mi_EVEX */ |
| 113714 | i16mem, i16imm, |
| 113715 | /* SUB16mi_ND */ |
| 113716 | GR16, i16mem, i16imm, |
| 113717 | /* SUB16mi_NF */ |
| 113718 | i16mem, i16imm, |
| 113719 | /* SUB16mi_NF_ND */ |
| 113720 | GR16, i16mem, i16imm, |
| 113721 | /* SUB16mr */ |
| 113722 | i16mem, GR16, |
| 113723 | /* SUB16mr_EVEX */ |
| 113724 | i16mem, GR16, |
| 113725 | /* SUB16mr_ND */ |
| 113726 | GR16, i16mem, GR16, |
| 113727 | /* SUB16mr_NF */ |
| 113728 | i16mem, GR16, |
| 113729 | /* SUB16mr_NF_ND */ |
| 113730 | GR16, i16mem, GR16, |
| 113731 | /* SUB16ri */ |
| 113732 | GR16, GR16, i16imm, |
| 113733 | /* SUB16ri8 */ |
| 113734 | GR16, GR16, i16i8imm, |
| 113735 | /* SUB16ri8_EVEX */ |
| 113736 | GR16, GR16, i16i8imm, |
| 113737 | /* SUB16ri8_ND */ |
| 113738 | GR16, GR16, i16i8imm, |
| 113739 | /* SUB16ri8_NF */ |
| 113740 | GR16, GR16, i16i8imm, |
| 113741 | /* SUB16ri8_NF_ND */ |
| 113742 | GR16, GR16, i16i8imm, |
| 113743 | /* SUB16ri_EVEX */ |
| 113744 | GR16, GR16, i16imm, |
| 113745 | /* SUB16ri_ND */ |
| 113746 | GR16, GR16, i16imm, |
| 113747 | /* SUB16ri_NF */ |
| 113748 | GR16, GR16, i16imm, |
| 113749 | /* SUB16ri_NF_ND */ |
| 113750 | GR16, GR16, i16imm, |
| 113751 | /* SUB16rm */ |
| 113752 | GR16, GR16, i16mem, |
| 113753 | /* SUB16rm_EVEX */ |
| 113754 | GR16, GR16, i16mem, |
| 113755 | /* SUB16rm_ND */ |
| 113756 | GR16, GR16, i16mem, |
| 113757 | /* SUB16rm_NF */ |
| 113758 | GR16, GR16, i16mem, |
| 113759 | /* SUB16rm_NF_ND */ |
| 113760 | GR16, GR16, i16mem, |
| 113761 | /* SUB16rr */ |
| 113762 | GR16, GR16, GR16, |
| 113763 | /* SUB16rr_EVEX */ |
| 113764 | GR16, GR16, GR16, |
| 113765 | /* SUB16rr_EVEX_REV */ |
| 113766 | GR16, GR16, GR16, |
| 113767 | /* SUB16rr_ND */ |
| 113768 | GR16, GR16, GR16, |
| 113769 | /* SUB16rr_ND_REV */ |
| 113770 | GR16, GR16, GR16, |
| 113771 | /* SUB16rr_NF */ |
| 113772 | GR16, GR16, GR16, |
| 113773 | /* SUB16rr_NF_ND */ |
| 113774 | GR16, GR16, GR16, |
| 113775 | /* SUB16rr_NF_ND_REV */ |
| 113776 | GR16, GR16, GR16, |
| 113777 | /* SUB16rr_NF_REV */ |
| 113778 | GR16, GR16, GR16, |
| 113779 | /* SUB16rr_REV */ |
| 113780 | GR16, GR16, GR16, |
| 113781 | /* SUB32i32 */ |
| 113782 | i32imm, |
| 113783 | /* SUB32mi */ |
| 113784 | i32mem, i32imm, |
| 113785 | /* SUB32mi8 */ |
| 113786 | i32mem, i32i8imm, |
| 113787 | /* SUB32mi8_EVEX */ |
| 113788 | i32mem, i32i8imm, |
| 113789 | /* SUB32mi8_ND */ |
| 113790 | GR32, i32mem, i32i8imm, |
| 113791 | /* SUB32mi8_NF */ |
| 113792 | i32mem, i32i8imm, |
| 113793 | /* SUB32mi8_NF_ND */ |
| 113794 | GR32, i32mem, i32i8imm, |
| 113795 | /* SUB32mi_EVEX */ |
| 113796 | i32mem, i32imm, |
| 113797 | /* SUB32mi_ND */ |
| 113798 | GR32, i32mem, i32imm, |
| 113799 | /* SUB32mi_NF */ |
| 113800 | i32mem, i32imm, |
| 113801 | /* SUB32mi_NF_ND */ |
| 113802 | GR32, i32mem, i32imm, |
| 113803 | /* SUB32mr */ |
| 113804 | i32mem, GR32, |
| 113805 | /* SUB32mr_EVEX */ |
| 113806 | i32mem, GR32, |
| 113807 | /* SUB32mr_ND */ |
| 113808 | GR32, i32mem, GR32, |
| 113809 | /* SUB32mr_NF */ |
| 113810 | i32mem, GR32, |
| 113811 | /* SUB32mr_NF_ND */ |
| 113812 | GR32, i32mem, GR32, |
| 113813 | /* SUB32ri */ |
| 113814 | GR32, GR32, i32imm, |
| 113815 | /* SUB32ri8 */ |
| 113816 | GR32, GR32, i32i8imm, |
| 113817 | /* SUB32ri8_EVEX */ |
| 113818 | GR32, GR32, i32i8imm, |
| 113819 | /* SUB32ri8_ND */ |
| 113820 | GR32, GR32, i32i8imm, |
| 113821 | /* SUB32ri8_NF */ |
| 113822 | GR32, GR32, i32i8imm, |
| 113823 | /* SUB32ri8_NF_ND */ |
| 113824 | GR32, GR32, i32i8imm, |
| 113825 | /* SUB32ri_EVEX */ |
| 113826 | GR32, GR32, i32imm, |
| 113827 | /* SUB32ri_ND */ |
| 113828 | GR32, GR32, i32imm, |
| 113829 | /* SUB32ri_NF */ |
| 113830 | GR32, GR32, i32imm, |
| 113831 | /* SUB32ri_NF_ND */ |
| 113832 | GR32, GR32, i32imm, |
| 113833 | /* SUB32rm */ |
| 113834 | GR32, GR32, i32mem, |
| 113835 | /* SUB32rm_EVEX */ |
| 113836 | GR32, GR32, i32mem, |
| 113837 | /* SUB32rm_ND */ |
| 113838 | GR32, GR32, i32mem, |
| 113839 | /* SUB32rm_NF */ |
| 113840 | GR32, GR32, i32mem, |
| 113841 | /* SUB32rm_NF_ND */ |
| 113842 | GR32, GR32, i32mem, |
| 113843 | /* SUB32rr */ |
| 113844 | GR32, GR32, GR32, |
| 113845 | /* SUB32rr_EVEX */ |
| 113846 | GR32, GR32, GR32, |
| 113847 | /* SUB32rr_EVEX_REV */ |
| 113848 | GR32, GR32, GR32, |
| 113849 | /* SUB32rr_ND */ |
| 113850 | GR32, GR32, GR32, |
| 113851 | /* SUB32rr_ND_REV */ |
| 113852 | GR32, GR32, GR32, |
| 113853 | /* SUB32rr_NF */ |
| 113854 | GR32, GR32, GR32, |
| 113855 | /* SUB32rr_NF_ND */ |
| 113856 | GR32, GR32, GR32, |
| 113857 | /* SUB32rr_NF_ND_REV */ |
| 113858 | GR32, GR32, GR32, |
| 113859 | /* SUB32rr_NF_REV */ |
| 113860 | GR32, GR32, GR32, |
| 113861 | /* SUB32rr_REV */ |
| 113862 | GR32, GR32, GR32, |
| 113863 | /* SUB64i32 */ |
| 113864 | i64i32imm, |
| 113865 | /* SUB64mi32 */ |
| 113866 | i64mem, i64i32imm, |
| 113867 | /* SUB64mi32_EVEX */ |
| 113868 | i64mem, i64i32imm, |
| 113869 | /* SUB64mi32_ND */ |
| 113870 | GR64, i64mem, i64i32imm, |
| 113871 | /* SUB64mi32_NF */ |
| 113872 | i64mem, i64i32imm, |
| 113873 | /* SUB64mi32_NF_ND */ |
| 113874 | GR64, i64mem, i64i32imm, |
| 113875 | /* SUB64mi8 */ |
| 113876 | i64mem, i64i8imm, |
| 113877 | /* SUB64mi8_EVEX */ |
| 113878 | i64mem, i64i8imm, |
| 113879 | /* SUB64mi8_ND */ |
| 113880 | GR64, i64mem, i64i8imm, |
| 113881 | /* SUB64mi8_NF */ |
| 113882 | i64mem, i64i8imm, |
| 113883 | /* SUB64mi8_NF_ND */ |
| 113884 | GR64, i64mem, i64i8imm, |
| 113885 | /* SUB64mr */ |
| 113886 | i64mem, GR64, |
| 113887 | /* SUB64mr_EVEX */ |
| 113888 | i64mem, GR64, |
| 113889 | /* SUB64mr_ND */ |
| 113890 | GR64, i64mem, GR64, |
| 113891 | /* SUB64mr_NF */ |
| 113892 | i64mem, GR64, |
| 113893 | /* SUB64mr_NF_ND */ |
| 113894 | GR64, i64mem, GR64, |
| 113895 | /* SUB64ri32 */ |
| 113896 | GR64, GR64, i64i32imm, |
| 113897 | /* SUB64ri32_EVEX */ |
| 113898 | GR64, GR64, i64i32imm, |
| 113899 | /* SUB64ri32_ND */ |
| 113900 | GR64, GR64, i64i32imm, |
| 113901 | /* SUB64ri32_NF */ |
| 113902 | GR64, GR64, i64i32imm, |
| 113903 | /* SUB64ri32_NF_ND */ |
| 113904 | GR64, GR64, i64i32imm, |
| 113905 | /* SUB64ri8 */ |
| 113906 | GR64, GR64, i64i8imm, |
| 113907 | /* SUB64ri8_EVEX */ |
| 113908 | GR64, GR64, i64i8imm, |
| 113909 | /* SUB64ri8_ND */ |
| 113910 | GR64, GR64, i64i8imm, |
| 113911 | /* SUB64ri8_NF */ |
| 113912 | GR64, GR64, i64i8imm, |
| 113913 | /* SUB64ri8_NF_ND */ |
| 113914 | GR64, GR64, i64i8imm, |
| 113915 | /* SUB64rm */ |
| 113916 | GR64, GR64, i64mem, |
| 113917 | /* SUB64rm_EVEX */ |
| 113918 | GR64, GR64, i64mem, |
| 113919 | /* SUB64rm_ND */ |
| 113920 | GR64, GR64, i64mem, |
| 113921 | /* SUB64rm_NF */ |
| 113922 | GR64, GR64, i64mem, |
| 113923 | /* SUB64rm_NF_ND */ |
| 113924 | GR64, GR64, i64mem, |
| 113925 | /* SUB64rr */ |
| 113926 | GR64, GR64, GR64, |
| 113927 | /* SUB64rr_EVEX */ |
| 113928 | GR64, GR64, GR64, |
| 113929 | /* SUB64rr_EVEX_REV */ |
| 113930 | GR64, GR64, GR64, |
| 113931 | /* SUB64rr_ND */ |
| 113932 | GR64, GR64, GR64, |
| 113933 | /* SUB64rr_ND_REV */ |
| 113934 | GR64, GR64, GR64, |
| 113935 | /* SUB64rr_NF */ |
| 113936 | GR64, GR64, GR64, |
| 113937 | /* SUB64rr_NF_ND */ |
| 113938 | GR64, GR64, GR64, |
| 113939 | /* SUB64rr_NF_ND_REV */ |
| 113940 | GR64, GR64, GR64, |
| 113941 | /* SUB64rr_NF_REV */ |
| 113942 | GR64, GR64, GR64, |
| 113943 | /* SUB64rr_REV */ |
| 113944 | GR64, GR64, GR64, |
| 113945 | /* SUB8i8 */ |
| 113946 | i8imm, |
| 113947 | /* SUB8mi */ |
| 113948 | i8mem, i8imm, |
| 113949 | /* SUB8mi8 */ |
| 113950 | i8mem, i8imm, |
| 113951 | /* SUB8mi_EVEX */ |
| 113952 | i8mem, i8imm, |
| 113953 | /* SUB8mi_ND */ |
| 113954 | GR8, i8mem, i8imm, |
| 113955 | /* SUB8mi_NF */ |
| 113956 | i8mem, i8imm, |
| 113957 | /* SUB8mi_NF_ND */ |
| 113958 | GR8, i8mem, i8imm, |
| 113959 | /* SUB8mr */ |
| 113960 | i8mem, GR8, |
| 113961 | /* SUB8mr_EVEX */ |
| 113962 | i8mem, GR8, |
| 113963 | /* SUB8mr_ND */ |
| 113964 | GR8, i8mem, GR8, |
| 113965 | /* SUB8mr_NF */ |
| 113966 | i8mem, GR8, |
| 113967 | /* SUB8mr_NF_ND */ |
| 113968 | GR8, i8mem, GR8, |
| 113969 | /* SUB8ri */ |
| 113970 | GR8, GR8, i8imm, |
| 113971 | /* SUB8ri8 */ |
| 113972 | GR8, GR8, i8imm, |
| 113973 | /* SUB8ri_EVEX */ |
| 113974 | GR8, GR8, i8imm, |
| 113975 | /* SUB8ri_ND */ |
| 113976 | GR8, GR8, i8imm, |
| 113977 | /* SUB8ri_NF */ |
| 113978 | GR8, GR8, i8imm, |
| 113979 | /* SUB8ri_NF_ND */ |
| 113980 | GR8, GR8, i8imm, |
| 113981 | /* SUB8rm */ |
| 113982 | GR8, GR8, i8mem, |
| 113983 | /* SUB8rm_EVEX */ |
| 113984 | GR8, GR8, i8mem, |
| 113985 | /* SUB8rm_ND */ |
| 113986 | GR8, GR8, i8mem, |
| 113987 | /* SUB8rm_NF */ |
| 113988 | GR8, GR8, i8mem, |
| 113989 | /* SUB8rm_NF_ND */ |
| 113990 | GR8, GR8, i8mem, |
| 113991 | /* SUB8rr */ |
| 113992 | GR8, GR8, GR8, |
| 113993 | /* SUB8rr_EVEX */ |
| 113994 | GR8, GR8, GR8, |
| 113995 | /* SUB8rr_EVEX_REV */ |
| 113996 | GR8, GR8, GR8, |
| 113997 | /* SUB8rr_ND */ |
| 113998 | GR8, GR8, GR8, |
| 113999 | /* SUB8rr_ND_REV */ |
| 114000 | GR8, GR8, GR8, |
| 114001 | /* SUB8rr_NF */ |
| 114002 | GR8, GR8, GR8, |
| 114003 | /* SUB8rr_NF_ND */ |
| 114004 | GR8, GR8, GR8, |
| 114005 | /* SUB8rr_NF_ND_REV */ |
| 114006 | GR8, GR8, GR8, |
| 114007 | /* SUB8rr_NF_REV */ |
| 114008 | GR8, GR8, GR8, |
| 114009 | /* SUB8rr_REV */ |
| 114010 | GR8, GR8, GR8, |
| 114011 | /* SUBPDrm */ |
| 114012 | VR128, VR128, f128mem, |
| 114013 | /* SUBPDrr */ |
| 114014 | VR128, VR128, VR128, |
| 114015 | /* SUBPSrm */ |
| 114016 | VR128, VR128, f128mem, |
| 114017 | /* SUBPSrr */ |
| 114018 | VR128, VR128, VR128, |
| 114019 | /* SUBR_F32m */ |
| 114020 | f32mem, |
| 114021 | /* SUBR_F64m */ |
| 114022 | f64mem, |
| 114023 | /* SUBR_FI16m */ |
| 114024 | i16mem, |
| 114025 | /* SUBR_FI32m */ |
| 114026 | i32mem, |
| 114027 | /* SUBR_FPrST0 */ |
| 114028 | RSTi, |
| 114029 | /* SUBR_FST0r */ |
| 114030 | RSTi, |
| 114031 | /* SUBR_Fp32m */ |
| 114032 | RFP32, RFP32, f32mem, |
| 114033 | /* SUBR_Fp64m */ |
| 114034 | RFP64, RFP64, f64mem, |
| 114035 | /* SUBR_Fp64m32 */ |
| 114036 | RFP64, RFP64, f32mem, |
| 114037 | /* SUBR_Fp80m32 */ |
| 114038 | RFP80, RFP80, f32mem, |
| 114039 | /* SUBR_Fp80m64 */ |
| 114040 | RFP80, RFP80, f64mem, |
| 114041 | /* SUBR_FpI16m32 */ |
| 114042 | RFP32, RFP32, i16mem, |
| 114043 | /* SUBR_FpI16m64 */ |
| 114044 | RFP64, RFP64, i16mem, |
| 114045 | /* SUBR_FpI16m80 */ |
| 114046 | RFP80, RFP80, i16mem, |
| 114047 | /* SUBR_FpI32m32 */ |
| 114048 | RFP32, RFP32, i32mem, |
| 114049 | /* SUBR_FpI32m64 */ |
| 114050 | RFP64, RFP64, i32mem, |
| 114051 | /* SUBR_FpI32m80 */ |
| 114052 | RFP80, RFP80, i32mem, |
| 114053 | /* SUBR_FrST0 */ |
| 114054 | RSTi, |
| 114055 | /* SUBSDrm */ |
| 114056 | FR64, FR64, f64mem, |
| 114057 | /* SUBSDrm_Int */ |
| 114058 | VR128, VR128, sdmem, |
| 114059 | /* SUBSDrr */ |
| 114060 | FR64, FR64, FR64, |
| 114061 | /* SUBSDrr_Int */ |
| 114062 | VR128, VR128, VR128, |
| 114063 | /* SUBSSrm */ |
| 114064 | FR32, FR32, f32mem, |
| 114065 | /* SUBSSrm_Int */ |
| 114066 | VR128, VR128, ssmem, |
| 114067 | /* SUBSSrr */ |
| 114068 | FR32, FR32, FR32, |
| 114069 | /* SUBSSrr_Int */ |
| 114070 | VR128, VR128, VR128, |
| 114071 | /* SUB_F32m */ |
| 114072 | f32mem, |
| 114073 | /* SUB_F64m */ |
| 114074 | f64mem, |
| 114075 | /* SUB_FI16m */ |
| 114076 | i16mem, |
| 114077 | /* SUB_FI32m */ |
| 114078 | i32mem, |
| 114079 | /* SUB_FPrST0 */ |
| 114080 | RSTi, |
| 114081 | /* SUB_FST0r */ |
| 114082 | RSTi, |
| 114083 | /* SUB_Fp32 */ |
| 114084 | RFP32, RFP32, RFP32, |
| 114085 | /* SUB_Fp32m */ |
| 114086 | RFP32, RFP32, f32mem, |
| 114087 | /* SUB_Fp64 */ |
| 114088 | RFP64, RFP64, RFP64, |
| 114089 | /* SUB_Fp64m */ |
| 114090 | RFP64, RFP64, f64mem, |
| 114091 | /* SUB_Fp64m32 */ |
| 114092 | RFP64, RFP64, f32mem, |
| 114093 | /* SUB_Fp80 */ |
| 114094 | RFP80, RFP80, RFP80, |
| 114095 | /* SUB_Fp80m32 */ |
| 114096 | RFP80, RFP80, f32mem, |
| 114097 | /* SUB_Fp80m64 */ |
| 114098 | RFP80, RFP80, f64mem, |
| 114099 | /* SUB_FpI16m32 */ |
| 114100 | RFP32, RFP32, i16mem, |
| 114101 | /* SUB_FpI16m64 */ |
| 114102 | RFP64, RFP64, i16mem, |
| 114103 | /* SUB_FpI16m80 */ |
| 114104 | RFP80, RFP80, i16mem, |
| 114105 | /* SUB_FpI32m32 */ |
| 114106 | RFP32, RFP32, i32mem, |
| 114107 | /* SUB_FpI32m64 */ |
| 114108 | RFP64, RFP64, i32mem, |
| 114109 | /* SUB_FpI32m80 */ |
| 114110 | RFP80, RFP80, i32mem, |
| 114111 | /* SUB_FrST0 */ |
| 114112 | RSTi, |
| 114113 | /* SWAPGS */ |
| 114114 | /* SYSCALL */ |
| 114115 | /* SYSENTER */ |
| 114116 | /* SYSEXIT */ |
| 114117 | /* SYSEXIT64 */ |
| 114118 | /* SYSRET */ |
| 114119 | /* SYSRET64 */ |
| 114120 | /* T1MSKC32rm */ |
| 114121 | GR32, i32mem, |
| 114122 | /* T1MSKC32rr */ |
| 114123 | GR32, GR32, |
| 114124 | /* T1MSKC64rm */ |
| 114125 | GR64, i64mem, |
| 114126 | /* T1MSKC64rr */ |
| 114127 | GR64, GR64, |
| 114128 | /* TAILJMPd */ |
| 114129 | i32imm_brtarget, |
| 114130 | /* TAILJMPd64 */ |
| 114131 | i64i32imm_brtarget, |
| 114132 | /* TAILJMPd64_CC */ |
| 114133 | i64i32imm_brtarget, i32imm, |
| 114134 | /* TAILJMPd_CC */ |
| 114135 | i32imm_brtarget, i32imm, |
| 114136 | /* TAILJMPm */ |
| 114137 | i32mem_TC, |
| 114138 | /* TAILJMPm64 */ |
| 114139 | i64mem_TC, |
| 114140 | /* TAILJMPm64_REX */ |
| 114141 | i64mem_TC, |
| 114142 | /* TAILJMPr */ |
| 114143 | -1, |
| 114144 | /* TAILJMPr64 */ |
| 114145 | -1, |
| 114146 | /* TAILJMPr64_REX */ |
| 114147 | -1, |
| 114148 | /* TCMMIMFP16PS */ |
| 114149 | TILE, TILE, TILE, TILE, |
| 114150 | /* TCMMRLFP16PS */ |
| 114151 | TILE, TILE, TILE, TILE, |
| 114152 | /* TCRETURNdi */ |
| 114153 | i32imm_brtarget, i32imm, |
| 114154 | /* TCRETURNdi64 */ |
| 114155 | i64i32imm_brtarget, i32imm, |
| 114156 | /* TCRETURNdi64cc */ |
| 114157 | i64i32imm_brtarget, i32imm, i32imm, |
| 114158 | /* TCRETURNdicc */ |
| 114159 | i32imm_brtarget, i32imm, i32imm, |
| 114160 | /* TCRETURNmi */ |
| 114161 | i32mem_TC, i32imm, |
| 114162 | /* TCRETURNmi64 */ |
| 114163 | i64mem_TC, i32imm, |
| 114164 | /* TCRETURNri */ |
| 114165 | -1, i32imm, |
| 114166 | /* TCRETURNri64 */ |
| 114167 | -1, i32imm, |
| 114168 | /* TDCALL */ |
| 114169 | /* TDPBF16PS */ |
| 114170 | TILE, TILE, TILE, TILE, |
| 114171 | /* TDPBSSD */ |
| 114172 | TILE, TILE, TILE, TILE, |
| 114173 | /* TDPBSUD */ |
| 114174 | TILE, TILE, TILE, TILE, |
| 114175 | /* TDPBUSD */ |
| 114176 | TILE, TILE, TILE, TILE, |
| 114177 | /* TDPBUUD */ |
| 114178 | TILE, TILE, TILE, TILE, |
| 114179 | /* TDPFP16PS */ |
| 114180 | TILE, TILE, TILE, TILE, |
| 114181 | /* TEST16i16 */ |
| 114182 | i16imm, |
| 114183 | /* TEST16mi */ |
| 114184 | i16mem, i16imm, |
| 114185 | /* TEST16mr */ |
| 114186 | i16mem, GR16, |
| 114187 | /* TEST16ri */ |
| 114188 | GR16, i16imm, |
| 114189 | /* TEST16rr */ |
| 114190 | GR16, GR16, |
| 114191 | /* TEST32i32 */ |
| 114192 | i32imm, |
| 114193 | /* TEST32mi */ |
| 114194 | i32mem, i32imm, |
| 114195 | /* TEST32mr */ |
| 114196 | i32mem, GR32, |
| 114197 | /* TEST32ri */ |
| 114198 | GR32, i32imm, |
| 114199 | /* TEST32rr */ |
| 114200 | GR32, GR32, |
| 114201 | /* TEST64i32 */ |
| 114202 | i64i32imm, |
| 114203 | /* TEST64mi32 */ |
| 114204 | i64mem, i64i32imm, |
| 114205 | /* TEST64mr */ |
| 114206 | i64mem, GR64, |
| 114207 | /* TEST64ri32 */ |
| 114208 | GR64, i64i32imm, |
| 114209 | /* TEST64rr */ |
| 114210 | GR64, GR64, |
| 114211 | /* TEST8i8 */ |
| 114212 | i8imm, |
| 114213 | /* TEST8mi */ |
| 114214 | i8mem, i8imm, |
| 114215 | /* TEST8mr */ |
| 114216 | i8mem, GR8, |
| 114217 | /* TEST8ri */ |
| 114218 | GR8, i8imm, |
| 114219 | /* TEST8rr */ |
| 114220 | GR8, GR8, |
| 114221 | /* TESTUI */ |
| 114222 | /* TILELOADD */ |
| 114223 | TILE, sibmem, |
| 114224 | /* TILELOADDT1 */ |
| 114225 | TILE, sibmem, |
| 114226 | /* TILELOADDT1_EVEX */ |
| 114227 | TILE, sibmem, |
| 114228 | /* TILELOADD_EVEX */ |
| 114229 | TILE, sibmem, |
| 114230 | /* TILERELEASE */ |
| 114231 | /* TILESTORED */ |
| 114232 | sibmem, TILE, |
| 114233 | /* TILESTORED_EVEX */ |
| 114234 | sibmem, TILE, |
| 114235 | /* TILEZERO */ |
| 114236 | TILE, |
| 114237 | /* TLBSYNC */ |
| 114238 | /* TLSCall_32 */ |
| 114239 | i32mem, |
| 114240 | /* TLSCall_64 */ |
| 114241 | i64mem, |
| 114242 | /* TLS_addr32 */ |
| 114243 | i32mem, |
| 114244 | /* TLS_addr64 */ |
| 114245 | i64mem, |
| 114246 | /* TLS_addrX32 */ |
| 114247 | i32mem, |
| 114248 | /* TLS_base_addr32 */ |
| 114249 | i32mem, |
| 114250 | /* TLS_base_addr64 */ |
| 114251 | i64mem, |
| 114252 | /* TLS_base_addrX32 */ |
| 114253 | i32mem, |
| 114254 | /* TLS_desc32 */ |
| 114255 | i32mem, |
| 114256 | /* TLS_desc64 */ |
| 114257 | i64mem, |
| 114258 | /* TPAUSE */ |
| 114259 | GR32orGR64, |
| 114260 | /* TRAP */ |
| 114261 | /* TST_F */ |
| 114262 | /* TST_Fp32 */ |
| 114263 | RFP32, |
| 114264 | /* TST_Fp64 */ |
| 114265 | RFP64, |
| 114266 | /* TST_Fp80 */ |
| 114267 | RFP80, |
| 114268 | /* TZCNT16rm */ |
| 114269 | GR16, i16mem, |
| 114270 | /* TZCNT16rm_EVEX */ |
| 114271 | GR16, i16mem, |
| 114272 | /* TZCNT16rm_NF */ |
| 114273 | GR16, i16mem, |
| 114274 | /* TZCNT16rr */ |
| 114275 | GR16, GR16, |
| 114276 | /* TZCNT16rr_EVEX */ |
| 114277 | GR16, GR16, |
| 114278 | /* TZCNT16rr_NF */ |
| 114279 | GR16, GR16, |
| 114280 | /* TZCNT32rm */ |
| 114281 | GR32, i32mem, |
| 114282 | /* TZCNT32rm_EVEX */ |
| 114283 | GR32, i32mem, |
| 114284 | /* TZCNT32rm_NF */ |
| 114285 | GR32, i32mem, |
| 114286 | /* TZCNT32rr */ |
| 114287 | GR32, GR32, |
| 114288 | /* TZCNT32rr_EVEX */ |
| 114289 | GR32, GR32, |
| 114290 | /* TZCNT32rr_NF */ |
| 114291 | GR32, GR32, |
| 114292 | /* TZCNT64rm */ |
| 114293 | GR64, i64mem, |
| 114294 | /* TZCNT64rm_EVEX */ |
| 114295 | GR64, i64mem, |
| 114296 | /* TZCNT64rm_NF */ |
| 114297 | GR64, i64mem, |
| 114298 | /* TZCNT64rr */ |
| 114299 | GR64, GR64, |
| 114300 | /* TZCNT64rr_EVEX */ |
| 114301 | GR64, GR64, |
| 114302 | /* TZCNT64rr_NF */ |
| 114303 | GR64, GR64, |
| 114304 | /* TZMSK32rm */ |
| 114305 | GR32, i32mem, |
| 114306 | /* TZMSK32rr */ |
| 114307 | GR32, GR32, |
| 114308 | /* TZMSK64rm */ |
| 114309 | GR64, i64mem, |
| 114310 | /* TZMSK64rr */ |
| 114311 | GR64, GR64, |
| 114312 | /* UBSAN_UD1 */ |
| 114313 | i32imm, |
| 114314 | /* UCOMISDrm */ |
| 114315 | FR64, f64mem, |
| 114316 | /* UCOMISDrm_Int */ |
| 114317 | VR128, sdmem, |
| 114318 | /* UCOMISDrr */ |
| 114319 | FR64, FR64, |
| 114320 | /* UCOMISDrr_Int */ |
| 114321 | VR128, VR128, |
| 114322 | /* UCOMISSrm */ |
| 114323 | FR32, f32mem, |
| 114324 | /* UCOMISSrm_Int */ |
| 114325 | VR128, ssmem, |
| 114326 | /* UCOMISSrr */ |
| 114327 | FR32, FR32, |
| 114328 | /* UCOMISSrr_Int */ |
| 114329 | VR128, VR128, |
| 114330 | /* UCOM_FIPr */ |
| 114331 | RSTi, |
| 114332 | /* UCOM_FIr */ |
| 114333 | RSTi, |
| 114334 | /* UCOM_FPPr */ |
| 114335 | /* UCOM_FPr */ |
| 114336 | RSTi, |
| 114337 | /* UCOM_FpIr32 */ |
| 114338 | RFP32, RFP32, |
| 114339 | /* UCOM_FpIr64 */ |
| 114340 | RFP64, RFP64, |
| 114341 | /* UCOM_FpIr80 */ |
| 114342 | RFP80, RFP80, |
| 114343 | /* UCOM_Fpr32 */ |
| 114344 | RFP32, RFP32, |
| 114345 | /* UCOM_Fpr64 */ |
| 114346 | RFP64, RFP64, |
| 114347 | /* UCOM_Fpr80 */ |
| 114348 | RFP80, RFP80, |
| 114349 | /* UCOM_Fr */ |
| 114350 | RSTi, |
| 114351 | /* UD1Lm */ |
| 114352 | GR32, i32mem, |
| 114353 | /* UD1Lr */ |
| 114354 | GR32, GR32, |
| 114355 | /* UD1Qm */ |
| 114356 | GR64, i64mem, |
| 114357 | /* UD1Qr */ |
| 114358 | GR64, GR64, |
| 114359 | /* UD1Wm */ |
| 114360 | GR16, i16mem, |
| 114361 | /* UD1Wr */ |
| 114362 | GR16, GR16, |
| 114363 | /* UIRET */ |
| 114364 | /* UMONITOR16 */ |
| 114365 | GR16, |
| 114366 | /* UMONITOR32 */ |
| 114367 | GR32, |
| 114368 | /* UMONITOR64 */ |
| 114369 | GR64, |
| 114370 | /* UMWAIT */ |
| 114371 | GR32orGR64, |
| 114372 | /* UNPCKHPDrm */ |
| 114373 | VR128, VR128, f128mem, |
| 114374 | /* UNPCKHPDrr */ |
| 114375 | VR128, VR128, VR128, |
| 114376 | /* UNPCKHPSrm */ |
| 114377 | VR128, VR128, f128mem, |
| 114378 | /* UNPCKHPSrr */ |
| 114379 | VR128, VR128, VR128, |
| 114380 | /* UNPCKLPDrm */ |
| 114381 | VR128, VR128, f128mem, |
| 114382 | /* UNPCKLPDrr */ |
| 114383 | VR128, VR128, VR128, |
| 114384 | /* UNPCKLPSrm */ |
| 114385 | VR128, VR128, f128mem, |
| 114386 | /* UNPCKLPSrr */ |
| 114387 | VR128, VR128, VR128, |
| 114388 | /* URDMSRri */ |
| 114389 | GR64, i64i32imm, |
| 114390 | /* URDMSRri_EVEX */ |
| 114391 | GR64, i64i32imm, |
| 114392 | /* URDMSRrr */ |
| 114393 | GR64, GR64, |
| 114394 | /* URDMSRrr_EVEX */ |
| 114395 | GR64, GR64, |
| 114396 | /* UWRMSRir */ |
| 114397 | GR64, i64i32imm, |
| 114398 | /* UWRMSRir_EVEX */ |
| 114399 | GR64, i64i32imm, |
| 114400 | /* UWRMSRrr */ |
| 114401 | GR64, GR64, |
| 114402 | /* UWRMSRrr_EVEX */ |
| 114403 | GR64, GR64, |
| 114404 | /* V4FMADDPSrm */ |
| 114405 | VR512, VR512, VR512, f128mem, |
| 114406 | /* V4FMADDPSrmk */ |
| 114407 | VR512, VR512, VK16WM, VR512, f128mem, |
| 114408 | /* V4FMADDPSrmkz */ |
| 114409 | VR512, VR512, VK16WM, VR512, f128mem, |
| 114410 | /* V4FMADDSSrm */ |
| 114411 | VR128X, VR128X, VR128X, f128mem, |
| 114412 | /* V4FMADDSSrmk */ |
| 114413 | VR128X, VR128X, VK1WM, VR128X, f128mem, |
| 114414 | /* V4FMADDSSrmkz */ |
| 114415 | VR128X, VR128X, VK1WM, VR128X, f128mem, |
| 114416 | /* V4FNMADDPSrm */ |
| 114417 | VR512, VR512, VR512, f128mem, |
| 114418 | /* V4FNMADDPSrmk */ |
| 114419 | VR512, VR512, VK16WM, VR512, f128mem, |
| 114420 | /* V4FNMADDPSrmkz */ |
| 114421 | VR512, VR512, VK16WM, VR512, f128mem, |
| 114422 | /* V4FNMADDSSrm */ |
| 114423 | VR128X, VR128X, VR128X, f128mem, |
| 114424 | /* V4FNMADDSSrmk */ |
| 114425 | VR128X, VR128X, VK1WM, VR128X, f128mem, |
| 114426 | /* V4FNMADDSSrmkz */ |
| 114427 | VR128X, VR128X, VK1WM, VR128X, f128mem, |
| 114428 | /* VAARG_64 */ |
| 114429 | GR64, i8mem, i32imm, i8imm, i32imm, |
| 114430 | /* VAARG_X32 */ |
| 114431 | GR32, i8mem, i32imm, i8imm, i32imm, |
| 114432 | /* VADDPDYrm */ |
| 114433 | VR256, VR256, f256mem, |
| 114434 | /* VADDPDYrr */ |
| 114435 | VR256, VR256, VR256, |
| 114436 | /* VADDPDZ128rm */ |
| 114437 | VR128X, VR128X, f128mem, |
| 114438 | /* VADDPDZ128rmb */ |
| 114439 | VR128X, VR128X, f64mem, |
| 114440 | /* VADDPDZ128rmbk */ |
| 114441 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 114442 | /* VADDPDZ128rmbkz */ |
| 114443 | VR128X, VK2WM, VR128X, f64mem, |
| 114444 | /* VADDPDZ128rmk */ |
| 114445 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 114446 | /* VADDPDZ128rmkz */ |
| 114447 | VR128X, VK2WM, VR128X, f128mem, |
| 114448 | /* VADDPDZ128rr */ |
| 114449 | VR128X, VR128X, VR128X, |
| 114450 | /* VADDPDZ128rrk */ |
| 114451 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 114452 | /* VADDPDZ128rrkz */ |
| 114453 | VR128X, VK2WM, VR128X, VR128X, |
| 114454 | /* VADDPDZ256rm */ |
| 114455 | VR256X, VR256X, f256mem, |
| 114456 | /* VADDPDZ256rmb */ |
| 114457 | VR256X, VR256X, f64mem, |
| 114458 | /* VADDPDZ256rmbk */ |
| 114459 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 114460 | /* VADDPDZ256rmbkz */ |
| 114461 | VR256X, VK4WM, VR256X, f64mem, |
| 114462 | /* VADDPDZ256rmk */ |
| 114463 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 114464 | /* VADDPDZ256rmkz */ |
| 114465 | VR256X, VK4WM, VR256X, f256mem, |
| 114466 | /* VADDPDZ256rr */ |
| 114467 | VR256X, VR256X, VR256X, |
| 114468 | /* VADDPDZ256rrk */ |
| 114469 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 114470 | /* VADDPDZ256rrkz */ |
| 114471 | VR256X, VK4WM, VR256X, VR256X, |
| 114472 | /* VADDPDZrm */ |
| 114473 | VR512, VR512, f512mem, |
| 114474 | /* VADDPDZrmb */ |
| 114475 | VR512, VR512, f64mem, |
| 114476 | /* VADDPDZrmbk */ |
| 114477 | VR512, VR512, VK8WM, VR512, f64mem, |
| 114478 | /* VADDPDZrmbkz */ |
| 114479 | VR512, VK8WM, VR512, f64mem, |
| 114480 | /* VADDPDZrmk */ |
| 114481 | VR512, VR512, VK8WM, VR512, f512mem, |
| 114482 | /* VADDPDZrmkz */ |
| 114483 | VR512, VK8WM, VR512, f512mem, |
| 114484 | /* VADDPDZrr */ |
| 114485 | VR512, VR512, VR512, |
| 114486 | /* VADDPDZrrb */ |
| 114487 | VR512, VR512, VR512, AVX512RC, |
| 114488 | /* VADDPDZrrbk */ |
| 114489 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 114490 | /* VADDPDZrrbkz */ |
| 114491 | VR512, VK8WM, VR512, VR512, AVX512RC, |
| 114492 | /* VADDPDZrrk */ |
| 114493 | VR512, VR512, VK8WM, VR512, VR512, |
| 114494 | /* VADDPDZrrkz */ |
| 114495 | VR512, VK8WM, VR512, VR512, |
| 114496 | /* VADDPDrm */ |
| 114497 | VR128, VR128, f128mem, |
| 114498 | /* VADDPDrr */ |
| 114499 | VR128, VR128, VR128, |
| 114500 | /* VADDPHZ128rm */ |
| 114501 | VR128X, VR128X, f128mem, |
| 114502 | /* VADDPHZ128rmb */ |
| 114503 | VR128X, VR128X, f16mem, |
| 114504 | /* VADDPHZ128rmbk */ |
| 114505 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 114506 | /* VADDPHZ128rmbkz */ |
| 114507 | VR128X, VK8WM, VR128X, f16mem, |
| 114508 | /* VADDPHZ128rmk */ |
| 114509 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 114510 | /* VADDPHZ128rmkz */ |
| 114511 | VR128X, VK8WM, VR128X, f128mem, |
| 114512 | /* VADDPHZ128rr */ |
| 114513 | VR128X, VR128X, VR128X, |
| 114514 | /* VADDPHZ128rrk */ |
| 114515 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 114516 | /* VADDPHZ128rrkz */ |
| 114517 | VR128X, VK8WM, VR128X, VR128X, |
| 114518 | /* VADDPHZ256rm */ |
| 114519 | VR256X, VR256X, f256mem, |
| 114520 | /* VADDPHZ256rmb */ |
| 114521 | VR256X, VR256X, f16mem, |
| 114522 | /* VADDPHZ256rmbk */ |
| 114523 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 114524 | /* VADDPHZ256rmbkz */ |
| 114525 | VR256X, VK16WM, VR256X, f16mem, |
| 114526 | /* VADDPHZ256rmk */ |
| 114527 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 114528 | /* VADDPHZ256rmkz */ |
| 114529 | VR256X, VK16WM, VR256X, f256mem, |
| 114530 | /* VADDPHZ256rr */ |
| 114531 | VR256X, VR256X, VR256X, |
| 114532 | /* VADDPHZ256rrk */ |
| 114533 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 114534 | /* VADDPHZ256rrkz */ |
| 114535 | VR256X, VK16WM, VR256X, VR256X, |
| 114536 | /* VADDPHZrm */ |
| 114537 | VR512, VR512, f512mem, |
| 114538 | /* VADDPHZrmb */ |
| 114539 | VR512, VR512, f16mem, |
| 114540 | /* VADDPHZrmbk */ |
| 114541 | VR512, VR512, VK32WM, VR512, f16mem, |
| 114542 | /* VADDPHZrmbkz */ |
| 114543 | VR512, VK32WM, VR512, f16mem, |
| 114544 | /* VADDPHZrmk */ |
| 114545 | VR512, VR512, VK32WM, VR512, f512mem, |
| 114546 | /* VADDPHZrmkz */ |
| 114547 | VR512, VK32WM, VR512, f512mem, |
| 114548 | /* VADDPHZrr */ |
| 114549 | VR512, VR512, VR512, |
| 114550 | /* VADDPHZrrb */ |
| 114551 | VR512, VR512, VR512, AVX512RC, |
| 114552 | /* VADDPHZrrbk */ |
| 114553 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 114554 | /* VADDPHZrrbkz */ |
| 114555 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 114556 | /* VADDPHZrrk */ |
| 114557 | VR512, VR512, VK32WM, VR512, VR512, |
| 114558 | /* VADDPHZrrkz */ |
| 114559 | VR512, VK32WM, VR512, VR512, |
| 114560 | /* VADDPSYrm */ |
| 114561 | VR256, VR256, f256mem, |
| 114562 | /* VADDPSYrr */ |
| 114563 | VR256, VR256, VR256, |
| 114564 | /* VADDPSZ128rm */ |
| 114565 | VR128X, VR128X, f128mem, |
| 114566 | /* VADDPSZ128rmb */ |
| 114567 | VR128X, VR128X, f32mem, |
| 114568 | /* VADDPSZ128rmbk */ |
| 114569 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 114570 | /* VADDPSZ128rmbkz */ |
| 114571 | VR128X, VK4WM, VR128X, f32mem, |
| 114572 | /* VADDPSZ128rmk */ |
| 114573 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 114574 | /* VADDPSZ128rmkz */ |
| 114575 | VR128X, VK4WM, VR128X, f128mem, |
| 114576 | /* VADDPSZ128rr */ |
| 114577 | VR128X, VR128X, VR128X, |
| 114578 | /* VADDPSZ128rrk */ |
| 114579 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 114580 | /* VADDPSZ128rrkz */ |
| 114581 | VR128X, VK4WM, VR128X, VR128X, |
| 114582 | /* VADDPSZ256rm */ |
| 114583 | VR256X, VR256X, f256mem, |
| 114584 | /* VADDPSZ256rmb */ |
| 114585 | VR256X, VR256X, f32mem, |
| 114586 | /* VADDPSZ256rmbk */ |
| 114587 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 114588 | /* VADDPSZ256rmbkz */ |
| 114589 | VR256X, VK8WM, VR256X, f32mem, |
| 114590 | /* VADDPSZ256rmk */ |
| 114591 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 114592 | /* VADDPSZ256rmkz */ |
| 114593 | VR256X, VK8WM, VR256X, f256mem, |
| 114594 | /* VADDPSZ256rr */ |
| 114595 | VR256X, VR256X, VR256X, |
| 114596 | /* VADDPSZ256rrk */ |
| 114597 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 114598 | /* VADDPSZ256rrkz */ |
| 114599 | VR256X, VK8WM, VR256X, VR256X, |
| 114600 | /* VADDPSZrm */ |
| 114601 | VR512, VR512, f512mem, |
| 114602 | /* VADDPSZrmb */ |
| 114603 | VR512, VR512, f32mem, |
| 114604 | /* VADDPSZrmbk */ |
| 114605 | VR512, VR512, VK16WM, VR512, f32mem, |
| 114606 | /* VADDPSZrmbkz */ |
| 114607 | VR512, VK16WM, VR512, f32mem, |
| 114608 | /* VADDPSZrmk */ |
| 114609 | VR512, VR512, VK16WM, VR512, f512mem, |
| 114610 | /* VADDPSZrmkz */ |
| 114611 | VR512, VK16WM, VR512, f512mem, |
| 114612 | /* VADDPSZrr */ |
| 114613 | VR512, VR512, VR512, |
| 114614 | /* VADDPSZrrb */ |
| 114615 | VR512, VR512, VR512, AVX512RC, |
| 114616 | /* VADDPSZrrbk */ |
| 114617 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 114618 | /* VADDPSZrrbkz */ |
| 114619 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 114620 | /* VADDPSZrrk */ |
| 114621 | VR512, VR512, VK16WM, VR512, VR512, |
| 114622 | /* VADDPSZrrkz */ |
| 114623 | VR512, VK16WM, VR512, VR512, |
| 114624 | /* VADDPSrm */ |
| 114625 | VR128, VR128, f128mem, |
| 114626 | /* VADDPSrr */ |
| 114627 | VR128, VR128, VR128, |
| 114628 | /* VADDSDZrm */ |
| 114629 | FR64X, FR64X, f64mem, |
| 114630 | /* VADDSDZrm_Int */ |
| 114631 | VR128X, VR128X, sdmem, |
| 114632 | /* VADDSDZrm_Intk */ |
| 114633 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 114634 | /* VADDSDZrm_Intkz */ |
| 114635 | VR128X, VK1WM, VR128X, sdmem, |
| 114636 | /* VADDSDZrr */ |
| 114637 | FR64X, FR64X, FR64X, |
| 114638 | /* VADDSDZrr_Int */ |
| 114639 | VR128X, VR128X, VR128X, |
| 114640 | /* VADDSDZrr_Intk */ |
| 114641 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114642 | /* VADDSDZrr_Intkz */ |
| 114643 | VR128X, VK1WM, VR128X, VR128X, |
| 114644 | /* VADDSDZrrb_Int */ |
| 114645 | VR128X, VR128X, VR128X, AVX512RC, |
| 114646 | /* VADDSDZrrb_Intk */ |
| 114647 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114648 | /* VADDSDZrrb_Intkz */ |
| 114649 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114650 | /* VADDSDrm */ |
| 114651 | FR64, FR64, f64mem, |
| 114652 | /* VADDSDrm_Int */ |
| 114653 | VR128, VR128, sdmem, |
| 114654 | /* VADDSDrr */ |
| 114655 | FR64, FR64, FR64, |
| 114656 | /* VADDSDrr_Int */ |
| 114657 | VR128, VR128, VR128, |
| 114658 | /* VADDSHZrm */ |
| 114659 | FR16X, FR16X, f16mem, |
| 114660 | /* VADDSHZrm_Int */ |
| 114661 | VR128X, VR128X, shmem, |
| 114662 | /* VADDSHZrm_Intk */ |
| 114663 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 114664 | /* VADDSHZrm_Intkz */ |
| 114665 | VR128X, VK1WM, VR128X, shmem, |
| 114666 | /* VADDSHZrr */ |
| 114667 | FR16X, FR16X, FR16X, |
| 114668 | /* VADDSHZrr_Int */ |
| 114669 | VR128X, VR128X, VR128X, |
| 114670 | /* VADDSHZrr_Intk */ |
| 114671 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114672 | /* VADDSHZrr_Intkz */ |
| 114673 | VR128X, VK1WM, VR128X, VR128X, |
| 114674 | /* VADDSHZrrb_Int */ |
| 114675 | VR128X, VR128X, VR128X, AVX512RC, |
| 114676 | /* VADDSHZrrb_Intk */ |
| 114677 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114678 | /* VADDSHZrrb_Intkz */ |
| 114679 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114680 | /* VADDSSZrm */ |
| 114681 | FR32X, FR32X, f32mem, |
| 114682 | /* VADDSSZrm_Int */ |
| 114683 | VR128X, VR128X, ssmem, |
| 114684 | /* VADDSSZrm_Intk */ |
| 114685 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 114686 | /* VADDSSZrm_Intkz */ |
| 114687 | VR128X, VK1WM, VR128X, ssmem, |
| 114688 | /* VADDSSZrr */ |
| 114689 | FR32X, FR32X, FR32X, |
| 114690 | /* VADDSSZrr_Int */ |
| 114691 | VR128X, VR128X, VR128X, |
| 114692 | /* VADDSSZrr_Intk */ |
| 114693 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 114694 | /* VADDSSZrr_Intkz */ |
| 114695 | VR128X, VK1WM, VR128X, VR128X, |
| 114696 | /* VADDSSZrrb_Int */ |
| 114697 | VR128X, VR128X, VR128X, AVX512RC, |
| 114698 | /* VADDSSZrrb_Intk */ |
| 114699 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114700 | /* VADDSSZrrb_Intkz */ |
| 114701 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 114702 | /* VADDSSrm */ |
| 114703 | FR32, FR32, f32mem, |
| 114704 | /* VADDSSrm_Int */ |
| 114705 | VR128, VR128, ssmem, |
| 114706 | /* VADDSSrr */ |
| 114707 | FR32, FR32, FR32, |
| 114708 | /* VADDSSrr_Int */ |
| 114709 | VR128, VR128, VR128, |
| 114710 | /* VADDSUBPDYrm */ |
| 114711 | VR256, VR256, f256mem, |
| 114712 | /* VADDSUBPDYrr */ |
| 114713 | VR256, VR256, VR256, |
| 114714 | /* VADDSUBPDrm */ |
| 114715 | VR128, VR128, f128mem, |
| 114716 | /* VADDSUBPDrr */ |
| 114717 | VR128, VR128, VR128, |
| 114718 | /* VADDSUBPSYrm */ |
| 114719 | VR256, VR256, f256mem, |
| 114720 | /* VADDSUBPSYrr */ |
| 114721 | VR256, VR256, VR256, |
| 114722 | /* VADDSUBPSrm */ |
| 114723 | VR128, VR128, f128mem, |
| 114724 | /* VADDSUBPSrr */ |
| 114725 | VR128, VR128, VR128, |
| 114726 | /* VAESDECLASTYrm */ |
| 114727 | VR256, VR256, i256mem, |
| 114728 | /* VAESDECLASTYrr */ |
| 114729 | VR256, VR256, VR256, |
| 114730 | /* VAESDECLASTZ128rm */ |
| 114731 | VR128X, VR128X, i128mem, |
| 114732 | /* VAESDECLASTZ128rr */ |
| 114733 | VR128X, VR128X, VR128X, |
| 114734 | /* VAESDECLASTZ256rm */ |
| 114735 | VR256X, VR256X, i256mem, |
| 114736 | /* VAESDECLASTZ256rr */ |
| 114737 | VR256X, VR256X, VR256X, |
| 114738 | /* VAESDECLASTZrm */ |
| 114739 | VR512, VR512, i512mem, |
| 114740 | /* VAESDECLASTZrr */ |
| 114741 | VR512, VR512, VR512, |
| 114742 | /* VAESDECLASTrm */ |
| 114743 | VR128, VR128, i128mem, |
| 114744 | /* VAESDECLASTrr */ |
| 114745 | VR128, VR128, VR128, |
| 114746 | /* VAESDECYrm */ |
| 114747 | VR256, VR256, i256mem, |
| 114748 | /* VAESDECYrr */ |
| 114749 | VR256, VR256, VR256, |
| 114750 | /* VAESDECZ128rm */ |
| 114751 | VR128X, VR128X, i128mem, |
| 114752 | /* VAESDECZ128rr */ |
| 114753 | VR128X, VR128X, VR128X, |
| 114754 | /* VAESDECZ256rm */ |
| 114755 | VR256X, VR256X, i256mem, |
| 114756 | /* VAESDECZ256rr */ |
| 114757 | VR256X, VR256X, VR256X, |
| 114758 | /* VAESDECZrm */ |
| 114759 | VR512, VR512, i512mem, |
| 114760 | /* VAESDECZrr */ |
| 114761 | VR512, VR512, VR512, |
| 114762 | /* VAESDECrm */ |
| 114763 | VR128, VR128, i128mem, |
| 114764 | /* VAESDECrr */ |
| 114765 | VR128, VR128, VR128, |
| 114766 | /* VAESENCLASTYrm */ |
| 114767 | VR256, VR256, i256mem, |
| 114768 | /* VAESENCLASTYrr */ |
| 114769 | VR256, VR256, VR256, |
| 114770 | /* VAESENCLASTZ128rm */ |
| 114771 | VR128X, VR128X, i128mem, |
| 114772 | /* VAESENCLASTZ128rr */ |
| 114773 | VR128X, VR128X, VR128X, |
| 114774 | /* VAESENCLASTZ256rm */ |
| 114775 | VR256X, VR256X, i256mem, |
| 114776 | /* VAESENCLASTZ256rr */ |
| 114777 | VR256X, VR256X, VR256X, |
| 114778 | /* VAESENCLASTZrm */ |
| 114779 | VR512, VR512, i512mem, |
| 114780 | /* VAESENCLASTZrr */ |
| 114781 | VR512, VR512, VR512, |
| 114782 | /* VAESENCLASTrm */ |
| 114783 | VR128, VR128, i128mem, |
| 114784 | /* VAESENCLASTrr */ |
| 114785 | VR128, VR128, VR128, |
| 114786 | /* VAESENCYrm */ |
| 114787 | VR256, VR256, i256mem, |
| 114788 | /* VAESENCYrr */ |
| 114789 | VR256, VR256, VR256, |
| 114790 | /* VAESENCZ128rm */ |
| 114791 | VR128X, VR128X, i128mem, |
| 114792 | /* VAESENCZ128rr */ |
| 114793 | VR128X, VR128X, VR128X, |
| 114794 | /* VAESENCZ256rm */ |
| 114795 | VR256X, VR256X, i256mem, |
| 114796 | /* VAESENCZ256rr */ |
| 114797 | VR256X, VR256X, VR256X, |
| 114798 | /* VAESENCZrm */ |
| 114799 | VR512, VR512, i512mem, |
| 114800 | /* VAESENCZrr */ |
| 114801 | VR512, VR512, VR512, |
| 114802 | /* VAESENCrm */ |
| 114803 | VR128, VR128, i128mem, |
| 114804 | /* VAESENCrr */ |
| 114805 | VR128, VR128, VR128, |
| 114806 | /* VAESIMCrm */ |
| 114807 | VR128, i128mem, |
| 114808 | /* VAESIMCrr */ |
| 114809 | VR128, VR128, |
| 114810 | /* VAESKEYGENASSIST128rm */ |
| 114811 | VR128, i128mem, u8imm, |
| 114812 | /* VAESKEYGENASSIST128rr */ |
| 114813 | VR128, VR128, u8imm, |
| 114814 | /* VALIGNDZ128rmbi */ |
| 114815 | VR128X, VR128X, i32mem, u8imm, |
| 114816 | /* VALIGNDZ128rmbik */ |
| 114817 | VR128X, VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 114818 | /* VALIGNDZ128rmbikz */ |
| 114819 | VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 114820 | /* VALIGNDZ128rmi */ |
| 114821 | VR128X, VR128X, i128mem, u8imm, |
| 114822 | /* VALIGNDZ128rmik */ |
| 114823 | VR128X, VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 114824 | /* VALIGNDZ128rmikz */ |
| 114825 | VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 114826 | /* VALIGNDZ128rri */ |
| 114827 | VR128X, VR128X, VR128X, u8imm, |
| 114828 | /* VALIGNDZ128rrik */ |
| 114829 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 114830 | /* VALIGNDZ128rrikz */ |
| 114831 | VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 114832 | /* VALIGNDZ256rmbi */ |
| 114833 | VR256X, VR256X, i32mem, u8imm, |
| 114834 | /* VALIGNDZ256rmbik */ |
| 114835 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 114836 | /* VALIGNDZ256rmbikz */ |
| 114837 | VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 114838 | /* VALIGNDZ256rmi */ |
| 114839 | VR256X, VR256X, i256mem, u8imm, |
| 114840 | /* VALIGNDZ256rmik */ |
| 114841 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 114842 | /* VALIGNDZ256rmikz */ |
| 114843 | VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 114844 | /* VALIGNDZ256rri */ |
| 114845 | VR256X, VR256X, VR256X, u8imm, |
| 114846 | /* VALIGNDZ256rrik */ |
| 114847 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 114848 | /* VALIGNDZ256rrikz */ |
| 114849 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 114850 | /* VALIGNDZrmbi */ |
| 114851 | VR512, VR512, i32mem, u8imm, |
| 114852 | /* VALIGNDZrmbik */ |
| 114853 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 114854 | /* VALIGNDZrmbikz */ |
| 114855 | VR512, VK16WM, VR512, i32mem, u8imm, |
| 114856 | /* VALIGNDZrmi */ |
| 114857 | VR512, VR512, i512mem, u8imm, |
| 114858 | /* VALIGNDZrmik */ |
| 114859 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 114860 | /* VALIGNDZrmikz */ |
| 114861 | VR512, VK16WM, VR512, i512mem, u8imm, |
| 114862 | /* VALIGNDZrri */ |
| 114863 | VR512, VR512, VR512, u8imm, |
| 114864 | /* VALIGNDZrrik */ |
| 114865 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 114866 | /* VALIGNDZrrikz */ |
| 114867 | VR512, VK16WM, VR512, VR512, u8imm, |
| 114868 | /* VALIGNQZ128rmbi */ |
| 114869 | VR128X, VR128X, i64mem, u8imm, |
| 114870 | /* VALIGNQZ128rmbik */ |
| 114871 | VR128X, VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 114872 | /* VALIGNQZ128rmbikz */ |
| 114873 | VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 114874 | /* VALIGNQZ128rmi */ |
| 114875 | VR128X, VR128X, i128mem, u8imm, |
| 114876 | /* VALIGNQZ128rmik */ |
| 114877 | VR128X, VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 114878 | /* VALIGNQZ128rmikz */ |
| 114879 | VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 114880 | /* VALIGNQZ128rri */ |
| 114881 | VR128X, VR128X, VR128X, u8imm, |
| 114882 | /* VALIGNQZ128rrik */ |
| 114883 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 114884 | /* VALIGNQZ128rrikz */ |
| 114885 | VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 114886 | /* VALIGNQZ256rmbi */ |
| 114887 | VR256X, VR256X, i64mem, u8imm, |
| 114888 | /* VALIGNQZ256rmbik */ |
| 114889 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 114890 | /* VALIGNQZ256rmbikz */ |
| 114891 | VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 114892 | /* VALIGNQZ256rmi */ |
| 114893 | VR256X, VR256X, i256mem, u8imm, |
| 114894 | /* VALIGNQZ256rmik */ |
| 114895 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 114896 | /* VALIGNQZ256rmikz */ |
| 114897 | VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 114898 | /* VALIGNQZ256rri */ |
| 114899 | VR256X, VR256X, VR256X, u8imm, |
| 114900 | /* VALIGNQZ256rrik */ |
| 114901 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 114902 | /* VALIGNQZ256rrikz */ |
| 114903 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 114904 | /* VALIGNQZrmbi */ |
| 114905 | VR512, VR512, i64mem, u8imm, |
| 114906 | /* VALIGNQZrmbik */ |
| 114907 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 114908 | /* VALIGNQZrmbikz */ |
| 114909 | VR512, VK8WM, VR512, i64mem, u8imm, |
| 114910 | /* VALIGNQZrmi */ |
| 114911 | VR512, VR512, i512mem, u8imm, |
| 114912 | /* VALIGNQZrmik */ |
| 114913 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 114914 | /* VALIGNQZrmikz */ |
| 114915 | VR512, VK8WM, VR512, i512mem, u8imm, |
| 114916 | /* VALIGNQZrri */ |
| 114917 | VR512, VR512, VR512, u8imm, |
| 114918 | /* VALIGNQZrrik */ |
| 114919 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 114920 | /* VALIGNQZrrikz */ |
| 114921 | VR512, VK8WM, VR512, VR512, u8imm, |
| 114922 | /* VANDNPDYrm */ |
| 114923 | VR256, VR256, f256mem, |
| 114924 | /* VANDNPDYrr */ |
| 114925 | VR256, VR256, VR256, |
| 114926 | /* VANDNPDZ128rm */ |
| 114927 | VR128X, VR128X, f128mem, |
| 114928 | /* VANDNPDZ128rmb */ |
| 114929 | VR128X, VR128X, f64mem, |
| 114930 | /* VANDNPDZ128rmbk */ |
| 114931 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 114932 | /* VANDNPDZ128rmbkz */ |
| 114933 | VR128X, VK2WM, VR128X, f64mem, |
| 114934 | /* VANDNPDZ128rmk */ |
| 114935 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 114936 | /* VANDNPDZ128rmkz */ |
| 114937 | VR128X, VK2WM, VR128X, f128mem, |
| 114938 | /* VANDNPDZ128rr */ |
| 114939 | VR128X, VR128X, VR128X, |
| 114940 | /* VANDNPDZ128rrk */ |
| 114941 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 114942 | /* VANDNPDZ128rrkz */ |
| 114943 | VR128X, VK2WM, VR128X, VR128X, |
| 114944 | /* VANDNPDZ256rm */ |
| 114945 | VR256X, VR256X, f256mem, |
| 114946 | /* VANDNPDZ256rmb */ |
| 114947 | VR256X, VR256X, f64mem, |
| 114948 | /* VANDNPDZ256rmbk */ |
| 114949 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 114950 | /* VANDNPDZ256rmbkz */ |
| 114951 | VR256X, VK4WM, VR256X, f64mem, |
| 114952 | /* VANDNPDZ256rmk */ |
| 114953 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 114954 | /* VANDNPDZ256rmkz */ |
| 114955 | VR256X, VK4WM, VR256X, f256mem, |
| 114956 | /* VANDNPDZ256rr */ |
| 114957 | VR256X, VR256X, VR256X, |
| 114958 | /* VANDNPDZ256rrk */ |
| 114959 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 114960 | /* VANDNPDZ256rrkz */ |
| 114961 | VR256X, VK4WM, VR256X, VR256X, |
| 114962 | /* VANDNPDZrm */ |
| 114963 | VR512, VR512, f512mem, |
| 114964 | /* VANDNPDZrmb */ |
| 114965 | VR512, VR512, f64mem, |
| 114966 | /* VANDNPDZrmbk */ |
| 114967 | VR512, VR512, VK8WM, VR512, f64mem, |
| 114968 | /* VANDNPDZrmbkz */ |
| 114969 | VR512, VK8WM, VR512, f64mem, |
| 114970 | /* VANDNPDZrmk */ |
| 114971 | VR512, VR512, VK8WM, VR512, f512mem, |
| 114972 | /* VANDNPDZrmkz */ |
| 114973 | VR512, VK8WM, VR512, f512mem, |
| 114974 | /* VANDNPDZrr */ |
| 114975 | VR512, VR512, VR512, |
| 114976 | /* VANDNPDZrrk */ |
| 114977 | VR512, VR512, VK8WM, VR512, VR512, |
| 114978 | /* VANDNPDZrrkz */ |
| 114979 | VR512, VK8WM, VR512, VR512, |
| 114980 | /* VANDNPDrm */ |
| 114981 | VR128, VR128, f128mem, |
| 114982 | /* VANDNPDrr */ |
| 114983 | VR128, VR128, VR128, |
| 114984 | /* VANDNPSYrm */ |
| 114985 | VR256, VR256, f256mem, |
| 114986 | /* VANDNPSYrr */ |
| 114987 | VR256, VR256, VR256, |
| 114988 | /* VANDNPSZ128rm */ |
| 114989 | VR128X, VR128X, f128mem, |
| 114990 | /* VANDNPSZ128rmb */ |
| 114991 | VR128X, VR128X, f32mem, |
| 114992 | /* VANDNPSZ128rmbk */ |
| 114993 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 114994 | /* VANDNPSZ128rmbkz */ |
| 114995 | VR128X, VK4WM, VR128X, f32mem, |
| 114996 | /* VANDNPSZ128rmk */ |
| 114997 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 114998 | /* VANDNPSZ128rmkz */ |
| 114999 | VR128X, VK4WM, VR128X, f128mem, |
| 115000 | /* VANDNPSZ128rr */ |
| 115001 | VR128X, VR128X, VR128X, |
| 115002 | /* VANDNPSZ128rrk */ |
| 115003 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 115004 | /* VANDNPSZ128rrkz */ |
| 115005 | VR128X, VK4WM, VR128X, VR128X, |
| 115006 | /* VANDNPSZ256rm */ |
| 115007 | VR256X, VR256X, f256mem, |
| 115008 | /* VANDNPSZ256rmb */ |
| 115009 | VR256X, VR256X, f32mem, |
| 115010 | /* VANDNPSZ256rmbk */ |
| 115011 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 115012 | /* VANDNPSZ256rmbkz */ |
| 115013 | VR256X, VK8WM, VR256X, f32mem, |
| 115014 | /* VANDNPSZ256rmk */ |
| 115015 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 115016 | /* VANDNPSZ256rmkz */ |
| 115017 | VR256X, VK8WM, VR256X, f256mem, |
| 115018 | /* VANDNPSZ256rr */ |
| 115019 | VR256X, VR256X, VR256X, |
| 115020 | /* VANDNPSZ256rrk */ |
| 115021 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 115022 | /* VANDNPSZ256rrkz */ |
| 115023 | VR256X, VK8WM, VR256X, VR256X, |
| 115024 | /* VANDNPSZrm */ |
| 115025 | VR512, VR512, f512mem, |
| 115026 | /* VANDNPSZrmb */ |
| 115027 | VR512, VR512, f32mem, |
| 115028 | /* VANDNPSZrmbk */ |
| 115029 | VR512, VR512, VK16WM, VR512, f32mem, |
| 115030 | /* VANDNPSZrmbkz */ |
| 115031 | VR512, VK16WM, VR512, f32mem, |
| 115032 | /* VANDNPSZrmk */ |
| 115033 | VR512, VR512, VK16WM, VR512, f512mem, |
| 115034 | /* VANDNPSZrmkz */ |
| 115035 | VR512, VK16WM, VR512, f512mem, |
| 115036 | /* VANDNPSZrr */ |
| 115037 | VR512, VR512, VR512, |
| 115038 | /* VANDNPSZrrk */ |
| 115039 | VR512, VR512, VK16WM, VR512, VR512, |
| 115040 | /* VANDNPSZrrkz */ |
| 115041 | VR512, VK16WM, VR512, VR512, |
| 115042 | /* VANDNPSrm */ |
| 115043 | VR128, VR128, f128mem, |
| 115044 | /* VANDNPSrr */ |
| 115045 | VR128, VR128, VR128, |
| 115046 | /* VANDPDYrm */ |
| 115047 | VR256, VR256, f256mem, |
| 115048 | /* VANDPDYrr */ |
| 115049 | VR256, VR256, VR256, |
| 115050 | /* VANDPDZ128rm */ |
| 115051 | VR128X, VR128X, f128mem, |
| 115052 | /* VANDPDZ128rmb */ |
| 115053 | VR128X, VR128X, f64mem, |
| 115054 | /* VANDPDZ128rmbk */ |
| 115055 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 115056 | /* VANDPDZ128rmbkz */ |
| 115057 | VR128X, VK2WM, VR128X, f64mem, |
| 115058 | /* VANDPDZ128rmk */ |
| 115059 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 115060 | /* VANDPDZ128rmkz */ |
| 115061 | VR128X, VK2WM, VR128X, f128mem, |
| 115062 | /* VANDPDZ128rr */ |
| 115063 | VR128X, VR128X, VR128X, |
| 115064 | /* VANDPDZ128rrk */ |
| 115065 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 115066 | /* VANDPDZ128rrkz */ |
| 115067 | VR128X, VK2WM, VR128X, VR128X, |
| 115068 | /* VANDPDZ256rm */ |
| 115069 | VR256X, VR256X, f256mem, |
| 115070 | /* VANDPDZ256rmb */ |
| 115071 | VR256X, VR256X, f64mem, |
| 115072 | /* VANDPDZ256rmbk */ |
| 115073 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 115074 | /* VANDPDZ256rmbkz */ |
| 115075 | VR256X, VK4WM, VR256X, f64mem, |
| 115076 | /* VANDPDZ256rmk */ |
| 115077 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 115078 | /* VANDPDZ256rmkz */ |
| 115079 | VR256X, VK4WM, VR256X, f256mem, |
| 115080 | /* VANDPDZ256rr */ |
| 115081 | VR256X, VR256X, VR256X, |
| 115082 | /* VANDPDZ256rrk */ |
| 115083 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 115084 | /* VANDPDZ256rrkz */ |
| 115085 | VR256X, VK4WM, VR256X, VR256X, |
| 115086 | /* VANDPDZrm */ |
| 115087 | VR512, VR512, f512mem, |
| 115088 | /* VANDPDZrmb */ |
| 115089 | VR512, VR512, f64mem, |
| 115090 | /* VANDPDZrmbk */ |
| 115091 | VR512, VR512, VK8WM, VR512, f64mem, |
| 115092 | /* VANDPDZrmbkz */ |
| 115093 | VR512, VK8WM, VR512, f64mem, |
| 115094 | /* VANDPDZrmk */ |
| 115095 | VR512, VR512, VK8WM, VR512, f512mem, |
| 115096 | /* VANDPDZrmkz */ |
| 115097 | VR512, VK8WM, VR512, f512mem, |
| 115098 | /* VANDPDZrr */ |
| 115099 | VR512, VR512, VR512, |
| 115100 | /* VANDPDZrrk */ |
| 115101 | VR512, VR512, VK8WM, VR512, VR512, |
| 115102 | /* VANDPDZrrkz */ |
| 115103 | VR512, VK8WM, VR512, VR512, |
| 115104 | /* VANDPDrm */ |
| 115105 | VR128, VR128, f128mem, |
| 115106 | /* VANDPDrr */ |
| 115107 | VR128, VR128, VR128, |
| 115108 | /* VANDPSYrm */ |
| 115109 | VR256, VR256, f256mem, |
| 115110 | /* VANDPSYrr */ |
| 115111 | VR256, VR256, VR256, |
| 115112 | /* VANDPSZ128rm */ |
| 115113 | VR128X, VR128X, f128mem, |
| 115114 | /* VANDPSZ128rmb */ |
| 115115 | VR128X, VR128X, f32mem, |
| 115116 | /* VANDPSZ128rmbk */ |
| 115117 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 115118 | /* VANDPSZ128rmbkz */ |
| 115119 | VR128X, VK4WM, VR128X, f32mem, |
| 115120 | /* VANDPSZ128rmk */ |
| 115121 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 115122 | /* VANDPSZ128rmkz */ |
| 115123 | VR128X, VK4WM, VR128X, f128mem, |
| 115124 | /* VANDPSZ128rr */ |
| 115125 | VR128X, VR128X, VR128X, |
| 115126 | /* VANDPSZ128rrk */ |
| 115127 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 115128 | /* VANDPSZ128rrkz */ |
| 115129 | VR128X, VK4WM, VR128X, VR128X, |
| 115130 | /* VANDPSZ256rm */ |
| 115131 | VR256X, VR256X, f256mem, |
| 115132 | /* VANDPSZ256rmb */ |
| 115133 | VR256X, VR256X, f32mem, |
| 115134 | /* VANDPSZ256rmbk */ |
| 115135 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 115136 | /* VANDPSZ256rmbkz */ |
| 115137 | VR256X, VK8WM, VR256X, f32mem, |
| 115138 | /* VANDPSZ256rmk */ |
| 115139 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 115140 | /* VANDPSZ256rmkz */ |
| 115141 | VR256X, VK8WM, VR256X, f256mem, |
| 115142 | /* VANDPSZ256rr */ |
| 115143 | VR256X, VR256X, VR256X, |
| 115144 | /* VANDPSZ256rrk */ |
| 115145 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 115146 | /* VANDPSZ256rrkz */ |
| 115147 | VR256X, VK8WM, VR256X, VR256X, |
| 115148 | /* VANDPSZrm */ |
| 115149 | VR512, VR512, f512mem, |
| 115150 | /* VANDPSZrmb */ |
| 115151 | VR512, VR512, f32mem, |
| 115152 | /* VANDPSZrmbk */ |
| 115153 | VR512, VR512, VK16WM, VR512, f32mem, |
| 115154 | /* VANDPSZrmbkz */ |
| 115155 | VR512, VK16WM, VR512, f32mem, |
| 115156 | /* VANDPSZrmk */ |
| 115157 | VR512, VR512, VK16WM, VR512, f512mem, |
| 115158 | /* VANDPSZrmkz */ |
| 115159 | VR512, VK16WM, VR512, f512mem, |
| 115160 | /* VANDPSZrr */ |
| 115161 | VR512, VR512, VR512, |
| 115162 | /* VANDPSZrrk */ |
| 115163 | VR512, VR512, VK16WM, VR512, VR512, |
| 115164 | /* VANDPSZrrkz */ |
| 115165 | VR512, VK16WM, VR512, VR512, |
| 115166 | /* VANDPSrm */ |
| 115167 | VR128, VR128, f128mem, |
| 115168 | /* VANDPSrr */ |
| 115169 | VR128, VR128, VR128, |
| 115170 | /* VASTART_SAVE_XMM_REGS */ |
| 115171 | GR8, i8mem, |
| 115172 | /* VBCSTNEBF162PSYrm */ |
| 115173 | VR256, f16mem, |
| 115174 | /* VBCSTNEBF162PSrm */ |
| 115175 | VR128, f16mem, |
| 115176 | /* VBCSTNESH2PSYrm */ |
| 115177 | VR256, f16mem, |
| 115178 | /* VBCSTNESH2PSrm */ |
| 115179 | VR128, f16mem, |
| 115180 | /* VBLENDMPDZ128rm */ |
| 115181 | VR128X, VR128X, f128mem, |
| 115182 | /* VBLENDMPDZ128rmb */ |
| 115183 | VR128X, VR128X, f64mem, |
| 115184 | /* VBLENDMPDZ128rmbk */ |
| 115185 | VR128X, VK2WM, VR128X, f64mem, |
| 115186 | /* VBLENDMPDZ128rmbkz */ |
| 115187 | VR128X, VK2WM, VR128X, f64mem, |
| 115188 | /* VBLENDMPDZ128rmk */ |
| 115189 | VR128X, VK2WM, VR128X, f128mem, |
| 115190 | /* VBLENDMPDZ128rmkz */ |
| 115191 | VR128X, VK2WM, VR128X, f128mem, |
| 115192 | /* VBLENDMPDZ128rr */ |
| 115193 | VR128X, VR128X, VR128X, |
| 115194 | /* VBLENDMPDZ128rrk */ |
| 115195 | VR128X, VK2WM, VR128X, VR128X, |
| 115196 | /* VBLENDMPDZ128rrkz */ |
| 115197 | VR128X, VK2WM, VR128X, VR128X, |
| 115198 | /* VBLENDMPDZ256rm */ |
| 115199 | VR256X, VR256X, f256mem, |
| 115200 | /* VBLENDMPDZ256rmb */ |
| 115201 | VR256X, VR256X, f64mem, |
| 115202 | /* VBLENDMPDZ256rmbk */ |
| 115203 | VR256X, VK4WM, VR256X, f64mem, |
| 115204 | /* VBLENDMPDZ256rmbkz */ |
| 115205 | VR256X, VK4WM, VR256X, f64mem, |
| 115206 | /* VBLENDMPDZ256rmk */ |
| 115207 | VR256X, VK4WM, VR256X, f256mem, |
| 115208 | /* VBLENDMPDZ256rmkz */ |
| 115209 | VR256X, VK4WM, VR256X, f256mem, |
| 115210 | /* VBLENDMPDZ256rr */ |
| 115211 | VR256X, VR256X, VR256X, |
| 115212 | /* VBLENDMPDZ256rrk */ |
| 115213 | VR256X, VK4WM, VR256X, VR256X, |
| 115214 | /* VBLENDMPDZ256rrkz */ |
| 115215 | VR256X, VK4WM, VR256X, VR256X, |
| 115216 | /* VBLENDMPDZrm */ |
| 115217 | VR512, VR512, f512mem, |
| 115218 | /* VBLENDMPDZrmb */ |
| 115219 | VR512, VR512, f64mem, |
| 115220 | /* VBLENDMPDZrmbk */ |
| 115221 | VR512, VK8WM, VR512, f64mem, |
| 115222 | /* VBLENDMPDZrmbkz */ |
| 115223 | VR512, VK8WM, VR512, f64mem, |
| 115224 | /* VBLENDMPDZrmk */ |
| 115225 | VR512, VK8WM, VR512, f512mem, |
| 115226 | /* VBLENDMPDZrmkz */ |
| 115227 | VR512, VK8WM, VR512, f512mem, |
| 115228 | /* VBLENDMPDZrr */ |
| 115229 | VR512, VR512, VR512, |
| 115230 | /* VBLENDMPDZrrk */ |
| 115231 | VR512, VK8WM, VR512, VR512, |
| 115232 | /* VBLENDMPDZrrkz */ |
| 115233 | VR512, VK8WM, VR512, VR512, |
| 115234 | /* VBLENDMPSZ128rm */ |
| 115235 | VR128X, VR128X, f128mem, |
| 115236 | /* VBLENDMPSZ128rmb */ |
| 115237 | VR128X, VR128X, f32mem, |
| 115238 | /* VBLENDMPSZ128rmbk */ |
| 115239 | VR128X, VK4WM, VR128X, f32mem, |
| 115240 | /* VBLENDMPSZ128rmbkz */ |
| 115241 | VR128X, VK4WM, VR128X, f32mem, |
| 115242 | /* VBLENDMPSZ128rmk */ |
| 115243 | VR128X, VK4WM, VR128X, f128mem, |
| 115244 | /* VBLENDMPSZ128rmkz */ |
| 115245 | VR128X, VK4WM, VR128X, f128mem, |
| 115246 | /* VBLENDMPSZ128rr */ |
| 115247 | VR128X, VR128X, VR128X, |
| 115248 | /* VBLENDMPSZ128rrk */ |
| 115249 | VR128X, VK4WM, VR128X, VR128X, |
| 115250 | /* VBLENDMPSZ128rrkz */ |
| 115251 | VR128X, VK4WM, VR128X, VR128X, |
| 115252 | /* VBLENDMPSZ256rm */ |
| 115253 | VR256X, VR256X, f256mem, |
| 115254 | /* VBLENDMPSZ256rmb */ |
| 115255 | VR256X, VR256X, f32mem, |
| 115256 | /* VBLENDMPSZ256rmbk */ |
| 115257 | VR256X, VK8WM, VR256X, f32mem, |
| 115258 | /* VBLENDMPSZ256rmbkz */ |
| 115259 | VR256X, VK8WM, VR256X, f32mem, |
| 115260 | /* VBLENDMPSZ256rmk */ |
| 115261 | VR256X, VK8WM, VR256X, f256mem, |
| 115262 | /* VBLENDMPSZ256rmkz */ |
| 115263 | VR256X, VK8WM, VR256X, f256mem, |
| 115264 | /* VBLENDMPSZ256rr */ |
| 115265 | VR256X, VR256X, VR256X, |
| 115266 | /* VBLENDMPSZ256rrk */ |
| 115267 | VR256X, VK8WM, VR256X, VR256X, |
| 115268 | /* VBLENDMPSZ256rrkz */ |
| 115269 | VR256X, VK8WM, VR256X, VR256X, |
| 115270 | /* VBLENDMPSZrm */ |
| 115271 | VR512, VR512, f512mem, |
| 115272 | /* VBLENDMPSZrmb */ |
| 115273 | VR512, VR512, f32mem, |
| 115274 | /* VBLENDMPSZrmbk */ |
| 115275 | VR512, VK16WM, VR512, f32mem, |
| 115276 | /* VBLENDMPSZrmbkz */ |
| 115277 | VR512, VK16WM, VR512, f32mem, |
| 115278 | /* VBLENDMPSZrmk */ |
| 115279 | VR512, VK16WM, VR512, f512mem, |
| 115280 | /* VBLENDMPSZrmkz */ |
| 115281 | VR512, VK16WM, VR512, f512mem, |
| 115282 | /* VBLENDMPSZrr */ |
| 115283 | VR512, VR512, VR512, |
| 115284 | /* VBLENDMPSZrrk */ |
| 115285 | VR512, VK16WM, VR512, VR512, |
| 115286 | /* VBLENDMPSZrrkz */ |
| 115287 | VR512, VK16WM, VR512, VR512, |
| 115288 | /* VBLENDPDYrmi */ |
| 115289 | VR256, VR256, f256mem, u8imm, |
| 115290 | /* VBLENDPDYrri */ |
| 115291 | VR256, VR256, VR256, u8imm, |
| 115292 | /* VBLENDPDrmi */ |
| 115293 | VR128, VR128, f128mem, u8imm, |
| 115294 | /* VBLENDPDrri */ |
| 115295 | VR128, VR128, VR128, u8imm, |
| 115296 | /* VBLENDPSYrmi */ |
| 115297 | VR256, VR256, f256mem, u8imm, |
| 115298 | /* VBLENDPSYrri */ |
| 115299 | VR256, VR256, VR256, u8imm, |
| 115300 | /* VBLENDPSrmi */ |
| 115301 | VR128, VR128, f128mem, u8imm, |
| 115302 | /* VBLENDPSrri */ |
| 115303 | VR128, VR128, VR128, u8imm, |
| 115304 | /* VBLENDVPDYrmr */ |
| 115305 | VR256, VR256, f256mem, VR256, |
| 115306 | /* VBLENDVPDYrrr */ |
| 115307 | VR256, VR256, VR256, VR256, |
| 115308 | /* VBLENDVPDrmr */ |
| 115309 | VR128, VR128, f128mem, VR128, |
| 115310 | /* VBLENDVPDrrr */ |
| 115311 | VR128, VR128, VR128, VR128, |
| 115312 | /* VBLENDVPSYrmr */ |
| 115313 | VR256, VR256, f256mem, VR256, |
| 115314 | /* VBLENDVPSYrrr */ |
| 115315 | VR256, VR256, VR256, VR256, |
| 115316 | /* VBLENDVPSrmr */ |
| 115317 | VR128, VR128, f128mem, VR128, |
| 115318 | /* VBLENDVPSrrr */ |
| 115319 | VR128, VR128, VR128, VR128, |
| 115320 | /* VBROADCASTF128rm */ |
| 115321 | VR256, f128mem, |
| 115322 | /* VBROADCASTF32X2Z256rm */ |
| 115323 | VR256X, f64mem, |
| 115324 | /* VBROADCASTF32X2Z256rmk */ |
| 115325 | VR256X, VR256X, VK8WM, f64mem, |
| 115326 | /* VBROADCASTF32X2Z256rmkz */ |
| 115327 | VR256X, VK8WM, f64mem, |
| 115328 | /* VBROADCASTF32X2Z256rr */ |
| 115329 | VR256X, VR128X, |
| 115330 | /* VBROADCASTF32X2Z256rrk */ |
| 115331 | VR256X, VR256X, VK8WM, VR128X, |
| 115332 | /* VBROADCASTF32X2Z256rrkz */ |
| 115333 | VR256X, VK8WM, VR128X, |
| 115334 | /* VBROADCASTF32X2Zrm */ |
| 115335 | VR512, f64mem, |
| 115336 | /* VBROADCASTF32X2Zrmk */ |
| 115337 | VR512, VR512, VK16WM, f64mem, |
| 115338 | /* VBROADCASTF32X2Zrmkz */ |
| 115339 | VR512, VK16WM, f64mem, |
| 115340 | /* VBROADCASTF32X2Zrr */ |
| 115341 | VR512, VR128X, |
| 115342 | /* VBROADCASTF32X2Zrrk */ |
| 115343 | VR512, VR512, VK16WM, VR128X, |
| 115344 | /* VBROADCASTF32X2Zrrkz */ |
| 115345 | VR512, VK16WM, VR128X, |
| 115346 | /* VBROADCASTF32X4Z256rm */ |
| 115347 | VR256X, f128mem, |
| 115348 | /* VBROADCASTF32X4Z256rmk */ |
| 115349 | VR256X, VR256X, VK8WM, f128mem, |
| 115350 | /* VBROADCASTF32X4Z256rmkz */ |
| 115351 | VR256X, VK8WM, f128mem, |
| 115352 | /* VBROADCASTF32X4rm */ |
| 115353 | VR512, f128mem, |
| 115354 | /* VBROADCASTF32X4rmk */ |
| 115355 | VR512, VR512, VK16WM, f128mem, |
| 115356 | /* VBROADCASTF32X4rmkz */ |
| 115357 | VR512, VK16WM, f128mem, |
| 115358 | /* VBROADCASTF32X8rm */ |
| 115359 | VR512, f256mem, |
| 115360 | /* VBROADCASTF32X8rmk */ |
| 115361 | VR512, VR512, VK16WM, f256mem, |
| 115362 | /* VBROADCASTF32X8rmkz */ |
| 115363 | VR512, VK16WM, f256mem, |
| 115364 | /* VBROADCASTF64X2Z128rm */ |
| 115365 | VR256X, f128mem, |
| 115366 | /* VBROADCASTF64X2Z128rmk */ |
| 115367 | VR256X, VR256X, VK4WM, f128mem, |
| 115368 | /* VBROADCASTF64X2Z128rmkz */ |
| 115369 | VR256X, VK4WM, f128mem, |
| 115370 | /* VBROADCASTF64X2rm */ |
| 115371 | VR512, f128mem, |
| 115372 | /* VBROADCASTF64X2rmk */ |
| 115373 | VR512, VR512, VK8WM, f128mem, |
| 115374 | /* VBROADCASTF64X2rmkz */ |
| 115375 | VR512, VK8WM, f128mem, |
| 115376 | /* VBROADCASTF64X4rm */ |
| 115377 | VR512, f256mem, |
| 115378 | /* VBROADCASTF64X4rmk */ |
| 115379 | VR512, VR512, VK8WM, f256mem, |
| 115380 | /* VBROADCASTF64X4rmkz */ |
| 115381 | VR512, VK8WM, f256mem, |
| 115382 | /* VBROADCASTI128rm */ |
| 115383 | VR256, i128mem, |
| 115384 | /* VBROADCASTI32X2Z128rm */ |
| 115385 | VR128X, i64mem, |
| 115386 | /* VBROADCASTI32X2Z128rmk */ |
| 115387 | VR128X, VR128X, VK4WM, i64mem, |
| 115388 | /* VBROADCASTI32X2Z128rmkz */ |
| 115389 | VR128X, VK4WM, i64mem, |
| 115390 | /* VBROADCASTI32X2Z128rr */ |
| 115391 | VR128X, VR128X, |
| 115392 | /* VBROADCASTI32X2Z128rrk */ |
| 115393 | VR128X, VR128X, VK4WM, VR128X, |
| 115394 | /* VBROADCASTI32X2Z128rrkz */ |
| 115395 | VR128X, VK4WM, VR128X, |
| 115396 | /* VBROADCASTI32X2Z256rm */ |
| 115397 | VR256X, i64mem, |
| 115398 | /* VBROADCASTI32X2Z256rmk */ |
| 115399 | VR256X, VR256X, VK8WM, i64mem, |
| 115400 | /* VBROADCASTI32X2Z256rmkz */ |
| 115401 | VR256X, VK8WM, i64mem, |
| 115402 | /* VBROADCASTI32X2Z256rr */ |
| 115403 | VR256X, VR128X, |
| 115404 | /* VBROADCASTI32X2Z256rrk */ |
| 115405 | VR256X, VR256X, VK8WM, VR128X, |
| 115406 | /* VBROADCASTI32X2Z256rrkz */ |
| 115407 | VR256X, VK8WM, VR128X, |
| 115408 | /* VBROADCASTI32X2Zrm */ |
| 115409 | VR512, i64mem, |
| 115410 | /* VBROADCASTI32X2Zrmk */ |
| 115411 | VR512, VR512, VK16WM, i64mem, |
| 115412 | /* VBROADCASTI32X2Zrmkz */ |
| 115413 | VR512, VK16WM, i64mem, |
| 115414 | /* VBROADCASTI32X2Zrr */ |
| 115415 | VR512, VR128X, |
| 115416 | /* VBROADCASTI32X2Zrrk */ |
| 115417 | VR512, VR512, VK16WM, VR128X, |
| 115418 | /* VBROADCASTI32X2Zrrkz */ |
| 115419 | VR512, VK16WM, VR128X, |
| 115420 | /* VBROADCASTI32X4Z256rm */ |
| 115421 | VR256X, i128mem, |
| 115422 | /* VBROADCASTI32X4Z256rmk */ |
| 115423 | VR256X, VR256X, VK8WM, i128mem, |
| 115424 | /* VBROADCASTI32X4Z256rmkz */ |
| 115425 | VR256X, VK8WM, i128mem, |
| 115426 | /* VBROADCASTI32X4rm */ |
| 115427 | VR512, i128mem, |
| 115428 | /* VBROADCASTI32X4rmk */ |
| 115429 | VR512, VR512, VK16WM, i128mem, |
| 115430 | /* VBROADCASTI32X4rmkz */ |
| 115431 | VR512, VK16WM, i128mem, |
| 115432 | /* VBROADCASTI32X8rm */ |
| 115433 | VR512, i256mem, |
| 115434 | /* VBROADCASTI32X8rmk */ |
| 115435 | VR512, VR512, VK16WM, i256mem, |
| 115436 | /* VBROADCASTI32X8rmkz */ |
| 115437 | VR512, VK16WM, i256mem, |
| 115438 | /* VBROADCASTI64X2Z128rm */ |
| 115439 | VR256X, i128mem, |
| 115440 | /* VBROADCASTI64X2Z128rmk */ |
| 115441 | VR256X, VR256X, VK4WM, i128mem, |
| 115442 | /* VBROADCASTI64X2Z128rmkz */ |
| 115443 | VR256X, VK4WM, i128mem, |
| 115444 | /* VBROADCASTI64X2rm */ |
| 115445 | VR512, i128mem, |
| 115446 | /* VBROADCASTI64X2rmk */ |
| 115447 | VR512, VR512, VK8WM, i128mem, |
| 115448 | /* VBROADCASTI64X2rmkz */ |
| 115449 | VR512, VK8WM, i128mem, |
| 115450 | /* VBROADCASTI64X4rm */ |
| 115451 | VR512, i256mem, |
| 115452 | /* VBROADCASTI64X4rmk */ |
| 115453 | VR512, VR512, VK8WM, i256mem, |
| 115454 | /* VBROADCASTI64X4rmkz */ |
| 115455 | VR512, VK8WM, i256mem, |
| 115456 | /* VBROADCASTSDYrm */ |
| 115457 | VR256, f64mem, |
| 115458 | /* VBROADCASTSDYrr */ |
| 115459 | VR256, VR128, |
| 115460 | /* VBROADCASTSDZ256rm */ |
| 115461 | VR256X, f64mem, |
| 115462 | /* VBROADCASTSDZ256rmk */ |
| 115463 | VR256X, VR256X, VK4WM, f64mem, |
| 115464 | /* VBROADCASTSDZ256rmkz */ |
| 115465 | VR256X, VK4WM, f64mem, |
| 115466 | /* VBROADCASTSDZ256rr */ |
| 115467 | VR256X, VR128X, |
| 115468 | /* VBROADCASTSDZ256rrk */ |
| 115469 | VR256X, VR256X, VK4WM, VR128X, |
| 115470 | /* VBROADCASTSDZ256rrkz */ |
| 115471 | VR256X, VK4WM, VR128X, |
| 115472 | /* VBROADCASTSDZrm */ |
| 115473 | VR512, f64mem, |
| 115474 | /* VBROADCASTSDZrmk */ |
| 115475 | VR512, VR512, VK8WM, f64mem, |
| 115476 | /* VBROADCASTSDZrmkz */ |
| 115477 | VR512, VK8WM, f64mem, |
| 115478 | /* VBROADCASTSDZrr */ |
| 115479 | VR512, VR128X, |
| 115480 | /* VBROADCASTSDZrrk */ |
| 115481 | VR512, VR512, VK8WM, VR128X, |
| 115482 | /* VBROADCASTSDZrrkz */ |
| 115483 | VR512, VK8WM, VR128X, |
| 115484 | /* VBROADCASTSSYrm */ |
| 115485 | VR256, f32mem, |
| 115486 | /* VBROADCASTSSYrr */ |
| 115487 | VR256, VR128, |
| 115488 | /* VBROADCASTSSZ128rm */ |
| 115489 | VR128X, f32mem, |
| 115490 | /* VBROADCASTSSZ128rmk */ |
| 115491 | VR128X, VR128X, VK4WM, f32mem, |
| 115492 | /* VBROADCASTSSZ128rmkz */ |
| 115493 | VR128X, VK4WM, f32mem, |
| 115494 | /* VBROADCASTSSZ128rr */ |
| 115495 | VR128X, VR128X, |
| 115496 | /* VBROADCASTSSZ128rrk */ |
| 115497 | VR128X, VR128X, VK4WM, VR128X, |
| 115498 | /* VBROADCASTSSZ128rrkz */ |
| 115499 | VR128X, VK4WM, VR128X, |
| 115500 | /* VBROADCASTSSZ256rm */ |
| 115501 | VR256X, f32mem, |
| 115502 | /* VBROADCASTSSZ256rmk */ |
| 115503 | VR256X, VR256X, VK8WM, f32mem, |
| 115504 | /* VBROADCASTSSZ256rmkz */ |
| 115505 | VR256X, VK8WM, f32mem, |
| 115506 | /* VBROADCASTSSZ256rr */ |
| 115507 | VR256X, VR128X, |
| 115508 | /* VBROADCASTSSZ256rrk */ |
| 115509 | VR256X, VR256X, VK8WM, VR128X, |
| 115510 | /* VBROADCASTSSZ256rrkz */ |
| 115511 | VR256X, VK8WM, VR128X, |
| 115512 | /* VBROADCASTSSZrm */ |
| 115513 | VR512, f32mem, |
| 115514 | /* VBROADCASTSSZrmk */ |
| 115515 | VR512, VR512, VK16WM, f32mem, |
| 115516 | /* VBROADCASTSSZrmkz */ |
| 115517 | VR512, VK16WM, f32mem, |
| 115518 | /* VBROADCASTSSZrr */ |
| 115519 | VR512, VR128X, |
| 115520 | /* VBROADCASTSSZrrk */ |
| 115521 | VR512, VR512, VK16WM, VR128X, |
| 115522 | /* VBROADCASTSSZrrkz */ |
| 115523 | VR512, VK16WM, VR128X, |
| 115524 | /* VBROADCASTSSrm */ |
| 115525 | VR128, f32mem, |
| 115526 | /* VBROADCASTSSrr */ |
| 115527 | VR128, VR128, |
| 115528 | /* VCMPPDYrmi */ |
| 115529 | VR256, VR256, f256mem, u8imm, |
| 115530 | /* VCMPPDYrri */ |
| 115531 | VR256, VR256, VR256, u8imm, |
| 115532 | /* VCMPPDZ128rmbi */ |
| 115533 | VK2, VR128X, f64mem, u8imm, |
| 115534 | /* VCMPPDZ128rmbik */ |
| 115535 | VK2, VK2WM, VR128X, f64mem, u8imm, |
| 115536 | /* VCMPPDZ128rmi */ |
| 115537 | VK2, VR128X, f128mem, u8imm, |
| 115538 | /* VCMPPDZ128rmik */ |
| 115539 | VK2, VK2WM, VR128X, f128mem, u8imm, |
| 115540 | /* VCMPPDZ128rri */ |
| 115541 | VK2, VR128X, VR128X, u8imm, |
| 115542 | /* VCMPPDZ128rrik */ |
| 115543 | VK2, VK2WM, VR128X, VR128X, u8imm, |
| 115544 | /* VCMPPDZ256rmbi */ |
| 115545 | VK4, VR256X, f64mem, u8imm, |
| 115546 | /* VCMPPDZ256rmbik */ |
| 115547 | VK4, VK4WM, VR256X, f64mem, u8imm, |
| 115548 | /* VCMPPDZ256rmi */ |
| 115549 | VK4, VR256X, f256mem, u8imm, |
| 115550 | /* VCMPPDZ256rmik */ |
| 115551 | VK4, VK4WM, VR256X, f256mem, u8imm, |
| 115552 | /* VCMPPDZ256rri */ |
| 115553 | VK4, VR256X, VR256X, u8imm, |
| 115554 | /* VCMPPDZ256rrik */ |
| 115555 | VK4, VK4WM, VR256X, VR256X, u8imm, |
| 115556 | /* VCMPPDZrmbi */ |
| 115557 | VK8, VR512, f64mem, u8imm, |
| 115558 | /* VCMPPDZrmbik */ |
| 115559 | VK8, VK8WM, VR512, f64mem, u8imm, |
| 115560 | /* VCMPPDZrmi */ |
| 115561 | VK8, VR512, f512mem, u8imm, |
| 115562 | /* VCMPPDZrmik */ |
| 115563 | VK8, VK8WM, VR512, f512mem, u8imm, |
| 115564 | /* VCMPPDZrri */ |
| 115565 | VK8, VR512, VR512, u8imm, |
| 115566 | /* VCMPPDZrrib */ |
| 115567 | VK8, VR512, VR512, u8imm, |
| 115568 | /* VCMPPDZrribk */ |
| 115569 | VK8, VK8WM, VR512, VR512, u8imm, |
| 115570 | /* VCMPPDZrrik */ |
| 115571 | VK8, VK8WM, VR512, VR512, u8imm, |
| 115572 | /* VCMPPDrmi */ |
| 115573 | VR128, VR128, f128mem, u8imm, |
| 115574 | /* VCMPPDrri */ |
| 115575 | VR128, VR128, VR128, u8imm, |
| 115576 | /* VCMPPHZ128rmbi */ |
| 115577 | VK8, VR128X, f16mem, u8imm, |
| 115578 | /* VCMPPHZ128rmbik */ |
| 115579 | VK8, VK8WM, VR128X, f16mem, u8imm, |
| 115580 | /* VCMPPHZ128rmi */ |
| 115581 | VK8, VR128X, f128mem, u8imm, |
| 115582 | /* VCMPPHZ128rmik */ |
| 115583 | VK8, VK8WM, VR128X, f128mem, u8imm, |
| 115584 | /* VCMPPHZ128rri */ |
| 115585 | VK8, VR128X, VR128X, u8imm, |
| 115586 | /* VCMPPHZ128rrik */ |
| 115587 | VK8, VK8WM, VR128X, VR128X, u8imm, |
| 115588 | /* VCMPPHZ256rmbi */ |
| 115589 | VK16, VR256X, f16mem, u8imm, |
| 115590 | /* VCMPPHZ256rmbik */ |
| 115591 | VK16, VK16WM, VR256X, f16mem, u8imm, |
| 115592 | /* VCMPPHZ256rmi */ |
| 115593 | VK16, VR256X, f256mem, u8imm, |
| 115594 | /* VCMPPHZ256rmik */ |
| 115595 | VK16, VK16WM, VR256X, f256mem, u8imm, |
| 115596 | /* VCMPPHZ256rri */ |
| 115597 | VK16, VR256X, VR256X, u8imm, |
| 115598 | /* VCMPPHZ256rrik */ |
| 115599 | VK16, VK16WM, VR256X, VR256X, u8imm, |
| 115600 | /* VCMPPHZrmbi */ |
| 115601 | VK32, VR512, f16mem, u8imm, |
| 115602 | /* VCMPPHZrmbik */ |
| 115603 | VK32, VK32WM, VR512, f16mem, u8imm, |
| 115604 | /* VCMPPHZrmi */ |
| 115605 | VK32, VR512, f512mem, u8imm, |
| 115606 | /* VCMPPHZrmik */ |
| 115607 | VK32, VK32WM, VR512, f512mem, u8imm, |
| 115608 | /* VCMPPHZrri */ |
| 115609 | VK32, VR512, VR512, u8imm, |
| 115610 | /* VCMPPHZrrib */ |
| 115611 | VK32, VR512, VR512, u8imm, |
| 115612 | /* VCMPPHZrribk */ |
| 115613 | VK32, VK32WM, VR512, VR512, u8imm, |
| 115614 | /* VCMPPHZrrik */ |
| 115615 | VK32, VK32WM, VR512, VR512, u8imm, |
| 115616 | /* VCMPPSYrmi */ |
| 115617 | VR256, VR256, f256mem, u8imm, |
| 115618 | /* VCMPPSYrri */ |
| 115619 | VR256, VR256, VR256, u8imm, |
| 115620 | /* VCMPPSZ128rmbi */ |
| 115621 | VK4, VR128X, f32mem, u8imm, |
| 115622 | /* VCMPPSZ128rmbik */ |
| 115623 | VK4, VK4WM, VR128X, f32mem, u8imm, |
| 115624 | /* VCMPPSZ128rmi */ |
| 115625 | VK4, VR128X, f128mem, u8imm, |
| 115626 | /* VCMPPSZ128rmik */ |
| 115627 | VK4, VK4WM, VR128X, f128mem, u8imm, |
| 115628 | /* VCMPPSZ128rri */ |
| 115629 | VK4, VR128X, VR128X, u8imm, |
| 115630 | /* VCMPPSZ128rrik */ |
| 115631 | VK4, VK4WM, VR128X, VR128X, u8imm, |
| 115632 | /* VCMPPSZ256rmbi */ |
| 115633 | VK8, VR256X, f32mem, u8imm, |
| 115634 | /* VCMPPSZ256rmbik */ |
| 115635 | VK8, VK8WM, VR256X, f32mem, u8imm, |
| 115636 | /* VCMPPSZ256rmi */ |
| 115637 | VK8, VR256X, f256mem, u8imm, |
| 115638 | /* VCMPPSZ256rmik */ |
| 115639 | VK8, VK8WM, VR256X, f256mem, u8imm, |
| 115640 | /* VCMPPSZ256rri */ |
| 115641 | VK8, VR256X, VR256X, u8imm, |
| 115642 | /* VCMPPSZ256rrik */ |
| 115643 | VK8, VK8WM, VR256X, VR256X, u8imm, |
| 115644 | /* VCMPPSZrmbi */ |
| 115645 | VK16, VR512, f32mem, u8imm, |
| 115646 | /* VCMPPSZrmbik */ |
| 115647 | VK16, VK16WM, VR512, f32mem, u8imm, |
| 115648 | /* VCMPPSZrmi */ |
| 115649 | VK16, VR512, f512mem, u8imm, |
| 115650 | /* VCMPPSZrmik */ |
| 115651 | VK16, VK16WM, VR512, f512mem, u8imm, |
| 115652 | /* VCMPPSZrri */ |
| 115653 | VK16, VR512, VR512, u8imm, |
| 115654 | /* VCMPPSZrrib */ |
| 115655 | VK16, VR512, VR512, u8imm, |
| 115656 | /* VCMPPSZrribk */ |
| 115657 | VK16, VK16WM, VR512, VR512, u8imm, |
| 115658 | /* VCMPPSZrrik */ |
| 115659 | VK16, VK16WM, VR512, VR512, u8imm, |
| 115660 | /* VCMPPSrmi */ |
| 115661 | VR128, VR128, f128mem, u8imm, |
| 115662 | /* VCMPPSrri */ |
| 115663 | VR128, VR128, VR128, u8imm, |
| 115664 | /* VCMPSDZrmi */ |
| 115665 | VK1, FR64X, f64mem, u8imm, |
| 115666 | /* VCMPSDZrmi_Int */ |
| 115667 | VK1, VR128X, sdmem, u8imm, |
| 115668 | /* VCMPSDZrmi_Intk */ |
| 115669 | VK1, VK1WM, VR128X, sdmem, u8imm, |
| 115670 | /* VCMPSDZrri */ |
| 115671 | VK1, FR64X, FR64X, u8imm, |
| 115672 | /* VCMPSDZrri_Int */ |
| 115673 | VK1, VR128X, VR128X, u8imm, |
| 115674 | /* VCMPSDZrri_Intk */ |
| 115675 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 115676 | /* VCMPSDZrrib_Int */ |
| 115677 | VK1, VR128X, VR128X, u8imm, |
| 115678 | /* VCMPSDZrrib_Intk */ |
| 115679 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 115680 | /* VCMPSDrmi */ |
| 115681 | FR64, FR64, f64mem, u8imm, |
| 115682 | /* VCMPSDrmi_Int */ |
| 115683 | VR128, VR128, sdmem, u8imm, |
| 115684 | /* VCMPSDrri */ |
| 115685 | FR64, FR64, FR64, u8imm, |
| 115686 | /* VCMPSDrri_Int */ |
| 115687 | VR128, VR128, VR128, u8imm, |
| 115688 | /* VCMPSHZrmi */ |
| 115689 | VK1, FR16X, f16mem, u8imm, |
| 115690 | /* VCMPSHZrmi_Int */ |
| 115691 | VK1, VR128X, shmem, u8imm, |
| 115692 | /* VCMPSHZrmi_Intk */ |
| 115693 | VK1, VK1WM, VR128X, shmem, u8imm, |
| 115694 | /* VCMPSHZrri */ |
| 115695 | VK1, FR16X, FR16X, u8imm, |
| 115696 | /* VCMPSHZrri_Int */ |
| 115697 | VK1, VR128X, VR128X, u8imm, |
| 115698 | /* VCMPSHZrri_Intk */ |
| 115699 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 115700 | /* VCMPSHZrrib_Int */ |
| 115701 | VK1, VR128X, VR128X, u8imm, |
| 115702 | /* VCMPSHZrrib_Intk */ |
| 115703 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 115704 | /* VCMPSSZrmi */ |
| 115705 | VK1, FR32X, f32mem, u8imm, |
| 115706 | /* VCMPSSZrmi_Int */ |
| 115707 | VK1, VR128X, ssmem, u8imm, |
| 115708 | /* VCMPSSZrmi_Intk */ |
| 115709 | VK1, VK1WM, VR128X, ssmem, u8imm, |
| 115710 | /* VCMPSSZrri */ |
| 115711 | VK1, FR32X, FR32X, u8imm, |
| 115712 | /* VCMPSSZrri_Int */ |
| 115713 | VK1, VR128X, VR128X, u8imm, |
| 115714 | /* VCMPSSZrri_Intk */ |
| 115715 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 115716 | /* VCMPSSZrrib_Int */ |
| 115717 | VK1, VR128X, VR128X, u8imm, |
| 115718 | /* VCMPSSZrrib_Intk */ |
| 115719 | VK1, VK1WM, VR128X, VR128X, u8imm, |
| 115720 | /* VCMPSSrmi */ |
| 115721 | FR32, FR32, f32mem, u8imm, |
| 115722 | /* VCMPSSrmi_Int */ |
| 115723 | VR128, VR128, ssmem, u8imm, |
| 115724 | /* VCMPSSrri */ |
| 115725 | FR32, FR32, FR32, u8imm, |
| 115726 | /* VCMPSSrri_Int */ |
| 115727 | VR128, VR128, VR128, u8imm, |
| 115728 | /* VCOMISDZrm */ |
| 115729 | FR64X, f64mem, |
| 115730 | /* VCOMISDZrm_Int */ |
| 115731 | VR128X, sdmem, |
| 115732 | /* VCOMISDZrr */ |
| 115733 | FR64X, FR64X, |
| 115734 | /* VCOMISDZrr_Int */ |
| 115735 | VR128X, VR128X, |
| 115736 | /* VCOMISDZrrb */ |
| 115737 | VR128X, VR128X, |
| 115738 | /* VCOMISDrm */ |
| 115739 | FR64, f64mem, |
| 115740 | /* VCOMISDrm_Int */ |
| 115741 | VR128, sdmem, |
| 115742 | /* VCOMISDrr */ |
| 115743 | FR64, FR64, |
| 115744 | /* VCOMISDrr_Int */ |
| 115745 | VR128, VR128, |
| 115746 | /* VCOMISHZrm */ |
| 115747 | FR16X, f16mem, |
| 115748 | /* VCOMISHZrm_Int */ |
| 115749 | VR128X, shmem, |
| 115750 | /* VCOMISHZrr */ |
| 115751 | FR16X, FR16X, |
| 115752 | /* VCOMISHZrr_Int */ |
| 115753 | VR128X, VR128X, |
| 115754 | /* VCOMISHZrrb */ |
| 115755 | VR128X, VR128X, |
| 115756 | /* VCOMISSZrm */ |
| 115757 | FR32X, f32mem, |
| 115758 | /* VCOMISSZrm_Int */ |
| 115759 | VR128X, ssmem, |
| 115760 | /* VCOMISSZrr */ |
| 115761 | FR32X, FR32X, |
| 115762 | /* VCOMISSZrr_Int */ |
| 115763 | VR128X, VR128X, |
| 115764 | /* VCOMISSZrrb */ |
| 115765 | VR128X, VR128X, |
| 115766 | /* VCOMISSrm */ |
| 115767 | FR32, f32mem, |
| 115768 | /* VCOMISSrm_Int */ |
| 115769 | VR128, ssmem, |
| 115770 | /* VCOMISSrr */ |
| 115771 | FR32, FR32, |
| 115772 | /* VCOMISSrr_Int */ |
| 115773 | VR128, VR128, |
| 115774 | /* VCOMPRESSPDZ128mr */ |
| 115775 | f128mem, VR128X, |
| 115776 | /* VCOMPRESSPDZ128mrk */ |
| 115777 | f128mem, VK2WM, VR128X, |
| 115778 | /* VCOMPRESSPDZ128rr */ |
| 115779 | VR128X, VR128X, |
| 115780 | /* VCOMPRESSPDZ128rrk */ |
| 115781 | VR128X, VR128X, VK2WM, VR128X, |
| 115782 | /* VCOMPRESSPDZ128rrkz */ |
| 115783 | VR128X, VK2WM, VR128X, |
| 115784 | /* VCOMPRESSPDZ256mr */ |
| 115785 | f256mem, VR256X, |
| 115786 | /* VCOMPRESSPDZ256mrk */ |
| 115787 | f256mem, VK4WM, VR256X, |
| 115788 | /* VCOMPRESSPDZ256rr */ |
| 115789 | VR256X, VR256X, |
| 115790 | /* VCOMPRESSPDZ256rrk */ |
| 115791 | VR256X, VR256X, VK4WM, VR256X, |
| 115792 | /* VCOMPRESSPDZ256rrkz */ |
| 115793 | VR256X, VK4WM, VR256X, |
| 115794 | /* VCOMPRESSPDZmr */ |
| 115795 | f512mem, VR512, |
| 115796 | /* VCOMPRESSPDZmrk */ |
| 115797 | f512mem, VK8WM, VR512, |
| 115798 | /* VCOMPRESSPDZrr */ |
| 115799 | VR512, VR512, |
| 115800 | /* VCOMPRESSPDZrrk */ |
| 115801 | VR512, VR512, VK8WM, VR512, |
| 115802 | /* VCOMPRESSPDZrrkz */ |
| 115803 | VR512, VK8WM, VR512, |
| 115804 | /* VCOMPRESSPSZ128mr */ |
| 115805 | f128mem, VR128X, |
| 115806 | /* VCOMPRESSPSZ128mrk */ |
| 115807 | f128mem, VK4WM, VR128X, |
| 115808 | /* VCOMPRESSPSZ128rr */ |
| 115809 | VR128X, VR128X, |
| 115810 | /* VCOMPRESSPSZ128rrk */ |
| 115811 | VR128X, VR128X, VK4WM, VR128X, |
| 115812 | /* VCOMPRESSPSZ128rrkz */ |
| 115813 | VR128X, VK4WM, VR128X, |
| 115814 | /* VCOMPRESSPSZ256mr */ |
| 115815 | f256mem, VR256X, |
| 115816 | /* VCOMPRESSPSZ256mrk */ |
| 115817 | f256mem, VK8WM, VR256X, |
| 115818 | /* VCOMPRESSPSZ256rr */ |
| 115819 | VR256X, VR256X, |
| 115820 | /* VCOMPRESSPSZ256rrk */ |
| 115821 | VR256X, VR256X, VK8WM, VR256X, |
| 115822 | /* VCOMPRESSPSZ256rrkz */ |
| 115823 | VR256X, VK8WM, VR256X, |
| 115824 | /* VCOMPRESSPSZmr */ |
| 115825 | f512mem, VR512, |
| 115826 | /* VCOMPRESSPSZmrk */ |
| 115827 | f512mem, VK16WM, VR512, |
| 115828 | /* VCOMPRESSPSZrr */ |
| 115829 | VR512, VR512, |
| 115830 | /* VCOMPRESSPSZrrk */ |
| 115831 | VR512, VR512, VK16WM, VR512, |
| 115832 | /* VCOMPRESSPSZrrkz */ |
| 115833 | VR512, VK16WM, VR512, |
| 115834 | /* VCVTDQ2PDYrm */ |
| 115835 | VR256, i128mem, |
| 115836 | /* VCVTDQ2PDYrr */ |
| 115837 | VR256, VR128, |
| 115838 | /* VCVTDQ2PDZ128rm */ |
| 115839 | VR128X, i64mem, |
| 115840 | /* VCVTDQ2PDZ128rmb */ |
| 115841 | VR128X, i32mem, |
| 115842 | /* VCVTDQ2PDZ128rmbk */ |
| 115843 | VR128X, VR128X, VK2WM, i32mem, |
| 115844 | /* VCVTDQ2PDZ128rmbkz */ |
| 115845 | VR128X, VK2WM, i32mem, |
| 115846 | /* VCVTDQ2PDZ128rmk */ |
| 115847 | VR128X, VR128X, VK2WM, i64mem, |
| 115848 | /* VCVTDQ2PDZ128rmkz */ |
| 115849 | VR128X, VK2WM, i64mem, |
| 115850 | /* VCVTDQ2PDZ128rr */ |
| 115851 | VR128X, VR128X, |
| 115852 | /* VCVTDQ2PDZ128rrk */ |
| 115853 | VR128X, VR128X, VK2WM, VR128X, |
| 115854 | /* VCVTDQ2PDZ128rrkz */ |
| 115855 | VR128X, VK2WM, VR128X, |
| 115856 | /* VCVTDQ2PDZ256rm */ |
| 115857 | VR256X, i128mem, |
| 115858 | /* VCVTDQ2PDZ256rmb */ |
| 115859 | VR256X, i32mem, |
| 115860 | /* VCVTDQ2PDZ256rmbk */ |
| 115861 | VR256X, VR256X, VK4WM, i32mem, |
| 115862 | /* VCVTDQ2PDZ256rmbkz */ |
| 115863 | VR256X, VK4WM, i32mem, |
| 115864 | /* VCVTDQ2PDZ256rmk */ |
| 115865 | VR256X, VR256X, VK4WM, i128mem, |
| 115866 | /* VCVTDQ2PDZ256rmkz */ |
| 115867 | VR256X, VK4WM, i128mem, |
| 115868 | /* VCVTDQ2PDZ256rr */ |
| 115869 | VR256X, VR128X, |
| 115870 | /* VCVTDQ2PDZ256rrk */ |
| 115871 | VR256X, VR256X, VK4WM, VR128X, |
| 115872 | /* VCVTDQ2PDZ256rrkz */ |
| 115873 | VR256X, VK4WM, VR128X, |
| 115874 | /* VCVTDQ2PDZrm */ |
| 115875 | VR512, i256mem, |
| 115876 | /* VCVTDQ2PDZrmb */ |
| 115877 | VR512, i32mem, |
| 115878 | /* VCVTDQ2PDZrmbk */ |
| 115879 | VR512, VR512, VK8WM, i32mem, |
| 115880 | /* VCVTDQ2PDZrmbkz */ |
| 115881 | VR512, VK8WM, i32mem, |
| 115882 | /* VCVTDQ2PDZrmk */ |
| 115883 | VR512, VR512, VK8WM, i256mem, |
| 115884 | /* VCVTDQ2PDZrmkz */ |
| 115885 | VR512, VK8WM, i256mem, |
| 115886 | /* VCVTDQ2PDZrr */ |
| 115887 | VR512, VR256X, |
| 115888 | /* VCVTDQ2PDZrrk */ |
| 115889 | VR512, VR512, VK8WM, VR256X, |
| 115890 | /* VCVTDQ2PDZrrkz */ |
| 115891 | VR512, VK8WM, VR256X, |
| 115892 | /* VCVTDQ2PDrm */ |
| 115893 | VR128, i64mem, |
| 115894 | /* VCVTDQ2PDrr */ |
| 115895 | VR128, VR128, |
| 115896 | /* VCVTDQ2PHZ128rm */ |
| 115897 | VR128X, i128mem, |
| 115898 | /* VCVTDQ2PHZ128rmb */ |
| 115899 | VR128X, i32mem, |
| 115900 | /* VCVTDQ2PHZ128rmbk */ |
| 115901 | VR128X, VR128X, VK4WM, i32mem, |
| 115902 | /* VCVTDQ2PHZ128rmbkz */ |
| 115903 | VR128X, VK4WM, i32mem, |
| 115904 | /* VCVTDQ2PHZ128rmk */ |
| 115905 | VR128X, VR128X, VK4WM, i128mem, |
| 115906 | /* VCVTDQ2PHZ128rmkz */ |
| 115907 | VR128X, VK4WM, i128mem, |
| 115908 | /* VCVTDQ2PHZ128rr */ |
| 115909 | VR128X, VR128X, |
| 115910 | /* VCVTDQ2PHZ128rrk */ |
| 115911 | VR128X, VR128X, VK4WM, VR128X, |
| 115912 | /* VCVTDQ2PHZ128rrkz */ |
| 115913 | VR128X, VK4WM, VR128X, |
| 115914 | /* VCVTDQ2PHZ256rm */ |
| 115915 | VR128X, i256mem, |
| 115916 | /* VCVTDQ2PHZ256rmb */ |
| 115917 | VR128X, i32mem, |
| 115918 | /* VCVTDQ2PHZ256rmbk */ |
| 115919 | VR128X, VR128X, VK8WM, i32mem, |
| 115920 | /* VCVTDQ2PHZ256rmbkz */ |
| 115921 | VR128X, VK8WM, i32mem, |
| 115922 | /* VCVTDQ2PHZ256rmk */ |
| 115923 | VR128X, VR128X, VK8WM, i256mem, |
| 115924 | /* VCVTDQ2PHZ256rmkz */ |
| 115925 | VR128X, VK8WM, i256mem, |
| 115926 | /* VCVTDQ2PHZ256rr */ |
| 115927 | VR128X, VR256X, |
| 115928 | /* VCVTDQ2PHZ256rrk */ |
| 115929 | VR128X, VR128X, VK8WM, VR256X, |
| 115930 | /* VCVTDQ2PHZ256rrkz */ |
| 115931 | VR128X, VK8WM, VR256X, |
| 115932 | /* VCVTDQ2PHZrm */ |
| 115933 | VR256X, i512mem, |
| 115934 | /* VCVTDQ2PHZrmb */ |
| 115935 | VR256X, i32mem, |
| 115936 | /* VCVTDQ2PHZrmbk */ |
| 115937 | VR256X, VR256X, VK16WM, i32mem, |
| 115938 | /* VCVTDQ2PHZrmbkz */ |
| 115939 | VR256X, VK16WM, i32mem, |
| 115940 | /* VCVTDQ2PHZrmk */ |
| 115941 | VR256X, VR256X, VK16WM, i512mem, |
| 115942 | /* VCVTDQ2PHZrmkz */ |
| 115943 | VR256X, VK16WM, i512mem, |
| 115944 | /* VCVTDQ2PHZrr */ |
| 115945 | VR256X, VR512, |
| 115946 | /* VCVTDQ2PHZrrb */ |
| 115947 | VR256X, VR512, AVX512RC, |
| 115948 | /* VCVTDQ2PHZrrbk */ |
| 115949 | VR256X, VR256X, VK16WM, VR512, AVX512RC, |
| 115950 | /* VCVTDQ2PHZrrbkz */ |
| 115951 | VR256X, VK16WM, VR512, AVX512RC, |
| 115952 | /* VCVTDQ2PHZrrk */ |
| 115953 | VR256X, VR256X, VK16WM, VR512, |
| 115954 | /* VCVTDQ2PHZrrkz */ |
| 115955 | VR256X, VK16WM, VR512, |
| 115956 | /* VCVTDQ2PSYrm */ |
| 115957 | VR256, i256mem, |
| 115958 | /* VCVTDQ2PSYrr */ |
| 115959 | VR256, VR256, |
| 115960 | /* VCVTDQ2PSZ128rm */ |
| 115961 | VR128X, i128mem, |
| 115962 | /* VCVTDQ2PSZ128rmb */ |
| 115963 | VR128X, i32mem, |
| 115964 | /* VCVTDQ2PSZ128rmbk */ |
| 115965 | VR128X, VR128X, VK4WM, i32mem, |
| 115966 | /* VCVTDQ2PSZ128rmbkz */ |
| 115967 | VR128X, VK4WM, i32mem, |
| 115968 | /* VCVTDQ2PSZ128rmk */ |
| 115969 | VR128X, VR128X, VK4WM, i128mem, |
| 115970 | /* VCVTDQ2PSZ128rmkz */ |
| 115971 | VR128X, VK4WM, i128mem, |
| 115972 | /* VCVTDQ2PSZ128rr */ |
| 115973 | VR128X, VR128X, |
| 115974 | /* VCVTDQ2PSZ128rrk */ |
| 115975 | VR128X, VR128X, VK4WM, VR128X, |
| 115976 | /* VCVTDQ2PSZ128rrkz */ |
| 115977 | VR128X, VK4WM, VR128X, |
| 115978 | /* VCVTDQ2PSZ256rm */ |
| 115979 | VR256X, i256mem, |
| 115980 | /* VCVTDQ2PSZ256rmb */ |
| 115981 | VR256X, i32mem, |
| 115982 | /* VCVTDQ2PSZ256rmbk */ |
| 115983 | VR256X, VR256X, VK8WM, i32mem, |
| 115984 | /* VCVTDQ2PSZ256rmbkz */ |
| 115985 | VR256X, VK8WM, i32mem, |
| 115986 | /* VCVTDQ2PSZ256rmk */ |
| 115987 | VR256X, VR256X, VK8WM, i256mem, |
| 115988 | /* VCVTDQ2PSZ256rmkz */ |
| 115989 | VR256X, VK8WM, i256mem, |
| 115990 | /* VCVTDQ2PSZ256rr */ |
| 115991 | VR256X, VR256X, |
| 115992 | /* VCVTDQ2PSZ256rrk */ |
| 115993 | VR256X, VR256X, VK8WM, VR256X, |
| 115994 | /* VCVTDQ2PSZ256rrkz */ |
| 115995 | VR256X, VK8WM, VR256X, |
| 115996 | /* VCVTDQ2PSZrm */ |
| 115997 | VR512, i512mem, |
| 115998 | /* VCVTDQ2PSZrmb */ |
| 115999 | VR512, i32mem, |
| 116000 | /* VCVTDQ2PSZrmbk */ |
| 116001 | VR512, VR512, VK16WM, i32mem, |
| 116002 | /* VCVTDQ2PSZrmbkz */ |
| 116003 | VR512, VK16WM, i32mem, |
| 116004 | /* VCVTDQ2PSZrmk */ |
| 116005 | VR512, VR512, VK16WM, i512mem, |
| 116006 | /* VCVTDQ2PSZrmkz */ |
| 116007 | VR512, VK16WM, i512mem, |
| 116008 | /* VCVTDQ2PSZrr */ |
| 116009 | VR512, VR512, |
| 116010 | /* VCVTDQ2PSZrrb */ |
| 116011 | VR512, VR512, AVX512RC, |
| 116012 | /* VCVTDQ2PSZrrbk */ |
| 116013 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 116014 | /* VCVTDQ2PSZrrbkz */ |
| 116015 | VR512, VK16WM, VR512, AVX512RC, |
| 116016 | /* VCVTDQ2PSZrrk */ |
| 116017 | VR512, VR512, VK16WM, VR512, |
| 116018 | /* VCVTDQ2PSZrrkz */ |
| 116019 | VR512, VK16WM, VR512, |
| 116020 | /* VCVTDQ2PSrm */ |
| 116021 | VR128, i128mem, |
| 116022 | /* VCVTDQ2PSrr */ |
| 116023 | VR128, VR128, |
| 116024 | /* VCVTNE2PS2BF16Z128rm */ |
| 116025 | VR128X, VR128X, f128mem, |
| 116026 | /* VCVTNE2PS2BF16Z128rmb */ |
| 116027 | VR128X, VR128X, f32mem, |
| 116028 | /* VCVTNE2PS2BF16Z128rmbk */ |
| 116029 | VR128X, VR128X, VK8WM, VR128X, f32mem, |
| 116030 | /* VCVTNE2PS2BF16Z128rmbkz */ |
| 116031 | VR128X, VK8WM, VR128X, f32mem, |
| 116032 | /* VCVTNE2PS2BF16Z128rmk */ |
| 116033 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 116034 | /* VCVTNE2PS2BF16Z128rmkz */ |
| 116035 | VR128X, VK8WM, VR128X, f128mem, |
| 116036 | /* VCVTNE2PS2BF16Z128rr */ |
| 116037 | VR128X, VR128X, VR128X, |
| 116038 | /* VCVTNE2PS2BF16Z128rrk */ |
| 116039 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 116040 | /* VCVTNE2PS2BF16Z128rrkz */ |
| 116041 | VR128X, VK8WM, VR128X, VR128X, |
| 116042 | /* VCVTNE2PS2BF16Z256rm */ |
| 116043 | VR256X, VR256X, f256mem, |
| 116044 | /* VCVTNE2PS2BF16Z256rmb */ |
| 116045 | VR256X, VR256X, f32mem, |
| 116046 | /* VCVTNE2PS2BF16Z256rmbk */ |
| 116047 | VR256X, VR256X, VK16WM, VR256X, f32mem, |
| 116048 | /* VCVTNE2PS2BF16Z256rmbkz */ |
| 116049 | VR256X, VK16WM, VR256X, f32mem, |
| 116050 | /* VCVTNE2PS2BF16Z256rmk */ |
| 116051 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 116052 | /* VCVTNE2PS2BF16Z256rmkz */ |
| 116053 | VR256X, VK16WM, VR256X, f256mem, |
| 116054 | /* VCVTNE2PS2BF16Z256rr */ |
| 116055 | VR256X, VR256X, VR256X, |
| 116056 | /* VCVTNE2PS2BF16Z256rrk */ |
| 116057 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 116058 | /* VCVTNE2PS2BF16Z256rrkz */ |
| 116059 | VR256X, VK16WM, VR256X, VR256X, |
| 116060 | /* VCVTNE2PS2BF16Zrm */ |
| 116061 | VR512, VR512, f512mem, |
| 116062 | /* VCVTNE2PS2BF16Zrmb */ |
| 116063 | VR512, VR512, f32mem, |
| 116064 | /* VCVTNE2PS2BF16Zrmbk */ |
| 116065 | VR512, VR512, VK32WM, VR512, f32mem, |
| 116066 | /* VCVTNE2PS2BF16Zrmbkz */ |
| 116067 | VR512, VK32WM, VR512, f32mem, |
| 116068 | /* VCVTNE2PS2BF16Zrmk */ |
| 116069 | VR512, VR512, VK32WM, VR512, f512mem, |
| 116070 | /* VCVTNE2PS2BF16Zrmkz */ |
| 116071 | VR512, VK32WM, VR512, f512mem, |
| 116072 | /* VCVTNE2PS2BF16Zrr */ |
| 116073 | VR512, VR512, VR512, |
| 116074 | /* VCVTNE2PS2BF16Zrrk */ |
| 116075 | VR512, VR512, VK32WM, VR512, VR512, |
| 116076 | /* VCVTNE2PS2BF16Zrrkz */ |
| 116077 | VR512, VK32WM, VR512, VR512, |
| 116078 | /* VCVTNEEBF162PSYrm */ |
| 116079 | VR256, f256mem, |
| 116080 | /* VCVTNEEBF162PSrm */ |
| 116081 | VR128, f128mem, |
| 116082 | /* VCVTNEEPH2PSYrm */ |
| 116083 | VR256, f256mem, |
| 116084 | /* VCVTNEEPH2PSrm */ |
| 116085 | VR128, f128mem, |
| 116086 | /* VCVTNEOBF162PSYrm */ |
| 116087 | VR256, f256mem, |
| 116088 | /* VCVTNEOBF162PSrm */ |
| 116089 | VR128, f128mem, |
| 116090 | /* VCVTNEOPH2PSYrm */ |
| 116091 | VR256, f256mem, |
| 116092 | /* VCVTNEOPH2PSrm */ |
| 116093 | VR128, f128mem, |
| 116094 | /* VCVTNEPS2BF16Yrm */ |
| 116095 | VR128, f256mem, |
| 116096 | /* VCVTNEPS2BF16Yrr */ |
| 116097 | VR128, VR256, |
| 116098 | /* VCVTNEPS2BF16Z128rm */ |
| 116099 | VR128X, f128mem, |
| 116100 | /* VCVTNEPS2BF16Z128rmb */ |
| 116101 | VR128X, f32mem, |
| 116102 | /* VCVTNEPS2BF16Z128rmbk */ |
| 116103 | VR128X, VR128X, VK4WM, f32mem, |
| 116104 | /* VCVTNEPS2BF16Z128rmbkz */ |
| 116105 | VR128X, VK4WM, f32mem, |
| 116106 | /* VCVTNEPS2BF16Z128rmk */ |
| 116107 | VR128X, VR128X, VK4WM, f128mem, |
| 116108 | /* VCVTNEPS2BF16Z128rmkz */ |
| 116109 | VR128X, VK4WM, f128mem, |
| 116110 | /* VCVTNEPS2BF16Z128rr */ |
| 116111 | VR128X, VR128X, |
| 116112 | /* VCVTNEPS2BF16Z128rrk */ |
| 116113 | VR128X, VR128X, VK4WM, VR128X, |
| 116114 | /* VCVTNEPS2BF16Z128rrkz */ |
| 116115 | VR128X, VK4WM, VR128X, |
| 116116 | /* VCVTNEPS2BF16Z256rm */ |
| 116117 | VR128X, f256mem, |
| 116118 | /* VCVTNEPS2BF16Z256rmb */ |
| 116119 | VR128X, f32mem, |
| 116120 | /* VCVTNEPS2BF16Z256rmbk */ |
| 116121 | VR128X, VR128X, VK8WM, f32mem, |
| 116122 | /* VCVTNEPS2BF16Z256rmbkz */ |
| 116123 | VR128X, VK8WM, f32mem, |
| 116124 | /* VCVTNEPS2BF16Z256rmk */ |
| 116125 | VR128X, VR128X, VK8WM, f256mem, |
| 116126 | /* VCVTNEPS2BF16Z256rmkz */ |
| 116127 | VR128X, VK8WM, f256mem, |
| 116128 | /* VCVTNEPS2BF16Z256rr */ |
| 116129 | VR128X, VR256X, |
| 116130 | /* VCVTNEPS2BF16Z256rrk */ |
| 116131 | VR128X, VR128X, VK8WM, VR256X, |
| 116132 | /* VCVTNEPS2BF16Z256rrkz */ |
| 116133 | VR128X, VK8WM, VR256X, |
| 116134 | /* VCVTNEPS2BF16Zrm */ |
| 116135 | VR256X, f512mem, |
| 116136 | /* VCVTNEPS2BF16Zrmb */ |
| 116137 | VR256X, f32mem, |
| 116138 | /* VCVTNEPS2BF16Zrmbk */ |
| 116139 | VR256X, VR256X, VK16WM, f32mem, |
| 116140 | /* VCVTNEPS2BF16Zrmbkz */ |
| 116141 | VR256X, VK16WM, f32mem, |
| 116142 | /* VCVTNEPS2BF16Zrmk */ |
| 116143 | VR256X, VR256X, VK16WM, f512mem, |
| 116144 | /* VCVTNEPS2BF16Zrmkz */ |
| 116145 | VR256X, VK16WM, f512mem, |
| 116146 | /* VCVTNEPS2BF16Zrr */ |
| 116147 | VR256X, VR512, |
| 116148 | /* VCVTNEPS2BF16Zrrk */ |
| 116149 | VR256X, VR256X, VK16WM, VR512, |
| 116150 | /* VCVTNEPS2BF16Zrrkz */ |
| 116151 | VR256X, VK16WM, VR512, |
| 116152 | /* VCVTNEPS2BF16rm */ |
| 116153 | VR128, f128mem, |
| 116154 | /* VCVTNEPS2BF16rr */ |
| 116155 | VR128, VR128, |
| 116156 | /* VCVTPD2DQYrm */ |
| 116157 | VR128, f256mem, |
| 116158 | /* VCVTPD2DQYrr */ |
| 116159 | VR128, VR256, |
| 116160 | /* VCVTPD2DQZ128rm */ |
| 116161 | VR128X, f128mem, |
| 116162 | /* VCVTPD2DQZ128rmb */ |
| 116163 | VR128X, f64mem, |
| 116164 | /* VCVTPD2DQZ128rmbk */ |
| 116165 | VR128X, VR128X, VK2WM, f64mem, |
| 116166 | /* VCVTPD2DQZ128rmbkz */ |
| 116167 | VR128X, VK2WM, f64mem, |
| 116168 | /* VCVTPD2DQZ128rmk */ |
| 116169 | VR128X, VR128X, VK2WM, f128mem, |
| 116170 | /* VCVTPD2DQZ128rmkz */ |
| 116171 | VR128X, VK2WM, f128mem, |
| 116172 | /* VCVTPD2DQZ128rr */ |
| 116173 | VR128X, VR128X, |
| 116174 | /* VCVTPD2DQZ128rrk */ |
| 116175 | VR128X, VR128X, VK2WM, VR128X, |
| 116176 | /* VCVTPD2DQZ128rrkz */ |
| 116177 | VR128X, VK2WM, VR128X, |
| 116178 | /* VCVTPD2DQZ256rm */ |
| 116179 | VR128X, f256mem, |
| 116180 | /* VCVTPD2DQZ256rmb */ |
| 116181 | VR128X, f64mem, |
| 116182 | /* VCVTPD2DQZ256rmbk */ |
| 116183 | VR128X, VR128X, VK4WM, f64mem, |
| 116184 | /* VCVTPD2DQZ256rmbkz */ |
| 116185 | VR128X, VK4WM, f64mem, |
| 116186 | /* VCVTPD2DQZ256rmk */ |
| 116187 | VR128X, VR128X, VK4WM, f256mem, |
| 116188 | /* VCVTPD2DQZ256rmkz */ |
| 116189 | VR128X, VK4WM, f256mem, |
| 116190 | /* VCVTPD2DQZ256rr */ |
| 116191 | VR128X, VR256X, |
| 116192 | /* VCVTPD2DQZ256rrk */ |
| 116193 | VR128X, VR128X, VK4WM, VR256X, |
| 116194 | /* VCVTPD2DQZ256rrkz */ |
| 116195 | VR128X, VK4WM, VR256X, |
| 116196 | /* VCVTPD2DQZrm */ |
| 116197 | VR256X, f512mem, |
| 116198 | /* VCVTPD2DQZrmb */ |
| 116199 | VR256X, f64mem, |
| 116200 | /* VCVTPD2DQZrmbk */ |
| 116201 | VR256X, VR256X, VK8WM, f64mem, |
| 116202 | /* VCVTPD2DQZrmbkz */ |
| 116203 | VR256X, VK8WM, f64mem, |
| 116204 | /* VCVTPD2DQZrmk */ |
| 116205 | VR256X, VR256X, VK8WM, f512mem, |
| 116206 | /* VCVTPD2DQZrmkz */ |
| 116207 | VR256X, VK8WM, f512mem, |
| 116208 | /* VCVTPD2DQZrr */ |
| 116209 | VR256X, VR512, |
| 116210 | /* VCVTPD2DQZrrb */ |
| 116211 | VR256X, VR512, AVX512RC, |
| 116212 | /* VCVTPD2DQZrrbk */ |
| 116213 | VR256X, VR256X, VK8WM, VR512, AVX512RC, |
| 116214 | /* VCVTPD2DQZrrbkz */ |
| 116215 | VR256X, VK8WM, VR512, AVX512RC, |
| 116216 | /* VCVTPD2DQZrrk */ |
| 116217 | VR256X, VR256X, VK8WM, VR512, |
| 116218 | /* VCVTPD2DQZrrkz */ |
| 116219 | VR256X, VK8WM, VR512, |
| 116220 | /* VCVTPD2DQrm */ |
| 116221 | VR128, f128mem, |
| 116222 | /* VCVTPD2DQrr */ |
| 116223 | VR128, VR128, |
| 116224 | /* VCVTPD2PHZ128rm */ |
| 116225 | VR128X, f128mem, |
| 116226 | /* VCVTPD2PHZ128rmb */ |
| 116227 | VR128X, f64mem, |
| 116228 | /* VCVTPD2PHZ128rmbk */ |
| 116229 | VR128X, VR128X, VK2WM, f64mem, |
| 116230 | /* VCVTPD2PHZ128rmbkz */ |
| 116231 | VR128X, VK2WM, f64mem, |
| 116232 | /* VCVTPD2PHZ128rmk */ |
| 116233 | VR128X, VR128X, VK2WM, f128mem, |
| 116234 | /* VCVTPD2PHZ128rmkz */ |
| 116235 | VR128X, VK2WM, f128mem, |
| 116236 | /* VCVTPD2PHZ128rr */ |
| 116237 | VR128X, VR128X, |
| 116238 | /* VCVTPD2PHZ128rrk */ |
| 116239 | VR128X, VR128X, VK2WM, VR128X, |
| 116240 | /* VCVTPD2PHZ128rrkz */ |
| 116241 | VR128X, VK2WM, VR128X, |
| 116242 | /* VCVTPD2PHZ256rm */ |
| 116243 | VR128X, f256mem, |
| 116244 | /* VCVTPD2PHZ256rmb */ |
| 116245 | VR128X, f64mem, |
| 116246 | /* VCVTPD2PHZ256rmbk */ |
| 116247 | VR128X, VR128X, VK4WM, f64mem, |
| 116248 | /* VCVTPD2PHZ256rmbkz */ |
| 116249 | VR128X, VK4WM, f64mem, |
| 116250 | /* VCVTPD2PHZ256rmk */ |
| 116251 | VR128X, VR128X, VK4WM, f256mem, |
| 116252 | /* VCVTPD2PHZ256rmkz */ |
| 116253 | VR128X, VK4WM, f256mem, |
| 116254 | /* VCVTPD2PHZ256rr */ |
| 116255 | VR128X, VR256X, |
| 116256 | /* VCVTPD2PHZ256rrk */ |
| 116257 | VR128X, VR128X, VK4WM, VR256X, |
| 116258 | /* VCVTPD2PHZ256rrkz */ |
| 116259 | VR128X, VK4WM, VR256X, |
| 116260 | /* VCVTPD2PHZrm */ |
| 116261 | VR128X, f512mem, |
| 116262 | /* VCVTPD2PHZrmb */ |
| 116263 | VR128X, f64mem, |
| 116264 | /* VCVTPD2PHZrmbk */ |
| 116265 | VR128X, VR128X, VK8WM, f64mem, |
| 116266 | /* VCVTPD2PHZrmbkz */ |
| 116267 | VR128X, VK8WM, f64mem, |
| 116268 | /* VCVTPD2PHZrmk */ |
| 116269 | VR128X, VR128X, VK8WM, f512mem, |
| 116270 | /* VCVTPD2PHZrmkz */ |
| 116271 | VR128X, VK8WM, f512mem, |
| 116272 | /* VCVTPD2PHZrr */ |
| 116273 | VR128X, VR512, |
| 116274 | /* VCVTPD2PHZrrb */ |
| 116275 | VR128X, VR512, AVX512RC, |
| 116276 | /* VCVTPD2PHZrrbk */ |
| 116277 | VR128X, VR128X, VK8WM, VR512, AVX512RC, |
| 116278 | /* VCVTPD2PHZrrbkz */ |
| 116279 | VR128X, VK8WM, VR512, AVX512RC, |
| 116280 | /* VCVTPD2PHZrrk */ |
| 116281 | VR128X, VR128X, VK8WM, VR512, |
| 116282 | /* VCVTPD2PHZrrkz */ |
| 116283 | VR128X, VK8WM, VR512, |
| 116284 | /* VCVTPD2PSYrm */ |
| 116285 | VR128, f256mem, |
| 116286 | /* VCVTPD2PSYrr */ |
| 116287 | VR128, VR256, |
| 116288 | /* VCVTPD2PSZ128rm */ |
| 116289 | VR128X, f128mem, |
| 116290 | /* VCVTPD2PSZ128rmb */ |
| 116291 | VR128X, f64mem, |
| 116292 | /* VCVTPD2PSZ128rmbk */ |
| 116293 | VR128X, VR128X, VK2WM, f64mem, |
| 116294 | /* VCVTPD2PSZ128rmbkz */ |
| 116295 | VR128X, VK2WM, f64mem, |
| 116296 | /* VCVTPD2PSZ128rmk */ |
| 116297 | VR128X, VR128X, VK2WM, f128mem, |
| 116298 | /* VCVTPD2PSZ128rmkz */ |
| 116299 | VR128X, VK2WM, f128mem, |
| 116300 | /* VCVTPD2PSZ128rr */ |
| 116301 | VR128X, VR128X, |
| 116302 | /* VCVTPD2PSZ128rrk */ |
| 116303 | VR128X, VR128X, VK2WM, VR128X, |
| 116304 | /* VCVTPD2PSZ128rrkz */ |
| 116305 | VR128X, VK2WM, VR128X, |
| 116306 | /* VCVTPD2PSZ256rm */ |
| 116307 | VR128X, f256mem, |
| 116308 | /* VCVTPD2PSZ256rmb */ |
| 116309 | VR128X, f64mem, |
| 116310 | /* VCVTPD2PSZ256rmbk */ |
| 116311 | VR128X, VR128X, VK4WM, f64mem, |
| 116312 | /* VCVTPD2PSZ256rmbkz */ |
| 116313 | VR128X, VK4WM, f64mem, |
| 116314 | /* VCVTPD2PSZ256rmk */ |
| 116315 | VR128X, VR128X, VK4WM, f256mem, |
| 116316 | /* VCVTPD2PSZ256rmkz */ |
| 116317 | VR128X, VK4WM, f256mem, |
| 116318 | /* VCVTPD2PSZ256rr */ |
| 116319 | VR128X, VR256X, |
| 116320 | /* VCVTPD2PSZ256rrk */ |
| 116321 | VR128X, VR128X, VK4WM, VR256X, |
| 116322 | /* VCVTPD2PSZ256rrkz */ |
| 116323 | VR128X, VK4WM, VR256X, |
| 116324 | /* VCVTPD2PSZrm */ |
| 116325 | VR256X, f512mem, |
| 116326 | /* VCVTPD2PSZrmb */ |
| 116327 | VR256X, f64mem, |
| 116328 | /* VCVTPD2PSZrmbk */ |
| 116329 | VR256X, VR256X, VK8WM, f64mem, |
| 116330 | /* VCVTPD2PSZrmbkz */ |
| 116331 | VR256X, VK8WM, f64mem, |
| 116332 | /* VCVTPD2PSZrmk */ |
| 116333 | VR256X, VR256X, VK8WM, f512mem, |
| 116334 | /* VCVTPD2PSZrmkz */ |
| 116335 | VR256X, VK8WM, f512mem, |
| 116336 | /* VCVTPD2PSZrr */ |
| 116337 | VR256X, VR512, |
| 116338 | /* VCVTPD2PSZrrb */ |
| 116339 | VR256X, VR512, AVX512RC, |
| 116340 | /* VCVTPD2PSZrrbk */ |
| 116341 | VR256X, VR256X, VK8WM, VR512, AVX512RC, |
| 116342 | /* VCVTPD2PSZrrbkz */ |
| 116343 | VR256X, VK8WM, VR512, AVX512RC, |
| 116344 | /* VCVTPD2PSZrrk */ |
| 116345 | VR256X, VR256X, VK8WM, VR512, |
| 116346 | /* VCVTPD2PSZrrkz */ |
| 116347 | VR256X, VK8WM, VR512, |
| 116348 | /* VCVTPD2PSrm */ |
| 116349 | VR128, f128mem, |
| 116350 | /* VCVTPD2PSrr */ |
| 116351 | VR128, VR128, |
| 116352 | /* VCVTPD2QQZ128rm */ |
| 116353 | VR128X, f128mem, |
| 116354 | /* VCVTPD2QQZ128rmb */ |
| 116355 | VR128X, f64mem, |
| 116356 | /* VCVTPD2QQZ128rmbk */ |
| 116357 | VR128X, VR128X, VK2WM, f64mem, |
| 116358 | /* VCVTPD2QQZ128rmbkz */ |
| 116359 | VR128X, VK2WM, f64mem, |
| 116360 | /* VCVTPD2QQZ128rmk */ |
| 116361 | VR128X, VR128X, VK2WM, f128mem, |
| 116362 | /* VCVTPD2QQZ128rmkz */ |
| 116363 | VR128X, VK2WM, f128mem, |
| 116364 | /* VCVTPD2QQZ128rr */ |
| 116365 | VR128X, VR128X, |
| 116366 | /* VCVTPD2QQZ128rrk */ |
| 116367 | VR128X, VR128X, VK2WM, VR128X, |
| 116368 | /* VCVTPD2QQZ128rrkz */ |
| 116369 | VR128X, VK2WM, VR128X, |
| 116370 | /* VCVTPD2QQZ256rm */ |
| 116371 | VR256X, f256mem, |
| 116372 | /* VCVTPD2QQZ256rmb */ |
| 116373 | VR256X, f64mem, |
| 116374 | /* VCVTPD2QQZ256rmbk */ |
| 116375 | VR256X, VR256X, VK4WM, f64mem, |
| 116376 | /* VCVTPD2QQZ256rmbkz */ |
| 116377 | VR256X, VK4WM, f64mem, |
| 116378 | /* VCVTPD2QQZ256rmk */ |
| 116379 | VR256X, VR256X, VK4WM, f256mem, |
| 116380 | /* VCVTPD2QQZ256rmkz */ |
| 116381 | VR256X, VK4WM, f256mem, |
| 116382 | /* VCVTPD2QQZ256rr */ |
| 116383 | VR256X, VR256X, |
| 116384 | /* VCVTPD2QQZ256rrk */ |
| 116385 | VR256X, VR256X, VK4WM, VR256X, |
| 116386 | /* VCVTPD2QQZ256rrkz */ |
| 116387 | VR256X, VK4WM, VR256X, |
| 116388 | /* VCVTPD2QQZrm */ |
| 116389 | VR512, f512mem, |
| 116390 | /* VCVTPD2QQZrmb */ |
| 116391 | VR512, f64mem, |
| 116392 | /* VCVTPD2QQZrmbk */ |
| 116393 | VR512, VR512, VK8WM, f64mem, |
| 116394 | /* VCVTPD2QQZrmbkz */ |
| 116395 | VR512, VK8WM, f64mem, |
| 116396 | /* VCVTPD2QQZrmk */ |
| 116397 | VR512, VR512, VK8WM, f512mem, |
| 116398 | /* VCVTPD2QQZrmkz */ |
| 116399 | VR512, VK8WM, f512mem, |
| 116400 | /* VCVTPD2QQZrr */ |
| 116401 | VR512, VR512, |
| 116402 | /* VCVTPD2QQZrrb */ |
| 116403 | VR512, VR512, AVX512RC, |
| 116404 | /* VCVTPD2QQZrrbk */ |
| 116405 | VR512, VR512, VK8WM, VR512, AVX512RC, |
| 116406 | /* VCVTPD2QQZrrbkz */ |
| 116407 | VR512, VK8WM, VR512, AVX512RC, |
| 116408 | /* VCVTPD2QQZrrk */ |
| 116409 | VR512, VR512, VK8WM, VR512, |
| 116410 | /* VCVTPD2QQZrrkz */ |
| 116411 | VR512, VK8WM, VR512, |
| 116412 | /* VCVTPD2UDQZ128rm */ |
| 116413 | VR128X, f128mem, |
| 116414 | /* VCVTPD2UDQZ128rmb */ |
| 116415 | VR128X, f64mem, |
| 116416 | /* VCVTPD2UDQZ128rmbk */ |
| 116417 | VR128X, VR128X, VK2WM, f64mem, |
| 116418 | /* VCVTPD2UDQZ128rmbkz */ |
| 116419 | VR128X, VK2WM, f64mem, |
| 116420 | /* VCVTPD2UDQZ128rmk */ |
| 116421 | VR128X, VR128X, VK2WM, f128mem, |
| 116422 | /* VCVTPD2UDQZ128rmkz */ |
| 116423 | VR128X, VK2WM, f128mem, |
| 116424 | /* VCVTPD2UDQZ128rr */ |
| 116425 | VR128X, VR128X, |
| 116426 | /* VCVTPD2UDQZ128rrk */ |
| 116427 | VR128X, VR128X, VK2WM, VR128X, |
| 116428 | /* VCVTPD2UDQZ128rrkz */ |
| 116429 | VR128X, VK2WM, VR128X, |
| 116430 | /* VCVTPD2UDQZ256rm */ |
| 116431 | VR128X, f256mem, |
| 116432 | /* VCVTPD2UDQZ256rmb */ |
| 116433 | VR128X, f64mem, |
| 116434 | /* VCVTPD2UDQZ256rmbk */ |
| 116435 | VR128X, VR128X, VK4WM, f64mem, |
| 116436 | /* VCVTPD2UDQZ256rmbkz */ |
| 116437 | VR128X, VK4WM, f64mem, |
| 116438 | /* VCVTPD2UDQZ256rmk */ |
| 116439 | VR128X, VR128X, VK4WM, f256mem, |
| 116440 | /* VCVTPD2UDQZ256rmkz */ |
| 116441 | VR128X, VK4WM, f256mem, |
| 116442 | /* VCVTPD2UDQZ256rr */ |
| 116443 | VR128X, VR256X, |
| 116444 | /* VCVTPD2UDQZ256rrk */ |
| 116445 | VR128X, VR128X, VK4WM, VR256X, |
| 116446 | /* VCVTPD2UDQZ256rrkz */ |
| 116447 | VR128X, VK4WM, VR256X, |
| 116448 | /* VCVTPD2UDQZrm */ |
| 116449 | VR256X, f512mem, |
| 116450 | /* VCVTPD2UDQZrmb */ |
| 116451 | VR256X, f64mem, |
| 116452 | /* VCVTPD2UDQZrmbk */ |
| 116453 | VR256X, VR256X, VK8WM, f64mem, |
| 116454 | /* VCVTPD2UDQZrmbkz */ |
| 116455 | VR256X, VK8WM, f64mem, |
| 116456 | /* VCVTPD2UDQZrmk */ |
| 116457 | VR256X, VR256X, VK8WM, f512mem, |
| 116458 | /* VCVTPD2UDQZrmkz */ |
| 116459 | VR256X, VK8WM, f512mem, |
| 116460 | /* VCVTPD2UDQZrr */ |
| 116461 | VR256X, VR512, |
| 116462 | /* VCVTPD2UDQZrrb */ |
| 116463 | VR256X, VR512, AVX512RC, |
| 116464 | /* VCVTPD2UDQZrrbk */ |
| 116465 | VR256X, VR256X, VK8WM, VR512, AVX512RC, |
| 116466 | /* VCVTPD2UDQZrrbkz */ |
| 116467 | VR256X, VK8WM, VR512, AVX512RC, |
| 116468 | /* VCVTPD2UDQZrrk */ |
| 116469 | VR256X, VR256X, VK8WM, VR512, |
| 116470 | /* VCVTPD2UDQZrrkz */ |
| 116471 | VR256X, VK8WM, VR512, |
| 116472 | /* VCVTPD2UQQZ128rm */ |
| 116473 | VR128X, f128mem, |
| 116474 | /* VCVTPD2UQQZ128rmb */ |
| 116475 | VR128X, f64mem, |
| 116476 | /* VCVTPD2UQQZ128rmbk */ |
| 116477 | VR128X, VR128X, VK2WM, f64mem, |
| 116478 | /* VCVTPD2UQQZ128rmbkz */ |
| 116479 | VR128X, VK2WM, f64mem, |
| 116480 | /* VCVTPD2UQQZ128rmk */ |
| 116481 | VR128X, VR128X, VK2WM, f128mem, |
| 116482 | /* VCVTPD2UQQZ128rmkz */ |
| 116483 | VR128X, VK2WM, f128mem, |
| 116484 | /* VCVTPD2UQQZ128rr */ |
| 116485 | VR128X, VR128X, |
| 116486 | /* VCVTPD2UQQZ128rrk */ |
| 116487 | VR128X, VR128X, VK2WM, VR128X, |
| 116488 | /* VCVTPD2UQQZ128rrkz */ |
| 116489 | VR128X, VK2WM, VR128X, |
| 116490 | /* VCVTPD2UQQZ256rm */ |
| 116491 | VR256X, f256mem, |
| 116492 | /* VCVTPD2UQQZ256rmb */ |
| 116493 | VR256X, f64mem, |
| 116494 | /* VCVTPD2UQQZ256rmbk */ |
| 116495 | VR256X, VR256X, VK4WM, f64mem, |
| 116496 | /* VCVTPD2UQQZ256rmbkz */ |
| 116497 | VR256X, VK4WM, f64mem, |
| 116498 | /* VCVTPD2UQQZ256rmk */ |
| 116499 | VR256X, VR256X, VK4WM, f256mem, |
| 116500 | /* VCVTPD2UQQZ256rmkz */ |
| 116501 | VR256X, VK4WM, f256mem, |
| 116502 | /* VCVTPD2UQQZ256rr */ |
| 116503 | VR256X, VR256X, |
| 116504 | /* VCVTPD2UQQZ256rrk */ |
| 116505 | VR256X, VR256X, VK4WM, VR256X, |
| 116506 | /* VCVTPD2UQQZ256rrkz */ |
| 116507 | VR256X, VK4WM, VR256X, |
| 116508 | /* VCVTPD2UQQZrm */ |
| 116509 | VR512, f512mem, |
| 116510 | /* VCVTPD2UQQZrmb */ |
| 116511 | VR512, f64mem, |
| 116512 | /* VCVTPD2UQQZrmbk */ |
| 116513 | VR512, VR512, VK8WM, f64mem, |
| 116514 | /* VCVTPD2UQQZrmbkz */ |
| 116515 | VR512, VK8WM, f64mem, |
| 116516 | /* VCVTPD2UQQZrmk */ |
| 116517 | VR512, VR512, VK8WM, f512mem, |
| 116518 | /* VCVTPD2UQQZrmkz */ |
| 116519 | VR512, VK8WM, f512mem, |
| 116520 | /* VCVTPD2UQQZrr */ |
| 116521 | VR512, VR512, |
| 116522 | /* VCVTPD2UQQZrrb */ |
| 116523 | VR512, VR512, AVX512RC, |
| 116524 | /* VCVTPD2UQQZrrbk */ |
| 116525 | VR512, VR512, VK8WM, VR512, AVX512RC, |
| 116526 | /* VCVTPD2UQQZrrbkz */ |
| 116527 | VR512, VK8WM, VR512, AVX512RC, |
| 116528 | /* VCVTPD2UQQZrrk */ |
| 116529 | VR512, VR512, VK8WM, VR512, |
| 116530 | /* VCVTPD2UQQZrrkz */ |
| 116531 | VR512, VK8WM, VR512, |
| 116532 | /* VCVTPH2DQZ128rm */ |
| 116533 | VR128X, f64mem, |
| 116534 | /* VCVTPH2DQZ128rmb */ |
| 116535 | VR128X, f16mem, |
| 116536 | /* VCVTPH2DQZ128rmbk */ |
| 116537 | VR128X, VR128X, VK4WM, f16mem, |
| 116538 | /* VCVTPH2DQZ128rmbkz */ |
| 116539 | VR128X, VK4WM, f16mem, |
| 116540 | /* VCVTPH2DQZ128rmk */ |
| 116541 | VR128X, VR128X, VK4WM, f64mem, |
| 116542 | /* VCVTPH2DQZ128rmkz */ |
| 116543 | VR128X, VK4WM, f64mem, |
| 116544 | /* VCVTPH2DQZ128rr */ |
| 116545 | VR128X, VR128X, |
| 116546 | /* VCVTPH2DQZ128rrk */ |
| 116547 | VR128X, VR128X, VK4WM, VR128X, |
| 116548 | /* VCVTPH2DQZ128rrkz */ |
| 116549 | VR128X, VK4WM, VR128X, |
| 116550 | /* VCVTPH2DQZ256rm */ |
| 116551 | VR256X, f128mem, |
| 116552 | /* VCVTPH2DQZ256rmb */ |
| 116553 | VR256X, f16mem, |
| 116554 | /* VCVTPH2DQZ256rmbk */ |
| 116555 | VR256X, VR256X, VK8WM, f16mem, |
| 116556 | /* VCVTPH2DQZ256rmbkz */ |
| 116557 | VR256X, VK8WM, f16mem, |
| 116558 | /* VCVTPH2DQZ256rmk */ |
| 116559 | VR256X, VR256X, VK8WM, f128mem, |
| 116560 | /* VCVTPH2DQZ256rmkz */ |
| 116561 | VR256X, VK8WM, f128mem, |
| 116562 | /* VCVTPH2DQZ256rr */ |
| 116563 | VR256X, VR128X, |
| 116564 | /* VCVTPH2DQZ256rrk */ |
| 116565 | VR256X, VR256X, VK8WM, VR128X, |
| 116566 | /* VCVTPH2DQZ256rrkz */ |
| 116567 | VR256X, VK8WM, VR128X, |
| 116568 | /* VCVTPH2DQZrm */ |
| 116569 | VR512, f256mem, |
| 116570 | /* VCVTPH2DQZrmb */ |
| 116571 | VR512, f16mem, |
| 116572 | /* VCVTPH2DQZrmbk */ |
| 116573 | VR512, VR512, VK16WM, f16mem, |
| 116574 | /* VCVTPH2DQZrmbkz */ |
| 116575 | VR512, VK16WM, f16mem, |
| 116576 | /* VCVTPH2DQZrmk */ |
| 116577 | VR512, VR512, VK16WM, f256mem, |
| 116578 | /* VCVTPH2DQZrmkz */ |
| 116579 | VR512, VK16WM, f256mem, |
| 116580 | /* VCVTPH2DQZrr */ |
| 116581 | VR512, VR256X, |
| 116582 | /* VCVTPH2DQZrrb */ |
| 116583 | VR512, VR256X, AVX512RC, |
| 116584 | /* VCVTPH2DQZrrbk */ |
| 116585 | VR512, VR512, VK16WM, VR256X, AVX512RC, |
| 116586 | /* VCVTPH2DQZrrbkz */ |
| 116587 | VR512, VK16WM, VR256X, AVX512RC, |
| 116588 | /* VCVTPH2DQZrrk */ |
| 116589 | VR512, VR512, VK16WM, VR256X, |
| 116590 | /* VCVTPH2DQZrrkz */ |
| 116591 | VR512, VK16WM, VR256X, |
| 116592 | /* VCVTPH2PDZ128rm */ |
| 116593 | VR128X, f32mem, |
| 116594 | /* VCVTPH2PDZ128rmb */ |
| 116595 | VR128X, f16mem, |
| 116596 | /* VCVTPH2PDZ128rmbk */ |
| 116597 | VR128X, VR128X, VK2WM, f16mem, |
| 116598 | /* VCVTPH2PDZ128rmbkz */ |
| 116599 | VR128X, VK2WM, f16mem, |
| 116600 | /* VCVTPH2PDZ128rmk */ |
| 116601 | VR128X, VR128X, VK2WM, f32mem, |
| 116602 | /* VCVTPH2PDZ128rmkz */ |
| 116603 | VR128X, VK2WM, f32mem, |
| 116604 | /* VCVTPH2PDZ128rr */ |
| 116605 | VR128X, VR128X, |
| 116606 | /* VCVTPH2PDZ128rrk */ |
| 116607 | VR128X, VR128X, VK2WM, VR128X, |
| 116608 | /* VCVTPH2PDZ128rrkz */ |
| 116609 | VR128X, VK2WM, VR128X, |
| 116610 | /* VCVTPH2PDZ256rm */ |
| 116611 | VR256X, f64mem, |
| 116612 | /* VCVTPH2PDZ256rmb */ |
| 116613 | VR256X, f16mem, |
| 116614 | /* VCVTPH2PDZ256rmbk */ |
| 116615 | VR256X, VR256X, VK4WM, f16mem, |
| 116616 | /* VCVTPH2PDZ256rmbkz */ |
| 116617 | VR256X, VK4WM, f16mem, |
| 116618 | /* VCVTPH2PDZ256rmk */ |
| 116619 | VR256X, VR256X, VK4WM, f64mem, |
| 116620 | /* VCVTPH2PDZ256rmkz */ |
| 116621 | VR256X, VK4WM, f64mem, |
| 116622 | /* VCVTPH2PDZ256rr */ |
| 116623 | VR256X, VR128X, |
| 116624 | /* VCVTPH2PDZ256rrk */ |
| 116625 | VR256X, VR256X, VK4WM, VR128X, |
| 116626 | /* VCVTPH2PDZ256rrkz */ |
| 116627 | VR256X, VK4WM, VR128X, |
| 116628 | /* VCVTPH2PDZrm */ |
| 116629 | VR512, f128mem, |
| 116630 | /* VCVTPH2PDZrmb */ |
| 116631 | VR512, f16mem, |
| 116632 | /* VCVTPH2PDZrmbk */ |
| 116633 | VR512, VR512, VK8WM, f16mem, |
| 116634 | /* VCVTPH2PDZrmbkz */ |
| 116635 | VR512, VK8WM, f16mem, |
| 116636 | /* VCVTPH2PDZrmk */ |
| 116637 | VR512, VR512, VK8WM, f128mem, |
| 116638 | /* VCVTPH2PDZrmkz */ |
| 116639 | VR512, VK8WM, f128mem, |
| 116640 | /* VCVTPH2PDZrr */ |
| 116641 | VR512, VR128X, |
| 116642 | /* VCVTPH2PDZrrb */ |
| 116643 | VR512, VR128X, |
| 116644 | /* VCVTPH2PDZrrbk */ |
| 116645 | VR512, VR512, VK8WM, VR128X, |
| 116646 | /* VCVTPH2PDZrrbkz */ |
| 116647 | VR512, VK8WM, VR128X, |
| 116648 | /* VCVTPH2PDZrrk */ |
| 116649 | VR512, VR512, VK8WM, VR128X, |
| 116650 | /* VCVTPH2PDZrrkz */ |
| 116651 | VR512, VK8WM, VR128X, |
| 116652 | /* VCVTPH2PSXZ128rm */ |
| 116653 | VR128X, f64mem, |
| 116654 | /* VCVTPH2PSXZ128rmb */ |
| 116655 | VR128X, f16mem, |
| 116656 | /* VCVTPH2PSXZ128rmbk */ |
| 116657 | VR128X, VR128X, VK4WM, f16mem, |
| 116658 | /* VCVTPH2PSXZ128rmbkz */ |
| 116659 | VR128X, VK4WM, f16mem, |
| 116660 | /* VCVTPH2PSXZ128rmk */ |
| 116661 | VR128X, VR128X, VK4WM, f64mem, |
| 116662 | /* VCVTPH2PSXZ128rmkz */ |
| 116663 | VR128X, VK4WM, f64mem, |
| 116664 | /* VCVTPH2PSXZ128rr */ |
| 116665 | VR128X, VR128X, |
| 116666 | /* VCVTPH2PSXZ128rrk */ |
| 116667 | VR128X, VR128X, VK4WM, VR128X, |
| 116668 | /* VCVTPH2PSXZ128rrkz */ |
| 116669 | VR128X, VK4WM, VR128X, |
| 116670 | /* VCVTPH2PSXZ256rm */ |
| 116671 | VR256X, f128mem, |
| 116672 | /* VCVTPH2PSXZ256rmb */ |
| 116673 | VR256X, f16mem, |
| 116674 | /* VCVTPH2PSXZ256rmbk */ |
| 116675 | VR256X, VR256X, VK8WM, f16mem, |
| 116676 | /* VCVTPH2PSXZ256rmbkz */ |
| 116677 | VR256X, VK8WM, f16mem, |
| 116678 | /* VCVTPH2PSXZ256rmk */ |
| 116679 | VR256X, VR256X, VK8WM, f128mem, |
| 116680 | /* VCVTPH2PSXZ256rmkz */ |
| 116681 | VR256X, VK8WM, f128mem, |
| 116682 | /* VCVTPH2PSXZ256rr */ |
| 116683 | VR256X, VR128X, |
| 116684 | /* VCVTPH2PSXZ256rrk */ |
| 116685 | VR256X, VR256X, VK8WM, VR128X, |
| 116686 | /* VCVTPH2PSXZ256rrkz */ |
| 116687 | VR256X, VK8WM, VR128X, |
| 116688 | /* VCVTPH2PSXZrm */ |
| 116689 | VR512, f256mem, |
| 116690 | /* VCVTPH2PSXZrmb */ |
| 116691 | VR512, f16mem, |
| 116692 | /* VCVTPH2PSXZrmbk */ |
| 116693 | VR512, VR512, VK16WM, f16mem, |
| 116694 | /* VCVTPH2PSXZrmbkz */ |
| 116695 | VR512, VK16WM, f16mem, |
| 116696 | /* VCVTPH2PSXZrmk */ |
| 116697 | VR512, VR512, VK16WM, f256mem, |
| 116698 | /* VCVTPH2PSXZrmkz */ |
| 116699 | VR512, VK16WM, f256mem, |
| 116700 | /* VCVTPH2PSXZrr */ |
| 116701 | VR512, VR256X, |
| 116702 | /* VCVTPH2PSXZrrb */ |
| 116703 | VR512, VR256X, |
| 116704 | /* VCVTPH2PSXZrrbk */ |
| 116705 | VR512, VR512, VK16WM, VR256X, |
| 116706 | /* VCVTPH2PSXZrrbkz */ |
| 116707 | VR512, VK16WM, VR256X, |
| 116708 | /* VCVTPH2PSXZrrk */ |
| 116709 | VR512, VR512, VK16WM, VR256X, |
| 116710 | /* VCVTPH2PSXZrrkz */ |
| 116711 | VR512, VK16WM, VR256X, |
| 116712 | /* VCVTPH2PSYrm */ |
| 116713 | VR256, f128mem, |
| 116714 | /* VCVTPH2PSYrr */ |
| 116715 | VR256, VR128, |
| 116716 | /* VCVTPH2PSZ128rm */ |
| 116717 | VR128X, f64mem, |
| 116718 | /* VCVTPH2PSZ128rmk */ |
| 116719 | VR128X, VR128X, VK4WM, f64mem, |
| 116720 | /* VCVTPH2PSZ128rmkz */ |
| 116721 | VR128X, VK4WM, f64mem, |
| 116722 | /* VCVTPH2PSZ128rr */ |
| 116723 | VR128X, VR128X, |
| 116724 | /* VCVTPH2PSZ128rrk */ |
| 116725 | VR128X, VR128X, VK4WM, VR128X, |
| 116726 | /* VCVTPH2PSZ128rrkz */ |
| 116727 | VR128X, VK4WM, VR128X, |
| 116728 | /* VCVTPH2PSZ256rm */ |
| 116729 | VR256X, f128mem, |
| 116730 | /* VCVTPH2PSZ256rmk */ |
| 116731 | VR256X, VR256X, VK8WM, f128mem, |
| 116732 | /* VCVTPH2PSZ256rmkz */ |
| 116733 | VR256X, VK8WM, f128mem, |
| 116734 | /* VCVTPH2PSZ256rr */ |
| 116735 | VR256X, VR128X, |
| 116736 | /* VCVTPH2PSZ256rrk */ |
| 116737 | VR256X, VR256X, VK8WM, VR128X, |
| 116738 | /* VCVTPH2PSZ256rrkz */ |
| 116739 | VR256X, VK8WM, VR128X, |
| 116740 | /* VCVTPH2PSZrm */ |
| 116741 | VR512, f256mem, |
| 116742 | /* VCVTPH2PSZrmk */ |
| 116743 | VR512, VR512, VK16WM, f256mem, |
| 116744 | /* VCVTPH2PSZrmkz */ |
| 116745 | VR512, VK16WM, f256mem, |
| 116746 | /* VCVTPH2PSZrr */ |
| 116747 | VR512, VR256X, |
| 116748 | /* VCVTPH2PSZrrb */ |
| 116749 | VR512, VR256X, |
| 116750 | /* VCVTPH2PSZrrbk */ |
| 116751 | VR512, VR512, VK16WM, VR256X, |
| 116752 | /* VCVTPH2PSZrrbkz */ |
| 116753 | VR512, VK16WM, VR256X, |
| 116754 | /* VCVTPH2PSZrrk */ |
| 116755 | VR512, VR512, VK16WM, VR256X, |
| 116756 | /* VCVTPH2PSZrrkz */ |
| 116757 | VR512, VK16WM, VR256X, |
| 116758 | /* VCVTPH2PSrm */ |
| 116759 | VR128, f64mem, |
| 116760 | /* VCVTPH2PSrr */ |
| 116761 | VR128, VR128, |
| 116762 | /* VCVTPH2QQZ128rm */ |
| 116763 | VR128X, f32mem, |
| 116764 | /* VCVTPH2QQZ128rmb */ |
| 116765 | VR128X, f16mem, |
| 116766 | /* VCVTPH2QQZ128rmbk */ |
| 116767 | VR128X, VR128X, VK2WM, f16mem, |
| 116768 | /* VCVTPH2QQZ128rmbkz */ |
| 116769 | VR128X, VK2WM, f16mem, |
| 116770 | /* VCVTPH2QQZ128rmk */ |
| 116771 | VR128X, VR128X, VK2WM, f32mem, |
| 116772 | /* VCVTPH2QQZ128rmkz */ |
| 116773 | VR128X, VK2WM, f32mem, |
| 116774 | /* VCVTPH2QQZ128rr */ |
| 116775 | VR128X, VR128X, |
| 116776 | /* VCVTPH2QQZ128rrk */ |
| 116777 | VR128X, VR128X, VK2WM, VR128X, |
| 116778 | /* VCVTPH2QQZ128rrkz */ |
| 116779 | VR128X, VK2WM, VR128X, |
| 116780 | /* VCVTPH2QQZ256rm */ |
| 116781 | VR256X, f64mem, |
| 116782 | /* VCVTPH2QQZ256rmb */ |
| 116783 | VR256X, f16mem, |
| 116784 | /* VCVTPH2QQZ256rmbk */ |
| 116785 | VR256X, VR256X, VK4WM, f16mem, |
| 116786 | /* VCVTPH2QQZ256rmbkz */ |
| 116787 | VR256X, VK4WM, f16mem, |
| 116788 | /* VCVTPH2QQZ256rmk */ |
| 116789 | VR256X, VR256X, VK4WM, f64mem, |
| 116790 | /* VCVTPH2QQZ256rmkz */ |
| 116791 | VR256X, VK4WM, f64mem, |
| 116792 | /* VCVTPH2QQZ256rr */ |
| 116793 | VR256X, VR128X, |
| 116794 | /* VCVTPH2QQZ256rrk */ |
| 116795 | VR256X, VR256X, VK4WM, VR128X, |
| 116796 | /* VCVTPH2QQZ256rrkz */ |
| 116797 | VR256X, VK4WM, VR128X, |
| 116798 | /* VCVTPH2QQZrm */ |
| 116799 | VR512, f128mem, |
| 116800 | /* VCVTPH2QQZrmb */ |
| 116801 | VR512, f16mem, |
| 116802 | /* VCVTPH2QQZrmbk */ |
| 116803 | VR512, VR512, VK8WM, f16mem, |
| 116804 | /* VCVTPH2QQZrmbkz */ |
| 116805 | VR512, VK8WM, f16mem, |
| 116806 | /* VCVTPH2QQZrmk */ |
| 116807 | VR512, VR512, VK8WM, f128mem, |
| 116808 | /* VCVTPH2QQZrmkz */ |
| 116809 | VR512, VK8WM, f128mem, |
| 116810 | /* VCVTPH2QQZrr */ |
| 116811 | VR512, VR128X, |
| 116812 | /* VCVTPH2QQZrrb */ |
| 116813 | VR512, VR128X, AVX512RC, |
| 116814 | /* VCVTPH2QQZrrbk */ |
| 116815 | VR512, VR512, VK8WM, VR128X, AVX512RC, |
| 116816 | /* VCVTPH2QQZrrbkz */ |
| 116817 | VR512, VK8WM, VR128X, AVX512RC, |
| 116818 | /* VCVTPH2QQZrrk */ |
| 116819 | VR512, VR512, VK8WM, VR128X, |
| 116820 | /* VCVTPH2QQZrrkz */ |
| 116821 | VR512, VK8WM, VR128X, |
| 116822 | /* VCVTPH2UDQZ128rm */ |
| 116823 | VR128X, f64mem, |
| 116824 | /* VCVTPH2UDQZ128rmb */ |
| 116825 | VR128X, f16mem, |
| 116826 | /* VCVTPH2UDQZ128rmbk */ |
| 116827 | VR128X, VR128X, VK4WM, f16mem, |
| 116828 | /* VCVTPH2UDQZ128rmbkz */ |
| 116829 | VR128X, VK4WM, f16mem, |
| 116830 | /* VCVTPH2UDQZ128rmk */ |
| 116831 | VR128X, VR128X, VK4WM, f64mem, |
| 116832 | /* VCVTPH2UDQZ128rmkz */ |
| 116833 | VR128X, VK4WM, f64mem, |
| 116834 | /* VCVTPH2UDQZ128rr */ |
| 116835 | VR128X, VR128X, |
| 116836 | /* VCVTPH2UDQZ128rrk */ |
| 116837 | VR128X, VR128X, VK4WM, VR128X, |
| 116838 | /* VCVTPH2UDQZ128rrkz */ |
| 116839 | VR128X, VK4WM, VR128X, |
| 116840 | /* VCVTPH2UDQZ256rm */ |
| 116841 | VR256X, f128mem, |
| 116842 | /* VCVTPH2UDQZ256rmb */ |
| 116843 | VR256X, f16mem, |
| 116844 | /* VCVTPH2UDQZ256rmbk */ |
| 116845 | VR256X, VR256X, VK8WM, f16mem, |
| 116846 | /* VCVTPH2UDQZ256rmbkz */ |
| 116847 | VR256X, VK8WM, f16mem, |
| 116848 | /* VCVTPH2UDQZ256rmk */ |
| 116849 | VR256X, VR256X, VK8WM, f128mem, |
| 116850 | /* VCVTPH2UDQZ256rmkz */ |
| 116851 | VR256X, VK8WM, f128mem, |
| 116852 | /* VCVTPH2UDQZ256rr */ |
| 116853 | VR256X, VR128X, |
| 116854 | /* VCVTPH2UDQZ256rrk */ |
| 116855 | VR256X, VR256X, VK8WM, VR128X, |
| 116856 | /* VCVTPH2UDQZ256rrkz */ |
| 116857 | VR256X, VK8WM, VR128X, |
| 116858 | /* VCVTPH2UDQZrm */ |
| 116859 | VR512, f256mem, |
| 116860 | /* VCVTPH2UDQZrmb */ |
| 116861 | VR512, f16mem, |
| 116862 | /* VCVTPH2UDQZrmbk */ |
| 116863 | VR512, VR512, VK16WM, f16mem, |
| 116864 | /* VCVTPH2UDQZrmbkz */ |
| 116865 | VR512, VK16WM, f16mem, |
| 116866 | /* VCVTPH2UDQZrmk */ |
| 116867 | VR512, VR512, VK16WM, f256mem, |
| 116868 | /* VCVTPH2UDQZrmkz */ |
| 116869 | VR512, VK16WM, f256mem, |
| 116870 | /* VCVTPH2UDQZrr */ |
| 116871 | VR512, VR256X, |
| 116872 | /* VCVTPH2UDQZrrb */ |
| 116873 | VR512, VR256X, AVX512RC, |
| 116874 | /* VCVTPH2UDQZrrbk */ |
| 116875 | VR512, VR512, VK16WM, VR256X, AVX512RC, |
| 116876 | /* VCVTPH2UDQZrrbkz */ |
| 116877 | VR512, VK16WM, VR256X, AVX512RC, |
| 116878 | /* VCVTPH2UDQZrrk */ |
| 116879 | VR512, VR512, VK16WM, VR256X, |
| 116880 | /* VCVTPH2UDQZrrkz */ |
| 116881 | VR512, VK16WM, VR256X, |
| 116882 | /* VCVTPH2UQQZ128rm */ |
| 116883 | VR128X, f32mem, |
| 116884 | /* VCVTPH2UQQZ128rmb */ |
| 116885 | VR128X, f16mem, |
| 116886 | /* VCVTPH2UQQZ128rmbk */ |
| 116887 | VR128X, VR128X, VK2WM, f16mem, |
| 116888 | /* VCVTPH2UQQZ128rmbkz */ |
| 116889 | VR128X, VK2WM, f16mem, |
| 116890 | /* VCVTPH2UQQZ128rmk */ |
| 116891 | VR128X, VR128X, VK2WM, f32mem, |
| 116892 | /* VCVTPH2UQQZ128rmkz */ |
| 116893 | VR128X, VK2WM, f32mem, |
| 116894 | /* VCVTPH2UQQZ128rr */ |
| 116895 | VR128X, VR128X, |
| 116896 | /* VCVTPH2UQQZ128rrk */ |
| 116897 | VR128X, VR128X, VK2WM, VR128X, |
| 116898 | /* VCVTPH2UQQZ128rrkz */ |
| 116899 | VR128X, VK2WM, VR128X, |
| 116900 | /* VCVTPH2UQQZ256rm */ |
| 116901 | VR256X, f64mem, |
| 116902 | /* VCVTPH2UQQZ256rmb */ |
| 116903 | VR256X, f16mem, |
| 116904 | /* VCVTPH2UQQZ256rmbk */ |
| 116905 | VR256X, VR256X, VK4WM, f16mem, |
| 116906 | /* VCVTPH2UQQZ256rmbkz */ |
| 116907 | VR256X, VK4WM, f16mem, |
| 116908 | /* VCVTPH2UQQZ256rmk */ |
| 116909 | VR256X, VR256X, VK4WM, f64mem, |
| 116910 | /* VCVTPH2UQQZ256rmkz */ |
| 116911 | VR256X, VK4WM, f64mem, |
| 116912 | /* VCVTPH2UQQZ256rr */ |
| 116913 | VR256X, VR128X, |
| 116914 | /* VCVTPH2UQQZ256rrk */ |
| 116915 | VR256X, VR256X, VK4WM, VR128X, |
| 116916 | /* VCVTPH2UQQZ256rrkz */ |
| 116917 | VR256X, VK4WM, VR128X, |
| 116918 | /* VCVTPH2UQQZrm */ |
| 116919 | VR512, f128mem, |
| 116920 | /* VCVTPH2UQQZrmb */ |
| 116921 | VR512, f16mem, |
| 116922 | /* VCVTPH2UQQZrmbk */ |
| 116923 | VR512, VR512, VK8WM, f16mem, |
| 116924 | /* VCVTPH2UQQZrmbkz */ |
| 116925 | VR512, VK8WM, f16mem, |
| 116926 | /* VCVTPH2UQQZrmk */ |
| 116927 | VR512, VR512, VK8WM, f128mem, |
| 116928 | /* VCVTPH2UQQZrmkz */ |
| 116929 | VR512, VK8WM, f128mem, |
| 116930 | /* VCVTPH2UQQZrr */ |
| 116931 | VR512, VR128X, |
| 116932 | /* VCVTPH2UQQZrrb */ |
| 116933 | VR512, VR128X, AVX512RC, |
| 116934 | /* VCVTPH2UQQZrrbk */ |
| 116935 | VR512, VR512, VK8WM, VR128X, AVX512RC, |
| 116936 | /* VCVTPH2UQQZrrbkz */ |
| 116937 | VR512, VK8WM, VR128X, AVX512RC, |
| 116938 | /* VCVTPH2UQQZrrk */ |
| 116939 | VR512, VR512, VK8WM, VR128X, |
| 116940 | /* VCVTPH2UQQZrrkz */ |
| 116941 | VR512, VK8WM, VR128X, |
| 116942 | /* VCVTPH2UWZ128rm */ |
| 116943 | VR128X, f128mem, |
| 116944 | /* VCVTPH2UWZ128rmb */ |
| 116945 | VR128X, f16mem, |
| 116946 | /* VCVTPH2UWZ128rmbk */ |
| 116947 | VR128X, VR128X, VK8WM, f16mem, |
| 116948 | /* VCVTPH2UWZ128rmbkz */ |
| 116949 | VR128X, VK8WM, f16mem, |
| 116950 | /* VCVTPH2UWZ128rmk */ |
| 116951 | VR128X, VR128X, VK8WM, f128mem, |
| 116952 | /* VCVTPH2UWZ128rmkz */ |
| 116953 | VR128X, VK8WM, f128mem, |
| 116954 | /* VCVTPH2UWZ128rr */ |
| 116955 | VR128X, VR128X, |
| 116956 | /* VCVTPH2UWZ128rrk */ |
| 116957 | VR128X, VR128X, VK8WM, VR128X, |
| 116958 | /* VCVTPH2UWZ128rrkz */ |
| 116959 | VR128X, VK8WM, VR128X, |
| 116960 | /* VCVTPH2UWZ256rm */ |
| 116961 | VR256X, f256mem, |
| 116962 | /* VCVTPH2UWZ256rmb */ |
| 116963 | VR256X, f16mem, |
| 116964 | /* VCVTPH2UWZ256rmbk */ |
| 116965 | VR256X, VR256X, VK16WM, f16mem, |
| 116966 | /* VCVTPH2UWZ256rmbkz */ |
| 116967 | VR256X, VK16WM, f16mem, |
| 116968 | /* VCVTPH2UWZ256rmk */ |
| 116969 | VR256X, VR256X, VK16WM, f256mem, |
| 116970 | /* VCVTPH2UWZ256rmkz */ |
| 116971 | VR256X, VK16WM, f256mem, |
| 116972 | /* VCVTPH2UWZ256rr */ |
| 116973 | VR256X, VR256X, |
| 116974 | /* VCVTPH2UWZ256rrk */ |
| 116975 | VR256X, VR256X, VK16WM, VR256X, |
| 116976 | /* VCVTPH2UWZ256rrkz */ |
| 116977 | VR256X, VK16WM, VR256X, |
| 116978 | /* VCVTPH2UWZrm */ |
| 116979 | VR512, f512mem, |
| 116980 | /* VCVTPH2UWZrmb */ |
| 116981 | VR512, f16mem, |
| 116982 | /* VCVTPH2UWZrmbk */ |
| 116983 | VR512, VR512, VK32WM, f16mem, |
| 116984 | /* VCVTPH2UWZrmbkz */ |
| 116985 | VR512, VK32WM, f16mem, |
| 116986 | /* VCVTPH2UWZrmk */ |
| 116987 | VR512, VR512, VK32WM, f512mem, |
| 116988 | /* VCVTPH2UWZrmkz */ |
| 116989 | VR512, VK32WM, f512mem, |
| 116990 | /* VCVTPH2UWZrr */ |
| 116991 | VR512, VR512, |
| 116992 | /* VCVTPH2UWZrrb */ |
| 116993 | VR512, VR512, AVX512RC, |
| 116994 | /* VCVTPH2UWZrrbk */ |
| 116995 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 116996 | /* VCVTPH2UWZrrbkz */ |
| 116997 | VR512, VK32WM, VR512, AVX512RC, |
| 116998 | /* VCVTPH2UWZrrk */ |
| 116999 | VR512, VR512, VK32WM, VR512, |
| 117000 | /* VCVTPH2UWZrrkz */ |
| 117001 | VR512, VK32WM, VR512, |
| 117002 | /* VCVTPH2WZ128rm */ |
| 117003 | VR128X, f128mem, |
| 117004 | /* VCVTPH2WZ128rmb */ |
| 117005 | VR128X, f16mem, |
| 117006 | /* VCVTPH2WZ128rmbk */ |
| 117007 | VR128X, VR128X, VK8WM, f16mem, |
| 117008 | /* VCVTPH2WZ128rmbkz */ |
| 117009 | VR128X, VK8WM, f16mem, |
| 117010 | /* VCVTPH2WZ128rmk */ |
| 117011 | VR128X, VR128X, VK8WM, f128mem, |
| 117012 | /* VCVTPH2WZ128rmkz */ |
| 117013 | VR128X, VK8WM, f128mem, |
| 117014 | /* VCVTPH2WZ128rr */ |
| 117015 | VR128X, VR128X, |
| 117016 | /* VCVTPH2WZ128rrk */ |
| 117017 | VR128X, VR128X, VK8WM, VR128X, |
| 117018 | /* VCVTPH2WZ128rrkz */ |
| 117019 | VR128X, VK8WM, VR128X, |
| 117020 | /* VCVTPH2WZ256rm */ |
| 117021 | VR256X, f256mem, |
| 117022 | /* VCVTPH2WZ256rmb */ |
| 117023 | VR256X, f16mem, |
| 117024 | /* VCVTPH2WZ256rmbk */ |
| 117025 | VR256X, VR256X, VK16WM, f16mem, |
| 117026 | /* VCVTPH2WZ256rmbkz */ |
| 117027 | VR256X, VK16WM, f16mem, |
| 117028 | /* VCVTPH2WZ256rmk */ |
| 117029 | VR256X, VR256X, VK16WM, f256mem, |
| 117030 | /* VCVTPH2WZ256rmkz */ |
| 117031 | VR256X, VK16WM, f256mem, |
| 117032 | /* VCVTPH2WZ256rr */ |
| 117033 | VR256X, VR256X, |
| 117034 | /* VCVTPH2WZ256rrk */ |
| 117035 | VR256X, VR256X, VK16WM, VR256X, |
| 117036 | /* VCVTPH2WZ256rrkz */ |
| 117037 | VR256X, VK16WM, VR256X, |
| 117038 | /* VCVTPH2WZrm */ |
| 117039 | VR512, f512mem, |
| 117040 | /* VCVTPH2WZrmb */ |
| 117041 | VR512, f16mem, |
| 117042 | /* VCVTPH2WZrmbk */ |
| 117043 | VR512, VR512, VK32WM, f16mem, |
| 117044 | /* VCVTPH2WZrmbkz */ |
| 117045 | VR512, VK32WM, f16mem, |
| 117046 | /* VCVTPH2WZrmk */ |
| 117047 | VR512, VR512, VK32WM, f512mem, |
| 117048 | /* VCVTPH2WZrmkz */ |
| 117049 | VR512, VK32WM, f512mem, |
| 117050 | /* VCVTPH2WZrr */ |
| 117051 | VR512, VR512, |
| 117052 | /* VCVTPH2WZrrb */ |
| 117053 | VR512, VR512, AVX512RC, |
| 117054 | /* VCVTPH2WZrrbk */ |
| 117055 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 117056 | /* VCVTPH2WZrrbkz */ |
| 117057 | VR512, VK32WM, VR512, AVX512RC, |
| 117058 | /* VCVTPH2WZrrk */ |
| 117059 | VR512, VR512, VK32WM, VR512, |
| 117060 | /* VCVTPH2WZrrkz */ |
| 117061 | VR512, VK32WM, VR512, |
| 117062 | /* VCVTPS2DQYrm */ |
| 117063 | VR256, f256mem, |
| 117064 | /* VCVTPS2DQYrr */ |
| 117065 | VR256, VR256, |
| 117066 | /* VCVTPS2DQZ128rm */ |
| 117067 | VR128X, f128mem, |
| 117068 | /* VCVTPS2DQZ128rmb */ |
| 117069 | VR128X, f32mem, |
| 117070 | /* VCVTPS2DQZ128rmbk */ |
| 117071 | VR128X, VR128X, VK4WM, f32mem, |
| 117072 | /* VCVTPS2DQZ128rmbkz */ |
| 117073 | VR128X, VK4WM, f32mem, |
| 117074 | /* VCVTPS2DQZ128rmk */ |
| 117075 | VR128X, VR128X, VK4WM, f128mem, |
| 117076 | /* VCVTPS2DQZ128rmkz */ |
| 117077 | VR128X, VK4WM, f128mem, |
| 117078 | /* VCVTPS2DQZ128rr */ |
| 117079 | VR128X, VR128X, |
| 117080 | /* VCVTPS2DQZ128rrk */ |
| 117081 | VR128X, VR128X, VK4WM, VR128X, |
| 117082 | /* VCVTPS2DQZ128rrkz */ |
| 117083 | VR128X, VK4WM, VR128X, |
| 117084 | /* VCVTPS2DQZ256rm */ |
| 117085 | VR256X, f256mem, |
| 117086 | /* VCVTPS2DQZ256rmb */ |
| 117087 | VR256X, f32mem, |
| 117088 | /* VCVTPS2DQZ256rmbk */ |
| 117089 | VR256X, VR256X, VK8WM, f32mem, |
| 117090 | /* VCVTPS2DQZ256rmbkz */ |
| 117091 | VR256X, VK8WM, f32mem, |
| 117092 | /* VCVTPS2DQZ256rmk */ |
| 117093 | VR256X, VR256X, VK8WM, f256mem, |
| 117094 | /* VCVTPS2DQZ256rmkz */ |
| 117095 | VR256X, VK8WM, f256mem, |
| 117096 | /* VCVTPS2DQZ256rr */ |
| 117097 | VR256X, VR256X, |
| 117098 | /* VCVTPS2DQZ256rrk */ |
| 117099 | VR256X, VR256X, VK8WM, VR256X, |
| 117100 | /* VCVTPS2DQZ256rrkz */ |
| 117101 | VR256X, VK8WM, VR256X, |
| 117102 | /* VCVTPS2DQZrm */ |
| 117103 | VR512, f512mem, |
| 117104 | /* VCVTPS2DQZrmb */ |
| 117105 | VR512, f32mem, |
| 117106 | /* VCVTPS2DQZrmbk */ |
| 117107 | VR512, VR512, VK16WM, f32mem, |
| 117108 | /* VCVTPS2DQZrmbkz */ |
| 117109 | VR512, VK16WM, f32mem, |
| 117110 | /* VCVTPS2DQZrmk */ |
| 117111 | VR512, VR512, VK16WM, f512mem, |
| 117112 | /* VCVTPS2DQZrmkz */ |
| 117113 | VR512, VK16WM, f512mem, |
| 117114 | /* VCVTPS2DQZrr */ |
| 117115 | VR512, VR512, |
| 117116 | /* VCVTPS2DQZrrb */ |
| 117117 | VR512, VR512, AVX512RC, |
| 117118 | /* VCVTPS2DQZrrbk */ |
| 117119 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 117120 | /* VCVTPS2DQZrrbkz */ |
| 117121 | VR512, VK16WM, VR512, AVX512RC, |
| 117122 | /* VCVTPS2DQZrrk */ |
| 117123 | VR512, VR512, VK16WM, VR512, |
| 117124 | /* VCVTPS2DQZrrkz */ |
| 117125 | VR512, VK16WM, VR512, |
| 117126 | /* VCVTPS2DQrm */ |
| 117127 | VR128, f128mem, |
| 117128 | /* VCVTPS2DQrr */ |
| 117129 | VR128, VR128, |
| 117130 | /* VCVTPS2PDYrm */ |
| 117131 | VR256, f128mem, |
| 117132 | /* VCVTPS2PDYrr */ |
| 117133 | VR256, VR128, |
| 117134 | /* VCVTPS2PDZ128rm */ |
| 117135 | VR128X, f64mem, |
| 117136 | /* VCVTPS2PDZ128rmb */ |
| 117137 | VR128X, f32mem, |
| 117138 | /* VCVTPS2PDZ128rmbk */ |
| 117139 | VR128X, VR128X, VK2WM, f32mem, |
| 117140 | /* VCVTPS2PDZ128rmbkz */ |
| 117141 | VR128X, VK2WM, f32mem, |
| 117142 | /* VCVTPS2PDZ128rmk */ |
| 117143 | VR128X, VR128X, VK2WM, f64mem, |
| 117144 | /* VCVTPS2PDZ128rmkz */ |
| 117145 | VR128X, VK2WM, f64mem, |
| 117146 | /* VCVTPS2PDZ128rr */ |
| 117147 | VR128X, VR128X, |
| 117148 | /* VCVTPS2PDZ128rrk */ |
| 117149 | VR128X, VR128X, VK2WM, VR128X, |
| 117150 | /* VCVTPS2PDZ128rrkz */ |
| 117151 | VR128X, VK2WM, VR128X, |
| 117152 | /* VCVTPS2PDZ256rm */ |
| 117153 | VR256X, f128mem, |
| 117154 | /* VCVTPS2PDZ256rmb */ |
| 117155 | VR256X, f32mem, |
| 117156 | /* VCVTPS2PDZ256rmbk */ |
| 117157 | VR256X, VR256X, VK4WM, f32mem, |
| 117158 | /* VCVTPS2PDZ256rmbkz */ |
| 117159 | VR256X, VK4WM, f32mem, |
| 117160 | /* VCVTPS2PDZ256rmk */ |
| 117161 | VR256X, VR256X, VK4WM, f128mem, |
| 117162 | /* VCVTPS2PDZ256rmkz */ |
| 117163 | VR256X, VK4WM, f128mem, |
| 117164 | /* VCVTPS2PDZ256rr */ |
| 117165 | VR256X, VR128X, |
| 117166 | /* VCVTPS2PDZ256rrk */ |
| 117167 | VR256X, VR256X, VK4WM, VR128X, |
| 117168 | /* VCVTPS2PDZ256rrkz */ |
| 117169 | VR256X, VK4WM, VR128X, |
| 117170 | /* VCVTPS2PDZrm */ |
| 117171 | VR512, f256mem, |
| 117172 | /* VCVTPS2PDZrmb */ |
| 117173 | VR512, f32mem, |
| 117174 | /* VCVTPS2PDZrmbk */ |
| 117175 | VR512, VR512, VK8WM, f32mem, |
| 117176 | /* VCVTPS2PDZrmbkz */ |
| 117177 | VR512, VK8WM, f32mem, |
| 117178 | /* VCVTPS2PDZrmk */ |
| 117179 | VR512, VR512, VK8WM, f256mem, |
| 117180 | /* VCVTPS2PDZrmkz */ |
| 117181 | VR512, VK8WM, f256mem, |
| 117182 | /* VCVTPS2PDZrr */ |
| 117183 | VR512, VR256X, |
| 117184 | /* VCVTPS2PDZrrb */ |
| 117185 | VR512, VR256X, |
| 117186 | /* VCVTPS2PDZrrbk */ |
| 117187 | VR512, VR512, VK8WM, VR256X, |
| 117188 | /* VCVTPS2PDZrrbkz */ |
| 117189 | VR512, VK8WM, VR256X, |
| 117190 | /* VCVTPS2PDZrrk */ |
| 117191 | VR512, VR512, VK8WM, VR256X, |
| 117192 | /* VCVTPS2PDZrrkz */ |
| 117193 | VR512, VK8WM, VR256X, |
| 117194 | /* VCVTPS2PDrm */ |
| 117195 | VR128, f64mem, |
| 117196 | /* VCVTPS2PDrr */ |
| 117197 | VR128, VR128, |
| 117198 | /* VCVTPS2PHXZ128rm */ |
| 117199 | VR128X, f128mem, |
| 117200 | /* VCVTPS2PHXZ128rmb */ |
| 117201 | VR128X, f32mem, |
| 117202 | /* VCVTPS2PHXZ128rmbk */ |
| 117203 | VR128X, VR128X, VK4WM, f32mem, |
| 117204 | /* VCVTPS2PHXZ128rmbkz */ |
| 117205 | VR128X, VK4WM, f32mem, |
| 117206 | /* VCVTPS2PHXZ128rmk */ |
| 117207 | VR128X, VR128X, VK4WM, f128mem, |
| 117208 | /* VCVTPS2PHXZ128rmkz */ |
| 117209 | VR128X, VK4WM, f128mem, |
| 117210 | /* VCVTPS2PHXZ128rr */ |
| 117211 | VR128X, VR128X, |
| 117212 | /* VCVTPS2PHXZ128rrk */ |
| 117213 | VR128X, VR128X, VK4WM, VR128X, |
| 117214 | /* VCVTPS2PHXZ128rrkz */ |
| 117215 | VR128X, VK4WM, VR128X, |
| 117216 | /* VCVTPS2PHXZ256rm */ |
| 117217 | VR128X, f256mem, |
| 117218 | /* VCVTPS2PHXZ256rmb */ |
| 117219 | VR128X, f32mem, |
| 117220 | /* VCVTPS2PHXZ256rmbk */ |
| 117221 | VR128X, VR128X, VK8WM, f32mem, |
| 117222 | /* VCVTPS2PHXZ256rmbkz */ |
| 117223 | VR128X, VK8WM, f32mem, |
| 117224 | /* VCVTPS2PHXZ256rmk */ |
| 117225 | VR128X, VR128X, VK8WM, f256mem, |
| 117226 | /* VCVTPS2PHXZ256rmkz */ |
| 117227 | VR128X, VK8WM, f256mem, |
| 117228 | /* VCVTPS2PHXZ256rr */ |
| 117229 | VR128X, VR256X, |
| 117230 | /* VCVTPS2PHXZ256rrk */ |
| 117231 | VR128X, VR128X, VK8WM, VR256X, |
| 117232 | /* VCVTPS2PHXZ256rrkz */ |
| 117233 | VR128X, VK8WM, VR256X, |
| 117234 | /* VCVTPS2PHXZrm */ |
| 117235 | VR256X, f512mem, |
| 117236 | /* VCVTPS2PHXZrmb */ |
| 117237 | VR256X, f32mem, |
| 117238 | /* VCVTPS2PHXZrmbk */ |
| 117239 | VR256X, VR256X, VK16WM, f32mem, |
| 117240 | /* VCVTPS2PHXZrmbkz */ |
| 117241 | VR256X, VK16WM, f32mem, |
| 117242 | /* VCVTPS2PHXZrmk */ |
| 117243 | VR256X, VR256X, VK16WM, f512mem, |
| 117244 | /* VCVTPS2PHXZrmkz */ |
| 117245 | VR256X, VK16WM, f512mem, |
| 117246 | /* VCVTPS2PHXZrr */ |
| 117247 | VR256X, VR512, |
| 117248 | /* VCVTPS2PHXZrrb */ |
| 117249 | VR256X, VR512, AVX512RC, |
| 117250 | /* VCVTPS2PHXZrrbk */ |
| 117251 | VR256X, VR256X, VK16WM, VR512, AVX512RC, |
| 117252 | /* VCVTPS2PHXZrrbkz */ |
| 117253 | VR256X, VK16WM, VR512, AVX512RC, |
| 117254 | /* VCVTPS2PHXZrrk */ |
| 117255 | VR256X, VR256X, VK16WM, VR512, |
| 117256 | /* VCVTPS2PHXZrrkz */ |
| 117257 | VR256X, VK16WM, VR512, |
| 117258 | /* VCVTPS2PHYmr */ |
| 117259 | f128mem, VR256, i32u8imm, |
| 117260 | /* VCVTPS2PHYrr */ |
| 117261 | VR128, VR256, i32u8imm, |
| 117262 | /* VCVTPS2PHZ128mr */ |
| 117263 | f64mem, VR128X, i32u8imm, |
| 117264 | /* VCVTPS2PHZ128mrk */ |
| 117265 | f64mem, VK8WM, VR128X, i32u8imm, |
| 117266 | /* VCVTPS2PHZ128rr */ |
| 117267 | VR128X, VR128X, i32u8imm, |
| 117268 | /* VCVTPS2PHZ128rrk */ |
| 117269 | VR128X, VR128X, VK4WM, VR128X, i32u8imm, |
| 117270 | /* VCVTPS2PHZ128rrkz */ |
| 117271 | VR128X, VK4WM, VR128X, i32u8imm, |
| 117272 | /* VCVTPS2PHZ256mr */ |
| 117273 | f128mem, VR256X, i32u8imm, |
| 117274 | /* VCVTPS2PHZ256mrk */ |
| 117275 | f128mem, VK8WM, VR256X, i32u8imm, |
| 117276 | /* VCVTPS2PHZ256rr */ |
| 117277 | VR128X, VR256X, i32u8imm, |
| 117278 | /* VCVTPS2PHZ256rrk */ |
| 117279 | VR128X, VR128X, VK8WM, VR256X, i32u8imm, |
| 117280 | /* VCVTPS2PHZ256rrkz */ |
| 117281 | VR128X, VK8WM, VR256X, i32u8imm, |
| 117282 | /* VCVTPS2PHZmr */ |
| 117283 | f256mem, VR512, i32u8imm, |
| 117284 | /* VCVTPS2PHZmrk */ |
| 117285 | f256mem, VK16WM, VR512, i32u8imm, |
| 117286 | /* VCVTPS2PHZrr */ |
| 117287 | VR256X, VR512, i32u8imm, |
| 117288 | /* VCVTPS2PHZrrb */ |
| 117289 | VR256X, VR512, i32u8imm, |
| 117290 | /* VCVTPS2PHZrrbk */ |
| 117291 | VR256X, VR256X, VK16WM, VR512, i32u8imm, |
| 117292 | /* VCVTPS2PHZrrbkz */ |
| 117293 | VR256X, VK16WM, VR512, i32u8imm, |
| 117294 | /* VCVTPS2PHZrrk */ |
| 117295 | VR256X, VR256X, VK16WM, VR512, i32u8imm, |
| 117296 | /* VCVTPS2PHZrrkz */ |
| 117297 | VR256X, VK16WM, VR512, i32u8imm, |
| 117298 | /* VCVTPS2PHmr */ |
| 117299 | f64mem, VR128, i32u8imm, |
| 117300 | /* VCVTPS2PHrr */ |
| 117301 | VR128, VR128, i32u8imm, |
| 117302 | /* VCVTPS2QQZ128rm */ |
| 117303 | VR128X, f64mem, |
| 117304 | /* VCVTPS2QQZ128rmb */ |
| 117305 | VR128X, f32mem, |
| 117306 | /* VCVTPS2QQZ128rmbk */ |
| 117307 | VR128X, VR128X, VK2WM, f32mem, |
| 117308 | /* VCVTPS2QQZ128rmbkz */ |
| 117309 | VR128X, VK2WM, f32mem, |
| 117310 | /* VCVTPS2QQZ128rmk */ |
| 117311 | VR128X, VR128X, VK2WM, f64mem, |
| 117312 | /* VCVTPS2QQZ128rmkz */ |
| 117313 | VR128X, VK2WM, f64mem, |
| 117314 | /* VCVTPS2QQZ128rr */ |
| 117315 | VR128X, VR128X, |
| 117316 | /* VCVTPS2QQZ128rrk */ |
| 117317 | VR128X, VR128X, VK2WM, VR128X, |
| 117318 | /* VCVTPS2QQZ128rrkz */ |
| 117319 | VR128X, VK2WM, VR128X, |
| 117320 | /* VCVTPS2QQZ256rm */ |
| 117321 | VR256X, f128mem, |
| 117322 | /* VCVTPS2QQZ256rmb */ |
| 117323 | VR256X, f32mem, |
| 117324 | /* VCVTPS2QQZ256rmbk */ |
| 117325 | VR256X, VR256X, VK4WM, f32mem, |
| 117326 | /* VCVTPS2QQZ256rmbkz */ |
| 117327 | VR256X, VK4WM, f32mem, |
| 117328 | /* VCVTPS2QQZ256rmk */ |
| 117329 | VR256X, VR256X, VK4WM, f128mem, |
| 117330 | /* VCVTPS2QQZ256rmkz */ |
| 117331 | VR256X, VK4WM, f128mem, |
| 117332 | /* VCVTPS2QQZ256rr */ |
| 117333 | VR256X, VR128X, |
| 117334 | /* VCVTPS2QQZ256rrk */ |
| 117335 | VR256X, VR256X, VK4WM, VR128X, |
| 117336 | /* VCVTPS2QQZ256rrkz */ |
| 117337 | VR256X, VK4WM, VR128X, |
| 117338 | /* VCVTPS2QQZrm */ |
| 117339 | VR512, f256mem, |
| 117340 | /* VCVTPS2QQZrmb */ |
| 117341 | VR512, f32mem, |
| 117342 | /* VCVTPS2QQZrmbk */ |
| 117343 | VR512, VR512, VK8WM, f32mem, |
| 117344 | /* VCVTPS2QQZrmbkz */ |
| 117345 | VR512, VK8WM, f32mem, |
| 117346 | /* VCVTPS2QQZrmk */ |
| 117347 | VR512, VR512, VK8WM, f256mem, |
| 117348 | /* VCVTPS2QQZrmkz */ |
| 117349 | VR512, VK8WM, f256mem, |
| 117350 | /* VCVTPS2QQZrr */ |
| 117351 | VR512, VR256X, |
| 117352 | /* VCVTPS2QQZrrb */ |
| 117353 | VR512, VR256X, AVX512RC, |
| 117354 | /* VCVTPS2QQZrrbk */ |
| 117355 | VR512, VR512, VK8WM, VR256X, AVX512RC, |
| 117356 | /* VCVTPS2QQZrrbkz */ |
| 117357 | VR512, VK8WM, VR256X, AVX512RC, |
| 117358 | /* VCVTPS2QQZrrk */ |
| 117359 | VR512, VR512, VK8WM, VR256X, |
| 117360 | /* VCVTPS2QQZrrkz */ |
| 117361 | VR512, VK8WM, VR256X, |
| 117362 | /* VCVTPS2UDQZ128rm */ |
| 117363 | VR128X, f128mem, |
| 117364 | /* VCVTPS2UDQZ128rmb */ |
| 117365 | VR128X, f32mem, |
| 117366 | /* VCVTPS2UDQZ128rmbk */ |
| 117367 | VR128X, VR128X, VK4WM, f32mem, |
| 117368 | /* VCVTPS2UDQZ128rmbkz */ |
| 117369 | VR128X, VK4WM, f32mem, |
| 117370 | /* VCVTPS2UDQZ128rmk */ |
| 117371 | VR128X, VR128X, VK4WM, f128mem, |
| 117372 | /* VCVTPS2UDQZ128rmkz */ |
| 117373 | VR128X, VK4WM, f128mem, |
| 117374 | /* VCVTPS2UDQZ128rr */ |
| 117375 | VR128X, VR128X, |
| 117376 | /* VCVTPS2UDQZ128rrk */ |
| 117377 | VR128X, VR128X, VK4WM, VR128X, |
| 117378 | /* VCVTPS2UDQZ128rrkz */ |
| 117379 | VR128X, VK4WM, VR128X, |
| 117380 | /* VCVTPS2UDQZ256rm */ |
| 117381 | VR256X, f256mem, |
| 117382 | /* VCVTPS2UDQZ256rmb */ |
| 117383 | VR256X, f32mem, |
| 117384 | /* VCVTPS2UDQZ256rmbk */ |
| 117385 | VR256X, VR256X, VK8WM, f32mem, |
| 117386 | /* VCVTPS2UDQZ256rmbkz */ |
| 117387 | VR256X, VK8WM, f32mem, |
| 117388 | /* VCVTPS2UDQZ256rmk */ |
| 117389 | VR256X, VR256X, VK8WM, f256mem, |
| 117390 | /* VCVTPS2UDQZ256rmkz */ |
| 117391 | VR256X, VK8WM, f256mem, |
| 117392 | /* VCVTPS2UDQZ256rr */ |
| 117393 | VR256X, VR256X, |
| 117394 | /* VCVTPS2UDQZ256rrk */ |
| 117395 | VR256X, VR256X, VK8WM, VR256X, |
| 117396 | /* VCVTPS2UDQZ256rrkz */ |
| 117397 | VR256X, VK8WM, VR256X, |
| 117398 | /* VCVTPS2UDQZrm */ |
| 117399 | VR512, f512mem, |
| 117400 | /* VCVTPS2UDQZrmb */ |
| 117401 | VR512, f32mem, |
| 117402 | /* VCVTPS2UDQZrmbk */ |
| 117403 | VR512, VR512, VK16WM, f32mem, |
| 117404 | /* VCVTPS2UDQZrmbkz */ |
| 117405 | VR512, VK16WM, f32mem, |
| 117406 | /* VCVTPS2UDQZrmk */ |
| 117407 | VR512, VR512, VK16WM, f512mem, |
| 117408 | /* VCVTPS2UDQZrmkz */ |
| 117409 | VR512, VK16WM, f512mem, |
| 117410 | /* VCVTPS2UDQZrr */ |
| 117411 | VR512, VR512, |
| 117412 | /* VCVTPS2UDQZrrb */ |
| 117413 | VR512, VR512, AVX512RC, |
| 117414 | /* VCVTPS2UDQZrrbk */ |
| 117415 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 117416 | /* VCVTPS2UDQZrrbkz */ |
| 117417 | VR512, VK16WM, VR512, AVX512RC, |
| 117418 | /* VCVTPS2UDQZrrk */ |
| 117419 | VR512, VR512, VK16WM, VR512, |
| 117420 | /* VCVTPS2UDQZrrkz */ |
| 117421 | VR512, VK16WM, VR512, |
| 117422 | /* VCVTPS2UQQZ128rm */ |
| 117423 | VR128X, f64mem, |
| 117424 | /* VCVTPS2UQQZ128rmb */ |
| 117425 | VR128X, f32mem, |
| 117426 | /* VCVTPS2UQQZ128rmbk */ |
| 117427 | VR128X, VR128X, VK2WM, f32mem, |
| 117428 | /* VCVTPS2UQQZ128rmbkz */ |
| 117429 | VR128X, VK2WM, f32mem, |
| 117430 | /* VCVTPS2UQQZ128rmk */ |
| 117431 | VR128X, VR128X, VK2WM, f64mem, |
| 117432 | /* VCVTPS2UQQZ128rmkz */ |
| 117433 | VR128X, VK2WM, f64mem, |
| 117434 | /* VCVTPS2UQQZ128rr */ |
| 117435 | VR128X, VR128X, |
| 117436 | /* VCVTPS2UQQZ128rrk */ |
| 117437 | VR128X, VR128X, VK2WM, VR128X, |
| 117438 | /* VCVTPS2UQQZ128rrkz */ |
| 117439 | VR128X, VK2WM, VR128X, |
| 117440 | /* VCVTPS2UQQZ256rm */ |
| 117441 | VR256X, f128mem, |
| 117442 | /* VCVTPS2UQQZ256rmb */ |
| 117443 | VR256X, f32mem, |
| 117444 | /* VCVTPS2UQQZ256rmbk */ |
| 117445 | VR256X, VR256X, VK4WM, f32mem, |
| 117446 | /* VCVTPS2UQQZ256rmbkz */ |
| 117447 | VR256X, VK4WM, f32mem, |
| 117448 | /* VCVTPS2UQQZ256rmk */ |
| 117449 | VR256X, VR256X, VK4WM, f128mem, |
| 117450 | /* VCVTPS2UQQZ256rmkz */ |
| 117451 | VR256X, VK4WM, f128mem, |
| 117452 | /* VCVTPS2UQQZ256rr */ |
| 117453 | VR256X, VR128X, |
| 117454 | /* VCVTPS2UQQZ256rrk */ |
| 117455 | VR256X, VR256X, VK4WM, VR128X, |
| 117456 | /* VCVTPS2UQQZ256rrkz */ |
| 117457 | VR256X, VK4WM, VR128X, |
| 117458 | /* VCVTPS2UQQZrm */ |
| 117459 | VR512, f256mem, |
| 117460 | /* VCVTPS2UQQZrmb */ |
| 117461 | VR512, f32mem, |
| 117462 | /* VCVTPS2UQQZrmbk */ |
| 117463 | VR512, VR512, VK8WM, f32mem, |
| 117464 | /* VCVTPS2UQQZrmbkz */ |
| 117465 | VR512, VK8WM, f32mem, |
| 117466 | /* VCVTPS2UQQZrmk */ |
| 117467 | VR512, VR512, VK8WM, f256mem, |
| 117468 | /* VCVTPS2UQQZrmkz */ |
| 117469 | VR512, VK8WM, f256mem, |
| 117470 | /* VCVTPS2UQQZrr */ |
| 117471 | VR512, VR256X, |
| 117472 | /* VCVTPS2UQQZrrb */ |
| 117473 | VR512, VR256X, AVX512RC, |
| 117474 | /* VCVTPS2UQQZrrbk */ |
| 117475 | VR512, VR512, VK8WM, VR256X, AVX512RC, |
| 117476 | /* VCVTPS2UQQZrrbkz */ |
| 117477 | VR512, VK8WM, VR256X, AVX512RC, |
| 117478 | /* VCVTPS2UQQZrrk */ |
| 117479 | VR512, VR512, VK8WM, VR256X, |
| 117480 | /* VCVTPS2UQQZrrkz */ |
| 117481 | VR512, VK8WM, VR256X, |
| 117482 | /* VCVTQQ2PDZ128rm */ |
| 117483 | VR128X, i128mem, |
| 117484 | /* VCVTQQ2PDZ128rmb */ |
| 117485 | VR128X, i64mem, |
| 117486 | /* VCVTQQ2PDZ128rmbk */ |
| 117487 | VR128X, VR128X, VK2WM, i64mem, |
| 117488 | /* VCVTQQ2PDZ128rmbkz */ |
| 117489 | VR128X, VK2WM, i64mem, |
| 117490 | /* VCVTQQ2PDZ128rmk */ |
| 117491 | VR128X, VR128X, VK2WM, i128mem, |
| 117492 | /* VCVTQQ2PDZ128rmkz */ |
| 117493 | VR128X, VK2WM, i128mem, |
| 117494 | /* VCVTQQ2PDZ128rr */ |
| 117495 | VR128X, VR128X, |
| 117496 | /* VCVTQQ2PDZ128rrk */ |
| 117497 | VR128X, VR128X, VK2WM, VR128X, |
| 117498 | /* VCVTQQ2PDZ128rrkz */ |
| 117499 | VR128X, VK2WM, VR128X, |
| 117500 | /* VCVTQQ2PDZ256rm */ |
| 117501 | VR256X, i256mem, |
| 117502 | /* VCVTQQ2PDZ256rmb */ |
| 117503 | VR256X, i64mem, |
| 117504 | /* VCVTQQ2PDZ256rmbk */ |
| 117505 | VR256X, VR256X, VK4WM, i64mem, |
| 117506 | /* VCVTQQ2PDZ256rmbkz */ |
| 117507 | VR256X, VK4WM, i64mem, |
| 117508 | /* VCVTQQ2PDZ256rmk */ |
| 117509 | VR256X, VR256X, VK4WM, i256mem, |
| 117510 | /* VCVTQQ2PDZ256rmkz */ |
| 117511 | VR256X, VK4WM, i256mem, |
| 117512 | /* VCVTQQ2PDZ256rr */ |
| 117513 | VR256X, VR256X, |
| 117514 | /* VCVTQQ2PDZ256rrk */ |
| 117515 | VR256X, VR256X, VK4WM, VR256X, |
| 117516 | /* VCVTQQ2PDZ256rrkz */ |
| 117517 | VR256X, VK4WM, VR256X, |
| 117518 | /* VCVTQQ2PDZrm */ |
| 117519 | VR512, i512mem, |
| 117520 | /* VCVTQQ2PDZrmb */ |
| 117521 | VR512, i64mem, |
| 117522 | /* VCVTQQ2PDZrmbk */ |
| 117523 | VR512, VR512, VK8WM, i64mem, |
| 117524 | /* VCVTQQ2PDZrmbkz */ |
| 117525 | VR512, VK8WM, i64mem, |
| 117526 | /* VCVTQQ2PDZrmk */ |
| 117527 | VR512, VR512, VK8WM, i512mem, |
| 117528 | /* VCVTQQ2PDZrmkz */ |
| 117529 | VR512, VK8WM, i512mem, |
| 117530 | /* VCVTQQ2PDZrr */ |
| 117531 | VR512, VR512, |
| 117532 | /* VCVTQQ2PDZrrb */ |
| 117533 | VR512, VR512, AVX512RC, |
| 117534 | /* VCVTQQ2PDZrrbk */ |
| 117535 | VR512, VR512, VK8WM, VR512, AVX512RC, |
| 117536 | /* VCVTQQ2PDZrrbkz */ |
| 117537 | VR512, VK8WM, VR512, AVX512RC, |
| 117538 | /* VCVTQQ2PDZrrk */ |
| 117539 | VR512, VR512, VK8WM, VR512, |
| 117540 | /* VCVTQQ2PDZrrkz */ |
| 117541 | VR512, VK8WM, VR512, |
| 117542 | /* VCVTQQ2PHZ128rm */ |
| 117543 | VR128X, i128mem, |
| 117544 | /* VCVTQQ2PHZ128rmb */ |
| 117545 | VR128X, i64mem, |
| 117546 | /* VCVTQQ2PHZ128rmbk */ |
| 117547 | VR128X, VR128X, VK2WM, i64mem, |
| 117548 | /* VCVTQQ2PHZ128rmbkz */ |
| 117549 | VR128X, VK2WM, i64mem, |
| 117550 | /* VCVTQQ2PHZ128rmk */ |
| 117551 | VR128X, VR128X, VK2WM, i128mem, |
| 117552 | /* VCVTQQ2PHZ128rmkz */ |
| 117553 | VR128X, VK2WM, i128mem, |
| 117554 | /* VCVTQQ2PHZ128rr */ |
| 117555 | VR128X, VR128X, |
| 117556 | /* VCVTQQ2PHZ128rrk */ |
| 117557 | VR128X, VR128X, VK2WM, VR128X, |
| 117558 | /* VCVTQQ2PHZ128rrkz */ |
| 117559 | VR128X, VK2WM, VR128X, |
| 117560 | /* VCVTQQ2PHZ256rm */ |
| 117561 | VR128X, i256mem, |
| 117562 | /* VCVTQQ2PHZ256rmb */ |
| 117563 | VR128X, i64mem, |
| 117564 | /* VCVTQQ2PHZ256rmbk */ |
| 117565 | VR128X, VR128X, VK4WM, i64mem, |
| 117566 | /* VCVTQQ2PHZ256rmbkz */ |
| 117567 | VR128X, VK4WM, i64mem, |
| 117568 | /* VCVTQQ2PHZ256rmk */ |
| 117569 | VR128X, VR128X, VK4WM, i256mem, |
| 117570 | /* VCVTQQ2PHZ256rmkz */ |
| 117571 | VR128X, VK4WM, i256mem, |
| 117572 | /* VCVTQQ2PHZ256rr */ |
| 117573 | VR128X, VR256X, |
| 117574 | /* VCVTQQ2PHZ256rrk */ |
| 117575 | VR128X, VR128X, VK4WM, VR256X, |
| 117576 | /* VCVTQQ2PHZ256rrkz */ |
| 117577 | VR128X, VK4WM, VR256X, |
| 117578 | /* VCVTQQ2PHZrm */ |
| 117579 | VR128X, i512mem, |
| 117580 | /* VCVTQQ2PHZrmb */ |
| 117581 | VR128X, i64mem, |
| 117582 | /* VCVTQQ2PHZrmbk */ |
| 117583 | VR128X, VR128X, VK8WM, i64mem, |
| 117584 | /* VCVTQQ2PHZrmbkz */ |
| 117585 | VR128X, VK8WM, i64mem, |
| 117586 | /* VCVTQQ2PHZrmk */ |
| 117587 | VR128X, VR128X, VK8WM, i512mem, |
| 117588 | /* VCVTQQ2PHZrmkz */ |
| 117589 | VR128X, VK8WM, i512mem, |
| 117590 | /* VCVTQQ2PHZrr */ |
| 117591 | VR128X, VR512, |
| 117592 | /* VCVTQQ2PHZrrb */ |
| 117593 | VR128X, VR512, AVX512RC, |
| 117594 | /* VCVTQQ2PHZrrbk */ |
| 117595 | VR128X, VR128X, VK8WM, VR512, AVX512RC, |
| 117596 | /* VCVTQQ2PHZrrbkz */ |
| 117597 | VR128X, VK8WM, VR512, AVX512RC, |
| 117598 | /* VCVTQQ2PHZrrk */ |
| 117599 | VR128X, VR128X, VK8WM, VR512, |
| 117600 | /* VCVTQQ2PHZrrkz */ |
| 117601 | VR128X, VK8WM, VR512, |
| 117602 | /* VCVTQQ2PSZ128rm */ |
| 117603 | VR128X, i128mem, |
| 117604 | /* VCVTQQ2PSZ128rmb */ |
| 117605 | VR128X, i64mem, |
| 117606 | /* VCVTQQ2PSZ128rmbk */ |
| 117607 | VR128X, VR128X, VK2WM, i64mem, |
| 117608 | /* VCVTQQ2PSZ128rmbkz */ |
| 117609 | VR128X, VK2WM, i64mem, |
| 117610 | /* VCVTQQ2PSZ128rmk */ |
| 117611 | VR128X, VR128X, VK2WM, i128mem, |
| 117612 | /* VCVTQQ2PSZ128rmkz */ |
| 117613 | VR128X, VK2WM, i128mem, |
| 117614 | /* VCVTQQ2PSZ128rr */ |
| 117615 | VR128X, VR128X, |
| 117616 | /* VCVTQQ2PSZ128rrk */ |
| 117617 | VR128X, VR128X, VK2WM, VR128X, |
| 117618 | /* VCVTQQ2PSZ128rrkz */ |
| 117619 | VR128X, VK2WM, VR128X, |
| 117620 | /* VCVTQQ2PSZ256rm */ |
| 117621 | VR128X, i256mem, |
| 117622 | /* VCVTQQ2PSZ256rmb */ |
| 117623 | VR128X, i64mem, |
| 117624 | /* VCVTQQ2PSZ256rmbk */ |
| 117625 | VR128X, VR128X, VK4WM, i64mem, |
| 117626 | /* VCVTQQ2PSZ256rmbkz */ |
| 117627 | VR128X, VK4WM, i64mem, |
| 117628 | /* VCVTQQ2PSZ256rmk */ |
| 117629 | VR128X, VR128X, VK4WM, i256mem, |
| 117630 | /* VCVTQQ2PSZ256rmkz */ |
| 117631 | VR128X, VK4WM, i256mem, |
| 117632 | /* VCVTQQ2PSZ256rr */ |
| 117633 | VR128X, VR256X, |
| 117634 | /* VCVTQQ2PSZ256rrk */ |
| 117635 | VR128X, VR128X, VK4WM, VR256X, |
| 117636 | /* VCVTQQ2PSZ256rrkz */ |
| 117637 | VR128X, VK4WM, VR256X, |
| 117638 | /* VCVTQQ2PSZrm */ |
| 117639 | VR256X, i512mem, |
| 117640 | /* VCVTQQ2PSZrmb */ |
| 117641 | VR256X, i64mem, |
| 117642 | /* VCVTQQ2PSZrmbk */ |
| 117643 | VR256X, VR256X, VK8WM, i64mem, |
| 117644 | /* VCVTQQ2PSZrmbkz */ |
| 117645 | VR256X, VK8WM, i64mem, |
| 117646 | /* VCVTQQ2PSZrmk */ |
| 117647 | VR256X, VR256X, VK8WM, i512mem, |
| 117648 | /* VCVTQQ2PSZrmkz */ |
| 117649 | VR256X, VK8WM, i512mem, |
| 117650 | /* VCVTQQ2PSZrr */ |
| 117651 | VR256X, VR512, |
| 117652 | /* VCVTQQ2PSZrrb */ |
| 117653 | VR256X, VR512, AVX512RC, |
| 117654 | /* VCVTQQ2PSZrrbk */ |
| 117655 | VR256X, VR256X, VK8WM, VR512, AVX512RC, |
| 117656 | /* VCVTQQ2PSZrrbkz */ |
| 117657 | VR256X, VK8WM, VR512, AVX512RC, |
| 117658 | /* VCVTQQ2PSZrrk */ |
| 117659 | VR256X, VR256X, VK8WM, VR512, |
| 117660 | /* VCVTQQ2PSZrrkz */ |
| 117661 | VR256X, VK8WM, VR512, |
| 117662 | /* VCVTSD2SHZrm */ |
| 117663 | FR16X, FR16X, f64mem, |
| 117664 | /* VCVTSD2SHZrm_Int */ |
| 117665 | VR128X, VR128X, sdmem, |
| 117666 | /* VCVTSD2SHZrm_Intk */ |
| 117667 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 117668 | /* VCVTSD2SHZrm_Intkz */ |
| 117669 | VR128X, VK1WM, VR128X, sdmem, |
| 117670 | /* VCVTSD2SHZrr */ |
| 117671 | FR16X, FR16X, FR64X, |
| 117672 | /* VCVTSD2SHZrr_Int */ |
| 117673 | VR128X, VR128X, VR128X, |
| 117674 | /* VCVTSD2SHZrr_Intk */ |
| 117675 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117676 | /* VCVTSD2SHZrr_Intkz */ |
| 117677 | VR128X, VK1WM, VR128X, VR128X, |
| 117678 | /* VCVTSD2SHZrrb_Int */ |
| 117679 | VR128X, VR128X, VR128X, AVX512RC, |
| 117680 | /* VCVTSD2SHZrrb_Intk */ |
| 117681 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117682 | /* VCVTSD2SHZrrb_Intkz */ |
| 117683 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117684 | /* VCVTSD2SI64Zrm */ |
| 117685 | GR64, f64mem, |
| 117686 | /* VCVTSD2SI64Zrm_Int */ |
| 117687 | GR64, sdmem, |
| 117688 | /* VCVTSD2SI64Zrr */ |
| 117689 | GR64, FR64X, |
| 117690 | /* VCVTSD2SI64Zrr_Int */ |
| 117691 | GR64, VR128X, |
| 117692 | /* VCVTSD2SI64Zrrb_Int */ |
| 117693 | GR64, VR128X, AVX512RC, |
| 117694 | /* VCVTSD2SI64rm */ |
| 117695 | GR64, f64mem, |
| 117696 | /* VCVTSD2SI64rm_Int */ |
| 117697 | GR64, sdmem, |
| 117698 | /* VCVTSD2SI64rr */ |
| 117699 | GR64, FR64, |
| 117700 | /* VCVTSD2SI64rr_Int */ |
| 117701 | GR64, VR128, |
| 117702 | /* VCVTSD2SIZrm */ |
| 117703 | GR32, f64mem, |
| 117704 | /* VCVTSD2SIZrm_Int */ |
| 117705 | GR32, sdmem, |
| 117706 | /* VCVTSD2SIZrr */ |
| 117707 | GR32, FR64X, |
| 117708 | /* VCVTSD2SIZrr_Int */ |
| 117709 | GR32, VR128X, |
| 117710 | /* VCVTSD2SIZrrb_Int */ |
| 117711 | GR32, VR128X, AVX512RC, |
| 117712 | /* VCVTSD2SIrm */ |
| 117713 | GR32, f64mem, |
| 117714 | /* VCVTSD2SIrm_Int */ |
| 117715 | GR32, sdmem, |
| 117716 | /* VCVTSD2SIrr */ |
| 117717 | GR32, FR64, |
| 117718 | /* VCVTSD2SIrr_Int */ |
| 117719 | GR32, VR128, |
| 117720 | /* VCVTSD2SSZrm */ |
| 117721 | FR32X, FR32X, f64mem, |
| 117722 | /* VCVTSD2SSZrm_Int */ |
| 117723 | VR128X, VR128X, sdmem, |
| 117724 | /* VCVTSD2SSZrm_Intk */ |
| 117725 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 117726 | /* VCVTSD2SSZrm_Intkz */ |
| 117727 | VR128X, VK1WM, VR128X, sdmem, |
| 117728 | /* VCVTSD2SSZrr */ |
| 117729 | FR32X, FR32X, FR64X, |
| 117730 | /* VCVTSD2SSZrr_Int */ |
| 117731 | VR128X, VR128X, VR128X, |
| 117732 | /* VCVTSD2SSZrr_Intk */ |
| 117733 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117734 | /* VCVTSD2SSZrr_Intkz */ |
| 117735 | VR128X, VK1WM, VR128X, VR128X, |
| 117736 | /* VCVTSD2SSZrrb_Int */ |
| 117737 | VR128X, VR128X, VR128X, AVX512RC, |
| 117738 | /* VCVTSD2SSZrrb_Intk */ |
| 117739 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117740 | /* VCVTSD2SSZrrb_Intkz */ |
| 117741 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117742 | /* VCVTSD2SSrm */ |
| 117743 | FR32, FR32, f64mem, |
| 117744 | /* VCVTSD2SSrm_Int */ |
| 117745 | VR128, VR128, sdmem, |
| 117746 | /* VCVTSD2SSrr */ |
| 117747 | FR32, FR32, FR64, |
| 117748 | /* VCVTSD2SSrr_Int */ |
| 117749 | VR128, VR128, VR128, |
| 117750 | /* VCVTSD2USI64Zrm_Int */ |
| 117751 | GR64, sdmem, |
| 117752 | /* VCVTSD2USI64Zrr_Int */ |
| 117753 | GR64, VR128X, |
| 117754 | /* VCVTSD2USI64Zrrb_Int */ |
| 117755 | GR64, VR128X, AVX512RC, |
| 117756 | /* VCVTSD2USIZrm_Int */ |
| 117757 | GR32, sdmem, |
| 117758 | /* VCVTSD2USIZrr_Int */ |
| 117759 | GR32, VR128X, |
| 117760 | /* VCVTSD2USIZrrb_Int */ |
| 117761 | GR32, VR128X, AVX512RC, |
| 117762 | /* VCVTSH2SDZrm */ |
| 117763 | FR64X, FR64X, f16mem, |
| 117764 | /* VCVTSH2SDZrm_Int */ |
| 117765 | VR128X, VR128X, shmem, |
| 117766 | /* VCVTSH2SDZrm_Intk */ |
| 117767 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 117768 | /* VCVTSH2SDZrm_Intkz */ |
| 117769 | VR128X, VK1WM, VR128X, shmem, |
| 117770 | /* VCVTSH2SDZrr */ |
| 117771 | FR64X, FR64X, FR16X, |
| 117772 | /* VCVTSH2SDZrr_Int */ |
| 117773 | VR128X, VR128X, VR128X, |
| 117774 | /* VCVTSH2SDZrr_Intk */ |
| 117775 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117776 | /* VCVTSH2SDZrr_Intkz */ |
| 117777 | VR128X, VK1WM, VR128X, VR128X, |
| 117778 | /* VCVTSH2SDZrrb_Int */ |
| 117779 | VR128X, VR128X, VR128X, |
| 117780 | /* VCVTSH2SDZrrb_Intk */ |
| 117781 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117782 | /* VCVTSH2SDZrrb_Intkz */ |
| 117783 | VR128X, VK1WM, VR128X, VR128X, |
| 117784 | /* VCVTSH2SI64Zrm_Int */ |
| 117785 | GR64, shmem, |
| 117786 | /* VCVTSH2SI64Zrr_Int */ |
| 117787 | GR64, VR128X, |
| 117788 | /* VCVTSH2SI64Zrrb_Int */ |
| 117789 | GR64, VR128X, AVX512RC, |
| 117790 | /* VCVTSH2SIZrm_Int */ |
| 117791 | GR32, shmem, |
| 117792 | /* VCVTSH2SIZrr_Int */ |
| 117793 | GR32, VR128X, |
| 117794 | /* VCVTSH2SIZrrb_Int */ |
| 117795 | GR32, VR128X, AVX512RC, |
| 117796 | /* VCVTSH2SSZrm */ |
| 117797 | FR32X, FR32X, f16mem, |
| 117798 | /* VCVTSH2SSZrm_Int */ |
| 117799 | VR128X, VR128X, shmem, |
| 117800 | /* VCVTSH2SSZrm_Intk */ |
| 117801 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 117802 | /* VCVTSH2SSZrm_Intkz */ |
| 117803 | VR128X, VK1WM, VR128X, shmem, |
| 117804 | /* VCVTSH2SSZrr */ |
| 117805 | FR32X, FR32X, FR16X, |
| 117806 | /* VCVTSH2SSZrr_Int */ |
| 117807 | VR128X, VR128X, VR128X, |
| 117808 | /* VCVTSH2SSZrr_Intk */ |
| 117809 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117810 | /* VCVTSH2SSZrr_Intkz */ |
| 117811 | VR128X, VK1WM, VR128X, VR128X, |
| 117812 | /* VCVTSH2SSZrrb_Int */ |
| 117813 | VR128X, VR128X, VR128X, |
| 117814 | /* VCVTSH2SSZrrb_Intk */ |
| 117815 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117816 | /* VCVTSH2SSZrrb_Intkz */ |
| 117817 | VR128X, VK1WM, VR128X, VR128X, |
| 117818 | /* VCVTSH2USI64Zrm_Int */ |
| 117819 | GR64, shmem, |
| 117820 | /* VCVTSH2USI64Zrr_Int */ |
| 117821 | GR64, VR128X, |
| 117822 | /* VCVTSH2USI64Zrrb_Int */ |
| 117823 | GR64, VR128X, AVX512RC, |
| 117824 | /* VCVTSH2USIZrm_Int */ |
| 117825 | GR32, shmem, |
| 117826 | /* VCVTSH2USIZrr_Int */ |
| 117827 | GR32, VR128X, |
| 117828 | /* VCVTSH2USIZrrb_Int */ |
| 117829 | GR32, VR128X, AVX512RC, |
| 117830 | /* VCVTSI2SDZrm */ |
| 117831 | FR64X, FR64X, i32mem, |
| 117832 | /* VCVTSI2SDZrm_Int */ |
| 117833 | VR128X, VR128X, i32mem, |
| 117834 | /* VCVTSI2SDZrr */ |
| 117835 | FR64X, FR64X, GR32, |
| 117836 | /* VCVTSI2SDZrr_Int */ |
| 117837 | VR128X, VR128X, GR32, |
| 117838 | /* VCVTSI2SDrm */ |
| 117839 | FR64, FR64, i32mem, |
| 117840 | /* VCVTSI2SDrm_Int */ |
| 117841 | VR128, VR128, i32mem, |
| 117842 | /* VCVTSI2SDrr */ |
| 117843 | FR64, FR64, GR32, |
| 117844 | /* VCVTSI2SDrr_Int */ |
| 117845 | VR128, VR128, GR32, |
| 117846 | /* VCVTSI2SHZrm */ |
| 117847 | FR16X, FR16X, i32mem, |
| 117848 | /* VCVTSI2SHZrm_Int */ |
| 117849 | VR128X, VR128X, i32mem, |
| 117850 | /* VCVTSI2SHZrr */ |
| 117851 | FR16X, FR16X, GR32, |
| 117852 | /* VCVTSI2SHZrr_Int */ |
| 117853 | VR128X, VR128X, GR32, |
| 117854 | /* VCVTSI2SHZrrb_Int */ |
| 117855 | VR128X, VR128X, GR32, AVX512RC, |
| 117856 | /* VCVTSI2SSZrm */ |
| 117857 | FR32X, FR32X, i32mem, |
| 117858 | /* VCVTSI2SSZrm_Int */ |
| 117859 | VR128X, VR128X, i32mem, |
| 117860 | /* VCVTSI2SSZrr */ |
| 117861 | FR32X, FR32X, GR32, |
| 117862 | /* VCVTSI2SSZrr_Int */ |
| 117863 | VR128X, VR128X, GR32, |
| 117864 | /* VCVTSI2SSZrrb_Int */ |
| 117865 | VR128X, VR128X, GR32, AVX512RC, |
| 117866 | /* VCVTSI2SSrm */ |
| 117867 | FR32, FR32, i32mem, |
| 117868 | /* VCVTSI2SSrm_Int */ |
| 117869 | VR128, VR128, i32mem, |
| 117870 | /* VCVTSI2SSrr */ |
| 117871 | FR32, FR32, GR32, |
| 117872 | /* VCVTSI2SSrr_Int */ |
| 117873 | VR128, VR128, GR32, |
| 117874 | /* VCVTSI642SDZrm */ |
| 117875 | FR64X, FR64X, i64mem, |
| 117876 | /* VCVTSI642SDZrm_Int */ |
| 117877 | VR128X, VR128X, i64mem, |
| 117878 | /* VCVTSI642SDZrr */ |
| 117879 | FR64X, FR64X, GR64, |
| 117880 | /* VCVTSI642SDZrr_Int */ |
| 117881 | VR128X, VR128X, GR64, |
| 117882 | /* VCVTSI642SDZrrb_Int */ |
| 117883 | VR128X, VR128X, GR64, AVX512RC, |
| 117884 | /* VCVTSI642SDrm */ |
| 117885 | FR64, FR64, i64mem, |
| 117886 | /* VCVTSI642SDrm_Int */ |
| 117887 | VR128, VR128, i64mem, |
| 117888 | /* VCVTSI642SDrr */ |
| 117889 | FR64, FR64, GR64, |
| 117890 | /* VCVTSI642SDrr_Int */ |
| 117891 | VR128, VR128, GR64, |
| 117892 | /* VCVTSI642SHZrm */ |
| 117893 | FR16X, FR16X, i64mem, |
| 117894 | /* VCVTSI642SHZrm_Int */ |
| 117895 | VR128X, VR128X, i64mem, |
| 117896 | /* VCVTSI642SHZrr */ |
| 117897 | FR16X, FR16X, GR64, |
| 117898 | /* VCVTSI642SHZrr_Int */ |
| 117899 | VR128X, VR128X, GR64, |
| 117900 | /* VCVTSI642SHZrrb_Int */ |
| 117901 | VR128X, VR128X, GR64, AVX512RC, |
| 117902 | /* VCVTSI642SSZrm */ |
| 117903 | FR32X, FR32X, i64mem, |
| 117904 | /* VCVTSI642SSZrm_Int */ |
| 117905 | VR128X, VR128X, i64mem, |
| 117906 | /* VCVTSI642SSZrr */ |
| 117907 | FR32X, FR32X, GR64, |
| 117908 | /* VCVTSI642SSZrr_Int */ |
| 117909 | VR128X, VR128X, GR64, |
| 117910 | /* VCVTSI642SSZrrb_Int */ |
| 117911 | VR128X, VR128X, GR64, AVX512RC, |
| 117912 | /* VCVTSI642SSrm */ |
| 117913 | FR32, FR32, i64mem, |
| 117914 | /* VCVTSI642SSrm_Int */ |
| 117915 | VR128, VR128, i64mem, |
| 117916 | /* VCVTSI642SSrr */ |
| 117917 | FR32, FR32, GR64, |
| 117918 | /* VCVTSI642SSrr_Int */ |
| 117919 | VR128, VR128, GR64, |
| 117920 | /* VCVTSS2SDZrm */ |
| 117921 | FR64X, FR64X, f32mem, |
| 117922 | /* VCVTSS2SDZrm_Int */ |
| 117923 | VR128X, VR128X, ssmem, |
| 117924 | /* VCVTSS2SDZrm_Intk */ |
| 117925 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 117926 | /* VCVTSS2SDZrm_Intkz */ |
| 117927 | VR128X, VK1WM, VR128X, ssmem, |
| 117928 | /* VCVTSS2SDZrr */ |
| 117929 | FR64X, FR64X, FR32X, |
| 117930 | /* VCVTSS2SDZrr_Int */ |
| 117931 | VR128X, VR128X, VR128X, |
| 117932 | /* VCVTSS2SDZrr_Intk */ |
| 117933 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117934 | /* VCVTSS2SDZrr_Intkz */ |
| 117935 | VR128X, VK1WM, VR128X, VR128X, |
| 117936 | /* VCVTSS2SDZrrb_Int */ |
| 117937 | VR128X, VR128X, VR128X, |
| 117938 | /* VCVTSS2SDZrrb_Intk */ |
| 117939 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117940 | /* VCVTSS2SDZrrb_Intkz */ |
| 117941 | VR128X, VK1WM, VR128X, VR128X, |
| 117942 | /* VCVTSS2SDrm */ |
| 117943 | FR64, FR64, f32mem, |
| 117944 | /* VCVTSS2SDrm_Int */ |
| 117945 | VR128, VR128, ssmem, |
| 117946 | /* VCVTSS2SDrr */ |
| 117947 | FR64, FR64, FR32, |
| 117948 | /* VCVTSS2SDrr_Int */ |
| 117949 | VR128, VR128, VR128, |
| 117950 | /* VCVTSS2SHZrm */ |
| 117951 | FR16X, FR16X, f32mem, |
| 117952 | /* VCVTSS2SHZrm_Int */ |
| 117953 | VR128X, VR128X, ssmem, |
| 117954 | /* VCVTSS2SHZrm_Intk */ |
| 117955 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 117956 | /* VCVTSS2SHZrm_Intkz */ |
| 117957 | VR128X, VK1WM, VR128X, ssmem, |
| 117958 | /* VCVTSS2SHZrr */ |
| 117959 | FR16X, FR16X, FR32X, |
| 117960 | /* VCVTSS2SHZrr_Int */ |
| 117961 | VR128X, VR128X, VR128X, |
| 117962 | /* VCVTSS2SHZrr_Intk */ |
| 117963 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 117964 | /* VCVTSS2SHZrr_Intkz */ |
| 117965 | VR128X, VK1WM, VR128X, VR128X, |
| 117966 | /* VCVTSS2SHZrrb_Int */ |
| 117967 | VR128X, VR128X, VR128X, AVX512RC, |
| 117968 | /* VCVTSS2SHZrrb_Intk */ |
| 117969 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117970 | /* VCVTSS2SHZrrb_Intkz */ |
| 117971 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 117972 | /* VCVTSS2SI64Zrm */ |
| 117973 | GR64, f32mem, |
| 117974 | /* VCVTSS2SI64Zrm_Int */ |
| 117975 | GR64, ssmem, |
| 117976 | /* VCVTSS2SI64Zrr */ |
| 117977 | GR64, FR32X, |
| 117978 | /* VCVTSS2SI64Zrr_Int */ |
| 117979 | GR64, VR128X, |
| 117980 | /* VCVTSS2SI64Zrrb_Int */ |
| 117981 | GR64, VR128X, AVX512RC, |
| 117982 | /* VCVTSS2SI64rm */ |
| 117983 | GR64, f32mem, |
| 117984 | /* VCVTSS2SI64rm_Int */ |
| 117985 | GR64, ssmem, |
| 117986 | /* VCVTSS2SI64rr */ |
| 117987 | GR64, FR32, |
| 117988 | /* VCVTSS2SI64rr_Int */ |
| 117989 | GR64, VR128, |
| 117990 | /* VCVTSS2SIZrm */ |
| 117991 | GR32, f32mem, |
| 117992 | /* VCVTSS2SIZrm_Int */ |
| 117993 | GR32, ssmem, |
| 117994 | /* VCVTSS2SIZrr */ |
| 117995 | GR32, FR32X, |
| 117996 | /* VCVTSS2SIZrr_Int */ |
| 117997 | GR32, VR128X, |
| 117998 | /* VCVTSS2SIZrrb_Int */ |
| 117999 | GR32, VR128X, AVX512RC, |
| 118000 | /* VCVTSS2SIrm */ |
| 118001 | GR32, f32mem, |
| 118002 | /* VCVTSS2SIrm_Int */ |
| 118003 | GR32, ssmem, |
| 118004 | /* VCVTSS2SIrr */ |
| 118005 | GR32, FR32, |
| 118006 | /* VCVTSS2SIrr_Int */ |
| 118007 | GR32, VR128, |
| 118008 | /* VCVTSS2USI64Zrm_Int */ |
| 118009 | GR64, ssmem, |
| 118010 | /* VCVTSS2USI64Zrr_Int */ |
| 118011 | GR64, VR128X, |
| 118012 | /* VCVTSS2USI64Zrrb_Int */ |
| 118013 | GR64, VR128X, AVX512RC, |
| 118014 | /* VCVTSS2USIZrm_Int */ |
| 118015 | GR32, ssmem, |
| 118016 | /* VCVTSS2USIZrr_Int */ |
| 118017 | GR32, VR128X, |
| 118018 | /* VCVTSS2USIZrrb_Int */ |
| 118019 | GR32, VR128X, AVX512RC, |
| 118020 | /* VCVTTPD2DQYrm */ |
| 118021 | VR128, f256mem, |
| 118022 | /* VCVTTPD2DQYrr */ |
| 118023 | VR128, VR256, |
| 118024 | /* VCVTTPD2DQZ128rm */ |
| 118025 | VR128X, f128mem, |
| 118026 | /* VCVTTPD2DQZ128rmb */ |
| 118027 | VR128X, f64mem, |
| 118028 | /* VCVTTPD2DQZ128rmbk */ |
| 118029 | VR128X, VR128X, VK2WM, f64mem, |
| 118030 | /* VCVTTPD2DQZ128rmbkz */ |
| 118031 | VR128X, VK2WM, f64mem, |
| 118032 | /* VCVTTPD2DQZ128rmk */ |
| 118033 | VR128X, VR128X, VK2WM, f128mem, |
| 118034 | /* VCVTTPD2DQZ128rmkz */ |
| 118035 | VR128X, VK2WM, f128mem, |
| 118036 | /* VCVTTPD2DQZ128rr */ |
| 118037 | VR128X, VR128X, |
| 118038 | /* VCVTTPD2DQZ128rrk */ |
| 118039 | VR128X, VR128X, VK2WM, VR128X, |
| 118040 | /* VCVTTPD2DQZ128rrkz */ |
| 118041 | VR128X, VK2WM, VR128X, |
| 118042 | /* VCVTTPD2DQZ256rm */ |
| 118043 | VR128X, f256mem, |
| 118044 | /* VCVTTPD2DQZ256rmb */ |
| 118045 | VR128X, f64mem, |
| 118046 | /* VCVTTPD2DQZ256rmbk */ |
| 118047 | VR128X, VR128X, VK4WM, f64mem, |
| 118048 | /* VCVTTPD2DQZ256rmbkz */ |
| 118049 | VR128X, VK4WM, f64mem, |
| 118050 | /* VCVTTPD2DQZ256rmk */ |
| 118051 | VR128X, VR128X, VK4WM, f256mem, |
| 118052 | /* VCVTTPD2DQZ256rmkz */ |
| 118053 | VR128X, VK4WM, f256mem, |
| 118054 | /* VCVTTPD2DQZ256rr */ |
| 118055 | VR128X, VR256X, |
| 118056 | /* VCVTTPD2DQZ256rrk */ |
| 118057 | VR128X, VR128X, VK4WM, VR256X, |
| 118058 | /* VCVTTPD2DQZ256rrkz */ |
| 118059 | VR128X, VK4WM, VR256X, |
| 118060 | /* VCVTTPD2DQZrm */ |
| 118061 | VR256X, f512mem, |
| 118062 | /* VCVTTPD2DQZrmb */ |
| 118063 | VR256X, f64mem, |
| 118064 | /* VCVTTPD2DQZrmbk */ |
| 118065 | VR256X, VR256X, VK8WM, f64mem, |
| 118066 | /* VCVTTPD2DQZrmbkz */ |
| 118067 | VR256X, VK8WM, f64mem, |
| 118068 | /* VCVTTPD2DQZrmk */ |
| 118069 | VR256X, VR256X, VK8WM, f512mem, |
| 118070 | /* VCVTTPD2DQZrmkz */ |
| 118071 | VR256X, VK8WM, f512mem, |
| 118072 | /* VCVTTPD2DQZrr */ |
| 118073 | VR256X, VR512, |
| 118074 | /* VCVTTPD2DQZrrb */ |
| 118075 | VR256X, VR512, |
| 118076 | /* VCVTTPD2DQZrrbk */ |
| 118077 | VR256X, VR256X, VK8WM, VR512, |
| 118078 | /* VCVTTPD2DQZrrbkz */ |
| 118079 | VR256X, VK8WM, VR512, |
| 118080 | /* VCVTTPD2DQZrrk */ |
| 118081 | VR256X, VR256X, VK8WM, VR512, |
| 118082 | /* VCVTTPD2DQZrrkz */ |
| 118083 | VR256X, VK8WM, VR512, |
| 118084 | /* VCVTTPD2DQrm */ |
| 118085 | VR128, f128mem, |
| 118086 | /* VCVTTPD2DQrr */ |
| 118087 | VR128, VR128, |
| 118088 | /* VCVTTPD2QQZ128rm */ |
| 118089 | VR128X, f128mem, |
| 118090 | /* VCVTTPD2QQZ128rmb */ |
| 118091 | VR128X, f64mem, |
| 118092 | /* VCVTTPD2QQZ128rmbk */ |
| 118093 | VR128X, VR128X, VK2WM, f64mem, |
| 118094 | /* VCVTTPD2QQZ128rmbkz */ |
| 118095 | VR128X, VK2WM, f64mem, |
| 118096 | /* VCVTTPD2QQZ128rmk */ |
| 118097 | VR128X, VR128X, VK2WM, f128mem, |
| 118098 | /* VCVTTPD2QQZ128rmkz */ |
| 118099 | VR128X, VK2WM, f128mem, |
| 118100 | /* VCVTTPD2QQZ128rr */ |
| 118101 | VR128X, VR128X, |
| 118102 | /* VCVTTPD2QQZ128rrk */ |
| 118103 | VR128X, VR128X, VK2WM, VR128X, |
| 118104 | /* VCVTTPD2QQZ128rrkz */ |
| 118105 | VR128X, VK2WM, VR128X, |
| 118106 | /* VCVTTPD2QQZ256rm */ |
| 118107 | VR256X, f256mem, |
| 118108 | /* VCVTTPD2QQZ256rmb */ |
| 118109 | VR256X, f64mem, |
| 118110 | /* VCVTTPD2QQZ256rmbk */ |
| 118111 | VR256X, VR256X, VK4WM, f64mem, |
| 118112 | /* VCVTTPD2QQZ256rmbkz */ |
| 118113 | VR256X, VK4WM, f64mem, |
| 118114 | /* VCVTTPD2QQZ256rmk */ |
| 118115 | VR256X, VR256X, VK4WM, f256mem, |
| 118116 | /* VCVTTPD2QQZ256rmkz */ |
| 118117 | VR256X, VK4WM, f256mem, |
| 118118 | /* VCVTTPD2QQZ256rr */ |
| 118119 | VR256X, VR256X, |
| 118120 | /* VCVTTPD2QQZ256rrk */ |
| 118121 | VR256X, VR256X, VK4WM, VR256X, |
| 118122 | /* VCVTTPD2QQZ256rrkz */ |
| 118123 | VR256X, VK4WM, VR256X, |
| 118124 | /* VCVTTPD2QQZrm */ |
| 118125 | VR512, f512mem, |
| 118126 | /* VCVTTPD2QQZrmb */ |
| 118127 | VR512, f64mem, |
| 118128 | /* VCVTTPD2QQZrmbk */ |
| 118129 | VR512, VR512, VK8WM, f64mem, |
| 118130 | /* VCVTTPD2QQZrmbkz */ |
| 118131 | VR512, VK8WM, f64mem, |
| 118132 | /* VCVTTPD2QQZrmk */ |
| 118133 | VR512, VR512, VK8WM, f512mem, |
| 118134 | /* VCVTTPD2QQZrmkz */ |
| 118135 | VR512, VK8WM, f512mem, |
| 118136 | /* VCVTTPD2QQZrr */ |
| 118137 | VR512, VR512, |
| 118138 | /* VCVTTPD2QQZrrb */ |
| 118139 | VR512, VR512, |
| 118140 | /* VCVTTPD2QQZrrbk */ |
| 118141 | VR512, VR512, VK8WM, VR512, |
| 118142 | /* VCVTTPD2QQZrrbkz */ |
| 118143 | VR512, VK8WM, VR512, |
| 118144 | /* VCVTTPD2QQZrrk */ |
| 118145 | VR512, VR512, VK8WM, VR512, |
| 118146 | /* VCVTTPD2QQZrrkz */ |
| 118147 | VR512, VK8WM, VR512, |
| 118148 | /* VCVTTPD2UDQZ128rm */ |
| 118149 | VR128X, f128mem, |
| 118150 | /* VCVTTPD2UDQZ128rmb */ |
| 118151 | VR128X, f64mem, |
| 118152 | /* VCVTTPD2UDQZ128rmbk */ |
| 118153 | VR128X, VR128X, VK2WM, f64mem, |
| 118154 | /* VCVTTPD2UDQZ128rmbkz */ |
| 118155 | VR128X, VK2WM, f64mem, |
| 118156 | /* VCVTTPD2UDQZ128rmk */ |
| 118157 | VR128X, VR128X, VK2WM, f128mem, |
| 118158 | /* VCVTTPD2UDQZ128rmkz */ |
| 118159 | VR128X, VK2WM, f128mem, |
| 118160 | /* VCVTTPD2UDQZ128rr */ |
| 118161 | VR128X, VR128X, |
| 118162 | /* VCVTTPD2UDQZ128rrk */ |
| 118163 | VR128X, VR128X, VK2WM, VR128X, |
| 118164 | /* VCVTTPD2UDQZ128rrkz */ |
| 118165 | VR128X, VK2WM, VR128X, |
| 118166 | /* VCVTTPD2UDQZ256rm */ |
| 118167 | VR128X, f256mem, |
| 118168 | /* VCVTTPD2UDQZ256rmb */ |
| 118169 | VR128X, f64mem, |
| 118170 | /* VCVTTPD2UDQZ256rmbk */ |
| 118171 | VR128X, VR128X, VK4WM, f64mem, |
| 118172 | /* VCVTTPD2UDQZ256rmbkz */ |
| 118173 | VR128X, VK4WM, f64mem, |
| 118174 | /* VCVTTPD2UDQZ256rmk */ |
| 118175 | VR128X, VR128X, VK4WM, f256mem, |
| 118176 | /* VCVTTPD2UDQZ256rmkz */ |
| 118177 | VR128X, VK4WM, f256mem, |
| 118178 | /* VCVTTPD2UDQZ256rr */ |
| 118179 | VR128X, VR256X, |
| 118180 | /* VCVTTPD2UDQZ256rrk */ |
| 118181 | VR128X, VR128X, VK4WM, VR256X, |
| 118182 | /* VCVTTPD2UDQZ256rrkz */ |
| 118183 | VR128X, VK4WM, VR256X, |
| 118184 | /* VCVTTPD2UDQZrm */ |
| 118185 | VR256X, f512mem, |
| 118186 | /* VCVTTPD2UDQZrmb */ |
| 118187 | VR256X, f64mem, |
| 118188 | /* VCVTTPD2UDQZrmbk */ |
| 118189 | VR256X, VR256X, VK8WM, f64mem, |
| 118190 | /* VCVTTPD2UDQZrmbkz */ |
| 118191 | VR256X, VK8WM, f64mem, |
| 118192 | /* VCVTTPD2UDQZrmk */ |
| 118193 | VR256X, VR256X, VK8WM, f512mem, |
| 118194 | /* VCVTTPD2UDQZrmkz */ |
| 118195 | VR256X, VK8WM, f512mem, |
| 118196 | /* VCVTTPD2UDQZrr */ |
| 118197 | VR256X, VR512, |
| 118198 | /* VCVTTPD2UDQZrrb */ |
| 118199 | VR256X, VR512, |
| 118200 | /* VCVTTPD2UDQZrrbk */ |
| 118201 | VR256X, VR256X, VK8WM, VR512, |
| 118202 | /* VCVTTPD2UDQZrrbkz */ |
| 118203 | VR256X, VK8WM, VR512, |
| 118204 | /* VCVTTPD2UDQZrrk */ |
| 118205 | VR256X, VR256X, VK8WM, VR512, |
| 118206 | /* VCVTTPD2UDQZrrkz */ |
| 118207 | VR256X, VK8WM, VR512, |
| 118208 | /* VCVTTPD2UQQZ128rm */ |
| 118209 | VR128X, f128mem, |
| 118210 | /* VCVTTPD2UQQZ128rmb */ |
| 118211 | VR128X, f64mem, |
| 118212 | /* VCVTTPD2UQQZ128rmbk */ |
| 118213 | VR128X, VR128X, VK2WM, f64mem, |
| 118214 | /* VCVTTPD2UQQZ128rmbkz */ |
| 118215 | VR128X, VK2WM, f64mem, |
| 118216 | /* VCVTTPD2UQQZ128rmk */ |
| 118217 | VR128X, VR128X, VK2WM, f128mem, |
| 118218 | /* VCVTTPD2UQQZ128rmkz */ |
| 118219 | VR128X, VK2WM, f128mem, |
| 118220 | /* VCVTTPD2UQQZ128rr */ |
| 118221 | VR128X, VR128X, |
| 118222 | /* VCVTTPD2UQQZ128rrk */ |
| 118223 | VR128X, VR128X, VK2WM, VR128X, |
| 118224 | /* VCVTTPD2UQQZ128rrkz */ |
| 118225 | VR128X, VK2WM, VR128X, |
| 118226 | /* VCVTTPD2UQQZ256rm */ |
| 118227 | VR256X, f256mem, |
| 118228 | /* VCVTTPD2UQQZ256rmb */ |
| 118229 | VR256X, f64mem, |
| 118230 | /* VCVTTPD2UQQZ256rmbk */ |
| 118231 | VR256X, VR256X, VK4WM, f64mem, |
| 118232 | /* VCVTTPD2UQQZ256rmbkz */ |
| 118233 | VR256X, VK4WM, f64mem, |
| 118234 | /* VCVTTPD2UQQZ256rmk */ |
| 118235 | VR256X, VR256X, VK4WM, f256mem, |
| 118236 | /* VCVTTPD2UQQZ256rmkz */ |
| 118237 | VR256X, VK4WM, f256mem, |
| 118238 | /* VCVTTPD2UQQZ256rr */ |
| 118239 | VR256X, VR256X, |
| 118240 | /* VCVTTPD2UQQZ256rrk */ |
| 118241 | VR256X, VR256X, VK4WM, VR256X, |
| 118242 | /* VCVTTPD2UQQZ256rrkz */ |
| 118243 | VR256X, VK4WM, VR256X, |
| 118244 | /* VCVTTPD2UQQZrm */ |
| 118245 | VR512, f512mem, |
| 118246 | /* VCVTTPD2UQQZrmb */ |
| 118247 | VR512, f64mem, |
| 118248 | /* VCVTTPD2UQQZrmbk */ |
| 118249 | VR512, VR512, VK8WM, f64mem, |
| 118250 | /* VCVTTPD2UQQZrmbkz */ |
| 118251 | VR512, VK8WM, f64mem, |
| 118252 | /* VCVTTPD2UQQZrmk */ |
| 118253 | VR512, VR512, VK8WM, f512mem, |
| 118254 | /* VCVTTPD2UQQZrmkz */ |
| 118255 | VR512, VK8WM, f512mem, |
| 118256 | /* VCVTTPD2UQQZrr */ |
| 118257 | VR512, VR512, |
| 118258 | /* VCVTTPD2UQQZrrb */ |
| 118259 | VR512, VR512, |
| 118260 | /* VCVTTPD2UQQZrrbk */ |
| 118261 | VR512, VR512, VK8WM, VR512, |
| 118262 | /* VCVTTPD2UQQZrrbkz */ |
| 118263 | VR512, VK8WM, VR512, |
| 118264 | /* VCVTTPD2UQQZrrk */ |
| 118265 | VR512, VR512, VK8WM, VR512, |
| 118266 | /* VCVTTPD2UQQZrrkz */ |
| 118267 | VR512, VK8WM, VR512, |
| 118268 | /* VCVTTPH2DQZ128rm */ |
| 118269 | VR128X, f64mem, |
| 118270 | /* VCVTTPH2DQZ128rmb */ |
| 118271 | VR128X, f16mem, |
| 118272 | /* VCVTTPH2DQZ128rmbk */ |
| 118273 | VR128X, VR128X, VK4WM, f16mem, |
| 118274 | /* VCVTTPH2DQZ128rmbkz */ |
| 118275 | VR128X, VK4WM, f16mem, |
| 118276 | /* VCVTTPH2DQZ128rmk */ |
| 118277 | VR128X, VR128X, VK4WM, f64mem, |
| 118278 | /* VCVTTPH2DQZ128rmkz */ |
| 118279 | VR128X, VK4WM, f64mem, |
| 118280 | /* VCVTTPH2DQZ128rr */ |
| 118281 | VR128X, VR128X, |
| 118282 | /* VCVTTPH2DQZ128rrk */ |
| 118283 | VR128X, VR128X, VK4WM, VR128X, |
| 118284 | /* VCVTTPH2DQZ128rrkz */ |
| 118285 | VR128X, VK4WM, VR128X, |
| 118286 | /* VCVTTPH2DQZ256rm */ |
| 118287 | VR256X, f128mem, |
| 118288 | /* VCVTTPH2DQZ256rmb */ |
| 118289 | VR256X, f16mem, |
| 118290 | /* VCVTTPH2DQZ256rmbk */ |
| 118291 | VR256X, VR256X, VK8WM, f16mem, |
| 118292 | /* VCVTTPH2DQZ256rmbkz */ |
| 118293 | VR256X, VK8WM, f16mem, |
| 118294 | /* VCVTTPH2DQZ256rmk */ |
| 118295 | VR256X, VR256X, VK8WM, f128mem, |
| 118296 | /* VCVTTPH2DQZ256rmkz */ |
| 118297 | VR256X, VK8WM, f128mem, |
| 118298 | /* VCVTTPH2DQZ256rr */ |
| 118299 | VR256X, VR128X, |
| 118300 | /* VCVTTPH2DQZ256rrk */ |
| 118301 | VR256X, VR256X, VK8WM, VR128X, |
| 118302 | /* VCVTTPH2DQZ256rrkz */ |
| 118303 | VR256X, VK8WM, VR128X, |
| 118304 | /* VCVTTPH2DQZrm */ |
| 118305 | VR512, f256mem, |
| 118306 | /* VCVTTPH2DQZrmb */ |
| 118307 | VR512, f16mem, |
| 118308 | /* VCVTTPH2DQZrmbk */ |
| 118309 | VR512, VR512, VK16WM, f16mem, |
| 118310 | /* VCVTTPH2DQZrmbkz */ |
| 118311 | VR512, VK16WM, f16mem, |
| 118312 | /* VCVTTPH2DQZrmk */ |
| 118313 | VR512, VR512, VK16WM, f256mem, |
| 118314 | /* VCVTTPH2DQZrmkz */ |
| 118315 | VR512, VK16WM, f256mem, |
| 118316 | /* VCVTTPH2DQZrr */ |
| 118317 | VR512, VR256X, |
| 118318 | /* VCVTTPH2DQZrrb */ |
| 118319 | VR512, VR256X, |
| 118320 | /* VCVTTPH2DQZrrbk */ |
| 118321 | VR512, VR512, VK16WM, VR256X, |
| 118322 | /* VCVTTPH2DQZrrbkz */ |
| 118323 | VR512, VK16WM, VR256X, |
| 118324 | /* VCVTTPH2DQZrrk */ |
| 118325 | VR512, VR512, VK16WM, VR256X, |
| 118326 | /* VCVTTPH2DQZrrkz */ |
| 118327 | VR512, VK16WM, VR256X, |
| 118328 | /* VCVTTPH2QQZ128rm */ |
| 118329 | VR128X, f32mem, |
| 118330 | /* VCVTTPH2QQZ128rmb */ |
| 118331 | VR128X, f16mem, |
| 118332 | /* VCVTTPH2QQZ128rmbk */ |
| 118333 | VR128X, VR128X, VK2WM, f16mem, |
| 118334 | /* VCVTTPH2QQZ128rmbkz */ |
| 118335 | VR128X, VK2WM, f16mem, |
| 118336 | /* VCVTTPH2QQZ128rmk */ |
| 118337 | VR128X, VR128X, VK2WM, f32mem, |
| 118338 | /* VCVTTPH2QQZ128rmkz */ |
| 118339 | VR128X, VK2WM, f32mem, |
| 118340 | /* VCVTTPH2QQZ128rr */ |
| 118341 | VR128X, VR128X, |
| 118342 | /* VCVTTPH2QQZ128rrk */ |
| 118343 | VR128X, VR128X, VK2WM, VR128X, |
| 118344 | /* VCVTTPH2QQZ128rrkz */ |
| 118345 | VR128X, VK2WM, VR128X, |
| 118346 | /* VCVTTPH2QQZ256rm */ |
| 118347 | VR256X, f64mem, |
| 118348 | /* VCVTTPH2QQZ256rmb */ |
| 118349 | VR256X, f16mem, |
| 118350 | /* VCVTTPH2QQZ256rmbk */ |
| 118351 | VR256X, VR256X, VK4WM, f16mem, |
| 118352 | /* VCVTTPH2QQZ256rmbkz */ |
| 118353 | VR256X, VK4WM, f16mem, |
| 118354 | /* VCVTTPH2QQZ256rmk */ |
| 118355 | VR256X, VR256X, VK4WM, f64mem, |
| 118356 | /* VCVTTPH2QQZ256rmkz */ |
| 118357 | VR256X, VK4WM, f64mem, |
| 118358 | /* VCVTTPH2QQZ256rr */ |
| 118359 | VR256X, VR128X, |
| 118360 | /* VCVTTPH2QQZ256rrk */ |
| 118361 | VR256X, VR256X, VK4WM, VR128X, |
| 118362 | /* VCVTTPH2QQZ256rrkz */ |
| 118363 | VR256X, VK4WM, VR128X, |
| 118364 | /* VCVTTPH2QQZrm */ |
| 118365 | VR512, f128mem, |
| 118366 | /* VCVTTPH2QQZrmb */ |
| 118367 | VR512, f16mem, |
| 118368 | /* VCVTTPH2QQZrmbk */ |
| 118369 | VR512, VR512, VK8WM, f16mem, |
| 118370 | /* VCVTTPH2QQZrmbkz */ |
| 118371 | VR512, VK8WM, f16mem, |
| 118372 | /* VCVTTPH2QQZrmk */ |
| 118373 | VR512, VR512, VK8WM, f128mem, |
| 118374 | /* VCVTTPH2QQZrmkz */ |
| 118375 | VR512, VK8WM, f128mem, |
| 118376 | /* VCVTTPH2QQZrr */ |
| 118377 | VR512, VR128X, |
| 118378 | /* VCVTTPH2QQZrrb */ |
| 118379 | VR512, VR128X, |
| 118380 | /* VCVTTPH2QQZrrbk */ |
| 118381 | VR512, VR512, VK8WM, VR128X, |
| 118382 | /* VCVTTPH2QQZrrbkz */ |
| 118383 | VR512, VK8WM, VR128X, |
| 118384 | /* VCVTTPH2QQZrrk */ |
| 118385 | VR512, VR512, VK8WM, VR128X, |
| 118386 | /* VCVTTPH2QQZrrkz */ |
| 118387 | VR512, VK8WM, VR128X, |
| 118388 | /* VCVTTPH2UDQZ128rm */ |
| 118389 | VR128X, f64mem, |
| 118390 | /* VCVTTPH2UDQZ128rmb */ |
| 118391 | VR128X, f16mem, |
| 118392 | /* VCVTTPH2UDQZ128rmbk */ |
| 118393 | VR128X, VR128X, VK4WM, f16mem, |
| 118394 | /* VCVTTPH2UDQZ128rmbkz */ |
| 118395 | VR128X, VK4WM, f16mem, |
| 118396 | /* VCVTTPH2UDQZ128rmk */ |
| 118397 | VR128X, VR128X, VK4WM, f64mem, |
| 118398 | /* VCVTTPH2UDQZ128rmkz */ |
| 118399 | VR128X, VK4WM, f64mem, |
| 118400 | /* VCVTTPH2UDQZ128rr */ |
| 118401 | VR128X, VR128X, |
| 118402 | /* VCVTTPH2UDQZ128rrk */ |
| 118403 | VR128X, VR128X, VK4WM, VR128X, |
| 118404 | /* VCVTTPH2UDQZ128rrkz */ |
| 118405 | VR128X, VK4WM, VR128X, |
| 118406 | /* VCVTTPH2UDQZ256rm */ |
| 118407 | VR256X, f128mem, |
| 118408 | /* VCVTTPH2UDQZ256rmb */ |
| 118409 | VR256X, f16mem, |
| 118410 | /* VCVTTPH2UDQZ256rmbk */ |
| 118411 | VR256X, VR256X, VK8WM, f16mem, |
| 118412 | /* VCVTTPH2UDQZ256rmbkz */ |
| 118413 | VR256X, VK8WM, f16mem, |
| 118414 | /* VCVTTPH2UDQZ256rmk */ |
| 118415 | VR256X, VR256X, VK8WM, f128mem, |
| 118416 | /* VCVTTPH2UDQZ256rmkz */ |
| 118417 | VR256X, VK8WM, f128mem, |
| 118418 | /* VCVTTPH2UDQZ256rr */ |
| 118419 | VR256X, VR128X, |
| 118420 | /* VCVTTPH2UDQZ256rrk */ |
| 118421 | VR256X, VR256X, VK8WM, VR128X, |
| 118422 | /* VCVTTPH2UDQZ256rrkz */ |
| 118423 | VR256X, VK8WM, VR128X, |
| 118424 | /* VCVTTPH2UDQZrm */ |
| 118425 | VR512, f256mem, |
| 118426 | /* VCVTTPH2UDQZrmb */ |
| 118427 | VR512, f16mem, |
| 118428 | /* VCVTTPH2UDQZrmbk */ |
| 118429 | VR512, VR512, VK16WM, f16mem, |
| 118430 | /* VCVTTPH2UDQZrmbkz */ |
| 118431 | VR512, VK16WM, f16mem, |
| 118432 | /* VCVTTPH2UDQZrmk */ |
| 118433 | VR512, VR512, VK16WM, f256mem, |
| 118434 | /* VCVTTPH2UDQZrmkz */ |
| 118435 | VR512, VK16WM, f256mem, |
| 118436 | /* VCVTTPH2UDQZrr */ |
| 118437 | VR512, VR256X, |
| 118438 | /* VCVTTPH2UDQZrrb */ |
| 118439 | VR512, VR256X, |
| 118440 | /* VCVTTPH2UDQZrrbk */ |
| 118441 | VR512, VR512, VK16WM, VR256X, |
| 118442 | /* VCVTTPH2UDQZrrbkz */ |
| 118443 | VR512, VK16WM, VR256X, |
| 118444 | /* VCVTTPH2UDQZrrk */ |
| 118445 | VR512, VR512, VK16WM, VR256X, |
| 118446 | /* VCVTTPH2UDQZrrkz */ |
| 118447 | VR512, VK16WM, VR256X, |
| 118448 | /* VCVTTPH2UQQZ128rm */ |
| 118449 | VR128X, f32mem, |
| 118450 | /* VCVTTPH2UQQZ128rmb */ |
| 118451 | VR128X, f16mem, |
| 118452 | /* VCVTTPH2UQQZ128rmbk */ |
| 118453 | VR128X, VR128X, VK2WM, f16mem, |
| 118454 | /* VCVTTPH2UQQZ128rmbkz */ |
| 118455 | VR128X, VK2WM, f16mem, |
| 118456 | /* VCVTTPH2UQQZ128rmk */ |
| 118457 | VR128X, VR128X, VK2WM, f32mem, |
| 118458 | /* VCVTTPH2UQQZ128rmkz */ |
| 118459 | VR128X, VK2WM, f32mem, |
| 118460 | /* VCVTTPH2UQQZ128rr */ |
| 118461 | VR128X, VR128X, |
| 118462 | /* VCVTTPH2UQQZ128rrk */ |
| 118463 | VR128X, VR128X, VK2WM, VR128X, |
| 118464 | /* VCVTTPH2UQQZ128rrkz */ |
| 118465 | VR128X, VK2WM, VR128X, |
| 118466 | /* VCVTTPH2UQQZ256rm */ |
| 118467 | VR256X, f64mem, |
| 118468 | /* VCVTTPH2UQQZ256rmb */ |
| 118469 | VR256X, f16mem, |
| 118470 | /* VCVTTPH2UQQZ256rmbk */ |
| 118471 | VR256X, VR256X, VK4WM, f16mem, |
| 118472 | /* VCVTTPH2UQQZ256rmbkz */ |
| 118473 | VR256X, VK4WM, f16mem, |
| 118474 | /* VCVTTPH2UQQZ256rmk */ |
| 118475 | VR256X, VR256X, VK4WM, f64mem, |
| 118476 | /* VCVTTPH2UQQZ256rmkz */ |
| 118477 | VR256X, VK4WM, f64mem, |
| 118478 | /* VCVTTPH2UQQZ256rr */ |
| 118479 | VR256X, VR128X, |
| 118480 | /* VCVTTPH2UQQZ256rrk */ |
| 118481 | VR256X, VR256X, VK4WM, VR128X, |
| 118482 | /* VCVTTPH2UQQZ256rrkz */ |
| 118483 | VR256X, VK4WM, VR128X, |
| 118484 | /* VCVTTPH2UQQZrm */ |
| 118485 | VR512, f128mem, |
| 118486 | /* VCVTTPH2UQQZrmb */ |
| 118487 | VR512, f16mem, |
| 118488 | /* VCVTTPH2UQQZrmbk */ |
| 118489 | VR512, VR512, VK8WM, f16mem, |
| 118490 | /* VCVTTPH2UQQZrmbkz */ |
| 118491 | VR512, VK8WM, f16mem, |
| 118492 | /* VCVTTPH2UQQZrmk */ |
| 118493 | VR512, VR512, VK8WM, f128mem, |
| 118494 | /* VCVTTPH2UQQZrmkz */ |
| 118495 | VR512, VK8WM, f128mem, |
| 118496 | /* VCVTTPH2UQQZrr */ |
| 118497 | VR512, VR128X, |
| 118498 | /* VCVTTPH2UQQZrrb */ |
| 118499 | VR512, VR128X, |
| 118500 | /* VCVTTPH2UQQZrrbk */ |
| 118501 | VR512, VR512, VK8WM, VR128X, |
| 118502 | /* VCVTTPH2UQQZrrbkz */ |
| 118503 | VR512, VK8WM, VR128X, |
| 118504 | /* VCVTTPH2UQQZrrk */ |
| 118505 | VR512, VR512, VK8WM, VR128X, |
| 118506 | /* VCVTTPH2UQQZrrkz */ |
| 118507 | VR512, VK8WM, VR128X, |
| 118508 | /* VCVTTPH2UWZ128rm */ |
| 118509 | VR128X, f128mem, |
| 118510 | /* VCVTTPH2UWZ128rmb */ |
| 118511 | VR128X, f16mem, |
| 118512 | /* VCVTTPH2UWZ128rmbk */ |
| 118513 | VR128X, VR128X, VK8WM, f16mem, |
| 118514 | /* VCVTTPH2UWZ128rmbkz */ |
| 118515 | VR128X, VK8WM, f16mem, |
| 118516 | /* VCVTTPH2UWZ128rmk */ |
| 118517 | VR128X, VR128X, VK8WM, f128mem, |
| 118518 | /* VCVTTPH2UWZ128rmkz */ |
| 118519 | VR128X, VK8WM, f128mem, |
| 118520 | /* VCVTTPH2UWZ128rr */ |
| 118521 | VR128X, VR128X, |
| 118522 | /* VCVTTPH2UWZ128rrk */ |
| 118523 | VR128X, VR128X, VK8WM, VR128X, |
| 118524 | /* VCVTTPH2UWZ128rrkz */ |
| 118525 | VR128X, VK8WM, VR128X, |
| 118526 | /* VCVTTPH2UWZ256rm */ |
| 118527 | VR256X, f256mem, |
| 118528 | /* VCVTTPH2UWZ256rmb */ |
| 118529 | VR256X, f16mem, |
| 118530 | /* VCVTTPH2UWZ256rmbk */ |
| 118531 | VR256X, VR256X, VK16WM, f16mem, |
| 118532 | /* VCVTTPH2UWZ256rmbkz */ |
| 118533 | VR256X, VK16WM, f16mem, |
| 118534 | /* VCVTTPH2UWZ256rmk */ |
| 118535 | VR256X, VR256X, VK16WM, f256mem, |
| 118536 | /* VCVTTPH2UWZ256rmkz */ |
| 118537 | VR256X, VK16WM, f256mem, |
| 118538 | /* VCVTTPH2UWZ256rr */ |
| 118539 | VR256X, VR256X, |
| 118540 | /* VCVTTPH2UWZ256rrk */ |
| 118541 | VR256X, VR256X, VK16WM, VR256X, |
| 118542 | /* VCVTTPH2UWZ256rrkz */ |
| 118543 | VR256X, VK16WM, VR256X, |
| 118544 | /* VCVTTPH2UWZrm */ |
| 118545 | VR512, f512mem, |
| 118546 | /* VCVTTPH2UWZrmb */ |
| 118547 | VR512, f16mem, |
| 118548 | /* VCVTTPH2UWZrmbk */ |
| 118549 | VR512, VR512, VK32WM, f16mem, |
| 118550 | /* VCVTTPH2UWZrmbkz */ |
| 118551 | VR512, VK32WM, f16mem, |
| 118552 | /* VCVTTPH2UWZrmk */ |
| 118553 | VR512, VR512, VK32WM, f512mem, |
| 118554 | /* VCVTTPH2UWZrmkz */ |
| 118555 | VR512, VK32WM, f512mem, |
| 118556 | /* VCVTTPH2UWZrr */ |
| 118557 | VR512, VR512, |
| 118558 | /* VCVTTPH2UWZrrb */ |
| 118559 | VR512, VR512, |
| 118560 | /* VCVTTPH2UWZrrbk */ |
| 118561 | VR512, VR512, VK32WM, VR512, |
| 118562 | /* VCVTTPH2UWZrrbkz */ |
| 118563 | VR512, VK32WM, VR512, |
| 118564 | /* VCVTTPH2UWZrrk */ |
| 118565 | VR512, VR512, VK32WM, VR512, |
| 118566 | /* VCVTTPH2UWZrrkz */ |
| 118567 | VR512, VK32WM, VR512, |
| 118568 | /* VCVTTPH2WZ128rm */ |
| 118569 | VR128X, f128mem, |
| 118570 | /* VCVTTPH2WZ128rmb */ |
| 118571 | VR128X, f16mem, |
| 118572 | /* VCVTTPH2WZ128rmbk */ |
| 118573 | VR128X, VR128X, VK8WM, f16mem, |
| 118574 | /* VCVTTPH2WZ128rmbkz */ |
| 118575 | VR128X, VK8WM, f16mem, |
| 118576 | /* VCVTTPH2WZ128rmk */ |
| 118577 | VR128X, VR128X, VK8WM, f128mem, |
| 118578 | /* VCVTTPH2WZ128rmkz */ |
| 118579 | VR128X, VK8WM, f128mem, |
| 118580 | /* VCVTTPH2WZ128rr */ |
| 118581 | VR128X, VR128X, |
| 118582 | /* VCVTTPH2WZ128rrk */ |
| 118583 | VR128X, VR128X, VK8WM, VR128X, |
| 118584 | /* VCVTTPH2WZ128rrkz */ |
| 118585 | VR128X, VK8WM, VR128X, |
| 118586 | /* VCVTTPH2WZ256rm */ |
| 118587 | VR256X, f256mem, |
| 118588 | /* VCVTTPH2WZ256rmb */ |
| 118589 | VR256X, f16mem, |
| 118590 | /* VCVTTPH2WZ256rmbk */ |
| 118591 | VR256X, VR256X, VK16WM, f16mem, |
| 118592 | /* VCVTTPH2WZ256rmbkz */ |
| 118593 | VR256X, VK16WM, f16mem, |
| 118594 | /* VCVTTPH2WZ256rmk */ |
| 118595 | VR256X, VR256X, VK16WM, f256mem, |
| 118596 | /* VCVTTPH2WZ256rmkz */ |
| 118597 | VR256X, VK16WM, f256mem, |
| 118598 | /* VCVTTPH2WZ256rr */ |
| 118599 | VR256X, VR256X, |
| 118600 | /* VCVTTPH2WZ256rrk */ |
| 118601 | VR256X, VR256X, VK16WM, VR256X, |
| 118602 | /* VCVTTPH2WZ256rrkz */ |
| 118603 | VR256X, VK16WM, VR256X, |
| 118604 | /* VCVTTPH2WZrm */ |
| 118605 | VR512, f512mem, |
| 118606 | /* VCVTTPH2WZrmb */ |
| 118607 | VR512, f16mem, |
| 118608 | /* VCVTTPH2WZrmbk */ |
| 118609 | VR512, VR512, VK32WM, f16mem, |
| 118610 | /* VCVTTPH2WZrmbkz */ |
| 118611 | VR512, VK32WM, f16mem, |
| 118612 | /* VCVTTPH2WZrmk */ |
| 118613 | VR512, VR512, VK32WM, f512mem, |
| 118614 | /* VCVTTPH2WZrmkz */ |
| 118615 | VR512, VK32WM, f512mem, |
| 118616 | /* VCVTTPH2WZrr */ |
| 118617 | VR512, VR512, |
| 118618 | /* VCVTTPH2WZrrb */ |
| 118619 | VR512, VR512, |
| 118620 | /* VCVTTPH2WZrrbk */ |
| 118621 | VR512, VR512, VK32WM, VR512, |
| 118622 | /* VCVTTPH2WZrrbkz */ |
| 118623 | VR512, VK32WM, VR512, |
| 118624 | /* VCVTTPH2WZrrk */ |
| 118625 | VR512, VR512, VK32WM, VR512, |
| 118626 | /* VCVTTPH2WZrrkz */ |
| 118627 | VR512, VK32WM, VR512, |
| 118628 | /* VCVTTPS2DQYrm */ |
| 118629 | VR256, f256mem, |
| 118630 | /* VCVTTPS2DQYrr */ |
| 118631 | VR256, VR256, |
| 118632 | /* VCVTTPS2DQZ128rm */ |
| 118633 | VR128X, f128mem, |
| 118634 | /* VCVTTPS2DQZ128rmb */ |
| 118635 | VR128X, f32mem, |
| 118636 | /* VCVTTPS2DQZ128rmbk */ |
| 118637 | VR128X, VR128X, VK4WM, f32mem, |
| 118638 | /* VCVTTPS2DQZ128rmbkz */ |
| 118639 | VR128X, VK4WM, f32mem, |
| 118640 | /* VCVTTPS2DQZ128rmk */ |
| 118641 | VR128X, VR128X, VK4WM, f128mem, |
| 118642 | /* VCVTTPS2DQZ128rmkz */ |
| 118643 | VR128X, VK4WM, f128mem, |
| 118644 | /* VCVTTPS2DQZ128rr */ |
| 118645 | VR128X, VR128X, |
| 118646 | /* VCVTTPS2DQZ128rrk */ |
| 118647 | VR128X, VR128X, VK4WM, VR128X, |
| 118648 | /* VCVTTPS2DQZ128rrkz */ |
| 118649 | VR128X, VK4WM, VR128X, |
| 118650 | /* VCVTTPS2DQZ256rm */ |
| 118651 | VR256X, f256mem, |
| 118652 | /* VCVTTPS2DQZ256rmb */ |
| 118653 | VR256X, f32mem, |
| 118654 | /* VCVTTPS2DQZ256rmbk */ |
| 118655 | VR256X, VR256X, VK8WM, f32mem, |
| 118656 | /* VCVTTPS2DQZ256rmbkz */ |
| 118657 | VR256X, VK8WM, f32mem, |
| 118658 | /* VCVTTPS2DQZ256rmk */ |
| 118659 | VR256X, VR256X, VK8WM, f256mem, |
| 118660 | /* VCVTTPS2DQZ256rmkz */ |
| 118661 | VR256X, VK8WM, f256mem, |
| 118662 | /* VCVTTPS2DQZ256rr */ |
| 118663 | VR256X, VR256X, |
| 118664 | /* VCVTTPS2DQZ256rrk */ |
| 118665 | VR256X, VR256X, VK8WM, VR256X, |
| 118666 | /* VCVTTPS2DQZ256rrkz */ |
| 118667 | VR256X, VK8WM, VR256X, |
| 118668 | /* VCVTTPS2DQZrm */ |
| 118669 | VR512, f512mem, |
| 118670 | /* VCVTTPS2DQZrmb */ |
| 118671 | VR512, f32mem, |
| 118672 | /* VCVTTPS2DQZrmbk */ |
| 118673 | VR512, VR512, VK16WM, f32mem, |
| 118674 | /* VCVTTPS2DQZrmbkz */ |
| 118675 | VR512, VK16WM, f32mem, |
| 118676 | /* VCVTTPS2DQZrmk */ |
| 118677 | VR512, VR512, VK16WM, f512mem, |
| 118678 | /* VCVTTPS2DQZrmkz */ |
| 118679 | VR512, VK16WM, f512mem, |
| 118680 | /* VCVTTPS2DQZrr */ |
| 118681 | VR512, VR512, |
| 118682 | /* VCVTTPS2DQZrrb */ |
| 118683 | VR512, VR512, |
| 118684 | /* VCVTTPS2DQZrrbk */ |
| 118685 | VR512, VR512, VK16WM, VR512, |
| 118686 | /* VCVTTPS2DQZrrbkz */ |
| 118687 | VR512, VK16WM, VR512, |
| 118688 | /* VCVTTPS2DQZrrk */ |
| 118689 | VR512, VR512, VK16WM, VR512, |
| 118690 | /* VCVTTPS2DQZrrkz */ |
| 118691 | VR512, VK16WM, VR512, |
| 118692 | /* VCVTTPS2DQrm */ |
| 118693 | VR128, f128mem, |
| 118694 | /* VCVTTPS2DQrr */ |
| 118695 | VR128, VR128, |
| 118696 | /* VCVTTPS2QQZ128rm */ |
| 118697 | VR128X, f64mem, |
| 118698 | /* VCVTTPS2QQZ128rmb */ |
| 118699 | VR128X, f32mem, |
| 118700 | /* VCVTTPS2QQZ128rmbk */ |
| 118701 | VR128X, VR128X, VK2WM, f32mem, |
| 118702 | /* VCVTTPS2QQZ128rmbkz */ |
| 118703 | VR128X, VK2WM, f32mem, |
| 118704 | /* VCVTTPS2QQZ128rmk */ |
| 118705 | VR128X, VR128X, VK2WM, f64mem, |
| 118706 | /* VCVTTPS2QQZ128rmkz */ |
| 118707 | VR128X, VK2WM, f64mem, |
| 118708 | /* VCVTTPS2QQZ128rr */ |
| 118709 | VR128X, VR128X, |
| 118710 | /* VCVTTPS2QQZ128rrk */ |
| 118711 | VR128X, VR128X, VK2WM, VR128X, |
| 118712 | /* VCVTTPS2QQZ128rrkz */ |
| 118713 | VR128X, VK2WM, VR128X, |
| 118714 | /* VCVTTPS2QQZ256rm */ |
| 118715 | VR256X, f128mem, |
| 118716 | /* VCVTTPS2QQZ256rmb */ |
| 118717 | VR256X, f32mem, |
| 118718 | /* VCVTTPS2QQZ256rmbk */ |
| 118719 | VR256X, VR256X, VK4WM, f32mem, |
| 118720 | /* VCVTTPS2QQZ256rmbkz */ |
| 118721 | VR256X, VK4WM, f32mem, |
| 118722 | /* VCVTTPS2QQZ256rmk */ |
| 118723 | VR256X, VR256X, VK4WM, f128mem, |
| 118724 | /* VCVTTPS2QQZ256rmkz */ |
| 118725 | VR256X, VK4WM, f128mem, |
| 118726 | /* VCVTTPS2QQZ256rr */ |
| 118727 | VR256X, VR128X, |
| 118728 | /* VCVTTPS2QQZ256rrk */ |
| 118729 | VR256X, VR256X, VK4WM, VR128X, |
| 118730 | /* VCVTTPS2QQZ256rrkz */ |
| 118731 | VR256X, VK4WM, VR128X, |
| 118732 | /* VCVTTPS2QQZrm */ |
| 118733 | VR512, f256mem, |
| 118734 | /* VCVTTPS2QQZrmb */ |
| 118735 | VR512, f32mem, |
| 118736 | /* VCVTTPS2QQZrmbk */ |
| 118737 | VR512, VR512, VK8WM, f32mem, |
| 118738 | /* VCVTTPS2QQZrmbkz */ |
| 118739 | VR512, VK8WM, f32mem, |
| 118740 | /* VCVTTPS2QQZrmk */ |
| 118741 | VR512, VR512, VK8WM, f256mem, |
| 118742 | /* VCVTTPS2QQZrmkz */ |
| 118743 | VR512, VK8WM, f256mem, |
| 118744 | /* VCVTTPS2QQZrr */ |
| 118745 | VR512, VR256X, |
| 118746 | /* VCVTTPS2QQZrrb */ |
| 118747 | VR512, VR256X, |
| 118748 | /* VCVTTPS2QQZrrbk */ |
| 118749 | VR512, VR512, VK8WM, VR256X, |
| 118750 | /* VCVTTPS2QQZrrbkz */ |
| 118751 | VR512, VK8WM, VR256X, |
| 118752 | /* VCVTTPS2QQZrrk */ |
| 118753 | VR512, VR512, VK8WM, VR256X, |
| 118754 | /* VCVTTPS2QQZrrkz */ |
| 118755 | VR512, VK8WM, VR256X, |
| 118756 | /* VCVTTPS2UDQZ128rm */ |
| 118757 | VR128X, f128mem, |
| 118758 | /* VCVTTPS2UDQZ128rmb */ |
| 118759 | VR128X, f32mem, |
| 118760 | /* VCVTTPS2UDQZ128rmbk */ |
| 118761 | VR128X, VR128X, VK4WM, f32mem, |
| 118762 | /* VCVTTPS2UDQZ128rmbkz */ |
| 118763 | VR128X, VK4WM, f32mem, |
| 118764 | /* VCVTTPS2UDQZ128rmk */ |
| 118765 | VR128X, VR128X, VK4WM, f128mem, |
| 118766 | /* VCVTTPS2UDQZ128rmkz */ |
| 118767 | VR128X, VK4WM, f128mem, |
| 118768 | /* VCVTTPS2UDQZ128rr */ |
| 118769 | VR128X, VR128X, |
| 118770 | /* VCVTTPS2UDQZ128rrk */ |
| 118771 | VR128X, VR128X, VK4WM, VR128X, |
| 118772 | /* VCVTTPS2UDQZ128rrkz */ |
| 118773 | VR128X, VK4WM, VR128X, |
| 118774 | /* VCVTTPS2UDQZ256rm */ |
| 118775 | VR256X, f256mem, |
| 118776 | /* VCVTTPS2UDQZ256rmb */ |
| 118777 | VR256X, f32mem, |
| 118778 | /* VCVTTPS2UDQZ256rmbk */ |
| 118779 | VR256X, VR256X, VK8WM, f32mem, |
| 118780 | /* VCVTTPS2UDQZ256rmbkz */ |
| 118781 | VR256X, VK8WM, f32mem, |
| 118782 | /* VCVTTPS2UDQZ256rmk */ |
| 118783 | VR256X, VR256X, VK8WM, f256mem, |
| 118784 | /* VCVTTPS2UDQZ256rmkz */ |
| 118785 | VR256X, VK8WM, f256mem, |
| 118786 | /* VCVTTPS2UDQZ256rr */ |
| 118787 | VR256X, VR256X, |
| 118788 | /* VCVTTPS2UDQZ256rrk */ |
| 118789 | VR256X, VR256X, VK8WM, VR256X, |
| 118790 | /* VCVTTPS2UDQZ256rrkz */ |
| 118791 | VR256X, VK8WM, VR256X, |
| 118792 | /* VCVTTPS2UDQZrm */ |
| 118793 | VR512, f512mem, |
| 118794 | /* VCVTTPS2UDQZrmb */ |
| 118795 | VR512, f32mem, |
| 118796 | /* VCVTTPS2UDQZrmbk */ |
| 118797 | VR512, VR512, VK16WM, f32mem, |
| 118798 | /* VCVTTPS2UDQZrmbkz */ |
| 118799 | VR512, VK16WM, f32mem, |
| 118800 | /* VCVTTPS2UDQZrmk */ |
| 118801 | VR512, VR512, VK16WM, f512mem, |
| 118802 | /* VCVTTPS2UDQZrmkz */ |
| 118803 | VR512, VK16WM, f512mem, |
| 118804 | /* VCVTTPS2UDQZrr */ |
| 118805 | VR512, VR512, |
| 118806 | /* VCVTTPS2UDQZrrb */ |
| 118807 | VR512, VR512, |
| 118808 | /* VCVTTPS2UDQZrrbk */ |
| 118809 | VR512, VR512, VK16WM, VR512, |
| 118810 | /* VCVTTPS2UDQZrrbkz */ |
| 118811 | VR512, VK16WM, VR512, |
| 118812 | /* VCVTTPS2UDQZrrk */ |
| 118813 | VR512, VR512, VK16WM, VR512, |
| 118814 | /* VCVTTPS2UDQZrrkz */ |
| 118815 | VR512, VK16WM, VR512, |
| 118816 | /* VCVTTPS2UQQZ128rm */ |
| 118817 | VR128X, f64mem, |
| 118818 | /* VCVTTPS2UQQZ128rmb */ |
| 118819 | VR128X, f32mem, |
| 118820 | /* VCVTTPS2UQQZ128rmbk */ |
| 118821 | VR128X, VR128X, VK2WM, f32mem, |
| 118822 | /* VCVTTPS2UQQZ128rmbkz */ |
| 118823 | VR128X, VK2WM, f32mem, |
| 118824 | /* VCVTTPS2UQQZ128rmk */ |
| 118825 | VR128X, VR128X, VK2WM, f64mem, |
| 118826 | /* VCVTTPS2UQQZ128rmkz */ |
| 118827 | VR128X, VK2WM, f64mem, |
| 118828 | /* VCVTTPS2UQQZ128rr */ |
| 118829 | VR128X, VR128X, |
| 118830 | /* VCVTTPS2UQQZ128rrk */ |
| 118831 | VR128X, VR128X, VK2WM, VR128X, |
| 118832 | /* VCVTTPS2UQQZ128rrkz */ |
| 118833 | VR128X, VK2WM, VR128X, |
| 118834 | /* VCVTTPS2UQQZ256rm */ |
| 118835 | VR256X, f128mem, |
| 118836 | /* VCVTTPS2UQQZ256rmb */ |
| 118837 | VR256X, f32mem, |
| 118838 | /* VCVTTPS2UQQZ256rmbk */ |
| 118839 | VR256X, VR256X, VK4WM, f32mem, |
| 118840 | /* VCVTTPS2UQQZ256rmbkz */ |
| 118841 | VR256X, VK4WM, f32mem, |
| 118842 | /* VCVTTPS2UQQZ256rmk */ |
| 118843 | VR256X, VR256X, VK4WM, f128mem, |
| 118844 | /* VCVTTPS2UQQZ256rmkz */ |
| 118845 | VR256X, VK4WM, f128mem, |
| 118846 | /* VCVTTPS2UQQZ256rr */ |
| 118847 | VR256X, VR128X, |
| 118848 | /* VCVTTPS2UQQZ256rrk */ |
| 118849 | VR256X, VR256X, VK4WM, VR128X, |
| 118850 | /* VCVTTPS2UQQZ256rrkz */ |
| 118851 | VR256X, VK4WM, VR128X, |
| 118852 | /* VCVTTPS2UQQZrm */ |
| 118853 | VR512, f256mem, |
| 118854 | /* VCVTTPS2UQQZrmb */ |
| 118855 | VR512, f32mem, |
| 118856 | /* VCVTTPS2UQQZrmbk */ |
| 118857 | VR512, VR512, VK8WM, f32mem, |
| 118858 | /* VCVTTPS2UQQZrmbkz */ |
| 118859 | VR512, VK8WM, f32mem, |
| 118860 | /* VCVTTPS2UQQZrmk */ |
| 118861 | VR512, VR512, VK8WM, f256mem, |
| 118862 | /* VCVTTPS2UQQZrmkz */ |
| 118863 | VR512, VK8WM, f256mem, |
| 118864 | /* VCVTTPS2UQQZrr */ |
| 118865 | VR512, VR256X, |
| 118866 | /* VCVTTPS2UQQZrrb */ |
| 118867 | VR512, VR256X, |
| 118868 | /* VCVTTPS2UQQZrrbk */ |
| 118869 | VR512, VR512, VK8WM, VR256X, |
| 118870 | /* VCVTTPS2UQQZrrbkz */ |
| 118871 | VR512, VK8WM, VR256X, |
| 118872 | /* VCVTTPS2UQQZrrk */ |
| 118873 | VR512, VR512, VK8WM, VR256X, |
| 118874 | /* VCVTTPS2UQQZrrkz */ |
| 118875 | VR512, VK8WM, VR256X, |
| 118876 | /* VCVTTSD2SI64Zrm */ |
| 118877 | GR64, f64mem, |
| 118878 | /* VCVTTSD2SI64Zrm_Int */ |
| 118879 | GR64, sdmem, |
| 118880 | /* VCVTTSD2SI64Zrr */ |
| 118881 | GR64, FR64X, |
| 118882 | /* VCVTTSD2SI64Zrr_Int */ |
| 118883 | GR64, VR128X, |
| 118884 | /* VCVTTSD2SI64Zrrb_Int */ |
| 118885 | GR64, VR128X, |
| 118886 | /* VCVTTSD2SI64rm */ |
| 118887 | GR64, f64mem, |
| 118888 | /* VCVTTSD2SI64rm_Int */ |
| 118889 | GR64, sdmem, |
| 118890 | /* VCVTTSD2SI64rr */ |
| 118891 | GR64, FR64, |
| 118892 | /* VCVTTSD2SI64rr_Int */ |
| 118893 | GR64, VR128, |
| 118894 | /* VCVTTSD2SIZrm */ |
| 118895 | GR32, f64mem, |
| 118896 | /* VCVTTSD2SIZrm_Int */ |
| 118897 | GR32, sdmem, |
| 118898 | /* VCVTTSD2SIZrr */ |
| 118899 | GR32, FR64X, |
| 118900 | /* VCVTTSD2SIZrr_Int */ |
| 118901 | GR32, VR128X, |
| 118902 | /* VCVTTSD2SIZrrb_Int */ |
| 118903 | GR32, VR128X, |
| 118904 | /* VCVTTSD2SIrm */ |
| 118905 | GR32, f64mem, |
| 118906 | /* VCVTTSD2SIrm_Int */ |
| 118907 | GR32, sdmem, |
| 118908 | /* VCVTTSD2SIrr */ |
| 118909 | GR32, FR64, |
| 118910 | /* VCVTTSD2SIrr_Int */ |
| 118911 | GR32, VR128, |
| 118912 | /* VCVTTSD2USI64Zrm */ |
| 118913 | GR64, f64mem, |
| 118914 | /* VCVTTSD2USI64Zrm_Int */ |
| 118915 | GR64, sdmem, |
| 118916 | /* VCVTTSD2USI64Zrr */ |
| 118917 | GR64, FR64X, |
| 118918 | /* VCVTTSD2USI64Zrr_Int */ |
| 118919 | GR64, VR128X, |
| 118920 | /* VCVTTSD2USI64Zrrb_Int */ |
| 118921 | GR64, VR128X, |
| 118922 | /* VCVTTSD2USIZrm */ |
| 118923 | GR32, f64mem, |
| 118924 | /* VCVTTSD2USIZrm_Int */ |
| 118925 | GR32, sdmem, |
| 118926 | /* VCVTTSD2USIZrr */ |
| 118927 | GR32, FR64X, |
| 118928 | /* VCVTTSD2USIZrr_Int */ |
| 118929 | GR32, VR128X, |
| 118930 | /* VCVTTSD2USIZrrb_Int */ |
| 118931 | GR32, VR128X, |
| 118932 | /* VCVTTSH2SI64Zrm */ |
| 118933 | GR64, f16mem, |
| 118934 | /* VCVTTSH2SI64Zrm_Int */ |
| 118935 | GR64, shmem, |
| 118936 | /* VCVTTSH2SI64Zrr */ |
| 118937 | GR64, FR16X, |
| 118938 | /* VCVTTSH2SI64Zrr_Int */ |
| 118939 | GR64, VR128X, |
| 118940 | /* VCVTTSH2SI64Zrrb_Int */ |
| 118941 | GR64, VR128X, |
| 118942 | /* VCVTTSH2SIZrm */ |
| 118943 | GR32, f16mem, |
| 118944 | /* VCVTTSH2SIZrm_Int */ |
| 118945 | GR32, shmem, |
| 118946 | /* VCVTTSH2SIZrr */ |
| 118947 | GR32, FR16X, |
| 118948 | /* VCVTTSH2SIZrr_Int */ |
| 118949 | GR32, VR128X, |
| 118950 | /* VCVTTSH2SIZrrb_Int */ |
| 118951 | GR32, VR128X, |
| 118952 | /* VCVTTSH2USI64Zrm */ |
| 118953 | GR64, f16mem, |
| 118954 | /* VCVTTSH2USI64Zrm_Int */ |
| 118955 | GR64, shmem, |
| 118956 | /* VCVTTSH2USI64Zrr */ |
| 118957 | GR64, FR16X, |
| 118958 | /* VCVTTSH2USI64Zrr_Int */ |
| 118959 | GR64, VR128X, |
| 118960 | /* VCVTTSH2USI64Zrrb_Int */ |
| 118961 | GR64, VR128X, |
| 118962 | /* VCVTTSH2USIZrm */ |
| 118963 | GR32, f16mem, |
| 118964 | /* VCVTTSH2USIZrm_Int */ |
| 118965 | GR32, shmem, |
| 118966 | /* VCVTTSH2USIZrr */ |
| 118967 | GR32, FR16X, |
| 118968 | /* VCVTTSH2USIZrr_Int */ |
| 118969 | GR32, VR128X, |
| 118970 | /* VCVTTSH2USIZrrb_Int */ |
| 118971 | GR32, VR128X, |
| 118972 | /* VCVTTSS2SI64Zrm */ |
| 118973 | GR64, f32mem, |
| 118974 | /* VCVTTSS2SI64Zrm_Int */ |
| 118975 | GR64, ssmem, |
| 118976 | /* VCVTTSS2SI64Zrr */ |
| 118977 | GR64, FR32X, |
| 118978 | /* VCVTTSS2SI64Zrr_Int */ |
| 118979 | GR64, VR128X, |
| 118980 | /* VCVTTSS2SI64Zrrb_Int */ |
| 118981 | GR64, VR128X, |
| 118982 | /* VCVTTSS2SI64rm */ |
| 118983 | GR64, f32mem, |
| 118984 | /* VCVTTSS2SI64rm_Int */ |
| 118985 | GR64, ssmem, |
| 118986 | /* VCVTTSS2SI64rr */ |
| 118987 | GR64, FR32, |
| 118988 | /* VCVTTSS2SI64rr_Int */ |
| 118989 | GR64, VR128, |
| 118990 | /* VCVTTSS2SIZrm */ |
| 118991 | GR32, f32mem, |
| 118992 | /* VCVTTSS2SIZrm_Int */ |
| 118993 | GR32, ssmem, |
| 118994 | /* VCVTTSS2SIZrr */ |
| 118995 | GR32, FR32X, |
| 118996 | /* VCVTTSS2SIZrr_Int */ |
| 118997 | GR32, VR128X, |
| 118998 | /* VCVTTSS2SIZrrb_Int */ |
| 118999 | GR32, VR128X, |
| 119000 | /* VCVTTSS2SIrm */ |
| 119001 | GR32, f32mem, |
| 119002 | /* VCVTTSS2SIrm_Int */ |
| 119003 | GR32, ssmem, |
| 119004 | /* VCVTTSS2SIrr */ |
| 119005 | GR32, FR32, |
| 119006 | /* VCVTTSS2SIrr_Int */ |
| 119007 | GR32, VR128, |
| 119008 | /* VCVTTSS2USI64Zrm */ |
| 119009 | GR64, f32mem, |
| 119010 | /* VCVTTSS2USI64Zrm_Int */ |
| 119011 | GR64, ssmem, |
| 119012 | /* VCVTTSS2USI64Zrr */ |
| 119013 | GR64, FR32X, |
| 119014 | /* VCVTTSS2USI64Zrr_Int */ |
| 119015 | GR64, VR128X, |
| 119016 | /* VCVTTSS2USI64Zrrb_Int */ |
| 119017 | GR64, VR128X, |
| 119018 | /* VCVTTSS2USIZrm */ |
| 119019 | GR32, f32mem, |
| 119020 | /* VCVTTSS2USIZrm_Int */ |
| 119021 | GR32, ssmem, |
| 119022 | /* VCVTTSS2USIZrr */ |
| 119023 | GR32, FR32X, |
| 119024 | /* VCVTTSS2USIZrr_Int */ |
| 119025 | GR32, VR128X, |
| 119026 | /* VCVTTSS2USIZrrb_Int */ |
| 119027 | GR32, VR128X, |
| 119028 | /* VCVTUDQ2PDZ128rm */ |
| 119029 | VR128X, i64mem, |
| 119030 | /* VCVTUDQ2PDZ128rmb */ |
| 119031 | VR128X, i32mem, |
| 119032 | /* VCVTUDQ2PDZ128rmbk */ |
| 119033 | VR128X, VR128X, VK2WM, i32mem, |
| 119034 | /* VCVTUDQ2PDZ128rmbkz */ |
| 119035 | VR128X, VK2WM, i32mem, |
| 119036 | /* VCVTUDQ2PDZ128rmk */ |
| 119037 | VR128X, VR128X, VK2WM, i64mem, |
| 119038 | /* VCVTUDQ2PDZ128rmkz */ |
| 119039 | VR128X, VK2WM, i64mem, |
| 119040 | /* VCVTUDQ2PDZ128rr */ |
| 119041 | VR128X, VR128X, |
| 119042 | /* VCVTUDQ2PDZ128rrk */ |
| 119043 | VR128X, VR128X, VK2WM, VR128X, |
| 119044 | /* VCVTUDQ2PDZ128rrkz */ |
| 119045 | VR128X, VK2WM, VR128X, |
| 119046 | /* VCVTUDQ2PDZ256rm */ |
| 119047 | VR256X, i128mem, |
| 119048 | /* VCVTUDQ2PDZ256rmb */ |
| 119049 | VR256X, i32mem, |
| 119050 | /* VCVTUDQ2PDZ256rmbk */ |
| 119051 | VR256X, VR256X, VK4WM, i32mem, |
| 119052 | /* VCVTUDQ2PDZ256rmbkz */ |
| 119053 | VR256X, VK4WM, i32mem, |
| 119054 | /* VCVTUDQ2PDZ256rmk */ |
| 119055 | VR256X, VR256X, VK4WM, i128mem, |
| 119056 | /* VCVTUDQ2PDZ256rmkz */ |
| 119057 | VR256X, VK4WM, i128mem, |
| 119058 | /* VCVTUDQ2PDZ256rr */ |
| 119059 | VR256X, VR128X, |
| 119060 | /* VCVTUDQ2PDZ256rrk */ |
| 119061 | VR256X, VR256X, VK4WM, VR128X, |
| 119062 | /* VCVTUDQ2PDZ256rrkz */ |
| 119063 | VR256X, VK4WM, VR128X, |
| 119064 | /* VCVTUDQ2PDZrm */ |
| 119065 | VR512, i256mem, |
| 119066 | /* VCVTUDQ2PDZrmb */ |
| 119067 | VR512, i32mem, |
| 119068 | /* VCVTUDQ2PDZrmbk */ |
| 119069 | VR512, VR512, VK8WM, i32mem, |
| 119070 | /* VCVTUDQ2PDZrmbkz */ |
| 119071 | VR512, VK8WM, i32mem, |
| 119072 | /* VCVTUDQ2PDZrmk */ |
| 119073 | VR512, VR512, VK8WM, i256mem, |
| 119074 | /* VCVTUDQ2PDZrmkz */ |
| 119075 | VR512, VK8WM, i256mem, |
| 119076 | /* VCVTUDQ2PDZrr */ |
| 119077 | VR512, VR256X, |
| 119078 | /* VCVTUDQ2PDZrrk */ |
| 119079 | VR512, VR512, VK8WM, VR256X, |
| 119080 | /* VCVTUDQ2PDZrrkz */ |
| 119081 | VR512, VK8WM, VR256X, |
| 119082 | /* VCVTUDQ2PHZ128rm */ |
| 119083 | VR128X, i128mem, |
| 119084 | /* VCVTUDQ2PHZ128rmb */ |
| 119085 | VR128X, i32mem, |
| 119086 | /* VCVTUDQ2PHZ128rmbk */ |
| 119087 | VR128X, VR128X, VK4WM, i32mem, |
| 119088 | /* VCVTUDQ2PHZ128rmbkz */ |
| 119089 | VR128X, VK4WM, i32mem, |
| 119090 | /* VCVTUDQ2PHZ128rmk */ |
| 119091 | VR128X, VR128X, VK4WM, i128mem, |
| 119092 | /* VCVTUDQ2PHZ128rmkz */ |
| 119093 | VR128X, VK4WM, i128mem, |
| 119094 | /* VCVTUDQ2PHZ128rr */ |
| 119095 | VR128X, VR128X, |
| 119096 | /* VCVTUDQ2PHZ128rrk */ |
| 119097 | VR128X, VR128X, VK4WM, VR128X, |
| 119098 | /* VCVTUDQ2PHZ128rrkz */ |
| 119099 | VR128X, VK4WM, VR128X, |
| 119100 | /* VCVTUDQ2PHZ256rm */ |
| 119101 | VR128X, i256mem, |
| 119102 | /* VCVTUDQ2PHZ256rmb */ |
| 119103 | VR128X, i32mem, |
| 119104 | /* VCVTUDQ2PHZ256rmbk */ |
| 119105 | VR128X, VR128X, VK8WM, i32mem, |
| 119106 | /* VCVTUDQ2PHZ256rmbkz */ |
| 119107 | VR128X, VK8WM, i32mem, |
| 119108 | /* VCVTUDQ2PHZ256rmk */ |
| 119109 | VR128X, VR128X, VK8WM, i256mem, |
| 119110 | /* VCVTUDQ2PHZ256rmkz */ |
| 119111 | VR128X, VK8WM, i256mem, |
| 119112 | /* VCVTUDQ2PHZ256rr */ |
| 119113 | VR128X, VR256X, |
| 119114 | /* VCVTUDQ2PHZ256rrk */ |
| 119115 | VR128X, VR128X, VK8WM, VR256X, |
| 119116 | /* VCVTUDQ2PHZ256rrkz */ |
| 119117 | VR128X, VK8WM, VR256X, |
| 119118 | /* VCVTUDQ2PHZrm */ |
| 119119 | VR256X, i512mem, |
| 119120 | /* VCVTUDQ2PHZrmb */ |
| 119121 | VR256X, i32mem, |
| 119122 | /* VCVTUDQ2PHZrmbk */ |
| 119123 | VR256X, VR256X, VK16WM, i32mem, |
| 119124 | /* VCVTUDQ2PHZrmbkz */ |
| 119125 | VR256X, VK16WM, i32mem, |
| 119126 | /* VCVTUDQ2PHZrmk */ |
| 119127 | VR256X, VR256X, VK16WM, i512mem, |
| 119128 | /* VCVTUDQ2PHZrmkz */ |
| 119129 | VR256X, VK16WM, i512mem, |
| 119130 | /* VCVTUDQ2PHZrr */ |
| 119131 | VR256X, VR512, |
| 119132 | /* VCVTUDQ2PHZrrb */ |
| 119133 | VR256X, VR512, AVX512RC, |
| 119134 | /* VCVTUDQ2PHZrrbk */ |
| 119135 | VR256X, VR256X, VK16WM, VR512, AVX512RC, |
| 119136 | /* VCVTUDQ2PHZrrbkz */ |
| 119137 | VR256X, VK16WM, VR512, AVX512RC, |
| 119138 | /* VCVTUDQ2PHZrrk */ |
| 119139 | VR256X, VR256X, VK16WM, VR512, |
| 119140 | /* VCVTUDQ2PHZrrkz */ |
| 119141 | VR256X, VK16WM, VR512, |
| 119142 | /* VCVTUDQ2PSZ128rm */ |
| 119143 | VR128X, i128mem, |
| 119144 | /* VCVTUDQ2PSZ128rmb */ |
| 119145 | VR128X, i32mem, |
| 119146 | /* VCVTUDQ2PSZ128rmbk */ |
| 119147 | VR128X, VR128X, VK4WM, i32mem, |
| 119148 | /* VCVTUDQ2PSZ128rmbkz */ |
| 119149 | VR128X, VK4WM, i32mem, |
| 119150 | /* VCVTUDQ2PSZ128rmk */ |
| 119151 | VR128X, VR128X, VK4WM, i128mem, |
| 119152 | /* VCVTUDQ2PSZ128rmkz */ |
| 119153 | VR128X, VK4WM, i128mem, |
| 119154 | /* VCVTUDQ2PSZ128rr */ |
| 119155 | VR128X, VR128X, |
| 119156 | /* VCVTUDQ2PSZ128rrk */ |
| 119157 | VR128X, VR128X, VK4WM, VR128X, |
| 119158 | /* VCVTUDQ2PSZ128rrkz */ |
| 119159 | VR128X, VK4WM, VR128X, |
| 119160 | /* VCVTUDQ2PSZ256rm */ |
| 119161 | VR256X, i256mem, |
| 119162 | /* VCVTUDQ2PSZ256rmb */ |
| 119163 | VR256X, i32mem, |
| 119164 | /* VCVTUDQ2PSZ256rmbk */ |
| 119165 | VR256X, VR256X, VK8WM, i32mem, |
| 119166 | /* VCVTUDQ2PSZ256rmbkz */ |
| 119167 | VR256X, VK8WM, i32mem, |
| 119168 | /* VCVTUDQ2PSZ256rmk */ |
| 119169 | VR256X, VR256X, VK8WM, i256mem, |
| 119170 | /* VCVTUDQ2PSZ256rmkz */ |
| 119171 | VR256X, VK8WM, i256mem, |
| 119172 | /* VCVTUDQ2PSZ256rr */ |
| 119173 | VR256X, VR256X, |
| 119174 | /* VCVTUDQ2PSZ256rrk */ |
| 119175 | VR256X, VR256X, VK8WM, VR256X, |
| 119176 | /* VCVTUDQ2PSZ256rrkz */ |
| 119177 | VR256X, VK8WM, VR256X, |
| 119178 | /* VCVTUDQ2PSZrm */ |
| 119179 | VR512, i512mem, |
| 119180 | /* VCVTUDQ2PSZrmb */ |
| 119181 | VR512, i32mem, |
| 119182 | /* VCVTUDQ2PSZrmbk */ |
| 119183 | VR512, VR512, VK16WM, i32mem, |
| 119184 | /* VCVTUDQ2PSZrmbkz */ |
| 119185 | VR512, VK16WM, i32mem, |
| 119186 | /* VCVTUDQ2PSZrmk */ |
| 119187 | VR512, VR512, VK16WM, i512mem, |
| 119188 | /* VCVTUDQ2PSZrmkz */ |
| 119189 | VR512, VK16WM, i512mem, |
| 119190 | /* VCVTUDQ2PSZrr */ |
| 119191 | VR512, VR512, |
| 119192 | /* VCVTUDQ2PSZrrb */ |
| 119193 | VR512, VR512, AVX512RC, |
| 119194 | /* VCVTUDQ2PSZrrbk */ |
| 119195 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 119196 | /* VCVTUDQ2PSZrrbkz */ |
| 119197 | VR512, VK16WM, VR512, AVX512RC, |
| 119198 | /* VCVTUDQ2PSZrrk */ |
| 119199 | VR512, VR512, VK16WM, VR512, |
| 119200 | /* VCVTUDQ2PSZrrkz */ |
| 119201 | VR512, VK16WM, VR512, |
| 119202 | /* VCVTUQQ2PDZ128rm */ |
| 119203 | VR128X, i128mem, |
| 119204 | /* VCVTUQQ2PDZ128rmb */ |
| 119205 | VR128X, i64mem, |
| 119206 | /* VCVTUQQ2PDZ128rmbk */ |
| 119207 | VR128X, VR128X, VK2WM, i64mem, |
| 119208 | /* VCVTUQQ2PDZ128rmbkz */ |
| 119209 | VR128X, VK2WM, i64mem, |
| 119210 | /* VCVTUQQ2PDZ128rmk */ |
| 119211 | VR128X, VR128X, VK2WM, i128mem, |
| 119212 | /* VCVTUQQ2PDZ128rmkz */ |
| 119213 | VR128X, VK2WM, i128mem, |
| 119214 | /* VCVTUQQ2PDZ128rr */ |
| 119215 | VR128X, VR128X, |
| 119216 | /* VCVTUQQ2PDZ128rrk */ |
| 119217 | VR128X, VR128X, VK2WM, VR128X, |
| 119218 | /* VCVTUQQ2PDZ128rrkz */ |
| 119219 | VR128X, VK2WM, VR128X, |
| 119220 | /* VCVTUQQ2PDZ256rm */ |
| 119221 | VR256X, i256mem, |
| 119222 | /* VCVTUQQ2PDZ256rmb */ |
| 119223 | VR256X, i64mem, |
| 119224 | /* VCVTUQQ2PDZ256rmbk */ |
| 119225 | VR256X, VR256X, VK4WM, i64mem, |
| 119226 | /* VCVTUQQ2PDZ256rmbkz */ |
| 119227 | VR256X, VK4WM, i64mem, |
| 119228 | /* VCVTUQQ2PDZ256rmk */ |
| 119229 | VR256X, VR256X, VK4WM, i256mem, |
| 119230 | /* VCVTUQQ2PDZ256rmkz */ |
| 119231 | VR256X, VK4WM, i256mem, |
| 119232 | /* VCVTUQQ2PDZ256rr */ |
| 119233 | VR256X, VR256X, |
| 119234 | /* VCVTUQQ2PDZ256rrk */ |
| 119235 | VR256X, VR256X, VK4WM, VR256X, |
| 119236 | /* VCVTUQQ2PDZ256rrkz */ |
| 119237 | VR256X, VK4WM, VR256X, |
| 119238 | /* VCVTUQQ2PDZrm */ |
| 119239 | VR512, i512mem, |
| 119240 | /* VCVTUQQ2PDZrmb */ |
| 119241 | VR512, i64mem, |
| 119242 | /* VCVTUQQ2PDZrmbk */ |
| 119243 | VR512, VR512, VK8WM, i64mem, |
| 119244 | /* VCVTUQQ2PDZrmbkz */ |
| 119245 | VR512, VK8WM, i64mem, |
| 119246 | /* VCVTUQQ2PDZrmk */ |
| 119247 | VR512, VR512, VK8WM, i512mem, |
| 119248 | /* VCVTUQQ2PDZrmkz */ |
| 119249 | VR512, VK8WM, i512mem, |
| 119250 | /* VCVTUQQ2PDZrr */ |
| 119251 | VR512, VR512, |
| 119252 | /* VCVTUQQ2PDZrrb */ |
| 119253 | VR512, VR512, AVX512RC, |
| 119254 | /* VCVTUQQ2PDZrrbk */ |
| 119255 | VR512, VR512, VK8WM, VR512, AVX512RC, |
| 119256 | /* VCVTUQQ2PDZrrbkz */ |
| 119257 | VR512, VK8WM, VR512, AVX512RC, |
| 119258 | /* VCVTUQQ2PDZrrk */ |
| 119259 | VR512, VR512, VK8WM, VR512, |
| 119260 | /* VCVTUQQ2PDZrrkz */ |
| 119261 | VR512, VK8WM, VR512, |
| 119262 | /* VCVTUQQ2PHZ128rm */ |
| 119263 | VR128X, i128mem, |
| 119264 | /* VCVTUQQ2PHZ128rmb */ |
| 119265 | VR128X, i64mem, |
| 119266 | /* VCVTUQQ2PHZ128rmbk */ |
| 119267 | VR128X, VR128X, VK2WM, i64mem, |
| 119268 | /* VCVTUQQ2PHZ128rmbkz */ |
| 119269 | VR128X, VK2WM, i64mem, |
| 119270 | /* VCVTUQQ2PHZ128rmk */ |
| 119271 | VR128X, VR128X, VK2WM, i128mem, |
| 119272 | /* VCVTUQQ2PHZ128rmkz */ |
| 119273 | VR128X, VK2WM, i128mem, |
| 119274 | /* VCVTUQQ2PHZ128rr */ |
| 119275 | VR128X, VR128X, |
| 119276 | /* VCVTUQQ2PHZ128rrk */ |
| 119277 | VR128X, VR128X, VK2WM, VR128X, |
| 119278 | /* VCVTUQQ2PHZ128rrkz */ |
| 119279 | VR128X, VK2WM, VR128X, |
| 119280 | /* VCVTUQQ2PHZ256rm */ |
| 119281 | VR128X, i256mem, |
| 119282 | /* VCVTUQQ2PHZ256rmb */ |
| 119283 | VR128X, i64mem, |
| 119284 | /* VCVTUQQ2PHZ256rmbk */ |
| 119285 | VR128X, VR128X, VK4WM, i64mem, |
| 119286 | /* VCVTUQQ2PHZ256rmbkz */ |
| 119287 | VR128X, VK4WM, i64mem, |
| 119288 | /* VCVTUQQ2PHZ256rmk */ |
| 119289 | VR128X, VR128X, VK4WM, i256mem, |
| 119290 | /* VCVTUQQ2PHZ256rmkz */ |
| 119291 | VR128X, VK4WM, i256mem, |
| 119292 | /* VCVTUQQ2PHZ256rr */ |
| 119293 | VR128X, VR256X, |
| 119294 | /* VCVTUQQ2PHZ256rrk */ |
| 119295 | VR128X, VR128X, VK4WM, VR256X, |
| 119296 | /* VCVTUQQ2PHZ256rrkz */ |
| 119297 | VR128X, VK4WM, VR256X, |
| 119298 | /* VCVTUQQ2PHZrm */ |
| 119299 | VR128X, i512mem, |
| 119300 | /* VCVTUQQ2PHZrmb */ |
| 119301 | VR128X, i64mem, |
| 119302 | /* VCVTUQQ2PHZrmbk */ |
| 119303 | VR128X, VR128X, VK8WM, i64mem, |
| 119304 | /* VCVTUQQ2PHZrmbkz */ |
| 119305 | VR128X, VK8WM, i64mem, |
| 119306 | /* VCVTUQQ2PHZrmk */ |
| 119307 | VR128X, VR128X, VK8WM, i512mem, |
| 119308 | /* VCVTUQQ2PHZrmkz */ |
| 119309 | VR128X, VK8WM, i512mem, |
| 119310 | /* VCVTUQQ2PHZrr */ |
| 119311 | VR128X, VR512, |
| 119312 | /* VCVTUQQ2PHZrrb */ |
| 119313 | VR128X, VR512, AVX512RC, |
| 119314 | /* VCVTUQQ2PHZrrbk */ |
| 119315 | VR128X, VR128X, VK8WM, VR512, AVX512RC, |
| 119316 | /* VCVTUQQ2PHZrrbkz */ |
| 119317 | VR128X, VK8WM, VR512, AVX512RC, |
| 119318 | /* VCVTUQQ2PHZrrk */ |
| 119319 | VR128X, VR128X, VK8WM, VR512, |
| 119320 | /* VCVTUQQ2PHZrrkz */ |
| 119321 | VR128X, VK8WM, VR512, |
| 119322 | /* VCVTUQQ2PSZ128rm */ |
| 119323 | VR128X, i128mem, |
| 119324 | /* VCVTUQQ2PSZ128rmb */ |
| 119325 | VR128X, i64mem, |
| 119326 | /* VCVTUQQ2PSZ128rmbk */ |
| 119327 | VR128X, VR128X, VK2WM, i64mem, |
| 119328 | /* VCVTUQQ2PSZ128rmbkz */ |
| 119329 | VR128X, VK2WM, i64mem, |
| 119330 | /* VCVTUQQ2PSZ128rmk */ |
| 119331 | VR128X, VR128X, VK2WM, i128mem, |
| 119332 | /* VCVTUQQ2PSZ128rmkz */ |
| 119333 | VR128X, VK2WM, i128mem, |
| 119334 | /* VCVTUQQ2PSZ128rr */ |
| 119335 | VR128X, VR128X, |
| 119336 | /* VCVTUQQ2PSZ128rrk */ |
| 119337 | VR128X, VR128X, VK2WM, VR128X, |
| 119338 | /* VCVTUQQ2PSZ128rrkz */ |
| 119339 | VR128X, VK2WM, VR128X, |
| 119340 | /* VCVTUQQ2PSZ256rm */ |
| 119341 | VR128X, i256mem, |
| 119342 | /* VCVTUQQ2PSZ256rmb */ |
| 119343 | VR128X, i64mem, |
| 119344 | /* VCVTUQQ2PSZ256rmbk */ |
| 119345 | VR128X, VR128X, VK4WM, i64mem, |
| 119346 | /* VCVTUQQ2PSZ256rmbkz */ |
| 119347 | VR128X, VK4WM, i64mem, |
| 119348 | /* VCVTUQQ2PSZ256rmk */ |
| 119349 | VR128X, VR128X, VK4WM, i256mem, |
| 119350 | /* VCVTUQQ2PSZ256rmkz */ |
| 119351 | VR128X, VK4WM, i256mem, |
| 119352 | /* VCVTUQQ2PSZ256rr */ |
| 119353 | VR128X, VR256X, |
| 119354 | /* VCVTUQQ2PSZ256rrk */ |
| 119355 | VR128X, VR128X, VK4WM, VR256X, |
| 119356 | /* VCVTUQQ2PSZ256rrkz */ |
| 119357 | VR128X, VK4WM, VR256X, |
| 119358 | /* VCVTUQQ2PSZrm */ |
| 119359 | VR256X, i512mem, |
| 119360 | /* VCVTUQQ2PSZrmb */ |
| 119361 | VR256X, i64mem, |
| 119362 | /* VCVTUQQ2PSZrmbk */ |
| 119363 | VR256X, VR256X, VK8WM, i64mem, |
| 119364 | /* VCVTUQQ2PSZrmbkz */ |
| 119365 | VR256X, VK8WM, i64mem, |
| 119366 | /* VCVTUQQ2PSZrmk */ |
| 119367 | VR256X, VR256X, VK8WM, i512mem, |
| 119368 | /* VCVTUQQ2PSZrmkz */ |
| 119369 | VR256X, VK8WM, i512mem, |
| 119370 | /* VCVTUQQ2PSZrr */ |
| 119371 | VR256X, VR512, |
| 119372 | /* VCVTUQQ2PSZrrb */ |
| 119373 | VR256X, VR512, AVX512RC, |
| 119374 | /* VCVTUQQ2PSZrrbk */ |
| 119375 | VR256X, VR256X, VK8WM, VR512, AVX512RC, |
| 119376 | /* VCVTUQQ2PSZrrbkz */ |
| 119377 | VR256X, VK8WM, VR512, AVX512RC, |
| 119378 | /* VCVTUQQ2PSZrrk */ |
| 119379 | VR256X, VR256X, VK8WM, VR512, |
| 119380 | /* VCVTUQQ2PSZrrkz */ |
| 119381 | VR256X, VK8WM, VR512, |
| 119382 | /* VCVTUSI2SDZrm */ |
| 119383 | FR64X, FR64X, i32mem, |
| 119384 | /* VCVTUSI2SDZrm_Int */ |
| 119385 | VR128X, VR128X, i32mem, |
| 119386 | /* VCVTUSI2SDZrr */ |
| 119387 | FR64X, FR64X, GR32, |
| 119388 | /* VCVTUSI2SDZrr_Int */ |
| 119389 | VR128X, VR128X, GR32, |
| 119390 | /* VCVTUSI2SHZrm */ |
| 119391 | FR16X, FR16X, i32mem, |
| 119392 | /* VCVTUSI2SHZrm_Int */ |
| 119393 | VR128X, VR128X, i32mem, |
| 119394 | /* VCVTUSI2SHZrr */ |
| 119395 | FR16X, FR16X, GR32, |
| 119396 | /* VCVTUSI2SHZrr_Int */ |
| 119397 | VR128X, VR128X, GR32, |
| 119398 | /* VCVTUSI2SHZrrb_Int */ |
| 119399 | VR128X, VR128X, GR32, AVX512RC, |
| 119400 | /* VCVTUSI2SSZrm */ |
| 119401 | FR32X, FR32X, i32mem, |
| 119402 | /* VCVTUSI2SSZrm_Int */ |
| 119403 | VR128X, VR128X, i32mem, |
| 119404 | /* VCVTUSI2SSZrr */ |
| 119405 | FR32X, FR32X, GR32, |
| 119406 | /* VCVTUSI2SSZrr_Int */ |
| 119407 | VR128X, VR128X, GR32, |
| 119408 | /* VCVTUSI2SSZrrb_Int */ |
| 119409 | VR128X, VR128X, GR32, AVX512RC, |
| 119410 | /* VCVTUSI642SDZrm */ |
| 119411 | FR64X, FR64X, i64mem, |
| 119412 | /* VCVTUSI642SDZrm_Int */ |
| 119413 | VR128X, VR128X, i64mem, |
| 119414 | /* VCVTUSI642SDZrr */ |
| 119415 | FR64X, FR64X, GR64, |
| 119416 | /* VCVTUSI642SDZrr_Int */ |
| 119417 | VR128X, VR128X, GR64, |
| 119418 | /* VCVTUSI642SDZrrb_Int */ |
| 119419 | VR128X, VR128X, GR64, AVX512RC, |
| 119420 | /* VCVTUSI642SHZrm */ |
| 119421 | FR16X, FR16X, i64mem, |
| 119422 | /* VCVTUSI642SHZrm_Int */ |
| 119423 | VR128X, VR128X, i64mem, |
| 119424 | /* VCVTUSI642SHZrr */ |
| 119425 | FR16X, FR16X, GR64, |
| 119426 | /* VCVTUSI642SHZrr_Int */ |
| 119427 | VR128X, VR128X, GR64, |
| 119428 | /* VCVTUSI642SHZrrb_Int */ |
| 119429 | VR128X, VR128X, GR64, AVX512RC, |
| 119430 | /* VCVTUSI642SSZrm */ |
| 119431 | FR32X, FR32X, i64mem, |
| 119432 | /* VCVTUSI642SSZrm_Int */ |
| 119433 | VR128X, VR128X, i64mem, |
| 119434 | /* VCVTUSI642SSZrr */ |
| 119435 | FR32X, FR32X, GR64, |
| 119436 | /* VCVTUSI642SSZrr_Int */ |
| 119437 | VR128X, VR128X, GR64, |
| 119438 | /* VCVTUSI642SSZrrb_Int */ |
| 119439 | VR128X, VR128X, GR64, AVX512RC, |
| 119440 | /* VCVTUW2PHZ128rm */ |
| 119441 | VR128X, i128mem, |
| 119442 | /* VCVTUW2PHZ128rmb */ |
| 119443 | VR128X, i16mem, |
| 119444 | /* VCVTUW2PHZ128rmbk */ |
| 119445 | VR128X, VR128X, VK8WM, i16mem, |
| 119446 | /* VCVTUW2PHZ128rmbkz */ |
| 119447 | VR128X, VK8WM, i16mem, |
| 119448 | /* VCVTUW2PHZ128rmk */ |
| 119449 | VR128X, VR128X, VK8WM, i128mem, |
| 119450 | /* VCVTUW2PHZ128rmkz */ |
| 119451 | VR128X, VK8WM, i128mem, |
| 119452 | /* VCVTUW2PHZ128rr */ |
| 119453 | VR128X, VR128X, |
| 119454 | /* VCVTUW2PHZ128rrk */ |
| 119455 | VR128X, VR128X, VK8WM, VR128X, |
| 119456 | /* VCVTUW2PHZ128rrkz */ |
| 119457 | VR128X, VK8WM, VR128X, |
| 119458 | /* VCVTUW2PHZ256rm */ |
| 119459 | VR256X, i256mem, |
| 119460 | /* VCVTUW2PHZ256rmb */ |
| 119461 | VR256X, i16mem, |
| 119462 | /* VCVTUW2PHZ256rmbk */ |
| 119463 | VR256X, VR256X, VK16WM, i16mem, |
| 119464 | /* VCVTUW2PHZ256rmbkz */ |
| 119465 | VR256X, VK16WM, i16mem, |
| 119466 | /* VCVTUW2PHZ256rmk */ |
| 119467 | VR256X, VR256X, VK16WM, i256mem, |
| 119468 | /* VCVTUW2PHZ256rmkz */ |
| 119469 | VR256X, VK16WM, i256mem, |
| 119470 | /* VCVTUW2PHZ256rr */ |
| 119471 | VR256X, VR256X, |
| 119472 | /* VCVTUW2PHZ256rrk */ |
| 119473 | VR256X, VR256X, VK16WM, VR256X, |
| 119474 | /* VCVTUW2PHZ256rrkz */ |
| 119475 | VR256X, VK16WM, VR256X, |
| 119476 | /* VCVTUW2PHZrm */ |
| 119477 | VR512, i512mem, |
| 119478 | /* VCVTUW2PHZrmb */ |
| 119479 | VR512, i16mem, |
| 119480 | /* VCVTUW2PHZrmbk */ |
| 119481 | VR512, VR512, VK32WM, i16mem, |
| 119482 | /* VCVTUW2PHZrmbkz */ |
| 119483 | VR512, VK32WM, i16mem, |
| 119484 | /* VCVTUW2PHZrmk */ |
| 119485 | VR512, VR512, VK32WM, i512mem, |
| 119486 | /* VCVTUW2PHZrmkz */ |
| 119487 | VR512, VK32WM, i512mem, |
| 119488 | /* VCVTUW2PHZrr */ |
| 119489 | VR512, VR512, |
| 119490 | /* VCVTUW2PHZrrb */ |
| 119491 | VR512, VR512, AVX512RC, |
| 119492 | /* VCVTUW2PHZrrbk */ |
| 119493 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 119494 | /* VCVTUW2PHZrrbkz */ |
| 119495 | VR512, VK32WM, VR512, AVX512RC, |
| 119496 | /* VCVTUW2PHZrrk */ |
| 119497 | VR512, VR512, VK32WM, VR512, |
| 119498 | /* VCVTUW2PHZrrkz */ |
| 119499 | VR512, VK32WM, VR512, |
| 119500 | /* VCVTW2PHZ128rm */ |
| 119501 | VR128X, i128mem, |
| 119502 | /* VCVTW2PHZ128rmb */ |
| 119503 | VR128X, i16mem, |
| 119504 | /* VCVTW2PHZ128rmbk */ |
| 119505 | VR128X, VR128X, VK8WM, i16mem, |
| 119506 | /* VCVTW2PHZ128rmbkz */ |
| 119507 | VR128X, VK8WM, i16mem, |
| 119508 | /* VCVTW2PHZ128rmk */ |
| 119509 | VR128X, VR128X, VK8WM, i128mem, |
| 119510 | /* VCVTW2PHZ128rmkz */ |
| 119511 | VR128X, VK8WM, i128mem, |
| 119512 | /* VCVTW2PHZ128rr */ |
| 119513 | VR128X, VR128X, |
| 119514 | /* VCVTW2PHZ128rrk */ |
| 119515 | VR128X, VR128X, VK8WM, VR128X, |
| 119516 | /* VCVTW2PHZ128rrkz */ |
| 119517 | VR128X, VK8WM, VR128X, |
| 119518 | /* VCVTW2PHZ256rm */ |
| 119519 | VR256X, i256mem, |
| 119520 | /* VCVTW2PHZ256rmb */ |
| 119521 | VR256X, i16mem, |
| 119522 | /* VCVTW2PHZ256rmbk */ |
| 119523 | VR256X, VR256X, VK16WM, i16mem, |
| 119524 | /* VCVTW2PHZ256rmbkz */ |
| 119525 | VR256X, VK16WM, i16mem, |
| 119526 | /* VCVTW2PHZ256rmk */ |
| 119527 | VR256X, VR256X, VK16WM, i256mem, |
| 119528 | /* VCVTW2PHZ256rmkz */ |
| 119529 | VR256X, VK16WM, i256mem, |
| 119530 | /* VCVTW2PHZ256rr */ |
| 119531 | VR256X, VR256X, |
| 119532 | /* VCVTW2PHZ256rrk */ |
| 119533 | VR256X, VR256X, VK16WM, VR256X, |
| 119534 | /* VCVTW2PHZ256rrkz */ |
| 119535 | VR256X, VK16WM, VR256X, |
| 119536 | /* VCVTW2PHZrm */ |
| 119537 | VR512, i512mem, |
| 119538 | /* VCVTW2PHZrmb */ |
| 119539 | VR512, i16mem, |
| 119540 | /* VCVTW2PHZrmbk */ |
| 119541 | VR512, VR512, VK32WM, i16mem, |
| 119542 | /* VCVTW2PHZrmbkz */ |
| 119543 | VR512, VK32WM, i16mem, |
| 119544 | /* VCVTW2PHZrmk */ |
| 119545 | VR512, VR512, VK32WM, i512mem, |
| 119546 | /* VCVTW2PHZrmkz */ |
| 119547 | VR512, VK32WM, i512mem, |
| 119548 | /* VCVTW2PHZrr */ |
| 119549 | VR512, VR512, |
| 119550 | /* VCVTW2PHZrrb */ |
| 119551 | VR512, VR512, AVX512RC, |
| 119552 | /* VCVTW2PHZrrbk */ |
| 119553 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 119554 | /* VCVTW2PHZrrbkz */ |
| 119555 | VR512, VK32WM, VR512, AVX512RC, |
| 119556 | /* VCVTW2PHZrrk */ |
| 119557 | VR512, VR512, VK32WM, VR512, |
| 119558 | /* VCVTW2PHZrrkz */ |
| 119559 | VR512, VK32WM, VR512, |
| 119560 | /* VDBPSADBWZ128rmi */ |
| 119561 | VR128X, VR128X, i128mem, u8imm, |
| 119562 | /* VDBPSADBWZ128rmik */ |
| 119563 | VR128X, VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 119564 | /* VDBPSADBWZ128rmikz */ |
| 119565 | VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 119566 | /* VDBPSADBWZ128rri */ |
| 119567 | VR128X, VR128X, VR128X, u8imm, |
| 119568 | /* VDBPSADBWZ128rrik */ |
| 119569 | VR128X, VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 119570 | /* VDBPSADBWZ128rrikz */ |
| 119571 | VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 119572 | /* VDBPSADBWZ256rmi */ |
| 119573 | VR256X, VR256X, i256mem, u8imm, |
| 119574 | /* VDBPSADBWZ256rmik */ |
| 119575 | VR256X, VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 119576 | /* VDBPSADBWZ256rmikz */ |
| 119577 | VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 119578 | /* VDBPSADBWZ256rri */ |
| 119579 | VR256X, VR256X, VR256X, u8imm, |
| 119580 | /* VDBPSADBWZ256rrik */ |
| 119581 | VR256X, VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 119582 | /* VDBPSADBWZ256rrikz */ |
| 119583 | VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 119584 | /* VDBPSADBWZrmi */ |
| 119585 | VR512, VR512, i512mem, u8imm, |
| 119586 | /* VDBPSADBWZrmik */ |
| 119587 | VR512, VR512, VK32WM, VR512, i512mem, u8imm, |
| 119588 | /* VDBPSADBWZrmikz */ |
| 119589 | VR512, VK32WM, VR512, i512mem, u8imm, |
| 119590 | /* VDBPSADBWZrri */ |
| 119591 | VR512, VR512, VR512, u8imm, |
| 119592 | /* VDBPSADBWZrrik */ |
| 119593 | VR512, VR512, VK32WM, VR512, VR512, u8imm, |
| 119594 | /* VDBPSADBWZrrikz */ |
| 119595 | VR512, VK32WM, VR512, VR512, u8imm, |
| 119596 | /* VDIVPDYrm */ |
| 119597 | VR256, VR256, f256mem, |
| 119598 | /* VDIVPDYrr */ |
| 119599 | VR256, VR256, VR256, |
| 119600 | /* VDIVPDZ128rm */ |
| 119601 | VR128X, VR128X, f128mem, |
| 119602 | /* VDIVPDZ128rmb */ |
| 119603 | VR128X, VR128X, f64mem, |
| 119604 | /* VDIVPDZ128rmbk */ |
| 119605 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 119606 | /* VDIVPDZ128rmbkz */ |
| 119607 | VR128X, VK2WM, VR128X, f64mem, |
| 119608 | /* VDIVPDZ128rmk */ |
| 119609 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 119610 | /* VDIVPDZ128rmkz */ |
| 119611 | VR128X, VK2WM, VR128X, f128mem, |
| 119612 | /* VDIVPDZ128rr */ |
| 119613 | VR128X, VR128X, VR128X, |
| 119614 | /* VDIVPDZ128rrk */ |
| 119615 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 119616 | /* VDIVPDZ128rrkz */ |
| 119617 | VR128X, VK2WM, VR128X, VR128X, |
| 119618 | /* VDIVPDZ256rm */ |
| 119619 | VR256X, VR256X, f256mem, |
| 119620 | /* VDIVPDZ256rmb */ |
| 119621 | VR256X, VR256X, f64mem, |
| 119622 | /* VDIVPDZ256rmbk */ |
| 119623 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 119624 | /* VDIVPDZ256rmbkz */ |
| 119625 | VR256X, VK4WM, VR256X, f64mem, |
| 119626 | /* VDIVPDZ256rmk */ |
| 119627 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 119628 | /* VDIVPDZ256rmkz */ |
| 119629 | VR256X, VK4WM, VR256X, f256mem, |
| 119630 | /* VDIVPDZ256rr */ |
| 119631 | VR256X, VR256X, VR256X, |
| 119632 | /* VDIVPDZ256rrk */ |
| 119633 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 119634 | /* VDIVPDZ256rrkz */ |
| 119635 | VR256X, VK4WM, VR256X, VR256X, |
| 119636 | /* VDIVPDZrm */ |
| 119637 | VR512, VR512, f512mem, |
| 119638 | /* VDIVPDZrmb */ |
| 119639 | VR512, VR512, f64mem, |
| 119640 | /* VDIVPDZrmbk */ |
| 119641 | VR512, VR512, VK8WM, VR512, f64mem, |
| 119642 | /* VDIVPDZrmbkz */ |
| 119643 | VR512, VK8WM, VR512, f64mem, |
| 119644 | /* VDIVPDZrmk */ |
| 119645 | VR512, VR512, VK8WM, VR512, f512mem, |
| 119646 | /* VDIVPDZrmkz */ |
| 119647 | VR512, VK8WM, VR512, f512mem, |
| 119648 | /* VDIVPDZrr */ |
| 119649 | VR512, VR512, VR512, |
| 119650 | /* VDIVPDZrrb */ |
| 119651 | VR512, VR512, VR512, AVX512RC, |
| 119652 | /* VDIVPDZrrbk */ |
| 119653 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 119654 | /* VDIVPDZrrbkz */ |
| 119655 | VR512, VK8WM, VR512, VR512, AVX512RC, |
| 119656 | /* VDIVPDZrrk */ |
| 119657 | VR512, VR512, VK8WM, VR512, VR512, |
| 119658 | /* VDIVPDZrrkz */ |
| 119659 | VR512, VK8WM, VR512, VR512, |
| 119660 | /* VDIVPDrm */ |
| 119661 | VR128, VR128, f128mem, |
| 119662 | /* VDIVPDrr */ |
| 119663 | VR128, VR128, VR128, |
| 119664 | /* VDIVPHZ128rm */ |
| 119665 | VR128X, VR128X, f128mem, |
| 119666 | /* VDIVPHZ128rmb */ |
| 119667 | VR128X, VR128X, f16mem, |
| 119668 | /* VDIVPHZ128rmbk */ |
| 119669 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 119670 | /* VDIVPHZ128rmbkz */ |
| 119671 | VR128X, VK8WM, VR128X, f16mem, |
| 119672 | /* VDIVPHZ128rmk */ |
| 119673 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 119674 | /* VDIVPHZ128rmkz */ |
| 119675 | VR128X, VK8WM, VR128X, f128mem, |
| 119676 | /* VDIVPHZ128rr */ |
| 119677 | VR128X, VR128X, VR128X, |
| 119678 | /* VDIVPHZ128rrk */ |
| 119679 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 119680 | /* VDIVPHZ128rrkz */ |
| 119681 | VR128X, VK8WM, VR128X, VR128X, |
| 119682 | /* VDIVPHZ256rm */ |
| 119683 | VR256X, VR256X, f256mem, |
| 119684 | /* VDIVPHZ256rmb */ |
| 119685 | VR256X, VR256X, f16mem, |
| 119686 | /* VDIVPHZ256rmbk */ |
| 119687 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 119688 | /* VDIVPHZ256rmbkz */ |
| 119689 | VR256X, VK16WM, VR256X, f16mem, |
| 119690 | /* VDIVPHZ256rmk */ |
| 119691 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 119692 | /* VDIVPHZ256rmkz */ |
| 119693 | VR256X, VK16WM, VR256X, f256mem, |
| 119694 | /* VDIVPHZ256rr */ |
| 119695 | VR256X, VR256X, VR256X, |
| 119696 | /* VDIVPHZ256rrk */ |
| 119697 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 119698 | /* VDIVPHZ256rrkz */ |
| 119699 | VR256X, VK16WM, VR256X, VR256X, |
| 119700 | /* VDIVPHZrm */ |
| 119701 | VR512, VR512, f512mem, |
| 119702 | /* VDIVPHZrmb */ |
| 119703 | VR512, VR512, f16mem, |
| 119704 | /* VDIVPHZrmbk */ |
| 119705 | VR512, VR512, VK32WM, VR512, f16mem, |
| 119706 | /* VDIVPHZrmbkz */ |
| 119707 | VR512, VK32WM, VR512, f16mem, |
| 119708 | /* VDIVPHZrmk */ |
| 119709 | VR512, VR512, VK32WM, VR512, f512mem, |
| 119710 | /* VDIVPHZrmkz */ |
| 119711 | VR512, VK32WM, VR512, f512mem, |
| 119712 | /* VDIVPHZrr */ |
| 119713 | VR512, VR512, VR512, |
| 119714 | /* VDIVPHZrrb */ |
| 119715 | VR512, VR512, VR512, AVX512RC, |
| 119716 | /* VDIVPHZrrbk */ |
| 119717 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 119718 | /* VDIVPHZrrbkz */ |
| 119719 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 119720 | /* VDIVPHZrrk */ |
| 119721 | VR512, VR512, VK32WM, VR512, VR512, |
| 119722 | /* VDIVPHZrrkz */ |
| 119723 | VR512, VK32WM, VR512, VR512, |
| 119724 | /* VDIVPSYrm */ |
| 119725 | VR256, VR256, f256mem, |
| 119726 | /* VDIVPSYrr */ |
| 119727 | VR256, VR256, VR256, |
| 119728 | /* VDIVPSZ128rm */ |
| 119729 | VR128X, VR128X, f128mem, |
| 119730 | /* VDIVPSZ128rmb */ |
| 119731 | VR128X, VR128X, f32mem, |
| 119732 | /* VDIVPSZ128rmbk */ |
| 119733 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 119734 | /* VDIVPSZ128rmbkz */ |
| 119735 | VR128X, VK4WM, VR128X, f32mem, |
| 119736 | /* VDIVPSZ128rmk */ |
| 119737 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 119738 | /* VDIVPSZ128rmkz */ |
| 119739 | VR128X, VK4WM, VR128X, f128mem, |
| 119740 | /* VDIVPSZ128rr */ |
| 119741 | VR128X, VR128X, VR128X, |
| 119742 | /* VDIVPSZ128rrk */ |
| 119743 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 119744 | /* VDIVPSZ128rrkz */ |
| 119745 | VR128X, VK4WM, VR128X, VR128X, |
| 119746 | /* VDIVPSZ256rm */ |
| 119747 | VR256X, VR256X, f256mem, |
| 119748 | /* VDIVPSZ256rmb */ |
| 119749 | VR256X, VR256X, f32mem, |
| 119750 | /* VDIVPSZ256rmbk */ |
| 119751 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 119752 | /* VDIVPSZ256rmbkz */ |
| 119753 | VR256X, VK8WM, VR256X, f32mem, |
| 119754 | /* VDIVPSZ256rmk */ |
| 119755 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 119756 | /* VDIVPSZ256rmkz */ |
| 119757 | VR256X, VK8WM, VR256X, f256mem, |
| 119758 | /* VDIVPSZ256rr */ |
| 119759 | VR256X, VR256X, VR256X, |
| 119760 | /* VDIVPSZ256rrk */ |
| 119761 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 119762 | /* VDIVPSZ256rrkz */ |
| 119763 | VR256X, VK8WM, VR256X, VR256X, |
| 119764 | /* VDIVPSZrm */ |
| 119765 | VR512, VR512, f512mem, |
| 119766 | /* VDIVPSZrmb */ |
| 119767 | VR512, VR512, f32mem, |
| 119768 | /* VDIVPSZrmbk */ |
| 119769 | VR512, VR512, VK16WM, VR512, f32mem, |
| 119770 | /* VDIVPSZrmbkz */ |
| 119771 | VR512, VK16WM, VR512, f32mem, |
| 119772 | /* VDIVPSZrmk */ |
| 119773 | VR512, VR512, VK16WM, VR512, f512mem, |
| 119774 | /* VDIVPSZrmkz */ |
| 119775 | VR512, VK16WM, VR512, f512mem, |
| 119776 | /* VDIVPSZrr */ |
| 119777 | VR512, VR512, VR512, |
| 119778 | /* VDIVPSZrrb */ |
| 119779 | VR512, VR512, VR512, AVX512RC, |
| 119780 | /* VDIVPSZrrbk */ |
| 119781 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 119782 | /* VDIVPSZrrbkz */ |
| 119783 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 119784 | /* VDIVPSZrrk */ |
| 119785 | VR512, VR512, VK16WM, VR512, VR512, |
| 119786 | /* VDIVPSZrrkz */ |
| 119787 | VR512, VK16WM, VR512, VR512, |
| 119788 | /* VDIVPSrm */ |
| 119789 | VR128, VR128, f128mem, |
| 119790 | /* VDIVPSrr */ |
| 119791 | VR128, VR128, VR128, |
| 119792 | /* VDIVSDZrm */ |
| 119793 | FR64X, FR64X, f64mem, |
| 119794 | /* VDIVSDZrm_Int */ |
| 119795 | VR128X, VR128X, sdmem, |
| 119796 | /* VDIVSDZrm_Intk */ |
| 119797 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 119798 | /* VDIVSDZrm_Intkz */ |
| 119799 | VR128X, VK1WM, VR128X, sdmem, |
| 119800 | /* VDIVSDZrr */ |
| 119801 | FR64X, FR64X, FR64X, |
| 119802 | /* VDIVSDZrr_Int */ |
| 119803 | VR128X, VR128X, VR128X, |
| 119804 | /* VDIVSDZrr_Intk */ |
| 119805 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119806 | /* VDIVSDZrr_Intkz */ |
| 119807 | VR128X, VK1WM, VR128X, VR128X, |
| 119808 | /* VDIVSDZrrb_Int */ |
| 119809 | VR128X, VR128X, VR128X, AVX512RC, |
| 119810 | /* VDIVSDZrrb_Intk */ |
| 119811 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119812 | /* VDIVSDZrrb_Intkz */ |
| 119813 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119814 | /* VDIVSDrm */ |
| 119815 | FR64, FR64, f64mem, |
| 119816 | /* VDIVSDrm_Int */ |
| 119817 | VR128, VR128, sdmem, |
| 119818 | /* VDIVSDrr */ |
| 119819 | FR64, FR64, FR64, |
| 119820 | /* VDIVSDrr_Int */ |
| 119821 | VR128, VR128, VR128, |
| 119822 | /* VDIVSHZrm */ |
| 119823 | FR16X, FR16X, f16mem, |
| 119824 | /* VDIVSHZrm_Int */ |
| 119825 | VR128X, VR128X, shmem, |
| 119826 | /* VDIVSHZrm_Intk */ |
| 119827 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 119828 | /* VDIVSHZrm_Intkz */ |
| 119829 | VR128X, VK1WM, VR128X, shmem, |
| 119830 | /* VDIVSHZrr */ |
| 119831 | FR16X, FR16X, FR16X, |
| 119832 | /* VDIVSHZrr_Int */ |
| 119833 | VR128X, VR128X, VR128X, |
| 119834 | /* VDIVSHZrr_Intk */ |
| 119835 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119836 | /* VDIVSHZrr_Intkz */ |
| 119837 | VR128X, VK1WM, VR128X, VR128X, |
| 119838 | /* VDIVSHZrrb_Int */ |
| 119839 | VR128X, VR128X, VR128X, AVX512RC, |
| 119840 | /* VDIVSHZrrb_Intk */ |
| 119841 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119842 | /* VDIVSHZrrb_Intkz */ |
| 119843 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119844 | /* VDIVSSZrm */ |
| 119845 | FR32X, FR32X, f32mem, |
| 119846 | /* VDIVSSZrm_Int */ |
| 119847 | VR128X, VR128X, ssmem, |
| 119848 | /* VDIVSSZrm_Intk */ |
| 119849 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 119850 | /* VDIVSSZrm_Intkz */ |
| 119851 | VR128X, VK1WM, VR128X, ssmem, |
| 119852 | /* VDIVSSZrr */ |
| 119853 | FR32X, FR32X, FR32X, |
| 119854 | /* VDIVSSZrr_Int */ |
| 119855 | VR128X, VR128X, VR128X, |
| 119856 | /* VDIVSSZrr_Intk */ |
| 119857 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 119858 | /* VDIVSSZrr_Intkz */ |
| 119859 | VR128X, VK1WM, VR128X, VR128X, |
| 119860 | /* VDIVSSZrrb_Int */ |
| 119861 | VR128X, VR128X, VR128X, AVX512RC, |
| 119862 | /* VDIVSSZrrb_Intk */ |
| 119863 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119864 | /* VDIVSSZrrb_Intkz */ |
| 119865 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 119866 | /* VDIVSSrm */ |
| 119867 | FR32, FR32, f32mem, |
| 119868 | /* VDIVSSrm_Int */ |
| 119869 | VR128, VR128, ssmem, |
| 119870 | /* VDIVSSrr */ |
| 119871 | FR32, FR32, FR32, |
| 119872 | /* VDIVSSrr_Int */ |
| 119873 | VR128, VR128, VR128, |
| 119874 | /* VDPBF16PSZ128m */ |
| 119875 | VR128X, VR128X, VR128X, f128mem, |
| 119876 | /* VDPBF16PSZ128mb */ |
| 119877 | VR128X, VR128X, VR128X, f32mem, |
| 119878 | /* VDPBF16PSZ128mbk */ |
| 119879 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 119880 | /* VDPBF16PSZ128mbkz */ |
| 119881 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 119882 | /* VDPBF16PSZ128mk */ |
| 119883 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 119884 | /* VDPBF16PSZ128mkz */ |
| 119885 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 119886 | /* VDPBF16PSZ128r */ |
| 119887 | VR128X, VR128X, VR128X, VR128X, |
| 119888 | /* VDPBF16PSZ128rk */ |
| 119889 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 119890 | /* VDPBF16PSZ128rkz */ |
| 119891 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 119892 | /* VDPBF16PSZ256m */ |
| 119893 | VR256X, VR256X, VR256X, f256mem, |
| 119894 | /* VDPBF16PSZ256mb */ |
| 119895 | VR256X, VR256X, VR256X, f32mem, |
| 119896 | /* VDPBF16PSZ256mbk */ |
| 119897 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 119898 | /* VDPBF16PSZ256mbkz */ |
| 119899 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 119900 | /* VDPBF16PSZ256mk */ |
| 119901 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 119902 | /* VDPBF16PSZ256mkz */ |
| 119903 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 119904 | /* VDPBF16PSZ256r */ |
| 119905 | VR256X, VR256X, VR256X, VR256X, |
| 119906 | /* VDPBF16PSZ256rk */ |
| 119907 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 119908 | /* VDPBF16PSZ256rkz */ |
| 119909 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 119910 | /* VDPBF16PSZm */ |
| 119911 | VR512, VR512, VR512, f512mem, |
| 119912 | /* VDPBF16PSZmb */ |
| 119913 | VR512, VR512, VR512, f32mem, |
| 119914 | /* VDPBF16PSZmbk */ |
| 119915 | VR512, VR512, VK16WM, VR512, f32mem, |
| 119916 | /* VDPBF16PSZmbkz */ |
| 119917 | VR512, VR512, VK16WM, VR512, f32mem, |
| 119918 | /* VDPBF16PSZmk */ |
| 119919 | VR512, VR512, VK16WM, VR512, f512mem, |
| 119920 | /* VDPBF16PSZmkz */ |
| 119921 | VR512, VR512, VK16WM, VR512, f512mem, |
| 119922 | /* VDPBF16PSZr */ |
| 119923 | VR512, VR512, VR512, VR512, |
| 119924 | /* VDPBF16PSZrk */ |
| 119925 | VR512, VR512, VK16WM, VR512, VR512, |
| 119926 | /* VDPBF16PSZrkz */ |
| 119927 | VR512, VR512, VK16WM, VR512, VR512, |
| 119928 | /* VDPPDrmi */ |
| 119929 | VR128, VR128, f128mem, u8imm, |
| 119930 | /* VDPPDrri */ |
| 119931 | VR128, VR128, VR128, u8imm, |
| 119932 | /* VDPPSYrmi */ |
| 119933 | VR256, VR256, i256mem, u8imm, |
| 119934 | /* VDPPSYrri */ |
| 119935 | VR256, VR256, VR256, u8imm, |
| 119936 | /* VDPPSrmi */ |
| 119937 | VR128, VR128, f128mem, u8imm, |
| 119938 | /* VDPPSrri */ |
| 119939 | VR128, VR128, VR128, u8imm, |
| 119940 | /* VERRm */ |
| 119941 | i16mem, |
| 119942 | /* VERRr */ |
| 119943 | GR16, |
| 119944 | /* VERWm */ |
| 119945 | i16mem, |
| 119946 | /* VERWr */ |
| 119947 | GR16, |
| 119948 | /* VEXP2PDZm */ |
| 119949 | VR512, f512mem, |
| 119950 | /* VEXP2PDZmb */ |
| 119951 | VR512, f64mem, |
| 119952 | /* VEXP2PDZmbk */ |
| 119953 | VR512, VR512, VK8WM, f64mem, |
| 119954 | /* VEXP2PDZmbkz */ |
| 119955 | VR512, VK8WM, f64mem, |
| 119956 | /* VEXP2PDZmk */ |
| 119957 | VR512, VR512, VK8WM, f512mem, |
| 119958 | /* VEXP2PDZmkz */ |
| 119959 | VR512, VK8WM, f512mem, |
| 119960 | /* VEXP2PDZr */ |
| 119961 | VR512, VR512, |
| 119962 | /* VEXP2PDZrb */ |
| 119963 | VR512, VR512, |
| 119964 | /* VEXP2PDZrbk */ |
| 119965 | VR512, VR512, VK8WM, VR512, |
| 119966 | /* VEXP2PDZrbkz */ |
| 119967 | VR512, VK8WM, VR512, |
| 119968 | /* VEXP2PDZrk */ |
| 119969 | VR512, VR512, VK8WM, VR512, |
| 119970 | /* VEXP2PDZrkz */ |
| 119971 | VR512, VK8WM, VR512, |
| 119972 | /* VEXP2PSZm */ |
| 119973 | VR512, f512mem, |
| 119974 | /* VEXP2PSZmb */ |
| 119975 | VR512, f32mem, |
| 119976 | /* VEXP2PSZmbk */ |
| 119977 | VR512, VR512, VK16WM, f32mem, |
| 119978 | /* VEXP2PSZmbkz */ |
| 119979 | VR512, VK16WM, f32mem, |
| 119980 | /* VEXP2PSZmk */ |
| 119981 | VR512, VR512, VK16WM, f512mem, |
| 119982 | /* VEXP2PSZmkz */ |
| 119983 | VR512, VK16WM, f512mem, |
| 119984 | /* VEXP2PSZr */ |
| 119985 | VR512, VR512, |
| 119986 | /* VEXP2PSZrb */ |
| 119987 | VR512, VR512, |
| 119988 | /* VEXP2PSZrbk */ |
| 119989 | VR512, VR512, VK16WM, VR512, |
| 119990 | /* VEXP2PSZrbkz */ |
| 119991 | VR512, VK16WM, VR512, |
| 119992 | /* VEXP2PSZrk */ |
| 119993 | VR512, VR512, VK16WM, VR512, |
| 119994 | /* VEXP2PSZrkz */ |
| 119995 | VR512, VK16WM, VR512, |
| 119996 | /* VEXPANDPDZ128rm */ |
| 119997 | VR128X, f128mem, |
| 119998 | /* VEXPANDPDZ128rmk */ |
| 119999 | VR128X, VR128X, VK2WM, f128mem, |
| 120000 | /* VEXPANDPDZ128rmkz */ |
| 120001 | VR128X, VK2WM, f128mem, |
| 120002 | /* VEXPANDPDZ128rr */ |
| 120003 | VR128X, VR128X, |
| 120004 | /* VEXPANDPDZ128rrk */ |
| 120005 | VR128X, VR128X, VK2WM, VR128X, |
| 120006 | /* VEXPANDPDZ128rrkz */ |
| 120007 | VR128X, VK2WM, VR128X, |
| 120008 | /* VEXPANDPDZ256rm */ |
| 120009 | VR256X, f256mem, |
| 120010 | /* VEXPANDPDZ256rmk */ |
| 120011 | VR256X, VR256X, VK4WM, f256mem, |
| 120012 | /* VEXPANDPDZ256rmkz */ |
| 120013 | VR256X, VK4WM, f256mem, |
| 120014 | /* VEXPANDPDZ256rr */ |
| 120015 | VR256X, VR256X, |
| 120016 | /* VEXPANDPDZ256rrk */ |
| 120017 | VR256X, VR256X, VK4WM, VR256X, |
| 120018 | /* VEXPANDPDZ256rrkz */ |
| 120019 | VR256X, VK4WM, VR256X, |
| 120020 | /* VEXPANDPDZrm */ |
| 120021 | VR512, f512mem, |
| 120022 | /* VEXPANDPDZrmk */ |
| 120023 | VR512, VR512, VK8WM, f512mem, |
| 120024 | /* VEXPANDPDZrmkz */ |
| 120025 | VR512, VK8WM, f512mem, |
| 120026 | /* VEXPANDPDZrr */ |
| 120027 | VR512, VR512, |
| 120028 | /* VEXPANDPDZrrk */ |
| 120029 | VR512, VR512, VK8WM, VR512, |
| 120030 | /* VEXPANDPDZrrkz */ |
| 120031 | VR512, VK8WM, VR512, |
| 120032 | /* VEXPANDPSZ128rm */ |
| 120033 | VR128X, f128mem, |
| 120034 | /* VEXPANDPSZ128rmk */ |
| 120035 | VR128X, VR128X, VK4WM, f128mem, |
| 120036 | /* VEXPANDPSZ128rmkz */ |
| 120037 | VR128X, VK4WM, f128mem, |
| 120038 | /* VEXPANDPSZ128rr */ |
| 120039 | VR128X, VR128X, |
| 120040 | /* VEXPANDPSZ128rrk */ |
| 120041 | VR128X, VR128X, VK4WM, VR128X, |
| 120042 | /* VEXPANDPSZ128rrkz */ |
| 120043 | VR128X, VK4WM, VR128X, |
| 120044 | /* VEXPANDPSZ256rm */ |
| 120045 | VR256X, f256mem, |
| 120046 | /* VEXPANDPSZ256rmk */ |
| 120047 | VR256X, VR256X, VK8WM, f256mem, |
| 120048 | /* VEXPANDPSZ256rmkz */ |
| 120049 | VR256X, VK8WM, f256mem, |
| 120050 | /* VEXPANDPSZ256rr */ |
| 120051 | VR256X, VR256X, |
| 120052 | /* VEXPANDPSZ256rrk */ |
| 120053 | VR256X, VR256X, VK8WM, VR256X, |
| 120054 | /* VEXPANDPSZ256rrkz */ |
| 120055 | VR256X, VK8WM, VR256X, |
| 120056 | /* VEXPANDPSZrm */ |
| 120057 | VR512, f512mem, |
| 120058 | /* VEXPANDPSZrmk */ |
| 120059 | VR512, VR512, VK16WM, f512mem, |
| 120060 | /* VEXPANDPSZrmkz */ |
| 120061 | VR512, VK16WM, f512mem, |
| 120062 | /* VEXPANDPSZrr */ |
| 120063 | VR512, VR512, |
| 120064 | /* VEXPANDPSZrrk */ |
| 120065 | VR512, VR512, VK16WM, VR512, |
| 120066 | /* VEXPANDPSZrrkz */ |
| 120067 | VR512, VK16WM, VR512, |
| 120068 | /* VEXTRACTF128mr */ |
| 120069 | f128mem, VR256, u8imm, |
| 120070 | /* VEXTRACTF128rr */ |
| 120071 | VR128, VR256, u8imm, |
| 120072 | /* VEXTRACTF32x4Z256mr */ |
| 120073 | f128mem, VR256X, u8imm, |
| 120074 | /* VEXTRACTF32x4Z256mrk */ |
| 120075 | f128mem, VK4WM, VR256X, u8imm, |
| 120076 | /* VEXTRACTF32x4Z256rr */ |
| 120077 | VR128X, VR256X, u8imm, |
| 120078 | /* VEXTRACTF32x4Z256rrk */ |
| 120079 | VR128X, VR128X, VK4WM, VR256X, u8imm, |
| 120080 | /* VEXTRACTF32x4Z256rrkz */ |
| 120081 | VR128X, VK4WM, VR256X, u8imm, |
| 120082 | /* VEXTRACTF32x4Zmr */ |
| 120083 | f128mem, VR512, u8imm, |
| 120084 | /* VEXTRACTF32x4Zmrk */ |
| 120085 | f128mem, VK4WM, VR512, u8imm, |
| 120086 | /* VEXTRACTF32x4Zrr */ |
| 120087 | VR128X, VR512, u8imm, |
| 120088 | /* VEXTRACTF32x4Zrrk */ |
| 120089 | VR128X, VR128X, VK4WM, VR512, u8imm, |
| 120090 | /* VEXTRACTF32x4Zrrkz */ |
| 120091 | VR128X, VK4WM, VR512, u8imm, |
| 120092 | /* VEXTRACTF32x8Zmr */ |
| 120093 | f256mem, VR512, u8imm, |
| 120094 | /* VEXTRACTF32x8Zmrk */ |
| 120095 | f256mem, VK8WM, VR512, u8imm, |
| 120096 | /* VEXTRACTF32x8Zrr */ |
| 120097 | VR256X, VR512, u8imm, |
| 120098 | /* VEXTRACTF32x8Zrrk */ |
| 120099 | VR256X, VR256X, VK8WM, VR512, u8imm, |
| 120100 | /* VEXTRACTF32x8Zrrkz */ |
| 120101 | VR256X, VK8WM, VR512, u8imm, |
| 120102 | /* VEXTRACTF64x2Z256mr */ |
| 120103 | f128mem, VR256X, u8imm, |
| 120104 | /* VEXTRACTF64x2Z256mrk */ |
| 120105 | f128mem, VK2WM, VR256X, u8imm, |
| 120106 | /* VEXTRACTF64x2Z256rr */ |
| 120107 | VR128X, VR256X, u8imm, |
| 120108 | /* VEXTRACTF64x2Z256rrk */ |
| 120109 | VR128X, VR128X, VK2WM, VR256X, u8imm, |
| 120110 | /* VEXTRACTF64x2Z256rrkz */ |
| 120111 | VR128X, VK2WM, VR256X, u8imm, |
| 120112 | /* VEXTRACTF64x2Zmr */ |
| 120113 | f128mem, VR512, u8imm, |
| 120114 | /* VEXTRACTF64x2Zmrk */ |
| 120115 | f128mem, VK2WM, VR512, u8imm, |
| 120116 | /* VEXTRACTF64x2Zrr */ |
| 120117 | VR128X, VR512, u8imm, |
| 120118 | /* VEXTRACTF64x2Zrrk */ |
| 120119 | VR128X, VR128X, VK2WM, VR512, u8imm, |
| 120120 | /* VEXTRACTF64x2Zrrkz */ |
| 120121 | VR128X, VK2WM, VR512, u8imm, |
| 120122 | /* VEXTRACTF64x4Zmr */ |
| 120123 | f256mem, VR512, u8imm, |
| 120124 | /* VEXTRACTF64x4Zmrk */ |
| 120125 | f256mem, VK4WM, VR512, u8imm, |
| 120126 | /* VEXTRACTF64x4Zrr */ |
| 120127 | VR256X, VR512, u8imm, |
| 120128 | /* VEXTRACTF64x4Zrrk */ |
| 120129 | VR256X, VR256X, VK4WM, VR512, u8imm, |
| 120130 | /* VEXTRACTF64x4Zrrkz */ |
| 120131 | VR256X, VK4WM, VR512, u8imm, |
| 120132 | /* VEXTRACTI128mr */ |
| 120133 | i128mem, VR256, u8imm, |
| 120134 | /* VEXTRACTI128rr */ |
| 120135 | VR128, VR256, u8imm, |
| 120136 | /* VEXTRACTI32x4Z256mr */ |
| 120137 | i128mem, VR256X, u8imm, |
| 120138 | /* VEXTRACTI32x4Z256mrk */ |
| 120139 | i128mem, VK4WM, VR256X, u8imm, |
| 120140 | /* VEXTRACTI32x4Z256rr */ |
| 120141 | VR128X, VR256X, u8imm, |
| 120142 | /* VEXTRACTI32x4Z256rrk */ |
| 120143 | VR128X, VR128X, VK4WM, VR256X, u8imm, |
| 120144 | /* VEXTRACTI32x4Z256rrkz */ |
| 120145 | VR128X, VK4WM, VR256X, u8imm, |
| 120146 | /* VEXTRACTI32x4Zmr */ |
| 120147 | i128mem, VR512, u8imm, |
| 120148 | /* VEXTRACTI32x4Zmrk */ |
| 120149 | i128mem, VK4WM, VR512, u8imm, |
| 120150 | /* VEXTRACTI32x4Zrr */ |
| 120151 | VR128X, VR512, u8imm, |
| 120152 | /* VEXTRACTI32x4Zrrk */ |
| 120153 | VR128X, VR128X, VK4WM, VR512, u8imm, |
| 120154 | /* VEXTRACTI32x4Zrrkz */ |
| 120155 | VR128X, VK4WM, VR512, u8imm, |
| 120156 | /* VEXTRACTI32x8Zmr */ |
| 120157 | i256mem, VR512, u8imm, |
| 120158 | /* VEXTRACTI32x8Zmrk */ |
| 120159 | i256mem, VK8WM, VR512, u8imm, |
| 120160 | /* VEXTRACTI32x8Zrr */ |
| 120161 | VR256X, VR512, u8imm, |
| 120162 | /* VEXTRACTI32x8Zrrk */ |
| 120163 | VR256X, VR256X, VK8WM, VR512, u8imm, |
| 120164 | /* VEXTRACTI32x8Zrrkz */ |
| 120165 | VR256X, VK8WM, VR512, u8imm, |
| 120166 | /* VEXTRACTI64x2Z256mr */ |
| 120167 | i128mem, VR256X, u8imm, |
| 120168 | /* VEXTRACTI64x2Z256mrk */ |
| 120169 | i128mem, VK2WM, VR256X, u8imm, |
| 120170 | /* VEXTRACTI64x2Z256rr */ |
| 120171 | VR128X, VR256X, u8imm, |
| 120172 | /* VEXTRACTI64x2Z256rrk */ |
| 120173 | VR128X, VR128X, VK2WM, VR256X, u8imm, |
| 120174 | /* VEXTRACTI64x2Z256rrkz */ |
| 120175 | VR128X, VK2WM, VR256X, u8imm, |
| 120176 | /* VEXTRACTI64x2Zmr */ |
| 120177 | i128mem, VR512, u8imm, |
| 120178 | /* VEXTRACTI64x2Zmrk */ |
| 120179 | i128mem, VK2WM, VR512, u8imm, |
| 120180 | /* VEXTRACTI64x2Zrr */ |
| 120181 | VR128X, VR512, u8imm, |
| 120182 | /* VEXTRACTI64x2Zrrk */ |
| 120183 | VR128X, VR128X, VK2WM, VR512, u8imm, |
| 120184 | /* VEXTRACTI64x2Zrrkz */ |
| 120185 | VR128X, VK2WM, VR512, u8imm, |
| 120186 | /* VEXTRACTI64x4Zmr */ |
| 120187 | i256mem, VR512, u8imm, |
| 120188 | /* VEXTRACTI64x4Zmrk */ |
| 120189 | i256mem, VK4WM, VR512, u8imm, |
| 120190 | /* VEXTRACTI64x4Zrr */ |
| 120191 | VR256X, VR512, u8imm, |
| 120192 | /* VEXTRACTI64x4Zrrk */ |
| 120193 | VR256X, VR256X, VK4WM, VR512, u8imm, |
| 120194 | /* VEXTRACTI64x4Zrrkz */ |
| 120195 | VR256X, VK4WM, VR512, u8imm, |
| 120196 | /* VEXTRACTPSZmr */ |
| 120197 | f32mem, VR128X, u8imm, |
| 120198 | /* VEXTRACTPSZrr */ |
| 120199 | GR32orGR64, VR128X, u8imm, |
| 120200 | /* VEXTRACTPSmr */ |
| 120201 | f32mem, VR128, u8imm, |
| 120202 | /* VEXTRACTPSrr */ |
| 120203 | GR32orGR64, VR128, u8imm, |
| 120204 | /* VFCMADDCPHZ128m */ |
| 120205 | VR128X, VR128X, VR128X, f128mem, |
| 120206 | /* VFCMADDCPHZ128mb */ |
| 120207 | VR128X, VR128X, VR128X, f32mem, |
| 120208 | /* VFCMADDCPHZ128mbk */ |
| 120209 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 120210 | /* VFCMADDCPHZ128mbkz */ |
| 120211 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 120212 | /* VFCMADDCPHZ128mk */ |
| 120213 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 120214 | /* VFCMADDCPHZ128mkz */ |
| 120215 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 120216 | /* VFCMADDCPHZ128r */ |
| 120217 | VR128X, VR128X, VR128X, VR128X, |
| 120218 | /* VFCMADDCPHZ128rk */ |
| 120219 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120220 | /* VFCMADDCPHZ128rkz */ |
| 120221 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120222 | /* VFCMADDCPHZ256m */ |
| 120223 | VR256X, VR256X, VR256X, f256mem, |
| 120224 | /* VFCMADDCPHZ256mb */ |
| 120225 | VR256X, VR256X, VR256X, f32mem, |
| 120226 | /* VFCMADDCPHZ256mbk */ |
| 120227 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 120228 | /* VFCMADDCPHZ256mbkz */ |
| 120229 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 120230 | /* VFCMADDCPHZ256mk */ |
| 120231 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 120232 | /* VFCMADDCPHZ256mkz */ |
| 120233 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 120234 | /* VFCMADDCPHZ256r */ |
| 120235 | VR256X, VR256X, VR256X, VR256X, |
| 120236 | /* VFCMADDCPHZ256rk */ |
| 120237 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 120238 | /* VFCMADDCPHZ256rkz */ |
| 120239 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 120240 | /* VFCMADDCPHZm */ |
| 120241 | VR512, VR512, VR512, f512mem, |
| 120242 | /* VFCMADDCPHZmb */ |
| 120243 | VR512, VR512, VR512, f32mem, |
| 120244 | /* VFCMADDCPHZmbk */ |
| 120245 | VR512, VR512, VK16WM, VR512, f32mem, |
| 120246 | /* VFCMADDCPHZmbkz */ |
| 120247 | VR512, VR512, VK16WM, VR512, f32mem, |
| 120248 | /* VFCMADDCPHZmk */ |
| 120249 | VR512, VR512, VK16WM, VR512, f512mem, |
| 120250 | /* VFCMADDCPHZmkz */ |
| 120251 | VR512, VR512, VK16WM, VR512, f512mem, |
| 120252 | /* VFCMADDCPHZr */ |
| 120253 | VR512, VR512, VR512, VR512, |
| 120254 | /* VFCMADDCPHZrb */ |
| 120255 | VR512, VR512, VR512, VR512, AVX512RC, |
| 120256 | /* VFCMADDCPHZrbk */ |
| 120257 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 120258 | /* VFCMADDCPHZrbkz */ |
| 120259 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 120260 | /* VFCMADDCPHZrk */ |
| 120261 | VR512, VR512, VK16WM, VR512, VR512, |
| 120262 | /* VFCMADDCPHZrkz */ |
| 120263 | VR512, VR512, VK16WM, VR512, VR512, |
| 120264 | /* VFCMADDCSHZm */ |
| 120265 | VR128X, VR128X, VR128X, ssmem, |
| 120266 | /* VFCMADDCSHZmk */ |
| 120267 | VR128X, VR128X, VK4WM, VR128X, ssmem, |
| 120268 | /* VFCMADDCSHZmkz */ |
| 120269 | VR128X, VR128X, VK4WM, VR128X, ssmem, |
| 120270 | /* VFCMADDCSHZr */ |
| 120271 | VR128X, VR128X, VR128X, VR128X, |
| 120272 | /* VFCMADDCSHZrb */ |
| 120273 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 120274 | /* VFCMADDCSHZrbk */ |
| 120275 | VR128X, VR128X, VK4WM, VR128X, VR128X, AVX512RC, |
| 120276 | /* VFCMADDCSHZrbkz */ |
| 120277 | VR128X, VR128X, VK4WM, VR128X, VR128X, AVX512RC, |
| 120278 | /* VFCMADDCSHZrk */ |
| 120279 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120280 | /* VFCMADDCSHZrkz */ |
| 120281 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120282 | /* VFCMULCPHZ128rm */ |
| 120283 | VR128X, VR128X, f128mem, |
| 120284 | /* VFCMULCPHZ128rmb */ |
| 120285 | VR128X, VR128X, f32mem, |
| 120286 | /* VFCMULCPHZ128rmbk */ |
| 120287 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 120288 | /* VFCMULCPHZ128rmbkz */ |
| 120289 | VR128X, VK4WM, VR128X, f32mem, |
| 120290 | /* VFCMULCPHZ128rmk */ |
| 120291 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 120292 | /* VFCMULCPHZ128rmkz */ |
| 120293 | VR128X, VK4WM, VR128X, f128mem, |
| 120294 | /* VFCMULCPHZ128rr */ |
| 120295 | VR128X, VR128X, VR128X, |
| 120296 | /* VFCMULCPHZ128rrk */ |
| 120297 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120298 | /* VFCMULCPHZ128rrkz */ |
| 120299 | VR128X, VK4WM, VR128X, VR128X, |
| 120300 | /* VFCMULCPHZ256rm */ |
| 120301 | VR256X, VR256X, f256mem, |
| 120302 | /* VFCMULCPHZ256rmb */ |
| 120303 | VR256X, VR256X, f32mem, |
| 120304 | /* VFCMULCPHZ256rmbk */ |
| 120305 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 120306 | /* VFCMULCPHZ256rmbkz */ |
| 120307 | VR256X, VK8WM, VR256X, f32mem, |
| 120308 | /* VFCMULCPHZ256rmk */ |
| 120309 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 120310 | /* VFCMULCPHZ256rmkz */ |
| 120311 | VR256X, VK8WM, VR256X, f256mem, |
| 120312 | /* VFCMULCPHZ256rr */ |
| 120313 | VR256X, VR256X, VR256X, |
| 120314 | /* VFCMULCPHZ256rrk */ |
| 120315 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 120316 | /* VFCMULCPHZ256rrkz */ |
| 120317 | VR256X, VK8WM, VR256X, VR256X, |
| 120318 | /* VFCMULCPHZrm */ |
| 120319 | VR512, VR512, f512mem, |
| 120320 | /* VFCMULCPHZrmb */ |
| 120321 | VR512, VR512, f32mem, |
| 120322 | /* VFCMULCPHZrmbk */ |
| 120323 | VR512, VR512, VK16WM, VR512, f32mem, |
| 120324 | /* VFCMULCPHZrmbkz */ |
| 120325 | VR512, VK16WM, VR512, f32mem, |
| 120326 | /* VFCMULCPHZrmk */ |
| 120327 | VR512, VR512, VK16WM, VR512, f512mem, |
| 120328 | /* VFCMULCPHZrmkz */ |
| 120329 | VR512, VK16WM, VR512, f512mem, |
| 120330 | /* VFCMULCPHZrr */ |
| 120331 | VR512, VR512, VR512, |
| 120332 | /* VFCMULCPHZrrb */ |
| 120333 | VR512, VR512, VR512, AVX512RC, |
| 120334 | /* VFCMULCPHZrrbk */ |
| 120335 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 120336 | /* VFCMULCPHZrrbkz */ |
| 120337 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 120338 | /* VFCMULCPHZrrk */ |
| 120339 | VR512, VR512, VK16WM, VR512, VR512, |
| 120340 | /* VFCMULCPHZrrkz */ |
| 120341 | VR512, VK16WM, VR512, VR512, |
| 120342 | /* VFCMULCSHZrm */ |
| 120343 | VR128X, VR128X, ssmem, |
| 120344 | /* VFCMULCSHZrmk */ |
| 120345 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 120346 | /* VFCMULCSHZrmkz */ |
| 120347 | VR128X, VK1WM, VR128X, ssmem, |
| 120348 | /* VFCMULCSHZrr */ |
| 120349 | VR128X, VR128X, VR128X, |
| 120350 | /* VFCMULCSHZrrb */ |
| 120351 | VR128X, VR128X, VR128X, AVX512RC, |
| 120352 | /* VFCMULCSHZrrbk */ |
| 120353 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 120354 | /* VFCMULCSHZrrbkz */ |
| 120355 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 120356 | /* VFCMULCSHZrrk */ |
| 120357 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 120358 | /* VFCMULCSHZrrkz */ |
| 120359 | VR128X, VK1WM, VR128X, VR128X, |
| 120360 | /* VFIXUPIMMPDZ128rmbi */ |
| 120361 | VR128X, VR128X, VR128X, f64mem, i32u8imm, |
| 120362 | /* VFIXUPIMMPDZ128rmbik */ |
| 120363 | VR128X, VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 120364 | /* VFIXUPIMMPDZ128rmbikz */ |
| 120365 | VR128X, VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 120366 | /* VFIXUPIMMPDZ128rmi */ |
| 120367 | VR128X, VR128X, VR128X, f128mem, i32u8imm, |
| 120368 | /* VFIXUPIMMPDZ128rmik */ |
| 120369 | VR128X, VR128X, VK2WM, VR128X, f128mem, i32u8imm, |
| 120370 | /* VFIXUPIMMPDZ128rmikz */ |
| 120371 | VR128X, VR128X, VK2WM, VR128X, f128mem, i32u8imm, |
| 120372 | /* VFIXUPIMMPDZ128rri */ |
| 120373 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 120374 | /* VFIXUPIMMPDZ128rrik */ |
| 120375 | VR128X, VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 120376 | /* VFIXUPIMMPDZ128rrikz */ |
| 120377 | VR128X, VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 120378 | /* VFIXUPIMMPDZ256rmbi */ |
| 120379 | VR256X, VR256X, VR256X, f64mem, i32u8imm, |
| 120380 | /* VFIXUPIMMPDZ256rmbik */ |
| 120381 | VR256X, VR256X, VK4WM, VR256X, f64mem, i32u8imm, |
| 120382 | /* VFIXUPIMMPDZ256rmbikz */ |
| 120383 | VR256X, VR256X, VK4WM, VR256X, f64mem, i32u8imm, |
| 120384 | /* VFIXUPIMMPDZ256rmi */ |
| 120385 | VR256X, VR256X, VR256X, f256mem, i32u8imm, |
| 120386 | /* VFIXUPIMMPDZ256rmik */ |
| 120387 | VR256X, VR256X, VK4WM, VR256X, f256mem, i32u8imm, |
| 120388 | /* VFIXUPIMMPDZ256rmikz */ |
| 120389 | VR256X, VR256X, VK4WM, VR256X, f256mem, i32u8imm, |
| 120390 | /* VFIXUPIMMPDZ256rri */ |
| 120391 | VR256X, VR256X, VR256X, VR256X, i32u8imm, |
| 120392 | /* VFIXUPIMMPDZ256rrik */ |
| 120393 | VR256X, VR256X, VK4WM, VR256X, VR256X, i32u8imm, |
| 120394 | /* VFIXUPIMMPDZ256rrikz */ |
| 120395 | VR256X, VR256X, VK4WM, VR256X, VR256X, i32u8imm, |
| 120396 | /* VFIXUPIMMPDZrmbi */ |
| 120397 | VR512, VR512, VR512, f64mem, i32u8imm, |
| 120398 | /* VFIXUPIMMPDZrmbik */ |
| 120399 | VR512, VR512, VK8WM, VR512, f64mem, i32u8imm, |
| 120400 | /* VFIXUPIMMPDZrmbikz */ |
| 120401 | VR512, VR512, VK8WM, VR512, f64mem, i32u8imm, |
| 120402 | /* VFIXUPIMMPDZrmi */ |
| 120403 | VR512, VR512, VR512, f512mem, i32u8imm, |
| 120404 | /* VFIXUPIMMPDZrmik */ |
| 120405 | VR512, VR512, VK8WM, VR512, f512mem, i32u8imm, |
| 120406 | /* VFIXUPIMMPDZrmikz */ |
| 120407 | VR512, VR512, VK8WM, VR512, f512mem, i32u8imm, |
| 120408 | /* VFIXUPIMMPDZrri */ |
| 120409 | VR512, VR512, VR512, VR512, i32u8imm, |
| 120410 | /* VFIXUPIMMPDZrrib */ |
| 120411 | VR512, VR512, VR512, VR512, i32u8imm, |
| 120412 | /* VFIXUPIMMPDZrribk */ |
| 120413 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 120414 | /* VFIXUPIMMPDZrribkz */ |
| 120415 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 120416 | /* VFIXUPIMMPDZrrik */ |
| 120417 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 120418 | /* VFIXUPIMMPDZrrikz */ |
| 120419 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 120420 | /* VFIXUPIMMPSZ128rmbi */ |
| 120421 | VR128X, VR128X, VR128X, f32mem, i32u8imm, |
| 120422 | /* VFIXUPIMMPSZ128rmbik */ |
| 120423 | VR128X, VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 120424 | /* VFIXUPIMMPSZ128rmbikz */ |
| 120425 | VR128X, VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 120426 | /* VFIXUPIMMPSZ128rmi */ |
| 120427 | VR128X, VR128X, VR128X, f128mem, i32u8imm, |
| 120428 | /* VFIXUPIMMPSZ128rmik */ |
| 120429 | VR128X, VR128X, VK4WM, VR128X, f128mem, i32u8imm, |
| 120430 | /* VFIXUPIMMPSZ128rmikz */ |
| 120431 | VR128X, VR128X, VK4WM, VR128X, f128mem, i32u8imm, |
| 120432 | /* VFIXUPIMMPSZ128rri */ |
| 120433 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 120434 | /* VFIXUPIMMPSZ128rrik */ |
| 120435 | VR128X, VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 120436 | /* VFIXUPIMMPSZ128rrikz */ |
| 120437 | VR128X, VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 120438 | /* VFIXUPIMMPSZ256rmbi */ |
| 120439 | VR256X, VR256X, VR256X, f32mem, i32u8imm, |
| 120440 | /* VFIXUPIMMPSZ256rmbik */ |
| 120441 | VR256X, VR256X, VK8WM, VR256X, f32mem, i32u8imm, |
| 120442 | /* VFIXUPIMMPSZ256rmbikz */ |
| 120443 | VR256X, VR256X, VK8WM, VR256X, f32mem, i32u8imm, |
| 120444 | /* VFIXUPIMMPSZ256rmi */ |
| 120445 | VR256X, VR256X, VR256X, f256mem, i32u8imm, |
| 120446 | /* VFIXUPIMMPSZ256rmik */ |
| 120447 | VR256X, VR256X, VK8WM, VR256X, f256mem, i32u8imm, |
| 120448 | /* VFIXUPIMMPSZ256rmikz */ |
| 120449 | VR256X, VR256X, VK8WM, VR256X, f256mem, i32u8imm, |
| 120450 | /* VFIXUPIMMPSZ256rri */ |
| 120451 | VR256X, VR256X, VR256X, VR256X, i32u8imm, |
| 120452 | /* VFIXUPIMMPSZ256rrik */ |
| 120453 | VR256X, VR256X, VK8WM, VR256X, VR256X, i32u8imm, |
| 120454 | /* VFIXUPIMMPSZ256rrikz */ |
| 120455 | VR256X, VR256X, VK8WM, VR256X, VR256X, i32u8imm, |
| 120456 | /* VFIXUPIMMPSZrmbi */ |
| 120457 | VR512, VR512, VR512, f32mem, i32u8imm, |
| 120458 | /* VFIXUPIMMPSZrmbik */ |
| 120459 | VR512, VR512, VK16WM, VR512, f32mem, i32u8imm, |
| 120460 | /* VFIXUPIMMPSZrmbikz */ |
| 120461 | VR512, VR512, VK16WM, VR512, f32mem, i32u8imm, |
| 120462 | /* VFIXUPIMMPSZrmi */ |
| 120463 | VR512, VR512, VR512, f512mem, i32u8imm, |
| 120464 | /* VFIXUPIMMPSZrmik */ |
| 120465 | VR512, VR512, VK16WM, VR512, f512mem, i32u8imm, |
| 120466 | /* VFIXUPIMMPSZrmikz */ |
| 120467 | VR512, VR512, VK16WM, VR512, f512mem, i32u8imm, |
| 120468 | /* VFIXUPIMMPSZrri */ |
| 120469 | VR512, VR512, VR512, VR512, i32u8imm, |
| 120470 | /* VFIXUPIMMPSZrrib */ |
| 120471 | VR512, VR512, VR512, VR512, i32u8imm, |
| 120472 | /* VFIXUPIMMPSZrribk */ |
| 120473 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 120474 | /* VFIXUPIMMPSZrribkz */ |
| 120475 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 120476 | /* VFIXUPIMMPSZrrik */ |
| 120477 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 120478 | /* VFIXUPIMMPSZrrikz */ |
| 120479 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 120480 | /* VFIXUPIMMSDZrmi */ |
| 120481 | VR128X, VR128X, VR128X, f64mem, i32u8imm, |
| 120482 | /* VFIXUPIMMSDZrmik */ |
| 120483 | VR128X, VR128X, VK1WM, VR128X, f64mem, i32u8imm, |
| 120484 | /* VFIXUPIMMSDZrmikz */ |
| 120485 | VR128X, VR128X, VK1WM, VR128X, f64mem, i32u8imm, |
| 120486 | /* VFIXUPIMMSDZrri */ |
| 120487 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 120488 | /* VFIXUPIMMSDZrrib */ |
| 120489 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 120490 | /* VFIXUPIMMSDZrribk */ |
| 120491 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120492 | /* VFIXUPIMMSDZrribkz */ |
| 120493 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120494 | /* VFIXUPIMMSDZrrik */ |
| 120495 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120496 | /* VFIXUPIMMSDZrrikz */ |
| 120497 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120498 | /* VFIXUPIMMSSZrmi */ |
| 120499 | VR128X, VR128X, VR128X, f32mem, i32u8imm, |
| 120500 | /* VFIXUPIMMSSZrmik */ |
| 120501 | VR128X, VR128X, VK1WM, VR128X, f32mem, i32u8imm, |
| 120502 | /* VFIXUPIMMSSZrmikz */ |
| 120503 | VR128X, VR128X, VK1WM, VR128X, f32mem, i32u8imm, |
| 120504 | /* VFIXUPIMMSSZrri */ |
| 120505 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 120506 | /* VFIXUPIMMSSZrrib */ |
| 120507 | VR128X, VR128X, VR128X, VR128X, i32u8imm, |
| 120508 | /* VFIXUPIMMSSZrribk */ |
| 120509 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120510 | /* VFIXUPIMMSSZrribkz */ |
| 120511 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120512 | /* VFIXUPIMMSSZrrik */ |
| 120513 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120514 | /* VFIXUPIMMSSZrrikz */ |
| 120515 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 120516 | /* VFMADD132PDYm */ |
| 120517 | VR256, VR256, VR256, f256mem, |
| 120518 | /* VFMADD132PDYr */ |
| 120519 | VR256, VR256, VR256, VR256, |
| 120520 | /* VFMADD132PDZ128m */ |
| 120521 | VR128X, VR128X, VR128X, f128mem, |
| 120522 | /* VFMADD132PDZ128mb */ |
| 120523 | VR128X, VR128X, VR128X, f64mem, |
| 120524 | /* VFMADD132PDZ128mbk */ |
| 120525 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 120526 | /* VFMADD132PDZ128mbkz */ |
| 120527 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 120528 | /* VFMADD132PDZ128mk */ |
| 120529 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 120530 | /* VFMADD132PDZ128mkz */ |
| 120531 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 120532 | /* VFMADD132PDZ128r */ |
| 120533 | VR128X, VR128X, VR128X, VR128X, |
| 120534 | /* VFMADD132PDZ128rk */ |
| 120535 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 120536 | /* VFMADD132PDZ128rkz */ |
| 120537 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 120538 | /* VFMADD132PDZ256m */ |
| 120539 | VR256X, VR256X, VR256X, f256mem, |
| 120540 | /* VFMADD132PDZ256mb */ |
| 120541 | VR256X, VR256X, VR256X, f64mem, |
| 120542 | /* VFMADD132PDZ256mbk */ |
| 120543 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 120544 | /* VFMADD132PDZ256mbkz */ |
| 120545 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 120546 | /* VFMADD132PDZ256mk */ |
| 120547 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 120548 | /* VFMADD132PDZ256mkz */ |
| 120549 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 120550 | /* VFMADD132PDZ256r */ |
| 120551 | VR256X, VR256X, VR256X, VR256X, |
| 120552 | /* VFMADD132PDZ256rk */ |
| 120553 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 120554 | /* VFMADD132PDZ256rkz */ |
| 120555 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 120556 | /* VFMADD132PDZm */ |
| 120557 | VR512, VR512, VR512, f512mem, |
| 120558 | /* VFMADD132PDZmb */ |
| 120559 | VR512, VR512, VR512, f64mem, |
| 120560 | /* VFMADD132PDZmbk */ |
| 120561 | VR512, VR512, VK8WM, VR512, f64mem, |
| 120562 | /* VFMADD132PDZmbkz */ |
| 120563 | VR512, VR512, VK8WM, VR512, f64mem, |
| 120564 | /* VFMADD132PDZmk */ |
| 120565 | VR512, VR512, VK8WM, VR512, f512mem, |
| 120566 | /* VFMADD132PDZmkz */ |
| 120567 | VR512, VR512, VK8WM, VR512, f512mem, |
| 120568 | /* VFMADD132PDZr */ |
| 120569 | VR512, VR512, VR512, VR512, |
| 120570 | /* VFMADD132PDZrb */ |
| 120571 | VR512, VR512, VR512, VR512, AVX512RC, |
| 120572 | /* VFMADD132PDZrbk */ |
| 120573 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 120574 | /* VFMADD132PDZrbkz */ |
| 120575 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 120576 | /* VFMADD132PDZrk */ |
| 120577 | VR512, VR512, VK8WM, VR512, VR512, |
| 120578 | /* VFMADD132PDZrkz */ |
| 120579 | VR512, VR512, VK8WM, VR512, VR512, |
| 120580 | /* VFMADD132PDm */ |
| 120581 | VR128, VR128, VR128, f128mem, |
| 120582 | /* VFMADD132PDr */ |
| 120583 | VR128, VR128, VR128, VR128, |
| 120584 | /* VFMADD132PHZ128m */ |
| 120585 | VR128X, VR128X, VR128X, f128mem, |
| 120586 | /* VFMADD132PHZ128mb */ |
| 120587 | VR128X, VR128X, VR128X, f16mem, |
| 120588 | /* VFMADD132PHZ128mbk */ |
| 120589 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 120590 | /* VFMADD132PHZ128mbkz */ |
| 120591 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 120592 | /* VFMADD132PHZ128mk */ |
| 120593 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 120594 | /* VFMADD132PHZ128mkz */ |
| 120595 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 120596 | /* VFMADD132PHZ128r */ |
| 120597 | VR128X, VR128X, VR128X, VR128X, |
| 120598 | /* VFMADD132PHZ128rk */ |
| 120599 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 120600 | /* VFMADD132PHZ128rkz */ |
| 120601 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 120602 | /* VFMADD132PHZ256m */ |
| 120603 | VR256X, VR256X, VR256X, f256mem, |
| 120604 | /* VFMADD132PHZ256mb */ |
| 120605 | VR256X, VR256X, VR256X, f16mem, |
| 120606 | /* VFMADD132PHZ256mbk */ |
| 120607 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 120608 | /* VFMADD132PHZ256mbkz */ |
| 120609 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 120610 | /* VFMADD132PHZ256mk */ |
| 120611 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 120612 | /* VFMADD132PHZ256mkz */ |
| 120613 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 120614 | /* VFMADD132PHZ256r */ |
| 120615 | VR256X, VR256X, VR256X, VR256X, |
| 120616 | /* VFMADD132PHZ256rk */ |
| 120617 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 120618 | /* VFMADD132PHZ256rkz */ |
| 120619 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 120620 | /* VFMADD132PHZm */ |
| 120621 | VR512, VR512, VR512, f512mem, |
| 120622 | /* VFMADD132PHZmb */ |
| 120623 | VR512, VR512, VR512, f16mem, |
| 120624 | /* VFMADD132PHZmbk */ |
| 120625 | VR512, VR512, VK32WM, VR512, f16mem, |
| 120626 | /* VFMADD132PHZmbkz */ |
| 120627 | VR512, VR512, VK32WM, VR512, f16mem, |
| 120628 | /* VFMADD132PHZmk */ |
| 120629 | VR512, VR512, VK32WM, VR512, f512mem, |
| 120630 | /* VFMADD132PHZmkz */ |
| 120631 | VR512, VR512, VK32WM, VR512, f512mem, |
| 120632 | /* VFMADD132PHZr */ |
| 120633 | VR512, VR512, VR512, VR512, |
| 120634 | /* VFMADD132PHZrb */ |
| 120635 | VR512, VR512, VR512, VR512, AVX512RC, |
| 120636 | /* VFMADD132PHZrbk */ |
| 120637 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 120638 | /* VFMADD132PHZrbkz */ |
| 120639 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 120640 | /* VFMADD132PHZrk */ |
| 120641 | VR512, VR512, VK32WM, VR512, VR512, |
| 120642 | /* VFMADD132PHZrkz */ |
| 120643 | VR512, VR512, VK32WM, VR512, VR512, |
| 120644 | /* VFMADD132PSYm */ |
| 120645 | VR256, VR256, VR256, f256mem, |
| 120646 | /* VFMADD132PSYr */ |
| 120647 | VR256, VR256, VR256, VR256, |
| 120648 | /* VFMADD132PSZ128m */ |
| 120649 | VR128X, VR128X, VR128X, f128mem, |
| 120650 | /* VFMADD132PSZ128mb */ |
| 120651 | VR128X, VR128X, VR128X, f32mem, |
| 120652 | /* VFMADD132PSZ128mbk */ |
| 120653 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 120654 | /* VFMADD132PSZ128mbkz */ |
| 120655 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 120656 | /* VFMADD132PSZ128mk */ |
| 120657 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 120658 | /* VFMADD132PSZ128mkz */ |
| 120659 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 120660 | /* VFMADD132PSZ128r */ |
| 120661 | VR128X, VR128X, VR128X, VR128X, |
| 120662 | /* VFMADD132PSZ128rk */ |
| 120663 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120664 | /* VFMADD132PSZ128rkz */ |
| 120665 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120666 | /* VFMADD132PSZ256m */ |
| 120667 | VR256X, VR256X, VR256X, f256mem, |
| 120668 | /* VFMADD132PSZ256mb */ |
| 120669 | VR256X, VR256X, VR256X, f32mem, |
| 120670 | /* VFMADD132PSZ256mbk */ |
| 120671 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 120672 | /* VFMADD132PSZ256mbkz */ |
| 120673 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 120674 | /* VFMADD132PSZ256mk */ |
| 120675 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 120676 | /* VFMADD132PSZ256mkz */ |
| 120677 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 120678 | /* VFMADD132PSZ256r */ |
| 120679 | VR256X, VR256X, VR256X, VR256X, |
| 120680 | /* VFMADD132PSZ256rk */ |
| 120681 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 120682 | /* VFMADD132PSZ256rkz */ |
| 120683 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 120684 | /* VFMADD132PSZm */ |
| 120685 | VR512, VR512, VR512, f512mem, |
| 120686 | /* VFMADD132PSZmb */ |
| 120687 | VR512, VR512, VR512, f32mem, |
| 120688 | /* VFMADD132PSZmbk */ |
| 120689 | VR512, VR512, VK16WM, VR512, f32mem, |
| 120690 | /* VFMADD132PSZmbkz */ |
| 120691 | VR512, VR512, VK16WM, VR512, f32mem, |
| 120692 | /* VFMADD132PSZmk */ |
| 120693 | VR512, VR512, VK16WM, VR512, f512mem, |
| 120694 | /* VFMADD132PSZmkz */ |
| 120695 | VR512, VR512, VK16WM, VR512, f512mem, |
| 120696 | /* VFMADD132PSZr */ |
| 120697 | VR512, VR512, VR512, VR512, |
| 120698 | /* VFMADD132PSZrb */ |
| 120699 | VR512, VR512, VR512, VR512, AVX512RC, |
| 120700 | /* VFMADD132PSZrbk */ |
| 120701 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 120702 | /* VFMADD132PSZrbkz */ |
| 120703 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 120704 | /* VFMADD132PSZrk */ |
| 120705 | VR512, VR512, VK16WM, VR512, VR512, |
| 120706 | /* VFMADD132PSZrkz */ |
| 120707 | VR512, VR512, VK16WM, VR512, VR512, |
| 120708 | /* VFMADD132PSm */ |
| 120709 | VR128, VR128, VR128, f128mem, |
| 120710 | /* VFMADD132PSr */ |
| 120711 | VR128, VR128, VR128, VR128, |
| 120712 | /* VFMADD132SDZm */ |
| 120713 | FR64X, FR64X, FR64X, f64mem, |
| 120714 | /* VFMADD132SDZm_Int */ |
| 120715 | VR128X, VR128X, VR128X, sdmem, |
| 120716 | /* VFMADD132SDZm_Intk */ |
| 120717 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 120718 | /* VFMADD132SDZm_Intkz */ |
| 120719 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 120720 | /* VFMADD132SDZr */ |
| 120721 | FR64X, FR64X, FR64X, FR64X, |
| 120722 | /* VFMADD132SDZr_Int */ |
| 120723 | VR128X, VR128X, VR128X, VR128X, |
| 120724 | /* VFMADD132SDZr_Intk */ |
| 120725 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 120726 | /* VFMADD132SDZr_Intkz */ |
| 120727 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 120728 | /* VFMADD132SDZrb */ |
| 120729 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 120730 | /* VFMADD132SDZrb_Int */ |
| 120731 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 120732 | /* VFMADD132SDZrb_Intk */ |
| 120733 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 120734 | /* VFMADD132SDZrb_Intkz */ |
| 120735 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 120736 | /* VFMADD132SDm */ |
| 120737 | FR64, FR64, FR64, f64mem, |
| 120738 | /* VFMADD132SDm_Int */ |
| 120739 | VR128, VR128, VR128, sdmem, |
| 120740 | /* VFMADD132SDr */ |
| 120741 | FR64, FR64, FR64, FR64, |
| 120742 | /* VFMADD132SDr_Int */ |
| 120743 | VR128, VR128, VR128, VR128, |
| 120744 | /* VFMADD132SHZm */ |
| 120745 | FR16X, FR16X, FR16X, f16mem, |
| 120746 | /* VFMADD132SHZm_Int */ |
| 120747 | VR128X, VR128X, VR128X, shmem, |
| 120748 | /* VFMADD132SHZm_Intk */ |
| 120749 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 120750 | /* VFMADD132SHZm_Intkz */ |
| 120751 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 120752 | /* VFMADD132SHZr */ |
| 120753 | FR16X, FR16X, FR16X, FR16X, |
| 120754 | /* VFMADD132SHZr_Int */ |
| 120755 | VR128X, VR128X, VR128X, VR128X, |
| 120756 | /* VFMADD132SHZr_Intk */ |
| 120757 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 120758 | /* VFMADD132SHZr_Intkz */ |
| 120759 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 120760 | /* VFMADD132SHZrb */ |
| 120761 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 120762 | /* VFMADD132SHZrb_Int */ |
| 120763 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 120764 | /* VFMADD132SHZrb_Intk */ |
| 120765 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 120766 | /* VFMADD132SHZrb_Intkz */ |
| 120767 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 120768 | /* VFMADD132SSZm */ |
| 120769 | FR32X, FR32X, FR32X, f32mem, |
| 120770 | /* VFMADD132SSZm_Int */ |
| 120771 | VR128X, VR128X, VR128X, ssmem, |
| 120772 | /* VFMADD132SSZm_Intk */ |
| 120773 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 120774 | /* VFMADD132SSZm_Intkz */ |
| 120775 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 120776 | /* VFMADD132SSZr */ |
| 120777 | FR32X, FR32X, FR32X, FR32X, |
| 120778 | /* VFMADD132SSZr_Int */ |
| 120779 | VR128X, VR128X, VR128X, VR128X, |
| 120780 | /* VFMADD132SSZr_Intk */ |
| 120781 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 120782 | /* VFMADD132SSZr_Intkz */ |
| 120783 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 120784 | /* VFMADD132SSZrb */ |
| 120785 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 120786 | /* VFMADD132SSZrb_Int */ |
| 120787 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 120788 | /* VFMADD132SSZrb_Intk */ |
| 120789 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 120790 | /* VFMADD132SSZrb_Intkz */ |
| 120791 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 120792 | /* VFMADD132SSm */ |
| 120793 | FR32, FR32, FR32, f32mem, |
| 120794 | /* VFMADD132SSm_Int */ |
| 120795 | VR128, VR128, VR128, ssmem, |
| 120796 | /* VFMADD132SSr */ |
| 120797 | FR32, FR32, FR32, FR32, |
| 120798 | /* VFMADD132SSr_Int */ |
| 120799 | VR128, VR128, VR128, VR128, |
| 120800 | /* VFMADD213PDYm */ |
| 120801 | VR256, VR256, VR256, f256mem, |
| 120802 | /* VFMADD213PDYr */ |
| 120803 | VR256, VR256, VR256, VR256, |
| 120804 | /* VFMADD213PDZ128m */ |
| 120805 | VR128X, VR128X, VR128X, f128mem, |
| 120806 | /* VFMADD213PDZ128mb */ |
| 120807 | VR128X, VR128X, VR128X, f64mem, |
| 120808 | /* VFMADD213PDZ128mbk */ |
| 120809 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 120810 | /* VFMADD213PDZ128mbkz */ |
| 120811 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 120812 | /* VFMADD213PDZ128mk */ |
| 120813 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 120814 | /* VFMADD213PDZ128mkz */ |
| 120815 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 120816 | /* VFMADD213PDZ128r */ |
| 120817 | VR128X, VR128X, VR128X, VR128X, |
| 120818 | /* VFMADD213PDZ128rk */ |
| 120819 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 120820 | /* VFMADD213PDZ128rkz */ |
| 120821 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 120822 | /* VFMADD213PDZ256m */ |
| 120823 | VR256X, VR256X, VR256X, f256mem, |
| 120824 | /* VFMADD213PDZ256mb */ |
| 120825 | VR256X, VR256X, VR256X, f64mem, |
| 120826 | /* VFMADD213PDZ256mbk */ |
| 120827 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 120828 | /* VFMADD213PDZ256mbkz */ |
| 120829 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 120830 | /* VFMADD213PDZ256mk */ |
| 120831 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 120832 | /* VFMADD213PDZ256mkz */ |
| 120833 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 120834 | /* VFMADD213PDZ256r */ |
| 120835 | VR256X, VR256X, VR256X, VR256X, |
| 120836 | /* VFMADD213PDZ256rk */ |
| 120837 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 120838 | /* VFMADD213PDZ256rkz */ |
| 120839 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 120840 | /* VFMADD213PDZm */ |
| 120841 | VR512, VR512, VR512, f512mem, |
| 120842 | /* VFMADD213PDZmb */ |
| 120843 | VR512, VR512, VR512, f64mem, |
| 120844 | /* VFMADD213PDZmbk */ |
| 120845 | VR512, VR512, VK8WM, VR512, f64mem, |
| 120846 | /* VFMADD213PDZmbkz */ |
| 120847 | VR512, VR512, VK8WM, VR512, f64mem, |
| 120848 | /* VFMADD213PDZmk */ |
| 120849 | VR512, VR512, VK8WM, VR512, f512mem, |
| 120850 | /* VFMADD213PDZmkz */ |
| 120851 | VR512, VR512, VK8WM, VR512, f512mem, |
| 120852 | /* VFMADD213PDZr */ |
| 120853 | VR512, VR512, VR512, VR512, |
| 120854 | /* VFMADD213PDZrb */ |
| 120855 | VR512, VR512, VR512, VR512, AVX512RC, |
| 120856 | /* VFMADD213PDZrbk */ |
| 120857 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 120858 | /* VFMADD213PDZrbkz */ |
| 120859 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 120860 | /* VFMADD213PDZrk */ |
| 120861 | VR512, VR512, VK8WM, VR512, VR512, |
| 120862 | /* VFMADD213PDZrkz */ |
| 120863 | VR512, VR512, VK8WM, VR512, VR512, |
| 120864 | /* VFMADD213PDm */ |
| 120865 | VR128, VR128, VR128, f128mem, |
| 120866 | /* VFMADD213PDr */ |
| 120867 | VR128, VR128, VR128, VR128, |
| 120868 | /* VFMADD213PHZ128m */ |
| 120869 | VR128X, VR128X, VR128X, f128mem, |
| 120870 | /* VFMADD213PHZ128mb */ |
| 120871 | VR128X, VR128X, VR128X, f16mem, |
| 120872 | /* VFMADD213PHZ128mbk */ |
| 120873 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 120874 | /* VFMADD213PHZ128mbkz */ |
| 120875 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 120876 | /* VFMADD213PHZ128mk */ |
| 120877 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 120878 | /* VFMADD213PHZ128mkz */ |
| 120879 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 120880 | /* VFMADD213PHZ128r */ |
| 120881 | VR128X, VR128X, VR128X, VR128X, |
| 120882 | /* VFMADD213PHZ128rk */ |
| 120883 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 120884 | /* VFMADD213PHZ128rkz */ |
| 120885 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 120886 | /* VFMADD213PHZ256m */ |
| 120887 | VR256X, VR256X, VR256X, f256mem, |
| 120888 | /* VFMADD213PHZ256mb */ |
| 120889 | VR256X, VR256X, VR256X, f16mem, |
| 120890 | /* VFMADD213PHZ256mbk */ |
| 120891 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 120892 | /* VFMADD213PHZ256mbkz */ |
| 120893 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 120894 | /* VFMADD213PHZ256mk */ |
| 120895 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 120896 | /* VFMADD213PHZ256mkz */ |
| 120897 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 120898 | /* VFMADD213PHZ256r */ |
| 120899 | VR256X, VR256X, VR256X, VR256X, |
| 120900 | /* VFMADD213PHZ256rk */ |
| 120901 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 120902 | /* VFMADD213PHZ256rkz */ |
| 120903 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 120904 | /* VFMADD213PHZm */ |
| 120905 | VR512, VR512, VR512, f512mem, |
| 120906 | /* VFMADD213PHZmb */ |
| 120907 | VR512, VR512, VR512, f16mem, |
| 120908 | /* VFMADD213PHZmbk */ |
| 120909 | VR512, VR512, VK32WM, VR512, f16mem, |
| 120910 | /* VFMADD213PHZmbkz */ |
| 120911 | VR512, VR512, VK32WM, VR512, f16mem, |
| 120912 | /* VFMADD213PHZmk */ |
| 120913 | VR512, VR512, VK32WM, VR512, f512mem, |
| 120914 | /* VFMADD213PHZmkz */ |
| 120915 | VR512, VR512, VK32WM, VR512, f512mem, |
| 120916 | /* VFMADD213PHZr */ |
| 120917 | VR512, VR512, VR512, VR512, |
| 120918 | /* VFMADD213PHZrb */ |
| 120919 | VR512, VR512, VR512, VR512, AVX512RC, |
| 120920 | /* VFMADD213PHZrbk */ |
| 120921 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 120922 | /* VFMADD213PHZrbkz */ |
| 120923 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 120924 | /* VFMADD213PHZrk */ |
| 120925 | VR512, VR512, VK32WM, VR512, VR512, |
| 120926 | /* VFMADD213PHZrkz */ |
| 120927 | VR512, VR512, VK32WM, VR512, VR512, |
| 120928 | /* VFMADD213PSYm */ |
| 120929 | VR256, VR256, VR256, f256mem, |
| 120930 | /* VFMADD213PSYr */ |
| 120931 | VR256, VR256, VR256, VR256, |
| 120932 | /* VFMADD213PSZ128m */ |
| 120933 | VR128X, VR128X, VR128X, f128mem, |
| 120934 | /* VFMADD213PSZ128mb */ |
| 120935 | VR128X, VR128X, VR128X, f32mem, |
| 120936 | /* VFMADD213PSZ128mbk */ |
| 120937 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 120938 | /* VFMADD213PSZ128mbkz */ |
| 120939 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 120940 | /* VFMADD213PSZ128mk */ |
| 120941 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 120942 | /* VFMADD213PSZ128mkz */ |
| 120943 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 120944 | /* VFMADD213PSZ128r */ |
| 120945 | VR128X, VR128X, VR128X, VR128X, |
| 120946 | /* VFMADD213PSZ128rk */ |
| 120947 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120948 | /* VFMADD213PSZ128rkz */ |
| 120949 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 120950 | /* VFMADD213PSZ256m */ |
| 120951 | VR256X, VR256X, VR256X, f256mem, |
| 120952 | /* VFMADD213PSZ256mb */ |
| 120953 | VR256X, VR256X, VR256X, f32mem, |
| 120954 | /* VFMADD213PSZ256mbk */ |
| 120955 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 120956 | /* VFMADD213PSZ256mbkz */ |
| 120957 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 120958 | /* VFMADD213PSZ256mk */ |
| 120959 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 120960 | /* VFMADD213PSZ256mkz */ |
| 120961 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 120962 | /* VFMADD213PSZ256r */ |
| 120963 | VR256X, VR256X, VR256X, VR256X, |
| 120964 | /* VFMADD213PSZ256rk */ |
| 120965 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 120966 | /* VFMADD213PSZ256rkz */ |
| 120967 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 120968 | /* VFMADD213PSZm */ |
| 120969 | VR512, VR512, VR512, f512mem, |
| 120970 | /* VFMADD213PSZmb */ |
| 120971 | VR512, VR512, VR512, f32mem, |
| 120972 | /* VFMADD213PSZmbk */ |
| 120973 | VR512, VR512, VK16WM, VR512, f32mem, |
| 120974 | /* VFMADD213PSZmbkz */ |
| 120975 | VR512, VR512, VK16WM, VR512, f32mem, |
| 120976 | /* VFMADD213PSZmk */ |
| 120977 | VR512, VR512, VK16WM, VR512, f512mem, |
| 120978 | /* VFMADD213PSZmkz */ |
| 120979 | VR512, VR512, VK16WM, VR512, f512mem, |
| 120980 | /* VFMADD213PSZr */ |
| 120981 | VR512, VR512, VR512, VR512, |
| 120982 | /* VFMADD213PSZrb */ |
| 120983 | VR512, VR512, VR512, VR512, AVX512RC, |
| 120984 | /* VFMADD213PSZrbk */ |
| 120985 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 120986 | /* VFMADD213PSZrbkz */ |
| 120987 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 120988 | /* VFMADD213PSZrk */ |
| 120989 | VR512, VR512, VK16WM, VR512, VR512, |
| 120990 | /* VFMADD213PSZrkz */ |
| 120991 | VR512, VR512, VK16WM, VR512, VR512, |
| 120992 | /* VFMADD213PSm */ |
| 120993 | VR128, VR128, VR128, f128mem, |
| 120994 | /* VFMADD213PSr */ |
| 120995 | VR128, VR128, VR128, VR128, |
| 120996 | /* VFMADD213SDZm */ |
| 120997 | FR64X, FR64X, FR64X, f64mem, |
| 120998 | /* VFMADD213SDZm_Int */ |
| 120999 | VR128X, VR128X, VR128X, sdmem, |
| 121000 | /* VFMADD213SDZm_Intk */ |
| 121001 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 121002 | /* VFMADD213SDZm_Intkz */ |
| 121003 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 121004 | /* VFMADD213SDZr */ |
| 121005 | FR64X, FR64X, FR64X, FR64X, |
| 121006 | /* VFMADD213SDZr_Int */ |
| 121007 | VR128X, VR128X, VR128X, VR128X, |
| 121008 | /* VFMADD213SDZr_Intk */ |
| 121009 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121010 | /* VFMADD213SDZr_Intkz */ |
| 121011 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121012 | /* VFMADD213SDZrb */ |
| 121013 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 121014 | /* VFMADD213SDZrb_Int */ |
| 121015 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 121016 | /* VFMADD213SDZrb_Intk */ |
| 121017 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121018 | /* VFMADD213SDZrb_Intkz */ |
| 121019 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121020 | /* VFMADD213SDm */ |
| 121021 | FR64, FR64, FR64, f64mem, |
| 121022 | /* VFMADD213SDm_Int */ |
| 121023 | VR128, VR128, VR128, sdmem, |
| 121024 | /* VFMADD213SDr */ |
| 121025 | FR64, FR64, FR64, FR64, |
| 121026 | /* VFMADD213SDr_Int */ |
| 121027 | VR128, VR128, VR128, VR128, |
| 121028 | /* VFMADD213SHZm */ |
| 121029 | FR16X, FR16X, FR16X, f16mem, |
| 121030 | /* VFMADD213SHZm_Int */ |
| 121031 | VR128X, VR128X, VR128X, shmem, |
| 121032 | /* VFMADD213SHZm_Intk */ |
| 121033 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 121034 | /* VFMADD213SHZm_Intkz */ |
| 121035 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 121036 | /* VFMADD213SHZr */ |
| 121037 | FR16X, FR16X, FR16X, FR16X, |
| 121038 | /* VFMADD213SHZr_Int */ |
| 121039 | VR128X, VR128X, VR128X, VR128X, |
| 121040 | /* VFMADD213SHZr_Intk */ |
| 121041 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121042 | /* VFMADD213SHZr_Intkz */ |
| 121043 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121044 | /* VFMADD213SHZrb */ |
| 121045 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 121046 | /* VFMADD213SHZrb_Int */ |
| 121047 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 121048 | /* VFMADD213SHZrb_Intk */ |
| 121049 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121050 | /* VFMADD213SHZrb_Intkz */ |
| 121051 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121052 | /* VFMADD213SSZm */ |
| 121053 | FR32X, FR32X, FR32X, f32mem, |
| 121054 | /* VFMADD213SSZm_Int */ |
| 121055 | VR128X, VR128X, VR128X, ssmem, |
| 121056 | /* VFMADD213SSZm_Intk */ |
| 121057 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 121058 | /* VFMADD213SSZm_Intkz */ |
| 121059 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 121060 | /* VFMADD213SSZr */ |
| 121061 | FR32X, FR32X, FR32X, FR32X, |
| 121062 | /* VFMADD213SSZr_Int */ |
| 121063 | VR128X, VR128X, VR128X, VR128X, |
| 121064 | /* VFMADD213SSZr_Intk */ |
| 121065 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121066 | /* VFMADD213SSZr_Intkz */ |
| 121067 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121068 | /* VFMADD213SSZrb */ |
| 121069 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 121070 | /* VFMADD213SSZrb_Int */ |
| 121071 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 121072 | /* VFMADD213SSZrb_Intk */ |
| 121073 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121074 | /* VFMADD213SSZrb_Intkz */ |
| 121075 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121076 | /* VFMADD213SSm */ |
| 121077 | FR32, FR32, FR32, f32mem, |
| 121078 | /* VFMADD213SSm_Int */ |
| 121079 | VR128, VR128, VR128, ssmem, |
| 121080 | /* VFMADD213SSr */ |
| 121081 | FR32, FR32, FR32, FR32, |
| 121082 | /* VFMADD213SSr_Int */ |
| 121083 | VR128, VR128, VR128, VR128, |
| 121084 | /* VFMADD231PDYm */ |
| 121085 | VR256, VR256, VR256, f256mem, |
| 121086 | /* VFMADD231PDYr */ |
| 121087 | VR256, VR256, VR256, VR256, |
| 121088 | /* VFMADD231PDZ128m */ |
| 121089 | VR128X, VR128X, VR128X, f128mem, |
| 121090 | /* VFMADD231PDZ128mb */ |
| 121091 | VR128X, VR128X, VR128X, f64mem, |
| 121092 | /* VFMADD231PDZ128mbk */ |
| 121093 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 121094 | /* VFMADD231PDZ128mbkz */ |
| 121095 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 121096 | /* VFMADD231PDZ128mk */ |
| 121097 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 121098 | /* VFMADD231PDZ128mkz */ |
| 121099 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 121100 | /* VFMADD231PDZ128r */ |
| 121101 | VR128X, VR128X, VR128X, VR128X, |
| 121102 | /* VFMADD231PDZ128rk */ |
| 121103 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 121104 | /* VFMADD231PDZ128rkz */ |
| 121105 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 121106 | /* VFMADD231PDZ256m */ |
| 121107 | VR256X, VR256X, VR256X, f256mem, |
| 121108 | /* VFMADD231PDZ256mb */ |
| 121109 | VR256X, VR256X, VR256X, f64mem, |
| 121110 | /* VFMADD231PDZ256mbk */ |
| 121111 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 121112 | /* VFMADD231PDZ256mbkz */ |
| 121113 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 121114 | /* VFMADD231PDZ256mk */ |
| 121115 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 121116 | /* VFMADD231PDZ256mkz */ |
| 121117 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 121118 | /* VFMADD231PDZ256r */ |
| 121119 | VR256X, VR256X, VR256X, VR256X, |
| 121120 | /* VFMADD231PDZ256rk */ |
| 121121 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 121122 | /* VFMADD231PDZ256rkz */ |
| 121123 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 121124 | /* VFMADD231PDZm */ |
| 121125 | VR512, VR512, VR512, f512mem, |
| 121126 | /* VFMADD231PDZmb */ |
| 121127 | VR512, VR512, VR512, f64mem, |
| 121128 | /* VFMADD231PDZmbk */ |
| 121129 | VR512, VR512, VK8WM, VR512, f64mem, |
| 121130 | /* VFMADD231PDZmbkz */ |
| 121131 | VR512, VR512, VK8WM, VR512, f64mem, |
| 121132 | /* VFMADD231PDZmk */ |
| 121133 | VR512, VR512, VK8WM, VR512, f512mem, |
| 121134 | /* VFMADD231PDZmkz */ |
| 121135 | VR512, VR512, VK8WM, VR512, f512mem, |
| 121136 | /* VFMADD231PDZr */ |
| 121137 | VR512, VR512, VR512, VR512, |
| 121138 | /* VFMADD231PDZrb */ |
| 121139 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121140 | /* VFMADD231PDZrbk */ |
| 121141 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 121142 | /* VFMADD231PDZrbkz */ |
| 121143 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 121144 | /* VFMADD231PDZrk */ |
| 121145 | VR512, VR512, VK8WM, VR512, VR512, |
| 121146 | /* VFMADD231PDZrkz */ |
| 121147 | VR512, VR512, VK8WM, VR512, VR512, |
| 121148 | /* VFMADD231PDm */ |
| 121149 | VR128, VR128, VR128, f128mem, |
| 121150 | /* VFMADD231PDr */ |
| 121151 | VR128, VR128, VR128, VR128, |
| 121152 | /* VFMADD231PHZ128m */ |
| 121153 | VR128X, VR128X, VR128X, f128mem, |
| 121154 | /* VFMADD231PHZ128mb */ |
| 121155 | VR128X, VR128X, VR128X, f16mem, |
| 121156 | /* VFMADD231PHZ128mbk */ |
| 121157 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121158 | /* VFMADD231PHZ128mbkz */ |
| 121159 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121160 | /* VFMADD231PHZ128mk */ |
| 121161 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121162 | /* VFMADD231PHZ128mkz */ |
| 121163 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121164 | /* VFMADD231PHZ128r */ |
| 121165 | VR128X, VR128X, VR128X, VR128X, |
| 121166 | /* VFMADD231PHZ128rk */ |
| 121167 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121168 | /* VFMADD231PHZ128rkz */ |
| 121169 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121170 | /* VFMADD231PHZ256m */ |
| 121171 | VR256X, VR256X, VR256X, f256mem, |
| 121172 | /* VFMADD231PHZ256mb */ |
| 121173 | VR256X, VR256X, VR256X, f16mem, |
| 121174 | /* VFMADD231PHZ256mbk */ |
| 121175 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121176 | /* VFMADD231PHZ256mbkz */ |
| 121177 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121178 | /* VFMADD231PHZ256mk */ |
| 121179 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 121180 | /* VFMADD231PHZ256mkz */ |
| 121181 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 121182 | /* VFMADD231PHZ256r */ |
| 121183 | VR256X, VR256X, VR256X, VR256X, |
| 121184 | /* VFMADD231PHZ256rk */ |
| 121185 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 121186 | /* VFMADD231PHZ256rkz */ |
| 121187 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 121188 | /* VFMADD231PHZm */ |
| 121189 | VR512, VR512, VR512, f512mem, |
| 121190 | /* VFMADD231PHZmb */ |
| 121191 | VR512, VR512, VR512, f16mem, |
| 121192 | /* VFMADD231PHZmbk */ |
| 121193 | VR512, VR512, VK32WM, VR512, f16mem, |
| 121194 | /* VFMADD231PHZmbkz */ |
| 121195 | VR512, VR512, VK32WM, VR512, f16mem, |
| 121196 | /* VFMADD231PHZmk */ |
| 121197 | VR512, VR512, VK32WM, VR512, f512mem, |
| 121198 | /* VFMADD231PHZmkz */ |
| 121199 | VR512, VR512, VK32WM, VR512, f512mem, |
| 121200 | /* VFMADD231PHZr */ |
| 121201 | VR512, VR512, VR512, VR512, |
| 121202 | /* VFMADD231PHZrb */ |
| 121203 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121204 | /* VFMADD231PHZrbk */ |
| 121205 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 121206 | /* VFMADD231PHZrbkz */ |
| 121207 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 121208 | /* VFMADD231PHZrk */ |
| 121209 | VR512, VR512, VK32WM, VR512, VR512, |
| 121210 | /* VFMADD231PHZrkz */ |
| 121211 | VR512, VR512, VK32WM, VR512, VR512, |
| 121212 | /* VFMADD231PSYm */ |
| 121213 | VR256, VR256, VR256, f256mem, |
| 121214 | /* VFMADD231PSYr */ |
| 121215 | VR256, VR256, VR256, VR256, |
| 121216 | /* VFMADD231PSZ128m */ |
| 121217 | VR128X, VR128X, VR128X, f128mem, |
| 121218 | /* VFMADD231PSZ128mb */ |
| 121219 | VR128X, VR128X, VR128X, f32mem, |
| 121220 | /* VFMADD231PSZ128mbk */ |
| 121221 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 121222 | /* VFMADD231PSZ128mbkz */ |
| 121223 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 121224 | /* VFMADD231PSZ128mk */ |
| 121225 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 121226 | /* VFMADD231PSZ128mkz */ |
| 121227 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 121228 | /* VFMADD231PSZ128r */ |
| 121229 | VR128X, VR128X, VR128X, VR128X, |
| 121230 | /* VFMADD231PSZ128rk */ |
| 121231 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121232 | /* VFMADD231PSZ128rkz */ |
| 121233 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121234 | /* VFMADD231PSZ256m */ |
| 121235 | VR256X, VR256X, VR256X, f256mem, |
| 121236 | /* VFMADD231PSZ256mb */ |
| 121237 | VR256X, VR256X, VR256X, f32mem, |
| 121238 | /* VFMADD231PSZ256mbk */ |
| 121239 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 121240 | /* VFMADD231PSZ256mbkz */ |
| 121241 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 121242 | /* VFMADD231PSZ256mk */ |
| 121243 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 121244 | /* VFMADD231PSZ256mkz */ |
| 121245 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 121246 | /* VFMADD231PSZ256r */ |
| 121247 | VR256X, VR256X, VR256X, VR256X, |
| 121248 | /* VFMADD231PSZ256rk */ |
| 121249 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 121250 | /* VFMADD231PSZ256rkz */ |
| 121251 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 121252 | /* VFMADD231PSZm */ |
| 121253 | VR512, VR512, VR512, f512mem, |
| 121254 | /* VFMADD231PSZmb */ |
| 121255 | VR512, VR512, VR512, f32mem, |
| 121256 | /* VFMADD231PSZmbk */ |
| 121257 | VR512, VR512, VK16WM, VR512, f32mem, |
| 121258 | /* VFMADD231PSZmbkz */ |
| 121259 | VR512, VR512, VK16WM, VR512, f32mem, |
| 121260 | /* VFMADD231PSZmk */ |
| 121261 | VR512, VR512, VK16WM, VR512, f512mem, |
| 121262 | /* VFMADD231PSZmkz */ |
| 121263 | VR512, VR512, VK16WM, VR512, f512mem, |
| 121264 | /* VFMADD231PSZr */ |
| 121265 | VR512, VR512, VR512, VR512, |
| 121266 | /* VFMADD231PSZrb */ |
| 121267 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121268 | /* VFMADD231PSZrbk */ |
| 121269 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 121270 | /* VFMADD231PSZrbkz */ |
| 121271 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 121272 | /* VFMADD231PSZrk */ |
| 121273 | VR512, VR512, VK16WM, VR512, VR512, |
| 121274 | /* VFMADD231PSZrkz */ |
| 121275 | VR512, VR512, VK16WM, VR512, VR512, |
| 121276 | /* VFMADD231PSm */ |
| 121277 | VR128, VR128, VR128, f128mem, |
| 121278 | /* VFMADD231PSr */ |
| 121279 | VR128, VR128, VR128, VR128, |
| 121280 | /* VFMADD231SDZm */ |
| 121281 | FR64X, FR64X, FR64X, f64mem, |
| 121282 | /* VFMADD231SDZm_Int */ |
| 121283 | VR128X, VR128X, VR128X, sdmem, |
| 121284 | /* VFMADD231SDZm_Intk */ |
| 121285 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 121286 | /* VFMADD231SDZm_Intkz */ |
| 121287 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 121288 | /* VFMADD231SDZr */ |
| 121289 | FR64X, FR64X, FR64X, FR64X, |
| 121290 | /* VFMADD231SDZr_Int */ |
| 121291 | VR128X, VR128X, VR128X, VR128X, |
| 121292 | /* VFMADD231SDZr_Intk */ |
| 121293 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121294 | /* VFMADD231SDZr_Intkz */ |
| 121295 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121296 | /* VFMADD231SDZrb */ |
| 121297 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 121298 | /* VFMADD231SDZrb_Int */ |
| 121299 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 121300 | /* VFMADD231SDZrb_Intk */ |
| 121301 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121302 | /* VFMADD231SDZrb_Intkz */ |
| 121303 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121304 | /* VFMADD231SDm */ |
| 121305 | FR64, FR64, FR64, f64mem, |
| 121306 | /* VFMADD231SDm_Int */ |
| 121307 | VR128, VR128, VR128, sdmem, |
| 121308 | /* VFMADD231SDr */ |
| 121309 | FR64, FR64, FR64, FR64, |
| 121310 | /* VFMADD231SDr_Int */ |
| 121311 | VR128, VR128, VR128, VR128, |
| 121312 | /* VFMADD231SHZm */ |
| 121313 | FR16X, FR16X, FR16X, f16mem, |
| 121314 | /* VFMADD231SHZm_Int */ |
| 121315 | VR128X, VR128X, VR128X, shmem, |
| 121316 | /* VFMADD231SHZm_Intk */ |
| 121317 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 121318 | /* VFMADD231SHZm_Intkz */ |
| 121319 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 121320 | /* VFMADD231SHZr */ |
| 121321 | FR16X, FR16X, FR16X, FR16X, |
| 121322 | /* VFMADD231SHZr_Int */ |
| 121323 | VR128X, VR128X, VR128X, VR128X, |
| 121324 | /* VFMADD231SHZr_Intk */ |
| 121325 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121326 | /* VFMADD231SHZr_Intkz */ |
| 121327 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121328 | /* VFMADD231SHZrb */ |
| 121329 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 121330 | /* VFMADD231SHZrb_Int */ |
| 121331 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 121332 | /* VFMADD231SHZrb_Intk */ |
| 121333 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121334 | /* VFMADD231SHZrb_Intkz */ |
| 121335 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121336 | /* VFMADD231SSZm */ |
| 121337 | FR32X, FR32X, FR32X, f32mem, |
| 121338 | /* VFMADD231SSZm_Int */ |
| 121339 | VR128X, VR128X, VR128X, ssmem, |
| 121340 | /* VFMADD231SSZm_Intk */ |
| 121341 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 121342 | /* VFMADD231SSZm_Intkz */ |
| 121343 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 121344 | /* VFMADD231SSZr */ |
| 121345 | FR32X, FR32X, FR32X, FR32X, |
| 121346 | /* VFMADD231SSZr_Int */ |
| 121347 | VR128X, VR128X, VR128X, VR128X, |
| 121348 | /* VFMADD231SSZr_Intk */ |
| 121349 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121350 | /* VFMADD231SSZr_Intkz */ |
| 121351 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 121352 | /* VFMADD231SSZrb */ |
| 121353 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 121354 | /* VFMADD231SSZrb_Int */ |
| 121355 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 121356 | /* VFMADD231SSZrb_Intk */ |
| 121357 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121358 | /* VFMADD231SSZrb_Intkz */ |
| 121359 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 121360 | /* VFMADD231SSm */ |
| 121361 | FR32, FR32, FR32, f32mem, |
| 121362 | /* VFMADD231SSm_Int */ |
| 121363 | VR128, VR128, VR128, ssmem, |
| 121364 | /* VFMADD231SSr */ |
| 121365 | FR32, FR32, FR32, FR32, |
| 121366 | /* VFMADD231SSr_Int */ |
| 121367 | VR128, VR128, VR128, VR128, |
| 121368 | /* VFMADDCPHZ128m */ |
| 121369 | VR128X, VR128X, VR128X, f128mem, |
| 121370 | /* VFMADDCPHZ128mb */ |
| 121371 | VR128X, VR128X, VR128X, f32mem, |
| 121372 | /* VFMADDCPHZ128mbk */ |
| 121373 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 121374 | /* VFMADDCPHZ128mbkz */ |
| 121375 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 121376 | /* VFMADDCPHZ128mk */ |
| 121377 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 121378 | /* VFMADDCPHZ128mkz */ |
| 121379 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 121380 | /* VFMADDCPHZ128r */ |
| 121381 | VR128X, VR128X, VR128X, VR128X, |
| 121382 | /* VFMADDCPHZ128rk */ |
| 121383 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121384 | /* VFMADDCPHZ128rkz */ |
| 121385 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121386 | /* VFMADDCPHZ256m */ |
| 121387 | VR256X, VR256X, VR256X, f256mem, |
| 121388 | /* VFMADDCPHZ256mb */ |
| 121389 | VR256X, VR256X, VR256X, f32mem, |
| 121390 | /* VFMADDCPHZ256mbk */ |
| 121391 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 121392 | /* VFMADDCPHZ256mbkz */ |
| 121393 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 121394 | /* VFMADDCPHZ256mk */ |
| 121395 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 121396 | /* VFMADDCPHZ256mkz */ |
| 121397 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 121398 | /* VFMADDCPHZ256r */ |
| 121399 | VR256X, VR256X, VR256X, VR256X, |
| 121400 | /* VFMADDCPHZ256rk */ |
| 121401 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 121402 | /* VFMADDCPHZ256rkz */ |
| 121403 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 121404 | /* VFMADDCPHZm */ |
| 121405 | VR512, VR512, VR512, f512mem, |
| 121406 | /* VFMADDCPHZmb */ |
| 121407 | VR512, VR512, VR512, f32mem, |
| 121408 | /* VFMADDCPHZmbk */ |
| 121409 | VR512, VR512, VK16WM, VR512, f32mem, |
| 121410 | /* VFMADDCPHZmbkz */ |
| 121411 | VR512, VR512, VK16WM, VR512, f32mem, |
| 121412 | /* VFMADDCPHZmk */ |
| 121413 | VR512, VR512, VK16WM, VR512, f512mem, |
| 121414 | /* VFMADDCPHZmkz */ |
| 121415 | VR512, VR512, VK16WM, VR512, f512mem, |
| 121416 | /* VFMADDCPHZr */ |
| 121417 | VR512, VR512, VR512, VR512, |
| 121418 | /* VFMADDCPHZrb */ |
| 121419 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121420 | /* VFMADDCPHZrbk */ |
| 121421 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 121422 | /* VFMADDCPHZrbkz */ |
| 121423 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 121424 | /* VFMADDCPHZrk */ |
| 121425 | VR512, VR512, VK16WM, VR512, VR512, |
| 121426 | /* VFMADDCPHZrkz */ |
| 121427 | VR512, VR512, VK16WM, VR512, VR512, |
| 121428 | /* VFMADDCSHZm */ |
| 121429 | VR128X, VR128X, VR128X, ssmem, |
| 121430 | /* VFMADDCSHZmk */ |
| 121431 | VR128X, VR128X, VK4WM, VR128X, ssmem, |
| 121432 | /* VFMADDCSHZmkz */ |
| 121433 | VR128X, VR128X, VK4WM, VR128X, ssmem, |
| 121434 | /* VFMADDCSHZr */ |
| 121435 | VR128X, VR128X, VR128X, VR128X, |
| 121436 | /* VFMADDCSHZrb */ |
| 121437 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 121438 | /* VFMADDCSHZrbk */ |
| 121439 | VR128X, VR128X, VK4WM, VR128X, VR128X, AVX512RC, |
| 121440 | /* VFMADDCSHZrbkz */ |
| 121441 | VR128X, VR128X, VK4WM, VR128X, VR128X, AVX512RC, |
| 121442 | /* VFMADDCSHZrk */ |
| 121443 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121444 | /* VFMADDCSHZrkz */ |
| 121445 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121446 | /* VFMADDPD4Ymr */ |
| 121447 | VR256, VR256, f256mem, VR256, |
| 121448 | /* VFMADDPD4Yrm */ |
| 121449 | VR256, VR256, VR256, f256mem, |
| 121450 | /* VFMADDPD4Yrr */ |
| 121451 | VR256, VR256, VR256, VR256, |
| 121452 | /* VFMADDPD4Yrr_REV */ |
| 121453 | VR256, VR256, VR256, VR256, |
| 121454 | /* VFMADDPD4mr */ |
| 121455 | VR128, VR128, f128mem, VR128, |
| 121456 | /* VFMADDPD4rm */ |
| 121457 | VR128, VR128, VR128, f128mem, |
| 121458 | /* VFMADDPD4rr */ |
| 121459 | VR128, VR128, VR128, VR128, |
| 121460 | /* VFMADDPD4rr_REV */ |
| 121461 | VR128, VR128, VR128, VR128, |
| 121462 | /* VFMADDPS4Ymr */ |
| 121463 | VR256, VR256, f256mem, VR256, |
| 121464 | /* VFMADDPS4Yrm */ |
| 121465 | VR256, VR256, VR256, f256mem, |
| 121466 | /* VFMADDPS4Yrr */ |
| 121467 | VR256, VR256, VR256, VR256, |
| 121468 | /* VFMADDPS4Yrr_REV */ |
| 121469 | VR256, VR256, VR256, VR256, |
| 121470 | /* VFMADDPS4mr */ |
| 121471 | VR128, VR128, f128mem, VR128, |
| 121472 | /* VFMADDPS4rm */ |
| 121473 | VR128, VR128, VR128, f128mem, |
| 121474 | /* VFMADDPS4rr */ |
| 121475 | VR128, VR128, VR128, VR128, |
| 121476 | /* VFMADDPS4rr_REV */ |
| 121477 | VR128, VR128, VR128, VR128, |
| 121478 | /* VFMADDSD4mr */ |
| 121479 | FR64, FR64, f64mem, FR64, |
| 121480 | /* VFMADDSD4mr_Int */ |
| 121481 | VR128, VR128, sdmem, VR128, |
| 121482 | /* VFMADDSD4rm */ |
| 121483 | FR64, FR64, FR64, f64mem, |
| 121484 | /* VFMADDSD4rm_Int */ |
| 121485 | VR128, VR128, VR128, sdmem, |
| 121486 | /* VFMADDSD4rr */ |
| 121487 | FR64, FR64, FR64, FR64, |
| 121488 | /* VFMADDSD4rr_Int */ |
| 121489 | VR128, VR128, VR128, VR128, |
| 121490 | /* VFMADDSD4rr_Int_REV */ |
| 121491 | VR128, VR128, VR128, VR128, |
| 121492 | /* VFMADDSD4rr_REV */ |
| 121493 | FR64, FR64, FR64, FR64, |
| 121494 | /* VFMADDSS4mr */ |
| 121495 | FR32, FR32, f32mem, FR32, |
| 121496 | /* VFMADDSS4mr_Int */ |
| 121497 | VR128, VR128, ssmem, VR128, |
| 121498 | /* VFMADDSS4rm */ |
| 121499 | FR32, FR32, FR32, f32mem, |
| 121500 | /* VFMADDSS4rm_Int */ |
| 121501 | VR128, VR128, VR128, ssmem, |
| 121502 | /* VFMADDSS4rr */ |
| 121503 | FR32, FR32, FR32, FR32, |
| 121504 | /* VFMADDSS4rr_Int */ |
| 121505 | VR128, VR128, VR128, VR128, |
| 121506 | /* VFMADDSS4rr_Int_REV */ |
| 121507 | VR128, VR128, VR128, VR128, |
| 121508 | /* VFMADDSS4rr_REV */ |
| 121509 | FR32, FR32, FR32, FR32, |
| 121510 | /* VFMADDSUB132PDYm */ |
| 121511 | VR256, VR256, VR256, f256mem, |
| 121512 | /* VFMADDSUB132PDYr */ |
| 121513 | VR256, VR256, VR256, VR256, |
| 121514 | /* VFMADDSUB132PDZ128m */ |
| 121515 | VR128X, VR128X, VR128X, f128mem, |
| 121516 | /* VFMADDSUB132PDZ128mb */ |
| 121517 | VR128X, VR128X, VR128X, f64mem, |
| 121518 | /* VFMADDSUB132PDZ128mbk */ |
| 121519 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 121520 | /* VFMADDSUB132PDZ128mbkz */ |
| 121521 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 121522 | /* VFMADDSUB132PDZ128mk */ |
| 121523 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 121524 | /* VFMADDSUB132PDZ128mkz */ |
| 121525 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 121526 | /* VFMADDSUB132PDZ128r */ |
| 121527 | VR128X, VR128X, VR128X, VR128X, |
| 121528 | /* VFMADDSUB132PDZ128rk */ |
| 121529 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 121530 | /* VFMADDSUB132PDZ128rkz */ |
| 121531 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 121532 | /* VFMADDSUB132PDZ256m */ |
| 121533 | VR256X, VR256X, VR256X, f256mem, |
| 121534 | /* VFMADDSUB132PDZ256mb */ |
| 121535 | VR256X, VR256X, VR256X, f64mem, |
| 121536 | /* VFMADDSUB132PDZ256mbk */ |
| 121537 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 121538 | /* VFMADDSUB132PDZ256mbkz */ |
| 121539 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 121540 | /* VFMADDSUB132PDZ256mk */ |
| 121541 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 121542 | /* VFMADDSUB132PDZ256mkz */ |
| 121543 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 121544 | /* VFMADDSUB132PDZ256r */ |
| 121545 | VR256X, VR256X, VR256X, VR256X, |
| 121546 | /* VFMADDSUB132PDZ256rk */ |
| 121547 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 121548 | /* VFMADDSUB132PDZ256rkz */ |
| 121549 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 121550 | /* VFMADDSUB132PDZm */ |
| 121551 | VR512, VR512, VR512, f512mem, |
| 121552 | /* VFMADDSUB132PDZmb */ |
| 121553 | VR512, VR512, VR512, f64mem, |
| 121554 | /* VFMADDSUB132PDZmbk */ |
| 121555 | VR512, VR512, VK8WM, VR512, f64mem, |
| 121556 | /* VFMADDSUB132PDZmbkz */ |
| 121557 | VR512, VR512, VK8WM, VR512, f64mem, |
| 121558 | /* VFMADDSUB132PDZmk */ |
| 121559 | VR512, VR512, VK8WM, VR512, f512mem, |
| 121560 | /* VFMADDSUB132PDZmkz */ |
| 121561 | VR512, VR512, VK8WM, VR512, f512mem, |
| 121562 | /* VFMADDSUB132PDZr */ |
| 121563 | VR512, VR512, VR512, VR512, |
| 121564 | /* VFMADDSUB132PDZrb */ |
| 121565 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121566 | /* VFMADDSUB132PDZrbk */ |
| 121567 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 121568 | /* VFMADDSUB132PDZrbkz */ |
| 121569 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 121570 | /* VFMADDSUB132PDZrk */ |
| 121571 | VR512, VR512, VK8WM, VR512, VR512, |
| 121572 | /* VFMADDSUB132PDZrkz */ |
| 121573 | VR512, VR512, VK8WM, VR512, VR512, |
| 121574 | /* VFMADDSUB132PDm */ |
| 121575 | VR128, VR128, VR128, f128mem, |
| 121576 | /* VFMADDSUB132PDr */ |
| 121577 | VR128, VR128, VR128, VR128, |
| 121578 | /* VFMADDSUB132PHZ128m */ |
| 121579 | VR128X, VR128X, VR128X, f128mem, |
| 121580 | /* VFMADDSUB132PHZ128mb */ |
| 121581 | VR128X, VR128X, VR128X, f16mem, |
| 121582 | /* VFMADDSUB132PHZ128mbk */ |
| 121583 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121584 | /* VFMADDSUB132PHZ128mbkz */ |
| 121585 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121586 | /* VFMADDSUB132PHZ128mk */ |
| 121587 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121588 | /* VFMADDSUB132PHZ128mkz */ |
| 121589 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121590 | /* VFMADDSUB132PHZ128r */ |
| 121591 | VR128X, VR128X, VR128X, VR128X, |
| 121592 | /* VFMADDSUB132PHZ128rk */ |
| 121593 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121594 | /* VFMADDSUB132PHZ128rkz */ |
| 121595 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121596 | /* VFMADDSUB132PHZ256m */ |
| 121597 | VR256X, VR256X, VR256X, f256mem, |
| 121598 | /* VFMADDSUB132PHZ256mb */ |
| 121599 | VR256X, VR256X, VR256X, f16mem, |
| 121600 | /* VFMADDSUB132PHZ256mbk */ |
| 121601 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121602 | /* VFMADDSUB132PHZ256mbkz */ |
| 121603 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121604 | /* VFMADDSUB132PHZ256mk */ |
| 121605 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 121606 | /* VFMADDSUB132PHZ256mkz */ |
| 121607 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 121608 | /* VFMADDSUB132PHZ256r */ |
| 121609 | VR256X, VR256X, VR256X, VR256X, |
| 121610 | /* VFMADDSUB132PHZ256rk */ |
| 121611 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 121612 | /* VFMADDSUB132PHZ256rkz */ |
| 121613 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 121614 | /* VFMADDSUB132PHZm */ |
| 121615 | VR512, VR512, VR512, f512mem, |
| 121616 | /* VFMADDSUB132PHZmb */ |
| 121617 | VR512, VR512, VR512, f16mem, |
| 121618 | /* VFMADDSUB132PHZmbk */ |
| 121619 | VR512, VR512, VK32WM, VR512, f16mem, |
| 121620 | /* VFMADDSUB132PHZmbkz */ |
| 121621 | VR512, VR512, VK32WM, VR512, f16mem, |
| 121622 | /* VFMADDSUB132PHZmk */ |
| 121623 | VR512, VR512, VK32WM, VR512, f512mem, |
| 121624 | /* VFMADDSUB132PHZmkz */ |
| 121625 | VR512, VR512, VK32WM, VR512, f512mem, |
| 121626 | /* VFMADDSUB132PHZr */ |
| 121627 | VR512, VR512, VR512, VR512, |
| 121628 | /* VFMADDSUB132PHZrb */ |
| 121629 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121630 | /* VFMADDSUB132PHZrbk */ |
| 121631 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 121632 | /* VFMADDSUB132PHZrbkz */ |
| 121633 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 121634 | /* VFMADDSUB132PHZrk */ |
| 121635 | VR512, VR512, VK32WM, VR512, VR512, |
| 121636 | /* VFMADDSUB132PHZrkz */ |
| 121637 | VR512, VR512, VK32WM, VR512, VR512, |
| 121638 | /* VFMADDSUB132PSYm */ |
| 121639 | VR256, VR256, VR256, f256mem, |
| 121640 | /* VFMADDSUB132PSYr */ |
| 121641 | VR256, VR256, VR256, VR256, |
| 121642 | /* VFMADDSUB132PSZ128m */ |
| 121643 | VR128X, VR128X, VR128X, f128mem, |
| 121644 | /* VFMADDSUB132PSZ128mb */ |
| 121645 | VR128X, VR128X, VR128X, f32mem, |
| 121646 | /* VFMADDSUB132PSZ128mbk */ |
| 121647 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 121648 | /* VFMADDSUB132PSZ128mbkz */ |
| 121649 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 121650 | /* VFMADDSUB132PSZ128mk */ |
| 121651 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 121652 | /* VFMADDSUB132PSZ128mkz */ |
| 121653 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 121654 | /* VFMADDSUB132PSZ128r */ |
| 121655 | VR128X, VR128X, VR128X, VR128X, |
| 121656 | /* VFMADDSUB132PSZ128rk */ |
| 121657 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121658 | /* VFMADDSUB132PSZ128rkz */ |
| 121659 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121660 | /* VFMADDSUB132PSZ256m */ |
| 121661 | VR256X, VR256X, VR256X, f256mem, |
| 121662 | /* VFMADDSUB132PSZ256mb */ |
| 121663 | VR256X, VR256X, VR256X, f32mem, |
| 121664 | /* VFMADDSUB132PSZ256mbk */ |
| 121665 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 121666 | /* VFMADDSUB132PSZ256mbkz */ |
| 121667 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 121668 | /* VFMADDSUB132PSZ256mk */ |
| 121669 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 121670 | /* VFMADDSUB132PSZ256mkz */ |
| 121671 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 121672 | /* VFMADDSUB132PSZ256r */ |
| 121673 | VR256X, VR256X, VR256X, VR256X, |
| 121674 | /* VFMADDSUB132PSZ256rk */ |
| 121675 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 121676 | /* VFMADDSUB132PSZ256rkz */ |
| 121677 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 121678 | /* VFMADDSUB132PSZm */ |
| 121679 | VR512, VR512, VR512, f512mem, |
| 121680 | /* VFMADDSUB132PSZmb */ |
| 121681 | VR512, VR512, VR512, f32mem, |
| 121682 | /* VFMADDSUB132PSZmbk */ |
| 121683 | VR512, VR512, VK16WM, VR512, f32mem, |
| 121684 | /* VFMADDSUB132PSZmbkz */ |
| 121685 | VR512, VR512, VK16WM, VR512, f32mem, |
| 121686 | /* VFMADDSUB132PSZmk */ |
| 121687 | VR512, VR512, VK16WM, VR512, f512mem, |
| 121688 | /* VFMADDSUB132PSZmkz */ |
| 121689 | VR512, VR512, VK16WM, VR512, f512mem, |
| 121690 | /* VFMADDSUB132PSZr */ |
| 121691 | VR512, VR512, VR512, VR512, |
| 121692 | /* VFMADDSUB132PSZrb */ |
| 121693 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121694 | /* VFMADDSUB132PSZrbk */ |
| 121695 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 121696 | /* VFMADDSUB132PSZrbkz */ |
| 121697 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 121698 | /* VFMADDSUB132PSZrk */ |
| 121699 | VR512, VR512, VK16WM, VR512, VR512, |
| 121700 | /* VFMADDSUB132PSZrkz */ |
| 121701 | VR512, VR512, VK16WM, VR512, VR512, |
| 121702 | /* VFMADDSUB132PSm */ |
| 121703 | VR128, VR128, VR128, f128mem, |
| 121704 | /* VFMADDSUB132PSr */ |
| 121705 | VR128, VR128, VR128, VR128, |
| 121706 | /* VFMADDSUB213PDYm */ |
| 121707 | VR256, VR256, VR256, f256mem, |
| 121708 | /* VFMADDSUB213PDYr */ |
| 121709 | VR256, VR256, VR256, VR256, |
| 121710 | /* VFMADDSUB213PDZ128m */ |
| 121711 | VR128X, VR128X, VR128X, f128mem, |
| 121712 | /* VFMADDSUB213PDZ128mb */ |
| 121713 | VR128X, VR128X, VR128X, f64mem, |
| 121714 | /* VFMADDSUB213PDZ128mbk */ |
| 121715 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 121716 | /* VFMADDSUB213PDZ128mbkz */ |
| 121717 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 121718 | /* VFMADDSUB213PDZ128mk */ |
| 121719 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 121720 | /* VFMADDSUB213PDZ128mkz */ |
| 121721 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 121722 | /* VFMADDSUB213PDZ128r */ |
| 121723 | VR128X, VR128X, VR128X, VR128X, |
| 121724 | /* VFMADDSUB213PDZ128rk */ |
| 121725 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 121726 | /* VFMADDSUB213PDZ128rkz */ |
| 121727 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 121728 | /* VFMADDSUB213PDZ256m */ |
| 121729 | VR256X, VR256X, VR256X, f256mem, |
| 121730 | /* VFMADDSUB213PDZ256mb */ |
| 121731 | VR256X, VR256X, VR256X, f64mem, |
| 121732 | /* VFMADDSUB213PDZ256mbk */ |
| 121733 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 121734 | /* VFMADDSUB213PDZ256mbkz */ |
| 121735 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 121736 | /* VFMADDSUB213PDZ256mk */ |
| 121737 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 121738 | /* VFMADDSUB213PDZ256mkz */ |
| 121739 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 121740 | /* VFMADDSUB213PDZ256r */ |
| 121741 | VR256X, VR256X, VR256X, VR256X, |
| 121742 | /* VFMADDSUB213PDZ256rk */ |
| 121743 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 121744 | /* VFMADDSUB213PDZ256rkz */ |
| 121745 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 121746 | /* VFMADDSUB213PDZm */ |
| 121747 | VR512, VR512, VR512, f512mem, |
| 121748 | /* VFMADDSUB213PDZmb */ |
| 121749 | VR512, VR512, VR512, f64mem, |
| 121750 | /* VFMADDSUB213PDZmbk */ |
| 121751 | VR512, VR512, VK8WM, VR512, f64mem, |
| 121752 | /* VFMADDSUB213PDZmbkz */ |
| 121753 | VR512, VR512, VK8WM, VR512, f64mem, |
| 121754 | /* VFMADDSUB213PDZmk */ |
| 121755 | VR512, VR512, VK8WM, VR512, f512mem, |
| 121756 | /* VFMADDSUB213PDZmkz */ |
| 121757 | VR512, VR512, VK8WM, VR512, f512mem, |
| 121758 | /* VFMADDSUB213PDZr */ |
| 121759 | VR512, VR512, VR512, VR512, |
| 121760 | /* VFMADDSUB213PDZrb */ |
| 121761 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121762 | /* VFMADDSUB213PDZrbk */ |
| 121763 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 121764 | /* VFMADDSUB213PDZrbkz */ |
| 121765 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 121766 | /* VFMADDSUB213PDZrk */ |
| 121767 | VR512, VR512, VK8WM, VR512, VR512, |
| 121768 | /* VFMADDSUB213PDZrkz */ |
| 121769 | VR512, VR512, VK8WM, VR512, VR512, |
| 121770 | /* VFMADDSUB213PDm */ |
| 121771 | VR128, VR128, VR128, f128mem, |
| 121772 | /* VFMADDSUB213PDr */ |
| 121773 | VR128, VR128, VR128, VR128, |
| 121774 | /* VFMADDSUB213PHZ128m */ |
| 121775 | VR128X, VR128X, VR128X, f128mem, |
| 121776 | /* VFMADDSUB213PHZ128mb */ |
| 121777 | VR128X, VR128X, VR128X, f16mem, |
| 121778 | /* VFMADDSUB213PHZ128mbk */ |
| 121779 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121780 | /* VFMADDSUB213PHZ128mbkz */ |
| 121781 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121782 | /* VFMADDSUB213PHZ128mk */ |
| 121783 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121784 | /* VFMADDSUB213PHZ128mkz */ |
| 121785 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121786 | /* VFMADDSUB213PHZ128r */ |
| 121787 | VR128X, VR128X, VR128X, VR128X, |
| 121788 | /* VFMADDSUB213PHZ128rk */ |
| 121789 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121790 | /* VFMADDSUB213PHZ128rkz */ |
| 121791 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121792 | /* VFMADDSUB213PHZ256m */ |
| 121793 | VR256X, VR256X, VR256X, f256mem, |
| 121794 | /* VFMADDSUB213PHZ256mb */ |
| 121795 | VR256X, VR256X, VR256X, f16mem, |
| 121796 | /* VFMADDSUB213PHZ256mbk */ |
| 121797 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121798 | /* VFMADDSUB213PHZ256mbkz */ |
| 121799 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121800 | /* VFMADDSUB213PHZ256mk */ |
| 121801 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 121802 | /* VFMADDSUB213PHZ256mkz */ |
| 121803 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 121804 | /* VFMADDSUB213PHZ256r */ |
| 121805 | VR256X, VR256X, VR256X, VR256X, |
| 121806 | /* VFMADDSUB213PHZ256rk */ |
| 121807 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 121808 | /* VFMADDSUB213PHZ256rkz */ |
| 121809 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 121810 | /* VFMADDSUB213PHZm */ |
| 121811 | VR512, VR512, VR512, f512mem, |
| 121812 | /* VFMADDSUB213PHZmb */ |
| 121813 | VR512, VR512, VR512, f16mem, |
| 121814 | /* VFMADDSUB213PHZmbk */ |
| 121815 | VR512, VR512, VK32WM, VR512, f16mem, |
| 121816 | /* VFMADDSUB213PHZmbkz */ |
| 121817 | VR512, VR512, VK32WM, VR512, f16mem, |
| 121818 | /* VFMADDSUB213PHZmk */ |
| 121819 | VR512, VR512, VK32WM, VR512, f512mem, |
| 121820 | /* VFMADDSUB213PHZmkz */ |
| 121821 | VR512, VR512, VK32WM, VR512, f512mem, |
| 121822 | /* VFMADDSUB213PHZr */ |
| 121823 | VR512, VR512, VR512, VR512, |
| 121824 | /* VFMADDSUB213PHZrb */ |
| 121825 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121826 | /* VFMADDSUB213PHZrbk */ |
| 121827 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 121828 | /* VFMADDSUB213PHZrbkz */ |
| 121829 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 121830 | /* VFMADDSUB213PHZrk */ |
| 121831 | VR512, VR512, VK32WM, VR512, VR512, |
| 121832 | /* VFMADDSUB213PHZrkz */ |
| 121833 | VR512, VR512, VK32WM, VR512, VR512, |
| 121834 | /* VFMADDSUB213PSYm */ |
| 121835 | VR256, VR256, VR256, f256mem, |
| 121836 | /* VFMADDSUB213PSYr */ |
| 121837 | VR256, VR256, VR256, VR256, |
| 121838 | /* VFMADDSUB213PSZ128m */ |
| 121839 | VR128X, VR128X, VR128X, f128mem, |
| 121840 | /* VFMADDSUB213PSZ128mb */ |
| 121841 | VR128X, VR128X, VR128X, f32mem, |
| 121842 | /* VFMADDSUB213PSZ128mbk */ |
| 121843 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 121844 | /* VFMADDSUB213PSZ128mbkz */ |
| 121845 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 121846 | /* VFMADDSUB213PSZ128mk */ |
| 121847 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 121848 | /* VFMADDSUB213PSZ128mkz */ |
| 121849 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 121850 | /* VFMADDSUB213PSZ128r */ |
| 121851 | VR128X, VR128X, VR128X, VR128X, |
| 121852 | /* VFMADDSUB213PSZ128rk */ |
| 121853 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121854 | /* VFMADDSUB213PSZ128rkz */ |
| 121855 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 121856 | /* VFMADDSUB213PSZ256m */ |
| 121857 | VR256X, VR256X, VR256X, f256mem, |
| 121858 | /* VFMADDSUB213PSZ256mb */ |
| 121859 | VR256X, VR256X, VR256X, f32mem, |
| 121860 | /* VFMADDSUB213PSZ256mbk */ |
| 121861 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 121862 | /* VFMADDSUB213PSZ256mbkz */ |
| 121863 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 121864 | /* VFMADDSUB213PSZ256mk */ |
| 121865 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 121866 | /* VFMADDSUB213PSZ256mkz */ |
| 121867 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 121868 | /* VFMADDSUB213PSZ256r */ |
| 121869 | VR256X, VR256X, VR256X, VR256X, |
| 121870 | /* VFMADDSUB213PSZ256rk */ |
| 121871 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 121872 | /* VFMADDSUB213PSZ256rkz */ |
| 121873 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 121874 | /* VFMADDSUB213PSZm */ |
| 121875 | VR512, VR512, VR512, f512mem, |
| 121876 | /* VFMADDSUB213PSZmb */ |
| 121877 | VR512, VR512, VR512, f32mem, |
| 121878 | /* VFMADDSUB213PSZmbk */ |
| 121879 | VR512, VR512, VK16WM, VR512, f32mem, |
| 121880 | /* VFMADDSUB213PSZmbkz */ |
| 121881 | VR512, VR512, VK16WM, VR512, f32mem, |
| 121882 | /* VFMADDSUB213PSZmk */ |
| 121883 | VR512, VR512, VK16WM, VR512, f512mem, |
| 121884 | /* VFMADDSUB213PSZmkz */ |
| 121885 | VR512, VR512, VK16WM, VR512, f512mem, |
| 121886 | /* VFMADDSUB213PSZr */ |
| 121887 | VR512, VR512, VR512, VR512, |
| 121888 | /* VFMADDSUB213PSZrb */ |
| 121889 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121890 | /* VFMADDSUB213PSZrbk */ |
| 121891 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 121892 | /* VFMADDSUB213PSZrbkz */ |
| 121893 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 121894 | /* VFMADDSUB213PSZrk */ |
| 121895 | VR512, VR512, VK16WM, VR512, VR512, |
| 121896 | /* VFMADDSUB213PSZrkz */ |
| 121897 | VR512, VR512, VK16WM, VR512, VR512, |
| 121898 | /* VFMADDSUB213PSm */ |
| 121899 | VR128, VR128, VR128, f128mem, |
| 121900 | /* VFMADDSUB213PSr */ |
| 121901 | VR128, VR128, VR128, VR128, |
| 121902 | /* VFMADDSUB231PDYm */ |
| 121903 | VR256, VR256, VR256, f256mem, |
| 121904 | /* VFMADDSUB231PDYr */ |
| 121905 | VR256, VR256, VR256, VR256, |
| 121906 | /* VFMADDSUB231PDZ128m */ |
| 121907 | VR128X, VR128X, VR128X, f128mem, |
| 121908 | /* VFMADDSUB231PDZ128mb */ |
| 121909 | VR128X, VR128X, VR128X, f64mem, |
| 121910 | /* VFMADDSUB231PDZ128mbk */ |
| 121911 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 121912 | /* VFMADDSUB231PDZ128mbkz */ |
| 121913 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 121914 | /* VFMADDSUB231PDZ128mk */ |
| 121915 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 121916 | /* VFMADDSUB231PDZ128mkz */ |
| 121917 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 121918 | /* VFMADDSUB231PDZ128r */ |
| 121919 | VR128X, VR128X, VR128X, VR128X, |
| 121920 | /* VFMADDSUB231PDZ128rk */ |
| 121921 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 121922 | /* VFMADDSUB231PDZ128rkz */ |
| 121923 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 121924 | /* VFMADDSUB231PDZ256m */ |
| 121925 | VR256X, VR256X, VR256X, f256mem, |
| 121926 | /* VFMADDSUB231PDZ256mb */ |
| 121927 | VR256X, VR256X, VR256X, f64mem, |
| 121928 | /* VFMADDSUB231PDZ256mbk */ |
| 121929 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 121930 | /* VFMADDSUB231PDZ256mbkz */ |
| 121931 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 121932 | /* VFMADDSUB231PDZ256mk */ |
| 121933 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 121934 | /* VFMADDSUB231PDZ256mkz */ |
| 121935 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 121936 | /* VFMADDSUB231PDZ256r */ |
| 121937 | VR256X, VR256X, VR256X, VR256X, |
| 121938 | /* VFMADDSUB231PDZ256rk */ |
| 121939 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 121940 | /* VFMADDSUB231PDZ256rkz */ |
| 121941 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 121942 | /* VFMADDSUB231PDZm */ |
| 121943 | VR512, VR512, VR512, f512mem, |
| 121944 | /* VFMADDSUB231PDZmb */ |
| 121945 | VR512, VR512, VR512, f64mem, |
| 121946 | /* VFMADDSUB231PDZmbk */ |
| 121947 | VR512, VR512, VK8WM, VR512, f64mem, |
| 121948 | /* VFMADDSUB231PDZmbkz */ |
| 121949 | VR512, VR512, VK8WM, VR512, f64mem, |
| 121950 | /* VFMADDSUB231PDZmk */ |
| 121951 | VR512, VR512, VK8WM, VR512, f512mem, |
| 121952 | /* VFMADDSUB231PDZmkz */ |
| 121953 | VR512, VR512, VK8WM, VR512, f512mem, |
| 121954 | /* VFMADDSUB231PDZr */ |
| 121955 | VR512, VR512, VR512, VR512, |
| 121956 | /* VFMADDSUB231PDZrb */ |
| 121957 | VR512, VR512, VR512, VR512, AVX512RC, |
| 121958 | /* VFMADDSUB231PDZrbk */ |
| 121959 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 121960 | /* VFMADDSUB231PDZrbkz */ |
| 121961 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 121962 | /* VFMADDSUB231PDZrk */ |
| 121963 | VR512, VR512, VK8WM, VR512, VR512, |
| 121964 | /* VFMADDSUB231PDZrkz */ |
| 121965 | VR512, VR512, VK8WM, VR512, VR512, |
| 121966 | /* VFMADDSUB231PDm */ |
| 121967 | VR128, VR128, VR128, f128mem, |
| 121968 | /* VFMADDSUB231PDr */ |
| 121969 | VR128, VR128, VR128, VR128, |
| 121970 | /* VFMADDSUB231PHZ128m */ |
| 121971 | VR128X, VR128X, VR128X, f128mem, |
| 121972 | /* VFMADDSUB231PHZ128mb */ |
| 121973 | VR128X, VR128X, VR128X, f16mem, |
| 121974 | /* VFMADDSUB231PHZ128mbk */ |
| 121975 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121976 | /* VFMADDSUB231PHZ128mbkz */ |
| 121977 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 121978 | /* VFMADDSUB231PHZ128mk */ |
| 121979 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121980 | /* VFMADDSUB231PHZ128mkz */ |
| 121981 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 121982 | /* VFMADDSUB231PHZ128r */ |
| 121983 | VR128X, VR128X, VR128X, VR128X, |
| 121984 | /* VFMADDSUB231PHZ128rk */ |
| 121985 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121986 | /* VFMADDSUB231PHZ128rkz */ |
| 121987 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 121988 | /* VFMADDSUB231PHZ256m */ |
| 121989 | VR256X, VR256X, VR256X, f256mem, |
| 121990 | /* VFMADDSUB231PHZ256mb */ |
| 121991 | VR256X, VR256X, VR256X, f16mem, |
| 121992 | /* VFMADDSUB231PHZ256mbk */ |
| 121993 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121994 | /* VFMADDSUB231PHZ256mbkz */ |
| 121995 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 121996 | /* VFMADDSUB231PHZ256mk */ |
| 121997 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 121998 | /* VFMADDSUB231PHZ256mkz */ |
| 121999 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 122000 | /* VFMADDSUB231PHZ256r */ |
| 122001 | VR256X, VR256X, VR256X, VR256X, |
| 122002 | /* VFMADDSUB231PHZ256rk */ |
| 122003 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 122004 | /* VFMADDSUB231PHZ256rkz */ |
| 122005 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 122006 | /* VFMADDSUB231PHZm */ |
| 122007 | VR512, VR512, VR512, f512mem, |
| 122008 | /* VFMADDSUB231PHZmb */ |
| 122009 | VR512, VR512, VR512, f16mem, |
| 122010 | /* VFMADDSUB231PHZmbk */ |
| 122011 | VR512, VR512, VK32WM, VR512, f16mem, |
| 122012 | /* VFMADDSUB231PHZmbkz */ |
| 122013 | VR512, VR512, VK32WM, VR512, f16mem, |
| 122014 | /* VFMADDSUB231PHZmk */ |
| 122015 | VR512, VR512, VK32WM, VR512, f512mem, |
| 122016 | /* VFMADDSUB231PHZmkz */ |
| 122017 | VR512, VR512, VK32WM, VR512, f512mem, |
| 122018 | /* VFMADDSUB231PHZr */ |
| 122019 | VR512, VR512, VR512, VR512, |
| 122020 | /* VFMADDSUB231PHZrb */ |
| 122021 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122022 | /* VFMADDSUB231PHZrbk */ |
| 122023 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 122024 | /* VFMADDSUB231PHZrbkz */ |
| 122025 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 122026 | /* VFMADDSUB231PHZrk */ |
| 122027 | VR512, VR512, VK32WM, VR512, VR512, |
| 122028 | /* VFMADDSUB231PHZrkz */ |
| 122029 | VR512, VR512, VK32WM, VR512, VR512, |
| 122030 | /* VFMADDSUB231PSYm */ |
| 122031 | VR256, VR256, VR256, f256mem, |
| 122032 | /* VFMADDSUB231PSYr */ |
| 122033 | VR256, VR256, VR256, VR256, |
| 122034 | /* VFMADDSUB231PSZ128m */ |
| 122035 | VR128X, VR128X, VR128X, f128mem, |
| 122036 | /* VFMADDSUB231PSZ128mb */ |
| 122037 | VR128X, VR128X, VR128X, f32mem, |
| 122038 | /* VFMADDSUB231PSZ128mbk */ |
| 122039 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 122040 | /* VFMADDSUB231PSZ128mbkz */ |
| 122041 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 122042 | /* VFMADDSUB231PSZ128mk */ |
| 122043 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 122044 | /* VFMADDSUB231PSZ128mkz */ |
| 122045 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 122046 | /* VFMADDSUB231PSZ128r */ |
| 122047 | VR128X, VR128X, VR128X, VR128X, |
| 122048 | /* VFMADDSUB231PSZ128rk */ |
| 122049 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 122050 | /* VFMADDSUB231PSZ128rkz */ |
| 122051 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 122052 | /* VFMADDSUB231PSZ256m */ |
| 122053 | VR256X, VR256X, VR256X, f256mem, |
| 122054 | /* VFMADDSUB231PSZ256mb */ |
| 122055 | VR256X, VR256X, VR256X, f32mem, |
| 122056 | /* VFMADDSUB231PSZ256mbk */ |
| 122057 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 122058 | /* VFMADDSUB231PSZ256mbkz */ |
| 122059 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 122060 | /* VFMADDSUB231PSZ256mk */ |
| 122061 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 122062 | /* VFMADDSUB231PSZ256mkz */ |
| 122063 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 122064 | /* VFMADDSUB231PSZ256r */ |
| 122065 | VR256X, VR256X, VR256X, VR256X, |
| 122066 | /* VFMADDSUB231PSZ256rk */ |
| 122067 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 122068 | /* VFMADDSUB231PSZ256rkz */ |
| 122069 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 122070 | /* VFMADDSUB231PSZm */ |
| 122071 | VR512, VR512, VR512, f512mem, |
| 122072 | /* VFMADDSUB231PSZmb */ |
| 122073 | VR512, VR512, VR512, f32mem, |
| 122074 | /* VFMADDSUB231PSZmbk */ |
| 122075 | VR512, VR512, VK16WM, VR512, f32mem, |
| 122076 | /* VFMADDSUB231PSZmbkz */ |
| 122077 | VR512, VR512, VK16WM, VR512, f32mem, |
| 122078 | /* VFMADDSUB231PSZmk */ |
| 122079 | VR512, VR512, VK16WM, VR512, f512mem, |
| 122080 | /* VFMADDSUB231PSZmkz */ |
| 122081 | VR512, VR512, VK16WM, VR512, f512mem, |
| 122082 | /* VFMADDSUB231PSZr */ |
| 122083 | VR512, VR512, VR512, VR512, |
| 122084 | /* VFMADDSUB231PSZrb */ |
| 122085 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122086 | /* VFMADDSUB231PSZrbk */ |
| 122087 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 122088 | /* VFMADDSUB231PSZrbkz */ |
| 122089 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 122090 | /* VFMADDSUB231PSZrk */ |
| 122091 | VR512, VR512, VK16WM, VR512, VR512, |
| 122092 | /* VFMADDSUB231PSZrkz */ |
| 122093 | VR512, VR512, VK16WM, VR512, VR512, |
| 122094 | /* VFMADDSUB231PSm */ |
| 122095 | VR128, VR128, VR128, f128mem, |
| 122096 | /* VFMADDSUB231PSr */ |
| 122097 | VR128, VR128, VR128, VR128, |
| 122098 | /* VFMADDSUBPD4Ymr */ |
| 122099 | VR256, VR256, f256mem, VR256, |
| 122100 | /* VFMADDSUBPD4Yrm */ |
| 122101 | VR256, VR256, VR256, f256mem, |
| 122102 | /* VFMADDSUBPD4Yrr */ |
| 122103 | VR256, VR256, VR256, VR256, |
| 122104 | /* VFMADDSUBPD4Yrr_REV */ |
| 122105 | VR256, VR256, VR256, VR256, |
| 122106 | /* VFMADDSUBPD4mr */ |
| 122107 | VR128, VR128, f128mem, VR128, |
| 122108 | /* VFMADDSUBPD4rm */ |
| 122109 | VR128, VR128, VR128, f128mem, |
| 122110 | /* VFMADDSUBPD4rr */ |
| 122111 | VR128, VR128, VR128, VR128, |
| 122112 | /* VFMADDSUBPD4rr_REV */ |
| 122113 | VR128, VR128, VR128, VR128, |
| 122114 | /* VFMADDSUBPS4Ymr */ |
| 122115 | VR256, VR256, f256mem, VR256, |
| 122116 | /* VFMADDSUBPS4Yrm */ |
| 122117 | VR256, VR256, VR256, f256mem, |
| 122118 | /* VFMADDSUBPS4Yrr */ |
| 122119 | VR256, VR256, VR256, VR256, |
| 122120 | /* VFMADDSUBPS4Yrr_REV */ |
| 122121 | VR256, VR256, VR256, VR256, |
| 122122 | /* VFMADDSUBPS4mr */ |
| 122123 | VR128, VR128, f128mem, VR128, |
| 122124 | /* VFMADDSUBPS4rm */ |
| 122125 | VR128, VR128, VR128, f128mem, |
| 122126 | /* VFMADDSUBPS4rr */ |
| 122127 | VR128, VR128, VR128, VR128, |
| 122128 | /* VFMADDSUBPS4rr_REV */ |
| 122129 | VR128, VR128, VR128, VR128, |
| 122130 | /* VFMSUB132PDYm */ |
| 122131 | VR256, VR256, VR256, f256mem, |
| 122132 | /* VFMSUB132PDYr */ |
| 122133 | VR256, VR256, VR256, VR256, |
| 122134 | /* VFMSUB132PDZ128m */ |
| 122135 | VR128X, VR128X, VR128X, f128mem, |
| 122136 | /* VFMSUB132PDZ128mb */ |
| 122137 | VR128X, VR128X, VR128X, f64mem, |
| 122138 | /* VFMSUB132PDZ128mbk */ |
| 122139 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 122140 | /* VFMSUB132PDZ128mbkz */ |
| 122141 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 122142 | /* VFMSUB132PDZ128mk */ |
| 122143 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 122144 | /* VFMSUB132PDZ128mkz */ |
| 122145 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 122146 | /* VFMSUB132PDZ128r */ |
| 122147 | VR128X, VR128X, VR128X, VR128X, |
| 122148 | /* VFMSUB132PDZ128rk */ |
| 122149 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 122150 | /* VFMSUB132PDZ128rkz */ |
| 122151 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 122152 | /* VFMSUB132PDZ256m */ |
| 122153 | VR256X, VR256X, VR256X, f256mem, |
| 122154 | /* VFMSUB132PDZ256mb */ |
| 122155 | VR256X, VR256X, VR256X, f64mem, |
| 122156 | /* VFMSUB132PDZ256mbk */ |
| 122157 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 122158 | /* VFMSUB132PDZ256mbkz */ |
| 122159 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 122160 | /* VFMSUB132PDZ256mk */ |
| 122161 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 122162 | /* VFMSUB132PDZ256mkz */ |
| 122163 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 122164 | /* VFMSUB132PDZ256r */ |
| 122165 | VR256X, VR256X, VR256X, VR256X, |
| 122166 | /* VFMSUB132PDZ256rk */ |
| 122167 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 122168 | /* VFMSUB132PDZ256rkz */ |
| 122169 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 122170 | /* VFMSUB132PDZm */ |
| 122171 | VR512, VR512, VR512, f512mem, |
| 122172 | /* VFMSUB132PDZmb */ |
| 122173 | VR512, VR512, VR512, f64mem, |
| 122174 | /* VFMSUB132PDZmbk */ |
| 122175 | VR512, VR512, VK8WM, VR512, f64mem, |
| 122176 | /* VFMSUB132PDZmbkz */ |
| 122177 | VR512, VR512, VK8WM, VR512, f64mem, |
| 122178 | /* VFMSUB132PDZmk */ |
| 122179 | VR512, VR512, VK8WM, VR512, f512mem, |
| 122180 | /* VFMSUB132PDZmkz */ |
| 122181 | VR512, VR512, VK8WM, VR512, f512mem, |
| 122182 | /* VFMSUB132PDZr */ |
| 122183 | VR512, VR512, VR512, VR512, |
| 122184 | /* VFMSUB132PDZrb */ |
| 122185 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122186 | /* VFMSUB132PDZrbk */ |
| 122187 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 122188 | /* VFMSUB132PDZrbkz */ |
| 122189 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 122190 | /* VFMSUB132PDZrk */ |
| 122191 | VR512, VR512, VK8WM, VR512, VR512, |
| 122192 | /* VFMSUB132PDZrkz */ |
| 122193 | VR512, VR512, VK8WM, VR512, VR512, |
| 122194 | /* VFMSUB132PDm */ |
| 122195 | VR128, VR128, VR128, f128mem, |
| 122196 | /* VFMSUB132PDr */ |
| 122197 | VR128, VR128, VR128, VR128, |
| 122198 | /* VFMSUB132PHZ128m */ |
| 122199 | VR128X, VR128X, VR128X, f128mem, |
| 122200 | /* VFMSUB132PHZ128mb */ |
| 122201 | VR128X, VR128X, VR128X, f16mem, |
| 122202 | /* VFMSUB132PHZ128mbk */ |
| 122203 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 122204 | /* VFMSUB132PHZ128mbkz */ |
| 122205 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 122206 | /* VFMSUB132PHZ128mk */ |
| 122207 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 122208 | /* VFMSUB132PHZ128mkz */ |
| 122209 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 122210 | /* VFMSUB132PHZ128r */ |
| 122211 | VR128X, VR128X, VR128X, VR128X, |
| 122212 | /* VFMSUB132PHZ128rk */ |
| 122213 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 122214 | /* VFMSUB132PHZ128rkz */ |
| 122215 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 122216 | /* VFMSUB132PHZ256m */ |
| 122217 | VR256X, VR256X, VR256X, f256mem, |
| 122218 | /* VFMSUB132PHZ256mb */ |
| 122219 | VR256X, VR256X, VR256X, f16mem, |
| 122220 | /* VFMSUB132PHZ256mbk */ |
| 122221 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 122222 | /* VFMSUB132PHZ256mbkz */ |
| 122223 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 122224 | /* VFMSUB132PHZ256mk */ |
| 122225 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 122226 | /* VFMSUB132PHZ256mkz */ |
| 122227 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 122228 | /* VFMSUB132PHZ256r */ |
| 122229 | VR256X, VR256X, VR256X, VR256X, |
| 122230 | /* VFMSUB132PHZ256rk */ |
| 122231 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 122232 | /* VFMSUB132PHZ256rkz */ |
| 122233 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 122234 | /* VFMSUB132PHZm */ |
| 122235 | VR512, VR512, VR512, f512mem, |
| 122236 | /* VFMSUB132PHZmb */ |
| 122237 | VR512, VR512, VR512, f16mem, |
| 122238 | /* VFMSUB132PHZmbk */ |
| 122239 | VR512, VR512, VK32WM, VR512, f16mem, |
| 122240 | /* VFMSUB132PHZmbkz */ |
| 122241 | VR512, VR512, VK32WM, VR512, f16mem, |
| 122242 | /* VFMSUB132PHZmk */ |
| 122243 | VR512, VR512, VK32WM, VR512, f512mem, |
| 122244 | /* VFMSUB132PHZmkz */ |
| 122245 | VR512, VR512, VK32WM, VR512, f512mem, |
| 122246 | /* VFMSUB132PHZr */ |
| 122247 | VR512, VR512, VR512, VR512, |
| 122248 | /* VFMSUB132PHZrb */ |
| 122249 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122250 | /* VFMSUB132PHZrbk */ |
| 122251 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 122252 | /* VFMSUB132PHZrbkz */ |
| 122253 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 122254 | /* VFMSUB132PHZrk */ |
| 122255 | VR512, VR512, VK32WM, VR512, VR512, |
| 122256 | /* VFMSUB132PHZrkz */ |
| 122257 | VR512, VR512, VK32WM, VR512, VR512, |
| 122258 | /* VFMSUB132PSYm */ |
| 122259 | VR256, VR256, VR256, f256mem, |
| 122260 | /* VFMSUB132PSYr */ |
| 122261 | VR256, VR256, VR256, VR256, |
| 122262 | /* VFMSUB132PSZ128m */ |
| 122263 | VR128X, VR128X, VR128X, f128mem, |
| 122264 | /* VFMSUB132PSZ128mb */ |
| 122265 | VR128X, VR128X, VR128X, f32mem, |
| 122266 | /* VFMSUB132PSZ128mbk */ |
| 122267 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 122268 | /* VFMSUB132PSZ128mbkz */ |
| 122269 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 122270 | /* VFMSUB132PSZ128mk */ |
| 122271 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 122272 | /* VFMSUB132PSZ128mkz */ |
| 122273 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 122274 | /* VFMSUB132PSZ128r */ |
| 122275 | VR128X, VR128X, VR128X, VR128X, |
| 122276 | /* VFMSUB132PSZ128rk */ |
| 122277 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 122278 | /* VFMSUB132PSZ128rkz */ |
| 122279 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 122280 | /* VFMSUB132PSZ256m */ |
| 122281 | VR256X, VR256X, VR256X, f256mem, |
| 122282 | /* VFMSUB132PSZ256mb */ |
| 122283 | VR256X, VR256X, VR256X, f32mem, |
| 122284 | /* VFMSUB132PSZ256mbk */ |
| 122285 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 122286 | /* VFMSUB132PSZ256mbkz */ |
| 122287 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 122288 | /* VFMSUB132PSZ256mk */ |
| 122289 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 122290 | /* VFMSUB132PSZ256mkz */ |
| 122291 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 122292 | /* VFMSUB132PSZ256r */ |
| 122293 | VR256X, VR256X, VR256X, VR256X, |
| 122294 | /* VFMSUB132PSZ256rk */ |
| 122295 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 122296 | /* VFMSUB132PSZ256rkz */ |
| 122297 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 122298 | /* VFMSUB132PSZm */ |
| 122299 | VR512, VR512, VR512, f512mem, |
| 122300 | /* VFMSUB132PSZmb */ |
| 122301 | VR512, VR512, VR512, f32mem, |
| 122302 | /* VFMSUB132PSZmbk */ |
| 122303 | VR512, VR512, VK16WM, VR512, f32mem, |
| 122304 | /* VFMSUB132PSZmbkz */ |
| 122305 | VR512, VR512, VK16WM, VR512, f32mem, |
| 122306 | /* VFMSUB132PSZmk */ |
| 122307 | VR512, VR512, VK16WM, VR512, f512mem, |
| 122308 | /* VFMSUB132PSZmkz */ |
| 122309 | VR512, VR512, VK16WM, VR512, f512mem, |
| 122310 | /* VFMSUB132PSZr */ |
| 122311 | VR512, VR512, VR512, VR512, |
| 122312 | /* VFMSUB132PSZrb */ |
| 122313 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122314 | /* VFMSUB132PSZrbk */ |
| 122315 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 122316 | /* VFMSUB132PSZrbkz */ |
| 122317 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 122318 | /* VFMSUB132PSZrk */ |
| 122319 | VR512, VR512, VK16WM, VR512, VR512, |
| 122320 | /* VFMSUB132PSZrkz */ |
| 122321 | VR512, VR512, VK16WM, VR512, VR512, |
| 122322 | /* VFMSUB132PSm */ |
| 122323 | VR128, VR128, VR128, f128mem, |
| 122324 | /* VFMSUB132PSr */ |
| 122325 | VR128, VR128, VR128, VR128, |
| 122326 | /* VFMSUB132SDZm */ |
| 122327 | FR64X, FR64X, FR64X, f64mem, |
| 122328 | /* VFMSUB132SDZm_Int */ |
| 122329 | VR128X, VR128X, VR128X, sdmem, |
| 122330 | /* VFMSUB132SDZm_Intk */ |
| 122331 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 122332 | /* VFMSUB132SDZm_Intkz */ |
| 122333 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 122334 | /* VFMSUB132SDZr */ |
| 122335 | FR64X, FR64X, FR64X, FR64X, |
| 122336 | /* VFMSUB132SDZr_Int */ |
| 122337 | VR128X, VR128X, VR128X, VR128X, |
| 122338 | /* VFMSUB132SDZr_Intk */ |
| 122339 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122340 | /* VFMSUB132SDZr_Intkz */ |
| 122341 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122342 | /* VFMSUB132SDZrb */ |
| 122343 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 122344 | /* VFMSUB132SDZrb_Int */ |
| 122345 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 122346 | /* VFMSUB132SDZrb_Intk */ |
| 122347 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122348 | /* VFMSUB132SDZrb_Intkz */ |
| 122349 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122350 | /* VFMSUB132SDm */ |
| 122351 | FR64, FR64, FR64, f64mem, |
| 122352 | /* VFMSUB132SDm_Int */ |
| 122353 | VR128, VR128, VR128, sdmem, |
| 122354 | /* VFMSUB132SDr */ |
| 122355 | FR64, FR64, FR64, FR64, |
| 122356 | /* VFMSUB132SDr_Int */ |
| 122357 | VR128, VR128, VR128, VR128, |
| 122358 | /* VFMSUB132SHZm */ |
| 122359 | FR16X, FR16X, FR16X, f16mem, |
| 122360 | /* VFMSUB132SHZm_Int */ |
| 122361 | VR128X, VR128X, VR128X, shmem, |
| 122362 | /* VFMSUB132SHZm_Intk */ |
| 122363 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 122364 | /* VFMSUB132SHZm_Intkz */ |
| 122365 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 122366 | /* VFMSUB132SHZr */ |
| 122367 | FR16X, FR16X, FR16X, FR16X, |
| 122368 | /* VFMSUB132SHZr_Int */ |
| 122369 | VR128X, VR128X, VR128X, VR128X, |
| 122370 | /* VFMSUB132SHZr_Intk */ |
| 122371 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122372 | /* VFMSUB132SHZr_Intkz */ |
| 122373 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122374 | /* VFMSUB132SHZrb */ |
| 122375 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 122376 | /* VFMSUB132SHZrb_Int */ |
| 122377 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 122378 | /* VFMSUB132SHZrb_Intk */ |
| 122379 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122380 | /* VFMSUB132SHZrb_Intkz */ |
| 122381 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122382 | /* VFMSUB132SSZm */ |
| 122383 | FR32X, FR32X, FR32X, f32mem, |
| 122384 | /* VFMSUB132SSZm_Int */ |
| 122385 | VR128X, VR128X, VR128X, ssmem, |
| 122386 | /* VFMSUB132SSZm_Intk */ |
| 122387 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 122388 | /* VFMSUB132SSZm_Intkz */ |
| 122389 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 122390 | /* VFMSUB132SSZr */ |
| 122391 | FR32X, FR32X, FR32X, FR32X, |
| 122392 | /* VFMSUB132SSZr_Int */ |
| 122393 | VR128X, VR128X, VR128X, VR128X, |
| 122394 | /* VFMSUB132SSZr_Intk */ |
| 122395 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122396 | /* VFMSUB132SSZr_Intkz */ |
| 122397 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122398 | /* VFMSUB132SSZrb */ |
| 122399 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 122400 | /* VFMSUB132SSZrb_Int */ |
| 122401 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 122402 | /* VFMSUB132SSZrb_Intk */ |
| 122403 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122404 | /* VFMSUB132SSZrb_Intkz */ |
| 122405 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122406 | /* VFMSUB132SSm */ |
| 122407 | FR32, FR32, FR32, f32mem, |
| 122408 | /* VFMSUB132SSm_Int */ |
| 122409 | VR128, VR128, VR128, ssmem, |
| 122410 | /* VFMSUB132SSr */ |
| 122411 | FR32, FR32, FR32, FR32, |
| 122412 | /* VFMSUB132SSr_Int */ |
| 122413 | VR128, VR128, VR128, VR128, |
| 122414 | /* VFMSUB213PDYm */ |
| 122415 | VR256, VR256, VR256, f256mem, |
| 122416 | /* VFMSUB213PDYr */ |
| 122417 | VR256, VR256, VR256, VR256, |
| 122418 | /* VFMSUB213PDZ128m */ |
| 122419 | VR128X, VR128X, VR128X, f128mem, |
| 122420 | /* VFMSUB213PDZ128mb */ |
| 122421 | VR128X, VR128X, VR128X, f64mem, |
| 122422 | /* VFMSUB213PDZ128mbk */ |
| 122423 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 122424 | /* VFMSUB213PDZ128mbkz */ |
| 122425 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 122426 | /* VFMSUB213PDZ128mk */ |
| 122427 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 122428 | /* VFMSUB213PDZ128mkz */ |
| 122429 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 122430 | /* VFMSUB213PDZ128r */ |
| 122431 | VR128X, VR128X, VR128X, VR128X, |
| 122432 | /* VFMSUB213PDZ128rk */ |
| 122433 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 122434 | /* VFMSUB213PDZ128rkz */ |
| 122435 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 122436 | /* VFMSUB213PDZ256m */ |
| 122437 | VR256X, VR256X, VR256X, f256mem, |
| 122438 | /* VFMSUB213PDZ256mb */ |
| 122439 | VR256X, VR256X, VR256X, f64mem, |
| 122440 | /* VFMSUB213PDZ256mbk */ |
| 122441 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 122442 | /* VFMSUB213PDZ256mbkz */ |
| 122443 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 122444 | /* VFMSUB213PDZ256mk */ |
| 122445 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 122446 | /* VFMSUB213PDZ256mkz */ |
| 122447 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 122448 | /* VFMSUB213PDZ256r */ |
| 122449 | VR256X, VR256X, VR256X, VR256X, |
| 122450 | /* VFMSUB213PDZ256rk */ |
| 122451 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 122452 | /* VFMSUB213PDZ256rkz */ |
| 122453 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 122454 | /* VFMSUB213PDZm */ |
| 122455 | VR512, VR512, VR512, f512mem, |
| 122456 | /* VFMSUB213PDZmb */ |
| 122457 | VR512, VR512, VR512, f64mem, |
| 122458 | /* VFMSUB213PDZmbk */ |
| 122459 | VR512, VR512, VK8WM, VR512, f64mem, |
| 122460 | /* VFMSUB213PDZmbkz */ |
| 122461 | VR512, VR512, VK8WM, VR512, f64mem, |
| 122462 | /* VFMSUB213PDZmk */ |
| 122463 | VR512, VR512, VK8WM, VR512, f512mem, |
| 122464 | /* VFMSUB213PDZmkz */ |
| 122465 | VR512, VR512, VK8WM, VR512, f512mem, |
| 122466 | /* VFMSUB213PDZr */ |
| 122467 | VR512, VR512, VR512, VR512, |
| 122468 | /* VFMSUB213PDZrb */ |
| 122469 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122470 | /* VFMSUB213PDZrbk */ |
| 122471 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 122472 | /* VFMSUB213PDZrbkz */ |
| 122473 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 122474 | /* VFMSUB213PDZrk */ |
| 122475 | VR512, VR512, VK8WM, VR512, VR512, |
| 122476 | /* VFMSUB213PDZrkz */ |
| 122477 | VR512, VR512, VK8WM, VR512, VR512, |
| 122478 | /* VFMSUB213PDm */ |
| 122479 | VR128, VR128, VR128, f128mem, |
| 122480 | /* VFMSUB213PDr */ |
| 122481 | VR128, VR128, VR128, VR128, |
| 122482 | /* VFMSUB213PHZ128m */ |
| 122483 | VR128X, VR128X, VR128X, f128mem, |
| 122484 | /* VFMSUB213PHZ128mb */ |
| 122485 | VR128X, VR128X, VR128X, f16mem, |
| 122486 | /* VFMSUB213PHZ128mbk */ |
| 122487 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 122488 | /* VFMSUB213PHZ128mbkz */ |
| 122489 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 122490 | /* VFMSUB213PHZ128mk */ |
| 122491 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 122492 | /* VFMSUB213PHZ128mkz */ |
| 122493 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 122494 | /* VFMSUB213PHZ128r */ |
| 122495 | VR128X, VR128X, VR128X, VR128X, |
| 122496 | /* VFMSUB213PHZ128rk */ |
| 122497 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 122498 | /* VFMSUB213PHZ128rkz */ |
| 122499 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 122500 | /* VFMSUB213PHZ256m */ |
| 122501 | VR256X, VR256X, VR256X, f256mem, |
| 122502 | /* VFMSUB213PHZ256mb */ |
| 122503 | VR256X, VR256X, VR256X, f16mem, |
| 122504 | /* VFMSUB213PHZ256mbk */ |
| 122505 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 122506 | /* VFMSUB213PHZ256mbkz */ |
| 122507 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 122508 | /* VFMSUB213PHZ256mk */ |
| 122509 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 122510 | /* VFMSUB213PHZ256mkz */ |
| 122511 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 122512 | /* VFMSUB213PHZ256r */ |
| 122513 | VR256X, VR256X, VR256X, VR256X, |
| 122514 | /* VFMSUB213PHZ256rk */ |
| 122515 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 122516 | /* VFMSUB213PHZ256rkz */ |
| 122517 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 122518 | /* VFMSUB213PHZm */ |
| 122519 | VR512, VR512, VR512, f512mem, |
| 122520 | /* VFMSUB213PHZmb */ |
| 122521 | VR512, VR512, VR512, f16mem, |
| 122522 | /* VFMSUB213PHZmbk */ |
| 122523 | VR512, VR512, VK32WM, VR512, f16mem, |
| 122524 | /* VFMSUB213PHZmbkz */ |
| 122525 | VR512, VR512, VK32WM, VR512, f16mem, |
| 122526 | /* VFMSUB213PHZmk */ |
| 122527 | VR512, VR512, VK32WM, VR512, f512mem, |
| 122528 | /* VFMSUB213PHZmkz */ |
| 122529 | VR512, VR512, VK32WM, VR512, f512mem, |
| 122530 | /* VFMSUB213PHZr */ |
| 122531 | VR512, VR512, VR512, VR512, |
| 122532 | /* VFMSUB213PHZrb */ |
| 122533 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122534 | /* VFMSUB213PHZrbk */ |
| 122535 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 122536 | /* VFMSUB213PHZrbkz */ |
| 122537 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 122538 | /* VFMSUB213PHZrk */ |
| 122539 | VR512, VR512, VK32WM, VR512, VR512, |
| 122540 | /* VFMSUB213PHZrkz */ |
| 122541 | VR512, VR512, VK32WM, VR512, VR512, |
| 122542 | /* VFMSUB213PSYm */ |
| 122543 | VR256, VR256, VR256, f256mem, |
| 122544 | /* VFMSUB213PSYr */ |
| 122545 | VR256, VR256, VR256, VR256, |
| 122546 | /* VFMSUB213PSZ128m */ |
| 122547 | VR128X, VR128X, VR128X, f128mem, |
| 122548 | /* VFMSUB213PSZ128mb */ |
| 122549 | VR128X, VR128X, VR128X, f32mem, |
| 122550 | /* VFMSUB213PSZ128mbk */ |
| 122551 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 122552 | /* VFMSUB213PSZ128mbkz */ |
| 122553 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 122554 | /* VFMSUB213PSZ128mk */ |
| 122555 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 122556 | /* VFMSUB213PSZ128mkz */ |
| 122557 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 122558 | /* VFMSUB213PSZ128r */ |
| 122559 | VR128X, VR128X, VR128X, VR128X, |
| 122560 | /* VFMSUB213PSZ128rk */ |
| 122561 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 122562 | /* VFMSUB213PSZ128rkz */ |
| 122563 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 122564 | /* VFMSUB213PSZ256m */ |
| 122565 | VR256X, VR256X, VR256X, f256mem, |
| 122566 | /* VFMSUB213PSZ256mb */ |
| 122567 | VR256X, VR256X, VR256X, f32mem, |
| 122568 | /* VFMSUB213PSZ256mbk */ |
| 122569 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 122570 | /* VFMSUB213PSZ256mbkz */ |
| 122571 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 122572 | /* VFMSUB213PSZ256mk */ |
| 122573 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 122574 | /* VFMSUB213PSZ256mkz */ |
| 122575 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 122576 | /* VFMSUB213PSZ256r */ |
| 122577 | VR256X, VR256X, VR256X, VR256X, |
| 122578 | /* VFMSUB213PSZ256rk */ |
| 122579 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 122580 | /* VFMSUB213PSZ256rkz */ |
| 122581 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 122582 | /* VFMSUB213PSZm */ |
| 122583 | VR512, VR512, VR512, f512mem, |
| 122584 | /* VFMSUB213PSZmb */ |
| 122585 | VR512, VR512, VR512, f32mem, |
| 122586 | /* VFMSUB213PSZmbk */ |
| 122587 | VR512, VR512, VK16WM, VR512, f32mem, |
| 122588 | /* VFMSUB213PSZmbkz */ |
| 122589 | VR512, VR512, VK16WM, VR512, f32mem, |
| 122590 | /* VFMSUB213PSZmk */ |
| 122591 | VR512, VR512, VK16WM, VR512, f512mem, |
| 122592 | /* VFMSUB213PSZmkz */ |
| 122593 | VR512, VR512, VK16WM, VR512, f512mem, |
| 122594 | /* VFMSUB213PSZr */ |
| 122595 | VR512, VR512, VR512, VR512, |
| 122596 | /* VFMSUB213PSZrb */ |
| 122597 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122598 | /* VFMSUB213PSZrbk */ |
| 122599 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 122600 | /* VFMSUB213PSZrbkz */ |
| 122601 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 122602 | /* VFMSUB213PSZrk */ |
| 122603 | VR512, VR512, VK16WM, VR512, VR512, |
| 122604 | /* VFMSUB213PSZrkz */ |
| 122605 | VR512, VR512, VK16WM, VR512, VR512, |
| 122606 | /* VFMSUB213PSm */ |
| 122607 | VR128, VR128, VR128, f128mem, |
| 122608 | /* VFMSUB213PSr */ |
| 122609 | VR128, VR128, VR128, VR128, |
| 122610 | /* VFMSUB213SDZm */ |
| 122611 | FR64X, FR64X, FR64X, f64mem, |
| 122612 | /* VFMSUB213SDZm_Int */ |
| 122613 | VR128X, VR128X, VR128X, sdmem, |
| 122614 | /* VFMSUB213SDZm_Intk */ |
| 122615 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 122616 | /* VFMSUB213SDZm_Intkz */ |
| 122617 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 122618 | /* VFMSUB213SDZr */ |
| 122619 | FR64X, FR64X, FR64X, FR64X, |
| 122620 | /* VFMSUB213SDZr_Int */ |
| 122621 | VR128X, VR128X, VR128X, VR128X, |
| 122622 | /* VFMSUB213SDZr_Intk */ |
| 122623 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122624 | /* VFMSUB213SDZr_Intkz */ |
| 122625 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122626 | /* VFMSUB213SDZrb */ |
| 122627 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 122628 | /* VFMSUB213SDZrb_Int */ |
| 122629 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 122630 | /* VFMSUB213SDZrb_Intk */ |
| 122631 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122632 | /* VFMSUB213SDZrb_Intkz */ |
| 122633 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122634 | /* VFMSUB213SDm */ |
| 122635 | FR64, FR64, FR64, f64mem, |
| 122636 | /* VFMSUB213SDm_Int */ |
| 122637 | VR128, VR128, VR128, sdmem, |
| 122638 | /* VFMSUB213SDr */ |
| 122639 | FR64, FR64, FR64, FR64, |
| 122640 | /* VFMSUB213SDr_Int */ |
| 122641 | VR128, VR128, VR128, VR128, |
| 122642 | /* VFMSUB213SHZm */ |
| 122643 | FR16X, FR16X, FR16X, f16mem, |
| 122644 | /* VFMSUB213SHZm_Int */ |
| 122645 | VR128X, VR128X, VR128X, shmem, |
| 122646 | /* VFMSUB213SHZm_Intk */ |
| 122647 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 122648 | /* VFMSUB213SHZm_Intkz */ |
| 122649 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 122650 | /* VFMSUB213SHZr */ |
| 122651 | FR16X, FR16X, FR16X, FR16X, |
| 122652 | /* VFMSUB213SHZr_Int */ |
| 122653 | VR128X, VR128X, VR128X, VR128X, |
| 122654 | /* VFMSUB213SHZr_Intk */ |
| 122655 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122656 | /* VFMSUB213SHZr_Intkz */ |
| 122657 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122658 | /* VFMSUB213SHZrb */ |
| 122659 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 122660 | /* VFMSUB213SHZrb_Int */ |
| 122661 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 122662 | /* VFMSUB213SHZrb_Intk */ |
| 122663 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122664 | /* VFMSUB213SHZrb_Intkz */ |
| 122665 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122666 | /* VFMSUB213SSZm */ |
| 122667 | FR32X, FR32X, FR32X, f32mem, |
| 122668 | /* VFMSUB213SSZm_Int */ |
| 122669 | VR128X, VR128X, VR128X, ssmem, |
| 122670 | /* VFMSUB213SSZm_Intk */ |
| 122671 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 122672 | /* VFMSUB213SSZm_Intkz */ |
| 122673 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 122674 | /* VFMSUB213SSZr */ |
| 122675 | FR32X, FR32X, FR32X, FR32X, |
| 122676 | /* VFMSUB213SSZr_Int */ |
| 122677 | VR128X, VR128X, VR128X, VR128X, |
| 122678 | /* VFMSUB213SSZr_Intk */ |
| 122679 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122680 | /* VFMSUB213SSZr_Intkz */ |
| 122681 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122682 | /* VFMSUB213SSZrb */ |
| 122683 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 122684 | /* VFMSUB213SSZrb_Int */ |
| 122685 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 122686 | /* VFMSUB213SSZrb_Intk */ |
| 122687 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122688 | /* VFMSUB213SSZrb_Intkz */ |
| 122689 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122690 | /* VFMSUB213SSm */ |
| 122691 | FR32, FR32, FR32, f32mem, |
| 122692 | /* VFMSUB213SSm_Int */ |
| 122693 | VR128, VR128, VR128, ssmem, |
| 122694 | /* VFMSUB213SSr */ |
| 122695 | FR32, FR32, FR32, FR32, |
| 122696 | /* VFMSUB213SSr_Int */ |
| 122697 | VR128, VR128, VR128, VR128, |
| 122698 | /* VFMSUB231PDYm */ |
| 122699 | VR256, VR256, VR256, f256mem, |
| 122700 | /* VFMSUB231PDYr */ |
| 122701 | VR256, VR256, VR256, VR256, |
| 122702 | /* VFMSUB231PDZ128m */ |
| 122703 | VR128X, VR128X, VR128X, f128mem, |
| 122704 | /* VFMSUB231PDZ128mb */ |
| 122705 | VR128X, VR128X, VR128X, f64mem, |
| 122706 | /* VFMSUB231PDZ128mbk */ |
| 122707 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 122708 | /* VFMSUB231PDZ128mbkz */ |
| 122709 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 122710 | /* VFMSUB231PDZ128mk */ |
| 122711 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 122712 | /* VFMSUB231PDZ128mkz */ |
| 122713 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 122714 | /* VFMSUB231PDZ128r */ |
| 122715 | VR128X, VR128X, VR128X, VR128X, |
| 122716 | /* VFMSUB231PDZ128rk */ |
| 122717 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 122718 | /* VFMSUB231PDZ128rkz */ |
| 122719 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 122720 | /* VFMSUB231PDZ256m */ |
| 122721 | VR256X, VR256X, VR256X, f256mem, |
| 122722 | /* VFMSUB231PDZ256mb */ |
| 122723 | VR256X, VR256X, VR256X, f64mem, |
| 122724 | /* VFMSUB231PDZ256mbk */ |
| 122725 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 122726 | /* VFMSUB231PDZ256mbkz */ |
| 122727 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 122728 | /* VFMSUB231PDZ256mk */ |
| 122729 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 122730 | /* VFMSUB231PDZ256mkz */ |
| 122731 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 122732 | /* VFMSUB231PDZ256r */ |
| 122733 | VR256X, VR256X, VR256X, VR256X, |
| 122734 | /* VFMSUB231PDZ256rk */ |
| 122735 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 122736 | /* VFMSUB231PDZ256rkz */ |
| 122737 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 122738 | /* VFMSUB231PDZm */ |
| 122739 | VR512, VR512, VR512, f512mem, |
| 122740 | /* VFMSUB231PDZmb */ |
| 122741 | VR512, VR512, VR512, f64mem, |
| 122742 | /* VFMSUB231PDZmbk */ |
| 122743 | VR512, VR512, VK8WM, VR512, f64mem, |
| 122744 | /* VFMSUB231PDZmbkz */ |
| 122745 | VR512, VR512, VK8WM, VR512, f64mem, |
| 122746 | /* VFMSUB231PDZmk */ |
| 122747 | VR512, VR512, VK8WM, VR512, f512mem, |
| 122748 | /* VFMSUB231PDZmkz */ |
| 122749 | VR512, VR512, VK8WM, VR512, f512mem, |
| 122750 | /* VFMSUB231PDZr */ |
| 122751 | VR512, VR512, VR512, VR512, |
| 122752 | /* VFMSUB231PDZrb */ |
| 122753 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122754 | /* VFMSUB231PDZrbk */ |
| 122755 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 122756 | /* VFMSUB231PDZrbkz */ |
| 122757 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 122758 | /* VFMSUB231PDZrk */ |
| 122759 | VR512, VR512, VK8WM, VR512, VR512, |
| 122760 | /* VFMSUB231PDZrkz */ |
| 122761 | VR512, VR512, VK8WM, VR512, VR512, |
| 122762 | /* VFMSUB231PDm */ |
| 122763 | VR128, VR128, VR128, f128mem, |
| 122764 | /* VFMSUB231PDr */ |
| 122765 | VR128, VR128, VR128, VR128, |
| 122766 | /* VFMSUB231PHZ128m */ |
| 122767 | VR128X, VR128X, VR128X, f128mem, |
| 122768 | /* VFMSUB231PHZ128mb */ |
| 122769 | VR128X, VR128X, VR128X, f16mem, |
| 122770 | /* VFMSUB231PHZ128mbk */ |
| 122771 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 122772 | /* VFMSUB231PHZ128mbkz */ |
| 122773 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 122774 | /* VFMSUB231PHZ128mk */ |
| 122775 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 122776 | /* VFMSUB231PHZ128mkz */ |
| 122777 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 122778 | /* VFMSUB231PHZ128r */ |
| 122779 | VR128X, VR128X, VR128X, VR128X, |
| 122780 | /* VFMSUB231PHZ128rk */ |
| 122781 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 122782 | /* VFMSUB231PHZ128rkz */ |
| 122783 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 122784 | /* VFMSUB231PHZ256m */ |
| 122785 | VR256X, VR256X, VR256X, f256mem, |
| 122786 | /* VFMSUB231PHZ256mb */ |
| 122787 | VR256X, VR256X, VR256X, f16mem, |
| 122788 | /* VFMSUB231PHZ256mbk */ |
| 122789 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 122790 | /* VFMSUB231PHZ256mbkz */ |
| 122791 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 122792 | /* VFMSUB231PHZ256mk */ |
| 122793 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 122794 | /* VFMSUB231PHZ256mkz */ |
| 122795 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 122796 | /* VFMSUB231PHZ256r */ |
| 122797 | VR256X, VR256X, VR256X, VR256X, |
| 122798 | /* VFMSUB231PHZ256rk */ |
| 122799 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 122800 | /* VFMSUB231PHZ256rkz */ |
| 122801 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 122802 | /* VFMSUB231PHZm */ |
| 122803 | VR512, VR512, VR512, f512mem, |
| 122804 | /* VFMSUB231PHZmb */ |
| 122805 | VR512, VR512, VR512, f16mem, |
| 122806 | /* VFMSUB231PHZmbk */ |
| 122807 | VR512, VR512, VK32WM, VR512, f16mem, |
| 122808 | /* VFMSUB231PHZmbkz */ |
| 122809 | VR512, VR512, VK32WM, VR512, f16mem, |
| 122810 | /* VFMSUB231PHZmk */ |
| 122811 | VR512, VR512, VK32WM, VR512, f512mem, |
| 122812 | /* VFMSUB231PHZmkz */ |
| 122813 | VR512, VR512, VK32WM, VR512, f512mem, |
| 122814 | /* VFMSUB231PHZr */ |
| 122815 | VR512, VR512, VR512, VR512, |
| 122816 | /* VFMSUB231PHZrb */ |
| 122817 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122818 | /* VFMSUB231PHZrbk */ |
| 122819 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 122820 | /* VFMSUB231PHZrbkz */ |
| 122821 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 122822 | /* VFMSUB231PHZrk */ |
| 122823 | VR512, VR512, VK32WM, VR512, VR512, |
| 122824 | /* VFMSUB231PHZrkz */ |
| 122825 | VR512, VR512, VK32WM, VR512, VR512, |
| 122826 | /* VFMSUB231PSYm */ |
| 122827 | VR256, VR256, VR256, f256mem, |
| 122828 | /* VFMSUB231PSYr */ |
| 122829 | VR256, VR256, VR256, VR256, |
| 122830 | /* VFMSUB231PSZ128m */ |
| 122831 | VR128X, VR128X, VR128X, f128mem, |
| 122832 | /* VFMSUB231PSZ128mb */ |
| 122833 | VR128X, VR128X, VR128X, f32mem, |
| 122834 | /* VFMSUB231PSZ128mbk */ |
| 122835 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 122836 | /* VFMSUB231PSZ128mbkz */ |
| 122837 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 122838 | /* VFMSUB231PSZ128mk */ |
| 122839 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 122840 | /* VFMSUB231PSZ128mkz */ |
| 122841 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 122842 | /* VFMSUB231PSZ128r */ |
| 122843 | VR128X, VR128X, VR128X, VR128X, |
| 122844 | /* VFMSUB231PSZ128rk */ |
| 122845 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 122846 | /* VFMSUB231PSZ128rkz */ |
| 122847 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 122848 | /* VFMSUB231PSZ256m */ |
| 122849 | VR256X, VR256X, VR256X, f256mem, |
| 122850 | /* VFMSUB231PSZ256mb */ |
| 122851 | VR256X, VR256X, VR256X, f32mem, |
| 122852 | /* VFMSUB231PSZ256mbk */ |
| 122853 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 122854 | /* VFMSUB231PSZ256mbkz */ |
| 122855 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 122856 | /* VFMSUB231PSZ256mk */ |
| 122857 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 122858 | /* VFMSUB231PSZ256mkz */ |
| 122859 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 122860 | /* VFMSUB231PSZ256r */ |
| 122861 | VR256X, VR256X, VR256X, VR256X, |
| 122862 | /* VFMSUB231PSZ256rk */ |
| 122863 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 122864 | /* VFMSUB231PSZ256rkz */ |
| 122865 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 122866 | /* VFMSUB231PSZm */ |
| 122867 | VR512, VR512, VR512, f512mem, |
| 122868 | /* VFMSUB231PSZmb */ |
| 122869 | VR512, VR512, VR512, f32mem, |
| 122870 | /* VFMSUB231PSZmbk */ |
| 122871 | VR512, VR512, VK16WM, VR512, f32mem, |
| 122872 | /* VFMSUB231PSZmbkz */ |
| 122873 | VR512, VR512, VK16WM, VR512, f32mem, |
| 122874 | /* VFMSUB231PSZmk */ |
| 122875 | VR512, VR512, VK16WM, VR512, f512mem, |
| 122876 | /* VFMSUB231PSZmkz */ |
| 122877 | VR512, VR512, VK16WM, VR512, f512mem, |
| 122878 | /* VFMSUB231PSZr */ |
| 122879 | VR512, VR512, VR512, VR512, |
| 122880 | /* VFMSUB231PSZrb */ |
| 122881 | VR512, VR512, VR512, VR512, AVX512RC, |
| 122882 | /* VFMSUB231PSZrbk */ |
| 122883 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 122884 | /* VFMSUB231PSZrbkz */ |
| 122885 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 122886 | /* VFMSUB231PSZrk */ |
| 122887 | VR512, VR512, VK16WM, VR512, VR512, |
| 122888 | /* VFMSUB231PSZrkz */ |
| 122889 | VR512, VR512, VK16WM, VR512, VR512, |
| 122890 | /* VFMSUB231PSm */ |
| 122891 | VR128, VR128, VR128, f128mem, |
| 122892 | /* VFMSUB231PSr */ |
| 122893 | VR128, VR128, VR128, VR128, |
| 122894 | /* VFMSUB231SDZm */ |
| 122895 | FR64X, FR64X, FR64X, f64mem, |
| 122896 | /* VFMSUB231SDZm_Int */ |
| 122897 | VR128X, VR128X, VR128X, sdmem, |
| 122898 | /* VFMSUB231SDZm_Intk */ |
| 122899 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 122900 | /* VFMSUB231SDZm_Intkz */ |
| 122901 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 122902 | /* VFMSUB231SDZr */ |
| 122903 | FR64X, FR64X, FR64X, FR64X, |
| 122904 | /* VFMSUB231SDZr_Int */ |
| 122905 | VR128X, VR128X, VR128X, VR128X, |
| 122906 | /* VFMSUB231SDZr_Intk */ |
| 122907 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122908 | /* VFMSUB231SDZr_Intkz */ |
| 122909 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122910 | /* VFMSUB231SDZrb */ |
| 122911 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 122912 | /* VFMSUB231SDZrb_Int */ |
| 122913 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 122914 | /* VFMSUB231SDZrb_Intk */ |
| 122915 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122916 | /* VFMSUB231SDZrb_Intkz */ |
| 122917 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122918 | /* VFMSUB231SDm */ |
| 122919 | FR64, FR64, FR64, f64mem, |
| 122920 | /* VFMSUB231SDm_Int */ |
| 122921 | VR128, VR128, VR128, sdmem, |
| 122922 | /* VFMSUB231SDr */ |
| 122923 | FR64, FR64, FR64, FR64, |
| 122924 | /* VFMSUB231SDr_Int */ |
| 122925 | VR128, VR128, VR128, VR128, |
| 122926 | /* VFMSUB231SHZm */ |
| 122927 | FR16X, FR16X, FR16X, f16mem, |
| 122928 | /* VFMSUB231SHZm_Int */ |
| 122929 | VR128X, VR128X, VR128X, shmem, |
| 122930 | /* VFMSUB231SHZm_Intk */ |
| 122931 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 122932 | /* VFMSUB231SHZm_Intkz */ |
| 122933 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 122934 | /* VFMSUB231SHZr */ |
| 122935 | FR16X, FR16X, FR16X, FR16X, |
| 122936 | /* VFMSUB231SHZr_Int */ |
| 122937 | VR128X, VR128X, VR128X, VR128X, |
| 122938 | /* VFMSUB231SHZr_Intk */ |
| 122939 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122940 | /* VFMSUB231SHZr_Intkz */ |
| 122941 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122942 | /* VFMSUB231SHZrb */ |
| 122943 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 122944 | /* VFMSUB231SHZrb_Int */ |
| 122945 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 122946 | /* VFMSUB231SHZrb_Intk */ |
| 122947 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122948 | /* VFMSUB231SHZrb_Intkz */ |
| 122949 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122950 | /* VFMSUB231SSZm */ |
| 122951 | FR32X, FR32X, FR32X, f32mem, |
| 122952 | /* VFMSUB231SSZm_Int */ |
| 122953 | VR128X, VR128X, VR128X, ssmem, |
| 122954 | /* VFMSUB231SSZm_Intk */ |
| 122955 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 122956 | /* VFMSUB231SSZm_Intkz */ |
| 122957 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 122958 | /* VFMSUB231SSZr */ |
| 122959 | FR32X, FR32X, FR32X, FR32X, |
| 122960 | /* VFMSUB231SSZr_Int */ |
| 122961 | VR128X, VR128X, VR128X, VR128X, |
| 122962 | /* VFMSUB231SSZr_Intk */ |
| 122963 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122964 | /* VFMSUB231SSZr_Intkz */ |
| 122965 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 122966 | /* VFMSUB231SSZrb */ |
| 122967 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 122968 | /* VFMSUB231SSZrb_Int */ |
| 122969 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 122970 | /* VFMSUB231SSZrb_Intk */ |
| 122971 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122972 | /* VFMSUB231SSZrb_Intkz */ |
| 122973 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 122974 | /* VFMSUB231SSm */ |
| 122975 | FR32, FR32, FR32, f32mem, |
| 122976 | /* VFMSUB231SSm_Int */ |
| 122977 | VR128, VR128, VR128, ssmem, |
| 122978 | /* VFMSUB231SSr */ |
| 122979 | FR32, FR32, FR32, FR32, |
| 122980 | /* VFMSUB231SSr_Int */ |
| 122981 | VR128, VR128, VR128, VR128, |
| 122982 | /* VFMSUBADD132PDYm */ |
| 122983 | VR256, VR256, VR256, f256mem, |
| 122984 | /* VFMSUBADD132PDYr */ |
| 122985 | VR256, VR256, VR256, VR256, |
| 122986 | /* VFMSUBADD132PDZ128m */ |
| 122987 | VR128X, VR128X, VR128X, f128mem, |
| 122988 | /* VFMSUBADD132PDZ128mb */ |
| 122989 | VR128X, VR128X, VR128X, f64mem, |
| 122990 | /* VFMSUBADD132PDZ128mbk */ |
| 122991 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 122992 | /* VFMSUBADD132PDZ128mbkz */ |
| 122993 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 122994 | /* VFMSUBADD132PDZ128mk */ |
| 122995 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 122996 | /* VFMSUBADD132PDZ128mkz */ |
| 122997 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 122998 | /* VFMSUBADD132PDZ128r */ |
| 122999 | VR128X, VR128X, VR128X, VR128X, |
| 123000 | /* VFMSUBADD132PDZ128rk */ |
| 123001 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 123002 | /* VFMSUBADD132PDZ128rkz */ |
| 123003 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 123004 | /* VFMSUBADD132PDZ256m */ |
| 123005 | VR256X, VR256X, VR256X, f256mem, |
| 123006 | /* VFMSUBADD132PDZ256mb */ |
| 123007 | VR256X, VR256X, VR256X, f64mem, |
| 123008 | /* VFMSUBADD132PDZ256mbk */ |
| 123009 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 123010 | /* VFMSUBADD132PDZ256mbkz */ |
| 123011 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 123012 | /* VFMSUBADD132PDZ256mk */ |
| 123013 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 123014 | /* VFMSUBADD132PDZ256mkz */ |
| 123015 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 123016 | /* VFMSUBADD132PDZ256r */ |
| 123017 | VR256X, VR256X, VR256X, VR256X, |
| 123018 | /* VFMSUBADD132PDZ256rk */ |
| 123019 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 123020 | /* VFMSUBADD132PDZ256rkz */ |
| 123021 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 123022 | /* VFMSUBADD132PDZm */ |
| 123023 | VR512, VR512, VR512, f512mem, |
| 123024 | /* VFMSUBADD132PDZmb */ |
| 123025 | VR512, VR512, VR512, f64mem, |
| 123026 | /* VFMSUBADD132PDZmbk */ |
| 123027 | VR512, VR512, VK8WM, VR512, f64mem, |
| 123028 | /* VFMSUBADD132PDZmbkz */ |
| 123029 | VR512, VR512, VK8WM, VR512, f64mem, |
| 123030 | /* VFMSUBADD132PDZmk */ |
| 123031 | VR512, VR512, VK8WM, VR512, f512mem, |
| 123032 | /* VFMSUBADD132PDZmkz */ |
| 123033 | VR512, VR512, VK8WM, VR512, f512mem, |
| 123034 | /* VFMSUBADD132PDZr */ |
| 123035 | VR512, VR512, VR512, VR512, |
| 123036 | /* VFMSUBADD132PDZrb */ |
| 123037 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123038 | /* VFMSUBADD132PDZrbk */ |
| 123039 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 123040 | /* VFMSUBADD132PDZrbkz */ |
| 123041 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 123042 | /* VFMSUBADD132PDZrk */ |
| 123043 | VR512, VR512, VK8WM, VR512, VR512, |
| 123044 | /* VFMSUBADD132PDZrkz */ |
| 123045 | VR512, VR512, VK8WM, VR512, VR512, |
| 123046 | /* VFMSUBADD132PDm */ |
| 123047 | VR128, VR128, VR128, f128mem, |
| 123048 | /* VFMSUBADD132PDr */ |
| 123049 | VR128, VR128, VR128, VR128, |
| 123050 | /* VFMSUBADD132PHZ128m */ |
| 123051 | VR128X, VR128X, VR128X, f128mem, |
| 123052 | /* VFMSUBADD132PHZ128mb */ |
| 123053 | VR128X, VR128X, VR128X, f16mem, |
| 123054 | /* VFMSUBADD132PHZ128mbk */ |
| 123055 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 123056 | /* VFMSUBADD132PHZ128mbkz */ |
| 123057 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 123058 | /* VFMSUBADD132PHZ128mk */ |
| 123059 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 123060 | /* VFMSUBADD132PHZ128mkz */ |
| 123061 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 123062 | /* VFMSUBADD132PHZ128r */ |
| 123063 | VR128X, VR128X, VR128X, VR128X, |
| 123064 | /* VFMSUBADD132PHZ128rk */ |
| 123065 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123066 | /* VFMSUBADD132PHZ128rkz */ |
| 123067 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123068 | /* VFMSUBADD132PHZ256m */ |
| 123069 | VR256X, VR256X, VR256X, f256mem, |
| 123070 | /* VFMSUBADD132PHZ256mb */ |
| 123071 | VR256X, VR256X, VR256X, f16mem, |
| 123072 | /* VFMSUBADD132PHZ256mbk */ |
| 123073 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 123074 | /* VFMSUBADD132PHZ256mbkz */ |
| 123075 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 123076 | /* VFMSUBADD132PHZ256mk */ |
| 123077 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 123078 | /* VFMSUBADD132PHZ256mkz */ |
| 123079 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 123080 | /* VFMSUBADD132PHZ256r */ |
| 123081 | VR256X, VR256X, VR256X, VR256X, |
| 123082 | /* VFMSUBADD132PHZ256rk */ |
| 123083 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123084 | /* VFMSUBADD132PHZ256rkz */ |
| 123085 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123086 | /* VFMSUBADD132PHZm */ |
| 123087 | VR512, VR512, VR512, f512mem, |
| 123088 | /* VFMSUBADD132PHZmb */ |
| 123089 | VR512, VR512, VR512, f16mem, |
| 123090 | /* VFMSUBADD132PHZmbk */ |
| 123091 | VR512, VR512, VK32WM, VR512, f16mem, |
| 123092 | /* VFMSUBADD132PHZmbkz */ |
| 123093 | VR512, VR512, VK32WM, VR512, f16mem, |
| 123094 | /* VFMSUBADD132PHZmk */ |
| 123095 | VR512, VR512, VK32WM, VR512, f512mem, |
| 123096 | /* VFMSUBADD132PHZmkz */ |
| 123097 | VR512, VR512, VK32WM, VR512, f512mem, |
| 123098 | /* VFMSUBADD132PHZr */ |
| 123099 | VR512, VR512, VR512, VR512, |
| 123100 | /* VFMSUBADD132PHZrb */ |
| 123101 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123102 | /* VFMSUBADD132PHZrbk */ |
| 123103 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 123104 | /* VFMSUBADD132PHZrbkz */ |
| 123105 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 123106 | /* VFMSUBADD132PHZrk */ |
| 123107 | VR512, VR512, VK32WM, VR512, VR512, |
| 123108 | /* VFMSUBADD132PHZrkz */ |
| 123109 | VR512, VR512, VK32WM, VR512, VR512, |
| 123110 | /* VFMSUBADD132PSYm */ |
| 123111 | VR256, VR256, VR256, f256mem, |
| 123112 | /* VFMSUBADD132PSYr */ |
| 123113 | VR256, VR256, VR256, VR256, |
| 123114 | /* VFMSUBADD132PSZ128m */ |
| 123115 | VR128X, VR128X, VR128X, f128mem, |
| 123116 | /* VFMSUBADD132PSZ128mb */ |
| 123117 | VR128X, VR128X, VR128X, f32mem, |
| 123118 | /* VFMSUBADD132PSZ128mbk */ |
| 123119 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123120 | /* VFMSUBADD132PSZ128mbkz */ |
| 123121 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123122 | /* VFMSUBADD132PSZ128mk */ |
| 123123 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123124 | /* VFMSUBADD132PSZ128mkz */ |
| 123125 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123126 | /* VFMSUBADD132PSZ128r */ |
| 123127 | VR128X, VR128X, VR128X, VR128X, |
| 123128 | /* VFMSUBADD132PSZ128rk */ |
| 123129 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123130 | /* VFMSUBADD132PSZ128rkz */ |
| 123131 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123132 | /* VFMSUBADD132PSZ256m */ |
| 123133 | VR256X, VR256X, VR256X, f256mem, |
| 123134 | /* VFMSUBADD132PSZ256mb */ |
| 123135 | VR256X, VR256X, VR256X, f32mem, |
| 123136 | /* VFMSUBADD132PSZ256mbk */ |
| 123137 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123138 | /* VFMSUBADD132PSZ256mbkz */ |
| 123139 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123140 | /* VFMSUBADD132PSZ256mk */ |
| 123141 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123142 | /* VFMSUBADD132PSZ256mkz */ |
| 123143 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123144 | /* VFMSUBADD132PSZ256r */ |
| 123145 | VR256X, VR256X, VR256X, VR256X, |
| 123146 | /* VFMSUBADD132PSZ256rk */ |
| 123147 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123148 | /* VFMSUBADD132PSZ256rkz */ |
| 123149 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123150 | /* VFMSUBADD132PSZm */ |
| 123151 | VR512, VR512, VR512, f512mem, |
| 123152 | /* VFMSUBADD132PSZmb */ |
| 123153 | VR512, VR512, VR512, f32mem, |
| 123154 | /* VFMSUBADD132PSZmbk */ |
| 123155 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123156 | /* VFMSUBADD132PSZmbkz */ |
| 123157 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123158 | /* VFMSUBADD132PSZmk */ |
| 123159 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123160 | /* VFMSUBADD132PSZmkz */ |
| 123161 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123162 | /* VFMSUBADD132PSZr */ |
| 123163 | VR512, VR512, VR512, VR512, |
| 123164 | /* VFMSUBADD132PSZrb */ |
| 123165 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123166 | /* VFMSUBADD132PSZrbk */ |
| 123167 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123168 | /* VFMSUBADD132PSZrbkz */ |
| 123169 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123170 | /* VFMSUBADD132PSZrk */ |
| 123171 | VR512, VR512, VK16WM, VR512, VR512, |
| 123172 | /* VFMSUBADD132PSZrkz */ |
| 123173 | VR512, VR512, VK16WM, VR512, VR512, |
| 123174 | /* VFMSUBADD132PSm */ |
| 123175 | VR128, VR128, VR128, f128mem, |
| 123176 | /* VFMSUBADD132PSr */ |
| 123177 | VR128, VR128, VR128, VR128, |
| 123178 | /* VFMSUBADD213PDYm */ |
| 123179 | VR256, VR256, VR256, f256mem, |
| 123180 | /* VFMSUBADD213PDYr */ |
| 123181 | VR256, VR256, VR256, VR256, |
| 123182 | /* VFMSUBADD213PDZ128m */ |
| 123183 | VR128X, VR128X, VR128X, f128mem, |
| 123184 | /* VFMSUBADD213PDZ128mb */ |
| 123185 | VR128X, VR128X, VR128X, f64mem, |
| 123186 | /* VFMSUBADD213PDZ128mbk */ |
| 123187 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 123188 | /* VFMSUBADD213PDZ128mbkz */ |
| 123189 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 123190 | /* VFMSUBADD213PDZ128mk */ |
| 123191 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 123192 | /* VFMSUBADD213PDZ128mkz */ |
| 123193 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 123194 | /* VFMSUBADD213PDZ128r */ |
| 123195 | VR128X, VR128X, VR128X, VR128X, |
| 123196 | /* VFMSUBADD213PDZ128rk */ |
| 123197 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 123198 | /* VFMSUBADD213PDZ128rkz */ |
| 123199 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 123200 | /* VFMSUBADD213PDZ256m */ |
| 123201 | VR256X, VR256X, VR256X, f256mem, |
| 123202 | /* VFMSUBADD213PDZ256mb */ |
| 123203 | VR256X, VR256X, VR256X, f64mem, |
| 123204 | /* VFMSUBADD213PDZ256mbk */ |
| 123205 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 123206 | /* VFMSUBADD213PDZ256mbkz */ |
| 123207 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 123208 | /* VFMSUBADD213PDZ256mk */ |
| 123209 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 123210 | /* VFMSUBADD213PDZ256mkz */ |
| 123211 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 123212 | /* VFMSUBADD213PDZ256r */ |
| 123213 | VR256X, VR256X, VR256X, VR256X, |
| 123214 | /* VFMSUBADD213PDZ256rk */ |
| 123215 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 123216 | /* VFMSUBADD213PDZ256rkz */ |
| 123217 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 123218 | /* VFMSUBADD213PDZm */ |
| 123219 | VR512, VR512, VR512, f512mem, |
| 123220 | /* VFMSUBADD213PDZmb */ |
| 123221 | VR512, VR512, VR512, f64mem, |
| 123222 | /* VFMSUBADD213PDZmbk */ |
| 123223 | VR512, VR512, VK8WM, VR512, f64mem, |
| 123224 | /* VFMSUBADD213PDZmbkz */ |
| 123225 | VR512, VR512, VK8WM, VR512, f64mem, |
| 123226 | /* VFMSUBADD213PDZmk */ |
| 123227 | VR512, VR512, VK8WM, VR512, f512mem, |
| 123228 | /* VFMSUBADD213PDZmkz */ |
| 123229 | VR512, VR512, VK8WM, VR512, f512mem, |
| 123230 | /* VFMSUBADD213PDZr */ |
| 123231 | VR512, VR512, VR512, VR512, |
| 123232 | /* VFMSUBADD213PDZrb */ |
| 123233 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123234 | /* VFMSUBADD213PDZrbk */ |
| 123235 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 123236 | /* VFMSUBADD213PDZrbkz */ |
| 123237 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 123238 | /* VFMSUBADD213PDZrk */ |
| 123239 | VR512, VR512, VK8WM, VR512, VR512, |
| 123240 | /* VFMSUBADD213PDZrkz */ |
| 123241 | VR512, VR512, VK8WM, VR512, VR512, |
| 123242 | /* VFMSUBADD213PDm */ |
| 123243 | VR128, VR128, VR128, f128mem, |
| 123244 | /* VFMSUBADD213PDr */ |
| 123245 | VR128, VR128, VR128, VR128, |
| 123246 | /* VFMSUBADD213PHZ128m */ |
| 123247 | VR128X, VR128X, VR128X, f128mem, |
| 123248 | /* VFMSUBADD213PHZ128mb */ |
| 123249 | VR128X, VR128X, VR128X, f16mem, |
| 123250 | /* VFMSUBADD213PHZ128mbk */ |
| 123251 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 123252 | /* VFMSUBADD213PHZ128mbkz */ |
| 123253 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 123254 | /* VFMSUBADD213PHZ128mk */ |
| 123255 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 123256 | /* VFMSUBADD213PHZ128mkz */ |
| 123257 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 123258 | /* VFMSUBADD213PHZ128r */ |
| 123259 | VR128X, VR128X, VR128X, VR128X, |
| 123260 | /* VFMSUBADD213PHZ128rk */ |
| 123261 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123262 | /* VFMSUBADD213PHZ128rkz */ |
| 123263 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123264 | /* VFMSUBADD213PHZ256m */ |
| 123265 | VR256X, VR256X, VR256X, f256mem, |
| 123266 | /* VFMSUBADD213PHZ256mb */ |
| 123267 | VR256X, VR256X, VR256X, f16mem, |
| 123268 | /* VFMSUBADD213PHZ256mbk */ |
| 123269 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 123270 | /* VFMSUBADD213PHZ256mbkz */ |
| 123271 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 123272 | /* VFMSUBADD213PHZ256mk */ |
| 123273 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 123274 | /* VFMSUBADD213PHZ256mkz */ |
| 123275 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 123276 | /* VFMSUBADD213PHZ256r */ |
| 123277 | VR256X, VR256X, VR256X, VR256X, |
| 123278 | /* VFMSUBADD213PHZ256rk */ |
| 123279 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123280 | /* VFMSUBADD213PHZ256rkz */ |
| 123281 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123282 | /* VFMSUBADD213PHZm */ |
| 123283 | VR512, VR512, VR512, f512mem, |
| 123284 | /* VFMSUBADD213PHZmb */ |
| 123285 | VR512, VR512, VR512, f16mem, |
| 123286 | /* VFMSUBADD213PHZmbk */ |
| 123287 | VR512, VR512, VK32WM, VR512, f16mem, |
| 123288 | /* VFMSUBADD213PHZmbkz */ |
| 123289 | VR512, VR512, VK32WM, VR512, f16mem, |
| 123290 | /* VFMSUBADD213PHZmk */ |
| 123291 | VR512, VR512, VK32WM, VR512, f512mem, |
| 123292 | /* VFMSUBADD213PHZmkz */ |
| 123293 | VR512, VR512, VK32WM, VR512, f512mem, |
| 123294 | /* VFMSUBADD213PHZr */ |
| 123295 | VR512, VR512, VR512, VR512, |
| 123296 | /* VFMSUBADD213PHZrb */ |
| 123297 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123298 | /* VFMSUBADD213PHZrbk */ |
| 123299 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 123300 | /* VFMSUBADD213PHZrbkz */ |
| 123301 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 123302 | /* VFMSUBADD213PHZrk */ |
| 123303 | VR512, VR512, VK32WM, VR512, VR512, |
| 123304 | /* VFMSUBADD213PHZrkz */ |
| 123305 | VR512, VR512, VK32WM, VR512, VR512, |
| 123306 | /* VFMSUBADD213PSYm */ |
| 123307 | VR256, VR256, VR256, f256mem, |
| 123308 | /* VFMSUBADD213PSYr */ |
| 123309 | VR256, VR256, VR256, VR256, |
| 123310 | /* VFMSUBADD213PSZ128m */ |
| 123311 | VR128X, VR128X, VR128X, f128mem, |
| 123312 | /* VFMSUBADD213PSZ128mb */ |
| 123313 | VR128X, VR128X, VR128X, f32mem, |
| 123314 | /* VFMSUBADD213PSZ128mbk */ |
| 123315 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123316 | /* VFMSUBADD213PSZ128mbkz */ |
| 123317 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123318 | /* VFMSUBADD213PSZ128mk */ |
| 123319 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123320 | /* VFMSUBADD213PSZ128mkz */ |
| 123321 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123322 | /* VFMSUBADD213PSZ128r */ |
| 123323 | VR128X, VR128X, VR128X, VR128X, |
| 123324 | /* VFMSUBADD213PSZ128rk */ |
| 123325 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123326 | /* VFMSUBADD213PSZ128rkz */ |
| 123327 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123328 | /* VFMSUBADD213PSZ256m */ |
| 123329 | VR256X, VR256X, VR256X, f256mem, |
| 123330 | /* VFMSUBADD213PSZ256mb */ |
| 123331 | VR256X, VR256X, VR256X, f32mem, |
| 123332 | /* VFMSUBADD213PSZ256mbk */ |
| 123333 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123334 | /* VFMSUBADD213PSZ256mbkz */ |
| 123335 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123336 | /* VFMSUBADD213PSZ256mk */ |
| 123337 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123338 | /* VFMSUBADD213PSZ256mkz */ |
| 123339 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123340 | /* VFMSUBADD213PSZ256r */ |
| 123341 | VR256X, VR256X, VR256X, VR256X, |
| 123342 | /* VFMSUBADD213PSZ256rk */ |
| 123343 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123344 | /* VFMSUBADD213PSZ256rkz */ |
| 123345 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123346 | /* VFMSUBADD213PSZm */ |
| 123347 | VR512, VR512, VR512, f512mem, |
| 123348 | /* VFMSUBADD213PSZmb */ |
| 123349 | VR512, VR512, VR512, f32mem, |
| 123350 | /* VFMSUBADD213PSZmbk */ |
| 123351 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123352 | /* VFMSUBADD213PSZmbkz */ |
| 123353 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123354 | /* VFMSUBADD213PSZmk */ |
| 123355 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123356 | /* VFMSUBADD213PSZmkz */ |
| 123357 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123358 | /* VFMSUBADD213PSZr */ |
| 123359 | VR512, VR512, VR512, VR512, |
| 123360 | /* VFMSUBADD213PSZrb */ |
| 123361 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123362 | /* VFMSUBADD213PSZrbk */ |
| 123363 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123364 | /* VFMSUBADD213PSZrbkz */ |
| 123365 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123366 | /* VFMSUBADD213PSZrk */ |
| 123367 | VR512, VR512, VK16WM, VR512, VR512, |
| 123368 | /* VFMSUBADD213PSZrkz */ |
| 123369 | VR512, VR512, VK16WM, VR512, VR512, |
| 123370 | /* VFMSUBADD213PSm */ |
| 123371 | VR128, VR128, VR128, f128mem, |
| 123372 | /* VFMSUBADD213PSr */ |
| 123373 | VR128, VR128, VR128, VR128, |
| 123374 | /* VFMSUBADD231PDYm */ |
| 123375 | VR256, VR256, VR256, f256mem, |
| 123376 | /* VFMSUBADD231PDYr */ |
| 123377 | VR256, VR256, VR256, VR256, |
| 123378 | /* VFMSUBADD231PDZ128m */ |
| 123379 | VR128X, VR128X, VR128X, f128mem, |
| 123380 | /* VFMSUBADD231PDZ128mb */ |
| 123381 | VR128X, VR128X, VR128X, f64mem, |
| 123382 | /* VFMSUBADD231PDZ128mbk */ |
| 123383 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 123384 | /* VFMSUBADD231PDZ128mbkz */ |
| 123385 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 123386 | /* VFMSUBADD231PDZ128mk */ |
| 123387 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 123388 | /* VFMSUBADD231PDZ128mkz */ |
| 123389 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 123390 | /* VFMSUBADD231PDZ128r */ |
| 123391 | VR128X, VR128X, VR128X, VR128X, |
| 123392 | /* VFMSUBADD231PDZ128rk */ |
| 123393 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 123394 | /* VFMSUBADD231PDZ128rkz */ |
| 123395 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 123396 | /* VFMSUBADD231PDZ256m */ |
| 123397 | VR256X, VR256X, VR256X, f256mem, |
| 123398 | /* VFMSUBADD231PDZ256mb */ |
| 123399 | VR256X, VR256X, VR256X, f64mem, |
| 123400 | /* VFMSUBADD231PDZ256mbk */ |
| 123401 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 123402 | /* VFMSUBADD231PDZ256mbkz */ |
| 123403 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 123404 | /* VFMSUBADD231PDZ256mk */ |
| 123405 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 123406 | /* VFMSUBADD231PDZ256mkz */ |
| 123407 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 123408 | /* VFMSUBADD231PDZ256r */ |
| 123409 | VR256X, VR256X, VR256X, VR256X, |
| 123410 | /* VFMSUBADD231PDZ256rk */ |
| 123411 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 123412 | /* VFMSUBADD231PDZ256rkz */ |
| 123413 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 123414 | /* VFMSUBADD231PDZm */ |
| 123415 | VR512, VR512, VR512, f512mem, |
| 123416 | /* VFMSUBADD231PDZmb */ |
| 123417 | VR512, VR512, VR512, f64mem, |
| 123418 | /* VFMSUBADD231PDZmbk */ |
| 123419 | VR512, VR512, VK8WM, VR512, f64mem, |
| 123420 | /* VFMSUBADD231PDZmbkz */ |
| 123421 | VR512, VR512, VK8WM, VR512, f64mem, |
| 123422 | /* VFMSUBADD231PDZmk */ |
| 123423 | VR512, VR512, VK8WM, VR512, f512mem, |
| 123424 | /* VFMSUBADD231PDZmkz */ |
| 123425 | VR512, VR512, VK8WM, VR512, f512mem, |
| 123426 | /* VFMSUBADD231PDZr */ |
| 123427 | VR512, VR512, VR512, VR512, |
| 123428 | /* VFMSUBADD231PDZrb */ |
| 123429 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123430 | /* VFMSUBADD231PDZrbk */ |
| 123431 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 123432 | /* VFMSUBADD231PDZrbkz */ |
| 123433 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 123434 | /* VFMSUBADD231PDZrk */ |
| 123435 | VR512, VR512, VK8WM, VR512, VR512, |
| 123436 | /* VFMSUBADD231PDZrkz */ |
| 123437 | VR512, VR512, VK8WM, VR512, VR512, |
| 123438 | /* VFMSUBADD231PDm */ |
| 123439 | VR128, VR128, VR128, f128mem, |
| 123440 | /* VFMSUBADD231PDr */ |
| 123441 | VR128, VR128, VR128, VR128, |
| 123442 | /* VFMSUBADD231PHZ128m */ |
| 123443 | VR128X, VR128X, VR128X, f128mem, |
| 123444 | /* VFMSUBADD231PHZ128mb */ |
| 123445 | VR128X, VR128X, VR128X, f16mem, |
| 123446 | /* VFMSUBADD231PHZ128mbk */ |
| 123447 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 123448 | /* VFMSUBADD231PHZ128mbkz */ |
| 123449 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 123450 | /* VFMSUBADD231PHZ128mk */ |
| 123451 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 123452 | /* VFMSUBADD231PHZ128mkz */ |
| 123453 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 123454 | /* VFMSUBADD231PHZ128r */ |
| 123455 | VR128X, VR128X, VR128X, VR128X, |
| 123456 | /* VFMSUBADD231PHZ128rk */ |
| 123457 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123458 | /* VFMSUBADD231PHZ128rkz */ |
| 123459 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123460 | /* VFMSUBADD231PHZ256m */ |
| 123461 | VR256X, VR256X, VR256X, f256mem, |
| 123462 | /* VFMSUBADD231PHZ256mb */ |
| 123463 | VR256X, VR256X, VR256X, f16mem, |
| 123464 | /* VFMSUBADD231PHZ256mbk */ |
| 123465 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 123466 | /* VFMSUBADD231PHZ256mbkz */ |
| 123467 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 123468 | /* VFMSUBADD231PHZ256mk */ |
| 123469 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 123470 | /* VFMSUBADD231PHZ256mkz */ |
| 123471 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 123472 | /* VFMSUBADD231PHZ256r */ |
| 123473 | VR256X, VR256X, VR256X, VR256X, |
| 123474 | /* VFMSUBADD231PHZ256rk */ |
| 123475 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123476 | /* VFMSUBADD231PHZ256rkz */ |
| 123477 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123478 | /* VFMSUBADD231PHZm */ |
| 123479 | VR512, VR512, VR512, f512mem, |
| 123480 | /* VFMSUBADD231PHZmb */ |
| 123481 | VR512, VR512, VR512, f16mem, |
| 123482 | /* VFMSUBADD231PHZmbk */ |
| 123483 | VR512, VR512, VK32WM, VR512, f16mem, |
| 123484 | /* VFMSUBADD231PHZmbkz */ |
| 123485 | VR512, VR512, VK32WM, VR512, f16mem, |
| 123486 | /* VFMSUBADD231PHZmk */ |
| 123487 | VR512, VR512, VK32WM, VR512, f512mem, |
| 123488 | /* VFMSUBADD231PHZmkz */ |
| 123489 | VR512, VR512, VK32WM, VR512, f512mem, |
| 123490 | /* VFMSUBADD231PHZr */ |
| 123491 | VR512, VR512, VR512, VR512, |
| 123492 | /* VFMSUBADD231PHZrb */ |
| 123493 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123494 | /* VFMSUBADD231PHZrbk */ |
| 123495 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 123496 | /* VFMSUBADD231PHZrbkz */ |
| 123497 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 123498 | /* VFMSUBADD231PHZrk */ |
| 123499 | VR512, VR512, VK32WM, VR512, VR512, |
| 123500 | /* VFMSUBADD231PHZrkz */ |
| 123501 | VR512, VR512, VK32WM, VR512, VR512, |
| 123502 | /* VFMSUBADD231PSYm */ |
| 123503 | VR256, VR256, VR256, f256mem, |
| 123504 | /* VFMSUBADD231PSYr */ |
| 123505 | VR256, VR256, VR256, VR256, |
| 123506 | /* VFMSUBADD231PSZ128m */ |
| 123507 | VR128X, VR128X, VR128X, f128mem, |
| 123508 | /* VFMSUBADD231PSZ128mb */ |
| 123509 | VR128X, VR128X, VR128X, f32mem, |
| 123510 | /* VFMSUBADD231PSZ128mbk */ |
| 123511 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123512 | /* VFMSUBADD231PSZ128mbkz */ |
| 123513 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123514 | /* VFMSUBADD231PSZ128mk */ |
| 123515 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123516 | /* VFMSUBADD231PSZ128mkz */ |
| 123517 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123518 | /* VFMSUBADD231PSZ128r */ |
| 123519 | VR128X, VR128X, VR128X, VR128X, |
| 123520 | /* VFMSUBADD231PSZ128rk */ |
| 123521 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123522 | /* VFMSUBADD231PSZ128rkz */ |
| 123523 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123524 | /* VFMSUBADD231PSZ256m */ |
| 123525 | VR256X, VR256X, VR256X, f256mem, |
| 123526 | /* VFMSUBADD231PSZ256mb */ |
| 123527 | VR256X, VR256X, VR256X, f32mem, |
| 123528 | /* VFMSUBADD231PSZ256mbk */ |
| 123529 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123530 | /* VFMSUBADD231PSZ256mbkz */ |
| 123531 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123532 | /* VFMSUBADD231PSZ256mk */ |
| 123533 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123534 | /* VFMSUBADD231PSZ256mkz */ |
| 123535 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123536 | /* VFMSUBADD231PSZ256r */ |
| 123537 | VR256X, VR256X, VR256X, VR256X, |
| 123538 | /* VFMSUBADD231PSZ256rk */ |
| 123539 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123540 | /* VFMSUBADD231PSZ256rkz */ |
| 123541 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123542 | /* VFMSUBADD231PSZm */ |
| 123543 | VR512, VR512, VR512, f512mem, |
| 123544 | /* VFMSUBADD231PSZmb */ |
| 123545 | VR512, VR512, VR512, f32mem, |
| 123546 | /* VFMSUBADD231PSZmbk */ |
| 123547 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123548 | /* VFMSUBADD231PSZmbkz */ |
| 123549 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123550 | /* VFMSUBADD231PSZmk */ |
| 123551 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123552 | /* VFMSUBADD231PSZmkz */ |
| 123553 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123554 | /* VFMSUBADD231PSZr */ |
| 123555 | VR512, VR512, VR512, VR512, |
| 123556 | /* VFMSUBADD231PSZrb */ |
| 123557 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123558 | /* VFMSUBADD231PSZrbk */ |
| 123559 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123560 | /* VFMSUBADD231PSZrbkz */ |
| 123561 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123562 | /* VFMSUBADD231PSZrk */ |
| 123563 | VR512, VR512, VK16WM, VR512, VR512, |
| 123564 | /* VFMSUBADD231PSZrkz */ |
| 123565 | VR512, VR512, VK16WM, VR512, VR512, |
| 123566 | /* VFMSUBADD231PSm */ |
| 123567 | VR128, VR128, VR128, f128mem, |
| 123568 | /* VFMSUBADD231PSr */ |
| 123569 | VR128, VR128, VR128, VR128, |
| 123570 | /* VFMSUBADDPD4Ymr */ |
| 123571 | VR256, VR256, f256mem, VR256, |
| 123572 | /* VFMSUBADDPD4Yrm */ |
| 123573 | VR256, VR256, VR256, f256mem, |
| 123574 | /* VFMSUBADDPD4Yrr */ |
| 123575 | VR256, VR256, VR256, VR256, |
| 123576 | /* VFMSUBADDPD4Yrr_REV */ |
| 123577 | VR256, VR256, VR256, VR256, |
| 123578 | /* VFMSUBADDPD4mr */ |
| 123579 | VR128, VR128, f128mem, VR128, |
| 123580 | /* VFMSUBADDPD4rm */ |
| 123581 | VR128, VR128, VR128, f128mem, |
| 123582 | /* VFMSUBADDPD4rr */ |
| 123583 | VR128, VR128, VR128, VR128, |
| 123584 | /* VFMSUBADDPD4rr_REV */ |
| 123585 | VR128, VR128, VR128, VR128, |
| 123586 | /* VFMSUBADDPS4Ymr */ |
| 123587 | VR256, VR256, f256mem, VR256, |
| 123588 | /* VFMSUBADDPS4Yrm */ |
| 123589 | VR256, VR256, VR256, f256mem, |
| 123590 | /* VFMSUBADDPS4Yrr */ |
| 123591 | VR256, VR256, VR256, VR256, |
| 123592 | /* VFMSUBADDPS4Yrr_REV */ |
| 123593 | VR256, VR256, VR256, VR256, |
| 123594 | /* VFMSUBADDPS4mr */ |
| 123595 | VR128, VR128, f128mem, VR128, |
| 123596 | /* VFMSUBADDPS4rm */ |
| 123597 | VR128, VR128, VR128, f128mem, |
| 123598 | /* VFMSUBADDPS4rr */ |
| 123599 | VR128, VR128, VR128, VR128, |
| 123600 | /* VFMSUBADDPS4rr_REV */ |
| 123601 | VR128, VR128, VR128, VR128, |
| 123602 | /* VFMSUBPD4Ymr */ |
| 123603 | VR256, VR256, f256mem, VR256, |
| 123604 | /* VFMSUBPD4Yrm */ |
| 123605 | VR256, VR256, VR256, f256mem, |
| 123606 | /* VFMSUBPD4Yrr */ |
| 123607 | VR256, VR256, VR256, VR256, |
| 123608 | /* VFMSUBPD4Yrr_REV */ |
| 123609 | VR256, VR256, VR256, VR256, |
| 123610 | /* VFMSUBPD4mr */ |
| 123611 | VR128, VR128, f128mem, VR128, |
| 123612 | /* VFMSUBPD4rm */ |
| 123613 | VR128, VR128, VR128, f128mem, |
| 123614 | /* VFMSUBPD4rr */ |
| 123615 | VR128, VR128, VR128, VR128, |
| 123616 | /* VFMSUBPD4rr_REV */ |
| 123617 | VR128, VR128, VR128, VR128, |
| 123618 | /* VFMSUBPS4Ymr */ |
| 123619 | VR256, VR256, f256mem, VR256, |
| 123620 | /* VFMSUBPS4Yrm */ |
| 123621 | VR256, VR256, VR256, f256mem, |
| 123622 | /* VFMSUBPS4Yrr */ |
| 123623 | VR256, VR256, VR256, VR256, |
| 123624 | /* VFMSUBPS4Yrr_REV */ |
| 123625 | VR256, VR256, VR256, VR256, |
| 123626 | /* VFMSUBPS4mr */ |
| 123627 | VR128, VR128, f128mem, VR128, |
| 123628 | /* VFMSUBPS4rm */ |
| 123629 | VR128, VR128, VR128, f128mem, |
| 123630 | /* VFMSUBPS4rr */ |
| 123631 | VR128, VR128, VR128, VR128, |
| 123632 | /* VFMSUBPS4rr_REV */ |
| 123633 | VR128, VR128, VR128, VR128, |
| 123634 | /* VFMSUBSD4mr */ |
| 123635 | FR64, FR64, f64mem, FR64, |
| 123636 | /* VFMSUBSD4mr_Int */ |
| 123637 | VR128, VR128, sdmem, VR128, |
| 123638 | /* VFMSUBSD4rm */ |
| 123639 | FR64, FR64, FR64, f64mem, |
| 123640 | /* VFMSUBSD4rm_Int */ |
| 123641 | VR128, VR128, VR128, sdmem, |
| 123642 | /* VFMSUBSD4rr */ |
| 123643 | FR64, FR64, FR64, FR64, |
| 123644 | /* VFMSUBSD4rr_Int */ |
| 123645 | VR128, VR128, VR128, VR128, |
| 123646 | /* VFMSUBSD4rr_Int_REV */ |
| 123647 | VR128, VR128, VR128, VR128, |
| 123648 | /* VFMSUBSD4rr_REV */ |
| 123649 | FR64, FR64, FR64, FR64, |
| 123650 | /* VFMSUBSS4mr */ |
| 123651 | FR32, FR32, f32mem, FR32, |
| 123652 | /* VFMSUBSS4mr_Int */ |
| 123653 | VR128, VR128, ssmem, VR128, |
| 123654 | /* VFMSUBSS4rm */ |
| 123655 | FR32, FR32, FR32, f32mem, |
| 123656 | /* VFMSUBSS4rm_Int */ |
| 123657 | VR128, VR128, VR128, ssmem, |
| 123658 | /* VFMSUBSS4rr */ |
| 123659 | FR32, FR32, FR32, FR32, |
| 123660 | /* VFMSUBSS4rr_Int */ |
| 123661 | VR128, VR128, VR128, VR128, |
| 123662 | /* VFMSUBSS4rr_Int_REV */ |
| 123663 | VR128, VR128, VR128, VR128, |
| 123664 | /* VFMSUBSS4rr_REV */ |
| 123665 | FR32, FR32, FR32, FR32, |
| 123666 | /* VFMULCPHZ128rm */ |
| 123667 | VR128X, VR128X, f128mem, |
| 123668 | /* VFMULCPHZ128rmb */ |
| 123669 | VR128X, VR128X, f32mem, |
| 123670 | /* VFMULCPHZ128rmbk */ |
| 123671 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123672 | /* VFMULCPHZ128rmbkz */ |
| 123673 | VR128X, VK4WM, VR128X, f32mem, |
| 123674 | /* VFMULCPHZ128rmk */ |
| 123675 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123676 | /* VFMULCPHZ128rmkz */ |
| 123677 | VR128X, VK4WM, VR128X, f128mem, |
| 123678 | /* VFMULCPHZ128rr */ |
| 123679 | VR128X, VR128X, VR128X, |
| 123680 | /* VFMULCPHZ128rrk */ |
| 123681 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123682 | /* VFMULCPHZ128rrkz */ |
| 123683 | VR128X, VK4WM, VR128X, VR128X, |
| 123684 | /* VFMULCPHZ256rm */ |
| 123685 | VR256X, VR256X, f256mem, |
| 123686 | /* VFMULCPHZ256rmb */ |
| 123687 | VR256X, VR256X, f32mem, |
| 123688 | /* VFMULCPHZ256rmbk */ |
| 123689 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123690 | /* VFMULCPHZ256rmbkz */ |
| 123691 | VR256X, VK8WM, VR256X, f32mem, |
| 123692 | /* VFMULCPHZ256rmk */ |
| 123693 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123694 | /* VFMULCPHZ256rmkz */ |
| 123695 | VR256X, VK8WM, VR256X, f256mem, |
| 123696 | /* VFMULCPHZ256rr */ |
| 123697 | VR256X, VR256X, VR256X, |
| 123698 | /* VFMULCPHZ256rrk */ |
| 123699 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123700 | /* VFMULCPHZ256rrkz */ |
| 123701 | VR256X, VK8WM, VR256X, VR256X, |
| 123702 | /* VFMULCPHZrm */ |
| 123703 | VR512, VR512, f512mem, |
| 123704 | /* VFMULCPHZrmb */ |
| 123705 | VR512, VR512, f32mem, |
| 123706 | /* VFMULCPHZrmbk */ |
| 123707 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123708 | /* VFMULCPHZrmbkz */ |
| 123709 | VR512, VK16WM, VR512, f32mem, |
| 123710 | /* VFMULCPHZrmk */ |
| 123711 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123712 | /* VFMULCPHZrmkz */ |
| 123713 | VR512, VK16WM, VR512, f512mem, |
| 123714 | /* VFMULCPHZrr */ |
| 123715 | VR512, VR512, VR512, |
| 123716 | /* VFMULCPHZrrb */ |
| 123717 | VR512, VR512, VR512, AVX512RC, |
| 123718 | /* VFMULCPHZrrbk */ |
| 123719 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123720 | /* VFMULCPHZrrbkz */ |
| 123721 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123722 | /* VFMULCPHZrrk */ |
| 123723 | VR512, VR512, VK16WM, VR512, VR512, |
| 123724 | /* VFMULCPHZrrkz */ |
| 123725 | VR512, VK16WM, VR512, VR512, |
| 123726 | /* VFMULCSHZrm */ |
| 123727 | VR128X, VR128X, ssmem, |
| 123728 | /* VFMULCSHZrmk */ |
| 123729 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 123730 | /* VFMULCSHZrmkz */ |
| 123731 | VR128X, VK1WM, VR128X, ssmem, |
| 123732 | /* VFMULCSHZrr */ |
| 123733 | VR128X, VR128X, VR128X, |
| 123734 | /* VFMULCSHZrrb */ |
| 123735 | VR128X, VR128X, VR128X, AVX512RC, |
| 123736 | /* VFMULCSHZrrbk */ |
| 123737 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123738 | /* VFMULCSHZrrbkz */ |
| 123739 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123740 | /* VFMULCSHZrrk */ |
| 123741 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 123742 | /* VFMULCSHZrrkz */ |
| 123743 | VR128X, VK1WM, VR128X, VR128X, |
| 123744 | /* VFNMADD132PDYm */ |
| 123745 | VR256, VR256, VR256, f256mem, |
| 123746 | /* VFNMADD132PDYr */ |
| 123747 | VR256, VR256, VR256, VR256, |
| 123748 | /* VFNMADD132PDZ128m */ |
| 123749 | VR128X, VR128X, VR128X, f128mem, |
| 123750 | /* VFNMADD132PDZ128mb */ |
| 123751 | VR128X, VR128X, VR128X, f64mem, |
| 123752 | /* VFNMADD132PDZ128mbk */ |
| 123753 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 123754 | /* VFNMADD132PDZ128mbkz */ |
| 123755 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 123756 | /* VFNMADD132PDZ128mk */ |
| 123757 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 123758 | /* VFNMADD132PDZ128mkz */ |
| 123759 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 123760 | /* VFNMADD132PDZ128r */ |
| 123761 | VR128X, VR128X, VR128X, VR128X, |
| 123762 | /* VFNMADD132PDZ128rk */ |
| 123763 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 123764 | /* VFNMADD132PDZ128rkz */ |
| 123765 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 123766 | /* VFNMADD132PDZ256m */ |
| 123767 | VR256X, VR256X, VR256X, f256mem, |
| 123768 | /* VFNMADD132PDZ256mb */ |
| 123769 | VR256X, VR256X, VR256X, f64mem, |
| 123770 | /* VFNMADD132PDZ256mbk */ |
| 123771 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 123772 | /* VFNMADD132PDZ256mbkz */ |
| 123773 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 123774 | /* VFNMADD132PDZ256mk */ |
| 123775 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 123776 | /* VFNMADD132PDZ256mkz */ |
| 123777 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 123778 | /* VFNMADD132PDZ256r */ |
| 123779 | VR256X, VR256X, VR256X, VR256X, |
| 123780 | /* VFNMADD132PDZ256rk */ |
| 123781 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 123782 | /* VFNMADD132PDZ256rkz */ |
| 123783 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 123784 | /* VFNMADD132PDZm */ |
| 123785 | VR512, VR512, VR512, f512mem, |
| 123786 | /* VFNMADD132PDZmb */ |
| 123787 | VR512, VR512, VR512, f64mem, |
| 123788 | /* VFNMADD132PDZmbk */ |
| 123789 | VR512, VR512, VK8WM, VR512, f64mem, |
| 123790 | /* VFNMADD132PDZmbkz */ |
| 123791 | VR512, VR512, VK8WM, VR512, f64mem, |
| 123792 | /* VFNMADD132PDZmk */ |
| 123793 | VR512, VR512, VK8WM, VR512, f512mem, |
| 123794 | /* VFNMADD132PDZmkz */ |
| 123795 | VR512, VR512, VK8WM, VR512, f512mem, |
| 123796 | /* VFNMADD132PDZr */ |
| 123797 | VR512, VR512, VR512, VR512, |
| 123798 | /* VFNMADD132PDZrb */ |
| 123799 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123800 | /* VFNMADD132PDZrbk */ |
| 123801 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 123802 | /* VFNMADD132PDZrbkz */ |
| 123803 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 123804 | /* VFNMADD132PDZrk */ |
| 123805 | VR512, VR512, VK8WM, VR512, VR512, |
| 123806 | /* VFNMADD132PDZrkz */ |
| 123807 | VR512, VR512, VK8WM, VR512, VR512, |
| 123808 | /* VFNMADD132PDm */ |
| 123809 | VR128, VR128, VR128, f128mem, |
| 123810 | /* VFNMADD132PDr */ |
| 123811 | VR128, VR128, VR128, VR128, |
| 123812 | /* VFNMADD132PHZ128m */ |
| 123813 | VR128X, VR128X, VR128X, f128mem, |
| 123814 | /* VFNMADD132PHZ128mb */ |
| 123815 | VR128X, VR128X, VR128X, f16mem, |
| 123816 | /* VFNMADD132PHZ128mbk */ |
| 123817 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 123818 | /* VFNMADD132PHZ128mbkz */ |
| 123819 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 123820 | /* VFNMADD132PHZ128mk */ |
| 123821 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 123822 | /* VFNMADD132PHZ128mkz */ |
| 123823 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 123824 | /* VFNMADD132PHZ128r */ |
| 123825 | VR128X, VR128X, VR128X, VR128X, |
| 123826 | /* VFNMADD132PHZ128rk */ |
| 123827 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123828 | /* VFNMADD132PHZ128rkz */ |
| 123829 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 123830 | /* VFNMADD132PHZ256m */ |
| 123831 | VR256X, VR256X, VR256X, f256mem, |
| 123832 | /* VFNMADD132PHZ256mb */ |
| 123833 | VR256X, VR256X, VR256X, f16mem, |
| 123834 | /* VFNMADD132PHZ256mbk */ |
| 123835 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 123836 | /* VFNMADD132PHZ256mbkz */ |
| 123837 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 123838 | /* VFNMADD132PHZ256mk */ |
| 123839 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 123840 | /* VFNMADD132PHZ256mkz */ |
| 123841 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 123842 | /* VFNMADD132PHZ256r */ |
| 123843 | VR256X, VR256X, VR256X, VR256X, |
| 123844 | /* VFNMADD132PHZ256rk */ |
| 123845 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123846 | /* VFNMADD132PHZ256rkz */ |
| 123847 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 123848 | /* VFNMADD132PHZm */ |
| 123849 | VR512, VR512, VR512, f512mem, |
| 123850 | /* VFNMADD132PHZmb */ |
| 123851 | VR512, VR512, VR512, f16mem, |
| 123852 | /* VFNMADD132PHZmbk */ |
| 123853 | VR512, VR512, VK32WM, VR512, f16mem, |
| 123854 | /* VFNMADD132PHZmbkz */ |
| 123855 | VR512, VR512, VK32WM, VR512, f16mem, |
| 123856 | /* VFNMADD132PHZmk */ |
| 123857 | VR512, VR512, VK32WM, VR512, f512mem, |
| 123858 | /* VFNMADD132PHZmkz */ |
| 123859 | VR512, VR512, VK32WM, VR512, f512mem, |
| 123860 | /* VFNMADD132PHZr */ |
| 123861 | VR512, VR512, VR512, VR512, |
| 123862 | /* VFNMADD132PHZrb */ |
| 123863 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123864 | /* VFNMADD132PHZrbk */ |
| 123865 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 123866 | /* VFNMADD132PHZrbkz */ |
| 123867 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 123868 | /* VFNMADD132PHZrk */ |
| 123869 | VR512, VR512, VK32WM, VR512, VR512, |
| 123870 | /* VFNMADD132PHZrkz */ |
| 123871 | VR512, VR512, VK32WM, VR512, VR512, |
| 123872 | /* VFNMADD132PSYm */ |
| 123873 | VR256, VR256, VR256, f256mem, |
| 123874 | /* VFNMADD132PSYr */ |
| 123875 | VR256, VR256, VR256, VR256, |
| 123876 | /* VFNMADD132PSZ128m */ |
| 123877 | VR128X, VR128X, VR128X, f128mem, |
| 123878 | /* VFNMADD132PSZ128mb */ |
| 123879 | VR128X, VR128X, VR128X, f32mem, |
| 123880 | /* VFNMADD132PSZ128mbk */ |
| 123881 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123882 | /* VFNMADD132PSZ128mbkz */ |
| 123883 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 123884 | /* VFNMADD132PSZ128mk */ |
| 123885 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123886 | /* VFNMADD132PSZ128mkz */ |
| 123887 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 123888 | /* VFNMADD132PSZ128r */ |
| 123889 | VR128X, VR128X, VR128X, VR128X, |
| 123890 | /* VFNMADD132PSZ128rk */ |
| 123891 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123892 | /* VFNMADD132PSZ128rkz */ |
| 123893 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 123894 | /* VFNMADD132PSZ256m */ |
| 123895 | VR256X, VR256X, VR256X, f256mem, |
| 123896 | /* VFNMADD132PSZ256mb */ |
| 123897 | VR256X, VR256X, VR256X, f32mem, |
| 123898 | /* VFNMADD132PSZ256mbk */ |
| 123899 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123900 | /* VFNMADD132PSZ256mbkz */ |
| 123901 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 123902 | /* VFNMADD132PSZ256mk */ |
| 123903 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123904 | /* VFNMADD132PSZ256mkz */ |
| 123905 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 123906 | /* VFNMADD132PSZ256r */ |
| 123907 | VR256X, VR256X, VR256X, VR256X, |
| 123908 | /* VFNMADD132PSZ256rk */ |
| 123909 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123910 | /* VFNMADD132PSZ256rkz */ |
| 123911 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 123912 | /* VFNMADD132PSZm */ |
| 123913 | VR512, VR512, VR512, f512mem, |
| 123914 | /* VFNMADD132PSZmb */ |
| 123915 | VR512, VR512, VR512, f32mem, |
| 123916 | /* VFNMADD132PSZmbk */ |
| 123917 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123918 | /* VFNMADD132PSZmbkz */ |
| 123919 | VR512, VR512, VK16WM, VR512, f32mem, |
| 123920 | /* VFNMADD132PSZmk */ |
| 123921 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123922 | /* VFNMADD132PSZmkz */ |
| 123923 | VR512, VR512, VK16WM, VR512, f512mem, |
| 123924 | /* VFNMADD132PSZr */ |
| 123925 | VR512, VR512, VR512, VR512, |
| 123926 | /* VFNMADD132PSZrb */ |
| 123927 | VR512, VR512, VR512, VR512, AVX512RC, |
| 123928 | /* VFNMADD132PSZrbk */ |
| 123929 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123930 | /* VFNMADD132PSZrbkz */ |
| 123931 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 123932 | /* VFNMADD132PSZrk */ |
| 123933 | VR512, VR512, VK16WM, VR512, VR512, |
| 123934 | /* VFNMADD132PSZrkz */ |
| 123935 | VR512, VR512, VK16WM, VR512, VR512, |
| 123936 | /* VFNMADD132PSm */ |
| 123937 | VR128, VR128, VR128, f128mem, |
| 123938 | /* VFNMADD132PSr */ |
| 123939 | VR128, VR128, VR128, VR128, |
| 123940 | /* VFNMADD132SDZm */ |
| 123941 | FR64X, FR64X, FR64X, f64mem, |
| 123942 | /* VFNMADD132SDZm_Int */ |
| 123943 | VR128X, VR128X, VR128X, sdmem, |
| 123944 | /* VFNMADD132SDZm_Intk */ |
| 123945 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 123946 | /* VFNMADD132SDZm_Intkz */ |
| 123947 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 123948 | /* VFNMADD132SDZr */ |
| 123949 | FR64X, FR64X, FR64X, FR64X, |
| 123950 | /* VFNMADD132SDZr_Int */ |
| 123951 | VR128X, VR128X, VR128X, VR128X, |
| 123952 | /* VFNMADD132SDZr_Intk */ |
| 123953 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 123954 | /* VFNMADD132SDZr_Intkz */ |
| 123955 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 123956 | /* VFNMADD132SDZrb */ |
| 123957 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 123958 | /* VFNMADD132SDZrb_Int */ |
| 123959 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 123960 | /* VFNMADD132SDZrb_Intk */ |
| 123961 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123962 | /* VFNMADD132SDZrb_Intkz */ |
| 123963 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123964 | /* VFNMADD132SDm */ |
| 123965 | FR64, FR64, FR64, f64mem, |
| 123966 | /* VFNMADD132SDm_Int */ |
| 123967 | VR128, VR128, VR128, sdmem, |
| 123968 | /* VFNMADD132SDr */ |
| 123969 | FR64, FR64, FR64, FR64, |
| 123970 | /* VFNMADD132SDr_Int */ |
| 123971 | VR128, VR128, VR128, VR128, |
| 123972 | /* VFNMADD132SHZm */ |
| 123973 | FR16X, FR16X, FR16X, f16mem, |
| 123974 | /* VFNMADD132SHZm_Int */ |
| 123975 | VR128X, VR128X, VR128X, shmem, |
| 123976 | /* VFNMADD132SHZm_Intk */ |
| 123977 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 123978 | /* VFNMADD132SHZm_Intkz */ |
| 123979 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 123980 | /* VFNMADD132SHZr */ |
| 123981 | FR16X, FR16X, FR16X, FR16X, |
| 123982 | /* VFNMADD132SHZr_Int */ |
| 123983 | VR128X, VR128X, VR128X, VR128X, |
| 123984 | /* VFNMADD132SHZr_Intk */ |
| 123985 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 123986 | /* VFNMADD132SHZr_Intkz */ |
| 123987 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 123988 | /* VFNMADD132SHZrb */ |
| 123989 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 123990 | /* VFNMADD132SHZrb_Int */ |
| 123991 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 123992 | /* VFNMADD132SHZrb_Intk */ |
| 123993 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123994 | /* VFNMADD132SHZrb_Intkz */ |
| 123995 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 123996 | /* VFNMADD132SSZm */ |
| 123997 | FR32X, FR32X, FR32X, f32mem, |
| 123998 | /* VFNMADD132SSZm_Int */ |
| 123999 | VR128X, VR128X, VR128X, ssmem, |
| 124000 | /* VFNMADD132SSZm_Intk */ |
| 124001 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 124002 | /* VFNMADD132SSZm_Intkz */ |
| 124003 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 124004 | /* VFNMADD132SSZr */ |
| 124005 | FR32X, FR32X, FR32X, FR32X, |
| 124006 | /* VFNMADD132SSZr_Int */ |
| 124007 | VR128X, VR128X, VR128X, VR128X, |
| 124008 | /* VFNMADD132SSZr_Intk */ |
| 124009 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124010 | /* VFNMADD132SSZr_Intkz */ |
| 124011 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124012 | /* VFNMADD132SSZrb */ |
| 124013 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 124014 | /* VFNMADD132SSZrb_Int */ |
| 124015 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 124016 | /* VFNMADD132SSZrb_Intk */ |
| 124017 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124018 | /* VFNMADD132SSZrb_Intkz */ |
| 124019 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124020 | /* VFNMADD132SSm */ |
| 124021 | FR32, FR32, FR32, f32mem, |
| 124022 | /* VFNMADD132SSm_Int */ |
| 124023 | VR128, VR128, VR128, ssmem, |
| 124024 | /* VFNMADD132SSr */ |
| 124025 | FR32, FR32, FR32, FR32, |
| 124026 | /* VFNMADD132SSr_Int */ |
| 124027 | VR128, VR128, VR128, VR128, |
| 124028 | /* VFNMADD213PDYm */ |
| 124029 | VR256, VR256, VR256, f256mem, |
| 124030 | /* VFNMADD213PDYr */ |
| 124031 | VR256, VR256, VR256, VR256, |
| 124032 | /* VFNMADD213PDZ128m */ |
| 124033 | VR128X, VR128X, VR128X, f128mem, |
| 124034 | /* VFNMADD213PDZ128mb */ |
| 124035 | VR128X, VR128X, VR128X, f64mem, |
| 124036 | /* VFNMADD213PDZ128mbk */ |
| 124037 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 124038 | /* VFNMADD213PDZ128mbkz */ |
| 124039 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 124040 | /* VFNMADD213PDZ128mk */ |
| 124041 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 124042 | /* VFNMADD213PDZ128mkz */ |
| 124043 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 124044 | /* VFNMADD213PDZ128r */ |
| 124045 | VR128X, VR128X, VR128X, VR128X, |
| 124046 | /* VFNMADD213PDZ128rk */ |
| 124047 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124048 | /* VFNMADD213PDZ128rkz */ |
| 124049 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124050 | /* VFNMADD213PDZ256m */ |
| 124051 | VR256X, VR256X, VR256X, f256mem, |
| 124052 | /* VFNMADD213PDZ256mb */ |
| 124053 | VR256X, VR256X, VR256X, f64mem, |
| 124054 | /* VFNMADD213PDZ256mbk */ |
| 124055 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 124056 | /* VFNMADD213PDZ256mbkz */ |
| 124057 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 124058 | /* VFNMADD213PDZ256mk */ |
| 124059 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 124060 | /* VFNMADD213PDZ256mkz */ |
| 124061 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 124062 | /* VFNMADD213PDZ256r */ |
| 124063 | VR256X, VR256X, VR256X, VR256X, |
| 124064 | /* VFNMADD213PDZ256rk */ |
| 124065 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124066 | /* VFNMADD213PDZ256rkz */ |
| 124067 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124068 | /* VFNMADD213PDZm */ |
| 124069 | VR512, VR512, VR512, f512mem, |
| 124070 | /* VFNMADD213PDZmb */ |
| 124071 | VR512, VR512, VR512, f64mem, |
| 124072 | /* VFNMADD213PDZmbk */ |
| 124073 | VR512, VR512, VK8WM, VR512, f64mem, |
| 124074 | /* VFNMADD213PDZmbkz */ |
| 124075 | VR512, VR512, VK8WM, VR512, f64mem, |
| 124076 | /* VFNMADD213PDZmk */ |
| 124077 | VR512, VR512, VK8WM, VR512, f512mem, |
| 124078 | /* VFNMADD213PDZmkz */ |
| 124079 | VR512, VR512, VK8WM, VR512, f512mem, |
| 124080 | /* VFNMADD213PDZr */ |
| 124081 | VR512, VR512, VR512, VR512, |
| 124082 | /* VFNMADD213PDZrb */ |
| 124083 | VR512, VR512, VR512, VR512, AVX512RC, |
| 124084 | /* VFNMADD213PDZrbk */ |
| 124085 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 124086 | /* VFNMADD213PDZrbkz */ |
| 124087 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 124088 | /* VFNMADD213PDZrk */ |
| 124089 | VR512, VR512, VK8WM, VR512, VR512, |
| 124090 | /* VFNMADD213PDZrkz */ |
| 124091 | VR512, VR512, VK8WM, VR512, VR512, |
| 124092 | /* VFNMADD213PDm */ |
| 124093 | VR128, VR128, VR128, f128mem, |
| 124094 | /* VFNMADD213PDr */ |
| 124095 | VR128, VR128, VR128, VR128, |
| 124096 | /* VFNMADD213PHZ128m */ |
| 124097 | VR128X, VR128X, VR128X, f128mem, |
| 124098 | /* VFNMADD213PHZ128mb */ |
| 124099 | VR128X, VR128X, VR128X, f16mem, |
| 124100 | /* VFNMADD213PHZ128mbk */ |
| 124101 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 124102 | /* VFNMADD213PHZ128mbkz */ |
| 124103 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 124104 | /* VFNMADD213PHZ128mk */ |
| 124105 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 124106 | /* VFNMADD213PHZ128mkz */ |
| 124107 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 124108 | /* VFNMADD213PHZ128r */ |
| 124109 | VR128X, VR128X, VR128X, VR128X, |
| 124110 | /* VFNMADD213PHZ128rk */ |
| 124111 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124112 | /* VFNMADD213PHZ128rkz */ |
| 124113 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124114 | /* VFNMADD213PHZ256m */ |
| 124115 | VR256X, VR256X, VR256X, f256mem, |
| 124116 | /* VFNMADD213PHZ256mb */ |
| 124117 | VR256X, VR256X, VR256X, f16mem, |
| 124118 | /* VFNMADD213PHZ256mbk */ |
| 124119 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 124120 | /* VFNMADD213PHZ256mbkz */ |
| 124121 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 124122 | /* VFNMADD213PHZ256mk */ |
| 124123 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 124124 | /* VFNMADD213PHZ256mkz */ |
| 124125 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 124126 | /* VFNMADD213PHZ256r */ |
| 124127 | VR256X, VR256X, VR256X, VR256X, |
| 124128 | /* VFNMADD213PHZ256rk */ |
| 124129 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124130 | /* VFNMADD213PHZ256rkz */ |
| 124131 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124132 | /* VFNMADD213PHZm */ |
| 124133 | VR512, VR512, VR512, f512mem, |
| 124134 | /* VFNMADD213PHZmb */ |
| 124135 | VR512, VR512, VR512, f16mem, |
| 124136 | /* VFNMADD213PHZmbk */ |
| 124137 | VR512, VR512, VK32WM, VR512, f16mem, |
| 124138 | /* VFNMADD213PHZmbkz */ |
| 124139 | VR512, VR512, VK32WM, VR512, f16mem, |
| 124140 | /* VFNMADD213PHZmk */ |
| 124141 | VR512, VR512, VK32WM, VR512, f512mem, |
| 124142 | /* VFNMADD213PHZmkz */ |
| 124143 | VR512, VR512, VK32WM, VR512, f512mem, |
| 124144 | /* VFNMADD213PHZr */ |
| 124145 | VR512, VR512, VR512, VR512, |
| 124146 | /* VFNMADD213PHZrb */ |
| 124147 | VR512, VR512, VR512, VR512, AVX512RC, |
| 124148 | /* VFNMADD213PHZrbk */ |
| 124149 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 124150 | /* VFNMADD213PHZrbkz */ |
| 124151 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 124152 | /* VFNMADD213PHZrk */ |
| 124153 | VR512, VR512, VK32WM, VR512, VR512, |
| 124154 | /* VFNMADD213PHZrkz */ |
| 124155 | VR512, VR512, VK32WM, VR512, VR512, |
| 124156 | /* VFNMADD213PSYm */ |
| 124157 | VR256, VR256, VR256, f256mem, |
| 124158 | /* VFNMADD213PSYr */ |
| 124159 | VR256, VR256, VR256, VR256, |
| 124160 | /* VFNMADD213PSZ128m */ |
| 124161 | VR128X, VR128X, VR128X, f128mem, |
| 124162 | /* VFNMADD213PSZ128mb */ |
| 124163 | VR128X, VR128X, VR128X, f32mem, |
| 124164 | /* VFNMADD213PSZ128mbk */ |
| 124165 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 124166 | /* VFNMADD213PSZ128mbkz */ |
| 124167 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 124168 | /* VFNMADD213PSZ128mk */ |
| 124169 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 124170 | /* VFNMADD213PSZ128mkz */ |
| 124171 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 124172 | /* VFNMADD213PSZ128r */ |
| 124173 | VR128X, VR128X, VR128X, VR128X, |
| 124174 | /* VFNMADD213PSZ128rk */ |
| 124175 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 124176 | /* VFNMADD213PSZ128rkz */ |
| 124177 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 124178 | /* VFNMADD213PSZ256m */ |
| 124179 | VR256X, VR256X, VR256X, f256mem, |
| 124180 | /* VFNMADD213PSZ256mb */ |
| 124181 | VR256X, VR256X, VR256X, f32mem, |
| 124182 | /* VFNMADD213PSZ256mbk */ |
| 124183 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 124184 | /* VFNMADD213PSZ256mbkz */ |
| 124185 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 124186 | /* VFNMADD213PSZ256mk */ |
| 124187 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 124188 | /* VFNMADD213PSZ256mkz */ |
| 124189 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 124190 | /* VFNMADD213PSZ256r */ |
| 124191 | VR256X, VR256X, VR256X, VR256X, |
| 124192 | /* VFNMADD213PSZ256rk */ |
| 124193 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 124194 | /* VFNMADD213PSZ256rkz */ |
| 124195 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 124196 | /* VFNMADD213PSZm */ |
| 124197 | VR512, VR512, VR512, f512mem, |
| 124198 | /* VFNMADD213PSZmb */ |
| 124199 | VR512, VR512, VR512, f32mem, |
| 124200 | /* VFNMADD213PSZmbk */ |
| 124201 | VR512, VR512, VK16WM, VR512, f32mem, |
| 124202 | /* VFNMADD213PSZmbkz */ |
| 124203 | VR512, VR512, VK16WM, VR512, f32mem, |
| 124204 | /* VFNMADD213PSZmk */ |
| 124205 | VR512, VR512, VK16WM, VR512, f512mem, |
| 124206 | /* VFNMADD213PSZmkz */ |
| 124207 | VR512, VR512, VK16WM, VR512, f512mem, |
| 124208 | /* VFNMADD213PSZr */ |
| 124209 | VR512, VR512, VR512, VR512, |
| 124210 | /* VFNMADD213PSZrb */ |
| 124211 | VR512, VR512, VR512, VR512, AVX512RC, |
| 124212 | /* VFNMADD213PSZrbk */ |
| 124213 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 124214 | /* VFNMADD213PSZrbkz */ |
| 124215 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 124216 | /* VFNMADD213PSZrk */ |
| 124217 | VR512, VR512, VK16WM, VR512, VR512, |
| 124218 | /* VFNMADD213PSZrkz */ |
| 124219 | VR512, VR512, VK16WM, VR512, VR512, |
| 124220 | /* VFNMADD213PSm */ |
| 124221 | VR128, VR128, VR128, f128mem, |
| 124222 | /* VFNMADD213PSr */ |
| 124223 | VR128, VR128, VR128, VR128, |
| 124224 | /* VFNMADD213SDZm */ |
| 124225 | FR64X, FR64X, FR64X, f64mem, |
| 124226 | /* VFNMADD213SDZm_Int */ |
| 124227 | VR128X, VR128X, VR128X, sdmem, |
| 124228 | /* VFNMADD213SDZm_Intk */ |
| 124229 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 124230 | /* VFNMADD213SDZm_Intkz */ |
| 124231 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 124232 | /* VFNMADD213SDZr */ |
| 124233 | FR64X, FR64X, FR64X, FR64X, |
| 124234 | /* VFNMADD213SDZr_Int */ |
| 124235 | VR128X, VR128X, VR128X, VR128X, |
| 124236 | /* VFNMADD213SDZr_Intk */ |
| 124237 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124238 | /* VFNMADD213SDZr_Intkz */ |
| 124239 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124240 | /* VFNMADD213SDZrb */ |
| 124241 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 124242 | /* VFNMADD213SDZrb_Int */ |
| 124243 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 124244 | /* VFNMADD213SDZrb_Intk */ |
| 124245 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124246 | /* VFNMADD213SDZrb_Intkz */ |
| 124247 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124248 | /* VFNMADD213SDm */ |
| 124249 | FR64, FR64, FR64, f64mem, |
| 124250 | /* VFNMADD213SDm_Int */ |
| 124251 | VR128, VR128, VR128, sdmem, |
| 124252 | /* VFNMADD213SDr */ |
| 124253 | FR64, FR64, FR64, FR64, |
| 124254 | /* VFNMADD213SDr_Int */ |
| 124255 | VR128, VR128, VR128, VR128, |
| 124256 | /* VFNMADD213SHZm */ |
| 124257 | FR16X, FR16X, FR16X, f16mem, |
| 124258 | /* VFNMADD213SHZm_Int */ |
| 124259 | VR128X, VR128X, VR128X, shmem, |
| 124260 | /* VFNMADD213SHZm_Intk */ |
| 124261 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 124262 | /* VFNMADD213SHZm_Intkz */ |
| 124263 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 124264 | /* VFNMADD213SHZr */ |
| 124265 | FR16X, FR16X, FR16X, FR16X, |
| 124266 | /* VFNMADD213SHZr_Int */ |
| 124267 | VR128X, VR128X, VR128X, VR128X, |
| 124268 | /* VFNMADD213SHZr_Intk */ |
| 124269 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124270 | /* VFNMADD213SHZr_Intkz */ |
| 124271 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124272 | /* VFNMADD213SHZrb */ |
| 124273 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 124274 | /* VFNMADD213SHZrb_Int */ |
| 124275 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 124276 | /* VFNMADD213SHZrb_Intk */ |
| 124277 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124278 | /* VFNMADD213SHZrb_Intkz */ |
| 124279 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124280 | /* VFNMADD213SSZm */ |
| 124281 | FR32X, FR32X, FR32X, f32mem, |
| 124282 | /* VFNMADD213SSZm_Int */ |
| 124283 | VR128X, VR128X, VR128X, ssmem, |
| 124284 | /* VFNMADD213SSZm_Intk */ |
| 124285 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 124286 | /* VFNMADD213SSZm_Intkz */ |
| 124287 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 124288 | /* VFNMADD213SSZr */ |
| 124289 | FR32X, FR32X, FR32X, FR32X, |
| 124290 | /* VFNMADD213SSZr_Int */ |
| 124291 | VR128X, VR128X, VR128X, VR128X, |
| 124292 | /* VFNMADD213SSZr_Intk */ |
| 124293 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124294 | /* VFNMADD213SSZr_Intkz */ |
| 124295 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124296 | /* VFNMADD213SSZrb */ |
| 124297 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 124298 | /* VFNMADD213SSZrb_Int */ |
| 124299 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 124300 | /* VFNMADD213SSZrb_Intk */ |
| 124301 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124302 | /* VFNMADD213SSZrb_Intkz */ |
| 124303 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124304 | /* VFNMADD213SSm */ |
| 124305 | FR32, FR32, FR32, f32mem, |
| 124306 | /* VFNMADD213SSm_Int */ |
| 124307 | VR128, VR128, VR128, ssmem, |
| 124308 | /* VFNMADD213SSr */ |
| 124309 | FR32, FR32, FR32, FR32, |
| 124310 | /* VFNMADD213SSr_Int */ |
| 124311 | VR128, VR128, VR128, VR128, |
| 124312 | /* VFNMADD231PDYm */ |
| 124313 | VR256, VR256, VR256, f256mem, |
| 124314 | /* VFNMADD231PDYr */ |
| 124315 | VR256, VR256, VR256, VR256, |
| 124316 | /* VFNMADD231PDZ128m */ |
| 124317 | VR128X, VR128X, VR128X, f128mem, |
| 124318 | /* VFNMADD231PDZ128mb */ |
| 124319 | VR128X, VR128X, VR128X, f64mem, |
| 124320 | /* VFNMADD231PDZ128mbk */ |
| 124321 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 124322 | /* VFNMADD231PDZ128mbkz */ |
| 124323 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 124324 | /* VFNMADD231PDZ128mk */ |
| 124325 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 124326 | /* VFNMADD231PDZ128mkz */ |
| 124327 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 124328 | /* VFNMADD231PDZ128r */ |
| 124329 | VR128X, VR128X, VR128X, VR128X, |
| 124330 | /* VFNMADD231PDZ128rk */ |
| 124331 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124332 | /* VFNMADD231PDZ128rkz */ |
| 124333 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124334 | /* VFNMADD231PDZ256m */ |
| 124335 | VR256X, VR256X, VR256X, f256mem, |
| 124336 | /* VFNMADD231PDZ256mb */ |
| 124337 | VR256X, VR256X, VR256X, f64mem, |
| 124338 | /* VFNMADD231PDZ256mbk */ |
| 124339 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 124340 | /* VFNMADD231PDZ256mbkz */ |
| 124341 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 124342 | /* VFNMADD231PDZ256mk */ |
| 124343 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 124344 | /* VFNMADD231PDZ256mkz */ |
| 124345 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 124346 | /* VFNMADD231PDZ256r */ |
| 124347 | VR256X, VR256X, VR256X, VR256X, |
| 124348 | /* VFNMADD231PDZ256rk */ |
| 124349 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124350 | /* VFNMADD231PDZ256rkz */ |
| 124351 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124352 | /* VFNMADD231PDZm */ |
| 124353 | VR512, VR512, VR512, f512mem, |
| 124354 | /* VFNMADD231PDZmb */ |
| 124355 | VR512, VR512, VR512, f64mem, |
| 124356 | /* VFNMADD231PDZmbk */ |
| 124357 | VR512, VR512, VK8WM, VR512, f64mem, |
| 124358 | /* VFNMADD231PDZmbkz */ |
| 124359 | VR512, VR512, VK8WM, VR512, f64mem, |
| 124360 | /* VFNMADD231PDZmk */ |
| 124361 | VR512, VR512, VK8WM, VR512, f512mem, |
| 124362 | /* VFNMADD231PDZmkz */ |
| 124363 | VR512, VR512, VK8WM, VR512, f512mem, |
| 124364 | /* VFNMADD231PDZr */ |
| 124365 | VR512, VR512, VR512, VR512, |
| 124366 | /* VFNMADD231PDZrb */ |
| 124367 | VR512, VR512, VR512, VR512, AVX512RC, |
| 124368 | /* VFNMADD231PDZrbk */ |
| 124369 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 124370 | /* VFNMADD231PDZrbkz */ |
| 124371 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 124372 | /* VFNMADD231PDZrk */ |
| 124373 | VR512, VR512, VK8WM, VR512, VR512, |
| 124374 | /* VFNMADD231PDZrkz */ |
| 124375 | VR512, VR512, VK8WM, VR512, VR512, |
| 124376 | /* VFNMADD231PDm */ |
| 124377 | VR128, VR128, VR128, f128mem, |
| 124378 | /* VFNMADD231PDr */ |
| 124379 | VR128, VR128, VR128, VR128, |
| 124380 | /* VFNMADD231PHZ128m */ |
| 124381 | VR128X, VR128X, VR128X, f128mem, |
| 124382 | /* VFNMADD231PHZ128mb */ |
| 124383 | VR128X, VR128X, VR128X, f16mem, |
| 124384 | /* VFNMADD231PHZ128mbk */ |
| 124385 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 124386 | /* VFNMADD231PHZ128mbkz */ |
| 124387 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 124388 | /* VFNMADD231PHZ128mk */ |
| 124389 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 124390 | /* VFNMADD231PHZ128mkz */ |
| 124391 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 124392 | /* VFNMADD231PHZ128r */ |
| 124393 | VR128X, VR128X, VR128X, VR128X, |
| 124394 | /* VFNMADD231PHZ128rk */ |
| 124395 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124396 | /* VFNMADD231PHZ128rkz */ |
| 124397 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124398 | /* VFNMADD231PHZ256m */ |
| 124399 | VR256X, VR256X, VR256X, f256mem, |
| 124400 | /* VFNMADD231PHZ256mb */ |
| 124401 | VR256X, VR256X, VR256X, f16mem, |
| 124402 | /* VFNMADD231PHZ256mbk */ |
| 124403 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 124404 | /* VFNMADD231PHZ256mbkz */ |
| 124405 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 124406 | /* VFNMADD231PHZ256mk */ |
| 124407 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 124408 | /* VFNMADD231PHZ256mkz */ |
| 124409 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 124410 | /* VFNMADD231PHZ256r */ |
| 124411 | VR256X, VR256X, VR256X, VR256X, |
| 124412 | /* VFNMADD231PHZ256rk */ |
| 124413 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124414 | /* VFNMADD231PHZ256rkz */ |
| 124415 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124416 | /* VFNMADD231PHZm */ |
| 124417 | VR512, VR512, VR512, f512mem, |
| 124418 | /* VFNMADD231PHZmb */ |
| 124419 | VR512, VR512, VR512, f16mem, |
| 124420 | /* VFNMADD231PHZmbk */ |
| 124421 | VR512, VR512, VK32WM, VR512, f16mem, |
| 124422 | /* VFNMADD231PHZmbkz */ |
| 124423 | VR512, VR512, VK32WM, VR512, f16mem, |
| 124424 | /* VFNMADD231PHZmk */ |
| 124425 | VR512, VR512, VK32WM, VR512, f512mem, |
| 124426 | /* VFNMADD231PHZmkz */ |
| 124427 | VR512, VR512, VK32WM, VR512, f512mem, |
| 124428 | /* VFNMADD231PHZr */ |
| 124429 | VR512, VR512, VR512, VR512, |
| 124430 | /* VFNMADD231PHZrb */ |
| 124431 | VR512, VR512, VR512, VR512, AVX512RC, |
| 124432 | /* VFNMADD231PHZrbk */ |
| 124433 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 124434 | /* VFNMADD231PHZrbkz */ |
| 124435 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 124436 | /* VFNMADD231PHZrk */ |
| 124437 | VR512, VR512, VK32WM, VR512, VR512, |
| 124438 | /* VFNMADD231PHZrkz */ |
| 124439 | VR512, VR512, VK32WM, VR512, VR512, |
| 124440 | /* VFNMADD231PSYm */ |
| 124441 | VR256, VR256, VR256, f256mem, |
| 124442 | /* VFNMADD231PSYr */ |
| 124443 | VR256, VR256, VR256, VR256, |
| 124444 | /* VFNMADD231PSZ128m */ |
| 124445 | VR128X, VR128X, VR128X, f128mem, |
| 124446 | /* VFNMADD231PSZ128mb */ |
| 124447 | VR128X, VR128X, VR128X, f32mem, |
| 124448 | /* VFNMADD231PSZ128mbk */ |
| 124449 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 124450 | /* VFNMADD231PSZ128mbkz */ |
| 124451 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 124452 | /* VFNMADD231PSZ128mk */ |
| 124453 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 124454 | /* VFNMADD231PSZ128mkz */ |
| 124455 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 124456 | /* VFNMADD231PSZ128r */ |
| 124457 | VR128X, VR128X, VR128X, VR128X, |
| 124458 | /* VFNMADD231PSZ128rk */ |
| 124459 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 124460 | /* VFNMADD231PSZ128rkz */ |
| 124461 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 124462 | /* VFNMADD231PSZ256m */ |
| 124463 | VR256X, VR256X, VR256X, f256mem, |
| 124464 | /* VFNMADD231PSZ256mb */ |
| 124465 | VR256X, VR256X, VR256X, f32mem, |
| 124466 | /* VFNMADD231PSZ256mbk */ |
| 124467 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 124468 | /* VFNMADD231PSZ256mbkz */ |
| 124469 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 124470 | /* VFNMADD231PSZ256mk */ |
| 124471 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 124472 | /* VFNMADD231PSZ256mkz */ |
| 124473 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 124474 | /* VFNMADD231PSZ256r */ |
| 124475 | VR256X, VR256X, VR256X, VR256X, |
| 124476 | /* VFNMADD231PSZ256rk */ |
| 124477 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 124478 | /* VFNMADD231PSZ256rkz */ |
| 124479 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 124480 | /* VFNMADD231PSZm */ |
| 124481 | VR512, VR512, VR512, f512mem, |
| 124482 | /* VFNMADD231PSZmb */ |
| 124483 | VR512, VR512, VR512, f32mem, |
| 124484 | /* VFNMADD231PSZmbk */ |
| 124485 | VR512, VR512, VK16WM, VR512, f32mem, |
| 124486 | /* VFNMADD231PSZmbkz */ |
| 124487 | VR512, VR512, VK16WM, VR512, f32mem, |
| 124488 | /* VFNMADD231PSZmk */ |
| 124489 | VR512, VR512, VK16WM, VR512, f512mem, |
| 124490 | /* VFNMADD231PSZmkz */ |
| 124491 | VR512, VR512, VK16WM, VR512, f512mem, |
| 124492 | /* VFNMADD231PSZr */ |
| 124493 | VR512, VR512, VR512, VR512, |
| 124494 | /* VFNMADD231PSZrb */ |
| 124495 | VR512, VR512, VR512, VR512, AVX512RC, |
| 124496 | /* VFNMADD231PSZrbk */ |
| 124497 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 124498 | /* VFNMADD231PSZrbkz */ |
| 124499 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 124500 | /* VFNMADD231PSZrk */ |
| 124501 | VR512, VR512, VK16WM, VR512, VR512, |
| 124502 | /* VFNMADD231PSZrkz */ |
| 124503 | VR512, VR512, VK16WM, VR512, VR512, |
| 124504 | /* VFNMADD231PSm */ |
| 124505 | VR128, VR128, VR128, f128mem, |
| 124506 | /* VFNMADD231PSr */ |
| 124507 | VR128, VR128, VR128, VR128, |
| 124508 | /* VFNMADD231SDZm */ |
| 124509 | FR64X, FR64X, FR64X, f64mem, |
| 124510 | /* VFNMADD231SDZm_Int */ |
| 124511 | VR128X, VR128X, VR128X, sdmem, |
| 124512 | /* VFNMADD231SDZm_Intk */ |
| 124513 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 124514 | /* VFNMADD231SDZm_Intkz */ |
| 124515 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 124516 | /* VFNMADD231SDZr */ |
| 124517 | FR64X, FR64X, FR64X, FR64X, |
| 124518 | /* VFNMADD231SDZr_Int */ |
| 124519 | VR128X, VR128X, VR128X, VR128X, |
| 124520 | /* VFNMADD231SDZr_Intk */ |
| 124521 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124522 | /* VFNMADD231SDZr_Intkz */ |
| 124523 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124524 | /* VFNMADD231SDZrb */ |
| 124525 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 124526 | /* VFNMADD231SDZrb_Int */ |
| 124527 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 124528 | /* VFNMADD231SDZrb_Intk */ |
| 124529 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124530 | /* VFNMADD231SDZrb_Intkz */ |
| 124531 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124532 | /* VFNMADD231SDm */ |
| 124533 | FR64, FR64, FR64, f64mem, |
| 124534 | /* VFNMADD231SDm_Int */ |
| 124535 | VR128, VR128, VR128, sdmem, |
| 124536 | /* VFNMADD231SDr */ |
| 124537 | FR64, FR64, FR64, FR64, |
| 124538 | /* VFNMADD231SDr_Int */ |
| 124539 | VR128, VR128, VR128, VR128, |
| 124540 | /* VFNMADD231SHZm */ |
| 124541 | FR16X, FR16X, FR16X, f16mem, |
| 124542 | /* VFNMADD231SHZm_Int */ |
| 124543 | VR128X, VR128X, VR128X, shmem, |
| 124544 | /* VFNMADD231SHZm_Intk */ |
| 124545 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 124546 | /* VFNMADD231SHZm_Intkz */ |
| 124547 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 124548 | /* VFNMADD231SHZr */ |
| 124549 | FR16X, FR16X, FR16X, FR16X, |
| 124550 | /* VFNMADD231SHZr_Int */ |
| 124551 | VR128X, VR128X, VR128X, VR128X, |
| 124552 | /* VFNMADD231SHZr_Intk */ |
| 124553 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124554 | /* VFNMADD231SHZr_Intkz */ |
| 124555 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124556 | /* VFNMADD231SHZrb */ |
| 124557 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 124558 | /* VFNMADD231SHZrb_Int */ |
| 124559 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 124560 | /* VFNMADD231SHZrb_Intk */ |
| 124561 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124562 | /* VFNMADD231SHZrb_Intkz */ |
| 124563 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124564 | /* VFNMADD231SSZm */ |
| 124565 | FR32X, FR32X, FR32X, f32mem, |
| 124566 | /* VFNMADD231SSZm_Int */ |
| 124567 | VR128X, VR128X, VR128X, ssmem, |
| 124568 | /* VFNMADD231SSZm_Intk */ |
| 124569 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 124570 | /* VFNMADD231SSZm_Intkz */ |
| 124571 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 124572 | /* VFNMADD231SSZr */ |
| 124573 | FR32X, FR32X, FR32X, FR32X, |
| 124574 | /* VFNMADD231SSZr_Int */ |
| 124575 | VR128X, VR128X, VR128X, VR128X, |
| 124576 | /* VFNMADD231SSZr_Intk */ |
| 124577 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124578 | /* VFNMADD231SSZr_Intkz */ |
| 124579 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124580 | /* VFNMADD231SSZrb */ |
| 124581 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 124582 | /* VFNMADD231SSZrb_Int */ |
| 124583 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 124584 | /* VFNMADD231SSZrb_Intk */ |
| 124585 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124586 | /* VFNMADD231SSZrb_Intkz */ |
| 124587 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124588 | /* VFNMADD231SSm */ |
| 124589 | FR32, FR32, FR32, f32mem, |
| 124590 | /* VFNMADD231SSm_Int */ |
| 124591 | VR128, VR128, VR128, ssmem, |
| 124592 | /* VFNMADD231SSr */ |
| 124593 | FR32, FR32, FR32, FR32, |
| 124594 | /* VFNMADD231SSr_Int */ |
| 124595 | VR128, VR128, VR128, VR128, |
| 124596 | /* VFNMADDPD4Ymr */ |
| 124597 | VR256, VR256, f256mem, VR256, |
| 124598 | /* VFNMADDPD4Yrm */ |
| 124599 | VR256, VR256, VR256, f256mem, |
| 124600 | /* VFNMADDPD4Yrr */ |
| 124601 | VR256, VR256, VR256, VR256, |
| 124602 | /* VFNMADDPD4Yrr_REV */ |
| 124603 | VR256, VR256, VR256, VR256, |
| 124604 | /* VFNMADDPD4mr */ |
| 124605 | VR128, VR128, f128mem, VR128, |
| 124606 | /* VFNMADDPD4rm */ |
| 124607 | VR128, VR128, VR128, f128mem, |
| 124608 | /* VFNMADDPD4rr */ |
| 124609 | VR128, VR128, VR128, VR128, |
| 124610 | /* VFNMADDPD4rr_REV */ |
| 124611 | VR128, VR128, VR128, VR128, |
| 124612 | /* VFNMADDPS4Ymr */ |
| 124613 | VR256, VR256, f256mem, VR256, |
| 124614 | /* VFNMADDPS4Yrm */ |
| 124615 | VR256, VR256, VR256, f256mem, |
| 124616 | /* VFNMADDPS4Yrr */ |
| 124617 | VR256, VR256, VR256, VR256, |
| 124618 | /* VFNMADDPS4Yrr_REV */ |
| 124619 | VR256, VR256, VR256, VR256, |
| 124620 | /* VFNMADDPS4mr */ |
| 124621 | VR128, VR128, f128mem, VR128, |
| 124622 | /* VFNMADDPS4rm */ |
| 124623 | VR128, VR128, VR128, f128mem, |
| 124624 | /* VFNMADDPS4rr */ |
| 124625 | VR128, VR128, VR128, VR128, |
| 124626 | /* VFNMADDPS4rr_REV */ |
| 124627 | VR128, VR128, VR128, VR128, |
| 124628 | /* VFNMADDSD4mr */ |
| 124629 | FR64, FR64, f64mem, FR64, |
| 124630 | /* VFNMADDSD4mr_Int */ |
| 124631 | VR128, VR128, sdmem, VR128, |
| 124632 | /* VFNMADDSD4rm */ |
| 124633 | FR64, FR64, FR64, f64mem, |
| 124634 | /* VFNMADDSD4rm_Int */ |
| 124635 | VR128, VR128, VR128, sdmem, |
| 124636 | /* VFNMADDSD4rr */ |
| 124637 | FR64, FR64, FR64, FR64, |
| 124638 | /* VFNMADDSD4rr_Int */ |
| 124639 | VR128, VR128, VR128, VR128, |
| 124640 | /* VFNMADDSD4rr_Int_REV */ |
| 124641 | VR128, VR128, VR128, VR128, |
| 124642 | /* VFNMADDSD4rr_REV */ |
| 124643 | FR64, FR64, FR64, FR64, |
| 124644 | /* VFNMADDSS4mr */ |
| 124645 | FR32, FR32, f32mem, FR32, |
| 124646 | /* VFNMADDSS4mr_Int */ |
| 124647 | VR128, VR128, ssmem, VR128, |
| 124648 | /* VFNMADDSS4rm */ |
| 124649 | FR32, FR32, FR32, f32mem, |
| 124650 | /* VFNMADDSS4rm_Int */ |
| 124651 | VR128, VR128, VR128, ssmem, |
| 124652 | /* VFNMADDSS4rr */ |
| 124653 | FR32, FR32, FR32, FR32, |
| 124654 | /* VFNMADDSS4rr_Int */ |
| 124655 | VR128, VR128, VR128, VR128, |
| 124656 | /* VFNMADDSS4rr_Int_REV */ |
| 124657 | VR128, VR128, VR128, VR128, |
| 124658 | /* VFNMADDSS4rr_REV */ |
| 124659 | FR32, FR32, FR32, FR32, |
| 124660 | /* VFNMSUB132PDYm */ |
| 124661 | VR256, VR256, VR256, f256mem, |
| 124662 | /* VFNMSUB132PDYr */ |
| 124663 | VR256, VR256, VR256, VR256, |
| 124664 | /* VFNMSUB132PDZ128m */ |
| 124665 | VR128X, VR128X, VR128X, f128mem, |
| 124666 | /* VFNMSUB132PDZ128mb */ |
| 124667 | VR128X, VR128X, VR128X, f64mem, |
| 124668 | /* VFNMSUB132PDZ128mbk */ |
| 124669 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 124670 | /* VFNMSUB132PDZ128mbkz */ |
| 124671 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 124672 | /* VFNMSUB132PDZ128mk */ |
| 124673 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 124674 | /* VFNMSUB132PDZ128mkz */ |
| 124675 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 124676 | /* VFNMSUB132PDZ128r */ |
| 124677 | VR128X, VR128X, VR128X, VR128X, |
| 124678 | /* VFNMSUB132PDZ128rk */ |
| 124679 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124680 | /* VFNMSUB132PDZ128rkz */ |
| 124681 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124682 | /* VFNMSUB132PDZ256m */ |
| 124683 | VR256X, VR256X, VR256X, f256mem, |
| 124684 | /* VFNMSUB132PDZ256mb */ |
| 124685 | VR256X, VR256X, VR256X, f64mem, |
| 124686 | /* VFNMSUB132PDZ256mbk */ |
| 124687 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 124688 | /* VFNMSUB132PDZ256mbkz */ |
| 124689 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 124690 | /* VFNMSUB132PDZ256mk */ |
| 124691 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 124692 | /* VFNMSUB132PDZ256mkz */ |
| 124693 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 124694 | /* VFNMSUB132PDZ256r */ |
| 124695 | VR256X, VR256X, VR256X, VR256X, |
| 124696 | /* VFNMSUB132PDZ256rk */ |
| 124697 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124698 | /* VFNMSUB132PDZ256rkz */ |
| 124699 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124700 | /* VFNMSUB132PDZm */ |
| 124701 | VR512, VR512, VR512, f512mem, |
| 124702 | /* VFNMSUB132PDZmb */ |
| 124703 | VR512, VR512, VR512, f64mem, |
| 124704 | /* VFNMSUB132PDZmbk */ |
| 124705 | VR512, VR512, VK8WM, VR512, f64mem, |
| 124706 | /* VFNMSUB132PDZmbkz */ |
| 124707 | VR512, VR512, VK8WM, VR512, f64mem, |
| 124708 | /* VFNMSUB132PDZmk */ |
| 124709 | VR512, VR512, VK8WM, VR512, f512mem, |
| 124710 | /* VFNMSUB132PDZmkz */ |
| 124711 | VR512, VR512, VK8WM, VR512, f512mem, |
| 124712 | /* VFNMSUB132PDZr */ |
| 124713 | VR512, VR512, VR512, VR512, |
| 124714 | /* VFNMSUB132PDZrb */ |
| 124715 | VR512, VR512, VR512, VR512, AVX512RC, |
| 124716 | /* VFNMSUB132PDZrbk */ |
| 124717 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 124718 | /* VFNMSUB132PDZrbkz */ |
| 124719 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 124720 | /* VFNMSUB132PDZrk */ |
| 124721 | VR512, VR512, VK8WM, VR512, VR512, |
| 124722 | /* VFNMSUB132PDZrkz */ |
| 124723 | VR512, VR512, VK8WM, VR512, VR512, |
| 124724 | /* VFNMSUB132PDm */ |
| 124725 | VR128, VR128, VR128, f128mem, |
| 124726 | /* VFNMSUB132PDr */ |
| 124727 | VR128, VR128, VR128, VR128, |
| 124728 | /* VFNMSUB132PHZ128m */ |
| 124729 | VR128X, VR128X, VR128X, f128mem, |
| 124730 | /* VFNMSUB132PHZ128mb */ |
| 124731 | VR128X, VR128X, VR128X, f16mem, |
| 124732 | /* VFNMSUB132PHZ128mbk */ |
| 124733 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 124734 | /* VFNMSUB132PHZ128mbkz */ |
| 124735 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 124736 | /* VFNMSUB132PHZ128mk */ |
| 124737 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 124738 | /* VFNMSUB132PHZ128mkz */ |
| 124739 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 124740 | /* VFNMSUB132PHZ128r */ |
| 124741 | VR128X, VR128X, VR128X, VR128X, |
| 124742 | /* VFNMSUB132PHZ128rk */ |
| 124743 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124744 | /* VFNMSUB132PHZ128rkz */ |
| 124745 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 124746 | /* VFNMSUB132PHZ256m */ |
| 124747 | VR256X, VR256X, VR256X, f256mem, |
| 124748 | /* VFNMSUB132PHZ256mb */ |
| 124749 | VR256X, VR256X, VR256X, f16mem, |
| 124750 | /* VFNMSUB132PHZ256mbk */ |
| 124751 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 124752 | /* VFNMSUB132PHZ256mbkz */ |
| 124753 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 124754 | /* VFNMSUB132PHZ256mk */ |
| 124755 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 124756 | /* VFNMSUB132PHZ256mkz */ |
| 124757 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 124758 | /* VFNMSUB132PHZ256r */ |
| 124759 | VR256X, VR256X, VR256X, VR256X, |
| 124760 | /* VFNMSUB132PHZ256rk */ |
| 124761 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124762 | /* VFNMSUB132PHZ256rkz */ |
| 124763 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 124764 | /* VFNMSUB132PHZm */ |
| 124765 | VR512, VR512, VR512, f512mem, |
| 124766 | /* VFNMSUB132PHZmb */ |
| 124767 | VR512, VR512, VR512, f16mem, |
| 124768 | /* VFNMSUB132PHZmbk */ |
| 124769 | VR512, VR512, VK32WM, VR512, f16mem, |
| 124770 | /* VFNMSUB132PHZmbkz */ |
| 124771 | VR512, VR512, VK32WM, VR512, f16mem, |
| 124772 | /* VFNMSUB132PHZmk */ |
| 124773 | VR512, VR512, VK32WM, VR512, f512mem, |
| 124774 | /* VFNMSUB132PHZmkz */ |
| 124775 | VR512, VR512, VK32WM, VR512, f512mem, |
| 124776 | /* VFNMSUB132PHZr */ |
| 124777 | VR512, VR512, VR512, VR512, |
| 124778 | /* VFNMSUB132PHZrb */ |
| 124779 | VR512, VR512, VR512, VR512, AVX512RC, |
| 124780 | /* VFNMSUB132PHZrbk */ |
| 124781 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 124782 | /* VFNMSUB132PHZrbkz */ |
| 124783 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 124784 | /* VFNMSUB132PHZrk */ |
| 124785 | VR512, VR512, VK32WM, VR512, VR512, |
| 124786 | /* VFNMSUB132PHZrkz */ |
| 124787 | VR512, VR512, VK32WM, VR512, VR512, |
| 124788 | /* VFNMSUB132PSYm */ |
| 124789 | VR256, VR256, VR256, f256mem, |
| 124790 | /* VFNMSUB132PSYr */ |
| 124791 | VR256, VR256, VR256, VR256, |
| 124792 | /* VFNMSUB132PSZ128m */ |
| 124793 | VR128X, VR128X, VR128X, f128mem, |
| 124794 | /* VFNMSUB132PSZ128mb */ |
| 124795 | VR128X, VR128X, VR128X, f32mem, |
| 124796 | /* VFNMSUB132PSZ128mbk */ |
| 124797 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 124798 | /* VFNMSUB132PSZ128mbkz */ |
| 124799 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 124800 | /* VFNMSUB132PSZ128mk */ |
| 124801 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 124802 | /* VFNMSUB132PSZ128mkz */ |
| 124803 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 124804 | /* VFNMSUB132PSZ128r */ |
| 124805 | VR128X, VR128X, VR128X, VR128X, |
| 124806 | /* VFNMSUB132PSZ128rk */ |
| 124807 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 124808 | /* VFNMSUB132PSZ128rkz */ |
| 124809 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 124810 | /* VFNMSUB132PSZ256m */ |
| 124811 | VR256X, VR256X, VR256X, f256mem, |
| 124812 | /* VFNMSUB132PSZ256mb */ |
| 124813 | VR256X, VR256X, VR256X, f32mem, |
| 124814 | /* VFNMSUB132PSZ256mbk */ |
| 124815 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 124816 | /* VFNMSUB132PSZ256mbkz */ |
| 124817 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 124818 | /* VFNMSUB132PSZ256mk */ |
| 124819 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 124820 | /* VFNMSUB132PSZ256mkz */ |
| 124821 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 124822 | /* VFNMSUB132PSZ256r */ |
| 124823 | VR256X, VR256X, VR256X, VR256X, |
| 124824 | /* VFNMSUB132PSZ256rk */ |
| 124825 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 124826 | /* VFNMSUB132PSZ256rkz */ |
| 124827 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 124828 | /* VFNMSUB132PSZm */ |
| 124829 | VR512, VR512, VR512, f512mem, |
| 124830 | /* VFNMSUB132PSZmb */ |
| 124831 | VR512, VR512, VR512, f32mem, |
| 124832 | /* VFNMSUB132PSZmbk */ |
| 124833 | VR512, VR512, VK16WM, VR512, f32mem, |
| 124834 | /* VFNMSUB132PSZmbkz */ |
| 124835 | VR512, VR512, VK16WM, VR512, f32mem, |
| 124836 | /* VFNMSUB132PSZmk */ |
| 124837 | VR512, VR512, VK16WM, VR512, f512mem, |
| 124838 | /* VFNMSUB132PSZmkz */ |
| 124839 | VR512, VR512, VK16WM, VR512, f512mem, |
| 124840 | /* VFNMSUB132PSZr */ |
| 124841 | VR512, VR512, VR512, VR512, |
| 124842 | /* VFNMSUB132PSZrb */ |
| 124843 | VR512, VR512, VR512, VR512, AVX512RC, |
| 124844 | /* VFNMSUB132PSZrbk */ |
| 124845 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 124846 | /* VFNMSUB132PSZrbkz */ |
| 124847 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 124848 | /* VFNMSUB132PSZrk */ |
| 124849 | VR512, VR512, VK16WM, VR512, VR512, |
| 124850 | /* VFNMSUB132PSZrkz */ |
| 124851 | VR512, VR512, VK16WM, VR512, VR512, |
| 124852 | /* VFNMSUB132PSm */ |
| 124853 | VR128, VR128, VR128, f128mem, |
| 124854 | /* VFNMSUB132PSr */ |
| 124855 | VR128, VR128, VR128, VR128, |
| 124856 | /* VFNMSUB132SDZm */ |
| 124857 | FR64X, FR64X, FR64X, f64mem, |
| 124858 | /* VFNMSUB132SDZm_Int */ |
| 124859 | VR128X, VR128X, VR128X, sdmem, |
| 124860 | /* VFNMSUB132SDZm_Intk */ |
| 124861 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 124862 | /* VFNMSUB132SDZm_Intkz */ |
| 124863 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 124864 | /* VFNMSUB132SDZr */ |
| 124865 | FR64X, FR64X, FR64X, FR64X, |
| 124866 | /* VFNMSUB132SDZr_Int */ |
| 124867 | VR128X, VR128X, VR128X, VR128X, |
| 124868 | /* VFNMSUB132SDZr_Intk */ |
| 124869 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124870 | /* VFNMSUB132SDZr_Intkz */ |
| 124871 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124872 | /* VFNMSUB132SDZrb */ |
| 124873 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 124874 | /* VFNMSUB132SDZrb_Int */ |
| 124875 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 124876 | /* VFNMSUB132SDZrb_Intk */ |
| 124877 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124878 | /* VFNMSUB132SDZrb_Intkz */ |
| 124879 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124880 | /* VFNMSUB132SDm */ |
| 124881 | FR64, FR64, FR64, f64mem, |
| 124882 | /* VFNMSUB132SDm_Int */ |
| 124883 | VR128, VR128, VR128, sdmem, |
| 124884 | /* VFNMSUB132SDr */ |
| 124885 | FR64, FR64, FR64, FR64, |
| 124886 | /* VFNMSUB132SDr_Int */ |
| 124887 | VR128, VR128, VR128, VR128, |
| 124888 | /* VFNMSUB132SHZm */ |
| 124889 | FR16X, FR16X, FR16X, f16mem, |
| 124890 | /* VFNMSUB132SHZm_Int */ |
| 124891 | VR128X, VR128X, VR128X, shmem, |
| 124892 | /* VFNMSUB132SHZm_Intk */ |
| 124893 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 124894 | /* VFNMSUB132SHZm_Intkz */ |
| 124895 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 124896 | /* VFNMSUB132SHZr */ |
| 124897 | FR16X, FR16X, FR16X, FR16X, |
| 124898 | /* VFNMSUB132SHZr_Int */ |
| 124899 | VR128X, VR128X, VR128X, VR128X, |
| 124900 | /* VFNMSUB132SHZr_Intk */ |
| 124901 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124902 | /* VFNMSUB132SHZr_Intkz */ |
| 124903 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124904 | /* VFNMSUB132SHZrb */ |
| 124905 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 124906 | /* VFNMSUB132SHZrb_Int */ |
| 124907 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 124908 | /* VFNMSUB132SHZrb_Intk */ |
| 124909 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124910 | /* VFNMSUB132SHZrb_Intkz */ |
| 124911 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124912 | /* VFNMSUB132SSZm */ |
| 124913 | FR32X, FR32X, FR32X, f32mem, |
| 124914 | /* VFNMSUB132SSZm_Int */ |
| 124915 | VR128X, VR128X, VR128X, ssmem, |
| 124916 | /* VFNMSUB132SSZm_Intk */ |
| 124917 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 124918 | /* VFNMSUB132SSZm_Intkz */ |
| 124919 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 124920 | /* VFNMSUB132SSZr */ |
| 124921 | FR32X, FR32X, FR32X, FR32X, |
| 124922 | /* VFNMSUB132SSZr_Int */ |
| 124923 | VR128X, VR128X, VR128X, VR128X, |
| 124924 | /* VFNMSUB132SSZr_Intk */ |
| 124925 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124926 | /* VFNMSUB132SSZr_Intkz */ |
| 124927 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 124928 | /* VFNMSUB132SSZrb */ |
| 124929 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 124930 | /* VFNMSUB132SSZrb_Int */ |
| 124931 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 124932 | /* VFNMSUB132SSZrb_Intk */ |
| 124933 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124934 | /* VFNMSUB132SSZrb_Intkz */ |
| 124935 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 124936 | /* VFNMSUB132SSm */ |
| 124937 | FR32, FR32, FR32, f32mem, |
| 124938 | /* VFNMSUB132SSm_Int */ |
| 124939 | VR128, VR128, VR128, ssmem, |
| 124940 | /* VFNMSUB132SSr */ |
| 124941 | FR32, FR32, FR32, FR32, |
| 124942 | /* VFNMSUB132SSr_Int */ |
| 124943 | VR128, VR128, VR128, VR128, |
| 124944 | /* VFNMSUB213PDYm */ |
| 124945 | VR256, VR256, VR256, f256mem, |
| 124946 | /* VFNMSUB213PDYr */ |
| 124947 | VR256, VR256, VR256, VR256, |
| 124948 | /* VFNMSUB213PDZ128m */ |
| 124949 | VR128X, VR128X, VR128X, f128mem, |
| 124950 | /* VFNMSUB213PDZ128mb */ |
| 124951 | VR128X, VR128X, VR128X, f64mem, |
| 124952 | /* VFNMSUB213PDZ128mbk */ |
| 124953 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 124954 | /* VFNMSUB213PDZ128mbkz */ |
| 124955 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 124956 | /* VFNMSUB213PDZ128mk */ |
| 124957 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 124958 | /* VFNMSUB213PDZ128mkz */ |
| 124959 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 124960 | /* VFNMSUB213PDZ128r */ |
| 124961 | VR128X, VR128X, VR128X, VR128X, |
| 124962 | /* VFNMSUB213PDZ128rk */ |
| 124963 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124964 | /* VFNMSUB213PDZ128rkz */ |
| 124965 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 124966 | /* VFNMSUB213PDZ256m */ |
| 124967 | VR256X, VR256X, VR256X, f256mem, |
| 124968 | /* VFNMSUB213PDZ256mb */ |
| 124969 | VR256X, VR256X, VR256X, f64mem, |
| 124970 | /* VFNMSUB213PDZ256mbk */ |
| 124971 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 124972 | /* VFNMSUB213PDZ256mbkz */ |
| 124973 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 124974 | /* VFNMSUB213PDZ256mk */ |
| 124975 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 124976 | /* VFNMSUB213PDZ256mkz */ |
| 124977 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 124978 | /* VFNMSUB213PDZ256r */ |
| 124979 | VR256X, VR256X, VR256X, VR256X, |
| 124980 | /* VFNMSUB213PDZ256rk */ |
| 124981 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124982 | /* VFNMSUB213PDZ256rkz */ |
| 124983 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 124984 | /* VFNMSUB213PDZm */ |
| 124985 | VR512, VR512, VR512, f512mem, |
| 124986 | /* VFNMSUB213PDZmb */ |
| 124987 | VR512, VR512, VR512, f64mem, |
| 124988 | /* VFNMSUB213PDZmbk */ |
| 124989 | VR512, VR512, VK8WM, VR512, f64mem, |
| 124990 | /* VFNMSUB213PDZmbkz */ |
| 124991 | VR512, VR512, VK8WM, VR512, f64mem, |
| 124992 | /* VFNMSUB213PDZmk */ |
| 124993 | VR512, VR512, VK8WM, VR512, f512mem, |
| 124994 | /* VFNMSUB213PDZmkz */ |
| 124995 | VR512, VR512, VK8WM, VR512, f512mem, |
| 124996 | /* VFNMSUB213PDZr */ |
| 124997 | VR512, VR512, VR512, VR512, |
| 124998 | /* VFNMSUB213PDZrb */ |
| 124999 | VR512, VR512, VR512, VR512, AVX512RC, |
| 125000 | /* VFNMSUB213PDZrbk */ |
| 125001 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 125002 | /* VFNMSUB213PDZrbkz */ |
| 125003 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 125004 | /* VFNMSUB213PDZrk */ |
| 125005 | VR512, VR512, VK8WM, VR512, VR512, |
| 125006 | /* VFNMSUB213PDZrkz */ |
| 125007 | VR512, VR512, VK8WM, VR512, VR512, |
| 125008 | /* VFNMSUB213PDm */ |
| 125009 | VR128, VR128, VR128, f128mem, |
| 125010 | /* VFNMSUB213PDr */ |
| 125011 | VR128, VR128, VR128, VR128, |
| 125012 | /* VFNMSUB213PHZ128m */ |
| 125013 | VR128X, VR128X, VR128X, f128mem, |
| 125014 | /* VFNMSUB213PHZ128mb */ |
| 125015 | VR128X, VR128X, VR128X, f16mem, |
| 125016 | /* VFNMSUB213PHZ128mbk */ |
| 125017 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 125018 | /* VFNMSUB213PHZ128mbkz */ |
| 125019 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 125020 | /* VFNMSUB213PHZ128mk */ |
| 125021 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 125022 | /* VFNMSUB213PHZ128mkz */ |
| 125023 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 125024 | /* VFNMSUB213PHZ128r */ |
| 125025 | VR128X, VR128X, VR128X, VR128X, |
| 125026 | /* VFNMSUB213PHZ128rk */ |
| 125027 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 125028 | /* VFNMSUB213PHZ128rkz */ |
| 125029 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 125030 | /* VFNMSUB213PHZ256m */ |
| 125031 | VR256X, VR256X, VR256X, f256mem, |
| 125032 | /* VFNMSUB213PHZ256mb */ |
| 125033 | VR256X, VR256X, VR256X, f16mem, |
| 125034 | /* VFNMSUB213PHZ256mbk */ |
| 125035 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 125036 | /* VFNMSUB213PHZ256mbkz */ |
| 125037 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 125038 | /* VFNMSUB213PHZ256mk */ |
| 125039 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 125040 | /* VFNMSUB213PHZ256mkz */ |
| 125041 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 125042 | /* VFNMSUB213PHZ256r */ |
| 125043 | VR256X, VR256X, VR256X, VR256X, |
| 125044 | /* VFNMSUB213PHZ256rk */ |
| 125045 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 125046 | /* VFNMSUB213PHZ256rkz */ |
| 125047 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 125048 | /* VFNMSUB213PHZm */ |
| 125049 | VR512, VR512, VR512, f512mem, |
| 125050 | /* VFNMSUB213PHZmb */ |
| 125051 | VR512, VR512, VR512, f16mem, |
| 125052 | /* VFNMSUB213PHZmbk */ |
| 125053 | VR512, VR512, VK32WM, VR512, f16mem, |
| 125054 | /* VFNMSUB213PHZmbkz */ |
| 125055 | VR512, VR512, VK32WM, VR512, f16mem, |
| 125056 | /* VFNMSUB213PHZmk */ |
| 125057 | VR512, VR512, VK32WM, VR512, f512mem, |
| 125058 | /* VFNMSUB213PHZmkz */ |
| 125059 | VR512, VR512, VK32WM, VR512, f512mem, |
| 125060 | /* VFNMSUB213PHZr */ |
| 125061 | VR512, VR512, VR512, VR512, |
| 125062 | /* VFNMSUB213PHZrb */ |
| 125063 | VR512, VR512, VR512, VR512, AVX512RC, |
| 125064 | /* VFNMSUB213PHZrbk */ |
| 125065 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 125066 | /* VFNMSUB213PHZrbkz */ |
| 125067 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 125068 | /* VFNMSUB213PHZrk */ |
| 125069 | VR512, VR512, VK32WM, VR512, VR512, |
| 125070 | /* VFNMSUB213PHZrkz */ |
| 125071 | VR512, VR512, VK32WM, VR512, VR512, |
| 125072 | /* VFNMSUB213PSYm */ |
| 125073 | VR256, VR256, VR256, f256mem, |
| 125074 | /* VFNMSUB213PSYr */ |
| 125075 | VR256, VR256, VR256, VR256, |
| 125076 | /* VFNMSUB213PSZ128m */ |
| 125077 | VR128X, VR128X, VR128X, f128mem, |
| 125078 | /* VFNMSUB213PSZ128mb */ |
| 125079 | VR128X, VR128X, VR128X, f32mem, |
| 125080 | /* VFNMSUB213PSZ128mbk */ |
| 125081 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 125082 | /* VFNMSUB213PSZ128mbkz */ |
| 125083 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 125084 | /* VFNMSUB213PSZ128mk */ |
| 125085 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 125086 | /* VFNMSUB213PSZ128mkz */ |
| 125087 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 125088 | /* VFNMSUB213PSZ128r */ |
| 125089 | VR128X, VR128X, VR128X, VR128X, |
| 125090 | /* VFNMSUB213PSZ128rk */ |
| 125091 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 125092 | /* VFNMSUB213PSZ128rkz */ |
| 125093 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 125094 | /* VFNMSUB213PSZ256m */ |
| 125095 | VR256X, VR256X, VR256X, f256mem, |
| 125096 | /* VFNMSUB213PSZ256mb */ |
| 125097 | VR256X, VR256X, VR256X, f32mem, |
| 125098 | /* VFNMSUB213PSZ256mbk */ |
| 125099 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 125100 | /* VFNMSUB213PSZ256mbkz */ |
| 125101 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 125102 | /* VFNMSUB213PSZ256mk */ |
| 125103 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 125104 | /* VFNMSUB213PSZ256mkz */ |
| 125105 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 125106 | /* VFNMSUB213PSZ256r */ |
| 125107 | VR256X, VR256X, VR256X, VR256X, |
| 125108 | /* VFNMSUB213PSZ256rk */ |
| 125109 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 125110 | /* VFNMSUB213PSZ256rkz */ |
| 125111 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 125112 | /* VFNMSUB213PSZm */ |
| 125113 | VR512, VR512, VR512, f512mem, |
| 125114 | /* VFNMSUB213PSZmb */ |
| 125115 | VR512, VR512, VR512, f32mem, |
| 125116 | /* VFNMSUB213PSZmbk */ |
| 125117 | VR512, VR512, VK16WM, VR512, f32mem, |
| 125118 | /* VFNMSUB213PSZmbkz */ |
| 125119 | VR512, VR512, VK16WM, VR512, f32mem, |
| 125120 | /* VFNMSUB213PSZmk */ |
| 125121 | VR512, VR512, VK16WM, VR512, f512mem, |
| 125122 | /* VFNMSUB213PSZmkz */ |
| 125123 | VR512, VR512, VK16WM, VR512, f512mem, |
| 125124 | /* VFNMSUB213PSZr */ |
| 125125 | VR512, VR512, VR512, VR512, |
| 125126 | /* VFNMSUB213PSZrb */ |
| 125127 | VR512, VR512, VR512, VR512, AVX512RC, |
| 125128 | /* VFNMSUB213PSZrbk */ |
| 125129 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 125130 | /* VFNMSUB213PSZrbkz */ |
| 125131 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 125132 | /* VFNMSUB213PSZrk */ |
| 125133 | VR512, VR512, VK16WM, VR512, VR512, |
| 125134 | /* VFNMSUB213PSZrkz */ |
| 125135 | VR512, VR512, VK16WM, VR512, VR512, |
| 125136 | /* VFNMSUB213PSm */ |
| 125137 | VR128, VR128, VR128, f128mem, |
| 125138 | /* VFNMSUB213PSr */ |
| 125139 | VR128, VR128, VR128, VR128, |
| 125140 | /* VFNMSUB213SDZm */ |
| 125141 | FR64X, FR64X, FR64X, f64mem, |
| 125142 | /* VFNMSUB213SDZm_Int */ |
| 125143 | VR128X, VR128X, VR128X, sdmem, |
| 125144 | /* VFNMSUB213SDZm_Intk */ |
| 125145 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 125146 | /* VFNMSUB213SDZm_Intkz */ |
| 125147 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 125148 | /* VFNMSUB213SDZr */ |
| 125149 | FR64X, FR64X, FR64X, FR64X, |
| 125150 | /* VFNMSUB213SDZr_Int */ |
| 125151 | VR128X, VR128X, VR128X, VR128X, |
| 125152 | /* VFNMSUB213SDZr_Intk */ |
| 125153 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125154 | /* VFNMSUB213SDZr_Intkz */ |
| 125155 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125156 | /* VFNMSUB213SDZrb */ |
| 125157 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 125158 | /* VFNMSUB213SDZrb_Int */ |
| 125159 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 125160 | /* VFNMSUB213SDZrb_Intk */ |
| 125161 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125162 | /* VFNMSUB213SDZrb_Intkz */ |
| 125163 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125164 | /* VFNMSUB213SDm */ |
| 125165 | FR64, FR64, FR64, f64mem, |
| 125166 | /* VFNMSUB213SDm_Int */ |
| 125167 | VR128, VR128, VR128, sdmem, |
| 125168 | /* VFNMSUB213SDr */ |
| 125169 | FR64, FR64, FR64, FR64, |
| 125170 | /* VFNMSUB213SDr_Int */ |
| 125171 | VR128, VR128, VR128, VR128, |
| 125172 | /* VFNMSUB213SHZm */ |
| 125173 | FR16X, FR16X, FR16X, f16mem, |
| 125174 | /* VFNMSUB213SHZm_Int */ |
| 125175 | VR128X, VR128X, VR128X, shmem, |
| 125176 | /* VFNMSUB213SHZm_Intk */ |
| 125177 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 125178 | /* VFNMSUB213SHZm_Intkz */ |
| 125179 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 125180 | /* VFNMSUB213SHZr */ |
| 125181 | FR16X, FR16X, FR16X, FR16X, |
| 125182 | /* VFNMSUB213SHZr_Int */ |
| 125183 | VR128X, VR128X, VR128X, VR128X, |
| 125184 | /* VFNMSUB213SHZr_Intk */ |
| 125185 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125186 | /* VFNMSUB213SHZr_Intkz */ |
| 125187 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125188 | /* VFNMSUB213SHZrb */ |
| 125189 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 125190 | /* VFNMSUB213SHZrb_Int */ |
| 125191 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 125192 | /* VFNMSUB213SHZrb_Intk */ |
| 125193 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125194 | /* VFNMSUB213SHZrb_Intkz */ |
| 125195 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125196 | /* VFNMSUB213SSZm */ |
| 125197 | FR32X, FR32X, FR32X, f32mem, |
| 125198 | /* VFNMSUB213SSZm_Int */ |
| 125199 | VR128X, VR128X, VR128X, ssmem, |
| 125200 | /* VFNMSUB213SSZm_Intk */ |
| 125201 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 125202 | /* VFNMSUB213SSZm_Intkz */ |
| 125203 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 125204 | /* VFNMSUB213SSZr */ |
| 125205 | FR32X, FR32X, FR32X, FR32X, |
| 125206 | /* VFNMSUB213SSZr_Int */ |
| 125207 | VR128X, VR128X, VR128X, VR128X, |
| 125208 | /* VFNMSUB213SSZr_Intk */ |
| 125209 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125210 | /* VFNMSUB213SSZr_Intkz */ |
| 125211 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125212 | /* VFNMSUB213SSZrb */ |
| 125213 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 125214 | /* VFNMSUB213SSZrb_Int */ |
| 125215 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 125216 | /* VFNMSUB213SSZrb_Intk */ |
| 125217 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125218 | /* VFNMSUB213SSZrb_Intkz */ |
| 125219 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125220 | /* VFNMSUB213SSm */ |
| 125221 | FR32, FR32, FR32, f32mem, |
| 125222 | /* VFNMSUB213SSm_Int */ |
| 125223 | VR128, VR128, VR128, ssmem, |
| 125224 | /* VFNMSUB213SSr */ |
| 125225 | FR32, FR32, FR32, FR32, |
| 125226 | /* VFNMSUB213SSr_Int */ |
| 125227 | VR128, VR128, VR128, VR128, |
| 125228 | /* VFNMSUB231PDYm */ |
| 125229 | VR256, VR256, VR256, f256mem, |
| 125230 | /* VFNMSUB231PDYr */ |
| 125231 | VR256, VR256, VR256, VR256, |
| 125232 | /* VFNMSUB231PDZ128m */ |
| 125233 | VR128X, VR128X, VR128X, f128mem, |
| 125234 | /* VFNMSUB231PDZ128mb */ |
| 125235 | VR128X, VR128X, VR128X, f64mem, |
| 125236 | /* VFNMSUB231PDZ128mbk */ |
| 125237 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 125238 | /* VFNMSUB231PDZ128mbkz */ |
| 125239 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 125240 | /* VFNMSUB231PDZ128mk */ |
| 125241 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 125242 | /* VFNMSUB231PDZ128mkz */ |
| 125243 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 125244 | /* VFNMSUB231PDZ128r */ |
| 125245 | VR128X, VR128X, VR128X, VR128X, |
| 125246 | /* VFNMSUB231PDZ128rk */ |
| 125247 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 125248 | /* VFNMSUB231PDZ128rkz */ |
| 125249 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 125250 | /* VFNMSUB231PDZ256m */ |
| 125251 | VR256X, VR256X, VR256X, f256mem, |
| 125252 | /* VFNMSUB231PDZ256mb */ |
| 125253 | VR256X, VR256X, VR256X, f64mem, |
| 125254 | /* VFNMSUB231PDZ256mbk */ |
| 125255 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 125256 | /* VFNMSUB231PDZ256mbkz */ |
| 125257 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 125258 | /* VFNMSUB231PDZ256mk */ |
| 125259 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 125260 | /* VFNMSUB231PDZ256mkz */ |
| 125261 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 125262 | /* VFNMSUB231PDZ256r */ |
| 125263 | VR256X, VR256X, VR256X, VR256X, |
| 125264 | /* VFNMSUB231PDZ256rk */ |
| 125265 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 125266 | /* VFNMSUB231PDZ256rkz */ |
| 125267 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 125268 | /* VFNMSUB231PDZm */ |
| 125269 | VR512, VR512, VR512, f512mem, |
| 125270 | /* VFNMSUB231PDZmb */ |
| 125271 | VR512, VR512, VR512, f64mem, |
| 125272 | /* VFNMSUB231PDZmbk */ |
| 125273 | VR512, VR512, VK8WM, VR512, f64mem, |
| 125274 | /* VFNMSUB231PDZmbkz */ |
| 125275 | VR512, VR512, VK8WM, VR512, f64mem, |
| 125276 | /* VFNMSUB231PDZmk */ |
| 125277 | VR512, VR512, VK8WM, VR512, f512mem, |
| 125278 | /* VFNMSUB231PDZmkz */ |
| 125279 | VR512, VR512, VK8WM, VR512, f512mem, |
| 125280 | /* VFNMSUB231PDZr */ |
| 125281 | VR512, VR512, VR512, VR512, |
| 125282 | /* VFNMSUB231PDZrb */ |
| 125283 | VR512, VR512, VR512, VR512, AVX512RC, |
| 125284 | /* VFNMSUB231PDZrbk */ |
| 125285 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 125286 | /* VFNMSUB231PDZrbkz */ |
| 125287 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 125288 | /* VFNMSUB231PDZrk */ |
| 125289 | VR512, VR512, VK8WM, VR512, VR512, |
| 125290 | /* VFNMSUB231PDZrkz */ |
| 125291 | VR512, VR512, VK8WM, VR512, VR512, |
| 125292 | /* VFNMSUB231PDm */ |
| 125293 | VR128, VR128, VR128, f128mem, |
| 125294 | /* VFNMSUB231PDr */ |
| 125295 | VR128, VR128, VR128, VR128, |
| 125296 | /* VFNMSUB231PHZ128m */ |
| 125297 | VR128X, VR128X, VR128X, f128mem, |
| 125298 | /* VFNMSUB231PHZ128mb */ |
| 125299 | VR128X, VR128X, VR128X, f16mem, |
| 125300 | /* VFNMSUB231PHZ128mbk */ |
| 125301 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 125302 | /* VFNMSUB231PHZ128mbkz */ |
| 125303 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 125304 | /* VFNMSUB231PHZ128mk */ |
| 125305 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 125306 | /* VFNMSUB231PHZ128mkz */ |
| 125307 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 125308 | /* VFNMSUB231PHZ128r */ |
| 125309 | VR128X, VR128X, VR128X, VR128X, |
| 125310 | /* VFNMSUB231PHZ128rk */ |
| 125311 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 125312 | /* VFNMSUB231PHZ128rkz */ |
| 125313 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 125314 | /* VFNMSUB231PHZ256m */ |
| 125315 | VR256X, VR256X, VR256X, f256mem, |
| 125316 | /* VFNMSUB231PHZ256mb */ |
| 125317 | VR256X, VR256X, VR256X, f16mem, |
| 125318 | /* VFNMSUB231PHZ256mbk */ |
| 125319 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 125320 | /* VFNMSUB231PHZ256mbkz */ |
| 125321 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 125322 | /* VFNMSUB231PHZ256mk */ |
| 125323 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 125324 | /* VFNMSUB231PHZ256mkz */ |
| 125325 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 125326 | /* VFNMSUB231PHZ256r */ |
| 125327 | VR256X, VR256X, VR256X, VR256X, |
| 125328 | /* VFNMSUB231PHZ256rk */ |
| 125329 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 125330 | /* VFNMSUB231PHZ256rkz */ |
| 125331 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 125332 | /* VFNMSUB231PHZm */ |
| 125333 | VR512, VR512, VR512, f512mem, |
| 125334 | /* VFNMSUB231PHZmb */ |
| 125335 | VR512, VR512, VR512, f16mem, |
| 125336 | /* VFNMSUB231PHZmbk */ |
| 125337 | VR512, VR512, VK32WM, VR512, f16mem, |
| 125338 | /* VFNMSUB231PHZmbkz */ |
| 125339 | VR512, VR512, VK32WM, VR512, f16mem, |
| 125340 | /* VFNMSUB231PHZmk */ |
| 125341 | VR512, VR512, VK32WM, VR512, f512mem, |
| 125342 | /* VFNMSUB231PHZmkz */ |
| 125343 | VR512, VR512, VK32WM, VR512, f512mem, |
| 125344 | /* VFNMSUB231PHZr */ |
| 125345 | VR512, VR512, VR512, VR512, |
| 125346 | /* VFNMSUB231PHZrb */ |
| 125347 | VR512, VR512, VR512, VR512, AVX512RC, |
| 125348 | /* VFNMSUB231PHZrbk */ |
| 125349 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 125350 | /* VFNMSUB231PHZrbkz */ |
| 125351 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 125352 | /* VFNMSUB231PHZrk */ |
| 125353 | VR512, VR512, VK32WM, VR512, VR512, |
| 125354 | /* VFNMSUB231PHZrkz */ |
| 125355 | VR512, VR512, VK32WM, VR512, VR512, |
| 125356 | /* VFNMSUB231PSYm */ |
| 125357 | VR256, VR256, VR256, f256mem, |
| 125358 | /* VFNMSUB231PSYr */ |
| 125359 | VR256, VR256, VR256, VR256, |
| 125360 | /* VFNMSUB231PSZ128m */ |
| 125361 | VR128X, VR128X, VR128X, f128mem, |
| 125362 | /* VFNMSUB231PSZ128mb */ |
| 125363 | VR128X, VR128X, VR128X, f32mem, |
| 125364 | /* VFNMSUB231PSZ128mbk */ |
| 125365 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 125366 | /* VFNMSUB231PSZ128mbkz */ |
| 125367 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 125368 | /* VFNMSUB231PSZ128mk */ |
| 125369 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 125370 | /* VFNMSUB231PSZ128mkz */ |
| 125371 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 125372 | /* VFNMSUB231PSZ128r */ |
| 125373 | VR128X, VR128X, VR128X, VR128X, |
| 125374 | /* VFNMSUB231PSZ128rk */ |
| 125375 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 125376 | /* VFNMSUB231PSZ128rkz */ |
| 125377 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 125378 | /* VFNMSUB231PSZ256m */ |
| 125379 | VR256X, VR256X, VR256X, f256mem, |
| 125380 | /* VFNMSUB231PSZ256mb */ |
| 125381 | VR256X, VR256X, VR256X, f32mem, |
| 125382 | /* VFNMSUB231PSZ256mbk */ |
| 125383 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 125384 | /* VFNMSUB231PSZ256mbkz */ |
| 125385 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 125386 | /* VFNMSUB231PSZ256mk */ |
| 125387 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 125388 | /* VFNMSUB231PSZ256mkz */ |
| 125389 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 125390 | /* VFNMSUB231PSZ256r */ |
| 125391 | VR256X, VR256X, VR256X, VR256X, |
| 125392 | /* VFNMSUB231PSZ256rk */ |
| 125393 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 125394 | /* VFNMSUB231PSZ256rkz */ |
| 125395 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 125396 | /* VFNMSUB231PSZm */ |
| 125397 | VR512, VR512, VR512, f512mem, |
| 125398 | /* VFNMSUB231PSZmb */ |
| 125399 | VR512, VR512, VR512, f32mem, |
| 125400 | /* VFNMSUB231PSZmbk */ |
| 125401 | VR512, VR512, VK16WM, VR512, f32mem, |
| 125402 | /* VFNMSUB231PSZmbkz */ |
| 125403 | VR512, VR512, VK16WM, VR512, f32mem, |
| 125404 | /* VFNMSUB231PSZmk */ |
| 125405 | VR512, VR512, VK16WM, VR512, f512mem, |
| 125406 | /* VFNMSUB231PSZmkz */ |
| 125407 | VR512, VR512, VK16WM, VR512, f512mem, |
| 125408 | /* VFNMSUB231PSZr */ |
| 125409 | VR512, VR512, VR512, VR512, |
| 125410 | /* VFNMSUB231PSZrb */ |
| 125411 | VR512, VR512, VR512, VR512, AVX512RC, |
| 125412 | /* VFNMSUB231PSZrbk */ |
| 125413 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 125414 | /* VFNMSUB231PSZrbkz */ |
| 125415 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 125416 | /* VFNMSUB231PSZrk */ |
| 125417 | VR512, VR512, VK16WM, VR512, VR512, |
| 125418 | /* VFNMSUB231PSZrkz */ |
| 125419 | VR512, VR512, VK16WM, VR512, VR512, |
| 125420 | /* VFNMSUB231PSm */ |
| 125421 | VR128, VR128, VR128, f128mem, |
| 125422 | /* VFNMSUB231PSr */ |
| 125423 | VR128, VR128, VR128, VR128, |
| 125424 | /* VFNMSUB231SDZm */ |
| 125425 | FR64X, FR64X, FR64X, f64mem, |
| 125426 | /* VFNMSUB231SDZm_Int */ |
| 125427 | VR128X, VR128X, VR128X, sdmem, |
| 125428 | /* VFNMSUB231SDZm_Intk */ |
| 125429 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 125430 | /* VFNMSUB231SDZm_Intkz */ |
| 125431 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 125432 | /* VFNMSUB231SDZr */ |
| 125433 | FR64X, FR64X, FR64X, FR64X, |
| 125434 | /* VFNMSUB231SDZr_Int */ |
| 125435 | VR128X, VR128X, VR128X, VR128X, |
| 125436 | /* VFNMSUB231SDZr_Intk */ |
| 125437 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125438 | /* VFNMSUB231SDZr_Intkz */ |
| 125439 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125440 | /* VFNMSUB231SDZrb */ |
| 125441 | FR64X, FR64X, FR64X, FR64X, AVX512RC, |
| 125442 | /* VFNMSUB231SDZrb_Int */ |
| 125443 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 125444 | /* VFNMSUB231SDZrb_Intk */ |
| 125445 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125446 | /* VFNMSUB231SDZrb_Intkz */ |
| 125447 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125448 | /* VFNMSUB231SDm */ |
| 125449 | FR64, FR64, FR64, f64mem, |
| 125450 | /* VFNMSUB231SDm_Int */ |
| 125451 | VR128, VR128, VR128, sdmem, |
| 125452 | /* VFNMSUB231SDr */ |
| 125453 | FR64, FR64, FR64, FR64, |
| 125454 | /* VFNMSUB231SDr_Int */ |
| 125455 | VR128, VR128, VR128, VR128, |
| 125456 | /* VFNMSUB231SHZm */ |
| 125457 | FR16X, FR16X, FR16X, f16mem, |
| 125458 | /* VFNMSUB231SHZm_Int */ |
| 125459 | VR128X, VR128X, VR128X, shmem, |
| 125460 | /* VFNMSUB231SHZm_Intk */ |
| 125461 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 125462 | /* VFNMSUB231SHZm_Intkz */ |
| 125463 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 125464 | /* VFNMSUB231SHZr */ |
| 125465 | FR16X, FR16X, FR16X, FR16X, |
| 125466 | /* VFNMSUB231SHZr_Int */ |
| 125467 | VR128X, VR128X, VR128X, VR128X, |
| 125468 | /* VFNMSUB231SHZr_Intk */ |
| 125469 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125470 | /* VFNMSUB231SHZr_Intkz */ |
| 125471 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125472 | /* VFNMSUB231SHZrb */ |
| 125473 | FR16X, FR16X, FR16X, FR16X, AVX512RC, |
| 125474 | /* VFNMSUB231SHZrb_Int */ |
| 125475 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 125476 | /* VFNMSUB231SHZrb_Intk */ |
| 125477 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125478 | /* VFNMSUB231SHZrb_Intkz */ |
| 125479 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125480 | /* VFNMSUB231SSZm */ |
| 125481 | FR32X, FR32X, FR32X, f32mem, |
| 125482 | /* VFNMSUB231SSZm_Int */ |
| 125483 | VR128X, VR128X, VR128X, ssmem, |
| 125484 | /* VFNMSUB231SSZm_Intk */ |
| 125485 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 125486 | /* VFNMSUB231SSZm_Intkz */ |
| 125487 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 125488 | /* VFNMSUB231SSZr */ |
| 125489 | FR32X, FR32X, FR32X, FR32X, |
| 125490 | /* VFNMSUB231SSZr_Int */ |
| 125491 | VR128X, VR128X, VR128X, VR128X, |
| 125492 | /* VFNMSUB231SSZr_Intk */ |
| 125493 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125494 | /* VFNMSUB231SSZr_Intkz */ |
| 125495 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125496 | /* VFNMSUB231SSZrb */ |
| 125497 | FR32X, FR32X, FR32X, FR32X, AVX512RC, |
| 125498 | /* VFNMSUB231SSZrb_Int */ |
| 125499 | VR128X, VR128X, VR128X, VR128X, AVX512RC, |
| 125500 | /* VFNMSUB231SSZrb_Intk */ |
| 125501 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125502 | /* VFNMSUB231SSZrb_Intkz */ |
| 125503 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 125504 | /* VFNMSUB231SSm */ |
| 125505 | FR32, FR32, FR32, f32mem, |
| 125506 | /* VFNMSUB231SSm_Int */ |
| 125507 | VR128, VR128, VR128, ssmem, |
| 125508 | /* VFNMSUB231SSr */ |
| 125509 | FR32, FR32, FR32, FR32, |
| 125510 | /* VFNMSUB231SSr_Int */ |
| 125511 | VR128, VR128, VR128, VR128, |
| 125512 | /* VFNMSUBPD4Ymr */ |
| 125513 | VR256, VR256, f256mem, VR256, |
| 125514 | /* VFNMSUBPD4Yrm */ |
| 125515 | VR256, VR256, VR256, f256mem, |
| 125516 | /* VFNMSUBPD4Yrr */ |
| 125517 | VR256, VR256, VR256, VR256, |
| 125518 | /* VFNMSUBPD4Yrr_REV */ |
| 125519 | VR256, VR256, VR256, VR256, |
| 125520 | /* VFNMSUBPD4mr */ |
| 125521 | VR128, VR128, f128mem, VR128, |
| 125522 | /* VFNMSUBPD4rm */ |
| 125523 | VR128, VR128, VR128, f128mem, |
| 125524 | /* VFNMSUBPD4rr */ |
| 125525 | VR128, VR128, VR128, VR128, |
| 125526 | /* VFNMSUBPD4rr_REV */ |
| 125527 | VR128, VR128, VR128, VR128, |
| 125528 | /* VFNMSUBPS4Ymr */ |
| 125529 | VR256, VR256, f256mem, VR256, |
| 125530 | /* VFNMSUBPS4Yrm */ |
| 125531 | VR256, VR256, VR256, f256mem, |
| 125532 | /* VFNMSUBPS4Yrr */ |
| 125533 | VR256, VR256, VR256, VR256, |
| 125534 | /* VFNMSUBPS4Yrr_REV */ |
| 125535 | VR256, VR256, VR256, VR256, |
| 125536 | /* VFNMSUBPS4mr */ |
| 125537 | VR128, VR128, f128mem, VR128, |
| 125538 | /* VFNMSUBPS4rm */ |
| 125539 | VR128, VR128, VR128, f128mem, |
| 125540 | /* VFNMSUBPS4rr */ |
| 125541 | VR128, VR128, VR128, VR128, |
| 125542 | /* VFNMSUBPS4rr_REV */ |
| 125543 | VR128, VR128, VR128, VR128, |
| 125544 | /* VFNMSUBSD4mr */ |
| 125545 | FR64, FR64, f64mem, FR64, |
| 125546 | /* VFNMSUBSD4mr_Int */ |
| 125547 | VR128, VR128, sdmem, VR128, |
| 125548 | /* VFNMSUBSD4rm */ |
| 125549 | FR64, FR64, FR64, f64mem, |
| 125550 | /* VFNMSUBSD4rm_Int */ |
| 125551 | VR128, VR128, VR128, sdmem, |
| 125552 | /* VFNMSUBSD4rr */ |
| 125553 | FR64, FR64, FR64, FR64, |
| 125554 | /* VFNMSUBSD4rr_Int */ |
| 125555 | VR128, VR128, VR128, VR128, |
| 125556 | /* VFNMSUBSD4rr_Int_REV */ |
| 125557 | VR128, VR128, VR128, VR128, |
| 125558 | /* VFNMSUBSD4rr_REV */ |
| 125559 | FR64, FR64, FR64, FR64, |
| 125560 | /* VFNMSUBSS4mr */ |
| 125561 | FR32, FR32, f32mem, FR32, |
| 125562 | /* VFNMSUBSS4mr_Int */ |
| 125563 | VR128, VR128, ssmem, VR128, |
| 125564 | /* VFNMSUBSS4rm */ |
| 125565 | FR32, FR32, FR32, f32mem, |
| 125566 | /* VFNMSUBSS4rm_Int */ |
| 125567 | VR128, VR128, VR128, ssmem, |
| 125568 | /* VFNMSUBSS4rr */ |
| 125569 | FR32, FR32, FR32, FR32, |
| 125570 | /* VFNMSUBSS4rr_Int */ |
| 125571 | VR128, VR128, VR128, VR128, |
| 125572 | /* VFNMSUBSS4rr_Int_REV */ |
| 125573 | VR128, VR128, VR128, VR128, |
| 125574 | /* VFNMSUBSS4rr_REV */ |
| 125575 | FR32, FR32, FR32, FR32, |
| 125576 | /* VFPCLASSPDZ128rm */ |
| 125577 | VK2, f128mem, i32u8imm, |
| 125578 | /* VFPCLASSPDZ128rmb */ |
| 125579 | VK2, f64mem, i32u8imm, |
| 125580 | /* VFPCLASSPDZ128rmbk */ |
| 125581 | VK2, VK2WM, f64mem, i32u8imm, |
| 125582 | /* VFPCLASSPDZ128rmk */ |
| 125583 | VK2, VK2WM, f128mem, i32u8imm, |
| 125584 | /* VFPCLASSPDZ128rr */ |
| 125585 | VK2, VR128X, i32u8imm, |
| 125586 | /* VFPCLASSPDZ128rrk */ |
| 125587 | VK2, VK2WM, VR128X, i32u8imm, |
| 125588 | /* VFPCLASSPDZ256rm */ |
| 125589 | VK4, f256mem, i32u8imm, |
| 125590 | /* VFPCLASSPDZ256rmb */ |
| 125591 | VK4, f64mem, i32u8imm, |
| 125592 | /* VFPCLASSPDZ256rmbk */ |
| 125593 | VK4, VK4WM, f64mem, i32u8imm, |
| 125594 | /* VFPCLASSPDZ256rmk */ |
| 125595 | VK4, VK4WM, f256mem, i32u8imm, |
| 125596 | /* VFPCLASSPDZ256rr */ |
| 125597 | VK4, VR256X, i32u8imm, |
| 125598 | /* VFPCLASSPDZ256rrk */ |
| 125599 | VK4, VK4WM, VR256X, i32u8imm, |
| 125600 | /* VFPCLASSPDZrm */ |
| 125601 | VK8, f512mem, i32u8imm, |
| 125602 | /* VFPCLASSPDZrmb */ |
| 125603 | VK8, f64mem, i32u8imm, |
| 125604 | /* VFPCLASSPDZrmbk */ |
| 125605 | VK8, VK8WM, f64mem, i32u8imm, |
| 125606 | /* VFPCLASSPDZrmk */ |
| 125607 | VK8, VK8WM, f512mem, i32u8imm, |
| 125608 | /* VFPCLASSPDZrr */ |
| 125609 | VK8, VR512, i32u8imm, |
| 125610 | /* VFPCLASSPDZrrk */ |
| 125611 | VK8, VK8WM, VR512, i32u8imm, |
| 125612 | /* VFPCLASSPHZ128rm */ |
| 125613 | VK8, f128mem, i32u8imm, |
| 125614 | /* VFPCLASSPHZ128rmb */ |
| 125615 | VK8, f16mem, i32u8imm, |
| 125616 | /* VFPCLASSPHZ128rmbk */ |
| 125617 | VK8, VK8WM, f16mem, i32u8imm, |
| 125618 | /* VFPCLASSPHZ128rmk */ |
| 125619 | VK8, VK8WM, f128mem, i32u8imm, |
| 125620 | /* VFPCLASSPHZ128rr */ |
| 125621 | VK8, VR128X, i32u8imm, |
| 125622 | /* VFPCLASSPHZ128rrk */ |
| 125623 | VK8, VK8WM, VR128X, i32u8imm, |
| 125624 | /* VFPCLASSPHZ256rm */ |
| 125625 | VK16, f256mem, i32u8imm, |
| 125626 | /* VFPCLASSPHZ256rmb */ |
| 125627 | VK16, f16mem, i32u8imm, |
| 125628 | /* VFPCLASSPHZ256rmbk */ |
| 125629 | VK16, VK16WM, f16mem, i32u8imm, |
| 125630 | /* VFPCLASSPHZ256rmk */ |
| 125631 | VK16, VK16WM, f256mem, i32u8imm, |
| 125632 | /* VFPCLASSPHZ256rr */ |
| 125633 | VK16, VR256X, i32u8imm, |
| 125634 | /* VFPCLASSPHZ256rrk */ |
| 125635 | VK16, VK16WM, VR256X, i32u8imm, |
| 125636 | /* VFPCLASSPHZrm */ |
| 125637 | VK32, f512mem, i32u8imm, |
| 125638 | /* VFPCLASSPHZrmb */ |
| 125639 | VK32, f16mem, i32u8imm, |
| 125640 | /* VFPCLASSPHZrmbk */ |
| 125641 | VK32, VK32WM, f16mem, i32u8imm, |
| 125642 | /* VFPCLASSPHZrmk */ |
| 125643 | VK32, VK32WM, f512mem, i32u8imm, |
| 125644 | /* VFPCLASSPHZrr */ |
| 125645 | VK32, VR512, i32u8imm, |
| 125646 | /* VFPCLASSPHZrrk */ |
| 125647 | VK32, VK32WM, VR512, i32u8imm, |
| 125648 | /* VFPCLASSPSZ128rm */ |
| 125649 | VK4, f128mem, i32u8imm, |
| 125650 | /* VFPCLASSPSZ128rmb */ |
| 125651 | VK4, f32mem, i32u8imm, |
| 125652 | /* VFPCLASSPSZ128rmbk */ |
| 125653 | VK4, VK4WM, f32mem, i32u8imm, |
| 125654 | /* VFPCLASSPSZ128rmk */ |
| 125655 | VK4, VK4WM, f128mem, i32u8imm, |
| 125656 | /* VFPCLASSPSZ128rr */ |
| 125657 | VK4, VR128X, i32u8imm, |
| 125658 | /* VFPCLASSPSZ128rrk */ |
| 125659 | VK4, VK4WM, VR128X, i32u8imm, |
| 125660 | /* VFPCLASSPSZ256rm */ |
| 125661 | VK8, f256mem, i32u8imm, |
| 125662 | /* VFPCLASSPSZ256rmb */ |
| 125663 | VK8, f32mem, i32u8imm, |
| 125664 | /* VFPCLASSPSZ256rmbk */ |
| 125665 | VK8, VK8WM, f32mem, i32u8imm, |
| 125666 | /* VFPCLASSPSZ256rmk */ |
| 125667 | VK8, VK8WM, f256mem, i32u8imm, |
| 125668 | /* VFPCLASSPSZ256rr */ |
| 125669 | VK8, VR256X, i32u8imm, |
| 125670 | /* VFPCLASSPSZ256rrk */ |
| 125671 | VK8, VK8WM, VR256X, i32u8imm, |
| 125672 | /* VFPCLASSPSZrm */ |
| 125673 | VK16, f512mem, i32u8imm, |
| 125674 | /* VFPCLASSPSZrmb */ |
| 125675 | VK16, f32mem, i32u8imm, |
| 125676 | /* VFPCLASSPSZrmbk */ |
| 125677 | VK16, VK16WM, f32mem, i32u8imm, |
| 125678 | /* VFPCLASSPSZrmk */ |
| 125679 | VK16, VK16WM, f512mem, i32u8imm, |
| 125680 | /* VFPCLASSPSZrr */ |
| 125681 | VK16, VR512, i32u8imm, |
| 125682 | /* VFPCLASSPSZrrk */ |
| 125683 | VK16, VK16WM, VR512, i32u8imm, |
| 125684 | /* VFPCLASSSDZrm */ |
| 125685 | VK1, sdmem, i32u8imm, |
| 125686 | /* VFPCLASSSDZrmk */ |
| 125687 | VK1, VK1WM, sdmem, i32u8imm, |
| 125688 | /* VFPCLASSSDZrr */ |
| 125689 | VK1, VR128X, i32u8imm, |
| 125690 | /* VFPCLASSSDZrrk */ |
| 125691 | VK1, VK1WM, VR128X, i32u8imm, |
| 125692 | /* VFPCLASSSHZrm */ |
| 125693 | VK1, shmem, i32u8imm, |
| 125694 | /* VFPCLASSSHZrmk */ |
| 125695 | VK1, VK1WM, shmem, i32u8imm, |
| 125696 | /* VFPCLASSSHZrr */ |
| 125697 | VK1, VR128X, i32u8imm, |
| 125698 | /* VFPCLASSSHZrrk */ |
| 125699 | VK1, VK1WM, VR128X, i32u8imm, |
| 125700 | /* VFPCLASSSSZrm */ |
| 125701 | VK1, ssmem, i32u8imm, |
| 125702 | /* VFPCLASSSSZrmk */ |
| 125703 | VK1, VK1WM, ssmem, i32u8imm, |
| 125704 | /* VFPCLASSSSZrr */ |
| 125705 | VK1, VR128X, i32u8imm, |
| 125706 | /* VFPCLASSSSZrrk */ |
| 125707 | VK1, VK1WM, VR128X, i32u8imm, |
| 125708 | /* VFRCZPDYrm */ |
| 125709 | VR256, f256mem, |
| 125710 | /* VFRCZPDYrr */ |
| 125711 | VR256, VR256, |
| 125712 | /* VFRCZPDrm */ |
| 125713 | VR128, f128mem, |
| 125714 | /* VFRCZPDrr */ |
| 125715 | VR128, VR128, |
| 125716 | /* VFRCZPSYrm */ |
| 125717 | VR256, f256mem, |
| 125718 | /* VFRCZPSYrr */ |
| 125719 | VR256, VR256, |
| 125720 | /* VFRCZPSrm */ |
| 125721 | VR128, f128mem, |
| 125722 | /* VFRCZPSrr */ |
| 125723 | VR128, VR128, |
| 125724 | /* VFRCZSDrm */ |
| 125725 | VR128, sdmem, |
| 125726 | /* VFRCZSDrr */ |
| 125727 | VR128, VR128, |
| 125728 | /* VFRCZSSrm */ |
| 125729 | VR128, ssmem, |
| 125730 | /* VFRCZSSrr */ |
| 125731 | VR128, VR128, |
| 125732 | /* VGATHERDPDYrm */ |
| 125733 | VR256, VR256, VR256, vx256mem, VR256, |
| 125734 | /* VGATHERDPDZ128rm */ |
| 125735 | VR128X, VK2WM, VR128X, VK2WM, vx128xmem, |
| 125736 | /* VGATHERDPDZ256rm */ |
| 125737 | VR256X, VK4WM, VR256X, VK4WM, vx256xmem, |
| 125738 | /* VGATHERDPDZrm */ |
| 125739 | VR512, VK8WM, VR512, VK8WM, vy512xmem, |
| 125740 | /* VGATHERDPDrm */ |
| 125741 | VR128, VR128, VR128, vx128mem, VR128, |
| 125742 | /* VGATHERDPSYrm */ |
| 125743 | VR256, VR256, VR256, vy256mem, VR256, |
| 125744 | /* VGATHERDPSZ128rm */ |
| 125745 | VR128X, VK4WM, VR128X, VK4WM, vx128xmem, |
| 125746 | /* VGATHERDPSZ256rm */ |
| 125747 | VR256X, VK8WM, VR256X, VK8WM, vy256xmem, |
| 125748 | /* VGATHERDPSZrm */ |
| 125749 | VR512, VK16WM, VR512, VK16WM, vz512mem, |
| 125750 | /* VGATHERDPSrm */ |
| 125751 | VR128, VR128, VR128, vx128mem, VR128, |
| 125752 | /* VGATHERPF0DPDm */ |
| 125753 | VK8WM, vy512xmem, |
| 125754 | /* VGATHERPF0DPSm */ |
| 125755 | VK16WM, vz512mem, |
| 125756 | /* VGATHERPF0QPDm */ |
| 125757 | VK8WM, vz512mem, |
| 125758 | /* VGATHERPF0QPSm */ |
| 125759 | VK8WM, vz256mem, |
| 125760 | /* VGATHERPF1DPDm */ |
| 125761 | VK8WM, vy512xmem, |
| 125762 | /* VGATHERPF1DPSm */ |
| 125763 | VK16WM, vz512mem, |
| 125764 | /* VGATHERPF1QPDm */ |
| 125765 | VK8WM, vz512mem, |
| 125766 | /* VGATHERPF1QPSm */ |
| 125767 | VK8WM, vz256mem, |
| 125768 | /* VGATHERQPDYrm */ |
| 125769 | VR256, VR256, VR256, vy256mem, VR256, |
| 125770 | /* VGATHERQPDZ128rm */ |
| 125771 | VR128X, VK2WM, VR128X, VK2WM, vx128xmem, |
| 125772 | /* VGATHERQPDZ256rm */ |
| 125773 | VR256X, VK4WM, VR256X, VK4WM, vy256xmem, |
| 125774 | /* VGATHERQPDZrm */ |
| 125775 | VR512, VK8WM, VR512, VK8WM, vz512mem, |
| 125776 | /* VGATHERQPDrm */ |
| 125777 | VR128, VR128, VR128, vx128mem, VR128, |
| 125778 | /* VGATHERQPSYrm */ |
| 125779 | VR128, VR128, VR128, vy128mem, VR128, |
| 125780 | /* VGATHERQPSZ128rm */ |
| 125781 | VR128X, VK2WM, VR128X, VK2WM, vx64xmem, |
| 125782 | /* VGATHERQPSZ256rm */ |
| 125783 | VR128X, VK4WM, VR128X, VK4WM, vy128xmem, |
| 125784 | /* VGATHERQPSZrm */ |
| 125785 | VR256X, VK8WM, VR256X, VK8WM, vz256mem, |
| 125786 | /* VGATHERQPSrm */ |
| 125787 | VR128, VR128, VR128, vx64mem, VR128, |
| 125788 | /* VGETEXPPDZ128m */ |
| 125789 | VR128X, f128mem, |
| 125790 | /* VGETEXPPDZ128mb */ |
| 125791 | VR128X, f64mem, |
| 125792 | /* VGETEXPPDZ128mbk */ |
| 125793 | VR128X, VR128X, VK2WM, f64mem, |
| 125794 | /* VGETEXPPDZ128mbkz */ |
| 125795 | VR128X, VK2WM, f64mem, |
| 125796 | /* VGETEXPPDZ128mk */ |
| 125797 | VR128X, VR128X, VK2WM, f128mem, |
| 125798 | /* VGETEXPPDZ128mkz */ |
| 125799 | VR128X, VK2WM, f128mem, |
| 125800 | /* VGETEXPPDZ128r */ |
| 125801 | VR128X, VR128X, |
| 125802 | /* VGETEXPPDZ128rk */ |
| 125803 | VR128X, VR128X, VK2WM, VR128X, |
| 125804 | /* VGETEXPPDZ128rkz */ |
| 125805 | VR128X, VK2WM, VR128X, |
| 125806 | /* VGETEXPPDZ256m */ |
| 125807 | VR256X, f256mem, |
| 125808 | /* VGETEXPPDZ256mb */ |
| 125809 | VR256X, f64mem, |
| 125810 | /* VGETEXPPDZ256mbk */ |
| 125811 | VR256X, VR256X, VK4WM, f64mem, |
| 125812 | /* VGETEXPPDZ256mbkz */ |
| 125813 | VR256X, VK4WM, f64mem, |
| 125814 | /* VGETEXPPDZ256mk */ |
| 125815 | VR256X, VR256X, VK4WM, f256mem, |
| 125816 | /* VGETEXPPDZ256mkz */ |
| 125817 | VR256X, VK4WM, f256mem, |
| 125818 | /* VGETEXPPDZ256r */ |
| 125819 | VR256X, VR256X, |
| 125820 | /* VGETEXPPDZ256rk */ |
| 125821 | VR256X, VR256X, VK4WM, VR256X, |
| 125822 | /* VGETEXPPDZ256rkz */ |
| 125823 | VR256X, VK4WM, VR256X, |
| 125824 | /* VGETEXPPDZm */ |
| 125825 | VR512, f512mem, |
| 125826 | /* VGETEXPPDZmb */ |
| 125827 | VR512, f64mem, |
| 125828 | /* VGETEXPPDZmbk */ |
| 125829 | VR512, VR512, VK8WM, f64mem, |
| 125830 | /* VGETEXPPDZmbkz */ |
| 125831 | VR512, VK8WM, f64mem, |
| 125832 | /* VGETEXPPDZmk */ |
| 125833 | VR512, VR512, VK8WM, f512mem, |
| 125834 | /* VGETEXPPDZmkz */ |
| 125835 | VR512, VK8WM, f512mem, |
| 125836 | /* VGETEXPPDZr */ |
| 125837 | VR512, VR512, |
| 125838 | /* VGETEXPPDZrb */ |
| 125839 | VR512, VR512, |
| 125840 | /* VGETEXPPDZrbk */ |
| 125841 | VR512, VR512, VK8WM, VR512, |
| 125842 | /* VGETEXPPDZrbkz */ |
| 125843 | VR512, VK8WM, VR512, |
| 125844 | /* VGETEXPPDZrk */ |
| 125845 | VR512, VR512, VK8WM, VR512, |
| 125846 | /* VGETEXPPDZrkz */ |
| 125847 | VR512, VK8WM, VR512, |
| 125848 | /* VGETEXPPHZ128m */ |
| 125849 | VR128X, f128mem, |
| 125850 | /* VGETEXPPHZ128mb */ |
| 125851 | VR128X, f16mem, |
| 125852 | /* VGETEXPPHZ128mbk */ |
| 125853 | VR128X, VR128X, VK8WM, f16mem, |
| 125854 | /* VGETEXPPHZ128mbkz */ |
| 125855 | VR128X, VK8WM, f16mem, |
| 125856 | /* VGETEXPPHZ128mk */ |
| 125857 | VR128X, VR128X, VK8WM, f128mem, |
| 125858 | /* VGETEXPPHZ128mkz */ |
| 125859 | VR128X, VK8WM, f128mem, |
| 125860 | /* VGETEXPPHZ128r */ |
| 125861 | VR128X, VR128X, |
| 125862 | /* VGETEXPPHZ128rk */ |
| 125863 | VR128X, VR128X, VK8WM, VR128X, |
| 125864 | /* VGETEXPPHZ128rkz */ |
| 125865 | VR128X, VK8WM, VR128X, |
| 125866 | /* VGETEXPPHZ256m */ |
| 125867 | VR256X, f256mem, |
| 125868 | /* VGETEXPPHZ256mb */ |
| 125869 | VR256X, f16mem, |
| 125870 | /* VGETEXPPHZ256mbk */ |
| 125871 | VR256X, VR256X, VK16WM, f16mem, |
| 125872 | /* VGETEXPPHZ256mbkz */ |
| 125873 | VR256X, VK16WM, f16mem, |
| 125874 | /* VGETEXPPHZ256mk */ |
| 125875 | VR256X, VR256X, VK16WM, f256mem, |
| 125876 | /* VGETEXPPHZ256mkz */ |
| 125877 | VR256X, VK16WM, f256mem, |
| 125878 | /* VGETEXPPHZ256r */ |
| 125879 | VR256X, VR256X, |
| 125880 | /* VGETEXPPHZ256rk */ |
| 125881 | VR256X, VR256X, VK16WM, VR256X, |
| 125882 | /* VGETEXPPHZ256rkz */ |
| 125883 | VR256X, VK16WM, VR256X, |
| 125884 | /* VGETEXPPHZm */ |
| 125885 | VR512, f512mem, |
| 125886 | /* VGETEXPPHZmb */ |
| 125887 | VR512, f16mem, |
| 125888 | /* VGETEXPPHZmbk */ |
| 125889 | VR512, VR512, VK32WM, f16mem, |
| 125890 | /* VGETEXPPHZmbkz */ |
| 125891 | VR512, VK32WM, f16mem, |
| 125892 | /* VGETEXPPHZmk */ |
| 125893 | VR512, VR512, VK32WM, f512mem, |
| 125894 | /* VGETEXPPHZmkz */ |
| 125895 | VR512, VK32WM, f512mem, |
| 125896 | /* VGETEXPPHZr */ |
| 125897 | VR512, VR512, |
| 125898 | /* VGETEXPPHZrb */ |
| 125899 | VR512, VR512, |
| 125900 | /* VGETEXPPHZrbk */ |
| 125901 | VR512, VR512, VK32WM, VR512, |
| 125902 | /* VGETEXPPHZrbkz */ |
| 125903 | VR512, VK32WM, VR512, |
| 125904 | /* VGETEXPPHZrk */ |
| 125905 | VR512, VR512, VK32WM, VR512, |
| 125906 | /* VGETEXPPHZrkz */ |
| 125907 | VR512, VK32WM, VR512, |
| 125908 | /* VGETEXPPSZ128m */ |
| 125909 | VR128X, f128mem, |
| 125910 | /* VGETEXPPSZ128mb */ |
| 125911 | VR128X, f32mem, |
| 125912 | /* VGETEXPPSZ128mbk */ |
| 125913 | VR128X, VR128X, VK4WM, f32mem, |
| 125914 | /* VGETEXPPSZ128mbkz */ |
| 125915 | VR128X, VK4WM, f32mem, |
| 125916 | /* VGETEXPPSZ128mk */ |
| 125917 | VR128X, VR128X, VK4WM, f128mem, |
| 125918 | /* VGETEXPPSZ128mkz */ |
| 125919 | VR128X, VK4WM, f128mem, |
| 125920 | /* VGETEXPPSZ128r */ |
| 125921 | VR128X, VR128X, |
| 125922 | /* VGETEXPPSZ128rk */ |
| 125923 | VR128X, VR128X, VK4WM, VR128X, |
| 125924 | /* VGETEXPPSZ128rkz */ |
| 125925 | VR128X, VK4WM, VR128X, |
| 125926 | /* VGETEXPPSZ256m */ |
| 125927 | VR256X, f256mem, |
| 125928 | /* VGETEXPPSZ256mb */ |
| 125929 | VR256X, f32mem, |
| 125930 | /* VGETEXPPSZ256mbk */ |
| 125931 | VR256X, VR256X, VK8WM, f32mem, |
| 125932 | /* VGETEXPPSZ256mbkz */ |
| 125933 | VR256X, VK8WM, f32mem, |
| 125934 | /* VGETEXPPSZ256mk */ |
| 125935 | VR256X, VR256X, VK8WM, f256mem, |
| 125936 | /* VGETEXPPSZ256mkz */ |
| 125937 | VR256X, VK8WM, f256mem, |
| 125938 | /* VGETEXPPSZ256r */ |
| 125939 | VR256X, VR256X, |
| 125940 | /* VGETEXPPSZ256rk */ |
| 125941 | VR256X, VR256X, VK8WM, VR256X, |
| 125942 | /* VGETEXPPSZ256rkz */ |
| 125943 | VR256X, VK8WM, VR256X, |
| 125944 | /* VGETEXPPSZm */ |
| 125945 | VR512, f512mem, |
| 125946 | /* VGETEXPPSZmb */ |
| 125947 | VR512, f32mem, |
| 125948 | /* VGETEXPPSZmbk */ |
| 125949 | VR512, VR512, VK16WM, f32mem, |
| 125950 | /* VGETEXPPSZmbkz */ |
| 125951 | VR512, VK16WM, f32mem, |
| 125952 | /* VGETEXPPSZmk */ |
| 125953 | VR512, VR512, VK16WM, f512mem, |
| 125954 | /* VGETEXPPSZmkz */ |
| 125955 | VR512, VK16WM, f512mem, |
| 125956 | /* VGETEXPPSZr */ |
| 125957 | VR512, VR512, |
| 125958 | /* VGETEXPPSZrb */ |
| 125959 | VR512, VR512, |
| 125960 | /* VGETEXPPSZrbk */ |
| 125961 | VR512, VR512, VK16WM, VR512, |
| 125962 | /* VGETEXPPSZrbkz */ |
| 125963 | VR512, VK16WM, VR512, |
| 125964 | /* VGETEXPPSZrk */ |
| 125965 | VR512, VR512, VK16WM, VR512, |
| 125966 | /* VGETEXPPSZrkz */ |
| 125967 | VR512, VK16WM, VR512, |
| 125968 | /* VGETEXPSDZm */ |
| 125969 | VR128X, VR128X, sdmem, |
| 125970 | /* VGETEXPSDZmk */ |
| 125971 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 125972 | /* VGETEXPSDZmkz */ |
| 125973 | VR128X, VK1WM, VR128X, sdmem, |
| 125974 | /* VGETEXPSDZr */ |
| 125975 | VR128X, VR128X, VR128X, |
| 125976 | /* VGETEXPSDZrb */ |
| 125977 | VR128X, VR128X, VR128X, |
| 125978 | /* VGETEXPSDZrbk */ |
| 125979 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125980 | /* VGETEXPSDZrbkz */ |
| 125981 | VR128X, VK1WM, VR128X, VR128X, |
| 125982 | /* VGETEXPSDZrk */ |
| 125983 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125984 | /* VGETEXPSDZrkz */ |
| 125985 | VR128X, VK1WM, VR128X, VR128X, |
| 125986 | /* VGETEXPSHZm */ |
| 125987 | VR128X, VR128X, shmem, |
| 125988 | /* VGETEXPSHZmk */ |
| 125989 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 125990 | /* VGETEXPSHZmkz */ |
| 125991 | VR128X, VK1WM, VR128X, shmem, |
| 125992 | /* VGETEXPSHZr */ |
| 125993 | VR128X, VR128X, VR128X, |
| 125994 | /* VGETEXPSHZrb */ |
| 125995 | VR128X, VR128X, VR128X, |
| 125996 | /* VGETEXPSHZrbk */ |
| 125997 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 125998 | /* VGETEXPSHZrbkz */ |
| 125999 | VR128X, VK1WM, VR128X, VR128X, |
| 126000 | /* VGETEXPSHZrk */ |
| 126001 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 126002 | /* VGETEXPSHZrkz */ |
| 126003 | VR128X, VK1WM, VR128X, VR128X, |
| 126004 | /* VGETEXPSSZm */ |
| 126005 | VR128X, VR128X, ssmem, |
| 126006 | /* VGETEXPSSZmk */ |
| 126007 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 126008 | /* VGETEXPSSZmkz */ |
| 126009 | VR128X, VK1WM, VR128X, ssmem, |
| 126010 | /* VGETEXPSSZr */ |
| 126011 | VR128X, VR128X, VR128X, |
| 126012 | /* VGETEXPSSZrb */ |
| 126013 | VR128X, VR128X, VR128X, |
| 126014 | /* VGETEXPSSZrbk */ |
| 126015 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 126016 | /* VGETEXPSSZrbkz */ |
| 126017 | VR128X, VK1WM, VR128X, VR128X, |
| 126018 | /* VGETEXPSSZrk */ |
| 126019 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 126020 | /* VGETEXPSSZrkz */ |
| 126021 | VR128X, VK1WM, VR128X, VR128X, |
| 126022 | /* VGETMANTPDZ128rmbi */ |
| 126023 | VR128X, f64mem, i32u8imm, |
| 126024 | /* VGETMANTPDZ128rmbik */ |
| 126025 | VR128X, VR128X, VK2WM, f64mem, i32u8imm, |
| 126026 | /* VGETMANTPDZ128rmbikz */ |
| 126027 | VR128X, VK2WM, f64mem, i32u8imm, |
| 126028 | /* VGETMANTPDZ128rmi */ |
| 126029 | VR128X, f128mem, i32u8imm, |
| 126030 | /* VGETMANTPDZ128rmik */ |
| 126031 | VR128X, VR128X, VK2WM, f128mem, i32u8imm, |
| 126032 | /* VGETMANTPDZ128rmikz */ |
| 126033 | VR128X, VK2WM, f128mem, i32u8imm, |
| 126034 | /* VGETMANTPDZ128rri */ |
| 126035 | VR128X, VR128X, i32u8imm, |
| 126036 | /* VGETMANTPDZ128rrik */ |
| 126037 | VR128X, VR128X, VK2WM, VR128X, i32u8imm, |
| 126038 | /* VGETMANTPDZ128rrikz */ |
| 126039 | VR128X, VK2WM, VR128X, i32u8imm, |
| 126040 | /* VGETMANTPDZ256rmbi */ |
| 126041 | VR256X, f64mem, i32u8imm, |
| 126042 | /* VGETMANTPDZ256rmbik */ |
| 126043 | VR256X, VR256X, VK4WM, f64mem, i32u8imm, |
| 126044 | /* VGETMANTPDZ256rmbikz */ |
| 126045 | VR256X, VK4WM, f64mem, i32u8imm, |
| 126046 | /* VGETMANTPDZ256rmi */ |
| 126047 | VR256X, f256mem, i32u8imm, |
| 126048 | /* VGETMANTPDZ256rmik */ |
| 126049 | VR256X, VR256X, VK4WM, f256mem, i32u8imm, |
| 126050 | /* VGETMANTPDZ256rmikz */ |
| 126051 | VR256X, VK4WM, f256mem, i32u8imm, |
| 126052 | /* VGETMANTPDZ256rri */ |
| 126053 | VR256X, VR256X, i32u8imm, |
| 126054 | /* VGETMANTPDZ256rrik */ |
| 126055 | VR256X, VR256X, VK4WM, VR256X, i32u8imm, |
| 126056 | /* VGETMANTPDZ256rrikz */ |
| 126057 | VR256X, VK4WM, VR256X, i32u8imm, |
| 126058 | /* VGETMANTPDZrmbi */ |
| 126059 | VR512, f64mem, i32u8imm, |
| 126060 | /* VGETMANTPDZrmbik */ |
| 126061 | VR512, VR512, VK8WM, f64mem, i32u8imm, |
| 126062 | /* VGETMANTPDZrmbikz */ |
| 126063 | VR512, VK8WM, f64mem, i32u8imm, |
| 126064 | /* VGETMANTPDZrmi */ |
| 126065 | VR512, f512mem, i32u8imm, |
| 126066 | /* VGETMANTPDZrmik */ |
| 126067 | VR512, VR512, VK8WM, f512mem, i32u8imm, |
| 126068 | /* VGETMANTPDZrmikz */ |
| 126069 | VR512, VK8WM, f512mem, i32u8imm, |
| 126070 | /* VGETMANTPDZrri */ |
| 126071 | VR512, VR512, i32u8imm, |
| 126072 | /* VGETMANTPDZrrib */ |
| 126073 | VR512, VR512, i32u8imm, |
| 126074 | /* VGETMANTPDZrribk */ |
| 126075 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 126076 | /* VGETMANTPDZrribkz */ |
| 126077 | VR512, VK8WM, VR512, i32u8imm, |
| 126078 | /* VGETMANTPDZrrik */ |
| 126079 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 126080 | /* VGETMANTPDZrrikz */ |
| 126081 | VR512, VK8WM, VR512, i32u8imm, |
| 126082 | /* VGETMANTPHZ128rmbi */ |
| 126083 | VR128X, f16mem, i32u8imm, |
| 126084 | /* VGETMANTPHZ128rmbik */ |
| 126085 | VR128X, VR128X, VK8WM, f16mem, i32u8imm, |
| 126086 | /* VGETMANTPHZ128rmbikz */ |
| 126087 | VR128X, VK8WM, f16mem, i32u8imm, |
| 126088 | /* VGETMANTPHZ128rmi */ |
| 126089 | VR128X, f128mem, i32u8imm, |
| 126090 | /* VGETMANTPHZ128rmik */ |
| 126091 | VR128X, VR128X, VK8WM, f128mem, i32u8imm, |
| 126092 | /* VGETMANTPHZ128rmikz */ |
| 126093 | VR128X, VK8WM, f128mem, i32u8imm, |
| 126094 | /* VGETMANTPHZ128rri */ |
| 126095 | VR128X, VR128X, i32u8imm, |
| 126096 | /* VGETMANTPHZ128rrik */ |
| 126097 | VR128X, VR128X, VK8WM, VR128X, i32u8imm, |
| 126098 | /* VGETMANTPHZ128rrikz */ |
| 126099 | VR128X, VK8WM, VR128X, i32u8imm, |
| 126100 | /* VGETMANTPHZ256rmbi */ |
| 126101 | VR256X, f16mem, i32u8imm, |
| 126102 | /* VGETMANTPHZ256rmbik */ |
| 126103 | VR256X, VR256X, VK16WM, f16mem, i32u8imm, |
| 126104 | /* VGETMANTPHZ256rmbikz */ |
| 126105 | VR256X, VK16WM, f16mem, i32u8imm, |
| 126106 | /* VGETMANTPHZ256rmi */ |
| 126107 | VR256X, f256mem, i32u8imm, |
| 126108 | /* VGETMANTPHZ256rmik */ |
| 126109 | VR256X, VR256X, VK16WM, f256mem, i32u8imm, |
| 126110 | /* VGETMANTPHZ256rmikz */ |
| 126111 | VR256X, VK16WM, f256mem, i32u8imm, |
| 126112 | /* VGETMANTPHZ256rri */ |
| 126113 | VR256X, VR256X, i32u8imm, |
| 126114 | /* VGETMANTPHZ256rrik */ |
| 126115 | VR256X, VR256X, VK16WM, VR256X, i32u8imm, |
| 126116 | /* VGETMANTPHZ256rrikz */ |
| 126117 | VR256X, VK16WM, VR256X, i32u8imm, |
| 126118 | /* VGETMANTPHZrmbi */ |
| 126119 | VR512, f16mem, i32u8imm, |
| 126120 | /* VGETMANTPHZrmbik */ |
| 126121 | VR512, VR512, VK32WM, f16mem, i32u8imm, |
| 126122 | /* VGETMANTPHZrmbikz */ |
| 126123 | VR512, VK32WM, f16mem, i32u8imm, |
| 126124 | /* VGETMANTPHZrmi */ |
| 126125 | VR512, f512mem, i32u8imm, |
| 126126 | /* VGETMANTPHZrmik */ |
| 126127 | VR512, VR512, VK32WM, f512mem, i32u8imm, |
| 126128 | /* VGETMANTPHZrmikz */ |
| 126129 | VR512, VK32WM, f512mem, i32u8imm, |
| 126130 | /* VGETMANTPHZrri */ |
| 126131 | VR512, VR512, i32u8imm, |
| 126132 | /* VGETMANTPHZrrib */ |
| 126133 | VR512, VR512, i32u8imm, |
| 126134 | /* VGETMANTPHZrribk */ |
| 126135 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 126136 | /* VGETMANTPHZrribkz */ |
| 126137 | VR512, VK32WM, VR512, i32u8imm, |
| 126138 | /* VGETMANTPHZrrik */ |
| 126139 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 126140 | /* VGETMANTPHZrrikz */ |
| 126141 | VR512, VK32WM, VR512, i32u8imm, |
| 126142 | /* VGETMANTPSZ128rmbi */ |
| 126143 | VR128X, f32mem, i32u8imm, |
| 126144 | /* VGETMANTPSZ128rmbik */ |
| 126145 | VR128X, VR128X, VK4WM, f32mem, i32u8imm, |
| 126146 | /* VGETMANTPSZ128rmbikz */ |
| 126147 | VR128X, VK4WM, f32mem, i32u8imm, |
| 126148 | /* VGETMANTPSZ128rmi */ |
| 126149 | VR128X, f128mem, i32u8imm, |
| 126150 | /* VGETMANTPSZ128rmik */ |
| 126151 | VR128X, VR128X, VK4WM, f128mem, i32u8imm, |
| 126152 | /* VGETMANTPSZ128rmikz */ |
| 126153 | VR128X, VK4WM, f128mem, i32u8imm, |
| 126154 | /* VGETMANTPSZ128rri */ |
| 126155 | VR128X, VR128X, i32u8imm, |
| 126156 | /* VGETMANTPSZ128rrik */ |
| 126157 | VR128X, VR128X, VK4WM, VR128X, i32u8imm, |
| 126158 | /* VGETMANTPSZ128rrikz */ |
| 126159 | VR128X, VK4WM, VR128X, i32u8imm, |
| 126160 | /* VGETMANTPSZ256rmbi */ |
| 126161 | VR256X, f32mem, i32u8imm, |
| 126162 | /* VGETMANTPSZ256rmbik */ |
| 126163 | VR256X, VR256X, VK8WM, f32mem, i32u8imm, |
| 126164 | /* VGETMANTPSZ256rmbikz */ |
| 126165 | VR256X, VK8WM, f32mem, i32u8imm, |
| 126166 | /* VGETMANTPSZ256rmi */ |
| 126167 | VR256X, f256mem, i32u8imm, |
| 126168 | /* VGETMANTPSZ256rmik */ |
| 126169 | VR256X, VR256X, VK8WM, f256mem, i32u8imm, |
| 126170 | /* VGETMANTPSZ256rmikz */ |
| 126171 | VR256X, VK8WM, f256mem, i32u8imm, |
| 126172 | /* VGETMANTPSZ256rri */ |
| 126173 | VR256X, VR256X, i32u8imm, |
| 126174 | /* VGETMANTPSZ256rrik */ |
| 126175 | VR256X, VR256X, VK8WM, VR256X, i32u8imm, |
| 126176 | /* VGETMANTPSZ256rrikz */ |
| 126177 | VR256X, VK8WM, VR256X, i32u8imm, |
| 126178 | /* VGETMANTPSZrmbi */ |
| 126179 | VR512, f32mem, i32u8imm, |
| 126180 | /* VGETMANTPSZrmbik */ |
| 126181 | VR512, VR512, VK16WM, f32mem, i32u8imm, |
| 126182 | /* VGETMANTPSZrmbikz */ |
| 126183 | VR512, VK16WM, f32mem, i32u8imm, |
| 126184 | /* VGETMANTPSZrmi */ |
| 126185 | VR512, f512mem, i32u8imm, |
| 126186 | /* VGETMANTPSZrmik */ |
| 126187 | VR512, VR512, VK16WM, f512mem, i32u8imm, |
| 126188 | /* VGETMANTPSZrmikz */ |
| 126189 | VR512, VK16WM, f512mem, i32u8imm, |
| 126190 | /* VGETMANTPSZrri */ |
| 126191 | VR512, VR512, i32u8imm, |
| 126192 | /* VGETMANTPSZrrib */ |
| 126193 | VR512, VR512, i32u8imm, |
| 126194 | /* VGETMANTPSZrribk */ |
| 126195 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 126196 | /* VGETMANTPSZrribkz */ |
| 126197 | VR512, VK16WM, VR512, i32u8imm, |
| 126198 | /* VGETMANTPSZrrik */ |
| 126199 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 126200 | /* VGETMANTPSZrrikz */ |
| 126201 | VR512, VK16WM, VR512, i32u8imm, |
| 126202 | /* VGETMANTSDZrmi */ |
| 126203 | VR128X, VR128X, sdmem, i32u8imm, |
| 126204 | /* VGETMANTSDZrmik */ |
| 126205 | VR128X, VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 126206 | /* VGETMANTSDZrmikz */ |
| 126207 | VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 126208 | /* VGETMANTSDZrri */ |
| 126209 | VR128X, VR128X, VR128X, i32u8imm, |
| 126210 | /* VGETMANTSDZrrib */ |
| 126211 | VR128X, VR128X, VR128X, i32u8imm, |
| 126212 | /* VGETMANTSDZrribk */ |
| 126213 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126214 | /* VGETMANTSDZrribkz */ |
| 126215 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126216 | /* VGETMANTSDZrrik */ |
| 126217 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126218 | /* VGETMANTSDZrrikz */ |
| 126219 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126220 | /* VGETMANTSHZrmi */ |
| 126221 | VR128X, VR128X, shmem, i32u8imm, |
| 126222 | /* VGETMANTSHZrmik */ |
| 126223 | VR128X, VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 126224 | /* VGETMANTSHZrmikz */ |
| 126225 | VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 126226 | /* VGETMANTSHZrri */ |
| 126227 | VR128X, VR128X, VR128X, i32u8imm, |
| 126228 | /* VGETMANTSHZrrib */ |
| 126229 | VR128X, VR128X, VR128X, i32u8imm, |
| 126230 | /* VGETMANTSHZrribk */ |
| 126231 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126232 | /* VGETMANTSHZrribkz */ |
| 126233 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126234 | /* VGETMANTSHZrrik */ |
| 126235 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126236 | /* VGETMANTSHZrrikz */ |
| 126237 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126238 | /* VGETMANTSSZrmi */ |
| 126239 | VR128X, VR128X, ssmem, i32u8imm, |
| 126240 | /* VGETMANTSSZrmik */ |
| 126241 | VR128X, VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 126242 | /* VGETMANTSSZrmikz */ |
| 126243 | VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 126244 | /* VGETMANTSSZrri */ |
| 126245 | VR128X, VR128X, VR128X, i32u8imm, |
| 126246 | /* VGETMANTSSZrrib */ |
| 126247 | VR128X, VR128X, VR128X, i32u8imm, |
| 126248 | /* VGETMANTSSZrribk */ |
| 126249 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126250 | /* VGETMANTSSZrribkz */ |
| 126251 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126252 | /* VGETMANTSSZrrik */ |
| 126253 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126254 | /* VGETMANTSSZrrikz */ |
| 126255 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 126256 | /* VGF2P8AFFINEINVQBYrmi */ |
| 126257 | VR256, VR256, i256mem, u8imm, |
| 126258 | /* VGF2P8AFFINEINVQBYrri */ |
| 126259 | VR256, VR256, VR256, u8imm, |
| 126260 | /* VGF2P8AFFINEINVQBZ128rmbi */ |
| 126261 | VR128X, VR128X, i64mem, u8imm, |
| 126262 | /* VGF2P8AFFINEINVQBZ128rmbik */ |
| 126263 | VR128X, VR128X, VK16WM, VR128X, i64mem, u8imm, |
| 126264 | /* VGF2P8AFFINEINVQBZ128rmbikz */ |
| 126265 | VR128X, VK16WM, VR128X, i64mem, u8imm, |
| 126266 | /* VGF2P8AFFINEINVQBZ128rmi */ |
| 126267 | VR128X, VR128X, i128mem, u8imm, |
| 126268 | /* VGF2P8AFFINEINVQBZ128rmik */ |
| 126269 | VR128X, VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 126270 | /* VGF2P8AFFINEINVQBZ128rmikz */ |
| 126271 | VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 126272 | /* VGF2P8AFFINEINVQBZ128rri */ |
| 126273 | VR128X, VR128X, VR128X, u8imm, |
| 126274 | /* VGF2P8AFFINEINVQBZ128rrik */ |
| 126275 | VR128X, VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 126276 | /* VGF2P8AFFINEINVQBZ128rrikz */ |
| 126277 | VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 126278 | /* VGF2P8AFFINEINVQBZ256rmbi */ |
| 126279 | VR256X, VR256X, i64mem, u8imm, |
| 126280 | /* VGF2P8AFFINEINVQBZ256rmbik */ |
| 126281 | VR256X, VR256X, VK32WM, VR256X, i64mem, u8imm, |
| 126282 | /* VGF2P8AFFINEINVQBZ256rmbikz */ |
| 126283 | VR256X, VK32WM, VR256X, i64mem, u8imm, |
| 126284 | /* VGF2P8AFFINEINVQBZ256rmi */ |
| 126285 | VR256X, VR256X, i256mem, u8imm, |
| 126286 | /* VGF2P8AFFINEINVQBZ256rmik */ |
| 126287 | VR256X, VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 126288 | /* VGF2P8AFFINEINVQBZ256rmikz */ |
| 126289 | VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 126290 | /* VGF2P8AFFINEINVQBZ256rri */ |
| 126291 | VR256X, VR256X, VR256X, u8imm, |
| 126292 | /* VGF2P8AFFINEINVQBZ256rrik */ |
| 126293 | VR256X, VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 126294 | /* VGF2P8AFFINEINVQBZ256rrikz */ |
| 126295 | VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 126296 | /* VGF2P8AFFINEINVQBZrmbi */ |
| 126297 | VR512, VR512, i64mem, u8imm, |
| 126298 | /* VGF2P8AFFINEINVQBZrmbik */ |
| 126299 | VR512, VR512, VK64WM, VR512, i64mem, u8imm, |
| 126300 | /* VGF2P8AFFINEINVQBZrmbikz */ |
| 126301 | VR512, VK64WM, VR512, i64mem, u8imm, |
| 126302 | /* VGF2P8AFFINEINVQBZrmi */ |
| 126303 | VR512, VR512, i512mem, u8imm, |
| 126304 | /* VGF2P8AFFINEINVQBZrmik */ |
| 126305 | VR512, VR512, VK64WM, VR512, i512mem, u8imm, |
| 126306 | /* VGF2P8AFFINEINVQBZrmikz */ |
| 126307 | VR512, VK64WM, VR512, i512mem, u8imm, |
| 126308 | /* VGF2P8AFFINEINVQBZrri */ |
| 126309 | VR512, VR512, VR512, u8imm, |
| 126310 | /* VGF2P8AFFINEINVQBZrrik */ |
| 126311 | VR512, VR512, VK64WM, VR512, VR512, u8imm, |
| 126312 | /* VGF2P8AFFINEINVQBZrrikz */ |
| 126313 | VR512, VK64WM, VR512, VR512, u8imm, |
| 126314 | /* VGF2P8AFFINEINVQBrmi */ |
| 126315 | VR128, VR128, i128mem, u8imm, |
| 126316 | /* VGF2P8AFFINEINVQBrri */ |
| 126317 | VR128, VR128, VR128, u8imm, |
| 126318 | /* VGF2P8AFFINEQBYrmi */ |
| 126319 | VR256, VR256, i256mem, u8imm, |
| 126320 | /* VGF2P8AFFINEQBYrri */ |
| 126321 | VR256, VR256, VR256, u8imm, |
| 126322 | /* VGF2P8AFFINEQBZ128rmbi */ |
| 126323 | VR128X, VR128X, i64mem, u8imm, |
| 126324 | /* VGF2P8AFFINEQBZ128rmbik */ |
| 126325 | VR128X, VR128X, VK16WM, VR128X, i64mem, u8imm, |
| 126326 | /* VGF2P8AFFINEQBZ128rmbikz */ |
| 126327 | VR128X, VK16WM, VR128X, i64mem, u8imm, |
| 126328 | /* VGF2P8AFFINEQBZ128rmi */ |
| 126329 | VR128X, VR128X, i128mem, u8imm, |
| 126330 | /* VGF2P8AFFINEQBZ128rmik */ |
| 126331 | VR128X, VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 126332 | /* VGF2P8AFFINEQBZ128rmikz */ |
| 126333 | VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 126334 | /* VGF2P8AFFINEQBZ128rri */ |
| 126335 | VR128X, VR128X, VR128X, u8imm, |
| 126336 | /* VGF2P8AFFINEQBZ128rrik */ |
| 126337 | VR128X, VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 126338 | /* VGF2P8AFFINEQBZ128rrikz */ |
| 126339 | VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 126340 | /* VGF2P8AFFINEQBZ256rmbi */ |
| 126341 | VR256X, VR256X, i64mem, u8imm, |
| 126342 | /* VGF2P8AFFINEQBZ256rmbik */ |
| 126343 | VR256X, VR256X, VK32WM, VR256X, i64mem, u8imm, |
| 126344 | /* VGF2P8AFFINEQBZ256rmbikz */ |
| 126345 | VR256X, VK32WM, VR256X, i64mem, u8imm, |
| 126346 | /* VGF2P8AFFINEQBZ256rmi */ |
| 126347 | VR256X, VR256X, i256mem, u8imm, |
| 126348 | /* VGF2P8AFFINEQBZ256rmik */ |
| 126349 | VR256X, VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 126350 | /* VGF2P8AFFINEQBZ256rmikz */ |
| 126351 | VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 126352 | /* VGF2P8AFFINEQBZ256rri */ |
| 126353 | VR256X, VR256X, VR256X, u8imm, |
| 126354 | /* VGF2P8AFFINEQBZ256rrik */ |
| 126355 | VR256X, VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 126356 | /* VGF2P8AFFINEQBZ256rrikz */ |
| 126357 | VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 126358 | /* VGF2P8AFFINEQBZrmbi */ |
| 126359 | VR512, VR512, i64mem, u8imm, |
| 126360 | /* VGF2P8AFFINEQBZrmbik */ |
| 126361 | VR512, VR512, VK64WM, VR512, i64mem, u8imm, |
| 126362 | /* VGF2P8AFFINEQBZrmbikz */ |
| 126363 | VR512, VK64WM, VR512, i64mem, u8imm, |
| 126364 | /* VGF2P8AFFINEQBZrmi */ |
| 126365 | VR512, VR512, i512mem, u8imm, |
| 126366 | /* VGF2P8AFFINEQBZrmik */ |
| 126367 | VR512, VR512, VK64WM, VR512, i512mem, u8imm, |
| 126368 | /* VGF2P8AFFINEQBZrmikz */ |
| 126369 | VR512, VK64WM, VR512, i512mem, u8imm, |
| 126370 | /* VGF2P8AFFINEQBZrri */ |
| 126371 | VR512, VR512, VR512, u8imm, |
| 126372 | /* VGF2P8AFFINEQBZrrik */ |
| 126373 | VR512, VR512, VK64WM, VR512, VR512, u8imm, |
| 126374 | /* VGF2P8AFFINEQBZrrikz */ |
| 126375 | VR512, VK64WM, VR512, VR512, u8imm, |
| 126376 | /* VGF2P8AFFINEQBrmi */ |
| 126377 | VR128, VR128, i128mem, u8imm, |
| 126378 | /* VGF2P8AFFINEQBrri */ |
| 126379 | VR128, VR128, VR128, u8imm, |
| 126380 | /* VGF2P8MULBYrm */ |
| 126381 | VR256, VR256, i256mem, |
| 126382 | /* VGF2P8MULBYrr */ |
| 126383 | VR256, VR256, VR256, |
| 126384 | /* VGF2P8MULBZ128rm */ |
| 126385 | VR128X, VR128X, i128mem, |
| 126386 | /* VGF2P8MULBZ128rmk */ |
| 126387 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 126388 | /* VGF2P8MULBZ128rmkz */ |
| 126389 | VR128X, VK16WM, VR128X, i128mem, |
| 126390 | /* VGF2P8MULBZ128rr */ |
| 126391 | VR128X, VR128X, VR128X, |
| 126392 | /* VGF2P8MULBZ128rrk */ |
| 126393 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 126394 | /* VGF2P8MULBZ128rrkz */ |
| 126395 | VR128X, VK16WM, VR128X, VR128X, |
| 126396 | /* VGF2P8MULBZ256rm */ |
| 126397 | VR256X, VR256X, i256mem, |
| 126398 | /* VGF2P8MULBZ256rmk */ |
| 126399 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 126400 | /* VGF2P8MULBZ256rmkz */ |
| 126401 | VR256X, VK32WM, VR256X, i256mem, |
| 126402 | /* VGF2P8MULBZ256rr */ |
| 126403 | VR256X, VR256X, VR256X, |
| 126404 | /* VGF2P8MULBZ256rrk */ |
| 126405 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 126406 | /* VGF2P8MULBZ256rrkz */ |
| 126407 | VR256X, VK32WM, VR256X, VR256X, |
| 126408 | /* VGF2P8MULBZrm */ |
| 126409 | VR512, VR512, i512mem, |
| 126410 | /* VGF2P8MULBZrmk */ |
| 126411 | VR512, VR512, VK64WM, VR512, i512mem, |
| 126412 | /* VGF2P8MULBZrmkz */ |
| 126413 | VR512, VK64WM, VR512, i512mem, |
| 126414 | /* VGF2P8MULBZrr */ |
| 126415 | VR512, VR512, VR512, |
| 126416 | /* VGF2P8MULBZrrk */ |
| 126417 | VR512, VR512, VK64WM, VR512, VR512, |
| 126418 | /* VGF2P8MULBZrrkz */ |
| 126419 | VR512, VK64WM, VR512, VR512, |
| 126420 | /* VGF2P8MULBrm */ |
| 126421 | VR128, VR128, i128mem, |
| 126422 | /* VGF2P8MULBrr */ |
| 126423 | VR128, VR128, VR128, |
| 126424 | /* VHADDPDYrm */ |
| 126425 | VR256, VR256, f256mem, |
| 126426 | /* VHADDPDYrr */ |
| 126427 | VR256, VR256, VR256, |
| 126428 | /* VHADDPDrm */ |
| 126429 | VR128, VR128, f128mem, |
| 126430 | /* VHADDPDrr */ |
| 126431 | VR128, VR128, VR128, |
| 126432 | /* VHADDPSYrm */ |
| 126433 | VR256, VR256, f256mem, |
| 126434 | /* VHADDPSYrr */ |
| 126435 | VR256, VR256, VR256, |
| 126436 | /* VHADDPSrm */ |
| 126437 | VR128, VR128, f128mem, |
| 126438 | /* VHADDPSrr */ |
| 126439 | VR128, VR128, VR128, |
| 126440 | /* VHSUBPDYrm */ |
| 126441 | VR256, VR256, f256mem, |
| 126442 | /* VHSUBPDYrr */ |
| 126443 | VR256, VR256, VR256, |
| 126444 | /* VHSUBPDrm */ |
| 126445 | VR128, VR128, f128mem, |
| 126446 | /* VHSUBPDrr */ |
| 126447 | VR128, VR128, VR128, |
| 126448 | /* VHSUBPSYrm */ |
| 126449 | VR256, VR256, f256mem, |
| 126450 | /* VHSUBPSYrr */ |
| 126451 | VR256, VR256, VR256, |
| 126452 | /* VHSUBPSrm */ |
| 126453 | VR128, VR128, f128mem, |
| 126454 | /* VHSUBPSrr */ |
| 126455 | VR128, VR128, VR128, |
| 126456 | /* VINSERTF128rm */ |
| 126457 | VR256, VR256, f128mem, u8imm, |
| 126458 | /* VINSERTF128rr */ |
| 126459 | VR256, VR256, VR128, u8imm, |
| 126460 | /* VINSERTF32x4Z256rm */ |
| 126461 | VR256X, VR256X, f128mem, u8imm, |
| 126462 | /* VINSERTF32x4Z256rmk */ |
| 126463 | VR256X, VR256X, VK8WM, VR256X, f128mem, u8imm, |
| 126464 | /* VINSERTF32x4Z256rmkz */ |
| 126465 | VR256X, VK8WM, VR256X, f128mem, u8imm, |
| 126466 | /* VINSERTF32x4Z256rr */ |
| 126467 | VR256X, VR256X, VR128X, u8imm, |
| 126468 | /* VINSERTF32x4Z256rrk */ |
| 126469 | VR256X, VR256X, VK8WM, VR256X, VR128X, u8imm, |
| 126470 | /* VINSERTF32x4Z256rrkz */ |
| 126471 | VR256X, VK8WM, VR256X, VR128X, u8imm, |
| 126472 | /* VINSERTF32x4Zrm */ |
| 126473 | VR512, VR512, f128mem, u8imm, |
| 126474 | /* VINSERTF32x4Zrmk */ |
| 126475 | VR512, VR512, VK16WM, VR512, f128mem, u8imm, |
| 126476 | /* VINSERTF32x4Zrmkz */ |
| 126477 | VR512, VK16WM, VR512, f128mem, u8imm, |
| 126478 | /* VINSERTF32x4Zrr */ |
| 126479 | VR512, VR512, VR128X, u8imm, |
| 126480 | /* VINSERTF32x4Zrrk */ |
| 126481 | VR512, VR512, VK16WM, VR512, VR128X, u8imm, |
| 126482 | /* VINSERTF32x4Zrrkz */ |
| 126483 | VR512, VK16WM, VR512, VR128X, u8imm, |
| 126484 | /* VINSERTF32x8Zrm */ |
| 126485 | VR512, VR512, f256mem, u8imm, |
| 126486 | /* VINSERTF32x8Zrmk */ |
| 126487 | VR512, VR512, VK16WM, VR512, f256mem, u8imm, |
| 126488 | /* VINSERTF32x8Zrmkz */ |
| 126489 | VR512, VK16WM, VR512, f256mem, u8imm, |
| 126490 | /* VINSERTF32x8Zrr */ |
| 126491 | VR512, VR512, VR256X, u8imm, |
| 126492 | /* VINSERTF32x8Zrrk */ |
| 126493 | VR512, VR512, VK16WM, VR512, VR256X, u8imm, |
| 126494 | /* VINSERTF32x8Zrrkz */ |
| 126495 | VR512, VK16WM, VR512, VR256X, u8imm, |
| 126496 | /* VINSERTF64x2Z256rm */ |
| 126497 | VR256X, VR256X, f128mem, u8imm, |
| 126498 | /* VINSERTF64x2Z256rmk */ |
| 126499 | VR256X, VR256X, VK4WM, VR256X, f128mem, u8imm, |
| 126500 | /* VINSERTF64x2Z256rmkz */ |
| 126501 | VR256X, VK4WM, VR256X, f128mem, u8imm, |
| 126502 | /* VINSERTF64x2Z256rr */ |
| 126503 | VR256X, VR256X, VR128X, u8imm, |
| 126504 | /* VINSERTF64x2Z256rrk */ |
| 126505 | VR256X, VR256X, VK4WM, VR256X, VR128X, u8imm, |
| 126506 | /* VINSERTF64x2Z256rrkz */ |
| 126507 | VR256X, VK4WM, VR256X, VR128X, u8imm, |
| 126508 | /* VINSERTF64x2Zrm */ |
| 126509 | VR512, VR512, f128mem, u8imm, |
| 126510 | /* VINSERTF64x2Zrmk */ |
| 126511 | VR512, VR512, VK8WM, VR512, f128mem, u8imm, |
| 126512 | /* VINSERTF64x2Zrmkz */ |
| 126513 | VR512, VK8WM, VR512, f128mem, u8imm, |
| 126514 | /* VINSERTF64x2Zrr */ |
| 126515 | VR512, VR512, VR128X, u8imm, |
| 126516 | /* VINSERTF64x2Zrrk */ |
| 126517 | VR512, VR512, VK8WM, VR512, VR128X, u8imm, |
| 126518 | /* VINSERTF64x2Zrrkz */ |
| 126519 | VR512, VK8WM, VR512, VR128X, u8imm, |
| 126520 | /* VINSERTF64x4Zrm */ |
| 126521 | VR512, VR512, f256mem, u8imm, |
| 126522 | /* VINSERTF64x4Zrmk */ |
| 126523 | VR512, VR512, VK8WM, VR512, f256mem, u8imm, |
| 126524 | /* VINSERTF64x4Zrmkz */ |
| 126525 | VR512, VK8WM, VR512, f256mem, u8imm, |
| 126526 | /* VINSERTF64x4Zrr */ |
| 126527 | VR512, VR512, VR256X, u8imm, |
| 126528 | /* VINSERTF64x4Zrrk */ |
| 126529 | VR512, VR512, VK8WM, VR512, VR256X, u8imm, |
| 126530 | /* VINSERTF64x4Zrrkz */ |
| 126531 | VR512, VK8WM, VR512, VR256X, u8imm, |
| 126532 | /* VINSERTI128rm */ |
| 126533 | VR256, VR256, i128mem, u8imm, |
| 126534 | /* VINSERTI128rr */ |
| 126535 | VR256, VR256, VR128, u8imm, |
| 126536 | /* VINSERTI32x4Z256rm */ |
| 126537 | VR256X, VR256X, i128mem, u8imm, |
| 126538 | /* VINSERTI32x4Z256rmk */ |
| 126539 | VR256X, VR256X, VK8WM, VR256X, i128mem, u8imm, |
| 126540 | /* VINSERTI32x4Z256rmkz */ |
| 126541 | VR256X, VK8WM, VR256X, i128mem, u8imm, |
| 126542 | /* VINSERTI32x4Z256rr */ |
| 126543 | VR256X, VR256X, VR128X, u8imm, |
| 126544 | /* VINSERTI32x4Z256rrk */ |
| 126545 | VR256X, VR256X, VK8WM, VR256X, VR128X, u8imm, |
| 126546 | /* VINSERTI32x4Z256rrkz */ |
| 126547 | VR256X, VK8WM, VR256X, VR128X, u8imm, |
| 126548 | /* VINSERTI32x4Zrm */ |
| 126549 | VR512, VR512, i128mem, u8imm, |
| 126550 | /* VINSERTI32x4Zrmk */ |
| 126551 | VR512, VR512, VK16WM, VR512, i128mem, u8imm, |
| 126552 | /* VINSERTI32x4Zrmkz */ |
| 126553 | VR512, VK16WM, VR512, i128mem, u8imm, |
| 126554 | /* VINSERTI32x4Zrr */ |
| 126555 | VR512, VR512, VR128X, u8imm, |
| 126556 | /* VINSERTI32x4Zrrk */ |
| 126557 | VR512, VR512, VK16WM, VR512, VR128X, u8imm, |
| 126558 | /* VINSERTI32x4Zrrkz */ |
| 126559 | VR512, VK16WM, VR512, VR128X, u8imm, |
| 126560 | /* VINSERTI32x8Zrm */ |
| 126561 | VR512, VR512, i256mem, u8imm, |
| 126562 | /* VINSERTI32x8Zrmk */ |
| 126563 | VR512, VR512, VK16WM, VR512, i256mem, u8imm, |
| 126564 | /* VINSERTI32x8Zrmkz */ |
| 126565 | VR512, VK16WM, VR512, i256mem, u8imm, |
| 126566 | /* VINSERTI32x8Zrr */ |
| 126567 | VR512, VR512, VR256X, u8imm, |
| 126568 | /* VINSERTI32x8Zrrk */ |
| 126569 | VR512, VR512, VK16WM, VR512, VR256X, u8imm, |
| 126570 | /* VINSERTI32x8Zrrkz */ |
| 126571 | VR512, VK16WM, VR512, VR256X, u8imm, |
| 126572 | /* VINSERTI64x2Z256rm */ |
| 126573 | VR256X, VR256X, i128mem, u8imm, |
| 126574 | /* VINSERTI64x2Z256rmk */ |
| 126575 | VR256X, VR256X, VK4WM, VR256X, i128mem, u8imm, |
| 126576 | /* VINSERTI64x2Z256rmkz */ |
| 126577 | VR256X, VK4WM, VR256X, i128mem, u8imm, |
| 126578 | /* VINSERTI64x2Z256rr */ |
| 126579 | VR256X, VR256X, VR128X, u8imm, |
| 126580 | /* VINSERTI64x2Z256rrk */ |
| 126581 | VR256X, VR256X, VK4WM, VR256X, VR128X, u8imm, |
| 126582 | /* VINSERTI64x2Z256rrkz */ |
| 126583 | VR256X, VK4WM, VR256X, VR128X, u8imm, |
| 126584 | /* VINSERTI64x2Zrm */ |
| 126585 | VR512, VR512, i128mem, u8imm, |
| 126586 | /* VINSERTI64x2Zrmk */ |
| 126587 | VR512, VR512, VK8WM, VR512, i128mem, u8imm, |
| 126588 | /* VINSERTI64x2Zrmkz */ |
| 126589 | VR512, VK8WM, VR512, i128mem, u8imm, |
| 126590 | /* VINSERTI64x2Zrr */ |
| 126591 | VR512, VR512, VR128X, u8imm, |
| 126592 | /* VINSERTI64x2Zrrk */ |
| 126593 | VR512, VR512, VK8WM, VR512, VR128X, u8imm, |
| 126594 | /* VINSERTI64x2Zrrkz */ |
| 126595 | VR512, VK8WM, VR512, VR128X, u8imm, |
| 126596 | /* VINSERTI64x4Zrm */ |
| 126597 | VR512, VR512, i256mem, u8imm, |
| 126598 | /* VINSERTI64x4Zrmk */ |
| 126599 | VR512, VR512, VK8WM, VR512, i256mem, u8imm, |
| 126600 | /* VINSERTI64x4Zrmkz */ |
| 126601 | VR512, VK8WM, VR512, i256mem, u8imm, |
| 126602 | /* VINSERTI64x4Zrr */ |
| 126603 | VR512, VR512, VR256X, u8imm, |
| 126604 | /* VINSERTI64x4Zrrk */ |
| 126605 | VR512, VR512, VK8WM, VR512, VR256X, u8imm, |
| 126606 | /* VINSERTI64x4Zrrkz */ |
| 126607 | VR512, VK8WM, VR512, VR256X, u8imm, |
| 126608 | /* VINSERTPSZrm */ |
| 126609 | VR128X, VR128X, f32mem, u8imm, |
| 126610 | /* VINSERTPSZrr */ |
| 126611 | VR128X, VR128X, VR128X, u8imm, |
| 126612 | /* VINSERTPSrm */ |
| 126613 | VR128, VR128, f32mem, u8imm, |
| 126614 | /* VINSERTPSrr */ |
| 126615 | VR128, VR128, VR128, u8imm, |
| 126616 | /* VLDDQUYrm */ |
| 126617 | VR256, i256mem, |
| 126618 | /* VLDDQUrm */ |
| 126619 | VR128, i128mem, |
| 126620 | /* VLDMXCSR */ |
| 126621 | i32mem, |
| 126622 | /* VMASKMOVDQU */ |
| 126623 | VR128, VR128, |
| 126624 | /* VMASKMOVDQU64 */ |
| 126625 | VR128, VR128, |
| 126626 | /* VMASKMOVPDYmr */ |
| 126627 | f256mem, VR256, VR256, |
| 126628 | /* VMASKMOVPDYrm */ |
| 126629 | VR256, VR256, f256mem, |
| 126630 | /* VMASKMOVPDmr */ |
| 126631 | f128mem, VR128, VR128, |
| 126632 | /* VMASKMOVPDrm */ |
| 126633 | VR128, VR128, f128mem, |
| 126634 | /* VMASKMOVPSYmr */ |
| 126635 | f256mem, VR256, VR256, |
| 126636 | /* VMASKMOVPSYrm */ |
| 126637 | VR256, VR256, f256mem, |
| 126638 | /* VMASKMOVPSmr */ |
| 126639 | f128mem, VR128, VR128, |
| 126640 | /* VMASKMOVPSrm */ |
| 126641 | VR128, VR128, f128mem, |
| 126642 | /* VMAXCPDYrm */ |
| 126643 | VR256, VR256, f256mem, |
| 126644 | /* VMAXCPDYrr */ |
| 126645 | VR256, VR256, VR256, |
| 126646 | /* VMAXCPDZ128rm */ |
| 126647 | VR128X, VR128X, f128mem, |
| 126648 | /* VMAXCPDZ128rmb */ |
| 126649 | VR128X, VR128X, f64mem, |
| 126650 | /* VMAXCPDZ128rmbk */ |
| 126651 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 126652 | /* VMAXCPDZ128rmbkz */ |
| 126653 | VR128X, VK2WM, VR128X, f64mem, |
| 126654 | /* VMAXCPDZ128rmk */ |
| 126655 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 126656 | /* VMAXCPDZ128rmkz */ |
| 126657 | VR128X, VK2WM, VR128X, f128mem, |
| 126658 | /* VMAXCPDZ128rr */ |
| 126659 | VR128X, VR128X, VR128X, |
| 126660 | /* VMAXCPDZ128rrk */ |
| 126661 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 126662 | /* VMAXCPDZ128rrkz */ |
| 126663 | VR128X, VK2WM, VR128X, VR128X, |
| 126664 | /* VMAXCPDZ256rm */ |
| 126665 | VR256X, VR256X, f256mem, |
| 126666 | /* VMAXCPDZ256rmb */ |
| 126667 | VR256X, VR256X, f64mem, |
| 126668 | /* VMAXCPDZ256rmbk */ |
| 126669 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 126670 | /* VMAXCPDZ256rmbkz */ |
| 126671 | VR256X, VK4WM, VR256X, f64mem, |
| 126672 | /* VMAXCPDZ256rmk */ |
| 126673 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 126674 | /* VMAXCPDZ256rmkz */ |
| 126675 | VR256X, VK4WM, VR256X, f256mem, |
| 126676 | /* VMAXCPDZ256rr */ |
| 126677 | VR256X, VR256X, VR256X, |
| 126678 | /* VMAXCPDZ256rrk */ |
| 126679 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 126680 | /* VMAXCPDZ256rrkz */ |
| 126681 | VR256X, VK4WM, VR256X, VR256X, |
| 126682 | /* VMAXCPDZrm */ |
| 126683 | VR512, VR512, f512mem, |
| 126684 | /* VMAXCPDZrmb */ |
| 126685 | VR512, VR512, f64mem, |
| 126686 | /* VMAXCPDZrmbk */ |
| 126687 | VR512, VR512, VK8WM, VR512, f64mem, |
| 126688 | /* VMAXCPDZrmbkz */ |
| 126689 | VR512, VK8WM, VR512, f64mem, |
| 126690 | /* VMAXCPDZrmk */ |
| 126691 | VR512, VR512, VK8WM, VR512, f512mem, |
| 126692 | /* VMAXCPDZrmkz */ |
| 126693 | VR512, VK8WM, VR512, f512mem, |
| 126694 | /* VMAXCPDZrr */ |
| 126695 | VR512, VR512, VR512, |
| 126696 | /* VMAXCPDZrrk */ |
| 126697 | VR512, VR512, VK8WM, VR512, VR512, |
| 126698 | /* VMAXCPDZrrkz */ |
| 126699 | VR512, VK8WM, VR512, VR512, |
| 126700 | /* VMAXCPDrm */ |
| 126701 | VR128, VR128, f128mem, |
| 126702 | /* VMAXCPDrr */ |
| 126703 | VR128, VR128, VR128, |
| 126704 | /* VMAXCPHZ128rm */ |
| 126705 | VR128X, VR128X, f128mem, |
| 126706 | /* VMAXCPHZ128rmb */ |
| 126707 | VR128X, VR128X, f16mem, |
| 126708 | /* VMAXCPHZ128rmbk */ |
| 126709 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 126710 | /* VMAXCPHZ128rmbkz */ |
| 126711 | VR128X, VK8WM, VR128X, f16mem, |
| 126712 | /* VMAXCPHZ128rmk */ |
| 126713 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 126714 | /* VMAXCPHZ128rmkz */ |
| 126715 | VR128X, VK8WM, VR128X, f128mem, |
| 126716 | /* VMAXCPHZ128rr */ |
| 126717 | VR128X, VR128X, VR128X, |
| 126718 | /* VMAXCPHZ128rrk */ |
| 126719 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 126720 | /* VMAXCPHZ128rrkz */ |
| 126721 | VR128X, VK8WM, VR128X, VR128X, |
| 126722 | /* VMAXCPHZ256rm */ |
| 126723 | VR256X, VR256X, f256mem, |
| 126724 | /* VMAXCPHZ256rmb */ |
| 126725 | VR256X, VR256X, f16mem, |
| 126726 | /* VMAXCPHZ256rmbk */ |
| 126727 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 126728 | /* VMAXCPHZ256rmbkz */ |
| 126729 | VR256X, VK16WM, VR256X, f16mem, |
| 126730 | /* VMAXCPHZ256rmk */ |
| 126731 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 126732 | /* VMAXCPHZ256rmkz */ |
| 126733 | VR256X, VK16WM, VR256X, f256mem, |
| 126734 | /* VMAXCPHZ256rr */ |
| 126735 | VR256X, VR256X, VR256X, |
| 126736 | /* VMAXCPHZ256rrk */ |
| 126737 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 126738 | /* VMAXCPHZ256rrkz */ |
| 126739 | VR256X, VK16WM, VR256X, VR256X, |
| 126740 | /* VMAXCPHZrm */ |
| 126741 | VR512, VR512, f512mem, |
| 126742 | /* VMAXCPHZrmb */ |
| 126743 | VR512, VR512, f16mem, |
| 126744 | /* VMAXCPHZrmbk */ |
| 126745 | VR512, VR512, VK32WM, VR512, f16mem, |
| 126746 | /* VMAXCPHZrmbkz */ |
| 126747 | VR512, VK32WM, VR512, f16mem, |
| 126748 | /* VMAXCPHZrmk */ |
| 126749 | VR512, VR512, VK32WM, VR512, f512mem, |
| 126750 | /* VMAXCPHZrmkz */ |
| 126751 | VR512, VK32WM, VR512, f512mem, |
| 126752 | /* VMAXCPHZrr */ |
| 126753 | VR512, VR512, VR512, |
| 126754 | /* VMAXCPHZrrk */ |
| 126755 | VR512, VR512, VK32WM, VR512, VR512, |
| 126756 | /* VMAXCPHZrrkz */ |
| 126757 | VR512, VK32WM, VR512, VR512, |
| 126758 | /* VMAXCPSYrm */ |
| 126759 | VR256, VR256, f256mem, |
| 126760 | /* VMAXCPSYrr */ |
| 126761 | VR256, VR256, VR256, |
| 126762 | /* VMAXCPSZ128rm */ |
| 126763 | VR128X, VR128X, f128mem, |
| 126764 | /* VMAXCPSZ128rmb */ |
| 126765 | VR128X, VR128X, f32mem, |
| 126766 | /* VMAXCPSZ128rmbk */ |
| 126767 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 126768 | /* VMAXCPSZ128rmbkz */ |
| 126769 | VR128X, VK4WM, VR128X, f32mem, |
| 126770 | /* VMAXCPSZ128rmk */ |
| 126771 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 126772 | /* VMAXCPSZ128rmkz */ |
| 126773 | VR128X, VK4WM, VR128X, f128mem, |
| 126774 | /* VMAXCPSZ128rr */ |
| 126775 | VR128X, VR128X, VR128X, |
| 126776 | /* VMAXCPSZ128rrk */ |
| 126777 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126778 | /* VMAXCPSZ128rrkz */ |
| 126779 | VR128X, VK4WM, VR128X, VR128X, |
| 126780 | /* VMAXCPSZ256rm */ |
| 126781 | VR256X, VR256X, f256mem, |
| 126782 | /* VMAXCPSZ256rmb */ |
| 126783 | VR256X, VR256X, f32mem, |
| 126784 | /* VMAXCPSZ256rmbk */ |
| 126785 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 126786 | /* VMAXCPSZ256rmbkz */ |
| 126787 | VR256X, VK8WM, VR256X, f32mem, |
| 126788 | /* VMAXCPSZ256rmk */ |
| 126789 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 126790 | /* VMAXCPSZ256rmkz */ |
| 126791 | VR256X, VK8WM, VR256X, f256mem, |
| 126792 | /* VMAXCPSZ256rr */ |
| 126793 | VR256X, VR256X, VR256X, |
| 126794 | /* VMAXCPSZ256rrk */ |
| 126795 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 126796 | /* VMAXCPSZ256rrkz */ |
| 126797 | VR256X, VK8WM, VR256X, VR256X, |
| 126798 | /* VMAXCPSZrm */ |
| 126799 | VR512, VR512, f512mem, |
| 126800 | /* VMAXCPSZrmb */ |
| 126801 | VR512, VR512, f32mem, |
| 126802 | /* VMAXCPSZrmbk */ |
| 126803 | VR512, VR512, VK16WM, VR512, f32mem, |
| 126804 | /* VMAXCPSZrmbkz */ |
| 126805 | VR512, VK16WM, VR512, f32mem, |
| 126806 | /* VMAXCPSZrmk */ |
| 126807 | VR512, VR512, VK16WM, VR512, f512mem, |
| 126808 | /* VMAXCPSZrmkz */ |
| 126809 | VR512, VK16WM, VR512, f512mem, |
| 126810 | /* VMAXCPSZrr */ |
| 126811 | VR512, VR512, VR512, |
| 126812 | /* VMAXCPSZrrk */ |
| 126813 | VR512, VR512, VK16WM, VR512, VR512, |
| 126814 | /* VMAXCPSZrrkz */ |
| 126815 | VR512, VK16WM, VR512, VR512, |
| 126816 | /* VMAXCPSrm */ |
| 126817 | VR128, VR128, f128mem, |
| 126818 | /* VMAXCPSrr */ |
| 126819 | VR128, VR128, VR128, |
| 126820 | /* VMAXCSDZrm */ |
| 126821 | FR64X, FR64X, f64mem, |
| 126822 | /* VMAXCSDZrr */ |
| 126823 | FR64X, FR64X, FR64X, |
| 126824 | /* VMAXCSDrm */ |
| 126825 | FR64, FR64, f64mem, |
| 126826 | /* VMAXCSDrr */ |
| 126827 | FR64, FR64, FR64, |
| 126828 | /* VMAXCSHZrm */ |
| 126829 | FR16X, FR16X, f16mem, |
| 126830 | /* VMAXCSHZrr */ |
| 126831 | FR16X, FR16X, FR16X, |
| 126832 | /* VMAXCSSZrm */ |
| 126833 | FR32X, FR32X, f32mem, |
| 126834 | /* VMAXCSSZrr */ |
| 126835 | FR32X, FR32X, FR32X, |
| 126836 | /* VMAXCSSrm */ |
| 126837 | FR32, FR32, f32mem, |
| 126838 | /* VMAXCSSrr */ |
| 126839 | FR32, FR32, FR32, |
| 126840 | /* VMAXPDYrm */ |
| 126841 | VR256, VR256, f256mem, |
| 126842 | /* VMAXPDYrr */ |
| 126843 | VR256, VR256, VR256, |
| 126844 | /* VMAXPDZ128rm */ |
| 126845 | VR128X, VR128X, f128mem, |
| 126846 | /* VMAXPDZ128rmb */ |
| 126847 | VR128X, VR128X, f64mem, |
| 126848 | /* VMAXPDZ128rmbk */ |
| 126849 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 126850 | /* VMAXPDZ128rmbkz */ |
| 126851 | VR128X, VK2WM, VR128X, f64mem, |
| 126852 | /* VMAXPDZ128rmk */ |
| 126853 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 126854 | /* VMAXPDZ128rmkz */ |
| 126855 | VR128X, VK2WM, VR128X, f128mem, |
| 126856 | /* VMAXPDZ128rr */ |
| 126857 | VR128X, VR128X, VR128X, |
| 126858 | /* VMAXPDZ128rrk */ |
| 126859 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 126860 | /* VMAXPDZ128rrkz */ |
| 126861 | VR128X, VK2WM, VR128X, VR128X, |
| 126862 | /* VMAXPDZ256rm */ |
| 126863 | VR256X, VR256X, f256mem, |
| 126864 | /* VMAXPDZ256rmb */ |
| 126865 | VR256X, VR256X, f64mem, |
| 126866 | /* VMAXPDZ256rmbk */ |
| 126867 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 126868 | /* VMAXPDZ256rmbkz */ |
| 126869 | VR256X, VK4WM, VR256X, f64mem, |
| 126870 | /* VMAXPDZ256rmk */ |
| 126871 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 126872 | /* VMAXPDZ256rmkz */ |
| 126873 | VR256X, VK4WM, VR256X, f256mem, |
| 126874 | /* VMAXPDZ256rr */ |
| 126875 | VR256X, VR256X, VR256X, |
| 126876 | /* VMAXPDZ256rrk */ |
| 126877 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 126878 | /* VMAXPDZ256rrkz */ |
| 126879 | VR256X, VK4WM, VR256X, VR256X, |
| 126880 | /* VMAXPDZrm */ |
| 126881 | VR512, VR512, f512mem, |
| 126882 | /* VMAXPDZrmb */ |
| 126883 | VR512, VR512, f64mem, |
| 126884 | /* VMAXPDZrmbk */ |
| 126885 | VR512, VR512, VK8WM, VR512, f64mem, |
| 126886 | /* VMAXPDZrmbkz */ |
| 126887 | VR512, VK8WM, VR512, f64mem, |
| 126888 | /* VMAXPDZrmk */ |
| 126889 | VR512, VR512, VK8WM, VR512, f512mem, |
| 126890 | /* VMAXPDZrmkz */ |
| 126891 | VR512, VK8WM, VR512, f512mem, |
| 126892 | /* VMAXPDZrr */ |
| 126893 | VR512, VR512, VR512, |
| 126894 | /* VMAXPDZrrb */ |
| 126895 | VR512, VR512, VR512, |
| 126896 | /* VMAXPDZrrbk */ |
| 126897 | VR512, VR512, VK8WM, VR512, VR512, |
| 126898 | /* VMAXPDZrrbkz */ |
| 126899 | VR512, VK8WM, VR512, VR512, |
| 126900 | /* VMAXPDZrrk */ |
| 126901 | VR512, VR512, VK8WM, VR512, VR512, |
| 126902 | /* VMAXPDZrrkz */ |
| 126903 | VR512, VK8WM, VR512, VR512, |
| 126904 | /* VMAXPDrm */ |
| 126905 | VR128, VR128, f128mem, |
| 126906 | /* VMAXPDrr */ |
| 126907 | VR128, VR128, VR128, |
| 126908 | /* VMAXPHZ128rm */ |
| 126909 | VR128X, VR128X, f128mem, |
| 126910 | /* VMAXPHZ128rmb */ |
| 126911 | VR128X, VR128X, f16mem, |
| 126912 | /* VMAXPHZ128rmbk */ |
| 126913 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 126914 | /* VMAXPHZ128rmbkz */ |
| 126915 | VR128X, VK8WM, VR128X, f16mem, |
| 126916 | /* VMAXPHZ128rmk */ |
| 126917 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 126918 | /* VMAXPHZ128rmkz */ |
| 126919 | VR128X, VK8WM, VR128X, f128mem, |
| 126920 | /* VMAXPHZ128rr */ |
| 126921 | VR128X, VR128X, VR128X, |
| 126922 | /* VMAXPHZ128rrk */ |
| 126923 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 126924 | /* VMAXPHZ128rrkz */ |
| 126925 | VR128X, VK8WM, VR128X, VR128X, |
| 126926 | /* VMAXPHZ256rm */ |
| 126927 | VR256X, VR256X, f256mem, |
| 126928 | /* VMAXPHZ256rmb */ |
| 126929 | VR256X, VR256X, f16mem, |
| 126930 | /* VMAXPHZ256rmbk */ |
| 126931 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 126932 | /* VMAXPHZ256rmbkz */ |
| 126933 | VR256X, VK16WM, VR256X, f16mem, |
| 126934 | /* VMAXPHZ256rmk */ |
| 126935 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 126936 | /* VMAXPHZ256rmkz */ |
| 126937 | VR256X, VK16WM, VR256X, f256mem, |
| 126938 | /* VMAXPHZ256rr */ |
| 126939 | VR256X, VR256X, VR256X, |
| 126940 | /* VMAXPHZ256rrk */ |
| 126941 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 126942 | /* VMAXPHZ256rrkz */ |
| 126943 | VR256X, VK16WM, VR256X, VR256X, |
| 126944 | /* VMAXPHZrm */ |
| 126945 | VR512, VR512, f512mem, |
| 126946 | /* VMAXPHZrmb */ |
| 126947 | VR512, VR512, f16mem, |
| 126948 | /* VMAXPHZrmbk */ |
| 126949 | VR512, VR512, VK32WM, VR512, f16mem, |
| 126950 | /* VMAXPHZrmbkz */ |
| 126951 | VR512, VK32WM, VR512, f16mem, |
| 126952 | /* VMAXPHZrmk */ |
| 126953 | VR512, VR512, VK32WM, VR512, f512mem, |
| 126954 | /* VMAXPHZrmkz */ |
| 126955 | VR512, VK32WM, VR512, f512mem, |
| 126956 | /* VMAXPHZrr */ |
| 126957 | VR512, VR512, VR512, |
| 126958 | /* VMAXPHZrrb */ |
| 126959 | VR512, VR512, VR512, |
| 126960 | /* VMAXPHZrrbk */ |
| 126961 | VR512, VR512, VK32WM, VR512, VR512, |
| 126962 | /* VMAXPHZrrbkz */ |
| 126963 | VR512, VK32WM, VR512, VR512, |
| 126964 | /* VMAXPHZrrk */ |
| 126965 | VR512, VR512, VK32WM, VR512, VR512, |
| 126966 | /* VMAXPHZrrkz */ |
| 126967 | VR512, VK32WM, VR512, VR512, |
| 126968 | /* VMAXPSYrm */ |
| 126969 | VR256, VR256, f256mem, |
| 126970 | /* VMAXPSYrr */ |
| 126971 | VR256, VR256, VR256, |
| 126972 | /* VMAXPSZ128rm */ |
| 126973 | VR128X, VR128X, f128mem, |
| 126974 | /* VMAXPSZ128rmb */ |
| 126975 | VR128X, VR128X, f32mem, |
| 126976 | /* VMAXPSZ128rmbk */ |
| 126977 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 126978 | /* VMAXPSZ128rmbkz */ |
| 126979 | VR128X, VK4WM, VR128X, f32mem, |
| 126980 | /* VMAXPSZ128rmk */ |
| 126981 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 126982 | /* VMAXPSZ128rmkz */ |
| 126983 | VR128X, VK4WM, VR128X, f128mem, |
| 126984 | /* VMAXPSZ128rr */ |
| 126985 | VR128X, VR128X, VR128X, |
| 126986 | /* VMAXPSZ128rrk */ |
| 126987 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 126988 | /* VMAXPSZ128rrkz */ |
| 126989 | VR128X, VK4WM, VR128X, VR128X, |
| 126990 | /* VMAXPSZ256rm */ |
| 126991 | VR256X, VR256X, f256mem, |
| 126992 | /* VMAXPSZ256rmb */ |
| 126993 | VR256X, VR256X, f32mem, |
| 126994 | /* VMAXPSZ256rmbk */ |
| 126995 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 126996 | /* VMAXPSZ256rmbkz */ |
| 126997 | VR256X, VK8WM, VR256X, f32mem, |
| 126998 | /* VMAXPSZ256rmk */ |
| 126999 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 127000 | /* VMAXPSZ256rmkz */ |
| 127001 | VR256X, VK8WM, VR256X, f256mem, |
| 127002 | /* VMAXPSZ256rr */ |
| 127003 | VR256X, VR256X, VR256X, |
| 127004 | /* VMAXPSZ256rrk */ |
| 127005 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127006 | /* VMAXPSZ256rrkz */ |
| 127007 | VR256X, VK8WM, VR256X, VR256X, |
| 127008 | /* VMAXPSZrm */ |
| 127009 | VR512, VR512, f512mem, |
| 127010 | /* VMAXPSZrmb */ |
| 127011 | VR512, VR512, f32mem, |
| 127012 | /* VMAXPSZrmbk */ |
| 127013 | VR512, VR512, VK16WM, VR512, f32mem, |
| 127014 | /* VMAXPSZrmbkz */ |
| 127015 | VR512, VK16WM, VR512, f32mem, |
| 127016 | /* VMAXPSZrmk */ |
| 127017 | VR512, VR512, VK16WM, VR512, f512mem, |
| 127018 | /* VMAXPSZrmkz */ |
| 127019 | VR512, VK16WM, VR512, f512mem, |
| 127020 | /* VMAXPSZrr */ |
| 127021 | VR512, VR512, VR512, |
| 127022 | /* VMAXPSZrrb */ |
| 127023 | VR512, VR512, VR512, |
| 127024 | /* VMAXPSZrrbk */ |
| 127025 | VR512, VR512, VK16WM, VR512, VR512, |
| 127026 | /* VMAXPSZrrbkz */ |
| 127027 | VR512, VK16WM, VR512, VR512, |
| 127028 | /* VMAXPSZrrk */ |
| 127029 | VR512, VR512, VK16WM, VR512, VR512, |
| 127030 | /* VMAXPSZrrkz */ |
| 127031 | VR512, VK16WM, VR512, VR512, |
| 127032 | /* VMAXPSrm */ |
| 127033 | VR128, VR128, f128mem, |
| 127034 | /* VMAXPSrr */ |
| 127035 | VR128, VR128, VR128, |
| 127036 | /* VMAXSDZrm */ |
| 127037 | FR64X, FR64X, f64mem, |
| 127038 | /* VMAXSDZrm_Int */ |
| 127039 | VR128X, VR128X, sdmem, |
| 127040 | /* VMAXSDZrm_Intk */ |
| 127041 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 127042 | /* VMAXSDZrm_Intkz */ |
| 127043 | VR128X, VK1WM, VR128X, sdmem, |
| 127044 | /* VMAXSDZrr */ |
| 127045 | FR64X, FR64X, FR64X, |
| 127046 | /* VMAXSDZrr_Int */ |
| 127047 | VR128X, VR128X, VR128X, |
| 127048 | /* VMAXSDZrr_Intk */ |
| 127049 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127050 | /* VMAXSDZrr_Intkz */ |
| 127051 | VR128X, VK1WM, VR128X, VR128X, |
| 127052 | /* VMAXSDZrrb_Int */ |
| 127053 | VR128X, VR128X, VR128X, |
| 127054 | /* VMAXSDZrrb_Intk */ |
| 127055 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127056 | /* VMAXSDZrrb_Intkz */ |
| 127057 | VR128X, VK1WM, VR128X, VR128X, |
| 127058 | /* VMAXSDrm */ |
| 127059 | FR64, FR64, f64mem, |
| 127060 | /* VMAXSDrm_Int */ |
| 127061 | VR128, VR128, sdmem, |
| 127062 | /* VMAXSDrr */ |
| 127063 | FR64, FR64, FR64, |
| 127064 | /* VMAXSDrr_Int */ |
| 127065 | VR128, VR128, VR128, |
| 127066 | /* VMAXSHZrm */ |
| 127067 | FR16X, FR16X, f16mem, |
| 127068 | /* VMAXSHZrm_Int */ |
| 127069 | VR128X, VR128X, shmem, |
| 127070 | /* VMAXSHZrm_Intk */ |
| 127071 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 127072 | /* VMAXSHZrm_Intkz */ |
| 127073 | VR128X, VK1WM, VR128X, shmem, |
| 127074 | /* VMAXSHZrr */ |
| 127075 | FR16X, FR16X, FR16X, |
| 127076 | /* VMAXSHZrr_Int */ |
| 127077 | VR128X, VR128X, VR128X, |
| 127078 | /* VMAXSHZrr_Intk */ |
| 127079 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127080 | /* VMAXSHZrr_Intkz */ |
| 127081 | VR128X, VK1WM, VR128X, VR128X, |
| 127082 | /* VMAXSHZrrb_Int */ |
| 127083 | VR128X, VR128X, VR128X, |
| 127084 | /* VMAXSHZrrb_Intk */ |
| 127085 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127086 | /* VMAXSHZrrb_Intkz */ |
| 127087 | VR128X, VK1WM, VR128X, VR128X, |
| 127088 | /* VMAXSSZrm */ |
| 127089 | FR32X, FR32X, f32mem, |
| 127090 | /* VMAXSSZrm_Int */ |
| 127091 | VR128X, VR128X, ssmem, |
| 127092 | /* VMAXSSZrm_Intk */ |
| 127093 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 127094 | /* VMAXSSZrm_Intkz */ |
| 127095 | VR128X, VK1WM, VR128X, ssmem, |
| 127096 | /* VMAXSSZrr */ |
| 127097 | FR32X, FR32X, FR32X, |
| 127098 | /* VMAXSSZrr_Int */ |
| 127099 | VR128X, VR128X, VR128X, |
| 127100 | /* VMAXSSZrr_Intk */ |
| 127101 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127102 | /* VMAXSSZrr_Intkz */ |
| 127103 | VR128X, VK1WM, VR128X, VR128X, |
| 127104 | /* VMAXSSZrrb_Int */ |
| 127105 | VR128X, VR128X, VR128X, |
| 127106 | /* VMAXSSZrrb_Intk */ |
| 127107 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127108 | /* VMAXSSZrrb_Intkz */ |
| 127109 | VR128X, VK1WM, VR128X, VR128X, |
| 127110 | /* VMAXSSrm */ |
| 127111 | FR32, FR32, f32mem, |
| 127112 | /* VMAXSSrm_Int */ |
| 127113 | VR128, VR128, ssmem, |
| 127114 | /* VMAXSSrr */ |
| 127115 | FR32, FR32, FR32, |
| 127116 | /* VMAXSSrr_Int */ |
| 127117 | VR128, VR128, VR128, |
| 127118 | /* VMCALL */ |
| 127119 | /* VMCLEARm */ |
| 127120 | i64mem, |
| 127121 | /* VMFUNC */ |
| 127122 | /* VMINCPDYrm */ |
| 127123 | VR256, VR256, f256mem, |
| 127124 | /* VMINCPDYrr */ |
| 127125 | VR256, VR256, VR256, |
| 127126 | /* VMINCPDZ128rm */ |
| 127127 | VR128X, VR128X, f128mem, |
| 127128 | /* VMINCPDZ128rmb */ |
| 127129 | VR128X, VR128X, f64mem, |
| 127130 | /* VMINCPDZ128rmbk */ |
| 127131 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 127132 | /* VMINCPDZ128rmbkz */ |
| 127133 | VR128X, VK2WM, VR128X, f64mem, |
| 127134 | /* VMINCPDZ128rmk */ |
| 127135 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 127136 | /* VMINCPDZ128rmkz */ |
| 127137 | VR128X, VK2WM, VR128X, f128mem, |
| 127138 | /* VMINCPDZ128rr */ |
| 127139 | VR128X, VR128X, VR128X, |
| 127140 | /* VMINCPDZ128rrk */ |
| 127141 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 127142 | /* VMINCPDZ128rrkz */ |
| 127143 | VR128X, VK2WM, VR128X, VR128X, |
| 127144 | /* VMINCPDZ256rm */ |
| 127145 | VR256X, VR256X, f256mem, |
| 127146 | /* VMINCPDZ256rmb */ |
| 127147 | VR256X, VR256X, f64mem, |
| 127148 | /* VMINCPDZ256rmbk */ |
| 127149 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 127150 | /* VMINCPDZ256rmbkz */ |
| 127151 | VR256X, VK4WM, VR256X, f64mem, |
| 127152 | /* VMINCPDZ256rmk */ |
| 127153 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 127154 | /* VMINCPDZ256rmkz */ |
| 127155 | VR256X, VK4WM, VR256X, f256mem, |
| 127156 | /* VMINCPDZ256rr */ |
| 127157 | VR256X, VR256X, VR256X, |
| 127158 | /* VMINCPDZ256rrk */ |
| 127159 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 127160 | /* VMINCPDZ256rrkz */ |
| 127161 | VR256X, VK4WM, VR256X, VR256X, |
| 127162 | /* VMINCPDZrm */ |
| 127163 | VR512, VR512, f512mem, |
| 127164 | /* VMINCPDZrmb */ |
| 127165 | VR512, VR512, f64mem, |
| 127166 | /* VMINCPDZrmbk */ |
| 127167 | VR512, VR512, VK8WM, VR512, f64mem, |
| 127168 | /* VMINCPDZrmbkz */ |
| 127169 | VR512, VK8WM, VR512, f64mem, |
| 127170 | /* VMINCPDZrmk */ |
| 127171 | VR512, VR512, VK8WM, VR512, f512mem, |
| 127172 | /* VMINCPDZrmkz */ |
| 127173 | VR512, VK8WM, VR512, f512mem, |
| 127174 | /* VMINCPDZrr */ |
| 127175 | VR512, VR512, VR512, |
| 127176 | /* VMINCPDZrrk */ |
| 127177 | VR512, VR512, VK8WM, VR512, VR512, |
| 127178 | /* VMINCPDZrrkz */ |
| 127179 | VR512, VK8WM, VR512, VR512, |
| 127180 | /* VMINCPDrm */ |
| 127181 | VR128, VR128, f128mem, |
| 127182 | /* VMINCPDrr */ |
| 127183 | VR128, VR128, VR128, |
| 127184 | /* VMINCPHZ128rm */ |
| 127185 | VR128X, VR128X, f128mem, |
| 127186 | /* VMINCPHZ128rmb */ |
| 127187 | VR128X, VR128X, f16mem, |
| 127188 | /* VMINCPHZ128rmbk */ |
| 127189 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 127190 | /* VMINCPHZ128rmbkz */ |
| 127191 | VR128X, VK8WM, VR128X, f16mem, |
| 127192 | /* VMINCPHZ128rmk */ |
| 127193 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 127194 | /* VMINCPHZ128rmkz */ |
| 127195 | VR128X, VK8WM, VR128X, f128mem, |
| 127196 | /* VMINCPHZ128rr */ |
| 127197 | VR128X, VR128X, VR128X, |
| 127198 | /* VMINCPHZ128rrk */ |
| 127199 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 127200 | /* VMINCPHZ128rrkz */ |
| 127201 | VR128X, VK8WM, VR128X, VR128X, |
| 127202 | /* VMINCPHZ256rm */ |
| 127203 | VR256X, VR256X, f256mem, |
| 127204 | /* VMINCPHZ256rmb */ |
| 127205 | VR256X, VR256X, f16mem, |
| 127206 | /* VMINCPHZ256rmbk */ |
| 127207 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 127208 | /* VMINCPHZ256rmbkz */ |
| 127209 | VR256X, VK16WM, VR256X, f16mem, |
| 127210 | /* VMINCPHZ256rmk */ |
| 127211 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 127212 | /* VMINCPHZ256rmkz */ |
| 127213 | VR256X, VK16WM, VR256X, f256mem, |
| 127214 | /* VMINCPHZ256rr */ |
| 127215 | VR256X, VR256X, VR256X, |
| 127216 | /* VMINCPHZ256rrk */ |
| 127217 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 127218 | /* VMINCPHZ256rrkz */ |
| 127219 | VR256X, VK16WM, VR256X, VR256X, |
| 127220 | /* VMINCPHZrm */ |
| 127221 | VR512, VR512, f512mem, |
| 127222 | /* VMINCPHZrmb */ |
| 127223 | VR512, VR512, f16mem, |
| 127224 | /* VMINCPHZrmbk */ |
| 127225 | VR512, VR512, VK32WM, VR512, f16mem, |
| 127226 | /* VMINCPHZrmbkz */ |
| 127227 | VR512, VK32WM, VR512, f16mem, |
| 127228 | /* VMINCPHZrmk */ |
| 127229 | VR512, VR512, VK32WM, VR512, f512mem, |
| 127230 | /* VMINCPHZrmkz */ |
| 127231 | VR512, VK32WM, VR512, f512mem, |
| 127232 | /* VMINCPHZrr */ |
| 127233 | VR512, VR512, VR512, |
| 127234 | /* VMINCPHZrrk */ |
| 127235 | VR512, VR512, VK32WM, VR512, VR512, |
| 127236 | /* VMINCPHZrrkz */ |
| 127237 | VR512, VK32WM, VR512, VR512, |
| 127238 | /* VMINCPSYrm */ |
| 127239 | VR256, VR256, f256mem, |
| 127240 | /* VMINCPSYrr */ |
| 127241 | VR256, VR256, VR256, |
| 127242 | /* VMINCPSZ128rm */ |
| 127243 | VR128X, VR128X, f128mem, |
| 127244 | /* VMINCPSZ128rmb */ |
| 127245 | VR128X, VR128X, f32mem, |
| 127246 | /* VMINCPSZ128rmbk */ |
| 127247 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 127248 | /* VMINCPSZ128rmbkz */ |
| 127249 | VR128X, VK4WM, VR128X, f32mem, |
| 127250 | /* VMINCPSZ128rmk */ |
| 127251 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 127252 | /* VMINCPSZ128rmkz */ |
| 127253 | VR128X, VK4WM, VR128X, f128mem, |
| 127254 | /* VMINCPSZ128rr */ |
| 127255 | VR128X, VR128X, VR128X, |
| 127256 | /* VMINCPSZ128rrk */ |
| 127257 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127258 | /* VMINCPSZ128rrkz */ |
| 127259 | VR128X, VK4WM, VR128X, VR128X, |
| 127260 | /* VMINCPSZ256rm */ |
| 127261 | VR256X, VR256X, f256mem, |
| 127262 | /* VMINCPSZ256rmb */ |
| 127263 | VR256X, VR256X, f32mem, |
| 127264 | /* VMINCPSZ256rmbk */ |
| 127265 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 127266 | /* VMINCPSZ256rmbkz */ |
| 127267 | VR256X, VK8WM, VR256X, f32mem, |
| 127268 | /* VMINCPSZ256rmk */ |
| 127269 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 127270 | /* VMINCPSZ256rmkz */ |
| 127271 | VR256X, VK8WM, VR256X, f256mem, |
| 127272 | /* VMINCPSZ256rr */ |
| 127273 | VR256X, VR256X, VR256X, |
| 127274 | /* VMINCPSZ256rrk */ |
| 127275 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127276 | /* VMINCPSZ256rrkz */ |
| 127277 | VR256X, VK8WM, VR256X, VR256X, |
| 127278 | /* VMINCPSZrm */ |
| 127279 | VR512, VR512, f512mem, |
| 127280 | /* VMINCPSZrmb */ |
| 127281 | VR512, VR512, f32mem, |
| 127282 | /* VMINCPSZrmbk */ |
| 127283 | VR512, VR512, VK16WM, VR512, f32mem, |
| 127284 | /* VMINCPSZrmbkz */ |
| 127285 | VR512, VK16WM, VR512, f32mem, |
| 127286 | /* VMINCPSZrmk */ |
| 127287 | VR512, VR512, VK16WM, VR512, f512mem, |
| 127288 | /* VMINCPSZrmkz */ |
| 127289 | VR512, VK16WM, VR512, f512mem, |
| 127290 | /* VMINCPSZrr */ |
| 127291 | VR512, VR512, VR512, |
| 127292 | /* VMINCPSZrrk */ |
| 127293 | VR512, VR512, VK16WM, VR512, VR512, |
| 127294 | /* VMINCPSZrrkz */ |
| 127295 | VR512, VK16WM, VR512, VR512, |
| 127296 | /* VMINCPSrm */ |
| 127297 | VR128, VR128, f128mem, |
| 127298 | /* VMINCPSrr */ |
| 127299 | VR128, VR128, VR128, |
| 127300 | /* VMINCSDZrm */ |
| 127301 | FR64X, FR64X, f64mem, |
| 127302 | /* VMINCSDZrr */ |
| 127303 | FR64X, FR64X, FR64X, |
| 127304 | /* VMINCSDrm */ |
| 127305 | FR64, FR64, f64mem, |
| 127306 | /* VMINCSDrr */ |
| 127307 | FR64, FR64, FR64, |
| 127308 | /* VMINCSHZrm */ |
| 127309 | FR16X, FR16X, f16mem, |
| 127310 | /* VMINCSHZrr */ |
| 127311 | FR16X, FR16X, FR16X, |
| 127312 | /* VMINCSSZrm */ |
| 127313 | FR32X, FR32X, f32mem, |
| 127314 | /* VMINCSSZrr */ |
| 127315 | FR32X, FR32X, FR32X, |
| 127316 | /* VMINCSSrm */ |
| 127317 | FR32, FR32, f32mem, |
| 127318 | /* VMINCSSrr */ |
| 127319 | FR32, FR32, FR32, |
| 127320 | /* VMINPDYrm */ |
| 127321 | VR256, VR256, f256mem, |
| 127322 | /* VMINPDYrr */ |
| 127323 | VR256, VR256, VR256, |
| 127324 | /* VMINPDZ128rm */ |
| 127325 | VR128X, VR128X, f128mem, |
| 127326 | /* VMINPDZ128rmb */ |
| 127327 | VR128X, VR128X, f64mem, |
| 127328 | /* VMINPDZ128rmbk */ |
| 127329 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 127330 | /* VMINPDZ128rmbkz */ |
| 127331 | VR128X, VK2WM, VR128X, f64mem, |
| 127332 | /* VMINPDZ128rmk */ |
| 127333 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 127334 | /* VMINPDZ128rmkz */ |
| 127335 | VR128X, VK2WM, VR128X, f128mem, |
| 127336 | /* VMINPDZ128rr */ |
| 127337 | VR128X, VR128X, VR128X, |
| 127338 | /* VMINPDZ128rrk */ |
| 127339 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 127340 | /* VMINPDZ128rrkz */ |
| 127341 | VR128X, VK2WM, VR128X, VR128X, |
| 127342 | /* VMINPDZ256rm */ |
| 127343 | VR256X, VR256X, f256mem, |
| 127344 | /* VMINPDZ256rmb */ |
| 127345 | VR256X, VR256X, f64mem, |
| 127346 | /* VMINPDZ256rmbk */ |
| 127347 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 127348 | /* VMINPDZ256rmbkz */ |
| 127349 | VR256X, VK4WM, VR256X, f64mem, |
| 127350 | /* VMINPDZ256rmk */ |
| 127351 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 127352 | /* VMINPDZ256rmkz */ |
| 127353 | VR256X, VK4WM, VR256X, f256mem, |
| 127354 | /* VMINPDZ256rr */ |
| 127355 | VR256X, VR256X, VR256X, |
| 127356 | /* VMINPDZ256rrk */ |
| 127357 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 127358 | /* VMINPDZ256rrkz */ |
| 127359 | VR256X, VK4WM, VR256X, VR256X, |
| 127360 | /* VMINPDZrm */ |
| 127361 | VR512, VR512, f512mem, |
| 127362 | /* VMINPDZrmb */ |
| 127363 | VR512, VR512, f64mem, |
| 127364 | /* VMINPDZrmbk */ |
| 127365 | VR512, VR512, VK8WM, VR512, f64mem, |
| 127366 | /* VMINPDZrmbkz */ |
| 127367 | VR512, VK8WM, VR512, f64mem, |
| 127368 | /* VMINPDZrmk */ |
| 127369 | VR512, VR512, VK8WM, VR512, f512mem, |
| 127370 | /* VMINPDZrmkz */ |
| 127371 | VR512, VK8WM, VR512, f512mem, |
| 127372 | /* VMINPDZrr */ |
| 127373 | VR512, VR512, VR512, |
| 127374 | /* VMINPDZrrb */ |
| 127375 | VR512, VR512, VR512, |
| 127376 | /* VMINPDZrrbk */ |
| 127377 | VR512, VR512, VK8WM, VR512, VR512, |
| 127378 | /* VMINPDZrrbkz */ |
| 127379 | VR512, VK8WM, VR512, VR512, |
| 127380 | /* VMINPDZrrk */ |
| 127381 | VR512, VR512, VK8WM, VR512, VR512, |
| 127382 | /* VMINPDZrrkz */ |
| 127383 | VR512, VK8WM, VR512, VR512, |
| 127384 | /* VMINPDrm */ |
| 127385 | VR128, VR128, f128mem, |
| 127386 | /* VMINPDrr */ |
| 127387 | VR128, VR128, VR128, |
| 127388 | /* VMINPHZ128rm */ |
| 127389 | VR128X, VR128X, f128mem, |
| 127390 | /* VMINPHZ128rmb */ |
| 127391 | VR128X, VR128X, f16mem, |
| 127392 | /* VMINPHZ128rmbk */ |
| 127393 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 127394 | /* VMINPHZ128rmbkz */ |
| 127395 | VR128X, VK8WM, VR128X, f16mem, |
| 127396 | /* VMINPHZ128rmk */ |
| 127397 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 127398 | /* VMINPHZ128rmkz */ |
| 127399 | VR128X, VK8WM, VR128X, f128mem, |
| 127400 | /* VMINPHZ128rr */ |
| 127401 | VR128X, VR128X, VR128X, |
| 127402 | /* VMINPHZ128rrk */ |
| 127403 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 127404 | /* VMINPHZ128rrkz */ |
| 127405 | VR128X, VK8WM, VR128X, VR128X, |
| 127406 | /* VMINPHZ256rm */ |
| 127407 | VR256X, VR256X, f256mem, |
| 127408 | /* VMINPHZ256rmb */ |
| 127409 | VR256X, VR256X, f16mem, |
| 127410 | /* VMINPHZ256rmbk */ |
| 127411 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 127412 | /* VMINPHZ256rmbkz */ |
| 127413 | VR256X, VK16WM, VR256X, f16mem, |
| 127414 | /* VMINPHZ256rmk */ |
| 127415 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 127416 | /* VMINPHZ256rmkz */ |
| 127417 | VR256X, VK16WM, VR256X, f256mem, |
| 127418 | /* VMINPHZ256rr */ |
| 127419 | VR256X, VR256X, VR256X, |
| 127420 | /* VMINPHZ256rrk */ |
| 127421 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 127422 | /* VMINPHZ256rrkz */ |
| 127423 | VR256X, VK16WM, VR256X, VR256X, |
| 127424 | /* VMINPHZrm */ |
| 127425 | VR512, VR512, f512mem, |
| 127426 | /* VMINPHZrmb */ |
| 127427 | VR512, VR512, f16mem, |
| 127428 | /* VMINPHZrmbk */ |
| 127429 | VR512, VR512, VK32WM, VR512, f16mem, |
| 127430 | /* VMINPHZrmbkz */ |
| 127431 | VR512, VK32WM, VR512, f16mem, |
| 127432 | /* VMINPHZrmk */ |
| 127433 | VR512, VR512, VK32WM, VR512, f512mem, |
| 127434 | /* VMINPHZrmkz */ |
| 127435 | VR512, VK32WM, VR512, f512mem, |
| 127436 | /* VMINPHZrr */ |
| 127437 | VR512, VR512, VR512, |
| 127438 | /* VMINPHZrrb */ |
| 127439 | VR512, VR512, VR512, |
| 127440 | /* VMINPHZrrbk */ |
| 127441 | VR512, VR512, VK32WM, VR512, VR512, |
| 127442 | /* VMINPHZrrbkz */ |
| 127443 | VR512, VK32WM, VR512, VR512, |
| 127444 | /* VMINPHZrrk */ |
| 127445 | VR512, VR512, VK32WM, VR512, VR512, |
| 127446 | /* VMINPHZrrkz */ |
| 127447 | VR512, VK32WM, VR512, VR512, |
| 127448 | /* VMINPSYrm */ |
| 127449 | VR256, VR256, f256mem, |
| 127450 | /* VMINPSYrr */ |
| 127451 | VR256, VR256, VR256, |
| 127452 | /* VMINPSZ128rm */ |
| 127453 | VR128X, VR128X, f128mem, |
| 127454 | /* VMINPSZ128rmb */ |
| 127455 | VR128X, VR128X, f32mem, |
| 127456 | /* VMINPSZ128rmbk */ |
| 127457 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 127458 | /* VMINPSZ128rmbkz */ |
| 127459 | VR128X, VK4WM, VR128X, f32mem, |
| 127460 | /* VMINPSZ128rmk */ |
| 127461 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 127462 | /* VMINPSZ128rmkz */ |
| 127463 | VR128X, VK4WM, VR128X, f128mem, |
| 127464 | /* VMINPSZ128rr */ |
| 127465 | VR128X, VR128X, VR128X, |
| 127466 | /* VMINPSZ128rrk */ |
| 127467 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 127468 | /* VMINPSZ128rrkz */ |
| 127469 | VR128X, VK4WM, VR128X, VR128X, |
| 127470 | /* VMINPSZ256rm */ |
| 127471 | VR256X, VR256X, f256mem, |
| 127472 | /* VMINPSZ256rmb */ |
| 127473 | VR256X, VR256X, f32mem, |
| 127474 | /* VMINPSZ256rmbk */ |
| 127475 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 127476 | /* VMINPSZ256rmbkz */ |
| 127477 | VR256X, VK8WM, VR256X, f32mem, |
| 127478 | /* VMINPSZ256rmk */ |
| 127479 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 127480 | /* VMINPSZ256rmkz */ |
| 127481 | VR256X, VK8WM, VR256X, f256mem, |
| 127482 | /* VMINPSZ256rr */ |
| 127483 | VR256X, VR256X, VR256X, |
| 127484 | /* VMINPSZ256rrk */ |
| 127485 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 127486 | /* VMINPSZ256rrkz */ |
| 127487 | VR256X, VK8WM, VR256X, VR256X, |
| 127488 | /* VMINPSZrm */ |
| 127489 | VR512, VR512, f512mem, |
| 127490 | /* VMINPSZrmb */ |
| 127491 | VR512, VR512, f32mem, |
| 127492 | /* VMINPSZrmbk */ |
| 127493 | VR512, VR512, VK16WM, VR512, f32mem, |
| 127494 | /* VMINPSZrmbkz */ |
| 127495 | VR512, VK16WM, VR512, f32mem, |
| 127496 | /* VMINPSZrmk */ |
| 127497 | VR512, VR512, VK16WM, VR512, f512mem, |
| 127498 | /* VMINPSZrmkz */ |
| 127499 | VR512, VK16WM, VR512, f512mem, |
| 127500 | /* VMINPSZrr */ |
| 127501 | VR512, VR512, VR512, |
| 127502 | /* VMINPSZrrb */ |
| 127503 | VR512, VR512, VR512, |
| 127504 | /* VMINPSZrrbk */ |
| 127505 | VR512, VR512, VK16WM, VR512, VR512, |
| 127506 | /* VMINPSZrrbkz */ |
| 127507 | VR512, VK16WM, VR512, VR512, |
| 127508 | /* VMINPSZrrk */ |
| 127509 | VR512, VR512, VK16WM, VR512, VR512, |
| 127510 | /* VMINPSZrrkz */ |
| 127511 | VR512, VK16WM, VR512, VR512, |
| 127512 | /* VMINPSrm */ |
| 127513 | VR128, VR128, f128mem, |
| 127514 | /* VMINPSrr */ |
| 127515 | VR128, VR128, VR128, |
| 127516 | /* VMINSDZrm */ |
| 127517 | FR64X, FR64X, f64mem, |
| 127518 | /* VMINSDZrm_Int */ |
| 127519 | VR128X, VR128X, sdmem, |
| 127520 | /* VMINSDZrm_Intk */ |
| 127521 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 127522 | /* VMINSDZrm_Intkz */ |
| 127523 | VR128X, VK1WM, VR128X, sdmem, |
| 127524 | /* VMINSDZrr */ |
| 127525 | FR64X, FR64X, FR64X, |
| 127526 | /* VMINSDZrr_Int */ |
| 127527 | VR128X, VR128X, VR128X, |
| 127528 | /* VMINSDZrr_Intk */ |
| 127529 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127530 | /* VMINSDZrr_Intkz */ |
| 127531 | VR128X, VK1WM, VR128X, VR128X, |
| 127532 | /* VMINSDZrrb_Int */ |
| 127533 | VR128X, VR128X, VR128X, |
| 127534 | /* VMINSDZrrb_Intk */ |
| 127535 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127536 | /* VMINSDZrrb_Intkz */ |
| 127537 | VR128X, VK1WM, VR128X, VR128X, |
| 127538 | /* VMINSDrm */ |
| 127539 | FR64, FR64, f64mem, |
| 127540 | /* VMINSDrm_Int */ |
| 127541 | VR128, VR128, sdmem, |
| 127542 | /* VMINSDrr */ |
| 127543 | FR64, FR64, FR64, |
| 127544 | /* VMINSDrr_Int */ |
| 127545 | VR128, VR128, VR128, |
| 127546 | /* VMINSHZrm */ |
| 127547 | FR16X, FR16X, f16mem, |
| 127548 | /* VMINSHZrm_Int */ |
| 127549 | VR128X, VR128X, shmem, |
| 127550 | /* VMINSHZrm_Intk */ |
| 127551 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 127552 | /* VMINSHZrm_Intkz */ |
| 127553 | VR128X, VK1WM, VR128X, shmem, |
| 127554 | /* VMINSHZrr */ |
| 127555 | FR16X, FR16X, FR16X, |
| 127556 | /* VMINSHZrr_Int */ |
| 127557 | VR128X, VR128X, VR128X, |
| 127558 | /* VMINSHZrr_Intk */ |
| 127559 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127560 | /* VMINSHZrr_Intkz */ |
| 127561 | VR128X, VK1WM, VR128X, VR128X, |
| 127562 | /* VMINSHZrrb_Int */ |
| 127563 | VR128X, VR128X, VR128X, |
| 127564 | /* VMINSHZrrb_Intk */ |
| 127565 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127566 | /* VMINSHZrrb_Intkz */ |
| 127567 | VR128X, VK1WM, VR128X, VR128X, |
| 127568 | /* VMINSSZrm */ |
| 127569 | FR32X, FR32X, f32mem, |
| 127570 | /* VMINSSZrm_Int */ |
| 127571 | VR128X, VR128X, ssmem, |
| 127572 | /* VMINSSZrm_Intk */ |
| 127573 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 127574 | /* VMINSSZrm_Intkz */ |
| 127575 | VR128X, VK1WM, VR128X, ssmem, |
| 127576 | /* VMINSSZrr */ |
| 127577 | FR32X, FR32X, FR32X, |
| 127578 | /* VMINSSZrr_Int */ |
| 127579 | VR128X, VR128X, VR128X, |
| 127580 | /* VMINSSZrr_Intk */ |
| 127581 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127582 | /* VMINSSZrr_Intkz */ |
| 127583 | VR128X, VK1WM, VR128X, VR128X, |
| 127584 | /* VMINSSZrrb_Int */ |
| 127585 | VR128X, VR128X, VR128X, |
| 127586 | /* VMINSSZrrb_Intk */ |
| 127587 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 127588 | /* VMINSSZrrb_Intkz */ |
| 127589 | VR128X, VK1WM, VR128X, VR128X, |
| 127590 | /* VMINSSrm */ |
| 127591 | FR32, FR32, f32mem, |
| 127592 | /* VMINSSrm_Int */ |
| 127593 | VR128, VR128, ssmem, |
| 127594 | /* VMINSSrr */ |
| 127595 | FR32, FR32, FR32, |
| 127596 | /* VMINSSrr_Int */ |
| 127597 | VR128, VR128, VR128, |
| 127598 | /* VMLAUNCH */ |
| 127599 | /* VMLOAD32 */ |
| 127600 | /* VMLOAD64 */ |
| 127601 | /* VMMCALL */ |
| 127602 | /* VMOV64toPQIZrm */ |
| 127603 | VR128X, i64mem, |
| 127604 | /* VMOV64toPQIZrr */ |
| 127605 | VR128X, GR64, |
| 127606 | /* VMOV64toPQIrm */ |
| 127607 | VR128, i64mem, |
| 127608 | /* VMOV64toPQIrr */ |
| 127609 | VR128, GR64, |
| 127610 | /* VMOV64toSDZrr */ |
| 127611 | FR64X, GR64, |
| 127612 | /* VMOV64toSDrr */ |
| 127613 | FR64, GR64, |
| 127614 | /* VMOVAPDYmr */ |
| 127615 | f256mem, VR256, |
| 127616 | /* VMOVAPDYrm */ |
| 127617 | VR256, f256mem, |
| 127618 | /* VMOVAPDYrr */ |
| 127619 | VR256, VR256, |
| 127620 | /* VMOVAPDYrr_REV */ |
| 127621 | VR256, VR256, |
| 127622 | /* VMOVAPDZ128mr */ |
| 127623 | f128mem, VR128X, |
| 127624 | /* VMOVAPDZ128mrk */ |
| 127625 | f128mem, VK2WM, VR128X, |
| 127626 | /* VMOVAPDZ128rm */ |
| 127627 | VR128X, f128mem, |
| 127628 | /* VMOVAPDZ128rmk */ |
| 127629 | VR128X, VR128X, VK2WM, f128mem, |
| 127630 | /* VMOVAPDZ128rmkz */ |
| 127631 | VR128X, VK2WM, f128mem, |
| 127632 | /* VMOVAPDZ128rr */ |
| 127633 | VR128X, VR128X, |
| 127634 | /* VMOVAPDZ128rr_REV */ |
| 127635 | VR128X, VR128X, |
| 127636 | /* VMOVAPDZ128rrk */ |
| 127637 | VR128X, VR128X, VK2WM, VR128X, |
| 127638 | /* VMOVAPDZ128rrk_REV */ |
| 127639 | VR128X, VK2WM, VR128X, |
| 127640 | /* VMOVAPDZ128rrkz */ |
| 127641 | VR128X, VK2WM, VR128X, |
| 127642 | /* VMOVAPDZ128rrkz_REV */ |
| 127643 | VR128X, VK2WM, VR128X, |
| 127644 | /* VMOVAPDZ256mr */ |
| 127645 | f256mem, VR256X, |
| 127646 | /* VMOVAPDZ256mrk */ |
| 127647 | f256mem, VK4WM, VR256X, |
| 127648 | /* VMOVAPDZ256rm */ |
| 127649 | VR256X, f256mem, |
| 127650 | /* VMOVAPDZ256rmk */ |
| 127651 | VR256X, VR256X, VK4WM, f256mem, |
| 127652 | /* VMOVAPDZ256rmkz */ |
| 127653 | VR256X, VK4WM, f256mem, |
| 127654 | /* VMOVAPDZ256rr */ |
| 127655 | VR256X, VR256X, |
| 127656 | /* VMOVAPDZ256rr_REV */ |
| 127657 | VR256X, VR256X, |
| 127658 | /* VMOVAPDZ256rrk */ |
| 127659 | VR256X, VR256X, VK4WM, VR256X, |
| 127660 | /* VMOVAPDZ256rrk_REV */ |
| 127661 | VR256X, VK4WM, VR256X, |
| 127662 | /* VMOVAPDZ256rrkz */ |
| 127663 | VR256X, VK4WM, VR256X, |
| 127664 | /* VMOVAPDZ256rrkz_REV */ |
| 127665 | VR256X, VK4WM, VR256X, |
| 127666 | /* VMOVAPDZmr */ |
| 127667 | f512mem, VR512, |
| 127668 | /* VMOVAPDZmrk */ |
| 127669 | f512mem, VK8WM, VR512, |
| 127670 | /* VMOVAPDZrm */ |
| 127671 | VR512, f512mem, |
| 127672 | /* VMOVAPDZrmk */ |
| 127673 | VR512, VR512, VK8WM, f512mem, |
| 127674 | /* VMOVAPDZrmkz */ |
| 127675 | VR512, VK8WM, f512mem, |
| 127676 | /* VMOVAPDZrr */ |
| 127677 | VR512, VR512, |
| 127678 | /* VMOVAPDZrr_REV */ |
| 127679 | VR512, VR512, |
| 127680 | /* VMOVAPDZrrk */ |
| 127681 | VR512, VR512, VK8WM, VR512, |
| 127682 | /* VMOVAPDZrrk_REV */ |
| 127683 | VR512, VK8WM, VR512, |
| 127684 | /* VMOVAPDZrrkz */ |
| 127685 | VR512, VK8WM, VR512, |
| 127686 | /* VMOVAPDZrrkz_REV */ |
| 127687 | VR512, VK8WM, VR512, |
| 127688 | /* VMOVAPDmr */ |
| 127689 | f128mem, VR128, |
| 127690 | /* VMOVAPDrm */ |
| 127691 | VR128, f128mem, |
| 127692 | /* VMOVAPDrr */ |
| 127693 | VR128, VR128, |
| 127694 | /* VMOVAPDrr_REV */ |
| 127695 | VR128, VR128, |
| 127696 | /* VMOVAPSYmr */ |
| 127697 | f256mem, VR256, |
| 127698 | /* VMOVAPSYrm */ |
| 127699 | VR256, f256mem, |
| 127700 | /* VMOVAPSYrr */ |
| 127701 | VR256, VR256, |
| 127702 | /* VMOVAPSYrr_REV */ |
| 127703 | VR256, VR256, |
| 127704 | /* VMOVAPSZ128mr */ |
| 127705 | f128mem, VR128X, |
| 127706 | /* VMOVAPSZ128mrk */ |
| 127707 | f128mem, VK4WM, VR128X, |
| 127708 | /* VMOVAPSZ128rm */ |
| 127709 | VR128X, f128mem, |
| 127710 | /* VMOVAPSZ128rmk */ |
| 127711 | VR128X, VR128X, VK4WM, f128mem, |
| 127712 | /* VMOVAPSZ128rmkz */ |
| 127713 | VR128X, VK4WM, f128mem, |
| 127714 | /* VMOVAPSZ128rr */ |
| 127715 | VR128X, VR128X, |
| 127716 | /* VMOVAPSZ128rr_REV */ |
| 127717 | VR128X, VR128X, |
| 127718 | /* VMOVAPSZ128rrk */ |
| 127719 | VR128X, VR128X, VK4WM, VR128X, |
| 127720 | /* VMOVAPSZ128rrk_REV */ |
| 127721 | VR128X, VK4WM, VR128X, |
| 127722 | /* VMOVAPSZ128rrkz */ |
| 127723 | VR128X, VK4WM, VR128X, |
| 127724 | /* VMOVAPSZ128rrkz_REV */ |
| 127725 | VR128X, VK4WM, VR128X, |
| 127726 | /* VMOVAPSZ256mr */ |
| 127727 | f256mem, VR256X, |
| 127728 | /* VMOVAPSZ256mrk */ |
| 127729 | f256mem, VK8WM, VR256X, |
| 127730 | /* VMOVAPSZ256rm */ |
| 127731 | VR256X, f256mem, |
| 127732 | /* VMOVAPSZ256rmk */ |
| 127733 | VR256X, VR256X, VK8WM, f256mem, |
| 127734 | /* VMOVAPSZ256rmkz */ |
| 127735 | VR256X, VK8WM, f256mem, |
| 127736 | /* VMOVAPSZ256rr */ |
| 127737 | VR256X, VR256X, |
| 127738 | /* VMOVAPSZ256rr_REV */ |
| 127739 | VR256X, VR256X, |
| 127740 | /* VMOVAPSZ256rrk */ |
| 127741 | VR256X, VR256X, VK8WM, VR256X, |
| 127742 | /* VMOVAPSZ256rrk_REV */ |
| 127743 | VR256X, VK8WM, VR256X, |
| 127744 | /* VMOVAPSZ256rrkz */ |
| 127745 | VR256X, VK8WM, VR256X, |
| 127746 | /* VMOVAPSZ256rrkz_REV */ |
| 127747 | VR256X, VK8WM, VR256X, |
| 127748 | /* VMOVAPSZmr */ |
| 127749 | f512mem, VR512, |
| 127750 | /* VMOVAPSZmrk */ |
| 127751 | f512mem, VK16WM, VR512, |
| 127752 | /* VMOVAPSZrm */ |
| 127753 | VR512, f512mem, |
| 127754 | /* VMOVAPSZrmk */ |
| 127755 | VR512, VR512, VK16WM, f512mem, |
| 127756 | /* VMOVAPSZrmkz */ |
| 127757 | VR512, VK16WM, f512mem, |
| 127758 | /* VMOVAPSZrr */ |
| 127759 | VR512, VR512, |
| 127760 | /* VMOVAPSZrr_REV */ |
| 127761 | VR512, VR512, |
| 127762 | /* VMOVAPSZrrk */ |
| 127763 | VR512, VR512, VK16WM, VR512, |
| 127764 | /* VMOVAPSZrrk_REV */ |
| 127765 | VR512, VK16WM, VR512, |
| 127766 | /* VMOVAPSZrrkz */ |
| 127767 | VR512, VK16WM, VR512, |
| 127768 | /* VMOVAPSZrrkz_REV */ |
| 127769 | VR512, VK16WM, VR512, |
| 127770 | /* VMOVAPSmr */ |
| 127771 | f128mem, VR128, |
| 127772 | /* VMOVAPSrm */ |
| 127773 | VR128, f128mem, |
| 127774 | /* VMOVAPSrr */ |
| 127775 | VR128, VR128, |
| 127776 | /* VMOVAPSrr_REV */ |
| 127777 | VR128, VR128, |
| 127778 | /* VMOVDDUPYrm */ |
| 127779 | VR256, f256mem, |
| 127780 | /* VMOVDDUPYrr */ |
| 127781 | VR256, VR256, |
| 127782 | /* VMOVDDUPZ128rm */ |
| 127783 | VR128X, f64mem, |
| 127784 | /* VMOVDDUPZ128rmk */ |
| 127785 | VR128X, VR128X, VK2WM, f64mem, |
| 127786 | /* VMOVDDUPZ128rmkz */ |
| 127787 | VR128X, VK2WM, f64mem, |
| 127788 | /* VMOVDDUPZ128rr */ |
| 127789 | VR128X, VR128X, |
| 127790 | /* VMOVDDUPZ128rrk */ |
| 127791 | VR128X, VR128X, VK2WM, VR128X, |
| 127792 | /* VMOVDDUPZ128rrkz */ |
| 127793 | VR128X, VK2WM, VR128X, |
| 127794 | /* VMOVDDUPZ256rm */ |
| 127795 | VR256X, f256mem, |
| 127796 | /* VMOVDDUPZ256rmk */ |
| 127797 | VR256X, VR256X, VK4WM, f256mem, |
| 127798 | /* VMOVDDUPZ256rmkz */ |
| 127799 | VR256X, VK4WM, f256mem, |
| 127800 | /* VMOVDDUPZ256rr */ |
| 127801 | VR256X, VR256X, |
| 127802 | /* VMOVDDUPZ256rrk */ |
| 127803 | VR256X, VR256X, VK4WM, VR256X, |
| 127804 | /* VMOVDDUPZ256rrkz */ |
| 127805 | VR256X, VK4WM, VR256X, |
| 127806 | /* VMOVDDUPZrm */ |
| 127807 | VR512, f512mem, |
| 127808 | /* VMOVDDUPZrmk */ |
| 127809 | VR512, VR512, VK8WM, f512mem, |
| 127810 | /* VMOVDDUPZrmkz */ |
| 127811 | VR512, VK8WM, f512mem, |
| 127812 | /* VMOVDDUPZrr */ |
| 127813 | VR512, VR512, |
| 127814 | /* VMOVDDUPZrrk */ |
| 127815 | VR512, VR512, VK8WM, VR512, |
| 127816 | /* VMOVDDUPZrrkz */ |
| 127817 | VR512, VK8WM, VR512, |
| 127818 | /* VMOVDDUPrm */ |
| 127819 | VR128, f64mem, |
| 127820 | /* VMOVDDUPrr */ |
| 127821 | VR128, VR128, |
| 127822 | /* VMOVDI2PDIZrm */ |
| 127823 | VR128X, i32mem, |
| 127824 | /* VMOVDI2PDIZrr */ |
| 127825 | VR128X, GR32, |
| 127826 | /* VMOVDI2PDIrm */ |
| 127827 | VR128, i32mem, |
| 127828 | /* VMOVDI2PDIrr */ |
| 127829 | VR128, GR32, |
| 127830 | /* VMOVDI2SSZrr */ |
| 127831 | FR32X, GR32, |
| 127832 | /* VMOVDI2SSrr */ |
| 127833 | FR32, GR32, |
| 127834 | /* VMOVDQA32Z128mr */ |
| 127835 | i128mem, VR128X, |
| 127836 | /* VMOVDQA32Z128mrk */ |
| 127837 | i128mem, VK4WM, VR128X, |
| 127838 | /* VMOVDQA32Z128rm */ |
| 127839 | VR128X, i128mem, |
| 127840 | /* VMOVDQA32Z128rmk */ |
| 127841 | VR128X, VR128X, VK4WM, i128mem, |
| 127842 | /* VMOVDQA32Z128rmkz */ |
| 127843 | VR128X, VK4WM, i128mem, |
| 127844 | /* VMOVDQA32Z128rr */ |
| 127845 | VR128X, VR128X, |
| 127846 | /* VMOVDQA32Z128rr_REV */ |
| 127847 | VR128X, VR128X, |
| 127848 | /* VMOVDQA32Z128rrk */ |
| 127849 | VR128X, VR128X, VK4WM, VR128X, |
| 127850 | /* VMOVDQA32Z128rrk_REV */ |
| 127851 | VR128X, VK4WM, VR128X, |
| 127852 | /* VMOVDQA32Z128rrkz */ |
| 127853 | VR128X, VK4WM, VR128X, |
| 127854 | /* VMOVDQA32Z128rrkz_REV */ |
| 127855 | VR128X, VK4WM, VR128X, |
| 127856 | /* VMOVDQA32Z256mr */ |
| 127857 | i256mem, VR256X, |
| 127858 | /* VMOVDQA32Z256mrk */ |
| 127859 | i256mem, VK8WM, VR256X, |
| 127860 | /* VMOVDQA32Z256rm */ |
| 127861 | VR256X, i256mem, |
| 127862 | /* VMOVDQA32Z256rmk */ |
| 127863 | VR256X, VR256X, VK8WM, i256mem, |
| 127864 | /* VMOVDQA32Z256rmkz */ |
| 127865 | VR256X, VK8WM, i256mem, |
| 127866 | /* VMOVDQA32Z256rr */ |
| 127867 | VR256X, VR256X, |
| 127868 | /* VMOVDQA32Z256rr_REV */ |
| 127869 | VR256X, VR256X, |
| 127870 | /* VMOVDQA32Z256rrk */ |
| 127871 | VR256X, VR256X, VK8WM, VR256X, |
| 127872 | /* VMOVDQA32Z256rrk_REV */ |
| 127873 | VR256X, VK8WM, VR256X, |
| 127874 | /* VMOVDQA32Z256rrkz */ |
| 127875 | VR256X, VK8WM, VR256X, |
| 127876 | /* VMOVDQA32Z256rrkz_REV */ |
| 127877 | VR256X, VK8WM, VR256X, |
| 127878 | /* VMOVDQA32Zmr */ |
| 127879 | i512mem, VR512, |
| 127880 | /* VMOVDQA32Zmrk */ |
| 127881 | i512mem, VK16WM, VR512, |
| 127882 | /* VMOVDQA32Zrm */ |
| 127883 | VR512, i512mem, |
| 127884 | /* VMOVDQA32Zrmk */ |
| 127885 | VR512, VR512, VK16WM, i512mem, |
| 127886 | /* VMOVDQA32Zrmkz */ |
| 127887 | VR512, VK16WM, i512mem, |
| 127888 | /* VMOVDQA32Zrr */ |
| 127889 | VR512, VR512, |
| 127890 | /* VMOVDQA32Zrr_REV */ |
| 127891 | VR512, VR512, |
| 127892 | /* VMOVDQA32Zrrk */ |
| 127893 | VR512, VR512, VK16WM, VR512, |
| 127894 | /* VMOVDQA32Zrrk_REV */ |
| 127895 | VR512, VK16WM, VR512, |
| 127896 | /* VMOVDQA32Zrrkz */ |
| 127897 | VR512, VK16WM, VR512, |
| 127898 | /* VMOVDQA32Zrrkz_REV */ |
| 127899 | VR512, VK16WM, VR512, |
| 127900 | /* VMOVDQA64Z128mr */ |
| 127901 | i128mem, VR128X, |
| 127902 | /* VMOVDQA64Z128mrk */ |
| 127903 | i128mem, VK2WM, VR128X, |
| 127904 | /* VMOVDQA64Z128rm */ |
| 127905 | VR128X, i128mem, |
| 127906 | /* VMOVDQA64Z128rmk */ |
| 127907 | VR128X, VR128X, VK2WM, i128mem, |
| 127908 | /* VMOVDQA64Z128rmkz */ |
| 127909 | VR128X, VK2WM, i128mem, |
| 127910 | /* VMOVDQA64Z128rr */ |
| 127911 | VR128X, VR128X, |
| 127912 | /* VMOVDQA64Z128rr_REV */ |
| 127913 | VR128X, VR128X, |
| 127914 | /* VMOVDQA64Z128rrk */ |
| 127915 | VR128X, VR128X, VK2WM, VR128X, |
| 127916 | /* VMOVDQA64Z128rrk_REV */ |
| 127917 | VR128X, VK2WM, VR128X, |
| 127918 | /* VMOVDQA64Z128rrkz */ |
| 127919 | VR128X, VK2WM, VR128X, |
| 127920 | /* VMOVDQA64Z128rrkz_REV */ |
| 127921 | VR128X, VK2WM, VR128X, |
| 127922 | /* VMOVDQA64Z256mr */ |
| 127923 | i256mem, VR256X, |
| 127924 | /* VMOVDQA64Z256mrk */ |
| 127925 | i256mem, VK4WM, VR256X, |
| 127926 | /* VMOVDQA64Z256rm */ |
| 127927 | VR256X, i256mem, |
| 127928 | /* VMOVDQA64Z256rmk */ |
| 127929 | VR256X, VR256X, VK4WM, i256mem, |
| 127930 | /* VMOVDQA64Z256rmkz */ |
| 127931 | VR256X, VK4WM, i256mem, |
| 127932 | /* VMOVDQA64Z256rr */ |
| 127933 | VR256X, VR256X, |
| 127934 | /* VMOVDQA64Z256rr_REV */ |
| 127935 | VR256X, VR256X, |
| 127936 | /* VMOVDQA64Z256rrk */ |
| 127937 | VR256X, VR256X, VK4WM, VR256X, |
| 127938 | /* VMOVDQA64Z256rrk_REV */ |
| 127939 | VR256X, VK4WM, VR256X, |
| 127940 | /* VMOVDQA64Z256rrkz */ |
| 127941 | VR256X, VK4WM, VR256X, |
| 127942 | /* VMOVDQA64Z256rrkz_REV */ |
| 127943 | VR256X, VK4WM, VR256X, |
| 127944 | /* VMOVDQA64Zmr */ |
| 127945 | i512mem, VR512, |
| 127946 | /* VMOVDQA64Zmrk */ |
| 127947 | i512mem, VK8WM, VR512, |
| 127948 | /* VMOVDQA64Zrm */ |
| 127949 | VR512, i512mem, |
| 127950 | /* VMOVDQA64Zrmk */ |
| 127951 | VR512, VR512, VK8WM, i512mem, |
| 127952 | /* VMOVDQA64Zrmkz */ |
| 127953 | VR512, VK8WM, i512mem, |
| 127954 | /* VMOVDQA64Zrr */ |
| 127955 | VR512, VR512, |
| 127956 | /* VMOVDQA64Zrr_REV */ |
| 127957 | VR512, VR512, |
| 127958 | /* VMOVDQA64Zrrk */ |
| 127959 | VR512, VR512, VK8WM, VR512, |
| 127960 | /* VMOVDQA64Zrrk_REV */ |
| 127961 | VR512, VK8WM, VR512, |
| 127962 | /* VMOVDQA64Zrrkz */ |
| 127963 | VR512, VK8WM, VR512, |
| 127964 | /* VMOVDQA64Zrrkz_REV */ |
| 127965 | VR512, VK8WM, VR512, |
| 127966 | /* VMOVDQAYmr */ |
| 127967 | i256mem, VR256, |
| 127968 | /* VMOVDQAYrm */ |
| 127969 | VR256, i256mem, |
| 127970 | /* VMOVDQAYrr */ |
| 127971 | VR256, VR256, |
| 127972 | /* VMOVDQAYrr_REV */ |
| 127973 | VR256, VR256, |
| 127974 | /* VMOVDQAmr */ |
| 127975 | i128mem, VR128, |
| 127976 | /* VMOVDQArm */ |
| 127977 | VR128, i128mem, |
| 127978 | /* VMOVDQArr */ |
| 127979 | VR128, VR128, |
| 127980 | /* VMOVDQArr_REV */ |
| 127981 | VR128, VR128, |
| 127982 | /* VMOVDQU16Z128mr */ |
| 127983 | i128mem, VR128X, |
| 127984 | /* VMOVDQU16Z128mrk */ |
| 127985 | i128mem, VK8WM, VR128X, |
| 127986 | /* VMOVDQU16Z128rm */ |
| 127987 | VR128X, i128mem, |
| 127988 | /* VMOVDQU16Z128rmk */ |
| 127989 | VR128X, VR128X, VK8WM, i128mem, |
| 127990 | /* VMOVDQU16Z128rmkz */ |
| 127991 | VR128X, VK8WM, i128mem, |
| 127992 | /* VMOVDQU16Z128rr */ |
| 127993 | VR128X, VR128X, |
| 127994 | /* VMOVDQU16Z128rr_REV */ |
| 127995 | VR128X, VR128X, |
| 127996 | /* VMOVDQU16Z128rrk */ |
| 127997 | VR128X, VR128X, VK8WM, VR128X, |
| 127998 | /* VMOVDQU16Z128rrk_REV */ |
| 127999 | VR128X, VK8WM, VR128X, |
| 128000 | /* VMOVDQU16Z128rrkz */ |
| 128001 | VR128X, VK8WM, VR128X, |
| 128002 | /* VMOVDQU16Z128rrkz_REV */ |
| 128003 | VR128X, VK8WM, VR128X, |
| 128004 | /* VMOVDQU16Z256mr */ |
| 128005 | i256mem, VR256X, |
| 128006 | /* VMOVDQU16Z256mrk */ |
| 128007 | i256mem, VK16WM, VR256X, |
| 128008 | /* VMOVDQU16Z256rm */ |
| 128009 | VR256X, i256mem, |
| 128010 | /* VMOVDQU16Z256rmk */ |
| 128011 | VR256X, VR256X, VK16WM, i256mem, |
| 128012 | /* VMOVDQU16Z256rmkz */ |
| 128013 | VR256X, VK16WM, i256mem, |
| 128014 | /* VMOVDQU16Z256rr */ |
| 128015 | VR256X, VR256X, |
| 128016 | /* VMOVDQU16Z256rr_REV */ |
| 128017 | VR256X, VR256X, |
| 128018 | /* VMOVDQU16Z256rrk */ |
| 128019 | VR256X, VR256X, VK16WM, VR256X, |
| 128020 | /* VMOVDQU16Z256rrk_REV */ |
| 128021 | VR256X, VK16WM, VR256X, |
| 128022 | /* VMOVDQU16Z256rrkz */ |
| 128023 | VR256X, VK16WM, VR256X, |
| 128024 | /* VMOVDQU16Z256rrkz_REV */ |
| 128025 | VR256X, VK16WM, VR256X, |
| 128026 | /* VMOVDQU16Zmr */ |
| 128027 | i512mem, VR512, |
| 128028 | /* VMOVDQU16Zmrk */ |
| 128029 | i512mem, VK32WM, VR512, |
| 128030 | /* VMOVDQU16Zrm */ |
| 128031 | VR512, i512mem, |
| 128032 | /* VMOVDQU16Zrmk */ |
| 128033 | VR512, VR512, VK32WM, i512mem, |
| 128034 | /* VMOVDQU16Zrmkz */ |
| 128035 | VR512, VK32WM, i512mem, |
| 128036 | /* VMOVDQU16Zrr */ |
| 128037 | VR512, VR512, |
| 128038 | /* VMOVDQU16Zrr_REV */ |
| 128039 | VR512, VR512, |
| 128040 | /* VMOVDQU16Zrrk */ |
| 128041 | VR512, VR512, VK32WM, VR512, |
| 128042 | /* VMOVDQU16Zrrk_REV */ |
| 128043 | VR512, VK32WM, VR512, |
| 128044 | /* VMOVDQU16Zrrkz */ |
| 128045 | VR512, VK32WM, VR512, |
| 128046 | /* VMOVDQU16Zrrkz_REV */ |
| 128047 | VR512, VK32WM, VR512, |
| 128048 | /* VMOVDQU32Z128mr */ |
| 128049 | i128mem, VR128X, |
| 128050 | /* VMOVDQU32Z128mrk */ |
| 128051 | i128mem, VK4WM, VR128X, |
| 128052 | /* VMOVDQU32Z128rm */ |
| 128053 | VR128X, i128mem, |
| 128054 | /* VMOVDQU32Z128rmk */ |
| 128055 | VR128X, VR128X, VK4WM, i128mem, |
| 128056 | /* VMOVDQU32Z128rmkz */ |
| 128057 | VR128X, VK4WM, i128mem, |
| 128058 | /* VMOVDQU32Z128rr */ |
| 128059 | VR128X, VR128X, |
| 128060 | /* VMOVDQU32Z128rr_REV */ |
| 128061 | VR128X, VR128X, |
| 128062 | /* VMOVDQU32Z128rrk */ |
| 128063 | VR128X, VR128X, VK4WM, VR128X, |
| 128064 | /* VMOVDQU32Z128rrk_REV */ |
| 128065 | VR128X, VK4WM, VR128X, |
| 128066 | /* VMOVDQU32Z128rrkz */ |
| 128067 | VR128X, VK4WM, VR128X, |
| 128068 | /* VMOVDQU32Z128rrkz_REV */ |
| 128069 | VR128X, VK4WM, VR128X, |
| 128070 | /* VMOVDQU32Z256mr */ |
| 128071 | i256mem, VR256X, |
| 128072 | /* VMOVDQU32Z256mrk */ |
| 128073 | i256mem, VK8WM, VR256X, |
| 128074 | /* VMOVDQU32Z256rm */ |
| 128075 | VR256X, i256mem, |
| 128076 | /* VMOVDQU32Z256rmk */ |
| 128077 | VR256X, VR256X, VK8WM, i256mem, |
| 128078 | /* VMOVDQU32Z256rmkz */ |
| 128079 | VR256X, VK8WM, i256mem, |
| 128080 | /* VMOVDQU32Z256rr */ |
| 128081 | VR256X, VR256X, |
| 128082 | /* VMOVDQU32Z256rr_REV */ |
| 128083 | VR256X, VR256X, |
| 128084 | /* VMOVDQU32Z256rrk */ |
| 128085 | VR256X, VR256X, VK8WM, VR256X, |
| 128086 | /* VMOVDQU32Z256rrk_REV */ |
| 128087 | VR256X, VK8WM, VR256X, |
| 128088 | /* VMOVDQU32Z256rrkz */ |
| 128089 | VR256X, VK8WM, VR256X, |
| 128090 | /* VMOVDQU32Z256rrkz_REV */ |
| 128091 | VR256X, VK8WM, VR256X, |
| 128092 | /* VMOVDQU32Zmr */ |
| 128093 | i512mem, VR512, |
| 128094 | /* VMOVDQU32Zmrk */ |
| 128095 | i512mem, VK16WM, VR512, |
| 128096 | /* VMOVDQU32Zrm */ |
| 128097 | VR512, i512mem, |
| 128098 | /* VMOVDQU32Zrmk */ |
| 128099 | VR512, VR512, VK16WM, i512mem, |
| 128100 | /* VMOVDQU32Zrmkz */ |
| 128101 | VR512, VK16WM, i512mem, |
| 128102 | /* VMOVDQU32Zrr */ |
| 128103 | VR512, VR512, |
| 128104 | /* VMOVDQU32Zrr_REV */ |
| 128105 | VR512, VR512, |
| 128106 | /* VMOVDQU32Zrrk */ |
| 128107 | VR512, VR512, VK16WM, VR512, |
| 128108 | /* VMOVDQU32Zrrk_REV */ |
| 128109 | VR512, VK16WM, VR512, |
| 128110 | /* VMOVDQU32Zrrkz */ |
| 128111 | VR512, VK16WM, VR512, |
| 128112 | /* VMOVDQU32Zrrkz_REV */ |
| 128113 | VR512, VK16WM, VR512, |
| 128114 | /* VMOVDQU64Z128mr */ |
| 128115 | i128mem, VR128X, |
| 128116 | /* VMOVDQU64Z128mrk */ |
| 128117 | i128mem, VK2WM, VR128X, |
| 128118 | /* VMOVDQU64Z128rm */ |
| 128119 | VR128X, i128mem, |
| 128120 | /* VMOVDQU64Z128rmk */ |
| 128121 | VR128X, VR128X, VK2WM, i128mem, |
| 128122 | /* VMOVDQU64Z128rmkz */ |
| 128123 | VR128X, VK2WM, i128mem, |
| 128124 | /* VMOVDQU64Z128rr */ |
| 128125 | VR128X, VR128X, |
| 128126 | /* VMOVDQU64Z128rr_REV */ |
| 128127 | VR128X, VR128X, |
| 128128 | /* VMOVDQU64Z128rrk */ |
| 128129 | VR128X, VR128X, VK2WM, VR128X, |
| 128130 | /* VMOVDQU64Z128rrk_REV */ |
| 128131 | VR128X, VK2WM, VR128X, |
| 128132 | /* VMOVDQU64Z128rrkz */ |
| 128133 | VR128X, VK2WM, VR128X, |
| 128134 | /* VMOVDQU64Z128rrkz_REV */ |
| 128135 | VR128X, VK2WM, VR128X, |
| 128136 | /* VMOVDQU64Z256mr */ |
| 128137 | i256mem, VR256X, |
| 128138 | /* VMOVDQU64Z256mrk */ |
| 128139 | i256mem, VK4WM, VR256X, |
| 128140 | /* VMOVDQU64Z256rm */ |
| 128141 | VR256X, i256mem, |
| 128142 | /* VMOVDQU64Z256rmk */ |
| 128143 | VR256X, VR256X, VK4WM, i256mem, |
| 128144 | /* VMOVDQU64Z256rmkz */ |
| 128145 | VR256X, VK4WM, i256mem, |
| 128146 | /* VMOVDQU64Z256rr */ |
| 128147 | VR256X, VR256X, |
| 128148 | /* VMOVDQU64Z256rr_REV */ |
| 128149 | VR256X, VR256X, |
| 128150 | /* VMOVDQU64Z256rrk */ |
| 128151 | VR256X, VR256X, VK4WM, VR256X, |
| 128152 | /* VMOVDQU64Z256rrk_REV */ |
| 128153 | VR256X, VK4WM, VR256X, |
| 128154 | /* VMOVDQU64Z256rrkz */ |
| 128155 | VR256X, VK4WM, VR256X, |
| 128156 | /* VMOVDQU64Z256rrkz_REV */ |
| 128157 | VR256X, VK4WM, VR256X, |
| 128158 | /* VMOVDQU64Zmr */ |
| 128159 | i512mem, VR512, |
| 128160 | /* VMOVDQU64Zmrk */ |
| 128161 | i512mem, VK8WM, VR512, |
| 128162 | /* VMOVDQU64Zrm */ |
| 128163 | VR512, i512mem, |
| 128164 | /* VMOVDQU64Zrmk */ |
| 128165 | VR512, VR512, VK8WM, i512mem, |
| 128166 | /* VMOVDQU64Zrmkz */ |
| 128167 | VR512, VK8WM, i512mem, |
| 128168 | /* VMOVDQU64Zrr */ |
| 128169 | VR512, VR512, |
| 128170 | /* VMOVDQU64Zrr_REV */ |
| 128171 | VR512, VR512, |
| 128172 | /* VMOVDQU64Zrrk */ |
| 128173 | VR512, VR512, VK8WM, VR512, |
| 128174 | /* VMOVDQU64Zrrk_REV */ |
| 128175 | VR512, VK8WM, VR512, |
| 128176 | /* VMOVDQU64Zrrkz */ |
| 128177 | VR512, VK8WM, VR512, |
| 128178 | /* VMOVDQU64Zrrkz_REV */ |
| 128179 | VR512, VK8WM, VR512, |
| 128180 | /* VMOVDQU8Z128mr */ |
| 128181 | i128mem, VR128X, |
| 128182 | /* VMOVDQU8Z128mrk */ |
| 128183 | i128mem, VK16WM, VR128X, |
| 128184 | /* VMOVDQU8Z128rm */ |
| 128185 | VR128X, i128mem, |
| 128186 | /* VMOVDQU8Z128rmk */ |
| 128187 | VR128X, VR128X, VK16WM, i128mem, |
| 128188 | /* VMOVDQU8Z128rmkz */ |
| 128189 | VR128X, VK16WM, i128mem, |
| 128190 | /* VMOVDQU8Z128rr */ |
| 128191 | VR128X, VR128X, |
| 128192 | /* VMOVDQU8Z128rr_REV */ |
| 128193 | VR128X, VR128X, |
| 128194 | /* VMOVDQU8Z128rrk */ |
| 128195 | VR128X, VR128X, VK16WM, VR128X, |
| 128196 | /* VMOVDQU8Z128rrk_REV */ |
| 128197 | VR128X, VK16WM, VR128X, |
| 128198 | /* VMOVDQU8Z128rrkz */ |
| 128199 | VR128X, VK16WM, VR128X, |
| 128200 | /* VMOVDQU8Z128rrkz_REV */ |
| 128201 | VR128X, VK16WM, VR128X, |
| 128202 | /* VMOVDQU8Z256mr */ |
| 128203 | i256mem, VR256X, |
| 128204 | /* VMOVDQU8Z256mrk */ |
| 128205 | i256mem, VK32WM, VR256X, |
| 128206 | /* VMOVDQU8Z256rm */ |
| 128207 | VR256X, i256mem, |
| 128208 | /* VMOVDQU8Z256rmk */ |
| 128209 | VR256X, VR256X, VK32WM, i256mem, |
| 128210 | /* VMOVDQU8Z256rmkz */ |
| 128211 | VR256X, VK32WM, i256mem, |
| 128212 | /* VMOVDQU8Z256rr */ |
| 128213 | VR256X, VR256X, |
| 128214 | /* VMOVDQU8Z256rr_REV */ |
| 128215 | VR256X, VR256X, |
| 128216 | /* VMOVDQU8Z256rrk */ |
| 128217 | VR256X, VR256X, VK32WM, VR256X, |
| 128218 | /* VMOVDQU8Z256rrk_REV */ |
| 128219 | VR256X, VK32WM, VR256X, |
| 128220 | /* VMOVDQU8Z256rrkz */ |
| 128221 | VR256X, VK32WM, VR256X, |
| 128222 | /* VMOVDQU8Z256rrkz_REV */ |
| 128223 | VR256X, VK32WM, VR256X, |
| 128224 | /* VMOVDQU8Zmr */ |
| 128225 | i512mem, VR512, |
| 128226 | /* VMOVDQU8Zmrk */ |
| 128227 | i512mem, VK64WM, VR512, |
| 128228 | /* VMOVDQU8Zrm */ |
| 128229 | VR512, i512mem, |
| 128230 | /* VMOVDQU8Zrmk */ |
| 128231 | VR512, VR512, VK64WM, i512mem, |
| 128232 | /* VMOVDQU8Zrmkz */ |
| 128233 | VR512, VK64WM, i512mem, |
| 128234 | /* VMOVDQU8Zrr */ |
| 128235 | VR512, VR512, |
| 128236 | /* VMOVDQU8Zrr_REV */ |
| 128237 | VR512, VR512, |
| 128238 | /* VMOVDQU8Zrrk */ |
| 128239 | VR512, VR512, VK64WM, VR512, |
| 128240 | /* VMOVDQU8Zrrk_REV */ |
| 128241 | VR512, VK64WM, VR512, |
| 128242 | /* VMOVDQU8Zrrkz */ |
| 128243 | VR512, VK64WM, VR512, |
| 128244 | /* VMOVDQU8Zrrkz_REV */ |
| 128245 | VR512, VK64WM, VR512, |
| 128246 | /* VMOVDQUYmr */ |
| 128247 | i256mem, VR256, |
| 128248 | /* VMOVDQUYrm */ |
| 128249 | VR256, i256mem, |
| 128250 | /* VMOVDQUYrr */ |
| 128251 | VR256, VR256, |
| 128252 | /* VMOVDQUYrr_REV */ |
| 128253 | VR256, VR256, |
| 128254 | /* VMOVDQUmr */ |
| 128255 | i128mem, VR128, |
| 128256 | /* VMOVDQUrm */ |
| 128257 | VR128, i128mem, |
| 128258 | /* VMOVDQUrr */ |
| 128259 | VR128, VR128, |
| 128260 | /* VMOVDQUrr_REV */ |
| 128261 | VR128, VR128, |
| 128262 | /* VMOVHLPSZrr */ |
| 128263 | VR128X, VR128X, VR128X, |
| 128264 | /* VMOVHLPSrr */ |
| 128265 | VR128, VR128, VR128, |
| 128266 | /* VMOVHPDZ128mr */ |
| 128267 | f64mem, VR128X, |
| 128268 | /* VMOVHPDZ128rm */ |
| 128269 | VR128X, VR128X, f64mem, |
| 128270 | /* VMOVHPDmr */ |
| 128271 | f64mem, VR128, |
| 128272 | /* VMOVHPDrm */ |
| 128273 | VR128, VR128, f64mem, |
| 128274 | /* VMOVHPSZ128mr */ |
| 128275 | f64mem, VR128X, |
| 128276 | /* VMOVHPSZ128rm */ |
| 128277 | VR128X, VR128X, f64mem, |
| 128278 | /* VMOVHPSmr */ |
| 128279 | f64mem, VR128, |
| 128280 | /* VMOVHPSrm */ |
| 128281 | VR128, VR128, f64mem, |
| 128282 | /* VMOVLHPSZrr */ |
| 128283 | VR128X, VR128X, VR128X, |
| 128284 | /* VMOVLHPSrr */ |
| 128285 | VR128, VR128, VR128, |
| 128286 | /* VMOVLPDZ128mr */ |
| 128287 | f64mem, VR128X, |
| 128288 | /* VMOVLPDZ128rm */ |
| 128289 | VR128X, VR128X, f64mem, |
| 128290 | /* VMOVLPDmr */ |
| 128291 | f64mem, VR128, |
| 128292 | /* VMOVLPDrm */ |
| 128293 | VR128, VR128, f64mem, |
| 128294 | /* VMOVLPSZ128mr */ |
| 128295 | f64mem, VR128X, |
| 128296 | /* VMOVLPSZ128rm */ |
| 128297 | VR128X, VR128X, f64mem, |
| 128298 | /* VMOVLPSmr */ |
| 128299 | f64mem, VR128, |
| 128300 | /* VMOVLPSrm */ |
| 128301 | VR128, VR128, f64mem, |
| 128302 | /* VMOVMSKPDYrr */ |
| 128303 | GR32orGR64, VR256, |
| 128304 | /* VMOVMSKPDrr */ |
| 128305 | GR32orGR64, VR128, |
| 128306 | /* VMOVMSKPSYrr */ |
| 128307 | GR32orGR64, VR256, |
| 128308 | /* VMOVMSKPSrr */ |
| 128309 | GR32orGR64, VR128, |
| 128310 | /* VMOVNTDQAYrm */ |
| 128311 | VR256, i256mem, |
| 128312 | /* VMOVNTDQAZ128rm */ |
| 128313 | VR128X, i128mem, |
| 128314 | /* VMOVNTDQAZ256rm */ |
| 128315 | VR256X, i256mem, |
| 128316 | /* VMOVNTDQAZrm */ |
| 128317 | VR512, i512mem, |
| 128318 | /* VMOVNTDQArm */ |
| 128319 | VR128, i128mem, |
| 128320 | /* VMOVNTDQYmr */ |
| 128321 | i256mem, VR256, |
| 128322 | /* VMOVNTDQZ128mr */ |
| 128323 | i128mem, VR128X, |
| 128324 | /* VMOVNTDQZ256mr */ |
| 128325 | i256mem, VR256X, |
| 128326 | /* VMOVNTDQZmr */ |
| 128327 | i512mem, VR512, |
| 128328 | /* VMOVNTDQmr */ |
| 128329 | i128mem, VR128, |
| 128330 | /* VMOVNTPDYmr */ |
| 128331 | f256mem, VR256, |
| 128332 | /* VMOVNTPDZ128mr */ |
| 128333 | f128mem, VR128X, |
| 128334 | /* VMOVNTPDZ256mr */ |
| 128335 | f256mem, VR256X, |
| 128336 | /* VMOVNTPDZmr */ |
| 128337 | f512mem, VR512, |
| 128338 | /* VMOVNTPDmr */ |
| 128339 | f128mem, VR128, |
| 128340 | /* VMOVNTPSYmr */ |
| 128341 | f256mem, VR256, |
| 128342 | /* VMOVNTPSZ128mr */ |
| 128343 | f128mem, VR128X, |
| 128344 | /* VMOVNTPSZ256mr */ |
| 128345 | f256mem, VR256X, |
| 128346 | /* VMOVNTPSZmr */ |
| 128347 | f512mem, VR512, |
| 128348 | /* VMOVNTPSmr */ |
| 128349 | f128mem, VR128, |
| 128350 | /* VMOVPDI2DIZmr */ |
| 128351 | i32mem, VR128X, |
| 128352 | /* VMOVPDI2DIZrr */ |
| 128353 | GR32, VR128X, |
| 128354 | /* VMOVPDI2DImr */ |
| 128355 | i32mem, VR128, |
| 128356 | /* VMOVPDI2DIrr */ |
| 128357 | GR32, VR128, |
| 128358 | /* VMOVPQI2QIZmr */ |
| 128359 | i64mem, VR128X, |
| 128360 | /* VMOVPQI2QIZrr */ |
| 128361 | VR128X, VR128X, |
| 128362 | /* VMOVPQI2QImr */ |
| 128363 | i64mem, VR128, |
| 128364 | /* VMOVPQI2QIrr */ |
| 128365 | VR128, VR128, |
| 128366 | /* VMOVPQIto64Zmr */ |
| 128367 | i64mem, VR128X, |
| 128368 | /* VMOVPQIto64Zrr */ |
| 128369 | GR64, VR128X, |
| 128370 | /* VMOVPQIto64mr */ |
| 128371 | i64mem, VR128, |
| 128372 | /* VMOVPQIto64rr */ |
| 128373 | GR64, VR128, |
| 128374 | /* VMOVQI2PQIZrm */ |
| 128375 | VR128X, i64mem, |
| 128376 | /* VMOVQI2PQIrm */ |
| 128377 | VR128, i64mem, |
| 128378 | /* VMOVSDZmr */ |
| 128379 | f64mem, FR64X, |
| 128380 | /* VMOVSDZmrk */ |
| 128381 | f64mem, VK1WM, VR128X, |
| 128382 | /* VMOVSDZrm */ |
| 128383 | VR128X, f64mem, |
| 128384 | /* VMOVSDZrm_alt */ |
| 128385 | FR64X, f64mem, |
| 128386 | /* VMOVSDZrmk */ |
| 128387 | VR128X, VR128X, VK1WM, f64mem, |
| 128388 | /* VMOVSDZrmkz */ |
| 128389 | VR128X, VK1WM, f64mem, |
| 128390 | /* VMOVSDZrr */ |
| 128391 | VR128X, VR128X, VR128X, |
| 128392 | /* VMOVSDZrr_REV */ |
| 128393 | VR128X, VR128X, VR128X, |
| 128394 | /* VMOVSDZrrk */ |
| 128395 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 128396 | /* VMOVSDZrrk_REV */ |
| 128397 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 128398 | /* VMOVSDZrrkz */ |
| 128399 | VR128X, VK1WM, VR128X, VR128X, |
| 128400 | /* VMOVSDZrrkz_REV */ |
| 128401 | VR128X, VK1WM, VR128X, VR128X, |
| 128402 | /* VMOVSDmr */ |
| 128403 | f64mem, FR64, |
| 128404 | /* VMOVSDrm */ |
| 128405 | VR128, f64mem, |
| 128406 | /* VMOVSDrm_alt */ |
| 128407 | FR64, f64mem, |
| 128408 | /* VMOVSDrr */ |
| 128409 | VR128, VR128, VR128, |
| 128410 | /* VMOVSDrr_REV */ |
| 128411 | VR128, VR128, VR128, |
| 128412 | /* VMOVSDto64Zrr */ |
| 128413 | GR64, FR64X, |
| 128414 | /* VMOVSDto64rr */ |
| 128415 | GR64, FR64, |
| 128416 | /* VMOVSH2Wrr */ |
| 128417 | GR32, VR128X, |
| 128418 | /* VMOVSHDUPYrm */ |
| 128419 | VR256, f256mem, |
| 128420 | /* VMOVSHDUPYrr */ |
| 128421 | VR256, VR256, |
| 128422 | /* VMOVSHDUPZ128rm */ |
| 128423 | VR128X, f128mem, |
| 128424 | /* VMOVSHDUPZ128rmk */ |
| 128425 | VR128X, VR128X, VK4WM, f128mem, |
| 128426 | /* VMOVSHDUPZ128rmkz */ |
| 128427 | VR128X, VK4WM, f128mem, |
| 128428 | /* VMOVSHDUPZ128rr */ |
| 128429 | VR128X, VR128X, |
| 128430 | /* VMOVSHDUPZ128rrk */ |
| 128431 | VR128X, VR128X, VK4WM, VR128X, |
| 128432 | /* VMOVSHDUPZ128rrkz */ |
| 128433 | VR128X, VK4WM, VR128X, |
| 128434 | /* VMOVSHDUPZ256rm */ |
| 128435 | VR256X, f256mem, |
| 128436 | /* VMOVSHDUPZ256rmk */ |
| 128437 | VR256X, VR256X, VK8WM, f256mem, |
| 128438 | /* VMOVSHDUPZ256rmkz */ |
| 128439 | VR256X, VK8WM, f256mem, |
| 128440 | /* VMOVSHDUPZ256rr */ |
| 128441 | VR256X, VR256X, |
| 128442 | /* VMOVSHDUPZ256rrk */ |
| 128443 | VR256X, VR256X, VK8WM, VR256X, |
| 128444 | /* VMOVSHDUPZ256rrkz */ |
| 128445 | VR256X, VK8WM, VR256X, |
| 128446 | /* VMOVSHDUPZrm */ |
| 128447 | VR512, f512mem, |
| 128448 | /* VMOVSHDUPZrmk */ |
| 128449 | VR512, VR512, VK16WM, f512mem, |
| 128450 | /* VMOVSHDUPZrmkz */ |
| 128451 | VR512, VK16WM, f512mem, |
| 128452 | /* VMOVSHDUPZrr */ |
| 128453 | VR512, VR512, |
| 128454 | /* VMOVSHDUPZrrk */ |
| 128455 | VR512, VR512, VK16WM, VR512, |
| 128456 | /* VMOVSHDUPZrrkz */ |
| 128457 | VR512, VK16WM, VR512, |
| 128458 | /* VMOVSHDUPrm */ |
| 128459 | VR128, f128mem, |
| 128460 | /* VMOVSHDUPrr */ |
| 128461 | VR128, VR128, |
| 128462 | /* VMOVSHZmr */ |
| 128463 | f16mem, FR16X, |
| 128464 | /* VMOVSHZmrk */ |
| 128465 | f16mem, VK1WM, VR128X, |
| 128466 | /* VMOVSHZrm */ |
| 128467 | VR128X, f16mem, |
| 128468 | /* VMOVSHZrm_alt */ |
| 128469 | FR16X, f16mem, |
| 128470 | /* VMOVSHZrmk */ |
| 128471 | VR128X, VR128X, VK1WM, f16mem, |
| 128472 | /* VMOVSHZrmkz */ |
| 128473 | VR128X, VK1WM, f16mem, |
| 128474 | /* VMOVSHZrr */ |
| 128475 | VR128X, VR128X, VR128X, |
| 128476 | /* VMOVSHZrr_REV */ |
| 128477 | VR128X, VR128X, VR128X, |
| 128478 | /* VMOVSHZrrk */ |
| 128479 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 128480 | /* VMOVSHZrrk_REV */ |
| 128481 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 128482 | /* VMOVSHZrrkz */ |
| 128483 | VR128X, VK1WM, VR128X, VR128X, |
| 128484 | /* VMOVSHZrrkz_REV */ |
| 128485 | VR128X, VK1WM, VR128X, VR128X, |
| 128486 | /* VMOVSHtoW64rr */ |
| 128487 | GR64, VR128X, |
| 128488 | /* VMOVSLDUPYrm */ |
| 128489 | VR256, f256mem, |
| 128490 | /* VMOVSLDUPYrr */ |
| 128491 | VR256, VR256, |
| 128492 | /* VMOVSLDUPZ128rm */ |
| 128493 | VR128X, f128mem, |
| 128494 | /* VMOVSLDUPZ128rmk */ |
| 128495 | VR128X, VR128X, VK4WM, f128mem, |
| 128496 | /* VMOVSLDUPZ128rmkz */ |
| 128497 | VR128X, VK4WM, f128mem, |
| 128498 | /* VMOVSLDUPZ128rr */ |
| 128499 | VR128X, VR128X, |
| 128500 | /* VMOVSLDUPZ128rrk */ |
| 128501 | VR128X, VR128X, VK4WM, VR128X, |
| 128502 | /* VMOVSLDUPZ128rrkz */ |
| 128503 | VR128X, VK4WM, VR128X, |
| 128504 | /* VMOVSLDUPZ256rm */ |
| 128505 | VR256X, f256mem, |
| 128506 | /* VMOVSLDUPZ256rmk */ |
| 128507 | VR256X, VR256X, VK8WM, f256mem, |
| 128508 | /* VMOVSLDUPZ256rmkz */ |
| 128509 | VR256X, VK8WM, f256mem, |
| 128510 | /* VMOVSLDUPZ256rr */ |
| 128511 | VR256X, VR256X, |
| 128512 | /* VMOVSLDUPZ256rrk */ |
| 128513 | VR256X, VR256X, VK8WM, VR256X, |
| 128514 | /* VMOVSLDUPZ256rrkz */ |
| 128515 | VR256X, VK8WM, VR256X, |
| 128516 | /* VMOVSLDUPZrm */ |
| 128517 | VR512, f512mem, |
| 128518 | /* VMOVSLDUPZrmk */ |
| 128519 | VR512, VR512, VK16WM, f512mem, |
| 128520 | /* VMOVSLDUPZrmkz */ |
| 128521 | VR512, VK16WM, f512mem, |
| 128522 | /* VMOVSLDUPZrr */ |
| 128523 | VR512, VR512, |
| 128524 | /* VMOVSLDUPZrrk */ |
| 128525 | VR512, VR512, VK16WM, VR512, |
| 128526 | /* VMOVSLDUPZrrkz */ |
| 128527 | VR512, VK16WM, VR512, |
| 128528 | /* VMOVSLDUPrm */ |
| 128529 | VR128, f128mem, |
| 128530 | /* VMOVSLDUPrr */ |
| 128531 | VR128, VR128, |
| 128532 | /* VMOVSS2DIZrr */ |
| 128533 | GR32, FR32X, |
| 128534 | /* VMOVSS2DIrr */ |
| 128535 | GR32, FR32, |
| 128536 | /* VMOVSSZmr */ |
| 128537 | f32mem, FR32X, |
| 128538 | /* VMOVSSZmrk */ |
| 128539 | f32mem, VK1WM, VR128X, |
| 128540 | /* VMOVSSZrm */ |
| 128541 | VR128X, f32mem, |
| 128542 | /* VMOVSSZrm_alt */ |
| 128543 | FR32X, f32mem, |
| 128544 | /* VMOVSSZrmk */ |
| 128545 | VR128X, VR128X, VK1WM, f32mem, |
| 128546 | /* VMOVSSZrmkz */ |
| 128547 | VR128X, VK1WM, f32mem, |
| 128548 | /* VMOVSSZrr */ |
| 128549 | VR128X, VR128X, VR128X, |
| 128550 | /* VMOVSSZrr_REV */ |
| 128551 | VR128X, VR128X, VR128X, |
| 128552 | /* VMOVSSZrrk */ |
| 128553 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 128554 | /* VMOVSSZrrk_REV */ |
| 128555 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 128556 | /* VMOVSSZrrkz */ |
| 128557 | VR128X, VK1WM, VR128X, VR128X, |
| 128558 | /* VMOVSSZrrkz_REV */ |
| 128559 | VR128X, VK1WM, VR128X, VR128X, |
| 128560 | /* VMOVSSmr */ |
| 128561 | f32mem, FR32, |
| 128562 | /* VMOVSSrm */ |
| 128563 | VR128, f32mem, |
| 128564 | /* VMOVSSrm_alt */ |
| 128565 | FR32, f32mem, |
| 128566 | /* VMOVSSrr */ |
| 128567 | VR128, VR128, VR128, |
| 128568 | /* VMOVSSrr_REV */ |
| 128569 | VR128, VR128, VR128, |
| 128570 | /* VMOVUPDYmr */ |
| 128571 | f256mem, VR256, |
| 128572 | /* VMOVUPDYrm */ |
| 128573 | VR256, f256mem, |
| 128574 | /* VMOVUPDYrr */ |
| 128575 | VR256, VR256, |
| 128576 | /* VMOVUPDYrr_REV */ |
| 128577 | VR256, VR256, |
| 128578 | /* VMOVUPDZ128mr */ |
| 128579 | f128mem, VR128X, |
| 128580 | /* VMOVUPDZ128mrk */ |
| 128581 | f128mem, VK2WM, VR128X, |
| 128582 | /* VMOVUPDZ128rm */ |
| 128583 | VR128X, f128mem, |
| 128584 | /* VMOVUPDZ128rmk */ |
| 128585 | VR128X, VR128X, VK2WM, f128mem, |
| 128586 | /* VMOVUPDZ128rmkz */ |
| 128587 | VR128X, VK2WM, f128mem, |
| 128588 | /* VMOVUPDZ128rr */ |
| 128589 | VR128X, VR128X, |
| 128590 | /* VMOVUPDZ128rr_REV */ |
| 128591 | VR128X, VR128X, |
| 128592 | /* VMOVUPDZ128rrk */ |
| 128593 | VR128X, VR128X, VK2WM, VR128X, |
| 128594 | /* VMOVUPDZ128rrk_REV */ |
| 128595 | VR128X, VK2WM, VR128X, |
| 128596 | /* VMOVUPDZ128rrkz */ |
| 128597 | VR128X, VK2WM, VR128X, |
| 128598 | /* VMOVUPDZ128rrkz_REV */ |
| 128599 | VR128X, VK2WM, VR128X, |
| 128600 | /* VMOVUPDZ256mr */ |
| 128601 | f256mem, VR256X, |
| 128602 | /* VMOVUPDZ256mrk */ |
| 128603 | f256mem, VK4WM, VR256X, |
| 128604 | /* VMOVUPDZ256rm */ |
| 128605 | VR256X, f256mem, |
| 128606 | /* VMOVUPDZ256rmk */ |
| 128607 | VR256X, VR256X, VK4WM, f256mem, |
| 128608 | /* VMOVUPDZ256rmkz */ |
| 128609 | VR256X, VK4WM, f256mem, |
| 128610 | /* VMOVUPDZ256rr */ |
| 128611 | VR256X, VR256X, |
| 128612 | /* VMOVUPDZ256rr_REV */ |
| 128613 | VR256X, VR256X, |
| 128614 | /* VMOVUPDZ256rrk */ |
| 128615 | VR256X, VR256X, VK4WM, VR256X, |
| 128616 | /* VMOVUPDZ256rrk_REV */ |
| 128617 | VR256X, VK4WM, VR256X, |
| 128618 | /* VMOVUPDZ256rrkz */ |
| 128619 | VR256X, VK4WM, VR256X, |
| 128620 | /* VMOVUPDZ256rrkz_REV */ |
| 128621 | VR256X, VK4WM, VR256X, |
| 128622 | /* VMOVUPDZmr */ |
| 128623 | f512mem, VR512, |
| 128624 | /* VMOVUPDZmrk */ |
| 128625 | f512mem, VK8WM, VR512, |
| 128626 | /* VMOVUPDZrm */ |
| 128627 | VR512, f512mem, |
| 128628 | /* VMOVUPDZrmk */ |
| 128629 | VR512, VR512, VK8WM, f512mem, |
| 128630 | /* VMOVUPDZrmkz */ |
| 128631 | VR512, VK8WM, f512mem, |
| 128632 | /* VMOVUPDZrr */ |
| 128633 | VR512, VR512, |
| 128634 | /* VMOVUPDZrr_REV */ |
| 128635 | VR512, VR512, |
| 128636 | /* VMOVUPDZrrk */ |
| 128637 | VR512, VR512, VK8WM, VR512, |
| 128638 | /* VMOVUPDZrrk_REV */ |
| 128639 | VR512, VK8WM, VR512, |
| 128640 | /* VMOVUPDZrrkz */ |
| 128641 | VR512, VK8WM, VR512, |
| 128642 | /* VMOVUPDZrrkz_REV */ |
| 128643 | VR512, VK8WM, VR512, |
| 128644 | /* VMOVUPDmr */ |
| 128645 | f128mem, VR128, |
| 128646 | /* VMOVUPDrm */ |
| 128647 | VR128, f128mem, |
| 128648 | /* VMOVUPDrr */ |
| 128649 | VR128, VR128, |
| 128650 | /* VMOVUPDrr_REV */ |
| 128651 | VR128, VR128, |
| 128652 | /* VMOVUPSYmr */ |
| 128653 | f256mem, VR256, |
| 128654 | /* VMOVUPSYrm */ |
| 128655 | VR256, f256mem, |
| 128656 | /* VMOVUPSYrr */ |
| 128657 | VR256, VR256, |
| 128658 | /* VMOVUPSYrr_REV */ |
| 128659 | VR256, VR256, |
| 128660 | /* VMOVUPSZ128mr */ |
| 128661 | f128mem, VR128X, |
| 128662 | /* VMOVUPSZ128mrk */ |
| 128663 | f128mem, VK4WM, VR128X, |
| 128664 | /* VMOVUPSZ128rm */ |
| 128665 | VR128X, f128mem, |
| 128666 | /* VMOVUPSZ128rmk */ |
| 128667 | VR128X, VR128X, VK4WM, f128mem, |
| 128668 | /* VMOVUPSZ128rmkz */ |
| 128669 | VR128X, VK4WM, f128mem, |
| 128670 | /* VMOVUPSZ128rr */ |
| 128671 | VR128X, VR128X, |
| 128672 | /* VMOVUPSZ128rr_REV */ |
| 128673 | VR128X, VR128X, |
| 128674 | /* VMOVUPSZ128rrk */ |
| 128675 | VR128X, VR128X, VK4WM, VR128X, |
| 128676 | /* VMOVUPSZ128rrk_REV */ |
| 128677 | VR128X, VK4WM, VR128X, |
| 128678 | /* VMOVUPSZ128rrkz */ |
| 128679 | VR128X, VK4WM, VR128X, |
| 128680 | /* VMOVUPSZ128rrkz_REV */ |
| 128681 | VR128X, VK4WM, VR128X, |
| 128682 | /* VMOVUPSZ256mr */ |
| 128683 | f256mem, VR256X, |
| 128684 | /* VMOVUPSZ256mrk */ |
| 128685 | f256mem, VK8WM, VR256X, |
| 128686 | /* VMOVUPSZ256rm */ |
| 128687 | VR256X, f256mem, |
| 128688 | /* VMOVUPSZ256rmk */ |
| 128689 | VR256X, VR256X, VK8WM, f256mem, |
| 128690 | /* VMOVUPSZ256rmkz */ |
| 128691 | VR256X, VK8WM, f256mem, |
| 128692 | /* VMOVUPSZ256rr */ |
| 128693 | VR256X, VR256X, |
| 128694 | /* VMOVUPSZ256rr_REV */ |
| 128695 | VR256X, VR256X, |
| 128696 | /* VMOVUPSZ256rrk */ |
| 128697 | VR256X, VR256X, VK8WM, VR256X, |
| 128698 | /* VMOVUPSZ256rrk_REV */ |
| 128699 | VR256X, VK8WM, VR256X, |
| 128700 | /* VMOVUPSZ256rrkz */ |
| 128701 | VR256X, VK8WM, VR256X, |
| 128702 | /* VMOVUPSZ256rrkz_REV */ |
| 128703 | VR256X, VK8WM, VR256X, |
| 128704 | /* VMOVUPSZmr */ |
| 128705 | f512mem, VR512, |
| 128706 | /* VMOVUPSZmrk */ |
| 128707 | f512mem, VK16WM, VR512, |
| 128708 | /* VMOVUPSZrm */ |
| 128709 | VR512, f512mem, |
| 128710 | /* VMOVUPSZrmk */ |
| 128711 | VR512, VR512, VK16WM, f512mem, |
| 128712 | /* VMOVUPSZrmkz */ |
| 128713 | VR512, VK16WM, f512mem, |
| 128714 | /* VMOVUPSZrr */ |
| 128715 | VR512, VR512, |
| 128716 | /* VMOVUPSZrr_REV */ |
| 128717 | VR512, VR512, |
| 128718 | /* VMOVUPSZrrk */ |
| 128719 | VR512, VR512, VK16WM, VR512, |
| 128720 | /* VMOVUPSZrrk_REV */ |
| 128721 | VR512, VK16WM, VR512, |
| 128722 | /* VMOVUPSZrrkz */ |
| 128723 | VR512, VK16WM, VR512, |
| 128724 | /* VMOVUPSZrrkz_REV */ |
| 128725 | VR512, VK16WM, VR512, |
| 128726 | /* VMOVUPSmr */ |
| 128727 | f128mem, VR128, |
| 128728 | /* VMOVUPSrm */ |
| 128729 | VR128, f128mem, |
| 128730 | /* VMOVUPSrr */ |
| 128731 | VR128, VR128, |
| 128732 | /* VMOVUPSrr_REV */ |
| 128733 | VR128, VR128, |
| 128734 | /* VMOVW2SHrr */ |
| 128735 | VR128X, GR32, |
| 128736 | /* VMOVW64toSHrr */ |
| 128737 | VR128X, GR64, |
| 128738 | /* VMOVWmr */ |
| 128739 | i16mem, VR128X, |
| 128740 | /* VMOVWrm */ |
| 128741 | VR128X, i16mem, |
| 128742 | /* VMOVZPQILo2PQIZrr */ |
| 128743 | VR128X, VR128X, |
| 128744 | /* VMOVZPQILo2PQIrr */ |
| 128745 | VR128, VR128, |
| 128746 | /* VMPSADBWYrmi */ |
| 128747 | VR256, VR256, i256mem, u8imm, |
| 128748 | /* VMPSADBWYrri */ |
| 128749 | VR256, VR256, VR256, u8imm, |
| 128750 | /* VMPSADBWrmi */ |
| 128751 | VR128, VR128, i128mem, u8imm, |
| 128752 | /* VMPSADBWrri */ |
| 128753 | VR128, VR128, VR128, u8imm, |
| 128754 | /* VMPTRLDm */ |
| 128755 | i64mem, |
| 128756 | /* VMPTRSTm */ |
| 128757 | i64mem, |
| 128758 | /* VMREAD32mr */ |
| 128759 | i32mem, GR32, |
| 128760 | /* VMREAD32rr */ |
| 128761 | GR32, GR32, |
| 128762 | /* VMREAD64mr */ |
| 128763 | i64mem, GR64, |
| 128764 | /* VMREAD64rr */ |
| 128765 | GR64, GR64, |
| 128766 | /* VMRESUME */ |
| 128767 | /* VMRUN32 */ |
| 128768 | /* VMRUN64 */ |
| 128769 | /* VMSAVE32 */ |
| 128770 | /* VMSAVE64 */ |
| 128771 | /* VMULPDYrm */ |
| 128772 | VR256, VR256, f256mem, |
| 128773 | /* VMULPDYrr */ |
| 128774 | VR256, VR256, VR256, |
| 128775 | /* VMULPDZ128rm */ |
| 128776 | VR128X, VR128X, f128mem, |
| 128777 | /* VMULPDZ128rmb */ |
| 128778 | VR128X, VR128X, f64mem, |
| 128779 | /* VMULPDZ128rmbk */ |
| 128780 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 128781 | /* VMULPDZ128rmbkz */ |
| 128782 | VR128X, VK2WM, VR128X, f64mem, |
| 128783 | /* VMULPDZ128rmk */ |
| 128784 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 128785 | /* VMULPDZ128rmkz */ |
| 128786 | VR128X, VK2WM, VR128X, f128mem, |
| 128787 | /* VMULPDZ128rr */ |
| 128788 | VR128X, VR128X, VR128X, |
| 128789 | /* VMULPDZ128rrk */ |
| 128790 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 128791 | /* VMULPDZ128rrkz */ |
| 128792 | VR128X, VK2WM, VR128X, VR128X, |
| 128793 | /* VMULPDZ256rm */ |
| 128794 | VR256X, VR256X, f256mem, |
| 128795 | /* VMULPDZ256rmb */ |
| 128796 | VR256X, VR256X, f64mem, |
| 128797 | /* VMULPDZ256rmbk */ |
| 128798 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 128799 | /* VMULPDZ256rmbkz */ |
| 128800 | VR256X, VK4WM, VR256X, f64mem, |
| 128801 | /* VMULPDZ256rmk */ |
| 128802 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 128803 | /* VMULPDZ256rmkz */ |
| 128804 | VR256X, VK4WM, VR256X, f256mem, |
| 128805 | /* VMULPDZ256rr */ |
| 128806 | VR256X, VR256X, VR256X, |
| 128807 | /* VMULPDZ256rrk */ |
| 128808 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 128809 | /* VMULPDZ256rrkz */ |
| 128810 | VR256X, VK4WM, VR256X, VR256X, |
| 128811 | /* VMULPDZrm */ |
| 128812 | VR512, VR512, f512mem, |
| 128813 | /* VMULPDZrmb */ |
| 128814 | VR512, VR512, f64mem, |
| 128815 | /* VMULPDZrmbk */ |
| 128816 | VR512, VR512, VK8WM, VR512, f64mem, |
| 128817 | /* VMULPDZrmbkz */ |
| 128818 | VR512, VK8WM, VR512, f64mem, |
| 128819 | /* VMULPDZrmk */ |
| 128820 | VR512, VR512, VK8WM, VR512, f512mem, |
| 128821 | /* VMULPDZrmkz */ |
| 128822 | VR512, VK8WM, VR512, f512mem, |
| 128823 | /* VMULPDZrr */ |
| 128824 | VR512, VR512, VR512, |
| 128825 | /* VMULPDZrrb */ |
| 128826 | VR512, VR512, VR512, AVX512RC, |
| 128827 | /* VMULPDZrrbk */ |
| 128828 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 128829 | /* VMULPDZrrbkz */ |
| 128830 | VR512, VK8WM, VR512, VR512, AVX512RC, |
| 128831 | /* VMULPDZrrk */ |
| 128832 | VR512, VR512, VK8WM, VR512, VR512, |
| 128833 | /* VMULPDZrrkz */ |
| 128834 | VR512, VK8WM, VR512, VR512, |
| 128835 | /* VMULPDrm */ |
| 128836 | VR128, VR128, f128mem, |
| 128837 | /* VMULPDrr */ |
| 128838 | VR128, VR128, VR128, |
| 128839 | /* VMULPHZ128rm */ |
| 128840 | VR128X, VR128X, f128mem, |
| 128841 | /* VMULPHZ128rmb */ |
| 128842 | VR128X, VR128X, f16mem, |
| 128843 | /* VMULPHZ128rmbk */ |
| 128844 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 128845 | /* VMULPHZ128rmbkz */ |
| 128846 | VR128X, VK8WM, VR128X, f16mem, |
| 128847 | /* VMULPHZ128rmk */ |
| 128848 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 128849 | /* VMULPHZ128rmkz */ |
| 128850 | VR128X, VK8WM, VR128X, f128mem, |
| 128851 | /* VMULPHZ128rr */ |
| 128852 | VR128X, VR128X, VR128X, |
| 128853 | /* VMULPHZ128rrk */ |
| 128854 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 128855 | /* VMULPHZ128rrkz */ |
| 128856 | VR128X, VK8WM, VR128X, VR128X, |
| 128857 | /* VMULPHZ256rm */ |
| 128858 | VR256X, VR256X, f256mem, |
| 128859 | /* VMULPHZ256rmb */ |
| 128860 | VR256X, VR256X, f16mem, |
| 128861 | /* VMULPHZ256rmbk */ |
| 128862 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 128863 | /* VMULPHZ256rmbkz */ |
| 128864 | VR256X, VK16WM, VR256X, f16mem, |
| 128865 | /* VMULPHZ256rmk */ |
| 128866 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 128867 | /* VMULPHZ256rmkz */ |
| 128868 | VR256X, VK16WM, VR256X, f256mem, |
| 128869 | /* VMULPHZ256rr */ |
| 128870 | VR256X, VR256X, VR256X, |
| 128871 | /* VMULPHZ256rrk */ |
| 128872 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 128873 | /* VMULPHZ256rrkz */ |
| 128874 | VR256X, VK16WM, VR256X, VR256X, |
| 128875 | /* VMULPHZrm */ |
| 128876 | VR512, VR512, f512mem, |
| 128877 | /* VMULPHZrmb */ |
| 128878 | VR512, VR512, f16mem, |
| 128879 | /* VMULPHZrmbk */ |
| 128880 | VR512, VR512, VK32WM, VR512, f16mem, |
| 128881 | /* VMULPHZrmbkz */ |
| 128882 | VR512, VK32WM, VR512, f16mem, |
| 128883 | /* VMULPHZrmk */ |
| 128884 | VR512, VR512, VK32WM, VR512, f512mem, |
| 128885 | /* VMULPHZrmkz */ |
| 128886 | VR512, VK32WM, VR512, f512mem, |
| 128887 | /* VMULPHZrr */ |
| 128888 | VR512, VR512, VR512, |
| 128889 | /* VMULPHZrrb */ |
| 128890 | VR512, VR512, VR512, AVX512RC, |
| 128891 | /* VMULPHZrrbk */ |
| 128892 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 128893 | /* VMULPHZrrbkz */ |
| 128894 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 128895 | /* VMULPHZrrk */ |
| 128896 | VR512, VR512, VK32WM, VR512, VR512, |
| 128897 | /* VMULPHZrrkz */ |
| 128898 | VR512, VK32WM, VR512, VR512, |
| 128899 | /* VMULPSYrm */ |
| 128900 | VR256, VR256, f256mem, |
| 128901 | /* VMULPSYrr */ |
| 128902 | VR256, VR256, VR256, |
| 128903 | /* VMULPSZ128rm */ |
| 128904 | VR128X, VR128X, f128mem, |
| 128905 | /* VMULPSZ128rmb */ |
| 128906 | VR128X, VR128X, f32mem, |
| 128907 | /* VMULPSZ128rmbk */ |
| 128908 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 128909 | /* VMULPSZ128rmbkz */ |
| 128910 | VR128X, VK4WM, VR128X, f32mem, |
| 128911 | /* VMULPSZ128rmk */ |
| 128912 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 128913 | /* VMULPSZ128rmkz */ |
| 128914 | VR128X, VK4WM, VR128X, f128mem, |
| 128915 | /* VMULPSZ128rr */ |
| 128916 | VR128X, VR128X, VR128X, |
| 128917 | /* VMULPSZ128rrk */ |
| 128918 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 128919 | /* VMULPSZ128rrkz */ |
| 128920 | VR128X, VK4WM, VR128X, VR128X, |
| 128921 | /* VMULPSZ256rm */ |
| 128922 | VR256X, VR256X, f256mem, |
| 128923 | /* VMULPSZ256rmb */ |
| 128924 | VR256X, VR256X, f32mem, |
| 128925 | /* VMULPSZ256rmbk */ |
| 128926 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 128927 | /* VMULPSZ256rmbkz */ |
| 128928 | VR256X, VK8WM, VR256X, f32mem, |
| 128929 | /* VMULPSZ256rmk */ |
| 128930 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 128931 | /* VMULPSZ256rmkz */ |
| 128932 | VR256X, VK8WM, VR256X, f256mem, |
| 128933 | /* VMULPSZ256rr */ |
| 128934 | VR256X, VR256X, VR256X, |
| 128935 | /* VMULPSZ256rrk */ |
| 128936 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 128937 | /* VMULPSZ256rrkz */ |
| 128938 | VR256X, VK8WM, VR256X, VR256X, |
| 128939 | /* VMULPSZrm */ |
| 128940 | VR512, VR512, f512mem, |
| 128941 | /* VMULPSZrmb */ |
| 128942 | VR512, VR512, f32mem, |
| 128943 | /* VMULPSZrmbk */ |
| 128944 | VR512, VR512, VK16WM, VR512, f32mem, |
| 128945 | /* VMULPSZrmbkz */ |
| 128946 | VR512, VK16WM, VR512, f32mem, |
| 128947 | /* VMULPSZrmk */ |
| 128948 | VR512, VR512, VK16WM, VR512, f512mem, |
| 128949 | /* VMULPSZrmkz */ |
| 128950 | VR512, VK16WM, VR512, f512mem, |
| 128951 | /* VMULPSZrr */ |
| 128952 | VR512, VR512, VR512, |
| 128953 | /* VMULPSZrrb */ |
| 128954 | VR512, VR512, VR512, AVX512RC, |
| 128955 | /* VMULPSZrrbk */ |
| 128956 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 128957 | /* VMULPSZrrbkz */ |
| 128958 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 128959 | /* VMULPSZrrk */ |
| 128960 | VR512, VR512, VK16WM, VR512, VR512, |
| 128961 | /* VMULPSZrrkz */ |
| 128962 | VR512, VK16WM, VR512, VR512, |
| 128963 | /* VMULPSrm */ |
| 128964 | VR128, VR128, f128mem, |
| 128965 | /* VMULPSrr */ |
| 128966 | VR128, VR128, VR128, |
| 128967 | /* VMULSDZrm */ |
| 128968 | FR64X, FR64X, f64mem, |
| 128969 | /* VMULSDZrm_Int */ |
| 128970 | VR128X, VR128X, sdmem, |
| 128971 | /* VMULSDZrm_Intk */ |
| 128972 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 128973 | /* VMULSDZrm_Intkz */ |
| 128974 | VR128X, VK1WM, VR128X, sdmem, |
| 128975 | /* VMULSDZrr */ |
| 128976 | FR64X, FR64X, FR64X, |
| 128977 | /* VMULSDZrr_Int */ |
| 128978 | VR128X, VR128X, VR128X, |
| 128979 | /* VMULSDZrr_Intk */ |
| 128980 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 128981 | /* VMULSDZrr_Intkz */ |
| 128982 | VR128X, VK1WM, VR128X, VR128X, |
| 128983 | /* VMULSDZrrb_Int */ |
| 128984 | VR128X, VR128X, VR128X, AVX512RC, |
| 128985 | /* VMULSDZrrb_Intk */ |
| 128986 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 128987 | /* VMULSDZrrb_Intkz */ |
| 128988 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 128989 | /* VMULSDrm */ |
| 128990 | FR64, FR64, f64mem, |
| 128991 | /* VMULSDrm_Int */ |
| 128992 | VR128, VR128, sdmem, |
| 128993 | /* VMULSDrr */ |
| 128994 | FR64, FR64, FR64, |
| 128995 | /* VMULSDrr_Int */ |
| 128996 | VR128, VR128, VR128, |
| 128997 | /* VMULSHZrm */ |
| 128998 | FR16X, FR16X, f16mem, |
| 128999 | /* VMULSHZrm_Int */ |
| 129000 | VR128X, VR128X, shmem, |
| 129001 | /* VMULSHZrm_Intk */ |
| 129002 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 129003 | /* VMULSHZrm_Intkz */ |
| 129004 | VR128X, VK1WM, VR128X, shmem, |
| 129005 | /* VMULSHZrr */ |
| 129006 | FR16X, FR16X, FR16X, |
| 129007 | /* VMULSHZrr_Int */ |
| 129008 | VR128X, VR128X, VR128X, |
| 129009 | /* VMULSHZrr_Intk */ |
| 129010 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 129011 | /* VMULSHZrr_Intkz */ |
| 129012 | VR128X, VK1WM, VR128X, VR128X, |
| 129013 | /* VMULSHZrrb_Int */ |
| 129014 | VR128X, VR128X, VR128X, AVX512RC, |
| 129015 | /* VMULSHZrrb_Intk */ |
| 129016 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 129017 | /* VMULSHZrrb_Intkz */ |
| 129018 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 129019 | /* VMULSSZrm */ |
| 129020 | FR32X, FR32X, f32mem, |
| 129021 | /* VMULSSZrm_Int */ |
| 129022 | VR128X, VR128X, ssmem, |
| 129023 | /* VMULSSZrm_Intk */ |
| 129024 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 129025 | /* VMULSSZrm_Intkz */ |
| 129026 | VR128X, VK1WM, VR128X, ssmem, |
| 129027 | /* VMULSSZrr */ |
| 129028 | FR32X, FR32X, FR32X, |
| 129029 | /* VMULSSZrr_Int */ |
| 129030 | VR128X, VR128X, VR128X, |
| 129031 | /* VMULSSZrr_Intk */ |
| 129032 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 129033 | /* VMULSSZrr_Intkz */ |
| 129034 | VR128X, VK1WM, VR128X, VR128X, |
| 129035 | /* VMULSSZrrb_Int */ |
| 129036 | VR128X, VR128X, VR128X, AVX512RC, |
| 129037 | /* VMULSSZrrb_Intk */ |
| 129038 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 129039 | /* VMULSSZrrb_Intkz */ |
| 129040 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 129041 | /* VMULSSrm */ |
| 129042 | FR32, FR32, f32mem, |
| 129043 | /* VMULSSrm_Int */ |
| 129044 | VR128, VR128, ssmem, |
| 129045 | /* VMULSSrr */ |
| 129046 | FR32, FR32, FR32, |
| 129047 | /* VMULSSrr_Int */ |
| 129048 | VR128, VR128, VR128, |
| 129049 | /* VMWRITE32rm */ |
| 129050 | GR32, i32mem, |
| 129051 | /* VMWRITE32rr */ |
| 129052 | GR32, GR32, |
| 129053 | /* VMWRITE64rm */ |
| 129054 | GR64, i64mem, |
| 129055 | /* VMWRITE64rr */ |
| 129056 | GR64, GR64, |
| 129057 | /* VMXOFF */ |
| 129058 | /* VMXON */ |
| 129059 | i64mem, |
| 129060 | /* VORPDYrm */ |
| 129061 | VR256, VR256, f256mem, |
| 129062 | /* VORPDYrr */ |
| 129063 | VR256, VR256, VR256, |
| 129064 | /* VORPDZ128rm */ |
| 129065 | VR128X, VR128X, f128mem, |
| 129066 | /* VORPDZ128rmb */ |
| 129067 | VR128X, VR128X, f64mem, |
| 129068 | /* VORPDZ128rmbk */ |
| 129069 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 129070 | /* VORPDZ128rmbkz */ |
| 129071 | VR128X, VK2WM, VR128X, f64mem, |
| 129072 | /* VORPDZ128rmk */ |
| 129073 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 129074 | /* VORPDZ128rmkz */ |
| 129075 | VR128X, VK2WM, VR128X, f128mem, |
| 129076 | /* VORPDZ128rr */ |
| 129077 | VR128X, VR128X, VR128X, |
| 129078 | /* VORPDZ128rrk */ |
| 129079 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 129080 | /* VORPDZ128rrkz */ |
| 129081 | VR128X, VK2WM, VR128X, VR128X, |
| 129082 | /* VORPDZ256rm */ |
| 129083 | VR256X, VR256X, f256mem, |
| 129084 | /* VORPDZ256rmb */ |
| 129085 | VR256X, VR256X, f64mem, |
| 129086 | /* VORPDZ256rmbk */ |
| 129087 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 129088 | /* VORPDZ256rmbkz */ |
| 129089 | VR256X, VK4WM, VR256X, f64mem, |
| 129090 | /* VORPDZ256rmk */ |
| 129091 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 129092 | /* VORPDZ256rmkz */ |
| 129093 | VR256X, VK4WM, VR256X, f256mem, |
| 129094 | /* VORPDZ256rr */ |
| 129095 | VR256X, VR256X, VR256X, |
| 129096 | /* VORPDZ256rrk */ |
| 129097 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 129098 | /* VORPDZ256rrkz */ |
| 129099 | VR256X, VK4WM, VR256X, VR256X, |
| 129100 | /* VORPDZrm */ |
| 129101 | VR512, VR512, f512mem, |
| 129102 | /* VORPDZrmb */ |
| 129103 | VR512, VR512, f64mem, |
| 129104 | /* VORPDZrmbk */ |
| 129105 | VR512, VR512, VK8WM, VR512, f64mem, |
| 129106 | /* VORPDZrmbkz */ |
| 129107 | VR512, VK8WM, VR512, f64mem, |
| 129108 | /* VORPDZrmk */ |
| 129109 | VR512, VR512, VK8WM, VR512, f512mem, |
| 129110 | /* VORPDZrmkz */ |
| 129111 | VR512, VK8WM, VR512, f512mem, |
| 129112 | /* VORPDZrr */ |
| 129113 | VR512, VR512, VR512, |
| 129114 | /* VORPDZrrk */ |
| 129115 | VR512, VR512, VK8WM, VR512, VR512, |
| 129116 | /* VORPDZrrkz */ |
| 129117 | VR512, VK8WM, VR512, VR512, |
| 129118 | /* VORPDrm */ |
| 129119 | VR128, VR128, f128mem, |
| 129120 | /* VORPDrr */ |
| 129121 | VR128, VR128, VR128, |
| 129122 | /* VORPSYrm */ |
| 129123 | VR256, VR256, f256mem, |
| 129124 | /* VORPSYrr */ |
| 129125 | VR256, VR256, VR256, |
| 129126 | /* VORPSZ128rm */ |
| 129127 | VR128X, VR128X, f128mem, |
| 129128 | /* VORPSZ128rmb */ |
| 129129 | VR128X, VR128X, f32mem, |
| 129130 | /* VORPSZ128rmbk */ |
| 129131 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 129132 | /* VORPSZ128rmbkz */ |
| 129133 | VR128X, VK4WM, VR128X, f32mem, |
| 129134 | /* VORPSZ128rmk */ |
| 129135 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 129136 | /* VORPSZ128rmkz */ |
| 129137 | VR128X, VK4WM, VR128X, f128mem, |
| 129138 | /* VORPSZ128rr */ |
| 129139 | VR128X, VR128X, VR128X, |
| 129140 | /* VORPSZ128rrk */ |
| 129141 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 129142 | /* VORPSZ128rrkz */ |
| 129143 | VR128X, VK4WM, VR128X, VR128X, |
| 129144 | /* VORPSZ256rm */ |
| 129145 | VR256X, VR256X, f256mem, |
| 129146 | /* VORPSZ256rmb */ |
| 129147 | VR256X, VR256X, f32mem, |
| 129148 | /* VORPSZ256rmbk */ |
| 129149 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 129150 | /* VORPSZ256rmbkz */ |
| 129151 | VR256X, VK8WM, VR256X, f32mem, |
| 129152 | /* VORPSZ256rmk */ |
| 129153 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 129154 | /* VORPSZ256rmkz */ |
| 129155 | VR256X, VK8WM, VR256X, f256mem, |
| 129156 | /* VORPSZ256rr */ |
| 129157 | VR256X, VR256X, VR256X, |
| 129158 | /* VORPSZ256rrk */ |
| 129159 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 129160 | /* VORPSZ256rrkz */ |
| 129161 | VR256X, VK8WM, VR256X, VR256X, |
| 129162 | /* VORPSZrm */ |
| 129163 | VR512, VR512, f512mem, |
| 129164 | /* VORPSZrmb */ |
| 129165 | VR512, VR512, f32mem, |
| 129166 | /* VORPSZrmbk */ |
| 129167 | VR512, VR512, VK16WM, VR512, f32mem, |
| 129168 | /* VORPSZrmbkz */ |
| 129169 | VR512, VK16WM, VR512, f32mem, |
| 129170 | /* VORPSZrmk */ |
| 129171 | VR512, VR512, VK16WM, VR512, f512mem, |
| 129172 | /* VORPSZrmkz */ |
| 129173 | VR512, VK16WM, VR512, f512mem, |
| 129174 | /* VORPSZrr */ |
| 129175 | VR512, VR512, VR512, |
| 129176 | /* VORPSZrrk */ |
| 129177 | VR512, VR512, VK16WM, VR512, VR512, |
| 129178 | /* VORPSZrrkz */ |
| 129179 | VR512, VK16WM, VR512, VR512, |
| 129180 | /* VORPSrm */ |
| 129181 | VR128, VR128, f128mem, |
| 129182 | /* VORPSrr */ |
| 129183 | VR128, VR128, VR128, |
| 129184 | /* VP2INTERSECTDZ128rm */ |
| 129185 | VK4Pair, VR128X, i128mem, |
| 129186 | /* VP2INTERSECTDZ128rmb */ |
| 129187 | VK4Pair, VR128X, i32mem, |
| 129188 | /* VP2INTERSECTDZ128rr */ |
| 129189 | VK4Pair, VR128X, VR128X, |
| 129190 | /* VP2INTERSECTDZ256rm */ |
| 129191 | VK8Pair, VR256X, i256mem, |
| 129192 | /* VP2INTERSECTDZ256rmb */ |
| 129193 | VK8Pair, VR256X, i32mem, |
| 129194 | /* VP2INTERSECTDZ256rr */ |
| 129195 | VK8Pair, VR256X, VR256X, |
| 129196 | /* VP2INTERSECTDZrm */ |
| 129197 | VK16Pair, VR512, i512mem, |
| 129198 | /* VP2INTERSECTDZrmb */ |
| 129199 | VK16Pair, VR512, i32mem, |
| 129200 | /* VP2INTERSECTDZrr */ |
| 129201 | VK16Pair, VR512, VR512, |
| 129202 | /* VP2INTERSECTQZ128rm */ |
| 129203 | VK2Pair, VR128X, i128mem, |
| 129204 | /* VP2INTERSECTQZ128rmb */ |
| 129205 | VK2Pair, VR128X, i64mem, |
| 129206 | /* VP2INTERSECTQZ128rr */ |
| 129207 | VK2Pair, VR128X, VR128X, |
| 129208 | /* VP2INTERSECTQZ256rm */ |
| 129209 | VK4Pair, VR256X, i256mem, |
| 129210 | /* VP2INTERSECTQZ256rmb */ |
| 129211 | VK4Pair, VR256X, i64mem, |
| 129212 | /* VP2INTERSECTQZ256rr */ |
| 129213 | VK4Pair, VR256X, VR256X, |
| 129214 | /* VP2INTERSECTQZrm */ |
| 129215 | VK8Pair, VR512, i512mem, |
| 129216 | /* VP2INTERSECTQZrmb */ |
| 129217 | VK8Pair, VR512, i64mem, |
| 129218 | /* VP2INTERSECTQZrr */ |
| 129219 | VK8Pair, VR512, VR512, |
| 129220 | /* VP4DPWSSDSrm */ |
| 129221 | VR512, VR512, VR512, f128mem, |
| 129222 | /* VP4DPWSSDSrmk */ |
| 129223 | VR512, VR512, VK16WM, VR512, f128mem, |
| 129224 | /* VP4DPWSSDSrmkz */ |
| 129225 | VR512, VR512, VK16WM, VR512, f128mem, |
| 129226 | /* VP4DPWSSDrm */ |
| 129227 | VR512, VR512, VR512, f128mem, |
| 129228 | /* VP4DPWSSDrmk */ |
| 129229 | VR512, VR512, VK16WM, VR512, f128mem, |
| 129230 | /* VP4DPWSSDrmkz */ |
| 129231 | VR512, VR512, VK16WM, VR512, f128mem, |
| 129232 | /* VPABSBYrm */ |
| 129233 | VR256, i256mem, |
| 129234 | /* VPABSBYrr */ |
| 129235 | VR256, VR256, |
| 129236 | /* VPABSBZ128rm */ |
| 129237 | VR128X, i128mem, |
| 129238 | /* VPABSBZ128rmk */ |
| 129239 | VR128X, VR128X, VK16WM, i128mem, |
| 129240 | /* VPABSBZ128rmkz */ |
| 129241 | VR128X, VK16WM, i128mem, |
| 129242 | /* VPABSBZ128rr */ |
| 129243 | VR128X, VR128X, |
| 129244 | /* VPABSBZ128rrk */ |
| 129245 | VR128X, VR128X, VK16WM, VR128X, |
| 129246 | /* VPABSBZ128rrkz */ |
| 129247 | VR128X, VK16WM, VR128X, |
| 129248 | /* VPABSBZ256rm */ |
| 129249 | VR256X, i256mem, |
| 129250 | /* VPABSBZ256rmk */ |
| 129251 | VR256X, VR256X, VK32WM, i256mem, |
| 129252 | /* VPABSBZ256rmkz */ |
| 129253 | VR256X, VK32WM, i256mem, |
| 129254 | /* VPABSBZ256rr */ |
| 129255 | VR256X, VR256X, |
| 129256 | /* VPABSBZ256rrk */ |
| 129257 | VR256X, VR256X, VK32WM, VR256X, |
| 129258 | /* VPABSBZ256rrkz */ |
| 129259 | VR256X, VK32WM, VR256X, |
| 129260 | /* VPABSBZrm */ |
| 129261 | VR512, i512mem, |
| 129262 | /* VPABSBZrmk */ |
| 129263 | VR512, VR512, VK64WM, i512mem, |
| 129264 | /* VPABSBZrmkz */ |
| 129265 | VR512, VK64WM, i512mem, |
| 129266 | /* VPABSBZrr */ |
| 129267 | VR512, VR512, |
| 129268 | /* VPABSBZrrk */ |
| 129269 | VR512, VR512, VK64WM, VR512, |
| 129270 | /* VPABSBZrrkz */ |
| 129271 | VR512, VK64WM, VR512, |
| 129272 | /* VPABSBrm */ |
| 129273 | VR128, i128mem, |
| 129274 | /* VPABSBrr */ |
| 129275 | VR128, VR128, |
| 129276 | /* VPABSDYrm */ |
| 129277 | VR256, i256mem, |
| 129278 | /* VPABSDYrr */ |
| 129279 | VR256, VR256, |
| 129280 | /* VPABSDZ128rm */ |
| 129281 | VR128X, i128mem, |
| 129282 | /* VPABSDZ128rmb */ |
| 129283 | VR128X, i32mem, |
| 129284 | /* VPABSDZ128rmbk */ |
| 129285 | VR128X, VR128X, VK4WM, i32mem, |
| 129286 | /* VPABSDZ128rmbkz */ |
| 129287 | VR128X, VK4WM, i32mem, |
| 129288 | /* VPABSDZ128rmk */ |
| 129289 | VR128X, VR128X, VK4WM, i128mem, |
| 129290 | /* VPABSDZ128rmkz */ |
| 129291 | VR128X, VK4WM, i128mem, |
| 129292 | /* VPABSDZ128rr */ |
| 129293 | VR128X, VR128X, |
| 129294 | /* VPABSDZ128rrk */ |
| 129295 | VR128X, VR128X, VK4WM, VR128X, |
| 129296 | /* VPABSDZ128rrkz */ |
| 129297 | VR128X, VK4WM, VR128X, |
| 129298 | /* VPABSDZ256rm */ |
| 129299 | VR256X, i256mem, |
| 129300 | /* VPABSDZ256rmb */ |
| 129301 | VR256X, i32mem, |
| 129302 | /* VPABSDZ256rmbk */ |
| 129303 | VR256X, VR256X, VK8WM, i32mem, |
| 129304 | /* VPABSDZ256rmbkz */ |
| 129305 | VR256X, VK8WM, i32mem, |
| 129306 | /* VPABSDZ256rmk */ |
| 129307 | VR256X, VR256X, VK8WM, i256mem, |
| 129308 | /* VPABSDZ256rmkz */ |
| 129309 | VR256X, VK8WM, i256mem, |
| 129310 | /* VPABSDZ256rr */ |
| 129311 | VR256X, VR256X, |
| 129312 | /* VPABSDZ256rrk */ |
| 129313 | VR256X, VR256X, VK8WM, VR256X, |
| 129314 | /* VPABSDZ256rrkz */ |
| 129315 | VR256X, VK8WM, VR256X, |
| 129316 | /* VPABSDZrm */ |
| 129317 | VR512, i512mem, |
| 129318 | /* VPABSDZrmb */ |
| 129319 | VR512, i32mem, |
| 129320 | /* VPABSDZrmbk */ |
| 129321 | VR512, VR512, VK16WM, i32mem, |
| 129322 | /* VPABSDZrmbkz */ |
| 129323 | VR512, VK16WM, i32mem, |
| 129324 | /* VPABSDZrmk */ |
| 129325 | VR512, VR512, VK16WM, i512mem, |
| 129326 | /* VPABSDZrmkz */ |
| 129327 | VR512, VK16WM, i512mem, |
| 129328 | /* VPABSDZrr */ |
| 129329 | VR512, VR512, |
| 129330 | /* VPABSDZrrk */ |
| 129331 | VR512, VR512, VK16WM, VR512, |
| 129332 | /* VPABSDZrrkz */ |
| 129333 | VR512, VK16WM, VR512, |
| 129334 | /* VPABSDrm */ |
| 129335 | VR128, i128mem, |
| 129336 | /* VPABSDrr */ |
| 129337 | VR128, VR128, |
| 129338 | /* VPABSQZ128rm */ |
| 129339 | VR128X, i128mem, |
| 129340 | /* VPABSQZ128rmb */ |
| 129341 | VR128X, i64mem, |
| 129342 | /* VPABSQZ128rmbk */ |
| 129343 | VR128X, VR128X, VK2WM, i64mem, |
| 129344 | /* VPABSQZ128rmbkz */ |
| 129345 | VR128X, VK2WM, i64mem, |
| 129346 | /* VPABSQZ128rmk */ |
| 129347 | VR128X, VR128X, VK2WM, i128mem, |
| 129348 | /* VPABSQZ128rmkz */ |
| 129349 | VR128X, VK2WM, i128mem, |
| 129350 | /* VPABSQZ128rr */ |
| 129351 | VR128X, VR128X, |
| 129352 | /* VPABSQZ128rrk */ |
| 129353 | VR128X, VR128X, VK2WM, VR128X, |
| 129354 | /* VPABSQZ128rrkz */ |
| 129355 | VR128X, VK2WM, VR128X, |
| 129356 | /* VPABSQZ256rm */ |
| 129357 | VR256X, i256mem, |
| 129358 | /* VPABSQZ256rmb */ |
| 129359 | VR256X, i64mem, |
| 129360 | /* VPABSQZ256rmbk */ |
| 129361 | VR256X, VR256X, VK4WM, i64mem, |
| 129362 | /* VPABSQZ256rmbkz */ |
| 129363 | VR256X, VK4WM, i64mem, |
| 129364 | /* VPABSQZ256rmk */ |
| 129365 | VR256X, VR256X, VK4WM, i256mem, |
| 129366 | /* VPABSQZ256rmkz */ |
| 129367 | VR256X, VK4WM, i256mem, |
| 129368 | /* VPABSQZ256rr */ |
| 129369 | VR256X, VR256X, |
| 129370 | /* VPABSQZ256rrk */ |
| 129371 | VR256X, VR256X, VK4WM, VR256X, |
| 129372 | /* VPABSQZ256rrkz */ |
| 129373 | VR256X, VK4WM, VR256X, |
| 129374 | /* VPABSQZrm */ |
| 129375 | VR512, i512mem, |
| 129376 | /* VPABSQZrmb */ |
| 129377 | VR512, i64mem, |
| 129378 | /* VPABSQZrmbk */ |
| 129379 | VR512, VR512, VK8WM, i64mem, |
| 129380 | /* VPABSQZrmbkz */ |
| 129381 | VR512, VK8WM, i64mem, |
| 129382 | /* VPABSQZrmk */ |
| 129383 | VR512, VR512, VK8WM, i512mem, |
| 129384 | /* VPABSQZrmkz */ |
| 129385 | VR512, VK8WM, i512mem, |
| 129386 | /* VPABSQZrr */ |
| 129387 | VR512, VR512, |
| 129388 | /* VPABSQZrrk */ |
| 129389 | VR512, VR512, VK8WM, VR512, |
| 129390 | /* VPABSQZrrkz */ |
| 129391 | VR512, VK8WM, VR512, |
| 129392 | /* VPABSWYrm */ |
| 129393 | VR256, i256mem, |
| 129394 | /* VPABSWYrr */ |
| 129395 | VR256, VR256, |
| 129396 | /* VPABSWZ128rm */ |
| 129397 | VR128X, i128mem, |
| 129398 | /* VPABSWZ128rmk */ |
| 129399 | VR128X, VR128X, VK8WM, i128mem, |
| 129400 | /* VPABSWZ128rmkz */ |
| 129401 | VR128X, VK8WM, i128mem, |
| 129402 | /* VPABSWZ128rr */ |
| 129403 | VR128X, VR128X, |
| 129404 | /* VPABSWZ128rrk */ |
| 129405 | VR128X, VR128X, VK8WM, VR128X, |
| 129406 | /* VPABSWZ128rrkz */ |
| 129407 | VR128X, VK8WM, VR128X, |
| 129408 | /* VPABSWZ256rm */ |
| 129409 | VR256X, i256mem, |
| 129410 | /* VPABSWZ256rmk */ |
| 129411 | VR256X, VR256X, VK16WM, i256mem, |
| 129412 | /* VPABSWZ256rmkz */ |
| 129413 | VR256X, VK16WM, i256mem, |
| 129414 | /* VPABSWZ256rr */ |
| 129415 | VR256X, VR256X, |
| 129416 | /* VPABSWZ256rrk */ |
| 129417 | VR256X, VR256X, VK16WM, VR256X, |
| 129418 | /* VPABSWZ256rrkz */ |
| 129419 | VR256X, VK16WM, VR256X, |
| 129420 | /* VPABSWZrm */ |
| 129421 | VR512, i512mem, |
| 129422 | /* VPABSWZrmk */ |
| 129423 | VR512, VR512, VK32WM, i512mem, |
| 129424 | /* VPABSWZrmkz */ |
| 129425 | VR512, VK32WM, i512mem, |
| 129426 | /* VPABSWZrr */ |
| 129427 | VR512, VR512, |
| 129428 | /* VPABSWZrrk */ |
| 129429 | VR512, VR512, VK32WM, VR512, |
| 129430 | /* VPABSWZrrkz */ |
| 129431 | VR512, VK32WM, VR512, |
| 129432 | /* VPABSWrm */ |
| 129433 | VR128, i128mem, |
| 129434 | /* VPABSWrr */ |
| 129435 | VR128, VR128, |
| 129436 | /* VPACKSSDWYrm */ |
| 129437 | VR256, VR256, i256mem, |
| 129438 | /* VPACKSSDWYrr */ |
| 129439 | VR256, VR256, VR256, |
| 129440 | /* VPACKSSDWZ128rm */ |
| 129441 | VR128X, VR128X, i128mem, |
| 129442 | /* VPACKSSDWZ128rmb */ |
| 129443 | VR128X, VR128X, i32mem, |
| 129444 | /* VPACKSSDWZ128rmbk */ |
| 129445 | VR128X, VR128X, VK8WM, VR128X, i32mem, |
| 129446 | /* VPACKSSDWZ128rmbkz */ |
| 129447 | VR128X, VK8WM, VR128X, i32mem, |
| 129448 | /* VPACKSSDWZ128rmk */ |
| 129449 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 129450 | /* VPACKSSDWZ128rmkz */ |
| 129451 | VR128X, VK8WM, VR128X, i128mem, |
| 129452 | /* VPACKSSDWZ128rr */ |
| 129453 | VR128X, VR128X, VR128X, |
| 129454 | /* VPACKSSDWZ128rrk */ |
| 129455 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 129456 | /* VPACKSSDWZ128rrkz */ |
| 129457 | VR128X, VK8WM, VR128X, VR128X, |
| 129458 | /* VPACKSSDWZ256rm */ |
| 129459 | VR256X, VR256X, i256mem, |
| 129460 | /* VPACKSSDWZ256rmb */ |
| 129461 | VR256X, VR256X, i32mem, |
| 129462 | /* VPACKSSDWZ256rmbk */ |
| 129463 | VR256X, VR256X, VK16WM, VR256X, i32mem, |
| 129464 | /* VPACKSSDWZ256rmbkz */ |
| 129465 | VR256X, VK16WM, VR256X, i32mem, |
| 129466 | /* VPACKSSDWZ256rmk */ |
| 129467 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 129468 | /* VPACKSSDWZ256rmkz */ |
| 129469 | VR256X, VK16WM, VR256X, i256mem, |
| 129470 | /* VPACKSSDWZ256rr */ |
| 129471 | VR256X, VR256X, VR256X, |
| 129472 | /* VPACKSSDWZ256rrk */ |
| 129473 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 129474 | /* VPACKSSDWZ256rrkz */ |
| 129475 | VR256X, VK16WM, VR256X, VR256X, |
| 129476 | /* VPACKSSDWZrm */ |
| 129477 | VR512, VR512, i512mem, |
| 129478 | /* VPACKSSDWZrmb */ |
| 129479 | VR512, VR512, i32mem, |
| 129480 | /* VPACKSSDWZrmbk */ |
| 129481 | VR512, VR512, VK32WM, VR512, i32mem, |
| 129482 | /* VPACKSSDWZrmbkz */ |
| 129483 | VR512, VK32WM, VR512, i32mem, |
| 129484 | /* VPACKSSDWZrmk */ |
| 129485 | VR512, VR512, VK32WM, VR512, i512mem, |
| 129486 | /* VPACKSSDWZrmkz */ |
| 129487 | VR512, VK32WM, VR512, i512mem, |
| 129488 | /* VPACKSSDWZrr */ |
| 129489 | VR512, VR512, VR512, |
| 129490 | /* VPACKSSDWZrrk */ |
| 129491 | VR512, VR512, VK32WM, VR512, VR512, |
| 129492 | /* VPACKSSDWZrrkz */ |
| 129493 | VR512, VK32WM, VR512, VR512, |
| 129494 | /* VPACKSSDWrm */ |
| 129495 | VR128, VR128, i128mem, |
| 129496 | /* VPACKSSDWrr */ |
| 129497 | VR128, VR128, VR128, |
| 129498 | /* VPACKSSWBYrm */ |
| 129499 | VR256, VR256, i256mem, |
| 129500 | /* VPACKSSWBYrr */ |
| 129501 | VR256, VR256, VR256, |
| 129502 | /* VPACKSSWBZ128rm */ |
| 129503 | VR128X, VR128X, i128mem, |
| 129504 | /* VPACKSSWBZ128rmk */ |
| 129505 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 129506 | /* VPACKSSWBZ128rmkz */ |
| 129507 | VR128X, VK16WM, VR128X, i128mem, |
| 129508 | /* VPACKSSWBZ128rr */ |
| 129509 | VR128X, VR128X, VR128X, |
| 129510 | /* VPACKSSWBZ128rrk */ |
| 129511 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 129512 | /* VPACKSSWBZ128rrkz */ |
| 129513 | VR128X, VK16WM, VR128X, VR128X, |
| 129514 | /* VPACKSSWBZ256rm */ |
| 129515 | VR256X, VR256X, i256mem, |
| 129516 | /* VPACKSSWBZ256rmk */ |
| 129517 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 129518 | /* VPACKSSWBZ256rmkz */ |
| 129519 | VR256X, VK32WM, VR256X, i256mem, |
| 129520 | /* VPACKSSWBZ256rr */ |
| 129521 | VR256X, VR256X, VR256X, |
| 129522 | /* VPACKSSWBZ256rrk */ |
| 129523 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 129524 | /* VPACKSSWBZ256rrkz */ |
| 129525 | VR256X, VK32WM, VR256X, VR256X, |
| 129526 | /* VPACKSSWBZrm */ |
| 129527 | VR512, VR512, i512mem, |
| 129528 | /* VPACKSSWBZrmk */ |
| 129529 | VR512, VR512, VK64WM, VR512, i512mem, |
| 129530 | /* VPACKSSWBZrmkz */ |
| 129531 | VR512, VK64WM, VR512, i512mem, |
| 129532 | /* VPACKSSWBZrr */ |
| 129533 | VR512, VR512, VR512, |
| 129534 | /* VPACKSSWBZrrk */ |
| 129535 | VR512, VR512, VK64WM, VR512, VR512, |
| 129536 | /* VPACKSSWBZrrkz */ |
| 129537 | VR512, VK64WM, VR512, VR512, |
| 129538 | /* VPACKSSWBrm */ |
| 129539 | VR128, VR128, i128mem, |
| 129540 | /* VPACKSSWBrr */ |
| 129541 | VR128, VR128, VR128, |
| 129542 | /* VPACKUSDWYrm */ |
| 129543 | VR256, VR256, i256mem, |
| 129544 | /* VPACKUSDWYrr */ |
| 129545 | VR256, VR256, VR256, |
| 129546 | /* VPACKUSDWZ128rm */ |
| 129547 | VR128X, VR128X, i128mem, |
| 129548 | /* VPACKUSDWZ128rmb */ |
| 129549 | VR128X, VR128X, i32mem, |
| 129550 | /* VPACKUSDWZ128rmbk */ |
| 129551 | VR128X, VR128X, VK8WM, VR128X, i32mem, |
| 129552 | /* VPACKUSDWZ128rmbkz */ |
| 129553 | VR128X, VK8WM, VR128X, i32mem, |
| 129554 | /* VPACKUSDWZ128rmk */ |
| 129555 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 129556 | /* VPACKUSDWZ128rmkz */ |
| 129557 | VR128X, VK8WM, VR128X, i128mem, |
| 129558 | /* VPACKUSDWZ128rr */ |
| 129559 | VR128X, VR128X, VR128X, |
| 129560 | /* VPACKUSDWZ128rrk */ |
| 129561 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 129562 | /* VPACKUSDWZ128rrkz */ |
| 129563 | VR128X, VK8WM, VR128X, VR128X, |
| 129564 | /* VPACKUSDWZ256rm */ |
| 129565 | VR256X, VR256X, i256mem, |
| 129566 | /* VPACKUSDWZ256rmb */ |
| 129567 | VR256X, VR256X, i32mem, |
| 129568 | /* VPACKUSDWZ256rmbk */ |
| 129569 | VR256X, VR256X, VK16WM, VR256X, i32mem, |
| 129570 | /* VPACKUSDWZ256rmbkz */ |
| 129571 | VR256X, VK16WM, VR256X, i32mem, |
| 129572 | /* VPACKUSDWZ256rmk */ |
| 129573 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 129574 | /* VPACKUSDWZ256rmkz */ |
| 129575 | VR256X, VK16WM, VR256X, i256mem, |
| 129576 | /* VPACKUSDWZ256rr */ |
| 129577 | VR256X, VR256X, VR256X, |
| 129578 | /* VPACKUSDWZ256rrk */ |
| 129579 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 129580 | /* VPACKUSDWZ256rrkz */ |
| 129581 | VR256X, VK16WM, VR256X, VR256X, |
| 129582 | /* VPACKUSDWZrm */ |
| 129583 | VR512, VR512, i512mem, |
| 129584 | /* VPACKUSDWZrmb */ |
| 129585 | VR512, VR512, i32mem, |
| 129586 | /* VPACKUSDWZrmbk */ |
| 129587 | VR512, VR512, VK32WM, VR512, i32mem, |
| 129588 | /* VPACKUSDWZrmbkz */ |
| 129589 | VR512, VK32WM, VR512, i32mem, |
| 129590 | /* VPACKUSDWZrmk */ |
| 129591 | VR512, VR512, VK32WM, VR512, i512mem, |
| 129592 | /* VPACKUSDWZrmkz */ |
| 129593 | VR512, VK32WM, VR512, i512mem, |
| 129594 | /* VPACKUSDWZrr */ |
| 129595 | VR512, VR512, VR512, |
| 129596 | /* VPACKUSDWZrrk */ |
| 129597 | VR512, VR512, VK32WM, VR512, VR512, |
| 129598 | /* VPACKUSDWZrrkz */ |
| 129599 | VR512, VK32WM, VR512, VR512, |
| 129600 | /* VPACKUSDWrm */ |
| 129601 | VR128, VR128, i128mem, |
| 129602 | /* VPACKUSDWrr */ |
| 129603 | VR128, VR128, VR128, |
| 129604 | /* VPACKUSWBYrm */ |
| 129605 | VR256, VR256, i256mem, |
| 129606 | /* VPACKUSWBYrr */ |
| 129607 | VR256, VR256, VR256, |
| 129608 | /* VPACKUSWBZ128rm */ |
| 129609 | VR128X, VR128X, i128mem, |
| 129610 | /* VPACKUSWBZ128rmk */ |
| 129611 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 129612 | /* VPACKUSWBZ128rmkz */ |
| 129613 | VR128X, VK16WM, VR128X, i128mem, |
| 129614 | /* VPACKUSWBZ128rr */ |
| 129615 | VR128X, VR128X, VR128X, |
| 129616 | /* VPACKUSWBZ128rrk */ |
| 129617 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 129618 | /* VPACKUSWBZ128rrkz */ |
| 129619 | VR128X, VK16WM, VR128X, VR128X, |
| 129620 | /* VPACKUSWBZ256rm */ |
| 129621 | VR256X, VR256X, i256mem, |
| 129622 | /* VPACKUSWBZ256rmk */ |
| 129623 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 129624 | /* VPACKUSWBZ256rmkz */ |
| 129625 | VR256X, VK32WM, VR256X, i256mem, |
| 129626 | /* VPACKUSWBZ256rr */ |
| 129627 | VR256X, VR256X, VR256X, |
| 129628 | /* VPACKUSWBZ256rrk */ |
| 129629 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 129630 | /* VPACKUSWBZ256rrkz */ |
| 129631 | VR256X, VK32WM, VR256X, VR256X, |
| 129632 | /* VPACKUSWBZrm */ |
| 129633 | VR512, VR512, i512mem, |
| 129634 | /* VPACKUSWBZrmk */ |
| 129635 | VR512, VR512, VK64WM, VR512, i512mem, |
| 129636 | /* VPACKUSWBZrmkz */ |
| 129637 | VR512, VK64WM, VR512, i512mem, |
| 129638 | /* VPACKUSWBZrr */ |
| 129639 | VR512, VR512, VR512, |
| 129640 | /* VPACKUSWBZrrk */ |
| 129641 | VR512, VR512, VK64WM, VR512, VR512, |
| 129642 | /* VPACKUSWBZrrkz */ |
| 129643 | VR512, VK64WM, VR512, VR512, |
| 129644 | /* VPACKUSWBrm */ |
| 129645 | VR128, VR128, i128mem, |
| 129646 | /* VPACKUSWBrr */ |
| 129647 | VR128, VR128, VR128, |
| 129648 | /* VPADDBYrm */ |
| 129649 | VR256, VR256, i256mem, |
| 129650 | /* VPADDBYrr */ |
| 129651 | VR256, VR256, VR256, |
| 129652 | /* VPADDBZ128rm */ |
| 129653 | VR128X, VR128X, i128mem, |
| 129654 | /* VPADDBZ128rmk */ |
| 129655 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 129656 | /* VPADDBZ128rmkz */ |
| 129657 | VR128X, VK16WM, VR128X, i128mem, |
| 129658 | /* VPADDBZ128rr */ |
| 129659 | VR128X, VR128X, VR128X, |
| 129660 | /* VPADDBZ128rrk */ |
| 129661 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 129662 | /* VPADDBZ128rrkz */ |
| 129663 | VR128X, VK16WM, VR128X, VR128X, |
| 129664 | /* VPADDBZ256rm */ |
| 129665 | VR256X, VR256X, i256mem, |
| 129666 | /* VPADDBZ256rmk */ |
| 129667 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 129668 | /* VPADDBZ256rmkz */ |
| 129669 | VR256X, VK32WM, VR256X, i256mem, |
| 129670 | /* VPADDBZ256rr */ |
| 129671 | VR256X, VR256X, VR256X, |
| 129672 | /* VPADDBZ256rrk */ |
| 129673 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 129674 | /* VPADDBZ256rrkz */ |
| 129675 | VR256X, VK32WM, VR256X, VR256X, |
| 129676 | /* VPADDBZrm */ |
| 129677 | VR512, VR512, i512mem, |
| 129678 | /* VPADDBZrmk */ |
| 129679 | VR512, VR512, VK64WM, VR512, i512mem, |
| 129680 | /* VPADDBZrmkz */ |
| 129681 | VR512, VK64WM, VR512, i512mem, |
| 129682 | /* VPADDBZrr */ |
| 129683 | VR512, VR512, VR512, |
| 129684 | /* VPADDBZrrk */ |
| 129685 | VR512, VR512, VK64WM, VR512, VR512, |
| 129686 | /* VPADDBZrrkz */ |
| 129687 | VR512, VK64WM, VR512, VR512, |
| 129688 | /* VPADDBrm */ |
| 129689 | VR128, VR128, i128mem, |
| 129690 | /* VPADDBrr */ |
| 129691 | VR128, VR128, VR128, |
| 129692 | /* VPADDDYrm */ |
| 129693 | VR256, VR256, i256mem, |
| 129694 | /* VPADDDYrr */ |
| 129695 | VR256, VR256, VR256, |
| 129696 | /* VPADDDZ128rm */ |
| 129697 | VR128X, VR128X, i128mem, |
| 129698 | /* VPADDDZ128rmb */ |
| 129699 | VR128X, VR128X, i32mem, |
| 129700 | /* VPADDDZ128rmbk */ |
| 129701 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 129702 | /* VPADDDZ128rmbkz */ |
| 129703 | VR128X, VK4WM, VR128X, i32mem, |
| 129704 | /* VPADDDZ128rmk */ |
| 129705 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 129706 | /* VPADDDZ128rmkz */ |
| 129707 | VR128X, VK4WM, VR128X, i128mem, |
| 129708 | /* VPADDDZ128rr */ |
| 129709 | VR128X, VR128X, VR128X, |
| 129710 | /* VPADDDZ128rrk */ |
| 129711 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 129712 | /* VPADDDZ128rrkz */ |
| 129713 | VR128X, VK4WM, VR128X, VR128X, |
| 129714 | /* VPADDDZ256rm */ |
| 129715 | VR256X, VR256X, i256mem, |
| 129716 | /* VPADDDZ256rmb */ |
| 129717 | VR256X, VR256X, i32mem, |
| 129718 | /* VPADDDZ256rmbk */ |
| 129719 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 129720 | /* VPADDDZ256rmbkz */ |
| 129721 | VR256X, VK8WM, VR256X, i32mem, |
| 129722 | /* VPADDDZ256rmk */ |
| 129723 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 129724 | /* VPADDDZ256rmkz */ |
| 129725 | VR256X, VK8WM, VR256X, i256mem, |
| 129726 | /* VPADDDZ256rr */ |
| 129727 | VR256X, VR256X, VR256X, |
| 129728 | /* VPADDDZ256rrk */ |
| 129729 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 129730 | /* VPADDDZ256rrkz */ |
| 129731 | VR256X, VK8WM, VR256X, VR256X, |
| 129732 | /* VPADDDZrm */ |
| 129733 | VR512, VR512, i512mem, |
| 129734 | /* VPADDDZrmb */ |
| 129735 | VR512, VR512, i32mem, |
| 129736 | /* VPADDDZrmbk */ |
| 129737 | VR512, VR512, VK16WM, VR512, i32mem, |
| 129738 | /* VPADDDZrmbkz */ |
| 129739 | VR512, VK16WM, VR512, i32mem, |
| 129740 | /* VPADDDZrmk */ |
| 129741 | VR512, VR512, VK16WM, VR512, i512mem, |
| 129742 | /* VPADDDZrmkz */ |
| 129743 | VR512, VK16WM, VR512, i512mem, |
| 129744 | /* VPADDDZrr */ |
| 129745 | VR512, VR512, VR512, |
| 129746 | /* VPADDDZrrk */ |
| 129747 | VR512, VR512, VK16WM, VR512, VR512, |
| 129748 | /* VPADDDZrrkz */ |
| 129749 | VR512, VK16WM, VR512, VR512, |
| 129750 | /* VPADDDrm */ |
| 129751 | VR128, VR128, i128mem, |
| 129752 | /* VPADDDrr */ |
| 129753 | VR128, VR128, VR128, |
| 129754 | /* VPADDQYrm */ |
| 129755 | VR256, VR256, i256mem, |
| 129756 | /* VPADDQYrr */ |
| 129757 | VR256, VR256, VR256, |
| 129758 | /* VPADDQZ128rm */ |
| 129759 | VR128X, VR128X, i128mem, |
| 129760 | /* VPADDQZ128rmb */ |
| 129761 | VR128X, VR128X, i64mem, |
| 129762 | /* VPADDQZ128rmbk */ |
| 129763 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 129764 | /* VPADDQZ128rmbkz */ |
| 129765 | VR128X, VK2WM, VR128X, i64mem, |
| 129766 | /* VPADDQZ128rmk */ |
| 129767 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 129768 | /* VPADDQZ128rmkz */ |
| 129769 | VR128X, VK2WM, VR128X, i128mem, |
| 129770 | /* VPADDQZ128rr */ |
| 129771 | VR128X, VR128X, VR128X, |
| 129772 | /* VPADDQZ128rrk */ |
| 129773 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 129774 | /* VPADDQZ128rrkz */ |
| 129775 | VR128X, VK2WM, VR128X, VR128X, |
| 129776 | /* VPADDQZ256rm */ |
| 129777 | VR256X, VR256X, i256mem, |
| 129778 | /* VPADDQZ256rmb */ |
| 129779 | VR256X, VR256X, i64mem, |
| 129780 | /* VPADDQZ256rmbk */ |
| 129781 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 129782 | /* VPADDQZ256rmbkz */ |
| 129783 | VR256X, VK4WM, VR256X, i64mem, |
| 129784 | /* VPADDQZ256rmk */ |
| 129785 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 129786 | /* VPADDQZ256rmkz */ |
| 129787 | VR256X, VK4WM, VR256X, i256mem, |
| 129788 | /* VPADDQZ256rr */ |
| 129789 | VR256X, VR256X, VR256X, |
| 129790 | /* VPADDQZ256rrk */ |
| 129791 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 129792 | /* VPADDQZ256rrkz */ |
| 129793 | VR256X, VK4WM, VR256X, VR256X, |
| 129794 | /* VPADDQZrm */ |
| 129795 | VR512, VR512, i512mem, |
| 129796 | /* VPADDQZrmb */ |
| 129797 | VR512, VR512, i64mem, |
| 129798 | /* VPADDQZrmbk */ |
| 129799 | VR512, VR512, VK8WM, VR512, i64mem, |
| 129800 | /* VPADDQZrmbkz */ |
| 129801 | VR512, VK8WM, VR512, i64mem, |
| 129802 | /* VPADDQZrmk */ |
| 129803 | VR512, VR512, VK8WM, VR512, i512mem, |
| 129804 | /* VPADDQZrmkz */ |
| 129805 | VR512, VK8WM, VR512, i512mem, |
| 129806 | /* VPADDQZrr */ |
| 129807 | VR512, VR512, VR512, |
| 129808 | /* VPADDQZrrk */ |
| 129809 | VR512, VR512, VK8WM, VR512, VR512, |
| 129810 | /* VPADDQZrrkz */ |
| 129811 | VR512, VK8WM, VR512, VR512, |
| 129812 | /* VPADDQrm */ |
| 129813 | VR128, VR128, i128mem, |
| 129814 | /* VPADDQrr */ |
| 129815 | VR128, VR128, VR128, |
| 129816 | /* VPADDSBYrm */ |
| 129817 | VR256, VR256, i256mem, |
| 129818 | /* VPADDSBYrr */ |
| 129819 | VR256, VR256, VR256, |
| 129820 | /* VPADDSBZ128rm */ |
| 129821 | VR128X, VR128X, i128mem, |
| 129822 | /* VPADDSBZ128rmk */ |
| 129823 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 129824 | /* VPADDSBZ128rmkz */ |
| 129825 | VR128X, VK16WM, VR128X, i128mem, |
| 129826 | /* VPADDSBZ128rr */ |
| 129827 | VR128X, VR128X, VR128X, |
| 129828 | /* VPADDSBZ128rrk */ |
| 129829 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 129830 | /* VPADDSBZ128rrkz */ |
| 129831 | VR128X, VK16WM, VR128X, VR128X, |
| 129832 | /* VPADDSBZ256rm */ |
| 129833 | VR256X, VR256X, i256mem, |
| 129834 | /* VPADDSBZ256rmk */ |
| 129835 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 129836 | /* VPADDSBZ256rmkz */ |
| 129837 | VR256X, VK32WM, VR256X, i256mem, |
| 129838 | /* VPADDSBZ256rr */ |
| 129839 | VR256X, VR256X, VR256X, |
| 129840 | /* VPADDSBZ256rrk */ |
| 129841 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 129842 | /* VPADDSBZ256rrkz */ |
| 129843 | VR256X, VK32WM, VR256X, VR256X, |
| 129844 | /* VPADDSBZrm */ |
| 129845 | VR512, VR512, i512mem, |
| 129846 | /* VPADDSBZrmk */ |
| 129847 | VR512, VR512, VK64WM, VR512, i512mem, |
| 129848 | /* VPADDSBZrmkz */ |
| 129849 | VR512, VK64WM, VR512, i512mem, |
| 129850 | /* VPADDSBZrr */ |
| 129851 | VR512, VR512, VR512, |
| 129852 | /* VPADDSBZrrk */ |
| 129853 | VR512, VR512, VK64WM, VR512, VR512, |
| 129854 | /* VPADDSBZrrkz */ |
| 129855 | VR512, VK64WM, VR512, VR512, |
| 129856 | /* VPADDSBrm */ |
| 129857 | VR128, VR128, i128mem, |
| 129858 | /* VPADDSBrr */ |
| 129859 | VR128, VR128, VR128, |
| 129860 | /* VPADDSWYrm */ |
| 129861 | VR256, VR256, i256mem, |
| 129862 | /* VPADDSWYrr */ |
| 129863 | VR256, VR256, VR256, |
| 129864 | /* VPADDSWZ128rm */ |
| 129865 | VR128X, VR128X, i128mem, |
| 129866 | /* VPADDSWZ128rmk */ |
| 129867 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 129868 | /* VPADDSWZ128rmkz */ |
| 129869 | VR128X, VK8WM, VR128X, i128mem, |
| 129870 | /* VPADDSWZ128rr */ |
| 129871 | VR128X, VR128X, VR128X, |
| 129872 | /* VPADDSWZ128rrk */ |
| 129873 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 129874 | /* VPADDSWZ128rrkz */ |
| 129875 | VR128X, VK8WM, VR128X, VR128X, |
| 129876 | /* VPADDSWZ256rm */ |
| 129877 | VR256X, VR256X, i256mem, |
| 129878 | /* VPADDSWZ256rmk */ |
| 129879 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 129880 | /* VPADDSWZ256rmkz */ |
| 129881 | VR256X, VK16WM, VR256X, i256mem, |
| 129882 | /* VPADDSWZ256rr */ |
| 129883 | VR256X, VR256X, VR256X, |
| 129884 | /* VPADDSWZ256rrk */ |
| 129885 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 129886 | /* VPADDSWZ256rrkz */ |
| 129887 | VR256X, VK16WM, VR256X, VR256X, |
| 129888 | /* VPADDSWZrm */ |
| 129889 | VR512, VR512, i512mem, |
| 129890 | /* VPADDSWZrmk */ |
| 129891 | VR512, VR512, VK32WM, VR512, i512mem, |
| 129892 | /* VPADDSWZrmkz */ |
| 129893 | VR512, VK32WM, VR512, i512mem, |
| 129894 | /* VPADDSWZrr */ |
| 129895 | VR512, VR512, VR512, |
| 129896 | /* VPADDSWZrrk */ |
| 129897 | VR512, VR512, VK32WM, VR512, VR512, |
| 129898 | /* VPADDSWZrrkz */ |
| 129899 | VR512, VK32WM, VR512, VR512, |
| 129900 | /* VPADDSWrm */ |
| 129901 | VR128, VR128, i128mem, |
| 129902 | /* VPADDSWrr */ |
| 129903 | VR128, VR128, VR128, |
| 129904 | /* VPADDUSBYrm */ |
| 129905 | VR256, VR256, i256mem, |
| 129906 | /* VPADDUSBYrr */ |
| 129907 | VR256, VR256, VR256, |
| 129908 | /* VPADDUSBZ128rm */ |
| 129909 | VR128X, VR128X, i128mem, |
| 129910 | /* VPADDUSBZ128rmk */ |
| 129911 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 129912 | /* VPADDUSBZ128rmkz */ |
| 129913 | VR128X, VK16WM, VR128X, i128mem, |
| 129914 | /* VPADDUSBZ128rr */ |
| 129915 | VR128X, VR128X, VR128X, |
| 129916 | /* VPADDUSBZ128rrk */ |
| 129917 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 129918 | /* VPADDUSBZ128rrkz */ |
| 129919 | VR128X, VK16WM, VR128X, VR128X, |
| 129920 | /* VPADDUSBZ256rm */ |
| 129921 | VR256X, VR256X, i256mem, |
| 129922 | /* VPADDUSBZ256rmk */ |
| 129923 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 129924 | /* VPADDUSBZ256rmkz */ |
| 129925 | VR256X, VK32WM, VR256X, i256mem, |
| 129926 | /* VPADDUSBZ256rr */ |
| 129927 | VR256X, VR256X, VR256X, |
| 129928 | /* VPADDUSBZ256rrk */ |
| 129929 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 129930 | /* VPADDUSBZ256rrkz */ |
| 129931 | VR256X, VK32WM, VR256X, VR256X, |
| 129932 | /* VPADDUSBZrm */ |
| 129933 | VR512, VR512, i512mem, |
| 129934 | /* VPADDUSBZrmk */ |
| 129935 | VR512, VR512, VK64WM, VR512, i512mem, |
| 129936 | /* VPADDUSBZrmkz */ |
| 129937 | VR512, VK64WM, VR512, i512mem, |
| 129938 | /* VPADDUSBZrr */ |
| 129939 | VR512, VR512, VR512, |
| 129940 | /* VPADDUSBZrrk */ |
| 129941 | VR512, VR512, VK64WM, VR512, VR512, |
| 129942 | /* VPADDUSBZrrkz */ |
| 129943 | VR512, VK64WM, VR512, VR512, |
| 129944 | /* VPADDUSBrm */ |
| 129945 | VR128, VR128, i128mem, |
| 129946 | /* VPADDUSBrr */ |
| 129947 | VR128, VR128, VR128, |
| 129948 | /* VPADDUSWYrm */ |
| 129949 | VR256, VR256, i256mem, |
| 129950 | /* VPADDUSWYrr */ |
| 129951 | VR256, VR256, VR256, |
| 129952 | /* VPADDUSWZ128rm */ |
| 129953 | VR128X, VR128X, i128mem, |
| 129954 | /* VPADDUSWZ128rmk */ |
| 129955 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 129956 | /* VPADDUSWZ128rmkz */ |
| 129957 | VR128X, VK8WM, VR128X, i128mem, |
| 129958 | /* VPADDUSWZ128rr */ |
| 129959 | VR128X, VR128X, VR128X, |
| 129960 | /* VPADDUSWZ128rrk */ |
| 129961 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 129962 | /* VPADDUSWZ128rrkz */ |
| 129963 | VR128X, VK8WM, VR128X, VR128X, |
| 129964 | /* VPADDUSWZ256rm */ |
| 129965 | VR256X, VR256X, i256mem, |
| 129966 | /* VPADDUSWZ256rmk */ |
| 129967 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 129968 | /* VPADDUSWZ256rmkz */ |
| 129969 | VR256X, VK16WM, VR256X, i256mem, |
| 129970 | /* VPADDUSWZ256rr */ |
| 129971 | VR256X, VR256X, VR256X, |
| 129972 | /* VPADDUSWZ256rrk */ |
| 129973 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 129974 | /* VPADDUSWZ256rrkz */ |
| 129975 | VR256X, VK16WM, VR256X, VR256X, |
| 129976 | /* VPADDUSWZrm */ |
| 129977 | VR512, VR512, i512mem, |
| 129978 | /* VPADDUSWZrmk */ |
| 129979 | VR512, VR512, VK32WM, VR512, i512mem, |
| 129980 | /* VPADDUSWZrmkz */ |
| 129981 | VR512, VK32WM, VR512, i512mem, |
| 129982 | /* VPADDUSWZrr */ |
| 129983 | VR512, VR512, VR512, |
| 129984 | /* VPADDUSWZrrk */ |
| 129985 | VR512, VR512, VK32WM, VR512, VR512, |
| 129986 | /* VPADDUSWZrrkz */ |
| 129987 | VR512, VK32WM, VR512, VR512, |
| 129988 | /* VPADDUSWrm */ |
| 129989 | VR128, VR128, i128mem, |
| 129990 | /* VPADDUSWrr */ |
| 129991 | VR128, VR128, VR128, |
| 129992 | /* VPADDWYrm */ |
| 129993 | VR256, VR256, i256mem, |
| 129994 | /* VPADDWYrr */ |
| 129995 | VR256, VR256, VR256, |
| 129996 | /* VPADDWZ128rm */ |
| 129997 | VR128X, VR128X, i128mem, |
| 129998 | /* VPADDWZ128rmk */ |
| 129999 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 130000 | /* VPADDWZ128rmkz */ |
| 130001 | VR128X, VK8WM, VR128X, i128mem, |
| 130002 | /* VPADDWZ128rr */ |
| 130003 | VR128X, VR128X, VR128X, |
| 130004 | /* VPADDWZ128rrk */ |
| 130005 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 130006 | /* VPADDWZ128rrkz */ |
| 130007 | VR128X, VK8WM, VR128X, VR128X, |
| 130008 | /* VPADDWZ256rm */ |
| 130009 | VR256X, VR256X, i256mem, |
| 130010 | /* VPADDWZ256rmk */ |
| 130011 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 130012 | /* VPADDWZ256rmkz */ |
| 130013 | VR256X, VK16WM, VR256X, i256mem, |
| 130014 | /* VPADDWZ256rr */ |
| 130015 | VR256X, VR256X, VR256X, |
| 130016 | /* VPADDWZ256rrk */ |
| 130017 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 130018 | /* VPADDWZ256rrkz */ |
| 130019 | VR256X, VK16WM, VR256X, VR256X, |
| 130020 | /* VPADDWZrm */ |
| 130021 | VR512, VR512, i512mem, |
| 130022 | /* VPADDWZrmk */ |
| 130023 | VR512, VR512, VK32WM, VR512, i512mem, |
| 130024 | /* VPADDWZrmkz */ |
| 130025 | VR512, VK32WM, VR512, i512mem, |
| 130026 | /* VPADDWZrr */ |
| 130027 | VR512, VR512, VR512, |
| 130028 | /* VPADDWZrrk */ |
| 130029 | VR512, VR512, VK32WM, VR512, VR512, |
| 130030 | /* VPADDWZrrkz */ |
| 130031 | VR512, VK32WM, VR512, VR512, |
| 130032 | /* VPADDWrm */ |
| 130033 | VR128, VR128, i128mem, |
| 130034 | /* VPADDWrr */ |
| 130035 | VR128, VR128, VR128, |
| 130036 | /* VPALIGNRYrmi */ |
| 130037 | VR256, VR256, i256mem, u8imm, |
| 130038 | /* VPALIGNRYrri */ |
| 130039 | VR256, VR256, VR256, u8imm, |
| 130040 | /* VPALIGNRZ128rmi */ |
| 130041 | VR128X, VR128X, i128mem, u8imm, |
| 130042 | /* VPALIGNRZ128rmik */ |
| 130043 | VR128X, VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 130044 | /* VPALIGNRZ128rmikz */ |
| 130045 | VR128X, VK16WM, VR128X, i128mem, u8imm, |
| 130046 | /* VPALIGNRZ128rri */ |
| 130047 | VR128X, VR128X, VR128X, u8imm, |
| 130048 | /* VPALIGNRZ128rrik */ |
| 130049 | VR128X, VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 130050 | /* VPALIGNRZ128rrikz */ |
| 130051 | VR128X, VK16WM, VR128X, VR128X, u8imm, |
| 130052 | /* VPALIGNRZ256rmi */ |
| 130053 | VR256X, VR256X, i256mem, u8imm, |
| 130054 | /* VPALIGNRZ256rmik */ |
| 130055 | VR256X, VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 130056 | /* VPALIGNRZ256rmikz */ |
| 130057 | VR256X, VK32WM, VR256X, i256mem, u8imm, |
| 130058 | /* VPALIGNRZ256rri */ |
| 130059 | VR256X, VR256X, VR256X, u8imm, |
| 130060 | /* VPALIGNRZ256rrik */ |
| 130061 | VR256X, VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 130062 | /* VPALIGNRZ256rrikz */ |
| 130063 | VR256X, VK32WM, VR256X, VR256X, u8imm, |
| 130064 | /* VPALIGNRZrmi */ |
| 130065 | VR512, VR512, i512mem, u8imm, |
| 130066 | /* VPALIGNRZrmik */ |
| 130067 | VR512, VR512, VK64WM, VR512, i512mem, u8imm, |
| 130068 | /* VPALIGNRZrmikz */ |
| 130069 | VR512, VK64WM, VR512, i512mem, u8imm, |
| 130070 | /* VPALIGNRZrri */ |
| 130071 | VR512, VR512, VR512, u8imm, |
| 130072 | /* VPALIGNRZrrik */ |
| 130073 | VR512, VR512, VK64WM, VR512, VR512, u8imm, |
| 130074 | /* VPALIGNRZrrikz */ |
| 130075 | VR512, VK64WM, VR512, VR512, u8imm, |
| 130076 | /* VPALIGNRrmi */ |
| 130077 | VR128, VR128, i128mem, u8imm, |
| 130078 | /* VPALIGNRrri */ |
| 130079 | VR128, VR128, VR128, u8imm, |
| 130080 | /* VPANDDZ128rm */ |
| 130081 | VR128X, VR128X, i128mem, |
| 130082 | /* VPANDDZ128rmb */ |
| 130083 | VR128X, VR128X, i32mem, |
| 130084 | /* VPANDDZ128rmbk */ |
| 130085 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 130086 | /* VPANDDZ128rmbkz */ |
| 130087 | VR128X, VK4WM, VR128X, i32mem, |
| 130088 | /* VPANDDZ128rmk */ |
| 130089 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 130090 | /* VPANDDZ128rmkz */ |
| 130091 | VR128X, VK4WM, VR128X, i128mem, |
| 130092 | /* VPANDDZ128rr */ |
| 130093 | VR128X, VR128X, VR128X, |
| 130094 | /* VPANDDZ128rrk */ |
| 130095 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 130096 | /* VPANDDZ128rrkz */ |
| 130097 | VR128X, VK4WM, VR128X, VR128X, |
| 130098 | /* VPANDDZ256rm */ |
| 130099 | VR256X, VR256X, i256mem, |
| 130100 | /* VPANDDZ256rmb */ |
| 130101 | VR256X, VR256X, i32mem, |
| 130102 | /* VPANDDZ256rmbk */ |
| 130103 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 130104 | /* VPANDDZ256rmbkz */ |
| 130105 | VR256X, VK8WM, VR256X, i32mem, |
| 130106 | /* VPANDDZ256rmk */ |
| 130107 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 130108 | /* VPANDDZ256rmkz */ |
| 130109 | VR256X, VK8WM, VR256X, i256mem, |
| 130110 | /* VPANDDZ256rr */ |
| 130111 | VR256X, VR256X, VR256X, |
| 130112 | /* VPANDDZ256rrk */ |
| 130113 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 130114 | /* VPANDDZ256rrkz */ |
| 130115 | VR256X, VK8WM, VR256X, VR256X, |
| 130116 | /* VPANDDZrm */ |
| 130117 | VR512, VR512, i512mem, |
| 130118 | /* VPANDDZrmb */ |
| 130119 | VR512, VR512, i32mem, |
| 130120 | /* VPANDDZrmbk */ |
| 130121 | VR512, VR512, VK16WM, VR512, i32mem, |
| 130122 | /* VPANDDZrmbkz */ |
| 130123 | VR512, VK16WM, VR512, i32mem, |
| 130124 | /* VPANDDZrmk */ |
| 130125 | VR512, VR512, VK16WM, VR512, i512mem, |
| 130126 | /* VPANDDZrmkz */ |
| 130127 | VR512, VK16WM, VR512, i512mem, |
| 130128 | /* VPANDDZrr */ |
| 130129 | VR512, VR512, VR512, |
| 130130 | /* VPANDDZrrk */ |
| 130131 | VR512, VR512, VK16WM, VR512, VR512, |
| 130132 | /* VPANDDZrrkz */ |
| 130133 | VR512, VK16WM, VR512, VR512, |
| 130134 | /* VPANDNDZ128rm */ |
| 130135 | VR128X, VR128X, i128mem, |
| 130136 | /* VPANDNDZ128rmb */ |
| 130137 | VR128X, VR128X, i32mem, |
| 130138 | /* VPANDNDZ128rmbk */ |
| 130139 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 130140 | /* VPANDNDZ128rmbkz */ |
| 130141 | VR128X, VK4WM, VR128X, i32mem, |
| 130142 | /* VPANDNDZ128rmk */ |
| 130143 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 130144 | /* VPANDNDZ128rmkz */ |
| 130145 | VR128X, VK4WM, VR128X, i128mem, |
| 130146 | /* VPANDNDZ128rr */ |
| 130147 | VR128X, VR128X, VR128X, |
| 130148 | /* VPANDNDZ128rrk */ |
| 130149 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 130150 | /* VPANDNDZ128rrkz */ |
| 130151 | VR128X, VK4WM, VR128X, VR128X, |
| 130152 | /* VPANDNDZ256rm */ |
| 130153 | VR256X, VR256X, i256mem, |
| 130154 | /* VPANDNDZ256rmb */ |
| 130155 | VR256X, VR256X, i32mem, |
| 130156 | /* VPANDNDZ256rmbk */ |
| 130157 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 130158 | /* VPANDNDZ256rmbkz */ |
| 130159 | VR256X, VK8WM, VR256X, i32mem, |
| 130160 | /* VPANDNDZ256rmk */ |
| 130161 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 130162 | /* VPANDNDZ256rmkz */ |
| 130163 | VR256X, VK8WM, VR256X, i256mem, |
| 130164 | /* VPANDNDZ256rr */ |
| 130165 | VR256X, VR256X, VR256X, |
| 130166 | /* VPANDNDZ256rrk */ |
| 130167 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 130168 | /* VPANDNDZ256rrkz */ |
| 130169 | VR256X, VK8WM, VR256X, VR256X, |
| 130170 | /* VPANDNDZrm */ |
| 130171 | VR512, VR512, i512mem, |
| 130172 | /* VPANDNDZrmb */ |
| 130173 | VR512, VR512, i32mem, |
| 130174 | /* VPANDNDZrmbk */ |
| 130175 | VR512, VR512, VK16WM, VR512, i32mem, |
| 130176 | /* VPANDNDZrmbkz */ |
| 130177 | VR512, VK16WM, VR512, i32mem, |
| 130178 | /* VPANDNDZrmk */ |
| 130179 | VR512, VR512, VK16WM, VR512, i512mem, |
| 130180 | /* VPANDNDZrmkz */ |
| 130181 | VR512, VK16WM, VR512, i512mem, |
| 130182 | /* VPANDNDZrr */ |
| 130183 | VR512, VR512, VR512, |
| 130184 | /* VPANDNDZrrk */ |
| 130185 | VR512, VR512, VK16WM, VR512, VR512, |
| 130186 | /* VPANDNDZrrkz */ |
| 130187 | VR512, VK16WM, VR512, VR512, |
| 130188 | /* VPANDNQZ128rm */ |
| 130189 | VR128X, VR128X, i128mem, |
| 130190 | /* VPANDNQZ128rmb */ |
| 130191 | VR128X, VR128X, i64mem, |
| 130192 | /* VPANDNQZ128rmbk */ |
| 130193 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 130194 | /* VPANDNQZ128rmbkz */ |
| 130195 | VR128X, VK2WM, VR128X, i64mem, |
| 130196 | /* VPANDNQZ128rmk */ |
| 130197 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 130198 | /* VPANDNQZ128rmkz */ |
| 130199 | VR128X, VK2WM, VR128X, i128mem, |
| 130200 | /* VPANDNQZ128rr */ |
| 130201 | VR128X, VR128X, VR128X, |
| 130202 | /* VPANDNQZ128rrk */ |
| 130203 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 130204 | /* VPANDNQZ128rrkz */ |
| 130205 | VR128X, VK2WM, VR128X, VR128X, |
| 130206 | /* VPANDNQZ256rm */ |
| 130207 | VR256X, VR256X, i256mem, |
| 130208 | /* VPANDNQZ256rmb */ |
| 130209 | VR256X, VR256X, i64mem, |
| 130210 | /* VPANDNQZ256rmbk */ |
| 130211 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 130212 | /* VPANDNQZ256rmbkz */ |
| 130213 | VR256X, VK4WM, VR256X, i64mem, |
| 130214 | /* VPANDNQZ256rmk */ |
| 130215 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 130216 | /* VPANDNQZ256rmkz */ |
| 130217 | VR256X, VK4WM, VR256X, i256mem, |
| 130218 | /* VPANDNQZ256rr */ |
| 130219 | VR256X, VR256X, VR256X, |
| 130220 | /* VPANDNQZ256rrk */ |
| 130221 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 130222 | /* VPANDNQZ256rrkz */ |
| 130223 | VR256X, VK4WM, VR256X, VR256X, |
| 130224 | /* VPANDNQZrm */ |
| 130225 | VR512, VR512, i512mem, |
| 130226 | /* VPANDNQZrmb */ |
| 130227 | VR512, VR512, i64mem, |
| 130228 | /* VPANDNQZrmbk */ |
| 130229 | VR512, VR512, VK8WM, VR512, i64mem, |
| 130230 | /* VPANDNQZrmbkz */ |
| 130231 | VR512, VK8WM, VR512, i64mem, |
| 130232 | /* VPANDNQZrmk */ |
| 130233 | VR512, VR512, VK8WM, VR512, i512mem, |
| 130234 | /* VPANDNQZrmkz */ |
| 130235 | VR512, VK8WM, VR512, i512mem, |
| 130236 | /* VPANDNQZrr */ |
| 130237 | VR512, VR512, VR512, |
| 130238 | /* VPANDNQZrrk */ |
| 130239 | VR512, VR512, VK8WM, VR512, VR512, |
| 130240 | /* VPANDNQZrrkz */ |
| 130241 | VR512, VK8WM, VR512, VR512, |
| 130242 | /* VPANDNYrm */ |
| 130243 | VR256, VR256, i256mem, |
| 130244 | /* VPANDNYrr */ |
| 130245 | VR256, VR256, VR256, |
| 130246 | /* VPANDNrm */ |
| 130247 | VR128, VR128, i128mem, |
| 130248 | /* VPANDNrr */ |
| 130249 | VR128, VR128, VR128, |
| 130250 | /* VPANDQZ128rm */ |
| 130251 | VR128X, VR128X, i128mem, |
| 130252 | /* VPANDQZ128rmb */ |
| 130253 | VR128X, VR128X, i64mem, |
| 130254 | /* VPANDQZ128rmbk */ |
| 130255 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 130256 | /* VPANDQZ128rmbkz */ |
| 130257 | VR128X, VK2WM, VR128X, i64mem, |
| 130258 | /* VPANDQZ128rmk */ |
| 130259 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 130260 | /* VPANDQZ128rmkz */ |
| 130261 | VR128X, VK2WM, VR128X, i128mem, |
| 130262 | /* VPANDQZ128rr */ |
| 130263 | VR128X, VR128X, VR128X, |
| 130264 | /* VPANDQZ128rrk */ |
| 130265 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 130266 | /* VPANDQZ128rrkz */ |
| 130267 | VR128X, VK2WM, VR128X, VR128X, |
| 130268 | /* VPANDQZ256rm */ |
| 130269 | VR256X, VR256X, i256mem, |
| 130270 | /* VPANDQZ256rmb */ |
| 130271 | VR256X, VR256X, i64mem, |
| 130272 | /* VPANDQZ256rmbk */ |
| 130273 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 130274 | /* VPANDQZ256rmbkz */ |
| 130275 | VR256X, VK4WM, VR256X, i64mem, |
| 130276 | /* VPANDQZ256rmk */ |
| 130277 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 130278 | /* VPANDQZ256rmkz */ |
| 130279 | VR256X, VK4WM, VR256X, i256mem, |
| 130280 | /* VPANDQZ256rr */ |
| 130281 | VR256X, VR256X, VR256X, |
| 130282 | /* VPANDQZ256rrk */ |
| 130283 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 130284 | /* VPANDQZ256rrkz */ |
| 130285 | VR256X, VK4WM, VR256X, VR256X, |
| 130286 | /* VPANDQZrm */ |
| 130287 | VR512, VR512, i512mem, |
| 130288 | /* VPANDQZrmb */ |
| 130289 | VR512, VR512, i64mem, |
| 130290 | /* VPANDQZrmbk */ |
| 130291 | VR512, VR512, VK8WM, VR512, i64mem, |
| 130292 | /* VPANDQZrmbkz */ |
| 130293 | VR512, VK8WM, VR512, i64mem, |
| 130294 | /* VPANDQZrmk */ |
| 130295 | VR512, VR512, VK8WM, VR512, i512mem, |
| 130296 | /* VPANDQZrmkz */ |
| 130297 | VR512, VK8WM, VR512, i512mem, |
| 130298 | /* VPANDQZrr */ |
| 130299 | VR512, VR512, VR512, |
| 130300 | /* VPANDQZrrk */ |
| 130301 | VR512, VR512, VK8WM, VR512, VR512, |
| 130302 | /* VPANDQZrrkz */ |
| 130303 | VR512, VK8WM, VR512, VR512, |
| 130304 | /* VPANDYrm */ |
| 130305 | VR256, VR256, i256mem, |
| 130306 | /* VPANDYrr */ |
| 130307 | VR256, VR256, VR256, |
| 130308 | /* VPANDrm */ |
| 130309 | VR128, VR128, i128mem, |
| 130310 | /* VPANDrr */ |
| 130311 | VR128, VR128, VR128, |
| 130312 | /* VPAVGBYrm */ |
| 130313 | VR256, VR256, i256mem, |
| 130314 | /* VPAVGBYrr */ |
| 130315 | VR256, VR256, VR256, |
| 130316 | /* VPAVGBZ128rm */ |
| 130317 | VR128X, VR128X, i128mem, |
| 130318 | /* VPAVGBZ128rmk */ |
| 130319 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 130320 | /* VPAVGBZ128rmkz */ |
| 130321 | VR128X, VK16WM, VR128X, i128mem, |
| 130322 | /* VPAVGBZ128rr */ |
| 130323 | VR128X, VR128X, VR128X, |
| 130324 | /* VPAVGBZ128rrk */ |
| 130325 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 130326 | /* VPAVGBZ128rrkz */ |
| 130327 | VR128X, VK16WM, VR128X, VR128X, |
| 130328 | /* VPAVGBZ256rm */ |
| 130329 | VR256X, VR256X, i256mem, |
| 130330 | /* VPAVGBZ256rmk */ |
| 130331 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 130332 | /* VPAVGBZ256rmkz */ |
| 130333 | VR256X, VK32WM, VR256X, i256mem, |
| 130334 | /* VPAVGBZ256rr */ |
| 130335 | VR256X, VR256X, VR256X, |
| 130336 | /* VPAVGBZ256rrk */ |
| 130337 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 130338 | /* VPAVGBZ256rrkz */ |
| 130339 | VR256X, VK32WM, VR256X, VR256X, |
| 130340 | /* VPAVGBZrm */ |
| 130341 | VR512, VR512, i512mem, |
| 130342 | /* VPAVGBZrmk */ |
| 130343 | VR512, VR512, VK64WM, VR512, i512mem, |
| 130344 | /* VPAVGBZrmkz */ |
| 130345 | VR512, VK64WM, VR512, i512mem, |
| 130346 | /* VPAVGBZrr */ |
| 130347 | VR512, VR512, VR512, |
| 130348 | /* VPAVGBZrrk */ |
| 130349 | VR512, VR512, VK64WM, VR512, VR512, |
| 130350 | /* VPAVGBZrrkz */ |
| 130351 | VR512, VK64WM, VR512, VR512, |
| 130352 | /* VPAVGBrm */ |
| 130353 | VR128, VR128, i128mem, |
| 130354 | /* VPAVGBrr */ |
| 130355 | VR128, VR128, VR128, |
| 130356 | /* VPAVGWYrm */ |
| 130357 | VR256, VR256, i256mem, |
| 130358 | /* VPAVGWYrr */ |
| 130359 | VR256, VR256, VR256, |
| 130360 | /* VPAVGWZ128rm */ |
| 130361 | VR128X, VR128X, i128mem, |
| 130362 | /* VPAVGWZ128rmk */ |
| 130363 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 130364 | /* VPAVGWZ128rmkz */ |
| 130365 | VR128X, VK8WM, VR128X, i128mem, |
| 130366 | /* VPAVGWZ128rr */ |
| 130367 | VR128X, VR128X, VR128X, |
| 130368 | /* VPAVGWZ128rrk */ |
| 130369 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 130370 | /* VPAVGWZ128rrkz */ |
| 130371 | VR128X, VK8WM, VR128X, VR128X, |
| 130372 | /* VPAVGWZ256rm */ |
| 130373 | VR256X, VR256X, i256mem, |
| 130374 | /* VPAVGWZ256rmk */ |
| 130375 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 130376 | /* VPAVGWZ256rmkz */ |
| 130377 | VR256X, VK16WM, VR256X, i256mem, |
| 130378 | /* VPAVGWZ256rr */ |
| 130379 | VR256X, VR256X, VR256X, |
| 130380 | /* VPAVGWZ256rrk */ |
| 130381 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 130382 | /* VPAVGWZ256rrkz */ |
| 130383 | VR256X, VK16WM, VR256X, VR256X, |
| 130384 | /* VPAVGWZrm */ |
| 130385 | VR512, VR512, i512mem, |
| 130386 | /* VPAVGWZrmk */ |
| 130387 | VR512, VR512, VK32WM, VR512, i512mem, |
| 130388 | /* VPAVGWZrmkz */ |
| 130389 | VR512, VK32WM, VR512, i512mem, |
| 130390 | /* VPAVGWZrr */ |
| 130391 | VR512, VR512, VR512, |
| 130392 | /* VPAVGWZrrk */ |
| 130393 | VR512, VR512, VK32WM, VR512, VR512, |
| 130394 | /* VPAVGWZrrkz */ |
| 130395 | VR512, VK32WM, VR512, VR512, |
| 130396 | /* VPAVGWrm */ |
| 130397 | VR128, VR128, i128mem, |
| 130398 | /* VPAVGWrr */ |
| 130399 | VR128, VR128, VR128, |
| 130400 | /* VPBLENDDYrmi */ |
| 130401 | VR256, VR256, i256mem, u8imm, |
| 130402 | /* VPBLENDDYrri */ |
| 130403 | VR256, VR256, VR256, u8imm, |
| 130404 | /* VPBLENDDrmi */ |
| 130405 | VR128, VR128, i128mem, u8imm, |
| 130406 | /* VPBLENDDrri */ |
| 130407 | VR128, VR128, VR128, u8imm, |
| 130408 | /* VPBLENDMBZ128rm */ |
| 130409 | VR128X, VR128X, i128mem, |
| 130410 | /* VPBLENDMBZ128rmk */ |
| 130411 | VR128X, VK16WM, VR128X, i128mem, |
| 130412 | /* VPBLENDMBZ128rmkz */ |
| 130413 | VR128X, VK16WM, VR128X, i128mem, |
| 130414 | /* VPBLENDMBZ128rr */ |
| 130415 | VR128X, VR128X, VR128X, |
| 130416 | /* VPBLENDMBZ128rrk */ |
| 130417 | VR128X, VK16WM, VR128X, VR128X, |
| 130418 | /* VPBLENDMBZ128rrkz */ |
| 130419 | VR128X, VK16WM, VR128X, VR128X, |
| 130420 | /* VPBLENDMBZ256rm */ |
| 130421 | VR256X, VR256X, i256mem, |
| 130422 | /* VPBLENDMBZ256rmk */ |
| 130423 | VR256X, VK32WM, VR256X, i256mem, |
| 130424 | /* VPBLENDMBZ256rmkz */ |
| 130425 | VR256X, VK32WM, VR256X, i256mem, |
| 130426 | /* VPBLENDMBZ256rr */ |
| 130427 | VR256X, VR256X, VR256X, |
| 130428 | /* VPBLENDMBZ256rrk */ |
| 130429 | VR256X, VK32WM, VR256X, VR256X, |
| 130430 | /* VPBLENDMBZ256rrkz */ |
| 130431 | VR256X, VK32WM, VR256X, VR256X, |
| 130432 | /* VPBLENDMBZrm */ |
| 130433 | VR512, VR512, i512mem, |
| 130434 | /* VPBLENDMBZrmk */ |
| 130435 | VR512, VK64WM, VR512, i512mem, |
| 130436 | /* VPBLENDMBZrmkz */ |
| 130437 | VR512, VK64WM, VR512, i512mem, |
| 130438 | /* VPBLENDMBZrr */ |
| 130439 | VR512, VR512, VR512, |
| 130440 | /* VPBLENDMBZrrk */ |
| 130441 | VR512, VK64WM, VR512, VR512, |
| 130442 | /* VPBLENDMBZrrkz */ |
| 130443 | VR512, VK64WM, VR512, VR512, |
| 130444 | /* VPBLENDMDZ128rm */ |
| 130445 | VR128X, VR128X, i128mem, |
| 130446 | /* VPBLENDMDZ128rmb */ |
| 130447 | VR128X, VR128X, i32mem, |
| 130448 | /* VPBLENDMDZ128rmbk */ |
| 130449 | VR128X, VK4WM, VR128X, i32mem, |
| 130450 | /* VPBLENDMDZ128rmbkz */ |
| 130451 | VR128X, VK4WM, VR128X, i32mem, |
| 130452 | /* VPBLENDMDZ128rmk */ |
| 130453 | VR128X, VK4WM, VR128X, i128mem, |
| 130454 | /* VPBLENDMDZ128rmkz */ |
| 130455 | VR128X, VK4WM, VR128X, i128mem, |
| 130456 | /* VPBLENDMDZ128rr */ |
| 130457 | VR128X, VR128X, VR128X, |
| 130458 | /* VPBLENDMDZ128rrk */ |
| 130459 | VR128X, VK4WM, VR128X, VR128X, |
| 130460 | /* VPBLENDMDZ128rrkz */ |
| 130461 | VR128X, VK4WM, VR128X, VR128X, |
| 130462 | /* VPBLENDMDZ256rm */ |
| 130463 | VR256X, VR256X, i256mem, |
| 130464 | /* VPBLENDMDZ256rmb */ |
| 130465 | VR256X, VR256X, i32mem, |
| 130466 | /* VPBLENDMDZ256rmbk */ |
| 130467 | VR256X, VK8WM, VR256X, i32mem, |
| 130468 | /* VPBLENDMDZ256rmbkz */ |
| 130469 | VR256X, VK8WM, VR256X, i32mem, |
| 130470 | /* VPBLENDMDZ256rmk */ |
| 130471 | VR256X, VK8WM, VR256X, i256mem, |
| 130472 | /* VPBLENDMDZ256rmkz */ |
| 130473 | VR256X, VK8WM, VR256X, i256mem, |
| 130474 | /* VPBLENDMDZ256rr */ |
| 130475 | VR256X, VR256X, VR256X, |
| 130476 | /* VPBLENDMDZ256rrk */ |
| 130477 | VR256X, VK8WM, VR256X, VR256X, |
| 130478 | /* VPBLENDMDZ256rrkz */ |
| 130479 | VR256X, VK8WM, VR256X, VR256X, |
| 130480 | /* VPBLENDMDZrm */ |
| 130481 | VR512, VR512, i512mem, |
| 130482 | /* VPBLENDMDZrmb */ |
| 130483 | VR512, VR512, i32mem, |
| 130484 | /* VPBLENDMDZrmbk */ |
| 130485 | VR512, VK16WM, VR512, i32mem, |
| 130486 | /* VPBLENDMDZrmbkz */ |
| 130487 | VR512, VK16WM, VR512, i32mem, |
| 130488 | /* VPBLENDMDZrmk */ |
| 130489 | VR512, VK16WM, VR512, i512mem, |
| 130490 | /* VPBLENDMDZrmkz */ |
| 130491 | VR512, VK16WM, VR512, i512mem, |
| 130492 | /* VPBLENDMDZrr */ |
| 130493 | VR512, VR512, VR512, |
| 130494 | /* VPBLENDMDZrrk */ |
| 130495 | VR512, VK16WM, VR512, VR512, |
| 130496 | /* VPBLENDMDZrrkz */ |
| 130497 | VR512, VK16WM, VR512, VR512, |
| 130498 | /* VPBLENDMQZ128rm */ |
| 130499 | VR128X, VR128X, i128mem, |
| 130500 | /* VPBLENDMQZ128rmb */ |
| 130501 | VR128X, VR128X, i64mem, |
| 130502 | /* VPBLENDMQZ128rmbk */ |
| 130503 | VR128X, VK2WM, VR128X, i64mem, |
| 130504 | /* VPBLENDMQZ128rmbkz */ |
| 130505 | VR128X, VK2WM, VR128X, i64mem, |
| 130506 | /* VPBLENDMQZ128rmk */ |
| 130507 | VR128X, VK2WM, VR128X, i128mem, |
| 130508 | /* VPBLENDMQZ128rmkz */ |
| 130509 | VR128X, VK2WM, VR128X, i128mem, |
| 130510 | /* VPBLENDMQZ128rr */ |
| 130511 | VR128X, VR128X, VR128X, |
| 130512 | /* VPBLENDMQZ128rrk */ |
| 130513 | VR128X, VK2WM, VR128X, VR128X, |
| 130514 | /* VPBLENDMQZ128rrkz */ |
| 130515 | VR128X, VK2WM, VR128X, VR128X, |
| 130516 | /* VPBLENDMQZ256rm */ |
| 130517 | VR256X, VR256X, i256mem, |
| 130518 | /* VPBLENDMQZ256rmb */ |
| 130519 | VR256X, VR256X, i64mem, |
| 130520 | /* VPBLENDMQZ256rmbk */ |
| 130521 | VR256X, VK4WM, VR256X, i64mem, |
| 130522 | /* VPBLENDMQZ256rmbkz */ |
| 130523 | VR256X, VK4WM, VR256X, i64mem, |
| 130524 | /* VPBLENDMQZ256rmk */ |
| 130525 | VR256X, VK4WM, VR256X, i256mem, |
| 130526 | /* VPBLENDMQZ256rmkz */ |
| 130527 | VR256X, VK4WM, VR256X, i256mem, |
| 130528 | /* VPBLENDMQZ256rr */ |
| 130529 | VR256X, VR256X, VR256X, |
| 130530 | /* VPBLENDMQZ256rrk */ |
| 130531 | VR256X, VK4WM, VR256X, VR256X, |
| 130532 | /* VPBLENDMQZ256rrkz */ |
| 130533 | VR256X, VK4WM, VR256X, VR256X, |
| 130534 | /* VPBLENDMQZrm */ |
| 130535 | VR512, VR512, i512mem, |
| 130536 | /* VPBLENDMQZrmb */ |
| 130537 | VR512, VR512, i64mem, |
| 130538 | /* VPBLENDMQZrmbk */ |
| 130539 | VR512, VK8WM, VR512, i64mem, |
| 130540 | /* VPBLENDMQZrmbkz */ |
| 130541 | VR512, VK8WM, VR512, i64mem, |
| 130542 | /* VPBLENDMQZrmk */ |
| 130543 | VR512, VK8WM, VR512, i512mem, |
| 130544 | /* VPBLENDMQZrmkz */ |
| 130545 | VR512, VK8WM, VR512, i512mem, |
| 130546 | /* VPBLENDMQZrr */ |
| 130547 | VR512, VR512, VR512, |
| 130548 | /* VPBLENDMQZrrk */ |
| 130549 | VR512, VK8WM, VR512, VR512, |
| 130550 | /* VPBLENDMQZrrkz */ |
| 130551 | VR512, VK8WM, VR512, VR512, |
| 130552 | /* VPBLENDMWZ128rm */ |
| 130553 | VR128X, VR128X, i128mem, |
| 130554 | /* VPBLENDMWZ128rmk */ |
| 130555 | VR128X, VK8WM, VR128X, i128mem, |
| 130556 | /* VPBLENDMWZ128rmkz */ |
| 130557 | VR128X, VK8WM, VR128X, i128mem, |
| 130558 | /* VPBLENDMWZ128rr */ |
| 130559 | VR128X, VR128X, VR128X, |
| 130560 | /* VPBLENDMWZ128rrk */ |
| 130561 | VR128X, VK8WM, VR128X, VR128X, |
| 130562 | /* VPBLENDMWZ128rrkz */ |
| 130563 | VR128X, VK8WM, VR128X, VR128X, |
| 130564 | /* VPBLENDMWZ256rm */ |
| 130565 | VR256X, VR256X, i256mem, |
| 130566 | /* VPBLENDMWZ256rmk */ |
| 130567 | VR256X, VK16WM, VR256X, i256mem, |
| 130568 | /* VPBLENDMWZ256rmkz */ |
| 130569 | VR256X, VK16WM, VR256X, i256mem, |
| 130570 | /* VPBLENDMWZ256rr */ |
| 130571 | VR256X, VR256X, VR256X, |
| 130572 | /* VPBLENDMWZ256rrk */ |
| 130573 | VR256X, VK16WM, VR256X, VR256X, |
| 130574 | /* VPBLENDMWZ256rrkz */ |
| 130575 | VR256X, VK16WM, VR256X, VR256X, |
| 130576 | /* VPBLENDMWZrm */ |
| 130577 | VR512, VR512, i512mem, |
| 130578 | /* VPBLENDMWZrmk */ |
| 130579 | VR512, VK32WM, VR512, i512mem, |
| 130580 | /* VPBLENDMWZrmkz */ |
| 130581 | VR512, VK32WM, VR512, i512mem, |
| 130582 | /* VPBLENDMWZrr */ |
| 130583 | VR512, VR512, VR512, |
| 130584 | /* VPBLENDMWZrrk */ |
| 130585 | VR512, VK32WM, VR512, VR512, |
| 130586 | /* VPBLENDMWZrrkz */ |
| 130587 | VR512, VK32WM, VR512, VR512, |
| 130588 | /* VPBLENDVBYrmr */ |
| 130589 | VR256, VR256, i256mem, VR256, |
| 130590 | /* VPBLENDVBYrrr */ |
| 130591 | VR256, VR256, VR256, VR256, |
| 130592 | /* VPBLENDVBrmr */ |
| 130593 | VR128, VR128, i128mem, VR128, |
| 130594 | /* VPBLENDVBrrr */ |
| 130595 | VR128, VR128, VR128, VR128, |
| 130596 | /* VPBLENDWYrmi */ |
| 130597 | VR256, VR256, i256mem, u8imm, |
| 130598 | /* VPBLENDWYrri */ |
| 130599 | VR256, VR256, VR256, u8imm, |
| 130600 | /* VPBLENDWrmi */ |
| 130601 | VR128, VR128, i128mem, u8imm, |
| 130602 | /* VPBLENDWrri */ |
| 130603 | VR128, VR128, VR128, u8imm, |
| 130604 | /* VPBROADCASTBYrm */ |
| 130605 | VR256, i8mem, |
| 130606 | /* VPBROADCASTBYrr */ |
| 130607 | VR256, VR128, |
| 130608 | /* VPBROADCASTBZ128rm */ |
| 130609 | VR128X, i8mem, |
| 130610 | /* VPBROADCASTBZ128rmk */ |
| 130611 | VR128X, VR128X, VK16WM, i8mem, |
| 130612 | /* VPBROADCASTBZ128rmkz */ |
| 130613 | VR128X, VK16WM, i8mem, |
| 130614 | /* VPBROADCASTBZ128rr */ |
| 130615 | VR128X, VR128X, |
| 130616 | /* VPBROADCASTBZ128rrk */ |
| 130617 | VR128X, VR128X, VK16WM, VR128X, |
| 130618 | /* VPBROADCASTBZ128rrkz */ |
| 130619 | VR128X, VK16WM, VR128X, |
| 130620 | /* VPBROADCASTBZ256rm */ |
| 130621 | VR256X, i8mem, |
| 130622 | /* VPBROADCASTBZ256rmk */ |
| 130623 | VR256X, VR256X, VK32WM, i8mem, |
| 130624 | /* VPBROADCASTBZ256rmkz */ |
| 130625 | VR256X, VK32WM, i8mem, |
| 130626 | /* VPBROADCASTBZ256rr */ |
| 130627 | VR256X, VR128X, |
| 130628 | /* VPBROADCASTBZ256rrk */ |
| 130629 | VR256X, VR256X, VK32WM, VR128X, |
| 130630 | /* VPBROADCASTBZ256rrkz */ |
| 130631 | VR256X, VK32WM, VR128X, |
| 130632 | /* VPBROADCASTBZrm */ |
| 130633 | VR512, i8mem, |
| 130634 | /* VPBROADCASTBZrmk */ |
| 130635 | VR512, VR512, VK64WM, i8mem, |
| 130636 | /* VPBROADCASTBZrmkz */ |
| 130637 | VR512, VK64WM, i8mem, |
| 130638 | /* VPBROADCASTBZrr */ |
| 130639 | VR512, VR128X, |
| 130640 | /* VPBROADCASTBZrrk */ |
| 130641 | VR512, VR512, VK64WM, VR128X, |
| 130642 | /* VPBROADCASTBZrrkz */ |
| 130643 | VR512, VK64WM, VR128X, |
| 130644 | /* VPBROADCASTBrZ128rr */ |
| 130645 | VR128X, GR32, |
| 130646 | /* VPBROADCASTBrZ128rrk */ |
| 130647 | VR128X, VR128X, VK16WM, GR32, |
| 130648 | /* VPBROADCASTBrZ128rrkz */ |
| 130649 | VR128X, VK16WM, GR32, |
| 130650 | /* VPBROADCASTBrZ256rr */ |
| 130651 | VR256X, GR32, |
| 130652 | /* VPBROADCASTBrZ256rrk */ |
| 130653 | VR256X, VR256X, VK32WM, GR32, |
| 130654 | /* VPBROADCASTBrZ256rrkz */ |
| 130655 | VR256X, VK32WM, GR32, |
| 130656 | /* VPBROADCASTBrZrr */ |
| 130657 | VR512, GR32, |
| 130658 | /* VPBROADCASTBrZrrk */ |
| 130659 | VR512, VR512, VK64WM, GR32, |
| 130660 | /* VPBROADCASTBrZrrkz */ |
| 130661 | VR512, VK64WM, GR32, |
| 130662 | /* VPBROADCASTBrm */ |
| 130663 | VR128, i8mem, |
| 130664 | /* VPBROADCASTBrr */ |
| 130665 | VR128, VR128, |
| 130666 | /* VPBROADCASTDYrm */ |
| 130667 | VR256, i32mem, |
| 130668 | /* VPBROADCASTDYrr */ |
| 130669 | VR256, VR128, |
| 130670 | /* VPBROADCASTDZ128rm */ |
| 130671 | VR128X, i32mem, |
| 130672 | /* VPBROADCASTDZ128rmk */ |
| 130673 | VR128X, VR128X, VK4WM, i32mem, |
| 130674 | /* VPBROADCASTDZ128rmkz */ |
| 130675 | VR128X, VK4WM, i32mem, |
| 130676 | /* VPBROADCASTDZ128rr */ |
| 130677 | VR128X, VR128X, |
| 130678 | /* VPBROADCASTDZ128rrk */ |
| 130679 | VR128X, VR128X, VK4WM, VR128X, |
| 130680 | /* VPBROADCASTDZ128rrkz */ |
| 130681 | VR128X, VK4WM, VR128X, |
| 130682 | /* VPBROADCASTDZ256rm */ |
| 130683 | VR256X, i32mem, |
| 130684 | /* VPBROADCASTDZ256rmk */ |
| 130685 | VR256X, VR256X, VK8WM, i32mem, |
| 130686 | /* VPBROADCASTDZ256rmkz */ |
| 130687 | VR256X, VK8WM, i32mem, |
| 130688 | /* VPBROADCASTDZ256rr */ |
| 130689 | VR256X, VR128X, |
| 130690 | /* VPBROADCASTDZ256rrk */ |
| 130691 | VR256X, VR256X, VK8WM, VR128X, |
| 130692 | /* VPBROADCASTDZ256rrkz */ |
| 130693 | VR256X, VK8WM, VR128X, |
| 130694 | /* VPBROADCASTDZrm */ |
| 130695 | VR512, i32mem, |
| 130696 | /* VPBROADCASTDZrmk */ |
| 130697 | VR512, VR512, VK16WM, i32mem, |
| 130698 | /* VPBROADCASTDZrmkz */ |
| 130699 | VR512, VK16WM, i32mem, |
| 130700 | /* VPBROADCASTDZrr */ |
| 130701 | VR512, VR128X, |
| 130702 | /* VPBROADCASTDZrrk */ |
| 130703 | VR512, VR512, VK16WM, VR128X, |
| 130704 | /* VPBROADCASTDZrrkz */ |
| 130705 | VR512, VK16WM, VR128X, |
| 130706 | /* VPBROADCASTDrZ128rr */ |
| 130707 | VR128X, GR32, |
| 130708 | /* VPBROADCASTDrZ128rrk */ |
| 130709 | VR128X, VR128X, VK4WM, GR32, |
| 130710 | /* VPBROADCASTDrZ128rrkz */ |
| 130711 | VR128X, VK4WM, GR32, |
| 130712 | /* VPBROADCASTDrZ256rr */ |
| 130713 | VR256X, GR32, |
| 130714 | /* VPBROADCASTDrZ256rrk */ |
| 130715 | VR256X, VR256X, VK8WM, GR32, |
| 130716 | /* VPBROADCASTDrZ256rrkz */ |
| 130717 | VR256X, VK8WM, GR32, |
| 130718 | /* VPBROADCASTDrZrr */ |
| 130719 | VR512, GR32, |
| 130720 | /* VPBROADCASTDrZrrk */ |
| 130721 | VR512, VR512, VK16WM, GR32, |
| 130722 | /* VPBROADCASTDrZrrkz */ |
| 130723 | VR512, VK16WM, GR32, |
| 130724 | /* VPBROADCASTDrm */ |
| 130725 | VR128, i32mem, |
| 130726 | /* VPBROADCASTDrr */ |
| 130727 | VR128, VR128, |
| 130728 | /* VPBROADCASTMB2QZ128rr */ |
| 130729 | VR128X, VK8, |
| 130730 | /* VPBROADCASTMB2QZ256rr */ |
| 130731 | VR256X, VK8, |
| 130732 | /* VPBROADCASTMB2QZrr */ |
| 130733 | VR512, VK8, |
| 130734 | /* VPBROADCASTMW2DZ128rr */ |
| 130735 | VR128X, VK16, |
| 130736 | /* VPBROADCASTMW2DZ256rr */ |
| 130737 | VR256X, VK16, |
| 130738 | /* VPBROADCASTMW2DZrr */ |
| 130739 | VR512, VK16, |
| 130740 | /* VPBROADCASTQYrm */ |
| 130741 | VR256, i64mem, |
| 130742 | /* VPBROADCASTQYrr */ |
| 130743 | VR256, VR128, |
| 130744 | /* VPBROADCASTQZ128rm */ |
| 130745 | VR128X, i64mem, |
| 130746 | /* VPBROADCASTQZ128rmk */ |
| 130747 | VR128X, VR128X, VK2WM, i64mem, |
| 130748 | /* VPBROADCASTQZ128rmkz */ |
| 130749 | VR128X, VK2WM, i64mem, |
| 130750 | /* VPBROADCASTQZ128rr */ |
| 130751 | VR128X, VR128X, |
| 130752 | /* VPBROADCASTQZ128rrk */ |
| 130753 | VR128X, VR128X, VK2WM, VR128X, |
| 130754 | /* VPBROADCASTQZ128rrkz */ |
| 130755 | VR128X, VK2WM, VR128X, |
| 130756 | /* VPBROADCASTQZ256rm */ |
| 130757 | VR256X, i64mem, |
| 130758 | /* VPBROADCASTQZ256rmk */ |
| 130759 | VR256X, VR256X, VK4WM, i64mem, |
| 130760 | /* VPBROADCASTQZ256rmkz */ |
| 130761 | VR256X, VK4WM, i64mem, |
| 130762 | /* VPBROADCASTQZ256rr */ |
| 130763 | VR256X, VR128X, |
| 130764 | /* VPBROADCASTQZ256rrk */ |
| 130765 | VR256X, VR256X, VK4WM, VR128X, |
| 130766 | /* VPBROADCASTQZ256rrkz */ |
| 130767 | VR256X, VK4WM, VR128X, |
| 130768 | /* VPBROADCASTQZrm */ |
| 130769 | VR512, i64mem, |
| 130770 | /* VPBROADCASTQZrmk */ |
| 130771 | VR512, VR512, VK8WM, i64mem, |
| 130772 | /* VPBROADCASTQZrmkz */ |
| 130773 | VR512, VK8WM, i64mem, |
| 130774 | /* VPBROADCASTQZrr */ |
| 130775 | VR512, VR128X, |
| 130776 | /* VPBROADCASTQZrrk */ |
| 130777 | VR512, VR512, VK8WM, VR128X, |
| 130778 | /* VPBROADCASTQZrrkz */ |
| 130779 | VR512, VK8WM, VR128X, |
| 130780 | /* VPBROADCASTQrZ128rr */ |
| 130781 | VR128X, GR64, |
| 130782 | /* VPBROADCASTQrZ128rrk */ |
| 130783 | VR128X, VR128X, VK2WM, GR64, |
| 130784 | /* VPBROADCASTQrZ128rrkz */ |
| 130785 | VR128X, VK2WM, GR64, |
| 130786 | /* VPBROADCASTQrZ256rr */ |
| 130787 | VR256X, GR64, |
| 130788 | /* VPBROADCASTQrZ256rrk */ |
| 130789 | VR256X, VR256X, VK4WM, GR64, |
| 130790 | /* VPBROADCASTQrZ256rrkz */ |
| 130791 | VR256X, VK4WM, GR64, |
| 130792 | /* VPBROADCASTQrZrr */ |
| 130793 | VR512, GR64, |
| 130794 | /* VPBROADCASTQrZrrk */ |
| 130795 | VR512, VR512, VK8WM, GR64, |
| 130796 | /* VPBROADCASTQrZrrkz */ |
| 130797 | VR512, VK8WM, GR64, |
| 130798 | /* VPBROADCASTQrm */ |
| 130799 | VR128, i64mem, |
| 130800 | /* VPBROADCASTQrr */ |
| 130801 | VR128, VR128, |
| 130802 | /* VPBROADCASTWYrm */ |
| 130803 | VR256, i16mem, |
| 130804 | /* VPBROADCASTWYrr */ |
| 130805 | VR256, VR128, |
| 130806 | /* VPBROADCASTWZ128rm */ |
| 130807 | VR128X, i16mem, |
| 130808 | /* VPBROADCASTWZ128rmk */ |
| 130809 | VR128X, VR128X, VK8WM, i16mem, |
| 130810 | /* VPBROADCASTWZ128rmkz */ |
| 130811 | VR128X, VK8WM, i16mem, |
| 130812 | /* VPBROADCASTWZ128rr */ |
| 130813 | VR128X, VR128X, |
| 130814 | /* VPBROADCASTWZ128rrk */ |
| 130815 | VR128X, VR128X, VK8WM, VR128X, |
| 130816 | /* VPBROADCASTWZ128rrkz */ |
| 130817 | VR128X, VK8WM, VR128X, |
| 130818 | /* VPBROADCASTWZ256rm */ |
| 130819 | VR256X, i16mem, |
| 130820 | /* VPBROADCASTWZ256rmk */ |
| 130821 | VR256X, VR256X, VK16WM, i16mem, |
| 130822 | /* VPBROADCASTWZ256rmkz */ |
| 130823 | VR256X, VK16WM, i16mem, |
| 130824 | /* VPBROADCASTWZ256rr */ |
| 130825 | VR256X, VR128X, |
| 130826 | /* VPBROADCASTWZ256rrk */ |
| 130827 | VR256X, VR256X, VK16WM, VR128X, |
| 130828 | /* VPBROADCASTWZ256rrkz */ |
| 130829 | VR256X, VK16WM, VR128X, |
| 130830 | /* VPBROADCASTWZrm */ |
| 130831 | VR512, i16mem, |
| 130832 | /* VPBROADCASTWZrmk */ |
| 130833 | VR512, VR512, VK32WM, i16mem, |
| 130834 | /* VPBROADCASTWZrmkz */ |
| 130835 | VR512, VK32WM, i16mem, |
| 130836 | /* VPBROADCASTWZrr */ |
| 130837 | VR512, VR128X, |
| 130838 | /* VPBROADCASTWZrrk */ |
| 130839 | VR512, VR512, VK32WM, VR128X, |
| 130840 | /* VPBROADCASTWZrrkz */ |
| 130841 | VR512, VK32WM, VR128X, |
| 130842 | /* VPBROADCASTWrZ128rr */ |
| 130843 | VR128X, GR32, |
| 130844 | /* VPBROADCASTWrZ128rrk */ |
| 130845 | VR128X, VR128X, VK8WM, GR32, |
| 130846 | /* VPBROADCASTWrZ128rrkz */ |
| 130847 | VR128X, VK8WM, GR32, |
| 130848 | /* VPBROADCASTWrZ256rr */ |
| 130849 | VR256X, GR32, |
| 130850 | /* VPBROADCASTWrZ256rrk */ |
| 130851 | VR256X, VR256X, VK16WM, GR32, |
| 130852 | /* VPBROADCASTWrZ256rrkz */ |
| 130853 | VR256X, VK16WM, GR32, |
| 130854 | /* VPBROADCASTWrZrr */ |
| 130855 | VR512, GR32, |
| 130856 | /* VPBROADCASTWrZrrk */ |
| 130857 | VR512, VR512, VK32WM, GR32, |
| 130858 | /* VPBROADCASTWrZrrkz */ |
| 130859 | VR512, VK32WM, GR32, |
| 130860 | /* VPBROADCASTWrm */ |
| 130861 | VR128, i16mem, |
| 130862 | /* VPBROADCASTWrr */ |
| 130863 | VR128, VR128, |
| 130864 | /* VPCLMULQDQYrmi */ |
| 130865 | VR256, VR256, i256mem, u8imm, |
| 130866 | /* VPCLMULQDQYrri */ |
| 130867 | VR256, VR256, VR256, u8imm, |
| 130868 | /* VPCLMULQDQZ128rmi */ |
| 130869 | VR128X, VR128X, i128mem, u8imm, |
| 130870 | /* VPCLMULQDQZ128rri */ |
| 130871 | VR128X, VR128X, VR128X, u8imm, |
| 130872 | /* VPCLMULQDQZ256rmi */ |
| 130873 | VR256X, VR256X, i256mem, u8imm, |
| 130874 | /* VPCLMULQDQZ256rri */ |
| 130875 | VR256X, VR256X, VR256X, u8imm, |
| 130876 | /* VPCLMULQDQZrmi */ |
| 130877 | VR512, VR512, i512mem, u8imm, |
| 130878 | /* VPCLMULQDQZrri */ |
| 130879 | VR512, VR512, VR512, u8imm, |
| 130880 | /* VPCLMULQDQrmi */ |
| 130881 | VR128, VR128, i128mem, u8imm, |
| 130882 | /* VPCLMULQDQrri */ |
| 130883 | VR128, VR128, VR128, u8imm, |
| 130884 | /* VPCMOVYrmr */ |
| 130885 | VR256, VR256, i256mem, VR256, |
| 130886 | /* VPCMOVYrrm */ |
| 130887 | VR256, VR256, VR256, i256mem, |
| 130888 | /* VPCMOVYrrr */ |
| 130889 | VR256, VR256, VR256, VR256, |
| 130890 | /* VPCMOVYrrr_REV */ |
| 130891 | VR256, VR256, VR256, VR256, |
| 130892 | /* VPCMOVrmr */ |
| 130893 | VR128, VR128, i128mem, VR128, |
| 130894 | /* VPCMOVrrm */ |
| 130895 | VR128, VR128, VR128, i128mem, |
| 130896 | /* VPCMOVrrr */ |
| 130897 | VR128, VR128, VR128, VR128, |
| 130898 | /* VPCMOVrrr_REV */ |
| 130899 | VR128, VR128, VR128, VR128, |
| 130900 | /* VPCMPBZ128rmi */ |
| 130901 | VK16, VR128X, i128mem, u8imm, |
| 130902 | /* VPCMPBZ128rmik */ |
| 130903 | VK16, VK16WM, VR128X, i128mem, u8imm, |
| 130904 | /* VPCMPBZ128rri */ |
| 130905 | VK16, VR128X, VR128X, u8imm, |
| 130906 | /* VPCMPBZ128rrik */ |
| 130907 | VK16, VK16WM, VR128X, VR128X, u8imm, |
| 130908 | /* VPCMPBZ256rmi */ |
| 130909 | VK32, VR256X, i256mem, u8imm, |
| 130910 | /* VPCMPBZ256rmik */ |
| 130911 | VK32, VK32WM, VR256X, i256mem, u8imm, |
| 130912 | /* VPCMPBZ256rri */ |
| 130913 | VK32, VR256X, VR256X, u8imm, |
| 130914 | /* VPCMPBZ256rrik */ |
| 130915 | VK32, VK32WM, VR256X, VR256X, u8imm, |
| 130916 | /* VPCMPBZrmi */ |
| 130917 | VK64, VR512, i512mem, u8imm, |
| 130918 | /* VPCMPBZrmik */ |
| 130919 | VK64, VK64WM, VR512, i512mem, u8imm, |
| 130920 | /* VPCMPBZrri */ |
| 130921 | VK64, VR512, VR512, u8imm, |
| 130922 | /* VPCMPBZrrik */ |
| 130923 | VK64, VK64WM, VR512, VR512, u8imm, |
| 130924 | /* VPCMPDZ128rmi */ |
| 130925 | VK4, VR128X, i128mem, u8imm, |
| 130926 | /* VPCMPDZ128rmib */ |
| 130927 | VK4, VR128X, i32mem, u8imm, |
| 130928 | /* VPCMPDZ128rmibk */ |
| 130929 | VK4, VK4WM, VR128X, i32mem, u8imm, |
| 130930 | /* VPCMPDZ128rmik */ |
| 130931 | VK4, VK4WM, VR128X, i128mem, u8imm, |
| 130932 | /* VPCMPDZ128rri */ |
| 130933 | VK4, VR128X, VR128X, u8imm, |
| 130934 | /* VPCMPDZ128rrik */ |
| 130935 | VK4, VK4WM, VR128X, VR128X, u8imm, |
| 130936 | /* VPCMPDZ256rmi */ |
| 130937 | VK8, VR256X, i256mem, u8imm, |
| 130938 | /* VPCMPDZ256rmib */ |
| 130939 | VK8, VR256X, i32mem, u8imm, |
| 130940 | /* VPCMPDZ256rmibk */ |
| 130941 | VK8, VK8WM, VR256X, i32mem, u8imm, |
| 130942 | /* VPCMPDZ256rmik */ |
| 130943 | VK8, VK8WM, VR256X, i256mem, u8imm, |
| 130944 | /* VPCMPDZ256rri */ |
| 130945 | VK8, VR256X, VR256X, u8imm, |
| 130946 | /* VPCMPDZ256rrik */ |
| 130947 | VK8, VK8WM, VR256X, VR256X, u8imm, |
| 130948 | /* VPCMPDZrmi */ |
| 130949 | VK16, VR512, i512mem, u8imm, |
| 130950 | /* VPCMPDZrmib */ |
| 130951 | VK16, VR512, i32mem, u8imm, |
| 130952 | /* VPCMPDZrmibk */ |
| 130953 | VK16, VK16WM, VR512, i32mem, u8imm, |
| 130954 | /* VPCMPDZrmik */ |
| 130955 | VK16, VK16WM, VR512, i512mem, u8imm, |
| 130956 | /* VPCMPDZrri */ |
| 130957 | VK16, VR512, VR512, u8imm, |
| 130958 | /* VPCMPDZrrik */ |
| 130959 | VK16, VK16WM, VR512, VR512, u8imm, |
| 130960 | /* VPCMPEQBYrm */ |
| 130961 | VR256, VR256, i256mem, |
| 130962 | /* VPCMPEQBYrr */ |
| 130963 | VR256, VR256, VR256, |
| 130964 | /* VPCMPEQBZ128rm */ |
| 130965 | VK16, VR128X, i128mem, |
| 130966 | /* VPCMPEQBZ128rmk */ |
| 130967 | VK16, VK16WM, VR128X, i128mem, |
| 130968 | /* VPCMPEQBZ128rr */ |
| 130969 | VK16, VR128X, VR128X, |
| 130970 | /* VPCMPEQBZ128rrk */ |
| 130971 | VK16, VK16WM, VR128X, VR128X, |
| 130972 | /* VPCMPEQBZ256rm */ |
| 130973 | VK32, VR256X, i256mem, |
| 130974 | /* VPCMPEQBZ256rmk */ |
| 130975 | VK32, VK32WM, VR256X, i256mem, |
| 130976 | /* VPCMPEQBZ256rr */ |
| 130977 | VK32, VR256X, VR256X, |
| 130978 | /* VPCMPEQBZ256rrk */ |
| 130979 | VK32, VK32WM, VR256X, VR256X, |
| 130980 | /* VPCMPEQBZrm */ |
| 130981 | VK64, VR512, i512mem, |
| 130982 | /* VPCMPEQBZrmk */ |
| 130983 | VK64, VK64WM, VR512, i512mem, |
| 130984 | /* VPCMPEQBZrr */ |
| 130985 | VK64, VR512, VR512, |
| 130986 | /* VPCMPEQBZrrk */ |
| 130987 | VK64, VK64WM, VR512, VR512, |
| 130988 | /* VPCMPEQBrm */ |
| 130989 | VR128, VR128, i128mem, |
| 130990 | /* VPCMPEQBrr */ |
| 130991 | VR128, VR128, VR128, |
| 130992 | /* VPCMPEQDYrm */ |
| 130993 | VR256, VR256, i256mem, |
| 130994 | /* VPCMPEQDYrr */ |
| 130995 | VR256, VR256, VR256, |
| 130996 | /* VPCMPEQDZ128rm */ |
| 130997 | VK4, VR128X, i128mem, |
| 130998 | /* VPCMPEQDZ128rmb */ |
| 130999 | VK4, VR128X, i32mem, |
| 131000 | /* VPCMPEQDZ128rmbk */ |
| 131001 | VK4, VK4WM, VR128X, i32mem, |
| 131002 | /* VPCMPEQDZ128rmk */ |
| 131003 | VK4, VK4WM, VR128X, i128mem, |
| 131004 | /* VPCMPEQDZ128rr */ |
| 131005 | VK4, VR128X, VR128X, |
| 131006 | /* VPCMPEQDZ128rrk */ |
| 131007 | VK4, VK4WM, VR128X, VR128X, |
| 131008 | /* VPCMPEQDZ256rm */ |
| 131009 | VK8, VR256X, i256mem, |
| 131010 | /* VPCMPEQDZ256rmb */ |
| 131011 | VK8, VR256X, i32mem, |
| 131012 | /* VPCMPEQDZ256rmbk */ |
| 131013 | VK8, VK8WM, VR256X, i32mem, |
| 131014 | /* VPCMPEQDZ256rmk */ |
| 131015 | VK8, VK8WM, VR256X, i256mem, |
| 131016 | /* VPCMPEQDZ256rr */ |
| 131017 | VK8, VR256X, VR256X, |
| 131018 | /* VPCMPEQDZ256rrk */ |
| 131019 | VK8, VK8WM, VR256X, VR256X, |
| 131020 | /* VPCMPEQDZrm */ |
| 131021 | VK16, VR512, i512mem, |
| 131022 | /* VPCMPEQDZrmb */ |
| 131023 | VK16, VR512, i32mem, |
| 131024 | /* VPCMPEQDZrmbk */ |
| 131025 | VK16, VK16WM, VR512, i32mem, |
| 131026 | /* VPCMPEQDZrmk */ |
| 131027 | VK16, VK16WM, VR512, i512mem, |
| 131028 | /* VPCMPEQDZrr */ |
| 131029 | VK16, VR512, VR512, |
| 131030 | /* VPCMPEQDZrrk */ |
| 131031 | VK16, VK16WM, VR512, VR512, |
| 131032 | /* VPCMPEQDrm */ |
| 131033 | VR128, VR128, i128mem, |
| 131034 | /* VPCMPEQDrr */ |
| 131035 | VR128, VR128, VR128, |
| 131036 | /* VPCMPEQQYrm */ |
| 131037 | VR256, VR256, i256mem, |
| 131038 | /* VPCMPEQQYrr */ |
| 131039 | VR256, VR256, VR256, |
| 131040 | /* VPCMPEQQZ128rm */ |
| 131041 | VK2, VR128X, i128mem, |
| 131042 | /* VPCMPEQQZ128rmb */ |
| 131043 | VK2, VR128X, i64mem, |
| 131044 | /* VPCMPEQQZ128rmbk */ |
| 131045 | VK2, VK2WM, VR128X, i64mem, |
| 131046 | /* VPCMPEQQZ128rmk */ |
| 131047 | VK2, VK2WM, VR128X, i128mem, |
| 131048 | /* VPCMPEQQZ128rr */ |
| 131049 | VK2, VR128X, VR128X, |
| 131050 | /* VPCMPEQQZ128rrk */ |
| 131051 | VK2, VK2WM, VR128X, VR128X, |
| 131052 | /* VPCMPEQQZ256rm */ |
| 131053 | VK4, VR256X, i256mem, |
| 131054 | /* VPCMPEQQZ256rmb */ |
| 131055 | VK4, VR256X, i64mem, |
| 131056 | /* VPCMPEQQZ256rmbk */ |
| 131057 | VK4, VK4WM, VR256X, i64mem, |
| 131058 | /* VPCMPEQQZ256rmk */ |
| 131059 | VK4, VK4WM, VR256X, i256mem, |
| 131060 | /* VPCMPEQQZ256rr */ |
| 131061 | VK4, VR256X, VR256X, |
| 131062 | /* VPCMPEQQZ256rrk */ |
| 131063 | VK4, VK4WM, VR256X, VR256X, |
| 131064 | /* VPCMPEQQZrm */ |
| 131065 | VK8, VR512, i512mem, |
| 131066 | /* VPCMPEQQZrmb */ |
| 131067 | VK8, VR512, i64mem, |
| 131068 | /* VPCMPEQQZrmbk */ |
| 131069 | VK8, VK8WM, VR512, i64mem, |
| 131070 | /* VPCMPEQQZrmk */ |
| 131071 | VK8, VK8WM, VR512, i512mem, |
| 131072 | /* VPCMPEQQZrr */ |
| 131073 | VK8, VR512, VR512, |
| 131074 | /* VPCMPEQQZrrk */ |
| 131075 | VK8, VK8WM, VR512, VR512, |
| 131076 | /* VPCMPEQQrm */ |
| 131077 | VR128, VR128, i128mem, |
| 131078 | /* VPCMPEQQrr */ |
| 131079 | VR128, VR128, VR128, |
| 131080 | /* VPCMPEQWYrm */ |
| 131081 | VR256, VR256, i256mem, |
| 131082 | /* VPCMPEQWYrr */ |
| 131083 | VR256, VR256, VR256, |
| 131084 | /* VPCMPEQWZ128rm */ |
| 131085 | VK8, VR128X, i128mem, |
| 131086 | /* VPCMPEQWZ128rmk */ |
| 131087 | VK8, VK8WM, VR128X, i128mem, |
| 131088 | /* VPCMPEQWZ128rr */ |
| 131089 | VK8, VR128X, VR128X, |
| 131090 | /* VPCMPEQWZ128rrk */ |
| 131091 | VK8, VK8WM, VR128X, VR128X, |
| 131092 | /* VPCMPEQWZ256rm */ |
| 131093 | VK16, VR256X, i256mem, |
| 131094 | /* VPCMPEQWZ256rmk */ |
| 131095 | VK16, VK16WM, VR256X, i256mem, |
| 131096 | /* VPCMPEQWZ256rr */ |
| 131097 | VK16, VR256X, VR256X, |
| 131098 | /* VPCMPEQWZ256rrk */ |
| 131099 | VK16, VK16WM, VR256X, VR256X, |
| 131100 | /* VPCMPEQWZrm */ |
| 131101 | VK32, VR512, i512mem, |
| 131102 | /* VPCMPEQWZrmk */ |
| 131103 | VK32, VK32WM, VR512, i512mem, |
| 131104 | /* VPCMPEQWZrr */ |
| 131105 | VK32, VR512, VR512, |
| 131106 | /* VPCMPEQWZrrk */ |
| 131107 | VK32, VK32WM, VR512, VR512, |
| 131108 | /* VPCMPEQWrm */ |
| 131109 | VR128, VR128, i128mem, |
| 131110 | /* VPCMPEQWrr */ |
| 131111 | VR128, VR128, VR128, |
| 131112 | /* VPCMPESTRIrmi */ |
| 131113 | VR128, i128mem, u8imm, |
| 131114 | /* VPCMPESTRIrri */ |
| 131115 | VR128, VR128, u8imm, |
| 131116 | /* VPCMPESTRMrmi */ |
| 131117 | VR128, i128mem, u8imm, |
| 131118 | /* VPCMPESTRMrri */ |
| 131119 | VR128, VR128, u8imm, |
| 131120 | /* VPCMPGTBYrm */ |
| 131121 | VR256, VR256, i256mem, |
| 131122 | /* VPCMPGTBYrr */ |
| 131123 | VR256, VR256, VR256, |
| 131124 | /* VPCMPGTBZ128rm */ |
| 131125 | VK16, VR128X, i128mem, |
| 131126 | /* VPCMPGTBZ128rmk */ |
| 131127 | VK16, VK16WM, VR128X, i128mem, |
| 131128 | /* VPCMPGTBZ128rr */ |
| 131129 | VK16, VR128X, VR128X, |
| 131130 | /* VPCMPGTBZ128rrk */ |
| 131131 | VK16, VK16WM, VR128X, VR128X, |
| 131132 | /* VPCMPGTBZ256rm */ |
| 131133 | VK32, VR256X, i256mem, |
| 131134 | /* VPCMPGTBZ256rmk */ |
| 131135 | VK32, VK32WM, VR256X, i256mem, |
| 131136 | /* VPCMPGTBZ256rr */ |
| 131137 | VK32, VR256X, VR256X, |
| 131138 | /* VPCMPGTBZ256rrk */ |
| 131139 | VK32, VK32WM, VR256X, VR256X, |
| 131140 | /* VPCMPGTBZrm */ |
| 131141 | VK64, VR512, i512mem, |
| 131142 | /* VPCMPGTBZrmk */ |
| 131143 | VK64, VK64WM, VR512, i512mem, |
| 131144 | /* VPCMPGTBZrr */ |
| 131145 | VK64, VR512, VR512, |
| 131146 | /* VPCMPGTBZrrk */ |
| 131147 | VK64, VK64WM, VR512, VR512, |
| 131148 | /* VPCMPGTBrm */ |
| 131149 | VR128, VR128, i128mem, |
| 131150 | /* VPCMPGTBrr */ |
| 131151 | VR128, VR128, VR128, |
| 131152 | /* VPCMPGTDYrm */ |
| 131153 | VR256, VR256, i256mem, |
| 131154 | /* VPCMPGTDYrr */ |
| 131155 | VR256, VR256, VR256, |
| 131156 | /* VPCMPGTDZ128rm */ |
| 131157 | VK4, VR128X, i128mem, |
| 131158 | /* VPCMPGTDZ128rmb */ |
| 131159 | VK4, VR128X, i32mem, |
| 131160 | /* VPCMPGTDZ128rmbk */ |
| 131161 | VK4, VK4WM, VR128X, i32mem, |
| 131162 | /* VPCMPGTDZ128rmk */ |
| 131163 | VK4, VK4WM, VR128X, i128mem, |
| 131164 | /* VPCMPGTDZ128rr */ |
| 131165 | VK4, VR128X, VR128X, |
| 131166 | /* VPCMPGTDZ128rrk */ |
| 131167 | VK4, VK4WM, VR128X, VR128X, |
| 131168 | /* VPCMPGTDZ256rm */ |
| 131169 | VK8, VR256X, i256mem, |
| 131170 | /* VPCMPGTDZ256rmb */ |
| 131171 | VK8, VR256X, i32mem, |
| 131172 | /* VPCMPGTDZ256rmbk */ |
| 131173 | VK8, VK8WM, VR256X, i32mem, |
| 131174 | /* VPCMPGTDZ256rmk */ |
| 131175 | VK8, VK8WM, VR256X, i256mem, |
| 131176 | /* VPCMPGTDZ256rr */ |
| 131177 | VK8, VR256X, VR256X, |
| 131178 | /* VPCMPGTDZ256rrk */ |
| 131179 | VK8, VK8WM, VR256X, VR256X, |
| 131180 | /* VPCMPGTDZrm */ |
| 131181 | VK16, VR512, i512mem, |
| 131182 | /* VPCMPGTDZrmb */ |
| 131183 | VK16, VR512, i32mem, |
| 131184 | /* VPCMPGTDZrmbk */ |
| 131185 | VK16, VK16WM, VR512, i32mem, |
| 131186 | /* VPCMPGTDZrmk */ |
| 131187 | VK16, VK16WM, VR512, i512mem, |
| 131188 | /* VPCMPGTDZrr */ |
| 131189 | VK16, VR512, VR512, |
| 131190 | /* VPCMPGTDZrrk */ |
| 131191 | VK16, VK16WM, VR512, VR512, |
| 131192 | /* VPCMPGTDrm */ |
| 131193 | VR128, VR128, i128mem, |
| 131194 | /* VPCMPGTDrr */ |
| 131195 | VR128, VR128, VR128, |
| 131196 | /* VPCMPGTQYrm */ |
| 131197 | VR256, VR256, i256mem, |
| 131198 | /* VPCMPGTQYrr */ |
| 131199 | VR256, VR256, VR256, |
| 131200 | /* VPCMPGTQZ128rm */ |
| 131201 | VK2, VR128X, i128mem, |
| 131202 | /* VPCMPGTQZ128rmb */ |
| 131203 | VK2, VR128X, i64mem, |
| 131204 | /* VPCMPGTQZ128rmbk */ |
| 131205 | VK2, VK2WM, VR128X, i64mem, |
| 131206 | /* VPCMPGTQZ128rmk */ |
| 131207 | VK2, VK2WM, VR128X, i128mem, |
| 131208 | /* VPCMPGTQZ128rr */ |
| 131209 | VK2, VR128X, VR128X, |
| 131210 | /* VPCMPGTQZ128rrk */ |
| 131211 | VK2, VK2WM, VR128X, VR128X, |
| 131212 | /* VPCMPGTQZ256rm */ |
| 131213 | VK4, VR256X, i256mem, |
| 131214 | /* VPCMPGTQZ256rmb */ |
| 131215 | VK4, VR256X, i64mem, |
| 131216 | /* VPCMPGTQZ256rmbk */ |
| 131217 | VK4, VK4WM, VR256X, i64mem, |
| 131218 | /* VPCMPGTQZ256rmk */ |
| 131219 | VK4, VK4WM, VR256X, i256mem, |
| 131220 | /* VPCMPGTQZ256rr */ |
| 131221 | VK4, VR256X, VR256X, |
| 131222 | /* VPCMPGTQZ256rrk */ |
| 131223 | VK4, VK4WM, VR256X, VR256X, |
| 131224 | /* VPCMPGTQZrm */ |
| 131225 | VK8, VR512, i512mem, |
| 131226 | /* VPCMPGTQZrmb */ |
| 131227 | VK8, VR512, i64mem, |
| 131228 | /* VPCMPGTQZrmbk */ |
| 131229 | VK8, VK8WM, VR512, i64mem, |
| 131230 | /* VPCMPGTQZrmk */ |
| 131231 | VK8, VK8WM, VR512, i512mem, |
| 131232 | /* VPCMPGTQZrr */ |
| 131233 | VK8, VR512, VR512, |
| 131234 | /* VPCMPGTQZrrk */ |
| 131235 | VK8, VK8WM, VR512, VR512, |
| 131236 | /* VPCMPGTQrm */ |
| 131237 | VR128, VR128, i128mem, |
| 131238 | /* VPCMPGTQrr */ |
| 131239 | VR128, VR128, VR128, |
| 131240 | /* VPCMPGTWYrm */ |
| 131241 | VR256, VR256, i256mem, |
| 131242 | /* VPCMPGTWYrr */ |
| 131243 | VR256, VR256, VR256, |
| 131244 | /* VPCMPGTWZ128rm */ |
| 131245 | VK8, VR128X, i128mem, |
| 131246 | /* VPCMPGTWZ128rmk */ |
| 131247 | VK8, VK8WM, VR128X, i128mem, |
| 131248 | /* VPCMPGTWZ128rr */ |
| 131249 | VK8, VR128X, VR128X, |
| 131250 | /* VPCMPGTWZ128rrk */ |
| 131251 | VK8, VK8WM, VR128X, VR128X, |
| 131252 | /* VPCMPGTWZ256rm */ |
| 131253 | VK16, VR256X, i256mem, |
| 131254 | /* VPCMPGTWZ256rmk */ |
| 131255 | VK16, VK16WM, VR256X, i256mem, |
| 131256 | /* VPCMPGTWZ256rr */ |
| 131257 | VK16, VR256X, VR256X, |
| 131258 | /* VPCMPGTWZ256rrk */ |
| 131259 | VK16, VK16WM, VR256X, VR256X, |
| 131260 | /* VPCMPGTWZrm */ |
| 131261 | VK32, VR512, i512mem, |
| 131262 | /* VPCMPGTWZrmk */ |
| 131263 | VK32, VK32WM, VR512, i512mem, |
| 131264 | /* VPCMPGTWZrr */ |
| 131265 | VK32, VR512, VR512, |
| 131266 | /* VPCMPGTWZrrk */ |
| 131267 | VK32, VK32WM, VR512, VR512, |
| 131268 | /* VPCMPGTWrm */ |
| 131269 | VR128, VR128, i128mem, |
| 131270 | /* VPCMPGTWrr */ |
| 131271 | VR128, VR128, VR128, |
| 131272 | /* VPCMPISTRIrmi */ |
| 131273 | VR128, i128mem, u8imm, |
| 131274 | /* VPCMPISTRIrri */ |
| 131275 | VR128, VR128, u8imm, |
| 131276 | /* VPCMPISTRMrmi */ |
| 131277 | VR128, i128mem, u8imm, |
| 131278 | /* VPCMPISTRMrri */ |
| 131279 | VR128, VR128, u8imm, |
| 131280 | /* VPCMPQZ128rmi */ |
| 131281 | VK2, VR128X, i128mem, u8imm, |
| 131282 | /* VPCMPQZ128rmib */ |
| 131283 | VK2, VR128X, i64mem, u8imm, |
| 131284 | /* VPCMPQZ128rmibk */ |
| 131285 | VK2, VK2WM, VR128X, i64mem, u8imm, |
| 131286 | /* VPCMPQZ128rmik */ |
| 131287 | VK2, VK2WM, VR128X, i128mem, u8imm, |
| 131288 | /* VPCMPQZ128rri */ |
| 131289 | VK2, VR128X, VR128X, u8imm, |
| 131290 | /* VPCMPQZ128rrik */ |
| 131291 | VK2, VK2WM, VR128X, VR128X, u8imm, |
| 131292 | /* VPCMPQZ256rmi */ |
| 131293 | VK4, VR256X, i256mem, u8imm, |
| 131294 | /* VPCMPQZ256rmib */ |
| 131295 | VK4, VR256X, i64mem, u8imm, |
| 131296 | /* VPCMPQZ256rmibk */ |
| 131297 | VK4, VK4WM, VR256X, i64mem, u8imm, |
| 131298 | /* VPCMPQZ256rmik */ |
| 131299 | VK4, VK4WM, VR256X, i256mem, u8imm, |
| 131300 | /* VPCMPQZ256rri */ |
| 131301 | VK4, VR256X, VR256X, u8imm, |
| 131302 | /* VPCMPQZ256rrik */ |
| 131303 | VK4, VK4WM, VR256X, VR256X, u8imm, |
| 131304 | /* VPCMPQZrmi */ |
| 131305 | VK8, VR512, i512mem, u8imm, |
| 131306 | /* VPCMPQZrmib */ |
| 131307 | VK8, VR512, i64mem, u8imm, |
| 131308 | /* VPCMPQZrmibk */ |
| 131309 | VK8, VK8WM, VR512, i64mem, u8imm, |
| 131310 | /* VPCMPQZrmik */ |
| 131311 | VK8, VK8WM, VR512, i512mem, u8imm, |
| 131312 | /* VPCMPQZrri */ |
| 131313 | VK8, VR512, VR512, u8imm, |
| 131314 | /* VPCMPQZrrik */ |
| 131315 | VK8, VK8WM, VR512, VR512, u8imm, |
| 131316 | /* VPCMPUBZ128rmi */ |
| 131317 | VK16, VR128X, i128mem, u8imm, |
| 131318 | /* VPCMPUBZ128rmik */ |
| 131319 | VK16, VK16WM, VR128X, i128mem, u8imm, |
| 131320 | /* VPCMPUBZ128rri */ |
| 131321 | VK16, VR128X, VR128X, u8imm, |
| 131322 | /* VPCMPUBZ128rrik */ |
| 131323 | VK16, VK16WM, VR128X, VR128X, u8imm, |
| 131324 | /* VPCMPUBZ256rmi */ |
| 131325 | VK32, VR256X, i256mem, u8imm, |
| 131326 | /* VPCMPUBZ256rmik */ |
| 131327 | VK32, VK32WM, VR256X, i256mem, u8imm, |
| 131328 | /* VPCMPUBZ256rri */ |
| 131329 | VK32, VR256X, VR256X, u8imm, |
| 131330 | /* VPCMPUBZ256rrik */ |
| 131331 | VK32, VK32WM, VR256X, VR256X, u8imm, |
| 131332 | /* VPCMPUBZrmi */ |
| 131333 | VK64, VR512, i512mem, u8imm, |
| 131334 | /* VPCMPUBZrmik */ |
| 131335 | VK64, VK64WM, VR512, i512mem, u8imm, |
| 131336 | /* VPCMPUBZrri */ |
| 131337 | VK64, VR512, VR512, u8imm, |
| 131338 | /* VPCMPUBZrrik */ |
| 131339 | VK64, VK64WM, VR512, VR512, u8imm, |
| 131340 | /* VPCMPUDZ128rmi */ |
| 131341 | VK4, VR128X, i128mem, u8imm, |
| 131342 | /* VPCMPUDZ128rmib */ |
| 131343 | VK4, VR128X, i32mem, u8imm, |
| 131344 | /* VPCMPUDZ128rmibk */ |
| 131345 | VK4, VK4WM, VR128X, i32mem, u8imm, |
| 131346 | /* VPCMPUDZ128rmik */ |
| 131347 | VK4, VK4WM, VR128X, i128mem, u8imm, |
| 131348 | /* VPCMPUDZ128rri */ |
| 131349 | VK4, VR128X, VR128X, u8imm, |
| 131350 | /* VPCMPUDZ128rrik */ |
| 131351 | VK4, VK4WM, VR128X, VR128X, u8imm, |
| 131352 | /* VPCMPUDZ256rmi */ |
| 131353 | VK8, VR256X, i256mem, u8imm, |
| 131354 | /* VPCMPUDZ256rmib */ |
| 131355 | VK8, VR256X, i32mem, u8imm, |
| 131356 | /* VPCMPUDZ256rmibk */ |
| 131357 | VK8, VK8WM, VR256X, i32mem, u8imm, |
| 131358 | /* VPCMPUDZ256rmik */ |
| 131359 | VK8, VK8WM, VR256X, i256mem, u8imm, |
| 131360 | /* VPCMPUDZ256rri */ |
| 131361 | VK8, VR256X, VR256X, u8imm, |
| 131362 | /* VPCMPUDZ256rrik */ |
| 131363 | VK8, VK8WM, VR256X, VR256X, u8imm, |
| 131364 | /* VPCMPUDZrmi */ |
| 131365 | VK16, VR512, i512mem, u8imm, |
| 131366 | /* VPCMPUDZrmib */ |
| 131367 | VK16, VR512, i32mem, u8imm, |
| 131368 | /* VPCMPUDZrmibk */ |
| 131369 | VK16, VK16WM, VR512, i32mem, u8imm, |
| 131370 | /* VPCMPUDZrmik */ |
| 131371 | VK16, VK16WM, VR512, i512mem, u8imm, |
| 131372 | /* VPCMPUDZrri */ |
| 131373 | VK16, VR512, VR512, u8imm, |
| 131374 | /* VPCMPUDZrrik */ |
| 131375 | VK16, VK16WM, VR512, VR512, u8imm, |
| 131376 | /* VPCMPUQZ128rmi */ |
| 131377 | VK2, VR128X, i128mem, u8imm, |
| 131378 | /* VPCMPUQZ128rmib */ |
| 131379 | VK2, VR128X, i64mem, u8imm, |
| 131380 | /* VPCMPUQZ128rmibk */ |
| 131381 | VK2, VK2WM, VR128X, i64mem, u8imm, |
| 131382 | /* VPCMPUQZ128rmik */ |
| 131383 | VK2, VK2WM, VR128X, i128mem, u8imm, |
| 131384 | /* VPCMPUQZ128rri */ |
| 131385 | VK2, VR128X, VR128X, u8imm, |
| 131386 | /* VPCMPUQZ128rrik */ |
| 131387 | VK2, VK2WM, VR128X, VR128X, u8imm, |
| 131388 | /* VPCMPUQZ256rmi */ |
| 131389 | VK4, VR256X, i256mem, u8imm, |
| 131390 | /* VPCMPUQZ256rmib */ |
| 131391 | VK4, VR256X, i64mem, u8imm, |
| 131392 | /* VPCMPUQZ256rmibk */ |
| 131393 | VK4, VK4WM, VR256X, i64mem, u8imm, |
| 131394 | /* VPCMPUQZ256rmik */ |
| 131395 | VK4, VK4WM, VR256X, i256mem, u8imm, |
| 131396 | /* VPCMPUQZ256rri */ |
| 131397 | VK4, VR256X, VR256X, u8imm, |
| 131398 | /* VPCMPUQZ256rrik */ |
| 131399 | VK4, VK4WM, VR256X, VR256X, u8imm, |
| 131400 | /* VPCMPUQZrmi */ |
| 131401 | VK8, VR512, i512mem, u8imm, |
| 131402 | /* VPCMPUQZrmib */ |
| 131403 | VK8, VR512, i64mem, u8imm, |
| 131404 | /* VPCMPUQZrmibk */ |
| 131405 | VK8, VK8WM, VR512, i64mem, u8imm, |
| 131406 | /* VPCMPUQZrmik */ |
| 131407 | VK8, VK8WM, VR512, i512mem, u8imm, |
| 131408 | /* VPCMPUQZrri */ |
| 131409 | VK8, VR512, VR512, u8imm, |
| 131410 | /* VPCMPUQZrrik */ |
| 131411 | VK8, VK8WM, VR512, VR512, u8imm, |
| 131412 | /* VPCMPUWZ128rmi */ |
| 131413 | VK8, VR128X, i128mem, u8imm, |
| 131414 | /* VPCMPUWZ128rmik */ |
| 131415 | VK8, VK8WM, VR128X, i128mem, u8imm, |
| 131416 | /* VPCMPUWZ128rri */ |
| 131417 | VK8, VR128X, VR128X, u8imm, |
| 131418 | /* VPCMPUWZ128rrik */ |
| 131419 | VK8, VK8WM, VR128X, VR128X, u8imm, |
| 131420 | /* VPCMPUWZ256rmi */ |
| 131421 | VK16, VR256X, i256mem, u8imm, |
| 131422 | /* VPCMPUWZ256rmik */ |
| 131423 | VK16, VK16WM, VR256X, i256mem, u8imm, |
| 131424 | /* VPCMPUWZ256rri */ |
| 131425 | VK16, VR256X, VR256X, u8imm, |
| 131426 | /* VPCMPUWZ256rrik */ |
| 131427 | VK16, VK16WM, VR256X, VR256X, u8imm, |
| 131428 | /* VPCMPUWZrmi */ |
| 131429 | VK32, VR512, i512mem, u8imm, |
| 131430 | /* VPCMPUWZrmik */ |
| 131431 | VK32, VK32WM, VR512, i512mem, u8imm, |
| 131432 | /* VPCMPUWZrri */ |
| 131433 | VK32, VR512, VR512, u8imm, |
| 131434 | /* VPCMPUWZrrik */ |
| 131435 | VK32, VK32WM, VR512, VR512, u8imm, |
| 131436 | /* VPCMPWZ128rmi */ |
| 131437 | VK8, VR128X, i128mem, u8imm, |
| 131438 | /* VPCMPWZ128rmik */ |
| 131439 | VK8, VK8WM, VR128X, i128mem, u8imm, |
| 131440 | /* VPCMPWZ128rri */ |
| 131441 | VK8, VR128X, VR128X, u8imm, |
| 131442 | /* VPCMPWZ128rrik */ |
| 131443 | VK8, VK8WM, VR128X, VR128X, u8imm, |
| 131444 | /* VPCMPWZ256rmi */ |
| 131445 | VK16, VR256X, i256mem, u8imm, |
| 131446 | /* VPCMPWZ256rmik */ |
| 131447 | VK16, VK16WM, VR256X, i256mem, u8imm, |
| 131448 | /* VPCMPWZ256rri */ |
| 131449 | VK16, VR256X, VR256X, u8imm, |
| 131450 | /* VPCMPWZ256rrik */ |
| 131451 | VK16, VK16WM, VR256X, VR256X, u8imm, |
| 131452 | /* VPCMPWZrmi */ |
| 131453 | VK32, VR512, i512mem, u8imm, |
| 131454 | /* VPCMPWZrmik */ |
| 131455 | VK32, VK32WM, VR512, i512mem, u8imm, |
| 131456 | /* VPCMPWZrri */ |
| 131457 | VK32, VR512, VR512, u8imm, |
| 131458 | /* VPCMPWZrrik */ |
| 131459 | VK32, VK32WM, VR512, VR512, u8imm, |
| 131460 | /* VPCOMBmi */ |
| 131461 | VR128, VR128, i128mem, u8imm, |
| 131462 | /* VPCOMBri */ |
| 131463 | VR128, VR128, VR128, u8imm, |
| 131464 | /* VPCOMDmi */ |
| 131465 | VR128, VR128, i128mem, u8imm, |
| 131466 | /* VPCOMDri */ |
| 131467 | VR128, VR128, VR128, u8imm, |
| 131468 | /* VPCOMPRESSBZ128mr */ |
| 131469 | i128mem, VR128X, |
| 131470 | /* VPCOMPRESSBZ128mrk */ |
| 131471 | i128mem, VK16WM, VR128X, |
| 131472 | /* VPCOMPRESSBZ128rr */ |
| 131473 | VR128X, VR128X, |
| 131474 | /* VPCOMPRESSBZ128rrk */ |
| 131475 | VR128X, VR128X, VK16WM, VR128X, |
| 131476 | /* VPCOMPRESSBZ128rrkz */ |
| 131477 | VR128X, VK16WM, VR128X, |
| 131478 | /* VPCOMPRESSBZ256mr */ |
| 131479 | i256mem, VR256X, |
| 131480 | /* VPCOMPRESSBZ256mrk */ |
| 131481 | i256mem, VK32WM, VR256X, |
| 131482 | /* VPCOMPRESSBZ256rr */ |
| 131483 | VR256X, VR256X, |
| 131484 | /* VPCOMPRESSBZ256rrk */ |
| 131485 | VR256X, VR256X, VK32WM, VR256X, |
| 131486 | /* VPCOMPRESSBZ256rrkz */ |
| 131487 | VR256X, VK32WM, VR256X, |
| 131488 | /* VPCOMPRESSBZmr */ |
| 131489 | i512mem, VR512, |
| 131490 | /* VPCOMPRESSBZmrk */ |
| 131491 | i512mem, VK64WM, VR512, |
| 131492 | /* VPCOMPRESSBZrr */ |
| 131493 | VR512, VR512, |
| 131494 | /* VPCOMPRESSBZrrk */ |
| 131495 | VR512, VR512, VK64WM, VR512, |
| 131496 | /* VPCOMPRESSBZrrkz */ |
| 131497 | VR512, VK64WM, VR512, |
| 131498 | /* VPCOMPRESSDZ128mr */ |
| 131499 | i128mem, VR128X, |
| 131500 | /* VPCOMPRESSDZ128mrk */ |
| 131501 | i128mem, VK4WM, VR128X, |
| 131502 | /* VPCOMPRESSDZ128rr */ |
| 131503 | VR128X, VR128X, |
| 131504 | /* VPCOMPRESSDZ128rrk */ |
| 131505 | VR128X, VR128X, VK4WM, VR128X, |
| 131506 | /* VPCOMPRESSDZ128rrkz */ |
| 131507 | VR128X, VK4WM, VR128X, |
| 131508 | /* VPCOMPRESSDZ256mr */ |
| 131509 | i256mem, VR256X, |
| 131510 | /* VPCOMPRESSDZ256mrk */ |
| 131511 | i256mem, VK8WM, VR256X, |
| 131512 | /* VPCOMPRESSDZ256rr */ |
| 131513 | VR256X, VR256X, |
| 131514 | /* VPCOMPRESSDZ256rrk */ |
| 131515 | VR256X, VR256X, VK8WM, VR256X, |
| 131516 | /* VPCOMPRESSDZ256rrkz */ |
| 131517 | VR256X, VK8WM, VR256X, |
| 131518 | /* VPCOMPRESSDZmr */ |
| 131519 | i512mem, VR512, |
| 131520 | /* VPCOMPRESSDZmrk */ |
| 131521 | i512mem, VK16WM, VR512, |
| 131522 | /* VPCOMPRESSDZrr */ |
| 131523 | VR512, VR512, |
| 131524 | /* VPCOMPRESSDZrrk */ |
| 131525 | VR512, VR512, VK16WM, VR512, |
| 131526 | /* VPCOMPRESSDZrrkz */ |
| 131527 | VR512, VK16WM, VR512, |
| 131528 | /* VPCOMPRESSQZ128mr */ |
| 131529 | i128mem, VR128X, |
| 131530 | /* VPCOMPRESSQZ128mrk */ |
| 131531 | i128mem, VK2WM, VR128X, |
| 131532 | /* VPCOMPRESSQZ128rr */ |
| 131533 | VR128X, VR128X, |
| 131534 | /* VPCOMPRESSQZ128rrk */ |
| 131535 | VR128X, VR128X, VK2WM, VR128X, |
| 131536 | /* VPCOMPRESSQZ128rrkz */ |
| 131537 | VR128X, VK2WM, VR128X, |
| 131538 | /* VPCOMPRESSQZ256mr */ |
| 131539 | i256mem, VR256X, |
| 131540 | /* VPCOMPRESSQZ256mrk */ |
| 131541 | i256mem, VK4WM, VR256X, |
| 131542 | /* VPCOMPRESSQZ256rr */ |
| 131543 | VR256X, VR256X, |
| 131544 | /* VPCOMPRESSQZ256rrk */ |
| 131545 | VR256X, VR256X, VK4WM, VR256X, |
| 131546 | /* VPCOMPRESSQZ256rrkz */ |
| 131547 | VR256X, VK4WM, VR256X, |
| 131548 | /* VPCOMPRESSQZmr */ |
| 131549 | i512mem, VR512, |
| 131550 | /* VPCOMPRESSQZmrk */ |
| 131551 | i512mem, VK8WM, VR512, |
| 131552 | /* VPCOMPRESSQZrr */ |
| 131553 | VR512, VR512, |
| 131554 | /* VPCOMPRESSQZrrk */ |
| 131555 | VR512, VR512, VK8WM, VR512, |
| 131556 | /* VPCOMPRESSQZrrkz */ |
| 131557 | VR512, VK8WM, VR512, |
| 131558 | /* VPCOMPRESSWZ128mr */ |
| 131559 | i128mem, VR128X, |
| 131560 | /* VPCOMPRESSWZ128mrk */ |
| 131561 | i128mem, VK8WM, VR128X, |
| 131562 | /* VPCOMPRESSWZ128rr */ |
| 131563 | VR128X, VR128X, |
| 131564 | /* VPCOMPRESSWZ128rrk */ |
| 131565 | VR128X, VR128X, VK8WM, VR128X, |
| 131566 | /* VPCOMPRESSWZ128rrkz */ |
| 131567 | VR128X, VK8WM, VR128X, |
| 131568 | /* VPCOMPRESSWZ256mr */ |
| 131569 | i256mem, VR256X, |
| 131570 | /* VPCOMPRESSWZ256mrk */ |
| 131571 | i256mem, VK16WM, VR256X, |
| 131572 | /* VPCOMPRESSWZ256rr */ |
| 131573 | VR256X, VR256X, |
| 131574 | /* VPCOMPRESSWZ256rrk */ |
| 131575 | VR256X, VR256X, VK16WM, VR256X, |
| 131576 | /* VPCOMPRESSWZ256rrkz */ |
| 131577 | VR256X, VK16WM, VR256X, |
| 131578 | /* VPCOMPRESSWZmr */ |
| 131579 | i512mem, VR512, |
| 131580 | /* VPCOMPRESSWZmrk */ |
| 131581 | i512mem, VK32WM, VR512, |
| 131582 | /* VPCOMPRESSWZrr */ |
| 131583 | VR512, VR512, |
| 131584 | /* VPCOMPRESSWZrrk */ |
| 131585 | VR512, VR512, VK32WM, VR512, |
| 131586 | /* VPCOMPRESSWZrrkz */ |
| 131587 | VR512, VK32WM, VR512, |
| 131588 | /* VPCOMQmi */ |
| 131589 | VR128, VR128, i128mem, u8imm, |
| 131590 | /* VPCOMQri */ |
| 131591 | VR128, VR128, VR128, u8imm, |
| 131592 | /* VPCOMUBmi */ |
| 131593 | VR128, VR128, i128mem, u8imm, |
| 131594 | /* VPCOMUBri */ |
| 131595 | VR128, VR128, VR128, u8imm, |
| 131596 | /* VPCOMUDmi */ |
| 131597 | VR128, VR128, i128mem, u8imm, |
| 131598 | /* VPCOMUDri */ |
| 131599 | VR128, VR128, VR128, u8imm, |
| 131600 | /* VPCOMUQmi */ |
| 131601 | VR128, VR128, i128mem, u8imm, |
| 131602 | /* VPCOMUQri */ |
| 131603 | VR128, VR128, VR128, u8imm, |
| 131604 | /* VPCOMUWmi */ |
| 131605 | VR128, VR128, i128mem, u8imm, |
| 131606 | /* VPCOMUWri */ |
| 131607 | VR128, VR128, VR128, u8imm, |
| 131608 | /* VPCOMWmi */ |
| 131609 | VR128, VR128, i128mem, u8imm, |
| 131610 | /* VPCOMWri */ |
| 131611 | VR128, VR128, VR128, u8imm, |
| 131612 | /* VPCONFLICTDZ128rm */ |
| 131613 | VR128X, i128mem, |
| 131614 | /* VPCONFLICTDZ128rmb */ |
| 131615 | VR128X, i32mem, |
| 131616 | /* VPCONFLICTDZ128rmbk */ |
| 131617 | VR128X, VR128X, VK4WM, i32mem, |
| 131618 | /* VPCONFLICTDZ128rmbkz */ |
| 131619 | VR128X, VK4WM, i32mem, |
| 131620 | /* VPCONFLICTDZ128rmk */ |
| 131621 | VR128X, VR128X, VK4WM, i128mem, |
| 131622 | /* VPCONFLICTDZ128rmkz */ |
| 131623 | VR128X, VK4WM, i128mem, |
| 131624 | /* VPCONFLICTDZ128rr */ |
| 131625 | VR128X, VR128X, |
| 131626 | /* VPCONFLICTDZ128rrk */ |
| 131627 | VR128X, VR128X, VK4WM, VR128X, |
| 131628 | /* VPCONFLICTDZ128rrkz */ |
| 131629 | VR128X, VK4WM, VR128X, |
| 131630 | /* VPCONFLICTDZ256rm */ |
| 131631 | VR256X, i256mem, |
| 131632 | /* VPCONFLICTDZ256rmb */ |
| 131633 | VR256X, i32mem, |
| 131634 | /* VPCONFLICTDZ256rmbk */ |
| 131635 | VR256X, VR256X, VK8WM, i32mem, |
| 131636 | /* VPCONFLICTDZ256rmbkz */ |
| 131637 | VR256X, VK8WM, i32mem, |
| 131638 | /* VPCONFLICTDZ256rmk */ |
| 131639 | VR256X, VR256X, VK8WM, i256mem, |
| 131640 | /* VPCONFLICTDZ256rmkz */ |
| 131641 | VR256X, VK8WM, i256mem, |
| 131642 | /* VPCONFLICTDZ256rr */ |
| 131643 | VR256X, VR256X, |
| 131644 | /* VPCONFLICTDZ256rrk */ |
| 131645 | VR256X, VR256X, VK8WM, VR256X, |
| 131646 | /* VPCONFLICTDZ256rrkz */ |
| 131647 | VR256X, VK8WM, VR256X, |
| 131648 | /* VPCONFLICTDZrm */ |
| 131649 | VR512, i512mem, |
| 131650 | /* VPCONFLICTDZrmb */ |
| 131651 | VR512, i32mem, |
| 131652 | /* VPCONFLICTDZrmbk */ |
| 131653 | VR512, VR512, VK16WM, i32mem, |
| 131654 | /* VPCONFLICTDZrmbkz */ |
| 131655 | VR512, VK16WM, i32mem, |
| 131656 | /* VPCONFLICTDZrmk */ |
| 131657 | VR512, VR512, VK16WM, i512mem, |
| 131658 | /* VPCONFLICTDZrmkz */ |
| 131659 | VR512, VK16WM, i512mem, |
| 131660 | /* VPCONFLICTDZrr */ |
| 131661 | VR512, VR512, |
| 131662 | /* VPCONFLICTDZrrk */ |
| 131663 | VR512, VR512, VK16WM, VR512, |
| 131664 | /* VPCONFLICTDZrrkz */ |
| 131665 | VR512, VK16WM, VR512, |
| 131666 | /* VPCONFLICTQZ128rm */ |
| 131667 | VR128X, i128mem, |
| 131668 | /* VPCONFLICTQZ128rmb */ |
| 131669 | VR128X, i64mem, |
| 131670 | /* VPCONFLICTQZ128rmbk */ |
| 131671 | VR128X, VR128X, VK2WM, i64mem, |
| 131672 | /* VPCONFLICTQZ128rmbkz */ |
| 131673 | VR128X, VK2WM, i64mem, |
| 131674 | /* VPCONFLICTQZ128rmk */ |
| 131675 | VR128X, VR128X, VK2WM, i128mem, |
| 131676 | /* VPCONFLICTQZ128rmkz */ |
| 131677 | VR128X, VK2WM, i128mem, |
| 131678 | /* VPCONFLICTQZ128rr */ |
| 131679 | VR128X, VR128X, |
| 131680 | /* VPCONFLICTQZ128rrk */ |
| 131681 | VR128X, VR128X, VK2WM, VR128X, |
| 131682 | /* VPCONFLICTQZ128rrkz */ |
| 131683 | VR128X, VK2WM, VR128X, |
| 131684 | /* VPCONFLICTQZ256rm */ |
| 131685 | VR256X, i256mem, |
| 131686 | /* VPCONFLICTQZ256rmb */ |
| 131687 | VR256X, i64mem, |
| 131688 | /* VPCONFLICTQZ256rmbk */ |
| 131689 | VR256X, VR256X, VK4WM, i64mem, |
| 131690 | /* VPCONFLICTQZ256rmbkz */ |
| 131691 | VR256X, VK4WM, i64mem, |
| 131692 | /* VPCONFLICTQZ256rmk */ |
| 131693 | VR256X, VR256X, VK4WM, i256mem, |
| 131694 | /* VPCONFLICTQZ256rmkz */ |
| 131695 | VR256X, VK4WM, i256mem, |
| 131696 | /* VPCONFLICTQZ256rr */ |
| 131697 | VR256X, VR256X, |
| 131698 | /* VPCONFLICTQZ256rrk */ |
| 131699 | VR256X, VR256X, VK4WM, VR256X, |
| 131700 | /* VPCONFLICTQZ256rrkz */ |
| 131701 | VR256X, VK4WM, VR256X, |
| 131702 | /* VPCONFLICTQZrm */ |
| 131703 | VR512, i512mem, |
| 131704 | /* VPCONFLICTQZrmb */ |
| 131705 | VR512, i64mem, |
| 131706 | /* VPCONFLICTQZrmbk */ |
| 131707 | VR512, VR512, VK8WM, i64mem, |
| 131708 | /* VPCONFLICTQZrmbkz */ |
| 131709 | VR512, VK8WM, i64mem, |
| 131710 | /* VPCONFLICTQZrmk */ |
| 131711 | VR512, VR512, VK8WM, i512mem, |
| 131712 | /* VPCONFLICTQZrmkz */ |
| 131713 | VR512, VK8WM, i512mem, |
| 131714 | /* VPCONFLICTQZrr */ |
| 131715 | VR512, VR512, |
| 131716 | /* VPCONFLICTQZrrk */ |
| 131717 | VR512, VR512, VK8WM, VR512, |
| 131718 | /* VPCONFLICTQZrrkz */ |
| 131719 | VR512, VK8WM, VR512, |
| 131720 | /* VPDPBSSDSYrm */ |
| 131721 | VR256, VR256, VR256, i256mem, |
| 131722 | /* VPDPBSSDSYrr */ |
| 131723 | VR256, VR256, VR256, VR256, |
| 131724 | /* VPDPBSSDSrm */ |
| 131725 | VR128, VR128, VR128, i128mem, |
| 131726 | /* VPDPBSSDSrr */ |
| 131727 | VR128, VR128, VR128, VR128, |
| 131728 | /* VPDPBSSDYrm */ |
| 131729 | VR256, VR256, VR256, i256mem, |
| 131730 | /* VPDPBSSDYrr */ |
| 131731 | VR256, VR256, VR256, VR256, |
| 131732 | /* VPDPBSSDrm */ |
| 131733 | VR128, VR128, VR128, i128mem, |
| 131734 | /* VPDPBSSDrr */ |
| 131735 | VR128, VR128, VR128, VR128, |
| 131736 | /* VPDPBSUDSYrm */ |
| 131737 | VR256, VR256, VR256, i256mem, |
| 131738 | /* VPDPBSUDSYrr */ |
| 131739 | VR256, VR256, VR256, VR256, |
| 131740 | /* VPDPBSUDSrm */ |
| 131741 | VR128, VR128, VR128, i128mem, |
| 131742 | /* VPDPBSUDSrr */ |
| 131743 | VR128, VR128, VR128, VR128, |
| 131744 | /* VPDPBSUDYrm */ |
| 131745 | VR256, VR256, VR256, i256mem, |
| 131746 | /* VPDPBSUDYrr */ |
| 131747 | VR256, VR256, VR256, VR256, |
| 131748 | /* VPDPBSUDrm */ |
| 131749 | VR128, VR128, VR128, i128mem, |
| 131750 | /* VPDPBSUDrr */ |
| 131751 | VR128, VR128, VR128, VR128, |
| 131752 | /* VPDPBUSDSYrm */ |
| 131753 | VR256, VR256, VR256, i256mem, |
| 131754 | /* VPDPBUSDSYrr */ |
| 131755 | VR256, VR256, VR256, VR256, |
| 131756 | /* VPDPBUSDSZ128m */ |
| 131757 | VR128X, VR128X, VR128X, i128mem, |
| 131758 | /* VPDPBUSDSZ128mb */ |
| 131759 | VR128X, VR128X, VR128X, i32mem, |
| 131760 | /* VPDPBUSDSZ128mbk */ |
| 131761 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131762 | /* VPDPBUSDSZ128mbkz */ |
| 131763 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131764 | /* VPDPBUSDSZ128mk */ |
| 131765 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131766 | /* VPDPBUSDSZ128mkz */ |
| 131767 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131768 | /* VPDPBUSDSZ128r */ |
| 131769 | VR128X, VR128X, VR128X, VR128X, |
| 131770 | /* VPDPBUSDSZ128rk */ |
| 131771 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131772 | /* VPDPBUSDSZ128rkz */ |
| 131773 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131774 | /* VPDPBUSDSZ256m */ |
| 131775 | VR256X, VR256X, VR256X, i256mem, |
| 131776 | /* VPDPBUSDSZ256mb */ |
| 131777 | VR256X, VR256X, VR256X, i32mem, |
| 131778 | /* VPDPBUSDSZ256mbk */ |
| 131779 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131780 | /* VPDPBUSDSZ256mbkz */ |
| 131781 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131782 | /* VPDPBUSDSZ256mk */ |
| 131783 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131784 | /* VPDPBUSDSZ256mkz */ |
| 131785 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131786 | /* VPDPBUSDSZ256r */ |
| 131787 | VR256X, VR256X, VR256X, VR256X, |
| 131788 | /* VPDPBUSDSZ256rk */ |
| 131789 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131790 | /* VPDPBUSDSZ256rkz */ |
| 131791 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131792 | /* VPDPBUSDSZm */ |
| 131793 | VR512, VR512, VR512, i512mem, |
| 131794 | /* VPDPBUSDSZmb */ |
| 131795 | VR512, VR512, VR512, i32mem, |
| 131796 | /* VPDPBUSDSZmbk */ |
| 131797 | VR512, VR512, VK16WM, VR512, i32mem, |
| 131798 | /* VPDPBUSDSZmbkz */ |
| 131799 | VR512, VR512, VK16WM, VR512, i32mem, |
| 131800 | /* VPDPBUSDSZmk */ |
| 131801 | VR512, VR512, VK16WM, VR512, i512mem, |
| 131802 | /* VPDPBUSDSZmkz */ |
| 131803 | VR512, VR512, VK16WM, VR512, i512mem, |
| 131804 | /* VPDPBUSDSZr */ |
| 131805 | VR512, VR512, VR512, VR512, |
| 131806 | /* VPDPBUSDSZrk */ |
| 131807 | VR512, VR512, VK16WM, VR512, VR512, |
| 131808 | /* VPDPBUSDSZrkz */ |
| 131809 | VR512, VR512, VK16WM, VR512, VR512, |
| 131810 | /* VPDPBUSDSrm */ |
| 131811 | VR128, VR128, VR128, i128mem, |
| 131812 | /* VPDPBUSDSrr */ |
| 131813 | VR128, VR128, VR128, VR128, |
| 131814 | /* VPDPBUSDYrm */ |
| 131815 | VR256, VR256, VR256, i256mem, |
| 131816 | /* VPDPBUSDYrr */ |
| 131817 | VR256, VR256, VR256, VR256, |
| 131818 | /* VPDPBUSDZ128m */ |
| 131819 | VR128X, VR128X, VR128X, i128mem, |
| 131820 | /* VPDPBUSDZ128mb */ |
| 131821 | VR128X, VR128X, VR128X, i32mem, |
| 131822 | /* VPDPBUSDZ128mbk */ |
| 131823 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131824 | /* VPDPBUSDZ128mbkz */ |
| 131825 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131826 | /* VPDPBUSDZ128mk */ |
| 131827 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131828 | /* VPDPBUSDZ128mkz */ |
| 131829 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131830 | /* VPDPBUSDZ128r */ |
| 131831 | VR128X, VR128X, VR128X, VR128X, |
| 131832 | /* VPDPBUSDZ128rk */ |
| 131833 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131834 | /* VPDPBUSDZ128rkz */ |
| 131835 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131836 | /* VPDPBUSDZ256m */ |
| 131837 | VR256X, VR256X, VR256X, i256mem, |
| 131838 | /* VPDPBUSDZ256mb */ |
| 131839 | VR256X, VR256X, VR256X, i32mem, |
| 131840 | /* VPDPBUSDZ256mbk */ |
| 131841 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131842 | /* VPDPBUSDZ256mbkz */ |
| 131843 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131844 | /* VPDPBUSDZ256mk */ |
| 131845 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131846 | /* VPDPBUSDZ256mkz */ |
| 131847 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131848 | /* VPDPBUSDZ256r */ |
| 131849 | VR256X, VR256X, VR256X, VR256X, |
| 131850 | /* VPDPBUSDZ256rk */ |
| 131851 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131852 | /* VPDPBUSDZ256rkz */ |
| 131853 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131854 | /* VPDPBUSDZm */ |
| 131855 | VR512, VR512, VR512, i512mem, |
| 131856 | /* VPDPBUSDZmb */ |
| 131857 | VR512, VR512, VR512, i32mem, |
| 131858 | /* VPDPBUSDZmbk */ |
| 131859 | VR512, VR512, VK16WM, VR512, i32mem, |
| 131860 | /* VPDPBUSDZmbkz */ |
| 131861 | VR512, VR512, VK16WM, VR512, i32mem, |
| 131862 | /* VPDPBUSDZmk */ |
| 131863 | VR512, VR512, VK16WM, VR512, i512mem, |
| 131864 | /* VPDPBUSDZmkz */ |
| 131865 | VR512, VR512, VK16WM, VR512, i512mem, |
| 131866 | /* VPDPBUSDZr */ |
| 131867 | VR512, VR512, VR512, VR512, |
| 131868 | /* VPDPBUSDZrk */ |
| 131869 | VR512, VR512, VK16WM, VR512, VR512, |
| 131870 | /* VPDPBUSDZrkz */ |
| 131871 | VR512, VR512, VK16WM, VR512, VR512, |
| 131872 | /* VPDPBUSDrm */ |
| 131873 | VR128, VR128, VR128, i128mem, |
| 131874 | /* VPDPBUSDrr */ |
| 131875 | VR128, VR128, VR128, VR128, |
| 131876 | /* VPDPBUUDSYrm */ |
| 131877 | VR256, VR256, VR256, i256mem, |
| 131878 | /* VPDPBUUDSYrr */ |
| 131879 | VR256, VR256, VR256, VR256, |
| 131880 | /* VPDPBUUDSrm */ |
| 131881 | VR128, VR128, VR128, i128mem, |
| 131882 | /* VPDPBUUDSrr */ |
| 131883 | VR128, VR128, VR128, VR128, |
| 131884 | /* VPDPBUUDYrm */ |
| 131885 | VR256, VR256, VR256, i256mem, |
| 131886 | /* VPDPBUUDYrr */ |
| 131887 | VR256, VR256, VR256, VR256, |
| 131888 | /* VPDPBUUDrm */ |
| 131889 | VR128, VR128, VR128, i128mem, |
| 131890 | /* VPDPBUUDrr */ |
| 131891 | VR128, VR128, VR128, VR128, |
| 131892 | /* VPDPWSSDSYrm */ |
| 131893 | VR256, VR256, VR256, i256mem, |
| 131894 | /* VPDPWSSDSYrr */ |
| 131895 | VR256, VR256, VR256, VR256, |
| 131896 | /* VPDPWSSDSZ128m */ |
| 131897 | VR128X, VR128X, VR128X, i128mem, |
| 131898 | /* VPDPWSSDSZ128mb */ |
| 131899 | VR128X, VR128X, VR128X, i32mem, |
| 131900 | /* VPDPWSSDSZ128mbk */ |
| 131901 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131902 | /* VPDPWSSDSZ128mbkz */ |
| 131903 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131904 | /* VPDPWSSDSZ128mk */ |
| 131905 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131906 | /* VPDPWSSDSZ128mkz */ |
| 131907 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131908 | /* VPDPWSSDSZ128r */ |
| 131909 | VR128X, VR128X, VR128X, VR128X, |
| 131910 | /* VPDPWSSDSZ128rk */ |
| 131911 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131912 | /* VPDPWSSDSZ128rkz */ |
| 131913 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131914 | /* VPDPWSSDSZ256m */ |
| 131915 | VR256X, VR256X, VR256X, i256mem, |
| 131916 | /* VPDPWSSDSZ256mb */ |
| 131917 | VR256X, VR256X, VR256X, i32mem, |
| 131918 | /* VPDPWSSDSZ256mbk */ |
| 131919 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131920 | /* VPDPWSSDSZ256mbkz */ |
| 131921 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131922 | /* VPDPWSSDSZ256mk */ |
| 131923 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131924 | /* VPDPWSSDSZ256mkz */ |
| 131925 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131926 | /* VPDPWSSDSZ256r */ |
| 131927 | VR256X, VR256X, VR256X, VR256X, |
| 131928 | /* VPDPWSSDSZ256rk */ |
| 131929 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131930 | /* VPDPWSSDSZ256rkz */ |
| 131931 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131932 | /* VPDPWSSDSZm */ |
| 131933 | VR512, VR512, VR512, i512mem, |
| 131934 | /* VPDPWSSDSZmb */ |
| 131935 | VR512, VR512, VR512, i32mem, |
| 131936 | /* VPDPWSSDSZmbk */ |
| 131937 | VR512, VR512, VK16WM, VR512, i32mem, |
| 131938 | /* VPDPWSSDSZmbkz */ |
| 131939 | VR512, VR512, VK16WM, VR512, i32mem, |
| 131940 | /* VPDPWSSDSZmk */ |
| 131941 | VR512, VR512, VK16WM, VR512, i512mem, |
| 131942 | /* VPDPWSSDSZmkz */ |
| 131943 | VR512, VR512, VK16WM, VR512, i512mem, |
| 131944 | /* VPDPWSSDSZr */ |
| 131945 | VR512, VR512, VR512, VR512, |
| 131946 | /* VPDPWSSDSZrk */ |
| 131947 | VR512, VR512, VK16WM, VR512, VR512, |
| 131948 | /* VPDPWSSDSZrkz */ |
| 131949 | VR512, VR512, VK16WM, VR512, VR512, |
| 131950 | /* VPDPWSSDSrm */ |
| 131951 | VR128, VR128, VR128, i128mem, |
| 131952 | /* VPDPWSSDSrr */ |
| 131953 | VR128, VR128, VR128, VR128, |
| 131954 | /* VPDPWSSDYrm */ |
| 131955 | VR256, VR256, VR256, i256mem, |
| 131956 | /* VPDPWSSDYrr */ |
| 131957 | VR256, VR256, VR256, VR256, |
| 131958 | /* VPDPWSSDZ128m */ |
| 131959 | VR128X, VR128X, VR128X, i128mem, |
| 131960 | /* VPDPWSSDZ128mb */ |
| 131961 | VR128X, VR128X, VR128X, i32mem, |
| 131962 | /* VPDPWSSDZ128mbk */ |
| 131963 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131964 | /* VPDPWSSDZ128mbkz */ |
| 131965 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 131966 | /* VPDPWSSDZ128mk */ |
| 131967 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131968 | /* VPDPWSSDZ128mkz */ |
| 131969 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 131970 | /* VPDPWSSDZ128r */ |
| 131971 | VR128X, VR128X, VR128X, VR128X, |
| 131972 | /* VPDPWSSDZ128rk */ |
| 131973 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131974 | /* VPDPWSSDZ128rkz */ |
| 131975 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 131976 | /* VPDPWSSDZ256m */ |
| 131977 | VR256X, VR256X, VR256X, i256mem, |
| 131978 | /* VPDPWSSDZ256mb */ |
| 131979 | VR256X, VR256X, VR256X, i32mem, |
| 131980 | /* VPDPWSSDZ256mbk */ |
| 131981 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131982 | /* VPDPWSSDZ256mbkz */ |
| 131983 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 131984 | /* VPDPWSSDZ256mk */ |
| 131985 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131986 | /* VPDPWSSDZ256mkz */ |
| 131987 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 131988 | /* VPDPWSSDZ256r */ |
| 131989 | VR256X, VR256X, VR256X, VR256X, |
| 131990 | /* VPDPWSSDZ256rk */ |
| 131991 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131992 | /* VPDPWSSDZ256rkz */ |
| 131993 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 131994 | /* VPDPWSSDZm */ |
| 131995 | VR512, VR512, VR512, i512mem, |
| 131996 | /* VPDPWSSDZmb */ |
| 131997 | VR512, VR512, VR512, i32mem, |
| 131998 | /* VPDPWSSDZmbk */ |
| 131999 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132000 | /* VPDPWSSDZmbkz */ |
| 132001 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132002 | /* VPDPWSSDZmk */ |
| 132003 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132004 | /* VPDPWSSDZmkz */ |
| 132005 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132006 | /* VPDPWSSDZr */ |
| 132007 | VR512, VR512, VR512, VR512, |
| 132008 | /* VPDPWSSDZrk */ |
| 132009 | VR512, VR512, VK16WM, VR512, VR512, |
| 132010 | /* VPDPWSSDZrkz */ |
| 132011 | VR512, VR512, VK16WM, VR512, VR512, |
| 132012 | /* VPDPWSSDrm */ |
| 132013 | VR128, VR128, VR128, i128mem, |
| 132014 | /* VPDPWSSDrr */ |
| 132015 | VR128, VR128, VR128, VR128, |
| 132016 | /* VPDPWSUDSYrm */ |
| 132017 | VR256, VR256, VR256, i256mem, |
| 132018 | /* VPDPWSUDSYrr */ |
| 132019 | VR256, VR256, VR256, VR256, |
| 132020 | /* VPDPWSUDSrm */ |
| 132021 | VR128, VR128, VR128, i128mem, |
| 132022 | /* VPDPWSUDSrr */ |
| 132023 | VR128, VR128, VR128, VR128, |
| 132024 | /* VPDPWSUDYrm */ |
| 132025 | VR256, VR256, VR256, i256mem, |
| 132026 | /* VPDPWSUDYrr */ |
| 132027 | VR256, VR256, VR256, VR256, |
| 132028 | /* VPDPWSUDrm */ |
| 132029 | VR128, VR128, VR128, i128mem, |
| 132030 | /* VPDPWSUDrr */ |
| 132031 | VR128, VR128, VR128, VR128, |
| 132032 | /* VPDPWUSDSYrm */ |
| 132033 | VR256, VR256, VR256, i256mem, |
| 132034 | /* VPDPWUSDSYrr */ |
| 132035 | VR256, VR256, VR256, VR256, |
| 132036 | /* VPDPWUSDSrm */ |
| 132037 | VR128, VR128, VR128, i128mem, |
| 132038 | /* VPDPWUSDSrr */ |
| 132039 | VR128, VR128, VR128, VR128, |
| 132040 | /* VPDPWUSDYrm */ |
| 132041 | VR256, VR256, VR256, i256mem, |
| 132042 | /* VPDPWUSDYrr */ |
| 132043 | VR256, VR256, VR256, VR256, |
| 132044 | /* VPDPWUSDrm */ |
| 132045 | VR128, VR128, VR128, i128mem, |
| 132046 | /* VPDPWUSDrr */ |
| 132047 | VR128, VR128, VR128, VR128, |
| 132048 | /* VPDPWUUDSYrm */ |
| 132049 | VR256, VR256, VR256, i256mem, |
| 132050 | /* VPDPWUUDSYrr */ |
| 132051 | VR256, VR256, VR256, VR256, |
| 132052 | /* VPDPWUUDSrm */ |
| 132053 | VR128, VR128, VR128, i128mem, |
| 132054 | /* VPDPWUUDSrr */ |
| 132055 | VR128, VR128, VR128, VR128, |
| 132056 | /* VPDPWUUDYrm */ |
| 132057 | VR256, VR256, VR256, i256mem, |
| 132058 | /* VPDPWUUDYrr */ |
| 132059 | VR256, VR256, VR256, VR256, |
| 132060 | /* VPDPWUUDrm */ |
| 132061 | VR128, VR128, VR128, i128mem, |
| 132062 | /* VPDPWUUDrr */ |
| 132063 | VR128, VR128, VR128, VR128, |
| 132064 | /* VPERM2F128rm */ |
| 132065 | VR256, VR256, f256mem, u8imm, |
| 132066 | /* VPERM2F128rr */ |
| 132067 | VR256, VR256, VR256, u8imm, |
| 132068 | /* VPERM2I128rm */ |
| 132069 | VR256, VR256, f256mem, u8imm, |
| 132070 | /* VPERM2I128rr */ |
| 132071 | VR256, VR256, VR256, u8imm, |
| 132072 | /* VPERMBZ128rm */ |
| 132073 | VR128X, VR128X, i128mem, |
| 132074 | /* VPERMBZ128rmk */ |
| 132075 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 132076 | /* VPERMBZ128rmkz */ |
| 132077 | VR128X, VK16WM, VR128X, i128mem, |
| 132078 | /* VPERMBZ128rr */ |
| 132079 | VR128X, VR128X, VR128X, |
| 132080 | /* VPERMBZ128rrk */ |
| 132081 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 132082 | /* VPERMBZ128rrkz */ |
| 132083 | VR128X, VK16WM, VR128X, VR128X, |
| 132084 | /* VPERMBZ256rm */ |
| 132085 | VR256X, VR256X, i256mem, |
| 132086 | /* VPERMBZ256rmk */ |
| 132087 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 132088 | /* VPERMBZ256rmkz */ |
| 132089 | VR256X, VK32WM, VR256X, i256mem, |
| 132090 | /* VPERMBZ256rr */ |
| 132091 | VR256X, VR256X, VR256X, |
| 132092 | /* VPERMBZ256rrk */ |
| 132093 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 132094 | /* VPERMBZ256rrkz */ |
| 132095 | VR256X, VK32WM, VR256X, VR256X, |
| 132096 | /* VPERMBZrm */ |
| 132097 | VR512, VR512, i512mem, |
| 132098 | /* VPERMBZrmk */ |
| 132099 | VR512, VR512, VK64WM, VR512, i512mem, |
| 132100 | /* VPERMBZrmkz */ |
| 132101 | VR512, VK64WM, VR512, i512mem, |
| 132102 | /* VPERMBZrr */ |
| 132103 | VR512, VR512, VR512, |
| 132104 | /* VPERMBZrrk */ |
| 132105 | VR512, VR512, VK64WM, VR512, VR512, |
| 132106 | /* VPERMBZrrkz */ |
| 132107 | VR512, VK64WM, VR512, VR512, |
| 132108 | /* VPERMDYrm */ |
| 132109 | VR256, VR256, i256mem, |
| 132110 | /* VPERMDYrr */ |
| 132111 | VR256, VR256, VR256, |
| 132112 | /* VPERMDZ256rm */ |
| 132113 | VR256X, VR256X, i256mem, |
| 132114 | /* VPERMDZ256rmb */ |
| 132115 | VR256X, VR256X, i32mem, |
| 132116 | /* VPERMDZ256rmbk */ |
| 132117 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 132118 | /* VPERMDZ256rmbkz */ |
| 132119 | VR256X, VK8WM, VR256X, i32mem, |
| 132120 | /* VPERMDZ256rmk */ |
| 132121 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132122 | /* VPERMDZ256rmkz */ |
| 132123 | VR256X, VK8WM, VR256X, i256mem, |
| 132124 | /* VPERMDZ256rr */ |
| 132125 | VR256X, VR256X, VR256X, |
| 132126 | /* VPERMDZ256rrk */ |
| 132127 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132128 | /* VPERMDZ256rrkz */ |
| 132129 | VR256X, VK8WM, VR256X, VR256X, |
| 132130 | /* VPERMDZrm */ |
| 132131 | VR512, VR512, i512mem, |
| 132132 | /* VPERMDZrmb */ |
| 132133 | VR512, VR512, i32mem, |
| 132134 | /* VPERMDZrmbk */ |
| 132135 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132136 | /* VPERMDZrmbkz */ |
| 132137 | VR512, VK16WM, VR512, i32mem, |
| 132138 | /* VPERMDZrmk */ |
| 132139 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132140 | /* VPERMDZrmkz */ |
| 132141 | VR512, VK16WM, VR512, i512mem, |
| 132142 | /* VPERMDZrr */ |
| 132143 | VR512, VR512, VR512, |
| 132144 | /* VPERMDZrrk */ |
| 132145 | VR512, VR512, VK16WM, VR512, VR512, |
| 132146 | /* VPERMDZrrkz */ |
| 132147 | VR512, VK16WM, VR512, VR512, |
| 132148 | /* VPERMI2BZ128rm */ |
| 132149 | VR128X, VR128X, VR128X, i128mem, |
| 132150 | /* VPERMI2BZ128rmk */ |
| 132151 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 132152 | /* VPERMI2BZ128rmkz */ |
| 132153 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 132154 | /* VPERMI2BZ128rr */ |
| 132155 | VR128X, VR128X, VR128X, VR128X, |
| 132156 | /* VPERMI2BZ128rrk */ |
| 132157 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 132158 | /* VPERMI2BZ128rrkz */ |
| 132159 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 132160 | /* VPERMI2BZ256rm */ |
| 132161 | VR256X, VR256X, VR256X, i256mem, |
| 132162 | /* VPERMI2BZ256rmk */ |
| 132163 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 132164 | /* VPERMI2BZ256rmkz */ |
| 132165 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 132166 | /* VPERMI2BZ256rr */ |
| 132167 | VR256X, VR256X, VR256X, VR256X, |
| 132168 | /* VPERMI2BZ256rrk */ |
| 132169 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 132170 | /* VPERMI2BZ256rrkz */ |
| 132171 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 132172 | /* VPERMI2BZrm */ |
| 132173 | VR512, VR512, VR512, i512mem, |
| 132174 | /* VPERMI2BZrmk */ |
| 132175 | VR512, VR512, VK64WM, VR512, i512mem, |
| 132176 | /* VPERMI2BZrmkz */ |
| 132177 | VR512, VR512, VK64WM, VR512, i512mem, |
| 132178 | /* VPERMI2BZrr */ |
| 132179 | VR512, VR512, VR512, VR512, |
| 132180 | /* VPERMI2BZrrk */ |
| 132181 | VR512, VR512, VK64WM, VR512, VR512, |
| 132182 | /* VPERMI2BZrrkz */ |
| 132183 | VR512, VR512, VK64WM, VR512, VR512, |
| 132184 | /* VPERMI2DZ128rm */ |
| 132185 | VR128X, VR128X, VR128X, i128mem, |
| 132186 | /* VPERMI2DZ128rmb */ |
| 132187 | VR128X, VR128X, VR128X, i32mem, |
| 132188 | /* VPERMI2DZ128rmbk */ |
| 132189 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 132190 | /* VPERMI2DZ128rmbkz */ |
| 132191 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 132192 | /* VPERMI2DZ128rmk */ |
| 132193 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 132194 | /* VPERMI2DZ128rmkz */ |
| 132195 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 132196 | /* VPERMI2DZ128rr */ |
| 132197 | VR128X, VR128X, VR128X, VR128X, |
| 132198 | /* VPERMI2DZ128rrk */ |
| 132199 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132200 | /* VPERMI2DZ128rrkz */ |
| 132201 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132202 | /* VPERMI2DZ256rm */ |
| 132203 | VR256X, VR256X, VR256X, i256mem, |
| 132204 | /* VPERMI2DZ256rmb */ |
| 132205 | VR256X, VR256X, VR256X, i32mem, |
| 132206 | /* VPERMI2DZ256rmbk */ |
| 132207 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 132208 | /* VPERMI2DZ256rmbkz */ |
| 132209 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 132210 | /* VPERMI2DZ256rmk */ |
| 132211 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132212 | /* VPERMI2DZ256rmkz */ |
| 132213 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132214 | /* VPERMI2DZ256rr */ |
| 132215 | VR256X, VR256X, VR256X, VR256X, |
| 132216 | /* VPERMI2DZ256rrk */ |
| 132217 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132218 | /* VPERMI2DZ256rrkz */ |
| 132219 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132220 | /* VPERMI2DZrm */ |
| 132221 | VR512, VR512, VR512, i512mem, |
| 132222 | /* VPERMI2DZrmb */ |
| 132223 | VR512, VR512, VR512, i32mem, |
| 132224 | /* VPERMI2DZrmbk */ |
| 132225 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132226 | /* VPERMI2DZrmbkz */ |
| 132227 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132228 | /* VPERMI2DZrmk */ |
| 132229 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132230 | /* VPERMI2DZrmkz */ |
| 132231 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132232 | /* VPERMI2DZrr */ |
| 132233 | VR512, VR512, VR512, VR512, |
| 132234 | /* VPERMI2DZrrk */ |
| 132235 | VR512, VR512, VK16WM, VR512, VR512, |
| 132236 | /* VPERMI2DZrrkz */ |
| 132237 | VR512, VR512, VK16WM, VR512, VR512, |
| 132238 | /* VPERMI2PDZ128rm */ |
| 132239 | VR128X, VR128X, VR128X, f128mem, |
| 132240 | /* VPERMI2PDZ128rmb */ |
| 132241 | VR128X, VR128X, VR128X, f64mem, |
| 132242 | /* VPERMI2PDZ128rmbk */ |
| 132243 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 132244 | /* VPERMI2PDZ128rmbkz */ |
| 132245 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 132246 | /* VPERMI2PDZ128rmk */ |
| 132247 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 132248 | /* VPERMI2PDZ128rmkz */ |
| 132249 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 132250 | /* VPERMI2PDZ128rr */ |
| 132251 | VR128X, VR128X, VR128X, VR128X, |
| 132252 | /* VPERMI2PDZ128rrk */ |
| 132253 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 132254 | /* VPERMI2PDZ128rrkz */ |
| 132255 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 132256 | /* VPERMI2PDZ256rm */ |
| 132257 | VR256X, VR256X, VR256X, f256mem, |
| 132258 | /* VPERMI2PDZ256rmb */ |
| 132259 | VR256X, VR256X, VR256X, f64mem, |
| 132260 | /* VPERMI2PDZ256rmbk */ |
| 132261 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 132262 | /* VPERMI2PDZ256rmbkz */ |
| 132263 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 132264 | /* VPERMI2PDZ256rmk */ |
| 132265 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 132266 | /* VPERMI2PDZ256rmkz */ |
| 132267 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 132268 | /* VPERMI2PDZ256rr */ |
| 132269 | VR256X, VR256X, VR256X, VR256X, |
| 132270 | /* VPERMI2PDZ256rrk */ |
| 132271 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132272 | /* VPERMI2PDZ256rrkz */ |
| 132273 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132274 | /* VPERMI2PDZrm */ |
| 132275 | VR512, VR512, VR512, f512mem, |
| 132276 | /* VPERMI2PDZrmb */ |
| 132277 | VR512, VR512, VR512, f64mem, |
| 132278 | /* VPERMI2PDZrmbk */ |
| 132279 | VR512, VR512, VK8WM, VR512, f64mem, |
| 132280 | /* VPERMI2PDZrmbkz */ |
| 132281 | VR512, VR512, VK8WM, VR512, f64mem, |
| 132282 | /* VPERMI2PDZrmk */ |
| 132283 | VR512, VR512, VK8WM, VR512, f512mem, |
| 132284 | /* VPERMI2PDZrmkz */ |
| 132285 | VR512, VR512, VK8WM, VR512, f512mem, |
| 132286 | /* VPERMI2PDZrr */ |
| 132287 | VR512, VR512, VR512, VR512, |
| 132288 | /* VPERMI2PDZrrk */ |
| 132289 | VR512, VR512, VK8WM, VR512, VR512, |
| 132290 | /* VPERMI2PDZrrkz */ |
| 132291 | VR512, VR512, VK8WM, VR512, VR512, |
| 132292 | /* VPERMI2PSZ128rm */ |
| 132293 | VR128X, VR128X, VR128X, f128mem, |
| 132294 | /* VPERMI2PSZ128rmb */ |
| 132295 | VR128X, VR128X, VR128X, f32mem, |
| 132296 | /* VPERMI2PSZ128rmbk */ |
| 132297 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 132298 | /* VPERMI2PSZ128rmbkz */ |
| 132299 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 132300 | /* VPERMI2PSZ128rmk */ |
| 132301 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 132302 | /* VPERMI2PSZ128rmkz */ |
| 132303 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 132304 | /* VPERMI2PSZ128rr */ |
| 132305 | VR128X, VR128X, VR128X, VR128X, |
| 132306 | /* VPERMI2PSZ128rrk */ |
| 132307 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132308 | /* VPERMI2PSZ128rrkz */ |
| 132309 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132310 | /* VPERMI2PSZ256rm */ |
| 132311 | VR256X, VR256X, VR256X, f256mem, |
| 132312 | /* VPERMI2PSZ256rmb */ |
| 132313 | VR256X, VR256X, VR256X, f32mem, |
| 132314 | /* VPERMI2PSZ256rmbk */ |
| 132315 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 132316 | /* VPERMI2PSZ256rmbkz */ |
| 132317 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 132318 | /* VPERMI2PSZ256rmk */ |
| 132319 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 132320 | /* VPERMI2PSZ256rmkz */ |
| 132321 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 132322 | /* VPERMI2PSZ256rr */ |
| 132323 | VR256X, VR256X, VR256X, VR256X, |
| 132324 | /* VPERMI2PSZ256rrk */ |
| 132325 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132326 | /* VPERMI2PSZ256rrkz */ |
| 132327 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132328 | /* VPERMI2PSZrm */ |
| 132329 | VR512, VR512, VR512, f512mem, |
| 132330 | /* VPERMI2PSZrmb */ |
| 132331 | VR512, VR512, VR512, f32mem, |
| 132332 | /* VPERMI2PSZrmbk */ |
| 132333 | VR512, VR512, VK16WM, VR512, f32mem, |
| 132334 | /* VPERMI2PSZrmbkz */ |
| 132335 | VR512, VR512, VK16WM, VR512, f32mem, |
| 132336 | /* VPERMI2PSZrmk */ |
| 132337 | VR512, VR512, VK16WM, VR512, f512mem, |
| 132338 | /* VPERMI2PSZrmkz */ |
| 132339 | VR512, VR512, VK16WM, VR512, f512mem, |
| 132340 | /* VPERMI2PSZrr */ |
| 132341 | VR512, VR512, VR512, VR512, |
| 132342 | /* VPERMI2PSZrrk */ |
| 132343 | VR512, VR512, VK16WM, VR512, VR512, |
| 132344 | /* VPERMI2PSZrrkz */ |
| 132345 | VR512, VR512, VK16WM, VR512, VR512, |
| 132346 | /* VPERMI2QZ128rm */ |
| 132347 | VR128X, VR128X, VR128X, i128mem, |
| 132348 | /* VPERMI2QZ128rmb */ |
| 132349 | VR128X, VR128X, VR128X, i64mem, |
| 132350 | /* VPERMI2QZ128rmbk */ |
| 132351 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 132352 | /* VPERMI2QZ128rmbkz */ |
| 132353 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 132354 | /* VPERMI2QZ128rmk */ |
| 132355 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 132356 | /* VPERMI2QZ128rmkz */ |
| 132357 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 132358 | /* VPERMI2QZ128rr */ |
| 132359 | VR128X, VR128X, VR128X, VR128X, |
| 132360 | /* VPERMI2QZ128rrk */ |
| 132361 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 132362 | /* VPERMI2QZ128rrkz */ |
| 132363 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 132364 | /* VPERMI2QZ256rm */ |
| 132365 | VR256X, VR256X, VR256X, i256mem, |
| 132366 | /* VPERMI2QZ256rmb */ |
| 132367 | VR256X, VR256X, VR256X, i64mem, |
| 132368 | /* VPERMI2QZ256rmbk */ |
| 132369 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 132370 | /* VPERMI2QZ256rmbkz */ |
| 132371 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 132372 | /* VPERMI2QZ256rmk */ |
| 132373 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 132374 | /* VPERMI2QZ256rmkz */ |
| 132375 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 132376 | /* VPERMI2QZ256rr */ |
| 132377 | VR256X, VR256X, VR256X, VR256X, |
| 132378 | /* VPERMI2QZ256rrk */ |
| 132379 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132380 | /* VPERMI2QZ256rrkz */ |
| 132381 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132382 | /* VPERMI2QZrm */ |
| 132383 | VR512, VR512, VR512, i512mem, |
| 132384 | /* VPERMI2QZrmb */ |
| 132385 | VR512, VR512, VR512, i64mem, |
| 132386 | /* VPERMI2QZrmbk */ |
| 132387 | VR512, VR512, VK8WM, VR512, i64mem, |
| 132388 | /* VPERMI2QZrmbkz */ |
| 132389 | VR512, VR512, VK8WM, VR512, i64mem, |
| 132390 | /* VPERMI2QZrmk */ |
| 132391 | VR512, VR512, VK8WM, VR512, i512mem, |
| 132392 | /* VPERMI2QZrmkz */ |
| 132393 | VR512, VR512, VK8WM, VR512, i512mem, |
| 132394 | /* VPERMI2QZrr */ |
| 132395 | VR512, VR512, VR512, VR512, |
| 132396 | /* VPERMI2QZrrk */ |
| 132397 | VR512, VR512, VK8WM, VR512, VR512, |
| 132398 | /* VPERMI2QZrrkz */ |
| 132399 | VR512, VR512, VK8WM, VR512, VR512, |
| 132400 | /* VPERMI2WZ128rm */ |
| 132401 | VR128X, VR128X, VR128X, i128mem, |
| 132402 | /* VPERMI2WZ128rmk */ |
| 132403 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 132404 | /* VPERMI2WZ128rmkz */ |
| 132405 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 132406 | /* VPERMI2WZ128rr */ |
| 132407 | VR128X, VR128X, VR128X, VR128X, |
| 132408 | /* VPERMI2WZ128rrk */ |
| 132409 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 132410 | /* VPERMI2WZ128rrkz */ |
| 132411 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 132412 | /* VPERMI2WZ256rm */ |
| 132413 | VR256X, VR256X, VR256X, i256mem, |
| 132414 | /* VPERMI2WZ256rmk */ |
| 132415 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 132416 | /* VPERMI2WZ256rmkz */ |
| 132417 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 132418 | /* VPERMI2WZ256rr */ |
| 132419 | VR256X, VR256X, VR256X, VR256X, |
| 132420 | /* VPERMI2WZ256rrk */ |
| 132421 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 132422 | /* VPERMI2WZ256rrkz */ |
| 132423 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 132424 | /* VPERMI2WZrm */ |
| 132425 | VR512, VR512, VR512, i512mem, |
| 132426 | /* VPERMI2WZrmk */ |
| 132427 | VR512, VR512, VK32WM, VR512, i512mem, |
| 132428 | /* VPERMI2WZrmkz */ |
| 132429 | VR512, VR512, VK32WM, VR512, i512mem, |
| 132430 | /* VPERMI2WZrr */ |
| 132431 | VR512, VR512, VR512, VR512, |
| 132432 | /* VPERMI2WZrrk */ |
| 132433 | VR512, VR512, VK32WM, VR512, VR512, |
| 132434 | /* VPERMI2WZrrkz */ |
| 132435 | VR512, VR512, VK32WM, VR512, VR512, |
| 132436 | /* VPERMIL2PDYmr */ |
| 132437 | VR256, VR256, f256mem, VR256, u4imm, |
| 132438 | /* VPERMIL2PDYrm */ |
| 132439 | VR256, VR256, VR256, i256mem, u4imm, |
| 132440 | /* VPERMIL2PDYrr */ |
| 132441 | VR256, VR256, VR256, VR256, u4imm, |
| 132442 | /* VPERMIL2PDYrr_REV */ |
| 132443 | VR256, VR256, VR256, VR256, u4imm, |
| 132444 | /* VPERMIL2PDmr */ |
| 132445 | VR128, VR128, f128mem, VR128, u4imm, |
| 132446 | /* VPERMIL2PDrm */ |
| 132447 | VR128, VR128, VR128, i128mem, u4imm, |
| 132448 | /* VPERMIL2PDrr */ |
| 132449 | VR128, VR128, VR128, VR128, u4imm, |
| 132450 | /* VPERMIL2PDrr_REV */ |
| 132451 | VR128, VR128, VR128, VR128, u4imm, |
| 132452 | /* VPERMIL2PSYmr */ |
| 132453 | VR256, VR256, f256mem, VR256, u4imm, |
| 132454 | /* VPERMIL2PSYrm */ |
| 132455 | VR256, VR256, VR256, i256mem, u4imm, |
| 132456 | /* VPERMIL2PSYrr */ |
| 132457 | VR256, VR256, VR256, VR256, u4imm, |
| 132458 | /* VPERMIL2PSYrr_REV */ |
| 132459 | VR256, VR256, VR256, VR256, u4imm, |
| 132460 | /* VPERMIL2PSmr */ |
| 132461 | VR128, VR128, f128mem, VR128, u4imm, |
| 132462 | /* VPERMIL2PSrm */ |
| 132463 | VR128, VR128, VR128, i128mem, u4imm, |
| 132464 | /* VPERMIL2PSrr */ |
| 132465 | VR128, VR128, VR128, VR128, u4imm, |
| 132466 | /* VPERMIL2PSrr_REV */ |
| 132467 | VR128, VR128, VR128, VR128, u4imm, |
| 132468 | /* VPERMILPDYmi */ |
| 132469 | VR256, f256mem, u8imm, |
| 132470 | /* VPERMILPDYri */ |
| 132471 | VR256, VR256, u8imm, |
| 132472 | /* VPERMILPDYrm */ |
| 132473 | VR256, VR256, i256mem, |
| 132474 | /* VPERMILPDYrr */ |
| 132475 | VR256, VR256, VR256, |
| 132476 | /* VPERMILPDZ128mbi */ |
| 132477 | VR128X, f64mem, u8imm, |
| 132478 | /* VPERMILPDZ128mbik */ |
| 132479 | VR128X, VR128X, VK2WM, f64mem, u8imm, |
| 132480 | /* VPERMILPDZ128mbikz */ |
| 132481 | VR128X, VK2WM, f64mem, u8imm, |
| 132482 | /* VPERMILPDZ128mi */ |
| 132483 | VR128X, f128mem, u8imm, |
| 132484 | /* VPERMILPDZ128mik */ |
| 132485 | VR128X, VR128X, VK2WM, f128mem, u8imm, |
| 132486 | /* VPERMILPDZ128mikz */ |
| 132487 | VR128X, VK2WM, f128mem, u8imm, |
| 132488 | /* VPERMILPDZ128ri */ |
| 132489 | VR128X, VR128X, u8imm, |
| 132490 | /* VPERMILPDZ128rik */ |
| 132491 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 132492 | /* VPERMILPDZ128rikz */ |
| 132493 | VR128X, VK2WM, VR128X, u8imm, |
| 132494 | /* VPERMILPDZ128rm */ |
| 132495 | VR128X, VR128X, i128mem, |
| 132496 | /* VPERMILPDZ128rmb */ |
| 132497 | VR128X, VR128X, f64mem, |
| 132498 | /* VPERMILPDZ128rmbk */ |
| 132499 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 132500 | /* VPERMILPDZ128rmbkz */ |
| 132501 | VR128X, VK2WM, VR128X, f64mem, |
| 132502 | /* VPERMILPDZ128rmk */ |
| 132503 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 132504 | /* VPERMILPDZ128rmkz */ |
| 132505 | VR128X, VK2WM, VR128X, i128mem, |
| 132506 | /* VPERMILPDZ128rr */ |
| 132507 | VR128X, VR128X, VR128X, |
| 132508 | /* VPERMILPDZ128rrk */ |
| 132509 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 132510 | /* VPERMILPDZ128rrkz */ |
| 132511 | VR128X, VK2WM, VR128X, VR128X, |
| 132512 | /* VPERMILPDZ256mbi */ |
| 132513 | VR256X, f64mem, u8imm, |
| 132514 | /* VPERMILPDZ256mbik */ |
| 132515 | VR256X, VR256X, VK4WM, f64mem, u8imm, |
| 132516 | /* VPERMILPDZ256mbikz */ |
| 132517 | VR256X, VK4WM, f64mem, u8imm, |
| 132518 | /* VPERMILPDZ256mi */ |
| 132519 | VR256X, f256mem, u8imm, |
| 132520 | /* VPERMILPDZ256mik */ |
| 132521 | VR256X, VR256X, VK4WM, f256mem, u8imm, |
| 132522 | /* VPERMILPDZ256mikz */ |
| 132523 | VR256X, VK4WM, f256mem, u8imm, |
| 132524 | /* VPERMILPDZ256ri */ |
| 132525 | VR256X, VR256X, u8imm, |
| 132526 | /* VPERMILPDZ256rik */ |
| 132527 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 132528 | /* VPERMILPDZ256rikz */ |
| 132529 | VR256X, VK4WM, VR256X, u8imm, |
| 132530 | /* VPERMILPDZ256rm */ |
| 132531 | VR256X, VR256X, i256mem, |
| 132532 | /* VPERMILPDZ256rmb */ |
| 132533 | VR256X, VR256X, f64mem, |
| 132534 | /* VPERMILPDZ256rmbk */ |
| 132535 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 132536 | /* VPERMILPDZ256rmbkz */ |
| 132537 | VR256X, VK4WM, VR256X, f64mem, |
| 132538 | /* VPERMILPDZ256rmk */ |
| 132539 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 132540 | /* VPERMILPDZ256rmkz */ |
| 132541 | VR256X, VK4WM, VR256X, i256mem, |
| 132542 | /* VPERMILPDZ256rr */ |
| 132543 | VR256X, VR256X, VR256X, |
| 132544 | /* VPERMILPDZ256rrk */ |
| 132545 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132546 | /* VPERMILPDZ256rrkz */ |
| 132547 | VR256X, VK4WM, VR256X, VR256X, |
| 132548 | /* VPERMILPDZmbi */ |
| 132549 | VR512, f64mem, u8imm, |
| 132550 | /* VPERMILPDZmbik */ |
| 132551 | VR512, VR512, VK8WM, f64mem, u8imm, |
| 132552 | /* VPERMILPDZmbikz */ |
| 132553 | VR512, VK8WM, f64mem, u8imm, |
| 132554 | /* VPERMILPDZmi */ |
| 132555 | VR512, f512mem, u8imm, |
| 132556 | /* VPERMILPDZmik */ |
| 132557 | VR512, VR512, VK8WM, f512mem, u8imm, |
| 132558 | /* VPERMILPDZmikz */ |
| 132559 | VR512, VK8WM, f512mem, u8imm, |
| 132560 | /* VPERMILPDZri */ |
| 132561 | VR512, VR512, u8imm, |
| 132562 | /* VPERMILPDZrik */ |
| 132563 | VR512, VR512, VK8WM, VR512, u8imm, |
| 132564 | /* VPERMILPDZrikz */ |
| 132565 | VR512, VK8WM, VR512, u8imm, |
| 132566 | /* VPERMILPDZrm */ |
| 132567 | VR512, VR512, i512mem, |
| 132568 | /* VPERMILPDZrmb */ |
| 132569 | VR512, VR512, f64mem, |
| 132570 | /* VPERMILPDZrmbk */ |
| 132571 | VR512, VR512, VK8WM, VR512, f64mem, |
| 132572 | /* VPERMILPDZrmbkz */ |
| 132573 | VR512, VK8WM, VR512, f64mem, |
| 132574 | /* VPERMILPDZrmk */ |
| 132575 | VR512, VR512, VK8WM, VR512, i512mem, |
| 132576 | /* VPERMILPDZrmkz */ |
| 132577 | VR512, VK8WM, VR512, i512mem, |
| 132578 | /* VPERMILPDZrr */ |
| 132579 | VR512, VR512, VR512, |
| 132580 | /* VPERMILPDZrrk */ |
| 132581 | VR512, VR512, VK8WM, VR512, VR512, |
| 132582 | /* VPERMILPDZrrkz */ |
| 132583 | VR512, VK8WM, VR512, VR512, |
| 132584 | /* VPERMILPDmi */ |
| 132585 | VR128, f128mem, u8imm, |
| 132586 | /* VPERMILPDri */ |
| 132587 | VR128, VR128, u8imm, |
| 132588 | /* VPERMILPDrm */ |
| 132589 | VR128, VR128, i128mem, |
| 132590 | /* VPERMILPDrr */ |
| 132591 | VR128, VR128, VR128, |
| 132592 | /* VPERMILPSYmi */ |
| 132593 | VR256, f256mem, u8imm, |
| 132594 | /* VPERMILPSYri */ |
| 132595 | VR256, VR256, u8imm, |
| 132596 | /* VPERMILPSYrm */ |
| 132597 | VR256, VR256, i256mem, |
| 132598 | /* VPERMILPSYrr */ |
| 132599 | VR256, VR256, VR256, |
| 132600 | /* VPERMILPSZ128mbi */ |
| 132601 | VR128X, f32mem, u8imm, |
| 132602 | /* VPERMILPSZ128mbik */ |
| 132603 | VR128X, VR128X, VK4WM, f32mem, u8imm, |
| 132604 | /* VPERMILPSZ128mbikz */ |
| 132605 | VR128X, VK4WM, f32mem, u8imm, |
| 132606 | /* VPERMILPSZ128mi */ |
| 132607 | VR128X, f128mem, u8imm, |
| 132608 | /* VPERMILPSZ128mik */ |
| 132609 | VR128X, VR128X, VK4WM, f128mem, u8imm, |
| 132610 | /* VPERMILPSZ128mikz */ |
| 132611 | VR128X, VK4WM, f128mem, u8imm, |
| 132612 | /* VPERMILPSZ128ri */ |
| 132613 | VR128X, VR128X, u8imm, |
| 132614 | /* VPERMILPSZ128rik */ |
| 132615 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 132616 | /* VPERMILPSZ128rikz */ |
| 132617 | VR128X, VK4WM, VR128X, u8imm, |
| 132618 | /* VPERMILPSZ128rm */ |
| 132619 | VR128X, VR128X, i128mem, |
| 132620 | /* VPERMILPSZ128rmb */ |
| 132621 | VR128X, VR128X, f32mem, |
| 132622 | /* VPERMILPSZ128rmbk */ |
| 132623 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 132624 | /* VPERMILPSZ128rmbkz */ |
| 132625 | VR128X, VK4WM, VR128X, f32mem, |
| 132626 | /* VPERMILPSZ128rmk */ |
| 132627 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 132628 | /* VPERMILPSZ128rmkz */ |
| 132629 | VR128X, VK4WM, VR128X, i128mem, |
| 132630 | /* VPERMILPSZ128rr */ |
| 132631 | VR128X, VR128X, VR128X, |
| 132632 | /* VPERMILPSZ128rrk */ |
| 132633 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132634 | /* VPERMILPSZ128rrkz */ |
| 132635 | VR128X, VK4WM, VR128X, VR128X, |
| 132636 | /* VPERMILPSZ256mbi */ |
| 132637 | VR256X, f32mem, u8imm, |
| 132638 | /* VPERMILPSZ256mbik */ |
| 132639 | VR256X, VR256X, VK8WM, f32mem, u8imm, |
| 132640 | /* VPERMILPSZ256mbikz */ |
| 132641 | VR256X, VK8WM, f32mem, u8imm, |
| 132642 | /* VPERMILPSZ256mi */ |
| 132643 | VR256X, f256mem, u8imm, |
| 132644 | /* VPERMILPSZ256mik */ |
| 132645 | VR256X, VR256X, VK8WM, f256mem, u8imm, |
| 132646 | /* VPERMILPSZ256mikz */ |
| 132647 | VR256X, VK8WM, f256mem, u8imm, |
| 132648 | /* VPERMILPSZ256ri */ |
| 132649 | VR256X, VR256X, u8imm, |
| 132650 | /* VPERMILPSZ256rik */ |
| 132651 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 132652 | /* VPERMILPSZ256rikz */ |
| 132653 | VR256X, VK8WM, VR256X, u8imm, |
| 132654 | /* VPERMILPSZ256rm */ |
| 132655 | VR256X, VR256X, i256mem, |
| 132656 | /* VPERMILPSZ256rmb */ |
| 132657 | VR256X, VR256X, f32mem, |
| 132658 | /* VPERMILPSZ256rmbk */ |
| 132659 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 132660 | /* VPERMILPSZ256rmbkz */ |
| 132661 | VR256X, VK8WM, VR256X, f32mem, |
| 132662 | /* VPERMILPSZ256rmk */ |
| 132663 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132664 | /* VPERMILPSZ256rmkz */ |
| 132665 | VR256X, VK8WM, VR256X, i256mem, |
| 132666 | /* VPERMILPSZ256rr */ |
| 132667 | VR256X, VR256X, VR256X, |
| 132668 | /* VPERMILPSZ256rrk */ |
| 132669 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132670 | /* VPERMILPSZ256rrkz */ |
| 132671 | VR256X, VK8WM, VR256X, VR256X, |
| 132672 | /* VPERMILPSZmbi */ |
| 132673 | VR512, f32mem, u8imm, |
| 132674 | /* VPERMILPSZmbik */ |
| 132675 | VR512, VR512, VK16WM, f32mem, u8imm, |
| 132676 | /* VPERMILPSZmbikz */ |
| 132677 | VR512, VK16WM, f32mem, u8imm, |
| 132678 | /* VPERMILPSZmi */ |
| 132679 | VR512, f512mem, u8imm, |
| 132680 | /* VPERMILPSZmik */ |
| 132681 | VR512, VR512, VK16WM, f512mem, u8imm, |
| 132682 | /* VPERMILPSZmikz */ |
| 132683 | VR512, VK16WM, f512mem, u8imm, |
| 132684 | /* VPERMILPSZri */ |
| 132685 | VR512, VR512, u8imm, |
| 132686 | /* VPERMILPSZrik */ |
| 132687 | VR512, VR512, VK16WM, VR512, u8imm, |
| 132688 | /* VPERMILPSZrikz */ |
| 132689 | VR512, VK16WM, VR512, u8imm, |
| 132690 | /* VPERMILPSZrm */ |
| 132691 | VR512, VR512, i512mem, |
| 132692 | /* VPERMILPSZrmb */ |
| 132693 | VR512, VR512, f32mem, |
| 132694 | /* VPERMILPSZrmbk */ |
| 132695 | VR512, VR512, VK16WM, VR512, f32mem, |
| 132696 | /* VPERMILPSZrmbkz */ |
| 132697 | VR512, VK16WM, VR512, f32mem, |
| 132698 | /* VPERMILPSZrmk */ |
| 132699 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132700 | /* VPERMILPSZrmkz */ |
| 132701 | VR512, VK16WM, VR512, i512mem, |
| 132702 | /* VPERMILPSZrr */ |
| 132703 | VR512, VR512, VR512, |
| 132704 | /* VPERMILPSZrrk */ |
| 132705 | VR512, VR512, VK16WM, VR512, VR512, |
| 132706 | /* VPERMILPSZrrkz */ |
| 132707 | VR512, VK16WM, VR512, VR512, |
| 132708 | /* VPERMILPSmi */ |
| 132709 | VR128, f128mem, u8imm, |
| 132710 | /* VPERMILPSri */ |
| 132711 | VR128, VR128, u8imm, |
| 132712 | /* VPERMILPSrm */ |
| 132713 | VR128, VR128, i128mem, |
| 132714 | /* VPERMILPSrr */ |
| 132715 | VR128, VR128, VR128, |
| 132716 | /* VPERMPDYmi */ |
| 132717 | VR256, f256mem, u8imm, |
| 132718 | /* VPERMPDYri */ |
| 132719 | VR256, VR256, u8imm, |
| 132720 | /* VPERMPDZ256mbi */ |
| 132721 | VR256X, f64mem, u8imm, |
| 132722 | /* VPERMPDZ256mbik */ |
| 132723 | VR256X, VR256X, VK4WM, f64mem, u8imm, |
| 132724 | /* VPERMPDZ256mbikz */ |
| 132725 | VR256X, VK4WM, f64mem, u8imm, |
| 132726 | /* VPERMPDZ256mi */ |
| 132727 | VR256X, f256mem, u8imm, |
| 132728 | /* VPERMPDZ256mik */ |
| 132729 | VR256X, VR256X, VK4WM, f256mem, u8imm, |
| 132730 | /* VPERMPDZ256mikz */ |
| 132731 | VR256X, VK4WM, f256mem, u8imm, |
| 132732 | /* VPERMPDZ256ri */ |
| 132733 | VR256X, VR256X, u8imm, |
| 132734 | /* VPERMPDZ256rik */ |
| 132735 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 132736 | /* VPERMPDZ256rikz */ |
| 132737 | VR256X, VK4WM, VR256X, u8imm, |
| 132738 | /* VPERMPDZ256rm */ |
| 132739 | VR256X, VR256X, f256mem, |
| 132740 | /* VPERMPDZ256rmb */ |
| 132741 | VR256X, VR256X, f64mem, |
| 132742 | /* VPERMPDZ256rmbk */ |
| 132743 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 132744 | /* VPERMPDZ256rmbkz */ |
| 132745 | VR256X, VK4WM, VR256X, f64mem, |
| 132746 | /* VPERMPDZ256rmk */ |
| 132747 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 132748 | /* VPERMPDZ256rmkz */ |
| 132749 | VR256X, VK4WM, VR256X, f256mem, |
| 132750 | /* VPERMPDZ256rr */ |
| 132751 | VR256X, VR256X, VR256X, |
| 132752 | /* VPERMPDZ256rrk */ |
| 132753 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132754 | /* VPERMPDZ256rrkz */ |
| 132755 | VR256X, VK4WM, VR256X, VR256X, |
| 132756 | /* VPERMPDZmbi */ |
| 132757 | VR512, f64mem, u8imm, |
| 132758 | /* VPERMPDZmbik */ |
| 132759 | VR512, VR512, VK8WM, f64mem, u8imm, |
| 132760 | /* VPERMPDZmbikz */ |
| 132761 | VR512, VK8WM, f64mem, u8imm, |
| 132762 | /* VPERMPDZmi */ |
| 132763 | VR512, f512mem, u8imm, |
| 132764 | /* VPERMPDZmik */ |
| 132765 | VR512, VR512, VK8WM, f512mem, u8imm, |
| 132766 | /* VPERMPDZmikz */ |
| 132767 | VR512, VK8WM, f512mem, u8imm, |
| 132768 | /* VPERMPDZri */ |
| 132769 | VR512, VR512, u8imm, |
| 132770 | /* VPERMPDZrik */ |
| 132771 | VR512, VR512, VK8WM, VR512, u8imm, |
| 132772 | /* VPERMPDZrikz */ |
| 132773 | VR512, VK8WM, VR512, u8imm, |
| 132774 | /* VPERMPDZrm */ |
| 132775 | VR512, VR512, f512mem, |
| 132776 | /* VPERMPDZrmb */ |
| 132777 | VR512, VR512, f64mem, |
| 132778 | /* VPERMPDZrmbk */ |
| 132779 | VR512, VR512, VK8WM, VR512, f64mem, |
| 132780 | /* VPERMPDZrmbkz */ |
| 132781 | VR512, VK8WM, VR512, f64mem, |
| 132782 | /* VPERMPDZrmk */ |
| 132783 | VR512, VR512, VK8WM, VR512, f512mem, |
| 132784 | /* VPERMPDZrmkz */ |
| 132785 | VR512, VK8WM, VR512, f512mem, |
| 132786 | /* VPERMPDZrr */ |
| 132787 | VR512, VR512, VR512, |
| 132788 | /* VPERMPDZrrk */ |
| 132789 | VR512, VR512, VK8WM, VR512, VR512, |
| 132790 | /* VPERMPDZrrkz */ |
| 132791 | VR512, VK8WM, VR512, VR512, |
| 132792 | /* VPERMPSYrm */ |
| 132793 | VR256, VR256, f256mem, |
| 132794 | /* VPERMPSYrr */ |
| 132795 | VR256, VR256, VR256, |
| 132796 | /* VPERMPSZ256rm */ |
| 132797 | VR256X, VR256X, f256mem, |
| 132798 | /* VPERMPSZ256rmb */ |
| 132799 | VR256X, VR256X, f32mem, |
| 132800 | /* VPERMPSZ256rmbk */ |
| 132801 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 132802 | /* VPERMPSZ256rmbkz */ |
| 132803 | VR256X, VK8WM, VR256X, f32mem, |
| 132804 | /* VPERMPSZ256rmk */ |
| 132805 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 132806 | /* VPERMPSZ256rmkz */ |
| 132807 | VR256X, VK8WM, VR256X, f256mem, |
| 132808 | /* VPERMPSZ256rr */ |
| 132809 | VR256X, VR256X, VR256X, |
| 132810 | /* VPERMPSZ256rrk */ |
| 132811 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132812 | /* VPERMPSZ256rrkz */ |
| 132813 | VR256X, VK8WM, VR256X, VR256X, |
| 132814 | /* VPERMPSZrm */ |
| 132815 | VR512, VR512, f512mem, |
| 132816 | /* VPERMPSZrmb */ |
| 132817 | VR512, VR512, f32mem, |
| 132818 | /* VPERMPSZrmbk */ |
| 132819 | VR512, VR512, VK16WM, VR512, f32mem, |
| 132820 | /* VPERMPSZrmbkz */ |
| 132821 | VR512, VK16WM, VR512, f32mem, |
| 132822 | /* VPERMPSZrmk */ |
| 132823 | VR512, VR512, VK16WM, VR512, f512mem, |
| 132824 | /* VPERMPSZrmkz */ |
| 132825 | VR512, VK16WM, VR512, f512mem, |
| 132826 | /* VPERMPSZrr */ |
| 132827 | VR512, VR512, VR512, |
| 132828 | /* VPERMPSZrrk */ |
| 132829 | VR512, VR512, VK16WM, VR512, VR512, |
| 132830 | /* VPERMPSZrrkz */ |
| 132831 | VR512, VK16WM, VR512, VR512, |
| 132832 | /* VPERMQYmi */ |
| 132833 | VR256, i256mem, u8imm, |
| 132834 | /* VPERMQYri */ |
| 132835 | VR256, VR256, u8imm, |
| 132836 | /* VPERMQZ256mbi */ |
| 132837 | VR256X, i64mem, u8imm, |
| 132838 | /* VPERMQZ256mbik */ |
| 132839 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 132840 | /* VPERMQZ256mbikz */ |
| 132841 | VR256X, VK4WM, i64mem, u8imm, |
| 132842 | /* VPERMQZ256mi */ |
| 132843 | VR256X, i256mem, u8imm, |
| 132844 | /* VPERMQZ256mik */ |
| 132845 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 132846 | /* VPERMQZ256mikz */ |
| 132847 | VR256X, VK4WM, i256mem, u8imm, |
| 132848 | /* VPERMQZ256ri */ |
| 132849 | VR256X, VR256X, u8imm, |
| 132850 | /* VPERMQZ256rik */ |
| 132851 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 132852 | /* VPERMQZ256rikz */ |
| 132853 | VR256X, VK4WM, VR256X, u8imm, |
| 132854 | /* VPERMQZ256rm */ |
| 132855 | VR256X, VR256X, i256mem, |
| 132856 | /* VPERMQZ256rmb */ |
| 132857 | VR256X, VR256X, i64mem, |
| 132858 | /* VPERMQZ256rmbk */ |
| 132859 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 132860 | /* VPERMQZ256rmbkz */ |
| 132861 | VR256X, VK4WM, VR256X, i64mem, |
| 132862 | /* VPERMQZ256rmk */ |
| 132863 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 132864 | /* VPERMQZ256rmkz */ |
| 132865 | VR256X, VK4WM, VR256X, i256mem, |
| 132866 | /* VPERMQZ256rr */ |
| 132867 | VR256X, VR256X, VR256X, |
| 132868 | /* VPERMQZ256rrk */ |
| 132869 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 132870 | /* VPERMQZ256rrkz */ |
| 132871 | VR256X, VK4WM, VR256X, VR256X, |
| 132872 | /* VPERMQZmbi */ |
| 132873 | VR512, i64mem, u8imm, |
| 132874 | /* VPERMQZmbik */ |
| 132875 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 132876 | /* VPERMQZmbikz */ |
| 132877 | VR512, VK8WM, i64mem, u8imm, |
| 132878 | /* VPERMQZmi */ |
| 132879 | VR512, i512mem, u8imm, |
| 132880 | /* VPERMQZmik */ |
| 132881 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 132882 | /* VPERMQZmikz */ |
| 132883 | VR512, VK8WM, i512mem, u8imm, |
| 132884 | /* VPERMQZri */ |
| 132885 | VR512, VR512, u8imm, |
| 132886 | /* VPERMQZrik */ |
| 132887 | VR512, VR512, VK8WM, VR512, u8imm, |
| 132888 | /* VPERMQZrikz */ |
| 132889 | VR512, VK8WM, VR512, u8imm, |
| 132890 | /* VPERMQZrm */ |
| 132891 | VR512, VR512, i512mem, |
| 132892 | /* VPERMQZrmb */ |
| 132893 | VR512, VR512, i64mem, |
| 132894 | /* VPERMQZrmbk */ |
| 132895 | VR512, VR512, VK8WM, VR512, i64mem, |
| 132896 | /* VPERMQZrmbkz */ |
| 132897 | VR512, VK8WM, VR512, i64mem, |
| 132898 | /* VPERMQZrmk */ |
| 132899 | VR512, VR512, VK8WM, VR512, i512mem, |
| 132900 | /* VPERMQZrmkz */ |
| 132901 | VR512, VK8WM, VR512, i512mem, |
| 132902 | /* VPERMQZrr */ |
| 132903 | VR512, VR512, VR512, |
| 132904 | /* VPERMQZrrk */ |
| 132905 | VR512, VR512, VK8WM, VR512, VR512, |
| 132906 | /* VPERMQZrrkz */ |
| 132907 | VR512, VK8WM, VR512, VR512, |
| 132908 | /* VPERMT2BZ128rm */ |
| 132909 | VR128X, VR128X, VR128X, i128mem, |
| 132910 | /* VPERMT2BZ128rmk */ |
| 132911 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 132912 | /* VPERMT2BZ128rmkz */ |
| 132913 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 132914 | /* VPERMT2BZ128rr */ |
| 132915 | VR128X, VR128X, VR128X, VR128X, |
| 132916 | /* VPERMT2BZ128rrk */ |
| 132917 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 132918 | /* VPERMT2BZ128rrkz */ |
| 132919 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 132920 | /* VPERMT2BZ256rm */ |
| 132921 | VR256X, VR256X, VR256X, i256mem, |
| 132922 | /* VPERMT2BZ256rmk */ |
| 132923 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 132924 | /* VPERMT2BZ256rmkz */ |
| 132925 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 132926 | /* VPERMT2BZ256rr */ |
| 132927 | VR256X, VR256X, VR256X, VR256X, |
| 132928 | /* VPERMT2BZ256rrk */ |
| 132929 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 132930 | /* VPERMT2BZ256rrkz */ |
| 132931 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 132932 | /* VPERMT2BZrm */ |
| 132933 | VR512, VR512, VR512, i512mem, |
| 132934 | /* VPERMT2BZrmk */ |
| 132935 | VR512, VR512, VK64WM, VR512, i512mem, |
| 132936 | /* VPERMT2BZrmkz */ |
| 132937 | VR512, VR512, VK64WM, VR512, i512mem, |
| 132938 | /* VPERMT2BZrr */ |
| 132939 | VR512, VR512, VR512, VR512, |
| 132940 | /* VPERMT2BZrrk */ |
| 132941 | VR512, VR512, VK64WM, VR512, VR512, |
| 132942 | /* VPERMT2BZrrkz */ |
| 132943 | VR512, VR512, VK64WM, VR512, VR512, |
| 132944 | /* VPERMT2DZ128rm */ |
| 132945 | VR128X, VR128X, VR128X, i128mem, |
| 132946 | /* VPERMT2DZ128rmb */ |
| 132947 | VR128X, VR128X, VR128X, i32mem, |
| 132948 | /* VPERMT2DZ128rmbk */ |
| 132949 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 132950 | /* VPERMT2DZ128rmbkz */ |
| 132951 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 132952 | /* VPERMT2DZ128rmk */ |
| 132953 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 132954 | /* VPERMT2DZ128rmkz */ |
| 132955 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 132956 | /* VPERMT2DZ128rr */ |
| 132957 | VR128X, VR128X, VR128X, VR128X, |
| 132958 | /* VPERMT2DZ128rrk */ |
| 132959 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132960 | /* VPERMT2DZ128rrkz */ |
| 132961 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 132962 | /* VPERMT2DZ256rm */ |
| 132963 | VR256X, VR256X, VR256X, i256mem, |
| 132964 | /* VPERMT2DZ256rmb */ |
| 132965 | VR256X, VR256X, VR256X, i32mem, |
| 132966 | /* VPERMT2DZ256rmbk */ |
| 132967 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 132968 | /* VPERMT2DZ256rmbkz */ |
| 132969 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 132970 | /* VPERMT2DZ256rmk */ |
| 132971 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132972 | /* VPERMT2DZ256rmkz */ |
| 132973 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 132974 | /* VPERMT2DZ256rr */ |
| 132975 | VR256X, VR256X, VR256X, VR256X, |
| 132976 | /* VPERMT2DZ256rrk */ |
| 132977 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132978 | /* VPERMT2DZ256rrkz */ |
| 132979 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 132980 | /* VPERMT2DZrm */ |
| 132981 | VR512, VR512, VR512, i512mem, |
| 132982 | /* VPERMT2DZrmb */ |
| 132983 | VR512, VR512, VR512, i32mem, |
| 132984 | /* VPERMT2DZrmbk */ |
| 132985 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132986 | /* VPERMT2DZrmbkz */ |
| 132987 | VR512, VR512, VK16WM, VR512, i32mem, |
| 132988 | /* VPERMT2DZrmk */ |
| 132989 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132990 | /* VPERMT2DZrmkz */ |
| 132991 | VR512, VR512, VK16WM, VR512, i512mem, |
| 132992 | /* VPERMT2DZrr */ |
| 132993 | VR512, VR512, VR512, VR512, |
| 132994 | /* VPERMT2DZrrk */ |
| 132995 | VR512, VR512, VK16WM, VR512, VR512, |
| 132996 | /* VPERMT2DZrrkz */ |
| 132997 | VR512, VR512, VK16WM, VR512, VR512, |
| 132998 | /* VPERMT2PDZ128rm */ |
| 132999 | VR128X, VR128X, VR128X, f128mem, |
| 133000 | /* VPERMT2PDZ128rmb */ |
| 133001 | VR128X, VR128X, VR128X, f64mem, |
| 133002 | /* VPERMT2PDZ128rmbk */ |
| 133003 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 133004 | /* VPERMT2PDZ128rmbkz */ |
| 133005 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 133006 | /* VPERMT2PDZ128rmk */ |
| 133007 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 133008 | /* VPERMT2PDZ128rmkz */ |
| 133009 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 133010 | /* VPERMT2PDZ128rr */ |
| 133011 | VR128X, VR128X, VR128X, VR128X, |
| 133012 | /* VPERMT2PDZ128rrk */ |
| 133013 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133014 | /* VPERMT2PDZ128rrkz */ |
| 133015 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133016 | /* VPERMT2PDZ256rm */ |
| 133017 | VR256X, VR256X, VR256X, f256mem, |
| 133018 | /* VPERMT2PDZ256rmb */ |
| 133019 | VR256X, VR256X, VR256X, f64mem, |
| 133020 | /* VPERMT2PDZ256rmbk */ |
| 133021 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 133022 | /* VPERMT2PDZ256rmbkz */ |
| 133023 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 133024 | /* VPERMT2PDZ256rmk */ |
| 133025 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 133026 | /* VPERMT2PDZ256rmkz */ |
| 133027 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 133028 | /* VPERMT2PDZ256rr */ |
| 133029 | VR256X, VR256X, VR256X, VR256X, |
| 133030 | /* VPERMT2PDZ256rrk */ |
| 133031 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 133032 | /* VPERMT2PDZ256rrkz */ |
| 133033 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 133034 | /* VPERMT2PDZrm */ |
| 133035 | VR512, VR512, VR512, f512mem, |
| 133036 | /* VPERMT2PDZrmb */ |
| 133037 | VR512, VR512, VR512, f64mem, |
| 133038 | /* VPERMT2PDZrmbk */ |
| 133039 | VR512, VR512, VK8WM, VR512, f64mem, |
| 133040 | /* VPERMT2PDZrmbkz */ |
| 133041 | VR512, VR512, VK8WM, VR512, f64mem, |
| 133042 | /* VPERMT2PDZrmk */ |
| 133043 | VR512, VR512, VK8WM, VR512, f512mem, |
| 133044 | /* VPERMT2PDZrmkz */ |
| 133045 | VR512, VR512, VK8WM, VR512, f512mem, |
| 133046 | /* VPERMT2PDZrr */ |
| 133047 | VR512, VR512, VR512, VR512, |
| 133048 | /* VPERMT2PDZrrk */ |
| 133049 | VR512, VR512, VK8WM, VR512, VR512, |
| 133050 | /* VPERMT2PDZrrkz */ |
| 133051 | VR512, VR512, VK8WM, VR512, VR512, |
| 133052 | /* VPERMT2PSZ128rm */ |
| 133053 | VR128X, VR128X, VR128X, f128mem, |
| 133054 | /* VPERMT2PSZ128rmb */ |
| 133055 | VR128X, VR128X, VR128X, f32mem, |
| 133056 | /* VPERMT2PSZ128rmbk */ |
| 133057 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 133058 | /* VPERMT2PSZ128rmbkz */ |
| 133059 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 133060 | /* VPERMT2PSZ128rmk */ |
| 133061 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 133062 | /* VPERMT2PSZ128rmkz */ |
| 133063 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 133064 | /* VPERMT2PSZ128rr */ |
| 133065 | VR128X, VR128X, VR128X, VR128X, |
| 133066 | /* VPERMT2PSZ128rrk */ |
| 133067 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 133068 | /* VPERMT2PSZ128rrkz */ |
| 133069 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 133070 | /* VPERMT2PSZ256rm */ |
| 133071 | VR256X, VR256X, VR256X, f256mem, |
| 133072 | /* VPERMT2PSZ256rmb */ |
| 133073 | VR256X, VR256X, VR256X, f32mem, |
| 133074 | /* VPERMT2PSZ256rmbk */ |
| 133075 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 133076 | /* VPERMT2PSZ256rmbkz */ |
| 133077 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 133078 | /* VPERMT2PSZ256rmk */ |
| 133079 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 133080 | /* VPERMT2PSZ256rmkz */ |
| 133081 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 133082 | /* VPERMT2PSZ256rr */ |
| 133083 | VR256X, VR256X, VR256X, VR256X, |
| 133084 | /* VPERMT2PSZ256rrk */ |
| 133085 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 133086 | /* VPERMT2PSZ256rrkz */ |
| 133087 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 133088 | /* VPERMT2PSZrm */ |
| 133089 | VR512, VR512, VR512, f512mem, |
| 133090 | /* VPERMT2PSZrmb */ |
| 133091 | VR512, VR512, VR512, f32mem, |
| 133092 | /* VPERMT2PSZrmbk */ |
| 133093 | VR512, VR512, VK16WM, VR512, f32mem, |
| 133094 | /* VPERMT2PSZrmbkz */ |
| 133095 | VR512, VR512, VK16WM, VR512, f32mem, |
| 133096 | /* VPERMT2PSZrmk */ |
| 133097 | VR512, VR512, VK16WM, VR512, f512mem, |
| 133098 | /* VPERMT2PSZrmkz */ |
| 133099 | VR512, VR512, VK16WM, VR512, f512mem, |
| 133100 | /* VPERMT2PSZrr */ |
| 133101 | VR512, VR512, VR512, VR512, |
| 133102 | /* VPERMT2PSZrrk */ |
| 133103 | VR512, VR512, VK16WM, VR512, VR512, |
| 133104 | /* VPERMT2PSZrrkz */ |
| 133105 | VR512, VR512, VK16WM, VR512, VR512, |
| 133106 | /* VPERMT2QZ128rm */ |
| 133107 | VR128X, VR128X, VR128X, i128mem, |
| 133108 | /* VPERMT2QZ128rmb */ |
| 133109 | VR128X, VR128X, VR128X, i64mem, |
| 133110 | /* VPERMT2QZ128rmbk */ |
| 133111 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 133112 | /* VPERMT2QZ128rmbkz */ |
| 133113 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 133114 | /* VPERMT2QZ128rmk */ |
| 133115 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 133116 | /* VPERMT2QZ128rmkz */ |
| 133117 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 133118 | /* VPERMT2QZ128rr */ |
| 133119 | VR128X, VR128X, VR128X, VR128X, |
| 133120 | /* VPERMT2QZ128rrk */ |
| 133121 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133122 | /* VPERMT2QZ128rrkz */ |
| 133123 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133124 | /* VPERMT2QZ256rm */ |
| 133125 | VR256X, VR256X, VR256X, i256mem, |
| 133126 | /* VPERMT2QZ256rmb */ |
| 133127 | VR256X, VR256X, VR256X, i64mem, |
| 133128 | /* VPERMT2QZ256rmbk */ |
| 133129 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 133130 | /* VPERMT2QZ256rmbkz */ |
| 133131 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 133132 | /* VPERMT2QZ256rmk */ |
| 133133 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 133134 | /* VPERMT2QZ256rmkz */ |
| 133135 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 133136 | /* VPERMT2QZ256rr */ |
| 133137 | VR256X, VR256X, VR256X, VR256X, |
| 133138 | /* VPERMT2QZ256rrk */ |
| 133139 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 133140 | /* VPERMT2QZ256rrkz */ |
| 133141 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 133142 | /* VPERMT2QZrm */ |
| 133143 | VR512, VR512, VR512, i512mem, |
| 133144 | /* VPERMT2QZrmb */ |
| 133145 | VR512, VR512, VR512, i64mem, |
| 133146 | /* VPERMT2QZrmbk */ |
| 133147 | VR512, VR512, VK8WM, VR512, i64mem, |
| 133148 | /* VPERMT2QZrmbkz */ |
| 133149 | VR512, VR512, VK8WM, VR512, i64mem, |
| 133150 | /* VPERMT2QZrmk */ |
| 133151 | VR512, VR512, VK8WM, VR512, i512mem, |
| 133152 | /* VPERMT2QZrmkz */ |
| 133153 | VR512, VR512, VK8WM, VR512, i512mem, |
| 133154 | /* VPERMT2QZrr */ |
| 133155 | VR512, VR512, VR512, VR512, |
| 133156 | /* VPERMT2QZrrk */ |
| 133157 | VR512, VR512, VK8WM, VR512, VR512, |
| 133158 | /* VPERMT2QZrrkz */ |
| 133159 | VR512, VR512, VK8WM, VR512, VR512, |
| 133160 | /* VPERMT2WZ128rm */ |
| 133161 | VR128X, VR128X, VR128X, i128mem, |
| 133162 | /* VPERMT2WZ128rmk */ |
| 133163 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 133164 | /* VPERMT2WZ128rmkz */ |
| 133165 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 133166 | /* VPERMT2WZ128rr */ |
| 133167 | VR128X, VR128X, VR128X, VR128X, |
| 133168 | /* VPERMT2WZ128rrk */ |
| 133169 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 133170 | /* VPERMT2WZ128rrkz */ |
| 133171 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 133172 | /* VPERMT2WZ256rm */ |
| 133173 | VR256X, VR256X, VR256X, i256mem, |
| 133174 | /* VPERMT2WZ256rmk */ |
| 133175 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 133176 | /* VPERMT2WZ256rmkz */ |
| 133177 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 133178 | /* VPERMT2WZ256rr */ |
| 133179 | VR256X, VR256X, VR256X, VR256X, |
| 133180 | /* VPERMT2WZ256rrk */ |
| 133181 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 133182 | /* VPERMT2WZ256rrkz */ |
| 133183 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 133184 | /* VPERMT2WZrm */ |
| 133185 | VR512, VR512, VR512, i512mem, |
| 133186 | /* VPERMT2WZrmk */ |
| 133187 | VR512, VR512, VK32WM, VR512, i512mem, |
| 133188 | /* VPERMT2WZrmkz */ |
| 133189 | VR512, VR512, VK32WM, VR512, i512mem, |
| 133190 | /* VPERMT2WZrr */ |
| 133191 | VR512, VR512, VR512, VR512, |
| 133192 | /* VPERMT2WZrrk */ |
| 133193 | VR512, VR512, VK32WM, VR512, VR512, |
| 133194 | /* VPERMT2WZrrkz */ |
| 133195 | VR512, VR512, VK32WM, VR512, VR512, |
| 133196 | /* VPERMWZ128rm */ |
| 133197 | VR128X, VR128X, i128mem, |
| 133198 | /* VPERMWZ128rmk */ |
| 133199 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 133200 | /* VPERMWZ128rmkz */ |
| 133201 | VR128X, VK8WM, VR128X, i128mem, |
| 133202 | /* VPERMWZ128rr */ |
| 133203 | VR128X, VR128X, VR128X, |
| 133204 | /* VPERMWZ128rrk */ |
| 133205 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 133206 | /* VPERMWZ128rrkz */ |
| 133207 | VR128X, VK8WM, VR128X, VR128X, |
| 133208 | /* VPERMWZ256rm */ |
| 133209 | VR256X, VR256X, i256mem, |
| 133210 | /* VPERMWZ256rmk */ |
| 133211 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 133212 | /* VPERMWZ256rmkz */ |
| 133213 | VR256X, VK16WM, VR256X, i256mem, |
| 133214 | /* VPERMWZ256rr */ |
| 133215 | VR256X, VR256X, VR256X, |
| 133216 | /* VPERMWZ256rrk */ |
| 133217 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 133218 | /* VPERMWZ256rrkz */ |
| 133219 | VR256X, VK16WM, VR256X, VR256X, |
| 133220 | /* VPERMWZrm */ |
| 133221 | VR512, VR512, i512mem, |
| 133222 | /* VPERMWZrmk */ |
| 133223 | VR512, VR512, VK32WM, VR512, i512mem, |
| 133224 | /* VPERMWZrmkz */ |
| 133225 | VR512, VK32WM, VR512, i512mem, |
| 133226 | /* VPERMWZrr */ |
| 133227 | VR512, VR512, VR512, |
| 133228 | /* VPERMWZrrk */ |
| 133229 | VR512, VR512, VK32WM, VR512, VR512, |
| 133230 | /* VPERMWZrrkz */ |
| 133231 | VR512, VK32WM, VR512, VR512, |
| 133232 | /* VPEXPANDBZ128rm */ |
| 133233 | VR128X, i128mem, |
| 133234 | /* VPEXPANDBZ128rmk */ |
| 133235 | VR128X, VR128X, VK16WM, i128mem, |
| 133236 | /* VPEXPANDBZ128rmkz */ |
| 133237 | VR128X, VK16WM, i128mem, |
| 133238 | /* VPEXPANDBZ128rr */ |
| 133239 | VR128X, VR128X, |
| 133240 | /* VPEXPANDBZ128rrk */ |
| 133241 | VR128X, VR128X, VK16WM, VR128X, |
| 133242 | /* VPEXPANDBZ128rrkz */ |
| 133243 | VR128X, VK16WM, VR128X, |
| 133244 | /* VPEXPANDBZ256rm */ |
| 133245 | VR256X, i256mem, |
| 133246 | /* VPEXPANDBZ256rmk */ |
| 133247 | VR256X, VR256X, VK32WM, i256mem, |
| 133248 | /* VPEXPANDBZ256rmkz */ |
| 133249 | VR256X, VK32WM, i256mem, |
| 133250 | /* VPEXPANDBZ256rr */ |
| 133251 | VR256X, VR256X, |
| 133252 | /* VPEXPANDBZ256rrk */ |
| 133253 | VR256X, VR256X, VK32WM, VR256X, |
| 133254 | /* VPEXPANDBZ256rrkz */ |
| 133255 | VR256X, VK32WM, VR256X, |
| 133256 | /* VPEXPANDBZrm */ |
| 133257 | VR512, i512mem, |
| 133258 | /* VPEXPANDBZrmk */ |
| 133259 | VR512, VR512, VK64WM, i512mem, |
| 133260 | /* VPEXPANDBZrmkz */ |
| 133261 | VR512, VK64WM, i512mem, |
| 133262 | /* VPEXPANDBZrr */ |
| 133263 | VR512, VR512, |
| 133264 | /* VPEXPANDBZrrk */ |
| 133265 | VR512, VR512, VK64WM, VR512, |
| 133266 | /* VPEXPANDBZrrkz */ |
| 133267 | VR512, VK64WM, VR512, |
| 133268 | /* VPEXPANDDZ128rm */ |
| 133269 | VR128X, i128mem, |
| 133270 | /* VPEXPANDDZ128rmk */ |
| 133271 | VR128X, VR128X, VK4WM, i128mem, |
| 133272 | /* VPEXPANDDZ128rmkz */ |
| 133273 | VR128X, VK4WM, i128mem, |
| 133274 | /* VPEXPANDDZ128rr */ |
| 133275 | VR128X, VR128X, |
| 133276 | /* VPEXPANDDZ128rrk */ |
| 133277 | VR128X, VR128X, VK4WM, VR128X, |
| 133278 | /* VPEXPANDDZ128rrkz */ |
| 133279 | VR128X, VK4WM, VR128X, |
| 133280 | /* VPEXPANDDZ256rm */ |
| 133281 | VR256X, i256mem, |
| 133282 | /* VPEXPANDDZ256rmk */ |
| 133283 | VR256X, VR256X, VK8WM, i256mem, |
| 133284 | /* VPEXPANDDZ256rmkz */ |
| 133285 | VR256X, VK8WM, i256mem, |
| 133286 | /* VPEXPANDDZ256rr */ |
| 133287 | VR256X, VR256X, |
| 133288 | /* VPEXPANDDZ256rrk */ |
| 133289 | VR256X, VR256X, VK8WM, VR256X, |
| 133290 | /* VPEXPANDDZ256rrkz */ |
| 133291 | VR256X, VK8WM, VR256X, |
| 133292 | /* VPEXPANDDZrm */ |
| 133293 | VR512, i512mem, |
| 133294 | /* VPEXPANDDZrmk */ |
| 133295 | VR512, VR512, VK16WM, i512mem, |
| 133296 | /* VPEXPANDDZrmkz */ |
| 133297 | VR512, VK16WM, i512mem, |
| 133298 | /* VPEXPANDDZrr */ |
| 133299 | VR512, VR512, |
| 133300 | /* VPEXPANDDZrrk */ |
| 133301 | VR512, VR512, VK16WM, VR512, |
| 133302 | /* VPEXPANDDZrrkz */ |
| 133303 | VR512, VK16WM, VR512, |
| 133304 | /* VPEXPANDQZ128rm */ |
| 133305 | VR128X, i128mem, |
| 133306 | /* VPEXPANDQZ128rmk */ |
| 133307 | VR128X, VR128X, VK2WM, i128mem, |
| 133308 | /* VPEXPANDQZ128rmkz */ |
| 133309 | VR128X, VK2WM, i128mem, |
| 133310 | /* VPEXPANDQZ128rr */ |
| 133311 | VR128X, VR128X, |
| 133312 | /* VPEXPANDQZ128rrk */ |
| 133313 | VR128X, VR128X, VK2WM, VR128X, |
| 133314 | /* VPEXPANDQZ128rrkz */ |
| 133315 | VR128X, VK2WM, VR128X, |
| 133316 | /* VPEXPANDQZ256rm */ |
| 133317 | VR256X, i256mem, |
| 133318 | /* VPEXPANDQZ256rmk */ |
| 133319 | VR256X, VR256X, VK4WM, i256mem, |
| 133320 | /* VPEXPANDQZ256rmkz */ |
| 133321 | VR256X, VK4WM, i256mem, |
| 133322 | /* VPEXPANDQZ256rr */ |
| 133323 | VR256X, VR256X, |
| 133324 | /* VPEXPANDQZ256rrk */ |
| 133325 | VR256X, VR256X, VK4WM, VR256X, |
| 133326 | /* VPEXPANDQZ256rrkz */ |
| 133327 | VR256X, VK4WM, VR256X, |
| 133328 | /* VPEXPANDQZrm */ |
| 133329 | VR512, i512mem, |
| 133330 | /* VPEXPANDQZrmk */ |
| 133331 | VR512, VR512, VK8WM, i512mem, |
| 133332 | /* VPEXPANDQZrmkz */ |
| 133333 | VR512, VK8WM, i512mem, |
| 133334 | /* VPEXPANDQZrr */ |
| 133335 | VR512, VR512, |
| 133336 | /* VPEXPANDQZrrk */ |
| 133337 | VR512, VR512, VK8WM, VR512, |
| 133338 | /* VPEXPANDQZrrkz */ |
| 133339 | VR512, VK8WM, VR512, |
| 133340 | /* VPEXPANDWZ128rm */ |
| 133341 | VR128X, i128mem, |
| 133342 | /* VPEXPANDWZ128rmk */ |
| 133343 | VR128X, VR128X, VK8WM, i128mem, |
| 133344 | /* VPEXPANDWZ128rmkz */ |
| 133345 | VR128X, VK8WM, i128mem, |
| 133346 | /* VPEXPANDWZ128rr */ |
| 133347 | VR128X, VR128X, |
| 133348 | /* VPEXPANDWZ128rrk */ |
| 133349 | VR128X, VR128X, VK8WM, VR128X, |
| 133350 | /* VPEXPANDWZ128rrkz */ |
| 133351 | VR128X, VK8WM, VR128X, |
| 133352 | /* VPEXPANDWZ256rm */ |
| 133353 | VR256X, i256mem, |
| 133354 | /* VPEXPANDWZ256rmk */ |
| 133355 | VR256X, VR256X, VK16WM, i256mem, |
| 133356 | /* VPEXPANDWZ256rmkz */ |
| 133357 | VR256X, VK16WM, i256mem, |
| 133358 | /* VPEXPANDWZ256rr */ |
| 133359 | VR256X, VR256X, |
| 133360 | /* VPEXPANDWZ256rrk */ |
| 133361 | VR256X, VR256X, VK16WM, VR256X, |
| 133362 | /* VPEXPANDWZ256rrkz */ |
| 133363 | VR256X, VK16WM, VR256X, |
| 133364 | /* VPEXPANDWZrm */ |
| 133365 | VR512, i512mem, |
| 133366 | /* VPEXPANDWZrmk */ |
| 133367 | VR512, VR512, VK32WM, i512mem, |
| 133368 | /* VPEXPANDWZrmkz */ |
| 133369 | VR512, VK32WM, i512mem, |
| 133370 | /* VPEXPANDWZrr */ |
| 133371 | VR512, VR512, |
| 133372 | /* VPEXPANDWZrrk */ |
| 133373 | VR512, VR512, VK32WM, VR512, |
| 133374 | /* VPEXPANDWZrrkz */ |
| 133375 | VR512, VK32WM, VR512, |
| 133376 | /* VPEXTRBZmr */ |
| 133377 | i8mem, VR128X, u8imm, |
| 133378 | /* VPEXTRBZrr */ |
| 133379 | GR32orGR64, VR128X, u8imm, |
| 133380 | /* VPEXTRBmr */ |
| 133381 | i8mem, VR128, u8imm, |
| 133382 | /* VPEXTRBrr */ |
| 133383 | GR32orGR64, VR128, u8imm, |
| 133384 | /* VPEXTRDZmr */ |
| 133385 | i32mem, VR128X, u8imm, |
| 133386 | /* VPEXTRDZrr */ |
| 133387 | GR32, VR128X, u8imm, |
| 133388 | /* VPEXTRDmr */ |
| 133389 | i32mem, VR128, u8imm, |
| 133390 | /* VPEXTRDrr */ |
| 133391 | GR32, VR128, u8imm, |
| 133392 | /* VPEXTRQZmr */ |
| 133393 | i64mem, VR128X, u8imm, |
| 133394 | /* VPEXTRQZrr */ |
| 133395 | GR64, VR128X, u8imm, |
| 133396 | /* VPEXTRQmr */ |
| 133397 | i64mem, VR128, u8imm, |
| 133398 | /* VPEXTRQrr */ |
| 133399 | GR64, VR128, u8imm, |
| 133400 | /* VPEXTRWZmr */ |
| 133401 | i16mem, VR128X, u8imm, |
| 133402 | /* VPEXTRWZrr */ |
| 133403 | GR32orGR64, VR128X, u8imm, |
| 133404 | /* VPEXTRWZrr_REV */ |
| 133405 | GR32orGR64, VR128X, u8imm, |
| 133406 | /* VPEXTRWmr */ |
| 133407 | i16mem, VR128, u8imm, |
| 133408 | /* VPEXTRWrr */ |
| 133409 | GR32orGR64, VR128, u8imm, |
| 133410 | /* VPEXTRWrr_REV */ |
| 133411 | GR32orGR64, VR128, u8imm, |
| 133412 | /* VPGATHERDDYrm */ |
| 133413 | VR256, VR256, VR256, vy256mem, VR256, |
| 133414 | /* VPGATHERDDZ128rm */ |
| 133415 | VR128X, VK4WM, VR128X, VK4WM, vx128xmem, |
| 133416 | /* VPGATHERDDZ256rm */ |
| 133417 | VR256X, VK8WM, VR256X, VK8WM, vy256xmem, |
| 133418 | /* VPGATHERDDZrm */ |
| 133419 | VR512, VK16WM, VR512, VK16WM, vz512mem, |
| 133420 | /* VPGATHERDDrm */ |
| 133421 | VR128, VR128, VR128, vx128mem, VR128, |
| 133422 | /* VPGATHERDQYrm */ |
| 133423 | VR256, VR256, VR256, vx256mem, VR256, |
| 133424 | /* VPGATHERDQZ128rm */ |
| 133425 | VR128X, VK2WM, VR128X, VK2WM, vx128xmem, |
| 133426 | /* VPGATHERDQZ256rm */ |
| 133427 | VR256X, VK4WM, VR256X, VK4WM, vx256xmem, |
| 133428 | /* VPGATHERDQZrm */ |
| 133429 | VR512, VK8WM, VR512, VK8WM, vy512xmem, |
| 133430 | /* VPGATHERDQrm */ |
| 133431 | VR128, VR128, VR128, vx128mem, VR128, |
| 133432 | /* VPGATHERQDYrm */ |
| 133433 | VR128, VR128, VR128, vy128mem, VR128, |
| 133434 | /* VPGATHERQDZ128rm */ |
| 133435 | VR128X, VK2WM, VR128X, VK2WM, vx64xmem, |
| 133436 | /* VPGATHERQDZ256rm */ |
| 133437 | VR128X, VK4WM, VR128X, VK4WM, vy128xmem, |
| 133438 | /* VPGATHERQDZrm */ |
| 133439 | VR256X, VK8WM, VR256X, VK8WM, vz256mem, |
| 133440 | /* VPGATHERQDrm */ |
| 133441 | VR128, VR128, VR128, vx64mem, VR128, |
| 133442 | /* VPGATHERQQYrm */ |
| 133443 | VR256, VR256, VR256, vy256mem, VR256, |
| 133444 | /* VPGATHERQQZ128rm */ |
| 133445 | VR128X, VK2WM, VR128X, VK2WM, vx128xmem, |
| 133446 | /* VPGATHERQQZ256rm */ |
| 133447 | VR256X, VK4WM, VR256X, VK4WM, vy256xmem, |
| 133448 | /* VPGATHERQQZrm */ |
| 133449 | VR512, VK8WM, VR512, VK8WM, vz512mem, |
| 133450 | /* VPGATHERQQrm */ |
| 133451 | VR128, VR128, VR128, vx128mem, VR128, |
| 133452 | /* VPHADDBDrm */ |
| 133453 | VR128, i128mem, |
| 133454 | /* VPHADDBDrr */ |
| 133455 | VR128, VR128, |
| 133456 | /* VPHADDBQrm */ |
| 133457 | VR128, i128mem, |
| 133458 | /* VPHADDBQrr */ |
| 133459 | VR128, VR128, |
| 133460 | /* VPHADDBWrm */ |
| 133461 | VR128, i128mem, |
| 133462 | /* VPHADDBWrr */ |
| 133463 | VR128, VR128, |
| 133464 | /* VPHADDDQrm */ |
| 133465 | VR128, i128mem, |
| 133466 | /* VPHADDDQrr */ |
| 133467 | VR128, VR128, |
| 133468 | /* VPHADDDYrm */ |
| 133469 | VR256, VR256, i256mem, |
| 133470 | /* VPHADDDYrr */ |
| 133471 | VR256, VR256, VR256, |
| 133472 | /* VPHADDDrm */ |
| 133473 | VR128, VR128, i128mem, |
| 133474 | /* VPHADDDrr */ |
| 133475 | VR128, VR128, VR128, |
| 133476 | /* VPHADDSWYrm */ |
| 133477 | VR256, VR256, i256mem, |
| 133478 | /* VPHADDSWYrr */ |
| 133479 | VR256, VR256, VR256, |
| 133480 | /* VPHADDSWrm */ |
| 133481 | VR128, VR128, i128mem, |
| 133482 | /* VPHADDSWrr */ |
| 133483 | VR128, VR128, VR128, |
| 133484 | /* VPHADDUBDrm */ |
| 133485 | VR128, i128mem, |
| 133486 | /* VPHADDUBDrr */ |
| 133487 | VR128, VR128, |
| 133488 | /* VPHADDUBQrm */ |
| 133489 | VR128, i128mem, |
| 133490 | /* VPHADDUBQrr */ |
| 133491 | VR128, VR128, |
| 133492 | /* VPHADDUBWrm */ |
| 133493 | VR128, i128mem, |
| 133494 | /* VPHADDUBWrr */ |
| 133495 | VR128, VR128, |
| 133496 | /* VPHADDUDQrm */ |
| 133497 | VR128, i128mem, |
| 133498 | /* VPHADDUDQrr */ |
| 133499 | VR128, VR128, |
| 133500 | /* VPHADDUWDrm */ |
| 133501 | VR128, i128mem, |
| 133502 | /* VPHADDUWDrr */ |
| 133503 | VR128, VR128, |
| 133504 | /* VPHADDUWQrm */ |
| 133505 | VR128, i128mem, |
| 133506 | /* VPHADDUWQrr */ |
| 133507 | VR128, VR128, |
| 133508 | /* VPHADDWDrm */ |
| 133509 | VR128, i128mem, |
| 133510 | /* VPHADDWDrr */ |
| 133511 | VR128, VR128, |
| 133512 | /* VPHADDWQrm */ |
| 133513 | VR128, i128mem, |
| 133514 | /* VPHADDWQrr */ |
| 133515 | VR128, VR128, |
| 133516 | /* VPHADDWYrm */ |
| 133517 | VR256, VR256, i256mem, |
| 133518 | /* VPHADDWYrr */ |
| 133519 | VR256, VR256, VR256, |
| 133520 | /* VPHADDWrm */ |
| 133521 | VR128, VR128, i128mem, |
| 133522 | /* VPHADDWrr */ |
| 133523 | VR128, VR128, VR128, |
| 133524 | /* VPHMINPOSUWrm */ |
| 133525 | VR128, i128mem, |
| 133526 | /* VPHMINPOSUWrr */ |
| 133527 | VR128, VR128, |
| 133528 | /* VPHSUBBWrm */ |
| 133529 | VR128, i128mem, |
| 133530 | /* VPHSUBBWrr */ |
| 133531 | VR128, VR128, |
| 133532 | /* VPHSUBDQrm */ |
| 133533 | VR128, i128mem, |
| 133534 | /* VPHSUBDQrr */ |
| 133535 | VR128, VR128, |
| 133536 | /* VPHSUBDYrm */ |
| 133537 | VR256, VR256, i256mem, |
| 133538 | /* VPHSUBDYrr */ |
| 133539 | VR256, VR256, VR256, |
| 133540 | /* VPHSUBDrm */ |
| 133541 | VR128, VR128, i128mem, |
| 133542 | /* VPHSUBDrr */ |
| 133543 | VR128, VR128, VR128, |
| 133544 | /* VPHSUBSWYrm */ |
| 133545 | VR256, VR256, i256mem, |
| 133546 | /* VPHSUBSWYrr */ |
| 133547 | VR256, VR256, VR256, |
| 133548 | /* VPHSUBSWrm */ |
| 133549 | VR128, VR128, i128mem, |
| 133550 | /* VPHSUBSWrr */ |
| 133551 | VR128, VR128, VR128, |
| 133552 | /* VPHSUBWDrm */ |
| 133553 | VR128, i128mem, |
| 133554 | /* VPHSUBWDrr */ |
| 133555 | VR128, VR128, |
| 133556 | /* VPHSUBWYrm */ |
| 133557 | VR256, VR256, i256mem, |
| 133558 | /* VPHSUBWYrr */ |
| 133559 | VR256, VR256, VR256, |
| 133560 | /* VPHSUBWrm */ |
| 133561 | VR128, VR128, i128mem, |
| 133562 | /* VPHSUBWrr */ |
| 133563 | VR128, VR128, VR128, |
| 133564 | /* VPINSRBZrm */ |
| 133565 | VR128X, VR128X, i8mem, u8imm, |
| 133566 | /* VPINSRBZrr */ |
| 133567 | VR128X, VR128X, GR32orGR64, u8imm, |
| 133568 | /* VPINSRBrm */ |
| 133569 | VR128, VR128, i8mem, u8imm, |
| 133570 | /* VPINSRBrr */ |
| 133571 | VR128, VR128, GR32orGR64, u8imm, |
| 133572 | /* VPINSRDZrm */ |
| 133573 | VR128X, VR128X, i32mem, u8imm, |
| 133574 | /* VPINSRDZrr */ |
| 133575 | VR128X, VR128X, GR32, u8imm, |
| 133576 | /* VPINSRDrm */ |
| 133577 | VR128, VR128, i32mem, u8imm, |
| 133578 | /* VPINSRDrr */ |
| 133579 | VR128, VR128, GR32, u8imm, |
| 133580 | /* VPINSRQZrm */ |
| 133581 | VR128X, VR128X, i64mem, u8imm, |
| 133582 | /* VPINSRQZrr */ |
| 133583 | VR128X, VR128X, GR64, u8imm, |
| 133584 | /* VPINSRQrm */ |
| 133585 | VR128, VR128, i64mem, u8imm, |
| 133586 | /* VPINSRQrr */ |
| 133587 | VR128, VR128, GR64, u8imm, |
| 133588 | /* VPINSRWZrm */ |
| 133589 | VR128X, VR128X, i16mem, u8imm, |
| 133590 | /* VPINSRWZrr */ |
| 133591 | VR128X, VR128X, GR32orGR64, u8imm, |
| 133592 | /* VPINSRWrm */ |
| 133593 | VR128, VR128, i16mem, u8imm, |
| 133594 | /* VPINSRWrr */ |
| 133595 | VR128, VR128, GR32orGR64, u8imm, |
| 133596 | /* VPLZCNTDZ128rm */ |
| 133597 | VR128X, i128mem, |
| 133598 | /* VPLZCNTDZ128rmb */ |
| 133599 | VR128X, i32mem, |
| 133600 | /* VPLZCNTDZ128rmbk */ |
| 133601 | VR128X, VR128X, VK4WM, i32mem, |
| 133602 | /* VPLZCNTDZ128rmbkz */ |
| 133603 | VR128X, VK4WM, i32mem, |
| 133604 | /* VPLZCNTDZ128rmk */ |
| 133605 | VR128X, VR128X, VK4WM, i128mem, |
| 133606 | /* VPLZCNTDZ128rmkz */ |
| 133607 | VR128X, VK4WM, i128mem, |
| 133608 | /* VPLZCNTDZ128rr */ |
| 133609 | VR128X, VR128X, |
| 133610 | /* VPLZCNTDZ128rrk */ |
| 133611 | VR128X, VR128X, VK4WM, VR128X, |
| 133612 | /* VPLZCNTDZ128rrkz */ |
| 133613 | VR128X, VK4WM, VR128X, |
| 133614 | /* VPLZCNTDZ256rm */ |
| 133615 | VR256X, i256mem, |
| 133616 | /* VPLZCNTDZ256rmb */ |
| 133617 | VR256X, i32mem, |
| 133618 | /* VPLZCNTDZ256rmbk */ |
| 133619 | VR256X, VR256X, VK8WM, i32mem, |
| 133620 | /* VPLZCNTDZ256rmbkz */ |
| 133621 | VR256X, VK8WM, i32mem, |
| 133622 | /* VPLZCNTDZ256rmk */ |
| 133623 | VR256X, VR256X, VK8WM, i256mem, |
| 133624 | /* VPLZCNTDZ256rmkz */ |
| 133625 | VR256X, VK8WM, i256mem, |
| 133626 | /* VPLZCNTDZ256rr */ |
| 133627 | VR256X, VR256X, |
| 133628 | /* VPLZCNTDZ256rrk */ |
| 133629 | VR256X, VR256X, VK8WM, VR256X, |
| 133630 | /* VPLZCNTDZ256rrkz */ |
| 133631 | VR256X, VK8WM, VR256X, |
| 133632 | /* VPLZCNTDZrm */ |
| 133633 | VR512, i512mem, |
| 133634 | /* VPLZCNTDZrmb */ |
| 133635 | VR512, i32mem, |
| 133636 | /* VPLZCNTDZrmbk */ |
| 133637 | VR512, VR512, VK16WM, i32mem, |
| 133638 | /* VPLZCNTDZrmbkz */ |
| 133639 | VR512, VK16WM, i32mem, |
| 133640 | /* VPLZCNTDZrmk */ |
| 133641 | VR512, VR512, VK16WM, i512mem, |
| 133642 | /* VPLZCNTDZrmkz */ |
| 133643 | VR512, VK16WM, i512mem, |
| 133644 | /* VPLZCNTDZrr */ |
| 133645 | VR512, VR512, |
| 133646 | /* VPLZCNTDZrrk */ |
| 133647 | VR512, VR512, VK16WM, VR512, |
| 133648 | /* VPLZCNTDZrrkz */ |
| 133649 | VR512, VK16WM, VR512, |
| 133650 | /* VPLZCNTQZ128rm */ |
| 133651 | VR128X, i128mem, |
| 133652 | /* VPLZCNTQZ128rmb */ |
| 133653 | VR128X, i64mem, |
| 133654 | /* VPLZCNTQZ128rmbk */ |
| 133655 | VR128X, VR128X, VK2WM, i64mem, |
| 133656 | /* VPLZCNTQZ128rmbkz */ |
| 133657 | VR128X, VK2WM, i64mem, |
| 133658 | /* VPLZCNTQZ128rmk */ |
| 133659 | VR128X, VR128X, VK2WM, i128mem, |
| 133660 | /* VPLZCNTQZ128rmkz */ |
| 133661 | VR128X, VK2WM, i128mem, |
| 133662 | /* VPLZCNTQZ128rr */ |
| 133663 | VR128X, VR128X, |
| 133664 | /* VPLZCNTQZ128rrk */ |
| 133665 | VR128X, VR128X, VK2WM, VR128X, |
| 133666 | /* VPLZCNTQZ128rrkz */ |
| 133667 | VR128X, VK2WM, VR128X, |
| 133668 | /* VPLZCNTQZ256rm */ |
| 133669 | VR256X, i256mem, |
| 133670 | /* VPLZCNTQZ256rmb */ |
| 133671 | VR256X, i64mem, |
| 133672 | /* VPLZCNTQZ256rmbk */ |
| 133673 | VR256X, VR256X, VK4WM, i64mem, |
| 133674 | /* VPLZCNTQZ256rmbkz */ |
| 133675 | VR256X, VK4WM, i64mem, |
| 133676 | /* VPLZCNTQZ256rmk */ |
| 133677 | VR256X, VR256X, VK4WM, i256mem, |
| 133678 | /* VPLZCNTQZ256rmkz */ |
| 133679 | VR256X, VK4WM, i256mem, |
| 133680 | /* VPLZCNTQZ256rr */ |
| 133681 | VR256X, VR256X, |
| 133682 | /* VPLZCNTQZ256rrk */ |
| 133683 | VR256X, VR256X, VK4WM, VR256X, |
| 133684 | /* VPLZCNTQZ256rrkz */ |
| 133685 | VR256X, VK4WM, VR256X, |
| 133686 | /* VPLZCNTQZrm */ |
| 133687 | VR512, i512mem, |
| 133688 | /* VPLZCNTQZrmb */ |
| 133689 | VR512, i64mem, |
| 133690 | /* VPLZCNTQZrmbk */ |
| 133691 | VR512, VR512, VK8WM, i64mem, |
| 133692 | /* VPLZCNTQZrmbkz */ |
| 133693 | VR512, VK8WM, i64mem, |
| 133694 | /* VPLZCNTQZrmk */ |
| 133695 | VR512, VR512, VK8WM, i512mem, |
| 133696 | /* VPLZCNTQZrmkz */ |
| 133697 | VR512, VK8WM, i512mem, |
| 133698 | /* VPLZCNTQZrr */ |
| 133699 | VR512, VR512, |
| 133700 | /* VPLZCNTQZrrk */ |
| 133701 | VR512, VR512, VK8WM, VR512, |
| 133702 | /* VPLZCNTQZrrkz */ |
| 133703 | VR512, VK8WM, VR512, |
| 133704 | /* VPMACSDDrm */ |
| 133705 | VR128, VR128, i128mem, VR128, |
| 133706 | /* VPMACSDDrr */ |
| 133707 | VR128, VR128, VR128, VR128, |
| 133708 | /* VPMACSDQHrm */ |
| 133709 | VR128, VR128, i128mem, VR128, |
| 133710 | /* VPMACSDQHrr */ |
| 133711 | VR128, VR128, VR128, VR128, |
| 133712 | /* VPMACSDQLrm */ |
| 133713 | VR128, VR128, i128mem, VR128, |
| 133714 | /* VPMACSDQLrr */ |
| 133715 | VR128, VR128, VR128, VR128, |
| 133716 | /* VPMACSSDDrm */ |
| 133717 | VR128, VR128, i128mem, VR128, |
| 133718 | /* VPMACSSDDrr */ |
| 133719 | VR128, VR128, VR128, VR128, |
| 133720 | /* VPMACSSDQHrm */ |
| 133721 | VR128, VR128, i128mem, VR128, |
| 133722 | /* VPMACSSDQHrr */ |
| 133723 | VR128, VR128, VR128, VR128, |
| 133724 | /* VPMACSSDQLrm */ |
| 133725 | VR128, VR128, i128mem, VR128, |
| 133726 | /* VPMACSSDQLrr */ |
| 133727 | VR128, VR128, VR128, VR128, |
| 133728 | /* VPMACSSWDrm */ |
| 133729 | VR128, VR128, i128mem, VR128, |
| 133730 | /* VPMACSSWDrr */ |
| 133731 | VR128, VR128, VR128, VR128, |
| 133732 | /* VPMACSSWWrm */ |
| 133733 | VR128, VR128, i128mem, VR128, |
| 133734 | /* VPMACSSWWrr */ |
| 133735 | VR128, VR128, VR128, VR128, |
| 133736 | /* VPMACSWDrm */ |
| 133737 | VR128, VR128, i128mem, VR128, |
| 133738 | /* VPMACSWDrr */ |
| 133739 | VR128, VR128, VR128, VR128, |
| 133740 | /* VPMACSWWrm */ |
| 133741 | VR128, VR128, i128mem, VR128, |
| 133742 | /* VPMACSWWrr */ |
| 133743 | VR128, VR128, VR128, VR128, |
| 133744 | /* VPMADCSSWDrm */ |
| 133745 | VR128, VR128, i128mem, VR128, |
| 133746 | /* VPMADCSSWDrr */ |
| 133747 | VR128, VR128, VR128, VR128, |
| 133748 | /* VPMADCSWDrm */ |
| 133749 | VR128, VR128, i128mem, VR128, |
| 133750 | /* VPMADCSWDrr */ |
| 133751 | VR128, VR128, VR128, VR128, |
| 133752 | /* VPMADD52HUQYrm */ |
| 133753 | VR256, VR256, VR256, i256mem, |
| 133754 | /* VPMADD52HUQYrr */ |
| 133755 | VR256, VR256, VR256, VR256, |
| 133756 | /* VPMADD52HUQZ128m */ |
| 133757 | VR128X, VR128X, VR128X, i128mem, |
| 133758 | /* VPMADD52HUQZ128mb */ |
| 133759 | VR128X, VR128X, VR128X, i64mem, |
| 133760 | /* VPMADD52HUQZ128mbk */ |
| 133761 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 133762 | /* VPMADD52HUQZ128mbkz */ |
| 133763 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 133764 | /* VPMADD52HUQZ128mk */ |
| 133765 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 133766 | /* VPMADD52HUQZ128mkz */ |
| 133767 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 133768 | /* VPMADD52HUQZ128r */ |
| 133769 | VR128X, VR128X, VR128X, VR128X, |
| 133770 | /* VPMADD52HUQZ128rk */ |
| 133771 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133772 | /* VPMADD52HUQZ128rkz */ |
| 133773 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133774 | /* VPMADD52HUQZ256m */ |
| 133775 | VR256X, VR256X, VR256X, i256mem, |
| 133776 | /* VPMADD52HUQZ256mb */ |
| 133777 | VR256X, VR256X, VR256X, i64mem, |
| 133778 | /* VPMADD52HUQZ256mbk */ |
| 133779 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 133780 | /* VPMADD52HUQZ256mbkz */ |
| 133781 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 133782 | /* VPMADD52HUQZ256mk */ |
| 133783 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 133784 | /* VPMADD52HUQZ256mkz */ |
| 133785 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 133786 | /* VPMADD52HUQZ256r */ |
| 133787 | VR256X, VR256X, VR256X, VR256X, |
| 133788 | /* VPMADD52HUQZ256rk */ |
| 133789 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 133790 | /* VPMADD52HUQZ256rkz */ |
| 133791 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 133792 | /* VPMADD52HUQZm */ |
| 133793 | VR512, VR512, VR512, i512mem, |
| 133794 | /* VPMADD52HUQZmb */ |
| 133795 | VR512, VR512, VR512, i64mem, |
| 133796 | /* VPMADD52HUQZmbk */ |
| 133797 | VR512, VR512, VK8WM, VR512, i64mem, |
| 133798 | /* VPMADD52HUQZmbkz */ |
| 133799 | VR512, VR512, VK8WM, VR512, i64mem, |
| 133800 | /* VPMADD52HUQZmk */ |
| 133801 | VR512, VR512, VK8WM, VR512, i512mem, |
| 133802 | /* VPMADD52HUQZmkz */ |
| 133803 | VR512, VR512, VK8WM, VR512, i512mem, |
| 133804 | /* VPMADD52HUQZr */ |
| 133805 | VR512, VR512, VR512, VR512, |
| 133806 | /* VPMADD52HUQZrk */ |
| 133807 | VR512, VR512, VK8WM, VR512, VR512, |
| 133808 | /* VPMADD52HUQZrkz */ |
| 133809 | VR512, VR512, VK8WM, VR512, VR512, |
| 133810 | /* VPMADD52HUQrm */ |
| 133811 | VR128, VR128, VR128, i128mem, |
| 133812 | /* VPMADD52HUQrr */ |
| 133813 | VR128, VR128, VR128, VR128, |
| 133814 | /* VPMADD52LUQYrm */ |
| 133815 | VR256, VR256, VR256, i256mem, |
| 133816 | /* VPMADD52LUQYrr */ |
| 133817 | VR256, VR256, VR256, VR256, |
| 133818 | /* VPMADD52LUQZ128m */ |
| 133819 | VR128X, VR128X, VR128X, i128mem, |
| 133820 | /* VPMADD52LUQZ128mb */ |
| 133821 | VR128X, VR128X, VR128X, i64mem, |
| 133822 | /* VPMADD52LUQZ128mbk */ |
| 133823 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 133824 | /* VPMADD52LUQZ128mbkz */ |
| 133825 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 133826 | /* VPMADD52LUQZ128mk */ |
| 133827 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 133828 | /* VPMADD52LUQZ128mkz */ |
| 133829 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 133830 | /* VPMADD52LUQZ128r */ |
| 133831 | VR128X, VR128X, VR128X, VR128X, |
| 133832 | /* VPMADD52LUQZ128rk */ |
| 133833 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133834 | /* VPMADD52LUQZ128rkz */ |
| 133835 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 133836 | /* VPMADD52LUQZ256m */ |
| 133837 | VR256X, VR256X, VR256X, i256mem, |
| 133838 | /* VPMADD52LUQZ256mb */ |
| 133839 | VR256X, VR256X, VR256X, i64mem, |
| 133840 | /* VPMADD52LUQZ256mbk */ |
| 133841 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 133842 | /* VPMADD52LUQZ256mbkz */ |
| 133843 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 133844 | /* VPMADD52LUQZ256mk */ |
| 133845 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 133846 | /* VPMADD52LUQZ256mkz */ |
| 133847 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 133848 | /* VPMADD52LUQZ256r */ |
| 133849 | VR256X, VR256X, VR256X, VR256X, |
| 133850 | /* VPMADD52LUQZ256rk */ |
| 133851 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 133852 | /* VPMADD52LUQZ256rkz */ |
| 133853 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 133854 | /* VPMADD52LUQZm */ |
| 133855 | VR512, VR512, VR512, i512mem, |
| 133856 | /* VPMADD52LUQZmb */ |
| 133857 | VR512, VR512, VR512, i64mem, |
| 133858 | /* VPMADD52LUQZmbk */ |
| 133859 | VR512, VR512, VK8WM, VR512, i64mem, |
| 133860 | /* VPMADD52LUQZmbkz */ |
| 133861 | VR512, VR512, VK8WM, VR512, i64mem, |
| 133862 | /* VPMADD52LUQZmk */ |
| 133863 | VR512, VR512, VK8WM, VR512, i512mem, |
| 133864 | /* VPMADD52LUQZmkz */ |
| 133865 | VR512, VR512, VK8WM, VR512, i512mem, |
| 133866 | /* VPMADD52LUQZr */ |
| 133867 | VR512, VR512, VR512, VR512, |
| 133868 | /* VPMADD52LUQZrk */ |
| 133869 | VR512, VR512, VK8WM, VR512, VR512, |
| 133870 | /* VPMADD52LUQZrkz */ |
| 133871 | VR512, VR512, VK8WM, VR512, VR512, |
| 133872 | /* VPMADD52LUQrm */ |
| 133873 | VR128, VR128, VR128, i128mem, |
| 133874 | /* VPMADD52LUQrr */ |
| 133875 | VR128, VR128, VR128, VR128, |
| 133876 | /* VPMADDUBSWYrm */ |
| 133877 | VR256, VR256, i256mem, |
| 133878 | /* VPMADDUBSWYrr */ |
| 133879 | VR256, VR256, VR256, |
| 133880 | /* VPMADDUBSWZ128rm */ |
| 133881 | VR128X, VR128X, i128mem, |
| 133882 | /* VPMADDUBSWZ128rmk */ |
| 133883 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 133884 | /* VPMADDUBSWZ128rmkz */ |
| 133885 | VR128X, VK8WM, VR128X, i128mem, |
| 133886 | /* VPMADDUBSWZ128rr */ |
| 133887 | VR128X, VR128X, VR128X, |
| 133888 | /* VPMADDUBSWZ128rrk */ |
| 133889 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 133890 | /* VPMADDUBSWZ128rrkz */ |
| 133891 | VR128X, VK8WM, VR128X, VR128X, |
| 133892 | /* VPMADDUBSWZ256rm */ |
| 133893 | VR256X, VR256X, i256mem, |
| 133894 | /* VPMADDUBSWZ256rmk */ |
| 133895 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 133896 | /* VPMADDUBSWZ256rmkz */ |
| 133897 | VR256X, VK16WM, VR256X, i256mem, |
| 133898 | /* VPMADDUBSWZ256rr */ |
| 133899 | VR256X, VR256X, VR256X, |
| 133900 | /* VPMADDUBSWZ256rrk */ |
| 133901 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 133902 | /* VPMADDUBSWZ256rrkz */ |
| 133903 | VR256X, VK16WM, VR256X, VR256X, |
| 133904 | /* VPMADDUBSWZrm */ |
| 133905 | VR512, VR512, i512mem, |
| 133906 | /* VPMADDUBSWZrmk */ |
| 133907 | VR512, VR512, VK32WM, VR512, i512mem, |
| 133908 | /* VPMADDUBSWZrmkz */ |
| 133909 | VR512, VK32WM, VR512, i512mem, |
| 133910 | /* VPMADDUBSWZrr */ |
| 133911 | VR512, VR512, VR512, |
| 133912 | /* VPMADDUBSWZrrk */ |
| 133913 | VR512, VR512, VK32WM, VR512, VR512, |
| 133914 | /* VPMADDUBSWZrrkz */ |
| 133915 | VR512, VK32WM, VR512, VR512, |
| 133916 | /* VPMADDUBSWrm */ |
| 133917 | VR128, VR128, i128mem, |
| 133918 | /* VPMADDUBSWrr */ |
| 133919 | VR128, VR128, VR128, |
| 133920 | /* VPMADDWDYrm */ |
| 133921 | VR256, VR256, i256mem, |
| 133922 | /* VPMADDWDYrr */ |
| 133923 | VR256, VR256, VR256, |
| 133924 | /* VPMADDWDZ128rm */ |
| 133925 | VR128X, VR128X, i128mem, |
| 133926 | /* VPMADDWDZ128rmk */ |
| 133927 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 133928 | /* VPMADDWDZ128rmkz */ |
| 133929 | VR128X, VK4WM, VR128X, i128mem, |
| 133930 | /* VPMADDWDZ128rr */ |
| 133931 | VR128X, VR128X, VR128X, |
| 133932 | /* VPMADDWDZ128rrk */ |
| 133933 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 133934 | /* VPMADDWDZ128rrkz */ |
| 133935 | VR128X, VK4WM, VR128X, VR128X, |
| 133936 | /* VPMADDWDZ256rm */ |
| 133937 | VR256X, VR256X, i256mem, |
| 133938 | /* VPMADDWDZ256rmk */ |
| 133939 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 133940 | /* VPMADDWDZ256rmkz */ |
| 133941 | VR256X, VK8WM, VR256X, i256mem, |
| 133942 | /* VPMADDWDZ256rr */ |
| 133943 | VR256X, VR256X, VR256X, |
| 133944 | /* VPMADDWDZ256rrk */ |
| 133945 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 133946 | /* VPMADDWDZ256rrkz */ |
| 133947 | VR256X, VK8WM, VR256X, VR256X, |
| 133948 | /* VPMADDWDZrm */ |
| 133949 | VR512, VR512, i512mem, |
| 133950 | /* VPMADDWDZrmk */ |
| 133951 | VR512, VR512, VK16WM, VR512, i512mem, |
| 133952 | /* VPMADDWDZrmkz */ |
| 133953 | VR512, VK16WM, VR512, i512mem, |
| 133954 | /* VPMADDWDZrr */ |
| 133955 | VR512, VR512, VR512, |
| 133956 | /* VPMADDWDZrrk */ |
| 133957 | VR512, VR512, VK16WM, VR512, VR512, |
| 133958 | /* VPMADDWDZrrkz */ |
| 133959 | VR512, VK16WM, VR512, VR512, |
| 133960 | /* VPMADDWDrm */ |
| 133961 | VR128, VR128, i128mem, |
| 133962 | /* VPMADDWDrr */ |
| 133963 | VR128, VR128, VR128, |
| 133964 | /* VPMASKMOVDYmr */ |
| 133965 | i256mem, VR256, VR256, |
| 133966 | /* VPMASKMOVDYrm */ |
| 133967 | VR256, VR256, i256mem, |
| 133968 | /* VPMASKMOVDmr */ |
| 133969 | i128mem, VR128, VR128, |
| 133970 | /* VPMASKMOVDrm */ |
| 133971 | VR128, VR128, i128mem, |
| 133972 | /* VPMASKMOVQYmr */ |
| 133973 | i256mem, VR256, VR256, |
| 133974 | /* VPMASKMOVQYrm */ |
| 133975 | VR256, VR256, i256mem, |
| 133976 | /* VPMASKMOVQmr */ |
| 133977 | i128mem, VR128, VR128, |
| 133978 | /* VPMASKMOVQrm */ |
| 133979 | VR128, VR128, i128mem, |
| 133980 | /* VPMAXSBYrm */ |
| 133981 | VR256, VR256, i256mem, |
| 133982 | /* VPMAXSBYrr */ |
| 133983 | VR256, VR256, VR256, |
| 133984 | /* VPMAXSBZ128rm */ |
| 133985 | VR128X, VR128X, i128mem, |
| 133986 | /* VPMAXSBZ128rmk */ |
| 133987 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 133988 | /* VPMAXSBZ128rmkz */ |
| 133989 | VR128X, VK16WM, VR128X, i128mem, |
| 133990 | /* VPMAXSBZ128rr */ |
| 133991 | VR128X, VR128X, VR128X, |
| 133992 | /* VPMAXSBZ128rrk */ |
| 133993 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 133994 | /* VPMAXSBZ128rrkz */ |
| 133995 | VR128X, VK16WM, VR128X, VR128X, |
| 133996 | /* VPMAXSBZ256rm */ |
| 133997 | VR256X, VR256X, i256mem, |
| 133998 | /* VPMAXSBZ256rmk */ |
| 133999 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 134000 | /* VPMAXSBZ256rmkz */ |
| 134001 | VR256X, VK32WM, VR256X, i256mem, |
| 134002 | /* VPMAXSBZ256rr */ |
| 134003 | VR256X, VR256X, VR256X, |
| 134004 | /* VPMAXSBZ256rrk */ |
| 134005 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 134006 | /* VPMAXSBZ256rrkz */ |
| 134007 | VR256X, VK32WM, VR256X, VR256X, |
| 134008 | /* VPMAXSBZrm */ |
| 134009 | VR512, VR512, i512mem, |
| 134010 | /* VPMAXSBZrmk */ |
| 134011 | VR512, VR512, VK64WM, VR512, i512mem, |
| 134012 | /* VPMAXSBZrmkz */ |
| 134013 | VR512, VK64WM, VR512, i512mem, |
| 134014 | /* VPMAXSBZrr */ |
| 134015 | VR512, VR512, VR512, |
| 134016 | /* VPMAXSBZrrk */ |
| 134017 | VR512, VR512, VK64WM, VR512, VR512, |
| 134018 | /* VPMAXSBZrrkz */ |
| 134019 | VR512, VK64WM, VR512, VR512, |
| 134020 | /* VPMAXSBrm */ |
| 134021 | VR128, VR128, i128mem, |
| 134022 | /* VPMAXSBrr */ |
| 134023 | VR128, VR128, VR128, |
| 134024 | /* VPMAXSDYrm */ |
| 134025 | VR256, VR256, i256mem, |
| 134026 | /* VPMAXSDYrr */ |
| 134027 | VR256, VR256, VR256, |
| 134028 | /* VPMAXSDZ128rm */ |
| 134029 | VR128X, VR128X, i128mem, |
| 134030 | /* VPMAXSDZ128rmb */ |
| 134031 | VR128X, VR128X, i32mem, |
| 134032 | /* VPMAXSDZ128rmbk */ |
| 134033 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 134034 | /* VPMAXSDZ128rmbkz */ |
| 134035 | VR128X, VK4WM, VR128X, i32mem, |
| 134036 | /* VPMAXSDZ128rmk */ |
| 134037 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 134038 | /* VPMAXSDZ128rmkz */ |
| 134039 | VR128X, VK4WM, VR128X, i128mem, |
| 134040 | /* VPMAXSDZ128rr */ |
| 134041 | VR128X, VR128X, VR128X, |
| 134042 | /* VPMAXSDZ128rrk */ |
| 134043 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 134044 | /* VPMAXSDZ128rrkz */ |
| 134045 | VR128X, VK4WM, VR128X, VR128X, |
| 134046 | /* VPMAXSDZ256rm */ |
| 134047 | VR256X, VR256X, i256mem, |
| 134048 | /* VPMAXSDZ256rmb */ |
| 134049 | VR256X, VR256X, i32mem, |
| 134050 | /* VPMAXSDZ256rmbk */ |
| 134051 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 134052 | /* VPMAXSDZ256rmbkz */ |
| 134053 | VR256X, VK8WM, VR256X, i32mem, |
| 134054 | /* VPMAXSDZ256rmk */ |
| 134055 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 134056 | /* VPMAXSDZ256rmkz */ |
| 134057 | VR256X, VK8WM, VR256X, i256mem, |
| 134058 | /* VPMAXSDZ256rr */ |
| 134059 | VR256X, VR256X, VR256X, |
| 134060 | /* VPMAXSDZ256rrk */ |
| 134061 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 134062 | /* VPMAXSDZ256rrkz */ |
| 134063 | VR256X, VK8WM, VR256X, VR256X, |
| 134064 | /* VPMAXSDZrm */ |
| 134065 | VR512, VR512, i512mem, |
| 134066 | /* VPMAXSDZrmb */ |
| 134067 | VR512, VR512, i32mem, |
| 134068 | /* VPMAXSDZrmbk */ |
| 134069 | VR512, VR512, VK16WM, VR512, i32mem, |
| 134070 | /* VPMAXSDZrmbkz */ |
| 134071 | VR512, VK16WM, VR512, i32mem, |
| 134072 | /* VPMAXSDZrmk */ |
| 134073 | VR512, VR512, VK16WM, VR512, i512mem, |
| 134074 | /* VPMAXSDZrmkz */ |
| 134075 | VR512, VK16WM, VR512, i512mem, |
| 134076 | /* VPMAXSDZrr */ |
| 134077 | VR512, VR512, VR512, |
| 134078 | /* VPMAXSDZrrk */ |
| 134079 | VR512, VR512, VK16WM, VR512, VR512, |
| 134080 | /* VPMAXSDZrrkz */ |
| 134081 | VR512, VK16WM, VR512, VR512, |
| 134082 | /* VPMAXSDrm */ |
| 134083 | VR128, VR128, i128mem, |
| 134084 | /* VPMAXSDrr */ |
| 134085 | VR128, VR128, VR128, |
| 134086 | /* VPMAXSQZ128rm */ |
| 134087 | VR128X, VR128X, i128mem, |
| 134088 | /* VPMAXSQZ128rmb */ |
| 134089 | VR128X, VR128X, i64mem, |
| 134090 | /* VPMAXSQZ128rmbk */ |
| 134091 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 134092 | /* VPMAXSQZ128rmbkz */ |
| 134093 | VR128X, VK2WM, VR128X, i64mem, |
| 134094 | /* VPMAXSQZ128rmk */ |
| 134095 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 134096 | /* VPMAXSQZ128rmkz */ |
| 134097 | VR128X, VK2WM, VR128X, i128mem, |
| 134098 | /* VPMAXSQZ128rr */ |
| 134099 | VR128X, VR128X, VR128X, |
| 134100 | /* VPMAXSQZ128rrk */ |
| 134101 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 134102 | /* VPMAXSQZ128rrkz */ |
| 134103 | VR128X, VK2WM, VR128X, VR128X, |
| 134104 | /* VPMAXSQZ256rm */ |
| 134105 | VR256X, VR256X, i256mem, |
| 134106 | /* VPMAXSQZ256rmb */ |
| 134107 | VR256X, VR256X, i64mem, |
| 134108 | /* VPMAXSQZ256rmbk */ |
| 134109 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 134110 | /* VPMAXSQZ256rmbkz */ |
| 134111 | VR256X, VK4WM, VR256X, i64mem, |
| 134112 | /* VPMAXSQZ256rmk */ |
| 134113 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 134114 | /* VPMAXSQZ256rmkz */ |
| 134115 | VR256X, VK4WM, VR256X, i256mem, |
| 134116 | /* VPMAXSQZ256rr */ |
| 134117 | VR256X, VR256X, VR256X, |
| 134118 | /* VPMAXSQZ256rrk */ |
| 134119 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 134120 | /* VPMAXSQZ256rrkz */ |
| 134121 | VR256X, VK4WM, VR256X, VR256X, |
| 134122 | /* VPMAXSQZrm */ |
| 134123 | VR512, VR512, i512mem, |
| 134124 | /* VPMAXSQZrmb */ |
| 134125 | VR512, VR512, i64mem, |
| 134126 | /* VPMAXSQZrmbk */ |
| 134127 | VR512, VR512, VK8WM, VR512, i64mem, |
| 134128 | /* VPMAXSQZrmbkz */ |
| 134129 | VR512, VK8WM, VR512, i64mem, |
| 134130 | /* VPMAXSQZrmk */ |
| 134131 | VR512, VR512, VK8WM, VR512, i512mem, |
| 134132 | /* VPMAXSQZrmkz */ |
| 134133 | VR512, VK8WM, VR512, i512mem, |
| 134134 | /* VPMAXSQZrr */ |
| 134135 | VR512, VR512, VR512, |
| 134136 | /* VPMAXSQZrrk */ |
| 134137 | VR512, VR512, VK8WM, VR512, VR512, |
| 134138 | /* VPMAXSQZrrkz */ |
| 134139 | VR512, VK8WM, VR512, VR512, |
| 134140 | /* VPMAXSWYrm */ |
| 134141 | VR256, VR256, i256mem, |
| 134142 | /* VPMAXSWYrr */ |
| 134143 | VR256, VR256, VR256, |
| 134144 | /* VPMAXSWZ128rm */ |
| 134145 | VR128X, VR128X, i128mem, |
| 134146 | /* VPMAXSWZ128rmk */ |
| 134147 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 134148 | /* VPMAXSWZ128rmkz */ |
| 134149 | VR128X, VK8WM, VR128X, i128mem, |
| 134150 | /* VPMAXSWZ128rr */ |
| 134151 | VR128X, VR128X, VR128X, |
| 134152 | /* VPMAXSWZ128rrk */ |
| 134153 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134154 | /* VPMAXSWZ128rrkz */ |
| 134155 | VR128X, VK8WM, VR128X, VR128X, |
| 134156 | /* VPMAXSWZ256rm */ |
| 134157 | VR256X, VR256X, i256mem, |
| 134158 | /* VPMAXSWZ256rmk */ |
| 134159 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 134160 | /* VPMAXSWZ256rmkz */ |
| 134161 | VR256X, VK16WM, VR256X, i256mem, |
| 134162 | /* VPMAXSWZ256rr */ |
| 134163 | VR256X, VR256X, VR256X, |
| 134164 | /* VPMAXSWZ256rrk */ |
| 134165 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 134166 | /* VPMAXSWZ256rrkz */ |
| 134167 | VR256X, VK16WM, VR256X, VR256X, |
| 134168 | /* VPMAXSWZrm */ |
| 134169 | VR512, VR512, i512mem, |
| 134170 | /* VPMAXSWZrmk */ |
| 134171 | VR512, VR512, VK32WM, VR512, i512mem, |
| 134172 | /* VPMAXSWZrmkz */ |
| 134173 | VR512, VK32WM, VR512, i512mem, |
| 134174 | /* VPMAXSWZrr */ |
| 134175 | VR512, VR512, VR512, |
| 134176 | /* VPMAXSWZrrk */ |
| 134177 | VR512, VR512, VK32WM, VR512, VR512, |
| 134178 | /* VPMAXSWZrrkz */ |
| 134179 | VR512, VK32WM, VR512, VR512, |
| 134180 | /* VPMAXSWrm */ |
| 134181 | VR128, VR128, i128mem, |
| 134182 | /* VPMAXSWrr */ |
| 134183 | VR128, VR128, VR128, |
| 134184 | /* VPMAXUBYrm */ |
| 134185 | VR256, VR256, i256mem, |
| 134186 | /* VPMAXUBYrr */ |
| 134187 | VR256, VR256, VR256, |
| 134188 | /* VPMAXUBZ128rm */ |
| 134189 | VR128X, VR128X, i128mem, |
| 134190 | /* VPMAXUBZ128rmk */ |
| 134191 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 134192 | /* VPMAXUBZ128rmkz */ |
| 134193 | VR128X, VK16WM, VR128X, i128mem, |
| 134194 | /* VPMAXUBZ128rr */ |
| 134195 | VR128X, VR128X, VR128X, |
| 134196 | /* VPMAXUBZ128rrk */ |
| 134197 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 134198 | /* VPMAXUBZ128rrkz */ |
| 134199 | VR128X, VK16WM, VR128X, VR128X, |
| 134200 | /* VPMAXUBZ256rm */ |
| 134201 | VR256X, VR256X, i256mem, |
| 134202 | /* VPMAXUBZ256rmk */ |
| 134203 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 134204 | /* VPMAXUBZ256rmkz */ |
| 134205 | VR256X, VK32WM, VR256X, i256mem, |
| 134206 | /* VPMAXUBZ256rr */ |
| 134207 | VR256X, VR256X, VR256X, |
| 134208 | /* VPMAXUBZ256rrk */ |
| 134209 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 134210 | /* VPMAXUBZ256rrkz */ |
| 134211 | VR256X, VK32WM, VR256X, VR256X, |
| 134212 | /* VPMAXUBZrm */ |
| 134213 | VR512, VR512, i512mem, |
| 134214 | /* VPMAXUBZrmk */ |
| 134215 | VR512, VR512, VK64WM, VR512, i512mem, |
| 134216 | /* VPMAXUBZrmkz */ |
| 134217 | VR512, VK64WM, VR512, i512mem, |
| 134218 | /* VPMAXUBZrr */ |
| 134219 | VR512, VR512, VR512, |
| 134220 | /* VPMAXUBZrrk */ |
| 134221 | VR512, VR512, VK64WM, VR512, VR512, |
| 134222 | /* VPMAXUBZrrkz */ |
| 134223 | VR512, VK64WM, VR512, VR512, |
| 134224 | /* VPMAXUBrm */ |
| 134225 | VR128, VR128, i128mem, |
| 134226 | /* VPMAXUBrr */ |
| 134227 | VR128, VR128, VR128, |
| 134228 | /* VPMAXUDYrm */ |
| 134229 | VR256, VR256, i256mem, |
| 134230 | /* VPMAXUDYrr */ |
| 134231 | VR256, VR256, VR256, |
| 134232 | /* VPMAXUDZ128rm */ |
| 134233 | VR128X, VR128X, i128mem, |
| 134234 | /* VPMAXUDZ128rmb */ |
| 134235 | VR128X, VR128X, i32mem, |
| 134236 | /* VPMAXUDZ128rmbk */ |
| 134237 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 134238 | /* VPMAXUDZ128rmbkz */ |
| 134239 | VR128X, VK4WM, VR128X, i32mem, |
| 134240 | /* VPMAXUDZ128rmk */ |
| 134241 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 134242 | /* VPMAXUDZ128rmkz */ |
| 134243 | VR128X, VK4WM, VR128X, i128mem, |
| 134244 | /* VPMAXUDZ128rr */ |
| 134245 | VR128X, VR128X, VR128X, |
| 134246 | /* VPMAXUDZ128rrk */ |
| 134247 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 134248 | /* VPMAXUDZ128rrkz */ |
| 134249 | VR128X, VK4WM, VR128X, VR128X, |
| 134250 | /* VPMAXUDZ256rm */ |
| 134251 | VR256X, VR256X, i256mem, |
| 134252 | /* VPMAXUDZ256rmb */ |
| 134253 | VR256X, VR256X, i32mem, |
| 134254 | /* VPMAXUDZ256rmbk */ |
| 134255 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 134256 | /* VPMAXUDZ256rmbkz */ |
| 134257 | VR256X, VK8WM, VR256X, i32mem, |
| 134258 | /* VPMAXUDZ256rmk */ |
| 134259 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 134260 | /* VPMAXUDZ256rmkz */ |
| 134261 | VR256X, VK8WM, VR256X, i256mem, |
| 134262 | /* VPMAXUDZ256rr */ |
| 134263 | VR256X, VR256X, VR256X, |
| 134264 | /* VPMAXUDZ256rrk */ |
| 134265 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 134266 | /* VPMAXUDZ256rrkz */ |
| 134267 | VR256X, VK8WM, VR256X, VR256X, |
| 134268 | /* VPMAXUDZrm */ |
| 134269 | VR512, VR512, i512mem, |
| 134270 | /* VPMAXUDZrmb */ |
| 134271 | VR512, VR512, i32mem, |
| 134272 | /* VPMAXUDZrmbk */ |
| 134273 | VR512, VR512, VK16WM, VR512, i32mem, |
| 134274 | /* VPMAXUDZrmbkz */ |
| 134275 | VR512, VK16WM, VR512, i32mem, |
| 134276 | /* VPMAXUDZrmk */ |
| 134277 | VR512, VR512, VK16WM, VR512, i512mem, |
| 134278 | /* VPMAXUDZrmkz */ |
| 134279 | VR512, VK16WM, VR512, i512mem, |
| 134280 | /* VPMAXUDZrr */ |
| 134281 | VR512, VR512, VR512, |
| 134282 | /* VPMAXUDZrrk */ |
| 134283 | VR512, VR512, VK16WM, VR512, VR512, |
| 134284 | /* VPMAXUDZrrkz */ |
| 134285 | VR512, VK16WM, VR512, VR512, |
| 134286 | /* VPMAXUDrm */ |
| 134287 | VR128, VR128, i128mem, |
| 134288 | /* VPMAXUDrr */ |
| 134289 | VR128, VR128, VR128, |
| 134290 | /* VPMAXUQZ128rm */ |
| 134291 | VR128X, VR128X, i128mem, |
| 134292 | /* VPMAXUQZ128rmb */ |
| 134293 | VR128X, VR128X, i64mem, |
| 134294 | /* VPMAXUQZ128rmbk */ |
| 134295 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 134296 | /* VPMAXUQZ128rmbkz */ |
| 134297 | VR128X, VK2WM, VR128X, i64mem, |
| 134298 | /* VPMAXUQZ128rmk */ |
| 134299 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 134300 | /* VPMAXUQZ128rmkz */ |
| 134301 | VR128X, VK2WM, VR128X, i128mem, |
| 134302 | /* VPMAXUQZ128rr */ |
| 134303 | VR128X, VR128X, VR128X, |
| 134304 | /* VPMAXUQZ128rrk */ |
| 134305 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 134306 | /* VPMAXUQZ128rrkz */ |
| 134307 | VR128X, VK2WM, VR128X, VR128X, |
| 134308 | /* VPMAXUQZ256rm */ |
| 134309 | VR256X, VR256X, i256mem, |
| 134310 | /* VPMAXUQZ256rmb */ |
| 134311 | VR256X, VR256X, i64mem, |
| 134312 | /* VPMAXUQZ256rmbk */ |
| 134313 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 134314 | /* VPMAXUQZ256rmbkz */ |
| 134315 | VR256X, VK4WM, VR256X, i64mem, |
| 134316 | /* VPMAXUQZ256rmk */ |
| 134317 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 134318 | /* VPMAXUQZ256rmkz */ |
| 134319 | VR256X, VK4WM, VR256X, i256mem, |
| 134320 | /* VPMAXUQZ256rr */ |
| 134321 | VR256X, VR256X, VR256X, |
| 134322 | /* VPMAXUQZ256rrk */ |
| 134323 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 134324 | /* VPMAXUQZ256rrkz */ |
| 134325 | VR256X, VK4WM, VR256X, VR256X, |
| 134326 | /* VPMAXUQZrm */ |
| 134327 | VR512, VR512, i512mem, |
| 134328 | /* VPMAXUQZrmb */ |
| 134329 | VR512, VR512, i64mem, |
| 134330 | /* VPMAXUQZrmbk */ |
| 134331 | VR512, VR512, VK8WM, VR512, i64mem, |
| 134332 | /* VPMAXUQZrmbkz */ |
| 134333 | VR512, VK8WM, VR512, i64mem, |
| 134334 | /* VPMAXUQZrmk */ |
| 134335 | VR512, VR512, VK8WM, VR512, i512mem, |
| 134336 | /* VPMAXUQZrmkz */ |
| 134337 | VR512, VK8WM, VR512, i512mem, |
| 134338 | /* VPMAXUQZrr */ |
| 134339 | VR512, VR512, VR512, |
| 134340 | /* VPMAXUQZrrk */ |
| 134341 | VR512, VR512, VK8WM, VR512, VR512, |
| 134342 | /* VPMAXUQZrrkz */ |
| 134343 | VR512, VK8WM, VR512, VR512, |
| 134344 | /* VPMAXUWYrm */ |
| 134345 | VR256, VR256, i256mem, |
| 134346 | /* VPMAXUWYrr */ |
| 134347 | VR256, VR256, VR256, |
| 134348 | /* VPMAXUWZ128rm */ |
| 134349 | VR128X, VR128X, i128mem, |
| 134350 | /* VPMAXUWZ128rmk */ |
| 134351 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 134352 | /* VPMAXUWZ128rmkz */ |
| 134353 | VR128X, VK8WM, VR128X, i128mem, |
| 134354 | /* VPMAXUWZ128rr */ |
| 134355 | VR128X, VR128X, VR128X, |
| 134356 | /* VPMAXUWZ128rrk */ |
| 134357 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134358 | /* VPMAXUWZ128rrkz */ |
| 134359 | VR128X, VK8WM, VR128X, VR128X, |
| 134360 | /* VPMAXUWZ256rm */ |
| 134361 | VR256X, VR256X, i256mem, |
| 134362 | /* VPMAXUWZ256rmk */ |
| 134363 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 134364 | /* VPMAXUWZ256rmkz */ |
| 134365 | VR256X, VK16WM, VR256X, i256mem, |
| 134366 | /* VPMAXUWZ256rr */ |
| 134367 | VR256X, VR256X, VR256X, |
| 134368 | /* VPMAXUWZ256rrk */ |
| 134369 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 134370 | /* VPMAXUWZ256rrkz */ |
| 134371 | VR256X, VK16WM, VR256X, VR256X, |
| 134372 | /* VPMAXUWZrm */ |
| 134373 | VR512, VR512, i512mem, |
| 134374 | /* VPMAXUWZrmk */ |
| 134375 | VR512, VR512, VK32WM, VR512, i512mem, |
| 134376 | /* VPMAXUWZrmkz */ |
| 134377 | VR512, VK32WM, VR512, i512mem, |
| 134378 | /* VPMAXUWZrr */ |
| 134379 | VR512, VR512, VR512, |
| 134380 | /* VPMAXUWZrrk */ |
| 134381 | VR512, VR512, VK32WM, VR512, VR512, |
| 134382 | /* VPMAXUWZrrkz */ |
| 134383 | VR512, VK32WM, VR512, VR512, |
| 134384 | /* VPMAXUWrm */ |
| 134385 | VR128, VR128, i128mem, |
| 134386 | /* VPMAXUWrr */ |
| 134387 | VR128, VR128, VR128, |
| 134388 | /* VPMINSBYrm */ |
| 134389 | VR256, VR256, i256mem, |
| 134390 | /* VPMINSBYrr */ |
| 134391 | VR256, VR256, VR256, |
| 134392 | /* VPMINSBZ128rm */ |
| 134393 | VR128X, VR128X, i128mem, |
| 134394 | /* VPMINSBZ128rmk */ |
| 134395 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 134396 | /* VPMINSBZ128rmkz */ |
| 134397 | VR128X, VK16WM, VR128X, i128mem, |
| 134398 | /* VPMINSBZ128rr */ |
| 134399 | VR128X, VR128X, VR128X, |
| 134400 | /* VPMINSBZ128rrk */ |
| 134401 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 134402 | /* VPMINSBZ128rrkz */ |
| 134403 | VR128X, VK16WM, VR128X, VR128X, |
| 134404 | /* VPMINSBZ256rm */ |
| 134405 | VR256X, VR256X, i256mem, |
| 134406 | /* VPMINSBZ256rmk */ |
| 134407 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 134408 | /* VPMINSBZ256rmkz */ |
| 134409 | VR256X, VK32WM, VR256X, i256mem, |
| 134410 | /* VPMINSBZ256rr */ |
| 134411 | VR256X, VR256X, VR256X, |
| 134412 | /* VPMINSBZ256rrk */ |
| 134413 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 134414 | /* VPMINSBZ256rrkz */ |
| 134415 | VR256X, VK32WM, VR256X, VR256X, |
| 134416 | /* VPMINSBZrm */ |
| 134417 | VR512, VR512, i512mem, |
| 134418 | /* VPMINSBZrmk */ |
| 134419 | VR512, VR512, VK64WM, VR512, i512mem, |
| 134420 | /* VPMINSBZrmkz */ |
| 134421 | VR512, VK64WM, VR512, i512mem, |
| 134422 | /* VPMINSBZrr */ |
| 134423 | VR512, VR512, VR512, |
| 134424 | /* VPMINSBZrrk */ |
| 134425 | VR512, VR512, VK64WM, VR512, VR512, |
| 134426 | /* VPMINSBZrrkz */ |
| 134427 | VR512, VK64WM, VR512, VR512, |
| 134428 | /* VPMINSBrm */ |
| 134429 | VR128, VR128, i128mem, |
| 134430 | /* VPMINSBrr */ |
| 134431 | VR128, VR128, VR128, |
| 134432 | /* VPMINSDYrm */ |
| 134433 | VR256, VR256, i256mem, |
| 134434 | /* VPMINSDYrr */ |
| 134435 | VR256, VR256, VR256, |
| 134436 | /* VPMINSDZ128rm */ |
| 134437 | VR128X, VR128X, i128mem, |
| 134438 | /* VPMINSDZ128rmb */ |
| 134439 | VR128X, VR128X, i32mem, |
| 134440 | /* VPMINSDZ128rmbk */ |
| 134441 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 134442 | /* VPMINSDZ128rmbkz */ |
| 134443 | VR128X, VK4WM, VR128X, i32mem, |
| 134444 | /* VPMINSDZ128rmk */ |
| 134445 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 134446 | /* VPMINSDZ128rmkz */ |
| 134447 | VR128X, VK4WM, VR128X, i128mem, |
| 134448 | /* VPMINSDZ128rr */ |
| 134449 | VR128X, VR128X, VR128X, |
| 134450 | /* VPMINSDZ128rrk */ |
| 134451 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 134452 | /* VPMINSDZ128rrkz */ |
| 134453 | VR128X, VK4WM, VR128X, VR128X, |
| 134454 | /* VPMINSDZ256rm */ |
| 134455 | VR256X, VR256X, i256mem, |
| 134456 | /* VPMINSDZ256rmb */ |
| 134457 | VR256X, VR256X, i32mem, |
| 134458 | /* VPMINSDZ256rmbk */ |
| 134459 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 134460 | /* VPMINSDZ256rmbkz */ |
| 134461 | VR256X, VK8WM, VR256X, i32mem, |
| 134462 | /* VPMINSDZ256rmk */ |
| 134463 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 134464 | /* VPMINSDZ256rmkz */ |
| 134465 | VR256X, VK8WM, VR256X, i256mem, |
| 134466 | /* VPMINSDZ256rr */ |
| 134467 | VR256X, VR256X, VR256X, |
| 134468 | /* VPMINSDZ256rrk */ |
| 134469 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 134470 | /* VPMINSDZ256rrkz */ |
| 134471 | VR256X, VK8WM, VR256X, VR256X, |
| 134472 | /* VPMINSDZrm */ |
| 134473 | VR512, VR512, i512mem, |
| 134474 | /* VPMINSDZrmb */ |
| 134475 | VR512, VR512, i32mem, |
| 134476 | /* VPMINSDZrmbk */ |
| 134477 | VR512, VR512, VK16WM, VR512, i32mem, |
| 134478 | /* VPMINSDZrmbkz */ |
| 134479 | VR512, VK16WM, VR512, i32mem, |
| 134480 | /* VPMINSDZrmk */ |
| 134481 | VR512, VR512, VK16WM, VR512, i512mem, |
| 134482 | /* VPMINSDZrmkz */ |
| 134483 | VR512, VK16WM, VR512, i512mem, |
| 134484 | /* VPMINSDZrr */ |
| 134485 | VR512, VR512, VR512, |
| 134486 | /* VPMINSDZrrk */ |
| 134487 | VR512, VR512, VK16WM, VR512, VR512, |
| 134488 | /* VPMINSDZrrkz */ |
| 134489 | VR512, VK16WM, VR512, VR512, |
| 134490 | /* VPMINSDrm */ |
| 134491 | VR128, VR128, i128mem, |
| 134492 | /* VPMINSDrr */ |
| 134493 | VR128, VR128, VR128, |
| 134494 | /* VPMINSQZ128rm */ |
| 134495 | VR128X, VR128X, i128mem, |
| 134496 | /* VPMINSQZ128rmb */ |
| 134497 | VR128X, VR128X, i64mem, |
| 134498 | /* VPMINSQZ128rmbk */ |
| 134499 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 134500 | /* VPMINSQZ128rmbkz */ |
| 134501 | VR128X, VK2WM, VR128X, i64mem, |
| 134502 | /* VPMINSQZ128rmk */ |
| 134503 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 134504 | /* VPMINSQZ128rmkz */ |
| 134505 | VR128X, VK2WM, VR128X, i128mem, |
| 134506 | /* VPMINSQZ128rr */ |
| 134507 | VR128X, VR128X, VR128X, |
| 134508 | /* VPMINSQZ128rrk */ |
| 134509 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 134510 | /* VPMINSQZ128rrkz */ |
| 134511 | VR128X, VK2WM, VR128X, VR128X, |
| 134512 | /* VPMINSQZ256rm */ |
| 134513 | VR256X, VR256X, i256mem, |
| 134514 | /* VPMINSQZ256rmb */ |
| 134515 | VR256X, VR256X, i64mem, |
| 134516 | /* VPMINSQZ256rmbk */ |
| 134517 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 134518 | /* VPMINSQZ256rmbkz */ |
| 134519 | VR256X, VK4WM, VR256X, i64mem, |
| 134520 | /* VPMINSQZ256rmk */ |
| 134521 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 134522 | /* VPMINSQZ256rmkz */ |
| 134523 | VR256X, VK4WM, VR256X, i256mem, |
| 134524 | /* VPMINSQZ256rr */ |
| 134525 | VR256X, VR256X, VR256X, |
| 134526 | /* VPMINSQZ256rrk */ |
| 134527 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 134528 | /* VPMINSQZ256rrkz */ |
| 134529 | VR256X, VK4WM, VR256X, VR256X, |
| 134530 | /* VPMINSQZrm */ |
| 134531 | VR512, VR512, i512mem, |
| 134532 | /* VPMINSQZrmb */ |
| 134533 | VR512, VR512, i64mem, |
| 134534 | /* VPMINSQZrmbk */ |
| 134535 | VR512, VR512, VK8WM, VR512, i64mem, |
| 134536 | /* VPMINSQZrmbkz */ |
| 134537 | VR512, VK8WM, VR512, i64mem, |
| 134538 | /* VPMINSQZrmk */ |
| 134539 | VR512, VR512, VK8WM, VR512, i512mem, |
| 134540 | /* VPMINSQZrmkz */ |
| 134541 | VR512, VK8WM, VR512, i512mem, |
| 134542 | /* VPMINSQZrr */ |
| 134543 | VR512, VR512, VR512, |
| 134544 | /* VPMINSQZrrk */ |
| 134545 | VR512, VR512, VK8WM, VR512, VR512, |
| 134546 | /* VPMINSQZrrkz */ |
| 134547 | VR512, VK8WM, VR512, VR512, |
| 134548 | /* VPMINSWYrm */ |
| 134549 | VR256, VR256, i256mem, |
| 134550 | /* VPMINSWYrr */ |
| 134551 | VR256, VR256, VR256, |
| 134552 | /* VPMINSWZ128rm */ |
| 134553 | VR128X, VR128X, i128mem, |
| 134554 | /* VPMINSWZ128rmk */ |
| 134555 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 134556 | /* VPMINSWZ128rmkz */ |
| 134557 | VR128X, VK8WM, VR128X, i128mem, |
| 134558 | /* VPMINSWZ128rr */ |
| 134559 | VR128X, VR128X, VR128X, |
| 134560 | /* VPMINSWZ128rrk */ |
| 134561 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134562 | /* VPMINSWZ128rrkz */ |
| 134563 | VR128X, VK8WM, VR128X, VR128X, |
| 134564 | /* VPMINSWZ256rm */ |
| 134565 | VR256X, VR256X, i256mem, |
| 134566 | /* VPMINSWZ256rmk */ |
| 134567 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 134568 | /* VPMINSWZ256rmkz */ |
| 134569 | VR256X, VK16WM, VR256X, i256mem, |
| 134570 | /* VPMINSWZ256rr */ |
| 134571 | VR256X, VR256X, VR256X, |
| 134572 | /* VPMINSWZ256rrk */ |
| 134573 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 134574 | /* VPMINSWZ256rrkz */ |
| 134575 | VR256X, VK16WM, VR256X, VR256X, |
| 134576 | /* VPMINSWZrm */ |
| 134577 | VR512, VR512, i512mem, |
| 134578 | /* VPMINSWZrmk */ |
| 134579 | VR512, VR512, VK32WM, VR512, i512mem, |
| 134580 | /* VPMINSWZrmkz */ |
| 134581 | VR512, VK32WM, VR512, i512mem, |
| 134582 | /* VPMINSWZrr */ |
| 134583 | VR512, VR512, VR512, |
| 134584 | /* VPMINSWZrrk */ |
| 134585 | VR512, VR512, VK32WM, VR512, VR512, |
| 134586 | /* VPMINSWZrrkz */ |
| 134587 | VR512, VK32WM, VR512, VR512, |
| 134588 | /* VPMINSWrm */ |
| 134589 | VR128, VR128, i128mem, |
| 134590 | /* VPMINSWrr */ |
| 134591 | VR128, VR128, VR128, |
| 134592 | /* VPMINUBYrm */ |
| 134593 | VR256, VR256, i256mem, |
| 134594 | /* VPMINUBYrr */ |
| 134595 | VR256, VR256, VR256, |
| 134596 | /* VPMINUBZ128rm */ |
| 134597 | VR128X, VR128X, i128mem, |
| 134598 | /* VPMINUBZ128rmk */ |
| 134599 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 134600 | /* VPMINUBZ128rmkz */ |
| 134601 | VR128X, VK16WM, VR128X, i128mem, |
| 134602 | /* VPMINUBZ128rr */ |
| 134603 | VR128X, VR128X, VR128X, |
| 134604 | /* VPMINUBZ128rrk */ |
| 134605 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 134606 | /* VPMINUBZ128rrkz */ |
| 134607 | VR128X, VK16WM, VR128X, VR128X, |
| 134608 | /* VPMINUBZ256rm */ |
| 134609 | VR256X, VR256X, i256mem, |
| 134610 | /* VPMINUBZ256rmk */ |
| 134611 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 134612 | /* VPMINUBZ256rmkz */ |
| 134613 | VR256X, VK32WM, VR256X, i256mem, |
| 134614 | /* VPMINUBZ256rr */ |
| 134615 | VR256X, VR256X, VR256X, |
| 134616 | /* VPMINUBZ256rrk */ |
| 134617 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 134618 | /* VPMINUBZ256rrkz */ |
| 134619 | VR256X, VK32WM, VR256X, VR256X, |
| 134620 | /* VPMINUBZrm */ |
| 134621 | VR512, VR512, i512mem, |
| 134622 | /* VPMINUBZrmk */ |
| 134623 | VR512, VR512, VK64WM, VR512, i512mem, |
| 134624 | /* VPMINUBZrmkz */ |
| 134625 | VR512, VK64WM, VR512, i512mem, |
| 134626 | /* VPMINUBZrr */ |
| 134627 | VR512, VR512, VR512, |
| 134628 | /* VPMINUBZrrk */ |
| 134629 | VR512, VR512, VK64WM, VR512, VR512, |
| 134630 | /* VPMINUBZrrkz */ |
| 134631 | VR512, VK64WM, VR512, VR512, |
| 134632 | /* VPMINUBrm */ |
| 134633 | VR128, VR128, i128mem, |
| 134634 | /* VPMINUBrr */ |
| 134635 | VR128, VR128, VR128, |
| 134636 | /* VPMINUDYrm */ |
| 134637 | VR256, VR256, i256mem, |
| 134638 | /* VPMINUDYrr */ |
| 134639 | VR256, VR256, VR256, |
| 134640 | /* VPMINUDZ128rm */ |
| 134641 | VR128X, VR128X, i128mem, |
| 134642 | /* VPMINUDZ128rmb */ |
| 134643 | VR128X, VR128X, i32mem, |
| 134644 | /* VPMINUDZ128rmbk */ |
| 134645 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 134646 | /* VPMINUDZ128rmbkz */ |
| 134647 | VR128X, VK4WM, VR128X, i32mem, |
| 134648 | /* VPMINUDZ128rmk */ |
| 134649 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 134650 | /* VPMINUDZ128rmkz */ |
| 134651 | VR128X, VK4WM, VR128X, i128mem, |
| 134652 | /* VPMINUDZ128rr */ |
| 134653 | VR128X, VR128X, VR128X, |
| 134654 | /* VPMINUDZ128rrk */ |
| 134655 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 134656 | /* VPMINUDZ128rrkz */ |
| 134657 | VR128X, VK4WM, VR128X, VR128X, |
| 134658 | /* VPMINUDZ256rm */ |
| 134659 | VR256X, VR256X, i256mem, |
| 134660 | /* VPMINUDZ256rmb */ |
| 134661 | VR256X, VR256X, i32mem, |
| 134662 | /* VPMINUDZ256rmbk */ |
| 134663 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 134664 | /* VPMINUDZ256rmbkz */ |
| 134665 | VR256X, VK8WM, VR256X, i32mem, |
| 134666 | /* VPMINUDZ256rmk */ |
| 134667 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 134668 | /* VPMINUDZ256rmkz */ |
| 134669 | VR256X, VK8WM, VR256X, i256mem, |
| 134670 | /* VPMINUDZ256rr */ |
| 134671 | VR256X, VR256X, VR256X, |
| 134672 | /* VPMINUDZ256rrk */ |
| 134673 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 134674 | /* VPMINUDZ256rrkz */ |
| 134675 | VR256X, VK8WM, VR256X, VR256X, |
| 134676 | /* VPMINUDZrm */ |
| 134677 | VR512, VR512, i512mem, |
| 134678 | /* VPMINUDZrmb */ |
| 134679 | VR512, VR512, i32mem, |
| 134680 | /* VPMINUDZrmbk */ |
| 134681 | VR512, VR512, VK16WM, VR512, i32mem, |
| 134682 | /* VPMINUDZrmbkz */ |
| 134683 | VR512, VK16WM, VR512, i32mem, |
| 134684 | /* VPMINUDZrmk */ |
| 134685 | VR512, VR512, VK16WM, VR512, i512mem, |
| 134686 | /* VPMINUDZrmkz */ |
| 134687 | VR512, VK16WM, VR512, i512mem, |
| 134688 | /* VPMINUDZrr */ |
| 134689 | VR512, VR512, VR512, |
| 134690 | /* VPMINUDZrrk */ |
| 134691 | VR512, VR512, VK16WM, VR512, VR512, |
| 134692 | /* VPMINUDZrrkz */ |
| 134693 | VR512, VK16WM, VR512, VR512, |
| 134694 | /* VPMINUDrm */ |
| 134695 | VR128, VR128, i128mem, |
| 134696 | /* VPMINUDrr */ |
| 134697 | VR128, VR128, VR128, |
| 134698 | /* VPMINUQZ128rm */ |
| 134699 | VR128X, VR128X, i128mem, |
| 134700 | /* VPMINUQZ128rmb */ |
| 134701 | VR128X, VR128X, i64mem, |
| 134702 | /* VPMINUQZ128rmbk */ |
| 134703 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 134704 | /* VPMINUQZ128rmbkz */ |
| 134705 | VR128X, VK2WM, VR128X, i64mem, |
| 134706 | /* VPMINUQZ128rmk */ |
| 134707 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 134708 | /* VPMINUQZ128rmkz */ |
| 134709 | VR128X, VK2WM, VR128X, i128mem, |
| 134710 | /* VPMINUQZ128rr */ |
| 134711 | VR128X, VR128X, VR128X, |
| 134712 | /* VPMINUQZ128rrk */ |
| 134713 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 134714 | /* VPMINUQZ128rrkz */ |
| 134715 | VR128X, VK2WM, VR128X, VR128X, |
| 134716 | /* VPMINUQZ256rm */ |
| 134717 | VR256X, VR256X, i256mem, |
| 134718 | /* VPMINUQZ256rmb */ |
| 134719 | VR256X, VR256X, i64mem, |
| 134720 | /* VPMINUQZ256rmbk */ |
| 134721 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 134722 | /* VPMINUQZ256rmbkz */ |
| 134723 | VR256X, VK4WM, VR256X, i64mem, |
| 134724 | /* VPMINUQZ256rmk */ |
| 134725 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 134726 | /* VPMINUQZ256rmkz */ |
| 134727 | VR256X, VK4WM, VR256X, i256mem, |
| 134728 | /* VPMINUQZ256rr */ |
| 134729 | VR256X, VR256X, VR256X, |
| 134730 | /* VPMINUQZ256rrk */ |
| 134731 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 134732 | /* VPMINUQZ256rrkz */ |
| 134733 | VR256X, VK4WM, VR256X, VR256X, |
| 134734 | /* VPMINUQZrm */ |
| 134735 | VR512, VR512, i512mem, |
| 134736 | /* VPMINUQZrmb */ |
| 134737 | VR512, VR512, i64mem, |
| 134738 | /* VPMINUQZrmbk */ |
| 134739 | VR512, VR512, VK8WM, VR512, i64mem, |
| 134740 | /* VPMINUQZrmbkz */ |
| 134741 | VR512, VK8WM, VR512, i64mem, |
| 134742 | /* VPMINUQZrmk */ |
| 134743 | VR512, VR512, VK8WM, VR512, i512mem, |
| 134744 | /* VPMINUQZrmkz */ |
| 134745 | VR512, VK8WM, VR512, i512mem, |
| 134746 | /* VPMINUQZrr */ |
| 134747 | VR512, VR512, VR512, |
| 134748 | /* VPMINUQZrrk */ |
| 134749 | VR512, VR512, VK8WM, VR512, VR512, |
| 134750 | /* VPMINUQZrrkz */ |
| 134751 | VR512, VK8WM, VR512, VR512, |
| 134752 | /* VPMINUWYrm */ |
| 134753 | VR256, VR256, i256mem, |
| 134754 | /* VPMINUWYrr */ |
| 134755 | VR256, VR256, VR256, |
| 134756 | /* VPMINUWZ128rm */ |
| 134757 | VR128X, VR128X, i128mem, |
| 134758 | /* VPMINUWZ128rmk */ |
| 134759 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 134760 | /* VPMINUWZ128rmkz */ |
| 134761 | VR128X, VK8WM, VR128X, i128mem, |
| 134762 | /* VPMINUWZ128rr */ |
| 134763 | VR128X, VR128X, VR128X, |
| 134764 | /* VPMINUWZ128rrk */ |
| 134765 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 134766 | /* VPMINUWZ128rrkz */ |
| 134767 | VR128X, VK8WM, VR128X, VR128X, |
| 134768 | /* VPMINUWZ256rm */ |
| 134769 | VR256X, VR256X, i256mem, |
| 134770 | /* VPMINUWZ256rmk */ |
| 134771 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 134772 | /* VPMINUWZ256rmkz */ |
| 134773 | VR256X, VK16WM, VR256X, i256mem, |
| 134774 | /* VPMINUWZ256rr */ |
| 134775 | VR256X, VR256X, VR256X, |
| 134776 | /* VPMINUWZ256rrk */ |
| 134777 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 134778 | /* VPMINUWZ256rrkz */ |
| 134779 | VR256X, VK16WM, VR256X, VR256X, |
| 134780 | /* VPMINUWZrm */ |
| 134781 | VR512, VR512, i512mem, |
| 134782 | /* VPMINUWZrmk */ |
| 134783 | VR512, VR512, VK32WM, VR512, i512mem, |
| 134784 | /* VPMINUWZrmkz */ |
| 134785 | VR512, VK32WM, VR512, i512mem, |
| 134786 | /* VPMINUWZrr */ |
| 134787 | VR512, VR512, VR512, |
| 134788 | /* VPMINUWZrrk */ |
| 134789 | VR512, VR512, VK32WM, VR512, VR512, |
| 134790 | /* VPMINUWZrrkz */ |
| 134791 | VR512, VK32WM, VR512, VR512, |
| 134792 | /* VPMINUWrm */ |
| 134793 | VR128, VR128, i128mem, |
| 134794 | /* VPMINUWrr */ |
| 134795 | VR128, VR128, VR128, |
| 134796 | /* VPMOVB2MZ128rr */ |
| 134797 | VK16, VR128X, |
| 134798 | /* VPMOVB2MZ256rr */ |
| 134799 | VK32, VR256X, |
| 134800 | /* VPMOVB2MZrr */ |
| 134801 | VK64, VR512, |
| 134802 | /* VPMOVD2MZ128rr */ |
| 134803 | VK4, VR128X, |
| 134804 | /* VPMOVD2MZ256rr */ |
| 134805 | VK8, VR256X, |
| 134806 | /* VPMOVD2MZrr */ |
| 134807 | VK16, VR512, |
| 134808 | /* VPMOVDBZ128mr */ |
| 134809 | i32mem, VR128X, |
| 134810 | /* VPMOVDBZ128mrk */ |
| 134811 | i32mem, VK4WM, VR128X, |
| 134812 | /* VPMOVDBZ128rr */ |
| 134813 | VR128X, VR128X, |
| 134814 | /* VPMOVDBZ128rrk */ |
| 134815 | VR128X, VR128X, VK4WM, VR128X, |
| 134816 | /* VPMOVDBZ128rrkz */ |
| 134817 | VR128X, VK4WM, VR128X, |
| 134818 | /* VPMOVDBZ256mr */ |
| 134819 | i64mem, VR256X, |
| 134820 | /* VPMOVDBZ256mrk */ |
| 134821 | i64mem, VK8WM, VR256X, |
| 134822 | /* VPMOVDBZ256rr */ |
| 134823 | VR128X, VR256X, |
| 134824 | /* VPMOVDBZ256rrk */ |
| 134825 | VR128X, VR128X, VK8WM, VR256X, |
| 134826 | /* VPMOVDBZ256rrkz */ |
| 134827 | VR128X, VK8WM, VR256X, |
| 134828 | /* VPMOVDBZmr */ |
| 134829 | i128mem, VR512, |
| 134830 | /* VPMOVDBZmrk */ |
| 134831 | i128mem, VK16WM, VR512, |
| 134832 | /* VPMOVDBZrr */ |
| 134833 | VR128X, VR512, |
| 134834 | /* VPMOVDBZrrk */ |
| 134835 | VR128X, VR128X, VK16WM, VR512, |
| 134836 | /* VPMOVDBZrrkz */ |
| 134837 | VR128X, VK16WM, VR512, |
| 134838 | /* VPMOVDWZ128mr */ |
| 134839 | i64mem, VR128X, |
| 134840 | /* VPMOVDWZ128mrk */ |
| 134841 | i64mem, VK4WM, VR128X, |
| 134842 | /* VPMOVDWZ128rr */ |
| 134843 | VR128X, VR128X, |
| 134844 | /* VPMOVDWZ128rrk */ |
| 134845 | VR128X, VR128X, VK4WM, VR128X, |
| 134846 | /* VPMOVDWZ128rrkz */ |
| 134847 | VR128X, VK4WM, VR128X, |
| 134848 | /* VPMOVDWZ256mr */ |
| 134849 | i128mem, VR256X, |
| 134850 | /* VPMOVDWZ256mrk */ |
| 134851 | i128mem, VK8WM, VR256X, |
| 134852 | /* VPMOVDWZ256rr */ |
| 134853 | VR128X, VR256X, |
| 134854 | /* VPMOVDWZ256rrk */ |
| 134855 | VR128X, VR128X, VK8WM, VR256X, |
| 134856 | /* VPMOVDWZ256rrkz */ |
| 134857 | VR128X, VK8WM, VR256X, |
| 134858 | /* VPMOVDWZmr */ |
| 134859 | i256mem, VR512, |
| 134860 | /* VPMOVDWZmrk */ |
| 134861 | i256mem, VK16WM, VR512, |
| 134862 | /* VPMOVDWZrr */ |
| 134863 | VR256X, VR512, |
| 134864 | /* VPMOVDWZrrk */ |
| 134865 | VR256X, VR256X, VK16WM, VR512, |
| 134866 | /* VPMOVDWZrrkz */ |
| 134867 | VR256X, VK16WM, VR512, |
| 134868 | /* VPMOVM2BZ128rr */ |
| 134869 | VR128X, VK16, |
| 134870 | /* VPMOVM2BZ256rr */ |
| 134871 | VR256X, VK32, |
| 134872 | /* VPMOVM2BZrr */ |
| 134873 | VR512, VK64, |
| 134874 | /* VPMOVM2DZ128rr */ |
| 134875 | VR128X, VK4, |
| 134876 | /* VPMOVM2DZ256rr */ |
| 134877 | VR256X, VK8, |
| 134878 | /* VPMOVM2DZrr */ |
| 134879 | VR512, VK16, |
| 134880 | /* VPMOVM2QZ128rr */ |
| 134881 | VR128X, VK2, |
| 134882 | /* VPMOVM2QZ256rr */ |
| 134883 | VR256X, VK4, |
| 134884 | /* VPMOVM2QZrr */ |
| 134885 | VR512, VK8, |
| 134886 | /* VPMOVM2WZ128rr */ |
| 134887 | VR128X, VK8, |
| 134888 | /* VPMOVM2WZ256rr */ |
| 134889 | VR256X, VK16, |
| 134890 | /* VPMOVM2WZrr */ |
| 134891 | VR512, VK32, |
| 134892 | /* VPMOVMSKBYrr */ |
| 134893 | GR32orGR64, VR256, |
| 134894 | /* VPMOVMSKBrr */ |
| 134895 | GR32orGR64, VR128, |
| 134896 | /* VPMOVQ2MZ128rr */ |
| 134897 | VK2, VR128X, |
| 134898 | /* VPMOVQ2MZ256rr */ |
| 134899 | VK4, VR256X, |
| 134900 | /* VPMOVQ2MZrr */ |
| 134901 | VK8, VR512, |
| 134902 | /* VPMOVQBZ128mr */ |
| 134903 | i16mem, VR128X, |
| 134904 | /* VPMOVQBZ128mrk */ |
| 134905 | i16mem, VK2WM, VR128X, |
| 134906 | /* VPMOVQBZ128rr */ |
| 134907 | VR128X, VR128X, |
| 134908 | /* VPMOVQBZ128rrk */ |
| 134909 | VR128X, VR128X, VK2WM, VR128X, |
| 134910 | /* VPMOVQBZ128rrkz */ |
| 134911 | VR128X, VK2WM, VR128X, |
| 134912 | /* VPMOVQBZ256mr */ |
| 134913 | i32mem, VR256X, |
| 134914 | /* VPMOVQBZ256mrk */ |
| 134915 | i32mem, VK4WM, VR256X, |
| 134916 | /* VPMOVQBZ256rr */ |
| 134917 | VR128X, VR256X, |
| 134918 | /* VPMOVQBZ256rrk */ |
| 134919 | VR128X, VR128X, VK4WM, VR256X, |
| 134920 | /* VPMOVQBZ256rrkz */ |
| 134921 | VR128X, VK4WM, VR256X, |
| 134922 | /* VPMOVQBZmr */ |
| 134923 | i64mem, VR512, |
| 134924 | /* VPMOVQBZmrk */ |
| 134925 | i64mem, VK8WM, VR512, |
| 134926 | /* VPMOVQBZrr */ |
| 134927 | VR128X, VR512, |
| 134928 | /* VPMOVQBZrrk */ |
| 134929 | VR128X, VR128X, VK8WM, VR512, |
| 134930 | /* VPMOVQBZrrkz */ |
| 134931 | VR128X, VK8WM, VR512, |
| 134932 | /* VPMOVQDZ128mr */ |
| 134933 | i64mem, VR128X, |
| 134934 | /* VPMOVQDZ128mrk */ |
| 134935 | i64mem, VK2WM, VR128X, |
| 134936 | /* VPMOVQDZ128rr */ |
| 134937 | VR128X, VR128X, |
| 134938 | /* VPMOVQDZ128rrk */ |
| 134939 | VR128X, VR128X, VK2WM, VR128X, |
| 134940 | /* VPMOVQDZ128rrkz */ |
| 134941 | VR128X, VK2WM, VR128X, |
| 134942 | /* VPMOVQDZ256mr */ |
| 134943 | i128mem, VR256X, |
| 134944 | /* VPMOVQDZ256mrk */ |
| 134945 | i128mem, VK4WM, VR256X, |
| 134946 | /* VPMOVQDZ256rr */ |
| 134947 | VR128X, VR256X, |
| 134948 | /* VPMOVQDZ256rrk */ |
| 134949 | VR128X, VR128X, VK4WM, VR256X, |
| 134950 | /* VPMOVQDZ256rrkz */ |
| 134951 | VR128X, VK4WM, VR256X, |
| 134952 | /* VPMOVQDZmr */ |
| 134953 | i256mem, VR512, |
| 134954 | /* VPMOVQDZmrk */ |
| 134955 | i256mem, VK8WM, VR512, |
| 134956 | /* VPMOVQDZrr */ |
| 134957 | VR256X, VR512, |
| 134958 | /* VPMOVQDZrrk */ |
| 134959 | VR256X, VR256X, VK8WM, VR512, |
| 134960 | /* VPMOVQDZrrkz */ |
| 134961 | VR256X, VK8WM, VR512, |
| 134962 | /* VPMOVQWZ128mr */ |
| 134963 | i32mem, VR128X, |
| 134964 | /* VPMOVQWZ128mrk */ |
| 134965 | i32mem, VK2WM, VR128X, |
| 134966 | /* VPMOVQWZ128rr */ |
| 134967 | VR128X, VR128X, |
| 134968 | /* VPMOVQWZ128rrk */ |
| 134969 | VR128X, VR128X, VK2WM, VR128X, |
| 134970 | /* VPMOVQWZ128rrkz */ |
| 134971 | VR128X, VK2WM, VR128X, |
| 134972 | /* VPMOVQWZ256mr */ |
| 134973 | i64mem, VR256X, |
| 134974 | /* VPMOVQWZ256mrk */ |
| 134975 | i64mem, VK4WM, VR256X, |
| 134976 | /* VPMOVQWZ256rr */ |
| 134977 | VR128X, VR256X, |
| 134978 | /* VPMOVQWZ256rrk */ |
| 134979 | VR128X, VR128X, VK4WM, VR256X, |
| 134980 | /* VPMOVQWZ256rrkz */ |
| 134981 | VR128X, VK4WM, VR256X, |
| 134982 | /* VPMOVQWZmr */ |
| 134983 | i128mem, VR512, |
| 134984 | /* VPMOVQWZmrk */ |
| 134985 | i128mem, VK8WM, VR512, |
| 134986 | /* VPMOVQWZrr */ |
| 134987 | VR128X, VR512, |
| 134988 | /* VPMOVQWZrrk */ |
| 134989 | VR128X, VR128X, VK8WM, VR512, |
| 134990 | /* VPMOVQWZrrkz */ |
| 134991 | VR128X, VK8WM, VR512, |
| 134992 | /* VPMOVSDBZ128mr */ |
| 134993 | i32mem, VR128X, |
| 134994 | /* VPMOVSDBZ128mrk */ |
| 134995 | i32mem, VK4WM, VR128X, |
| 134996 | /* VPMOVSDBZ128rr */ |
| 134997 | VR128X, VR128X, |
| 134998 | /* VPMOVSDBZ128rrk */ |
| 134999 | VR128X, VR128X, VK4WM, VR128X, |
| 135000 | /* VPMOVSDBZ128rrkz */ |
| 135001 | VR128X, VK4WM, VR128X, |
| 135002 | /* VPMOVSDBZ256mr */ |
| 135003 | i64mem, VR256X, |
| 135004 | /* VPMOVSDBZ256mrk */ |
| 135005 | i64mem, VK8WM, VR256X, |
| 135006 | /* VPMOVSDBZ256rr */ |
| 135007 | VR128X, VR256X, |
| 135008 | /* VPMOVSDBZ256rrk */ |
| 135009 | VR128X, VR128X, VK8WM, VR256X, |
| 135010 | /* VPMOVSDBZ256rrkz */ |
| 135011 | VR128X, VK8WM, VR256X, |
| 135012 | /* VPMOVSDBZmr */ |
| 135013 | i128mem, VR512, |
| 135014 | /* VPMOVSDBZmrk */ |
| 135015 | i128mem, VK16WM, VR512, |
| 135016 | /* VPMOVSDBZrr */ |
| 135017 | VR128X, VR512, |
| 135018 | /* VPMOVSDBZrrk */ |
| 135019 | VR128X, VR128X, VK16WM, VR512, |
| 135020 | /* VPMOVSDBZrrkz */ |
| 135021 | VR128X, VK16WM, VR512, |
| 135022 | /* VPMOVSDWZ128mr */ |
| 135023 | i64mem, VR128X, |
| 135024 | /* VPMOVSDWZ128mrk */ |
| 135025 | i64mem, VK4WM, VR128X, |
| 135026 | /* VPMOVSDWZ128rr */ |
| 135027 | VR128X, VR128X, |
| 135028 | /* VPMOVSDWZ128rrk */ |
| 135029 | VR128X, VR128X, VK4WM, VR128X, |
| 135030 | /* VPMOVSDWZ128rrkz */ |
| 135031 | VR128X, VK4WM, VR128X, |
| 135032 | /* VPMOVSDWZ256mr */ |
| 135033 | i128mem, VR256X, |
| 135034 | /* VPMOVSDWZ256mrk */ |
| 135035 | i128mem, VK8WM, VR256X, |
| 135036 | /* VPMOVSDWZ256rr */ |
| 135037 | VR128X, VR256X, |
| 135038 | /* VPMOVSDWZ256rrk */ |
| 135039 | VR128X, VR128X, VK8WM, VR256X, |
| 135040 | /* VPMOVSDWZ256rrkz */ |
| 135041 | VR128X, VK8WM, VR256X, |
| 135042 | /* VPMOVSDWZmr */ |
| 135043 | i256mem, VR512, |
| 135044 | /* VPMOVSDWZmrk */ |
| 135045 | i256mem, VK16WM, VR512, |
| 135046 | /* VPMOVSDWZrr */ |
| 135047 | VR256X, VR512, |
| 135048 | /* VPMOVSDWZrrk */ |
| 135049 | VR256X, VR256X, VK16WM, VR512, |
| 135050 | /* VPMOVSDWZrrkz */ |
| 135051 | VR256X, VK16WM, VR512, |
| 135052 | /* VPMOVSQBZ128mr */ |
| 135053 | i16mem, VR128X, |
| 135054 | /* VPMOVSQBZ128mrk */ |
| 135055 | i16mem, VK2WM, VR128X, |
| 135056 | /* VPMOVSQBZ128rr */ |
| 135057 | VR128X, VR128X, |
| 135058 | /* VPMOVSQBZ128rrk */ |
| 135059 | VR128X, VR128X, VK2WM, VR128X, |
| 135060 | /* VPMOVSQBZ128rrkz */ |
| 135061 | VR128X, VK2WM, VR128X, |
| 135062 | /* VPMOVSQBZ256mr */ |
| 135063 | i32mem, VR256X, |
| 135064 | /* VPMOVSQBZ256mrk */ |
| 135065 | i32mem, VK4WM, VR256X, |
| 135066 | /* VPMOVSQBZ256rr */ |
| 135067 | VR128X, VR256X, |
| 135068 | /* VPMOVSQBZ256rrk */ |
| 135069 | VR128X, VR128X, VK4WM, VR256X, |
| 135070 | /* VPMOVSQBZ256rrkz */ |
| 135071 | VR128X, VK4WM, VR256X, |
| 135072 | /* VPMOVSQBZmr */ |
| 135073 | i64mem, VR512, |
| 135074 | /* VPMOVSQBZmrk */ |
| 135075 | i64mem, VK8WM, VR512, |
| 135076 | /* VPMOVSQBZrr */ |
| 135077 | VR128X, VR512, |
| 135078 | /* VPMOVSQBZrrk */ |
| 135079 | VR128X, VR128X, VK8WM, VR512, |
| 135080 | /* VPMOVSQBZrrkz */ |
| 135081 | VR128X, VK8WM, VR512, |
| 135082 | /* VPMOVSQDZ128mr */ |
| 135083 | i64mem, VR128X, |
| 135084 | /* VPMOVSQDZ128mrk */ |
| 135085 | i64mem, VK2WM, VR128X, |
| 135086 | /* VPMOVSQDZ128rr */ |
| 135087 | VR128X, VR128X, |
| 135088 | /* VPMOVSQDZ128rrk */ |
| 135089 | VR128X, VR128X, VK2WM, VR128X, |
| 135090 | /* VPMOVSQDZ128rrkz */ |
| 135091 | VR128X, VK2WM, VR128X, |
| 135092 | /* VPMOVSQDZ256mr */ |
| 135093 | i128mem, VR256X, |
| 135094 | /* VPMOVSQDZ256mrk */ |
| 135095 | i128mem, VK4WM, VR256X, |
| 135096 | /* VPMOVSQDZ256rr */ |
| 135097 | VR128X, VR256X, |
| 135098 | /* VPMOVSQDZ256rrk */ |
| 135099 | VR128X, VR128X, VK4WM, VR256X, |
| 135100 | /* VPMOVSQDZ256rrkz */ |
| 135101 | VR128X, VK4WM, VR256X, |
| 135102 | /* VPMOVSQDZmr */ |
| 135103 | i256mem, VR512, |
| 135104 | /* VPMOVSQDZmrk */ |
| 135105 | i256mem, VK8WM, VR512, |
| 135106 | /* VPMOVSQDZrr */ |
| 135107 | VR256X, VR512, |
| 135108 | /* VPMOVSQDZrrk */ |
| 135109 | VR256X, VR256X, VK8WM, VR512, |
| 135110 | /* VPMOVSQDZrrkz */ |
| 135111 | VR256X, VK8WM, VR512, |
| 135112 | /* VPMOVSQWZ128mr */ |
| 135113 | i32mem, VR128X, |
| 135114 | /* VPMOVSQWZ128mrk */ |
| 135115 | i32mem, VK2WM, VR128X, |
| 135116 | /* VPMOVSQWZ128rr */ |
| 135117 | VR128X, VR128X, |
| 135118 | /* VPMOVSQWZ128rrk */ |
| 135119 | VR128X, VR128X, VK2WM, VR128X, |
| 135120 | /* VPMOVSQWZ128rrkz */ |
| 135121 | VR128X, VK2WM, VR128X, |
| 135122 | /* VPMOVSQWZ256mr */ |
| 135123 | i64mem, VR256X, |
| 135124 | /* VPMOVSQWZ256mrk */ |
| 135125 | i64mem, VK4WM, VR256X, |
| 135126 | /* VPMOVSQWZ256rr */ |
| 135127 | VR128X, VR256X, |
| 135128 | /* VPMOVSQWZ256rrk */ |
| 135129 | VR128X, VR128X, VK4WM, VR256X, |
| 135130 | /* VPMOVSQWZ256rrkz */ |
| 135131 | VR128X, VK4WM, VR256X, |
| 135132 | /* VPMOVSQWZmr */ |
| 135133 | i128mem, VR512, |
| 135134 | /* VPMOVSQWZmrk */ |
| 135135 | i128mem, VK8WM, VR512, |
| 135136 | /* VPMOVSQWZrr */ |
| 135137 | VR128X, VR512, |
| 135138 | /* VPMOVSQWZrrk */ |
| 135139 | VR128X, VR128X, VK8WM, VR512, |
| 135140 | /* VPMOVSQWZrrkz */ |
| 135141 | VR128X, VK8WM, VR512, |
| 135142 | /* VPMOVSWBZ128mr */ |
| 135143 | i64mem, VR128X, |
| 135144 | /* VPMOVSWBZ128mrk */ |
| 135145 | i64mem, VK8WM, VR128X, |
| 135146 | /* VPMOVSWBZ128rr */ |
| 135147 | VR128X, VR128X, |
| 135148 | /* VPMOVSWBZ128rrk */ |
| 135149 | VR128X, VR128X, VK8WM, VR128X, |
| 135150 | /* VPMOVSWBZ128rrkz */ |
| 135151 | VR128X, VK8WM, VR128X, |
| 135152 | /* VPMOVSWBZ256mr */ |
| 135153 | i128mem, VR256X, |
| 135154 | /* VPMOVSWBZ256mrk */ |
| 135155 | i128mem, VK16WM, VR256X, |
| 135156 | /* VPMOVSWBZ256rr */ |
| 135157 | VR128X, VR256X, |
| 135158 | /* VPMOVSWBZ256rrk */ |
| 135159 | VR128X, VR128X, VK16WM, VR256X, |
| 135160 | /* VPMOVSWBZ256rrkz */ |
| 135161 | VR128X, VK16WM, VR256X, |
| 135162 | /* VPMOVSWBZmr */ |
| 135163 | i256mem, VR512, |
| 135164 | /* VPMOVSWBZmrk */ |
| 135165 | i256mem, VK32WM, VR512, |
| 135166 | /* VPMOVSWBZrr */ |
| 135167 | VR256X, VR512, |
| 135168 | /* VPMOVSWBZrrk */ |
| 135169 | VR256X, VR256X, VK32WM, VR512, |
| 135170 | /* VPMOVSWBZrrkz */ |
| 135171 | VR256X, VK32WM, VR512, |
| 135172 | /* VPMOVSXBDYrm */ |
| 135173 | VR256, i64mem, |
| 135174 | /* VPMOVSXBDYrr */ |
| 135175 | VR256, VR128, |
| 135176 | /* VPMOVSXBDZ128rm */ |
| 135177 | VR128X, i32mem, |
| 135178 | /* VPMOVSXBDZ128rmk */ |
| 135179 | VR128X, VR128X, VK4WM, i32mem, |
| 135180 | /* VPMOVSXBDZ128rmkz */ |
| 135181 | VR128X, VK4WM, i32mem, |
| 135182 | /* VPMOVSXBDZ128rr */ |
| 135183 | VR128X, VR128X, |
| 135184 | /* VPMOVSXBDZ128rrk */ |
| 135185 | VR128X, VR128X, VK4WM, VR128X, |
| 135186 | /* VPMOVSXBDZ128rrkz */ |
| 135187 | VR128X, VK4WM, VR128X, |
| 135188 | /* VPMOVSXBDZ256rm */ |
| 135189 | VR256X, i64mem, |
| 135190 | /* VPMOVSXBDZ256rmk */ |
| 135191 | VR256X, VR256X, VK8WM, i64mem, |
| 135192 | /* VPMOVSXBDZ256rmkz */ |
| 135193 | VR256X, VK8WM, i64mem, |
| 135194 | /* VPMOVSXBDZ256rr */ |
| 135195 | VR256X, VR128X, |
| 135196 | /* VPMOVSXBDZ256rrk */ |
| 135197 | VR256X, VR256X, VK8WM, VR128X, |
| 135198 | /* VPMOVSXBDZ256rrkz */ |
| 135199 | VR256X, VK8WM, VR128X, |
| 135200 | /* VPMOVSXBDZrm */ |
| 135201 | VR512, i128mem, |
| 135202 | /* VPMOVSXBDZrmk */ |
| 135203 | VR512, VR512, VK16WM, i128mem, |
| 135204 | /* VPMOVSXBDZrmkz */ |
| 135205 | VR512, VK16WM, i128mem, |
| 135206 | /* VPMOVSXBDZrr */ |
| 135207 | VR512, VR128X, |
| 135208 | /* VPMOVSXBDZrrk */ |
| 135209 | VR512, VR512, VK16WM, VR128X, |
| 135210 | /* VPMOVSXBDZrrkz */ |
| 135211 | VR512, VK16WM, VR128X, |
| 135212 | /* VPMOVSXBDrm */ |
| 135213 | VR128, i32mem, |
| 135214 | /* VPMOVSXBDrr */ |
| 135215 | VR128, VR128, |
| 135216 | /* VPMOVSXBQYrm */ |
| 135217 | VR256, i32mem, |
| 135218 | /* VPMOVSXBQYrr */ |
| 135219 | VR256, VR128, |
| 135220 | /* VPMOVSXBQZ128rm */ |
| 135221 | VR128X, i16mem, |
| 135222 | /* VPMOVSXBQZ128rmk */ |
| 135223 | VR128X, VR128X, VK2WM, i16mem, |
| 135224 | /* VPMOVSXBQZ128rmkz */ |
| 135225 | VR128X, VK2WM, i16mem, |
| 135226 | /* VPMOVSXBQZ128rr */ |
| 135227 | VR128X, VR128X, |
| 135228 | /* VPMOVSXBQZ128rrk */ |
| 135229 | VR128X, VR128X, VK2WM, VR128X, |
| 135230 | /* VPMOVSXBQZ128rrkz */ |
| 135231 | VR128X, VK2WM, VR128X, |
| 135232 | /* VPMOVSXBQZ256rm */ |
| 135233 | VR256X, i32mem, |
| 135234 | /* VPMOVSXBQZ256rmk */ |
| 135235 | VR256X, VR256X, VK4WM, i32mem, |
| 135236 | /* VPMOVSXBQZ256rmkz */ |
| 135237 | VR256X, VK4WM, i32mem, |
| 135238 | /* VPMOVSXBQZ256rr */ |
| 135239 | VR256X, VR128X, |
| 135240 | /* VPMOVSXBQZ256rrk */ |
| 135241 | VR256X, VR256X, VK4WM, VR128X, |
| 135242 | /* VPMOVSXBQZ256rrkz */ |
| 135243 | VR256X, VK4WM, VR128X, |
| 135244 | /* VPMOVSXBQZrm */ |
| 135245 | VR512, i64mem, |
| 135246 | /* VPMOVSXBQZrmk */ |
| 135247 | VR512, VR512, VK8WM, i64mem, |
| 135248 | /* VPMOVSXBQZrmkz */ |
| 135249 | VR512, VK8WM, i64mem, |
| 135250 | /* VPMOVSXBQZrr */ |
| 135251 | VR512, VR128X, |
| 135252 | /* VPMOVSXBQZrrk */ |
| 135253 | VR512, VR512, VK8WM, VR128X, |
| 135254 | /* VPMOVSXBQZrrkz */ |
| 135255 | VR512, VK8WM, VR128X, |
| 135256 | /* VPMOVSXBQrm */ |
| 135257 | VR128, i16mem, |
| 135258 | /* VPMOVSXBQrr */ |
| 135259 | VR128, VR128, |
| 135260 | /* VPMOVSXBWYrm */ |
| 135261 | VR256, i128mem, |
| 135262 | /* VPMOVSXBWYrr */ |
| 135263 | VR256, VR128, |
| 135264 | /* VPMOVSXBWZ128rm */ |
| 135265 | VR128X, i64mem, |
| 135266 | /* VPMOVSXBWZ128rmk */ |
| 135267 | VR128X, VR128X, VK8WM, i64mem, |
| 135268 | /* VPMOVSXBWZ128rmkz */ |
| 135269 | VR128X, VK8WM, i64mem, |
| 135270 | /* VPMOVSXBWZ128rr */ |
| 135271 | VR128X, VR128X, |
| 135272 | /* VPMOVSXBWZ128rrk */ |
| 135273 | VR128X, VR128X, VK8WM, VR128X, |
| 135274 | /* VPMOVSXBWZ128rrkz */ |
| 135275 | VR128X, VK8WM, VR128X, |
| 135276 | /* VPMOVSXBWZ256rm */ |
| 135277 | VR256X, i128mem, |
| 135278 | /* VPMOVSXBWZ256rmk */ |
| 135279 | VR256X, VR256X, VK16WM, i128mem, |
| 135280 | /* VPMOVSXBWZ256rmkz */ |
| 135281 | VR256X, VK16WM, i128mem, |
| 135282 | /* VPMOVSXBWZ256rr */ |
| 135283 | VR256X, VR128X, |
| 135284 | /* VPMOVSXBWZ256rrk */ |
| 135285 | VR256X, VR256X, VK16WM, VR128X, |
| 135286 | /* VPMOVSXBWZ256rrkz */ |
| 135287 | VR256X, VK16WM, VR128X, |
| 135288 | /* VPMOVSXBWZrm */ |
| 135289 | VR512, i256mem, |
| 135290 | /* VPMOVSXBWZrmk */ |
| 135291 | VR512, VR512, VK32WM, i256mem, |
| 135292 | /* VPMOVSXBWZrmkz */ |
| 135293 | VR512, VK32WM, i256mem, |
| 135294 | /* VPMOVSXBWZrr */ |
| 135295 | VR512, VR256X, |
| 135296 | /* VPMOVSXBWZrrk */ |
| 135297 | VR512, VR512, VK32WM, VR256X, |
| 135298 | /* VPMOVSXBWZrrkz */ |
| 135299 | VR512, VK32WM, VR256X, |
| 135300 | /* VPMOVSXBWrm */ |
| 135301 | VR128, i64mem, |
| 135302 | /* VPMOVSXBWrr */ |
| 135303 | VR128, VR128, |
| 135304 | /* VPMOVSXDQYrm */ |
| 135305 | VR256, i128mem, |
| 135306 | /* VPMOVSXDQYrr */ |
| 135307 | VR256, VR128, |
| 135308 | /* VPMOVSXDQZ128rm */ |
| 135309 | VR128X, i64mem, |
| 135310 | /* VPMOVSXDQZ128rmk */ |
| 135311 | VR128X, VR128X, VK2WM, i64mem, |
| 135312 | /* VPMOVSXDQZ128rmkz */ |
| 135313 | VR128X, VK2WM, i64mem, |
| 135314 | /* VPMOVSXDQZ128rr */ |
| 135315 | VR128X, VR128X, |
| 135316 | /* VPMOVSXDQZ128rrk */ |
| 135317 | VR128X, VR128X, VK2WM, VR128X, |
| 135318 | /* VPMOVSXDQZ128rrkz */ |
| 135319 | VR128X, VK2WM, VR128X, |
| 135320 | /* VPMOVSXDQZ256rm */ |
| 135321 | VR256X, i128mem, |
| 135322 | /* VPMOVSXDQZ256rmk */ |
| 135323 | VR256X, VR256X, VK4WM, i128mem, |
| 135324 | /* VPMOVSXDQZ256rmkz */ |
| 135325 | VR256X, VK4WM, i128mem, |
| 135326 | /* VPMOVSXDQZ256rr */ |
| 135327 | VR256X, VR128X, |
| 135328 | /* VPMOVSXDQZ256rrk */ |
| 135329 | VR256X, VR256X, VK4WM, VR128X, |
| 135330 | /* VPMOVSXDQZ256rrkz */ |
| 135331 | VR256X, VK4WM, VR128X, |
| 135332 | /* VPMOVSXDQZrm */ |
| 135333 | VR512, i256mem, |
| 135334 | /* VPMOVSXDQZrmk */ |
| 135335 | VR512, VR512, VK8WM, i256mem, |
| 135336 | /* VPMOVSXDQZrmkz */ |
| 135337 | VR512, VK8WM, i256mem, |
| 135338 | /* VPMOVSXDQZrr */ |
| 135339 | VR512, VR256X, |
| 135340 | /* VPMOVSXDQZrrk */ |
| 135341 | VR512, VR512, VK8WM, VR256X, |
| 135342 | /* VPMOVSXDQZrrkz */ |
| 135343 | VR512, VK8WM, VR256X, |
| 135344 | /* VPMOVSXDQrm */ |
| 135345 | VR128, i64mem, |
| 135346 | /* VPMOVSXDQrr */ |
| 135347 | VR128, VR128, |
| 135348 | /* VPMOVSXWDYrm */ |
| 135349 | VR256, i128mem, |
| 135350 | /* VPMOVSXWDYrr */ |
| 135351 | VR256, VR128, |
| 135352 | /* VPMOVSXWDZ128rm */ |
| 135353 | VR128X, i64mem, |
| 135354 | /* VPMOVSXWDZ128rmk */ |
| 135355 | VR128X, VR128X, VK4WM, i64mem, |
| 135356 | /* VPMOVSXWDZ128rmkz */ |
| 135357 | VR128X, VK4WM, i64mem, |
| 135358 | /* VPMOVSXWDZ128rr */ |
| 135359 | VR128X, VR128X, |
| 135360 | /* VPMOVSXWDZ128rrk */ |
| 135361 | VR128X, VR128X, VK4WM, VR128X, |
| 135362 | /* VPMOVSXWDZ128rrkz */ |
| 135363 | VR128X, VK4WM, VR128X, |
| 135364 | /* VPMOVSXWDZ256rm */ |
| 135365 | VR256X, i128mem, |
| 135366 | /* VPMOVSXWDZ256rmk */ |
| 135367 | VR256X, VR256X, VK8WM, i128mem, |
| 135368 | /* VPMOVSXWDZ256rmkz */ |
| 135369 | VR256X, VK8WM, i128mem, |
| 135370 | /* VPMOVSXWDZ256rr */ |
| 135371 | VR256X, VR128X, |
| 135372 | /* VPMOVSXWDZ256rrk */ |
| 135373 | VR256X, VR256X, VK8WM, VR128X, |
| 135374 | /* VPMOVSXWDZ256rrkz */ |
| 135375 | VR256X, VK8WM, VR128X, |
| 135376 | /* VPMOVSXWDZrm */ |
| 135377 | VR512, i256mem, |
| 135378 | /* VPMOVSXWDZrmk */ |
| 135379 | VR512, VR512, VK16WM, i256mem, |
| 135380 | /* VPMOVSXWDZrmkz */ |
| 135381 | VR512, VK16WM, i256mem, |
| 135382 | /* VPMOVSXWDZrr */ |
| 135383 | VR512, VR256X, |
| 135384 | /* VPMOVSXWDZrrk */ |
| 135385 | VR512, VR512, VK16WM, VR256X, |
| 135386 | /* VPMOVSXWDZrrkz */ |
| 135387 | VR512, VK16WM, VR256X, |
| 135388 | /* VPMOVSXWDrm */ |
| 135389 | VR128, i64mem, |
| 135390 | /* VPMOVSXWDrr */ |
| 135391 | VR128, VR128, |
| 135392 | /* VPMOVSXWQYrm */ |
| 135393 | VR256, i64mem, |
| 135394 | /* VPMOVSXWQYrr */ |
| 135395 | VR256, VR128, |
| 135396 | /* VPMOVSXWQZ128rm */ |
| 135397 | VR128X, i32mem, |
| 135398 | /* VPMOVSXWQZ128rmk */ |
| 135399 | VR128X, VR128X, VK2WM, i32mem, |
| 135400 | /* VPMOVSXWQZ128rmkz */ |
| 135401 | VR128X, VK2WM, i32mem, |
| 135402 | /* VPMOVSXWQZ128rr */ |
| 135403 | VR128X, VR128X, |
| 135404 | /* VPMOVSXWQZ128rrk */ |
| 135405 | VR128X, VR128X, VK2WM, VR128X, |
| 135406 | /* VPMOVSXWQZ128rrkz */ |
| 135407 | VR128X, VK2WM, VR128X, |
| 135408 | /* VPMOVSXWQZ256rm */ |
| 135409 | VR256X, i64mem, |
| 135410 | /* VPMOVSXWQZ256rmk */ |
| 135411 | VR256X, VR256X, VK4WM, i64mem, |
| 135412 | /* VPMOVSXWQZ256rmkz */ |
| 135413 | VR256X, VK4WM, i64mem, |
| 135414 | /* VPMOVSXWQZ256rr */ |
| 135415 | VR256X, VR128X, |
| 135416 | /* VPMOVSXWQZ256rrk */ |
| 135417 | VR256X, VR256X, VK4WM, VR128X, |
| 135418 | /* VPMOVSXWQZ256rrkz */ |
| 135419 | VR256X, VK4WM, VR128X, |
| 135420 | /* VPMOVSXWQZrm */ |
| 135421 | VR512, i128mem, |
| 135422 | /* VPMOVSXWQZrmk */ |
| 135423 | VR512, VR512, VK8WM, i128mem, |
| 135424 | /* VPMOVSXWQZrmkz */ |
| 135425 | VR512, VK8WM, i128mem, |
| 135426 | /* VPMOVSXWQZrr */ |
| 135427 | VR512, VR128X, |
| 135428 | /* VPMOVSXWQZrrk */ |
| 135429 | VR512, VR512, VK8WM, VR128X, |
| 135430 | /* VPMOVSXWQZrrkz */ |
| 135431 | VR512, VK8WM, VR128X, |
| 135432 | /* VPMOVSXWQrm */ |
| 135433 | VR128, i32mem, |
| 135434 | /* VPMOVSXWQrr */ |
| 135435 | VR128, VR128, |
| 135436 | /* VPMOVUSDBZ128mr */ |
| 135437 | i32mem, VR128X, |
| 135438 | /* VPMOVUSDBZ128mrk */ |
| 135439 | i32mem, VK4WM, VR128X, |
| 135440 | /* VPMOVUSDBZ128rr */ |
| 135441 | VR128X, VR128X, |
| 135442 | /* VPMOVUSDBZ128rrk */ |
| 135443 | VR128X, VR128X, VK4WM, VR128X, |
| 135444 | /* VPMOVUSDBZ128rrkz */ |
| 135445 | VR128X, VK4WM, VR128X, |
| 135446 | /* VPMOVUSDBZ256mr */ |
| 135447 | i64mem, VR256X, |
| 135448 | /* VPMOVUSDBZ256mrk */ |
| 135449 | i64mem, VK8WM, VR256X, |
| 135450 | /* VPMOVUSDBZ256rr */ |
| 135451 | VR128X, VR256X, |
| 135452 | /* VPMOVUSDBZ256rrk */ |
| 135453 | VR128X, VR128X, VK8WM, VR256X, |
| 135454 | /* VPMOVUSDBZ256rrkz */ |
| 135455 | VR128X, VK8WM, VR256X, |
| 135456 | /* VPMOVUSDBZmr */ |
| 135457 | i128mem, VR512, |
| 135458 | /* VPMOVUSDBZmrk */ |
| 135459 | i128mem, VK16WM, VR512, |
| 135460 | /* VPMOVUSDBZrr */ |
| 135461 | VR128X, VR512, |
| 135462 | /* VPMOVUSDBZrrk */ |
| 135463 | VR128X, VR128X, VK16WM, VR512, |
| 135464 | /* VPMOVUSDBZrrkz */ |
| 135465 | VR128X, VK16WM, VR512, |
| 135466 | /* VPMOVUSDWZ128mr */ |
| 135467 | i64mem, VR128X, |
| 135468 | /* VPMOVUSDWZ128mrk */ |
| 135469 | i64mem, VK4WM, VR128X, |
| 135470 | /* VPMOVUSDWZ128rr */ |
| 135471 | VR128X, VR128X, |
| 135472 | /* VPMOVUSDWZ128rrk */ |
| 135473 | VR128X, VR128X, VK4WM, VR128X, |
| 135474 | /* VPMOVUSDWZ128rrkz */ |
| 135475 | VR128X, VK4WM, VR128X, |
| 135476 | /* VPMOVUSDWZ256mr */ |
| 135477 | i128mem, VR256X, |
| 135478 | /* VPMOVUSDWZ256mrk */ |
| 135479 | i128mem, VK8WM, VR256X, |
| 135480 | /* VPMOVUSDWZ256rr */ |
| 135481 | VR128X, VR256X, |
| 135482 | /* VPMOVUSDWZ256rrk */ |
| 135483 | VR128X, VR128X, VK8WM, VR256X, |
| 135484 | /* VPMOVUSDWZ256rrkz */ |
| 135485 | VR128X, VK8WM, VR256X, |
| 135486 | /* VPMOVUSDWZmr */ |
| 135487 | i256mem, VR512, |
| 135488 | /* VPMOVUSDWZmrk */ |
| 135489 | i256mem, VK16WM, VR512, |
| 135490 | /* VPMOVUSDWZrr */ |
| 135491 | VR256X, VR512, |
| 135492 | /* VPMOVUSDWZrrk */ |
| 135493 | VR256X, VR256X, VK16WM, VR512, |
| 135494 | /* VPMOVUSDWZrrkz */ |
| 135495 | VR256X, VK16WM, VR512, |
| 135496 | /* VPMOVUSQBZ128mr */ |
| 135497 | i16mem, VR128X, |
| 135498 | /* VPMOVUSQBZ128mrk */ |
| 135499 | i16mem, VK2WM, VR128X, |
| 135500 | /* VPMOVUSQBZ128rr */ |
| 135501 | VR128X, VR128X, |
| 135502 | /* VPMOVUSQBZ128rrk */ |
| 135503 | VR128X, VR128X, VK2WM, VR128X, |
| 135504 | /* VPMOVUSQBZ128rrkz */ |
| 135505 | VR128X, VK2WM, VR128X, |
| 135506 | /* VPMOVUSQBZ256mr */ |
| 135507 | i32mem, VR256X, |
| 135508 | /* VPMOVUSQBZ256mrk */ |
| 135509 | i32mem, VK4WM, VR256X, |
| 135510 | /* VPMOVUSQBZ256rr */ |
| 135511 | VR128X, VR256X, |
| 135512 | /* VPMOVUSQBZ256rrk */ |
| 135513 | VR128X, VR128X, VK4WM, VR256X, |
| 135514 | /* VPMOVUSQBZ256rrkz */ |
| 135515 | VR128X, VK4WM, VR256X, |
| 135516 | /* VPMOVUSQBZmr */ |
| 135517 | i64mem, VR512, |
| 135518 | /* VPMOVUSQBZmrk */ |
| 135519 | i64mem, VK8WM, VR512, |
| 135520 | /* VPMOVUSQBZrr */ |
| 135521 | VR128X, VR512, |
| 135522 | /* VPMOVUSQBZrrk */ |
| 135523 | VR128X, VR128X, VK8WM, VR512, |
| 135524 | /* VPMOVUSQBZrrkz */ |
| 135525 | VR128X, VK8WM, VR512, |
| 135526 | /* VPMOVUSQDZ128mr */ |
| 135527 | i64mem, VR128X, |
| 135528 | /* VPMOVUSQDZ128mrk */ |
| 135529 | i64mem, VK2WM, VR128X, |
| 135530 | /* VPMOVUSQDZ128rr */ |
| 135531 | VR128X, VR128X, |
| 135532 | /* VPMOVUSQDZ128rrk */ |
| 135533 | VR128X, VR128X, VK2WM, VR128X, |
| 135534 | /* VPMOVUSQDZ128rrkz */ |
| 135535 | VR128X, VK2WM, VR128X, |
| 135536 | /* VPMOVUSQDZ256mr */ |
| 135537 | i128mem, VR256X, |
| 135538 | /* VPMOVUSQDZ256mrk */ |
| 135539 | i128mem, VK4WM, VR256X, |
| 135540 | /* VPMOVUSQDZ256rr */ |
| 135541 | VR128X, VR256X, |
| 135542 | /* VPMOVUSQDZ256rrk */ |
| 135543 | VR128X, VR128X, VK4WM, VR256X, |
| 135544 | /* VPMOVUSQDZ256rrkz */ |
| 135545 | VR128X, VK4WM, VR256X, |
| 135546 | /* VPMOVUSQDZmr */ |
| 135547 | i256mem, VR512, |
| 135548 | /* VPMOVUSQDZmrk */ |
| 135549 | i256mem, VK8WM, VR512, |
| 135550 | /* VPMOVUSQDZrr */ |
| 135551 | VR256X, VR512, |
| 135552 | /* VPMOVUSQDZrrk */ |
| 135553 | VR256X, VR256X, VK8WM, VR512, |
| 135554 | /* VPMOVUSQDZrrkz */ |
| 135555 | VR256X, VK8WM, VR512, |
| 135556 | /* VPMOVUSQWZ128mr */ |
| 135557 | i32mem, VR128X, |
| 135558 | /* VPMOVUSQWZ128mrk */ |
| 135559 | i32mem, VK2WM, VR128X, |
| 135560 | /* VPMOVUSQWZ128rr */ |
| 135561 | VR128X, VR128X, |
| 135562 | /* VPMOVUSQWZ128rrk */ |
| 135563 | VR128X, VR128X, VK2WM, VR128X, |
| 135564 | /* VPMOVUSQWZ128rrkz */ |
| 135565 | VR128X, VK2WM, VR128X, |
| 135566 | /* VPMOVUSQWZ256mr */ |
| 135567 | i64mem, VR256X, |
| 135568 | /* VPMOVUSQWZ256mrk */ |
| 135569 | i64mem, VK4WM, VR256X, |
| 135570 | /* VPMOVUSQWZ256rr */ |
| 135571 | VR128X, VR256X, |
| 135572 | /* VPMOVUSQWZ256rrk */ |
| 135573 | VR128X, VR128X, VK4WM, VR256X, |
| 135574 | /* VPMOVUSQWZ256rrkz */ |
| 135575 | VR128X, VK4WM, VR256X, |
| 135576 | /* VPMOVUSQWZmr */ |
| 135577 | i128mem, VR512, |
| 135578 | /* VPMOVUSQWZmrk */ |
| 135579 | i128mem, VK8WM, VR512, |
| 135580 | /* VPMOVUSQWZrr */ |
| 135581 | VR128X, VR512, |
| 135582 | /* VPMOVUSQWZrrk */ |
| 135583 | VR128X, VR128X, VK8WM, VR512, |
| 135584 | /* VPMOVUSQWZrrkz */ |
| 135585 | VR128X, VK8WM, VR512, |
| 135586 | /* VPMOVUSWBZ128mr */ |
| 135587 | i64mem, VR128X, |
| 135588 | /* VPMOVUSWBZ128mrk */ |
| 135589 | i64mem, VK8WM, VR128X, |
| 135590 | /* VPMOVUSWBZ128rr */ |
| 135591 | VR128X, VR128X, |
| 135592 | /* VPMOVUSWBZ128rrk */ |
| 135593 | VR128X, VR128X, VK8WM, VR128X, |
| 135594 | /* VPMOVUSWBZ128rrkz */ |
| 135595 | VR128X, VK8WM, VR128X, |
| 135596 | /* VPMOVUSWBZ256mr */ |
| 135597 | i128mem, VR256X, |
| 135598 | /* VPMOVUSWBZ256mrk */ |
| 135599 | i128mem, VK16WM, VR256X, |
| 135600 | /* VPMOVUSWBZ256rr */ |
| 135601 | VR128X, VR256X, |
| 135602 | /* VPMOVUSWBZ256rrk */ |
| 135603 | VR128X, VR128X, VK16WM, VR256X, |
| 135604 | /* VPMOVUSWBZ256rrkz */ |
| 135605 | VR128X, VK16WM, VR256X, |
| 135606 | /* VPMOVUSWBZmr */ |
| 135607 | i256mem, VR512, |
| 135608 | /* VPMOVUSWBZmrk */ |
| 135609 | i256mem, VK32WM, VR512, |
| 135610 | /* VPMOVUSWBZrr */ |
| 135611 | VR256X, VR512, |
| 135612 | /* VPMOVUSWBZrrk */ |
| 135613 | VR256X, VR256X, VK32WM, VR512, |
| 135614 | /* VPMOVUSWBZrrkz */ |
| 135615 | VR256X, VK32WM, VR512, |
| 135616 | /* VPMOVW2MZ128rr */ |
| 135617 | VK8, VR128X, |
| 135618 | /* VPMOVW2MZ256rr */ |
| 135619 | VK16, VR256X, |
| 135620 | /* VPMOVW2MZrr */ |
| 135621 | VK32, VR512, |
| 135622 | /* VPMOVWBZ128mr */ |
| 135623 | i64mem, VR128X, |
| 135624 | /* VPMOVWBZ128mrk */ |
| 135625 | i64mem, VK8WM, VR128X, |
| 135626 | /* VPMOVWBZ128rr */ |
| 135627 | VR128X, VR128X, |
| 135628 | /* VPMOVWBZ128rrk */ |
| 135629 | VR128X, VR128X, VK8WM, VR128X, |
| 135630 | /* VPMOVWBZ128rrkz */ |
| 135631 | VR128X, VK8WM, VR128X, |
| 135632 | /* VPMOVWBZ256mr */ |
| 135633 | i128mem, VR256X, |
| 135634 | /* VPMOVWBZ256mrk */ |
| 135635 | i128mem, VK16WM, VR256X, |
| 135636 | /* VPMOVWBZ256rr */ |
| 135637 | VR128X, VR256X, |
| 135638 | /* VPMOVWBZ256rrk */ |
| 135639 | VR128X, VR128X, VK16WM, VR256X, |
| 135640 | /* VPMOVWBZ256rrkz */ |
| 135641 | VR128X, VK16WM, VR256X, |
| 135642 | /* VPMOVWBZmr */ |
| 135643 | i256mem, VR512, |
| 135644 | /* VPMOVWBZmrk */ |
| 135645 | i256mem, VK32WM, VR512, |
| 135646 | /* VPMOVWBZrr */ |
| 135647 | VR256X, VR512, |
| 135648 | /* VPMOVWBZrrk */ |
| 135649 | VR256X, VR256X, VK32WM, VR512, |
| 135650 | /* VPMOVWBZrrkz */ |
| 135651 | VR256X, VK32WM, VR512, |
| 135652 | /* VPMOVZXBDYrm */ |
| 135653 | VR256, i64mem, |
| 135654 | /* VPMOVZXBDYrr */ |
| 135655 | VR256, VR128, |
| 135656 | /* VPMOVZXBDZ128rm */ |
| 135657 | VR128X, i32mem, |
| 135658 | /* VPMOVZXBDZ128rmk */ |
| 135659 | VR128X, VR128X, VK4WM, i32mem, |
| 135660 | /* VPMOVZXBDZ128rmkz */ |
| 135661 | VR128X, VK4WM, i32mem, |
| 135662 | /* VPMOVZXBDZ128rr */ |
| 135663 | VR128X, VR128X, |
| 135664 | /* VPMOVZXBDZ128rrk */ |
| 135665 | VR128X, VR128X, VK4WM, VR128X, |
| 135666 | /* VPMOVZXBDZ128rrkz */ |
| 135667 | VR128X, VK4WM, VR128X, |
| 135668 | /* VPMOVZXBDZ256rm */ |
| 135669 | VR256X, i64mem, |
| 135670 | /* VPMOVZXBDZ256rmk */ |
| 135671 | VR256X, VR256X, VK8WM, i64mem, |
| 135672 | /* VPMOVZXBDZ256rmkz */ |
| 135673 | VR256X, VK8WM, i64mem, |
| 135674 | /* VPMOVZXBDZ256rr */ |
| 135675 | VR256X, VR128X, |
| 135676 | /* VPMOVZXBDZ256rrk */ |
| 135677 | VR256X, VR256X, VK8WM, VR128X, |
| 135678 | /* VPMOVZXBDZ256rrkz */ |
| 135679 | VR256X, VK8WM, VR128X, |
| 135680 | /* VPMOVZXBDZrm */ |
| 135681 | VR512, i128mem, |
| 135682 | /* VPMOVZXBDZrmk */ |
| 135683 | VR512, VR512, VK16WM, i128mem, |
| 135684 | /* VPMOVZXBDZrmkz */ |
| 135685 | VR512, VK16WM, i128mem, |
| 135686 | /* VPMOVZXBDZrr */ |
| 135687 | VR512, VR128X, |
| 135688 | /* VPMOVZXBDZrrk */ |
| 135689 | VR512, VR512, VK16WM, VR128X, |
| 135690 | /* VPMOVZXBDZrrkz */ |
| 135691 | VR512, VK16WM, VR128X, |
| 135692 | /* VPMOVZXBDrm */ |
| 135693 | VR128, i32mem, |
| 135694 | /* VPMOVZXBDrr */ |
| 135695 | VR128, VR128, |
| 135696 | /* VPMOVZXBQYrm */ |
| 135697 | VR256, i32mem, |
| 135698 | /* VPMOVZXBQYrr */ |
| 135699 | VR256, VR128, |
| 135700 | /* VPMOVZXBQZ128rm */ |
| 135701 | VR128X, i16mem, |
| 135702 | /* VPMOVZXBQZ128rmk */ |
| 135703 | VR128X, VR128X, VK2WM, i16mem, |
| 135704 | /* VPMOVZXBQZ128rmkz */ |
| 135705 | VR128X, VK2WM, i16mem, |
| 135706 | /* VPMOVZXBQZ128rr */ |
| 135707 | VR128X, VR128X, |
| 135708 | /* VPMOVZXBQZ128rrk */ |
| 135709 | VR128X, VR128X, VK2WM, VR128X, |
| 135710 | /* VPMOVZXBQZ128rrkz */ |
| 135711 | VR128X, VK2WM, VR128X, |
| 135712 | /* VPMOVZXBQZ256rm */ |
| 135713 | VR256X, i32mem, |
| 135714 | /* VPMOVZXBQZ256rmk */ |
| 135715 | VR256X, VR256X, VK4WM, i32mem, |
| 135716 | /* VPMOVZXBQZ256rmkz */ |
| 135717 | VR256X, VK4WM, i32mem, |
| 135718 | /* VPMOVZXBQZ256rr */ |
| 135719 | VR256X, VR128X, |
| 135720 | /* VPMOVZXBQZ256rrk */ |
| 135721 | VR256X, VR256X, VK4WM, VR128X, |
| 135722 | /* VPMOVZXBQZ256rrkz */ |
| 135723 | VR256X, VK4WM, VR128X, |
| 135724 | /* VPMOVZXBQZrm */ |
| 135725 | VR512, i64mem, |
| 135726 | /* VPMOVZXBQZrmk */ |
| 135727 | VR512, VR512, VK8WM, i64mem, |
| 135728 | /* VPMOVZXBQZrmkz */ |
| 135729 | VR512, VK8WM, i64mem, |
| 135730 | /* VPMOVZXBQZrr */ |
| 135731 | VR512, VR128X, |
| 135732 | /* VPMOVZXBQZrrk */ |
| 135733 | VR512, VR512, VK8WM, VR128X, |
| 135734 | /* VPMOVZXBQZrrkz */ |
| 135735 | VR512, VK8WM, VR128X, |
| 135736 | /* VPMOVZXBQrm */ |
| 135737 | VR128, i16mem, |
| 135738 | /* VPMOVZXBQrr */ |
| 135739 | VR128, VR128, |
| 135740 | /* VPMOVZXBWYrm */ |
| 135741 | VR256, i128mem, |
| 135742 | /* VPMOVZXBWYrr */ |
| 135743 | VR256, VR128, |
| 135744 | /* VPMOVZXBWZ128rm */ |
| 135745 | VR128X, i64mem, |
| 135746 | /* VPMOVZXBWZ128rmk */ |
| 135747 | VR128X, VR128X, VK8WM, i64mem, |
| 135748 | /* VPMOVZXBWZ128rmkz */ |
| 135749 | VR128X, VK8WM, i64mem, |
| 135750 | /* VPMOVZXBWZ128rr */ |
| 135751 | VR128X, VR128X, |
| 135752 | /* VPMOVZXBWZ128rrk */ |
| 135753 | VR128X, VR128X, VK8WM, VR128X, |
| 135754 | /* VPMOVZXBWZ128rrkz */ |
| 135755 | VR128X, VK8WM, VR128X, |
| 135756 | /* VPMOVZXBWZ256rm */ |
| 135757 | VR256X, i128mem, |
| 135758 | /* VPMOVZXBWZ256rmk */ |
| 135759 | VR256X, VR256X, VK16WM, i128mem, |
| 135760 | /* VPMOVZXBWZ256rmkz */ |
| 135761 | VR256X, VK16WM, i128mem, |
| 135762 | /* VPMOVZXBWZ256rr */ |
| 135763 | VR256X, VR128X, |
| 135764 | /* VPMOVZXBWZ256rrk */ |
| 135765 | VR256X, VR256X, VK16WM, VR128X, |
| 135766 | /* VPMOVZXBWZ256rrkz */ |
| 135767 | VR256X, VK16WM, VR128X, |
| 135768 | /* VPMOVZXBWZrm */ |
| 135769 | VR512, i256mem, |
| 135770 | /* VPMOVZXBWZrmk */ |
| 135771 | VR512, VR512, VK32WM, i256mem, |
| 135772 | /* VPMOVZXBWZrmkz */ |
| 135773 | VR512, VK32WM, i256mem, |
| 135774 | /* VPMOVZXBWZrr */ |
| 135775 | VR512, VR256X, |
| 135776 | /* VPMOVZXBWZrrk */ |
| 135777 | VR512, VR512, VK32WM, VR256X, |
| 135778 | /* VPMOVZXBWZrrkz */ |
| 135779 | VR512, VK32WM, VR256X, |
| 135780 | /* VPMOVZXBWrm */ |
| 135781 | VR128, i64mem, |
| 135782 | /* VPMOVZXBWrr */ |
| 135783 | VR128, VR128, |
| 135784 | /* VPMOVZXDQYrm */ |
| 135785 | VR256, i128mem, |
| 135786 | /* VPMOVZXDQYrr */ |
| 135787 | VR256, VR128, |
| 135788 | /* VPMOVZXDQZ128rm */ |
| 135789 | VR128X, i64mem, |
| 135790 | /* VPMOVZXDQZ128rmk */ |
| 135791 | VR128X, VR128X, VK2WM, i64mem, |
| 135792 | /* VPMOVZXDQZ128rmkz */ |
| 135793 | VR128X, VK2WM, i64mem, |
| 135794 | /* VPMOVZXDQZ128rr */ |
| 135795 | VR128X, VR128X, |
| 135796 | /* VPMOVZXDQZ128rrk */ |
| 135797 | VR128X, VR128X, VK2WM, VR128X, |
| 135798 | /* VPMOVZXDQZ128rrkz */ |
| 135799 | VR128X, VK2WM, VR128X, |
| 135800 | /* VPMOVZXDQZ256rm */ |
| 135801 | VR256X, i128mem, |
| 135802 | /* VPMOVZXDQZ256rmk */ |
| 135803 | VR256X, VR256X, VK4WM, i128mem, |
| 135804 | /* VPMOVZXDQZ256rmkz */ |
| 135805 | VR256X, VK4WM, i128mem, |
| 135806 | /* VPMOVZXDQZ256rr */ |
| 135807 | VR256X, VR128X, |
| 135808 | /* VPMOVZXDQZ256rrk */ |
| 135809 | VR256X, VR256X, VK4WM, VR128X, |
| 135810 | /* VPMOVZXDQZ256rrkz */ |
| 135811 | VR256X, VK4WM, VR128X, |
| 135812 | /* VPMOVZXDQZrm */ |
| 135813 | VR512, i256mem, |
| 135814 | /* VPMOVZXDQZrmk */ |
| 135815 | VR512, VR512, VK8WM, i256mem, |
| 135816 | /* VPMOVZXDQZrmkz */ |
| 135817 | VR512, VK8WM, i256mem, |
| 135818 | /* VPMOVZXDQZrr */ |
| 135819 | VR512, VR256X, |
| 135820 | /* VPMOVZXDQZrrk */ |
| 135821 | VR512, VR512, VK8WM, VR256X, |
| 135822 | /* VPMOVZXDQZrrkz */ |
| 135823 | VR512, VK8WM, VR256X, |
| 135824 | /* VPMOVZXDQrm */ |
| 135825 | VR128, i64mem, |
| 135826 | /* VPMOVZXDQrr */ |
| 135827 | VR128, VR128, |
| 135828 | /* VPMOVZXWDYrm */ |
| 135829 | VR256, i128mem, |
| 135830 | /* VPMOVZXWDYrr */ |
| 135831 | VR256, VR128, |
| 135832 | /* VPMOVZXWDZ128rm */ |
| 135833 | VR128X, i64mem, |
| 135834 | /* VPMOVZXWDZ128rmk */ |
| 135835 | VR128X, VR128X, VK4WM, i64mem, |
| 135836 | /* VPMOVZXWDZ128rmkz */ |
| 135837 | VR128X, VK4WM, i64mem, |
| 135838 | /* VPMOVZXWDZ128rr */ |
| 135839 | VR128X, VR128X, |
| 135840 | /* VPMOVZXWDZ128rrk */ |
| 135841 | VR128X, VR128X, VK4WM, VR128X, |
| 135842 | /* VPMOVZXWDZ128rrkz */ |
| 135843 | VR128X, VK4WM, VR128X, |
| 135844 | /* VPMOVZXWDZ256rm */ |
| 135845 | VR256X, i128mem, |
| 135846 | /* VPMOVZXWDZ256rmk */ |
| 135847 | VR256X, VR256X, VK8WM, i128mem, |
| 135848 | /* VPMOVZXWDZ256rmkz */ |
| 135849 | VR256X, VK8WM, i128mem, |
| 135850 | /* VPMOVZXWDZ256rr */ |
| 135851 | VR256X, VR128X, |
| 135852 | /* VPMOVZXWDZ256rrk */ |
| 135853 | VR256X, VR256X, VK8WM, VR128X, |
| 135854 | /* VPMOVZXWDZ256rrkz */ |
| 135855 | VR256X, VK8WM, VR128X, |
| 135856 | /* VPMOVZXWDZrm */ |
| 135857 | VR512, i256mem, |
| 135858 | /* VPMOVZXWDZrmk */ |
| 135859 | VR512, VR512, VK16WM, i256mem, |
| 135860 | /* VPMOVZXWDZrmkz */ |
| 135861 | VR512, VK16WM, i256mem, |
| 135862 | /* VPMOVZXWDZrr */ |
| 135863 | VR512, VR256X, |
| 135864 | /* VPMOVZXWDZrrk */ |
| 135865 | VR512, VR512, VK16WM, VR256X, |
| 135866 | /* VPMOVZXWDZrrkz */ |
| 135867 | VR512, VK16WM, VR256X, |
| 135868 | /* VPMOVZXWDrm */ |
| 135869 | VR128, i64mem, |
| 135870 | /* VPMOVZXWDrr */ |
| 135871 | VR128, VR128, |
| 135872 | /* VPMOVZXWQYrm */ |
| 135873 | VR256, i64mem, |
| 135874 | /* VPMOVZXWQYrr */ |
| 135875 | VR256, VR128, |
| 135876 | /* VPMOVZXWQZ128rm */ |
| 135877 | VR128X, i32mem, |
| 135878 | /* VPMOVZXWQZ128rmk */ |
| 135879 | VR128X, VR128X, VK2WM, i32mem, |
| 135880 | /* VPMOVZXWQZ128rmkz */ |
| 135881 | VR128X, VK2WM, i32mem, |
| 135882 | /* VPMOVZXWQZ128rr */ |
| 135883 | VR128X, VR128X, |
| 135884 | /* VPMOVZXWQZ128rrk */ |
| 135885 | VR128X, VR128X, VK2WM, VR128X, |
| 135886 | /* VPMOVZXWQZ128rrkz */ |
| 135887 | VR128X, VK2WM, VR128X, |
| 135888 | /* VPMOVZXWQZ256rm */ |
| 135889 | VR256X, i64mem, |
| 135890 | /* VPMOVZXWQZ256rmk */ |
| 135891 | VR256X, VR256X, VK4WM, i64mem, |
| 135892 | /* VPMOVZXWQZ256rmkz */ |
| 135893 | VR256X, VK4WM, i64mem, |
| 135894 | /* VPMOVZXWQZ256rr */ |
| 135895 | VR256X, VR128X, |
| 135896 | /* VPMOVZXWQZ256rrk */ |
| 135897 | VR256X, VR256X, VK4WM, VR128X, |
| 135898 | /* VPMOVZXWQZ256rrkz */ |
| 135899 | VR256X, VK4WM, VR128X, |
| 135900 | /* VPMOVZXWQZrm */ |
| 135901 | VR512, i128mem, |
| 135902 | /* VPMOVZXWQZrmk */ |
| 135903 | VR512, VR512, VK8WM, i128mem, |
| 135904 | /* VPMOVZXWQZrmkz */ |
| 135905 | VR512, VK8WM, i128mem, |
| 135906 | /* VPMOVZXWQZrr */ |
| 135907 | VR512, VR128X, |
| 135908 | /* VPMOVZXWQZrrk */ |
| 135909 | VR512, VR512, VK8WM, VR128X, |
| 135910 | /* VPMOVZXWQZrrkz */ |
| 135911 | VR512, VK8WM, VR128X, |
| 135912 | /* VPMOVZXWQrm */ |
| 135913 | VR128, i32mem, |
| 135914 | /* VPMOVZXWQrr */ |
| 135915 | VR128, VR128, |
| 135916 | /* VPMULDQYrm */ |
| 135917 | VR256, VR256, i256mem, |
| 135918 | /* VPMULDQYrr */ |
| 135919 | VR256, VR256, VR256, |
| 135920 | /* VPMULDQZ128rm */ |
| 135921 | VR128X, VR128X, i128mem, |
| 135922 | /* VPMULDQZ128rmb */ |
| 135923 | VR128X, VR128X, i64mem, |
| 135924 | /* VPMULDQZ128rmbk */ |
| 135925 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 135926 | /* VPMULDQZ128rmbkz */ |
| 135927 | VR128X, VK2WM, VR128X, i64mem, |
| 135928 | /* VPMULDQZ128rmk */ |
| 135929 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 135930 | /* VPMULDQZ128rmkz */ |
| 135931 | VR128X, VK2WM, VR128X, i128mem, |
| 135932 | /* VPMULDQZ128rr */ |
| 135933 | VR128X, VR128X, VR128X, |
| 135934 | /* VPMULDQZ128rrk */ |
| 135935 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 135936 | /* VPMULDQZ128rrkz */ |
| 135937 | VR128X, VK2WM, VR128X, VR128X, |
| 135938 | /* VPMULDQZ256rm */ |
| 135939 | VR256X, VR256X, i256mem, |
| 135940 | /* VPMULDQZ256rmb */ |
| 135941 | VR256X, VR256X, i64mem, |
| 135942 | /* VPMULDQZ256rmbk */ |
| 135943 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 135944 | /* VPMULDQZ256rmbkz */ |
| 135945 | VR256X, VK4WM, VR256X, i64mem, |
| 135946 | /* VPMULDQZ256rmk */ |
| 135947 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 135948 | /* VPMULDQZ256rmkz */ |
| 135949 | VR256X, VK4WM, VR256X, i256mem, |
| 135950 | /* VPMULDQZ256rr */ |
| 135951 | VR256X, VR256X, VR256X, |
| 135952 | /* VPMULDQZ256rrk */ |
| 135953 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 135954 | /* VPMULDQZ256rrkz */ |
| 135955 | VR256X, VK4WM, VR256X, VR256X, |
| 135956 | /* VPMULDQZrm */ |
| 135957 | VR512, VR512, i512mem, |
| 135958 | /* VPMULDQZrmb */ |
| 135959 | VR512, VR512, i64mem, |
| 135960 | /* VPMULDQZrmbk */ |
| 135961 | VR512, VR512, VK8WM, VR512, i64mem, |
| 135962 | /* VPMULDQZrmbkz */ |
| 135963 | VR512, VK8WM, VR512, i64mem, |
| 135964 | /* VPMULDQZrmk */ |
| 135965 | VR512, VR512, VK8WM, VR512, i512mem, |
| 135966 | /* VPMULDQZrmkz */ |
| 135967 | VR512, VK8WM, VR512, i512mem, |
| 135968 | /* VPMULDQZrr */ |
| 135969 | VR512, VR512, VR512, |
| 135970 | /* VPMULDQZrrk */ |
| 135971 | VR512, VR512, VK8WM, VR512, VR512, |
| 135972 | /* VPMULDQZrrkz */ |
| 135973 | VR512, VK8WM, VR512, VR512, |
| 135974 | /* VPMULDQrm */ |
| 135975 | VR128, VR128, i128mem, |
| 135976 | /* VPMULDQrr */ |
| 135977 | VR128, VR128, VR128, |
| 135978 | /* VPMULHRSWYrm */ |
| 135979 | VR256, VR256, i256mem, |
| 135980 | /* VPMULHRSWYrr */ |
| 135981 | VR256, VR256, VR256, |
| 135982 | /* VPMULHRSWZ128rm */ |
| 135983 | VR128X, VR128X, i128mem, |
| 135984 | /* VPMULHRSWZ128rmk */ |
| 135985 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 135986 | /* VPMULHRSWZ128rmkz */ |
| 135987 | VR128X, VK8WM, VR128X, i128mem, |
| 135988 | /* VPMULHRSWZ128rr */ |
| 135989 | VR128X, VR128X, VR128X, |
| 135990 | /* VPMULHRSWZ128rrk */ |
| 135991 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 135992 | /* VPMULHRSWZ128rrkz */ |
| 135993 | VR128X, VK8WM, VR128X, VR128X, |
| 135994 | /* VPMULHRSWZ256rm */ |
| 135995 | VR256X, VR256X, i256mem, |
| 135996 | /* VPMULHRSWZ256rmk */ |
| 135997 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 135998 | /* VPMULHRSWZ256rmkz */ |
| 135999 | VR256X, VK16WM, VR256X, i256mem, |
| 136000 | /* VPMULHRSWZ256rr */ |
| 136001 | VR256X, VR256X, VR256X, |
| 136002 | /* VPMULHRSWZ256rrk */ |
| 136003 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 136004 | /* VPMULHRSWZ256rrkz */ |
| 136005 | VR256X, VK16WM, VR256X, VR256X, |
| 136006 | /* VPMULHRSWZrm */ |
| 136007 | VR512, VR512, i512mem, |
| 136008 | /* VPMULHRSWZrmk */ |
| 136009 | VR512, VR512, VK32WM, VR512, i512mem, |
| 136010 | /* VPMULHRSWZrmkz */ |
| 136011 | VR512, VK32WM, VR512, i512mem, |
| 136012 | /* VPMULHRSWZrr */ |
| 136013 | VR512, VR512, VR512, |
| 136014 | /* VPMULHRSWZrrk */ |
| 136015 | VR512, VR512, VK32WM, VR512, VR512, |
| 136016 | /* VPMULHRSWZrrkz */ |
| 136017 | VR512, VK32WM, VR512, VR512, |
| 136018 | /* VPMULHRSWrm */ |
| 136019 | VR128, VR128, i128mem, |
| 136020 | /* VPMULHRSWrr */ |
| 136021 | VR128, VR128, VR128, |
| 136022 | /* VPMULHUWYrm */ |
| 136023 | VR256, VR256, i256mem, |
| 136024 | /* VPMULHUWYrr */ |
| 136025 | VR256, VR256, VR256, |
| 136026 | /* VPMULHUWZ128rm */ |
| 136027 | VR128X, VR128X, i128mem, |
| 136028 | /* VPMULHUWZ128rmk */ |
| 136029 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 136030 | /* VPMULHUWZ128rmkz */ |
| 136031 | VR128X, VK8WM, VR128X, i128mem, |
| 136032 | /* VPMULHUWZ128rr */ |
| 136033 | VR128X, VR128X, VR128X, |
| 136034 | /* VPMULHUWZ128rrk */ |
| 136035 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 136036 | /* VPMULHUWZ128rrkz */ |
| 136037 | VR128X, VK8WM, VR128X, VR128X, |
| 136038 | /* VPMULHUWZ256rm */ |
| 136039 | VR256X, VR256X, i256mem, |
| 136040 | /* VPMULHUWZ256rmk */ |
| 136041 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 136042 | /* VPMULHUWZ256rmkz */ |
| 136043 | VR256X, VK16WM, VR256X, i256mem, |
| 136044 | /* VPMULHUWZ256rr */ |
| 136045 | VR256X, VR256X, VR256X, |
| 136046 | /* VPMULHUWZ256rrk */ |
| 136047 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 136048 | /* VPMULHUWZ256rrkz */ |
| 136049 | VR256X, VK16WM, VR256X, VR256X, |
| 136050 | /* VPMULHUWZrm */ |
| 136051 | VR512, VR512, i512mem, |
| 136052 | /* VPMULHUWZrmk */ |
| 136053 | VR512, VR512, VK32WM, VR512, i512mem, |
| 136054 | /* VPMULHUWZrmkz */ |
| 136055 | VR512, VK32WM, VR512, i512mem, |
| 136056 | /* VPMULHUWZrr */ |
| 136057 | VR512, VR512, VR512, |
| 136058 | /* VPMULHUWZrrk */ |
| 136059 | VR512, VR512, VK32WM, VR512, VR512, |
| 136060 | /* VPMULHUWZrrkz */ |
| 136061 | VR512, VK32WM, VR512, VR512, |
| 136062 | /* VPMULHUWrm */ |
| 136063 | VR128, VR128, i128mem, |
| 136064 | /* VPMULHUWrr */ |
| 136065 | VR128, VR128, VR128, |
| 136066 | /* VPMULHWYrm */ |
| 136067 | VR256, VR256, i256mem, |
| 136068 | /* VPMULHWYrr */ |
| 136069 | VR256, VR256, VR256, |
| 136070 | /* VPMULHWZ128rm */ |
| 136071 | VR128X, VR128X, i128mem, |
| 136072 | /* VPMULHWZ128rmk */ |
| 136073 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 136074 | /* VPMULHWZ128rmkz */ |
| 136075 | VR128X, VK8WM, VR128X, i128mem, |
| 136076 | /* VPMULHWZ128rr */ |
| 136077 | VR128X, VR128X, VR128X, |
| 136078 | /* VPMULHWZ128rrk */ |
| 136079 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 136080 | /* VPMULHWZ128rrkz */ |
| 136081 | VR128X, VK8WM, VR128X, VR128X, |
| 136082 | /* VPMULHWZ256rm */ |
| 136083 | VR256X, VR256X, i256mem, |
| 136084 | /* VPMULHWZ256rmk */ |
| 136085 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 136086 | /* VPMULHWZ256rmkz */ |
| 136087 | VR256X, VK16WM, VR256X, i256mem, |
| 136088 | /* VPMULHWZ256rr */ |
| 136089 | VR256X, VR256X, VR256X, |
| 136090 | /* VPMULHWZ256rrk */ |
| 136091 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 136092 | /* VPMULHWZ256rrkz */ |
| 136093 | VR256X, VK16WM, VR256X, VR256X, |
| 136094 | /* VPMULHWZrm */ |
| 136095 | VR512, VR512, i512mem, |
| 136096 | /* VPMULHWZrmk */ |
| 136097 | VR512, VR512, VK32WM, VR512, i512mem, |
| 136098 | /* VPMULHWZrmkz */ |
| 136099 | VR512, VK32WM, VR512, i512mem, |
| 136100 | /* VPMULHWZrr */ |
| 136101 | VR512, VR512, VR512, |
| 136102 | /* VPMULHWZrrk */ |
| 136103 | VR512, VR512, VK32WM, VR512, VR512, |
| 136104 | /* VPMULHWZrrkz */ |
| 136105 | VR512, VK32WM, VR512, VR512, |
| 136106 | /* VPMULHWrm */ |
| 136107 | VR128, VR128, i128mem, |
| 136108 | /* VPMULHWrr */ |
| 136109 | VR128, VR128, VR128, |
| 136110 | /* VPMULLDYrm */ |
| 136111 | VR256, VR256, i256mem, |
| 136112 | /* VPMULLDYrr */ |
| 136113 | VR256, VR256, VR256, |
| 136114 | /* VPMULLDZ128rm */ |
| 136115 | VR128X, VR128X, i128mem, |
| 136116 | /* VPMULLDZ128rmb */ |
| 136117 | VR128X, VR128X, i32mem, |
| 136118 | /* VPMULLDZ128rmbk */ |
| 136119 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 136120 | /* VPMULLDZ128rmbkz */ |
| 136121 | VR128X, VK4WM, VR128X, i32mem, |
| 136122 | /* VPMULLDZ128rmk */ |
| 136123 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 136124 | /* VPMULLDZ128rmkz */ |
| 136125 | VR128X, VK4WM, VR128X, i128mem, |
| 136126 | /* VPMULLDZ128rr */ |
| 136127 | VR128X, VR128X, VR128X, |
| 136128 | /* VPMULLDZ128rrk */ |
| 136129 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 136130 | /* VPMULLDZ128rrkz */ |
| 136131 | VR128X, VK4WM, VR128X, VR128X, |
| 136132 | /* VPMULLDZ256rm */ |
| 136133 | VR256X, VR256X, i256mem, |
| 136134 | /* VPMULLDZ256rmb */ |
| 136135 | VR256X, VR256X, i32mem, |
| 136136 | /* VPMULLDZ256rmbk */ |
| 136137 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 136138 | /* VPMULLDZ256rmbkz */ |
| 136139 | VR256X, VK8WM, VR256X, i32mem, |
| 136140 | /* VPMULLDZ256rmk */ |
| 136141 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 136142 | /* VPMULLDZ256rmkz */ |
| 136143 | VR256X, VK8WM, VR256X, i256mem, |
| 136144 | /* VPMULLDZ256rr */ |
| 136145 | VR256X, VR256X, VR256X, |
| 136146 | /* VPMULLDZ256rrk */ |
| 136147 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 136148 | /* VPMULLDZ256rrkz */ |
| 136149 | VR256X, VK8WM, VR256X, VR256X, |
| 136150 | /* VPMULLDZrm */ |
| 136151 | VR512, VR512, i512mem, |
| 136152 | /* VPMULLDZrmb */ |
| 136153 | VR512, VR512, i32mem, |
| 136154 | /* VPMULLDZrmbk */ |
| 136155 | VR512, VR512, VK16WM, VR512, i32mem, |
| 136156 | /* VPMULLDZrmbkz */ |
| 136157 | VR512, VK16WM, VR512, i32mem, |
| 136158 | /* VPMULLDZrmk */ |
| 136159 | VR512, VR512, VK16WM, VR512, i512mem, |
| 136160 | /* VPMULLDZrmkz */ |
| 136161 | VR512, VK16WM, VR512, i512mem, |
| 136162 | /* VPMULLDZrr */ |
| 136163 | VR512, VR512, VR512, |
| 136164 | /* VPMULLDZrrk */ |
| 136165 | VR512, VR512, VK16WM, VR512, VR512, |
| 136166 | /* VPMULLDZrrkz */ |
| 136167 | VR512, VK16WM, VR512, VR512, |
| 136168 | /* VPMULLDrm */ |
| 136169 | VR128, VR128, i128mem, |
| 136170 | /* VPMULLDrr */ |
| 136171 | VR128, VR128, VR128, |
| 136172 | /* VPMULLQZ128rm */ |
| 136173 | VR128X, VR128X, i128mem, |
| 136174 | /* VPMULLQZ128rmb */ |
| 136175 | VR128X, VR128X, i64mem, |
| 136176 | /* VPMULLQZ128rmbk */ |
| 136177 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 136178 | /* VPMULLQZ128rmbkz */ |
| 136179 | VR128X, VK2WM, VR128X, i64mem, |
| 136180 | /* VPMULLQZ128rmk */ |
| 136181 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 136182 | /* VPMULLQZ128rmkz */ |
| 136183 | VR128X, VK2WM, VR128X, i128mem, |
| 136184 | /* VPMULLQZ128rr */ |
| 136185 | VR128X, VR128X, VR128X, |
| 136186 | /* VPMULLQZ128rrk */ |
| 136187 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 136188 | /* VPMULLQZ128rrkz */ |
| 136189 | VR128X, VK2WM, VR128X, VR128X, |
| 136190 | /* VPMULLQZ256rm */ |
| 136191 | VR256X, VR256X, i256mem, |
| 136192 | /* VPMULLQZ256rmb */ |
| 136193 | VR256X, VR256X, i64mem, |
| 136194 | /* VPMULLQZ256rmbk */ |
| 136195 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 136196 | /* VPMULLQZ256rmbkz */ |
| 136197 | VR256X, VK4WM, VR256X, i64mem, |
| 136198 | /* VPMULLQZ256rmk */ |
| 136199 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 136200 | /* VPMULLQZ256rmkz */ |
| 136201 | VR256X, VK4WM, VR256X, i256mem, |
| 136202 | /* VPMULLQZ256rr */ |
| 136203 | VR256X, VR256X, VR256X, |
| 136204 | /* VPMULLQZ256rrk */ |
| 136205 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 136206 | /* VPMULLQZ256rrkz */ |
| 136207 | VR256X, VK4WM, VR256X, VR256X, |
| 136208 | /* VPMULLQZrm */ |
| 136209 | VR512, VR512, i512mem, |
| 136210 | /* VPMULLQZrmb */ |
| 136211 | VR512, VR512, i64mem, |
| 136212 | /* VPMULLQZrmbk */ |
| 136213 | VR512, VR512, VK8WM, VR512, i64mem, |
| 136214 | /* VPMULLQZrmbkz */ |
| 136215 | VR512, VK8WM, VR512, i64mem, |
| 136216 | /* VPMULLQZrmk */ |
| 136217 | VR512, VR512, VK8WM, VR512, i512mem, |
| 136218 | /* VPMULLQZrmkz */ |
| 136219 | VR512, VK8WM, VR512, i512mem, |
| 136220 | /* VPMULLQZrr */ |
| 136221 | VR512, VR512, VR512, |
| 136222 | /* VPMULLQZrrk */ |
| 136223 | VR512, VR512, VK8WM, VR512, VR512, |
| 136224 | /* VPMULLQZrrkz */ |
| 136225 | VR512, VK8WM, VR512, VR512, |
| 136226 | /* VPMULLWYrm */ |
| 136227 | VR256, VR256, i256mem, |
| 136228 | /* VPMULLWYrr */ |
| 136229 | VR256, VR256, VR256, |
| 136230 | /* VPMULLWZ128rm */ |
| 136231 | VR128X, VR128X, i128mem, |
| 136232 | /* VPMULLWZ128rmk */ |
| 136233 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 136234 | /* VPMULLWZ128rmkz */ |
| 136235 | VR128X, VK8WM, VR128X, i128mem, |
| 136236 | /* VPMULLWZ128rr */ |
| 136237 | VR128X, VR128X, VR128X, |
| 136238 | /* VPMULLWZ128rrk */ |
| 136239 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 136240 | /* VPMULLWZ128rrkz */ |
| 136241 | VR128X, VK8WM, VR128X, VR128X, |
| 136242 | /* VPMULLWZ256rm */ |
| 136243 | VR256X, VR256X, i256mem, |
| 136244 | /* VPMULLWZ256rmk */ |
| 136245 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 136246 | /* VPMULLWZ256rmkz */ |
| 136247 | VR256X, VK16WM, VR256X, i256mem, |
| 136248 | /* VPMULLWZ256rr */ |
| 136249 | VR256X, VR256X, VR256X, |
| 136250 | /* VPMULLWZ256rrk */ |
| 136251 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 136252 | /* VPMULLWZ256rrkz */ |
| 136253 | VR256X, VK16WM, VR256X, VR256X, |
| 136254 | /* VPMULLWZrm */ |
| 136255 | VR512, VR512, i512mem, |
| 136256 | /* VPMULLWZrmk */ |
| 136257 | VR512, VR512, VK32WM, VR512, i512mem, |
| 136258 | /* VPMULLWZrmkz */ |
| 136259 | VR512, VK32WM, VR512, i512mem, |
| 136260 | /* VPMULLWZrr */ |
| 136261 | VR512, VR512, VR512, |
| 136262 | /* VPMULLWZrrk */ |
| 136263 | VR512, VR512, VK32WM, VR512, VR512, |
| 136264 | /* VPMULLWZrrkz */ |
| 136265 | VR512, VK32WM, VR512, VR512, |
| 136266 | /* VPMULLWrm */ |
| 136267 | VR128, VR128, i128mem, |
| 136268 | /* VPMULLWrr */ |
| 136269 | VR128, VR128, VR128, |
| 136270 | /* VPMULTISHIFTQBZ128rm */ |
| 136271 | VR128X, VR128X, i128mem, |
| 136272 | /* VPMULTISHIFTQBZ128rmb */ |
| 136273 | VR128X, VR128X, i64mem, |
| 136274 | /* VPMULTISHIFTQBZ128rmbk */ |
| 136275 | VR128X, VR128X, VK16WM, VR128X, i64mem, |
| 136276 | /* VPMULTISHIFTQBZ128rmbkz */ |
| 136277 | VR128X, VK16WM, VR128X, i64mem, |
| 136278 | /* VPMULTISHIFTQBZ128rmk */ |
| 136279 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 136280 | /* VPMULTISHIFTQBZ128rmkz */ |
| 136281 | VR128X, VK16WM, VR128X, i128mem, |
| 136282 | /* VPMULTISHIFTQBZ128rr */ |
| 136283 | VR128X, VR128X, VR128X, |
| 136284 | /* VPMULTISHIFTQBZ128rrk */ |
| 136285 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 136286 | /* VPMULTISHIFTQBZ128rrkz */ |
| 136287 | VR128X, VK16WM, VR128X, VR128X, |
| 136288 | /* VPMULTISHIFTQBZ256rm */ |
| 136289 | VR256X, VR256X, i256mem, |
| 136290 | /* VPMULTISHIFTQBZ256rmb */ |
| 136291 | VR256X, VR256X, i64mem, |
| 136292 | /* VPMULTISHIFTQBZ256rmbk */ |
| 136293 | VR256X, VR256X, VK32WM, VR256X, i64mem, |
| 136294 | /* VPMULTISHIFTQBZ256rmbkz */ |
| 136295 | VR256X, VK32WM, VR256X, i64mem, |
| 136296 | /* VPMULTISHIFTQBZ256rmk */ |
| 136297 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 136298 | /* VPMULTISHIFTQBZ256rmkz */ |
| 136299 | VR256X, VK32WM, VR256X, i256mem, |
| 136300 | /* VPMULTISHIFTQBZ256rr */ |
| 136301 | VR256X, VR256X, VR256X, |
| 136302 | /* VPMULTISHIFTQBZ256rrk */ |
| 136303 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 136304 | /* VPMULTISHIFTQBZ256rrkz */ |
| 136305 | VR256X, VK32WM, VR256X, VR256X, |
| 136306 | /* VPMULTISHIFTQBZrm */ |
| 136307 | VR512, VR512, i512mem, |
| 136308 | /* VPMULTISHIFTQBZrmb */ |
| 136309 | VR512, VR512, i64mem, |
| 136310 | /* VPMULTISHIFTQBZrmbk */ |
| 136311 | VR512, VR512, VK64WM, VR512, i64mem, |
| 136312 | /* VPMULTISHIFTQBZrmbkz */ |
| 136313 | VR512, VK64WM, VR512, i64mem, |
| 136314 | /* VPMULTISHIFTQBZrmk */ |
| 136315 | VR512, VR512, VK64WM, VR512, i512mem, |
| 136316 | /* VPMULTISHIFTQBZrmkz */ |
| 136317 | VR512, VK64WM, VR512, i512mem, |
| 136318 | /* VPMULTISHIFTQBZrr */ |
| 136319 | VR512, VR512, VR512, |
| 136320 | /* VPMULTISHIFTQBZrrk */ |
| 136321 | VR512, VR512, VK64WM, VR512, VR512, |
| 136322 | /* VPMULTISHIFTQBZrrkz */ |
| 136323 | VR512, VK64WM, VR512, VR512, |
| 136324 | /* VPMULUDQYrm */ |
| 136325 | VR256, VR256, i256mem, |
| 136326 | /* VPMULUDQYrr */ |
| 136327 | VR256, VR256, VR256, |
| 136328 | /* VPMULUDQZ128rm */ |
| 136329 | VR128X, VR128X, i128mem, |
| 136330 | /* VPMULUDQZ128rmb */ |
| 136331 | VR128X, VR128X, i64mem, |
| 136332 | /* VPMULUDQZ128rmbk */ |
| 136333 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 136334 | /* VPMULUDQZ128rmbkz */ |
| 136335 | VR128X, VK2WM, VR128X, i64mem, |
| 136336 | /* VPMULUDQZ128rmk */ |
| 136337 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 136338 | /* VPMULUDQZ128rmkz */ |
| 136339 | VR128X, VK2WM, VR128X, i128mem, |
| 136340 | /* VPMULUDQZ128rr */ |
| 136341 | VR128X, VR128X, VR128X, |
| 136342 | /* VPMULUDQZ128rrk */ |
| 136343 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 136344 | /* VPMULUDQZ128rrkz */ |
| 136345 | VR128X, VK2WM, VR128X, VR128X, |
| 136346 | /* VPMULUDQZ256rm */ |
| 136347 | VR256X, VR256X, i256mem, |
| 136348 | /* VPMULUDQZ256rmb */ |
| 136349 | VR256X, VR256X, i64mem, |
| 136350 | /* VPMULUDQZ256rmbk */ |
| 136351 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 136352 | /* VPMULUDQZ256rmbkz */ |
| 136353 | VR256X, VK4WM, VR256X, i64mem, |
| 136354 | /* VPMULUDQZ256rmk */ |
| 136355 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 136356 | /* VPMULUDQZ256rmkz */ |
| 136357 | VR256X, VK4WM, VR256X, i256mem, |
| 136358 | /* VPMULUDQZ256rr */ |
| 136359 | VR256X, VR256X, VR256X, |
| 136360 | /* VPMULUDQZ256rrk */ |
| 136361 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 136362 | /* VPMULUDQZ256rrkz */ |
| 136363 | VR256X, VK4WM, VR256X, VR256X, |
| 136364 | /* VPMULUDQZrm */ |
| 136365 | VR512, VR512, i512mem, |
| 136366 | /* VPMULUDQZrmb */ |
| 136367 | VR512, VR512, i64mem, |
| 136368 | /* VPMULUDQZrmbk */ |
| 136369 | VR512, VR512, VK8WM, VR512, i64mem, |
| 136370 | /* VPMULUDQZrmbkz */ |
| 136371 | VR512, VK8WM, VR512, i64mem, |
| 136372 | /* VPMULUDQZrmk */ |
| 136373 | VR512, VR512, VK8WM, VR512, i512mem, |
| 136374 | /* VPMULUDQZrmkz */ |
| 136375 | VR512, VK8WM, VR512, i512mem, |
| 136376 | /* VPMULUDQZrr */ |
| 136377 | VR512, VR512, VR512, |
| 136378 | /* VPMULUDQZrrk */ |
| 136379 | VR512, VR512, VK8WM, VR512, VR512, |
| 136380 | /* VPMULUDQZrrkz */ |
| 136381 | VR512, VK8WM, VR512, VR512, |
| 136382 | /* VPMULUDQrm */ |
| 136383 | VR128, VR128, i128mem, |
| 136384 | /* VPMULUDQrr */ |
| 136385 | VR128, VR128, VR128, |
| 136386 | /* VPOPCNTBZ128rm */ |
| 136387 | VR128X, i128mem, |
| 136388 | /* VPOPCNTBZ128rmk */ |
| 136389 | VR128X, VR128X, VK16WM, i128mem, |
| 136390 | /* VPOPCNTBZ128rmkz */ |
| 136391 | VR128X, VK16WM, i128mem, |
| 136392 | /* VPOPCNTBZ128rr */ |
| 136393 | VR128X, VR128X, |
| 136394 | /* VPOPCNTBZ128rrk */ |
| 136395 | VR128X, VR128X, VK16WM, VR128X, |
| 136396 | /* VPOPCNTBZ128rrkz */ |
| 136397 | VR128X, VK16WM, VR128X, |
| 136398 | /* VPOPCNTBZ256rm */ |
| 136399 | VR256X, i256mem, |
| 136400 | /* VPOPCNTBZ256rmk */ |
| 136401 | VR256X, VR256X, VK32WM, i256mem, |
| 136402 | /* VPOPCNTBZ256rmkz */ |
| 136403 | VR256X, VK32WM, i256mem, |
| 136404 | /* VPOPCNTBZ256rr */ |
| 136405 | VR256X, VR256X, |
| 136406 | /* VPOPCNTBZ256rrk */ |
| 136407 | VR256X, VR256X, VK32WM, VR256X, |
| 136408 | /* VPOPCNTBZ256rrkz */ |
| 136409 | VR256X, VK32WM, VR256X, |
| 136410 | /* VPOPCNTBZrm */ |
| 136411 | VR512, i512mem, |
| 136412 | /* VPOPCNTBZrmk */ |
| 136413 | VR512, VR512, VK64WM, i512mem, |
| 136414 | /* VPOPCNTBZrmkz */ |
| 136415 | VR512, VK64WM, i512mem, |
| 136416 | /* VPOPCNTBZrr */ |
| 136417 | VR512, VR512, |
| 136418 | /* VPOPCNTBZrrk */ |
| 136419 | VR512, VR512, VK64WM, VR512, |
| 136420 | /* VPOPCNTBZrrkz */ |
| 136421 | VR512, VK64WM, VR512, |
| 136422 | /* VPOPCNTDZ128rm */ |
| 136423 | VR128X, i128mem, |
| 136424 | /* VPOPCNTDZ128rmb */ |
| 136425 | VR128X, i32mem, |
| 136426 | /* VPOPCNTDZ128rmbk */ |
| 136427 | VR128X, VR128X, VK4WM, i32mem, |
| 136428 | /* VPOPCNTDZ128rmbkz */ |
| 136429 | VR128X, VK4WM, i32mem, |
| 136430 | /* VPOPCNTDZ128rmk */ |
| 136431 | VR128X, VR128X, VK4WM, i128mem, |
| 136432 | /* VPOPCNTDZ128rmkz */ |
| 136433 | VR128X, VK4WM, i128mem, |
| 136434 | /* VPOPCNTDZ128rr */ |
| 136435 | VR128X, VR128X, |
| 136436 | /* VPOPCNTDZ128rrk */ |
| 136437 | VR128X, VR128X, VK4WM, VR128X, |
| 136438 | /* VPOPCNTDZ128rrkz */ |
| 136439 | VR128X, VK4WM, VR128X, |
| 136440 | /* VPOPCNTDZ256rm */ |
| 136441 | VR256X, i256mem, |
| 136442 | /* VPOPCNTDZ256rmb */ |
| 136443 | VR256X, i32mem, |
| 136444 | /* VPOPCNTDZ256rmbk */ |
| 136445 | VR256X, VR256X, VK8WM, i32mem, |
| 136446 | /* VPOPCNTDZ256rmbkz */ |
| 136447 | VR256X, VK8WM, i32mem, |
| 136448 | /* VPOPCNTDZ256rmk */ |
| 136449 | VR256X, VR256X, VK8WM, i256mem, |
| 136450 | /* VPOPCNTDZ256rmkz */ |
| 136451 | VR256X, VK8WM, i256mem, |
| 136452 | /* VPOPCNTDZ256rr */ |
| 136453 | VR256X, VR256X, |
| 136454 | /* VPOPCNTDZ256rrk */ |
| 136455 | VR256X, VR256X, VK8WM, VR256X, |
| 136456 | /* VPOPCNTDZ256rrkz */ |
| 136457 | VR256X, VK8WM, VR256X, |
| 136458 | /* VPOPCNTDZrm */ |
| 136459 | VR512, i512mem, |
| 136460 | /* VPOPCNTDZrmb */ |
| 136461 | VR512, i32mem, |
| 136462 | /* VPOPCNTDZrmbk */ |
| 136463 | VR512, VR512, VK16WM, i32mem, |
| 136464 | /* VPOPCNTDZrmbkz */ |
| 136465 | VR512, VK16WM, i32mem, |
| 136466 | /* VPOPCNTDZrmk */ |
| 136467 | VR512, VR512, VK16WM, i512mem, |
| 136468 | /* VPOPCNTDZrmkz */ |
| 136469 | VR512, VK16WM, i512mem, |
| 136470 | /* VPOPCNTDZrr */ |
| 136471 | VR512, VR512, |
| 136472 | /* VPOPCNTDZrrk */ |
| 136473 | VR512, VR512, VK16WM, VR512, |
| 136474 | /* VPOPCNTDZrrkz */ |
| 136475 | VR512, VK16WM, VR512, |
| 136476 | /* VPOPCNTQZ128rm */ |
| 136477 | VR128X, i128mem, |
| 136478 | /* VPOPCNTQZ128rmb */ |
| 136479 | VR128X, i64mem, |
| 136480 | /* VPOPCNTQZ128rmbk */ |
| 136481 | VR128X, VR128X, VK2WM, i64mem, |
| 136482 | /* VPOPCNTQZ128rmbkz */ |
| 136483 | VR128X, VK2WM, i64mem, |
| 136484 | /* VPOPCNTQZ128rmk */ |
| 136485 | VR128X, VR128X, VK2WM, i128mem, |
| 136486 | /* VPOPCNTQZ128rmkz */ |
| 136487 | VR128X, VK2WM, i128mem, |
| 136488 | /* VPOPCNTQZ128rr */ |
| 136489 | VR128X, VR128X, |
| 136490 | /* VPOPCNTQZ128rrk */ |
| 136491 | VR128X, VR128X, VK2WM, VR128X, |
| 136492 | /* VPOPCNTQZ128rrkz */ |
| 136493 | VR128X, VK2WM, VR128X, |
| 136494 | /* VPOPCNTQZ256rm */ |
| 136495 | VR256X, i256mem, |
| 136496 | /* VPOPCNTQZ256rmb */ |
| 136497 | VR256X, i64mem, |
| 136498 | /* VPOPCNTQZ256rmbk */ |
| 136499 | VR256X, VR256X, VK4WM, i64mem, |
| 136500 | /* VPOPCNTQZ256rmbkz */ |
| 136501 | VR256X, VK4WM, i64mem, |
| 136502 | /* VPOPCNTQZ256rmk */ |
| 136503 | VR256X, VR256X, VK4WM, i256mem, |
| 136504 | /* VPOPCNTQZ256rmkz */ |
| 136505 | VR256X, VK4WM, i256mem, |
| 136506 | /* VPOPCNTQZ256rr */ |
| 136507 | VR256X, VR256X, |
| 136508 | /* VPOPCNTQZ256rrk */ |
| 136509 | VR256X, VR256X, VK4WM, VR256X, |
| 136510 | /* VPOPCNTQZ256rrkz */ |
| 136511 | VR256X, VK4WM, VR256X, |
| 136512 | /* VPOPCNTQZrm */ |
| 136513 | VR512, i512mem, |
| 136514 | /* VPOPCNTQZrmb */ |
| 136515 | VR512, i64mem, |
| 136516 | /* VPOPCNTQZrmbk */ |
| 136517 | VR512, VR512, VK8WM, i64mem, |
| 136518 | /* VPOPCNTQZrmbkz */ |
| 136519 | VR512, VK8WM, i64mem, |
| 136520 | /* VPOPCNTQZrmk */ |
| 136521 | VR512, VR512, VK8WM, i512mem, |
| 136522 | /* VPOPCNTQZrmkz */ |
| 136523 | VR512, VK8WM, i512mem, |
| 136524 | /* VPOPCNTQZrr */ |
| 136525 | VR512, VR512, |
| 136526 | /* VPOPCNTQZrrk */ |
| 136527 | VR512, VR512, VK8WM, VR512, |
| 136528 | /* VPOPCNTQZrrkz */ |
| 136529 | VR512, VK8WM, VR512, |
| 136530 | /* VPOPCNTWZ128rm */ |
| 136531 | VR128X, i128mem, |
| 136532 | /* VPOPCNTWZ128rmk */ |
| 136533 | VR128X, VR128X, VK8WM, i128mem, |
| 136534 | /* VPOPCNTWZ128rmkz */ |
| 136535 | VR128X, VK8WM, i128mem, |
| 136536 | /* VPOPCNTWZ128rr */ |
| 136537 | VR128X, VR128X, |
| 136538 | /* VPOPCNTWZ128rrk */ |
| 136539 | VR128X, VR128X, VK8WM, VR128X, |
| 136540 | /* VPOPCNTWZ128rrkz */ |
| 136541 | VR128X, VK8WM, VR128X, |
| 136542 | /* VPOPCNTWZ256rm */ |
| 136543 | VR256X, i256mem, |
| 136544 | /* VPOPCNTWZ256rmk */ |
| 136545 | VR256X, VR256X, VK16WM, i256mem, |
| 136546 | /* VPOPCNTWZ256rmkz */ |
| 136547 | VR256X, VK16WM, i256mem, |
| 136548 | /* VPOPCNTWZ256rr */ |
| 136549 | VR256X, VR256X, |
| 136550 | /* VPOPCNTWZ256rrk */ |
| 136551 | VR256X, VR256X, VK16WM, VR256X, |
| 136552 | /* VPOPCNTWZ256rrkz */ |
| 136553 | VR256X, VK16WM, VR256X, |
| 136554 | /* VPOPCNTWZrm */ |
| 136555 | VR512, i512mem, |
| 136556 | /* VPOPCNTWZrmk */ |
| 136557 | VR512, VR512, VK32WM, i512mem, |
| 136558 | /* VPOPCNTWZrmkz */ |
| 136559 | VR512, VK32WM, i512mem, |
| 136560 | /* VPOPCNTWZrr */ |
| 136561 | VR512, VR512, |
| 136562 | /* VPOPCNTWZrrk */ |
| 136563 | VR512, VR512, VK32WM, VR512, |
| 136564 | /* VPOPCNTWZrrkz */ |
| 136565 | VR512, VK32WM, VR512, |
| 136566 | /* VPORDZ128rm */ |
| 136567 | VR128X, VR128X, i128mem, |
| 136568 | /* VPORDZ128rmb */ |
| 136569 | VR128X, VR128X, i32mem, |
| 136570 | /* VPORDZ128rmbk */ |
| 136571 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 136572 | /* VPORDZ128rmbkz */ |
| 136573 | VR128X, VK4WM, VR128X, i32mem, |
| 136574 | /* VPORDZ128rmk */ |
| 136575 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 136576 | /* VPORDZ128rmkz */ |
| 136577 | VR128X, VK4WM, VR128X, i128mem, |
| 136578 | /* VPORDZ128rr */ |
| 136579 | VR128X, VR128X, VR128X, |
| 136580 | /* VPORDZ128rrk */ |
| 136581 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 136582 | /* VPORDZ128rrkz */ |
| 136583 | VR128X, VK4WM, VR128X, VR128X, |
| 136584 | /* VPORDZ256rm */ |
| 136585 | VR256X, VR256X, i256mem, |
| 136586 | /* VPORDZ256rmb */ |
| 136587 | VR256X, VR256X, i32mem, |
| 136588 | /* VPORDZ256rmbk */ |
| 136589 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 136590 | /* VPORDZ256rmbkz */ |
| 136591 | VR256X, VK8WM, VR256X, i32mem, |
| 136592 | /* VPORDZ256rmk */ |
| 136593 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 136594 | /* VPORDZ256rmkz */ |
| 136595 | VR256X, VK8WM, VR256X, i256mem, |
| 136596 | /* VPORDZ256rr */ |
| 136597 | VR256X, VR256X, VR256X, |
| 136598 | /* VPORDZ256rrk */ |
| 136599 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 136600 | /* VPORDZ256rrkz */ |
| 136601 | VR256X, VK8WM, VR256X, VR256X, |
| 136602 | /* VPORDZrm */ |
| 136603 | VR512, VR512, i512mem, |
| 136604 | /* VPORDZrmb */ |
| 136605 | VR512, VR512, i32mem, |
| 136606 | /* VPORDZrmbk */ |
| 136607 | VR512, VR512, VK16WM, VR512, i32mem, |
| 136608 | /* VPORDZrmbkz */ |
| 136609 | VR512, VK16WM, VR512, i32mem, |
| 136610 | /* VPORDZrmk */ |
| 136611 | VR512, VR512, VK16WM, VR512, i512mem, |
| 136612 | /* VPORDZrmkz */ |
| 136613 | VR512, VK16WM, VR512, i512mem, |
| 136614 | /* VPORDZrr */ |
| 136615 | VR512, VR512, VR512, |
| 136616 | /* VPORDZrrk */ |
| 136617 | VR512, VR512, VK16WM, VR512, VR512, |
| 136618 | /* VPORDZrrkz */ |
| 136619 | VR512, VK16WM, VR512, VR512, |
| 136620 | /* VPORQZ128rm */ |
| 136621 | VR128X, VR128X, i128mem, |
| 136622 | /* VPORQZ128rmb */ |
| 136623 | VR128X, VR128X, i64mem, |
| 136624 | /* VPORQZ128rmbk */ |
| 136625 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 136626 | /* VPORQZ128rmbkz */ |
| 136627 | VR128X, VK2WM, VR128X, i64mem, |
| 136628 | /* VPORQZ128rmk */ |
| 136629 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 136630 | /* VPORQZ128rmkz */ |
| 136631 | VR128X, VK2WM, VR128X, i128mem, |
| 136632 | /* VPORQZ128rr */ |
| 136633 | VR128X, VR128X, VR128X, |
| 136634 | /* VPORQZ128rrk */ |
| 136635 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 136636 | /* VPORQZ128rrkz */ |
| 136637 | VR128X, VK2WM, VR128X, VR128X, |
| 136638 | /* VPORQZ256rm */ |
| 136639 | VR256X, VR256X, i256mem, |
| 136640 | /* VPORQZ256rmb */ |
| 136641 | VR256X, VR256X, i64mem, |
| 136642 | /* VPORQZ256rmbk */ |
| 136643 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 136644 | /* VPORQZ256rmbkz */ |
| 136645 | VR256X, VK4WM, VR256X, i64mem, |
| 136646 | /* VPORQZ256rmk */ |
| 136647 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 136648 | /* VPORQZ256rmkz */ |
| 136649 | VR256X, VK4WM, VR256X, i256mem, |
| 136650 | /* VPORQZ256rr */ |
| 136651 | VR256X, VR256X, VR256X, |
| 136652 | /* VPORQZ256rrk */ |
| 136653 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 136654 | /* VPORQZ256rrkz */ |
| 136655 | VR256X, VK4WM, VR256X, VR256X, |
| 136656 | /* VPORQZrm */ |
| 136657 | VR512, VR512, i512mem, |
| 136658 | /* VPORQZrmb */ |
| 136659 | VR512, VR512, i64mem, |
| 136660 | /* VPORQZrmbk */ |
| 136661 | VR512, VR512, VK8WM, VR512, i64mem, |
| 136662 | /* VPORQZrmbkz */ |
| 136663 | VR512, VK8WM, VR512, i64mem, |
| 136664 | /* VPORQZrmk */ |
| 136665 | VR512, VR512, VK8WM, VR512, i512mem, |
| 136666 | /* VPORQZrmkz */ |
| 136667 | VR512, VK8WM, VR512, i512mem, |
| 136668 | /* VPORQZrr */ |
| 136669 | VR512, VR512, VR512, |
| 136670 | /* VPORQZrrk */ |
| 136671 | VR512, VR512, VK8WM, VR512, VR512, |
| 136672 | /* VPORQZrrkz */ |
| 136673 | VR512, VK8WM, VR512, VR512, |
| 136674 | /* VPORYrm */ |
| 136675 | VR256, VR256, i256mem, |
| 136676 | /* VPORYrr */ |
| 136677 | VR256, VR256, VR256, |
| 136678 | /* VPORrm */ |
| 136679 | VR128, VR128, i128mem, |
| 136680 | /* VPORrr */ |
| 136681 | VR128, VR128, VR128, |
| 136682 | /* VPPERMrmr */ |
| 136683 | VR128, VR128, i128mem, VR128, |
| 136684 | /* VPPERMrrm */ |
| 136685 | VR128, VR128, VR128, i128mem, |
| 136686 | /* VPPERMrrr */ |
| 136687 | VR128, VR128, VR128, VR128, |
| 136688 | /* VPPERMrrr_REV */ |
| 136689 | VR128, VR128, VR128, VR128, |
| 136690 | /* VPROLDZ128mbi */ |
| 136691 | VR128X, i32mem, u8imm, |
| 136692 | /* VPROLDZ128mbik */ |
| 136693 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 136694 | /* VPROLDZ128mbikz */ |
| 136695 | VR128X, VK4WM, i32mem, u8imm, |
| 136696 | /* VPROLDZ128mi */ |
| 136697 | VR128X, i128mem, u8imm, |
| 136698 | /* VPROLDZ128mik */ |
| 136699 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 136700 | /* VPROLDZ128mikz */ |
| 136701 | VR128X, VK4WM, i128mem, u8imm, |
| 136702 | /* VPROLDZ128ri */ |
| 136703 | VR128X, VR128X, u8imm, |
| 136704 | /* VPROLDZ128rik */ |
| 136705 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 136706 | /* VPROLDZ128rikz */ |
| 136707 | VR128X, VK4WM, VR128X, u8imm, |
| 136708 | /* VPROLDZ256mbi */ |
| 136709 | VR256X, i32mem, u8imm, |
| 136710 | /* VPROLDZ256mbik */ |
| 136711 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 136712 | /* VPROLDZ256mbikz */ |
| 136713 | VR256X, VK8WM, i32mem, u8imm, |
| 136714 | /* VPROLDZ256mi */ |
| 136715 | VR256X, i256mem, u8imm, |
| 136716 | /* VPROLDZ256mik */ |
| 136717 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 136718 | /* VPROLDZ256mikz */ |
| 136719 | VR256X, VK8WM, i256mem, u8imm, |
| 136720 | /* VPROLDZ256ri */ |
| 136721 | VR256X, VR256X, u8imm, |
| 136722 | /* VPROLDZ256rik */ |
| 136723 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 136724 | /* VPROLDZ256rikz */ |
| 136725 | VR256X, VK8WM, VR256X, u8imm, |
| 136726 | /* VPROLDZmbi */ |
| 136727 | VR512, i32mem, u8imm, |
| 136728 | /* VPROLDZmbik */ |
| 136729 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 136730 | /* VPROLDZmbikz */ |
| 136731 | VR512, VK16WM, i32mem, u8imm, |
| 136732 | /* VPROLDZmi */ |
| 136733 | VR512, i512mem, u8imm, |
| 136734 | /* VPROLDZmik */ |
| 136735 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 136736 | /* VPROLDZmikz */ |
| 136737 | VR512, VK16WM, i512mem, u8imm, |
| 136738 | /* VPROLDZri */ |
| 136739 | VR512, VR512, u8imm, |
| 136740 | /* VPROLDZrik */ |
| 136741 | VR512, VR512, VK16WM, VR512, u8imm, |
| 136742 | /* VPROLDZrikz */ |
| 136743 | VR512, VK16WM, VR512, u8imm, |
| 136744 | /* VPROLQZ128mbi */ |
| 136745 | VR128X, i64mem, u8imm, |
| 136746 | /* VPROLQZ128mbik */ |
| 136747 | VR128X, VR128X, VK2WM, i64mem, u8imm, |
| 136748 | /* VPROLQZ128mbikz */ |
| 136749 | VR128X, VK2WM, i64mem, u8imm, |
| 136750 | /* VPROLQZ128mi */ |
| 136751 | VR128X, i128mem, u8imm, |
| 136752 | /* VPROLQZ128mik */ |
| 136753 | VR128X, VR128X, VK2WM, i128mem, u8imm, |
| 136754 | /* VPROLQZ128mikz */ |
| 136755 | VR128X, VK2WM, i128mem, u8imm, |
| 136756 | /* VPROLQZ128ri */ |
| 136757 | VR128X, VR128X, u8imm, |
| 136758 | /* VPROLQZ128rik */ |
| 136759 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 136760 | /* VPROLQZ128rikz */ |
| 136761 | VR128X, VK2WM, VR128X, u8imm, |
| 136762 | /* VPROLQZ256mbi */ |
| 136763 | VR256X, i64mem, u8imm, |
| 136764 | /* VPROLQZ256mbik */ |
| 136765 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 136766 | /* VPROLQZ256mbikz */ |
| 136767 | VR256X, VK4WM, i64mem, u8imm, |
| 136768 | /* VPROLQZ256mi */ |
| 136769 | VR256X, i256mem, u8imm, |
| 136770 | /* VPROLQZ256mik */ |
| 136771 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 136772 | /* VPROLQZ256mikz */ |
| 136773 | VR256X, VK4WM, i256mem, u8imm, |
| 136774 | /* VPROLQZ256ri */ |
| 136775 | VR256X, VR256X, u8imm, |
| 136776 | /* VPROLQZ256rik */ |
| 136777 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 136778 | /* VPROLQZ256rikz */ |
| 136779 | VR256X, VK4WM, VR256X, u8imm, |
| 136780 | /* VPROLQZmbi */ |
| 136781 | VR512, i64mem, u8imm, |
| 136782 | /* VPROLQZmbik */ |
| 136783 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 136784 | /* VPROLQZmbikz */ |
| 136785 | VR512, VK8WM, i64mem, u8imm, |
| 136786 | /* VPROLQZmi */ |
| 136787 | VR512, i512mem, u8imm, |
| 136788 | /* VPROLQZmik */ |
| 136789 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 136790 | /* VPROLQZmikz */ |
| 136791 | VR512, VK8WM, i512mem, u8imm, |
| 136792 | /* VPROLQZri */ |
| 136793 | VR512, VR512, u8imm, |
| 136794 | /* VPROLQZrik */ |
| 136795 | VR512, VR512, VK8WM, VR512, u8imm, |
| 136796 | /* VPROLQZrikz */ |
| 136797 | VR512, VK8WM, VR512, u8imm, |
| 136798 | /* VPROLVDZ128rm */ |
| 136799 | VR128X, VR128X, i128mem, |
| 136800 | /* VPROLVDZ128rmb */ |
| 136801 | VR128X, VR128X, i32mem, |
| 136802 | /* VPROLVDZ128rmbk */ |
| 136803 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 136804 | /* VPROLVDZ128rmbkz */ |
| 136805 | VR128X, VK4WM, VR128X, i32mem, |
| 136806 | /* VPROLVDZ128rmk */ |
| 136807 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 136808 | /* VPROLVDZ128rmkz */ |
| 136809 | VR128X, VK4WM, VR128X, i128mem, |
| 136810 | /* VPROLVDZ128rr */ |
| 136811 | VR128X, VR128X, VR128X, |
| 136812 | /* VPROLVDZ128rrk */ |
| 136813 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 136814 | /* VPROLVDZ128rrkz */ |
| 136815 | VR128X, VK4WM, VR128X, VR128X, |
| 136816 | /* VPROLVDZ256rm */ |
| 136817 | VR256X, VR256X, i256mem, |
| 136818 | /* VPROLVDZ256rmb */ |
| 136819 | VR256X, VR256X, i32mem, |
| 136820 | /* VPROLVDZ256rmbk */ |
| 136821 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 136822 | /* VPROLVDZ256rmbkz */ |
| 136823 | VR256X, VK8WM, VR256X, i32mem, |
| 136824 | /* VPROLVDZ256rmk */ |
| 136825 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 136826 | /* VPROLVDZ256rmkz */ |
| 136827 | VR256X, VK8WM, VR256X, i256mem, |
| 136828 | /* VPROLVDZ256rr */ |
| 136829 | VR256X, VR256X, VR256X, |
| 136830 | /* VPROLVDZ256rrk */ |
| 136831 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 136832 | /* VPROLVDZ256rrkz */ |
| 136833 | VR256X, VK8WM, VR256X, VR256X, |
| 136834 | /* VPROLVDZrm */ |
| 136835 | VR512, VR512, i512mem, |
| 136836 | /* VPROLVDZrmb */ |
| 136837 | VR512, VR512, i32mem, |
| 136838 | /* VPROLVDZrmbk */ |
| 136839 | VR512, VR512, VK16WM, VR512, i32mem, |
| 136840 | /* VPROLVDZrmbkz */ |
| 136841 | VR512, VK16WM, VR512, i32mem, |
| 136842 | /* VPROLVDZrmk */ |
| 136843 | VR512, VR512, VK16WM, VR512, i512mem, |
| 136844 | /* VPROLVDZrmkz */ |
| 136845 | VR512, VK16WM, VR512, i512mem, |
| 136846 | /* VPROLVDZrr */ |
| 136847 | VR512, VR512, VR512, |
| 136848 | /* VPROLVDZrrk */ |
| 136849 | VR512, VR512, VK16WM, VR512, VR512, |
| 136850 | /* VPROLVDZrrkz */ |
| 136851 | VR512, VK16WM, VR512, VR512, |
| 136852 | /* VPROLVQZ128rm */ |
| 136853 | VR128X, VR128X, i128mem, |
| 136854 | /* VPROLVQZ128rmb */ |
| 136855 | VR128X, VR128X, i64mem, |
| 136856 | /* VPROLVQZ128rmbk */ |
| 136857 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 136858 | /* VPROLVQZ128rmbkz */ |
| 136859 | VR128X, VK2WM, VR128X, i64mem, |
| 136860 | /* VPROLVQZ128rmk */ |
| 136861 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 136862 | /* VPROLVQZ128rmkz */ |
| 136863 | VR128X, VK2WM, VR128X, i128mem, |
| 136864 | /* VPROLVQZ128rr */ |
| 136865 | VR128X, VR128X, VR128X, |
| 136866 | /* VPROLVQZ128rrk */ |
| 136867 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 136868 | /* VPROLVQZ128rrkz */ |
| 136869 | VR128X, VK2WM, VR128X, VR128X, |
| 136870 | /* VPROLVQZ256rm */ |
| 136871 | VR256X, VR256X, i256mem, |
| 136872 | /* VPROLVQZ256rmb */ |
| 136873 | VR256X, VR256X, i64mem, |
| 136874 | /* VPROLVQZ256rmbk */ |
| 136875 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 136876 | /* VPROLVQZ256rmbkz */ |
| 136877 | VR256X, VK4WM, VR256X, i64mem, |
| 136878 | /* VPROLVQZ256rmk */ |
| 136879 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 136880 | /* VPROLVQZ256rmkz */ |
| 136881 | VR256X, VK4WM, VR256X, i256mem, |
| 136882 | /* VPROLVQZ256rr */ |
| 136883 | VR256X, VR256X, VR256X, |
| 136884 | /* VPROLVQZ256rrk */ |
| 136885 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 136886 | /* VPROLVQZ256rrkz */ |
| 136887 | VR256X, VK4WM, VR256X, VR256X, |
| 136888 | /* VPROLVQZrm */ |
| 136889 | VR512, VR512, i512mem, |
| 136890 | /* VPROLVQZrmb */ |
| 136891 | VR512, VR512, i64mem, |
| 136892 | /* VPROLVQZrmbk */ |
| 136893 | VR512, VR512, VK8WM, VR512, i64mem, |
| 136894 | /* VPROLVQZrmbkz */ |
| 136895 | VR512, VK8WM, VR512, i64mem, |
| 136896 | /* VPROLVQZrmk */ |
| 136897 | VR512, VR512, VK8WM, VR512, i512mem, |
| 136898 | /* VPROLVQZrmkz */ |
| 136899 | VR512, VK8WM, VR512, i512mem, |
| 136900 | /* VPROLVQZrr */ |
| 136901 | VR512, VR512, VR512, |
| 136902 | /* VPROLVQZrrk */ |
| 136903 | VR512, VR512, VK8WM, VR512, VR512, |
| 136904 | /* VPROLVQZrrkz */ |
| 136905 | VR512, VK8WM, VR512, VR512, |
| 136906 | /* VPRORDZ128mbi */ |
| 136907 | VR128X, i32mem, u8imm, |
| 136908 | /* VPRORDZ128mbik */ |
| 136909 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 136910 | /* VPRORDZ128mbikz */ |
| 136911 | VR128X, VK4WM, i32mem, u8imm, |
| 136912 | /* VPRORDZ128mi */ |
| 136913 | VR128X, i128mem, u8imm, |
| 136914 | /* VPRORDZ128mik */ |
| 136915 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 136916 | /* VPRORDZ128mikz */ |
| 136917 | VR128X, VK4WM, i128mem, u8imm, |
| 136918 | /* VPRORDZ128ri */ |
| 136919 | VR128X, VR128X, u8imm, |
| 136920 | /* VPRORDZ128rik */ |
| 136921 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 136922 | /* VPRORDZ128rikz */ |
| 136923 | VR128X, VK4WM, VR128X, u8imm, |
| 136924 | /* VPRORDZ256mbi */ |
| 136925 | VR256X, i32mem, u8imm, |
| 136926 | /* VPRORDZ256mbik */ |
| 136927 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 136928 | /* VPRORDZ256mbikz */ |
| 136929 | VR256X, VK8WM, i32mem, u8imm, |
| 136930 | /* VPRORDZ256mi */ |
| 136931 | VR256X, i256mem, u8imm, |
| 136932 | /* VPRORDZ256mik */ |
| 136933 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 136934 | /* VPRORDZ256mikz */ |
| 136935 | VR256X, VK8WM, i256mem, u8imm, |
| 136936 | /* VPRORDZ256ri */ |
| 136937 | VR256X, VR256X, u8imm, |
| 136938 | /* VPRORDZ256rik */ |
| 136939 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 136940 | /* VPRORDZ256rikz */ |
| 136941 | VR256X, VK8WM, VR256X, u8imm, |
| 136942 | /* VPRORDZmbi */ |
| 136943 | VR512, i32mem, u8imm, |
| 136944 | /* VPRORDZmbik */ |
| 136945 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 136946 | /* VPRORDZmbikz */ |
| 136947 | VR512, VK16WM, i32mem, u8imm, |
| 136948 | /* VPRORDZmi */ |
| 136949 | VR512, i512mem, u8imm, |
| 136950 | /* VPRORDZmik */ |
| 136951 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 136952 | /* VPRORDZmikz */ |
| 136953 | VR512, VK16WM, i512mem, u8imm, |
| 136954 | /* VPRORDZri */ |
| 136955 | VR512, VR512, u8imm, |
| 136956 | /* VPRORDZrik */ |
| 136957 | VR512, VR512, VK16WM, VR512, u8imm, |
| 136958 | /* VPRORDZrikz */ |
| 136959 | VR512, VK16WM, VR512, u8imm, |
| 136960 | /* VPRORQZ128mbi */ |
| 136961 | VR128X, i64mem, u8imm, |
| 136962 | /* VPRORQZ128mbik */ |
| 136963 | VR128X, VR128X, VK2WM, i64mem, u8imm, |
| 136964 | /* VPRORQZ128mbikz */ |
| 136965 | VR128X, VK2WM, i64mem, u8imm, |
| 136966 | /* VPRORQZ128mi */ |
| 136967 | VR128X, i128mem, u8imm, |
| 136968 | /* VPRORQZ128mik */ |
| 136969 | VR128X, VR128X, VK2WM, i128mem, u8imm, |
| 136970 | /* VPRORQZ128mikz */ |
| 136971 | VR128X, VK2WM, i128mem, u8imm, |
| 136972 | /* VPRORQZ128ri */ |
| 136973 | VR128X, VR128X, u8imm, |
| 136974 | /* VPRORQZ128rik */ |
| 136975 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 136976 | /* VPRORQZ128rikz */ |
| 136977 | VR128X, VK2WM, VR128X, u8imm, |
| 136978 | /* VPRORQZ256mbi */ |
| 136979 | VR256X, i64mem, u8imm, |
| 136980 | /* VPRORQZ256mbik */ |
| 136981 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 136982 | /* VPRORQZ256mbikz */ |
| 136983 | VR256X, VK4WM, i64mem, u8imm, |
| 136984 | /* VPRORQZ256mi */ |
| 136985 | VR256X, i256mem, u8imm, |
| 136986 | /* VPRORQZ256mik */ |
| 136987 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 136988 | /* VPRORQZ256mikz */ |
| 136989 | VR256X, VK4WM, i256mem, u8imm, |
| 136990 | /* VPRORQZ256ri */ |
| 136991 | VR256X, VR256X, u8imm, |
| 136992 | /* VPRORQZ256rik */ |
| 136993 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 136994 | /* VPRORQZ256rikz */ |
| 136995 | VR256X, VK4WM, VR256X, u8imm, |
| 136996 | /* VPRORQZmbi */ |
| 136997 | VR512, i64mem, u8imm, |
| 136998 | /* VPRORQZmbik */ |
| 136999 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 137000 | /* VPRORQZmbikz */ |
| 137001 | VR512, VK8WM, i64mem, u8imm, |
| 137002 | /* VPRORQZmi */ |
| 137003 | VR512, i512mem, u8imm, |
| 137004 | /* VPRORQZmik */ |
| 137005 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 137006 | /* VPRORQZmikz */ |
| 137007 | VR512, VK8WM, i512mem, u8imm, |
| 137008 | /* VPRORQZri */ |
| 137009 | VR512, VR512, u8imm, |
| 137010 | /* VPRORQZrik */ |
| 137011 | VR512, VR512, VK8WM, VR512, u8imm, |
| 137012 | /* VPRORQZrikz */ |
| 137013 | VR512, VK8WM, VR512, u8imm, |
| 137014 | /* VPRORVDZ128rm */ |
| 137015 | VR128X, VR128X, i128mem, |
| 137016 | /* VPRORVDZ128rmb */ |
| 137017 | VR128X, VR128X, i32mem, |
| 137018 | /* VPRORVDZ128rmbk */ |
| 137019 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 137020 | /* VPRORVDZ128rmbkz */ |
| 137021 | VR128X, VK4WM, VR128X, i32mem, |
| 137022 | /* VPRORVDZ128rmk */ |
| 137023 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 137024 | /* VPRORVDZ128rmkz */ |
| 137025 | VR128X, VK4WM, VR128X, i128mem, |
| 137026 | /* VPRORVDZ128rr */ |
| 137027 | VR128X, VR128X, VR128X, |
| 137028 | /* VPRORVDZ128rrk */ |
| 137029 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 137030 | /* VPRORVDZ128rrkz */ |
| 137031 | VR128X, VK4WM, VR128X, VR128X, |
| 137032 | /* VPRORVDZ256rm */ |
| 137033 | VR256X, VR256X, i256mem, |
| 137034 | /* VPRORVDZ256rmb */ |
| 137035 | VR256X, VR256X, i32mem, |
| 137036 | /* VPRORVDZ256rmbk */ |
| 137037 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 137038 | /* VPRORVDZ256rmbkz */ |
| 137039 | VR256X, VK8WM, VR256X, i32mem, |
| 137040 | /* VPRORVDZ256rmk */ |
| 137041 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 137042 | /* VPRORVDZ256rmkz */ |
| 137043 | VR256X, VK8WM, VR256X, i256mem, |
| 137044 | /* VPRORVDZ256rr */ |
| 137045 | VR256X, VR256X, VR256X, |
| 137046 | /* VPRORVDZ256rrk */ |
| 137047 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 137048 | /* VPRORVDZ256rrkz */ |
| 137049 | VR256X, VK8WM, VR256X, VR256X, |
| 137050 | /* VPRORVDZrm */ |
| 137051 | VR512, VR512, i512mem, |
| 137052 | /* VPRORVDZrmb */ |
| 137053 | VR512, VR512, i32mem, |
| 137054 | /* VPRORVDZrmbk */ |
| 137055 | VR512, VR512, VK16WM, VR512, i32mem, |
| 137056 | /* VPRORVDZrmbkz */ |
| 137057 | VR512, VK16WM, VR512, i32mem, |
| 137058 | /* VPRORVDZrmk */ |
| 137059 | VR512, VR512, VK16WM, VR512, i512mem, |
| 137060 | /* VPRORVDZrmkz */ |
| 137061 | VR512, VK16WM, VR512, i512mem, |
| 137062 | /* VPRORVDZrr */ |
| 137063 | VR512, VR512, VR512, |
| 137064 | /* VPRORVDZrrk */ |
| 137065 | VR512, VR512, VK16WM, VR512, VR512, |
| 137066 | /* VPRORVDZrrkz */ |
| 137067 | VR512, VK16WM, VR512, VR512, |
| 137068 | /* VPRORVQZ128rm */ |
| 137069 | VR128X, VR128X, i128mem, |
| 137070 | /* VPRORVQZ128rmb */ |
| 137071 | VR128X, VR128X, i64mem, |
| 137072 | /* VPRORVQZ128rmbk */ |
| 137073 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 137074 | /* VPRORVQZ128rmbkz */ |
| 137075 | VR128X, VK2WM, VR128X, i64mem, |
| 137076 | /* VPRORVQZ128rmk */ |
| 137077 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 137078 | /* VPRORVQZ128rmkz */ |
| 137079 | VR128X, VK2WM, VR128X, i128mem, |
| 137080 | /* VPRORVQZ128rr */ |
| 137081 | VR128X, VR128X, VR128X, |
| 137082 | /* VPRORVQZ128rrk */ |
| 137083 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 137084 | /* VPRORVQZ128rrkz */ |
| 137085 | VR128X, VK2WM, VR128X, VR128X, |
| 137086 | /* VPRORVQZ256rm */ |
| 137087 | VR256X, VR256X, i256mem, |
| 137088 | /* VPRORVQZ256rmb */ |
| 137089 | VR256X, VR256X, i64mem, |
| 137090 | /* VPRORVQZ256rmbk */ |
| 137091 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 137092 | /* VPRORVQZ256rmbkz */ |
| 137093 | VR256X, VK4WM, VR256X, i64mem, |
| 137094 | /* VPRORVQZ256rmk */ |
| 137095 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 137096 | /* VPRORVQZ256rmkz */ |
| 137097 | VR256X, VK4WM, VR256X, i256mem, |
| 137098 | /* VPRORVQZ256rr */ |
| 137099 | VR256X, VR256X, VR256X, |
| 137100 | /* VPRORVQZ256rrk */ |
| 137101 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 137102 | /* VPRORVQZ256rrkz */ |
| 137103 | VR256X, VK4WM, VR256X, VR256X, |
| 137104 | /* VPRORVQZrm */ |
| 137105 | VR512, VR512, i512mem, |
| 137106 | /* VPRORVQZrmb */ |
| 137107 | VR512, VR512, i64mem, |
| 137108 | /* VPRORVQZrmbk */ |
| 137109 | VR512, VR512, VK8WM, VR512, i64mem, |
| 137110 | /* VPRORVQZrmbkz */ |
| 137111 | VR512, VK8WM, VR512, i64mem, |
| 137112 | /* VPRORVQZrmk */ |
| 137113 | VR512, VR512, VK8WM, VR512, i512mem, |
| 137114 | /* VPRORVQZrmkz */ |
| 137115 | VR512, VK8WM, VR512, i512mem, |
| 137116 | /* VPRORVQZrr */ |
| 137117 | VR512, VR512, VR512, |
| 137118 | /* VPRORVQZrrk */ |
| 137119 | VR512, VR512, VK8WM, VR512, VR512, |
| 137120 | /* VPRORVQZrrkz */ |
| 137121 | VR512, VK8WM, VR512, VR512, |
| 137122 | /* VPROTBmi */ |
| 137123 | VR128, i128mem, u8imm, |
| 137124 | /* VPROTBmr */ |
| 137125 | VR128, i128mem, VR128, |
| 137126 | /* VPROTBri */ |
| 137127 | VR128, VR128, u8imm, |
| 137128 | /* VPROTBrm */ |
| 137129 | VR128, VR128, i128mem, |
| 137130 | /* VPROTBrr */ |
| 137131 | VR128, VR128, VR128, |
| 137132 | /* VPROTBrr_REV */ |
| 137133 | VR128, VR128, VR128, |
| 137134 | /* VPROTDmi */ |
| 137135 | VR128, i128mem, u8imm, |
| 137136 | /* VPROTDmr */ |
| 137137 | VR128, i128mem, VR128, |
| 137138 | /* VPROTDri */ |
| 137139 | VR128, VR128, u8imm, |
| 137140 | /* VPROTDrm */ |
| 137141 | VR128, VR128, i128mem, |
| 137142 | /* VPROTDrr */ |
| 137143 | VR128, VR128, VR128, |
| 137144 | /* VPROTDrr_REV */ |
| 137145 | VR128, VR128, VR128, |
| 137146 | /* VPROTQmi */ |
| 137147 | VR128, i128mem, u8imm, |
| 137148 | /* VPROTQmr */ |
| 137149 | VR128, i128mem, VR128, |
| 137150 | /* VPROTQri */ |
| 137151 | VR128, VR128, u8imm, |
| 137152 | /* VPROTQrm */ |
| 137153 | VR128, VR128, i128mem, |
| 137154 | /* VPROTQrr */ |
| 137155 | VR128, VR128, VR128, |
| 137156 | /* VPROTQrr_REV */ |
| 137157 | VR128, VR128, VR128, |
| 137158 | /* VPROTWmi */ |
| 137159 | VR128, i128mem, u8imm, |
| 137160 | /* VPROTWmr */ |
| 137161 | VR128, i128mem, VR128, |
| 137162 | /* VPROTWri */ |
| 137163 | VR128, VR128, u8imm, |
| 137164 | /* VPROTWrm */ |
| 137165 | VR128, VR128, i128mem, |
| 137166 | /* VPROTWrr */ |
| 137167 | VR128, VR128, VR128, |
| 137168 | /* VPROTWrr_REV */ |
| 137169 | VR128, VR128, VR128, |
| 137170 | /* VPSADBWYrm */ |
| 137171 | VR256, VR256, i256mem, |
| 137172 | /* VPSADBWYrr */ |
| 137173 | VR256, VR256, VR256, |
| 137174 | /* VPSADBWZ128rm */ |
| 137175 | VR128X, VR128X, i128mem, |
| 137176 | /* VPSADBWZ128rr */ |
| 137177 | VR128X, VR128X, VR128X, |
| 137178 | /* VPSADBWZ256rm */ |
| 137179 | VR256X, VR256X, i256mem, |
| 137180 | /* VPSADBWZ256rr */ |
| 137181 | VR256X, VR256X, VR256X, |
| 137182 | /* VPSADBWZrm */ |
| 137183 | VR512, VR512, i512mem, |
| 137184 | /* VPSADBWZrr */ |
| 137185 | VR512, VR512, VR512, |
| 137186 | /* VPSADBWrm */ |
| 137187 | VR128, VR128, i128mem, |
| 137188 | /* VPSADBWrr */ |
| 137189 | VR128, VR128, VR128, |
| 137190 | /* VPSCATTERDDZ128mr */ |
| 137191 | VK4WM, vx128xmem, VK4WM, VR128X, |
| 137192 | /* VPSCATTERDDZ256mr */ |
| 137193 | VK8WM, vy256xmem, VK8WM, VR256X, |
| 137194 | /* VPSCATTERDDZmr */ |
| 137195 | VK16WM, vz512mem, VK16WM, VR512, |
| 137196 | /* VPSCATTERDQZ128mr */ |
| 137197 | VK2WM, vx128xmem, VK2WM, VR128X, |
| 137198 | /* VPSCATTERDQZ256mr */ |
| 137199 | VK4WM, vx256xmem, VK4WM, VR256X, |
| 137200 | /* VPSCATTERDQZmr */ |
| 137201 | VK8WM, vy512xmem, VK8WM, VR512, |
| 137202 | /* VPSCATTERQDZ128mr */ |
| 137203 | VK2WM, vx64xmem, VK2WM, VR128X, |
| 137204 | /* VPSCATTERQDZ256mr */ |
| 137205 | VK4WM, vy128xmem, VK4WM, VR128X, |
| 137206 | /* VPSCATTERQDZmr */ |
| 137207 | VK8WM, vz256mem, VK8WM, VR256X, |
| 137208 | /* VPSCATTERQQZ128mr */ |
| 137209 | VK2WM, vx128xmem, VK2WM, VR128X, |
| 137210 | /* VPSCATTERQQZ256mr */ |
| 137211 | VK4WM, vy256xmem, VK4WM, VR256X, |
| 137212 | /* VPSCATTERQQZmr */ |
| 137213 | VK8WM, vz512mem, VK8WM, VR512, |
| 137214 | /* VPSHABmr */ |
| 137215 | VR128, i128mem, VR128, |
| 137216 | /* VPSHABrm */ |
| 137217 | VR128, VR128, i128mem, |
| 137218 | /* VPSHABrr */ |
| 137219 | VR128, VR128, VR128, |
| 137220 | /* VPSHABrr_REV */ |
| 137221 | VR128, VR128, VR128, |
| 137222 | /* VPSHADmr */ |
| 137223 | VR128, i128mem, VR128, |
| 137224 | /* VPSHADrm */ |
| 137225 | VR128, VR128, i128mem, |
| 137226 | /* VPSHADrr */ |
| 137227 | VR128, VR128, VR128, |
| 137228 | /* VPSHADrr_REV */ |
| 137229 | VR128, VR128, VR128, |
| 137230 | /* VPSHAQmr */ |
| 137231 | VR128, i128mem, VR128, |
| 137232 | /* VPSHAQrm */ |
| 137233 | VR128, VR128, i128mem, |
| 137234 | /* VPSHAQrr */ |
| 137235 | VR128, VR128, VR128, |
| 137236 | /* VPSHAQrr_REV */ |
| 137237 | VR128, VR128, VR128, |
| 137238 | /* VPSHAWmr */ |
| 137239 | VR128, i128mem, VR128, |
| 137240 | /* VPSHAWrm */ |
| 137241 | VR128, VR128, i128mem, |
| 137242 | /* VPSHAWrr */ |
| 137243 | VR128, VR128, VR128, |
| 137244 | /* VPSHAWrr_REV */ |
| 137245 | VR128, VR128, VR128, |
| 137246 | /* VPSHLBmr */ |
| 137247 | VR128, i128mem, VR128, |
| 137248 | /* VPSHLBrm */ |
| 137249 | VR128, VR128, i128mem, |
| 137250 | /* VPSHLBrr */ |
| 137251 | VR128, VR128, VR128, |
| 137252 | /* VPSHLBrr_REV */ |
| 137253 | VR128, VR128, VR128, |
| 137254 | /* VPSHLDDZ128rmbi */ |
| 137255 | VR128X, VR128X, i32mem, u8imm, |
| 137256 | /* VPSHLDDZ128rmbik */ |
| 137257 | VR128X, VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 137258 | /* VPSHLDDZ128rmbikz */ |
| 137259 | VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 137260 | /* VPSHLDDZ128rmi */ |
| 137261 | VR128X, VR128X, i128mem, u8imm, |
| 137262 | /* VPSHLDDZ128rmik */ |
| 137263 | VR128X, VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 137264 | /* VPSHLDDZ128rmikz */ |
| 137265 | VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 137266 | /* VPSHLDDZ128rri */ |
| 137267 | VR128X, VR128X, VR128X, u8imm, |
| 137268 | /* VPSHLDDZ128rrik */ |
| 137269 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 137270 | /* VPSHLDDZ128rrikz */ |
| 137271 | VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 137272 | /* VPSHLDDZ256rmbi */ |
| 137273 | VR256X, VR256X, i32mem, u8imm, |
| 137274 | /* VPSHLDDZ256rmbik */ |
| 137275 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 137276 | /* VPSHLDDZ256rmbikz */ |
| 137277 | VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 137278 | /* VPSHLDDZ256rmi */ |
| 137279 | VR256X, VR256X, i256mem, u8imm, |
| 137280 | /* VPSHLDDZ256rmik */ |
| 137281 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 137282 | /* VPSHLDDZ256rmikz */ |
| 137283 | VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 137284 | /* VPSHLDDZ256rri */ |
| 137285 | VR256X, VR256X, VR256X, u8imm, |
| 137286 | /* VPSHLDDZ256rrik */ |
| 137287 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 137288 | /* VPSHLDDZ256rrikz */ |
| 137289 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 137290 | /* VPSHLDDZrmbi */ |
| 137291 | VR512, VR512, i32mem, u8imm, |
| 137292 | /* VPSHLDDZrmbik */ |
| 137293 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 137294 | /* VPSHLDDZrmbikz */ |
| 137295 | VR512, VK16WM, VR512, i32mem, u8imm, |
| 137296 | /* VPSHLDDZrmi */ |
| 137297 | VR512, VR512, i512mem, u8imm, |
| 137298 | /* VPSHLDDZrmik */ |
| 137299 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 137300 | /* VPSHLDDZrmikz */ |
| 137301 | VR512, VK16WM, VR512, i512mem, u8imm, |
| 137302 | /* VPSHLDDZrri */ |
| 137303 | VR512, VR512, VR512, u8imm, |
| 137304 | /* VPSHLDDZrrik */ |
| 137305 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 137306 | /* VPSHLDDZrrikz */ |
| 137307 | VR512, VK16WM, VR512, VR512, u8imm, |
| 137308 | /* VPSHLDQZ128rmbi */ |
| 137309 | VR128X, VR128X, i64mem, u8imm, |
| 137310 | /* VPSHLDQZ128rmbik */ |
| 137311 | VR128X, VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 137312 | /* VPSHLDQZ128rmbikz */ |
| 137313 | VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 137314 | /* VPSHLDQZ128rmi */ |
| 137315 | VR128X, VR128X, i128mem, u8imm, |
| 137316 | /* VPSHLDQZ128rmik */ |
| 137317 | VR128X, VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 137318 | /* VPSHLDQZ128rmikz */ |
| 137319 | VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 137320 | /* VPSHLDQZ128rri */ |
| 137321 | VR128X, VR128X, VR128X, u8imm, |
| 137322 | /* VPSHLDQZ128rrik */ |
| 137323 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 137324 | /* VPSHLDQZ128rrikz */ |
| 137325 | VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 137326 | /* VPSHLDQZ256rmbi */ |
| 137327 | VR256X, VR256X, i64mem, u8imm, |
| 137328 | /* VPSHLDQZ256rmbik */ |
| 137329 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 137330 | /* VPSHLDQZ256rmbikz */ |
| 137331 | VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 137332 | /* VPSHLDQZ256rmi */ |
| 137333 | VR256X, VR256X, i256mem, u8imm, |
| 137334 | /* VPSHLDQZ256rmik */ |
| 137335 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 137336 | /* VPSHLDQZ256rmikz */ |
| 137337 | VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 137338 | /* VPSHLDQZ256rri */ |
| 137339 | VR256X, VR256X, VR256X, u8imm, |
| 137340 | /* VPSHLDQZ256rrik */ |
| 137341 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 137342 | /* VPSHLDQZ256rrikz */ |
| 137343 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 137344 | /* VPSHLDQZrmbi */ |
| 137345 | VR512, VR512, i64mem, u8imm, |
| 137346 | /* VPSHLDQZrmbik */ |
| 137347 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 137348 | /* VPSHLDQZrmbikz */ |
| 137349 | VR512, VK8WM, VR512, i64mem, u8imm, |
| 137350 | /* VPSHLDQZrmi */ |
| 137351 | VR512, VR512, i512mem, u8imm, |
| 137352 | /* VPSHLDQZrmik */ |
| 137353 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 137354 | /* VPSHLDQZrmikz */ |
| 137355 | VR512, VK8WM, VR512, i512mem, u8imm, |
| 137356 | /* VPSHLDQZrri */ |
| 137357 | VR512, VR512, VR512, u8imm, |
| 137358 | /* VPSHLDQZrrik */ |
| 137359 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 137360 | /* VPSHLDQZrrikz */ |
| 137361 | VR512, VK8WM, VR512, VR512, u8imm, |
| 137362 | /* VPSHLDVDZ128m */ |
| 137363 | VR128X, VR128X, VR128X, i128mem, |
| 137364 | /* VPSHLDVDZ128mb */ |
| 137365 | VR128X, VR128X, VR128X, i32mem, |
| 137366 | /* VPSHLDVDZ128mbk */ |
| 137367 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 137368 | /* VPSHLDVDZ128mbkz */ |
| 137369 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 137370 | /* VPSHLDVDZ128mk */ |
| 137371 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 137372 | /* VPSHLDVDZ128mkz */ |
| 137373 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 137374 | /* VPSHLDVDZ128r */ |
| 137375 | VR128X, VR128X, VR128X, VR128X, |
| 137376 | /* VPSHLDVDZ128rk */ |
| 137377 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 137378 | /* VPSHLDVDZ128rkz */ |
| 137379 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 137380 | /* VPSHLDVDZ256m */ |
| 137381 | VR256X, VR256X, VR256X, i256mem, |
| 137382 | /* VPSHLDVDZ256mb */ |
| 137383 | VR256X, VR256X, VR256X, i32mem, |
| 137384 | /* VPSHLDVDZ256mbk */ |
| 137385 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 137386 | /* VPSHLDVDZ256mbkz */ |
| 137387 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 137388 | /* VPSHLDVDZ256mk */ |
| 137389 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 137390 | /* VPSHLDVDZ256mkz */ |
| 137391 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 137392 | /* VPSHLDVDZ256r */ |
| 137393 | VR256X, VR256X, VR256X, VR256X, |
| 137394 | /* VPSHLDVDZ256rk */ |
| 137395 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 137396 | /* VPSHLDVDZ256rkz */ |
| 137397 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 137398 | /* VPSHLDVDZm */ |
| 137399 | VR512, VR512, VR512, i512mem, |
| 137400 | /* VPSHLDVDZmb */ |
| 137401 | VR512, VR512, VR512, i32mem, |
| 137402 | /* VPSHLDVDZmbk */ |
| 137403 | VR512, VR512, VK16WM, VR512, i32mem, |
| 137404 | /* VPSHLDVDZmbkz */ |
| 137405 | VR512, VR512, VK16WM, VR512, i32mem, |
| 137406 | /* VPSHLDVDZmk */ |
| 137407 | VR512, VR512, VK16WM, VR512, i512mem, |
| 137408 | /* VPSHLDVDZmkz */ |
| 137409 | VR512, VR512, VK16WM, VR512, i512mem, |
| 137410 | /* VPSHLDVDZr */ |
| 137411 | VR512, VR512, VR512, VR512, |
| 137412 | /* VPSHLDVDZrk */ |
| 137413 | VR512, VR512, VK16WM, VR512, VR512, |
| 137414 | /* VPSHLDVDZrkz */ |
| 137415 | VR512, VR512, VK16WM, VR512, VR512, |
| 137416 | /* VPSHLDVQZ128m */ |
| 137417 | VR128X, VR128X, VR128X, i128mem, |
| 137418 | /* VPSHLDVQZ128mb */ |
| 137419 | VR128X, VR128X, VR128X, i64mem, |
| 137420 | /* VPSHLDVQZ128mbk */ |
| 137421 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 137422 | /* VPSHLDVQZ128mbkz */ |
| 137423 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 137424 | /* VPSHLDVQZ128mk */ |
| 137425 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 137426 | /* VPSHLDVQZ128mkz */ |
| 137427 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 137428 | /* VPSHLDVQZ128r */ |
| 137429 | VR128X, VR128X, VR128X, VR128X, |
| 137430 | /* VPSHLDVQZ128rk */ |
| 137431 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 137432 | /* VPSHLDVQZ128rkz */ |
| 137433 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 137434 | /* VPSHLDVQZ256m */ |
| 137435 | VR256X, VR256X, VR256X, i256mem, |
| 137436 | /* VPSHLDVQZ256mb */ |
| 137437 | VR256X, VR256X, VR256X, i64mem, |
| 137438 | /* VPSHLDVQZ256mbk */ |
| 137439 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 137440 | /* VPSHLDVQZ256mbkz */ |
| 137441 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 137442 | /* VPSHLDVQZ256mk */ |
| 137443 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 137444 | /* VPSHLDVQZ256mkz */ |
| 137445 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 137446 | /* VPSHLDVQZ256r */ |
| 137447 | VR256X, VR256X, VR256X, VR256X, |
| 137448 | /* VPSHLDVQZ256rk */ |
| 137449 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 137450 | /* VPSHLDVQZ256rkz */ |
| 137451 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 137452 | /* VPSHLDVQZm */ |
| 137453 | VR512, VR512, VR512, i512mem, |
| 137454 | /* VPSHLDVQZmb */ |
| 137455 | VR512, VR512, VR512, i64mem, |
| 137456 | /* VPSHLDVQZmbk */ |
| 137457 | VR512, VR512, VK8WM, VR512, i64mem, |
| 137458 | /* VPSHLDVQZmbkz */ |
| 137459 | VR512, VR512, VK8WM, VR512, i64mem, |
| 137460 | /* VPSHLDVQZmk */ |
| 137461 | VR512, VR512, VK8WM, VR512, i512mem, |
| 137462 | /* VPSHLDVQZmkz */ |
| 137463 | VR512, VR512, VK8WM, VR512, i512mem, |
| 137464 | /* VPSHLDVQZr */ |
| 137465 | VR512, VR512, VR512, VR512, |
| 137466 | /* VPSHLDVQZrk */ |
| 137467 | VR512, VR512, VK8WM, VR512, VR512, |
| 137468 | /* VPSHLDVQZrkz */ |
| 137469 | VR512, VR512, VK8WM, VR512, VR512, |
| 137470 | /* VPSHLDVWZ128m */ |
| 137471 | VR128X, VR128X, VR128X, i128mem, |
| 137472 | /* VPSHLDVWZ128mk */ |
| 137473 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 137474 | /* VPSHLDVWZ128mkz */ |
| 137475 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 137476 | /* VPSHLDVWZ128r */ |
| 137477 | VR128X, VR128X, VR128X, VR128X, |
| 137478 | /* VPSHLDVWZ128rk */ |
| 137479 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 137480 | /* VPSHLDVWZ128rkz */ |
| 137481 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 137482 | /* VPSHLDVWZ256m */ |
| 137483 | VR256X, VR256X, VR256X, i256mem, |
| 137484 | /* VPSHLDVWZ256mk */ |
| 137485 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 137486 | /* VPSHLDVWZ256mkz */ |
| 137487 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 137488 | /* VPSHLDVWZ256r */ |
| 137489 | VR256X, VR256X, VR256X, VR256X, |
| 137490 | /* VPSHLDVWZ256rk */ |
| 137491 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 137492 | /* VPSHLDVWZ256rkz */ |
| 137493 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 137494 | /* VPSHLDVWZm */ |
| 137495 | VR512, VR512, VR512, i512mem, |
| 137496 | /* VPSHLDVWZmk */ |
| 137497 | VR512, VR512, VK32WM, VR512, i512mem, |
| 137498 | /* VPSHLDVWZmkz */ |
| 137499 | VR512, VR512, VK32WM, VR512, i512mem, |
| 137500 | /* VPSHLDVWZr */ |
| 137501 | VR512, VR512, VR512, VR512, |
| 137502 | /* VPSHLDVWZrk */ |
| 137503 | VR512, VR512, VK32WM, VR512, VR512, |
| 137504 | /* VPSHLDVWZrkz */ |
| 137505 | VR512, VR512, VK32WM, VR512, VR512, |
| 137506 | /* VPSHLDWZ128rmi */ |
| 137507 | VR128X, VR128X, i128mem, u8imm, |
| 137508 | /* VPSHLDWZ128rmik */ |
| 137509 | VR128X, VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 137510 | /* VPSHLDWZ128rmikz */ |
| 137511 | VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 137512 | /* VPSHLDWZ128rri */ |
| 137513 | VR128X, VR128X, VR128X, u8imm, |
| 137514 | /* VPSHLDWZ128rrik */ |
| 137515 | VR128X, VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 137516 | /* VPSHLDWZ128rrikz */ |
| 137517 | VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 137518 | /* VPSHLDWZ256rmi */ |
| 137519 | VR256X, VR256X, i256mem, u8imm, |
| 137520 | /* VPSHLDWZ256rmik */ |
| 137521 | VR256X, VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 137522 | /* VPSHLDWZ256rmikz */ |
| 137523 | VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 137524 | /* VPSHLDWZ256rri */ |
| 137525 | VR256X, VR256X, VR256X, u8imm, |
| 137526 | /* VPSHLDWZ256rrik */ |
| 137527 | VR256X, VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 137528 | /* VPSHLDWZ256rrikz */ |
| 137529 | VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 137530 | /* VPSHLDWZrmi */ |
| 137531 | VR512, VR512, i512mem, u8imm, |
| 137532 | /* VPSHLDWZrmik */ |
| 137533 | VR512, VR512, VK32WM, VR512, i512mem, u8imm, |
| 137534 | /* VPSHLDWZrmikz */ |
| 137535 | VR512, VK32WM, VR512, i512mem, u8imm, |
| 137536 | /* VPSHLDWZrri */ |
| 137537 | VR512, VR512, VR512, u8imm, |
| 137538 | /* VPSHLDWZrrik */ |
| 137539 | VR512, VR512, VK32WM, VR512, VR512, u8imm, |
| 137540 | /* VPSHLDWZrrikz */ |
| 137541 | VR512, VK32WM, VR512, VR512, u8imm, |
| 137542 | /* VPSHLDmr */ |
| 137543 | VR128, i128mem, VR128, |
| 137544 | /* VPSHLDrm */ |
| 137545 | VR128, VR128, i128mem, |
| 137546 | /* VPSHLDrr */ |
| 137547 | VR128, VR128, VR128, |
| 137548 | /* VPSHLDrr_REV */ |
| 137549 | VR128, VR128, VR128, |
| 137550 | /* VPSHLQmr */ |
| 137551 | VR128, i128mem, VR128, |
| 137552 | /* VPSHLQrm */ |
| 137553 | VR128, VR128, i128mem, |
| 137554 | /* VPSHLQrr */ |
| 137555 | VR128, VR128, VR128, |
| 137556 | /* VPSHLQrr_REV */ |
| 137557 | VR128, VR128, VR128, |
| 137558 | /* VPSHLWmr */ |
| 137559 | VR128, i128mem, VR128, |
| 137560 | /* VPSHLWrm */ |
| 137561 | VR128, VR128, i128mem, |
| 137562 | /* VPSHLWrr */ |
| 137563 | VR128, VR128, VR128, |
| 137564 | /* VPSHLWrr_REV */ |
| 137565 | VR128, VR128, VR128, |
| 137566 | /* VPSHRDDZ128rmbi */ |
| 137567 | VR128X, VR128X, i32mem, u8imm, |
| 137568 | /* VPSHRDDZ128rmbik */ |
| 137569 | VR128X, VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 137570 | /* VPSHRDDZ128rmbikz */ |
| 137571 | VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 137572 | /* VPSHRDDZ128rmi */ |
| 137573 | VR128X, VR128X, i128mem, u8imm, |
| 137574 | /* VPSHRDDZ128rmik */ |
| 137575 | VR128X, VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 137576 | /* VPSHRDDZ128rmikz */ |
| 137577 | VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 137578 | /* VPSHRDDZ128rri */ |
| 137579 | VR128X, VR128X, VR128X, u8imm, |
| 137580 | /* VPSHRDDZ128rrik */ |
| 137581 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 137582 | /* VPSHRDDZ128rrikz */ |
| 137583 | VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 137584 | /* VPSHRDDZ256rmbi */ |
| 137585 | VR256X, VR256X, i32mem, u8imm, |
| 137586 | /* VPSHRDDZ256rmbik */ |
| 137587 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 137588 | /* VPSHRDDZ256rmbikz */ |
| 137589 | VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 137590 | /* VPSHRDDZ256rmi */ |
| 137591 | VR256X, VR256X, i256mem, u8imm, |
| 137592 | /* VPSHRDDZ256rmik */ |
| 137593 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 137594 | /* VPSHRDDZ256rmikz */ |
| 137595 | VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 137596 | /* VPSHRDDZ256rri */ |
| 137597 | VR256X, VR256X, VR256X, u8imm, |
| 137598 | /* VPSHRDDZ256rrik */ |
| 137599 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 137600 | /* VPSHRDDZ256rrikz */ |
| 137601 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 137602 | /* VPSHRDDZrmbi */ |
| 137603 | VR512, VR512, i32mem, u8imm, |
| 137604 | /* VPSHRDDZrmbik */ |
| 137605 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 137606 | /* VPSHRDDZrmbikz */ |
| 137607 | VR512, VK16WM, VR512, i32mem, u8imm, |
| 137608 | /* VPSHRDDZrmi */ |
| 137609 | VR512, VR512, i512mem, u8imm, |
| 137610 | /* VPSHRDDZrmik */ |
| 137611 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 137612 | /* VPSHRDDZrmikz */ |
| 137613 | VR512, VK16WM, VR512, i512mem, u8imm, |
| 137614 | /* VPSHRDDZrri */ |
| 137615 | VR512, VR512, VR512, u8imm, |
| 137616 | /* VPSHRDDZrrik */ |
| 137617 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 137618 | /* VPSHRDDZrrikz */ |
| 137619 | VR512, VK16WM, VR512, VR512, u8imm, |
| 137620 | /* VPSHRDQZ128rmbi */ |
| 137621 | VR128X, VR128X, i64mem, u8imm, |
| 137622 | /* VPSHRDQZ128rmbik */ |
| 137623 | VR128X, VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 137624 | /* VPSHRDQZ128rmbikz */ |
| 137625 | VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 137626 | /* VPSHRDQZ128rmi */ |
| 137627 | VR128X, VR128X, i128mem, u8imm, |
| 137628 | /* VPSHRDQZ128rmik */ |
| 137629 | VR128X, VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 137630 | /* VPSHRDQZ128rmikz */ |
| 137631 | VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 137632 | /* VPSHRDQZ128rri */ |
| 137633 | VR128X, VR128X, VR128X, u8imm, |
| 137634 | /* VPSHRDQZ128rrik */ |
| 137635 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 137636 | /* VPSHRDQZ128rrikz */ |
| 137637 | VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 137638 | /* VPSHRDQZ256rmbi */ |
| 137639 | VR256X, VR256X, i64mem, u8imm, |
| 137640 | /* VPSHRDQZ256rmbik */ |
| 137641 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 137642 | /* VPSHRDQZ256rmbikz */ |
| 137643 | VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 137644 | /* VPSHRDQZ256rmi */ |
| 137645 | VR256X, VR256X, i256mem, u8imm, |
| 137646 | /* VPSHRDQZ256rmik */ |
| 137647 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 137648 | /* VPSHRDQZ256rmikz */ |
| 137649 | VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 137650 | /* VPSHRDQZ256rri */ |
| 137651 | VR256X, VR256X, VR256X, u8imm, |
| 137652 | /* VPSHRDQZ256rrik */ |
| 137653 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 137654 | /* VPSHRDQZ256rrikz */ |
| 137655 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 137656 | /* VPSHRDQZrmbi */ |
| 137657 | VR512, VR512, i64mem, u8imm, |
| 137658 | /* VPSHRDQZrmbik */ |
| 137659 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 137660 | /* VPSHRDQZrmbikz */ |
| 137661 | VR512, VK8WM, VR512, i64mem, u8imm, |
| 137662 | /* VPSHRDQZrmi */ |
| 137663 | VR512, VR512, i512mem, u8imm, |
| 137664 | /* VPSHRDQZrmik */ |
| 137665 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 137666 | /* VPSHRDQZrmikz */ |
| 137667 | VR512, VK8WM, VR512, i512mem, u8imm, |
| 137668 | /* VPSHRDQZrri */ |
| 137669 | VR512, VR512, VR512, u8imm, |
| 137670 | /* VPSHRDQZrrik */ |
| 137671 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 137672 | /* VPSHRDQZrrikz */ |
| 137673 | VR512, VK8WM, VR512, VR512, u8imm, |
| 137674 | /* VPSHRDVDZ128m */ |
| 137675 | VR128X, VR128X, VR128X, i128mem, |
| 137676 | /* VPSHRDVDZ128mb */ |
| 137677 | VR128X, VR128X, VR128X, i32mem, |
| 137678 | /* VPSHRDVDZ128mbk */ |
| 137679 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 137680 | /* VPSHRDVDZ128mbkz */ |
| 137681 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 137682 | /* VPSHRDVDZ128mk */ |
| 137683 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 137684 | /* VPSHRDVDZ128mkz */ |
| 137685 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 137686 | /* VPSHRDVDZ128r */ |
| 137687 | VR128X, VR128X, VR128X, VR128X, |
| 137688 | /* VPSHRDVDZ128rk */ |
| 137689 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 137690 | /* VPSHRDVDZ128rkz */ |
| 137691 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 137692 | /* VPSHRDVDZ256m */ |
| 137693 | VR256X, VR256X, VR256X, i256mem, |
| 137694 | /* VPSHRDVDZ256mb */ |
| 137695 | VR256X, VR256X, VR256X, i32mem, |
| 137696 | /* VPSHRDVDZ256mbk */ |
| 137697 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 137698 | /* VPSHRDVDZ256mbkz */ |
| 137699 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 137700 | /* VPSHRDVDZ256mk */ |
| 137701 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 137702 | /* VPSHRDVDZ256mkz */ |
| 137703 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 137704 | /* VPSHRDVDZ256r */ |
| 137705 | VR256X, VR256X, VR256X, VR256X, |
| 137706 | /* VPSHRDVDZ256rk */ |
| 137707 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 137708 | /* VPSHRDVDZ256rkz */ |
| 137709 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 137710 | /* VPSHRDVDZm */ |
| 137711 | VR512, VR512, VR512, i512mem, |
| 137712 | /* VPSHRDVDZmb */ |
| 137713 | VR512, VR512, VR512, i32mem, |
| 137714 | /* VPSHRDVDZmbk */ |
| 137715 | VR512, VR512, VK16WM, VR512, i32mem, |
| 137716 | /* VPSHRDVDZmbkz */ |
| 137717 | VR512, VR512, VK16WM, VR512, i32mem, |
| 137718 | /* VPSHRDVDZmk */ |
| 137719 | VR512, VR512, VK16WM, VR512, i512mem, |
| 137720 | /* VPSHRDVDZmkz */ |
| 137721 | VR512, VR512, VK16WM, VR512, i512mem, |
| 137722 | /* VPSHRDVDZr */ |
| 137723 | VR512, VR512, VR512, VR512, |
| 137724 | /* VPSHRDVDZrk */ |
| 137725 | VR512, VR512, VK16WM, VR512, VR512, |
| 137726 | /* VPSHRDVDZrkz */ |
| 137727 | VR512, VR512, VK16WM, VR512, VR512, |
| 137728 | /* VPSHRDVQZ128m */ |
| 137729 | VR128X, VR128X, VR128X, i128mem, |
| 137730 | /* VPSHRDVQZ128mb */ |
| 137731 | VR128X, VR128X, VR128X, i64mem, |
| 137732 | /* VPSHRDVQZ128mbk */ |
| 137733 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 137734 | /* VPSHRDVQZ128mbkz */ |
| 137735 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 137736 | /* VPSHRDVQZ128mk */ |
| 137737 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 137738 | /* VPSHRDVQZ128mkz */ |
| 137739 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 137740 | /* VPSHRDVQZ128r */ |
| 137741 | VR128X, VR128X, VR128X, VR128X, |
| 137742 | /* VPSHRDVQZ128rk */ |
| 137743 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 137744 | /* VPSHRDVQZ128rkz */ |
| 137745 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 137746 | /* VPSHRDVQZ256m */ |
| 137747 | VR256X, VR256X, VR256X, i256mem, |
| 137748 | /* VPSHRDVQZ256mb */ |
| 137749 | VR256X, VR256X, VR256X, i64mem, |
| 137750 | /* VPSHRDVQZ256mbk */ |
| 137751 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 137752 | /* VPSHRDVQZ256mbkz */ |
| 137753 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 137754 | /* VPSHRDVQZ256mk */ |
| 137755 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 137756 | /* VPSHRDVQZ256mkz */ |
| 137757 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 137758 | /* VPSHRDVQZ256r */ |
| 137759 | VR256X, VR256X, VR256X, VR256X, |
| 137760 | /* VPSHRDVQZ256rk */ |
| 137761 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 137762 | /* VPSHRDVQZ256rkz */ |
| 137763 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 137764 | /* VPSHRDVQZm */ |
| 137765 | VR512, VR512, VR512, i512mem, |
| 137766 | /* VPSHRDVQZmb */ |
| 137767 | VR512, VR512, VR512, i64mem, |
| 137768 | /* VPSHRDVQZmbk */ |
| 137769 | VR512, VR512, VK8WM, VR512, i64mem, |
| 137770 | /* VPSHRDVQZmbkz */ |
| 137771 | VR512, VR512, VK8WM, VR512, i64mem, |
| 137772 | /* VPSHRDVQZmk */ |
| 137773 | VR512, VR512, VK8WM, VR512, i512mem, |
| 137774 | /* VPSHRDVQZmkz */ |
| 137775 | VR512, VR512, VK8WM, VR512, i512mem, |
| 137776 | /* VPSHRDVQZr */ |
| 137777 | VR512, VR512, VR512, VR512, |
| 137778 | /* VPSHRDVQZrk */ |
| 137779 | VR512, VR512, VK8WM, VR512, VR512, |
| 137780 | /* VPSHRDVQZrkz */ |
| 137781 | VR512, VR512, VK8WM, VR512, VR512, |
| 137782 | /* VPSHRDVWZ128m */ |
| 137783 | VR128X, VR128X, VR128X, i128mem, |
| 137784 | /* VPSHRDVWZ128mk */ |
| 137785 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 137786 | /* VPSHRDVWZ128mkz */ |
| 137787 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 137788 | /* VPSHRDVWZ128r */ |
| 137789 | VR128X, VR128X, VR128X, VR128X, |
| 137790 | /* VPSHRDVWZ128rk */ |
| 137791 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 137792 | /* VPSHRDVWZ128rkz */ |
| 137793 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 137794 | /* VPSHRDVWZ256m */ |
| 137795 | VR256X, VR256X, VR256X, i256mem, |
| 137796 | /* VPSHRDVWZ256mk */ |
| 137797 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 137798 | /* VPSHRDVWZ256mkz */ |
| 137799 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 137800 | /* VPSHRDVWZ256r */ |
| 137801 | VR256X, VR256X, VR256X, VR256X, |
| 137802 | /* VPSHRDVWZ256rk */ |
| 137803 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 137804 | /* VPSHRDVWZ256rkz */ |
| 137805 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 137806 | /* VPSHRDVWZm */ |
| 137807 | VR512, VR512, VR512, i512mem, |
| 137808 | /* VPSHRDVWZmk */ |
| 137809 | VR512, VR512, VK32WM, VR512, i512mem, |
| 137810 | /* VPSHRDVWZmkz */ |
| 137811 | VR512, VR512, VK32WM, VR512, i512mem, |
| 137812 | /* VPSHRDVWZr */ |
| 137813 | VR512, VR512, VR512, VR512, |
| 137814 | /* VPSHRDVWZrk */ |
| 137815 | VR512, VR512, VK32WM, VR512, VR512, |
| 137816 | /* VPSHRDVWZrkz */ |
| 137817 | VR512, VR512, VK32WM, VR512, VR512, |
| 137818 | /* VPSHRDWZ128rmi */ |
| 137819 | VR128X, VR128X, i128mem, u8imm, |
| 137820 | /* VPSHRDWZ128rmik */ |
| 137821 | VR128X, VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 137822 | /* VPSHRDWZ128rmikz */ |
| 137823 | VR128X, VK8WM, VR128X, i128mem, u8imm, |
| 137824 | /* VPSHRDWZ128rri */ |
| 137825 | VR128X, VR128X, VR128X, u8imm, |
| 137826 | /* VPSHRDWZ128rrik */ |
| 137827 | VR128X, VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 137828 | /* VPSHRDWZ128rrikz */ |
| 137829 | VR128X, VK8WM, VR128X, VR128X, u8imm, |
| 137830 | /* VPSHRDWZ256rmi */ |
| 137831 | VR256X, VR256X, i256mem, u8imm, |
| 137832 | /* VPSHRDWZ256rmik */ |
| 137833 | VR256X, VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 137834 | /* VPSHRDWZ256rmikz */ |
| 137835 | VR256X, VK16WM, VR256X, i256mem, u8imm, |
| 137836 | /* VPSHRDWZ256rri */ |
| 137837 | VR256X, VR256X, VR256X, u8imm, |
| 137838 | /* VPSHRDWZ256rrik */ |
| 137839 | VR256X, VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 137840 | /* VPSHRDWZ256rrikz */ |
| 137841 | VR256X, VK16WM, VR256X, VR256X, u8imm, |
| 137842 | /* VPSHRDWZrmi */ |
| 137843 | VR512, VR512, i512mem, u8imm, |
| 137844 | /* VPSHRDWZrmik */ |
| 137845 | VR512, VR512, VK32WM, VR512, i512mem, u8imm, |
| 137846 | /* VPSHRDWZrmikz */ |
| 137847 | VR512, VK32WM, VR512, i512mem, u8imm, |
| 137848 | /* VPSHRDWZrri */ |
| 137849 | VR512, VR512, VR512, u8imm, |
| 137850 | /* VPSHRDWZrrik */ |
| 137851 | VR512, VR512, VK32WM, VR512, VR512, u8imm, |
| 137852 | /* VPSHRDWZrrikz */ |
| 137853 | VR512, VK32WM, VR512, VR512, u8imm, |
| 137854 | /* VPSHUFBITQMBZ128rm */ |
| 137855 | VK16, VR128X, i128mem, |
| 137856 | /* VPSHUFBITQMBZ128rmk */ |
| 137857 | VK16, VK16WM, VR128X, i128mem, |
| 137858 | /* VPSHUFBITQMBZ128rr */ |
| 137859 | VK16, VR128X, VR128X, |
| 137860 | /* VPSHUFBITQMBZ128rrk */ |
| 137861 | VK16, VK16WM, VR128X, VR128X, |
| 137862 | /* VPSHUFBITQMBZ256rm */ |
| 137863 | VK32, VR256X, i256mem, |
| 137864 | /* VPSHUFBITQMBZ256rmk */ |
| 137865 | VK32, VK32WM, VR256X, i256mem, |
| 137866 | /* VPSHUFBITQMBZ256rr */ |
| 137867 | VK32, VR256X, VR256X, |
| 137868 | /* VPSHUFBITQMBZ256rrk */ |
| 137869 | VK32, VK32WM, VR256X, VR256X, |
| 137870 | /* VPSHUFBITQMBZrm */ |
| 137871 | VK64, VR512, i512mem, |
| 137872 | /* VPSHUFBITQMBZrmk */ |
| 137873 | VK64, VK64WM, VR512, i512mem, |
| 137874 | /* VPSHUFBITQMBZrr */ |
| 137875 | VK64, VR512, VR512, |
| 137876 | /* VPSHUFBITQMBZrrk */ |
| 137877 | VK64, VK64WM, VR512, VR512, |
| 137878 | /* VPSHUFBYrm */ |
| 137879 | VR256, VR256, i256mem, |
| 137880 | /* VPSHUFBYrr */ |
| 137881 | VR256, VR256, VR256, |
| 137882 | /* VPSHUFBZ128rm */ |
| 137883 | VR128X, VR128X, i128mem, |
| 137884 | /* VPSHUFBZ128rmk */ |
| 137885 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 137886 | /* VPSHUFBZ128rmkz */ |
| 137887 | VR128X, VK16WM, VR128X, i128mem, |
| 137888 | /* VPSHUFBZ128rr */ |
| 137889 | VR128X, VR128X, VR128X, |
| 137890 | /* VPSHUFBZ128rrk */ |
| 137891 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 137892 | /* VPSHUFBZ128rrkz */ |
| 137893 | VR128X, VK16WM, VR128X, VR128X, |
| 137894 | /* VPSHUFBZ256rm */ |
| 137895 | VR256X, VR256X, i256mem, |
| 137896 | /* VPSHUFBZ256rmk */ |
| 137897 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 137898 | /* VPSHUFBZ256rmkz */ |
| 137899 | VR256X, VK32WM, VR256X, i256mem, |
| 137900 | /* VPSHUFBZ256rr */ |
| 137901 | VR256X, VR256X, VR256X, |
| 137902 | /* VPSHUFBZ256rrk */ |
| 137903 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 137904 | /* VPSHUFBZ256rrkz */ |
| 137905 | VR256X, VK32WM, VR256X, VR256X, |
| 137906 | /* VPSHUFBZrm */ |
| 137907 | VR512, VR512, i512mem, |
| 137908 | /* VPSHUFBZrmk */ |
| 137909 | VR512, VR512, VK64WM, VR512, i512mem, |
| 137910 | /* VPSHUFBZrmkz */ |
| 137911 | VR512, VK64WM, VR512, i512mem, |
| 137912 | /* VPSHUFBZrr */ |
| 137913 | VR512, VR512, VR512, |
| 137914 | /* VPSHUFBZrrk */ |
| 137915 | VR512, VR512, VK64WM, VR512, VR512, |
| 137916 | /* VPSHUFBZrrkz */ |
| 137917 | VR512, VK64WM, VR512, VR512, |
| 137918 | /* VPSHUFBrm */ |
| 137919 | VR128, VR128, i128mem, |
| 137920 | /* VPSHUFBrr */ |
| 137921 | VR128, VR128, VR128, |
| 137922 | /* VPSHUFDYmi */ |
| 137923 | VR256, i256mem, u8imm, |
| 137924 | /* VPSHUFDYri */ |
| 137925 | VR256, VR256, u8imm, |
| 137926 | /* VPSHUFDZ128mbi */ |
| 137927 | VR128X, i32mem, u8imm, |
| 137928 | /* VPSHUFDZ128mbik */ |
| 137929 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 137930 | /* VPSHUFDZ128mbikz */ |
| 137931 | VR128X, VK4WM, i32mem, u8imm, |
| 137932 | /* VPSHUFDZ128mi */ |
| 137933 | VR128X, i128mem, u8imm, |
| 137934 | /* VPSHUFDZ128mik */ |
| 137935 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 137936 | /* VPSHUFDZ128mikz */ |
| 137937 | VR128X, VK4WM, i128mem, u8imm, |
| 137938 | /* VPSHUFDZ128ri */ |
| 137939 | VR128X, VR128X, u8imm, |
| 137940 | /* VPSHUFDZ128rik */ |
| 137941 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 137942 | /* VPSHUFDZ128rikz */ |
| 137943 | VR128X, VK4WM, VR128X, u8imm, |
| 137944 | /* VPSHUFDZ256mbi */ |
| 137945 | VR256X, i32mem, u8imm, |
| 137946 | /* VPSHUFDZ256mbik */ |
| 137947 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 137948 | /* VPSHUFDZ256mbikz */ |
| 137949 | VR256X, VK8WM, i32mem, u8imm, |
| 137950 | /* VPSHUFDZ256mi */ |
| 137951 | VR256X, i256mem, u8imm, |
| 137952 | /* VPSHUFDZ256mik */ |
| 137953 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 137954 | /* VPSHUFDZ256mikz */ |
| 137955 | VR256X, VK8WM, i256mem, u8imm, |
| 137956 | /* VPSHUFDZ256ri */ |
| 137957 | VR256X, VR256X, u8imm, |
| 137958 | /* VPSHUFDZ256rik */ |
| 137959 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 137960 | /* VPSHUFDZ256rikz */ |
| 137961 | VR256X, VK8WM, VR256X, u8imm, |
| 137962 | /* VPSHUFDZmbi */ |
| 137963 | VR512, i32mem, u8imm, |
| 137964 | /* VPSHUFDZmbik */ |
| 137965 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 137966 | /* VPSHUFDZmbikz */ |
| 137967 | VR512, VK16WM, i32mem, u8imm, |
| 137968 | /* VPSHUFDZmi */ |
| 137969 | VR512, i512mem, u8imm, |
| 137970 | /* VPSHUFDZmik */ |
| 137971 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 137972 | /* VPSHUFDZmikz */ |
| 137973 | VR512, VK16WM, i512mem, u8imm, |
| 137974 | /* VPSHUFDZri */ |
| 137975 | VR512, VR512, u8imm, |
| 137976 | /* VPSHUFDZrik */ |
| 137977 | VR512, VR512, VK16WM, VR512, u8imm, |
| 137978 | /* VPSHUFDZrikz */ |
| 137979 | VR512, VK16WM, VR512, u8imm, |
| 137980 | /* VPSHUFDmi */ |
| 137981 | VR128, i128mem, u8imm, |
| 137982 | /* VPSHUFDri */ |
| 137983 | VR128, VR128, u8imm, |
| 137984 | /* VPSHUFHWYmi */ |
| 137985 | VR256, i256mem, u8imm, |
| 137986 | /* VPSHUFHWYri */ |
| 137987 | VR256, VR256, u8imm, |
| 137988 | /* VPSHUFHWZ128mi */ |
| 137989 | VR128X, i128mem, u8imm, |
| 137990 | /* VPSHUFHWZ128mik */ |
| 137991 | VR128X, VR128X, VK8WM, i128mem, u8imm, |
| 137992 | /* VPSHUFHWZ128mikz */ |
| 137993 | VR128X, VK8WM, i128mem, u8imm, |
| 137994 | /* VPSHUFHWZ128ri */ |
| 137995 | VR128X, VR128X, u8imm, |
| 137996 | /* VPSHUFHWZ128rik */ |
| 137997 | VR128X, VR128X, VK8WM, VR128X, u8imm, |
| 137998 | /* VPSHUFHWZ128rikz */ |
| 137999 | VR128X, VK8WM, VR128X, u8imm, |
| 138000 | /* VPSHUFHWZ256mi */ |
| 138001 | VR256X, i256mem, u8imm, |
| 138002 | /* VPSHUFHWZ256mik */ |
| 138003 | VR256X, VR256X, VK16WM, i256mem, u8imm, |
| 138004 | /* VPSHUFHWZ256mikz */ |
| 138005 | VR256X, VK16WM, i256mem, u8imm, |
| 138006 | /* VPSHUFHWZ256ri */ |
| 138007 | VR256X, VR256X, u8imm, |
| 138008 | /* VPSHUFHWZ256rik */ |
| 138009 | VR256X, VR256X, VK16WM, VR256X, u8imm, |
| 138010 | /* VPSHUFHWZ256rikz */ |
| 138011 | VR256X, VK16WM, VR256X, u8imm, |
| 138012 | /* VPSHUFHWZmi */ |
| 138013 | VR512, i512mem, u8imm, |
| 138014 | /* VPSHUFHWZmik */ |
| 138015 | VR512, VR512, VK32WM, i512mem, u8imm, |
| 138016 | /* VPSHUFHWZmikz */ |
| 138017 | VR512, VK32WM, i512mem, u8imm, |
| 138018 | /* VPSHUFHWZri */ |
| 138019 | VR512, VR512, u8imm, |
| 138020 | /* VPSHUFHWZrik */ |
| 138021 | VR512, VR512, VK32WM, VR512, u8imm, |
| 138022 | /* VPSHUFHWZrikz */ |
| 138023 | VR512, VK32WM, VR512, u8imm, |
| 138024 | /* VPSHUFHWmi */ |
| 138025 | VR128, i128mem, u8imm, |
| 138026 | /* VPSHUFHWri */ |
| 138027 | VR128, VR128, u8imm, |
| 138028 | /* VPSHUFLWYmi */ |
| 138029 | VR256, i256mem, u8imm, |
| 138030 | /* VPSHUFLWYri */ |
| 138031 | VR256, VR256, u8imm, |
| 138032 | /* VPSHUFLWZ128mi */ |
| 138033 | VR128X, i128mem, u8imm, |
| 138034 | /* VPSHUFLWZ128mik */ |
| 138035 | VR128X, VR128X, VK8WM, i128mem, u8imm, |
| 138036 | /* VPSHUFLWZ128mikz */ |
| 138037 | VR128X, VK8WM, i128mem, u8imm, |
| 138038 | /* VPSHUFLWZ128ri */ |
| 138039 | VR128X, VR128X, u8imm, |
| 138040 | /* VPSHUFLWZ128rik */ |
| 138041 | VR128X, VR128X, VK8WM, VR128X, u8imm, |
| 138042 | /* VPSHUFLWZ128rikz */ |
| 138043 | VR128X, VK8WM, VR128X, u8imm, |
| 138044 | /* VPSHUFLWZ256mi */ |
| 138045 | VR256X, i256mem, u8imm, |
| 138046 | /* VPSHUFLWZ256mik */ |
| 138047 | VR256X, VR256X, VK16WM, i256mem, u8imm, |
| 138048 | /* VPSHUFLWZ256mikz */ |
| 138049 | VR256X, VK16WM, i256mem, u8imm, |
| 138050 | /* VPSHUFLWZ256ri */ |
| 138051 | VR256X, VR256X, u8imm, |
| 138052 | /* VPSHUFLWZ256rik */ |
| 138053 | VR256X, VR256X, VK16WM, VR256X, u8imm, |
| 138054 | /* VPSHUFLWZ256rikz */ |
| 138055 | VR256X, VK16WM, VR256X, u8imm, |
| 138056 | /* VPSHUFLWZmi */ |
| 138057 | VR512, i512mem, u8imm, |
| 138058 | /* VPSHUFLWZmik */ |
| 138059 | VR512, VR512, VK32WM, i512mem, u8imm, |
| 138060 | /* VPSHUFLWZmikz */ |
| 138061 | VR512, VK32WM, i512mem, u8imm, |
| 138062 | /* VPSHUFLWZri */ |
| 138063 | VR512, VR512, u8imm, |
| 138064 | /* VPSHUFLWZrik */ |
| 138065 | VR512, VR512, VK32WM, VR512, u8imm, |
| 138066 | /* VPSHUFLWZrikz */ |
| 138067 | VR512, VK32WM, VR512, u8imm, |
| 138068 | /* VPSHUFLWmi */ |
| 138069 | VR128, i128mem, u8imm, |
| 138070 | /* VPSHUFLWri */ |
| 138071 | VR128, VR128, u8imm, |
| 138072 | /* VPSIGNBYrm */ |
| 138073 | VR256, VR256, i256mem, |
| 138074 | /* VPSIGNBYrr */ |
| 138075 | VR256, VR256, VR256, |
| 138076 | /* VPSIGNBrm */ |
| 138077 | VR128, VR128, i128mem, |
| 138078 | /* VPSIGNBrr */ |
| 138079 | VR128, VR128, VR128, |
| 138080 | /* VPSIGNDYrm */ |
| 138081 | VR256, VR256, i256mem, |
| 138082 | /* VPSIGNDYrr */ |
| 138083 | VR256, VR256, VR256, |
| 138084 | /* VPSIGNDrm */ |
| 138085 | VR128, VR128, i128mem, |
| 138086 | /* VPSIGNDrr */ |
| 138087 | VR128, VR128, VR128, |
| 138088 | /* VPSIGNWYrm */ |
| 138089 | VR256, VR256, i256mem, |
| 138090 | /* VPSIGNWYrr */ |
| 138091 | VR256, VR256, VR256, |
| 138092 | /* VPSIGNWrm */ |
| 138093 | VR128, VR128, i128mem, |
| 138094 | /* VPSIGNWrr */ |
| 138095 | VR128, VR128, VR128, |
| 138096 | /* VPSLLDQYri */ |
| 138097 | VR256, VR256, u8imm, |
| 138098 | /* VPSLLDQZ128mi */ |
| 138099 | VR128X, i128mem, u8imm, |
| 138100 | /* VPSLLDQZ128ri */ |
| 138101 | VR128X, VR128X, u8imm, |
| 138102 | /* VPSLLDQZ256mi */ |
| 138103 | VR256X, i256mem, u8imm, |
| 138104 | /* VPSLLDQZ256ri */ |
| 138105 | VR256X, VR256X, u8imm, |
| 138106 | /* VPSLLDQZmi */ |
| 138107 | VR512, i512mem, u8imm, |
| 138108 | /* VPSLLDQZri */ |
| 138109 | VR512, VR512, u8imm, |
| 138110 | /* VPSLLDQri */ |
| 138111 | VR128, VR128, u8imm, |
| 138112 | /* VPSLLDYri */ |
| 138113 | VR256, VR256, u8imm, |
| 138114 | /* VPSLLDYrm */ |
| 138115 | VR256, VR256, i128mem, |
| 138116 | /* VPSLLDYrr */ |
| 138117 | VR256, VR256, VR128, |
| 138118 | /* VPSLLDZ128mbi */ |
| 138119 | VR128X, i32mem, u8imm, |
| 138120 | /* VPSLLDZ128mbik */ |
| 138121 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 138122 | /* VPSLLDZ128mbikz */ |
| 138123 | VR128X, VK4WM, i32mem, u8imm, |
| 138124 | /* VPSLLDZ128mi */ |
| 138125 | VR128X, i128mem, u8imm, |
| 138126 | /* VPSLLDZ128mik */ |
| 138127 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 138128 | /* VPSLLDZ128mikz */ |
| 138129 | VR128X, VK4WM, i128mem, u8imm, |
| 138130 | /* VPSLLDZ128ri */ |
| 138131 | VR128X, VR128X, u8imm, |
| 138132 | /* VPSLLDZ128rik */ |
| 138133 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 138134 | /* VPSLLDZ128rikz */ |
| 138135 | VR128X, VK4WM, VR128X, u8imm, |
| 138136 | /* VPSLLDZ128rm */ |
| 138137 | VR128X, VR128X, i128mem, |
| 138138 | /* VPSLLDZ128rmk */ |
| 138139 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 138140 | /* VPSLLDZ128rmkz */ |
| 138141 | VR128X, VK4WM, VR128X, i128mem, |
| 138142 | /* VPSLLDZ128rr */ |
| 138143 | VR128X, VR128X, VR128X, |
| 138144 | /* VPSLLDZ128rrk */ |
| 138145 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 138146 | /* VPSLLDZ128rrkz */ |
| 138147 | VR128X, VK4WM, VR128X, VR128X, |
| 138148 | /* VPSLLDZ256mbi */ |
| 138149 | VR256X, i32mem, u8imm, |
| 138150 | /* VPSLLDZ256mbik */ |
| 138151 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 138152 | /* VPSLLDZ256mbikz */ |
| 138153 | VR256X, VK8WM, i32mem, u8imm, |
| 138154 | /* VPSLLDZ256mi */ |
| 138155 | VR256X, i256mem, u8imm, |
| 138156 | /* VPSLLDZ256mik */ |
| 138157 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 138158 | /* VPSLLDZ256mikz */ |
| 138159 | VR256X, VK8WM, i256mem, u8imm, |
| 138160 | /* VPSLLDZ256ri */ |
| 138161 | VR256X, VR256X, u8imm, |
| 138162 | /* VPSLLDZ256rik */ |
| 138163 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 138164 | /* VPSLLDZ256rikz */ |
| 138165 | VR256X, VK8WM, VR256X, u8imm, |
| 138166 | /* VPSLLDZ256rm */ |
| 138167 | VR256X, VR256X, i128mem, |
| 138168 | /* VPSLLDZ256rmk */ |
| 138169 | VR256X, VR256X, VK8WM, VR256X, i128mem, |
| 138170 | /* VPSLLDZ256rmkz */ |
| 138171 | VR256X, VK8WM, VR256X, i128mem, |
| 138172 | /* VPSLLDZ256rr */ |
| 138173 | VR256X, VR256X, VR128X, |
| 138174 | /* VPSLLDZ256rrk */ |
| 138175 | VR256X, VR256X, VK8WM, VR256X, VR128X, |
| 138176 | /* VPSLLDZ256rrkz */ |
| 138177 | VR256X, VK8WM, VR256X, VR128X, |
| 138178 | /* VPSLLDZmbi */ |
| 138179 | VR512, i32mem, u8imm, |
| 138180 | /* VPSLLDZmbik */ |
| 138181 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 138182 | /* VPSLLDZmbikz */ |
| 138183 | VR512, VK16WM, i32mem, u8imm, |
| 138184 | /* VPSLLDZmi */ |
| 138185 | VR512, i512mem, u8imm, |
| 138186 | /* VPSLLDZmik */ |
| 138187 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 138188 | /* VPSLLDZmikz */ |
| 138189 | VR512, VK16WM, i512mem, u8imm, |
| 138190 | /* VPSLLDZri */ |
| 138191 | VR512, VR512, u8imm, |
| 138192 | /* VPSLLDZrik */ |
| 138193 | VR512, VR512, VK16WM, VR512, u8imm, |
| 138194 | /* VPSLLDZrikz */ |
| 138195 | VR512, VK16WM, VR512, u8imm, |
| 138196 | /* VPSLLDZrm */ |
| 138197 | VR512, VR512, i128mem, |
| 138198 | /* VPSLLDZrmk */ |
| 138199 | VR512, VR512, VK16WM, VR512, i128mem, |
| 138200 | /* VPSLLDZrmkz */ |
| 138201 | VR512, VK16WM, VR512, i128mem, |
| 138202 | /* VPSLLDZrr */ |
| 138203 | VR512, VR512, VR128X, |
| 138204 | /* VPSLLDZrrk */ |
| 138205 | VR512, VR512, VK16WM, VR512, VR128X, |
| 138206 | /* VPSLLDZrrkz */ |
| 138207 | VR512, VK16WM, VR512, VR128X, |
| 138208 | /* VPSLLDri */ |
| 138209 | VR128, VR128, u8imm, |
| 138210 | /* VPSLLDrm */ |
| 138211 | VR128, VR128, i128mem, |
| 138212 | /* VPSLLDrr */ |
| 138213 | VR128, VR128, VR128, |
| 138214 | /* VPSLLQYri */ |
| 138215 | VR256, VR256, u8imm, |
| 138216 | /* VPSLLQYrm */ |
| 138217 | VR256, VR256, i128mem, |
| 138218 | /* VPSLLQYrr */ |
| 138219 | VR256, VR256, VR128, |
| 138220 | /* VPSLLQZ128mbi */ |
| 138221 | VR128X, i64mem, u8imm, |
| 138222 | /* VPSLLQZ128mbik */ |
| 138223 | VR128X, VR128X, VK2WM, i64mem, u8imm, |
| 138224 | /* VPSLLQZ128mbikz */ |
| 138225 | VR128X, VK2WM, i64mem, u8imm, |
| 138226 | /* VPSLLQZ128mi */ |
| 138227 | VR128X, i128mem, u8imm, |
| 138228 | /* VPSLLQZ128mik */ |
| 138229 | VR128X, VR128X, VK2WM, i128mem, u8imm, |
| 138230 | /* VPSLLQZ128mikz */ |
| 138231 | VR128X, VK2WM, i128mem, u8imm, |
| 138232 | /* VPSLLQZ128ri */ |
| 138233 | VR128X, VR128X, u8imm, |
| 138234 | /* VPSLLQZ128rik */ |
| 138235 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 138236 | /* VPSLLQZ128rikz */ |
| 138237 | VR128X, VK2WM, VR128X, u8imm, |
| 138238 | /* VPSLLQZ128rm */ |
| 138239 | VR128X, VR128X, i128mem, |
| 138240 | /* VPSLLQZ128rmk */ |
| 138241 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 138242 | /* VPSLLQZ128rmkz */ |
| 138243 | VR128X, VK2WM, VR128X, i128mem, |
| 138244 | /* VPSLLQZ128rr */ |
| 138245 | VR128X, VR128X, VR128X, |
| 138246 | /* VPSLLQZ128rrk */ |
| 138247 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 138248 | /* VPSLLQZ128rrkz */ |
| 138249 | VR128X, VK2WM, VR128X, VR128X, |
| 138250 | /* VPSLLQZ256mbi */ |
| 138251 | VR256X, i64mem, u8imm, |
| 138252 | /* VPSLLQZ256mbik */ |
| 138253 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 138254 | /* VPSLLQZ256mbikz */ |
| 138255 | VR256X, VK4WM, i64mem, u8imm, |
| 138256 | /* VPSLLQZ256mi */ |
| 138257 | VR256X, i256mem, u8imm, |
| 138258 | /* VPSLLQZ256mik */ |
| 138259 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 138260 | /* VPSLLQZ256mikz */ |
| 138261 | VR256X, VK4WM, i256mem, u8imm, |
| 138262 | /* VPSLLQZ256ri */ |
| 138263 | VR256X, VR256X, u8imm, |
| 138264 | /* VPSLLQZ256rik */ |
| 138265 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 138266 | /* VPSLLQZ256rikz */ |
| 138267 | VR256X, VK4WM, VR256X, u8imm, |
| 138268 | /* VPSLLQZ256rm */ |
| 138269 | VR256X, VR256X, i128mem, |
| 138270 | /* VPSLLQZ256rmk */ |
| 138271 | VR256X, VR256X, VK4WM, VR256X, i128mem, |
| 138272 | /* VPSLLQZ256rmkz */ |
| 138273 | VR256X, VK4WM, VR256X, i128mem, |
| 138274 | /* VPSLLQZ256rr */ |
| 138275 | VR256X, VR256X, VR128X, |
| 138276 | /* VPSLLQZ256rrk */ |
| 138277 | VR256X, VR256X, VK4WM, VR256X, VR128X, |
| 138278 | /* VPSLLQZ256rrkz */ |
| 138279 | VR256X, VK4WM, VR256X, VR128X, |
| 138280 | /* VPSLLQZmbi */ |
| 138281 | VR512, i64mem, u8imm, |
| 138282 | /* VPSLLQZmbik */ |
| 138283 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 138284 | /* VPSLLQZmbikz */ |
| 138285 | VR512, VK8WM, i64mem, u8imm, |
| 138286 | /* VPSLLQZmi */ |
| 138287 | VR512, i512mem, u8imm, |
| 138288 | /* VPSLLQZmik */ |
| 138289 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 138290 | /* VPSLLQZmikz */ |
| 138291 | VR512, VK8WM, i512mem, u8imm, |
| 138292 | /* VPSLLQZri */ |
| 138293 | VR512, VR512, u8imm, |
| 138294 | /* VPSLLQZrik */ |
| 138295 | VR512, VR512, VK8WM, VR512, u8imm, |
| 138296 | /* VPSLLQZrikz */ |
| 138297 | VR512, VK8WM, VR512, u8imm, |
| 138298 | /* VPSLLQZrm */ |
| 138299 | VR512, VR512, i128mem, |
| 138300 | /* VPSLLQZrmk */ |
| 138301 | VR512, VR512, VK8WM, VR512, i128mem, |
| 138302 | /* VPSLLQZrmkz */ |
| 138303 | VR512, VK8WM, VR512, i128mem, |
| 138304 | /* VPSLLQZrr */ |
| 138305 | VR512, VR512, VR128X, |
| 138306 | /* VPSLLQZrrk */ |
| 138307 | VR512, VR512, VK8WM, VR512, VR128X, |
| 138308 | /* VPSLLQZrrkz */ |
| 138309 | VR512, VK8WM, VR512, VR128X, |
| 138310 | /* VPSLLQri */ |
| 138311 | VR128, VR128, u8imm, |
| 138312 | /* VPSLLQrm */ |
| 138313 | VR128, VR128, i128mem, |
| 138314 | /* VPSLLQrr */ |
| 138315 | VR128, VR128, VR128, |
| 138316 | /* VPSLLVDYrm */ |
| 138317 | VR256, VR256, i256mem, |
| 138318 | /* VPSLLVDYrr */ |
| 138319 | VR256, VR256, VR256, |
| 138320 | /* VPSLLVDZ128rm */ |
| 138321 | VR128X, VR128X, i128mem, |
| 138322 | /* VPSLLVDZ128rmb */ |
| 138323 | VR128X, VR128X, i32mem, |
| 138324 | /* VPSLLVDZ128rmbk */ |
| 138325 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 138326 | /* VPSLLVDZ128rmbkz */ |
| 138327 | VR128X, VK4WM, VR128X, i32mem, |
| 138328 | /* VPSLLVDZ128rmk */ |
| 138329 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 138330 | /* VPSLLVDZ128rmkz */ |
| 138331 | VR128X, VK4WM, VR128X, i128mem, |
| 138332 | /* VPSLLVDZ128rr */ |
| 138333 | VR128X, VR128X, VR128X, |
| 138334 | /* VPSLLVDZ128rrk */ |
| 138335 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 138336 | /* VPSLLVDZ128rrkz */ |
| 138337 | VR128X, VK4WM, VR128X, VR128X, |
| 138338 | /* VPSLLVDZ256rm */ |
| 138339 | VR256X, VR256X, i256mem, |
| 138340 | /* VPSLLVDZ256rmb */ |
| 138341 | VR256X, VR256X, i32mem, |
| 138342 | /* VPSLLVDZ256rmbk */ |
| 138343 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 138344 | /* VPSLLVDZ256rmbkz */ |
| 138345 | VR256X, VK8WM, VR256X, i32mem, |
| 138346 | /* VPSLLVDZ256rmk */ |
| 138347 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 138348 | /* VPSLLVDZ256rmkz */ |
| 138349 | VR256X, VK8WM, VR256X, i256mem, |
| 138350 | /* VPSLLVDZ256rr */ |
| 138351 | VR256X, VR256X, VR256X, |
| 138352 | /* VPSLLVDZ256rrk */ |
| 138353 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 138354 | /* VPSLLVDZ256rrkz */ |
| 138355 | VR256X, VK8WM, VR256X, VR256X, |
| 138356 | /* VPSLLVDZrm */ |
| 138357 | VR512, VR512, i512mem, |
| 138358 | /* VPSLLVDZrmb */ |
| 138359 | VR512, VR512, i32mem, |
| 138360 | /* VPSLLVDZrmbk */ |
| 138361 | VR512, VR512, VK16WM, VR512, i32mem, |
| 138362 | /* VPSLLVDZrmbkz */ |
| 138363 | VR512, VK16WM, VR512, i32mem, |
| 138364 | /* VPSLLVDZrmk */ |
| 138365 | VR512, VR512, VK16WM, VR512, i512mem, |
| 138366 | /* VPSLLVDZrmkz */ |
| 138367 | VR512, VK16WM, VR512, i512mem, |
| 138368 | /* VPSLLVDZrr */ |
| 138369 | VR512, VR512, VR512, |
| 138370 | /* VPSLLVDZrrk */ |
| 138371 | VR512, VR512, VK16WM, VR512, VR512, |
| 138372 | /* VPSLLVDZrrkz */ |
| 138373 | VR512, VK16WM, VR512, VR512, |
| 138374 | /* VPSLLVDrm */ |
| 138375 | VR128, VR128, i128mem, |
| 138376 | /* VPSLLVDrr */ |
| 138377 | VR128, VR128, VR128, |
| 138378 | /* VPSLLVQYrm */ |
| 138379 | VR256, VR256, i256mem, |
| 138380 | /* VPSLLVQYrr */ |
| 138381 | VR256, VR256, VR256, |
| 138382 | /* VPSLLVQZ128rm */ |
| 138383 | VR128X, VR128X, i128mem, |
| 138384 | /* VPSLLVQZ128rmb */ |
| 138385 | VR128X, VR128X, i64mem, |
| 138386 | /* VPSLLVQZ128rmbk */ |
| 138387 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 138388 | /* VPSLLVQZ128rmbkz */ |
| 138389 | VR128X, VK2WM, VR128X, i64mem, |
| 138390 | /* VPSLLVQZ128rmk */ |
| 138391 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 138392 | /* VPSLLVQZ128rmkz */ |
| 138393 | VR128X, VK2WM, VR128X, i128mem, |
| 138394 | /* VPSLLVQZ128rr */ |
| 138395 | VR128X, VR128X, VR128X, |
| 138396 | /* VPSLLVQZ128rrk */ |
| 138397 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 138398 | /* VPSLLVQZ128rrkz */ |
| 138399 | VR128X, VK2WM, VR128X, VR128X, |
| 138400 | /* VPSLLVQZ256rm */ |
| 138401 | VR256X, VR256X, i256mem, |
| 138402 | /* VPSLLVQZ256rmb */ |
| 138403 | VR256X, VR256X, i64mem, |
| 138404 | /* VPSLLVQZ256rmbk */ |
| 138405 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 138406 | /* VPSLLVQZ256rmbkz */ |
| 138407 | VR256X, VK4WM, VR256X, i64mem, |
| 138408 | /* VPSLLVQZ256rmk */ |
| 138409 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 138410 | /* VPSLLVQZ256rmkz */ |
| 138411 | VR256X, VK4WM, VR256X, i256mem, |
| 138412 | /* VPSLLVQZ256rr */ |
| 138413 | VR256X, VR256X, VR256X, |
| 138414 | /* VPSLLVQZ256rrk */ |
| 138415 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 138416 | /* VPSLLVQZ256rrkz */ |
| 138417 | VR256X, VK4WM, VR256X, VR256X, |
| 138418 | /* VPSLLVQZrm */ |
| 138419 | VR512, VR512, i512mem, |
| 138420 | /* VPSLLVQZrmb */ |
| 138421 | VR512, VR512, i64mem, |
| 138422 | /* VPSLLVQZrmbk */ |
| 138423 | VR512, VR512, VK8WM, VR512, i64mem, |
| 138424 | /* VPSLLVQZrmbkz */ |
| 138425 | VR512, VK8WM, VR512, i64mem, |
| 138426 | /* VPSLLVQZrmk */ |
| 138427 | VR512, VR512, VK8WM, VR512, i512mem, |
| 138428 | /* VPSLLVQZrmkz */ |
| 138429 | VR512, VK8WM, VR512, i512mem, |
| 138430 | /* VPSLLVQZrr */ |
| 138431 | VR512, VR512, VR512, |
| 138432 | /* VPSLLVQZrrk */ |
| 138433 | VR512, VR512, VK8WM, VR512, VR512, |
| 138434 | /* VPSLLVQZrrkz */ |
| 138435 | VR512, VK8WM, VR512, VR512, |
| 138436 | /* VPSLLVQrm */ |
| 138437 | VR128, VR128, i128mem, |
| 138438 | /* VPSLLVQrr */ |
| 138439 | VR128, VR128, VR128, |
| 138440 | /* VPSLLVWZ128rm */ |
| 138441 | VR128X, VR128X, i128mem, |
| 138442 | /* VPSLLVWZ128rmk */ |
| 138443 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 138444 | /* VPSLLVWZ128rmkz */ |
| 138445 | VR128X, VK8WM, VR128X, i128mem, |
| 138446 | /* VPSLLVWZ128rr */ |
| 138447 | VR128X, VR128X, VR128X, |
| 138448 | /* VPSLLVWZ128rrk */ |
| 138449 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 138450 | /* VPSLLVWZ128rrkz */ |
| 138451 | VR128X, VK8WM, VR128X, VR128X, |
| 138452 | /* VPSLLVWZ256rm */ |
| 138453 | VR256X, VR256X, i256mem, |
| 138454 | /* VPSLLVWZ256rmk */ |
| 138455 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 138456 | /* VPSLLVWZ256rmkz */ |
| 138457 | VR256X, VK16WM, VR256X, i256mem, |
| 138458 | /* VPSLLVWZ256rr */ |
| 138459 | VR256X, VR256X, VR256X, |
| 138460 | /* VPSLLVWZ256rrk */ |
| 138461 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 138462 | /* VPSLLVWZ256rrkz */ |
| 138463 | VR256X, VK16WM, VR256X, VR256X, |
| 138464 | /* VPSLLVWZrm */ |
| 138465 | VR512, VR512, i512mem, |
| 138466 | /* VPSLLVWZrmk */ |
| 138467 | VR512, VR512, VK32WM, VR512, i512mem, |
| 138468 | /* VPSLLVWZrmkz */ |
| 138469 | VR512, VK32WM, VR512, i512mem, |
| 138470 | /* VPSLLVWZrr */ |
| 138471 | VR512, VR512, VR512, |
| 138472 | /* VPSLLVWZrrk */ |
| 138473 | VR512, VR512, VK32WM, VR512, VR512, |
| 138474 | /* VPSLLVWZrrkz */ |
| 138475 | VR512, VK32WM, VR512, VR512, |
| 138476 | /* VPSLLWYri */ |
| 138477 | VR256, VR256, u8imm, |
| 138478 | /* VPSLLWYrm */ |
| 138479 | VR256, VR256, i128mem, |
| 138480 | /* VPSLLWYrr */ |
| 138481 | VR256, VR256, VR128, |
| 138482 | /* VPSLLWZ128mi */ |
| 138483 | VR128X, i128mem, u8imm, |
| 138484 | /* VPSLLWZ128mik */ |
| 138485 | VR128X, VR128X, VK8WM, i128mem, u8imm, |
| 138486 | /* VPSLLWZ128mikz */ |
| 138487 | VR128X, VK8WM, i128mem, u8imm, |
| 138488 | /* VPSLLWZ128ri */ |
| 138489 | VR128X, VR128X, u8imm, |
| 138490 | /* VPSLLWZ128rik */ |
| 138491 | VR128X, VR128X, VK8WM, VR128X, u8imm, |
| 138492 | /* VPSLLWZ128rikz */ |
| 138493 | VR128X, VK8WM, VR128X, u8imm, |
| 138494 | /* VPSLLWZ128rm */ |
| 138495 | VR128X, VR128X, i128mem, |
| 138496 | /* VPSLLWZ128rmk */ |
| 138497 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 138498 | /* VPSLLWZ128rmkz */ |
| 138499 | VR128X, VK8WM, VR128X, i128mem, |
| 138500 | /* VPSLLWZ128rr */ |
| 138501 | VR128X, VR128X, VR128X, |
| 138502 | /* VPSLLWZ128rrk */ |
| 138503 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 138504 | /* VPSLLWZ128rrkz */ |
| 138505 | VR128X, VK8WM, VR128X, VR128X, |
| 138506 | /* VPSLLWZ256mi */ |
| 138507 | VR256X, i256mem, u8imm, |
| 138508 | /* VPSLLWZ256mik */ |
| 138509 | VR256X, VR256X, VK16WM, i256mem, u8imm, |
| 138510 | /* VPSLLWZ256mikz */ |
| 138511 | VR256X, VK16WM, i256mem, u8imm, |
| 138512 | /* VPSLLWZ256ri */ |
| 138513 | VR256X, VR256X, u8imm, |
| 138514 | /* VPSLLWZ256rik */ |
| 138515 | VR256X, VR256X, VK16WM, VR256X, u8imm, |
| 138516 | /* VPSLLWZ256rikz */ |
| 138517 | VR256X, VK16WM, VR256X, u8imm, |
| 138518 | /* VPSLLWZ256rm */ |
| 138519 | VR256X, VR256X, i128mem, |
| 138520 | /* VPSLLWZ256rmk */ |
| 138521 | VR256X, VR256X, VK16WM, VR256X, i128mem, |
| 138522 | /* VPSLLWZ256rmkz */ |
| 138523 | VR256X, VK16WM, VR256X, i128mem, |
| 138524 | /* VPSLLWZ256rr */ |
| 138525 | VR256X, VR256X, VR128X, |
| 138526 | /* VPSLLWZ256rrk */ |
| 138527 | VR256X, VR256X, VK16WM, VR256X, VR128X, |
| 138528 | /* VPSLLWZ256rrkz */ |
| 138529 | VR256X, VK16WM, VR256X, VR128X, |
| 138530 | /* VPSLLWZmi */ |
| 138531 | VR512, i512mem, u8imm, |
| 138532 | /* VPSLLWZmik */ |
| 138533 | VR512, VR512, VK32WM, i512mem, u8imm, |
| 138534 | /* VPSLLWZmikz */ |
| 138535 | VR512, VK32WM, i512mem, u8imm, |
| 138536 | /* VPSLLWZri */ |
| 138537 | VR512, VR512, u8imm, |
| 138538 | /* VPSLLWZrik */ |
| 138539 | VR512, VR512, VK32WM, VR512, u8imm, |
| 138540 | /* VPSLLWZrikz */ |
| 138541 | VR512, VK32WM, VR512, u8imm, |
| 138542 | /* VPSLLWZrm */ |
| 138543 | VR512, VR512, i128mem, |
| 138544 | /* VPSLLWZrmk */ |
| 138545 | VR512, VR512, VK32WM, VR512, i128mem, |
| 138546 | /* VPSLLWZrmkz */ |
| 138547 | VR512, VK32WM, VR512, i128mem, |
| 138548 | /* VPSLLWZrr */ |
| 138549 | VR512, VR512, VR128X, |
| 138550 | /* VPSLLWZrrk */ |
| 138551 | VR512, VR512, VK32WM, VR512, VR128X, |
| 138552 | /* VPSLLWZrrkz */ |
| 138553 | VR512, VK32WM, VR512, VR128X, |
| 138554 | /* VPSLLWri */ |
| 138555 | VR128, VR128, u8imm, |
| 138556 | /* VPSLLWrm */ |
| 138557 | VR128, VR128, i128mem, |
| 138558 | /* VPSLLWrr */ |
| 138559 | VR128, VR128, VR128, |
| 138560 | /* VPSRADYri */ |
| 138561 | VR256, VR256, u8imm, |
| 138562 | /* VPSRADYrm */ |
| 138563 | VR256, VR256, i128mem, |
| 138564 | /* VPSRADYrr */ |
| 138565 | VR256, VR256, VR128, |
| 138566 | /* VPSRADZ128mbi */ |
| 138567 | VR128X, i32mem, u8imm, |
| 138568 | /* VPSRADZ128mbik */ |
| 138569 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 138570 | /* VPSRADZ128mbikz */ |
| 138571 | VR128X, VK4WM, i32mem, u8imm, |
| 138572 | /* VPSRADZ128mi */ |
| 138573 | VR128X, i128mem, u8imm, |
| 138574 | /* VPSRADZ128mik */ |
| 138575 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 138576 | /* VPSRADZ128mikz */ |
| 138577 | VR128X, VK4WM, i128mem, u8imm, |
| 138578 | /* VPSRADZ128ri */ |
| 138579 | VR128X, VR128X, u8imm, |
| 138580 | /* VPSRADZ128rik */ |
| 138581 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 138582 | /* VPSRADZ128rikz */ |
| 138583 | VR128X, VK4WM, VR128X, u8imm, |
| 138584 | /* VPSRADZ128rm */ |
| 138585 | VR128X, VR128X, i128mem, |
| 138586 | /* VPSRADZ128rmk */ |
| 138587 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 138588 | /* VPSRADZ128rmkz */ |
| 138589 | VR128X, VK4WM, VR128X, i128mem, |
| 138590 | /* VPSRADZ128rr */ |
| 138591 | VR128X, VR128X, VR128X, |
| 138592 | /* VPSRADZ128rrk */ |
| 138593 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 138594 | /* VPSRADZ128rrkz */ |
| 138595 | VR128X, VK4WM, VR128X, VR128X, |
| 138596 | /* VPSRADZ256mbi */ |
| 138597 | VR256X, i32mem, u8imm, |
| 138598 | /* VPSRADZ256mbik */ |
| 138599 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 138600 | /* VPSRADZ256mbikz */ |
| 138601 | VR256X, VK8WM, i32mem, u8imm, |
| 138602 | /* VPSRADZ256mi */ |
| 138603 | VR256X, i256mem, u8imm, |
| 138604 | /* VPSRADZ256mik */ |
| 138605 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 138606 | /* VPSRADZ256mikz */ |
| 138607 | VR256X, VK8WM, i256mem, u8imm, |
| 138608 | /* VPSRADZ256ri */ |
| 138609 | VR256X, VR256X, u8imm, |
| 138610 | /* VPSRADZ256rik */ |
| 138611 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 138612 | /* VPSRADZ256rikz */ |
| 138613 | VR256X, VK8WM, VR256X, u8imm, |
| 138614 | /* VPSRADZ256rm */ |
| 138615 | VR256X, VR256X, i128mem, |
| 138616 | /* VPSRADZ256rmk */ |
| 138617 | VR256X, VR256X, VK8WM, VR256X, i128mem, |
| 138618 | /* VPSRADZ256rmkz */ |
| 138619 | VR256X, VK8WM, VR256X, i128mem, |
| 138620 | /* VPSRADZ256rr */ |
| 138621 | VR256X, VR256X, VR128X, |
| 138622 | /* VPSRADZ256rrk */ |
| 138623 | VR256X, VR256X, VK8WM, VR256X, VR128X, |
| 138624 | /* VPSRADZ256rrkz */ |
| 138625 | VR256X, VK8WM, VR256X, VR128X, |
| 138626 | /* VPSRADZmbi */ |
| 138627 | VR512, i32mem, u8imm, |
| 138628 | /* VPSRADZmbik */ |
| 138629 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 138630 | /* VPSRADZmbikz */ |
| 138631 | VR512, VK16WM, i32mem, u8imm, |
| 138632 | /* VPSRADZmi */ |
| 138633 | VR512, i512mem, u8imm, |
| 138634 | /* VPSRADZmik */ |
| 138635 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 138636 | /* VPSRADZmikz */ |
| 138637 | VR512, VK16WM, i512mem, u8imm, |
| 138638 | /* VPSRADZri */ |
| 138639 | VR512, VR512, u8imm, |
| 138640 | /* VPSRADZrik */ |
| 138641 | VR512, VR512, VK16WM, VR512, u8imm, |
| 138642 | /* VPSRADZrikz */ |
| 138643 | VR512, VK16WM, VR512, u8imm, |
| 138644 | /* VPSRADZrm */ |
| 138645 | VR512, VR512, i128mem, |
| 138646 | /* VPSRADZrmk */ |
| 138647 | VR512, VR512, VK16WM, VR512, i128mem, |
| 138648 | /* VPSRADZrmkz */ |
| 138649 | VR512, VK16WM, VR512, i128mem, |
| 138650 | /* VPSRADZrr */ |
| 138651 | VR512, VR512, VR128X, |
| 138652 | /* VPSRADZrrk */ |
| 138653 | VR512, VR512, VK16WM, VR512, VR128X, |
| 138654 | /* VPSRADZrrkz */ |
| 138655 | VR512, VK16WM, VR512, VR128X, |
| 138656 | /* VPSRADri */ |
| 138657 | VR128, VR128, u8imm, |
| 138658 | /* VPSRADrm */ |
| 138659 | VR128, VR128, i128mem, |
| 138660 | /* VPSRADrr */ |
| 138661 | VR128, VR128, VR128, |
| 138662 | /* VPSRAQZ128mbi */ |
| 138663 | VR128X, i64mem, u8imm, |
| 138664 | /* VPSRAQZ128mbik */ |
| 138665 | VR128X, VR128X, VK2WM, i64mem, u8imm, |
| 138666 | /* VPSRAQZ128mbikz */ |
| 138667 | VR128X, VK2WM, i64mem, u8imm, |
| 138668 | /* VPSRAQZ128mi */ |
| 138669 | VR128X, i128mem, u8imm, |
| 138670 | /* VPSRAQZ128mik */ |
| 138671 | VR128X, VR128X, VK2WM, i128mem, u8imm, |
| 138672 | /* VPSRAQZ128mikz */ |
| 138673 | VR128X, VK2WM, i128mem, u8imm, |
| 138674 | /* VPSRAQZ128ri */ |
| 138675 | VR128X, VR128X, u8imm, |
| 138676 | /* VPSRAQZ128rik */ |
| 138677 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 138678 | /* VPSRAQZ128rikz */ |
| 138679 | VR128X, VK2WM, VR128X, u8imm, |
| 138680 | /* VPSRAQZ128rm */ |
| 138681 | VR128X, VR128X, i128mem, |
| 138682 | /* VPSRAQZ128rmk */ |
| 138683 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 138684 | /* VPSRAQZ128rmkz */ |
| 138685 | VR128X, VK2WM, VR128X, i128mem, |
| 138686 | /* VPSRAQZ128rr */ |
| 138687 | VR128X, VR128X, VR128X, |
| 138688 | /* VPSRAQZ128rrk */ |
| 138689 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 138690 | /* VPSRAQZ128rrkz */ |
| 138691 | VR128X, VK2WM, VR128X, VR128X, |
| 138692 | /* VPSRAQZ256mbi */ |
| 138693 | VR256X, i64mem, u8imm, |
| 138694 | /* VPSRAQZ256mbik */ |
| 138695 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 138696 | /* VPSRAQZ256mbikz */ |
| 138697 | VR256X, VK4WM, i64mem, u8imm, |
| 138698 | /* VPSRAQZ256mi */ |
| 138699 | VR256X, i256mem, u8imm, |
| 138700 | /* VPSRAQZ256mik */ |
| 138701 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 138702 | /* VPSRAQZ256mikz */ |
| 138703 | VR256X, VK4WM, i256mem, u8imm, |
| 138704 | /* VPSRAQZ256ri */ |
| 138705 | VR256X, VR256X, u8imm, |
| 138706 | /* VPSRAQZ256rik */ |
| 138707 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 138708 | /* VPSRAQZ256rikz */ |
| 138709 | VR256X, VK4WM, VR256X, u8imm, |
| 138710 | /* VPSRAQZ256rm */ |
| 138711 | VR256X, VR256X, i128mem, |
| 138712 | /* VPSRAQZ256rmk */ |
| 138713 | VR256X, VR256X, VK4WM, VR256X, i128mem, |
| 138714 | /* VPSRAQZ256rmkz */ |
| 138715 | VR256X, VK4WM, VR256X, i128mem, |
| 138716 | /* VPSRAQZ256rr */ |
| 138717 | VR256X, VR256X, VR128X, |
| 138718 | /* VPSRAQZ256rrk */ |
| 138719 | VR256X, VR256X, VK4WM, VR256X, VR128X, |
| 138720 | /* VPSRAQZ256rrkz */ |
| 138721 | VR256X, VK4WM, VR256X, VR128X, |
| 138722 | /* VPSRAQZmbi */ |
| 138723 | VR512, i64mem, u8imm, |
| 138724 | /* VPSRAQZmbik */ |
| 138725 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 138726 | /* VPSRAQZmbikz */ |
| 138727 | VR512, VK8WM, i64mem, u8imm, |
| 138728 | /* VPSRAQZmi */ |
| 138729 | VR512, i512mem, u8imm, |
| 138730 | /* VPSRAQZmik */ |
| 138731 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 138732 | /* VPSRAQZmikz */ |
| 138733 | VR512, VK8WM, i512mem, u8imm, |
| 138734 | /* VPSRAQZri */ |
| 138735 | VR512, VR512, u8imm, |
| 138736 | /* VPSRAQZrik */ |
| 138737 | VR512, VR512, VK8WM, VR512, u8imm, |
| 138738 | /* VPSRAQZrikz */ |
| 138739 | VR512, VK8WM, VR512, u8imm, |
| 138740 | /* VPSRAQZrm */ |
| 138741 | VR512, VR512, i128mem, |
| 138742 | /* VPSRAQZrmk */ |
| 138743 | VR512, VR512, VK8WM, VR512, i128mem, |
| 138744 | /* VPSRAQZrmkz */ |
| 138745 | VR512, VK8WM, VR512, i128mem, |
| 138746 | /* VPSRAQZrr */ |
| 138747 | VR512, VR512, VR128X, |
| 138748 | /* VPSRAQZrrk */ |
| 138749 | VR512, VR512, VK8WM, VR512, VR128X, |
| 138750 | /* VPSRAQZrrkz */ |
| 138751 | VR512, VK8WM, VR512, VR128X, |
| 138752 | /* VPSRAVDYrm */ |
| 138753 | VR256, VR256, i256mem, |
| 138754 | /* VPSRAVDYrr */ |
| 138755 | VR256, VR256, VR256, |
| 138756 | /* VPSRAVDZ128rm */ |
| 138757 | VR128X, VR128X, i128mem, |
| 138758 | /* VPSRAVDZ128rmb */ |
| 138759 | VR128X, VR128X, i32mem, |
| 138760 | /* VPSRAVDZ128rmbk */ |
| 138761 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 138762 | /* VPSRAVDZ128rmbkz */ |
| 138763 | VR128X, VK4WM, VR128X, i32mem, |
| 138764 | /* VPSRAVDZ128rmk */ |
| 138765 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 138766 | /* VPSRAVDZ128rmkz */ |
| 138767 | VR128X, VK4WM, VR128X, i128mem, |
| 138768 | /* VPSRAVDZ128rr */ |
| 138769 | VR128X, VR128X, VR128X, |
| 138770 | /* VPSRAVDZ128rrk */ |
| 138771 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 138772 | /* VPSRAVDZ128rrkz */ |
| 138773 | VR128X, VK4WM, VR128X, VR128X, |
| 138774 | /* VPSRAVDZ256rm */ |
| 138775 | VR256X, VR256X, i256mem, |
| 138776 | /* VPSRAVDZ256rmb */ |
| 138777 | VR256X, VR256X, i32mem, |
| 138778 | /* VPSRAVDZ256rmbk */ |
| 138779 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 138780 | /* VPSRAVDZ256rmbkz */ |
| 138781 | VR256X, VK8WM, VR256X, i32mem, |
| 138782 | /* VPSRAVDZ256rmk */ |
| 138783 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 138784 | /* VPSRAVDZ256rmkz */ |
| 138785 | VR256X, VK8WM, VR256X, i256mem, |
| 138786 | /* VPSRAVDZ256rr */ |
| 138787 | VR256X, VR256X, VR256X, |
| 138788 | /* VPSRAVDZ256rrk */ |
| 138789 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 138790 | /* VPSRAVDZ256rrkz */ |
| 138791 | VR256X, VK8WM, VR256X, VR256X, |
| 138792 | /* VPSRAVDZrm */ |
| 138793 | VR512, VR512, i512mem, |
| 138794 | /* VPSRAVDZrmb */ |
| 138795 | VR512, VR512, i32mem, |
| 138796 | /* VPSRAVDZrmbk */ |
| 138797 | VR512, VR512, VK16WM, VR512, i32mem, |
| 138798 | /* VPSRAVDZrmbkz */ |
| 138799 | VR512, VK16WM, VR512, i32mem, |
| 138800 | /* VPSRAVDZrmk */ |
| 138801 | VR512, VR512, VK16WM, VR512, i512mem, |
| 138802 | /* VPSRAVDZrmkz */ |
| 138803 | VR512, VK16WM, VR512, i512mem, |
| 138804 | /* VPSRAVDZrr */ |
| 138805 | VR512, VR512, VR512, |
| 138806 | /* VPSRAVDZrrk */ |
| 138807 | VR512, VR512, VK16WM, VR512, VR512, |
| 138808 | /* VPSRAVDZrrkz */ |
| 138809 | VR512, VK16WM, VR512, VR512, |
| 138810 | /* VPSRAVDrm */ |
| 138811 | VR128, VR128, i128mem, |
| 138812 | /* VPSRAVDrr */ |
| 138813 | VR128, VR128, VR128, |
| 138814 | /* VPSRAVQZ128rm */ |
| 138815 | VR128X, VR128X, i128mem, |
| 138816 | /* VPSRAVQZ128rmb */ |
| 138817 | VR128X, VR128X, i64mem, |
| 138818 | /* VPSRAVQZ128rmbk */ |
| 138819 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 138820 | /* VPSRAVQZ128rmbkz */ |
| 138821 | VR128X, VK2WM, VR128X, i64mem, |
| 138822 | /* VPSRAVQZ128rmk */ |
| 138823 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 138824 | /* VPSRAVQZ128rmkz */ |
| 138825 | VR128X, VK2WM, VR128X, i128mem, |
| 138826 | /* VPSRAVQZ128rr */ |
| 138827 | VR128X, VR128X, VR128X, |
| 138828 | /* VPSRAVQZ128rrk */ |
| 138829 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 138830 | /* VPSRAVQZ128rrkz */ |
| 138831 | VR128X, VK2WM, VR128X, VR128X, |
| 138832 | /* VPSRAVQZ256rm */ |
| 138833 | VR256X, VR256X, i256mem, |
| 138834 | /* VPSRAVQZ256rmb */ |
| 138835 | VR256X, VR256X, i64mem, |
| 138836 | /* VPSRAVQZ256rmbk */ |
| 138837 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 138838 | /* VPSRAVQZ256rmbkz */ |
| 138839 | VR256X, VK4WM, VR256X, i64mem, |
| 138840 | /* VPSRAVQZ256rmk */ |
| 138841 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 138842 | /* VPSRAVQZ256rmkz */ |
| 138843 | VR256X, VK4WM, VR256X, i256mem, |
| 138844 | /* VPSRAVQZ256rr */ |
| 138845 | VR256X, VR256X, VR256X, |
| 138846 | /* VPSRAVQZ256rrk */ |
| 138847 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 138848 | /* VPSRAVQZ256rrkz */ |
| 138849 | VR256X, VK4WM, VR256X, VR256X, |
| 138850 | /* VPSRAVQZrm */ |
| 138851 | VR512, VR512, i512mem, |
| 138852 | /* VPSRAVQZrmb */ |
| 138853 | VR512, VR512, i64mem, |
| 138854 | /* VPSRAVQZrmbk */ |
| 138855 | VR512, VR512, VK8WM, VR512, i64mem, |
| 138856 | /* VPSRAVQZrmbkz */ |
| 138857 | VR512, VK8WM, VR512, i64mem, |
| 138858 | /* VPSRAVQZrmk */ |
| 138859 | VR512, VR512, VK8WM, VR512, i512mem, |
| 138860 | /* VPSRAVQZrmkz */ |
| 138861 | VR512, VK8WM, VR512, i512mem, |
| 138862 | /* VPSRAVQZrr */ |
| 138863 | VR512, VR512, VR512, |
| 138864 | /* VPSRAVQZrrk */ |
| 138865 | VR512, VR512, VK8WM, VR512, VR512, |
| 138866 | /* VPSRAVQZrrkz */ |
| 138867 | VR512, VK8WM, VR512, VR512, |
| 138868 | /* VPSRAVWZ128rm */ |
| 138869 | VR128X, VR128X, i128mem, |
| 138870 | /* VPSRAVWZ128rmk */ |
| 138871 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 138872 | /* VPSRAVWZ128rmkz */ |
| 138873 | VR128X, VK8WM, VR128X, i128mem, |
| 138874 | /* VPSRAVWZ128rr */ |
| 138875 | VR128X, VR128X, VR128X, |
| 138876 | /* VPSRAVWZ128rrk */ |
| 138877 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 138878 | /* VPSRAVWZ128rrkz */ |
| 138879 | VR128X, VK8WM, VR128X, VR128X, |
| 138880 | /* VPSRAVWZ256rm */ |
| 138881 | VR256X, VR256X, i256mem, |
| 138882 | /* VPSRAVWZ256rmk */ |
| 138883 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 138884 | /* VPSRAVWZ256rmkz */ |
| 138885 | VR256X, VK16WM, VR256X, i256mem, |
| 138886 | /* VPSRAVWZ256rr */ |
| 138887 | VR256X, VR256X, VR256X, |
| 138888 | /* VPSRAVWZ256rrk */ |
| 138889 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 138890 | /* VPSRAVWZ256rrkz */ |
| 138891 | VR256X, VK16WM, VR256X, VR256X, |
| 138892 | /* VPSRAVWZrm */ |
| 138893 | VR512, VR512, i512mem, |
| 138894 | /* VPSRAVWZrmk */ |
| 138895 | VR512, VR512, VK32WM, VR512, i512mem, |
| 138896 | /* VPSRAVWZrmkz */ |
| 138897 | VR512, VK32WM, VR512, i512mem, |
| 138898 | /* VPSRAVWZrr */ |
| 138899 | VR512, VR512, VR512, |
| 138900 | /* VPSRAVWZrrk */ |
| 138901 | VR512, VR512, VK32WM, VR512, VR512, |
| 138902 | /* VPSRAVWZrrkz */ |
| 138903 | VR512, VK32WM, VR512, VR512, |
| 138904 | /* VPSRAWYri */ |
| 138905 | VR256, VR256, u8imm, |
| 138906 | /* VPSRAWYrm */ |
| 138907 | VR256, VR256, i128mem, |
| 138908 | /* VPSRAWYrr */ |
| 138909 | VR256, VR256, VR128, |
| 138910 | /* VPSRAWZ128mi */ |
| 138911 | VR128X, i128mem, u8imm, |
| 138912 | /* VPSRAWZ128mik */ |
| 138913 | VR128X, VR128X, VK8WM, i128mem, u8imm, |
| 138914 | /* VPSRAWZ128mikz */ |
| 138915 | VR128X, VK8WM, i128mem, u8imm, |
| 138916 | /* VPSRAWZ128ri */ |
| 138917 | VR128X, VR128X, u8imm, |
| 138918 | /* VPSRAWZ128rik */ |
| 138919 | VR128X, VR128X, VK8WM, VR128X, u8imm, |
| 138920 | /* VPSRAWZ128rikz */ |
| 138921 | VR128X, VK8WM, VR128X, u8imm, |
| 138922 | /* VPSRAWZ128rm */ |
| 138923 | VR128X, VR128X, i128mem, |
| 138924 | /* VPSRAWZ128rmk */ |
| 138925 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 138926 | /* VPSRAWZ128rmkz */ |
| 138927 | VR128X, VK8WM, VR128X, i128mem, |
| 138928 | /* VPSRAWZ128rr */ |
| 138929 | VR128X, VR128X, VR128X, |
| 138930 | /* VPSRAWZ128rrk */ |
| 138931 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 138932 | /* VPSRAWZ128rrkz */ |
| 138933 | VR128X, VK8WM, VR128X, VR128X, |
| 138934 | /* VPSRAWZ256mi */ |
| 138935 | VR256X, i256mem, u8imm, |
| 138936 | /* VPSRAWZ256mik */ |
| 138937 | VR256X, VR256X, VK16WM, i256mem, u8imm, |
| 138938 | /* VPSRAWZ256mikz */ |
| 138939 | VR256X, VK16WM, i256mem, u8imm, |
| 138940 | /* VPSRAWZ256ri */ |
| 138941 | VR256X, VR256X, u8imm, |
| 138942 | /* VPSRAWZ256rik */ |
| 138943 | VR256X, VR256X, VK16WM, VR256X, u8imm, |
| 138944 | /* VPSRAWZ256rikz */ |
| 138945 | VR256X, VK16WM, VR256X, u8imm, |
| 138946 | /* VPSRAWZ256rm */ |
| 138947 | VR256X, VR256X, i128mem, |
| 138948 | /* VPSRAWZ256rmk */ |
| 138949 | VR256X, VR256X, VK16WM, VR256X, i128mem, |
| 138950 | /* VPSRAWZ256rmkz */ |
| 138951 | VR256X, VK16WM, VR256X, i128mem, |
| 138952 | /* VPSRAWZ256rr */ |
| 138953 | VR256X, VR256X, VR128X, |
| 138954 | /* VPSRAWZ256rrk */ |
| 138955 | VR256X, VR256X, VK16WM, VR256X, VR128X, |
| 138956 | /* VPSRAWZ256rrkz */ |
| 138957 | VR256X, VK16WM, VR256X, VR128X, |
| 138958 | /* VPSRAWZmi */ |
| 138959 | VR512, i512mem, u8imm, |
| 138960 | /* VPSRAWZmik */ |
| 138961 | VR512, VR512, VK32WM, i512mem, u8imm, |
| 138962 | /* VPSRAWZmikz */ |
| 138963 | VR512, VK32WM, i512mem, u8imm, |
| 138964 | /* VPSRAWZri */ |
| 138965 | VR512, VR512, u8imm, |
| 138966 | /* VPSRAWZrik */ |
| 138967 | VR512, VR512, VK32WM, VR512, u8imm, |
| 138968 | /* VPSRAWZrikz */ |
| 138969 | VR512, VK32WM, VR512, u8imm, |
| 138970 | /* VPSRAWZrm */ |
| 138971 | VR512, VR512, i128mem, |
| 138972 | /* VPSRAWZrmk */ |
| 138973 | VR512, VR512, VK32WM, VR512, i128mem, |
| 138974 | /* VPSRAWZrmkz */ |
| 138975 | VR512, VK32WM, VR512, i128mem, |
| 138976 | /* VPSRAWZrr */ |
| 138977 | VR512, VR512, VR128X, |
| 138978 | /* VPSRAWZrrk */ |
| 138979 | VR512, VR512, VK32WM, VR512, VR128X, |
| 138980 | /* VPSRAWZrrkz */ |
| 138981 | VR512, VK32WM, VR512, VR128X, |
| 138982 | /* VPSRAWri */ |
| 138983 | VR128, VR128, u8imm, |
| 138984 | /* VPSRAWrm */ |
| 138985 | VR128, VR128, i128mem, |
| 138986 | /* VPSRAWrr */ |
| 138987 | VR128, VR128, VR128, |
| 138988 | /* VPSRLDQYri */ |
| 138989 | VR256, VR256, u8imm, |
| 138990 | /* VPSRLDQZ128mi */ |
| 138991 | VR128X, i128mem, u8imm, |
| 138992 | /* VPSRLDQZ128ri */ |
| 138993 | VR128X, VR128X, u8imm, |
| 138994 | /* VPSRLDQZ256mi */ |
| 138995 | VR256X, i256mem, u8imm, |
| 138996 | /* VPSRLDQZ256ri */ |
| 138997 | VR256X, VR256X, u8imm, |
| 138998 | /* VPSRLDQZmi */ |
| 138999 | VR512, i512mem, u8imm, |
| 139000 | /* VPSRLDQZri */ |
| 139001 | VR512, VR512, u8imm, |
| 139002 | /* VPSRLDQri */ |
| 139003 | VR128, VR128, u8imm, |
| 139004 | /* VPSRLDYri */ |
| 139005 | VR256, VR256, u8imm, |
| 139006 | /* VPSRLDYrm */ |
| 139007 | VR256, VR256, i128mem, |
| 139008 | /* VPSRLDYrr */ |
| 139009 | VR256, VR256, VR128, |
| 139010 | /* VPSRLDZ128mbi */ |
| 139011 | VR128X, i32mem, u8imm, |
| 139012 | /* VPSRLDZ128mbik */ |
| 139013 | VR128X, VR128X, VK4WM, i32mem, u8imm, |
| 139014 | /* VPSRLDZ128mbikz */ |
| 139015 | VR128X, VK4WM, i32mem, u8imm, |
| 139016 | /* VPSRLDZ128mi */ |
| 139017 | VR128X, i128mem, u8imm, |
| 139018 | /* VPSRLDZ128mik */ |
| 139019 | VR128X, VR128X, VK4WM, i128mem, u8imm, |
| 139020 | /* VPSRLDZ128mikz */ |
| 139021 | VR128X, VK4WM, i128mem, u8imm, |
| 139022 | /* VPSRLDZ128ri */ |
| 139023 | VR128X, VR128X, u8imm, |
| 139024 | /* VPSRLDZ128rik */ |
| 139025 | VR128X, VR128X, VK4WM, VR128X, u8imm, |
| 139026 | /* VPSRLDZ128rikz */ |
| 139027 | VR128X, VK4WM, VR128X, u8imm, |
| 139028 | /* VPSRLDZ128rm */ |
| 139029 | VR128X, VR128X, i128mem, |
| 139030 | /* VPSRLDZ128rmk */ |
| 139031 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 139032 | /* VPSRLDZ128rmkz */ |
| 139033 | VR128X, VK4WM, VR128X, i128mem, |
| 139034 | /* VPSRLDZ128rr */ |
| 139035 | VR128X, VR128X, VR128X, |
| 139036 | /* VPSRLDZ128rrk */ |
| 139037 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 139038 | /* VPSRLDZ128rrkz */ |
| 139039 | VR128X, VK4WM, VR128X, VR128X, |
| 139040 | /* VPSRLDZ256mbi */ |
| 139041 | VR256X, i32mem, u8imm, |
| 139042 | /* VPSRLDZ256mbik */ |
| 139043 | VR256X, VR256X, VK8WM, i32mem, u8imm, |
| 139044 | /* VPSRLDZ256mbikz */ |
| 139045 | VR256X, VK8WM, i32mem, u8imm, |
| 139046 | /* VPSRLDZ256mi */ |
| 139047 | VR256X, i256mem, u8imm, |
| 139048 | /* VPSRLDZ256mik */ |
| 139049 | VR256X, VR256X, VK8WM, i256mem, u8imm, |
| 139050 | /* VPSRLDZ256mikz */ |
| 139051 | VR256X, VK8WM, i256mem, u8imm, |
| 139052 | /* VPSRLDZ256ri */ |
| 139053 | VR256X, VR256X, u8imm, |
| 139054 | /* VPSRLDZ256rik */ |
| 139055 | VR256X, VR256X, VK8WM, VR256X, u8imm, |
| 139056 | /* VPSRLDZ256rikz */ |
| 139057 | VR256X, VK8WM, VR256X, u8imm, |
| 139058 | /* VPSRLDZ256rm */ |
| 139059 | VR256X, VR256X, i128mem, |
| 139060 | /* VPSRLDZ256rmk */ |
| 139061 | VR256X, VR256X, VK8WM, VR256X, i128mem, |
| 139062 | /* VPSRLDZ256rmkz */ |
| 139063 | VR256X, VK8WM, VR256X, i128mem, |
| 139064 | /* VPSRLDZ256rr */ |
| 139065 | VR256X, VR256X, VR128X, |
| 139066 | /* VPSRLDZ256rrk */ |
| 139067 | VR256X, VR256X, VK8WM, VR256X, VR128X, |
| 139068 | /* VPSRLDZ256rrkz */ |
| 139069 | VR256X, VK8WM, VR256X, VR128X, |
| 139070 | /* VPSRLDZmbi */ |
| 139071 | VR512, i32mem, u8imm, |
| 139072 | /* VPSRLDZmbik */ |
| 139073 | VR512, VR512, VK16WM, i32mem, u8imm, |
| 139074 | /* VPSRLDZmbikz */ |
| 139075 | VR512, VK16WM, i32mem, u8imm, |
| 139076 | /* VPSRLDZmi */ |
| 139077 | VR512, i512mem, u8imm, |
| 139078 | /* VPSRLDZmik */ |
| 139079 | VR512, VR512, VK16WM, i512mem, u8imm, |
| 139080 | /* VPSRLDZmikz */ |
| 139081 | VR512, VK16WM, i512mem, u8imm, |
| 139082 | /* VPSRLDZri */ |
| 139083 | VR512, VR512, u8imm, |
| 139084 | /* VPSRLDZrik */ |
| 139085 | VR512, VR512, VK16WM, VR512, u8imm, |
| 139086 | /* VPSRLDZrikz */ |
| 139087 | VR512, VK16WM, VR512, u8imm, |
| 139088 | /* VPSRLDZrm */ |
| 139089 | VR512, VR512, i128mem, |
| 139090 | /* VPSRLDZrmk */ |
| 139091 | VR512, VR512, VK16WM, VR512, i128mem, |
| 139092 | /* VPSRLDZrmkz */ |
| 139093 | VR512, VK16WM, VR512, i128mem, |
| 139094 | /* VPSRLDZrr */ |
| 139095 | VR512, VR512, VR128X, |
| 139096 | /* VPSRLDZrrk */ |
| 139097 | VR512, VR512, VK16WM, VR512, VR128X, |
| 139098 | /* VPSRLDZrrkz */ |
| 139099 | VR512, VK16WM, VR512, VR128X, |
| 139100 | /* VPSRLDri */ |
| 139101 | VR128, VR128, u8imm, |
| 139102 | /* VPSRLDrm */ |
| 139103 | VR128, VR128, i128mem, |
| 139104 | /* VPSRLDrr */ |
| 139105 | VR128, VR128, VR128, |
| 139106 | /* VPSRLQYri */ |
| 139107 | VR256, VR256, u8imm, |
| 139108 | /* VPSRLQYrm */ |
| 139109 | VR256, VR256, i128mem, |
| 139110 | /* VPSRLQYrr */ |
| 139111 | VR256, VR256, VR128, |
| 139112 | /* VPSRLQZ128mbi */ |
| 139113 | VR128X, i64mem, u8imm, |
| 139114 | /* VPSRLQZ128mbik */ |
| 139115 | VR128X, VR128X, VK2WM, i64mem, u8imm, |
| 139116 | /* VPSRLQZ128mbikz */ |
| 139117 | VR128X, VK2WM, i64mem, u8imm, |
| 139118 | /* VPSRLQZ128mi */ |
| 139119 | VR128X, i128mem, u8imm, |
| 139120 | /* VPSRLQZ128mik */ |
| 139121 | VR128X, VR128X, VK2WM, i128mem, u8imm, |
| 139122 | /* VPSRLQZ128mikz */ |
| 139123 | VR128X, VK2WM, i128mem, u8imm, |
| 139124 | /* VPSRLQZ128ri */ |
| 139125 | VR128X, VR128X, u8imm, |
| 139126 | /* VPSRLQZ128rik */ |
| 139127 | VR128X, VR128X, VK2WM, VR128X, u8imm, |
| 139128 | /* VPSRLQZ128rikz */ |
| 139129 | VR128X, VK2WM, VR128X, u8imm, |
| 139130 | /* VPSRLQZ128rm */ |
| 139131 | VR128X, VR128X, i128mem, |
| 139132 | /* VPSRLQZ128rmk */ |
| 139133 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 139134 | /* VPSRLQZ128rmkz */ |
| 139135 | VR128X, VK2WM, VR128X, i128mem, |
| 139136 | /* VPSRLQZ128rr */ |
| 139137 | VR128X, VR128X, VR128X, |
| 139138 | /* VPSRLQZ128rrk */ |
| 139139 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 139140 | /* VPSRLQZ128rrkz */ |
| 139141 | VR128X, VK2WM, VR128X, VR128X, |
| 139142 | /* VPSRLQZ256mbi */ |
| 139143 | VR256X, i64mem, u8imm, |
| 139144 | /* VPSRLQZ256mbik */ |
| 139145 | VR256X, VR256X, VK4WM, i64mem, u8imm, |
| 139146 | /* VPSRLQZ256mbikz */ |
| 139147 | VR256X, VK4WM, i64mem, u8imm, |
| 139148 | /* VPSRLQZ256mi */ |
| 139149 | VR256X, i256mem, u8imm, |
| 139150 | /* VPSRLQZ256mik */ |
| 139151 | VR256X, VR256X, VK4WM, i256mem, u8imm, |
| 139152 | /* VPSRLQZ256mikz */ |
| 139153 | VR256X, VK4WM, i256mem, u8imm, |
| 139154 | /* VPSRLQZ256ri */ |
| 139155 | VR256X, VR256X, u8imm, |
| 139156 | /* VPSRLQZ256rik */ |
| 139157 | VR256X, VR256X, VK4WM, VR256X, u8imm, |
| 139158 | /* VPSRLQZ256rikz */ |
| 139159 | VR256X, VK4WM, VR256X, u8imm, |
| 139160 | /* VPSRLQZ256rm */ |
| 139161 | VR256X, VR256X, i128mem, |
| 139162 | /* VPSRLQZ256rmk */ |
| 139163 | VR256X, VR256X, VK4WM, VR256X, i128mem, |
| 139164 | /* VPSRLQZ256rmkz */ |
| 139165 | VR256X, VK4WM, VR256X, i128mem, |
| 139166 | /* VPSRLQZ256rr */ |
| 139167 | VR256X, VR256X, VR128X, |
| 139168 | /* VPSRLQZ256rrk */ |
| 139169 | VR256X, VR256X, VK4WM, VR256X, VR128X, |
| 139170 | /* VPSRLQZ256rrkz */ |
| 139171 | VR256X, VK4WM, VR256X, VR128X, |
| 139172 | /* VPSRLQZmbi */ |
| 139173 | VR512, i64mem, u8imm, |
| 139174 | /* VPSRLQZmbik */ |
| 139175 | VR512, VR512, VK8WM, i64mem, u8imm, |
| 139176 | /* VPSRLQZmbikz */ |
| 139177 | VR512, VK8WM, i64mem, u8imm, |
| 139178 | /* VPSRLQZmi */ |
| 139179 | VR512, i512mem, u8imm, |
| 139180 | /* VPSRLQZmik */ |
| 139181 | VR512, VR512, VK8WM, i512mem, u8imm, |
| 139182 | /* VPSRLQZmikz */ |
| 139183 | VR512, VK8WM, i512mem, u8imm, |
| 139184 | /* VPSRLQZri */ |
| 139185 | VR512, VR512, u8imm, |
| 139186 | /* VPSRLQZrik */ |
| 139187 | VR512, VR512, VK8WM, VR512, u8imm, |
| 139188 | /* VPSRLQZrikz */ |
| 139189 | VR512, VK8WM, VR512, u8imm, |
| 139190 | /* VPSRLQZrm */ |
| 139191 | VR512, VR512, i128mem, |
| 139192 | /* VPSRLQZrmk */ |
| 139193 | VR512, VR512, VK8WM, VR512, i128mem, |
| 139194 | /* VPSRLQZrmkz */ |
| 139195 | VR512, VK8WM, VR512, i128mem, |
| 139196 | /* VPSRLQZrr */ |
| 139197 | VR512, VR512, VR128X, |
| 139198 | /* VPSRLQZrrk */ |
| 139199 | VR512, VR512, VK8WM, VR512, VR128X, |
| 139200 | /* VPSRLQZrrkz */ |
| 139201 | VR512, VK8WM, VR512, VR128X, |
| 139202 | /* VPSRLQri */ |
| 139203 | VR128, VR128, u8imm, |
| 139204 | /* VPSRLQrm */ |
| 139205 | VR128, VR128, i128mem, |
| 139206 | /* VPSRLQrr */ |
| 139207 | VR128, VR128, VR128, |
| 139208 | /* VPSRLVDYrm */ |
| 139209 | VR256, VR256, i256mem, |
| 139210 | /* VPSRLVDYrr */ |
| 139211 | VR256, VR256, VR256, |
| 139212 | /* VPSRLVDZ128rm */ |
| 139213 | VR128X, VR128X, i128mem, |
| 139214 | /* VPSRLVDZ128rmb */ |
| 139215 | VR128X, VR128X, i32mem, |
| 139216 | /* VPSRLVDZ128rmbk */ |
| 139217 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 139218 | /* VPSRLVDZ128rmbkz */ |
| 139219 | VR128X, VK4WM, VR128X, i32mem, |
| 139220 | /* VPSRLVDZ128rmk */ |
| 139221 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 139222 | /* VPSRLVDZ128rmkz */ |
| 139223 | VR128X, VK4WM, VR128X, i128mem, |
| 139224 | /* VPSRLVDZ128rr */ |
| 139225 | VR128X, VR128X, VR128X, |
| 139226 | /* VPSRLVDZ128rrk */ |
| 139227 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 139228 | /* VPSRLVDZ128rrkz */ |
| 139229 | VR128X, VK4WM, VR128X, VR128X, |
| 139230 | /* VPSRLVDZ256rm */ |
| 139231 | VR256X, VR256X, i256mem, |
| 139232 | /* VPSRLVDZ256rmb */ |
| 139233 | VR256X, VR256X, i32mem, |
| 139234 | /* VPSRLVDZ256rmbk */ |
| 139235 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 139236 | /* VPSRLVDZ256rmbkz */ |
| 139237 | VR256X, VK8WM, VR256X, i32mem, |
| 139238 | /* VPSRLVDZ256rmk */ |
| 139239 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 139240 | /* VPSRLVDZ256rmkz */ |
| 139241 | VR256X, VK8WM, VR256X, i256mem, |
| 139242 | /* VPSRLVDZ256rr */ |
| 139243 | VR256X, VR256X, VR256X, |
| 139244 | /* VPSRLVDZ256rrk */ |
| 139245 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 139246 | /* VPSRLVDZ256rrkz */ |
| 139247 | VR256X, VK8WM, VR256X, VR256X, |
| 139248 | /* VPSRLVDZrm */ |
| 139249 | VR512, VR512, i512mem, |
| 139250 | /* VPSRLVDZrmb */ |
| 139251 | VR512, VR512, i32mem, |
| 139252 | /* VPSRLVDZrmbk */ |
| 139253 | VR512, VR512, VK16WM, VR512, i32mem, |
| 139254 | /* VPSRLVDZrmbkz */ |
| 139255 | VR512, VK16WM, VR512, i32mem, |
| 139256 | /* VPSRLVDZrmk */ |
| 139257 | VR512, VR512, VK16WM, VR512, i512mem, |
| 139258 | /* VPSRLVDZrmkz */ |
| 139259 | VR512, VK16WM, VR512, i512mem, |
| 139260 | /* VPSRLVDZrr */ |
| 139261 | VR512, VR512, VR512, |
| 139262 | /* VPSRLVDZrrk */ |
| 139263 | VR512, VR512, VK16WM, VR512, VR512, |
| 139264 | /* VPSRLVDZrrkz */ |
| 139265 | VR512, VK16WM, VR512, VR512, |
| 139266 | /* VPSRLVDrm */ |
| 139267 | VR128, VR128, i128mem, |
| 139268 | /* VPSRLVDrr */ |
| 139269 | VR128, VR128, VR128, |
| 139270 | /* VPSRLVQYrm */ |
| 139271 | VR256, VR256, i256mem, |
| 139272 | /* VPSRLVQYrr */ |
| 139273 | VR256, VR256, VR256, |
| 139274 | /* VPSRLVQZ128rm */ |
| 139275 | VR128X, VR128X, i128mem, |
| 139276 | /* VPSRLVQZ128rmb */ |
| 139277 | VR128X, VR128X, i64mem, |
| 139278 | /* VPSRLVQZ128rmbk */ |
| 139279 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 139280 | /* VPSRLVQZ128rmbkz */ |
| 139281 | VR128X, VK2WM, VR128X, i64mem, |
| 139282 | /* VPSRLVQZ128rmk */ |
| 139283 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 139284 | /* VPSRLVQZ128rmkz */ |
| 139285 | VR128X, VK2WM, VR128X, i128mem, |
| 139286 | /* VPSRLVQZ128rr */ |
| 139287 | VR128X, VR128X, VR128X, |
| 139288 | /* VPSRLVQZ128rrk */ |
| 139289 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 139290 | /* VPSRLVQZ128rrkz */ |
| 139291 | VR128X, VK2WM, VR128X, VR128X, |
| 139292 | /* VPSRLVQZ256rm */ |
| 139293 | VR256X, VR256X, i256mem, |
| 139294 | /* VPSRLVQZ256rmb */ |
| 139295 | VR256X, VR256X, i64mem, |
| 139296 | /* VPSRLVQZ256rmbk */ |
| 139297 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 139298 | /* VPSRLVQZ256rmbkz */ |
| 139299 | VR256X, VK4WM, VR256X, i64mem, |
| 139300 | /* VPSRLVQZ256rmk */ |
| 139301 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 139302 | /* VPSRLVQZ256rmkz */ |
| 139303 | VR256X, VK4WM, VR256X, i256mem, |
| 139304 | /* VPSRLVQZ256rr */ |
| 139305 | VR256X, VR256X, VR256X, |
| 139306 | /* VPSRLVQZ256rrk */ |
| 139307 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 139308 | /* VPSRLVQZ256rrkz */ |
| 139309 | VR256X, VK4WM, VR256X, VR256X, |
| 139310 | /* VPSRLVQZrm */ |
| 139311 | VR512, VR512, i512mem, |
| 139312 | /* VPSRLVQZrmb */ |
| 139313 | VR512, VR512, i64mem, |
| 139314 | /* VPSRLVQZrmbk */ |
| 139315 | VR512, VR512, VK8WM, VR512, i64mem, |
| 139316 | /* VPSRLVQZrmbkz */ |
| 139317 | VR512, VK8WM, VR512, i64mem, |
| 139318 | /* VPSRLVQZrmk */ |
| 139319 | VR512, VR512, VK8WM, VR512, i512mem, |
| 139320 | /* VPSRLVQZrmkz */ |
| 139321 | VR512, VK8WM, VR512, i512mem, |
| 139322 | /* VPSRLVQZrr */ |
| 139323 | VR512, VR512, VR512, |
| 139324 | /* VPSRLVQZrrk */ |
| 139325 | VR512, VR512, VK8WM, VR512, VR512, |
| 139326 | /* VPSRLVQZrrkz */ |
| 139327 | VR512, VK8WM, VR512, VR512, |
| 139328 | /* VPSRLVQrm */ |
| 139329 | VR128, VR128, i128mem, |
| 139330 | /* VPSRLVQrr */ |
| 139331 | VR128, VR128, VR128, |
| 139332 | /* VPSRLVWZ128rm */ |
| 139333 | VR128X, VR128X, i128mem, |
| 139334 | /* VPSRLVWZ128rmk */ |
| 139335 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 139336 | /* VPSRLVWZ128rmkz */ |
| 139337 | VR128X, VK8WM, VR128X, i128mem, |
| 139338 | /* VPSRLVWZ128rr */ |
| 139339 | VR128X, VR128X, VR128X, |
| 139340 | /* VPSRLVWZ128rrk */ |
| 139341 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 139342 | /* VPSRLVWZ128rrkz */ |
| 139343 | VR128X, VK8WM, VR128X, VR128X, |
| 139344 | /* VPSRLVWZ256rm */ |
| 139345 | VR256X, VR256X, i256mem, |
| 139346 | /* VPSRLVWZ256rmk */ |
| 139347 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 139348 | /* VPSRLVWZ256rmkz */ |
| 139349 | VR256X, VK16WM, VR256X, i256mem, |
| 139350 | /* VPSRLVWZ256rr */ |
| 139351 | VR256X, VR256X, VR256X, |
| 139352 | /* VPSRLVWZ256rrk */ |
| 139353 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 139354 | /* VPSRLVWZ256rrkz */ |
| 139355 | VR256X, VK16WM, VR256X, VR256X, |
| 139356 | /* VPSRLVWZrm */ |
| 139357 | VR512, VR512, i512mem, |
| 139358 | /* VPSRLVWZrmk */ |
| 139359 | VR512, VR512, VK32WM, VR512, i512mem, |
| 139360 | /* VPSRLVWZrmkz */ |
| 139361 | VR512, VK32WM, VR512, i512mem, |
| 139362 | /* VPSRLVWZrr */ |
| 139363 | VR512, VR512, VR512, |
| 139364 | /* VPSRLVWZrrk */ |
| 139365 | VR512, VR512, VK32WM, VR512, VR512, |
| 139366 | /* VPSRLVWZrrkz */ |
| 139367 | VR512, VK32WM, VR512, VR512, |
| 139368 | /* VPSRLWYri */ |
| 139369 | VR256, VR256, u8imm, |
| 139370 | /* VPSRLWYrm */ |
| 139371 | VR256, VR256, i128mem, |
| 139372 | /* VPSRLWYrr */ |
| 139373 | VR256, VR256, VR128, |
| 139374 | /* VPSRLWZ128mi */ |
| 139375 | VR128X, i128mem, u8imm, |
| 139376 | /* VPSRLWZ128mik */ |
| 139377 | VR128X, VR128X, VK8WM, i128mem, u8imm, |
| 139378 | /* VPSRLWZ128mikz */ |
| 139379 | VR128X, VK8WM, i128mem, u8imm, |
| 139380 | /* VPSRLWZ128ri */ |
| 139381 | VR128X, VR128X, u8imm, |
| 139382 | /* VPSRLWZ128rik */ |
| 139383 | VR128X, VR128X, VK8WM, VR128X, u8imm, |
| 139384 | /* VPSRLWZ128rikz */ |
| 139385 | VR128X, VK8WM, VR128X, u8imm, |
| 139386 | /* VPSRLWZ128rm */ |
| 139387 | VR128X, VR128X, i128mem, |
| 139388 | /* VPSRLWZ128rmk */ |
| 139389 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 139390 | /* VPSRLWZ128rmkz */ |
| 139391 | VR128X, VK8WM, VR128X, i128mem, |
| 139392 | /* VPSRLWZ128rr */ |
| 139393 | VR128X, VR128X, VR128X, |
| 139394 | /* VPSRLWZ128rrk */ |
| 139395 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 139396 | /* VPSRLWZ128rrkz */ |
| 139397 | VR128X, VK8WM, VR128X, VR128X, |
| 139398 | /* VPSRLWZ256mi */ |
| 139399 | VR256X, i256mem, u8imm, |
| 139400 | /* VPSRLWZ256mik */ |
| 139401 | VR256X, VR256X, VK16WM, i256mem, u8imm, |
| 139402 | /* VPSRLWZ256mikz */ |
| 139403 | VR256X, VK16WM, i256mem, u8imm, |
| 139404 | /* VPSRLWZ256ri */ |
| 139405 | VR256X, VR256X, u8imm, |
| 139406 | /* VPSRLWZ256rik */ |
| 139407 | VR256X, VR256X, VK16WM, VR256X, u8imm, |
| 139408 | /* VPSRLWZ256rikz */ |
| 139409 | VR256X, VK16WM, VR256X, u8imm, |
| 139410 | /* VPSRLWZ256rm */ |
| 139411 | VR256X, VR256X, i128mem, |
| 139412 | /* VPSRLWZ256rmk */ |
| 139413 | VR256X, VR256X, VK16WM, VR256X, i128mem, |
| 139414 | /* VPSRLWZ256rmkz */ |
| 139415 | VR256X, VK16WM, VR256X, i128mem, |
| 139416 | /* VPSRLWZ256rr */ |
| 139417 | VR256X, VR256X, VR128X, |
| 139418 | /* VPSRLWZ256rrk */ |
| 139419 | VR256X, VR256X, VK16WM, VR256X, VR128X, |
| 139420 | /* VPSRLWZ256rrkz */ |
| 139421 | VR256X, VK16WM, VR256X, VR128X, |
| 139422 | /* VPSRLWZmi */ |
| 139423 | VR512, i512mem, u8imm, |
| 139424 | /* VPSRLWZmik */ |
| 139425 | VR512, VR512, VK32WM, i512mem, u8imm, |
| 139426 | /* VPSRLWZmikz */ |
| 139427 | VR512, VK32WM, i512mem, u8imm, |
| 139428 | /* VPSRLWZri */ |
| 139429 | VR512, VR512, u8imm, |
| 139430 | /* VPSRLWZrik */ |
| 139431 | VR512, VR512, VK32WM, VR512, u8imm, |
| 139432 | /* VPSRLWZrikz */ |
| 139433 | VR512, VK32WM, VR512, u8imm, |
| 139434 | /* VPSRLWZrm */ |
| 139435 | VR512, VR512, i128mem, |
| 139436 | /* VPSRLWZrmk */ |
| 139437 | VR512, VR512, VK32WM, VR512, i128mem, |
| 139438 | /* VPSRLWZrmkz */ |
| 139439 | VR512, VK32WM, VR512, i128mem, |
| 139440 | /* VPSRLWZrr */ |
| 139441 | VR512, VR512, VR128X, |
| 139442 | /* VPSRLWZrrk */ |
| 139443 | VR512, VR512, VK32WM, VR512, VR128X, |
| 139444 | /* VPSRLWZrrkz */ |
| 139445 | VR512, VK32WM, VR512, VR128X, |
| 139446 | /* VPSRLWri */ |
| 139447 | VR128, VR128, u8imm, |
| 139448 | /* VPSRLWrm */ |
| 139449 | VR128, VR128, i128mem, |
| 139450 | /* VPSRLWrr */ |
| 139451 | VR128, VR128, VR128, |
| 139452 | /* VPSUBBYrm */ |
| 139453 | VR256, VR256, i256mem, |
| 139454 | /* VPSUBBYrr */ |
| 139455 | VR256, VR256, VR256, |
| 139456 | /* VPSUBBZ128rm */ |
| 139457 | VR128X, VR128X, i128mem, |
| 139458 | /* VPSUBBZ128rmk */ |
| 139459 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 139460 | /* VPSUBBZ128rmkz */ |
| 139461 | VR128X, VK16WM, VR128X, i128mem, |
| 139462 | /* VPSUBBZ128rr */ |
| 139463 | VR128X, VR128X, VR128X, |
| 139464 | /* VPSUBBZ128rrk */ |
| 139465 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 139466 | /* VPSUBBZ128rrkz */ |
| 139467 | VR128X, VK16WM, VR128X, VR128X, |
| 139468 | /* VPSUBBZ256rm */ |
| 139469 | VR256X, VR256X, i256mem, |
| 139470 | /* VPSUBBZ256rmk */ |
| 139471 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 139472 | /* VPSUBBZ256rmkz */ |
| 139473 | VR256X, VK32WM, VR256X, i256mem, |
| 139474 | /* VPSUBBZ256rr */ |
| 139475 | VR256X, VR256X, VR256X, |
| 139476 | /* VPSUBBZ256rrk */ |
| 139477 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 139478 | /* VPSUBBZ256rrkz */ |
| 139479 | VR256X, VK32WM, VR256X, VR256X, |
| 139480 | /* VPSUBBZrm */ |
| 139481 | VR512, VR512, i512mem, |
| 139482 | /* VPSUBBZrmk */ |
| 139483 | VR512, VR512, VK64WM, VR512, i512mem, |
| 139484 | /* VPSUBBZrmkz */ |
| 139485 | VR512, VK64WM, VR512, i512mem, |
| 139486 | /* VPSUBBZrr */ |
| 139487 | VR512, VR512, VR512, |
| 139488 | /* VPSUBBZrrk */ |
| 139489 | VR512, VR512, VK64WM, VR512, VR512, |
| 139490 | /* VPSUBBZrrkz */ |
| 139491 | VR512, VK64WM, VR512, VR512, |
| 139492 | /* VPSUBBrm */ |
| 139493 | VR128, VR128, i128mem, |
| 139494 | /* VPSUBBrr */ |
| 139495 | VR128, VR128, VR128, |
| 139496 | /* VPSUBDYrm */ |
| 139497 | VR256, VR256, i256mem, |
| 139498 | /* VPSUBDYrr */ |
| 139499 | VR256, VR256, VR256, |
| 139500 | /* VPSUBDZ128rm */ |
| 139501 | VR128X, VR128X, i128mem, |
| 139502 | /* VPSUBDZ128rmb */ |
| 139503 | VR128X, VR128X, i32mem, |
| 139504 | /* VPSUBDZ128rmbk */ |
| 139505 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 139506 | /* VPSUBDZ128rmbkz */ |
| 139507 | VR128X, VK4WM, VR128X, i32mem, |
| 139508 | /* VPSUBDZ128rmk */ |
| 139509 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 139510 | /* VPSUBDZ128rmkz */ |
| 139511 | VR128X, VK4WM, VR128X, i128mem, |
| 139512 | /* VPSUBDZ128rr */ |
| 139513 | VR128X, VR128X, VR128X, |
| 139514 | /* VPSUBDZ128rrk */ |
| 139515 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 139516 | /* VPSUBDZ128rrkz */ |
| 139517 | VR128X, VK4WM, VR128X, VR128X, |
| 139518 | /* VPSUBDZ256rm */ |
| 139519 | VR256X, VR256X, i256mem, |
| 139520 | /* VPSUBDZ256rmb */ |
| 139521 | VR256X, VR256X, i32mem, |
| 139522 | /* VPSUBDZ256rmbk */ |
| 139523 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 139524 | /* VPSUBDZ256rmbkz */ |
| 139525 | VR256X, VK8WM, VR256X, i32mem, |
| 139526 | /* VPSUBDZ256rmk */ |
| 139527 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 139528 | /* VPSUBDZ256rmkz */ |
| 139529 | VR256X, VK8WM, VR256X, i256mem, |
| 139530 | /* VPSUBDZ256rr */ |
| 139531 | VR256X, VR256X, VR256X, |
| 139532 | /* VPSUBDZ256rrk */ |
| 139533 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 139534 | /* VPSUBDZ256rrkz */ |
| 139535 | VR256X, VK8WM, VR256X, VR256X, |
| 139536 | /* VPSUBDZrm */ |
| 139537 | VR512, VR512, i512mem, |
| 139538 | /* VPSUBDZrmb */ |
| 139539 | VR512, VR512, i32mem, |
| 139540 | /* VPSUBDZrmbk */ |
| 139541 | VR512, VR512, VK16WM, VR512, i32mem, |
| 139542 | /* VPSUBDZrmbkz */ |
| 139543 | VR512, VK16WM, VR512, i32mem, |
| 139544 | /* VPSUBDZrmk */ |
| 139545 | VR512, VR512, VK16WM, VR512, i512mem, |
| 139546 | /* VPSUBDZrmkz */ |
| 139547 | VR512, VK16WM, VR512, i512mem, |
| 139548 | /* VPSUBDZrr */ |
| 139549 | VR512, VR512, VR512, |
| 139550 | /* VPSUBDZrrk */ |
| 139551 | VR512, VR512, VK16WM, VR512, VR512, |
| 139552 | /* VPSUBDZrrkz */ |
| 139553 | VR512, VK16WM, VR512, VR512, |
| 139554 | /* VPSUBDrm */ |
| 139555 | VR128, VR128, i128mem, |
| 139556 | /* VPSUBDrr */ |
| 139557 | VR128, VR128, VR128, |
| 139558 | /* VPSUBQYrm */ |
| 139559 | VR256, VR256, i256mem, |
| 139560 | /* VPSUBQYrr */ |
| 139561 | VR256, VR256, VR256, |
| 139562 | /* VPSUBQZ128rm */ |
| 139563 | VR128X, VR128X, i128mem, |
| 139564 | /* VPSUBQZ128rmb */ |
| 139565 | VR128X, VR128X, i64mem, |
| 139566 | /* VPSUBQZ128rmbk */ |
| 139567 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 139568 | /* VPSUBQZ128rmbkz */ |
| 139569 | VR128X, VK2WM, VR128X, i64mem, |
| 139570 | /* VPSUBQZ128rmk */ |
| 139571 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 139572 | /* VPSUBQZ128rmkz */ |
| 139573 | VR128X, VK2WM, VR128X, i128mem, |
| 139574 | /* VPSUBQZ128rr */ |
| 139575 | VR128X, VR128X, VR128X, |
| 139576 | /* VPSUBQZ128rrk */ |
| 139577 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 139578 | /* VPSUBQZ128rrkz */ |
| 139579 | VR128X, VK2WM, VR128X, VR128X, |
| 139580 | /* VPSUBQZ256rm */ |
| 139581 | VR256X, VR256X, i256mem, |
| 139582 | /* VPSUBQZ256rmb */ |
| 139583 | VR256X, VR256X, i64mem, |
| 139584 | /* VPSUBQZ256rmbk */ |
| 139585 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 139586 | /* VPSUBQZ256rmbkz */ |
| 139587 | VR256X, VK4WM, VR256X, i64mem, |
| 139588 | /* VPSUBQZ256rmk */ |
| 139589 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 139590 | /* VPSUBQZ256rmkz */ |
| 139591 | VR256X, VK4WM, VR256X, i256mem, |
| 139592 | /* VPSUBQZ256rr */ |
| 139593 | VR256X, VR256X, VR256X, |
| 139594 | /* VPSUBQZ256rrk */ |
| 139595 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 139596 | /* VPSUBQZ256rrkz */ |
| 139597 | VR256X, VK4WM, VR256X, VR256X, |
| 139598 | /* VPSUBQZrm */ |
| 139599 | VR512, VR512, i512mem, |
| 139600 | /* VPSUBQZrmb */ |
| 139601 | VR512, VR512, i64mem, |
| 139602 | /* VPSUBQZrmbk */ |
| 139603 | VR512, VR512, VK8WM, VR512, i64mem, |
| 139604 | /* VPSUBQZrmbkz */ |
| 139605 | VR512, VK8WM, VR512, i64mem, |
| 139606 | /* VPSUBQZrmk */ |
| 139607 | VR512, VR512, VK8WM, VR512, i512mem, |
| 139608 | /* VPSUBQZrmkz */ |
| 139609 | VR512, VK8WM, VR512, i512mem, |
| 139610 | /* VPSUBQZrr */ |
| 139611 | VR512, VR512, VR512, |
| 139612 | /* VPSUBQZrrk */ |
| 139613 | VR512, VR512, VK8WM, VR512, VR512, |
| 139614 | /* VPSUBQZrrkz */ |
| 139615 | VR512, VK8WM, VR512, VR512, |
| 139616 | /* VPSUBQrm */ |
| 139617 | VR128, VR128, i128mem, |
| 139618 | /* VPSUBQrr */ |
| 139619 | VR128, VR128, VR128, |
| 139620 | /* VPSUBSBYrm */ |
| 139621 | VR256, VR256, i256mem, |
| 139622 | /* VPSUBSBYrr */ |
| 139623 | VR256, VR256, VR256, |
| 139624 | /* VPSUBSBZ128rm */ |
| 139625 | VR128X, VR128X, i128mem, |
| 139626 | /* VPSUBSBZ128rmk */ |
| 139627 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 139628 | /* VPSUBSBZ128rmkz */ |
| 139629 | VR128X, VK16WM, VR128X, i128mem, |
| 139630 | /* VPSUBSBZ128rr */ |
| 139631 | VR128X, VR128X, VR128X, |
| 139632 | /* VPSUBSBZ128rrk */ |
| 139633 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 139634 | /* VPSUBSBZ128rrkz */ |
| 139635 | VR128X, VK16WM, VR128X, VR128X, |
| 139636 | /* VPSUBSBZ256rm */ |
| 139637 | VR256X, VR256X, i256mem, |
| 139638 | /* VPSUBSBZ256rmk */ |
| 139639 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 139640 | /* VPSUBSBZ256rmkz */ |
| 139641 | VR256X, VK32WM, VR256X, i256mem, |
| 139642 | /* VPSUBSBZ256rr */ |
| 139643 | VR256X, VR256X, VR256X, |
| 139644 | /* VPSUBSBZ256rrk */ |
| 139645 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 139646 | /* VPSUBSBZ256rrkz */ |
| 139647 | VR256X, VK32WM, VR256X, VR256X, |
| 139648 | /* VPSUBSBZrm */ |
| 139649 | VR512, VR512, i512mem, |
| 139650 | /* VPSUBSBZrmk */ |
| 139651 | VR512, VR512, VK64WM, VR512, i512mem, |
| 139652 | /* VPSUBSBZrmkz */ |
| 139653 | VR512, VK64WM, VR512, i512mem, |
| 139654 | /* VPSUBSBZrr */ |
| 139655 | VR512, VR512, VR512, |
| 139656 | /* VPSUBSBZrrk */ |
| 139657 | VR512, VR512, VK64WM, VR512, VR512, |
| 139658 | /* VPSUBSBZrrkz */ |
| 139659 | VR512, VK64WM, VR512, VR512, |
| 139660 | /* VPSUBSBrm */ |
| 139661 | VR128, VR128, i128mem, |
| 139662 | /* VPSUBSBrr */ |
| 139663 | VR128, VR128, VR128, |
| 139664 | /* VPSUBSWYrm */ |
| 139665 | VR256, VR256, i256mem, |
| 139666 | /* VPSUBSWYrr */ |
| 139667 | VR256, VR256, VR256, |
| 139668 | /* VPSUBSWZ128rm */ |
| 139669 | VR128X, VR128X, i128mem, |
| 139670 | /* VPSUBSWZ128rmk */ |
| 139671 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 139672 | /* VPSUBSWZ128rmkz */ |
| 139673 | VR128X, VK8WM, VR128X, i128mem, |
| 139674 | /* VPSUBSWZ128rr */ |
| 139675 | VR128X, VR128X, VR128X, |
| 139676 | /* VPSUBSWZ128rrk */ |
| 139677 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 139678 | /* VPSUBSWZ128rrkz */ |
| 139679 | VR128X, VK8WM, VR128X, VR128X, |
| 139680 | /* VPSUBSWZ256rm */ |
| 139681 | VR256X, VR256X, i256mem, |
| 139682 | /* VPSUBSWZ256rmk */ |
| 139683 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 139684 | /* VPSUBSWZ256rmkz */ |
| 139685 | VR256X, VK16WM, VR256X, i256mem, |
| 139686 | /* VPSUBSWZ256rr */ |
| 139687 | VR256X, VR256X, VR256X, |
| 139688 | /* VPSUBSWZ256rrk */ |
| 139689 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 139690 | /* VPSUBSWZ256rrkz */ |
| 139691 | VR256X, VK16WM, VR256X, VR256X, |
| 139692 | /* VPSUBSWZrm */ |
| 139693 | VR512, VR512, i512mem, |
| 139694 | /* VPSUBSWZrmk */ |
| 139695 | VR512, VR512, VK32WM, VR512, i512mem, |
| 139696 | /* VPSUBSWZrmkz */ |
| 139697 | VR512, VK32WM, VR512, i512mem, |
| 139698 | /* VPSUBSWZrr */ |
| 139699 | VR512, VR512, VR512, |
| 139700 | /* VPSUBSWZrrk */ |
| 139701 | VR512, VR512, VK32WM, VR512, VR512, |
| 139702 | /* VPSUBSWZrrkz */ |
| 139703 | VR512, VK32WM, VR512, VR512, |
| 139704 | /* VPSUBSWrm */ |
| 139705 | VR128, VR128, i128mem, |
| 139706 | /* VPSUBSWrr */ |
| 139707 | VR128, VR128, VR128, |
| 139708 | /* VPSUBUSBYrm */ |
| 139709 | VR256, VR256, i256mem, |
| 139710 | /* VPSUBUSBYrr */ |
| 139711 | VR256, VR256, VR256, |
| 139712 | /* VPSUBUSBZ128rm */ |
| 139713 | VR128X, VR128X, i128mem, |
| 139714 | /* VPSUBUSBZ128rmk */ |
| 139715 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 139716 | /* VPSUBUSBZ128rmkz */ |
| 139717 | VR128X, VK16WM, VR128X, i128mem, |
| 139718 | /* VPSUBUSBZ128rr */ |
| 139719 | VR128X, VR128X, VR128X, |
| 139720 | /* VPSUBUSBZ128rrk */ |
| 139721 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 139722 | /* VPSUBUSBZ128rrkz */ |
| 139723 | VR128X, VK16WM, VR128X, VR128X, |
| 139724 | /* VPSUBUSBZ256rm */ |
| 139725 | VR256X, VR256X, i256mem, |
| 139726 | /* VPSUBUSBZ256rmk */ |
| 139727 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 139728 | /* VPSUBUSBZ256rmkz */ |
| 139729 | VR256X, VK32WM, VR256X, i256mem, |
| 139730 | /* VPSUBUSBZ256rr */ |
| 139731 | VR256X, VR256X, VR256X, |
| 139732 | /* VPSUBUSBZ256rrk */ |
| 139733 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 139734 | /* VPSUBUSBZ256rrkz */ |
| 139735 | VR256X, VK32WM, VR256X, VR256X, |
| 139736 | /* VPSUBUSBZrm */ |
| 139737 | VR512, VR512, i512mem, |
| 139738 | /* VPSUBUSBZrmk */ |
| 139739 | VR512, VR512, VK64WM, VR512, i512mem, |
| 139740 | /* VPSUBUSBZrmkz */ |
| 139741 | VR512, VK64WM, VR512, i512mem, |
| 139742 | /* VPSUBUSBZrr */ |
| 139743 | VR512, VR512, VR512, |
| 139744 | /* VPSUBUSBZrrk */ |
| 139745 | VR512, VR512, VK64WM, VR512, VR512, |
| 139746 | /* VPSUBUSBZrrkz */ |
| 139747 | VR512, VK64WM, VR512, VR512, |
| 139748 | /* VPSUBUSBrm */ |
| 139749 | VR128, VR128, i128mem, |
| 139750 | /* VPSUBUSBrr */ |
| 139751 | VR128, VR128, VR128, |
| 139752 | /* VPSUBUSWYrm */ |
| 139753 | VR256, VR256, i256mem, |
| 139754 | /* VPSUBUSWYrr */ |
| 139755 | VR256, VR256, VR256, |
| 139756 | /* VPSUBUSWZ128rm */ |
| 139757 | VR128X, VR128X, i128mem, |
| 139758 | /* VPSUBUSWZ128rmk */ |
| 139759 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 139760 | /* VPSUBUSWZ128rmkz */ |
| 139761 | VR128X, VK8WM, VR128X, i128mem, |
| 139762 | /* VPSUBUSWZ128rr */ |
| 139763 | VR128X, VR128X, VR128X, |
| 139764 | /* VPSUBUSWZ128rrk */ |
| 139765 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 139766 | /* VPSUBUSWZ128rrkz */ |
| 139767 | VR128X, VK8WM, VR128X, VR128X, |
| 139768 | /* VPSUBUSWZ256rm */ |
| 139769 | VR256X, VR256X, i256mem, |
| 139770 | /* VPSUBUSWZ256rmk */ |
| 139771 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 139772 | /* VPSUBUSWZ256rmkz */ |
| 139773 | VR256X, VK16WM, VR256X, i256mem, |
| 139774 | /* VPSUBUSWZ256rr */ |
| 139775 | VR256X, VR256X, VR256X, |
| 139776 | /* VPSUBUSWZ256rrk */ |
| 139777 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 139778 | /* VPSUBUSWZ256rrkz */ |
| 139779 | VR256X, VK16WM, VR256X, VR256X, |
| 139780 | /* VPSUBUSWZrm */ |
| 139781 | VR512, VR512, i512mem, |
| 139782 | /* VPSUBUSWZrmk */ |
| 139783 | VR512, VR512, VK32WM, VR512, i512mem, |
| 139784 | /* VPSUBUSWZrmkz */ |
| 139785 | VR512, VK32WM, VR512, i512mem, |
| 139786 | /* VPSUBUSWZrr */ |
| 139787 | VR512, VR512, VR512, |
| 139788 | /* VPSUBUSWZrrk */ |
| 139789 | VR512, VR512, VK32WM, VR512, VR512, |
| 139790 | /* VPSUBUSWZrrkz */ |
| 139791 | VR512, VK32WM, VR512, VR512, |
| 139792 | /* VPSUBUSWrm */ |
| 139793 | VR128, VR128, i128mem, |
| 139794 | /* VPSUBUSWrr */ |
| 139795 | VR128, VR128, VR128, |
| 139796 | /* VPSUBWYrm */ |
| 139797 | VR256, VR256, i256mem, |
| 139798 | /* VPSUBWYrr */ |
| 139799 | VR256, VR256, VR256, |
| 139800 | /* VPSUBWZ128rm */ |
| 139801 | VR128X, VR128X, i128mem, |
| 139802 | /* VPSUBWZ128rmk */ |
| 139803 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 139804 | /* VPSUBWZ128rmkz */ |
| 139805 | VR128X, VK8WM, VR128X, i128mem, |
| 139806 | /* VPSUBWZ128rr */ |
| 139807 | VR128X, VR128X, VR128X, |
| 139808 | /* VPSUBWZ128rrk */ |
| 139809 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 139810 | /* VPSUBWZ128rrkz */ |
| 139811 | VR128X, VK8WM, VR128X, VR128X, |
| 139812 | /* VPSUBWZ256rm */ |
| 139813 | VR256X, VR256X, i256mem, |
| 139814 | /* VPSUBWZ256rmk */ |
| 139815 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 139816 | /* VPSUBWZ256rmkz */ |
| 139817 | VR256X, VK16WM, VR256X, i256mem, |
| 139818 | /* VPSUBWZ256rr */ |
| 139819 | VR256X, VR256X, VR256X, |
| 139820 | /* VPSUBWZ256rrk */ |
| 139821 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 139822 | /* VPSUBWZ256rrkz */ |
| 139823 | VR256X, VK16WM, VR256X, VR256X, |
| 139824 | /* VPSUBWZrm */ |
| 139825 | VR512, VR512, i512mem, |
| 139826 | /* VPSUBWZrmk */ |
| 139827 | VR512, VR512, VK32WM, VR512, i512mem, |
| 139828 | /* VPSUBWZrmkz */ |
| 139829 | VR512, VK32WM, VR512, i512mem, |
| 139830 | /* VPSUBWZrr */ |
| 139831 | VR512, VR512, VR512, |
| 139832 | /* VPSUBWZrrk */ |
| 139833 | VR512, VR512, VK32WM, VR512, VR512, |
| 139834 | /* VPSUBWZrrkz */ |
| 139835 | VR512, VK32WM, VR512, VR512, |
| 139836 | /* VPSUBWrm */ |
| 139837 | VR128, VR128, i128mem, |
| 139838 | /* VPSUBWrr */ |
| 139839 | VR128, VR128, VR128, |
| 139840 | /* VPTERNLOGDZ128rmbi */ |
| 139841 | VR128X, VR128X, VR128X, i32mem, u8imm, |
| 139842 | /* VPTERNLOGDZ128rmbik */ |
| 139843 | VR128X, VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 139844 | /* VPTERNLOGDZ128rmbikz */ |
| 139845 | VR128X, VR128X, VK4WM, VR128X, i32mem, u8imm, |
| 139846 | /* VPTERNLOGDZ128rmi */ |
| 139847 | VR128X, VR128X, VR128X, i128mem, u8imm, |
| 139848 | /* VPTERNLOGDZ128rmik */ |
| 139849 | VR128X, VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 139850 | /* VPTERNLOGDZ128rmikz */ |
| 139851 | VR128X, VR128X, VK4WM, VR128X, i128mem, u8imm, |
| 139852 | /* VPTERNLOGDZ128rri */ |
| 139853 | VR128X, VR128X, VR128X, VR128X, u8imm, |
| 139854 | /* VPTERNLOGDZ128rrik */ |
| 139855 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 139856 | /* VPTERNLOGDZ128rrikz */ |
| 139857 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 139858 | /* VPTERNLOGDZ256rmbi */ |
| 139859 | VR256X, VR256X, VR256X, i32mem, u8imm, |
| 139860 | /* VPTERNLOGDZ256rmbik */ |
| 139861 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 139862 | /* VPTERNLOGDZ256rmbikz */ |
| 139863 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 139864 | /* VPTERNLOGDZ256rmi */ |
| 139865 | VR256X, VR256X, VR256X, i256mem, u8imm, |
| 139866 | /* VPTERNLOGDZ256rmik */ |
| 139867 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 139868 | /* VPTERNLOGDZ256rmikz */ |
| 139869 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 139870 | /* VPTERNLOGDZ256rri */ |
| 139871 | VR256X, VR256X, VR256X, VR256X, u8imm, |
| 139872 | /* VPTERNLOGDZ256rrik */ |
| 139873 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 139874 | /* VPTERNLOGDZ256rrikz */ |
| 139875 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 139876 | /* VPTERNLOGDZrmbi */ |
| 139877 | VR512, VR512, VR512, i32mem, u8imm, |
| 139878 | /* VPTERNLOGDZrmbik */ |
| 139879 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 139880 | /* VPTERNLOGDZrmbikz */ |
| 139881 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 139882 | /* VPTERNLOGDZrmi */ |
| 139883 | VR512, VR512, VR512, i512mem, u8imm, |
| 139884 | /* VPTERNLOGDZrmik */ |
| 139885 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 139886 | /* VPTERNLOGDZrmikz */ |
| 139887 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 139888 | /* VPTERNLOGDZrri */ |
| 139889 | VR512, VR512, VR512, VR512, u8imm, |
| 139890 | /* VPTERNLOGDZrrik */ |
| 139891 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 139892 | /* VPTERNLOGDZrrikz */ |
| 139893 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 139894 | /* VPTERNLOGQZ128rmbi */ |
| 139895 | VR128X, VR128X, VR128X, i64mem, u8imm, |
| 139896 | /* VPTERNLOGQZ128rmbik */ |
| 139897 | VR128X, VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 139898 | /* VPTERNLOGQZ128rmbikz */ |
| 139899 | VR128X, VR128X, VK2WM, VR128X, i64mem, u8imm, |
| 139900 | /* VPTERNLOGQZ128rmi */ |
| 139901 | VR128X, VR128X, VR128X, i128mem, u8imm, |
| 139902 | /* VPTERNLOGQZ128rmik */ |
| 139903 | VR128X, VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 139904 | /* VPTERNLOGQZ128rmikz */ |
| 139905 | VR128X, VR128X, VK2WM, VR128X, i128mem, u8imm, |
| 139906 | /* VPTERNLOGQZ128rri */ |
| 139907 | VR128X, VR128X, VR128X, VR128X, u8imm, |
| 139908 | /* VPTERNLOGQZ128rrik */ |
| 139909 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 139910 | /* VPTERNLOGQZ128rrikz */ |
| 139911 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 139912 | /* VPTERNLOGQZ256rmbi */ |
| 139913 | VR256X, VR256X, VR256X, i64mem, u8imm, |
| 139914 | /* VPTERNLOGQZ256rmbik */ |
| 139915 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 139916 | /* VPTERNLOGQZ256rmbikz */ |
| 139917 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 139918 | /* VPTERNLOGQZ256rmi */ |
| 139919 | VR256X, VR256X, VR256X, i256mem, u8imm, |
| 139920 | /* VPTERNLOGQZ256rmik */ |
| 139921 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 139922 | /* VPTERNLOGQZ256rmikz */ |
| 139923 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 139924 | /* VPTERNLOGQZ256rri */ |
| 139925 | VR256X, VR256X, VR256X, VR256X, u8imm, |
| 139926 | /* VPTERNLOGQZ256rrik */ |
| 139927 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 139928 | /* VPTERNLOGQZ256rrikz */ |
| 139929 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 139930 | /* VPTERNLOGQZrmbi */ |
| 139931 | VR512, VR512, VR512, i64mem, u8imm, |
| 139932 | /* VPTERNLOGQZrmbik */ |
| 139933 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 139934 | /* VPTERNLOGQZrmbikz */ |
| 139935 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 139936 | /* VPTERNLOGQZrmi */ |
| 139937 | VR512, VR512, VR512, i512mem, u8imm, |
| 139938 | /* VPTERNLOGQZrmik */ |
| 139939 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 139940 | /* VPTERNLOGQZrmikz */ |
| 139941 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 139942 | /* VPTERNLOGQZrri */ |
| 139943 | VR512, VR512, VR512, VR512, u8imm, |
| 139944 | /* VPTERNLOGQZrrik */ |
| 139945 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 139946 | /* VPTERNLOGQZrrikz */ |
| 139947 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 139948 | /* VPTESTMBZ128rm */ |
| 139949 | VK16, VR128X, i128mem, |
| 139950 | /* VPTESTMBZ128rmk */ |
| 139951 | VK16, VK16WM, VR128X, i128mem, |
| 139952 | /* VPTESTMBZ128rr */ |
| 139953 | VK16, VR128X, VR128X, |
| 139954 | /* VPTESTMBZ128rrk */ |
| 139955 | VK16, VK16WM, VR128X, VR128X, |
| 139956 | /* VPTESTMBZ256rm */ |
| 139957 | VK32, VR256X, i256mem, |
| 139958 | /* VPTESTMBZ256rmk */ |
| 139959 | VK32, VK32WM, VR256X, i256mem, |
| 139960 | /* VPTESTMBZ256rr */ |
| 139961 | VK32, VR256X, VR256X, |
| 139962 | /* VPTESTMBZ256rrk */ |
| 139963 | VK32, VK32WM, VR256X, VR256X, |
| 139964 | /* VPTESTMBZrm */ |
| 139965 | VK64, VR512, i512mem, |
| 139966 | /* VPTESTMBZrmk */ |
| 139967 | VK64, VK64WM, VR512, i512mem, |
| 139968 | /* VPTESTMBZrr */ |
| 139969 | VK64, VR512, VR512, |
| 139970 | /* VPTESTMBZrrk */ |
| 139971 | VK64, VK64WM, VR512, VR512, |
| 139972 | /* VPTESTMDZ128rm */ |
| 139973 | VK4, VR128X, i128mem, |
| 139974 | /* VPTESTMDZ128rmb */ |
| 139975 | VK4, VR128X, i32mem, |
| 139976 | /* VPTESTMDZ128rmbk */ |
| 139977 | VK4, VK4WM, VR128X, i32mem, |
| 139978 | /* VPTESTMDZ128rmk */ |
| 139979 | VK4, VK4WM, VR128X, i128mem, |
| 139980 | /* VPTESTMDZ128rr */ |
| 139981 | VK4, VR128X, VR128X, |
| 139982 | /* VPTESTMDZ128rrk */ |
| 139983 | VK4, VK4WM, VR128X, VR128X, |
| 139984 | /* VPTESTMDZ256rm */ |
| 139985 | VK8, VR256X, i256mem, |
| 139986 | /* VPTESTMDZ256rmb */ |
| 139987 | VK8, VR256X, i32mem, |
| 139988 | /* VPTESTMDZ256rmbk */ |
| 139989 | VK8, VK8WM, VR256X, i32mem, |
| 139990 | /* VPTESTMDZ256rmk */ |
| 139991 | VK8, VK8WM, VR256X, i256mem, |
| 139992 | /* VPTESTMDZ256rr */ |
| 139993 | VK8, VR256X, VR256X, |
| 139994 | /* VPTESTMDZ256rrk */ |
| 139995 | VK8, VK8WM, VR256X, VR256X, |
| 139996 | /* VPTESTMDZrm */ |
| 139997 | VK16, VR512, i512mem, |
| 139998 | /* VPTESTMDZrmb */ |
| 139999 | VK16, VR512, i32mem, |
| 140000 | /* VPTESTMDZrmbk */ |
| 140001 | VK16, VK16WM, VR512, i32mem, |
| 140002 | /* VPTESTMDZrmk */ |
| 140003 | VK16, VK16WM, VR512, i512mem, |
| 140004 | /* VPTESTMDZrr */ |
| 140005 | VK16, VR512, VR512, |
| 140006 | /* VPTESTMDZrrk */ |
| 140007 | VK16, VK16WM, VR512, VR512, |
| 140008 | /* VPTESTMQZ128rm */ |
| 140009 | VK2, VR128X, i128mem, |
| 140010 | /* VPTESTMQZ128rmb */ |
| 140011 | VK2, VR128X, i64mem, |
| 140012 | /* VPTESTMQZ128rmbk */ |
| 140013 | VK2, VK2WM, VR128X, i64mem, |
| 140014 | /* VPTESTMQZ128rmk */ |
| 140015 | VK2, VK2WM, VR128X, i128mem, |
| 140016 | /* VPTESTMQZ128rr */ |
| 140017 | VK2, VR128X, VR128X, |
| 140018 | /* VPTESTMQZ128rrk */ |
| 140019 | VK2, VK2WM, VR128X, VR128X, |
| 140020 | /* VPTESTMQZ256rm */ |
| 140021 | VK4, VR256X, i256mem, |
| 140022 | /* VPTESTMQZ256rmb */ |
| 140023 | VK4, VR256X, i64mem, |
| 140024 | /* VPTESTMQZ256rmbk */ |
| 140025 | VK4, VK4WM, VR256X, i64mem, |
| 140026 | /* VPTESTMQZ256rmk */ |
| 140027 | VK4, VK4WM, VR256X, i256mem, |
| 140028 | /* VPTESTMQZ256rr */ |
| 140029 | VK4, VR256X, VR256X, |
| 140030 | /* VPTESTMQZ256rrk */ |
| 140031 | VK4, VK4WM, VR256X, VR256X, |
| 140032 | /* VPTESTMQZrm */ |
| 140033 | VK8, VR512, i512mem, |
| 140034 | /* VPTESTMQZrmb */ |
| 140035 | VK8, VR512, i64mem, |
| 140036 | /* VPTESTMQZrmbk */ |
| 140037 | VK8, VK8WM, VR512, i64mem, |
| 140038 | /* VPTESTMQZrmk */ |
| 140039 | VK8, VK8WM, VR512, i512mem, |
| 140040 | /* VPTESTMQZrr */ |
| 140041 | VK8, VR512, VR512, |
| 140042 | /* VPTESTMQZrrk */ |
| 140043 | VK8, VK8WM, VR512, VR512, |
| 140044 | /* VPTESTMWZ128rm */ |
| 140045 | VK8, VR128X, i128mem, |
| 140046 | /* VPTESTMWZ128rmk */ |
| 140047 | VK8, VK8WM, VR128X, i128mem, |
| 140048 | /* VPTESTMWZ128rr */ |
| 140049 | VK8, VR128X, VR128X, |
| 140050 | /* VPTESTMWZ128rrk */ |
| 140051 | VK8, VK8WM, VR128X, VR128X, |
| 140052 | /* VPTESTMWZ256rm */ |
| 140053 | VK16, VR256X, i256mem, |
| 140054 | /* VPTESTMWZ256rmk */ |
| 140055 | VK16, VK16WM, VR256X, i256mem, |
| 140056 | /* VPTESTMWZ256rr */ |
| 140057 | VK16, VR256X, VR256X, |
| 140058 | /* VPTESTMWZ256rrk */ |
| 140059 | VK16, VK16WM, VR256X, VR256X, |
| 140060 | /* VPTESTMWZrm */ |
| 140061 | VK32, VR512, i512mem, |
| 140062 | /* VPTESTMWZrmk */ |
| 140063 | VK32, VK32WM, VR512, i512mem, |
| 140064 | /* VPTESTMWZrr */ |
| 140065 | VK32, VR512, VR512, |
| 140066 | /* VPTESTMWZrrk */ |
| 140067 | VK32, VK32WM, VR512, VR512, |
| 140068 | /* VPTESTNMBZ128rm */ |
| 140069 | VK16, VR128X, i128mem, |
| 140070 | /* VPTESTNMBZ128rmk */ |
| 140071 | VK16, VK16WM, VR128X, i128mem, |
| 140072 | /* VPTESTNMBZ128rr */ |
| 140073 | VK16, VR128X, VR128X, |
| 140074 | /* VPTESTNMBZ128rrk */ |
| 140075 | VK16, VK16WM, VR128X, VR128X, |
| 140076 | /* VPTESTNMBZ256rm */ |
| 140077 | VK32, VR256X, i256mem, |
| 140078 | /* VPTESTNMBZ256rmk */ |
| 140079 | VK32, VK32WM, VR256X, i256mem, |
| 140080 | /* VPTESTNMBZ256rr */ |
| 140081 | VK32, VR256X, VR256X, |
| 140082 | /* VPTESTNMBZ256rrk */ |
| 140083 | VK32, VK32WM, VR256X, VR256X, |
| 140084 | /* VPTESTNMBZrm */ |
| 140085 | VK64, VR512, i512mem, |
| 140086 | /* VPTESTNMBZrmk */ |
| 140087 | VK64, VK64WM, VR512, i512mem, |
| 140088 | /* VPTESTNMBZrr */ |
| 140089 | VK64, VR512, VR512, |
| 140090 | /* VPTESTNMBZrrk */ |
| 140091 | VK64, VK64WM, VR512, VR512, |
| 140092 | /* VPTESTNMDZ128rm */ |
| 140093 | VK4, VR128X, i128mem, |
| 140094 | /* VPTESTNMDZ128rmb */ |
| 140095 | VK4, VR128X, i32mem, |
| 140096 | /* VPTESTNMDZ128rmbk */ |
| 140097 | VK4, VK4WM, VR128X, i32mem, |
| 140098 | /* VPTESTNMDZ128rmk */ |
| 140099 | VK4, VK4WM, VR128X, i128mem, |
| 140100 | /* VPTESTNMDZ128rr */ |
| 140101 | VK4, VR128X, VR128X, |
| 140102 | /* VPTESTNMDZ128rrk */ |
| 140103 | VK4, VK4WM, VR128X, VR128X, |
| 140104 | /* VPTESTNMDZ256rm */ |
| 140105 | VK8, VR256X, i256mem, |
| 140106 | /* VPTESTNMDZ256rmb */ |
| 140107 | VK8, VR256X, i32mem, |
| 140108 | /* VPTESTNMDZ256rmbk */ |
| 140109 | VK8, VK8WM, VR256X, i32mem, |
| 140110 | /* VPTESTNMDZ256rmk */ |
| 140111 | VK8, VK8WM, VR256X, i256mem, |
| 140112 | /* VPTESTNMDZ256rr */ |
| 140113 | VK8, VR256X, VR256X, |
| 140114 | /* VPTESTNMDZ256rrk */ |
| 140115 | VK8, VK8WM, VR256X, VR256X, |
| 140116 | /* VPTESTNMDZrm */ |
| 140117 | VK16, VR512, i512mem, |
| 140118 | /* VPTESTNMDZrmb */ |
| 140119 | VK16, VR512, i32mem, |
| 140120 | /* VPTESTNMDZrmbk */ |
| 140121 | VK16, VK16WM, VR512, i32mem, |
| 140122 | /* VPTESTNMDZrmk */ |
| 140123 | VK16, VK16WM, VR512, i512mem, |
| 140124 | /* VPTESTNMDZrr */ |
| 140125 | VK16, VR512, VR512, |
| 140126 | /* VPTESTNMDZrrk */ |
| 140127 | VK16, VK16WM, VR512, VR512, |
| 140128 | /* VPTESTNMQZ128rm */ |
| 140129 | VK2, VR128X, i128mem, |
| 140130 | /* VPTESTNMQZ128rmb */ |
| 140131 | VK2, VR128X, i64mem, |
| 140132 | /* VPTESTNMQZ128rmbk */ |
| 140133 | VK2, VK2WM, VR128X, i64mem, |
| 140134 | /* VPTESTNMQZ128rmk */ |
| 140135 | VK2, VK2WM, VR128X, i128mem, |
| 140136 | /* VPTESTNMQZ128rr */ |
| 140137 | VK2, VR128X, VR128X, |
| 140138 | /* VPTESTNMQZ128rrk */ |
| 140139 | VK2, VK2WM, VR128X, VR128X, |
| 140140 | /* VPTESTNMQZ256rm */ |
| 140141 | VK4, VR256X, i256mem, |
| 140142 | /* VPTESTNMQZ256rmb */ |
| 140143 | VK4, VR256X, i64mem, |
| 140144 | /* VPTESTNMQZ256rmbk */ |
| 140145 | VK4, VK4WM, VR256X, i64mem, |
| 140146 | /* VPTESTNMQZ256rmk */ |
| 140147 | VK4, VK4WM, VR256X, i256mem, |
| 140148 | /* VPTESTNMQZ256rr */ |
| 140149 | VK4, VR256X, VR256X, |
| 140150 | /* VPTESTNMQZ256rrk */ |
| 140151 | VK4, VK4WM, VR256X, VR256X, |
| 140152 | /* VPTESTNMQZrm */ |
| 140153 | VK8, VR512, i512mem, |
| 140154 | /* VPTESTNMQZrmb */ |
| 140155 | VK8, VR512, i64mem, |
| 140156 | /* VPTESTNMQZrmbk */ |
| 140157 | VK8, VK8WM, VR512, i64mem, |
| 140158 | /* VPTESTNMQZrmk */ |
| 140159 | VK8, VK8WM, VR512, i512mem, |
| 140160 | /* VPTESTNMQZrr */ |
| 140161 | VK8, VR512, VR512, |
| 140162 | /* VPTESTNMQZrrk */ |
| 140163 | VK8, VK8WM, VR512, VR512, |
| 140164 | /* VPTESTNMWZ128rm */ |
| 140165 | VK8, VR128X, i128mem, |
| 140166 | /* VPTESTNMWZ128rmk */ |
| 140167 | VK8, VK8WM, VR128X, i128mem, |
| 140168 | /* VPTESTNMWZ128rr */ |
| 140169 | VK8, VR128X, VR128X, |
| 140170 | /* VPTESTNMWZ128rrk */ |
| 140171 | VK8, VK8WM, VR128X, VR128X, |
| 140172 | /* VPTESTNMWZ256rm */ |
| 140173 | VK16, VR256X, i256mem, |
| 140174 | /* VPTESTNMWZ256rmk */ |
| 140175 | VK16, VK16WM, VR256X, i256mem, |
| 140176 | /* VPTESTNMWZ256rr */ |
| 140177 | VK16, VR256X, VR256X, |
| 140178 | /* VPTESTNMWZ256rrk */ |
| 140179 | VK16, VK16WM, VR256X, VR256X, |
| 140180 | /* VPTESTNMWZrm */ |
| 140181 | VK32, VR512, i512mem, |
| 140182 | /* VPTESTNMWZrmk */ |
| 140183 | VK32, VK32WM, VR512, i512mem, |
| 140184 | /* VPTESTNMWZrr */ |
| 140185 | VK32, VR512, VR512, |
| 140186 | /* VPTESTNMWZrrk */ |
| 140187 | VK32, VK32WM, VR512, VR512, |
| 140188 | /* VPTESTYrm */ |
| 140189 | VR256, i256mem, |
| 140190 | /* VPTESTYrr */ |
| 140191 | VR256, VR256, |
| 140192 | /* VPTESTrm */ |
| 140193 | VR128, f128mem, |
| 140194 | /* VPTESTrr */ |
| 140195 | VR128, VR128, |
| 140196 | /* VPUNPCKHBWYrm */ |
| 140197 | VR256, VR256, i256mem, |
| 140198 | /* VPUNPCKHBWYrr */ |
| 140199 | VR256, VR256, VR256, |
| 140200 | /* VPUNPCKHBWZ128rm */ |
| 140201 | VR128X, VR128X, i128mem, |
| 140202 | /* VPUNPCKHBWZ128rmk */ |
| 140203 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 140204 | /* VPUNPCKHBWZ128rmkz */ |
| 140205 | VR128X, VK16WM, VR128X, i128mem, |
| 140206 | /* VPUNPCKHBWZ128rr */ |
| 140207 | VR128X, VR128X, VR128X, |
| 140208 | /* VPUNPCKHBWZ128rrk */ |
| 140209 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 140210 | /* VPUNPCKHBWZ128rrkz */ |
| 140211 | VR128X, VK16WM, VR128X, VR128X, |
| 140212 | /* VPUNPCKHBWZ256rm */ |
| 140213 | VR256X, VR256X, i256mem, |
| 140214 | /* VPUNPCKHBWZ256rmk */ |
| 140215 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 140216 | /* VPUNPCKHBWZ256rmkz */ |
| 140217 | VR256X, VK32WM, VR256X, i256mem, |
| 140218 | /* VPUNPCKHBWZ256rr */ |
| 140219 | VR256X, VR256X, VR256X, |
| 140220 | /* VPUNPCKHBWZ256rrk */ |
| 140221 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 140222 | /* VPUNPCKHBWZ256rrkz */ |
| 140223 | VR256X, VK32WM, VR256X, VR256X, |
| 140224 | /* VPUNPCKHBWZrm */ |
| 140225 | VR512, VR512, i512mem, |
| 140226 | /* VPUNPCKHBWZrmk */ |
| 140227 | VR512, VR512, VK64WM, VR512, i512mem, |
| 140228 | /* VPUNPCKHBWZrmkz */ |
| 140229 | VR512, VK64WM, VR512, i512mem, |
| 140230 | /* VPUNPCKHBWZrr */ |
| 140231 | VR512, VR512, VR512, |
| 140232 | /* VPUNPCKHBWZrrk */ |
| 140233 | VR512, VR512, VK64WM, VR512, VR512, |
| 140234 | /* VPUNPCKHBWZrrkz */ |
| 140235 | VR512, VK64WM, VR512, VR512, |
| 140236 | /* VPUNPCKHBWrm */ |
| 140237 | VR128, VR128, i128mem, |
| 140238 | /* VPUNPCKHBWrr */ |
| 140239 | VR128, VR128, VR128, |
| 140240 | /* VPUNPCKHDQYrm */ |
| 140241 | VR256, VR256, i256mem, |
| 140242 | /* VPUNPCKHDQYrr */ |
| 140243 | VR256, VR256, VR256, |
| 140244 | /* VPUNPCKHDQZ128rm */ |
| 140245 | VR128X, VR128X, i128mem, |
| 140246 | /* VPUNPCKHDQZ128rmb */ |
| 140247 | VR128X, VR128X, i32mem, |
| 140248 | /* VPUNPCKHDQZ128rmbk */ |
| 140249 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 140250 | /* VPUNPCKHDQZ128rmbkz */ |
| 140251 | VR128X, VK4WM, VR128X, i32mem, |
| 140252 | /* VPUNPCKHDQZ128rmk */ |
| 140253 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 140254 | /* VPUNPCKHDQZ128rmkz */ |
| 140255 | VR128X, VK4WM, VR128X, i128mem, |
| 140256 | /* VPUNPCKHDQZ128rr */ |
| 140257 | VR128X, VR128X, VR128X, |
| 140258 | /* VPUNPCKHDQZ128rrk */ |
| 140259 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 140260 | /* VPUNPCKHDQZ128rrkz */ |
| 140261 | VR128X, VK4WM, VR128X, VR128X, |
| 140262 | /* VPUNPCKHDQZ256rm */ |
| 140263 | VR256X, VR256X, i256mem, |
| 140264 | /* VPUNPCKHDQZ256rmb */ |
| 140265 | VR256X, VR256X, i32mem, |
| 140266 | /* VPUNPCKHDQZ256rmbk */ |
| 140267 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 140268 | /* VPUNPCKHDQZ256rmbkz */ |
| 140269 | VR256X, VK8WM, VR256X, i32mem, |
| 140270 | /* VPUNPCKHDQZ256rmk */ |
| 140271 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 140272 | /* VPUNPCKHDQZ256rmkz */ |
| 140273 | VR256X, VK8WM, VR256X, i256mem, |
| 140274 | /* VPUNPCKHDQZ256rr */ |
| 140275 | VR256X, VR256X, VR256X, |
| 140276 | /* VPUNPCKHDQZ256rrk */ |
| 140277 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 140278 | /* VPUNPCKHDQZ256rrkz */ |
| 140279 | VR256X, VK8WM, VR256X, VR256X, |
| 140280 | /* VPUNPCKHDQZrm */ |
| 140281 | VR512, VR512, i512mem, |
| 140282 | /* VPUNPCKHDQZrmb */ |
| 140283 | VR512, VR512, i32mem, |
| 140284 | /* VPUNPCKHDQZrmbk */ |
| 140285 | VR512, VR512, VK16WM, VR512, i32mem, |
| 140286 | /* VPUNPCKHDQZrmbkz */ |
| 140287 | VR512, VK16WM, VR512, i32mem, |
| 140288 | /* VPUNPCKHDQZrmk */ |
| 140289 | VR512, VR512, VK16WM, VR512, i512mem, |
| 140290 | /* VPUNPCKHDQZrmkz */ |
| 140291 | VR512, VK16WM, VR512, i512mem, |
| 140292 | /* VPUNPCKHDQZrr */ |
| 140293 | VR512, VR512, VR512, |
| 140294 | /* VPUNPCKHDQZrrk */ |
| 140295 | VR512, VR512, VK16WM, VR512, VR512, |
| 140296 | /* VPUNPCKHDQZrrkz */ |
| 140297 | VR512, VK16WM, VR512, VR512, |
| 140298 | /* VPUNPCKHDQrm */ |
| 140299 | VR128, VR128, i128mem, |
| 140300 | /* VPUNPCKHDQrr */ |
| 140301 | VR128, VR128, VR128, |
| 140302 | /* VPUNPCKHQDQYrm */ |
| 140303 | VR256, VR256, i256mem, |
| 140304 | /* VPUNPCKHQDQYrr */ |
| 140305 | VR256, VR256, VR256, |
| 140306 | /* VPUNPCKHQDQZ128rm */ |
| 140307 | VR128X, VR128X, i128mem, |
| 140308 | /* VPUNPCKHQDQZ128rmb */ |
| 140309 | VR128X, VR128X, i64mem, |
| 140310 | /* VPUNPCKHQDQZ128rmbk */ |
| 140311 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 140312 | /* VPUNPCKHQDQZ128rmbkz */ |
| 140313 | VR128X, VK2WM, VR128X, i64mem, |
| 140314 | /* VPUNPCKHQDQZ128rmk */ |
| 140315 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 140316 | /* VPUNPCKHQDQZ128rmkz */ |
| 140317 | VR128X, VK2WM, VR128X, i128mem, |
| 140318 | /* VPUNPCKHQDQZ128rr */ |
| 140319 | VR128X, VR128X, VR128X, |
| 140320 | /* VPUNPCKHQDQZ128rrk */ |
| 140321 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 140322 | /* VPUNPCKHQDQZ128rrkz */ |
| 140323 | VR128X, VK2WM, VR128X, VR128X, |
| 140324 | /* VPUNPCKHQDQZ256rm */ |
| 140325 | VR256X, VR256X, i256mem, |
| 140326 | /* VPUNPCKHQDQZ256rmb */ |
| 140327 | VR256X, VR256X, i64mem, |
| 140328 | /* VPUNPCKHQDQZ256rmbk */ |
| 140329 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 140330 | /* VPUNPCKHQDQZ256rmbkz */ |
| 140331 | VR256X, VK4WM, VR256X, i64mem, |
| 140332 | /* VPUNPCKHQDQZ256rmk */ |
| 140333 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 140334 | /* VPUNPCKHQDQZ256rmkz */ |
| 140335 | VR256X, VK4WM, VR256X, i256mem, |
| 140336 | /* VPUNPCKHQDQZ256rr */ |
| 140337 | VR256X, VR256X, VR256X, |
| 140338 | /* VPUNPCKHQDQZ256rrk */ |
| 140339 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 140340 | /* VPUNPCKHQDQZ256rrkz */ |
| 140341 | VR256X, VK4WM, VR256X, VR256X, |
| 140342 | /* VPUNPCKHQDQZrm */ |
| 140343 | VR512, VR512, i512mem, |
| 140344 | /* VPUNPCKHQDQZrmb */ |
| 140345 | VR512, VR512, i64mem, |
| 140346 | /* VPUNPCKHQDQZrmbk */ |
| 140347 | VR512, VR512, VK8WM, VR512, i64mem, |
| 140348 | /* VPUNPCKHQDQZrmbkz */ |
| 140349 | VR512, VK8WM, VR512, i64mem, |
| 140350 | /* VPUNPCKHQDQZrmk */ |
| 140351 | VR512, VR512, VK8WM, VR512, i512mem, |
| 140352 | /* VPUNPCKHQDQZrmkz */ |
| 140353 | VR512, VK8WM, VR512, i512mem, |
| 140354 | /* VPUNPCKHQDQZrr */ |
| 140355 | VR512, VR512, VR512, |
| 140356 | /* VPUNPCKHQDQZrrk */ |
| 140357 | VR512, VR512, VK8WM, VR512, VR512, |
| 140358 | /* VPUNPCKHQDQZrrkz */ |
| 140359 | VR512, VK8WM, VR512, VR512, |
| 140360 | /* VPUNPCKHQDQrm */ |
| 140361 | VR128, VR128, i128mem, |
| 140362 | /* VPUNPCKHQDQrr */ |
| 140363 | VR128, VR128, VR128, |
| 140364 | /* VPUNPCKHWDYrm */ |
| 140365 | VR256, VR256, i256mem, |
| 140366 | /* VPUNPCKHWDYrr */ |
| 140367 | VR256, VR256, VR256, |
| 140368 | /* VPUNPCKHWDZ128rm */ |
| 140369 | VR128X, VR128X, i128mem, |
| 140370 | /* VPUNPCKHWDZ128rmk */ |
| 140371 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 140372 | /* VPUNPCKHWDZ128rmkz */ |
| 140373 | VR128X, VK8WM, VR128X, i128mem, |
| 140374 | /* VPUNPCKHWDZ128rr */ |
| 140375 | VR128X, VR128X, VR128X, |
| 140376 | /* VPUNPCKHWDZ128rrk */ |
| 140377 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 140378 | /* VPUNPCKHWDZ128rrkz */ |
| 140379 | VR128X, VK8WM, VR128X, VR128X, |
| 140380 | /* VPUNPCKHWDZ256rm */ |
| 140381 | VR256X, VR256X, i256mem, |
| 140382 | /* VPUNPCKHWDZ256rmk */ |
| 140383 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 140384 | /* VPUNPCKHWDZ256rmkz */ |
| 140385 | VR256X, VK16WM, VR256X, i256mem, |
| 140386 | /* VPUNPCKHWDZ256rr */ |
| 140387 | VR256X, VR256X, VR256X, |
| 140388 | /* VPUNPCKHWDZ256rrk */ |
| 140389 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 140390 | /* VPUNPCKHWDZ256rrkz */ |
| 140391 | VR256X, VK16WM, VR256X, VR256X, |
| 140392 | /* VPUNPCKHWDZrm */ |
| 140393 | VR512, VR512, i512mem, |
| 140394 | /* VPUNPCKHWDZrmk */ |
| 140395 | VR512, VR512, VK32WM, VR512, i512mem, |
| 140396 | /* VPUNPCKHWDZrmkz */ |
| 140397 | VR512, VK32WM, VR512, i512mem, |
| 140398 | /* VPUNPCKHWDZrr */ |
| 140399 | VR512, VR512, VR512, |
| 140400 | /* VPUNPCKHWDZrrk */ |
| 140401 | VR512, VR512, VK32WM, VR512, VR512, |
| 140402 | /* VPUNPCKHWDZrrkz */ |
| 140403 | VR512, VK32WM, VR512, VR512, |
| 140404 | /* VPUNPCKHWDrm */ |
| 140405 | VR128, VR128, i128mem, |
| 140406 | /* VPUNPCKHWDrr */ |
| 140407 | VR128, VR128, VR128, |
| 140408 | /* VPUNPCKLBWYrm */ |
| 140409 | VR256, VR256, i256mem, |
| 140410 | /* VPUNPCKLBWYrr */ |
| 140411 | VR256, VR256, VR256, |
| 140412 | /* VPUNPCKLBWZ128rm */ |
| 140413 | VR128X, VR128X, i128mem, |
| 140414 | /* VPUNPCKLBWZ128rmk */ |
| 140415 | VR128X, VR128X, VK16WM, VR128X, i128mem, |
| 140416 | /* VPUNPCKLBWZ128rmkz */ |
| 140417 | VR128X, VK16WM, VR128X, i128mem, |
| 140418 | /* VPUNPCKLBWZ128rr */ |
| 140419 | VR128X, VR128X, VR128X, |
| 140420 | /* VPUNPCKLBWZ128rrk */ |
| 140421 | VR128X, VR128X, VK16WM, VR128X, VR128X, |
| 140422 | /* VPUNPCKLBWZ128rrkz */ |
| 140423 | VR128X, VK16WM, VR128X, VR128X, |
| 140424 | /* VPUNPCKLBWZ256rm */ |
| 140425 | VR256X, VR256X, i256mem, |
| 140426 | /* VPUNPCKLBWZ256rmk */ |
| 140427 | VR256X, VR256X, VK32WM, VR256X, i256mem, |
| 140428 | /* VPUNPCKLBWZ256rmkz */ |
| 140429 | VR256X, VK32WM, VR256X, i256mem, |
| 140430 | /* VPUNPCKLBWZ256rr */ |
| 140431 | VR256X, VR256X, VR256X, |
| 140432 | /* VPUNPCKLBWZ256rrk */ |
| 140433 | VR256X, VR256X, VK32WM, VR256X, VR256X, |
| 140434 | /* VPUNPCKLBWZ256rrkz */ |
| 140435 | VR256X, VK32WM, VR256X, VR256X, |
| 140436 | /* VPUNPCKLBWZrm */ |
| 140437 | VR512, VR512, i512mem, |
| 140438 | /* VPUNPCKLBWZrmk */ |
| 140439 | VR512, VR512, VK64WM, VR512, i512mem, |
| 140440 | /* VPUNPCKLBWZrmkz */ |
| 140441 | VR512, VK64WM, VR512, i512mem, |
| 140442 | /* VPUNPCKLBWZrr */ |
| 140443 | VR512, VR512, VR512, |
| 140444 | /* VPUNPCKLBWZrrk */ |
| 140445 | VR512, VR512, VK64WM, VR512, VR512, |
| 140446 | /* VPUNPCKLBWZrrkz */ |
| 140447 | VR512, VK64WM, VR512, VR512, |
| 140448 | /* VPUNPCKLBWrm */ |
| 140449 | VR128, VR128, i128mem, |
| 140450 | /* VPUNPCKLBWrr */ |
| 140451 | VR128, VR128, VR128, |
| 140452 | /* VPUNPCKLDQYrm */ |
| 140453 | VR256, VR256, i256mem, |
| 140454 | /* VPUNPCKLDQYrr */ |
| 140455 | VR256, VR256, VR256, |
| 140456 | /* VPUNPCKLDQZ128rm */ |
| 140457 | VR128X, VR128X, i128mem, |
| 140458 | /* VPUNPCKLDQZ128rmb */ |
| 140459 | VR128X, VR128X, i32mem, |
| 140460 | /* VPUNPCKLDQZ128rmbk */ |
| 140461 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 140462 | /* VPUNPCKLDQZ128rmbkz */ |
| 140463 | VR128X, VK4WM, VR128X, i32mem, |
| 140464 | /* VPUNPCKLDQZ128rmk */ |
| 140465 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 140466 | /* VPUNPCKLDQZ128rmkz */ |
| 140467 | VR128X, VK4WM, VR128X, i128mem, |
| 140468 | /* VPUNPCKLDQZ128rr */ |
| 140469 | VR128X, VR128X, VR128X, |
| 140470 | /* VPUNPCKLDQZ128rrk */ |
| 140471 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 140472 | /* VPUNPCKLDQZ128rrkz */ |
| 140473 | VR128X, VK4WM, VR128X, VR128X, |
| 140474 | /* VPUNPCKLDQZ256rm */ |
| 140475 | VR256X, VR256X, i256mem, |
| 140476 | /* VPUNPCKLDQZ256rmb */ |
| 140477 | VR256X, VR256X, i32mem, |
| 140478 | /* VPUNPCKLDQZ256rmbk */ |
| 140479 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 140480 | /* VPUNPCKLDQZ256rmbkz */ |
| 140481 | VR256X, VK8WM, VR256X, i32mem, |
| 140482 | /* VPUNPCKLDQZ256rmk */ |
| 140483 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 140484 | /* VPUNPCKLDQZ256rmkz */ |
| 140485 | VR256X, VK8WM, VR256X, i256mem, |
| 140486 | /* VPUNPCKLDQZ256rr */ |
| 140487 | VR256X, VR256X, VR256X, |
| 140488 | /* VPUNPCKLDQZ256rrk */ |
| 140489 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 140490 | /* VPUNPCKLDQZ256rrkz */ |
| 140491 | VR256X, VK8WM, VR256X, VR256X, |
| 140492 | /* VPUNPCKLDQZrm */ |
| 140493 | VR512, VR512, i512mem, |
| 140494 | /* VPUNPCKLDQZrmb */ |
| 140495 | VR512, VR512, i32mem, |
| 140496 | /* VPUNPCKLDQZrmbk */ |
| 140497 | VR512, VR512, VK16WM, VR512, i32mem, |
| 140498 | /* VPUNPCKLDQZrmbkz */ |
| 140499 | VR512, VK16WM, VR512, i32mem, |
| 140500 | /* VPUNPCKLDQZrmk */ |
| 140501 | VR512, VR512, VK16WM, VR512, i512mem, |
| 140502 | /* VPUNPCKLDQZrmkz */ |
| 140503 | VR512, VK16WM, VR512, i512mem, |
| 140504 | /* VPUNPCKLDQZrr */ |
| 140505 | VR512, VR512, VR512, |
| 140506 | /* VPUNPCKLDQZrrk */ |
| 140507 | VR512, VR512, VK16WM, VR512, VR512, |
| 140508 | /* VPUNPCKLDQZrrkz */ |
| 140509 | VR512, VK16WM, VR512, VR512, |
| 140510 | /* VPUNPCKLDQrm */ |
| 140511 | VR128, VR128, i128mem, |
| 140512 | /* VPUNPCKLDQrr */ |
| 140513 | VR128, VR128, VR128, |
| 140514 | /* VPUNPCKLQDQYrm */ |
| 140515 | VR256, VR256, i256mem, |
| 140516 | /* VPUNPCKLQDQYrr */ |
| 140517 | VR256, VR256, VR256, |
| 140518 | /* VPUNPCKLQDQZ128rm */ |
| 140519 | VR128X, VR128X, i128mem, |
| 140520 | /* VPUNPCKLQDQZ128rmb */ |
| 140521 | VR128X, VR128X, i64mem, |
| 140522 | /* VPUNPCKLQDQZ128rmbk */ |
| 140523 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 140524 | /* VPUNPCKLQDQZ128rmbkz */ |
| 140525 | VR128X, VK2WM, VR128X, i64mem, |
| 140526 | /* VPUNPCKLQDQZ128rmk */ |
| 140527 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 140528 | /* VPUNPCKLQDQZ128rmkz */ |
| 140529 | VR128X, VK2WM, VR128X, i128mem, |
| 140530 | /* VPUNPCKLQDQZ128rr */ |
| 140531 | VR128X, VR128X, VR128X, |
| 140532 | /* VPUNPCKLQDQZ128rrk */ |
| 140533 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 140534 | /* VPUNPCKLQDQZ128rrkz */ |
| 140535 | VR128X, VK2WM, VR128X, VR128X, |
| 140536 | /* VPUNPCKLQDQZ256rm */ |
| 140537 | VR256X, VR256X, i256mem, |
| 140538 | /* VPUNPCKLQDQZ256rmb */ |
| 140539 | VR256X, VR256X, i64mem, |
| 140540 | /* VPUNPCKLQDQZ256rmbk */ |
| 140541 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 140542 | /* VPUNPCKLQDQZ256rmbkz */ |
| 140543 | VR256X, VK4WM, VR256X, i64mem, |
| 140544 | /* VPUNPCKLQDQZ256rmk */ |
| 140545 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 140546 | /* VPUNPCKLQDQZ256rmkz */ |
| 140547 | VR256X, VK4WM, VR256X, i256mem, |
| 140548 | /* VPUNPCKLQDQZ256rr */ |
| 140549 | VR256X, VR256X, VR256X, |
| 140550 | /* VPUNPCKLQDQZ256rrk */ |
| 140551 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 140552 | /* VPUNPCKLQDQZ256rrkz */ |
| 140553 | VR256X, VK4WM, VR256X, VR256X, |
| 140554 | /* VPUNPCKLQDQZrm */ |
| 140555 | VR512, VR512, i512mem, |
| 140556 | /* VPUNPCKLQDQZrmb */ |
| 140557 | VR512, VR512, i64mem, |
| 140558 | /* VPUNPCKLQDQZrmbk */ |
| 140559 | VR512, VR512, VK8WM, VR512, i64mem, |
| 140560 | /* VPUNPCKLQDQZrmbkz */ |
| 140561 | VR512, VK8WM, VR512, i64mem, |
| 140562 | /* VPUNPCKLQDQZrmk */ |
| 140563 | VR512, VR512, VK8WM, VR512, i512mem, |
| 140564 | /* VPUNPCKLQDQZrmkz */ |
| 140565 | VR512, VK8WM, VR512, i512mem, |
| 140566 | /* VPUNPCKLQDQZrr */ |
| 140567 | VR512, VR512, VR512, |
| 140568 | /* VPUNPCKLQDQZrrk */ |
| 140569 | VR512, VR512, VK8WM, VR512, VR512, |
| 140570 | /* VPUNPCKLQDQZrrkz */ |
| 140571 | VR512, VK8WM, VR512, VR512, |
| 140572 | /* VPUNPCKLQDQrm */ |
| 140573 | VR128, VR128, i128mem, |
| 140574 | /* VPUNPCKLQDQrr */ |
| 140575 | VR128, VR128, VR128, |
| 140576 | /* VPUNPCKLWDYrm */ |
| 140577 | VR256, VR256, i256mem, |
| 140578 | /* VPUNPCKLWDYrr */ |
| 140579 | VR256, VR256, VR256, |
| 140580 | /* VPUNPCKLWDZ128rm */ |
| 140581 | VR128X, VR128X, i128mem, |
| 140582 | /* VPUNPCKLWDZ128rmk */ |
| 140583 | VR128X, VR128X, VK8WM, VR128X, i128mem, |
| 140584 | /* VPUNPCKLWDZ128rmkz */ |
| 140585 | VR128X, VK8WM, VR128X, i128mem, |
| 140586 | /* VPUNPCKLWDZ128rr */ |
| 140587 | VR128X, VR128X, VR128X, |
| 140588 | /* VPUNPCKLWDZ128rrk */ |
| 140589 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 140590 | /* VPUNPCKLWDZ128rrkz */ |
| 140591 | VR128X, VK8WM, VR128X, VR128X, |
| 140592 | /* VPUNPCKLWDZ256rm */ |
| 140593 | VR256X, VR256X, i256mem, |
| 140594 | /* VPUNPCKLWDZ256rmk */ |
| 140595 | VR256X, VR256X, VK16WM, VR256X, i256mem, |
| 140596 | /* VPUNPCKLWDZ256rmkz */ |
| 140597 | VR256X, VK16WM, VR256X, i256mem, |
| 140598 | /* VPUNPCKLWDZ256rr */ |
| 140599 | VR256X, VR256X, VR256X, |
| 140600 | /* VPUNPCKLWDZ256rrk */ |
| 140601 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 140602 | /* VPUNPCKLWDZ256rrkz */ |
| 140603 | VR256X, VK16WM, VR256X, VR256X, |
| 140604 | /* VPUNPCKLWDZrm */ |
| 140605 | VR512, VR512, i512mem, |
| 140606 | /* VPUNPCKLWDZrmk */ |
| 140607 | VR512, VR512, VK32WM, VR512, i512mem, |
| 140608 | /* VPUNPCKLWDZrmkz */ |
| 140609 | VR512, VK32WM, VR512, i512mem, |
| 140610 | /* VPUNPCKLWDZrr */ |
| 140611 | VR512, VR512, VR512, |
| 140612 | /* VPUNPCKLWDZrrk */ |
| 140613 | VR512, VR512, VK32WM, VR512, VR512, |
| 140614 | /* VPUNPCKLWDZrrkz */ |
| 140615 | VR512, VK32WM, VR512, VR512, |
| 140616 | /* VPUNPCKLWDrm */ |
| 140617 | VR128, VR128, i128mem, |
| 140618 | /* VPUNPCKLWDrr */ |
| 140619 | VR128, VR128, VR128, |
| 140620 | /* VPXORDZ128rm */ |
| 140621 | VR128X, VR128X, i128mem, |
| 140622 | /* VPXORDZ128rmb */ |
| 140623 | VR128X, VR128X, i32mem, |
| 140624 | /* VPXORDZ128rmbk */ |
| 140625 | VR128X, VR128X, VK4WM, VR128X, i32mem, |
| 140626 | /* VPXORDZ128rmbkz */ |
| 140627 | VR128X, VK4WM, VR128X, i32mem, |
| 140628 | /* VPXORDZ128rmk */ |
| 140629 | VR128X, VR128X, VK4WM, VR128X, i128mem, |
| 140630 | /* VPXORDZ128rmkz */ |
| 140631 | VR128X, VK4WM, VR128X, i128mem, |
| 140632 | /* VPXORDZ128rr */ |
| 140633 | VR128X, VR128X, VR128X, |
| 140634 | /* VPXORDZ128rrk */ |
| 140635 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 140636 | /* VPXORDZ128rrkz */ |
| 140637 | VR128X, VK4WM, VR128X, VR128X, |
| 140638 | /* VPXORDZ256rm */ |
| 140639 | VR256X, VR256X, i256mem, |
| 140640 | /* VPXORDZ256rmb */ |
| 140641 | VR256X, VR256X, i32mem, |
| 140642 | /* VPXORDZ256rmbk */ |
| 140643 | VR256X, VR256X, VK8WM, VR256X, i32mem, |
| 140644 | /* VPXORDZ256rmbkz */ |
| 140645 | VR256X, VK8WM, VR256X, i32mem, |
| 140646 | /* VPXORDZ256rmk */ |
| 140647 | VR256X, VR256X, VK8WM, VR256X, i256mem, |
| 140648 | /* VPXORDZ256rmkz */ |
| 140649 | VR256X, VK8WM, VR256X, i256mem, |
| 140650 | /* VPXORDZ256rr */ |
| 140651 | VR256X, VR256X, VR256X, |
| 140652 | /* VPXORDZ256rrk */ |
| 140653 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 140654 | /* VPXORDZ256rrkz */ |
| 140655 | VR256X, VK8WM, VR256X, VR256X, |
| 140656 | /* VPXORDZrm */ |
| 140657 | VR512, VR512, i512mem, |
| 140658 | /* VPXORDZrmb */ |
| 140659 | VR512, VR512, i32mem, |
| 140660 | /* VPXORDZrmbk */ |
| 140661 | VR512, VR512, VK16WM, VR512, i32mem, |
| 140662 | /* VPXORDZrmbkz */ |
| 140663 | VR512, VK16WM, VR512, i32mem, |
| 140664 | /* VPXORDZrmk */ |
| 140665 | VR512, VR512, VK16WM, VR512, i512mem, |
| 140666 | /* VPXORDZrmkz */ |
| 140667 | VR512, VK16WM, VR512, i512mem, |
| 140668 | /* VPXORDZrr */ |
| 140669 | VR512, VR512, VR512, |
| 140670 | /* VPXORDZrrk */ |
| 140671 | VR512, VR512, VK16WM, VR512, VR512, |
| 140672 | /* VPXORDZrrkz */ |
| 140673 | VR512, VK16WM, VR512, VR512, |
| 140674 | /* VPXORQZ128rm */ |
| 140675 | VR128X, VR128X, i128mem, |
| 140676 | /* VPXORQZ128rmb */ |
| 140677 | VR128X, VR128X, i64mem, |
| 140678 | /* VPXORQZ128rmbk */ |
| 140679 | VR128X, VR128X, VK2WM, VR128X, i64mem, |
| 140680 | /* VPXORQZ128rmbkz */ |
| 140681 | VR128X, VK2WM, VR128X, i64mem, |
| 140682 | /* VPXORQZ128rmk */ |
| 140683 | VR128X, VR128X, VK2WM, VR128X, i128mem, |
| 140684 | /* VPXORQZ128rmkz */ |
| 140685 | VR128X, VK2WM, VR128X, i128mem, |
| 140686 | /* VPXORQZ128rr */ |
| 140687 | VR128X, VR128X, VR128X, |
| 140688 | /* VPXORQZ128rrk */ |
| 140689 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 140690 | /* VPXORQZ128rrkz */ |
| 140691 | VR128X, VK2WM, VR128X, VR128X, |
| 140692 | /* VPXORQZ256rm */ |
| 140693 | VR256X, VR256X, i256mem, |
| 140694 | /* VPXORQZ256rmb */ |
| 140695 | VR256X, VR256X, i64mem, |
| 140696 | /* VPXORQZ256rmbk */ |
| 140697 | VR256X, VR256X, VK4WM, VR256X, i64mem, |
| 140698 | /* VPXORQZ256rmbkz */ |
| 140699 | VR256X, VK4WM, VR256X, i64mem, |
| 140700 | /* VPXORQZ256rmk */ |
| 140701 | VR256X, VR256X, VK4WM, VR256X, i256mem, |
| 140702 | /* VPXORQZ256rmkz */ |
| 140703 | VR256X, VK4WM, VR256X, i256mem, |
| 140704 | /* VPXORQZ256rr */ |
| 140705 | VR256X, VR256X, VR256X, |
| 140706 | /* VPXORQZ256rrk */ |
| 140707 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 140708 | /* VPXORQZ256rrkz */ |
| 140709 | VR256X, VK4WM, VR256X, VR256X, |
| 140710 | /* VPXORQZrm */ |
| 140711 | VR512, VR512, i512mem, |
| 140712 | /* VPXORQZrmb */ |
| 140713 | VR512, VR512, i64mem, |
| 140714 | /* VPXORQZrmbk */ |
| 140715 | VR512, VR512, VK8WM, VR512, i64mem, |
| 140716 | /* VPXORQZrmbkz */ |
| 140717 | VR512, VK8WM, VR512, i64mem, |
| 140718 | /* VPXORQZrmk */ |
| 140719 | VR512, VR512, VK8WM, VR512, i512mem, |
| 140720 | /* VPXORQZrmkz */ |
| 140721 | VR512, VK8WM, VR512, i512mem, |
| 140722 | /* VPXORQZrr */ |
| 140723 | VR512, VR512, VR512, |
| 140724 | /* VPXORQZrrk */ |
| 140725 | VR512, VR512, VK8WM, VR512, VR512, |
| 140726 | /* VPXORQZrrkz */ |
| 140727 | VR512, VK8WM, VR512, VR512, |
| 140728 | /* VPXORYrm */ |
| 140729 | VR256, VR256, i256mem, |
| 140730 | /* VPXORYrr */ |
| 140731 | VR256, VR256, VR256, |
| 140732 | /* VPXORrm */ |
| 140733 | VR128, VR128, i128mem, |
| 140734 | /* VPXORrr */ |
| 140735 | VR128, VR128, VR128, |
| 140736 | /* VRANGEPDZ128rmbi */ |
| 140737 | VR128X, VR128X, f64mem, i32u8imm, |
| 140738 | /* VRANGEPDZ128rmbik */ |
| 140739 | VR128X, VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 140740 | /* VRANGEPDZ128rmbikz */ |
| 140741 | VR128X, VK2WM, VR128X, f64mem, i32u8imm, |
| 140742 | /* VRANGEPDZ128rmi */ |
| 140743 | VR128X, VR128X, f128mem, i32u8imm, |
| 140744 | /* VRANGEPDZ128rmik */ |
| 140745 | VR128X, VR128X, VK2WM, VR128X, f128mem, i32u8imm, |
| 140746 | /* VRANGEPDZ128rmikz */ |
| 140747 | VR128X, VK2WM, VR128X, f128mem, i32u8imm, |
| 140748 | /* VRANGEPDZ128rri */ |
| 140749 | VR128X, VR128X, VR128X, i32u8imm, |
| 140750 | /* VRANGEPDZ128rrik */ |
| 140751 | VR128X, VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 140752 | /* VRANGEPDZ128rrikz */ |
| 140753 | VR128X, VK2WM, VR128X, VR128X, i32u8imm, |
| 140754 | /* VRANGEPDZ256rmbi */ |
| 140755 | VR256X, VR256X, f64mem, i32u8imm, |
| 140756 | /* VRANGEPDZ256rmbik */ |
| 140757 | VR256X, VR256X, VK4WM, VR256X, f64mem, i32u8imm, |
| 140758 | /* VRANGEPDZ256rmbikz */ |
| 140759 | VR256X, VK4WM, VR256X, f64mem, i32u8imm, |
| 140760 | /* VRANGEPDZ256rmi */ |
| 140761 | VR256X, VR256X, f256mem, i32u8imm, |
| 140762 | /* VRANGEPDZ256rmik */ |
| 140763 | VR256X, VR256X, VK4WM, VR256X, f256mem, i32u8imm, |
| 140764 | /* VRANGEPDZ256rmikz */ |
| 140765 | VR256X, VK4WM, VR256X, f256mem, i32u8imm, |
| 140766 | /* VRANGEPDZ256rri */ |
| 140767 | VR256X, VR256X, VR256X, i32u8imm, |
| 140768 | /* VRANGEPDZ256rrik */ |
| 140769 | VR256X, VR256X, VK4WM, VR256X, VR256X, i32u8imm, |
| 140770 | /* VRANGEPDZ256rrikz */ |
| 140771 | VR256X, VK4WM, VR256X, VR256X, i32u8imm, |
| 140772 | /* VRANGEPDZrmbi */ |
| 140773 | VR512, VR512, f64mem, i32u8imm, |
| 140774 | /* VRANGEPDZrmbik */ |
| 140775 | VR512, VR512, VK8WM, VR512, f64mem, i32u8imm, |
| 140776 | /* VRANGEPDZrmbikz */ |
| 140777 | VR512, VK8WM, VR512, f64mem, i32u8imm, |
| 140778 | /* VRANGEPDZrmi */ |
| 140779 | VR512, VR512, f512mem, i32u8imm, |
| 140780 | /* VRANGEPDZrmik */ |
| 140781 | VR512, VR512, VK8WM, VR512, f512mem, i32u8imm, |
| 140782 | /* VRANGEPDZrmikz */ |
| 140783 | VR512, VK8WM, VR512, f512mem, i32u8imm, |
| 140784 | /* VRANGEPDZrri */ |
| 140785 | VR512, VR512, VR512, i32u8imm, |
| 140786 | /* VRANGEPDZrrib */ |
| 140787 | VR512, VR512, VR512, i32u8imm, |
| 140788 | /* VRANGEPDZrribk */ |
| 140789 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 140790 | /* VRANGEPDZrribkz */ |
| 140791 | VR512, VK8WM, VR512, VR512, i32u8imm, |
| 140792 | /* VRANGEPDZrrik */ |
| 140793 | VR512, VR512, VK8WM, VR512, VR512, i32u8imm, |
| 140794 | /* VRANGEPDZrrikz */ |
| 140795 | VR512, VK8WM, VR512, VR512, i32u8imm, |
| 140796 | /* VRANGEPSZ128rmbi */ |
| 140797 | VR128X, VR128X, f32mem, i32u8imm, |
| 140798 | /* VRANGEPSZ128rmbik */ |
| 140799 | VR128X, VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 140800 | /* VRANGEPSZ128rmbikz */ |
| 140801 | VR128X, VK4WM, VR128X, f32mem, i32u8imm, |
| 140802 | /* VRANGEPSZ128rmi */ |
| 140803 | VR128X, VR128X, f128mem, i32u8imm, |
| 140804 | /* VRANGEPSZ128rmik */ |
| 140805 | VR128X, VR128X, VK4WM, VR128X, f128mem, i32u8imm, |
| 140806 | /* VRANGEPSZ128rmikz */ |
| 140807 | VR128X, VK4WM, VR128X, f128mem, i32u8imm, |
| 140808 | /* VRANGEPSZ128rri */ |
| 140809 | VR128X, VR128X, VR128X, i32u8imm, |
| 140810 | /* VRANGEPSZ128rrik */ |
| 140811 | VR128X, VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 140812 | /* VRANGEPSZ128rrikz */ |
| 140813 | VR128X, VK4WM, VR128X, VR128X, i32u8imm, |
| 140814 | /* VRANGEPSZ256rmbi */ |
| 140815 | VR256X, VR256X, f32mem, i32u8imm, |
| 140816 | /* VRANGEPSZ256rmbik */ |
| 140817 | VR256X, VR256X, VK8WM, VR256X, f32mem, i32u8imm, |
| 140818 | /* VRANGEPSZ256rmbikz */ |
| 140819 | VR256X, VK8WM, VR256X, f32mem, i32u8imm, |
| 140820 | /* VRANGEPSZ256rmi */ |
| 140821 | VR256X, VR256X, f256mem, i32u8imm, |
| 140822 | /* VRANGEPSZ256rmik */ |
| 140823 | VR256X, VR256X, VK8WM, VR256X, f256mem, i32u8imm, |
| 140824 | /* VRANGEPSZ256rmikz */ |
| 140825 | VR256X, VK8WM, VR256X, f256mem, i32u8imm, |
| 140826 | /* VRANGEPSZ256rri */ |
| 140827 | VR256X, VR256X, VR256X, i32u8imm, |
| 140828 | /* VRANGEPSZ256rrik */ |
| 140829 | VR256X, VR256X, VK8WM, VR256X, VR256X, i32u8imm, |
| 140830 | /* VRANGEPSZ256rrikz */ |
| 140831 | VR256X, VK8WM, VR256X, VR256X, i32u8imm, |
| 140832 | /* VRANGEPSZrmbi */ |
| 140833 | VR512, VR512, f32mem, i32u8imm, |
| 140834 | /* VRANGEPSZrmbik */ |
| 140835 | VR512, VR512, VK16WM, VR512, f32mem, i32u8imm, |
| 140836 | /* VRANGEPSZrmbikz */ |
| 140837 | VR512, VK16WM, VR512, f32mem, i32u8imm, |
| 140838 | /* VRANGEPSZrmi */ |
| 140839 | VR512, VR512, f512mem, i32u8imm, |
| 140840 | /* VRANGEPSZrmik */ |
| 140841 | VR512, VR512, VK16WM, VR512, f512mem, i32u8imm, |
| 140842 | /* VRANGEPSZrmikz */ |
| 140843 | VR512, VK16WM, VR512, f512mem, i32u8imm, |
| 140844 | /* VRANGEPSZrri */ |
| 140845 | VR512, VR512, VR512, i32u8imm, |
| 140846 | /* VRANGEPSZrrib */ |
| 140847 | VR512, VR512, VR512, i32u8imm, |
| 140848 | /* VRANGEPSZrribk */ |
| 140849 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 140850 | /* VRANGEPSZrribkz */ |
| 140851 | VR512, VK16WM, VR512, VR512, i32u8imm, |
| 140852 | /* VRANGEPSZrrik */ |
| 140853 | VR512, VR512, VK16WM, VR512, VR512, i32u8imm, |
| 140854 | /* VRANGEPSZrrikz */ |
| 140855 | VR512, VK16WM, VR512, VR512, i32u8imm, |
| 140856 | /* VRANGESDZrmi */ |
| 140857 | VR128X, VR128X, sdmem, i32u8imm, |
| 140858 | /* VRANGESDZrmik */ |
| 140859 | VR128X, VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 140860 | /* VRANGESDZrmikz */ |
| 140861 | VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 140862 | /* VRANGESDZrri */ |
| 140863 | VR128X, VR128X, VR128X, i32u8imm, |
| 140864 | /* VRANGESDZrrib */ |
| 140865 | VR128X, VR128X, VR128X, i32u8imm, |
| 140866 | /* VRANGESDZrribk */ |
| 140867 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 140868 | /* VRANGESDZrribkz */ |
| 140869 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 140870 | /* VRANGESDZrrik */ |
| 140871 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 140872 | /* VRANGESDZrrikz */ |
| 140873 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 140874 | /* VRANGESSZrmi */ |
| 140875 | VR128X, VR128X, ssmem, i32u8imm, |
| 140876 | /* VRANGESSZrmik */ |
| 140877 | VR128X, VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 140878 | /* VRANGESSZrmikz */ |
| 140879 | VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 140880 | /* VRANGESSZrri */ |
| 140881 | VR128X, VR128X, VR128X, i32u8imm, |
| 140882 | /* VRANGESSZrrib */ |
| 140883 | VR128X, VR128X, VR128X, i32u8imm, |
| 140884 | /* VRANGESSZrribk */ |
| 140885 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 140886 | /* VRANGESSZrribkz */ |
| 140887 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 140888 | /* VRANGESSZrrik */ |
| 140889 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 140890 | /* VRANGESSZrrikz */ |
| 140891 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 140892 | /* VRCP14PDZ128m */ |
| 140893 | VR128X, f128mem, |
| 140894 | /* VRCP14PDZ128mb */ |
| 140895 | VR128X, f64mem, |
| 140896 | /* VRCP14PDZ128mbk */ |
| 140897 | VR128X, VR128X, VK2WM, f64mem, |
| 140898 | /* VRCP14PDZ128mbkz */ |
| 140899 | VR128X, VK2WM, f64mem, |
| 140900 | /* VRCP14PDZ128mk */ |
| 140901 | VR128X, VR128X, VK2WM, f128mem, |
| 140902 | /* VRCP14PDZ128mkz */ |
| 140903 | VR128X, VK2WM, f128mem, |
| 140904 | /* VRCP14PDZ128r */ |
| 140905 | VR128X, VR128X, |
| 140906 | /* VRCP14PDZ128rk */ |
| 140907 | VR128X, VR128X, VK2WM, VR128X, |
| 140908 | /* VRCP14PDZ128rkz */ |
| 140909 | VR128X, VK2WM, VR128X, |
| 140910 | /* VRCP14PDZ256m */ |
| 140911 | VR256X, f256mem, |
| 140912 | /* VRCP14PDZ256mb */ |
| 140913 | VR256X, f64mem, |
| 140914 | /* VRCP14PDZ256mbk */ |
| 140915 | VR256X, VR256X, VK4WM, f64mem, |
| 140916 | /* VRCP14PDZ256mbkz */ |
| 140917 | VR256X, VK4WM, f64mem, |
| 140918 | /* VRCP14PDZ256mk */ |
| 140919 | VR256X, VR256X, VK4WM, f256mem, |
| 140920 | /* VRCP14PDZ256mkz */ |
| 140921 | VR256X, VK4WM, f256mem, |
| 140922 | /* VRCP14PDZ256r */ |
| 140923 | VR256X, VR256X, |
| 140924 | /* VRCP14PDZ256rk */ |
| 140925 | VR256X, VR256X, VK4WM, VR256X, |
| 140926 | /* VRCP14PDZ256rkz */ |
| 140927 | VR256X, VK4WM, VR256X, |
| 140928 | /* VRCP14PDZm */ |
| 140929 | VR512, f512mem, |
| 140930 | /* VRCP14PDZmb */ |
| 140931 | VR512, f64mem, |
| 140932 | /* VRCP14PDZmbk */ |
| 140933 | VR512, VR512, VK8WM, f64mem, |
| 140934 | /* VRCP14PDZmbkz */ |
| 140935 | VR512, VK8WM, f64mem, |
| 140936 | /* VRCP14PDZmk */ |
| 140937 | VR512, VR512, VK8WM, f512mem, |
| 140938 | /* VRCP14PDZmkz */ |
| 140939 | VR512, VK8WM, f512mem, |
| 140940 | /* VRCP14PDZr */ |
| 140941 | VR512, VR512, |
| 140942 | /* VRCP14PDZrk */ |
| 140943 | VR512, VR512, VK8WM, VR512, |
| 140944 | /* VRCP14PDZrkz */ |
| 140945 | VR512, VK8WM, VR512, |
| 140946 | /* VRCP14PSZ128m */ |
| 140947 | VR128X, f128mem, |
| 140948 | /* VRCP14PSZ128mb */ |
| 140949 | VR128X, f32mem, |
| 140950 | /* VRCP14PSZ128mbk */ |
| 140951 | VR128X, VR128X, VK4WM, f32mem, |
| 140952 | /* VRCP14PSZ128mbkz */ |
| 140953 | VR128X, VK4WM, f32mem, |
| 140954 | /* VRCP14PSZ128mk */ |
| 140955 | VR128X, VR128X, VK4WM, f128mem, |
| 140956 | /* VRCP14PSZ128mkz */ |
| 140957 | VR128X, VK4WM, f128mem, |
| 140958 | /* VRCP14PSZ128r */ |
| 140959 | VR128X, VR128X, |
| 140960 | /* VRCP14PSZ128rk */ |
| 140961 | VR128X, VR128X, VK4WM, VR128X, |
| 140962 | /* VRCP14PSZ128rkz */ |
| 140963 | VR128X, VK4WM, VR128X, |
| 140964 | /* VRCP14PSZ256m */ |
| 140965 | VR256X, f256mem, |
| 140966 | /* VRCP14PSZ256mb */ |
| 140967 | VR256X, f32mem, |
| 140968 | /* VRCP14PSZ256mbk */ |
| 140969 | VR256X, VR256X, VK8WM, f32mem, |
| 140970 | /* VRCP14PSZ256mbkz */ |
| 140971 | VR256X, VK8WM, f32mem, |
| 140972 | /* VRCP14PSZ256mk */ |
| 140973 | VR256X, VR256X, VK8WM, f256mem, |
| 140974 | /* VRCP14PSZ256mkz */ |
| 140975 | VR256X, VK8WM, f256mem, |
| 140976 | /* VRCP14PSZ256r */ |
| 140977 | VR256X, VR256X, |
| 140978 | /* VRCP14PSZ256rk */ |
| 140979 | VR256X, VR256X, VK8WM, VR256X, |
| 140980 | /* VRCP14PSZ256rkz */ |
| 140981 | VR256X, VK8WM, VR256X, |
| 140982 | /* VRCP14PSZm */ |
| 140983 | VR512, f512mem, |
| 140984 | /* VRCP14PSZmb */ |
| 140985 | VR512, f32mem, |
| 140986 | /* VRCP14PSZmbk */ |
| 140987 | VR512, VR512, VK16WM, f32mem, |
| 140988 | /* VRCP14PSZmbkz */ |
| 140989 | VR512, VK16WM, f32mem, |
| 140990 | /* VRCP14PSZmk */ |
| 140991 | VR512, VR512, VK16WM, f512mem, |
| 140992 | /* VRCP14PSZmkz */ |
| 140993 | VR512, VK16WM, f512mem, |
| 140994 | /* VRCP14PSZr */ |
| 140995 | VR512, VR512, |
| 140996 | /* VRCP14PSZrk */ |
| 140997 | VR512, VR512, VK16WM, VR512, |
| 140998 | /* VRCP14PSZrkz */ |
| 140999 | VR512, VK16WM, VR512, |
| 141000 | /* VRCP14SDZrm */ |
| 141001 | VR128X, VR128X, sdmem, |
| 141002 | /* VRCP14SDZrmk */ |
| 141003 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 141004 | /* VRCP14SDZrmkz */ |
| 141005 | VR128X, VK1WM, VR128X, sdmem, |
| 141006 | /* VRCP14SDZrr */ |
| 141007 | VR128X, VR128X, VR128X, |
| 141008 | /* VRCP14SDZrrk */ |
| 141009 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141010 | /* VRCP14SDZrrkz */ |
| 141011 | VR128X, VK1WM, VR128X, VR128X, |
| 141012 | /* VRCP14SSZrm */ |
| 141013 | VR128X, VR128X, ssmem, |
| 141014 | /* VRCP14SSZrmk */ |
| 141015 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 141016 | /* VRCP14SSZrmkz */ |
| 141017 | VR128X, VK1WM, VR128X, ssmem, |
| 141018 | /* VRCP14SSZrr */ |
| 141019 | VR128X, VR128X, VR128X, |
| 141020 | /* VRCP14SSZrrk */ |
| 141021 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141022 | /* VRCP14SSZrrkz */ |
| 141023 | VR128X, VK1WM, VR128X, VR128X, |
| 141024 | /* VRCP28PDZm */ |
| 141025 | VR512, f512mem, |
| 141026 | /* VRCP28PDZmb */ |
| 141027 | VR512, f64mem, |
| 141028 | /* VRCP28PDZmbk */ |
| 141029 | VR512, VR512, VK8WM, f64mem, |
| 141030 | /* VRCP28PDZmbkz */ |
| 141031 | VR512, VK8WM, f64mem, |
| 141032 | /* VRCP28PDZmk */ |
| 141033 | VR512, VR512, VK8WM, f512mem, |
| 141034 | /* VRCP28PDZmkz */ |
| 141035 | VR512, VK8WM, f512mem, |
| 141036 | /* VRCP28PDZr */ |
| 141037 | VR512, VR512, |
| 141038 | /* VRCP28PDZrb */ |
| 141039 | VR512, VR512, |
| 141040 | /* VRCP28PDZrbk */ |
| 141041 | VR512, VR512, VK8WM, VR512, |
| 141042 | /* VRCP28PDZrbkz */ |
| 141043 | VR512, VK8WM, VR512, |
| 141044 | /* VRCP28PDZrk */ |
| 141045 | VR512, VR512, VK8WM, VR512, |
| 141046 | /* VRCP28PDZrkz */ |
| 141047 | VR512, VK8WM, VR512, |
| 141048 | /* VRCP28PSZm */ |
| 141049 | VR512, f512mem, |
| 141050 | /* VRCP28PSZmb */ |
| 141051 | VR512, f32mem, |
| 141052 | /* VRCP28PSZmbk */ |
| 141053 | VR512, VR512, VK16WM, f32mem, |
| 141054 | /* VRCP28PSZmbkz */ |
| 141055 | VR512, VK16WM, f32mem, |
| 141056 | /* VRCP28PSZmk */ |
| 141057 | VR512, VR512, VK16WM, f512mem, |
| 141058 | /* VRCP28PSZmkz */ |
| 141059 | VR512, VK16WM, f512mem, |
| 141060 | /* VRCP28PSZr */ |
| 141061 | VR512, VR512, |
| 141062 | /* VRCP28PSZrb */ |
| 141063 | VR512, VR512, |
| 141064 | /* VRCP28PSZrbk */ |
| 141065 | VR512, VR512, VK16WM, VR512, |
| 141066 | /* VRCP28PSZrbkz */ |
| 141067 | VR512, VK16WM, VR512, |
| 141068 | /* VRCP28PSZrk */ |
| 141069 | VR512, VR512, VK16WM, VR512, |
| 141070 | /* VRCP28PSZrkz */ |
| 141071 | VR512, VK16WM, VR512, |
| 141072 | /* VRCP28SDZm */ |
| 141073 | VR128X, VR128X, sdmem, |
| 141074 | /* VRCP28SDZmk */ |
| 141075 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 141076 | /* VRCP28SDZmkz */ |
| 141077 | VR128X, VK1WM, VR128X, sdmem, |
| 141078 | /* VRCP28SDZr */ |
| 141079 | VR128X, VR128X, VR128X, |
| 141080 | /* VRCP28SDZrb */ |
| 141081 | VR128X, VR128X, VR128X, |
| 141082 | /* VRCP28SDZrbk */ |
| 141083 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141084 | /* VRCP28SDZrbkz */ |
| 141085 | VR128X, VK1WM, VR128X, VR128X, |
| 141086 | /* VRCP28SDZrk */ |
| 141087 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141088 | /* VRCP28SDZrkz */ |
| 141089 | VR128X, VK1WM, VR128X, VR128X, |
| 141090 | /* VRCP28SSZm */ |
| 141091 | VR128X, VR128X, ssmem, |
| 141092 | /* VRCP28SSZmk */ |
| 141093 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 141094 | /* VRCP28SSZmkz */ |
| 141095 | VR128X, VK1WM, VR128X, ssmem, |
| 141096 | /* VRCP28SSZr */ |
| 141097 | VR128X, VR128X, VR128X, |
| 141098 | /* VRCP28SSZrb */ |
| 141099 | VR128X, VR128X, VR128X, |
| 141100 | /* VRCP28SSZrbk */ |
| 141101 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141102 | /* VRCP28SSZrbkz */ |
| 141103 | VR128X, VK1WM, VR128X, VR128X, |
| 141104 | /* VRCP28SSZrk */ |
| 141105 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141106 | /* VRCP28SSZrkz */ |
| 141107 | VR128X, VK1WM, VR128X, VR128X, |
| 141108 | /* VRCPPHZ128m */ |
| 141109 | VR128X, f128mem, |
| 141110 | /* VRCPPHZ128mb */ |
| 141111 | VR128X, f16mem, |
| 141112 | /* VRCPPHZ128mbk */ |
| 141113 | VR128X, VR128X, VK8WM, f16mem, |
| 141114 | /* VRCPPHZ128mbkz */ |
| 141115 | VR128X, VK8WM, f16mem, |
| 141116 | /* VRCPPHZ128mk */ |
| 141117 | VR128X, VR128X, VK8WM, f128mem, |
| 141118 | /* VRCPPHZ128mkz */ |
| 141119 | VR128X, VK8WM, f128mem, |
| 141120 | /* VRCPPHZ128r */ |
| 141121 | VR128X, VR128X, |
| 141122 | /* VRCPPHZ128rk */ |
| 141123 | VR128X, VR128X, VK8WM, VR128X, |
| 141124 | /* VRCPPHZ128rkz */ |
| 141125 | VR128X, VK8WM, VR128X, |
| 141126 | /* VRCPPHZ256m */ |
| 141127 | VR256X, f256mem, |
| 141128 | /* VRCPPHZ256mb */ |
| 141129 | VR256X, f16mem, |
| 141130 | /* VRCPPHZ256mbk */ |
| 141131 | VR256X, VR256X, VK16WM, f16mem, |
| 141132 | /* VRCPPHZ256mbkz */ |
| 141133 | VR256X, VK16WM, f16mem, |
| 141134 | /* VRCPPHZ256mk */ |
| 141135 | VR256X, VR256X, VK16WM, f256mem, |
| 141136 | /* VRCPPHZ256mkz */ |
| 141137 | VR256X, VK16WM, f256mem, |
| 141138 | /* VRCPPHZ256r */ |
| 141139 | VR256X, VR256X, |
| 141140 | /* VRCPPHZ256rk */ |
| 141141 | VR256X, VR256X, VK16WM, VR256X, |
| 141142 | /* VRCPPHZ256rkz */ |
| 141143 | VR256X, VK16WM, VR256X, |
| 141144 | /* VRCPPHZm */ |
| 141145 | VR512, f512mem, |
| 141146 | /* VRCPPHZmb */ |
| 141147 | VR512, f16mem, |
| 141148 | /* VRCPPHZmbk */ |
| 141149 | VR512, VR512, VK32WM, f16mem, |
| 141150 | /* VRCPPHZmbkz */ |
| 141151 | VR512, VK32WM, f16mem, |
| 141152 | /* VRCPPHZmk */ |
| 141153 | VR512, VR512, VK32WM, f512mem, |
| 141154 | /* VRCPPHZmkz */ |
| 141155 | VR512, VK32WM, f512mem, |
| 141156 | /* VRCPPHZr */ |
| 141157 | VR512, VR512, |
| 141158 | /* VRCPPHZrk */ |
| 141159 | VR512, VR512, VK32WM, VR512, |
| 141160 | /* VRCPPHZrkz */ |
| 141161 | VR512, VK32WM, VR512, |
| 141162 | /* VRCPPSYm */ |
| 141163 | VR256, f256mem, |
| 141164 | /* VRCPPSYr */ |
| 141165 | VR256, VR256, |
| 141166 | /* VRCPPSm */ |
| 141167 | VR128, f128mem, |
| 141168 | /* VRCPPSr */ |
| 141169 | VR128, VR128, |
| 141170 | /* VRCPSHZrm */ |
| 141171 | VR128X, VR128X, shmem, |
| 141172 | /* VRCPSHZrmk */ |
| 141173 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 141174 | /* VRCPSHZrmkz */ |
| 141175 | VR128X, VK1WM, VR128X, shmem, |
| 141176 | /* VRCPSHZrr */ |
| 141177 | VR128X, VR128X, VR128X, |
| 141178 | /* VRCPSHZrrk */ |
| 141179 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141180 | /* VRCPSHZrrkz */ |
| 141181 | VR128X, VK1WM, VR128X, VR128X, |
| 141182 | /* VRCPSSm */ |
| 141183 | FR32, FR32, f32mem, |
| 141184 | /* VRCPSSm_Int */ |
| 141185 | VR128, VR128, ssmem, |
| 141186 | /* VRCPSSr */ |
| 141187 | FR32, FR32, FR32, |
| 141188 | /* VRCPSSr_Int */ |
| 141189 | VR128, VR128, VR128, |
| 141190 | /* VREDUCEPDZ128rmbi */ |
| 141191 | VR128X, f64mem, i32u8imm, |
| 141192 | /* VREDUCEPDZ128rmbik */ |
| 141193 | VR128X, VR128X, VK2WM, f64mem, i32u8imm, |
| 141194 | /* VREDUCEPDZ128rmbikz */ |
| 141195 | VR128X, VK2WM, f64mem, i32u8imm, |
| 141196 | /* VREDUCEPDZ128rmi */ |
| 141197 | VR128X, f128mem, i32u8imm, |
| 141198 | /* VREDUCEPDZ128rmik */ |
| 141199 | VR128X, VR128X, VK2WM, f128mem, i32u8imm, |
| 141200 | /* VREDUCEPDZ128rmikz */ |
| 141201 | VR128X, VK2WM, f128mem, i32u8imm, |
| 141202 | /* VREDUCEPDZ128rri */ |
| 141203 | VR128X, VR128X, i32u8imm, |
| 141204 | /* VREDUCEPDZ128rrik */ |
| 141205 | VR128X, VR128X, VK2WM, VR128X, i32u8imm, |
| 141206 | /* VREDUCEPDZ128rrikz */ |
| 141207 | VR128X, VK2WM, VR128X, i32u8imm, |
| 141208 | /* VREDUCEPDZ256rmbi */ |
| 141209 | VR256X, f64mem, i32u8imm, |
| 141210 | /* VREDUCEPDZ256rmbik */ |
| 141211 | VR256X, VR256X, VK4WM, f64mem, i32u8imm, |
| 141212 | /* VREDUCEPDZ256rmbikz */ |
| 141213 | VR256X, VK4WM, f64mem, i32u8imm, |
| 141214 | /* VREDUCEPDZ256rmi */ |
| 141215 | VR256X, f256mem, i32u8imm, |
| 141216 | /* VREDUCEPDZ256rmik */ |
| 141217 | VR256X, VR256X, VK4WM, f256mem, i32u8imm, |
| 141218 | /* VREDUCEPDZ256rmikz */ |
| 141219 | VR256X, VK4WM, f256mem, i32u8imm, |
| 141220 | /* VREDUCEPDZ256rri */ |
| 141221 | VR256X, VR256X, i32u8imm, |
| 141222 | /* VREDUCEPDZ256rrik */ |
| 141223 | VR256X, VR256X, VK4WM, VR256X, i32u8imm, |
| 141224 | /* VREDUCEPDZ256rrikz */ |
| 141225 | VR256X, VK4WM, VR256X, i32u8imm, |
| 141226 | /* VREDUCEPDZrmbi */ |
| 141227 | VR512, f64mem, i32u8imm, |
| 141228 | /* VREDUCEPDZrmbik */ |
| 141229 | VR512, VR512, VK8WM, f64mem, i32u8imm, |
| 141230 | /* VREDUCEPDZrmbikz */ |
| 141231 | VR512, VK8WM, f64mem, i32u8imm, |
| 141232 | /* VREDUCEPDZrmi */ |
| 141233 | VR512, f512mem, i32u8imm, |
| 141234 | /* VREDUCEPDZrmik */ |
| 141235 | VR512, VR512, VK8WM, f512mem, i32u8imm, |
| 141236 | /* VREDUCEPDZrmikz */ |
| 141237 | VR512, VK8WM, f512mem, i32u8imm, |
| 141238 | /* VREDUCEPDZrri */ |
| 141239 | VR512, VR512, i32u8imm, |
| 141240 | /* VREDUCEPDZrrib */ |
| 141241 | VR512, VR512, i32u8imm, |
| 141242 | /* VREDUCEPDZrribk */ |
| 141243 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 141244 | /* VREDUCEPDZrribkz */ |
| 141245 | VR512, VK8WM, VR512, i32u8imm, |
| 141246 | /* VREDUCEPDZrrik */ |
| 141247 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 141248 | /* VREDUCEPDZrrikz */ |
| 141249 | VR512, VK8WM, VR512, i32u8imm, |
| 141250 | /* VREDUCEPHZ128rmbi */ |
| 141251 | VR128X, f16mem, i32u8imm, |
| 141252 | /* VREDUCEPHZ128rmbik */ |
| 141253 | VR128X, VR128X, VK8WM, f16mem, i32u8imm, |
| 141254 | /* VREDUCEPHZ128rmbikz */ |
| 141255 | VR128X, VK8WM, f16mem, i32u8imm, |
| 141256 | /* VREDUCEPHZ128rmi */ |
| 141257 | VR128X, f128mem, i32u8imm, |
| 141258 | /* VREDUCEPHZ128rmik */ |
| 141259 | VR128X, VR128X, VK8WM, f128mem, i32u8imm, |
| 141260 | /* VREDUCEPHZ128rmikz */ |
| 141261 | VR128X, VK8WM, f128mem, i32u8imm, |
| 141262 | /* VREDUCEPHZ128rri */ |
| 141263 | VR128X, VR128X, i32u8imm, |
| 141264 | /* VREDUCEPHZ128rrik */ |
| 141265 | VR128X, VR128X, VK8WM, VR128X, i32u8imm, |
| 141266 | /* VREDUCEPHZ128rrikz */ |
| 141267 | VR128X, VK8WM, VR128X, i32u8imm, |
| 141268 | /* VREDUCEPHZ256rmbi */ |
| 141269 | VR256X, f16mem, i32u8imm, |
| 141270 | /* VREDUCEPHZ256rmbik */ |
| 141271 | VR256X, VR256X, VK16WM, f16mem, i32u8imm, |
| 141272 | /* VREDUCEPHZ256rmbikz */ |
| 141273 | VR256X, VK16WM, f16mem, i32u8imm, |
| 141274 | /* VREDUCEPHZ256rmi */ |
| 141275 | VR256X, f256mem, i32u8imm, |
| 141276 | /* VREDUCEPHZ256rmik */ |
| 141277 | VR256X, VR256X, VK16WM, f256mem, i32u8imm, |
| 141278 | /* VREDUCEPHZ256rmikz */ |
| 141279 | VR256X, VK16WM, f256mem, i32u8imm, |
| 141280 | /* VREDUCEPHZ256rri */ |
| 141281 | VR256X, VR256X, i32u8imm, |
| 141282 | /* VREDUCEPHZ256rrik */ |
| 141283 | VR256X, VR256X, VK16WM, VR256X, i32u8imm, |
| 141284 | /* VREDUCEPHZ256rrikz */ |
| 141285 | VR256X, VK16WM, VR256X, i32u8imm, |
| 141286 | /* VREDUCEPHZrmbi */ |
| 141287 | VR512, f16mem, i32u8imm, |
| 141288 | /* VREDUCEPHZrmbik */ |
| 141289 | VR512, VR512, VK32WM, f16mem, i32u8imm, |
| 141290 | /* VREDUCEPHZrmbikz */ |
| 141291 | VR512, VK32WM, f16mem, i32u8imm, |
| 141292 | /* VREDUCEPHZrmi */ |
| 141293 | VR512, f512mem, i32u8imm, |
| 141294 | /* VREDUCEPHZrmik */ |
| 141295 | VR512, VR512, VK32WM, f512mem, i32u8imm, |
| 141296 | /* VREDUCEPHZrmikz */ |
| 141297 | VR512, VK32WM, f512mem, i32u8imm, |
| 141298 | /* VREDUCEPHZrri */ |
| 141299 | VR512, VR512, i32u8imm, |
| 141300 | /* VREDUCEPHZrrib */ |
| 141301 | VR512, VR512, i32u8imm, |
| 141302 | /* VREDUCEPHZrribk */ |
| 141303 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 141304 | /* VREDUCEPHZrribkz */ |
| 141305 | VR512, VK32WM, VR512, i32u8imm, |
| 141306 | /* VREDUCEPHZrrik */ |
| 141307 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 141308 | /* VREDUCEPHZrrikz */ |
| 141309 | VR512, VK32WM, VR512, i32u8imm, |
| 141310 | /* VREDUCEPSZ128rmbi */ |
| 141311 | VR128X, f32mem, i32u8imm, |
| 141312 | /* VREDUCEPSZ128rmbik */ |
| 141313 | VR128X, VR128X, VK4WM, f32mem, i32u8imm, |
| 141314 | /* VREDUCEPSZ128rmbikz */ |
| 141315 | VR128X, VK4WM, f32mem, i32u8imm, |
| 141316 | /* VREDUCEPSZ128rmi */ |
| 141317 | VR128X, f128mem, i32u8imm, |
| 141318 | /* VREDUCEPSZ128rmik */ |
| 141319 | VR128X, VR128X, VK4WM, f128mem, i32u8imm, |
| 141320 | /* VREDUCEPSZ128rmikz */ |
| 141321 | VR128X, VK4WM, f128mem, i32u8imm, |
| 141322 | /* VREDUCEPSZ128rri */ |
| 141323 | VR128X, VR128X, i32u8imm, |
| 141324 | /* VREDUCEPSZ128rrik */ |
| 141325 | VR128X, VR128X, VK4WM, VR128X, i32u8imm, |
| 141326 | /* VREDUCEPSZ128rrikz */ |
| 141327 | VR128X, VK4WM, VR128X, i32u8imm, |
| 141328 | /* VREDUCEPSZ256rmbi */ |
| 141329 | VR256X, f32mem, i32u8imm, |
| 141330 | /* VREDUCEPSZ256rmbik */ |
| 141331 | VR256X, VR256X, VK8WM, f32mem, i32u8imm, |
| 141332 | /* VREDUCEPSZ256rmbikz */ |
| 141333 | VR256X, VK8WM, f32mem, i32u8imm, |
| 141334 | /* VREDUCEPSZ256rmi */ |
| 141335 | VR256X, f256mem, i32u8imm, |
| 141336 | /* VREDUCEPSZ256rmik */ |
| 141337 | VR256X, VR256X, VK8WM, f256mem, i32u8imm, |
| 141338 | /* VREDUCEPSZ256rmikz */ |
| 141339 | VR256X, VK8WM, f256mem, i32u8imm, |
| 141340 | /* VREDUCEPSZ256rri */ |
| 141341 | VR256X, VR256X, i32u8imm, |
| 141342 | /* VREDUCEPSZ256rrik */ |
| 141343 | VR256X, VR256X, VK8WM, VR256X, i32u8imm, |
| 141344 | /* VREDUCEPSZ256rrikz */ |
| 141345 | VR256X, VK8WM, VR256X, i32u8imm, |
| 141346 | /* VREDUCEPSZrmbi */ |
| 141347 | VR512, f32mem, i32u8imm, |
| 141348 | /* VREDUCEPSZrmbik */ |
| 141349 | VR512, VR512, VK16WM, f32mem, i32u8imm, |
| 141350 | /* VREDUCEPSZrmbikz */ |
| 141351 | VR512, VK16WM, f32mem, i32u8imm, |
| 141352 | /* VREDUCEPSZrmi */ |
| 141353 | VR512, f512mem, i32u8imm, |
| 141354 | /* VREDUCEPSZrmik */ |
| 141355 | VR512, VR512, VK16WM, f512mem, i32u8imm, |
| 141356 | /* VREDUCEPSZrmikz */ |
| 141357 | VR512, VK16WM, f512mem, i32u8imm, |
| 141358 | /* VREDUCEPSZrri */ |
| 141359 | VR512, VR512, i32u8imm, |
| 141360 | /* VREDUCEPSZrrib */ |
| 141361 | VR512, VR512, i32u8imm, |
| 141362 | /* VREDUCEPSZrribk */ |
| 141363 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 141364 | /* VREDUCEPSZrribkz */ |
| 141365 | VR512, VK16WM, VR512, i32u8imm, |
| 141366 | /* VREDUCEPSZrrik */ |
| 141367 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 141368 | /* VREDUCEPSZrrikz */ |
| 141369 | VR512, VK16WM, VR512, i32u8imm, |
| 141370 | /* VREDUCESDZrmi */ |
| 141371 | VR128X, VR128X, sdmem, i32u8imm, |
| 141372 | /* VREDUCESDZrmik */ |
| 141373 | VR128X, VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 141374 | /* VREDUCESDZrmikz */ |
| 141375 | VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 141376 | /* VREDUCESDZrri */ |
| 141377 | VR128X, VR128X, VR128X, i32u8imm, |
| 141378 | /* VREDUCESDZrrib */ |
| 141379 | VR128X, VR128X, VR128X, i32u8imm, |
| 141380 | /* VREDUCESDZrribk */ |
| 141381 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141382 | /* VREDUCESDZrribkz */ |
| 141383 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141384 | /* VREDUCESDZrrik */ |
| 141385 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141386 | /* VREDUCESDZrrikz */ |
| 141387 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141388 | /* VREDUCESHZrmi */ |
| 141389 | VR128X, VR128X, shmem, i32u8imm, |
| 141390 | /* VREDUCESHZrmik */ |
| 141391 | VR128X, VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 141392 | /* VREDUCESHZrmikz */ |
| 141393 | VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 141394 | /* VREDUCESHZrri */ |
| 141395 | VR128X, VR128X, VR128X, i32u8imm, |
| 141396 | /* VREDUCESHZrrib */ |
| 141397 | VR128X, VR128X, VR128X, i32u8imm, |
| 141398 | /* VREDUCESHZrribk */ |
| 141399 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141400 | /* VREDUCESHZrribkz */ |
| 141401 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141402 | /* VREDUCESHZrrik */ |
| 141403 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141404 | /* VREDUCESHZrrikz */ |
| 141405 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141406 | /* VREDUCESSZrmi */ |
| 141407 | VR128X, VR128X, ssmem, i32u8imm, |
| 141408 | /* VREDUCESSZrmik */ |
| 141409 | VR128X, VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 141410 | /* VREDUCESSZrmikz */ |
| 141411 | VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 141412 | /* VREDUCESSZrri */ |
| 141413 | VR128X, VR128X, VR128X, i32u8imm, |
| 141414 | /* VREDUCESSZrrib */ |
| 141415 | VR128X, VR128X, VR128X, i32u8imm, |
| 141416 | /* VREDUCESSZrribk */ |
| 141417 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141418 | /* VREDUCESSZrribkz */ |
| 141419 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141420 | /* VREDUCESSZrrik */ |
| 141421 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141422 | /* VREDUCESSZrrikz */ |
| 141423 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141424 | /* VRNDSCALEPDZ128rmbi */ |
| 141425 | VR128X, f64mem, i32u8imm, |
| 141426 | /* VRNDSCALEPDZ128rmbik */ |
| 141427 | VR128X, VR128X, VK2WM, f64mem, i32u8imm, |
| 141428 | /* VRNDSCALEPDZ128rmbikz */ |
| 141429 | VR128X, VK2WM, f64mem, i32u8imm, |
| 141430 | /* VRNDSCALEPDZ128rmi */ |
| 141431 | VR128X, f128mem, i32u8imm, |
| 141432 | /* VRNDSCALEPDZ128rmik */ |
| 141433 | VR128X, VR128X, VK2WM, f128mem, i32u8imm, |
| 141434 | /* VRNDSCALEPDZ128rmikz */ |
| 141435 | VR128X, VK2WM, f128mem, i32u8imm, |
| 141436 | /* VRNDSCALEPDZ128rri */ |
| 141437 | VR128X, VR128X, i32u8imm, |
| 141438 | /* VRNDSCALEPDZ128rrik */ |
| 141439 | VR128X, VR128X, VK2WM, VR128X, i32u8imm, |
| 141440 | /* VRNDSCALEPDZ128rrikz */ |
| 141441 | VR128X, VK2WM, VR128X, i32u8imm, |
| 141442 | /* VRNDSCALEPDZ256rmbi */ |
| 141443 | VR256X, f64mem, i32u8imm, |
| 141444 | /* VRNDSCALEPDZ256rmbik */ |
| 141445 | VR256X, VR256X, VK4WM, f64mem, i32u8imm, |
| 141446 | /* VRNDSCALEPDZ256rmbikz */ |
| 141447 | VR256X, VK4WM, f64mem, i32u8imm, |
| 141448 | /* VRNDSCALEPDZ256rmi */ |
| 141449 | VR256X, f256mem, i32u8imm, |
| 141450 | /* VRNDSCALEPDZ256rmik */ |
| 141451 | VR256X, VR256X, VK4WM, f256mem, i32u8imm, |
| 141452 | /* VRNDSCALEPDZ256rmikz */ |
| 141453 | VR256X, VK4WM, f256mem, i32u8imm, |
| 141454 | /* VRNDSCALEPDZ256rri */ |
| 141455 | VR256X, VR256X, i32u8imm, |
| 141456 | /* VRNDSCALEPDZ256rrik */ |
| 141457 | VR256X, VR256X, VK4WM, VR256X, i32u8imm, |
| 141458 | /* VRNDSCALEPDZ256rrikz */ |
| 141459 | VR256X, VK4WM, VR256X, i32u8imm, |
| 141460 | /* VRNDSCALEPDZrmbi */ |
| 141461 | VR512, f64mem, i32u8imm, |
| 141462 | /* VRNDSCALEPDZrmbik */ |
| 141463 | VR512, VR512, VK8WM, f64mem, i32u8imm, |
| 141464 | /* VRNDSCALEPDZrmbikz */ |
| 141465 | VR512, VK8WM, f64mem, i32u8imm, |
| 141466 | /* VRNDSCALEPDZrmi */ |
| 141467 | VR512, f512mem, i32u8imm, |
| 141468 | /* VRNDSCALEPDZrmik */ |
| 141469 | VR512, VR512, VK8WM, f512mem, i32u8imm, |
| 141470 | /* VRNDSCALEPDZrmikz */ |
| 141471 | VR512, VK8WM, f512mem, i32u8imm, |
| 141472 | /* VRNDSCALEPDZrri */ |
| 141473 | VR512, VR512, i32u8imm, |
| 141474 | /* VRNDSCALEPDZrrib */ |
| 141475 | VR512, VR512, i32u8imm, |
| 141476 | /* VRNDSCALEPDZrribk */ |
| 141477 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 141478 | /* VRNDSCALEPDZrribkz */ |
| 141479 | VR512, VK8WM, VR512, i32u8imm, |
| 141480 | /* VRNDSCALEPDZrrik */ |
| 141481 | VR512, VR512, VK8WM, VR512, i32u8imm, |
| 141482 | /* VRNDSCALEPDZrrikz */ |
| 141483 | VR512, VK8WM, VR512, i32u8imm, |
| 141484 | /* VRNDSCALEPHZ128rmbi */ |
| 141485 | VR128X, f16mem, i32u8imm, |
| 141486 | /* VRNDSCALEPHZ128rmbik */ |
| 141487 | VR128X, VR128X, VK8WM, f16mem, i32u8imm, |
| 141488 | /* VRNDSCALEPHZ128rmbikz */ |
| 141489 | VR128X, VK8WM, f16mem, i32u8imm, |
| 141490 | /* VRNDSCALEPHZ128rmi */ |
| 141491 | VR128X, f128mem, i32u8imm, |
| 141492 | /* VRNDSCALEPHZ128rmik */ |
| 141493 | VR128X, VR128X, VK8WM, f128mem, i32u8imm, |
| 141494 | /* VRNDSCALEPHZ128rmikz */ |
| 141495 | VR128X, VK8WM, f128mem, i32u8imm, |
| 141496 | /* VRNDSCALEPHZ128rri */ |
| 141497 | VR128X, VR128X, i32u8imm, |
| 141498 | /* VRNDSCALEPHZ128rrik */ |
| 141499 | VR128X, VR128X, VK8WM, VR128X, i32u8imm, |
| 141500 | /* VRNDSCALEPHZ128rrikz */ |
| 141501 | VR128X, VK8WM, VR128X, i32u8imm, |
| 141502 | /* VRNDSCALEPHZ256rmbi */ |
| 141503 | VR256X, f16mem, i32u8imm, |
| 141504 | /* VRNDSCALEPHZ256rmbik */ |
| 141505 | VR256X, VR256X, VK16WM, f16mem, i32u8imm, |
| 141506 | /* VRNDSCALEPHZ256rmbikz */ |
| 141507 | VR256X, VK16WM, f16mem, i32u8imm, |
| 141508 | /* VRNDSCALEPHZ256rmi */ |
| 141509 | VR256X, f256mem, i32u8imm, |
| 141510 | /* VRNDSCALEPHZ256rmik */ |
| 141511 | VR256X, VR256X, VK16WM, f256mem, i32u8imm, |
| 141512 | /* VRNDSCALEPHZ256rmikz */ |
| 141513 | VR256X, VK16WM, f256mem, i32u8imm, |
| 141514 | /* VRNDSCALEPHZ256rri */ |
| 141515 | VR256X, VR256X, i32u8imm, |
| 141516 | /* VRNDSCALEPHZ256rrik */ |
| 141517 | VR256X, VR256X, VK16WM, VR256X, i32u8imm, |
| 141518 | /* VRNDSCALEPHZ256rrikz */ |
| 141519 | VR256X, VK16WM, VR256X, i32u8imm, |
| 141520 | /* VRNDSCALEPHZrmbi */ |
| 141521 | VR512, f16mem, i32u8imm, |
| 141522 | /* VRNDSCALEPHZrmbik */ |
| 141523 | VR512, VR512, VK32WM, f16mem, i32u8imm, |
| 141524 | /* VRNDSCALEPHZrmbikz */ |
| 141525 | VR512, VK32WM, f16mem, i32u8imm, |
| 141526 | /* VRNDSCALEPHZrmi */ |
| 141527 | VR512, f512mem, i32u8imm, |
| 141528 | /* VRNDSCALEPHZrmik */ |
| 141529 | VR512, VR512, VK32WM, f512mem, i32u8imm, |
| 141530 | /* VRNDSCALEPHZrmikz */ |
| 141531 | VR512, VK32WM, f512mem, i32u8imm, |
| 141532 | /* VRNDSCALEPHZrri */ |
| 141533 | VR512, VR512, i32u8imm, |
| 141534 | /* VRNDSCALEPHZrrib */ |
| 141535 | VR512, VR512, i32u8imm, |
| 141536 | /* VRNDSCALEPHZrribk */ |
| 141537 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 141538 | /* VRNDSCALEPHZrribkz */ |
| 141539 | VR512, VK32WM, VR512, i32u8imm, |
| 141540 | /* VRNDSCALEPHZrrik */ |
| 141541 | VR512, VR512, VK32WM, VR512, i32u8imm, |
| 141542 | /* VRNDSCALEPHZrrikz */ |
| 141543 | VR512, VK32WM, VR512, i32u8imm, |
| 141544 | /* VRNDSCALEPSZ128rmbi */ |
| 141545 | VR128X, f32mem, i32u8imm, |
| 141546 | /* VRNDSCALEPSZ128rmbik */ |
| 141547 | VR128X, VR128X, VK4WM, f32mem, i32u8imm, |
| 141548 | /* VRNDSCALEPSZ128rmbikz */ |
| 141549 | VR128X, VK4WM, f32mem, i32u8imm, |
| 141550 | /* VRNDSCALEPSZ128rmi */ |
| 141551 | VR128X, f128mem, i32u8imm, |
| 141552 | /* VRNDSCALEPSZ128rmik */ |
| 141553 | VR128X, VR128X, VK4WM, f128mem, i32u8imm, |
| 141554 | /* VRNDSCALEPSZ128rmikz */ |
| 141555 | VR128X, VK4WM, f128mem, i32u8imm, |
| 141556 | /* VRNDSCALEPSZ128rri */ |
| 141557 | VR128X, VR128X, i32u8imm, |
| 141558 | /* VRNDSCALEPSZ128rrik */ |
| 141559 | VR128X, VR128X, VK4WM, VR128X, i32u8imm, |
| 141560 | /* VRNDSCALEPSZ128rrikz */ |
| 141561 | VR128X, VK4WM, VR128X, i32u8imm, |
| 141562 | /* VRNDSCALEPSZ256rmbi */ |
| 141563 | VR256X, f32mem, i32u8imm, |
| 141564 | /* VRNDSCALEPSZ256rmbik */ |
| 141565 | VR256X, VR256X, VK8WM, f32mem, i32u8imm, |
| 141566 | /* VRNDSCALEPSZ256rmbikz */ |
| 141567 | VR256X, VK8WM, f32mem, i32u8imm, |
| 141568 | /* VRNDSCALEPSZ256rmi */ |
| 141569 | VR256X, f256mem, i32u8imm, |
| 141570 | /* VRNDSCALEPSZ256rmik */ |
| 141571 | VR256X, VR256X, VK8WM, f256mem, i32u8imm, |
| 141572 | /* VRNDSCALEPSZ256rmikz */ |
| 141573 | VR256X, VK8WM, f256mem, i32u8imm, |
| 141574 | /* VRNDSCALEPSZ256rri */ |
| 141575 | VR256X, VR256X, i32u8imm, |
| 141576 | /* VRNDSCALEPSZ256rrik */ |
| 141577 | VR256X, VR256X, VK8WM, VR256X, i32u8imm, |
| 141578 | /* VRNDSCALEPSZ256rrikz */ |
| 141579 | VR256X, VK8WM, VR256X, i32u8imm, |
| 141580 | /* VRNDSCALEPSZrmbi */ |
| 141581 | VR512, f32mem, i32u8imm, |
| 141582 | /* VRNDSCALEPSZrmbik */ |
| 141583 | VR512, VR512, VK16WM, f32mem, i32u8imm, |
| 141584 | /* VRNDSCALEPSZrmbikz */ |
| 141585 | VR512, VK16WM, f32mem, i32u8imm, |
| 141586 | /* VRNDSCALEPSZrmi */ |
| 141587 | VR512, f512mem, i32u8imm, |
| 141588 | /* VRNDSCALEPSZrmik */ |
| 141589 | VR512, VR512, VK16WM, f512mem, i32u8imm, |
| 141590 | /* VRNDSCALEPSZrmikz */ |
| 141591 | VR512, VK16WM, f512mem, i32u8imm, |
| 141592 | /* VRNDSCALEPSZrri */ |
| 141593 | VR512, VR512, i32u8imm, |
| 141594 | /* VRNDSCALEPSZrrib */ |
| 141595 | VR512, VR512, i32u8imm, |
| 141596 | /* VRNDSCALEPSZrribk */ |
| 141597 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 141598 | /* VRNDSCALEPSZrribkz */ |
| 141599 | VR512, VK16WM, VR512, i32u8imm, |
| 141600 | /* VRNDSCALEPSZrrik */ |
| 141601 | VR512, VR512, VK16WM, VR512, i32u8imm, |
| 141602 | /* VRNDSCALEPSZrrikz */ |
| 141603 | VR512, VK16WM, VR512, i32u8imm, |
| 141604 | /* VRNDSCALESDZm */ |
| 141605 | FR64X, FR64X, f64mem, i32u8imm, |
| 141606 | /* VRNDSCALESDZm_Int */ |
| 141607 | VR128X, VR128X, sdmem, i32u8imm, |
| 141608 | /* VRNDSCALESDZm_Intk */ |
| 141609 | VR128X, VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 141610 | /* VRNDSCALESDZm_Intkz */ |
| 141611 | VR128X, VK1WM, VR128X, sdmem, i32u8imm, |
| 141612 | /* VRNDSCALESDZr */ |
| 141613 | FR64X, FR64X, FR64X, i32u8imm, |
| 141614 | /* VRNDSCALESDZr_Int */ |
| 141615 | VR128X, VR128X, VR128X, i32u8imm, |
| 141616 | /* VRNDSCALESDZr_Intk */ |
| 141617 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141618 | /* VRNDSCALESDZr_Intkz */ |
| 141619 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141620 | /* VRNDSCALESDZrb_Int */ |
| 141621 | VR128X, VR128X, VR128X, i32u8imm, |
| 141622 | /* VRNDSCALESDZrb_Intk */ |
| 141623 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141624 | /* VRNDSCALESDZrb_Intkz */ |
| 141625 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141626 | /* VRNDSCALESHZm */ |
| 141627 | FR16X, FR16X, f16mem, i32u8imm, |
| 141628 | /* VRNDSCALESHZm_Int */ |
| 141629 | VR128X, VR128X, shmem, i32u8imm, |
| 141630 | /* VRNDSCALESHZm_Intk */ |
| 141631 | VR128X, VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 141632 | /* VRNDSCALESHZm_Intkz */ |
| 141633 | VR128X, VK1WM, VR128X, shmem, i32u8imm, |
| 141634 | /* VRNDSCALESHZr */ |
| 141635 | FR16X, FR16X, FR16X, i32u8imm, |
| 141636 | /* VRNDSCALESHZr_Int */ |
| 141637 | VR128X, VR128X, VR128X, i32u8imm, |
| 141638 | /* VRNDSCALESHZr_Intk */ |
| 141639 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141640 | /* VRNDSCALESHZr_Intkz */ |
| 141641 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141642 | /* VRNDSCALESHZrb_Int */ |
| 141643 | VR128X, VR128X, VR128X, i32u8imm, |
| 141644 | /* VRNDSCALESHZrb_Intk */ |
| 141645 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141646 | /* VRNDSCALESHZrb_Intkz */ |
| 141647 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141648 | /* VRNDSCALESSZm */ |
| 141649 | FR32X, FR32X, f32mem, i32u8imm, |
| 141650 | /* VRNDSCALESSZm_Int */ |
| 141651 | VR128X, VR128X, ssmem, i32u8imm, |
| 141652 | /* VRNDSCALESSZm_Intk */ |
| 141653 | VR128X, VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 141654 | /* VRNDSCALESSZm_Intkz */ |
| 141655 | VR128X, VK1WM, VR128X, ssmem, i32u8imm, |
| 141656 | /* VRNDSCALESSZr */ |
| 141657 | FR32X, FR32X, FR32X, i32u8imm, |
| 141658 | /* VRNDSCALESSZr_Int */ |
| 141659 | VR128X, VR128X, VR128X, i32u8imm, |
| 141660 | /* VRNDSCALESSZr_Intk */ |
| 141661 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141662 | /* VRNDSCALESSZr_Intkz */ |
| 141663 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141664 | /* VRNDSCALESSZrb_Int */ |
| 141665 | VR128X, VR128X, VR128X, i32u8imm, |
| 141666 | /* VRNDSCALESSZrb_Intk */ |
| 141667 | VR128X, VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141668 | /* VRNDSCALESSZrb_Intkz */ |
| 141669 | VR128X, VK1WM, VR128X, VR128X, i32u8imm, |
| 141670 | /* VROUNDPDYmi */ |
| 141671 | VR256, f256mem, i32u8imm, |
| 141672 | /* VROUNDPDYri */ |
| 141673 | VR256, VR256, i32u8imm, |
| 141674 | /* VROUNDPDmi */ |
| 141675 | VR128, f128mem, i32u8imm, |
| 141676 | /* VROUNDPDri */ |
| 141677 | VR128, VR128, i32u8imm, |
| 141678 | /* VROUNDPSYmi */ |
| 141679 | VR256, f256mem, i32u8imm, |
| 141680 | /* VROUNDPSYri */ |
| 141681 | VR256, VR256, i32u8imm, |
| 141682 | /* VROUNDPSmi */ |
| 141683 | VR128, f128mem, i32u8imm, |
| 141684 | /* VROUNDPSri */ |
| 141685 | VR128, VR128, i32u8imm, |
| 141686 | /* VROUNDSDmi */ |
| 141687 | FR64, FR64, f64mem, i32u8imm, |
| 141688 | /* VROUNDSDmi_Int */ |
| 141689 | VR128, VR128, sdmem, i32u8imm, |
| 141690 | /* VROUNDSDri */ |
| 141691 | FR64, FR64, FR64, i32u8imm, |
| 141692 | /* VROUNDSDri_Int */ |
| 141693 | VR128, VR128, VR128, i32u8imm, |
| 141694 | /* VROUNDSSmi */ |
| 141695 | FR32, FR32, f32mem, i32u8imm, |
| 141696 | /* VROUNDSSmi_Int */ |
| 141697 | VR128, VR128, ssmem, i32u8imm, |
| 141698 | /* VROUNDSSri */ |
| 141699 | FR32, FR32, FR32, i32u8imm, |
| 141700 | /* VROUNDSSri_Int */ |
| 141701 | VR128, VR128, VR128, i32u8imm, |
| 141702 | /* VRSQRT14PDZ128m */ |
| 141703 | VR128X, f128mem, |
| 141704 | /* VRSQRT14PDZ128mb */ |
| 141705 | VR128X, f64mem, |
| 141706 | /* VRSQRT14PDZ128mbk */ |
| 141707 | VR128X, VR128X, VK2WM, f64mem, |
| 141708 | /* VRSQRT14PDZ128mbkz */ |
| 141709 | VR128X, VK2WM, f64mem, |
| 141710 | /* VRSQRT14PDZ128mk */ |
| 141711 | VR128X, VR128X, VK2WM, f128mem, |
| 141712 | /* VRSQRT14PDZ128mkz */ |
| 141713 | VR128X, VK2WM, f128mem, |
| 141714 | /* VRSQRT14PDZ128r */ |
| 141715 | VR128X, VR128X, |
| 141716 | /* VRSQRT14PDZ128rk */ |
| 141717 | VR128X, VR128X, VK2WM, VR128X, |
| 141718 | /* VRSQRT14PDZ128rkz */ |
| 141719 | VR128X, VK2WM, VR128X, |
| 141720 | /* VRSQRT14PDZ256m */ |
| 141721 | VR256X, f256mem, |
| 141722 | /* VRSQRT14PDZ256mb */ |
| 141723 | VR256X, f64mem, |
| 141724 | /* VRSQRT14PDZ256mbk */ |
| 141725 | VR256X, VR256X, VK4WM, f64mem, |
| 141726 | /* VRSQRT14PDZ256mbkz */ |
| 141727 | VR256X, VK4WM, f64mem, |
| 141728 | /* VRSQRT14PDZ256mk */ |
| 141729 | VR256X, VR256X, VK4WM, f256mem, |
| 141730 | /* VRSQRT14PDZ256mkz */ |
| 141731 | VR256X, VK4WM, f256mem, |
| 141732 | /* VRSQRT14PDZ256r */ |
| 141733 | VR256X, VR256X, |
| 141734 | /* VRSQRT14PDZ256rk */ |
| 141735 | VR256X, VR256X, VK4WM, VR256X, |
| 141736 | /* VRSQRT14PDZ256rkz */ |
| 141737 | VR256X, VK4WM, VR256X, |
| 141738 | /* VRSQRT14PDZm */ |
| 141739 | VR512, f512mem, |
| 141740 | /* VRSQRT14PDZmb */ |
| 141741 | VR512, f64mem, |
| 141742 | /* VRSQRT14PDZmbk */ |
| 141743 | VR512, VR512, VK8WM, f64mem, |
| 141744 | /* VRSQRT14PDZmbkz */ |
| 141745 | VR512, VK8WM, f64mem, |
| 141746 | /* VRSQRT14PDZmk */ |
| 141747 | VR512, VR512, VK8WM, f512mem, |
| 141748 | /* VRSQRT14PDZmkz */ |
| 141749 | VR512, VK8WM, f512mem, |
| 141750 | /* VRSQRT14PDZr */ |
| 141751 | VR512, VR512, |
| 141752 | /* VRSQRT14PDZrk */ |
| 141753 | VR512, VR512, VK8WM, VR512, |
| 141754 | /* VRSQRT14PDZrkz */ |
| 141755 | VR512, VK8WM, VR512, |
| 141756 | /* VRSQRT14PSZ128m */ |
| 141757 | VR128X, f128mem, |
| 141758 | /* VRSQRT14PSZ128mb */ |
| 141759 | VR128X, f32mem, |
| 141760 | /* VRSQRT14PSZ128mbk */ |
| 141761 | VR128X, VR128X, VK4WM, f32mem, |
| 141762 | /* VRSQRT14PSZ128mbkz */ |
| 141763 | VR128X, VK4WM, f32mem, |
| 141764 | /* VRSQRT14PSZ128mk */ |
| 141765 | VR128X, VR128X, VK4WM, f128mem, |
| 141766 | /* VRSQRT14PSZ128mkz */ |
| 141767 | VR128X, VK4WM, f128mem, |
| 141768 | /* VRSQRT14PSZ128r */ |
| 141769 | VR128X, VR128X, |
| 141770 | /* VRSQRT14PSZ128rk */ |
| 141771 | VR128X, VR128X, VK4WM, VR128X, |
| 141772 | /* VRSQRT14PSZ128rkz */ |
| 141773 | VR128X, VK4WM, VR128X, |
| 141774 | /* VRSQRT14PSZ256m */ |
| 141775 | VR256X, f256mem, |
| 141776 | /* VRSQRT14PSZ256mb */ |
| 141777 | VR256X, f32mem, |
| 141778 | /* VRSQRT14PSZ256mbk */ |
| 141779 | VR256X, VR256X, VK8WM, f32mem, |
| 141780 | /* VRSQRT14PSZ256mbkz */ |
| 141781 | VR256X, VK8WM, f32mem, |
| 141782 | /* VRSQRT14PSZ256mk */ |
| 141783 | VR256X, VR256X, VK8WM, f256mem, |
| 141784 | /* VRSQRT14PSZ256mkz */ |
| 141785 | VR256X, VK8WM, f256mem, |
| 141786 | /* VRSQRT14PSZ256r */ |
| 141787 | VR256X, VR256X, |
| 141788 | /* VRSQRT14PSZ256rk */ |
| 141789 | VR256X, VR256X, VK8WM, VR256X, |
| 141790 | /* VRSQRT14PSZ256rkz */ |
| 141791 | VR256X, VK8WM, VR256X, |
| 141792 | /* VRSQRT14PSZm */ |
| 141793 | VR512, f512mem, |
| 141794 | /* VRSQRT14PSZmb */ |
| 141795 | VR512, f32mem, |
| 141796 | /* VRSQRT14PSZmbk */ |
| 141797 | VR512, VR512, VK16WM, f32mem, |
| 141798 | /* VRSQRT14PSZmbkz */ |
| 141799 | VR512, VK16WM, f32mem, |
| 141800 | /* VRSQRT14PSZmk */ |
| 141801 | VR512, VR512, VK16WM, f512mem, |
| 141802 | /* VRSQRT14PSZmkz */ |
| 141803 | VR512, VK16WM, f512mem, |
| 141804 | /* VRSQRT14PSZr */ |
| 141805 | VR512, VR512, |
| 141806 | /* VRSQRT14PSZrk */ |
| 141807 | VR512, VR512, VK16WM, VR512, |
| 141808 | /* VRSQRT14PSZrkz */ |
| 141809 | VR512, VK16WM, VR512, |
| 141810 | /* VRSQRT14SDZrm */ |
| 141811 | VR128X, VR128X, sdmem, |
| 141812 | /* VRSQRT14SDZrmk */ |
| 141813 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 141814 | /* VRSQRT14SDZrmkz */ |
| 141815 | VR128X, VK1WM, VR128X, sdmem, |
| 141816 | /* VRSQRT14SDZrr */ |
| 141817 | VR128X, VR128X, VR128X, |
| 141818 | /* VRSQRT14SDZrrk */ |
| 141819 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141820 | /* VRSQRT14SDZrrkz */ |
| 141821 | VR128X, VK1WM, VR128X, VR128X, |
| 141822 | /* VRSQRT14SSZrm */ |
| 141823 | VR128X, VR128X, ssmem, |
| 141824 | /* VRSQRT14SSZrmk */ |
| 141825 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 141826 | /* VRSQRT14SSZrmkz */ |
| 141827 | VR128X, VK1WM, VR128X, ssmem, |
| 141828 | /* VRSQRT14SSZrr */ |
| 141829 | VR128X, VR128X, VR128X, |
| 141830 | /* VRSQRT14SSZrrk */ |
| 141831 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141832 | /* VRSQRT14SSZrrkz */ |
| 141833 | VR128X, VK1WM, VR128X, VR128X, |
| 141834 | /* VRSQRT28PDZm */ |
| 141835 | VR512, f512mem, |
| 141836 | /* VRSQRT28PDZmb */ |
| 141837 | VR512, f64mem, |
| 141838 | /* VRSQRT28PDZmbk */ |
| 141839 | VR512, VR512, VK8WM, f64mem, |
| 141840 | /* VRSQRT28PDZmbkz */ |
| 141841 | VR512, VK8WM, f64mem, |
| 141842 | /* VRSQRT28PDZmk */ |
| 141843 | VR512, VR512, VK8WM, f512mem, |
| 141844 | /* VRSQRT28PDZmkz */ |
| 141845 | VR512, VK8WM, f512mem, |
| 141846 | /* VRSQRT28PDZr */ |
| 141847 | VR512, VR512, |
| 141848 | /* VRSQRT28PDZrb */ |
| 141849 | VR512, VR512, |
| 141850 | /* VRSQRT28PDZrbk */ |
| 141851 | VR512, VR512, VK8WM, VR512, |
| 141852 | /* VRSQRT28PDZrbkz */ |
| 141853 | VR512, VK8WM, VR512, |
| 141854 | /* VRSQRT28PDZrk */ |
| 141855 | VR512, VR512, VK8WM, VR512, |
| 141856 | /* VRSQRT28PDZrkz */ |
| 141857 | VR512, VK8WM, VR512, |
| 141858 | /* VRSQRT28PSZm */ |
| 141859 | VR512, f512mem, |
| 141860 | /* VRSQRT28PSZmb */ |
| 141861 | VR512, f32mem, |
| 141862 | /* VRSQRT28PSZmbk */ |
| 141863 | VR512, VR512, VK16WM, f32mem, |
| 141864 | /* VRSQRT28PSZmbkz */ |
| 141865 | VR512, VK16WM, f32mem, |
| 141866 | /* VRSQRT28PSZmk */ |
| 141867 | VR512, VR512, VK16WM, f512mem, |
| 141868 | /* VRSQRT28PSZmkz */ |
| 141869 | VR512, VK16WM, f512mem, |
| 141870 | /* VRSQRT28PSZr */ |
| 141871 | VR512, VR512, |
| 141872 | /* VRSQRT28PSZrb */ |
| 141873 | VR512, VR512, |
| 141874 | /* VRSQRT28PSZrbk */ |
| 141875 | VR512, VR512, VK16WM, VR512, |
| 141876 | /* VRSQRT28PSZrbkz */ |
| 141877 | VR512, VK16WM, VR512, |
| 141878 | /* VRSQRT28PSZrk */ |
| 141879 | VR512, VR512, VK16WM, VR512, |
| 141880 | /* VRSQRT28PSZrkz */ |
| 141881 | VR512, VK16WM, VR512, |
| 141882 | /* VRSQRT28SDZm */ |
| 141883 | VR128X, VR128X, sdmem, |
| 141884 | /* VRSQRT28SDZmk */ |
| 141885 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 141886 | /* VRSQRT28SDZmkz */ |
| 141887 | VR128X, VK1WM, VR128X, sdmem, |
| 141888 | /* VRSQRT28SDZr */ |
| 141889 | VR128X, VR128X, VR128X, |
| 141890 | /* VRSQRT28SDZrb */ |
| 141891 | VR128X, VR128X, VR128X, |
| 141892 | /* VRSQRT28SDZrbk */ |
| 141893 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141894 | /* VRSQRT28SDZrbkz */ |
| 141895 | VR128X, VK1WM, VR128X, VR128X, |
| 141896 | /* VRSQRT28SDZrk */ |
| 141897 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141898 | /* VRSQRT28SDZrkz */ |
| 141899 | VR128X, VK1WM, VR128X, VR128X, |
| 141900 | /* VRSQRT28SSZm */ |
| 141901 | VR128X, VR128X, ssmem, |
| 141902 | /* VRSQRT28SSZmk */ |
| 141903 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 141904 | /* VRSQRT28SSZmkz */ |
| 141905 | VR128X, VK1WM, VR128X, ssmem, |
| 141906 | /* VRSQRT28SSZr */ |
| 141907 | VR128X, VR128X, VR128X, |
| 141908 | /* VRSQRT28SSZrb */ |
| 141909 | VR128X, VR128X, VR128X, |
| 141910 | /* VRSQRT28SSZrbk */ |
| 141911 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141912 | /* VRSQRT28SSZrbkz */ |
| 141913 | VR128X, VK1WM, VR128X, VR128X, |
| 141914 | /* VRSQRT28SSZrk */ |
| 141915 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141916 | /* VRSQRT28SSZrkz */ |
| 141917 | VR128X, VK1WM, VR128X, VR128X, |
| 141918 | /* VRSQRTPHZ128m */ |
| 141919 | VR128X, f128mem, |
| 141920 | /* VRSQRTPHZ128mb */ |
| 141921 | VR128X, f16mem, |
| 141922 | /* VRSQRTPHZ128mbk */ |
| 141923 | VR128X, VR128X, VK8WM, f16mem, |
| 141924 | /* VRSQRTPHZ128mbkz */ |
| 141925 | VR128X, VK8WM, f16mem, |
| 141926 | /* VRSQRTPHZ128mk */ |
| 141927 | VR128X, VR128X, VK8WM, f128mem, |
| 141928 | /* VRSQRTPHZ128mkz */ |
| 141929 | VR128X, VK8WM, f128mem, |
| 141930 | /* VRSQRTPHZ128r */ |
| 141931 | VR128X, VR128X, |
| 141932 | /* VRSQRTPHZ128rk */ |
| 141933 | VR128X, VR128X, VK8WM, VR128X, |
| 141934 | /* VRSQRTPHZ128rkz */ |
| 141935 | VR128X, VK8WM, VR128X, |
| 141936 | /* VRSQRTPHZ256m */ |
| 141937 | VR256X, f256mem, |
| 141938 | /* VRSQRTPHZ256mb */ |
| 141939 | VR256X, f16mem, |
| 141940 | /* VRSQRTPHZ256mbk */ |
| 141941 | VR256X, VR256X, VK16WM, f16mem, |
| 141942 | /* VRSQRTPHZ256mbkz */ |
| 141943 | VR256X, VK16WM, f16mem, |
| 141944 | /* VRSQRTPHZ256mk */ |
| 141945 | VR256X, VR256X, VK16WM, f256mem, |
| 141946 | /* VRSQRTPHZ256mkz */ |
| 141947 | VR256X, VK16WM, f256mem, |
| 141948 | /* VRSQRTPHZ256r */ |
| 141949 | VR256X, VR256X, |
| 141950 | /* VRSQRTPHZ256rk */ |
| 141951 | VR256X, VR256X, VK16WM, VR256X, |
| 141952 | /* VRSQRTPHZ256rkz */ |
| 141953 | VR256X, VK16WM, VR256X, |
| 141954 | /* VRSQRTPHZm */ |
| 141955 | VR512, f512mem, |
| 141956 | /* VRSQRTPHZmb */ |
| 141957 | VR512, f16mem, |
| 141958 | /* VRSQRTPHZmbk */ |
| 141959 | VR512, VR512, VK32WM, f16mem, |
| 141960 | /* VRSQRTPHZmbkz */ |
| 141961 | VR512, VK32WM, f16mem, |
| 141962 | /* VRSQRTPHZmk */ |
| 141963 | VR512, VR512, VK32WM, f512mem, |
| 141964 | /* VRSQRTPHZmkz */ |
| 141965 | VR512, VK32WM, f512mem, |
| 141966 | /* VRSQRTPHZr */ |
| 141967 | VR512, VR512, |
| 141968 | /* VRSQRTPHZrk */ |
| 141969 | VR512, VR512, VK32WM, VR512, |
| 141970 | /* VRSQRTPHZrkz */ |
| 141971 | VR512, VK32WM, VR512, |
| 141972 | /* VRSQRTPSYm */ |
| 141973 | VR256, f256mem, |
| 141974 | /* VRSQRTPSYr */ |
| 141975 | VR256, VR256, |
| 141976 | /* VRSQRTPSm */ |
| 141977 | VR128, f128mem, |
| 141978 | /* VRSQRTPSr */ |
| 141979 | VR128, VR128, |
| 141980 | /* VRSQRTSHZrm */ |
| 141981 | VR128X, VR128X, shmem, |
| 141982 | /* VRSQRTSHZrmk */ |
| 141983 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 141984 | /* VRSQRTSHZrmkz */ |
| 141985 | VR128X, VK1WM, VR128X, shmem, |
| 141986 | /* VRSQRTSHZrr */ |
| 141987 | VR128X, VR128X, VR128X, |
| 141988 | /* VRSQRTSHZrrk */ |
| 141989 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 141990 | /* VRSQRTSHZrrkz */ |
| 141991 | VR128X, VK1WM, VR128X, VR128X, |
| 141992 | /* VRSQRTSSm */ |
| 141993 | FR32, FR32, f32mem, |
| 141994 | /* VRSQRTSSm_Int */ |
| 141995 | VR128, VR128, ssmem, |
| 141996 | /* VRSQRTSSr */ |
| 141997 | FR32, FR32, FR32, |
| 141998 | /* VRSQRTSSr_Int */ |
| 141999 | VR128, VR128, VR128, |
| 142000 | /* VSCALEFPDZ128rm */ |
| 142001 | VR128X, VR128X, f128mem, |
| 142002 | /* VSCALEFPDZ128rmb */ |
| 142003 | VR128X, VR128X, f64mem, |
| 142004 | /* VSCALEFPDZ128rmbk */ |
| 142005 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 142006 | /* VSCALEFPDZ128rmbkz */ |
| 142007 | VR128X, VK2WM, VR128X, f64mem, |
| 142008 | /* VSCALEFPDZ128rmk */ |
| 142009 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 142010 | /* VSCALEFPDZ128rmkz */ |
| 142011 | VR128X, VK2WM, VR128X, f128mem, |
| 142012 | /* VSCALEFPDZ128rr */ |
| 142013 | VR128X, VR128X, VR128X, |
| 142014 | /* VSCALEFPDZ128rrk */ |
| 142015 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 142016 | /* VSCALEFPDZ128rrkz */ |
| 142017 | VR128X, VK2WM, VR128X, VR128X, |
| 142018 | /* VSCALEFPDZ256rm */ |
| 142019 | VR256X, VR256X, f256mem, |
| 142020 | /* VSCALEFPDZ256rmb */ |
| 142021 | VR256X, VR256X, f64mem, |
| 142022 | /* VSCALEFPDZ256rmbk */ |
| 142023 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 142024 | /* VSCALEFPDZ256rmbkz */ |
| 142025 | VR256X, VK4WM, VR256X, f64mem, |
| 142026 | /* VSCALEFPDZ256rmk */ |
| 142027 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 142028 | /* VSCALEFPDZ256rmkz */ |
| 142029 | VR256X, VK4WM, VR256X, f256mem, |
| 142030 | /* VSCALEFPDZ256rr */ |
| 142031 | VR256X, VR256X, VR256X, |
| 142032 | /* VSCALEFPDZ256rrk */ |
| 142033 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 142034 | /* VSCALEFPDZ256rrkz */ |
| 142035 | VR256X, VK4WM, VR256X, VR256X, |
| 142036 | /* VSCALEFPDZrm */ |
| 142037 | VR512, VR512, f512mem, |
| 142038 | /* VSCALEFPDZrmb */ |
| 142039 | VR512, VR512, f64mem, |
| 142040 | /* VSCALEFPDZrmbk */ |
| 142041 | VR512, VR512, VK8WM, VR512, f64mem, |
| 142042 | /* VSCALEFPDZrmbkz */ |
| 142043 | VR512, VK8WM, VR512, f64mem, |
| 142044 | /* VSCALEFPDZrmk */ |
| 142045 | VR512, VR512, VK8WM, VR512, f512mem, |
| 142046 | /* VSCALEFPDZrmkz */ |
| 142047 | VR512, VK8WM, VR512, f512mem, |
| 142048 | /* VSCALEFPDZrr */ |
| 142049 | VR512, VR512, VR512, |
| 142050 | /* VSCALEFPDZrrb */ |
| 142051 | VR512, VR512, VR512, AVX512RC, |
| 142052 | /* VSCALEFPDZrrbk */ |
| 142053 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 142054 | /* VSCALEFPDZrrbkz */ |
| 142055 | VR512, VK8WM, VR512, VR512, AVX512RC, |
| 142056 | /* VSCALEFPDZrrk */ |
| 142057 | VR512, VR512, VK8WM, VR512, VR512, |
| 142058 | /* VSCALEFPDZrrkz */ |
| 142059 | VR512, VK8WM, VR512, VR512, |
| 142060 | /* VSCALEFPHZ128rm */ |
| 142061 | VR128X, VR128X, f128mem, |
| 142062 | /* VSCALEFPHZ128rmb */ |
| 142063 | VR128X, VR128X, f16mem, |
| 142064 | /* VSCALEFPHZ128rmbk */ |
| 142065 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 142066 | /* VSCALEFPHZ128rmbkz */ |
| 142067 | VR128X, VK8WM, VR128X, f16mem, |
| 142068 | /* VSCALEFPHZ128rmk */ |
| 142069 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 142070 | /* VSCALEFPHZ128rmkz */ |
| 142071 | VR128X, VK8WM, VR128X, f128mem, |
| 142072 | /* VSCALEFPHZ128rr */ |
| 142073 | VR128X, VR128X, VR128X, |
| 142074 | /* VSCALEFPHZ128rrk */ |
| 142075 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 142076 | /* VSCALEFPHZ128rrkz */ |
| 142077 | VR128X, VK8WM, VR128X, VR128X, |
| 142078 | /* VSCALEFPHZ256rm */ |
| 142079 | VR256X, VR256X, f256mem, |
| 142080 | /* VSCALEFPHZ256rmb */ |
| 142081 | VR256X, VR256X, f16mem, |
| 142082 | /* VSCALEFPHZ256rmbk */ |
| 142083 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 142084 | /* VSCALEFPHZ256rmbkz */ |
| 142085 | VR256X, VK16WM, VR256X, f16mem, |
| 142086 | /* VSCALEFPHZ256rmk */ |
| 142087 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 142088 | /* VSCALEFPHZ256rmkz */ |
| 142089 | VR256X, VK16WM, VR256X, f256mem, |
| 142090 | /* VSCALEFPHZ256rr */ |
| 142091 | VR256X, VR256X, VR256X, |
| 142092 | /* VSCALEFPHZ256rrk */ |
| 142093 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 142094 | /* VSCALEFPHZ256rrkz */ |
| 142095 | VR256X, VK16WM, VR256X, VR256X, |
| 142096 | /* VSCALEFPHZrm */ |
| 142097 | VR512, VR512, f512mem, |
| 142098 | /* VSCALEFPHZrmb */ |
| 142099 | VR512, VR512, f16mem, |
| 142100 | /* VSCALEFPHZrmbk */ |
| 142101 | VR512, VR512, VK32WM, VR512, f16mem, |
| 142102 | /* VSCALEFPHZrmbkz */ |
| 142103 | VR512, VK32WM, VR512, f16mem, |
| 142104 | /* VSCALEFPHZrmk */ |
| 142105 | VR512, VR512, VK32WM, VR512, f512mem, |
| 142106 | /* VSCALEFPHZrmkz */ |
| 142107 | VR512, VK32WM, VR512, f512mem, |
| 142108 | /* VSCALEFPHZrr */ |
| 142109 | VR512, VR512, VR512, |
| 142110 | /* VSCALEFPHZrrb */ |
| 142111 | VR512, VR512, VR512, AVX512RC, |
| 142112 | /* VSCALEFPHZrrbk */ |
| 142113 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 142114 | /* VSCALEFPHZrrbkz */ |
| 142115 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 142116 | /* VSCALEFPHZrrk */ |
| 142117 | VR512, VR512, VK32WM, VR512, VR512, |
| 142118 | /* VSCALEFPHZrrkz */ |
| 142119 | VR512, VK32WM, VR512, VR512, |
| 142120 | /* VSCALEFPSZ128rm */ |
| 142121 | VR128X, VR128X, f128mem, |
| 142122 | /* VSCALEFPSZ128rmb */ |
| 142123 | VR128X, VR128X, f32mem, |
| 142124 | /* VSCALEFPSZ128rmbk */ |
| 142125 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 142126 | /* VSCALEFPSZ128rmbkz */ |
| 142127 | VR128X, VK4WM, VR128X, f32mem, |
| 142128 | /* VSCALEFPSZ128rmk */ |
| 142129 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 142130 | /* VSCALEFPSZ128rmkz */ |
| 142131 | VR128X, VK4WM, VR128X, f128mem, |
| 142132 | /* VSCALEFPSZ128rr */ |
| 142133 | VR128X, VR128X, VR128X, |
| 142134 | /* VSCALEFPSZ128rrk */ |
| 142135 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 142136 | /* VSCALEFPSZ128rrkz */ |
| 142137 | VR128X, VK4WM, VR128X, VR128X, |
| 142138 | /* VSCALEFPSZ256rm */ |
| 142139 | VR256X, VR256X, f256mem, |
| 142140 | /* VSCALEFPSZ256rmb */ |
| 142141 | VR256X, VR256X, f32mem, |
| 142142 | /* VSCALEFPSZ256rmbk */ |
| 142143 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 142144 | /* VSCALEFPSZ256rmbkz */ |
| 142145 | VR256X, VK8WM, VR256X, f32mem, |
| 142146 | /* VSCALEFPSZ256rmk */ |
| 142147 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 142148 | /* VSCALEFPSZ256rmkz */ |
| 142149 | VR256X, VK8WM, VR256X, f256mem, |
| 142150 | /* VSCALEFPSZ256rr */ |
| 142151 | VR256X, VR256X, VR256X, |
| 142152 | /* VSCALEFPSZ256rrk */ |
| 142153 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 142154 | /* VSCALEFPSZ256rrkz */ |
| 142155 | VR256X, VK8WM, VR256X, VR256X, |
| 142156 | /* VSCALEFPSZrm */ |
| 142157 | VR512, VR512, f512mem, |
| 142158 | /* VSCALEFPSZrmb */ |
| 142159 | VR512, VR512, f32mem, |
| 142160 | /* VSCALEFPSZrmbk */ |
| 142161 | VR512, VR512, VK16WM, VR512, f32mem, |
| 142162 | /* VSCALEFPSZrmbkz */ |
| 142163 | VR512, VK16WM, VR512, f32mem, |
| 142164 | /* VSCALEFPSZrmk */ |
| 142165 | VR512, VR512, VK16WM, VR512, f512mem, |
| 142166 | /* VSCALEFPSZrmkz */ |
| 142167 | VR512, VK16WM, VR512, f512mem, |
| 142168 | /* VSCALEFPSZrr */ |
| 142169 | VR512, VR512, VR512, |
| 142170 | /* VSCALEFPSZrrb */ |
| 142171 | VR512, VR512, VR512, AVX512RC, |
| 142172 | /* VSCALEFPSZrrbk */ |
| 142173 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 142174 | /* VSCALEFPSZrrbkz */ |
| 142175 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 142176 | /* VSCALEFPSZrrk */ |
| 142177 | VR512, VR512, VK16WM, VR512, VR512, |
| 142178 | /* VSCALEFPSZrrkz */ |
| 142179 | VR512, VK16WM, VR512, VR512, |
| 142180 | /* VSCALEFSDZrm */ |
| 142181 | VR128X, VR128X, sdmem, |
| 142182 | /* VSCALEFSDZrmk */ |
| 142183 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 142184 | /* VSCALEFSDZrmkz */ |
| 142185 | VR128X, VK1WM, VR128X, sdmem, |
| 142186 | /* VSCALEFSDZrr */ |
| 142187 | VR128X, VR128X, VR128X, |
| 142188 | /* VSCALEFSDZrrb_Int */ |
| 142189 | VR128X, VR128X, VR128X, AVX512RC, |
| 142190 | /* VSCALEFSDZrrb_Intk */ |
| 142191 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142192 | /* VSCALEFSDZrrb_Intkz */ |
| 142193 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142194 | /* VSCALEFSDZrrk */ |
| 142195 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 142196 | /* VSCALEFSDZrrkz */ |
| 142197 | VR128X, VK1WM, VR128X, VR128X, |
| 142198 | /* VSCALEFSHZrm */ |
| 142199 | VR128X, VR128X, shmem, |
| 142200 | /* VSCALEFSHZrmk */ |
| 142201 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 142202 | /* VSCALEFSHZrmkz */ |
| 142203 | VR128X, VK1WM, VR128X, shmem, |
| 142204 | /* VSCALEFSHZrr */ |
| 142205 | VR128X, VR128X, VR128X, |
| 142206 | /* VSCALEFSHZrrb_Int */ |
| 142207 | VR128X, VR128X, VR128X, AVX512RC, |
| 142208 | /* VSCALEFSHZrrb_Intk */ |
| 142209 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142210 | /* VSCALEFSHZrrb_Intkz */ |
| 142211 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142212 | /* VSCALEFSHZrrk */ |
| 142213 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 142214 | /* VSCALEFSHZrrkz */ |
| 142215 | VR128X, VK1WM, VR128X, VR128X, |
| 142216 | /* VSCALEFSSZrm */ |
| 142217 | VR128X, VR128X, ssmem, |
| 142218 | /* VSCALEFSSZrmk */ |
| 142219 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 142220 | /* VSCALEFSSZrmkz */ |
| 142221 | VR128X, VK1WM, VR128X, ssmem, |
| 142222 | /* VSCALEFSSZrr */ |
| 142223 | VR128X, VR128X, VR128X, |
| 142224 | /* VSCALEFSSZrrb_Int */ |
| 142225 | VR128X, VR128X, VR128X, AVX512RC, |
| 142226 | /* VSCALEFSSZrrb_Intk */ |
| 142227 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142228 | /* VSCALEFSSZrrb_Intkz */ |
| 142229 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142230 | /* VSCALEFSSZrrk */ |
| 142231 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 142232 | /* VSCALEFSSZrrkz */ |
| 142233 | VR128X, VK1WM, VR128X, VR128X, |
| 142234 | /* VSCATTERDPDZ128mr */ |
| 142235 | VK2WM, vx128xmem, VK2WM, VR128X, |
| 142236 | /* VSCATTERDPDZ256mr */ |
| 142237 | VK4WM, vx256xmem, VK4WM, VR256X, |
| 142238 | /* VSCATTERDPDZmr */ |
| 142239 | VK8WM, vy512xmem, VK8WM, VR512, |
| 142240 | /* VSCATTERDPSZ128mr */ |
| 142241 | VK4WM, vx128xmem, VK4WM, VR128X, |
| 142242 | /* VSCATTERDPSZ256mr */ |
| 142243 | VK8WM, vy256xmem, VK8WM, VR256X, |
| 142244 | /* VSCATTERDPSZmr */ |
| 142245 | VK16WM, vz512mem, VK16WM, VR512, |
| 142246 | /* VSCATTERPF0DPDm */ |
| 142247 | VK8WM, vy512xmem, |
| 142248 | /* VSCATTERPF0DPSm */ |
| 142249 | VK16WM, vz512mem, |
| 142250 | /* VSCATTERPF0QPDm */ |
| 142251 | VK8WM, vz512mem, |
| 142252 | /* VSCATTERPF0QPSm */ |
| 142253 | VK8WM, vz256mem, |
| 142254 | /* VSCATTERPF1DPDm */ |
| 142255 | VK8WM, vy512xmem, |
| 142256 | /* VSCATTERPF1DPSm */ |
| 142257 | VK16WM, vz512mem, |
| 142258 | /* VSCATTERPF1QPDm */ |
| 142259 | VK8WM, vz512mem, |
| 142260 | /* VSCATTERPF1QPSm */ |
| 142261 | VK8WM, vz256mem, |
| 142262 | /* VSCATTERQPDZ128mr */ |
| 142263 | VK2WM, vx128xmem, VK2WM, VR128X, |
| 142264 | /* VSCATTERQPDZ256mr */ |
| 142265 | VK4WM, vy256xmem, VK4WM, VR256X, |
| 142266 | /* VSCATTERQPDZmr */ |
| 142267 | VK8WM, vz512mem, VK8WM, VR512, |
| 142268 | /* VSCATTERQPSZ128mr */ |
| 142269 | VK2WM, vx64xmem, VK2WM, VR128X, |
| 142270 | /* VSCATTERQPSZ256mr */ |
| 142271 | VK4WM, vy128xmem, VK4WM, VR128X, |
| 142272 | /* VSCATTERQPSZmr */ |
| 142273 | VK8WM, vz256mem, VK8WM, VR256X, |
| 142274 | /* VSHA512MSG1rr */ |
| 142275 | VR256, VR256, VR128, |
| 142276 | /* VSHA512MSG2rr */ |
| 142277 | VR256, VR256, VR256, |
| 142278 | /* VSHA512RNDS2rr */ |
| 142279 | VR256, VR256, VR256, VR128, |
| 142280 | /* VSHUFF32X4Z256rmbi */ |
| 142281 | VR256X, VR256X, f32mem, u8imm, |
| 142282 | /* VSHUFF32X4Z256rmbik */ |
| 142283 | VR256X, VR256X, VK8WM, VR256X, f32mem, u8imm, |
| 142284 | /* VSHUFF32X4Z256rmbikz */ |
| 142285 | VR256X, VK8WM, VR256X, f32mem, u8imm, |
| 142286 | /* VSHUFF32X4Z256rmi */ |
| 142287 | VR256X, VR256X, f256mem, u8imm, |
| 142288 | /* VSHUFF32X4Z256rmik */ |
| 142289 | VR256X, VR256X, VK8WM, VR256X, f256mem, u8imm, |
| 142290 | /* VSHUFF32X4Z256rmikz */ |
| 142291 | VR256X, VK8WM, VR256X, f256mem, u8imm, |
| 142292 | /* VSHUFF32X4Z256rri */ |
| 142293 | VR256X, VR256X, VR256X, u8imm, |
| 142294 | /* VSHUFF32X4Z256rrik */ |
| 142295 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 142296 | /* VSHUFF32X4Z256rrikz */ |
| 142297 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 142298 | /* VSHUFF32X4Zrmbi */ |
| 142299 | VR512, VR512, f32mem, u8imm, |
| 142300 | /* VSHUFF32X4Zrmbik */ |
| 142301 | VR512, VR512, VK16WM, VR512, f32mem, u8imm, |
| 142302 | /* VSHUFF32X4Zrmbikz */ |
| 142303 | VR512, VK16WM, VR512, f32mem, u8imm, |
| 142304 | /* VSHUFF32X4Zrmi */ |
| 142305 | VR512, VR512, f512mem, u8imm, |
| 142306 | /* VSHUFF32X4Zrmik */ |
| 142307 | VR512, VR512, VK16WM, VR512, f512mem, u8imm, |
| 142308 | /* VSHUFF32X4Zrmikz */ |
| 142309 | VR512, VK16WM, VR512, f512mem, u8imm, |
| 142310 | /* VSHUFF32X4Zrri */ |
| 142311 | VR512, VR512, VR512, u8imm, |
| 142312 | /* VSHUFF32X4Zrrik */ |
| 142313 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 142314 | /* VSHUFF32X4Zrrikz */ |
| 142315 | VR512, VK16WM, VR512, VR512, u8imm, |
| 142316 | /* VSHUFF64X2Z256rmbi */ |
| 142317 | VR256X, VR256X, f64mem, u8imm, |
| 142318 | /* VSHUFF64X2Z256rmbik */ |
| 142319 | VR256X, VR256X, VK4WM, VR256X, f64mem, u8imm, |
| 142320 | /* VSHUFF64X2Z256rmbikz */ |
| 142321 | VR256X, VK4WM, VR256X, f64mem, u8imm, |
| 142322 | /* VSHUFF64X2Z256rmi */ |
| 142323 | VR256X, VR256X, f256mem, u8imm, |
| 142324 | /* VSHUFF64X2Z256rmik */ |
| 142325 | VR256X, VR256X, VK4WM, VR256X, f256mem, u8imm, |
| 142326 | /* VSHUFF64X2Z256rmikz */ |
| 142327 | VR256X, VK4WM, VR256X, f256mem, u8imm, |
| 142328 | /* VSHUFF64X2Z256rri */ |
| 142329 | VR256X, VR256X, VR256X, u8imm, |
| 142330 | /* VSHUFF64X2Z256rrik */ |
| 142331 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 142332 | /* VSHUFF64X2Z256rrikz */ |
| 142333 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 142334 | /* VSHUFF64X2Zrmbi */ |
| 142335 | VR512, VR512, f64mem, u8imm, |
| 142336 | /* VSHUFF64X2Zrmbik */ |
| 142337 | VR512, VR512, VK8WM, VR512, f64mem, u8imm, |
| 142338 | /* VSHUFF64X2Zrmbikz */ |
| 142339 | VR512, VK8WM, VR512, f64mem, u8imm, |
| 142340 | /* VSHUFF64X2Zrmi */ |
| 142341 | VR512, VR512, f512mem, u8imm, |
| 142342 | /* VSHUFF64X2Zrmik */ |
| 142343 | VR512, VR512, VK8WM, VR512, f512mem, u8imm, |
| 142344 | /* VSHUFF64X2Zrmikz */ |
| 142345 | VR512, VK8WM, VR512, f512mem, u8imm, |
| 142346 | /* VSHUFF64X2Zrri */ |
| 142347 | VR512, VR512, VR512, u8imm, |
| 142348 | /* VSHUFF64X2Zrrik */ |
| 142349 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 142350 | /* VSHUFF64X2Zrrikz */ |
| 142351 | VR512, VK8WM, VR512, VR512, u8imm, |
| 142352 | /* VSHUFI32X4Z256rmbi */ |
| 142353 | VR256X, VR256X, i32mem, u8imm, |
| 142354 | /* VSHUFI32X4Z256rmbik */ |
| 142355 | VR256X, VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 142356 | /* VSHUFI32X4Z256rmbikz */ |
| 142357 | VR256X, VK8WM, VR256X, i32mem, u8imm, |
| 142358 | /* VSHUFI32X4Z256rmi */ |
| 142359 | VR256X, VR256X, i256mem, u8imm, |
| 142360 | /* VSHUFI32X4Z256rmik */ |
| 142361 | VR256X, VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 142362 | /* VSHUFI32X4Z256rmikz */ |
| 142363 | VR256X, VK8WM, VR256X, i256mem, u8imm, |
| 142364 | /* VSHUFI32X4Z256rri */ |
| 142365 | VR256X, VR256X, VR256X, u8imm, |
| 142366 | /* VSHUFI32X4Z256rrik */ |
| 142367 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 142368 | /* VSHUFI32X4Z256rrikz */ |
| 142369 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 142370 | /* VSHUFI32X4Zrmbi */ |
| 142371 | VR512, VR512, i32mem, u8imm, |
| 142372 | /* VSHUFI32X4Zrmbik */ |
| 142373 | VR512, VR512, VK16WM, VR512, i32mem, u8imm, |
| 142374 | /* VSHUFI32X4Zrmbikz */ |
| 142375 | VR512, VK16WM, VR512, i32mem, u8imm, |
| 142376 | /* VSHUFI32X4Zrmi */ |
| 142377 | VR512, VR512, i512mem, u8imm, |
| 142378 | /* VSHUFI32X4Zrmik */ |
| 142379 | VR512, VR512, VK16WM, VR512, i512mem, u8imm, |
| 142380 | /* VSHUFI32X4Zrmikz */ |
| 142381 | VR512, VK16WM, VR512, i512mem, u8imm, |
| 142382 | /* VSHUFI32X4Zrri */ |
| 142383 | VR512, VR512, VR512, u8imm, |
| 142384 | /* VSHUFI32X4Zrrik */ |
| 142385 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 142386 | /* VSHUFI32X4Zrrikz */ |
| 142387 | VR512, VK16WM, VR512, VR512, u8imm, |
| 142388 | /* VSHUFI64X2Z256rmbi */ |
| 142389 | VR256X, VR256X, i64mem, u8imm, |
| 142390 | /* VSHUFI64X2Z256rmbik */ |
| 142391 | VR256X, VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 142392 | /* VSHUFI64X2Z256rmbikz */ |
| 142393 | VR256X, VK4WM, VR256X, i64mem, u8imm, |
| 142394 | /* VSHUFI64X2Z256rmi */ |
| 142395 | VR256X, VR256X, i256mem, u8imm, |
| 142396 | /* VSHUFI64X2Z256rmik */ |
| 142397 | VR256X, VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 142398 | /* VSHUFI64X2Z256rmikz */ |
| 142399 | VR256X, VK4WM, VR256X, i256mem, u8imm, |
| 142400 | /* VSHUFI64X2Z256rri */ |
| 142401 | VR256X, VR256X, VR256X, u8imm, |
| 142402 | /* VSHUFI64X2Z256rrik */ |
| 142403 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 142404 | /* VSHUFI64X2Z256rrikz */ |
| 142405 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 142406 | /* VSHUFI64X2Zrmbi */ |
| 142407 | VR512, VR512, i64mem, u8imm, |
| 142408 | /* VSHUFI64X2Zrmbik */ |
| 142409 | VR512, VR512, VK8WM, VR512, i64mem, u8imm, |
| 142410 | /* VSHUFI64X2Zrmbikz */ |
| 142411 | VR512, VK8WM, VR512, i64mem, u8imm, |
| 142412 | /* VSHUFI64X2Zrmi */ |
| 142413 | VR512, VR512, i512mem, u8imm, |
| 142414 | /* VSHUFI64X2Zrmik */ |
| 142415 | VR512, VR512, VK8WM, VR512, i512mem, u8imm, |
| 142416 | /* VSHUFI64X2Zrmikz */ |
| 142417 | VR512, VK8WM, VR512, i512mem, u8imm, |
| 142418 | /* VSHUFI64X2Zrri */ |
| 142419 | VR512, VR512, VR512, u8imm, |
| 142420 | /* VSHUFI64X2Zrrik */ |
| 142421 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 142422 | /* VSHUFI64X2Zrrikz */ |
| 142423 | VR512, VK8WM, VR512, VR512, u8imm, |
| 142424 | /* VSHUFPDYrmi */ |
| 142425 | VR256, VR256, f256mem, u8imm, |
| 142426 | /* VSHUFPDYrri */ |
| 142427 | VR256, VR256, VR256, u8imm, |
| 142428 | /* VSHUFPDZ128rmbi */ |
| 142429 | VR128X, VR128X, f64mem, u8imm, |
| 142430 | /* VSHUFPDZ128rmbik */ |
| 142431 | VR128X, VR128X, VK2WM, VR128X, f64mem, u8imm, |
| 142432 | /* VSHUFPDZ128rmbikz */ |
| 142433 | VR128X, VK2WM, VR128X, f64mem, u8imm, |
| 142434 | /* VSHUFPDZ128rmi */ |
| 142435 | VR128X, VR128X, f128mem, u8imm, |
| 142436 | /* VSHUFPDZ128rmik */ |
| 142437 | VR128X, VR128X, VK2WM, VR128X, f128mem, u8imm, |
| 142438 | /* VSHUFPDZ128rmikz */ |
| 142439 | VR128X, VK2WM, VR128X, f128mem, u8imm, |
| 142440 | /* VSHUFPDZ128rri */ |
| 142441 | VR128X, VR128X, VR128X, u8imm, |
| 142442 | /* VSHUFPDZ128rrik */ |
| 142443 | VR128X, VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 142444 | /* VSHUFPDZ128rrikz */ |
| 142445 | VR128X, VK2WM, VR128X, VR128X, u8imm, |
| 142446 | /* VSHUFPDZ256rmbi */ |
| 142447 | VR256X, VR256X, f64mem, u8imm, |
| 142448 | /* VSHUFPDZ256rmbik */ |
| 142449 | VR256X, VR256X, VK4WM, VR256X, f64mem, u8imm, |
| 142450 | /* VSHUFPDZ256rmbikz */ |
| 142451 | VR256X, VK4WM, VR256X, f64mem, u8imm, |
| 142452 | /* VSHUFPDZ256rmi */ |
| 142453 | VR256X, VR256X, f256mem, u8imm, |
| 142454 | /* VSHUFPDZ256rmik */ |
| 142455 | VR256X, VR256X, VK4WM, VR256X, f256mem, u8imm, |
| 142456 | /* VSHUFPDZ256rmikz */ |
| 142457 | VR256X, VK4WM, VR256X, f256mem, u8imm, |
| 142458 | /* VSHUFPDZ256rri */ |
| 142459 | VR256X, VR256X, VR256X, u8imm, |
| 142460 | /* VSHUFPDZ256rrik */ |
| 142461 | VR256X, VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 142462 | /* VSHUFPDZ256rrikz */ |
| 142463 | VR256X, VK4WM, VR256X, VR256X, u8imm, |
| 142464 | /* VSHUFPDZrmbi */ |
| 142465 | VR512, VR512, f64mem, u8imm, |
| 142466 | /* VSHUFPDZrmbik */ |
| 142467 | VR512, VR512, VK8WM, VR512, f64mem, u8imm, |
| 142468 | /* VSHUFPDZrmbikz */ |
| 142469 | VR512, VK8WM, VR512, f64mem, u8imm, |
| 142470 | /* VSHUFPDZrmi */ |
| 142471 | VR512, VR512, f512mem, u8imm, |
| 142472 | /* VSHUFPDZrmik */ |
| 142473 | VR512, VR512, VK8WM, VR512, f512mem, u8imm, |
| 142474 | /* VSHUFPDZrmikz */ |
| 142475 | VR512, VK8WM, VR512, f512mem, u8imm, |
| 142476 | /* VSHUFPDZrri */ |
| 142477 | VR512, VR512, VR512, u8imm, |
| 142478 | /* VSHUFPDZrrik */ |
| 142479 | VR512, VR512, VK8WM, VR512, VR512, u8imm, |
| 142480 | /* VSHUFPDZrrikz */ |
| 142481 | VR512, VK8WM, VR512, VR512, u8imm, |
| 142482 | /* VSHUFPDrmi */ |
| 142483 | VR128, VR128, f128mem, u8imm, |
| 142484 | /* VSHUFPDrri */ |
| 142485 | VR128, VR128, VR128, u8imm, |
| 142486 | /* VSHUFPSYrmi */ |
| 142487 | VR256, VR256, f256mem, u8imm, |
| 142488 | /* VSHUFPSYrri */ |
| 142489 | VR256, VR256, VR256, u8imm, |
| 142490 | /* VSHUFPSZ128rmbi */ |
| 142491 | VR128X, VR128X, f32mem, u8imm, |
| 142492 | /* VSHUFPSZ128rmbik */ |
| 142493 | VR128X, VR128X, VK4WM, VR128X, f32mem, u8imm, |
| 142494 | /* VSHUFPSZ128rmbikz */ |
| 142495 | VR128X, VK4WM, VR128X, f32mem, u8imm, |
| 142496 | /* VSHUFPSZ128rmi */ |
| 142497 | VR128X, VR128X, f128mem, u8imm, |
| 142498 | /* VSHUFPSZ128rmik */ |
| 142499 | VR128X, VR128X, VK4WM, VR128X, f128mem, u8imm, |
| 142500 | /* VSHUFPSZ128rmikz */ |
| 142501 | VR128X, VK4WM, VR128X, f128mem, u8imm, |
| 142502 | /* VSHUFPSZ128rri */ |
| 142503 | VR128X, VR128X, VR128X, u8imm, |
| 142504 | /* VSHUFPSZ128rrik */ |
| 142505 | VR128X, VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 142506 | /* VSHUFPSZ128rrikz */ |
| 142507 | VR128X, VK4WM, VR128X, VR128X, u8imm, |
| 142508 | /* VSHUFPSZ256rmbi */ |
| 142509 | VR256X, VR256X, f32mem, u8imm, |
| 142510 | /* VSHUFPSZ256rmbik */ |
| 142511 | VR256X, VR256X, VK8WM, VR256X, f32mem, u8imm, |
| 142512 | /* VSHUFPSZ256rmbikz */ |
| 142513 | VR256X, VK8WM, VR256X, f32mem, u8imm, |
| 142514 | /* VSHUFPSZ256rmi */ |
| 142515 | VR256X, VR256X, f256mem, u8imm, |
| 142516 | /* VSHUFPSZ256rmik */ |
| 142517 | VR256X, VR256X, VK8WM, VR256X, f256mem, u8imm, |
| 142518 | /* VSHUFPSZ256rmikz */ |
| 142519 | VR256X, VK8WM, VR256X, f256mem, u8imm, |
| 142520 | /* VSHUFPSZ256rri */ |
| 142521 | VR256X, VR256X, VR256X, u8imm, |
| 142522 | /* VSHUFPSZ256rrik */ |
| 142523 | VR256X, VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 142524 | /* VSHUFPSZ256rrikz */ |
| 142525 | VR256X, VK8WM, VR256X, VR256X, u8imm, |
| 142526 | /* VSHUFPSZrmbi */ |
| 142527 | VR512, VR512, f32mem, u8imm, |
| 142528 | /* VSHUFPSZrmbik */ |
| 142529 | VR512, VR512, VK16WM, VR512, f32mem, u8imm, |
| 142530 | /* VSHUFPSZrmbikz */ |
| 142531 | VR512, VK16WM, VR512, f32mem, u8imm, |
| 142532 | /* VSHUFPSZrmi */ |
| 142533 | VR512, VR512, f512mem, u8imm, |
| 142534 | /* VSHUFPSZrmik */ |
| 142535 | VR512, VR512, VK16WM, VR512, f512mem, u8imm, |
| 142536 | /* VSHUFPSZrmikz */ |
| 142537 | VR512, VK16WM, VR512, f512mem, u8imm, |
| 142538 | /* VSHUFPSZrri */ |
| 142539 | VR512, VR512, VR512, u8imm, |
| 142540 | /* VSHUFPSZrrik */ |
| 142541 | VR512, VR512, VK16WM, VR512, VR512, u8imm, |
| 142542 | /* VSHUFPSZrrikz */ |
| 142543 | VR512, VK16WM, VR512, VR512, u8imm, |
| 142544 | /* VSHUFPSrmi */ |
| 142545 | VR128, VR128, f128mem, u8imm, |
| 142546 | /* VSHUFPSrri */ |
| 142547 | VR128, VR128, VR128, u8imm, |
| 142548 | /* VSM3MSG1rm */ |
| 142549 | VR128, VR128, VR128, i128mem, |
| 142550 | /* VSM3MSG1rr */ |
| 142551 | VR128, VR128, VR128, VR128, |
| 142552 | /* VSM3MSG2rm */ |
| 142553 | VR128, VR128, VR128, i128mem, |
| 142554 | /* VSM3MSG2rr */ |
| 142555 | VR128, VR128, VR128, VR128, |
| 142556 | /* VSM3RNDS2rm */ |
| 142557 | VR128, VR128, VR128, i128mem, i32u8imm, |
| 142558 | /* VSM3RNDS2rr */ |
| 142559 | VR128, VR128, VR128, VR128, i32u8imm, |
| 142560 | /* VSM4KEY4Yrm */ |
| 142561 | VR256, VR256, i256mem, |
| 142562 | /* VSM4KEY4Yrr */ |
| 142563 | VR256, VR256, VR256, |
| 142564 | /* VSM4KEY4rm */ |
| 142565 | VR128, VR128, i128mem, |
| 142566 | /* VSM4KEY4rr */ |
| 142567 | VR128, VR128, VR128, |
| 142568 | /* VSM4RNDS4Yrm */ |
| 142569 | VR256, VR256, i256mem, |
| 142570 | /* VSM4RNDS4Yrr */ |
| 142571 | VR256, VR256, VR256, |
| 142572 | /* VSM4RNDS4rm */ |
| 142573 | VR128, VR128, i128mem, |
| 142574 | /* VSM4RNDS4rr */ |
| 142575 | VR128, VR128, VR128, |
| 142576 | /* VSQRTPDYm */ |
| 142577 | VR256, f256mem, |
| 142578 | /* VSQRTPDYr */ |
| 142579 | VR256, VR256, |
| 142580 | /* VSQRTPDZ128m */ |
| 142581 | VR128X, f128mem, |
| 142582 | /* VSQRTPDZ128mb */ |
| 142583 | VR128X, f64mem, |
| 142584 | /* VSQRTPDZ128mbk */ |
| 142585 | VR128X, VR128X, VK2WM, f64mem, |
| 142586 | /* VSQRTPDZ128mbkz */ |
| 142587 | VR128X, VK2WM, f64mem, |
| 142588 | /* VSQRTPDZ128mk */ |
| 142589 | VR128X, VR128X, VK2WM, f128mem, |
| 142590 | /* VSQRTPDZ128mkz */ |
| 142591 | VR128X, VK2WM, f128mem, |
| 142592 | /* VSQRTPDZ128r */ |
| 142593 | VR128X, VR128X, |
| 142594 | /* VSQRTPDZ128rk */ |
| 142595 | VR128X, VR128X, VK2WM, VR128X, |
| 142596 | /* VSQRTPDZ128rkz */ |
| 142597 | VR128X, VK2WM, VR128X, |
| 142598 | /* VSQRTPDZ256m */ |
| 142599 | VR256X, f256mem, |
| 142600 | /* VSQRTPDZ256mb */ |
| 142601 | VR256X, f64mem, |
| 142602 | /* VSQRTPDZ256mbk */ |
| 142603 | VR256X, VR256X, VK4WM, f64mem, |
| 142604 | /* VSQRTPDZ256mbkz */ |
| 142605 | VR256X, VK4WM, f64mem, |
| 142606 | /* VSQRTPDZ256mk */ |
| 142607 | VR256X, VR256X, VK4WM, f256mem, |
| 142608 | /* VSQRTPDZ256mkz */ |
| 142609 | VR256X, VK4WM, f256mem, |
| 142610 | /* VSQRTPDZ256r */ |
| 142611 | VR256X, VR256X, |
| 142612 | /* VSQRTPDZ256rk */ |
| 142613 | VR256X, VR256X, VK4WM, VR256X, |
| 142614 | /* VSQRTPDZ256rkz */ |
| 142615 | VR256X, VK4WM, VR256X, |
| 142616 | /* VSQRTPDZm */ |
| 142617 | VR512, f512mem, |
| 142618 | /* VSQRTPDZmb */ |
| 142619 | VR512, f64mem, |
| 142620 | /* VSQRTPDZmbk */ |
| 142621 | VR512, VR512, VK8WM, f64mem, |
| 142622 | /* VSQRTPDZmbkz */ |
| 142623 | VR512, VK8WM, f64mem, |
| 142624 | /* VSQRTPDZmk */ |
| 142625 | VR512, VR512, VK8WM, f512mem, |
| 142626 | /* VSQRTPDZmkz */ |
| 142627 | VR512, VK8WM, f512mem, |
| 142628 | /* VSQRTPDZr */ |
| 142629 | VR512, VR512, |
| 142630 | /* VSQRTPDZrb */ |
| 142631 | VR512, VR512, AVX512RC, |
| 142632 | /* VSQRTPDZrbk */ |
| 142633 | VR512, VR512, VK8WM, VR512, AVX512RC, |
| 142634 | /* VSQRTPDZrbkz */ |
| 142635 | VR512, VK8WM, VR512, AVX512RC, |
| 142636 | /* VSQRTPDZrk */ |
| 142637 | VR512, VR512, VK8WM, VR512, |
| 142638 | /* VSQRTPDZrkz */ |
| 142639 | VR512, VK8WM, VR512, |
| 142640 | /* VSQRTPDm */ |
| 142641 | VR128, f128mem, |
| 142642 | /* VSQRTPDr */ |
| 142643 | VR128, VR128, |
| 142644 | /* VSQRTPHZ128m */ |
| 142645 | VR128X, f128mem, |
| 142646 | /* VSQRTPHZ128mb */ |
| 142647 | VR128X, f16mem, |
| 142648 | /* VSQRTPHZ128mbk */ |
| 142649 | VR128X, VR128X, VK8WM, f16mem, |
| 142650 | /* VSQRTPHZ128mbkz */ |
| 142651 | VR128X, VK8WM, f16mem, |
| 142652 | /* VSQRTPHZ128mk */ |
| 142653 | VR128X, VR128X, VK8WM, f128mem, |
| 142654 | /* VSQRTPHZ128mkz */ |
| 142655 | VR128X, VK8WM, f128mem, |
| 142656 | /* VSQRTPHZ128r */ |
| 142657 | VR128X, VR128X, |
| 142658 | /* VSQRTPHZ128rk */ |
| 142659 | VR128X, VR128X, VK8WM, VR128X, |
| 142660 | /* VSQRTPHZ128rkz */ |
| 142661 | VR128X, VK8WM, VR128X, |
| 142662 | /* VSQRTPHZ256m */ |
| 142663 | VR256X, f256mem, |
| 142664 | /* VSQRTPHZ256mb */ |
| 142665 | VR256X, f16mem, |
| 142666 | /* VSQRTPHZ256mbk */ |
| 142667 | VR256X, VR256X, VK16WM, f16mem, |
| 142668 | /* VSQRTPHZ256mbkz */ |
| 142669 | VR256X, VK16WM, f16mem, |
| 142670 | /* VSQRTPHZ256mk */ |
| 142671 | VR256X, VR256X, VK16WM, f256mem, |
| 142672 | /* VSQRTPHZ256mkz */ |
| 142673 | VR256X, VK16WM, f256mem, |
| 142674 | /* VSQRTPHZ256r */ |
| 142675 | VR256X, VR256X, |
| 142676 | /* VSQRTPHZ256rk */ |
| 142677 | VR256X, VR256X, VK16WM, VR256X, |
| 142678 | /* VSQRTPHZ256rkz */ |
| 142679 | VR256X, VK16WM, VR256X, |
| 142680 | /* VSQRTPHZm */ |
| 142681 | VR512, f512mem, |
| 142682 | /* VSQRTPHZmb */ |
| 142683 | VR512, f16mem, |
| 142684 | /* VSQRTPHZmbk */ |
| 142685 | VR512, VR512, VK32WM, f16mem, |
| 142686 | /* VSQRTPHZmbkz */ |
| 142687 | VR512, VK32WM, f16mem, |
| 142688 | /* VSQRTPHZmk */ |
| 142689 | VR512, VR512, VK32WM, f512mem, |
| 142690 | /* VSQRTPHZmkz */ |
| 142691 | VR512, VK32WM, f512mem, |
| 142692 | /* VSQRTPHZr */ |
| 142693 | VR512, VR512, |
| 142694 | /* VSQRTPHZrb */ |
| 142695 | VR512, VR512, AVX512RC, |
| 142696 | /* VSQRTPHZrbk */ |
| 142697 | VR512, VR512, VK32WM, VR512, AVX512RC, |
| 142698 | /* VSQRTPHZrbkz */ |
| 142699 | VR512, VK32WM, VR512, AVX512RC, |
| 142700 | /* VSQRTPHZrk */ |
| 142701 | VR512, VR512, VK32WM, VR512, |
| 142702 | /* VSQRTPHZrkz */ |
| 142703 | VR512, VK32WM, VR512, |
| 142704 | /* VSQRTPSYm */ |
| 142705 | VR256, f256mem, |
| 142706 | /* VSQRTPSYr */ |
| 142707 | VR256, VR256, |
| 142708 | /* VSQRTPSZ128m */ |
| 142709 | VR128X, f128mem, |
| 142710 | /* VSQRTPSZ128mb */ |
| 142711 | VR128X, f32mem, |
| 142712 | /* VSQRTPSZ128mbk */ |
| 142713 | VR128X, VR128X, VK4WM, f32mem, |
| 142714 | /* VSQRTPSZ128mbkz */ |
| 142715 | VR128X, VK4WM, f32mem, |
| 142716 | /* VSQRTPSZ128mk */ |
| 142717 | VR128X, VR128X, VK4WM, f128mem, |
| 142718 | /* VSQRTPSZ128mkz */ |
| 142719 | VR128X, VK4WM, f128mem, |
| 142720 | /* VSQRTPSZ128r */ |
| 142721 | VR128X, VR128X, |
| 142722 | /* VSQRTPSZ128rk */ |
| 142723 | VR128X, VR128X, VK4WM, VR128X, |
| 142724 | /* VSQRTPSZ128rkz */ |
| 142725 | VR128X, VK4WM, VR128X, |
| 142726 | /* VSQRTPSZ256m */ |
| 142727 | VR256X, f256mem, |
| 142728 | /* VSQRTPSZ256mb */ |
| 142729 | VR256X, f32mem, |
| 142730 | /* VSQRTPSZ256mbk */ |
| 142731 | VR256X, VR256X, VK8WM, f32mem, |
| 142732 | /* VSQRTPSZ256mbkz */ |
| 142733 | VR256X, VK8WM, f32mem, |
| 142734 | /* VSQRTPSZ256mk */ |
| 142735 | VR256X, VR256X, VK8WM, f256mem, |
| 142736 | /* VSQRTPSZ256mkz */ |
| 142737 | VR256X, VK8WM, f256mem, |
| 142738 | /* VSQRTPSZ256r */ |
| 142739 | VR256X, VR256X, |
| 142740 | /* VSQRTPSZ256rk */ |
| 142741 | VR256X, VR256X, VK8WM, VR256X, |
| 142742 | /* VSQRTPSZ256rkz */ |
| 142743 | VR256X, VK8WM, VR256X, |
| 142744 | /* VSQRTPSZm */ |
| 142745 | VR512, f512mem, |
| 142746 | /* VSQRTPSZmb */ |
| 142747 | VR512, f32mem, |
| 142748 | /* VSQRTPSZmbk */ |
| 142749 | VR512, VR512, VK16WM, f32mem, |
| 142750 | /* VSQRTPSZmbkz */ |
| 142751 | VR512, VK16WM, f32mem, |
| 142752 | /* VSQRTPSZmk */ |
| 142753 | VR512, VR512, VK16WM, f512mem, |
| 142754 | /* VSQRTPSZmkz */ |
| 142755 | VR512, VK16WM, f512mem, |
| 142756 | /* VSQRTPSZr */ |
| 142757 | VR512, VR512, |
| 142758 | /* VSQRTPSZrb */ |
| 142759 | VR512, VR512, AVX512RC, |
| 142760 | /* VSQRTPSZrbk */ |
| 142761 | VR512, VR512, VK16WM, VR512, AVX512RC, |
| 142762 | /* VSQRTPSZrbkz */ |
| 142763 | VR512, VK16WM, VR512, AVX512RC, |
| 142764 | /* VSQRTPSZrk */ |
| 142765 | VR512, VR512, VK16WM, VR512, |
| 142766 | /* VSQRTPSZrkz */ |
| 142767 | VR512, VK16WM, VR512, |
| 142768 | /* VSQRTPSm */ |
| 142769 | VR128, f128mem, |
| 142770 | /* VSQRTPSr */ |
| 142771 | VR128, VR128, |
| 142772 | /* VSQRTSDZm */ |
| 142773 | FR64X, FR64X, f64mem, |
| 142774 | /* VSQRTSDZm_Int */ |
| 142775 | VR128X, VR128X, sdmem, |
| 142776 | /* VSQRTSDZm_Intk */ |
| 142777 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 142778 | /* VSQRTSDZm_Intkz */ |
| 142779 | VR128X, VK1WM, VR128X, sdmem, |
| 142780 | /* VSQRTSDZr */ |
| 142781 | FR64X, FR64X, FR64X, |
| 142782 | /* VSQRTSDZr_Int */ |
| 142783 | VR128X, VR128X, VR128X, |
| 142784 | /* VSQRTSDZr_Intk */ |
| 142785 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 142786 | /* VSQRTSDZr_Intkz */ |
| 142787 | VR128X, VK1WM, VR128X, VR128X, |
| 142788 | /* VSQRTSDZrb_Int */ |
| 142789 | VR128X, VR128X, VR128X, AVX512RC, |
| 142790 | /* VSQRTSDZrb_Intk */ |
| 142791 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142792 | /* VSQRTSDZrb_Intkz */ |
| 142793 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142794 | /* VSQRTSDm */ |
| 142795 | FR64, FR64, f64mem, |
| 142796 | /* VSQRTSDm_Int */ |
| 142797 | VR128, VR128, sdmem, |
| 142798 | /* VSQRTSDr */ |
| 142799 | FR64, FR64, FR64, |
| 142800 | /* VSQRTSDr_Int */ |
| 142801 | VR128, VR128, VR128, |
| 142802 | /* VSQRTSHZm */ |
| 142803 | FR16X, FR16X, f16mem, |
| 142804 | /* VSQRTSHZm_Int */ |
| 142805 | VR128X, VR128X, shmem, |
| 142806 | /* VSQRTSHZm_Intk */ |
| 142807 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 142808 | /* VSQRTSHZm_Intkz */ |
| 142809 | VR128X, VK1WM, VR128X, shmem, |
| 142810 | /* VSQRTSHZr */ |
| 142811 | FR16X, FR16X, FR16X, |
| 142812 | /* VSQRTSHZr_Int */ |
| 142813 | VR128X, VR128X, VR128X, |
| 142814 | /* VSQRTSHZr_Intk */ |
| 142815 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 142816 | /* VSQRTSHZr_Intkz */ |
| 142817 | VR128X, VK1WM, VR128X, VR128X, |
| 142818 | /* VSQRTSHZrb_Int */ |
| 142819 | VR128X, VR128X, VR128X, AVX512RC, |
| 142820 | /* VSQRTSHZrb_Intk */ |
| 142821 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142822 | /* VSQRTSHZrb_Intkz */ |
| 142823 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142824 | /* VSQRTSSZm */ |
| 142825 | FR32X, FR32X, f32mem, |
| 142826 | /* VSQRTSSZm_Int */ |
| 142827 | VR128X, VR128X, ssmem, |
| 142828 | /* VSQRTSSZm_Intk */ |
| 142829 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 142830 | /* VSQRTSSZm_Intkz */ |
| 142831 | VR128X, VK1WM, VR128X, ssmem, |
| 142832 | /* VSQRTSSZr */ |
| 142833 | FR32X, FR32X, FR32X, |
| 142834 | /* VSQRTSSZr_Int */ |
| 142835 | VR128X, VR128X, VR128X, |
| 142836 | /* VSQRTSSZr_Intk */ |
| 142837 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 142838 | /* VSQRTSSZr_Intkz */ |
| 142839 | VR128X, VK1WM, VR128X, VR128X, |
| 142840 | /* VSQRTSSZrb_Int */ |
| 142841 | VR128X, VR128X, VR128X, AVX512RC, |
| 142842 | /* VSQRTSSZrb_Intk */ |
| 142843 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142844 | /* VSQRTSSZrb_Intkz */ |
| 142845 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 142846 | /* VSQRTSSm */ |
| 142847 | FR32, FR32, f32mem, |
| 142848 | /* VSQRTSSm_Int */ |
| 142849 | VR128, VR128, ssmem, |
| 142850 | /* VSQRTSSr */ |
| 142851 | FR32, FR32, FR32, |
| 142852 | /* VSQRTSSr_Int */ |
| 142853 | VR128, VR128, VR128, |
| 142854 | /* VSTMXCSR */ |
| 142855 | i32mem, |
| 142856 | /* VSUBPDYrm */ |
| 142857 | VR256, VR256, f256mem, |
| 142858 | /* VSUBPDYrr */ |
| 142859 | VR256, VR256, VR256, |
| 142860 | /* VSUBPDZ128rm */ |
| 142861 | VR128X, VR128X, f128mem, |
| 142862 | /* VSUBPDZ128rmb */ |
| 142863 | VR128X, VR128X, f64mem, |
| 142864 | /* VSUBPDZ128rmbk */ |
| 142865 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 142866 | /* VSUBPDZ128rmbkz */ |
| 142867 | VR128X, VK2WM, VR128X, f64mem, |
| 142868 | /* VSUBPDZ128rmk */ |
| 142869 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 142870 | /* VSUBPDZ128rmkz */ |
| 142871 | VR128X, VK2WM, VR128X, f128mem, |
| 142872 | /* VSUBPDZ128rr */ |
| 142873 | VR128X, VR128X, VR128X, |
| 142874 | /* VSUBPDZ128rrk */ |
| 142875 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 142876 | /* VSUBPDZ128rrkz */ |
| 142877 | VR128X, VK2WM, VR128X, VR128X, |
| 142878 | /* VSUBPDZ256rm */ |
| 142879 | VR256X, VR256X, f256mem, |
| 142880 | /* VSUBPDZ256rmb */ |
| 142881 | VR256X, VR256X, f64mem, |
| 142882 | /* VSUBPDZ256rmbk */ |
| 142883 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 142884 | /* VSUBPDZ256rmbkz */ |
| 142885 | VR256X, VK4WM, VR256X, f64mem, |
| 142886 | /* VSUBPDZ256rmk */ |
| 142887 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 142888 | /* VSUBPDZ256rmkz */ |
| 142889 | VR256X, VK4WM, VR256X, f256mem, |
| 142890 | /* VSUBPDZ256rr */ |
| 142891 | VR256X, VR256X, VR256X, |
| 142892 | /* VSUBPDZ256rrk */ |
| 142893 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 142894 | /* VSUBPDZ256rrkz */ |
| 142895 | VR256X, VK4WM, VR256X, VR256X, |
| 142896 | /* VSUBPDZrm */ |
| 142897 | VR512, VR512, f512mem, |
| 142898 | /* VSUBPDZrmb */ |
| 142899 | VR512, VR512, f64mem, |
| 142900 | /* VSUBPDZrmbk */ |
| 142901 | VR512, VR512, VK8WM, VR512, f64mem, |
| 142902 | /* VSUBPDZrmbkz */ |
| 142903 | VR512, VK8WM, VR512, f64mem, |
| 142904 | /* VSUBPDZrmk */ |
| 142905 | VR512, VR512, VK8WM, VR512, f512mem, |
| 142906 | /* VSUBPDZrmkz */ |
| 142907 | VR512, VK8WM, VR512, f512mem, |
| 142908 | /* VSUBPDZrr */ |
| 142909 | VR512, VR512, VR512, |
| 142910 | /* VSUBPDZrrb */ |
| 142911 | VR512, VR512, VR512, AVX512RC, |
| 142912 | /* VSUBPDZrrbk */ |
| 142913 | VR512, VR512, VK8WM, VR512, VR512, AVX512RC, |
| 142914 | /* VSUBPDZrrbkz */ |
| 142915 | VR512, VK8WM, VR512, VR512, AVX512RC, |
| 142916 | /* VSUBPDZrrk */ |
| 142917 | VR512, VR512, VK8WM, VR512, VR512, |
| 142918 | /* VSUBPDZrrkz */ |
| 142919 | VR512, VK8WM, VR512, VR512, |
| 142920 | /* VSUBPDrm */ |
| 142921 | VR128, VR128, f128mem, |
| 142922 | /* VSUBPDrr */ |
| 142923 | VR128, VR128, VR128, |
| 142924 | /* VSUBPHZ128rm */ |
| 142925 | VR128X, VR128X, f128mem, |
| 142926 | /* VSUBPHZ128rmb */ |
| 142927 | VR128X, VR128X, f16mem, |
| 142928 | /* VSUBPHZ128rmbk */ |
| 142929 | VR128X, VR128X, VK8WM, VR128X, f16mem, |
| 142930 | /* VSUBPHZ128rmbkz */ |
| 142931 | VR128X, VK8WM, VR128X, f16mem, |
| 142932 | /* VSUBPHZ128rmk */ |
| 142933 | VR128X, VR128X, VK8WM, VR128X, f128mem, |
| 142934 | /* VSUBPHZ128rmkz */ |
| 142935 | VR128X, VK8WM, VR128X, f128mem, |
| 142936 | /* VSUBPHZ128rr */ |
| 142937 | VR128X, VR128X, VR128X, |
| 142938 | /* VSUBPHZ128rrk */ |
| 142939 | VR128X, VR128X, VK8WM, VR128X, VR128X, |
| 142940 | /* VSUBPHZ128rrkz */ |
| 142941 | VR128X, VK8WM, VR128X, VR128X, |
| 142942 | /* VSUBPHZ256rm */ |
| 142943 | VR256X, VR256X, f256mem, |
| 142944 | /* VSUBPHZ256rmb */ |
| 142945 | VR256X, VR256X, f16mem, |
| 142946 | /* VSUBPHZ256rmbk */ |
| 142947 | VR256X, VR256X, VK16WM, VR256X, f16mem, |
| 142948 | /* VSUBPHZ256rmbkz */ |
| 142949 | VR256X, VK16WM, VR256X, f16mem, |
| 142950 | /* VSUBPHZ256rmk */ |
| 142951 | VR256X, VR256X, VK16WM, VR256X, f256mem, |
| 142952 | /* VSUBPHZ256rmkz */ |
| 142953 | VR256X, VK16WM, VR256X, f256mem, |
| 142954 | /* VSUBPHZ256rr */ |
| 142955 | VR256X, VR256X, VR256X, |
| 142956 | /* VSUBPHZ256rrk */ |
| 142957 | VR256X, VR256X, VK16WM, VR256X, VR256X, |
| 142958 | /* VSUBPHZ256rrkz */ |
| 142959 | VR256X, VK16WM, VR256X, VR256X, |
| 142960 | /* VSUBPHZrm */ |
| 142961 | VR512, VR512, f512mem, |
| 142962 | /* VSUBPHZrmb */ |
| 142963 | VR512, VR512, f16mem, |
| 142964 | /* VSUBPHZrmbk */ |
| 142965 | VR512, VR512, VK32WM, VR512, f16mem, |
| 142966 | /* VSUBPHZrmbkz */ |
| 142967 | VR512, VK32WM, VR512, f16mem, |
| 142968 | /* VSUBPHZrmk */ |
| 142969 | VR512, VR512, VK32WM, VR512, f512mem, |
| 142970 | /* VSUBPHZrmkz */ |
| 142971 | VR512, VK32WM, VR512, f512mem, |
| 142972 | /* VSUBPHZrr */ |
| 142973 | VR512, VR512, VR512, |
| 142974 | /* VSUBPHZrrb */ |
| 142975 | VR512, VR512, VR512, AVX512RC, |
| 142976 | /* VSUBPHZrrbk */ |
| 142977 | VR512, VR512, VK32WM, VR512, VR512, AVX512RC, |
| 142978 | /* VSUBPHZrrbkz */ |
| 142979 | VR512, VK32WM, VR512, VR512, AVX512RC, |
| 142980 | /* VSUBPHZrrk */ |
| 142981 | VR512, VR512, VK32WM, VR512, VR512, |
| 142982 | /* VSUBPHZrrkz */ |
| 142983 | VR512, VK32WM, VR512, VR512, |
| 142984 | /* VSUBPSYrm */ |
| 142985 | VR256, VR256, f256mem, |
| 142986 | /* VSUBPSYrr */ |
| 142987 | VR256, VR256, VR256, |
| 142988 | /* VSUBPSZ128rm */ |
| 142989 | VR128X, VR128X, f128mem, |
| 142990 | /* VSUBPSZ128rmb */ |
| 142991 | VR128X, VR128X, f32mem, |
| 142992 | /* VSUBPSZ128rmbk */ |
| 142993 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 142994 | /* VSUBPSZ128rmbkz */ |
| 142995 | VR128X, VK4WM, VR128X, f32mem, |
| 142996 | /* VSUBPSZ128rmk */ |
| 142997 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 142998 | /* VSUBPSZ128rmkz */ |
| 142999 | VR128X, VK4WM, VR128X, f128mem, |
| 143000 | /* VSUBPSZ128rr */ |
| 143001 | VR128X, VR128X, VR128X, |
| 143002 | /* VSUBPSZ128rrk */ |
| 143003 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 143004 | /* VSUBPSZ128rrkz */ |
| 143005 | VR128X, VK4WM, VR128X, VR128X, |
| 143006 | /* VSUBPSZ256rm */ |
| 143007 | VR256X, VR256X, f256mem, |
| 143008 | /* VSUBPSZ256rmb */ |
| 143009 | VR256X, VR256X, f32mem, |
| 143010 | /* VSUBPSZ256rmbk */ |
| 143011 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 143012 | /* VSUBPSZ256rmbkz */ |
| 143013 | VR256X, VK8WM, VR256X, f32mem, |
| 143014 | /* VSUBPSZ256rmk */ |
| 143015 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 143016 | /* VSUBPSZ256rmkz */ |
| 143017 | VR256X, VK8WM, VR256X, f256mem, |
| 143018 | /* VSUBPSZ256rr */ |
| 143019 | VR256X, VR256X, VR256X, |
| 143020 | /* VSUBPSZ256rrk */ |
| 143021 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 143022 | /* VSUBPSZ256rrkz */ |
| 143023 | VR256X, VK8WM, VR256X, VR256X, |
| 143024 | /* VSUBPSZrm */ |
| 143025 | VR512, VR512, f512mem, |
| 143026 | /* VSUBPSZrmb */ |
| 143027 | VR512, VR512, f32mem, |
| 143028 | /* VSUBPSZrmbk */ |
| 143029 | VR512, VR512, VK16WM, VR512, f32mem, |
| 143030 | /* VSUBPSZrmbkz */ |
| 143031 | VR512, VK16WM, VR512, f32mem, |
| 143032 | /* VSUBPSZrmk */ |
| 143033 | VR512, VR512, VK16WM, VR512, f512mem, |
| 143034 | /* VSUBPSZrmkz */ |
| 143035 | VR512, VK16WM, VR512, f512mem, |
| 143036 | /* VSUBPSZrr */ |
| 143037 | VR512, VR512, VR512, |
| 143038 | /* VSUBPSZrrb */ |
| 143039 | VR512, VR512, VR512, AVX512RC, |
| 143040 | /* VSUBPSZrrbk */ |
| 143041 | VR512, VR512, VK16WM, VR512, VR512, AVX512RC, |
| 143042 | /* VSUBPSZrrbkz */ |
| 143043 | VR512, VK16WM, VR512, VR512, AVX512RC, |
| 143044 | /* VSUBPSZrrk */ |
| 143045 | VR512, VR512, VK16WM, VR512, VR512, |
| 143046 | /* VSUBPSZrrkz */ |
| 143047 | VR512, VK16WM, VR512, VR512, |
| 143048 | /* VSUBPSrm */ |
| 143049 | VR128, VR128, f128mem, |
| 143050 | /* VSUBPSrr */ |
| 143051 | VR128, VR128, VR128, |
| 143052 | /* VSUBSDZrm */ |
| 143053 | FR64X, FR64X, f64mem, |
| 143054 | /* VSUBSDZrm_Int */ |
| 143055 | VR128X, VR128X, sdmem, |
| 143056 | /* VSUBSDZrm_Intk */ |
| 143057 | VR128X, VR128X, VK1WM, VR128X, sdmem, |
| 143058 | /* VSUBSDZrm_Intkz */ |
| 143059 | VR128X, VK1WM, VR128X, sdmem, |
| 143060 | /* VSUBSDZrr */ |
| 143061 | FR64X, FR64X, FR64X, |
| 143062 | /* VSUBSDZrr_Int */ |
| 143063 | VR128X, VR128X, VR128X, |
| 143064 | /* VSUBSDZrr_Intk */ |
| 143065 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 143066 | /* VSUBSDZrr_Intkz */ |
| 143067 | VR128X, VK1WM, VR128X, VR128X, |
| 143068 | /* VSUBSDZrrb_Int */ |
| 143069 | VR128X, VR128X, VR128X, AVX512RC, |
| 143070 | /* VSUBSDZrrb_Intk */ |
| 143071 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 143072 | /* VSUBSDZrrb_Intkz */ |
| 143073 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 143074 | /* VSUBSDrm */ |
| 143075 | FR64, FR64, f64mem, |
| 143076 | /* VSUBSDrm_Int */ |
| 143077 | VR128, VR128, sdmem, |
| 143078 | /* VSUBSDrr */ |
| 143079 | FR64, FR64, FR64, |
| 143080 | /* VSUBSDrr_Int */ |
| 143081 | VR128, VR128, VR128, |
| 143082 | /* VSUBSHZrm */ |
| 143083 | FR16X, FR16X, f16mem, |
| 143084 | /* VSUBSHZrm_Int */ |
| 143085 | VR128X, VR128X, shmem, |
| 143086 | /* VSUBSHZrm_Intk */ |
| 143087 | VR128X, VR128X, VK1WM, VR128X, shmem, |
| 143088 | /* VSUBSHZrm_Intkz */ |
| 143089 | VR128X, VK1WM, VR128X, shmem, |
| 143090 | /* VSUBSHZrr */ |
| 143091 | FR16X, FR16X, FR16X, |
| 143092 | /* VSUBSHZrr_Int */ |
| 143093 | VR128X, VR128X, VR128X, |
| 143094 | /* VSUBSHZrr_Intk */ |
| 143095 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 143096 | /* VSUBSHZrr_Intkz */ |
| 143097 | VR128X, VK1WM, VR128X, VR128X, |
| 143098 | /* VSUBSHZrrb_Int */ |
| 143099 | VR128X, VR128X, VR128X, AVX512RC, |
| 143100 | /* VSUBSHZrrb_Intk */ |
| 143101 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 143102 | /* VSUBSHZrrb_Intkz */ |
| 143103 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 143104 | /* VSUBSSZrm */ |
| 143105 | FR32X, FR32X, f32mem, |
| 143106 | /* VSUBSSZrm_Int */ |
| 143107 | VR128X, VR128X, ssmem, |
| 143108 | /* VSUBSSZrm_Intk */ |
| 143109 | VR128X, VR128X, VK1WM, VR128X, ssmem, |
| 143110 | /* VSUBSSZrm_Intkz */ |
| 143111 | VR128X, VK1WM, VR128X, ssmem, |
| 143112 | /* VSUBSSZrr */ |
| 143113 | FR32X, FR32X, FR32X, |
| 143114 | /* VSUBSSZrr_Int */ |
| 143115 | VR128X, VR128X, VR128X, |
| 143116 | /* VSUBSSZrr_Intk */ |
| 143117 | VR128X, VR128X, VK1WM, VR128X, VR128X, |
| 143118 | /* VSUBSSZrr_Intkz */ |
| 143119 | VR128X, VK1WM, VR128X, VR128X, |
| 143120 | /* VSUBSSZrrb_Int */ |
| 143121 | VR128X, VR128X, VR128X, AVX512RC, |
| 143122 | /* VSUBSSZrrb_Intk */ |
| 143123 | VR128X, VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 143124 | /* VSUBSSZrrb_Intkz */ |
| 143125 | VR128X, VK1WM, VR128X, VR128X, AVX512RC, |
| 143126 | /* VSUBSSrm */ |
| 143127 | FR32, FR32, f32mem, |
| 143128 | /* VSUBSSrm_Int */ |
| 143129 | VR128, VR128, ssmem, |
| 143130 | /* VSUBSSrr */ |
| 143131 | FR32, FR32, FR32, |
| 143132 | /* VSUBSSrr_Int */ |
| 143133 | VR128, VR128, VR128, |
| 143134 | /* VTESTPDYrm */ |
| 143135 | VR256, f256mem, |
| 143136 | /* VTESTPDYrr */ |
| 143137 | VR256, VR256, |
| 143138 | /* VTESTPDrm */ |
| 143139 | VR128, f128mem, |
| 143140 | /* VTESTPDrr */ |
| 143141 | VR128, VR128, |
| 143142 | /* VTESTPSYrm */ |
| 143143 | VR256, f256mem, |
| 143144 | /* VTESTPSYrr */ |
| 143145 | VR256, VR256, |
| 143146 | /* VTESTPSrm */ |
| 143147 | VR128, f128mem, |
| 143148 | /* VTESTPSrr */ |
| 143149 | VR128, VR128, |
| 143150 | /* VUCOMISDZrm */ |
| 143151 | FR64X, f64mem, |
| 143152 | /* VUCOMISDZrm_Int */ |
| 143153 | VR128X, sdmem, |
| 143154 | /* VUCOMISDZrr */ |
| 143155 | FR64X, FR64X, |
| 143156 | /* VUCOMISDZrr_Int */ |
| 143157 | VR128X, VR128X, |
| 143158 | /* VUCOMISDZrrb */ |
| 143159 | VR128X, VR128X, |
| 143160 | /* VUCOMISDrm */ |
| 143161 | FR64, f64mem, |
| 143162 | /* VUCOMISDrm_Int */ |
| 143163 | VR128, sdmem, |
| 143164 | /* VUCOMISDrr */ |
| 143165 | FR64, FR64, |
| 143166 | /* VUCOMISDrr_Int */ |
| 143167 | VR128, VR128, |
| 143168 | /* VUCOMISHZrm */ |
| 143169 | FR16X, f16mem, |
| 143170 | /* VUCOMISHZrm_Int */ |
| 143171 | VR128X, shmem, |
| 143172 | /* VUCOMISHZrr */ |
| 143173 | FR16X, FR16X, |
| 143174 | /* VUCOMISHZrr_Int */ |
| 143175 | VR128X, VR128X, |
| 143176 | /* VUCOMISHZrrb */ |
| 143177 | VR128X, VR128X, |
| 143178 | /* VUCOMISSZrm */ |
| 143179 | FR32X, f32mem, |
| 143180 | /* VUCOMISSZrm_Int */ |
| 143181 | VR128X, ssmem, |
| 143182 | /* VUCOMISSZrr */ |
| 143183 | FR32X, FR32X, |
| 143184 | /* VUCOMISSZrr_Int */ |
| 143185 | VR128X, VR128X, |
| 143186 | /* VUCOMISSZrrb */ |
| 143187 | VR128X, VR128X, |
| 143188 | /* VUCOMISSrm */ |
| 143189 | FR32, f32mem, |
| 143190 | /* VUCOMISSrm_Int */ |
| 143191 | VR128, ssmem, |
| 143192 | /* VUCOMISSrr */ |
| 143193 | FR32, FR32, |
| 143194 | /* VUCOMISSrr_Int */ |
| 143195 | VR128, VR128, |
| 143196 | /* VUNPCKHPDYrm */ |
| 143197 | VR256, VR256, f256mem, |
| 143198 | /* VUNPCKHPDYrr */ |
| 143199 | VR256, VR256, VR256, |
| 143200 | /* VUNPCKHPDZ128rm */ |
| 143201 | VR128X, VR128X, f128mem, |
| 143202 | /* VUNPCKHPDZ128rmb */ |
| 143203 | VR128X, VR128X, f64mem, |
| 143204 | /* VUNPCKHPDZ128rmbk */ |
| 143205 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 143206 | /* VUNPCKHPDZ128rmbkz */ |
| 143207 | VR128X, VK2WM, VR128X, f64mem, |
| 143208 | /* VUNPCKHPDZ128rmk */ |
| 143209 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 143210 | /* VUNPCKHPDZ128rmkz */ |
| 143211 | VR128X, VK2WM, VR128X, f128mem, |
| 143212 | /* VUNPCKHPDZ128rr */ |
| 143213 | VR128X, VR128X, VR128X, |
| 143214 | /* VUNPCKHPDZ128rrk */ |
| 143215 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 143216 | /* VUNPCKHPDZ128rrkz */ |
| 143217 | VR128X, VK2WM, VR128X, VR128X, |
| 143218 | /* VUNPCKHPDZ256rm */ |
| 143219 | VR256X, VR256X, f256mem, |
| 143220 | /* VUNPCKHPDZ256rmb */ |
| 143221 | VR256X, VR256X, f64mem, |
| 143222 | /* VUNPCKHPDZ256rmbk */ |
| 143223 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 143224 | /* VUNPCKHPDZ256rmbkz */ |
| 143225 | VR256X, VK4WM, VR256X, f64mem, |
| 143226 | /* VUNPCKHPDZ256rmk */ |
| 143227 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 143228 | /* VUNPCKHPDZ256rmkz */ |
| 143229 | VR256X, VK4WM, VR256X, f256mem, |
| 143230 | /* VUNPCKHPDZ256rr */ |
| 143231 | VR256X, VR256X, VR256X, |
| 143232 | /* VUNPCKHPDZ256rrk */ |
| 143233 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 143234 | /* VUNPCKHPDZ256rrkz */ |
| 143235 | VR256X, VK4WM, VR256X, VR256X, |
| 143236 | /* VUNPCKHPDZrm */ |
| 143237 | VR512, VR512, f512mem, |
| 143238 | /* VUNPCKHPDZrmb */ |
| 143239 | VR512, VR512, f64mem, |
| 143240 | /* VUNPCKHPDZrmbk */ |
| 143241 | VR512, VR512, VK8WM, VR512, f64mem, |
| 143242 | /* VUNPCKHPDZrmbkz */ |
| 143243 | VR512, VK8WM, VR512, f64mem, |
| 143244 | /* VUNPCKHPDZrmk */ |
| 143245 | VR512, VR512, VK8WM, VR512, f512mem, |
| 143246 | /* VUNPCKHPDZrmkz */ |
| 143247 | VR512, VK8WM, VR512, f512mem, |
| 143248 | /* VUNPCKHPDZrr */ |
| 143249 | VR512, VR512, VR512, |
| 143250 | /* VUNPCKHPDZrrk */ |
| 143251 | VR512, VR512, VK8WM, VR512, VR512, |
| 143252 | /* VUNPCKHPDZrrkz */ |
| 143253 | VR512, VK8WM, VR512, VR512, |
| 143254 | /* VUNPCKHPDrm */ |
| 143255 | VR128, VR128, f128mem, |
| 143256 | /* VUNPCKHPDrr */ |
| 143257 | VR128, VR128, VR128, |
| 143258 | /* VUNPCKHPSYrm */ |
| 143259 | VR256, VR256, f256mem, |
| 143260 | /* VUNPCKHPSYrr */ |
| 143261 | VR256, VR256, VR256, |
| 143262 | /* VUNPCKHPSZ128rm */ |
| 143263 | VR128X, VR128X, f128mem, |
| 143264 | /* VUNPCKHPSZ128rmb */ |
| 143265 | VR128X, VR128X, f32mem, |
| 143266 | /* VUNPCKHPSZ128rmbk */ |
| 143267 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 143268 | /* VUNPCKHPSZ128rmbkz */ |
| 143269 | VR128X, VK4WM, VR128X, f32mem, |
| 143270 | /* VUNPCKHPSZ128rmk */ |
| 143271 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 143272 | /* VUNPCKHPSZ128rmkz */ |
| 143273 | VR128X, VK4WM, VR128X, f128mem, |
| 143274 | /* VUNPCKHPSZ128rr */ |
| 143275 | VR128X, VR128X, VR128X, |
| 143276 | /* VUNPCKHPSZ128rrk */ |
| 143277 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 143278 | /* VUNPCKHPSZ128rrkz */ |
| 143279 | VR128X, VK4WM, VR128X, VR128X, |
| 143280 | /* VUNPCKHPSZ256rm */ |
| 143281 | VR256X, VR256X, f256mem, |
| 143282 | /* VUNPCKHPSZ256rmb */ |
| 143283 | VR256X, VR256X, f32mem, |
| 143284 | /* VUNPCKHPSZ256rmbk */ |
| 143285 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 143286 | /* VUNPCKHPSZ256rmbkz */ |
| 143287 | VR256X, VK8WM, VR256X, f32mem, |
| 143288 | /* VUNPCKHPSZ256rmk */ |
| 143289 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 143290 | /* VUNPCKHPSZ256rmkz */ |
| 143291 | VR256X, VK8WM, VR256X, f256mem, |
| 143292 | /* VUNPCKHPSZ256rr */ |
| 143293 | VR256X, VR256X, VR256X, |
| 143294 | /* VUNPCKHPSZ256rrk */ |
| 143295 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 143296 | /* VUNPCKHPSZ256rrkz */ |
| 143297 | VR256X, VK8WM, VR256X, VR256X, |
| 143298 | /* VUNPCKHPSZrm */ |
| 143299 | VR512, VR512, f512mem, |
| 143300 | /* VUNPCKHPSZrmb */ |
| 143301 | VR512, VR512, f32mem, |
| 143302 | /* VUNPCKHPSZrmbk */ |
| 143303 | VR512, VR512, VK16WM, VR512, f32mem, |
| 143304 | /* VUNPCKHPSZrmbkz */ |
| 143305 | VR512, VK16WM, VR512, f32mem, |
| 143306 | /* VUNPCKHPSZrmk */ |
| 143307 | VR512, VR512, VK16WM, VR512, f512mem, |
| 143308 | /* VUNPCKHPSZrmkz */ |
| 143309 | VR512, VK16WM, VR512, f512mem, |
| 143310 | /* VUNPCKHPSZrr */ |
| 143311 | VR512, VR512, VR512, |
| 143312 | /* VUNPCKHPSZrrk */ |
| 143313 | VR512, VR512, VK16WM, VR512, VR512, |
| 143314 | /* VUNPCKHPSZrrkz */ |
| 143315 | VR512, VK16WM, VR512, VR512, |
| 143316 | /* VUNPCKHPSrm */ |
| 143317 | VR128, VR128, f128mem, |
| 143318 | /* VUNPCKHPSrr */ |
| 143319 | VR128, VR128, VR128, |
| 143320 | /* VUNPCKLPDYrm */ |
| 143321 | VR256, VR256, f256mem, |
| 143322 | /* VUNPCKLPDYrr */ |
| 143323 | VR256, VR256, VR256, |
| 143324 | /* VUNPCKLPDZ128rm */ |
| 143325 | VR128X, VR128X, f128mem, |
| 143326 | /* VUNPCKLPDZ128rmb */ |
| 143327 | VR128X, VR128X, f64mem, |
| 143328 | /* VUNPCKLPDZ128rmbk */ |
| 143329 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 143330 | /* VUNPCKLPDZ128rmbkz */ |
| 143331 | VR128X, VK2WM, VR128X, f64mem, |
| 143332 | /* VUNPCKLPDZ128rmk */ |
| 143333 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 143334 | /* VUNPCKLPDZ128rmkz */ |
| 143335 | VR128X, VK2WM, VR128X, f128mem, |
| 143336 | /* VUNPCKLPDZ128rr */ |
| 143337 | VR128X, VR128X, VR128X, |
| 143338 | /* VUNPCKLPDZ128rrk */ |
| 143339 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 143340 | /* VUNPCKLPDZ128rrkz */ |
| 143341 | VR128X, VK2WM, VR128X, VR128X, |
| 143342 | /* VUNPCKLPDZ256rm */ |
| 143343 | VR256X, VR256X, f256mem, |
| 143344 | /* VUNPCKLPDZ256rmb */ |
| 143345 | VR256X, VR256X, f64mem, |
| 143346 | /* VUNPCKLPDZ256rmbk */ |
| 143347 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 143348 | /* VUNPCKLPDZ256rmbkz */ |
| 143349 | VR256X, VK4WM, VR256X, f64mem, |
| 143350 | /* VUNPCKLPDZ256rmk */ |
| 143351 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 143352 | /* VUNPCKLPDZ256rmkz */ |
| 143353 | VR256X, VK4WM, VR256X, f256mem, |
| 143354 | /* VUNPCKLPDZ256rr */ |
| 143355 | VR256X, VR256X, VR256X, |
| 143356 | /* VUNPCKLPDZ256rrk */ |
| 143357 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 143358 | /* VUNPCKLPDZ256rrkz */ |
| 143359 | VR256X, VK4WM, VR256X, VR256X, |
| 143360 | /* VUNPCKLPDZrm */ |
| 143361 | VR512, VR512, f512mem, |
| 143362 | /* VUNPCKLPDZrmb */ |
| 143363 | VR512, VR512, f64mem, |
| 143364 | /* VUNPCKLPDZrmbk */ |
| 143365 | VR512, VR512, VK8WM, VR512, f64mem, |
| 143366 | /* VUNPCKLPDZrmbkz */ |
| 143367 | VR512, VK8WM, VR512, f64mem, |
| 143368 | /* VUNPCKLPDZrmk */ |
| 143369 | VR512, VR512, VK8WM, VR512, f512mem, |
| 143370 | /* VUNPCKLPDZrmkz */ |
| 143371 | VR512, VK8WM, VR512, f512mem, |
| 143372 | /* VUNPCKLPDZrr */ |
| 143373 | VR512, VR512, VR512, |
| 143374 | /* VUNPCKLPDZrrk */ |
| 143375 | VR512, VR512, VK8WM, VR512, VR512, |
| 143376 | /* VUNPCKLPDZrrkz */ |
| 143377 | VR512, VK8WM, VR512, VR512, |
| 143378 | /* VUNPCKLPDrm */ |
| 143379 | VR128, VR128, f128mem, |
| 143380 | /* VUNPCKLPDrr */ |
| 143381 | VR128, VR128, VR128, |
| 143382 | /* VUNPCKLPSYrm */ |
| 143383 | VR256, VR256, f256mem, |
| 143384 | /* VUNPCKLPSYrr */ |
| 143385 | VR256, VR256, VR256, |
| 143386 | /* VUNPCKLPSZ128rm */ |
| 143387 | VR128X, VR128X, f128mem, |
| 143388 | /* VUNPCKLPSZ128rmb */ |
| 143389 | VR128X, VR128X, f32mem, |
| 143390 | /* VUNPCKLPSZ128rmbk */ |
| 143391 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 143392 | /* VUNPCKLPSZ128rmbkz */ |
| 143393 | VR128X, VK4WM, VR128X, f32mem, |
| 143394 | /* VUNPCKLPSZ128rmk */ |
| 143395 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 143396 | /* VUNPCKLPSZ128rmkz */ |
| 143397 | VR128X, VK4WM, VR128X, f128mem, |
| 143398 | /* VUNPCKLPSZ128rr */ |
| 143399 | VR128X, VR128X, VR128X, |
| 143400 | /* VUNPCKLPSZ128rrk */ |
| 143401 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 143402 | /* VUNPCKLPSZ128rrkz */ |
| 143403 | VR128X, VK4WM, VR128X, VR128X, |
| 143404 | /* VUNPCKLPSZ256rm */ |
| 143405 | VR256X, VR256X, f256mem, |
| 143406 | /* VUNPCKLPSZ256rmb */ |
| 143407 | VR256X, VR256X, f32mem, |
| 143408 | /* VUNPCKLPSZ256rmbk */ |
| 143409 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 143410 | /* VUNPCKLPSZ256rmbkz */ |
| 143411 | VR256X, VK8WM, VR256X, f32mem, |
| 143412 | /* VUNPCKLPSZ256rmk */ |
| 143413 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 143414 | /* VUNPCKLPSZ256rmkz */ |
| 143415 | VR256X, VK8WM, VR256X, f256mem, |
| 143416 | /* VUNPCKLPSZ256rr */ |
| 143417 | VR256X, VR256X, VR256X, |
| 143418 | /* VUNPCKLPSZ256rrk */ |
| 143419 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 143420 | /* VUNPCKLPSZ256rrkz */ |
| 143421 | VR256X, VK8WM, VR256X, VR256X, |
| 143422 | /* VUNPCKLPSZrm */ |
| 143423 | VR512, VR512, f512mem, |
| 143424 | /* VUNPCKLPSZrmb */ |
| 143425 | VR512, VR512, f32mem, |
| 143426 | /* VUNPCKLPSZrmbk */ |
| 143427 | VR512, VR512, VK16WM, VR512, f32mem, |
| 143428 | /* VUNPCKLPSZrmbkz */ |
| 143429 | VR512, VK16WM, VR512, f32mem, |
| 143430 | /* VUNPCKLPSZrmk */ |
| 143431 | VR512, VR512, VK16WM, VR512, f512mem, |
| 143432 | /* VUNPCKLPSZrmkz */ |
| 143433 | VR512, VK16WM, VR512, f512mem, |
| 143434 | /* VUNPCKLPSZrr */ |
| 143435 | VR512, VR512, VR512, |
| 143436 | /* VUNPCKLPSZrrk */ |
| 143437 | VR512, VR512, VK16WM, VR512, VR512, |
| 143438 | /* VUNPCKLPSZrrkz */ |
| 143439 | VR512, VK16WM, VR512, VR512, |
| 143440 | /* VUNPCKLPSrm */ |
| 143441 | VR128, VR128, f128mem, |
| 143442 | /* VUNPCKLPSrr */ |
| 143443 | VR128, VR128, VR128, |
| 143444 | /* VXORPDYrm */ |
| 143445 | VR256, VR256, f256mem, |
| 143446 | /* VXORPDYrr */ |
| 143447 | VR256, VR256, VR256, |
| 143448 | /* VXORPDZ128rm */ |
| 143449 | VR128X, VR128X, f128mem, |
| 143450 | /* VXORPDZ128rmb */ |
| 143451 | VR128X, VR128X, f64mem, |
| 143452 | /* VXORPDZ128rmbk */ |
| 143453 | VR128X, VR128X, VK2WM, VR128X, f64mem, |
| 143454 | /* VXORPDZ128rmbkz */ |
| 143455 | VR128X, VK2WM, VR128X, f64mem, |
| 143456 | /* VXORPDZ128rmk */ |
| 143457 | VR128X, VR128X, VK2WM, VR128X, f128mem, |
| 143458 | /* VXORPDZ128rmkz */ |
| 143459 | VR128X, VK2WM, VR128X, f128mem, |
| 143460 | /* VXORPDZ128rr */ |
| 143461 | VR128X, VR128X, VR128X, |
| 143462 | /* VXORPDZ128rrk */ |
| 143463 | VR128X, VR128X, VK2WM, VR128X, VR128X, |
| 143464 | /* VXORPDZ128rrkz */ |
| 143465 | VR128X, VK2WM, VR128X, VR128X, |
| 143466 | /* VXORPDZ256rm */ |
| 143467 | VR256X, VR256X, f256mem, |
| 143468 | /* VXORPDZ256rmb */ |
| 143469 | VR256X, VR256X, f64mem, |
| 143470 | /* VXORPDZ256rmbk */ |
| 143471 | VR256X, VR256X, VK4WM, VR256X, f64mem, |
| 143472 | /* VXORPDZ256rmbkz */ |
| 143473 | VR256X, VK4WM, VR256X, f64mem, |
| 143474 | /* VXORPDZ256rmk */ |
| 143475 | VR256X, VR256X, VK4WM, VR256X, f256mem, |
| 143476 | /* VXORPDZ256rmkz */ |
| 143477 | VR256X, VK4WM, VR256X, f256mem, |
| 143478 | /* VXORPDZ256rr */ |
| 143479 | VR256X, VR256X, VR256X, |
| 143480 | /* VXORPDZ256rrk */ |
| 143481 | VR256X, VR256X, VK4WM, VR256X, VR256X, |
| 143482 | /* VXORPDZ256rrkz */ |
| 143483 | VR256X, VK4WM, VR256X, VR256X, |
| 143484 | /* VXORPDZrm */ |
| 143485 | VR512, VR512, f512mem, |
| 143486 | /* VXORPDZrmb */ |
| 143487 | VR512, VR512, f64mem, |
| 143488 | /* VXORPDZrmbk */ |
| 143489 | VR512, VR512, VK8WM, VR512, f64mem, |
| 143490 | /* VXORPDZrmbkz */ |
| 143491 | VR512, VK8WM, VR512, f64mem, |
| 143492 | /* VXORPDZrmk */ |
| 143493 | VR512, VR512, VK8WM, VR512, f512mem, |
| 143494 | /* VXORPDZrmkz */ |
| 143495 | VR512, VK8WM, VR512, f512mem, |
| 143496 | /* VXORPDZrr */ |
| 143497 | VR512, VR512, VR512, |
| 143498 | /* VXORPDZrrk */ |
| 143499 | VR512, VR512, VK8WM, VR512, VR512, |
| 143500 | /* VXORPDZrrkz */ |
| 143501 | VR512, VK8WM, VR512, VR512, |
| 143502 | /* VXORPDrm */ |
| 143503 | VR128, VR128, f128mem, |
| 143504 | /* VXORPDrr */ |
| 143505 | VR128, VR128, VR128, |
| 143506 | /* VXORPSYrm */ |
| 143507 | VR256, VR256, f256mem, |
| 143508 | /* VXORPSYrr */ |
| 143509 | VR256, VR256, VR256, |
| 143510 | /* VXORPSZ128rm */ |
| 143511 | VR128X, VR128X, f128mem, |
| 143512 | /* VXORPSZ128rmb */ |
| 143513 | VR128X, VR128X, f32mem, |
| 143514 | /* VXORPSZ128rmbk */ |
| 143515 | VR128X, VR128X, VK4WM, VR128X, f32mem, |
| 143516 | /* VXORPSZ128rmbkz */ |
| 143517 | VR128X, VK4WM, VR128X, f32mem, |
| 143518 | /* VXORPSZ128rmk */ |
| 143519 | VR128X, VR128X, VK4WM, VR128X, f128mem, |
| 143520 | /* VXORPSZ128rmkz */ |
| 143521 | VR128X, VK4WM, VR128X, f128mem, |
| 143522 | /* VXORPSZ128rr */ |
| 143523 | VR128X, VR128X, VR128X, |
| 143524 | /* VXORPSZ128rrk */ |
| 143525 | VR128X, VR128X, VK4WM, VR128X, VR128X, |
| 143526 | /* VXORPSZ128rrkz */ |
| 143527 | VR128X, VK4WM, VR128X, VR128X, |
| 143528 | /* VXORPSZ256rm */ |
| 143529 | VR256X, VR256X, f256mem, |
| 143530 | /* VXORPSZ256rmb */ |
| 143531 | VR256X, VR256X, f32mem, |
| 143532 | /* VXORPSZ256rmbk */ |
| 143533 | VR256X, VR256X, VK8WM, VR256X, f32mem, |
| 143534 | /* VXORPSZ256rmbkz */ |
| 143535 | VR256X, VK8WM, VR256X, f32mem, |
| 143536 | /* VXORPSZ256rmk */ |
| 143537 | VR256X, VR256X, VK8WM, VR256X, f256mem, |
| 143538 | /* VXORPSZ256rmkz */ |
| 143539 | VR256X, VK8WM, VR256X, f256mem, |
| 143540 | /* VXORPSZ256rr */ |
| 143541 | VR256X, VR256X, VR256X, |
| 143542 | /* VXORPSZ256rrk */ |
| 143543 | VR256X, VR256X, VK8WM, VR256X, VR256X, |
| 143544 | /* VXORPSZ256rrkz */ |
| 143545 | VR256X, VK8WM, VR256X, VR256X, |
| 143546 | /* VXORPSZrm */ |
| 143547 | VR512, VR512, f512mem, |
| 143548 | /* VXORPSZrmb */ |
| 143549 | VR512, VR512, f32mem, |
| 143550 | /* VXORPSZrmbk */ |
| 143551 | VR512, VR512, VK16WM, VR512, f32mem, |
| 143552 | /* VXORPSZrmbkz */ |
| 143553 | VR512, VK16WM, VR512, f32mem, |
| 143554 | /* VXORPSZrmk */ |
| 143555 | VR512, VR512, VK16WM, VR512, f512mem, |
| 143556 | /* VXORPSZrmkz */ |
| 143557 | VR512, VK16WM, VR512, f512mem, |
| 143558 | /* VXORPSZrr */ |
| 143559 | VR512, VR512, VR512, |
| 143560 | /* VXORPSZrrk */ |
| 143561 | VR512, VR512, VK16WM, VR512, VR512, |
| 143562 | /* VXORPSZrrkz */ |
| 143563 | VR512, VK16WM, VR512, VR512, |
| 143564 | /* VXORPSrm */ |
| 143565 | VR128, VR128, f128mem, |
| 143566 | /* VXORPSrr */ |
| 143567 | VR128, VR128, VR128, |
| 143568 | /* VZEROALL */ |
| 143569 | /* VZEROUPPER */ |
| 143570 | /* WAIT */ |
| 143571 | /* WBINVD */ |
| 143572 | /* WBNOINVD */ |
| 143573 | /* WRFSBASE */ |
| 143574 | GR32, |
| 143575 | /* WRFSBASE64 */ |
| 143576 | GR64, |
| 143577 | /* WRGSBASE */ |
| 143578 | GR32, |
| 143579 | /* WRGSBASE64 */ |
| 143580 | GR64, |
| 143581 | /* WRMSR */ |
| 143582 | /* WRMSRLIST */ |
| 143583 | /* WRMSRNS */ |
| 143584 | /* WRPKRUr */ |
| 143585 | /* WRSSD */ |
| 143586 | i32mem, GR32, |
| 143587 | /* WRSSD_EVEX */ |
| 143588 | i32mem, GR32, |
| 143589 | /* WRSSQ */ |
| 143590 | i64mem, GR64, |
| 143591 | /* WRSSQ_EVEX */ |
| 143592 | i64mem, GR64, |
| 143593 | /* WRUSSD */ |
| 143594 | i32mem, GR32, |
| 143595 | /* WRUSSD_EVEX */ |
| 143596 | i32mem, GR32, |
| 143597 | /* WRUSSQ */ |
| 143598 | i64mem, GR64, |
| 143599 | /* WRUSSQ_EVEX */ |
| 143600 | i64mem, GR64, |
| 143601 | /* XABORT */ |
| 143602 | i8imm, |
| 143603 | /* XACQUIRE_PREFIX */ |
| 143604 | /* XADD16rm */ |
| 143605 | GR16, GR16, i16mem, |
| 143606 | /* XADD16rr */ |
| 143607 | GR16, GR16, GR16, GR16, |
| 143608 | /* XADD32rm */ |
| 143609 | GR32, GR32, i32mem, |
| 143610 | /* XADD32rr */ |
| 143611 | GR32, GR32, GR32, GR32, |
| 143612 | /* XADD64rm */ |
| 143613 | GR64, GR64, i64mem, |
| 143614 | /* XADD64rr */ |
| 143615 | GR64, GR64, GR64, GR64, |
| 143616 | /* XADD8rm */ |
| 143617 | GR8, GR8, i8mem, |
| 143618 | /* XADD8rr */ |
| 143619 | GR8, GR8, GR8, GR8, |
| 143620 | /* XAM_F */ |
| 143621 | /* XAM_Fp32 */ |
| 143622 | RFP32, |
| 143623 | /* XAM_Fp64 */ |
| 143624 | RFP64, |
| 143625 | /* XAM_Fp80 */ |
| 143626 | RFP80, |
| 143627 | /* XBEGIN */ |
| 143628 | GR32, |
| 143629 | /* XBEGIN_2 */ |
| 143630 | brtarget16, |
| 143631 | /* XBEGIN_4 */ |
| 143632 | brtarget32, |
| 143633 | /* XCHG16ar */ |
| 143634 | GR16, GR16, |
| 143635 | /* XCHG16rm */ |
| 143636 | GR16, GR16, i16mem, |
| 143637 | /* XCHG16rr */ |
| 143638 | GR16, GR16, GR16, GR16, |
| 143639 | /* XCHG32ar */ |
| 143640 | GR32, GR32, |
| 143641 | /* XCHG32rm */ |
| 143642 | GR32, GR32, i32mem, |
| 143643 | /* XCHG32rr */ |
| 143644 | GR32, GR32, GR32, GR32, |
| 143645 | /* XCHG64ar */ |
| 143646 | GR64, GR64, |
| 143647 | /* XCHG64rm */ |
| 143648 | GR64, GR64, i64mem, |
| 143649 | /* XCHG64rr */ |
| 143650 | GR64, GR64, GR64, GR64, |
| 143651 | /* XCHG8rm */ |
| 143652 | GR8, GR8, i8mem, |
| 143653 | /* XCHG8rr */ |
| 143654 | GR8, GR8, GR8, GR8, |
| 143655 | /* XCH_F */ |
| 143656 | RSTi, |
| 143657 | /* XCRYPTCBC */ |
| 143658 | /* XCRYPTCFB */ |
| 143659 | /* XCRYPTCTR */ |
| 143660 | /* XCRYPTECB */ |
| 143661 | /* XCRYPTOFB */ |
| 143662 | /* XEND */ |
| 143663 | /* XGETBV */ |
| 143664 | /* XLAT */ |
| 143665 | /* XOR16i16 */ |
| 143666 | i16imm, |
| 143667 | /* XOR16mi */ |
| 143668 | i16mem, i16imm, |
| 143669 | /* XOR16mi8 */ |
| 143670 | i16mem, i16i8imm, |
| 143671 | /* XOR16mi8_EVEX */ |
| 143672 | i16mem, i16i8imm, |
| 143673 | /* XOR16mi8_ND */ |
| 143674 | GR16, i16mem, i16i8imm, |
| 143675 | /* XOR16mi8_NF */ |
| 143676 | i16mem, i16i8imm, |
| 143677 | /* XOR16mi8_NF_ND */ |
| 143678 | GR16, i16mem, i16i8imm, |
| 143679 | /* XOR16mi_EVEX */ |
| 143680 | i16mem, i16imm, |
| 143681 | /* XOR16mi_ND */ |
| 143682 | GR16, i16mem, i16imm, |
| 143683 | /* XOR16mi_NF */ |
| 143684 | i16mem, i16imm, |
| 143685 | /* XOR16mi_NF_ND */ |
| 143686 | GR16, i16mem, i16imm, |
| 143687 | /* XOR16mr */ |
| 143688 | i16mem, GR16, |
| 143689 | /* XOR16mr_EVEX */ |
| 143690 | i16mem, GR16, |
| 143691 | /* XOR16mr_ND */ |
| 143692 | GR16, i16mem, GR16, |
| 143693 | /* XOR16mr_NF */ |
| 143694 | i16mem, GR16, |
| 143695 | /* XOR16mr_NF_ND */ |
| 143696 | GR16, i16mem, GR16, |
| 143697 | /* XOR16ri */ |
| 143698 | GR16, GR16, i16imm, |
| 143699 | /* XOR16ri8 */ |
| 143700 | GR16, GR16, i16i8imm, |
| 143701 | /* XOR16ri8_EVEX */ |
| 143702 | GR16, GR16, i16i8imm, |
| 143703 | /* XOR16ri8_ND */ |
| 143704 | GR16, GR16, i16i8imm, |
| 143705 | /* XOR16ri8_NF */ |
| 143706 | GR16, GR16, i16i8imm, |
| 143707 | /* XOR16ri8_NF_ND */ |
| 143708 | GR16, GR16, i16i8imm, |
| 143709 | /* XOR16ri_EVEX */ |
| 143710 | GR16, GR16, i16imm, |
| 143711 | /* XOR16ri_ND */ |
| 143712 | GR16, GR16, i16imm, |
| 143713 | /* XOR16ri_NF */ |
| 143714 | GR16, GR16, i16imm, |
| 143715 | /* XOR16ri_NF_ND */ |
| 143716 | GR16, GR16, i16imm, |
| 143717 | /* XOR16rm */ |
| 143718 | GR16, GR16, i16mem, |
| 143719 | /* XOR16rm_EVEX */ |
| 143720 | GR16, GR16, i16mem, |
| 143721 | /* XOR16rm_ND */ |
| 143722 | GR16, GR16, i16mem, |
| 143723 | /* XOR16rm_NF */ |
| 143724 | GR16, GR16, i16mem, |
| 143725 | /* XOR16rm_NF_ND */ |
| 143726 | GR16, GR16, i16mem, |
| 143727 | /* XOR16rr */ |
| 143728 | GR16, GR16, GR16, |
| 143729 | /* XOR16rr_EVEX */ |
| 143730 | GR16, GR16, GR16, |
| 143731 | /* XOR16rr_EVEX_REV */ |
| 143732 | GR16, GR16, GR16, |
| 143733 | /* XOR16rr_ND */ |
| 143734 | GR16, GR16, GR16, |
| 143735 | /* XOR16rr_ND_REV */ |
| 143736 | GR16, GR16, GR16, |
| 143737 | /* XOR16rr_NF */ |
| 143738 | GR16, GR16, GR16, |
| 143739 | /* XOR16rr_NF_ND */ |
| 143740 | GR16, GR16, GR16, |
| 143741 | /* XOR16rr_NF_ND_REV */ |
| 143742 | GR16, GR16, GR16, |
| 143743 | /* XOR16rr_NF_REV */ |
| 143744 | GR16, GR16, GR16, |
| 143745 | /* XOR16rr_REV */ |
| 143746 | GR16, GR16, GR16, |
| 143747 | /* XOR32i32 */ |
| 143748 | i32imm, |
| 143749 | /* XOR32mi */ |
| 143750 | i32mem, i32imm, |
| 143751 | /* XOR32mi8 */ |
| 143752 | i32mem, i32i8imm, |
| 143753 | /* XOR32mi8_EVEX */ |
| 143754 | i32mem, i32i8imm, |
| 143755 | /* XOR32mi8_ND */ |
| 143756 | GR32, i32mem, i32i8imm, |
| 143757 | /* XOR32mi8_NF */ |
| 143758 | i32mem, i32i8imm, |
| 143759 | /* XOR32mi8_NF_ND */ |
| 143760 | GR32, i32mem, i32i8imm, |
| 143761 | /* XOR32mi_EVEX */ |
| 143762 | i32mem, i32imm, |
| 143763 | /* XOR32mi_ND */ |
| 143764 | GR32, i32mem, i32imm, |
| 143765 | /* XOR32mi_NF */ |
| 143766 | i32mem, i32imm, |
| 143767 | /* XOR32mi_NF_ND */ |
| 143768 | GR32, i32mem, i32imm, |
| 143769 | /* XOR32mr */ |
| 143770 | i32mem, GR32, |
| 143771 | /* XOR32mr_EVEX */ |
| 143772 | i32mem, GR32, |
| 143773 | /* XOR32mr_ND */ |
| 143774 | GR32, i32mem, GR32, |
| 143775 | /* XOR32mr_NF */ |
| 143776 | i32mem, GR32, |
| 143777 | /* XOR32mr_NF_ND */ |
| 143778 | GR32, i32mem, GR32, |
| 143779 | /* XOR32ri */ |
| 143780 | GR32, GR32, i32imm, |
| 143781 | /* XOR32ri8 */ |
| 143782 | GR32, GR32, i32i8imm, |
| 143783 | /* XOR32ri8_EVEX */ |
| 143784 | GR32, GR32, i32i8imm, |
| 143785 | /* XOR32ri8_ND */ |
| 143786 | GR32, GR32, i32i8imm, |
| 143787 | /* XOR32ri8_NF */ |
| 143788 | GR32, GR32, i32i8imm, |
| 143789 | /* XOR32ri8_NF_ND */ |
| 143790 | GR32, GR32, i32i8imm, |
| 143791 | /* XOR32ri_EVEX */ |
| 143792 | GR32, GR32, i32imm, |
| 143793 | /* XOR32ri_ND */ |
| 143794 | GR32, GR32, i32imm, |
| 143795 | /* XOR32ri_NF */ |
| 143796 | GR32, GR32, i32imm, |
| 143797 | /* XOR32ri_NF_ND */ |
| 143798 | GR32, GR32, i32imm, |
| 143799 | /* XOR32rm */ |
| 143800 | GR32, GR32, i32mem, |
| 143801 | /* XOR32rm_EVEX */ |
| 143802 | GR32, GR32, i32mem, |
| 143803 | /* XOR32rm_ND */ |
| 143804 | GR32, GR32, i32mem, |
| 143805 | /* XOR32rm_NF */ |
| 143806 | GR32, GR32, i32mem, |
| 143807 | /* XOR32rm_NF_ND */ |
| 143808 | GR32, GR32, i32mem, |
| 143809 | /* XOR32rr */ |
| 143810 | GR32, GR32, GR32, |
| 143811 | /* XOR32rr_EVEX */ |
| 143812 | GR32, GR32, GR32, |
| 143813 | /* XOR32rr_EVEX_REV */ |
| 143814 | GR32, GR32, GR32, |
| 143815 | /* XOR32rr_ND */ |
| 143816 | GR32, GR32, GR32, |
| 143817 | /* XOR32rr_ND_REV */ |
| 143818 | GR32, GR32, GR32, |
| 143819 | /* XOR32rr_NF */ |
| 143820 | GR32, GR32, GR32, |
| 143821 | /* XOR32rr_NF_ND */ |
| 143822 | GR32, GR32, GR32, |
| 143823 | /* XOR32rr_NF_ND_REV */ |
| 143824 | GR32, GR32, GR32, |
| 143825 | /* XOR32rr_NF_REV */ |
| 143826 | GR32, GR32, GR32, |
| 143827 | /* XOR32rr_REV */ |
| 143828 | GR32, GR32, GR32, |
| 143829 | /* XOR64i32 */ |
| 143830 | i64i32imm, |
| 143831 | /* XOR64mi32 */ |
| 143832 | i64mem, i64i32imm, |
| 143833 | /* XOR64mi32_EVEX */ |
| 143834 | i64mem, i64i32imm, |
| 143835 | /* XOR64mi32_ND */ |
| 143836 | GR64, i64mem, i64i32imm, |
| 143837 | /* XOR64mi32_NF */ |
| 143838 | i64mem, i64i32imm, |
| 143839 | /* XOR64mi32_NF_ND */ |
| 143840 | GR64, i64mem, i64i32imm, |
| 143841 | /* XOR64mi8 */ |
| 143842 | i64mem, i64i8imm, |
| 143843 | /* XOR64mi8_EVEX */ |
| 143844 | i64mem, i64i8imm, |
| 143845 | /* XOR64mi8_ND */ |
| 143846 | GR64, i64mem, i64i8imm, |
| 143847 | /* XOR64mi8_NF */ |
| 143848 | i64mem, i64i8imm, |
| 143849 | /* XOR64mi8_NF_ND */ |
| 143850 | GR64, i64mem, i64i8imm, |
| 143851 | /* XOR64mr */ |
| 143852 | i64mem, GR64, |
| 143853 | /* XOR64mr_EVEX */ |
| 143854 | i64mem, GR64, |
| 143855 | /* XOR64mr_ND */ |
| 143856 | GR64, i64mem, GR64, |
| 143857 | /* XOR64mr_NF */ |
| 143858 | i64mem, GR64, |
| 143859 | /* XOR64mr_NF_ND */ |
| 143860 | GR64, i64mem, GR64, |
| 143861 | /* XOR64ri32 */ |
| 143862 | GR64, GR64, i64i32imm, |
| 143863 | /* XOR64ri32_EVEX */ |
| 143864 | GR64, GR64, i64i32imm, |
| 143865 | /* XOR64ri32_ND */ |
| 143866 | GR64, GR64, i64i32imm, |
| 143867 | /* XOR64ri32_NF */ |
| 143868 | GR64, GR64, i64i32imm, |
| 143869 | /* XOR64ri32_NF_ND */ |
| 143870 | GR64, GR64, i64i32imm, |
| 143871 | /* XOR64ri8 */ |
| 143872 | GR64, GR64, i64i8imm, |
| 143873 | /* XOR64ri8_EVEX */ |
| 143874 | GR64, GR64, i64i8imm, |
| 143875 | /* XOR64ri8_ND */ |
| 143876 | GR64, GR64, i64i8imm, |
| 143877 | /* XOR64ri8_NF */ |
| 143878 | GR64, GR64, i64i8imm, |
| 143879 | /* XOR64ri8_NF_ND */ |
| 143880 | GR64, GR64, i64i8imm, |
| 143881 | /* XOR64rm */ |
| 143882 | GR64, GR64, i64mem, |
| 143883 | /* XOR64rm_EVEX */ |
| 143884 | GR64, GR64, i64mem, |
| 143885 | /* XOR64rm_ND */ |
| 143886 | GR64, GR64, i64mem, |
| 143887 | /* XOR64rm_NF */ |
| 143888 | GR64, GR64, i64mem, |
| 143889 | /* XOR64rm_NF_ND */ |
| 143890 | GR64, GR64, i64mem, |
| 143891 | /* XOR64rr */ |
| 143892 | GR64, GR64, GR64, |
| 143893 | /* XOR64rr_EVEX */ |
| 143894 | GR64, GR64, GR64, |
| 143895 | /* XOR64rr_EVEX_REV */ |
| 143896 | GR64, GR64, GR64, |
| 143897 | /* XOR64rr_ND */ |
| 143898 | GR64, GR64, GR64, |
| 143899 | /* XOR64rr_ND_REV */ |
| 143900 | GR64, GR64, GR64, |
| 143901 | /* XOR64rr_NF */ |
| 143902 | GR64, GR64, GR64, |
| 143903 | /* XOR64rr_NF_ND */ |
| 143904 | GR64, GR64, GR64, |
| 143905 | /* XOR64rr_NF_ND_REV */ |
| 143906 | GR64, GR64, GR64, |
| 143907 | /* XOR64rr_NF_REV */ |
| 143908 | GR64, GR64, GR64, |
| 143909 | /* XOR64rr_REV */ |
| 143910 | GR64, GR64, GR64, |
| 143911 | /* XOR8i8 */ |
| 143912 | i8imm, |
| 143913 | /* XOR8mi */ |
| 143914 | i8mem, i8imm, |
| 143915 | /* XOR8mi8 */ |
| 143916 | i8mem, i8imm, |
| 143917 | /* XOR8mi_EVEX */ |
| 143918 | i8mem, i8imm, |
| 143919 | /* XOR8mi_ND */ |
| 143920 | GR8, i8mem, i8imm, |
| 143921 | /* XOR8mi_NF */ |
| 143922 | i8mem, i8imm, |
| 143923 | /* XOR8mi_NF_ND */ |
| 143924 | GR8, i8mem, i8imm, |
| 143925 | /* XOR8mr */ |
| 143926 | i8mem, GR8, |
| 143927 | /* XOR8mr_EVEX */ |
| 143928 | i8mem, GR8, |
| 143929 | /* XOR8mr_ND */ |
| 143930 | GR8, i8mem, GR8, |
| 143931 | /* XOR8mr_NF */ |
| 143932 | i8mem, GR8, |
| 143933 | /* XOR8mr_NF_ND */ |
| 143934 | GR8, i8mem, GR8, |
| 143935 | /* XOR8ri */ |
| 143936 | GR8, GR8, i8imm, |
| 143937 | /* XOR8ri8 */ |
| 143938 | GR8, GR8, i8imm, |
| 143939 | /* XOR8ri_EVEX */ |
| 143940 | GR8, GR8, i8imm, |
| 143941 | /* XOR8ri_ND */ |
| 143942 | GR8, GR8, i8imm, |
| 143943 | /* XOR8ri_NF */ |
| 143944 | GR8, GR8, i8imm, |
| 143945 | /* XOR8ri_NF_ND */ |
| 143946 | GR8, GR8, i8imm, |
| 143947 | /* XOR8rm */ |
| 143948 | GR8, GR8, i8mem, |
| 143949 | /* XOR8rm_EVEX */ |
| 143950 | GR8, GR8, i8mem, |
| 143951 | /* XOR8rm_ND */ |
| 143952 | GR8, GR8, i8mem, |
| 143953 | /* XOR8rm_NF */ |
| 143954 | GR8, GR8, i8mem, |
| 143955 | /* XOR8rm_NF_ND */ |
| 143956 | GR8, GR8, i8mem, |
| 143957 | /* XOR8rr */ |
| 143958 | GR8, GR8, GR8, |
| 143959 | /* XOR8rr_EVEX */ |
| 143960 | GR8, GR8, GR8, |
| 143961 | /* XOR8rr_EVEX_REV */ |
| 143962 | GR8, GR8, GR8, |
| 143963 | /* XOR8rr_ND */ |
| 143964 | GR8, GR8, GR8, |
| 143965 | /* XOR8rr_ND_REV */ |
| 143966 | GR8, GR8, GR8, |
| 143967 | /* XOR8rr_NF */ |
| 143968 | GR8, GR8, GR8, |
| 143969 | /* XOR8rr_NF_ND */ |
| 143970 | GR8, GR8, GR8, |
| 143971 | /* XOR8rr_NF_ND_REV */ |
| 143972 | GR8, GR8, GR8, |
| 143973 | /* XOR8rr_NF_REV */ |
| 143974 | GR8, GR8, GR8, |
| 143975 | /* XOR8rr_NOREX */ |
| 143976 | GR8_NOREX, GR8_NOREX, GR8_NOREX, |
| 143977 | /* XOR8rr_REV */ |
| 143978 | GR8, GR8, GR8, |
| 143979 | /* XORPDrm */ |
| 143980 | VR128, VR128, f128mem, |
| 143981 | /* XORPDrr */ |
| 143982 | VR128, VR128, VR128, |
| 143983 | /* XORPSrm */ |
| 143984 | VR128, VR128, f128mem, |
| 143985 | /* XORPSrr */ |
| 143986 | VR128, VR128, VR128, |
| 143987 | /* XRELEASE_PREFIX */ |
| 143988 | /* XRESLDTRK */ |
| 143989 | /* XRSTOR */ |
| 143990 | opaquemem, |
| 143991 | /* XRSTOR64 */ |
| 143992 | opaquemem, |
| 143993 | /* XRSTORS */ |
| 143994 | opaquemem, |
| 143995 | /* XRSTORS64 */ |
| 143996 | opaquemem, |
| 143997 | /* XSAVE */ |
| 143998 | opaquemem, |
| 143999 | /* XSAVE64 */ |
| 144000 | opaquemem, |
| 144001 | /* XSAVEC */ |
| 144002 | opaquemem, |
| 144003 | /* XSAVEC64 */ |
| 144004 | opaquemem, |
| 144005 | /* XSAVEOPT */ |
| 144006 | opaquemem, |
| 144007 | /* XSAVEOPT64 */ |
| 144008 | opaquemem, |
| 144009 | /* XSAVES */ |
| 144010 | opaquemem, |
| 144011 | /* XSAVES64 */ |
| 144012 | opaquemem, |
| 144013 | }; |
| 144014 | return OpcodeOperandTypes[Offsets[Opcode] + OpIdx]; |
| 144015 | } |
| 144016 | } // end namespace X86 |
| 144017 | } // end namespace llvm |
| 144018 | #endif // GET_INSTRINFO_OPERAND_TYPE |
| 144019 | |
| 144020 | #ifdef GET_INSTRINFO_MEM_OPERAND_SIZE |
| 144021 | #undef GET_INSTRINFO_MEM_OPERAND_SIZE |
| 144022 | namespace llvm { |
| 144023 | namespace X86 { |
| 144024 | LLVM_READONLY |
| 144025 | static int getMemOperandSize(int OpType) { |
| 144026 | switch (OpType) { |
| 144027 | default: return 0; |
| 144028 | case OpTypes::i8mem: |
| 144029 | case OpTypes::i8mem_NOREX: |
| 144030 | return 8; |
| 144031 | |
| 144032 | case OpTypes::f16mem: |
| 144033 | case OpTypes::i16mem: |
| 144034 | return 16; |
| 144035 | |
| 144036 | case OpTypes::f32mem: |
| 144037 | case OpTypes::i32mem: |
| 144038 | case OpTypes::i32mem_TC: |
| 144039 | return 32; |
| 144040 | |
| 144041 | case OpTypes::f64mem: |
| 144042 | case OpTypes::i64mem: |
| 144043 | case OpTypes::i64mem_TC: |
| 144044 | case OpTypes::vx64mem: |
| 144045 | case OpTypes::vx64xmem: |
| 144046 | return 64; |
| 144047 | |
| 144048 | case OpTypes::f80mem: |
| 144049 | return 80; |
| 144050 | |
| 144051 | case OpTypes::f128mem: |
| 144052 | case OpTypes::i128mem: |
| 144053 | case OpTypes::vx128mem: |
| 144054 | case OpTypes::vx128xmem: |
| 144055 | case OpTypes::vy128mem: |
| 144056 | case OpTypes::vy128xmem: |
| 144057 | return 128; |
| 144058 | |
| 144059 | case OpTypes::f256mem: |
| 144060 | case OpTypes::i256mem: |
| 144061 | case OpTypes::vx256mem: |
| 144062 | case OpTypes::vx256xmem: |
| 144063 | case OpTypes::vy256mem: |
| 144064 | case OpTypes::vy256xmem: |
| 144065 | case OpTypes::vz256mem: |
| 144066 | return 256; |
| 144067 | |
| 144068 | case OpTypes::f512mem: |
| 144069 | case OpTypes::i512mem: |
| 144070 | case OpTypes::i512mem_GR16: |
| 144071 | case OpTypes::i512mem_GR32: |
| 144072 | case OpTypes::i512mem_GR64: |
| 144073 | case OpTypes::vy512xmem: |
| 144074 | case OpTypes::vz512mem: |
| 144075 | return 512; |
| 144076 | |
| 144077 | } |
| 144078 | } |
| 144079 | } // end namespace X86 |
| 144080 | } // end namespace llvm |
| 144081 | #endif // GET_INSTRINFO_MEM_OPERAND_SIZE |
| 144082 | |
| 144083 | #ifdef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP |
| 144084 | #undef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP |
| 144085 | namespace llvm { |
| 144086 | namespace X86 { |
| 144087 | LLVM_READONLY static unsigned |
| 144088 | getLogicalOperandSize(uint16_t Opcode, uint16_t LogicalOpIdx) { |
| 144089 | return LogicalOpIdx; |
| 144090 | } |
| 144091 | LLVM_READONLY static inline unsigned |
| 144092 | getLogicalOperandIdx(uint16_t Opcode, uint16_t LogicalOpIdx) { |
| 144093 | auto S = 0U; |
| 144094 | for (auto i = 0U; i < LogicalOpIdx; ++i) |
| 144095 | S += getLogicalOperandSize(Opcode, i); |
| 144096 | return S; |
| 144097 | } |
| 144098 | } // end namespace X86 |
| 144099 | } // end namespace llvm |
| 144100 | #endif // GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP |
| 144101 | |
| 144102 | #ifdef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP |
| 144103 | #undef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP |
| 144104 | namespace llvm { |
| 144105 | namespace X86 { |
| 144106 | LLVM_READONLY static int |
| 144107 | getLogicalOperandType(uint16_t Opcode, uint16_t LogicalOpIdx) { |
| 144108 | return -1; |
| 144109 | } |
| 144110 | } // end namespace X86 |
| 144111 | } // end namespace llvm |
| 144112 | #endif // GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP |
| 144113 | |
| 144114 | #ifdef GET_INSTRINFO_MC_HELPER_DECLS |
| 144115 | #undef GET_INSTRINFO_MC_HELPER_DECLS |
| 144116 | |
| 144117 | namespace llvm { |
| 144118 | class MCInst; |
| 144119 | class FeatureBitset; |
| 144120 | |
| 144121 | namespace X86_MC { |
| 144122 | |
| 144123 | bool isThreeOperandsLEA(const MCInst &MI); |
| 144124 | void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features); |
| 144125 | |
| 144126 | } // end namespace X86_MC |
| 144127 | } // end namespace llvm |
| 144128 | |
| 144129 | #endif // GET_INSTRINFO_MC_HELPER_DECLS |
| 144130 | |
| 144131 | #ifdef GET_INSTRINFO_MC_HELPERS |
| 144132 | #undef GET_INSTRINFO_MC_HELPERS |
| 144133 | |
| 144134 | namespace llvm { |
| 144135 | namespace X86_MC { |
| 144136 | |
| 144137 | bool isThreeOperandsLEA(const MCInst &MI) { |
| 144138 | switch(MI.getOpcode()) { |
| 144139 | case X86::LEA32r: |
| 144140 | case X86::LEA64r: |
| 144141 | case X86::LEA64_32r: |
| 144142 | case X86::LEA16r: |
| 144143 | return ( |
| 144144 | MI.getOperand(1).isReg() |
| 144145 | && MI.getOperand(1).getReg() != 0 |
| 144146 | && MI.getOperand(3).isReg() |
| 144147 | && MI.getOperand(3).getReg() != 0 |
| 144148 | && ( |
| 144149 | ( |
| 144150 | MI.getOperand(4).isImm() |
| 144151 | && MI.getOperand(4).getImm() != 0 |
| 144152 | ) |
| 144153 | || false |
| 144154 | ) |
| 144155 | ); |
| 144156 | default: |
| 144157 | return false; |
| 144158 | } // end of switch-stmt |
| 144159 | } |
| 144160 | |
| 144161 | } // end namespace X86_MC |
| 144162 | } // end namespace llvm |
| 144163 | |
| 144164 | #endif // GET_GENISTRINFO_MC_HELPERS |
| 144165 | |
| 144166 | #if (defined(ENABLE_INSTR_PREDICATE_VERIFIER) && !defined(NDEBUG)) ||\ |
| 144167 | defined(GET_AVAILABLE_OPCODE_CHECKER) |
| 144168 | #define GET_COMPUTE_FEATURES |
| 144169 | #endif |
| 144170 | #ifdef GET_COMPUTE_FEATURES |
| 144171 | #undef GET_COMPUTE_FEATURES |
| 144172 | namespace llvm { |
| 144173 | namespace X86_MC { |
| 144174 | |
| 144175 | // Bits for subtarget features that participate in instruction matching. |
| 144176 | enum SubtargetFeatureBits : uint8_t { |
| 144177 | Feature_Not64BitModeBit = 4, |
| 144178 | Feature_In64BitModeBit = 2, |
| 144179 | Feature_In16BitModeBit = 0, |
| 144180 | Feature_Not16BitModeBit = 3, |
| 144181 | Feature_In32BitModeBit = 1, |
| 144182 | }; |
| 144183 | |
| 144184 | inline FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) { |
| 144185 | FeatureBitset Features; |
| 144186 | if (!FB[X86::Is64Bit]) |
| 144187 | Features.set(Feature_Not64BitModeBit); |
| 144188 | if (FB[X86::Is64Bit]) |
| 144189 | Features.set(Feature_In64BitModeBit); |
| 144190 | if (FB[X86::Is16Bit]) |
| 144191 | Features.set(Feature_In16BitModeBit); |
| 144192 | if (!FB[X86::Is16Bit]) |
| 144193 | Features.set(Feature_Not16BitModeBit); |
| 144194 | if (FB[X86::Is32Bit]) |
| 144195 | Features.set(Feature_In32BitModeBit); |
| 144196 | return Features; |
| 144197 | } |
| 144198 | |
| 144199 | inline FeatureBitset computeRequiredFeatures(unsigned Opcode) { |
| 144200 | enum : uint8_t { |
| 144201 | CEFBS_None, |
| 144202 | CEFBS_In32BitMode, |
| 144203 | CEFBS_In64BitMode, |
| 144204 | CEFBS_Not64BitMode, |
| 144205 | }; |
| 144206 | |
| 144207 | static constexpr FeatureBitset FeatureBitsets[] = { |
| 144208 | {}, // CEFBS_None |
| 144209 | {Feature_In32BitModeBit, }, |
| 144210 | {Feature_In64BitModeBit, }, |
| 144211 | {Feature_Not64BitModeBit, }, |
| 144212 | }; |
| 144213 | static constexpr uint8_t RequiredFeaturesRefs[] = { |
| 144214 | CEFBS_None, // PHI = 0 |
| 144215 | CEFBS_None, // INLINEASM = 1 |
| 144216 | CEFBS_None, // INLINEASM_BR = 2 |
| 144217 | CEFBS_None, // CFI_INSTRUCTION = 3 |
| 144218 | CEFBS_None, // EH_LABEL = 4 |
| 144219 | CEFBS_None, // GC_LABEL = 5 |
| 144220 | CEFBS_None, // ANNOTATION_LABEL = 6 |
| 144221 | CEFBS_None, // KILL = 7 |
| 144222 | CEFBS_None, // EXTRACT_SUBREG = 8 |
| 144223 | CEFBS_None, // INSERT_SUBREG = 9 |
| 144224 | CEFBS_None, // IMPLICIT_DEF = 10 |
| 144225 | CEFBS_None, // SUBREG_TO_REG = 11 |
| 144226 | CEFBS_None, // COPY_TO_REGCLASS = 12 |
| 144227 | CEFBS_None, // DBG_VALUE = 13 |
| 144228 | CEFBS_None, // DBG_VALUE_LIST = 14 |
| 144229 | CEFBS_None, // DBG_INSTR_REF = 15 |
| 144230 | CEFBS_None, // DBG_PHI = 16 |
| 144231 | CEFBS_None, // DBG_LABEL = 17 |
| 144232 | CEFBS_None, // REG_SEQUENCE = 18 |
| 144233 | CEFBS_None, // COPY = 19 |
| 144234 | CEFBS_None, // BUNDLE = 20 |
| 144235 | CEFBS_None, // LIFETIME_START = 21 |
| 144236 | CEFBS_None, // LIFETIME_END = 22 |
| 144237 | CEFBS_None, // PSEUDO_PROBE = 23 |
| 144238 | CEFBS_None, // ARITH_FENCE = 24 |
| 144239 | CEFBS_None, // STACKMAP = 25 |
| 144240 | CEFBS_None, // FENTRY_CALL = 26 |
| 144241 | CEFBS_None, // PATCHPOINT = 27 |
| 144242 | CEFBS_None, // LOAD_STACK_GUARD = 28 |
| 144243 | CEFBS_None, // PREALLOCATED_SETUP = 29 |
| 144244 | CEFBS_None, // PREALLOCATED_ARG = 30 |
| 144245 | CEFBS_None, // STATEPOINT = 31 |
| 144246 | CEFBS_None, // LOCAL_ESCAPE = 32 |
| 144247 | CEFBS_None, // FAULTING_OP = 33 |
| 144248 | CEFBS_None, // PATCHABLE_OP = 34 |
| 144249 | CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 35 |
| 144250 | CEFBS_None, // PATCHABLE_RET = 36 |
| 144251 | CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 37 |
| 144252 | CEFBS_None, // PATCHABLE_TAIL_CALL = 38 |
| 144253 | CEFBS_None, // PATCHABLE_EVENT_CALL = 39 |
| 144254 | CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 40 |
| 144255 | CEFBS_None, // ICALL_BRANCH_FUNNEL = 41 |
| 144256 | CEFBS_None, // MEMBARRIER = 42 |
| 144257 | CEFBS_None, // JUMP_TABLE_DEBUG_INFO = 43 |
| 144258 | CEFBS_None, // CONVERGENCECTRL_ENTRY = 44 |
| 144259 | CEFBS_None, // CONVERGENCECTRL_ANCHOR = 45 |
| 144260 | CEFBS_None, // CONVERGENCECTRL_LOOP = 46 |
| 144261 | CEFBS_None, // CONVERGENCECTRL_GLUE = 47 |
| 144262 | CEFBS_None, // G_ASSERT_SEXT = 48 |
| 144263 | CEFBS_None, // G_ASSERT_ZEXT = 49 |
| 144264 | CEFBS_None, // G_ASSERT_ALIGN = 50 |
| 144265 | CEFBS_None, // G_ADD = 51 |
| 144266 | CEFBS_None, // G_SUB = 52 |
| 144267 | CEFBS_None, // G_MUL = 53 |
| 144268 | CEFBS_None, // G_SDIV = 54 |
| 144269 | CEFBS_None, // G_UDIV = 55 |
| 144270 | CEFBS_None, // G_SREM = 56 |
| 144271 | CEFBS_None, // G_UREM = 57 |
| 144272 | CEFBS_None, // G_SDIVREM = 58 |
| 144273 | CEFBS_None, // G_UDIVREM = 59 |
| 144274 | CEFBS_None, // G_AND = 60 |
| 144275 | CEFBS_None, // G_OR = 61 |
| 144276 | CEFBS_None, // G_XOR = 62 |
| 144277 | CEFBS_None, // G_IMPLICIT_DEF = 63 |
| 144278 | CEFBS_None, // G_PHI = 64 |
| 144279 | CEFBS_None, // G_FRAME_INDEX = 65 |
| 144280 | CEFBS_None, // G_GLOBAL_VALUE = 66 |
| 144281 | CEFBS_None, // G_PTRAUTH_GLOBAL_VALUE = 67 |
| 144282 | CEFBS_None, // G_CONSTANT_POOL = 68 |
| 144283 | CEFBS_None, // G_EXTRACT = 69 |
| 144284 | CEFBS_None, // G_UNMERGE_VALUES = 70 |
| 144285 | CEFBS_None, // G_INSERT = 71 |
| 144286 | CEFBS_None, // G_MERGE_VALUES = 72 |
| 144287 | CEFBS_None, // G_BUILD_VECTOR = 73 |
| 144288 | CEFBS_None, // G_BUILD_VECTOR_TRUNC = 74 |
| 144289 | CEFBS_None, // G_CONCAT_VECTORS = 75 |
| 144290 | CEFBS_None, // G_PTRTOINT = 76 |
| 144291 | CEFBS_None, // G_INTTOPTR = 77 |
| 144292 | CEFBS_None, // G_BITCAST = 78 |
| 144293 | CEFBS_None, // G_FREEZE = 79 |
| 144294 | CEFBS_None, // G_CONSTANT_FOLD_BARRIER = 80 |
| 144295 | CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 81 |
| 144296 | CEFBS_None, // G_INTRINSIC_TRUNC = 82 |
| 144297 | CEFBS_None, // G_INTRINSIC_ROUND = 83 |
| 144298 | CEFBS_None, // G_INTRINSIC_LRINT = 84 |
| 144299 | CEFBS_None, // G_INTRINSIC_LLRINT = 85 |
| 144300 | CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 86 |
| 144301 | CEFBS_None, // G_READCYCLECOUNTER = 87 |
| 144302 | CEFBS_None, // G_READSTEADYCOUNTER = 88 |
| 144303 | CEFBS_None, // G_LOAD = 89 |
| 144304 | CEFBS_None, // G_SEXTLOAD = 90 |
| 144305 | CEFBS_None, // G_ZEXTLOAD = 91 |
| 144306 | CEFBS_None, // G_INDEXED_LOAD = 92 |
| 144307 | CEFBS_None, // G_INDEXED_SEXTLOAD = 93 |
| 144308 | CEFBS_None, // G_INDEXED_ZEXTLOAD = 94 |
| 144309 | CEFBS_None, // G_STORE = 95 |
| 144310 | CEFBS_None, // G_INDEXED_STORE = 96 |
| 144311 | CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 97 |
| 144312 | CEFBS_None, // G_ATOMIC_CMPXCHG = 98 |
| 144313 | CEFBS_None, // G_ATOMICRMW_XCHG = 99 |
| 144314 | CEFBS_None, // G_ATOMICRMW_ADD = 100 |
| 144315 | CEFBS_None, // G_ATOMICRMW_SUB = 101 |
| 144316 | CEFBS_None, // G_ATOMICRMW_AND = 102 |
| 144317 | CEFBS_None, // G_ATOMICRMW_NAND = 103 |
| 144318 | CEFBS_None, // G_ATOMICRMW_OR = 104 |
| 144319 | CEFBS_None, // G_ATOMICRMW_XOR = 105 |
| 144320 | CEFBS_None, // G_ATOMICRMW_MAX = 106 |
| 144321 | CEFBS_None, // G_ATOMICRMW_MIN = 107 |
| 144322 | CEFBS_None, // G_ATOMICRMW_UMAX = 108 |
| 144323 | CEFBS_None, // G_ATOMICRMW_UMIN = 109 |
| 144324 | CEFBS_None, // G_ATOMICRMW_FADD = 110 |
| 144325 | CEFBS_None, // G_ATOMICRMW_FSUB = 111 |
| 144326 | CEFBS_None, // G_ATOMICRMW_FMAX = 112 |
| 144327 | CEFBS_None, // G_ATOMICRMW_FMIN = 113 |
| 144328 | CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 114 |
| 144329 | CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 115 |
| 144330 | CEFBS_None, // G_FENCE = 116 |
| 144331 | CEFBS_None, // G_PREFETCH = 117 |
| 144332 | CEFBS_None, // G_BRCOND = 118 |
| 144333 | CEFBS_None, // G_BRINDIRECT = 119 |
| 144334 | CEFBS_None, // G_INVOKE_REGION_START = 120 |
| 144335 | CEFBS_None, // G_INTRINSIC = 121 |
| 144336 | CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 122 |
| 144337 | CEFBS_None, // G_INTRINSIC_CONVERGENT = 123 |
| 144338 | CEFBS_None, // G_INTRINSIC_CONVERGENT_W_SIDE_EFFECTS = 124 |
| 144339 | CEFBS_None, // G_ANYEXT = 125 |
| 144340 | CEFBS_None, // G_TRUNC = 126 |
| 144341 | CEFBS_None, // G_CONSTANT = 127 |
| 144342 | CEFBS_None, // G_FCONSTANT = 128 |
| 144343 | CEFBS_None, // G_VASTART = 129 |
| 144344 | CEFBS_None, // G_VAARG = 130 |
| 144345 | CEFBS_None, // G_SEXT = 131 |
| 144346 | CEFBS_None, // G_SEXT_INREG = 132 |
| 144347 | CEFBS_None, // G_ZEXT = 133 |
| 144348 | CEFBS_None, // G_SHL = 134 |
| 144349 | CEFBS_None, // G_LSHR = 135 |
| 144350 | CEFBS_None, // G_ASHR = 136 |
| 144351 | CEFBS_None, // G_FSHL = 137 |
| 144352 | CEFBS_None, // G_FSHR = 138 |
| 144353 | CEFBS_None, // G_ROTR = 139 |
| 144354 | CEFBS_None, // G_ROTL = 140 |
| 144355 | CEFBS_None, // G_ICMP = 141 |
| 144356 | CEFBS_None, // G_FCMP = 142 |
| 144357 | CEFBS_None, // G_SCMP = 143 |
| 144358 | CEFBS_None, // G_UCMP = 144 |
| 144359 | CEFBS_None, // G_SELECT = 145 |
| 144360 | CEFBS_None, // G_UADDO = 146 |
| 144361 | CEFBS_None, // G_UADDE = 147 |
| 144362 | CEFBS_None, // G_USUBO = 148 |
| 144363 | CEFBS_None, // G_USUBE = 149 |
| 144364 | CEFBS_None, // G_SADDO = 150 |
| 144365 | CEFBS_None, // G_SADDE = 151 |
| 144366 | CEFBS_None, // G_SSUBO = 152 |
| 144367 | CEFBS_None, // G_SSUBE = 153 |
| 144368 | CEFBS_None, // G_UMULO = 154 |
| 144369 | CEFBS_None, // G_SMULO = 155 |
| 144370 | CEFBS_None, // G_UMULH = 156 |
| 144371 | CEFBS_None, // G_SMULH = 157 |
| 144372 | CEFBS_None, // G_UADDSAT = 158 |
| 144373 | CEFBS_None, // G_SADDSAT = 159 |
| 144374 | CEFBS_None, // G_USUBSAT = 160 |
| 144375 | CEFBS_None, // G_SSUBSAT = 161 |
| 144376 | CEFBS_None, // G_USHLSAT = 162 |
| 144377 | CEFBS_None, // G_SSHLSAT = 163 |
| 144378 | CEFBS_None, // G_SMULFIX = 164 |
| 144379 | CEFBS_None, // G_UMULFIX = 165 |
| 144380 | CEFBS_None, // G_SMULFIXSAT = 166 |
| 144381 | CEFBS_None, // G_UMULFIXSAT = 167 |
| 144382 | CEFBS_None, // G_SDIVFIX = 168 |
| 144383 | CEFBS_None, // G_UDIVFIX = 169 |
| 144384 | CEFBS_None, // G_SDIVFIXSAT = 170 |
| 144385 | CEFBS_None, // G_UDIVFIXSAT = 171 |
| 144386 | CEFBS_None, // G_FADD = 172 |
| 144387 | CEFBS_None, // G_FSUB = 173 |
| 144388 | CEFBS_None, // G_FMUL = 174 |
| 144389 | CEFBS_None, // G_FMA = 175 |
| 144390 | CEFBS_None, // G_FMAD = 176 |
| 144391 | CEFBS_None, // G_FDIV = 177 |
| 144392 | CEFBS_None, // G_FREM = 178 |
| 144393 | CEFBS_None, // G_FPOW = 179 |
| 144394 | CEFBS_None, // G_FPOWI = 180 |
| 144395 | CEFBS_None, // G_FEXP = 181 |
| 144396 | CEFBS_None, // G_FEXP2 = 182 |
| 144397 | CEFBS_None, // G_FEXP10 = 183 |
| 144398 | CEFBS_None, // G_FLOG = 184 |
| 144399 | CEFBS_None, // G_FLOG2 = 185 |
| 144400 | CEFBS_None, // G_FLOG10 = 186 |
| 144401 | CEFBS_None, // G_FLDEXP = 187 |
| 144402 | CEFBS_None, // G_FFREXP = 188 |
| 144403 | CEFBS_None, // G_FNEG = 189 |
| 144404 | CEFBS_None, // G_FPEXT = 190 |
| 144405 | CEFBS_None, // G_FPTRUNC = 191 |
| 144406 | CEFBS_None, // G_FPTOSI = 192 |
| 144407 | CEFBS_None, // G_FPTOUI = 193 |
| 144408 | CEFBS_None, // G_SITOFP = 194 |
| 144409 | CEFBS_None, // G_UITOFP = 195 |
| 144410 | CEFBS_None, // G_FABS = 196 |
| 144411 | CEFBS_None, // G_FCOPYSIGN = 197 |
| 144412 | CEFBS_None, // G_IS_FPCLASS = 198 |
| 144413 | CEFBS_None, // G_FCANONICALIZE = 199 |
| 144414 | CEFBS_None, // G_FMINNUM = 200 |
| 144415 | CEFBS_None, // G_FMAXNUM = 201 |
| 144416 | CEFBS_None, // G_FMINNUM_IEEE = 202 |
| 144417 | CEFBS_None, // G_FMAXNUM_IEEE = 203 |
| 144418 | CEFBS_None, // G_FMINIMUM = 204 |
| 144419 | CEFBS_None, // G_FMAXIMUM = 205 |
| 144420 | CEFBS_None, // G_GET_FPENV = 206 |
| 144421 | CEFBS_None, // G_SET_FPENV = 207 |
| 144422 | CEFBS_None, // G_RESET_FPENV = 208 |
| 144423 | CEFBS_None, // G_GET_FPMODE = 209 |
| 144424 | CEFBS_None, // G_SET_FPMODE = 210 |
| 144425 | CEFBS_None, // G_RESET_FPMODE = 211 |
| 144426 | CEFBS_None, // G_PTR_ADD = 212 |
| 144427 | CEFBS_None, // G_PTRMASK = 213 |
| 144428 | CEFBS_None, // G_SMIN = 214 |
| 144429 | CEFBS_None, // G_SMAX = 215 |
| 144430 | CEFBS_None, // G_UMIN = 216 |
| 144431 | CEFBS_None, // G_UMAX = 217 |
| 144432 | CEFBS_None, // G_ABS = 218 |
| 144433 | CEFBS_None, // G_LROUND = 219 |
| 144434 | CEFBS_None, // G_LLROUND = 220 |
| 144435 | CEFBS_None, // G_BR = 221 |
| 144436 | CEFBS_None, // G_BRJT = 222 |
| 144437 | CEFBS_None, // G_VSCALE = 223 |
| 144438 | CEFBS_None, // G_INSERT_SUBVECTOR = 224 |
| 144439 | CEFBS_None, // G_EXTRACT_SUBVECTOR = 225 |
| 144440 | CEFBS_None, // G_INSERT_VECTOR_ELT = 226 |
| 144441 | CEFBS_None, // G_EXTRACT_VECTOR_ELT = 227 |
| 144442 | CEFBS_None, // G_SHUFFLE_VECTOR = 228 |
| 144443 | CEFBS_None, // G_SPLAT_VECTOR = 229 |
| 144444 | CEFBS_None, // G_VECTOR_COMPRESS = 230 |
| 144445 | CEFBS_None, // G_CTTZ = 231 |
| 144446 | CEFBS_None, // G_CTTZ_ZERO_UNDEF = 232 |
| 144447 | CEFBS_None, // G_CTLZ = 233 |
| 144448 | CEFBS_None, // G_CTLZ_ZERO_UNDEF = 234 |
| 144449 | CEFBS_None, // G_CTPOP = 235 |
| 144450 | CEFBS_None, // G_BSWAP = 236 |
| 144451 | CEFBS_None, // G_BITREVERSE = 237 |
| 144452 | CEFBS_None, // G_FCEIL = 238 |
| 144453 | CEFBS_None, // G_FCOS = 239 |
| 144454 | CEFBS_None, // G_FSIN = 240 |
| 144455 | CEFBS_None, // G_FTAN = 241 |
| 144456 | CEFBS_None, // G_FACOS = 242 |
| 144457 | CEFBS_None, // G_FASIN = 243 |
| 144458 | CEFBS_None, // G_FATAN = 244 |
| 144459 | CEFBS_None, // G_FCOSH = 245 |
| 144460 | CEFBS_None, // G_FSINH = 246 |
| 144461 | CEFBS_None, // G_FTANH = 247 |
| 144462 | CEFBS_None, // G_FSQRT = 248 |
| 144463 | CEFBS_None, // G_FFLOOR = 249 |
| 144464 | CEFBS_None, // G_FRINT = 250 |
| 144465 | CEFBS_None, // G_FNEARBYINT = 251 |
| 144466 | CEFBS_None, // G_ADDRSPACE_CAST = 252 |
| 144467 | CEFBS_None, // G_BLOCK_ADDR = 253 |
| 144468 | CEFBS_None, // G_JUMP_TABLE = 254 |
| 144469 | CEFBS_None, // G_DYN_STACKALLOC = 255 |
| 144470 | CEFBS_None, // G_STACKSAVE = 256 |
| 144471 | CEFBS_None, // G_STACKRESTORE = 257 |
| 144472 | CEFBS_None, // G_STRICT_FADD = 258 |
| 144473 | CEFBS_None, // G_STRICT_FSUB = 259 |
| 144474 | CEFBS_None, // G_STRICT_FMUL = 260 |
| 144475 | CEFBS_None, // G_STRICT_FDIV = 261 |
| 144476 | CEFBS_None, // G_STRICT_FREM = 262 |
| 144477 | CEFBS_None, // G_STRICT_FMA = 263 |
| 144478 | CEFBS_None, // G_STRICT_FSQRT = 264 |
| 144479 | CEFBS_None, // G_STRICT_FLDEXP = 265 |
| 144480 | CEFBS_None, // G_READ_REGISTER = 266 |
| 144481 | CEFBS_None, // G_WRITE_REGISTER = 267 |
| 144482 | CEFBS_None, // G_MEMCPY = 268 |
| 144483 | CEFBS_None, // G_MEMCPY_INLINE = 269 |
| 144484 | CEFBS_None, // G_MEMMOVE = 270 |
| 144485 | CEFBS_None, // G_MEMSET = 271 |
| 144486 | CEFBS_None, // G_BZERO = 272 |
| 144487 | CEFBS_None, // G_TRAP = 273 |
| 144488 | CEFBS_None, // G_DEBUGTRAP = 274 |
| 144489 | CEFBS_None, // G_UBSANTRAP = 275 |
| 144490 | CEFBS_None, // G_VECREDUCE_SEQ_FADD = 276 |
| 144491 | CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 277 |
| 144492 | CEFBS_None, // G_VECREDUCE_FADD = 278 |
| 144493 | CEFBS_None, // G_VECREDUCE_FMUL = 279 |
| 144494 | CEFBS_None, // G_VECREDUCE_FMAX = 280 |
| 144495 | CEFBS_None, // G_VECREDUCE_FMIN = 281 |
| 144496 | CEFBS_None, // G_VECREDUCE_FMAXIMUM = 282 |
| 144497 | CEFBS_None, // G_VECREDUCE_FMINIMUM = 283 |
| 144498 | CEFBS_None, // G_VECREDUCE_ADD = 284 |
| 144499 | CEFBS_None, // G_VECREDUCE_MUL = 285 |
| 144500 | CEFBS_None, // G_VECREDUCE_AND = 286 |
| 144501 | CEFBS_None, // G_VECREDUCE_OR = 287 |
| 144502 | CEFBS_None, // G_VECREDUCE_XOR = 288 |
| 144503 | CEFBS_None, // G_VECREDUCE_SMAX = 289 |
| 144504 | CEFBS_None, // G_VECREDUCE_SMIN = 290 |
| 144505 | CEFBS_None, // G_VECREDUCE_UMAX = 291 |
| 144506 | CEFBS_None, // G_VECREDUCE_UMIN = 292 |
| 144507 | CEFBS_None, // G_SBFX = 293 |
| 144508 | CEFBS_None, // G_UBFX = 294 |
| 144509 | CEFBS_None, // ADD16ri_DB = 295 |
| 144510 | CEFBS_None, // ADD16rr_DB = 296 |
| 144511 | CEFBS_None, // ADD32ri_DB = 297 |
| 144512 | CEFBS_None, // ADD32rr_DB = 298 |
| 144513 | CEFBS_None, // ADD64ri32_DB = 299 |
| 144514 | CEFBS_None, // ADD64rr_DB = 300 |
| 144515 | CEFBS_None, // ADD8ri_DB = 301 |
| 144516 | CEFBS_None, // ADD8rr_DB = 302 |
| 144517 | CEFBS_None, // AVX1_SETALLONES = 303 |
| 144518 | CEFBS_None, // AVX2_SETALLONES = 304 |
| 144519 | CEFBS_None, // AVX512_128_SET0 = 305 |
| 144520 | CEFBS_None, // AVX512_256_SET0 = 306 |
| 144521 | CEFBS_None, // AVX512_512_SET0 = 307 |
| 144522 | CEFBS_None, // AVX512_512_SETALLONES = 308 |
| 144523 | CEFBS_None, // AVX512_512_SEXT_MASK_32 = 309 |
| 144524 | CEFBS_None, // AVX512_512_SEXT_MASK_64 = 310 |
| 144525 | CEFBS_None, // AVX512_FsFLD0F128 = 311 |
| 144526 | CEFBS_None, // AVX512_FsFLD0SD = 312 |
| 144527 | CEFBS_None, // AVX512_FsFLD0SH = 313 |
| 144528 | CEFBS_None, // AVX512_FsFLD0SS = 314 |
| 144529 | CEFBS_None, // AVX_SET0 = 315 |
| 144530 | CEFBS_In64BitMode, // CALL64m_RVMARKER = 316 |
| 144531 | CEFBS_In64BitMode, // CALL64pcrel32_RVMARKER = 317 |
| 144532 | CEFBS_In64BitMode, // CALL64r_RVMARKER = 318 |
| 144533 | CEFBS_None, // FsFLD0F128 = 319 |
| 144534 | CEFBS_None, // FsFLD0SD = 320 |
| 144535 | CEFBS_None, // FsFLD0SH = 321 |
| 144536 | CEFBS_None, // FsFLD0SS = 322 |
| 144537 | CEFBS_Not64BitMode, // INDIRECT_THUNK_CALL32 = 323 |
| 144538 | CEFBS_In64BitMode, // INDIRECT_THUNK_CALL64 = 324 |
| 144539 | CEFBS_None, // INDIRECT_THUNK_TCRETURN32 = 325 |
| 144540 | CEFBS_None, // INDIRECT_THUNK_TCRETURN64 = 326 |
| 144541 | CEFBS_None, // KSET0D = 327 |
| 144542 | CEFBS_None, // KSET0Q = 328 |
| 144543 | CEFBS_None, // KSET0W = 329 |
| 144544 | CEFBS_None, // KSET1D = 330 |
| 144545 | CEFBS_None, // KSET1Q = 331 |
| 144546 | CEFBS_None, // KSET1W = 332 |
| 144547 | CEFBS_In64BitMode, // LCMPXCHG16B_NO_RBX = 333 |
| 144548 | CEFBS_In64BitMode, // LCMPXCHG16B_SAVE_RBX = 334 |
| 144549 | CEFBS_None, // MMX_SET0 = 335 |
| 144550 | CEFBS_None, // MORESTACK_RET = 336 |
| 144551 | CEFBS_None, // MORESTACK_RET_RESTORE_R10 = 337 |
| 144552 | CEFBS_None, // MOV32ImmSExti8 = 338 |
| 144553 | CEFBS_None, // MOV32r0 = 339 |
| 144554 | CEFBS_Not64BitMode, // MOV32r1 = 340 |
| 144555 | CEFBS_Not64BitMode, // MOV32r_1 = 341 |
| 144556 | CEFBS_None, // MOV32ri64 = 342 |
| 144557 | CEFBS_None, // MOV64ImmSExti8 = 343 |
| 144558 | CEFBS_None, // MWAITX = 344 |
| 144559 | CEFBS_None, // MWAITX_SAVE_RBX = 345 |
| 144560 | CEFBS_In64BitMode, // PLDTILECFGV = 346 |
| 144561 | CEFBS_None, // PLEA32r = 347 |
| 144562 | CEFBS_None, // PLEA64r = 348 |
| 144563 | CEFBS_In64BitMode, // PTDPBF16PSV = 349 |
| 144564 | CEFBS_In64BitMode, // PTDPBSSDV = 350 |
| 144565 | CEFBS_In64BitMode, // PTDPBSUDV = 351 |
| 144566 | CEFBS_In64BitMode, // PTDPBUSDV = 352 |
| 144567 | CEFBS_In64BitMode, // PTDPBUUDV = 353 |
| 144568 | CEFBS_In64BitMode, // PTDPFP16PSV = 354 |
| 144569 | CEFBS_In64BitMode, // PTILELOADDT1V = 355 |
| 144570 | CEFBS_In64BitMode, // PTILELOADDV = 356 |
| 144571 | CEFBS_In64BitMode, // PTILESTOREDV = 357 |
| 144572 | CEFBS_In64BitMode, // PTILEZEROV = 358 |
| 144573 | CEFBS_Not64BitMode, // RDFLAGS32 = 359 |
| 144574 | CEFBS_In64BitMode, // RDFLAGS64 = 360 |
| 144575 | CEFBS_None, // SEH_EndPrologue = 361 |
| 144576 | CEFBS_None, // SEH_Epilogue = 362 |
| 144577 | CEFBS_None, // SEH_PushFrame = 363 |
| 144578 | CEFBS_None, // SEH_PushReg = 364 |
| 144579 | CEFBS_None, // SEH_SaveReg = 365 |
| 144580 | CEFBS_None, // SEH_SaveXMM = 366 |
| 144581 | CEFBS_None, // SEH_SetFrame = 367 |
| 144582 | CEFBS_None, // SEH_StackAlign = 368 |
| 144583 | CEFBS_None, // SEH_StackAlloc = 369 |
| 144584 | CEFBS_None, // SETB_C32r = 370 |
| 144585 | CEFBS_None, // SETB_C64r = 371 |
| 144586 | CEFBS_None, // SHLDROT32ri = 372 |
| 144587 | CEFBS_None, // SHLDROT64ri = 373 |
| 144588 | CEFBS_None, // SHRDROT32ri = 374 |
| 144589 | CEFBS_None, // SHRDROT64ri = 375 |
| 144590 | CEFBS_None, // VMOVAPSZ128mr_NOVLX = 376 |
| 144591 | CEFBS_None, // VMOVAPSZ128rm_NOVLX = 377 |
| 144592 | CEFBS_None, // VMOVAPSZ256mr_NOVLX = 378 |
| 144593 | CEFBS_None, // VMOVAPSZ256rm_NOVLX = 379 |
| 144594 | CEFBS_None, // VMOVUPSZ128mr_NOVLX = 380 |
| 144595 | CEFBS_None, // VMOVUPSZ128rm_NOVLX = 381 |
| 144596 | CEFBS_None, // VMOVUPSZ256mr_NOVLX = 382 |
| 144597 | CEFBS_None, // VMOVUPSZ256rm_NOVLX = 383 |
| 144598 | CEFBS_None, // V_SET0 = 384 |
| 144599 | CEFBS_None, // V_SETALLONES = 385 |
| 144600 | CEFBS_Not64BitMode, // WRFLAGS32 = 386 |
| 144601 | CEFBS_In64BitMode, // WRFLAGS64 = 387 |
| 144602 | CEFBS_None, // XABORT_DEF = 388 |
| 144603 | CEFBS_None, // XOR32_FP = 389 |
| 144604 | CEFBS_In64BitMode, // XOR64_FP = 390 |
| 144605 | CEFBS_Not64BitMode, // AAA = 391 |
| 144606 | CEFBS_Not64BitMode, // AAD8i8 = 392 |
| 144607 | CEFBS_None, // AADD32mr = 393 |
| 144608 | CEFBS_In64BitMode, // AADD32mr_EVEX = 394 |
| 144609 | CEFBS_None, // AADD64mr = 395 |
| 144610 | CEFBS_In64BitMode, // AADD64mr_EVEX = 396 |
| 144611 | CEFBS_Not64BitMode, // AAM8i8 = 397 |
| 144612 | CEFBS_None, // AAND32mr = 398 |
| 144613 | CEFBS_In64BitMode, // AAND32mr_EVEX = 399 |
| 144614 | CEFBS_None, // AAND64mr = 400 |
| 144615 | CEFBS_In64BitMode, // AAND64mr_EVEX = 401 |
| 144616 | CEFBS_Not64BitMode, // AAS = 402 |
| 144617 | CEFBS_None, // ABS_F = 403 |
| 144618 | CEFBS_None, // ABS_Fp32 = 404 |
| 144619 | CEFBS_None, // ABS_Fp64 = 405 |
| 144620 | CEFBS_None, // ABS_Fp80 = 406 |
| 144621 | CEFBS_None, // ADC16i16 = 407 |
| 144622 | CEFBS_None, // ADC16mi = 408 |
| 144623 | CEFBS_None, // ADC16mi8 = 409 |
| 144624 | CEFBS_In64BitMode, // ADC16mi8_EVEX = 410 |
| 144625 | CEFBS_In64BitMode, // ADC16mi8_ND = 411 |
| 144626 | CEFBS_In64BitMode, // ADC16mi_EVEX = 412 |
| 144627 | CEFBS_In64BitMode, // ADC16mi_ND = 413 |
| 144628 | CEFBS_None, // ADC16mr = 414 |
| 144629 | CEFBS_In64BitMode, // ADC16mr_EVEX = 415 |
| 144630 | CEFBS_In64BitMode, // ADC16mr_ND = 416 |
| 144631 | CEFBS_None, // ADC16ri = 417 |
| 144632 | CEFBS_None, // ADC16ri8 = 418 |
| 144633 | CEFBS_In64BitMode, // ADC16ri8_EVEX = 419 |
| 144634 | CEFBS_In64BitMode, // ADC16ri8_ND = 420 |
| 144635 | CEFBS_In64BitMode, // ADC16ri_EVEX = 421 |
| 144636 | CEFBS_In64BitMode, // ADC16ri_ND = 422 |
| 144637 | CEFBS_None, // ADC16rm = 423 |
| 144638 | CEFBS_In64BitMode, // ADC16rm_EVEX = 424 |
| 144639 | CEFBS_In64BitMode, // ADC16rm_ND = 425 |
| 144640 | CEFBS_None, // ADC16rr = 426 |
| 144641 | CEFBS_In64BitMode, // ADC16rr_EVEX = 427 |
| 144642 | CEFBS_In64BitMode, // ADC16rr_EVEX_REV = 428 |
| 144643 | CEFBS_In64BitMode, // ADC16rr_ND = 429 |
| 144644 | CEFBS_In64BitMode, // ADC16rr_ND_REV = 430 |
| 144645 | CEFBS_None, // ADC16rr_REV = 431 |
| 144646 | CEFBS_None, // ADC32i32 = 432 |
| 144647 | CEFBS_None, // ADC32mi = 433 |
| 144648 | CEFBS_None, // ADC32mi8 = 434 |
| 144649 | CEFBS_In64BitMode, // ADC32mi8_EVEX = 435 |
| 144650 | CEFBS_In64BitMode, // ADC32mi8_ND = 436 |
| 144651 | CEFBS_In64BitMode, // ADC32mi_EVEX = 437 |
| 144652 | CEFBS_In64BitMode, // ADC32mi_ND = 438 |
| 144653 | CEFBS_None, // ADC32mr = 439 |
| 144654 | CEFBS_In64BitMode, // ADC32mr_EVEX = 440 |
| 144655 | CEFBS_In64BitMode, // ADC32mr_ND = 441 |
| 144656 | CEFBS_None, // ADC32ri = 442 |
| 144657 | CEFBS_None, // ADC32ri8 = 443 |
| 144658 | CEFBS_In64BitMode, // ADC32ri8_EVEX = 444 |
| 144659 | CEFBS_In64BitMode, // ADC32ri8_ND = 445 |
| 144660 | CEFBS_In64BitMode, // ADC32ri_EVEX = 446 |
| 144661 | CEFBS_In64BitMode, // ADC32ri_ND = 447 |
| 144662 | CEFBS_None, // ADC32rm = 448 |
| 144663 | CEFBS_In64BitMode, // ADC32rm_EVEX = 449 |
| 144664 | CEFBS_In64BitMode, // ADC32rm_ND = 450 |
| 144665 | CEFBS_None, // ADC32rr = 451 |
| 144666 | CEFBS_In64BitMode, // ADC32rr_EVEX = 452 |
| 144667 | CEFBS_In64BitMode, // ADC32rr_EVEX_REV = 453 |
| 144668 | CEFBS_In64BitMode, // ADC32rr_ND = 454 |
| 144669 | CEFBS_In64BitMode, // ADC32rr_ND_REV = 455 |
| 144670 | CEFBS_None, // ADC32rr_REV = 456 |
| 144671 | CEFBS_None, // ADC64i32 = 457 |
| 144672 | CEFBS_In64BitMode, // ADC64mi32 = 458 |
| 144673 | CEFBS_In64BitMode, // ADC64mi32_EVEX = 459 |
| 144674 | CEFBS_In64BitMode, // ADC64mi32_ND = 460 |
| 144675 | CEFBS_In64BitMode, // ADC64mi8 = 461 |
| 144676 | CEFBS_In64BitMode, // ADC64mi8_EVEX = 462 |
| 144677 | CEFBS_In64BitMode, // ADC64mi8_ND = 463 |
| 144678 | CEFBS_None, // ADC64mr = 464 |
| 144679 | CEFBS_In64BitMode, // ADC64mr_EVEX = 465 |
| 144680 | CEFBS_In64BitMode, // ADC64mr_ND = 466 |
| 144681 | CEFBS_None, // ADC64ri32 = 467 |
| 144682 | CEFBS_In64BitMode, // ADC64ri32_EVEX = 468 |
| 144683 | CEFBS_In64BitMode, // ADC64ri32_ND = 469 |
| 144684 | CEFBS_None, // ADC64ri8 = 470 |
| 144685 | CEFBS_In64BitMode, // ADC64ri8_EVEX = 471 |
| 144686 | CEFBS_In64BitMode, // ADC64ri8_ND = 472 |
| 144687 | CEFBS_None, // ADC64rm = 473 |
| 144688 | CEFBS_In64BitMode, // ADC64rm_EVEX = 474 |
| 144689 | CEFBS_In64BitMode, // ADC64rm_ND = 475 |
| 144690 | CEFBS_None, // ADC64rr = 476 |
| 144691 | CEFBS_In64BitMode, // ADC64rr_EVEX = 477 |
| 144692 | CEFBS_In64BitMode, // ADC64rr_EVEX_REV = 478 |
| 144693 | CEFBS_In64BitMode, // ADC64rr_ND = 479 |
| 144694 | CEFBS_In64BitMode, // ADC64rr_ND_REV = 480 |
| 144695 | CEFBS_None, // ADC64rr_REV = 481 |
| 144696 | CEFBS_None, // ADC8i8 = 482 |
| 144697 | CEFBS_None, // ADC8mi = 483 |
| 144698 | CEFBS_Not64BitMode, // ADC8mi8 = 484 |
| 144699 | CEFBS_In64BitMode, // ADC8mi_EVEX = 485 |
| 144700 | CEFBS_In64BitMode, // ADC8mi_ND = 486 |
| 144701 | CEFBS_None, // ADC8mr = 487 |
| 144702 | CEFBS_In64BitMode, // ADC8mr_EVEX = 488 |
| 144703 | CEFBS_In64BitMode, // ADC8mr_ND = 489 |
| 144704 | CEFBS_None, // ADC8ri = 490 |
| 144705 | CEFBS_Not64BitMode, // ADC8ri8 = 491 |
| 144706 | CEFBS_In64BitMode, // ADC8ri_EVEX = 492 |
| 144707 | CEFBS_In64BitMode, // ADC8ri_ND = 493 |
| 144708 | CEFBS_None, // ADC8rm = 494 |
| 144709 | CEFBS_In64BitMode, // ADC8rm_EVEX = 495 |
| 144710 | CEFBS_In64BitMode, // ADC8rm_ND = 496 |
| 144711 | CEFBS_None, // ADC8rr = 497 |
| 144712 | CEFBS_In64BitMode, // ADC8rr_EVEX = 498 |
| 144713 | CEFBS_In64BitMode, // ADC8rr_EVEX_REV = 499 |
| 144714 | CEFBS_In64BitMode, // ADC8rr_ND = 500 |
| 144715 | CEFBS_In64BitMode, // ADC8rr_ND_REV = 501 |
| 144716 | CEFBS_None, // ADC8rr_REV = 502 |
| 144717 | CEFBS_None, // ADCX32rm = 503 |
| 144718 | CEFBS_In64BitMode, // ADCX32rm_EVEX = 504 |
| 144719 | CEFBS_In64BitMode, // ADCX32rm_ND = 505 |
| 144720 | CEFBS_None, // ADCX32rr = 506 |
| 144721 | CEFBS_In64BitMode, // ADCX32rr_EVEX = 507 |
| 144722 | CEFBS_In64BitMode, // ADCX32rr_ND = 508 |
| 144723 | CEFBS_None, // ADCX64rm = 509 |
| 144724 | CEFBS_In64BitMode, // ADCX64rm_EVEX = 510 |
| 144725 | CEFBS_In64BitMode, // ADCX64rm_ND = 511 |
| 144726 | CEFBS_None, // ADCX64rr = 512 |
| 144727 | CEFBS_In64BitMode, // ADCX64rr_EVEX = 513 |
| 144728 | CEFBS_In64BitMode, // ADCX64rr_ND = 514 |
| 144729 | CEFBS_None, // ADD16i16 = 515 |
| 144730 | CEFBS_None, // ADD16mi = 516 |
| 144731 | CEFBS_None, // ADD16mi8 = 517 |
| 144732 | CEFBS_In64BitMode, // ADD16mi8_EVEX = 518 |
| 144733 | CEFBS_In64BitMode, // ADD16mi8_ND = 519 |
| 144734 | CEFBS_In64BitMode, // ADD16mi8_NF = 520 |
| 144735 | CEFBS_In64BitMode, // ADD16mi8_NF_ND = 521 |
| 144736 | CEFBS_In64BitMode, // ADD16mi_EVEX = 522 |
| 144737 | CEFBS_In64BitMode, // ADD16mi_ND = 523 |
| 144738 | CEFBS_In64BitMode, // ADD16mi_NF = 524 |
| 144739 | CEFBS_In64BitMode, // ADD16mi_NF_ND = 525 |
| 144740 | CEFBS_None, // ADD16mr = 526 |
| 144741 | CEFBS_In64BitMode, // ADD16mr_EVEX = 527 |
| 144742 | CEFBS_In64BitMode, // ADD16mr_ND = 528 |
| 144743 | CEFBS_In64BitMode, // ADD16mr_NF = 529 |
| 144744 | CEFBS_In64BitMode, // ADD16mr_NF_ND = 530 |
| 144745 | CEFBS_None, // ADD16ri = 531 |
| 144746 | CEFBS_None, // ADD16ri8 = 532 |
| 144747 | CEFBS_In64BitMode, // ADD16ri8_EVEX = 533 |
| 144748 | CEFBS_In64BitMode, // ADD16ri8_ND = 534 |
| 144749 | CEFBS_In64BitMode, // ADD16ri8_NF = 535 |
| 144750 | CEFBS_In64BitMode, // ADD16ri8_NF_ND = 536 |
| 144751 | CEFBS_In64BitMode, // ADD16ri_EVEX = 537 |
| 144752 | CEFBS_In64BitMode, // ADD16ri_ND = 538 |
| 144753 | CEFBS_In64BitMode, // ADD16ri_NF = 539 |
| 144754 | CEFBS_In64BitMode, // ADD16ri_NF_ND = 540 |
| 144755 | CEFBS_None, // ADD16rm = 541 |
| 144756 | CEFBS_In64BitMode, // ADD16rm_EVEX = 542 |
| 144757 | CEFBS_In64BitMode, // ADD16rm_ND = 543 |
| 144758 | CEFBS_In64BitMode, // ADD16rm_NF = 544 |
| 144759 | CEFBS_In64BitMode, // ADD16rm_NF_ND = 545 |
| 144760 | CEFBS_None, // ADD16rr = 546 |
| 144761 | CEFBS_In64BitMode, // ADD16rr_EVEX = 547 |
| 144762 | CEFBS_In64BitMode, // ADD16rr_EVEX_REV = 548 |
| 144763 | CEFBS_In64BitMode, // ADD16rr_ND = 549 |
| 144764 | CEFBS_In64BitMode, // ADD16rr_ND_REV = 550 |
| 144765 | CEFBS_In64BitMode, // ADD16rr_NF = 551 |
| 144766 | CEFBS_In64BitMode, // ADD16rr_NF_ND = 552 |
| 144767 | CEFBS_In64BitMode, // ADD16rr_NF_ND_REV = 553 |
| 144768 | CEFBS_In64BitMode, // ADD16rr_NF_REV = 554 |
| 144769 | CEFBS_None, // ADD16rr_REV = 555 |
| 144770 | CEFBS_None, // ADD32i32 = 556 |
| 144771 | CEFBS_None, // ADD32mi = 557 |
| 144772 | CEFBS_None, // ADD32mi8 = 558 |
| 144773 | CEFBS_In64BitMode, // ADD32mi8_EVEX = 559 |
| 144774 | CEFBS_In64BitMode, // ADD32mi8_ND = 560 |
| 144775 | CEFBS_In64BitMode, // ADD32mi8_NF = 561 |
| 144776 | CEFBS_In64BitMode, // ADD32mi8_NF_ND = 562 |
| 144777 | CEFBS_In64BitMode, // ADD32mi_EVEX = 563 |
| 144778 | CEFBS_In64BitMode, // ADD32mi_ND = 564 |
| 144779 | CEFBS_In64BitMode, // ADD32mi_NF = 565 |
| 144780 | CEFBS_In64BitMode, // ADD32mi_NF_ND = 566 |
| 144781 | CEFBS_None, // ADD32mr = 567 |
| 144782 | CEFBS_In64BitMode, // ADD32mr_EVEX = 568 |
| 144783 | CEFBS_In64BitMode, // ADD32mr_ND = 569 |
| 144784 | CEFBS_In64BitMode, // ADD32mr_NF = 570 |
| 144785 | CEFBS_In64BitMode, // ADD32mr_NF_ND = 571 |
| 144786 | CEFBS_None, // ADD32ri = 572 |
| 144787 | CEFBS_None, // ADD32ri8 = 573 |
| 144788 | CEFBS_In64BitMode, // ADD32ri8_EVEX = 574 |
| 144789 | CEFBS_In64BitMode, // ADD32ri8_ND = 575 |
| 144790 | CEFBS_In64BitMode, // ADD32ri8_NF = 576 |
| 144791 | CEFBS_In64BitMode, // ADD32ri8_NF_ND = 577 |
| 144792 | CEFBS_In64BitMode, // ADD32ri_EVEX = 578 |
| 144793 | CEFBS_In64BitMode, // ADD32ri_ND = 579 |
| 144794 | CEFBS_In64BitMode, // ADD32ri_NF = 580 |
| 144795 | CEFBS_In64BitMode, // ADD32ri_NF_ND = 581 |
| 144796 | CEFBS_None, // ADD32rm = 582 |
| 144797 | CEFBS_In64BitMode, // ADD32rm_EVEX = 583 |
| 144798 | CEFBS_In64BitMode, // ADD32rm_ND = 584 |
| 144799 | CEFBS_In64BitMode, // ADD32rm_NF = 585 |
| 144800 | CEFBS_In64BitMode, // ADD32rm_NF_ND = 586 |
| 144801 | CEFBS_None, // ADD32rr = 587 |
| 144802 | CEFBS_In64BitMode, // ADD32rr_EVEX = 588 |
| 144803 | CEFBS_In64BitMode, // ADD32rr_EVEX_REV = 589 |
| 144804 | CEFBS_In64BitMode, // ADD32rr_ND = 590 |
| 144805 | CEFBS_In64BitMode, // ADD32rr_ND_REV = 591 |
| 144806 | CEFBS_In64BitMode, // ADD32rr_NF = 592 |
| 144807 | CEFBS_In64BitMode, // ADD32rr_NF_ND = 593 |
| 144808 | CEFBS_In64BitMode, // ADD32rr_NF_ND_REV = 594 |
| 144809 | CEFBS_In64BitMode, // ADD32rr_NF_REV = 595 |
| 144810 | CEFBS_None, // ADD32rr_REV = 596 |
| 144811 | CEFBS_None, // ADD64i32 = 597 |
| 144812 | CEFBS_In64BitMode, // ADD64mi32 = 598 |
| 144813 | CEFBS_In64BitMode, // ADD64mi32_EVEX = 599 |
| 144814 | CEFBS_In64BitMode, // ADD64mi32_ND = 600 |
| 144815 | CEFBS_In64BitMode, // ADD64mi32_NF = 601 |
| 144816 | CEFBS_In64BitMode, // ADD64mi32_NF_ND = 602 |
| 144817 | CEFBS_In64BitMode, // ADD64mi8 = 603 |
| 144818 | CEFBS_In64BitMode, // ADD64mi8_EVEX = 604 |
| 144819 | CEFBS_In64BitMode, // ADD64mi8_ND = 605 |
| 144820 | CEFBS_In64BitMode, // ADD64mi8_NF = 606 |
| 144821 | CEFBS_In64BitMode, // ADD64mi8_NF_ND = 607 |
| 144822 | CEFBS_None, // ADD64mr = 608 |
| 144823 | CEFBS_In64BitMode, // ADD64mr_EVEX = 609 |
| 144824 | CEFBS_In64BitMode, // ADD64mr_ND = 610 |
| 144825 | CEFBS_In64BitMode, // ADD64mr_NF = 611 |
| 144826 | CEFBS_In64BitMode, // ADD64mr_NF_ND = 612 |
| 144827 | CEFBS_None, // ADD64ri32 = 613 |
| 144828 | CEFBS_In64BitMode, // ADD64ri32_EVEX = 614 |
| 144829 | CEFBS_In64BitMode, // ADD64ri32_ND = 615 |
| 144830 | CEFBS_In64BitMode, // ADD64ri32_NF = 616 |
| 144831 | CEFBS_In64BitMode, // ADD64ri32_NF_ND = 617 |
| 144832 | CEFBS_None, // ADD64ri8 = 618 |
| 144833 | CEFBS_In64BitMode, // ADD64ri8_EVEX = 619 |
| 144834 | CEFBS_In64BitMode, // ADD64ri8_ND = 620 |
| 144835 | CEFBS_In64BitMode, // ADD64ri8_NF = 621 |
| 144836 | CEFBS_In64BitMode, // ADD64ri8_NF_ND = 622 |
| 144837 | CEFBS_None, // ADD64rm = 623 |
| 144838 | CEFBS_In64BitMode, // ADD64rm_EVEX = 624 |
| 144839 | CEFBS_In64BitMode, // ADD64rm_ND = 625 |
| 144840 | CEFBS_In64BitMode, // ADD64rm_NF = 626 |
| 144841 | CEFBS_In64BitMode, // ADD64rm_NF_ND = 627 |
| 144842 | CEFBS_None, // ADD64rr = 628 |
| 144843 | CEFBS_In64BitMode, // ADD64rr_EVEX = 629 |
| 144844 | CEFBS_In64BitMode, // ADD64rr_EVEX_REV = 630 |
| 144845 | CEFBS_In64BitMode, // ADD64rr_ND = 631 |
| 144846 | CEFBS_In64BitMode, // ADD64rr_ND_REV = 632 |
| 144847 | CEFBS_In64BitMode, // ADD64rr_NF = 633 |
| 144848 | CEFBS_In64BitMode, // ADD64rr_NF_ND = 634 |
| 144849 | CEFBS_In64BitMode, // ADD64rr_NF_ND_REV = 635 |
| 144850 | CEFBS_In64BitMode, // ADD64rr_NF_REV = 636 |
| 144851 | CEFBS_None, // ADD64rr_REV = 637 |
| 144852 | CEFBS_None, // ADD8i8 = 638 |
| 144853 | CEFBS_None, // ADD8mi = 639 |
| 144854 | CEFBS_Not64BitMode, // ADD8mi8 = 640 |
| 144855 | CEFBS_In64BitMode, // ADD8mi_EVEX = 641 |
| 144856 | CEFBS_In64BitMode, // ADD8mi_ND = 642 |
| 144857 | CEFBS_In64BitMode, // ADD8mi_NF = 643 |
| 144858 | CEFBS_In64BitMode, // ADD8mi_NF_ND = 644 |
| 144859 | CEFBS_None, // ADD8mr = 645 |
| 144860 | CEFBS_In64BitMode, // ADD8mr_EVEX = 646 |
| 144861 | CEFBS_In64BitMode, // ADD8mr_ND = 647 |
| 144862 | CEFBS_In64BitMode, // ADD8mr_NF = 648 |
| 144863 | CEFBS_In64BitMode, // ADD8mr_NF_ND = 649 |
| 144864 | CEFBS_None, // ADD8ri = 650 |
| 144865 | CEFBS_Not64BitMode, // ADD8ri8 = 651 |
| 144866 | CEFBS_In64BitMode, // ADD8ri_EVEX = 652 |
| 144867 | CEFBS_In64BitMode, // ADD8ri_ND = 653 |
| 144868 | CEFBS_In64BitMode, // ADD8ri_NF = 654 |
| 144869 | CEFBS_In64BitMode, // ADD8ri_NF_ND = 655 |
| 144870 | CEFBS_None, // ADD8rm = 656 |
| 144871 | CEFBS_In64BitMode, // ADD8rm_EVEX = 657 |
| 144872 | CEFBS_In64BitMode, // ADD8rm_ND = 658 |
| 144873 | CEFBS_In64BitMode, // ADD8rm_NF = 659 |
| 144874 | CEFBS_In64BitMode, // ADD8rm_NF_ND = 660 |
| 144875 | CEFBS_None, // ADD8rr = 661 |
| 144876 | CEFBS_In64BitMode, // ADD8rr_EVEX = 662 |
| 144877 | CEFBS_In64BitMode, // ADD8rr_EVEX_REV = 663 |
| 144878 | CEFBS_In64BitMode, // ADD8rr_ND = 664 |
| 144879 | CEFBS_In64BitMode, // ADD8rr_ND_REV = 665 |
| 144880 | CEFBS_In64BitMode, // ADD8rr_NF = 666 |
| 144881 | CEFBS_In64BitMode, // ADD8rr_NF_ND = 667 |
| 144882 | CEFBS_In64BitMode, // ADD8rr_NF_ND_REV = 668 |
| 144883 | CEFBS_In64BitMode, // ADD8rr_NF_REV = 669 |
| 144884 | CEFBS_None, // ADD8rr_REV = 670 |
| 144885 | CEFBS_None, // ADDPDrm = 671 |
| 144886 | CEFBS_None, // ADDPDrr = 672 |
| 144887 | CEFBS_None, // ADDPSrm = 673 |
| 144888 | CEFBS_None, // ADDPSrr = 674 |
| 144889 | CEFBS_In32BitMode, // ADDR16_PREFIX = 675 |
| 144890 | CEFBS_In64BitMode, // ADDR32_PREFIX = 676 |
| 144891 | CEFBS_None, // ADDSDrm = 677 |
| 144892 | CEFBS_None, // ADDSDrm_Int = 678 |
| 144893 | CEFBS_None, // ADDSDrr = 679 |
| 144894 | CEFBS_None, // ADDSDrr_Int = 680 |
| 144895 | CEFBS_None, // ADDSSrm = 681 |
| 144896 | CEFBS_None, // ADDSSrm_Int = 682 |
| 144897 | CEFBS_None, // ADDSSrr = 683 |
| 144898 | CEFBS_None, // ADDSSrr_Int = 684 |
| 144899 | CEFBS_None, // ADDSUBPDrm = 685 |
| 144900 | CEFBS_None, // ADDSUBPDrr = 686 |
| 144901 | CEFBS_None, // ADDSUBPSrm = 687 |
| 144902 | CEFBS_None, // ADDSUBPSrr = 688 |
| 144903 | CEFBS_None, // ADD_F32m = 689 |
| 144904 | CEFBS_None, // ADD_F64m = 690 |
| 144905 | CEFBS_None, // ADD_FI16m = 691 |
| 144906 | CEFBS_None, // ADD_FI32m = 692 |
| 144907 | CEFBS_None, // ADD_FPrST0 = 693 |
| 144908 | CEFBS_None, // ADD_FST0r = 694 |
| 144909 | CEFBS_None, // ADD_Fp32 = 695 |
| 144910 | CEFBS_None, // ADD_Fp32m = 696 |
| 144911 | CEFBS_None, // ADD_Fp64 = 697 |
| 144912 | CEFBS_None, // ADD_Fp64m = 698 |
| 144913 | CEFBS_None, // ADD_Fp64m32 = 699 |
| 144914 | CEFBS_None, // ADD_Fp80 = 700 |
| 144915 | CEFBS_None, // ADD_Fp80m32 = 701 |
| 144916 | CEFBS_None, // ADD_Fp80m64 = 702 |
| 144917 | CEFBS_None, // ADD_FpI16m32 = 703 |
| 144918 | CEFBS_None, // ADD_FpI16m64 = 704 |
| 144919 | CEFBS_None, // ADD_FpI16m80 = 705 |
| 144920 | CEFBS_None, // ADD_FpI32m32 = 706 |
| 144921 | CEFBS_None, // ADD_FpI32m64 = 707 |
| 144922 | CEFBS_None, // ADD_FpI32m80 = 708 |
| 144923 | CEFBS_None, // ADD_FrST0 = 709 |
| 144924 | CEFBS_None, // ADJCALLSTACKDOWN32 = 710 |
| 144925 | CEFBS_None, // ADJCALLSTACKDOWN64 = 711 |
| 144926 | CEFBS_None, // ADJCALLSTACKUP32 = 712 |
| 144927 | CEFBS_None, // ADJCALLSTACKUP64 = 713 |
| 144928 | CEFBS_None, // ADOX32rm = 714 |
| 144929 | CEFBS_In64BitMode, // ADOX32rm_EVEX = 715 |
| 144930 | CEFBS_In64BitMode, // ADOX32rm_ND = 716 |
| 144931 | CEFBS_None, // ADOX32rr = 717 |
| 144932 | CEFBS_In64BitMode, // ADOX32rr_EVEX = 718 |
| 144933 | CEFBS_In64BitMode, // ADOX32rr_ND = 719 |
| 144934 | CEFBS_None, // ADOX64rm = 720 |
| 144935 | CEFBS_In64BitMode, // ADOX64rm_EVEX = 721 |
| 144936 | CEFBS_In64BitMode, // ADOX64rm_ND = 722 |
| 144937 | CEFBS_None, // ADOX64rr = 723 |
| 144938 | CEFBS_In64BitMode, // ADOX64rr_EVEX = 724 |
| 144939 | CEFBS_In64BitMode, // ADOX64rr_ND = 725 |
| 144940 | CEFBS_None, // AESDEC128KL = 726 |
| 144941 | CEFBS_None, // AESDEC256KL = 727 |
| 144942 | CEFBS_None, // AESDECLASTrm = 728 |
| 144943 | CEFBS_None, // AESDECLASTrr = 729 |
| 144944 | CEFBS_None, // AESDECWIDE128KL = 730 |
| 144945 | CEFBS_None, // AESDECWIDE256KL = 731 |
| 144946 | CEFBS_None, // AESDECrm = 732 |
| 144947 | CEFBS_None, // AESDECrr = 733 |
| 144948 | CEFBS_None, // AESENC128KL = 734 |
| 144949 | CEFBS_None, // AESENC256KL = 735 |
| 144950 | CEFBS_None, // AESENCLASTrm = 736 |
| 144951 | CEFBS_None, // AESENCLASTrr = 737 |
| 144952 | CEFBS_None, // AESENCWIDE128KL = 738 |
| 144953 | CEFBS_None, // AESENCWIDE256KL = 739 |
| 144954 | CEFBS_None, // AESENCrm = 740 |
| 144955 | CEFBS_None, // AESENCrr = 741 |
| 144956 | CEFBS_None, // AESIMCrm = 742 |
| 144957 | CEFBS_None, // AESIMCrr = 743 |
| 144958 | CEFBS_None, // AESKEYGENASSIST128rm = 744 |
| 144959 | CEFBS_None, // AESKEYGENASSIST128rr = 745 |
| 144960 | CEFBS_None, // AND16i16 = 746 |
| 144961 | CEFBS_None, // AND16mi = 747 |
| 144962 | CEFBS_None, // AND16mi8 = 748 |
| 144963 | CEFBS_In64BitMode, // AND16mi8_EVEX = 749 |
| 144964 | CEFBS_In64BitMode, // AND16mi8_ND = 750 |
| 144965 | CEFBS_In64BitMode, // AND16mi8_NF = 751 |
| 144966 | CEFBS_In64BitMode, // AND16mi8_NF_ND = 752 |
| 144967 | CEFBS_In64BitMode, // AND16mi_EVEX = 753 |
| 144968 | CEFBS_In64BitMode, // AND16mi_ND = 754 |
| 144969 | CEFBS_In64BitMode, // AND16mi_NF = 755 |
| 144970 | CEFBS_In64BitMode, // AND16mi_NF_ND = 756 |
| 144971 | CEFBS_None, // AND16mr = 757 |
| 144972 | CEFBS_In64BitMode, // AND16mr_EVEX = 758 |
| 144973 | CEFBS_In64BitMode, // AND16mr_ND = 759 |
| 144974 | CEFBS_In64BitMode, // AND16mr_NF = 760 |
| 144975 | CEFBS_In64BitMode, // AND16mr_NF_ND = 761 |
| 144976 | CEFBS_None, // AND16ri = 762 |
| 144977 | CEFBS_None, // AND16ri8 = 763 |
| 144978 | CEFBS_In64BitMode, // AND16ri8_EVEX = 764 |
| 144979 | CEFBS_In64BitMode, // AND16ri8_ND = 765 |
| 144980 | CEFBS_In64BitMode, // AND16ri8_NF = 766 |
| 144981 | CEFBS_In64BitMode, // AND16ri8_NF_ND = 767 |
| 144982 | CEFBS_In64BitMode, // AND16ri_EVEX = 768 |
| 144983 | CEFBS_In64BitMode, // AND16ri_ND = 769 |
| 144984 | CEFBS_In64BitMode, // AND16ri_NF = 770 |
| 144985 | CEFBS_In64BitMode, // AND16ri_NF_ND = 771 |
| 144986 | CEFBS_None, // AND16rm = 772 |
| 144987 | CEFBS_In64BitMode, // AND16rm_EVEX = 773 |
| 144988 | CEFBS_In64BitMode, // AND16rm_ND = 774 |
| 144989 | CEFBS_In64BitMode, // AND16rm_NF = 775 |
| 144990 | CEFBS_In64BitMode, // AND16rm_NF_ND = 776 |
| 144991 | CEFBS_None, // AND16rr = 777 |
| 144992 | CEFBS_In64BitMode, // AND16rr_EVEX = 778 |
| 144993 | CEFBS_In64BitMode, // AND16rr_EVEX_REV = 779 |
| 144994 | CEFBS_In64BitMode, // AND16rr_ND = 780 |
| 144995 | CEFBS_In64BitMode, // AND16rr_ND_REV = 781 |
| 144996 | CEFBS_In64BitMode, // AND16rr_NF = 782 |
| 144997 | CEFBS_In64BitMode, // AND16rr_NF_ND = 783 |
| 144998 | CEFBS_In64BitMode, // AND16rr_NF_ND_REV = 784 |
| 144999 | CEFBS_In64BitMode, // AND16rr_NF_REV = 785 |
| 145000 | CEFBS_None, // AND16rr_REV = 786 |
| 145001 | CEFBS_None, // AND32i32 = 787 |
| 145002 | CEFBS_None, // AND32mi = 788 |
| 145003 | CEFBS_None, // AND32mi8 = 789 |
| 145004 | CEFBS_In64BitMode, // AND32mi8_EVEX = 790 |
| 145005 | CEFBS_In64BitMode, // AND32mi8_ND = 791 |
| 145006 | CEFBS_In64BitMode, // AND32mi8_NF = 792 |
| 145007 | CEFBS_In64BitMode, // AND32mi8_NF_ND = 793 |
| 145008 | CEFBS_In64BitMode, // AND32mi_EVEX = 794 |
| 145009 | CEFBS_In64BitMode, // AND32mi_ND = 795 |
| 145010 | CEFBS_In64BitMode, // AND32mi_NF = 796 |
| 145011 | CEFBS_In64BitMode, // AND32mi_NF_ND = 797 |
| 145012 | CEFBS_None, // AND32mr = 798 |
| 145013 | CEFBS_In64BitMode, // AND32mr_EVEX = 799 |
| 145014 | CEFBS_In64BitMode, // AND32mr_ND = 800 |
| 145015 | CEFBS_In64BitMode, // AND32mr_NF = 801 |
| 145016 | CEFBS_In64BitMode, // AND32mr_NF_ND = 802 |
| 145017 | CEFBS_None, // AND32ri = 803 |
| 145018 | CEFBS_None, // AND32ri8 = 804 |
| 145019 | CEFBS_In64BitMode, // AND32ri8_EVEX = 805 |
| 145020 | CEFBS_In64BitMode, // AND32ri8_ND = 806 |
| 145021 | CEFBS_In64BitMode, // AND32ri8_NF = 807 |
| 145022 | CEFBS_In64BitMode, // AND32ri8_NF_ND = 808 |
| 145023 | CEFBS_In64BitMode, // AND32ri_EVEX = 809 |
| 145024 | CEFBS_In64BitMode, // AND32ri_ND = 810 |
| 145025 | CEFBS_In64BitMode, // AND32ri_NF = 811 |
| 145026 | CEFBS_In64BitMode, // AND32ri_NF_ND = 812 |
| 145027 | CEFBS_None, // AND32rm = 813 |
| 145028 | CEFBS_In64BitMode, // AND32rm_EVEX = 814 |
| 145029 | CEFBS_In64BitMode, // AND32rm_ND = 815 |
| 145030 | CEFBS_In64BitMode, // AND32rm_NF = 816 |
| 145031 | CEFBS_In64BitMode, // AND32rm_NF_ND = 817 |
| 145032 | CEFBS_None, // AND32rr = 818 |
| 145033 | CEFBS_In64BitMode, // AND32rr_EVEX = 819 |
| 145034 | CEFBS_In64BitMode, // AND32rr_EVEX_REV = 820 |
| 145035 | CEFBS_In64BitMode, // AND32rr_ND = 821 |
| 145036 | CEFBS_In64BitMode, // AND32rr_ND_REV = 822 |
| 145037 | CEFBS_In64BitMode, // AND32rr_NF = 823 |
| 145038 | CEFBS_In64BitMode, // AND32rr_NF_ND = 824 |
| 145039 | CEFBS_In64BitMode, // AND32rr_NF_ND_REV = 825 |
| 145040 | CEFBS_In64BitMode, // AND32rr_NF_REV = 826 |
| 145041 | CEFBS_None, // AND32rr_REV = 827 |
| 145042 | CEFBS_None, // AND64i32 = 828 |
| 145043 | CEFBS_In64BitMode, // AND64mi32 = 829 |
| 145044 | CEFBS_In64BitMode, // AND64mi32_EVEX = 830 |
| 145045 | CEFBS_In64BitMode, // AND64mi32_ND = 831 |
| 145046 | CEFBS_In64BitMode, // AND64mi32_NF = 832 |
| 145047 | CEFBS_In64BitMode, // AND64mi32_NF_ND = 833 |
| 145048 | CEFBS_In64BitMode, // AND64mi8 = 834 |
| 145049 | CEFBS_In64BitMode, // AND64mi8_EVEX = 835 |
| 145050 | CEFBS_In64BitMode, // AND64mi8_ND = 836 |
| 145051 | CEFBS_In64BitMode, // AND64mi8_NF = 837 |
| 145052 | CEFBS_In64BitMode, // AND64mi8_NF_ND = 838 |
| 145053 | CEFBS_None, // AND64mr = 839 |
| 145054 | CEFBS_In64BitMode, // AND64mr_EVEX = 840 |
| 145055 | CEFBS_In64BitMode, // AND64mr_ND = 841 |
| 145056 | CEFBS_In64BitMode, // AND64mr_NF = 842 |
| 145057 | CEFBS_In64BitMode, // AND64mr_NF_ND = 843 |
| 145058 | CEFBS_None, // AND64ri32 = 844 |
| 145059 | CEFBS_In64BitMode, // AND64ri32_EVEX = 845 |
| 145060 | CEFBS_In64BitMode, // AND64ri32_ND = 846 |
| 145061 | CEFBS_In64BitMode, // AND64ri32_NF = 847 |
| 145062 | CEFBS_In64BitMode, // AND64ri32_NF_ND = 848 |
| 145063 | CEFBS_None, // AND64ri8 = 849 |
| 145064 | CEFBS_In64BitMode, // AND64ri8_EVEX = 850 |
| 145065 | CEFBS_In64BitMode, // AND64ri8_ND = 851 |
| 145066 | CEFBS_In64BitMode, // AND64ri8_NF = 852 |
| 145067 | CEFBS_In64BitMode, // AND64ri8_NF_ND = 853 |
| 145068 | CEFBS_None, // AND64rm = 854 |
| 145069 | CEFBS_In64BitMode, // AND64rm_EVEX = 855 |
| 145070 | CEFBS_In64BitMode, // AND64rm_ND = 856 |
| 145071 | CEFBS_In64BitMode, // AND64rm_NF = 857 |
| 145072 | CEFBS_In64BitMode, // AND64rm_NF_ND = 858 |
| 145073 | CEFBS_None, // AND64rr = 859 |
| 145074 | CEFBS_In64BitMode, // AND64rr_EVEX = 860 |
| 145075 | CEFBS_In64BitMode, // AND64rr_EVEX_REV = 861 |
| 145076 | CEFBS_In64BitMode, // AND64rr_ND = 862 |
| 145077 | CEFBS_In64BitMode, // AND64rr_ND_REV = 863 |
| 145078 | CEFBS_In64BitMode, // AND64rr_NF = 864 |
| 145079 | CEFBS_In64BitMode, // AND64rr_NF_ND = 865 |
| 145080 | CEFBS_In64BitMode, // AND64rr_NF_ND_REV = 866 |
| 145081 | CEFBS_In64BitMode, // AND64rr_NF_REV = 867 |
| 145082 | CEFBS_None, // AND64rr_REV = 868 |
| 145083 | CEFBS_None, // AND8i8 = 869 |
| 145084 | CEFBS_None, // AND8mi = 870 |
| 145085 | CEFBS_Not64BitMode, // AND8mi8 = 871 |
| 145086 | CEFBS_In64BitMode, // AND8mi_EVEX = 872 |
| 145087 | CEFBS_In64BitMode, // AND8mi_ND = 873 |
| 145088 | CEFBS_In64BitMode, // AND8mi_NF = 874 |
| 145089 | CEFBS_In64BitMode, // AND8mi_NF_ND = 875 |
| 145090 | CEFBS_None, // AND8mr = 876 |
| 145091 | CEFBS_In64BitMode, // AND8mr_EVEX = 877 |
| 145092 | CEFBS_In64BitMode, // AND8mr_ND = 878 |
| 145093 | CEFBS_In64BitMode, // AND8mr_NF = 879 |
| 145094 | CEFBS_In64BitMode, // AND8mr_NF_ND = 880 |
| 145095 | CEFBS_None, // AND8ri = 881 |
| 145096 | CEFBS_Not64BitMode, // AND8ri8 = 882 |
| 145097 | CEFBS_In64BitMode, // AND8ri_EVEX = 883 |
| 145098 | CEFBS_In64BitMode, // AND8ri_ND = 884 |
| 145099 | CEFBS_In64BitMode, // AND8ri_NF = 885 |
| 145100 | CEFBS_In64BitMode, // AND8ri_NF_ND = 886 |
| 145101 | CEFBS_None, // AND8rm = 887 |
| 145102 | CEFBS_In64BitMode, // AND8rm_EVEX = 888 |
| 145103 | CEFBS_In64BitMode, // AND8rm_ND = 889 |
| 145104 | CEFBS_In64BitMode, // AND8rm_NF = 890 |
| 145105 | CEFBS_In64BitMode, // AND8rm_NF_ND = 891 |
| 145106 | CEFBS_None, // AND8rr = 892 |
| 145107 | CEFBS_In64BitMode, // AND8rr_EVEX = 893 |
| 145108 | CEFBS_In64BitMode, // AND8rr_EVEX_REV = 894 |
| 145109 | CEFBS_In64BitMode, // AND8rr_ND = 895 |
| 145110 | CEFBS_In64BitMode, // AND8rr_ND_REV = 896 |
| 145111 | CEFBS_In64BitMode, // AND8rr_NF = 897 |
| 145112 | CEFBS_In64BitMode, // AND8rr_NF_ND = 898 |
| 145113 | CEFBS_In64BitMode, // AND8rr_NF_ND_REV = 899 |
| 145114 | CEFBS_In64BitMode, // AND8rr_NF_REV = 900 |
| 145115 | CEFBS_None, // AND8rr_REV = 901 |
| 145116 | CEFBS_None, // ANDN32rm = 902 |
| 145117 | CEFBS_In64BitMode, // ANDN32rm_EVEX = 903 |
| 145118 | CEFBS_In64BitMode, // ANDN32rm_NF = 904 |
| 145119 | CEFBS_None, // ANDN32rr = 905 |
| 145120 | CEFBS_In64BitMode, // ANDN32rr_EVEX = 906 |
| 145121 | CEFBS_In64BitMode, // ANDN32rr_NF = 907 |
| 145122 | CEFBS_None, // ANDN64rm = 908 |
| 145123 | CEFBS_In64BitMode, // ANDN64rm_EVEX = 909 |
| 145124 | CEFBS_In64BitMode, // ANDN64rm_NF = 910 |
| 145125 | CEFBS_None, // ANDN64rr = 911 |
| 145126 | CEFBS_In64BitMode, // ANDN64rr_EVEX = 912 |
| 145127 | CEFBS_In64BitMode, // ANDN64rr_NF = 913 |
| 145128 | CEFBS_None, // ANDNPDrm = 914 |
| 145129 | CEFBS_None, // ANDNPDrr = 915 |
| 145130 | CEFBS_None, // ANDNPSrm = 916 |
| 145131 | CEFBS_None, // ANDNPSrr = 917 |
| 145132 | CEFBS_None, // ANDPDrm = 918 |
| 145133 | CEFBS_None, // ANDPDrr = 919 |
| 145134 | CEFBS_None, // ANDPSrm = 920 |
| 145135 | CEFBS_None, // ANDPSrr = 921 |
| 145136 | CEFBS_None, // AOR32mr = 922 |
| 145137 | CEFBS_In64BitMode, // AOR32mr_EVEX = 923 |
| 145138 | CEFBS_None, // AOR64mr = 924 |
| 145139 | CEFBS_In64BitMode, // AOR64mr_EVEX = 925 |
| 145140 | CEFBS_Not64BitMode, // ARPL16mr = 926 |
| 145141 | CEFBS_Not64BitMode, // ARPL16rr = 927 |
| 145142 | CEFBS_None, // ASAN_CHECK_MEMACCESS = 928 |
| 145143 | CEFBS_None, // AXOR32mr = 929 |
| 145144 | CEFBS_In64BitMode, // AXOR32mr_EVEX = 930 |
| 145145 | CEFBS_None, // AXOR64mr = 931 |
| 145146 | CEFBS_In64BitMode, // AXOR64mr_EVEX = 932 |
| 145147 | CEFBS_None, // BEXTR32rm = 933 |
| 145148 | CEFBS_In64BitMode, // BEXTR32rm_EVEX = 934 |
| 145149 | CEFBS_In64BitMode, // BEXTR32rm_NF = 935 |
| 145150 | CEFBS_None, // BEXTR32rr = 936 |
| 145151 | CEFBS_In64BitMode, // BEXTR32rr_EVEX = 937 |
| 145152 | CEFBS_In64BitMode, // BEXTR32rr_NF = 938 |
| 145153 | CEFBS_None, // BEXTR64rm = 939 |
| 145154 | CEFBS_In64BitMode, // BEXTR64rm_EVEX = 940 |
| 145155 | CEFBS_In64BitMode, // BEXTR64rm_NF = 941 |
| 145156 | CEFBS_None, // BEXTR64rr = 942 |
| 145157 | CEFBS_In64BitMode, // BEXTR64rr_EVEX = 943 |
| 145158 | CEFBS_In64BitMode, // BEXTR64rr_NF = 944 |
| 145159 | CEFBS_None, // BEXTRI32mi = 945 |
| 145160 | CEFBS_None, // BEXTRI32ri = 946 |
| 145161 | CEFBS_None, // BEXTRI64mi = 947 |
| 145162 | CEFBS_None, // BEXTRI64ri = 948 |
| 145163 | CEFBS_None, // BLCFILL32rm = 949 |
| 145164 | CEFBS_None, // BLCFILL32rr = 950 |
| 145165 | CEFBS_None, // BLCFILL64rm = 951 |
| 145166 | CEFBS_None, // BLCFILL64rr = 952 |
| 145167 | CEFBS_None, // BLCI32rm = 953 |
| 145168 | CEFBS_None, // BLCI32rr = 954 |
| 145169 | CEFBS_None, // BLCI64rm = 955 |
| 145170 | CEFBS_None, // BLCI64rr = 956 |
| 145171 | CEFBS_None, // BLCIC32rm = 957 |
| 145172 | CEFBS_None, // BLCIC32rr = 958 |
| 145173 | CEFBS_None, // BLCIC64rm = 959 |
| 145174 | CEFBS_None, // BLCIC64rr = 960 |
| 145175 | CEFBS_None, // BLCMSK32rm = 961 |
| 145176 | CEFBS_None, // BLCMSK32rr = 962 |
| 145177 | CEFBS_None, // BLCMSK64rm = 963 |
| 145178 | CEFBS_None, // BLCMSK64rr = 964 |
| 145179 | CEFBS_None, // BLCS32rm = 965 |
| 145180 | CEFBS_None, // BLCS32rr = 966 |
| 145181 | CEFBS_None, // BLCS64rm = 967 |
| 145182 | CEFBS_None, // BLCS64rr = 968 |
| 145183 | CEFBS_None, // BLENDPDrmi = 969 |
| 145184 | CEFBS_None, // BLENDPDrri = 970 |
| 145185 | CEFBS_None, // BLENDPSrmi = 971 |
| 145186 | CEFBS_None, // BLENDPSrri = 972 |
| 145187 | CEFBS_None, // BLENDVPDrm0 = 973 |
| 145188 | CEFBS_None, // BLENDVPDrr0 = 974 |
| 145189 | CEFBS_None, // BLENDVPSrm0 = 975 |
| 145190 | CEFBS_None, // BLENDVPSrr0 = 976 |
| 145191 | CEFBS_None, // BLSFILL32rm = 977 |
| 145192 | CEFBS_None, // BLSFILL32rr = 978 |
| 145193 | CEFBS_None, // BLSFILL64rm = 979 |
| 145194 | CEFBS_None, // BLSFILL64rr = 980 |
| 145195 | CEFBS_None, // BLSI32rm = 981 |
| 145196 | CEFBS_In64BitMode, // BLSI32rm_EVEX = 982 |
| 145197 | CEFBS_In64BitMode, // BLSI32rm_NF = 983 |
| 145198 | CEFBS_None, // BLSI32rr = 984 |
| 145199 | CEFBS_In64BitMode, // BLSI32rr_EVEX = 985 |
| 145200 | CEFBS_In64BitMode, // BLSI32rr_NF = 986 |
| 145201 | CEFBS_None, // BLSI64rm = 987 |
| 145202 | CEFBS_In64BitMode, // BLSI64rm_EVEX = 988 |
| 145203 | CEFBS_In64BitMode, // BLSI64rm_NF = 989 |
| 145204 | CEFBS_None, // BLSI64rr = 990 |
| 145205 | CEFBS_In64BitMode, // BLSI64rr_EVEX = 991 |
| 145206 | CEFBS_In64BitMode, // BLSI64rr_NF = 992 |
| 145207 | CEFBS_None, // BLSIC32rm = 993 |
| 145208 | CEFBS_None, // BLSIC32rr = 994 |
| 145209 | CEFBS_None, // BLSIC64rm = 995 |
| 145210 | CEFBS_None, // BLSIC64rr = 996 |
| 145211 | CEFBS_None, // BLSMSK32rm = 997 |
| 145212 | CEFBS_In64BitMode, // BLSMSK32rm_EVEX = 998 |
| 145213 | CEFBS_In64BitMode, // BLSMSK32rm_NF = 999 |
| 145214 | CEFBS_None, // BLSMSK32rr = 1000 |
| 145215 | CEFBS_In64BitMode, // BLSMSK32rr_EVEX = 1001 |
| 145216 | CEFBS_In64BitMode, // BLSMSK32rr_NF = 1002 |
| 145217 | CEFBS_None, // BLSMSK64rm = 1003 |
| 145218 | CEFBS_In64BitMode, // BLSMSK64rm_EVEX = 1004 |
| 145219 | CEFBS_In64BitMode, // BLSMSK64rm_NF = 1005 |
| 145220 | CEFBS_None, // BLSMSK64rr = 1006 |
| 145221 | CEFBS_In64BitMode, // BLSMSK64rr_EVEX = 1007 |
| 145222 | CEFBS_In64BitMode, // BLSMSK64rr_NF = 1008 |
| 145223 | CEFBS_None, // BLSR32rm = 1009 |
| 145224 | CEFBS_In64BitMode, // BLSR32rm_EVEX = 1010 |
| 145225 | CEFBS_In64BitMode, // BLSR32rm_NF = 1011 |
| 145226 | CEFBS_None, // BLSR32rr = 1012 |
| 145227 | CEFBS_In64BitMode, // BLSR32rr_EVEX = 1013 |
| 145228 | CEFBS_In64BitMode, // BLSR32rr_NF = 1014 |
| 145229 | CEFBS_None, // BLSR64rm = 1015 |
| 145230 | CEFBS_In64BitMode, // BLSR64rm_EVEX = 1016 |
| 145231 | CEFBS_In64BitMode, // BLSR64rm_NF = 1017 |
| 145232 | CEFBS_None, // BLSR64rr = 1018 |
| 145233 | CEFBS_In64BitMode, // BLSR64rr_EVEX = 1019 |
| 145234 | CEFBS_In64BitMode, // BLSR64rr_NF = 1020 |
| 145235 | CEFBS_Not64BitMode, // BOUNDS16rm = 1021 |
| 145236 | CEFBS_Not64BitMode, // BOUNDS32rm = 1022 |
| 145237 | CEFBS_None, // BSF16rm = 1023 |
| 145238 | CEFBS_None, // BSF16rr = 1024 |
| 145239 | CEFBS_None, // BSF32rm = 1025 |
| 145240 | CEFBS_None, // BSF32rr = 1026 |
| 145241 | CEFBS_None, // BSF64rm = 1027 |
| 145242 | CEFBS_None, // BSF64rr = 1028 |
| 145243 | CEFBS_None, // BSR16rm = 1029 |
| 145244 | CEFBS_None, // BSR16rr = 1030 |
| 145245 | CEFBS_None, // BSR32rm = 1031 |
| 145246 | CEFBS_None, // BSR32rr = 1032 |
| 145247 | CEFBS_None, // BSR64rm = 1033 |
| 145248 | CEFBS_None, // BSR64rr = 1034 |
| 145249 | CEFBS_None, // BSWAP16r_BAD = 1035 |
| 145250 | CEFBS_None, // BSWAP32r = 1036 |
| 145251 | CEFBS_None, // BSWAP64r = 1037 |
| 145252 | CEFBS_None, // BT16mi8 = 1038 |
| 145253 | CEFBS_None, // BT16mr = 1039 |
| 145254 | CEFBS_None, // BT16ri8 = 1040 |
| 145255 | CEFBS_None, // BT16rr = 1041 |
| 145256 | CEFBS_None, // BT32mi8 = 1042 |
| 145257 | CEFBS_None, // BT32mr = 1043 |
| 145258 | CEFBS_None, // BT32ri8 = 1044 |
| 145259 | CEFBS_None, // BT32rr = 1045 |
| 145260 | CEFBS_In64BitMode, // BT64mi8 = 1046 |
| 145261 | CEFBS_None, // BT64mr = 1047 |
| 145262 | CEFBS_None, // BT64ri8 = 1048 |
| 145263 | CEFBS_None, // BT64rr = 1049 |
| 145264 | CEFBS_None, // BTC16mi8 = 1050 |
| 145265 | CEFBS_None, // BTC16mr = 1051 |
| 145266 | CEFBS_None, // BTC16ri8 = 1052 |
| 145267 | CEFBS_None, // BTC16rr = 1053 |
| 145268 | CEFBS_None, // BTC32mi8 = 1054 |
| 145269 | CEFBS_None, // BTC32mr = 1055 |
| 145270 | CEFBS_None, // BTC32ri8 = 1056 |
| 145271 | CEFBS_None, // BTC32rr = 1057 |
| 145272 | CEFBS_In64BitMode, // BTC64mi8 = 1058 |
| 145273 | CEFBS_None, // BTC64mr = 1059 |
| 145274 | CEFBS_None, // BTC64ri8 = 1060 |
| 145275 | CEFBS_None, // BTC64rr = 1061 |
| 145276 | CEFBS_None, // BTR16mi8 = 1062 |
| 145277 | CEFBS_None, // BTR16mr = 1063 |
| 145278 | CEFBS_None, // BTR16ri8 = 1064 |
| 145279 | CEFBS_None, // BTR16rr = 1065 |
| 145280 | CEFBS_None, // BTR32mi8 = 1066 |
| 145281 | CEFBS_None, // BTR32mr = 1067 |
| 145282 | CEFBS_None, // BTR32ri8 = 1068 |
| 145283 | CEFBS_None, // BTR32rr = 1069 |
| 145284 | CEFBS_In64BitMode, // BTR64mi8 = 1070 |
| 145285 | CEFBS_None, // BTR64mr = 1071 |
| 145286 | CEFBS_None, // BTR64ri8 = 1072 |
| 145287 | CEFBS_None, // BTR64rr = 1073 |
| 145288 | CEFBS_None, // BTS16mi8 = 1074 |
| 145289 | CEFBS_None, // BTS16mr = 1075 |
| 145290 | CEFBS_None, // BTS16ri8 = 1076 |
| 145291 | CEFBS_None, // BTS16rr = 1077 |
| 145292 | CEFBS_None, // BTS32mi8 = 1078 |
| 145293 | CEFBS_None, // BTS32mr = 1079 |
| 145294 | CEFBS_None, // BTS32ri8 = 1080 |
| 145295 | CEFBS_None, // BTS32rr = 1081 |
| 145296 | CEFBS_In64BitMode, // BTS64mi8 = 1082 |
| 145297 | CEFBS_None, // BTS64mr = 1083 |
| 145298 | CEFBS_None, // BTS64ri8 = 1084 |
| 145299 | CEFBS_None, // BTS64rr = 1085 |
| 145300 | CEFBS_None, // BZHI32rm = 1086 |
| 145301 | CEFBS_In64BitMode, // BZHI32rm_EVEX = 1087 |
| 145302 | CEFBS_In64BitMode, // BZHI32rm_NF = 1088 |
| 145303 | CEFBS_None, // BZHI32rr = 1089 |
| 145304 | CEFBS_In64BitMode, // BZHI32rr_EVEX = 1090 |
| 145305 | CEFBS_In64BitMode, // BZHI32rr_NF = 1091 |
| 145306 | CEFBS_None, // BZHI64rm = 1092 |
| 145307 | CEFBS_In64BitMode, // BZHI64rm_EVEX = 1093 |
| 145308 | CEFBS_In64BitMode, // BZHI64rm_NF = 1094 |
| 145309 | CEFBS_None, // BZHI64rr = 1095 |
| 145310 | CEFBS_In64BitMode, // BZHI64rr_EVEX = 1096 |
| 145311 | CEFBS_In64BitMode, // BZHI64rr_NF = 1097 |
| 145312 | CEFBS_Not64BitMode, // CALL16m = 1098 |
| 145313 | CEFBS_Not64BitMode, // CALL16m_NT = 1099 |
| 145314 | CEFBS_Not64BitMode, // CALL16r = 1100 |
| 145315 | CEFBS_Not64BitMode, // CALL16r_NT = 1101 |
| 145316 | CEFBS_Not64BitMode, // CALL32m = 1102 |
| 145317 | CEFBS_Not64BitMode, // CALL32m_NT = 1103 |
| 145318 | CEFBS_Not64BitMode, // CALL32r = 1104 |
| 145319 | CEFBS_Not64BitMode, // CALL32r_NT = 1105 |
| 145320 | CEFBS_In64BitMode, // CALL64m = 1106 |
| 145321 | CEFBS_In64BitMode, // CALL64m_NT = 1107 |
| 145322 | CEFBS_In64BitMode, // CALL64pcrel32 = 1108 |
| 145323 | CEFBS_In64BitMode, // CALL64r = 1109 |
| 145324 | CEFBS_In64BitMode, // CALL64r_NT = 1110 |
| 145325 | CEFBS_Not64BitMode, // CALLpcrel16 = 1111 |
| 145326 | CEFBS_Not64BitMode, // CALLpcrel32 = 1112 |
| 145327 | CEFBS_None, // CATCHRET = 1113 |
| 145328 | CEFBS_None, // CBW = 1114 |
| 145329 | CEFBS_In64BitMode, // CCMP16mi = 1115 |
| 145330 | CEFBS_In64BitMode, // CCMP16mi8 = 1116 |
| 145331 | CEFBS_In64BitMode, // CCMP16mr = 1117 |
| 145332 | CEFBS_In64BitMode, // CCMP16ri = 1118 |
| 145333 | CEFBS_In64BitMode, // CCMP16ri8 = 1119 |
| 145334 | CEFBS_In64BitMode, // CCMP16rm = 1120 |
| 145335 | CEFBS_In64BitMode, // CCMP16rr = 1121 |
| 145336 | CEFBS_In64BitMode, // CCMP16rr_REV = 1122 |
| 145337 | CEFBS_In64BitMode, // CCMP32mi = 1123 |
| 145338 | CEFBS_In64BitMode, // CCMP32mi8 = 1124 |
| 145339 | CEFBS_In64BitMode, // CCMP32mr = 1125 |
| 145340 | CEFBS_In64BitMode, // CCMP32ri = 1126 |
| 145341 | CEFBS_In64BitMode, // CCMP32ri8 = 1127 |
| 145342 | CEFBS_In64BitMode, // CCMP32rm = 1128 |
| 145343 | CEFBS_In64BitMode, // CCMP32rr = 1129 |
| 145344 | CEFBS_In64BitMode, // CCMP32rr_REV = 1130 |
| 145345 | CEFBS_In64BitMode, // CCMP64mi32 = 1131 |
| 145346 | CEFBS_In64BitMode, // CCMP64mi8 = 1132 |
| 145347 | CEFBS_In64BitMode, // CCMP64mr = 1133 |
| 145348 | CEFBS_In64BitMode, // CCMP64ri32 = 1134 |
| 145349 | CEFBS_In64BitMode, // CCMP64ri8 = 1135 |
| 145350 | CEFBS_In64BitMode, // CCMP64rm = 1136 |
| 145351 | CEFBS_In64BitMode, // CCMP64rr = 1137 |
| 145352 | CEFBS_In64BitMode, // CCMP64rr_REV = 1138 |
| 145353 | CEFBS_In64BitMode, // CCMP8mi = 1139 |
| 145354 | CEFBS_In64BitMode, // CCMP8mr = 1140 |
| 145355 | CEFBS_In64BitMode, // CCMP8ri = 1141 |
| 145356 | CEFBS_In64BitMode, // CCMP8rm = 1142 |
| 145357 | CEFBS_In64BitMode, // CCMP8rr = 1143 |
| 145358 | CEFBS_In64BitMode, // CCMP8rr_REV = 1144 |
| 145359 | CEFBS_None, // CDQ = 1145 |
| 145360 | CEFBS_In64BitMode, // CDQE = 1146 |
| 145361 | CEFBS_In64BitMode, // CFCMOV16mr = 1147 |
| 145362 | CEFBS_In64BitMode, // CFCMOV16rm = 1148 |
| 145363 | CEFBS_In64BitMode, // CFCMOV16rm_ND = 1149 |
| 145364 | CEFBS_In64BitMode, // CFCMOV16rr = 1150 |
| 145365 | CEFBS_In64BitMode, // CFCMOV16rr_ND = 1151 |
| 145366 | CEFBS_In64BitMode, // CFCMOV16rr_REV = 1152 |
| 145367 | CEFBS_In64BitMode, // CFCMOV32mr = 1153 |
| 145368 | CEFBS_In64BitMode, // CFCMOV32rm = 1154 |
| 145369 | CEFBS_In64BitMode, // CFCMOV32rm_ND = 1155 |
| 145370 | CEFBS_In64BitMode, // CFCMOV32rr = 1156 |
| 145371 | CEFBS_In64BitMode, // CFCMOV32rr_ND = 1157 |
| 145372 | CEFBS_In64BitMode, // CFCMOV32rr_REV = 1158 |
| 145373 | CEFBS_In64BitMode, // CFCMOV64mr = 1159 |
| 145374 | CEFBS_In64BitMode, // CFCMOV64rm = 1160 |
| 145375 | CEFBS_In64BitMode, // CFCMOV64rm_ND = 1161 |
| 145376 | CEFBS_In64BitMode, // CFCMOV64rr = 1162 |
| 145377 | CEFBS_In64BitMode, // CFCMOV64rr_ND = 1163 |
| 145378 | CEFBS_In64BitMode, // CFCMOV64rr_REV = 1164 |
| 145379 | CEFBS_None, // CHS_F = 1165 |
| 145380 | CEFBS_None, // CHS_Fp32 = 1166 |
| 145381 | CEFBS_None, // CHS_Fp64 = 1167 |
| 145382 | CEFBS_None, // CHS_Fp80 = 1168 |
| 145383 | CEFBS_None, // CLAC = 1169 |
| 145384 | CEFBS_None, // CLC = 1170 |
| 145385 | CEFBS_None, // CLD = 1171 |
| 145386 | CEFBS_None, // CLDEMOTE = 1172 |
| 145387 | CEFBS_None, // CLEANUPRET = 1173 |
| 145388 | CEFBS_None, // CLFLUSH = 1174 |
| 145389 | CEFBS_None, // CLFLUSHOPT = 1175 |
| 145390 | CEFBS_None, // CLGI = 1176 |
| 145391 | CEFBS_None, // CLI = 1177 |
| 145392 | CEFBS_None, // CLRSSBSY = 1178 |
| 145393 | CEFBS_None, // CLTS = 1179 |
| 145394 | CEFBS_In64BitMode, // CLUI = 1180 |
| 145395 | CEFBS_None, // CLWB = 1181 |
| 145396 | CEFBS_Not64BitMode, // CLZERO32r = 1182 |
| 145397 | CEFBS_In64BitMode, // CLZERO64r = 1183 |
| 145398 | CEFBS_None, // CMC = 1184 |
| 145399 | CEFBS_None, // CMOV16rm = 1185 |
| 145400 | CEFBS_In64BitMode, // CMOV16rm_ND = 1186 |
| 145401 | CEFBS_None, // CMOV16rr = 1187 |
| 145402 | CEFBS_In64BitMode, // CMOV16rr_ND = 1188 |
| 145403 | CEFBS_None, // CMOV32rm = 1189 |
| 145404 | CEFBS_In64BitMode, // CMOV32rm_ND = 1190 |
| 145405 | CEFBS_None, // CMOV32rr = 1191 |
| 145406 | CEFBS_In64BitMode, // CMOV32rr_ND = 1192 |
| 145407 | CEFBS_None, // CMOV64rm = 1193 |
| 145408 | CEFBS_In64BitMode, // CMOV64rm_ND = 1194 |
| 145409 | CEFBS_None, // CMOV64rr = 1195 |
| 145410 | CEFBS_In64BitMode, // CMOV64rr_ND = 1196 |
| 145411 | CEFBS_None, // CMOVBE_F = 1197 |
| 145412 | CEFBS_None, // CMOVBE_Fp32 = 1198 |
| 145413 | CEFBS_None, // CMOVBE_Fp64 = 1199 |
| 145414 | CEFBS_None, // CMOVBE_Fp80 = 1200 |
| 145415 | CEFBS_None, // CMOVB_F = 1201 |
| 145416 | CEFBS_None, // CMOVB_Fp32 = 1202 |
| 145417 | CEFBS_None, // CMOVB_Fp64 = 1203 |
| 145418 | CEFBS_None, // CMOVB_Fp80 = 1204 |
| 145419 | CEFBS_None, // CMOVE_F = 1205 |
| 145420 | CEFBS_None, // CMOVE_Fp32 = 1206 |
| 145421 | CEFBS_None, // CMOVE_Fp64 = 1207 |
| 145422 | CEFBS_None, // CMOVE_Fp80 = 1208 |
| 145423 | CEFBS_None, // CMOVNBE_F = 1209 |
| 145424 | CEFBS_None, // CMOVNBE_Fp32 = 1210 |
| 145425 | CEFBS_None, // CMOVNBE_Fp64 = 1211 |
| 145426 | CEFBS_None, // CMOVNBE_Fp80 = 1212 |
| 145427 | CEFBS_None, // CMOVNB_F = 1213 |
| 145428 | CEFBS_None, // CMOVNB_Fp32 = 1214 |
| 145429 | CEFBS_None, // CMOVNB_Fp64 = 1215 |
| 145430 | CEFBS_None, // CMOVNB_Fp80 = 1216 |
| 145431 | CEFBS_None, // CMOVNE_F = 1217 |
| 145432 | CEFBS_None, // CMOVNE_Fp32 = 1218 |
| 145433 | CEFBS_None, // CMOVNE_Fp64 = 1219 |
| 145434 | CEFBS_None, // CMOVNE_Fp80 = 1220 |
| 145435 | CEFBS_None, // CMOVNP_F = 1221 |
| 145436 | CEFBS_None, // CMOVNP_Fp32 = 1222 |
| 145437 | CEFBS_None, // CMOVNP_Fp64 = 1223 |
| 145438 | CEFBS_None, // CMOVNP_Fp80 = 1224 |
| 145439 | CEFBS_None, // CMOVP_F = 1225 |
| 145440 | CEFBS_None, // CMOVP_Fp32 = 1226 |
| 145441 | CEFBS_None, // CMOVP_Fp64 = 1227 |
| 145442 | CEFBS_None, // CMOVP_Fp80 = 1228 |
| 145443 | CEFBS_None, // CMOV_FR16 = 1229 |
| 145444 | CEFBS_None, // CMOV_FR16X = 1230 |
| 145445 | CEFBS_None, // CMOV_FR32 = 1231 |
| 145446 | CEFBS_None, // CMOV_FR32X = 1232 |
| 145447 | CEFBS_None, // CMOV_FR64 = 1233 |
| 145448 | CEFBS_None, // CMOV_FR64X = 1234 |
| 145449 | CEFBS_None, // CMOV_GR16 = 1235 |
| 145450 | CEFBS_None, // CMOV_GR32 = 1236 |
| 145451 | CEFBS_None, // CMOV_GR8 = 1237 |
| 145452 | CEFBS_None, // CMOV_RFP32 = 1238 |
| 145453 | CEFBS_None, // CMOV_RFP64 = 1239 |
| 145454 | CEFBS_None, // CMOV_RFP80 = 1240 |
| 145455 | CEFBS_None, // CMOV_VK1 = 1241 |
| 145456 | CEFBS_None, // CMOV_VK16 = 1242 |
| 145457 | CEFBS_None, // CMOV_VK2 = 1243 |
| 145458 | CEFBS_None, // CMOV_VK32 = 1244 |
| 145459 | CEFBS_None, // CMOV_VK4 = 1245 |
| 145460 | CEFBS_None, // CMOV_VK64 = 1246 |
| 145461 | CEFBS_None, // CMOV_VK8 = 1247 |
| 145462 | CEFBS_None, // CMOV_VR128 = 1248 |
| 145463 | CEFBS_None, // CMOV_VR128X = 1249 |
| 145464 | CEFBS_None, // CMOV_VR256 = 1250 |
| 145465 | CEFBS_None, // CMOV_VR256X = 1251 |
| 145466 | CEFBS_None, // CMOV_VR512 = 1252 |
| 145467 | CEFBS_None, // CMOV_VR64 = 1253 |
| 145468 | CEFBS_None, // CMP16i16 = 1254 |
| 145469 | CEFBS_None, // CMP16mi = 1255 |
| 145470 | CEFBS_None, // CMP16mi8 = 1256 |
| 145471 | CEFBS_None, // CMP16mr = 1257 |
| 145472 | CEFBS_None, // CMP16ri = 1258 |
| 145473 | CEFBS_None, // CMP16ri8 = 1259 |
| 145474 | CEFBS_None, // CMP16rm = 1260 |
| 145475 | CEFBS_None, // CMP16rr = 1261 |
| 145476 | CEFBS_None, // CMP16rr_REV = 1262 |
| 145477 | CEFBS_None, // CMP32i32 = 1263 |
| 145478 | CEFBS_None, // CMP32mi = 1264 |
| 145479 | CEFBS_None, // CMP32mi8 = 1265 |
| 145480 | CEFBS_None, // CMP32mr = 1266 |
| 145481 | CEFBS_None, // CMP32ri = 1267 |
| 145482 | CEFBS_None, // CMP32ri8 = 1268 |
| 145483 | CEFBS_None, // CMP32rm = 1269 |
| 145484 | CEFBS_None, // CMP32rr = 1270 |
| 145485 | CEFBS_None, // CMP32rr_REV = 1271 |
| 145486 | CEFBS_None, // CMP64i32 = 1272 |
| 145487 | CEFBS_In64BitMode, // CMP64mi32 = 1273 |
| 145488 | CEFBS_In64BitMode, // CMP64mi8 = 1274 |
| 145489 | CEFBS_None, // CMP64mr = 1275 |
| 145490 | CEFBS_None, // CMP64ri32 = 1276 |
| 145491 | CEFBS_None, // CMP64ri8 = 1277 |
| 145492 | CEFBS_None, // CMP64rm = 1278 |
| 145493 | CEFBS_None, // CMP64rr = 1279 |
| 145494 | CEFBS_None, // CMP64rr_REV = 1280 |
| 145495 | CEFBS_None, // CMP8i8 = 1281 |
| 145496 | CEFBS_None, // CMP8mi = 1282 |
| 145497 | CEFBS_Not64BitMode, // CMP8mi8 = 1283 |
| 145498 | CEFBS_None, // CMP8mr = 1284 |
| 145499 | CEFBS_None, // CMP8ri = 1285 |
| 145500 | CEFBS_Not64BitMode, // CMP8ri8 = 1286 |
| 145501 | CEFBS_None, // CMP8rm = 1287 |
| 145502 | CEFBS_None, // CMP8rr = 1288 |
| 145503 | CEFBS_None, // CMP8rr_REV = 1289 |
| 145504 | CEFBS_In64BitMode, // CMPCCXADDmr32 = 1290 |
| 145505 | CEFBS_In64BitMode, // CMPCCXADDmr32_EVEX = 1291 |
| 145506 | CEFBS_In64BitMode, // CMPCCXADDmr64 = 1292 |
| 145507 | CEFBS_In64BitMode, // CMPCCXADDmr64_EVEX = 1293 |
| 145508 | CEFBS_None, // CMPPDrmi = 1294 |
| 145509 | CEFBS_None, // CMPPDrri = 1295 |
| 145510 | CEFBS_None, // CMPPSrmi = 1296 |
| 145511 | CEFBS_None, // CMPPSrri = 1297 |
| 145512 | CEFBS_None, // CMPSB = 1298 |
| 145513 | CEFBS_None, // CMPSDrmi = 1299 |
| 145514 | CEFBS_None, // CMPSDrmi_Int = 1300 |
| 145515 | CEFBS_None, // CMPSDrri = 1301 |
| 145516 | CEFBS_None, // CMPSDrri_Int = 1302 |
| 145517 | CEFBS_None, // CMPSL = 1303 |
| 145518 | CEFBS_In64BitMode, // CMPSQ = 1304 |
| 145519 | CEFBS_None, // CMPSSrmi = 1305 |
| 145520 | CEFBS_None, // CMPSSrmi_Int = 1306 |
| 145521 | CEFBS_None, // CMPSSrri = 1307 |
| 145522 | CEFBS_None, // CMPSSrri_Int = 1308 |
| 145523 | CEFBS_None, // CMPSW = 1309 |
| 145524 | CEFBS_In64BitMode, // CMPXCHG16B = 1310 |
| 145525 | CEFBS_None, // CMPXCHG16rm = 1311 |
| 145526 | CEFBS_None, // CMPXCHG16rr = 1312 |
| 145527 | CEFBS_None, // CMPXCHG32rm = 1313 |
| 145528 | CEFBS_None, // CMPXCHG32rr = 1314 |
| 145529 | CEFBS_None, // CMPXCHG64rm = 1315 |
| 145530 | CEFBS_None, // CMPXCHG64rr = 1316 |
| 145531 | CEFBS_None, // CMPXCHG8B = 1317 |
| 145532 | CEFBS_None, // CMPXCHG8rm = 1318 |
| 145533 | CEFBS_None, // CMPXCHG8rr = 1319 |
| 145534 | CEFBS_None, // COMISDrm = 1320 |
| 145535 | CEFBS_None, // COMISDrm_Int = 1321 |
| 145536 | CEFBS_None, // COMISDrr = 1322 |
| 145537 | CEFBS_None, // COMISDrr_Int = 1323 |
| 145538 | CEFBS_None, // COMISSrm = 1324 |
| 145539 | CEFBS_None, // COMISSrm_Int = 1325 |
| 145540 | CEFBS_None, // COMISSrr = 1326 |
| 145541 | CEFBS_None, // COMISSrr_Int = 1327 |
| 145542 | CEFBS_None, // COMP_FST0r = 1328 |
| 145543 | CEFBS_None, // COM_FIPr = 1329 |
| 145544 | CEFBS_None, // COM_FIr = 1330 |
| 145545 | CEFBS_None, // COM_FST0r = 1331 |
| 145546 | CEFBS_None, // COM_FpIr32 = 1332 |
| 145547 | CEFBS_None, // COM_FpIr64 = 1333 |
| 145548 | CEFBS_None, // COM_FpIr80 = 1334 |
| 145549 | CEFBS_None, // COM_Fpr32 = 1335 |
| 145550 | CEFBS_None, // COM_Fpr64 = 1336 |
| 145551 | CEFBS_None, // COM_Fpr80 = 1337 |
| 145552 | CEFBS_None, // CPUID = 1338 |
| 145553 | CEFBS_In64BitMode, // CQO = 1339 |
| 145554 | CEFBS_None, // CRC32r32m16 = 1340 |
| 145555 | CEFBS_In64BitMode, // CRC32r32m16_EVEX = 1341 |
| 145556 | CEFBS_None, // CRC32r32m32 = 1342 |
| 145557 | CEFBS_In64BitMode, // CRC32r32m32_EVEX = 1343 |
| 145558 | CEFBS_None, // CRC32r32m8 = 1344 |
| 145559 | CEFBS_In64BitMode, // CRC32r32m8_EVEX = 1345 |
| 145560 | CEFBS_None, // CRC32r32r16 = 1346 |
| 145561 | CEFBS_In64BitMode, // CRC32r32r16_EVEX = 1347 |
| 145562 | CEFBS_None, // CRC32r32r32 = 1348 |
| 145563 | CEFBS_In64BitMode, // CRC32r32r32_EVEX = 1349 |
| 145564 | CEFBS_None, // CRC32r32r8 = 1350 |
| 145565 | CEFBS_In64BitMode, // CRC32r32r8_EVEX = 1351 |
| 145566 | CEFBS_None, // CRC32r64m64 = 1352 |
| 145567 | CEFBS_In64BitMode, // CRC32r64m64_EVEX = 1353 |
| 145568 | CEFBS_None, // CRC32r64m8 = 1354 |
| 145569 | CEFBS_In64BitMode, // CRC32r64m8_EVEX = 1355 |
| 145570 | CEFBS_None, // CRC32r64r64 = 1356 |
| 145571 | CEFBS_In64BitMode, // CRC32r64r64_EVEX = 1357 |
| 145572 | CEFBS_None, // CRC32r64r8 = 1358 |
| 145573 | CEFBS_In64BitMode, // CRC32r64r8_EVEX = 1359 |
| 145574 | CEFBS_None, // CS_PREFIX = 1360 |
| 145575 | CEFBS_In64BitMode, // CTEST16mi = 1361 |
| 145576 | CEFBS_In64BitMode, // CTEST16mr = 1362 |
| 145577 | CEFBS_In64BitMode, // CTEST16ri = 1363 |
| 145578 | CEFBS_In64BitMode, // CTEST16rr = 1364 |
| 145579 | CEFBS_In64BitMode, // CTEST32mi = 1365 |
| 145580 | CEFBS_In64BitMode, // CTEST32mr = 1366 |
| 145581 | CEFBS_In64BitMode, // CTEST32ri = 1367 |
| 145582 | CEFBS_In64BitMode, // CTEST32rr = 1368 |
| 145583 | CEFBS_In64BitMode, // CTEST64mi32 = 1369 |
| 145584 | CEFBS_In64BitMode, // CTEST64mr = 1370 |
| 145585 | CEFBS_In64BitMode, // CTEST64ri32 = 1371 |
| 145586 | CEFBS_In64BitMode, // CTEST64rr = 1372 |
| 145587 | CEFBS_In64BitMode, // CTEST8mi = 1373 |
| 145588 | CEFBS_In64BitMode, // CTEST8mr = 1374 |
| 145589 | CEFBS_In64BitMode, // CTEST8ri = 1375 |
| 145590 | CEFBS_In64BitMode, // CTEST8rr = 1376 |
| 145591 | CEFBS_None, // CVTDQ2PDrm = 1377 |
| 145592 | CEFBS_None, // CVTDQ2PDrr = 1378 |
| 145593 | CEFBS_None, // CVTDQ2PSrm = 1379 |
| 145594 | CEFBS_None, // CVTDQ2PSrr = 1380 |
| 145595 | CEFBS_None, // CVTPD2DQrm = 1381 |
| 145596 | CEFBS_None, // CVTPD2DQrr = 1382 |
| 145597 | CEFBS_None, // CVTPD2PSrm = 1383 |
| 145598 | CEFBS_None, // CVTPD2PSrr = 1384 |
| 145599 | CEFBS_None, // CVTPS2DQrm = 1385 |
| 145600 | CEFBS_None, // CVTPS2DQrr = 1386 |
| 145601 | CEFBS_None, // CVTPS2PDrm = 1387 |
| 145602 | CEFBS_None, // CVTPS2PDrr = 1388 |
| 145603 | CEFBS_None, // CVTSD2SI64rm = 1389 |
| 145604 | CEFBS_None, // CVTSD2SI64rm_Int = 1390 |
| 145605 | CEFBS_None, // CVTSD2SI64rr = 1391 |
| 145606 | CEFBS_None, // CVTSD2SI64rr_Int = 1392 |
| 145607 | CEFBS_None, // CVTSD2SIrm = 1393 |
| 145608 | CEFBS_None, // CVTSD2SIrm_Int = 1394 |
| 145609 | CEFBS_None, // CVTSD2SIrr = 1395 |
| 145610 | CEFBS_None, // CVTSD2SIrr_Int = 1396 |
| 145611 | CEFBS_None, // CVTSD2SSrm = 1397 |
| 145612 | CEFBS_None, // CVTSD2SSrm_Int = 1398 |
| 145613 | CEFBS_None, // CVTSD2SSrr = 1399 |
| 145614 | CEFBS_None, // CVTSD2SSrr_Int = 1400 |
| 145615 | CEFBS_None, // CVTSI2SDrm = 1401 |
| 145616 | CEFBS_None, // CVTSI2SDrm_Int = 1402 |
| 145617 | CEFBS_None, // CVTSI2SDrr = 1403 |
| 145618 | CEFBS_None, // CVTSI2SDrr_Int = 1404 |
| 145619 | CEFBS_None, // CVTSI2SSrm = 1405 |
| 145620 | CEFBS_None, // CVTSI2SSrm_Int = 1406 |
| 145621 | CEFBS_None, // CVTSI2SSrr = 1407 |
| 145622 | CEFBS_None, // CVTSI2SSrr_Int = 1408 |
| 145623 | CEFBS_None, // CVTSI642SDrm = 1409 |
| 145624 | CEFBS_None, // CVTSI642SDrm_Int = 1410 |
| 145625 | CEFBS_None, // CVTSI642SDrr = 1411 |
| 145626 | CEFBS_None, // CVTSI642SDrr_Int = 1412 |
| 145627 | CEFBS_None, // CVTSI642SSrm = 1413 |
| 145628 | CEFBS_None, // CVTSI642SSrm_Int = 1414 |
| 145629 | CEFBS_None, // CVTSI642SSrr = 1415 |
| 145630 | CEFBS_None, // CVTSI642SSrr_Int = 1416 |
| 145631 | CEFBS_None, // CVTSS2SDrm = 1417 |
| 145632 | CEFBS_None, // CVTSS2SDrm_Int = 1418 |
| 145633 | CEFBS_None, // CVTSS2SDrr = 1419 |
| 145634 | CEFBS_None, // CVTSS2SDrr_Int = 1420 |
| 145635 | CEFBS_None, // CVTSS2SI64rm = 1421 |
| 145636 | CEFBS_None, // CVTSS2SI64rm_Int = 1422 |
| 145637 | CEFBS_None, // CVTSS2SI64rr = 1423 |
| 145638 | CEFBS_None, // CVTSS2SI64rr_Int = 1424 |
| 145639 | CEFBS_None, // CVTSS2SIrm = 1425 |
| 145640 | CEFBS_None, // CVTSS2SIrm_Int = 1426 |
| 145641 | CEFBS_None, // CVTSS2SIrr = 1427 |
| 145642 | CEFBS_None, // CVTSS2SIrr_Int = 1428 |
| 145643 | CEFBS_None, // CVTTPD2DQrm = 1429 |
| 145644 | CEFBS_None, // CVTTPD2DQrr = 1430 |
| 145645 | CEFBS_None, // CVTTPS2DQrm = 1431 |
| 145646 | CEFBS_None, // CVTTPS2DQrr = 1432 |
| 145647 | CEFBS_None, // CVTTSD2SI64rm = 1433 |
| 145648 | CEFBS_None, // CVTTSD2SI64rm_Int = 1434 |
| 145649 | CEFBS_None, // CVTTSD2SI64rr = 1435 |
| 145650 | CEFBS_None, // CVTTSD2SI64rr_Int = 1436 |
| 145651 | CEFBS_None, // CVTTSD2SIrm = 1437 |
| 145652 | CEFBS_None, // CVTTSD2SIrm_Int = 1438 |
| 145653 | CEFBS_None, // CVTTSD2SIrr = 1439 |
| 145654 | CEFBS_None, // CVTTSD2SIrr_Int = 1440 |
| 145655 | CEFBS_None, // CVTTSS2SI64rm = 1441 |
| 145656 | CEFBS_None, // CVTTSS2SI64rm_Int = 1442 |
| 145657 | CEFBS_None, // CVTTSS2SI64rr = 1443 |
| 145658 | CEFBS_None, // CVTTSS2SI64rr_Int = 1444 |
| 145659 | CEFBS_None, // CVTTSS2SIrm = 1445 |
| 145660 | CEFBS_None, // CVTTSS2SIrm_Int = 1446 |
| 145661 | CEFBS_None, // CVTTSS2SIrr = 1447 |
| 145662 | CEFBS_None, // CVTTSS2SIrr_Int = 1448 |
| 145663 | CEFBS_None, // CWD = 1449 |
| 145664 | CEFBS_None, // CWDE = 1450 |
| 145665 | CEFBS_Not64BitMode, // DAA = 1451 |
| 145666 | CEFBS_Not64BitMode, // DAS = 1452 |
| 145667 | CEFBS_None, // DATA16_PREFIX = 1453 |
| 145668 | CEFBS_None, // DEC16m = 1454 |
| 145669 | CEFBS_In64BitMode, // DEC16m_EVEX = 1455 |
| 145670 | CEFBS_In64BitMode, // DEC16m_ND = 1456 |
| 145671 | CEFBS_In64BitMode, // DEC16m_NF = 1457 |
| 145672 | CEFBS_In64BitMode, // DEC16m_NF_ND = 1458 |
| 145673 | CEFBS_None, // DEC16r = 1459 |
| 145674 | CEFBS_In64BitMode, // DEC16r_EVEX = 1460 |
| 145675 | CEFBS_In64BitMode, // DEC16r_ND = 1461 |
| 145676 | CEFBS_In64BitMode, // DEC16r_NF = 1462 |
| 145677 | CEFBS_In64BitMode, // DEC16r_NF_ND = 1463 |
| 145678 | CEFBS_Not64BitMode, // DEC16r_alt = 1464 |
| 145679 | CEFBS_None, // DEC32m = 1465 |
| 145680 | CEFBS_In64BitMode, // DEC32m_EVEX = 1466 |
| 145681 | CEFBS_In64BitMode, // DEC32m_ND = 1467 |
| 145682 | CEFBS_In64BitMode, // DEC32m_NF = 1468 |
| 145683 | CEFBS_In64BitMode, // DEC32m_NF_ND = 1469 |
| 145684 | CEFBS_None, // DEC32r = 1470 |
| 145685 | CEFBS_In64BitMode, // DEC32r_EVEX = 1471 |
| 145686 | CEFBS_In64BitMode, // DEC32r_ND = 1472 |
| 145687 | CEFBS_In64BitMode, // DEC32r_NF = 1473 |
| 145688 | CEFBS_In64BitMode, // DEC32r_NF_ND = 1474 |
| 145689 | CEFBS_Not64BitMode, // DEC32r_alt = 1475 |
| 145690 | CEFBS_In64BitMode, // DEC64m = 1476 |
| 145691 | CEFBS_In64BitMode, // DEC64m_EVEX = 1477 |
| 145692 | CEFBS_In64BitMode, // DEC64m_ND = 1478 |
| 145693 | CEFBS_In64BitMode, // DEC64m_NF = 1479 |
| 145694 | CEFBS_In64BitMode, // DEC64m_NF_ND = 1480 |
| 145695 | CEFBS_None, // DEC64r = 1481 |
| 145696 | CEFBS_In64BitMode, // DEC64r_EVEX = 1482 |
| 145697 | CEFBS_In64BitMode, // DEC64r_ND = 1483 |
| 145698 | CEFBS_In64BitMode, // DEC64r_NF = 1484 |
| 145699 | CEFBS_In64BitMode, // DEC64r_NF_ND = 1485 |
| 145700 | CEFBS_None, // DEC8m = 1486 |
| 145701 | CEFBS_In64BitMode, // DEC8m_EVEX = 1487 |
| 145702 | CEFBS_In64BitMode, // DEC8m_ND = 1488 |
| 145703 | CEFBS_In64BitMode, // DEC8m_NF = 1489 |
| 145704 | CEFBS_In64BitMode, // DEC8m_NF_ND = 1490 |
| 145705 | CEFBS_None, // DEC8r = 1491 |
| 145706 | CEFBS_In64BitMode, // DEC8r_EVEX = 1492 |
| 145707 | CEFBS_In64BitMode, // DEC8r_ND = 1493 |
| 145708 | CEFBS_In64BitMode, // DEC8r_NF = 1494 |
| 145709 | CEFBS_In64BitMode, // DEC8r_NF_ND = 1495 |
| 145710 | CEFBS_None, // DIV16m = 1496 |
| 145711 | CEFBS_In64BitMode, // DIV16m_EVEX = 1497 |
| 145712 | CEFBS_In64BitMode, // DIV16m_NF = 1498 |
| 145713 | CEFBS_None, // DIV16r = 1499 |
| 145714 | CEFBS_In64BitMode, // DIV16r_EVEX = 1500 |
| 145715 | CEFBS_In64BitMode, // DIV16r_NF = 1501 |
| 145716 | CEFBS_None, // DIV32m = 1502 |
| 145717 | CEFBS_In64BitMode, // DIV32m_EVEX = 1503 |
| 145718 | CEFBS_In64BitMode, // DIV32m_NF = 1504 |
| 145719 | CEFBS_None, // DIV32r = 1505 |
| 145720 | CEFBS_In64BitMode, // DIV32r_EVEX = 1506 |
| 145721 | CEFBS_In64BitMode, // DIV32r_NF = 1507 |
| 145722 | CEFBS_In64BitMode, // DIV64m = 1508 |
| 145723 | CEFBS_In64BitMode, // DIV64m_EVEX = 1509 |
| 145724 | CEFBS_In64BitMode, // DIV64m_NF = 1510 |
| 145725 | CEFBS_None, // DIV64r = 1511 |
| 145726 | CEFBS_In64BitMode, // DIV64r_EVEX = 1512 |
| 145727 | CEFBS_In64BitMode, // DIV64r_NF = 1513 |
| 145728 | CEFBS_None, // DIV8m = 1514 |
| 145729 | CEFBS_In64BitMode, // DIV8m_EVEX = 1515 |
| 145730 | CEFBS_In64BitMode, // DIV8m_NF = 1516 |
| 145731 | CEFBS_None, // DIV8r = 1517 |
| 145732 | CEFBS_In64BitMode, // DIV8r_EVEX = 1518 |
| 145733 | CEFBS_In64BitMode, // DIV8r_NF = 1519 |
| 145734 | CEFBS_None, // DIVPDrm = 1520 |
| 145735 | CEFBS_None, // DIVPDrr = 1521 |
| 145736 | CEFBS_None, // DIVPSrm = 1522 |
| 145737 | CEFBS_None, // DIVPSrr = 1523 |
| 145738 | CEFBS_None, // DIVR_F32m = 1524 |
| 145739 | CEFBS_None, // DIVR_F64m = 1525 |
| 145740 | CEFBS_None, // DIVR_FI16m = 1526 |
| 145741 | CEFBS_None, // DIVR_FI32m = 1527 |
| 145742 | CEFBS_None, // DIVR_FPrST0 = 1528 |
| 145743 | CEFBS_None, // DIVR_FST0r = 1529 |
| 145744 | CEFBS_None, // DIVR_Fp32m = 1530 |
| 145745 | CEFBS_None, // DIVR_Fp64m = 1531 |
| 145746 | CEFBS_None, // DIVR_Fp64m32 = 1532 |
| 145747 | CEFBS_None, // DIVR_Fp80m32 = 1533 |
| 145748 | CEFBS_None, // DIVR_Fp80m64 = 1534 |
| 145749 | CEFBS_None, // DIVR_FpI16m32 = 1535 |
| 145750 | CEFBS_None, // DIVR_FpI16m64 = 1536 |
| 145751 | CEFBS_None, // DIVR_FpI16m80 = 1537 |
| 145752 | CEFBS_None, // DIVR_FpI32m32 = 1538 |
| 145753 | CEFBS_None, // DIVR_FpI32m64 = 1539 |
| 145754 | CEFBS_None, // DIVR_FpI32m80 = 1540 |
| 145755 | CEFBS_None, // DIVR_FrST0 = 1541 |
| 145756 | CEFBS_None, // DIVSDrm = 1542 |
| 145757 | CEFBS_None, // DIVSDrm_Int = 1543 |
| 145758 | CEFBS_None, // DIVSDrr = 1544 |
| 145759 | CEFBS_None, // DIVSDrr_Int = 1545 |
| 145760 | CEFBS_None, // DIVSSrm = 1546 |
| 145761 | CEFBS_None, // DIVSSrm_Int = 1547 |
| 145762 | CEFBS_None, // DIVSSrr = 1548 |
| 145763 | CEFBS_None, // DIVSSrr_Int = 1549 |
| 145764 | CEFBS_None, // DIV_F32m = 1550 |
| 145765 | CEFBS_None, // DIV_F64m = 1551 |
| 145766 | CEFBS_None, // DIV_FI16m = 1552 |
| 145767 | CEFBS_None, // DIV_FI32m = 1553 |
| 145768 | CEFBS_None, // DIV_FPrST0 = 1554 |
| 145769 | CEFBS_None, // DIV_FST0r = 1555 |
| 145770 | CEFBS_None, // DIV_Fp32 = 1556 |
| 145771 | CEFBS_None, // DIV_Fp32m = 1557 |
| 145772 | CEFBS_None, // DIV_Fp64 = 1558 |
| 145773 | CEFBS_None, // DIV_Fp64m = 1559 |
| 145774 | CEFBS_None, // DIV_Fp64m32 = 1560 |
| 145775 | CEFBS_None, // DIV_Fp80 = 1561 |
| 145776 | CEFBS_None, // DIV_Fp80m32 = 1562 |
| 145777 | CEFBS_None, // DIV_Fp80m64 = 1563 |
| 145778 | CEFBS_None, // DIV_FpI16m32 = 1564 |
| 145779 | CEFBS_None, // DIV_FpI16m64 = 1565 |
| 145780 | CEFBS_None, // DIV_FpI16m80 = 1566 |
| 145781 | CEFBS_None, // DIV_FpI32m32 = 1567 |
| 145782 | CEFBS_None, // DIV_FpI32m64 = 1568 |
| 145783 | CEFBS_None, // DIV_FpI32m80 = 1569 |
| 145784 | CEFBS_None, // DIV_FrST0 = 1570 |
| 145785 | CEFBS_None, // DPPDrmi = 1571 |
| 145786 | CEFBS_None, // DPPDrri = 1572 |
| 145787 | CEFBS_None, // DPPSrmi = 1573 |
| 145788 | CEFBS_None, // DPPSrri = 1574 |
| 145789 | CEFBS_None, // DS_PREFIX = 1575 |
| 145790 | CEFBS_None, // DYN_ALLOCA_32 = 1576 |
| 145791 | CEFBS_In64BitMode, // DYN_ALLOCA_64 = 1577 |
| 145792 | CEFBS_None, // EH_RETURN = 1578 |
| 145793 | CEFBS_None, // EH_RETURN64 = 1579 |
| 145794 | CEFBS_Not64BitMode, // EH_SjLj_LongJmp32 = 1580 |
| 145795 | CEFBS_In64BitMode, // EH_SjLj_LongJmp64 = 1581 |
| 145796 | CEFBS_Not64BitMode, // EH_SjLj_SetJmp32 = 1582 |
| 145797 | CEFBS_In64BitMode, // EH_SjLj_SetJmp64 = 1583 |
| 145798 | CEFBS_None, // EH_SjLj_Setup = 1584 |
| 145799 | CEFBS_None, // ENCLS = 1585 |
| 145800 | CEFBS_None, // ENCLU = 1586 |
| 145801 | CEFBS_None, // ENCLV = 1587 |
| 145802 | CEFBS_None, // ENCODEKEY128 = 1588 |
| 145803 | CEFBS_None, // ENCODEKEY256 = 1589 |
| 145804 | CEFBS_None, // ENDBR32 = 1590 |
| 145805 | CEFBS_None, // ENDBR64 = 1591 |
| 145806 | CEFBS_Not64BitMode, // ENQCMD16 = 1592 |
| 145807 | CEFBS_None, // ENQCMD32 = 1593 |
| 145808 | CEFBS_In64BitMode, // ENQCMD32_EVEX = 1594 |
| 145809 | CEFBS_None, // ENQCMD64 = 1595 |
| 145810 | CEFBS_In64BitMode, // ENQCMD64_EVEX = 1596 |
| 145811 | CEFBS_Not64BitMode, // ENQCMDS16 = 1597 |
| 145812 | CEFBS_None, // ENQCMDS32 = 1598 |
| 145813 | CEFBS_In64BitMode, // ENQCMDS32_EVEX = 1599 |
| 145814 | CEFBS_None, // ENQCMDS64 = 1600 |
| 145815 | CEFBS_In64BitMode, // ENQCMDS64_EVEX = 1601 |
| 145816 | CEFBS_None, // ENTER = 1602 |
| 145817 | CEFBS_In64BitMode, // ERETS = 1603 |
| 145818 | CEFBS_In64BitMode, // ERETU = 1604 |
| 145819 | CEFBS_None, // ES_PREFIX = 1605 |
| 145820 | CEFBS_None, // EXTRACTPSmr = 1606 |
| 145821 | CEFBS_None, // EXTRACTPSrr = 1607 |
| 145822 | CEFBS_None, // EXTRQ = 1608 |
| 145823 | CEFBS_None, // EXTRQI = 1609 |
| 145824 | CEFBS_None, // F2XM1 = 1610 |
| 145825 | CEFBS_Not64BitMode, // FARCALL16i = 1611 |
| 145826 | CEFBS_None, // FARCALL16m = 1612 |
| 145827 | CEFBS_Not64BitMode, // FARCALL32i = 1613 |
| 145828 | CEFBS_None, // FARCALL32m = 1614 |
| 145829 | CEFBS_None, // FARCALL64m = 1615 |
| 145830 | CEFBS_Not64BitMode, // FARJMP16i = 1616 |
| 145831 | CEFBS_None, // FARJMP16m = 1617 |
| 145832 | CEFBS_Not64BitMode, // FARJMP32i = 1618 |
| 145833 | CEFBS_None, // FARJMP32m = 1619 |
| 145834 | CEFBS_In64BitMode, // FARJMP64m = 1620 |
| 145835 | CEFBS_None, // FBLDm = 1621 |
| 145836 | CEFBS_None, // FBSTPm = 1622 |
| 145837 | CEFBS_None, // FCOM32m = 1623 |
| 145838 | CEFBS_None, // FCOM64m = 1624 |
| 145839 | CEFBS_None, // FCOMP32m = 1625 |
| 145840 | CEFBS_None, // FCOMP64m = 1626 |
| 145841 | CEFBS_None, // FCOMPP = 1627 |
| 145842 | CEFBS_None, // FCOS = 1628 |
| 145843 | CEFBS_None, // FDECSTP = 1629 |
| 145844 | CEFBS_None, // FEMMS = 1630 |
| 145845 | CEFBS_None, // FFREE = 1631 |
| 145846 | CEFBS_None, // FFREEP = 1632 |
| 145847 | CEFBS_None, // FICOM16m = 1633 |
| 145848 | CEFBS_None, // FICOM32m = 1634 |
| 145849 | CEFBS_None, // FICOMP16m = 1635 |
| 145850 | CEFBS_None, // FICOMP32m = 1636 |
| 145851 | CEFBS_None, // FINCSTP = 1637 |
| 145852 | CEFBS_None, // FLDCW16m = 1638 |
| 145853 | CEFBS_None, // FLDENVm = 1639 |
| 145854 | CEFBS_None, // FLDL2E = 1640 |
| 145855 | CEFBS_None, // FLDL2T = 1641 |
| 145856 | CEFBS_None, // FLDLG2 = 1642 |
| 145857 | CEFBS_None, // FLDLN2 = 1643 |
| 145858 | CEFBS_None, // FLDPI = 1644 |
| 145859 | CEFBS_None, // FNCLEX = 1645 |
| 145860 | CEFBS_None, // FNINIT = 1646 |
| 145861 | CEFBS_None, // FNOP = 1647 |
| 145862 | CEFBS_None, // FNSTCW16m = 1648 |
| 145863 | CEFBS_None, // FNSTSW16r = 1649 |
| 145864 | CEFBS_None, // FNSTSWm = 1650 |
| 145865 | CEFBS_None, // FP32_TO_INT16_IN_MEM = 1651 |
| 145866 | CEFBS_None, // FP32_TO_INT32_IN_MEM = 1652 |
| 145867 | CEFBS_None, // FP32_TO_INT64_IN_MEM = 1653 |
| 145868 | CEFBS_None, // FP64_TO_INT16_IN_MEM = 1654 |
| 145869 | CEFBS_None, // FP64_TO_INT32_IN_MEM = 1655 |
| 145870 | CEFBS_None, // FP64_TO_INT64_IN_MEM = 1656 |
| 145871 | CEFBS_None, // FP80_ADDm32 = 1657 |
| 145872 | CEFBS_None, // FP80_ADDr = 1658 |
| 145873 | CEFBS_None, // FP80_TO_INT16_IN_MEM = 1659 |
| 145874 | CEFBS_None, // FP80_TO_INT32_IN_MEM = 1660 |
| 145875 | CEFBS_None, // FP80_TO_INT64_IN_MEM = 1661 |
| 145876 | CEFBS_None, // FPATAN = 1662 |
| 145877 | CEFBS_None, // FPREM = 1663 |
| 145878 | CEFBS_None, // FPREM1 = 1664 |
| 145879 | CEFBS_None, // FPTAN = 1665 |
| 145880 | CEFBS_None, // FRNDINT = 1666 |
| 145881 | CEFBS_None, // FRSTORm = 1667 |
| 145882 | CEFBS_None, // FSAVEm = 1668 |
| 145883 | CEFBS_None, // FSCALE = 1669 |
| 145884 | CEFBS_None, // FSIN = 1670 |
| 145885 | CEFBS_None, // FSINCOS = 1671 |
| 145886 | CEFBS_None, // FSTENVm = 1672 |
| 145887 | CEFBS_None, // FS_PREFIX = 1673 |
| 145888 | CEFBS_None, // FXRSTOR = 1674 |
| 145889 | CEFBS_In64BitMode, // FXRSTOR64 = 1675 |
| 145890 | CEFBS_None, // FXSAVE = 1676 |
| 145891 | CEFBS_In64BitMode, // FXSAVE64 = 1677 |
| 145892 | CEFBS_None, // FXTRACT = 1678 |
| 145893 | CEFBS_None, // FYL2X = 1679 |
| 145894 | CEFBS_None, // FYL2XP1 = 1680 |
| 145895 | CEFBS_None, // GETSEC = 1681 |
| 145896 | CEFBS_None, // GF2P8AFFINEINVQBrmi = 1682 |
| 145897 | CEFBS_None, // GF2P8AFFINEINVQBrri = 1683 |
| 145898 | CEFBS_None, // GF2P8AFFINEQBrmi = 1684 |
| 145899 | CEFBS_None, // GF2P8AFFINEQBrri = 1685 |
| 145900 | CEFBS_None, // GF2P8MULBrm = 1686 |
| 145901 | CEFBS_None, // GF2P8MULBrr = 1687 |
| 145902 | CEFBS_None, // GS_PREFIX = 1688 |
| 145903 | CEFBS_None, // HADDPDrm = 1689 |
| 145904 | CEFBS_None, // HADDPDrr = 1690 |
| 145905 | CEFBS_None, // HADDPSrm = 1691 |
| 145906 | CEFBS_None, // HADDPSrr = 1692 |
| 145907 | CEFBS_None, // HLT = 1693 |
| 145908 | CEFBS_None, // HRESET = 1694 |
| 145909 | CEFBS_None, // HSUBPDrm = 1695 |
| 145910 | CEFBS_None, // HSUBPDrr = 1696 |
| 145911 | CEFBS_None, // HSUBPSrm = 1697 |
| 145912 | CEFBS_None, // HSUBPSrr = 1698 |
| 145913 | CEFBS_None, // IDIV16m = 1699 |
| 145914 | CEFBS_In64BitMode, // IDIV16m_EVEX = 1700 |
| 145915 | CEFBS_In64BitMode, // IDIV16m_NF = 1701 |
| 145916 | CEFBS_None, // IDIV16r = 1702 |
| 145917 | CEFBS_In64BitMode, // IDIV16r_EVEX = 1703 |
| 145918 | CEFBS_In64BitMode, // IDIV16r_NF = 1704 |
| 145919 | CEFBS_None, // IDIV32m = 1705 |
| 145920 | CEFBS_In64BitMode, // IDIV32m_EVEX = 1706 |
| 145921 | CEFBS_In64BitMode, // IDIV32m_NF = 1707 |
| 145922 | CEFBS_None, // IDIV32r = 1708 |
| 145923 | CEFBS_In64BitMode, // IDIV32r_EVEX = 1709 |
| 145924 | CEFBS_In64BitMode, // IDIV32r_NF = 1710 |
| 145925 | CEFBS_In64BitMode, // IDIV64m = 1711 |
| 145926 | CEFBS_In64BitMode, // IDIV64m_EVEX = 1712 |
| 145927 | CEFBS_In64BitMode, // IDIV64m_NF = 1713 |
| 145928 | CEFBS_None, // IDIV64r = 1714 |
| 145929 | CEFBS_In64BitMode, // IDIV64r_EVEX = 1715 |
| 145930 | CEFBS_In64BitMode, // IDIV64r_NF = 1716 |
| 145931 | CEFBS_None, // IDIV8m = 1717 |
| 145932 | CEFBS_In64BitMode, // IDIV8m_EVEX = 1718 |
| 145933 | CEFBS_In64BitMode, // IDIV8m_NF = 1719 |
| 145934 | CEFBS_None, // IDIV8r = 1720 |
| 145935 | CEFBS_In64BitMode, // IDIV8r_EVEX = 1721 |
| 145936 | CEFBS_In64BitMode, // IDIV8r_NF = 1722 |
| 145937 | CEFBS_None, // ILD_F16m = 1723 |
| 145938 | CEFBS_None, // ILD_F32m = 1724 |
| 145939 | CEFBS_None, // ILD_F64m = 1725 |
| 145940 | CEFBS_None, // ILD_Fp16m32 = 1726 |
| 145941 | CEFBS_None, // ILD_Fp16m64 = 1727 |
| 145942 | CEFBS_None, // ILD_Fp16m80 = 1728 |
| 145943 | CEFBS_None, // ILD_Fp32m32 = 1729 |
| 145944 | CEFBS_None, // ILD_Fp32m64 = 1730 |
| 145945 | CEFBS_None, // ILD_Fp32m80 = 1731 |
| 145946 | CEFBS_None, // ILD_Fp64m32 = 1732 |
| 145947 | CEFBS_None, // ILD_Fp64m64 = 1733 |
| 145948 | CEFBS_None, // ILD_Fp64m80 = 1734 |
| 145949 | CEFBS_None, // IMUL16m = 1735 |
| 145950 | CEFBS_In64BitMode, // IMUL16m_EVEX = 1736 |
| 145951 | CEFBS_In64BitMode, // IMUL16m_NF = 1737 |
| 145952 | CEFBS_None, // IMUL16r = 1738 |
| 145953 | CEFBS_In64BitMode, // IMUL16r_EVEX = 1739 |
| 145954 | CEFBS_In64BitMode, // IMUL16r_NF = 1740 |
| 145955 | CEFBS_None, // IMUL16rm = 1741 |
| 145956 | CEFBS_In64BitMode, // IMUL16rm_EVEX = 1742 |
| 145957 | CEFBS_In64BitMode, // IMUL16rm_ND = 1743 |
| 145958 | CEFBS_In64BitMode, // IMUL16rm_NF = 1744 |
| 145959 | CEFBS_In64BitMode, // IMUL16rm_NF_ND = 1745 |
| 145960 | CEFBS_None, // IMUL16rmi = 1746 |
| 145961 | CEFBS_None, // IMUL16rmi8 = 1747 |
| 145962 | CEFBS_In64BitMode, // IMUL16rmi8_EVEX = 1748 |
| 145963 | CEFBS_In64BitMode, // IMUL16rmi8_NF = 1749 |
| 145964 | CEFBS_In64BitMode, // IMUL16rmi_EVEX = 1750 |
| 145965 | CEFBS_In64BitMode, // IMUL16rmi_NF = 1751 |
| 145966 | CEFBS_None, // IMUL16rr = 1752 |
| 145967 | CEFBS_In64BitMode, // IMUL16rr_EVEX = 1753 |
| 145968 | CEFBS_In64BitMode, // IMUL16rr_ND = 1754 |
| 145969 | CEFBS_In64BitMode, // IMUL16rr_NF = 1755 |
| 145970 | CEFBS_In64BitMode, // IMUL16rr_NF_ND = 1756 |
| 145971 | CEFBS_None, // IMUL16rri = 1757 |
| 145972 | CEFBS_None, // IMUL16rri8 = 1758 |
| 145973 | CEFBS_In64BitMode, // IMUL16rri8_EVEX = 1759 |
| 145974 | CEFBS_In64BitMode, // IMUL16rri8_NF = 1760 |
| 145975 | CEFBS_In64BitMode, // IMUL16rri_EVEX = 1761 |
| 145976 | CEFBS_In64BitMode, // IMUL16rri_NF = 1762 |
| 145977 | CEFBS_None, // IMUL32m = 1763 |
| 145978 | CEFBS_In64BitMode, // IMUL32m_EVEX = 1764 |
| 145979 | CEFBS_In64BitMode, // IMUL32m_NF = 1765 |
| 145980 | CEFBS_None, // IMUL32r = 1766 |
| 145981 | CEFBS_In64BitMode, // IMUL32r_EVEX = 1767 |
| 145982 | CEFBS_In64BitMode, // IMUL32r_NF = 1768 |
| 145983 | CEFBS_None, // IMUL32rm = 1769 |
| 145984 | CEFBS_In64BitMode, // IMUL32rm_EVEX = 1770 |
| 145985 | CEFBS_In64BitMode, // IMUL32rm_ND = 1771 |
| 145986 | CEFBS_In64BitMode, // IMUL32rm_NF = 1772 |
| 145987 | CEFBS_In64BitMode, // IMUL32rm_NF_ND = 1773 |
| 145988 | CEFBS_None, // IMUL32rmi = 1774 |
| 145989 | CEFBS_None, // IMUL32rmi8 = 1775 |
| 145990 | CEFBS_In64BitMode, // IMUL32rmi8_EVEX = 1776 |
| 145991 | CEFBS_In64BitMode, // IMUL32rmi8_NF = 1777 |
| 145992 | CEFBS_In64BitMode, // IMUL32rmi_EVEX = 1778 |
| 145993 | CEFBS_In64BitMode, // IMUL32rmi_NF = 1779 |
| 145994 | CEFBS_None, // IMUL32rr = 1780 |
| 145995 | CEFBS_In64BitMode, // IMUL32rr_EVEX = 1781 |
| 145996 | CEFBS_In64BitMode, // IMUL32rr_ND = 1782 |
| 145997 | CEFBS_In64BitMode, // IMUL32rr_NF = 1783 |
| 145998 | CEFBS_In64BitMode, // IMUL32rr_NF_ND = 1784 |
| 145999 | CEFBS_None, // IMUL32rri = 1785 |
| 146000 | CEFBS_None, // IMUL32rri8 = 1786 |
| 146001 | CEFBS_In64BitMode, // IMUL32rri8_EVEX = 1787 |
| 146002 | CEFBS_In64BitMode, // IMUL32rri8_NF = 1788 |
| 146003 | CEFBS_In64BitMode, // IMUL32rri_EVEX = 1789 |
| 146004 | CEFBS_In64BitMode, // IMUL32rri_NF = 1790 |
| 146005 | CEFBS_In64BitMode, // IMUL64m = 1791 |
| 146006 | CEFBS_In64BitMode, // IMUL64m_EVEX = 1792 |
| 146007 | CEFBS_In64BitMode, // IMUL64m_NF = 1793 |
| 146008 | CEFBS_None, // IMUL64r = 1794 |
| 146009 | CEFBS_In64BitMode, // IMUL64r_EVEX = 1795 |
| 146010 | CEFBS_In64BitMode, // IMUL64r_NF = 1796 |
| 146011 | CEFBS_None, // IMUL64rm = 1797 |
| 146012 | CEFBS_In64BitMode, // IMUL64rm_EVEX = 1798 |
| 146013 | CEFBS_In64BitMode, // IMUL64rm_ND = 1799 |
| 146014 | CEFBS_In64BitMode, // IMUL64rm_NF = 1800 |
| 146015 | CEFBS_In64BitMode, // IMUL64rm_NF_ND = 1801 |
| 146016 | CEFBS_None, // IMUL64rmi32 = 1802 |
| 146017 | CEFBS_In64BitMode, // IMUL64rmi32_EVEX = 1803 |
| 146018 | CEFBS_In64BitMode, // IMUL64rmi32_NF = 1804 |
| 146019 | CEFBS_None, // IMUL64rmi8 = 1805 |
| 146020 | CEFBS_In64BitMode, // IMUL64rmi8_EVEX = 1806 |
| 146021 | CEFBS_In64BitMode, // IMUL64rmi8_NF = 1807 |
| 146022 | CEFBS_None, // IMUL64rr = 1808 |
| 146023 | CEFBS_In64BitMode, // IMUL64rr_EVEX = 1809 |
| 146024 | CEFBS_In64BitMode, // IMUL64rr_ND = 1810 |
| 146025 | CEFBS_In64BitMode, // IMUL64rr_NF = 1811 |
| 146026 | CEFBS_In64BitMode, // IMUL64rr_NF_ND = 1812 |
| 146027 | CEFBS_None, // IMUL64rri32 = 1813 |
| 146028 | CEFBS_In64BitMode, // IMUL64rri32_EVEX = 1814 |
| 146029 | CEFBS_In64BitMode, // IMUL64rri32_NF = 1815 |
| 146030 | CEFBS_None, // IMUL64rri8 = 1816 |
| 146031 | CEFBS_In64BitMode, // IMUL64rri8_EVEX = 1817 |
| 146032 | CEFBS_In64BitMode, // IMUL64rri8_NF = 1818 |
| 146033 | CEFBS_None, // IMUL8m = 1819 |
| 146034 | CEFBS_In64BitMode, // IMUL8m_EVEX = 1820 |
| 146035 | CEFBS_In64BitMode, // IMUL8m_NF = 1821 |
| 146036 | CEFBS_None, // IMUL8r = 1822 |
| 146037 | CEFBS_In64BitMode, // IMUL8r_EVEX = 1823 |
| 146038 | CEFBS_In64BitMode, // IMUL8r_NF = 1824 |
| 146039 | CEFBS_In64BitMode, // IMULZU16rmi = 1825 |
| 146040 | CEFBS_In64BitMode, // IMULZU16rmi8 = 1826 |
| 146041 | CEFBS_In64BitMode, // IMULZU16rri = 1827 |
| 146042 | CEFBS_In64BitMode, // IMULZU16rri8 = 1828 |
| 146043 | CEFBS_In64BitMode, // IMULZU32rmi = 1829 |
| 146044 | CEFBS_In64BitMode, // IMULZU32rmi8 = 1830 |
| 146045 | CEFBS_In64BitMode, // IMULZU32rri = 1831 |
| 146046 | CEFBS_In64BitMode, // IMULZU32rri8 = 1832 |
| 146047 | CEFBS_In64BitMode, // IMULZU64rmi32 = 1833 |
| 146048 | CEFBS_In64BitMode, // IMULZU64rmi8 = 1834 |
| 146049 | CEFBS_In64BitMode, // IMULZU64rri32 = 1835 |
| 146050 | CEFBS_In64BitMode, // IMULZU64rri8 = 1836 |
| 146051 | CEFBS_None, // IN16ri = 1837 |
| 146052 | CEFBS_None, // IN16rr = 1838 |
| 146053 | CEFBS_None, // IN32ri = 1839 |
| 146054 | CEFBS_None, // IN32rr = 1840 |
| 146055 | CEFBS_None, // IN8ri = 1841 |
| 146056 | CEFBS_None, // IN8rr = 1842 |
| 146057 | CEFBS_None, // INC16m = 1843 |
| 146058 | CEFBS_In64BitMode, // INC16m_EVEX = 1844 |
| 146059 | CEFBS_In64BitMode, // INC16m_ND = 1845 |
| 146060 | CEFBS_In64BitMode, // INC16m_NF = 1846 |
| 146061 | CEFBS_In64BitMode, // INC16m_NF_ND = 1847 |
| 146062 | CEFBS_None, // INC16r = 1848 |
| 146063 | CEFBS_In64BitMode, // INC16r_EVEX = 1849 |
| 146064 | CEFBS_In64BitMode, // INC16r_ND = 1850 |
| 146065 | CEFBS_In64BitMode, // INC16r_NF = 1851 |
| 146066 | CEFBS_In64BitMode, // INC16r_NF_ND = 1852 |
| 146067 | CEFBS_Not64BitMode, // INC16r_alt = 1853 |
| 146068 | CEFBS_None, // INC32m = 1854 |
| 146069 | CEFBS_In64BitMode, // INC32m_EVEX = 1855 |
| 146070 | CEFBS_In64BitMode, // INC32m_ND = 1856 |
| 146071 | CEFBS_In64BitMode, // INC32m_NF = 1857 |
| 146072 | CEFBS_In64BitMode, // INC32m_NF_ND = 1858 |
| 146073 | CEFBS_None, // INC32r = 1859 |
| 146074 | CEFBS_In64BitMode, // INC32r_EVEX = 1860 |
| 146075 | CEFBS_In64BitMode, // INC32r_ND = 1861 |
| 146076 | CEFBS_In64BitMode, // INC32r_NF = 1862 |
| 146077 | CEFBS_In64BitMode, // INC32r_NF_ND = 1863 |
| 146078 | CEFBS_Not64BitMode, // INC32r_alt = 1864 |
| 146079 | CEFBS_In64BitMode, // INC64m = 1865 |
| 146080 | CEFBS_In64BitMode, // INC64m_EVEX = 1866 |
| 146081 | CEFBS_In64BitMode, // INC64m_ND = 1867 |
| 146082 | CEFBS_In64BitMode, // INC64m_NF = 1868 |
| 146083 | CEFBS_In64BitMode, // INC64m_NF_ND = 1869 |
| 146084 | CEFBS_None, // INC64r = 1870 |
| 146085 | CEFBS_In64BitMode, // INC64r_EVEX = 1871 |
| 146086 | CEFBS_In64BitMode, // INC64r_ND = 1872 |
| 146087 | CEFBS_In64BitMode, // INC64r_NF = 1873 |
| 146088 | CEFBS_In64BitMode, // INC64r_NF_ND = 1874 |
| 146089 | CEFBS_None, // INC8m = 1875 |
| 146090 | CEFBS_In64BitMode, // INC8m_EVEX = 1876 |
| 146091 | CEFBS_In64BitMode, // INC8m_ND = 1877 |
| 146092 | CEFBS_In64BitMode, // INC8m_NF = 1878 |
| 146093 | CEFBS_In64BitMode, // INC8m_NF_ND = 1879 |
| 146094 | CEFBS_None, // INC8r = 1880 |
| 146095 | CEFBS_In64BitMode, // INC8r_EVEX = 1881 |
| 146096 | CEFBS_In64BitMode, // INC8r_ND = 1882 |
| 146097 | CEFBS_In64BitMode, // INC8r_NF = 1883 |
| 146098 | CEFBS_In64BitMode, // INC8r_NF_ND = 1884 |
| 146099 | CEFBS_None, // INCSSPD = 1885 |
| 146100 | CEFBS_None, // INCSSPQ = 1886 |
| 146101 | CEFBS_None, // INSB = 1887 |
| 146102 | CEFBS_None, // INSERTPSrm = 1888 |
| 146103 | CEFBS_None, // INSERTPSrr = 1889 |
| 146104 | CEFBS_None, // INSERTQ = 1890 |
| 146105 | CEFBS_None, // INSERTQI = 1891 |
| 146106 | CEFBS_None, // INSL = 1892 |
| 146107 | CEFBS_None, // INSW = 1893 |
| 146108 | CEFBS_None, // INT = 1894 |
| 146109 | CEFBS_None, // INT3 = 1895 |
| 146110 | CEFBS_Not64BitMode, // INTO = 1896 |
| 146111 | CEFBS_None, // INVD = 1897 |
| 146112 | CEFBS_Not64BitMode, // INVEPT32 = 1898 |
| 146113 | CEFBS_In64BitMode, // INVEPT64 = 1899 |
| 146114 | CEFBS_In64BitMode, // INVEPT64_EVEX = 1900 |
| 146115 | CEFBS_None, // INVLPG = 1901 |
| 146116 | CEFBS_Not64BitMode, // INVLPGA32 = 1902 |
| 146117 | CEFBS_In64BitMode, // INVLPGA64 = 1903 |
| 146118 | CEFBS_Not64BitMode, // INVLPGB32 = 1904 |
| 146119 | CEFBS_In64BitMode, // INVLPGB64 = 1905 |
| 146120 | CEFBS_Not64BitMode, // INVPCID32 = 1906 |
| 146121 | CEFBS_In64BitMode, // INVPCID64 = 1907 |
| 146122 | CEFBS_In64BitMode, // INVPCID64_EVEX = 1908 |
| 146123 | CEFBS_Not64BitMode, // INVVPID32 = 1909 |
| 146124 | CEFBS_In64BitMode, // INVVPID64 = 1910 |
| 146125 | CEFBS_In64BitMode, // INVVPID64_EVEX = 1911 |
| 146126 | CEFBS_None, // IRET = 1912 |
| 146127 | CEFBS_None, // IRET16 = 1913 |
| 146128 | CEFBS_None, // IRET32 = 1914 |
| 146129 | CEFBS_In64BitMode, // IRET64 = 1915 |
| 146130 | CEFBS_None, // ISTT_FP16m = 1916 |
| 146131 | CEFBS_None, // ISTT_FP32m = 1917 |
| 146132 | CEFBS_None, // ISTT_FP64m = 1918 |
| 146133 | CEFBS_None, // ISTT_Fp16m32 = 1919 |
| 146134 | CEFBS_None, // ISTT_Fp16m64 = 1920 |
| 146135 | CEFBS_None, // ISTT_Fp16m80 = 1921 |
| 146136 | CEFBS_None, // ISTT_Fp32m32 = 1922 |
| 146137 | CEFBS_None, // ISTT_Fp32m64 = 1923 |
| 146138 | CEFBS_None, // ISTT_Fp32m80 = 1924 |
| 146139 | CEFBS_None, // ISTT_Fp64m32 = 1925 |
| 146140 | CEFBS_None, // ISTT_Fp64m64 = 1926 |
| 146141 | CEFBS_None, // ISTT_Fp64m80 = 1927 |
| 146142 | CEFBS_None, // IST_F16m = 1928 |
| 146143 | CEFBS_None, // IST_F32m = 1929 |
| 146144 | CEFBS_None, // IST_FP16m = 1930 |
| 146145 | CEFBS_None, // IST_FP32m = 1931 |
| 146146 | CEFBS_None, // IST_FP64m = 1932 |
| 146147 | CEFBS_None, // IST_Fp16m32 = 1933 |
| 146148 | CEFBS_None, // IST_Fp16m64 = 1934 |
| 146149 | CEFBS_None, // IST_Fp16m80 = 1935 |
| 146150 | CEFBS_None, // IST_Fp32m32 = 1936 |
| 146151 | CEFBS_None, // IST_Fp32m64 = 1937 |
| 146152 | CEFBS_None, // IST_Fp32m80 = 1938 |
| 146153 | CEFBS_None, // IST_Fp64m32 = 1939 |
| 146154 | CEFBS_None, // IST_Fp64m64 = 1940 |
| 146155 | CEFBS_None, // IST_Fp64m80 = 1941 |
| 146156 | CEFBS_None, // Int_eh_sjlj_setup_dispatch = 1942 |
| 146157 | CEFBS_None, // JCC_1 = 1943 |
| 146158 | CEFBS_None, // JCC_2 = 1944 |
| 146159 | CEFBS_None, // JCC_4 = 1945 |
| 146160 | CEFBS_Not64BitMode, // JCXZ = 1946 |
| 146161 | CEFBS_None, // JECXZ = 1947 |
| 146162 | CEFBS_Not64BitMode, // JMP16m = 1948 |
| 146163 | CEFBS_Not64BitMode, // JMP16m_NT = 1949 |
| 146164 | CEFBS_Not64BitMode, // JMP16r = 1950 |
| 146165 | CEFBS_Not64BitMode, // JMP16r_NT = 1951 |
| 146166 | CEFBS_Not64BitMode, // JMP32m = 1952 |
| 146167 | CEFBS_Not64BitMode, // JMP32m_NT = 1953 |
| 146168 | CEFBS_Not64BitMode, // JMP32r = 1954 |
| 146169 | CEFBS_Not64BitMode, // JMP32r_NT = 1955 |
| 146170 | CEFBS_In64BitMode, // JMP64m = 1956 |
| 146171 | CEFBS_In64BitMode, // JMP64m_NT = 1957 |
| 146172 | CEFBS_None, // JMP64m_REX = 1958 |
| 146173 | CEFBS_In64BitMode, // JMP64r = 1959 |
| 146174 | CEFBS_In64BitMode, // JMP64r_NT = 1960 |
| 146175 | CEFBS_None, // JMP64r_REX = 1961 |
| 146176 | CEFBS_In64BitMode, // JMPABS64i = 1962 |
| 146177 | CEFBS_None, // JMP_1 = 1963 |
| 146178 | CEFBS_None, // JMP_2 = 1964 |
| 146179 | CEFBS_None, // JMP_4 = 1965 |
| 146180 | CEFBS_In64BitMode, // JRCXZ = 1966 |
| 146181 | CEFBS_None, // KADDBrr = 1967 |
| 146182 | CEFBS_None, // KADDDrr = 1968 |
| 146183 | CEFBS_None, // KADDQrr = 1969 |
| 146184 | CEFBS_None, // KADDWrr = 1970 |
| 146185 | CEFBS_None, // KANDBrr = 1971 |
| 146186 | CEFBS_None, // KANDDrr = 1972 |
| 146187 | CEFBS_None, // KANDNBrr = 1973 |
| 146188 | CEFBS_None, // KANDNDrr = 1974 |
| 146189 | CEFBS_None, // KANDNQrr = 1975 |
| 146190 | CEFBS_None, // KANDNWrr = 1976 |
| 146191 | CEFBS_None, // KANDQrr = 1977 |
| 146192 | CEFBS_None, // KANDWrr = 1978 |
| 146193 | CEFBS_None, // KCFI_CHECK = 1979 |
| 146194 | CEFBS_None, // KMOVBkk = 1980 |
| 146195 | CEFBS_In64BitMode, // KMOVBkk_EVEX = 1981 |
| 146196 | CEFBS_None, // KMOVBkm = 1982 |
| 146197 | CEFBS_In64BitMode, // KMOVBkm_EVEX = 1983 |
| 146198 | CEFBS_None, // KMOVBkr = 1984 |
| 146199 | CEFBS_In64BitMode, // KMOVBkr_EVEX = 1985 |
| 146200 | CEFBS_None, // KMOVBmk = 1986 |
| 146201 | CEFBS_In64BitMode, // KMOVBmk_EVEX = 1987 |
| 146202 | CEFBS_None, // KMOVBrk = 1988 |
| 146203 | CEFBS_In64BitMode, // KMOVBrk_EVEX = 1989 |
| 146204 | CEFBS_None, // KMOVDkk = 1990 |
| 146205 | CEFBS_In64BitMode, // KMOVDkk_EVEX = 1991 |
| 146206 | CEFBS_None, // KMOVDkm = 1992 |
| 146207 | CEFBS_In64BitMode, // KMOVDkm_EVEX = 1993 |
| 146208 | CEFBS_None, // KMOVDkr = 1994 |
| 146209 | CEFBS_In64BitMode, // KMOVDkr_EVEX = 1995 |
| 146210 | CEFBS_None, // KMOVDmk = 1996 |
| 146211 | CEFBS_In64BitMode, // KMOVDmk_EVEX = 1997 |
| 146212 | CEFBS_None, // KMOVDrk = 1998 |
| 146213 | CEFBS_In64BitMode, // KMOVDrk_EVEX = 1999 |
| 146214 | CEFBS_None, // KMOVQkk = 2000 |
| 146215 | CEFBS_In64BitMode, // KMOVQkk_EVEX = 2001 |
| 146216 | CEFBS_None, // KMOVQkm = 2002 |
| 146217 | CEFBS_In64BitMode, // KMOVQkm_EVEX = 2003 |
| 146218 | CEFBS_None, // KMOVQkr = 2004 |
| 146219 | CEFBS_In64BitMode, // KMOVQkr_EVEX = 2005 |
| 146220 | CEFBS_None, // KMOVQmk = 2006 |
| 146221 | CEFBS_In64BitMode, // KMOVQmk_EVEX = 2007 |
| 146222 | CEFBS_None, // KMOVQrk = 2008 |
| 146223 | CEFBS_In64BitMode, // KMOVQrk_EVEX = 2009 |
| 146224 | CEFBS_None, // KMOVWkk = 2010 |
| 146225 | CEFBS_In64BitMode, // KMOVWkk_EVEX = 2011 |
| 146226 | CEFBS_None, // KMOVWkm = 2012 |
| 146227 | CEFBS_In64BitMode, // KMOVWkm_EVEX = 2013 |
| 146228 | CEFBS_None, // KMOVWkr = 2014 |
| 146229 | CEFBS_In64BitMode, // KMOVWkr_EVEX = 2015 |
| 146230 | CEFBS_None, // KMOVWmk = 2016 |
| 146231 | CEFBS_In64BitMode, // KMOVWmk_EVEX = 2017 |
| 146232 | CEFBS_None, // KMOVWrk = 2018 |
| 146233 | CEFBS_In64BitMode, // KMOVWrk_EVEX = 2019 |
| 146234 | CEFBS_None, // KNOTBrr = 2020 |
| 146235 | CEFBS_None, // KNOTDrr = 2021 |
| 146236 | CEFBS_None, // KNOTQrr = 2022 |
| 146237 | CEFBS_None, // KNOTWrr = 2023 |
| 146238 | CEFBS_None, // KORBrr = 2024 |
| 146239 | CEFBS_None, // KORDrr = 2025 |
| 146240 | CEFBS_None, // KORQrr = 2026 |
| 146241 | CEFBS_None, // KORTESTBrr = 2027 |
| 146242 | CEFBS_None, // KORTESTDrr = 2028 |
| 146243 | CEFBS_None, // KORTESTQrr = 2029 |
| 146244 | CEFBS_None, // KORTESTWrr = 2030 |
| 146245 | CEFBS_None, // KORWrr = 2031 |
| 146246 | CEFBS_None, // KSHIFTLBri = 2032 |
| 146247 | CEFBS_None, // KSHIFTLDri = 2033 |
| 146248 | CEFBS_None, // KSHIFTLQri = 2034 |
| 146249 | CEFBS_None, // KSHIFTLWri = 2035 |
| 146250 | CEFBS_None, // KSHIFTRBri = 2036 |
| 146251 | CEFBS_None, // KSHIFTRDri = 2037 |
| 146252 | CEFBS_None, // KSHIFTRQri = 2038 |
| 146253 | CEFBS_None, // KSHIFTRWri = 2039 |
| 146254 | CEFBS_None, // KTESTBrr = 2040 |
| 146255 | CEFBS_None, // KTESTDrr = 2041 |
| 146256 | CEFBS_None, // KTESTQrr = 2042 |
| 146257 | CEFBS_None, // KTESTWrr = 2043 |
| 146258 | CEFBS_None, // KUNPCKBWrr = 2044 |
| 146259 | CEFBS_None, // KUNPCKDQrr = 2045 |
| 146260 | CEFBS_None, // KUNPCKWDrr = 2046 |
| 146261 | CEFBS_None, // KXNORBrr = 2047 |
| 146262 | CEFBS_None, // KXNORDrr = 2048 |
| 146263 | CEFBS_None, // KXNORQrr = 2049 |
| 146264 | CEFBS_None, // KXNORWrr = 2050 |
| 146265 | CEFBS_None, // KXORBrr = 2051 |
| 146266 | CEFBS_None, // KXORDrr = 2052 |
| 146267 | CEFBS_None, // KXORQrr = 2053 |
| 146268 | CEFBS_None, // KXORWrr = 2054 |
| 146269 | CEFBS_None, // LAHF = 2055 |
| 146270 | CEFBS_None, // LAR16rm = 2056 |
| 146271 | CEFBS_None, // LAR16rr = 2057 |
| 146272 | CEFBS_None, // LAR32rm = 2058 |
| 146273 | CEFBS_None, // LAR32rr = 2059 |
| 146274 | CEFBS_None, // LAR64rm = 2060 |
| 146275 | CEFBS_None, // LAR64rr = 2061 |
| 146276 | CEFBS_None, // LCMPXCHG16 = 2062 |
| 146277 | CEFBS_In64BitMode, // LCMPXCHG16B = 2063 |
| 146278 | CEFBS_None, // LCMPXCHG32 = 2064 |
| 146279 | CEFBS_None, // LCMPXCHG64 = 2065 |
| 146280 | CEFBS_None, // LCMPXCHG8 = 2066 |
| 146281 | CEFBS_None, // LCMPXCHG8B = 2067 |
| 146282 | CEFBS_None, // LDDQUrm = 2068 |
| 146283 | CEFBS_None, // LDMXCSR = 2069 |
| 146284 | CEFBS_Not64BitMode, // LDS16rm = 2070 |
| 146285 | CEFBS_Not64BitMode, // LDS32rm = 2071 |
| 146286 | CEFBS_In64BitMode, // LDTILECFG = 2072 |
| 146287 | CEFBS_In64BitMode, // LDTILECFG_EVEX = 2073 |
| 146288 | CEFBS_None, // LD_F0 = 2074 |
| 146289 | CEFBS_None, // LD_F1 = 2075 |
| 146290 | CEFBS_None, // LD_F32m = 2076 |
| 146291 | CEFBS_None, // LD_F64m = 2077 |
| 146292 | CEFBS_None, // LD_F80m = 2078 |
| 146293 | CEFBS_None, // LD_Fp032 = 2079 |
| 146294 | CEFBS_None, // LD_Fp064 = 2080 |
| 146295 | CEFBS_None, // LD_Fp080 = 2081 |
| 146296 | CEFBS_None, // LD_Fp132 = 2082 |
| 146297 | CEFBS_None, // LD_Fp164 = 2083 |
| 146298 | CEFBS_None, // LD_Fp180 = 2084 |
| 146299 | CEFBS_None, // LD_Fp32m = 2085 |
| 146300 | CEFBS_None, // LD_Fp32m64 = 2086 |
| 146301 | CEFBS_None, // LD_Fp32m80 = 2087 |
| 146302 | CEFBS_None, // LD_Fp64m = 2088 |
| 146303 | CEFBS_None, // LD_Fp64m80 = 2089 |
| 146304 | CEFBS_None, // LD_Fp80m = 2090 |
| 146305 | CEFBS_None, // LD_Frr = 2091 |
| 146306 | CEFBS_None, // LEA16r = 2092 |
| 146307 | CEFBS_Not64BitMode, // LEA32r = 2093 |
| 146308 | CEFBS_In64BitMode, // LEA64_32r = 2094 |
| 146309 | CEFBS_None, // LEA64r = 2095 |
| 146310 | CEFBS_Not64BitMode, // LEAVE = 2096 |
| 146311 | CEFBS_In64BitMode, // LEAVE64 = 2097 |
| 146312 | CEFBS_Not64BitMode, // LES16rm = 2098 |
| 146313 | CEFBS_Not64BitMode, // LES32rm = 2099 |
| 146314 | CEFBS_None, // LFENCE = 2100 |
| 146315 | CEFBS_None, // LFS16rm = 2101 |
| 146316 | CEFBS_None, // LFS32rm = 2102 |
| 146317 | CEFBS_None, // LFS64rm = 2103 |
| 146318 | CEFBS_Not64BitMode, // LGDT16m = 2104 |
| 146319 | CEFBS_Not64BitMode, // LGDT32m = 2105 |
| 146320 | CEFBS_In64BitMode, // LGDT64m = 2106 |
| 146321 | CEFBS_None, // LGS16rm = 2107 |
| 146322 | CEFBS_None, // LGS32rm = 2108 |
| 146323 | CEFBS_None, // LGS64rm = 2109 |
| 146324 | CEFBS_Not64BitMode, // LIDT16m = 2110 |
| 146325 | CEFBS_Not64BitMode, // LIDT32m = 2111 |
| 146326 | CEFBS_In64BitMode, // LIDT64m = 2112 |
| 146327 | CEFBS_In64BitMode, // LKGS16m = 2113 |
| 146328 | CEFBS_In64BitMode, // LKGS16r = 2114 |
| 146329 | CEFBS_None, // LLDT16m = 2115 |
| 146330 | CEFBS_None, // LLDT16r = 2116 |
| 146331 | CEFBS_None, // LLWPCB = 2117 |
| 146332 | CEFBS_None, // LLWPCB64 = 2118 |
| 146333 | CEFBS_None, // LMSW16m = 2119 |
| 146334 | CEFBS_None, // LMSW16r = 2120 |
| 146335 | CEFBS_None, // LOADIWKEY = 2121 |
| 146336 | CEFBS_None, // LOCK_ADD16mi = 2122 |
| 146337 | CEFBS_None, // LOCK_ADD16mi8 = 2123 |
| 146338 | CEFBS_None, // LOCK_ADD16mr = 2124 |
| 146339 | CEFBS_None, // LOCK_ADD32mi = 2125 |
| 146340 | CEFBS_None, // LOCK_ADD32mi8 = 2126 |
| 146341 | CEFBS_None, // LOCK_ADD32mr = 2127 |
| 146342 | CEFBS_None, // LOCK_ADD64mi32 = 2128 |
| 146343 | CEFBS_None, // LOCK_ADD64mi8 = 2129 |
| 146344 | CEFBS_None, // LOCK_ADD64mr = 2130 |
| 146345 | CEFBS_None, // LOCK_ADD8mi = 2131 |
| 146346 | CEFBS_None, // LOCK_ADD8mr = 2132 |
| 146347 | CEFBS_None, // LOCK_AND16mi = 2133 |
| 146348 | CEFBS_None, // LOCK_AND16mi8 = 2134 |
| 146349 | CEFBS_None, // LOCK_AND16mr = 2135 |
| 146350 | CEFBS_None, // LOCK_AND32mi = 2136 |
| 146351 | CEFBS_None, // LOCK_AND32mi8 = 2137 |
| 146352 | CEFBS_None, // LOCK_AND32mr = 2138 |
| 146353 | CEFBS_None, // LOCK_AND64mi32 = 2139 |
| 146354 | CEFBS_None, // LOCK_AND64mi8 = 2140 |
| 146355 | CEFBS_None, // LOCK_AND64mr = 2141 |
| 146356 | CEFBS_None, // LOCK_AND8mi = 2142 |
| 146357 | CEFBS_None, // LOCK_AND8mr = 2143 |
| 146358 | CEFBS_None, // LOCK_BTC16m = 2144 |
| 146359 | CEFBS_None, // LOCK_BTC32m = 2145 |
| 146360 | CEFBS_None, // LOCK_BTC64m = 2146 |
| 146361 | CEFBS_None, // LOCK_BTC_RM16rm = 2147 |
| 146362 | CEFBS_None, // LOCK_BTC_RM32rm = 2148 |
| 146363 | CEFBS_None, // LOCK_BTC_RM64rm = 2149 |
| 146364 | CEFBS_None, // LOCK_BTR16m = 2150 |
| 146365 | CEFBS_None, // LOCK_BTR32m = 2151 |
| 146366 | CEFBS_None, // LOCK_BTR64m = 2152 |
| 146367 | CEFBS_None, // LOCK_BTR_RM16rm = 2153 |
| 146368 | CEFBS_None, // LOCK_BTR_RM32rm = 2154 |
| 146369 | CEFBS_None, // LOCK_BTR_RM64rm = 2155 |
| 146370 | CEFBS_None, // LOCK_BTS16m = 2156 |
| 146371 | CEFBS_None, // LOCK_BTS32m = 2157 |
| 146372 | CEFBS_None, // LOCK_BTS64m = 2158 |
| 146373 | CEFBS_None, // LOCK_BTS_RM16rm = 2159 |
| 146374 | CEFBS_None, // LOCK_BTS_RM32rm = 2160 |
| 146375 | CEFBS_None, // LOCK_BTS_RM64rm = 2161 |
| 146376 | CEFBS_None, // LOCK_DEC16m = 2162 |
| 146377 | CEFBS_None, // LOCK_DEC32m = 2163 |
| 146378 | CEFBS_In64BitMode, // LOCK_DEC64m = 2164 |
| 146379 | CEFBS_None, // LOCK_DEC8m = 2165 |
| 146380 | CEFBS_None, // LOCK_INC16m = 2166 |
| 146381 | CEFBS_None, // LOCK_INC32m = 2167 |
| 146382 | CEFBS_In64BitMode, // LOCK_INC64m = 2168 |
| 146383 | CEFBS_None, // LOCK_INC8m = 2169 |
| 146384 | CEFBS_None, // LOCK_OR16mi = 2170 |
| 146385 | CEFBS_None, // LOCK_OR16mi8 = 2171 |
| 146386 | CEFBS_None, // LOCK_OR16mr = 2172 |
| 146387 | CEFBS_None, // LOCK_OR32mi = 2173 |
| 146388 | CEFBS_None, // LOCK_OR32mi8 = 2174 |
| 146389 | CEFBS_None, // LOCK_OR32mr = 2175 |
| 146390 | CEFBS_None, // LOCK_OR64mi32 = 2176 |
| 146391 | CEFBS_None, // LOCK_OR64mi8 = 2177 |
| 146392 | CEFBS_None, // LOCK_OR64mr = 2178 |
| 146393 | CEFBS_None, // LOCK_OR8mi = 2179 |
| 146394 | CEFBS_None, // LOCK_OR8mr = 2180 |
| 146395 | CEFBS_None, // LOCK_PREFIX = 2181 |
| 146396 | CEFBS_None, // LOCK_SUB16mi = 2182 |
| 146397 | CEFBS_None, // LOCK_SUB16mi8 = 2183 |
| 146398 | CEFBS_None, // LOCK_SUB16mr = 2184 |
| 146399 | CEFBS_None, // LOCK_SUB32mi = 2185 |
| 146400 | CEFBS_None, // LOCK_SUB32mi8 = 2186 |
| 146401 | CEFBS_None, // LOCK_SUB32mr = 2187 |
| 146402 | CEFBS_None, // LOCK_SUB64mi32 = 2188 |
| 146403 | CEFBS_None, // LOCK_SUB64mi8 = 2189 |
| 146404 | CEFBS_None, // LOCK_SUB64mr = 2190 |
| 146405 | CEFBS_None, // LOCK_SUB8mi = 2191 |
| 146406 | CEFBS_None, // LOCK_SUB8mr = 2192 |
| 146407 | CEFBS_None, // LOCK_XOR16mi = 2193 |
| 146408 | CEFBS_None, // LOCK_XOR16mi8 = 2194 |
| 146409 | CEFBS_None, // LOCK_XOR16mr = 2195 |
| 146410 | CEFBS_None, // LOCK_XOR32mi = 2196 |
| 146411 | CEFBS_None, // LOCK_XOR32mi8 = 2197 |
| 146412 | CEFBS_None, // LOCK_XOR32mr = 2198 |
| 146413 | CEFBS_None, // LOCK_XOR64mi32 = 2199 |
| 146414 | CEFBS_None, // LOCK_XOR64mi8 = 2200 |
| 146415 | CEFBS_None, // LOCK_XOR64mr = 2201 |
| 146416 | CEFBS_None, // LOCK_XOR8mi = 2202 |
| 146417 | CEFBS_None, // LOCK_XOR8mr = 2203 |
| 146418 | CEFBS_None, // LODSB = 2204 |
| 146419 | CEFBS_None, // LODSL = 2205 |
| 146420 | CEFBS_In64BitMode, // LODSQ = 2206 |
| 146421 | CEFBS_None, // LODSW = 2207 |
| 146422 | CEFBS_None, // LOOP = 2208 |
| 146423 | CEFBS_None, // LOOPE = 2209 |
| 146424 | CEFBS_None, // LOOPNE = 2210 |
| 146425 | CEFBS_None, // LRET16 = 2211 |
| 146426 | CEFBS_None, // LRET32 = 2212 |
| 146427 | CEFBS_In64BitMode, // LRET64 = 2213 |
| 146428 | CEFBS_None, // LRETI16 = 2214 |
| 146429 | CEFBS_None, // LRETI32 = 2215 |
| 146430 | CEFBS_In64BitMode, // LRETI64 = 2216 |
| 146431 | CEFBS_None, // LSL16rm = 2217 |
| 146432 | CEFBS_None, // LSL16rr = 2218 |
| 146433 | CEFBS_None, // LSL32rm = 2219 |
| 146434 | CEFBS_None, // LSL32rr = 2220 |
| 146435 | CEFBS_None, // LSL64rm = 2221 |
| 146436 | CEFBS_None, // LSL64rr = 2222 |
| 146437 | CEFBS_None, // LSS16rm = 2223 |
| 146438 | CEFBS_None, // LSS32rm = 2224 |
| 146439 | CEFBS_None, // LSS64rm = 2225 |
| 146440 | CEFBS_None, // LTRm = 2226 |
| 146441 | CEFBS_None, // LTRr = 2227 |
| 146442 | CEFBS_None, // LWPINS32rmi = 2228 |
| 146443 | CEFBS_None, // LWPINS32rri = 2229 |
| 146444 | CEFBS_None, // LWPINS64rmi = 2230 |
| 146445 | CEFBS_None, // LWPINS64rri = 2231 |
| 146446 | CEFBS_None, // LWPVAL32rmi = 2232 |
| 146447 | CEFBS_None, // LWPVAL32rri = 2233 |
| 146448 | CEFBS_None, // LWPVAL64rmi = 2234 |
| 146449 | CEFBS_None, // LWPVAL64rri = 2235 |
| 146450 | CEFBS_None, // LXADD16 = 2236 |
| 146451 | CEFBS_None, // LXADD32 = 2237 |
| 146452 | CEFBS_None, // LXADD64 = 2238 |
| 146453 | CEFBS_None, // LXADD8 = 2239 |
| 146454 | CEFBS_None, // LZCNT16rm = 2240 |
| 146455 | CEFBS_None, // LZCNT16rm_EVEX = 2241 |
| 146456 | CEFBS_None, // LZCNT16rm_NF = 2242 |
| 146457 | CEFBS_None, // LZCNT16rr = 2243 |
| 146458 | CEFBS_None, // LZCNT16rr_EVEX = 2244 |
| 146459 | CEFBS_None, // LZCNT16rr_NF = 2245 |
| 146460 | CEFBS_None, // LZCNT32rm = 2246 |
| 146461 | CEFBS_None, // LZCNT32rm_EVEX = 2247 |
| 146462 | CEFBS_None, // LZCNT32rm_NF = 2248 |
| 146463 | CEFBS_None, // LZCNT32rr = 2249 |
| 146464 | CEFBS_None, // LZCNT32rr_EVEX = 2250 |
| 146465 | CEFBS_None, // LZCNT32rr_NF = 2251 |
| 146466 | CEFBS_None, // LZCNT64rm = 2252 |
| 146467 | CEFBS_None, // LZCNT64rm_EVEX = 2253 |
| 146468 | CEFBS_None, // LZCNT64rm_NF = 2254 |
| 146469 | CEFBS_None, // LZCNT64rr = 2255 |
| 146470 | CEFBS_None, // LZCNT64rr_EVEX = 2256 |
| 146471 | CEFBS_None, // LZCNT64rr_NF = 2257 |
| 146472 | CEFBS_None, // MASKMOVDQU = 2258 |
| 146473 | CEFBS_In64BitMode, // MASKMOVDQU64 = 2259 |
| 146474 | CEFBS_None, // MASKPAIR16LOAD = 2260 |
| 146475 | CEFBS_None, // MASKPAIR16STORE = 2261 |
| 146476 | CEFBS_None, // MAXCPDrm = 2262 |
| 146477 | CEFBS_None, // MAXCPDrr = 2263 |
| 146478 | CEFBS_None, // MAXCPSrm = 2264 |
| 146479 | CEFBS_None, // MAXCPSrr = 2265 |
| 146480 | CEFBS_None, // MAXCSDrm = 2266 |
| 146481 | CEFBS_None, // MAXCSDrr = 2267 |
| 146482 | CEFBS_None, // MAXCSSrm = 2268 |
| 146483 | CEFBS_None, // MAXCSSrr = 2269 |
| 146484 | CEFBS_None, // MAXPDrm = 2270 |
| 146485 | CEFBS_None, // MAXPDrr = 2271 |
| 146486 | CEFBS_None, // MAXPSrm = 2272 |
| 146487 | CEFBS_None, // MAXPSrr = 2273 |
| 146488 | CEFBS_None, // MAXSDrm = 2274 |
| 146489 | CEFBS_None, // MAXSDrm_Int = 2275 |
| 146490 | CEFBS_None, // MAXSDrr = 2276 |
| 146491 | CEFBS_None, // MAXSDrr_Int = 2277 |
| 146492 | CEFBS_None, // MAXSSrm = 2278 |
| 146493 | CEFBS_None, // MAXSSrm_Int = 2279 |
| 146494 | CEFBS_None, // MAXSSrr = 2280 |
| 146495 | CEFBS_None, // MAXSSrr_Int = 2281 |
| 146496 | CEFBS_None, // MFENCE = 2282 |
| 146497 | CEFBS_None, // MINCPDrm = 2283 |
| 146498 | CEFBS_None, // MINCPDrr = 2284 |
| 146499 | CEFBS_None, // MINCPSrm = 2285 |
| 146500 | CEFBS_None, // MINCPSrr = 2286 |
| 146501 | CEFBS_None, // MINCSDrm = 2287 |
| 146502 | CEFBS_None, // MINCSDrr = 2288 |
| 146503 | CEFBS_None, // MINCSSrm = 2289 |
| 146504 | CEFBS_None, // MINCSSrr = 2290 |
| 146505 | CEFBS_None, // MINPDrm = 2291 |
| 146506 | CEFBS_None, // MINPDrr = 2292 |
| 146507 | CEFBS_None, // MINPSrm = 2293 |
| 146508 | CEFBS_None, // MINPSrr = 2294 |
| 146509 | CEFBS_None, // MINSDrm = 2295 |
| 146510 | CEFBS_None, // MINSDrm_Int = 2296 |
| 146511 | CEFBS_None, // MINSDrr = 2297 |
| 146512 | CEFBS_None, // MINSDrr_Int = 2298 |
| 146513 | CEFBS_None, // MINSSrm = 2299 |
| 146514 | CEFBS_None, // MINSSrm_Int = 2300 |
| 146515 | CEFBS_None, // MINSSrr = 2301 |
| 146516 | CEFBS_None, // MINSSrr_Int = 2302 |
| 146517 | CEFBS_None, // MMX_CVTPD2PIrm = 2303 |
| 146518 | CEFBS_None, // MMX_CVTPD2PIrr = 2304 |
| 146519 | CEFBS_None, // MMX_CVTPI2PDrm = 2305 |
| 146520 | CEFBS_None, // MMX_CVTPI2PDrr = 2306 |
| 146521 | CEFBS_None, // MMX_CVTPI2PSrm = 2307 |
| 146522 | CEFBS_None, // MMX_CVTPI2PSrr = 2308 |
| 146523 | CEFBS_None, // MMX_CVTPS2PIrm = 2309 |
| 146524 | CEFBS_None, // MMX_CVTPS2PIrr = 2310 |
| 146525 | CEFBS_None, // MMX_CVTTPD2PIrm = 2311 |
| 146526 | CEFBS_None, // MMX_CVTTPD2PIrr = 2312 |
| 146527 | CEFBS_None, // MMX_CVTTPS2PIrm = 2313 |
| 146528 | CEFBS_None, // MMX_CVTTPS2PIrr = 2314 |
| 146529 | CEFBS_None, // MMX_EMMS = 2315 |
| 146530 | CEFBS_Not64BitMode, // MMX_MASKMOVQ = 2316 |
| 146531 | CEFBS_In64BitMode, // MMX_MASKMOVQ64 = 2317 |
| 146532 | CEFBS_In64BitMode, // MMX_MOVD64from64mr = 2318 |
| 146533 | CEFBS_In64BitMode, // MMX_MOVD64from64rr = 2319 |
| 146534 | CEFBS_None, // MMX_MOVD64grr = 2320 |
| 146535 | CEFBS_None, // MMX_MOVD64mr = 2321 |
| 146536 | CEFBS_None, // MMX_MOVD64rm = 2322 |
| 146537 | CEFBS_None, // MMX_MOVD64rr = 2323 |
| 146538 | CEFBS_In64BitMode, // MMX_MOVD64to64rm = 2324 |
| 146539 | CEFBS_In64BitMode, // MMX_MOVD64to64rr = 2325 |
| 146540 | CEFBS_None, // MMX_MOVDQ2Qrr = 2326 |
| 146541 | CEFBS_None, // MMX_MOVFR642Qrr = 2327 |
| 146542 | CEFBS_None, // MMX_MOVNTQmr = 2328 |
| 146543 | CEFBS_None, // MMX_MOVQ2DQrr = 2329 |
| 146544 | CEFBS_None, // MMX_MOVQ2FR64rr = 2330 |
| 146545 | CEFBS_None, // MMX_MOVQ64mr = 2331 |
| 146546 | CEFBS_None, // MMX_MOVQ64rm = 2332 |
| 146547 | CEFBS_None, // MMX_MOVQ64rr = 2333 |
| 146548 | CEFBS_None, // MMX_MOVQ64rr_REV = 2334 |
| 146549 | CEFBS_None, // MMX_PABSBrm = 2335 |
| 146550 | CEFBS_None, // MMX_PABSBrr = 2336 |
| 146551 | CEFBS_None, // MMX_PABSDrm = 2337 |
| 146552 | CEFBS_None, // MMX_PABSDrr = 2338 |
| 146553 | CEFBS_None, // MMX_PABSWrm = 2339 |
| 146554 | CEFBS_None, // MMX_PABSWrr = 2340 |
| 146555 | CEFBS_None, // MMX_PACKSSDWrm = 2341 |
| 146556 | CEFBS_None, // MMX_PACKSSDWrr = 2342 |
| 146557 | CEFBS_None, // MMX_PACKSSWBrm = 2343 |
| 146558 | CEFBS_None, // MMX_PACKSSWBrr = 2344 |
| 146559 | CEFBS_None, // MMX_PACKUSWBrm = 2345 |
| 146560 | CEFBS_None, // MMX_PACKUSWBrr = 2346 |
| 146561 | CEFBS_None, // MMX_PADDBrm = 2347 |
| 146562 | CEFBS_None, // MMX_PADDBrr = 2348 |
| 146563 | CEFBS_None, // MMX_PADDDrm = 2349 |
| 146564 | CEFBS_None, // MMX_PADDDrr = 2350 |
| 146565 | CEFBS_None, // MMX_PADDQrm = 2351 |
| 146566 | CEFBS_None, // MMX_PADDQrr = 2352 |
| 146567 | CEFBS_None, // MMX_PADDSBrm = 2353 |
| 146568 | CEFBS_None, // MMX_PADDSBrr = 2354 |
| 146569 | CEFBS_None, // MMX_PADDSWrm = 2355 |
| 146570 | CEFBS_None, // MMX_PADDSWrr = 2356 |
| 146571 | CEFBS_None, // MMX_PADDUSBrm = 2357 |
| 146572 | CEFBS_None, // MMX_PADDUSBrr = 2358 |
| 146573 | CEFBS_None, // MMX_PADDUSWrm = 2359 |
| 146574 | CEFBS_None, // MMX_PADDUSWrr = 2360 |
| 146575 | CEFBS_None, // MMX_PADDWrm = 2361 |
| 146576 | CEFBS_None, // MMX_PADDWrr = 2362 |
| 146577 | CEFBS_None, // MMX_PALIGNRrmi = 2363 |
| 146578 | CEFBS_None, // MMX_PALIGNRrri = 2364 |
| 146579 | CEFBS_None, // MMX_PANDNrm = 2365 |
| 146580 | CEFBS_None, // MMX_PANDNrr = 2366 |
| 146581 | CEFBS_None, // MMX_PANDrm = 2367 |
| 146582 | CEFBS_None, // MMX_PANDrr = 2368 |
| 146583 | CEFBS_None, // MMX_PAVGBrm = 2369 |
| 146584 | CEFBS_None, // MMX_PAVGBrr = 2370 |
| 146585 | CEFBS_None, // MMX_PAVGWrm = 2371 |
| 146586 | CEFBS_None, // MMX_PAVGWrr = 2372 |
| 146587 | CEFBS_None, // MMX_PCMPEQBrm = 2373 |
| 146588 | CEFBS_None, // MMX_PCMPEQBrr = 2374 |
| 146589 | CEFBS_None, // MMX_PCMPEQDrm = 2375 |
| 146590 | CEFBS_None, // MMX_PCMPEQDrr = 2376 |
| 146591 | CEFBS_None, // MMX_PCMPEQWrm = 2377 |
| 146592 | CEFBS_None, // MMX_PCMPEQWrr = 2378 |
| 146593 | CEFBS_None, // MMX_PCMPGTBrm = 2379 |
| 146594 | CEFBS_None, // MMX_PCMPGTBrr = 2380 |
| 146595 | CEFBS_None, // MMX_PCMPGTDrm = 2381 |
| 146596 | CEFBS_None, // MMX_PCMPGTDrr = 2382 |
| 146597 | CEFBS_None, // MMX_PCMPGTWrm = 2383 |
| 146598 | CEFBS_None, // MMX_PCMPGTWrr = 2384 |
| 146599 | CEFBS_None, // MMX_PEXTRWrr = 2385 |
| 146600 | CEFBS_None, // MMX_PHADDDrm = 2386 |
| 146601 | CEFBS_None, // MMX_PHADDDrr = 2387 |
| 146602 | CEFBS_None, // MMX_PHADDSWrm = 2388 |
| 146603 | CEFBS_None, // MMX_PHADDSWrr = 2389 |
| 146604 | CEFBS_None, // MMX_PHADDWrm = 2390 |
| 146605 | CEFBS_None, // MMX_PHADDWrr = 2391 |
| 146606 | CEFBS_None, // MMX_PHSUBDrm = 2392 |
| 146607 | CEFBS_None, // MMX_PHSUBDrr = 2393 |
| 146608 | CEFBS_None, // MMX_PHSUBSWrm = 2394 |
| 146609 | CEFBS_None, // MMX_PHSUBSWrr = 2395 |
| 146610 | CEFBS_None, // MMX_PHSUBWrm = 2396 |
| 146611 | CEFBS_None, // MMX_PHSUBWrr = 2397 |
| 146612 | CEFBS_None, // MMX_PINSRWrm = 2398 |
| 146613 | CEFBS_None, // MMX_PINSRWrr = 2399 |
| 146614 | CEFBS_None, // MMX_PMADDUBSWrm = 2400 |
| 146615 | CEFBS_None, // MMX_PMADDUBSWrr = 2401 |
| 146616 | CEFBS_None, // MMX_PMADDWDrm = 2402 |
| 146617 | CEFBS_None, // MMX_PMADDWDrr = 2403 |
| 146618 | CEFBS_None, // MMX_PMAXSWrm = 2404 |
| 146619 | CEFBS_None, // MMX_PMAXSWrr = 2405 |
| 146620 | CEFBS_None, // MMX_PMAXUBrm = 2406 |
| 146621 | CEFBS_None, // MMX_PMAXUBrr = 2407 |
| 146622 | CEFBS_None, // MMX_PMINSWrm = 2408 |
| 146623 | CEFBS_None, // MMX_PMINSWrr = 2409 |
| 146624 | CEFBS_None, // MMX_PMINUBrm = 2410 |
| 146625 | CEFBS_None, // MMX_PMINUBrr = 2411 |
| 146626 | CEFBS_None, // MMX_PMOVMSKBrr = 2412 |
| 146627 | CEFBS_None, // MMX_PMULHRSWrm = 2413 |
| 146628 | CEFBS_None, // MMX_PMULHRSWrr = 2414 |
| 146629 | CEFBS_None, // MMX_PMULHUWrm = 2415 |
| 146630 | CEFBS_None, // MMX_PMULHUWrr = 2416 |
| 146631 | CEFBS_None, // MMX_PMULHWrm = 2417 |
| 146632 | CEFBS_None, // MMX_PMULHWrr = 2418 |
| 146633 | CEFBS_None, // MMX_PMULLWrm = 2419 |
| 146634 | CEFBS_None, // MMX_PMULLWrr = 2420 |
| 146635 | CEFBS_None, // MMX_PMULUDQrm = 2421 |
| 146636 | CEFBS_None, // MMX_PMULUDQrr = 2422 |
| 146637 | CEFBS_None, // MMX_PORrm = 2423 |
| 146638 | CEFBS_None, // MMX_PORrr = 2424 |
| 146639 | CEFBS_None, // MMX_PSADBWrm = 2425 |
| 146640 | CEFBS_None, // MMX_PSADBWrr = 2426 |
| 146641 | CEFBS_None, // MMX_PSHUFBrm = 2427 |
| 146642 | CEFBS_None, // MMX_PSHUFBrr = 2428 |
| 146643 | CEFBS_None, // MMX_PSHUFWmi = 2429 |
| 146644 | CEFBS_None, // MMX_PSHUFWri = 2430 |
| 146645 | CEFBS_None, // MMX_PSIGNBrm = 2431 |
| 146646 | CEFBS_None, // MMX_PSIGNBrr = 2432 |
| 146647 | CEFBS_None, // MMX_PSIGNDrm = 2433 |
| 146648 | CEFBS_None, // MMX_PSIGNDrr = 2434 |
| 146649 | CEFBS_None, // MMX_PSIGNWrm = 2435 |
| 146650 | CEFBS_None, // MMX_PSIGNWrr = 2436 |
| 146651 | CEFBS_None, // MMX_PSLLDri = 2437 |
| 146652 | CEFBS_None, // MMX_PSLLDrm = 2438 |
| 146653 | CEFBS_None, // MMX_PSLLDrr = 2439 |
| 146654 | CEFBS_None, // MMX_PSLLQri = 2440 |
| 146655 | CEFBS_None, // MMX_PSLLQrm = 2441 |
| 146656 | CEFBS_None, // MMX_PSLLQrr = 2442 |
| 146657 | CEFBS_None, // MMX_PSLLWri = 2443 |
| 146658 | CEFBS_None, // MMX_PSLLWrm = 2444 |
| 146659 | CEFBS_None, // MMX_PSLLWrr = 2445 |
| 146660 | CEFBS_None, // MMX_PSRADri = 2446 |
| 146661 | CEFBS_None, // MMX_PSRADrm = 2447 |
| 146662 | CEFBS_None, // MMX_PSRADrr = 2448 |
| 146663 | CEFBS_None, // MMX_PSRAWri = 2449 |
| 146664 | CEFBS_None, // MMX_PSRAWrm = 2450 |
| 146665 | CEFBS_None, // MMX_PSRAWrr = 2451 |
| 146666 | CEFBS_None, // MMX_PSRLDri = 2452 |
| 146667 | CEFBS_None, // MMX_PSRLDrm = 2453 |
| 146668 | CEFBS_None, // MMX_PSRLDrr = 2454 |
| 146669 | CEFBS_None, // MMX_PSRLQri = 2455 |
| 146670 | CEFBS_None, // MMX_PSRLQrm = 2456 |
| 146671 | CEFBS_None, // MMX_PSRLQrr = 2457 |
| 146672 | CEFBS_None, // MMX_PSRLWri = 2458 |
| 146673 | CEFBS_None, // MMX_PSRLWrm = 2459 |
| 146674 | CEFBS_None, // MMX_PSRLWrr = 2460 |
| 146675 | CEFBS_None, // MMX_PSUBBrm = 2461 |
| 146676 | CEFBS_None, // MMX_PSUBBrr = 2462 |
| 146677 | CEFBS_None, // MMX_PSUBDrm = 2463 |
| 146678 | CEFBS_None, // MMX_PSUBDrr = 2464 |
| 146679 | CEFBS_None, // MMX_PSUBQrm = 2465 |
| 146680 | CEFBS_None, // MMX_PSUBQrr = 2466 |
| 146681 | CEFBS_None, // MMX_PSUBSBrm = 2467 |
| 146682 | CEFBS_None, // MMX_PSUBSBrr = 2468 |
| 146683 | CEFBS_None, // MMX_PSUBSWrm = 2469 |
| 146684 | CEFBS_None, // MMX_PSUBSWrr = 2470 |
| 146685 | CEFBS_None, // MMX_PSUBUSBrm = 2471 |
| 146686 | CEFBS_None, // MMX_PSUBUSBrr = 2472 |
| 146687 | CEFBS_None, // MMX_PSUBUSWrm = 2473 |
| 146688 | CEFBS_None, // MMX_PSUBUSWrr = 2474 |
| 146689 | CEFBS_None, // MMX_PSUBWrm = 2475 |
| 146690 | CEFBS_None, // MMX_PSUBWrr = 2476 |
| 146691 | CEFBS_None, // MMX_PUNPCKHBWrm = 2477 |
| 146692 | CEFBS_None, // MMX_PUNPCKHBWrr = 2478 |
| 146693 | CEFBS_None, // MMX_PUNPCKHDQrm = 2479 |
| 146694 | CEFBS_None, // MMX_PUNPCKHDQrr = 2480 |
| 146695 | CEFBS_None, // MMX_PUNPCKHWDrm = 2481 |
| 146696 | CEFBS_None, // MMX_PUNPCKHWDrr = 2482 |
| 146697 | CEFBS_None, // MMX_PUNPCKLBWrm = 2483 |
| 146698 | CEFBS_None, // MMX_PUNPCKLBWrr = 2484 |
| 146699 | CEFBS_None, // MMX_PUNPCKLDQrm = 2485 |
| 146700 | CEFBS_None, // MMX_PUNPCKLDQrr = 2486 |
| 146701 | CEFBS_None, // MMX_PUNPCKLWDrm = 2487 |
| 146702 | CEFBS_None, // MMX_PUNPCKLWDrr = 2488 |
| 146703 | CEFBS_None, // MMX_PXORrm = 2489 |
| 146704 | CEFBS_None, // MMX_PXORrr = 2490 |
| 146705 | CEFBS_Not64BitMode, // MONITOR32rrr = 2491 |
| 146706 | CEFBS_In64BitMode, // MONITOR64rrr = 2492 |
| 146707 | CEFBS_Not64BitMode, // MONITORX32rrr = 2493 |
| 146708 | CEFBS_In64BitMode, // MONITORX64rrr = 2494 |
| 146709 | CEFBS_None, // MONTMUL = 2495 |
| 146710 | CEFBS_None, // MOV16ao16 = 2496 |
| 146711 | CEFBS_None, // MOV16ao32 = 2497 |
| 146712 | CEFBS_None, // MOV16ao64 = 2498 |
| 146713 | CEFBS_None, // MOV16mi = 2499 |
| 146714 | CEFBS_None, // MOV16mr = 2500 |
| 146715 | CEFBS_None, // MOV16ms = 2501 |
| 146716 | CEFBS_None, // MOV16o16a = 2502 |
| 146717 | CEFBS_None, // MOV16o32a = 2503 |
| 146718 | CEFBS_None, // MOV16o64a = 2504 |
| 146719 | CEFBS_None, // MOV16ri = 2505 |
| 146720 | CEFBS_None, // MOV16ri_alt = 2506 |
| 146721 | CEFBS_None, // MOV16rm = 2507 |
| 146722 | CEFBS_None, // MOV16rr = 2508 |
| 146723 | CEFBS_None, // MOV16rr_REV = 2509 |
| 146724 | CEFBS_None, // MOV16rs = 2510 |
| 146725 | CEFBS_None, // MOV16sm = 2511 |
| 146726 | CEFBS_None, // MOV16sr = 2512 |
| 146727 | CEFBS_None, // MOV32ao16 = 2513 |
| 146728 | CEFBS_None, // MOV32ao32 = 2514 |
| 146729 | CEFBS_None, // MOV32ao64 = 2515 |
| 146730 | CEFBS_Not64BitMode, // MOV32cr = 2516 |
| 146731 | CEFBS_Not64BitMode, // MOV32dr = 2517 |
| 146732 | CEFBS_None, // MOV32mi = 2518 |
| 146733 | CEFBS_None, // MOV32mr = 2519 |
| 146734 | CEFBS_None, // MOV32o16a = 2520 |
| 146735 | CEFBS_None, // MOV32o32a = 2521 |
| 146736 | CEFBS_None, // MOV32o64a = 2522 |
| 146737 | CEFBS_Not64BitMode, // MOV32rc = 2523 |
| 146738 | CEFBS_Not64BitMode, // MOV32rd = 2524 |
| 146739 | CEFBS_None, // MOV32ri = 2525 |
| 146740 | CEFBS_None, // MOV32ri_alt = 2526 |
| 146741 | CEFBS_None, // MOV32rm = 2527 |
| 146742 | CEFBS_None, // MOV32rr = 2528 |
| 146743 | CEFBS_None, // MOV32rr_REV = 2529 |
| 146744 | CEFBS_None, // MOV32rs = 2530 |
| 146745 | CEFBS_None, // MOV32sr = 2531 |
| 146746 | CEFBS_None, // MOV64ao32 = 2532 |
| 146747 | CEFBS_None, // MOV64ao64 = 2533 |
| 146748 | CEFBS_In64BitMode, // MOV64cr = 2534 |
| 146749 | CEFBS_In64BitMode, // MOV64dr = 2535 |
| 146750 | CEFBS_In64BitMode, // MOV64mi32 = 2536 |
| 146751 | CEFBS_None, // MOV64mr = 2537 |
| 146752 | CEFBS_None, // MOV64o32a = 2538 |
| 146753 | CEFBS_None, // MOV64o64a = 2539 |
| 146754 | CEFBS_In64BitMode, // MOV64rc = 2540 |
| 146755 | CEFBS_In64BitMode, // MOV64rd = 2541 |
| 146756 | CEFBS_None, // MOV64ri = 2542 |
| 146757 | CEFBS_None, // MOV64ri32 = 2543 |
| 146758 | CEFBS_None, // MOV64rm = 2544 |
| 146759 | CEFBS_None, // MOV64rr = 2545 |
| 146760 | CEFBS_None, // MOV64rr_REV = 2546 |
| 146761 | CEFBS_None, // MOV64rs = 2547 |
| 146762 | CEFBS_None, // MOV64sr = 2548 |
| 146763 | CEFBS_None, // MOV64toPQIrm = 2549 |
| 146764 | CEFBS_None, // MOV64toPQIrr = 2550 |
| 146765 | CEFBS_None, // MOV64toSDrr = 2551 |
| 146766 | CEFBS_None, // MOV8ao16 = 2552 |
| 146767 | CEFBS_None, // MOV8ao32 = 2553 |
| 146768 | CEFBS_None, // MOV8ao64 = 2554 |
| 146769 | CEFBS_None, // MOV8mi = 2555 |
| 146770 | CEFBS_None, // MOV8mr = 2556 |
| 146771 | CEFBS_None, // MOV8mr_NOREX = 2557 |
| 146772 | CEFBS_None, // MOV8o16a = 2558 |
| 146773 | CEFBS_None, // MOV8o32a = 2559 |
| 146774 | CEFBS_None, // MOV8o64a = 2560 |
| 146775 | CEFBS_None, // MOV8ri = 2561 |
| 146776 | CEFBS_None, // MOV8ri_alt = 2562 |
| 146777 | CEFBS_None, // MOV8rm = 2563 |
| 146778 | CEFBS_None, // MOV8rm_NOREX = 2564 |
| 146779 | CEFBS_None, // MOV8rr = 2565 |
| 146780 | CEFBS_None, // MOV8rr_NOREX = 2566 |
| 146781 | CEFBS_None, // MOV8rr_REV = 2567 |
| 146782 | CEFBS_None, // MOVAPDmr = 2568 |
| 146783 | CEFBS_None, // MOVAPDrm = 2569 |
| 146784 | CEFBS_None, // MOVAPDrr = 2570 |
| 146785 | CEFBS_None, // MOVAPDrr_REV = 2571 |
| 146786 | CEFBS_None, // MOVAPSmr = 2572 |
| 146787 | CEFBS_None, // MOVAPSrm = 2573 |
| 146788 | CEFBS_None, // MOVAPSrr = 2574 |
| 146789 | CEFBS_None, // MOVAPSrr_REV = 2575 |
| 146790 | CEFBS_None, // MOVBE16mr = 2576 |
| 146791 | CEFBS_In64BitMode, // MOVBE16mr_EVEX = 2577 |
| 146792 | CEFBS_None, // MOVBE16rm = 2578 |
| 146793 | CEFBS_In64BitMode, // MOVBE16rm_EVEX = 2579 |
| 146794 | CEFBS_In64BitMode, // MOVBE16rr = 2580 |
| 146795 | CEFBS_In64BitMode, // MOVBE16rr_REV = 2581 |
| 146796 | CEFBS_None, // MOVBE32mr = 2582 |
| 146797 | CEFBS_In64BitMode, // MOVBE32mr_EVEX = 2583 |
| 146798 | CEFBS_None, // MOVBE32rm = 2584 |
| 146799 | CEFBS_In64BitMode, // MOVBE32rm_EVEX = 2585 |
| 146800 | CEFBS_In64BitMode, // MOVBE32rr = 2586 |
| 146801 | CEFBS_In64BitMode, // MOVBE32rr_REV = 2587 |
| 146802 | CEFBS_None, // MOVBE64mr = 2588 |
| 146803 | CEFBS_In64BitMode, // MOVBE64mr_EVEX = 2589 |
| 146804 | CEFBS_None, // MOVBE64rm = 2590 |
| 146805 | CEFBS_In64BitMode, // MOVBE64rm_EVEX = 2591 |
| 146806 | CEFBS_In64BitMode, // MOVBE64rr = 2592 |
| 146807 | CEFBS_In64BitMode, // MOVBE64rr_REV = 2593 |
| 146808 | CEFBS_None, // MOVDDUPrm = 2594 |
| 146809 | CEFBS_None, // MOVDDUPrr = 2595 |
| 146810 | CEFBS_None, // MOVDI2PDIrm = 2596 |
| 146811 | CEFBS_None, // MOVDI2PDIrr = 2597 |
| 146812 | CEFBS_None, // MOVDI2SSrr = 2598 |
| 146813 | CEFBS_Not64BitMode, // MOVDIR64B16 = 2599 |
| 146814 | CEFBS_None, // MOVDIR64B32 = 2600 |
| 146815 | CEFBS_In64BitMode, // MOVDIR64B32_EVEX = 2601 |
| 146816 | CEFBS_In64BitMode, // MOVDIR64B64 = 2602 |
| 146817 | CEFBS_In64BitMode, // MOVDIR64B64_EVEX = 2603 |
| 146818 | CEFBS_None, // MOVDIRI32 = 2604 |
| 146819 | CEFBS_In64BitMode, // MOVDIRI32_EVEX = 2605 |
| 146820 | CEFBS_In64BitMode, // MOVDIRI64 = 2606 |
| 146821 | CEFBS_In64BitMode, // MOVDIRI64_EVEX = 2607 |
| 146822 | CEFBS_None, // MOVDQAmr = 2608 |
| 146823 | CEFBS_None, // MOVDQArm = 2609 |
| 146824 | CEFBS_None, // MOVDQArr = 2610 |
| 146825 | CEFBS_None, // MOVDQArr_REV = 2611 |
| 146826 | CEFBS_None, // MOVDQUmr = 2612 |
| 146827 | CEFBS_None, // MOVDQUrm = 2613 |
| 146828 | CEFBS_None, // MOVDQUrr = 2614 |
| 146829 | CEFBS_None, // MOVDQUrr_REV = 2615 |
| 146830 | CEFBS_None, // MOVHLPSrr = 2616 |
| 146831 | CEFBS_None, // MOVHPDmr = 2617 |
| 146832 | CEFBS_None, // MOVHPDrm = 2618 |
| 146833 | CEFBS_None, // MOVHPSmr = 2619 |
| 146834 | CEFBS_None, // MOVHPSrm = 2620 |
| 146835 | CEFBS_None, // MOVLHPSrr = 2621 |
| 146836 | CEFBS_None, // MOVLPDmr = 2622 |
| 146837 | CEFBS_None, // MOVLPDrm = 2623 |
| 146838 | CEFBS_None, // MOVLPSmr = 2624 |
| 146839 | CEFBS_None, // MOVLPSrm = 2625 |
| 146840 | CEFBS_None, // MOVMSKPDrr = 2626 |
| 146841 | CEFBS_None, // MOVMSKPSrr = 2627 |
| 146842 | CEFBS_None, // MOVNTDQArm = 2628 |
| 146843 | CEFBS_None, // MOVNTDQmr = 2629 |
| 146844 | CEFBS_None, // MOVNTI_64mr = 2630 |
| 146845 | CEFBS_None, // MOVNTImr = 2631 |
| 146846 | CEFBS_None, // MOVNTPDmr = 2632 |
| 146847 | CEFBS_None, // MOVNTPSmr = 2633 |
| 146848 | CEFBS_None, // MOVNTSD = 2634 |
| 146849 | CEFBS_None, // MOVNTSS = 2635 |
| 146850 | CEFBS_None, // MOVPC32r = 2636 |
| 146851 | CEFBS_None, // MOVPDI2DImr = 2637 |
| 146852 | CEFBS_None, // MOVPDI2DIrr = 2638 |
| 146853 | CEFBS_None, // MOVPQI2QImr = 2639 |
| 146854 | CEFBS_None, // MOVPQI2QIrr = 2640 |
| 146855 | CEFBS_None, // MOVPQIto64mr = 2641 |
| 146856 | CEFBS_None, // MOVPQIto64rr = 2642 |
| 146857 | CEFBS_None, // MOVQI2PQIrm = 2643 |
| 146858 | CEFBS_None, // MOVSB = 2644 |
| 146859 | CEFBS_None, // MOVSDmr = 2645 |
| 146860 | CEFBS_None, // MOVSDrm = 2646 |
| 146861 | CEFBS_None, // MOVSDrm_alt = 2647 |
| 146862 | CEFBS_None, // MOVSDrr = 2648 |
| 146863 | CEFBS_None, // MOVSDrr_REV = 2649 |
| 146864 | CEFBS_None, // MOVSDto64rr = 2650 |
| 146865 | CEFBS_None, // MOVSHDUPrm = 2651 |
| 146866 | CEFBS_None, // MOVSHDUPrr = 2652 |
| 146867 | CEFBS_None, // MOVSL = 2653 |
| 146868 | CEFBS_None, // MOVSLDUPrm = 2654 |
| 146869 | CEFBS_None, // MOVSLDUPrr = 2655 |
| 146870 | CEFBS_In64BitMode, // MOVSQ = 2656 |
| 146871 | CEFBS_None, // MOVSS2DIrr = 2657 |
| 146872 | CEFBS_None, // MOVSSmr = 2658 |
| 146873 | CEFBS_None, // MOVSSrm = 2659 |
| 146874 | CEFBS_None, // MOVSSrm_alt = 2660 |
| 146875 | CEFBS_None, // MOVSSrr = 2661 |
| 146876 | CEFBS_None, // MOVSSrr_REV = 2662 |
| 146877 | CEFBS_None, // MOVSW = 2663 |
| 146878 | CEFBS_None, // MOVSX16rm16 = 2664 |
| 146879 | CEFBS_In64BitMode, // MOVSX16rm32 = 2665 |
| 146880 | CEFBS_None, // MOVSX16rm8 = 2666 |
| 146881 | CEFBS_None, // MOVSX16rr16 = 2667 |
| 146882 | CEFBS_In64BitMode, // MOVSX16rr32 = 2668 |
| 146883 | CEFBS_None, // MOVSX16rr8 = 2669 |
| 146884 | CEFBS_None, // MOVSX32rm16 = 2670 |
| 146885 | CEFBS_In64BitMode, // MOVSX32rm32 = 2671 |
| 146886 | CEFBS_None, // MOVSX32rm8 = 2672 |
| 146887 | CEFBS_None, // MOVSX32rm8_NOREX = 2673 |
| 146888 | CEFBS_None, // MOVSX32rr16 = 2674 |
| 146889 | CEFBS_In64BitMode, // MOVSX32rr32 = 2675 |
| 146890 | CEFBS_None, // MOVSX32rr8 = 2676 |
| 146891 | CEFBS_None, // MOVSX32rr8_NOREX = 2677 |
| 146892 | CEFBS_None, // MOVSX64rm16 = 2678 |
| 146893 | CEFBS_In64BitMode, // MOVSX64rm32 = 2679 |
| 146894 | CEFBS_None, // MOVSX64rm8 = 2680 |
| 146895 | CEFBS_None, // MOVSX64rr16 = 2681 |
| 146896 | CEFBS_In64BitMode, // MOVSX64rr32 = 2682 |
| 146897 | CEFBS_None, // MOVSX64rr8 = 2683 |
| 146898 | CEFBS_None, // MOVUPDmr = 2684 |
| 146899 | CEFBS_None, // MOVUPDrm = 2685 |
| 146900 | CEFBS_None, // MOVUPDrr = 2686 |
| 146901 | CEFBS_None, // MOVUPDrr_REV = 2687 |
| 146902 | CEFBS_None, // MOVUPSmr = 2688 |
| 146903 | CEFBS_None, // MOVUPSrm = 2689 |
| 146904 | CEFBS_None, // MOVUPSrr = 2690 |
| 146905 | CEFBS_None, // MOVUPSrr_REV = 2691 |
| 146906 | CEFBS_None, // MOVZPQILo2PQIrr = 2692 |
| 146907 | CEFBS_None, // MOVZX16rm16 = 2693 |
| 146908 | CEFBS_None, // MOVZX16rm8 = 2694 |
| 146909 | CEFBS_None, // MOVZX16rr16 = 2695 |
| 146910 | CEFBS_None, // MOVZX16rr8 = 2696 |
| 146911 | CEFBS_None, // MOVZX32rm16 = 2697 |
| 146912 | CEFBS_None, // MOVZX32rm8 = 2698 |
| 146913 | CEFBS_None, // MOVZX32rm8_NOREX = 2699 |
| 146914 | CEFBS_None, // MOVZX32rr16 = 2700 |
| 146915 | CEFBS_None, // MOVZX32rr8 = 2701 |
| 146916 | CEFBS_None, // MOVZX32rr8_NOREX = 2702 |
| 146917 | CEFBS_None, // MOVZX64rm16 = 2703 |
| 146918 | CEFBS_None, // MOVZX64rm8 = 2704 |
| 146919 | CEFBS_None, // MOVZX64rr16 = 2705 |
| 146920 | CEFBS_None, // MOVZX64rr8 = 2706 |
| 146921 | CEFBS_None, // MPSADBWrmi = 2707 |
| 146922 | CEFBS_None, // MPSADBWrri = 2708 |
| 146923 | CEFBS_None, // MUL16m = 2709 |
| 146924 | CEFBS_In64BitMode, // MUL16m_EVEX = 2710 |
| 146925 | CEFBS_In64BitMode, // MUL16m_NF = 2711 |
| 146926 | CEFBS_None, // MUL16r = 2712 |
| 146927 | CEFBS_In64BitMode, // MUL16r_EVEX = 2713 |
| 146928 | CEFBS_In64BitMode, // MUL16r_NF = 2714 |
| 146929 | CEFBS_None, // MUL32m = 2715 |
| 146930 | CEFBS_In64BitMode, // MUL32m_EVEX = 2716 |
| 146931 | CEFBS_In64BitMode, // MUL32m_NF = 2717 |
| 146932 | CEFBS_None, // MUL32r = 2718 |
| 146933 | CEFBS_In64BitMode, // MUL32r_EVEX = 2719 |
| 146934 | CEFBS_In64BitMode, // MUL32r_NF = 2720 |
| 146935 | CEFBS_In64BitMode, // MUL64m = 2721 |
| 146936 | CEFBS_In64BitMode, // MUL64m_EVEX = 2722 |
| 146937 | CEFBS_In64BitMode, // MUL64m_NF = 2723 |
| 146938 | CEFBS_None, // MUL64r = 2724 |
| 146939 | CEFBS_In64BitMode, // MUL64r_EVEX = 2725 |
| 146940 | CEFBS_In64BitMode, // MUL64r_NF = 2726 |
| 146941 | CEFBS_None, // MUL8m = 2727 |
| 146942 | CEFBS_In64BitMode, // MUL8m_EVEX = 2728 |
| 146943 | CEFBS_In64BitMode, // MUL8m_NF = 2729 |
| 146944 | CEFBS_None, // MUL8r = 2730 |
| 146945 | CEFBS_In64BitMode, // MUL8r_EVEX = 2731 |
| 146946 | CEFBS_In64BitMode, // MUL8r_NF = 2732 |
| 146947 | CEFBS_None, // MULPDrm = 2733 |
| 146948 | CEFBS_None, // MULPDrr = 2734 |
| 146949 | CEFBS_None, // MULPSrm = 2735 |
| 146950 | CEFBS_None, // MULPSrr = 2736 |
| 146951 | CEFBS_None, // MULSDrm = 2737 |
| 146952 | CEFBS_None, // MULSDrm_Int = 2738 |
| 146953 | CEFBS_None, // MULSDrr = 2739 |
| 146954 | CEFBS_None, // MULSDrr_Int = 2740 |
| 146955 | CEFBS_None, // MULSSrm = 2741 |
| 146956 | CEFBS_None, // MULSSrm_Int = 2742 |
| 146957 | CEFBS_None, // MULSSrr = 2743 |
| 146958 | CEFBS_None, // MULSSrr_Int = 2744 |
| 146959 | CEFBS_None, // MULX32Hrm = 2745 |
| 146960 | CEFBS_None, // MULX32Hrr = 2746 |
| 146961 | CEFBS_None, // MULX32rm = 2747 |
| 146962 | CEFBS_In64BitMode, // MULX32rm_EVEX = 2748 |
| 146963 | CEFBS_None, // MULX32rr = 2749 |
| 146964 | CEFBS_In64BitMode, // MULX32rr_EVEX = 2750 |
| 146965 | CEFBS_None, // MULX64Hrm = 2751 |
| 146966 | CEFBS_None, // MULX64Hrr = 2752 |
| 146967 | CEFBS_None, // MULX64rm = 2753 |
| 146968 | CEFBS_In64BitMode, // MULX64rm_EVEX = 2754 |
| 146969 | CEFBS_None, // MULX64rr = 2755 |
| 146970 | CEFBS_In64BitMode, // MULX64rr_EVEX = 2756 |
| 146971 | CEFBS_None, // MUL_F32m = 2757 |
| 146972 | CEFBS_None, // MUL_F64m = 2758 |
| 146973 | CEFBS_None, // MUL_FI16m = 2759 |
| 146974 | CEFBS_None, // MUL_FI32m = 2760 |
| 146975 | CEFBS_None, // MUL_FPrST0 = 2761 |
| 146976 | CEFBS_None, // MUL_FST0r = 2762 |
| 146977 | CEFBS_None, // MUL_Fp32 = 2763 |
| 146978 | CEFBS_None, // MUL_Fp32m = 2764 |
| 146979 | CEFBS_None, // MUL_Fp64 = 2765 |
| 146980 | CEFBS_None, // MUL_Fp64m = 2766 |
| 146981 | CEFBS_None, // MUL_Fp64m32 = 2767 |
| 146982 | CEFBS_None, // MUL_Fp80 = 2768 |
| 146983 | CEFBS_None, // MUL_Fp80m32 = 2769 |
| 146984 | CEFBS_None, // MUL_Fp80m64 = 2770 |
| 146985 | CEFBS_None, // MUL_FpI16m32 = 2771 |
| 146986 | CEFBS_None, // MUL_FpI16m64 = 2772 |
| 146987 | CEFBS_None, // MUL_FpI16m80 = 2773 |
| 146988 | CEFBS_None, // MUL_FpI32m32 = 2774 |
| 146989 | CEFBS_None, // MUL_FpI32m64 = 2775 |
| 146990 | CEFBS_None, // MUL_FpI32m80 = 2776 |
| 146991 | CEFBS_None, // MUL_FrST0 = 2777 |
| 146992 | CEFBS_None, // MWAITXrrr = 2778 |
| 146993 | CEFBS_None, // MWAITrr = 2779 |
| 146994 | CEFBS_None, // NEG16m = 2780 |
| 146995 | CEFBS_In64BitMode, // NEG16m_EVEX = 2781 |
| 146996 | CEFBS_In64BitMode, // NEG16m_ND = 2782 |
| 146997 | CEFBS_In64BitMode, // NEG16m_NF = 2783 |
| 146998 | CEFBS_In64BitMode, // NEG16m_NF_ND = 2784 |
| 146999 | CEFBS_None, // NEG16r = 2785 |
| 147000 | CEFBS_In64BitMode, // NEG16r_EVEX = 2786 |
| 147001 | CEFBS_In64BitMode, // NEG16r_ND = 2787 |
| 147002 | CEFBS_In64BitMode, // NEG16r_NF = 2788 |
| 147003 | CEFBS_In64BitMode, // NEG16r_NF_ND = 2789 |
| 147004 | CEFBS_None, // NEG32m = 2790 |
| 147005 | CEFBS_In64BitMode, // NEG32m_EVEX = 2791 |
| 147006 | CEFBS_In64BitMode, // NEG32m_ND = 2792 |
| 147007 | CEFBS_In64BitMode, // NEG32m_NF = 2793 |
| 147008 | CEFBS_In64BitMode, // NEG32m_NF_ND = 2794 |
| 147009 | CEFBS_None, // NEG32r = 2795 |
| 147010 | CEFBS_In64BitMode, // NEG32r_EVEX = 2796 |
| 147011 | CEFBS_In64BitMode, // NEG32r_ND = 2797 |
| 147012 | CEFBS_In64BitMode, // NEG32r_NF = 2798 |
| 147013 | CEFBS_In64BitMode, // NEG32r_NF_ND = 2799 |
| 147014 | CEFBS_In64BitMode, // NEG64m = 2800 |
| 147015 | CEFBS_In64BitMode, // NEG64m_EVEX = 2801 |
| 147016 | CEFBS_In64BitMode, // NEG64m_ND = 2802 |
| 147017 | CEFBS_In64BitMode, // NEG64m_NF = 2803 |
| 147018 | CEFBS_In64BitMode, // NEG64m_NF_ND = 2804 |
| 147019 | CEFBS_None, // NEG64r = 2805 |
| 147020 | CEFBS_In64BitMode, // NEG64r_EVEX = 2806 |
| 147021 | CEFBS_In64BitMode, // NEG64r_ND = 2807 |
| 147022 | CEFBS_In64BitMode, // NEG64r_NF = 2808 |
| 147023 | CEFBS_In64BitMode, // NEG64r_NF_ND = 2809 |
| 147024 | CEFBS_None, // NEG8m = 2810 |
| 147025 | CEFBS_In64BitMode, // NEG8m_EVEX = 2811 |
| 147026 | CEFBS_In64BitMode, // NEG8m_ND = 2812 |
| 147027 | CEFBS_In64BitMode, // NEG8m_NF = 2813 |
| 147028 | CEFBS_In64BitMode, // NEG8m_NF_ND = 2814 |
| 147029 | CEFBS_None, // NEG8r = 2815 |
| 147030 | CEFBS_In64BitMode, // NEG8r_EVEX = 2816 |
| 147031 | CEFBS_In64BitMode, // NEG8r_ND = 2817 |
| 147032 | CEFBS_In64BitMode, // NEG8r_NF = 2818 |
| 147033 | CEFBS_In64BitMode, // NEG8r_NF_ND = 2819 |
| 147034 | CEFBS_None, // NOOP = 2820 |
| 147035 | CEFBS_None, // NOOPL = 2821 |
| 147036 | CEFBS_None, // NOOPLr = 2822 |
| 147037 | CEFBS_In64BitMode, // NOOPQ = 2823 |
| 147038 | CEFBS_In64BitMode, // NOOPQr = 2824 |
| 147039 | CEFBS_None, // NOOPW = 2825 |
| 147040 | CEFBS_None, // NOOPWr = 2826 |
| 147041 | CEFBS_None, // NOT16m = 2827 |
| 147042 | CEFBS_In64BitMode, // NOT16m_EVEX = 2828 |
| 147043 | CEFBS_In64BitMode, // NOT16m_ND = 2829 |
| 147044 | CEFBS_None, // NOT16r = 2830 |
| 147045 | CEFBS_In64BitMode, // NOT16r_EVEX = 2831 |
| 147046 | CEFBS_In64BitMode, // NOT16r_ND = 2832 |
| 147047 | CEFBS_None, // NOT32m = 2833 |
| 147048 | CEFBS_In64BitMode, // NOT32m_EVEX = 2834 |
| 147049 | CEFBS_In64BitMode, // NOT32m_ND = 2835 |
| 147050 | CEFBS_None, // NOT32r = 2836 |
| 147051 | CEFBS_In64BitMode, // NOT32r_EVEX = 2837 |
| 147052 | CEFBS_In64BitMode, // NOT32r_ND = 2838 |
| 147053 | CEFBS_In64BitMode, // NOT64m = 2839 |
| 147054 | CEFBS_In64BitMode, // NOT64m_EVEX = 2840 |
| 147055 | CEFBS_In64BitMode, // NOT64m_ND = 2841 |
| 147056 | CEFBS_None, // NOT64r = 2842 |
| 147057 | CEFBS_In64BitMode, // NOT64r_EVEX = 2843 |
| 147058 | CEFBS_In64BitMode, // NOT64r_ND = 2844 |
| 147059 | CEFBS_None, // NOT8m = 2845 |
| 147060 | CEFBS_In64BitMode, // NOT8m_EVEX = 2846 |
| 147061 | CEFBS_In64BitMode, // NOT8m_ND = 2847 |
| 147062 | CEFBS_None, // NOT8r = 2848 |
| 147063 | CEFBS_In64BitMode, // NOT8r_EVEX = 2849 |
| 147064 | CEFBS_In64BitMode, // NOT8r_ND = 2850 |
| 147065 | CEFBS_None, // OR16i16 = 2851 |
| 147066 | CEFBS_None, // OR16mi = 2852 |
| 147067 | CEFBS_None, // OR16mi8 = 2853 |
| 147068 | CEFBS_In64BitMode, // OR16mi8_EVEX = 2854 |
| 147069 | CEFBS_In64BitMode, // OR16mi8_ND = 2855 |
| 147070 | CEFBS_In64BitMode, // OR16mi8_NF = 2856 |
| 147071 | CEFBS_In64BitMode, // OR16mi8_NF_ND = 2857 |
| 147072 | CEFBS_In64BitMode, // OR16mi_EVEX = 2858 |
| 147073 | CEFBS_In64BitMode, // OR16mi_ND = 2859 |
| 147074 | CEFBS_In64BitMode, // OR16mi_NF = 2860 |
| 147075 | CEFBS_In64BitMode, // OR16mi_NF_ND = 2861 |
| 147076 | CEFBS_None, // OR16mr = 2862 |
| 147077 | CEFBS_In64BitMode, // OR16mr_EVEX = 2863 |
| 147078 | CEFBS_In64BitMode, // OR16mr_ND = 2864 |
| 147079 | CEFBS_In64BitMode, // OR16mr_NF = 2865 |
| 147080 | CEFBS_In64BitMode, // OR16mr_NF_ND = 2866 |
| 147081 | CEFBS_None, // OR16ri = 2867 |
| 147082 | CEFBS_None, // OR16ri8 = 2868 |
| 147083 | CEFBS_In64BitMode, // OR16ri8_EVEX = 2869 |
| 147084 | CEFBS_In64BitMode, // OR16ri8_ND = 2870 |
| 147085 | CEFBS_In64BitMode, // OR16ri8_NF = 2871 |
| 147086 | CEFBS_In64BitMode, // OR16ri8_NF_ND = 2872 |
| 147087 | CEFBS_In64BitMode, // OR16ri_EVEX = 2873 |
| 147088 | CEFBS_In64BitMode, // OR16ri_ND = 2874 |
| 147089 | CEFBS_In64BitMode, // OR16ri_NF = 2875 |
| 147090 | CEFBS_In64BitMode, // OR16ri_NF_ND = 2876 |
| 147091 | CEFBS_None, // OR16rm = 2877 |
| 147092 | CEFBS_In64BitMode, // OR16rm_EVEX = 2878 |
| 147093 | CEFBS_In64BitMode, // OR16rm_ND = 2879 |
| 147094 | CEFBS_In64BitMode, // OR16rm_NF = 2880 |
| 147095 | CEFBS_In64BitMode, // OR16rm_NF_ND = 2881 |
| 147096 | CEFBS_None, // OR16rr = 2882 |
| 147097 | CEFBS_In64BitMode, // OR16rr_EVEX = 2883 |
| 147098 | CEFBS_In64BitMode, // OR16rr_EVEX_REV = 2884 |
| 147099 | CEFBS_In64BitMode, // OR16rr_ND = 2885 |
| 147100 | CEFBS_In64BitMode, // OR16rr_ND_REV = 2886 |
| 147101 | CEFBS_In64BitMode, // OR16rr_NF = 2887 |
| 147102 | CEFBS_In64BitMode, // OR16rr_NF_ND = 2888 |
| 147103 | CEFBS_In64BitMode, // OR16rr_NF_ND_REV = 2889 |
| 147104 | CEFBS_In64BitMode, // OR16rr_NF_REV = 2890 |
| 147105 | CEFBS_None, // OR16rr_REV = 2891 |
| 147106 | CEFBS_None, // OR32i32 = 2892 |
| 147107 | CEFBS_None, // OR32mi = 2893 |
| 147108 | CEFBS_None, // OR32mi8 = 2894 |
| 147109 | CEFBS_Not64BitMode, // OR32mi8Locked = 2895 |
| 147110 | CEFBS_In64BitMode, // OR32mi8_EVEX = 2896 |
| 147111 | CEFBS_In64BitMode, // OR32mi8_ND = 2897 |
| 147112 | CEFBS_In64BitMode, // OR32mi8_NF = 2898 |
| 147113 | CEFBS_In64BitMode, // OR32mi8_NF_ND = 2899 |
| 147114 | CEFBS_In64BitMode, // OR32mi_EVEX = 2900 |
| 147115 | CEFBS_In64BitMode, // OR32mi_ND = 2901 |
| 147116 | CEFBS_In64BitMode, // OR32mi_NF = 2902 |
| 147117 | CEFBS_In64BitMode, // OR32mi_NF_ND = 2903 |
| 147118 | CEFBS_None, // OR32mr = 2904 |
| 147119 | CEFBS_In64BitMode, // OR32mr_EVEX = 2905 |
| 147120 | CEFBS_In64BitMode, // OR32mr_ND = 2906 |
| 147121 | CEFBS_In64BitMode, // OR32mr_NF = 2907 |
| 147122 | CEFBS_In64BitMode, // OR32mr_NF_ND = 2908 |
| 147123 | CEFBS_None, // OR32ri = 2909 |
| 147124 | CEFBS_None, // OR32ri8 = 2910 |
| 147125 | CEFBS_In64BitMode, // OR32ri8_EVEX = 2911 |
| 147126 | CEFBS_In64BitMode, // OR32ri8_ND = 2912 |
| 147127 | CEFBS_In64BitMode, // OR32ri8_NF = 2913 |
| 147128 | CEFBS_In64BitMode, // OR32ri8_NF_ND = 2914 |
| 147129 | CEFBS_In64BitMode, // OR32ri_EVEX = 2915 |
| 147130 | CEFBS_In64BitMode, // OR32ri_ND = 2916 |
| 147131 | CEFBS_In64BitMode, // OR32ri_NF = 2917 |
| 147132 | CEFBS_In64BitMode, // OR32ri_NF_ND = 2918 |
| 147133 | CEFBS_None, // OR32rm = 2919 |
| 147134 | CEFBS_In64BitMode, // OR32rm_EVEX = 2920 |
| 147135 | CEFBS_In64BitMode, // OR32rm_ND = 2921 |
| 147136 | CEFBS_In64BitMode, // OR32rm_NF = 2922 |
| 147137 | CEFBS_In64BitMode, // OR32rm_NF_ND = 2923 |
| 147138 | CEFBS_None, // OR32rr = 2924 |
| 147139 | CEFBS_In64BitMode, // OR32rr_EVEX = 2925 |
| 147140 | CEFBS_In64BitMode, // OR32rr_EVEX_REV = 2926 |
| 147141 | CEFBS_In64BitMode, // OR32rr_ND = 2927 |
| 147142 | CEFBS_In64BitMode, // OR32rr_ND_REV = 2928 |
| 147143 | CEFBS_In64BitMode, // OR32rr_NF = 2929 |
| 147144 | CEFBS_In64BitMode, // OR32rr_NF_ND = 2930 |
| 147145 | CEFBS_In64BitMode, // OR32rr_NF_ND_REV = 2931 |
| 147146 | CEFBS_In64BitMode, // OR32rr_NF_REV = 2932 |
| 147147 | CEFBS_None, // OR32rr_REV = 2933 |
| 147148 | CEFBS_None, // OR64i32 = 2934 |
| 147149 | CEFBS_In64BitMode, // OR64mi32 = 2935 |
| 147150 | CEFBS_In64BitMode, // OR64mi32_EVEX = 2936 |
| 147151 | CEFBS_In64BitMode, // OR64mi32_ND = 2937 |
| 147152 | CEFBS_In64BitMode, // OR64mi32_NF = 2938 |
| 147153 | CEFBS_In64BitMode, // OR64mi32_NF_ND = 2939 |
| 147154 | CEFBS_In64BitMode, // OR64mi8 = 2940 |
| 147155 | CEFBS_In64BitMode, // OR64mi8_EVEX = 2941 |
| 147156 | CEFBS_In64BitMode, // OR64mi8_ND = 2942 |
| 147157 | CEFBS_In64BitMode, // OR64mi8_NF = 2943 |
| 147158 | CEFBS_In64BitMode, // OR64mi8_NF_ND = 2944 |
| 147159 | CEFBS_None, // OR64mr = 2945 |
| 147160 | CEFBS_In64BitMode, // OR64mr_EVEX = 2946 |
| 147161 | CEFBS_In64BitMode, // OR64mr_ND = 2947 |
| 147162 | CEFBS_In64BitMode, // OR64mr_NF = 2948 |
| 147163 | CEFBS_In64BitMode, // OR64mr_NF_ND = 2949 |
| 147164 | CEFBS_None, // OR64ri32 = 2950 |
| 147165 | CEFBS_In64BitMode, // OR64ri32_EVEX = 2951 |
| 147166 | CEFBS_In64BitMode, // OR64ri32_ND = 2952 |
| 147167 | CEFBS_In64BitMode, // OR64ri32_NF = 2953 |
| 147168 | CEFBS_In64BitMode, // OR64ri32_NF_ND = 2954 |
| 147169 | CEFBS_None, // OR64ri8 = 2955 |
| 147170 | CEFBS_In64BitMode, // OR64ri8_EVEX = 2956 |
| 147171 | CEFBS_In64BitMode, // OR64ri8_ND = 2957 |
| 147172 | CEFBS_In64BitMode, // OR64ri8_NF = 2958 |
| 147173 | CEFBS_In64BitMode, // OR64ri8_NF_ND = 2959 |
| 147174 | CEFBS_None, // OR64rm = 2960 |
| 147175 | CEFBS_In64BitMode, // OR64rm_EVEX = 2961 |
| 147176 | CEFBS_In64BitMode, // OR64rm_ND = 2962 |
| 147177 | CEFBS_In64BitMode, // OR64rm_NF = 2963 |
| 147178 | CEFBS_In64BitMode, // OR64rm_NF_ND = 2964 |
| 147179 | CEFBS_None, // OR64rr = 2965 |
| 147180 | CEFBS_In64BitMode, // OR64rr_EVEX = 2966 |
| 147181 | CEFBS_In64BitMode, // OR64rr_EVEX_REV = 2967 |
| 147182 | CEFBS_In64BitMode, // OR64rr_ND = 2968 |
| 147183 | CEFBS_In64BitMode, // OR64rr_ND_REV = 2969 |
| 147184 | CEFBS_In64BitMode, // OR64rr_NF = 2970 |
| 147185 | CEFBS_In64BitMode, // OR64rr_NF_ND = 2971 |
| 147186 | CEFBS_In64BitMode, // OR64rr_NF_ND_REV = 2972 |
| 147187 | CEFBS_In64BitMode, // OR64rr_NF_REV = 2973 |
| 147188 | CEFBS_None, // OR64rr_REV = 2974 |
| 147189 | CEFBS_None, // OR8i8 = 2975 |
| 147190 | CEFBS_None, // OR8mi = 2976 |
| 147191 | CEFBS_Not64BitMode, // OR8mi8 = 2977 |
| 147192 | CEFBS_In64BitMode, // OR8mi_EVEX = 2978 |
| 147193 | CEFBS_In64BitMode, // OR8mi_ND = 2979 |
| 147194 | CEFBS_In64BitMode, // OR8mi_NF = 2980 |
| 147195 | CEFBS_In64BitMode, // OR8mi_NF_ND = 2981 |
| 147196 | CEFBS_None, // OR8mr = 2982 |
| 147197 | CEFBS_In64BitMode, // OR8mr_EVEX = 2983 |
| 147198 | CEFBS_In64BitMode, // OR8mr_ND = 2984 |
| 147199 | CEFBS_In64BitMode, // OR8mr_NF = 2985 |
| 147200 | CEFBS_In64BitMode, // OR8mr_NF_ND = 2986 |
| 147201 | CEFBS_None, // OR8ri = 2987 |
| 147202 | CEFBS_Not64BitMode, // OR8ri8 = 2988 |
| 147203 | CEFBS_In64BitMode, // OR8ri_EVEX = 2989 |
| 147204 | CEFBS_In64BitMode, // OR8ri_ND = 2990 |
| 147205 | CEFBS_In64BitMode, // OR8ri_NF = 2991 |
| 147206 | CEFBS_In64BitMode, // OR8ri_NF_ND = 2992 |
| 147207 | CEFBS_None, // OR8rm = 2993 |
| 147208 | CEFBS_In64BitMode, // OR8rm_EVEX = 2994 |
| 147209 | CEFBS_In64BitMode, // OR8rm_ND = 2995 |
| 147210 | CEFBS_In64BitMode, // OR8rm_NF = 2996 |
| 147211 | CEFBS_In64BitMode, // OR8rm_NF_ND = 2997 |
| 147212 | CEFBS_None, // OR8rr = 2998 |
| 147213 | CEFBS_In64BitMode, // OR8rr_EVEX = 2999 |
| 147214 | CEFBS_In64BitMode, // OR8rr_EVEX_REV = 3000 |
| 147215 | CEFBS_In64BitMode, // OR8rr_ND = 3001 |
| 147216 | CEFBS_In64BitMode, // OR8rr_ND_REV = 3002 |
| 147217 | CEFBS_In64BitMode, // OR8rr_NF = 3003 |
| 147218 | CEFBS_In64BitMode, // OR8rr_NF_ND = 3004 |
| 147219 | CEFBS_In64BitMode, // OR8rr_NF_ND_REV = 3005 |
| 147220 | CEFBS_In64BitMode, // OR8rr_NF_REV = 3006 |
| 147221 | CEFBS_None, // OR8rr_REV = 3007 |
| 147222 | CEFBS_None, // ORPDrm = 3008 |
| 147223 | CEFBS_None, // ORPDrr = 3009 |
| 147224 | CEFBS_None, // ORPSrm = 3010 |
| 147225 | CEFBS_None, // ORPSrr = 3011 |
| 147226 | CEFBS_None, // OUT16ir = 3012 |
| 147227 | CEFBS_None, // OUT16rr = 3013 |
| 147228 | CEFBS_None, // OUT32ir = 3014 |
| 147229 | CEFBS_None, // OUT32rr = 3015 |
| 147230 | CEFBS_None, // OUT8ir = 3016 |
| 147231 | CEFBS_None, // OUT8rr = 3017 |
| 147232 | CEFBS_None, // OUTSB = 3018 |
| 147233 | CEFBS_None, // OUTSL = 3019 |
| 147234 | CEFBS_None, // OUTSW = 3020 |
| 147235 | CEFBS_None, // PABSBrm = 3021 |
| 147236 | CEFBS_None, // PABSBrr = 3022 |
| 147237 | CEFBS_None, // PABSDrm = 3023 |
| 147238 | CEFBS_None, // PABSDrr = 3024 |
| 147239 | CEFBS_None, // PABSWrm = 3025 |
| 147240 | CEFBS_None, // PABSWrr = 3026 |
| 147241 | CEFBS_None, // PACKSSDWrm = 3027 |
| 147242 | CEFBS_None, // PACKSSDWrr = 3028 |
| 147243 | CEFBS_None, // PACKSSWBrm = 3029 |
| 147244 | CEFBS_None, // PACKSSWBrr = 3030 |
| 147245 | CEFBS_None, // PACKUSDWrm = 3031 |
| 147246 | CEFBS_None, // PACKUSDWrr = 3032 |
| 147247 | CEFBS_None, // PACKUSWBrm = 3033 |
| 147248 | CEFBS_None, // PACKUSWBrr = 3034 |
| 147249 | CEFBS_None, // PADDBrm = 3035 |
| 147250 | CEFBS_None, // PADDBrr = 3036 |
| 147251 | CEFBS_None, // PADDDrm = 3037 |
| 147252 | CEFBS_None, // PADDDrr = 3038 |
| 147253 | CEFBS_None, // PADDQrm = 3039 |
| 147254 | CEFBS_None, // PADDQrr = 3040 |
| 147255 | CEFBS_None, // PADDSBrm = 3041 |
| 147256 | CEFBS_None, // PADDSBrr = 3042 |
| 147257 | CEFBS_None, // PADDSWrm = 3043 |
| 147258 | CEFBS_None, // PADDSWrr = 3044 |
| 147259 | CEFBS_None, // PADDUSBrm = 3045 |
| 147260 | CEFBS_None, // PADDUSBrr = 3046 |
| 147261 | CEFBS_None, // PADDUSWrm = 3047 |
| 147262 | CEFBS_None, // PADDUSWrr = 3048 |
| 147263 | CEFBS_None, // PADDWrm = 3049 |
| 147264 | CEFBS_None, // PADDWrr = 3050 |
| 147265 | CEFBS_None, // PALIGNRrmi = 3051 |
| 147266 | CEFBS_None, // PALIGNRrri = 3052 |
| 147267 | CEFBS_None, // PANDNrm = 3053 |
| 147268 | CEFBS_None, // PANDNrr = 3054 |
| 147269 | CEFBS_None, // PANDrm = 3055 |
| 147270 | CEFBS_None, // PANDrr = 3056 |
| 147271 | CEFBS_None, // PAUSE = 3057 |
| 147272 | CEFBS_None, // PAVGBrm = 3058 |
| 147273 | CEFBS_None, // PAVGBrr = 3059 |
| 147274 | CEFBS_None, // PAVGUSBrm = 3060 |
| 147275 | CEFBS_None, // PAVGUSBrr = 3061 |
| 147276 | CEFBS_None, // PAVGWrm = 3062 |
| 147277 | CEFBS_None, // PAVGWrr = 3063 |
| 147278 | CEFBS_None, // PBLENDVBrm0 = 3064 |
| 147279 | CEFBS_None, // PBLENDVBrr0 = 3065 |
| 147280 | CEFBS_None, // PBLENDWrmi = 3066 |
| 147281 | CEFBS_None, // PBLENDWrri = 3067 |
| 147282 | CEFBS_In64BitMode, // PBNDKB = 3068 |
| 147283 | CEFBS_None, // PCLMULQDQrmi = 3069 |
| 147284 | CEFBS_None, // PCLMULQDQrri = 3070 |
| 147285 | CEFBS_None, // PCMPEQBrm = 3071 |
| 147286 | CEFBS_None, // PCMPEQBrr = 3072 |
| 147287 | CEFBS_None, // PCMPEQDrm = 3073 |
| 147288 | CEFBS_None, // PCMPEQDrr = 3074 |
| 147289 | CEFBS_None, // PCMPEQQrm = 3075 |
| 147290 | CEFBS_None, // PCMPEQQrr = 3076 |
| 147291 | CEFBS_None, // PCMPEQWrm = 3077 |
| 147292 | CEFBS_None, // PCMPEQWrr = 3078 |
| 147293 | CEFBS_None, // PCMPESTRIrmi = 3079 |
| 147294 | CEFBS_None, // PCMPESTRIrri = 3080 |
| 147295 | CEFBS_None, // PCMPESTRMrmi = 3081 |
| 147296 | CEFBS_None, // PCMPESTRMrri = 3082 |
| 147297 | CEFBS_None, // PCMPGTBrm = 3083 |
| 147298 | CEFBS_None, // PCMPGTBrr = 3084 |
| 147299 | CEFBS_None, // PCMPGTDrm = 3085 |
| 147300 | CEFBS_None, // PCMPGTDrr = 3086 |
| 147301 | CEFBS_None, // PCMPGTQrm = 3087 |
| 147302 | CEFBS_None, // PCMPGTQrr = 3088 |
| 147303 | CEFBS_None, // PCMPGTWrm = 3089 |
| 147304 | CEFBS_None, // PCMPGTWrr = 3090 |
| 147305 | CEFBS_None, // PCMPISTRIrmi = 3091 |
| 147306 | CEFBS_None, // PCMPISTRIrri = 3092 |
| 147307 | CEFBS_None, // PCMPISTRMrmi = 3093 |
| 147308 | CEFBS_None, // PCMPISTRMrri = 3094 |
| 147309 | CEFBS_None, // PCONFIG = 3095 |
| 147310 | CEFBS_None, // PDEP32rm = 3096 |
| 147311 | CEFBS_None, // PDEP32rm_EVEX = 3097 |
| 147312 | CEFBS_None, // PDEP32rr = 3098 |
| 147313 | CEFBS_None, // PDEP32rr_EVEX = 3099 |
| 147314 | CEFBS_None, // PDEP64rm = 3100 |
| 147315 | CEFBS_None, // PDEP64rm_EVEX = 3101 |
| 147316 | CEFBS_None, // PDEP64rr = 3102 |
| 147317 | CEFBS_None, // PDEP64rr_EVEX = 3103 |
| 147318 | CEFBS_None, // PEXT32rm = 3104 |
| 147319 | CEFBS_None, // PEXT32rm_EVEX = 3105 |
| 147320 | CEFBS_None, // PEXT32rr = 3106 |
| 147321 | CEFBS_None, // PEXT32rr_EVEX = 3107 |
| 147322 | CEFBS_None, // PEXT64rm = 3108 |
| 147323 | CEFBS_None, // PEXT64rm_EVEX = 3109 |
| 147324 | CEFBS_None, // PEXT64rr = 3110 |
| 147325 | CEFBS_None, // PEXT64rr_EVEX = 3111 |
| 147326 | CEFBS_None, // PEXTRBmr = 3112 |
| 147327 | CEFBS_None, // PEXTRBrr = 3113 |
| 147328 | CEFBS_None, // PEXTRDmr = 3114 |
| 147329 | CEFBS_None, // PEXTRDrr = 3115 |
| 147330 | CEFBS_None, // PEXTRQmr = 3116 |
| 147331 | CEFBS_None, // PEXTRQrr = 3117 |
| 147332 | CEFBS_None, // PEXTRWmr = 3118 |
| 147333 | CEFBS_None, // PEXTRWrr = 3119 |
| 147334 | CEFBS_None, // PEXTRWrr_REV = 3120 |
| 147335 | CEFBS_None, // PF2IDrm = 3121 |
| 147336 | CEFBS_None, // PF2IDrr = 3122 |
| 147337 | CEFBS_None, // PF2IWrm = 3123 |
| 147338 | CEFBS_None, // PF2IWrr = 3124 |
| 147339 | CEFBS_None, // PFACCrm = 3125 |
| 147340 | CEFBS_None, // PFACCrr = 3126 |
| 147341 | CEFBS_None, // PFADDrm = 3127 |
| 147342 | CEFBS_None, // PFADDrr = 3128 |
| 147343 | CEFBS_None, // PFCMPEQrm = 3129 |
| 147344 | CEFBS_None, // PFCMPEQrr = 3130 |
| 147345 | CEFBS_None, // PFCMPGErm = 3131 |
| 147346 | CEFBS_None, // PFCMPGErr = 3132 |
| 147347 | CEFBS_None, // PFCMPGTrm = 3133 |
| 147348 | CEFBS_None, // PFCMPGTrr = 3134 |
| 147349 | CEFBS_None, // PFMAXrm = 3135 |
| 147350 | CEFBS_None, // PFMAXrr = 3136 |
| 147351 | CEFBS_None, // PFMINrm = 3137 |
| 147352 | CEFBS_None, // PFMINrr = 3138 |
| 147353 | CEFBS_None, // PFMULrm = 3139 |
| 147354 | CEFBS_None, // PFMULrr = 3140 |
| 147355 | CEFBS_None, // PFNACCrm = 3141 |
| 147356 | CEFBS_None, // PFNACCrr = 3142 |
| 147357 | CEFBS_None, // PFPNACCrm = 3143 |
| 147358 | CEFBS_None, // PFPNACCrr = 3144 |
| 147359 | CEFBS_None, // PFRCPIT1rm = 3145 |
| 147360 | CEFBS_None, // PFRCPIT1rr = 3146 |
| 147361 | CEFBS_None, // PFRCPIT2rm = 3147 |
| 147362 | CEFBS_None, // PFRCPIT2rr = 3148 |
| 147363 | CEFBS_None, // PFRCPrm = 3149 |
| 147364 | CEFBS_None, // PFRCPrr = 3150 |
| 147365 | CEFBS_None, // PFRSQIT1rm = 3151 |
| 147366 | CEFBS_None, // PFRSQIT1rr = 3152 |
| 147367 | CEFBS_None, // PFRSQRTrm = 3153 |
| 147368 | CEFBS_None, // PFRSQRTrr = 3154 |
| 147369 | CEFBS_None, // PFSUBRrm = 3155 |
| 147370 | CEFBS_None, // PFSUBRrr = 3156 |
| 147371 | CEFBS_None, // PFSUBrm = 3157 |
| 147372 | CEFBS_None, // PFSUBrr = 3158 |
| 147373 | CEFBS_None, // PHADDDrm = 3159 |
| 147374 | CEFBS_None, // PHADDDrr = 3160 |
| 147375 | CEFBS_None, // PHADDSWrm = 3161 |
| 147376 | CEFBS_None, // PHADDSWrr = 3162 |
| 147377 | CEFBS_None, // PHADDWrm = 3163 |
| 147378 | CEFBS_None, // PHADDWrr = 3164 |
| 147379 | CEFBS_None, // PHMINPOSUWrm = 3165 |
| 147380 | CEFBS_None, // PHMINPOSUWrr = 3166 |
| 147381 | CEFBS_None, // PHSUBDrm = 3167 |
| 147382 | CEFBS_None, // PHSUBDrr = 3168 |
| 147383 | CEFBS_None, // PHSUBSWrm = 3169 |
| 147384 | CEFBS_None, // PHSUBSWrr = 3170 |
| 147385 | CEFBS_None, // PHSUBWrm = 3171 |
| 147386 | CEFBS_None, // PHSUBWrr = 3172 |
| 147387 | CEFBS_None, // PI2FDrm = 3173 |
| 147388 | CEFBS_None, // PI2FDrr = 3174 |
| 147389 | CEFBS_None, // PI2FWrm = 3175 |
| 147390 | CEFBS_None, // PI2FWrr = 3176 |
| 147391 | CEFBS_None, // PINSRBrm = 3177 |
| 147392 | CEFBS_None, // PINSRBrr = 3178 |
| 147393 | CEFBS_None, // PINSRDrm = 3179 |
| 147394 | CEFBS_None, // PINSRDrr = 3180 |
| 147395 | CEFBS_None, // PINSRQrm = 3181 |
| 147396 | CEFBS_None, // PINSRQrr = 3182 |
| 147397 | CEFBS_None, // PINSRWrm = 3183 |
| 147398 | CEFBS_None, // PINSRWrr = 3184 |
| 147399 | CEFBS_None, // PMADDUBSWrm = 3185 |
| 147400 | CEFBS_None, // PMADDUBSWrr = 3186 |
| 147401 | CEFBS_None, // PMADDWDrm = 3187 |
| 147402 | CEFBS_None, // PMADDWDrr = 3188 |
| 147403 | CEFBS_None, // PMAXSBrm = 3189 |
| 147404 | CEFBS_None, // PMAXSBrr = 3190 |
| 147405 | CEFBS_None, // PMAXSDrm = 3191 |
| 147406 | CEFBS_None, // PMAXSDrr = 3192 |
| 147407 | CEFBS_None, // PMAXSWrm = 3193 |
| 147408 | CEFBS_None, // PMAXSWrr = 3194 |
| 147409 | CEFBS_None, // PMAXUBrm = 3195 |
| 147410 | CEFBS_None, // PMAXUBrr = 3196 |
| 147411 | CEFBS_None, // PMAXUDrm = 3197 |
| 147412 | CEFBS_None, // PMAXUDrr = 3198 |
| 147413 | CEFBS_None, // PMAXUWrm = 3199 |
| 147414 | CEFBS_None, // PMAXUWrr = 3200 |
| 147415 | CEFBS_None, // PMINSBrm = 3201 |
| 147416 | CEFBS_None, // PMINSBrr = 3202 |
| 147417 | CEFBS_None, // PMINSDrm = 3203 |
| 147418 | CEFBS_None, // PMINSDrr = 3204 |
| 147419 | CEFBS_None, // PMINSWrm = 3205 |
| 147420 | CEFBS_None, // PMINSWrr = 3206 |
| 147421 | CEFBS_None, // PMINUBrm = 3207 |
| 147422 | CEFBS_None, // PMINUBrr = 3208 |
| 147423 | CEFBS_None, // PMINUDrm = 3209 |
| 147424 | CEFBS_None, // PMINUDrr = 3210 |
| 147425 | CEFBS_None, // PMINUWrm = 3211 |
| 147426 | CEFBS_None, // PMINUWrr = 3212 |
| 147427 | CEFBS_None, // PMOVMSKBrr = 3213 |
| 147428 | CEFBS_None, // PMOVSXBDrm = 3214 |
| 147429 | CEFBS_None, // PMOVSXBDrr = 3215 |
| 147430 | CEFBS_None, // PMOVSXBQrm = 3216 |
| 147431 | CEFBS_None, // PMOVSXBQrr = 3217 |
| 147432 | CEFBS_None, // PMOVSXBWrm = 3218 |
| 147433 | CEFBS_None, // PMOVSXBWrr = 3219 |
| 147434 | CEFBS_None, // PMOVSXDQrm = 3220 |
| 147435 | CEFBS_None, // PMOVSXDQrr = 3221 |
| 147436 | CEFBS_None, // PMOVSXWDrm = 3222 |
| 147437 | CEFBS_None, // PMOVSXWDrr = 3223 |
| 147438 | CEFBS_None, // PMOVSXWQrm = 3224 |
| 147439 | CEFBS_None, // PMOVSXWQrr = 3225 |
| 147440 | CEFBS_None, // PMOVZXBDrm = 3226 |
| 147441 | CEFBS_None, // PMOVZXBDrr = 3227 |
| 147442 | CEFBS_None, // PMOVZXBQrm = 3228 |
| 147443 | CEFBS_None, // PMOVZXBQrr = 3229 |
| 147444 | CEFBS_None, // PMOVZXBWrm = 3230 |
| 147445 | CEFBS_None, // PMOVZXBWrr = 3231 |
| 147446 | CEFBS_None, // PMOVZXDQrm = 3232 |
| 147447 | CEFBS_None, // PMOVZXDQrr = 3233 |
| 147448 | CEFBS_None, // PMOVZXWDrm = 3234 |
| 147449 | CEFBS_None, // PMOVZXWDrr = 3235 |
| 147450 | CEFBS_None, // PMOVZXWQrm = 3236 |
| 147451 | CEFBS_None, // PMOVZXWQrr = 3237 |
| 147452 | CEFBS_None, // PMULDQrm = 3238 |
| 147453 | CEFBS_None, // PMULDQrr = 3239 |
| 147454 | CEFBS_None, // PMULHRSWrm = 3240 |
| 147455 | CEFBS_None, // PMULHRSWrr = 3241 |
| 147456 | CEFBS_None, // PMULHRWrm = 3242 |
| 147457 | CEFBS_None, // PMULHRWrr = 3243 |
| 147458 | CEFBS_None, // PMULHUWrm = 3244 |
| 147459 | CEFBS_None, // PMULHUWrr = 3245 |
| 147460 | CEFBS_None, // PMULHWrm = 3246 |
| 147461 | CEFBS_None, // PMULHWrr = 3247 |
| 147462 | CEFBS_None, // PMULLDrm = 3248 |
| 147463 | CEFBS_None, // PMULLDrr = 3249 |
| 147464 | CEFBS_None, // PMULLWrm = 3250 |
| 147465 | CEFBS_None, // PMULLWrr = 3251 |
| 147466 | CEFBS_None, // PMULUDQrm = 3252 |
| 147467 | CEFBS_None, // PMULUDQrr = 3253 |
| 147468 | CEFBS_None, // POP16r = 3254 |
| 147469 | CEFBS_None, // POP16rmm = 3255 |
| 147470 | CEFBS_None, // POP16rmr = 3256 |
| 147471 | CEFBS_None, // POP2 = 3257 |
| 147472 | CEFBS_None, // POP2P = 3258 |
| 147473 | CEFBS_Not64BitMode, // POP32r = 3259 |
| 147474 | CEFBS_Not64BitMode, // POP32rmm = 3260 |
| 147475 | CEFBS_Not64BitMode, // POP32rmr = 3261 |
| 147476 | CEFBS_In64BitMode, // POP64r = 3262 |
| 147477 | CEFBS_In64BitMode, // POP64rmm = 3263 |
| 147478 | CEFBS_In64BitMode, // POP64rmr = 3264 |
| 147479 | CEFBS_Not64BitMode, // POPA16 = 3265 |
| 147480 | CEFBS_Not64BitMode, // POPA32 = 3266 |
| 147481 | CEFBS_None, // POPCNT16rm = 3267 |
| 147482 | CEFBS_None, // POPCNT16rm_EVEX = 3268 |
| 147483 | CEFBS_None, // POPCNT16rm_NF = 3269 |
| 147484 | CEFBS_None, // POPCNT16rr = 3270 |
| 147485 | CEFBS_None, // POPCNT16rr_EVEX = 3271 |
| 147486 | CEFBS_None, // POPCNT16rr_NF = 3272 |
| 147487 | CEFBS_None, // POPCNT32rm = 3273 |
| 147488 | CEFBS_None, // POPCNT32rm_EVEX = 3274 |
| 147489 | CEFBS_None, // POPCNT32rm_NF = 3275 |
| 147490 | CEFBS_None, // POPCNT32rr = 3276 |
| 147491 | CEFBS_None, // POPCNT32rr_EVEX = 3277 |
| 147492 | CEFBS_None, // POPCNT32rr_NF = 3278 |
| 147493 | CEFBS_None, // POPCNT64rm = 3279 |
| 147494 | CEFBS_None, // POPCNT64rm_EVEX = 3280 |
| 147495 | CEFBS_None, // POPCNT64rm_NF = 3281 |
| 147496 | CEFBS_None, // POPCNT64rr = 3282 |
| 147497 | CEFBS_None, // POPCNT64rr_EVEX = 3283 |
| 147498 | CEFBS_None, // POPCNT64rr_NF = 3284 |
| 147499 | CEFBS_Not64BitMode, // POPDS16 = 3285 |
| 147500 | CEFBS_Not64BitMode, // POPDS32 = 3286 |
| 147501 | CEFBS_Not64BitMode, // POPES16 = 3287 |
| 147502 | CEFBS_Not64BitMode, // POPES32 = 3288 |
| 147503 | CEFBS_None, // POPF16 = 3289 |
| 147504 | CEFBS_Not64BitMode, // POPF32 = 3290 |
| 147505 | CEFBS_In64BitMode, // POPF64 = 3291 |
| 147506 | CEFBS_None, // POPFS16 = 3292 |
| 147507 | CEFBS_Not64BitMode, // POPFS32 = 3293 |
| 147508 | CEFBS_In64BitMode, // POPFS64 = 3294 |
| 147509 | CEFBS_None, // POPGS16 = 3295 |
| 147510 | CEFBS_Not64BitMode, // POPGS32 = 3296 |
| 147511 | CEFBS_In64BitMode, // POPGS64 = 3297 |
| 147512 | CEFBS_In64BitMode, // POPP64r = 3298 |
| 147513 | CEFBS_Not64BitMode, // POPSS16 = 3299 |
| 147514 | CEFBS_Not64BitMode, // POPSS32 = 3300 |
| 147515 | CEFBS_None, // PORrm = 3301 |
| 147516 | CEFBS_None, // PORrr = 3302 |
| 147517 | CEFBS_None, // PREFETCH = 3303 |
| 147518 | CEFBS_In64BitMode, // PREFETCHIT0 = 3304 |
| 147519 | CEFBS_In64BitMode, // PREFETCHIT1 = 3305 |
| 147520 | CEFBS_None, // PREFETCHNTA = 3306 |
| 147521 | CEFBS_None, // PREFETCHT0 = 3307 |
| 147522 | CEFBS_None, // PREFETCHT1 = 3308 |
| 147523 | CEFBS_None, // PREFETCHT2 = 3309 |
| 147524 | CEFBS_None, // PREFETCHW = 3310 |
| 147525 | CEFBS_None, // PREFETCHWT1 = 3311 |
| 147526 | CEFBS_None, // PROBED_ALLOCA_32 = 3312 |
| 147527 | CEFBS_In64BitMode, // PROBED_ALLOCA_64 = 3313 |
| 147528 | CEFBS_None, // PSADBWrm = 3314 |
| 147529 | CEFBS_None, // PSADBWrr = 3315 |
| 147530 | CEFBS_None, // PSHUFBrm = 3316 |
| 147531 | CEFBS_None, // PSHUFBrr = 3317 |
| 147532 | CEFBS_None, // PSHUFDmi = 3318 |
| 147533 | CEFBS_None, // PSHUFDri = 3319 |
| 147534 | CEFBS_None, // PSHUFHWmi = 3320 |
| 147535 | CEFBS_None, // PSHUFHWri = 3321 |
| 147536 | CEFBS_None, // PSHUFLWmi = 3322 |
| 147537 | CEFBS_None, // PSHUFLWri = 3323 |
| 147538 | CEFBS_None, // PSIGNBrm = 3324 |
| 147539 | CEFBS_None, // PSIGNBrr = 3325 |
| 147540 | CEFBS_None, // PSIGNDrm = 3326 |
| 147541 | CEFBS_None, // PSIGNDrr = 3327 |
| 147542 | CEFBS_None, // PSIGNWrm = 3328 |
| 147543 | CEFBS_None, // PSIGNWrr = 3329 |
| 147544 | CEFBS_None, // PSLLDQri = 3330 |
| 147545 | CEFBS_None, // PSLLDri = 3331 |
| 147546 | CEFBS_None, // PSLLDrm = 3332 |
| 147547 | CEFBS_None, // PSLLDrr = 3333 |
| 147548 | CEFBS_None, // PSLLQri = 3334 |
| 147549 | CEFBS_None, // PSLLQrm = 3335 |
| 147550 | CEFBS_None, // PSLLQrr = 3336 |
| 147551 | CEFBS_None, // PSLLWri = 3337 |
| 147552 | CEFBS_None, // PSLLWrm = 3338 |
| 147553 | CEFBS_None, // PSLLWrr = 3339 |
| 147554 | CEFBS_In64BitMode, // PSMASH = 3340 |
| 147555 | CEFBS_None, // PSRADri = 3341 |
| 147556 | CEFBS_None, // PSRADrm = 3342 |
| 147557 | CEFBS_None, // PSRADrr = 3343 |
| 147558 | CEFBS_None, // PSRAWri = 3344 |
| 147559 | CEFBS_None, // PSRAWrm = 3345 |
| 147560 | CEFBS_None, // PSRAWrr = 3346 |
| 147561 | CEFBS_None, // PSRLDQri = 3347 |
| 147562 | CEFBS_None, // PSRLDri = 3348 |
| 147563 | CEFBS_None, // PSRLDrm = 3349 |
| 147564 | CEFBS_None, // PSRLDrr = 3350 |
| 147565 | CEFBS_None, // PSRLQri = 3351 |
| 147566 | CEFBS_None, // PSRLQrm = 3352 |
| 147567 | CEFBS_None, // PSRLQrr = 3353 |
| 147568 | CEFBS_None, // PSRLWri = 3354 |
| 147569 | CEFBS_None, // PSRLWrm = 3355 |
| 147570 | CEFBS_None, // PSRLWrr = 3356 |
| 147571 | CEFBS_None, // PSUBBrm = 3357 |
| 147572 | CEFBS_None, // PSUBBrr = 3358 |
| 147573 | CEFBS_None, // PSUBDrm = 3359 |
| 147574 | CEFBS_None, // PSUBDrr = 3360 |
| 147575 | CEFBS_None, // PSUBQrm = 3361 |
| 147576 | CEFBS_None, // PSUBQrr = 3362 |
| 147577 | CEFBS_None, // PSUBSBrm = 3363 |
| 147578 | CEFBS_None, // PSUBSBrr = 3364 |
| 147579 | CEFBS_None, // PSUBSWrm = 3365 |
| 147580 | CEFBS_None, // PSUBSWrr = 3366 |
| 147581 | CEFBS_None, // PSUBUSBrm = 3367 |
| 147582 | CEFBS_None, // PSUBUSBrr = 3368 |
| 147583 | CEFBS_None, // PSUBUSWrm = 3369 |
| 147584 | CEFBS_None, // PSUBUSWrr = 3370 |
| 147585 | CEFBS_None, // PSUBWrm = 3371 |
| 147586 | CEFBS_None, // PSUBWrr = 3372 |
| 147587 | CEFBS_None, // PSWAPDrm = 3373 |
| 147588 | CEFBS_None, // PSWAPDrr = 3374 |
| 147589 | CEFBS_In64BitMode, // PTCMMIMFP16PS = 3375 |
| 147590 | CEFBS_In64BitMode, // PTCMMIMFP16PSV = 3376 |
| 147591 | CEFBS_In64BitMode, // PTCMMRLFP16PS = 3377 |
| 147592 | CEFBS_In64BitMode, // PTCMMRLFP16PSV = 3378 |
| 147593 | CEFBS_In64BitMode, // PTDPBF16PS = 3379 |
| 147594 | CEFBS_In64BitMode, // PTDPBSSD = 3380 |
| 147595 | CEFBS_In64BitMode, // PTDPBSUD = 3381 |
| 147596 | CEFBS_In64BitMode, // PTDPBUSD = 3382 |
| 147597 | CEFBS_In64BitMode, // PTDPBUUD = 3383 |
| 147598 | CEFBS_In64BitMode, // PTDPFP16PS = 3384 |
| 147599 | CEFBS_None, // PTESTrm = 3385 |
| 147600 | CEFBS_None, // PTESTrr = 3386 |
| 147601 | CEFBS_In64BitMode, // PTILELOADD = 3387 |
| 147602 | CEFBS_In64BitMode, // PTILELOADDT1 = 3388 |
| 147603 | CEFBS_In64BitMode, // PTILESTORED = 3389 |
| 147604 | CEFBS_In64BitMode, // PTILEZERO = 3390 |
| 147605 | CEFBS_In64BitMode, // PTWRITE64m = 3391 |
| 147606 | CEFBS_In64BitMode, // PTWRITE64r = 3392 |
| 147607 | CEFBS_None, // PTWRITEm = 3393 |
| 147608 | CEFBS_None, // PTWRITEr = 3394 |
| 147609 | CEFBS_None, // PUNPCKHBWrm = 3395 |
| 147610 | CEFBS_None, // PUNPCKHBWrr = 3396 |
| 147611 | CEFBS_None, // PUNPCKHDQrm = 3397 |
| 147612 | CEFBS_None, // PUNPCKHDQrr = 3398 |
| 147613 | CEFBS_None, // PUNPCKHQDQrm = 3399 |
| 147614 | CEFBS_None, // PUNPCKHQDQrr = 3400 |
| 147615 | CEFBS_None, // PUNPCKHWDrm = 3401 |
| 147616 | CEFBS_None, // PUNPCKHWDrr = 3402 |
| 147617 | CEFBS_None, // PUNPCKLBWrm = 3403 |
| 147618 | CEFBS_None, // PUNPCKLBWrr = 3404 |
| 147619 | CEFBS_None, // PUNPCKLDQrm = 3405 |
| 147620 | CEFBS_None, // PUNPCKLDQrr = 3406 |
| 147621 | CEFBS_None, // PUNPCKLQDQrm = 3407 |
| 147622 | CEFBS_None, // PUNPCKLQDQrr = 3408 |
| 147623 | CEFBS_None, // PUNPCKLWDrm = 3409 |
| 147624 | CEFBS_None, // PUNPCKLWDrr = 3410 |
| 147625 | CEFBS_None, // PUSH16i = 3411 |
| 147626 | CEFBS_None, // PUSH16i8 = 3412 |
| 147627 | CEFBS_None, // PUSH16r = 3413 |
| 147628 | CEFBS_None, // PUSH16rmm = 3414 |
| 147629 | CEFBS_None, // PUSH16rmr = 3415 |
| 147630 | CEFBS_None, // PUSH2 = 3416 |
| 147631 | CEFBS_None, // PUSH2P = 3417 |
| 147632 | CEFBS_Not64BitMode, // PUSH32i = 3418 |
| 147633 | CEFBS_Not64BitMode, // PUSH32i8 = 3419 |
| 147634 | CEFBS_Not64BitMode, // PUSH32r = 3420 |
| 147635 | CEFBS_Not64BitMode, // PUSH32rmm = 3421 |
| 147636 | CEFBS_Not64BitMode, // PUSH32rmr = 3422 |
| 147637 | CEFBS_In64BitMode, // PUSH64i32 = 3423 |
| 147638 | CEFBS_In64BitMode, // PUSH64i8 = 3424 |
| 147639 | CEFBS_In64BitMode, // PUSH64r = 3425 |
| 147640 | CEFBS_In64BitMode, // PUSH64rmm = 3426 |
| 147641 | CEFBS_In64BitMode, // PUSH64rmr = 3427 |
| 147642 | CEFBS_Not64BitMode, // PUSHA16 = 3428 |
| 147643 | CEFBS_Not64BitMode, // PUSHA32 = 3429 |
| 147644 | CEFBS_Not64BitMode, // PUSHCS16 = 3430 |
| 147645 | CEFBS_Not64BitMode, // PUSHCS32 = 3431 |
| 147646 | CEFBS_Not64BitMode, // PUSHDS16 = 3432 |
| 147647 | CEFBS_Not64BitMode, // PUSHDS32 = 3433 |
| 147648 | CEFBS_Not64BitMode, // PUSHES16 = 3434 |
| 147649 | CEFBS_Not64BitMode, // PUSHES32 = 3435 |
| 147650 | CEFBS_None, // PUSHF16 = 3436 |
| 147651 | CEFBS_Not64BitMode, // PUSHF32 = 3437 |
| 147652 | CEFBS_In64BitMode, // PUSHF64 = 3438 |
| 147653 | CEFBS_None, // PUSHFS16 = 3439 |
| 147654 | CEFBS_Not64BitMode, // PUSHFS32 = 3440 |
| 147655 | CEFBS_In64BitMode, // PUSHFS64 = 3441 |
| 147656 | CEFBS_None, // PUSHGS16 = 3442 |
| 147657 | CEFBS_Not64BitMode, // PUSHGS32 = 3443 |
| 147658 | CEFBS_In64BitMode, // PUSHGS64 = 3444 |
| 147659 | CEFBS_In64BitMode, // PUSHP64r = 3445 |
| 147660 | CEFBS_Not64BitMode, // PUSHSS16 = 3446 |
| 147661 | CEFBS_Not64BitMode, // PUSHSS32 = 3447 |
| 147662 | CEFBS_Not64BitMode, // PVALIDATE32 = 3448 |
| 147663 | CEFBS_In64BitMode, // PVALIDATE64 = 3449 |
| 147664 | CEFBS_None, // PXORrm = 3450 |
| 147665 | CEFBS_None, // PXORrr = 3451 |
| 147666 | CEFBS_None, // RCL16m1 = 3452 |
| 147667 | CEFBS_In64BitMode, // RCL16m1_EVEX = 3453 |
| 147668 | CEFBS_In64BitMode, // RCL16m1_ND = 3454 |
| 147669 | CEFBS_None, // RCL16mCL = 3455 |
| 147670 | CEFBS_In64BitMode, // RCL16mCL_EVEX = 3456 |
| 147671 | CEFBS_In64BitMode, // RCL16mCL_ND = 3457 |
| 147672 | CEFBS_None, // RCL16mi = 3458 |
| 147673 | CEFBS_In64BitMode, // RCL16mi_EVEX = 3459 |
| 147674 | CEFBS_In64BitMode, // RCL16mi_ND = 3460 |
| 147675 | CEFBS_None, // RCL16r1 = 3461 |
| 147676 | CEFBS_In64BitMode, // RCL16r1_EVEX = 3462 |
| 147677 | CEFBS_In64BitMode, // RCL16r1_ND = 3463 |
| 147678 | CEFBS_None, // RCL16rCL = 3464 |
| 147679 | CEFBS_In64BitMode, // RCL16rCL_EVEX = 3465 |
| 147680 | CEFBS_In64BitMode, // RCL16rCL_ND = 3466 |
| 147681 | CEFBS_None, // RCL16ri = 3467 |
| 147682 | CEFBS_In64BitMode, // RCL16ri_EVEX = 3468 |
| 147683 | CEFBS_In64BitMode, // RCL16ri_ND = 3469 |
| 147684 | CEFBS_None, // RCL32m1 = 3470 |
| 147685 | CEFBS_In64BitMode, // RCL32m1_EVEX = 3471 |
| 147686 | CEFBS_In64BitMode, // RCL32m1_ND = 3472 |
| 147687 | CEFBS_None, // RCL32mCL = 3473 |
| 147688 | CEFBS_In64BitMode, // RCL32mCL_EVEX = 3474 |
| 147689 | CEFBS_In64BitMode, // RCL32mCL_ND = 3475 |
| 147690 | CEFBS_None, // RCL32mi = 3476 |
| 147691 | CEFBS_In64BitMode, // RCL32mi_EVEX = 3477 |
| 147692 | CEFBS_In64BitMode, // RCL32mi_ND = 3478 |
| 147693 | CEFBS_None, // RCL32r1 = 3479 |
| 147694 | CEFBS_In64BitMode, // RCL32r1_EVEX = 3480 |
| 147695 | CEFBS_In64BitMode, // RCL32r1_ND = 3481 |
| 147696 | CEFBS_None, // RCL32rCL = 3482 |
| 147697 | CEFBS_In64BitMode, // RCL32rCL_EVEX = 3483 |
| 147698 | CEFBS_In64BitMode, // RCL32rCL_ND = 3484 |
| 147699 | CEFBS_None, // RCL32ri = 3485 |
| 147700 | CEFBS_In64BitMode, // RCL32ri_EVEX = 3486 |
| 147701 | CEFBS_In64BitMode, // RCL32ri_ND = 3487 |
| 147702 | CEFBS_In64BitMode, // RCL64m1 = 3488 |
| 147703 | CEFBS_In64BitMode, // RCL64m1_EVEX = 3489 |
| 147704 | CEFBS_In64BitMode, // RCL64m1_ND = 3490 |
| 147705 | CEFBS_In64BitMode, // RCL64mCL = 3491 |
| 147706 | CEFBS_In64BitMode, // RCL64mCL_EVEX = 3492 |
| 147707 | CEFBS_In64BitMode, // RCL64mCL_ND = 3493 |
| 147708 | CEFBS_In64BitMode, // RCL64mi = 3494 |
| 147709 | CEFBS_In64BitMode, // RCL64mi_EVEX = 3495 |
| 147710 | CEFBS_In64BitMode, // RCL64mi_ND = 3496 |
| 147711 | CEFBS_None, // RCL64r1 = 3497 |
| 147712 | CEFBS_In64BitMode, // RCL64r1_EVEX = 3498 |
| 147713 | CEFBS_In64BitMode, // RCL64r1_ND = 3499 |
| 147714 | CEFBS_None, // RCL64rCL = 3500 |
| 147715 | CEFBS_In64BitMode, // RCL64rCL_EVEX = 3501 |
| 147716 | CEFBS_In64BitMode, // RCL64rCL_ND = 3502 |
| 147717 | CEFBS_None, // RCL64ri = 3503 |
| 147718 | CEFBS_In64BitMode, // RCL64ri_EVEX = 3504 |
| 147719 | CEFBS_In64BitMode, // RCL64ri_ND = 3505 |
| 147720 | CEFBS_None, // RCL8m1 = 3506 |
| 147721 | CEFBS_In64BitMode, // RCL8m1_EVEX = 3507 |
| 147722 | CEFBS_In64BitMode, // RCL8m1_ND = 3508 |
| 147723 | CEFBS_None, // RCL8mCL = 3509 |
| 147724 | CEFBS_In64BitMode, // RCL8mCL_EVEX = 3510 |
| 147725 | CEFBS_In64BitMode, // RCL8mCL_ND = 3511 |
| 147726 | CEFBS_None, // RCL8mi = 3512 |
| 147727 | CEFBS_In64BitMode, // RCL8mi_EVEX = 3513 |
| 147728 | CEFBS_In64BitMode, // RCL8mi_ND = 3514 |
| 147729 | CEFBS_None, // RCL8r1 = 3515 |
| 147730 | CEFBS_In64BitMode, // RCL8r1_EVEX = 3516 |
| 147731 | CEFBS_In64BitMode, // RCL8r1_ND = 3517 |
| 147732 | CEFBS_None, // RCL8rCL = 3518 |
| 147733 | CEFBS_In64BitMode, // RCL8rCL_EVEX = 3519 |
| 147734 | CEFBS_In64BitMode, // RCL8rCL_ND = 3520 |
| 147735 | CEFBS_None, // RCL8ri = 3521 |
| 147736 | CEFBS_In64BitMode, // RCL8ri_EVEX = 3522 |
| 147737 | CEFBS_In64BitMode, // RCL8ri_ND = 3523 |
| 147738 | CEFBS_None, // RCPPSm = 3524 |
| 147739 | CEFBS_None, // RCPPSr = 3525 |
| 147740 | CEFBS_None, // RCPSSm = 3526 |
| 147741 | CEFBS_None, // RCPSSm_Int = 3527 |
| 147742 | CEFBS_None, // RCPSSr = 3528 |
| 147743 | CEFBS_None, // RCPSSr_Int = 3529 |
| 147744 | CEFBS_None, // RCR16m1 = 3530 |
| 147745 | CEFBS_In64BitMode, // RCR16m1_EVEX = 3531 |
| 147746 | CEFBS_In64BitMode, // RCR16m1_ND = 3532 |
| 147747 | CEFBS_None, // RCR16mCL = 3533 |
| 147748 | CEFBS_In64BitMode, // RCR16mCL_EVEX = 3534 |
| 147749 | CEFBS_In64BitMode, // RCR16mCL_ND = 3535 |
| 147750 | CEFBS_None, // RCR16mi = 3536 |
| 147751 | CEFBS_In64BitMode, // RCR16mi_EVEX = 3537 |
| 147752 | CEFBS_In64BitMode, // RCR16mi_ND = 3538 |
| 147753 | CEFBS_None, // RCR16r1 = 3539 |
| 147754 | CEFBS_In64BitMode, // RCR16r1_EVEX = 3540 |
| 147755 | CEFBS_In64BitMode, // RCR16r1_ND = 3541 |
| 147756 | CEFBS_None, // RCR16rCL = 3542 |
| 147757 | CEFBS_In64BitMode, // RCR16rCL_EVEX = 3543 |
| 147758 | CEFBS_In64BitMode, // RCR16rCL_ND = 3544 |
| 147759 | CEFBS_None, // RCR16ri = 3545 |
| 147760 | CEFBS_In64BitMode, // RCR16ri_EVEX = 3546 |
| 147761 | CEFBS_In64BitMode, // RCR16ri_ND = 3547 |
| 147762 | CEFBS_None, // RCR32m1 = 3548 |
| 147763 | CEFBS_In64BitMode, // RCR32m1_EVEX = 3549 |
| 147764 | CEFBS_In64BitMode, // RCR32m1_ND = 3550 |
| 147765 | CEFBS_None, // RCR32mCL = 3551 |
| 147766 | CEFBS_In64BitMode, // RCR32mCL_EVEX = 3552 |
| 147767 | CEFBS_In64BitMode, // RCR32mCL_ND = 3553 |
| 147768 | CEFBS_None, // RCR32mi = 3554 |
| 147769 | CEFBS_In64BitMode, // RCR32mi_EVEX = 3555 |
| 147770 | CEFBS_In64BitMode, // RCR32mi_ND = 3556 |
| 147771 | CEFBS_None, // RCR32r1 = 3557 |
| 147772 | CEFBS_In64BitMode, // RCR32r1_EVEX = 3558 |
| 147773 | CEFBS_In64BitMode, // RCR32r1_ND = 3559 |
| 147774 | CEFBS_None, // RCR32rCL = 3560 |
| 147775 | CEFBS_In64BitMode, // RCR32rCL_EVEX = 3561 |
| 147776 | CEFBS_In64BitMode, // RCR32rCL_ND = 3562 |
| 147777 | CEFBS_None, // RCR32ri = 3563 |
| 147778 | CEFBS_In64BitMode, // RCR32ri_EVEX = 3564 |
| 147779 | CEFBS_In64BitMode, // RCR32ri_ND = 3565 |
| 147780 | CEFBS_In64BitMode, // RCR64m1 = 3566 |
| 147781 | CEFBS_In64BitMode, // RCR64m1_EVEX = 3567 |
| 147782 | CEFBS_In64BitMode, // RCR64m1_ND = 3568 |
| 147783 | CEFBS_In64BitMode, // RCR64mCL = 3569 |
| 147784 | CEFBS_In64BitMode, // RCR64mCL_EVEX = 3570 |
| 147785 | CEFBS_In64BitMode, // RCR64mCL_ND = 3571 |
| 147786 | CEFBS_In64BitMode, // RCR64mi = 3572 |
| 147787 | CEFBS_In64BitMode, // RCR64mi_EVEX = 3573 |
| 147788 | CEFBS_In64BitMode, // RCR64mi_ND = 3574 |
| 147789 | CEFBS_None, // RCR64r1 = 3575 |
| 147790 | CEFBS_In64BitMode, // RCR64r1_EVEX = 3576 |
| 147791 | CEFBS_In64BitMode, // RCR64r1_ND = 3577 |
| 147792 | CEFBS_None, // RCR64rCL = 3578 |
| 147793 | CEFBS_In64BitMode, // RCR64rCL_EVEX = 3579 |
| 147794 | CEFBS_In64BitMode, // RCR64rCL_ND = 3580 |
| 147795 | CEFBS_None, // RCR64ri = 3581 |
| 147796 | CEFBS_In64BitMode, // RCR64ri_EVEX = 3582 |
| 147797 | CEFBS_In64BitMode, // RCR64ri_ND = 3583 |
| 147798 | CEFBS_None, // RCR8m1 = 3584 |
| 147799 | CEFBS_In64BitMode, // RCR8m1_EVEX = 3585 |
| 147800 | CEFBS_In64BitMode, // RCR8m1_ND = 3586 |
| 147801 | CEFBS_None, // RCR8mCL = 3587 |
| 147802 | CEFBS_In64BitMode, // RCR8mCL_EVEX = 3588 |
| 147803 | CEFBS_In64BitMode, // RCR8mCL_ND = 3589 |
| 147804 | CEFBS_None, // RCR8mi = 3590 |
| 147805 | CEFBS_In64BitMode, // RCR8mi_EVEX = 3591 |
| 147806 | CEFBS_In64BitMode, // RCR8mi_ND = 3592 |
| 147807 | CEFBS_None, // RCR8r1 = 3593 |
| 147808 | CEFBS_In64BitMode, // RCR8r1_EVEX = 3594 |
| 147809 | CEFBS_In64BitMode, // RCR8r1_ND = 3595 |
| 147810 | CEFBS_None, // RCR8rCL = 3596 |
| 147811 | CEFBS_In64BitMode, // RCR8rCL_EVEX = 3597 |
| 147812 | CEFBS_In64BitMode, // RCR8rCL_ND = 3598 |
| 147813 | CEFBS_None, // RCR8ri = 3599 |
| 147814 | CEFBS_In64BitMode, // RCR8ri_EVEX = 3600 |
| 147815 | CEFBS_In64BitMode, // RCR8ri_ND = 3601 |
| 147816 | CEFBS_In64BitMode, // RDFSBASE = 3602 |
| 147817 | CEFBS_In64BitMode, // RDFSBASE64 = 3603 |
| 147818 | CEFBS_In64BitMode, // RDGSBASE = 3604 |
| 147819 | CEFBS_In64BitMode, // RDGSBASE64 = 3605 |
| 147820 | CEFBS_None, // RDMSR = 3606 |
| 147821 | CEFBS_In64BitMode, // RDMSRLIST = 3607 |
| 147822 | CEFBS_Not64BitMode, // RDPID32 = 3608 |
| 147823 | CEFBS_In64BitMode, // RDPID64 = 3609 |
| 147824 | CEFBS_None, // RDPKRUr = 3610 |
| 147825 | CEFBS_None, // RDPMC = 3611 |
| 147826 | CEFBS_None, // RDPRU = 3612 |
| 147827 | CEFBS_None, // RDRAND16r = 3613 |
| 147828 | CEFBS_None, // RDRAND32r = 3614 |
| 147829 | CEFBS_None, // RDRAND64r = 3615 |
| 147830 | CEFBS_None, // RDSEED16r = 3616 |
| 147831 | CEFBS_None, // RDSEED32r = 3617 |
| 147832 | CEFBS_None, // RDSEED64r = 3618 |
| 147833 | CEFBS_None, // RDSSPD = 3619 |
| 147834 | CEFBS_None, // RDSSPQ = 3620 |
| 147835 | CEFBS_None, // RDTSC = 3621 |
| 147836 | CEFBS_None, // RDTSCP = 3622 |
| 147837 | CEFBS_None, // REPNE_PREFIX = 3623 |
| 147838 | CEFBS_None, // REP_MOVSB_32 = 3624 |
| 147839 | CEFBS_None, // REP_MOVSB_64 = 3625 |
| 147840 | CEFBS_None, // REP_MOVSD_32 = 3626 |
| 147841 | CEFBS_None, // REP_MOVSD_64 = 3627 |
| 147842 | CEFBS_In64BitMode, // REP_MOVSQ_32 = 3628 |
| 147843 | CEFBS_None, // REP_MOVSQ_64 = 3629 |
| 147844 | CEFBS_None, // REP_MOVSW_32 = 3630 |
| 147845 | CEFBS_None, // REP_MOVSW_64 = 3631 |
| 147846 | CEFBS_None, // REP_PREFIX = 3632 |
| 147847 | CEFBS_None, // REP_STOSB_32 = 3633 |
| 147848 | CEFBS_None, // REP_STOSB_64 = 3634 |
| 147849 | CEFBS_None, // REP_STOSD_32 = 3635 |
| 147850 | CEFBS_None, // REP_STOSD_64 = 3636 |
| 147851 | CEFBS_In64BitMode, // REP_STOSQ_32 = 3637 |
| 147852 | CEFBS_None, // REP_STOSQ_64 = 3638 |
| 147853 | CEFBS_None, // REP_STOSW_32 = 3639 |
| 147854 | CEFBS_None, // REP_STOSW_64 = 3640 |
| 147855 | CEFBS_None, // RET = 3641 |
| 147856 | CEFBS_None, // RET16 = 3642 |
| 147857 | CEFBS_Not64BitMode, // RET32 = 3643 |
| 147858 | CEFBS_In64BitMode, // RET64 = 3644 |
| 147859 | CEFBS_None, // RETI16 = 3645 |
| 147860 | CEFBS_Not64BitMode, // RETI32 = 3646 |
| 147861 | CEFBS_In64BitMode, // RETI64 = 3647 |
| 147862 | CEFBS_In64BitMode, // REX64_PREFIX = 3648 |
| 147863 | CEFBS_In64BitMode, // RMPADJUST = 3649 |
| 147864 | CEFBS_In64BitMode, // RMPQUERY = 3650 |
| 147865 | CEFBS_In64BitMode, // RMPUPDATE = 3651 |
| 147866 | CEFBS_None, // ROL16m1 = 3652 |
| 147867 | CEFBS_In64BitMode, // ROL16m1_EVEX = 3653 |
| 147868 | CEFBS_In64BitMode, // ROL16m1_ND = 3654 |
| 147869 | CEFBS_In64BitMode, // ROL16m1_NF = 3655 |
| 147870 | CEFBS_In64BitMode, // ROL16m1_NF_ND = 3656 |
| 147871 | CEFBS_None, // ROL16mCL = 3657 |
| 147872 | CEFBS_In64BitMode, // ROL16mCL_EVEX = 3658 |
| 147873 | CEFBS_In64BitMode, // ROL16mCL_ND = 3659 |
| 147874 | CEFBS_In64BitMode, // ROL16mCL_NF = 3660 |
| 147875 | CEFBS_In64BitMode, // ROL16mCL_NF_ND = 3661 |
| 147876 | CEFBS_None, // ROL16mi = 3662 |
| 147877 | CEFBS_In64BitMode, // ROL16mi_EVEX = 3663 |
| 147878 | CEFBS_In64BitMode, // ROL16mi_ND = 3664 |
| 147879 | CEFBS_In64BitMode, // ROL16mi_NF = 3665 |
| 147880 | CEFBS_In64BitMode, // ROL16mi_NF_ND = 3666 |
| 147881 | CEFBS_None, // ROL16r1 = 3667 |
| 147882 | CEFBS_In64BitMode, // ROL16r1_EVEX = 3668 |
| 147883 | CEFBS_In64BitMode, // ROL16r1_ND = 3669 |
| 147884 | CEFBS_In64BitMode, // ROL16r1_NF = 3670 |
| 147885 | CEFBS_In64BitMode, // ROL16r1_NF_ND = 3671 |
| 147886 | CEFBS_None, // ROL16rCL = 3672 |
| 147887 | CEFBS_In64BitMode, // ROL16rCL_EVEX = 3673 |
| 147888 | CEFBS_In64BitMode, // ROL16rCL_ND = 3674 |
| 147889 | CEFBS_In64BitMode, // ROL16rCL_NF = 3675 |
| 147890 | CEFBS_In64BitMode, // ROL16rCL_NF_ND = 3676 |
| 147891 | CEFBS_None, // ROL16ri = 3677 |
| 147892 | CEFBS_In64BitMode, // ROL16ri_EVEX = 3678 |
| 147893 | CEFBS_In64BitMode, // ROL16ri_ND = 3679 |
| 147894 | CEFBS_In64BitMode, // ROL16ri_NF = 3680 |
| 147895 | CEFBS_In64BitMode, // ROL16ri_NF_ND = 3681 |
| 147896 | CEFBS_None, // ROL32m1 = 3682 |
| 147897 | CEFBS_In64BitMode, // ROL32m1_EVEX = 3683 |
| 147898 | CEFBS_In64BitMode, // ROL32m1_ND = 3684 |
| 147899 | CEFBS_In64BitMode, // ROL32m1_NF = 3685 |
| 147900 | CEFBS_In64BitMode, // ROL32m1_NF_ND = 3686 |
| 147901 | CEFBS_None, // ROL32mCL = 3687 |
| 147902 | CEFBS_In64BitMode, // ROL32mCL_EVEX = 3688 |
| 147903 | CEFBS_In64BitMode, // ROL32mCL_ND = 3689 |
| 147904 | CEFBS_In64BitMode, // ROL32mCL_NF = 3690 |
| 147905 | CEFBS_In64BitMode, // ROL32mCL_NF_ND = 3691 |
| 147906 | CEFBS_None, // ROL32mi = 3692 |
| 147907 | CEFBS_In64BitMode, // ROL32mi_EVEX = 3693 |
| 147908 | CEFBS_In64BitMode, // ROL32mi_ND = 3694 |
| 147909 | CEFBS_In64BitMode, // ROL32mi_NF = 3695 |
| 147910 | CEFBS_In64BitMode, // ROL32mi_NF_ND = 3696 |
| 147911 | CEFBS_None, // ROL32r1 = 3697 |
| 147912 | CEFBS_In64BitMode, // ROL32r1_EVEX = 3698 |
| 147913 | CEFBS_In64BitMode, // ROL32r1_ND = 3699 |
| 147914 | CEFBS_In64BitMode, // ROL32r1_NF = 3700 |
| 147915 | CEFBS_In64BitMode, // ROL32r1_NF_ND = 3701 |
| 147916 | CEFBS_None, // ROL32rCL = 3702 |
| 147917 | CEFBS_In64BitMode, // ROL32rCL_EVEX = 3703 |
| 147918 | CEFBS_In64BitMode, // ROL32rCL_ND = 3704 |
| 147919 | CEFBS_In64BitMode, // ROL32rCL_NF = 3705 |
| 147920 | CEFBS_In64BitMode, // ROL32rCL_NF_ND = 3706 |
| 147921 | CEFBS_None, // ROL32ri = 3707 |
| 147922 | CEFBS_In64BitMode, // ROL32ri_EVEX = 3708 |
| 147923 | CEFBS_In64BitMode, // ROL32ri_ND = 3709 |
| 147924 | CEFBS_In64BitMode, // ROL32ri_NF = 3710 |
| 147925 | CEFBS_In64BitMode, // ROL32ri_NF_ND = 3711 |
| 147926 | CEFBS_In64BitMode, // ROL64m1 = 3712 |
| 147927 | CEFBS_In64BitMode, // ROL64m1_EVEX = 3713 |
| 147928 | CEFBS_In64BitMode, // ROL64m1_ND = 3714 |
| 147929 | CEFBS_In64BitMode, // ROL64m1_NF = 3715 |
| 147930 | CEFBS_In64BitMode, // ROL64m1_NF_ND = 3716 |
| 147931 | CEFBS_In64BitMode, // ROL64mCL = 3717 |
| 147932 | CEFBS_In64BitMode, // ROL64mCL_EVEX = 3718 |
| 147933 | CEFBS_In64BitMode, // ROL64mCL_ND = 3719 |
| 147934 | CEFBS_In64BitMode, // ROL64mCL_NF = 3720 |
| 147935 | CEFBS_In64BitMode, // ROL64mCL_NF_ND = 3721 |
| 147936 | CEFBS_In64BitMode, // ROL64mi = 3722 |
| 147937 | CEFBS_In64BitMode, // ROL64mi_EVEX = 3723 |
| 147938 | CEFBS_In64BitMode, // ROL64mi_ND = 3724 |
| 147939 | CEFBS_In64BitMode, // ROL64mi_NF = 3725 |
| 147940 | CEFBS_In64BitMode, // ROL64mi_NF_ND = 3726 |
| 147941 | CEFBS_None, // ROL64r1 = 3727 |
| 147942 | CEFBS_In64BitMode, // ROL64r1_EVEX = 3728 |
| 147943 | CEFBS_In64BitMode, // ROL64r1_ND = 3729 |
| 147944 | CEFBS_In64BitMode, // ROL64r1_NF = 3730 |
| 147945 | CEFBS_In64BitMode, // ROL64r1_NF_ND = 3731 |
| 147946 | CEFBS_None, // ROL64rCL = 3732 |
| 147947 | CEFBS_In64BitMode, // ROL64rCL_EVEX = 3733 |
| 147948 | CEFBS_In64BitMode, // ROL64rCL_ND = 3734 |
| 147949 | CEFBS_In64BitMode, // ROL64rCL_NF = 3735 |
| 147950 | CEFBS_In64BitMode, // ROL64rCL_NF_ND = 3736 |
| 147951 | CEFBS_None, // ROL64ri = 3737 |
| 147952 | CEFBS_In64BitMode, // ROL64ri_EVEX = 3738 |
| 147953 | CEFBS_In64BitMode, // ROL64ri_ND = 3739 |
| 147954 | CEFBS_In64BitMode, // ROL64ri_NF = 3740 |
| 147955 | CEFBS_In64BitMode, // ROL64ri_NF_ND = 3741 |
| 147956 | CEFBS_None, // ROL8m1 = 3742 |
| 147957 | CEFBS_In64BitMode, // ROL8m1_EVEX = 3743 |
| 147958 | CEFBS_In64BitMode, // ROL8m1_ND = 3744 |
| 147959 | CEFBS_In64BitMode, // ROL8m1_NF = 3745 |
| 147960 | CEFBS_In64BitMode, // ROL8m1_NF_ND = 3746 |
| 147961 | CEFBS_None, // ROL8mCL = 3747 |
| 147962 | CEFBS_In64BitMode, // ROL8mCL_EVEX = 3748 |
| 147963 | CEFBS_In64BitMode, // ROL8mCL_ND = 3749 |
| 147964 | CEFBS_In64BitMode, // ROL8mCL_NF = 3750 |
| 147965 | CEFBS_In64BitMode, // ROL8mCL_NF_ND = 3751 |
| 147966 | CEFBS_None, // ROL8mi = 3752 |
| 147967 | CEFBS_In64BitMode, // ROL8mi_EVEX = 3753 |
| 147968 | CEFBS_In64BitMode, // ROL8mi_ND = 3754 |
| 147969 | CEFBS_In64BitMode, // ROL8mi_NF = 3755 |
| 147970 | CEFBS_In64BitMode, // ROL8mi_NF_ND = 3756 |
| 147971 | CEFBS_None, // ROL8r1 = 3757 |
| 147972 | CEFBS_In64BitMode, // ROL8r1_EVEX = 3758 |
| 147973 | CEFBS_In64BitMode, // ROL8r1_ND = 3759 |
| 147974 | CEFBS_In64BitMode, // ROL8r1_NF = 3760 |
| 147975 | CEFBS_In64BitMode, // ROL8r1_NF_ND = 3761 |
| 147976 | CEFBS_None, // ROL8rCL = 3762 |
| 147977 | CEFBS_In64BitMode, // ROL8rCL_EVEX = 3763 |
| 147978 | CEFBS_In64BitMode, // ROL8rCL_ND = 3764 |
| 147979 | CEFBS_In64BitMode, // ROL8rCL_NF = 3765 |
| 147980 | CEFBS_In64BitMode, // ROL8rCL_NF_ND = 3766 |
| 147981 | CEFBS_None, // ROL8ri = 3767 |
| 147982 | CEFBS_In64BitMode, // ROL8ri_EVEX = 3768 |
| 147983 | CEFBS_In64BitMode, // ROL8ri_ND = 3769 |
| 147984 | CEFBS_In64BitMode, // ROL8ri_NF = 3770 |
| 147985 | CEFBS_In64BitMode, // ROL8ri_NF_ND = 3771 |
| 147986 | CEFBS_None, // ROR16m1 = 3772 |
| 147987 | CEFBS_In64BitMode, // ROR16m1_EVEX = 3773 |
| 147988 | CEFBS_In64BitMode, // ROR16m1_ND = 3774 |
| 147989 | CEFBS_In64BitMode, // ROR16m1_NF = 3775 |
| 147990 | CEFBS_In64BitMode, // ROR16m1_NF_ND = 3776 |
| 147991 | CEFBS_None, // ROR16mCL = 3777 |
| 147992 | CEFBS_In64BitMode, // ROR16mCL_EVEX = 3778 |
| 147993 | CEFBS_In64BitMode, // ROR16mCL_ND = 3779 |
| 147994 | CEFBS_In64BitMode, // ROR16mCL_NF = 3780 |
| 147995 | CEFBS_In64BitMode, // ROR16mCL_NF_ND = 3781 |
| 147996 | CEFBS_None, // ROR16mi = 3782 |
| 147997 | CEFBS_In64BitMode, // ROR16mi_EVEX = 3783 |
| 147998 | CEFBS_In64BitMode, // ROR16mi_ND = 3784 |
| 147999 | CEFBS_In64BitMode, // ROR16mi_NF = 3785 |
| 148000 | CEFBS_In64BitMode, // ROR16mi_NF_ND = 3786 |
| 148001 | CEFBS_None, // ROR16r1 = 3787 |
| 148002 | CEFBS_In64BitMode, // ROR16r1_EVEX = 3788 |
| 148003 | CEFBS_In64BitMode, // ROR16r1_ND = 3789 |
| 148004 | CEFBS_In64BitMode, // ROR16r1_NF = 3790 |
| 148005 | CEFBS_In64BitMode, // ROR16r1_NF_ND = 3791 |
| 148006 | CEFBS_None, // ROR16rCL = 3792 |
| 148007 | CEFBS_In64BitMode, // ROR16rCL_EVEX = 3793 |
| 148008 | CEFBS_In64BitMode, // ROR16rCL_ND = 3794 |
| 148009 | CEFBS_In64BitMode, // ROR16rCL_NF = 3795 |
| 148010 | CEFBS_In64BitMode, // ROR16rCL_NF_ND = 3796 |
| 148011 | CEFBS_None, // ROR16ri = 3797 |
| 148012 | CEFBS_In64BitMode, // ROR16ri_EVEX = 3798 |
| 148013 | CEFBS_In64BitMode, // ROR16ri_ND = 3799 |
| 148014 | CEFBS_In64BitMode, // ROR16ri_NF = 3800 |
| 148015 | CEFBS_In64BitMode, // ROR16ri_NF_ND = 3801 |
| 148016 | CEFBS_None, // ROR32m1 = 3802 |
| 148017 | CEFBS_In64BitMode, // ROR32m1_EVEX = 3803 |
| 148018 | CEFBS_In64BitMode, // ROR32m1_ND = 3804 |
| 148019 | CEFBS_In64BitMode, // ROR32m1_NF = 3805 |
| 148020 | CEFBS_In64BitMode, // ROR32m1_NF_ND = 3806 |
| 148021 | CEFBS_None, // ROR32mCL = 3807 |
| 148022 | CEFBS_In64BitMode, // ROR32mCL_EVEX = 3808 |
| 148023 | CEFBS_In64BitMode, // ROR32mCL_ND = 3809 |
| 148024 | CEFBS_In64BitMode, // ROR32mCL_NF = 3810 |
| 148025 | CEFBS_In64BitMode, // ROR32mCL_NF_ND = 3811 |
| 148026 | CEFBS_None, // ROR32mi = 3812 |
| 148027 | CEFBS_In64BitMode, // ROR32mi_EVEX = 3813 |
| 148028 | CEFBS_In64BitMode, // ROR32mi_ND = 3814 |
| 148029 | CEFBS_In64BitMode, // ROR32mi_NF = 3815 |
| 148030 | CEFBS_In64BitMode, // ROR32mi_NF_ND = 3816 |
| 148031 | CEFBS_None, // ROR32r1 = 3817 |
| 148032 | CEFBS_In64BitMode, // ROR32r1_EVEX = 3818 |
| 148033 | CEFBS_In64BitMode, // ROR32r1_ND = 3819 |
| 148034 | CEFBS_In64BitMode, // ROR32r1_NF = 3820 |
| 148035 | CEFBS_In64BitMode, // ROR32r1_NF_ND = 3821 |
| 148036 | CEFBS_None, // ROR32rCL = 3822 |
| 148037 | CEFBS_In64BitMode, // ROR32rCL_EVEX = 3823 |
| 148038 | CEFBS_In64BitMode, // ROR32rCL_ND = 3824 |
| 148039 | CEFBS_In64BitMode, // ROR32rCL_NF = 3825 |
| 148040 | CEFBS_In64BitMode, // ROR32rCL_NF_ND = 3826 |
| 148041 | CEFBS_None, // ROR32ri = 3827 |
| 148042 | CEFBS_In64BitMode, // ROR32ri_EVEX = 3828 |
| 148043 | CEFBS_In64BitMode, // ROR32ri_ND = 3829 |
| 148044 | CEFBS_In64BitMode, // ROR32ri_NF = 3830 |
| 148045 | CEFBS_In64BitMode, // ROR32ri_NF_ND = 3831 |
| 148046 | CEFBS_In64BitMode, // ROR64m1 = 3832 |
| 148047 | CEFBS_In64BitMode, // ROR64m1_EVEX = 3833 |
| 148048 | CEFBS_In64BitMode, // ROR64m1_ND = 3834 |
| 148049 | CEFBS_In64BitMode, // ROR64m1_NF = 3835 |
| 148050 | CEFBS_In64BitMode, // ROR64m1_NF_ND = 3836 |
| 148051 | CEFBS_In64BitMode, // ROR64mCL = 3837 |
| 148052 | CEFBS_In64BitMode, // ROR64mCL_EVEX = 3838 |
| 148053 | CEFBS_In64BitMode, // ROR64mCL_ND = 3839 |
| 148054 | CEFBS_In64BitMode, // ROR64mCL_NF = 3840 |
| 148055 | CEFBS_In64BitMode, // ROR64mCL_NF_ND = 3841 |
| 148056 | CEFBS_In64BitMode, // ROR64mi = 3842 |
| 148057 | CEFBS_In64BitMode, // ROR64mi_EVEX = 3843 |
| 148058 | CEFBS_In64BitMode, // ROR64mi_ND = 3844 |
| 148059 | CEFBS_In64BitMode, // ROR64mi_NF = 3845 |
| 148060 | CEFBS_In64BitMode, // ROR64mi_NF_ND = 3846 |
| 148061 | CEFBS_None, // ROR64r1 = 3847 |
| 148062 | CEFBS_In64BitMode, // ROR64r1_EVEX = 3848 |
| 148063 | CEFBS_In64BitMode, // ROR64r1_ND = 3849 |
| 148064 | CEFBS_In64BitMode, // ROR64r1_NF = 3850 |
| 148065 | CEFBS_In64BitMode, // ROR64r1_NF_ND = 3851 |
| 148066 | CEFBS_None, // ROR64rCL = 3852 |
| 148067 | CEFBS_In64BitMode, // ROR64rCL_EVEX = 3853 |
| 148068 | CEFBS_In64BitMode, // ROR64rCL_ND = 3854 |
| 148069 | CEFBS_In64BitMode, // ROR64rCL_NF = 3855 |
| 148070 | CEFBS_In64BitMode, // ROR64rCL_NF_ND = 3856 |
| 148071 | CEFBS_None, // ROR64ri = 3857 |
| 148072 | CEFBS_In64BitMode, // ROR64ri_EVEX = 3858 |
| 148073 | CEFBS_In64BitMode, // ROR64ri_ND = 3859 |
| 148074 | CEFBS_In64BitMode, // ROR64ri_NF = 3860 |
| 148075 | CEFBS_In64BitMode, // ROR64ri_NF_ND = 3861 |
| 148076 | CEFBS_None, // ROR8m1 = 3862 |
| 148077 | CEFBS_In64BitMode, // ROR8m1_EVEX = 3863 |
| 148078 | CEFBS_In64BitMode, // ROR8m1_ND = 3864 |
| 148079 | CEFBS_In64BitMode, // ROR8m1_NF = 3865 |
| 148080 | CEFBS_In64BitMode, // ROR8m1_NF_ND = 3866 |
| 148081 | CEFBS_None, // ROR8mCL = 3867 |
| 148082 | CEFBS_In64BitMode, // ROR8mCL_EVEX = 3868 |
| 148083 | CEFBS_In64BitMode, // ROR8mCL_ND = 3869 |
| 148084 | CEFBS_In64BitMode, // ROR8mCL_NF = 3870 |
| 148085 | CEFBS_In64BitMode, // ROR8mCL_NF_ND = 3871 |
| 148086 | CEFBS_None, // ROR8mi = 3872 |
| 148087 | CEFBS_In64BitMode, // ROR8mi_EVEX = 3873 |
| 148088 | CEFBS_In64BitMode, // ROR8mi_ND = 3874 |
| 148089 | CEFBS_In64BitMode, // ROR8mi_NF = 3875 |
| 148090 | CEFBS_In64BitMode, // ROR8mi_NF_ND = 3876 |
| 148091 | CEFBS_None, // ROR8r1 = 3877 |
| 148092 | CEFBS_In64BitMode, // ROR8r1_EVEX = 3878 |
| 148093 | CEFBS_In64BitMode, // ROR8r1_ND = 3879 |
| 148094 | CEFBS_In64BitMode, // ROR8r1_NF = 3880 |
| 148095 | CEFBS_In64BitMode, // ROR8r1_NF_ND = 3881 |
| 148096 | CEFBS_None, // ROR8rCL = 3882 |
| 148097 | CEFBS_In64BitMode, // ROR8rCL_EVEX = 3883 |
| 148098 | CEFBS_In64BitMode, // ROR8rCL_ND = 3884 |
| 148099 | CEFBS_In64BitMode, // ROR8rCL_NF = 3885 |
| 148100 | CEFBS_In64BitMode, // ROR8rCL_NF_ND = 3886 |
| 148101 | CEFBS_None, // ROR8ri = 3887 |
| 148102 | CEFBS_In64BitMode, // ROR8ri_EVEX = 3888 |
| 148103 | CEFBS_In64BitMode, // ROR8ri_ND = 3889 |
| 148104 | CEFBS_In64BitMode, // ROR8ri_NF = 3890 |
| 148105 | CEFBS_In64BitMode, // ROR8ri_NF_ND = 3891 |
| 148106 | CEFBS_None, // RORX32mi = 3892 |
| 148107 | CEFBS_In64BitMode, // RORX32mi_EVEX = 3893 |
| 148108 | CEFBS_None, // RORX32ri = 3894 |
| 148109 | CEFBS_In64BitMode, // RORX32ri_EVEX = 3895 |
| 148110 | CEFBS_None, // RORX64mi = 3896 |
| 148111 | CEFBS_In64BitMode, // RORX64mi_EVEX = 3897 |
| 148112 | CEFBS_None, // RORX64ri = 3898 |
| 148113 | CEFBS_In64BitMode, // RORX64ri_EVEX = 3899 |
| 148114 | CEFBS_None, // ROUNDPDmi = 3900 |
| 148115 | CEFBS_None, // ROUNDPDri = 3901 |
| 148116 | CEFBS_None, // ROUNDPSmi = 3902 |
| 148117 | CEFBS_None, // ROUNDPSri = 3903 |
| 148118 | CEFBS_None, // ROUNDSDmi = 3904 |
| 148119 | CEFBS_None, // ROUNDSDmi_Int = 3905 |
| 148120 | CEFBS_None, // ROUNDSDri = 3906 |
| 148121 | CEFBS_None, // ROUNDSDri_Int = 3907 |
| 148122 | CEFBS_None, // ROUNDSSmi = 3908 |
| 148123 | CEFBS_None, // ROUNDSSmi_Int = 3909 |
| 148124 | CEFBS_None, // ROUNDSSri = 3910 |
| 148125 | CEFBS_None, // ROUNDSSri_Int = 3911 |
| 148126 | CEFBS_None, // RSM = 3912 |
| 148127 | CEFBS_None, // RSQRTPSm = 3913 |
| 148128 | CEFBS_None, // RSQRTPSr = 3914 |
| 148129 | CEFBS_None, // RSQRTSSm = 3915 |
| 148130 | CEFBS_None, // RSQRTSSm_Int = 3916 |
| 148131 | CEFBS_None, // RSQRTSSr = 3917 |
| 148132 | CEFBS_None, // RSQRTSSr_Int = 3918 |
| 148133 | CEFBS_None, // RSTORSSP = 3919 |
| 148134 | CEFBS_None, // SAHF = 3920 |
| 148135 | CEFBS_Not64BitMode, // SALC = 3921 |
| 148136 | CEFBS_None, // SAR16m1 = 3922 |
| 148137 | CEFBS_In64BitMode, // SAR16m1_EVEX = 3923 |
| 148138 | CEFBS_In64BitMode, // SAR16m1_ND = 3924 |
| 148139 | CEFBS_In64BitMode, // SAR16m1_NF = 3925 |
| 148140 | CEFBS_In64BitMode, // SAR16m1_NF_ND = 3926 |
| 148141 | CEFBS_None, // SAR16mCL = 3927 |
| 148142 | CEFBS_In64BitMode, // SAR16mCL_EVEX = 3928 |
| 148143 | CEFBS_In64BitMode, // SAR16mCL_ND = 3929 |
| 148144 | CEFBS_In64BitMode, // SAR16mCL_NF = 3930 |
| 148145 | CEFBS_In64BitMode, // SAR16mCL_NF_ND = 3931 |
| 148146 | CEFBS_None, // SAR16mi = 3932 |
| 148147 | CEFBS_In64BitMode, // SAR16mi_EVEX = 3933 |
| 148148 | CEFBS_In64BitMode, // SAR16mi_ND = 3934 |
| 148149 | CEFBS_In64BitMode, // SAR16mi_NF = 3935 |
| 148150 | CEFBS_In64BitMode, // SAR16mi_NF_ND = 3936 |
| 148151 | CEFBS_None, // SAR16r1 = 3937 |
| 148152 | CEFBS_In64BitMode, // SAR16r1_EVEX = 3938 |
| 148153 | CEFBS_In64BitMode, // SAR16r1_ND = 3939 |
| 148154 | CEFBS_In64BitMode, // SAR16r1_NF = 3940 |
| 148155 | CEFBS_In64BitMode, // SAR16r1_NF_ND = 3941 |
| 148156 | CEFBS_None, // SAR16rCL = 3942 |
| 148157 | CEFBS_In64BitMode, // SAR16rCL_EVEX = 3943 |
| 148158 | CEFBS_In64BitMode, // SAR16rCL_ND = 3944 |
| 148159 | CEFBS_In64BitMode, // SAR16rCL_NF = 3945 |
| 148160 | CEFBS_In64BitMode, // SAR16rCL_NF_ND = 3946 |
| 148161 | CEFBS_None, // SAR16ri = 3947 |
| 148162 | CEFBS_In64BitMode, // SAR16ri_EVEX = 3948 |
| 148163 | CEFBS_In64BitMode, // SAR16ri_ND = 3949 |
| 148164 | CEFBS_In64BitMode, // SAR16ri_NF = 3950 |
| 148165 | CEFBS_In64BitMode, // SAR16ri_NF_ND = 3951 |
| 148166 | CEFBS_None, // SAR32m1 = 3952 |
| 148167 | CEFBS_In64BitMode, // SAR32m1_EVEX = 3953 |
| 148168 | CEFBS_In64BitMode, // SAR32m1_ND = 3954 |
| 148169 | CEFBS_In64BitMode, // SAR32m1_NF = 3955 |
| 148170 | CEFBS_In64BitMode, // SAR32m1_NF_ND = 3956 |
| 148171 | CEFBS_None, // SAR32mCL = 3957 |
| 148172 | CEFBS_In64BitMode, // SAR32mCL_EVEX = 3958 |
| 148173 | CEFBS_In64BitMode, // SAR32mCL_ND = 3959 |
| 148174 | CEFBS_In64BitMode, // SAR32mCL_NF = 3960 |
| 148175 | CEFBS_In64BitMode, // SAR32mCL_NF_ND = 3961 |
| 148176 | CEFBS_None, // SAR32mi = 3962 |
| 148177 | CEFBS_In64BitMode, // SAR32mi_EVEX = 3963 |
| 148178 | CEFBS_In64BitMode, // SAR32mi_ND = 3964 |
| 148179 | CEFBS_In64BitMode, // SAR32mi_NF = 3965 |
| 148180 | CEFBS_In64BitMode, // SAR32mi_NF_ND = 3966 |
| 148181 | CEFBS_None, // SAR32r1 = 3967 |
| 148182 | CEFBS_In64BitMode, // SAR32r1_EVEX = 3968 |
| 148183 | CEFBS_In64BitMode, // SAR32r1_ND = 3969 |
| 148184 | CEFBS_In64BitMode, // SAR32r1_NF = 3970 |
| 148185 | CEFBS_In64BitMode, // SAR32r1_NF_ND = 3971 |
| 148186 | CEFBS_None, // SAR32rCL = 3972 |
| 148187 | CEFBS_In64BitMode, // SAR32rCL_EVEX = 3973 |
| 148188 | CEFBS_In64BitMode, // SAR32rCL_ND = 3974 |
| 148189 | CEFBS_In64BitMode, // SAR32rCL_NF = 3975 |
| 148190 | CEFBS_In64BitMode, // SAR32rCL_NF_ND = 3976 |
| 148191 | CEFBS_None, // SAR32ri = 3977 |
| 148192 | CEFBS_In64BitMode, // SAR32ri_EVEX = 3978 |
| 148193 | CEFBS_In64BitMode, // SAR32ri_ND = 3979 |
| 148194 | CEFBS_In64BitMode, // SAR32ri_NF = 3980 |
| 148195 | CEFBS_In64BitMode, // SAR32ri_NF_ND = 3981 |
| 148196 | CEFBS_In64BitMode, // SAR64m1 = 3982 |
| 148197 | CEFBS_In64BitMode, // SAR64m1_EVEX = 3983 |
| 148198 | CEFBS_In64BitMode, // SAR64m1_ND = 3984 |
| 148199 | CEFBS_In64BitMode, // SAR64m1_NF = 3985 |
| 148200 | CEFBS_In64BitMode, // SAR64m1_NF_ND = 3986 |
| 148201 | CEFBS_In64BitMode, // SAR64mCL = 3987 |
| 148202 | CEFBS_In64BitMode, // SAR64mCL_EVEX = 3988 |
| 148203 | CEFBS_In64BitMode, // SAR64mCL_ND = 3989 |
| 148204 | CEFBS_In64BitMode, // SAR64mCL_NF = 3990 |
| 148205 | CEFBS_In64BitMode, // SAR64mCL_NF_ND = 3991 |
| 148206 | CEFBS_In64BitMode, // SAR64mi = 3992 |
| 148207 | CEFBS_In64BitMode, // SAR64mi_EVEX = 3993 |
| 148208 | CEFBS_In64BitMode, // SAR64mi_ND = 3994 |
| 148209 | CEFBS_In64BitMode, // SAR64mi_NF = 3995 |
| 148210 | CEFBS_In64BitMode, // SAR64mi_NF_ND = 3996 |
| 148211 | CEFBS_None, // SAR64r1 = 3997 |
| 148212 | CEFBS_In64BitMode, // SAR64r1_EVEX = 3998 |
| 148213 | CEFBS_In64BitMode, // SAR64r1_ND = 3999 |
| 148214 | CEFBS_In64BitMode, // SAR64r1_NF = 4000 |
| 148215 | CEFBS_In64BitMode, // SAR64r1_NF_ND = 4001 |
| 148216 | CEFBS_None, // SAR64rCL = 4002 |
| 148217 | CEFBS_In64BitMode, // SAR64rCL_EVEX = 4003 |
| 148218 | CEFBS_In64BitMode, // SAR64rCL_ND = 4004 |
| 148219 | CEFBS_In64BitMode, // SAR64rCL_NF = 4005 |
| 148220 | CEFBS_In64BitMode, // SAR64rCL_NF_ND = 4006 |
| 148221 | CEFBS_None, // SAR64ri = 4007 |
| 148222 | CEFBS_In64BitMode, // SAR64ri_EVEX = 4008 |
| 148223 | CEFBS_In64BitMode, // SAR64ri_ND = 4009 |
| 148224 | CEFBS_In64BitMode, // SAR64ri_NF = 4010 |
| 148225 | CEFBS_In64BitMode, // SAR64ri_NF_ND = 4011 |
| 148226 | CEFBS_None, // SAR8m1 = 4012 |
| 148227 | CEFBS_In64BitMode, // SAR8m1_EVEX = 4013 |
| 148228 | CEFBS_In64BitMode, // SAR8m1_ND = 4014 |
| 148229 | CEFBS_In64BitMode, // SAR8m1_NF = 4015 |
| 148230 | CEFBS_In64BitMode, // SAR8m1_NF_ND = 4016 |
| 148231 | CEFBS_None, // SAR8mCL = 4017 |
| 148232 | CEFBS_In64BitMode, // SAR8mCL_EVEX = 4018 |
| 148233 | CEFBS_In64BitMode, // SAR8mCL_ND = 4019 |
| 148234 | CEFBS_In64BitMode, // SAR8mCL_NF = 4020 |
| 148235 | CEFBS_In64BitMode, // SAR8mCL_NF_ND = 4021 |
| 148236 | CEFBS_None, // SAR8mi = 4022 |
| 148237 | CEFBS_In64BitMode, // SAR8mi_EVEX = 4023 |
| 148238 | CEFBS_In64BitMode, // SAR8mi_ND = 4024 |
| 148239 | CEFBS_In64BitMode, // SAR8mi_NF = 4025 |
| 148240 | CEFBS_In64BitMode, // SAR8mi_NF_ND = 4026 |
| 148241 | CEFBS_None, // SAR8r1 = 4027 |
| 148242 | CEFBS_In64BitMode, // SAR8r1_EVEX = 4028 |
| 148243 | CEFBS_In64BitMode, // SAR8r1_ND = 4029 |
| 148244 | CEFBS_In64BitMode, // SAR8r1_NF = 4030 |
| 148245 | CEFBS_In64BitMode, // SAR8r1_NF_ND = 4031 |
| 148246 | CEFBS_None, // SAR8rCL = 4032 |
| 148247 | CEFBS_In64BitMode, // SAR8rCL_EVEX = 4033 |
| 148248 | CEFBS_In64BitMode, // SAR8rCL_ND = 4034 |
| 148249 | CEFBS_In64BitMode, // SAR8rCL_NF = 4035 |
| 148250 | CEFBS_In64BitMode, // SAR8rCL_NF_ND = 4036 |
| 148251 | CEFBS_None, // SAR8ri = 4037 |
| 148252 | CEFBS_In64BitMode, // SAR8ri_EVEX = 4038 |
| 148253 | CEFBS_In64BitMode, // SAR8ri_ND = 4039 |
| 148254 | CEFBS_In64BitMode, // SAR8ri_NF = 4040 |
| 148255 | CEFBS_In64BitMode, // SAR8ri_NF_ND = 4041 |
| 148256 | CEFBS_None, // SARX32rm = 4042 |
| 148257 | CEFBS_In64BitMode, // SARX32rm_EVEX = 4043 |
| 148258 | CEFBS_None, // SARX32rr = 4044 |
| 148259 | CEFBS_In64BitMode, // SARX32rr_EVEX = 4045 |
| 148260 | CEFBS_None, // SARX64rm = 4046 |
| 148261 | CEFBS_In64BitMode, // SARX64rm_EVEX = 4047 |
| 148262 | CEFBS_None, // SARX64rr = 4048 |
| 148263 | CEFBS_In64BitMode, // SARX64rr_EVEX = 4049 |
| 148264 | CEFBS_None, // SAVEPREVSSP = 4050 |
| 148265 | CEFBS_None, // SBB16i16 = 4051 |
| 148266 | CEFBS_None, // SBB16mi = 4052 |
| 148267 | CEFBS_None, // SBB16mi8 = 4053 |
| 148268 | CEFBS_In64BitMode, // SBB16mi8_EVEX = 4054 |
| 148269 | CEFBS_In64BitMode, // SBB16mi8_ND = 4055 |
| 148270 | CEFBS_In64BitMode, // SBB16mi_EVEX = 4056 |
| 148271 | CEFBS_In64BitMode, // SBB16mi_ND = 4057 |
| 148272 | CEFBS_None, // SBB16mr = 4058 |
| 148273 | CEFBS_In64BitMode, // SBB16mr_EVEX = 4059 |
| 148274 | CEFBS_In64BitMode, // SBB16mr_ND = 4060 |
| 148275 | CEFBS_None, // SBB16ri = 4061 |
| 148276 | CEFBS_None, // SBB16ri8 = 4062 |
| 148277 | CEFBS_In64BitMode, // SBB16ri8_EVEX = 4063 |
| 148278 | CEFBS_In64BitMode, // SBB16ri8_ND = 4064 |
| 148279 | CEFBS_In64BitMode, // SBB16ri_EVEX = 4065 |
| 148280 | CEFBS_In64BitMode, // SBB16ri_ND = 4066 |
| 148281 | CEFBS_None, // SBB16rm = 4067 |
| 148282 | CEFBS_In64BitMode, // SBB16rm_EVEX = 4068 |
| 148283 | CEFBS_In64BitMode, // SBB16rm_ND = 4069 |
| 148284 | CEFBS_None, // SBB16rr = 4070 |
| 148285 | CEFBS_In64BitMode, // SBB16rr_EVEX = 4071 |
| 148286 | CEFBS_In64BitMode, // SBB16rr_EVEX_REV = 4072 |
| 148287 | CEFBS_In64BitMode, // SBB16rr_ND = 4073 |
| 148288 | CEFBS_In64BitMode, // SBB16rr_ND_REV = 4074 |
| 148289 | CEFBS_None, // SBB16rr_REV = 4075 |
| 148290 | CEFBS_None, // SBB32i32 = 4076 |
| 148291 | CEFBS_None, // SBB32mi = 4077 |
| 148292 | CEFBS_None, // SBB32mi8 = 4078 |
| 148293 | CEFBS_In64BitMode, // SBB32mi8_EVEX = 4079 |
| 148294 | CEFBS_In64BitMode, // SBB32mi8_ND = 4080 |
| 148295 | CEFBS_In64BitMode, // SBB32mi_EVEX = 4081 |
| 148296 | CEFBS_In64BitMode, // SBB32mi_ND = 4082 |
| 148297 | CEFBS_None, // SBB32mr = 4083 |
| 148298 | CEFBS_In64BitMode, // SBB32mr_EVEX = 4084 |
| 148299 | CEFBS_In64BitMode, // SBB32mr_ND = 4085 |
| 148300 | CEFBS_None, // SBB32ri = 4086 |
| 148301 | CEFBS_None, // SBB32ri8 = 4087 |
| 148302 | CEFBS_In64BitMode, // SBB32ri8_EVEX = 4088 |
| 148303 | CEFBS_In64BitMode, // SBB32ri8_ND = 4089 |
| 148304 | CEFBS_In64BitMode, // SBB32ri_EVEX = 4090 |
| 148305 | CEFBS_In64BitMode, // SBB32ri_ND = 4091 |
| 148306 | CEFBS_None, // SBB32rm = 4092 |
| 148307 | CEFBS_In64BitMode, // SBB32rm_EVEX = 4093 |
| 148308 | CEFBS_In64BitMode, // SBB32rm_ND = 4094 |
| 148309 | CEFBS_None, // SBB32rr = 4095 |
| 148310 | CEFBS_In64BitMode, // SBB32rr_EVEX = 4096 |
| 148311 | CEFBS_In64BitMode, // SBB32rr_EVEX_REV = 4097 |
| 148312 | CEFBS_In64BitMode, // SBB32rr_ND = 4098 |
| 148313 | CEFBS_In64BitMode, // SBB32rr_ND_REV = 4099 |
| 148314 | CEFBS_None, // SBB32rr_REV = 4100 |
| 148315 | CEFBS_None, // SBB64i32 = 4101 |
| 148316 | CEFBS_In64BitMode, // SBB64mi32 = 4102 |
| 148317 | CEFBS_In64BitMode, // SBB64mi32_EVEX = 4103 |
| 148318 | CEFBS_In64BitMode, // SBB64mi32_ND = 4104 |
| 148319 | CEFBS_In64BitMode, // SBB64mi8 = 4105 |
| 148320 | CEFBS_In64BitMode, // SBB64mi8_EVEX = 4106 |
| 148321 | CEFBS_In64BitMode, // SBB64mi8_ND = 4107 |
| 148322 | CEFBS_None, // SBB64mr = 4108 |
| 148323 | CEFBS_In64BitMode, // SBB64mr_EVEX = 4109 |
| 148324 | CEFBS_In64BitMode, // SBB64mr_ND = 4110 |
| 148325 | CEFBS_None, // SBB64ri32 = 4111 |
| 148326 | CEFBS_In64BitMode, // SBB64ri32_EVEX = 4112 |
| 148327 | CEFBS_In64BitMode, // SBB64ri32_ND = 4113 |
| 148328 | CEFBS_None, // SBB64ri8 = 4114 |
| 148329 | CEFBS_In64BitMode, // SBB64ri8_EVEX = 4115 |
| 148330 | CEFBS_In64BitMode, // SBB64ri8_ND = 4116 |
| 148331 | CEFBS_None, // SBB64rm = 4117 |
| 148332 | CEFBS_In64BitMode, // SBB64rm_EVEX = 4118 |
| 148333 | CEFBS_In64BitMode, // SBB64rm_ND = 4119 |
| 148334 | CEFBS_None, // SBB64rr = 4120 |
| 148335 | CEFBS_In64BitMode, // SBB64rr_EVEX = 4121 |
| 148336 | CEFBS_In64BitMode, // SBB64rr_EVEX_REV = 4122 |
| 148337 | CEFBS_In64BitMode, // SBB64rr_ND = 4123 |
| 148338 | CEFBS_In64BitMode, // SBB64rr_ND_REV = 4124 |
| 148339 | CEFBS_None, // SBB64rr_REV = 4125 |
| 148340 | CEFBS_None, // SBB8i8 = 4126 |
| 148341 | CEFBS_None, // SBB8mi = 4127 |
| 148342 | CEFBS_Not64BitMode, // SBB8mi8 = 4128 |
| 148343 | CEFBS_In64BitMode, // SBB8mi_EVEX = 4129 |
| 148344 | CEFBS_In64BitMode, // SBB8mi_ND = 4130 |
| 148345 | CEFBS_None, // SBB8mr = 4131 |
| 148346 | CEFBS_In64BitMode, // SBB8mr_EVEX = 4132 |
| 148347 | CEFBS_In64BitMode, // SBB8mr_ND = 4133 |
| 148348 | CEFBS_None, // SBB8ri = 4134 |
| 148349 | CEFBS_Not64BitMode, // SBB8ri8 = 4135 |
| 148350 | CEFBS_In64BitMode, // SBB8ri_EVEX = 4136 |
| 148351 | CEFBS_In64BitMode, // SBB8ri_ND = 4137 |
| 148352 | CEFBS_None, // SBB8rm = 4138 |
| 148353 | CEFBS_In64BitMode, // SBB8rm_EVEX = 4139 |
| 148354 | CEFBS_In64BitMode, // SBB8rm_ND = 4140 |
| 148355 | CEFBS_None, // SBB8rr = 4141 |
| 148356 | CEFBS_In64BitMode, // SBB8rr_EVEX = 4142 |
| 148357 | CEFBS_In64BitMode, // SBB8rr_EVEX_REV = 4143 |
| 148358 | CEFBS_In64BitMode, // SBB8rr_ND = 4144 |
| 148359 | CEFBS_In64BitMode, // SBB8rr_ND_REV = 4145 |
| 148360 | CEFBS_None, // SBB8rr_REV = 4146 |
| 148361 | CEFBS_None, // SCASB = 4147 |
| 148362 | CEFBS_None, // SCASL = 4148 |
| 148363 | CEFBS_In64BitMode, // SCASQ = 4149 |
| 148364 | CEFBS_None, // SCASW = 4150 |
| 148365 | CEFBS_In64BitMode, // SEAMCALL = 4151 |
| 148366 | CEFBS_In64BitMode, // SEAMOPS = 4152 |
| 148367 | CEFBS_In64BitMode, // SEAMRET = 4153 |
| 148368 | CEFBS_None, // SEG_ALLOCA_32 = 4154 |
| 148369 | CEFBS_In64BitMode, // SEG_ALLOCA_64 = 4155 |
| 148370 | CEFBS_In64BitMode, // SENDUIPI = 4156 |
| 148371 | CEFBS_None, // SERIALIZE = 4157 |
| 148372 | CEFBS_None, // SETCCm = 4158 |
| 148373 | CEFBS_None, // SETCCm_EVEX = 4159 |
| 148374 | CEFBS_None, // SETCCr = 4160 |
| 148375 | CEFBS_None, // SETCCr_EVEX = 4161 |
| 148376 | CEFBS_None, // SETSSBSY = 4162 |
| 148377 | CEFBS_None, // SETZUCCm = 4163 |
| 148378 | CEFBS_None, // SETZUCCr = 4164 |
| 148379 | CEFBS_None, // SFENCE = 4165 |
| 148380 | CEFBS_Not64BitMode, // SGDT16m = 4166 |
| 148381 | CEFBS_Not64BitMode, // SGDT32m = 4167 |
| 148382 | CEFBS_In64BitMode, // SGDT64m = 4168 |
| 148383 | CEFBS_None, // SHA1MSG1rm = 4169 |
| 148384 | CEFBS_None, // SHA1MSG1rr = 4170 |
| 148385 | CEFBS_None, // SHA1MSG2rm = 4171 |
| 148386 | CEFBS_None, // SHA1MSG2rr = 4172 |
| 148387 | CEFBS_None, // SHA1NEXTErm = 4173 |
| 148388 | CEFBS_None, // SHA1NEXTErr = 4174 |
| 148389 | CEFBS_None, // SHA1RNDS4rmi = 4175 |
| 148390 | CEFBS_None, // SHA1RNDS4rri = 4176 |
| 148391 | CEFBS_None, // SHA256MSG1rm = 4177 |
| 148392 | CEFBS_None, // SHA256MSG1rr = 4178 |
| 148393 | CEFBS_None, // SHA256MSG2rm = 4179 |
| 148394 | CEFBS_None, // SHA256MSG2rr = 4180 |
| 148395 | CEFBS_None, // SHA256RNDS2rm = 4181 |
| 148396 | CEFBS_None, // SHA256RNDS2rr = 4182 |
| 148397 | CEFBS_None, // SHL16m1 = 4183 |
| 148398 | CEFBS_In64BitMode, // SHL16m1_EVEX = 4184 |
| 148399 | CEFBS_In64BitMode, // SHL16m1_ND = 4185 |
| 148400 | CEFBS_In64BitMode, // SHL16m1_NF = 4186 |
| 148401 | CEFBS_In64BitMode, // SHL16m1_NF_ND = 4187 |
| 148402 | CEFBS_None, // SHL16mCL = 4188 |
| 148403 | CEFBS_In64BitMode, // SHL16mCL_EVEX = 4189 |
| 148404 | CEFBS_In64BitMode, // SHL16mCL_ND = 4190 |
| 148405 | CEFBS_In64BitMode, // SHL16mCL_NF = 4191 |
| 148406 | CEFBS_In64BitMode, // SHL16mCL_NF_ND = 4192 |
| 148407 | CEFBS_None, // SHL16mi = 4193 |
| 148408 | CEFBS_In64BitMode, // SHL16mi_EVEX = 4194 |
| 148409 | CEFBS_In64BitMode, // SHL16mi_ND = 4195 |
| 148410 | CEFBS_In64BitMode, // SHL16mi_NF = 4196 |
| 148411 | CEFBS_In64BitMode, // SHL16mi_NF_ND = 4197 |
| 148412 | CEFBS_None, // SHL16r1 = 4198 |
| 148413 | CEFBS_In64BitMode, // SHL16r1_EVEX = 4199 |
| 148414 | CEFBS_In64BitMode, // SHL16r1_ND = 4200 |
| 148415 | CEFBS_In64BitMode, // SHL16r1_NF = 4201 |
| 148416 | CEFBS_In64BitMode, // SHL16r1_NF_ND = 4202 |
| 148417 | CEFBS_None, // SHL16rCL = 4203 |
| 148418 | CEFBS_In64BitMode, // SHL16rCL_EVEX = 4204 |
| 148419 | CEFBS_In64BitMode, // SHL16rCL_ND = 4205 |
| 148420 | CEFBS_In64BitMode, // SHL16rCL_NF = 4206 |
| 148421 | CEFBS_In64BitMode, // SHL16rCL_NF_ND = 4207 |
| 148422 | CEFBS_None, // SHL16ri = 4208 |
| 148423 | CEFBS_In64BitMode, // SHL16ri_EVEX = 4209 |
| 148424 | CEFBS_In64BitMode, // SHL16ri_ND = 4210 |
| 148425 | CEFBS_In64BitMode, // SHL16ri_NF = 4211 |
| 148426 | CEFBS_In64BitMode, // SHL16ri_NF_ND = 4212 |
| 148427 | CEFBS_None, // SHL32m1 = 4213 |
| 148428 | CEFBS_In64BitMode, // SHL32m1_EVEX = 4214 |
| 148429 | CEFBS_In64BitMode, // SHL32m1_ND = 4215 |
| 148430 | CEFBS_In64BitMode, // SHL32m1_NF = 4216 |
| 148431 | CEFBS_In64BitMode, // SHL32m1_NF_ND = 4217 |
| 148432 | CEFBS_None, // SHL32mCL = 4218 |
| 148433 | CEFBS_In64BitMode, // SHL32mCL_EVEX = 4219 |
| 148434 | CEFBS_In64BitMode, // SHL32mCL_ND = 4220 |
| 148435 | CEFBS_In64BitMode, // SHL32mCL_NF = 4221 |
| 148436 | CEFBS_In64BitMode, // SHL32mCL_NF_ND = 4222 |
| 148437 | CEFBS_None, // SHL32mi = 4223 |
| 148438 | CEFBS_In64BitMode, // SHL32mi_EVEX = 4224 |
| 148439 | CEFBS_In64BitMode, // SHL32mi_ND = 4225 |
| 148440 | CEFBS_In64BitMode, // SHL32mi_NF = 4226 |
| 148441 | CEFBS_In64BitMode, // SHL32mi_NF_ND = 4227 |
| 148442 | CEFBS_None, // SHL32r1 = 4228 |
| 148443 | CEFBS_In64BitMode, // SHL32r1_EVEX = 4229 |
| 148444 | CEFBS_In64BitMode, // SHL32r1_ND = 4230 |
| 148445 | CEFBS_In64BitMode, // SHL32r1_NF = 4231 |
| 148446 | CEFBS_In64BitMode, // SHL32r1_NF_ND = 4232 |
| 148447 | CEFBS_None, // SHL32rCL = 4233 |
| 148448 | CEFBS_In64BitMode, // SHL32rCL_EVEX = 4234 |
| 148449 | CEFBS_In64BitMode, // SHL32rCL_ND = 4235 |
| 148450 | CEFBS_In64BitMode, // SHL32rCL_NF = 4236 |
| 148451 | CEFBS_In64BitMode, // SHL32rCL_NF_ND = 4237 |
| 148452 | CEFBS_None, // SHL32ri = 4238 |
| 148453 | CEFBS_In64BitMode, // SHL32ri_EVEX = 4239 |
| 148454 | CEFBS_In64BitMode, // SHL32ri_ND = 4240 |
| 148455 | CEFBS_In64BitMode, // SHL32ri_NF = 4241 |
| 148456 | CEFBS_In64BitMode, // SHL32ri_NF_ND = 4242 |
| 148457 | CEFBS_In64BitMode, // SHL64m1 = 4243 |
| 148458 | CEFBS_In64BitMode, // SHL64m1_EVEX = 4244 |
| 148459 | CEFBS_In64BitMode, // SHL64m1_ND = 4245 |
| 148460 | CEFBS_In64BitMode, // SHL64m1_NF = 4246 |
| 148461 | CEFBS_In64BitMode, // SHL64m1_NF_ND = 4247 |
| 148462 | CEFBS_In64BitMode, // SHL64mCL = 4248 |
| 148463 | CEFBS_In64BitMode, // SHL64mCL_EVEX = 4249 |
| 148464 | CEFBS_In64BitMode, // SHL64mCL_ND = 4250 |
| 148465 | CEFBS_In64BitMode, // SHL64mCL_NF = 4251 |
| 148466 | CEFBS_In64BitMode, // SHL64mCL_NF_ND = 4252 |
| 148467 | CEFBS_In64BitMode, // SHL64mi = 4253 |
| 148468 | CEFBS_In64BitMode, // SHL64mi_EVEX = 4254 |
| 148469 | CEFBS_In64BitMode, // SHL64mi_ND = 4255 |
| 148470 | CEFBS_In64BitMode, // SHL64mi_NF = 4256 |
| 148471 | CEFBS_In64BitMode, // SHL64mi_NF_ND = 4257 |
| 148472 | CEFBS_None, // SHL64r1 = 4258 |
| 148473 | CEFBS_In64BitMode, // SHL64r1_EVEX = 4259 |
| 148474 | CEFBS_In64BitMode, // SHL64r1_ND = 4260 |
| 148475 | CEFBS_In64BitMode, // SHL64r1_NF = 4261 |
| 148476 | CEFBS_In64BitMode, // SHL64r1_NF_ND = 4262 |
| 148477 | CEFBS_None, // SHL64rCL = 4263 |
| 148478 | CEFBS_In64BitMode, // SHL64rCL_EVEX = 4264 |
| 148479 | CEFBS_In64BitMode, // SHL64rCL_ND = 4265 |
| 148480 | CEFBS_In64BitMode, // SHL64rCL_NF = 4266 |
| 148481 | CEFBS_In64BitMode, // SHL64rCL_NF_ND = 4267 |
| 148482 | CEFBS_None, // SHL64ri = 4268 |
| 148483 | CEFBS_In64BitMode, // SHL64ri_EVEX = 4269 |
| 148484 | CEFBS_In64BitMode, // SHL64ri_ND = 4270 |
| 148485 | CEFBS_In64BitMode, // SHL64ri_NF = 4271 |
| 148486 | CEFBS_In64BitMode, // SHL64ri_NF_ND = 4272 |
| 148487 | CEFBS_None, // SHL8m1 = 4273 |
| 148488 | CEFBS_In64BitMode, // SHL8m1_EVEX = 4274 |
| 148489 | CEFBS_In64BitMode, // SHL8m1_ND = 4275 |
| 148490 | CEFBS_In64BitMode, // SHL8m1_NF = 4276 |
| 148491 | CEFBS_In64BitMode, // SHL8m1_NF_ND = 4277 |
| 148492 | CEFBS_None, // SHL8mCL = 4278 |
| 148493 | CEFBS_In64BitMode, // SHL8mCL_EVEX = 4279 |
| 148494 | CEFBS_In64BitMode, // SHL8mCL_ND = 4280 |
| 148495 | CEFBS_In64BitMode, // SHL8mCL_NF = 4281 |
| 148496 | CEFBS_In64BitMode, // SHL8mCL_NF_ND = 4282 |
| 148497 | CEFBS_None, // SHL8mi = 4283 |
| 148498 | CEFBS_In64BitMode, // SHL8mi_EVEX = 4284 |
| 148499 | CEFBS_In64BitMode, // SHL8mi_ND = 4285 |
| 148500 | CEFBS_In64BitMode, // SHL8mi_NF = 4286 |
| 148501 | CEFBS_In64BitMode, // SHL8mi_NF_ND = 4287 |
| 148502 | CEFBS_None, // SHL8r1 = 4288 |
| 148503 | CEFBS_In64BitMode, // SHL8r1_EVEX = 4289 |
| 148504 | CEFBS_In64BitMode, // SHL8r1_ND = 4290 |
| 148505 | CEFBS_In64BitMode, // SHL8r1_NF = 4291 |
| 148506 | CEFBS_In64BitMode, // SHL8r1_NF_ND = 4292 |
| 148507 | CEFBS_None, // SHL8rCL = 4293 |
| 148508 | CEFBS_In64BitMode, // SHL8rCL_EVEX = 4294 |
| 148509 | CEFBS_In64BitMode, // SHL8rCL_ND = 4295 |
| 148510 | CEFBS_In64BitMode, // SHL8rCL_NF = 4296 |
| 148511 | CEFBS_In64BitMode, // SHL8rCL_NF_ND = 4297 |
| 148512 | CEFBS_None, // SHL8ri = 4298 |
| 148513 | CEFBS_In64BitMode, // SHL8ri_EVEX = 4299 |
| 148514 | CEFBS_In64BitMode, // SHL8ri_ND = 4300 |
| 148515 | CEFBS_In64BitMode, // SHL8ri_NF = 4301 |
| 148516 | CEFBS_In64BitMode, // SHL8ri_NF_ND = 4302 |
| 148517 | CEFBS_None, // SHLD16mrCL = 4303 |
| 148518 | CEFBS_In64BitMode, // SHLD16mrCL_EVEX = 4304 |
| 148519 | CEFBS_In64BitMode, // SHLD16mrCL_ND = 4305 |
| 148520 | CEFBS_In64BitMode, // SHLD16mrCL_NF = 4306 |
| 148521 | CEFBS_In64BitMode, // SHLD16mrCL_NF_ND = 4307 |
| 148522 | CEFBS_None, // SHLD16mri8 = 4308 |
| 148523 | CEFBS_In64BitMode, // SHLD16mri8_EVEX = 4309 |
| 148524 | CEFBS_In64BitMode, // SHLD16mri8_ND = 4310 |
| 148525 | CEFBS_In64BitMode, // SHLD16mri8_NF = 4311 |
| 148526 | CEFBS_In64BitMode, // SHLD16mri8_NF_ND = 4312 |
| 148527 | CEFBS_None, // SHLD16rrCL = 4313 |
| 148528 | CEFBS_In64BitMode, // SHLD16rrCL_EVEX = 4314 |
| 148529 | CEFBS_In64BitMode, // SHLD16rrCL_ND = 4315 |
| 148530 | CEFBS_In64BitMode, // SHLD16rrCL_NF = 4316 |
| 148531 | CEFBS_In64BitMode, // SHLD16rrCL_NF_ND = 4317 |
| 148532 | CEFBS_None, // SHLD16rri8 = 4318 |
| 148533 | CEFBS_In64BitMode, // SHLD16rri8_EVEX = 4319 |
| 148534 | CEFBS_In64BitMode, // SHLD16rri8_ND = 4320 |
| 148535 | CEFBS_In64BitMode, // SHLD16rri8_NF = 4321 |
| 148536 | CEFBS_In64BitMode, // SHLD16rri8_NF_ND = 4322 |
| 148537 | CEFBS_None, // SHLD32mrCL = 4323 |
| 148538 | CEFBS_In64BitMode, // SHLD32mrCL_EVEX = 4324 |
| 148539 | CEFBS_In64BitMode, // SHLD32mrCL_ND = 4325 |
| 148540 | CEFBS_In64BitMode, // SHLD32mrCL_NF = 4326 |
| 148541 | CEFBS_In64BitMode, // SHLD32mrCL_NF_ND = 4327 |
| 148542 | CEFBS_None, // SHLD32mri8 = 4328 |
| 148543 | CEFBS_In64BitMode, // SHLD32mri8_EVEX = 4329 |
| 148544 | CEFBS_In64BitMode, // SHLD32mri8_ND = 4330 |
| 148545 | CEFBS_In64BitMode, // SHLD32mri8_NF = 4331 |
| 148546 | CEFBS_In64BitMode, // SHLD32mri8_NF_ND = 4332 |
| 148547 | CEFBS_None, // SHLD32rrCL = 4333 |
| 148548 | CEFBS_In64BitMode, // SHLD32rrCL_EVEX = 4334 |
| 148549 | CEFBS_In64BitMode, // SHLD32rrCL_ND = 4335 |
| 148550 | CEFBS_In64BitMode, // SHLD32rrCL_NF = 4336 |
| 148551 | CEFBS_In64BitMode, // SHLD32rrCL_NF_ND = 4337 |
| 148552 | CEFBS_None, // SHLD32rri8 = 4338 |
| 148553 | CEFBS_In64BitMode, // SHLD32rri8_EVEX = 4339 |
| 148554 | CEFBS_In64BitMode, // SHLD32rri8_ND = 4340 |
| 148555 | CEFBS_In64BitMode, // SHLD32rri8_NF = 4341 |
| 148556 | CEFBS_In64BitMode, // SHLD32rri8_NF_ND = 4342 |
| 148557 | CEFBS_None, // SHLD64mrCL = 4343 |
| 148558 | CEFBS_In64BitMode, // SHLD64mrCL_EVEX = 4344 |
| 148559 | CEFBS_In64BitMode, // SHLD64mrCL_ND = 4345 |
| 148560 | CEFBS_In64BitMode, // SHLD64mrCL_NF = 4346 |
| 148561 | CEFBS_In64BitMode, // SHLD64mrCL_NF_ND = 4347 |
| 148562 | CEFBS_None, // SHLD64mri8 = 4348 |
| 148563 | CEFBS_In64BitMode, // SHLD64mri8_EVEX = 4349 |
| 148564 | CEFBS_In64BitMode, // SHLD64mri8_ND = 4350 |
| 148565 | CEFBS_In64BitMode, // SHLD64mri8_NF = 4351 |
| 148566 | CEFBS_In64BitMode, // SHLD64mri8_NF_ND = 4352 |
| 148567 | CEFBS_None, // SHLD64rrCL = 4353 |
| 148568 | CEFBS_In64BitMode, // SHLD64rrCL_EVEX = 4354 |
| 148569 | CEFBS_In64BitMode, // SHLD64rrCL_ND = 4355 |
| 148570 | CEFBS_In64BitMode, // SHLD64rrCL_NF = 4356 |
| 148571 | CEFBS_In64BitMode, // SHLD64rrCL_NF_ND = 4357 |
| 148572 | CEFBS_None, // SHLD64rri8 = 4358 |
| 148573 | CEFBS_In64BitMode, // SHLD64rri8_EVEX = 4359 |
| 148574 | CEFBS_In64BitMode, // SHLD64rri8_ND = 4360 |
| 148575 | CEFBS_In64BitMode, // SHLD64rri8_NF = 4361 |
| 148576 | CEFBS_In64BitMode, // SHLD64rri8_NF_ND = 4362 |
| 148577 | CEFBS_None, // SHLX32rm = 4363 |
| 148578 | CEFBS_In64BitMode, // SHLX32rm_EVEX = 4364 |
| 148579 | CEFBS_None, // SHLX32rr = 4365 |
| 148580 | CEFBS_In64BitMode, // SHLX32rr_EVEX = 4366 |
| 148581 | CEFBS_None, // SHLX64rm = 4367 |
| 148582 | CEFBS_In64BitMode, // SHLX64rm_EVEX = 4368 |
| 148583 | CEFBS_None, // SHLX64rr = 4369 |
| 148584 | CEFBS_In64BitMode, // SHLX64rr_EVEX = 4370 |
| 148585 | CEFBS_None, // SHR16m1 = 4371 |
| 148586 | CEFBS_In64BitMode, // SHR16m1_EVEX = 4372 |
| 148587 | CEFBS_In64BitMode, // SHR16m1_ND = 4373 |
| 148588 | CEFBS_In64BitMode, // SHR16m1_NF = 4374 |
| 148589 | CEFBS_In64BitMode, // SHR16m1_NF_ND = 4375 |
| 148590 | CEFBS_None, // SHR16mCL = 4376 |
| 148591 | CEFBS_In64BitMode, // SHR16mCL_EVEX = 4377 |
| 148592 | CEFBS_In64BitMode, // SHR16mCL_ND = 4378 |
| 148593 | CEFBS_In64BitMode, // SHR16mCL_NF = 4379 |
| 148594 | CEFBS_In64BitMode, // SHR16mCL_NF_ND = 4380 |
| 148595 | CEFBS_None, // SHR16mi = 4381 |
| 148596 | CEFBS_In64BitMode, // SHR16mi_EVEX = 4382 |
| 148597 | CEFBS_In64BitMode, // SHR16mi_ND = 4383 |
| 148598 | CEFBS_In64BitMode, // SHR16mi_NF = 4384 |
| 148599 | CEFBS_In64BitMode, // SHR16mi_NF_ND = 4385 |
| 148600 | CEFBS_None, // SHR16r1 = 4386 |
| 148601 | CEFBS_In64BitMode, // SHR16r1_EVEX = 4387 |
| 148602 | CEFBS_In64BitMode, // SHR16r1_ND = 4388 |
| 148603 | CEFBS_In64BitMode, // SHR16r1_NF = 4389 |
| 148604 | CEFBS_In64BitMode, // SHR16r1_NF_ND = 4390 |
| 148605 | CEFBS_None, // SHR16rCL = 4391 |
| 148606 | CEFBS_In64BitMode, // SHR16rCL_EVEX = 4392 |
| 148607 | CEFBS_In64BitMode, // SHR16rCL_ND = 4393 |
| 148608 | CEFBS_In64BitMode, // SHR16rCL_NF = 4394 |
| 148609 | CEFBS_In64BitMode, // SHR16rCL_NF_ND = 4395 |
| 148610 | CEFBS_None, // SHR16ri = 4396 |
| 148611 | CEFBS_In64BitMode, // SHR16ri_EVEX = 4397 |
| 148612 | CEFBS_In64BitMode, // SHR16ri_ND = 4398 |
| 148613 | CEFBS_In64BitMode, // SHR16ri_NF = 4399 |
| 148614 | CEFBS_In64BitMode, // SHR16ri_NF_ND = 4400 |
| 148615 | CEFBS_None, // SHR32m1 = 4401 |
| 148616 | CEFBS_In64BitMode, // SHR32m1_EVEX = 4402 |
| 148617 | CEFBS_In64BitMode, // SHR32m1_ND = 4403 |
| 148618 | CEFBS_In64BitMode, // SHR32m1_NF = 4404 |
| 148619 | CEFBS_In64BitMode, // SHR32m1_NF_ND = 4405 |
| 148620 | CEFBS_None, // SHR32mCL = 4406 |
| 148621 | CEFBS_In64BitMode, // SHR32mCL_EVEX = 4407 |
| 148622 | CEFBS_In64BitMode, // SHR32mCL_ND = 4408 |
| 148623 | CEFBS_In64BitMode, // SHR32mCL_NF = 4409 |
| 148624 | CEFBS_In64BitMode, // SHR32mCL_NF_ND = 4410 |
| 148625 | CEFBS_None, // SHR32mi = 4411 |
| 148626 | CEFBS_In64BitMode, // SHR32mi_EVEX = 4412 |
| 148627 | CEFBS_In64BitMode, // SHR32mi_ND = 4413 |
| 148628 | CEFBS_In64BitMode, // SHR32mi_NF = 4414 |
| 148629 | CEFBS_In64BitMode, // SHR32mi_NF_ND = 4415 |
| 148630 | CEFBS_None, // SHR32r1 = 4416 |
| 148631 | CEFBS_In64BitMode, // SHR32r1_EVEX = 4417 |
| 148632 | CEFBS_In64BitMode, // SHR32r1_ND = 4418 |
| 148633 | CEFBS_In64BitMode, // SHR32r1_NF = 4419 |
| 148634 | CEFBS_In64BitMode, // SHR32r1_NF_ND = 4420 |
| 148635 | CEFBS_None, // SHR32rCL = 4421 |
| 148636 | CEFBS_In64BitMode, // SHR32rCL_EVEX = 4422 |
| 148637 | CEFBS_In64BitMode, // SHR32rCL_ND = 4423 |
| 148638 | CEFBS_In64BitMode, // SHR32rCL_NF = 4424 |
| 148639 | CEFBS_In64BitMode, // SHR32rCL_NF_ND = 4425 |
| 148640 | CEFBS_None, // SHR32ri = 4426 |
| 148641 | CEFBS_In64BitMode, // SHR32ri_EVEX = 4427 |
| 148642 | CEFBS_In64BitMode, // SHR32ri_ND = 4428 |
| 148643 | CEFBS_In64BitMode, // SHR32ri_NF = 4429 |
| 148644 | CEFBS_In64BitMode, // SHR32ri_NF_ND = 4430 |
| 148645 | CEFBS_In64BitMode, // SHR64m1 = 4431 |
| 148646 | CEFBS_In64BitMode, // SHR64m1_EVEX = 4432 |
| 148647 | CEFBS_In64BitMode, // SHR64m1_ND = 4433 |
| 148648 | CEFBS_In64BitMode, // SHR64m1_NF = 4434 |
| 148649 | CEFBS_In64BitMode, // SHR64m1_NF_ND = 4435 |
| 148650 | CEFBS_In64BitMode, // SHR64mCL = 4436 |
| 148651 | CEFBS_In64BitMode, // SHR64mCL_EVEX = 4437 |
| 148652 | CEFBS_In64BitMode, // SHR64mCL_ND = 4438 |
| 148653 | CEFBS_In64BitMode, // SHR64mCL_NF = 4439 |
| 148654 | CEFBS_In64BitMode, // SHR64mCL_NF_ND = 4440 |
| 148655 | CEFBS_In64BitMode, // SHR64mi = 4441 |
| 148656 | CEFBS_In64BitMode, // SHR64mi_EVEX = 4442 |
| 148657 | CEFBS_In64BitMode, // SHR64mi_ND = 4443 |
| 148658 | CEFBS_In64BitMode, // SHR64mi_NF = 4444 |
| 148659 | CEFBS_In64BitMode, // SHR64mi_NF_ND = 4445 |
| 148660 | CEFBS_None, // SHR64r1 = 4446 |
| 148661 | CEFBS_In64BitMode, // SHR64r1_EVEX = 4447 |
| 148662 | CEFBS_In64BitMode, // SHR64r1_ND = 4448 |
| 148663 | CEFBS_In64BitMode, // SHR64r1_NF = 4449 |
| 148664 | CEFBS_In64BitMode, // SHR64r1_NF_ND = 4450 |
| 148665 | CEFBS_None, // SHR64rCL = 4451 |
| 148666 | CEFBS_In64BitMode, // SHR64rCL_EVEX = 4452 |
| 148667 | CEFBS_In64BitMode, // SHR64rCL_ND = 4453 |
| 148668 | CEFBS_In64BitMode, // SHR64rCL_NF = 4454 |
| 148669 | CEFBS_In64BitMode, // SHR64rCL_NF_ND = 4455 |
| 148670 | CEFBS_None, // SHR64ri = 4456 |
| 148671 | CEFBS_In64BitMode, // SHR64ri_EVEX = 4457 |
| 148672 | CEFBS_In64BitMode, // SHR64ri_ND = 4458 |
| 148673 | CEFBS_In64BitMode, // SHR64ri_NF = 4459 |
| 148674 | CEFBS_In64BitMode, // SHR64ri_NF_ND = 4460 |
| 148675 | CEFBS_None, // SHR8m1 = 4461 |
| 148676 | CEFBS_In64BitMode, // SHR8m1_EVEX = 4462 |
| 148677 | CEFBS_In64BitMode, // SHR8m1_ND = 4463 |
| 148678 | CEFBS_In64BitMode, // SHR8m1_NF = 4464 |
| 148679 | CEFBS_In64BitMode, // SHR8m1_NF_ND = 4465 |
| 148680 | CEFBS_None, // SHR8mCL = 4466 |
| 148681 | CEFBS_In64BitMode, // SHR8mCL_EVEX = 4467 |
| 148682 | CEFBS_In64BitMode, // SHR8mCL_ND = 4468 |
| 148683 | CEFBS_In64BitMode, // SHR8mCL_NF = 4469 |
| 148684 | CEFBS_In64BitMode, // SHR8mCL_NF_ND = 4470 |
| 148685 | CEFBS_None, // SHR8mi = 4471 |
| 148686 | CEFBS_In64BitMode, // SHR8mi_EVEX = 4472 |
| 148687 | CEFBS_In64BitMode, // SHR8mi_ND = 4473 |
| 148688 | CEFBS_In64BitMode, // SHR8mi_NF = 4474 |
| 148689 | CEFBS_In64BitMode, // SHR8mi_NF_ND = 4475 |
| 148690 | CEFBS_None, // SHR8r1 = 4476 |
| 148691 | CEFBS_In64BitMode, // SHR8r1_EVEX = 4477 |
| 148692 | CEFBS_In64BitMode, // SHR8r1_ND = 4478 |
| 148693 | CEFBS_In64BitMode, // SHR8r1_NF = 4479 |
| 148694 | CEFBS_In64BitMode, // SHR8r1_NF_ND = 4480 |
| 148695 | CEFBS_None, // SHR8rCL = 4481 |
| 148696 | CEFBS_In64BitMode, // SHR8rCL_EVEX = 4482 |
| 148697 | CEFBS_In64BitMode, // SHR8rCL_ND = 4483 |
| 148698 | CEFBS_In64BitMode, // SHR8rCL_NF = 4484 |
| 148699 | CEFBS_In64BitMode, // SHR8rCL_NF_ND = 4485 |
| 148700 | CEFBS_None, // SHR8ri = 4486 |
| 148701 | CEFBS_In64BitMode, // SHR8ri_EVEX = 4487 |
| 148702 | CEFBS_In64BitMode, // SHR8ri_ND = 4488 |
| 148703 | CEFBS_In64BitMode, // SHR8ri_NF = 4489 |
| 148704 | CEFBS_In64BitMode, // SHR8ri_NF_ND = 4490 |
| 148705 | CEFBS_None, // SHRD16mrCL = 4491 |
| 148706 | CEFBS_In64BitMode, // SHRD16mrCL_EVEX = 4492 |
| 148707 | CEFBS_In64BitMode, // SHRD16mrCL_ND = 4493 |
| 148708 | CEFBS_In64BitMode, // SHRD16mrCL_NF = 4494 |
| 148709 | CEFBS_In64BitMode, // SHRD16mrCL_NF_ND = 4495 |
| 148710 | CEFBS_None, // SHRD16mri8 = 4496 |
| 148711 | CEFBS_In64BitMode, // SHRD16mri8_EVEX = 4497 |
| 148712 | CEFBS_In64BitMode, // SHRD16mri8_ND = 4498 |
| 148713 | CEFBS_In64BitMode, // SHRD16mri8_NF = 4499 |
| 148714 | CEFBS_In64BitMode, // SHRD16mri8_NF_ND = 4500 |
| 148715 | CEFBS_None, // SHRD16rrCL = 4501 |
| 148716 | CEFBS_In64BitMode, // SHRD16rrCL_EVEX = 4502 |
| 148717 | CEFBS_In64BitMode, // SHRD16rrCL_ND = 4503 |
| 148718 | CEFBS_In64BitMode, // SHRD16rrCL_NF = 4504 |
| 148719 | CEFBS_In64BitMode, // SHRD16rrCL_NF_ND = 4505 |
| 148720 | CEFBS_None, // SHRD16rri8 = 4506 |
| 148721 | CEFBS_In64BitMode, // SHRD16rri8_EVEX = 4507 |
| 148722 | CEFBS_In64BitMode, // SHRD16rri8_ND = 4508 |
| 148723 | CEFBS_In64BitMode, // SHRD16rri8_NF = 4509 |
| 148724 | CEFBS_In64BitMode, // SHRD16rri8_NF_ND = 4510 |
| 148725 | CEFBS_None, // SHRD32mrCL = 4511 |
| 148726 | CEFBS_In64BitMode, // SHRD32mrCL_EVEX = 4512 |
| 148727 | CEFBS_In64BitMode, // SHRD32mrCL_ND = 4513 |
| 148728 | CEFBS_In64BitMode, // SHRD32mrCL_NF = 4514 |
| 148729 | CEFBS_In64BitMode, // SHRD32mrCL_NF_ND = 4515 |
| 148730 | CEFBS_None, // SHRD32mri8 = 4516 |
| 148731 | CEFBS_In64BitMode, // SHRD32mri8_EVEX = 4517 |
| 148732 | CEFBS_In64BitMode, // SHRD32mri8_ND = 4518 |
| 148733 | CEFBS_In64BitMode, // SHRD32mri8_NF = 4519 |
| 148734 | CEFBS_In64BitMode, // SHRD32mri8_NF_ND = 4520 |
| 148735 | CEFBS_None, // SHRD32rrCL = 4521 |
| 148736 | CEFBS_In64BitMode, // SHRD32rrCL_EVEX = 4522 |
| 148737 | CEFBS_In64BitMode, // SHRD32rrCL_ND = 4523 |
| 148738 | CEFBS_In64BitMode, // SHRD32rrCL_NF = 4524 |
| 148739 | CEFBS_In64BitMode, // SHRD32rrCL_NF_ND = 4525 |
| 148740 | CEFBS_None, // SHRD32rri8 = 4526 |
| 148741 | CEFBS_In64BitMode, // SHRD32rri8_EVEX = 4527 |
| 148742 | CEFBS_In64BitMode, // SHRD32rri8_ND = 4528 |
| 148743 | CEFBS_In64BitMode, // SHRD32rri8_NF = 4529 |
| 148744 | CEFBS_In64BitMode, // SHRD32rri8_NF_ND = 4530 |
| 148745 | CEFBS_None, // SHRD64mrCL = 4531 |
| 148746 | CEFBS_In64BitMode, // SHRD64mrCL_EVEX = 4532 |
| 148747 | CEFBS_In64BitMode, // SHRD64mrCL_ND = 4533 |
| 148748 | CEFBS_In64BitMode, // SHRD64mrCL_NF = 4534 |
| 148749 | CEFBS_In64BitMode, // SHRD64mrCL_NF_ND = 4535 |
| 148750 | CEFBS_None, // SHRD64mri8 = 4536 |
| 148751 | CEFBS_In64BitMode, // SHRD64mri8_EVEX = 4537 |
| 148752 | CEFBS_In64BitMode, // SHRD64mri8_ND = 4538 |
| 148753 | CEFBS_In64BitMode, // SHRD64mri8_NF = 4539 |
| 148754 | CEFBS_In64BitMode, // SHRD64mri8_NF_ND = 4540 |
| 148755 | CEFBS_None, // SHRD64rrCL = 4541 |
| 148756 | CEFBS_In64BitMode, // SHRD64rrCL_EVEX = 4542 |
| 148757 | CEFBS_In64BitMode, // SHRD64rrCL_ND = 4543 |
| 148758 | CEFBS_In64BitMode, // SHRD64rrCL_NF = 4544 |
| 148759 | CEFBS_In64BitMode, // SHRD64rrCL_NF_ND = 4545 |
| 148760 | CEFBS_None, // SHRD64rri8 = 4546 |
| 148761 | CEFBS_In64BitMode, // SHRD64rri8_EVEX = 4547 |
| 148762 | CEFBS_In64BitMode, // SHRD64rri8_ND = 4548 |
| 148763 | CEFBS_In64BitMode, // SHRD64rri8_NF = 4549 |
| 148764 | CEFBS_In64BitMode, // SHRD64rri8_NF_ND = 4550 |
| 148765 | CEFBS_None, // SHRX32rm = 4551 |
| 148766 | CEFBS_In64BitMode, // SHRX32rm_EVEX = 4552 |
| 148767 | CEFBS_None, // SHRX32rr = 4553 |
| 148768 | CEFBS_In64BitMode, // SHRX32rr_EVEX = 4554 |
| 148769 | CEFBS_None, // SHRX64rm = 4555 |
| 148770 | CEFBS_In64BitMode, // SHRX64rm_EVEX = 4556 |
| 148771 | CEFBS_None, // SHRX64rr = 4557 |
| 148772 | CEFBS_In64BitMode, // SHRX64rr_EVEX = 4558 |
| 148773 | CEFBS_None, // SHUFPDrmi = 4559 |
| 148774 | CEFBS_None, // SHUFPDrri = 4560 |
| 148775 | CEFBS_None, // SHUFPSrmi = 4561 |
| 148776 | CEFBS_None, // SHUFPSrri = 4562 |
| 148777 | CEFBS_Not64BitMode, // SIDT16m = 4563 |
| 148778 | CEFBS_Not64BitMode, // SIDT32m = 4564 |
| 148779 | CEFBS_In64BitMode, // SIDT64m = 4565 |
| 148780 | CEFBS_None, // SKINIT = 4566 |
| 148781 | CEFBS_None, // SLDT16m = 4567 |
| 148782 | CEFBS_None, // SLDT16r = 4568 |
| 148783 | CEFBS_None, // SLDT32r = 4569 |
| 148784 | CEFBS_In64BitMode, // SLDT64r = 4570 |
| 148785 | CEFBS_None, // SLWPCB = 4571 |
| 148786 | CEFBS_None, // SLWPCB64 = 4572 |
| 148787 | CEFBS_None, // SMSW16m = 4573 |
| 148788 | CEFBS_None, // SMSW16r = 4574 |
| 148789 | CEFBS_None, // SMSW32r = 4575 |
| 148790 | CEFBS_None, // SMSW64r = 4576 |
| 148791 | CEFBS_None, // SQRTPDm = 4577 |
| 148792 | CEFBS_None, // SQRTPDr = 4578 |
| 148793 | CEFBS_None, // SQRTPSm = 4579 |
| 148794 | CEFBS_None, // SQRTPSr = 4580 |
| 148795 | CEFBS_None, // SQRTSDm = 4581 |
| 148796 | CEFBS_None, // SQRTSDm_Int = 4582 |
| 148797 | CEFBS_None, // SQRTSDr = 4583 |
| 148798 | CEFBS_None, // SQRTSDr_Int = 4584 |
| 148799 | CEFBS_None, // SQRTSSm = 4585 |
| 148800 | CEFBS_None, // SQRTSSm_Int = 4586 |
| 148801 | CEFBS_None, // SQRTSSr = 4587 |
| 148802 | CEFBS_None, // SQRTSSr_Int = 4588 |
| 148803 | CEFBS_None, // SQRT_F = 4589 |
| 148804 | CEFBS_None, // SQRT_Fp32 = 4590 |
| 148805 | CEFBS_None, // SQRT_Fp64 = 4591 |
| 148806 | CEFBS_None, // SQRT_Fp80 = 4592 |
| 148807 | CEFBS_None, // SS_PREFIX = 4593 |
| 148808 | CEFBS_None, // STAC = 4594 |
| 148809 | CEFBS_None, // STACKALLOC_W_PROBING = 4595 |
| 148810 | CEFBS_None, // STC = 4596 |
| 148811 | CEFBS_None, // STD = 4597 |
| 148812 | CEFBS_None, // STGI = 4598 |
| 148813 | CEFBS_None, // STI = 4599 |
| 148814 | CEFBS_None, // STMXCSR = 4600 |
| 148815 | CEFBS_None, // STOSB = 4601 |
| 148816 | CEFBS_None, // STOSL = 4602 |
| 148817 | CEFBS_In64BitMode, // STOSQ = 4603 |
| 148818 | CEFBS_None, // STOSW = 4604 |
| 148819 | CEFBS_None, // STR16r = 4605 |
| 148820 | CEFBS_None, // STR32r = 4606 |
| 148821 | CEFBS_None, // STR64r = 4607 |
| 148822 | CEFBS_None, // STRm = 4608 |
| 148823 | CEFBS_In64BitMode, // STTILECFG = 4609 |
| 148824 | CEFBS_In64BitMode, // STTILECFG_EVEX = 4610 |
| 148825 | CEFBS_In64BitMode, // STUI = 4611 |
| 148826 | CEFBS_None, // ST_F32m = 4612 |
| 148827 | CEFBS_None, // ST_F64m = 4613 |
| 148828 | CEFBS_None, // ST_FP32m = 4614 |
| 148829 | CEFBS_None, // ST_FP64m = 4615 |
| 148830 | CEFBS_None, // ST_FP80m = 4616 |
| 148831 | CEFBS_None, // ST_FPrr = 4617 |
| 148832 | CEFBS_None, // ST_Fp32m = 4618 |
| 148833 | CEFBS_None, // ST_Fp64m = 4619 |
| 148834 | CEFBS_None, // ST_Fp64m32 = 4620 |
| 148835 | CEFBS_None, // ST_Fp80m32 = 4621 |
| 148836 | CEFBS_None, // ST_Fp80m64 = 4622 |
| 148837 | CEFBS_None, // ST_FpP32m = 4623 |
| 148838 | CEFBS_None, // ST_FpP64m = 4624 |
| 148839 | CEFBS_None, // ST_FpP64m32 = 4625 |
| 148840 | CEFBS_None, // ST_FpP80m = 4626 |
| 148841 | CEFBS_None, // ST_FpP80m32 = 4627 |
| 148842 | CEFBS_None, // ST_FpP80m64 = 4628 |
| 148843 | CEFBS_None, // ST_Frr = 4629 |
| 148844 | CEFBS_None, // SUB16i16 = 4630 |
| 148845 | CEFBS_None, // SUB16mi = 4631 |
| 148846 | CEFBS_None, // SUB16mi8 = 4632 |
| 148847 | CEFBS_In64BitMode, // SUB16mi8_EVEX = 4633 |
| 148848 | CEFBS_In64BitMode, // SUB16mi8_ND = 4634 |
| 148849 | CEFBS_In64BitMode, // SUB16mi8_NF = 4635 |
| 148850 | CEFBS_In64BitMode, // SUB16mi8_NF_ND = 4636 |
| 148851 | CEFBS_In64BitMode, // SUB16mi_EVEX = 4637 |
| 148852 | CEFBS_In64BitMode, // SUB16mi_ND = 4638 |
| 148853 | CEFBS_In64BitMode, // SUB16mi_NF = 4639 |
| 148854 | CEFBS_In64BitMode, // SUB16mi_NF_ND = 4640 |
| 148855 | CEFBS_None, // SUB16mr = 4641 |
| 148856 | CEFBS_In64BitMode, // SUB16mr_EVEX = 4642 |
| 148857 | CEFBS_In64BitMode, // SUB16mr_ND = 4643 |
| 148858 | CEFBS_In64BitMode, // SUB16mr_NF = 4644 |
| 148859 | CEFBS_In64BitMode, // SUB16mr_NF_ND = 4645 |
| 148860 | CEFBS_None, // SUB16ri = 4646 |
| 148861 | CEFBS_None, // SUB16ri8 = 4647 |
| 148862 | CEFBS_In64BitMode, // SUB16ri8_EVEX = 4648 |
| 148863 | CEFBS_In64BitMode, // SUB16ri8_ND = 4649 |
| 148864 | CEFBS_In64BitMode, // SUB16ri8_NF = 4650 |
| 148865 | CEFBS_In64BitMode, // SUB16ri8_NF_ND = 4651 |
| 148866 | CEFBS_In64BitMode, // SUB16ri_EVEX = 4652 |
| 148867 | CEFBS_In64BitMode, // SUB16ri_ND = 4653 |
| 148868 | CEFBS_In64BitMode, // SUB16ri_NF = 4654 |
| 148869 | CEFBS_In64BitMode, // SUB16ri_NF_ND = 4655 |
| 148870 | CEFBS_None, // SUB16rm = 4656 |
| 148871 | CEFBS_In64BitMode, // SUB16rm_EVEX = 4657 |
| 148872 | CEFBS_In64BitMode, // SUB16rm_ND = 4658 |
| 148873 | CEFBS_In64BitMode, // SUB16rm_NF = 4659 |
| 148874 | CEFBS_In64BitMode, // SUB16rm_NF_ND = 4660 |
| 148875 | CEFBS_None, // SUB16rr = 4661 |
| 148876 | CEFBS_In64BitMode, // SUB16rr_EVEX = 4662 |
| 148877 | CEFBS_In64BitMode, // SUB16rr_EVEX_REV = 4663 |
| 148878 | CEFBS_In64BitMode, // SUB16rr_ND = 4664 |
| 148879 | CEFBS_In64BitMode, // SUB16rr_ND_REV = 4665 |
| 148880 | CEFBS_In64BitMode, // SUB16rr_NF = 4666 |
| 148881 | CEFBS_In64BitMode, // SUB16rr_NF_ND = 4667 |
| 148882 | CEFBS_In64BitMode, // SUB16rr_NF_ND_REV = 4668 |
| 148883 | CEFBS_In64BitMode, // SUB16rr_NF_REV = 4669 |
| 148884 | CEFBS_None, // SUB16rr_REV = 4670 |
| 148885 | CEFBS_None, // SUB32i32 = 4671 |
| 148886 | CEFBS_None, // SUB32mi = 4672 |
| 148887 | CEFBS_None, // SUB32mi8 = 4673 |
| 148888 | CEFBS_In64BitMode, // SUB32mi8_EVEX = 4674 |
| 148889 | CEFBS_In64BitMode, // SUB32mi8_ND = 4675 |
| 148890 | CEFBS_In64BitMode, // SUB32mi8_NF = 4676 |
| 148891 | CEFBS_In64BitMode, // SUB32mi8_NF_ND = 4677 |
| 148892 | CEFBS_In64BitMode, // SUB32mi_EVEX = 4678 |
| 148893 | CEFBS_In64BitMode, // SUB32mi_ND = 4679 |
| 148894 | CEFBS_In64BitMode, // SUB32mi_NF = 4680 |
| 148895 | CEFBS_In64BitMode, // SUB32mi_NF_ND = 4681 |
| 148896 | CEFBS_None, // SUB32mr = 4682 |
| 148897 | CEFBS_In64BitMode, // SUB32mr_EVEX = 4683 |
| 148898 | CEFBS_In64BitMode, // SUB32mr_ND = 4684 |
| 148899 | CEFBS_In64BitMode, // SUB32mr_NF = 4685 |
| 148900 | CEFBS_In64BitMode, // SUB32mr_NF_ND = 4686 |
| 148901 | CEFBS_None, // SUB32ri = 4687 |
| 148902 | CEFBS_None, // SUB32ri8 = 4688 |
| 148903 | CEFBS_In64BitMode, // SUB32ri8_EVEX = 4689 |
| 148904 | CEFBS_In64BitMode, // SUB32ri8_ND = 4690 |
| 148905 | CEFBS_In64BitMode, // SUB32ri8_NF = 4691 |
| 148906 | CEFBS_In64BitMode, // SUB32ri8_NF_ND = 4692 |
| 148907 | CEFBS_In64BitMode, // SUB32ri_EVEX = 4693 |
| 148908 | CEFBS_In64BitMode, // SUB32ri_ND = 4694 |
| 148909 | CEFBS_In64BitMode, // SUB32ri_NF = 4695 |
| 148910 | CEFBS_In64BitMode, // SUB32ri_NF_ND = 4696 |
| 148911 | CEFBS_None, // SUB32rm = 4697 |
| 148912 | CEFBS_In64BitMode, // SUB32rm_EVEX = 4698 |
| 148913 | CEFBS_In64BitMode, // SUB32rm_ND = 4699 |
| 148914 | CEFBS_In64BitMode, // SUB32rm_NF = 4700 |
| 148915 | CEFBS_In64BitMode, // SUB32rm_NF_ND = 4701 |
| 148916 | CEFBS_None, // SUB32rr = 4702 |
| 148917 | CEFBS_In64BitMode, // SUB32rr_EVEX = 4703 |
| 148918 | CEFBS_In64BitMode, // SUB32rr_EVEX_REV = 4704 |
| 148919 | CEFBS_In64BitMode, // SUB32rr_ND = 4705 |
| 148920 | CEFBS_In64BitMode, // SUB32rr_ND_REV = 4706 |
| 148921 | CEFBS_In64BitMode, // SUB32rr_NF = 4707 |
| 148922 | CEFBS_In64BitMode, // SUB32rr_NF_ND = 4708 |
| 148923 | CEFBS_In64BitMode, // SUB32rr_NF_ND_REV = 4709 |
| 148924 | CEFBS_In64BitMode, // SUB32rr_NF_REV = 4710 |
| 148925 | CEFBS_None, // SUB32rr_REV = 4711 |
| 148926 | CEFBS_None, // SUB64i32 = 4712 |
| 148927 | CEFBS_In64BitMode, // SUB64mi32 = 4713 |
| 148928 | CEFBS_In64BitMode, // SUB64mi32_EVEX = 4714 |
| 148929 | CEFBS_In64BitMode, // SUB64mi32_ND = 4715 |
| 148930 | CEFBS_In64BitMode, // SUB64mi32_NF = 4716 |
| 148931 | CEFBS_In64BitMode, // SUB64mi32_NF_ND = 4717 |
| 148932 | CEFBS_In64BitMode, // SUB64mi8 = 4718 |
| 148933 | CEFBS_In64BitMode, // SUB64mi8_EVEX = 4719 |
| 148934 | CEFBS_In64BitMode, // SUB64mi8_ND = 4720 |
| 148935 | CEFBS_In64BitMode, // SUB64mi8_NF = 4721 |
| 148936 | CEFBS_In64BitMode, // SUB64mi8_NF_ND = 4722 |
| 148937 | CEFBS_None, // SUB64mr = 4723 |
| 148938 | CEFBS_In64BitMode, // SUB64mr_EVEX = 4724 |
| 148939 | CEFBS_In64BitMode, // SUB64mr_ND = 4725 |
| 148940 | CEFBS_In64BitMode, // SUB64mr_NF = 4726 |
| 148941 | CEFBS_In64BitMode, // SUB64mr_NF_ND = 4727 |
| 148942 | CEFBS_None, // SUB64ri32 = 4728 |
| 148943 | CEFBS_In64BitMode, // SUB64ri32_EVEX = 4729 |
| 148944 | CEFBS_In64BitMode, // SUB64ri32_ND = 4730 |
| 148945 | CEFBS_In64BitMode, // SUB64ri32_NF = 4731 |
| 148946 | CEFBS_In64BitMode, // SUB64ri32_NF_ND = 4732 |
| 148947 | CEFBS_None, // SUB64ri8 = 4733 |
| 148948 | CEFBS_In64BitMode, // SUB64ri8_EVEX = 4734 |
| 148949 | CEFBS_In64BitMode, // SUB64ri8_ND = 4735 |
| 148950 | CEFBS_In64BitMode, // SUB64ri8_NF = 4736 |
| 148951 | CEFBS_In64BitMode, // SUB64ri8_NF_ND = 4737 |
| 148952 | CEFBS_None, // SUB64rm = 4738 |
| 148953 | CEFBS_In64BitMode, // SUB64rm_EVEX = 4739 |
| 148954 | CEFBS_In64BitMode, // SUB64rm_ND = 4740 |
| 148955 | CEFBS_In64BitMode, // SUB64rm_NF = 4741 |
| 148956 | CEFBS_In64BitMode, // SUB64rm_NF_ND = 4742 |
| 148957 | CEFBS_None, // SUB64rr = 4743 |
| 148958 | CEFBS_In64BitMode, // SUB64rr_EVEX = 4744 |
| 148959 | CEFBS_In64BitMode, // SUB64rr_EVEX_REV = 4745 |
| 148960 | CEFBS_In64BitMode, // SUB64rr_ND = 4746 |
| 148961 | CEFBS_In64BitMode, // SUB64rr_ND_REV = 4747 |
| 148962 | CEFBS_In64BitMode, // SUB64rr_NF = 4748 |
| 148963 | CEFBS_In64BitMode, // SUB64rr_NF_ND = 4749 |
| 148964 | CEFBS_In64BitMode, // SUB64rr_NF_ND_REV = 4750 |
| 148965 | CEFBS_In64BitMode, // SUB64rr_NF_REV = 4751 |
| 148966 | CEFBS_None, // SUB64rr_REV = 4752 |
| 148967 | CEFBS_None, // SUB8i8 = 4753 |
| 148968 | CEFBS_None, // SUB8mi = 4754 |
| 148969 | CEFBS_Not64BitMode, // SUB8mi8 = 4755 |
| 148970 | CEFBS_In64BitMode, // SUB8mi_EVEX = 4756 |
| 148971 | CEFBS_In64BitMode, // SUB8mi_ND = 4757 |
| 148972 | CEFBS_In64BitMode, // SUB8mi_NF = 4758 |
| 148973 | CEFBS_In64BitMode, // SUB8mi_NF_ND = 4759 |
| 148974 | CEFBS_None, // SUB8mr = 4760 |
| 148975 | CEFBS_In64BitMode, // SUB8mr_EVEX = 4761 |
| 148976 | CEFBS_In64BitMode, // SUB8mr_ND = 4762 |
| 148977 | CEFBS_In64BitMode, // SUB8mr_NF = 4763 |
| 148978 | CEFBS_In64BitMode, // SUB8mr_NF_ND = 4764 |
| 148979 | CEFBS_None, // SUB8ri = 4765 |
| 148980 | CEFBS_Not64BitMode, // SUB8ri8 = 4766 |
| 148981 | CEFBS_In64BitMode, // SUB8ri_EVEX = 4767 |
| 148982 | CEFBS_In64BitMode, // SUB8ri_ND = 4768 |
| 148983 | CEFBS_In64BitMode, // SUB8ri_NF = 4769 |
| 148984 | CEFBS_In64BitMode, // SUB8ri_NF_ND = 4770 |
| 148985 | CEFBS_None, // SUB8rm = 4771 |
| 148986 | CEFBS_In64BitMode, // SUB8rm_EVEX = 4772 |
| 148987 | CEFBS_In64BitMode, // SUB8rm_ND = 4773 |
| 148988 | CEFBS_In64BitMode, // SUB8rm_NF = 4774 |
| 148989 | CEFBS_In64BitMode, // SUB8rm_NF_ND = 4775 |
| 148990 | CEFBS_None, // SUB8rr = 4776 |
| 148991 | CEFBS_In64BitMode, // SUB8rr_EVEX = 4777 |
| 148992 | CEFBS_In64BitMode, // SUB8rr_EVEX_REV = 4778 |
| 148993 | CEFBS_In64BitMode, // SUB8rr_ND = 4779 |
| 148994 | CEFBS_In64BitMode, // SUB8rr_ND_REV = 4780 |
| 148995 | CEFBS_In64BitMode, // SUB8rr_NF = 4781 |
| 148996 | CEFBS_In64BitMode, // SUB8rr_NF_ND = 4782 |
| 148997 | CEFBS_In64BitMode, // SUB8rr_NF_ND_REV = 4783 |
| 148998 | CEFBS_In64BitMode, // SUB8rr_NF_REV = 4784 |
| 148999 | CEFBS_None, // SUB8rr_REV = 4785 |
| 149000 | CEFBS_None, // SUBPDrm = 4786 |
| 149001 | CEFBS_None, // SUBPDrr = 4787 |
| 149002 | CEFBS_None, // SUBPSrm = 4788 |
| 149003 | CEFBS_None, // SUBPSrr = 4789 |
| 149004 | CEFBS_None, // SUBR_F32m = 4790 |
| 149005 | CEFBS_None, // SUBR_F64m = 4791 |
| 149006 | CEFBS_None, // SUBR_FI16m = 4792 |
| 149007 | CEFBS_None, // SUBR_FI32m = 4793 |
| 149008 | CEFBS_None, // SUBR_FPrST0 = 4794 |
| 149009 | CEFBS_None, // SUBR_FST0r = 4795 |
| 149010 | CEFBS_None, // SUBR_Fp32m = 4796 |
| 149011 | CEFBS_None, // SUBR_Fp64m = 4797 |
| 149012 | CEFBS_None, // SUBR_Fp64m32 = 4798 |
| 149013 | CEFBS_None, // SUBR_Fp80m32 = 4799 |
| 149014 | CEFBS_None, // SUBR_Fp80m64 = 4800 |
| 149015 | CEFBS_None, // SUBR_FpI16m32 = 4801 |
| 149016 | CEFBS_None, // SUBR_FpI16m64 = 4802 |
| 149017 | CEFBS_None, // SUBR_FpI16m80 = 4803 |
| 149018 | CEFBS_None, // SUBR_FpI32m32 = 4804 |
| 149019 | CEFBS_None, // SUBR_FpI32m64 = 4805 |
| 149020 | CEFBS_None, // SUBR_FpI32m80 = 4806 |
| 149021 | CEFBS_None, // SUBR_FrST0 = 4807 |
| 149022 | CEFBS_None, // SUBSDrm = 4808 |
| 149023 | CEFBS_None, // SUBSDrm_Int = 4809 |
| 149024 | CEFBS_None, // SUBSDrr = 4810 |
| 149025 | CEFBS_None, // SUBSDrr_Int = 4811 |
| 149026 | CEFBS_None, // SUBSSrm = 4812 |
| 149027 | CEFBS_None, // SUBSSrm_Int = 4813 |
| 149028 | CEFBS_None, // SUBSSrr = 4814 |
| 149029 | CEFBS_None, // SUBSSrr_Int = 4815 |
| 149030 | CEFBS_None, // SUB_F32m = 4816 |
| 149031 | CEFBS_None, // SUB_F64m = 4817 |
| 149032 | CEFBS_None, // SUB_FI16m = 4818 |
| 149033 | CEFBS_None, // SUB_FI32m = 4819 |
| 149034 | CEFBS_None, // SUB_FPrST0 = 4820 |
| 149035 | CEFBS_None, // SUB_FST0r = 4821 |
| 149036 | CEFBS_None, // SUB_Fp32 = 4822 |
| 149037 | CEFBS_None, // SUB_Fp32m = 4823 |
| 149038 | CEFBS_None, // SUB_Fp64 = 4824 |
| 149039 | CEFBS_None, // SUB_Fp64m = 4825 |
| 149040 | CEFBS_None, // SUB_Fp64m32 = 4826 |
| 149041 | CEFBS_None, // SUB_Fp80 = 4827 |
| 149042 | CEFBS_None, // SUB_Fp80m32 = 4828 |
| 149043 | CEFBS_None, // SUB_Fp80m64 = 4829 |
| 149044 | CEFBS_None, // SUB_FpI16m32 = 4830 |
| 149045 | CEFBS_None, // SUB_FpI16m64 = 4831 |
| 149046 | CEFBS_None, // SUB_FpI16m80 = 4832 |
| 149047 | CEFBS_None, // SUB_FpI32m32 = 4833 |
| 149048 | CEFBS_None, // SUB_FpI32m64 = 4834 |
| 149049 | CEFBS_None, // SUB_FpI32m80 = 4835 |
| 149050 | CEFBS_None, // SUB_FrST0 = 4836 |
| 149051 | CEFBS_None, // SWAPGS = 4837 |
| 149052 | CEFBS_None, // SYSCALL = 4838 |
| 149053 | CEFBS_None, // SYSENTER = 4839 |
| 149054 | CEFBS_None, // SYSEXIT = 4840 |
| 149055 | CEFBS_In64BitMode, // SYSEXIT64 = 4841 |
| 149056 | CEFBS_None, // SYSRET = 4842 |
| 149057 | CEFBS_In64BitMode, // SYSRET64 = 4843 |
| 149058 | CEFBS_None, // T1MSKC32rm = 4844 |
| 149059 | CEFBS_None, // T1MSKC32rr = 4845 |
| 149060 | CEFBS_None, // T1MSKC64rm = 4846 |
| 149061 | CEFBS_None, // T1MSKC64rr = 4847 |
| 149062 | CEFBS_None, // TAILJMPd = 4848 |
| 149063 | CEFBS_None, // TAILJMPd64 = 4849 |
| 149064 | CEFBS_None, // TAILJMPd64_CC = 4850 |
| 149065 | CEFBS_None, // TAILJMPd_CC = 4851 |
| 149066 | CEFBS_None, // TAILJMPm = 4852 |
| 149067 | CEFBS_None, // TAILJMPm64 = 4853 |
| 149068 | CEFBS_None, // TAILJMPm64_REX = 4854 |
| 149069 | CEFBS_None, // TAILJMPr = 4855 |
| 149070 | CEFBS_None, // TAILJMPr64 = 4856 |
| 149071 | CEFBS_None, // TAILJMPr64_REX = 4857 |
| 149072 | CEFBS_In64BitMode, // TCMMIMFP16PS = 4858 |
| 149073 | CEFBS_In64BitMode, // TCMMRLFP16PS = 4859 |
| 149074 | CEFBS_None, // TCRETURNdi = 4860 |
| 149075 | CEFBS_None, // TCRETURNdi64 = 4861 |
| 149076 | CEFBS_None, // TCRETURNdi64cc = 4862 |
| 149077 | CEFBS_None, // TCRETURNdicc = 4863 |
| 149078 | CEFBS_None, // TCRETURNmi = 4864 |
| 149079 | CEFBS_None, // TCRETURNmi64 = 4865 |
| 149080 | CEFBS_None, // TCRETURNri = 4866 |
| 149081 | CEFBS_None, // TCRETURNri64 = 4867 |
| 149082 | CEFBS_None, // TDCALL = 4868 |
| 149083 | CEFBS_In64BitMode, // TDPBF16PS = 4869 |
| 149084 | CEFBS_In64BitMode, // TDPBSSD = 4870 |
| 149085 | CEFBS_In64BitMode, // TDPBSUD = 4871 |
| 149086 | CEFBS_In64BitMode, // TDPBUSD = 4872 |
| 149087 | CEFBS_In64BitMode, // TDPBUUD = 4873 |
| 149088 | CEFBS_In64BitMode, // TDPFP16PS = 4874 |
| 149089 | CEFBS_None, // TEST16i16 = 4875 |
| 149090 | CEFBS_None, // TEST16mi = 4876 |
| 149091 | CEFBS_None, // TEST16mr = 4877 |
| 149092 | CEFBS_None, // TEST16ri = 4878 |
| 149093 | CEFBS_None, // TEST16rr = 4879 |
| 149094 | CEFBS_None, // TEST32i32 = 4880 |
| 149095 | CEFBS_None, // TEST32mi = 4881 |
| 149096 | CEFBS_None, // TEST32mr = 4882 |
| 149097 | CEFBS_None, // TEST32ri = 4883 |
| 149098 | CEFBS_None, // TEST32rr = 4884 |
| 149099 | CEFBS_None, // TEST64i32 = 4885 |
| 149100 | CEFBS_In64BitMode, // TEST64mi32 = 4886 |
| 149101 | CEFBS_None, // TEST64mr = 4887 |
| 149102 | CEFBS_None, // TEST64ri32 = 4888 |
| 149103 | CEFBS_None, // TEST64rr = 4889 |
| 149104 | CEFBS_None, // TEST8i8 = 4890 |
| 149105 | CEFBS_None, // TEST8mi = 4891 |
| 149106 | CEFBS_None, // TEST8mr = 4892 |
| 149107 | CEFBS_None, // TEST8ri = 4893 |
| 149108 | CEFBS_None, // TEST8rr = 4894 |
| 149109 | CEFBS_In64BitMode, // TESTUI = 4895 |
| 149110 | CEFBS_In64BitMode, // TILELOADD = 4896 |
| 149111 | CEFBS_In64BitMode, // TILELOADDT1 = 4897 |
| 149112 | CEFBS_In64BitMode, // TILELOADDT1_EVEX = 4898 |
| 149113 | CEFBS_In64BitMode, // TILELOADD_EVEX = 4899 |
| 149114 | CEFBS_In64BitMode, // TILERELEASE = 4900 |
| 149115 | CEFBS_In64BitMode, // TILESTORED = 4901 |
| 149116 | CEFBS_In64BitMode, // TILESTORED_EVEX = 4902 |
| 149117 | CEFBS_In64BitMode, // TILEZERO = 4903 |
| 149118 | CEFBS_None, // TLBSYNC = 4904 |
| 149119 | CEFBS_Not64BitMode, // TLSCall_32 = 4905 |
| 149120 | CEFBS_In64BitMode, // TLSCall_64 = 4906 |
| 149121 | CEFBS_Not64BitMode, // TLS_addr32 = 4907 |
| 149122 | CEFBS_In64BitMode, // TLS_addr64 = 4908 |
| 149123 | CEFBS_In64BitMode, // TLS_addrX32 = 4909 |
| 149124 | CEFBS_Not64BitMode, // TLS_base_addr32 = 4910 |
| 149125 | CEFBS_In64BitMode, // TLS_base_addr64 = 4911 |
| 149126 | CEFBS_In64BitMode, // TLS_base_addrX32 = 4912 |
| 149127 | CEFBS_None, // TLS_desc32 = 4913 |
| 149128 | CEFBS_None, // TLS_desc64 = 4914 |
| 149129 | CEFBS_None, // TPAUSE = 4915 |
| 149130 | CEFBS_None, // TRAP = 4916 |
| 149131 | CEFBS_None, // TST_F = 4917 |
| 149132 | CEFBS_None, // TST_Fp32 = 4918 |
| 149133 | CEFBS_None, // TST_Fp64 = 4919 |
| 149134 | CEFBS_None, // TST_Fp80 = 4920 |
| 149135 | CEFBS_None, // TZCNT16rm = 4921 |
| 149136 | CEFBS_None, // TZCNT16rm_EVEX = 4922 |
| 149137 | CEFBS_None, // TZCNT16rm_NF = 4923 |
| 149138 | CEFBS_None, // TZCNT16rr = 4924 |
| 149139 | CEFBS_None, // TZCNT16rr_EVEX = 4925 |
| 149140 | CEFBS_None, // TZCNT16rr_NF = 4926 |
| 149141 | CEFBS_None, // TZCNT32rm = 4927 |
| 149142 | CEFBS_None, // TZCNT32rm_EVEX = 4928 |
| 149143 | CEFBS_None, // TZCNT32rm_NF = 4929 |
| 149144 | CEFBS_None, // TZCNT32rr = 4930 |
| 149145 | CEFBS_None, // TZCNT32rr_EVEX = 4931 |
| 149146 | CEFBS_None, // TZCNT32rr_NF = 4932 |
| 149147 | CEFBS_None, // TZCNT64rm = 4933 |
| 149148 | CEFBS_None, // TZCNT64rm_EVEX = 4934 |
| 149149 | CEFBS_None, // TZCNT64rm_NF = 4935 |
| 149150 | CEFBS_None, // TZCNT64rr = 4936 |
| 149151 | CEFBS_None, // TZCNT64rr_EVEX = 4937 |
| 149152 | CEFBS_None, // TZCNT64rr_NF = 4938 |
| 149153 | CEFBS_None, // TZMSK32rm = 4939 |
| 149154 | CEFBS_None, // TZMSK32rr = 4940 |
| 149155 | CEFBS_None, // TZMSK64rm = 4941 |
| 149156 | CEFBS_None, // TZMSK64rr = 4942 |
| 149157 | CEFBS_None, // UBSAN_UD1 = 4943 |
| 149158 | CEFBS_None, // UCOMISDrm = 4944 |
| 149159 | CEFBS_None, // UCOMISDrm_Int = 4945 |
| 149160 | CEFBS_None, // UCOMISDrr = 4946 |
| 149161 | CEFBS_None, // UCOMISDrr_Int = 4947 |
| 149162 | CEFBS_None, // UCOMISSrm = 4948 |
| 149163 | CEFBS_None, // UCOMISSrm_Int = 4949 |
| 149164 | CEFBS_None, // UCOMISSrr = 4950 |
| 149165 | CEFBS_None, // UCOMISSrr_Int = 4951 |
| 149166 | CEFBS_None, // UCOM_FIPr = 4952 |
| 149167 | CEFBS_None, // UCOM_FIr = 4953 |
| 149168 | CEFBS_None, // UCOM_FPPr = 4954 |
| 149169 | CEFBS_None, // UCOM_FPr = 4955 |
| 149170 | CEFBS_None, // UCOM_FpIr32 = 4956 |
| 149171 | CEFBS_None, // UCOM_FpIr64 = 4957 |
| 149172 | CEFBS_None, // UCOM_FpIr80 = 4958 |
| 149173 | CEFBS_None, // UCOM_Fpr32 = 4959 |
| 149174 | CEFBS_None, // UCOM_Fpr64 = 4960 |
| 149175 | CEFBS_None, // UCOM_Fpr80 = 4961 |
| 149176 | CEFBS_None, // UCOM_Fr = 4962 |
| 149177 | CEFBS_None, // UD1Lm = 4963 |
| 149178 | CEFBS_None, // UD1Lr = 4964 |
| 149179 | CEFBS_None, // UD1Qm = 4965 |
| 149180 | CEFBS_None, // UD1Qr = 4966 |
| 149181 | CEFBS_None, // UD1Wm = 4967 |
| 149182 | CEFBS_None, // UD1Wr = 4968 |
| 149183 | CEFBS_In64BitMode, // UIRET = 4969 |
| 149184 | CEFBS_Not64BitMode, // UMONITOR16 = 4970 |
| 149185 | CEFBS_None, // UMONITOR32 = 4971 |
| 149186 | CEFBS_In64BitMode, // UMONITOR64 = 4972 |
| 149187 | CEFBS_None, // UMWAIT = 4973 |
| 149188 | CEFBS_None, // UNPCKHPDrm = 4974 |
| 149189 | CEFBS_None, // UNPCKHPDrr = 4975 |
| 149190 | CEFBS_None, // UNPCKHPSrm = 4976 |
| 149191 | CEFBS_None, // UNPCKHPSrr = 4977 |
| 149192 | CEFBS_None, // UNPCKLPDrm = 4978 |
| 149193 | CEFBS_None, // UNPCKLPDrr = 4979 |
| 149194 | CEFBS_None, // UNPCKLPSrm = 4980 |
| 149195 | CEFBS_None, // UNPCKLPSrr = 4981 |
| 149196 | CEFBS_None, // URDMSRri = 4982 |
| 149197 | CEFBS_In64BitMode, // URDMSRri_EVEX = 4983 |
| 149198 | CEFBS_None, // URDMSRrr = 4984 |
| 149199 | CEFBS_In64BitMode, // URDMSRrr_EVEX = 4985 |
| 149200 | CEFBS_None, // UWRMSRir = 4986 |
| 149201 | CEFBS_In64BitMode, // UWRMSRir_EVEX = 4987 |
| 149202 | CEFBS_None, // UWRMSRrr = 4988 |
| 149203 | CEFBS_In64BitMode, // UWRMSRrr_EVEX = 4989 |
| 149204 | CEFBS_None, // V4FMADDPSrm = 4990 |
| 149205 | CEFBS_None, // V4FMADDPSrmk = 4991 |
| 149206 | CEFBS_None, // V4FMADDPSrmkz = 4992 |
| 149207 | CEFBS_None, // V4FMADDSSrm = 4993 |
| 149208 | CEFBS_None, // V4FMADDSSrmk = 4994 |
| 149209 | CEFBS_None, // V4FMADDSSrmkz = 4995 |
| 149210 | CEFBS_None, // V4FNMADDPSrm = 4996 |
| 149211 | CEFBS_None, // V4FNMADDPSrmk = 4997 |
| 149212 | CEFBS_None, // V4FNMADDPSrmkz = 4998 |
| 149213 | CEFBS_None, // V4FNMADDSSrm = 4999 |
| 149214 | CEFBS_None, // V4FNMADDSSrmk = 5000 |
| 149215 | CEFBS_None, // V4FNMADDSSrmkz = 5001 |
| 149216 | CEFBS_In64BitMode, // VAARG_64 = 5002 |
| 149217 | CEFBS_In64BitMode, // VAARG_X32 = 5003 |
| 149218 | CEFBS_None, // VADDPDYrm = 5004 |
| 149219 | CEFBS_None, // VADDPDYrr = 5005 |
| 149220 | CEFBS_None, // VADDPDZ128rm = 5006 |
| 149221 | CEFBS_None, // VADDPDZ128rmb = 5007 |
| 149222 | CEFBS_None, // VADDPDZ128rmbk = 5008 |
| 149223 | CEFBS_None, // VADDPDZ128rmbkz = 5009 |
| 149224 | CEFBS_None, // VADDPDZ128rmk = 5010 |
| 149225 | CEFBS_None, // VADDPDZ128rmkz = 5011 |
| 149226 | CEFBS_None, // VADDPDZ128rr = 5012 |
| 149227 | CEFBS_None, // VADDPDZ128rrk = 5013 |
| 149228 | CEFBS_None, // VADDPDZ128rrkz = 5014 |
| 149229 | CEFBS_None, // VADDPDZ256rm = 5015 |
| 149230 | CEFBS_None, // VADDPDZ256rmb = 5016 |
| 149231 | CEFBS_None, // VADDPDZ256rmbk = 5017 |
| 149232 | CEFBS_None, // VADDPDZ256rmbkz = 5018 |
| 149233 | CEFBS_None, // VADDPDZ256rmk = 5019 |
| 149234 | CEFBS_None, // VADDPDZ256rmkz = 5020 |
| 149235 | CEFBS_None, // VADDPDZ256rr = 5021 |
| 149236 | CEFBS_None, // VADDPDZ256rrk = 5022 |
| 149237 | CEFBS_None, // VADDPDZ256rrkz = 5023 |
| 149238 | CEFBS_None, // VADDPDZrm = 5024 |
| 149239 | CEFBS_None, // VADDPDZrmb = 5025 |
| 149240 | CEFBS_None, // VADDPDZrmbk = 5026 |
| 149241 | CEFBS_None, // VADDPDZrmbkz = 5027 |
| 149242 | CEFBS_None, // VADDPDZrmk = 5028 |
| 149243 | CEFBS_None, // VADDPDZrmkz = 5029 |
| 149244 | CEFBS_None, // VADDPDZrr = 5030 |
| 149245 | CEFBS_None, // VADDPDZrrb = 5031 |
| 149246 | CEFBS_None, // VADDPDZrrbk = 5032 |
| 149247 | CEFBS_None, // VADDPDZrrbkz = 5033 |
| 149248 | CEFBS_None, // VADDPDZrrk = 5034 |
| 149249 | CEFBS_None, // VADDPDZrrkz = 5035 |
| 149250 | CEFBS_None, // VADDPDrm = 5036 |
| 149251 | CEFBS_None, // VADDPDrr = 5037 |
| 149252 | CEFBS_None, // VADDPHZ128rm = 5038 |
| 149253 | CEFBS_None, // VADDPHZ128rmb = 5039 |
| 149254 | CEFBS_None, // VADDPHZ128rmbk = 5040 |
| 149255 | CEFBS_None, // VADDPHZ128rmbkz = 5041 |
| 149256 | CEFBS_None, // VADDPHZ128rmk = 5042 |
| 149257 | CEFBS_None, // VADDPHZ128rmkz = 5043 |
| 149258 | CEFBS_None, // VADDPHZ128rr = 5044 |
| 149259 | CEFBS_None, // VADDPHZ128rrk = 5045 |
| 149260 | CEFBS_None, // VADDPHZ128rrkz = 5046 |
| 149261 | CEFBS_None, // VADDPHZ256rm = 5047 |
| 149262 | CEFBS_None, // VADDPHZ256rmb = 5048 |
| 149263 | CEFBS_None, // VADDPHZ256rmbk = 5049 |
| 149264 | CEFBS_None, // VADDPHZ256rmbkz = 5050 |
| 149265 | CEFBS_None, // VADDPHZ256rmk = 5051 |
| 149266 | CEFBS_None, // VADDPHZ256rmkz = 5052 |
| 149267 | CEFBS_None, // VADDPHZ256rr = 5053 |
| 149268 | CEFBS_None, // VADDPHZ256rrk = 5054 |
| 149269 | CEFBS_None, // VADDPHZ256rrkz = 5055 |
| 149270 | CEFBS_None, // VADDPHZrm = 5056 |
| 149271 | CEFBS_None, // VADDPHZrmb = 5057 |
| 149272 | CEFBS_None, // VADDPHZrmbk = 5058 |
| 149273 | CEFBS_None, // VADDPHZrmbkz = 5059 |
| 149274 | CEFBS_None, // VADDPHZrmk = 5060 |
| 149275 | CEFBS_None, // VADDPHZrmkz = 5061 |
| 149276 | CEFBS_None, // VADDPHZrr = 5062 |
| 149277 | CEFBS_None, // VADDPHZrrb = 5063 |
| 149278 | CEFBS_None, // VADDPHZrrbk = 5064 |
| 149279 | CEFBS_None, // VADDPHZrrbkz = 5065 |
| 149280 | CEFBS_None, // VADDPHZrrk = 5066 |
| 149281 | CEFBS_None, // VADDPHZrrkz = 5067 |
| 149282 | CEFBS_None, // VADDPSYrm = 5068 |
| 149283 | CEFBS_None, // VADDPSYrr = 5069 |
| 149284 | CEFBS_None, // VADDPSZ128rm = 5070 |
| 149285 | CEFBS_None, // VADDPSZ128rmb = 5071 |
| 149286 | CEFBS_None, // VADDPSZ128rmbk = 5072 |
| 149287 | CEFBS_None, // VADDPSZ128rmbkz = 5073 |
| 149288 | CEFBS_None, // VADDPSZ128rmk = 5074 |
| 149289 | CEFBS_None, // VADDPSZ128rmkz = 5075 |
| 149290 | CEFBS_None, // VADDPSZ128rr = 5076 |
| 149291 | CEFBS_None, // VADDPSZ128rrk = 5077 |
| 149292 | CEFBS_None, // VADDPSZ128rrkz = 5078 |
| 149293 | CEFBS_None, // VADDPSZ256rm = 5079 |
| 149294 | CEFBS_None, // VADDPSZ256rmb = 5080 |
| 149295 | CEFBS_None, // VADDPSZ256rmbk = 5081 |
| 149296 | CEFBS_None, // VADDPSZ256rmbkz = 5082 |
| 149297 | CEFBS_None, // VADDPSZ256rmk = 5083 |
| 149298 | CEFBS_None, // VADDPSZ256rmkz = 5084 |
| 149299 | CEFBS_None, // VADDPSZ256rr = 5085 |
| 149300 | CEFBS_None, // VADDPSZ256rrk = 5086 |
| 149301 | CEFBS_None, // VADDPSZ256rrkz = 5087 |
| 149302 | CEFBS_None, // VADDPSZrm = 5088 |
| 149303 | CEFBS_None, // VADDPSZrmb = 5089 |
| 149304 | CEFBS_None, // VADDPSZrmbk = 5090 |
| 149305 | CEFBS_None, // VADDPSZrmbkz = 5091 |
| 149306 | CEFBS_None, // VADDPSZrmk = 5092 |
| 149307 | CEFBS_None, // VADDPSZrmkz = 5093 |
| 149308 | CEFBS_None, // VADDPSZrr = 5094 |
| 149309 | CEFBS_None, // VADDPSZrrb = 5095 |
| 149310 | CEFBS_None, // VADDPSZrrbk = 5096 |
| 149311 | CEFBS_None, // VADDPSZrrbkz = 5097 |
| 149312 | CEFBS_None, // VADDPSZrrk = 5098 |
| 149313 | CEFBS_None, // VADDPSZrrkz = 5099 |
| 149314 | CEFBS_None, // VADDPSrm = 5100 |
| 149315 | CEFBS_None, // VADDPSrr = 5101 |
| 149316 | CEFBS_None, // VADDSDZrm = 5102 |
| 149317 | CEFBS_None, // VADDSDZrm_Int = 5103 |
| 149318 | CEFBS_None, // VADDSDZrm_Intk = 5104 |
| 149319 | CEFBS_None, // VADDSDZrm_Intkz = 5105 |
| 149320 | CEFBS_None, // VADDSDZrr = 5106 |
| 149321 | CEFBS_None, // VADDSDZrr_Int = 5107 |
| 149322 | CEFBS_None, // VADDSDZrr_Intk = 5108 |
| 149323 | CEFBS_None, // VADDSDZrr_Intkz = 5109 |
| 149324 | CEFBS_None, // VADDSDZrrb_Int = 5110 |
| 149325 | CEFBS_None, // VADDSDZrrb_Intk = 5111 |
| 149326 | CEFBS_None, // VADDSDZrrb_Intkz = 5112 |
| 149327 | CEFBS_None, // VADDSDrm = 5113 |
| 149328 | CEFBS_None, // VADDSDrm_Int = 5114 |
| 149329 | CEFBS_None, // VADDSDrr = 5115 |
| 149330 | CEFBS_None, // VADDSDrr_Int = 5116 |
| 149331 | CEFBS_None, // VADDSHZrm = 5117 |
| 149332 | CEFBS_None, // VADDSHZrm_Int = 5118 |
| 149333 | CEFBS_None, // VADDSHZrm_Intk = 5119 |
| 149334 | CEFBS_None, // VADDSHZrm_Intkz = 5120 |
| 149335 | CEFBS_None, // VADDSHZrr = 5121 |
| 149336 | CEFBS_None, // VADDSHZrr_Int = 5122 |
| 149337 | CEFBS_None, // VADDSHZrr_Intk = 5123 |
| 149338 | CEFBS_None, // VADDSHZrr_Intkz = 5124 |
| 149339 | CEFBS_None, // VADDSHZrrb_Int = 5125 |
| 149340 | CEFBS_None, // VADDSHZrrb_Intk = 5126 |
| 149341 | CEFBS_None, // VADDSHZrrb_Intkz = 5127 |
| 149342 | CEFBS_None, // VADDSSZrm = 5128 |
| 149343 | CEFBS_None, // VADDSSZrm_Int = 5129 |
| 149344 | CEFBS_None, // VADDSSZrm_Intk = 5130 |
| 149345 | CEFBS_None, // VADDSSZrm_Intkz = 5131 |
| 149346 | CEFBS_None, // VADDSSZrr = 5132 |
| 149347 | CEFBS_None, // VADDSSZrr_Int = 5133 |
| 149348 | CEFBS_None, // VADDSSZrr_Intk = 5134 |
| 149349 | CEFBS_None, // VADDSSZrr_Intkz = 5135 |
| 149350 | CEFBS_None, // VADDSSZrrb_Int = 5136 |
| 149351 | CEFBS_None, // VADDSSZrrb_Intk = 5137 |
| 149352 | CEFBS_None, // VADDSSZrrb_Intkz = 5138 |
| 149353 | CEFBS_None, // VADDSSrm = 5139 |
| 149354 | CEFBS_None, // VADDSSrm_Int = 5140 |
| 149355 | CEFBS_None, // VADDSSrr = 5141 |
| 149356 | CEFBS_None, // VADDSSrr_Int = 5142 |
| 149357 | CEFBS_None, // VADDSUBPDYrm = 5143 |
| 149358 | CEFBS_None, // VADDSUBPDYrr = 5144 |
| 149359 | CEFBS_None, // VADDSUBPDrm = 5145 |
| 149360 | CEFBS_None, // VADDSUBPDrr = 5146 |
| 149361 | CEFBS_None, // VADDSUBPSYrm = 5147 |
| 149362 | CEFBS_None, // VADDSUBPSYrr = 5148 |
| 149363 | CEFBS_None, // VADDSUBPSrm = 5149 |
| 149364 | CEFBS_None, // VADDSUBPSrr = 5150 |
| 149365 | CEFBS_None, // VAESDECLASTYrm = 5151 |
| 149366 | CEFBS_None, // VAESDECLASTYrr = 5152 |
| 149367 | CEFBS_None, // VAESDECLASTZ128rm = 5153 |
| 149368 | CEFBS_None, // VAESDECLASTZ128rr = 5154 |
| 149369 | CEFBS_None, // VAESDECLASTZ256rm = 5155 |
| 149370 | CEFBS_None, // VAESDECLASTZ256rr = 5156 |
| 149371 | CEFBS_None, // VAESDECLASTZrm = 5157 |
| 149372 | CEFBS_None, // VAESDECLASTZrr = 5158 |
| 149373 | CEFBS_None, // VAESDECLASTrm = 5159 |
| 149374 | CEFBS_None, // VAESDECLASTrr = 5160 |
| 149375 | CEFBS_None, // VAESDECYrm = 5161 |
| 149376 | CEFBS_None, // VAESDECYrr = 5162 |
| 149377 | CEFBS_None, // VAESDECZ128rm = 5163 |
| 149378 | CEFBS_None, // VAESDECZ128rr = 5164 |
| 149379 | CEFBS_None, // VAESDECZ256rm = 5165 |
| 149380 | CEFBS_None, // VAESDECZ256rr = 5166 |
| 149381 | CEFBS_None, // VAESDECZrm = 5167 |
| 149382 | CEFBS_None, // VAESDECZrr = 5168 |
| 149383 | CEFBS_None, // VAESDECrm = 5169 |
| 149384 | CEFBS_None, // VAESDECrr = 5170 |
| 149385 | CEFBS_None, // VAESENCLASTYrm = 5171 |
| 149386 | CEFBS_None, // VAESENCLASTYrr = 5172 |
| 149387 | CEFBS_None, // VAESENCLASTZ128rm = 5173 |
| 149388 | CEFBS_None, // VAESENCLASTZ128rr = 5174 |
| 149389 | CEFBS_None, // VAESENCLASTZ256rm = 5175 |
| 149390 | CEFBS_None, // VAESENCLASTZ256rr = 5176 |
| 149391 | CEFBS_None, // VAESENCLASTZrm = 5177 |
| 149392 | CEFBS_None, // VAESENCLASTZrr = 5178 |
| 149393 | CEFBS_None, // VAESENCLASTrm = 5179 |
| 149394 | CEFBS_None, // VAESENCLASTrr = 5180 |
| 149395 | CEFBS_None, // VAESENCYrm = 5181 |
| 149396 | CEFBS_None, // VAESENCYrr = 5182 |
| 149397 | CEFBS_None, // VAESENCZ128rm = 5183 |
| 149398 | CEFBS_None, // VAESENCZ128rr = 5184 |
| 149399 | CEFBS_None, // VAESENCZ256rm = 5185 |
| 149400 | CEFBS_None, // VAESENCZ256rr = 5186 |
| 149401 | CEFBS_None, // VAESENCZrm = 5187 |
| 149402 | CEFBS_None, // VAESENCZrr = 5188 |
| 149403 | CEFBS_None, // VAESENCrm = 5189 |
| 149404 | CEFBS_None, // VAESENCrr = 5190 |
| 149405 | CEFBS_None, // VAESIMCrm = 5191 |
| 149406 | CEFBS_None, // VAESIMCrr = 5192 |
| 149407 | CEFBS_None, // VAESKEYGENASSIST128rm = 5193 |
| 149408 | CEFBS_None, // VAESKEYGENASSIST128rr = 5194 |
| 149409 | CEFBS_None, // VALIGNDZ128rmbi = 5195 |
| 149410 | CEFBS_None, // VALIGNDZ128rmbik = 5196 |
| 149411 | CEFBS_None, // VALIGNDZ128rmbikz = 5197 |
| 149412 | CEFBS_None, // VALIGNDZ128rmi = 5198 |
| 149413 | CEFBS_None, // VALIGNDZ128rmik = 5199 |
| 149414 | CEFBS_None, // VALIGNDZ128rmikz = 5200 |
| 149415 | CEFBS_None, // VALIGNDZ128rri = 5201 |
| 149416 | CEFBS_None, // VALIGNDZ128rrik = 5202 |
| 149417 | CEFBS_None, // VALIGNDZ128rrikz = 5203 |
| 149418 | CEFBS_None, // VALIGNDZ256rmbi = 5204 |
| 149419 | CEFBS_None, // VALIGNDZ256rmbik = 5205 |
| 149420 | CEFBS_None, // VALIGNDZ256rmbikz = 5206 |
| 149421 | CEFBS_None, // VALIGNDZ256rmi = 5207 |
| 149422 | CEFBS_None, // VALIGNDZ256rmik = 5208 |
| 149423 | CEFBS_None, // VALIGNDZ256rmikz = 5209 |
| 149424 | CEFBS_None, // VALIGNDZ256rri = 5210 |
| 149425 | CEFBS_None, // VALIGNDZ256rrik = 5211 |
| 149426 | CEFBS_None, // VALIGNDZ256rrikz = 5212 |
| 149427 | CEFBS_None, // VALIGNDZrmbi = 5213 |
| 149428 | CEFBS_None, // VALIGNDZrmbik = 5214 |
| 149429 | CEFBS_None, // VALIGNDZrmbikz = 5215 |
| 149430 | CEFBS_None, // VALIGNDZrmi = 5216 |
| 149431 | CEFBS_None, // VALIGNDZrmik = 5217 |
| 149432 | CEFBS_None, // VALIGNDZrmikz = 5218 |
| 149433 | CEFBS_None, // VALIGNDZrri = 5219 |
| 149434 | CEFBS_None, // VALIGNDZrrik = 5220 |
| 149435 | CEFBS_None, // VALIGNDZrrikz = 5221 |
| 149436 | CEFBS_None, // VALIGNQZ128rmbi = 5222 |
| 149437 | CEFBS_None, // VALIGNQZ128rmbik = 5223 |
| 149438 | CEFBS_None, // VALIGNQZ128rmbikz = 5224 |
| 149439 | CEFBS_None, // VALIGNQZ128rmi = 5225 |
| 149440 | CEFBS_None, // VALIGNQZ128rmik = 5226 |
| 149441 | CEFBS_None, // VALIGNQZ128rmikz = 5227 |
| 149442 | CEFBS_None, // VALIGNQZ128rri = 5228 |
| 149443 | CEFBS_None, // VALIGNQZ128rrik = 5229 |
| 149444 | CEFBS_None, // VALIGNQZ128rrikz = 5230 |
| 149445 | CEFBS_None, // VALIGNQZ256rmbi = 5231 |
| 149446 | CEFBS_None, // VALIGNQZ256rmbik = 5232 |
| 149447 | CEFBS_None, // VALIGNQZ256rmbikz = 5233 |
| 149448 | CEFBS_None, // VALIGNQZ256rmi = 5234 |
| 149449 | CEFBS_None, // VALIGNQZ256rmik = 5235 |
| 149450 | CEFBS_None, // VALIGNQZ256rmikz = 5236 |
| 149451 | CEFBS_None, // VALIGNQZ256rri = 5237 |
| 149452 | CEFBS_None, // VALIGNQZ256rrik = 5238 |
| 149453 | CEFBS_None, // VALIGNQZ256rrikz = 5239 |
| 149454 | CEFBS_None, // VALIGNQZrmbi = 5240 |
| 149455 | CEFBS_None, // VALIGNQZrmbik = 5241 |
| 149456 | CEFBS_None, // VALIGNQZrmbikz = 5242 |
| 149457 | CEFBS_None, // VALIGNQZrmi = 5243 |
| 149458 | CEFBS_None, // VALIGNQZrmik = 5244 |
| 149459 | CEFBS_None, // VALIGNQZrmikz = 5245 |
| 149460 | CEFBS_None, // VALIGNQZrri = 5246 |
| 149461 | CEFBS_None, // VALIGNQZrrik = 5247 |
| 149462 | CEFBS_None, // VALIGNQZrrikz = 5248 |
| 149463 | CEFBS_None, // VANDNPDYrm = 5249 |
| 149464 | CEFBS_None, // VANDNPDYrr = 5250 |
| 149465 | CEFBS_None, // VANDNPDZ128rm = 5251 |
| 149466 | CEFBS_None, // VANDNPDZ128rmb = 5252 |
| 149467 | CEFBS_None, // VANDNPDZ128rmbk = 5253 |
| 149468 | CEFBS_None, // VANDNPDZ128rmbkz = 5254 |
| 149469 | CEFBS_None, // VANDNPDZ128rmk = 5255 |
| 149470 | CEFBS_None, // VANDNPDZ128rmkz = 5256 |
| 149471 | CEFBS_None, // VANDNPDZ128rr = 5257 |
| 149472 | CEFBS_None, // VANDNPDZ128rrk = 5258 |
| 149473 | CEFBS_None, // VANDNPDZ128rrkz = 5259 |
| 149474 | CEFBS_None, // VANDNPDZ256rm = 5260 |
| 149475 | CEFBS_None, // VANDNPDZ256rmb = 5261 |
| 149476 | CEFBS_None, // VANDNPDZ256rmbk = 5262 |
| 149477 | CEFBS_None, // VANDNPDZ256rmbkz = 5263 |
| 149478 | CEFBS_None, // VANDNPDZ256rmk = 5264 |
| 149479 | CEFBS_None, // VANDNPDZ256rmkz = 5265 |
| 149480 | CEFBS_None, // VANDNPDZ256rr = 5266 |
| 149481 | CEFBS_None, // VANDNPDZ256rrk = 5267 |
| 149482 | CEFBS_None, // VANDNPDZ256rrkz = 5268 |
| 149483 | CEFBS_None, // VANDNPDZrm = 5269 |
| 149484 | CEFBS_None, // VANDNPDZrmb = 5270 |
| 149485 | CEFBS_None, // VANDNPDZrmbk = 5271 |
| 149486 | CEFBS_None, // VANDNPDZrmbkz = 5272 |
| 149487 | CEFBS_None, // VANDNPDZrmk = 5273 |
| 149488 | CEFBS_None, // VANDNPDZrmkz = 5274 |
| 149489 | CEFBS_None, // VANDNPDZrr = 5275 |
| 149490 | CEFBS_None, // VANDNPDZrrk = 5276 |
| 149491 | CEFBS_None, // VANDNPDZrrkz = 5277 |
| 149492 | CEFBS_None, // VANDNPDrm = 5278 |
| 149493 | CEFBS_None, // VANDNPDrr = 5279 |
| 149494 | CEFBS_None, // VANDNPSYrm = 5280 |
| 149495 | CEFBS_None, // VANDNPSYrr = 5281 |
| 149496 | CEFBS_None, // VANDNPSZ128rm = 5282 |
| 149497 | CEFBS_None, // VANDNPSZ128rmb = 5283 |
| 149498 | CEFBS_None, // VANDNPSZ128rmbk = 5284 |
| 149499 | CEFBS_None, // VANDNPSZ128rmbkz = 5285 |
| 149500 | CEFBS_None, // VANDNPSZ128rmk = 5286 |
| 149501 | CEFBS_None, // VANDNPSZ128rmkz = 5287 |
| 149502 | CEFBS_None, // VANDNPSZ128rr = 5288 |
| 149503 | CEFBS_None, // VANDNPSZ128rrk = 5289 |
| 149504 | CEFBS_None, // VANDNPSZ128rrkz = 5290 |
| 149505 | CEFBS_None, // VANDNPSZ256rm = 5291 |
| 149506 | CEFBS_None, // VANDNPSZ256rmb = 5292 |
| 149507 | CEFBS_None, // VANDNPSZ256rmbk = 5293 |
| 149508 | CEFBS_None, // VANDNPSZ256rmbkz = 5294 |
| 149509 | CEFBS_None, // VANDNPSZ256rmk = 5295 |
| 149510 | CEFBS_None, // VANDNPSZ256rmkz = 5296 |
| 149511 | CEFBS_None, // VANDNPSZ256rr = 5297 |
| 149512 | CEFBS_None, // VANDNPSZ256rrk = 5298 |
| 149513 | CEFBS_None, // VANDNPSZ256rrkz = 5299 |
| 149514 | CEFBS_None, // VANDNPSZrm = 5300 |
| 149515 | CEFBS_None, // VANDNPSZrmb = 5301 |
| 149516 | CEFBS_None, // VANDNPSZrmbk = 5302 |
| 149517 | CEFBS_None, // VANDNPSZrmbkz = 5303 |
| 149518 | CEFBS_None, // VANDNPSZrmk = 5304 |
| 149519 | CEFBS_None, // VANDNPSZrmkz = 5305 |
| 149520 | CEFBS_None, // VANDNPSZrr = 5306 |
| 149521 | CEFBS_None, // VANDNPSZrrk = 5307 |
| 149522 | CEFBS_None, // VANDNPSZrrkz = 5308 |
| 149523 | CEFBS_None, // VANDNPSrm = 5309 |
| 149524 | CEFBS_None, // VANDNPSrr = 5310 |
| 149525 | CEFBS_None, // VANDPDYrm = 5311 |
| 149526 | CEFBS_None, // VANDPDYrr = 5312 |
| 149527 | CEFBS_None, // VANDPDZ128rm = 5313 |
| 149528 | CEFBS_None, // VANDPDZ128rmb = 5314 |
| 149529 | CEFBS_None, // VANDPDZ128rmbk = 5315 |
| 149530 | CEFBS_None, // VANDPDZ128rmbkz = 5316 |
| 149531 | CEFBS_None, // VANDPDZ128rmk = 5317 |
| 149532 | CEFBS_None, // VANDPDZ128rmkz = 5318 |
| 149533 | CEFBS_None, // VANDPDZ128rr = 5319 |
| 149534 | CEFBS_None, // VANDPDZ128rrk = 5320 |
| 149535 | CEFBS_None, // VANDPDZ128rrkz = 5321 |
| 149536 | CEFBS_None, // VANDPDZ256rm = 5322 |
| 149537 | CEFBS_None, // VANDPDZ256rmb = 5323 |
| 149538 | CEFBS_None, // VANDPDZ256rmbk = 5324 |
| 149539 | CEFBS_None, // VANDPDZ256rmbkz = 5325 |
| 149540 | CEFBS_None, // VANDPDZ256rmk = 5326 |
| 149541 | CEFBS_None, // VANDPDZ256rmkz = 5327 |
| 149542 | CEFBS_None, // VANDPDZ256rr = 5328 |
| 149543 | CEFBS_None, // VANDPDZ256rrk = 5329 |
| 149544 | CEFBS_None, // VANDPDZ256rrkz = 5330 |
| 149545 | CEFBS_None, // VANDPDZrm = 5331 |
| 149546 | CEFBS_None, // VANDPDZrmb = 5332 |
| 149547 | CEFBS_None, // VANDPDZrmbk = 5333 |
| 149548 | CEFBS_None, // VANDPDZrmbkz = 5334 |
| 149549 | CEFBS_None, // VANDPDZrmk = 5335 |
| 149550 | CEFBS_None, // VANDPDZrmkz = 5336 |
| 149551 | CEFBS_None, // VANDPDZrr = 5337 |
| 149552 | CEFBS_None, // VANDPDZrrk = 5338 |
| 149553 | CEFBS_None, // VANDPDZrrkz = 5339 |
| 149554 | CEFBS_None, // VANDPDrm = 5340 |
| 149555 | CEFBS_None, // VANDPDrr = 5341 |
| 149556 | CEFBS_None, // VANDPSYrm = 5342 |
| 149557 | CEFBS_None, // VANDPSYrr = 5343 |
| 149558 | CEFBS_None, // VANDPSZ128rm = 5344 |
| 149559 | CEFBS_None, // VANDPSZ128rmb = 5345 |
| 149560 | CEFBS_None, // VANDPSZ128rmbk = 5346 |
| 149561 | CEFBS_None, // VANDPSZ128rmbkz = 5347 |
| 149562 | CEFBS_None, // VANDPSZ128rmk = 5348 |
| 149563 | CEFBS_None, // VANDPSZ128rmkz = 5349 |
| 149564 | CEFBS_None, // VANDPSZ128rr = 5350 |
| 149565 | CEFBS_None, // VANDPSZ128rrk = 5351 |
| 149566 | CEFBS_None, // VANDPSZ128rrkz = 5352 |
| 149567 | CEFBS_None, // VANDPSZ256rm = 5353 |
| 149568 | CEFBS_None, // VANDPSZ256rmb = 5354 |
| 149569 | CEFBS_None, // VANDPSZ256rmbk = 5355 |
| 149570 | CEFBS_None, // VANDPSZ256rmbkz = 5356 |
| 149571 | CEFBS_None, // VANDPSZ256rmk = 5357 |
| 149572 | CEFBS_None, // VANDPSZ256rmkz = 5358 |
| 149573 | CEFBS_None, // VANDPSZ256rr = 5359 |
| 149574 | CEFBS_None, // VANDPSZ256rrk = 5360 |
| 149575 | CEFBS_None, // VANDPSZ256rrkz = 5361 |
| 149576 | CEFBS_None, // VANDPSZrm = 5362 |
| 149577 | CEFBS_None, // VANDPSZrmb = 5363 |
| 149578 | CEFBS_None, // VANDPSZrmbk = 5364 |
| 149579 | CEFBS_None, // VANDPSZrmbkz = 5365 |
| 149580 | CEFBS_None, // VANDPSZrmk = 5366 |
| 149581 | CEFBS_None, // VANDPSZrmkz = 5367 |
| 149582 | CEFBS_None, // VANDPSZrr = 5368 |
| 149583 | CEFBS_None, // VANDPSZrrk = 5369 |
| 149584 | CEFBS_None, // VANDPSZrrkz = 5370 |
| 149585 | CEFBS_None, // VANDPSrm = 5371 |
| 149586 | CEFBS_None, // VANDPSrr = 5372 |
| 149587 | CEFBS_None, // VASTART_SAVE_XMM_REGS = 5373 |
| 149588 | CEFBS_None, // VBCSTNEBF162PSYrm = 5374 |
| 149589 | CEFBS_None, // VBCSTNEBF162PSrm = 5375 |
| 149590 | CEFBS_None, // VBCSTNESH2PSYrm = 5376 |
| 149591 | CEFBS_None, // VBCSTNESH2PSrm = 5377 |
| 149592 | CEFBS_None, // VBLENDMPDZ128rm = 5378 |
| 149593 | CEFBS_None, // VBLENDMPDZ128rmb = 5379 |
| 149594 | CEFBS_None, // VBLENDMPDZ128rmbk = 5380 |
| 149595 | CEFBS_None, // VBLENDMPDZ128rmbkz = 5381 |
| 149596 | CEFBS_None, // VBLENDMPDZ128rmk = 5382 |
| 149597 | CEFBS_None, // VBLENDMPDZ128rmkz = 5383 |
| 149598 | CEFBS_None, // VBLENDMPDZ128rr = 5384 |
| 149599 | CEFBS_None, // VBLENDMPDZ128rrk = 5385 |
| 149600 | CEFBS_None, // VBLENDMPDZ128rrkz = 5386 |
| 149601 | CEFBS_None, // VBLENDMPDZ256rm = 5387 |
| 149602 | CEFBS_None, // VBLENDMPDZ256rmb = 5388 |
| 149603 | CEFBS_None, // VBLENDMPDZ256rmbk = 5389 |
| 149604 | CEFBS_None, // VBLENDMPDZ256rmbkz = 5390 |
| 149605 | CEFBS_None, // VBLENDMPDZ256rmk = 5391 |
| 149606 | CEFBS_None, // VBLENDMPDZ256rmkz = 5392 |
| 149607 | CEFBS_None, // VBLENDMPDZ256rr = 5393 |
| 149608 | CEFBS_None, // VBLENDMPDZ256rrk = 5394 |
| 149609 | CEFBS_None, // VBLENDMPDZ256rrkz = 5395 |
| 149610 | CEFBS_None, // VBLENDMPDZrm = 5396 |
| 149611 | CEFBS_None, // VBLENDMPDZrmb = 5397 |
| 149612 | CEFBS_None, // VBLENDMPDZrmbk = 5398 |
| 149613 | CEFBS_None, // VBLENDMPDZrmbkz = 5399 |
| 149614 | CEFBS_None, // VBLENDMPDZrmk = 5400 |
| 149615 | CEFBS_None, // VBLENDMPDZrmkz = 5401 |
| 149616 | CEFBS_None, // VBLENDMPDZrr = 5402 |
| 149617 | CEFBS_None, // VBLENDMPDZrrk = 5403 |
| 149618 | CEFBS_None, // VBLENDMPDZrrkz = 5404 |
| 149619 | CEFBS_None, // VBLENDMPSZ128rm = 5405 |
| 149620 | CEFBS_None, // VBLENDMPSZ128rmb = 5406 |
| 149621 | CEFBS_None, // VBLENDMPSZ128rmbk = 5407 |
| 149622 | CEFBS_None, // VBLENDMPSZ128rmbkz = 5408 |
| 149623 | CEFBS_None, // VBLENDMPSZ128rmk = 5409 |
| 149624 | CEFBS_None, // VBLENDMPSZ128rmkz = 5410 |
| 149625 | CEFBS_None, // VBLENDMPSZ128rr = 5411 |
| 149626 | CEFBS_None, // VBLENDMPSZ128rrk = 5412 |
| 149627 | CEFBS_None, // VBLENDMPSZ128rrkz = 5413 |
| 149628 | CEFBS_None, // VBLENDMPSZ256rm = 5414 |
| 149629 | CEFBS_None, // VBLENDMPSZ256rmb = 5415 |
| 149630 | CEFBS_None, // VBLENDMPSZ256rmbk = 5416 |
| 149631 | CEFBS_None, // VBLENDMPSZ256rmbkz = 5417 |
| 149632 | CEFBS_None, // VBLENDMPSZ256rmk = 5418 |
| 149633 | CEFBS_None, // VBLENDMPSZ256rmkz = 5419 |
| 149634 | CEFBS_None, // VBLENDMPSZ256rr = 5420 |
| 149635 | CEFBS_None, // VBLENDMPSZ256rrk = 5421 |
| 149636 | CEFBS_None, // VBLENDMPSZ256rrkz = 5422 |
| 149637 | CEFBS_None, // VBLENDMPSZrm = 5423 |
| 149638 | CEFBS_None, // VBLENDMPSZrmb = 5424 |
| 149639 | CEFBS_None, // VBLENDMPSZrmbk = 5425 |
| 149640 | CEFBS_None, // VBLENDMPSZrmbkz = 5426 |
| 149641 | CEFBS_None, // VBLENDMPSZrmk = 5427 |
| 149642 | CEFBS_None, // VBLENDMPSZrmkz = 5428 |
| 149643 | CEFBS_None, // VBLENDMPSZrr = 5429 |
| 149644 | CEFBS_None, // VBLENDMPSZrrk = 5430 |
| 149645 | CEFBS_None, // VBLENDMPSZrrkz = 5431 |
| 149646 | CEFBS_None, // VBLENDPDYrmi = 5432 |
| 149647 | CEFBS_None, // VBLENDPDYrri = 5433 |
| 149648 | CEFBS_None, // VBLENDPDrmi = 5434 |
| 149649 | CEFBS_None, // VBLENDPDrri = 5435 |
| 149650 | CEFBS_None, // VBLENDPSYrmi = 5436 |
| 149651 | CEFBS_None, // VBLENDPSYrri = 5437 |
| 149652 | CEFBS_None, // VBLENDPSrmi = 5438 |
| 149653 | CEFBS_None, // VBLENDPSrri = 5439 |
| 149654 | CEFBS_None, // VBLENDVPDYrmr = 5440 |
| 149655 | CEFBS_None, // VBLENDVPDYrrr = 5441 |
| 149656 | CEFBS_None, // VBLENDVPDrmr = 5442 |
| 149657 | CEFBS_None, // VBLENDVPDrrr = 5443 |
| 149658 | CEFBS_None, // VBLENDVPSYrmr = 5444 |
| 149659 | CEFBS_None, // VBLENDVPSYrrr = 5445 |
| 149660 | CEFBS_None, // VBLENDVPSrmr = 5446 |
| 149661 | CEFBS_None, // VBLENDVPSrrr = 5447 |
| 149662 | CEFBS_None, // VBROADCASTF128rm = 5448 |
| 149663 | CEFBS_None, // VBROADCASTF32X2Z256rm = 5449 |
| 149664 | CEFBS_None, // VBROADCASTF32X2Z256rmk = 5450 |
| 149665 | CEFBS_None, // VBROADCASTF32X2Z256rmkz = 5451 |
| 149666 | CEFBS_None, // VBROADCASTF32X2Z256rr = 5452 |
| 149667 | CEFBS_None, // VBROADCASTF32X2Z256rrk = 5453 |
| 149668 | CEFBS_None, // VBROADCASTF32X2Z256rrkz = 5454 |
| 149669 | CEFBS_None, // VBROADCASTF32X2Zrm = 5455 |
| 149670 | CEFBS_None, // VBROADCASTF32X2Zrmk = 5456 |
| 149671 | CEFBS_None, // VBROADCASTF32X2Zrmkz = 5457 |
| 149672 | CEFBS_None, // VBROADCASTF32X2Zrr = 5458 |
| 149673 | CEFBS_None, // VBROADCASTF32X2Zrrk = 5459 |
| 149674 | CEFBS_None, // VBROADCASTF32X2Zrrkz = 5460 |
| 149675 | CEFBS_None, // VBROADCASTF32X4Z256rm = 5461 |
| 149676 | CEFBS_None, // VBROADCASTF32X4Z256rmk = 5462 |
| 149677 | CEFBS_None, // VBROADCASTF32X4Z256rmkz = 5463 |
| 149678 | CEFBS_None, // VBROADCASTF32X4rm = 5464 |
| 149679 | CEFBS_None, // VBROADCASTF32X4rmk = 5465 |
| 149680 | CEFBS_None, // VBROADCASTF32X4rmkz = 5466 |
| 149681 | CEFBS_None, // VBROADCASTF32X8rm = 5467 |
| 149682 | CEFBS_None, // VBROADCASTF32X8rmk = 5468 |
| 149683 | CEFBS_None, // VBROADCASTF32X8rmkz = 5469 |
| 149684 | CEFBS_None, // VBROADCASTF64X2Z128rm = 5470 |
| 149685 | CEFBS_None, // VBROADCASTF64X2Z128rmk = 5471 |
| 149686 | CEFBS_None, // VBROADCASTF64X2Z128rmkz = 5472 |
| 149687 | CEFBS_None, // VBROADCASTF64X2rm = 5473 |
| 149688 | CEFBS_None, // VBROADCASTF64X2rmk = 5474 |
| 149689 | CEFBS_None, // VBROADCASTF64X2rmkz = 5475 |
| 149690 | CEFBS_None, // VBROADCASTF64X4rm = 5476 |
| 149691 | CEFBS_None, // VBROADCASTF64X4rmk = 5477 |
| 149692 | CEFBS_None, // VBROADCASTF64X4rmkz = 5478 |
| 149693 | CEFBS_None, // VBROADCASTI128rm = 5479 |
| 149694 | CEFBS_None, // VBROADCASTI32X2Z128rm = 5480 |
| 149695 | CEFBS_None, // VBROADCASTI32X2Z128rmk = 5481 |
| 149696 | CEFBS_None, // VBROADCASTI32X2Z128rmkz = 5482 |
| 149697 | CEFBS_None, // VBROADCASTI32X2Z128rr = 5483 |
| 149698 | CEFBS_None, // VBROADCASTI32X2Z128rrk = 5484 |
| 149699 | CEFBS_None, // VBROADCASTI32X2Z128rrkz = 5485 |
| 149700 | CEFBS_None, // VBROADCASTI32X2Z256rm = 5486 |
| 149701 | CEFBS_None, // VBROADCASTI32X2Z256rmk = 5487 |
| 149702 | CEFBS_None, // VBROADCASTI32X2Z256rmkz = 5488 |
| 149703 | CEFBS_None, // VBROADCASTI32X2Z256rr = 5489 |
| 149704 | CEFBS_None, // VBROADCASTI32X2Z256rrk = 5490 |
| 149705 | CEFBS_None, // VBROADCASTI32X2Z256rrkz = 5491 |
| 149706 | CEFBS_None, // VBROADCASTI32X2Zrm = 5492 |
| 149707 | CEFBS_None, // VBROADCASTI32X2Zrmk = 5493 |
| 149708 | CEFBS_None, // VBROADCASTI32X2Zrmkz = 5494 |
| 149709 | CEFBS_None, // VBROADCASTI32X2Zrr = 5495 |
| 149710 | CEFBS_None, // VBROADCASTI32X2Zrrk = 5496 |
| 149711 | CEFBS_None, // VBROADCASTI32X2Zrrkz = 5497 |
| 149712 | CEFBS_None, // VBROADCASTI32X4Z256rm = 5498 |
| 149713 | CEFBS_None, // VBROADCASTI32X4Z256rmk = 5499 |
| 149714 | CEFBS_None, // VBROADCASTI32X4Z256rmkz = 5500 |
| 149715 | CEFBS_None, // VBROADCASTI32X4rm = 5501 |
| 149716 | CEFBS_None, // VBROADCASTI32X4rmk = 5502 |
| 149717 | CEFBS_None, // VBROADCASTI32X4rmkz = 5503 |
| 149718 | CEFBS_None, // VBROADCASTI32X8rm = 5504 |
| 149719 | CEFBS_None, // VBROADCASTI32X8rmk = 5505 |
| 149720 | CEFBS_None, // VBROADCASTI32X8rmkz = 5506 |
| 149721 | CEFBS_None, // VBROADCASTI64X2Z128rm = 5507 |
| 149722 | CEFBS_None, // VBROADCASTI64X2Z128rmk = 5508 |
| 149723 | CEFBS_None, // VBROADCASTI64X2Z128rmkz = 5509 |
| 149724 | CEFBS_None, // VBROADCASTI64X2rm = 5510 |
| 149725 | CEFBS_None, // VBROADCASTI64X2rmk = 5511 |
| 149726 | CEFBS_None, // VBROADCASTI64X2rmkz = 5512 |
| 149727 | CEFBS_None, // VBROADCASTI64X4rm = 5513 |
| 149728 | CEFBS_None, // VBROADCASTI64X4rmk = 5514 |
| 149729 | CEFBS_None, // VBROADCASTI64X4rmkz = 5515 |
| 149730 | CEFBS_None, // VBROADCASTSDYrm = 5516 |
| 149731 | CEFBS_None, // VBROADCASTSDYrr = 5517 |
| 149732 | CEFBS_None, // VBROADCASTSDZ256rm = 5518 |
| 149733 | CEFBS_None, // VBROADCASTSDZ256rmk = 5519 |
| 149734 | CEFBS_None, // VBROADCASTSDZ256rmkz = 5520 |
| 149735 | CEFBS_None, // VBROADCASTSDZ256rr = 5521 |
| 149736 | CEFBS_None, // VBROADCASTSDZ256rrk = 5522 |
| 149737 | CEFBS_None, // VBROADCASTSDZ256rrkz = 5523 |
| 149738 | CEFBS_None, // VBROADCASTSDZrm = 5524 |
| 149739 | CEFBS_None, // VBROADCASTSDZrmk = 5525 |
| 149740 | CEFBS_None, // VBROADCASTSDZrmkz = 5526 |
| 149741 | CEFBS_None, // VBROADCASTSDZrr = 5527 |
| 149742 | CEFBS_None, // VBROADCASTSDZrrk = 5528 |
| 149743 | CEFBS_None, // VBROADCASTSDZrrkz = 5529 |
| 149744 | CEFBS_None, // VBROADCASTSSYrm = 5530 |
| 149745 | CEFBS_None, // VBROADCASTSSYrr = 5531 |
| 149746 | CEFBS_None, // VBROADCASTSSZ128rm = 5532 |
| 149747 | CEFBS_None, // VBROADCASTSSZ128rmk = 5533 |
| 149748 | CEFBS_None, // VBROADCASTSSZ128rmkz = 5534 |
| 149749 | CEFBS_None, // VBROADCASTSSZ128rr = 5535 |
| 149750 | CEFBS_None, // VBROADCASTSSZ128rrk = 5536 |
| 149751 | CEFBS_None, // VBROADCASTSSZ128rrkz = 5537 |
| 149752 | CEFBS_None, // VBROADCASTSSZ256rm = 5538 |
| 149753 | CEFBS_None, // VBROADCASTSSZ256rmk = 5539 |
| 149754 | CEFBS_None, // VBROADCASTSSZ256rmkz = 5540 |
| 149755 | CEFBS_None, // VBROADCASTSSZ256rr = 5541 |
| 149756 | CEFBS_None, // VBROADCASTSSZ256rrk = 5542 |
| 149757 | CEFBS_None, // VBROADCASTSSZ256rrkz = 5543 |
| 149758 | CEFBS_None, // VBROADCASTSSZrm = 5544 |
| 149759 | CEFBS_None, // VBROADCASTSSZrmk = 5545 |
| 149760 | CEFBS_None, // VBROADCASTSSZrmkz = 5546 |
| 149761 | CEFBS_None, // VBROADCASTSSZrr = 5547 |
| 149762 | CEFBS_None, // VBROADCASTSSZrrk = 5548 |
| 149763 | CEFBS_None, // VBROADCASTSSZrrkz = 5549 |
| 149764 | CEFBS_None, // VBROADCASTSSrm = 5550 |
| 149765 | CEFBS_None, // VBROADCASTSSrr = 5551 |
| 149766 | CEFBS_None, // VCMPPDYrmi = 5552 |
| 149767 | CEFBS_None, // VCMPPDYrri = 5553 |
| 149768 | CEFBS_None, // VCMPPDZ128rmbi = 5554 |
| 149769 | CEFBS_None, // VCMPPDZ128rmbik = 5555 |
| 149770 | CEFBS_None, // VCMPPDZ128rmi = 5556 |
| 149771 | CEFBS_None, // VCMPPDZ128rmik = 5557 |
| 149772 | CEFBS_None, // VCMPPDZ128rri = 5558 |
| 149773 | CEFBS_None, // VCMPPDZ128rrik = 5559 |
| 149774 | CEFBS_None, // VCMPPDZ256rmbi = 5560 |
| 149775 | CEFBS_None, // VCMPPDZ256rmbik = 5561 |
| 149776 | CEFBS_None, // VCMPPDZ256rmi = 5562 |
| 149777 | CEFBS_None, // VCMPPDZ256rmik = 5563 |
| 149778 | CEFBS_None, // VCMPPDZ256rri = 5564 |
| 149779 | CEFBS_None, // VCMPPDZ256rrik = 5565 |
| 149780 | CEFBS_None, // VCMPPDZrmbi = 5566 |
| 149781 | CEFBS_None, // VCMPPDZrmbik = 5567 |
| 149782 | CEFBS_None, // VCMPPDZrmi = 5568 |
| 149783 | CEFBS_None, // VCMPPDZrmik = 5569 |
| 149784 | CEFBS_None, // VCMPPDZrri = 5570 |
| 149785 | CEFBS_None, // VCMPPDZrrib = 5571 |
| 149786 | CEFBS_None, // VCMPPDZrribk = 5572 |
| 149787 | CEFBS_None, // VCMPPDZrrik = 5573 |
| 149788 | CEFBS_None, // VCMPPDrmi = 5574 |
| 149789 | CEFBS_None, // VCMPPDrri = 5575 |
| 149790 | CEFBS_None, // VCMPPHZ128rmbi = 5576 |
| 149791 | CEFBS_None, // VCMPPHZ128rmbik = 5577 |
| 149792 | CEFBS_None, // VCMPPHZ128rmi = 5578 |
| 149793 | CEFBS_None, // VCMPPHZ128rmik = 5579 |
| 149794 | CEFBS_None, // VCMPPHZ128rri = 5580 |
| 149795 | CEFBS_None, // VCMPPHZ128rrik = 5581 |
| 149796 | CEFBS_None, // VCMPPHZ256rmbi = 5582 |
| 149797 | CEFBS_None, // VCMPPHZ256rmbik = 5583 |
| 149798 | CEFBS_None, // VCMPPHZ256rmi = 5584 |
| 149799 | CEFBS_None, // VCMPPHZ256rmik = 5585 |
| 149800 | CEFBS_None, // VCMPPHZ256rri = 5586 |
| 149801 | CEFBS_None, // VCMPPHZ256rrik = 5587 |
| 149802 | CEFBS_None, // VCMPPHZrmbi = 5588 |
| 149803 | CEFBS_None, // VCMPPHZrmbik = 5589 |
| 149804 | CEFBS_None, // VCMPPHZrmi = 5590 |
| 149805 | CEFBS_None, // VCMPPHZrmik = 5591 |
| 149806 | CEFBS_None, // VCMPPHZrri = 5592 |
| 149807 | CEFBS_None, // VCMPPHZrrib = 5593 |
| 149808 | CEFBS_None, // VCMPPHZrribk = 5594 |
| 149809 | CEFBS_None, // VCMPPHZrrik = 5595 |
| 149810 | CEFBS_None, // VCMPPSYrmi = 5596 |
| 149811 | CEFBS_None, // VCMPPSYrri = 5597 |
| 149812 | CEFBS_None, // VCMPPSZ128rmbi = 5598 |
| 149813 | CEFBS_None, // VCMPPSZ128rmbik = 5599 |
| 149814 | CEFBS_None, // VCMPPSZ128rmi = 5600 |
| 149815 | CEFBS_None, // VCMPPSZ128rmik = 5601 |
| 149816 | CEFBS_None, // VCMPPSZ128rri = 5602 |
| 149817 | CEFBS_None, // VCMPPSZ128rrik = 5603 |
| 149818 | CEFBS_None, // VCMPPSZ256rmbi = 5604 |
| 149819 | CEFBS_None, // VCMPPSZ256rmbik = 5605 |
| 149820 | CEFBS_None, // VCMPPSZ256rmi = 5606 |
| 149821 | CEFBS_None, // VCMPPSZ256rmik = 5607 |
| 149822 | CEFBS_None, // VCMPPSZ256rri = 5608 |
| 149823 | CEFBS_None, // VCMPPSZ256rrik = 5609 |
| 149824 | CEFBS_None, // VCMPPSZrmbi = 5610 |
| 149825 | CEFBS_None, // VCMPPSZrmbik = 5611 |
| 149826 | CEFBS_None, // VCMPPSZrmi = 5612 |
| 149827 | CEFBS_None, // VCMPPSZrmik = 5613 |
| 149828 | CEFBS_None, // VCMPPSZrri = 5614 |
| 149829 | CEFBS_None, // VCMPPSZrrib = 5615 |
| 149830 | CEFBS_None, // VCMPPSZrribk = 5616 |
| 149831 | CEFBS_None, // VCMPPSZrrik = 5617 |
| 149832 | CEFBS_None, // VCMPPSrmi = 5618 |
| 149833 | CEFBS_None, // VCMPPSrri = 5619 |
| 149834 | CEFBS_None, // VCMPSDZrmi = 5620 |
| 149835 | CEFBS_None, // VCMPSDZrmi_Int = 5621 |
| 149836 | CEFBS_None, // VCMPSDZrmi_Intk = 5622 |
| 149837 | CEFBS_None, // VCMPSDZrri = 5623 |
| 149838 | CEFBS_None, // VCMPSDZrri_Int = 5624 |
| 149839 | CEFBS_None, // VCMPSDZrri_Intk = 5625 |
| 149840 | CEFBS_None, // VCMPSDZrrib_Int = 5626 |
| 149841 | CEFBS_None, // VCMPSDZrrib_Intk = 5627 |
| 149842 | CEFBS_None, // VCMPSDrmi = 5628 |
| 149843 | CEFBS_None, // VCMPSDrmi_Int = 5629 |
| 149844 | CEFBS_None, // VCMPSDrri = 5630 |
| 149845 | CEFBS_None, // VCMPSDrri_Int = 5631 |
| 149846 | CEFBS_None, // VCMPSHZrmi = 5632 |
| 149847 | CEFBS_None, // VCMPSHZrmi_Int = 5633 |
| 149848 | CEFBS_None, // VCMPSHZrmi_Intk = 5634 |
| 149849 | CEFBS_None, // VCMPSHZrri = 5635 |
| 149850 | CEFBS_None, // VCMPSHZrri_Int = 5636 |
| 149851 | CEFBS_None, // VCMPSHZrri_Intk = 5637 |
| 149852 | CEFBS_None, // VCMPSHZrrib_Int = 5638 |
| 149853 | CEFBS_None, // VCMPSHZrrib_Intk = 5639 |
| 149854 | CEFBS_None, // VCMPSSZrmi = 5640 |
| 149855 | CEFBS_None, // VCMPSSZrmi_Int = 5641 |
| 149856 | CEFBS_None, // VCMPSSZrmi_Intk = 5642 |
| 149857 | CEFBS_None, // VCMPSSZrri = 5643 |
| 149858 | CEFBS_None, // VCMPSSZrri_Int = 5644 |
| 149859 | CEFBS_None, // VCMPSSZrri_Intk = 5645 |
| 149860 | CEFBS_None, // VCMPSSZrrib_Int = 5646 |
| 149861 | CEFBS_None, // VCMPSSZrrib_Intk = 5647 |
| 149862 | CEFBS_None, // VCMPSSrmi = 5648 |
| 149863 | CEFBS_None, // VCMPSSrmi_Int = 5649 |
| 149864 | CEFBS_None, // VCMPSSrri = 5650 |
| 149865 | CEFBS_None, // VCMPSSrri_Int = 5651 |
| 149866 | CEFBS_None, // VCOMISDZrm = 5652 |
| 149867 | CEFBS_None, // VCOMISDZrm_Int = 5653 |
| 149868 | CEFBS_None, // VCOMISDZrr = 5654 |
| 149869 | CEFBS_None, // VCOMISDZrr_Int = 5655 |
| 149870 | CEFBS_None, // VCOMISDZrrb = 5656 |
| 149871 | CEFBS_None, // VCOMISDrm = 5657 |
| 149872 | CEFBS_None, // VCOMISDrm_Int = 5658 |
| 149873 | CEFBS_None, // VCOMISDrr = 5659 |
| 149874 | CEFBS_None, // VCOMISDrr_Int = 5660 |
| 149875 | CEFBS_None, // VCOMISHZrm = 5661 |
| 149876 | CEFBS_None, // VCOMISHZrm_Int = 5662 |
| 149877 | CEFBS_None, // VCOMISHZrr = 5663 |
| 149878 | CEFBS_None, // VCOMISHZrr_Int = 5664 |
| 149879 | CEFBS_None, // VCOMISHZrrb = 5665 |
| 149880 | CEFBS_None, // VCOMISSZrm = 5666 |
| 149881 | CEFBS_None, // VCOMISSZrm_Int = 5667 |
| 149882 | CEFBS_None, // VCOMISSZrr = 5668 |
| 149883 | CEFBS_None, // VCOMISSZrr_Int = 5669 |
| 149884 | CEFBS_None, // VCOMISSZrrb = 5670 |
| 149885 | CEFBS_None, // VCOMISSrm = 5671 |
| 149886 | CEFBS_None, // VCOMISSrm_Int = 5672 |
| 149887 | CEFBS_None, // VCOMISSrr = 5673 |
| 149888 | CEFBS_None, // VCOMISSrr_Int = 5674 |
| 149889 | CEFBS_None, // VCOMPRESSPDZ128mr = 5675 |
| 149890 | CEFBS_None, // VCOMPRESSPDZ128mrk = 5676 |
| 149891 | CEFBS_None, // VCOMPRESSPDZ128rr = 5677 |
| 149892 | CEFBS_None, // VCOMPRESSPDZ128rrk = 5678 |
| 149893 | CEFBS_None, // VCOMPRESSPDZ128rrkz = 5679 |
| 149894 | CEFBS_None, // VCOMPRESSPDZ256mr = 5680 |
| 149895 | CEFBS_None, // VCOMPRESSPDZ256mrk = 5681 |
| 149896 | CEFBS_None, // VCOMPRESSPDZ256rr = 5682 |
| 149897 | CEFBS_None, // VCOMPRESSPDZ256rrk = 5683 |
| 149898 | CEFBS_None, // VCOMPRESSPDZ256rrkz = 5684 |
| 149899 | CEFBS_None, // VCOMPRESSPDZmr = 5685 |
| 149900 | CEFBS_None, // VCOMPRESSPDZmrk = 5686 |
| 149901 | CEFBS_None, // VCOMPRESSPDZrr = 5687 |
| 149902 | CEFBS_None, // VCOMPRESSPDZrrk = 5688 |
| 149903 | CEFBS_None, // VCOMPRESSPDZrrkz = 5689 |
| 149904 | CEFBS_None, // VCOMPRESSPSZ128mr = 5690 |
| 149905 | CEFBS_None, // VCOMPRESSPSZ128mrk = 5691 |
| 149906 | CEFBS_None, // VCOMPRESSPSZ128rr = 5692 |
| 149907 | CEFBS_None, // VCOMPRESSPSZ128rrk = 5693 |
| 149908 | CEFBS_None, // VCOMPRESSPSZ128rrkz = 5694 |
| 149909 | CEFBS_None, // VCOMPRESSPSZ256mr = 5695 |
| 149910 | CEFBS_None, // VCOMPRESSPSZ256mrk = 5696 |
| 149911 | CEFBS_None, // VCOMPRESSPSZ256rr = 5697 |
| 149912 | CEFBS_None, // VCOMPRESSPSZ256rrk = 5698 |
| 149913 | CEFBS_None, // VCOMPRESSPSZ256rrkz = 5699 |
| 149914 | CEFBS_None, // VCOMPRESSPSZmr = 5700 |
| 149915 | CEFBS_None, // VCOMPRESSPSZmrk = 5701 |
| 149916 | CEFBS_None, // VCOMPRESSPSZrr = 5702 |
| 149917 | CEFBS_None, // VCOMPRESSPSZrrk = 5703 |
| 149918 | CEFBS_None, // VCOMPRESSPSZrrkz = 5704 |
| 149919 | CEFBS_None, // VCVTDQ2PDYrm = 5705 |
| 149920 | CEFBS_None, // VCVTDQ2PDYrr = 5706 |
| 149921 | CEFBS_None, // VCVTDQ2PDZ128rm = 5707 |
| 149922 | CEFBS_None, // VCVTDQ2PDZ128rmb = 5708 |
| 149923 | CEFBS_None, // VCVTDQ2PDZ128rmbk = 5709 |
| 149924 | CEFBS_None, // VCVTDQ2PDZ128rmbkz = 5710 |
| 149925 | CEFBS_None, // VCVTDQ2PDZ128rmk = 5711 |
| 149926 | CEFBS_None, // VCVTDQ2PDZ128rmkz = 5712 |
| 149927 | CEFBS_None, // VCVTDQ2PDZ128rr = 5713 |
| 149928 | CEFBS_None, // VCVTDQ2PDZ128rrk = 5714 |
| 149929 | CEFBS_None, // VCVTDQ2PDZ128rrkz = 5715 |
| 149930 | CEFBS_None, // VCVTDQ2PDZ256rm = 5716 |
| 149931 | CEFBS_None, // VCVTDQ2PDZ256rmb = 5717 |
| 149932 | CEFBS_None, // VCVTDQ2PDZ256rmbk = 5718 |
| 149933 | CEFBS_None, // VCVTDQ2PDZ256rmbkz = 5719 |
| 149934 | CEFBS_None, // VCVTDQ2PDZ256rmk = 5720 |
| 149935 | CEFBS_None, // VCVTDQ2PDZ256rmkz = 5721 |
| 149936 | CEFBS_None, // VCVTDQ2PDZ256rr = 5722 |
| 149937 | CEFBS_None, // VCVTDQ2PDZ256rrk = 5723 |
| 149938 | CEFBS_None, // VCVTDQ2PDZ256rrkz = 5724 |
| 149939 | CEFBS_None, // VCVTDQ2PDZrm = 5725 |
| 149940 | CEFBS_None, // VCVTDQ2PDZrmb = 5726 |
| 149941 | CEFBS_None, // VCVTDQ2PDZrmbk = 5727 |
| 149942 | CEFBS_None, // VCVTDQ2PDZrmbkz = 5728 |
| 149943 | CEFBS_None, // VCVTDQ2PDZrmk = 5729 |
| 149944 | CEFBS_None, // VCVTDQ2PDZrmkz = 5730 |
| 149945 | CEFBS_None, // VCVTDQ2PDZrr = 5731 |
| 149946 | CEFBS_None, // VCVTDQ2PDZrrk = 5732 |
| 149947 | CEFBS_None, // VCVTDQ2PDZrrkz = 5733 |
| 149948 | CEFBS_None, // VCVTDQ2PDrm = 5734 |
| 149949 | CEFBS_None, // VCVTDQ2PDrr = 5735 |
| 149950 | CEFBS_None, // VCVTDQ2PHZ128rm = 5736 |
| 149951 | CEFBS_None, // VCVTDQ2PHZ128rmb = 5737 |
| 149952 | CEFBS_None, // VCVTDQ2PHZ128rmbk = 5738 |
| 149953 | CEFBS_None, // VCVTDQ2PHZ128rmbkz = 5739 |
| 149954 | CEFBS_None, // VCVTDQ2PHZ128rmk = 5740 |
| 149955 | CEFBS_None, // VCVTDQ2PHZ128rmkz = 5741 |
| 149956 | CEFBS_None, // VCVTDQ2PHZ128rr = 5742 |
| 149957 | CEFBS_None, // VCVTDQ2PHZ128rrk = 5743 |
| 149958 | CEFBS_None, // VCVTDQ2PHZ128rrkz = 5744 |
| 149959 | CEFBS_None, // VCVTDQ2PHZ256rm = 5745 |
| 149960 | CEFBS_None, // VCVTDQ2PHZ256rmb = 5746 |
| 149961 | CEFBS_None, // VCVTDQ2PHZ256rmbk = 5747 |
| 149962 | CEFBS_None, // VCVTDQ2PHZ256rmbkz = 5748 |
| 149963 | CEFBS_None, // VCVTDQ2PHZ256rmk = 5749 |
| 149964 | CEFBS_None, // VCVTDQ2PHZ256rmkz = 5750 |
| 149965 | CEFBS_None, // VCVTDQ2PHZ256rr = 5751 |
| 149966 | CEFBS_None, // VCVTDQ2PHZ256rrk = 5752 |
| 149967 | CEFBS_None, // VCVTDQ2PHZ256rrkz = 5753 |
| 149968 | CEFBS_None, // VCVTDQ2PHZrm = 5754 |
| 149969 | CEFBS_None, // VCVTDQ2PHZrmb = 5755 |
| 149970 | CEFBS_None, // VCVTDQ2PHZrmbk = 5756 |
| 149971 | CEFBS_None, // VCVTDQ2PHZrmbkz = 5757 |
| 149972 | CEFBS_None, // VCVTDQ2PHZrmk = 5758 |
| 149973 | CEFBS_None, // VCVTDQ2PHZrmkz = 5759 |
| 149974 | CEFBS_None, // VCVTDQ2PHZrr = 5760 |
| 149975 | CEFBS_None, // VCVTDQ2PHZrrb = 5761 |
| 149976 | CEFBS_None, // VCVTDQ2PHZrrbk = 5762 |
| 149977 | CEFBS_None, // VCVTDQ2PHZrrbkz = 5763 |
| 149978 | CEFBS_None, // VCVTDQ2PHZrrk = 5764 |
| 149979 | CEFBS_None, // VCVTDQ2PHZrrkz = 5765 |
| 149980 | CEFBS_None, // VCVTDQ2PSYrm = 5766 |
| 149981 | CEFBS_None, // VCVTDQ2PSYrr = 5767 |
| 149982 | CEFBS_None, // VCVTDQ2PSZ128rm = 5768 |
| 149983 | CEFBS_None, // VCVTDQ2PSZ128rmb = 5769 |
| 149984 | CEFBS_None, // VCVTDQ2PSZ128rmbk = 5770 |
| 149985 | CEFBS_None, // VCVTDQ2PSZ128rmbkz = 5771 |
| 149986 | CEFBS_None, // VCVTDQ2PSZ128rmk = 5772 |
| 149987 | CEFBS_None, // VCVTDQ2PSZ128rmkz = 5773 |
| 149988 | CEFBS_None, // VCVTDQ2PSZ128rr = 5774 |
| 149989 | CEFBS_None, // VCVTDQ2PSZ128rrk = 5775 |
| 149990 | CEFBS_None, // VCVTDQ2PSZ128rrkz = 5776 |
| 149991 | CEFBS_None, // VCVTDQ2PSZ256rm = 5777 |
| 149992 | CEFBS_None, // VCVTDQ2PSZ256rmb = 5778 |
| 149993 | CEFBS_None, // VCVTDQ2PSZ256rmbk = 5779 |
| 149994 | CEFBS_None, // VCVTDQ2PSZ256rmbkz = 5780 |
| 149995 | CEFBS_None, // VCVTDQ2PSZ256rmk = 5781 |
| 149996 | CEFBS_None, // VCVTDQ2PSZ256rmkz = 5782 |
| 149997 | CEFBS_None, // VCVTDQ2PSZ256rr = 5783 |
| 149998 | CEFBS_None, // VCVTDQ2PSZ256rrk = 5784 |
| 149999 | CEFBS_None, // VCVTDQ2PSZ256rrkz = 5785 |
| 150000 | CEFBS_None, // VCVTDQ2PSZrm = 5786 |
| 150001 | CEFBS_None, // VCVTDQ2PSZrmb = 5787 |
| 150002 | CEFBS_None, // VCVTDQ2PSZrmbk = 5788 |
| 150003 | CEFBS_None, // VCVTDQ2PSZrmbkz = 5789 |
| 150004 | CEFBS_None, // VCVTDQ2PSZrmk = 5790 |
| 150005 | CEFBS_None, // VCVTDQ2PSZrmkz = 5791 |
| 150006 | CEFBS_None, // VCVTDQ2PSZrr = 5792 |
| 150007 | CEFBS_None, // VCVTDQ2PSZrrb = 5793 |
| 150008 | CEFBS_None, // VCVTDQ2PSZrrbk = 5794 |
| 150009 | CEFBS_None, // VCVTDQ2PSZrrbkz = 5795 |
| 150010 | CEFBS_None, // VCVTDQ2PSZrrk = 5796 |
| 150011 | CEFBS_None, // VCVTDQ2PSZrrkz = 5797 |
| 150012 | CEFBS_None, // VCVTDQ2PSrm = 5798 |
| 150013 | CEFBS_None, // VCVTDQ2PSrr = 5799 |
| 150014 | CEFBS_None, // VCVTNE2PS2BF16Z128rm = 5800 |
| 150015 | CEFBS_None, // VCVTNE2PS2BF16Z128rmb = 5801 |
| 150016 | CEFBS_None, // VCVTNE2PS2BF16Z128rmbk = 5802 |
| 150017 | CEFBS_None, // VCVTNE2PS2BF16Z128rmbkz = 5803 |
| 150018 | CEFBS_None, // VCVTNE2PS2BF16Z128rmk = 5804 |
| 150019 | CEFBS_None, // VCVTNE2PS2BF16Z128rmkz = 5805 |
| 150020 | CEFBS_None, // VCVTNE2PS2BF16Z128rr = 5806 |
| 150021 | CEFBS_None, // VCVTNE2PS2BF16Z128rrk = 5807 |
| 150022 | CEFBS_None, // VCVTNE2PS2BF16Z128rrkz = 5808 |
| 150023 | CEFBS_None, // VCVTNE2PS2BF16Z256rm = 5809 |
| 150024 | CEFBS_None, // VCVTNE2PS2BF16Z256rmb = 5810 |
| 150025 | CEFBS_None, // VCVTNE2PS2BF16Z256rmbk = 5811 |
| 150026 | CEFBS_None, // VCVTNE2PS2BF16Z256rmbkz = 5812 |
| 150027 | CEFBS_None, // VCVTNE2PS2BF16Z256rmk = 5813 |
| 150028 | CEFBS_None, // VCVTNE2PS2BF16Z256rmkz = 5814 |
| 150029 | CEFBS_None, // VCVTNE2PS2BF16Z256rr = 5815 |
| 150030 | CEFBS_None, // VCVTNE2PS2BF16Z256rrk = 5816 |
| 150031 | CEFBS_None, // VCVTNE2PS2BF16Z256rrkz = 5817 |
| 150032 | CEFBS_None, // VCVTNE2PS2BF16Zrm = 5818 |
| 150033 | CEFBS_None, // VCVTNE2PS2BF16Zrmb = 5819 |
| 150034 | CEFBS_None, // VCVTNE2PS2BF16Zrmbk = 5820 |
| 150035 | CEFBS_None, // VCVTNE2PS2BF16Zrmbkz = 5821 |
| 150036 | CEFBS_None, // VCVTNE2PS2BF16Zrmk = 5822 |
| 150037 | CEFBS_None, // VCVTNE2PS2BF16Zrmkz = 5823 |
| 150038 | CEFBS_None, // VCVTNE2PS2BF16Zrr = 5824 |
| 150039 | CEFBS_None, // VCVTNE2PS2BF16Zrrk = 5825 |
| 150040 | CEFBS_None, // VCVTNE2PS2BF16Zrrkz = 5826 |
| 150041 | CEFBS_None, // VCVTNEEBF162PSYrm = 5827 |
| 150042 | CEFBS_None, // VCVTNEEBF162PSrm = 5828 |
| 150043 | CEFBS_None, // VCVTNEEPH2PSYrm = 5829 |
| 150044 | CEFBS_None, // VCVTNEEPH2PSrm = 5830 |
| 150045 | CEFBS_None, // VCVTNEOBF162PSYrm = 5831 |
| 150046 | CEFBS_None, // VCVTNEOBF162PSrm = 5832 |
| 150047 | CEFBS_None, // VCVTNEOPH2PSYrm = 5833 |
| 150048 | CEFBS_None, // VCVTNEOPH2PSrm = 5834 |
| 150049 | CEFBS_None, // VCVTNEPS2BF16Yrm = 5835 |
| 150050 | CEFBS_None, // VCVTNEPS2BF16Yrr = 5836 |
| 150051 | CEFBS_None, // VCVTNEPS2BF16Z128rm = 5837 |
| 150052 | CEFBS_None, // VCVTNEPS2BF16Z128rmb = 5838 |
| 150053 | CEFBS_None, // VCVTNEPS2BF16Z128rmbk = 5839 |
| 150054 | CEFBS_None, // VCVTNEPS2BF16Z128rmbkz = 5840 |
| 150055 | CEFBS_None, // VCVTNEPS2BF16Z128rmk = 5841 |
| 150056 | CEFBS_None, // VCVTNEPS2BF16Z128rmkz = 5842 |
| 150057 | CEFBS_None, // VCVTNEPS2BF16Z128rr = 5843 |
| 150058 | CEFBS_None, // VCVTNEPS2BF16Z128rrk = 5844 |
| 150059 | CEFBS_None, // VCVTNEPS2BF16Z128rrkz = 5845 |
| 150060 | CEFBS_None, // VCVTNEPS2BF16Z256rm = 5846 |
| 150061 | CEFBS_None, // VCVTNEPS2BF16Z256rmb = 5847 |
| 150062 | CEFBS_None, // VCVTNEPS2BF16Z256rmbk = 5848 |
| 150063 | CEFBS_None, // VCVTNEPS2BF16Z256rmbkz = 5849 |
| 150064 | CEFBS_None, // VCVTNEPS2BF16Z256rmk = 5850 |
| 150065 | CEFBS_None, // VCVTNEPS2BF16Z256rmkz = 5851 |
| 150066 | CEFBS_None, // VCVTNEPS2BF16Z256rr = 5852 |
| 150067 | CEFBS_None, // VCVTNEPS2BF16Z256rrk = 5853 |
| 150068 | CEFBS_None, // VCVTNEPS2BF16Z256rrkz = 5854 |
| 150069 | CEFBS_None, // VCVTNEPS2BF16Zrm = 5855 |
| 150070 | CEFBS_None, // VCVTNEPS2BF16Zrmb = 5856 |
| 150071 | CEFBS_None, // VCVTNEPS2BF16Zrmbk = 5857 |
| 150072 | CEFBS_None, // VCVTNEPS2BF16Zrmbkz = 5858 |
| 150073 | CEFBS_None, // VCVTNEPS2BF16Zrmk = 5859 |
| 150074 | CEFBS_None, // VCVTNEPS2BF16Zrmkz = 5860 |
| 150075 | CEFBS_None, // VCVTNEPS2BF16Zrr = 5861 |
| 150076 | CEFBS_None, // VCVTNEPS2BF16Zrrk = 5862 |
| 150077 | CEFBS_None, // VCVTNEPS2BF16Zrrkz = 5863 |
| 150078 | CEFBS_None, // VCVTNEPS2BF16rm = 5864 |
| 150079 | CEFBS_None, // VCVTNEPS2BF16rr = 5865 |
| 150080 | CEFBS_None, // VCVTPD2DQYrm = 5866 |
| 150081 | CEFBS_None, // VCVTPD2DQYrr = 5867 |
| 150082 | CEFBS_None, // VCVTPD2DQZ128rm = 5868 |
| 150083 | CEFBS_None, // VCVTPD2DQZ128rmb = 5869 |
| 150084 | CEFBS_None, // VCVTPD2DQZ128rmbk = 5870 |
| 150085 | CEFBS_None, // VCVTPD2DQZ128rmbkz = 5871 |
| 150086 | CEFBS_None, // VCVTPD2DQZ128rmk = 5872 |
| 150087 | CEFBS_None, // VCVTPD2DQZ128rmkz = 5873 |
| 150088 | CEFBS_None, // VCVTPD2DQZ128rr = 5874 |
| 150089 | CEFBS_None, // VCVTPD2DQZ128rrk = 5875 |
| 150090 | CEFBS_None, // VCVTPD2DQZ128rrkz = 5876 |
| 150091 | CEFBS_None, // VCVTPD2DQZ256rm = 5877 |
| 150092 | CEFBS_None, // VCVTPD2DQZ256rmb = 5878 |
| 150093 | CEFBS_None, // VCVTPD2DQZ256rmbk = 5879 |
| 150094 | CEFBS_None, // VCVTPD2DQZ256rmbkz = 5880 |
| 150095 | CEFBS_None, // VCVTPD2DQZ256rmk = 5881 |
| 150096 | CEFBS_None, // VCVTPD2DQZ256rmkz = 5882 |
| 150097 | CEFBS_None, // VCVTPD2DQZ256rr = 5883 |
| 150098 | CEFBS_None, // VCVTPD2DQZ256rrk = 5884 |
| 150099 | CEFBS_None, // VCVTPD2DQZ256rrkz = 5885 |
| 150100 | CEFBS_None, // VCVTPD2DQZrm = 5886 |
| 150101 | CEFBS_None, // VCVTPD2DQZrmb = 5887 |
| 150102 | CEFBS_None, // VCVTPD2DQZrmbk = 5888 |
| 150103 | CEFBS_None, // VCVTPD2DQZrmbkz = 5889 |
| 150104 | CEFBS_None, // VCVTPD2DQZrmk = 5890 |
| 150105 | CEFBS_None, // VCVTPD2DQZrmkz = 5891 |
| 150106 | CEFBS_None, // VCVTPD2DQZrr = 5892 |
| 150107 | CEFBS_None, // VCVTPD2DQZrrb = 5893 |
| 150108 | CEFBS_None, // VCVTPD2DQZrrbk = 5894 |
| 150109 | CEFBS_None, // VCVTPD2DQZrrbkz = 5895 |
| 150110 | CEFBS_None, // VCVTPD2DQZrrk = 5896 |
| 150111 | CEFBS_None, // VCVTPD2DQZrrkz = 5897 |
| 150112 | CEFBS_None, // VCVTPD2DQrm = 5898 |
| 150113 | CEFBS_None, // VCVTPD2DQrr = 5899 |
| 150114 | CEFBS_None, // VCVTPD2PHZ128rm = 5900 |
| 150115 | CEFBS_None, // VCVTPD2PHZ128rmb = 5901 |
| 150116 | CEFBS_None, // VCVTPD2PHZ128rmbk = 5902 |
| 150117 | CEFBS_None, // VCVTPD2PHZ128rmbkz = 5903 |
| 150118 | CEFBS_None, // VCVTPD2PHZ128rmk = 5904 |
| 150119 | CEFBS_None, // VCVTPD2PHZ128rmkz = 5905 |
| 150120 | CEFBS_None, // VCVTPD2PHZ128rr = 5906 |
| 150121 | CEFBS_None, // VCVTPD2PHZ128rrk = 5907 |
| 150122 | CEFBS_None, // VCVTPD2PHZ128rrkz = 5908 |
| 150123 | CEFBS_None, // VCVTPD2PHZ256rm = 5909 |
| 150124 | CEFBS_None, // VCVTPD2PHZ256rmb = 5910 |
| 150125 | CEFBS_None, // VCVTPD2PHZ256rmbk = 5911 |
| 150126 | CEFBS_None, // VCVTPD2PHZ256rmbkz = 5912 |
| 150127 | CEFBS_None, // VCVTPD2PHZ256rmk = 5913 |
| 150128 | CEFBS_None, // VCVTPD2PHZ256rmkz = 5914 |
| 150129 | CEFBS_None, // VCVTPD2PHZ256rr = 5915 |
| 150130 | CEFBS_None, // VCVTPD2PHZ256rrk = 5916 |
| 150131 | CEFBS_None, // VCVTPD2PHZ256rrkz = 5917 |
| 150132 | CEFBS_None, // VCVTPD2PHZrm = 5918 |
| 150133 | CEFBS_None, // VCVTPD2PHZrmb = 5919 |
| 150134 | CEFBS_None, // VCVTPD2PHZrmbk = 5920 |
| 150135 | CEFBS_None, // VCVTPD2PHZrmbkz = 5921 |
| 150136 | CEFBS_None, // VCVTPD2PHZrmk = 5922 |
| 150137 | CEFBS_None, // VCVTPD2PHZrmkz = 5923 |
| 150138 | CEFBS_None, // VCVTPD2PHZrr = 5924 |
| 150139 | CEFBS_None, // VCVTPD2PHZrrb = 5925 |
| 150140 | CEFBS_None, // VCVTPD2PHZrrbk = 5926 |
| 150141 | CEFBS_None, // VCVTPD2PHZrrbkz = 5927 |
| 150142 | CEFBS_None, // VCVTPD2PHZrrk = 5928 |
| 150143 | CEFBS_None, // VCVTPD2PHZrrkz = 5929 |
| 150144 | CEFBS_None, // VCVTPD2PSYrm = 5930 |
| 150145 | CEFBS_None, // VCVTPD2PSYrr = 5931 |
| 150146 | CEFBS_None, // VCVTPD2PSZ128rm = 5932 |
| 150147 | CEFBS_None, // VCVTPD2PSZ128rmb = 5933 |
| 150148 | CEFBS_None, // VCVTPD2PSZ128rmbk = 5934 |
| 150149 | CEFBS_None, // VCVTPD2PSZ128rmbkz = 5935 |
| 150150 | CEFBS_None, // VCVTPD2PSZ128rmk = 5936 |
| 150151 | CEFBS_None, // VCVTPD2PSZ128rmkz = 5937 |
| 150152 | CEFBS_None, // VCVTPD2PSZ128rr = 5938 |
| 150153 | CEFBS_None, // VCVTPD2PSZ128rrk = 5939 |
| 150154 | CEFBS_None, // VCVTPD2PSZ128rrkz = 5940 |
| 150155 | CEFBS_None, // VCVTPD2PSZ256rm = 5941 |
| 150156 | CEFBS_None, // VCVTPD2PSZ256rmb = 5942 |
| 150157 | CEFBS_None, // VCVTPD2PSZ256rmbk = 5943 |
| 150158 | CEFBS_None, // VCVTPD2PSZ256rmbkz = 5944 |
| 150159 | CEFBS_None, // VCVTPD2PSZ256rmk = 5945 |
| 150160 | CEFBS_None, // VCVTPD2PSZ256rmkz = 5946 |
| 150161 | CEFBS_None, // VCVTPD2PSZ256rr = 5947 |
| 150162 | CEFBS_None, // VCVTPD2PSZ256rrk = 5948 |
| 150163 | CEFBS_None, // VCVTPD2PSZ256rrkz = 5949 |
| 150164 | CEFBS_None, // VCVTPD2PSZrm = 5950 |
| 150165 | CEFBS_None, // VCVTPD2PSZrmb = 5951 |
| 150166 | CEFBS_None, // VCVTPD2PSZrmbk = 5952 |
| 150167 | CEFBS_None, // VCVTPD2PSZrmbkz = 5953 |
| 150168 | CEFBS_None, // VCVTPD2PSZrmk = 5954 |
| 150169 | CEFBS_None, // VCVTPD2PSZrmkz = 5955 |
| 150170 | CEFBS_None, // VCVTPD2PSZrr = 5956 |
| 150171 | CEFBS_None, // VCVTPD2PSZrrb = 5957 |
| 150172 | CEFBS_None, // VCVTPD2PSZrrbk = 5958 |
| 150173 | CEFBS_None, // VCVTPD2PSZrrbkz = 5959 |
| 150174 | CEFBS_None, // VCVTPD2PSZrrk = 5960 |
| 150175 | CEFBS_None, // VCVTPD2PSZrrkz = 5961 |
| 150176 | CEFBS_None, // VCVTPD2PSrm = 5962 |
| 150177 | CEFBS_None, // VCVTPD2PSrr = 5963 |
| 150178 | CEFBS_None, // VCVTPD2QQZ128rm = 5964 |
| 150179 | CEFBS_None, // VCVTPD2QQZ128rmb = 5965 |
| 150180 | CEFBS_None, // VCVTPD2QQZ128rmbk = 5966 |
| 150181 | CEFBS_None, // VCVTPD2QQZ128rmbkz = 5967 |
| 150182 | CEFBS_None, // VCVTPD2QQZ128rmk = 5968 |
| 150183 | CEFBS_None, // VCVTPD2QQZ128rmkz = 5969 |
| 150184 | CEFBS_None, // VCVTPD2QQZ128rr = 5970 |
| 150185 | CEFBS_None, // VCVTPD2QQZ128rrk = 5971 |
| 150186 | CEFBS_None, // VCVTPD2QQZ128rrkz = 5972 |
| 150187 | CEFBS_None, // VCVTPD2QQZ256rm = 5973 |
| 150188 | CEFBS_None, // VCVTPD2QQZ256rmb = 5974 |
| 150189 | CEFBS_None, // VCVTPD2QQZ256rmbk = 5975 |
| 150190 | CEFBS_None, // VCVTPD2QQZ256rmbkz = 5976 |
| 150191 | CEFBS_None, // VCVTPD2QQZ256rmk = 5977 |
| 150192 | CEFBS_None, // VCVTPD2QQZ256rmkz = 5978 |
| 150193 | CEFBS_None, // VCVTPD2QQZ256rr = 5979 |
| 150194 | CEFBS_None, // VCVTPD2QQZ256rrk = 5980 |
| 150195 | CEFBS_None, // VCVTPD2QQZ256rrkz = 5981 |
| 150196 | CEFBS_None, // VCVTPD2QQZrm = 5982 |
| 150197 | CEFBS_None, // VCVTPD2QQZrmb = 5983 |
| 150198 | CEFBS_None, // VCVTPD2QQZrmbk = 5984 |
| 150199 | CEFBS_None, // VCVTPD2QQZrmbkz = 5985 |
| 150200 | CEFBS_None, // VCVTPD2QQZrmk = 5986 |
| 150201 | CEFBS_None, // VCVTPD2QQZrmkz = 5987 |
| 150202 | CEFBS_None, // VCVTPD2QQZrr = 5988 |
| 150203 | CEFBS_None, // VCVTPD2QQZrrb = 5989 |
| 150204 | CEFBS_None, // VCVTPD2QQZrrbk = 5990 |
| 150205 | CEFBS_None, // VCVTPD2QQZrrbkz = 5991 |
| 150206 | CEFBS_None, // VCVTPD2QQZrrk = 5992 |
| 150207 | CEFBS_None, // VCVTPD2QQZrrkz = 5993 |
| 150208 | CEFBS_None, // VCVTPD2UDQZ128rm = 5994 |
| 150209 | CEFBS_None, // VCVTPD2UDQZ128rmb = 5995 |
| 150210 | CEFBS_None, // VCVTPD2UDQZ128rmbk = 5996 |
| 150211 | CEFBS_None, // VCVTPD2UDQZ128rmbkz = 5997 |
| 150212 | CEFBS_None, // VCVTPD2UDQZ128rmk = 5998 |
| 150213 | CEFBS_None, // VCVTPD2UDQZ128rmkz = 5999 |
| 150214 | CEFBS_None, // VCVTPD2UDQZ128rr = 6000 |
| 150215 | CEFBS_None, // VCVTPD2UDQZ128rrk = 6001 |
| 150216 | CEFBS_None, // VCVTPD2UDQZ128rrkz = 6002 |
| 150217 | CEFBS_None, // VCVTPD2UDQZ256rm = 6003 |
| 150218 | CEFBS_None, // VCVTPD2UDQZ256rmb = 6004 |
| 150219 | CEFBS_None, // VCVTPD2UDQZ256rmbk = 6005 |
| 150220 | CEFBS_None, // VCVTPD2UDQZ256rmbkz = 6006 |
| 150221 | CEFBS_None, // VCVTPD2UDQZ256rmk = 6007 |
| 150222 | CEFBS_None, // VCVTPD2UDQZ256rmkz = 6008 |
| 150223 | CEFBS_None, // VCVTPD2UDQZ256rr = 6009 |
| 150224 | CEFBS_None, // VCVTPD2UDQZ256rrk = 6010 |
| 150225 | CEFBS_None, // VCVTPD2UDQZ256rrkz = 6011 |
| 150226 | CEFBS_None, // VCVTPD2UDQZrm = 6012 |
| 150227 | CEFBS_None, // VCVTPD2UDQZrmb = 6013 |
| 150228 | CEFBS_None, // VCVTPD2UDQZrmbk = 6014 |
| 150229 | CEFBS_None, // VCVTPD2UDQZrmbkz = 6015 |
| 150230 | CEFBS_None, // VCVTPD2UDQZrmk = 6016 |
| 150231 | CEFBS_None, // VCVTPD2UDQZrmkz = 6017 |
| 150232 | CEFBS_None, // VCVTPD2UDQZrr = 6018 |
| 150233 | CEFBS_None, // VCVTPD2UDQZrrb = 6019 |
| 150234 | CEFBS_None, // VCVTPD2UDQZrrbk = 6020 |
| 150235 | CEFBS_None, // VCVTPD2UDQZrrbkz = 6021 |
| 150236 | CEFBS_None, // VCVTPD2UDQZrrk = 6022 |
| 150237 | CEFBS_None, // VCVTPD2UDQZrrkz = 6023 |
| 150238 | CEFBS_None, // VCVTPD2UQQZ128rm = 6024 |
| 150239 | CEFBS_None, // VCVTPD2UQQZ128rmb = 6025 |
| 150240 | CEFBS_None, // VCVTPD2UQQZ128rmbk = 6026 |
| 150241 | CEFBS_None, // VCVTPD2UQQZ128rmbkz = 6027 |
| 150242 | CEFBS_None, // VCVTPD2UQQZ128rmk = 6028 |
| 150243 | CEFBS_None, // VCVTPD2UQQZ128rmkz = 6029 |
| 150244 | CEFBS_None, // VCVTPD2UQQZ128rr = 6030 |
| 150245 | CEFBS_None, // VCVTPD2UQQZ128rrk = 6031 |
| 150246 | CEFBS_None, // VCVTPD2UQQZ128rrkz = 6032 |
| 150247 | CEFBS_None, // VCVTPD2UQQZ256rm = 6033 |
| 150248 | CEFBS_None, // VCVTPD2UQQZ256rmb = 6034 |
| 150249 | CEFBS_None, // VCVTPD2UQQZ256rmbk = 6035 |
| 150250 | CEFBS_None, // VCVTPD2UQQZ256rmbkz = 6036 |
| 150251 | CEFBS_None, // VCVTPD2UQQZ256rmk = 6037 |
| 150252 | CEFBS_None, // VCVTPD2UQQZ256rmkz = 6038 |
| 150253 | CEFBS_None, // VCVTPD2UQQZ256rr = 6039 |
| 150254 | CEFBS_None, // VCVTPD2UQQZ256rrk = 6040 |
| 150255 | CEFBS_None, // VCVTPD2UQQZ256rrkz = 6041 |
| 150256 | CEFBS_None, // VCVTPD2UQQZrm = 6042 |
| 150257 | CEFBS_None, // VCVTPD2UQQZrmb = 6043 |
| 150258 | CEFBS_None, // VCVTPD2UQQZrmbk = 6044 |
| 150259 | CEFBS_None, // VCVTPD2UQQZrmbkz = 6045 |
| 150260 | CEFBS_None, // VCVTPD2UQQZrmk = 6046 |
| 150261 | CEFBS_None, // VCVTPD2UQQZrmkz = 6047 |
| 150262 | CEFBS_None, // VCVTPD2UQQZrr = 6048 |
| 150263 | CEFBS_None, // VCVTPD2UQQZrrb = 6049 |
| 150264 | CEFBS_None, // VCVTPD2UQQZrrbk = 6050 |
| 150265 | CEFBS_None, // VCVTPD2UQQZrrbkz = 6051 |
| 150266 | CEFBS_None, // VCVTPD2UQQZrrk = 6052 |
| 150267 | CEFBS_None, // VCVTPD2UQQZrrkz = 6053 |
| 150268 | CEFBS_None, // VCVTPH2DQZ128rm = 6054 |
| 150269 | CEFBS_None, // VCVTPH2DQZ128rmb = 6055 |
| 150270 | CEFBS_None, // VCVTPH2DQZ128rmbk = 6056 |
| 150271 | CEFBS_None, // VCVTPH2DQZ128rmbkz = 6057 |
| 150272 | CEFBS_None, // VCVTPH2DQZ128rmk = 6058 |
| 150273 | CEFBS_None, // VCVTPH2DQZ128rmkz = 6059 |
| 150274 | CEFBS_None, // VCVTPH2DQZ128rr = 6060 |
| 150275 | CEFBS_None, // VCVTPH2DQZ128rrk = 6061 |
| 150276 | CEFBS_None, // VCVTPH2DQZ128rrkz = 6062 |
| 150277 | CEFBS_None, // VCVTPH2DQZ256rm = 6063 |
| 150278 | CEFBS_None, // VCVTPH2DQZ256rmb = 6064 |
| 150279 | CEFBS_None, // VCVTPH2DQZ256rmbk = 6065 |
| 150280 | CEFBS_None, // VCVTPH2DQZ256rmbkz = 6066 |
| 150281 | CEFBS_None, // VCVTPH2DQZ256rmk = 6067 |
| 150282 | CEFBS_None, // VCVTPH2DQZ256rmkz = 6068 |
| 150283 | CEFBS_None, // VCVTPH2DQZ256rr = 6069 |
| 150284 | CEFBS_None, // VCVTPH2DQZ256rrk = 6070 |
| 150285 | CEFBS_None, // VCVTPH2DQZ256rrkz = 6071 |
| 150286 | CEFBS_None, // VCVTPH2DQZrm = 6072 |
| 150287 | CEFBS_None, // VCVTPH2DQZrmb = 6073 |
| 150288 | CEFBS_None, // VCVTPH2DQZrmbk = 6074 |
| 150289 | CEFBS_None, // VCVTPH2DQZrmbkz = 6075 |
| 150290 | CEFBS_None, // VCVTPH2DQZrmk = 6076 |
| 150291 | CEFBS_None, // VCVTPH2DQZrmkz = 6077 |
| 150292 | CEFBS_None, // VCVTPH2DQZrr = 6078 |
| 150293 | CEFBS_None, // VCVTPH2DQZrrb = 6079 |
| 150294 | CEFBS_None, // VCVTPH2DQZrrbk = 6080 |
| 150295 | CEFBS_None, // VCVTPH2DQZrrbkz = 6081 |
| 150296 | CEFBS_None, // VCVTPH2DQZrrk = 6082 |
| 150297 | CEFBS_None, // VCVTPH2DQZrrkz = 6083 |
| 150298 | CEFBS_None, // VCVTPH2PDZ128rm = 6084 |
| 150299 | CEFBS_None, // VCVTPH2PDZ128rmb = 6085 |
| 150300 | CEFBS_None, // VCVTPH2PDZ128rmbk = 6086 |
| 150301 | CEFBS_None, // VCVTPH2PDZ128rmbkz = 6087 |
| 150302 | CEFBS_None, // VCVTPH2PDZ128rmk = 6088 |
| 150303 | CEFBS_None, // VCVTPH2PDZ128rmkz = 6089 |
| 150304 | CEFBS_None, // VCVTPH2PDZ128rr = 6090 |
| 150305 | CEFBS_None, // VCVTPH2PDZ128rrk = 6091 |
| 150306 | CEFBS_None, // VCVTPH2PDZ128rrkz = 6092 |
| 150307 | CEFBS_None, // VCVTPH2PDZ256rm = 6093 |
| 150308 | CEFBS_None, // VCVTPH2PDZ256rmb = 6094 |
| 150309 | CEFBS_None, // VCVTPH2PDZ256rmbk = 6095 |
| 150310 | CEFBS_None, // VCVTPH2PDZ256rmbkz = 6096 |
| 150311 | CEFBS_None, // VCVTPH2PDZ256rmk = 6097 |
| 150312 | CEFBS_None, // VCVTPH2PDZ256rmkz = 6098 |
| 150313 | CEFBS_None, // VCVTPH2PDZ256rr = 6099 |
| 150314 | CEFBS_None, // VCVTPH2PDZ256rrk = 6100 |
| 150315 | CEFBS_None, // VCVTPH2PDZ256rrkz = 6101 |
| 150316 | CEFBS_None, // VCVTPH2PDZrm = 6102 |
| 150317 | CEFBS_None, // VCVTPH2PDZrmb = 6103 |
| 150318 | CEFBS_None, // VCVTPH2PDZrmbk = 6104 |
| 150319 | CEFBS_None, // VCVTPH2PDZrmbkz = 6105 |
| 150320 | CEFBS_None, // VCVTPH2PDZrmk = 6106 |
| 150321 | CEFBS_None, // VCVTPH2PDZrmkz = 6107 |
| 150322 | CEFBS_None, // VCVTPH2PDZrr = 6108 |
| 150323 | CEFBS_None, // VCVTPH2PDZrrb = 6109 |
| 150324 | CEFBS_None, // VCVTPH2PDZrrbk = 6110 |
| 150325 | CEFBS_None, // VCVTPH2PDZrrbkz = 6111 |
| 150326 | CEFBS_None, // VCVTPH2PDZrrk = 6112 |
| 150327 | CEFBS_None, // VCVTPH2PDZrrkz = 6113 |
| 150328 | CEFBS_None, // VCVTPH2PSXZ128rm = 6114 |
| 150329 | CEFBS_None, // VCVTPH2PSXZ128rmb = 6115 |
| 150330 | CEFBS_None, // VCVTPH2PSXZ128rmbk = 6116 |
| 150331 | CEFBS_None, // VCVTPH2PSXZ128rmbkz = 6117 |
| 150332 | CEFBS_None, // VCVTPH2PSXZ128rmk = 6118 |
| 150333 | CEFBS_None, // VCVTPH2PSXZ128rmkz = 6119 |
| 150334 | CEFBS_None, // VCVTPH2PSXZ128rr = 6120 |
| 150335 | CEFBS_None, // VCVTPH2PSXZ128rrk = 6121 |
| 150336 | CEFBS_None, // VCVTPH2PSXZ128rrkz = 6122 |
| 150337 | CEFBS_None, // VCVTPH2PSXZ256rm = 6123 |
| 150338 | CEFBS_None, // VCVTPH2PSXZ256rmb = 6124 |
| 150339 | CEFBS_None, // VCVTPH2PSXZ256rmbk = 6125 |
| 150340 | CEFBS_None, // VCVTPH2PSXZ256rmbkz = 6126 |
| 150341 | CEFBS_None, // VCVTPH2PSXZ256rmk = 6127 |
| 150342 | CEFBS_None, // VCVTPH2PSXZ256rmkz = 6128 |
| 150343 | CEFBS_None, // VCVTPH2PSXZ256rr = 6129 |
| 150344 | CEFBS_None, // VCVTPH2PSXZ256rrk = 6130 |
| 150345 | CEFBS_None, // VCVTPH2PSXZ256rrkz = 6131 |
| 150346 | CEFBS_None, // VCVTPH2PSXZrm = 6132 |
| 150347 | CEFBS_None, // VCVTPH2PSXZrmb = 6133 |
| 150348 | CEFBS_None, // VCVTPH2PSXZrmbk = 6134 |
| 150349 | CEFBS_None, // VCVTPH2PSXZrmbkz = 6135 |
| 150350 | CEFBS_None, // VCVTPH2PSXZrmk = 6136 |
| 150351 | CEFBS_None, // VCVTPH2PSXZrmkz = 6137 |
| 150352 | CEFBS_None, // VCVTPH2PSXZrr = 6138 |
| 150353 | CEFBS_None, // VCVTPH2PSXZrrb = 6139 |
| 150354 | CEFBS_None, // VCVTPH2PSXZrrbk = 6140 |
| 150355 | CEFBS_None, // VCVTPH2PSXZrrbkz = 6141 |
| 150356 | CEFBS_None, // VCVTPH2PSXZrrk = 6142 |
| 150357 | CEFBS_None, // VCVTPH2PSXZrrkz = 6143 |
| 150358 | CEFBS_None, // VCVTPH2PSYrm = 6144 |
| 150359 | CEFBS_None, // VCVTPH2PSYrr = 6145 |
| 150360 | CEFBS_None, // VCVTPH2PSZ128rm = 6146 |
| 150361 | CEFBS_None, // VCVTPH2PSZ128rmk = 6147 |
| 150362 | CEFBS_None, // VCVTPH2PSZ128rmkz = 6148 |
| 150363 | CEFBS_None, // VCVTPH2PSZ128rr = 6149 |
| 150364 | CEFBS_None, // VCVTPH2PSZ128rrk = 6150 |
| 150365 | CEFBS_None, // VCVTPH2PSZ128rrkz = 6151 |
| 150366 | CEFBS_None, // VCVTPH2PSZ256rm = 6152 |
| 150367 | CEFBS_None, // VCVTPH2PSZ256rmk = 6153 |
| 150368 | CEFBS_None, // VCVTPH2PSZ256rmkz = 6154 |
| 150369 | CEFBS_None, // VCVTPH2PSZ256rr = 6155 |
| 150370 | CEFBS_None, // VCVTPH2PSZ256rrk = 6156 |
| 150371 | CEFBS_None, // VCVTPH2PSZ256rrkz = 6157 |
| 150372 | CEFBS_None, // VCVTPH2PSZrm = 6158 |
| 150373 | CEFBS_None, // VCVTPH2PSZrmk = 6159 |
| 150374 | CEFBS_None, // VCVTPH2PSZrmkz = 6160 |
| 150375 | CEFBS_None, // VCVTPH2PSZrr = 6161 |
| 150376 | CEFBS_None, // VCVTPH2PSZrrb = 6162 |
| 150377 | CEFBS_None, // VCVTPH2PSZrrbk = 6163 |
| 150378 | CEFBS_None, // VCVTPH2PSZrrbkz = 6164 |
| 150379 | CEFBS_None, // VCVTPH2PSZrrk = 6165 |
| 150380 | CEFBS_None, // VCVTPH2PSZrrkz = 6166 |
| 150381 | CEFBS_None, // VCVTPH2PSrm = 6167 |
| 150382 | CEFBS_None, // VCVTPH2PSrr = 6168 |
| 150383 | CEFBS_None, // VCVTPH2QQZ128rm = 6169 |
| 150384 | CEFBS_None, // VCVTPH2QQZ128rmb = 6170 |
| 150385 | CEFBS_None, // VCVTPH2QQZ128rmbk = 6171 |
| 150386 | CEFBS_None, // VCVTPH2QQZ128rmbkz = 6172 |
| 150387 | CEFBS_None, // VCVTPH2QQZ128rmk = 6173 |
| 150388 | CEFBS_None, // VCVTPH2QQZ128rmkz = 6174 |
| 150389 | CEFBS_None, // VCVTPH2QQZ128rr = 6175 |
| 150390 | CEFBS_None, // VCVTPH2QQZ128rrk = 6176 |
| 150391 | CEFBS_None, // VCVTPH2QQZ128rrkz = 6177 |
| 150392 | CEFBS_None, // VCVTPH2QQZ256rm = 6178 |
| 150393 | CEFBS_None, // VCVTPH2QQZ256rmb = 6179 |
| 150394 | CEFBS_None, // VCVTPH2QQZ256rmbk = 6180 |
| 150395 | CEFBS_None, // VCVTPH2QQZ256rmbkz = 6181 |
| 150396 | CEFBS_None, // VCVTPH2QQZ256rmk = 6182 |
| 150397 | CEFBS_None, // VCVTPH2QQZ256rmkz = 6183 |
| 150398 | CEFBS_None, // VCVTPH2QQZ256rr = 6184 |
| 150399 | CEFBS_None, // VCVTPH2QQZ256rrk = 6185 |
| 150400 | CEFBS_None, // VCVTPH2QQZ256rrkz = 6186 |
| 150401 | CEFBS_None, // VCVTPH2QQZrm = 6187 |
| 150402 | CEFBS_None, // VCVTPH2QQZrmb = 6188 |
| 150403 | CEFBS_None, // VCVTPH2QQZrmbk = 6189 |
| 150404 | CEFBS_None, // VCVTPH2QQZrmbkz = 6190 |
| 150405 | CEFBS_None, // VCVTPH2QQZrmk = 6191 |
| 150406 | CEFBS_None, // VCVTPH2QQZrmkz = 6192 |
| 150407 | CEFBS_None, // VCVTPH2QQZrr = 6193 |
| 150408 | CEFBS_None, // VCVTPH2QQZrrb = 6194 |
| 150409 | CEFBS_None, // VCVTPH2QQZrrbk = 6195 |
| 150410 | CEFBS_None, // VCVTPH2QQZrrbkz = 6196 |
| 150411 | CEFBS_None, // VCVTPH2QQZrrk = 6197 |
| 150412 | CEFBS_None, // VCVTPH2QQZrrkz = 6198 |
| 150413 | CEFBS_None, // VCVTPH2UDQZ128rm = 6199 |
| 150414 | CEFBS_None, // VCVTPH2UDQZ128rmb = 6200 |
| 150415 | CEFBS_None, // VCVTPH2UDQZ128rmbk = 6201 |
| 150416 | CEFBS_None, // VCVTPH2UDQZ128rmbkz = 6202 |
| 150417 | CEFBS_None, // VCVTPH2UDQZ128rmk = 6203 |
| 150418 | CEFBS_None, // VCVTPH2UDQZ128rmkz = 6204 |
| 150419 | CEFBS_None, // VCVTPH2UDQZ128rr = 6205 |
| 150420 | CEFBS_None, // VCVTPH2UDQZ128rrk = 6206 |
| 150421 | CEFBS_None, // VCVTPH2UDQZ128rrkz = 6207 |
| 150422 | CEFBS_None, // VCVTPH2UDQZ256rm = 6208 |
| 150423 | CEFBS_None, // VCVTPH2UDQZ256rmb = 6209 |
| 150424 | CEFBS_None, // VCVTPH2UDQZ256rmbk = 6210 |
| 150425 | CEFBS_None, // VCVTPH2UDQZ256rmbkz = 6211 |
| 150426 | CEFBS_None, // VCVTPH2UDQZ256rmk = 6212 |
| 150427 | CEFBS_None, // VCVTPH2UDQZ256rmkz = 6213 |
| 150428 | CEFBS_None, // VCVTPH2UDQZ256rr = 6214 |
| 150429 | CEFBS_None, // VCVTPH2UDQZ256rrk = 6215 |
| 150430 | CEFBS_None, // VCVTPH2UDQZ256rrkz = 6216 |
| 150431 | CEFBS_None, // VCVTPH2UDQZrm = 6217 |
| 150432 | CEFBS_None, // VCVTPH2UDQZrmb = 6218 |
| 150433 | CEFBS_None, // VCVTPH2UDQZrmbk = 6219 |
| 150434 | CEFBS_None, // VCVTPH2UDQZrmbkz = 6220 |
| 150435 | CEFBS_None, // VCVTPH2UDQZrmk = 6221 |
| 150436 | CEFBS_None, // VCVTPH2UDQZrmkz = 6222 |
| 150437 | CEFBS_None, // VCVTPH2UDQZrr = 6223 |
| 150438 | CEFBS_None, // VCVTPH2UDQZrrb = 6224 |
| 150439 | CEFBS_None, // VCVTPH2UDQZrrbk = 6225 |
| 150440 | CEFBS_None, // VCVTPH2UDQZrrbkz = 6226 |
| 150441 | CEFBS_None, // VCVTPH2UDQZrrk = 6227 |
| 150442 | CEFBS_None, // VCVTPH2UDQZrrkz = 6228 |
| 150443 | CEFBS_None, // VCVTPH2UQQZ128rm = 6229 |
| 150444 | CEFBS_None, // VCVTPH2UQQZ128rmb = 6230 |
| 150445 | CEFBS_None, // VCVTPH2UQQZ128rmbk = 6231 |
| 150446 | CEFBS_None, // VCVTPH2UQQZ128rmbkz = 6232 |
| 150447 | CEFBS_None, // VCVTPH2UQQZ128rmk = 6233 |
| 150448 | CEFBS_None, // VCVTPH2UQQZ128rmkz = 6234 |
| 150449 | CEFBS_None, // VCVTPH2UQQZ128rr = 6235 |
| 150450 | CEFBS_None, // VCVTPH2UQQZ128rrk = 6236 |
| 150451 | CEFBS_None, // VCVTPH2UQQZ128rrkz = 6237 |
| 150452 | CEFBS_None, // VCVTPH2UQQZ256rm = 6238 |
| 150453 | CEFBS_None, // VCVTPH2UQQZ256rmb = 6239 |
| 150454 | CEFBS_None, // VCVTPH2UQQZ256rmbk = 6240 |
| 150455 | CEFBS_None, // VCVTPH2UQQZ256rmbkz = 6241 |
| 150456 | CEFBS_None, // VCVTPH2UQQZ256rmk = 6242 |
| 150457 | CEFBS_None, // VCVTPH2UQQZ256rmkz = 6243 |
| 150458 | CEFBS_None, // VCVTPH2UQQZ256rr = 6244 |
| 150459 | CEFBS_None, // VCVTPH2UQQZ256rrk = 6245 |
| 150460 | CEFBS_None, // VCVTPH2UQQZ256rrkz = 6246 |
| 150461 | CEFBS_None, // VCVTPH2UQQZrm = 6247 |
| 150462 | CEFBS_None, // VCVTPH2UQQZrmb = 6248 |
| 150463 | CEFBS_None, // VCVTPH2UQQZrmbk = 6249 |
| 150464 | CEFBS_None, // VCVTPH2UQQZrmbkz = 6250 |
| 150465 | CEFBS_None, // VCVTPH2UQQZrmk = 6251 |
| 150466 | CEFBS_None, // VCVTPH2UQQZrmkz = 6252 |
| 150467 | CEFBS_None, // VCVTPH2UQQZrr = 6253 |
| 150468 | CEFBS_None, // VCVTPH2UQQZrrb = 6254 |
| 150469 | CEFBS_None, // VCVTPH2UQQZrrbk = 6255 |
| 150470 | CEFBS_None, // VCVTPH2UQQZrrbkz = 6256 |
| 150471 | CEFBS_None, // VCVTPH2UQQZrrk = 6257 |
| 150472 | CEFBS_None, // VCVTPH2UQQZrrkz = 6258 |
| 150473 | CEFBS_None, // VCVTPH2UWZ128rm = 6259 |
| 150474 | CEFBS_None, // VCVTPH2UWZ128rmb = 6260 |
| 150475 | CEFBS_None, // VCVTPH2UWZ128rmbk = 6261 |
| 150476 | CEFBS_None, // VCVTPH2UWZ128rmbkz = 6262 |
| 150477 | CEFBS_None, // VCVTPH2UWZ128rmk = 6263 |
| 150478 | CEFBS_None, // VCVTPH2UWZ128rmkz = 6264 |
| 150479 | CEFBS_None, // VCVTPH2UWZ128rr = 6265 |
| 150480 | CEFBS_None, // VCVTPH2UWZ128rrk = 6266 |
| 150481 | CEFBS_None, // VCVTPH2UWZ128rrkz = 6267 |
| 150482 | CEFBS_None, // VCVTPH2UWZ256rm = 6268 |
| 150483 | CEFBS_None, // VCVTPH2UWZ256rmb = 6269 |
| 150484 | CEFBS_None, // VCVTPH2UWZ256rmbk = 6270 |
| 150485 | CEFBS_None, // VCVTPH2UWZ256rmbkz = 6271 |
| 150486 | CEFBS_None, // VCVTPH2UWZ256rmk = 6272 |
| 150487 | CEFBS_None, // VCVTPH2UWZ256rmkz = 6273 |
| 150488 | CEFBS_None, // VCVTPH2UWZ256rr = 6274 |
| 150489 | CEFBS_None, // VCVTPH2UWZ256rrk = 6275 |
| 150490 | CEFBS_None, // VCVTPH2UWZ256rrkz = 6276 |
| 150491 | CEFBS_None, // VCVTPH2UWZrm = 6277 |
| 150492 | CEFBS_None, // VCVTPH2UWZrmb = 6278 |
| 150493 | CEFBS_None, // VCVTPH2UWZrmbk = 6279 |
| 150494 | CEFBS_None, // VCVTPH2UWZrmbkz = 6280 |
| 150495 | CEFBS_None, // VCVTPH2UWZrmk = 6281 |
| 150496 | CEFBS_None, // VCVTPH2UWZrmkz = 6282 |
| 150497 | CEFBS_None, // VCVTPH2UWZrr = 6283 |
| 150498 | CEFBS_None, // VCVTPH2UWZrrb = 6284 |
| 150499 | CEFBS_None, // VCVTPH2UWZrrbk = 6285 |
| 150500 | CEFBS_None, // VCVTPH2UWZrrbkz = 6286 |
| 150501 | CEFBS_None, // VCVTPH2UWZrrk = 6287 |
| 150502 | CEFBS_None, // VCVTPH2UWZrrkz = 6288 |
| 150503 | CEFBS_None, // VCVTPH2WZ128rm = 6289 |
| 150504 | CEFBS_None, // VCVTPH2WZ128rmb = 6290 |
| 150505 | CEFBS_None, // VCVTPH2WZ128rmbk = 6291 |
| 150506 | CEFBS_None, // VCVTPH2WZ128rmbkz = 6292 |
| 150507 | CEFBS_None, // VCVTPH2WZ128rmk = 6293 |
| 150508 | CEFBS_None, // VCVTPH2WZ128rmkz = 6294 |
| 150509 | CEFBS_None, // VCVTPH2WZ128rr = 6295 |
| 150510 | CEFBS_None, // VCVTPH2WZ128rrk = 6296 |
| 150511 | CEFBS_None, // VCVTPH2WZ128rrkz = 6297 |
| 150512 | CEFBS_None, // VCVTPH2WZ256rm = 6298 |
| 150513 | CEFBS_None, // VCVTPH2WZ256rmb = 6299 |
| 150514 | CEFBS_None, // VCVTPH2WZ256rmbk = 6300 |
| 150515 | CEFBS_None, // VCVTPH2WZ256rmbkz = 6301 |
| 150516 | CEFBS_None, // VCVTPH2WZ256rmk = 6302 |
| 150517 | CEFBS_None, // VCVTPH2WZ256rmkz = 6303 |
| 150518 | CEFBS_None, // VCVTPH2WZ256rr = 6304 |
| 150519 | CEFBS_None, // VCVTPH2WZ256rrk = 6305 |
| 150520 | CEFBS_None, // VCVTPH2WZ256rrkz = 6306 |
| 150521 | CEFBS_None, // VCVTPH2WZrm = 6307 |
| 150522 | CEFBS_None, // VCVTPH2WZrmb = 6308 |
| 150523 | CEFBS_None, // VCVTPH2WZrmbk = 6309 |
| 150524 | CEFBS_None, // VCVTPH2WZrmbkz = 6310 |
| 150525 | CEFBS_None, // VCVTPH2WZrmk = 6311 |
| 150526 | CEFBS_None, // VCVTPH2WZrmkz = 6312 |
| 150527 | CEFBS_None, // VCVTPH2WZrr = 6313 |
| 150528 | CEFBS_None, // VCVTPH2WZrrb = 6314 |
| 150529 | CEFBS_None, // VCVTPH2WZrrbk = 6315 |
| 150530 | CEFBS_None, // VCVTPH2WZrrbkz = 6316 |
| 150531 | CEFBS_None, // VCVTPH2WZrrk = 6317 |
| 150532 | CEFBS_None, // VCVTPH2WZrrkz = 6318 |
| 150533 | CEFBS_None, // VCVTPS2DQYrm = 6319 |
| 150534 | CEFBS_None, // VCVTPS2DQYrr = 6320 |
| 150535 | CEFBS_None, // VCVTPS2DQZ128rm = 6321 |
| 150536 | CEFBS_None, // VCVTPS2DQZ128rmb = 6322 |
| 150537 | CEFBS_None, // VCVTPS2DQZ128rmbk = 6323 |
| 150538 | CEFBS_None, // VCVTPS2DQZ128rmbkz = 6324 |
| 150539 | CEFBS_None, // VCVTPS2DQZ128rmk = 6325 |
| 150540 | CEFBS_None, // VCVTPS2DQZ128rmkz = 6326 |
| 150541 | CEFBS_None, // VCVTPS2DQZ128rr = 6327 |
| 150542 | CEFBS_None, // VCVTPS2DQZ128rrk = 6328 |
| 150543 | CEFBS_None, // VCVTPS2DQZ128rrkz = 6329 |
| 150544 | CEFBS_None, // VCVTPS2DQZ256rm = 6330 |
| 150545 | CEFBS_None, // VCVTPS2DQZ256rmb = 6331 |
| 150546 | CEFBS_None, // VCVTPS2DQZ256rmbk = 6332 |
| 150547 | CEFBS_None, // VCVTPS2DQZ256rmbkz = 6333 |
| 150548 | CEFBS_None, // VCVTPS2DQZ256rmk = 6334 |
| 150549 | CEFBS_None, // VCVTPS2DQZ256rmkz = 6335 |
| 150550 | CEFBS_None, // VCVTPS2DQZ256rr = 6336 |
| 150551 | CEFBS_None, // VCVTPS2DQZ256rrk = 6337 |
| 150552 | CEFBS_None, // VCVTPS2DQZ256rrkz = 6338 |
| 150553 | CEFBS_None, // VCVTPS2DQZrm = 6339 |
| 150554 | CEFBS_None, // VCVTPS2DQZrmb = 6340 |
| 150555 | CEFBS_None, // VCVTPS2DQZrmbk = 6341 |
| 150556 | CEFBS_None, // VCVTPS2DQZrmbkz = 6342 |
| 150557 | CEFBS_None, // VCVTPS2DQZrmk = 6343 |
| 150558 | CEFBS_None, // VCVTPS2DQZrmkz = 6344 |
| 150559 | CEFBS_None, // VCVTPS2DQZrr = 6345 |
| 150560 | CEFBS_None, // VCVTPS2DQZrrb = 6346 |
| 150561 | CEFBS_None, // VCVTPS2DQZrrbk = 6347 |
| 150562 | CEFBS_None, // VCVTPS2DQZrrbkz = 6348 |
| 150563 | CEFBS_None, // VCVTPS2DQZrrk = 6349 |
| 150564 | CEFBS_None, // VCVTPS2DQZrrkz = 6350 |
| 150565 | CEFBS_None, // VCVTPS2DQrm = 6351 |
| 150566 | CEFBS_None, // VCVTPS2DQrr = 6352 |
| 150567 | CEFBS_None, // VCVTPS2PDYrm = 6353 |
| 150568 | CEFBS_None, // VCVTPS2PDYrr = 6354 |
| 150569 | CEFBS_None, // VCVTPS2PDZ128rm = 6355 |
| 150570 | CEFBS_None, // VCVTPS2PDZ128rmb = 6356 |
| 150571 | CEFBS_None, // VCVTPS2PDZ128rmbk = 6357 |
| 150572 | CEFBS_None, // VCVTPS2PDZ128rmbkz = 6358 |
| 150573 | CEFBS_None, // VCVTPS2PDZ128rmk = 6359 |
| 150574 | CEFBS_None, // VCVTPS2PDZ128rmkz = 6360 |
| 150575 | CEFBS_None, // VCVTPS2PDZ128rr = 6361 |
| 150576 | CEFBS_None, // VCVTPS2PDZ128rrk = 6362 |
| 150577 | CEFBS_None, // VCVTPS2PDZ128rrkz = 6363 |
| 150578 | CEFBS_None, // VCVTPS2PDZ256rm = 6364 |
| 150579 | CEFBS_None, // VCVTPS2PDZ256rmb = 6365 |
| 150580 | CEFBS_None, // VCVTPS2PDZ256rmbk = 6366 |
| 150581 | CEFBS_None, // VCVTPS2PDZ256rmbkz = 6367 |
| 150582 | CEFBS_None, // VCVTPS2PDZ256rmk = 6368 |
| 150583 | CEFBS_None, // VCVTPS2PDZ256rmkz = 6369 |
| 150584 | CEFBS_None, // VCVTPS2PDZ256rr = 6370 |
| 150585 | CEFBS_None, // VCVTPS2PDZ256rrk = 6371 |
| 150586 | CEFBS_None, // VCVTPS2PDZ256rrkz = 6372 |
| 150587 | CEFBS_None, // VCVTPS2PDZrm = 6373 |
| 150588 | CEFBS_None, // VCVTPS2PDZrmb = 6374 |
| 150589 | CEFBS_None, // VCVTPS2PDZrmbk = 6375 |
| 150590 | CEFBS_None, // VCVTPS2PDZrmbkz = 6376 |
| 150591 | CEFBS_None, // VCVTPS2PDZrmk = 6377 |
| 150592 | CEFBS_None, // VCVTPS2PDZrmkz = 6378 |
| 150593 | CEFBS_None, // VCVTPS2PDZrr = 6379 |
| 150594 | CEFBS_None, // VCVTPS2PDZrrb = 6380 |
| 150595 | CEFBS_None, // VCVTPS2PDZrrbk = 6381 |
| 150596 | CEFBS_None, // VCVTPS2PDZrrbkz = 6382 |
| 150597 | CEFBS_None, // VCVTPS2PDZrrk = 6383 |
| 150598 | CEFBS_None, // VCVTPS2PDZrrkz = 6384 |
| 150599 | CEFBS_None, // VCVTPS2PDrm = 6385 |
| 150600 | CEFBS_None, // VCVTPS2PDrr = 6386 |
| 150601 | CEFBS_None, // VCVTPS2PHXZ128rm = 6387 |
| 150602 | CEFBS_None, // VCVTPS2PHXZ128rmb = 6388 |
| 150603 | CEFBS_None, // VCVTPS2PHXZ128rmbk = 6389 |
| 150604 | CEFBS_None, // VCVTPS2PHXZ128rmbkz = 6390 |
| 150605 | CEFBS_None, // VCVTPS2PHXZ128rmk = 6391 |
| 150606 | CEFBS_None, // VCVTPS2PHXZ128rmkz = 6392 |
| 150607 | CEFBS_None, // VCVTPS2PHXZ128rr = 6393 |
| 150608 | CEFBS_None, // VCVTPS2PHXZ128rrk = 6394 |
| 150609 | CEFBS_None, // VCVTPS2PHXZ128rrkz = 6395 |
| 150610 | CEFBS_None, // VCVTPS2PHXZ256rm = 6396 |
| 150611 | CEFBS_None, // VCVTPS2PHXZ256rmb = 6397 |
| 150612 | CEFBS_None, // VCVTPS2PHXZ256rmbk = 6398 |
| 150613 | CEFBS_None, // VCVTPS2PHXZ256rmbkz = 6399 |
| 150614 | CEFBS_None, // VCVTPS2PHXZ256rmk = 6400 |
| 150615 | CEFBS_None, // VCVTPS2PHXZ256rmkz = 6401 |
| 150616 | CEFBS_None, // VCVTPS2PHXZ256rr = 6402 |
| 150617 | CEFBS_None, // VCVTPS2PHXZ256rrk = 6403 |
| 150618 | CEFBS_None, // VCVTPS2PHXZ256rrkz = 6404 |
| 150619 | CEFBS_None, // VCVTPS2PHXZrm = 6405 |
| 150620 | CEFBS_None, // VCVTPS2PHXZrmb = 6406 |
| 150621 | CEFBS_None, // VCVTPS2PHXZrmbk = 6407 |
| 150622 | CEFBS_None, // VCVTPS2PHXZrmbkz = 6408 |
| 150623 | CEFBS_None, // VCVTPS2PHXZrmk = 6409 |
| 150624 | CEFBS_None, // VCVTPS2PHXZrmkz = 6410 |
| 150625 | CEFBS_None, // VCVTPS2PHXZrr = 6411 |
| 150626 | CEFBS_None, // VCVTPS2PHXZrrb = 6412 |
| 150627 | CEFBS_None, // VCVTPS2PHXZrrbk = 6413 |
| 150628 | CEFBS_None, // VCVTPS2PHXZrrbkz = 6414 |
| 150629 | CEFBS_None, // VCVTPS2PHXZrrk = 6415 |
| 150630 | CEFBS_None, // VCVTPS2PHXZrrkz = 6416 |
| 150631 | CEFBS_None, // VCVTPS2PHYmr = 6417 |
| 150632 | CEFBS_None, // VCVTPS2PHYrr = 6418 |
| 150633 | CEFBS_None, // VCVTPS2PHZ128mr = 6419 |
| 150634 | CEFBS_None, // VCVTPS2PHZ128mrk = 6420 |
| 150635 | CEFBS_None, // VCVTPS2PHZ128rr = 6421 |
| 150636 | CEFBS_None, // VCVTPS2PHZ128rrk = 6422 |
| 150637 | CEFBS_None, // VCVTPS2PHZ128rrkz = 6423 |
| 150638 | CEFBS_None, // VCVTPS2PHZ256mr = 6424 |
| 150639 | CEFBS_None, // VCVTPS2PHZ256mrk = 6425 |
| 150640 | CEFBS_None, // VCVTPS2PHZ256rr = 6426 |
| 150641 | CEFBS_None, // VCVTPS2PHZ256rrk = 6427 |
| 150642 | CEFBS_None, // VCVTPS2PHZ256rrkz = 6428 |
| 150643 | CEFBS_None, // VCVTPS2PHZmr = 6429 |
| 150644 | CEFBS_None, // VCVTPS2PHZmrk = 6430 |
| 150645 | CEFBS_None, // VCVTPS2PHZrr = 6431 |
| 150646 | CEFBS_None, // VCVTPS2PHZrrb = 6432 |
| 150647 | CEFBS_None, // VCVTPS2PHZrrbk = 6433 |
| 150648 | CEFBS_None, // VCVTPS2PHZrrbkz = 6434 |
| 150649 | CEFBS_None, // VCVTPS2PHZrrk = 6435 |
| 150650 | CEFBS_None, // VCVTPS2PHZrrkz = 6436 |
| 150651 | CEFBS_None, // VCVTPS2PHmr = 6437 |
| 150652 | CEFBS_None, // VCVTPS2PHrr = 6438 |
| 150653 | CEFBS_None, // VCVTPS2QQZ128rm = 6439 |
| 150654 | CEFBS_None, // VCVTPS2QQZ128rmb = 6440 |
| 150655 | CEFBS_None, // VCVTPS2QQZ128rmbk = 6441 |
| 150656 | CEFBS_None, // VCVTPS2QQZ128rmbkz = 6442 |
| 150657 | CEFBS_None, // VCVTPS2QQZ128rmk = 6443 |
| 150658 | CEFBS_None, // VCVTPS2QQZ128rmkz = 6444 |
| 150659 | CEFBS_None, // VCVTPS2QQZ128rr = 6445 |
| 150660 | CEFBS_None, // VCVTPS2QQZ128rrk = 6446 |
| 150661 | CEFBS_None, // VCVTPS2QQZ128rrkz = 6447 |
| 150662 | CEFBS_None, // VCVTPS2QQZ256rm = 6448 |
| 150663 | CEFBS_None, // VCVTPS2QQZ256rmb = 6449 |
| 150664 | CEFBS_None, // VCVTPS2QQZ256rmbk = 6450 |
| 150665 | CEFBS_None, // VCVTPS2QQZ256rmbkz = 6451 |
| 150666 | CEFBS_None, // VCVTPS2QQZ256rmk = 6452 |
| 150667 | CEFBS_None, // VCVTPS2QQZ256rmkz = 6453 |
| 150668 | CEFBS_None, // VCVTPS2QQZ256rr = 6454 |
| 150669 | CEFBS_None, // VCVTPS2QQZ256rrk = 6455 |
| 150670 | CEFBS_None, // VCVTPS2QQZ256rrkz = 6456 |
| 150671 | CEFBS_None, // VCVTPS2QQZrm = 6457 |
| 150672 | CEFBS_None, // VCVTPS2QQZrmb = 6458 |
| 150673 | CEFBS_None, // VCVTPS2QQZrmbk = 6459 |
| 150674 | CEFBS_None, // VCVTPS2QQZrmbkz = 6460 |
| 150675 | CEFBS_None, // VCVTPS2QQZrmk = 6461 |
| 150676 | CEFBS_None, // VCVTPS2QQZrmkz = 6462 |
| 150677 | CEFBS_None, // VCVTPS2QQZrr = 6463 |
| 150678 | CEFBS_None, // VCVTPS2QQZrrb = 6464 |
| 150679 | CEFBS_None, // VCVTPS2QQZrrbk = 6465 |
| 150680 | CEFBS_None, // VCVTPS2QQZrrbkz = 6466 |
| 150681 | CEFBS_None, // VCVTPS2QQZrrk = 6467 |
| 150682 | CEFBS_None, // VCVTPS2QQZrrkz = 6468 |
| 150683 | CEFBS_None, // VCVTPS2UDQZ128rm = 6469 |
| 150684 | CEFBS_None, // VCVTPS2UDQZ128rmb = 6470 |
| 150685 | CEFBS_None, // VCVTPS2UDQZ128rmbk = 6471 |
| 150686 | CEFBS_None, // VCVTPS2UDQZ128rmbkz = 6472 |
| 150687 | CEFBS_None, // VCVTPS2UDQZ128rmk = 6473 |
| 150688 | CEFBS_None, // VCVTPS2UDQZ128rmkz = 6474 |
| 150689 | CEFBS_None, // VCVTPS2UDQZ128rr = 6475 |
| 150690 | CEFBS_None, // VCVTPS2UDQZ128rrk = 6476 |
| 150691 | CEFBS_None, // VCVTPS2UDQZ128rrkz = 6477 |
| 150692 | CEFBS_None, // VCVTPS2UDQZ256rm = 6478 |
| 150693 | CEFBS_None, // VCVTPS2UDQZ256rmb = 6479 |
| 150694 | CEFBS_None, // VCVTPS2UDQZ256rmbk = 6480 |
| 150695 | CEFBS_None, // VCVTPS2UDQZ256rmbkz = 6481 |
| 150696 | CEFBS_None, // VCVTPS2UDQZ256rmk = 6482 |
| 150697 | CEFBS_None, // VCVTPS2UDQZ256rmkz = 6483 |
| 150698 | CEFBS_None, // VCVTPS2UDQZ256rr = 6484 |
| 150699 | CEFBS_None, // VCVTPS2UDQZ256rrk = 6485 |
| 150700 | CEFBS_None, // VCVTPS2UDQZ256rrkz = 6486 |
| 150701 | CEFBS_None, // VCVTPS2UDQZrm = 6487 |
| 150702 | CEFBS_None, // VCVTPS2UDQZrmb = 6488 |
| 150703 | CEFBS_None, // VCVTPS2UDQZrmbk = 6489 |
| 150704 | CEFBS_None, // VCVTPS2UDQZrmbkz = 6490 |
| 150705 | CEFBS_None, // VCVTPS2UDQZrmk = 6491 |
| 150706 | CEFBS_None, // VCVTPS2UDQZrmkz = 6492 |
| 150707 | CEFBS_None, // VCVTPS2UDQZrr = 6493 |
| 150708 | CEFBS_None, // VCVTPS2UDQZrrb = 6494 |
| 150709 | CEFBS_None, // VCVTPS2UDQZrrbk = 6495 |
| 150710 | CEFBS_None, // VCVTPS2UDQZrrbkz = 6496 |
| 150711 | CEFBS_None, // VCVTPS2UDQZrrk = 6497 |
| 150712 | CEFBS_None, // VCVTPS2UDQZrrkz = 6498 |
| 150713 | CEFBS_None, // VCVTPS2UQQZ128rm = 6499 |
| 150714 | CEFBS_None, // VCVTPS2UQQZ128rmb = 6500 |
| 150715 | CEFBS_None, // VCVTPS2UQQZ128rmbk = 6501 |
| 150716 | CEFBS_None, // VCVTPS2UQQZ128rmbkz = 6502 |
| 150717 | CEFBS_None, // VCVTPS2UQQZ128rmk = 6503 |
| 150718 | CEFBS_None, // VCVTPS2UQQZ128rmkz = 6504 |
| 150719 | CEFBS_None, // VCVTPS2UQQZ128rr = 6505 |
| 150720 | CEFBS_None, // VCVTPS2UQQZ128rrk = 6506 |
| 150721 | CEFBS_None, // VCVTPS2UQQZ128rrkz = 6507 |
| 150722 | CEFBS_None, // VCVTPS2UQQZ256rm = 6508 |
| 150723 | CEFBS_None, // VCVTPS2UQQZ256rmb = 6509 |
| 150724 | CEFBS_None, // VCVTPS2UQQZ256rmbk = 6510 |
| 150725 | CEFBS_None, // VCVTPS2UQQZ256rmbkz = 6511 |
| 150726 | CEFBS_None, // VCVTPS2UQQZ256rmk = 6512 |
| 150727 | CEFBS_None, // VCVTPS2UQQZ256rmkz = 6513 |
| 150728 | CEFBS_None, // VCVTPS2UQQZ256rr = 6514 |
| 150729 | CEFBS_None, // VCVTPS2UQQZ256rrk = 6515 |
| 150730 | CEFBS_None, // VCVTPS2UQQZ256rrkz = 6516 |
| 150731 | CEFBS_None, // VCVTPS2UQQZrm = 6517 |
| 150732 | CEFBS_None, // VCVTPS2UQQZrmb = 6518 |
| 150733 | CEFBS_None, // VCVTPS2UQQZrmbk = 6519 |
| 150734 | CEFBS_None, // VCVTPS2UQQZrmbkz = 6520 |
| 150735 | CEFBS_None, // VCVTPS2UQQZrmk = 6521 |
| 150736 | CEFBS_None, // VCVTPS2UQQZrmkz = 6522 |
| 150737 | CEFBS_None, // VCVTPS2UQQZrr = 6523 |
| 150738 | CEFBS_None, // VCVTPS2UQQZrrb = 6524 |
| 150739 | CEFBS_None, // VCVTPS2UQQZrrbk = 6525 |
| 150740 | CEFBS_None, // VCVTPS2UQQZrrbkz = 6526 |
| 150741 | CEFBS_None, // VCVTPS2UQQZrrk = 6527 |
| 150742 | CEFBS_None, // VCVTPS2UQQZrrkz = 6528 |
| 150743 | CEFBS_None, // VCVTQQ2PDZ128rm = 6529 |
| 150744 | CEFBS_None, // VCVTQQ2PDZ128rmb = 6530 |
| 150745 | CEFBS_None, // VCVTQQ2PDZ128rmbk = 6531 |
| 150746 | CEFBS_None, // VCVTQQ2PDZ128rmbkz = 6532 |
| 150747 | CEFBS_None, // VCVTQQ2PDZ128rmk = 6533 |
| 150748 | CEFBS_None, // VCVTQQ2PDZ128rmkz = 6534 |
| 150749 | CEFBS_None, // VCVTQQ2PDZ128rr = 6535 |
| 150750 | CEFBS_None, // VCVTQQ2PDZ128rrk = 6536 |
| 150751 | CEFBS_None, // VCVTQQ2PDZ128rrkz = 6537 |
| 150752 | CEFBS_None, // VCVTQQ2PDZ256rm = 6538 |
| 150753 | CEFBS_None, // VCVTQQ2PDZ256rmb = 6539 |
| 150754 | CEFBS_None, // VCVTQQ2PDZ256rmbk = 6540 |
| 150755 | CEFBS_None, // VCVTQQ2PDZ256rmbkz = 6541 |
| 150756 | CEFBS_None, // VCVTQQ2PDZ256rmk = 6542 |
| 150757 | CEFBS_None, // VCVTQQ2PDZ256rmkz = 6543 |
| 150758 | CEFBS_None, // VCVTQQ2PDZ256rr = 6544 |
| 150759 | CEFBS_None, // VCVTQQ2PDZ256rrk = 6545 |
| 150760 | CEFBS_None, // VCVTQQ2PDZ256rrkz = 6546 |
| 150761 | CEFBS_None, // VCVTQQ2PDZrm = 6547 |
| 150762 | CEFBS_None, // VCVTQQ2PDZrmb = 6548 |
| 150763 | CEFBS_None, // VCVTQQ2PDZrmbk = 6549 |
| 150764 | CEFBS_None, // VCVTQQ2PDZrmbkz = 6550 |
| 150765 | CEFBS_None, // VCVTQQ2PDZrmk = 6551 |
| 150766 | CEFBS_None, // VCVTQQ2PDZrmkz = 6552 |
| 150767 | CEFBS_None, // VCVTQQ2PDZrr = 6553 |
| 150768 | CEFBS_None, // VCVTQQ2PDZrrb = 6554 |
| 150769 | CEFBS_None, // VCVTQQ2PDZrrbk = 6555 |
| 150770 | CEFBS_None, // VCVTQQ2PDZrrbkz = 6556 |
| 150771 | CEFBS_None, // VCVTQQ2PDZrrk = 6557 |
| 150772 | CEFBS_None, // VCVTQQ2PDZrrkz = 6558 |
| 150773 | CEFBS_None, // VCVTQQ2PHZ128rm = 6559 |
| 150774 | CEFBS_None, // VCVTQQ2PHZ128rmb = 6560 |
| 150775 | CEFBS_None, // VCVTQQ2PHZ128rmbk = 6561 |
| 150776 | CEFBS_None, // VCVTQQ2PHZ128rmbkz = 6562 |
| 150777 | CEFBS_None, // VCVTQQ2PHZ128rmk = 6563 |
| 150778 | CEFBS_None, // VCVTQQ2PHZ128rmkz = 6564 |
| 150779 | CEFBS_None, // VCVTQQ2PHZ128rr = 6565 |
| 150780 | CEFBS_None, // VCVTQQ2PHZ128rrk = 6566 |
| 150781 | CEFBS_None, // VCVTQQ2PHZ128rrkz = 6567 |
| 150782 | CEFBS_None, // VCVTQQ2PHZ256rm = 6568 |
| 150783 | CEFBS_None, // VCVTQQ2PHZ256rmb = 6569 |
| 150784 | CEFBS_None, // VCVTQQ2PHZ256rmbk = 6570 |
| 150785 | CEFBS_None, // VCVTQQ2PHZ256rmbkz = 6571 |
| 150786 | CEFBS_None, // VCVTQQ2PHZ256rmk = 6572 |
| 150787 | CEFBS_None, // VCVTQQ2PHZ256rmkz = 6573 |
| 150788 | CEFBS_None, // VCVTQQ2PHZ256rr = 6574 |
| 150789 | CEFBS_None, // VCVTQQ2PHZ256rrk = 6575 |
| 150790 | CEFBS_None, // VCVTQQ2PHZ256rrkz = 6576 |
| 150791 | CEFBS_None, // VCVTQQ2PHZrm = 6577 |
| 150792 | CEFBS_None, // VCVTQQ2PHZrmb = 6578 |
| 150793 | CEFBS_None, // VCVTQQ2PHZrmbk = 6579 |
| 150794 | CEFBS_None, // VCVTQQ2PHZrmbkz = 6580 |
| 150795 | CEFBS_None, // VCVTQQ2PHZrmk = 6581 |
| 150796 | CEFBS_None, // VCVTQQ2PHZrmkz = 6582 |
| 150797 | CEFBS_None, // VCVTQQ2PHZrr = 6583 |
| 150798 | CEFBS_None, // VCVTQQ2PHZrrb = 6584 |
| 150799 | CEFBS_None, // VCVTQQ2PHZrrbk = 6585 |
| 150800 | CEFBS_None, // VCVTQQ2PHZrrbkz = 6586 |
| 150801 | CEFBS_None, // VCVTQQ2PHZrrk = 6587 |
| 150802 | CEFBS_None, // VCVTQQ2PHZrrkz = 6588 |
| 150803 | CEFBS_None, // VCVTQQ2PSZ128rm = 6589 |
| 150804 | CEFBS_None, // VCVTQQ2PSZ128rmb = 6590 |
| 150805 | CEFBS_None, // VCVTQQ2PSZ128rmbk = 6591 |
| 150806 | CEFBS_None, // VCVTQQ2PSZ128rmbkz = 6592 |
| 150807 | CEFBS_None, // VCVTQQ2PSZ128rmk = 6593 |
| 150808 | CEFBS_None, // VCVTQQ2PSZ128rmkz = 6594 |
| 150809 | CEFBS_None, // VCVTQQ2PSZ128rr = 6595 |
| 150810 | CEFBS_None, // VCVTQQ2PSZ128rrk = 6596 |
| 150811 | CEFBS_None, // VCVTQQ2PSZ128rrkz = 6597 |
| 150812 | CEFBS_None, // VCVTQQ2PSZ256rm = 6598 |
| 150813 | CEFBS_None, // VCVTQQ2PSZ256rmb = 6599 |
| 150814 | CEFBS_None, // VCVTQQ2PSZ256rmbk = 6600 |
| 150815 | CEFBS_None, // VCVTQQ2PSZ256rmbkz = 6601 |
| 150816 | CEFBS_None, // VCVTQQ2PSZ256rmk = 6602 |
| 150817 | CEFBS_None, // VCVTQQ2PSZ256rmkz = 6603 |
| 150818 | CEFBS_None, // VCVTQQ2PSZ256rr = 6604 |
| 150819 | CEFBS_None, // VCVTQQ2PSZ256rrk = 6605 |
| 150820 | CEFBS_None, // VCVTQQ2PSZ256rrkz = 6606 |
| 150821 | CEFBS_None, // VCVTQQ2PSZrm = 6607 |
| 150822 | CEFBS_None, // VCVTQQ2PSZrmb = 6608 |
| 150823 | CEFBS_None, // VCVTQQ2PSZrmbk = 6609 |
| 150824 | CEFBS_None, // VCVTQQ2PSZrmbkz = 6610 |
| 150825 | CEFBS_None, // VCVTQQ2PSZrmk = 6611 |
| 150826 | CEFBS_None, // VCVTQQ2PSZrmkz = 6612 |
| 150827 | CEFBS_None, // VCVTQQ2PSZrr = 6613 |
| 150828 | CEFBS_None, // VCVTQQ2PSZrrb = 6614 |
| 150829 | CEFBS_None, // VCVTQQ2PSZrrbk = 6615 |
| 150830 | CEFBS_None, // VCVTQQ2PSZrrbkz = 6616 |
| 150831 | CEFBS_None, // VCVTQQ2PSZrrk = 6617 |
| 150832 | CEFBS_None, // VCVTQQ2PSZrrkz = 6618 |
| 150833 | CEFBS_None, // VCVTSD2SHZrm = 6619 |
| 150834 | CEFBS_None, // VCVTSD2SHZrm_Int = 6620 |
| 150835 | CEFBS_None, // VCVTSD2SHZrm_Intk = 6621 |
| 150836 | CEFBS_None, // VCVTSD2SHZrm_Intkz = 6622 |
| 150837 | CEFBS_None, // VCVTSD2SHZrr = 6623 |
| 150838 | CEFBS_None, // VCVTSD2SHZrr_Int = 6624 |
| 150839 | CEFBS_None, // VCVTSD2SHZrr_Intk = 6625 |
| 150840 | CEFBS_None, // VCVTSD2SHZrr_Intkz = 6626 |
| 150841 | CEFBS_None, // VCVTSD2SHZrrb_Int = 6627 |
| 150842 | CEFBS_None, // VCVTSD2SHZrrb_Intk = 6628 |
| 150843 | CEFBS_None, // VCVTSD2SHZrrb_Intkz = 6629 |
| 150844 | CEFBS_None, // VCVTSD2SI64Zrm = 6630 |
| 150845 | CEFBS_None, // VCVTSD2SI64Zrm_Int = 6631 |
| 150846 | CEFBS_None, // VCVTSD2SI64Zrr = 6632 |
| 150847 | CEFBS_None, // VCVTSD2SI64Zrr_Int = 6633 |
| 150848 | CEFBS_None, // VCVTSD2SI64Zrrb_Int = 6634 |
| 150849 | CEFBS_None, // VCVTSD2SI64rm = 6635 |
| 150850 | CEFBS_None, // VCVTSD2SI64rm_Int = 6636 |
| 150851 | CEFBS_None, // VCVTSD2SI64rr = 6637 |
| 150852 | CEFBS_None, // VCVTSD2SI64rr_Int = 6638 |
| 150853 | CEFBS_None, // VCVTSD2SIZrm = 6639 |
| 150854 | CEFBS_None, // VCVTSD2SIZrm_Int = 6640 |
| 150855 | CEFBS_None, // VCVTSD2SIZrr = 6641 |
| 150856 | CEFBS_None, // VCVTSD2SIZrr_Int = 6642 |
| 150857 | CEFBS_None, // VCVTSD2SIZrrb_Int = 6643 |
| 150858 | CEFBS_None, // VCVTSD2SIrm = 6644 |
| 150859 | CEFBS_None, // VCVTSD2SIrm_Int = 6645 |
| 150860 | CEFBS_None, // VCVTSD2SIrr = 6646 |
| 150861 | CEFBS_None, // VCVTSD2SIrr_Int = 6647 |
| 150862 | CEFBS_None, // VCVTSD2SSZrm = 6648 |
| 150863 | CEFBS_None, // VCVTSD2SSZrm_Int = 6649 |
| 150864 | CEFBS_None, // VCVTSD2SSZrm_Intk = 6650 |
| 150865 | CEFBS_None, // VCVTSD2SSZrm_Intkz = 6651 |
| 150866 | CEFBS_None, // VCVTSD2SSZrr = 6652 |
| 150867 | CEFBS_None, // VCVTSD2SSZrr_Int = 6653 |
| 150868 | CEFBS_None, // VCVTSD2SSZrr_Intk = 6654 |
| 150869 | CEFBS_None, // VCVTSD2SSZrr_Intkz = 6655 |
| 150870 | CEFBS_None, // VCVTSD2SSZrrb_Int = 6656 |
| 150871 | CEFBS_None, // VCVTSD2SSZrrb_Intk = 6657 |
| 150872 | CEFBS_None, // VCVTSD2SSZrrb_Intkz = 6658 |
| 150873 | CEFBS_None, // VCVTSD2SSrm = 6659 |
| 150874 | CEFBS_None, // VCVTSD2SSrm_Int = 6660 |
| 150875 | CEFBS_None, // VCVTSD2SSrr = 6661 |
| 150876 | CEFBS_None, // VCVTSD2SSrr_Int = 6662 |
| 150877 | CEFBS_None, // VCVTSD2USI64Zrm_Int = 6663 |
| 150878 | CEFBS_None, // VCVTSD2USI64Zrr_Int = 6664 |
| 150879 | CEFBS_None, // VCVTSD2USI64Zrrb_Int = 6665 |
| 150880 | CEFBS_None, // VCVTSD2USIZrm_Int = 6666 |
| 150881 | CEFBS_None, // VCVTSD2USIZrr_Int = 6667 |
| 150882 | CEFBS_None, // VCVTSD2USIZrrb_Int = 6668 |
| 150883 | CEFBS_None, // VCVTSH2SDZrm = 6669 |
| 150884 | CEFBS_None, // VCVTSH2SDZrm_Int = 6670 |
| 150885 | CEFBS_None, // VCVTSH2SDZrm_Intk = 6671 |
| 150886 | CEFBS_None, // VCVTSH2SDZrm_Intkz = 6672 |
| 150887 | CEFBS_None, // VCVTSH2SDZrr = 6673 |
| 150888 | CEFBS_None, // VCVTSH2SDZrr_Int = 6674 |
| 150889 | CEFBS_None, // VCVTSH2SDZrr_Intk = 6675 |
| 150890 | CEFBS_None, // VCVTSH2SDZrr_Intkz = 6676 |
| 150891 | CEFBS_None, // VCVTSH2SDZrrb_Int = 6677 |
| 150892 | CEFBS_None, // VCVTSH2SDZrrb_Intk = 6678 |
| 150893 | CEFBS_None, // VCVTSH2SDZrrb_Intkz = 6679 |
| 150894 | CEFBS_None, // VCVTSH2SI64Zrm_Int = 6680 |
| 150895 | CEFBS_None, // VCVTSH2SI64Zrr_Int = 6681 |
| 150896 | CEFBS_None, // VCVTSH2SI64Zrrb_Int = 6682 |
| 150897 | CEFBS_None, // VCVTSH2SIZrm_Int = 6683 |
| 150898 | CEFBS_None, // VCVTSH2SIZrr_Int = 6684 |
| 150899 | CEFBS_None, // VCVTSH2SIZrrb_Int = 6685 |
| 150900 | CEFBS_None, // VCVTSH2SSZrm = 6686 |
| 150901 | CEFBS_None, // VCVTSH2SSZrm_Int = 6687 |
| 150902 | CEFBS_None, // VCVTSH2SSZrm_Intk = 6688 |
| 150903 | CEFBS_None, // VCVTSH2SSZrm_Intkz = 6689 |
| 150904 | CEFBS_None, // VCVTSH2SSZrr = 6690 |
| 150905 | CEFBS_None, // VCVTSH2SSZrr_Int = 6691 |
| 150906 | CEFBS_None, // VCVTSH2SSZrr_Intk = 6692 |
| 150907 | CEFBS_None, // VCVTSH2SSZrr_Intkz = 6693 |
| 150908 | CEFBS_None, // VCVTSH2SSZrrb_Int = 6694 |
| 150909 | CEFBS_None, // VCVTSH2SSZrrb_Intk = 6695 |
| 150910 | CEFBS_None, // VCVTSH2SSZrrb_Intkz = 6696 |
| 150911 | CEFBS_None, // VCVTSH2USI64Zrm_Int = 6697 |
| 150912 | CEFBS_None, // VCVTSH2USI64Zrr_Int = 6698 |
| 150913 | CEFBS_None, // VCVTSH2USI64Zrrb_Int = 6699 |
| 150914 | CEFBS_None, // VCVTSH2USIZrm_Int = 6700 |
| 150915 | CEFBS_None, // VCVTSH2USIZrr_Int = 6701 |
| 150916 | CEFBS_None, // VCVTSH2USIZrrb_Int = 6702 |
| 150917 | CEFBS_None, // VCVTSI2SDZrm = 6703 |
| 150918 | CEFBS_None, // VCVTSI2SDZrm_Int = 6704 |
| 150919 | CEFBS_None, // VCVTSI2SDZrr = 6705 |
| 150920 | CEFBS_None, // VCVTSI2SDZrr_Int = 6706 |
| 150921 | CEFBS_None, // VCVTSI2SDrm = 6707 |
| 150922 | CEFBS_None, // VCVTSI2SDrm_Int = 6708 |
| 150923 | CEFBS_None, // VCVTSI2SDrr = 6709 |
| 150924 | CEFBS_None, // VCVTSI2SDrr_Int = 6710 |
| 150925 | CEFBS_None, // VCVTSI2SHZrm = 6711 |
| 150926 | CEFBS_None, // VCVTSI2SHZrm_Int = 6712 |
| 150927 | CEFBS_None, // VCVTSI2SHZrr = 6713 |
| 150928 | CEFBS_None, // VCVTSI2SHZrr_Int = 6714 |
| 150929 | CEFBS_None, // VCVTSI2SHZrrb_Int = 6715 |
| 150930 | CEFBS_None, // VCVTSI2SSZrm = 6716 |
| 150931 | CEFBS_None, // VCVTSI2SSZrm_Int = 6717 |
| 150932 | CEFBS_None, // VCVTSI2SSZrr = 6718 |
| 150933 | CEFBS_None, // VCVTSI2SSZrr_Int = 6719 |
| 150934 | CEFBS_None, // VCVTSI2SSZrrb_Int = 6720 |
| 150935 | CEFBS_None, // VCVTSI2SSrm = 6721 |
| 150936 | CEFBS_None, // VCVTSI2SSrm_Int = 6722 |
| 150937 | CEFBS_None, // VCVTSI2SSrr = 6723 |
| 150938 | CEFBS_None, // VCVTSI2SSrr_Int = 6724 |
| 150939 | CEFBS_None, // VCVTSI642SDZrm = 6725 |
| 150940 | CEFBS_None, // VCVTSI642SDZrm_Int = 6726 |
| 150941 | CEFBS_None, // VCVTSI642SDZrr = 6727 |
| 150942 | CEFBS_None, // VCVTSI642SDZrr_Int = 6728 |
| 150943 | CEFBS_None, // VCVTSI642SDZrrb_Int = 6729 |
| 150944 | CEFBS_None, // VCVTSI642SDrm = 6730 |
| 150945 | CEFBS_None, // VCVTSI642SDrm_Int = 6731 |
| 150946 | CEFBS_None, // VCVTSI642SDrr = 6732 |
| 150947 | CEFBS_None, // VCVTSI642SDrr_Int = 6733 |
| 150948 | CEFBS_None, // VCVTSI642SHZrm = 6734 |
| 150949 | CEFBS_None, // VCVTSI642SHZrm_Int = 6735 |
| 150950 | CEFBS_None, // VCVTSI642SHZrr = 6736 |
| 150951 | CEFBS_None, // VCVTSI642SHZrr_Int = 6737 |
| 150952 | CEFBS_None, // VCVTSI642SHZrrb_Int = 6738 |
| 150953 | CEFBS_None, // VCVTSI642SSZrm = 6739 |
| 150954 | CEFBS_None, // VCVTSI642SSZrm_Int = 6740 |
| 150955 | CEFBS_None, // VCVTSI642SSZrr = 6741 |
| 150956 | CEFBS_None, // VCVTSI642SSZrr_Int = 6742 |
| 150957 | CEFBS_None, // VCVTSI642SSZrrb_Int = 6743 |
| 150958 | CEFBS_None, // VCVTSI642SSrm = 6744 |
| 150959 | CEFBS_None, // VCVTSI642SSrm_Int = 6745 |
| 150960 | CEFBS_None, // VCVTSI642SSrr = 6746 |
| 150961 | CEFBS_None, // VCVTSI642SSrr_Int = 6747 |
| 150962 | CEFBS_None, // VCVTSS2SDZrm = 6748 |
| 150963 | CEFBS_None, // VCVTSS2SDZrm_Int = 6749 |
| 150964 | CEFBS_None, // VCVTSS2SDZrm_Intk = 6750 |
| 150965 | CEFBS_None, // VCVTSS2SDZrm_Intkz = 6751 |
| 150966 | CEFBS_None, // VCVTSS2SDZrr = 6752 |
| 150967 | CEFBS_None, // VCVTSS2SDZrr_Int = 6753 |
| 150968 | CEFBS_None, // VCVTSS2SDZrr_Intk = 6754 |
| 150969 | CEFBS_None, // VCVTSS2SDZrr_Intkz = 6755 |
| 150970 | CEFBS_None, // VCVTSS2SDZrrb_Int = 6756 |
| 150971 | CEFBS_None, // VCVTSS2SDZrrb_Intk = 6757 |
| 150972 | CEFBS_None, // VCVTSS2SDZrrb_Intkz = 6758 |
| 150973 | CEFBS_None, // VCVTSS2SDrm = 6759 |
| 150974 | CEFBS_None, // VCVTSS2SDrm_Int = 6760 |
| 150975 | CEFBS_None, // VCVTSS2SDrr = 6761 |
| 150976 | CEFBS_None, // VCVTSS2SDrr_Int = 6762 |
| 150977 | CEFBS_None, // VCVTSS2SHZrm = 6763 |
| 150978 | CEFBS_None, // VCVTSS2SHZrm_Int = 6764 |
| 150979 | CEFBS_None, // VCVTSS2SHZrm_Intk = 6765 |
| 150980 | CEFBS_None, // VCVTSS2SHZrm_Intkz = 6766 |
| 150981 | CEFBS_None, // VCVTSS2SHZrr = 6767 |
| 150982 | CEFBS_None, // VCVTSS2SHZrr_Int = 6768 |
| 150983 | CEFBS_None, // VCVTSS2SHZrr_Intk = 6769 |
| 150984 | CEFBS_None, // VCVTSS2SHZrr_Intkz = 6770 |
| 150985 | CEFBS_None, // VCVTSS2SHZrrb_Int = 6771 |
| 150986 | CEFBS_None, // VCVTSS2SHZrrb_Intk = 6772 |
| 150987 | CEFBS_None, // VCVTSS2SHZrrb_Intkz = 6773 |
| 150988 | CEFBS_None, // VCVTSS2SI64Zrm = 6774 |
| 150989 | CEFBS_None, // VCVTSS2SI64Zrm_Int = 6775 |
| 150990 | CEFBS_None, // VCVTSS2SI64Zrr = 6776 |
| 150991 | CEFBS_None, // VCVTSS2SI64Zrr_Int = 6777 |
| 150992 | CEFBS_None, // VCVTSS2SI64Zrrb_Int = 6778 |
| 150993 | CEFBS_None, // VCVTSS2SI64rm = 6779 |
| 150994 | CEFBS_None, // VCVTSS2SI64rm_Int = 6780 |
| 150995 | CEFBS_None, // VCVTSS2SI64rr = 6781 |
| 150996 | CEFBS_None, // VCVTSS2SI64rr_Int = 6782 |
| 150997 | CEFBS_None, // VCVTSS2SIZrm = 6783 |
| 150998 | CEFBS_None, // VCVTSS2SIZrm_Int = 6784 |
| 150999 | CEFBS_None, // VCVTSS2SIZrr = 6785 |
| 151000 | CEFBS_None, // VCVTSS2SIZrr_Int = 6786 |
| 151001 | CEFBS_None, // VCVTSS2SIZrrb_Int = 6787 |
| 151002 | CEFBS_None, // VCVTSS2SIrm = 6788 |
| 151003 | CEFBS_None, // VCVTSS2SIrm_Int = 6789 |
| 151004 | CEFBS_None, // VCVTSS2SIrr = 6790 |
| 151005 | CEFBS_None, // VCVTSS2SIrr_Int = 6791 |
| 151006 | CEFBS_None, // VCVTSS2USI64Zrm_Int = 6792 |
| 151007 | CEFBS_None, // VCVTSS2USI64Zrr_Int = 6793 |
| 151008 | CEFBS_None, // VCVTSS2USI64Zrrb_Int = 6794 |
| 151009 | CEFBS_None, // VCVTSS2USIZrm_Int = 6795 |
| 151010 | CEFBS_None, // VCVTSS2USIZrr_Int = 6796 |
| 151011 | CEFBS_None, // VCVTSS2USIZrrb_Int = 6797 |
| 151012 | CEFBS_None, // VCVTTPD2DQYrm = 6798 |
| 151013 | CEFBS_None, // VCVTTPD2DQYrr = 6799 |
| 151014 | CEFBS_None, // VCVTTPD2DQZ128rm = 6800 |
| 151015 | CEFBS_None, // VCVTTPD2DQZ128rmb = 6801 |
| 151016 | CEFBS_None, // VCVTTPD2DQZ128rmbk = 6802 |
| 151017 | CEFBS_None, // VCVTTPD2DQZ128rmbkz = 6803 |
| 151018 | CEFBS_None, // VCVTTPD2DQZ128rmk = 6804 |
| 151019 | CEFBS_None, // VCVTTPD2DQZ128rmkz = 6805 |
| 151020 | CEFBS_None, // VCVTTPD2DQZ128rr = 6806 |
| 151021 | CEFBS_None, // VCVTTPD2DQZ128rrk = 6807 |
| 151022 | CEFBS_None, // VCVTTPD2DQZ128rrkz = 6808 |
| 151023 | CEFBS_None, // VCVTTPD2DQZ256rm = 6809 |
| 151024 | CEFBS_None, // VCVTTPD2DQZ256rmb = 6810 |
| 151025 | CEFBS_None, // VCVTTPD2DQZ256rmbk = 6811 |
| 151026 | CEFBS_None, // VCVTTPD2DQZ256rmbkz = 6812 |
| 151027 | CEFBS_None, // VCVTTPD2DQZ256rmk = 6813 |
| 151028 | CEFBS_None, // VCVTTPD2DQZ256rmkz = 6814 |
| 151029 | CEFBS_None, // VCVTTPD2DQZ256rr = 6815 |
| 151030 | CEFBS_None, // VCVTTPD2DQZ256rrk = 6816 |
| 151031 | CEFBS_None, // VCVTTPD2DQZ256rrkz = 6817 |
| 151032 | CEFBS_None, // VCVTTPD2DQZrm = 6818 |
| 151033 | CEFBS_None, // VCVTTPD2DQZrmb = 6819 |
| 151034 | CEFBS_None, // VCVTTPD2DQZrmbk = 6820 |
| 151035 | CEFBS_None, // VCVTTPD2DQZrmbkz = 6821 |
| 151036 | CEFBS_None, // VCVTTPD2DQZrmk = 6822 |
| 151037 | CEFBS_None, // VCVTTPD2DQZrmkz = 6823 |
| 151038 | CEFBS_None, // VCVTTPD2DQZrr = 6824 |
| 151039 | CEFBS_None, // VCVTTPD2DQZrrb = 6825 |
| 151040 | CEFBS_None, // VCVTTPD2DQZrrbk = 6826 |
| 151041 | CEFBS_None, // VCVTTPD2DQZrrbkz = 6827 |
| 151042 | CEFBS_None, // VCVTTPD2DQZrrk = 6828 |
| 151043 | CEFBS_None, // VCVTTPD2DQZrrkz = 6829 |
| 151044 | CEFBS_None, // VCVTTPD2DQrm = 6830 |
| 151045 | CEFBS_None, // VCVTTPD2DQrr = 6831 |
| 151046 | CEFBS_None, // VCVTTPD2QQZ128rm = 6832 |
| 151047 | CEFBS_None, // VCVTTPD2QQZ128rmb = 6833 |
| 151048 | CEFBS_None, // VCVTTPD2QQZ128rmbk = 6834 |
| 151049 | CEFBS_None, // VCVTTPD2QQZ128rmbkz = 6835 |
| 151050 | CEFBS_None, // VCVTTPD2QQZ128rmk = 6836 |
| 151051 | CEFBS_None, // VCVTTPD2QQZ128rmkz = 6837 |
| 151052 | CEFBS_None, // VCVTTPD2QQZ128rr = 6838 |
| 151053 | CEFBS_None, // VCVTTPD2QQZ128rrk = 6839 |
| 151054 | CEFBS_None, // VCVTTPD2QQZ128rrkz = 6840 |
| 151055 | CEFBS_None, // VCVTTPD2QQZ256rm = 6841 |
| 151056 | CEFBS_None, // VCVTTPD2QQZ256rmb = 6842 |
| 151057 | CEFBS_None, // VCVTTPD2QQZ256rmbk = 6843 |
| 151058 | CEFBS_None, // VCVTTPD2QQZ256rmbkz = 6844 |
| 151059 | CEFBS_None, // VCVTTPD2QQZ256rmk = 6845 |
| 151060 | CEFBS_None, // VCVTTPD2QQZ256rmkz = 6846 |
| 151061 | CEFBS_None, // VCVTTPD2QQZ256rr = 6847 |
| 151062 | CEFBS_None, // VCVTTPD2QQZ256rrk = 6848 |
| 151063 | CEFBS_None, // VCVTTPD2QQZ256rrkz = 6849 |
| 151064 | CEFBS_None, // VCVTTPD2QQZrm = 6850 |
| 151065 | CEFBS_None, // VCVTTPD2QQZrmb = 6851 |
| 151066 | CEFBS_None, // VCVTTPD2QQZrmbk = 6852 |
| 151067 | CEFBS_None, // VCVTTPD2QQZrmbkz = 6853 |
| 151068 | CEFBS_None, // VCVTTPD2QQZrmk = 6854 |
| 151069 | CEFBS_None, // VCVTTPD2QQZrmkz = 6855 |
| 151070 | CEFBS_None, // VCVTTPD2QQZrr = 6856 |
| 151071 | CEFBS_None, // VCVTTPD2QQZrrb = 6857 |
| 151072 | CEFBS_None, // VCVTTPD2QQZrrbk = 6858 |
| 151073 | CEFBS_None, // VCVTTPD2QQZrrbkz = 6859 |
| 151074 | CEFBS_None, // VCVTTPD2QQZrrk = 6860 |
| 151075 | CEFBS_None, // VCVTTPD2QQZrrkz = 6861 |
| 151076 | CEFBS_None, // VCVTTPD2UDQZ128rm = 6862 |
| 151077 | CEFBS_None, // VCVTTPD2UDQZ128rmb = 6863 |
| 151078 | CEFBS_None, // VCVTTPD2UDQZ128rmbk = 6864 |
| 151079 | CEFBS_None, // VCVTTPD2UDQZ128rmbkz = 6865 |
| 151080 | CEFBS_None, // VCVTTPD2UDQZ128rmk = 6866 |
| 151081 | CEFBS_None, // VCVTTPD2UDQZ128rmkz = 6867 |
| 151082 | CEFBS_None, // VCVTTPD2UDQZ128rr = 6868 |
| 151083 | CEFBS_None, // VCVTTPD2UDQZ128rrk = 6869 |
| 151084 | CEFBS_None, // VCVTTPD2UDQZ128rrkz = 6870 |
| 151085 | CEFBS_None, // VCVTTPD2UDQZ256rm = 6871 |
| 151086 | CEFBS_None, // VCVTTPD2UDQZ256rmb = 6872 |
| 151087 | CEFBS_None, // VCVTTPD2UDQZ256rmbk = 6873 |
| 151088 | CEFBS_None, // VCVTTPD2UDQZ256rmbkz = 6874 |
| 151089 | CEFBS_None, // VCVTTPD2UDQZ256rmk = 6875 |
| 151090 | CEFBS_None, // VCVTTPD2UDQZ256rmkz = 6876 |
| 151091 | CEFBS_None, // VCVTTPD2UDQZ256rr = 6877 |
| 151092 | CEFBS_None, // VCVTTPD2UDQZ256rrk = 6878 |
| 151093 | CEFBS_None, // VCVTTPD2UDQZ256rrkz = 6879 |
| 151094 | CEFBS_None, // VCVTTPD2UDQZrm = 6880 |
| 151095 | CEFBS_None, // VCVTTPD2UDQZrmb = 6881 |
| 151096 | CEFBS_None, // VCVTTPD2UDQZrmbk = 6882 |
| 151097 | CEFBS_None, // VCVTTPD2UDQZrmbkz = 6883 |
| 151098 | CEFBS_None, // VCVTTPD2UDQZrmk = 6884 |
| 151099 | CEFBS_None, // VCVTTPD2UDQZrmkz = 6885 |
| 151100 | CEFBS_None, // VCVTTPD2UDQZrr = 6886 |
| 151101 | CEFBS_None, // VCVTTPD2UDQZrrb = 6887 |
| 151102 | CEFBS_None, // VCVTTPD2UDQZrrbk = 6888 |
| 151103 | CEFBS_None, // VCVTTPD2UDQZrrbkz = 6889 |
| 151104 | CEFBS_None, // VCVTTPD2UDQZrrk = 6890 |
| 151105 | CEFBS_None, // VCVTTPD2UDQZrrkz = 6891 |
| 151106 | CEFBS_None, // VCVTTPD2UQQZ128rm = 6892 |
| 151107 | CEFBS_None, // VCVTTPD2UQQZ128rmb = 6893 |
| 151108 | CEFBS_None, // VCVTTPD2UQQZ128rmbk = 6894 |
| 151109 | CEFBS_None, // VCVTTPD2UQQZ128rmbkz = 6895 |
| 151110 | CEFBS_None, // VCVTTPD2UQQZ128rmk = 6896 |
| 151111 | CEFBS_None, // VCVTTPD2UQQZ128rmkz = 6897 |
| 151112 | CEFBS_None, // VCVTTPD2UQQZ128rr = 6898 |
| 151113 | CEFBS_None, // VCVTTPD2UQQZ128rrk = 6899 |
| 151114 | CEFBS_None, // VCVTTPD2UQQZ128rrkz = 6900 |
| 151115 | CEFBS_None, // VCVTTPD2UQQZ256rm = 6901 |
| 151116 | CEFBS_None, // VCVTTPD2UQQZ256rmb = 6902 |
| 151117 | CEFBS_None, // VCVTTPD2UQQZ256rmbk = 6903 |
| 151118 | CEFBS_None, // VCVTTPD2UQQZ256rmbkz = 6904 |
| 151119 | CEFBS_None, // VCVTTPD2UQQZ256rmk = 6905 |
| 151120 | CEFBS_None, // VCVTTPD2UQQZ256rmkz = 6906 |
| 151121 | CEFBS_None, // VCVTTPD2UQQZ256rr = 6907 |
| 151122 | CEFBS_None, // VCVTTPD2UQQZ256rrk = 6908 |
| 151123 | CEFBS_None, // VCVTTPD2UQQZ256rrkz = 6909 |
| 151124 | CEFBS_None, // VCVTTPD2UQQZrm = 6910 |
| 151125 | CEFBS_None, // VCVTTPD2UQQZrmb = 6911 |
| 151126 | CEFBS_None, // VCVTTPD2UQQZrmbk = 6912 |
| 151127 | CEFBS_None, // VCVTTPD2UQQZrmbkz = 6913 |
| 151128 | CEFBS_None, // VCVTTPD2UQQZrmk = 6914 |
| 151129 | CEFBS_None, // VCVTTPD2UQQZrmkz = 6915 |
| 151130 | CEFBS_None, // VCVTTPD2UQQZrr = 6916 |
| 151131 | CEFBS_None, // VCVTTPD2UQQZrrb = 6917 |
| 151132 | CEFBS_None, // VCVTTPD2UQQZrrbk = 6918 |
| 151133 | CEFBS_None, // VCVTTPD2UQQZrrbkz = 6919 |
| 151134 | CEFBS_None, // VCVTTPD2UQQZrrk = 6920 |
| 151135 | CEFBS_None, // VCVTTPD2UQQZrrkz = 6921 |
| 151136 | CEFBS_None, // VCVTTPH2DQZ128rm = 6922 |
| 151137 | CEFBS_None, // VCVTTPH2DQZ128rmb = 6923 |
| 151138 | CEFBS_None, // VCVTTPH2DQZ128rmbk = 6924 |
| 151139 | CEFBS_None, // VCVTTPH2DQZ128rmbkz = 6925 |
| 151140 | CEFBS_None, // VCVTTPH2DQZ128rmk = 6926 |
| 151141 | CEFBS_None, // VCVTTPH2DQZ128rmkz = 6927 |
| 151142 | CEFBS_None, // VCVTTPH2DQZ128rr = 6928 |
| 151143 | CEFBS_None, // VCVTTPH2DQZ128rrk = 6929 |
| 151144 | CEFBS_None, // VCVTTPH2DQZ128rrkz = 6930 |
| 151145 | CEFBS_None, // VCVTTPH2DQZ256rm = 6931 |
| 151146 | CEFBS_None, // VCVTTPH2DQZ256rmb = 6932 |
| 151147 | CEFBS_None, // VCVTTPH2DQZ256rmbk = 6933 |
| 151148 | CEFBS_None, // VCVTTPH2DQZ256rmbkz = 6934 |
| 151149 | CEFBS_None, // VCVTTPH2DQZ256rmk = 6935 |
| 151150 | CEFBS_None, // VCVTTPH2DQZ256rmkz = 6936 |
| 151151 | CEFBS_None, // VCVTTPH2DQZ256rr = 6937 |
| 151152 | CEFBS_None, // VCVTTPH2DQZ256rrk = 6938 |
| 151153 | CEFBS_None, // VCVTTPH2DQZ256rrkz = 6939 |
| 151154 | CEFBS_None, // VCVTTPH2DQZrm = 6940 |
| 151155 | CEFBS_None, // VCVTTPH2DQZrmb = 6941 |
| 151156 | CEFBS_None, // VCVTTPH2DQZrmbk = 6942 |
| 151157 | CEFBS_None, // VCVTTPH2DQZrmbkz = 6943 |
| 151158 | CEFBS_None, // VCVTTPH2DQZrmk = 6944 |
| 151159 | CEFBS_None, // VCVTTPH2DQZrmkz = 6945 |
| 151160 | CEFBS_None, // VCVTTPH2DQZrr = 6946 |
| 151161 | CEFBS_None, // VCVTTPH2DQZrrb = 6947 |
| 151162 | CEFBS_None, // VCVTTPH2DQZrrbk = 6948 |
| 151163 | CEFBS_None, // VCVTTPH2DQZrrbkz = 6949 |
| 151164 | CEFBS_None, // VCVTTPH2DQZrrk = 6950 |
| 151165 | CEFBS_None, // VCVTTPH2DQZrrkz = 6951 |
| 151166 | CEFBS_None, // VCVTTPH2QQZ128rm = 6952 |
| 151167 | CEFBS_None, // VCVTTPH2QQZ128rmb = 6953 |
| 151168 | CEFBS_None, // VCVTTPH2QQZ128rmbk = 6954 |
| 151169 | CEFBS_None, // VCVTTPH2QQZ128rmbkz = 6955 |
| 151170 | CEFBS_None, // VCVTTPH2QQZ128rmk = 6956 |
| 151171 | CEFBS_None, // VCVTTPH2QQZ128rmkz = 6957 |
| 151172 | CEFBS_None, // VCVTTPH2QQZ128rr = 6958 |
| 151173 | CEFBS_None, // VCVTTPH2QQZ128rrk = 6959 |
| 151174 | CEFBS_None, // VCVTTPH2QQZ128rrkz = 6960 |
| 151175 | CEFBS_None, // VCVTTPH2QQZ256rm = 6961 |
| 151176 | CEFBS_None, // VCVTTPH2QQZ256rmb = 6962 |
| 151177 | CEFBS_None, // VCVTTPH2QQZ256rmbk = 6963 |
| 151178 | CEFBS_None, // VCVTTPH2QQZ256rmbkz = 6964 |
| 151179 | CEFBS_None, // VCVTTPH2QQZ256rmk = 6965 |
| 151180 | CEFBS_None, // VCVTTPH2QQZ256rmkz = 6966 |
| 151181 | CEFBS_None, // VCVTTPH2QQZ256rr = 6967 |
| 151182 | CEFBS_None, // VCVTTPH2QQZ256rrk = 6968 |
| 151183 | CEFBS_None, // VCVTTPH2QQZ256rrkz = 6969 |
| 151184 | CEFBS_None, // VCVTTPH2QQZrm = 6970 |
| 151185 | CEFBS_None, // VCVTTPH2QQZrmb = 6971 |
| 151186 | CEFBS_None, // VCVTTPH2QQZrmbk = 6972 |
| 151187 | CEFBS_None, // VCVTTPH2QQZrmbkz = 6973 |
| 151188 | CEFBS_None, // VCVTTPH2QQZrmk = 6974 |
| 151189 | CEFBS_None, // VCVTTPH2QQZrmkz = 6975 |
| 151190 | CEFBS_None, // VCVTTPH2QQZrr = 6976 |
| 151191 | CEFBS_None, // VCVTTPH2QQZrrb = 6977 |
| 151192 | CEFBS_None, // VCVTTPH2QQZrrbk = 6978 |
| 151193 | CEFBS_None, // VCVTTPH2QQZrrbkz = 6979 |
| 151194 | CEFBS_None, // VCVTTPH2QQZrrk = 6980 |
| 151195 | CEFBS_None, // VCVTTPH2QQZrrkz = 6981 |
| 151196 | CEFBS_None, // VCVTTPH2UDQZ128rm = 6982 |
| 151197 | CEFBS_None, // VCVTTPH2UDQZ128rmb = 6983 |
| 151198 | CEFBS_None, // VCVTTPH2UDQZ128rmbk = 6984 |
| 151199 | CEFBS_None, // VCVTTPH2UDQZ128rmbkz = 6985 |
| 151200 | CEFBS_None, // VCVTTPH2UDQZ128rmk = 6986 |
| 151201 | CEFBS_None, // VCVTTPH2UDQZ128rmkz = 6987 |
| 151202 | CEFBS_None, // VCVTTPH2UDQZ128rr = 6988 |
| 151203 | CEFBS_None, // VCVTTPH2UDQZ128rrk = 6989 |
| 151204 | CEFBS_None, // VCVTTPH2UDQZ128rrkz = 6990 |
| 151205 | CEFBS_None, // VCVTTPH2UDQZ256rm = 6991 |
| 151206 | CEFBS_None, // VCVTTPH2UDQZ256rmb = 6992 |
| 151207 | CEFBS_None, // VCVTTPH2UDQZ256rmbk = 6993 |
| 151208 | CEFBS_None, // VCVTTPH2UDQZ256rmbkz = 6994 |
| 151209 | CEFBS_None, // VCVTTPH2UDQZ256rmk = 6995 |
| 151210 | CEFBS_None, // VCVTTPH2UDQZ256rmkz = 6996 |
| 151211 | CEFBS_None, // VCVTTPH2UDQZ256rr = 6997 |
| 151212 | CEFBS_None, // VCVTTPH2UDQZ256rrk = 6998 |
| 151213 | CEFBS_None, // VCVTTPH2UDQZ256rrkz = 6999 |
| 151214 | CEFBS_None, // VCVTTPH2UDQZrm = 7000 |
| 151215 | CEFBS_None, // VCVTTPH2UDQZrmb = 7001 |
| 151216 | CEFBS_None, // VCVTTPH2UDQZrmbk = 7002 |
| 151217 | CEFBS_None, // VCVTTPH2UDQZrmbkz = 7003 |
| 151218 | CEFBS_None, // VCVTTPH2UDQZrmk = 7004 |
| 151219 | CEFBS_None, // VCVTTPH2UDQZrmkz = 7005 |
| 151220 | CEFBS_None, // VCVTTPH2UDQZrr = 7006 |
| 151221 | CEFBS_None, // VCVTTPH2UDQZrrb = 7007 |
| 151222 | CEFBS_None, // VCVTTPH2UDQZrrbk = 7008 |
| 151223 | CEFBS_None, // VCVTTPH2UDQZrrbkz = 7009 |
| 151224 | CEFBS_None, // VCVTTPH2UDQZrrk = 7010 |
| 151225 | CEFBS_None, // VCVTTPH2UDQZrrkz = 7011 |
| 151226 | CEFBS_None, // VCVTTPH2UQQZ128rm = 7012 |
| 151227 | CEFBS_None, // VCVTTPH2UQQZ128rmb = 7013 |
| 151228 | CEFBS_None, // VCVTTPH2UQQZ128rmbk = 7014 |
| 151229 | CEFBS_None, // VCVTTPH2UQQZ128rmbkz = 7015 |
| 151230 | CEFBS_None, // VCVTTPH2UQQZ128rmk = 7016 |
| 151231 | CEFBS_None, // VCVTTPH2UQQZ128rmkz = 7017 |
| 151232 | CEFBS_None, // VCVTTPH2UQQZ128rr = 7018 |
| 151233 | CEFBS_None, // VCVTTPH2UQQZ128rrk = 7019 |
| 151234 | CEFBS_None, // VCVTTPH2UQQZ128rrkz = 7020 |
| 151235 | CEFBS_None, // VCVTTPH2UQQZ256rm = 7021 |
| 151236 | CEFBS_None, // VCVTTPH2UQQZ256rmb = 7022 |
| 151237 | CEFBS_None, // VCVTTPH2UQQZ256rmbk = 7023 |
| 151238 | CEFBS_None, // VCVTTPH2UQQZ256rmbkz = 7024 |
| 151239 | CEFBS_None, // VCVTTPH2UQQZ256rmk = 7025 |
| 151240 | CEFBS_None, // VCVTTPH2UQQZ256rmkz = 7026 |
| 151241 | CEFBS_None, // VCVTTPH2UQQZ256rr = 7027 |
| 151242 | CEFBS_None, // VCVTTPH2UQQZ256rrk = 7028 |
| 151243 | CEFBS_None, // VCVTTPH2UQQZ256rrkz = 7029 |
| 151244 | CEFBS_None, // VCVTTPH2UQQZrm = 7030 |
| 151245 | CEFBS_None, // VCVTTPH2UQQZrmb = 7031 |
| 151246 | CEFBS_None, // VCVTTPH2UQQZrmbk = 7032 |
| 151247 | CEFBS_None, // VCVTTPH2UQQZrmbkz = 7033 |
| 151248 | CEFBS_None, // VCVTTPH2UQQZrmk = 7034 |
| 151249 | CEFBS_None, // VCVTTPH2UQQZrmkz = 7035 |
| 151250 | CEFBS_None, // VCVTTPH2UQQZrr = 7036 |
| 151251 | CEFBS_None, // VCVTTPH2UQQZrrb = 7037 |
| 151252 | CEFBS_None, // VCVTTPH2UQQZrrbk = 7038 |
| 151253 | CEFBS_None, // VCVTTPH2UQQZrrbkz = 7039 |
| 151254 | CEFBS_None, // VCVTTPH2UQQZrrk = 7040 |
| 151255 | CEFBS_None, // VCVTTPH2UQQZrrkz = 7041 |
| 151256 | CEFBS_None, // VCVTTPH2UWZ128rm = 7042 |
| 151257 | CEFBS_None, // VCVTTPH2UWZ128rmb = 7043 |
| 151258 | CEFBS_None, // VCVTTPH2UWZ128rmbk = 7044 |
| 151259 | CEFBS_None, // VCVTTPH2UWZ128rmbkz = 7045 |
| 151260 | CEFBS_None, // VCVTTPH2UWZ128rmk = 7046 |
| 151261 | CEFBS_None, // VCVTTPH2UWZ128rmkz = 7047 |
| 151262 | CEFBS_None, // VCVTTPH2UWZ128rr = 7048 |
| 151263 | CEFBS_None, // VCVTTPH2UWZ128rrk = 7049 |
| 151264 | CEFBS_None, // VCVTTPH2UWZ128rrkz = 7050 |
| 151265 | CEFBS_None, // VCVTTPH2UWZ256rm = 7051 |
| 151266 | CEFBS_None, // VCVTTPH2UWZ256rmb = 7052 |
| 151267 | CEFBS_None, // VCVTTPH2UWZ256rmbk = 7053 |
| 151268 | CEFBS_None, // VCVTTPH2UWZ256rmbkz = 7054 |
| 151269 | CEFBS_None, // VCVTTPH2UWZ256rmk = 7055 |
| 151270 | CEFBS_None, // VCVTTPH2UWZ256rmkz = 7056 |
| 151271 | CEFBS_None, // VCVTTPH2UWZ256rr = 7057 |
| 151272 | CEFBS_None, // VCVTTPH2UWZ256rrk = 7058 |
| 151273 | CEFBS_None, // VCVTTPH2UWZ256rrkz = 7059 |
| 151274 | CEFBS_None, // VCVTTPH2UWZrm = 7060 |
| 151275 | CEFBS_None, // VCVTTPH2UWZrmb = 7061 |
| 151276 | CEFBS_None, // VCVTTPH2UWZrmbk = 7062 |
| 151277 | CEFBS_None, // VCVTTPH2UWZrmbkz = 7063 |
| 151278 | CEFBS_None, // VCVTTPH2UWZrmk = 7064 |
| 151279 | CEFBS_None, // VCVTTPH2UWZrmkz = 7065 |
| 151280 | CEFBS_None, // VCVTTPH2UWZrr = 7066 |
| 151281 | CEFBS_None, // VCVTTPH2UWZrrb = 7067 |
| 151282 | CEFBS_None, // VCVTTPH2UWZrrbk = 7068 |
| 151283 | CEFBS_None, // VCVTTPH2UWZrrbkz = 7069 |
| 151284 | CEFBS_None, // VCVTTPH2UWZrrk = 7070 |
| 151285 | CEFBS_None, // VCVTTPH2UWZrrkz = 7071 |
| 151286 | CEFBS_None, // VCVTTPH2WZ128rm = 7072 |
| 151287 | CEFBS_None, // VCVTTPH2WZ128rmb = 7073 |
| 151288 | CEFBS_None, // VCVTTPH2WZ128rmbk = 7074 |
| 151289 | CEFBS_None, // VCVTTPH2WZ128rmbkz = 7075 |
| 151290 | CEFBS_None, // VCVTTPH2WZ128rmk = 7076 |
| 151291 | CEFBS_None, // VCVTTPH2WZ128rmkz = 7077 |
| 151292 | CEFBS_None, // VCVTTPH2WZ128rr = 7078 |
| 151293 | CEFBS_None, // VCVTTPH2WZ128rrk = 7079 |
| 151294 | CEFBS_None, // VCVTTPH2WZ128rrkz = 7080 |
| 151295 | CEFBS_None, // VCVTTPH2WZ256rm = 7081 |
| 151296 | CEFBS_None, // VCVTTPH2WZ256rmb = 7082 |
| 151297 | CEFBS_None, // VCVTTPH2WZ256rmbk = 7083 |
| 151298 | CEFBS_None, // VCVTTPH2WZ256rmbkz = 7084 |
| 151299 | CEFBS_None, // VCVTTPH2WZ256rmk = 7085 |
| 151300 | CEFBS_None, // VCVTTPH2WZ256rmkz = 7086 |
| 151301 | CEFBS_None, // VCVTTPH2WZ256rr = 7087 |
| 151302 | CEFBS_None, // VCVTTPH2WZ256rrk = 7088 |
| 151303 | CEFBS_None, // VCVTTPH2WZ256rrkz = 7089 |
| 151304 | CEFBS_None, // VCVTTPH2WZrm = 7090 |
| 151305 | CEFBS_None, // VCVTTPH2WZrmb = 7091 |
| 151306 | CEFBS_None, // VCVTTPH2WZrmbk = 7092 |
| 151307 | CEFBS_None, // VCVTTPH2WZrmbkz = 7093 |
| 151308 | CEFBS_None, // VCVTTPH2WZrmk = 7094 |
| 151309 | CEFBS_None, // VCVTTPH2WZrmkz = 7095 |
| 151310 | CEFBS_None, // VCVTTPH2WZrr = 7096 |
| 151311 | CEFBS_None, // VCVTTPH2WZrrb = 7097 |
| 151312 | CEFBS_None, // VCVTTPH2WZrrbk = 7098 |
| 151313 | CEFBS_None, // VCVTTPH2WZrrbkz = 7099 |
| 151314 | CEFBS_None, // VCVTTPH2WZrrk = 7100 |
| 151315 | CEFBS_None, // VCVTTPH2WZrrkz = 7101 |
| 151316 | CEFBS_None, // VCVTTPS2DQYrm = 7102 |
| 151317 | CEFBS_None, // VCVTTPS2DQYrr = 7103 |
| 151318 | CEFBS_None, // VCVTTPS2DQZ128rm = 7104 |
| 151319 | CEFBS_None, // VCVTTPS2DQZ128rmb = 7105 |
| 151320 | CEFBS_None, // VCVTTPS2DQZ128rmbk = 7106 |
| 151321 | CEFBS_None, // VCVTTPS2DQZ128rmbkz = 7107 |
| 151322 | CEFBS_None, // VCVTTPS2DQZ128rmk = 7108 |
| 151323 | CEFBS_None, // VCVTTPS2DQZ128rmkz = 7109 |
| 151324 | CEFBS_None, // VCVTTPS2DQZ128rr = 7110 |
| 151325 | CEFBS_None, // VCVTTPS2DQZ128rrk = 7111 |
| 151326 | CEFBS_None, // VCVTTPS2DQZ128rrkz = 7112 |
| 151327 | CEFBS_None, // VCVTTPS2DQZ256rm = 7113 |
| 151328 | CEFBS_None, // VCVTTPS2DQZ256rmb = 7114 |
| 151329 | CEFBS_None, // VCVTTPS2DQZ256rmbk = 7115 |
| 151330 | CEFBS_None, // VCVTTPS2DQZ256rmbkz = 7116 |
| 151331 | CEFBS_None, // VCVTTPS2DQZ256rmk = 7117 |
| 151332 | CEFBS_None, // VCVTTPS2DQZ256rmkz = 7118 |
| 151333 | CEFBS_None, // VCVTTPS2DQZ256rr = 7119 |
| 151334 | CEFBS_None, // VCVTTPS2DQZ256rrk = 7120 |
| 151335 | CEFBS_None, // VCVTTPS2DQZ256rrkz = 7121 |
| 151336 | CEFBS_None, // VCVTTPS2DQZrm = 7122 |
| 151337 | CEFBS_None, // VCVTTPS2DQZrmb = 7123 |
| 151338 | CEFBS_None, // VCVTTPS2DQZrmbk = 7124 |
| 151339 | CEFBS_None, // VCVTTPS2DQZrmbkz = 7125 |
| 151340 | CEFBS_None, // VCVTTPS2DQZrmk = 7126 |
| 151341 | CEFBS_None, // VCVTTPS2DQZrmkz = 7127 |
| 151342 | CEFBS_None, // VCVTTPS2DQZrr = 7128 |
| 151343 | CEFBS_None, // VCVTTPS2DQZrrb = 7129 |
| 151344 | CEFBS_None, // VCVTTPS2DQZrrbk = 7130 |
| 151345 | CEFBS_None, // VCVTTPS2DQZrrbkz = 7131 |
| 151346 | CEFBS_None, // VCVTTPS2DQZrrk = 7132 |
| 151347 | CEFBS_None, // VCVTTPS2DQZrrkz = 7133 |
| 151348 | CEFBS_None, // VCVTTPS2DQrm = 7134 |
| 151349 | CEFBS_None, // VCVTTPS2DQrr = 7135 |
| 151350 | CEFBS_None, // VCVTTPS2QQZ128rm = 7136 |
| 151351 | CEFBS_None, // VCVTTPS2QQZ128rmb = 7137 |
| 151352 | CEFBS_None, // VCVTTPS2QQZ128rmbk = 7138 |
| 151353 | CEFBS_None, // VCVTTPS2QQZ128rmbkz = 7139 |
| 151354 | CEFBS_None, // VCVTTPS2QQZ128rmk = 7140 |
| 151355 | CEFBS_None, // VCVTTPS2QQZ128rmkz = 7141 |
| 151356 | CEFBS_None, // VCVTTPS2QQZ128rr = 7142 |
| 151357 | CEFBS_None, // VCVTTPS2QQZ128rrk = 7143 |
| 151358 | CEFBS_None, // VCVTTPS2QQZ128rrkz = 7144 |
| 151359 | CEFBS_None, // VCVTTPS2QQZ256rm = 7145 |
| 151360 | CEFBS_None, // VCVTTPS2QQZ256rmb = 7146 |
| 151361 | CEFBS_None, // VCVTTPS2QQZ256rmbk = 7147 |
| 151362 | CEFBS_None, // VCVTTPS2QQZ256rmbkz = 7148 |
| 151363 | CEFBS_None, // VCVTTPS2QQZ256rmk = 7149 |
| 151364 | CEFBS_None, // VCVTTPS2QQZ256rmkz = 7150 |
| 151365 | CEFBS_None, // VCVTTPS2QQZ256rr = 7151 |
| 151366 | CEFBS_None, // VCVTTPS2QQZ256rrk = 7152 |
| 151367 | CEFBS_None, // VCVTTPS2QQZ256rrkz = 7153 |
| 151368 | CEFBS_None, // VCVTTPS2QQZrm = 7154 |
| 151369 | CEFBS_None, // VCVTTPS2QQZrmb = 7155 |
| 151370 | CEFBS_None, // VCVTTPS2QQZrmbk = 7156 |
| 151371 | CEFBS_None, // VCVTTPS2QQZrmbkz = 7157 |
| 151372 | CEFBS_None, // VCVTTPS2QQZrmk = 7158 |
| 151373 | CEFBS_None, // VCVTTPS2QQZrmkz = 7159 |
| 151374 | CEFBS_None, // VCVTTPS2QQZrr = 7160 |
| 151375 | CEFBS_None, // VCVTTPS2QQZrrb = 7161 |
| 151376 | CEFBS_None, // VCVTTPS2QQZrrbk = 7162 |
| 151377 | CEFBS_None, // VCVTTPS2QQZrrbkz = 7163 |
| 151378 | CEFBS_None, // VCVTTPS2QQZrrk = 7164 |
| 151379 | CEFBS_None, // VCVTTPS2QQZrrkz = 7165 |
| 151380 | CEFBS_None, // VCVTTPS2UDQZ128rm = 7166 |
| 151381 | CEFBS_None, // VCVTTPS2UDQZ128rmb = 7167 |
| 151382 | CEFBS_None, // VCVTTPS2UDQZ128rmbk = 7168 |
| 151383 | CEFBS_None, // VCVTTPS2UDQZ128rmbkz = 7169 |
| 151384 | CEFBS_None, // VCVTTPS2UDQZ128rmk = 7170 |
| 151385 | CEFBS_None, // VCVTTPS2UDQZ128rmkz = 7171 |
| 151386 | CEFBS_None, // VCVTTPS2UDQZ128rr = 7172 |
| 151387 | CEFBS_None, // VCVTTPS2UDQZ128rrk = 7173 |
| 151388 | CEFBS_None, // VCVTTPS2UDQZ128rrkz = 7174 |
| 151389 | CEFBS_None, // VCVTTPS2UDQZ256rm = 7175 |
| 151390 | CEFBS_None, // VCVTTPS2UDQZ256rmb = 7176 |
| 151391 | CEFBS_None, // VCVTTPS2UDQZ256rmbk = 7177 |
| 151392 | CEFBS_None, // VCVTTPS2UDQZ256rmbkz = 7178 |
| 151393 | CEFBS_None, // VCVTTPS2UDQZ256rmk = 7179 |
| 151394 | CEFBS_None, // VCVTTPS2UDQZ256rmkz = 7180 |
| 151395 | CEFBS_None, // VCVTTPS2UDQZ256rr = 7181 |
| 151396 | CEFBS_None, // VCVTTPS2UDQZ256rrk = 7182 |
| 151397 | CEFBS_None, // VCVTTPS2UDQZ256rrkz = 7183 |
| 151398 | CEFBS_None, // VCVTTPS2UDQZrm = 7184 |
| 151399 | CEFBS_None, // VCVTTPS2UDQZrmb = 7185 |
| 151400 | CEFBS_None, // VCVTTPS2UDQZrmbk = 7186 |
| 151401 | CEFBS_None, // VCVTTPS2UDQZrmbkz = 7187 |
| 151402 | CEFBS_None, // VCVTTPS2UDQZrmk = 7188 |
| 151403 | CEFBS_None, // VCVTTPS2UDQZrmkz = 7189 |
| 151404 | CEFBS_None, // VCVTTPS2UDQZrr = 7190 |
| 151405 | CEFBS_None, // VCVTTPS2UDQZrrb = 7191 |
| 151406 | CEFBS_None, // VCVTTPS2UDQZrrbk = 7192 |
| 151407 | CEFBS_None, // VCVTTPS2UDQZrrbkz = 7193 |
| 151408 | CEFBS_None, // VCVTTPS2UDQZrrk = 7194 |
| 151409 | CEFBS_None, // VCVTTPS2UDQZrrkz = 7195 |
| 151410 | CEFBS_None, // VCVTTPS2UQQZ128rm = 7196 |
| 151411 | CEFBS_None, // VCVTTPS2UQQZ128rmb = 7197 |
| 151412 | CEFBS_None, // VCVTTPS2UQQZ128rmbk = 7198 |
| 151413 | CEFBS_None, // VCVTTPS2UQQZ128rmbkz = 7199 |
| 151414 | CEFBS_None, // VCVTTPS2UQQZ128rmk = 7200 |
| 151415 | CEFBS_None, // VCVTTPS2UQQZ128rmkz = 7201 |
| 151416 | CEFBS_None, // VCVTTPS2UQQZ128rr = 7202 |
| 151417 | CEFBS_None, // VCVTTPS2UQQZ128rrk = 7203 |
| 151418 | CEFBS_None, // VCVTTPS2UQQZ128rrkz = 7204 |
| 151419 | CEFBS_None, // VCVTTPS2UQQZ256rm = 7205 |
| 151420 | CEFBS_None, // VCVTTPS2UQQZ256rmb = 7206 |
| 151421 | CEFBS_None, // VCVTTPS2UQQZ256rmbk = 7207 |
| 151422 | CEFBS_None, // VCVTTPS2UQQZ256rmbkz = 7208 |
| 151423 | CEFBS_None, // VCVTTPS2UQQZ256rmk = 7209 |
| 151424 | CEFBS_None, // VCVTTPS2UQQZ256rmkz = 7210 |
| 151425 | CEFBS_None, // VCVTTPS2UQQZ256rr = 7211 |
| 151426 | CEFBS_None, // VCVTTPS2UQQZ256rrk = 7212 |
| 151427 | CEFBS_None, // VCVTTPS2UQQZ256rrkz = 7213 |
| 151428 | CEFBS_None, // VCVTTPS2UQQZrm = 7214 |
| 151429 | CEFBS_None, // VCVTTPS2UQQZrmb = 7215 |
| 151430 | CEFBS_None, // VCVTTPS2UQQZrmbk = 7216 |
| 151431 | CEFBS_None, // VCVTTPS2UQQZrmbkz = 7217 |
| 151432 | CEFBS_None, // VCVTTPS2UQQZrmk = 7218 |
| 151433 | CEFBS_None, // VCVTTPS2UQQZrmkz = 7219 |
| 151434 | CEFBS_None, // VCVTTPS2UQQZrr = 7220 |
| 151435 | CEFBS_None, // VCVTTPS2UQQZrrb = 7221 |
| 151436 | CEFBS_None, // VCVTTPS2UQQZrrbk = 7222 |
| 151437 | CEFBS_None, // VCVTTPS2UQQZrrbkz = 7223 |
| 151438 | CEFBS_None, // VCVTTPS2UQQZrrk = 7224 |
| 151439 | CEFBS_None, // VCVTTPS2UQQZrrkz = 7225 |
| 151440 | CEFBS_None, // VCVTTSD2SI64Zrm = 7226 |
| 151441 | CEFBS_None, // VCVTTSD2SI64Zrm_Int = 7227 |
| 151442 | CEFBS_None, // VCVTTSD2SI64Zrr = 7228 |
| 151443 | CEFBS_None, // VCVTTSD2SI64Zrr_Int = 7229 |
| 151444 | CEFBS_None, // VCVTTSD2SI64Zrrb_Int = 7230 |
| 151445 | CEFBS_None, // VCVTTSD2SI64rm = 7231 |
| 151446 | CEFBS_None, // VCVTTSD2SI64rm_Int = 7232 |
| 151447 | CEFBS_None, // VCVTTSD2SI64rr = 7233 |
| 151448 | CEFBS_None, // VCVTTSD2SI64rr_Int = 7234 |
| 151449 | CEFBS_None, // VCVTTSD2SIZrm = 7235 |
| 151450 | CEFBS_None, // VCVTTSD2SIZrm_Int = 7236 |
| 151451 | CEFBS_None, // VCVTTSD2SIZrr = 7237 |
| 151452 | CEFBS_None, // VCVTTSD2SIZrr_Int = 7238 |
| 151453 | CEFBS_None, // VCVTTSD2SIZrrb_Int = 7239 |
| 151454 | CEFBS_None, // VCVTTSD2SIrm = 7240 |
| 151455 | CEFBS_None, // VCVTTSD2SIrm_Int = 7241 |
| 151456 | CEFBS_None, // VCVTTSD2SIrr = 7242 |
| 151457 | CEFBS_None, // VCVTTSD2SIrr_Int = 7243 |
| 151458 | CEFBS_None, // VCVTTSD2USI64Zrm = 7244 |
| 151459 | CEFBS_None, // VCVTTSD2USI64Zrm_Int = 7245 |
| 151460 | CEFBS_None, // VCVTTSD2USI64Zrr = 7246 |
| 151461 | CEFBS_None, // VCVTTSD2USI64Zrr_Int = 7247 |
| 151462 | CEFBS_None, // VCVTTSD2USI64Zrrb_Int = 7248 |
| 151463 | CEFBS_None, // VCVTTSD2USIZrm = 7249 |
| 151464 | CEFBS_None, // VCVTTSD2USIZrm_Int = 7250 |
| 151465 | CEFBS_None, // VCVTTSD2USIZrr = 7251 |
| 151466 | CEFBS_None, // VCVTTSD2USIZrr_Int = 7252 |
| 151467 | CEFBS_None, // VCVTTSD2USIZrrb_Int = 7253 |
| 151468 | CEFBS_None, // VCVTTSH2SI64Zrm = 7254 |
| 151469 | CEFBS_None, // VCVTTSH2SI64Zrm_Int = 7255 |
| 151470 | CEFBS_None, // VCVTTSH2SI64Zrr = 7256 |
| 151471 | CEFBS_None, // VCVTTSH2SI64Zrr_Int = 7257 |
| 151472 | CEFBS_None, // VCVTTSH2SI64Zrrb_Int = 7258 |
| 151473 | CEFBS_None, // VCVTTSH2SIZrm = 7259 |
| 151474 | CEFBS_None, // VCVTTSH2SIZrm_Int = 7260 |
| 151475 | CEFBS_None, // VCVTTSH2SIZrr = 7261 |
| 151476 | CEFBS_None, // VCVTTSH2SIZrr_Int = 7262 |
| 151477 | CEFBS_None, // VCVTTSH2SIZrrb_Int = 7263 |
| 151478 | CEFBS_None, // VCVTTSH2USI64Zrm = 7264 |
| 151479 | CEFBS_None, // VCVTTSH2USI64Zrm_Int = 7265 |
| 151480 | CEFBS_None, // VCVTTSH2USI64Zrr = 7266 |
| 151481 | CEFBS_None, // VCVTTSH2USI64Zrr_Int = 7267 |
| 151482 | CEFBS_None, // VCVTTSH2USI64Zrrb_Int = 7268 |
| 151483 | CEFBS_None, // VCVTTSH2USIZrm = 7269 |
| 151484 | CEFBS_None, // VCVTTSH2USIZrm_Int = 7270 |
| 151485 | CEFBS_None, // VCVTTSH2USIZrr = 7271 |
| 151486 | CEFBS_None, // VCVTTSH2USIZrr_Int = 7272 |
| 151487 | CEFBS_None, // VCVTTSH2USIZrrb_Int = 7273 |
| 151488 | CEFBS_None, // VCVTTSS2SI64Zrm = 7274 |
| 151489 | CEFBS_None, // VCVTTSS2SI64Zrm_Int = 7275 |
| 151490 | CEFBS_None, // VCVTTSS2SI64Zrr = 7276 |
| 151491 | CEFBS_None, // VCVTTSS2SI64Zrr_Int = 7277 |
| 151492 | CEFBS_None, // VCVTTSS2SI64Zrrb_Int = 7278 |
| 151493 | CEFBS_None, // VCVTTSS2SI64rm = 7279 |
| 151494 | CEFBS_None, // VCVTTSS2SI64rm_Int = 7280 |
| 151495 | CEFBS_None, // VCVTTSS2SI64rr = 7281 |
| 151496 | CEFBS_None, // VCVTTSS2SI64rr_Int = 7282 |
| 151497 | CEFBS_None, // VCVTTSS2SIZrm = 7283 |
| 151498 | CEFBS_None, // VCVTTSS2SIZrm_Int = 7284 |
| 151499 | CEFBS_None, // VCVTTSS2SIZrr = 7285 |
| 151500 | CEFBS_None, // VCVTTSS2SIZrr_Int = 7286 |
| 151501 | CEFBS_None, // VCVTTSS2SIZrrb_Int = 7287 |
| 151502 | CEFBS_None, // VCVTTSS2SIrm = 7288 |
| 151503 | CEFBS_None, // VCVTTSS2SIrm_Int = 7289 |
| 151504 | CEFBS_None, // VCVTTSS2SIrr = 7290 |
| 151505 | CEFBS_None, // VCVTTSS2SIrr_Int = 7291 |
| 151506 | CEFBS_None, // VCVTTSS2USI64Zrm = 7292 |
| 151507 | CEFBS_None, // VCVTTSS2USI64Zrm_Int = 7293 |
| 151508 | CEFBS_None, // VCVTTSS2USI64Zrr = 7294 |
| 151509 | CEFBS_None, // VCVTTSS2USI64Zrr_Int = 7295 |
| 151510 | CEFBS_None, // VCVTTSS2USI64Zrrb_Int = 7296 |
| 151511 | CEFBS_None, // VCVTTSS2USIZrm = 7297 |
| 151512 | CEFBS_None, // VCVTTSS2USIZrm_Int = 7298 |
| 151513 | CEFBS_None, // VCVTTSS2USIZrr = 7299 |
| 151514 | CEFBS_None, // VCVTTSS2USIZrr_Int = 7300 |
| 151515 | CEFBS_None, // VCVTTSS2USIZrrb_Int = 7301 |
| 151516 | CEFBS_None, // VCVTUDQ2PDZ128rm = 7302 |
| 151517 | CEFBS_None, // VCVTUDQ2PDZ128rmb = 7303 |
| 151518 | CEFBS_None, // VCVTUDQ2PDZ128rmbk = 7304 |
| 151519 | CEFBS_None, // VCVTUDQ2PDZ128rmbkz = 7305 |
| 151520 | CEFBS_None, // VCVTUDQ2PDZ128rmk = 7306 |
| 151521 | CEFBS_None, // VCVTUDQ2PDZ128rmkz = 7307 |
| 151522 | CEFBS_None, // VCVTUDQ2PDZ128rr = 7308 |
| 151523 | CEFBS_None, // VCVTUDQ2PDZ128rrk = 7309 |
| 151524 | CEFBS_None, // VCVTUDQ2PDZ128rrkz = 7310 |
| 151525 | CEFBS_None, // VCVTUDQ2PDZ256rm = 7311 |
| 151526 | CEFBS_None, // VCVTUDQ2PDZ256rmb = 7312 |
| 151527 | CEFBS_None, // VCVTUDQ2PDZ256rmbk = 7313 |
| 151528 | CEFBS_None, // VCVTUDQ2PDZ256rmbkz = 7314 |
| 151529 | CEFBS_None, // VCVTUDQ2PDZ256rmk = 7315 |
| 151530 | CEFBS_None, // VCVTUDQ2PDZ256rmkz = 7316 |
| 151531 | CEFBS_None, // VCVTUDQ2PDZ256rr = 7317 |
| 151532 | CEFBS_None, // VCVTUDQ2PDZ256rrk = 7318 |
| 151533 | CEFBS_None, // VCVTUDQ2PDZ256rrkz = 7319 |
| 151534 | CEFBS_None, // VCVTUDQ2PDZrm = 7320 |
| 151535 | CEFBS_None, // VCVTUDQ2PDZrmb = 7321 |
| 151536 | CEFBS_None, // VCVTUDQ2PDZrmbk = 7322 |
| 151537 | CEFBS_None, // VCVTUDQ2PDZrmbkz = 7323 |
| 151538 | CEFBS_None, // VCVTUDQ2PDZrmk = 7324 |
| 151539 | CEFBS_None, // VCVTUDQ2PDZrmkz = 7325 |
| 151540 | CEFBS_None, // VCVTUDQ2PDZrr = 7326 |
| 151541 | CEFBS_None, // VCVTUDQ2PDZrrk = 7327 |
| 151542 | CEFBS_None, // VCVTUDQ2PDZrrkz = 7328 |
| 151543 | CEFBS_None, // VCVTUDQ2PHZ128rm = 7329 |
| 151544 | CEFBS_None, // VCVTUDQ2PHZ128rmb = 7330 |
| 151545 | CEFBS_None, // VCVTUDQ2PHZ128rmbk = 7331 |
| 151546 | CEFBS_None, // VCVTUDQ2PHZ128rmbkz = 7332 |
| 151547 | CEFBS_None, // VCVTUDQ2PHZ128rmk = 7333 |
| 151548 | CEFBS_None, // VCVTUDQ2PHZ128rmkz = 7334 |
| 151549 | CEFBS_None, // VCVTUDQ2PHZ128rr = 7335 |
| 151550 | CEFBS_None, // VCVTUDQ2PHZ128rrk = 7336 |
| 151551 | CEFBS_None, // VCVTUDQ2PHZ128rrkz = 7337 |
| 151552 | CEFBS_None, // VCVTUDQ2PHZ256rm = 7338 |
| 151553 | CEFBS_None, // VCVTUDQ2PHZ256rmb = 7339 |
| 151554 | CEFBS_None, // VCVTUDQ2PHZ256rmbk = 7340 |
| 151555 | CEFBS_None, // VCVTUDQ2PHZ256rmbkz = 7341 |
| 151556 | CEFBS_None, // VCVTUDQ2PHZ256rmk = 7342 |
| 151557 | CEFBS_None, // VCVTUDQ2PHZ256rmkz = 7343 |
| 151558 | CEFBS_None, // VCVTUDQ2PHZ256rr = 7344 |
| 151559 | CEFBS_None, // VCVTUDQ2PHZ256rrk = 7345 |
| 151560 | CEFBS_None, // VCVTUDQ2PHZ256rrkz = 7346 |
| 151561 | CEFBS_None, // VCVTUDQ2PHZrm = 7347 |
| 151562 | CEFBS_None, // VCVTUDQ2PHZrmb = 7348 |
| 151563 | CEFBS_None, // VCVTUDQ2PHZrmbk = 7349 |
| 151564 | CEFBS_None, // VCVTUDQ2PHZrmbkz = 7350 |
| 151565 | CEFBS_None, // VCVTUDQ2PHZrmk = 7351 |
| 151566 | CEFBS_None, // VCVTUDQ2PHZrmkz = 7352 |
| 151567 | CEFBS_None, // VCVTUDQ2PHZrr = 7353 |
| 151568 | CEFBS_None, // VCVTUDQ2PHZrrb = 7354 |
| 151569 | CEFBS_None, // VCVTUDQ2PHZrrbk = 7355 |
| 151570 | CEFBS_None, // VCVTUDQ2PHZrrbkz = 7356 |
| 151571 | CEFBS_None, // VCVTUDQ2PHZrrk = 7357 |
| 151572 | CEFBS_None, // VCVTUDQ2PHZrrkz = 7358 |
| 151573 | CEFBS_None, // VCVTUDQ2PSZ128rm = 7359 |
| 151574 | CEFBS_None, // VCVTUDQ2PSZ128rmb = 7360 |
| 151575 | CEFBS_None, // VCVTUDQ2PSZ128rmbk = 7361 |
| 151576 | CEFBS_None, // VCVTUDQ2PSZ128rmbkz = 7362 |
| 151577 | CEFBS_None, // VCVTUDQ2PSZ128rmk = 7363 |
| 151578 | CEFBS_None, // VCVTUDQ2PSZ128rmkz = 7364 |
| 151579 | CEFBS_None, // VCVTUDQ2PSZ128rr = 7365 |
| 151580 | CEFBS_None, // VCVTUDQ2PSZ128rrk = 7366 |
| 151581 | CEFBS_None, // VCVTUDQ2PSZ128rrkz = 7367 |
| 151582 | CEFBS_None, // VCVTUDQ2PSZ256rm = 7368 |
| 151583 | CEFBS_None, // VCVTUDQ2PSZ256rmb = 7369 |
| 151584 | CEFBS_None, // VCVTUDQ2PSZ256rmbk = 7370 |
| 151585 | CEFBS_None, // VCVTUDQ2PSZ256rmbkz = 7371 |
| 151586 | CEFBS_None, // VCVTUDQ2PSZ256rmk = 7372 |
| 151587 | CEFBS_None, // VCVTUDQ2PSZ256rmkz = 7373 |
| 151588 | CEFBS_None, // VCVTUDQ2PSZ256rr = 7374 |
| 151589 | CEFBS_None, // VCVTUDQ2PSZ256rrk = 7375 |
| 151590 | CEFBS_None, // VCVTUDQ2PSZ256rrkz = 7376 |
| 151591 | CEFBS_None, // VCVTUDQ2PSZrm = 7377 |
| 151592 | CEFBS_None, // VCVTUDQ2PSZrmb = 7378 |
| 151593 | CEFBS_None, // VCVTUDQ2PSZrmbk = 7379 |
| 151594 | CEFBS_None, // VCVTUDQ2PSZrmbkz = 7380 |
| 151595 | CEFBS_None, // VCVTUDQ2PSZrmk = 7381 |
| 151596 | CEFBS_None, // VCVTUDQ2PSZrmkz = 7382 |
| 151597 | CEFBS_None, // VCVTUDQ2PSZrr = 7383 |
| 151598 | CEFBS_None, // VCVTUDQ2PSZrrb = 7384 |
| 151599 | CEFBS_None, // VCVTUDQ2PSZrrbk = 7385 |
| 151600 | CEFBS_None, // VCVTUDQ2PSZrrbkz = 7386 |
| 151601 | CEFBS_None, // VCVTUDQ2PSZrrk = 7387 |
| 151602 | CEFBS_None, // VCVTUDQ2PSZrrkz = 7388 |
| 151603 | CEFBS_None, // VCVTUQQ2PDZ128rm = 7389 |
| 151604 | CEFBS_None, // VCVTUQQ2PDZ128rmb = 7390 |
| 151605 | CEFBS_None, // VCVTUQQ2PDZ128rmbk = 7391 |
| 151606 | CEFBS_None, // VCVTUQQ2PDZ128rmbkz = 7392 |
| 151607 | CEFBS_None, // VCVTUQQ2PDZ128rmk = 7393 |
| 151608 | CEFBS_None, // VCVTUQQ2PDZ128rmkz = 7394 |
| 151609 | CEFBS_None, // VCVTUQQ2PDZ128rr = 7395 |
| 151610 | CEFBS_None, // VCVTUQQ2PDZ128rrk = 7396 |
| 151611 | CEFBS_None, // VCVTUQQ2PDZ128rrkz = 7397 |
| 151612 | CEFBS_None, // VCVTUQQ2PDZ256rm = 7398 |
| 151613 | CEFBS_None, // VCVTUQQ2PDZ256rmb = 7399 |
| 151614 | CEFBS_None, // VCVTUQQ2PDZ256rmbk = 7400 |
| 151615 | CEFBS_None, // VCVTUQQ2PDZ256rmbkz = 7401 |
| 151616 | CEFBS_None, // VCVTUQQ2PDZ256rmk = 7402 |
| 151617 | CEFBS_None, // VCVTUQQ2PDZ256rmkz = 7403 |
| 151618 | CEFBS_None, // VCVTUQQ2PDZ256rr = 7404 |
| 151619 | CEFBS_None, // VCVTUQQ2PDZ256rrk = 7405 |
| 151620 | CEFBS_None, // VCVTUQQ2PDZ256rrkz = 7406 |
| 151621 | CEFBS_None, // VCVTUQQ2PDZrm = 7407 |
| 151622 | CEFBS_None, // VCVTUQQ2PDZrmb = 7408 |
| 151623 | CEFBS_None, // VCVTUQQ2PDZrmbk = 7409 |
| 151624 | CEFBS_None, // VCVTUQQ2PDZrmbkz = 7410 |
| 151625 | CEFBS_None, // VCVTUQQ2PDZrmk = 7411 |
| 151626 | CEFBS_None, // VCVTUQQ2PDZrmkz = 7412 |
| 151627 | CEFBS_None, // VCVTUQQ2PDZrr = 7413 |
| 151628 | CEFBS_None, // VCVTUQQ2PDZrrb = 7414 |
| 151629 | CEFBS_None, // VCVTUQQ2PDZrrbk = 7415 |
| 151630 | CEFBS_None, // VCVTUQQ2PDZrrbkz = 7416 |
| 151631 | CEFBS_None, // VCVTUQQ2PDZrrk = 7417 |
| 151632 | CEFBS_None, // VCVTUQQ2PDZrrkz = 7418 |
| 151633 | CEFBS_None, // VCVTUQQ2PHZ128rm = 7419 |
| 151634 | CEFBS_None, // VCVTUQQ2PHZ128rmb = 7420 |
| 151635 | CEFBS_None, // VCVTUQQ2PHZ128rmbk = 7421 |
| 151636 | CEFBS_None, // VCVTUQQ2PHZ128rmbkz = 7422 |
| 151637 | CEFBS_None, // VCVTUQQ2PHZ128rmk = 7423 |
| 151638 | CEFBS_None, // VCVTUQQ2PHZ128rmkz = 7424 |
| 151639 | CEFBS_None, // VCVTUQQ2PHZ128rr = 7425 |
| 151640 | CEFBS_None, // VCVTUQQ2PHZ128rrk = 7426 |
| 151641 | CEFBS_None, // VCVTUQQ2PHZ128rrkz = 7427 |
| 151642 | CEFBS_None, // VCVTUQQ2PHZ256rm = 7428 |
| 151643 | CEFBS_None, // VCVTUQQ2PHZ256rmb = 7429 |
| 151644 | CEFBS_None, // VCVTUQQ2PHZ256rmbk = 7430 |
| 151645 | CEFBS_None, // VCVTUQQ2PHZ256rmbkz = 7431 |
| 151646 | CEFBS_None, // VCVTUQQ2PHZ256rmk = 7432 |
| 151647 | CEFBS_None, // VCVTUQQ2PHZ256rmkz = 7433 |
| 151648 | CEFBS_None, // VCVTUQQ2PHZ256rr = 7434 |
| 151649 | CEFBS_None, // VCVTUQQ2PHZ256rrk = 7435 |
| 151650 | CEFBS_None, // VCVTUQQ2PHZ256rrkz = 7436 |
| 151651 | CEFBS_None, // VCVTUQQ2PHZrm = 7437 |
| 151652 | CEFBS_None, // VCVTUQQ2PHZrmb = 7438 |
| 151653 | CEFBS_None, // VCVTUQQ2PHZrmbk = 7439 |
| 151654 | CEFBS_None, // VCVTUQQ2PHZrmbkz = 7440 |
| 151655 | CEFBS_None, // VCVTUQQ2PHZrmk = 7441 |
| 151656 | CEFBS_None, // VCVTUQQ2PHZrmkz = 7442 |
| 151657 | CEFBS_None, // VCVTUQQ2PHZrr = 7443 |
| 151658 | CEFBS_None, // VCVTUQQ2PHZrrb = 7444 |
| 151659 | CEFBS_None, // VCVTUQQ2PHZrrbk = 7445 |
| 151660 | CEFBS_None, // VCVTUQQ2PHZrrbkz = 7446 |
| 151661 | CEFBS_None, // VCVTUQQ2PHZrrk = 7447 |
| 151662 | CEFBS_None, // VCVTUQQ2PHZrrkz = 7448 |
| 151663 | CEFBS_None, // VCVTUQQ2PSZ128rm = 7449 |
| 151664 | CEFBS_None, // VCVTUQQ2PSZ128rmb = 7450 |
| 151665 | CEFBS_None, // VCVTUQQ2PSZ128rmbk = 7451 |
| 151666 | CEFBS_None, // VCVTUQQ2PSZ128rmbkz = 7452 |
| 151667 | CEFBS_None, // VCVTUQQ2PSZ128rmk = 7453 |
| 151668 | CEFBS_None, // VCVTUQQ2PSZ128rmkz = 7454 |
| 151669 | CEFBS_None, // VCVTUQQ2PSZ128rr = 7455 |
| 151670 | CEFBS_None, // VCVTUQQ2PSZ128rrk = 7456 |
| 151671 | CEFBS_None, // VCVTUQQ2PSZ128rrkz = 7457 |
| 151672 | CEFBS_None, // VCVTUQQ2PSZ256rm = 7458 |
| 151673 | CEFBS_None, // VCVTUQQ2PSZ256rmb = 7459 |
| 151674 | CEFBS_None, // VCVTUQQ2PSZ256rmbk = 7460 |
| 151675 | CEFBS_None, // VCVTUQQ2PSZ256rmbkz = 7461 |
| 151676 | CEFBS_None, // VCVTUQQ2PSZ256rmk = 7462 |
| 151677 | CEFBS_None, // VCVTUQQ2PSZ256rmkz = 7463 |
| 151678 | CEFBS_None, // VCVTUQQ2PSZ256rr = 7464 |
| 151679 | CEFBS_None, // VCVTUQQ2PSZ256rrk = 7465 |
| 151680 | CEFBS_None, // VCVTUQQ2PSZ256rrkz = 7466 |
| 151681 | CEFBS_None, // VCVTUQQ2PSZrm = 7467 |
| 151682 | CEFBS_None, // VCVTUQQ2PSZrmb = 7468 |
| 151683 | CEFBS_None, // VCVTUQQ2PSZrmbk = 7469 |
| 151684 | CEFBS_None, // VCVTUQQ2PSZrmbkz = 7470 |
| 151685 | CEFBS_None, // VCVTUQQ2PSZrmk = 7471 |
| 151686 | CEFBS_None, // VCVTUQQ2PSZrmkz = 7472 |
| 151687 | CEFBS_None, // VCVTUQQ2PSZrr = 7473 |
| 151688 | CEFBS_None, // VCVTUQQ2PSZrrb = 7474 |
| 151689 | CEFBS_None, // VCVTUQQ2PSZrrbk = 7475 |
| 151690 | CEFBS_None, // VCVTUQQ2PSZrrbkz = 7476 |
| 151691 | CEFBS_None, // VCVTUQQ2PSZrrk = 7477 |
| 151692 | CEFBS_None, // VCVTUQQ2PSZrrkz = 7478 |
| 151693 | CEFBS_None, // VCVTUSI2SDZrm = 7479 |
| 151694 | CEFBS_None, // VCVTUSI2SDZrm_Int = 7480 |
| 151695 | CEFBS_None, // VCVTUSI2SDZrr = 7481 |
| 151696 | CEFBS_None, // VCVTUSI2SDZrr_Int = 7482 |
| 151697 | CEFBS_None, // VCVTUSI2SHZrm = 7483 |
| 151698 | CEFBS_None, // VCVTUSI2SHZrm_Int = 7484 |
| 151699 | CEFBS_None, // VCVTUSI2SHZrr = 7485 |
| 151700 | CEFBS_None, // VCVTUSI2SHZrr_Int = 7486 |
| 151701 | CEFBS_None, // VCVTUSI2SHZrrb_Int = 7487 |
| 151702 | CEFBS_None, // VCVTUSI2SSZrm = 7488 |
| 151703 | CEFBS_None, // VCVTUSI2SSZrm_Int = 7489 |
| 151704 | CEFBS_None, // VCVTUSI2SSZrr = 7490 |
| 151705 | CEFBS_None, // VCVTUSI2SSZrr_Int = 7491 |
| 151706 | CEFBS_None, // VCVTUSI2SSZrrb_Int = 7492 |
| 151707 | CEFBS_None, // VCVTUSI642SDZrm = 7493 |
| 151708 | CEFBS_None, // VCVTUSI642SDZrm_Int = 7494 |
| 151709 | CEFBS_None, // VCVTUSI642SDZrr = 7495 |
| 151710 | CEFBS_None, // VCVTUSI642SDZrr_Int = 7496 |
| 151711 | CEFBS_None, // VCVTUSI642SDZrrb_Int = 7497 |
| 151712 | CEFBS_None, // VCVTUSI642SHZrm = 7498 |
| 151713 | CEFBS_None, // VCVTUSI642SHZrm_Int = 7499 |
| 151714 | CEFBS_None, // VCVTUSI642SHZrr = 7500 |
| 151715 | CEFBS_None, // VCVTUSI642SHZrr_Int = 7501 |
| 151716 | CEFBS_None, // VCVTUSI642SHZrrb_Int = 7502 |
| 151717 | CEFBS_None, // VCVTUSI642SSZrm = 7503 |
| 151718 | CEFBS_None, // VCVTUSI642SSZrm_Int = 7504 |
| 151719 | CEFBS_None, // VCVTUSI642SSZrr = 7505 |
| 151720 | CEFBS_None, // VCVTUSI642SSZrr_Int = 7506 |
| 151721 | CEFBS_None, // VCVTUSI642SSZrrb_Int = 7507 |
| 151722 | CEFBS_None, // VCVTUW2PHZ128rm = 7508 |
| 151723 | CEFBS_None, // VCVTUW2PHZ128rmb = 7509 |
| 151724 | CEFBS_None, // VCVTUW2PHZ128rmbk = 7510 |
| 151725 | CEFBS_None, // VCVTUW2PHZ128rmbkz = 7511 |
| 151726 | CEFBS_None, // VCVTUW2PHZ128rmk = 7512 |
| 151727 | CEFBS_None, // VCVTUW2PHZ128rmkz = 7513 |
| 151728 | CEFBS_None, // VCVTUW2PHZ128rr = 7514 |
| 151729 | CEFBS_None, // VCVTUW2PHZ128rrk = 7515 |
| 151730 | CEFBS_None, // VCVTUW2PHZ128rrkz = 7516 |
| 151731 | CEFBS_None, // VCVTUW2PHZ256rm = 7517 |
| 151732 | CEFBS_None, // VCVTUW2PHZ256rmb = 7518 |
| 151733 | CEFBS_None, // VCVTUW2PHZ256rmbk = 7519 |
| 151734 | CEFBS_None, // VCVTUW2PHZ256rmbkz = 7520 |
| 151735 | CEFBS_None, // VCVTUW2PHZ256rmk = 7521 |
| 151736 | CEFBS_None, // VCVTUW2PHZ256rmkz = 7522 |
| 151737 | CEFBS_None, // VCVTUW2PHZ256rr = 7523 |
| 151738 | CEFBS_None, // VCVTUW2PHZ256rrk = 7524 |
| 151739 | CEFBS_None, // VCVTUW2PHZ256rrkz = 7525 |
| 151740 | CEFBS_None, // VCVTUW2PHZrm = 7526 |
| 151741 | CEFBS_None, // VCVTUW2PHZrmb = 7527 |
| 151742 | CEFBS_None, // VCVTUW2PHZrmbk = 7528 |
| 151743 | CEFBS_None, // VCVTUW2PHZrmbkz = 7529 |
| 151744 | CEFBS_None, // VCVTUW2PHZrmk = 7530 |
| 151745 | CEFBS_None, // VCVTUW2PHZrmkz = 7531 |
| 151746 | CEFBS_None, // VCVTUW2PHZrr = 7532 |
| 151747 | CEFBS_None, // VCVTUW2PHZrrb = 7533 |
| 151748 | CEFBS_None, // VCVTUW2PHZrrbk = 7534 |
| 151749 | CEFBS_None, // VCVTUW2PHZrrbkz = 7535 |
| 151750 | CEFBS_None, // VCVTUW2PHZrrk = 7536 |
| 151751 | CEFBS_None, // VCVTUW2PHZrrkz = 7537 |
| 151752 | CEFBS_None, // VCVTW2PHZ128rm = 7538 |
| 151753 | CEFBS_None, // VCVTW2PHZ128rmb = 7539 |
| 151754 | CEFBS_None, // VCVTW2PHZ128rmbk = 7540 |
| 151755 | CEFBS_None, // VCVTW2PHZ128rmbkz = 7541 |
| 151756 | CEFBS_None, // VCVTW2PHZ128rmk = 7542 |
| 151757 | CEFBS_None, // VCVTW2PHZ128rmkz = 7543 |
| 151758 | CEFBS_None, // VCVTW2PHZ128rr = 7544 |
| 151759 | CEFBS_None, // VCVTW2PHZ128rrk = 7545 |
| 151760 | CEFBS_None, // VCVTW2PHZ128rrkz = 7546 |
| 151761 | CEFBS_None, // VCVTW2PHZ256rm = 7547 |
| 151762 | CEFBS_None, // VCVTW2PHZ256rmb = 7548 |
| 151763 | CEFBS_None, // VCVTW2PHZ256rmbk = 7549 |
| 151764 | CEFBS_None, // VCVTW2PHZ256rmbkz = 7550 |
| 151765 | CEFBS_None, // VCVTW2PHZ256rmk = 7551 |
| 151766 | CEFBS_None, // VCVTW2PHZ256rmkz = 7552 |
| 151767 | CEFBS_None, // VCVTW2PHZ256rr = 7553 |
| 151768 | CEFBS_None, // VCVTW2PHZ256rrk = 7554 |
| 151769 | CEFBS_None, // VCVTW2PHZ256rrkz = 7555 |
| 151770 | CEFBS_None, // VCVTW2PHZrm = 7556 |
| 151771 | CEFBS_None, // VCVTW2PHZrmb = 7557 |
| 151772 | CEFBS_None, // VCVTW2PHZrmbk = 7558 |
| 151773 | CEFBS_None, // VCVTW2PHZrmbkz = 7559 |
| 151774 | CEFBS_None, // VCVTW2PHZrmk = 7560 |
| 151775 | CEFBS_None, // VCVTW2PHZrmkz = 7561 |
| 151776 | CEFBS_None, // VCVTW2PHZrr = 7562 |
| 151777 | CEFBS_None, // VCVTW2PHZrrb = 7563 |
| 151778 | CEFBS_None, // VCVTW2PHZrrbk = 7564 |
| 151779 | CEFBS_None, // VCVTW2PHZrrbkz = 7565 |
| 151780 | CEFBS_None, // VCVTW2PHZrrk = 7566 |
| 151781 | CEFBS_None, // VCVTW2PHZrrkz = 7567 |
| 151782 | CEFBS_None, // VDBPSADBWZ128rmi = 7568 |
| 151783 | CEFBS_None, // VDBPSADBWZ128rmik = 7569 |
| 151784 | CEFBS_None, // VDBPSADBWZ128rmikz = 7570 |
| 151785 | CEFBS_None, // VDBPSADBWZ128rri = 7571 |
| 151786 | CEFBS_None, // VDBPSADBWZ128rrik = 7572 |
| 151787 | CEFBS_None, // VDBPSADBWZ128rrikz = 7573 |
| 151788 | CEFBS_None, // VDBPSADBWZ256rmi = 7574 |
| 151789 | CEFBS_None, // VDBPSADBWZ256rmik = 7575 |
| 151790 | CEFBS_None, // VDBPSADBWZ256rmikz = 7576 |
| 151791 | CEFBS_None, // VDBPSADBWZ256rri = 7577 |
| 151792 | CEFBS_None, // VDBPSADBWZ256rrik = 7578 |
| 151793 | CEFBS_None, // VDBPSADBWZ256rrikz = 7579 |
| 151794 | CEFBS_None, // VDBPSADBWZrmi = 7580 |
| 151795 | CEFBS_None, // VDBPSADBWZrmik = 7581 |
| 151796 | CEFBS_None, // VDBPSADBWZrmikz = 7582 |
| 151797 | CEFBS_None, // VDBPSADBWZrri = 7583 |
| 151798 | CEFBS_None, // VDBPSADBWZrrik = 7584 |
| 151799 | CEFBS_None, // VDBPSADBWZrrikz = 7585 |
| 151800 | CEFBS_None, // VDIVPDYrm = 7586 |
| 151801 | CEFBS_None, // VDIVPDYrr = 7587 |
| 151802 | CEFBS_None, // VDIVPDZ128rm = 7588 |
| 151803 | CEFBS_None, // VDIVPDZ128rmb = 7589 |
| 151804 | CEFBS_None, // VDIVPDZ128rmbk = 7590 |
| 151805 | CEFBS_None, // VDIVPDZ128rmbkz = 7591 |
| 151806 | CEFBS_None, // VDIVPDZ128rmk = 7592 |
| 151807 | CEFBS_None, // VDIVPDZ128rmkz = 7593 |
| 151808 | CEFBS_None, // VDIVPDZ128rr = 7594 |
| 151809 | CEFBS_None, // VDIVPDZ128rrk = 7595 |
| 151810 | CEFBS_None, // VDIVPDZ128rrkz = 7596 |
| 151811 | CEFBS_None, // VDIVPDZ256rm = 7597 |
| 151812 | CEFBS_None, // VDIVPDZ256rmb = 7598 |
| 151813 | CEFBS_None, // VDIVPDZ256rmbk = 7599 |
| 151814 | CEFBS_None, // VDIVPDZ256rmbkz = 7600 |
| 151815 | CEFBS_None, // VDIVPDZ256rmk = 7601 |
| 151816 | CEFBS_None, // VDIVPDZ256rmkz = 7602 |
| 151817 | CEFBS_None, // VDIVPDZ256rr = 7603 |
| 151818 | CEFBS_None, // VDIVPDZ256rrk = 7604 |
| 151819 | CEFBS_None, // VDIVPDZ256rrkz = 7605 |
| 151820 | CEFBS_None, // VDIVPDZrm = 7606 |
| 151821 | CEFBS_None, // VDIVPDZrmb = 7607 |
| 151822 | CEFBS_None, // VDIVPDZrmbk = 7608 |
| 151823 | CEFBS_None, // VDIVPDZrmbkz = 7609 |
| 151824 | CEFBS_None, // VDIVPDZrmk = 7610 |
| 151825 | CEFBS_None, // VDIVPDZrmkz = 7611 |
| 151826 | CEFBS_None, // VDIVPDZrr = 7612 |
| 151827 | CEFBS_None, // VDIVPDZrrb = 7613 |
| 151828 | CEFBS_None, // VDIVPDZrrbk = 7614 |
| 151829 | CEFBS_None, // VDIVPDZrrbkz = 7615 |
| 151830 | CEFBS_None, // VDIVPDZrrk = 7616 |
| 151831 | CEFBS_None, // VDIVPDZrrkz = 7617 |
| 151832 | CEFBS_None, // VDIVPDrm = 7618 |
| 151833 | CEFBS_None, // VDIVPDrr = 7619 |
| 151834 | CEFBS_None, // VDIVPHZ128rm = 7620 |
| 151835 | CEFBS_None, // VDIVPHZ128rmb = 7621 |
| 151836 | CEFBS_None, // VDIVPHZ128rmbk = 7622 |
| 151837 | CEFBS_None, // VDIVPHZ128rmbkz = 7623 |
| 151838 | CEFBS_None, // VDIVPHZ128rmk = 7624 |
| 151839 | CEFBS_None, // VDIVPHZ128rmkz = 7625 |
| 151840 | CEFBS_None, // VDIVPHZ128rr = 7626 |
| 151841 | CEFBS_None, // VDIVPHZ128rrk = 7627 |
| 151842 | CEFBS_None, // VDIVPHZ128rrkz = 7628 |
| 151843 | CEFBS_None, // VDIVPHZ256rm = 7629 |
| 151844 | CEFBS_None, // VDIVPHZ256rmb = 7630 |
| 151845 | CEFBS_None, // VDIVPHZ256rmbk = 7631 |
| 151846 | CEFBS_None, // VDIVPHZ256rmbkz = 7632 |
| 151847 | CEFBS_None, // VDIVPHZ256rmk = 7633 |
| 151848 | CEFBS_None, // VDIVPHZ256rmkz = 7634 |
| 151849 | CEFBS_None, // VDIVPHZ256rr = 7635 |
| 151850 | CEFBS_None, // VDIVPHZ256rrk = 7636 |
| 151851 | CEFBS_None, // VDIVPHZ256rrkz = 7637 |
| 151852 | CEFBS_None, // VDIVPHZrm = 7638 |
| 151853 | CEFBS_None, // VDIVPHZrmb = 7639 |
| 151854 | CEFBS_None, // VDIVPHZrmbk = 7640 |
| 151855 | CEFBS_None, // VDIVPHZrmbkz = 7641 |
| 151856 | CEFBS_None, // VDIVPHZrmk = 7642 |
| 151857 | CEFBS_None, // VDIVPHZrmkz = 7643 |
| 151858 | CEFBS_None, // VDIVPHZrr = 7644 |
| 151859 | CEFBS_None, // VDIVPHZrrb = 7645 |
| 151860 | CEFBS_None, // VDIVPHZrrbk = 7646 |
| 151861 | CEFBS_None, // VDIVPHZrrbkz = 7647 |
| 151862 | CEFBS_None, // VDIVPHZrrk = 7648 |
| 151863 | CEFBS_None, // VDIVPHZrrkz = 7649 |
| 151864 | CEFBS_None, // VDIVPSYrm = 7650 |
| 151865 | CEFBS_None, // VDIVPSYrr = 7651 |
| 151866 | CEFBS_None, // VDIVPSZ128rm = 7652 |
| 151867 | CEFBS_None, // VDIVPSZ128rmb = 7653 |
| 151868 | CEFBS_None, // VDIVPSZ128rmbk = 7654 |
| 151869 | CEFBS_None, // VDIVPSZ128rmbkz = 7655 |
| 151870 | CEFBS_None, // VDIVPSZ128rmk = 7656 |
| 151871 | CEFBS_None, // VDIVPSZ128rmkz = 7657 |
| 151872 | CEFBS_None, // VDIVPSZ128rr = 7658 |
| 151873 | CEFBS_None, // VDIVPSZ128rrk = 7659 |
| 151874 | CEFBS_None, // VDIVPSZ128rrkz = 7660 |
| 151875 | CEFBS_None, // VDIVPSZ256rm = 7661 |
| 151876 | CEFBS_None, // VDIVPSZ256rmb = 7662 |
| 151877 | CEFBS_None, // VDIVPSZ256rmbk = 7663 |
| 151878 | CEFBS_None, // VDIVPSZ256rmbkz = 7664 |
| 151879 | CEFBS_None, // VDIVPSZ256rmk = 7665 |
| 151880 | CEFBS_None, // VDIVPSZ256rmkz = 7666 |
| 151881 | CEFBS_None, // VDIVPSZ256rr = 7667 |
| 151882 | CEFBS_None, // VDIVPSZ256rrk = 7668 |
| 151883 | CEFBS_None, // VDIVPSZ256rrkz = 7669 |
| 151884 | CEFBS_None, // VDIVPSZrm = 7670 |
| 151885 | CEFBS_None, // VDIVPSZrmb = 7671 |
| 151886 | CEFBS_None, // VDIVPSZrmbk = 7672 |
| 151887 | CEFBS_None, // VDIVPSZrmbkz = 7673 |
| 151888 | CEFBS_None, // VDIVPSZrmk = 7674 |
| 151889 | CEFBS_None, // VDIVPSZrmkz = 7675 |
| 151890 | CEFBS_None, // VDIVPSZrr = 7676 |
| 151891 | CEFBS_None, // VDIVPSZrrb = 7677 |
| 151892 | CEFBS_None, // VDIVPSZrrbk = 7678 |
| 151893 | CEFBS_None, // VDIVPSZrrbkz = 7679 |
| 151894 | CEFBS_None, // VDIVPSZrrk = 7680 |
| 151895 | CEFBS_None, // VDIVPSZrrkz = 7681 |
| 151896 | CEFBS_None, // VDIVPSrm = 7682 |
| 151897 | CEFBS_None, // VDIVPSrr = 7683 |
| 151898 | CEFBS_None, // VDIVSDZrm = 7684 |
| 151899 | CEFBS_None, // VDIVSDZrm_Int = 7685 |
| 151900 | CEFBS_None, // VDIVSDZrm_Intk = 7686 |
| 151901 | CEFBS_None, // VDIVSDZrm_Intkz = 7687 |
| 151902 | CEFBS_None, // VDIVSDZrr = 7688 |
| 151903 | CEFBS_None, // VDIVSDZrr_Int = 7689 |
| 151904 | CEFBS_None, // VDIVSDZrr_Intk = 7690 |
| 151905 | CEFBS_None, // VDIVSDZrr_Intkz = 7691 |
| 151906 | CEFBS_None, // VDIVSDZrrb_Int = 7692 |
| 151907 | CEFBS_None, // VDIVSDZrrb_Intk = 7693 |
| 151908 | CEFBS_None, // VDIVSDZrrb_Intkz = 7694 |
| 151909 | CEFBS_None, // VDIVSDrm = 7695 |
| 151910 | CEFBS_None, // VDIVSDrm_Int = 7696 |
| 151911 | CEFBS_None, // VDIVSDrr = 7697 |
| 151912 | CEFBS_None, // VDIVSDrr_Int = 7698 |
| 151913 | CEFBS_None, // VDIVSHZrm = 7699 |
| 151914 | CEFBS_None, // VDIVSHZrm_Int = 7700 |
| 151915 | CEFBS_None, // VDIVSHZrm_Intk = 7701 |
| 151916 | CEFBS_None, // VDIVSHZrm_Intkz = 7702 |
| 151917 | CEFBS_None, // VDIVSHZrr = 7703 |
| 151918 | CEFBS_None, // VDIVSHZrr_Int = 7704 |
| 151919 | CEFBS_None, // VDIVSHZrr_Intk = 7705 |
| 151920 | CEFBS_None, // VDIVSHZrr_Intkz = 7706 |
| 151921 | CEFBS_None, // VDIVSHZrrb_Int = 7707 |
| 151922 | CEFBS_None, // VDIVSHZrrb_Intk = 7708 |
| 151923 | CEFBS_None, // VDIVSHZrrb_Intkz = 7709 |
| 151924 | CEFBS_None, // VDIVSSZrm = 7710 |
| 151925 | CEFBS_None, // VDIVSSZrm_Int = 7711 |
| 151926 | CEFBS_None, // VDIVSSZrm_Intk = 7712 |
| 151927 | CEFBS_None, // VDIVSSZrm_Intkz = 7713 |
| 151928 | CEFBS_None, // VDIVSSZrr = 7714 |
| 151929 | CEFBS_None, // VDIVSSZrr_Int = 7715 |
| 151930 | CEFBS_None, // VDIVSSZrr_Intk = 7716 |
| 151931 | CEFBS_None, // VDIVSSZrr_Intkz = 7717 |
| 151932 | CEFBS_None, // VDIVSSZrrb_Int = 7718 |
| 151933 | CEFBS_None, // VDIVSSZrrb_Intk = 7719 |
| 151934 | CEFBS_None, // VDIVSSZrrb_Intkz = 7720 |
| 151935 | CEFBS_None, // VDIVSSrm = 7721 |
| 151936 | CEFBS_None, // VDIVSSrm_Int = 7722 |
| 151937 | CEFBS_None, // VDIVSSrr = 7723 |
| 151938 | CEFBS_None, // VDIVSSrr_Int = 7724 |
| 151939 | CEFBS_None, // VDPBF16PSZ128m = 7725 |
| 151940 | CEFBS_None, // VDPBF16PSZ128mb = 7726 |
| 151941 | CEFBS_None, // VDPBF16PSZ128mbk = 7727 |
| 151942 | CEFBS_None, // VDPBF16PSZ128mbkz = 7728 |
| 151943 | CEFBS_None, // VDPBF16PSZ128mk = 7729 |
| 151944 | CEFBS_None, // VDPBF16PSZ128mkz = 7730 |
| 151945 | CEFBS_None, // VDPBF16PSZ128r = 7731 |
| 151946 | CEFBS_None, // VDPBF16PSZ128rk = 7732 |
| 151947 | CEFBS_None, // VDPBF16PSZ128rkz = 7733 |
| 151948 | CEFBS_None, // VDPBF16PSZ256m = 7734 |
| 151949 | CEFBS_None, // VDPBF16PSZ256mb = 7735 |
| 151950 | CEFBS_None, // VDPBF16PSZ256mbk = 7736 |
| 151951 | CEFBS_None, // VDPBF16PSZ256mbkz = 7737 |
| 151952 | CEFBS_None, // VDPBF16PSZ256mk = 7738 |
| 151953 | CEFBS_None, // VDPBF16PSZ256mkz = 7739 |
| 151954 | CEFBS_None, // VDPBF16PSZ256r = 7740 |
| 151955 | CEFBS_None, // VDPBF16PSZ256rk = 7741 |
| 151956 | CEFBS_None, // VDPBF16PSZ256rkz = 7742 |
| 151957 | CEFBS_None, // VDPBF16PSZm = 7743 |
| 151958 | CEFBS_None, // VDPBF16PSZmb = 7744 |
| 151959 | CEFBS_None, // VDPBF16PSZmbk = 7745 |
| 151960 | CEFBS_None, // VDPBF16PSZmbkz = 7746 |
| 151961 | CEFBS_None, // VDPBF16PSZmk = 7747 |
| 151962 | CEFBS_None, // VDPBF16PSZmkz = 7748 |
| 151963 | CEFBS_None, // VDPBF16PSZr = 7749 |
| 151964 | CEFBS_None, // VDPBF16PSZrk = 7750 |
| 151965 | CEFBS_None, // VDPBF16PSZrkz = 7751 |
| 151966 | CEFBS_None, // VDPPDrmi = 7752 |
| 151967 | CEFBS_None, // VDPPDrri = 7753 |
| 151968 | CEFBS_None, // VDPPSYrmi = 7754 |
| 151969 | CEFBS_None, // VDPPSYrri = 7755 |
| 151970 | CEFBS_None, // VDPPSrmi = 7756 |
| 151971 | CEFBS_None, // VDPPSrri = 7757 |
| 151972 | CEFBS_None, // VERRm = 7758 |
| 151973 | CEFBS_None, // VERRr = 7759 |
| 151974 | CEFBS_None, // VERWm = 7760 |
| 151975 | CEFBS_None, // VERWr = 7761 |
| 151976 | CEFBS_None, // VEXP2PDZm = 7762 |
| 151977 | CEFBS_None, // VEXP2PDZmb = 7763 |
| 151978 | CEFBS_None, // VEXP2PDZmbk = 7764 |
| 151979 | CEFBS_None, // VEXP2PDZmbkz = 7765 |
| 151980 | CEFBS_None, // VEXP2PDZmk = 7766 |
| 151981 | CEFBS_None, // VEXP2PDZmkz = 7767 |
| 151982 | CEFBS_None, // VEXP2PDZr = 7768 |
| 151983 | CEFBS_None, // VEXP2PDZrb = 7769 |
| 151984 | CEFBS_None, // VEXP2PDZrbk = 7770 |
| 151985 | CEFBS_None, // VEXP2PDZrbkz = 7771 |
| 151986 | CEFBS_None, // VEXP2PDZrk = 7772 |
| 151987 | CEFBS_None, // VEXP2PDZrkz = 7773 |
| 151988 | CEFBS_None, // VEXP2PSZm = 7774 |
| 151989 | CEFBS_None, // VEXP2PSZmb = 7775 |
| 151990 | CEFBS_None, // VEXP2PSZmbk = 7776 |
| 151991 | CEFBS_None, // VEXP2PSZmbkz = 7777 |
| 151992 | CEFBS_None, // VEXP2PSZmk = 7778 |
| 151993 | CEFBS_None, // VEXP2PSZmkz = 7779 |
| 151994 | CEFBS_None, // VEXP2PSZr = 7780 |
| 151995 | CEFBS_None, // VEXP2PSZrb = 7781 |
| 151996 | CEFBS_None, // VEXP2PSZrbk = 7782 |
| 151997 | CEFBS_None, // VEXP2PSZrbkz = 7783 |
| 151998 | CEFBS_None, // VEXP2PSZrk = 7784 |
| 151999 | CEFBS_None, // VEXP2PSZrkz = 7785 |
| 152000 | CEFBS_None, // VEXPANDPDZ128rm = 7786 |
| 152001 | CEFBS_None, // VEXPANDPDZ128rmk = 7787 |
| 152002 | CEFBS_None, // VEXPANDPDZ128rmkz = 7788 |
| 152003 | CEFBS_None, // VEXPANDPDZ128rr = 7789 |
| 152004 | CEFBS_None, // VEXPANDPDZ128rrk = 7790 |
| 152005 | CEFBS_None, // VEXPANDPDZ128rrkz = 7791 |
| 152006 | CEFBS_None, // VEXPANDPDZ256rm = 7792 |
| 152007 | CEFBS_None, // VEXPANDPDZ256rmk = 7793 |
| 152008 | CEFBS_None, // VEXPANDPDZ256rmkz = 7794 |
| 152009 | CEFBS_None, // VEXPANDPDZ256rr = 7795 |
| 152010 | CEFBS_None, // VEXPANDPDZ256rrk = 7796 |
| 152011 | CEFBS_None, // VEXPANDPDZ256rrkz = 7797 |
| 152012 | CEFBS_None, // VEXPANDPDZrm = 7798 |
| 152013 | CEFBS_None, // VEXPANDPDZrmk = 7799 |
| 152014 | CEFBS_None, // VEXPANDPDZrmkz = 7800 |
| 152015 | CEFBS_None, // VEXPANDPDZrr = 7801 |
| 152016 | CEFBS_None, // VEXPANDPDZrrk = 7802 |
| 152017 | CEFBS_None, // VEXPANDPDZrrkz = 7803 |
| 152018 | CEFBS_None, // VEXPANDPSZ128rm = 7804 |
| 152019 | CEFBS_None, // VEXPANDPSZ128rmk = 7805 |
| 152020 | CEFBS_None, // VEXPANDPSZ128rmkz = 7806 |
| 152021 | CEFBS_None, // VEXPANDPSZ128rr = 7807 |
| 152022 | CEFBS_None, // VEXPANDPSZ128rrk = 7808 |
| 152023 | CEFBS_None, // VEXPANDPSZ128rrkz = 7809 |
| 152024 | CEFBS_None, // VEXPANDPSZ256rm = 7810 |
| 152025 | CEFBS_None, // VEXPANDPSZ256rmk = 7811 |
| 152026 | CEFBS_None, // VEXPANDPSZ256rmkz = 7812 |
| 152027 | CEFBS_None, // VEXPANDPSZ256rr = 7813 |
| 152028 | CEFBS_None, // VEXPANDPSZ256rrk = 7814 |
| 152029 | CEFBS_None, // VEXPANDPSZ256rrkz = 7815 |
| 152030 | CEFBS_None, // VEXPANDPSZrm = 7816 |
| 152031 | CEFBS_None, // VEXPANDPSZrmk = 7817 |
| 152032 | CEFBS_None, // VEXPANDPSZrmkz = 7818 |
| 152033 | CEFBS_None, // VEXPANDPSZrr = 7819 |
| 152034 | CEFBS_None, // VEXPANDPSZrrk = 7820 |
| 152035 | CEFBS_None, // VEXPANDPSZrrkz = 7821 |
| 152036 | CEFBS_None, // VEXTRACTF128mr = 7822 |
| 152037 | CEFBS_None, // VEXTRACTF128rr = 7823 |
| 152038 | CEFBS_None, // VEXTRACTF32x4Z256mr = 7824 |
| 152039 | CEFBS_None, // VEXTRACTF32x4Z256mrk = 7825 |
| 152040 | CEFBS_None, // VEXTRACTF32x4Z256rr = 7826 |
| 152041 | CEFBS_None, // VEXTRACTF32x4Z256rrk = 7827 |
| 152042 | CEFBS_None, // VEXTRACTF32x4Z256rrkz = 7828 |
| 152043 | CEFBS_None, // VEXTRACTF32x4Zmr = 7829 |
| 152044 | CEFBS_None, // VEXTRACTF32x4Zmrk = 7830 |
| 152045 | CEFBS_None, // VEXTRACTF32x4Zrr = 7831 |
| 152046 | CEFBS_None, // VEXTRACTF32x4Zrrk = 7832 |
| 152047 | CEFBS_None, // VEXTRACTF32x4Zrrkz = 7833 |
| 152048 | CEFBS_None, // VEXTRACTF32x8Zmr = 7834 |
| 152049 | CEFBS_None, // VEXTRACTF32x8Zmrk = 7835 |
| 152050 | CEFBS_None, // VEXTRACTF32x8Zrr = 7836 |
| 152051 | CEFBS_None, // VEXTRACTF32x8Zrrk = 7837 |
| 152052 | CEFBS_None, // VEXTRACTF32x8Zrrkz = 7838 |
| 152053 | CEFBS_None, // VEXTRACTF64x2Z256mr = 7839 |
| 152054 | CEFBS_None, // VEXTRACTF64x2Z256mrk = 7840 |
| 152055 | CEFBS_None, // VEXTRACTF64x2Z256rr = 7841 |
| 152056 | CEFBS_None, // VEXTRACTF64x2Z256rrk = 7842 |
| 152057 | CEFBS_None, // VEXTRACTF64x2Z256rrkz = 7843 |
| 152058 | CEFBS_None, // VEXTRACTF64x2Zmr = 7844 |
| 152059 | CEFBS_None, // VEXTRACTF64x2Zmrk = 7845 |
| 152060 | CEFBS_None, // VEXTRACTF64x2Zrr = 7846 |
| 152061 | CEFBS_None, // VEXTRACTF64x2Zrrk = 7847 |
| 152062 | CEFBS_None, // VEXTRACTF64x2Zrrkz = 7848 |
| 152063 | CEFBS_None, // VEXTRACTF64x4Zmr = 7849 |
| 152064 | CEFBS_None, // VEXTRACTF64x4Zmrk = 7850 |
| 152065 | CEFBS_None, // VEXTRACTF64x4Zrr = 7851 |
| 152066 | CEFBS_None, // VEXTRACTF64x4Zrrk = 7852 |
| 152067 | CEFBS_None, // VEXTRACTF64x4Zrrkz = 7853 |
| 152068 | CEFBS_None, // VEXTRACTI128mr = 7854 |
| 152069 | CEFBS_None, // VEXTRACTI128rr = 7855 |
| 152070 | CEFBS_None, // VEXTRACTI32x4Z256mr = 7856 |
| 152071 | CEFBS_None, // VEXTRACTI32x4Z256mrk = 7857 |
| 152072 | CEFBS_None, // VEXTRACTI32x4Z256rr = 7858 |
| 152073 | CEFBS_None, // VEXTRACTI32x4Z256rrk = 7859 |
| 152074 | CEFBS_None, // VEXTRACTI32x4Z256rrkz = 7860 |
| 152075 | CEFBS_None, // VEXTRACTI32x4Zmr = 7861 |
| 152076 | CEFBS_None, // VEXTRACTI32x4Zmrk = 7862 |
| 152077 | CEFBS_None, // VEXTRACTI32x4Zrr = 7863 |
| 152078 | CEFBS_None, // VEXTRACTI32x4Zrrk = 7864 |
| 152079 | CEFBS_None, // VEXTRACTI32x4Zrrkz = 7865 |
| 152080 | CEFBS_None, // VEXTRACTI32x8Zmr = 7866 |
| 152081 | CEFBS_None, // VEXTRACTI32x8Zmrk = 7867 |
| 152082 | CEFBS_None, // VEXTRACTI32x8Zrr = 7868 |
| 152083 | CEFBS_None, // VEXTRACTI32x8Zrrk = 7869 |
| 152084 | CEFBS_None, // VEXTRACTI32x8Zrrkz = 7870 |
| 152085 | CEFBS_None, // VEXTRACTI64x2Z256mr = 7871 |
| 152086 | CEFBS_None, // VEXTRACTI64x2Z256mrk = 7872 |
| 152087 | CEFBS_None, // VEXTRACTI64x2Z256rr = 7873 |
| 152088 | CEFBS_None, // VEXTRACTI64x2Z256rrk = 7874 |
| 152089 | CEFBS_None, // VEXTRACTI64x2Z256rrkz = 7875 |
| 152090 | CEFBS_None, // VEXTRACTI64x2Zmr = 7876 |
| 152091 | CEFBS_None, // VEXTRACTI64x2Zmrk = 7877 |
| 152092 | CEFBS_None, // VEXTRACTI64x2Zrr = 7878 |
| 152093 | CEFBS_None, // VEXTRACTI64x2Zrrk = 7879 |
| 152094 | CEFBS_None, // VEXTRACTI64x2Zrrkz = 7880 |
| 152095 | CEFBS_None, // VEXTRACTI64x4Zmr = 7881 |
| 152096 | CEFBS_None, // VEXTRACTI64x4Zmrk = 7882 |
| 152097 | CEFBS_None, // VEXTRACTI64x4Zrr = 7883 |
| 152098 | CEFBS_None, // VEXTRACTI64x4Zrrk = 7884 |
| 152099 | CEFBS_None, // VEXTRACTI64x4Zrrkz = 7885 |
| 152100 | CEFBS_None, // VEXTRACTPSZmr = 7886 |
| 152101 | CEFBS_None, // VEXTRACTPSZrr = 7887 |
| 152102 | CEFBS_None, // VEXTRACTPSmr = 7888 |
| 152103 | CEFBS_None, // VEXTRACTPSrr = 7889 |
| 152104 | CEFBS_None, // VFCMADDCPHZ128m = 7890 |
| 152105 | CEFBS_None, // VFCMADDCPHZ128mb = 7891 |
| 152106 | CEFBS_None, // VFCMADDCPHZ128mbk = 7892 |
| 152107 | CEFBS_None, // VFCMADDCPHZ128mbkz = 7893 |
| 152108 | CEFBS_None, // VFCMADDCPHZ128mk = 7894 |
| 152109 | CEFBS_None, // VFCMADDCPHZ128mkz = 7895 |
| 152110 | CEFBS_None, // VFCMADDCPHZ128r = 7896 |
| 152111 | CEFBS_None, // VFCMADDCPHZ128rk = 7897 |
| 152112 | CEFBS_None, // VFCMADDCPHZ128rkz = 7898 |
| 152113 | CEFBS_None, // VFCMADDCPHZ256m = 7899 |
| 152114 | CEFBS_None, // VFCMADDCPHZ256mb = 7900 |
| 152115 | CEFBS_None, // VFCMADDCPHZ256mbk = 7901 |
| 152116 | CEFBS_None, // VFCMADDCPHZ256mbkz = 7902 |
| 152117 | CEFBS_None, // VFCMADDCPHZ256mk = 7903 |
| 152118 | CEFBS_None, // VFCMADDCPHZ256mkz = 7904 |
| 152119 | CEFBS_None, // VFCMADDCPHZ256r = 7905 |
| 152120 | CEFBS_None, // VFCMADDCPHZ256rk = 7906 |
| 152121 | CEFBS_None, // VFCMADDCPHZ256rkz = 7907 |
| 152122 | CEFBS_None, // VFCMADDCPHZm = 7908 |
| 152123 | CEFBS_None, // VFCMADDCPHZmb = 7909 |
| 152124 | CEFBS_None, // VFCMADDCPHZmbk = 7910 |
| 152125 | CEFBS_None, // VFCMADDCPHZmbkz = 7911 |
| 152126 | CEFBS_None, // VFCMADDCPHZmk = 7912 |
| 152127 | CEFBS_None, // VFCMADDCPHZmkz = 7913 |
| 152128 | CEFBS_None, // VFCMADDCPHZr = 7914 |
| 152129 | CEFBS_None, // VFCMADDCPHZrb = 7915 |
| 152130 | CEFBS_None, // VFCMADDCPHZrbk = 7916 |
| 152131 | CEFBS_None, // VFCMADDCPHZrbkz = 7917 |
| 152132 | CEFBS_None, // VFCMADDCPHZrk = 7918 |
| 152133 | CEFBS_None, // VFCMADDCPHZrkz = 7919 |
| 152134 | CEFBS_None, // VFCMADDCSHZm = 7920 |
| 152135 | CEFBS_None, // VFCMADDCSHZmk = 7921 |
| 152136 | CEFBS_None, // VFCMADDCSHZmkz = 7922 |
| 152137 | CEFBS_None, // VFCMADDCSHZr = 7923 |
| 152138 | CEFBS_None, // VFCMADDCSHZrb = 7924 |
| 152139 | CEFBS_None, // VFCMADDCSHZrbk = 7925 |
| 152140 | CEFBS_None, // VFCMADDCSHZrbkz = 7926 |
| 152141 | CEFBS_None, // VFCMADDCSHZrk = 7927 |
| 152142 | CEFBS_None, // VFCMADDCSHZrkz = 7928 |
| 152143 | CEFBS_None, // VFCMULCPHZ128rm = 7929 |
| 152144 | CEFBS_None, // VFCMULCPHZ128rmb = 7930 |
| 152145 | CEFBS_None, // VFCMULCPHZ128rmbk = 7931 |
| 152146 | CEFBS_None, // VFCMULCPHZ128rmbkz = 7932 |
| 152147 | CEFBS_None, // VFCMULCPHZ128rmk = 7933 |
| 152148 | CEFBS_None, // VFCMULCPHZ128rmkz = 7934 |
| 152149 | CEFBS_None, // VFCMULCPHZ128rr = 7935 |
| 152150 | CEFBS_None, // VFCMULCPHZ128rrk = 7936 |
| 152151 | CEFBS_None, // VFCMULCPHZ128rrkz = 7937 |
| 152152 | CEFBS_None, // VFCMULCPHZ256rm = 7938 |
| 152153 | CEFBS_None, // VFCMULCPHZ256rmb = 7939 |
| 152154 | CEFBS_None, // VFCMULCPHZ256rmbk = 7940 |
| 152155 | CEFBS_None, // VFCMULCPHZ256rmbkz = 7941 |
| 152156 | CEFBS_None, // VFCMULCPHZ256rmk = 7942 |
| 152157 | CEFBS_None, // VFCMULCPHZ256rmkz = 7943 |
| 152158 | CEFBS_None, // VFCMULCPHZ256rr = 7944 |
| 152159 | CEFBS_None, // VFCMULCPHZ256rrk = 7945 |
| 152160 | CEFBS_None, // VFCMULCPHZ256rrkz = 7946 |
| 152161 | CEFBS_None, // VFCMULCPHZrm = 7947 |
| 152162 | CEFBS_None, // VFCMULCPHZrmb = 7948 |
| 152163 | CEFBS_None, // VFCMULCPHZrmbk = 7949 |
| 152164 | CEFBS_None, // VFCMULCPHZrmbkz = 7950 |
| 152165 | CEFBS_None, // VFCMULCPHZrmk = 7951 |
| 152166 | CEFBS_None, // VFCMULCPHZrmkz = 7952 |
| 152167 | CEFBS_None, // VFCMULCPHZrr = 7953 |
| 152168 | CEFBS_None, // VFCMULCPHZrrb = 7954 |
| 152169 | CEFBS_None, // VFCMULCPHZrrbk = 7955 |
| 152170 | CEFBS_None, // VFCMULCPHZrrbkz = 7956 |
| 152171 | CEFBS_None, // VFCMULCPHZrrk = 7957 |
| 152172 | CEFBS_None, // VFCMULCPHZrrkz = 7958 |
| 152173 | CEFBS_None, // VFCMULCSHZrm = 7959 |
| 152174 | CEFBS_None, // VFCMULCSHZrmk = 7960 |
| 152175 | CEFBS_None, // VFCMULCSHZrmkz = 7961 |
| 152176 | CEFBS_None, // VFCMULCSHZrr = 7962 |
| 152177 | CEFBS_None, // VFCMULCSHZrrb = 7963 |
| 152178 | CEFBS_None, // VFCMULCSHZrrbk = 7964 |
| 152179 | CEFBS_None, // VFCMULCSHZrrbkz = 7965 |
| 152180 | CEFBS_None, // VFCMULCSHZrrk = 7966 |
| 152181 | CEFBS_None, // VFCMULCSHZrrkz = 7967 |
| 152182 | CEFBS_None, // VFIXUPIMMPDZ128rmbi = 7968 |
| 152183 | CEFBS_None, // VFIXUPIMMPDZ128rmbik = 7969 |
| 152184 | CEFBS_None, // VFIXUPIMMPDZ128rmbikz = 7970 |
| 152185 | CEFBS_None, // VFIXUPIMMPDZ128rmi = 7971 |
| 152186 | CEFBS_None, // VFIXUPIMMPDZ128rmik = 7972 |
| 152187 | CEFBS_None, // VFIXUPIMMPDZ128rmikz = 7973 |
| 152188 | CEFBS_None, // VFIXUPIMMPDZ128rri = 7974 |
| 152189 | CEFBS_None, // VFIXUPIMMPDZ128rrik = 7975 |
| 152190 | CEFBS_None, // VFIXUPIMMPDZ128rrikz = 7976 |
| 152191 | CEFBS_None, // VFIXUPIMMPDZ256rmbi = 7977 |
| 152192 | CEFBS_None, // VFIXUPIMMPDZ256rmbik = 7978 |
| 152193 | CEFBS_None, // VFIXUPIMMPDZ256rmbikz = 7979 |
| 152194 | CEFBS_None, // VFIXUPIMMPDZ256rmi = 7980 |
| 152195 | CEFBS_None, // VFIXUPIMMPDZ256rmik = 7981 |
| 152196 | CEFBS_None, // VFIXUPIMMPDZ256rmikz = 7982 |
| 152197 | CEFBS_None, // VFIXUPIMMPDZ256rri = 7983 |
| 152198 | CEFBS_None, // VFIXUPIMMPDZ256rrik = 7984 |
| 152199 | CEFBS_None, // VFIXUPIMMPDZ256rrikz = 7985 |
| 152200 | CEFBS_None, // VFIXUPIMMPDZrmbi = 7986 |
| 152201 | CEFBS_None, // VFIXUPIMMPDZrmbik = 7987 |
| 152202 | CEFBS_None, // VFIXUPIMMPDZrmbikz = 7988 |
| 152203 | CEFBS_None, // VFIXUPIMMPDZrmi = 7989 |
| 152204 | CEFBS_None, // VFIXUPIMMPDZrmik = 7990 |
| 152205 | CEFBS_None, // VFIXUPIMMPDZrmikz = 7991 |
| 152206 | CEFBS_None, // VFIXUPIMMPDZrri = 7992 |
| 152207 | CEFBS_None, // VFIXUPIMMPDZrrib = 7993 |
| 152208 | CEFBS_None, // VFIXUPIMMPDZrribk = 7994 |
| 152209 | CEFBS_None, // VFIXUPIMMPDZrribkz = 7995 |
| 152210 | CEFBS_None, // VFIXUPIMMPDZrrik = 7996 |
| 152211 | CEFBS_None, // VFIXUPIMMPDZrrikz = 7997 |
| 152212 | CEFBS_None, // VFIXUPIMMPSZ128rmbi = 7998 |
| 152213 | CEFBS_None, // VFIXUPIMMPSZ128rmbik = 7999 |
| 152214 | CEFBS_None, // VFIXUPIMMPSZ128rmbikz = 8000 |
| 152215 | CEFBS_None, // VFIXUPIMMPSZ128rmi = 8001 |
| 152216 | CEFBS_None, // VFIXUPIMMPSZ128rmik = 8002 |
| 152217 | CEFBS_None, // VFIXUPIMMPSZ128rmikz = 8003 |
| 152218 | CEFBS_None, // VFIXUPIMMPSZ128rri = 8004 |
| 152219 | CEFBS_None, // VFIXUPIMMPSZ128rrik = 8005 |
| 152220 | CEFBS_None, // VFIXUPIMMPSZ128rrikz = 8006 |
| 152221 | CEFBS_None, // VFIXUPIMMPSZ256rmbi = 8007 |
| 152222 | CEFBS_None, // VFIXUPIMMPSZ256rmbik = 8008 |
| 152223 | CEFBS_None, // VFIXUPIMMPSZ256rmbikz = 8009 |
| 152224 | CEFBS_None, // VFIXUPIMMPSZ256rmi = 8010 |
| 152225 | CEFBS_None, // VFIXUPIMMPSZ256rmik = 8011 |
| 152226 | CEFBS_None, // VFIXUPIMMPSZ256rmikz = 8012 |
| 152227 | CEFBS_None, // VFIXUPIMMPSZ256rri = 8013 |
| 152228 | CEFBS_None, // VFIXUPIMMPSZ256rrik = 8014 |
| 152229 | CEFBS_None, // VFIXUPIMMPSZ256rrikz = 8015 |
| 152230 | CEFBS_None, // VFIXUPIMMPSZrmbi = 8016 |
| 152231 | CEFBS_None, // VFIXUPIMMPSZrmbik = 8017 |
| 152232 | CEFBS_None, // VFIXUPIMMPSZrmbikz = 8018 |
| 152233 | CEFBS_None, // VFIXUPIMMPSZrmi = 8019 |
| 152234 | CEFBS_None, // VFIXUPIMMPSZrmik = 8020 |
| 152235 | CEFBS_None, // VFIXUPIMMPSZrmikz = 8021 |
| 152236 | CEFBS_None, // VFIXUPIMMPSZrri = 8022 |
| 152237 | CEFBS_None, // VFIXUPIMMPSZrrib = 8023 |
| 152238 | CEFBS_None, // VFIXUPIMMPSZrribk = 8024 |
| 152239 | CEFBS_None, // VFIXUPIMMPSZrribkz = 8025 |
| 152240 | CEFBS_None, // VFIXUPIMMPSZrrik = 8026 |
| 152241 | CEFBS_None, // VFIXUPIMMPSZrrikz = 8027 |
| 152242 | CEFBS_None, // VFIXUPIMMSDZrmi = 8028 |
| 152243 | CEFBS_None, // VFIXUPIMMSDZrmik = 8029 |
| 152244 | CEFBS_None, // VFIXUPIMMSDZrmikz = 8030 |
| 152245 | CEFBS_None, // VFIXUPIMMSDZrri = 8031 |
| 152246 | CEFBS_None, // VFIXUPIMMSDZrrib = 8032 |
| 152247 | CEFBS_None, // VFIXUPIMMSDZrribk = 8033 |
| 152248 | CEFBS_None, // VFIXUPIMMSDZrribkz = 8034 |
| 152249 | CEFBS_None, // VFIXUPIMMSDZrrik = 8035 |
| 152250 | CEFBS_None, // VFIXUPIMMSDZrrikz = 8036 |
| 152251 | CEFBS_None, // VFIXUPIMMSSZrmi = 8037 |
| 152252 | CEFBS_None, // VFIXUPIMMSSZrmik = 8038 |
| 152253 | CEFBS_None, // VFIXUPIMMSSZrmikz = 8039 |
| 152254 | CEFBS_None, // VFIXUPIMMSSZrri = 8040 |
| 152255 | CEFBS_None, // VFIXUPIMMSSZrrib = 8041 |
| 152256 | CEFBS_None, // VFIXUPIMMSSZrribk = 8042 |
| 152257 | CEFBS_None, // VFIXUPIMMSSZrribkz = 8043 |
| 152258 | CEFBS_None, // VFIXUPIMMSSZrrik = 8044 |
| 152259 | CEFBS_None, // VFIXUPIMMSSZrrikz = 8045 |
| 152260 | CEFBS_None, // VFMADD132PDYm = 8046 |
| 152261 | CEFBS_None, // VFMADD132PDYr = 8047 |
| 152262 | CEFBS_None, // VFMADD132PDZ128m = 8048 |
| 152263 | CEFBS_None, // VFMADD132PDZ128mb = 8049 |
| 152264 | CEFBS_None, // VFMADD132PDZ128mbk = 8050 |
| 152265 | CEFBS_None, // VFMADD132PDZ128mbkz = 8051 |
| 152266 | CEFBS_None, // VFMADD132PDZ128mk = 8052 |
| 152267 | CEFBS_None, // VFMADD132PDZ128mkz = 8053 |
| 152268 | CEFBS_None, // VFMADD132PDZ128r = 8054 |
| 152269 | CEFBS_None, // VFMADD132PDZ128rk = 8055 |
| 152270 | CEFBS_None, // VFMADD132PDZ128rkz = 8056 |
| 152271 | CEFBS_None, // VFMADD132PDZ256m = 8057 |
| 152272 | CEFBS_None, // VFMADD132PDZ256mb = 8058 |
| 152273 | CEFBS_None, // VFMADD132PDZ256mbk = 8059 |
| 152274 | CEFBS_None, // VFMADD132PDZ256mbkz = 8060 |
| 152275 | CEFBS_None, // VFMADD132PDZ256mk = 8061 |
| 152276 | CEFBS_None, // VFMADD132PDZ256mkz = 8062 |
| 152277 | CEFBS_None, // VFMADD132PDZ256r = 8063 |
| 152278 | CEFBS_None, // VFMADD132PDZ256rk = 8064 |
| 152279 | CEFBS_None, // VFMADD132PDZ256rkz = 8065 |
| 152280 | CEFBS_None, // VFMADD132PDZm = 8066 |
| 152281 | CEFBS_None, // VFMADD132PDZmb = 8067 |
| 152282 | CEFBS_None, // VFMADD132PDZmbk = 8068 |
| 152283 | CEFBS_None, // VFMADD132PDZmbkz = 8069 |
| 152284 | CEFBS_None, // VFMADD132PDZmk = 8070 |
| 152285 | CEFBS_None, // VFMADD132PDZmkz = 8071 |
| 152286 | CEFBS_None, // VFMADD132PDZr = 8072 |
| 152287 | CEFBS_None, // VFMADD132PDZrb = 8073 |
| 152288 | CEFBS_None, // VFMADD132PDZrbk = 8074 |
| 152289 | CEFBS_None, // VFMADD132PDZrbkz = 8075 |
| 152290 | CEFBS_None, // VFMADD132PDZrk = 8076 |
| 152291 | CEFBS_None, // VFMADD132PDZrkz = 8077 |
| 152292 | CEFBS_None, // VFMADD132PDm = 8078 |
| 152293 | CEFBS_None, // VFMADD132PDr = 8079 |
| 152294 | CEFBS_None, // VFMADD132PHZ128m = 8080 |
| 152295 | CEFBS_None, // VFMADD132PHZ128mb = 8081 |
| 152296 | CEFBS_None, // VFMADD132PHZ128mbk = 8082 |
| 152297 | CEFBS_None, // VFMADD132PHZ128mbkz = 8083 |
| 152298 | CEFBS_None, // VFMADD132PHZ128mk = 8084 |
| 152299 | CEFBS_None, // VFMADD132PHZ128mkz = 8085 |
| 152300 | CEFBS_None, // VFMADD132PHZ128r = 8086 |
| 152301 | CEFBS_None, // VFMADD132PHZ128rk = 8087 |
| 152302 | CEFBS_None, // VFMADD132PHZ128rkz = 8088 |
| 152303 | CEFBS_None, // VFMADD132PHZ256m = 8089 |
| 152304 | CEFBS_None, // VFMADD132PHZ256mb = 8090 |
| 152305 | CEFBS_None, // VFMADD132PHZ256mbk = 8091 |
| 152306 | CEFBS_None, // VFMADD132PHZ256mbkz = 8092 |
| 152307 | CEFBS_None, // VFMADD132PHZ256mk = 8093 |
| 152308 | CEFBS_None, // VFMADD132PHZ256mkz = 8094 |
| 152309 | CEFBS_None, // VFMADD132PHZ256r = 8095 |
| 152310 | CEFBS_None, // VFMADD132PHZ256rk = 8096 |
| 152311 | CEFBS_None, // VFMADD132PHZ256rkz = 8097 |
| 152312 | CEFBS_None, // VFMADD132PHZm = 8098 |
| 152313 | CEFBS_None, // VFMADD132PHZmb = 8099 |
| 152314 | CEFBS_None, // VFMADD132PHZmbk = 8100 |
| 152315 | CEFBS_None, // VFMADD132PHZmbkz = 8101 |
| 152316 | CEFBS_None, // VFMADD132PHZmk = 8102 |
| 152317 | CEFBS_None, // VFMADD132PHZmkz = 8103 |
| 152318 | CEFBS_None, // VFMADD132PHZr = 8104 |
| 152319 | CEFBS_None, // VFMADD132PHZrb = 8105 |
| 152320 | CEFBS_None, // VFMADD132PHZrbk = 8106 |
| 152321 | CEFBS_None, // VFMADD132PHZrbkz = 8107 |
| 152322 | CEFBS_None, // VFMADD132PHZrk = 8108 |
| 152323 | CEFBS_None, // VFMADD132PHZrkz = 8109 |
| 152324 | CEFBS_None, // VFMADD132PSYm = 8110 |
| 152325 | CEFBS_None, // VFMADD132PSYr = 8111 |
| 152326 | CEFBS_None, // VFMADD132PSZ128m = 8112 |
| 152327 | CEFBS_None, // VFMADD132PSZ128mb = 8113 |
| 152328 | CEFBS_None, // VFMADD132PSZ128mbk = 8114 |
| 152329 | CEFBS_None, // VFMADD132PSZ128mbkz = 8115 |
| 152330 | CEFBS_None, // VFMADD132PSZ128mk = 8116 |
| 152331 | CEFBS_None, // VFMADD132PSZ128mkz = 8117 |
| 152332 | CEFBS_None, // VFMADD132PSZ128r = 8118 |
| 152333 | CEFBS_None, // VFMADD132PSZ128rk = 8119 |
| 152334 | CEFBS_None, // VFMADD132PSZ128rkz = 8120 |
| 152335 | CEFBS_None, // VFMADD132PSZ256m = 8121 |
| 152336 | CEFBS_None, // VFMADD132PSZ256mb = 8122 |
| 152337 | CEFBS_None, // VFMADD132PSZ256mbk = 8123 |
| 152338 | CEFBS_None, // VFMADD132PSZ256mbkz = 8124 |
| 152339 | CEFBS_None, // VFMADD132PSZ256mk = 8125 |
| 152340 | CEFBS_None, // VFMADD132PSZ256mkz = 8126 |
| 152341 | CEFBS_None, // VFMADD132PSZ256r = 8127 |
| 152342 | CEFBS_None, // VFMADD132PSZ256rk = 8128 |
| 152343 | CEFBS_None, // VFMADD132PSZ256rkz = 8129 |
| 152344 | CEFBS_None, // VFMADD132PSZm = 8130 |
| 152345 | CEFBS_None, // VFMADD132PSZmb = 8131 |
| 152346 | CEFBS_None, // VFMADD132PSZmbk = 8132 |
| 152347 | CEFBS_None, // VFMADD132PSZmbkz = 8133 |
| 152348 | CEFBS_None, // VFMADD132PSZmk = 8134 |
| 152349 | CEFBS_None, // VFMADD132PSZmkz = 8135 |
| 152350 | CEFBS_None, // VFMADD132PSZr = 8136 |
| 152351 | CEFBS_None, // VFMADD132PSZrb = 8137 |
| 152352 | CEFBS_None, // VFMADD132PSZrbk = 8138 |
| 152353 | CEFBS_None, // VFMADD132PSZrbkz = 8139 |
| 152354 | CEFBS_None, // VFMADD132PSZrk = 8140 |
| 152355 | CEFBS_None, // VFMADD132PSZrkz = 8141 |
| 152356 | CEFBS_None, // VFMADD132PSm = 8142 |
| 152357 | CEFBS_None, // VFMADD132PSr = 8143 |
| 152358 | CEFBS_None, // VFMADD132SDZm = 8144 |
| 152359 | CEFBS_None, // VFMADD132SDZm_Int = 8145 |
| 152360 | CEFBS_None, // VFMADD132SDZm_Intk = 8146 |
| 152361 | CEFBS_None, // VFMADD132SDZm_Intkz = 8147 |
| 152362 | CEFBS_None, // VFMADD132SDZr = 8148 |
| 152363 | CEFBS_None, // VFMADD132SDZr_Int = 8149 |
| 152364 | CEFBS_None, // VFMADD132SDZr_Intk = 8150 |
| 152365 | CEFBS_None, // VFMADD132SDZr_Intkz = 8151 |
| 152366 | CEFBS_None, // VFMADD132SDZrb = 8152 |
| 152367 | CEFBS_None, // VFMADD132SDZrb_Int = 8153 |
| 152368 | CEFBS_None, // VFMADD132SDZrb_Intk = 8154 |
| 152369 | CEFBS_None, // VFMADD132SDZrb_Intkz = 8155 |
| 152370 | CEFBS_None, // VFMADD132SDm = 8156 |
| 152371 | CEFBS_None, // VFMADD132SDm_Int = 8157 |
| 152372 | CEFBS_None, // VFMADD132SDr = 8158 |
| 152373 | CEFBS_None, // VFMADD132SDr_Int = 8159 |
| 152374 | CEFBS_None, // VFMADD132SHZm = 8160 |
| 152375 | CEFBS_None, // VFMADD132SHZm_Int = 8161 |
| 152376 | CEFBS_None, // VFMADD132SHZm_Intk = 8162 |
| 152377 | CEFBS_None, // VFMADD132SHZm_Intkz = 8163 |
| 152378 | CEFBS_None, // VFMADD132SHZr = 8164 |
| 152379 | CEFBS_None, // VFMADD132SHZr_Int = 8165 |
| 152380 | CEFBS_None, // VFMADD132SHZr_Intk = 8166 |
| 152381 | CEFBS_None, // VFMADD132SHZr_Intkz = 8167 |
| 152382 | CEFBS_None, // VFMADD132SHZrb = 8168 |
| 152383 | CEFBS_None, // VFMADD132SHZrb_Int = 8169 |
| 152384 | CEFBS_None, // VFMADD132SHZrb_Intk = 8170 |
| 152385 | CEFBS_None, // VFMADD132SHZrb_Intkz = 8171 |
| 152386 | CEFBS_None, // VFMADD132SSZm = 8172 |
| 152387 | CEFBS_None, // VFMADD132SSZm_Int = 8173 |
| 152388 | CEFBS_None, // VFMADD132SSZm_Intk = 8174 |
| 152389 | CEFBS_None, // VFMADD132SSZm_Intkz = 8175 |
| 152390 | CEFBS_None, // VFMADD132SSZr = 8176 |
| 152391 | CEFBS_None, // VFMADD132SSZr_Int = 8177 |
| 152392 | CEFBS_None, // VFMADD132SSZr_Intk = 8178 |
| 152393 | CEFBS_None, // VFMADD132SSZr_Intkz = 8179 |
| 152394 | CEFBS_None, // VFMADD132SSZrb = 8180 |
| 152395 | CEFBS_None, // VFMADD132SSZrb_Int = 8181 |
| 152396 | CEFBS_None, // VFMADD132SSZrb_Intk = 8182 |
| 152397 | CEFBS_None, // VFMADD132SSZrb_Intkz = 8183 |
| 152398 | CEFBS_None, // VFMADD132SSm = 8184 |
| 152399 | CEFBS_None, // VFMADD132SSm_Int = 8185 |
| 152400 | CEFBS_None, // VFMADD132SSr = 8186 |
| 152401 | CEFBS_None, // VFMADD132SSr_Int = 8187 |
| 152402 | CEFBS_None, // VFMADD213PDYm = 8188 |
| 152403 | CEFBS_None, // VFMADD213PDYr = 8189 |
| 152404 | CEFBS_None, // VFMADD213PDZ128m = 8190 |
| 152405 | CEFBS_None, // VFMADD213PDZ128mb = 8191 |
| 152406 | CEFBS_None, // VFMADD213PDZ128mbk = 8192 |
| 152407 | CEFBS_None, // VFMADD213PDZ128mbkz = 8193 |
| 152408 | CEFBS_None, // VFMADD213PDZ128mk = 8194 |
| 152409 | CEFBS_None, // VFMADD213PDZ128mkz = 8195 |
| 152410 | CEFBS_None, // VFMADD213PDZ128r = 8196 |
| 152411 | CEFBS_None, // VFMADD213PDZ128rk = 8197 |
| 152412 | CEFBS_None, // VFMADD213PDZ128rkz = 8198 |
| 152413 | CEFBS_None, // VFMADD213PDZ256m = 8199 |
| 152414 | CEFBS_None, // VFMADD213PDZ256mb = 8200 |
| 152415 | CEFBS_None, // VFMADD213PDZ256mbk = 8201 |
| 152416 | CEFBS_None, // VFMADD213PDZ256mbkz = 8202 |
| 152417 | CEFBS_None, // VFMADD213PDZ256mk = 8203 |
| 152418 | CEFBS_None, // VFMADD213PDZ256mkz = 8204 |
| 152419 | CEFBS_None, // VFMADD213PDZ256r = 8205 |
| 152420 | CEFBS_None, // VFMADD213PDZ256rk = 8206 |
| 152421 | CEFBS_None, // VFMADD213PDZ256rkz = 8207 |
| 152422 | CEFBS_None, // VFMADD213PDZm = 8208 |
| 152423 | CEFBS_None, // VFMADD213PDZmb = 8209 |
| 152424 | CEFBS_None, // VFMADD213PDZmbk = 8210 |
| 152425 | CEFBS_None, // VFMADD213PDZmbkz = 8211 |
| 152426 | CEFBS_None, // VFMADD213PDZmk = 8212 |
| 152427 | CEFBS_None, // VFMADD213PDZmkz = 8213 |
| 152428 | CEFBS_None, // VFMADD213PDZr = 8214 |
| 152429 | CEFBS_None, // VFMADD213PDZrb = 8215 |
| 152430 | CEFBS_None, // VFMADD213PDZrbk = 8216 |
| 152431 | CEFBS_None, // VFMADD213PDZrbkz = 8217 |
| 152432 | CEFBS_None, // VFMADD213PDZrk = 8218 |
| 152433 | CEFBS_None, // VFMADD213PDZrkz = 8219 |
| 152434 | CEFBS_None, // VFMADD213PDm = 8220 |
| 152435 | CEFBS_None, // VFMADD213PDr = 8221 |
| 152436 | CEFBS_None, // VFMADD213PHZ128m = 8222 |
| 152437 | CEFBS_None, // VFMADD213PHZ128mb = 8223 |
| 152438 | CEFBS_None, // VFMADD213PHZ128mbk = 8224 |
| 152439 | CEFBS_None, // VFMADD213PHZ128mbkz = 8225 |
| 152440 | CEFBS_None, // VFMADD213PHZ128mk = 8226 |
| 152441 | CEFBS_None, // VFMADD213PHZ128mkz = 8227 |
| 152442 | CEFBS_None, // VFMADD213PHZ128r = 8228 |
| 152443 | CEFBS_None, // VFMADD213PHZ128rk = 8229 |
| 152444 | CEFBS_None, // VFMADD213PHZ128rkz = 8230 |
| 152445 | CEFBS_None, // VFMADD213PHZ256m = 8231 |
| 152446 | CEFBS_None, // VFMADD213PHZ256mb = 8232 |
| 152447 | CEFBS_None, // VFMADD213PHZ256mbk = 8233 |
| 152448 | CEFBS_None, // VFMADD213PHZ256mbkz = 8234 |
| 152449 | CEFBS_None, // VFMADD213PHZ256mk = 8235 |
| 152450 | CEFBS_None, // VFMADD213PHZ256mkz = 8236 |
| 152451 | CEFBS_None, // VFMADD213PHZ256r = 8237 |
| 152452 | CEFBS_None, // VFMADD213PHZ256rk = 8238 |
| 152453 | CEFBS_None, // VFMADD213PHZ256rkz = 8239 |
| 152454 | CEFBS_None, // VFMADD213PHZm = 8240 |
| 152455 | CEFBS_None, // VFMADD213PHZmb = 8241 |
| 152456 | CEFBS_None, // VFMADD213PHZmbk = 8242 |
| 152457 | CEFBS_None, // VFMADD213PHZmbkz = 8243 |
| 152458 | CEFBS_None, // VFMADD213PHZmk = 8244 |
| 152459 | CEFBS_None, // VFMADD213PHZmkz = 8245 |
| 152460 | CEFBS_None, // VFMADD213PHZr = 8246 |
| 152461 | CEFBS_None, // VFMADD213PHZrb = 8247 |
| 152462 | CEFBS_None, // VFMADD213PHZrbk = 8248 |
| 152463 | CEFBS_None, // VFMADD213PHZrbkz = 8249 |
| 152464 | CEFBS_None, // VFMADD213PHZrk = 8250 |
| 152465 | CEFBS_None, // VFMADD213PHZrkz = 8251 |
| 152466 | CEFBS_None, // VFMADD213PSYm = 8252 |
| 152467 | CEFBS_None, // VFMADD213PSYr = 8253 |
| 152468 | CEFBS_None, // VFMADD213PSZ128m = 8254 |
| 152469 | CEFBS_None, // VFMADD213PSZ128mb = 8255 |
| 152470 | CEFBS_None, // VFMADD213PSZ128mbk = 8256 |
| 152471 | CEFBS_None, // VFMADD213PSZ128mbkz = 8257 |
| 152472 | CEFBS_None, // VFMADD213PSZ128mk = 8258 |
| 152473 | CEFBS_None, // VFMADD213PSZ128mkz = 8259 |
| 152474 | CEFBS_None, // VFMADD213PSZ128r = 8260 |
| 152475 | CEFBS_None, // VFMADD213PSZ128rk = 8261 |
| 152476 | CEFBS_None, // VFMADD213PSZ128rkz = 8262 |
| 152477 | CEFBS_None, // VFMADD213PSZ256m = 8263 |
| 152478 | CEFBS_None, // VFMADD213PSZ256mb = 8264 |
| 152479 | CEFBS_None, // VFMADD213PSZ256mbk = 8265 |
| 152480 | CEFBS_None, // VFMADD213PSZ256mbkz = 8266 |
| 152481 | CEFBS_None, // VFMADD213PSZ256mk = 8267 |
| 152482 | CEFBS_None, // VFMADD213PSZ256mkz = 8268 |
| 152483 | CEFBS_None, // VFMADD213PSZ256r = 8269 |
| 152484 | CEFBS_None, // VFMADD213PSZ256rk = 8270 |
| 152485 | CEFBS_None, // VFMADD213PSZ256rkz = 8271 |
| 152486 | CEFBS_None, // VFMADD213PSZm = 8272 |
| 152487 | CEFBS_None, // VFMADD213PSZmb = 8273 |
| 152488 | CEFBS_None, // VFMADD213PSZmbk = 8274 |
| 152489 | CEFBS_None, // VFMADD213PSZmbkz = 8275 |
| 152490 | CEFBS_None, // VFMADD213PSZmk = 8276 |
| 152491 | CEFBS_None, // VFMADD213PSZmkz = 8277 |
| 152492 | CEFBS_None, // VFMADD213PSZr = 8278 |
| 152493 | CEFBS_None, // VFMADD213PSZrb = 8279 |
| 152494 | CEFBS_None, // VFMADD213PSZrbk = 8280 |
| 152495 | CEFBS_None, // VFMADD213PSZrbkz = 8281 |
| 152496 | CEFBS_None, // VFMADD213PSZrk = 8282 |
| 152497 | CEFBS_None, // VFMADD213PSZrkz = 8283 |
| 152498 | CEFBS_None, // VFMADD213PSm = 8284 |
| 152499 | CEFBS_None, // VFMADD213PSr = 8285 |
| 152500 | CEFBS_None, // VFMADD213SDZm = 8286 |
| 152501 | CEFBS_None, // VFMADD213SDZm_Int = 8287 |
| 152502 | CEFBS_None, // VFMADD213SDZm_Intk = 8288 |
| 152503 | CEFBS_None, // VFMADD213SDZm_Intkz = 8289 |
| 152504 | CEFBS_None, // VFMADD213SDZr = 8290 |
| 152505 | CEFBS_None, // VFMADD213SDZr_Int = 8291 |
| 152506 | CEFBS_None, // VFMADD213SDZr_Intk = 8292 |
| 152507 | CEFBS_None, // VFMADD213SDZr_Intkz = 8293 |
| 152508 | CEFBS_None, // VFMADD213SDZrb = 8294 |
| 152509 | CEFBS_None, // VFMADD213SDZrb_Int = 8295 |
| 152510 | CEFBS_None, // VFMADD213SDZrb_Intk = 8296 |
| 152511 | CEFBS_None, // VFMADD213SDZrb_Intkz = 8297 |
| 152512 | CEFBS_None, // VFMADD213SDm = 8298 |
| 152513 | CEFBS_None, // VFMADD213SDm_Int = 8299 |
| 152514 | CEFBS_None, // VFMADD213SDr = 8300 |
| 152515 | CEFBS_None, // VFMADD213SDr_Int = 8301 |
| 152516 | CEFBS_None, // VFMADD213SHZm = 8302 |
| 152517 | CEFBS_None, // VFMADD213SHZm_Int = 8303 |
| 152518 | CEFBS_None, // VFMADD213SHZm_Intk = 8304 |
| 152519 | CEFBS_None, // VFMADD213SHZm_Intkz = 8305 |
| 152520 | CEFBS_None, // VFMADD213SHZr = 8306 |
| 152521 | CEFBS_None, // VFMADD213SHZr_Int = 8307 |
| 152522 | CEFBS_None, // VFMADD213SHZr_Intk = 8308 |
| 152523 | CEFBS_None, // VFMADD213SHZr_Intkz = 8309 |
| 152524 | CEFBS_None, // VFMADD213SHZrb = 8310 |
| 152525 | CEFBS_None, // VFMADD213SHZrb_Int = 8311 |
| 152526 | CEFBS_None, // VFMADD213SHZrb_Intk = 8312 |
| 152527 | CEFBS_None, // VFMADD213SHZrb_Intkz = 8313 |
| 152528 | CEFBS_None, // VFMADD213SSZm = 8314 |
| 152529 | CEFBS_None, // VFMADD213SSZm_Int = 8315 |
| 152530 | CEFBS_None, // VFMADD213SSZm_Intk = 8316 |
| 152531 | CEFBS_None, // VFMADD213SSZm_Intkz = 8317 |
| 152532 | CEFBS_None, // VFMADD213SSZr = 8318 |
| 152533 | CEFBS_None, // VFMADD213SSZr_Int = 8319 |
| 152534 | CEFBS_None, // VFMADD213SSZr_Intk = 8320 |
| 152535 | CEFBS_None, // VFMADD213SSZr_Intkz = 8321 |
| 152536 | CEFBS_None, // VFMADD213SSZrb = 8322 |
| 152537 | CEFBS_None, // VFMADD213SSZrb_Int = 8323 |
| 152538 | CEFBS_None, // VFMADD213SSZrb_Intk = 8324 |
| 152539 | CEFBS_None, // VFMADD213SSZrb_Intkz = 8325 |
| 152540 | CEFBS_None, // VFMADD213SSm = 8326 |
| 152541 | CEFBS_None, // VFMADD213SSm_Int = 8327 |
| 152542 | CEFBS_None, // VFMADD213SSr = 8328 |
| 152543 | CEFBS_None, // VFMADD213SSr_Int = 8329 |
| 152544 | CEFBS_None, // VFMADD231PDYm = 8330 |
| 152545 | CEFBS_None, // VFMADD231PDYr = 8331 |
| 152546 | CEFBS_None, // VFMADD231PDZ128m = 8332 |
| 152547 | CEFBS_None, // VFMADD231PDZ128mb = 8333 |
| 152548 | CEFBS_None, // VFMADD231PDZ128mbk = 8334 |
| 152549 | CEFBS_None, // VFMADD231PDZ128mbkz = 8335 |
| 152550 | CEFBS_None, // VFMADD231PDZ128mk = 8336 |
| 152551 | CEFBS_None, // VFMADD231PDZ128mkz = 8337 |
| 152552 | CEFBS_None, // VFMADD231PDZ128r = 8338 |
| 152553 | CEFBS_None, // VFMADD231PDZ128rk = 8339 |
| 152554 | CEFBS_None, // VFMADD231PDZ128rkz = 8340 |
| 152555 | CEFBS_None, // VFMADD231PDZ256m = 8341 |
| 152556 | CEFBS_None, // VFMADD231PDZ256mb = 8342 |
| 152557 | CEFBS_None, // VFMADD231PDZ256mbk = 8343 |
| 152558 | CEFBS_None, // VFMADD231PDZ256mbkz = 8344 |
| 152559 | CEFBS_None, // VFMADD231PDZ256mk = 8345 |
| 152560 | CEFBS_None, // VFMADD231PDZ256mkz = 8346 |
| 152561 | CEFBS_None, // VFMADD231PDZ256r = 8347 |
| 152562 | CEFBS_None, // VFMADD231PDZ256rk = 8348 |
| 152563 | CEFBS_None, // VFMADD231PDZ256rkz = 8349 |
| 152564 | CEFBS_None, // VFMADD231PDZm = 8350 |
| 152565 | CEFBS_None, // VFMADD231PDZmb = 8351 |
| 152566 | CEFBS_None, // VFMADD231PDZmbk = 8352 |
| 152567 | CEFBS_None, // VFMADD231PDZmbkz = 8353 |
| 152568 | CEFBS_None, // VFMADD231PDZmk = 8354 |
| 152569 | CEFBS_None, // VFMADD231PDZmkz = 8355 |
| 152570 | CEFBS_None, // VFMADD231PDZr = 8356 |
| 152571 | CEFBS_None, // VFMADD231PDZrb = 8357 |
| 152572 | CEFBS_None, // VFMADD231PDZrbk = 8358 |
| 152573 | CEFBS_None, // VFMADD231PDZrbkz = 8359 |
| 152574 | CEFBS_None, // VFMADD231PDZrk = 8360 |
| 152575 | CEFBS_None, // VFMADD231PDZrkz = 8361 |
| 152576 | CEFBS_None, // VFMADD231PDm = 8362 |
| 152577 | CEFBS_None, // VFMADD231PDr = 8363 |
| 152578 | CEFBS_None, // VFMADD231PHZ128m = 8364 |
| 152579 | CEFBS_None, // VFMADD231PHZ128mb = 8365 |
| 152580 | CEFBS_None, // VFMADD231PHZ128mbk = 8366 |
| 152581 | CEFBS_None, // VFMADD231PHZ128mbkz = 8367 |
| 152582 | CEFBS_None, // VFMADD231PHZ128mk = 8368 |
| 152583 | CEFBS_None, // VFMADD231PHZ128mkz = 8369 |
| 152584 | CEFBS_None, // VFMADD231PHZ128r = 8370 |
| 152585 | CEFBS_None, // VFMADD231PHZ128rk = 8371 |
| 152586 | CEFBS_None, // VFMADD231PHZ128rkz = 8372 |
| 152587 | CEFBS_None, // VFMADD231PHZ256m = 8373 |
| 152588 | CEFBS_None, // VFMADD231PHZ256mb = 8374 |
| 152589 | CEFBS_None, // VFMADD231PHZ256mbk = 8375 |
| 152590 | CEFBS_None, // VFMADD231PHZ256mbkz = 8376 |
| 152591 | CEFBS_None, // VFMADD231PHZ256mk = 8377 |
| 152592 | CEFBS_None, // VFMADD231PHZ256mkz = 8378 |
| 152593 | CEFBS_None, // VFMADD231PHZ256r = 8379 |
| 152594 | CEFBS_None, // VFMADD231PHZ256rk = 8380 |
| 152595 | CEFBS_None, // VFMADD231PHZ256rkz = 8381 |
| 152596 | CEFBS_None, // VFMADD231PHZm = 8382 |
| 152597 | CEFBS_None, // VFMADD231PHZmb = 8383 |
| 152598 | CEFBS_None, // VFMADD231PHZmbk = 8384 |
| 152599 | CEFBS_None, // VFMADD231PHZmbkz = 8385 |
| 152600 | CEFBS_None, // VFMADD231PHZmk = 8386 |
| 152601 | CEFBS_None, // VFMADD231PHZmkz = 8387 |
| 152602 | CEFBS_None, // VFMADD231PHZr = 8388 |
| 152603 | CEFBS_None, // VFMADD231PHZrb = 8389 |
| 152604 | CEFBS_None, // VFMADD231PHZrbk = 8390 |
| 152605 | CEFBS_None, // VFMADD231PHZrbkz = 8391 |
| 152606 | CEFBS_None, // VFMADD231PHZrk = 8392 |
| 152607 | CEFBS_None, // VFMADD231PHZrkz = 8393 |
| 152608 | CEFBS_None, // VFMADD231PSYm = 8394 |
| 152609 | CEFBS_None, // VFMADD231PSYr = 8395 |
| 152610 | CEFBS_None, // VFMADD231PSZ128m = 8396 |
| 152611 | CEFBS_None, // VFMADD231PSZ128mb = 8397 |
| 152612 | CEFBS_None, // VFMADD231PSZ128mbk = 8398 |
| 152613 | CEFBS_None, // VFMADD231PSZ128mbkz = 8399 |
| 152614 | CEFBS_None, // VFMADD231PSZ128mk = 8400 |
| 152615 | CEFBS_None, // VFMADD231PSZ128mkz = 8401 |
| 152616 | CEFBS_None, // VFMADD231PSZ128r = 8402 |
| 152617 | CEFBS_None, // VFMADD231PSZ128rk = 8403 |
| 152618 | CEFBS_None, // VFMADD231PSZ128rkz = 8404 |
| 152619 | CEFBS_None, // VFMADD231PSZ256m = 8405 |
| 152620 | CEFBS_None, // VFMADD231PSZ256mb = 8406 |
| 152621 | CEFBS_None, // VFMADD231PSZ256mbk = 8407 |
| 152622 | CEFBS_None, // VFMADD231PSZ256mbkz = 8408 |
| 152623 | CEFBS_None, // VFMADD231PSZ256mk = 8409 |
| 152624 | CEFBS_None, // VFMADD231PSZ256mkz = 8410 |
| 152625 | CEFBS_None, // VFMADD231PSZ256r = 8411 |
| 152626 | CEFBS_None, // VFMADD231PSZ256rk = 8412 |
| 152627 | CEFBS_None, // VFMADD231PSZ256rkz = 8413 |
| 152628 | CEFBS_None, // VFMADD231PSZm = 8414 |
| 152629 | CEFBS_None, // VFMADD231PSZmb = 8415 |
| 152630 | CEFBS_None, // VFMADD231PSZmbk = 8416 |
| 152631 | CEFBS_None, // VFMADD231PSZmbkz = 8417 |
| 152632 | CEFBS_None, // VFMADD231PSZmk = 8418 |
| 152633 | CEFBS_None, // VFMADD231PSZmkz = 8419 |
| 152634 | CEFBS_None, // VFMADD231PSZr = 8420 |
| 152635 | CEFBS_None, // VFMADD231PSZrb = 8421 |
| 152636 | CEFBS_None, // VFMADD231PSZrbk = 8422 |
| 152637 | CEFBS_None, // VFMADD231PSZrbkz = 8423 |
| 152638 | CEFBS_None, // VFMADD231PSZrk = 8424 |
| 152639 | CEFBS_None, // VFMADD231PSZrkz = 8425 |
| 152640 | CEFBS_None, // VFMADD231PSm = 8426 |
| 152641 | CEFBS_None, // VFMADD231PSr = 8427 |
| 152642 | CEFBS_None, // VFMADD231SDZm = 8428 |
| 152643 | CEFBS_None, // VFMADD231SDZm_Int = 8429 |
| 152644 | CEFBS_None, // VFMADD231SDZm_Intk = 8430 |
| 152645 | CEFBS_None, // VFMADD231SDZm_Intkz = 8431 |
| 152646 | CEFBS_None, // VFMADD231SDZr = 8432 |
| 152647 | CEFBS_None, // VFMADD231SDZr_Int = 8433 |
| 152648 | CEFBS_None, // VFMADD231SDZr_Intk = 8434 |
| 152649 | CEFBS_None, // VFMADD231SDZr_Intkz = 8435 |
| 152650 | CEFBS_None, // VFMADD231SDZrb = 8436 |
| 152651 | CEFBS_None, // VFMADD231SDZrb_Int = 8437 |
| 152652 | CEFBS_None, // VFMADD231SDZrb_Intk = 8438 |
| 152653 | CEFBS_None, // VFMADD231SDZrb_Intkz = 8439 |
| 152654 | CEFBS_None, // VFMADD231SDm = 8440 |
| 152655 | CEFBS_None, // VFMADD231SDm_Int = 8441 |
| 152656 | CEFBS_None, // VFMADD231SDr = 8442 |
| 152657 | CEFBS_None, // VFMADD231SDr_Int = 8443 |
| 152658 | CEFBS_None, // VFMADD231SHZm = 8444 |
| 152659 | CEFBS_None, // VFMADD231SHZm_Int = 8445 |
| 152660 | CEFBS_None, // VFMADD231SHZm_Intk = 8446 |
| 152661 | CEFBS_None, // VFMADD231SHZm_Intkz = 8447 |
| 152662 | CEFBS_None, // VFMADD231SHZr = 8448 |
| 152663 | CEFBS_None, // VFMADD231SHZr_Int = 8449 |
| 152664 | CEFBS_None, // VFMADD231SHZr_Intk = 8450 |
| 152665 | CEFBS_None, // VFMADD231SHZr_Intkz = 8451 |
| 152666 | CEFBS_None, // VFMADD231SHZrb = 8452 |
| 152667 | CEFBS_None, // VFMADD231SHZrb_Int = 8453 |
| 152668 | CEFBS_None, // VFMADD231SHZrb_Intk = 8454 |
| 152669 | CEFBS_None, // VFMADD231SHZrb_Intkz = 8455 |
| 152670 | CEFBS_None, // VFMADD231SSZm = 8456 |
| 152671 | CEFBS_None, // VFMADD231SSZm_Int = 8457 |
| 152672 | CEFBS_None, // VFMADD231SSZm_Intk = 8458 |
| 152673 | CEFBS_None, // VFMADD231SSZm_Intkz = 8459 |
| 152674 | CEFBS_None, // VFMADD231SSZr = 8460 |
| 152675 | CEFBS_None, // VFMADD231SSZr_Int = 8461 |
| 152676 | CEFBS_None, // VFMADD231SSZr_Intk = 8462 |
| 152677 | CEFBS_None, // VFMADD231SSZr_Intkz = 8463 |
| 152678 | CEFBS_None, // VFMADD231SSZrb = 8464 |
| 152679 | CEFBS_None, // VFMADD231SSZrb_Int = 8465 |
| 152680 | CEFBS_None, // VFMADD231SSZrb_Intk = 8466 |
| 152681 | CEFBS_None, // VFMADD231SSZrb_Intkz = 8467 |
| 152682 | CEFBS_None, // VFMADD231SSm = 8468 |
| 152683 | CEFBS_None, // VFMADD231SSm_Int = 8469 |
| 152684 | CEFBS_None, // VFMADD231SSr = 8470 |
| 152685 | CEFBS_None, // VFMADD231SSr_Int = 8471 |
| 152686 | CEFBS_None, // VFMADDCPHZ128m = 8472 |
| 152687 | CEFBS_None, // VFMADDCPHZ128mb = 8473 |
| 152688 | CEFBS_None, // VFMADDCPHZ128mbk = 8474 |
| 152689 | CEFBS_None, // VFMADDCPHZ128mbkz = 8475 |
| 152690 | CEFBS_None, // VFMADDCPHZ128mk = 8476 |
| 152691 | CEFBS_None, // VFMADDCPHZ128mkz = 8477 |
| 152692 | CEFBS_None, // VFMADDCPHZ128r = 8478 |
| 152693 | CEFBS_None, // VFMADDCPHZ128rk = 8479 |
| 152694 | CEFBS_None, // VFMADDCPHZ128rkz = 8480 |
| 152695 | CEFBS_None, // VFMADDCPHZ256m = 8481 |
| 152696 | CEFBS_None, // VFMADDCPHZ256mb = 8482 |
| 152697 | CEFBS_None, // VFMADDCPHZ256mbk = 8483 |
| 152698 | CEFBS_None, // VFMADDCPHZ256mbkz = 8484 |
| 152699 | CEFBS_None, // VFMADDCPHZ256mk = 8485 |
| 152700 | CEFBS_None, // VFMADDCPHZ256mkz = 8486 |
| 152701 | CEFBS_None, // VFMADDCPHZ256r = 8487 |
| 152702 | CEFBS_None, // VFMADDCPHZ256rk = 8488 |
| 152703 | CEFBS_None, // VFMADDCPHZ256rkz = 8489 |
| 152704 | CEFBS_None, // VFMADDCPHZm = 8490 |
| 152705 | CEFBS_None, // VFMADDCPHZmb = 8491 |
| 152706 | CEFBS_None, // VFMADDCPHZmbk = 8492 |
| 152707 | CEFBS_None, // VFMADDCPHZmbkz = 8493 |
| 152708 | CEFBS_None, // VFMADDCPHZmk = 8494 |
| 152709 | CEFBS_None, // VFMADDCPHZmkz = 8495 |
| 152710 | CEFBS_None, // VFMADDCPHZr = 8496 |
| 152711 | CEFBS_None, // VFMADDCPHZrb = 8497 |
| 152712 | CEFBS_None, // VFMADDCPHZrbk = 8498 |
| 152713 | CEFBS_None, // VFMADDCPHZrbkz = 8499 |
| 152714 | CEFBS_None, // VFMADDCPHZrk = 8500 |
| 152715 | CEFBS_None, // VFMADDCPHZrkz = 8501 |
| 152716 | CEFBS_None, // VFMADDCSHZm = 8502 |
| 152717 | CEFBS_None, // VFMADDCSHZmk = 8503 |
| 152718 | CEFBS_None, // VFMADDCSHZmkz = 8504 |
| 152719 | CEFBS_None, // VFMADDCSHZr = 8505 |
| 152720 | CEFBS_None, // VFMADDCSHZrb = 8506 |
| 152721 | CEFBS_None, // VFMADDCSHZrbk = 8507 |
| 152722 | CEFBS_None, // VFMADDCSHZrbkz = 8508 |
| 152723 | CEFBS_None, // VFMADDCSHZrk = 8509 |
| 152724 | CEFBS_None, // VFMADDCSHZrkz = 8510 |
| 152725 | CEFBS_None, // VFMADDPD4Ymr = 8511 |
| 152726 | CEFBS_None, // VFMADDPD4Yrm = 8512 |
| 152727 | CEFBS_None, // VFMADDPD4Yrr = 8513 |
| 152728 | CEFBS_None, // VFMADDPD4Yrr_REV = 8514 |
| 152729 | CEFBS_None, // VFMADDPD4mr = 8515 |
| 152730 | CEFBS_None, // VFMADDPD4rm = 8516 |
| 152731 | CEFBS_None, // VFMADDPD4rr = 8517 |
| 152732 | CEFBS_None, // VFMADDPD4rr_REV = 8518 |
| 152733 | CEFBS_None, // VFMADDPS4Ymr = 8519 |
| 152734 | CEFBS_None, // VFMADDPS4Yrm = 8520 |
| 152735 | CEFBS_None, // VFMADDPS4Yrr = 8521 |
| 152736 | CEFBS_None, // VFMADDPS4Yrr_REV = 8522 |
| 152737 | CEFBS_None, // VFMADDPS4mr = 8523 |
| 152738 | CEFBS_None, // VFMADDPS4rm = 8524 |
| 152739 | CEFBS_None, // VFMADDPS4rr = 8525 |
| 152740 | CEFBS_None, // VFMADDPS4rr_REV = 8526 |
| 152741 | CEFBS_None, // VFMADDSD4mr = 8527 |
| 152742 | CEFBS_None, // VFMADDSD4mr_Int = 8528 |
| 152743 | CEFBS_None, // VFMADDSD4rm = 8529 |
| 152744 | CEFBS_None, // VFMADDSD4rm_Int = 8530 |
| 152745 | CEFBS_None, // VFMADDSD4rr = 8531 |
| 152746 | CEFBS_None, // VFMADDSD4rr_Int = 8532 |
| 152747 | CEFBS_None, // VFMADDSD4rr_Int_REV = 8533 |
| 152748 | CEFBS_None, // VFMADDSD4rr_REV = 8534 |
| 152749 | CEFBS_None, // VFMADDSS4mr = 8535 |
| 152750 | CEFBS_None, // VFMADDSS4mr_Int = 8536 |
| 152751 | CEFBS_None, // VFMADDSS4rm = 8537 |
| 152752 | CEFBS_None, // VFMADDSS4rm_Int = 8538 |
| 152753 | CEFBS_None, // VFMADDSS4rr = 8539 |
| 152754 | CEFBS_None, // VFMADDSS4rr_Int = 8540 |
| 152755 | CEFBS_None, // VFMADDSS4rr_Int_REV = 8541 |
| 152756 | CEFBS_None, // VFMADDSS4rr_REV = 8542 |
| 152757 | CEFBS_None, // VFMADDSUB132PDYm = 8543 |
| 152758 | CEFBS_None, // VFMADDSUB132PDYr = 8544 |
| 152759 | CEFBS_None, // VFMADDSUB132PDZ128m = 8545 |
| 152760 | CEFBS_None, // VFMADDSUB132PDZ128mb = 8546 |
| 152761 | CEFBS_None, // VFMADDSUB132PDZ128mbk = 8547 |
| 152762 | CEFBS_None, // VFMADDSUB132PDZ128mbkz = 8548 |
| 152763 | CEFBS_None, // VFMADDSUB132PDZ128mk = 8549 |
| 152764 | CEFBS_None, // VFMADDSUB132PDZ128mkz = 8550 |
| 152765 | CEFBS_None, // VFMADDSUB132PDZ128r = 8551 |
| 152766 | CEFBS_None, // VFMADDSUB132PDZ128rk = 8552 |
| 152767 | CEFBS_None, // VFMADDSUB132PDZ128rkz = 8553 |
| 152768 | CEFBS_None, // VFMADDSUB132PDZ256m = 8554 |
| 152769 | CEFBS_None, // VFMADDSUB132PDZ256mb = 8555 |
| 152770 | CEFBS_None, // VFMADDSUB132PDZ256mbk = 8556 |
| 152771 | CEFBS_None, // VFMADDSUB132PDZ256mbkz = 8557 |
| 152772 | CEFBS_None, // VFMADDSUB132PDZ256mk = 8558 |
| 152773 | CEFBS_None, // VFMADDSUB132PDZ256mkz = 8559 |
| 152774 | CEFBS_None, // VFMADDSUB132PDZ256r = 8560 |
| 152775 | CEFBS_None, // VFMADDSUB132PDZ256rk = 8561 |
| 152776 | CEFBS_None, // VFMADDSUB132PDZ256rkz = 8562 |
| 152777 | CEFBS_None, // VFMADDSUB132PDZm = 8563 |
| 152778 | CEFBS_None, // VFMADDSUB132PDZmb = 8564 |
| 152779 | CEFBS_None, // VFMADDSUB132PDZmbk = 8565 |
| 152780 | CEFBS_None, // VFMADDSUB132PDZmbkz = 8566 |
| 152781 | CEFBS_None, // VFMADDSUB132PDZmk = 8567 |
| 152782 | CEFBS_None, // VFMADDSUB132PDZmkz = 8568 |
| 152783 | CEFBS_None, // VFMADDSUB132PDZr = 8569 |
| 152784 | CEFBS_None, // VFMADDSUB132PDZrb = 8570 |
| 152785 | CEFBS_None, // VFMADDSUB132PDZrbk = 8571 |
| 152786 | CEFBS_None, // VFMADDSUB132PDZrbkz = 8572 |
| 152787 | CEFBS_None, // VFMADDSUB132PDZrk = 8573 |
| 152788 | CEFBS_None, // VFMADDSUB132PDZrkz = 8574 |
| 152789 | CEFBS_None, // VFMADDSUB132PDm = 8575 |
| 152790 | CEFBS_None, // VFMADDSUB132PDr = 8576 |
| 152791 | CEFBS_None, // VFMADDSUB132PHZ128m = 8577 |
| 152792 | CEFBS_None, // VFMADDSUB132PHZ128mb = 8578 |
| 152793 | CEFBS_None, // VFMADDSUB132PHZ128mbk = 8579 |
| 152794 | CEFBS_None, // VFMADDSUB132PHZ128mbkz = 8580 |
| 152795 | CEFBS_None, // VFMADDSUB132PHZ128mk = 8581 |
| 152796 | CEFBS_None, // VFMADDSUB132PHZ128mkz = 8582 |
| 152797 | CEFBS_None, // VFMADDSUB132PHZ128r = 8583 |
| 152798 | CEFBS_None, // VFMADDSUB132PHZ128rk = 8584 |
| 152799 | CEFBS_None, // VFMADDSUB132PHZ128rkz = 8585 |
| 152800 | CEFBS_None, // VFMADDSUB132PHZ256m = 8586 |
| 152801 | CEFBS_None, // VFMADDSUB132PHZ256mb = 8587 |
| 152802 | CEFBS_None, // VFMADDSUB132PHZ256mbk = 8588 |
| 152803 | CEFBS_None, // VFMADDSUB132PHZ256mbkz = 8589 |
| 152804 | CEFBS_None, // VFMADDSUB132PHZ256mk = 8590 |
| 152805 | CEFBS_None, // VFMADDSUB132PHZ256mkz = 8591 |
| 152806 | CEFBS_None, // VFMADDSUB132PHZ256r = 8592 |
| 152807 | CEFBS_None, // VFMADDSUB132PHZ256rk = 8593 |
| 152808 | CEFBS_None, // VFMADDSUB132PHZ256rkz = 8594 |
| 152809 | CEFBS_None, // VFMADDSUB132PHZm = 8595 |
| 152810 | CEFBS_None, // VFMADDSUB132PHZmb = 8596 |
| 152811 | CEFBS_None, // VFMADDSUB132PHZmbk = 8597 |
| 152812 | CEFBS_None, // VFMADDSUB132PHZmbkz = 8598 |
| 152813 | CEFBS_None, // VFMADDSUB132PHZmk = 8599 |
| 152814 | CEFBS_None, // VFMADDSUB132PHZmkz = 8600 |
| 152815 | CEFBS_None, // VFMADDSUB132PHZr = 8601 |
| 152816 | CEFBS_None, // VFMADDSUB132PHZrb = 8602 |
| 152817 | CEFBS_None, // VFMADDSUB132PHZrbk = 8603 |
| 152818 | CEFBS_None, // VFMADDSUB132PHZrbkz = 8604 |
| 152819 | CEFBS_None, // VFMADDSUB132PHZrk = 8605 |
| 152820 | CEFBS_None, // VFMADDSUB132PHZrkz = 8606 |
| 152821 | CEFBS_None, // VFMADDSUB132PSYm = 8607 |
| 152822 | CEFBS_None, // VFMADDSUB132PSYr = 8608 |
| 152823 | CEFBS_None, // VFMADDSUB132PSZ128m = 8609 |
| 152824 | CEFBS_None, // VFMADDSUB132PSZ128mb = 8610 |
| 152825 | CEFBS_None, // VFMADDSUB132PSZ128mbk = 8611 |
| 152826 | CEFBS_None, // VFMADDSUB132PSZ128mbkz = 8612 |
| 152827 | CEFBS_None, // VFMADDSUB132PSZ128mk = 8613 |
| 152828 | CEFBS_None, // VFMADDSUB132PSZ128mkz = 8614 |
| 152829 | CEFBS_None, // VFMADDSUB132PSZ128r = 8615 |
| 152830 | CEFBS_None, // VFMADDSUB132PSZ128rk = 8616 |
| 152831 | CEFBS_None, // VFMADDSUB132PSZ128rkz = 8617 |
| 152832 | CEFBS_None, // VFMADDSUB132PSZ256m = 8618 |
| 152833 | CEFBS_None, // VFMADDSUB132PSZ256mb = 8619 |
| 152834 | CEFBS_None, // VFMADDSUB132PSZ256mbk = 8620 |
| 152835 | CEFBS_None, // VFMADDSUB132PSZ256mbkz = 8621 |
| 152836 | CEFBS_None, // VFMADDSUB132PSZ256mk = 8622 |
| 152837 | CEFBS_None, // VFMADDSUB132PSZ256mkz = 8623 |
| 152838 | CEFBS_None, // VFMADDSUB132PSZ256r = 8624 |
| 152839 | CEFBS_None, // VFMADDSUB132PSZ256rk = 8625 |
| 152840 | CEFBS_None, // VFMADDSUB132PSZ256rkz = 8626 |
| 152841 | CEFBS_None, // VFMADDSUB132PSZm = 8627 |
| 152842 | CEFBS_None, // VFMADDSUB132PSZmb = 8628 |
| 152843 | CEFBS_None, // VFMADDSUB132PSZmbk = 8629 |
| 152844 | CEFBS_None, // VFMADDSUB132PSZmbkz = 8630 |
| 152845 | CEFBS_None, // VFMADDSUB132PSZmk = 8631 |
| 152846 | CEFBS_None, // VFMADDSUB132PSZmkz = 8632 |
| 152847 | CEFBS_None, // VFMADDSUB132PSZr = 8633 |
| 152848 | CEFBS_None, // VFMADDSUB132PSZrb = 8634 |
| 152849 | CEFBS_None, // VFMADDSUB132PSZrbk = 8635 |
| 152850 | CEFBS_None, // VFMADDSUB132PSZrbkz = 8636 |
| 152851 | CEFBS_None, // VFMADDSUB132PSZrk = 8637 |
| 152852 | CEFBS_None, // VFMADDSUB132PSZrkz = 8638 |
| 152853 | CEFBS_None, // VFMADDSUB132PSm = 8639 |
| 152854 | CEFBS_None, // VFMADDSUB132PSr = 8640 |
| 152855 | CEFBS_None, // VFMADDSUB213PDYm = 8641 |
| 152856 | CEFBS_None, // VFMADDSUB213PDYr = 8642 |
| 152857 | CEFBS_None, // VFMADDSUB213PDZ128m = 8643 |
| 152858 | CEFBS_None, // VFMADDSUB213PDZ128mb = 8644 |
| 152859 | CEFBS_None, // VFMADDSUB213PDZ128mbk = 8645 |
| 152860 | CEFBS_None, // VFMADDSUB213PDZ128mbkz = 8646 |
| 152861 | CEFBS_None, // VFMADDSUB213PDZ128mk = 8647 |
| 152862 | CEFBS_None, // VFMADDSUB213PDZ128mkz = 8648 |
| 152863 | CEFBS_None, // VFMADDSUB213PDZ128r = 8649 |
| 152864 | CEFBS_None, // VFMADDSUB213PDZ128rk = 8650 |
| 152865 | CEFBS_None, // VFMADDSUB213PDZ128rkz = 8651 |
| 152866 | CEFBS_None, // VFMADDSUB213PDZ256m = 8652 |
| 152867 | CEFBS_None, // VFMADDSUB213PDZ256mb = 8653 |
| 152868 | CEFBS_None, // VFMADDSUB213PDZ256mbk = 8654 |
| 152869 | CEFBS_None, // VFMADDSUB213PDZ256mbkz = 8655 |
| 152870 | CEFBS_None, // VFMADDSUB213PDZ256mk = 8656 |
| 152871 | CEFBS_None, // VFMADDSUB213PDZ256mkz = 8657 |
| 152872 | CEFBS_None, // VFMADDSUB213PDZ256r = 8658 |
| 152873 | CEFBS_None, // VFMADDSUB213PDZ256rk = 8659 |
| 152874 | CEFBS_None, // VFMADDSUB213PDZ256rkz = 8660 |
| 152875 | CEFBS_None, // VFMADDSUB213PDZm = 8661 |
| 152876 | CEFBS_None, // VFMADDSUB213PDZmb = 8662 |
| 152877 | CEFBS_None, // VFMADDSUB213PDZmbk = 8663 |
| 152878 | CEFBS_None, // VFMADDSUB213PDZmbkz = 8664 |
| 152879 | CEFBS_None, // VFMADDSUB213PDZmk = 8665 |
| 152880 | CEFBS_None, // VFMADDSUB213PDZmkz = 8666 |
| 152881 | CEFBS_None, // VFMADDSUB213PDZr = 8667 |
| 152882 | CEFBS_None, // VFMADDSUB213PDZrb = 8668 |
| 152883 | CEFBS_None, // VFMADDSUB213PDZrbk = 8669 |
| 152884 | CEFBS_None, // VFMADDSUB213PDZrbkz = 8670 |
| 152885 | CEFBS_None, // VFMADDSUB213PDZrk = 8671 |
| 152886 | CEFBS_None, // VFMADDSUB213PDZrkz = 8672 |
| 152887 | CEFBS_None, // VFMADDSUB213PDm = 8673 |
| 152888 | CEFBS_None, // VFMADDSUB213PDr = 8674 |
| 152889 | CEFBS_None, // VFMADDSUB213PHZ128m = 8675 |
| 152890 | CEFBS_None, // VFMADDSUB213PHZ128mb = 8676 |
| 152891 | CEFBS_None, // VFMADDSUB213PHZ128mbk = 8677 |
| 152892 | CEFBS_None, // VFMADDSUB213PHZ128mbkz = 8678 |
| 152893 | CEFBS_None, // VFMADDSUB213PHZ128mk = 8679 |
| 152894 | CEFBS_None, // VFMADDSUB213PHZ128mkz = 8680 |
| 152895 | CEFBS_None, // VFMADDSUB213PHZ128r = 8681 |
| 152896 | CEFBS_None, // VFMADDSUB213PHZ128rk = 8682 |
| 152897 | CEFBS_None, // VFMADDSUB213PHZ128rkz = 8683 |
| 152898 | CEFBS_None, // VFMADDSUB213PHZ256m = 8684 |
| 152899 | CEFBS_None, // VFMADDSUB213PHZ256mb = 8685 |
| 152900 | CEFBS_None, // VFMADDSUB213PHZ256mbk = 8686 |
| 152901 | CEFBS_None, // VFMADDSUB213PHZ256mbkz = 8687 |
| 152902 | CEFBS_None, // VFMADDSUB213PHZ256mk = 8688 |
| 152903 | CEFBS_None, // VFMADDSUB213PHZ256mkz = 8689 |
| 152904 | CEFBS_None, // VFMADDSUB213PHZ256r = 8690 |
| 152905 | CEFBS_None, // VFMADDSUB213PHZ256rk = 8691 |
| 152906 | CEFBS_None, // VFMADDSUB213PHZ256rkz = 8692 |
| 152907 | CEFBS_None, // VFMADDSUB213PHZm = 8693 |
| 152908 | CEFBS_None, // VFMADDSUB213PHZmb = 8694 |
| 152909 | CEFBS_None, // VFMADDSUB213PHZmbk = 8695 |
| 152910 | CEFBS_None, // VFMADDSUB213PHZmbkz = 8696 |
| 152911 | CEFBS_None, // VFMADDSUB213PHZmk = 8697 |
| 152912 | CEFBS_None, // VFMADDSUB213PHZmkz = 8698 |
| 152913 | CEFBS_None, // VFMADDSUB213PHZr = 8699 |
| 152914 | CEFBS_None, // VFMADDSUB213PHZrb = 8700 |
| 152915 | CEFBS_None, // VFMADDSUB213PHZrbk = 8701 |
| 152916 | CEFBS_None, // VFMADDSUB213PHZrbkz = 8702 |
| 152917 | CEFBS_None, // VFMADDSUB213PHZrk = 8703 |
| 152918 | CEFBS_None, // VFMADDSUB213PHZrkz = 8704 |
| 152919 | CEFBS_None, // VFMADDSUB213PSYm = 8705 |
| 152920 | CEFBS_None, // VFMADDSUB213PSYr = 8706 |
| 152921 | CEFBS_None, // VFMADDSUB213PSZ128m = 8707 |
| 152922 | CEFBS_None, // VFMADDSUB213PSZ128mb = 8708 |
| 152923 | CEFBS_None, // VFMADDSUB213PSZ128mbk = 8709 |
| 152924 | CEFBS_None, // VFMADDSUB213PSZ128mbkz = 8710 |
| 152925 | CEFBS_None, // VFMADDSUB213PSZ128mk = 8711 |
| 152926 | CEFBS_None, // VFMADDSUB213PSZ128mkz = 8712 |
| 152927 | CEFBS_None, // VFMADDSUB213PSZ128r = 8713 |
| 152928 | CEFBS_None, // VFMADDSUB213PSZ128rk = 8714 |
| 152929 | CEFBS_None, // VFMADDSUB213PSZ128rkz = 8715 |
| 152930 | CEFBS_None, // VFMADDSUB213PSZ256m = 8716 |
| 152931 | CEFBS_None, // VFMADDSUB213PSZ256mb = 8717 |
| 152932 | CEFBS_None, // VFMADDSUB213PSZ256mbk = 8718 |
| 152933 | CEFBS_None, // VFMADDSUB213PSZ256mbkz = 8719 |
| 152934 | CEFBS_None, // VFMADDSUB213PSZ256mk = 8720 |
| 152935 | CEFBS_None, // VFMADDSUB213PSZ256mkz = 8721 |
| 152936 | CEFBS_None, // VFMADDSUB213PSZ256r = 8722 |
| 152937 | CEFBS_None, // VFMADDSUB213PSZ256rk = 8723 |
| 152938 | CEFBS_None, // VFMADDSUB213PSZ256rkz = 8724 |
| 152939 | CEFBS_None, // VFMADDSUB213PSZm = 8725 |
| 152940 | CEFBS_None, // VFMADDSUB213PSZmb = 8726 |
| 152941 | CEFBS_None, // VFMADDSUB213PSZmbk = 8727 |
| 152942 | CEFBS_None, // VFMADDSUB213PSZmbkz = 8728 |
| 152943 | CEFBS_None, // VFMADDSUB213PSZmk = 8729 |
| 152944 | CEFBS_None, // VFMADDSUB213PSZmkz = 8730 |
| 152945 | CEFBS_None, // VFMADDSUB213PSZr = 8731 |
| 152946 | CEFBS_None, // VFMADDSUB213PSZrb = 8732 |
| 152947 | CEFBS_None, // VFMADDSUB213PSZrbk = 8733 |
| 152948 | CEFBS_None, // VFMADDSUB213PSZrbkz = 8734 |
| 152949 | CEFBS_None, // VFMADDSUB213PSZrk = 8735 |
| 152950 | CEFBS_None, // VFMADDSUB213PSZrkz = 8736 |
| 152951 | CEFBS_None, // VFMADDSUB213PSm = 8737 |
| 152952 | CEFBS_None, // VFMADDSUB213PSr = 8738 |
| 152953 | CEFBS_None, // VFMADDSUB231PDYm = 8739 |
| 152954 | CEFBS_None, // VFMADDSUB231PDYr = 8740 |
| 152955 | CEFBS_None, // VFMADDSUB231PDZ128m = 8741 |
| 152956 | CEFBS_None, // VFMADDSUB231PDZ128mb = 8742 |
| 152957 | CEFBS_None, // VFMADDSUB231PDZ128mbk = 8743 |
| 152958 | CEFBS_None, // VFMADDSUB231PDZ128mbkz = 8744 |
| 152959 | CEFBS_None, // VFMADDSUB231PDZ128mk = 8745 |
| 152960 | CEFBS_None, // VFMADDSUB231PDZ128mkz = 8746 |
| 152961 | CEFBS_None, // VFMADDSUB231PDZ128r = 8747 |
| 152962 | CEFBS_None, // VFMADDSUB231PDZ128rk = 8748 |
| 152963 | CEFBS_None, // VFMADDSUB231PDZ128rkz = 8749 |
| 152964 | CEFBS_None, // VFMADDSUB231PDZ256m = 8750 |
| 152965 | CEFBS_None, // VFMADDSUB231PDZ256mb = 8751 |
| 152966 | CEFBS_None, // VFMADDSUB231PDZ256mbk = 8752 |
| 152967 | CEFBS_None, // VFMADDSUB231PDZ256mbkz = 8753 |
| 152968 | CEFBS_None, // VFMADDSUB231PDZ256mk = 8754 |
| 152969 | CEFBS_None, // VFMADDSUB231PDZ256mkz = 8755 |
| 152970 | CEFBS_None, // VFMADDSUB231PDZ256r = 8756 |
| 152971 | CEFBS_None, // VFMADDSUB231PDZ256rk = 8757 |
| 152972 | CEFBS_None, // VFMADDSUB231PDZ256rkz = 8758 |
| 152973 | CEFBS_None, // VFMADDSUB231PDZm = 8759 |
| 152974 | CEFBS_None, // VFMADDSUB231PDZmb = 8760 |
| 152975 | CEFBS_None, // VFMADDSUB231PDZmbk = 8761 |
| 152976 | CEFBS_None, // VFMADDSUB231PDZmbkz = 8762 |
| 152977 | CEFBS_None, // VFMADDSUB231PDZmk = 8763 |
| 152978 | CEFBS_None, // VFMADDSUB231PDZmkz = 8764 |
| 152979 | CEFBS_None, // VFMADDSUB231PDZr = 8765 |
| 152980 | CEFBS_None, // VFMADDSUB231PDZrb = 8766 |
| 152981 | CEFBS_None, // VFMADDSUB231PDZrbk = 8767 |
| 152982 | CEFBS_None, // VFMADDSUB231PDZrbkz = 8768 |
| 152983 | CEFBS_None, // VFMADDSUB231PDZrk = 8769 |
| 152984 | CEFBS_None, // VFMADDSUB231PDZrkz = 8770 |
| 152985 | CEFBS_None, // VFMADDSUB231PDm = 8771 |
| 152986 | CEFBS_None, // VFMADDSUB231PDr = 8772 |
| 152987 | CEFBS_None, // VFMADDSUB231PHZ128m = 8773 |
| 152988 | CEFBS_None, // VFMADDSUB231PHZ128mb = 8774 |
| 152989 | CEFBS_None, // VFMADDSUB231PHZ128mbk = 8775 |
| 152990 | CEFBS_None, // VFMADDSUB231PHZ128mbkz = 8776 |
| 152991 | CEFBS_None, // VFMADDSUB231PHZ128mk = 8777 |
| 152992 | CEFBS_None, // VFMADDSUB231PHZ128mkz = 8778 |
| 152993 | CEFBS_None, // VFMADDSUB231PHZ128r = 8779 |
| 152994 | CEFBS_None, // VFMADDSUB231PHZ128rk = 8780 |
| 152995 | CEFBS_None, // VFMADDSUB231PHZ128rkz = 8781 |
| 152996 | CEFBS_None, // VFMADDSUB231PHZ256m = 8782 |
| 152997 | CEFBS_None, // VFMADDSUB231PHZ256mb = 8783 |
| 152998 | CEFBS_None, // VFMADDSUB231PHZ256mbk = 8784 |
| 152999 | CEFBS_None, // VFMADDSUB231PHZ256mbkz = 8785 |
| 153000 | CEFBS_None, // VFMADDSUB231PHZ256mk = 8786 |
| 153001 | CEFBS_None, // VFMADDSUB231PHZ256mkz = 8787 |
| 153002 | CEFBS_None, // VFMADDSUB231PHZ256r = 8788 |
| 153003 | CEFBS_None, // VFMADDSUB231PHZ256rk = 8789 |
| 153004 | CEFBS_None, // VFMADDSUB231PHZ256rkz = 8790 |
| 153005 | CEFBS_None, // VFMADDSUB231PHZm = 8791 |
| 153006 | CEFBS_None, // VFMADDSUB231PHZmb = 8792 |
| 153007 | CEFBS_None, // VFMADDSUB231PHZmbk = 8793 |
| 153008 | CEFBS_None, // VFMADDSUB231PHZmbkz = 8794 |
| 153009 | CEFBS_None, // VFMADDSUB231PHZmk = 8795 |
| 153010 | CEFBS_None, // VFMADDSUB231PHZmkz = 8796 |
| 153011 | CEFBS_None, // VFMADDSUB231PHZr = 8797 |
| 153012 | CEFBS_None, // VFMADDSUB231PHZrb = 8798 |
| 153013 | CEFBS_None, // VFMADDSUB231PHZrbk = 8799 |
| 153014 | CEFBS_None, // VFMADDSUB231PHZrbkz = 8800 |
| 153015 | CEFBS_None, // VFMADDSUB231PHZrk = 8801 |
| 153016 | CEFBS_None, // VFMADDSUB231PHZrkz = 8802 |
| 153017 | CEFBS_None, // VFMADDSUB231PSYm = 8803 |
| 153018 | CEFBS_None, // VFMADDSUB231PSYr = 8804 |
| 153019 | CEFBS_None, // VFMADDSUB231PSZ128m = 8805 |
| 153020 | CEFBS_None, // VFMADDSUB231PSZ128mb = 8806 |
| 153021 | CEFBS_None, // VFMADDSUB231PSZ128mbk = 8807 |
| 153022 | CEFBS_None, // VFMADDSUB231PSZ128mbkz = 8808 |
| 153023 | CEFBS_None, // VFMADDSUB231PSZ128mk = 8809 |
| 153024 | CEFBS_None, // VFMADDSUB231PSZ128mkz = 8810 |
| 153025 | CEFBS_None, // VFMADDSUB231PSZ128r = 8811 |
| 153026 | CEFBS_None, // VFMADDSUB231PSZ128rk = 8812 |
| 153027 | CEFBS_None, // VFMADDSUB231PSZ128rkz = 8813 |
| 153028 | CEFBS_None, // VFMADDSUB231PSZ256m = 8814 |
| 153029 | CEFBS_None, // VFMADDSUB231PSZ256mb = 8815 |
| 153030 | CEFBS_None, // VFMADDSUB231PSZ256mbk = 8816 |
| 153031 | CEFBS_None, // VFMADDSUB231PSZ256mbkz = 8817 |
| 153032 | CEFBS_None, // VFMADDSUB231PSZ256mk = 8818 |
| 153033 | CEFBS_None, // VFMADDSUB231PSZ256mkz = 8819 |
| 153034 | CEFBS_None, // VFMADDSUB231PSZ256r = 8820 |
| 153035 | CEFBS_None, // VFMADDSUB231PSZ256rk = 8821 |
| 153036 | CEFBS_None, // VFMADDSUB231PSZ256rkz = 8822 |
| 153037 | CEFBS_None, // VFMADDSUB231PSZm = 8823 |
| 153038 | CEFBS_None, // VFMADDSUB231PSZmb = 8824 |
| 153039 | CEFBS_None, // VFMADDSUB231PSZmbk = 8825 |
| 153040 | CEFBS_None, // VFMADDSUB231PSZmbkz = 8826 |
| 153041 | CEFBS_None, // VFMADDSUB231PSZmk = 8827 |
| 153042 | CEFBS_None, // VFMADDSUB231PSZmkz = 8828 |
| 153043 | CEFBS_None, // VFMADDSUB231PSZr = 8829 |
| 153044 | CEFBS_None, // VFMADDSUB231PSZrb = 8830 |
| 153045 | CEFBS_None, // VFMADDSUB231PSZrbk = 8831 |
| 153046 | CEFBS_None, // VFMADDSUB231PSZrbkz = 8832 |
| 153047 | CEFBS_None, // VFMADDSUB231PSZrk = 8833 |
| 153048 | CEFBS_None, // VFMADDSUB231PSZrkz = 8834 |
| 153049 | CEFBS_None, // VFMADDSUB231PSm = 8835 |
| 153050 | CEFBS_None, // VFMADDSUB231PSr = 8836 |
| 153051 | CEFBS_None, // VFMADDSUBPD4Ymr = 8837 |
| 153052 | CEFBS_None, // VFMADDSUBPD4Yrm = 8838 |
| 153053 | CEFBS_None, // VFMADDSUBPD4Yrr = 8839 |
| 153054 | CEFBS_None, // VFMADDSUBPD4Yrr_REV = 8840 |
| 153055 | CEFBS_None, // VFMADDSUBPD4mr = 8841 |
| 153056 | CEFBS_None, // VFMADDSUBPD4rm = 8842 |
| 153057 | CEFBS_None, // VFMADDSUBPD4rr = 8843 |
| 153058 | CEFBS_None, // VFMADDSUBPD4rr_REV = 8844 |
| 153059 | CEFBS_None, // VFMADDSUBPS4Ymr = 8845 |
| 153060 | CEFBS_None, // VFMADDSUBPS4Yrm = 8846 |
| 153061 | CEFBS_None, // VFMADDSUBPS4Yrr = 8847 |
| 153062 | CEFBS_None, // VFMADDSUBPS4Yrr_REV = 8848 |
| 153063 | CEFBS_None, // VFMADDSUBPS4mr = 8849 |
| 153064 | CEFBS_None, // VFMADDSUBPS4rm = 8850 |
| 153065 | CEFBS_None, // VFMADDSUBPS4rr = 8851 |
| 153066 | CEFBS_None, // VFMADDSUBPS4rr_REV = 8852 |
| 153067 | CEFBS_None, // VFMSUB132PDYm = 8853 |
| 153068 | CEFBS_None, // VFMSUB132PDYr = 8854 |
| 153069 | CEFBS_None, // VFMSUB132PDZ128m = 8855 |
| 153070 | CEFBS_None, // VFMSUB132PDZ128mb = 8856 |
| 153071 | CEFBS_None, // VFMSUB132PDZ128mbk = 8857 |
| 153072 | CEFBS_None, // VFMSUB132PDZ128mbkz = 8858 |
| 153073 | CEFBS_None, // VFMSUB132PDZ128mk = 8859 |
| 153074 | CEFBS_None, // VFMSUB132PDZ128mkz = 8860 |
| 153075 | CEFBS_None, // VFMSUB132PDZ128r = 8861 |
| 153076 | CEFBS_None, // VFMSUB132PDZ128rk = 8862 |
| 153077 | CEFBS_None, // VFMSUB132PDZ128rkz = 8863 |
| 153078 | CEFBS_None, // VFMSUB132PDZ256m = 8864 |
| 153079 | CEFBS_None, // VFMSUB132PDZ256mb = 8865 |
| 153080 | CEFBS_None, // VFMSUB132PDZ256mbk = 8866 |
| 153081 | CEFBS_None, // VFMSUB132PDZ256mbkz = 8867 |
| 153082 | CEFBS_None, // VFMSUB132PDZ256mk = 8868 |
| 153083 | CEFBS_None, // VFMSUB132PDZ256mkz = 8869 |
| 153084 | CEFBS_None, // VFMSUB132PDZ256r = 8870 |
| 153085 | CEFBS_None, // VFMSUB132PDZ256rk = 8871 |
| 153086 | CEFBS_None, // VFMSUB132PDZ256rkz = 8872 |
| 153087 | CEFBS_None, // VFMSUB132PDZm = 8873 |
| 153088 | CEFBS_None, // VFMSUB132PDZmb = 8874 |
| 153089 | CEFBS_None, // VFMSUB132PDZmbk = 8875 |
| 153090 | CEFBS_None, // VFMSUB132PDZmbkz = 8876 |
| 153091 | CEFBS_None, // VFMSUB132PDZmk = 8877 |
| 153092 | CEFBS_None, // VFMSUB132PDZmkz = 8878 |
| 153093 | CEFBS_None, // VFMSUB132PDZr = 8879 |
| 153094 | CEFBS_None, // VFMSUB132PDZrb = 8880 |
| 153095 | CEFBS_None, // VFMSUB132PDZrbk = 8881 |
| 153096 | CEFBS_None, // VFMSUB132PDZrbkz = 8882 |
| 153097 | CEFBS_None, // VFMSUB132PDZrk = 8883 |
| 153098 | CEFBS_None, // VFMSUB132PDZrkz = 8884 |
| 153099 | CEFBS_None, // VFMSUB132PDm = 8885 |
| 153100 | CEFBS_None, // VFMSUB132PDr = 8886 |
| 153101 | CEFBS_None, // VFMSUB132PHZ128m = 8887 |
| 153102 | CEFBS_None, // VFMSUB132PHZ128mb = 8888 |
| 153103 | CEFBS_None, // VFMSUB132PHZ128mbk = 8889 |
| 153104 | CEFBS_None, // VFMSUB132PHZ128mbkz = 8890 |
| 153105 | CEFBS_None, // VFMSUB132PHZ128mk = 8891 |
| 153106 | CEFBS_None, // VFMSUB132PHZ128mkz = 8892 |
| 153107 | CEFBS_None, // VFMSUB132PHZ128r = 8893 |
| 153108 | CEFBS_None, // VFMSUB132PHZ128rk = 8894 |
| 153109 | CEFBS_None, // VFMSUB132PHZ128rkz = 8895 |
| 153110 | CEFBS_None, // VFMSUB132PHZ256m = 8896 |
| 153111 | CEFBS_None, // VFMSUB132PHZ256mb = 8897 |
| 153112 | CEFBS_None, // VFMSUB132PHZ256mbk = 8898 |
| 153113 | CEFBS_None, // VFMSUB132PHZ256mbkz = 8899 |
| 153114 | CEFBS_None, // VFMSUB132PHZ256mk = 8900 |
| 153115 | CEFBS_None, // VFMSUB132PHZ256mkz = 8901 |
| 153116 | CEFBS_None, // VFMSUB132PHZ256r = 8902 |
| 153117 | CEFBS_None, // VFMSUB132PHZ256rk = 8903 |
| 153118 | CEFBS_None, // VFMSUB132PHZ256rkz = 8904 |
| 153119 | CEFBS_None, // VFMSUB132PHZm = 8905 |
| 153120 | CEFBS_None, // VFMSUB132PHZmb = 8906 |
| 153121 | CEFBS_None, // VFMSUB132PHZmbk = 8907 |
| 153122 | CEFBS_None, // VFMSUB132PHZmbkz = 8908 |
| 153123 | CEFBS_None, // VFMSUB132PHZmk = 8909 |
| 153124 | CEFBS_None, // VFMSUB132PHZmkz = 8910 |
| 153125 | CEFBS_None, // VFMSUB132PHZr = 8911 |
| 153126 | CEFBS_None, // VFMSUB132PHZrb = 8912 |
| 153127 | CEFBS_None, // VFMSUB132PHZrbk = 8913 |
| 153128 | CEFBS_None, // VFMSUB132PHZrbkz = 8914 |
| 153129 | CEFBS_None, // VFMSUB132PHZrk = 8915 |
| 153130 | CEFBS_None, // VFMSUB132PHZrkz = 8916 |
| 153131 | CEFBS_None, // VFMSUB132PSYm = 8917 |
| 153132 | CEFBS_None, // VFMSUB132PSYr = 8918 |
| 153133 | CEFBS_None, // VFMSUB132PSZ128m = 8919 |
| 153134 | CEFBS_None, // VFMSUB132PSZ128mb = 8920 |
| 153135 | CEFBS_None, // VFMSUB132PSZ128mbk = 8921 |
| 153136 | CEFBS_None, // VFMSUB132PSZ128mbkz = 8922 |
| 153137 | CEFBS_None, // VFMSUB132PSZ128mk = 8923 |
| 153138 | CEFBS_None, // VFMSUB132PSZ128mkz = 8924 |
| 153139 | CEFBS_None, // VFMSUB132PSZ128r = 8925 |
| 153140 | CEFBS_None, // VFMSUB132PSZ128rk = 8926 |
| 153141 | CEFBS_None, // VFMSUB132PSZ128rkz = 8927 |
| 153142 | CEFBS_None, // VFMSUB132PSZ256m = 8928 |
| 153143 | CEFBS_None, // VFMSUB132PSZ256mb = 8929 |
| 153144 | CEFBS_None, // VFMSUB132PSZ256mbk = 8930 |
| 153145 | CEFBS_None, // VFMSUB132PSZ256mbkz = 8931 |
| 153146 | CEFBS_None, // VFMSUB132PSZ256mk = 8932 |
| 153147 | CEFBS_None, // VFMSUB132PSZ256mkz = 8933 |
| 153148 | CEFBS_None, // VFMSUB132PSZ256r = 8934 |
| 153149 | CEFBS_None, // VFMSUB132PSZ256rk = 8935 |
| 153150 | CEFBS_None, // VFMSUB132PSZ256rkz = 8936 |
| 153151 | CEFBS_None, // VFMSUB132PSZm = 8937 |
| 153152 | CEFBS_None, // VFMSUB132PSZmb = 8938 |
| 153153 | CEFBS_None, // VFMSUB132PSZmbk = 8939 |
| 153154 | CEFBS_None, // VFMSUB132PSZmbkz = 8940 |
| 153155 | CEFBS_None, // VFMSUB132PSZmk = 8941 |
| 153156 | CEFBS_None, // VFMSUB132PSZmkz = 8942 |
| 153157 | CEFBS_None, // VFMSUB132PSZr = 8943 |
| 153158 | CEFBS_None, // VFMSUB132PSZrb = 8944 |
| 153159 | CEFBS_None, // VFMSUB132PSZrbk = 8945 |
| 153160 | CEFBS_None, // VFMSUB132PSZrbkz = 8946 |
| 153161 | CEFBS_None, // VFMSUB132PSZrk = 8947 |
| 153162 | CEFBS_None, // VFMSUB132PSZrkz = 8948 |
| 153163 | CEFBS_None, // VFMSUB132PSm = 8949 |
| 153164 | CEFBS_None, // VFMSUB132PSr = 8950 |
| 153165 | CEFBS_None, // VFMSUB132SDZm = 8951 |
| 153166 | CEFBS_None, // VFMSUB132SDZm_Int = 8952 |
| 153167 | CEFBS_None, // VFMSUB132SDZm_Intk = 8953 |
| 153168 | CEFBS_None, // VFMSUB132SDZm_Intkz = 8954 |
| 153169 | CEFBS_None, // VFMSUB132SDZr = 8955 |
| 153170 | CEFBS_None, // VFMSUB132SDZr_Int = 8956 |
| 153171 | CEFBS_None, // VFMSUB132SDZr_Intk = 8957 |
| 153172 | CEFBS_None, // VFMSUB132SDZr_Intkz = 8958 |
| 153173 | CEFBS_None, // VFMSUB132SDZrb = 8959 |
| 153174 | CEFBS_None, // VFMSUB132SDZrb_Int = 8960 |
| 153175 | CEFBS_None, // VFMSUB132SDZrb_Intk = 8961 |
| 153176 | CEFBS_None, // VFMSUB132SDZrb_Intkz = 8962 |
| 153177 | CEFBS_None, // VFMSUB132SDm = 8963 |
| 153178 | CEFBS_None, // VFMSUB132SDm_Int = 8964 |
| 153179 | CEFBS_None, // VFMSUB132SDr = 8965 |
| 153180 | CEFBS_None, // VFMSUB132SDr_Int = 8966 |
| 153181 | CEFBS_None, // VFMSUB132SHZm = 8967 |
| 153182 | CEFBS_None, // VFMSUB132SHZm_Int = 8968 |
| 153183 | CEFBS_None, // VFMSUB132SHZm_Intk = 8969 |
| 153184 | CEFBS_None, // VFMSUB132SHZm_Intkz = 8970 |
| 153185 | CEFBS_None, // VFMSUB132SHZr = 8971 |
| 153186 | CEFBS_None, // VFMSUB132SHZr_Int = 8972 |
| 153187 | CEFBS_None, // VFMSUB132SHZr_Intk = 8973 |
| 153188 | CEFBS_None, // VFMSUB132SHZr_Intkz = 8974 |
| 153189 | CEFBS_None, // VFMSUB132SHZrb = 8975 |
| 153190 | CEFBS_None, // VFMSUB132SHZrb_Int = 8976 |
| 153191 | CEFBS_None, // VFMSUB132SHZrb_Intk = 8977 |
| 153192 | CEFBS_None, // VFMSUB132SHZrb_Intkz = 8978 |
| 153193 | CEFBS_None, // VFMSUB132SSZm = 8979 |
| 153194 | CEFBS_None, // VFMSUB132SSZm_Int = 8980 |
| 153195 | CEFBS_None, // VFMSUB132SSZm_Intk = 8981 |
| 153196 | CEFBS_None, // VFMSUB132SSZm_Intkz = 8982 |
| 153197 | CEFBS_None, // VFMSUB132SSZr = 8983 |
| 153198 | CEFBS_None, // VFMSUB132SSZr_Int = 8984 |
| 153199 | CEFBS_None, // VFMSUB132SSZr_Intk = 8985 |
| 153200 | CEFBS_None, // VFMSUB132SSZr_Intkz = 8986 |
| 153201 | CEFBS_None, // VFMSUB132SSZrb = 8987 |
| 153202 | CEFBS_None, // VFMSUB132SSZrb_Int = 8988 |
| 153203 | CEFBS_None, // VFMSUB132SSZrb_Intk = 8989 |
| 153204 | CEFBS_None, // VFMSUB132SSZrb_Intkz = 8990 |
| 153205 | CEFBS_None, // VFMSUB132SSm = 8991 |
| 153206 | CEFBS_None, // VFMSUB132SSm_Int = 8992 |
| 153207 | CEFBS_None, // VFMSUB132SSr = 8993 |
| 153208 | CEFBS_None, // VFMSUB132SSr_Int = 8994 |
| 153209 | CEFBS_None, // VFMSUB213PDYm = 8995 |
| 153210 | CEFBS_None, // VFMSUB213PDYr = 8996 |
| 153211 | CEFBS_None, // VFMSUB213PDZ128m = 8997 |
| 153212 | CEFBS_None, // VFMSUB213PDZ128mb = 8998 |
| 153213 | CEFBS_None, // VFMSUB213PDZ128mbk = 8999 |
| 153214 | CEFBS_None, // VFMSUB213PDZ128mbkz = 9000 |
| 153215 | CEFBS_None, // VFMSUB213PDZ128mk = 9001 |
| 153216 | CEFBS_None, // VFMSUB213PDZ128mkz = 9002 |
| 153217 | CEFBS_None, // VFMSUB213PDZ128r = 9003 |
| 153218 | CEFBS_None, // VFMSUB213PDZ128rk = 9004 |
| 153219 | CEFBS_None, // VFMSUB213PDZ128rkz = 9005 |
| 153220 | CEFBS_None, // VFMSUB213PDZ256m = 9006 |
| 153221 | CEFBS_None, // VFMSUB213PDZ256mb = 9007 |
| 153222 | CEFBS_None, // VFMSUB213PDZ256mbk = 9008 |
| 153223 | CEFBS_None, // VFMSUB213PDZ256mbkz = 9009 |
| 153224 | CEFBS_None, // VFMSUB213PDZ256mk = 9010 |
| 153225 | CEFBS_None, // VFMSUB213PDZ256mkz = 9011 |
| 153226 | CEFBS_None, // VFMSUB213PDZ256r = 9012 |
| 153227 | CEFBS_None, // VFMSUB213PDZ256rk = 9013 |
| 153228 | CEFBS_None, // VFMSUB213PDZ256rkz = 9014 |
| 153229 | CEFBS_None, // VFMSUB213PDZm = 9015 |
| 153230 | CEFBS_None, // VFMSUB213PDZmb = 9016 |
| 153231 | CEFBS_None, // VFMSUB213PDZmbk = 9017 |
| 153232 | CEFBS_None, // VFMSUB213PDZmbkz = 9018 |
| 153233 | CEFBS_None, // VFMSUB213PDZmk = 9019 |
| 153234 | CEFBS_None, // VFMSUB213PDZmkz = 9020 |
| 153235 | CEFBS_None, // VFMSUB213PDZr = 9021 |
| 153236 | CEFBS_None, // VFMSUB213PDZrb = 9022 |
| 153237 | CEFBS_None, // VFMSUB213PDZrbk = 9023 |
| 153238 | CEFBS_None, // VFMSUB213PDZrbkz = 9024 |
| 153239 | CEFBS_None, // VFMSUB213PDZrk = 9025 |
| 153240 | CEFBS_None, // VFMSUB213PDZrkz = 9026 |
| 153241 | CEFBS_None, // VFMSUB213PDm = 9027 |
| 153242 | CEFBS_None, // VFMSUB213PDr = 9028 |
| 153243 | CEFBS_None, // VFMSUB213PHZ128m = 9029 |
| 153244 | CEFBS_None, // VFMSUB213PHZ128mb = 9030 |
| 153245 | CEFBS_None, // VFMSUB213PHZ128mbk = 9031 |
| 153246 | CEFBS_None, // VFMSUB213PHZ128mbkz = 9032 |
| 153247 | CEFBS_None, // VFMSUB213PHZ128mk = 9033 |
| 153248 | CEFBS_None, // VFMSUB213PHZ128mkz = 9034 |
| 153249 | CEFBS_None, // VFMSUB213PHZ128r = 9035 |
| 153250 | CEFBS_None, // VFMSUB213PHZ128rk = 9036 |
| 153251 | CEFBS_None, // VFMSUB213PHZ128rkz = 9037 |
| 153252 | CEFBS_None, // VFMSUB213PHZ256m = 9038 |
| 153253 | CEFBS_None, // VFMSUB213PHZ256mb = 9039 |
| 153254 | CEFBS_None, // VFMSUB213PHZ256mbk = 9040 |
| 153255 | CEFBS_None, // VFMSUB213PHZ256mbkz = 9041 |
| 153256 | CEFBS_None, // VFMSUB213PHZ256mk = 9042 |
| 153257 | CEFBS_None, // VFMSUB213PHZ256mkz = 9043 |
| 153258 | CEFBS_None, // VFMSUB213PHZ256r = 9044 |
| 153259 | CEFBS_None, // VFMSUB213PHZ256rk = 9045 |
| 153260 | CEFBS_None, // VFMSUB213PHZ256rkz = 9046 |
| 153261 | CEFBS_None, // VFMSUB213PHZm = 9047 |
| 153262 | CEFBS_None, // VFMSUB213PHZmb = 9048 |
| 153263 | CEFBS_None, // VFMSUB213PHZmbk = 9049 |
| 153264 | CEFBS_None, // VFMSUB213PHZmbkz = 9050 |
| 153265 | CEFBS_None, // VFMSUB213PHZmk = 9051 |
| 153266 | CEFBS_None, // VFMSUB213PHZmkz = 9052 |
| 153267 | CEFBS_None, // VFMSUB213PHZr = 9053 |
| 153268 | CEFBS_None, // VFMSUB213PHZrb = 9054 |
| 153269 | CEFBS_None, // VFMSUB213PHZrbk = 9055 |
| 153270 | CEFBS_None, // VFMSUB213PHZrbkz = 9056 |
| 153271 | CEFBS_None, // VFMSUB213PHZrk = 9057 |
| 153272 | CEFBS_None, // VFMSUB213PHZrkz = 9058 |
| 153273 | CEFBS_None, // VFMSUB213PSYm = 9059 |
| 153274 | CEFBS_None, // VFMSUB213PSYr = 9060 |
| 153275 | CEFBS_None, // VFMSUB213PSZ128m = 9061 |
| 153276 | CEFBS_None, // VFMSUB213PSZ128mb = 9062 |
| 153277 | CEFBS_None, // VFMSUB213PSZ128mbk = 9063 |
| 153278 | CEFBS_None, // VFMSUB213PSZ128mbkz = 9064 |
| 153279 | CEFBS_None, // VFMSUB213PSZ128mk = 9065 |
| 153280 | CEFBS_None, // VFMSUB213PSZ128mkz = 9066 |
| 153281 | CEFBS_None, // VFMSUB213PSZ128r = 9067 |
| 153282 | CEFBS_None, // VFMSUB213PSZ128rk = 9068 |
| 153283 | CEFBS_None, // VFMSUB213PSZ128rkz = 9069 |
| 153284 | CEFBS_None, // VFMSUB213PSZ256m = 9070 |
| 153285 | CEFBS_None, // VFMSUB213PSZ256mb = 9071 |
| 153286 | CEFBS_None, // VFMSUB213PSZ256mbk = 9072 |
| 153287 | CEFBS_None, // VFMSUB213PSZ256mbkz = 9073 |
| 153288 | CEFBS_None, // VFMSUB213PSZ256mk = 9074 |
| 153289 | CEFBS_None, // VFMSUB213PSZ256mkz = 9075 |
| 153290 | CEFBS_None, // VFMSUB213PSZ256r = 9076 |
| 153291 | CEFBS_None, // VFMSUB213PSZ256rk = 9077 |
| 153292 | CEFBS_None, // VFMSUB213PSZ256rkz = 9078 |
| 153293 | CEFBS_None, // VFMSUB213PSZm = 9079 |
| 153294 | CEFBS_None, // VFMSUB213PSZmb = 9080 |
| 153295 | CEFBS_None, // VFMSUB213PSZmbk = 9081 |
| 153296 | CEFBS_None, // VFMSUB213PSZmbkz = 9082 |
| 153297 | CEFBS_None, // VFMSUB213PSZmk = 9083 |
| 153298 | CEFBS_None, // VFMSUB213PSZmkz = 9084 |
| 153299 | CEFBS_None, // VFMSUB213PSZr = 9085 |
| 153300 | CEFBS_None, // VFMSUB213PSZrb = 9086 |
| 153301 | CEFBS_None, // VFMSUB213PSZrbk = 9087 |
| 153302 | CEFBS_None, // VFMSUB213PSZrbkz = 9088 |
| 153303 | CEFBS_None, // VFMSUB213PSZrk = 9089 |
| 153304 | CEFBS_None, // VFMSUB213PSZrkz = 9090 |
| 153305 | CEFBS_None, // VFMSUB213PSm = 9091 |
| 153306 | CEFBS_None, // VFMSUB213PSr = 9092 |
| 153307 | CEFBS_None, // VFMSUB213SDZm = 9093 |
| 153308 | CEFBS_None, // VFMSUB213SDZm_Int = 9094 |
| 153309 | CEFBS_None, // VFMSUB213SDZm_Intk = 9095 |
| 153310 | CEFBS_None, // VFMSUB213SDZm_Intkz = 9096 |
| 153311 | CEFBS_None, // VFMSUB213SDZr = 9097 |
| 153312 | CEFBS_None, // VFMSUB213SDZr_Int = 9098 |
| 153313 | CEFBS_None, // VFMSUB213SDZr_Intk = 9099 |
| 153314 | CEFBS_None, // VFMSUB213SDZr_Intkz = 9100 |
| 153315 | CEFBS_None, // VFMSUB213SDZrb = 9101 |
| 153316 | CEFBS_None, // VFMSUB213SDZrb_Int = 9102 |
| 153317 | CEFBS_None, // VFMSUB213SDZrb_Intk = 9103 |
| 153318 | CEFBS_None, // VFMSUB213SDZrb_Intkz = 9104 |
| 153319 | CEFBS_None, // VFMSUB213SDm = 9105 |
| 153320 | CEFBS_None, // VFMSUB213SDm_Int = 9106 |
| 153321 | CEFBS_None, // VFMSUB213SDr = 9107 |
| 153322 | CEFBS_None, // VFMSUB213SDr_Int = 9108 |
| 153323 | CEFBS_None, // VFMSUB213SHZm = 9109 |
| 153324 | CEFBS_None, // VFMSUB213SHZm_Int = 9110 |
| 153325 | CEFBS_None, // VFMSUB213SHZm_Intk = 9111 |
| 153326 | CEFBS_None, // VFMSUB213SHZm_Intkz = 9112 |
| 153327 | CEFBS_None, // VFMSUB213SHZr = 9113 |
| 153328 | CEFBS_None, // VFMSUB213SHZr_Int = 9114 |
| 153329 | CEFBS_None, // VFMSUB213SHZr_Intk = 9115 |
| 153330 | CEFBS_None, // VFMSUB213SHZr_Intkz = 9116 |
| 153331 | CEFBS_None, // VFMSUB213SHZrb = 9117 |
| 153332 | CEFBS_None, // VFMSUB213SHZrb_Int = 9118 |
| 153333 | CEFBS_None, // VFMSUB213SHZrb_Intk = 9119 |
| 153334 | CEFBS_None, // VFMSUB213SHZrb_Intkz = 9120 |
| 153335 | CEFBS_None, // VFMSUB213SSZm = 9121 |
| 153336 | CEFBS_None, // VFMSUB213SSZm_Int = 9122 |
| 153337 | CEFBS_None, // VFMSUB213SSZm_Intk = 9123 |
| 153338 | CEFBS_None, // VFMSUB213SSZm_Intkz = 9124 |
| 153339 | CEFBS_None, // VFMSUB213SSZr = 9125 |
| 153340 | CEFBS_None, // VFMSUB213SSZr_Int = 9126 |
| 153341 | CEFBS_None, // VFMSUB213SSZr_Intk = 9127 |
| 153342 | CEFBS_None, // VFMSUB213SSZr_Intkz = 9128 |
| 153343 | CEFBS_None, // VFMSUB213SSZrb = 9129 |
| 153344 | CEFBS_None, // VFMSUB213SSZrb_Int = 9130 |
| 153345 | CEFBS_None, // VFMSUB213SSZrb_Intk = 9131 |
| 153346 | CEFBS_None, // VFMSUB213SSZrb_Intkz = 9132 |
| 153347 | CEFBS_None, // VFMSUB213SSm = 9133 |
| 153348 | CEFBS_None, // VFMSUB213SSm_Int = 9134 |
| 153349 | CEFBS_None, // VFMSUB213SSr = 9135 |
| 153350 | CEFBS_None, // VFMSUB213SSr_Int = 9136 |
| 153351 | CEFBS_None, // VFMSUB231PDYm = 9137 |
| 153352 | CEFBS_None, // VFMSUB231PDYr = 9138 |
| 153353 | CEFBS_None, // VFMSUB231PDZ128m = 9139 |
| 153354 | CEFBS_None, // VFMSUB231PDZ128mb = 9140 |
| 153355 | CEFBS_None, // VFMSUB231PDZ128mbk = 9141 |
| 153356 | CEFBS_None, // VFMSUB231PDZ128mbkz = 9142 |
| 153357 | CEFBS_None, // VFMSUB231PDZ128mk = 9143 |
| 153358 | CEFBS_None, // VFMSUB231PDZ128mkz = 9144 |
| 153359 | CEFBS_None, // VFMSUB231PDZ128r = 9145 |
| 153360 | CEFBS_None, // VFMSUB231PDZ128rk = 9146 |
| 153361 | CEFBS_None, // VFMSUB231PDZ128rkz = 9147 |
| 153362 | CEFBS_None, // VFMSUB231PDZ256m = 9148 |
| 153363 | CEFBS_None, // VFMSUB231PDZ256mb = 9149 |
| 153364 | CEFBS_None, // VFMSUB231PDZ256mbk = 9150 |
| 153365 | CEFBS_None, // VFMSUB231PDZ256mbkz = 9151 |
| 153366 | CEFBS_None, // VFMSUB231PDZ256mk = 9152 |
| 153367 | CEFBS_None, // VFMSUB231PDZ256mkz = 9153 |
| 153368 | CEFBS_None, // VFMSUB231PDZ256r = 9154 |
| 153369 | CEFBS_None, // VFMSUB231PDZ256rk = 9155 |
| 153370 | CEFBS_None, // VFMSUB231PDZ256rkz = 9156 |
| 153371 | CEFBS_None, // VFMSUB231PDZm = 9157 |
| 153372 | CEFBS_None, // VFMSUB231PDZmb = 9158 |
| 153373 | CEFBS_None, // VFMSUB231PDZmbk = 9159 |
| 153374 | CEFBS_None, // VFMSUB231PDZmbkz = 9160 |
| 153375 | CEFBS_None, // VFMSUB231PDZmk = 9161 |
| 153376 | CEFBS_None, // VFMSUB231PDZmkz = 9162 |
| 153377 | CEFBS_None, // VFMSUB231PDZr = 9163 |
| 153378 | CEFBS_None, // VFMSUB231PDZrb = 9164 |
| 153379 | CEFBS_None, // VFMSUB231PDZrbk = 9165 |
| 153380 | CEFBS_None, // VFMSUB231PDZrbkz = 9166 |
| 153381 | CEFBS_None, // VFMSUB231PDZrk = 9167 |
| 153382 | CEFBS_None, // VFMSUB231PDZrkz = 9168 |
| 153383 | CEFBS_None, // VFMSUB231PDm = 9169 |
| 153384 | CEFBS_None, // VFMSUB231PDr = 9170 |
| 153385 | CEFBS_None, // VFMSUB231PHZ128m = 9171 |
| 153386 | CEFBS_None, // VFMSUB231PHZ128mb = 9172 |
| 153387 | CEFBS_None, // VFMSUB231PHZ128mbk = 9173 |
| 153388 | CEFBS_None, // VFMSUB231PHZ128mbkz = 9174 |
| 153389 | CEFBS_None, // VFMSUB231PHZ128mk = 9175 |
| 153390 | CEFBS_None, // VFMSUB231PHZ128mkz = 9176 |
| 153391 | CEFBS_None, // VFMSUB231PHZ128r = 9177 |
| 153392 | CEFBS_None, // VFMSUB231PHZ128rk = 9178 |
| 153393 | CEFBS_None, // VFMSUB231PHZ128rkz = 9179 |
| 153394 | CEFBS_None, // VFMSUB231PHZ256m = 9180 |
| 153395 | CEFBS_None, // VFMSUB231PHZ256mb = 9181 |
| 153396 | CEFBS_None, // VFMSUB231PHZ256mbk = 9182 |
| 153397 | CEFBS_None, // VFMSUB231PHZ256mbkz = 9183 |
| 153398 | CEFBS_None, // VFMSUB231PHZ256mk = 9184 |
| 153399 | CEFBS_None, // VFMSUB231PHZ256mkz = 9185 |
| 153400 | CEFBS_None, // VFMSUB231PHZ256r = 9186 |
| 153401 | CEFBS_None, // VFMSUB231PHZ256rk = 9187 |
| 153402 | CEFBS_None, // VFMSUB231PHZ256rkz = 9188 |
| 153403 | CEFBS_None, // VFMSUB231PHZm = 9189 |
| 153404 | CEFBS_None, // VFMSUB231PHZmb = 9190 |
| 153405 | CEFBS_None, // VFMSUB231PHZmbk = 9191 |
| 153406 | CEFBS_None, // VFMSUB231PHZmbkz = 9192 |
| 153407 | CEFBS_None, // VFMSUB231PHZmk = 9193 |
| 153408 | CEFBS_None, // VFMSUB231PHZmkz = 9194 |
| 153409 | CEFBS_None, // VFMSUB231PHZr = 9195 |
| 153410 | CEFBS_None, // VFMSUB231PHZrb = 9196 |
| 153411 | CEFBS_None, // VFMSUB231PHZrbk = 9197 |
| 153412 | CEFBS_None, // VFMSUB231PHZrbkz = 9198 |
| 153413 | CEFBS_None, // VFMSUB231PHZrk = 9199 |
| 153414 | CEFBS_None, // VFMSUB231PHZrkz = 9200 |
| 153415 | CEFBS_None, // VFMSUB231PSYm = 9201 |
| 153416 | CEFBS_None, // VFMSUB231PSYr = 9202 |
| 153417 | CEFBS_None, // VFMSUB231PSZ128m = 9203 |
| 153418 | CEFBS_None, // VFMSUB231PSZ128mb = 9204 |
| 153419 | CEFBS_None, // VFMSUB231PSZ128mbk = 9205 |
| 153420 | CEFBS_None, // VFMSUB231PSZ128mbkz = 9206 |
| 153421 | CEFBS_None, // VFMSUB231PSZ128mk = 9207 |
| 153422 | CEFBS_None, // VFMSUB231PSZ128mkz = 9208 |
| 153423 | CEFBS_None, // VFMSUB231PSZ128r = 9209 |
| 153424 | CEFBS_None, // VFMSUB231PSZ128rk = 9210 |
| 153425 | CEFBS_None, // VFMSUB231PSZ128rkz = 9211 |
| 153426 | CEFBS_None, // VFMSUB231PSZ256m = 9212 |
| 153427 | CEFBS_None, // VFMSUB231PSZ256mb = 9213 |
| 153428 | CEFBS_None, // VFMSUB231PSZ256mbk = 9214 |
| 153429 | CEFBS_None, // VFMSUB231PSZ256mbkz = 9215 |
| 153430 | CEFBS_None, // VFMSUB231PSZ256mk = 9216 |
| 153431 | CEFBS_None, // VFMSUB231PSZ256mkz = 9217 |
| 153432 | CEFBS_None, // VFMSUB231PSZ256r = 9218 |
| 153433 | CEFBS_None, // VFMSUB231PSZ256rk = 9219 |
| 153434 | CEFBS_None, // VFMSUB231PSZ256rkz = 9220 |
| 153435 | CEFBS_None, // VFMSUB231PSZm = 9221 |
| 153436 | CEFBS_None, // VFMSUB231PSZmb = 9222 |
| 153437 | CEFBS_None, // VFMSUB231PSZmbk = 9223 |
| 153438 | CEFBS_None, // VFMSUB231PSZmbkz = 9224 |
| 153439 | CEFBS_None, // VFMSUB231PSZmk = 9225 |
| 153440 | CEFBS_None, // VFMSUB231PSZmkz = 9226 |
| 153441 | CEFBS_None, // VFMSUB231PSZr = 9227 |
| 153442 | CEFBS_None, // VFMSUB231PSZrb = 9228 |
| 153443 | CEFBS_None, // VFMSUB231PSZrbk = 9229 |
| 153444 | CEFBS_None, // VFMSUB231PSZrbkz = 9230 |
| 153445 | CEFBS_None, // VFMSUB231PSZrk = 9231 |
| 153446 | CEFBS_None, // VFMSUB231PSZrkz = 9232 |
| 153447 | CEFBS_None, // VFMSUB231PSm = 9233 |
| 153448 | CEFBS_None, // VFMSUB231PSr = 9234 |
| 153449 | CEFBS_None, // VFMSUB231SDZm = 9235 |
| 153450 | CEFBS_None, // VFMSUB231SDZm_Int = 9236 |
| 153451 | CEFBS_None, // VFMSUB231SDZm_Intk = 9237 |
| 153452 | CEFBS_None, // VFMSUB231SDZm_Intkz = 9238 |
| 153453 | CEFBS_None, // VFMSUB231SDZr = 9239 |
| 153454 | CEFBS_None, // VFMSUB231SDZr_Int = 9240 |
| 153455 | CEFBS_None, // VFMSUB231SDZr_Intk = 9241 |
| 153456 | CEFBS_None, // VFMSUB231SDZr_Intkz = 9242 |
| 153457 | CEFBS_None, // VFMSUB231SDZrb = 9243 |
| 153458 | CEFBS_None, // VFMSUB231SDZrb_Int = 9244 |
| 153459 | CEFBS_None, // VFMSUB231SDZrb_Intk = 9245 |
| 153460 | CEFBS_None, // VFMSUB231SDZrb_Intkz = 9246 |
| 153461 | CEFBS_None, // VFMSUB231SDm = 9247 |
| 153462 | CEFBS_None, // VFMSUB231SDm_Int = 9248 |
| 153463 | CEFBS_None, // VFMSUB231SDr = 9249 |
| 153464 | CEFBS_None, // VFMSUB231SDr_Int = 9250 |
| 153465 | CEFBS_None, // VFMSUB231SHZm = 9251 |
| 153466 | CEFBS_None, // VFMSUB231SHZm_Int = 9252 |
| 153467 | CEFBS_None, // VFMSUB231SHZm_Intk = 9253 |
| 153468 | CEFBS_None, // VFMSUB231SHZm_Intkz = 9254 |
| 153469 | CEFBS_None, // VFMSUB231SHZr = 9255 |
| 153470 | CEFBS_None, // VFMSUB231SHZr_Int = 9256 |
| 153471 | CEFBS_None, // VFMSUB231SHZr_Intk = 9257 |
| 153472 | CEFBS_None, // VFMSUB231SHZr_Intkz = 9258 |
| 153473 | CEFBS_None, // VFMSUB231SHZrb = 9259 |
| 153474 | CEFBS_None, // VFMSUB231SHZrb_Int = 9260 |
| 153475 | CEFBS_None, // VFMSUB231SHZrb_Intk = 9261 |
| 153476 | CEFBS_None, // VFMSUB231SHZrb_Intkz = 9262 |
| 153477 | CEFBS_None, // VFMSUB231SSZm = 9263 |
| 153478 | CEFBS_None, // VFMSUB231SSZm_Int = 9264 |
| 153479 | CEFBS_None, // VFMSUB231SSZm_Intk = 9265 |
| 153480 | CEFBS_None, // VFMSUB231SSZm_Intkz = 9266 |
| 153481 | CEFBS_None, // VFMSUB231SSZr = 9267 |
| 153482 | CEFBS_None, // VFMSUB231SSZr_Int = 9268 |
| 153483 | CEFBS_None, // VFMSUB231SSZr_Intk = 9269 |
| 153484 | CEFBS_None, // VFMSUB231SSZr_Intkz = 9270 |
| 153485 | CEFBS_None, // VFMSUB231SSZrb = 9271 |
| 153486 | CEFBS_None, // VFMSUB231SSZrb_Int = 9272 |
| 153487 | CEFBS_None, // VFMSUB231SSZrb_Intk = 9273 |
| 153488 | CEFBS_None, // VFMSUB231SSZrb_Intkz = 9274 |
| 153489 | CEFBS_None, // VFMSUB231SSm = 9275 |
| 153490 | CEFBS_None, // VFMSUB231SSm_Int = 9276 |
| 153491 | CEFBS_None, // VFMSUB231SSr = 9277 |
| 153492 | CEFBS_None, // VFMSUB231SSr_Int = 9278 |
| 153493 | CEFBS_None, // VFMSUBADD132PDYm = 9279 |
| 153494 | CEFBS_None, // VFMSUBADD132PDYr = 9280 |
| 153495 | CEFBS_None, // VFMSUBADD132PDZ128m = 9281 |
| 153496 | CEFBS_None, // VFMSUBADD132PDZ128mb = 9282 |
| 153497 | CEFBS_None, // VFMSUBADD132PDZ128mbk = 9283 |
| 153498 | CEFBS_None, // VFMSUBADD132PDZ128mbkz = 9284 |
| 153499 | CEFBS_None, // VFMSUBADD132PDZ128mk = 9285 |
| 153500 | CEFBS_None, // VFMSUBADD132PDZ128mkz = 9286 |
| 153501 | CEFBS_None, // VFMSUBADD132PDZ128r = 9287 |
| 153502 | CEFBS_None, // VFMSUBADD132PDZ128rk = 9288 |
| 153503 | CEFBS_None, // VFMSUBADD132PDZ128rkz = 9289 |
| 153504 | CEFBS_None, // VFMSUBADD132PDZ256m = 9290 |
| 153505 | CEFBS_None, // VFMSUBADD132PDZ256mb = 9291 |
| 153506 | CEFBS_None, // VFMSUBADD132PDZ256mbk = 9292 |
| 153507 | CEFBS_None, // VFMSUBADD132PDZ256mbkz = 9293 |
| 153508 | CEFBS_None, // VFMSUBADD132PDZ256mk = 9294 |
| 153509 | CEFBS_None, // VFMSUBADD132PDZ256mkz = 9295 |
| 153510 | CEFBS_None, // VFMSUBADD132PDZ256r = 9296 |
| 153511 | CEFBS_None, // VFMSUBADD132PDZ256rk = 9297 |
| 153512 | CEFBS_None, // VFMSUBADD132PDZ256rkz = 9298 |
| 153513 | CEFBS_None, // VFMSUBADD132PDZm = 9299 |
| 153514 | CEFBS_None, // VFMSUBADD132PDZmb = 9300 |
| 153515 | CEFBS_None, // VFMSUBADD132PDZmbk = 9301 |
| 153516 | CEFBS_None, // VFMSUBADD132PDZmbkz = 9302 |
| 153517 | CEFBS_None, // VFMSUBADD132PDZmk = 9303 |
| 153518 | CEFBS_None, // VFMSUBADD132PDZmkz = 9304 |
| 153519 | CEFBS_None, // VFMSUBADD132PDZr = 9305 |
| 153520 | CEFBS_None, // VFMSUBADD132PDZrb = 9306 |
| 153521 | CEFBS_None, // VFMSUBADD132PDZrbk = 9307 |
| 153522 | CEFBS_None, // VFMSUBADD132PDZrbkz = 9308 |
| 153523 | CEFBS_None, // VFMSUBADD132PDZrk = 9309 |
| 153524 | CEFBS_None, // VFMSUBADD132PDZrkz = 9310 |
| 153525 | CEFBS_None, // VFMSUBADD132PDm = 9311 |
| 153526 | CEFBS_None, // VFMSUBADD132PDr = 9312 |
| 153527 | CEFBS_None, // VFMSUBADD132PHZ128m = 9313 |
| 153528 | CEFBS_None, // VFMSUBADD132PHZ128mb = 9314 |
| 153529 | CEFBS_None, // VFMSUBADD132PHZ128mbk = 9315 |
| 153530 | CEFBS_None, // VFMSUBADD132PHZ128mbkz = 9316 |
| 153531 | CEFBS_None, // VFMSUBADD132PHZ128mk = 9317 |
| 153532 | CEFBS_None, // VFMSUBADD132PHZ128mkz = 9318 |
| 153533 | CEFBS_None, // VFMSUBADD132PHZ128r = 9319 |
| 153534 | CEFBS_None, // VFMSUBADD132PHZ128rk = 9320 |
| 153535 | CEFBS_None, // VFMSUBADD132PHZ128rkz = 9321 |
| 153536 | CEFBS_None, // VFMSUBADD132PHZ256m = 9322 |
| 153537 | CEFBS_None, // VFMSUBADD132PHZ256mb = 9323 |
| 153538 | CEFBS_None, // VFMSUBADD132PHZ256mbk = 9324 |
| 153539 | CEFBS_None, // VFMSUBADD132PHZ256mbkz = 9325 |
| 153540 | CEFBS_None, // VFMSUBADD132PHZ256mk = 9326 |
| 153541 | CEFBS_None, // VFMSUBADD132PHZ256mkz = 9327 |
| 153542 | CEFBS_None, // VFMSUBADD132PHZ256r = 9328 |
| 153543 | CEFBS_None, // VFMSUBADD132PHZ256rk = 9329 |
| 153544 | CEFBS_None, // VFMSUBADD132PHZ256rkz = 9330 |
| 153545 | CEFBS_None, // VFMSUBADD132PHZm = 9331 |
| 153546 | CEFBS_None, // VFMSUBADD132PHZmb = 9332 |
| 153547 | CEFBS_None, // VFMSUBADD132PHZmbk = 9333 |
| 153548 | CEFBS_None, // VFMSUBADD132PHZmbkz = 9334 |
| 153549 | CEFBS_None, // VFMSUBADD132PHZmk = 9335 |
| 153550 | CEFBS_None, // VFMSUBADD132PHZmkz = 9336 |
| 153551 | CEFBS_None, // VFMSUBADD132PHZr = 9337 |
| 153552 | CEFBS_None, // VFMSUBADD132PHZrb = 9338 |
| 153553 | CEFBS_None, // VFMSUBADD132PHZrbk = 9339 |
| 153554 | CEFBS_None, // VFMSUBADD132PHZrbkz = 9340 |
| 153555 | CEFBS_None, // VFMSUBADD132PHZrk = 9341 |
| 153556 | CEFBS_None, // VFMSUBADD132PHZrkz = 9342 |
| 153557 | CEFBS_None, // VFMSUBADD132PSYm = 9343 |
| 153558 | CEFBS_None, // VFMSUBADD132PSYr = 9344 |
| 153559 | CEFBS_None, // VFMSUBADD132PSZ128m = 9345 |
| 153560 | CEFBS_None, // VFMSUBADD132PSZ128mb = 9346 |
| 153561 | CEFBS_None, // VFMSUBADD132PSZ128mbk = 9347 |
| 153562 | CEFBS_None, // VFMSUBADD132PSZ128mbkz = 9348 |
| 153563 | CEFBS_None, // VFMSUBADD132PSZ128mk = 9349 |
| 153564 | CEFBS_None, // VFMSUBADD132PSZ128mkz = 9350 |
| 153565 | CEFBS_None, // VFMSUBADD132PSZ128r = 9351 |
| 153566 | CEFBS_None, // VFMSUBADD132PSZ128rk = 9352 |
| 153567 | CEFBS_None, // VFMSUBADD132PSZ128rkz = 9353 |
| 153568 | CEFBS_None, // VFMSUBADD132PSZ256m = 9354 |
| 153569 | CEFBS_None, // VFMSUBADD132PSZ256mb = 9355 |
| 153570 | CEFBS_None, // VFMSUBADD132PSZ256mbk = 9356 |
| 153571 | CEFBS_None, // VFMSUBADD132PSZ256mbkz = 9357 |
| 153572 | CEFBS_None, // VFMSUBADD132PSZ256mk = 9358 |
| 153573 | CEFBS_None, // VFMSUBADD132PSZ256mkz = 9359 |
| 153574 | CEFBS_None, // VFMSUBADD132PSZ256r = 9360 |
| 153575 | CEFBS_None, // VFMSUBADD132PSZ256rk = 9361 |
| 153576 | CEFBS_None, // VFMSUBADD132PSZ256rkz = 9362 |
| 153577 | CEFBS_None, // VFMSUBADD132PSZm = 9363 |
| 153578 | CEFBS_None, // VFMSUBADD132PSZmb = 9364 |
| 153579 | CEFBS_None, // VFMSUBADD132PSZmbk = 9365 |
| 153580 | CEFBS_None, // VFMSUBADD132PSZmbkz = 9366 |
| 153581 | CEFBS_None, // VFMSUBADD132PSZmk = 9367 |
| 153582 | CEFBS_None, // VFMSUBADD132PSZmkz = 9368 |
| 153583 | CEFBS_None, // VFMSUBADD132PSZr = 9369 |
| 153584 | CEFBS_None, // VFMSUBADD132PSZrb = 9370 |
| 153585 | CEFBS_None, // VFMSUBADD132PSZrbk = 9371 |
| 153586 | CEFBS_None, // VFMSUBADD132PSZrbkz = 9372 |
| 153587 | CEFBS_None, // VFMSUBADD132PSZrk = 9373 |
| 153588 | CEFBS_None, // VFMSUBADD132PSZrkz = 9374 |
| 153589 | CEFBS_None, // VFMSUBADD132PSm = 9375 |
| 153590 | CEFBS_None, // VFMSUBADD132PSr = 9376 |
| 153591 | CEFBS_None, // VFMSUBADD213PDYm = 9377 |
| 153592 | CEFBS_None, // VFMSUBADD213PDYr = 9378 |
| 153593 | CEFBS_None, // VFMSUBADD213PDZ128m = 9379 |
| 153594 | CEFBS_None, // VFMSUBADD213PDZ128mb = 9380 |
| 153595 | CEFBS_None, // VFMSUBADD213PDZ128mbk = 9381 |
| 153596 | CEFBS_None, // VFMSUBADD213PDZ128mbkz = 9382 |
| 153597 | CEFBS_None, // VFMSUBADD213PDZ128mk = 9383 |
| 153598 | CEFBS_None, // VFMSUBADD213PDZ128mkz = 9384 |
| 153599 | CEFBS_None, // VFMSUBADD213PDZ128r = 9385 |
| 153600 | CEFBS_None, // VFMSUBADD213PDZ128rk = 9386 |
| 153601 | CEFBS_None, // VFMSUBADD213PDZ128rkz = 9387 |
| 153602 | CEFBS_None, // VFMSUBADD213PDZ256m = 9388 |
| 153603 | CEFBS_None, // VFMSUBADD213PDZ256mb = 9389 |
| 153604 | CEFBS_None, // VFMSUBADD213PDZ256mbk = 9390 |
| 153605 | CEFBS_None, // VFMSUBADD213PDZ256mbkz = 9391 |
| 153606 | CEFBS_None, // VFMSUBADD213PDZ256mk = 9392 |
| 153607 | CEFBS_None, // VFMSUBADD213PDZ256mkz = 9393 |
| 153608 | CEFBS_None, // VFMSUBADD213PDZ256r = 9394 |
| 153609 | CEFBS_None, // VFMSUBADD213PDZ256rk = 9395 |
| 153610 | CEFBS_None, // VFMSUBADD213PDZ256rkz = 9396 |
| 153611 | CEFBS_None, // VFMSUBADD213PDZm = 9397 |
| 153612 | CEFBS_None, // VFMSUBADD213PDZmb = 9398 |
| 153613 | CEFBS_None, // VFMSUBADD213PDZmbk = 9399 |
| 153614 | CEFBS_None, // VFMSUBADD213PDZmbkz = 9400 |
| 153615 | CEFBS_None, // VFMSUBADD213PDZmk = 9401 |
| 153616 | CEFBS_None, // VFMSUBADD213PDZmkz = 9402 |
| 153617 | CEFBS_None, // VFMSUBADD213PDZr = 9403 |
| 153618 | CEFBS_None, // VFMSUBADD213PDZrb = 9404 |
| 153619 | CEFBS_None, // VFMSUBADD213PDZrbk = 9405 |
| 153620 | CEFBS_None, // VFMSUBADD213PDZrbkz = 9406 |
| 153621 | CEFBS_None, // VFMSUBADD213PDZrk = 9407 |
| 153622 | CEFBS_None, // VFMSUBADD213PDZrkz = 9408 |
| 153623 | CEFBS_None, // VFMSUBADD213PDm = 9409 |
| 153624 | CEFBS_None, // VFMSUBADD213PDr = 9410 |
| 153625 | CEFBS_None, // VFMSUBADD213PHZ128m = 9411 |
| 153626 | CEFBS_None, // VFMSUBADD213PHZ128mb = 9412 |
| 153627 | CEFBS_None, // VFMSUBADD213PHZ128mbk = 9413 |
| 153628 | CEFBS_None, // VFMSUBADD213PHZ128mbkz = 9414 |
| 153629 | CEFBS_None, // VFMSUBADD213PHZ128mk = 9415 |
| 153630 | CEFBS_None, // VFMSUBADD213PHZ128mkz = 9416 |
| 153631 | CEFBS_None, // VFMSUBADD213PHZ128r = 9417 |
| 153632 | CEFBS_None, // VFMSUBADD213PHZ128rk = 9418 |
| 153633 | CEFBS_None, // VFMSUBADD213PHZ128rkz = 9419 |
| 153634 | CEFBS_None, // VFMSUBADD213PHZ256m = 9420 |
| 153635 | CEFBS_None, // VFMSUBADD213PHZ256mb = 9421 |
| 153636 | CEFBS_None, // VFMSUBADD213PHZ256mbk = 9422 |
| 153637 | CEFBS_None, // VFMSUBADD213PHZ256mbkz = 9423 |
| 153638 | CEFBS_None, // VFMSUBADD213PHZ256mk = 9424 |
| 153639 | CEFBS_None, // VFMSUBADD213PHZ256mkz = 9425 |
| 153640 | CEFBS_None, // VFMSUBADD213PHZ256r = 9426 |
| 153641 | CEFBS_None, // VFMSUBADD213PHZ256rk = 9427 |
| 153642 | CEFBS_None, // VFMSUBADD213PHZ256rkz = 9428 |
| 153643 | CEFBS_None, // VFMSUBADD213PHZm = 9429 |
| 153644 | CEFBS_None, // VFMSUBADD213PHZmb = 9430 |
| 153645 | CEFBS_None, // VFMSUBADD213PHZmbk = 9431 |
| 153646 | CEFBS_None, // VFMSUBADD213PHZmbkz = 9432 |
| 153647 | CEFBS_None, // VFMSUBADD213PHZmk = 9433 |
| 153648 | CEFBS_None, // VFMSUBADD213PHZmkz = 9434 |
| 153649 | CEFBS_None, // VFMSUBADD213PHZr = 9435 |
| 153650 | CEFBS_None, // VFMSUBADD213PHZrb = 9436 |
| 153651 | CEFBS_None, // VFMSUBADD213PHZrbk = 9437 |
| 153652 | CEFBS_None, // VFMSUBADD213PHZrbkz = 9438 |
| 153653 | CEFBS_None, // VFMSUBADD213PHZrk = 9439 |
| 153654 | CEFBS_None, // VFMSUBADD213PHZrkz = 9440 |
| 153655 | CEFBS_None, // VFMSUBADD213PSYm = 9441 |
| 153656 | CEFBS_None, // VFMSUBADD213PSYr = 9442 |
| 153657 | CEFBS_None, // VFMSUBADD213PSZ128m = 9443 |
| 153658 | CEFBS_None, // VFMSUBADD213PSZ128mb = 9444 |
| 153659 | CEFBS_None, // VFMSUBADD213PSZ128mbk = 9445 |
| 153660 | CEFBS_None, // VFMSUBADD213PSZ128mbkz = 9446 |
| 153661 | CEFBS_None, // VFMSUBADD213PSZ128mk = 9447 |
| 153662 | CEFBS_None, // VFMSUBADD213PSZ128mkz = 9448 |
| 153663 | CEFBS_None, // VFMSUBADD213PSZ128r = 9449 |
| 153664 | CEFBS_None, // VFMSUBADD213PSZ128rk = 9450 |
| 153665 | CEFBS_None, // VFMSUBADD213PSZ128rkz = 9451 |
| 153666 | CEFBS_None, // VFMSUBADD213PSZ256m = 9452 |
| 153667 | CEFBS_None, // VFMSUBADD213PSZ256mb = 9453 |
| 153668 | CEFBS_None, // VFMSUBADD213PSZ256mbk = 9454 |
| 153669 | CEFBS_None, // VFMSUBADD213PSZ256mbkz = 9455 |
| 153670 | CEFBS_None, // VFMSUBADD213PSZ256mk = 9456 |
| 153671 | CEFBS_None, // VFMSUBADD213PSZ256mkz = 9457 |
| 153672 | CEFBS_None, // VFMSUBADD213PSZ256r = 9458 |
| 153673 | CEFBS_None, // VFMSUBADD213PSZ256rk = 9459 |
| 153674 | CEFBS_None, // VFMSUBADD213PSZ256rkz = 9460 |
| 153675 | CEFBS_None, // VFMSUBADD213PSZm = 9461 |
| 153676 | CEFBS_None, // VFMSUBADD213PSZmb = 9462 |
| 153677 | CEFBS_None, // VFMSUBADD213PSZmbk = 9463 |
| 153678 | CEFBS_None, // VFMSUBADD213PSZmbkz = 9464 |
| 153679 | CEFBS_None, // VFMSUBADD213PSZmk = 9465 |
| 153680 | CEFBS_None, // VFMSUBADD213PSZmkz = 9466 |
| 153681 | CEFBS_None, // VFMSUBADD213PSZr = 9467 |
| 153682 | CEFBS_None, // VFMSUBADD213PSZrb = 9468 |
| 153683 | CEFBS_None, // VFMSUBADD213PSZrbk = 9469 |
| 153684 | CEFBS_None, // VFMSUBADD213PSZrbkz = 9470 |
| 153685 | CEFBS_None, // VFMSUBADD213PSZrk = 9471 |
| 153686 | CEFBS_None, // VFMSUBADD213PSZrkz = 9472 |
| 153687 | CEFBS_None, // VFMSUBADD213PSm = 9473 |
| 153688 | CEFBS_None, // VFMSUBADD213PSr = 9474 |
| 153689 | CEFBS_None, // VFMSUBADD231PDYm = 9475 |
| 153690 | CEFBS_None, // VFMSUBADD231PDYr = 9476 |
| 153691 | CEFBS_None, // VFMSUBADD231PDZ128m = 9477 |
| 153692 | CEFBS_None, // VFMSUBADD231PDZ128mb = 9478 |
| 153693 | CEFBS_None, // VFMSUBADD231PDZ128mbk = 9479 |
| 153694 | CEFBS_None, // VFMSUBADD231PDZ128mbkz = 9480 |
| 153695 | CEFBS_None, // VFMSUBADD231PDZ128mk = 9481 |
| 153696 | CEFBS_None, // VFMSUBADD231PDZ128mkz = 9482 |
| 153697 | CEFBS_None, // VFMSUBADD231PDZ128r = 9483 |
| 153698 | CEFBS_None, // VFMSUBADD231PDZ128rk = 9484 |
| 153699 | CEFBS_None, // VFMSUBADD231PDZ128rkz = 9485 |
| 153700 | CEFBS_None, // VFMSUBADD231PDZ256m = 9486 |
| 153701 | CEFBS_None, // VFMSUBADD231PDZ256mb = 9487 |
| 153702 | CEFBS_None, // VFMSUBADD231PDZ256mbk = 9488 |
| 153703 | CEFBS_None, // VFMSUBADD231PDZ256mbkz = 9489 |
| 153704 | CEFBS_None, // VFMSUBADD231PDZ256mk = 9490 |
| 153705 | CEFBS_None, // VFMSUBADD231PDZ256mkz = 9491 |
| 153706 | CEFBS_None, // VFMSUBADD231PDZ256r = 9492 |
| 153707 | CEFBS_None, // VFMSUBADD231PDZ256rk = 9493 |
| 153708 | CEFBS_None, // VFMSUBADD231PDZ256rkz = 9494 |
| 153709 | CEFBS_None, // VFMSUBADD231PDZm = 9495 |
| 153710 | CEFBS_None, // VFMSUBADD231PDZmb = 9496 |
| 153711 | CEFBS_None, // VFMSUBADD231PDZmbk = 9497 |
| 153712 | CEFBS_None, // VFMSUBADD231PDZmbkz = 9498 |
| 153713 | CEFBS_None, // VFMSUBADD231PDZmk = 9499 |
| 153714 | CEFBS_None, // VFMSUBADD231PDZmkz = 9500 |
| 153715 | CEFBS_None, // VFMSUBADD231PDZr = 9501 |
| 153716 | CEFBS_None, // VFMSUBADD231PDZrb = 9502 |
| 153717 | CEFBS_None, // VFMSUBADD231PDZrbk = 9503 |
| 153718 | CEFBS_None, // VFMSUBADD231PDZrbkz = 9504 |
| 153719 | CEFBS_None, // VFMSUBADD231PDZrk = 9505 |
| 153720 | CEFBS_None, // VFMSUBADD231PDZrkz = 9506 |
| 153721 | CEFBS_None, // VFMSUBADD231PDm = 9507 |
| 153722 | CEFBS_None, // VFMSUBADD231PDr = 9508 |
| 153723 | CEFBS_None, // VFMSUBADD231PHZ128m = 9509 |
| 153724 | CEFBS_None, // VFMSUBADD231PHZ128mb = 9510 |
| 153725 | CEFBS_None, // VFMSUBADD231PHZ128mbk = 9511 |
| 153726 | CEFBS_None, // VFMSUBADD231PHZ128mbkz = 9512 |
| 153727 | CEFBS_None, // VFMSUBADD231PHZ128mk = 9513 |
| 153728 | CEFBS_None, // VFMSUBADD231PHZ128mkz = 9514 |
| 153729 | CEFBS_None, // VFMSUBADD231PHZ128r = 9515 |
| 153730 | CEFBS_None, // VFMSUBADD231PHZ128rk = 9516 |
| 153731 | CEFBS_None, // VFMSUBADD231PHZ128rkz = 9517 |
| 153732 | CEFBS_None, // VFMSUBADD231PHZ256m = 9518 |
| 153733 | CEFBS_None, // VFMSUBADD231PHZ256mb = 9519 |
| 153734 | CEFBS_None, // VFMSUBADD231PHZ256mbk = 9520 |
| 153735 | CEFBS_None, // VFMSUBADD231PHZ256mbkz = 9521 |
| 153736 | CEFBS_None, // VFMSUBADD231PHZ256mk = 9522 |
| 153737 | CEFBS_None, // VFMSUBADD231PHZ256mkz = 9523 |
| 153738 | CEFBS_None, // VFMSUBADD231PHZ256r = 9524 |
| 153739 | CEFBS_None, // VFMSUBADD231PHZ256rk = 9525 |
| 153740 | CEFBS_None, // VFMSUBADD231PHZ256rkz = 9526 |
| 153741 | CEFBS_None, // VFMSUBADD231PHZm = 9527 |
| 153742 | CEFBS_None, // VFMSUBADD231PHZmb = 9528 |
| 153743 | CEFBS_None, // VFMSUBADD231PHZmbk = 9529 |
| 153744 | CEFBS_None, // VFMSUBADD231PHZmbkz = 9530 |
| 153745 | CEFBS_None, // VFMSUBADD231PHZmk = 9531 |
| 153746 | CEFBS_None, // VFMSUBADD231PHZmkz = 9532 |
| 153747 | CEFBS_None, // VFMSUBADD231PHZr = 9533 |
| 153748 | CEFBS_None, // VFMSUBADD231PHZrb = 9534 |
| 153749 | CEFBS_None, // VFMSUBADD231PHZrbk = 9535 |
| 153750 | CEFBS_None, // VFMSUBADD231PHZrbkz = 9536 |
| 153751 | CEFBS_None, // VFMSUBADD231PHZrk = 9537 |
| 153752 | CEFBS_None, // VFMSUBADD231PHZrkz = 9538 |
| 153753 | CEFBS_None, // VFMSUBADD231PSYm = 9539 |
| 153754 | CEFBS_None, // VFMSUBADD231PSYr = 9540 |
| 153755 | CEFBS_None, // VFMSUBADD231PSZ128m = 9541 |
| 153756 | CEFBS_None, // VFMSUBADD231PSZ128mb = 9542 |
| 153757 | CEFBS_None, // VFMSUBADD231PSZ128mbk = 9543 |
| 153758 | CEFBS_None, // VFMSUBADD231PSZ128mbkz = 9544 |
| 153759 | CEFBS_None, // VFMSUBADD231PSZ128mk = 9545 |
| 153760 | CEFBS_None, // VFMSUBADD231PSZ128mkz = 9546 |
| 153761 | CEFBS_None, // VFMSUBADD231PSZ128r = 9547 |
| 153762 | CEFBS_None, // VFMSUBADD231PSZ128rk = 9548 |
| 153763 | CEFBS_None, // VFMSUBADD231PSZ128rkz = 9549 |
| 153764 | CEFBS_None, // VFMSUBADD231PSZ256m = 9550 |
| 153765 | CEFBS_None, // VFMSUBADD231PSZ256mb = 9551 |
| 153766 | CEFBS_None, // VFMSUBADD231PSZ256mbk = 9552 |
| 153767 | CEFBS_None, // VFMSUBADD231PSZ256mbkz = 9553 |
| 153768 | CEFBS_None, // VFMSUBADD231PSZ256mk = 9554 |
| 153769 | CEFBS_None, // VFMSUBADD231PSZ256mkz = 9555 |
| 153770 | CEFBS_None, // VFMSUBADD231PSZ256r = 9556 |
| 153771 | CEFBS_None, // VFMSUBADD231PSZ256rk = 9557 |
| 153772 | CEFBS_None, // VFMSUBADD231PSZ256rkz = 9558 |
| 153773 | CEFBS_None, // VFMSUBADD231PSZm = 9559 |
| 153774 | CEFBS_None, // VFMSUBADD231PSZmb = 9560 |
| 153775 | CEFBS_None, // VFMSUBADD231PSZmbk = 9561 |
| 153776 | CEFBS_None, // VFMSUBADD231PSZmbkz = 9562 |
| 153777 | CEFBS_None, // VFMSUBADD231PSZmk = 9563 |
| 153778 | CEFBS_None, // VFMSUBADD231PSZmkz = 9564 |
| 153779 | CEFBS_None, // VFMSUBADD231PSZr = 9565 |
| 153780 | CEFBS_None, // VFMSUBADD231PSZrb = 9566 |
| 153781 | CEFBS_None, // VFMSUBADD231PSZrbk = 9567 |
| 153782 | CEFBS_None, // VFMSUBADD231PSZrbkz = 9568 |
| 153783 | CEFBS_None, // VFMSUBADD231PSZrk = 9569 |
| 153784 | CEFBS_None, // VFMSUBADD231PSZrkz = 9570 |
| 153785 | CEFBS_None, // VFMSUBADD231PSm = 9571 |
| 153786 | CEFBS_None, // VFMSUBADD231PSr = 9572 |
| 153787 | CEFBS_None, // VFMSUBADDPD4Ymr = 9573 |
| 153788 | CEFBS_None, // VFMSUBADDPD4Yrm = 9574 |
| 153789 | CEFBS_None, // VFMSUBADDPD4Yrr = 9575 |
| 153790 | CEFBS_None, // VFMSUBADDPD4Yrr_REV = 9576 |
| 153791 | CEFBS_None, // VFMSUBADDPD4mr = 9577 |
| 153792 | CEFBS_None, // VFMSUBADDPD4rm = 9578 |
| 153793 | CEFBS_None, // VFMSUBADDPD4rr = 9579 |
| 153794 | CEFBS_None, // VFMSUBADDPD4rr_REV = 9580 |
| 153795 | CEFBS_None, // VFMSUBADDPS4Ymr = 9581 |
| 153796 | CEFBS_None, // VFMSUBADDPS4Yrm = 9582 |
| 153797 | CEFBS_None, // VFMSUBADDPS4Yrr = 9583 |
| 153798 | CEFBS_None, // VFMSUBADDPS4Yrr_REV = 9584 |
| 153799 | CEFBS_None, // VFMSUBADDPS4mr = 9585 |
| 153800 | CEFBS_None, // VFMSUBADDPS4rm = 9586 |
| 153801 | CEFBS_None, // VFMSUBADDPS4rr = 9587 |
| 153802 | CEFBS_None, // VFMSUBADDPS4rr_REV = 9588 |
| 153803 | CEFBS_None, // VFMSUBPD4Ymr = 9589 |
| 153804 | CEFBS_None, // VFMSUBPD4Yrm = 9590 |
| 153805 | CEFBS_None, // VFMSUBPD4Yrr = 9591 |
| 153806 | CEFBS_None, // VFMSUBPD4Yrr_REV = 9592 |
| 153807 | CEFBS_None, // VFMSUBPD4mr = 9593 |
| 153808 | CEFBS_None, // VFMSUBPD4rm = 9594 |
| 153809 | CEFBS_None, // VFMSUBPD4rr = 9595 |
| 153810 | CEFBS_None, // VFMSUBPD4rr_REV = 9596 |
| 153811 | CEFBS_None, // VFMSUBPS4Ymr = 9597 |
| 153812 | CEFBS_None, // VFMSUBPS4Yrm = 9598 |
| 153813 | CEFBS_None, // VFMSUBPS4Yrr = 9599 |
| 153814 | CEFBS_None, // VFMSUBPS4Yrr_REV = 9600 |
| 153815 | CEFBS_None, // VFMSUBPS4mr = 9601 |
| 153816 | CEFBS_None, // VFMSUBPS4rm = 9602 |
| 153817 | CEFBS_None, // VFMSUBPS4rr = 9603 |
| 153818 | CEFBS_None, // VFMSUBPS4rr_REV = 9604 |
| 153819 | CEFBS_None, // VFMSUBSD4mr = 9605 |
| 153820 | CEFBS_None, // VFMSUBSD4mr_Int = 9606 |
| 153821 | CEFBS_None, // VFMSUBSD4rm = 9607 |
| 153822 | CEFBS_None, // VFMSUBSD4rm_Int = 9608 |
| 153823 | CEFBS_None, // VFMSUBSD4rr = 9609 |
| 153824 | CEFBS_None, // VFMSUBSD4rr_Int = 9610 |
| 153825 | CEFBS_None, // VFMSUBSD4rr_Int_REV = 9611 |
| 153826 | CEFBS_None, // VFMSUBSD4rr_REV = 9612 |
| 153827 | CEFBS_None, // VFMSUBSS4mr = 9613 |
| 153828 | CEFBS_None, // VFMSUBSS4mr_Int = 9614 |
| 153829 | CEFBS_None, // VFMSUBSS4rm = 9615 |
| 153830 | CEFBS_None, // VFMSUBSS4rm_Int = 9616 |
| 153831 | CEFBS_None, // VFMSUBSS4rr = 9617 |
| 153832 | CEFBS_None, // VFMSUBSS4rr_Int = 9618 |
| 153833 | CEFBS_None, // VFMSUBSS4rr_Int_REV = 9619 |
| 153834 | CEFBS_None, // VFMSUBSS4rr_REV = 9620 |
| 153835 | CEFBS_None, // VFMULCPHZ128rm = 9621 |
| 153836 | CEFBS_None, // VFMULCPHZ128rmb = 9622 |
| 153837 | CEFBS_None, // VFMULCPHZ128rmbk = 9623 |
| 153838 | CEFBS_None, // VFMULCPHZ128rmbkz = 9624 |
| 153839 | CEFBS_None, // VFMULCPHZ128rmk = 9625 |
| 153840 | CEFBS_None, // VFMULCPHZ128rmkz = 9626 |
| 153841 | CEFBS_None, // VFMULCPHZ128rr = 9627 |
| 153842 | CEFBS_None, // VFMULCPHZ128rrk = 9628 |
| 153843 | CEFBS_None, // VFMULCPHZ128rrkz = 9629 |
| 153844 | CEFBS_None, // VFMULCPHZ256rm = 9630 |
| 153845 | CEFBS_None, // VFMULCPHZ256rmb = 9631 |
| 153846 | CEFBS_None, // VFMULCPHZ256rmbk = 9632 |
| 153847 | CEFBS_None, // VFMULCPHZ256rmbkz = 9633 |
| 153848 | CEFBS_None, // VFMULCPHZ256rmk = 9634 |
| 153849 | CEFBS_None, // VFMULCPHZ256rmkz = 9635 |
| 153850 | CEFBS_None, // VFMULCPHZ256rr = 9636 |
| 153851 | CEFBS_None, // VFMULCPHZ256rrk = 9637 |
| 153852 | CEFBS_None, // VFMULCPHZ256rrkz = 9638 |
| 153853 | CEFBS_None, // VFMULCPHZrm = 9639 |
| 153854 | CEFBS_None, // VFMULCPHZrmb = 9640 |
| 153855 | CEFBS_None, // VFMULCPHZrmbk = 9641 |
| 153856 | CEFBS_None, // VFMULCPHZrmbkz = 9642 |
| 153857 | CEFBS_None, // VFMULCPHZrmk = 9643 |
| 153858 | CEFBS_None, // VFMULCPHZrmkz = 9644 |
| 153859 | CEFBS_None, // VFMULCPHZrr = 9645 |
| 153860 | CEFBS_None, // VFMULCPHZrrb = 9646 |
| 153861 | CEFBS_None, // VFMULCPHZrrbk = 9647 |
| 153862 | CEFBS_None, // VFMULCPHZrrbkz = 9648 |
| 153863 | CEFBS_None, // VFMULCPHZrrk = 9649 |
| 153864 | CEFBS_None, // VFMULCPHZrrkz = 9650 |
| 153865 | CEFBS_None, // VFMULCSHZrm = 9651 |
| 153866 | CEFBS_None, // VFMULCSHZrmk = 9652 |
| 153867 | CEFBS_None, // VFMULCSHZrmkz = 9653 |
| 153868 | CEFBS_None, // VFMULCSHZrr = 9654 |
| 153869 | CEFBS_None, // VFMULCSHZrrb = 9655 |
| 153870 | CEFBS_None, // VFMULCSHZrrbk = 9656 |
| 153871 | CEFBS_None, // VFMULCSHZrrbkz = 9657 |
| 153872 | CEFBS_None, // VFMULCSHZrrk = 9658 |
| 153873 | CEFBS_None, // VFMULCSHZrrkz = 9659 |
| 153874 | CEFBS_None, // VFNMADD132PDYm = 9660 |
| 153875 | CEFBS_None, // VFNMADD132PDYr = 9661 |
| 153876 | CEFBS_None, // VFNMADD132PDZ128m = 9662 |
| 153877 | CEFBS_None, // VFNMADD132PDZ128mb = 9663 |
| 153878 | CEFBS_None, // VFNMADD132PDZ128mbk = 9664 |
| 153879 | CEFBS_None, // VFNMADD132PDZ128mbkz = 9665 |
| 153880 | CEFBS_None, // VFNMADD132PDZ128mk = 9666 |
| 153881 | CEFBS_None, // VFNMADD132PDZ128mkz = 9667 |
| 153882 | CEFBS_None, // VFNMADD132PDZ128r = 9668 |
| 153883 | CEFBS_None, // VFNMADD132PDZ128rk = 9669 |
| 153884 | CEFBS_None, // VFNMADD132PDZ128rkz = 9670 |
| 153885 | CEFBS_None, // VFNMADD132PDZ256m = 9671 |
| 153886 | CEFBS_None, // VFNMADD132PDZ256mb = 9672 |
| 153887 | CEFBS_None, // VFNMADD132PDZ256mbk = 9673 |
| 153888 | CEFBS_None, // VFNMADD132PDZ256mbkz = 9674 |
| 153889 | CEFBS_None, // VFNMADD132PDZ256mk = 9675 |
| 153890 | CEFBS_None, // VFNMADD132PDZ256mkz = 9676 |
| 153891 | CEFBS_None, // VFNMADD132PDZ256r = 9677 |
| 153892 | CEFBS_None, // VFNMADD132PDZ256rk = 9678 |
| 153893 | CEFBS_None, // VFNMADD132PDZ256rkz = 9679 |
| 153894 | CEFBS_None, // VFNMADD132PDZm = 9680 |
| 153895 | CEFBS_None, // VFNMADD132PDZmb = 9681 |
| 153896 | CEFBS_None, // VFNMADD132PDZmbk = 9682 |
| 153897 | CEFBS_None, // VFNMADD132PDZmbkz = 9683 |
| 153898 | CEFBS_None, // VFNMADD132PDZmk = 9684 |
| 153899 | CEFBS_None, // VFNMADD132PDZmkz = 9685 |
| 153900 | CEFBS_None, // VFNMADD132PDZr = 9686 |
| 153901 | CEFBS_None, // VFNMADD132PDZrb = 9687 |
| 153902 | CEFBS_None, // VFNMADD132PDZrbk = 9688 |
| 153903 | CEFBS_None, // VFNMADD132PDZrbkz = 9689 |
| 153904 | CEFBS_None, // VFNMADD132PDZrk = 9690 |
| 153905 | CEFBS_None, // VFNMADD132PDZrkz = 9691 |
| 153906 | CEFBS_None, // VFNMADD132PDm = 9692 |
| 153907 | CEFBS_None, // VFNMADD132PDr = 9693 |
| 153908 | CEFBS_None, // VFNMADD132PHZ128m = 9694 |
| 153909 | CEFBS_None, // VFNMADD132PHZ128mb = 9695 |
| 153910 | CEFBS_None, // VFNMADD132PHZ128mbk = 9696 |
| 153911 | CEFBS_None, // VFNMADD132PHZ128mbkz = 9697 |
| 153912 | CEFBS_None, // VFNMADD132PHZ128mk = 9698 |
| 153913 | CEFBS_None, // VFNMADD132PHZ128mkz = 9699 |
| 153914 | CEFBS_None, // VFNMADD132PHZ128r = 9700 |
| 153915 | CEFBS_None, // VFNMADD132PHZ128rk = 9701 |
| 153916 | CEFBS_None, // VFNMADD132PHZ128rkz = 9702 |
| 153917 | CEFBS_None, // VFNMADD132PHZ256m = 9703 |
| 153918 | CEFBS_None, // VFNMADD132PHZ256mb = 9704 |
| 153919 | CEFBS_None, // VFNMADD132PHZ256mbk = 9705 |
| 153920 | CEFBS_None, // VFNMADD132PHZ256mbkz = 9706 |
| 153921 | CEFBS_None, // VFNMADD132PHZ256mk = 9707 |
| 153922 | CEFBS_None, // VFNMADD132PHZ256mkz = 9708 |
| 153923 | CEFBS_None, // VFNMADD132PHZ256r = 9709 |
| 153924 | CEFBS_None, // VFNMADD132PHZ256rk = 9710 |
| 153925 | CEFBS_None, // VFNMADD132PHZ256rkz = 9711 |
| 153926 | CEFBS_None, // VFNMADD132PHZm = 9712 |
| 153927 | CEFBS_None, // VFNMADD132PHZmb = 9713 |
| 153928 | CEFBS_None, // VFNMADD132PHZmbk = 9714 |
| 153929 | CEFBS_None, // VFNMADD132PHZmbkz = 9715 |
| 153930 | CEFBS_None, // VFNMADD132PHZmk = 9716 |
| 153931 | CEFBS_None, // VFNMADD132PHZmkz = 9717 |
| 153932 | CEFBS_None, // VFNMADD132PHZr = 9718 |
| 153933 | CEFBS_None, // VFNMADD132PHZrb = 9719 |
| 153934 | CEFBS_None, // VFNMADD132PHZrbk = 9720 |
| 153935 | CEFBS_None, // VFNMADD132PHZrbkz = 9721 |
| 153936 | CEFBS_None, // VFNMADD132PHZrk = 9722 |
| 153937 | CEFBS_None, // VFNMADD132PHZrkz = 9723 |
| 153938 | CEFBS_None, // VFNMADD132PSYm = 9724 |
| 153939 | CEFBS_None, // VFNMADD132PSYr = 9725 |
| 153940 | CEFBS_None, // VFNMADD132PSZ128m = 9726 |
| 153941 | CEFBS_None, // VFNMADD132PSZ128mb = 9727 |
| 153942 | CEFBS_None, // VFNMADD132PSZ128mbk = 9728 |
| 153943 | CEFBS_None, // VFNMADD132PSZ128mbkz = 9729 |
| 153944 | CEFBS_None, // VFNMADD132PSZ128mk = 9730 |
| 153945 | CEFBS_None, // VFNMADD132PSZ128mkz = 9731 |
| 153946 | CEFBS_None, // VFNMADD132PSZ128r = 9732 |
| 153947 | CEFBS_None, // VFNMADD132PSZ128rk = 9733 |
| 153948 | CEFBS_None, // VFNMADD132PSZ128rkz = 9734 |
| 153949 | CEFBS_None, // VFNMADD132PSZ256m = 9735 |
| 153950 | CEFBS_None, // VFNMADD132PSZ256mb = 9736 |
| 153951 | CEFBS_None, // VFNMADD132PSZ256mbk = 9737 |
| 153952 | CEFBS_None, // VFNMADD132PSZ256mbkz = 9738 |
| 153953 | CEFBS_None, // VFNMADD132PSZ256mk = 9739 |
| 153954 | CEFBS_None, // VFNMADD132PSZ256mkz = 9740 |
| 153955 | CEFBS_None, // VFNMADD132PSZ256r = 9741 |
| 153956 | CEFBS_None, // VFNMADD132PSZ256rk = 9742 |
| 153957 | CEFBS_None, // VFNMADD132PSZ256rkz = 9743 |
| 153958 | CEFBS_None, // VFNMADD132PSZm = 9744 |
| 153959 | CEFBS_None, // VFNMADD132PSZmb = 9745 |
| 153960 | CEFBS_None, // VFNMADD132PSZmbk = 9746 |
| 153961 | CEFBS_None, // VFNMADD132PSZmbkz = 9747 |
| 153962 | CEFBS_None, // VFNMADD132PSZmk = 9748 |
| 153963 | CEFBS_None, // VFNMADD132PSZmkz = 9749 |
| 153964 | CEFBS_None, // VFNMADD132PSZr = 9750 |
| 153965 | CEFBS_None, // VFNMADD132PSZrb = 9751 |
| 153966 | CEFBS_None, // VFNMADD132PSZrbk = 9752 |
| 153967 | CEFBS_None, // VFNMADD132PSZrbkz = 9753 |
| 153968 | CEFBS_None, // VFNMADD132PSZrk = 9754 |
| 153969 | CEFBS_None, // VFNMADD132PSZrkz = 9755 |
| 153970 | CEFBS_None, // VFNMADD132PSm = 9756 |
| 153971 | CEFBS_None, // VFNMADD132PSr = 9757 |
| 153972 | CEFBS_None, // VFNMADD132SDZm = 9758 |
| 153973 | CEFBS_None, // VFNMADD132SDZm_Int = 9759 |
| 153974 | CEFBS_None, // VFNMADD132SDZm_Intk = 9760 |
| 153975 | CEFBS_None, // VFNMADD132SDZm_Intkz = 9761 |
| 153976 | CEFBS_None, // VFNMADD132SDZr = 9762 |
| 153977 | CEFBS_None, // VFNMADD132SDZr_Int = 9763 |
| 153978 | CEFBS_None, // VFNMADD132SDZr_Intk = 9764 |
| 153979 | CEFBS_None, // VFNMADD132SDZr_Intkz = 9765 |
| 153980 | CEFBS_None, // VFNMADD132SDZrb = 9766 |
| 153981 | CEFBS_None, // VFNMADD132SDZrb_Int = 9767 |
| 153982 | CEFBS_None, // VFNMADD132SDZrb_Intk = 9768 |
| 153983 | CEFBS_None, // VFNMADD132SDZrb_Intkz = 9769 |
| 153984 | CEFBS_None, // VFNMADD132SDm = 9770 |
| 153985 | CEFBS_None, // VFNMADD132SDm_Int = 9771 |
| 153986 | CEFBS_None, // VFNMADD132SDr = 9772 |
| 153987 | CEFBS_None, // VFNMADD132SDr_Int = 9773 |
| 153988 | CEFBS_None, // VFNMADD132SHZm = 9774 |
| 153989 | CEFBS_None, // VFNMADD132SHZm_Int = 9775 |
| 153990 | CEFBS_None, // VFNMADD132SHZm_Intk = 9776 |
| 153991 | CEFBS_None, // VFNMADD132SHZm_Intkz = 9777 |
| 153992 | CEFBS_None, // VFNMADD132SHZr = 9778 |
| 153993 | CEFBS_None, // VFNMADD132SHZr_Int = 9779 |
| 153994 | CEFBS_None, // VFNMADD132SHZr_Intk = 9780 |
| 153995 | CEFBS_None, // VFNMADD132SHZr_Intkz = 9781 |
| 153996 | CEFBS_None, // VFNMADD132SHZrb = 9782 |
| 153997 | CEFBS_None, // VFNMADD132SHZrb_Int = 9783 |
| 153998 | CEFBS_None, // VFNMADD132SHZrb_Intk = 9784 |
| 153999 | CEFBS_None, // VFNMADD132SHZrb_Intkz = 9785 |
| 154000 | CEFBS_None, // VFNMADD132SSZm = 9786 |
| 154001 | CEFBS_None, // VFNMADD132SSZm_Int = 9787 |
| 154002 | CEFBS_None, // VFNMADD132SSZm_Intk = 9788 |
| 154003 | CEFBS_None, // VFNMADD132SSZm_Intkz = 9789 |
| 154004 | CEFBS_None, // VFNMADD132SSZr = 9790 |
| 154005 | CEFBS_None, // VFNMADD132SSZr_Int = 9791 |
| 154006 | CEFBS_None, // VFNMADD132SSZr_Intk = 9792 |
| 154007 | CEFBS_None, // VFNMADD132SSZr_Intkz = 9793 |
| 154008 | CEFBS_None, // VFNMADD132SSZrb = 9794 |
| 154009 | CEFBS_None, // VFNMADD132SSZrb_Int = 9795 |
| 154010 | CEFBS_None, // VFNMADD132SSZrb_Intk = 9796 |
| 154011 | CEFBS_None, // VFNMADD132SSZrb_Intkz = 9797 |
| 154012 | CEFBS_None, // VFNMADD132SSm = 9798 |
| 154013 | CEFBS_None, // VFNMADD132SSm_Int = 9799 |
| 154014 | CEFBS_None, // VFNMADD132SSr = 9800 |
| 154015 | CEFBS_None, // VFNMADD132SSr_Int = 9801 |
| 154016 | CEFBS_None, // VFNMADD213PDYm = 9802 |
| 154017 | CEFBS_None, // VFNMADD213PDYr = 9803 |
| 154018 | CEFBS_None, // VFNMADD213PDZ128m = 9804 |
| 154019 | CEFBS_None, // VFNMADD213PDZ128mb = 9805 |
| 154020 | CEFBS_None, // VFNMADD213PDZ128mbk = 9806 |
| 154021 | CEFBS_None, // VFNMADD213PDZ128mbkz = 9807 |
| 154022 | CEFBS_None, // VFNMADD213PDZ128mk = 9808 |
| 154023 | CEFBS_None, // VFNMADD213PDZ128mkz = 9809 |
| 154024 | CEFBS_None, // VFNMADD213PDZ128r = 9810 |
| 154025 | CEFBS_None, // VFNMADD213PDZ128rk = 9811 |
| 154026 | CEFBS_None, // VFNMADD213PDZ128rkz = 9812 |
| 154027 | CEFBS_None, // VFNMADD213PDZ256m = 9813 |
| 154028 | CEFBS_None, // VFNMADD213PDZ256mb = 9814 |
| 154029 | CEFBS_None, // VFNMADD213PDZ256mbk = 9815 |
| 154030 | CEFBS_None, // VFNMADD213PDZ256mbkz = 9816 |
| 154031 | CEFBS_None, // VFNMADD213PDZ256mk = 9817 |
| 154032 | CEFBS_None, // VFNMADD213PDZ256mkz = 9818 |
| 154033 | CEFBS_None, // VFNMADD213PDZ256r = 9819 |
| 154034 | CEFBS_None, // VFNMADD213PDZ256rk = 9820 |
| 154035 | CEFBS_None, // VFNMADD213PDZ256rkz = 9821 |
| 154036 | CEFBS_None, // VFNMADD213PDZm = 9822 |
| 154037 | CEFBS_None, // VFNMADD213PDZmb = 9823 |
| 154038 | CEFBS_None, // VFNMADD213PDZmbk = 9824 |
| 154039 | CEFBS_None, // VFNMADD213PDZmbkz = 9825 |
| 154040 | CEFBS_None, // VFNMADD213PDZmk = 9826 |
| 154041 | CEFBS_None, // VFNMADD213PDZmkz = 9827 |
| 154042 | CEFBS_None, // VFNMADD213PDZr = 9828 |
| 154043 | CEFBS_None, // VFNMADD213PDZrb = 9829 |
| 154044 | CEFBS_None, // VFNMADD213PDZrbk = 9830 |
| 154045 | CEFBS_None, // VFNMADD213PDZrbkz = 9831 |
| 154046 | CEFBS_None, // VFNMADD213PDZrk = 9832 |
| 154047 | CEFBS_None, // VFNMADD213PDZrkz = 9833 |
| 154048 | CEFBS_None, // VFNMADD213PDm = 9834 |
| 154049 | CEFBS_None, // VFNMADD213PDr = 9835 |
| 154050 | CEFBS_None, // VFNMADD213PHZ128m = 9836 |
| 154051 | CEFBS_None, // VFNMADD213PHZ128mb = 9837 |
| 154052 | CEFBS_None, // VFNMADD213PHZ128mbk = 9838 |
| 154053 | CEFBS_None, // VFNMADD213PHZ128mbkz = 9839 |
| 154054 | CEFBS_None, // VFNMADD213PHZ128mk = 9840 |
| 154055 | CEFBS_None, // VFNMADD213PHZ128mkz = 9841 |
| 154056 | CEFBS_None, // VFNMADD213PHZ128r = 9842 |
| 154057 | CEFBS_None, // VFNMADD213PHZ128rk = 9843 |
| 154058 | CEFBS_None, // VFNMADD213PHZ128rkz = 9844 |
| 154059 | CEFBS_None, // VFNMADD213PHZ256m = 9845 |
| 154060 | CEFBS_None, // VFNMADD213PHZ256mb = 9846 |
| 154061 | CEFBS_None, // VFNMADD213PHZ256mbk = 9847 |
| 154062 | CEFBS_None, // VFNMADD213PHZ256mbkz = 9848 |
| 154063 | CEFBS_None, // VFNMADD213PHZ256mk = 9849 |
| 154064 | CEFBS_None, // VFNMADD213PHZ256mkz = 9850 |
| 154065 | CEFBS_None, // VFNMADD213PHZ256r = 9851 |
| 154066 | CEFBS_None, // VFNMADD213PHZ256rk = 9852 |
| 154067 | CEFBS_None, // VFNMADD213PHZ256rkz = 9853 |
| 154068 | CEFBS_None, // VFNMADD213PHZm = 9854 |
| 154069 | CEFBS_None, // VFNMADD213PHZmb = 9855 |
| 154070 | CEFBS_None, // VFNMADD213PHZmbk = 9856 |
| 154071 | CEFBS_None, // VFNMADD213PHZmbkz = 9857 |
| 154072 | CEFBS_None, // VFNMADD213PHZmk = 9858 |
| 154073 | CEFBS_None, // VFNMADD213PHZmkz = 9859 |
| 154074 | CEFBS_None, // VFNMADD213PHZr = 9860 |
| 154075 | CEFBS_None, // VFNMADD213PHZrb = 9861 |
| 154076 | CEFBS_None, // VFNMADD213PHZrbk = 9862 |
| 154077 | CEFBS_None, // VFNMADD213PHZrbkz = 9863 |
| 154078 | CEFBS_None, // VFNMADD213PHZrk = 9864 |
| 154079 | CEFBS_None, // VFNMADD213PHZrkz = 9865 |
| 154080 | CEFBS_None, // VFNMADD213PSYm = 9866 |
| 154081 | CEFBS_None, // VFNMADD213PSYr = 9867 |
| 154082 | CEFBS_None, // VFNMADD213PSZ128m = 9868 |
| 154083 | CEFBS_None, // VFNMADD213PSZ128mb = 9869 |
| 154084 | CEFBS_None, // VFNMADD213PSZ128mbk = 9870 |
| 154085 | CEFBS_None, // VFNMADD213PSZ128mbkz = 9871 |
| 154086 | CEFBS_None, // VFNMADD213PSZ128mk = 9872 |
| 154087 | CEFBS_None, // VFNMADD213PSZ128mkz = 9873 |
| 154088 | CEFBS_None, // VFNMADD213PSZ128r = 9874 |
| 154089 | CEFBS_None, // VFNMADD213PSZ128rk = 9875 |
| 154090 | CEFBS_None, // VFNMADD213PSZ128rkz = 9876 |
| 154091 | CEFBS_None, // VFNMADD213PSZ256m = 9877 |
| 154092 | CEFBS_None, // VFNMADD213PSZ256mb = 9878 |
| 154093 | CEFBS_None, // VFNMADD213PSZ256mbk = 9879 |
| 154094 | CEFBS_None, // VFNMADD213PSZ256mbkz = 9880 |
| 154095 | CEFBS_None, // VFNMADD213PSZ256mk = 9881 |
| 154096 | CEFBS_None, // VFNMADD213PSZ256mkz = 9882 |
| 154097 | CEFBS_None, // VFNMADD213PSZ256r = 9883 |
| 154098 | CEFBS_None, // VFNMADD213PSZ256rk = 9884 |
| 154099 | CEFBS_None, // VFNMADD213PSZ256rkz = 9885 |
| 154100 | CEFBS_None, // VFNMADD213PSZm = 9886 |
| 154101 | CEFBS_None, // VFNMADD213PSZmb = 9887 |
| 154102 | CEFBS_None, // VFNMADD213PSZmbk = 9888 |
| 154103 | CEFBS_None, // VFNMADD213PSZmbkz = 9889 |
| 154104 | CEFBS_None, // VFNMADD213PSZmk = 9890 |
| 154105 | CEFBS_None, // VFNMADD213PSZmkz = 9891 |
| 154106 | CEFBS_None, // VFNMADD213PSZr = 9892 |
| 154107 | CEFBS_None, // VFNMADD213PSZrb = 9893 |
| 154108 | CEFBS_None, // VFNMADD213PSZrbk = 9894 |
| 154109 | CEFBS_None, // VFNMADD213PSZrbkz = 9895 |
| 154110 | CEFBS_None, // VFNMADD213PSZrk = 9896 |
| 154111 | CEFBS_None, // VFNMADD213PSZrkz = 9897 |
| 154112 | CEFBS_None, // VFNMADD213PSm = 9898 |
| 154113 | CEFBS_None, // VFNMADD213PSr = 9899 |
| 154114 | CEFBS_None, // VFNMADD213SDZm = 9900 |
| 154115 | CEFBS_None, // VFNMADD213SDZm_Int = 9901 |
| 154116 | CEFBS_None, // VFNMADD213SDZm_Intk = 9902 |
| 154117 | CEFBS_None, // VFNMADD213SDZm_Intkz = 9903 |
| 154118 | CEFBS_None, // VFNMADD213SDZr = 9904 |
| 154119 | CEFBS_None, // VFNMADD213SDZr_Int = 9905 |
| 154120 | CEFBS_None, // VFNMADD213SDZr_Intk = 9906 |
| 154121 | CEFBS_None, // VFNMADD213SDZr_Intkz = 9907 |
| 154122 | CEFBS_None, // VFNMADD213SDZrb = 9908 |
| 154123 | CEFBS_None, // VFNMADD213SDZrb_Int = 9909 |
| 154124 | CEFBS_None, // VFNMADD213SDZrb_Intk = 9910 |
| 154125 | CEFBS_None, // VFNMADD213SDZrb_Intkz = 9911 |
| 154126 | CEFBS_None, // VFNMADD213SDm = 9912 |
| 154127 | CEFBS_None, // VFNMADD213SDm_Int = 9913 |
| 154128 | CEFBS_None, // VFNMADD213SDr = 9914 |
| 154129 | CEFBS_None, // VFNMADD213SDr_Int = 9915 |
| 154130 | CEFBS_None, // VFNMADD213SHZm = 9916 |
| 154131 | CEFBS_None, // VFNMADD213SHZm_Int = 9917 |
| 154132 | CEFBS_None, // VFNMADD213SHZm_Intk = 9918 |
| 154133 | CEFBS_None, // VFNMADD213SHZm_Intkz = 9919 |
| 154134 | CEFBS_None, // VFNMADD213SHZr = 9920 |
| 154135 | CEFBS_None, // VFNMADD213SHZr_Int = 9921 |
| 154136 | CEFBS_None, // VFNMADD213SHZr_Intk = 9922 |
| 154137 | CEFBS_None, // VFNMADD213SHZr_Intkz = 9923 |
| 154138 | CEFBS_None, // VFNMADD213SHZrb = 9924 |
| 154139 | CEFBS_None, // VFNMADD213SHZrb_Int = 9925 |
| 154140 | CEFBS_None, // VFNMADD213SHZrb_Intk = 9926 |
| 154141 | CEFBS_None, // VFNMADD213SHZrb_Intkz = 9927 |
| 154142 | CEFBS_None, // VFNMADD213SSZm = 9928 |
| 154143 | CEFBS_None, // VFNMADD213SSZm_Int = 9929 |
| 154144 | CEFBS_None, // VFNMADD213SSZm_Intk = 9930 |
| 154145 | CEFBS_None, // VFNMADD213SSZm_Intkz = 9931 |
| 154146 | CEFBS_None, // VFNMADD213SSZr = 9932 |
| 154147 | CEFBS_None, // VFNMADD213SSZr_Int = 9933 |
| 154148 | CEFBS_None, // VFNMADD213SSZr_Intk = 9934 |
| 154149 | CEFBS_None, // VFNMADD213SSZr_Intkz = 9935 |
| 154150 | CEFBS_None, // VFNMADD213SSZrb = 9936 |
| 154151 | CEFBS_None, // VFNMADD213SSZrb_Int = 9937 |
| 154152 | CEFBS_None, // VFNMADD213SSZrb_Intk = 9938 |
| 154153 | CEFBS_None, // VFNMADD213SSZrb_Intkz = 9939 |
| 154154 | CEFBS_None, // VFNMADD213SSm = 9940 |
| 154155 | CEFBS_None, // VFNMADD213SSm_Int = 9941 |
| 154156 | CEFBS_None, // VFNMADD213SSr = 9942 |
| 154157 | CEFBS_None, // VFNMADD213SSr_Int = 9943 |
| 154158 | CEFBS_None, // VFNMADD231PDYm = 9944 |
| 154159 | CEFBS_None, // VFNMADD231PDYr = 9945 |
| 154160 | CEFBS_None, // VFNMADD231PDZ128m = 9946 |
| 154161 | CEFBS_None, // VFNMADD231PDZ128mb = 9947 |
| 154162 | CEFBS_None, // VFNMADD231PDZ128mbk = 9948 |
| 154163 | CEFBS_None, // VFNMADD231PDZ128mbkz = 9949 |
| 154164 | CEFBS_None, // VFNMADD231PDZ128mk = 9950 |
| 154165 | CEFBS_None, // VFNMADD231PDZ128mkz = 9951 |
| 154166 | CEFBS_None, // VFNMADD231PDZ128r = 9952 |
| 154167 | CEFBS_None, // VFNMADD231PDZ128rk = 9953 |
| 154168 | CEFBS_None, // VFNMADD231PDZ128rkz = 9954 |
| 154169 | CEFBS_None, // VFNMADD231PDZ256m = 9955 |
| 154170 | CEFBS_None, // VFNMADD231PDZ256mb = 9956 |
| 154171 | CEFBS_None, // VFNMADD231PDZ256mbk = 9957 |
| 154172 | CEFBS_None, // VFNMADD231PDZ256mbkz = 9958 |
| 154173 | CEFBS_None, // VFNMADD231PDZ256mk = 9959 |
| 154174 | CEFBS_None, // VFNMADD231PDZ256mkz = 9960 |
| 154175 | CEFBS_None, // VFNMADD231PDZ256r = 9961 |
| 154176 | CEFBS_None, // VFNMADD231PDZ256rk = 9962 |
| 154177 | CEFBS_None, // VFNMADD231PDZ256rkz = 9963 |
| 154178 | CEFBS_None, // VFNMADD231PDZm = 9964 |
| 154179 | CEFBS_None, // VFNMADD231PDZmb = 9965 |
| 154180 | CEFBS_None, // VFNMADD231PDZmbk = 9966 |
| 154181 | CEFBS_None, // VFNMADD231PDZmbkz = 9967 |
| 154182 | CEFBS_None, // VFNMADD231PDZmk = 9968 |
| 154183 | CEFBS_None, // VFNMADD231PDZmkz = 9969 |
| 154184 | CEFBS_None, // VFNMADD231PDZr = 9970 |
| 154185 | CEFBS_None, // VFNMADD231PDZrb = 9971 |
| 154186 | CEFBS_None, // VFNMADD231PDZrbk = 9972 |
| 154187 | CEFBS_None, // VFNMADD231PDZrbkz = 9973 |
| 154188 | CEFBS_None, // VFNMADD231PDZrk = 9974 |
| 154189 | CEFBS_None, // VFNMADD231PDZrkz = 9975 |
| 154190 | CEFBS_None, // VFNMADD231PDm = 9976 |
| 154191 | CEFBS_None, // VFNMADD231PDr = 9977 |
| 154192 | CEFBS_None, // VFNMADD231PHZ128m = 9978 |
| 154193 | CEFBS_None, // VFNMADD231PHZ128mb = 9979 |
| 154194 | CEFBS_None, // VFNMADD231PHZ128mbk = 9980 |
| 154195 | CEFBS_None, // VFNMADD231PHZ128mbkz = 9981 |
| 154196 | CEFBS_None, // VFNMADD231PHZ128mk = 9982 |
| 154197 | CEFBS_None, // VFNMADD231PHZ128mkz = 9983 |
| 154198 | CEFBS_None, // VFNMADD231PHZ128r = 9984 |
| 154199 | CEFBS_None, // VFNMADD231PHZ128rk = 9985 |
| 154200 | CEFBS_None, // VFNMADD231PHZ128rkz = 9986 |
| 154201 | CEFBS_None, // VFNMADD231PHZ256m = 9987 |
| 154202 | CEFBS_None, // VFNMADD231PHZ256mb = 9988 |
| 154203 | CEFBS_None, // VFNMADD231PHZ256mbk = 9989 |
| 154204 | CEFBS_None, // VFNMADD231PHZ256mbkz = 9990 |
| 154205 | CEFBS_None, // VFNMADD231PHZ256mk = 9991 |
| 154206 | CEFBS_None, // VFNMADD231PHZ256mkz = 9992 |
| 154207 | CEFBS_None, // VFNMADD231PHZ256r = 9993 |
| 154208 | CEFBS_None, // VFNMADD231PHZ256rk = 9994 |
| 154209 | CEFBS_None, // VFNMADD231PHZ256rkz = 9995 |
| 154210 | CEFBS_None, // VFNMADD231PHZm = 9996 |
| 154211 | CEFBS_None, // VFNMADD231PHZmb = 9997 |
| 154212 | CEFBS_None, // VFNMADD231PHZmbk = 9998 |
| 154213 | CEFBS_None, // VFNMADD231PHZmbkz = 9999 |
| 154214 | CEFBS_None, // VFNMADD231PHZmk = 10000 |
| 154215 | CEFBS_None, // VFNMADD231PHZmkz = 10001 |
| 154216 | CEFBS_None, // VFNMADD231PHZr = 10002 |
| 154217 | CEFBS_None, // VFNMADD231PHZrb = 10003 |
| 154218 | CEFBS_None, // VFNMADD231PHZrbk = 10004 |
| 154219 | CEFBS_None, // VFNMADD231PHZrbkz = 10005 |
| 154220 | CEFBS_None, // VFNMADD231PHZrk = 10006 |
| 154221 | CEFBS_None, // VFNMADD231PHZrkz = 10007 |
| 154222 | CEFBS_None, // VFNMADD231PSYm = 10008 |
| 154223 | CEFBS_None, // VFNMADD231PSYr = 10009 |
| 154224 | CEFBS_None, // VFNMADD231PSZ128m = 10010 |
| 154225 | CEFBS_None, // VFNMADD231PSZ128mb = 10011 |
| 154226 | CEFBS_None, // VFNMADD231PSZ128mbk = 10012 |
| 154227 | CEFBS_None, // VFNMADD231PSZ128mbkz = 10013 |
| 154228 | CEFBS_None, // VFNMADD231PSZ128mk = 10014 |
| 154229 | CEFBS_None, // VFNMADD231PSZ128mkz = 10015 |
| 154230 | CEFBS_None, // VFNMADD231PSZ128r = 10016 |
| 154231 | CEFBS_None, // VFNMADD231PSZ128rk = 10017 |
| 154232 | CEFBS_None, // VFNMADD231PSZ128rkz = 10018 |
| 154233 | CEFBS_None, // VFNMADD231PSZ256m = 10019 |
| 154234 | CEFBS_None, // VFNMADD231PSZ256mb = 10020 |
| 154235 | CEFBS_None, // VFNMADD231PSZ256mbk = 10021 |
| 154236 | CEFBS_None, // VFNMADD231PSZ256mbkz = 10022 |
| 154237 | CEFBS_None, // VFNMADD231PSZ256mk = 10023 |
| 154238 | CEFBS_None, // VFNMADD231PSZ256mkz = 10024 |
| 154239 | CEFBS_None, // VFNMADD231PSZ256r = 10025 |
| 154240 | CEFBS_None, // VFNMADD231PSZ256rk = 10026 |
| 154241 | CEFBS_None, // VFNMADD231PSZ256rkz = 10027 |
| 154242 | CEFBS_None, // VFNMADD231PSZm = 10028 |
| 154243 | CEFBS_None, // VFNMADD231PSZmb = 10029 |
| 154244 | CEFBS_None, // VFNMADD231PSZmbk = 10030 |
| 154245 | CEFBS_None, // VFNMADD231PSZmbkz = 10031 |
| 154246 | CEFBS_None, // VFNMADD231PSZmk = 10032 |
| 154247 | CEFBS_None, // VFNMADD231PSZmkz = 10033 |
| 154248 | CEFBS_None, // VFNMADD231PSZr = 10034 |
| 154249 | CEFBS_None, // VFNMADD231PSZrb = 10035 |
| 154250 | CEFBS_None, // VFNMADD231PSZrbk = 10036 |
| 154251 | CEFBS_None, // VFNMADD231PSZrbkz = 10037 |
| 154252 | CEFBS_None, // VFNMADD231PSZrk = 10038 |
| 154253 | CEFBS_None, // VFNMADD231PSZrkz = 10039 |
| 154254 | CEFBS_None, // VFNMADD231PSm = 10040 |
| 154255 | CEFBS_None, // VFNMADD231PSr = 10041 |
| 154256 | CEFBS_None, // VFNMADD231SDZm = 10042 |
| 154257 | CEFBS_None, // VFNMADD231SDZm_Int = 10043 |
| 154258 | CEFBS_None, // VFNMADD231SDZm_Intk = 10044 |
| 154259 | CEFBS_None, // VFNMADD231SDZm_Intkz = 10045 |
| 154260 | CEFBS_None, // VFNMADD231SDZr = 10046 |
| 154261 | CEFBS_None, // VFNMADD231SDZr_Int = 10047 |
| 154262 | CEFBS_None, // VFNMADD231SDZr_Intk = 10048 |
| 154263 | CEFBS_None, // VFNMADD231SDZr_Intkz = 10049 |
| 154264 | CEFBS_None, // VFNMADD231SDZrb = 10050 |
| 154265 | CEFBS_None, // VFNMADD231SDZrb_Int = 10051 |
| 154266 | CEFBS_None, // VFNMADD231SDZrb_Intk = 10052 |
| 154267 | CEFBS_None, // VFNMADD231SDZrb_Intkz = 10053 |
| 154268 | CEFBS_None, // VFNMADD231SDm = 10054 |
| 154269 | CEFBS_None, // VFNMADD231SDm_Int = 10055 |
| 154270 | CEFBS_None, // VFNMADD231SDr = 10056 |
| 154271 | CEFBS_None, // VFNMADD231SDr_Int = 10057 |
| 154272 | CEFBS_None, // VFNMADD231SHZm = 10058 |
| 154273 | CEFBS_None, // VFNMADD231SHZm_Int = 10059 |
| 154274 | CEFBS_None, // VFNMADD231SHZm_Intk = 10060 |
| 154275 | CEFBS_None, // VFNMADD231SHZm_Intkz = 10061 |
| 154276 | CEFBS_None, // VFNMADD231SHZr = 10062 |
| 154277 | CEFBS_None, // VFNMADD231SHZr_Int = 10063 |
| 154278 | CEFBS_None, // VFNMADD231SHZr_Intk = 10064 |
| 154279 | CEFBS_None, // VFNMADD231SHZr_Intkz = 10065 |
| 154280 | CEFBS_None, // VFNMADD231SHZrb = 10066 |
| 154281 | CEFBS_None, // VFNMADD231SHZrb_Int = 10067 |
| 154282 | CEFBS_None, // VFNMADD231SHZrb_Intk = 10068 |
| 154283 | CEFBS_None, // VFNMADD231SHZrb_Intkz = 10069 |
| 154284 | CEFBS_None, // VFNMADD231SSZm = 10070 |
| 154285 | CEFBS_None, // VFNMADD231SSZm_Int = 10071 |
| 154286 | CEFBS_None, // VFNMADD231SSZm_Intk = 10072 |
| 154287 | CEFBS_None, // VFNMADD231SSZm_Intkz = 10073 |
| 154288 | CEFBS_None, // VFNMADD231SSZr = 10074 |
| 154289 | CEFBS_None, // VFNMADD231SSZr_Int = 10075 |
| 154290 | CEFBS_None, // VFNMADD231SSZr_Intk = 10076 |
| 154291 | CEFBS_None, // VFNMADD231SSZr_Intkz = 10077 |
| 154292 | CEFBS_None, // VFNMADD231SSZrb = 10078 |
| 154293 | CEFBS_None, // VFNMADD231SSZrb_Int = 10079 |
| 154294 | CEFBS_None, // VFNMADD231SSZrb_Intk = 10080 |
| 154295 | CEFBS_None, // VFNMADD231SSZrb_Intkz = 10081 |
| 154296 | CEFBS_None, // VFNMADD231SSm = 10082 |
| 154297 | CEFBS_None, // VFNMADD231SSm_Int = 10083 |
| 154298 | CEFBS_None, // VFNMADD231SSr = 10084 |
| 154299 | CEFBS_None, // VFNMADD231SSr_Int = 10085 |
| 154300 | CEFBS_None, // VFNMADDPD4Ymr = 10086 |
| 154301 | CEFBS_None, // VFNMADDPD4Yrm = 10087 |
| 154302 | CEFBS_None, // VFNMADDPD4Yrr = 10088 |
| 154303 | CEFBS_None, // VFNMADDPD4Yrr_REV = 10089 |
| 154304 | CEFBS_None, // VFNMADDPD4mr = 10090 |
| 154305 | CEFBS_None, // VFNMADDPD4rm = 10091 |
| 154306 | CEFBS_None, // VFNMADDPD4rr = 10092 |
| 154307 | CEFBS_None, // VFNMADDPD4rr_REV = 10093 |
| 154308 | CEFBS_None, // VFNMADDPS4Ymr = 10094 |
| 154309 | CEFBS_None, // VFNMADDPS4Yrm = 10095 |
| 154310 | CEFBS_None, // VFNMADDPS4Yrr = 10096 |
| 154311 | CEFBS_None, // VFNMADDPS4Yrr_REV = 10097 |
| 154312 | CEFBS_None, // VFNMADDPS4mr = 10098 |
| 154313 | CEFBS_None, // VFNMADDPS4rm = 10099 |
| 154314 | CEFBS_None, // VFNMADDPS4rr = 10100 |
| 154315 | CEFBS_None, // VFNMADDPS4rr_REV = 10101 |
| 154316 | CEFBS_None, // VFNMADDSD4mr = 10102 |
| 154317 | CEFBS_None, // VFNMADDSD4mr_Int = 10103 |
| 154318 | CEFBS_None, // VFNMADDSD4rm = 10104 |
| 154319 | CEFBS_None, // VFNMADDSD4rm_Int = 10105 |
| 154320 | CEFBS_None, // VFNMADDSD4rr = 10106 |
| 154321 | CEFBS_None, // VFNMADDSD4rr_Int = 10107 |
| 154322 | CEFBS_None, // VFNMADDSD4rr_Int_REV = 10108 |
| 154323 | CEFBS_None, // VFNMADDSD4rr_REV = 10109 |
| 154324 | CEFBS_None, // VFNMADDSS4mr = 10110 |
| 154325 | CEFBS_None, // VFNMADDSS4mr_Int = 10111 |
| 154326 | CEFBS_None, // VFNMADDSS4rm = 10112 |
| 154327 | CEFBS_None, // VFNMADDSS4rm_Int = 10113 |
| 154328 | CEFBS_None, // VFNMADDSS4rr = 10114 |
| 154329 | CEFBS_None, // VFNMADDSS4rr_Int = 10115 |
| 154330 | CEFBS_None, // VFNMADDSS4rr_Int_REV = 10116 |
| 154331 | CEFBS_None, // VFNMADDSS4rr_REV = 10117 |
| 154332 | CEFBS_None, // VFNMSUB132PDYm = 10118 |
| 154333 | CEFBS_None, // VFNMSUB132PDYr = 10119 |
| 154334 | CEFBS_None, // VFNMSUB132PDZ128m = 10120 |
| 154335 | CEFBS_None, // VFNMSUB132PDZ128mb = 10121 |
| 154336 | CEFBS_None, // VFNMSUB132PDZ128mbk = 10122 |
| 154337 | CEFBS_None, // VFNMSUB132PDZ128mbkz = 10123 |
| 154338 | CEFBS_None, // VFNMSUB132PDZ128mk = 10124 |
| 154339 | CEFBS_None, // VFNMSUB132PDZ128mkz = 10125 |
| 154340 | CEFBS_None, // VFNMSUB132PDZ128r = 10126 |
| 154341 | CEFBS_None, // VFNMSUB132PDZ128rk = 10127 |
| 154342 | CEFBS_None, // VFNMSUB132PDZ128rkz = 10128 |
| 154343 | CEFBS_None, // VFNMSUB132PDZ256m = 10129 |
| 154344 | CEFBS_None, // VFNMSUB132PDZ256mb = 10130 |
| 154345 | CEFBS_None, // VFNMSUB132PDZ256mbk = 10131 |
| 154346 | CEFBS_None, // VFNMSUB132PDZ256mbkz = 10132 |
| 154347 | CEFBS_None, // VFNMSUB132PDZ256mk = 10133 |
| 154348 | CEFBS_None, // VFNMSUB132PDZ256mkz = 10134 |
| 154349 | CEFBS_None, // VFNMSUB132PDZ256r = 10135 |
| 154350 | CEFBS_None, // VFNMSUB132PDZ256rk = 10136 |
| 154351 | CEFBS_None, // VFNMSUB132PDZ256rkz = 10137 |
| 154352 | CEFBS_None, // VFNMSUB132PDZm = 10138 |
| 154353 | CEFBS_None, // VFNMSUB132PDZmb = 10139 |
| 154354 | CEFBS_None, // VFNMSUB132PDZmbk = 10140 |
| 154355 | CEFBS_None, // VFNMSUB132PDZmbkz = 10141 |
| 154356 | CEFBS_None, // VFNMSUB132PDZmk = 10142 |
| 154357 | CEFBS_None, // VFNMSUB132PDZmkz = 10143 |
| 154358 | CEFBS_None, // VFNMSUB132PDZr = 10144 |
| 154359 | CEFBS_None, // VFNMSUB132PDZrb = 10145 |
| 154360 | CEFBS_None, // VFNMSUB132PDZrbk = 10146 |
| 154361 | CEFBS_None, // VFNMSUB132PDZrbkz = 10147 |
| 154362 | CEFBS_None, // VFNMSUB132PDZrk = 10148 |
| 154363 | CEFBS_None, // VFNMSUB132PDZrkz = 10149 |
| 154364 | CEFBS_None, // VFNMSUB132PDm = 10150 |
| 154365 | CEFBS_None, // VFNMSUB132PDr = 10151 |
| 154366 | CEFBS_None, // VFNMSUB132PHZ128m = 10152 |
| 154367 | CEFBS_None, // VFNMSUB132PHZ128mb = 10153 |
| 154368 | CEFBS_None, // VFNMSUB132PHZ128mbk = 10154 |
| 154369 | CEFBS_None, // VFNMSUB132PHZ128mbkz = 10155 |
| 154370 | CEFBS_None, // VFNMSUB132PHZ128mk = 10156 |
| 154371 | CEFBS_None, // VFNMSUB132PHZ128mkz = 10157 |
| 154372 | CEFBS_None, // VFNMSUB132PHZ128r = 10158 |
| 154373 | CEFBS_None, // VFNMSUB132PHZ128rk = 10159 |
| 154374 | CEFBS_None, // VFNMSUB132PHZ128rkz = 10160 |
| 154375 | CEFBS_None, // VFNMSUB132PHZ256m = 10161 |
| 154376 | CEFBS_None, // VFNMSUB132PHZ256mb = 10162 |
| 154377 | CEFBS_None, // VFNMSUB132PHZ256mbk = 10163 |
| 154378 | CEFBS_None, // VFNMSUB132PHZ256mbkz = 10164 |
| 154379 | CEFBS_None, // VFNMSUB132PHZ256mk = 10165 |
| 154380 | CEFBS_None, // VFNMSUB132PHZ256mkz = 10166 |
| 154381 | CEFBS_None, // VFNMSUB132PHZ256r = 10167 |
| 154382 | CEFBS_None, // VFNMSUB132PHZ256rk = 10168 |
| 154383 | CEFBS_None, // VFNMSUB132PHZ256rkz = 10169 |
| 154384 | CEFBS_None, // VFNMSUB132PHZm = 10170 |
| 154385 | CEFBS_None, // VFNMSUB132PHZmb = 10171 |
| 154386 | CEFBS_None, // VFNMSUB132PHZmbk = 10172 |
| 154387 | CEFBS_None, // VFNMSUB132PHZmbkz = 10173 |
| 154388 | CEFBS_None, // VFNMSUB132PHZmk = 10174 |
| 154389 | CEFBS_None, // VFNMSUB132PHZmkz = 10175 |
| 154390 | CEFBS_None, // VFNMSUB132PHZr = 10176 |
| 154391 | CEFBS_None, // VFNMSUB132PHZrb = 10177 |
| 154392 | CEFBS_None, // VFNMSUB132PHZrbk = 10178 |
| 154393 | CEFBS_None, // VFNMSUB132PHZrbkz = 10179 |
| 154394 | CEFBS_None, // VFNMSUB132PHZrk = 10180 |
| 154395 | CEFBS_None, // VFNMSUB132PHZrkz = 10181 |
| 154396 | CEFBS_None, // VFNMSUB132PSYm = 10182 |
| 154397 | CEFBS_None, // VFNMSUB132PSYr = 10183 |
| 154398 | CEFBS_None, // VFNMSUB132PSZ128m = 10184 |
| 154399 | CEFBS_None, // VFNMSUB132PSZ128mb = 10185 |
| 154400 | CEFBS_None, // VFNMSUB132PSZ128mbk = 10186 |
| 154401 | CEFBS_None, // VFNMSUB132PSZ128mbkz = 10187 |
| 154402 | CEFBS_None, // VFNMSUB132PSZ128mk = 10188 |
| 154403 | CEFBS_None, // VFNMSUB132PSZ128mkz = 10189 |
| 154404 | CEFBS_None, // VFNMSUB132PSZ128r = 10190 |
| 154405 | CEFBS_None, // VFNMSUB132PSZ128rk = 10191 |
| 154406 | CEFBS_None, // VFNMSUB132PSZ128rkz = 10192 |
| 154407 | CEFBS_None, // VFNMSUB132PSZ256m = 10193 |
| 154408 | CEFBS_None, // VFNMSUB132PSZ256mb = 10194 |
| 154409 | CEFBS_None, // VFNMSUB132PSZ256mbk = 10195 |
| 154410 | CEFBS_None, // VFNMSUB132PSZ256mbkz = 10196 |
| 154411 | CEFBS_None, // VFNMSUB132PSZ256mk = 10197 |
| 154412 | CEFBS_None, // VFNMSUB132PSZ256mkz = 10198 |
| 154413 | CEFBS_None, // VFNMSUB132PSZ256r = 10199 |
| 154414 | CEFBS_None, // VFNMSUB132PSZ256rk = 10200 |
| 154415 | CEFBS_None, // VFNMSUB132PSZ256rkz = 10201 |
| 154416 | CEFBS_None, // VFNMSUB132PSZm = 10202 |
| 154417 | CEFBS_None, // VFNMSUB132PSZmb = 10203 |
| 154418 | CEFBS_None, // VFNMSUB132PSZmbk = 10204 |
| 154419 | CEFBS_None, // VFNMSUB132PSZmbkz = 10205 |
| 154420 | CEFBS_None, // VFNMSUB132PSZmk = 10206 |
| 154421 | CEFBS_None, // VFNMSUB132PSZmkz = 10207 |
| 154422 | CEFBS_None, // VFNMSUB132PSZr = 10208 |
| 154423 | CEFBS_None, // VFNMSUB132PSZrb = 10209 |
| 154424 | CEFBS_None, // VFNMSUB132PSZrbk = 10210 |
| 154425 | CEFBS_None, // VFNMSUB132PSZrbkz = 10211 |
| 154426 | CEFBS_None, // VFNMSUB132PSZrk = 10212 |
| 154427 | CEFBS_None, // VFNMSUB132PSZrkz = 10213 |
| 154428 | CEFBS_None, // VFNMSUB132PSm = 10214 |
| 154429 | CEFBS_None, // VFNMSUB132PSr = 10215 |
| 154430 | CEFBS_None, // VFNMSUB132SDZm = 10216 |
| 154431 | CEFBS_None, // VFNMSUB132SDZm_Int = 10217 |
| 154432 | CEFBS_None, // VFNMSUB132SDZm_Intk = 10218 |
| 154433 | CEFBS_None, // VFNMSUB132SDZm_Intkz = 10219 |
| 154434 | CEFBS_None, // VFNMSUB132SDZr = 10220 |
| 154435 | CEFBS_None, // VFNMSUB132SDZr_Int = 10221 |
| 154436 | CEFBS_None, // VFNMSUB132SDZr_Intk = 10222 |
| 154437 | CEFBS_None, // VFNMSUB132SDZr_Intkz = 10223 |
| 154438 | CEFBS_None, // VFNMSUB132SDZrb = 10224 |
| 154439 | CEFBS_None, // VFNMSUB132SDZrb_Int = 10225 |
| 154440 | CEFBS_None, // VFNMSUB132SDZrb_Intk = 10226 |
| 154441 | CEFBS_None, // VFNMSUB132SDZrb_Intkz = 10227 |
| 154442 | CEFBS_None, // VFNMSUB132SDm = 10228 |
| 154443 | CEFBS_None, // VFNMSUB132SDm_Int = 10229 |
| 154444 | CEFBS_None, // VFNMSUB132SDr = 10230 |
| 154445 | CEFBS_None, // VFNMSUB132SDr_Int = 10231 |
| 154446 | CEFBS_None, // VFNMSUB132SHZm = 10232 |
| 154447 | CEFBS_None, // VFNMSUB132SHZm_Int = 10233 |
| 154448 | CEFBS_None, // VFNMSUB132SHZm_Intk = 10234 |
| 154449 | CEFBS_None, // VFNMSUB132SHZm_Intkz = 10235 |
| 154450 | CEFBS_None, // VFNMSUB132SHZr = 10236 |
| 154451 | CEFBS_None, // VFNMSUB132SHZr_Int = 10237 |
| 154452 | CEFBS_None, // VFNMSUB132SHZr_Intk = 10238 |
| 154453 | CEFBS_None, // VFNMSUB132SHZr_Intkz = 10239 |
| 154454 | CEFBS_None, // VFNMSUB132SHZrb = 10240 |
| 154455 | CEFBS_None, // VFNMSUB132SHZrb_Int = 10241 |
| 154456 | CEFBS_None, // VFNMSUB132SHZrb_Intk = 10242 |
| 154457 | CEFBS_None, // VFNMSUB132SHZrb_Intkz = 10243 |
| 154458 | CEFBS_None, // VFNMSUB132SSZm = 10244 |
| 154459 | CEFBS_None, // VFNMSUB132SSZm_Int = 10245 |
| 154460 | CEFBS_None, // VFNMSUB132SSZm_Intk = 10246 |
| 154461 | CEFBS_None, // VFNMSUB132SSZm_Intkz = 10247 |
| 154462 | CEFBS_None, // VFNMSUB132SSZr = 10248 |
| 154463 | CEFBS_None, // VFNMSUB132SSZr_Int = 10249 |
| 154464 | CEFBS_None, // VFNMSUB132SSZr_Intk = 10250 |
| 154465 | CEFBS_None, // VFNMSUB132SSZr_Intkz = 10251 |
| 154466 | CEFBS_None, // VFNMSUB132SSZrb = 10252 |
| 154467 | CEFBS_None, // VFNMSUB132SSZrb_Int = 10253 |
| 154468 | CEFBS_None, // VFNMSUB132SSZrb_Intk = 10254 |
| 154469 | CEFBS_None, // VFNMSUB132SSZrb_Intkz = 10255 |
| 154470 | CEFBS_None, // VFNMSUB132SSm = 10256 |
| 154471 | CEFBS_None, // VFNMSUB132SSm_Int = 10257 |
| 154472 | CEFBS_None, // VFNMSUB132SSr = 10258 |
| 154473 | CEFBS_None, // VFNMSUB132SSr_Int = 10259 |
| 154474 | CEFBS_None, // VFNMSUB213PDYm = 10260 |
| 154475 | CEFBS_None, // VFNMSUB213PDYr = 10261 |
| 154476 | CEFBS_None, // VFNMSUB213PDZ128m = 10262 |
| 154477 | CEFBS_None, // VFNMSUB213PDZ128mb = 10263 |
| 154478 | CEFBS_None, // VFNMSUB213PDZ128mbk = 10264 |
| 154479 | CEFBS_None, // VFNMSUB213PDZ128mbkz = 10265 |
| 154480 | CEFBS_None, // VFNMSUB213PDZ128mk = 10266 |
| 154481 | CEFBS_None, // VFNMSUB213PDZ128mkz = 10267 |
| 154482 | CEFBS_None, // VFNMSUB213PDZ128r = 10268 |
| 154483 | CEFBS_None, // VFNMSUB213PDZ128rk = 10269 |
| 154484 | CEFBS_None, // VFNMSUB213PDZ128rkz = 10270 |
| 154485 | CEFBS_None, // VFNMSUB213PDZ256m = 10271 |
| 154486 | CEFBS_None, // VFNMSUB213PDZ256mb = 10272 |
| 154487 | CEFBS_None, // VFNMSUB213PDZ256mbk = 10273 |
| 154488 | CEFBS_None, // VFNMSUB213PDZ256mbkz = 10274 |
| 154489 | CEFBS_None, // VFNMSUB213PDZ256mk = 10275 |
| 154490 | CEFBS_None, // VFNMSUB213PDZ256mkz = 10276 |
| 154491 | CEFBS_None, // VFNMSUB213PDZ256r = 10277 |
| 154492 | CEFBS_None, // VFNMSUB213PDZ256rk = 10278 |
| 154493 | CEFBS_None, // VFNMSUB213PDZ256rkz = 10279 |
| 154494 | CEFBS_None, // VFNMSUB213PDZm = 10280 |
| 154495 | CEFBS_None, // VFNMSUB213PDZmb = 10281 |
| 154496 | CEFBS_None, // VFNMSUB213PDZmbk = 10282 |
| 154497 | CEFBS_None, // VFNMSUB213PDZmbkz = 10283 |
| 154498 | CEFBS_None, // VFNMSUB213PDZmk = 10284 |
| 154499 | CEFBS_None, // VFNMSUB213PDZmkz = 10285 |
| 154500 | CEFBS_None, // VFNMSUB213PDZr = 10286 |
| 154501 | CEFBS_None, // VFNMSUB213PDZrb = 10287 |
| 154502 | CEFBS_None, // VFNMSUB213PDZrbk = 10288 |
| 154503 | CEFBS_None, // VFNMSUB213PDZrbkz = 10289 |
| 154504 | CEFBS_None, // VFNMSUB213PDZrk = 10290 |
| 154505 | CEFBS_None, // VFNMSUB213PDZrkz = 10291 |
| 154506 | CEFBS_None, // VFNMSUB213PDm = 10292 |
| 154507 | CEFBS_None, // VFNMSUB213PDr = 10293 |
| 154508 | CEFBS_None, // VFNMSUB213PHZ128m = 10294 |
| 154509 | CEFBS_None, // VFNMSUB213PHZ128mb = 10295 |
| 154510 | CEFBS_None, // VFNMSUB213PHZ128mbk = 10296 |
| 154511 | CEFBS_None, // VFNMSUB213PHZ128mbkz = 10297 |
| 154512 | CEFBS_None, // VFNMSUB213PHZ128mk = 10298 |
| 154513 | CEFBS_None, // VFNMSUB213PHZ128mkz = 10299 |
| 154514 | CEFBS_None, // VFNMSUB213PHZ128r = 10300 |
| 154515 | CEFBS_None, // VFNMSUB213PHZ128rk = 10301 |
| 154516 | CEFBS_None, // VFNMSUB213PHZ128rkz = 10302 |
| 154517 | CEFBS_None, // VFNMSUB213PHZ256m = 10303 |
| 154518 | CEFBS_None, // VFNMSUB213PHZ256mb = 10304 |
| 154519 | CEFBS_None, // VFNMSUB213PHZ256mbk = 10305 |
| 154520 | CEFBS_None, // VFNMSUB213PHZ256mbkz = 10306 |
| 154521 | CEFBS_None, // VFNMSUB213PHZ256mk = 10307 |
| 154522 | CEFBS_None, // VFNMSUB213PHZ256mkz = 10308 |
| 154523 | CEFBS_None, // VFNMSUB213PHZ256r = 10309 |
| 154524 | CEFBS_None, // VFNMSUB213PHZ256rk = 10310 |
| 154525 | CEFBS_None, // VFNMSUB213PHZ256rkz = 10311 |
| 154526 | CEFBS_None, // VFNMSUB213PHZm = 10312 |
| 154527 | CEFBS_None, // VFNMSUB213PHZmb = 10313 |
| 154528 | CEFBS_None, // VFNMSUB213PHZmbk = 10314 |
| 154529 | CEFBS_None, // VFNMSUB213PHZmbkz = 10315 |
| 154530 | CEFBS_None, // VFNMSUB213PHZmk = 10316 |
| 154531 | CEFBS_None, // VFNMSUB213PHZmkz = 10317 |
| 154532 | CEFBS_None, // VFNMSUB213PHZr = 10318 |
| 154533 | CEFBS_None, // VFNMSUB213PHZrb = 10319 |
| 154534 | CEFBS_None, // VFNMSUB213PHZrbk = 10320 |
| 154535 | CEFBS_None, // VFNMSUB213PHZrbkz = 10321 |
| 154536 | CEFBS_None, // VFNMSUB213PHZrk = 10322 |
| 154537 | CEFBS_None, // VFNMSUB213PHZrkz = 10323 |
| 154538 | CEFBS_None, // VFNMSUB213PSYm = 10324 |
| 154539 | CEFBS_None, // VFNMSUB213PSYr = 10325 |
| 154540 | CEFBS_None, // VFNMSUB213PSZ128m = 10326 |
| 154541 | CEFBS_None, // VFNMSUB213PSZ128mb = 10327 |
| 154542 | CEFBS_None, // VFNMSUB213PSZ128mbk = 10328 |
| 154543 | CEFBS_None, // VFNMSUB213PSZ128mbkz = 10329 |
| 154544 | CEFBS_None, // VFNMSUB213PSZ128mk = 10330 |
| 154545 | CEFBS_None, // VFNMSUB213PSZ128mkz = 10331 |
| 154546 | CEFBS_None, // VFNMSUB213PSZ128r = 10332 |
| 154547 | CEFBS_None, // VFNMSUB213PSZ128rk = 10333 |
| 154548 | CEFBS_None, // VFNMSUB213PSZ128rkz = 10334 |
| 154549 | CEFBS_None, // VFNMSUB213PSZ256m = 10335 |
| 154550 | CEFBS_None, // VFNMSUB213PSZ256mb = 10336 |
| 154551 | CEFBS_None, // VFNMSUB213PSZ256mbk = 10337 |
| 154552 | CEFBS_None, // VFNMSUB213PSZ256mbkz = 10338 |
| 154553 | CEFBS_None, // VFNMSUB213PSZ256mk = 10339 |
| 154554 | CEFBS_None, // VFNMSUB213PSZ256mkz = 10340 |
| 154555 | CEFBS_None, // VFNMSUB213PSZ256r = 10341 |
| 154556 | CEFBS_None, // VFNMSUB213PSZ256rk = 10342 |
| 154557 | CEFBS_None, // VFNMSUB213PSZ256rkz = 10343 |
| 154558 | CEFBS_None, // VFNMSUB213PSZm = 10344 |
| 154559 | CEFBS_None, // VFNMSUB213PSZmb = 10345 |
| 154560 | CEFBS_None, // VFNMSUB213PSZmbk = 10346 |
| 154561 | CEFBS_None, // VFNMSUB213PSZmbkz = 10347 |
| 154562 | CEFBS_None, // VFNMSUB213PSZmk = 10348 |
| 154563 | CEFBS_None, // VFNMSUB213PSZmkz = 10349 |
| 154564 | CEFBS_None, // VFNMSUB213PSZr = 10350 |
| 154565 | CEFBS_None, // VFNMSUB213PSZrb = 10351 |
| 154566 | CEFBS_None, // VFNMSUB213PSZrbk = 10352 |
| 154567 | CEFBS_None, // VFNMSUB213PSZrbkz = 10353 |
| 154568 | CEFBS_None, // VFNMSUB213PSZrk = 10354 |
| 154569 | CEFBS_None, // VFNMSUB213PSZrkz = 10355 |
| 154570 | CEFBS_None, // VFNMSUB213PSm = 10356 |
| 154571 | CEFBS_None, // VFNMSUB213PSr = 10357 |
| 154572 | CEFBS_None, // VFNMSUB213SDZm = 10358 |
| 154573 | CEFBS_None, // VFNMSUB213SDZm_Int = 10359 |
| 154574 | CEFBS_None, // VFNMSUB213SDZm_Intk = 10360 |
| 154575 | CEFBS_None, // VFNMSUB213SDZm_Intkz = 10361 |
| 154576 | CEFBS_None, // VFNMSUB213SDZr = 10362 |
| 154577 | CEFBS_None, // VFNMSUB213SDZr_Int = 10363 |
| 154578 | CEFBS_None, // VFNMSUB213SDZr_Intk = 10364 |
| 154579 | CEFBS_None, // VFNMSUB213SDZr_Intkz = 10365 |
| 154580 | CEFBS_None, // VFNMSUB213SDZrb = 10366 |
| 154581 | CEFBS_None, // VFNMSUB213SDZrb_Int = 10367 |
| 154582 | CEFBS_None, // VFNMSUB213SDZrb_Intk = 10368 |
| 154583 | CEFBS_None, // VFNMSUB213SDZrb_Intkz = 10369 |
| 154584 | CEFBS_None, // VFNMSUB213SDm = 10370 |
| 154585 | CEFBS_None, // VFNMSUB213SDm_Int = 10371 |
| 154586 | CEFBS_None, // VFNMSUB213SDr = 10372 |
| 154587 | CEFBS_None, // VFNMSUB213SDr_Int = 10373 |
| 154588 | CEFBS_None, // VFNMSUB213SHZm = 10374 |
| 154589 | CEFBS_None, // VFNMSUB213SHZm_Int = 10375 |
| 154590 | CEFBS_None, // VFNMSUB213SHZm_Intk = 10376 |
| 154591 | CEFBS_None, // VFNMSUB213SHZm_Intkz = 10377 |
| 154592 | CEFBS_None, // VFNMSUB213SHZr = 10378 |
| 154593 | CEFBS_None, // VFNMSUB213SHZr_Int = 10379 |
| 154594 | CEFBS_None, // VFNMSUB213SHZr_Intk = 10380 |
| 154595 | CEFBS_None, // VFNMSUB213SHZr_Intkz = 10381 |
| 154596 | CEFBS_None, // VFNMSUB213SHZrb = 10382 |
| 154597 | CEFBS_None, // VFNMSUB213SHZrb_Int = 10383 |
| 154598 | CEFBS_None, // VFNMSUB213SHZrb_Intk = 10384 |
| 154599 | CEFBS_None, // VFNMSUB213SHZrb_Intkz = 10385 |
| 154600 | CEFBS_None, // VFNMSUB213SSZm = 10386 |
| 154601 | CEFBS_None, // VFNMSUB213SSZm_Int = 10387 |
| 154602 | CEFBS_None, // VFNMSUB213SSZm_Intk = 10388 |
| 154603 | CEFBS_None, // VFNMSUB213SSZm_Intkz = 10389 |
| 154604 | CEFBS_None, // VFNMSUB213SSZr = 10390 |
| 154605 | CEFBS_None, // VFNMSUB213SSZr_Int = 10391 |
| 154606 | CEFBS_None, // VFNMSUB213SSZr_Intk = 10392 |
| 154607 | CEFBS_None, // VFNMSUB213SSZr_Intkz = 10393 |
| 154608 | CEFBS_None, // VFNMSUB213SSZrb = 10394 |
| 154609 | CEFBS_None, // VFNMSUB213SSZrb_Int = 10395 |
| 154610 | CEFBS_None, // VFNMSUB213SSZrb_Intk = 10396 |
| 154611 | CEFBS_None, // VFNMSUB213SSZrb_Intkz = 10397 |
| 154612 | CEFBS_None, // VFNMSUB213SSm = 10398 |
| 154613 | CEFBS_None, // VFNMSUB213SSm_Int = 10399 |
| 154614 | CEFBS_None, // VFNMSUB213SSr = 10400 |
| 154615 | CEFBS_None, // VFNMSUB213SSr_Int = 10401 |
| 154616 | CEFBS_None, // VFNMSUB231PDYm = 10402 |
| 154617 | CEFBS_None, // VFNMSUB231PDYr = 10403 |
| 154618 | CEFBS_None, // VFNMSUB231PDZ128m = 10404 |
| 154619 | CEFBS_None, // VFNMSUB231PDZ128mb = 10405 |
| 154620 | CEFBS_None, // VFNMSUB231PDZ128mbk = 10406 |
| 154621 | CEFBS_None, // VFNMSUB231PDZ128mbkz = 10407 |
| 154622 | CEFBS_None, // VFNMSUB231PDZ128mk = 10408 |
| 154623 | CEFBS_None, // VFNMSUB231PDZ128mkz = 10409 |
| 154624 | CEFBS_None, // VFNMSUB231PDZ128r = 10410 |
| 154625 | CEFBS_None, // VFNMSUB231PDZ128rk = 10411 |
| 154626 | CEFBS_None, // VFNMSUB231PDZ128rkz = 10412 |
| 154627 | CEFBS_None, // VFNMSUB231PDZ256m = 10413 |
| 154628 | CEFBS_None, // VFNMSUB231PDZ256mb = 10414 |
| 154629 | CEFBS_None, // VFNMSUB231PDZ256mbk = 10415 |
| 154630 | CEFBS_None, // VFNMSUB231PDZ256mbkz = 10416 |
| 154631 | CEFBS_None, // VFNMSUB231PDZ256mk = 10417 |
| 154632 | CEFBS_None, // VFNMSUB231PDZ256mkz = 10418 |
| 154633 | CEFBS_None, // VFNMSUB231PDZ256r = 10419 |
| 154634 | CEFBS_None, // VFNMSUB231PDZ256rk = 10420 |
| 154635 | CEFBS_None, // VFNMSUB231PDZ256rkz = 10421 |
| 154636 | CEFBS_None, // VFNMSUB231PDZm = 10422 |
| 154637 | CEFBS_None, // VFNMSUB231PDZmb = 10423 |
| 154638 | CEFBS_None, // VFNMSUB231PDZmbk = 10424 |
| 154639 | CEFBS_None, // VFNMSUB231PDZmbkz = 10425 |
| 154640 | CEFBS_None, // VFNMSUB231PDZmk = 10426 |
| 154641 | CEFBS_None, // VFNMSUB231PDZmkz = 10427 |
| 154642 | CEFBS_None, // VFNMSUB231PDZr = 10428 |
| 154643 | CEFBS_None, // VFNMSUB231PDZrb = 10429 |
| 154644 | CEFBS_None, // VFNMSUB231PDZrbk = 10430 |
| 154645 | CEFBS_None, // VFNMSUB231PDZrbkz = 10431 |
| 154646 | CEFBS_None, // VFNMSUB231PDZrk = 10432 |
| 154647 | CEFBS_None, // VFNMSUB231PDZrkz = 10433 |
| 154648 | CEFBS_None, // VFNMSUB231PDm = 10434 |
| 154649 | CEFBS_None, // VFNMSUB231PDr = 10435 |
| 154650 | CEFBS_None, // VFNMSUB231PHZ128m = 10436 |
| 154651 | CEFBS_None, // VFNMSUB231PHZ128mb = 10437 |
| 154652 | CEFBS_None, // VFNMSUB231PHZ128mbk = 10438 |
| 154653 | CEFBS_None, // VFNMSUB231PHZ128mbkz = 10439 |
| 154654 | CEFBS_None, // VFNMSUB231PHZ128mk = 10440 |
| 154655 | CEFBS_None, // VFNMSUB231PHZ128mkz = 10441 |
| 154656 | CEFBS_None, // VFNMSUB231PHZ128r = 10442 |
| 154657 | CEFBS_None, // VFNMSUB231PHZ128rk = 10443 |
| 154658 | CEFBS_None, // VFNMSUB231PHZ128rkz = 10444 |
| 154659 | CEFBS_None, // VFNMSUB231PHZ256m = 10445 |
| 154660 | CEFBS_None, // VFNMSUB231PHZ256mb = 10446 |
| 154661 | CEFBS_None, // VFNMSUB231PHZ256mbk = 10447 |
| 154662 | CEFBS_None, // VFNMSUB231PHZ256mbkz = 10448 |
| 154663 | CEFBS_None, // VFNMSUB231PHZ256mk = 10449 |
| 154664 | CEFBS_None, // VFNMSUB231PHZ256mkz = 10450 |
| 154665 | CEFBS_None, // VFNMSUB231PHZ256r = 10451 |
| 154666 | CEFBS_None, // VFNMSUB231PHZ256rk = 10452 |
| 154667 | CEFBS_None, // VFNMSUB231PHZ256rkz = 10453 |
| 154668 | CEFBS_None, // VFNMSUB231PHZm = 10454 |
| 154669 | CEFBS_None, // VFNMSUB231PHZmb = 10455 |
| 154670 | CEFBS_None, // VFNMSUB231PHZmbk = 10456 |
| 154671 | CEFBS_None, // VFNMSUB231PHZmbkz = 10457 |
| 154672 | CEFBS_None, // VFNMSUB231PHZmk = 10458 |
| 154673 | CEFBS_None, // VFNMSUB231PHZmkz = 10459 |
| 154674 | CEFBS_None, // VFNMSUB231PHZr = 10460 |
| 154675 | CEFBS_None, // VFNMSUB231PHZrb = 10461 |
| 154676 | CEFBS_None, // VFNMSUB231PHZrbk = 10462 |
| 154677 | CEFBS_None, // VFNMSUB231PHZrbkz = 10463 |
| 154678 | CEFBS_None, // VFNMSUB231PHZrk = 10464 |
| 154679 | CEFBS_None, // VFNMSUB231PHZrkz = 10465 |
| 154680 | CEFBS_None, // VFNMSUB231PSYm = 10466 |
| 154681 | CEFBS_None, // VFNMSUB231PSYr = 10467 |
| 154682 | CEFBS_None, // VFNMSUB231PSZ128m = 10468 |
| 154683 | CEFBS_None, // VFNMSUB231PSZ128mb = 10469 |
| 154684 | CEFBS_None, // VFNMSUB231PSZ128mbk = 10470 |
| 154685 | CEFBS_None, // VFNMSUB231PSZ128mbkz = 10471 |
| 154686 | CEFBS_None, // VFNMSUB231PSZ128mk = 10472 |
| 154687 | CEFBS_None, // VFNMSUB231PSZ128mkz = 10473 |
| 154688 | CEFBS_None, // VFNMSUB231PSZ128r = 10474 |
| 154689 | CEFBS_None, // VFNMSUB231PSZ128rk = 10475 |
| 154690 | CEFBS_None, // VFNMSUB231PSZ128rkz = 10476 |
| 154691 | CEFBS_None, // VFNMSUB231PSZ256m = 10477 |
| 154692 | CEFBS_None, // VFNMSUB231PSZ256mb = 10478 |
| 154693 | CEFBS_None, // VFNMSUB231PSZ256mbk = 10479 |
| 154694 | CEFBS_None, // VFNMSUB231PSZ256mbkz = 10480 |
| 154695 | CEFBS_None, // VFNMSUB231PSZ256mk = 10481 |
| 154696 | CEFBS_None, // VFNMSUB231PSZ256mkz = 10482 |
| 154697 | CEFBS_None, // VFNMSUB231PSZ256r = 10483 |
| 154698 | CEFBS_None, // VFNMSUB231PSZ256rk = 10484 |
| 154699 | CEFBS_None, // VFNMSUB231PSZ256rkz = 10485 |
| 154700 | CEFBS_None, // VFNMSUB231PSZm = 10486 |
| 154701 | CEFBS_None, // VFNMSUB231PSZmb = 10487 |
| 154702 | CEFBS_None, // VFNMSUB231PSZmbk = 10488 |
| 154703 | CEFBS_None, // VFNMSUB231PSZmbkz = 10489 |
| 154704 | CEFBS_None, // VFNMSUB231PSZmk = 10490 |
| 154705 | CEFBS_None, // VFNMSUB231PSZmkz = 10491 |
| 154706 | CEFBS_None, // VFNMSUB231PSZr = 10492 |
| 154707 | CEFBS_None, // VFNMSUB231PSZrb = 10493 |
| 154708 | CEFBS_None, // VFNMSUB231PSZrbk = 10494 |
| 154709 | CEFBS_None, // VFNMSUB231PSZrbkz = 10495 |
| 154710 | CEFBS_None, // VFNMSUB231PSZrk = 10496 |
| 154711 | CEFBS_None, // VFNMSUB231PSZrkz = 10497 |
| 154712 | CEFBS_None, // VFNMSUB231PSm = 10498 |
| 154713 | CEFBS_None, // VFNMSUB231PSr = 10499 |
| 154714 | CEFBS_None, // VFNMSUB231SDZm = 10500 |
| 154715 | CEFBS_None, // VFNMSUB231SDZm_Int = 10501 |
| 154716 | CEFBS_None, // VFNMSUB231SDZm_Intk = 10502 |
| 154717 | CEFBS_None, // VFNMSUB231SDZm_Intkz = 10503 |
| 154718 | CEFBS_None, // VFNMSUB231SDZr = 10504 |
| 154719 | CEFBS_None, // VFNMSUB231SDZr_Int = 10505 |
| 154720 | CEFBS_None, // VFNMSUB231SDZr_Intk = 10506 |
| 154721 | CEFBS_None, // VFNMSUB231SDZr_Intkz = 10507 |
| 154722 | CEFBS_None, // VFNMSUB231SDZrb = 10508 |
| 154723 | CEFBS_None, // VFNMSUB231SDZrb_Int = 10509 |
| 154724 | CEFBS_None, // VFNMSUB231SDZrb_Intk = 10510 |
| 154725 | CEFBS_None, // VFNMSUB231SDZrb_Intkz = 10511 |
| 154726 | CEFBS_None, // VFNMSUB231SDm = 10512 |
| 154727 | CEFBS_None, // VFNMSUB231SDm_Int = 10513 |
| 154728 | CEFBS_None, // VFNMSUB231SDr = 10514 |
| 154729 | CEFBS_None, // VFNMSUB231SDr_Int = 10515 |
| 154730 | CEFBS_None, // VFNMSUB231SHZm = 10516 |
| 154731 | CEFBS_None, // VFNMSUB231SHZm_Int = 10517 |
| 154732 | CEFBS_None, // VFNMSUB231SHZm_Intk = 10518 |
| 154733 | CEFBS_None, // VFNMSUB231SHZm_Intkz = 10519 |
| 154734 | CEFBS_None, // VFNMSUB231SHZr = 10520 |
| 154735 | CEFBS_None, // VFNMSUB231SHZr_Int = 10521 |
| 154736 | CEFBS_None, // VFNMSUB231SHZr_Intk = 10522 |
| 154737 | CEFBS_None, // VFNMSUB231SHZr_Intkz = 10523 |
| 154738 | CEFBS_None, // VFNMSUB231SHZrb = 10524 |
| 154739 | CEFBS_None, // VFNMSUB231SHZrb_Int = 10525 |
| 154740 | CEFBS_None, // VFNMSUB231SHZrb_Intk = 10526 |
| 154741 | CEFBS_None, // VFNMSUB231SHZrb_Intkz = 10527 |
| 154742 | CEFBS_None, // VFNMSUB231SSZm = 10528 |
| 154743 | CEFBS_None, // VFNMSUB231SSZm_Int = 10529 |
| 154744 | CEFBS_None, // VFNMSUB231SSZm_Intk = 10530 |
| 154745 | CEFBS_None, // VFNMSUB231SSZm_Intkz = 10531 |
| 154746 | CEFBS_None, // VFNMSUB231SSZr = 10532 |
| 154747 | CEFBS_None, // VFNMSUB231SSZr_Int = 10533 |
| 154748 | CEFBS_None, // VFNMSUB231SSZr_Intk = 10534 |
| 154749 | CEFBS_None, // VFNMSUB231SSZr_Intkz = 10535 |
| 154750 | CEFBS_None, // VFNMSUB231SSZrb = 10536 |
| 154751 | CEFBS_None, // VFNMSUB231SSZrb_Int = 10537 |
| 154752 | CEFBS_None, // VFNMSUB231SSZrb_Intk = 10538 |
| 154753 | CEFBS_None, // VFNMSUB231SSZrb_Intkz = 10539 |
| 154754 | CEFBS_None, // VFNMSUB231SSm = 10540 |
| 154755 | CEFBS_None, // VFNMSUB231SSm_Int = 10541 |
| 154756 | CEFBS_None, // VFNMSUB231SSr = 10542 |
| 154757 | CEFBS_None, // VFNMSUB231SSr_Int = 10543 |
| 154758 | CEFBS_None, // VFNMSUBPD4Ymr = 10544 |
| 154759 | CEFBS_None, // VFNMSUBPD4Yrm = 10545 |
| 154760 | CEFBS_None, // VFNMSUBPD4Yrr = 10546 |
| 154761 | CEFBS_None, // VFNMSUBPD4Yrr_REV = 10547 |
| 154762 | CEFBS_None, // VFNMSUBPD4mr = 10548 |
| 154763 | CEFBS_None, // VFNMSUBPD4rm = 10549 |
| 154764 | CEFBS_None, // VFNMSUBPD4rr = 10550 |
| 154765 | CEFBS_None, // VFNMSUBPD4rr_REV = 10551 |
| 154766 | CEFBS_None, // VFNMSUBPS4Ymr = 10552 |
| 154767 | CEFBS_None, // VFNMSUBPS4Yrm = 10553 |
| 154768 | CEFBS_None, // VFNMSUBPS4Yrr = 10554 |
| 154769 | CEFBS_None, // VFNMSUBPS4Yrr_REV = 10555 |
| 154770 | CEFBS_None, // VFNMSUBPS4mr = 10556 |
| 154771 | CEFBS_None, // VFNMSUBPS4rm = 10557 |
| 154772 | CEFBS_None, // VFNMSUBPS4rr = 10558 |
| 154773 | CEFBS_None, // VFNMSUBPS4rr_REV = 10559 |
| 154774 | CEFBS_None, // VFNMSUBSD4mr = 10560 |
| 154775 | CEFBS_None, // VFNMSUBSD4mr_Int = 10561 |
| 154776 | CEFBS_None, // VFNMSUBSD4rm = 10562 |
| 154777 | CEFBS_None, // VFNMSUBSD4rm_Int = 10563 |
| 154778 | CEFBS_None, // VFNMSUBSD4rr = 10564 |
| 154779 | CEFBS_None, // VFNMSUBSD4rr_Int = 10565 |
| 154780 | CEFBS_None, // VFNMSUBSD4rr_Int_REV = 10566 |
| 154781 | CEFBS_None, // VFNMSUBSD4rr_REV = 10567 |
| 154782 | CEFBS_None, // VFNMSUBSS4mr = 10568 |
| 154783 | CEFBS_None, // VFNMSUBSS4mr_Int = 10569 |
| 154784 | CEFBS_None, // VFNMSUBSS4rm = 10570 |
| 154785 | CEFBS_None, // VFNMSUBSS4rm_Int = 10571 |
| 154786 | CEFBS_None, // VFNMSUBSS4rr = 10572 |
| 154787 | CEFBS_None, // VFNMSUBSS4rr_Int = 10573 |
| 154788 | CEFBS_None, // VFNMSUBSS4rr_Int_REV = 10574 |
| 154789 | CEFBS_None, // VFNMSUBSS4rr_REV = 10575 |
| 154790 | CEFBS_None, // VFPCLASSPDZ128rm = 10576 |
| 154791 | CEFBS_None, // VFPCLASSPDZ128rmb = 10577 |
| 154792 | CEFBS_None, // VFPCLASSPDZ128rmbk = 10578 |
| 154793 | CEFBS_None, // VFPCLASSPDZ128rmk = 10579 |
| 154794 | CEFBS_None, // VFPCLASSPDZ128rr = 10580 |
| 154795 | CEFBS_None, // VFPCLASSPDZ128rrk = 10581 |
| 154796 | CEFBS_None, // VFPCLASSPDZ256rm = 10582 |
| 154797 | CEFBS_None, // VFPCLASSPDZ256rmb = 10583 |
| 154798 | CEFBS_None, // VFPCLASSPDZ256rmbk = 10584 |
| 154799 | CEFBS_None, // VFPCLASSPDZ256rmk = 10585 |
| 154800 | CEFBS_None, // VFPCLASSPDZ256rr = 10586 |
| 154801 | CEFBS_None, // VFPCLASSPDZ256rrk = 10587 |
| 154802 | CEFBS_None, // VFPCLASSPDZrm = 10588 |
| 154803 | CEFBS_None, // VFPCLASSPDZrmb = 10589 |
| 154804 | CEFBS_None, // VFPCLASSPDZrmbk = 10590 |
| 154805 | CEFBS_None, // VFPCLASSPDZrmk = 10591 |
| 154806 | CEFBS_None, // VFPCLASSPDZrr = 10592 |
| 154807 | CEFBS_None, // VFPCLASSPDZrrk = 10593 |
| 154808 | CEFBS_None, // VFPCLASSPHZ128rm = 10594 |
| 154809 | CEFBS_None, // VFPCLASSPHZ128rmb = 10595 |
| 154810 | CEFBS_None, // VFPCLASSPHZ128rmbk = 10596 |
| 154811 | CEFBS_None, // VFPCLASSPHZ128rmk = 10597 |
| 154812 | CEFBS_None, // VFPCLASSPHZ128rr = 10598 |
| 154813 | CEFBS_None, // VFPCLASSPHZ128rrk = 10599 |
| 154814 | CEFBS_None, // VFPCLASSPHZ256rm = 10600 |
| 154815 | CEFBS_None, // VFPCLASSPHZ256rmb = 10601 |
| 154816 | CEFBS_None, // VFPCLASSPHZ256rmbk = 10602 |
| 154817 | CEFBS_None, // VFPCLASSPHZ256rmk = 10603 |
| 154818 | CEFBS_None, // VFPCLASSPHZ256rr = 10604 |
| 154819 | CEFBS_None, // VFPCLASSPHZ256rrk = 10605 |
| 154820 | CEFBS_None, // VFPCLASSPHZrm = 10606 |
| 154821 | CEFBS_None, // VFPCLASSPHZrmb = 10607 |
| 154822 | CEFBS_None, // VFPCLASSPHZrmbk = 10608 |
| 154823 | CEFBS_None, // VFPCLASSPHZrmk = 10609 |
| 154824 | CEFBS_None, // VFPCLASSPHZrr = 10610 |
| 154825 | CEFBS_None, // VFPCLASSPHZrrk = 10611 |
| 154826 | CEFBS_None, // VFPCLASSPSZ128rm = 10612 |
| 154827 | CEFBS_None, // VFPCLASSPSZ128rmb = 10613 |
| 154828 | CEFBS_None, // VFPCLASSPSZ128rmbk = 10614 |
| 154829 | CEFBS_None, // VFPCLASSPSZ128rmk = 10615 |
| 154830 | CEFBS_None, // VFPCLASSPSZ128rr = 10616 |
| 154831 | CEFBS_None, // VFPCLASSPSZ128rrk = 10617 |
| 154832 | CEFBS_None, // VFPCLASSPSZ256rm = 10618 |
| 154833 | CEFBS_None, // VFPCLASSPSZ256rmb = 10619 |
| 154834 | CEFBS_None, // VFPCLASSPSZ256rmbk = 10620 |
| 154835 | CEFBS_None, // VFPCLASSPSZ256rmk = 10621 |
| 154836 | CEFBS_None, // VFPCLASSPSZ256rr = 10622 |
| 154837 | CEFBS_None, // VFPCLASSPSZ256rrk = 10623 |
| 154838 | CEFBS_None, // VFPCLASSPSZrm = 10624 |
| 154839 | CEFBS_None, // VFPCLASSPSZrmb = 10625 |
| 154840 | CEFBS_None, // VFPCLASSPSZrmbk = 10626 |
| 154841 | CEFBS_None, // VFPCLASSPSZrmk = 10627 |
| 154842 | CEFBS_None, // VFPCLASSPSZrr = 10628 |
| 154843 | CEFBS_None, // VFPCLASSPSZrrk = 10629 |
| 154844 | CEFBS_None, // VFPCLASSSDZrm = 10630 |
| 154845 | CEFBS_None, // VFPCLASSSDZrmk = 10631 |
| 154846 | CEFBS_None, // VFPCLASSSDZrr = 10632 |
| 154847 | CEFBS_None, // VFPCLASSSDZrrk = 10633 |
| 154848 | CEFBS_None, // VFPCLASSSHZrm = 10634 |
| 154849 | CEFBS_None, // VFPCLASSSHZrmk = 10635 |
| 154850 | CEFBS_None, // VFPCLASSSHZrr = 10636 |
| 154851 | CEFBS_None, // VFPCLASSSHZrrk = 10637 |
| 154852 | CEFBS_None, // VFPCLASSSSZrm = 10638 |
| 154853 | CEFBS_None, // VFPCLASSSSZrmk = 10639 |
| 154854 | CEFBS_None, // VFPCLASSSSZrr = 10640 |
| 154855 | CEFBS_None, // VFPCLASSSSZrrk = 10641 |
| 154856 | CEFBS_None, // VFRCZPDYrm = 10642 |
| 154857 | CEFBS_None, // VFRCZPDYrr = 10643 |
| 154858 | CEFBS_None, // VFRCZPDrm = 10644 |
| 154859 | CEFBS_None, // VFRCZPDrr = 10645 |
| 154860 | CEFBS_None, // VFRCZPSYrm = 10646 |
| 154861 | CEFBS_None, // VFRCZPSYrr = 10647 |
| 154862 | CEFBS_None, // VFRCZPSrm = 10648 |
| 154863 | CEFBS_None, // VFRCZPSrr = 10649 |
| 154864 | CEFBS_None, // VFRCZSDrm = 10650 |
| 154865 | CEFBS_None, // VFRCZSDrr = 10651 |
| 154866 | CEFBS_None, // VFRCZSSrm = 10652 |
| 154867 | CEFBS_None, // VFRCZSSrr = 10653 |
| 154868 | CEFBS_None, // VGATHERDPDYrm = 10654 |
| 154869 | CEFBS_None, // VGATHERDPDZ128rm = 10655 |
| 154870 | CEFBS_None, // VGATHERDPDZ256rm = 10656 |
| 154871 | CEFBS_None, // VGATHERDPDZrm = 10657 |
| 154872 | CEFBS_None, // VGATHERDPDrm = 10658 |
| 154873 | CEFBS_None, // VGATHERDPSYrm = 10659 |
| 154874 | CEFBS_None, // VGATHERDPSZ128rm = 10660 |
| 154875 | CEFBS_None, // VGATHERDPSZ256rm = 10661 |
| 154876 | CEFBS_None, // VGATHERDPSZrm = 10662 |
| 154877 | CEFBS_None, // VGATHERDPSrm = 10663 |
| 154878 | CEFBS_None, // VGATHERPF0DPDm = 10664 |
| 154879 | CEFBS_None, // VGATHERPF0DPSm = 10665 |
| 154880 | CEFBS_None, // VGATHERPF0QPDm = 10666 |
| 154881 | CEFBS_None, // VGATHERPF0QPSm = 10667 |
| 154882 | CEFBS_None, // VGATHERPF1DPDm = 10668 |
| 154883 | CEFBS_None, // VGATHERPF1DPSm = 10669 |
| 154884 | CEFBS_None, // VGATHERPF1QPDm = 10670 |
| 154885 | CEFBS_None, // VGATHERPF1QPSm = 10671 |
| 154886 | CEFBS_None, // VGATHERQPDYrm = 10672 |
| 154887 | CEFBS_None, // VGATHERQPDZ128rm = 10673 |
| 154888 | CEFBS_None, // VGATHERQPDZ256rm = 10674 |
| 154889 | CEFBS_None, // VGATHERQPDZrm = 10675 |
| 154890 | CEFBS_None, // VGATHERQPDrm = 10676 |
| 154891 | CEFBS_None, // VGATHERQPSYrm = 10677 |
| 154892 | CEFBS_None, // VGATHERQPSZ128rm = 10678 |
| 154893 | CEFBS_None, // VGATHERQPSZ256rm = 10679 |
| 154894 | CEFBS_None, // VGATHERQPSZrm = 10680 |
| 154895 | CEFBS_None, // VGATHERQPSrm = 10681 |
| 154896 | CEFBS_None, // VGETEXPPDZ128m = 10682 |
| 154897 | CEFBS_None, // VGETEXPPDZ128mb = 10683 |
| 154898 | CEFBS_None, // VGETEXPPDZ128mbk = 10684 |
| 154899 | CEFBS_None, // VGETEXPPDZ128mbkz = 10685 |
| 154900 | CEFBS_None, // VGETEXPPDZ128mk = 10686 |
| 154901 | CEFBS_None, // VGETEXPPDZ128mkz = 10687 |
| 154902 | CEFBS_None, // VGETEXPPDZ128r = 10688 |
| 154903 | CEFBS_None, // VGETEXPPDZ128rk = 10689 |
| 154904 | CEFBS_None, // VGETEXPPDZ128rkz = 10690 |
| 154905 | CEFBS_None, // VGETEXPPDZ256m = 10691 |
| 154906 | CEFBS_None, // VGETEXPPDZ256mb = 10692 |
| 154907 | CEFBS_None, // VGETEXPPDZ256mbk = 10693 |
| 154908 | CEFBS_None, // VGETEXPPDZ256mbkz = 10694 |
| 154909 | CEFBS_None, // VGETEXPPDZ256mk = 10695 |
| 154910 | CEFBS_None, // VGETEXPPDZ256mkz = 10696 |
| 154911 | CEFBS_None, // VGETEXPPDZ256r = 10697 |
| 154912 | CEFBS_None, // VGETEXPPDZ256rk = 10698 |
| 154913 | CEFBS_None, // VGETEXPPDZ256rkz = 10699 |
| 154914 | CEFBS_None, // VGETEXPPDZm = 10700 |
| 154915 | CEFBS_None, // VGETEXPPDZmb = 10701 |
| 154916 | CEFBS_None, // VGETEXPPDZmbk = 10702 |
| 154917 | CEFBS_None, // VGETEXPPDZmbkz = 10703 |
| 154918 | CEFBS_None, // VGETEXPPDZmk = 10704 |
| 154919 | CEFBS_None, // VGETEXPPDZmkz = 10705 |
| 154920 | CEFBS_None, // VGETEXPPDZr = 10706 |
| 154921 | CEFBS_None, // VGETEXPPDZrb = 10707 |
| 154922 | CEFBS_None, // VGETEXPPDZrbk = 10708 |
| 154923 | CEFBS_None, // VGETEXPPDZrbkz = 10709 |
| 154924 | CEFBS_None, // VGETEXPPDZrk = 10710 |
| 154925 | CEFBS_None, // VGETEXPPDZrkz = 10711 |
| 154926 | CEFBS_None, // VGETEXPPHZ128m = 10712 |
| 154927 | CEFBS_None, // VGETEXPPHZ128mb = 10713 |
| 154928 | CEFBS_None, // VGETEXPPHZ128mbk = 10714 |
| 154929 | CEFBS_None, // VGETEXPPHZ128mbkz = 10715 |
| 154930 | CEFBS_None, // VGETEXPPHZ128mk = 10716 |
| 154931 | CEFBS_None, // VGETEXPPHZ128mkz = 10717 |
| 154932 | CEFBS_None, // VGETEXPPHZ128r = 10718 |
| 154933 | CEFBS_None, // VGETEXPPHZ128rk = 10719 |
| 154934 | CEFBS_None, // VGETEXPPHZ128rkz = 10720 |
| 154935 | CEFBS_None, // VGETEXPPHZ256m = 10721 |
| 154936 | CEFBS_None, // VGETEXPPHZ256mb = 10722 |
| 154937 | CEFBS_None, // VGETEXPPHZ256mbk = 10723 |
| 154938 | CEFBS_None, // VGETEXPPHZ256mbkz = 10724 |
| 154939 | CEFBS_None, // VGETEXPPHZ256mk = 10725 |
| 154940 | CEFBS_None, // VGETEXPPHZ256mkz = 10726 |
| 154941 | CEFBS_None, // VGETEXPPHZ256r = 10727 |
| 154942 | CEFBS_None, // VGETEXPPHZ256rk = 10728 |
| 154943 | CEFBS_None, // VGETEXPPHZ256rkz = 10729 |
| 154944 | CEFBS_None, // VGETEXPPHZm = 10730 |
| 154945 | CEFBS_None, // VGETEXPPHZmb = 10731 |
| 154946 | CEFBS_None, // VGETEXPPHZmbk = 10732 |
| 154947 | CEFBS_None, // VGETEXPPHZmbkz = 10733 |
| 154948 | CEFBS_None, // VGETEXPPHZmk = 10734 |
| 154949 | CEFBS_None, // VGETEXPPHZmkz = 10735 |
| 154950 | CEFBS_None, // VGETEXPPHZr = 10736 |
| 154951 | CEFBS_None, // VGETEXPPHZrb = 10737 |
| 154952 | CEFBS_None, // VGETEXPPHZrbk = 10738 |
| 154953 | CEFBS_None, // VGETEXPPHZrbkz = 10739 |
| 154954 | CEFBS_None, // VGETEXPPHZrk = 10740 |
| 154955 | CEFBS_None, // VGETEXPPHZrkz = 10741 |
| 154956 | CEFBS_None, // VGETEXPPSZ128m = 10742 |
| 154957 | CEFBS_None, // VGETEXPPSZ128mb = 10743 |
| 154958 | CEFBS_None, // VGETEXPPSZ128mbk = 10744 |
| 154959 | CEFBS_None, // VGETEXPPSZ128mbkz = 10745 |
| 154960 | CEFBS_None, // VGETEXPPSZ128mk = 10746 |
| 154961 | CEFBS_None, // VGETEXPPSZ128mkz = 10747 |
| 154962 | CEFBS_None, // VGETEXPPSZ128r = 10748 |
| 154963 | CEFBS_None, // VGETEXPPSZ128rk = 10749 |
| 154964 | CEFBS_None, // VGETEXPPSZ128rkz = 10750 |
| 154965 | CEFBS_None, // VGETEXPPSZ256m = 10751 |
| 154966 | CEFBS_None, // VGETEXPPSZ256mb = 10752 |
| 154967 | CEFBS_None, // VGETEXPPSZ256mbk = 10753 |
| 154968 | CEFBS_None, // VGETEXPPSZ256mbkz = 10754 |
| 154969 | CEFBS_None, // VGETEXPPSZ256mk = 10755 |
| 154970 | CEFBS_None, // VGETEXPPSZ256mkz = 10756 |
| 154971 | CEFBS_None, // VGETEXPPSZ256r = 10757 |
| 154972 | CEFBS_None, // VGETEXPPSZ256rk = 10758 |
| 154973 | CEFBS_None, // VGETEXPPSZ256rkz = 10759 |
| 154974 | CEFBS_None, // VGETEXPPSZm = 10760 |
| 154975 | CEFBS_None, // VGETEXPPSZmb = 10761 |
| 154976 | CEFBS_None, // VGETEXPPSZmbk = 10762 |
| 154977 | CEFBS_None, // VGETEXPPSZmbkz = 10763 |
| 154978 | CEFBS_None, // VGETEXPPSZmk = 10764 |
| 154979 | CEFBS_None, // VGETEXPPSZmkz = 10765 |
| 154980 | CEFBS_None, // VGETEXPPSZr = 10766 |
| 154981 | CEFBS_None, // VGETEXPPSZrb = 10767 |
| 154982 | CEFBS_None, // VGETEXPPSZrbk = 10768 |
| 154983 | CEFBS_None, // VGETEXPPSZrbkz = 10769 |
| 154984 | CEFBS_None, // VGETEXPPSZrk = 10770 |
| 154985 | CEFBS_None, // VGETEXPPSZrkz = 10771 |
| 154986 | CEFBS_None, // VGETEXPSDZm = 10772 |
| 154987 | CEFBS_None, // VGETEXPSDZmk = 10773 |
| 154988 | CEFBS_None, // VGETEXPSDZmkz = 10774 |
| 154989 | CEFBS_None, // VGETEXPSDZr = 10775 |
| 154990 | CEFBS_None, // VGETEXPSDZrb = 10776 |
| 154991 | CEFBS_None, // VGETEXPSDZrbk = 10777 |
| 154992 | CEFBS_None, // VGETEXPSDZrbkz = 10778 |
| 154993 | CEFBS_None, // VGETEXPSDZrk = 10779 |
| 154994 | CEFBS_None, // VGETEXPSDZrkz = 10780 |
| 154995 | CEFBS_None, // VGETEXPSHZm = 10781 |
| 154996 | CEFBS_None, // VGETEXPSHZmk = 10782 |
| 154997 | CEFBS_None, // VGETEXPSHZmkz = 10783 |
| 154998 | CEFBS_None, // VGETEXPSHZr = 10784 |
| 154999 | CEFBS_None, // VGETEXPSHZrb = 10785 |
| 155000 | CEFBS_None, // VGETEXPSHZrbk = 10786 |
| 155001 | CEFBS_None, // VGETEXPSHZrbkz = 10787 |
| 155002 | CEFBS_None, // VGETEXPSHZrk = 10788 |
| 155003 | CEFBS_None, // VGETEXPSHZrkz = 10789 |
| 155004 | CEFBS_None, // VGETEXPSSZm = 10790 |
| 155005 | CEFBS_None, // VGETEXPSSZmk = 10791 |
| 155006 | CEFBS_None, // VGETEXPSSZmkz = 10792 |
| 155007 | CEFBS_None, // VGETEXPSSZr = 10793 |
| 155008 | CEFBS_None, // VGETEXPSSZrb = 10794 |
| 155009 | CEFBS_None, // VGETEXPSSZrbk = 10795 |
| 155010 | CEFBS_None, // VGETEXPSSZrbkz = 10796 |
| 155011 | CEFBS_None, // VGETEXPSSZrk = 10797 |
| 155012 | CEFBS_None, // VGETEXPSSZrkz = 10798 |
| 155013 | CEFBS_None, // VGETMANTPDZ128rmbi = 10799 |
| 155014 | CEFBS_None, // VGETMANTPDZ128rmbik = 10800 |
| 155015 | CEFBS_None, // VGETMANTPDZ128rmbikz = 10801 |
| 155016 | CEFBS_None, // VGETMANTPDZ128rmi = 10802 |
| 155017 | CEFBS_None, // VGETMANTPDZ128rmik = 10803 |
| 155018 | CEFBS_None, // VGETMANTPDZ128rmikz = 10804 |
| 155019 | CEFBS_None, // VGETMANTPDZ128rri = 10805 |
| 155020 | CEFBS_None, // VGETMANTPDZ128rrik = 10806 |
| 155021 | CEFBS_None, // VGETMANTPDZ128rrikz = 10807 |
| 155022 | CEFBS_None, // VGETMANTPDZ256rmbi = 10808 |
| 155023 | CEFBS_None, // VGETMANTPDZ256rmbik = 10809 |
| 155024 | CEFBS_None, // VGETMANTPDZ256rmbikz = 10810 |
| 155025 | CEFBS_None, // VGETMANTPDZ256rmi = 10811 |
| 155026 | CEFBS_None, // VGETMANTPDZ256rmik = 10812 |
| 155027 | CEFBS_None, // VGETMANTPDZ256rmikz = 10813 |
| 155028 | CEFBS_None, // VGETMANTPDZ256rri = 10814 |
| 155029 | CEFBS_None, // VGETMANTPDZ256rrik = 10815 |
| 155030 | CEFBS_None, // VGETMANTPDZ256rrikz = 10816 |
| 155031 | CEFBS_None, // VGETMANTPDZrmbi = 10817 |
| 155032 | CEFBS_None, // VGETMANTPDZrmbik = 10818 |
| 155033 | CEFBS_None, // VGETMANTPDZrmbikz = 10819 |
| 155034 | CEFBS_None, // VGETMANTPDZrmi = 10820 |
| 155035 | CEFBS_None, // VGETMANTPDZrmik = 10821 |
| 155036 | CEFBS_None, // VGETMANTPDZrmikz = 10822 |
| 155037 | CEFBS_None, // VGETMANTPDZrri = 10823 |
| 155038 | CEFBS_None, // VGETMANTPDZrrib = 10824 |
| 155039 | CEFBS_None, // VGETMANTPDZrribk = 10825 |
| 155040 | CEFBS_None, // VGETMANTPDZrribkz = 10826 |
| 155041 | CEFBS_None, // VGETMANTPDZrrik = 10827 |
| 155042 | CEFBS_None, // VGETMANTPDZrrikz = 10828 |
| 155043 | CEFBS_None, // VGETMANTPHZ128rmbi = 10829 |
| 155044 | CEFBS_None, // VGETMANTPHZ128rmbik = 10830 |
| 155045 | CEFBS_None, // VGETMANTPHZ128rmbikz = 10831 |
| 155046 | CEFBS_None, // VGETMANTPHZ128rmi = 10832 |
| 155047 | CEFBS_None, // VGETMANTPHZ128rmik = 10833 |
| 155048 | CEFBS_None, // VGETMANTPHZ128rmikz = 10834 |
| 155049 | CEFBS_None, // VGETMANTPHZ128rri = 10835 |
| 155050 | CEFBS_None, // VGETMANTPHZ128rrik = 10836 |
| 155051 | CEFBS_None, // VGETMANTPHZ128rrikz = 10837 |
| 155052 | CEFBS_None, // VGETMANTPHZ256rmbi = 10838 |
| 155053 | CEFBS_None, // VGETMANTPHZ256rmbik = 10839 |
| 155054 | CEFBS_None, // VGETMANTPHZ256rmbikz = 10840 |
| 155055 | CEFBS_None, // VGETMANTPHZ256rmi = 10841 |
| 155056 | CEFBS_None, // VGETMANTPHZ256rmik = 10842 |
| 155057 | CEFBS_None, // VGETMANTPHZ256rmikz = 10843 |
| 155058 | CEFBS_None, // VGETMANTPHZ256rri = 10844 |
| 155059 | CEFBS_None, // VGETMANTPHZ256rrik = 10845 |
| 155060 | CEFBS_None, // VGETMANTPHZ256rrikz = 10846 |
| 155061 | CEFBS_None, // VGETMANTPHZrmbi = 10847 |
| 155062 | CEFBS_None, // VGETMANTPHZrmbik = 10848 |
| 155063 | CEFBS_None, // VGETMANTPHZrmbikz = 10849 |
| 155064 | CEFBS_None, // VGETMANTPHZrmi = 10850 |
| 155065 | CEFBS_None, // VGETMANTPHZrmik = 10851 |
| 155066 | CEFBS_None, // VGETMANTPHZrmikz = 10852 |
| 155067 | CEFBS_None, // VGETMANTPHZrri = 10853 |
| 155068 | CEFBS_None, // VGETMANTPHZrrib = 10854 |
| 155069 | CEFBS_None, // VGETMANTPHZrribk = 10855 |
| 155070 | CEFBS_None, // VGETMANTPHZrribkz = 10856 |
| 155071 | CEFBS_None, // VGETMANTPHZrrik = 10857 |
| 155072 | CEFBS_None, // VGETMANTPHZrrikz = 10858 |
| 155073 | CEFBS_None, // VGETMANTPSZ128rmbi = 10859 |
| 155074 | CEFBS_None, // VGETMANTPSZ128rmbik = 10860 |
| 155075 | CEFBS_None, // VGETMANTPSZ128rmbikz = 10861 |
| 155076 | CEFBS_None, // VGETMANTPSZ128rmi = 10862 |
| 155077 | CEFBS_None, // VGETMANTPSZ128rmik = 10863 |
| 155078 | CEFBS_None, // VGETMANTPSZ128rmikz = 10864 |
| 155079 | CEFBS_None, // VGETMANTPSZ128rri = 10865 |
| 155080 | CEFBS_None, // VGETMANTPSZ128rrik = 10866 |
| 155081 | CEFBS_None, // VGETMANTPSZ128rrikz = 10867 |
| 155082 | CEFBS_None, // VGETMANTPSZ256rmbi = 10868 |
| 155083 | CEFBS_None, // VGETMANTPSZ256rmbik = 10869 |
| 155084 | CEFBS_None, // VGETMANTPSZ256rmbikz = 10870 |
| 155085 | CEFBS_None, // VGETMANTPSZ256rmi = 10871 |
| 155086 | CEFBS_None, // VGETMANTPSZ256rmik = 10872 |
| 155087 | CEFBS_None, // VGETMANTPSZ256rmikz = 10873 |
| 155088 | CEFBS_None, // VGETMANTPSZ256rri = 10874 |
| 155089 | CEFBS_None, // VGETMANTPSZ256rrik = 10875 |
| 155090 | CEFBS_None, // VGETMANTPSZ256rrikz = 10876 |
| 155091 | CEFBS_None, // VGETMANTPSZrmbi = 10877 |
| 155092 | CEFBS_None, // VGETMANTPSZrmbik = 10878 |
| 155093 | CEFBS_None, // VGETMANTPSZrmbikz = 10879 |
| 155094 | CEFBS_None, // VGETMANTPSZrmi = 10880 |
| 155095 | CEFBS_None, // VGETMANTPSZrmik = 10881 |
| 155096 | CEFBS_None, // VGETMANTPSZrmikz = 10882 |
| 155097 | CEFBS_None, // VGETMANTPSZrri = 10883 |
| 155098 | CEFBS_None, // VGETMANTPSZrrib = 10884 |
| 155099 | CEFBS_None, // VGETMANTPSZrribk = 10885 |
| 155100 | CEFBS_None, // VGETMANTPSZrribkz = 10886 |
| 155101 | CEFBS_None, // VGETMANTPSZrrik = 10887 |
| 155102 | CEFBS_None, // VGETMANTPSZrrikz = 10888 |
| 155103 | CEFBS_None, // VGETMANTSDZrmi = 10889 |
| 155104 | CEFBS_None, // VGETMANTSDZrmik = 10890 |
| 155105 | CEFBS_None, // VGETMANTSDZrmikz = 10891 |
| 155106 | CEFBS_None, // VGETMANTSDZrri = 10892 |
| 155107 | CEFBS_None, // VGETMANTSDZrrib = 10893 |
| 155108 | CEFBS_None, // VGETMANTSDZrribk = 10894 |
| 155109 | CEFBS_None, // VGETMANTSDZrribkz = 10895 |
| 155110 | CEFBS_None, // VGETMANTSDZrrik = 10896 |
| 155111 | CEFBS_None, // VGETMANTSDZrrikz = 10897 |
| 155112 | CEFBS_None, // VGETMANTSHZrmi = 10898 |
| 155113 | CEFBS_None, // VGETMANTSHZrmik = 10899 |
| 155114 | CEFBS_None, // VGETMANTSHZrmikz = 10900 |
| 155115 | CEFBS_None, // VGETMANTSHZrri = 10901 |
| 155116 | CEFBS_None, // VGETMANTSHZrrib = 10902 |
| 155117 | CEFBS_None, // VGETMANTSHZrribk = 10903 |
| 155118 | CEFBS_None, // VGETMANTSHZrribkz = 10904 |
| 155119 | CEFBS_None, // VGETMANTSHZrrik = 10905 |
| 155120 | CEFBS_None, // VGETMANTSHZrrikz = 10906 |
| 155121 | CEFBS_None, // VGETMANTSSZrmi = 10907 |
| 155122 | CEFBS_None, // VGETMANTSSZrmik = 10908 |
| 155123 | CEFBS_None, // VGETMANTSSZrmikz = 10909 |
| 155124 | CEFBS_None, // VGETMANTSSZrri = 10910 |
| 155125 | CEFBS_None, // VGETMANTSSZrrib = 10911 |
| 155126 | CEFBS_None, // VGETMANTSSZrribk = 10912 |
| 155127 | CEFBS_None, // VGETMANTSSZrribkz = 10913 |
| 155128 | CEFBS_None, // VGETMANTSSZrrik = 10914 |
| 155129 | CEFBS_None, // VGETMANTSSZrrikz = 10915 |
| 155130 | CEFBS_None, // VGF2P8AFFINEINVQBYrmi = 10916 |
| 155131 | CEFBS_None, // VGF2P8AFFINEINVQBYrri = 10917 |
| 155132 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmbi = 10918 |
| 155133 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmbik = 10919 |
| 155134 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmbikz = 10920 |
| 155135 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmi = 10921 |
| 155136 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmik = 10922 |
| 155137 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rmikz = 10923 |
| 155138 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rri = 10924 |
| 155139 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rrik = 10925 |
| 155140 | CEFBS_None, // VGF2P8AFFINEINVQBZ128rrikz = 10926 |
| 155141 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmbi = 10927 |
| 155142 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmbik = 10928 |
| 155143 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmbikz = 10929 |
| 155144 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmi = 10930 |
| 155145 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmik = 10931 |
| 155146 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rmikz = 10932 |
| 155147 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rri = 10933 |
| 155148 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rrik = 10934 |
| 155149 | CEFBS_None, // VGF2P8AFFINEINVQBZ256rrikz = 10935 |
| 155150 | CEFBS_None, // VGF2P8AFFINEINVQBZrmbi = 10936 |
| 155151 | CEFBS_None, // VGF2P8AFFINEINVQBZrmbik = 10937 |
| 155152 | CEFBS_None, // VGF2P8AFFINEINVQBZrmbikz = 10938 |
| 155153 | CEFBS_None, // VGF2P8AFFINEINVQBZrmi = 10939 |
| 155154 | CEFBS_None, // VGF2P8AFFINEINVQBZrmik = 10940 |
| 155155 | CEFBS_None, // VGF2P8AFFINEINVQBZrmikz = 10941 |
| 155156 | CEFBS_None, // VGF2P8AFFINEINVQBZrri = 10942 |
| 155157 | CEFBS_None, // VGF2P8AFFINEINVQBZrrik = 10943 |
| 155158 | CEFBS_None, // VGF2P8AFFINEINVQBZrrikz = 10944 |
| 155159 | CEFBS_None, // VGF2P8AFFINEINVQBrmi = 10945 |
| 155160 | CEFBS_None, // VGF2P8AFFINEINVQBrri = 10946 |
| 155161 | CEFBS_None, // VGF2P8AFFINEQBYrmi = 10947 |
| 155162 | CEFBS_None, // VGF2P8AFFINEQBYrri = 10948 |
| 155163 | CEFBS_None, // VGF2P8AFFINEQBZ128rmbi = 10949 |
| 155164 | CEFBS_None, // VGF2P8AFFINEQBZ128rmbik = 10950 |
| 155165 | CEFBS_None, // VGF2P8AFFINEQBZ128rmbikz = 10951 |
| 155166 | CEFBS_None, // VGF2P8AFFINEQBZ128rmi = 10952 |
| 155167 | CEFBS_None, // VGF2P8AFFINEQBZ128rmik = 10953 |
| 155168 | CEFBS_None, // VGF2P8AFFINEQBZ128rmikz = 10954 |
| 155169 | CEFBS_None, // VGF2P8AFFINEQBZ128rri = 10955 |
| 155170 | CEFBS_None, // VGF2P8AFFINEQBZ128rrik = 10956 |
| 155171 | CEFBS_None, // VGF2P8AFFINEQBZ128rrikz = 10957 |
| 155172 | CEFBS_None, // VGF2P8AFFINEQBZ256rmbi = 10958 |
| 155173 | CEFBS_None, // VGF2P8AFFINEQBZ256rmbik = 10959 |
| 155174 | CEFBS_None, // VGF2P8AFFINEQBZ256rmbikz = 10960 |
| 155175 | CEFBS_None, // VGF2P8AFFINEQBZ256rmi = 10961 |
| 155176 | CEFBS_None, // VGF2P8AFFINEQBZ256rmik = 10962 |
| 155177 | CEFBS_None, // VGF2P8AFFINEQBZ256rmikz = 10963 |
| 155178 | CEFBS_None, // VGF2P8AFFINEQBZ256rri = 10964 |
| 155179 | CEFBS_None, // VGF2P8AFFINEQBZ256rrik = 10965 |
| 155180 | CEFBS_None, // VGF2P8AFFINEQBZ256rrikz = 10966 |
| 155181 | CEFBS_None, // VGF2P8AFFINEQBZrmbi = 10967 |
| 155182 | CEFBS_None, // VGF2P8AFFINEQBZrmbik = 10968 |
| 155183 | CEFBS_None, // VGF2P8AFFINEQBZrmbikz = 10969 |
| 155184 | CEFBS_None, // VGF2P8AFFINEQBZrmi = 10970 |
| 155185 | CEFBS_None, // VGF2P8AFFINEQBZrmik = 10971 |
| 155186 | CEFBS_None, // VGF2P8AFFINEQBZrmikz = 10972 |
| 155187 | CEFBS_None, // VGF2P8AFFINEQBZrri = 10973 |
| 155188 | CEFBS_None, // VGF2P8AFFINEQBZrrik = 10974 |
| 155189 | CEFBS_None, // VGF2P8AFFINEQBZrrikz = 10975 |
| 155190 | CEFBS_None, // VGF2P8AFFINEQBrmi = 10976 |
| 155191 | CEFBS_None, // VGF2P8AFFINEQBrri = 10977 |
| 155192 | CEFBS_None, // VGF2P8MULBYrm = 10978 |
| 155193 | CEFBS_None, // VGF2P8MULBYrr = 10979 |
| 155194 | CEFBS_None, // VGF2P8MULBZ128rm = 10980 |
| 155195 | CEFBS_None, // VGF2P8MULBZ128rmk = 10981 |
| 155196 | CEFBS_None, // VGF2P8MULBZ128rmkz = 10982 |
| 155197 | CEFBS_None, // VGF2P8MULBZ128rr = 10983 |
| 155198 | CEFBS_None, // VGF2P8MULBZ128rrk = 10984 |
| 155199 | CEFBS_None, // VGF2P8MULBZ128rrkz = 10985 |
| 155200 | CEFBS_None, // VGF2P8MULBZ256rm = 10986 |
| 155201 | CEFBS_None, // VGF2P8MULBZ256rmk = 10987 |
| 155202 | CEFBS_None, // VGF2P8MULBZ256rmkz = 10988 |
| 155203 | CEFBS_None, // VGF2P8MULBZ256rr = 10989 |
| 155204 | CEFBS_None, // VGF2P8MULBZ256rrk = 10990 |
| 155205 | CEFBS_None, // VGF2P8MULBZ256rrkz = 10991 |
| 155206 | CEFBS_None, // VGF2P8MULBZrm = 10992 |
| 155207 | CEFBS_None, // VGF2P8MULBZrmk = 10993 |
| 155208 | CEFBS_None, // VGF2P8MULBZrmkz = 10994 |
| 155209 | CEFBS_None, // VGF2P8MULBZrr = 10995 |
| 155210 | CEFBS_None, // VGF2P8MULBZrrk = 10996 |
| 155211 | CEFBS_None, // VGF2P8MULBZrrkz = 10997 |
| 155212 | CEFBS_None, // VGF2P8MULBrm = 10998 |
| 155213 | CEFBS_None, // VGF2P8MULBrr = 10999 |
| 155214 | CEFBS_None, // VHADDPDYrm = 11000 |
| 155215 | CEFBS_None, // VHADDPDYrr = 11001 |
| 155216 | CEFBS_None, // VHADDPDrm = 11002 |
| 155217 | CEFBS_None, // VHADDPDrr = 11003 |
| 155218 | CEFBS_None, // VHADDPSYrm = 11004 |
| 155219 | CEFBS_None, // VHADDPSYrr = 11005 |
| 155220 | CEFBS_None, // VHADDPSrm = 11006 |
| 155221 | CEFBS_None, // VHADDPSrr = 11007 |
| 155222 | CEFBS_None, // VHSUBPDYrm = 11008 |
| 155223 | CEFBS_None, // VHSUBPDYrr = 11009 |
| 155224 | CEFBS_None, // VHSUBPDrm = 11010 |
| 155225 | CEFBS_None, // VHSUBPDrr = 11011 |
| 155226 | CEFBS_None, // VHSUBPSYrm = 11012 |
| 155227 | CEFBS_None, // VHSUBPSYrr = 11013 |
| 155228 | CEFBS_None, // VHSUBPSrm = 11014 |
| 155229 | CEFBS_None, // VHSUBPSrr = 11015 |
| 155230 | CEFBS_None, // VINSERTF128rm = 11016 |
| 155231 | CEFBS_None, // VINSERTF128rr = 11017 |
| 155232 | CEFBS_None, // VINSERTF32x4Z256rm = 11018 |
| 155233 | CEFBS_None, // VINSERTF32x4Z256rmk = 11019 |
| 155234 | CEFBS_None, // VINSERTF32x4Z256rmkz = 11020 |
| 155235 | CEFBS_None, // VINSERTF32x4Z256rr = 11021 |
| 155236 | CEFBS_None, // VINSERTF32x4Z256rrk = 11022 |
| 155237 | CEFBS_None, // VINSERTF32x4Z256rrkz = 11023 |
| 155238 | CEFBS_None, // VINSERTF32x4Zrm = 11024 |
| 155239 | CEFBS_None, // VINSERTF32x4Zrmk = 11025 |
| 155240 | CEFBS_None, // VINSERTF32x4Zrmkz = 11026 |
| 155241 | CEFBS_None, // VINSERTF32x4Zrr = 11027 |
| 155242 | CEFBS_None, // VINSERTF32x4Zrrk = 11028 |
| 155243 | CEFBS_None, // VINSERTF32x4Zrrkz = 11029 |
| 155244 | CEFBS_None, // VINSERTF32x8Zrm = 11030 |
| 155245 | CEFBS_None, // VINSERTF32x8Zrmk = 11031 |
| 155246 | CEFBS_None, // VINSERTF32x8Zrmkz = 11032 |
| 155247 | CEFBS_None, // VINSERTF32x8Zrr = 11033 |
| 155248 | CEFBS_None, // VINSERTF32x8Zrrk = 11034 |
| 155249 | CEFBS_None, // VINSERTF32x8Zrrkz = 11035 |
| 155250 | CEFBS_None, // VINSERTF64x2Z256rm = 11036 |
| 155251 | CEFBS_None, // VINSERTF64x2Z256rmk = 11037 |
| 155252 | CEFBS_None, // VINSERTF64x2Z256rmkz = 11038 |
| 155253 | CEFBS_None, // VINSERTF64x2Z256rr = 11039 |
| 155254 | CEFBS_None, // VINSERTF64x2Z256rrk = 11040 |
| 155255 | CEFBS_None, // VINSERTF64x2Z256rrkz = 11041 |
| 155256 | CEFBS_None, // VINSERTF64x2Zrm = 11042 |
| 155257 | CEFBS_None, // VINSERTF64x2Zrmk = 11043 |
| 155258 | CEFBS_None, // VINSERTF64x2Zrmkz = 11044 |
| 155259 | CEFBS_None, // VINSERTF64x2Zrr = 11045 |
| 155260 | CEFBS_None, // VINSERTF64x2Zrrk = 11046 |
| 155261 | CEFBS_None, // VINSERTF64x2Zrrkz = 11047 |
| 155262 | CEFBS_None, // VINSERTF64x4Zrm = 11048 |
| 155263 | CEFBS_None, // VINSERTF64x4Zrmk = 11049 |
| 155264 | CEFBS_None, // VINSERTF64x4Zrmkz = 11050 |
| 155265 | CEFBS_None, // VINSERTF64x4Zrr = 11051 |
| 155266 | CEFBS_None, // VINSERTF64x4Zrrk = 11052 |
| 155267 | CEFBS_None, // VINSERTF64x4Zrrkz = 11053 |
| 155268 | CEFBS_None, // VINSERTI128rm = 11054 |
| 155269 | CEFBS_None, // VINSERTI128rr = 11055 |
| 155270 | CEFBS_None, // VINSERTI32x4Z256rm = 11056 |
| 155271 | CEFBS_None, // VINSERTI32x4Z256rmk = 11057 |
| 155272 | CEFBS_None, // VINSERTI32x4Z256rmkz = 11058 |
| 155273 | CEFBS_None, // VINSERTI32x4Z256rr = 11059 |
| 155274 | CEFBS_None, // VINSERTI32x4Z256rrk = 11060 |
| 155275 | CEFBS_None, // VINSERTI32x4Z256rrkz = 11061 |
| 155276 | CEFBS_None, // VINSERTI32x4Zrm = 11062 |
| 155277 | CEFBS_None, // VINSERTI32x4Zrmk = 11063 |
| 155278 | CEFBS_None, // VINSERTI32x4Zrmkz = 11064 |
| 155279 | CEFBS_None, // VINSERTI32x4Zrr = 11065 |
| 155280 | CEFBS_None, // VINSERTI32x4Zrrk = 11066 |
| 155281 | CEFBS_None, // VINSERTI32x4Zrrkz = 11067 |
| 155282 | CEFBS_None, // VINSERTI32x8Zrm = 11068 |
| 155283 | CEFBS_None, // VINSERTI32x8Zrmk = 11069 |
| 155284 | CEFBS_None, // VINSERTI32x8Zrmkz = 11070 |
| 155285 | CEFBS_None, // VINSERTI32x8Zrr = 11071 |
| 155286 | CEFBS_None, // VINSERTI32x8Zrrk = 11072 |
| 155287 | CEFBS_None, // VINSERTI32x8Zrrkz = 11073 |
| 155288 | CEFBS_None, // VINSERTI64x2Z256rm = 11074 |
| 155289 | CEFBS_None, // VINSERTI64x2Z256rmk = 11075 |
| 155290 | CEFBS_None, // VINSERTI64x2Z256rmkz = 11076 |
| 155291 | CEFBS_None, // VINSERTI64x2Z256rr = 11077 |
| 155292 | CEFBS_None, // VINSERTI64x2Z256rrk = 11078 |
| 155293 | CEFBS_None, // VINSERTI64x2Z256rrkz = 11079 |
| 155294 | CEFBS_None, // VINSERTI64x2Zrm = 11080 |
| 155295 | CEFBS_None, // VINSERTI64x2Zrmk = 11081 |
| 155296 | CEFBS_None, // VINSERTI64x2Zrmkz = 11082 |
| 155297 | CEFBS_None, // VINSERTI64x2Zrr = 11083 |
| 155298 | CEFBS_None, // VINSERTI64x2Zrrk = 11084 |
| 155299 | CEFBS_None, // VINSERTI64x2Zrrkz = 11085 |
| 155300 | CEFBS_None, // VINSERTI64x4Zrm = 11086 |
| 155301 | CEFBS_None, // VINSERTI64x4Zrmk = 11087 |
| 155302 | CEFBS_None, // VINSERTI64x4Zrmkz = 11088 |
| 155303 | CEFBS_None, // VINSERTI64x4Zrr = 11089 |
| 155304 | CEFBS_None, // VINSERTI64x4Zrrk = 11090 |
| 155305 | CEFBS_None, // VINSERTI64x4Zrrkz = 11091 |
| 155306 | CEFBS_None, // VINSERTPSZrm = 11092 |
| 155307 | CEFBS_None, // VINSERTPSZrr = 11093 |
| 155308 | CEFBS_None, // VINSERTPSrm = 11094 |
| 155309 | CEFBS_None, // VINSERTPSrr = 11095 |
| 155310 | CEFBS_None, // VLDDQUYrm = 11096 |
| 155311 | CEFBS_None, // VLDDQUrm = 11097 |
| 155312 | CEFBS_None, // VLDMXCSR = 11098 |
| 155313 | CEFBS_None, // VMASKMOVDQU = 11099 |
| 155314 | CEFBS_In64BitMode, // VMASKMOVDQU64 = 11100 |
| 155315 | CEFBS_None, // VMASKMOVPDYmr = 11101 |
| 155316 | CEFBS_None, // VMASKMOVPDYrm = 11102 |
| 155317 | CEFBS_None, // VMASKMOVPDmr = 11103 |
| 155318 | CEFBS_None, // VMASKMOVPDrm = 11104 |
| 155319 | CEFBS_None, // VMASKMOVPSYmr = 11105 |
| 155320 | CEFBS_None, // VMASKMOVPSYrm = 11106 |
| 155321 | CEFBS_None, // VMASKMOVPSmr = 11107 |
| 155322 | CEFBS_None, // VMASKMOVPSrm = 11108 |
| 155323 | CEFBS_None, // VMAXCPDYrm = 11109 |
| 155324 | CEFBS_None, // VMAXCPDYrr = 11110 |
| 155325 | CEFBS_None, // VMAXCPDZ128rm = 11111 |
| 155326 | CEFBS_None, // VMAXCPDZ128rmb = 11112 |
| 155327 | CEFBS_None, // VMAXCPDZ128rmbk = 11113 |
| 155328 | CEFBS_None, // VMAXCPDZ128rmbkz = 11114 |
| 155329 | CEFBS_None, // VMAXCPDZ128rmk = 11115 |
| 155330 | CEFBS_None, // VMAXCPDZ128rmkz = 11116 |
| 155331 | CEFBS_None, // VMAXCPDZ128rr = 11117 |
| 155332 | CEFBS_None, // VMAXCPDZ128rrk = 11118 |
| 155333 | CEFBS_None, // VMAXCPDZ128rrkz = 11119 |
| 155334 | CEFBS_None, // VMAXCPDZ256rm = 11120 |
| 155335 | CEFBS_None, // VMAXCPDZ256rmb = 11121 |
| 155336 | CEFBS_None, // VMAXCPDZ256rmbk = 11122 |
| 155337 | CEFBS_None, // VMAXCPDZ256rmbkz = 11123 |
| 155338 | CEFBS_None, // VMAXCPDZ256rmk = 11124 |
| 155339 | CEFBS_None, // VMAXCPDZ256rmkz = 11125 |
| 155340 | CEFBS_None, // VMAXCPDZ256rr = 11126 |
| 155341 | CEFBS_None, // VMAXCPDZ256rrk = 11127 |
| 155342 | CEFBS_None, // VMAXCPDZ256rrkz = 11128 |
| 155343 | CEFBS_None, // VMAXCPDZrm = 11129 |
| 155344 | CEFBS_None, // VMAXCPDZrmb = 11130 |
| 155345 | CEFBS_None, // VMAXCPDZrmbk = 11131 |
| 155346 | CEFBS_None, // VMAXCPDZrmbkz = 11132 |
| 155347 | CEFBS_None, // VMAXCPDZrmk = 11133 |
| 155348 | CEFBS_None, // VMAXCPDZrmkz = 11134 |
| 155349 | CEFBS_None, // VMAXCPDZrr = 11135 |
| 155350 | CEFBS_None, // VMAXCPDZrrk = 11136 |
| 155351 | CEFBS_None, // VMAXCPDZrrkz = 11137 |
| 155352 | CEFBS_None, // VMAXCPDrm = 11138 |
| 155353 | CEFBS_None, // VMAXCPDrr = 11139 |
| 155354 | CEFBS_None, // VMAXCPHZ128rm = 11140 |
| 155355 | CEFBS_None, // VMAXCPHZ128rmb = 11141 |
| 155356 | CEFBS_None, // VMAXCPHZ128rmbk = 11142 |
| 155357 | CEFBS_None, // VMAXCPHZ128rmbkz = 11143 |
| 155358 | CEFBS_None, // VMAXCPHZ128rmk = 11144 |
| 155359 | CEFBS_None, // VMAXCPHZ128rmkz = 11145 |
| 155360 | CEFBS_None, // VMAXCPHZ128rr = 11146 |
| 155361 | CEFBS_None, // VMAXCPHZ128rrk = 11147 |
| 155362 | CEFBS_None, // VMAXCPHZ128rrkz = 11148 |
| 155363 | CEFBS_None, // VMAXCPHZ256rm = 11149 |
| 155364 | CEFBS_None, // VMAXCPHZ256rmb = 11150 |
| 155365 | CEFBS_None, // VMAXCPHZ256rmbk = 11151 |
| 155366 | CEFBS_None, // VMAXCPHZ256rmbkz = 11152 |
| 155367 | CEFBS_None, // VMAXCPHZ256rmk = 11153 |
| 155368 | CEFBS_None, // VMAXCPHZ256rmkz = 11154 |
| 155369 | CEFBS_None, // VMAXCPHZ256rr = 11155 |
| 155370 | CEFBS_None, // VMAXCPHZ256rrk = 11156 |
| 155371 | CEFBS_None, // VMAXCPHZ256rrkz = 11157 |
| 155372 | CEFBS_None, // VMAXCPHZrm = 11158 |
| 155373 | CEFBS_None, // VMAXCPHZrmb = 11159 |
| 155374 | CEFBS_None, // VMAXCPHZrmbk = 11160 |
| 155375 | CEFBS_None, // VMAXCPHZrmbkz = 11161 |
| 155376 | CEFBS_None, // VMAXCPHZrmk = 11162 |
| 155377 | CEFBS_None, // VMAXCPHZrmkz = 11163 |
| 155378 | CEFBS_None, // VMAXCPHZrr = 11164 |
| 155379 | CEFBS_None, // VMAXCPHZrrk = 11165 |
| 155380 | CEFBS_None, // VMAXCPHZrrkz = 11166 |
| 155381 | CEFBS_None, // VMAXCPSYrm = 11167 |
| 155382 | CEFBS_None, // VMAXCPSYrr = 11168 |
| 155383 | CEFBS_None, // VMAXCPSZ128rm = 11169 |
| 155384 | CEFBS_None, // VMAXCPSZ128rmb = 11170 |
| 155385 | CEFBS_None, // VMAXCPSZ128rmbk = 11171 |
| 155386 | CEFBS_None, // VMAXCPSZ128rmbkz = 11172 |
| 155387 | CEFBS_None, // VMAXCPSZ128rmk = 11173 |
| 155388 | CEFBS_None, // VMAXCPSZ128rmkz = 11174 |
| 155389 | CEFBS_None, // VMAXCPSZ128rr = 11175 |
| 155390 | CEFBS_None, // VMAXCPSZ128rrk = 11176 |
| 155391 | CEFBS_None, // VMAXCPSZ128rrkz = 11177 |
| 155392 | CEFBS_None, // VMAXCPSZ256rm = 11178 |
| 155393 | CEFBS_None, // VMAXCPSZ256rmb = 11179 |
| 155394 | CEFBS_None, // VMAXCPSZ256rmbk = 11180 |
| 155395 | CEFBS_None, // VMAXCPSZ256rmbkz = 11181 |
| 155396 | CEFBS_None, // VMAXCPSZ256rmk = 11182 |
| 155397 | CEFBS_None, // VMAXCPSZ256rmkz = 11183 |
| 155398 | CEFBS_None, // VMAXCPSZ256rr = 11184 |
| 155399 | CEFBS_None, // VMAXCPSZ256rrk = 11185 |
| 155400 | CEFBS_None, // VMAXCPSZ256rrkz = 11186 |
| 155401 | CEFBS_None, // VMAXCPSZrm = 11187 |
| 155402 | CEFBS_None, // VMAXCPSZrmb = 11188 |
| 155403 | CEFBS_None, // VMAXCPSZrmbk = 11189 |
| 155404 | CEFBS_None, // VMAXCPSZrmbkz = 11190 |
| 155405 | CEFBS_None, // VMAXCPSZrmk = 11191 |
| 155406 | CEFBS_None, // VMAXCPSZrmkz = 11192 |
| 155407 | CEFBS_None, // VMAXCPSZrr = 11193 |
| 155408 | CEFBS_None, // VMAXCPSZrrk = 11194 |
| 155409 | CEFBS_None, // VMAXCPSZrrkz = 11195 |
| 155410 | CEFBS_None, // VMAXCPSrm = 11196 |
| 155411 | CEFBS_None, // VMAXCPSrr = 11197 |
| 155412 | CEFBS_None, // VMAXCSDZrm = 11198 |
| 155413 | CEFBS_None, // VMAXCSDZrr = 11199 |
| 155414 | CEFBS_None, // VMAXCSDrm = 11200 |
| 155415 | CEFBS_None, // VMAXCSDrr = 11201 |
| 155416 | CEFBS_None, // VMAXCSHZrm = 11202 |
| 155417 | CEFBS_None, // VMAXCSHZrr = 11203 |
| 155418 | CEFBS_None, // VMAXCSSZrm = 11204 |
| 155419 | CEFBS_None, // VMAXCSSZrr = 11205 |
| 155420 | CEFBS_None, // VMAXCSSrm = 11206 |
| 155421 | CEFBS_None, // VMAXCSSrr = 11207 |
| 155422 | CEFBS_None, // VMAXPDYrm = 11208 |
| 155423 | CEFBS_None, // VMAXPDYrr = 11209 |
| 155424 | CEFBS_None, // VMAXPDZ128rm = 11210 |
| 155425 | CEFBS_None, // VMAXPDZ128rmb = 11211 |
| 155426 | CEFBS_None, // VMAXPDZ128rmbk = 11212 |
| 155427 | CEFBS_None, // VMAXPDZ128rmbkz = 11213 |
| 155428 | CEFBS_None, // VMAXPDZ128rmk = 11214 |
| 155429 | CEFBS_None, // VMAXPDZ128rmkz = 11215 |
| 155430 | CEFBS_None, // VMAXPDZ128rr = 11216 |
| 155431 | CEFBS_None, // VMAXPDZ128rrk = 11217 |
| 155432 | CEFBS_None, // VMAXPDZ128rrkz = 11218 |
| 155433 | CEFBS_None, // VMAXPDZ256rm = 11219 |
| 155434 | CEFBS_None, // VMAXPDZ256rmb = 11220 |
| 155435 | CEFBS_None, // VMAXPDZ256rmbk = 11221 |
| 155436 | CEFBS_None, // VMAXPDZ256rmbkz = 11222 |
| 155437 | CEFBS_None, // VMAXPDZ256rmk = 11223 |
| 155438 | CEFBS_None, // VMAXPDZ256rmkz = 11224 |
| 155439 | CEFBS_None, // VMAXPDZ256rr = 11225 |
| 155440 | CEFBS_None, // VMAXPDZ256rrk = 11226 |
| 155441 | CEFBS_None, // VMAXPDZ256rrkz = 11227 |
| 155442 | CEFBS_None, // VMAXPDZrm = 11228 |
| 155443 | CEFBS_None, // VMAXPDZrmb = 11229 |
| 155444 | CEFBS_None, // VMAXPDZrmbk = 11230 |
| 155445 | CEFBS_None, // VMAXPDZrmbkz = 11231 |
| 155446 | CEFBS_None, // VMAXPDZrmk = 11232 |
| 155447 | CEFBS_None, // VMAXPDZrmkz = 11233 |
| 155448 | CEFBS_None, // VMAXPDZrr = 11234 |
| 155449 | CEFBS_None, // VMAXPDZrrb = 11235 |
| 155450 | CEFBS_None, // VMAXPDZrrbk = 11236 |
| 155451 | CEFBS_None, // VMAXPDZrrbkz = 11237 |
| 155452 | CEFBS_None, // VMAXPDZrrk = 11238 |
| 155453 | CEFBS_None, // VMAXPDZrrkz = 11239 |
| 155454 | CEFBS_None, // VMAXPDrm = 11240 |
| 155455 | CEFBS_None, // VMAXPDrr = 11241 |
| 155456 | CEFBS_None, // VMAXPHZ128rm = 11242 |
| 155457 | CEFBS_None, // VMAXPHZ128rmb = 11243 |
| 155458 | CEFBS_None, // VMAXPHZ128rmbk = 11244 |
| 155459 | CEFBS_None, // VMAXPHZ128rmbkz = 11245 |
| 155460 | CEFBS_None, // VMAXPHZ128rmk = 11246 |
| 155461 | CEFBS_None, // VMAXPHZ128rmkz = 11247 |
| 155462 | CEFBS_None, // VMAXPHZ128rr = 11248 |
| 155463 | CEFBS_None, // VMAXPHZ128rrk = 11249 |
| 155464 | CEFBS_None, // VMAXPHZ128rrkz = 11250 |
| 155465 | CEFBS_None, // VMAXPHZ256rm = 11251 |
| 155466 | CEFBS_None, // VMAXPHZ256rmb = 11252 |
| 155467 | CEFBS_None, // VMAXPHZ256rmbk = 11253 |
| 155468 | CEFBS_None, // VMAXPHZ256rmbkz = 11254 |
| 155469 | CEFBS_None, // VMAXPHZ256rmk = 11255 |
| 155470 | CEFBS_None, // VMAXPHZ256rmkz = 11256 |
| 155471 | CEFBS_None, // VMAXPHZ256rr = 11257 |
| 155472 | CEFBS_None, // VMAXPHZ256rrk = 11258 |
| 155473 | CEFBS_None, // VMAXPHZ256rrkz = 11259 |
| 155474 | CEFBS_None, // VMAXPHZrm = 11260 |
| 155475 | CEFBS_None, // VMAXPHZrmb = 11261 |
| 155476 | CEFBS_None, // VMAXPHZrmbk = 11262 |
| 155477 | CEFBS_None, // VMAXPHZrmbkz = 11263 |
| 155478 | CEFBS_None, // VMAXPHZrmk = 11264 |
| 155479 | CEFBS_None, // VMAXPHZrmkz = 11265 |
| 155480 | CEFBS_None, // VMAXPHZrr = 11266 |
| 155481 | CEFBS_None, // VMAXPHZrrb = 11267 |
| 155482 | CEFBS_None, // VMAXPHZrrbk = 11268 |
| 155483 | CEFBS_None, // VMAXPHZrrbkz = 11269 |
| 155484 | CEFBS_None, // VMAXPHZrrk = 11270 |
| 155485 | CEFBS_None, // VMAXPHZrrkz = 11271 |
| 155486 | CEFBS_None, // VMAXPSYrm = 11272 |
| 155487 | CEFBS_None, // VMAXPSYrr = 11273 |
| 155488 | CEFBS_None, // VMAXPSZ128rm = 11274 |
| 155489 | CEFBS_None, // VMAXPSZ128rmb = 11275 |
| 155490 | CEFBS_None, // VMAXPSZ128rmbk = 11276 |
| 155491 | CEFBS_None, // VMAXPSZ128rmbkz = 11277 |
| 155492 | CEFBS_None, // VMAXPSZ128rmk = 11278 |
| 155493 | CEFBS_None, // VMAXPSZ128rmkz = 11279 |
| 155494 | CEFBS_None, // VMAXPSZ128rr = 11280 |
| 155495 | CEFBS_None, // VMAXPSZ128rrk = 11281 |
| 155496 | CEFBS_None, // VMAXPSZ128rrkz = 11282 |
| 155497 | CEFBS_None, // VMAXPSZ256rm = 11283 |
| 155498 | CEFBS_None, // VMAXPSZ256rmb = 11284 |
| 155499 | CEFBS_None, // VMAXPSZ256rmbk = 11285 |
| 155500 | CEFBS_None, // VMAXPSZ256rmbkz = 11286 |
| 155501 | CEFBS_None, // VMAXPSZ256rmk = 11287 |
| 155502 | CEFBS_None, // VMAXPSZ256rmkz = 11288 |
| 155503 | CEFBS_None, // VMAXPSZ256rr = 11289 |
| 155504 | CEFBS_None, // VMAXPSZ256rrk = 11290 |
| 155505 | CEFBS_None, // VMAXPSZ256rrkz = 11291 |
| 155506 | CEFBS_None, // VMAXPSZrm = 11292 |
| 155507 | CEFBS_None, // VMAXPSZrmb = 11293 |
| 155508 | CEFBS_None, // VMAXPSZrmbk = 11294 |
| 155509 | CEFBS_None, // VMAXPSZrmbkz = 11295 |
| 155510 | CEFBS_None, // VMAXPSZrmk = 11296 |
| 155511 | CEFBS_None, // VMAXPSZrmkz = 11297 |
| 155512 | CEFBS_None, // VMAXPSZrr = 11298 |
| 155513 | CEFBS_None, // VMAXPSZrrb = 11299 |
| 155514 | CEFBS_None, // VMAXPSZrrbk = 11300 |
| 155515 | CEFBS_None, // VMAXPSZrrbkz = 11301 |
| 155516 | CEFBS_None, // VMAXPSZrrk = 11302 |
| 155517 | CEFBS_None, // VMAXPSZrrkz = 11303 |
| 155518 | CEFBS_None, // VMAXPSrm = 11304 |
| 155519 | CEFBS_None, // VMAXPSrr = 11305 |
| 155520 | CEFBS_None, // VMAXSDZrm = 11306 |
| 155521 | CEFBS_None, // VMAXSDZrm_Int = 11307 |
| 155522 | CEFBS_None, // VMAXSDZrm_Intk = 11308 |
| 155523 | CEFBS_None, // VMAXSDZrm_Intkz = 11309 |
| 155524 | CEFBS_None, // VMAXSDZrr = 11310 |
| 155525 | CEFBS_None, // VMAXSDZrr_Int = 11311 |
| 155526 | CEFBS_None, // VMAXSDZrr_Intk = 11312 |
| 155527 | CEFBS_None, // VMAXSDZrr_Intkz = 11313 |
| 155528 | CEFBS_None, // VMAXSDZrrb_Int = 11314 |
| 155529 | CEFBS_None, // VMAXSDZrrb_Intk = 11315 |
| 155530 | CEFBS_None, // VMAXSDZrrb_Intkz = 11316 |
| 155531 | CEFBS_None, // VMAXSDrm = 11317 |
| 155532 | CEFBS_None, // VMAXSDrm_Int = 11318 |
| 155533 | CEFBS_None, // VMAXSDrr = 11319 |
| 155534 | CEFBS_None, // VMAXSDrr_Int = 11320 |
| 155535 | CEFBS_None, // VMAXSHZrm = 11321 |
| 155536 | CEFBS_None, // VMAXSHZrm_Int = 11322 |
| 155537 | CEFBS_None, // VMAXSHZrm_Intk = 11323 |
| 155538 | CEFBS_None, // VMAXSHZrm_Intkz = 11324 |
| 155539 | CEFBS_None, // VMAXSHZrr = 11325 |
| 155540 | CEFBS_None, // VMAXSHZrr_Int = 11326 |
| 155541 | CEFBS_None, // VMAXSHZrr_Intk = 11327 |
| 155542 | CEFBS_None, // VMAXSHZrr_Intkz = 11328 |
| 155543 | CEFBS_None, // VMAXSHZrrb_Int = 11329 |
| 155544 | CEFBS_None, // VMAXSHZrrb_Intk = 11330 |
| 155545 | CEFBS_None, // VMAXSHZrrb_Intkz = 11331 |
| 155546 | CEFBS_None, // VMAXSSZrm = 11332 |
| 155547 | CEFBS_None, // VMAXSSZrm_Int = 11333 |
| 155548 | CEFBS_None, // VMAXSSZrm_Intk = 11334 |
| 155549 | CEFBS_None, // VMAXSSZrm_Intkz = 11335 |
| 155550 | CEFBS_None, // VMAXSSZrr = 11336 |
| 155551 | CEFBS_None, // VMAXSSZrr_Int = 11337 |
| 155552 | CEFBS_None, // VMAXSSZrr_Intk = 11338 |
| 155553 | CEFBS_None, // VMAXSSZrr_Intkz = 11339 |
| 155554 | CEFBS_None, // VMAXSSZrrb_Int = 11340 |
| 155555 | CEFBS_None, // VMAXSSZrrb_Intk = 11341 |
| 155556 | CEFBS_None, // VMAXSSZrrb_Intkz = 11342 |
| 155557 | CEFBS_None, // VMAXSSrm = 11343 |
| 155558 | CEFBS_None, // VMAXSSrm_Int = 11344 |
| 155559 | CEFBS_None, // VMAXSSrr = 11345 |
| 155560 | CEFBS_None, // VMAXSSrr_Int = 11346 |
| 155561 | CEFBS_None, // VMCALL = 11347 |
| 155562 | CEFBS_None, // VMCLEARm = 11348 |
| 155563 | CEFBS_None, // VMFUNC = 11349 |
| 155564 | CEFBS_None, // VMINCPDYrm = 11350 |
| 155565 | CEFBS_None, // VMINCPDYrr = 11351 |
| 155566 | CEFBS_None, // VMINCPDZ128rm = 11352 |
| 155567 | CEFBS_None, // VMINCPDZ128rmb = 11353 |
| 155568 | CEFBS_None, // VMINCPDZ128rmbk = 11354 |
| 155569 | CEFBS_None, // VMINCPDZ128rmbkz = 11355 |
| 155570 | CEFBS_None, // VMINCPDZ128rmk = 11356 |
| 155571 | CEFBS_None, // VMINCPDZ128rmkz = 11357 |
| 155572 | CEFBS_None, // VMINCPDZ128rr = 11358 |
| 155573 | CEFBS_None, // VMINCPDZ128rrk = 11359 |
| 155574 | CEFBS_None, // VMINCPDZ128rrkz = 11360 |
| 155575 | CEFBS_None, // VMINCPDZ256rm = 11361 |
| 155576 | CEFBS_None, // VMINCPDZ256rmb = 11362 |
| 155577 | CEFBS_None, // VMINCPDZ256rmbk = 11363 |
| 155578 | CEFBS_None, // VMINCPDZ256rmbkz = 11364 |
| 155579 | CEFBS_None, // VMINCPDZ256rmk = 11365 |
| 155580 | CEFBS_None, // VMINCPDZ256rmkz = 11366 |
| 155581 | CEFBS_None, // VMINCPDZ256rr = 11367 |
| 155582 | CEFBS_None, // VMINCPDZ256rrk = 11368 |
| 155583 | CEFBS_None, // VMINCPDZ256rrkz = 11369 |
| 155584 | CEFBS_None, // VMINCPDZrm = 11370 |
| 155585 | CEFBS_None, // VMINCPDZrmb = 11371 |
| 155586 | CEFBS_None, // VMINCPDZrmbk = 11372 |
| 155587 | CEFBS_None, // VMINCPDZrmbkz = 11373 |
| 155588 | CEFBS_None, // VMINCPDZrmk = 11374 |
| 155589 | CEFBS_None, // VMINCPDZrmkz = 11375 |
| 155590 | CEFBS_None, // VMINCPDZrr = 11376 |
| 155591 | CEFBS_None, // VMINCPDZrrk = 11377 |
| 155592 | CEFBS_None, // VMINCPDZrrkz = 11378 |
| 155593 | CEFBS_None, // VMINCPDrm = 11379 |
| 155594 | CEFBS_None, // VMINCPDrr = 11380 |
| 155595 | CEFBS_None, // VMINCPHZ128rm = 11381 |
| 155596 | CEFBS_None, // VMINCPHZ128rmb = 11382 |
| 155597 | CEFBS_None, // VMINCPHZ128rmbk = 11383 |
| 155598 | CEFBS_None, // VMINCPHZ128rmbkz = 11384 |
| 155599 | CEFBS_None, // VMINCPHZ128rmk = 11385 |
| 155600 | CEFBS_None, // VMINCPHZ128rmkz = 11386 |
| 155601 | CEFBS_None, // VMINCPHZ128rr = 11387 |
| 155602 | CEFBS_None, // VMINCPHZ128rrk = 11388 |
| 155603 | CEFBS_None, // VMINCPHZ128rrkz = 11389 |
| 155604 | CEFBS_None, // VMINCPHZ256rm = 11390 |
| 155605 | CEFBS_None, // VMINCPHZ256rmb = 11391 |
| 155606 | CEFBS_None, // VMINCPHZ256rmbk = 11392 |
| 155607 | CEFBS_None, // VMINCPHZ256rmbkz = 11393 |
| 155608 | CEFBS_None, // VMINCPHZ256rmk = 11394 |
| 155609 | CEFBS_None, // VMINCPHZ256rmkz = 11395 |
| 155610 | CEFBS_None, // VMINCPHZ256rr = 11396 |
| 155611 | CEFBS_None, // VMINCPHZ256rrk = 11397 |
| 155612 | CEFBS_None, // VMINCPHZ256rrkz = 11398 |
| 155613 | CEFBS_None, // VMINCPHZrm = 11399 |
| 155614 | CEFBS_None, // VMINCPHZrmb = 11400 |
| 155615 | CEFBS_None, // VMINCPHZrmbk = 11401 |
| 155616 | CEFBS_None, // VMINCPHZrmbkz = 11402 |
| 155617 | CEFBS_None, // VMINCPHZrmk = 11403 |
| 155618 | CEFBS_None, // VMINCPHZrmkz = 11404 |
| 155619 | CEFBS_None, // VMINCPHZrr = 11405 |
| 155620 | CEFBS_None, // VMINCPHZrrk = 11406 |
| 155621 | CEFBS_None, // VMINCPHZrrkz = 11407 |
| 155622 | CEFBS_None, // VMINCPSYrm = 11408 |
| 155623 | CEFBS_None, // VMINCPSYrr = 11409 |
| 155624 | CEFBS_None, // VMINCPSZ128rm = 11410 |
| 155625 | CEFBS_None, // VMINCPSZ128rmb = 11411 |
| 155626 | CEFBS_None, // VMINCPSZ128rmbk = 11412 |
| 155627 | CEFBS_None, // VMINCPSZ128rmbkz = 11413 |
| 155628 | CEFBS_None, // VMINCPSZ128rmk = 11414 |
| 155629 | CEFBS_None, // VMINCPSZ128rmkz = 11415 |
| 155630 | CEFBS_None, // VMINCPSZ128rr = 11416 |
| 155631 | CEFBS_None, // VMINCPSZ128rrk = 11417 |
| 155632 | CEFBS_None, // VMINCPSZ128rrkz = 11418 |
| 155633 | CEFBS_None, // VMINCPSZ256rm = 11419 |
| 155634 | CEFBS_None, // VMINCPSZ256rmb = 11420 |
| 155635 | CEFBS_None, // VMINCPSZ256rmbk = 11421 |
| 155636 | CEFBS_None, // VMINCPSZ256rmbkz = 11422 |
| 155637 | CEFBS_None, // VMINCPSZ256rmk = 11423 |
| 155638 | CEFBS_None, // VMINCPSZ256rmkz = 11424 |
| 155639 | CEFBS_None, // VMINCPSZ256rr = 11425 |
| 155640 | CEFBS_None, // VMINCPSZ256rrk = 11426 |
| 155641 | CEFBS_None, // VMINCPSZ256rrkz = 11427 |
| 155642 | CEFBS_None, // VMINCPSZrm = 11428 |
| 155643 | CEFBS_None, // VMINCPSZrmb = 11429 |
| 155644 | CEFBS_None, // VMINCPSZrmbk = 11430 |
| 155645 | CEFBS_None, // VMINCPSZrmbkz = 11431 |
| 155646 | CEFBS_None, // VMINCPSZrmk = 11432 |
| 155647 | CEFBS_None, // VMINCPSZrmkz = 11433 |
| 155648 | CEFBS_None, // VMINCPSZrr = 11434 |
| 155649 | CEFBS_None, // VMINCPSZrrk = 11435 |
| 155650 | CEFBS_None, // VMINCPSZrrkz = 11436 |
| 155651 | CEFBS_None, // VMINCPSrm = 11437 |
| 155652 | CEFBS_None, // VMINCPSrr = 11438 |
| 155653 | CEFBS_None, // VMINCSDZrm = 11439 |
| 155654 | CEFBS_None, // VMINCSDZrr = 11440 |
| 155655 | CEFBS_None, // VMINCSDrm = 11441 |
| 155656 | CEFBS_None, // VMINCSDrr = 11442 |
| 155657 | CEFBS_None, // VMINCSHZrm = 11443 |
| 155658 | CEFBS_None, // VMINCSHZrr = 11444 |
| 155659 | CEFBS_None, // VMINCSSZrm = 11445 |
| 155660 | CEFBS_None, // VMINCSSZrr = 11446 |
| 155661 | CEFBS_None, // VMINCSSrm = 11447 |
| 155662 | CEFBS_None, // VMINCSSrr = 11448 |
| 155663 | CEFBS_None, // VMINPDYrm = 11449 |
| 155664 | CEFBS_None, // VMINPDYrr = 11450 |
| 155665 | CEFBS_None, // VMINPDZ128rm = 11451 |
| 155666 | CEFBS_None, // VMINPDZ128rmb = 11452 |
| 155667 | CEFBS_None, // VMINPDZ128rmbk = 11453 |
| 155668 | CEFBS_None, // VMINPDZ128rmbkz = 11454 |
| 155669 | CEFBS_None, // VMINPDZ128rmk = 11455 |
| 155670 | CEFBS_None, // VMINPDZ128rmkz = 11456 |
| 155671 | CEFBS_None, // VMINPDZ128rr = 11457 |
| 155672 | CEFBS_None, // VMINPDZ128rrk = 11458 |
| 155673 | CEFBS_None, // VMINPDZ128rrkz = 11459 |
| 155674 | CEFBS_None, // VMINPDZ256rm = 11460 |
| 155675 | CEFBS_None, // VMINPDZ256rmb = 11461 |
| 155676 | CEFBS_None, // VMINPDZ256rmbk = 11462 |
| 155677 | CEFBS_None, // VMINPDZ256rmbkz = 11463 |
| 155678 | CEFBS_None, // VMINPDZ256rmk = 11464 |
| 155679 | CEFBS_None, // VMINPDZ256rmkz = 11465 |
| 155680 | CEFBS_None, // VMINPDZ256rr = 11466 |
| 155681 | CEFBS_None, // VMINPDZ256rrk = 11467 |
| 155682 | CEFBS_None, // VMINPDZ256rrkz = 11468 |
| 155683 | CEFBS_None, // VMINPDZrm = 11469 |
| 155684 | CEFBS_None, // VMINPDZrmb = 11470 |
| 155685 | CEFBS_None, // VMINPDZrmbk = 11471 |
| 155686 | CEFBS_None, // VMINPDZrmbkz = 11472 |
| 155687 | CEFBS_None, // VMINPDZrmk = 11473 |
| 155688 | CEFBS_None, // VMINPDZrmkz = 11474 |
| 155689 | CEFBS_None, // VMINPDZrr = 11475 |
| 155690 | CEFBS_None, // VMINPDZrrb = 11476 |
| 155691 | CEFBS_None, // VMINPDZrrbk = 11477 |
| 155692 | CEFBS_None, // VMINPDZrrbkz = 11478 |
| 155693 | CEFBS_None, // VMINPDZrrk = 11479 |
| 155694 | CEFBS_None, // VMINPDZrrkz = 11480 |
| 155695 | CEFBS_None, // VMINPDrm = 11481 |
| 155696 | CEFBS_None, // VMINPDrr = 11482 |
| 155697 | CEFBS_None, // VMINPHZ128rm = 11483 |
| 155698 | CEFBS_None, // VMINPHZ128rmb = 11484 |
| 155699 | CEFBS_None, // VMINPHZ128rmbk = 11485 |
| 155700 | CEFBS_None, // VMINPHZ128rmbkz = 11486 |
| 155701 | CEFBS_None, // VMINPHZ128rmk = 11487 |
| 155702 | CEFBS_None, // VMINPHZ128rmkz = 11488 |
| 155703 | CEFBS_None, // VMINPHZ128rr = 11489 |
| 155704 | CEFBS_None, // VMINPHZ128rrk = 11490 |
| 155705 | CEFBS_None, // VMINPHZ128rrkz = 11491 |
| 155706 | CEFBS_None, // VMINPHZ256rm = 11492 |
| 155707 | CEFBS_None, // VMINPHZ256rmb = 11493 |
| 155708 | CEFBS_None, // VMINPHZ256rmbk = 11494 |
| 155709 | CEFBS_None, // VMINPHZ256rmbkz = 11495 |
| 155710 | CEFBS_None, // VMINPHZ256rmk = 11496 |
| 155711 | CEFBS_None, // VMINPHZ256rmkz = 11497 |
| 155712 | CEFBS_None, // VMINPHZ256rr = 11498 |
| 155713 | CEFBS_None, // VMINPHZ256rrk = 11499 |
| 155714 | CEFBS_None, // VMINPHZ256rrkz = 11500 |
| 155715 | CEFBS_None, // VMINPHZrm = 11501 |
| 155716 | CEFBS_None, // VMINPHZrmb = 11502 |
| 155717 | CEFBS_None, // VMINPHZrmbk = 11503 |
| 155718 | CEFBS_None, // VMINPHZrmbkz = 11504 |
| 155719 | CEFBS_None, // VMINPHZrmk = 11505 |
| 155720 | CEFBS_None, // VMINPHZrmkz = 11506 |
| 155721 | CEFBS_None, // VMINPHZrr = 11507 |
| 155722 | CEFBS_None, // VMINPHZrrb = 11508 |
| 155723 | CEFBS_None, // VMINPHZrrbk = 11509 |
| 155724 | CEFBS_None, // VMINPHZrrbkz = 11510 |
| 155725 | CEFBS_None, // VMINPHZrrk = 11511 |
| 155726 | CEFBS_None, // VMINPHZrrkz = 11512 |
| 155727 | CEFBS_None, // VMINPSYrm = 11513 |
| 155728 | CEFBS_None, // VMINPSYrr = 11514 |
| 155729 | CEFBS_None, // VMINPSZ128rm = 11515 |
| 155730 | CEFBS_None, // VMINPSZ128rmb = 11516 |
| 155731 | CEFBS_None, // VMINPSZ128rmbk = 11517 |
| 155732 | CEFBS_None, // VMINPSZ128rmbkz = 11518 |
| 155733 | CEFBS_None, // VMINPSZ128rmk = 11519 |
| 155734 | CEFBS_None, // VMINPSZ128rmkz = 11520 |
| 155735 | CEFBS_None, // VMINPSZ128rr = 11521 |
| 155736 | CEFBS_None, // VMINPSZ128rrk = 11522 |
| 155737 | CEFBS_None, // VMINPSZ128rrkz = 11523 |
| 155738 | CEFBS_None, // VMINPSZ256rm = 11524 |
| 155739 | CEFBS_None, // VMINPSZ256rmb = 11525 |
| 155740 | CEFBS_None, // VMINPSZ256rmbk = 11526 |
| 155741 | CEFBS_None, // VMINPSZ256rmbkz = 11527 |
| 155742 | CEFBS_None, // VMINPSZ256rmk = 11528 |
| 155743 | CEFBS_None, // VMINPSZ256rmkz = 11529 |
| 155744 | CEFBS_None, // VMINPSZ256rr = 11530 |
| 155745 | CEFBS_None, // VMINPSZ256rrk = 11531 |
| 155746 | CEFBS_None, // VMINPSZ256rrkz = 11532 |
| 155747 | CEFBS_None, // VMINPSZrm = 11533 |
| 155748 | CEFBS_None, // VMINPSZrmb = 11534 |
| 155749 | CEFBS_None, // VMINPSZrmbk = 11535 |
| 155750 | CEFBS_None, // VMINPSZrmbkz = 11536 |
| 155751 | CEFBS_None, // VMINPSZrmk = 11537 |
| 155752 | CEFBS_None, // VMINPSZrmkz = 11538 |
| 155753 | CEFBS_None, // VMINPSZrr = 11539 |
| 155754 | CEFBS_None, // VMINPSZrrb = 11540 |
| 155755 | CEFBS_None, // VMINPSZrrbk = 11541 |
| 155756 | CEFBS_None, // VMINPSZrrbkz = 11542 |
| 155757 | CEFBS_None, // VMINPSZrrk = 11543 |
| 155758 | CEFBS_None, // VMINPSZrrkz = 11544 |
| 155759 | CEFBS_None, // VMINPSrm = 11545 |
| 155760 | CEFBS_None, // VMINPSrr = 11546 |
| 155761 | CEFBS_None, // VMINSDZrm = 11547 |
| 155762 | CEFBS_None, // VMINSDZrm_Int = 11548 |
| 155763 | CEFBS_None, // VMINSDZrm_Intk = 11549 |
| 155764 | CEFBS_None, // VMINSDZrm_Intkz = 11550 |
| 155765 | CEFBS_None, // VMINSDZrr = 11551 |
| 155766 | CEFBS_None, // VMINSDZrr_Int = 11552 |
| 155767 | CEFBS_None, // VMINSDZrr_Intk = 11553 |
| 155768 | CEFBS_None, // VMINSDZrr_Intkz = 11554 |
| 155769 | CEFBS_None, // VMINSDZrrb_Int = 11555 |
| 155770 | CEFBS_None, // VMINSDZrrb_Intk = 11556 |
| 155771 | CEFBS_None, // VMINSDZrrb_Intkz = 11557 |
| 155772 | CEFBS_None, // VMINSDrm = 11558 |
| 155773 | CEFBS_None, // VMINSDrm_Int = 11559 |
| 155774 | CEFBS_None, // VMINSDrr = 11560 |
| 155775 | CEFBS_None, // VMINSDrr_Int = 11561 |
| 155776 | CEFBS_None, // VMINSHZrm = 11562 |
| 155777 | CEFBS_None, // VMINSHZrm_Int = 11563 |
| 155778 | CEFBS_None, // VMINSHZrm_Intk = 11564 |
| 155779 | CEFBS_None, // VMINSHZrm_Intkz = 11565 |
| 155780 | CEFBS_None, // VMINSHZrr = 11566 |
| 155781 | CEFBS_None, // VMINSHZrr_Int = 11567 |
| 155782 | CEFBS_None, // VMINSHZrr_Intk = 11568 |
| 155783 | CEFBS_None, // VMINSHZrr_Intkz = 11569 |
| 155784 | CEFBS_None, // VMINSHZrrb_Int = 11570 |
| 155785 | CEFBS_None, // VMINSHZrrb_Intk = 11571 |
| 155786 | CEFBS_None, // VMINSHZrrb_Intkz = 11572 |
| 155787 | CEFBS_None, // VMINSSZrm = 11573 |
| 155788 | CEFBS_None, // VMINSSZrm_Int = 11574 |
| 155789 | CEFBS_None, // VMINSSZrm_Intk = 11575 |
| 155790 | CEFBS_None, // VMINSSZrm_Intkz = 11576 |
| 155791 | CEFBS_None, // VMINSSZrr = 11577 |
| 155792 | CEFBS_None, // VMINSSZrr_Int = 11578 |
| 155793 | CEFBS_None, // VMINSSZrr_Intk = 11579 |
| 155794 | CEFBS_None, // VMINSSZrr_Intkz = 11580 |
| 155795 | CEFBS_None, // VMINSSZrrb_Int = 11581 |
| 155796 | CEFBS_None, // VMINSSZrrb_Intk = 11582 |
| 155797 | CEFBS_None, // VMINSSZrrb_Intkz = 11583 |
| 155798 | CEFBS_None, // VMINSSrm = 11584 |
| 155799 | CEFBS_None, // VMINSSrm_Int = 11585 |
| 155800 | CEFBS_None, // VMINSSrr = 11586 |
| 155801 | CEFBS_None, // VMINSSrr_Int = 11587 |
| 155802 | CEFBS_None, // VMLAUNCH = 11588 |
| 155803 | CEFBS_Not64BitMode, // VMLOAD32 = 11589 |
| 155804 | CEFBS_In64BitMode, // VMLOAD64 = 11590 |
| 155805 | CEFBS_None, // VMMCALL = 11591 |
| 155806 | CEFBS_None, // VMOV64toPQIZrm = 11592 |
| 155807 | CEFBS_None, // VMOV64toPQIZrr = 11593 |
| 155808 | CEFBS_None, // VMOV64toPQIrm = 11594 |
| 155809 | CEFBS_None, // VMOV64toPQIrr = 11595 |
| 155810 | CEFBS_None, // VMOV64toSDZrr = 11596 |
| 155811 | CEFBS_None, // VMOV64toSDrr = 11597 |
| 155812 | CEFBS_None, // VMOVAPDYmr = 11598 |
| 155813 | CEFBS_None, // VMOVAPDYrm = 11599 |
| 155814 | CEFBS_None, // VMOVAPDYrr = 11600 |
| 155815 | CEFBS_None, // VMOVAPDYrr_REV = 11601 |
| 155816 | CEFBS_None, // VMOVAPDZ128mr = 11602 |
| 155817 | CEFBS_None, // VMOVAPDZ128mrk = 11603 |
| 155818 | CEFBS_None, // VMOVAPDZ128rm = 11604 |
| 155819 | CEFBS_None, // VMOVAPDZ128rmk = 11605 |
| 155820 | CEFBS_None, // VMOVAPDZ128rmkz = 11606 |
| 155821 | CEFBS_None, // VMOVAPDZ128rr = 11607 |
| 155822 | CEFBS_None, // VMOVAPDZ128rr_REV = 11608 |
| 155823 | CEFBS_None, // VMOVAPDZ128rrk = 11609 |
| 155824 | CEFBS_None, // VMOVAPDZ128rrk_REV = 11610 |
| 155825 | CEFBS_None, // VMOVAPDZ128rrkz = 11611 |
| 155826 | CEFBS_None, // VMOVAPDZ128rrkz_REV = 11612 |
| 155827 | CEFBS_None, // VMOVAPDZ256mr = 11613 |
| 155828 | CEFBS_None, // VMOVAPDZ256mrk = 11614 |
| 155829 | CEFBS_None, // VMOVAPDZ256rm = 11615 |
| 155830 | CEFBS_None, // VMOVAPDZ256rmk = 11616 |
| 155831 | CEFBS_None, // VMOVAPDZ256rmkz = 11617 |
| 155832 | CEFBS_None, // VMOVAPDZ256rr = 11618 |
| 155833 | CEFBS_None, // VMOVAPDZ256rr_REV = 11619 |
| 155834 | CEFBS_None, // VMOVAPDZ256rrk = 11620 |
| 155835 | CEFBS_None, // VMOVAPDZ256rrk_REV = 11621 |
| 155836 | CEFBS_None, // VMOVAPDZ256rrkz = 11622 |
| 155837 | CEFBS_None, // VMOVAPDZ256rrkz_REV = 11623 |
| 155838 | CEFBS_None, // VMOVAPDZmr = 11624 |
| 155839 | CEFBS_None, // VMOVAPDZmrk = 11625 |
| 155840 | CEFBS_None, // VMOVAPDZrm = 11626 |
| 155841 | CEFBS_None, // VMOVAPDZrmk = 11627 |
| 155842 | CEFBS_None, // VMOVAPDZrmkz = 11628 |
| 155843 | CEFBS_None, // VMOVAPDZrr = 11629 |
| 155844 | CEFBS_None, // VMOVAPDZrr_REV = 11630 |
| 155845 | CEFBS_None, // VMOVAPDZrrk = 11631 |
| 155846 | CEFBS_None, // VMOVAPDZrrk_REV = 11632 |
| 155847 | CEFBS_None, // VMOVAPDZrrkz = 11633 |
| 155848 | CEFBS_None, // VMOVAPDZrrkz_REV = 11634 |
| 155849 | CEFBS_None, // VMOVAPDmr = 11635 |
| 155850 | CEFBS_None, // VMOVAPDrm = 11636 |
| 155851 | CEFBS_None, // VMOVAPDrr = 11637 |
| 155852 | CEFBS_None, // VMOVAPDrr_REV = 11638 |
| 155853 | CEFBS_None, // VMOVAPSYmr = 11639 |
| 155854 | CEFBS_None, // VMOVAPSYrm = 11640 |
| 155855 | CEFBS_None, // VMOVAPSYrr = 11641 |
| 155856 | CEFBS_None, // VMOVAPSYrr_REV = 11642 |
| 155857 | CEFBS_None, // VMOVAPSZ128mr = 11643 |
| 155858 | CEFBS_None, // VMOVAPSZ128mrk = 11644 |
| 155859 | CEFBS_None, // VMOVAPSZ128rm = 11645 |
| 155860 | CEFBS_None, // VMOVAPSZ128rmk = 11646 |
| 155861 | CEFBS_None, // VMOVAPSZ128rmkz = 11647 |
| 155862 | CEFBS_None, // VMOVAPSZ128rr = 11648 |
| 155863 | CEFBS_None, // VMOVAPSZ128rr_REV = 11649 |
| 155864 | CEFBS_None, // VMOVAPSZ128rrk = 11650 |
| 155865 | CEFBS_None, // VMOVAPSZ128rrk_REV = 11651 |
| 155866 | CEFBS_None, // VMOVAPSZ128rrkz = 11652 |
| 155867 | CEFBS_None, // VMOVAPSZ128rrkz_REV = 11653 |
| 155868 | CEFBS_None, // VMOVAPSZ256mr = 11654 |
| 155869 | CEFBS_None, // VMOVAPSZ256mrk = 11655 |
| 155870 | CEFBS_None, // VMOVAPSZ256rm = 11656 |
| 155871 | CEFBS_None, // VMOVAPSZ256rmk = 11657 |
| 155872 | CEFBS_None, // VMOVAPSZ256rmkz = 11658 |
| 155873 | CEFBS_None, // VMOVAPSZ256rr = 11659 |
| 155874 | CEFBS_None, // VMOVAPSZ256rr_REV = 11660 |
| 155875 | CEFBS_None, // VMOVAPSZ256rrk = 11661 |
| 155876 | CEFBS_None, // VMOVAPSZ256rrk_REV = 11662 |
| 155877 | CEFBS_None, // VMOVAPSZ256rrkz = 11663 |
| 155878 | CEFBS_None, // VMOVAPSZ256rrkz_REV = 11664 |
| 155879 | CEFBS_None, // VMOVAPSZmr = 11665 |
| 155880 | CEFBS_None, // VMOVAPSZmrk = 11666 |
| 155881 | CEFBS_None, // VMOVAPSZrm = 11667 |
| 155882 | CEFBS_None, // VMOVAPSZrmk = 11668 |
| 155883 | CEFBS_None, // VMOVAPSZrmkz = 11669 |
| 155884 | CEFBS_None, // VMOVAPSZrr = 11670 |
| 155885 | CEFBS_None, // VMOVAPSZrr_REV = 11671 |
| 155886 | CEFBS_None, // VMOVAPSZrrk = 11672 |
| 155887 | CEFBS_None, // VMOVAPSZrrk_REV = 11673 |
| 155888 | CEFBS_None, // VMOVAPSZrrkz = 11674 |
| 155889 | CEFBS_None, // VMOVAPSZrrkz_REV = 11675 |
| 155890 | CEFBS_None, // VMOVAPSmr = 11676 |
| 155891 | CEFBS_None, // VMOVAPSrm = 11677 |
| 155892 | CEFBS_None, // VMOVAPSrr = 11678 |
| 155893 | CEFBS_None, // VMOVAPSrr_REV = 11679 |
| 155894 | CEFBS_None, // VMOVDDUPYrm = 11680 |
| 155895 | CEFBS_None, // VMOVDDUPYrr = 11681 |
| 155896 | CEFBS_None, // VMOVDDUPZ128rm = 11682 |
| 155897 | CEFBS_None, // VMOVDDUPZ128rmk = 11683 |
| 155898 | CEFBS_None, // VMOVDDUPZ128rmkz = 11684 |
| 155899 | CEFBS_None, // VMOVDDUPZ128rr = 11685 |
| 155900 | CEFBS_None, // VMOVDDUPZ128rrk = 11686 |
| 155901 | CEFBS_None, // VMOVDDUPZ128rrkz = 11687 |
| 155902 | CEFBS_None, // VMOVDDUPZ256rm = 11688 |
| 155903 | CEFBS_None, // VMOVDDUPZ256rmk = 11689 |
| 155904 | CEFBS_None, // VMOVDDUPZ256rmkz = 11690 |
| 155905 | CEFBS_None, // VMOVDDUPZ256rr = 11691 |
| 155906 | CEFBS_None, // VMOVDDUPZ256rrk = 11692 |
| 155907 | CEFBS_None, // VMOVDDUPZ256rrkz = 11693 |
| 155908 | CEFBS_None, // VMOVDDUPZrm = 11694 |
| 155909 | CEFBS_None, // VMOVDDUPZrmk = 11695 |
| 155910 | CEFBS_None, // VMOVDDUPZrmkz = 11696 |
| 155911 | CEFBS_None, // VMOVDDUPZrr = 11697 |
| 155912 | CEFBS_None, // VMOVDDUPZrrk = 11698 |
| 155913 | CEFBS_None, // VMOVDDUPZrrkz = 11699 |
| 155914 | CEFBS_None, // VMOVDDUPrm = 11700 |
| 155915 | CEFBS_None, // VMOVDDUPrr = 11701 |
| 155916 | CEFBS_None, // VMOVDI2PDIZrm = 11702 |
| 155917 | CEFBS_None, // VMOVDI2PDIZrr = 11703 |
| 155918 | CEFBS_None, // VMOVDI2PDIrm = 11704 |
| 155919 | CEFBS_None, // VMOVDI2PDIrr = 11705 |
| 155920 | CEFBS_None, // VMOVDI2SSZrr = 11706 |
| 155921 | CEFBS_None, // VMOVDI2SSrr = 11707 |
| 155922 | CEFBS_None, // VMOVDQA32Z128mr = 11708 |
| 155923 | CEFBS_None, // VMOVDQA32Z128mrk = 11709 |
| 155924 | CEFBS_None, // VMOVDQA32Z128rm = 11710 |
| 155925 | CEFBS_None, // VMOVDQA32Z128rmk = 11711 |
| 155926 | CEFBS_None, // VMOVDQA32Z128rmkz = 11712 |
| 155927 | CEFBS_None, // VMOVDQA32Z128rr = 11713 |
| 155928 | CEFBS_None, // VMOVDQA32Z128rr_REV = 11714 |
| 155929 | CEFBS_None, // VMOVDQA32Z128rrk = 11715 |
| 155930 | CEFBS_None, // VMOVDQA32Z128rrk_REV = 11716 |
| 155931 | CEFBS_None, // VMOVDQA32Z128rrkz = 11717 |
| 155932 | CEFBS_None, // VMOVDQA32Z128rrkz_REV = 11718 |
| 155933 | CEFBS_None, // VMOVDQA32Z256mr = 11719 |
| 155934 | CEFBS_None, // VMOVDQA32Z256mrk = 11720 |
| 155935 | CEFBS_None, // VMOVDQA32Z256rm = 11721 |
| 155936 | CEFBS_None, // VMOVDQA32Z256rmk = 11722 |
| 155937 | CEFBS_None, // VMOVDQA32Z256rmkz = 11723 |
| 155938 | CEFBS_None, // VMOVDQA32Z256rr = 11724 |
| 155939 | CEFBS_None, // VMOVDQA32Z256rr_REV = 11725 |
| 155940 | CEFBS_None, // VMOVDQA32Z256rrk = 11726 |
| 155941 | CEFBS_None, // VMOVDQA32Z256rrk_REV = 11727 |
| 155942 | CEFBS_None, // VMOVDQA32Z256rrkz = 11728 |
| 155943 | CEFBS_None, // VMOVDQA32Z256rrkz_REV = 11729 |
| 155944 | CEFBS_None, // VMOVDQA32Zmr = 11730 |
| 155945 | CEFBS_None, // VMOVDQA32Zmrk = 11731 |
| 155946 | CEFBS_None, // VMOVDQA32Zrm = 11732 |
| 155947 | CEFBS_None, // VMOVDQA32Zrmk = 11733 |
| 155948 | CEFBS_None, // VMOVDQA32Zrmkz = 11734 |
| 155949 | CEFBS_None, // VMOVDQA32Zrr = 11735 |
| 155950 | CEFBS_None, // VMOVDQA32Zrr_REV = 11736 |
| 155951 | CEFBS_None, // VMOVDQA32Zrrk = 11737 |
| 155952 | CEFBS_None, // VMOVDQA32Zrrk_REV = 11738 |
| 155953 | CEFBS_None, // VMOVDQA32Zrrkz = 11739 |
| 155954 | CEFBS_None, // VMOVDQA32Zrrkz_REV = 11740 |
| 155955 | CEFBS_None, // VMOVDQA64Z128mr = 11741 |
| 155956 | CEFBS_None, // VMOVDQA64Z128mrk = 11742 |
| 155957 | CEFBS_None, // VMOVDQA64Z128rm = 11743 |
| 155958 | CEFBS_None, // VMOVDQA64Z128rmk = 11744 |
| 155959 | CEFBS_None, // VMOVDQA64Z128rmkz = 11745 |
| 155960 | CEFBS_None, // VMOVDQA64Z128rr = 11746 |
| 155961 | CEFBS_None, // VMOVDQA64Z128rr_REV = 11747 |
| 155962 | CEFBS_None, // VMOVDQA64Z128rrk = 11748 |
| 155963 | CEFBS_None, // VMOVDQA64Z128rrk_REV = 11749 |
| 155964 | CEFBS_None, // VMOVDQA64Z128rrkz = 11750 |
| 155965 | CEFBS_None, // VMOVDQA64Z128rrkz_REV = 11751 |
| 155966 | CEFBS_None, // VMOVDQA64Z256mr = 11752 |
| 155967 | CEFBS_None, // VMOVDQA64Z256mrk = 11753 |
| 155968 | CEFBS_None, // VMOVDQA64Z256rm = 11754 |
| 155969 | CEFBS_None, // VMOVDQA64Z256rmk = 11755 |
| 155970 | CEFBS_None, // VMOVDQA64Z256rmkz = 11756 |
| 155971 | CEFBS_None, // VMOVDQA64Z256rr = 11757 |
| 155972 | CEFBS_None, // VMOVDQA64Z256rr_REV = 11758 |
| 155973 | CEFBS_None, // VMOVDQA64Z256rrk = 11759 |
| 155974 | CEFBS_None, // VMOVDQA64Z256rrk_REV = 11760 |
| 155975 | CEFBS_None, // VMOVDQA64Z256rrkz = 11761 |
| 155976 | CEFBS_None, // VMOVDQA64Z256rrkz_REV = 11762 |
| 155977 | CEFBS_None, // VMOVDQA64Zmr = 11763 |
| 155978 | CEFBS_None, // VMOVDQA64Zmrk = 11764 |
| 155979 | CEFBS_None, // VMOVDQA64Zrm = 11765 |
| 155980 | CEFBS_None, // VMOVDQA64Zrmk = 11766 |
| 155981 | CEFBS_None, // VMOVDQA64Zrmkz = 11767 |
| 155982 | CEFBS_None, // VMOVDQA64Zrr = 11768 |
| 155983 | CEFBS_None, // VMOVDQA64Zrr_REV = 11769 |
| 155984 | CEFBS_None, // VMOVDQA64Zrrk = 11770 |
| 155985 | CEFBS_None, // VMOVDQA64Zrrk_REV = 11771 |
| 155986 | CEFBS_None, // VMOVDQA64Zrrkz = 11772 |
| 155987 | CEFBS_None, // VMOVDQA64Zrrkz_REV = 11773 |
| 155988 | CEFBS_None, // VMOVDQAYmr = 11774 |
| 155989 | CEFBS_None, // VMOVDQAYrm = 11775 |
| 155990 | CEFBS_None, // VMOVDQAYrr = 11776 |
| 155991 | CEFBS_None, // VMOVDQAYrr_REV = 11777 |
| 155992 | CEFBS_None, // VMOVDQAmr = 11778 |
| 155993 | CEFBS_None, // VMOVDQArm = 11779 |
| 155994 | CEFBS_None, // VMOVDQArr = 11780 |
| 155995 | CEFBS_None, // VMOVDQArr_REV = 11781 |
| 155996 | CEFBS_None, // VMOVDQU16Z128mr = 11782 |
| 155997 | CEFBS_None, // VMOVDQU16Z128mrk = 11783 |
| 155998 | CEFBS_None, // VMOVDQU16Z128rm = 11784 |
| 155999 | CEFBS_None, // VMOVDQU16Z128rmk = 11785 |
| 156000 | CEFBS_None, // VMOVDQU16Z128rmkz = 11786 |
| 156001 | CEFBS_None, // VMOVDQU16Z128rr = 11787 |
| 156002 | CEFBS_None, // VMOVDQU16Z128rr_REV = 11788 |
| 156003 | CEFBS_None, // VMOVDQU16Z128rrk = 11789 |
| 156004 | CEFBS_None, // VMOVDQU16Z128rrk_REV = 11790 |
| 156005 | CEFBS_None, // VMOVDQU16Z128rrkz = 11791 |
| 156006 | CEFBS_None, // VMOVDQU16Z128rrkz_REV = 11792 |
| 156007 | CEFBS_None, // VMOVDQU16Z256mr = 11793 |
| 156008 | CEFBS_None, // VMOVDQU16Z256mrk = 11794 |
| 156009 | CEFBS_None, // VMOVDQU16Z256rm = 11795 |
| 156010 | CEFBS_None, // VMOVDQU16Z256rmk = 11796 |
| 156011 | CEFBS_None, // VMOVDQU16Z256rmkz = 11797 |
| 156012 | CEFBS_None, // VMOVDQU16Z256rr = 11798 |
| 156013 | CEFBS_None, // VMOVDQU16Z256rr_REV = 11799 |
| 156014 | CEFBS_None, // VMOVDQU16Z256rrk = 11800 |
| 156015 | CEFBS_None, // VMOVDQU16Z256rrk_REV = 11801 |
| 156016 | CEFBS_None, // VMOVDQU16Z256rrkz = 11802 |
| 156017 | CEFBS_None, // VMOVDQU16Z256rrkz_REV = 11803 |
| 156018 | CEFBS_None, // VMOVDQU16Zmr = 11804 |
| 156019 | CEFBS_None, // VMOVDQU16Zmrk = 11805 |
| 156020 | CEFBS_None, // VMOVDQU16Zrm = 11806 |
| 156021 | CEFBS_None, // VMOVDQU16Zrmk = 11807 |
| 156022 | CEFBS_None, // VMOVDQU16Zrmkz = 11808 |
| 156023 | CEFBS_None, // VMOVDQU16Zrr = 11809 |
| 156024 | CEFBS_None, // VMOVDQU16Zrr_REV = 11810 |
| 156025 | CEFBS_None, // VMOVDQU16Zrrk = 11811 |
| 156026 | CEFBS_None, // VMOVDQU16Zrrk_REV = 11812 |
| 156027 | CEFBS_None, // VMOVDQU16Zrrkz = 11813 |
| 156028 | CEFBS_None, // VMOVDQU16Zrrkz_REV = 11814 |
| 156029 | CEFBS_None, // VMOVDQU32Z128mr = 11815 |
| 156030 | CEFBS_None, // VMOVDQU32Z128mrk = 11816 |
| 156031 | CEFBS_None, // VMOVDQU32Z128rm = 11817 |
| 156032 | CEFBS_None, // VMOVDQU32Z128rmk = 11818 |
| 156033 | CEFBS_None, // VMOVDQU32Z128rmkz = 11819 |
| 156034 | CEFBS_None, // VMOVDQU32Z128rr = 11820 |
| 156035 | CEFBS_None, // VMOVDQU32Z128rr_REV = 11821 |
| 156036 | CEFBS_None, // VMOVDQU32Z128rrk = 11822 |
| 156037 | CEFBS_None, // VMOVDQU32Z128rrk_REV = 11823 |
| 156038 | CEFBS_None, // VMOVDQU32Z128rrkz = 11824 |
| 156039 | CEFBS_None, // VMOVDQU32Z128rrkz_REV = 11825 |
| 156040 | CEFBS_None, // VMOVDQU32Z256mr = 11826 |
| 156041 | CEFBS_None, // VMOVDQU32Z256mrk = 11827 |
| 156042 | CEFBS_None, // VMOVDQU32Z256rm = 11828 |
| 156043 | CEFBS_None, // VMOVDQU32Z256rmk = 11829 |
| 156044 | CEFBS_None, // VMOVDQU32Z256rmkz = 11830 |
| 156045 | CEFBS_None, // VMOVDQU32Z256rr = 11831 |
| 156046 | CEFBS_None, // VMOVDQU32Z256rr_REV = 11832 |
| 156047 | CEFBS_None, // VMOVDQU32Z256rrk = 11833 |
| 156048 | CEFBS_None, // VMOVDQU32Z256rrk_REV = 11834 |
| 156049 | CEFBS_None, // VMOVDQU32Z256rrkz = 11835 |
| 156050 | CEFBS_None, // VMOVDQU32Z256rrkz_REV = 11836 |
| 156051 | CEFBS_None, // VMOVDQU32Zmr = 11837 |
| 156052 | CEFBS_None, // VMOVDQU32Zmrk = 11838 |
| 156053 | CEFBS_None, // VMOVDQU32Zrm = 11839 |
| 156054 | CEFBS_None, // VMOVDQU32Zrmk = 11840 |
| 156055 | CEFBS_None, // VMOVDQU32Zrmkz = 11841 |
| 156056 | CEFBS_None, // VMOVDQU32Zrr = 11842 |
| 156057 | CEFBS_None, // VMOVDQU32Zrr_REV = 11843 |
| 156058 | CEFBS_None, // VMOVDQU32Zrrk = 11844 |
| 156059 | CEFBS_None, // VMOVDQU32Zrrk_REV = 11845 |
| 156060 | CEFBS_None, // VMOVDQU32Zrrkz = 11846 |
| 156061 | CEFBS_None, // VMOVDQU32Zrrkz_REV = 11847 |
| 156062 | CEFBS_None, // VMOVDQU64Z128mr = 11848 |
| 156063 | CEFBS_None, // VMOVDQU64Z128mrk = 11849 |
| 156064 | CEFBS_None, // VMOVDQU64Z128rm = 11850 |
| 156065 | CEFBS_None, // VMOVDQU64Z128rmk = 11851 |
| 156066 | CEFBS_None, // VMOVDQU64Z128rmkz = 11852 |
| 156067 | CEFBS_None, // VMOVDQU64Z128rr = 11853 |
| 156068 | CEFBS_None, // VMOVDQU64Z128rr_REV = 11854 |
| 156069 | CEFBS_None, // VMOVDQU64Z128rrk = 11855 |
| 156070 | CEFBS_None, // VMOVDQU64Z128rrk_REV = 11856 |
| 156071 | CEFBS_None, // VMOVDQU64Z128rrkz = 11857 |
| 156072 | CEFBS_None, // VMOVDQU64Z128rrkz_REV = 11858 |
| 156073 | CEFBS_None, // VMOVDQU64Z256mr = 11859 |
| 156074 | CEFBS_None, // VMOVDQU64Z256mrk = 11860 |
| 156075 | CEFBS_None, // VMOVDQU64Z256rm = 11861 |
| 156076 | CEFBS_None, // VMOVDQU64Z256rmk = 11862 |
| 156077 | CEFBS_None, // VMOVDQU64Z256rmkz = 11863 |
| 156078 | CEFBS_None, // VMOVDQU64Z256rr = 11864 |
| 156079 | CEFBS_None, // VMOVDQU64Z256rr_REV = 11865 |
| 156080 | CEFBS_None, // VMOVDQU64Z256rrk = 11866 |
| 156081 | CEFBS_None, // VMOVDQU64Z256rrk_REV = 11867 |
| 156082 | CEFBS_None, // VMOVDQU64Z256rrkz = 11868 |
| 156083 | CEFBS_None, // VMOVDQU64Z256rrkz_REV = 11869 |
| 156084 | CEFBS_None, // VMOVDQU64Zmr = 11870 |
| 156085 | CEFBS_None, // VMOVDQU64Zmrk = 11871 |
| 156086 | CEFBS_None, // VMOVDQU64Zrm = 11872 |
| 156087 | CEFBS_None, // VMOVDQU64Zrmk = 11873 |
| 156088 | CEFBS_None, // VMOVDQU64Zrmkz = 11874 |
| 156089 | CEFBS_None, // VMOVDQU64Zrr = 11875 |
| 156090 | CEFBS_None, // VMOVDQU64Zrr_REV = 11876 |
| 156091 | CEFBS_None, // VMOVDQU64Zrrk = 11877 |
| 156092 | CEFBS_None, // VMOVDQU64Zrrk_REV = 11878 |
| 156093 | CEFBS_None, // VMOVDQU64Zrrkz = 11879 |
| 156094 | CEFBS_None, // VMOVDQU64Zrrkz_REV = 11880 |
| 156095 | CEFBS_None, // VMOVDQU8Z128mr = 11881 |
| 156096 | CEFBS_None, // VMOVDQU8Z128mrk = 11882 |
| 156097 | CEFBS_None, // VMOVDQU8Z128rm = 11883 |
| 156098 | CEFBS_None, // VMOVDQU8Z128rmk = 11884 |
| 156099 | CEFBS_None, // VMOVDQU8Z128rmkz = 11885 |
| 156100 | CEFBS_None, // VMOVDQU8Z128rr = 11886 |
| 156101 | CEFBS_None, // VMOVDQU8Z128rr_REV = 11887 |
| 156102 | CEFBS_None, // VMOVDQU8Z128rrk = 11888 |
| 156103 | CEFBS_None, // VMOVDQU8Z128rrk_REV = 11889 |
| 156104 | CEFBS_None, // VMOVDQU8Z128rrkz = 11890 |
| 156105 | CEFBS_None, // VMOVDQU8Z128rrkz_REV = 11891 |
| 156106 | CEFBS_None, // VMOVDQU8Z256mr = 11892 |
| 156107 | CEFBS_None, // VMOVDQU8Z256mrk = 11893 |
| 156108 | CEFBS_None, // VMOVDQU8Z256rm = 11894 |
| 156109 | CEFBS_None, // VMOVDQU8Z256rmk = 11895 |
| 156110 | CEFBS_None, // VMOVDQU8Z256rmkz = 11896 |
| 156111 | CEFBS_None, // VMOVDQU8Z256rr = 11897 |
| 156112 | CEFBS_None, // VMOVDQU8Z256rr_REV = 11898 |
| 156113 | CEFBS_None, // VMOVDQU8Z256rrk = 11899 |
| 156114 | CEFBS_None, // VMOVDQU8Z256rrk_REV = 11900 |
| 156115 | CEFBS_None, // VMOVDQU8Z256rrkz = 11901 |
| 156116 | CEFBS_None, // VMOVDQU8Z256rrkz_REV = 11902 |
| 156117 | CEFBS_None, // VMOVDQU8Zmr = 11903 |
| 156118 | CEFBS_None, // VMOVDQU8Zmrk = 11904 |
| 156119 | CEFBS_None, // VMOVDQU8Zrm = 11905 |
| 156120 | CEFBS_None, // VMOVDQU8Zrmk = 11906 |
| 156121 | CEFBS_None, // VMOVDQU8Zrmkz = 11907 |
| 156122 | CEFBS_None, // VMOVDQU8Zrr = 11908 |
| 156123 | CEFBS_None, // VMOVDQU8Zrr_REV = 11909 |
| 156124 | CEFBS_None, // VMOVDQU8Zrrk = 11910 |
| 156125 | CEFBS_None, // VMOVDQU8Zrrk_REV = 11911 |
| 156126 | CEFBS_None, // VMOVDQU8Zrrkz = 11912 |
| 156127 | CEFBS_None, // VMOVDQU8Zrrkz_REV = 11913 |
| 156128 | CEFBS_None, // VMOVDQUYmr = 11914 |
| 156129 | CEFBS_None, // VMOVDQUYrm = 11915 |
| 156130 | CEFBS_None, // VMOVDQUYrr = 11916 |
| 156131 | CEFBS_None, // VMOVDQUYrr_REV = 11917 |
| 156132 | CEFBS_None, // VMOVDQUmr = 11918 |
| 156133 | CEFBS_None, // VMOVDQUrm = 11919 |
| 156134 | CEFBS_None, // VMOVDQUrr = 11920 |
| 156135 | CEFBS_None, // VMOVDQUrr_REV = 11921 |
| 156136 | CEFBS_None, // VMOVHLPSZrr = 11922 |
| 156137 | CEFBS_None, // VMOVHLPSrr = 11923 |
| 156138 | CEFBS_None, // VMOVHPDZ128mr = 11924 |
| 156139 | CEFBS_None, // VMOVHPDZ128rm = 11925 |
| 156140 | CEFBS_None, // VMOVHPDmr = 11926 |
| 156141 | CEFBS_None, // VMOVHPDrm = 11927 |
| 156142 | CEFBS_None, // VMOVHPSZ128mr = 11928 |
| 156143 | CEFBS_None, // VMOVHPSZ128rm = 11929 |
| 156144 | CEFBS_None, // VMOVHPSmr = 11930 |
| 156145 | CEFBS_None, // VMOVHPSrm = 11931 |
| 156146 | CEFBS_None, // VMOVLHPSZrr = 11932 |
| 156147 | CEFBS_None, // VMOVLHPSrr = 11933 |
| 156148 | CEFBS_None, // VMOVLPDZ128mr = 11934 |
| 156149 | CEFBS_None, // VMOVLPDZ128rm = 11935 |
| 156150 | CEFBS_None, // VMOVLPDmr = 11936 |
| 156151 | CEFBS_None, // VMOVLPDrm = 11937 |
| 156152 | CEFBS_None, // VMOVLPSZ128mr = 11938 |
| 156153 | CEFBS_None, // VMOVLPSZ128rm = 11939 |
| 156154 | CEFBS_None, // VMOVLPSmr = 11940 |
| 156155 | CEFBS_None, // VMOVLPSrm = 11941 |
| 156156 | CEFBS_None, // VMOVMSKPDYrr = 11942 |
| 156157 | CEFBS_None, // VMOVMSKPDrr = 11943 |
| 156158 | CEFBS_None, // VMOVMSKPSYrr = 11944 |
| 156159 | CEFBS_None, // VMOVMSKPSrr = 11945 |
| 156160 | CEFBS_None, // VMOVNTDQAYrm = 11946 |
| 156161 | CEFBS_None, // VMOVNTDQAZ128rm = 11947 |
| 156162 | CEFBS_None, // VMOVNTDQAZ256rm = 11948 |
| 156163 | CEFBS_None, // VMOVNTDQAZrm = 11949 |
| 156164 | CEFBS_None, // VMOVNTDQArm = 11950 |
| 156165 | CEFBS_None, // VMOVNTDQYmr = 11951 |
| 156166 | CEFBS_None, // VMOVNTDQZ128mr = 11952 |
| 156167 | CEFBS_None, // VMOVNTDQZ256mr = 11953 |
| 156168 | CEFBS_None, // VMOVNTDQZmr = 11954 |
| 156169 | CEFBS_None, // VMOVNTDQmr = 11955 |
| 156170 | CEFBS_None, // VMOVNTPDYmr = 11956 |
| 156171 | CEFBS_None, // VMOVNTPDZ128mr = 11957 |
| 156172 | CEFBS_None, // VMOVNTPDZ256mr = 11958 |
| 156173 | CEFBS_None, // VMOVNTPDZmr = 11959 |
| 156174 | CEFBS_None, // VMOVNTPDmr = 11960 |
| 156175 | CEFBS_None, // VMOVNTPSYmr = 11961 |
| 156176 | CEFBS_None, // VMOVNTPSZ128mr = 11962 |
| 156177 | CEFBS_None, // VMOVNTPSZ256mr = 11963 |
| 156178 | CEFBS_None, // VMOVNTPSZmr = 11964 |
| 156179 | CEFBS_None, // VMOVNTPSmr = 11965 |
| 156180 | CEFBS_None, // VMOVPDI2DIZmr = 11966 |
| 156181 | CEFBS_None, // VMOVPDI2DIZrr = 11967 |
| 156182 | CEFBS_None, // VMOVPDI2DImr = 11968 |
| 156183 | CEFBS_None, // VMOVPDI2DIrr = 11969 |
| 156184 | CEFBS_None, // VMOVPQI2QIZmr = 11970 |
| 156185 | CEFBS_None, // VMOVPQI2QIZrr = 11971 |
| 156186 | CEFBS_None, // VMOVPQI2QImr = 11972 |
| 156187 | CEFBS_None, // VMOVPQI2QIrr = 11973 |
| 156188 | CEFBS_In64BitMode, // VMOVPQIto64Zmr = 11974 |
| 156189 | CEFBS_None, // VMOVPQIto64Zrr = 11975 |
| 156190 | CEFBS_None, // VMOVPQIto64mr = 11976 |
| 156191 | CEFBS_None, // VMOVPQIto64rr = 11977 |
| 156192 | CEFBS_None, // VMOVQI2PQIZrm = 11978 |
| 156193 | CEFBS_None, // VMOVQI2PQIrm = 11979 |
| 156194 | CEFBS_None, // VMOVSDZmr = 11980 |
| 156195 | CEFBS_None, // VMOVSDZmrk = 11981 |
| 156196 | CEFBS_None, // VMOVSDZrm = 11982 |
| 156197 | CEFBS_None, // VMOVSDZrm_alt = 11983 |
| 156198 | CEFBS_None, // VMOVSDZrmk = 11984 |
| 156199 | CEFBS_None, // VMOVSDZrmkz = 11985 |
| 156200 | CEFBS_None, // VMOVSDZrr = 11986 |
| 156201 | CEFBS_None, // VMOVSDZrr_REV = 11987 |
| 156202 | CEFBS_None, // VMOVSDZrrk = 11988 |
| 156203 | CEFBS_None, // VMOVSDZrrk_REV = 11989 |
| 156204 | CEFBS_None, // VMOVSDZrrkz = 11990 |
| 156205 | CEFBS_None, // VMOVSDZrrkz_REV = 11991 |
| 156206 | CEFBS_None, // VMOVSDmr = 11992 |
| 156207 | CEFBS_None, // VMOVSDrm = 11993 |
| 156208 | CEFBS_None, // VMOVSDrm_alt = 11994 |
| 156209 | CEFBS_None, // VMOVSDrr = 11995 |
| 156210 | CEFBS_None, // VMOVSDrr_REV = 11996 |
| 156211 | CEFBS_None, // VMOVSDto64Zrr = 11997 |
| 156212 | CEFBS_None, // VMOVSDto64rr = 11998 |
| 156213 | CEFBS_None, // VMOVSH2Wrr = 11999 |
| 156214 | CEFBS_None, // VMOVSHDUPYrm = 12000 |
| 156215 | CEFBS_None, // VMOVSHDUPYrr = 12001 |
| 156216 | CEFBS_None, // VMOVSHDUPZ128rm = 12002 |
| 156217 | CEFBS_None, // VMOVSHDUPZ128rmk = 12003 |
| 156218 | CEFBS_None, // VMOVSHDUPZ128rmkz = 12004 |
| 156219 | CEFBS_None, // VMOVSHDUPZ128rr = 12005 |
| 156220 | CEFBS_None, // VMOVSHDUPZ128rrk = 12006 |
| 156221 | CEFBS_None, // VMOVSHDUPZ128rrkz = 12007 |
| 156222 | CEFBS_None, // VMOVSHDUPZ256rm = 12008 |
| 156223 | CEFBS_None, // VMOVSHDUPZ256rmk = 12009 |
| 156224 | CEFBS_None, // VMOVSHDUPZ256rmkz = 12010 |
| 156225 | CEFBS_None, // VMOVSHDUPZ256rr = 12011 |
| 156226 | CEFBS_None, // VMOVSHDUPZ256rrk = 12012 |
| 156227 | CEFBS_None, // VMOVSHDUPZ256rrkz = 12013 |
| 156228 | CEFBS_None, // VMOVSHDUPZrm = 12014 |
| 156229 | CEFBS_None, // VMOVSHDUPZrmk = 12015 |
| 156230 | CEFBS_None, // VMOVSHDUPZrmkz = 12016 |
| 156231 | CEFBS_None, // VMOVSHDUPZrr = 12017 |
| 156232 | CEFBS_None, // VMOVSHDUPZrrk = 12018 |
| 156233 | CEFBS_None, // VMOVSHDUPZrrkz = 12019 |
| 156234 | CEFBS_None, // VMOVSHDUPrm = 12020 |
| 156235 | CEFBS_None, // VMOVSHDUPrr = 12021 |
| 156236 | CEFBS_None, // VMOVSHZmr = 12022 |
| 156237 | CEFBS_None, // VMOVSHZmrk = 12023 |
| 156238 | CEFBS_None, // VMOVSHZrm = 12024 |
| 156239 | CEFBS_None, // VMOVSHZrm_alt = 12025 |
| 156240 | CEFBS_None, // VMOVSHZrmk = 12026 |
| 156241 | CEFBS_None, // VMOVSHZrmkz = 12027 |
| 156242 | CEFBS_None, // VMOVSHZrr = 12028 |
| 156243 | CEFBS_None, // VMOVSHZrr_REV = 12029 |
| 156244 | CEFBS_None, // VMOVSHZrrk = 12030 |
| 156245 | CEFBS_None, // VMOVSHZrrk_REV = 12031 |
| 156246 | CEFBS_None, // VMOVSHZrrkz = 12032 |
| 156247 | CEFBS_None, // VMOVSHZrrkz_REV = 12033 |
| 156248 | CEFBS_None, // VMOVSHtoW64rr = 12034 |
| 156249 | CEFBS_None, // VMOVSLDUPYrm = 12035 |
| 156250 | CEFBS_None, // VMOVSLDUPYrr = 12036 |
| 156251 | CEFBS_None, // VMOVSLDUPZ128rm = 12037 |
| 156252 | CEFBS_None, // VMOVSLDUPZ128rmk = 12038 |
| 156253 | CEFBS_None, // VMOVSLDUPZ128rmkz = 12039 |
| 156254 | CEFBS_None, // VMOVSLDUPZ128rr = 12040 |
| 156255 | CEFBS_None, // VMOVSLDUPZ128rrk = 12041 |
| 156256 | CEFBS_None, // VMOVSLDUPZ128rrkz = 12042 |
| 156257 | CEFBS_None, // VMOVSLDUPZ256rm = 12043 |
| 156258 | CEFBS_None, // VMOVSLDUPZ256rmk = 12044 |
| 156259 | CEFBS_None, // VMOVSLDUPZ256rmkz = 12045 |
| 156260 | CEFBS_None, // VMOVSLDUPZ256rr = 12046 |
| 156261 | CEFBS_None, // VMOVSLDUPZ256rrk = 12047 |
| 156262 | CEFBS_None, // VMOVSLDUPZ256rrkz = 12048 |
| 156263 | CEFBS_None, // VMOVSLDUPZrm = 12049 |
| 156264 | CEFBS_None, // VMOVSLDUPZrmk = 12050 |
| 156265 | CEFBS_None, // VMOVSLDUPZrmkz = 12051 |
| 156266 | CEFBS_None, // VMOVSLDUPZrr = 12052 |
| 156267 | CEFBS_None, // VMOVSLDUPZrrk = 12053 |
| 156268 | CEFBS_None, // VMOVSLDUPZrrkz = 12054 |
| 156269 | CEFBS_None, // VMOVSLDUPrm = 12055 |
| 156270 | CEFBS_None, // VMOVSLDUPrr = 12056 |
| 156271 | CEFBS_None, // VMOVSS2DIZrr = 12057 |
| 156272 | CEFBS_None, // VMOVSS2DIrr = 12058 |
| 156273 | CEFBS_None, // VMOVSSZmr = 12059 |
| 156274 | CEFBS_None, // VMOVSSZmrk = 12060 |
| 156275 | CEFBS_None, // VMOVSSZrm = 12061 |
| 156276 | CEFBS_None, // VMOVSSZrm_alt = 12062 |
| 156277 | CEFBS_None, // VMOVSSZrmk = 12063 |
| 156278 | CEFBS_None, // VMOVSSZrmkz = 12064 |
| 156279 | CEFBS_None, // VMOVSSZrr = 12065 |
| 156280 | CEFBS_None, // VMOVSSZrr_REV = 12066 |
| 156281 | CEFBS_None, // VMOVSSZrrk = 12067 |
| 156282 | CEFBS_None, // VMOVSSZrrk_REV = 12068 |
| 156283 | CEFBS_None, // VMOVSSZrrkz = 12069 |
| 156284 | CEFBS_None, // VMOVSSZrrkz_REV = 12070 |
| 156285 | CEFBS_None, // VMOVSSmr = 12071 |
| 156286 | CEFBS_None, // VMOVSSrm = 12072 |
| 156287 | CEFBS_None, // VMOVSSrm_alt = 12073 |
| 156288 | CEFBS_None, // VMOVSSrr = 12074 |
| 156289 | CEFBS_None, // VMOVSSrr_REV = 12075 |
| 156290 | CEFBS_None, // VMOVUPDYmr = 12076 |
| 156291 | CEFBS_None, // VMOVUPDYrm = 12077 |
| 156292 | CEFBS_None, // VMOVUPDYrr = 12078 |
| 156293 | CEFBS_None, // VMOVUPDYrr_REV = 12079 |
| 156294 | CEFBS_None, // VMOVUPDZ128mr = 12080 |
| 156295 | CEFBS_None, // VMOVUPDZ128mrk = 12081 |
| 156296 | CEFBS_None, // VMOVUPDZ128rm = 12082 |
| 156297 | CEFBS_None, // VMOVUPDZ128rmk = 12083 |
| 156298 | CEFBS_None, // VMOVUPDZ128rmkz = 12084 |
| 156299 | CEFBS_None, // VMOVUPDZ128rr = 12085 |
| 156300 | CEFBS_None, // VMOVUPDZ128rr_REV = 12086 |
| 156301 | CEFBS_None, // VMOVUPDZ128rrk = 12087 |
| 156302 | CEFBS_None, // VMOVUPDZ128rrk_REV = 12088 |
| 156303 | CEFBS_None, // VMOVUPDZ128rrkz = 12089 |
| 156304 | CEFBS_None, // VMOVUPDZ128rrkz_REV = 12090 |
| 156305 | CEFBS_None, // VMOVUPDZ256mr = 12091 |
| 156306 | CEFBS_None, // VMOVUPDZ256mrk = 12092 |
| 156307 | CEFBS_None, // VMOVUPDZ256rm = 12093 |
| 156308 | CEFBS_None, // VMOVUPDZ256rmk = 12094 |
| 156309 | CEFBS_None, // VMOVUPDZ256rmkz = 12095 |
| 156310 | CEFBS_None, // VMOVUPDZ256rr = 12096 |
| 156311 | CEFBS_None, // VMOVUPDZ256rr_REV = 12097 |
| 156312 | CEFBS_None, // VMOVUPDZ256rrk = 12098 |
| 156313 | CEFBS_None, // VMOVUPDZ256rrk_REV = 12099 |
| 156314 | CEFBS_None, // VMOVUPDZ256rrkz = 12100 |
| 156315 | CEFBS_None, // VMOVUPDZ256rrkz_REV = 12101 |
| 156316 | CEFBS_None, // VMOVUPDZmr = 12102 |
| 156317 | CEFBS_None, // VMOVUPDZmrk = 12103 |
| 156318 | CEFBS_None, // VMOVUPDZrm = 12104 |
| 156319 | CEFBS_None, // VMOVUPDZrmk = 12105 |
| 156320 | CEFBS_None, // VMOVUPDZrmkz = 12106 |
| 156321 | CEFBS_None, // VMOVUPDZrr = 12107 |
| 156322 | CEFBS_None, // VMOVUPDZrr_REV = 12108 |
| 156323 | CEFBS_None, // VMOVUPDZrrk = 12109 |
| 156324 | CEFBS_None, // VMOVUPDZrrk_REV = 12110 |
| 156325 | CEFBS_None, // VMOVUPDZrrkz = 12111 |
| 156326 | CEFBS_None, // VMOVUPDZrrkz_REV = 12112 |
| 156327 | CEFBS_None, // VMOVUPDmr = 12113 |
| 156328 | CEFBS_None, // VMOVUPDrm = 12114 |
| 156329 | CEFBS_None, // VMOVUPDrr = 12115 |
| 156330 | CEFBS_None, // VMOVUPDrr_REV = 12116 |
| 156331 | CEFBS_None, // VMOVUPSYmr = 12117 |
| 156332 | CEFBS_None, // VMOVUPSYrm = 12118 |
| 156333 | CEFBS_None, // VMOVUPSYrr = 12119 |
| 156334 | CEFBS_None, // VMOVUPSYrr_REV = 12120 |
| 156335 | CEFBS_None, // VMOVUPSZ128mr = 12121 |
| 156336 | CEFBS_None, // VMOVUPSZ128mrk = 12122 |
| 156337 | CEFBS_None, // VMOVUPSZ128rm = 12123 |
| 156338 | CEFBS_None, // VMOVUPSZ128rmk = 12124 |
| 156339 | CEFBS_None, // VMOVUPSZ128rmkz = 12125 |
| 156340 | CEFBS_None, // VMOVUPSZ128rr = 12126 |
| 156341 | CEFBS_None, // VMOVUPSZ128rr_REV = 12127 |
| 156342 | CEFBS_None, // VMOVUPSZ128rrk = 12128 |
| 156343 | CEFBS_None, // VMOVUPSZ128rrk_REV = 12129 |
| 156344 | CEFBS_None, // VMOVUPSZ128rrkz = 12130 |
| 156345 | CEFBS_None, // VMOVUPSZ128rrkz_REV = 12131 |
| 156346 | CEFBS_None, // VMOVUPSZ256mr = 12132 |
| 156347 | CEFBS_None, // VMOVUPSZ256mrk = 12133 |
| 156348 | CEFBS_None, // VMOVUPSZ256rm = 12134 |
| 156349 | CEFBS_None, // VMOVUPSZ256rmk = 12135 |
| 156350 | CEFBS_None, // VMOVUPSZ256rmkz = 12136 |
| 156351 | CEFBS_None, // VMOVUPSZ256rr = 12137 |
| 156352 | CEFBS_None, // VMOVUPSZ256rr_REV = 12138 |
| 156353 | CEFBS_None, // VMOVUPSZ256rrk = 12139 |
| 156354 | CEFBS_None, // VMOVUPSZ256rrk_REV = 12140 |
| 156355 | CEFBS_None, // VMOVUPSZ256rrkz = 12141 |
| 156356 | CEFBS_None, // VMOVUPSZ256rrkz_REV = 12142 |
| 156357 | CEFBS_None, // VMOVUPSZmr = 12143 |
| 156358 | CEFBS_None, // VMOVUPSZmrk = 12144 |
| 156359 | CEFBS_None, // VMOVUPSZrm = 12145 |
| 156360 | CEFBS_None, // VMOVUPSZrmk = 12146 |
| 156361 | CEFBS_None, // VMOVUPSZrmkz = 12147 |
| 156362 | CEFBS_None, // VMOVUPSZrr = 12148 |
| 156363 | CEFBS_None, // VMOVUPSZrr_REV = 12149 |
| 156364 | CEFBS_None, // VMOVUPSZrrk = 12150 |
| 156365 | CEFBS_None, // VMOVUPSZrrk_REV = 12151 |
| 156366 | CEFBS_None, // VMOVUPSZrrkz = 12152 |
| 156367 | CEFBS_None, // VMOVUPSZrrkz_REV = 12153 |
| 156368 | CEFBS_None, // VMOVUPSmr = 12154 |
| 156369 | CEFBS_None, // VMOVUPSrm = 12155 |
| 156370 | CEFBS_None, // VMOVUPSrr = 12156 |
| 156371 | CEFBS_None, // VMOVUPSrr_REV = 12157 |
| 156372 | CEFBS_None, // VMOVW2SHrr = 12158 |
| 156373 | CEFBS_None, // VMOVW64toSHrr = 12159 |
| 156374 | CEFBS_None, // VMOVWmr = 12160 |
| 156375 | CEFBS_None, // VMOVWrm = 12161 |
| 156376 | CEFBS_None, // VMOVZPQILo2PQIZrr = 12162 |
| 156377 | CEFBS_None, // VMOVZPQILo2PQIrr = 12163 |
| 156378 | CEFBS_None, // VMPSADBWYrmi = 12164 |
| 156379 | CEFBS_None, // VMPSADBWYrri = 12165 |
| 156380 | CEFBS_None, // VMPSADBWrmi = 12166 |
| 156381 | CEFBS_None, // VMPSADBWrri = 12167 |
| 156382 | CEFBS_None, // VMPTRLDm = 12168 |
| 156383 | CEFBS_None, // VMPTRSTm = 12169 |
| 156384 | CEFBS_Not64BitMode, // VMREAD32mr = 12170 |
| 156385 | CEFBS_Not64BitMode, // VMREAD32rr = 12171 |
| 156386 | CEFBS_In64BitMode, // VMREAD64mr = 12172 |
| 156387 | CEFBS_In64BitMode, // VMREAD64rr = 12173 |
| 156388 | CEFBS_None, // VMRESUME = 12174 |
| 156389 | CEFBS_Not64BitMode, // VMRUN32 = 12175 |
| 156390 | CEFBS_In64BitMode, // VMRUN64 = 12176 |
| 156391 | CEFBS_Not64BitMode, // VMSAVE32 = 12177 |
| 156392 | CEFBS_In64BitMode, // VMSAVE64 = 12178 |
| 156393 | CEFBS_None, // VMULPDYrm = 12179 |
| 156394 | CEFBS_None, // VMULPDYrr = 12180 |
| 156395 | CEFBS_None, // VMULPDZ128rm = 12181 |
| 156396 | CEFBS_None, // VMULPDZ128rmb = 12182 |
| 156397 | CEFBS_None, // VMULPDZ128rmbk = 12183 |
| 156398 | CEFBS_None, // VMULPDZ128rmbkz = 12184 |
| 156399 | CEFBS_None, // VMULPDZ128rmk = 12185 |
| 156400 | CEFBS_None, // VMULPDZ128rmkz = 12186 |
| 156401 | CEFBS_None, // VMULPDZ128rr = 12187 |
| 156402 | CEFBS_None, // VMULPDZ128rrk = 12188 |
| 156403 | CEFBS_None, // VMULPDZ128rrkz = 12189 |
| 156404 | CEFBS_None, // VMULPDZ256rm = 12190 |
| 156405 | CEFBS_None, // VMULPDZ256rmb = 12191 |
| 156406 | CEFBS_None, // VMULPDZ256rmbk = 12192 |
| 156407 | CEFBS_None, // VMULPDZ256rmbkz = 12193 |
| 156408 | CEFBS_None, // VMULPDZ256rmk = 12194 |
| 156409 | CEFBS_None, // VMULPDZ256rmkz = 12195 |
| 156410 | CEFBS_None, // VMULPDZ256rr = 12196 |
| 156411 | CEFBS_None, // VMULPDZ256rrk = 12197 |
| 156412 | CEFBS_None, // VMULPDZ256rrkz = 12198 |
| 156413 | CEFBS_None, // VMULPDZrm = 12199 |
| 156414 | CEFBS_None, // VMULPDZrmb = 12200 |
| 156415 | CEFBS_None, // VMULPDZrmbk = 12201 |
| 156416 | CEFBS_None, // VMULPDZrmbkz = 12202 |
| 156417 | CEFBS_None, // VMULPDZrmk = 12203 |
| 156418 | CEFBS_None, // VMULPDZrmkz = 12204 |
| 156419 | CEFBS_None, // VMULPDZrr = 12205 |
| 156420 | CEFBS_None, // VMULPDZrrb = 12206 |
| 156421 | CEFBS_None, // VMULPDZrrbk = 12207 |
| 156422 | CEFBS_None, // VMULPDZrrbkz = 12208 |
| 156423 | CEFBS_None, // VMULPDZrrk = 12209 |
| 156424 | CEFBS_None, // VMULPDZrrkz = 12210 |
| 156425 | CEFBS_None, // VMULPDrm = 12211 |
| 156426 | CEFBS_None, // VMULPDrr = 12212 |
| 156427 | CEFBS_None, // VMULPHZ128rm = 12213 |
| 156428 | CEFBS_None, // VMULPHZ128rmb = 12214 |
| 156429 | CEFBS_None, // VMULPHZ128rmbk = 12215 |
| 156430 | CEFBS_None, // VMULPHZ128rmbkz = 12216 |
| 156431 | CEFBS_None, // VMULPHZ128rmk = 12217 |
| 156432 | CEFBS_None, // VMULPHZ128rmkz = 12218 |
| 156433 | CEFBS_None, // VMULPHZ128rr = 12219 |
| 156434 | CEFBS_None, // VMULPHZ128rrk = 12220 |
| 156435 | CEFBS_None, // VMULPHZ128rrkz = 12221 |
| 156436 | CEFBS_None, // VMULPHZ256rm = 12222 |
| 156437 | CEFBS_None, // VMULPHZ256rmb = 12223 |
| 156438 | CEFBS_None, // VMULPHZ256rmbk = 12224 |
| 156439 | CEFBS_None, // VMULPHZ256rmbkz = 12225 |
| 156440 | CEFBS_None, // VMULPHZ256rmk = 12226 |
| 156441 | CEFBS_None, // VMULPHZ256rmkz = 12227 |
| 156442 | CEFBS_None, // VMULPHZ256rr = 12228 |
| 156443 | CEFBS_None, // VMULPHZ256rrk = 12229 |
| 156444 | CEFBS_None, // VMULPHZ256rrkz = 12230 |
| 156445 | CEFBS_None, // VMULPHZrm = 12231 |
| 156446 | CEFBS_None, // VMULPHZrmb = 12232 |
| 156447 | CEFBS_None, // VMULPHZrmbk = 12233 |
| 156448 | CEFBS_None, // VMULPHZrmbkz = 12234 |
| 156449 | CEFBS_None, // VMULPHZrmk = 12235 |
| 156450 | CEFBS_None, // VMULPHZrmkz = 12236 |
| 156451 | CEFBS_None, // VMULPHZrr = 12237 |
| 156452 | CEFBS_None, // VMULPHZrrb = 12238 |
| 156453 | CEFBS_None, // VMULPHZrrbk = 12239 |
| 156454 | CEFBS_None, // VMULPHZrrbkz = 12240 |
| 156455 | CEFBS_None, // VMULPHZrrk = 12241 |
| 156456 | CEFBS_None, // VMULPHZrrkz = 12242 |
| 156457 | CEFBS_None, // VMULPSYrm = 12243 |
| 156458 | CEFBS_None, // VMULPSYrr = 12244 |
| 156459 | CEFBS_None, // VMULPSZ128rm = 12245 |
| 156460 | CEFBS_None, // VMULPSZ128rmb = 12246 |
| 156461 | CEFBS_None, // VMULPSZ128rmbk = 12247 |
| 156462 | CEFBS_None, // VMULPSZ128rmbkz = 12248 |
| 156463 | CEFBS_None, // VMULPSZ128rmk = 12249 |
| 156464 | CEFBS_None, // VMULPSZ128rmkz = 12250 |
| 156465 | CEFBS_None, // VMULPSZ128rr = 12251 |
| 156466 | CEFBS_None, // VMULPSZ128rrk = 12252 |
| 156467 | CEFBS_None, // VMULPSZ128rrkz = 12253 |
| 156468 | CEFBS_None, // VMULPSZ256rm = 12254 |
| 156469 | CEFBS_None, // VMULPSZ256rmb = 12255 |
| 156470 | CEFBS_None, // VMULPSZ256rmbk = 12256 |
| 156471 | CEFBS_None, // VMULPSZ256rmbkz = 12257 |
| 156472 | CEFBS_None, // VMULPSZ256rmk = 12258 |
| 156473 | CEFBS_None, // VMULPSZ256rmkz = 12259 |
| 156474 | CEFBS_None, // VMULPSZ256rr = 12260 |
| 156475 | CEFBS_None, // VMULPSZ256rrk = 12261 |
| 156476 | CEFBS_None, // VMULPSZ256rrkz = 12262 |
| 156477 | CEFBS_None, // VMULPSZrm = 12263 |
| 156478 | CEFBS_None, // VMULPSZrmb = 12264 |
| 156479 | CEFBS_None, // VMULPSZrmbk = 12265 |
| 156480 | CEFBS_None, // VMULPSZrmbkz = 12266 |
| 156481 | CEFBS_None, // VMULPSZrmk = 12267 |
| 156482 | CEFBS_None, // VMULPSZrmkz = 12268 |
| 156483 | CEFBS_None, // VMULPSZrr = 12269 |
| 156484 | CEFBS_None, // VMULPSZrrb = 12270 |
| 156485 | CEFBS_None, // VMULPSZrrbk = 12271 |
| 156486 | CEFBS_None, // VMULPSZrrbkz = 12272 |
| 156487 | CEFBS_None, // VMULPSZrrk = 12273 |
| 156488 | CEFBS_None, // VMULPSZrrkz = 12274 |
| 156489 | CEFBS_None, // VMULPSrm = 12275 |
| 156490 | CEFBS_None, // VMULPSrr = 12276 |
| 156491 | CEFBS_None, // VMULSDZrm = 12277 |
| 156492 | CEFBS_None, // VMULSDZrm_Int = 12278 |
| 156493 | CEFBS_None, // VMULSDZrm_Intk = 12279 |
| 156494 | CEFBS_None, // VMULSDZrm_Intkz = 12280 |
| 156495 | CEFBS_None, // VMULSDZrr = 12281 |
| 156496 | CEFBS_None, // VMULSDZrr_Int = 12282 |
| 156497 | CEFBS_None, // VMULSDZrr_Intk = 12283 |
| 156498 | CEFBS_None, // VMULSDZrr_Intkz = 12284 |
| 156499 | CEFBS_None, // VMULSDZrrb_Int = 12285 |
| 156500 | CEFBS_None, // VMULSDZrrb_Intk = 12286 |
| 156501 | CEFBS_None, // VMULSDZrrb_Intkz = 12287 |
| 156502 | CEFBS_None, // VMULSDrm = 12288 |
| 156503 | CEFBS_None, // VMULSDrm_Int = 12289 |
| 156504 | CEFBS_None, // VMULSDrr = 12290 |
| 156505 | CEFBS_None, // VMULSDrr_Int = 12291 |
| 156506 | CEFBS_None, // VMULSHZrm = 12292 |
| 156507 | CEFBS_None, // VMULSHZrm_Int = 12293 |
| 156508 | CEFBS_None, // VMULSHZrm_Intk = 12294 |
| 156509 | CEFBS_None, // VMULSHZrm_Intkz = 12295 |
| 156510 | CEFBS_None, // VMULSHZrr = 12296 |
| 156511 | CEFBS_None, // VMULSHZrr_Int = 12297 |
| 156512 | CEFBS_None, // VMULSHZrr_Intk = 12298 |
| 156513 | CEFBS_None, // VMULSHZrr_Intkz = 12299 |
| 156514 | CEFBS_None, // VMULSHZrrb_Int = 12300 |
| 156515 | CEFBS_None, // VMULSHZrrb_Intk = 12301 |
| 156516 | CEFBS_None, // VMULSHZrrb_Intkz = 12302 |
| 156517 | CEFBS_None, // VMULSSZrm = 12303 |
| 156518 | CEFBS_None, // VMULSSZrm_Int = 12304 |
| 156519 | CEFBS_None, // VMULSSZrm_Intk = 12305 |
| 156520 | CEFBS_None, // VMULSSZrm_Intkz = 12306 |
| 156521 | CEFBS_None, // VMULSSZrr = 12307 |
| 156522 | CEFBS_None, // VMULSSZrr_Int = 12308 |
| 156523 | CEFBS_None, // VMULSSZrr_Intk = 12309 |
| 156524 | CEFBS_None, // VMULSSZrr_Intkz = 12310 |
| 156525 | CEFBS_None, // VMULSSZrrb_Int = 12311 |
| 156526 | CEFBS_None, // VMULSSZrrb_Intk = 12312 |
| 156527 | CEFBS_None, // VMULSSZrrb_Intkz = 12313 |
| 156528 | CEFBS_None, // VMULSSrm = 12314 |
| 156529 | CEFBS_None, // VMULSSrm_Int = 12315 |
| 156530 | CEFBS_None, // VMULSSrr = 12316 |
| 156531 | CEFBS_None, // VMULSSrr_Int = 12317 |
| 156532 | CEFBS_Not64BitMode, // VMWRITE32rm = 12318 |
| 156533 | CEFBS_Not64BitMode, // VMWRITE32rr = 12319 |
| 156534 | CEFBS_In64BitMode, // VMWRITE64rm = 12320 |
| 156535 | CEFBS_In64BitMode, // VMWRITE64rr = 12321 |
| 156536 | CEFBS_None, // VMXOFF = 12322 |
| 156537 | CEFBS_None, // VMXON = 12323 |
| 156538 | CEFBS_None, // VORPDYrm = 12324 |
| 156539 | CEFBS_None, // VORPDYrr = 12325 |
| 156540 | CEFBS_None, // VORPDZ128rm = 12326 |
| 156541 | CEFBS_None, // VORPDZ128rmb = 12327 |
| 156542 | CEFBS_None, // VORPDZ128rmbk = 12328 |
| 156543 | CEFBS_None, // VORPDZ128rmbkz = 12329 |
| 156544 | CEFBS_None, // VORPDZ128rmk = 12330 |
| 156545 | CEFBS_None, // VORPDZ128rmkz = 12331 |
| 156546 | CEFBS_None, // VORPDZ128rr = 12332 |
| 156547 | CEFBS_None, // VORPDZ128rrk = 12333 |
| 156548 | CEFBS_None, // VORPDZ128rrkz = 12334 |
| 156549 | CEFBS_None, // VORPDZ256rm = 12335 |
| 156550 | CEFBS_None, // VORPDZ256rmb = 12336 |
| 156551 | CEFBS_None, // VORPDZ256rmbk = 12337 |
| 156552 | CEFBS_None, // VORPDZ256rmbkz = 12338 |
| 156553 | CEFBS_None, // VORPDZ256rmk = 12339 |
| 156554 | CEFBS_None, // VORPDZ256rmkz = 12340 |
| 156555 | CEFBS_None, // VORPDZ256rr = 12341 |
| 156556 | CEFBS_None, // VORPDZ256rrk = 12342 |
| 156557 | CEFBS_None, // VORPDZ256rrkz = 12343 |
| 156558 | CEFBS_None, // VORPDZrm = 12344 |
| 156559 | CEFBS_None, // VORPDZrmb = 12345 |
| 156560 | CEFBS_None, // VORPDZrmbk = 12346 |
| 156561 | CEFBS_None, // VORPDZrmbkz = 12347 |
| 156562 | CEFBS_None, // VORPDZrmk = 12348 |
| 156563 | CEFBS_None, // VORPDZrmkz = 12349 |
| 156564 | CEFBS_None, // VORPDZrr = 12350 |
| 156565 | CEFBS_None, // VORPDZrrk = 12351 |
| 156566 | CEFBS_None, // VORPDZrrkz = 12352 |
| 156567 | CEFBS_None, // VORPDrm = 12353 |
| 156568 | CEFBS_None, // VORPDrr = 12354 |
| 156569 | CEFBS_None, // VORPSYrm = 12355 |
| 156570 | CEFBS_None, // VORPSYrr = 12356 |
| 156571 | CEFBS_None, // VORPSZ128rm = 12357 |
| 156572 | CEFBS_None, // VORPSZ128rmb = 12358 |
| 156573 | CEFBS_None, // VORPSZ128rmbk = 12359 |
| 156574 | CEFBS_None, // VORPSZ128rmbkz = 12360 |
| 156575 | CEFBS_None, // VORPSZ128rmk = 12361 |
| 156576 | CEFBS_None, // VORPSZ128rmkz = 12362 |
| 156577 | CEFBS_None, // VORPSZ128rr = 12363 |
| 156578 | CEFBS_None, // VORPSZ128rrk = 12364 |
| 156579 | CEFBS_None, // VORPSZ128rrkz = 12365 |
| 156580 | CEFBS_None, // VORPSZ256rm = 12366 |
| 156581 | CEFBS_None, // VORPSZ256rmb = 12367 |
| 156582 | CEFBS_None, // VORPSZ256rmbk = 12368 |
| 156583 | CEFBS_None, // VORPSZ256rmbkz = 12369 |
| 156584 | CEFBS_None, // VORPSZ256rmk = 12370 |
| 156585 | CEFBS_None, // VORPSZ256rmkz = 12371 |
| 156586 | CEFBS_None, // VORPSZ256rr = 12372 |
| 156587 | CEFBS_None, // VORPSZ256rrk = 12373 |
| 156588 | CEFBS_None, // VORPSZ256rrkz = 12374 |
| 156589 | CEFBS_None, // VORPSZrm = 12375 |
| 156590 | CEFBS_None, // VORPSZrmb = 12376 |
| 156591 | CEFBS_None, // VORPSZrmbk = 12377 |
| 156592 | CEFBS_None, // VORPSZrmbkz = 12378 |
| 156593 | CEFBS_None, // VORPSZrmk = 12379 |
| 156594 | CEFBS_None, // VORPSZrmkz = 12380 |
| 156595 | CEFBS_None, // VORPSZrr = 12381 |
| 156596 | CEFBS_None, // VORPSZrrk = 12382 |
| 156597 | CEFBS_None, // VORPSZrrkz = 12383 |
| 156598 | CEFBS_None, // VORPSrm = 12384 |
| 156599 | CEFBS_None, // VORPSrr = 12385 |
| 156600 | CEFBS_None, // VP2INTERSECTDZ128rm = 12386 |
| 156601 | CEFBS_None, // VP2INTERSECTDZ128rmb = 12387 |
| 156602 | CEFBS_None, // VP2INTERSECTDZ128rr = 12388 |
| 156603 | CEFBS_None, // VP2INTERSECTDZ256rm = 12389 |
| 156604 | CEFBS_None, // VP2INTERSECTDZ256rmb = 12390 |
| 156605 | CEFBS_None, // VP2INTERSECTDZ256rr = 12391 |
| 156606 | CEFBS_None, // VP2INTERSECTDZrm = 12392 |
| 156607 | CEFBS_None, // VP2INTERSECTDZrmb = 12393 |
| 156608 | CEFBS_None, // VP2INTERSECTDZrr = 12394 |
| 156609 | CEFBS_None, // VP2INTERSECTQZ128rm = 12395 |
| 156610 | CEFBS_None, // VP2INTERSECTQZ128rmb = 12396 |
| 156611 | CEFBS_None, // VP2INTERSECTQZ128rr = 12397 |
| 156612 | CEFBS_None, // VP2INTERSECTQZ256rm = 12398 |
| 156613 | CEFBS_None, // VP2INTERSECTQZ256rmb = 12399 |
| 156614 | CEFBS_None, // VP2INTERSECTQZ256rr = 12400 |
| 156615 | CEFBS_None, // VP2INTERSECTQZrm = 12401 |
| 156616 | CEFBS_None, // VP2INTERSECTQZrmb = 12402 |
| 156617 | CEFBS_None, // VP2INTERSECTQZrr = 12403 |
| 156618 | CEFBS_None, // VP4DPWSSDSrm = 12404 |
| 156619 | CEFBS_None, // VP4DPWSSDSrmk = 12405 |
| 156620 | CEFBS_None, // VP4DPWSSDSrmkz = 12406 |
| 156621 | CEFBS_None, // VP4DPWSSDrm = 12407 |
| 156622 | CEFBS_None, // VP4DPWSSDrmk = 12408 |
| 156623 | CEFBS_None, // VP4DPWSSDrmkz = 12409 |
| 156624 | CEFBS_None, // VPABSBYrm = 12410 |
| 156625 | CEFBS_None, // VPABSBYrr = 12411 |
| 156626 | CEFBS_None, // VPABSBZ128rm = 12412 |
| 156627 | CEFBS_None, // VPABSBZ128rmk = 12413 |
| 156628 | CEFBS_None, // VPABSBZ128rmkz = 12414 |
| 156629 | CEFBS_None, // VPABSBZ128rr = 12415 |
| 156630 | CEFBS_None, // VPABSBZ128rrk = 12416 |
| 156631 | CEFBS_None, // VPABSBZ128rrkz = 12417 |
| 156632 | CEFBS_None, // VPABSBZ256rm = 12418 |
| 156633 | CEFBS_None, // VPABSBZ256rmk = 12419 |
| 156634 | CEFBS_None, // VPABSBZ256rmkz = 12420 |
| 156635 | CEFBS_None, // VPABSBZ256rr = 12421 |
| 156636 | CEFBS_None, // VPABSBZ256rrk = 12422 |
| 156637 | CEFBS_None, // VPABSBZ256rrkz = 12423 |
| 156638 | CEFBS_None, // VPABSBZrm = 12424 |
| 156639 | CEFBS_None, // VPABSBZrmk = 12425 |
| 156640 | CEFBS_None, // VPABSBZrmkz = 12426 |
| 156641 | CEFBS_None, // VPABSBZrr = 12427 |
| 156642 | CEFBS_None, // VPABSBZrrk = 12428 |
| 156643 | CEFBS_None, // VPABSBZrrkz = 12429 |
| 156644 | CEFBS_None, // VPABSBrm = 12430 |
| 156645 | CEFBS_None, // VPABSBrr = 12431 |
| 156646 | CEFBS_None, // VPABSDYrm = 12432 |
| 156647 | CEFBS_None, // VPABSDYrr = 12433 |
| 156648 | CEFBS_None, // VPABSDZ128rm = 12434 |
| 156649 | CEFBS_None, // VPABSDZ128rmb = 12435 |
| 156650 | CEFBS_None, // VPABSDZ128rmbk = 12436 |
| 156651 | CEFBS_None, // VPABSDZ128rmbkz = 12437 |
| 156652 | CEFBS_None, // VPABSDZ128rmk = 12438 |
| 156653 | CEFBS_None, // VPABSDZ128rmkz = 12439 |
| 156654 | CEFBS_None, // VPABSDZ128rr = 12440 |
| 156655 | CEFBS_None, // VPABSDZ128rrk = 12441 |
| 156656 | CEFBS_None, // VPABSDZ128rrkz = 12442 |
| 156657 | CEFBS_None, // VPABSDZ256rm = 12443 |
| 156658 | CEFBS_None, // VPABSDZ256rmb = 12444 |
| 156659 | CEFBS_None, // VPABSDZ256rmbk = 12445 |
| 156660 | CEFBS_None, // VPABSDZ256rmbkz = 12446 |
| 156661 | CEFBS_None, // VPABSDZ256rmk = 12447 |
| 156662 | CEFBS_None, // VPABSDZ256rmkz = 12448 |
| 156663 | CEFBS_None, // VPABSDZ256rr = 12449 |
| 156664 | CEFBS_None, // VPABSDZ256rrk = 12450 |
| 156665 | CEFBS_None, // VPABSDZ256rrkz = 12451 |
| 156666 | CEFBS_None, // VPABSDZrm = 12452 |
| 156667 | CEFBS_None, // VPABSDZrmb = 12453 |
| 156668 | CEFBS_None, // VPABSDZrmbk = 12454 |
| 156669 | CEFBS_None, // VPABSDZrmbkz = 12455 |
| 156670 | CEFBS_None, // VPABSDZrmk = 12456 |
| 156671 | CEFBS_None, // VPABSDZrmkz = 12457 |
| 156672 | CEFBS_None, // VPABSDZrr = 12458 |
| 156673 | CEFBS_None, // VPABSDZrrk = 12459 |
| 156674 | CEFBS_None, // VPABSDZrrkz = 12460 |
| 156675 | CEFBS_None, // VPABSDrm = 12461 |
| 156676 | CEFBS_None, // VPABSDrr = 12462 |
| 156677 | CEFBS_None, // VPABSQZ128rm = 12463 |
| 156678 | CEFBS_None, // VPABSQZ128rmb = 12464 |
| 156679 | CEFBS_None, // VPABSQZ128rmbk = 12465 |
| 156680 | CEFBS_None, // VPABSQZ128rmbkz = 12466 |
| 156681 | CEFBS_None, // VPABSQZ128rmk = 12467 |
| 156682 | CEFBS_None, // VPABSQZ128rmkz = 12468 |
| 156683 | CEFBS_None, // VPABSQZ128rr = 12469 |
| 156684 | CEFBS_None, // VPABSQZ128rrk = 12470 |
| 156685 | CEFBS_None, // VPABSQZ128rrkz = 12471 |
| 156686 | CEFBS_None, // VPABSQZ256rm = 12472 |
| 156687 | CEFBS_None, // VPABSQZ256rmb = 12473 |
| 156688 | CEFBS_None, // VPABSQZ256rmbk = 12474 |
| 156689 | CEFBS_None, // VPABSQZ256rmbkz = 12475 |
| 156690 | CEFBS_None, // VPABSQZ256rmk = 12476 |
| 156691 | CEFBS_None, // VPABSQZ256rmkz = 12477 |
| 156692 | CEFBS_None, // VPABSQZ256rr = 12478 |
| 156693 | CEFBS_None, // VPABSQZ256rrk = 12479 |
| 156694 | CEFBS_None, // VPABSQZ256rrkz = 12480 |
| 156695 | CEFBS_None, // VPABSQZrm = 12481 |
| 156696 | CEFBS_None, // VPABSQZrmb = 12482 |
| 156697 | CEFBS_None, // VPABSQZrmbk = 12483 |
| 156698 | CEFBS_None, // VPABSQZrmbkz = 12484 |
| 156699 | CEFBS_None, // VPABSQZrmk = 12485 |
| 156700 | CEFBS_None, // VPABSQZrmkz = 12486 |
| 156701 | CEFBS_None, // VPABSQZrr = 12487 |
| 156702 | CEFBS_None, // VPABSQZrrk = 12488 |
| 156703 | CEFBS_None, // VPABSQZrrkz = 12489 |
| 156704 | CEFBS_None, // VPABSWYrm = 12490 |
| 156705 | CEFBS_None, // VPABSWYrr = 12491 |
| 156706 | CEFBS_None, // VPABSWZ128rm = 12492 |
| 156707 | CEFBS_None, // VPABSWZ128rmk = 12493 |
| 156708 | CEFBS_None, // VPABSWZ128rmkz = 12494 |
| 156709 | CEFBS_None, // VPABSWZ128rr = 12495 |
| 156710 | CEFBS_None, // VPABSWZ128rrk = 12496 |
| 156711 | CEFBS_None, // VPABSWZ128rrkz = 12497 |
| 156712 | CEFBS_None, // VPABSWZ256rm = 12498 |
| 156713 | CEFBS_None, // VPABSWZ256rmk = 12499 |
| 156714 | CEFBS_None, // VPABSWZ256rmkz = 12500 |
| 156715 | CEFBS_None, // VPABSWZ256rr = 12501 |
| 156716 | CEFBS_None, // VPABSWZ256rrk = 12502 |
| 156717 | CEFBS_None, // VPABSWZ256rrkz = 12503 |
| 156718 | CEFBS_None, // VPABSWZrm = 12504 |
| 156719 | CEFBS_None, // VPABSWZrmk = 12505 |
| 156720 | CEFBS_None, // VPABSWZrmkz = 12506 |
| 156721 | CEFBS_None, // VPABSWZrr = 12507 |
| 156722 | CEFBS_None, // VPABSWZrrk = 12508 |
| 156723 | CEFBS_None, // VPABSWZrrkz = 12509 |
| 156724 | CEFBS_None, // VPABSWrm = 12510 |
| 156725 | CEFBS_None, // VPABSWrr = 12511 |
| 156726 | CEFBS_None, // VPACKSSDWYrm = 12512 |
| 156727 | CEFBS_None, // VPACKSSDWYrr = 12513 |
| 156728 | CEFBS_None, // VPACKSSDWZ128rm = 12514 |
| 156729 | CEFBS_None, // VPACKSSDWZ128rmb = 12515 |
| 156730 | CEFBS_None, // VPACKSSDWZ128rmbk = 12516 |
| 156731 | CEFBS_None, // VPACKSSDWZ128rmbkz = 12517 |
| 156732 | CEFBS_None, // VPACKSSDWZ128rmk = 12518 |
| 156733 | CEFBS_None, // VPACKSSDWZ128rmkz = 12519 |
| 156734 | CEFBS_None, // VPACKSSDWZ128rr = 12520 |
| 156735 | CEFBS_None, // VPACKSSDWZ128rrk = 12521 |
| 156736 | CEFBS_None, // VPACKSSDWZ128rrkz = 12522 |
| 156737 | CEFBS_None, // VPACKSSDWZ256rm = 12523 |
| 156738 | CEFBS_None, // VPACKSSDWZ256rmb = 12524 |
| 156739 | CEFBS_None, // VPACKSSDWZ256rmbk = 12525 |
| 156740 | CEFBS_None, // VPACKSSDWZ256rmbkz = 12526 |
| 156741 | CEFBS_None, // VPACKSSDWZ256rmk = 12527 |
| 156742 | CEFBS_None, // VPACKSSDWZ256rmkz = 12528 |
| 156743 | CEFBS_None, // VPACKSSDWZ256rr = 12529 |
| 156744 | CEFBS_None, // VPACKSSDWZ256rrk = 12530 |
| 156745 | CEFBS_None, // VPACKSSDWZ256rrkz = 12531 |
| 156746 | CEFBS_None, // VPACKSSDWZrm = 12532 |
| 156747 | CEFBS_None, // VPACKSSDWZrmb = 12533 |
| 156748 | CEFBS_None, // VPACKSSDWZrmbk = 12534 |
| 156749 | CEFBS_None, // VPACKSSDWZrmbkz = 12535 |
| 156750 | CEFBS_None, // VPACKSSDWZrmk = 12536 |
| 156751 | CEFBS_None, // VPACKSSDWZrmkz = 12537 |
| 156752 | CEFBS_None, // VPACKSSDWZrr = 12538 |
| 156753 | CEFBS_None, // VPACKSSDWZrrk = 12539 |
| 156754 | CEFBS_None, // VPACKSSDWZrrkz = 12540 |
| 156755 | CEFBS_None, // VPACKSSDWrm = 12541 |
| 156756 | CEFBS_None, // VPACKSSDWrr = 12542 |
| 156757 | CEFBS_None, // VPACKSSWBYrm = 12543 |
| 156758 | CEFBS_None, // VPACKSSWBYrr = 12544 |
| 156759 | CEFBS_None, // VPACKSSWBZ128rm = 12545 |
| 156760 | CEFBS_None, // VPACKSSWBZ128rmk = 12546 |
| 156761 | CEFBS_None, // VPACKSSWBZ128rmkz = 12547 |
| 156762 | CEFBS_None, // VPACKSSWBZ128rr = 12548 |
| 156763 | CEFBS_None, // VPACKSSWBZ128rrk = 12549 |
| 156764 | CEFBS_None, // VPACKSSWBZ128rrkz = 12550 |
| 156765 | CEFBS_None, // VPACKSSWBZ256rm = 12551 |
| 156766 | CEFBS_None, // VPACKSSWBZ256rmk = 12552 |
| 156767 | CEFBS_None, // VPACKSSWBZ256rmkz = 12553 |
| 156768 | CEFBS_None, // VPACKSSWBZ256rr = 12554 |
| 156769 | CEFBS_None, // VPACKSSWBZ256rrk = 12555 |
| 156770 | CEFBS_None, // VPACKSSWBZ256rrkz = 12556 |
| 156771 | CEFBS_None, // VPACKSSWBZrm = 12557 |
| 156772 | CEFBS_None, // VPACKSSWBZrmk = 12558 |
| 156773 | CEFBS_None, // VPACKSSWBZrmkz = 12559 |
| 156774 | CEFBS_None, // VPACKSSWBZrr = 12560 |
| 156775 | CEFBS_None, // VPACKSSWBZrrk = 12561 |
| 156776 | CEFBS_None, // VPACKSSWBZrrkz = 12562 |
| 156777 | CEFBS_None, // VPACKSSWBrm = 12563 |
| 156778 | CEFBS_None, // VPACKSSWBrr = 12564 |
| 156779 | CEFBS_None, // VPACKUSDWYrm = 12565 |
| 156780 | CEFBS_None, // VPACKUSDWYrr = 12566 |
| 156781 | CEFBS_None, // VPACKUSDWZ128rm = 12567 |
| 156782 | CEFBS_None, // VPACKUSDWZ128rmb = 12568 |
| 156783 | CEFBS_None, // VPACKUSDWZ128rmbk = 12569 |
| 156784 | CEFBS_None, // VPACKUSDWZ128rmbkz = 12570 |
| 156785 | CEFBS_None, // VPACKUSDWZ128rmk = 12571 |
| 156786 | CEFBS_None, // VPACKUSDWZ128rmkz = 12572 |
| 156787 | CEFBS_None, // VPACKUSDWZ128rr = 12573 |
| 156788 | CEFBS_None, // VPACKUSDWZ128rrk = 12574 |
| 156789 | CEFBS_None, // VPACKUSDWZ128rrkz = 12575 |
| 156790 | CEFBS_None, // VPACKUSDWZ256rm = 12576 |
| 156791 | CEFBS_None, // VPACKUSDWZ256rmb = 12577 |
| 156792 | CEFBS_None, // VPACKUSDWZ256rmbk = 12578 |
| 156793 | CEFBS_None, // VPACKUSDWZ256rmbkz = 12579 |
| 156794 | CEFBS_None, // VPACKUSDWZ256rmk = 12580 |
| 156795 | CEFBS_None, // VPACKUSDWZ256rmkz = 12581 |
| 156796 | CEFBS_None, // VPACKUSDWZ256rr = 12582 |
| 156797 | CEFBS_None, // VPACKUSDWZ256rrk = 12583 |
| 156798 | CEFBS_None, // VPACKUSDWZ256rrkz = 12584 |
| 156799 | CEFBS_None, // VPACKUSDWZrm = 12585 |
| 156800 | CEFBS_None, // VPACKUSDWZrmb = 12586 |
| 156801 | CEFBS_None, // VPACKUSDWZrmbk = 12587 |
| 156802 | CEFBS_None, // VPACKUSDWZrmbkz = 12588 |
| 156803 | CEFBS_None, // VPACKUSDWZrmk = 12589 |
| 156804 | CEFBS_None, // VPACKUSDWZrmkz = 12590 |
| 156805 | CEFBS_None, // VPACKUSDWZrr = 12591 |
| 156806 | CEFBS_None, // VPACKUSDWZrrk = 12592 |
| 156807 | CEFBS_None, // VPACKUSDWZrrkz = 12593 |
| 156808 | CEFBS_None, // VPACKUSDWrm = 12594 |
| 156809 | CEFBS_None, // VPACKUSDWrr = 12595 |
| 156810 | CEFBS_None, // VPACKUSWBYrm = 12596 |
| 156811 | CEFBS_None, // VPACKUSWBYrr = 12597 |
| 156812 | CEFBS_None, // VPACKUSWBZ128rm = 12598 |
| 156813 | CEFBS_None, // VPACKUSWBZ128rmk = 12599 |
| 156814 | CEFBS_None, // VPACKUSWBZ128rmkz = 12600 |
| 156815 | CEFBS_None, // VPACKUSWBZ128rr = 12601 |
| 156816 | CEFBS_None, // VPACKUSWBZ128rrk = 12602 |
| 156817 | CEFBS_None, // VPACKUSWBZ128rrkz = 12603 |
| 156818 | CEFBS_None, // VPACKUSWBZ256rm = 12604 |
| 156819 | CEFBS_None, // VPACKUSWBZ256rmk = 12605 |
| 156820 | CEFBS_None, // VPACKUSWBZ256rmkz = 12606 |
| 156821 | CEFBS_None, // VPACKUSWBZ256rr = 12607 |
| 156822 | CEFBS_None, // VPACKUSWBZ256rrk = 12608 |
| 156823 | CEFBS_None, // VPACKUSWBZ256rrkz = 12609 |
| 156824 | CEFBS_None, // VPACKUSWBZrm = 12610 |
| 156825 | CEFBS_None, // VPACKUSWBZrmk = 12611 |
| 156826 | CEFBS_None, // VPACKUSWBZrmkz = 12612 |
| 156827 | CEFBS_None, // VPACKUSWBZrr = 12613 |
| 156828 | CEFBS_None, // VPACKUSWBZrrk = 12614 |
| 156829 | CEFBS_None, // VPACKUSWBZrrkz = 12615 |
| 156830 | CEFBS_None, // VPACKUSWBrm = 12616 |
| 156831 | CEFBS_None, // VPACKUSWBrr = 12617 |
| 156832 | CEFBS_None, // VPADDBYrm = 12618 |
| 156833 | CEFBS_None, // VPADDBYrr = 12619 |
| 156834 | CEFBS_None, // VPADDBZ128rm = 12620 |
| 156835 | CEFBS_None, // VPADDBZ128rmk = 12621 |
| 156836 | CEFBS_None, // VPADDBZ128rmkz = 12622 |
| 156837 | CEFBS_None, // VPADDBZ128rr = 12623 |
| 156838 | CEFBS_None, // VPADDBZ128rrk = 12624 |
| 156839 | CEFBS_None, // VPADDBZ128rrkz = 12625 |
| 156840 | CEFBS_None, // VPADDBZ256rm = 12626 |
| 156841 | CEFBS_None, // VPADDBZ256rmk = 12627 |
| 156842 | CEFBS_None, // VPADDBZ256rmkz = 12628 |
| 156843 | CEFBS_None, // VPADDBZ256rr = 12629 |
| 156844 | CEFBS_None, // VPADDBZ256rrk = 12630 |
| 156845 | CEFBS_None, // VPADDBZ256rrkz = 12631 |
| 156846 | CEFBS_None, // VPADDBZrm = 12632 |
| 156847 | CEFBS_None, // VPADDBZrmk = 12633 |
| 156848 | CEFBS_None, // VPADDBZrmkz = 12634 |
| 156849 | CEFBS_None, // VPADDBZrr = 12635 |
| 156850 | CEFBS_None, // VPADDBZrrk = 12636 |
| 156851 | CEFBS_None, // VPADDBZrrkz = 12637 |
| 156852 | CEFBS_None, // VPADDBrm = 12638 |
| 156853 | CEFBS_None, // VPADDBrr = 12639 |
| 156854 | CEFBS_None, // VPADDDYrm = 12640 |
| 156855 | CEFBS_None, // VPADDDYrr = 12641 |
| 156856 | CEFBS_None, // VPADDDZ128rm = 12642 |
| 156857 | CEFBS_None, // VPADDDZ128rmb = 12643 |
| 156858 | CEFBS_None, // VPADDDZ128rmbk = 12644 |
| 156859 | CEFBS_None, // VPADDDZ128rmbkz = 12645 |
| 156860 | CEFBS_None, // VPADDDZ128rmk = 12646 |
| 156861 | CEFBS_None, // VPADDDZ128rmkz = 12647 |
| 156862 | CEFBS_None, // VPADDDZ128rr = 12648 |
| 156863 | CEFBS_None, // VPADDDZ128rrk = 12649 |
| 156864 | CEFBS_None, // VPADDDZ128rrkz = 12650 |
| 156865 | CEFBS_None, // VPADDDZ256rm = 12651 |
| 156866 | CEFBS_None, // VPADDDZ256rmb = 12652 |
| 156867 | CEFBS_None, // VPADDDZ256rmbk = 12653 |
| 156868 | CEFBS_None, // VPADDDZ256rmbkz = 12654 |
| 156869 | CEFBS_None, // VPADDDZ256rmk = 12655 |
| 156870 | CEFBS_None, // VPADDDZ256rmkz = 12656 |
| 156871 | CEFBS_None, // VPADDDZ256rr = 12657 |
| 156872 | CEFBS_None, // VPADDDZ256rrk = 12658 |
| 156873 | CEFBS_None, // VPADDDZ256rrkz = 12659 |
| 156874 | CEFBS_None, // VPADDDZrm = 12660 |
| 156875 | CEFBS_None, // VPADDDZrmb = 12661 |
| 156876 | CEFBS_None, // VPADDDZrmbk = 12662 |
| 156877 | CEFBS_None, // VPADDDZrmbkz = 12663 |
| 156878 | CEFBS_None, // VPADDDZrmk = 12664 |
| 156879 | CEFBS_None, // VPADDDZrmkz = 12665 |
| 156880 | CEFBS_None, // VPADDDZrr = 12666 |
| 156881 | CEFBS_None, // VPADDDZrrk = 12667 |
| 156882 | CEFBS_None, // VPADDDZrrkz = 12668 |
| 156883 | CEFBS_None, // VPADDDrm = 12669 |
| 156884 | CEFBS_None, // VPADDDrr = 12670 |
| 156885 | CEFBS_None, // VPADDQYrm = 12671 |
| 156886 | CEFBS_None, // VPADDQYrr = 12672 |
| 156887 | CEFBS_None, // VPADDQZ128rm = 12673 |
| 156888 | CEFBS_None, // VPADDQZ128rmb = 12674 |
| 156889 | CEFBS_None, // VPADDQZ128rmbk = 12675 |
| 156890 | CEFBS_None, // VPADDQZ128rmbkz = 12676 |
| 156891 | CEFBS_None, // VPADDQZ128rmk = 12677 |
| 156892 | CEFBS_None, // VPADDQZ128rmkz = 12678 |
| 156893 | CEFBS_None, // VPADDQZ128rr = 12679 |
| 156894 | CEFBS_None, // VPADDQZ128rrk = 12680 |
| 156895 | CEFBS_None, // VPADDQZ128rrkz = 12681 |
| 156896 | CEFBS_None, // VPADDQZ256rm = 12682 |
| 156897 | CEFBS_None, // VPADDQZ256rmb = 12683 |
| 156898 | CEFBS_None, // VPADDQZ256rmbk = 12684 |
| 156899 | CEFBS_None, // VPADDQZ256rmbkz = 12685 |
| 156900 | CEFBS_None, // VPADDQZ256rmk = 12686 |
| 156901 | CEFBS_None, // VPADDQZ256rmkz = 12687 |
| 156902 | CEFBS_None, // VPADDQZ256rr = 12688 |
| 156903 | CEFBS_None, // VPADDQZ256rrk = 12689 |
| 156904 | CEFBS_None, // VPADDQZ256rrkz = 12690 |
| 156905 | CEFBS_None, // VPADDQZrm = 12691 |
| 156906 | CEFBS_None, // VPADDQZrmb = 12692 |
| 156907 | CEFBS_None, // VPADDQZrmbk = 12693 |
| 156908 | CEFBS_None, // VPADDQZrmbkz = 12694 |
| 156909 | CEFBS_None, // VPADDQZrmk = 12695 |
| 156910 | CEFBS_None, // VPADDQZrmkz = 12696 |
| 156911 | CEFBS_None, // VPADDQZrr = 12697 |
| 156912 | CEFBS_None, // VPADDQZrrk = 12698 |
| 156913 | CEFBS_None, // VPADDQZrrkz = 12699 |
| 156914 | CEFBS_None, // VPADDQrm = 12700 |
| 156915 | CEFBS_None, // VPADDQrr = 12701 |
| 156916 | CEFBS_None, // VPADDSBYrm = 12702 |
| 156917 | CEFBS_None, // VPADDSBYrr = 12703 |
| 156918 | CEFBS_None, // VPADDSBZ128rm = 12704 |
| 156919 | CEFBS_None, // VPADDSBZ128rmk = 12705 |
| 156920 | CEFBS_None, // VPADDSBZ128rmkz = 12706 |
| 156921 | CEFBS_None, // VPADDSBZ128rr = 12707 |
| 156922 | CEFBS_None, // VPADDSBZ128rrk = 12708 |
| 156923 | CEFBS_None, // VPADDSBZ128rrkz = 12709 |
| 156924 | CEFBS_None, // VPADDSBZ256rm = 12710 |
| 156925 | CEFBS_None, // VPADDSBZ256rmk = 12711 |
| 156926 | CEFBS_None, // VPADDSBZ256rmkz = 12712 |
| 156927 | CEFBS_None, // VPADDSBZ256rr = 12713 |
| 156928 | CEFBS_None, // VPADDSBZ256rrk = 12714 |
| 156929 | CEFBS_None, // VPADDSBZ256rrkz = 12715 |
| 156930 | CEFBS_None, // VPADDSBZrm = 12716 |
| 156931 | CEFBS_None, // VPADDSBZrmk = 12717 |
| 156932 | CEFBS_None, // VPADDSBZrmkz = 12718 |
| 156933 | CEFBS_None, // VPADDSBZrr = 12719 |
| 156934 | CEFBS_None, // VPADDSBZrrk = 12720 |
| 156935 | CEFBS_None, // VPADDSBZrrkz = 12721 |
| 156936 | CEFBS_None, // VPADDSBrm = 12722 |
| 156937 | CEFBS_None, // VPADDSBrr = 12723 |
| 156938 | CEFBS_None, // VPADDSWYrm = 12724 |
| 156939 | CEFBS_None, // VPADDSWYrr = 12725 |
| 156940 | CEFBS_None, // VPADDSWZ128rm = 12726 |
| 156941 | CEFBS_None, // VPADDSWZ128rmk = 12727 |
| 156942 | CEFBS_None, // VPADDSWZ128rmkz = 12728 |
| 156943 | CEFBS_None, // VPADDSWZ128rr = 12729 |
| 156944 | CEFBS_None, // VPADDSWZ128rrk = 12730 |
| 156945 | CEFBS_None, // VPADDSWZ128rrkz = 12731 |
| 156946 | CEFBS_None, // VPADDSWZ256rm = 12732 |
| 156947 | CEFBS_None, // VPADDSWZ256rmk = 12733 |
| 156948 | CEFBS_None, // VPADDSWZ256rmkz = 12734 |
| 156949 | CEFBS_None, // VPADDSWZ256rr = 12735 |
| 156950 | CEFBS_None, // VPADDSWZ256rrk = 12736 |
| 156951 | CEFBS_None, // VPADDSWZ256rrkz = 12737 |
| 156952 | CEFBS_None, // VPADDSWZrm = 12738 |
| 156953 | CEFBS_None, // VPADDSWZrmk = 12739 |
| 156954 | CEFBS_None, // VPADDSWZrmkz = 12740 |
| 156955 | CEFBS_None, // VPADDSWZrr = 12741 |
| 156956 | CEFBS_None, // VPADDSWZrrk = 12742 |
| 156957 | CEFBS_None, // VPADDSWZrrkz = 12743 |
| 156958 | CEFBS_None, // VPADDSWrm = 12744 |
| 156959 | CEFBS_None, // VPADDSWrr = 12745 |
| 156960 | CEFBS_None, // VPADDUSBYrm = 12746 |
| 156961 | CEFBS_None, // VPADDUSBYrr = 12747 |
| 156962 | CEFBS_None, // VPADDUSBZ128rm = 12748 |
| 156963 | CEFBS_None, // VPADDUSBZ128rmk = 12749 |
| 156964 | CEFBS_None, // VPADDUSBZ128rmkz = 12750 |
| 156965 | CEFBS_None, // VPADDUSBZ128rr = 12751 |
| 156966 | CEFBS_None, // VPADDUSBZ128rrk = 12752 |
| 156967 | CEFBS_None, // VPADDUSBZ128rrkz = 12753 |
| 156968 | CEFBS_None, // VPADDUSBZ256rm = 12754 |
| 156969 | CEFBS_None, // VPADDUSBZ256rmk = 12755 |
| 156970 | CEFBS_None, // VPADDUSBZ256rmkz = 12756 |
| 156971 | CEFBS_None, // VPADDUSBZ256rr = 12757 |
| 156972 | CEFBS_None, // VPADDUSBZ256rrk = 12758 |
| 156973 | CEFBS_None, // VPADDUSBZ256rrkz = 12759 |
| 156974 | CEFBS_None, // VPADDUSBZrm = 12760 |
| 156975 | CEFBS_None, // VPADDUSBZrmk = 12761 |
| 156976 | CEFBS_None, // VPADDUSBZrmkz = 12762 |
| 156977 | CEFBS_None, // VPADDUSBZrr = 12763 |
| 156978 | CEFBS_None, // VPADDUSBZrrk = 12764 |
| 156979 | CEFBS_None, // VPADDUSBZrrkz = 12765 |
| 156980 | CEFBS_None, // VPADDUSBrm = 12766 |
| 156981 | CEFBS_None, // VPADDUSBrr = 12767 |
| 156982 | CEFBS_None, // VPADDUSWYrm = 12768 |
| 156983 | CEFBS_None, // VPADDUSWYrr = 12769 |
| 156984 | CEFBS_None, // VPADDUSWZ128rm = 12770 |
| 156985 | CEFBS_None, // VPADDUSWZ128rmk = 12771 |
| 156986 | CEFBS_None, // VPADDUSWZ128rmkz = 12772 |
| 156987 | CEFBS_None, // VPADDUSWZ128rr = 12773 |
| 156988 | CEFBS_None, // VPADDUSWZ128rrk = 12774 |
| 156989 | CEFBS_None, // VPADDUSWZ128rrkz = 12775 |
| 156990 | CEFBS_None, // VPADDUSWZ256rm = 12776 |
| 156991 | CEFBS_None, // VPADDUSWZ256rmk = 12777 |
| 156992 | CEFBS_None, // VPADDUSWZ256rmkz = 12778 |
| 156993 | CEFBS_None, // VPADDUSWZ256rr = 12779 |
| 156994 | CEFBS_None, // VPADDUSWZ256rrk = 12780 |
| 156995 | CEFBS_None, // VPADDUSWZ256rrkz = 12781 |
| 156996 | CEFBS_None, // VPADDUSWZrm = 12782 |
| 156997 | CEFBS_None, // VPADDUSWZrmk = 12783 |
| 156998 | CEFBS_None, // VPADDUSWZrmkz = 12784 |
| 156999 | CEFBS_None, // VPADDUSWZrr = 12785 |
| 157000 | CEFBS_None, // VPADDUSWZrrk = 12786 |
| 157001 | CEFBS_None, // VPADDUSWZrrkz = 12787 |
| 157002 | CEFBS_None, // VPADDUSWrm = 12788 |
| 157003 | CEFBS_None, // VPADDUSWrr = 12789 |
| 157004 | CEFBS_None, // VPADDWYrm = 12790 |
| 157005 | CEFBS_None, // VPADDWYrr = 12791 |
| 157006 | CEFBS_None, // VPADDWZ128rm = 12792 |
| 157007 | CEFBS_None, // VPADDWZ128rmk = 12793 |
| 157008 | CEFBS_None, // VPADDWZ128rmkz = 12794 |
| 157009 | CEFBS_None, // VPADDWZ128rr = 12795 |
| 157010 | CEFBS_None, // VPADDWZ128rrk = 12796 |
| 157011 | CEFBS_None, // VPADDWZ128rrkz = 12797 |
| 157012 | CEFBS_None, // VPADDWZ256rm = 12798 |
| 157013 | CEFBS_None, // VPADDWZ256rmk = 12799 |
| 157014 | CEFBS_None, // VPADDWZ256rmkz = 12800 |
| 157015 | CEFBS_None, // VPADDWZ256rr = 12801 |
| 157016 | CEFBS_None, // VPADDWZ256rrk = 12802 |
| 157017 | CEFBS_None, // VPADDWZ256rrkz = 12803 |
| 157018 | CEFBS_None, // VPADDWZrm = 12804 |
| 157019 | CEFBS_None, // VPADDWZrmk = 12805 |
| 157020 | CEFBS_None, // VPADDWZrmkz = 12806 |
| 157021 | CEFBS_None, // VPADDWZrr = 12807 |
| 157022 | CEFBS_None, // VPADDWZrrk = 12808 |
| 157023 | CEFBS_None, // VPADDWZrrkz = 12809 |
| 157024 | CEFBS_None, // VPADDWrm = 12810 |
| 157025 | CEFBS_None, // VPADDWrr = 12811 |
| 157026 | CEFBS_None, // VPALIGNRYrmi = 12812 |
| 157027 | CEFBS_None, // VPALIGNRYrri = 12813 |
| 157028 | CEFBS_None, // VPALIGNRZ128rmi = 12814 |
| 157029 | CEFBS_None, // VPALIGNRZ128rmik = 12815 |
| 157030 | CEFBS_None, // VPALIGNRZ128rmikz = 12816 |
| 157031 | CEFBS_None, // VPALIGNRZ128rri = 12817 |
| 157032 | CEFBS_None, // VPALIGNRZ128rrik = 12818 |
| 157033 | CEFBS_None, // VPALIGNRZ128rrikz = 12819 |
| 157034 | CEFBS_None, // VPALIGNRZ256rmi = 12820 |
| 157035 | CEFBS_None, // VPALIGNRZ256rmik = 12821 |
| 157036 | CEFBS_None, // VPALIGNRZ256rmikz = 12822 |
| 157037 | CEFBS_None, // VPALIGNRZ256rri = 12823 |
| 157038 | CEFBS_None, // VPALIGNRZ256rrik = 12824 |
| 157039 | CEFBS_None, // VPALIGNRZ256rrikz = 12825 |
| 157040 | CEFBS_None, // VPALIGNRZrmi = 12826 |
| 157041 | CEFBS_None, // VPALIGNRZrmik = 12827 |
| 157042 | CEFBS_None, // VPALIGNRZrmikz = 12828 |
| 157043 | CEFBS_None, // VPALIGNRZrri = 12829 |
| 157044 | CEFBS_None, // VPALIGNRZrrik = 12830 |
| 157045 | CEFBS_None, // VPALIGNRZrrikz = 12831 |
| 157046 | CEFBS_None, // VPALIGNRrmi = 12832 |
| 157047 | CEFBS_None, // VPALIGNRrri = 12833 |
| 157048 | CEFBS_None, // VPANDDZ128rm = 12834 |
| 157049 | CEFBS_None, // VPANDDZ128rmb = 12835 |
| 157050 | CEFBS_None, // VPANDDZ128rmbk = 12836 |
| 157051 | CEFBS_None, // VPANDDZ128rmbkz = 12837 |
| 157052 | CEFBS_None, // VPANDDZ128rmk = 12838 |
| 157053 | CEFBS_None, // VPANDDZ128rmkz = 12839 |
| 157054 | CEFBS_None, // VPANDDZ128rr = 12840 |
| 157055 | CEFBS_None, // VPANDDZ128rrk = 12841 |
| 157056 | CEFBS_None, // VPANDDZ128rrkz = 12842 |
| 157057 | CEFBS_None, // VPANDDZ256rm = 12843 |
| 157058 | CEFBS_None, // VPANDDZ256rmb = 12844 |
| 157059 | CEFBS_None, // VPANDDZ256rmbk = 12845 |
| 157060 | CEFBS_None, // VPANDDZ256rmbkz = 12846 |
| 157061 | CEFBS_None, // VPANDDZ256rmk = 12847 |
| 157062 | CEFBS_None, // VPANDDZ256rmkz = 12848 |
| 157063 | CEFBS_None, // VPANDDZ256rr = 12849 |
| 157064 | CEFBS_None, // VPANDDZ256rrk = 12850 |
| 157065 | CEFBS_None, // VPANDDZ256rrkz = 12851 |
| 157066 | CEFBS_None, // VPANDDZrm = 12852 |
| 157067 | CEFBS_None, // VPANDDZrmb = 12853 |
| 157068 | CEFBS_None, // VPANDDZrmbk = 12854 |
| 157069 | CEFBS_None, // VPANDDZrmbkz = 12855 |
| 157070 | CEFBS_None, // VPANDDZrmk = 12856 |
| 157071 | CEFBS_None, // VPANDDZrmkz = 12857 |
| 157072 | CEFBS_None, // VPANDDZrr = 12858 |
| 157073 | CEFBS_None, // VPANDDZrrk = 12859 |
| 157074 | CEFBS_None, // VPANDDZrrkz = 12860 |
| 157075 | CEFBS_None, // VPANDNDZ128rm = 12861 |
| 157076 | CEFBS_None, // VPANDNDZ128rmb = 12862 |
| 157077 | CEFBS_None, // VPANDNDZ128rmbk = 12863 |
| 157078 | CEFBS_None, // VPANDNDZ128rmbkz = 12864 |
| 157079 | CEFBS_None, // VPANDNDZ128rmk = 12865 |
| 157080 | CEFBS_None, // VPANDNDZ128rmkz = 12866 |
| 157081 | CEFBS_None, // VPANDNDZ128rr = 12867 |
| 157082 | CEFBS_None, // VPANDNDZ128rrk = 12868 |
| 157083 | CEFBS_None, // VPANDNDZ128rrkz = 12869 |
| 157084 | CEFBS_None, // VPANDNDZ256rm = 12870 |
| 157085 | CEFBS_None, // VPANDNDZ256rmb = 12871 |
| 157086 | CEFBS_None, // VPANDNDZ256rmbk = 12872 |
| 157087 | CEFBS_None, // VPANDNDZ256rmbkz = 12873 |
| 157088 | CEFBS_None, // VPANDNDZ256rmk = 12874 |
| 157089 | CEFBS_None, // VPANDNDZ256rmkz = 12875 |
| 157090 | CEFBS_None, // VPANDNDZ256rr = 12876 |
| 157091 | CEFBS_None, // VPANDNDZ256rrk = 12877 |
| 157092 | CEFBS_None, // VPANDNDZ256rrkz = 12878 |
| 157093 | CEFBS_None, // VPANDNDZrm = 12879 |
| 157094 | CEFBS_None, // VPANDNDZrmb = 12880 |
| 157095 | CEFBS_None, // VPANDNDZrmbk = 12881 |
| 157096 | CEFBS_None, // VPANDNDZrmbkz = 12882 |
| 157097 | CEFBS_None, // VPANDNDZrmk = 12883 |
| 157098 | CEFBS_None, // VPANDNDZrmkz = 12884 |
| 157099 | CEFBS_None, // VPANDNDZrr = 12885 |
| 157100 | CEFBS_None, // VPANDNDZrrk = 12886 |
| 157101 | CEFBS_None, // VPANDNDZrrkz = 12887 |
| 157102 | CEFBS_None, // VPANDNQZ128rm = 12888 |
| 157103 | CEFBS_None, // VPANDNQZ128rmb = 12889 |
| 157104 | CEFBS_None, // VPANDNQZ128rmbk = 12890 |
| 157105 | CEFBS_None, // VPANDNQZ128rmbkz = 12891 |
| 157106 | CEFBS_None, // VPANDNQZ128rmk = 12892 |
| 157107 | CEFBS_None, // VPANDNQZ128rmkz = 12893 |
| 157108 | CEFBS_None, // VPANDNQZ128rr = 12894 |
| 157109 | CEFBS_None, // VPANDNQZ128rrk = 12895 |
| 157110 | CEFBS_None, // VPANDNQZ128rrkz = 12896 |
| 157111 | CEFBS_None, // VPANDNQZ256rm = 12897 |
| 157112 | CEFBS_None, // VPANDNQZ256rmb = 12898 |
| 157113 | CEFBS_None, // VPANDNQZ256rmbk = 12899 |
| 157114 | CEFBS_None, // VPANDNQZ256rmbkz = 12900 |
| 157115 | CEFBS_None, // VPANDNQZ256rmk = 12901 |
| 157116 | CEFBS_None, // VPANDNQZ256rmkz = 12902 |
| 157117 | CEFBS_None, // VPANDNQZ256rr = 12903 |
| 157118 | CEFBS_None, // VPANDNQZ256rrk = 12904 |
| 157119 | CEFBS_None, // VPANDNQZ256rrkz = 12905 |
| 157120 | CEFBS_None, // VPANDNQZrm = 12906 |
| 157121 | CEFBS_None, // VPANDNQZrmb = 12907 |
| 157122 | CEFBS_None, // VPANDNQZrmbk = 12908 |
| 157123 | CEFBS_None, // VPANDNQZrmbkz = 12909 |
| 157124 | CEFBS_None, // VPANDNQZrmk = 12910 |
| 157125 | CEFBS_None, // VPANDNQZrmkz = 12911 |
| 157126 | CEFBS_None, // VPANDNQZrr = 12912 |
| 157127 | CEFBS_None, // VPANDNQZrrk = 12913 |
| 157128 | CEFBS_None, // VPANDNQZrrkz = 12914 |
| 157129 | CEFBS_None, // VPANDNYrm = 12915 |
| 157130 | CEFBS_None, // VPANDNYrr = 12916 |
| 157131 | CEFBS_None, // VPANDNrm = 12917 |
| 157132 | CEFBS_None, // VPANDNrr = 12918 |
| 157133 | CEFBS_None, // VPANDQZ128rm = 12919 |
| 157134 | CEFBS_None, // VPANDQZ128rmb = 12920 |
| 157135 | CEFBS_None, // VPANDQZ128rmbk = 12921 |
| 157136 | CEFBS_None, // VPANDQZ128rmbkz = 12922 |
| 157137 | CEFBS_None, // VPANDQZ128rmk = 12923 |
| 157138 | CEFBS_None, // VPANDQZ128rmkz = 12924 |
| 157139 | CEFBS_None, // VPANDQZ128rr = 12925 |
| 157140 | CEFBS_None, // VPANDQZ128rrk = 12926 |
| 157141 | CEFBS_None, // VPANDQZ128rrkz = 12927 |
| 157142 | CEFBS_None, // VPANDQZ256rm = 12928 |
| 157143 | CEFBS_None, // VPANDQZ256rmb = 12929 |
| 157144 | CEFBS_None, // VPANDQZ256rmbk = 12930 |
| 157145 | CEFBS_None, // VPANDQZ256rmbkz = 12931 |
| 157146 | CEFBS_None, // VPANDQZ256rmk = 12932 |
| 157147 | CEFBS_None, // VPANDQZ256rmkz = 12933 |
| 157148 | CEFBS_None, // VPANDQZ256rr = 12934 |
| 157149 | CEFBS_None, // VPANDQZ256rrk = 12935 |
| 157150 | CEFBS_None, // VPANDQZ256rrkz = 12936 |
| 157151 | CEFBS_None, // VPANDQZrm = 12937 |
| 157152 | CEFBS_None, // VPANDQZrmb = 12938 |
| 157153 | CEFBS_None, // VPANDQZrmbk = 12939 |
| 157154 | CEFBS_None, // VPANDQZrmbkz = 12940 |
| 157155 | CEFBS_None, // VPANDQZrmk = 12941 |
| 157156 | CEFBS_None, // VPANDQZrmkz = 12942 |
| 157157 | CEFBS_None, // VPANDQZrr = 12943 |
| 157158 | CEFBS_None, // VPANDQZrrk = 12944 |
| 157159 | CEFBS_None, // VPANDQZrrkz = 12945 |
| 157160 | CEFBS_None, // VPANDYrm = 12946 |
| 157161 | CEFBS_None, // VPANDYrr = 12947 |
| 157162 | CEFBS_None, // VPANDrm = 12948 |
| 157163 | CEFBS_None, // VPANDrr = 12949 |
| 157164 | CEFBS_None, // VPAVGBYrm = 12950 |
| 157165 | CEFBS_None, // VPAVGBYrr = 12951 |
| 157166 | CEFBS_None, // VPAVGBZ128rm = 12952 |
| 157167 | CEFBS_None, // VPAVGBZ128rmk = 12953 |
| 157168 | CEFBS_None, // VPAVGBZ128rmkz = 12954 |
| 157169 | CEFBS_None, // VPAVGBZ128rr = 12955 |
| 157170 | CEFBS_None, // VPAVGBZ128rrk = 12956 |
| 157171 | CEFBS_None, // VPAVGBZ128rrkz = 12957 |
| 157172 | CEFBS_None, // VPAVGBZ256rm = 12958 |
| 157173 | CEFBS_None, // VPAVGBZ256rmk = 12959 |
| 157174 | CEFBS_None, // VPAVGBZ256rmkz = 12960 |
| 157175 | CEFBS_None, // VPAVGBZ256rr = 12961 |
| 157176 | CEFBS_None, // VPAVGBZ256rrk = 12962 |
| 157177 | CEFBS_None, // VPAVGBZ256rrkz = 12963 |
| 157178 | CEFBS_None, // VPAVGBZrm = 12964 |
| 157179 | CEFBS_None, // VPAVGBZrmk = 12965 |
| 157180 | CEFBS_None, // VPAVGBZrmkz = 12966 |
| 157181 | CEFBS_None, // VPAVGBZrr = 12967 |
| 157182 | CEFBS_None, // VPAVGBZrrk = 12968 |
| 157183 | CEFBS_None, // VPAVGBZrrkz = 12969 |
| 157184 | CEFBS_None, // VPAVGBrm = 12970 |
| 157185 | CEFBS_None, // VPAVGBrr = 12971 |
| 157186 | CEFBS_None, // VPAVGWYrm = 12972 |
| 157187 | CEFBS_None, // VPAVGWYrr = 12973 |
| 157188 | CEFBS_None, // VPAVGWZ128rm = 12974 |
| 157189 | CEFBS_None, // VPAVGWZ128rmk = 12975 |
| 157190 | CEFBS_None, // VPAVGWZ128rmkz = 12976 |
| 157191 | CEFBS_None, // VPAVGWZ128rr = 12977 |
| 157192 | CEFBS_None, // VPAVGWZ128rrk = 12978 |
| 157193 | CEFBS_None, // VPAVGWZ128rrkz = 12979 |
| 157194 | CEFBS_None, // VPAVGWZ256rm = 12980 |
| 157195 | CEFBS_None, // VPAVGWZ256rmk = 12981 |
| 157196 | CEFBS_None, // VPAVGWZ256rmkz = 12982 |
| 157197 | CEFBS_None, // VPAVGWZ256rr = 12983 |
| 157198 | CEFBS_None, // VPAVGWZ256rrk = 12984 |
| 157199 | CEFBS_None, // VPAVGWZ256rrkz = 12985 |
| 157200 | CEFBS_None, // VPAVGWZrm = 12986 |
| 157201 | CEFBS_None, // VPAVGWZrmk = 12987 |
| 157202 | CEFBS_None, // VPAVGWZrmkz = 12988 |
| 157203 | CEFBS_None, // VPAVGWZrr = 12989 |
| 157204 | CEFBS_None, // VPAVGWZrrk = 12990 |
| 157205 | CEFBS_None, // VPAVGWZrrkz = 12991 |
| 157206 | CEFBS_None, // VPAVGWrm = 12992 |
| 157207 | CEFBS_None, // VPAVGWrr = 12993 |
| 157208 | CEFBS_None, // VPBLENDDYrmi = 12994 |
| 157209 | CEFBS_None, // VPBLENDDYrri = 12995 |
| 157210 | CEFBS_None, // VPBLENDDrmi = 12996 |
| 157211 | CEFBS_None, // VPBLENDDrri = 12997 |
| 157212 | CEFBS_None, // VPBLENDMBZ128rm = 12998 |
| 157213 | CEFBS_None, // VPBLENDMBZ128rmk = 12999 |
| 157214 | CEFBS_None, // VPBLENDMBZ128rmkz = 13000 |
| 157215 | CEFBS_None, // VPBLENDMBZ128rr = 13001 |
| 157216 | CEFBS_None, // VPBLENDMBZ128rrk = 13002 |
| 157217 | CEFBS_None, // VPBLENDMBZ128rrkz = 13003 |
| 157218 | CEFBS_None, // VPBLENDMBZ256rm = 13004 |
| 157219 | CEFBS_None, // VPBLENDMBZ256rmk = 13005 |
| 157220 | CEFBS_None, // VPBLENDMBZ256rmkz = 13006 |
| 157221 | CEFBS_None, // VPBLENDMBZ256rr = 13007 |
| 157222 | CEFBS_None, // VPBLENDMBZ256rrk = 13008 |
| 157223 | CEFBS_None, // VPBLENDMBZ256rrkz = 13009 |
| 157224 | CEFBS_None, // VPBLENDMBZrm = 13010 |
| 157225 | CEFBS_None, // VPBLENDMBZrmk = 13011 |
| 157226 | CEFBS_None, // VPBLENDMBZrmkz = 13012 |
| 157227 | CEFBS_None, // VPBLENDMBZrr = 13013 |
| 157228 | CEFBS_None, // VPBLENDMBZrrk = 13014 |
| 157229 | CEFBS_None, // VPBLENDMBZrrkz = 13015 |
| 157230 | CEFBS_None, // VPBLENDMDZ128rm = 13016 |
| 157231 | CEFBS_None, // VPBLENDMDZ128rmb = 13017 |
| 157232 | CEFBS_None, // VPBLENDMDZ128rmbk = 13018 |
| 157233 | CEFBS_None, // VPBLENDMDZ128rmbkz = 13019 |
| 157234 | CEFBS_None, // VPBLENDMDZ128rmk = 13020 |
| 157235 | CEFBS_None, // VPBLENDMDZ128rmkz = 13021 |
| 157236 | CEFBS_None, // VPBLENDMDZ128rr = 13022 |
| 157237 | CEFBS_None, // VPBLENDMDZ128rrk = 13023 |
| 157238 | CEFBS_None, // VPBLENDMDZ128rrkz = 13024 |
| 157239 | CEFBS_None, // VPBLENDMDZ256rm = 13025 |
| 157240 | CEFBS_None, // VPBLENDMDZ256rmb = 13026 |
| 157241 | CEFBS_None, // VPBLENDMDZ256rmbk = 13027 |
| 157242 | CEFBS_None, // VPBLENDMDZ256rmbkz = 13028 |
| 157243 | CEFBS_None, // VPBLENDMDZ256rmk = 13029 |
| 157244 | CEFBS_None, // VPBLENDMDZ256rmkz = 13030 |
| 157245 | CEFBS_None, // VPBLENDMDZ256rr = 13031 |
| 157246 | CEFBS_None, // VPBLENDMDZ256rrk = 13032 |
| 157247 | CEFBS_None, // VPBLENDMDZ256rrkz = 13033 |
| 157248 | CEFBS_None, // VPBLENDMDZrm = 13034 |
| 157249 | CEFBS_None, // VPBLENDMDZrmb = 13035 |
| 157250 | CEFBS_None, // VPBLENDMDZrmbk = 13036 |
| 157251 | CEFBS_None, // VPBLENDMDZrmbkz = 13037 |
| 157252 | CEFBS_None, // VPBLENDMDZrmk = 13038 |
| 157253 | CEFBS_None, // VPBLENDMDZrmkz = 13039 |
| 157254 | CEFBS_None, // VPBLENDMDZrr = 13040 |
| 157255 | CEFBS_None, // VPBLENDMDZrrk = 13041 |
| 157256 | CEFBS_None, // VPBLENDMDZrrkz = 13042 |
| 157257 | CEFBS_None, // VPBLENDMQZ128rm = 13043 |
| 157258 | CEFBS_None, // VPBLENDMQZ128rmb = 13044 |
| 157259 | CEFBS_None, // VPBLENDMQZ128rmbk = 13045 |
| 157260 | CEFBS_None, // VPBLENDMQZ128rmbkz = 13046 |
| 157261 | CEFBS_None, // VPBLENDMQZ128rmk = 13047 |
| 157262 | CEFBS_None, // VPBLENDMQZ128rmkz = 13048 |
| 157263 | CEFBS_None, // VPBLENDMQZ128rr = 13049 |
| 157264 | CEFBS_None, // VPBLENDMQZ128rrk = 13050 |
| 157265 | CEFBS_None, // VPBLENDMQZ128rrkz = 13051 |
| 157266 | CEFBS_None, // VPBLENDMQZ256rm = 13052 |
| 157267 | CEFBS_None, // VPBLENDMQZ256rmb = 13053 |
| 157268 | CEFBS_None, // VPBLENDMQZ256rmbk = 13054 |
| 157269 | CEFBS_None, // VPBLENDMQZ256rmbkz = 13055 |
| 157270 | CEFBS_None, // VPBLENDMQZ256rmk = 13056 |
| 157271 | CEFBS_None, // VPBLENDMQZ256rmkz = 13057 |
| 157272 | CEFBS_None, // VPBLENDMQZ256rr = 13058 |
| 157273 | CEFBS_None, // VPBLENDMQZ256rrk = 13059 |
| 157274 | CEFBS_None, // VPBLENDMQZ256rrkz = 13060 |
| 157275 | CEFBS_None, // VPBLENDMQZrm = 13061 |
| 157276 | CEFBS_None, // VPBLENDMQZrmb = 13062 |
| 157277 | CEFBS_None, // VPBLENDMQZrmbk = 13063 |
| 157278 | CEFBS_None, // VPBLENDMQZrmbkz = 13064 |
| 157279 | CEFBS_None, // VPBLENDMQZrmk = 13065 |
| 157280 | CEFBS_None, // VPBLENDMQZrmkz = 13066 |
| 157281 | CEFBS_None, // VPBLENDMQZrr = 13067 |
| 157282 | CEFBS_None, // VPBLENDMQZrrk = 13068 |
| 157283 | CEFBS_None, // VPBLENDMQZrrkz = 13069 |
| 157284 | CEFBS_None, // VPBLENDMWZ128rm = 13070 |
| 157285 | CEFBS_None, // VPBLENDMWZ128rmk = 13071 |
| 157286 | CEFBS_None, // VPBLENDMWZ128rmkz = 13072 |
| 157287 | CEFBS_None, // VPBLENDMWZ128rr = 13073 |
| 157288 | CEFBS_None, // VPBLENDMWZ128rrk = 13074 |
| 157289 | CEFBS_None, // VPBLENDMWZ128rrkz = 13075 |
| 157290 | CEFBS_None, // VPBLENDMWZ256rm = 13076 |
| 157291 | CEFBS_None, // VPBLENDMWZ256rmk = 13077 |
| 157292 | CEFBS_None, // VPBLENDMWZ256rmkz = 13078 |
| 157293 | CEFBS_None, // VPBLENDMWZ256rr = 13079 |
| 157294 | CEFBS_None, // VPBLENDMWZ256rrk = 13080 |
| 157295 | CEFBS_None, // VPBLENDMWZ256rrkz = 13081 |
| 157296 | CEFBS_None, // VPBLENDMWZrm = 13082 |
| 157297 | CEFBS_None, // VPBLENDMWZrmk = 13083 |
| 157298 | CEFBS_None, // VPBLENDMWZrmkz = 13084 |
| 157299 | CEFBS_None, // VPBLENDMWZrr = 13085 |
| 157300 | CEFBS_None, // VPBLENDMWZrrk = 13086 |
| 157301 | CEFBS_None, // VPBLENDMWZrrkz = 13087 |
| 157302 | CEFBS_None, // VPBLENDVBYrmr = 13088 |
| 157303 | CEFBS_None, // VPBLENDVBYrrr = 13089 |
| 157304 | CEFBS_None, // VPBLENDVBrmr = 13090 |
| 157305 | CEFBS_None, // VPBLENDVBrrr = 13091 |
| 157306 | CEFBS_None, // VPBLENDWYrmi = 13092 |
| 157307 | CEFBS_None, // VPBLENDWYrri = 13093 |
| 157308 | CEFBS_None, // VPBLENDWrmi = 13094 |
| 157309 | CEFBS_None, // VPBLENDWrri = 13095 |
| 157310 | CEFBS_None, // VPBROADCASTBYrm = 13096 |
| 157311 | CEFBS_None, // VPBROADCASTBYrr = 13097 |
| 157312 | CEFBS_None, // VPBROADCASTBZ128rm = 13098 |
| 157313 | CEFBS_None, // VPBROADCASTBZ128rmk = 13099 |
| 157314 | CEFBS_None, // VPBROADCASTBZ128rmkz = 13100 |
| 157315 | CEFBS_None, // VPBROADCASTBZ128rr = 13101 |
| 157316 | CEFBS_None, // VPBROADCASTBZ128rrk = 13102 |
| 157317 | CEFBS_None, // VPBROADCASTBZ128rrkz = 13103 |
| 157318 | CEFBS_None, // VPBROADCASTBZ256rm = 13104 |
| 157319 | CEFBS_None, // VPBROADCASTBZ256rmk = 13105 |
| 157320 | CEFBS_None, // VPBROADCASTBZ256rmkz = 13106 |
| 157321 | CEFBS_None, // VPBROADCASTBZ256rr = 13107 |
| 157322 | CEFBS_None, // VPBROADCASTBZ256rrk = 13108 |
| 157323 | CEFBS_None, // VPBROADCASTBZ256rrkz = 13109 |
| 157324 | CEFBS_None, // VPBROADCASTBZrm = 13110 |
| 157325 | CEFBS_None, // VPBROADCASTBZrmk = 13111 |
| 157326 | CEFBS_None, // VPBROADCASTBZrmkz = 13112 |
| 157327 | CEFBS_None, // VPBROADCASTBZrr = 13113 |
| 157328 | CEFBS_None, // VPBROADCASTBZrrk = 13114 |
| 157329 | CEFBS_None, // VPBROADCASTBZrrkz = 13115 |
| 157330 | CEFBS_None, // VPBROADCASTBrZ128rr = 13116 |
| 157331 | CEFBS_None, // VPBROADCASTBrZ128rrk = 13117 |
| 157332 | CEFBS_None, // VPBROADCASTBrZ128rrkz = 13118 |
| 157333 | CEFBS_None, // VPBROADCASTBrZ256rr = 13119 |
| 157334 | CEFBS_None, // VPBROADCASTBrZ256rrk = 13120 |
| 157335 | CEFBS_None, // VPBROADCASTBrZ256rrkz = 13121 |
| 157336 | CEFBS_None, // VPBROADCASTBrZrr = 13122 |
| 157337 | CEFBS_None, // VPBROADCASTBrZrrk = 13123 |
| 157338 | CEFBS_None, // VPBROADCASTBrZrrkz = 13124 |
| 157339 | CEFBS_None, // VPBROADCASTBrm = 13125 |
| 157340 | CEFBS_None, // VPBROADCASTBrr = 13126 |
| 157341 | CEFBS_None, // VPBROADCASTDYrm = 13127 |
| 157342 | CEFBS_None, // VPBROADCASTDYrr = 13128 |
| 157343 | CEFBS_None, // VPBROADCASTDZ128rm = 13129 |
| 157344 | CEFBS_None, // VPBROADCASTDZ128rmk = 13130 |
| 157345 | CEFBS_None, // VPBROADCASTDZ128rmkz = 13131 |
| 157346 | CEFBS_None, // VPBROADCASTDZ128rr = 13132 |
| 157347 | CEFBS_None, // VPBROADCASTDZ128rrk = 13133 |
| 157348 | CEFBS_None, // VPBROADCASTDZ128rrkz = 13134 |
| 157349 | CEFBS_None, // VPBROADCASTDZ256rm = 13135 |
| 157350 | CEFBS_None, // VPBROADCASTDZ256rmk = 13136 |
| 157351 | CEFBS_None, // VPBROADCASTDZ256rmkz = 13137 |
| 157352 | CEFBS_None, // VPBROADCASTDZ256rr = 13138 |
| 157353 | CEFBS_None, // VPBROADCASTDZ256rrk = 13139 |
| 157354 | CEFBS_None, // VPBROADCASTDZ256rrkz = 13140 |
| 157355 | CEFBS_None, // VPBROADCASTDZrm = 13141 |
| 157356 | CEFBS_None, // VPBROADCASTDZrmk = 13142 |
| 157357 | CEFBS_None, // VPBROADCASTDZrmkz = 13143 |
| 157358 | CEFBS_None, // VPBROADCASTDZrr = 13144 |
| 157359 | CEFBS_None, // VPBROADCASTDZrrk = 13145 |
| 157360 | CEFBS_None, // VPBROADCASTDZrrkz = 13146 |
| 157361 | CEFBS_None, // VPBROADCASTDrZ128rr = 13147 |
| 157362 | CEFBS_None, // VPBROADCASTDrZ128rrk = 13148 |
| 157363 | CEFBS_None, // VPBROADCASTDrZ128rrkz = 13149 |
| 157364 | CEFBS_None, // VPBROADCASTDrZ256rr = 13150 |
| 157365 | CEFBS_None, // VPBROADCASTDrZ256rrk = 13151 |
| 157366 | CEFBS_None, // VPBROADCASTDrZ256rrkz = 13152 |
| 157367 | CEFBS_None, // VPBROADCASTDrZrr = 13153 |
| 157368 | CEFBS_None, // VPBROADCASTDrZrrk = 13154 |
| 157369 | CEFBS_None, // VPBROADCASTDrZrrkz = 13155 |
| 157370 | CEFBS_None, // VPBROADCASTDrm = 13156 |
| 157371 | CEFBS_None, // VPBROADCASTDrr = 13157 |
| 157372 | CEFBS_None, // VPBROADCASTMB2QZ128rr = 13158 |
| 157373 | CEFBS_None, // VPBROADCASTMB2QZ256rr = 13159 |
| 157374 | CEFBS_None, // VPBROADCASTMB2QZrr = 13160 |
| 157375 | CEFBS_None, // VPBROADCASTMW2DZ128rr = 13161 |
| 157376 | CEFBS_None, // VPBROADCASTMW2DZ256rr = 13162 |
| 157377 | CEFBS_None, // VPBROADCASTMW2DZrr = 13163 |
| 157378 | CEFBS_None, // VPBROADCASTQYrm = 13164 |
| 157379 | CEFBS_None, // VPBROADCASTQYrr = 13165 |
| 157380 | CEFBS_None, // VPBROADCASTQZ128rm = 13166 |
| 157381 | CEFBS_None, // VPBROADCASTQZ128rmk = 13167 |
| 157382 | CEFBS_None, // VPBROADCASTQZ128rmkz = 13168 |
| 157383 | CEFBS_None, // VPBROADCASTQZ128rr = 13169 |
| 157384 | CEFBS_None, // VPBROADCASTQZ128rrk = 13170 |
| 157385 | CEFBS_None, // VPBROADCASTQZ128rrkz = 13171 |
| 157386 | CEFBS_None, // VPBROADCASTQZ256rm = 13172 |
| 157387 | CEFBS_None, // VPBROADCASTQZ256rmk = 13173 |
| 157388 | CEFBS_None, // VPBROADCASTQZ256rmkz = 13174 |
| 157389 | CEFBS_None, // VPBROADCASTQZ256rr = 13175 |
| 157390 | CEFBS_None, // VPBROADCASTQZ256rrk = 13176 |
| 157391 | CEFBS_None, // VPBROADCASTQZ256rrkz = 13177 |
| 157392 | CEFBS_None, // VPBROADCASTQZrm = 13178 |
| 157393 | CEFBS_None, // VPBROADCASTQZrmk = 13179 |
| 157394 | CEFBS_None, // VPBROADCASTQZrmkz = 13180 |
| 157395 | CEFBS_None, // VPBROADCASTQZrr = 13181 |
| 157396 | CEFBS_None, // VPBROADCASTQZrrk = 13182 |
| 157397 | CEFBS_None, // VPBROADCASTQZrrkz = 13183 |
| 157398 | CEFBS_None, // VPBROADCASTQrZ128rr = 13184 |
| 157399 | CEFBS_None, // VPBROADCASTQrZ128rrk = 13185 |
| 157400 | CEFBS_None, // VPBROADCASTQrZ128rrkz = 13186 |
| 157401 | CEFBS_None, // VPBROADCASTQrZ256rr = 13187 |
| 157402 | CEFBS_None, // VPBROADCASTQrZ256rrk = 13188 |
| 157403 | CEFBS_None, // VPBROADCASTQrZ256rrkz = 13189 |
| 157404 | CEFBS_None, // VPBROADCASTQrZrr = 13190 |
| 157405 | CEFBS_None, // VPBROADCASTQrZrrk = 13191 |
| 157406 | CEFBS_None, // VPBROADCASTQrZrrkz = 13192 |
| 157407 | CEFBS_None, // VPBROADCASTQrm = 13193 |
| 157408 | CEFBS_None, // VPBROADCASTQrr = 13194 |
| 157409 | CEFBS_None, // VPBROADCASTWYrm = 13195 |
| 157410 | CEFBS_None, // VPBROADCASTWYrr = 13196 |
| 157411 | CEFBS_None, // VPBROADCASTWZ128rm = 13197 |
| 157412 | CEFBS_None, // VPBROADCASTWZ128rmk = 13198 |
| 157413 | CEFBS_None, // VPBROADCASTWZ128rmkz = 13199 |
| 157414 | CEFBS_None, // VPBROADCASTWZ128rr = 13200 |
| 157415 | CEFBS_None, // VPBROADCASTWZ128rrk = 13201 |
| 157416 | CEFBS_None, // VPBROADCASTWZ128rrkz = 13202 |
| 157417 | CEFBS_None, // VPBROADCASTWZ256rm = 13203 |
| 157418 | CEFBS_None, // VPBROADCASTWZ256rmk = 13204 |
| 157419 | CEFBS_None, // VPBROADCASTWZ256rmkz = 13205 |
| 157420 | CEFBS_None, // VPBROADCASTWZ256rr = 13206 |
| 157421 | CEFBS_None, // VPBROADCASTWZ256rrk = 13207 |
| 157422 | CEFBS_None, // VPBROADCASTWZ256rrkz = 13208 |
| 157423 | CEFBS_None, // VPBROADCASTWZrm = 13209 |
| 157424 | CEFBS_None, // VPBROADCASTWZrmk = 13210 |
| 157425 | CEFBS_None, // VPBROADCASTWZrmkz = 13211 |
| 157426 | CEFBS_None, // VPBROADCASTWZrr = 13212 |
| 157427 | CEFBS_None, // VPBROADCASTWZrrk = 13213 |
| 157428 | CEFBS_None, // VPBROADCASTWZrrkz = 13214 |
| 157429 | CEFBS_None, // VPBROADCASTWrZ128rr = 13215 |
| 157430 | CEFBS_None, // VPBROADCASTWrZ128rrk = 13216 |
| 157431 | CEFBS_None, // VPBROADCASTWrZ128rrkz = 13217 |
| 157432 | CEFBS_None, // VPBROADCASTWrZ256rr = 13218 |
| 157433 | CEFBS_None, // VPBROADCASTWrZ256rrk = 13219 |
| 157434 | CEFBS_None, // VPBROADCASTWrZ256rrkz = 13220 |
| 157435 | CEFBS_None, // VPBROADCASTWrZrr = 13221 |
| 157436 | CEFBS_None, // VPBROADCASTWrZrrk = 13222 |
| 157437 | CEFBS_None, // VPBROADCASTWrZrrkz = 13223 |
| 157438 | CEFBS_None, // VPBROADCASTWrm = 13224 |
| 157439 | CEFBS_None, // VPBROADCASTWrr = 13225 |
| 157440 | CEFBS_None, // VPCLMULQDQYrmi = 13226 |
| 157441 | CEFBS_None, // VPCLMULQDQYrri = 13227 |
| 157442 | CEFBS_None, // VPCLMULQDQZ128rmi = 13228 |
| 157443 | CEFBS_None, // VPCLMULQDQZ128rri = 13229 |
| 157444 | CEFBS_None, // VPCLMULQDQZ256rmi = 13230 |
| 157445 | CEFBS_None, // VPCLMULQDQZ256rri = 13231 |
| 157446 | CEFBS_None, // VPCLMULQDQZrmi = 13232 |
| 157447 | CEFBS_None, // VPCLMULQDQZrri = 13233 |
| 157448 | CEFBS_None, // VPCLMULQDQrmi = 13234 |
| 157449 | CEFBS_None, // VPCLMULQDQrri = 13235 |
| 157450 | CEFBS_None, // VPCMOVYrmr = 13236 |
| 157451 | CEFBS_None, // VPCMOVYrrm = 13237 |
| 157452 | CEFBS_None, // VPCMOVYrrr = 13238 |
| 157453 | CEFBS_None, // VPCMOVYrrr_REV = 13239 |
| 157454 | CEFBS_None, // VPCMOVrmr = 13240 |
| 157455 | CEFBS_None, // VPCMOVrrm = 13241 |
| 157456 | CEFBS_None, // VPCMOVrrr = 13242 |
| 157457 | CEFBS_None, // VPCMOVrrr_REV = 13243 |
| 157458 | CEFBS_None, // VPCMPBZ128rmi = 13244 |
| 157459 | CEFBS_None, // VPCMPBZ128rmik = 13245 |
| 157460 | CEFBS_None, // VPCMPBZ128rri = 13246 |
| 157461 | CEFBS_None, // VPCMPBZ128rrik = 13247 |
| 157462 | CEFBS_None, // VPCMPBZ256rmi = 13248 |
| 157463 | CEFBS_None, // VPCMPBZ256rmik = 13249 |
| 157464 | CEFBS_None, // VPCMPBZ256rri = 13250 |
| 157465 | CEFBS_None, // VPCMPBZ256rrik = 13251 |
| 157466 | CEFBS_None, // VPCMPBZrmi = 13252 |
| 157467 | CEFBS_None, // VPCMPBZrmik = 13253 |
| 157468 | CEFBS_None, // VPCMPBZrri = 13254 |
| 157469 | CEFBS_None, // VPCMPBZrrik = 13255 |
| 157470 | CEFBS_None, // VPCMPDZ128rmi = 13256 |
| 157471 | CEFBS_None, // VPCMPDZ128rmib = 13257 |
| 157472 | CEFBS_None, // VPCMPDZ128rmibk = 13258 |
| 157473 | CEFBS_None, // VPCMPDZ128rmik = 13259 |
| 157474 | CEFBS_None, // VPCMPDZ128rri = 13260 |
| 157475 | CEFBS_None, // VPCMPDZ128rrik = 13261 |
| 157476 | CEFBS_None, // VPCMPDZ256rmi = 13262 |
| 157477 | CEFBS_None, // VPCMPDZ256rmib = 13263 |
| 157478 | CEFBS_None, // VPCMPDZ256rmibk = 13264 |
| 157479 | CEFBS_None, // VPCMPDZ256rmik = 13265 |
| 157480 | CEFBS_None, // VPCMPDZ256rri = 13266 |
| 157481 | CEFBS_None, // VPCMPDZ256rrik = 13267 |
| 157482 | CEFBS_None, // VPCMPDZrmi = 13268 |
| 157483 | CEFBS_None, // VPCMPDZrmib = 13269 |
| 157484 | CEFBS_None, // VPCMPDZrmibk = 13270 |
| 157485 | CEFBS_None, // VPCMPDZrmik = 13271 |
| 157486 | CEFBS_None, // VPCMPDZrri = 13272 |
| 157487 | CEFBS_None, // VPCMPDZrrik = 13273 |
| 157488 | CEFBS_None, // VPCMPEQBYrm = 13274 |
| 157489 | CEFBS_None, // VPCMPEQBYrr = 13275 |
| 157490 | CEFBS_None, // VPCMPEQBZ128rm = 13276 |
| 157491 | CEFBS_None, // VPCMPEQBZ128rmk = 13277 |
| 157492 | CEFBS_None, // VPCMPEQBZ128rr = 13278 |
| 157493 | CEFBS_None, // VPCMPEQBZ128rrk = 13279 |
| 157494 | CEFBS_None, // VPCMPEQBZ256rm = 13280 |
| 157495 | CEFBS_None, // VPCMPEQBZ256rmk = 13281 |
| 157496 | CEFBS_None, // VPCMPEQBZ256rr = 13282 |
| 157497 | CEFBS_None, // VPCMPEQBZ256rrk = 13283 |
| 157498 | CEFBS_None, // VPCMPEQBZrm = 13284 |
| 157499 | CEFBS_None, // VPCMPEQBZrmk = 13285 |
| 157500 | CEFBS_None, // VPCMPEQBZrr = 13286 |
| 157501 | CEFBS_None, // VPCMPEQBZrrk = 13287 |
| 157502 | CEFBS_None, // VPCMPEQBrm = 13288 |
| 157503 | CEFBS_None, // VPCMPEQBrr = 13289 |
| 157504 | CEFBS_None, // VPCMPEQDYrm = 13290 |
| 157505 | CEFBS_None, // VPCMPEQDYrr = 13291 |
| 157506 | CEFBS_None, // VPCMPEQDZ128rm = 13292 |
| 157507 | CEFBS_None, // VPCMPEQDZ128rmb = 13293 |
| 157508 | CEFBS_None, // VPCMPEQDZ128rmbk = 13294 |
| 157509 | CEFBS_None, // VPCMPEQDZ128rmk = 13295 |
| 157510 | CEFBS_None, // VPCMPEQDZ128rr = 13296 |
| 157511 | CEFBS_None, // VPCMPEQDZ128rrk = 13297 |
| 157512 | CEFBS_None, // VPCMPEQDZ256rm = 13298 |
| 157513 | CEFBS_None, // VPCMPEQDZ256rmb = 13299 |
| 157514 | CEFBS_None, // VPCMPEQDZ256rmbk = 13300 |
| 157515 | CEFBS_None, // VPCMPEQDZ256rmk = 13301 |
| 157516 | CEFBS_None, // VPCMPEQDZ256rr = 13302 |
| 157517 | CEFBS_None, // VPCMPEQDZ256rrk = 13303 |
| 157518 | CEFBS_None, // VPCMPEQDZrm = 13304 |
| 157519 | CEFBS_None, // VPCMPEQDZrmb = 13305 |
| 157520 | CEFBS_None, // VPCMPEQDZrmbk = 13306 |
| 157521 | CEFBS_None, // VPCMPEQDZrmk = 13307 |
| 157522 | CEFBS_None, // VPCMPEQDZrr = 13308 |
| 157523 | CEFBS_None, // VPCMPEQDZrrk = 13309 |
| 157524 | CEFBS_None, // VPCMPEQDrm = 13310 |
| 157525 | CEFBS_None, // VPCMPEQDrr = 13311 |
| 157526 | CEFBS_None, // VPCMPEQQYrm = 13312 |
| 157527 | CEFBS_None, // VPCMPEQQYrr = 13313 |
| 157528 | CEFBS_None, // VPCMPEQQZ128rm = 13314 |
| 157529 | CEFBS_None, // VPCMPEQQZ128rmb = 13315 |
| 157530 | CEFBS_None, // VPCMPEQQZ128rmbk = 13316 |
| 157531 | CEFBS_None, // VPCMPEQQZ128rmk = 13317 |
| 157532 | CEFBS_None, // VPCMPEQQZ128rr = 13318 |
| 157533 | CEFBS_None, // VPCMPEQQZ128rrk = 13319 |
| 157534 | CEFBS_None, // VPCMPEQQZ256rm = 13320 |
| 157535 | CEFBS_None, // VPCMPEQQZ256rmb = 13321 |
| 157536 | CEFBS_None, // VPCMPEQQZ256rmbk = 13322 |
| 157537 | CEFBS_None, // VPCMPEQQZ256rmk = 13323 |
| 157538 | CEFBS_None, // VPCMPEQQZ256rr = 13324 |
| 157539 | CEFBS_None, // VPCMPEQQZ256rrk = 13325 |
| 157540 | CEFBS_None, // VPCMPEQQZrm = 13326 |
| 157541 | CEFBS_None, // VPCMPEQQZrmb = 13327 |
| 157542 | CEFBS_None, // VPCMPEQQZrmbk = 13328 |
| 157543 | CEFBS_None, // VPCMPEQQZrmk = 13329 |
| 157544 | CEFBS_None, // VPCMPEQQZrr = 13330 |
| 157545 | CEFBS_None, // VPCMPEQQZrrk = 13331 |
| 157546 | CEFBS_None, // VPCMPEQQrm = 13332 |
| 157547 | CEFBS_None, // VPCMPEQQrr = 13333 |
| 157548 | CEFBS_None, // VPCMPEQWYrm = 13334 |
| 157549 | CEFBS_None, // VPCMPEQWYrr = 13335 |
| 157550 | CEFBS_None, // VPCMPEQWZ128rm = 13336 |
| 157551 | CEFBS_None, // VPCMPEQWZ128rmk = 13337 |
| 157552 | CEFBS_None, // VPCMPEQWZ128rr = 13338 |
| 157553 | CEFBS_None, // VPCMPEQWZ128rrk = 13339 |
| 157554 | CEFBS_None, // VPCMPEQWZ256rm = 13340 |
| 157555 | CEFBS_None, // VPCMPEQWZ256rmk = 13341 |
| 157556 | CEFBS_None, // VPCMPEQWZ256rr = 13342 |
| 157557 | CEFBS_None, // VPCMPEQWZ256rrk = 13343 |
| 157558 | CEFBS_None, // VPCMPEQWZrm = 13344 |
| 157559 | CEFBS_None, // VPCMPEQWZrmk = 13345 |
| 157560 | CEFBS_None, // VPCMPEQWZrr = 13346 |
| 157561 | CEFBS_None, // VPCMPEQWZrrk = 13347 |
| 157562 | CEFBS_None, // VPCMPEQWrm = 13348 |
| 157563 | CEFBS_None, // VPCMPEQWrr = 13349 |
| 157564 | CEFBS_None, // VPCMPESTRIrmi = 13350 |
| 157565 | CEFBS_None, // VPCMPESTRIrri = 13351 |
| 157566 | CEFBS_None, // VPCMPESTRMrmi = 13352 |
| 157567 | CEFBS_None, // VPCMPESTRMrri = 13353 |
| 157568 | CEFBS_None, // VPCMPGTBYrm = 13354 |
| 157569 | CEFBS_None, // VPCMPGTBYrr = 13355 |
| 157570 | CEFBS_None, // VPCMPGTBZ128rm = 13356 |
| 157571 | CEFBS_None, // VPCMPGTBZ128rmk = 13357 |
| 157572 | CEFBS_None, // VPCMPGTBZ128rr = 13358 |
| 157573 | CEFBS_None, // VPCMPGTBZ128rrk = 13359 |
| 157574 | CEFBS_None, // VPCMPGTBZ256rm = 13360 |
| 157575 | CEFBS_None, // VPCMPGTBZ256rmk = 13361 |
| 157576 | CEFBS_None, // VPCMPGTBZ256rr = 13362 |
| 157577 | CEFBS_None, // VPCMPGTBZ256rrk = 13363 |
| 157578 | CEFBS_None, // VPCMPGTBZrm = 13364 |
| 157579 | CEFBS_None, // VPCMPGTBZrmk = 13365 |
| 157580 | CEFBS_None, // VPCMPGTBZrr = 13366 |
| 157581 | CEFBS_None, // VPCMPGTBZrrk = 13367 |
| 157582 | CEFBS_None, // VPCMPGTBrm = 13368 |
| 157583 | CEFBS_None, // VPCMPGTBrr = 13369 |
| 157584 | CEFBS_None, // VPCMPGTDYrm = 13370 |
| 157585 | CEFBS_None, // VPCMPGTDYrr = 13371 |
| 157586 | CEFBS_None, // VPCMPGTDZ128rm = 13372 |
| 157587 | CEFBS_None, // VPCMPGTDZ128rmb = 13373 |
| 157588 | CEFBS_None, // VPCMPGTDZ128rmbk = 13374 |
| 157589 | CEFBS_None, // VPCMPGTDZ128rmk = 13375 |
| 157590 | CEFBS_None, // VPCMPGTDZ128rr = 13376 |
| 157591 | CEFBS_None, // VPCMPGTDZ128rrk = 13377 |
| 157592 | CEFBS_None, // VPCMPGTDZ256rm = 13378 |
| 157593 | CEFBS_None, // VPCMPGTDZ256rmb = 13379 |
| 157594 | CEFBS_None, // VPCMPGTDZ256rmbk = 13380 |
| 157595 | CEFBS_None, // VPCMPGTDZ256rmk = 13381 |
| 157596 | CEFBS_None, // VPCMPGTDZ256rr = 13382 |
| 157597 | CEFBS_None, // VPCMPGTDZ256rrk = 13383 |
| 157598 | CEFBS_None, // VPCMPGTDZrm = 13384 |
| 157599 | CEFBS_None, // VPCMPGTDZrmb = 13385 |
| 157600 | CEFBS_None, // VPCMPGTDZrmbk = 13386 |
| 157601 | CEFBS_None, // VPCMPGTDZrmk = 13387 |
| 157602 | CEFBS_None, // VPCMPGTDZrr = 13388 |
| 157603 | CEFBS_None, // VPCMPGTDZrrk = 13389 |
| 157604 | CEFBS_None, // VPCMPGTDrm = 13390 |
| 157605 | CEFBS_None, // VPCMPGTDrr = 13391 |
| 157606 | CEFBS_None, // VPCMPGTQYrm = 13392 |
| 157607 | CEFBS_None, // VPCMPGTQYrr = 13393 |
| 157608 | CEFBS_None, // VPCMPGTQZ128rm = 13394 |
| 157609 | CEFBS_None, // VPCMPGTQZ128rmb = 13395 |
| 157610 | CEFBS_None, // VPCMPGTQZ128rmbk = 13396 |
| 157611 | CEFBS_None, // VPCMPGTQZ128rmk = 13397 |
| 157612 | CEFBS_None, // VPCMPGTQZ128rr = 13398 |
| 157613 | CEFBS_None, // VPCMPGTQZ128rrk = 13399 |
| 157614 | CEFBS_None, // VPCMPGTQZ256rm = 13400 |
| 157615 | CEFBS_None, // VPCMPGTQZ256rmb = 13401 |
| 157616 | CEFBS_None, // VPCMPGTQZ256rmbk = 13402 |
| 157617 | CEFBS_None, // VPCMPGTQZ256rmk = 13403 |
| 157618 | CEFBS_None, // VPCMPGTQZ256rr = 13404 |
| 157619 | CEFBS_None, // VPCMPGTQZ256rrk = 13405 |
| 157620 | CEFBS_None, // VPCMPGTQZrm = 13406 |
| 157621 | CEFBS_None, // VPCMPGTQZrmb = 13407 |
| 157622 | CEFBS_None, // VPCMPGTQZrmbk = 13408 |
| 157623 | CEFBS_None, // VPCMPGTQZrmk = 13409 |
| 157624 | CEFBS_None, // VPCMPGTQZrr = 13410 |
| 157625 | CEFBS_None, // VPCMPGTQZrrk = 13411 |
| 157626 | CEFBS_None, // VPCMPGTQrm = 13412 |
| 157627 | CEFBS_None, // VPCMPGTQrr = 13413 |
| 157628 | CEFBS_None, // VPCMPGTWYrm = 13414 |
| 157629 | CEFBS_None, // VPCMPGTWYrr = 13415 |
| 157630 | CEFBS_None, // VPCMPGTWZ128rm = 13416 |
| 157631 | CEFBS_None, // VPCMPGTWZ128rmk = 13417 |
| 157632 | CEFBS_None, // VPCMPGTWZ128rr = 13418 |
| 157633 | CEFBS_None, // VPCMPGTWZ128rrk = 13419 |
| 157634 | CEFBS_None, // VPCMPGTWZ256rm = 13420 |
| 157635 | CEFBS_None, // VPCMPGTWZ256rmk = 13421 |
| 157636 | CEFBS_None, // VPCMPGTWZ256rr = 13422 |
| 157637 | CEFBS_None, // VPCMPGTWZ256rrk = 13423 |
| 157638 | CEFBS_None, // VPCMPGTWZrm = 13424 |
| 157639 | CEFBS_None, // VPCMPGTWZrmk = 13425 |
| 157640 | CEFBS_None, // VPCMPGTWZrr = 13426 |
| 157641 | CEFBS_None, // VPCMPGTWZrrk = 13427 |
| 157642 | CEFBS_None, // VPCMPGTWrm = 13428 |
| 157643 | CEFBS_None, // VPCMPGTWrr = 13429 |
| 157644 | CEFBS_None, // VPCMPISTRIrmi = 13430 |
| 157645 | CEFBS_None, // VPCMPISTRIrri = 13431 |
| 157646 | CEFBS_None, // VPCMPISTRMrmi = 13432 |
| 157647 | CEFBS_None, // VPCMPISTRMrri = 13433 |
| 157648 | CEFBS_None, // VPCMPQZ128rmi = 13434 |
| 157649 | CEFBS_None, // VPCMPQZ128rmib = 13435 |
| 157650 | CEFBS_None, // VPCMPQZ128rmibk = 13436 |
| 157651 | CEFBS_None, // VPCMPQZ128rmik = 13437 |
| 157652 | CEFBS_None, // VPCMPQZ128rri = 13438 |
| 157653 | CEFBS_None, // VPCMPQZ128rrik = 13439 |
| 157654 | CEFBS_None, // VPCMPQZ256rmi = 13440 |
| 157655 | CEFBS_None, // VPCMPQZ256rmib = 13441 |
| 157656 | CEFBS_None, // VPCMPQZ256rmibk = 13442 |
| 157657 | CEFBS_None, // VPCMPQZ256rmik = 13443 |
| 157658 | CEFBS_None, // VPCMPQZ256rri = 13444 |
| 157659 | CEFBS_None, // VPCMPQZ256rrik = 13445 |
| 157660 | CEFBS_None, // VPCMPQZrmi = 13446 |
| 157661 | CEFBS_None, // VPCMPQZrmib = 13447 |
| 157662 | CEFBS_None, // VPCMPQZrmibk = 13448 |
| 157663 | CEFBS_None, // VPCMPQZrmik = 13449 |
| 157664 | CEFBS_None, // VPCMPQZrri = 13450 |
| 157665 | CEFBS_None, // VPCMPQZrrik = 13451 |
| 157666 | CEFBS_None, // VPCMPUBZ128rmi = 13452 |
| 157667 | CEFBS_None, // VPCMPUBZ128rmik = 13453 |
| 157668 | CEFBS_None, // VPCMPUBZ128rri = 13454 |
| 157669 | CEFBS_None, // VPCMPUBZ128rrik = 13455 |
| 157670 | CEFBS_None, // VPCMPUBZ256rmi = 13456 |
| 157671 | CEFBS_None, // VPCMPUBZ256rmik = 13457 |
| 157672 | CEFBS_None, // VPCMPUBZ256rri = 13458 |
| 157673 | CEFBS_None, // VPCMPUBZ256rrik = 13459 |
| 157674 | CEFBS_None, // VPCMPUBZrmi = 13460 |
| 157675 | CEFBS_None, // VPCMPUBZrmik = 13461 |
| 157676 | CEFBS_None, // VPCMPUBZrri = 13462 |
| 157677 | CEFBS_None, // VPCMPUBZrrik = 13463 |
| 157678 | CEFBS_None, // VPCMPUDZ128rmi = 13464 |
| 157679 | CEFBS_None, // VPCMPUDZ128rmib = 13465 |
| 157680 | CEFBS_None, // VPCMPUDZ128rmibk = 13466 |
| 157681 | CEFBS_None, // VPCMPUDZ128rmik = 13467 |
| 157682 | CEFBS_None, // VPCMPUDZ128rri = 13468 |
| 157683 | CEFBS_None, // VPCMPUDZ128rrik = 13469 |
| 157684 | CEFBS_None, // VPCMPUDZ256rmi = 13470 |
| 157685 | CEFBS_None, // VPCMPUDZ256rmib = 13471 |
| 157686 | CEFBS_None, // VPCMPUDZ256rmibk = 13472 |
| 157687 | CEFBS_None, // VPCMPUDZ256rmik = 13473 |
| 157688 | CEFBS_None, // VPCMPUDZ256rri = 13474 |
| 157689 | CEFBS_None, // VPCMPUDZ256rrik = 13475 |
| 157690 | CEFBS_None, // VPCMPUDZrmi = 13476 |
| 157691 | CEFBS_None, // VPCMPUDZrmib = 13477 |
| 157692 | CEFBS_None, // VPCMPUDZrmibk = 13478 |
| 157693 | CEFBS_None, // VPCMPUDZrmik = 13479 |
| 157694 | CEFBS_None, // VPCMPUDZrri = 13480 |
| 157695 | CEFBS_None, // VPCMPUDZrrik = 13481 |
| 157696 | CEFBS_None, // VPCMPUQZ128rmi = 13482 |
| 157697 | CEFBS_None, // VPCMPUQZ128rmib = 13483 |
| 157698 | CEFBS_None, // VPCMPUQZ128rmibk = 13484 |
| 157699 | CEFBS_None, // VPCMPUQZ128rmik = 13485 |
| 157700 | CEFBS_None, // VPCMPUQZ128rri = 13486 |
| 157701 | CEFBS_None, // VPCMPUQZ128rrik = 13487 |
| 157702 | CEFBS_None, // VPCMPUQZ256rmi = 13488 |
| 157703 | CEFBS_None, // VPCMPUQZ256rmib = 13489 |
| 157704 | CEFBS_None, // VPCMPUQZ256rmibk = 13490 |
| 157705 | CEFBS_None, // VPCMPUQZ256rmik = 13491 |
| 157706 | CEFBS_None, // VPCMPUQZ256rri = 13492 |
| 157707 | CEFBS_None, // VPCMPUQZ256rrik = 13493 |
| 157708 | CEFBS_None, // VPCMPUQZrmi = 13494 |
| 157709 | CEFBS_None, // VPCMPUQZrmib = 13495 |
| 157710 | CEFBS_None, // VPCMPUQZrmibk = 13496 |
| 157711 | CEFBS_None, // VPCMPUQZrmik = 13497 |
| 157712 | CEFBS_None, // VPCMPUQZrri = 13498 |
| 157713 | CEFBS_None, // VPCMPUQZrrik = 13499 |
| 157714 | CEFBS_None, // VPCMPUWZ128rmi = 13500 |
| 157715 | CEFBS_None, // VPCMPUWZ128rmik = 13501 |
| 157716 | CEFBS_None, // VPCMPUWZ128rri = 13502 |
| 157717 | CEFBS_None, // VPCMPUWZ128rrik = 13503 |
| 157718 | CEFBS_None, // VPCMPUWZ256rmi = 13504 |
| 157719 | CEFBS_None, // VPCMPUWZ256rmik = 13505 |
| 157720 | CEFBS_None, // VPCMPUWZ256rri = 13506 |
| 157721 | CEFBS_None, // VPCMPUWZ256rrik = 13507 |
| 157722 | CEFBS_None, // VPCMPUWZrmi = 13508 |
| 157723 | CEFBS_None, // VPCMPUWZrmik = 13509 |
| 157724 | CEFBS_None, // VPCMPUWZrri = 13510 |
| 157725 | CEFBS_None, // VPCMPUWZrrik = 13511 |
| 157726 | CEFBS_None, // VPCMPWZ128rmi = 13512 |
| 157727 | CEFBS_None, // VPCMPWZ128rmik = 13513 |
| 157728 | CEFBS_None, // VPCMPWZ128rri = 13514 |
| 157729 | CEFBS_None, // VPCMPWZ128rrik = 13515 |
| 157730 | CEFBS_None, // VPCMPWZ256rmi = 13516 |
| 157731 | CEFBS_None, // VPCMPWZ256rmik = 13517 |
| 157732 | CEFBS_None, // VPCMPWZ256rri = 13518 |
| 157733 | CEFBS_None, // VPCMPWZ256rrik = 13519 |
| 157734 | CEFBS_None, // VPCMPWZrmi = 13520 |
| 157735 | CEFBS_None, // VPCMPWZrmik = 13521 |
| 157736 | CEFBS_None, // VPCMPWZrri = 13522 |
| 157737 | CEFBS_None, // VPCMPWZrrik = 13523 |
| 157738 | CEFBS_None, // VPCOMBmi = 13524 |
| 157739 | CEFBS_None, // VPCOMBri = 13525 |
| 157740 | CEFBS_None, // VPCOMDmi = 13526 |
| 157741 | CEFBS_None, // VPCOMDri = 13527 |
| 157742 | CEFBS_None, // VPCOMPRESSBZ128mr = 13528 |
| 157743 | CEFBS_None, // VPCOMPRESSBZ128mrk = 13529 |
| 157744 | CEFBS_None, // VPCOMPRESSBZ128rr = 13530 |
| 157745 | CEFBS_None, // VPCOMPRESSBZ128rrk = 13531 |
| 157746 | CEFBS_None, // VPCOMPRESSBZ128rrkz = 13532 |
| 157747 | CEFBS_None, // VPCOMPRESSBZ256mr = 13533 |
| 157748 | CEFBS_None, // VPCOMPRESSBZ256mrk = 13534 |
| 157749 | CEFBS_None, // VPCOMPRESSBZ256rr = 13535 |
| 157750 | CEFBS_None, // VPCOMPRESSBZ256rrk = 13536 |
| 157751 | CEFBS_None, // VPCOMPRESSBZ256rrkz = 13537 |
| 157752 | CEFBS_None, // VPCOMPRESSBZmr = 13538 |
| 157753 | CEFBS_None, // VPCOMPRESSBZmrk = 13539 |
| 157754 | CEFBS_None, // VPCOMPRESSBZrr = 13540 |
| 157755 | CEFBS_None, // VPCOMPRESSBZrrk = 13541 |
| 157756 | CEFBS_None, // VPCOMPRESSBZrrkz = 13542 |
| 157757 | CEFBS_None, // VPCOMPRESSDZ128mr = 13543 |
| 157758 | CEFBS_None, // VPCOMPRESSDZ128mrk = 13544 |
| 157759 | CEFBS_None, // VPCOMPRESSDZ128rr = 13545 |
| 157760 | CEFBS_None, // VPCOMPRESSDZ128rrk = 13546 |
| 157761 | CEFBS_None, // VPCOMPRESSDZ128rrkz = 13547 |
| 157762 | CEFBS_None, // VPCOMPRESSDZ256mr = 13548 |
| 157763 | CEFBS_None, // VPCOMPRESSDZ256mrk = 13549 |
| 157764 | CEFBS_None, // VPCOMPRESSDZ256rr = 13550 |
| 157765 | CEFBS_None, // VPCOMPRESSDZ256rrk = 13551 |
| 157766 | CEFBS_None, // VPCOMPRESSDZ256rrkz = 13552 |
| 157767 | CEFBS_None, // VPCOMPRESSDZmr = 13553 |
| 157768 | CEFBS_None, // VPCOMPRESSDZmrk = 13554 |
| 157769 | CEFBS_None, // VPCOMPRESSDZrr = 13555 |
| 157770 | CEFBS_None, // VPCOMPRESSDZrrk = 13556 |
| 157771 | CEFBS_None, // VPCOMPRESSDZrrkz = 13557 |
| 157772 | CEFBS_None, // VPCOMPRESSQZ128mr = 13558 |
| 157773 | CEFBS_None, // VPCOMPRESSQZ128mrk = 13559 |
| 157774 | CEFBS_None, // VPCOMPRESSQZ128rr = 13560 |
| 157775 | CEFBS_None, // VPCOMPRESSQZ128rrk = 13561 |
| 157776 | CEFBS_None, // VPCOMPRESSQZ128rrkz = 13562 |
| 157777 | CEFBS_None, // VPCOMPRESSQZ256mr = 13563 |
| 157778 | CEFBS_None, // VPCOMPRESSQZ256mrk = 13564 |
| 157779 | CEFBS_None, // VPCOMPRESSQZ256rr = 13565 |
| 157780 | CEFBS_None, // VPCOMPRESSQZ256rrk = 13566 |
| 157781 | CEFBS_None, // VPCOMPRESSQZ256rrkz = 13567 |
| 157782 | CEFBS_None, // VPCOMPRESSQZmr = 13568 |
| 157783 | CEFBS_None, // VPCOMPRESSQZmrk = 13569 |
| 157784 | CEFBS_None, // VPCOMPRESSQZrr = 13570 |
| 157785 | CEFBS_None, // VPCOMPRESSQZrrk = 13571 |
| 157786 | CEFBS_None, // VPCOMPRESSQZrrkz = 13572 |
| 157787 | CEFBS_None, // VPCOMPRESSWZ128mr = 13573 |
| 157788 | CEFBS_None, // VPCOMPRESSWZ128mrk = 13574 |
| 157789 | CEFBS_None, // VPCOMPRESSWZ128rr = 13575 |
| 157790 | CEFBS_None, // VPCOMPRESSWZ128rrk = 13576 |
| 157791 | CEFBS_None, // VPCOMPRESSWZ128rrkz = 13577 |
| 157792 | CEFBS_None, // VPCOMPRESSWZ256mr = 13578 |
| 157793 | CEFBS_None, // VPCOMPRESSWZ256mrk = 13579 |
| 157794 | CEFBS_None, // VPCOMPRESSWZ256rr = 13580 |
| 157795 | CEFBS_None, // VPCOMPRESSWZ256rrk = 13581 |
| 157796 | CEFBS_None, // VPCOMPRESSWZ256rrkz = 13582 |
| 157797 | CEFBS_None, // VPCOMPRESSWZmr = 13583 |
| 157798 | CEFBS_None, // VPCOMPRESSWZmrk = 13584 |
| 157799 | CEFBS_None, // VPCOMPRESSWZrr = 13585 |
| 157800 | CEFBS_None, // VPCOMPRESSWZrrk = 13586 |
| 157801 | CEFBS_None, // VPCOMPRESSWZrrkz = 13587 |
| 157802 | CEFBS_None, // VPCOMQmi = 13588 |
| 157803 | CEFBS_None, // VPCOMQri = 13589 |
| 157804 | CEFBS_None, // VPCOMUBmi = 13590 |
| 157805 | CEFBS_None, // VPCOMUBri = 13591 |
| 157806 | CEFBS_None, // VPCOMUDmi = 13592 |
| 157807 | CEFBS_None, // VPCOMUDri = 13593 |
| 157808 | CEFBS_None, // VPCOMUQmi = 13594 |
| 157809 | CEFBS_None, // VPCOMUQri = 13595 |
| 157810 | CEFBS_None, // VPCOMUWmi = 13596 |
| 157811 | CEFBS_None, // VPCOMUWri = 13597 |
| 157812 | CEFBS_None, // VPCOMWmi = 13598 |
| 157813 | CEFBS_None, // VPCOMWri = 13599 |
| 157814 | CEFBS_None, // VPCONFLICTDZ128rm = 13600 |
| 157815 | CEFBS_None, // VPCONFLICTDZ128rmb = 13601 |
| 157816 | CEFBS_None, // VPCONFLICTDZ128rmbk = 13602 |
| 157817 | CEFBS_None, // VPCONFLICTDZ128rmbkz = 13603 |
| 157818 | CEFBS_None, // VPCONFLICTDZ128rmk = 13604 |
| 157819 | CEFBS_None, // VPCONFLICTDZ128rmkz = 13605 |
| 157820 | CEFBS_None, // VPCONFLICTDZ128rr = 13606 |
| 157821 | CEFBS_None, // VPCONFLICTDZ128rrk = 13607 |
| 157822 | CEFBS_None, // VPCONFLICTDZ128rrkz = 13608 |
| 157823 | CEFBS_None, // VPCONFLICTDZ256rm = 13609 |
| 157824 | CEFBS_None, // VPCONFLICTDZ256rmb = 13610 |
| 157825 | CEFBS_None, // VPCONFLICTDZ256rmbk = 13611 |
| 157826 | CEFBS_None, // VPCONFLICTDZ256rmbkz = 13612 |
| 157827 | CEFBS_None, // VPCONFLICTDZ256rmk = 13613 |
| 157828 | CEFBS_None, // VPCONFLICTDZ256rmkz = 13614 |
| 157829 | CEFBS_None, // VPCONFLICTDZ256rr = 13615 |
| 157830 | CEFBS_None, // VPCONFLICTDZ256rrk = 13616 |
| 157831 | CEFBS_None, // VPCONFLICTDZ256rrkz = 13617 |
| 157832 | CEFBS_None, // VPCONFLICTDZrm = 13618 |
| 157833 | CEFBS_None, // VPCONFLICTDZrmb = 13619 |
| 157834 | CEFBS_None, // VPCONFLICTDZrmbk = 13620 |
| 157835 | CEFBS_None, // VPCONFLICTDZrmbkz = 13621 |
| 157836 | CEFBS_None, // VPCONFLICTDZrmk = 13622 |
| 157837 | CEFBS_None, // VPCONFLICTDZrmkz = 13623 |
| 157838 | CEFBS_None, // VPCONFLICTDZrr = 13624 |
| 157839 | CEFBS_None, // VPCONFLICTDZrrk = 13625 |
| 157840 | CEFBS_None, // VPCONFLICTDZrrkz = 13626 |
| 157841 | CEFBS_None, // VPCONFLICTQZ128rm = 13627 |
| 157842 | CEFBS_None, // VPCONFLICTQZ128rmb = 13628 |
| 157843 | CEFBS_None, // VPCONFLICTQZ128rmbk = 13629 |
| 157844 | CEFBS_None, // VPCONFLICTQZ128rmbkz = 13630 |
| 157845 | CEFBS_None, // VPCONFLICTQZ128rmk = 13631 |
| 157846 | CEFBS_None, // VPCONFLICTQZ128rmkz = 13632 |
| 157847 | CEFBS_None, // VPCONFLICTQZ128rr = 13633 |
| 157848 | CEFBS_None, // VPCONFLICTQZ128rrk = 13634 |
| 157849 | CEFBS_None, // VPCONFLICTQZ128rrkz = 13635 |
| 157850 | CEFBS_None, // VPCONFLICTQZ256rm = 13636 |
| 157851 | CEFBS_None, // VPCONFLICTQZ256rmb = 13637 |
| 157852 | CEFBS_None, // VPCONFLICTQZ256rmbk = 13638 |
| 157853 | CEFBS_None, // VPCONFLICTQZ256rmbkz = 13639 |
| 157854 | CEFBS_None, // VPCONFLICTQZ256rmk = 13640 |
| 157855 | CEFBS_None, // VPCONFLICTQZ256rmkz = 13641 |
| 157856 | CEFBS_None, // VPCONFLICTQZ256rr = 13642 |
| 157857 | CEFBS_None, // VPCONFLICTQZ256rrk = 13643 |
| 157858 | CEFBS_None, // VPCONFLICTQZ256rrkz = 13644 |
| 157859 | CEFBS_None, // VPCONFLICTQZrm = 13645 |
| 157860 | CEFBS_None, // VPCONFLICTQZrmb = 13646 |
| 157861 | CEFBS_None, // VPCONFLICTQZrmbk = 13647 |
| 157862 | CEFBS_None, // VPCONFLICTQZrmbkz = 13648 |
| 157863 | CEFBS_None, // VPCONFLICTQZrmk = 13649 |
| 157864 | CEFBS_None, // VPCONFLICTQZrmkz = 13650 |
| 157865 | CEFBS_None, // VPCONFLICTQZrr = 13651 |
| 157866 | CEFBS_None, // VPCONFLICTQZrrk = 13652 |
| 157867 | CEFBS_None, // VPCONFLICTQZrrkz = 13653 |
| 157868 | CEFBS_None, // VPDPBSSDSYrm = 13654 |
| 157869 | CEFBS_None, // VPDPBSSDSYrr = 13655 |
| 157870 | CEFBS_None, // VPDPBSSDSrm = 13656 |
| 157871 | CEFBS_None, // VPDPBSSDSrr = 13657 |
| 157872 | CEFBS_None, // VPDPBSSDYrm = 13658 |
| 157873 | CEFBS_None, // VPDPBSSDYrr = 13659 |
| 157874 | CEFBS_None, // VPDPBSSDrm = 13660 |
| 157875 | CEFBS_None, // VPDPBSSDrr = 13661 |
| 157876 | CEFBS_None, // VPDPBSUDSYrm = 13662 |
| 157877 | CEFBS_None, // VPDPBSUDSYrr = 13663 |
| 157878 | CEFBS_None, // VPDPBSUDSrm = 13664 |
| 157879 | CEFBS_None, // VPDPBSUDSrr = 13665 |
| 157880 | CEFBS_None, // VPDPBSUDYrm = 13666 |
| 157881 | CEFBS_None, // VPDPBSUDYrr = 13667 |
| 157882 | CEFBS_None, // VPDPBSUDrm = 13668 |
| 157883 | CEFBS_None, // VPDPBSUDrr = 13669 |
| 157884 | CEFBS_None, // VPDPBUSDSYrm = 13670 |
| 157885 | CEFBS_None, // VPDPBUSDSYrr = 13671 |
| 157886 | CEFBS_None, // VPDPBUSDSZ128m = 13672 |
| 157887 | CEFBS_None, // VPDPBUSDSZ128mb = 13673 |
| 157888 | CEFBS_None, // VPDPBUSDSZ128mbk = 13674 |
| 157889 | CEFBS_None, // VPDPBUSDSZ128mbkz = 13675 |
| 157890 | CEFBS_None, // VPDPBUSDSZ128mk = 13676 |
| 157891 | CEFBS_None, // VPDPBUSDSZ128mkz = 13677 |
| 157892 | CEFBS_None, // VPDPBUSDSZ128r = 13678 |
| 157893 | CEFBS_None, // VPDPBUSDSZ128rk = 13679 |
| 157894 | CEFBS_None, // VPDPBUSDSZ128rkz = 13680 |
| 157895 | CEFBS_None, // VPDPBUSDSZ256m = 13681 |
| 157896 | CEFBS_None, // VPDPBUSDSZ256mb = 13682 |
| 157897 | CEFBS_None, // VPDPBUSDSZ256mbk = 13683 |
| 157898 | CEFBS_None, // VPDPBUSDSZ256mbkz = 13684 |
| 157899 | CEFBS_None, // VPDPBUSDSZ256mk = 13685 |
| 157900 | CEFBS_None, // VPDPBUSDSZ256mkz = 13686 |
| 157901 | CEFBS_None, // VPDPBUSDSZ256r = 13687 |
| 157902 | CEFBS_None, // VPDPBUSDSZ256rk = 13688 |
| 157903 | CEFBS_None, // VPDPBUSDSZ256rkz = 13689 |
| 157904 | CEFBS_None, // VPDPBUSDSZm = 13690 |
| 157905 | CEFBS_None, // VPDPBUSDSZmb = 13691 |
| 157906 | CEFBS_None, // VPDPBUSDSZmbk = 13692 |
| 157907 | CEFBS_None, // VPDPBUSDSZmbkz = 13693 |
| 157908 | CEFBS_None, // VPDPBUSDSZmk = 13694 |
| 157909 | CEFBS_None, // VPDPBUSDSZmkz = 13695 |
| 157910 | CEFBS_None, // VPDPBUSDSZr = 13696 |
| 157911 | CEFBS_None, // VPDPBUSDSZrk = 13697 |
| 157912 | CEFBS_None, // VPDPBUSDSZrkz = 13698 |
| 157913 | CEFBS_None, // VPDPBUSDSrm = 13699 |
| 157914 | CEFBS_None, // VPDPBUSDSrr = 13700 |
| 157915 | CEFBS_None, // VPDPBUSDYrm = 13701 |
| 157916 | CEFBS_None, // VPDPBUSDYrr = 13702 |
| 157917 | CEFBS_None, // VPDPBUSDZ128m = 13703 |
| 157918 | CEFBS_None, // VPDPBUSDZ128mb = 13704 |
| 157919 | CEFBS_None, // VPDPBUSDZ128mbk = 13705 |
| 157920 | CEFBS_None, // VPDPBUSDZ128mbkz = 13706 |
| 157921 | CEFBS_None, // VPDPBUSDZ128mk = 13707 |
| 157922 | CEFBS_None, // VPDPBUSDZ128mkz = 13708 |
| 157923 | CEFBS_None, // VPDPBUSDZ128r = 13709 |
| 157924 | CEFBS_None, // VPDPBUSDZ128rk = 13710 |
| 157925 | CEFBS_None, // VPDPBUSDZ128rkz = 13711 |
| 157926 | CEFBS_None, // VPDPBUSDZ256m = 13712 |
| 157927 | CEFBS_None, // VPDPBUSDZ256mb = 13713 |
| 157928 | CEFBS_None, // VPDPBUSDZ256mbk = 13714 |
| 157929 | CEFBS_None, // VPDPBUSDZ256mbkz = 13715 |
| 157930 | CEFBS_None, // VPDPBUSDZ256mk = 13716 |
| 157931 | CEFBS_None, // VPDPBUSDZ256mkz = 13717 |
| 157932 | CEFBS_None, // VPDPBUSDZ256r = 13718 |
| 157933 | CEFBS_None, // VPDPBUSDZ256rk = 13719 |
| 157934 | CEFBS_None, // VPDPBUSDZ256rkz = 13720 |
| 157935 | CEFBS_None, // VPDPBUSDZm = 13721 |
| 157936 | CEFBS_None, // VPDPBUSDZmb = 13722 |
| 157937 | CEFBS_None, // VPDPBUSDZmbk = 13723 |
| 157938 | CEFBS_None, // VPDPBUSDZmbkz = 13724 |
| 157939 | CEFBS_None, // VPDPBUSDZmk = 13725 |
| 157940 | CEFBS_None, // VPDPBUSDZmkz = 13726 |
| 157941 | CEFBS_None, // VPDPBUSDZr = 13727 |
| 157942 | CEFBS_None, // VPDPBUSDZrk = 13728 |
| 157943 | CEFBS_None, // VPDPBUSDZrkz = 13729 |
| 157944 | CEFBS_None, // VPDPBUSDrm = 13730 |
| 157945 | CEFBS_None, // VPDPBUSDrr = 13731 |
| 157946 | CEFBS_None, // VPDPBUUDSYrm = 13732 |
| 157947 | CEFBS_None, // VPDPBUUDSYrr = 13733 |
| 157948 | CEFBS_None, // VPDPBUUDSrm = 13734 |
| 157949 | CEFBS_None, // VPDPBUUDSrr = 13735 |
| 157950 | CEFBS_None, // VPDPBUUDYrm = 13736 |
| 157951 | CEFBS_None, // VPDPBUUDYrr = 13737 |
| 157952 | CEFBS_None, // VPDPBUUDrm = 13738 |
| 157953 | CEFBS_None, // VPDPBUUDrr = 13739 |
| 157954 | CEFBS_None, // VPDPWSSDSYrm = 13740 |
| 157955 | CEFBS_None, // VPDPWSSDSYrr = 13741 |
| 157956 | CEFBS_None, // VPDPWSSDSZ128m = 13742 |
| 157957 | CEFBS_None, // VPDPWSSDSZ128mb = 13743 |
| 157958 | CEFBS_None, // VPDPWSSDSZ128mbk = 13744 |
| 157959 | CEFBS_None, // VPDPWSSDSZ128mbkz = 13745 |
| 157960 | CEFBS_None, // VPDPWSSDSZ128mk = 13746 |
| 157961 | CEFBS_None, // VPDPWSSDSZ128mkz = 13747 |
| 157962 | CEFBS_None, // VPDPWSSDSZ128r = 13748 |
| 157963 | CEFBS_None, // VPDPWSSDSZ128rk = 13749 |
| 157964 | CEFBS_None, // VPDPWSSDSZ128rkz = 13750 |
| 157965 | CEFBS_None, // VPDPWSSDSZ256m = 13751 |
| 157966 | CEFBS_None, // VPDPWSSDSZ256mb = 13752 |
| 157967 | CEFBS_None, // VPDPWSSDSZ256mbk = 13753 |
| 157968 | CEFBS_None, // VPDPWSSDSZ256mbkz = 13754 |
| 157969 | CEFBS_None, // VPDPWSSDSZ256mk = 13755 |
| 157970 | CEFBS_None, // VPDPWSSDSZ256mkz = 13756 |
| 157971 | CEFBS_None, // VPDPWSSDSZ256r = 13757 |
| 157972 | CEFBS_None, // VPDPWSSDSZ256rk = 13758 |
| 157973 | CEFBS_None, // VPDPWSSDSZ256rkz = 13759 |
| 157974 | CEFBS_None, // VPDPWSSDSZm = 13760 |
| 157975 | CEFBS_None, // VPDPWSSDSZmb = 13761 |
| 157976 | CEFBS_None, // VPDPWSSDSZmbk = 13762 |
| 157977 | CEFBS_None, // VPDPWSSDSZmbkz = 13763 |
| 157978 | CEFBS_None, // VPDPWSSDSZmk = 13764 |
| 157979 | CEFBS_None, // VPDPWSSDSZmkz = 13765 |
| 157980 | CEFBS_None, // VPDPWSSDSZr = 13766 |
| 157981 | CEFBS_None, // VPDPWSSDSZrk = 13767 |
| 157982 | CEFBS_None, // VPDPWSSDSZrkz = 13768 |
| 157983 | CEFBS_None, // VPDPWSSDSrm = 13769 |
| 157984 | CEFBS_None, // VPDPWSSDSrr = 13770 |
| 157985 | CEFBS_None, // VPDPWSSDYrm = 13771 |
| 157986 | CEFBS_None, // VPDPWSSDYrr = 13772 |
| 157987 | CEFBS_None, // VPDPWSSDZ128m = 13773 |
| 157988 | CEFBS_None, // VPDPWSSDZ128mb = 13774 |
| 157989 | CEFBS_None, // VPDPWSSDZ128mbk = 13775 |
| 157990 | CEFBS_None, // VPDPWSSDZ128mbkz = 13776 |
| 157991 | CEFBS_None, // VPDPWSSDZ128mk = 13777 |
| 157992 | CEFBS_None, // VPDPWSSDZ128mkz = 13778 |
| 157993 | CEFBS_None, // VPDPWSSDZ128r = 13779 |
| 157994 | CEFBS_None, // VPDPWSSDZ128rk = 13780 |
| 157995 | CEFBS_None, // VPDPWSSDZ128rkz = 13781 |
| 157996 | CEFBS_None, // VPDPWSSDZ256m = 13782 |
| 157997 | CEFBS_None, // VPDPWSSDZ256mb = 13783 |
| 157998 | CEFBS_None, // VPDPWSSDZ256mbk = 13784 |
| 157999 | CEFBS_None, // VPDPWSSDZ256mbkz = 13785 |
| 158000 | CEFBS_None, // VPDPWSSDZ256mk = 13786 |
| 158001 | CEFBS_None, // VPDPWSSDZ256mkz = 13787 |
| 158002 | CEFBS_None, // VPDPWSSDZ256r = 13788 |
| 158003 | CEFBS_None, // VPDPWSSDZ256rk = 13789 |
| 158004 | CEFBS_None, // VPDPWSSDZ256rkz = 13790 |
| 158005 | CEFBS_None, // VPDPWSSDZm = 13791 |
| 158006 | CEFBS_None, // VPDPWSSDZmb = 13792 |
| 158007 | CEFBS_None, // VPDPWSSDZmbk = 13793 |
| 158008 | CEFBS_None, // VPDPWSSDZmbkz = 13794 |
| 158009 | CEFBS_None, // VPDPWSSDZmk = 13795 |
| 158010 | CEFBS_None, // VPDPWSSDZmkz = 13796 |
| 158011 | CEFBS_None, // VPDPWSSDZr = 13797 |
| 158012 | CEFBS_None, // VPDPWSSDZrk = 13798 |
| 158013 | CEFBS_None, // VPDPWSSDZrkz = 13799 |
| 158014 | CEFBS_None, // VPDPWSSDrm = 13800 |
| 158015 | CEFBS_None, // VPDPWSSDrr = 13801 |
| 158016 | CEFBS_None, // VPDPWSUDSYrm = 13802 |
| 158017 | CEFBS_None, // VPDPWSUDSYrr = 13803 |
| 158018 | CEFBS_None, // VPDPWSUDSrm = 13804 |
| 158019 | CEFBS_None, // VPDPWSUDSrr = 13805 |
| 158020 | CEFBS_None, // VPDPWSUDYrm = 13806 |
| 158021 | CEFBS_None, // VPDPWSUDYrr = 13807 |
| 158022 | CEFBS_None, // VPDPWSUDrm = 13808 |
| 158023 | CEFBS_None, // VPDPWSUDrr = 13809 |
| 158024 | CEFBS_None, // VPDPWUSDSYrm = 13810 |
| 158025 | CEFBS_None, // VPDPWUSDSYrr = 13811 |
| 158026 | CEFBS_None, // VPDPWUSDSrm = 13812 |
| 158027 | CEFBS_None, // VPDPWUSDSrr = 13813 |
| 158028 | CEFBS_None, // VPDPWUSDYrm = 13814 |
| 158029 | CEFBS_None, // VPDPWUSDYrr = 13815 |
| 158030 | CEFBS_None, // VPDPWUSDrm = 13816 |
| 158031 | CEFBS_None, // VPDPWUSDrr = 13817 |
| 158032 | CEFBS_None, // VPDPWUUDSYrm = 13818 |
| 158033 | CEFBS_None, // VPDPWUUDSYrr = 13819 |
| 158034 | CEFBS_None, // VPDPWUUDSrm = 13820 |
| 158035 | CEFBS_None, // VPDPWUUDSrr = 13821 |
| 158036 | CEFBS_None, // VPDPWUUDYrm = 13822 |
| 158037 | CEFBS_None, // VPDPWUUDYrr = 13823 |
| 158038 | CEFBS_None, // VPDPWUUDrm = 13824 |
| 158039 | CEFBS_None, // VPDPWUUDrr = 13825 |
| 158040 | CEFBS_None, // VPERM2F128rm = 13826 |
| 158041 | CEFBS_None, // VPERM2F128rr = 13827 |
| 158042 | CEFBS_None, // VPERM2I128rm = 13828 |
| 158043 | CEFBS_None, // VPERM2I128rr = 13829 |
| 158044 | CEFBS_None, // VPERMBZ128rm = 13830 |
| 158045 | CEFBS_None, // VPERMBZ128rmk = 13831 |
| 158046 | CEFBS_None, // VPERMBZ128rmkz = 13832 |
| 158047 | CEFBS_None, // VPERMBZ128rr = 13833 |
| 158048 | CEFBS_None, // VPERMBZ128rrk = 13834 |
| 158049 | CEFBS_None, // VPERMBZ128rrkz = 13835 |
| 158050 | CEFBS_None, // VPERMBZ256rm = 13836 |
| 158051 | CEFBS_None, // VPERMBZ256rmk = 13837 |
| 158052 | CEFBS_None, // VPERMBZ256rmkz = 13838 |
| 158053 | CEFBS_None, // VPERMBZ256rr = 13839 |
| 158054 | CEFBS_None, // VPERMBZ256rrk = 13840 |
| 158055 | CEFBS_None, // VPERMBZ256rrkz = 13841 |
| 158056 | CEFBS_None, // VPERMBZrm = 13842 |
| 158057 | CEFBS_None, // VPERMBZrmk = 13843 |
| 158058 | CEFBS_None, // VPERMBZrmkz = 13844 |
| 158059 | CEFBS_None, // VPERMBZrr = 13845 |
| 158060 | CEFBS_None, // VPERMBZrrk = 13846 |
| 158061 | CEFBS_None, // VPERMBZrrkz = 13847 |
| 158062 | CEFBS_None, // VPERMDYrm = 13848 |
| 158063 | CEFBS_None, // VPERMDYrr = 13849 |
| 158064 | CEFBS_None, // VPERMDZ256rm = 13850 |
| 158065 | CEFBS_None, // VPERMDZ256rmb = 13851 |
| 158066 | CEFBS_None, // VPERMDZ256rmbk = 13852 |
| 158067 | CEFBS_None, // VPERMDZ256rmbkz = 13853 |
| 158068 | CEFBS_None, // VPERMDZ256rmk = 13854 |
| 158069 | CEFBS_None, // VPERMDZ256rmkz = 13855 |
| 158070 | CEFBS_None, // VPERMDZ256rr = 13856 |
| 158071 | CEFBS_None, // VPERMDZ256rrk = 13857 |
| 158072 | CEFBS_None, // VPERMDZ256rrkz = 13858 |
| 158073 | CEFBS_None, // VPERMDZrm = 13859 |
| 158074 | CEFBS_None, // VPERMDZrmb = 13860 |
| 158075 | CEFBS_None, // VPERMDZrmbk = 13861 |
| 158076 | CEFBS_None, // VPERMDZrmbkz = 13862 |
| 158077 | CEFBS_None, // VPERMDZrmk = 13863 |
| 158078 | CEFBS_None, // VPERMDZrmkz = 13864 |
| 158079 | CEFBS_None, // VPERMDZrr = 13865 |
| 158080 | CEFBS_None, // VPERMDZrrk = 13866 |
| 158081 | CEFBS_None, // VPERMDZrrkz = 13867 |
| 158082 | CEFBS_None, // VPERMI2BZ128rm = 13868 |
| 158083 | CEFBS_None, // VPERMI2BZ128rmk = 13869 |
| 158084 | CEFBS_None, // VPERMI2BZ128rmkz = 13870 |
| 158085 | CEFBS_None, // VPERMI2BZ128rr = 13871 |
| 158086 | CEFBS_None, // VPERMI2BZ128rrk = 13872 |
| 158087 | CEFBS_None, // VPERMI2BZ128rrkz = 13873 |
| 158088 | CEFBS_None, // VPERMI2BZ256rm = 13874 |
| 158089 | CEFBS_None, // VPERMI2BZ256rmk = 13875 |
| 158090 | CEFBS_None, // VPERMI2BZ256rmkz = 13876 |
| 158091 | CEFBS_None, // VPERMI2BZ256rr = 13877 |
| 158092 | CEFBS_None, // VPERMI2BZ256rrk = 13878 |
| 158093 | CEFBS_None, // VPERMI2BZ256rrkz = 13879 |
| 158094 | CEFBS_None, // VPERMI2BZrm = 13880 |
| 158095 | CEFBS_None, // VPERMI2BZrmk = 13881 |
| 158096 | CEFBS_None, // VPERMI2BZrmkz = 13882 |
| 158097 | CEFBS_None, // VPERMI2BZrr = 13883 |
| 158098 | CEFBS_None, // VPERMI2BZrrk = 13884 |
| 158099 | CEFBS_None, // VPERMI2BZrrkz = 13885 |
| 158100 | CEFBS_None, // VPERMI2DZ128rm = 13886 |
| 158101 | CEFBS_None, // VPERMI2DZ128rmb = 13887 |
| 158102 | CEFBS_None, // VPERMI2DZ128rmbk = 13888 |
| 158103 | CEFBS_None, // VPERMI2DZ128rmbkz = 13889 |
| 158104 | CEFBS_None, // VPERMI2DZ128rmk = 13890 |
| 158105 | CEFBS_None, // VPERMI2DZ128rmkz = 13891 |
| 158106 | CEFBS_None, // VPERMI2DZ128rr = 13892 |
| 158107 | CEFBS_None, // VPERMI2DZ128rrk = 13893 |
| 158108 | CEFBS_None, // VPERMI2DZ128rrkz = 13894 |
| 158109 | CEFBS_None, // VPERMI2DZ256rm = 13895 |
| 158110 | CEFBS_None, // VPERMI2DZ256rmb = 13896 |
| 158111 | CEFBS_None, // VPERMI2DZ256rmbk = 13897 |
| 158112 | CEFBS_None, // VPERMI2DZ256rmbkz = 13898 |
| 158113 | CEFBS_None, // VPERMI2DZ256rmk = 13899 |
| 158114 | CEFBS_None, // VPERMI2DZ256rmkz = 13900 |
| 158115 | CEFBS_None, // VPERMI2DZ256rr = 13901 |
| 158116 | CEFBS_None, // VPERMI2DZ256rrk = 13902 |
| 158117 | CEFBS_None, // VPERMI2DZ256rrkz = 13903 |
| 158118 | CEFBS_None, // VPERMI2DZrm = 13904 |
| 158119 | CEFBS_None, // VPERMI2DZrmb = 13905 |
| 158120 | CEFBS_None, // VPERMI2DZrmbk = 13906 |
| 158121 | CEFBS_None, // VPERMI2DZrmbkz = 13907 |
| 158122 | CEFBS_None, // VPERMI2DZrmk = 13908 |
| 158123 | CEFBS_None, // VPERMI2DZrmkz = 13909 |
| 158124 | CEFBS_None, // VPERMI2DZrr = 13910 |
| 158125 | CEFBS_None, // VPERMI2DZrrk = 13911 |
| 158126 | CEFBS_None, // VPERMI2DZrrkz = 13912 |
| 158127 | CEFBS_None, // VPERMI2PDZ128rm = 13913 |
| 158128 | CEFBS_None, // VPERMI2PDZ128rmb = 13914 |
| 158129 | CEFBS_None, // VPERMI2PDZ128rmbk = 13915 |
| 158130 | CEFBS_None, // VPERMI2PDZ128rmbkz = 13916 |
| 158131 | CEFBS_None, // VPERMI2PDZ128rmk = 13917 |
| 158132 | CEFBS_None, // VPERMI2PDZ128rmkz = 13918 |
| 158133 | CEFBS_None, // VPERMI2PDZ128rr = 13919 |
| 158134 | CEFBS_None, // VPERMI2PDZ128rrk = 13920 |
| 158135 | CEFBS_None, // VPERMI2PDZ128rrkz = 13921 |
| 158136 | CEFBS_None, // VPERMI2PDZ256rm = 13922 |
| 158137 | CEFBS_None, // VPERMI2PDZ256rmb = 13923 |
| 158138 | CEFBS_None, // VPERMI2PDZ256rmbk = 13924 |
| 158139 | CEFBS_None, // VPERMI2PDZ256rmbkz = 13925 |
| 158140 | CEFBS_None, // VPERMI2PDZ256rmk = 13926 |
| 158141 | CEFBS_None, // VPERMI2PDZ256rmkz = 13927 |
| 158142 | CEFBS_None, // VPERMI2PDZ256rr = 13928 |
| 158143 | CEFBS_None, // VPERMI2PDZ256rrk = 13929 |
| 158144 | CEFBS_None, // VPERMI2PDZ256rrkz = 13930 |
| 158145 | CEFBS_None, // VPERMI2PDZrm = 13931 |
| 158146 | CEFBS_None, // VPERMI2PDZrmb = 13932 |
| 158147 | CEFBS_None, // VPERMI2PDZrmbk = 13933 |
| 158148 | CEFBS_None, // VPERMI2PDZrmbkz = 13934 |
| 158149 | CEFBS_None, // VPERMI2PDZrmk = 13935 |
| 158150 | CEFBS_None, // VPERMI2PDZrmkz = 13936 |
| 158151 | CEFBS_None, // VPERMI2PDZrr = 13937 |
| 158152 | CEFBS_None, // VPERMI2PDZrrk = 13938 |
| 158153 | CEFBS_None, // VPERMI2PDZrrkz = 13939 |
| 158154 | CEFBS_None, // VPERMI2PSZ128rm = 13940 |
| 158155 | CEFBS_None, // VPERMI2PSZ128rmb = 13941 |
| 158156 | CEFBS_None, // VPERMI2PSZ128rmbk = 13942 |
| 158157 | CEFBS_None, // VPERMI2PSZ128rmbkz = 13943 |
| 158158 | CEFBS_None, // VPERMI2PSZ128rmk = 13944 |
| 158159 | CEFBS_None, // VPERMI2PSZ128rmkz = 13945 |
| 158160 | CEFBS_None, // VPERMI2PSZ128rr = 13946 |
| 158161 | CEFBS_None, // VPERMI2PSZ128rrk = 13947 |
| 158162 | CEFBS_None, // VPERMI2PSZ128rrkz = 13948 |
| 158163 | CEFBS_None, // VPERMI2PSZ256rm = 13949 |
| 158164 | CEFBS_None, // VPERMI2PSZ256rmb = 13950 |
| 158165 | CEFBS_None, // VPERMI2PSZ256rmbk = 13951 |
| 158166 | CEFBS_None, // VPERMI2PSZ256rmbkz = 13952 |
| 158167 | CEFBS_None, // VPERMI2PSZ256rmk = 13953 |
| 158168 | CEFBS_None, // VPERMI2PSZ256rmkz = 13954 |
| 158169 | CEFBS_None, // VPERMI2PSZ256rr = 13955 |
| 158170 | CEFBS_None, // VPERMI2PSZ256rrk = 13956 |
| 158171 | CEFBS_None, // VPERMI2PSZ256rrkz = 13957 |
| 158172 | CEFBS_None, // VPERMI2PSZrm = 13958 |
| 158173 | CEFBS_None, // VPERMI2PSZrmb = 13959 |
| 158174 | CEFBS_None, // VPERMI2PSZrmbk = 13960 |
| 158175 | CEFBS_None, // VPERMI2PSZrmbkz = 13961 |
| 158176 | CEFBS_None, // VPERMI2PSZrmk = 13962 |
| 158177 | CEFBS_None, // VPERMI2PSZrmkz = 13963 |
| 158178 | CEFBS_None, // VPERMI2PSZrr = 13964 |
| 158179 | CEFBS_None, // VPERMI2PSZrrk = 13965 |
| 158180 | CEFBS_None, // VPERMI2PSZrrkz = 13966 |
| 158181 | CEFBS_None, // VPERMI2QZ128rm = 13967 |
| 158182 | CEFBS_None, // VPERMI2QZ128rmb = 13968 |
| 158183 | CEFBS_None, // VPERMI2QZ128rmbk = 13969 |
| 158184 | CEFBS_None, // VPERMI2QZ128rmbkz = 13970 |
| 158185 | CEFBS_None, // VPERMI2QZ128rmk = 13971 |
| 158186 | CEFBS_None, // VPERMI2QZ128rmkz = 13972 |
| 158187 | CEFBS_None, // VPERMI2QZ128rr = 13973 |
| 158188 | CEFBS_None, // VPERMI2QZ128rrk = 13974 |
| 158189 | CEFBS_None, // VPERMI2QZ128rrkz = 13975 |
| 158190 | CEFBS_None, // VPERMI2QZ256rm = 13976 |
| 158191 | CEFBS_None, // VPERMI2QZ256rmb = 13977 |
| 158192 | CEFBS_None, // VPERMI2QZ256rmbk = 13978 |
| 158193 | CEFBS_None, // VPERMI2QZ256rmbkz = 13979 |
| 158194 | CEFBS_None, // VPERMI2QZ256rmk = 13980 |
| 158195 | CEFBS_None, // VPERMI2QZ256rmkz = 13981 |
| 158196 | CEFBS_None, // VPERMI2QZ256rr = 13982 |
| 158197 | CEFBS_None, // VPERMI2QZ256rrk = 13983 |
| 158198 | CEFBS_None, // VPERMI2QZ256rrkz = 13984 |
| 158199 | CEFBS_None, // VPERMI2QZrm = 13985 |
| 158200 | CEFBS_None, // VPERMI2QZrmb = 13986 |
| 158201 | CEFBS_None, // VPERMI2QZrmbk = 13987 |
| 158202 | CEFBS_None, // VPERMI2QZrmbkz = 13988 |
| 158203 | CEFBS_None, // VPERMI2QZrmk = 13989 |
| 158204 | CEFBS_None, // VPERMI2QZrmkz = 13990 |
| 158205 | CEFBS_None, // VPERMI2QZrr = 13991 |
| 158206 | CEFBS_None, // VPERMI2QZrrk = 13992 |
| 158207 | CEFBS_None, // VPERMI2QZrrkz = 13993 |
| 158208 | CEFBS_None, // VPERMI2WZ128rm = 13994 |
| 158209 | CEFBS_None, // VPERMI2WZ128rmk = 13995 |
| 158210 | CEFBS_None, // VPERMI2WZ128rmkz = 13996 |
| 158211 | CEFBS_None, // VPERMI2WZ128rr = 13997 |
| 158212 | CEFBS_None, // VPERMI2WZ128rrk = 13998 |
| 158213 | CEFBS_None, // VPERMI2WZ128rrkz = 13999 |
| 158214 | CEFBS_None, // VPERMI2WZ256rm = 14000 |
| 158215 | CEFBS_None, // VPERMI2WZ256rmk = 14001 |
| 158216 | CEFBS_None, // VPERMI2WZ256rmkz = 14002 |
| 158217 | CEFBS_None, // VPERMI2WZ256rr = 14003 |
| 158218 | CEFBS_None, // VPERMI2WZ256rrk = 14004 |
| 158219 | CEFBS_None, // VPERMI2WZ256rrkz = 14005 |
| 158220 | CEFBS_None, // VPERMI2WZrm = 14006 |
| 158221 | CEFBS_None, // VPERMI2WZrmk = 14007 |
| 158222 | CEFBS_None, // VPERMI2WZrmkz = 14008 |
| 158223 | CEFBS_None, // VPERMI2WZrr = 14009 |
| 158224 | CEFBS_None, // VPERMI2WZrrk = 14010 |
| 158225 | CEFBS_None, // VPERMI2WZrrkz = 14011 |
| 158226 | CEFBS_None, // VPERMIL2PDYmr = 14012 |
| 158227 | CEFBS_None, // VPERMIL2PDYrm = 14013 |
| 158228 | CEFBS_None, // VPERMIL2PDYrr = 14014 |
| 158229 | CEFBS_None, // VPERMIL2PDYrr_REV = 14015 |
| 158230 | CEFBS_None, // VPERMIL2PDmr = 14016 |
| 158231 | CEFBS_None, // VPERMIL2PDrm = 14017 |
| 158232 | CEFBS_None, // VPERMIL2PDrr = 14018 |
| 158233 | CEFBS_None, // VPERMIL2PDrr_REV = 14019 |
| 158234 | CEFBS_None, // VPERMIL2PSYmr = 14020 |
| 158235 | CEFBS_None, // VPERMIL2PSYrm = 14021 |
| 158236 | CEFBS_None, // VPERMIL2PSYrr = 14022 |
| 158237 | CEFBS_None, // VPERMIL2PSYrr_REV = 14023 |
| 158238 | CEFBS_None, // VPERMIL2PSmr = 14024 |
| 158239 | CEFBS_None, // VPERMIL2PSrm = 14025 |
| 158240 | CEFBS_None, // VPERMIL2PSrr = 14026 |
| 158241 | CEFBS_None, // VPERMIL2PSrr_REV = 14027 |
| 158242 | CEFBS_None, // VPERMILPDYmi = 14028 |
| 158243 | CEFBS_None, // VPERMILPDYri = 14029 |
| 158244 | CEFBS_None, // VPERMILPDYrm = 14030 |
| 158245 | CEFBS_None, // VPERMILPDYrr = 14031 |
| 158246 | CEFBS_None, // VPERMILPDZ128mbi = 14032 |
| 158247 | CEFBS_None, // VPERMILPDZ128mbik = 14033 |
| 158248 | CEFBS_None, // VPERMILPDZ128mbikz = 14034 |
| 158249 | CEFBS_None, // VPERMILPDZ128mi = 14035 |
| 158250 | CEFBS_None, // VPERMILPDZ128mik = 14036 |
| 158251 | CEFBS_None, // VPERMILPDZ128mikz = 14037 |
| 158252 | CEFBS_None, // VPERMILPDZ128ri = 14038 |
| 158253 | CEFBS_None, // VPERMILPDZ128rik = 14039 |
| 158254 | CEFBS_None, // VPERMILPDZ128rikz = 14040 |
| 158255 | CEFBS_None, // VPERMILPDZ128rm = 14041 |
| 158256 | CEFBS_None, // VPERMILPDZ128rmb = 14042 |
| 158257 | CEFBS_None, // VPERMILPDZ128rmbk = 14043 |
| 158258 | CEFBS_None, // VPERMILPDZ128rmbkz = 14044 |
| 158259 | CEFBS_None, // VPERMILPDZ128rmk = 14045 |
| 158260 | CEFBS_None, // VPERMILPDZ128rmkz = 14046 |
| 158261 | CEFBS_None, // VPERMILPDZ128rr = 14047 |
| 158262 | CEFBS_None, // VPERMILPDZ128rrk = 14048 |
| 158263 | CEFBS_None, // VPERMILPDZ128rrkz = 14049 |
| 158264 | CEFBS_None, // VPERMILPDZ256mbi = 14050 |
| 158265 | CEFBS_None, // VPERMILPDZ256mbik = 14051 |
| 158266 | CEFBS_None, // VPERMILPDZ256mbikz = 14052 |
| 158267 | CEFBS_None, // VPERMILPDZ256mi = 14053 |
| 158268 | CEFBS_None, // VPERMILPDZ256mik = 14054 |
| 158269 | CEFBS_None, // VPERMILPDZ256mikz = 14055 |
| 158270 | CEFBS_None, // VPERMILPDZ256ri = 14056 |
| 158271 | CEFBS_None, // VPERMILPDZ256rik = 14057 |
| 158272 | CEFBS_None, // VPERMILPDZ256rikz = 14058 |
| 158273 | CEFBS_None, // VPERMILPDZ256rm = 14059 |
| 158274 | CEFBS_None, // VPERMILPDZ256rmb = 14060 |
| 158275 | CEFBS_None, // VPERMILPDZ256rmbk = 14061 |
| 158276 | CEFBS_None, // VPERMILPDZ256rmbkz = 14062 |
| 158277 | CEFBS_None, // VPERMILPDZ256rmk = 14063 |
| 158278 | CEFBS_None, // VPERMILPDZ256rmkz = 14064 |
| 158279 | CEFBS_None, // VPERMILPDZ256rr = 14065 |
| 158280 | CEFBS_None, // VPERMILPDZ256rrk = 14066 |
| 158281 | CEFBS_None, // VPERMILPDZ256rrkz = 14067 |
| 158282 | CEFBS_None, // VPERMILPDZmbi = 14068 |
| 158283 | CEFBS_None, // VPERMILPDZmbik = 14069 |
| 158284 | CEFBS_None, // VPERMILPDZmbikz = 14070 |
| 158285 | CEFBS_None, // VPERMILPDZmi = 14071 |
| 158286 | CEFBS_None, // VPERMILPDZmik = 14072 |
| 158287 | CEFBS_None, // VPERMILPDZmikz = 14073 |
| 158288 | CEFBS_None, // VPERMILPDZri = 14074 |
| 158289 | CEFBS_None, // VPERMILPDZrik = 14075 |
| 158290 | CEFBS_None, // VPERMILPDZrikz = 14076 |
| 158291 | CEFBS_None, // VPERMILPDZrm = 14077 |
| 158292 | CEFBS_None, // VPERMILPDZrmb = 14078 |
| 158293 | CEFBS_None, // VPERMILPDZrmbk = 14079 |
| 158294 | CEFBS_None, // VPERMILPDZrmbkz = 14080 |
| 158295 | CEFBS_None, // VPERMILPDZrmk = 14081 |
| 158296 | CEFBS_None, // VPERMILPDZrmkz = 14082 |
| 158297 | CEFBS_None, // VPERMILPDZrr = 14083 |
| 158298 | CEFBS_None, // VPERMILPDZrrk = 14084 |
| 158299 | CEFBS_None, // VPERMILPDZrrkz = 14085 |
| 158300 | CEFBS_None, // VPERMILPDmi = 14086 |
| 158301 | CEFBS_None, // VPERMILPDri = 14087 |
| 158302 | CEFBS_None, // VPERMILPDrm = 14088 |
| 158303 | CEFBS_None, // VPERMILPDrr = 14089 |
| 158304 | CEFBS_None, // VPERMILPSYmi = 14090 |
| 158305 | CEFBS_None, // VPERMILPSYri = 14091 |
| 158306 | CEFBS_None, // VPERMILPSYrm = 14092 |
| 158307 | CEFBS_None, // VPERMILPSYrr = 14093 |
| 158308 | CEFBS_None, // VPERMILPSZ128mbi = 14094 |
| 158309 | CEFBS_None, // VPERMILPSZ128mbik = 14095 |
| 158310 | CEFBS_None, // VPERMILPSZ128mbikz = 14096 |
| 158311 | CEFBS_None, // VPERMILPSZ128mi = 14097 |
| 158312 | CEFBS_None, // VPERMILPSZ128mik = 14098 |
| 158313 | CEFBS_None, // VPERMILPSZ128mikz = 14099 |
| 158314 | CEFBS_None, // VPERMILPSZ128ri = 14100 |
| 158315 | CEFBS_None, // VPERMILPSZ128rik = 14101 |
| 158316 | CEFBS_None, // VPERMILPSZ128rikz = 14102 |
| 158317 | CEFBS_None, // VPERMILPSZ128rm = 14103 |
| 158318 | CEFBS_None, // VPERMILPSZ128rmb = 14104 |
| 158319 | CEFBS_None, // VPERMILPSZ128rmbk = 14105 |
| 158320 | CEFBS_None, // VPERMILPSZ128rmbkz = 14106 |
| 158321 | CEFBS_None, // VPERMILPSZ128rmk = 14107 |
| 158322 | CEFBS_None, // VPERMILPSZ128rmkz = 14108 |
| 158323 | CEFBS_None, // VPERMILPSZ128rr = 14109 |
| 158324 | CEFBS_None, // VPERMILPSZ128rrk = 14110 |
| 158325 | CEFBS_None, // VPERMILPSZ128rrkz = 14111 |
| 158326 | CEFBS_None, // VPERMILPSZ256mbi = 14112 |
| 158327 | CEFBS_None, // VPERMILPSZ256mbik = 14113 |
| 158328 | CEFBS_None, // VPERMILPSZ256mbikz = 14114 |
| 158329 | CEFBS_None, // VPERMILPSZ256mi = 14115 |
| 158330 | CEFBS_None, // VPERMILPSZ256mik = 14116 |
| 158331 | CEFBS_None, // VPERMILPSZ256mikz = 14117 |
| 158332 | CEFBS_None, // VPERMILPSZ256ri = 14118 |
| 158333 | CEFBS_None, // VPERMILPSZ256rik = 14119 |
| 158334 | CEFBS_None, // VPERMILPSZ256rikz = 14120 |
| 158335 | CEFBS_None, // VPERMILPSZ256rm = 14121 |
| 158336 | CEFBS_None, // VPERMILPSZ256rmb = 14122 |
| 158337 | CEFBS_None, // VPERMILPSZ256rmbk = 14123 |
| 158338 | CEFBS_None, // VPERMILPSZ256rmbkz = 14124 |
| 158339 | CEFBS_None, // VPERMILPSZ256rmk = 14125 |
| 158340 | CEFBS_None, // VPERMILPSZ256rmkz = 14126 |
| 158341 | CEFBS_None, // VPERMILPSZ256rr = 14127 |
| 158342 | CEFBS_None, // VPERMILPSZ256rrk = 14128 |
| 158343 | CEFBS_None, // VPERMILPSZ256rrkz = 14129 |
| 158344 | CEFBS_None, // VPERMILPSZmbi = 14130 |
| 158345 | CEFBS_None, // VPERMILPSZmbik = 14131 |
| 158346 | CEFBS_None, // VPERMILPSZmbikz = 14132 |
| 158347 | CEFBS_None, // VPERMILPSZmi = 14133 |
| 158348 | CEFBS_None, // VPERMILPSZmik = 14134 |
| 158349 | CEFBS_None, // VPERMILPSZmikz = 14135 |
| 158350 | CEFBS_None, // VPERMILPSZri = 14136 |
| 158351 | CEFBS_None, // VPERMILPSZrik = 14137 |
| 158352 | CEFBS_None, // VPERMILPSZrikz = 14138 |
| 158353 | CEFBS_None, // VPERMILPSZrm = 14139 |
| 158354 | CEFBS_None, // VPERMILPSZrmb = 14140 |
| 158355 | CEFBS_None, // VPERMILPSZrmbk = 14141 |
| 158356 | CEFBS_None, // VPERMILPSZrmbkz = 14142 |
| 158357 | CEFBS_None, // VPERMILPSZrmk = 14143 |
| 158358 | CEFBS_None, // VPERMILPSZrmkz = 14144 |
| 158359 | CEFBS_None, // VPERMILPSZrr = 14145 |
| 158360 | CEFBS_None, // VPERMILPSZrrk = 14146 |
| 158361 | CEFBS_None, // VPERMILPSZrrkz = 14147 |
| 158362 | CEFBS_None, // VPERMILPSmi = 14148 |
| 158363 | CEFBS_None, // VPERMILPSri = 14149 |
| 158364 | CEFBS_None, // VPERMILPSrm = 14150 |
| 158365 | CEFBS_None, // VPERMILPSrr = 14151 |
| 158366 | CEFBS_None, // VPERMPDYmi = 14152 |
| 158367 | CEFBS_None, // VPERMPDYri = 14153 |
| 158368 | CEFBS_None, // VPERMPDZ256mbi = 14154 |
| 158369 | CEFBS_None, // VPERMPDZ256mbik = 14155 |
| 158370 | CEFBS_None, // VPERMPDZ256mbikz = 14156 |
| 158371 | CEFBS_None, // VPERMPDZ256mi = 14157 |
| 158372 | CEFBS_None, // VPERMPDZ256mik = 14158 |
| 158373 | CEFBS_None, // VPERMPDZ256mikz = 14159 |
| 158374 | CEFBS_None, // VPERMPDZ256ri = 14160 |
| 158375 | CEFBS_None, // VPERMPDZ256rik = 14161 |
| 158376 | CEFBS_None, // VPERMPDZ256rikz = 14162 |
| 158377 | CEFBS_None, // VPERMPDZ256rm = 14163 |
| 158378 | CEFBS_None, // VPERMPDZ256rmb = 14164 |
| 158379 | CEFBS_None, // VPERMPDZ256rmbk = 14165 |
| 158380 | CEFBS_None, // VPERMPDZ256rmbkz = 14166 |
| 158381 | CEFBS_None, // VPERMPDZ256rmk = 14167 |
| 158382 | CEFBS_None, // VPERMPDZ256rmkz = 14168 |
| 158383 | CEFBS_None, // VPERMPDZ256rr = 14169 |
| 158384 | CEFBS_None, // VPERMPDZ256rrk = 14170 |
| 158385 | CEFBS_None, // VPERMPDZ256rrkz = 14171 |
| 158386 | CEFBS_None, // VPERMPDZmbi = 14172 |
| 158387 | CEFBS_None, // VPERMPDZmbik = 14173 |
| 158388 | CEFBS_None, // VPERMPDZmbikz = 14174 |
| 158389 | CEFBS_None, // VPERMPDZmi = 14175 |
| 158390 | CEFBS_None, // VPERMPDZmik = 14176 |
| 158391 | CEFBS_None, // VPERMPDZmikz = 14177 |
| 158392 | CEFBS_None, // VPERMPDZri = 14178 |
| 158393 | CEFBS_None, // VPERMPDZrik = 14179 |
| 158394 | CEFBS_None, // VPERMPDZrikz = 14180 |
| 158395 | CEFBS_None, // VPERMPDZrm = 14181 |
| 158396 | CEFBS_None, // VPERMPDZrmb = 14182 |
| 158397 | CEFBS_None, // VPERMPDZrmbk = 14183 |
| 158398 | CEFBS_None, // VPERMPDZrmbkz = 14184 |
| 158399 | CEFBS_None, // VPERMPDZrmk = 14185 |
| 158400 | CEFBS_None, // VPERMPDZrmkz = 14186 |
| 158401 | CEFBS_None, // VPERMPDZrr = 14187 |
| 158402 | CEFBS_None, // VPERMPDZrrk = 14188 |
| 158403 | CEFBS_None, // VPERMPDZrrkz = 14189 |
| 158404 | CEFBS_None, // VPERMPSYrm = 14190 |
| 158405 | CEFBS_None, // VPERMPSYrr = 14191 |
| 158406 | CEFBS_None, // VPERMPSZ256rm = 14192 |
| 158407 | CEFBS_None, // VPERMPSZ256rmb = 14193 |
| 158408 | CEFBS_None, // VPERMPSZ256rmbk = 14194 |
| 158409 | CEFBS_None, // VPERMPSZ256rmbkz = 14195 |
| 158410 | CEFBS_None, // VPERMPSZ256rmk = 14196 |
| 158411 | CEFBS_None, // VPERMPSZ256rmkz = 14197 |
| 158412 | CEFBS_None, // VPERMPSZ256rr = 14198 |
| 158413 | CEFBS_None, // VPERMPSZ256rrk = 14199 |
| 158414 | CEFBS_None, // VPERMPSZ256rrkz = 14200 |
| 158415 | CEFBS_None, // VPERMPSZrm = 14201 |
| 158416 | CEFBS_None, // VPERMPSZrmb = 14202 |
| 158417 | CEFBS_None, // VPERMPSZrmbk = 14203 |
| 158418 | CEFBS_None, // VPERMPSZrmbkz = 14204 |
| 158419 | CEFBS_None, // VPERMPSZrmk = 14205 |
| 158420 | CEFBS_None, // VPERMPSZrmkz = 14206 |
| 158421 | CEFBS_None, // VPERMPSZrr = 14207 |
| 158422 | CEFBS_None, // VPERMPSZrrk = 14208 |
| 158423 | CEFBS_None, // VPERMPSZrrkz = 14209 |
| 158424 | CEFBS_None, // VPERMQYmi = 14210 |
| 158425 | CEFBS_None, // VPERMQYri = 14211 |
| 158426 | CEFBS_None, // VPERMQZ256mbi = 14212 |
| 158427 | CEFBS_None, // VPERMQZ256mbik = 14213 |
| 158428 | CEFBS_None, // VPERMQZ256mbikz = 14214 |
| 158429 | CEFBS_None, // VPERMQZ256mi = 14215 |
| 158430 | CEFBS_None, // VPERMQZ256mik = 14216 |
| 158431 | CEFBS_None, // VPERMQZ256mikz = 14217 |
| 158432 | CEFBS_None, // VPERMQZ256ri = 14218 |
| 158433 | CEFBS_None, // VPERMQZ256rik = 14219 |
| 158434 | CEFBS_None, // VPERMQZ256rikz = 14220 |
| 158435 | CEFBS_None, // VPERMQZ256rm = 14221 |
| 158436 | CEFBS_None, // VPERMQZ256rmb = 14222 |
| 158437 | CEFBS_None, // VPERMQZ256rmbk = 14223 |
| 158438 | CEFBS_None, // VPERMQZ256rmbkz = 14224 |
| 158439 | CEFBS_None, // VPERMQZ256rmk = 14225 |
| 158440 | CEFBS_None, // VPERMQZ256rmkz = 14226 |
| 158441 | CEFBS_None, // VPERMQZ256rr = 14227 |
| 158442 | CEFBS_None, // VPERMQZ256rrk = 14228 |
| 158443 | CEFBS_None, // VPERMQZ256rrkz = 14229 |
| 158444 | CEFBS_None, // VPERMQZmbi = 14230 |
| 158445 | CEFBS_None, // VPERMQZmbik = 14231 |
| 158446 | CEFBS_None, // VPERMQZmbikz = 14232 |
| 158447 | CEFBS_None, // VPERMQZmi = 14233 |
| 158448 | CEFBS_None, // VPERMQZmik = 14234 |
| 158449 | CEFBS_None, // VPERMQZmikz = 14235 |
| 158450 | CEFBS_None, // VPERMQZri = 14236 |
| 158451 | CEFBS_None, // VPERMQZrik = 14237 |
| 158452 | CEFBS_None, // VPERMQZrikz = 14238 |
| 158453 | CEFBS_None, // VPERMQZrm = 14239 |
| 158454 | CEFBS_None, // VPERMQZrmb = 14240 |
| 158455 | CEFBS_None, // VPERMQZrmbk = 14241 |
| 158456 | CEFBS_None, // VPERMQZrmbkz = 14242 |
| 158457 | CEFBS_None, // VPERMQZrmk = 14243 |
| 158458 | CEFBS_None, // VPERMQZrmkz = 14244 |
| 158459 | CEFBS_None, // VPERMQZrr = 14245 |
| 158460 | CEFBS_None, // VPERMQZrrk = 14246 |
| 158461 | CEFBS_None, // VPERMQZrrkz = 14247 |
| 158462 | CEFBS_None, // VPERMT2BZ128rm = 14248 |
| 158463 | CEFBS_None, // VPERMT2BZ128rmk = 14249 |
| 158464 | CEFBS_None, // VPERMT2BZ128rmkz = 14250 |
| 158465 | CEFBS_None, // VPERMT2BZ128rr = 14251 |
| 158466 | CEFBS_None, // VPERMT2BZ128rrk = 14252 |
| 158467 | CEFBS_None, // VPERMT2BZ128rrkz = 14253 |
| 158468 | CEFBS_None, // VPERMT2BZ256rm = 14254 |
| 158469 | CEFBS_None, // VPERMT2BZ256rmk = 14255 |
| 158470 | CEFBS_None, // VPERMT2BZ256rmkz = 14256 |
| 158471 | CEFBS_None, // VPERMT2BZ256rr = 14257 |
| 158472 | CEFBS_None, // VPERMT2BZ256rrk = 14258 |
| 158473 | CEFBS_None, // VPERMT2BZ256rrkz = 14259 |
| 158474 | CEFBS_None, // VPERMT2BZrm = 14260 |
| 158475 | CEFBS_None, // VPERMT2BZrmk = 14261 |
| 158476 | CEFBS_None, // VPERMT2BZrmkz = 14262 |
| 158477 | CEFBS_None, // VPERMT2BZrr = 14263 |
| 158478 | CEFBS_None, // VPERMT2BZrrk = 14264 |
| 158479 | CEFBS_None, // VPERMT2BZrrkz = 14265 |
| 158480 | CEFBS_None, // VPERMT2DZ128rm = 14266 |
| 158481 | CEFBS_None, // VPERMT2DZ128rmb = 14267 |
| 158482 | CEFBS_None, // VPERMT2DZ128rmbk = 14268 |
| 158483 | CEFBS_None, // VPERMT2DZ128rmbkz = 14269 |
| 158484 | CEFBS_None, // VPERMT2DZ128rmk = 14270 |
| 158485 | CEFBS_None, // VPERMT2DZ128rmkz = 14271 |
| 158486 | CEFBS_None, // VPERMT2DZ128rr = 14272 |
| 158487 | CEFBS_None, // VPERMT2DZ128rrk = 14273 |
| 158488 | CEFBS_None, // VPERMT2DZ128rrkz = 14274 |
| 158489 | CEFBS_None, // VPERMT2DZ256rm = 14275 |
| 158490 | CEFBS_None, // VPERMT2DZ256rmb = 14276 |
| 158491 | CEFBS_None, // VPERMT2DZ256rmbk = 14277 |
| 158492 | CEFBS_None, // VPERMT2DZ256rmbkz = 14278 |
| 158493 | CEFBS_None, // VPERMT2DZ256rmk = 14279 |
| 158494 | CEFBS_None, // VPERMT2DZ256rmkz = 14280 |
| 158495 | CEFBS_None, // VPERMT2DZ256rr = 14281 |
| 158496 | CEFBS_None, // VPERMT2DZ256rrk = 14282 |
| 158497 | CEFBS_None, // VPERMT2DZ256rrkz = 14283 |
| 158498 | CEFBS_None, // VPERMT2DZrm = 14284 |
| 158499 | CEFBS_None, // VPERMT2DZrmb = 14285 |
| 158500 | CEFBS_None, // VPERMT2DZrmbk = 14286 |
| 158501 | CEFBS_None, // VPERMT2DZrmbkz = 14287 |
| 158502 | CEFBS_None, // VPERMT2DZrmk = 14288 |
| 158503 | CEFBS_None, // VPERMT2DZrmkz = 14289 |
| 158504 | CEFBS_None, // VPERMT2DZrr = 14290 |
| 158505 | CEFBS_None, // VPERMT2DZrrk = 14291 |
| 158506 | CEFBS_None, // VPERMT2DZrrkz = 14292 |
| 158507 | CEFBS_None, // VPERMT2PDZ128rm = 14293 |
| 158508 | CEFBS_None, // VPERMT2PDZ128rmb = 14294 |
| 158509 | CEFBS_None, // VPERMT2PDZ128rmbk = 14295 |
| 158510 | CEFBS_None, // VPERMT2PDZ128rmbkz = 14296 |
| 158511 | CEFBS_None, // VPERMT2PDZ128rmk = 14297 |
| 158512 | CEFBS_None, // VPERMT2PDZ128rmkz = 14298 |
| 158513 | CEFBS_None, // VPERMT2PDZ128rr = 14299 |
| 158514 | CEFBS_None, // VPERMT2PDZ128rrk = 14300 |
| 158515 | CEFBS_None, // VPERMT2PDZ128rrkz = 14301 |
| 158516 | CEFBS_None, // VPERMT2PDZ256rm = 14302 |
| 158517 | CEFBS_None, // VPERMT2PDZ256rmb = 14303 |
| 158518 | CEFBS_None, // VPERMT2PDZ256rmbk = 14304 |
| 158519 | CEFBS_None, // VPERMT2PDZ256rmbkz = 14305 |
| 158520 | CEFBS_None, // VPERMT2PDZ256rmk = 14306 |
| 158521 | CEFBS_None, // VPERMT2PDZ256rmkz = 14307 |
| 158522 | CEFBS_None, // VPERMT2PDZ256rr = 14308 |
| 158523 | CEFBS_None, // VPERMT2PDZ256rrk = 14309 |
| 158524 | CEFBS_None, // VPERMT2PDZ256rrkz = 14310 |
| 158525 | CEFBS_None, // VPERMT2PDZrm = 14311 |
| 158526 | CEFBS_None, // VPERMT2PDZrmb = 14312 |
| 158527 | CEFBS_None, // VPERMT2PDZrmbk = 14313 |
| 158528 | CEFBS_None, // VPERMT2PDZrmbkz = 14314 |
| 158529 | CEFBS_None, // VPERMT2PDZrmk = 14315 |
| 158530 | CEFBS_None, // VPERMT2PDZrmkz = 14316 |
| 158531 | CEFBS_None, // VPERMT2PDZrr = 14317 |
| 158532 | CEFBS_None, // VPERMT2PDZrrk = 14318 |
| 158533 | CEFBS_None, // VPERMT2PDZrrkz = 14319 |
| 158534 | CEFBS_None, // VPERMT2PSZ128rm = 14320 |
| 158535 | CEFBS_None, // VPERMT2PSZ128rmb = 14321 |
| 158536 | CEFBS_None, // VPERMT2PSZ128rmbk = 14322 |
| 158537 | CEFBS_None, // VPERMT2PSZ128rmbkz = 14323 |
| 158538 | CEFBS_None, // VPERMT2PSZ128rmk = 14324 |
| 158539 | CEFBS_None, // VPERMT2PSZ128rmkz = 14325 |
| 158540 | CEFBS_None, // VPERMT2PSZ128rr = 14326 |
| 158541 | CEFBS_None, // VPERMT2PSZ128rrk = 14327 |
| 158542 | CEFBS_None, // VPERMT2PSZ128rrkz = 14328 |
| 158543 | CEFBS_None, // VPERMT2PSZ256rm = 14329 |
| 158544 | CEFBS_None, // VPERMT2PSZ256rmb = 14330 |
| 158545 | CEFBS_None, // VPERMT2PSZ256rmbk = 14331 |
| 158546 | CEFBS_None, // VPERMT2PSZ256rmbkz = 14332 |
| 158547 | CEFBS_None, // VPERMT2PSZ256rmk = 14333 |
| 158548 | CEFBS_None, // VPERMT2PSZ256rmkz = 14334 |
| 158549 | CEFBS_None, // VPERMT2PSZ256rr = 14335 |
| 158550 | CEFBS_None, // VPERMT2PSZ256rrk = 14336 |
| 158551 | CEFBS_None, // VPERMT2PSZ256rrkz = 14337 |
| 158552 | CEFBS_None, // VPERMT2PSZrm = 14338 |
| 158553 | CEFBS_None, // VPERMT2PSZrmb = 14339 |
| 158554 | CEFBS_None, // VPERMT2PSZrmbk = 14340 |
| 158555 | CEFBS_None, // VPERMT2PSZrmbkz = 14341 |
| 158556 | CEFBS_None, // VPERMT2PSZrmk = 14342 |
| 158557 | CEFBS_None, // VPERMT2PSZrmkz = 14343 |
| 158558 | CEFBS_None, // VPERMT2PSZrr = 14344 |
| 158559 | CEFBS_None, // VPERMT2PSZrrk = 14345 |
| 158560 | CEFBS_None, // VPERMT2PSZrrkz = 14346 |
| 158561 | CEFBS_None, // VPERMT2QZ128rm = 14347 |
| 158562 | CEFBS_None, // VPERMT2QZ128rmb = 14348 |
| 158563 | CEFBS_None, // VPERMT2QZ128rmbk = 14349 |
| 158564 | CEFBS_None, // VPERMT2QZ128rmbkz = 14350 |
| 158565 | CEFBS_None, // VPERMT2QZ128rmk = 14351 |
| 158566 | CEFBS_None, // VPERMT2QZ128rmkz = 14352 |
| 158567 | CEFBS_None, // VPERMT2QZ128rr = 14353 |
| 158568 | CEFBS_None, // VPERMT2QZ128rrk = 14354 |
| 158569 | CEFBS_None, // VPERMT2QZ128rrkz = 14355 |
| 158570 | CEFBS_None, // VPERMT2QZ256rm = 14356 |
| 158571 | CEFBS_None, // VPERMT2QZ256rmb = 14357 |
| 158572 | CEFBS_None, // VPERMT2QZ256rmbk = 14358 |
| 158573 | CEFBS_None, // VPERMT2QZ256rmbkz = 14359 |
| 158574 | CEFBS_None, // VPERMT2QZ256rmk = 14360 |
| 158575 | CEFBS_None, // VPERMT2QZ256rmkz = 14361 |
| 158576 | CEFBS_None, // VPERMT2QZ256rr = 14362 |
| 158577 | CEFBS_None, // VPERMT2QZ256rrk = 14363 |
| 158578 | CEFBS_None, // VPERMT2QZ256rrkz = 14364 |
| 158579 | CEFBS_None, // VPERMT2QZrm = 14365 |
| 158580 | CEFBS_None, // VPERMT2QZrmb = 14366 |
| 158581 | CEFBS_None, // VPERMT2QZrmbk = 14367 |
| 158582 | CEFBS_None, // VPERMT2QZrmbkz = 14368 |
| 158583 | CEFBS_None, // VPERMT2QZrmk = 14369 |
| 158584 | CEFBS_None, // VPERMT2QZrmkz = 14370 |
| 158585 | CEFBS_None, // VPERMT2QZrr = 14371 |
| 158586 | CEFBS_None, // VPERMT2QZrrk = 14372 |
| 158587 | CEFBS_None, // VPERMT2QZrrkz = 14373 |
| 158588 | CEFBS_None, // VPERMT2WZ128rm = 14374 |
| 158589 | CEFBS_None, // VPERMT2WZ128rmk = 14375 |
| 158590 | CEFBS_None, // VPERMT2WZ128rmkz = 14376 |
| 158591 | CEFBS_None, // VPERMT2WZ128rr = 14377 |
| 158592 | CEFBS_None, // VPERMT2WZ128rrk = 14378 |
| 158593 | CEFBS_None, // VPERMT2WZ128rrkz = 14379 |
| 158594 | CEFBS_None, // VPERMT2WZ256rm = 14380 |
| 158595 | CEFBS_None, // VPERMT2WZ256rmk = 14381 |
| 158596 | CEFBS_None, // VPERMT2WZ256rmkz = 14382 |
| 158597 | CEFBS_None, // VPERMT2WZ256rr = 14383 |
| 158598 | CEFBS_None, // VPERMT2WZ256rrk = 14384 |
| 158599 | CEFBS_None, // VPERMT2WZ256rrkz = 14385 |
| 158600 | CEFBS_None, // VPERMT2WZrm = 14386 |
| 158601 | CEFBS_None, // VPERMT2WZrmk = 14387 |
| 158602 | CEFBS_None, // VPERMT2WZrmkz = 14388 |
| 158603 | CEFBS_None, // VPERMT2WZrr = 14389 |
| 158604 | CEFBS_None, // VPERMT2WZrrk = 14390 |
| 158605 | CEFBS_None, // VPERMT2WZrrkz = 14391 |
| 158606 | CEFBS_None, // VPERMWZ128rm = 14392 |
| 158607 | CEFBS_None, // VPERMWZ128rmk = 14393 |
| 158608 | CEFBS_None, // VPERMWZ128rmkz = 14394 |
| 158609 | CEFBS_None, // VPERMWZ128rr = 14395 |
| 158610 | CEFBS_None, // VPERMWZ128rrk = 14396 |
| 158611 | CEFBS_None, // VPERMWZ128rrkz = 14397 |
| 158612 | CEFBS_None, // VPERMWZ256rm = 14398 |
| 158613 | CEFBS_None, // VPERMWZ256rmk = 14399 |
| 158614 | CEFBS_None, // VPERMWZ256rmkz = 14400 |
| 158615 | CEFBS_None, // VPERMWZ256rr = 14401 |
| 158616 | CEFBS_None, // VPERMWZ256rrk = 14402 |
| 158617 | CEFBS_None, // VPERMWZ256rrkz = 14403 |
| 158618 | CEFBS_None, // VPERMWZrm = 14404 |
| 158619 | CEFBS_None, // VPERMWZrmk = 14405 |
| 158620 | CEFBS_None, // VPERMWZrmkz = 14406 |
| 158621 | CEFBS_None, // VPERMWZrr = 14407 |
| 158622 | CEFBS_None, // VPERMWZrrk = 14408 |
| 158623 | CEFBS_None, // VPERMWZrrkz = 14409 |
| 158624 | CEFBS_None, // VPEXPANDBZ128rm = 14410 |
| 158625 | CEFBS_None, // VPEXPANDBZ128rmk = 14411 |
| 158626 | CEFBS_None, // VPEXPANDBZ128rmkz = 14412 |
| 158627 | CEFBS_None, // VPEXPANDBZ128rr = 14413 |
| 158628 | CEFBS_None, // VPEXPANDBZ128rrk = 14414 |
| 158629 | CEFBS_None, // VPEXPANDBZ128rrkz = 14415 |
| 158630 | CEFBS_None, // VPEXPANDBZ256rm = 14416 |
| 158631 | CEFBS_None, // VPEXPANDBZ256rmk = 14417 |
| 158632 | CEFBS_None, // VPEXPANDBZ256rmkz = 14418 |
| 158633 | CEFBS_None, // VPEXPANDBZ256rr = 14419 |
| 158634 | CEFBS_None, // VPEXPANDBZ256rrk = 14420 |
| 158635 | CEFBS_None, // VPEXPANDBZ256rrkz = 14421 |
| 158636 | CEFBS_None, // VPEXPANDBZrm = 14422 |
| 158637 | CEFBS_None, // VPEXPANDBZrmk = 14423 |
| 158638 | CEFBS_None, // VPEXPANDBZrmkz = 14424 |
| 158639 | CEFBS_None, // VPEXPANDBZrr = 14425 |
| 158640 | CEFBS_None, // VPEXPANDBZrrk = 14426 |
| 158641 | CEFBS_None, // VPEXPANDBZrrkz = 14427 |
| 158642 | CEFBS_None, // VPEXPANDDZ128rm = 14428 |
| 158643 | CEFBS_None, // VPEXPANDDZ128rmk = 14429 |
| 158644 | CEFBS_None, // VPEXPANDDZ128rmkz = 14430 |
| 158645 | CEFBS_None, // VPEXPANDDZ128rr = 14431 |
| 158646 | CEFBS_None, // VPEXPANDDZ128rrk = 14432 |
| 158647 | CEFBS_None, // VPEXPANDDZ128rrkz = 14433 |
| 158648 | CEFBS_None, // VPEXPANDDZ256rm = 14434 |
| 158649 | CEFBS_None, // VPEXPANDDZ256rmk = 14435 |
| 158650 | CEFBS_None, // VPEXPANDDZ256rmkz = 14436 |
| 158651 | CEFBS_None, // VPEXPANDDZ256rr = 14437 |
| 158652 | CEFBS_None, // VPEXPANDDZ256rrk = 14438 |
| 158653 | CEFBS_None, // VPEXPANDDZ256rrkz = 14439 |
| 158654 | CEFBS_None, // VPEXPANDDZrm = 14440 |
| 158655 | CEFBS_None, // VPEXPANDDZrmk = 14441 |
| 158656 | CEFBS_None, // VPEXPANDDZrmkz = 14442 |
| 158657 | CEFBS_None, // VPEXPANDDZrr = 14443 |
| 158658 | CEFBS_None, // VPEXPANDDZrrk = 14444 |
| 158659 | CEFBS_None, // VPEXPANDDZrrkz = 14445 |
| 158660 | CEFBS_None, // VPEXPANDQZ128rm = 14446 |
| 158661 | CEFBS_None, // VPEXPANDQZ128rmk = 14447 |
| 158662 | CEFBS_None, // VPEXPANDQZ128rmkz = 14448 |
| 158663 | CEFBS_None, // VPEXPANDQZ128rr = 14449 |
| 158664 | CEFBS_None, // VPEXPANDQZ128rrk = 14450 |
| 158665 | CEFBS_None, // VPEXPANDQZ128rrkz = 14451 |
| 158666 | CEFBS_None, // VPEXPANDQZ256rm = 14452 |
| 158667 | CEFBS_None, // VPEXPANDQZ256rmk = 14453 |
| 158668 | CEFBS_None, // VPEXPANDQZ256rmkz = 14454 |
| 158669 | CEFBS_None, // VPEXPANDQZ256rr = 14455 |
| 158670 | CEFBS_None, // VPEXPANDQZ256rrk = 14456 |
| 158671 | CEFBS_None, // VPEXPANDQZ256rrkz = 14457 |
| 158672 | CEFBS_None, // VPEXPANDQZrm = 14458 |
| 158673 | CEFBS_None, // VPEXPANDQZrmk = 14459 |
| 158674 | CEFBS_None, // VPEXPANDQZrmkz = 14460 |
| 158675 | CEFBS_None, // VPEXPANDQZrr = 14461 |
| 158676 | CEFBS_None, // VPEXPANDQZrrk = 14462 |
| 158677 | CEFBS_None, // VPEXPANDQZrrkz = 14463 |
| 158678 | CEFBS_None, // VPEXPANDWZ128rm = 14464 |
| 158679 | CEFBS_None, // VPEXPANDWZ128rmk = 14465 |
| 158680 | CEFBS_None, // VPEXPANDWZ128rmkz = 14466 |
| 158681 | CEFBS_None, // VPEXPANDWZ128rr = 14467 |
| 158682 | CEFBS_None, // VPEXPANDWZ128rrk = 14468 |
| 158683 | CEFBS_None, // VPEXPANDWZ128rrkz = 14469 |
| 158684 | CEFBS_None, // VPEXPANDWZ256rm = 14470 |
| 158685 | CEFBS_None, // VPEXPANDWZ256rmk = 14471 |
| 158686 | CEFBS_None, // VPEXPANDWZ256rmkz = 14472 |
| 158687 | CEFBS_None, // VPEXPANDWZ256rr = 14473 |
| 158688 | CEFBS_None, // VPEXPANDWZ256rrk = 14474 |
| 158689 | CEFBS_None, // VPEXPANDWZ256rrkz = 14475 |
| 158690 | CEFBS_None, // VPEXPANDWZrm = 14476 |
| 158691 | CEFBS_None, // VPEXPANDWZrmk = 14477 |
| 158692 | CEFBS_None, // VPEXPANDWZrmkz = 14478 |
| 158693 | CEFBS_None, // VPEXPANDWZrr = 14479 |
| 158694 | CEFBS_None, // VPEXPANDWZrrk = 14480 |
| 158695 | CEFBS_None, // VPEXPANDWZrrkz = 14481 |
| 158696 | CEFBS_None, // VPEXTRBZmr = 14482 |
| 158697 | CEFBS_None, // VPEXTRBZrr = 14483 |
| 158698 | CEFBS_None, // VPEXTRBmr = 14484 |
| 158699 | CEFBS_None, // VPEXTRBrr = 14485 |
| 158700 | CEFBS_None, // VPEXTRDZmr = 14486 |
| 158701 | CEFBS_None, // VPEXTRDZrr = 14487 |
| 158702 | CEFBS_None, // VPEXTRDmr = 14488 |
| 158703 | CEFBS_None, // VPEXTRDrr = 14489 |
| 158704 | CEFBS_None, // VPEXTRQZmr = 14490 |
| 158705 | CEFBS_None, // VPEXTRQZrr = 14491 |
| 158706 | CEFBS_None, // VPEXTRQmr = 14492 |
| 158707 | CEFBS_None, // VPEXTRQrr = 14493 |
| 158708 | CEFBS_None, // VPEXTRWZmr = 14494 |
| 158709 | CEFBS_None, // VPEXTRWZrr = 14495 |
| 158710 | CEFBS_None, // VPEXTRWZrr_REV = 14496 |
| 158711 | CEFBS_None, // VPEXTRWmr = 14497 |
| 158712 | CEFBS_None, // VPEXTRWrr = 14498 |
| 158713 | CEFBS_None, // VPEXTRWrr_REV = 14499 |
| 158714 | CEFBS_None, // VPGATHERDDYrm = 14500 |
| 158715 | CEFBS_None, // VPGATHERDDZ128rm = 14501 |
| 158716 | CEFBS_None, // VPGATHERDDZ256rm = 14502 |
| 158717 | CEFBS_None, // VPGATHERDDZrm = 14503 |
| 158718 | CEFBS_None, // VPGATHERDDrm = 14504 |
| 158719 | CEFBS_None, // VPGATHERDQYrm = 14505 |
| 158720 | CEFBS_None, // VPGATHERDQZ128rm = 14506 |
| 158721 | CEFBS_None, // VPGATHERDQZ256rm = 14507 |
| 158722 | CEFBS_None, // VPGATHERDQZrm = 14508 |
| 158723 | CEFBS_None, // VPGATHERDQrm = 14509 |
| 158724 | CEFBS_None, // VPGATHERQDYrm = 14510 |
| 158725 | CEFBS_None, // VPGATHERQDZ128rm = 14511 |
| 158726 | CEFBS_None, // VPGATHERQDZ256rm = 14512 |
| 158727 | CEFBS_None, // VPGATHERQDZrm = 14513 |
| 158728 | CEFBS_None, // VPGATHERQDrm = 14514 |
| 158729 | CEFBS_None, // VPGATHERQQYrm = 14515 |
| 158730 | CEFBS_None, // VPGATHERQQZ128rm = 14516 |
| 158731 | CEFBS_None, // VPGATHERQQZ256rm = 14517 |
| 158732 | CEFBS_None, // VPGATHERQQZrm = 14518 |
| 158733 | CEFBS_None, // VPGATHERQQrm = 14519 |
| 158734 | CEFBS_None, // VPHADDBDrm = 14520 |
| 158735 | CEFBS_None, // VPHADDBDrr = 14521 |
| 158736 | CEFBS_None, // VPHADDBQrm = 14522 |
| 158737 | CEFBS_None, // VPHADDBQrr = 14523 |
| 158738 | CEFBS_None, // VPHADDBWrm = 14524 |
| 158739 | CEFBS_None, // VPHADDBWrr = 14525 |
| 158740 | CEFBS_None, // VPHADDDQrm = 14526 |
| 158741 | CEFBS_None, // VPHADDDQrr = 14527 |
| 158742 | CEFBS_None, // VPHADDDYrm = 14528 |
| 158743 | CEFBS_None, // VPHADDDYrr = 14529 |
| 158744 | CEFBS_None, // VPHADDDrm = 14530 |
| 158745 | CEFBS_None, // VPHADDDrr = 14531 |
| 158746 | CEFBS_None, // VPHADDSWYrm = 14532 |
| 158747 | CEFBS_None, // VPHADDSWYrr = 14533 |
| 158748 | CEFBS_None, // VPHADDSWrm = 14534 |
| 158749 | CEFBS_None, // VPHADDSWrr = 14535 |
| 158750 | CEFBS_None, // VPHADDUBDrm = 14536 |
| 158751 | CEFBS_None, // VPHADDUBDrr = 14537 |
| 158752 | CEFBS_None, // VPHADDUBQrm = 14538 |
| 158753 | CEFBS_None, // VPHADDUBQrr = 14539 |
| 158754 | CEFBS_None, // VPHADDUBWrm = 14540 |
| 158755 | CEFBS_None, // VPHADDUBWrr = 14541 |
| 158756 | CEFBS_None, // VPHADDUDQrm = 14542 |
| 158757 | CEFBS_None, // VPHADDUDQrr = 14543 |
| 158758 | CEFBS_None, // VPHADDUWDrm = 14544 |
| 158759 | CEFBS_None, // VPHADDUWDrr = 14545 |
| 158760 | CEFBS_None, // VPHADDUWQrm = 14546 |
| 158761 | CEFBS_None, // VPHADDUWQrr = 14547 |
| 158762 | CEFBS_None, // VPHADDWDrm = 14548 |
| 158763 | CEFBS_None, // VPHADDWDrr = 14549 |
| 158764 | CEFBS_None, // VPHADDWQrm = 14550 |
| 158765 | CEFBS_None, // VPHADDWQrr = 14551 |
| 158766 | CEFBS_None, // VPHADDWYrm = 14552 |
| 158767 | CEFBS_None, // VPHADDWYrr = 14553 |
| 158768 | CEFBS_None, // VPHADDWrm = 14554 |
| 158769 | CEFBS_None, // VPHADDWrr = 14555 |
| 158770 | CEFBS_None, // VPHMINPOSUWrm = 14556 |
| 158771 | CEFBS_None, // VPHMINPOSUWrr = 14557 |
| 158772 | CEFBS_None, // VPHSUBBWrm = 14558 |
| 158773 | CEFBS_None, // VPHSUBBWrr = 14559 |
| 158774 | CEFBS_None, // VPHSUBDQrm = 14560 |
| 158775 | CEFBS_None, // VPHSUBDQrr = 14561 |
| 158776 | CEFBS_None, // VPHSUBDYrm = 14562 |
| 158777 | CEFBS_None, // VPHSUBDYrr = 14563 |
| 158778 | CEFBS_None, // VPHSUBDrm = 14564 |
| 158779 | CEFBS_None, // VPHSUBDrr = 14565 |
| 158780 | CEFBS_None, // VPHSUBSWYrm = 14566 |
| 158781 | CEFBS_None, // VPHSUBSWYrr = 14567 |
| 158782 | CEFBS_None, // VPHSUBSWrm = 14568 |
| 158783 | CEFBS_None, // VPHSUBSWrr = 14569 |
| 158784 | CEFBS_None, // VPHSUBWDrm = 14570 |
| 158785 | CEFBS_None, // VPHSUBWDrr = 14571 |
| 158786 | CEFBS_None, // VPHSUBWYrm = 14572 |
| 158787 | CEFBS_None, // VPHSUBWYrr = 14573 |
| 158788 | CEFBS_None, // VPHSUBWrm = 14574 |
| 158789 | CEFBS_None, // VPHSUBWrr = 14575 |
| 158790 | CEFBS_None, // VPINSRBZrm = 14576 |
| 158791 | CEFBS_None, // VPINSRBZrr = 14577 |
| 158792 | CEFBS_None, // VPINSRBrm = 14578 |
| 158793 | CEFBS_None, // VPINSRBrr = 14579 |
| 158794 | CEFBS_None, // VPINSRDZrm = 14580 |
| 158795 | CEFBS_None, // VPINSRDZrr = 14581 |
| 158796 | CEFBS_None, // VPINSRDrm = 14582 |
| 158797 | CEFBS_None, // VPINSRDrr = 14583 |
| 158798 | CEFBS_None, // VPINSRQZrm = 14584 |
| 158799 | CEFBS_None, // VPINSRQZrr = 14585 |
| 158800 | CEFBS_None, // VPINSRQrm = 14586 |
| 158801 | CEFBS_None, // VPINSRQrr = 14587 |
| 158802 | CEFBS_None, // VPINSRWZrm = 14588 |
| 158803 | CEFBS_None, // VPINSRWZrr = 14589 |
| 158804 | CEFBS_None, // VPINSRWrm = 14590 |
| 158805 | CEFBS_None, // VPINSRWrr = 14591 |
| 158806 | CEFBS_None, // VPLZCNTDZ128rm = 14592 |
| 158807 | CEFBS_None, // VPLZCNTDZ128rmb = 14593 |
| 158808 | CEFBS_None, // VPLZCNTDZ128rmbk = 14594 |
| 158809 | CEFBS_None, // VPLZCNTDZ128rmbkz = 14595 |
| 158810 | CEFBS_None, // VPLZCNTDZ128rmk = 14596 |
| 158811 | CEFBS_None, // VPLZCNTDZ128rmkz = 14597 |
| 158812 | CEFBS_None, // VPLZCNTDZ128rr = 14598 |
| 158813 | CEFBS_None, // VPLZCNTDZ128rrk = 14599 |
| 158814 | CEFBS_None, // VPLZCNTDZ128rrkz = 14600 |
| 158815 | CEFBS_None, // VPLZCNTDZ256rm = 14601 |
| 158816 | CEFBS_None, // VPLZCNTDZ256rmb = 14602 |
| 158817 | CEFBS_None, // VPLZCNTDZ256rmbk = 14603 |
| 158818 | CEFBS_None, // VPLZCNTDZ256rmbkz = 14604 |
| 158819 | CEFBS_None, // VPLZCNTDZ256rmk = 14605 |
| 158820 | CEFBS_None, // VPLZCNTDZ256rmkz = 14606 |
| 158821 | CEFBS_None, // VPLZCNTDZ256rr = 14607 |
| 158822 | CEFBS_None, // VPLZCNTDZ256rrk = 14608 |
| 158823 | CEFBS_None, // VPLZCNTDZ256rrkz = 14609 |
| 158824 | CEFBS_None, // VPLZCNTDZrm = 14610 |
| 158825 | CEFBS_None, // VPLZCNTDZrmb = 14611 |
| 158826 | CEFBS_None, // VPLZCNTDZrmbk = 14612 |
| 158827 | CEFBS_None, // VPLZCNTDZrmbkz = 14613 |
| 158828 | CEFBS_None, // VPLZCNTDZrmk = 14614 |
| 158829 | CEFBS_None, // VPLZCNTDZrmkz = 14615 |
| 158830 | CEFBS_None, // VPLZCNTDZrr = 14616 |
| 158831 | CEFBS_None, // VPLZCNTDZrrk = 14617 |
| 158832 | CEFBS_None, // VPLZCNTDZrrkz = 14618 |
| 158833 | CEFBS_None, // VPLZCNTQZ128rm = 14619 |
| 158834 | CEFBS_None, // VPLZCNTQZ128rmb = 14620 |
| 158835 | CEFBS_None, // VPLZCNTQZ128rmbk = 14621 |
| 158836 | CEFBS_None, // VPLZCNTQZ128rmbkz = 14622 |
| 158837 | CEFBS_None, // VPLZCNTQZ128rmk = 14623 |
| 158838 | CEFBS_None, // VPLZCNTQZ128rmkz = 14624 |
| 158839 | CEFBS_None, // VPLZCNTQZ128rr = 14625 |
| 158840 | CEFBS_None, // VPLZCNTQZ128rrk = 14626 |
| 158841 | CEFBS_None, // VPLZCNTQZ128rrkz = 14627 |
| 158842 | CEFBS_None, // VPLZCNTQZ256rm = 14628 |
| 158843 | CEFBS_None, // VPLZCNTQZ256rmb = 14629 |
| 158844 | CEFBS_None, // VPLZCNTQZ256rmbk = 14630 |
| 158845 | CEFBS_None, // VPLZCNTQZ256rmbkz = 14631 |
| 158846 | CEFBS_None, // VPLZCNTQZ256rmk = 14632 |
| 158847 | CEFBS_None, // VPLZCNTQZ256rmkz = 14633 |
| 158848 | CEFBS_None, // VPLZCNTQZ256rr = 14634 |
| 158849 | CEFBS_None, // VPLZCNTQZ256rrk = 14635 |
| 158850 | CEFBS_None, // VPLZCNTQZ256rrkz = 14636 |
| 158851 | CEFBS_None, // VPLZCNTQZrm = 14637 |
| 158852 | CEFBS_None, // VPLZCNTQZrmb = 14638 |
| 158853 | CEFBS_None, // VPLZCNTQZrmbk = 14639 |
| 158854 | CEFBS_None, // VPLZCNTQZrmbkz = 14640 |
| 158855 | CEFBS_None, // VPLZCNTQZrmk = 14641 |
| 158856 | CEFBS_None, // VPLZCNTQZrmkz = 14642 |
| 158857 | CEFBS_None, // VPLZCNTQZrr = 14643 |
| 158858 | CEFBS_None, // VPLZCNTQZrrk = 14644 |
| 158859 | CEFBS_None, // VPLZCNTQZrrkz = 14645 |
| 158860 | CEFBS_None, // VPMACSDDrm = 14646 |
| 158861 | CEFBS_None, // VPMACSDDrr = 14647 |
| 158862 | CEFBS_None, // VPMACSDQHrm = 14648 |
| 158863 | CEFBS_None, // VPMACSDQHrr = 14649 |
| 158864 | CEFBS_None, // VPMACSDQLrm = 14650 |
| 158865 | CEFBS_None, // VPMACSDQLrr = 14651 |
| 158866 | CEFBS_None, // VPMACSSDDrm = 14652 |
| 158867 | CEFBS_None, // VPMACSSDDrr = 14653 |
| 158868 | CEFBS_None, // VPMACSSDQHrm = 14654 |
| 158869 | CEFBS_None, // VPMACSSDQHrr = 14655 |
| 158870 | CEFBS_None, // VPMACSSDQLrm = 14656 |
| 158871 | CEFBS_None, // VPMACSSDQLrr = 14657 |
| 158872 | CEFBS_None, // VPMACSSWDrm = 14658 |
| 158873 | CEFBS_None, // VPMACSSWDrr = 14659 |
| 158874 | CEFBS_None, // VPMACSSWWrm = 14660 |
| 158875 | CEFBS_None, // VPMACSSWWrr = 14661 |
| 158876 | CEFBS_None, // VPMACSWDrm = 14662 |
| 158877 | CEFBS_None, // VPMACSWDrr = 14663 |
| 158878 | CEFBS_None, // VPMACSWWrm = 14664 |
| 158879 | CEFBS_None, // VPMACSWWrr = 14665 |
| 158880 | CEFBS_None, // VPMADCSSWDrm = 14666 |
| 158881 | CEFBS_None, // VPMADCSSWDrr = 14667 |
| 158882 | CEFBS_None, // VPMADCSWDrm = 14668 |
| 158883 | CEFBS_None, // VPMADCSWDrr = 14669 |
| 158884 | CEFBS_None, // VPMADD52HUQYrm = 14670 |
| 158885 | CEFBS_None, // VPMADD52HUQYrr = 14671 |
| 158886 | CEFBS_None, // VPMADD52HUQZ128m = 14672 |
| 158887 | CEFBS_None, // VPMADD52HUQZ128mb = 14673 |
| 158888 | CEFBS_None, // VPMADD52HUQZ128mbk = 14674 |
| 158889 | CEFBS_None, // VPMADD52HUQZ128mbkz = 14675 |
| 158890 | CEFBS_None, // VPMADD52HUQZ128mk = 14676 |
| 158891 | CEFBS_None, // VPMADD52HUQZ128mkz = 14677 |
| 158892 | CEFBS_None, // VPMADD52HUQZ128r = 14678 |
| 158893 | CEFBS_None, // VPMADD52HUQZ128rk = 14679 |
| 158894 | CEFBS_None, // VPMADD52HUQZ128rkz = 14680 |
| 158895 | CEFBS_None, // VPMADD52HUQZ256m = 14681 |
| 158896 | CEFBS_None, // VPMADD52HUQZ256mb = 14682 |
| 158897 | CEFBS_None, // VPMADD52HUQZ256mbk = 14683 |
| 158898 | CEFBS_None, // VPMADD52HUQZ256mbkz = 14684 |
| 158899 | CEFBS_None, // VPMADD52HUQZ256mk = 14685 |
| 158900 | CEFBS_None, // VPMADD52HUQZ256mkz = 14686 |
| 158901 | CEFBS_None, // VPMADD52HUQZ256r = 14687 |
| 158902 | CEFBS_None, // VPMADD52HUQZ256rk = 14688 |
| 158903 | CEFBS_None, // VPMADD52HUQZ256rkz = 14689 |
| 158904 | CEFBS_None, // VPMADD52HUQZm = 14690 |
| 158905 | CEFBS_None, // VPMADD52HUQZmb = 14691 |
| 158906 | CEFBS_None, // VPMADD52HUQZmbk = 14692 |
| 158907 | CEFBS_None, // VPMADD52HUQZmbkz = 14693 |
| 158908 | CEFBS_None, // VPMADD52HUQZmk = 14694 |
| 158909 | CEFBS_None, // VPMADD52HUQZmkz = 14695 |
| 158910 | CEFBS_None, // VPMADD52HUQZr = 14696 |
| 158911 | CEFBS_None, // VPMADD52HUQZrk = 14697 |
| 158912 | CEFBS_None, // VPMADD52HUQZrkz = 14698 |
| 158913 | CEFBS_None, // VPMADD52HUQrm = 14699 |
| 158914 | CEFBS_None, // VPMADD52HUQrr = 14700 |
| 158915 | CEFBS_None, // VPMADD52LUQYrm = 14701 |
| 158916 | CEFBS_None, // VPMADD52LUQYrr = 14702 |
| 158917 | CEFBS_None, // VPMADD52LUQZ128m = 14703 |
| 158918 | CEFBS_None, // VPMADD52LUQZ128mb = 14704 |
| 158919 | CEFBS_None, // VPMADD52LUQZ128mbk = 14705 |
| 158920 | CEFBS_None, // VPMADD52LUQZ128mbkz = 14706 |
| 158921 | CEFBS_None, // VPMADD52LUQZ128mk = 14707 |
| 158922 | CEFBS_None, // VPMADD52LUQZ128mkz = 14708 |
| 158923 | CEFBS_None, // VPMADD52LUQZ128r = 14709 |
| 158924 | CEFBS_None, // VPMADD52LUQZ128rk = 14710 |
| 158925 | CEFBS_None, // VPMADD52LUQZ128rkz = 14711 |
| 158926 | CEFBS_None, // VPMADD52LUQZ256m = 14712 |
| 158927 | CEFBS_None, // VPMADD52LUQZ256mb = 14713 |
| 158928 | CEFBS_None, // VPMADD52LUQZ256mbk = 14714 |
| 158929 | CEFBS_None, // VPMADD52LUQZ256mbkz = 14715 |
| 158930 | CEFBS_None, // VPMADD52LUQZ256mk = 14716 |
| 158931 | CEFBS_None, // VPMADD52LUQZ256mkz = 14717 |
| 158932 | CEFBS_None, // VPMADD52LUQZ256r = 14718 |
| 158933 | CEFBS_None, // VPMADD52LUQZ256rk = 14719 |
| 158934 | CEFBS_None, // VPMADD52LUQZ256rkz = 14720 |
| 158935 | CEFBS_None, // VPMADD52LUQZm = 14721 |
| 158936 | CEFBS_None, // VPMADD52LUQZmb = 14722 |
| 158937 | CEFBS_None, // VPMADD52LUQZmbk = 14723 |
| 158938 | CEFBS_None, // VPMADD52LUQZmbkz = 14724 |
| 158939 | CEFBS_None, // VPMADD52LUQZmk = 14725 |
| 158940 | CEFBS_None, // VPMADD52LUQZmkz = 14726 |
| 158941 | CEFBS_None, // VPMADD52LUQZr = 14727 |
| 158942 | CEFBS_None, // VPMADD52LUQZrk = 14728 |
| 158943 | CEFBS_None, // VPMADD52LUQZrkz = 14729 |
| 158944 | CEFBS_None, // VPMADD52LUQrm = 14730 |
| 158945 | CEFBS_None, // VPMADD52LUQrr = 14731 |
| 158946 | CEFBS_None, // VPMADDUBSWYrm = 14732 |
| 158947 | CEFBS_None, // VPMADDUBSWYrr = 14733 |
| 158948 | CEFBS_None, // VPMADDUBSWZ128rm = 14734 |
| 158949 | CEFBS_None, // VPMADDUBSWZ128rmk = 14735 |
| 158950 | CEFBS_None, // VPMADDUBSWZ128rmkz = 14736 |
| 158951 | CEFBS_None, // VPMADDUBSWZ128rr = 14737 |
| 158952 | CEFBS_None, // VPMADDUBSWZ128rrk = 14738 |
| 158953 | CEFBS_None, // VPMADDUBSWZ128rrkz = 14739 |
| 158954 | CEFBS_None, // VPMADDUBSWZ256rm = 14740 |
| 158955 | CEFBS_None, // VPMADDUBSWZ256rmk = 14741 |
| 158956 | CEFBS_None, // VPMADDUBSWZ256rmkz = 14742 |
| 158957 | CEFBS_None, // VPMADDUBSWZ256rr = 14743 |
| 158958 | CEFBS_None, // VPMADDUBSWZ256rrk = 14744 |
| 158959 | CEFBS_None, // VPMADDUBSWZ256rrkz = 14745 |
| 158960 | CEFBS_None, // VPMADDUBSWZrm = 14746 |
| 158961 | CEFBS_None, // VPMADDUBSWZrmk = 14747 |
| 158962 | CEFBS_None, // VPMADDUBSWZrmkz = 14748 |
| 158963 | CEFBS_None, // VPMADDUBSWZrr = 14749 |
| 158964 | CEFBS_None, // VPMADDUBSWZrrk = 14750 |
| 158965 | CEFBS_None, // VPMADDUBSWZrrkz = 14751 |
| 158966 | CEFBS_None, // VPMADDUBSWrm = 14752 |
| 158967 | CEFBS_None, // VPMADDUBSWrr = 14753 |
| 158968 | CEFBS_None, // VPMADDWDYrm = 14754 |
| 158969 | CEFBS_None, // VPMADDWDYrr = 14755 |
| 158970 | CEFBS_None, // VPMADDWDZ128rm = 14756 |
| 158971 | CEFBS_None, // VPMADDWDZ128rmk = 14757 |
| 158972 | CEFBS_None, // VPMADDWDZ128rmkz = 14758 |
| 158973 | CEFBS_None, // VPMADDWDZ128rr = 14759 |
| 158974 | CEFBS_None, // VPMADDWDZ128rrk = 14760 |
| 158975 | CEFBS_None, // VPMADDWDZ128rrkz = 14761 |
| 158976 | CEFBS_None, // VPMADDWDZ256rm = 14762 |
| 158977 | CEFBS_None, // VPMADDWDZ256rmk = 14763 |
| 158978 | CEFBS_None, // VPMADDWDZ256rmkz = 14764 |
| 158979 | CEFBS_None, // VPMADDWDZ256rr = 14765 |
| 158980 | CEFBS_None, // VPMADDWDZ256rrk = 14766 |
| 158981 | CEFBS_None, // VPMADDWDZ256rrkz = 14767 |
| 158982 | CEFBS_None, // VPMADDWDZrm = 14768 |
| 158983 | CEFBS_None, // VPMADDWDZrmk = 14769 |
| 158984 | CEFBS_None, // VPMADDWDZrmkz = 14770 |
| 158985 | CEFBS_None, // VPMADDWDZrr = 14771 |
| 158986 | CEFBS_None, // VPMADDWDZrrk = 14772 |
| 158987 | CEFBS_None, // VPMADDWDZrrkz = 14773 |
| 158988 | CEFBS_None, // VPMADDWDrm = 14774 |
| 158989 | CEFBS_None, // VPMADDWDrr = 14775 |
| 158990 | CEFBS_None, // VPMASKMOVDYmr = 14776 |
| 158991 | CEFBS_None, // VPMASKMOVDYrm = 14777 |
| 158992 | CEFBS_None, // VPMASKMOVDmr = 14778 |
| 158993 | CEFBS_None, // VPMASKMOVDrm = 14779 |
| 158994 | CEFBS_None, // VPMASKMOVQYmr = 14780 |
| 158995 | CEFBS_None, // VPMASKMOVQYrm = 14781 |
| 158996 | CEFBS_None, // VPMASKMOVQmr = 14782 |
| 158997 | CEFBS_None, // VPMASKMOVQrm = 14783 |
| 158998 | CEFBS_None, // VPMAXSBYrm = 14784 |
| 158999 | CEFBS_None, // VPMAXSBYrr = 14785 |
| 159000 | CEFBS_None, // VPMAXSBZ128rm = 14786 |
| 159001 | CEFBS_None, // VPMAXSBZ128rmk = 14787 |
| 159002 | CEFBS_None, // VPMAXSBZ128rmkz = 14788 |
| 159003 | CEFBS_None, // VPMAXSBZ128rr = 14789 |
| 159004 | CEFBS_None, // VPMAXSBZ128rrk = 14790 |
| 159005 | CEFBS_None, // VPMAXSBZ128rrkz = 14791 |
| 159006 | CEFBS_None, // VPMAXSBZ256rm = 14792 |
| 159007 | CEFBS_None, // VPMAXSBZ256rmk = 14793 |
| 159008 | CEFBS_None, // VPMAXSBZ256rmkz = 14794 |
| 159009 | CEFBS_None, // VPMAXSBZ256rr = 14795 |
| 159010 | CEFBS_None, // VPMAXSBZ256rrk = 14796 |
| 159011 | CEFBS_None, // VPMAXSBZ256rrkz = 14797 |
| 159012 | CEFBS_None, // VPMAXSBZrm = 14798 |
| 159013 | CEFBS_None, // VPMAXSBZrmk = 14799 |
| 159014 | CEFBS_None, // VPMAXSBZrmkz = 14800 |
| 159015 | CEFBS_None, // VPMAXSBZrr = 14801 |
| 159016 | CEFBS_None, // VPMAXSBZrrk = 14802 |
| 159017 | CEFBS_None, // VPMAXSBZrrkz = 14803 |
| 159018 | CEFBS_None, // VPMAXSBrm = 14804 |
| 159019 | CEFBS_None, // VPMAXSBrr = 14805 |
| 159020 | CEFBS_None, // VPMAXSDYrm = 14806 |
| 159021 | CEFBS_None, // VPMAXSDYrr = 14807 |
| 159022 | CEFBS_None, // VPMAXSDZ128rm = 14808 |
| 159023 | CEFBS_None, // VPMAXSDZ128rmb = 14809 |
| 159024 | CEFBS_None, // VPMAXSDZ128rmbk = 14810 |
| 159025 | CEFBS_None, // VPMAXSDZ128rmbkz = 14811 |
| 159026 | CEFBS_None, // VPMAXSDZ128rmk = 14812 |
| 159027 | CEFBS_None, // VPMAXSDZ128rmkz = 14813 |
| 159028 | CEFBS_None, // VPMAXSDZ128rr = 14814 |
| 159029 | CEFBS_None, // VPMAXSDZ128rrk = 14815 |
| 159030 | CEFBS_None, // VPMAXSDZ128rrkz = 14816 |
| 159031 | CEFBS_None, // VPMAXSDZ256rm = 14817 |
| 159032 | CEFBS_None, // VPMAXSDZ256rmb = 14818 |
| 159033 | CEFBS_None, // VPMAXSDZ256rmbk = 14819 |
| 159034 | CEFBS_None, // VPMAXSDZ256rmbkz = 14820 |
| 159035 | CEFBS_None, // VPMAXSDZ256rmk = 14821 |
| 159036 | CEFBS_None, // VPMAXSDZ256rmkz = 14822 |
| 159037 | CEFBS_None, // VPMAXSDZ256rr = 14823 |
| 159038 | CEFBS_None, // VPMAXSDZ256rrk = 14824 |
| 159039 | CEFBS_None, // VPMAXSDZ256rrkz = 14825 |
| 159040 | CEFBS_None, // VPMAXSDZrm = 14826 |
| 159041 | CEFBS_None, // VPMAXSDZrmb = 14827 |
| 159042 | CEFBS_None, // VPMAXSDZrmbk = 14828 |
| 159043 | CEFBS_None, // VPMAXSDZrmbkz = 14829 |
| 159044 | CEFBS_None, // VPMAXSDZrmk = 14830 |
| 159045 | CEFBS_None, // VPMAXSDZrmkz = 14831 |
| 159046 | CEFBS_None, // VPMAXSDZrr = 14832 |
| 159047 | CEFBS_None, // VPMAXSDZrrk = 14833 |
| 159048 | CEFBS_None, // VPMAXSDZrrkz = 14834 |
| 159049 | CEFBS_None, // VPMAXSDrm = 14835 |
| 159050 | CEFBS_None, // VPMAXSDrr = 14836 |
| 159051 | CEFBS_None, // VPMAXSQZ128rm = 14837 |
| 159052 | CEFBS_None, // VPMAXSQZ128rmb = 14838 |
| 159053 | CEFBS_None, // VPMAXSQZ128rmbk = 14839 |
| 159054 | CEFBS_None, // VPMAXSQZ128rmbkz = 14840 |
| 159055 | CEFBS_None, // VPMAXSQZ128rmk = 14841 |
| 159056 | CEFBS_None, // VPMAXSQZ128rmkz = 14842 |
| 159057 | CEFBS_None, // VPMAXSQZ128rr = 14843 |
| 159058 | CEFBS_None, // VPMAXSQZ128rrk = 14844 |
| 159059 | CEFBS_None, // VPMAXSQZ128rrkz = 14845 |
| 159060 | CEFBS_None, // VPMAXSQZ256rm = 14846 |
| 159061 | CEFBS_None, // VPMAXSQZ256rmb = 14847 |
| 159062 | CEFBS_None, // VPMAXSQZ256rmbk = 14848 |
| 159063 | CEFBS_None, // VPMAXSQZ256rmbkz = 14849 |
| 159064 | CEFBS_None, // VPMAXSQZ256rmk = 14850 |
| 159065 | CEFBS_None, // VPMAXSQZ256rmkz = 14851 |
| 159066 | CEFBS_None, // VPMAXSQZ256rr = 14852 |
| 159067 | CEFBS_None, // VPMAXSQZ256rrk = 14853 |
| 159068 | CEFBS_None, // VPMAXSQZ256rrkz = 14854 |
| 159069 | CEFBS_None, // VPMAXSQZrm = 14855 |
| 159070 | CEFBS_None, // VPMAXSQZrmb = 14856 |
| 159071 | CEFBS_None, // VPMAXSQZrmbk = 14857 |
| 159072 | CEFBS_None, // VPMAXSQZrmbkz = 14858 |
| 159073 | CEFBS_None, // VPMAXSQZrmk = 14859 |
| 159074 | CEFBS_None, // VPMAXSQZrmkz = 14860 |
| 159075 | CEFBS_None, // VPMAXSQZrr = 14861 |
| 159076 | CEFBS_None, // VPMAXSQZrrk = 14862 |
| 159077 | CEFBS_None, // VPMAXSQZrrkz = 14863 |
| 159078 | CEFBS_None, // VPMAXSWYrm = 14864 |
| 159079 | CEFBS_None, // VPMAXSWYrr = 14865 |
| 159080 | CEFBS_None, // VPMAXSWZ128rm = 14866 |
| 159081 | CEFBS_None, // VPMAXSWZ128rmk = 14867 |
| 159082 | CEFBS_None, // VPMAXSWZ128rmkz = 14868 |
| 159083 | CEFBS_None, // VPMAXSWZ128rr = 14869 |
| 159084 | CEFBS_None, // VPMAXSWZ128rrk = 14870 |
| 159085 | CEFBS_None, // VPMAXSWZ128rrkz = 14871 |
| 159086 | CEFBS_None, // VPMAXSWZ256rm = 14872 |
| 159087 | CEFBS_None, // VPMAXSWZ256rmk = 14873 |
| 159088 | CEFBS_None, // VPMAXSWZ256rmkz = 14874 |
| 159089 | CEFBS_None, // VPMAXSWZ256rr = 14875 |
| 159090 | CEFBS_None, // VPMAXSWZ256rrk = 14876 |
| 159091 | CEFBS_None, // VPMAXSWZ256rrkz = 14877 |
| 159092 | CEFBS_None, // VPMAXSWZrm = 14878 |
| 159093 | CEFBS_None, // VPMAXSWZrmk = 14879 |
| 159094 | CEFBS_None, // VPMAXSWZrmkz = 14880 |
| 159095 | CEFBS_None, // VPMAXSWZrr = 14881 |
| 159096 | CEFBS_None, // VPMAXSWZrrk = 14882 |
| 159097 | CEFBS_None, // VPMAXSWZrrkz = 14883 |
| 159098 | CEFBS_None, // VPMAXSWrm = 14884 |
| 159099 | CEFBS_None, // VPMAXSWrr = 14885 |
| 159100 | CEFBS_None, // VPMAXUBYrm = 14886 |
| 159101 | CEFBS_None, // VPMAXUBYrr = 14887 |
| 159102 | CEFBS_None, // VPMAXUBZ128rm = 14888 |
| 159103 | CEFBS_None, // VPMAXUBZ128rmk = 14889 |
| 159104 | CEFBS_None, // VPMAXUBZ128rmkz = 14890 |
| 159105 | CEFBS_None, // VPMAXUBZ128rr = 14891 |
| 159106 | CEFBS_None, // VPMAXUBZ128rrk = 14892 |
| 159107 | CEFBS_None, // VPMAXUBZ128rrkz = 14893 |
| 159108 | CEFBS_None, // VPMAXUBZ256rm = 14894 |
| 159109 | CEFBS_None, // VPMAXUBZ256rmk = 14895 |
| 159110 | CEFBS_None, // VPMAXUBZ256rmkz = 14896 |
| 159111 | CEFBS_None, // VPMAXUBZ256rr = 14897 |
| 159112 | CEFBS_None, // VPMAXUBZ256rrk = 14898 |
| 159113 | CEFBS_None, // VPMAXUBZ256rrkz = 14899 |
| 159114 | CEFBS_None, // VPMAXUBZrm = 14900 |
| 159115 | CEFBS_None, // VPMAXUBZrmk = 14901 |
| 159116 | CEFBS_None, // VPMAXUBZrmkz = 14902 |
| 159117 | CEFBS_None, // VPMAXUBZrr = 14903 |
| 159118 | CEFBS_None, // VPMAXUBZrrk = 14904 |
| 159119 | CEFBS_None, // VPMAXUBZrrkz = 14905 |
| 159120 | CEFBS_None, // VPMAXUBrm = 14906 |
| 159121 | CEFBS_None, // VPMAXUBrr = 14907 |
| 159122 | CEFBS_None, // VPMAXUDYrm = 14908 |
| 159123 | CEFBS_None, // VPMAXUDYrr = 14909 |
| 159124 | CEFBS_None, // VPMAXUDZ128rm = 14910 |
| 159125 | CEFBS_None, // VPMAXUDZ128rmb = 14911 |
| 159126 | CEFBS_None, // VPMAXUDZ128rmbk = 14912 |
| 159127 | CEFBS_None, // VPMAXUDZ128rmbkz = 14913 |
| 159128 | CEFBS_None, // VPMAXUDZ128rmk = 14914 |
| 159129 | CEFBS_None, // VPMAXUDZ128rmkz = 14915 |
| 159130 | CEFBS_None, // VPMAXUDZ128rr = 14916 |
| 159131 | CEFBS_None, // VPMAXUDZ128rrk = 14917 |
| 159132 | CEFBS_None, // VPMAXUDZ128rrkz = 14918 |
| 159133 | CEFBS_None, // VPMAXUDZ256rm = 14919 |
| 159134 | CEFBS_None, // VPMAXUDZ256rmb = 14920 |
| 159135 | CEFBS_None, // VPMAXUDZ256rmbk = 14921 |
| 159136 | CEFBS_None, // VPMAXUDZ256rmbkz = 14922 |
| 159137 | CEFBS_None, // VPMAXUDZ256rmk = 14923 |
| 159138 | CEFBS_None, // VPMAXUDZ256rmkz = 14924 |
| 159139 | CEFBS_None, // VPMAXUDZ256rr = 14925 |
| 159140 | CEFBS_None, // VPMAXUDZ256rrk = 14926 |
| 159141 | CEFBS_None, // VPMAXUDZ256rrkz = 14927 |
| 159142 | CEFBS_None, // VPMAXUDZrm = 14928 |
| 159143 | CEFBS_None, // VPMAXUDZrmb = 14929 |
| 159144 | CEFBS_None, // VPMAXUDZrmbk = 14930 |
| 159145 | CEFBS_None, // VPMAXUDZrmbkz = 14931 |
| 159146 | CEFBS_None, // VPMAXUDZrmk = 14932 |
| 159147 | CEFBS_None, // VPMAXUDZrmkz = 14933 |
| 159148 | CEFBS_None, // VPMAXUDZrr = 14934 |
| 159149 | CEFBS_None, // VPMAXUDZrrk = 14935 |
| 159150 | CEFBS_None, // VPMAXUDZrrkz = 14936 |
| 159151 | CEFBS_None, // VPMAXUDrm = 14937 |
| 159152 | CEFBS_None, // VPMAXUDrr = 14938 |
| 159153 | CEFBS_None, // VPMAXUQZ128rm = 14939 |
| 159154 | CEFBS_None, // VPMAXUQZ128rmb = 14940 |
| 159155 | CEFBS_None, // VPMAXUQZ128rmbk = 14941 |
| 159156 | CEFBS_None, // VPMAXUQZ128rmbkz = 14942 |
| 159157 | CEFBS_None, // VPMAXUQZ128rmk = 14943 |
| 159158 | CEFBS_None, // VPMAXUQZ128rmkz = 14944 |
| 159159 | CEFBS_None, // VPMAXUQZ128rr = 14945 |
| 159160 | CEFBS_None, // VPMAXUQZ128rrk = 14946 |
| 159161 | CEFBS_None, // VPMAXUQZ128rrkz = 14947 |
| 159162 | CEFBS_None, // VPMAXUQZ256rm = 14948 |
| 159163 | CEFBS_None, // VPMAXUQZ256rmb = 14949 |
| 159164 | CEFBS_None, // VPMAXUQZ256rmbk = 14950 |
| 159165 | CEFBS_None, // VPMAXUQZ256rmbkz = 14951 |
| 159166 | CEFBS_None, // VPMAXUQZ256rmk = 14952 |
| 159167 | CEFBS_None, // VPMAXUQZ256rmkz = 14953 |
| 159168 | CEFBS_None, // VPMAXUQZ256rr = 14954 |
| 159169 | CEFBS_None, // VPMAXUQZ256rrk = 14955 |
| 159170 | CEFBS_None, // VPMAXUQZ256rrkz = 14956 |
| 159171 | CEFBS_None, // VPMAXUQZrm = 14957 |
| 159172 | CEFBS_None, // VPMAXUQZrmb = 14958 |
| 159173 | CEFBS_None, // VPMAXUQZrmbk = 14959 |
| 159174 | CEFBS_None, // VPMAXUQZrmbkz = 14960 |
| 159175 | CEFBS_None, // VPMAXUQZrmk = 14961 |
| 159176 | CEFBS_None, // VPMAXUQZrmkz = 14962 |
| 159177 | CEFBS_None, // VPMAXUQZrr = 14963 |
| 159178 | CEFBS_None, // VPMAXUQZrrk = 14964 |
| 159179 | CEFBS_None, // VPMAXUQZrrkz = 14965 |
| 159180 | CEFBS_None, // VPMAXUWYrm = 14966 |
| 159181 | CEFBS_None, // VPMAXUWYrr = 14967 |
| 159182 | CEFBS_None, // VPMAXUWZ128rm = 14968 |
| 159183 | CEFBS_None, // VPMAXUWZ128rmk = 14969 |
| 159184 | CEFBS_None, // VPMAXUWZ128rmkz = 14970 |
| 159185 | CEFBS_None, // VPMAXUWZ128rr = 14971 |
| 159186 | CEFBS_None, // VPMAXUWZ128rrk = 14972 |
| 159187 | CEFBS_None, // VPMAXUWZ128rrkz = 14973 |
| 159188 | CEFBS_None, // VPMAXUWZ256rm = 14974 |
| 159189 | CEFBS_None, // VPMAXUWZ256rmk = 14975 |
| 159190 | CEFBS_None, // VPMAXUWZ256rmkz = 14976 |
| 159191 | CEFBS_None, // VPMAXUWZ256rr = 14977 |
| 159192 | CEFBS_None, // VPMAXUWZ256rrk = 14978 |
| 159193 | CEFBS_None, // VPMAXUWZ256rrkz = 14979 |
| 159194 | CEFBS_None, // VPMAXUWZrm = 14980 |
| 159195 | CEFBS_None, // VPMAXUWZrmk = 14981 |
| 159196 | CEFBS_None, // VPMAXUWZrmkz = 14982 |
| 159197 | CEFBS_None, // VPMAXUWZrr = 14983 |
| 159198 | CEFBS_None, // VPMAXUWZrrk = 14984 |
| 159199 | CEFBS_None, // VPMAXUWZrrkz = 14985 |
| 159200 | CEFBS_None, // VPMAXUWrm = 14986 |
| 159201 | CEFBS_None, // VPMAXUWrr = 14987 |
| 159202 | CEFBS_None, // VPMINSBYrm = 14988 |
| 159203 | CEFBS_None, // VPMINSBYrr = 14989 |
| 159204 | CEFBS_None, // VPMINSBZ128rm = 14990 |
| 159205 | CEFBS_None, // VPMINSBZ128rmk = 14991 |
| 159206 | CEFBS_None, // VPMINSBZ128rmkz = 14992 |
| 159207 | CEFBS_None, // VPMINSBZ128rr = 14993 |
| 159208 | CEFBS_None, // VPMINSBZ128rrk = 14994 |
| 159209 | CEFBS_None, // VPMINSBZ128rrkz = 14995 |
| 159210 | CEFBS_None, // VPMINSBZ256rm = 14996 |
| 159211 | CEFBS_None, // VPMINSBZ256rmk = 14997 |
| 159212 | CEFBS_None, // VPMINSBZ256rmkz = 14998 |
| 159213 | CEFBS_None, // VPMINSBZ256rr = 14999 |
| 159214 | CEFBS_None, // VPMINSBZ256rrk = 15000 |
| 159215 | CEFBS_None, // VPMINSBZ256rrkz = 15001 |
| 159216 | CEFBS_None, // VPMINSBZrm = 15002 |
| 159217 | CEFBS_None, // VPMINSBZrmk = 15003 |
| 159218 | CEFBS_None, // VPMINSBZrmkz = 15004 |
| 159219 | CEFBS_None, // VPMINSBZrr = 15005 |
| 159220 | CEFBS_None, // VPMINSBZrrk = 15006 |
| 159221 | CEFBS_None, // VPMINSBZrrkz = 15007 |
| 159222 | CEFBS_None, // VPMINSBrm = 15008 |
| 159223 | CEFBS_None, // VPMINSBrr = 15009 |
| 159224 | CEFBS_None, // VPMINSDYrm = 15010 |
| 159225 | CEFBS_None, // VPMINSDYrr = 15011 |
| 159226 | CEFBS_None, // VPMINSDZ128rm = 15012 |
| 159227 | CEFBS_None, // VPMINSDZ128rmb = 15013 |
| 159228 | CEFBS_None, // VPMINSDZ128rmbk = 15014 |
| 159229 | CEFBS_None, // VPMINSDZ128rmbkz = 15015 |
| 159230 | CEFBS_None, // VPMINSDZ128rmk = 15016 |
| 159231 | CEFBS_None, // VPMINSDZ128rmkz = 15017 |
| 159232 | CEFBS_None, // VPMINSDZ128rr = 15018 |
| 159233 | CEFBS_None, // VPMINSDZ128rrk = 15019 |
| 159234 | CEFBS_None, // VPMINSDZ128rrkz = 15020 |
| 159235 | CEFBS_None, // VPMINSDZ256rm = 15021 |
| 159236 | CEFBS_None, // VPMINSDZ256rmb = 15022 |
| 159237 | CEFBS_None, // VPMINSDZ256rmbk = 15023 |
| 159238 | CEFBS_None, // VPMINSDZ256rmbkz = 15024 |
| 159239 | CEFBS_None, // VPMINSDZ256rmk = 15025 |
| 159240 | CEFBS_None, // VPMINSDZ256rmkz = 15026 |
| 159241 | CEFBS_None, // VPMINSDZ256rr = 15027 |
| 159242 | CEFBS_None, // VPMINSDZ256rrk = 15028 |
| 159243 | CEFBS_None, // VPMINSDZ256rrkz = 15029 |
| 159244 | CEFBS_None, // VPMINSDZrm = 15030 |
| 159245 | CEFBS_None, // VPMINSDZrmb = 15031 |
| 159246 | CEFBS_None, // VPMINSDZrmbk = 15032 |
| 159247 | CEFBS_None, // VPMINSDZrmbkz = 15033 |
| 159248 | CEFBS_None, // VPMINSDZrmk = 15034 |
| 159249 | CEFBS_None, // VPMINSDZrmkz = 15035 |
| 159250 | CEFBS_None, // VPMINSDZrr = 15036 |
| 159251 | CEFBS_None, // VPMINSDZrrk = 15037 |
| 159252 | CEFBS_None, // VPMINSDZrrkz = 15038 |
| 159253 | CEFBS_None, // VPMINSDrm = 15039 |
| 159254 | CEFBS_None, // VPMINSDrr = 15040 |
| 159255 | CEFBS_None, // VPMINSQZ128rm = 15041 |
| 159256 | CEFBS_None, // VPMINSQZ128rmb = 15042 |
| 159257 | CEFBS_None, // VPMINSQZ128rmbk = 15043 |
| 159258 | CEFBS_None, // VPMINSQZ128rmbkz = 15044 |
| 159259 | CEFBS_None, // VPMINSQZ128rmk = 15045 |
| 159260 | CEFBS_None, // VPMINSQZ128rmkz = 15046 |
| 159261 | CEFBS_None, // VPMINSQZ128rr = 15047 |
| 159262 | CEFBS_None, // VPMINSQZ128rrk = 15048 |
| 159263 | CEFBS_None, // VPMINSQZ128rrkz = 15049 |
| 159264 | CEFBS_None, // VPMINSQZ256rm = 15050 |
| 159265 | CEFBS_None, // VPMINSQZ256rmb = 15051 |
| 159266 | CEFBS_None, // VPMINSQZ256rmbk = 15052 |
| 159267 | CEFBS_None, // VPMINSQZ256rmbkz = 15053 |
| 159268 | CEFBS_None, // VPMINSQZ256rmk = 15054 |
| 159269 | CEFBS_None, // VPMINSQZ256rmkz = 15055 |
| 159270 | CEFBS_None, // VPMINSQZ256rr = 15056 |
| 159271 | CEFBS_None, // VPMINSQZ256rrk = 15057 |
| 159272 | CEFBS_None, // VPMINSQZ256rrkz = 15058 |
| 159273 | CEFBS_None, // VPMINSQZrm = 15059 |
| 159274 | CEFBS_None, // VPMINSQZrmb = 15060 |
| 159275 | CEFBS_None, // VPMINSQZrmbk = 15061 |
| 159276 | CEFBS_None, // VPMINSQZrmbkz = 15062 |
| 159277 | CEFBS_None, // VPMINSQZrmk = 15063 |
| 159278 | CEFBS_None, // VPMINSQZrmkz = 15064 |
| 159279 | CEFBS_None, // VPMINSQZrr = 15065 |
| 159280 | CEFBS_None, // VPMINSQZrrk = 15066 |
| 159281 | CEFBS_None, // VPMINSQZrrkz = 15067 |
| 159282 | CEFBS_None, // VPMINSWYrm = 15068 |
| 159283 | CEFBS_None, // VPMINSWYrr = 15069 |
| 159284 | CEFBS_None, // VPMINSWZ128rm = 15070 |
| 159285 | CEFBS_None, // VPMINSWZ128rmk = 15071 |
| 159286 | CEFBS_None, // VPMINSWZ128rmkz = 15072 |
| 159287 | CEFBS_None, // VPMINSWZ128rr = 15073 |
| 159288 | CEFBS_None, // VPMINSWZ128rrk = 15074 |
| 159289 | CEFBS_None, // VPMINSWZ128rrkz = 15075 |
| 159290 | CEFBS_None, // VPMINSWZ256rm = 15076 |
| 159291 | CEFBS_None, // VPMINSWZ256rmk = 15077 |
| 159292 | CEFBS_None, // VPMINSWZ256rmkz = 15078 |
| 159293 | CEFBS_None, // VPMINSWZ256rr = 15079 |
| 159294 | CEFBS_None, // VPMINSWZ256rrk = 15080 |
| 159295 | CEFBS_None, // VPMINSWZ256rrkz = 15081 |
| 159296 | CEFBS_None, // VPMINSWZrm = 15082 |
| 159297 | CEFBS_None, // VPMINSWZrmk = 15083 |
| 159298 | CEFBS_None, // VPMINSWZrmkz = 15084 |
| 159299 | CEFBS_None, // VPMINSWZrr = 15085 |
| 159300 | CEFBS_None, // VPMINSWZrrk = 15086 |
| 159301 | CEFBS_None, // VPMINSWZrrkz = 15087 |
| 159302 | CEFBS_None, // VPMINSWrm = 15088 |
| 159303 | CEFBS_None, // VPMINSWrr = 15089 |
| 159304 | CEFBS_None, // VPMINUBYrm = 15090 |
| 159305 | CEFBS_None, // VPMINUBYrr = 15091 |
| 159306 | CEFBS_None, // VPMINUBZ128rm = 15092 |
| 159307 | CEFBS_None, // VPMINUBZ128rmk = 15093 |
| 159308 | CEFBS_None, // VPMINUBZ128rmkz = 15094 |
| 159309 | CEFBS_None, // VPMINUBZ128rr = 15095 |
| 159310 | CEFBS_None, // VPMINUBZ128rrk = 15096 |
| 159311 | CEFBS_None, // VPMINUBZ128rrkz = 15097 |
| 159312 | CEFBS_None, // VPMINUBZ256rm = 15098 |
| 159313 | CEFBS_None, // VPMINUBZ256rmk = 15099 |
| 159314 | CEFBS_None, // VPMINUBZ256rmkz = 15100 |
| 159315 | CEFBS_None, // VPMINUBZ256rr = 15101 |
| 159316 | CEFBS_None, // VPMINUBZ256rrk = 15102 |
| 159317 | CEFBS_None, // VPMINUBZ256rrkz = 15103 |
| 159318 | CEFBS_None, // VPMINUBZrm = 15104 |
| 159319 | CEFBS_None, // VPMINUBZrmk = 15105 |
| 159320 | CEFBS_None, // VPMINUBZrmkz = 15106 |
| 159321 | CEFBS_None, // VPMINUBZrr = 15107 |
| 159322 | CEFBS_None, // VPMINUBZrrk = 15108 |
| 159323 | CEFBS_None, // VPMINUBZrrkz = 15109 |
| 159324 | CEFBS_None, // VPMINUBrm = 15110 |
| 159325 | CEFBS_None, // VPMINUBrr = 15111 |
| 159326 | CEFBS_None, // VPMINUDYrm = 15112 |
| 159327 | CEFBS_None, // VPMINUDYrr = 15113 |
| 159328 | CEFBS_None, // VPMINUDZ128rm = 15114 |
| 159329 | CEFBS_None, // VPMINUDZ128rmb = 15115 |
| 159330 | CEFBS_None, // VPMINUDZ128rmbk = 15116 |
| 159331 | CEFBS_None, // VPMINUDZ128rmbkz = 15117 |
| 159332 | CEFBS_None, // VPMINUDZ128rmk = 15118 |
| 159333 | CEFBS_None, // VPMINUDZ128rmkz = 15119 |
| 159334 | CEFBS_None, // VPMINUDZ128rr = 15120 |
| 159335 | CEFBS_None, // VPMINUDZ128rrk = 15121 |
| 159336 | CEFBS_None, // VPMINUDZ128rrkz = 15122 |
| 159337 | CEFBS_None, // VPMINUDZ256rm = 15123 |
| 159338 | CEFBS_None, // VPMINUDZ256rmb = 15124 |
| 159339 | CEFBS_None, // VPMINUDZ256rmbk = 15125 |
| 159340 | CEFBS_None, // VPMINUDZ256rmbkz = 15126 |
| 159341 | CEFBS_None, // VPMINUDZ256rmk = 15127 |
| 159342 | CEFBS_None, // VPMINUDZ256rmkz = 15128 |
| 159343 | CEFBS_None, // VPMINUDZ256rr = 15129 |
| 159344 | CEFBS_None, // VPMINUDZ256rrk = 15130 |
| 159345 | CEFBS_None, // VPMINUDZ256rrkz = 15131 |
| 159346 | CEFBS_None, // VPMINUDZrm = 15132 |
| 159347 | CEFBS_None, // VPMINUDZrmb = 15133 |
| 159348 | CEFBS_None, // VPMINUDZrmbk = 15134 |
| 159349 | CEFBS_None, // VPMINUDZrmbkz = 15135 |
| 159350 | CEFBS_None, // VPMINUDZrmk = 15136 |
| 159351 | CEFBS_None, // VPMINUDZrmkz = 15137 |
| 159352 | CEFBS_None, // VPMINUDZrr = 15138 |
| 159353 | CEFBS_None, // VPMINUDZrrk = 15139 |
| 159354 | CEFBS_None, // VPMINUDZrrkz = 15140 |
| 159355 | CEFBS_None, // VPMINUDrm = 15141 |
| 159356 | CEFBS_None, // VPMINUDrr = 15142 |
| 159357 | CEFBS_None, // VPMINUQZ128rm = 15143 |
| 159358 | CEFBS_None, // VPMINUQZ128rmb = 15144 |
| 159359 | CEFBS_None, // VPMINUQZ128rmbk = 15145 |
| 159360 | CEFBS_None, // VPMINUQZ128rmbkz = 15146 |
| 159361 | CEFBS_None, // VPMINUQZ128rmk = 15147 |
| 159362 | CEFBS_None, // VPMINUQZ128rmkz = 15148 |
| 159363 | CEFBS_None, // VPMINUQZ128rr = 15149 |
| 159364 | CEFBS_None, // VPMINUQZ128rrk = 15150 |
| 159365 | CEFBS_None, // VPMINUQZ128rrkz = 15151 |
| 159366 | CEFBS_None, // VPMINUQZ256rm = 15152 |
| 159367 | CEFBS_None, // VPMINUQZ256rmb = 15153 |
| 159368 | CEFBS_None, // VPMINUQZ256rmbk = 15154 |
| 159369 | CEFBS_None, // VPMINUQZ256rmbkz = 15155 |
| 159370 | CEFBS_None, // VPMINUQZ256rmk = 15156 |
| 159371 | CEFBS_None, // VPMINUQZ256rmkz = 15157 |
| 159372 | CEFBS_None, // VPMINUQZ256rr = 15158 |
| 159373 | CEFBS_None, // VPMINUQZ256rrk = 15159 |
| 159374 | CEFBS_None, // VPMINUQZ256rrkz = 15160 |
| 159375 | CEFBS_None, // VPMINUQZrm = 15161 |
| 159376 | CEFBS_None, // VPMINUQZrmb = 15162 |
| 159377 | CEFBS_None, // VPMINUQZrmbk = 15163 |
| 159378 | CEFBS_None, // VPMINUQZrmbkz = 15164 |
| 159379 | CEFBS_None, // VPMINUQZrmk = 15165 |
| 159380 | CEFBS_None, // VPMINUQZrmkz = 15166 |
| 159381 | CEFBS_None, // VPMINUQZrr = 15167 |
| 159382 | CEFBS_None, // VPMINUQZrrk = 15168 |
| 159383 | CEFBS_None, // VPMINUQZrrkz = 15169 |
| 159384 | CEFBS_None, // VPMINUWYrm = 15170 |
| 159385 | CEFBS_None, // VPMINUWYrr = 15171 |
| 159386 | CEFBS_None, // VPMINUWZ128rm = 15172 |
| 159387 | CEFBS_None, // VPMINUWZ128rmk = 15173 |
| 159388 | CEFBS_None, // VPMINUWZ128rmkz = 15174 |
| 159389 | CEFBS_None, // VPMINUWZ128rr = 15175 |
| 159390 | CEFBS_None, // VPMINUWZ128rrk = 15176 |
| 159391 | CEFBS_None, // VPMINUWZ128rrkz = 15177 |
| 159392 | CEFBS_None, // VPMINUWZ256rm = 15178 |
| 159393 | CEFBS_None, // VPMINUWZ256rmk = 15179 |
| 159394 | CEFBS_None, // VPMINUWZ256rmkz = 15180 |
| 159395 | CEFBS_None, // VPMINUWZ256rr = 15181 |
| 159396 | CEFBS_None, // VPMINUWZ256rrk = 15182 |
| 159397 | CEFBS_None, // VPMINUWZ256rrkz = 15183 |
| 159398 | CEFBS_None, // VPMINUWZrm = 15184 |
| 159399 | CEFBS_None, // VPMINUWZrmk = 15185 |
| 159400 | CEFBS_None, // VPMINUWZrmkz = 15186 |
| 159401 | CEFBS_None, // VPMINUWZrr = 15187 |
| 159402 | CEFBS_None, // VPMINUWZrrk = 15188 |
| 159403 | CEFBS_None, // VPMINUWZrrkz = 15189 |
| 159404 | CEFBS_None, // VPMINUWrm = 15190 |
| 159405 | CEFBS_None, // VPMINUWrr = 15191 |
| 159406 | CEFBS_None, // VPMOVB2MZ128rr = 15192 |
| 159407 | CEFBS_None, // VPMOVB2MZ256rr = 15193 |
| 159408 | CEFBS_None, // VPMOVB2MZrr = 15194 |
| 159409 | CEFBS_None, // VPMOVD2MZ128rr = 15195 |
| 159410 | CEFBS_None, // VPMOVD2MZ256rr = 15196 |
| 159411 | CEFBS_None, // VPMOVD2MZrr = 15197 |
| 159412 | CEFBS_None, // VPMOVDBZ128mr = 15198 |
| 159413 | CEFBS_None, // VPMOVDBZ128mrk = 15199 |
| 159414 | CEFBS_None, // VPMOVDBZ128rr = 15200 |
| 159415 | CEFBS_None, // VPMOVDBZ128rrk = 15201 |
| 159416 | CEFBS_None, // VPMOVDBZ128rrkz = 15202 |
| 159417 | CEFBS_None, // VPMOVDBZ256mr = 15203 |
| 159418 | CEFBS_None, // VPMOVDBZ256mrk = 15204 |
| 159419 | CEFBS_None, // VPMOVDBZ256rr = 15205 |
| 159420 | CEFBS_None, // VPMOVDBZ256rrk = 15206 |
| 159421 | CEFBS_None, // VPMOVDBZ256rrkz = 15207 |
| 159422 | CEFBS_None, // VPMOVDBZmr = 15208 |
| 159423 | CEFBS_None, // VPMOVDBZmrk = 15209 |
| 159424 | CEFBS_None, // VPMOVDBZrr = 15210 |
| 159425 | CEFBS_None, // VPMOVDBZrrk = 15211 |
| 159426 | CEFBS_None, // VPMOVDBZrrkz = 15212 |
| 159427 | CEFBS_None, // VPMOVDWZ128mr = 15213 |
| 159428 | CEFBS_None, // VPMOVDWZ128mrk = 15214 |
| 159429 | CEFBS_None, // VPMOVDWZ128rr = 15215 |
| 159430 | CEFBS_None, // VPMOVDWZ128rrk = 15216 |
| 159431 | CEFBS_None, // VPMOVDWZ128rrkz = 15217 |
| 159432 | CEFBS_None, // VPMOVDWZ256mr = 15218 |
| 159433 | CEFBS_None, // VPMOVDWZ256mrk = 15219 |
| 159434 | CEFBS_None, // VPMOVDWZ256rr = 15220 |
| 159435 | CEFBS_None, // VPMOVDWZ256rrk = 15221 |
| 159436 | CEFBS_None, // VPMOVDWZ256rrkz = 15222 |
| 159437 | CEFBS_None, // VPMOVDWZmr = 15223 |
| 159438 | CEFBS_None, // VPMOVDWZmrk = 15224 |
| 159439 | CEFBS_None, // VPMOVDWZrr = 15225 |
| 159440 | CEFBS_None, // VPMOVDWZrrk = 15226 |
| 159441 | CEFBS_None, // VPMOVDWZrrkz = 15227 |
| 159442 | CEFBS_None, // VPMOVM2BZ128rr = 15228 |
| 159443 | CEFBS_None, // VPMOVM2BZ256rr = 15229 |
| 159444 | CEFBS_None, // VPMOVM2BZrr = 15230 |
| 159445 | CEFBS_None, // VPMOVM2DZ128rr = 15231 |
| 159446 | CEFBS_None, // VPMOVM2DZ256rr = 15232 |
| 159447 | CEFBS_None, // VPMOVM2DZrr = 15233 |
| 159448 | CEFBS_None, // VPMOVM2QZ128rr = 15234 |
| 159449 | CEFBS_None, // VPMOVM2QZ256rr = 15235 |
| 159450 | CEFBS_None, // VPMOVM2QZrr = 15236 |
| 159451 | CEFBS_None, // VPMOVM2WZ128rr = 15237 |
| 159452 | CEFBS_None, // VPMOVM2WZ256rr = 15238 |
| 159453 | CEFBS_None, // VPMOVM2WZrr = 15239 |
| 159454 | CEFBS_None, // VPMOVMSKBYrr = 15240 |
| 159455 | CEFBS_None, // VPMOVMSKBrr = 15241 |
| 159456 | CEFBS_None, // VPMOVQ2MZ128rr = 15242 |
| 159457 | CEFBS_None, // VPMOVQ2MZ256rr = 15243 |
| 159458 | CEFBS_None, // VPMOVQ2MZrr = 15244 |
| 159459 | CEFBS_None, // VPMOVQBZ128mr = 15245 |
| 159460 | CEFBS_None, // VPMOVQBZ128mrk = 15246 |
| 159461 | CEFBS_None, // VPMOVQBZ128rr = 15247 |
| 159462 | CEFBS_None, // VPMOVQBZ128rrk = 15248 |
| 159463 | CEFBS_None, // VPMOVQBZ128rrkz = 15249 |
| 159464 | CEFBS_None, // VPMOVQBZ256mr = 15250 |
| 159465 | CEFBS_None, // VPMOVQBZ256mrk = 15251 |
| 159466 | CEFBS_None, // VPMOVQBZ256rr = 15252 |
| 159467 | CEFBS_None, // VPMOVQBZ256rrk = 15253 |
| 159468 | CEFBS_None, // VPMOVQBZ256rrkz = 15254 |
| 159469 | CEFBS_None, // VPMOVQBZmr = 15255 |
| 159470 | CEFBS_None, // VPMOVQBZmrk = 15256 |
| 159471 | CEFBS_None, // VPMOVQBZrr = 15257 |
| 159472 | CEFBS_None, // VPMOVQBZrrk = 15258 |
| 159473 | CEFBS_None, // VPMOVQBZrrkz = 15259 |
| 159474 | CEFBS_None, // VPMOVQDZ128mr = 15260 |
| 159475 | CEFBS_None, // VPMOVQDZ128mrk = 15261 |
| 159476 | CEFBS_None, // VPMOVQDZ128rr = 15262 |
| 159477 | CEFBS_None, // VPMOVQDZ128rrk = 15263 |
| 159478 | CEFBS_None, // VPMOVQDZ128rrkz = 15264 |
| 159479 | CEFBS_None, // VPMOVQDZ256mr = 15265 |
| 159480 | CEFBS_None, // VPMOVQDZ256mrk = 15266 |
| 159481 | CEFBS_None, // VPMOVQDZ256rr = 15267 |
| 159482 | CEFBS_None, // VPMOVQDZ256rrk = 15268 |
| 159483 | CEFBS_None, // VPMOVQDZ256rrkz = 15269 |
| 159484 | CEFBS_None, // VPMOVQDZmr = 15270 |
| 159485 | CEFBS_None, // VPMOVQDZmrk = 15271 |
| 159486 | CEFBS_None, // VPMOVQDZrr = 15272 |
| 159487 | CEFBS_None, // VPMOVQDZrrk = 15273 |
| 159488 | CEFBS_None, // VPMOVQDZrrkz = 15274 |
| 159489 | CEFBS_None, // VPMOVQWZ128mr = 15275 |
| 159490 | CEFBS_None, // VPMOVQWZ128mrk = 15276 |
| 159491 | CEFBS_None, // VPMOVQWZ128rr = 15277 |
| 159492 | CEFBS_None, // VPMOVQWZ128rrk = 15278 |
| 159493 | CEFBS_None, // VPMOVQWZ128rrkz = 15279 |
| 159494 | CEFBS_None, // VPMOVQWZ256mr = 15280 |
| 159495 | CEFBS_None, // VPMOVQWZ256mrk = 15281 |
| 159496 | CEFBS_None, // VPMOVQWZ256rr = 15282 |
| 159497 | CEFBS_None, // VPMOVQWZ256rrk = 15283 |
| 159498 | CEFBS_None, // VPMOVQWZ256rrkz = 15284 |
| 159499 | CEFBS_None, // VPMOVQWZmr = 15285 |
| 159500 | CEFBS_None, // VPMOVQWZmrk = 15286 |
| 159501 | CEFBS_None, // VPMOVQWZrr = 15287 |
| 159502 | CEFBS_None, // VPMOVQWZrrk = 15288 |
| 159503 | CEFBS_None, // VPMOVQWZrrkz = 15289 |
| 159504 | CEFBS_None, // VPMOVSDBZ128mr = 15290 |
| 159505 | CEFBS_None, // VPMOVSDBZ128mrk = 15291 |
| 159506 | CEFBS_None, // VPMOVSDBZ128rr = 15292 |
| 159507 | CEFBS_None, // VPMOVSDBZ128rrk = 15293 |
| 159508 | CEFBS_None, // VPMOVSDBZ128rrkz = 15294 |
| 159509 | CEFBS_None, // VPMOVSDBZ256mr = 15295 |
| 159510 | CEFBS_None, // VPMOVSDBZ256mrk = 15296 |
| 159511 | CEFBS_None, // VPMOVSDBZ256rr = 15297 |
| 159512 | CEFBS_None, // VPMOVSDBZ256rrk = 15298 |
| 159513 | CEFBS_None, // VPMOVSDBZ256rrkz = 15299 |
| 159514 | CEFBS_None, // VPMOVSDBZmr = 15300 |
| 159515 | CEFBS_None, // VPMOVSDBZmrk = 15301 |
| 159516 | CEFBS_None, // VPMOVSDBZrr = 15302 |
| 159517 | CEFBS_None, // VPMOVSDBZrrk = 15303 |
| 159518 | CEFBS_None, // VPMOVSDBZrrkz = 15304 |
| 159519 | CEFBS_None, // VPMOVSDWZ128mr = 15305 |
| 159520 | CEFBS_None, // VPMOVSDWZ128mrk = 15306 |
| 159521 | CEFBS_None, // VPMOVSDWZ128rr = 15307 |
| 159522 | CEFBS_None, // VPMOVSDWZ128rrk = 15308 |
| 159523 | CEFBS_None, // VPMOVSDWZ128rrkz = 15309 |
| 159524 | CEFBS_None, // VPMOVSDWZ256mr = 15310 |
| 159525 | CEFBS_None, // VPMOVSDWZ256mrk = 15311 |
| 159526 | CEFBS_None, // VPMOVSDWZ256rr = 15312 |
| 159527 | CEFBS_None, // VPMOVSDWZ256rrk = 15313 |
| 159528 | CEFBS_None, // VPMOVSDWZ256rrkz = 15314 |
| 159529 | CEFBS_None, // VPMOVSDWZmr = 15315 |
| 159530 | CEFBS_None, // VPMOVSDWZmrk = 15316 |
| 159531 | CEFBS_None, // VPMOVSDWZrr = 15317 |
| 159532 | CEFBS_None, // VPMOVSDWZrrk = 15318 |
| 159533 | CEFBS_None, // VPMOVSDWZrrkz = 15319 |
| 159534 | CEFBS_None, // VPMOVSQBZ128mr = 15320 |
| 159535 | CEFBS_None, // VPMOVSQBZ128mrk = 15321 |
| 159536 | CEFBS_None, // VPMOVSQBZ128rr = 15322 |
| 159537 | CEFBS_None, // VPMOVSQBZ128rrk = 15323 |
| 159538 | CEFBS_None, // VPMOVSQBZ128rrkz = 15324 |
| 159539 | CEFBS_None, // VPMOVSQBZ256mr = 15325 |
| 159540 | CEFBS_None, // VPMOVSQBZ256mrk = 15326 |
| 159541 | CEFBS_None, // VPMOVSQBZ256rr = 15327 |
| 159542 | CEFBS_None, // VPMOVSQBZ256rrk = 15328 |
| 159543 | CEFBS_None, // VPMOVSQBZ256rrkz = 15329 |
| 159544 | CEFBS_None, // VPMOVSQBZmr = 15330 |
| 159545 | CEFBS_None, // VPMOVSQBZmrk = 15331 |
| 159546 | CEFBS_None, // VPMOVSQBZrr = 15332 |
| 159547 | CEFBS_None, // VPMOVSQBZrrk = 15333 |
| 159548 | CEFBS_None, // VPMOVSQBZrrkz = 15334 |
| 159549 | CEFBS_None, // VPMOVSQDZ128mr = 15335 |
| 159550 | CEFBS_None, // VPMOVSQDZ128mrk = 15336 |
| 159551 | CEFBS_None, // VPMOVSQDZ128rr = 15337 |
| 159552 | CEFBS_None, // VPMOVSQDZ128rrk = 15338 |
| 159553 | CEFBS_None, // VPMOVSQDZ128rrkz = 15339 |
| 159554 | CEFBS_None, // VPMOVSQDZ256mr = 15340 |
| 159555 | CEFBS_None, // VPMOVSQDZ256mrk = 15341 |
| 159556 | CEFBS_None, // VPMOVSQDZ256rr = 15342 |
| 159557 | CEFBS_None, // VPMOVSQDZ256rrk = 15343 |
| 159558 | CEFBS_None, // VPMOVSQDZ256rrkz = 15344 |
| 159559 | CEFBS_None, // VPMOVSQDZmr = 15345 |
| 159560 | CEFBS_None, // VPMOVSQDZmrk = 15346 |
| 159561 | CEFBS_None, // VPMOVSQDZrr = 15347 |
| 159562 | CEFBS_None, // VPMOVSQDZrrk = 15348 |
| 159563 | CEFBS_None, // VPMOVSQDZrrkz = 15349 |
| 159564 | CEFBS_None, // VPMOVSQWZ128mr = 15350 |
| 159565 | CEFBS_None, // VPMOVSQWZ128mrk = 15351 |
| 159566 | CEFBS_None, // VPMOVSQWZ128rr = 15352 |
| 159567 | CEFBS_None, // VPMOVSQWZ128rrk = 15353 |
| 159568 | CEFBS_None, // VPMOVSQWZ128rrkz = 15354 |
| 159569 | CEFBS_None, // VPMOVSQWZ256mr = 15355 |
| 159570 | CEFBS_None, // VPMOVSQWZ256mrk = 15356 |
| 159571 | CEFBS_None, // VPMOVSQWZ256rr = 15357 |
| 159572 | CEFBS_None, // VPMOVSQWZ256rrk = 15358 |
| 159573 | CEFBS_None, // VPMOVSQWZ256rrkz = 15359 |
| 159574 | CEFBS_None, // VPMOVSQWZmr = 15360 |
| 159575 | CEFBS_None, // VPMOVSQWZmrk = 15361 |
| 159576 | CEFBS_None, // VPMOVSQWZrr = 15362 |
| 159577 | CEFBS_None, // VPMOVSQWZrrk = 15363 |
| 159578 | CEFBS_None, // VPMOVSQWZrrkz = 15364 |
| 159579 | CEFBS_None, // VPMOVSWBZ128mr = 15365 |
| 159580 | CEFBS_None, // VPMOVSWBZ128mrk = 15366 |
| 159581 | CEFBS_None, // VPMOVSWBZ128rr = 15367 |
| 159582 | CEFBS_None, // VPMOVSWBZ128rrk = 15368 |
| 159583 | CEFBS_None, // VPMOVSWBZ128rrkz = 15369 |
| 159584 | CEFBS_None, // VPMOVSWBZ256mr = 15370 |
| 159585 | CEFBS_None, // VPMOVSWBZ256mrk = 15371 |
| 159586 | CEFBS_None, // VPMOVSWBZ256rr = 15372 |
| 159587 | CEFBS_None, // VPMOVSWBZ256rrk = 15373 |
| 159588 | CEFBS_None, // VPMOVSWBZ256rrkz = 15374 |
| 159589 | CEFBS_None, // VPMOVSWBZmr = 15375 |
| 159590 | CEFBS_None, // VPMOVSWBZmrk = 15376 |
| 159591 | CEFBS_None, // VPMOVSWBZrr = 15377 |
| 159592 | CEFBS_None, // VPMOVSWBZrrk = 15378 |
| 159593 | CEFBS_None, // VPMOVSWBZrrkz = 15379 |
| 159594 | CEFBS_None, // VPMOVSXBDYrm = 15380 |
| 159595 | CEFBS_None, // VPMOVSXBDYrr = 15381 |
| 159596 | CEFBS_None, // VPMOVSXBDZ128rm = 15382 |
| 159597 | CEFBS_None, // VPMOVSXBDZ128rmk = 15383 |
| 159598 | CEFBS_None, // VPMOVSXBDZ128rmkz = 15384 |
| 159599 | CEFBS_None, // VPMOVSXBDZ128rr = 15385 |
| 159600 | CEFBS_None, // VPMOVSXBDZ128rrk = 15386 |
| 159601 | CEFBS_None, // VPMOVSXBDZ128rrkz = 15387 |
| 159602 | CEFBS_None, // VPMOVSXBDZ256rm = 15388 |
| 159603 | CEFBS_None, // VPMOVSXBDZ256rmk = 15389 |
| 159604 | CEFBS_None, // VPMOVSXBDZ256rmkz = 15390 |
| 159605 | CEFBS_None, // VPMOVSXBDZ256rr = 15391 |
| 159606 | CEFBS_None, // VPMOVSXBDZ256rrk = 15392 |
| 159607 | CEFBS_None, // VPMOVSXBDZ256rrkz = 15393 |
| 159608 | CEFBS_None, // VPMOVSXBDZrm = 15394 |
| 159609 | CEFBS_None, // VPMOVSXBDZrmk = 15395 |
| 159610 | CEFBS_None, // VPMOVSXBDZrmkz = 15396 |
| 159611 | CEFBS_None, // VPMOVSXBDZrr = 15397 |
| 159612 | CEFBS_None, // VPMOVSXBDZrrk = 15398 |
| 159613 | CEFBS_None, // VPMOVSXBDZrrkz = 15399 |
| 159614 | CEFBS_None, // VPMOVSXBDrm = 15400 |
| 159615 | CEFBS_None, // VPMOVSXBDrr = 15401 |
| 159616 | CEFBS_None, // VPMOVSXBQYrm = 15402 |
| 159617 | CEFBS_None, // VPMOVSXBQYrr = 15403 |
| 159618 | CEFBS_None, // VPMOVSXBQZ128rm = 15404 |
| 159619 | CEFBS_None, // VPMOVSXBQZ128rmk = 15405 |
| 159620 | CEFBS_None, // VPMOVSXBQZ128rmkz = 15406 |
| 159621 | CEFBS_None, // VPMOVSXBQZ128rr = 15407 |
| 159622 | CEFBS_None, // VPMOVSXBQZ128rrk = 15408 |
| 159623 | CEFBS_None, // VPMOVSXBQZ128rrkz = 15409 |
| 159624 | CEFBS_None, // VPMOVSXBQZ256rm = 15410 |
| 159625 | CEFBS_None, // VPMOVSXBQZ256rmk = 15411 |
| 159626 | CEFBS_None, // VPMOVSXBQZ256rmkz = 15412 |
| 159627 | CEFBS_None, // VPMOVSXBQZ256rr = 15413 |
| 159628 | CEFBS_None, // VPMOVSXBQZ256rrk = 15414 |
| 159629 | CEFBS_None, // VPMOVSXBQZ256rrkz = 15415 |
| 159630 | CEFBS_None, // VPMOVSXBQZrm = 15416 |
| 159631 | CEFBS_None, // VPMOVSXBQZrmk = 15417 |
| 159632 | CEFBS_None, // VPMOVSXBQZrmkz = 15418 |
| 159633 | CEFBS_None, // VPMOVSXBQZrr = 15419 |
| 159634 | CEFBS_None, // VPMOVSXBQZrrk = 15420 |
| 159635 | CEFBS_None, // VPMOVSXBQZrrkz = 15421 |
| 159636 | CEFBS_None, // VPMOVSXBQrm = 15422 |
| 159637 | CEFBS_None, // VPMOVSXBQrr = 15423 |
| 159638 | CEFBS_None, // VPMOVSXBWYrm = 15424 |
| 159639 | CEFBS_None, // VPMOVSXBWYrr = 15425 |
| 159640 | CEFBS_None, // VPMOVSXBWZ128rm = 15426 |
| 159641 | CEFBS_None, // VPMOVSXBWZ128rmk = 15427 |
| 159642 | CEFBS_None, // VPMOVSXBWZ128rmkz = 15428 |
| 159643 | CEFBS_None, // VPMOVSXBWZ128rr = 15429 |
| 159644 | CEFBS_None, // VPMOVSXBWZ128rrk = 15430 |
| 159645 | CEFBS_None, // VPMOVSXBWZ128rrkz = 15431 |
| 159646 | CEFBS_None, // VPMOVSXBWZ256rm = 15432 |
| 159647 | CEFBS_None, // VPMOVSXBWZ256rmk = 15433 |
| 159648 | CEFBS_None, // VPMOVSXBWZ256rmkz = 15434 |
| 159649 | CEFBS_None, // VPMOVSXBWZ256rr = 15435 |
| 159650 | CEFBS_None, // VPMOVSXBWZ256rrk = 15436 |
| 159651 | CEFBS_None, // VPMOVSXBWZ256rrkz = 15437 |
| 159652 | CEFBS_None, // VPMOVSXBWZrm = 15438 |
| 159653 | CEFBS_None, // VPMOVSXBWZrmk = 15439 |
| 159654 | CEFBS_None, // VPMOVSXBWZrmkz = 15440 |
| 159655 | CEFBS_None, // VPMOVSXBWZrr = 15441 |
| 159656 | CEFBS_None, // VPMOVSXBWZrrk = 15442 |
| 159657 | CEFBS_None, // VPMOVSXBWZrrkz = 15443 |
| 159658 | CEFBS_None, // VPMOVSXBWrm = 15444 |
| 159659 | CEFBS_None, // VPMOVSXBWrr = 15445 |
| 159660 | CEFBS_None, // VPMOVSXDQYrm = 15446 |
| 159661 | CEFBS_None, // VPMOVSXDQYrr = 15447 |
| 159662 | CEFBS_None, // VPMOVSXDQZ128rm = 15448 |
| 159663 | CEFBS_None, // VPMOVSXDQZ128rmk = 15449 |
| 159664 | CEFBS_None, // VPMOVSXDQZ128rmkz = 15450 |
| 159665 | CEFBS_None, // VPMOVSXDQZ128rr = 15451 |
| 159666 | CEFBS_None, // VPMOVSXDQZ128rrk = 15452 |
| 159667 | CEFBS_None, // VPMOVSXDQZ128rrkz = 15453 |
| 159668 | CEFBS_None, // VPMOVSXDQZ256rm = 15454 |
| 159669 | CEFBS_None, // VPMOVSXDQZ256rmk = 15455 |
| 159670 | CEFBS_None, // VPMOVSXDQZ256rmkz = 15456 |
| 159671 | CEFBS_None, // VPMOVSXDQZ256rr = 15457 |
| 159672 | CEFBS_None, // VPMOVSXDQZ256rrk = 15458 |
| 159673 | CEFBS_None, // VPMOVSXDQZ256rrkz = 15459 |
| 159674 | CEFBS_None, // VPMOVSXDQZrm = 15460 |
| 159675 | CEFBS_None, // VPMOVSXDQZrmk = 15461 |
| 159676 | CEFBS_None, // VPMOVSXDQZrmkz = 15462 |
| 159677 | CEFBS_None, // VPMOVSXDQZrr = 15463 |
| 159678 | CEFBS_None, // VPMOVSXDQZrrk = 15464 |
| 159679 | CEFBS_None, // VPMOVSXDQZrrkz = 15465 |
| 159680 | CEFBS_None, // VPMOVSXDQrm = 15466 |
| 159681 | CEFBS_None, // VPMOVSXDQrr = 15467 |
| 159682 | CEFBS_None, // VPMOVSXWDYrm = 15468 |
| 159683 | CEFBS_None, // VPMOVSXWDYrr = 15469 |
| 159684 | CEFBS_None, // VPMOVSXWDZ128rm = 15470 |
| 159685 | CEFBS_None, // VPMOVSXWDZ128rmk = 15471 |
| 159686 | CEFBS_None, // VPMOVSXWDZ128rmkz = 15472 |
| 159687 | CEFBS_None, // VPMOVSXWDZ128rr = 15473 |
| 159688 | CEFBS_None, // VPMOVSXWDZ128rrk = 15474 |
| 159689 | CEFBS_None, // VPMOVSXWDZ128rrkz = 15475 |
| 159690 | CEFBS_None, // VPMOVSXWDZ256rm = 15476 |
| 159691 | CEFBS_None, // VPMOVSXWDZ256rmk = 15477 |
| 159692 | CEFBS_None, // VPMOVSXWDZ256rmkz = 15478 |
| 159693 | CEFBS_None, // VPMOVSXWDZ256rr = 15479 |
| 159694 | CEFBS_None, // VPMOVSXWDZ256rrk = 15480 |
| 159695 | CEFBS_None, // VPMOVSXWDZ256rrkz = 15481 |
| 159696 | CEFBS_None, // VPMOVSXWDZrm = 15482 |
| 159697 | CEFBS_None, // VPMOVSXWDZrmk = 15483 |
| 159698 | CEFBS_None, // VPMOVSXWDZrmkz = 15484 |
| 159699 | CEFBS_None, // VPMOVSXWDZrr = 15485 |
| 159700 | CEFBS_None, // VPMOVSXWDZrrk = 15486 |
| 159701 | CEFBS_None, // VPMOVSXWDZrrkz = 15487 |
| 159702 | CEFBS_None, // VPMOVSXWDrm = 15488 |
| 159703 | CEFBS_None, // VPMOVSXWDrr = 15489 |
| 159704 | CEFBS_None, // VPMOVSXWQYrm = 15490 |
| 159705 | CEFBS_None, // VPMOVSXWQYrr = 15491 |
| 159706 | CEFBS_None, // VPMOVSXWQZ128rm = 15492 |
| 159707 | CEFBS_None, // VPMOVSXWQZ128rmk = 15493 |
| 159708 | CEFBS_None, // VPMOVSXWQZ128rmkz = 15494 |
| 159709 | CEFBS_None, // VPMOVSXWQZ128rr = 15495 |
| 159710 | CEFBS_None, // VPMOVSXWQZ128rrk = 15496 |
| 159711 | CEFBS_None, // VPMOVSXWQZ128rrkz = 15497 |
| 159712 | CEFBS_None, // VPMOVSXWQZ256rm = 15498 |
| 159713 | CEFBS_None, // VPMOVSXWQZ256rmk = 15499 |
| 159714 | CEFBS_None, // VPMOVSXWQZ256rmkz = 15500 |
| 159715 | CEFBS_None, // VPMOVSXWQZ256rr = 15501 |
| 159716 | CEFBS_None, // VPMOVSXWQZ256rrk = 15502 |
| 159717 | CEFBS_None, // VPMOVSXWQZ256rrkz = 15503 |
| 159718 | CEFBS_None, // VPMOVSXWQZrm = 15504 |
| 159719 | CEFBS_None, // VPMOVSXWQZrmk = 15505 |
| 159720 | CEFBS_None, // VPMOVSXWQZrmkz = 15506 |
| 159721 | CEFBS_None, // VPMOVSXWQZrr = 15507 |
| 159722 | CEFBS_None, // VPMOVSXWQZrrk = 15508 |
| 159723 | CEFBS_None, // VPMOVSXWQZrrkz = 15509 |
| 159724 | CEFBS_None, // VPMOVSXWQrm = 15510 |
| 159725 | CEFBS_None, // VPMOVSXWQrr = 15511 |
| 159726 | CEFBS_None, // VPMOVUSDBZ128mr = 15512 |
| 159727 | CEFBS_None, // VPMOVUSDBZ128mrk = 15513 |
| 159728 | CEFBS_None, // VPMOVUSDBZ128rr = 15514 |
| 159729 | CEFBS_None, // VPMOVUSDBZ128rrk = 15515 |
| 159730 | CEFBS_None, // VPMOVUSDBZ128rrkz = 15516 |
| 159731 | CEFBS_None, // VPMOVUSDBZ256mr = 15517 |
| 159732 | CEFBS_None, // VPMOVUSDBZ256mrk = 15518 |
| 159733 | CEFBS_None, // VPMOVUSDBZ256rr = 15519 |
| 159734 | CEFBS_None, // VPMOVUSDBZ256rrk = 15520 |
| 159735 | CEFBS_None, // VPMOVUSDBZ256rrkz = 15521 |
| 159736 | CEFBS_None, // VPMOVUSDBZmr = 15522 |
| 159737 | CEFBS_None, // VPMOVUSDBZmrk = 15523 |
| 159738 | CEFBS_None, // VPMOVUSDBZrr = 15524 |
| 159739 | CEFBS_None, // VPMOVUSDBZrrk = 15525 |
| 159740 | CEFBS_None, // VPMOVUSDBZrrkz = 15526 |
| 159741 | CEFBS_None, // VPMOVUSDWZ128mr = 15527 |
| 159742 | CEFBS_None, // VPMOVUSDWZ128mrk = 15528 |
| 159743 | CEFBS_None, // VPMOVUSDWZ128rr = 15529 |
| 159744 | CEFBS_None, // VPMOVUSDWZ128rrk = 15530 |
| 159745 | CEFBS_None, // VPMOVUSDWZ128rrkz = 15531 |
| 159746 | CEFBS_None, // VPMOVUSDWZ256mr = 15532 |
| 159747 | CEFBS_None, // VPMOVUSDWZ256mrk = 15533 |
| 159748 | CEFBS_None, // VPMOVUSDWZ256rr = 15534 |
| 159749 | CEFBS_None, // VPMOVUSDWZ256rrk = 15535 |
| 159750 | CEFBS_None, // VPMOVUSDWZ256rrkz = 15536 |
| 159751 | CEFBS_None, // VPMOVUSDWZmr = 15537 |
| 159752 | CEFBS_None, // VPMOVUSDWZmrk = 15538 |
| 159753 | CEFBS_None, // VPMOVUSDWZrr = 15539 |
| 159754 | CEFBS_None, // VPMOVUSDWZrrk = 15540 |
| 159755 | CEFBS_None, // VPMOVUSDWZrrkz = 15541 |
| 159756 | CEFBS_None, // VPMOVUSQBZ128mr = 15542 |
| 159757 | CEFBS_None, // VPMOVUSQBZ128mrk = 15543 |
| 159758 | CEFBS_None, // VPMOVUSQBZ128rr = 15544 |
| 159759 | CEFBS_None, // VPMOVUSQBZ128rrk = 15545 |
| 159760 | CEFBS_None, // VPMOVUSQBZ128rrkz = 15546 |
| 159761 | CEFBS_None, // VPMOVUSQBZ256mr = 15547 |
| 159762 | CEFBS_None, // VPMOVUSQBZ256mrk = 15548 |
| 159763 | CEFBS_None, // VPMOVUSQBZ256rr = 15549 |
| 159764 | CEFBS_None, // VPMOVUSQBZ256rrk = 15550 |
| 159765 | CEFBS_None, // VPMOVUSQBZ256rrkz = 15551 |
| 159766 | CEFBS_None, // VPMOVUSQBZmr = 15552 |
| 159767 | CEFBS_None, // VPMOVUSQBZmrk = 15553 |
| 159768 | CEFBS_None, // VPMOVUSQBZrr = 15554 |
| 159769 | CEFBS_None, // VPMOVUSQBZrrk = 15555 |
| 159770 | CEFBS_None, // VPMOVUSQBZrrkz = 15556 |
| 159771 | CEFBS_None, // VPMOVUSQDZ128mr = 15557 |
| 159772 | CEFBS_None, // VPMOVUSQDZ128mrk = 15558 |
| 159773 | CEFBS_None, // VPMOVUSQDZ128rr = 15559 |
| 159774 | CEFBS_None, // VPMOVUSQDZ128rrk = 15560 |
| 159775 | CEFBS_None, // VPMOVUSQDZ128rrkz = 15561 |
| 159776 | CEFBS_None, // VPMOVUSQDZ256mr = 15562 |
| 159777 | CEFBS_None, // VPMOVUSQDZ256mrk = 15563 |
| 159778 | CEFBS_None, // VPMOVUSQDZ256rr = 15564 |
| 159779 | CEFBS_None, // VPMOVUSQDZ256rrk = 15565 |
| 159780 | CEFBS_None, // VPMOVUSQDZ256rrkz = 15566 |
| 159781 | CEFBS_None, // VPMOVUSQDZmr = 15567 |
| 159782 | CEFBS_None, // VPMOVUSQDZmrk = 15568 |
| 159783 | CEFBS_None, // VPMOVUSQDZrr = 15569 |
| 159784 | CEFBS_None, // VPMOVUSQDZrrk = 15570 |
| 159785 | CEFBS_None, // VPMOVUSQDZrrkz = 15571 |
| 159786 | CEFBS_None, // VPMOVUSQWZ128mr = 15572 |
| 159787 | CEFBS_None, // VPMOVUSQWZ128mrk = 15573 |
| 159788 | CEFBS_None, // VPMOVUSQWZ128rr = 15574 |
| 159789 | CEFBS_None, // VPMOVUSQWZ128rrk = 15575 |
| 159790 | CEFBS_None, // VPMOVUSQWZ128rrkz = 15576 |
| 159791 | CEFBS_None, // VPMOVUSQWZ256mr = 15577 |
| 159792 | CEFBS_None, // VPMOVUSQWZ256mrk = 15578 |
| 159793 | CEFBS_None, // VPMOVUSQWZ256rr = 15579 |
| 159794 | CEFBS_None, // VPMOVUSQWZ256rrk = 15580 |
| 159795 | CEFBS_None, // VPMOVUSQWZ256rrkz = 15581 |
| 159796 | CEFBS_None, // VPMOVUSQWZmr = 15582 |
| 159797 | CEFBS_None, // VPMOVUSQWZmrk = 15583 |
| 159798 | CEFBS_None, // VPMOVUSQWZrr = 15584 |
| 159799 | CEFBS_None, // VPMOVUSQWZrrk = 15585 |
| 159800 | CEFBS_None, // VPMOVUSQWZrrkz = 15586 |
| 159801 | CEFBS_None, // VPMOVUSWBZ128mr = 15587 |
| 159802 | CEFBS_None, // VPMOVUSWBZ128mrk = 15588 |
| 159803 | CEFBS_None, // VPMOVUSWBZ128rr = 15589 |
| 159804 | CEFBS_None, // VPMOVUSWBZ128rrk = 15590 |
| 159805 | CEFBS_None, // VPMOVUSWBZ128rrkz = 15591 |
| 159806 | CEFBS_None, // VPMOVUSWBZ256mr = 15592 |
| 159807 | CEFBS_None, // VPMOVUSWBZ256mrk = 15593 |
| 159808 | CEFBS_None, // VPMOVUSWBZ256rr = 15594 |
| 159809 | CEFBS_None, // VPMOVUSWBZ256rrk = 15595 |
| 159810 | CEFBS_None, // VPMOVUSWBZ256rrkz = 15596 |
| 159811 | CEFBS_None, // VPMOVUSWBZmr = 15597 |
| 159812 | CEFBS_None, // VPMOVUSWBZmrk = 15598 |
| 159813 | CEFBS_None, // VPMOVUSWBZrr = 15599 |
| 159814 | CEFBS_None, // VPMOVUSWBZrrk = 15600 |
| 159815 | CEFBS_None, // VPMOVUSWBZrrkz = 15601 |
| 159816 | CEFBS_None, // VPMOVW2MZ128rr = 15602 |
| 159817 | CEFBS_None, // VPMOVW2MZ256rr = 15603 |
| 159818 | CEFBS_None, // VPMOVW2MZrr = 15604 |
| 159819 | CEFBS_None, // VPMOVWBZ128mr = 15605 |
| 159820 | CEFBS_None, // VPMOVWBZ128mrk = 15606 |
| 159821 | CEFBS_None, // VPMOVWBZ128rr = 15607 |
| 159822 | CEFBS_None, // VPMOVWBZ128rrk = 15608 |
| 159823 | CEFBS_None, // VPMOVWBZ128rrkz = 15609 |
| 159824 | CEFBS_None, // VPMOVWBZ256mr = 15610 |
| 159825 | CEFBS_None, // VPMOVWBZ256mrk = 15611 |
| 159826 | CEFBS_None, // VPMOVWBZ256rr = 15612 |
| 159827 | CEFBS_None, // VPMOVWBZ256rrk = 15613 |
| 159828 | CEFBS_None, // VPMOVWBZ256rrkz = 15614 |
| 159829 | CEFBS_None, // VPMOVWBZmr = 15615 |
| 159830 | CEFBS_None, // VPMOVWBZmrk = 15616 |
| 159831 | CEFBS_None, // VPMOVWBZrr = 15617 |
| 159832 | CEFBS_None, // VPMOVWBZrrk = 15618 |
| 159833 | CEFBS_None, // VPMOVWBZrrkz = 15619 |
| 159834 | CEFBS_None, // VPMOVZXBDYrm = 15620 |
| 159835 | CEFBS_None, // VPMOVZXBDYrr = 15621 |
| 159836 | CEFBS_None, // VPMOVZXBDZ128rm = 15622 |
| 159837 | CEFBS_None, // VPMOVZXBDZ128rmk = 15623 |
| 159838 | CEFBS_None, // VPMOVZXBDZ128rmkz = 15624 |
| 159839 | CEFBS_None, // VPMOVZXBDZ128rr = 15625 |
| 159840 | CEFBS_None, // VPMOVZXBDZ128rrk = 15626 |
| 159841 | CEFBS_None, // VPMOVZXBDZ128rrkz = 15627 |
| 159842 | CEFBS_None, // VPMOVZXBDZ256rm = 15628 |
| 159843 | CEFBS_None, // VPMOVZXBDZ256rmk = 15629 |
| 159844 | CEFBS_None, // VPMOVZXBDZ256rmkz = 15630 |
| 159845 | CEFBS_None, // VPMOVZXBDZ256rr = 15631 |
| 159846 | CEFBS_None, // VPMOVZXBDZ256rrk = 15632 |
| 159847 | CEFBS_None, // VPMOVZXBDZ256rrkz = 15633 |
| 159848 | CEFBS_None, // VPMOVZXBDZrm = 15634 |
| 159849 | CEFBS_None, // VPMOVZXBDZrmk = 15635 |
| 159850 | CEFBS_None, // VPMOVZXBDZrmkz = 15636 |
| 159851 | CEFBS_None, // VPMOVZXBDZrr = 15637 |
| 159852 | CEFBS_None, // VPMOVZXBDZrrk = 15638 |
| 159853 | CEFBS_None, // VPMOVZXBDZrrkz = 15639 |
| 159854 | CEFBS_None, // VPMOVZXBDrm = 15640 |
| 159855 | CEFBS_None, // VPMOVZXBDrr = 15641 |
| 159856 | CEFBS_None, // VPMOVZXBQYrm = 15642 |
| 159857 | CEFBS_None, // VPMOVZXBQYrr = 15643 |
| 159858 | CEFBS_None, // VPMOVZXBQZ128rm = 15644 |
| 159859 | CEFBS_None, // VPMOVZXBQZ128rmk = 15645 |
| 159860 | CEFBS_None, // VPMOVZXBQZ128rmkz = 15646 |
| 159861 | CEFBS_None, // VPMOVZXBQZ128rr = 15647 |
| 159862 | CEFBS_None, // VPMOVZXBQZ128rrk = 15648 |
| 159863 | CEFBS_None, // VPMOVZXBQZ128rrkz = 15649 |
| 159864 | CEFBS_None, // VPMOVZXBQZ256rm = 15650 |
| 159865 | CEFBS_None, // VPMOVZXBQZ256rmk = 15651 |
| 159866 | CEFBS_None, // VPMOVZXBQZ256rmkz = 15652 |
| 159867 | CEFBS_None, // VPMOVZXBQZ256rr = 15653 |
| 159868 | CEFBS_None, // VPMOVZXBQZ256rrk = 15654 |
| 159869 | CEFBS_None, // VPMOVZXBQZ256rrkz = 15655 |
| 159870 | CEFBS_None, // VPMOVZXBQZrm = 15656 |
| 159871 | CEFBS_None, // VPMOVZXBQZrmk = 15657 |
| 159872 | CEFBS_None, // VPMOVZXBQZrmkz = 15658 |
| 159873 | CEFBS_None, // VPMOVZXBQZrr = 15659 |
| 159874 | CEFBS_None, // VPMOVZXBQZrrk = 15660 |
| 159875 | CEFBS_None, // VPMOVZXBQZrrkz = 15661 |
| 159876 | CEFBS_None, // VPMOVZXBQrm = 15662 |
| 159877 | CEFBS_None, // VPMOVZXBQrr = 15663 |
| 159878 | CEFBS_None, // VPMOVZXBWYrm = 15664 |
| 159879 | CEFBS_None, // VPMOVZXBWYrr = 15665 |
| 159880 | CEFBS_None, // VPMOVZXBWZ128rm = 15666 |
| 159881 | CEFBS_None, // VPMOVZXBWZ128rmk = 15667 |
| 159882 | CEFBS_None, // VPMOVZXBWZ128rmkz = 15668 |
| 159883 | CEFBS_None, // VPMOVZXBWZ128rr = 15669 |
| 159884 | CEFBS_None, // VPMOVZXBWZ128rrk = 15670 |
| 159885 | CEFBS_None, // VPMOVZXBWZ128rrkz = 15671 |
| 159886 | CEFBS_None, // VPMOVZXBWZ256rm = 15672 |
| 159887 | CEFBS_None, // VPMOVZXBWZ256rmk = 15673 |
| 159888 | CEFBS_None, // VPMOVZXBWZ256rmkz = 15674 |
| 159889 | CEFBS_None, // VPMOVZXBWZ256rr = 15675 |
| 159890 | CEFBS_None, // VPMOVZXBWZ256rrk = 15676 |
| 159891 | CEFBS_None, // VPMOVZXBWZ256rrkz = 15677 |
| 159892 | CEFBS_None, // VPMOVZXBWZrm = 15678 |
| 159893 | CEFBS_None, // VPMOVZXBWZrmk = 15679 |
| 159894 | CEFBS_None, // VPMOVZXBWZrmkz = 15680 |
| 159895 | CEFBS_None, // VPMOVZXBWZrr = 15681 |
| 159896 | CEFBS_None, // VPMOVZXBWZrrk = 15682 |
| 159897 | CEFBS_None, // VPMOVZXBWZrrkz = 15683 |
| 159898 | CEFBS_None, // VPMOVZXBWrm = 15684 |
| 159899 | CEFBS_None, // VPMOVZXBWrr = 15685 |
| 159900 | CEFBS_None, // VPMOVZXDQYrm = 15686 |
| 159901 | CEFBS_None, // VPMOVZXDQYrr = 15687 |
| 159902 | CEFBS_None, // VPMOVZXDQZ128rm = 15688 |
| 159903 | CEFBS_None, // VPMOVZXDQZ128rmk = 15689 |
| 159904 | CEFBS_None, // VPMOVZXDQZ128rmkz = 15690 |
| 159905 | CEFBS_None, // VPMOVZXDQZ128rr = 15691 |
| 159906 | CEFBS_None, // VPMOVZXDQZ128rrk = 15692 |
| 159907 | CEFBS_None, // VPMOVZXDQZ128rrkz = 15693 |
| 159908 | CEFBS_None, // VPMOVZXDQZ256rm = 15694 |
| 159909 | CEFBS_None, // VPMOVZXDQZ256rmk = 15695 |
| 159910 | CEFBS_None, // VPMOVZXDQZ256rmkz = 15696 |
| 159911 | CEFBS_None, // VPMOVZXDQZ256rr = 15697 |
| 159912 | CEFBS_None, // VPMOVZXDQZ256rrk = 15698 |
| 159913 | CEFBS_None, // VPMOVZXDQZ256rrkz = 15699 |
| 159914 | CEFBS_None, // VPMOVZXDQZrm = 15700 |
| 159915 | CEFBS_None, // VPMOVZXDQZrmk = 15701 |
| 159916 | CEFBS_None, // VPMOVZXDQZrmkz = 15702 |
| 159917 | CEFBS_None, // VPMOVZXDQZrr = 15703 |
| 159918 | CEFBS_None, // VPMOVZXDQZrrk = 15704 |
| 159919 | CEFBS_None, // VPMOVZXDQZrrkz = 15705 |
| 159920 | CEFBS_None, // VPMOVZXDQrm = 15706 |
| 159921 | CEFBS_None, // VPMOVZXDQrr = 15707 |
| 159922 | CEFBS_None, // VPMOVZXWDYrm = 15708 |
| 159923 | CEFBS_None, // VPMOVZXWDYrr = 15709 |
| 159924 | CEFBS_None, // VPMOVZXWDZ128rm = 15710 |
| 159925 | CEFBS_None, // VPMOVZXWDZ128rmk = 15711 |
| 159926 | CEFBS_None, // VPMOVZXWDZ128rmkz = 15712 |
| 159927 | CEFBS_None, // VPMOVZXWDZ128rr = 15713 |
| 159928 | CEFBS_None, // VPMOVZXWDZ128rrk = 15714 |
| 159929 | CEFBS_None, // VPMOVZXWDZ128rrkz = 15715 |
| 159930 | CEFBS_None, // VPMOVZXWDZ256rm = 15716 |
| 159931 | CEFBS_None, // VPMOVZXWDZ256rmk = 15717 |
| 159932 | CEFBS_None, // VPMOVZXWDZ256rmkz = 15718 |
| 159933 | CEFBS_None, // VPMOVZXWDZ256rr = 15719 |
| 159934 | CEFBS_None, // VPMOVZXWDZ256rrk = 15720 |
| 159935 | CEFBS_None, // VPMOVZXWDZ256rrkz = 15721 |
| 159936 | CEFBS_None, // VPMOVZXWDZrm = 15722 |
| 159937 | CEFBS_None, // VPMOVZXWDZrmk = 15723 |
| 159938 | CEFBS_None, // VPMOVZXWDZrmkz = 15724 |
| 159939 | CEFBS_None, // VPMOVZXWDZrr = 15725 |
| 159940 | CEFBS_None, // VPMOVZXWDZrrk = 15726 |
| 159941 | CEFBS_None, // VPMOVZXWDZrrkz = 15727 |
| 159942 | CEFBS_None, // VPMOVZXWDrm = 15728 |
| 159943 | CEFBS_None, // VPMOVZXWDrr = 15729 |
| 159944 | CEFBS_None, // VPMOVZXWQYrm = 15730 |
| 159945 | CEFBS_None, // VPMOVZXWQYrr = 15731 |
| 159946 | CEFBS_None, // VPMOVZXWQZ128rm = 15732 |
| 159947 | CEFBS_None, // VPMOVZXWQZ128rmk = 15733 |
| 159948 | CEFBS_None, // VPMOVZXWQZ128rmkz = 15734 |
| 159949 | CEFBS_None, // VPMOVZXWQZ128rr = 15735 |
| 159950 | CEFBS_None, // VPMOVZXWQZ128rrk = 15736 |
| 159951 | CEFBS_None, // VPMOVZXWQZ128rrkz = 15737 |
| 159952 | CEFBS_None, // VPMOVZXWQZ256rm = 15738 |
| 159953 | CEFBS_None, // VPMOVZXWQZ256rmk = 15739 |
| 159954 | CEFBS_None, // VPMOVZXWQZ256rmkz = 15740 |
| 159955 | CEFBS_None, // VPMOVZXWQZ256rr = 15741 |
| 159956 | CEFBS_None, // VPMOVZXWQZ256rrk = 15742 |
| 159957 | CEFBS_None, // VPMOVZXWQZ256rrkz = 15743 |
| 159958 | CEFBS_None, // VPMOVZXWQZrm = 15744 |
| 159959 | CEFBS_None, // VPMOVZXWQZrmk = 15745 |
| 159960 | CEFBS_None, // VPMOVZXWQZrmkz = 15746 |
| 159961 | CEFBS_None, // VPMOVZXWQZrr = 15747 |
| 159962 | CEFBS_None, // VPMOVZXWQZrrk = 15748 |
| 159963 | CEFBS_None, // VPMOVZXWQZrrkz = 15749 |
| 159964 | CEFBS_None, // VPMOVZXWQrm = 15750 |
| 159965 | CEFBS_None, // VPMOVZXWQrr = 15751 |
| 159966 | CEFBS_None, // VPMULDQYrm = 15752 |
| 159967 | CEFBS_None, // VPMULDQYrr = 15753 |
| 159968 | CEFBS_None, // VPMULDQZ128rm = 15754 |
| 159969 | CEFBS_None, // VPMULDQZ128rmb = 15755 |
| 159970 | CEFBS_None, // VPMULDQZ128rmbk = 15756 |
| 159971 | CEFBS_None, // VPMULDQZ128rmbkz = 15757 |
| 159972 | CEFBS_None, // VPMULDQZ128rmk = 15758 |
| 159973 | CEFBS_None, // VPMULDQZ128rmkz = 15759 |
| 159974 | CEFBS_None, // VPMULDQZ128rr = 15760 |
| 159975 | CEFBS_None, // VPMULDQZ128rrk = 15761 |
| 159976 | CEFBS_None, // VPMULDQZ128rrkz = 15762 |
| 159977 | CEFBS_None, // VPMULDQZ256rm = 15763 |
| 159978 | CEFBS_None, // VPMULDQZ256rmb = 15764 |
| 159979 | CEFBS_None, // VPMULDQZ256rmbk = 15765 |
| 159980 | CEFBS_None, // VPMULDQZ256rmbkz = 15766 |
| 159981 | CEFBS_None, // VPMULDQZ256rmk = 15767 |
| 159982 | CEFBS_None, // VPMULDQZ256rmkz = 15768 |
| 159983 | CEFBS_None, // VPMULDQZ256rr = 15769 |
| 159984 | CEFBS_None, // VPMULDQZ256rrk = 15770 |
| 159985 | CEFBS_None, // VPMULDQZ256rrkz = 15771 |
| 159986 | CEFBS_None, // VPMULDQZrm = 15772 |
| 159987 | CEFBS_None, // VPMULDQZrmb = 15773 |
| 159988 | CEFBS_None, // VPMULDQZrmbk = 15774 |
| 159989 | CEFBS_None, // VPMULDQZrmbkz = 15775 |
| 159990 | CEFBS_None, // VPMULDQZrmk = 15776 |
| 159991 | CEFBS_None, // VPMULDQZrmkz = 15777 |
| 159992 | CEFBS_None, // VPMULDQZrr = 15778 |
| 159993 | CEFBS_None, // VPMULDQZrrk = 15779 |
| 159994 | CEFBS_None, // VPMULDQZrrkz = 15780 |
| 159995 | CEFBS_None, // VPMULDQrm = 15781 |
| 159996 | CEFBS_None, // VPMULDQrr = 15782 |
| 159997 | CEFBS_None, // VPMULHRSWYrm = 15783 |
| 159998 | CEFBS_None, // VPMULHRSWYrr = 15784 |
| 159999 | CEFBS_None, // VPMULHRSWZ128rm = 15785 |
| 160000 | CEFBS_None, // VPMULHRSWZ128rmk = 15786 |
| 160001 | CEFBS_None, // VPMULHRSWZ128rmkz = 15787 |
| 160002 | CEFBS_None, // VPMULHRSWZ128rr = 15788 |
| 160003 | CEFBS_None, // VPMULHRSWZ128rrk = 15789 |
| 160004 | CEFBS_None, // VPMULHRSWZ128rrkz = 15790 |
| 160005 | CEFBS_None, // VPMULHRSWZ256rm = 15791 |
| 160006 | CEFBS_None, // VPMULHRSWZ256rmk = 15792 |
| 160007 | CEFBS_None, // VPMULHRSWZ256rmkz = 15793 |
| 160008 | CEFBS_None, // VPMULHRSWZ256rr = 15794 |
| 160009 | CEFBS_None, // VPMULHRSWZ256rrk = 15795 |
| 160010 | CEFBS_None, // VPMULHRSWZ256rrkz = 15796 |
| 160011 | CEFBS_None, // VPMULHRSWZrm = 15797 |
| 160012 | CEFBS_None, // VPMULHRSWZrmk = 15798 |
| 160013 | CEFBS_None, // VPMULHRSWZrmkz = 15799 |
| 160014 | CEFBS_None, // VPMULHRSWZrr = 15800 |
| 160015 | CEFBS_None, // VPMULHRSWZrrk = 15801 |
| 160016 | CEFBS_None, // VPMULHRSWZrrkz = 15802 |
| 160017 | CEFBS_None, // VPMULHRSWrm = 15803 |
| 160018 | CEFBS_None, // VPMULHRSWrr = 15804 |
| 160019 | CEFBS_None, // VPMULHUWYrm = 15805 |
| 160020 | CEFBS_None, // VPMULHUWYrr = 15806 |
| 160021 | CEFBS_None, // VPMULHUWZ128rm = 15807 |
| 160022 | CEFBS_None, // VPMULHUWZ128rmk = 15808 |
| 160023 | CEFBS_None, // VPMULHUWZ128rmkz = 15809 |
| 160024 | CEFBS_None, // VPMULHUWZ128rr = 15810 |
| 160025 | CEFBS_None, // VPMULHUWZ128rrk = 15811 |
| 160026 | CEFBS_None, // VPMULHUWZ128rrkz = 15812 |
| 160027 | CEFBS_None, // VPMULHUWZ256rm = 15813 |
| 160028 | CEFBS_None, // VPMULHUWZ256rmk = 15814 |
| 160029 | CEFBS_None, // VPMULHUWZ256rmkz = 15815 |
| 160030 | CEFBS_None, // VPMULHUWZ256rr = 15816 |
| 160031 | CEFBS_None, // VPMULHUWZ256rrk = 15817 |
| 160032 | CEFBS_None, // VPMULHUWZ256rrkz = 15818 |
| 160033 | CEFBS_None, // VPMULHUWZrm = 15819 |
| 160034 | CEFBS_None, // VPMULHUWZrmk = 15820 |
| 160035 | CEFBS_None, // VPMULHUWZrmkz = 15821 |
| 160036 | CEFBS_None, // VPMULHUWZrr = 15822 |
| 160037 | CEFBS_None, // VPMULHUWZrrk = 15823 |
| 160038 | CEFBS_None, // VPMULHUWZrrkz = 15824 |
| 160039 | CEFBS_None, // VPMULHUWrm = 15825 |
| 160040 | CEFBS_None, // VPMULHUWrr = 15826 |
| 160041 | CEFBS_None, // VPMULHWYrm = 15827 |
| 160042 | CEFBS_None, // VPMULHWYrr = 15828 |
| 160043 | CEFBS_None, // VPMULHWZ128rm = 15829 |
| 160044 | CEFBS_None, // VPMULHWZ128rmk = 15830 |
| 160045 | CEFBS_None, // VPMULHWZ128rmkz = 15831 |
| 160046 | CEFBS_None, // VPMULHWZ128rr = 15832 |
| 160047 | CEFBS_None, // VPMULHWZ128rrk = 15833 |
| 160048 | CEFBS_None, // VPMULHWZ128rrkz = 15834 |
| 160049 | CEFBS_None, // VPMULHWZ256rm = 15835 |
| 160050 | CEFBS_None, // VPMULHWZ256rmk = 15836 |
| 160051 | CEFBS_None, // VPMULHWZ256rmkz = 15837 |
| 160052 | CEFBS_None, // VPMULHWZ256rr = 15838 |
| 160053 | CEFBS_None, // VPMULHWZ256rrk = 15839 |
| 160054 | CEFBS_None, // VPMULHWZ256rrkz = 15840 |
| 160055 | CEFBS_None, // VPMULHWZrm = 15841 |
| 160056 | CEFBS_None, // VPMULHWZrmk = 15842 |
| 160057 | CEFBS_None, // VPMULHWZrmkz = 15843 |
| 160058 | CEFBS_None, // VPMULHWZrr = 15844 |
| 160059 | CEFBS_None, // VPMULHWZrrk = 15845 |
| 160060 | CEFBS_None, // VPMULHWZrrkz = 15846 |
| 160061 | CEFBS_None, // VPMULHWrm = 15847 |
| 160062 | CEFBS_None, // VPMULHWrr = 15848 |
| 160063 | CEFBS_None, // VPMULLDYrm = 15849 |
| 160064 | CEFBS_None, // VPMULLDYrr = 15850 |
| 160065 | CEFBS_None, // VPMULLDZ128rm = 15851 |
| 160066 | CEFBS_None, // VPMULLDZ128rmb = 15852 |
| 160067 | CEFBS_None, // VPMULLDZ128rmbk = 15853 |
| 160068 | CEFBS_None, // VPMULLDZ128rmbkz = 15854 |
| 160069 | CEFBS_None, // VPMULLDZ128rmk = 15855 |
| 160070 | CEFBS_None, // VPMULLDZ128rmkz = 15856 |
| 160071 | CEFBS_None, // VPMULLDZ128rr = 15857 |
| 160072 | CEFBS_None, // VPMULLDZ128rrk = 15858 |
| 160073 | CEFBS_None, // VPMULLDZ128rrkz = 15859 |
| 160074 | CEFBS_None, // VPMULLDZ256rm = 15860 |
| 160075 | CEFBS_None, // VPMULLDZ256rmb = 15861 |
| 160076 | CEFBS_None, // VPMULLDZ256rmbk = 15862 |
| 160077 | CEFBS_None, // VPMULLDZ256rmbkz = 15863 |
| 160078 | CEFBS_None, // VPMULLDZ256rmk = 15864 |
| 160079 | CEFBS_None, // VPMULLDZ256rmkz = 15865 |
| 160080 | CEFBS_None, // VPMULLDZ256rr = 15866 |
| 160081 | CEFBS_None, // VPMULLDZ256rrk = 15867 |
| 160082 | CEFBS_None, // VPMULLDZ256rrkz = 15868 |
| 160083 | CEFBS_None, // VPMULLDZrm = 15869 |
| 160084 | CEFBS_None, // VPMULLDZrmb = 15870 |
| 160085 | CEFBS_None, // VPMULLDZrmbk = 15871 |
| 160086 | CEFBS_None, // VPMULLDZrmbkz = 15872 |
| 160087 | CEFBS_None, // VPMULLDZrmk = 15873 |
| 160088 | CEFBS_None, // VPMULLDZrmkz = 15874 |
| 160089 | CEFBS_None, // VPMULLDZrr = 15875 |
| 160090 | CEFBS_None, // VPMULLDZrrk = 15876 |
| 160091 | CEFBS_None, // VPMULLDZrrkz = 15877 |
| 160092 | CEFBS_None, // VPMULLDrm = 15878 |
| 160093 | CEFBS_None, // VPMULLDrr = 15879 |
| 160094 | CEFBS_None, // VPMULLQZ128rm = 15880 |
| 160095 | CEFBS_None, // VPMULLQZ128rmb = 15881 |
| 160096 | CEFBS_None, // VPMULLQZ128rmbk = 15882 |
| 160097 | CEFBS_None, // VPMULLQZ128rmbkz = 15883 |
| 160098 | CEFBS_None, // VPMULLQZ128rmk = 15884 |
| 160099 | CEFBS_None, // VPMULLQZ128rmkz = 15885 |
| 160100 | CEFBS_None, // VPMULLQZ128rr = 15886 |
| 160101 | CEFBS_None, // VPMULLQZ128rrk = 15887 |
| 160102 | CEFBS_None, // VPMULLQZ128rrkz = 15888 |
| 160103 | CEFBS_None, // VPMULLQZ256rm = 15889 |
| 160104 | CEFBS_None, // VPMULLQZ256rmb = 15890 |
| 160105 | CEFBS_None, // VPMULLQZ256rmbk = 15891 |
| 160106 | CEFBS_None, // VPMULLQZ256rmbkz = 15892 |
| 160107 | CEFBS_None, // VPMULLQZ256rmk = 15893 |
| 160108 | CEFBS_None, // VPMULLQZ256rmkz = 15894 |
| 160109 | CEFBS_None, // VPMULLQZ256rr = 15895 |
| 160110 | CEFBS_None, // VPMULLQZ256rrk = 15896 |
| 160111 | CEFBS_None, // VPMULLQZ256rrkz = 15897 |
| 160112 | CEFBS_None, // VPMULLQZrm = 15898 |
| 160113 | CEFBS_None, // VPMULLQZrmb = 15899 |
| 160114 | CEFBS_None, // VPMULLQZrmbk = 15900 |
| 160115 | CEFBS_None, // VPMULLQZrmbkz = 15901 |
| 160116 | CEFBS_None, // VPMULLQZrmk = 15902 |
| 160117 | CEFBS_None, // VPMULLQZrmkz = 15903 |
| 160118 | CEFBS_None, // VPMULLQZrr = 15904 |
| 160119 | CEFBS_None, // VPMULLQZrrk = 15905 |
| 160120 | CEFBS_None, // VPMULLQZrrkz = 15906 |
| 160121 | CEFBS_None, // VPMULLWYrm = 15907 |
| 160122 | CEFBS_None, // VPMULLWYrr = 15908 |
| 160123 | CEFBS_None, // VPMULLWZ128rm = 15909 |
| 160124 | CEFBS_None, // VPMULLWZ128rmk = 15910 |
| 160125 | CEFBS_None, // VPMULLWZ128rmkz = 15911 |
| 160126 | CEFBS_None, // VPMULLWZ128rr = 15912 |
| 160127 | CEFBS_None, // VPMULLWZ128rrk = 15913 |
| 160128 | CEFBS_None, // VPMULLWZ128rrkz = 15914 |
| 160129 | CEFBS_None, // VPMULLWZ256rm = 15915 |
| 160130 | CEFBS_None, // VPMULLWZ256rmk = 15916 |
| 160131 | CEFBS_None, // VPMULLWZ256rmkz = 15917 |
| 160132 | CEFBS_None, // VPMULLWZ256rr = 15918 |
| 160133 | CEFBS_None, // VPMULLWZ256rrk = 15919 |
| 160134 | CEFBS_None, // VPMULLWZ256rrkz = 15920 |
| 160135 | CEFBS_None, // VPMULLWZrm = 15921 |
| 160136 | CEFBS_None, // VPMULLWZrmk = 15922 |
| 160137 | CEFBS_None, // VPMULLWZrmkz = 15923 |
| 160138 | CEFBS_None, // VPMULLWZrr = 15924 |
| 160139 | CEFBS_None, // VPMULLWZrrk = 15925 |
| 160140 | CEFBS_None, // VPMULLWZrrkz = 15926 |
| 160141 | CEFBS_None, // VPMULLWrm = 15927 |
| 160142 | CEFBS_None, // VPMULLWrr = 15928 |
| 160143 | CEFBS_None, // VPMULTISHIFTQBZ128rm = 15929 |
| 160144 | CEFBS_None, // VPMULTISHIFTQBZ128rmb = 15930 |
| 160145 | CEFBS_None, // VPMULTISHIFTQBZ128rmbk = 15931 |
| 160146 | CEFBS_None, // VPMULTISHIFTQBZ128rmbkz = 15932 |
| 160147 | CEFBS_None, // VPMULTISHIFTQBZ128rmk = 15933 |
| 160148 | CEFBS_None, // VPMULTISHIFTQBZ128rmkz = 15934 |
| 160149 | CEFBS_None, // VPMULTISHIFTQBZ128rr = 15935 |
| 160150 | CEFBS_None, // VPMULTISHIFTQBZ128rrk = 15936 |
| 160151 | CEFBS_None, // VPMULTISHIFTQBZ128rrkz = 15937 |
| 160152 | CEFBS_None, // VPMULTISHIFTQBZ256rm = 15938 |
| 160153 | CEFBS_None, // VPMULTISHIFTQBZ256rmb = 15939 |
| 160154 | CEFBS_None, // VPMULTISHIFTQBZ256rmbk = 15940 |
| 160155 | CEFBS_None, // VPMULTISHIFTQBZ256rmbkz = 15941 |
| 160156 | CEFBS_None, // VPMULTISHIFTQBZ256rmk = 15942 |
| 160157 | CEFBS_None, // VPMULTISHIFTQBZ256rmkz = 15943 |
| 160158 | CEFBS_None, // VPMULTISHIFTQBZ256rr = 15944 |
| 160159 | CEFBS_None, // VPMULTISHIFTQBZ256rrk = 15945 |
| 160160 | CEFBS_None, // VPMULTISHIFTQBZ256rrkz = 15946 |
| 160161 | CEFBS_None, // VPMULTISHIFTQBZrm = 15947 |
| 160162 | CEFBS_None, // VPMULTISHIFTQBZrmb = 15948 |
| 160163 | CEFBS_None, // VPMULTISHIFTQBZrmbk = 15949 |
| 160164 | CEFBS_None, // VPMULTISHIFTQBZrmbkz = 15950 |
| 160165 | CEFBS_None, // VPMULTISHIFTQBZrmk = 15951 |
| 160166 | CEFBS_None, // VPMULTISHIFTQBZrmkz = 15952 |
| 160167 | CEFBS_None, // VPMULTISHIFTQBZrr = 15953 |
| 160168 | CEFBS_None, // VPMULTISHIFTQBZrrk = 15954 |
| 160169 | CEFBS_None, // VPMULTISHIFTQBZrrkz = 15955 |
| 160170 | CEFBS_None, // VPMULUDQYrm = 15956 |
| 160171 | CEFBS_None, // VPMULUDQYrr = 15957 |
| 160172 | CEFBS_None, // VPMULUDQZ128rm = 15958 |
| 160173 | CEFBS_None, // VPMULUDQZ128rmb = 15959 |
| 160174 | CEFBS_None, // VPMULUDQZ128rmbk = 15960 |
| 160175 | CEFBS_None, // VPMULUDQZ128rmbkz = 15961 |
| 160176 | CEFBS_None, // VPMULUDQZ128rmk = 15962 |
| 160177 | CEFBS_None, // VPMULUDQZ128rmkz = 15963 |
| 160178 | CEFBS_None, // VPMULUDQZ128rr = 15964 |
| 160179 | CEFBS_None, // VPMULUDQZ128rrk = 15965 |
| 160180 | CEFBS_None, // VPMULUDQZ128rrkz = 15966 |
| 160181 | CEFBS_None, // VPMULUDQZ256rm = 15967 |
| 160182 | CEFBS_None, // VPMULUDQZ256rmb = 15968 |
| 160183 | CEFBS_None, // VPMULUDQZ256rmbk = 15969 |
| 160184 | CEFBS_None, // VPMULUDQZ256rmbkz = 15970 |
| 160185 | CEFBS_None, // VPMULUDQZ256rmk = 15971 |
| 160186 | CEFBS_None, // VPMULUDQZ256rmkz = 15972 |
| 160187 | CEFBS_None, // VPMULUDQZ256rr = 15973 |
| 160188 | CEFBS_None, // VPMULUDQZ256rrk = 15974 |
| 160189 | CEFBS_None, // VPMULUDQZ256rrkz = 15975 |
| 160190 | CEFBS_None, // VPMULUDQZrm = 15976 |
| 160191 | CEFBS_None, // VPMULUDQZrmb = 15977 |
| 160192 | CEFBS_None, // VPMULUDQZrmbk = 15978 |
| 160193 | CEFBS_None, // VPMULUDQZrmbkz = 15979 |
| 160194 | CEFBS_None, // VPMULUDQZrmk = 15980 |
| 160195 | CEFBS_None, // VPMULUDQZrmkz = 15981 |
| 160196 | CEFBS_None, // VPMULUDQZrr = 15982 |
| 160197 | CEFBS_None, // VPMULUDQZrrk = 15983 |
| 160198 | CEFBS_None, // VPMULUDQZrrkz = 15984 |
| 160199 | CEFBS_None, // VPMULUDQrm = 15985 |
| 160200 | CEFBS_None, // VPMULUDQrr = 15986 |
| 160201 | CEFBS_None, // VPOPCNTBZ128rm = 15987 |
| 160202 | CEFBS_None, // VPOPCNTBZ128rmk = 15988 |
| 160203 | CEFBS_None, // VPOPCNTBZ128rmkz = 15989 |
| 160204 | CEFBS_None, // VPOPCNTBZ128rr = 15990 |
| 160205 | CEFBS_None, // VPOPCNTBZ128rrk = 15991 |
| 160206 | CEFBS_None, // VPOPCNTBZ128rrkz = 15992 |
| 160207 | CEFBS_None, // VPOPCNTBZ256rm = 15993 |
| 160208 | CEFBS_None, // VPOPCNTBZ256rmk = 15994 |
| 160209 | CEFBS_None, // VPOPCNTBZ256rmkz = 15995 |
| 160210 | CEFBS_None, // VPOPCNTBZ256rr = 15996 |
| 160211 | CEFBS_None, // VPOPCNTBZ256rrk = 15997 |
| 160212 | CEFBS_None, // VPOPCNTBZ256rrkz = 15998 |
| 160213 | CEFBS_None, // VPOPCNTBZrm = 15999 |
| 160214 | CEFBS_None, // VPOPCNTBZrmk = 16000 |
| 160215 | CEFBS_None, // VPOPCNTBZrmkz = 16001 |
| 160216 | CEFBS_None, // VPOPCNTBZrr = 16002 |
| 160217 | CEFBS_None, // VPOPCNTBZrrk = 16003 |
| 160218 | CEFBS_None, // VPOPCNTBZrrkz = 16004 |
| 160219 | CEFBS_None, // VPOPCNTDZ128rm = 16005 |
| 160220 | CEFBS_None, // VPOPCNTDZ128rmb = 16006 |
| 160221 | CEFBS_None, // VPOPCNTDZ128rmbk = 16007 |
| 160222 | CEFBS_None, // VPOPCNTDZ128rmbkz = 16008 |
| 160223 | CEFBS_None, // VPOPCNTDZ128rmk = 16009 |
| 160224 | CEFBS_None, // VPOPCNTDZ128rmkz = 16010 |
| 160225 | CEFBS_None, // VPOPCNTDZ128rr = 16011 |
| 160226 | CEFBS_None, // VPOPCNTDZ128rrk = 16012 |
| 160227 | CEFBS_None, // VPOPCNTDZ128rrkz = 16013 |
| 160228 | CEFBS_None, // VPOPCNTDZ256rm = 16014 |
| 160229 | CEFBS_None, // VPOPCNTDZ256rmb = 16015 |
| 160230 | CEFBS_None, // VPOPCNTDZ256rmbk = 16016 |
| 160231 | CEFBS_None, // VPOPCNTDZ256rmbkz = 16017 |
| 160232 | CEFBS_None, // VPOPCNTDZ256rmk = 16018 |
| 160233 | CEFBS_None, // VPOPCNTDZ256rmkz = 16019 |
| 160234 | CEFBS_None, // VPOPCNTDZ256rr = 16020 |
| 160235 | CEFBS_None, // VPOPCNTDZ256rrk = 16021 |
| 160236 | CEFBS_None, // VPOPCNTDZ256rrkz = 16022 |
| 160237 | CEFBS_None, // VPOPCNTDZrm = 16023 |
| 160238 | CEFBS_None, // VPOPCNTDZrmb = 16024 |
| 160239 | CEFBS_None, // VPOPCNTDZrmbk = 16025 |
| 160240 | CEFBS_None, // VPOPCNTDZrmbkz = 16026 |
| 160241 | CEFBS_None, // VPOPCNTDZrmk = 16027 |
| 160242 | CEFBS_None, // VPOPCNTDZrmkz = 16028 |
| 160243 | CEFBS_None, // VPOPCNTDZrr = 16029 |
| 160244 | CEFBS_None, // VPOPCNTDZrrk = 16030 |
| 160245 | CEFBS_None, // VPOPCNTDZrrkz = 16031 |
| 160246 | CEFBS_None, // VPOPCNTQZ128rm = 16032 |
| 160247 | CEFBS_None, // VPOPCNTQZ128rmb = 16033 |
| 160248 | CEFBS_None, // VPOPCNTQZ128rmbk = 16034 |
| 160249 | CEFBS_None, // VPOPCNTQZ128rmbkz = 16035 |
| 160250 | CEFBS_None, // VPOPCNTQZ128rmk = 16036 |
| 160251 | CEFBS_None, // VPOPCNTQZ128rmkz = 16037 |
| 160252 | CEFBS_None, // VPOPCNTQZ128rr = 16038 |
| 160253 | CEFBS_None, // VPOPCNTQZ128rrk = 16039 |
| 160254 | CEFBS_None, // VPOPCNTQZ128rrkz = 16040 |
| 160255 | CEFBS_None, // VPOPCNTQZ256rm = 16041 |
| 160256 | CEFBS_None, // VPOPCNTQZ256rmb = 16042 |
| 160257 | CEFBS_None, // VPOPCNTQZ256rmbk = 16043 |
| 160258 | CEFBS_None, // VPOPCNTQZ256rmbkz = 16044 |
| 160259 | CEFBS_None, // VPOPCNTQZ256rmk = 16045 |
| 160260 | CEFBS_None, // VPOPCNTQZ256rmkz = 16046 |
| 160261 | CEFBS_None, // VPOPCNTQZ256rr = 16047 |
| 160262 | CEFBS_None, // VPOPCNTQZ256rrk = 16048 |
| 160263 | CEFBS_None, // VPOPCNTQZ256rrkz = 16049 |
| 160264 | CEFBS_None, // VPOPCNTQZrm = 16050 |
| 160265 | CEFBS_None, // VPOPCNTQZrmb = 16051 |
| 160266 | CEFBS_None, // VPOPCNTQZrmbk = 16052 |
| 160267 | CEFBS_None, // VPOPCNTQZrmbkz = 16053 |
| 160268 | CEFBS_None, // VPOPCNTQZrmk = 16054 |
| 160269 | CEFBS_None, // VPOPCNTQZrmkz = 16055 |
| 160270 | CEFBS_None, // VPOPCNTQZrr = 16056 |
| 160271 | CEFBS_None, // VPOPCNTQZrrk = 16057 |
| 160272 | CEFBS_None, // VPOPCNTQZrrkz = 16058 |
| 160273 | CEFBS_None, // VPOPCNTWZ128rm = 16059 |
| 160274 | CEFBS_None, // VPOPCNTWZ128rmk = 16060 |
| 160275 | CEFBS_None, // VPOPCNTWZ128rmkz = 16061 |
| 160276 | CEFBS_None, // VPOPCNTWZ128rr = 16062 |
| 160277 | CEFBS_None, // VPOPCNTWZ128rrk = 16063 |
| 160278 | CEFBS_None, // VPOPCNTWZ128rrkz = 16064 |
| 160279 | CEFBS_None, // VPOPCNTWZ256rm = 16065 |
| 160280 | CEFBS_None, // VPOPCNTWZ256rmk = 16066 |
| 160281 | CEFBS_None, // VPOPCNTWZ256rmkz = 16067 |
| 160282 | CEFBS_None, // VPOPCNTWZ256rr = 16068 |
| 160283 | CEFBS_None, // VPOPCNTWZ256rrk = 16069 |
| 160284 | CEFBS_None, // VPOPCNTWZ256rrkz = 16070 |
| 160285 | CEFBS_None, // VPOPCNTWZrm = 16071 |
| 160286 | CEFBS_None, // VPOPCNTWZrmk = 16072 |
| 160287 | CEFBS_None, // VPOPCNTWZrmkz = 16073 |
| 160288 | CEFBS_None, // VPOPCNTWZrr = 16074 |
| 160289 | CEFBS_None, // VPOPCNTWZrrk = 16075 |
| 160290 | CEFBS_None, // VPOPCNTWZrrkz = 16076 |
| 160291 | CEFBS_None, // VPORDZ128rm = 16077 |
| 160292 | CEFBS_None, // VPORDZ128rmb = 16078 |
| 160293 | CEFBS_None, // VPORDZ128rmbk = 16079 |
| 160294 | CEFBS_None, // VPORDZ128rmbkz = 16080 |
| 160295 | CEFBS_None, // VPORDZ128rmk = 16081 |
| 160296 | CEFBS_None, // VPORDZ128rmkz = 16082 |
| 160297 | CEFBS_None, // VPORDZ128rr = 16083 |
| 160298 | CEFBS_None, // VPORDZ128rrk = 16084 |
| 160299 | CEFBS_None, // VPORDZ128rrkz = 16085 |
| 160300 | CEFBS_None, // VPORDZ256rm = 16086 |
| 160301 | CEFBS_None, // VPORDZ256rmb = 16087 |
| 160302 | CEFBS_None, // VPORDZ256rmbk = 16088 |
| 160303 | CEFBS_None, // VPORDZ256rmbkz = 16089 |
| 160304 | CEFBS_None, // VPORDZ256rmk = 16090 |
| 160305 | CEFBS_None, // VPORDZ256rmkz = 16091 |
| 160306 | CEFBS_None, // VPORDZ256rr = 16092 |
| 160307 | CEFBS_None, // VPORDZ256rrk = 16093 |
| 160308 | CEFBS_None, // VPORDZ256rrkz = 16094 |
| 160309 | CEFBS_None, // VPORDZrm = 16095 |
| 160310 | CEFBS_None, // VPORDZrmb = 16096 |
| 160311 | CEFBS_None, // VPORDZrmbk = 16097 |
| 160312 | CEFBS_None, // VPORDZrmbkz = 16098 |
| 160313 | CEFBS_None, // VPORDZrmk = 16099 |
| 160314 | CEFBS_None, // VPORDZrmkz = 16100 |
| 160315 | CEFBS_None, // VPORDZrr = 16101 |
| 160316 | CEFBS_None, // VPORDZrrk = 16102 |
| 160317 | CEFBS_None, // VPORDZrrkz = 16103 |
| 160318 | CEFBS_None, // VPORQZ128rm = 16104 |
| 160319 | CEFBS_None, // VPORQZ128rmb = 16105 |
| 160320 | CEFBS_None, // VPORQZ128rmbk = 16106 |
| 160321 | CEFBS_None, // VPORQZ128rmbkz = 16107 |
| 160322 | CEFBS_None, // VPORQZ128rmk = 16108 |
| 160323 | CEFBS_None, // VPORQZ128rmkz = 16109 |
| 160324 | CEFBS_None, // VPORQZ128rr = 16110 |
| 160325 | CEFBS_None, // VPORQZ128rrk = 16111 |
| 160326 | CEFBS_None, // VPORQZ128rrkz = 16112 |
| 160327 | CEFBS_None, // VPORQZ256rm = 16113 |
| 160328 | CEFBS_None, // VPORQZ256rmb = 16114 |
| 160329 | CEFBS_None, // VPORQZ256rmbk = 16115 |
| 160330 | CEFBS_None, // VPORQZ256rmbkz = 16116 |
| 160331 | CEFBS_None, // VPORQZ256rmk = 16117 |
| 160332 | CEFBS_None, // VPORQZ256rmkz = 16118 |
| 160333 | CEFBS_None, // VPORQZ256rr = 16119 |
| 160334 | CEFBS_None, // VPORQZ256rrk = 16120 |
| 160335 | CEFBS_None, // VPORQZ256rrkz = 16121 |
| 160336 | CEFBS_None, // VPORQZrm = 16122 |
| 160337 | CEFBS_None, // VPORQZrmb = 16123 |
| 160338 | CEFBS_None, // VPORQZrmbk = 16124 |
| 160339 | CEFBS_None, // VPORQZrmbkz = 16125 |
| 160340 | CEFBS_None, // VPORQZrmk = 16126 |
| 160341 | CEFBS_None, // VPORQZrmkz = 16127 |
| 160342 | CEFBS_None, // VPORQZrr = 16128 |
| 160343 | CEFBS_None, // VPORQZrrk = 16129 |
| 160344 | CEFBS_None, // VPORQZrrkz = 16130 |
| 160345 | CEFBS_None, // VPORYrm = 16131 |
| 160346 | CEFBS_None, // VPORYrr = 16132 |
| 160347 | CEFBS_None, // VPORrm = 16133 |
| 160348 | CEFBS_None, // VPORrr = 16134 |
| 160349 | CEFBS_None, // VPPERMrmr = 16135 |
| 160350 | CEFBS_None, // VPPERMrrm = 16136 |
| 160351 | CEFBS_None, // VPPERMrrr = 16137 |
| 160352 | CEFBS_None, // VPPERMrrr_REV = 16138 |
| 160353 | CEFBS_None, // VPROLDZ128mbi = 16139 |
| 160354 | CEFBS_None, // VPROLDZ128mbik = 16140 |
| 160355 | CEFBS_None, // VPROLDZ128mbikz = 16141 |
| 160356 | CEFBS_None, // VPROLDZ128mi = 16142 |
| 160357 | CEFBS_None, // VPROLDZ128mik = 16143 |
| 160358 | CEFBS_None, // VPROLDZ128mikz = 16144 |
| 160359 | CEFBS_None, // VPROLDZ128ri = 16145 |
| 160360 | CEFBS_None, // VPROLDZ128rik = 16146 |
| 160361 | CEFBS_None, // VPROLDZ128rikz = 16147 |
| 160362 | CEFBS_None, // VPROLDZ256mbi = 16148 |
| 160363 | CEFBS_None, // VPROLDZ256mbik = 16149 |
| 160364 | CEFBS_None, // VPROLDZ256mbikz = 16150 |
| 160365 | CEFBS_None, // VPROLDZ256mi = 16151 |
| 160366 | CEFBS_None, // VPROLDZ256mik = 16152 |
| 160367 | CEFBS_None, // VPROLDZ256mikz = 16153 |
| 160368 | CEFBS_None, // VPROLDZ256ri = 16154 |
| 160369 | CEFBS_None, // VPROLDZ256rik = 16155 |
| 160370 | CEFBS_None, // VPROLDZ256rikz = 16156 |
| 160371 | CEFBS_None, // VPROLDZmbi = 16157 |
| 160372 | CEFBS_None, // VPROLDZmbik = 16158 |
| 160373 | CEFBS_None, // VPROLDZmbikz = 16159 |
| 160374 | CEFBS_None, // VPROLDZmi = 16160 |
| 160375 | CEFBS_None, // VPROLDZmik = 16161 |
| 160376 | CEFBS_None, // VPROLDZmikz = 16162 |
| 160377 | CEFBS_None, // VPROLDZri = 16163 |
| 160378 | CEFBS_None, // VPROLDZrik = 16164 |
| 160379 | CEFBS_None, // VPROLDZrikz = 16165 |
| 160380 | CEFBS_None, // VPROLQZ128mbi = 16166 |
| 160381 | CEFBS_None, // VPROLQZ128mbik = 16167 |
| 160382 | CEFBS_None, // VPROLQZ128mbikz = 16168 |
| 160383 | CEFBS_None, // VPROLQZ128mi = 16169 |
| 160384 | CEFBS_None, // VPROLQZ128mik = 16170 |
| 160385 | CEFBS_None, // VPROLQZ128mikz = 16171 |
| 160386 | CEFBS_None, // VPROLQZ128ri = 16172 |
| 160387 | CEFBS_None, // VPROLQZ128rik = 16173 |
| 160388 | CEFBS_None, // VPROLQZ128rikz = 16174 |
| 160389 | CEFBS_None, // VPROLQZ256mbi = 16175 |
| 160390 | CEFBS_None, // VPROLQZ256mbik = 16176 |
| 160391 | CEFBS_None, // VPROLQZ256mbikz = 16177 |
| 160392 | CEFBS_None, // VPROLQZ256mi = 16178 |
| 160393 | CEFBS_None, // VPROLQZ256mik = 16179 |
| 160394 | CEFBS_None, // VPROLQZ256mikz = 16180 |
| 160395 | CEFBS_None, // VPROLQZ256ri = 16181 |
| 160396 | CEFBS_None, // VPROLQZ256rik = 16182 |
| 160397 | CEFBS_None, // VPROLQZ256rikz = 16183 |
| 160398 | CEFBS_None, // VPROLQZmbi = 16184 |
| 160399 | CEFBS_None, // VPROLQZmbik = 16185 |
| 160400 | CEFBS_None, // VPROLQZmbikz = 16186 |
| 160401 | CEFBS_None, // VPROLQZmi = 16187 |
| 160402 | CEFBS_None, // VPROLQZmik = 16188 |
| 160403 | CEFBS_None, // VPROLQZmikz = 16189 |
| 160404 | CEFBS_None, // VPROLQZri = 16190 |
| 160405 | CEFBS_None, // VPROLQZrik = 16191 |
| 160406 | CEFBS_None, // VPROLQZrikz = 16192 |
| 160407 | CEFBS_None, // VPROLVDZ128rm = 16193 |
| 160408 | CEFBS_None, // VPROLVDZ128rmb = 16194 |
| 160409 | CEFBS_None, // VPROLVDZ128rmbk = 16195 |
| 160410 | CEFBS_None, // VPROLVDZ128rmbkz = 16196 |
| 160411 | CEFBS_None, // VPROLVDZ128rmk = 16197 |
| 160412 | CEFBS_None, // VPROLVDZ128rmkz = 16198 |
| 160413 | CEFBS_None, // VPROLVDZ128rr = 16199 |
| 160414 | CEFBS_None, // VPROLVDZ128rrk = 16200 |
| 160415 | CEFBS_None, // VPROLVDZ128rrkz = 16201 |
| 160416 | CEFBS_None, // VPROLVDZ256rm = 16202 |
| 160417 | CEFBS_None, // VPROLVDZ256rmb = 16203 |
| 160418 | CEFBS_None, // VPROLVDZ256rmbk = 16204 |
| 160419 | CEFBS_None, // VPROLVDZ256rmbkz = 16205 |
| 160420 | CEFBS_None, // VPROLVDZ256rmk = 16206 |
| 160421 | CEFBS_None, // VPROLVDZ256rmkz = 16207 |
| 160422 | CEFBS_None, // VPROLVDZ256rr = 16208 |
| 160423 | CEFBS_None, // VPROLVDZ256rrk = 16209 |
| 160424 | CEFBS_None, // VPROLVDZ256rrkz = 16210 |
| 160425 | CEFBS_None, // VPROLVDZrm = 16211 |
| 160426 | CEFBS_None, // VPROLVDZrmb = 16212 |
| 160427 | CEFBS_None, // VPROLVDZrmbk = 16213 |
| 160428 | CEFBS_None, // VPROLVDZrmbkz = 16214 |
| 160429 | CEFBS_None, // VPROLVDZrmk = 16215 |
| 160430 | CEFBS_None, // VPROLVDZrmkz = 16216 |
| 160431 | CEFBS_None, // VPROLVDZrr = 16217 |
| 160432 | CEFBS_None, // VPROLVDZrrk = 16218 |
| 160433 | CEFBS_None, // VPROLVDZrrkz = 16219 |
| 160434 | CEFBS_None, // VPROLVQZ128rm = 16220 |
| 160435 | CEFBS_None, // VPROLVQZ128rmb = 16221 |
| 160436 | CEFBS_None, // VPROLVQZ128rmbk = 16222 |
| 160437 | CEFBS_None, // VPROLVQZ128rmbkz = 16223 |
| 160438 | CEFBS_None, // VPROLVQZ128rmk = 16224 |
| 160439 | CEFBS_None, // VPROLVQZ128rmkz = 16225 |
| 160440 | CEFBS_None, // VPROLVQZ128rr = 16226 |
| 160441 | CEFBS_None, // VPROLVQZ128rrk = 16227 |
| 160442 | CEFBS_None, // VPROLVQZ128rrkz = 16228 |
| 160443 | CEFBS_None, // VPROLVQZ256rm = 16229 |
| 160444 | CEFBS_None, // VPROLVQZ256rmb = 16230 |
| 160445 | CEFBS_None, // VPROLVQZ256rmbk = 16231 |
| 160446 | CEFBS_None, // VPROLVQZ256rmbkz = 16232 |
| 160447 | CEFBS_None, // VPROLVQZ256rmk = 16233 |
| 160448 | CEFBS_None, // VPROLVQZ256rmkz = 16234 |
| 160449 | CEFBS_None, // VPROLVQZ256rr = 16235 |
| 160450 | CEFBS_None, // VPROLVQZ256rrk = 16236 |
| 160451 | CEFBS_None, // VPROLVQZ256rrkz = 16237 |
| 160452 | CEFBS_None, // VPROLVQZrm = 16238 |
| 160453 | CEFBS_None, // VPROLVQZrmb = 16239 |
| 160454 | CEFBS_None, // VPROLVQZrmbk = 16240 |
| 160455 | CEFBS_None, // VPROLVQZrmbkz = 16241 |
| 160456 | CEFBS_None, // VPROLVQZrmk = 16242 |
| 160457 | CEFBS_None, // VPROLVQZrmkz = 16243 |
| 160458 | CEFBS_None, // VPROLVQZrr = 16244 |
| 160459 | CEFBS_None, // VPROLVQZrrk = 16245 |
| 160460 | CEFBS_None, // VPROLVQZrrkz = 16246 |
| 160461 | CEFBS_None, // VPRORDZ128mbi = 16247 |
| 160462 | CEFBS_None, // VPRORDZ128mbik = 16248 |
| 160463 | CEFBS_None, // VPRORDZ128mbikz = 16249 |
| 160464 | CEFBS_None, // VPRORDZ128mi = 16250 |
| 160465 | CEFBS_None, // VPRORDZ128mik = 16251 |
| 160466 | CEFBS_None, // VPRORDZ128mikz = 16252 |
| 160467 | CEFBS_None, // VPRORDZ128ri = 16253 |
| 160468 | CEFBS_None, // VPRORDZ128rik = 16254 |
| 160469 | CEFBS_None, // VPRORDZ128rikz = 16255 |
| 160470 | CEFBS_None, // VPRORDZ256mbi = 16256 |
| 160471 | CEFBS_None, // VPRORDZ256mbik = 16257 |
| 160472 | CEFBS_None, // VPRORDZ256mbikz = 16258 |
| 160473 | CEFBS_None, // VPRORDZ256mi = 16259 |
| 160474 | CEFBS_None, // VPRORDZ256mik = 16260 |
| 160475 | CEFBS_None, // VPRORDZ256mikz = 16261 |
| 160476 | CEFBS_None, // VPRORDZ256ri = 16262 |
| 160477 | CEFBS_None, // VPRORDZ256rik = 16263 |
| 160478 | CEFBS_None, // VPRORDZ256rikz = 16264 |
| 160479 | CEFBS_None, // VPRORDZmbi = 16265 |
| 160480 | CEFBS_None, // VPRORDZmbik = 16266 |
| 160481 | CEFBS_None, // VPRORDZmbikz = 16267 |
| 160482 | CEFBS_None, // VPRORDZmi = 16268 |
| 160483 | CEFBS_None, // VPRORDZmik = 16269 |
| 160484 | CEFBS_None, // VPRORDZmikz = 16270 |
| 160485 | CEFBS_None, // VPRORDZri = 16271 |
| 160486 | CEFBS_None, // VPRORDZrik = 16272 |
| 160487 | CEFBS_None, // VPRORDZrikz = 16273 |
| 160488 | CEFBS_None, // VPRORQZ128mbi = 16274 |
| 160489 | CEFBS_None, // VPRORQZ128mbik = 16275 |
| 160490 | CEFBS_None, // VPRORQZ128mbikz = 16276 |
| 160491 | CEFBS_None, // VPRORQZ128mi = 16277 |
| 160492 | CEFBS_None, // VPRORQZ128mik = 16278 |
| 160493 | CEFBS_None, // VPRORQZ128mikz = 16279 |
| 160494 | CEFBS_None, // VPRORQZ128ri = 16280 |
| 160495 | CEFBS_None, // VPRORQZ128rik = 16281 |
| 160496 | CEFBS_None, // VPRORQZ128rikz = 16282 |
| 160497 | CEFBS_None, // VPRORQZ256mbi = 16283 |
| 160498 | CEFBS_None, // VPRORQZ256mbik = 16284 |
| 160499 | CEFBS_None, // VPRORQZ256mbikz = 16285 |
| 160500 | CEFBS_None, // VPRORQZ256mi = 16286 |
| 160501 | CEFBS_None, // VPRORQZ256mik = 16287 |
| 160502 | CEFBS_None, // VPRORQZ256mikz = 16288 |
| 160503 | CEFBS_None, // VPRORQZ256ri = 16289 |
| 160504 | CEFBS_None, // VPRORQZ256rik = 16290 |
| 160505 | CEFBS_None, // VPRORQZ256rikz = 16291 |
| 160506 | CEFBS_None, // VPRORQZmbi = 16292 |
| 160507 | CEFBS_None, // VPRORQZmbik = 16293 |
| 160508 | CEFBS_None, // VPRORQZmbikz = 16294 |
| 160509 | CEFBS_None, // VPRORQZmi = 16295 |
| 160510 | CEFBS_None, // VPRORQZmik = 16296 |
| 160511 | CEFBS_None, // VPRORQZmikz = 16297 |
| 160512 | CEFBS_None, // VPRORQZri = 16298 |
| 160513 | CEFBS_None, // VPRORQZrik = 16299 |
| 160514 | CEFBS_None, // VPRORQZrikz = 16300 |
| 160515 | CEFBS_None, // VPRORVDZ128rm = 16301 |
| 160516 | CEFBS_None, // VPRORVDZ128rmb = 16302 |
| 160517 | CEFBS_None, // VPRORVDZ128rmbk = 16303 |
| 160518 | CEFBS_None, // VPRORVDZ128rmbkz = 16304 |
| 160519 | CEFBS_None, // VPRORVDZ128rmk = 16305 |
| 160520 | CEFBS_None, // VPRORVDZ128rmkz = 16306 |
| 160521 | CEFBS_None, // VPRORVDZ128rr = 16307 |
| 160522 | CEFBS_None, // VPRORVDZ128rrk = 16308 |
| 160523 | CEFBS_None, // VPRORVDZ128rrkz = 16309 |
| 160524 | CEFBS_None, // VPRORVDZ256rm = 16310 |
| 160525 | CEFBS_None, // VPRORVDZ256rmb = 16311 |
| 160526 | CEFBS_None, // VPRORVDZ256rmbk = 16312 |
| 160527 | CEFBS_None, // VPRORVDZ256rmbkz = 16313 |
| 160528 | CEFBS_None, // VPRORVDZ256rmk = 16314 |
| 160529 | CEFBS_None, // VPRORVDZ256rmkz = 16315 |
| 160530 | CEFBS_None, // VPRORVDZ256rr = 16316 |
| 160531 | CEFBS_None, // VPRORVDZ256rrk = 16317 |
| 160532 | CEFBS_None, // VPRORVDZ256rrkz = 16318 |
| 160533 | CEFBS_None, // VPRORVDZrm = 16319 |
| 160534 | CEFBS_None, // VPRORVDZrmb = 16320 |
| 160535 | CEFBS_None, // VPRORVDZrmbk = 16321 |
| 160536 | CEFBS_None, // VPRORVDZrmbkz = 16322 |
| 160537 | CEFBS_None, // VPRORVDZrmk = 16323 |
| 160538 | CEFBS_None, // VPRORVDZrmkz = 16324 |
| 160539 | CEFBS_None, // VPRORVDZrr = 16325 |
| 160540 | CEFBS_None, // VPRORVDZrrk = 16326 |
| 160541 | CEFBS_None, // VPRORVDZrrkz = 16327 |
| 160542 | CEFBS_None, // VPRORVQZ128rm = 16328 |
| 160543 | CEFBS_None, // VPRORVQZ128rmb = 16329 |
| 160544 | CEFBS_None, // VPRORVQZ128rmbk = 16330 |
| 160545 | CEFBS_None, // VPRORVQZ128rmbkz = 16331 |
| 160546 | CEFBS_None, // VPRORVQZ128rmk = 16332 |
| 160547 | CEFBS_None, // VPRORVQZ128rmkz = 16333 |
| 160548 | CEFBS_None, // VPRORVQZ128rr = 16334 |
| 160549 | CEFBS_None, // VPRORVQZ128rrk = 16335 |
| 160550 | CEFBS_None, // VPRORVQZ128rrkz = 16336 |
| 160551 | CEFBS_None, // VPRORVQZ256rm = 16337 |
| 160552 | CEFBS_None, // VPRORVQZ256rmb = 16338 |
| 160553 | CEFBS_None, // VPRORVQZ256rmbk = 16339 |
| 160554 | CEFBS_None, // VPRORVQZ256rmbkz = 16340 |
| 160555 | CEFBS_None, // VPRORVQZ256rmk = 16341 |
| 160556 | CEFBS_None, // VPRORVQZ256rmkz = 16342 |
| 160557 | CEFBS_None, // VPRORVQZ256rr = 16343 |
| 160558 | CEFBS_None, // VPRORVQZ256rrk = 16344 |
| 160559 | CEFBS_None, // VPRORVQZ256rrkz = 16345 |
| 160560 | CEFBS_None, // VPRORVQZrm = 16346 |
| 160561 | CEFBS_None, // VPRORVQZrmb = 16347 |
| 160562 | CEFBS_None, // VPRORVQZrmbk = 16348 |
| 160563 | CEFBS_None, // VPRORVQZrmbkz = 16349 |
| 160564 | CEFBS_None, // VPRORVQZrmk = 16350 |
| 160565 | CEFBS_None, // VPRORVQZrmkz = 16351 |
| 160566 | CEFBS_None, // VPRORVQZrr = 16352 |
| 160567 | CEFBS_None, // VPRORVQZrrk = 16353 |
| 160568 | CEFBS_None, // VPRORVQZrrkz = 16354 |
| 160569 | CEFBS_None, // VPROTBmi = 16355 |
| 160570 | CEFBS_None, // VPROTBmr = 16356 |
| 160571 | CEFBS_None, // VPROTBri = 16357 |
| 160572 | CEFBS_None, // VPROTBrm = 16358 |
| 160573 | CEFBS_None, // VPROTBrr = 16359 |
| 160574 | CEFBS_None, // VPROTBrr_REV = 16360 |
| 160575 | CEFBS_None, // VPROTDmi = 16361 |
| 160576 | CEFBS_None, // VPROTDmr = 16362 |
| 160577 | CEFBS_None, // VPROTDri = 16363 |
| 160578 | CEFBS_None, // VPROTDrm = 16364 |
| 160579 | CEFBS_None, // VPROTDrr = 16365 |
| 160580 | CEFBS_None, // VPROTDrr_REV = 16366 |
| 160581 | CEFBS_None, // VPROTQmi = 16367 |
| 160582 | CEFBS_None, // VPROTQmr = 16368 |
| 160583 | CEFBS_None, // VPROTQri = 16369 |
| 160584 | CEFBS_None, // VPROTQrm = 16370 |
| 160585 | CEFBS_None, // VPROTQrr = 16371 |
| 160586 | CEFBS_None, // VPROTQrr_REV = 16372 |
| 160587 | CEFBS_None, // VPROTWmi = 16373 |
| 160588 | CEFBS_None, // VPROTWmr = 16374 |
| 160589 | CEFBS_None, // VPROTWri = 16375 |
| 160590 | CEFBS_None, // VPROTWrm = 16376 |
| 160591 | CEFBS_None, // VPROTWrr = 16377 |
| 160592 | CEFBS_None, // VPROTWrr_REV = 16378 |
| 160593 | CEFBS_None, // VPSADBWYrm = 16379 |
| 160594 | CEFBS_None, // VPSADBWYrr = 16380 |
| 160595 | CEFBS_None, // VPSADBWZ128rm = 16381 |
| 160596 | CEFBS_None, // VPSADBWZ128rr = 16382 |
| 160597 | CEFBS_None, // VPSADBWZ256rm = 16383 |
| 160598 | CEFBS_None, // VPSADBWZ256rr = 16384 |
| 160599 | CEFBS_None, // VPSADBWZrm = 16385 |
| 160600 | CEFBS_None, // VPSADBWZrr = 16386 |
| 160601 | CEFBS_None, // VPSADBWrm = 16387 |
| 160602 | CEFBS_None, // VPSADBWrr = 16388 |
| 160603 | CEFBS_None, // VPSCATTERDDZ128mr = 16389 |
| 160604 | CEFBS_None, // VPSCATTERDDZ256mr = 16390 |
| 160605 | CEFBS_None, // VPSCATTERDDZmr = 16391 |
| 160606 | CEFBS_None, // VPSCATTERDQZ128mr = 16392 |
| 160607 | CEFBS_None, // VPSCATTERDQZ256mr = 16393 |
| 160608 | CEFBS_None, // VPSCATTERDQZmr = 16394 |
| 160609 | CEFBS_None, // VPSCATTERQDZ128mr = 16395 |
| 160610 | CEFBS_None, // VPSCATTERQDZ256mr = 16396 |
| 160611 | CEFBS_None, // VPSCATTERQDZmr = 16397 |
| 160612 | CEFBS_None, // VPSCATTERQQZ128mr = 16398 |
| 160613 | CEFBS_None, // VPSCATTERQQZ256mr = 16399 |
| 160614 | CEFBS_None, // VPSCATTERQQZmr = 16400 |
| 160615 | CEFBS_None, // VPSHABmr = 16401 |
| 160616 | CEFBS_None, // VPSHABrm = 16402 |
| 160617 | CEFBS_None, // VPSHABrr = 16403 |
| 160618 | CEFBS_None, // VPSHABrr_REV = 16404 |
| 160619 | CEFBS_None, // VPSHADmr = 16405 |
| 160620 | CEFBS_None, // VPSHADrm = 16406 |
| 160621 | CEFBS_None, // VPSHADrr = 16407 |
| 160622 | CEFBS_None, // VPSHADrr_REV = 16408 |
| 160623 | CEFBS_None, // VPSHAQmr = 16409 |
| 160624 | CEFBS_None, // VPSHAQrm = 16410 |
| 160625 | CEFBS_None, // VPSHAQrr = 16411 |
| 160626 | CEFBS_None, // VPSHAQrr_REV = 16412 |
| 160627 | CEFBS_None, // VPSHAWmr = 16413 |
| 160628 | CEFBS_None, // VPSHAWrm = 16414 |
| 160629 | CEFBS_None, // VPSHAWrr = 16415 |
| 160630 | CEFBS_None, // VPSHAWrr_REV = 16416 |
| 160631 | CEFBS_None, // VPSHLBmr = 16417 |
| 160632 | CEFBS_None, // VPSHLBrm = 16418 |
| 160633 | CEFBS_None, // VPSHLBrr = 16419 |
| 160634 | CEFBS_None, // VPSHLBrr_REV = 16420 |
| 160635 | CEFBS_None, // VPSHLDDZ128rmbi = 16421 |
| 160636 | CEFBS_None, // VPSHLDDZ128rmbik = 16422 |
| 160637 | CEFBS_None, // VPSHLDDZ128rmbikz = 16423 |
| 160638 | CEFBS_None, // VPSHLDDZ128rmi = 16424 |
| 160639 | CEFBS_None, // VPSHLDDZ128rmik = 16425 |
| 160640 | CEFBS_None, // VPSHLDDZ128rmikz = 16426 |
| 160641 | CEFBS_None, // VPSHLDDZ128rri = 16427 |
| 160642 | CEFBS_None, // VPSHLDDZ128rrik = 16428 |
| 160643 | CEFBS_None, // VPSHLDDZ128rrikz = 16429 |
| 160644 | CEFBS_None, // VPSHLDDZ256rmbi = 16430 |
| 160645 | CEFBS_None, // VPSHLDDZ256rmbik = 16431 |
| 160646 | CEFBS_None, // VPSHLDDZ256rmbikz = 16432 |
| 160647 | CEFBS_None, // VPSHLDDZ256rmi = 16433 |
| 160648 | CEFBS_None, // VPSHLDDZ256rmik = 16434 |
| 160649 | CEFBS_None, // VPSHLDDZ256rmikz = 16435 |
| 160650 | CEFBS_None, // VPSHLDDZ256rri = 16436 |
| 160651 | CEFBS_None, // VPSHLDDZ256rrik = 16437 |
| 160652 | CEFBS_None, // VPSHLDDZ256rrikz = 16438 |
| 160653 | CEFBS_None, // VPSHLDDZrmbi = 16439 |
| 160654 | CEFBS_None, // VPSHLDDZrmbik = 16440 |
| 160655 | CEFBS_None, // VPSHLDDZrmbikz = 16441 |
| 160656 | CEFBS_None, // VPSHLDDZrmi = 16442 |
| 160657 | CEFBS_None, // VPSHLDDZrmik = 16443 |
| 160658 | CEFBS_None, // VPSHLDDZrmikz = 16444 |
| 160659 | CEFBS_None, // VPSHLDDZrri = 16445 |
| 160660 | CEFBS_None, // VPSHLDDZrrik = 16446 |
| 160661 | CEFBS_None, // VPSHLDDZrrikz = 16447 |
| 160662 | CEFBS_None, // VPSHLDQZ128rmbi = 16448 |
| 160663 | CEFBS_None, // VPSHLDQZ128rmbik = 16449 |
| 160664 | CEFBS_None, // VPSHLDQZ128rmbikz = 16450 |
| 160665 | CEFBS_None, // VPSHLDQZ128rmi = 16451 |
| 160666 | CEFBS_None, // VPSHLDQZ128rmik = 16452 |
| 160667 | CEFBS_None, // VPSHLDQZ128rmikz = 16453 |
| 160668 | CEFBS_None, // VPSHLDQZ128rri = 16454 |
| 160669 | CEFBS_None, // VPSHLDQZ128rrik = 16455 |
| 160670 | CEFBS_None, // VPSHLDQZ128rrikz = 16456 |
| 160671 | CEFBS_None, // VPSHLDQZ256rmbi = 16457 |
| 160672 | CEFBS_None, // VPSHLDQZ256rmbik = 16458 |
| 160673 | CEFBS_None, // VPSHLDQZ256rmbikz = 16459 |
| 160674 | CEFBS_None, // VPSHLDQZ256rmi = 16460 |
| 160675 | CEFBS_None, // VPSHLDQZ256rmik = 16461 |
| 160676 | CEFBS_None, // VPSHLDQZ256rmikz = 16462 |
| 160677 | CEFBS_None, // VPSHLDQZ256rri = 16463 |
| 160678 | CEFBS_None, // VPSHLDQZ256rrik = 16464 |
| 160679 | CEFBS_None, // VPSHLDQZ256rrikz = 16465 |
| 160680 | CEFBS_None, // VPSHLDQZrmbi = 16466 |
| 160681 | CEFBS_None, // VPSHLDQZrmbik = 16467 |
| 160682 | CEFBS_None, // VPSHLDQZrmbikz = 16468 |
| 160683 | CEFBS_None, // VPSHLDQZrmi = 16469 |
| 160684 | CEFBS_None, // VPSHLDQZrmik = 16470 |
| 160685 | CEFBS_None, // VPSHLDQZrmikz = 16471 |
| 160686 | CEFBS_None, // VPSHLDQZrri = 16472 |
| 160687 | CEFBS_None, // VPSHLDQZrrik = 16473 |
| 160688 | CEFBS_None, // VPSHLDQZrrikz = 16474 |
| 160689 | CEFBS_None, // VPSHLDVDZ128m = 16475 |
| 160690 | CEFBS_None, // VPSHLDVDZ128mb = 16476 |
| 160691 | CEFBS_None, // VPSHLDVDZ128mbk = 16477 |
| 160692 | CEFBS_None, // VPSHLDVDZ128mbkz = 16478 |
| 160693 | CEFBS_None, // VPSHLDVDZ128mk = 16479 |
| 160694 | CEFBS_None, // VPSHLDVDZ128mkz = 16480 |
| 160695 | CEFBS_None, // VPSHLDVDZ128r = 16481 |
| 160696 | CEFBS_None, // VPSHLDVDZ128rk = 16482 |
| 160697 | CEFBS_None, // VPSHLDVDZ128rkz = 16483 |
| 160698 | CEFBS_None, // VPSHLDVDZ256m = 16484 |
| 160699 | CEFBS_None, // VPSHLDVDZ256mb = 16485 |
| 160700 | CEFBS_None, // VPSHLDVDZ256mbk = 16486 |
| 160701 | CEFBS_None, // VPSHLDVDZ256mbkz = 16487 |
| 160702 | CEFBS_None, // VPSHLDVDZ256mk = 16488 |
| 160703 | CEFBS_None, // VPSHLDVDZ256mkz = 16489 |
| 160704 | CEFBS_None, // VPSHLDVDZ256r = 16490 |
| 160705 | CEFBS_None, // VPSHLDVDZ256rk = 16491 |
| 160706 | CEFBS_None, // VPSHLDVDZ256rkz = 16492 |
| 160707 | CEFBS_None, // VPSHLDVDZm = 16493 |
| 160708 | CEFBS_None, // VPSHLDVDZmb = 16494 |
| 160709 | CEFBS_None, // VPSHLDVDZmbk = 16495 |
| 160710 | CEFBS_None, // VPSHLDVDZmbkz = 16496 |
| 160711 | CEFBS_None, // VPSHLDVDZmk = 16497 |
| 160712 | CEFBS_None, // VPSHLDVDZmkz = 16498 |
| 160713 | CEFBS_None, // VPSHLDVDZr = 16499 |
| 160714 | CEFBS_None, // VPSHLDVDZrk = 16500 |
| 160715 | CEFBS_None, // VPSHLDVDZrkz = 16501 |
| 160716 | CEFBS_None, // VPSHLDVQZ128m = 16502 |
| 160717 | CEFBS_None, // VPSHLDVQZ128mb = 16503 |
| 160718 | CEFBS_None, // VPSHLDVQZ128mbk = 16504 |
| 160719 | CEFBS_None, // VPSHLDVQZ128mbkz = 16505 |
| 160720 | CEFBS_None, // VPSHLDVQZ128mk = 16506 |
| 160721 | CEFBS_None, // VPSHLDVQZ128mkz = 16507 |
| 160722 | CEFBS_None, // VPSHLDVQZ128r = 16508 |
| 160723 | CEFBS_None, // VPSHLDVQZ128rk = 16509 |
| 160724 | CEFBS_None, // VPSHLDVQZ128rkz = 16510 |
| 160725 | CEFBS_None, // VPSHLDVQZ256m = 16511 |
| 160726 | CEFBS_None, // VPSHLDVQZ256mb = 16512 |
| 160727 | CEFBS_None, // VPSHLDVQZ256mbk = 16513 |
| 160728 | CEFBS_None, // VPSHLDVQZ256mbkz = 16514 |
| 160729 | CEFBS_None, // VPSHLDVQZ256mk = 16515 |
| 160730 | CEFBS_None, // VPSHLDVQZ256mkz = 16516 |
| 160731 | CEFBS_None, // VPSHLDVQZ256r = 16517 |
| 160732 | CEFBS_None, // VPSHLDVQZ256rk = 16518 |
| 160733 | CEFBS_None, // VPSHLDVQZ256rkz = 16519 |
| 160734 | CEFBS_None, // VPSHLDVQZm = 16520 |
| 160735 | CEFBS_None, // VPSHLDVQZmb = 16521 |
| 160736 | CEFBS_None, // VPSHLDVQZmbk = 16522 |
| 160737 | CEFBS_None, // VPSHLDVQZmbkz = 16523 |
| 160738 | CEFBS_None, // VPSHLDVQZmk = 16524 |
| 160739 | CEFBS_None, // VPSHLDVQZmkz = 16525 |
| 160740 | CEFBS_None, // VPSHLDVQZr = 16526 |
| 160741 | CEFBS_None, // VPSHLDVQZrk = 16527 |
| 160742 | CEFBS_None, // VPSHLDVQZrkz = 16528 |
| 160743 | CEFBS_None, // VPSHLDVWZ128m = 16529 |
| 160744 | CEFBS_None, // VPSHLDVWZ128mk = 16530 |
| 160745 | CEFBS_None, // VPSHLDVWZ128mkz = 16531 |
| 160746 | CEFBS_None, // VPSHLDVWZ128r = 16532 |
| 160747 | CEFBS_None, // VPSHLDVWZ128rk = 16533 |
| 160748 | CEFBS_None, // VPSHLDVWZ128rkz = 16534 |
| 160749 | CEFBS_None, // VPSHLDVWZ256m = 16535 |
| 160750 | CEFBS_None, // VPSHLDVWZ256mk = 16536 |
| 160751 | CEFBS_None, // VPSHLDVWZ256mkz = 16537 |
| 160752 | CEFBS_None, // VPSHLDVWZ256r = 16538 |
| 160753 | CEFBS_None, // VPSHLDVWZ256rk = 16539 |
| 160754 | CEFBS_None, // VPSHLDVWZ256rkz = 16540 |
| 160755 | CEFBS_None, // VPSHLDVWZm = 16541 |
| 160756 | CEFBS_None, // VPSHLDVWZmk = 16542 |
| 160757 | CEFBS_None, // VPSHLDVWZmkz = 16543 |
| 160758 | CEFBS_None, // VPSHLDVWZr = 16544 |
| 160759 | CEFBS_None, // VPSHLDVWZrk = 16545 |
| 160760 | CEFBS_None, // VPSHLDVWZrkz = 16546 |
| 160761 | CEFBS_None, // VPSHLDWZ128rmi = 16547 |
| 160762 | CEFBS_None, // VPSHLDWZ128rmik = 16548 |
| 160763 | CEFBS_None, // VPSHLDWZ128rmikz = 16549 |
| 160764 | CEFBS_None, // VPSHLDWZ128rri = 16550 |
| 160765 | CEFBS_None, // VPSHLDWZ128rrik = 16551 |
| 160766 | CEFBS_None, // VPSHLDWZ128rrikz = 16552 |
| 160767 | CEFBS_None, // VPSHLDWZ256rmi = 16553 |
| 160768 | CEFBS_None, // VPSHLDWZ256rmik = 16554 |
| 160769 | CEFBS_None, // VPSHLDWZ256rmikz = 16555 |
| 160770 | CEFBS_None, // VPSHLDWZ256rri = 16556 |
| 160771 | CEFBS_None, // VPSHLDWZ256rrik = 16557 |
| 160772 | CEFBS_None, // VPSHLDWZ256rrikz = 16558 |
| 160773 | CEFBS_None, // VPSHLDWZrmi = 16559 |
| 160774 | CEFBS_None, // VPSHLDWZrmik = 16560 |
| 160775 | CEFBS_None, // VPSHLDWZrmikz = 16561 |
| 160776 | CEFBS_None, // VPSHLDWZrri = 16562 |
| 160777 | CEFBS_None, // VPSHLDWZrrik = 16563 |
| 160778 | CEFBS_None, // VPSHLDWZrrikz = 16564 |
| 160779 | CEFBS_None, // VPSHLDmr = 16565 |
| 160780 | CEFBS_None, // VPSHLDrm = 16566 |
| 160781 | CEFBS_None, // VPSHLDrr = 16567 |
| 160782 | CEFBS_None, // VPSHLDrr_REV = 16568 |
| 160783 | CEFBS_None, // VPSHLQmr = 16569 |
| 160784 | CEFBS_None, // VPSHLQrm = 16570 |
| 160785 | CEFBS_None, // VPSHLQrr = 16571 |
| 160786 | CEFBS_None, // VPSHLQrr_REV = 16572 |
| 160787 | CEFBS_None, // VPSHLWmr = 16573 |
| 160788 | CEFBS_None, // VPSHLWrm = 16574 |
| 160789 | CEFBS_None, // VPSHLWrr = 16575 |
| 160790 | CEFBS_None, // VPSHLWrr_REV = 16576 |
| 160791 | CEFBS_None, // VPSHRDDZ128rmbi = 16577 |
| 160792 | CEFBS_None, // VPSHRDDZ128rmbik = 16578 |
| 160793 | CEFBS_None, // VPSHRDDZ128rmbikz = 16579 |
| 160794 | CEFBS_None, // VPSHRDDZ128rmi = 16580 |
| 160795 | CEFBS_None, // VPSHRDDZ128rmik = 16581 |
| 160796 | CEFBS_None, // VPSHRDDZ128rmikz = 16582 |
| 160797 | CEFBS_None, // VPSHRDDZ128rri = 16583 |
| 160798 | CEFBS_None, // VPSHRDDZ128rrik = 16584 |
| 160799 | CEFBS_None, // VPSHRDDZ128rrikz = 16585 |
| 160800 | CEFBS_None, // VPSHRDDZ256rmbi = 16586 |
| 160801 | CEFBS_None, // VPSHRDDZ256rmbik = 16587 |
| 160802 | CEFBS_None, // VPSHRDDZ256rmbikz = 16588 |
| 160803 | CEFBS_None, // VPSHRDDZ256rmi = 16589 |
| 160804 | CEFBS_None, // VPSHRDDZ256rmik = 16590 |
| 160805 | CEFBS_None, // VPSHRDDZ256rmikz = 16591 |
| 160806 | CEFBS_None, // VPSHRDDZ256rri = 16592 |
| 160807 | CEFBS_None, // VPSHRDDZ256rrik = 16593 |
| 160808 | CEFBS_None, // VPSHRDDZ256rrikz = 16594 |
| 160809 | CEFBS_None, // VPSHRDDZrmbi = 16595 |
| 160810 | CEFBS_None, // VPSHRDDZrmbik = 16596 |
| 160811 | CEFBS_None, // VPSHRDDZrmbikz = 16597 |
| 160812 | CEFBS_None, // VPSHRDDZrmi = 16598 |
| 160813 | CEFBS_None, // VPSHRDDZrmik = 16599 |
| 160814 | CEFBS_None, // VPSHRDDZrmikz = 16600 |
| 160815 | CEFBS_None, // VPSHRDDZrri = 16601 |
| 160816 | CEFBS_None, // VPSHRDDZrrik = 16602 |
| 160817 | CEFBS_None, // VPSHRDDZrrikz = 16603 |
| 160818 | CEFBS_None, // VPSHRDQZ128rmbi = 16604 |
| 160819 | CEFBS_None, // VPSHRDQZ128rmbik = 16605 |
| 160820 | CEFBS_None, // VPSHRDQZ128rmbikz = 16606 |
| 160821 | CEFBS_None, // VPSHRDQZ128rmi = 16607 |
| 160822 | CEFBS_None, // VPSHRDQZ128rmik = 16608 |
| 160823 | CEFBS_None, // VPSHRDQZ128rmikz = 16609 |
| 160824 | CEFBS_None, // VPSHRDQZ128rri = 16610 |
| 160825 | CEFBS_None, // VPSHRDQZ128rrik = 16611 |
| 160826 | CEFBS_None, // VPSHRDQZ128rrikz = 16612 |
| 160827 | CEFBS_None, // VPSHRDQZ256rmbi = 16613 |
| 160828 | CEFBS_None, // VPSHRDQZ256rmbik = 16614 |
| 160829 | CEFBS_None, // VPSHRDQZ256rmbikz = 16615 |
| 160830 | CEFBS_None, // VPSHRDQZ256rmi = 16616 |
| 160831 | CEFBS_None, // VPSHRDQZ256rmik = 16617 |
| 160832 | CEFBS_None, // VPSHRDQZ256rmikz = 16618 |
| 160833 | CEFBS_None, // VPSHRDQZ256rri = 16619 |
| 160834 | CEFBS_None, // VPSHRDQZ256rrik = 16620 |
| 160835 | CEFBS_None, // VPSHRDQZ256rrikz = 16621 |
| 160836 | CEFBS_None, // VPSHRDQZrmbi = 16622 |
| 160837 | CEFBS_None, // VPSHRDQZrmbik = 16623 |
| 160838 | CEFBS_None, // VPSHRDQZrmbikz = 16624 |
| 160839 | CEFBS_None, // VPSHRDQZrmi = 16625 |
| 160840 | CEFBS_None, // VPSHRDQZrmik = 16626 |
| 160841 | CEFBS_None, // VPSHRDQZrmikz = 16627 |
| 160842 | CEFBS_None, // VPSHRDQZrri = 16628 |
| 160843 | CEFBS_None, // VPSHRDQZrrik = 16629 |
| 160844 | CEFBS_None, // VPSHRDQZrrikz = 16630 |
| 160845 | CEFBS_None, // VPSHRDVDZ128m = 16631 |
| 160846 | CEFBS_None, // VPSHRDVDZ128mb = 16632 |
| 160847 | CEFBS_None, // VPSHRDVDZ128mbk = 16633 |
| 160848 | CEFBS_None, // VPSHRDVDZ128mbkz = 16634 |
| 160849 | CEFBS_None, // VPSHRDVDZ128mk = 16635 |
| 160850 | CEFBS_None, // VPSHRDVDZ128mkz = 16636 |
| 160851 | CEFBS_None, // VPSHRDVDZ128r = 16637 |
| 160852 | CEFBS_None, // VPSHRDVDZ128rk = 16638 |
| 160853 | CEFBS_None, // VPSHRDVDZ128rkz = 16639 |
| 160854 | CEFBS_None, // VPSHRDVDZ256m = 16640 |
| 160855 | CEFBS_None, // VPSHRDVDZ256mb = 16641 |
| 160856 | CEFBS_None, // VPSHRDVDZ256mbk = 16642 |
| 160857 | CEFBS_None, // VPSHRDVDZ256mbkz = 16643 |
| 160858 | CEFBS_None, // VPSHRDVDZ256mk = 16644 |
| 160859 | CEFBS_None, // VPSHRDVDZ256mkz = 16645 |
| 160860 | CEFBS_None, // VPSHRDVDZ256r = 16646 |
| 160861 | CEFBS_None, // VPSHRDVDZ256rk = 16647 |
| 160862 | CEFBS_None, // VPSHRDVDZ256rkz = 16648 |
| 160863 | CEFBS_None, // VPSHRDVDZm = 16649 |
| 160864 | CEFBS_None, // VPSHRDVDZmb = 16650 |
| 160865 | CEFBS_None, // VPSHRDVDZmbk = 16651 |
| 160866 | CEFBS_None, // VPSHRDVDZmbkz = 16652 |
| 160867 | CEFBS_None, // VPSHRDVDZmk = 16653 |
| 160868 | CEFBS_None, // VPSHRDVDZmkz = 16654 |
| 160869 | CEFBS_None, // VPSHRDVDZr = 16655 |
| 160870 | CEFBS_None, // VPSHRDVDZrk = 16656 |
| 160871 | CEFBS_None, // VPSHRDVDZrkz = 16657 |
| 160872 | CEFBS_None, // VPSHRDVQZ128m = 16658 |
| 160873 | CEFBS_None, // VPSHRDVQZ128mb = 16659 |
| 160874 | CEFBS_None, // VPSHRDVQZ128mbk = 16660 |
| 160875 | CEFBS_None, // VPSHRDVQZ128mbkz = 16661 |
| 160876 | CEFBS_None, // VPSHRDVQZ128mk = 16662 |
| 160877 | CEFBS_None, // VPSHRDVQZ128mkz = 16663 |
| 160878 | CEFBS_None, // VPSHRDVQZ128r = 16664 |
| 160879 | CEFBS_None, // VPSHRDVQZ128rk = 16665 |
| 160880 | CEFBS_None, // VPSHRDVQZ128rkz = 16666 |
| 160881 | CEFBS_None, // VPSHRDVQZ256m = 16667 |
| 160882 | CEFBS_None, // VPSHRDVQZ256mb = 16668 |
| 160883 | CEFBS_None, // VPSHRDVQZ256mbk = 16669 |
| 160884 | CEFBS_None, // VPSHRDVQZ256mbkz = 16670 |
| 160885 | CEFBS_None, // VPSHRDVQZ256mk = 16671 |
| 160886 | CEFBS_None, // VPSHRDVQZ256mkz = 16672 |
| 160887 | CEFBS_None, // VPSHRDVQZ256r = 16673 |
| 160888 | CEFBS_None, // VPSHRDVQZ256rk = 16674 |
| 160889 | CEFBS_None, // VPSHRDVQZ256rkz = 16675 |
| 160890 | CEFBS_None, // VPSHRDVQZm = 16676 |
| 160891 | CEFBS_None, // VPSHRDVQZmb = 16677 |
| 160892 | CEFBS_None, // VPSHRDVQZmbk = 16678 |
| 160893 | CEFBS_None, // VPSHRDVQZmbkz = 16679 |
| 160894 | CEFBS_None, // VPSHRDVQZmk = 16680 |
| 160895 | CEFBS_None, // VPSHRDVQZmkz = 16681 |
| 160896 | CEFBS_None, // VPSHRDVQZr = 16682 |
| 160897 | CEFBS_None, // VPSHRDVQZrk = 16683 |
| 160898 | CEFBS_None, // VPSHRDVQZrkz = 16684 |
| 160899 | CEFBS_None, // VPSHRDVWZ128m = 16685 |
| 160900 | CEFBS_None, // VPSHRDVWZ128mk = 16686 |
| 160901 | CEFBS_None, // VPSHRDVWZ128mkz = 16687 |
| 160902 | CEFBS_None, // VPSHRDVWZ128r = 16688 |
| 160903 | CEFBS_None, // VPSHRDVWZ128rk = 16689 |
| 160904 | CEFBS_None, // VPSHRDVWZ128rkz = 16690 |
| 160905 | CEFBS_None, // VPSHRDVWZ256m = 16691 |
| 160906 | CEFBS_None, // VPSHRDVWZ256mk = 16692 |
| 160907 | CEFBS_None, // VPSHRDVWZ256mkz = 16693 |
| 160908 | CEFBS_None, // VPSHRDVWZ256r = 16694 |
| 160909 | CEFBS_None, // VPSHRDVWZ256rk = 16695 |
| 160910 | CEFBS_None, // VPSHRDVWZ256rkz = 16696 |
| 160911 | CEFBS_None, // VPSHRDVWZm = 16697 |
| 160912 | CEFBS_None, // VPSHRDVWZmk = 16698 |
| 160913 | CEFBS_None, // VPSHRDVWZmkz = 16699 |
| 160914 | CEFBS_None, // VPSHRDVWZr = 16700 |
| 160915 | CEFBS_None, // VPSHRDVWZrk = 16701 |
| 160916 | CEFBS_None, // VPSHRDVWZrkz = 16702 |
| 160917 | CEFBS_None, // VPSHRDWZ128rmi = 16703 |
| 160918 | CEFBS_None, // VPSHRDWZ128rmik = 16704 |
| 160919 | CEFBS_None, // VPSHRDWZ128rmikz = 16705 |
| 160920 | CEFBS_None, // VPSHRDWZ128rri = 16706 |
| 160921 | CEFBS_None, // VPSHRDWZ128rrik = 16707 |
| 160922 | CEFBS_None, // VPSHRDWZ128rrikz = 16708 |
| 160923 | CEFBS_None, // VPSHRDWZ256rmi = 16709 |
| 160924 | CEFBS_None, // VPSHRDWZ256rmik = 16710 |
| 160925 | CEFBS_None, // VPSHRDWZ256rmikz = 16711 |
| 160926 | CEFBS_None, // VPSHRDWZ256rri = 16712 |
| 160927 | CEFBS_None, // VPSHRDWZ256rrik = 16713 |
| 160928 | CEFBS_None, // VPSHRDWZ256rrikz = 16714 |
| 160929 | CEFBS_None, // VPSHRDWZrmi = 16715 |
| 160930 | CEFBS_None, // VPSHRDWZrmik = 16716 |
| 160931 | CEFBS_None, // VPSHRDWZrmikz = 16717 |
| 160932 | CEFBS_None, // VPSHRDWZrri = 16718 |
| 160933 | CEFBS_None, // VPSHRDWZrrik = 16719 |
| 160934 | CEFBS_None, // VPSHRDWZrrikz = 16720 |
| 160935 | CEFBS_None, // VPSHUFBITQMBZ128rm = 16721 |
| 160936 | CEFBS_None, // VPSHUFBITQMBZ128rmk = 16722 |
| 160937 | CEFBS_None, // VPSHUFBITQMBZ128rr = 16723 |
| 160938 | CEFBS_None, // VPSHUFBITQMBZ128rrk = 16724 |
| 160939 | CEFBS_None, // VPSHUFBITQMBZ256rm = 16725 |
| 160940 | CEFBS_None, // VPSHUFBITQMBZ256rmk = 16726 |
| 160941 | CEFBS_None, // VPSHUFBITQMBZ256rr = 16727 |
| 160942 | CEFBS_None, // VPSHUFBITQMBZ256rrk = 16728 |
| 160943 | CEFBS_None, // VPSHUFBITQMBZrm = 16729 |
| 160944 | CEFBS_None, // VPSHUFBITQMBZrmk = 16730 |
| 160945 | CEFBS_None, // VPSHUFBITQMBZrr = 16731 |
| 160946 | CEFBS_None, // VPSHUFBITQMBZrrk = 16732 |
| 160947 | CEFBS_None, // VPSHUFBYrm = 16733 |
| 160948 | CEFBS_None, // VPSHUFBYrr = 16734 |
| 160949 | CEFBS_None, // VPSHUFBZ128rm = 16735 |
| 160950 | CEFBS_None, // VPSHUFBZ128rmk = 16736 |
| 160951 | CEFBS_None, // VPSHUFBZ128rmkz = 16737 |
| 160952 | CEFBS_None, // VPSHUFBZ128rr = 16738 |
| 160953 | CEFBS_None, // VPSHUFBZ128rrk = 16739 |
| 160954 | CEFBS_None, // VPSHUFBZ128rrkz = 16740 |
| 160955 | CEFBS_None, // VPSHUFBZ256rm = 16741 |
| 160956 | CEFBS_None, // VPSHUFBZ256rmk = 16742 |
| 160957 | CEFBS_None, // VPSHUFBZ256rmkz = 16743 |
| 160958 | CEFBS_None, // VPSHUFBZ256rr = 16744 |
| 160959 | CEFBS_None, // VPSHUFBZ256rrk = 16745 |
| 160960 | CEFBS_None, // VPSHUFBZ256rrkz = 16746 |
| 160961 | CEFBS_None, // VPSHUFBZrm = 16747 |
| 160962 | CEFBS_None, // VPSHUFBZrmk = 16748 |
| 160963 | CEFBS_None, // VPSHUFBZrmkz = 16749 |
| 160964 | CEFBS_None, // VPSHUFBZrr = 16750 |
| 160965 | CEFBS_None, // VPSHUFBZrrk = 16751 |
| 160966 | CEFBS_None, // VPSHUFBZrrkz = 16752 |
| 160967 | CEFBS_None, // VPSHUFBrm = 16753 |
| 160968 | CEFBS_None, // VPSHUFBrr = 16754 |
| 160969 | CEFBS_None, // VPSHUFDYmi = 16755 |
| 160970 | CEFBS_None, // VPSHUFDYri = 16756 |
| 160971 | CEFBS_None, // VPSHUFDZ128mbi = 16757 |
| 160972 | CEFBS_None, // VPSHUFDZ128mbik = 16758 |
| 160973 | CEFBS_None, // VPSHUFDZ128mbikz = 16759 |
| 160974 | CEFBS_None, // VPSHUFDZ128mi = 16760 |
| 160975 | CEFBS_None, // VPSHUFDZ128mik = 16761 |
| 160976 | CEFBS_None, // VPSHUFDZ128mikz = 16762 |
| 160977 | CEFBS_None, // VPSHUFDZ128ri = 16763 |
| 160978 | CEFBS_None, // VPSHUFDZ128rik = 16764 |
| 160979 | CEFBS_None, // VPSHUFDZ128rikz = 16765 |
| 160980 | CEFBS_None, // VPSHUFDZ256mbi = 16766 |
| 160981 | CEFBS_None, // VPSHUFDZ256mbik = 16767 |
| 160982 | CEFBS_None, // VPSHUFDZ256mbikz = 16768 |
| 160983 | CEFBS_None, // VPSHUFDZ256mi = 16769 |
| 160984 | CEFBS_None, // VPSHUFDZ256mik = 16770 |
| 160985 | CEFBS_None, // VPSHUFDZ256mikz = 16771 |
| 160986 | CEFBS_None, // VPSHUFDZ256ri = 16772 |
| 160987 | CEFBS_None, // VPSHUFDZ256rik = 16773 |
| 160988 | CEFBS_None, // VPSHUFDZ256rikz = 16774 |
| 160989 | CEFBS_None, // VPSHUFDZmbi = 16775 |
| 160990 | CEFBS_None, // VPSHUFDZmbik = 16776 |
| 160991 | CEFBS_None, // VPSHUFDZmbikz = 16777 |
| 160992 | CEFBS_None, // VPSHUFDZmi = 16778 |
| 160993 | CEFBS_None, // VPSHUFDZmik = 16779 |
| 160994 | CEFBS_None, // VPSHUFDZmikz = 16780 |
| 160995 | CEFBS_None, // VPSHUFDZri = 16781 |
| 160996 | CEFBS_None, // VPSHUFDZrik = 16782 |
| 160997 | CEFBS_None, // VPSHUFDZrikz = 16783 |
| 160998 | CEFBS_None, // VPSHUFDmi = 16784 |
| 160999 | CEFBS_None, // VPSHUFDri = 16785 |
| 161000 | CEFBS_None, // VPSHUFHWYmi = 16786 |
| 161001 | CEFBS_None, // VPSHUFHWYri = 16787 |
| 161002 | CEFBS_None, // VPSHUFHWZ128mi = 16788 |
| 161003 | CEFBS_None, // VPSHUFHWZ128mik = 16789 |
| 161004 | CEFBS_None, // VPSHUFHWZ128mikz = 16790 |
| 161005 | CEFBS_None, // VPSHUFHWZ128ri = 16791 |
| 161006 | CEFBS_None, // VPSHUFHWZ128rik = 16792 |
| 161007 | CEFBS_None, // VPSHUFHWZ128rikz = 16793 |
| 161008 | CEFBS_None, // VPSHUFHWZ256mi = 16794 |
| 161009 | CEFBS_None, // VPSHUFHWZ256mik = 16795 |
| 161010 | CEFBS_None, // VPSHUFHWZ256mikz = 16796 |
| 161011 | CEFBS_None, // VPSHUFHWZ256ri = 16797 |
| 161012 | CEFBS_None, // VPSHUFHWZ256rik = 16798 |
| 161013 | CEFBS_None, // VPSHUFHWZ256rikz = 16799 |
| 161014 | CEFBS_None, // VPSHUFHWZmi = 16800 |
| 161015 | CEFBS_None, // VPSHUFHWZmik = 16801 |
| 161016 | CEFBS_None, // VPSHUFHWZmikz = 16802 |
| 161017 | CEFBS_None, // VPSHUFHWZri = 16803 |
| 161018 | CEFBS_None, // VPSHUFHWZrik = 16804 |
| 161019 | CEFBS_None, // VPSHUFHWZrikz = 16805 |
| 161020 | CEFBS_None, // VPSHUFHWmi = 16806 |
| 161021 | CEFBS_None, // VPSHUFHWri = 16807 |
| 161022 | CEFBS_None, // VPSHUFLWYmi = 16808 |
| 161023 | CEFBS_None, // VPSHUFLWYri = 16809 |
| 161024 | CEFBS_None, // VPSHUFLWZ128mi = 16810 |
| 161025 | CEFBS_None, // VPSHUFLWZ128mik = 16811 |
| 161026 | CEFBS_None, // VPSHUFLWZ128mikz = 16812 |
| 161027 | CEFBS_None, // VPSHUFLWZ128ri = 16813 |
| 161028 | CEFBS_None, // VPSHUFLWZ128rik = 16814 |
| 161029 | CEFBS_None, // VPSHUFLWZ128rikz = 16815 |
| 161030 | CEFBS_None, // VPSHUFLWZ256mi = 16816 |
| 161031 | CEFBS_None, // VPSHUFLWZ256mik = 16817 |
| 161032 | CEFBS_None, // VPSHUFLWZ256mikz = 16818 |
| 161033 | CEFBS_None, // VPSHUFLWZ256ri = 16819 |
| 161034 | CEFBS_None, // VPSHUFLWZ256rik = 16820 |
| 161035 | CEFBS_None, // VPSHUFLWZ256rikz = 16821 |
| 161036 | CEFBS_None, // VPSHUFLWZmi = 16822 |
| 161037 | CEFBS_None, // VPSHUFLWZmik = 16823 |
| 161038 | CEFBS_None, // VPSHUFLWZmikz = 16824 |
| 161039 | CEFBS_None, // VPSHUFLWZri = 16825 |
| 161040 | CEFBS_None, // VPSHUFLWZrik = 16826 |
| 161041 | CEFBS_None, // VPSHUFLWZrikz = 16827 |
| 161042 | CEFBS_None, // VPSHUFLWmi = 16828 |
| 161043 | CEFBS_None, // VPSHUFLWri = 16829 |
| 161044 | CEFBS_None, // VPSIGNBYrm = 16830 |
| 161045 | CEFBS_None, // VPSIGNBYrr = 16831 |
| 161046 | CEFBS_None, // VPSIGNBrm = 16832 |
| 161047 | CEFBS_None, // VPSIGNBrr = 16833 |
| 161048 | CEFBS_None, // VPSIGNDYrm = 16834 |
| 161049 | CEFBS_None, // VPSIGNDYrr = 16835 |
| 161050 | CEFBS_None, // VPSIGNDrm = 16836 |
| 161051 | CEFBS_None, // VPSIGNDrr = 16837 |
| 161052 | CEFBS_None, // VPSIGNWYrm = 16838 |
| 161053 | CEFBS_None, // VPSIGNWYrr = 16839 |
| 161054 | CEFBS_None, // VPSIGNWrm = 16840 |
| 161055 | CEFBS_None, // VPSIGNWrr = 16841 |
| 161056 | CEFBS_None, // VPSLLDQYri = 16842 |
| 161057 | CEFBS_None, // VPSLLDQZ128mi = 16843 |
| 161058 | CEFBS_None, // VPSLLDQZ128ri = 16844 |
| 161059 | CEFBS_None, // VPSLLDQZ256mi = 16845 |
| 161060 | CEFBS_None, // VPSLLDQZ256ri = 16846 |
| 161061 | CEFBS_None, // VPSLLDQZmi = 16847 |
| 161062 | CEFBS_None, // VPSLLDQZri = 16848 |
| 161063 | CEFBS_None, // VPSLLDQri = 16849 |
| 161064 | CEFBS_None, // VPSLLDYri = 16850 |
| 161065 | CEFBS_None, // VPSLLDYrm = 16851 |
| 161066 | CEFBS_None, // VPSLLDYrr = 16852 |
| 161067 | CEFBS_None, // VPSLLDZ128mbi = 16853 |
| 161068 | CEFBS_None, // VPSLLDZ128mbik = 16854 |
| 161069 | CEFBS_None, // VPSLLDZ128mbikz = 16855 |
| 161070 | CEFBS_None, // VPSLLDZ128mi = 16856 |
| 161071 | CEFBS_None, // VPSLLDZ128mik = 16857 |
| 161072 | CEFBS_None, // VPSLLDZ128mikz = 16858 |
| 161073 | CEFBS_None, // VPSLLDZ128ri = 16859 |
| 161074 | CEFBS_None, // VPSLLDZ128rik = 16860 |
| 161075 | CEFBS_None, // VPSLLDZ128rikz = 16861 |
| 161076 | CEFBS_None, // VPSLLDZ128rm = 16862 |
| 161077 | CEFBS_None, // VPSLLDZ128rmk = 16863 |
| 161078 | CEFBS_None, // VPSLLDZ128rmkz = 16864 |
| 161079 | CEFBS_None, // VPSLLDZ128rr = 16865 |
| 161080 | CEFBS_None, // VPSLLDZ128rrk = 16866 |
| 161081 | CEFBS_None, // VPSLLDZ128rrkz = 16867 |
| 161082 | CEFBS_None, // VPSLLDZ256mbi = 16868 |
| 161083 | CEFBS_None, // VPSLLDZ256mbik = 16869 |
| 161084 | CEFBS_None, // VPSLLDZ256mbikz = 16870 |
| 161085 | CEFBS_None, // VPSLLDZ256mi = 16871 |
| 161086 | CEFBS_None, // VPSLLDZ256mik = 16872 |
| 161087 | CEFBS_None, // VPSLLDZ256mikz = 16873 |
| 161088 | CEFBS_None, // VPSLLDZ256ri = 16874 |
| 161089 | CEFBS_None, // VPSLLDZ256rik = 16875 |
| 161090 | CEFBS_None, // VPSLLDZ256rikz = 16876 |
| 161091 | CEFBS_None, // VPSLLDZ256rm = 16877 |
| 161092 | CEFBS_None, // VPSLLDZ256rmk = 16878 |
| 161093 | CEFBS_None, // VPSLLDZ256rmkz = 16879 |
| 161094 | CEFBS_None, // VPSLLDZ256rr = 16880 |
| 161095 | CEFBS_None, // VPSLLDZ256rrk = 16881 |
| 161096 | CEFBS_None, // VPSLLDZ256rrkz = 16882 |
| 161097 | CEFBS_None, // VPSLLDZmbi = 16883 |
| 161098 | CEFBS_None, // VPSLLDZmbik = 16884 |
| 161099 | CEFBS_None, // VPSLLDZmbikz = 16885 |
| 161100 | CEFBS_None, // VPSLLDZmi = 16886 |
| 161101 | CEFBS_None, // VPSLLDZmik = 16887 |
| 161102 | CEFBS_None, // VPSLLDZmikz = 16888 |
| 161103 | CEFBS_None, // VPSLLDZri = 16889 |
| 161104 | CEFBS_None, // VPSLLDZrik = 16890 |
| 161105 | CEFBS_None, // VPSLLDZrikz = 16891 |
| 161106 | CEFBS_None, // VPSLLDZrm = 16892 |
| 161107 | CEFBS_None, // VPSLLDZrmk = 16893 |
| 161108 | CEFBS_None, // VPSLLDZrmkz = 16894 |
| 161109 | CEFBS_None, // VPSLLDZrr = 16895 |
| 161110 | CEFBS_None, // VPSLLDZrrk = 16896 |
| 161111 | CEFBS_None, // VPSLLDZrrkz = 16897 |
| 161112 | CEFBS_None, // VPSLLDri = 16898 |
| 161113 | CEFBS_None, // VPSLLDrm = 16899 |
| 161114 | CEFBS_None, // VPSLLDrr = 16900 |
| 161115 | CEFBS_None, // VPSLLQYri = 16901 |
| 161116 | CEFBS_None, // VPSLLQYrm = 16902 |
| 161117 | CEFBS_None, // VPSLLQYrr = 16903 |
| 161118 | CEFBS_None, // VPSLLQZ128mbi = 16904 |
| 161119 | CEFBS_None, // VPSLLQZ128mbik = 16905 |
| 161120 | CEFBS_None, // VPSLLQZ128mbikz = 16906 |
| 161121 | CEFBS_None, // VPSLLQZ128mi = 16907 |
| 161122 | CEFBS_None, // VPSLLQZ128mik = 16908 |
| 161123 | CEFBS_None, // VPSLLQZ128mikz = 16909 |
| 161124 | CEFBS_None, // VPSLLQZ128ri = 16910 |
| 161125 | CEFBS_None, // VPSLLQZ128rik = 16911 |
| 161126 | CEFBS_None, // VPSLLQZ128rikz = 16912 |
| 161127 | CEFBS_None, // VPSLLQZ128rm = 16913 |
| 161128 | CEFBS_None, // VPSLLQZ128rmk = 16914 |
| 161129 | CEFBS_None, // VPSLLQZ128rmkz = 16915 |
| 161130 | CEFBS_None, // VPSLLQZ128rr = 16916 |
| 161131 | CEFBS_None, // VPSLLQZ128rrk = 16917 |
| 161132 | CEFBS_None, // VPSLLQZ128rrkz = 16918 |
| 161133 | CEFBS_None, // VPSLLQZ256mbi = 16919 |
| 161134 | CEFBS_None, // VPSLLQZ256mbik = 16920 |
| 161135 | CEFBS_None, // VPSLLQZ256mbikz = 16921 |
| 161136 | CEFBS_None, // VPSLLQZ256mi = 16922 |
| 161137 | CEFBS_None, // VPSLLQZ256mik = 16923 |
| 161138 | CEFBS_None, // VPSLLQZ256mikz = 16924 |
| 161139 | CEFBS_None, // VPSLLQZ256ri = 16925 |
| 161140 | CEFBS_None, // VPSLLQZ256rik = 16926 |
| 161141 | CEFBS_None, // VPSLLQZ256rikz = 16927 |
| 161142 | CEFBS_None, // VPSLLQZ256rm = 16928 |
| 161143 | CEFBS_None, // VPSLLQZ256rmk = 16929 |
| 161144 | CEFBS_None, // VPSLLQZ256rmkz = 16930 |
| 161145 | CEFBS_None, // VPSLLQZ256rr = 16931 |
| 161146 | CEFBS_None, // VPSLLQZ256rrk = 16932 |
| 161147 | CEFBS_None, // VPSLLQZ256rrkz = 16933 |
| 161148 | CEFBS_None, // VPSLLQZmbi = 16934 |
| 161149 | CEFBS_None, // VPSLLQZmbik = 16935 |
| 161150 | CEFBS_None, // VPSLLQZmbikz = 16936 |
| 161151 | CEFBS_None, // VPSLLQZmi = 16937 |
| 161152 | CEFBS_None, // VPSLLQZmik = 16938 |
| 161153 | CEFBS_None, // VPSLLQZmikz = 16939 |
| 161154 | CEFBS_None, // VPSLLQZri = 16940 |
| 161155 | CEFBS_None, // VPSLLQZrik = 16941 |
| 161156 | CEFBS_None, // VPSLLQZrikz = 16942 |
| 161157 | CEFBS_None, // VPSLLQZrm = 16943 |
| 161158 | CEFBS_None, // VPSLLQZrmk = 16944 |
| 161159 | CEFBS_None, // VPSLLQZrmkz = 16945 |
| 161160 | CEFBS_None, // VPSLLQZrr = 16946 |
| 161161 | CEFBS_None, // VPSLLQZrrk = 16947 |
| 161162 | CEFBS_None, // VPSLLQZrrkz = 16948 |
| 161163 | CEFBS_None, // VPSLLQri = 16949 |
| 161164 | CEFBS_None, // VPSLLQrm = 16950 |
| 161165 | CEFBS_None, // VPSLLQrr = 16951 |
| 161166 | CEFBS_None, // VPSLLVDYrm = 16952 |
| 161167 | CEFBS_None, // VPSLLVDYrr = 16953 |
| 161168 | CEFBS_None, // VPSLLVDZ128rm = 16954 |
| 161169 | CEFBS_None, // VPSLLVDZ128rmb = 16955 |
| 161170 | CEFBS_None, // VPSLLVDZ128rmbk = 16956 |
| 161171 | CEFBS_None, // VPSLLVDZ128rmbkz = 16957 |
| 161172 | CEFBS_None, // VPSLLVDZ128rmk = 16958 |
| 161173 | CEFBS_None, // VPSLLVDZ128rmkz = 16959 |
| 161174 | CEFBS_None, // VPSLLVDZ128rr = 16960 |
| 161175 | CEFBS_None, // VPSLLVDZ128rrk = 16961 |
| 161176 | CEFBS_None, // VPSLLVDZ128rrkz = 16962 |
| 161177 | CEFBS_None, // VPSLLVDZ256rm = 16963 |
| 161178 | CEFBS_None, // VPSLLVDZ256rmb = 16964 |
| 161179 | CEFBS_None, // VPSLLVDZ256rmbk = 16965 |
| 161180 | CEFBS_None, // VPSLLVDZ256rmbkz = 16966 |
| 161181 | CEFBS_None, // VPSLLVDZ256rmk = 16967 |
| 161182 | CEFBS_None, // VPSLLVDZ256rmkz = 16968 |
| 161183 | CEFBS_None, // VPSLLVDZ256rr = 16969 |
| 161184 | CEFBS_None, // VPSLLVDZ256rrk = 16970 |
| 161185 | CEFBS_None, // VPSLLVDZ256rrkz = 16971 |
| 161186 | CEFBS_None, // VPSLLVDZrm = 16972 |
| 161187 | CEFBS_None, // VPSLLVDZrmb = 16973 |
| 161188 | CEFBS_None, // VPSLLVDZrmbk = 16974 |
| 161189 | CEFBS_None, // VPSLLVDZrmbkz = 16975 |
| 161190 | CEFBS_None, // VPSLLVDZrmk = 16976 |
| 161191 | CEFBS_None, // VPSLLVDZrmkz = 16977 |
| 161192 | CEFBS_None, // VPSLLVDZrr = 16978 |
| 161193 | CEFBS_None, // VPSLLVDZrrk = 16979 |
| 161194 | CEFBS_None, // VPSLLVDZrrkz = 16980 |
| 161195 | CEFBS_None, // VPSLLVDrm = 16981 |
| 161196 | CEFBS_None, // VPSLLVDrr = 16982 |
| 161197 | CEFBS_None, // VPSLLVQYrm = 16983 |
| 161198 | CEFBS_None, // VPSLLVQYrr = 16984 |
| 161199 | CEFBS_None, // VPSLLVQZ128rm = 16985 |
| 161200 | CEFBS_None, // VPSLLVQZ128rmb = 16986 |
| 161201 | CEFBS_None, // VPSLLVQZ128rmbk = 16987 |
| 161202 | CEFBS_None, // VPSLLVQZ128rmbkz = 16988 |
| 161203 | CEFBS_None, // VPSLLVQZ128rmk = 16989 |
| 161204 | CEFBS_None, // VPSLLVQZ128rmkz = 16990 |
| 161205 | CEFBS_None, // VPSLLVQZ128rr = 16991 |
| 161206 | CEFBS_None, // VPSLLVQZ128rrk = 16992 |
| 161207 | CEFBS_None, // VPSLLVQZ128rrkz = 16993 |
| 161208 | CEFBS_None, // VPSLLVQZ256rm = 16994 |
| 161209 | CEFBS_None, // VPSLLVQZ256rmb = 16995 |
| 161210 | CEFBS_None, // VPSLLVQZ256rmbk = 16996 |
| 161211 | CEFBS_None, // VPSLLVQZ256rmbkz = 16997 |
| 161212 | CEFBS_None, // VPSLLVQZ256rmk = 16998 |
| 161213 | CEFBS_None, // VPSLLVQZ256rmkz = 16999 |
| 161214 | CEFBS_None, // VPSLLVQZ256rr = 17000 |
| 161215 | CEFBS_None, // VPSLLVQZ256rrk = 17001 |
| 161216 | CEFBS_None, // VPSLLVQZ256rrkz = 17002 |
| 161217 | CEFBS_None, // VPSLLVQZrm = 17003 |
| 161218 | CEFBS_None, // VPSLLVQZrmb = 17004 |
| 161219 | CEFBS_None, // VPSLLVQZrmbk = 17005 |
| 161220 | CEFBS_None, // VPSLLVQZrmbkz = 17006 |
| 161221 | CEFBS_None, // VPSLLVQZrmk = 17007 |
| 161222 | CEFBS_None, // VPSLLVQZrmkz = 17008 |
| 161223 | CEFBS_None, // VPSLLVQZrr = 17009 |
| 161224 | CEFBS_None, // VPSLLVQZrrk = 17010 |
| 161225 | CEFBS_None, // VPSLLVQZrrkz = 17011 |
| 161226 | CEFBS_None, // VPSLLVQrm = 17012 |
| 161227 | CEFBS_None, // VPSLLVQrr = 17013 |
| 161228 | CEFBS_None, // VPSLLVWZ128rm = 17014 |
| 161229 | CEFBS_None, // VPSLLVWZ128rmk = 17015 |
| 161230 | CEFBS_None, // VPSLLVWZ128rmkz = 17016 |
| 161231 | CEFBS_None, // VPSLLVWZ128rr = 17017 |
| 161232 | CEFBS_None, // VPSLLVWZ128rrk = 17018 |
| 161233 | CEFBS_None, // VPSLLVWZ128rrkz = 17019 |
| 161234 | CEFBS_None, // VPSLLVWZ256rm = 17020 |
| 161235 | CEFBS_None, // VPSLLVWZ256rmk = 17021 |
| 161236 | CEFBS_None, // VPSLLVWZ256rmkz = 17022 |
| 161237 | CEFBS_None, // VPSLLVWZ256rr = 17023 |
| 161238 | CEFBS_None, // VPSLLVWZ256rrk = 17024 |
| 161239 | CEFBS_None, // VPSLLVWZ256rrkz = 17025 |
| 161240 | CEFBS_None, // VPSLLVWZrm = 17026 |
| 161241 | CEFBS_None, // VPSLLVWZrmk = 17027 |
| 161242 | CEFBS_None, // VPSLLVWZrmkz = 17028 |
| 161243 | CEFBS_None, // VPSLLVWZrr = 17029 |
| 161244 | CEFBS_None, // VPSLLVWZrrk = 17030 |
| 161245 | CEFBS_None, // VPSLLVWZrrkz = 17031 |
| 161246 | CEFBS_None, // VPSLLWYri = 17032 |
| 161247 | CEFBS_None, // VPSLLWYrm = 17033 |
| 161248 | CEFBS_None, // VPSLLWYrr = 17034 |
| 161249 | CEFBS_None, // VPSLLWZ128mi = 17035 |
| 161250 | CEFBS_None, // VPSLLWZ128mik = 17036 |
| 161251 | CEFBS_None, // VPSLLWZ128mikz = 17037 |
| 161252 | CEFBS_None, // VPSLLWZ128ri = 17038 |
| 161253 | CEFBS_None, // VPSLLWZ128rik = 17039 |
| 161254 | CEFBS_None, // VPSLLWZ128rikz = 17040 |
| 161255 | CEFBS_None, // VPSLLWZ128rm = 17041 |
| 161256 | CEFBS_None, // VPSLLWZ128rmk = 17042 |
| 161257 | CEFBS_None, // VPSLLWZ128rmkz = 17043 |
| 161258 | CEFBS_None, // VPSLLWZ128rr = 17044 |
| 161259 | CEFBS_None, // VPSLLWZ128rrk = 17045 |
| 161260 | CEFBS_None, // VPSLLWZ128rrkz = 17046 |
| 161261 | CEFBS_None, // VPSLLWZ256mi = 17047 |
| 161262 | CEFBS_None, // VPSLLWZ256mik = 17048 |
| 161263 | CEFBS_None, // VPSLLWZ256mikz = 17049 |
| 161264 | CEFBS_None, // VPSLLWZ256ri = 17050 |
| 161265 | CEFBS_None, // VPSLLWZ256rik = 17051 |
| 161266 | CEFBS_None, // VPSLLWZ256rikz = 17052 |
| 161267 | CEFBS_None, // VPSLLWZ256rm = 17053 |
| 161268 | CEFBS_None, // VPSLLWZ256rmk = 17054 |
| 161269 | CEFBS_None, // VPSLLWZ256rmkz = 17055 |
| 161270 | CEFBS_None, // VPSLLWZ256rr = 17056 |
| 161271 | CEFBS_None, // VPSLLWZ256rrk = 17057 |
| 161272 | CEFBS_None, // VPSLLWZ256rrkz = 17058 |
| 161273 | CEFBS_None, // VPSLLWZmi = 17059 |
| 161274 | CEFBS_None, // VPSLLWZmik = 17060 |
| 161275 | CEFBS_None, // VPSLLWZmikz = 17061 |
| 161276 | CEFBS_None, // VPSLLWZri = 17062 |
| 161277 | CEFBS_None, // VPSLLWZrik = 17063 |
| 161278 | CEFBS_None, // VPSLLWZrikz = 17064 |
| 161279 | CEFBS_None, // VPSLLWZrm = 17065 |
| 161280 | CEFBS_None, // VPSLLWZrmk = 17066 |
| 161281 | CEFBS_None, // VPSLLWZrmkz = 17067 |
| 161282 | CEFBS_None, // VPSLLWZrr = 17068 |
| 161283 | CEFBS_None, // VPSLLWZrrk = 17069 |
| 161284 | CEFBS_None, // VPSLLWZrrkz = 17070 |
| 161285 | CEFBS_None, // VPSLLWri = 17071 |
| 161286 | CEFBS_None, // VPSLLWrm = 17072 |
| 161287 | CEFBS_None, // VPSLLWrr = 17073 |
| 161288 | CEFBS_None, // VPSRADYri = 17074 |
| 161289 | CEFBS_None, // VPSRADYrm = 17075 |
| 161290 | CEFBS_None, // VPSRADYrr = 17076 |
| 161291 | CEFBS_None, // VPSRADZ128mbi = 17077 |
| 161292 | CEFBS_None, // VPSRADZ128mbik = 17078 |
| 161293 | CEFBS_None, // VPSRADZ128mbikz = 17079 |
| 161294 | CEFBS_None, // VPSRADZ128mi = 17080 |
| 161295 | CEFBS_None, // VPSRADZ128mik = 17081 |
| 161296 | CEFBS_None, // VPSRADZ128mikz = 17082 |
| 161297 | CEFBS_None, // VPSRADZ128ri = 17083 |
| 161298 | CEFBS_None, // VPSRADZ128rik = 17084 |
| 161299 | CEFBS_None, // VPSRADZ128rikz = 17085 |
| 161300 | CEFBS_None, // VPSRADZ128rm = 17086 |
| 161301 | CEFBS_None, // VPSRADZ128rmk = 17087 |
| 161302 | CEFBS_None, // VPSRADZ128rmkz = 17088 |
| 161303 | CEFBS_None, // VPSRADZ128rr = 17089 |
| 161304 | CEFBS_None, // VPSRADZ128rrk = 17090 |
| 161305 | CEFBS_None, // VPSRADZ128rrkz = 17091 |
| 161306 | CEFBS_None, // VPSRADZ256mbi = 17092 |
| 161307 | CEFBS_None, // VPSRADZ256mbik = 17093 |
| 161308 | CEFBS_None, // VPSRADZ256mbikz = 17094 |
| 161309 | CEFBS_None, // VPSRADZ256mi = 17095 |
| 161310 | CEFBS_None, // VPSRADZ256mik = 17096 |
| 161311 | CEFBS_None, // VPSRADZ256mikz = 17097 |
| 161312 | CEFBS_None, // VPSRADZ256ri = 17098 |
| 161313 | CEFBS_None, // VPSRADZ256rik = 17099 |
| 161314 | CEFBS_None, // VPSRADZ256rikz = 17100 |
| 161315 | CEFBS_None, // VPSRADZ256rm = 17101 |
| 161316 | CEFBS_None, // VPSRADZ256rmk = 17102 |
| 161317 | CEFBS_None, // VPSRADZ256rmkz = 17103 |
| 161318 | CEFBS_None, // VPSRADZ256rr = 17104 |
| 161319 | CEFBS_None, // VPSRADZ256rrk = 17105 |
| 161320 | CEFBS_None, // VPSRADZ256rrkz = 17106 |
| 161321 | CEFBS_None, // VPSRADZmbi = 17107 |
| 161322 | CEFBS_None, // VPSRADZmbik = 17108 |
| 161323 | CEFBS_None, // VPSRADZmbikz = 17109 |
| 161324 | CEFBS_None, // VPSRADZmi = 17110 |
| 161325 | CEFBS_None, // VPSRADZmik = 17111 |
| 161326 | CEFBS_None, // VPSRADZmikz = 17112 |
| 161327 | CEFBS_None, // VPSRADZri = 17113 |
| 161328 | CEFBS_None, // VPSRADZrik = 17114 |
| 161329 | CEFBS_None, // VPSRADZrikz = 17115 |
| 161330 | CEFBS_None, // VPSRADZrm = 17116 |
| 161331 | CEFBS_None, // VPSRADZrmk = 17117 |
| 161332 | CEFBS_None, // VPSRADZrmkz = 17118 |
| 161333 | CEFBS_None, // VPSRADZrr = 17119 |
| 161334 | CEFBS_None, // VPSRADZrrk = 17120 |
| 161335 | CEFBS_None, // VPSRADZrrkz = 17121 |
| 161336 | CEFBS_None, // VPSRADri = 17122 |
| 161337 | CEFBS_None, // VPSRADrm = 17123 |
| 161338 | CEFBS_None, // VPSRADrr = 17124 |
| 161339 | CEFBS_None, // VPSRAQZ128mbi = 17125 |
| 161340 | CEFBS_None, // VPSRAQZ128mbik = 17126 |
| 161341 | CEFBS_None, // VPSRAQZ128mbikz = 17127 |
| 161342 | CEFBS_None, // VPSRAQZ128mi = 17128 |
| 161343 | CEFBS_None, // VPSRAQZ128mik = 17129 |
| 161344 | CEFBS_None, // VPSRAQZ128mikz = 17130 |
| 161345 | CEFBS_None, // VPSRAQZ128ri = 17131 |
| 161346 | CEFBS_None, // VPSRAQZ128rik = 17132 |
| 161347 | CEFBS_None, // VPSRAQZ128rikz = 17133 |
| 161348 | CEFBS_None, // VPSRAQZ128rm = 17134 |
| 161349 | CEFBS_None, // VPSRAQZ128rmk = 17135 |
| 161350 | CEFBS_None, // VPSRAQZ128rmkz = 17136 |
| 161351 | CEFBS_None, // VPSRAQZ128rr = 17137 |
| 161352 | CEFBS_None, // VPSRAQZ128rrk = 17138 |
| 161353 | CEFBS_None, // VPSRAQZ128rrkz = 17139 |
| 161354 | CEFBS_None, // VPSRAQZ256mbi = 17140 |
| 161355 | CEFBS_None, // VPSRAQZ256mbik = 17141 |
| 161356 | CEFBS_None, // VPSRAQZ256mbikz = 17142 |
| 161357 | CEFBS_None, // VPSRAQZ256mi = 17143 |
| 161358 | CEFBS_None, // VPSRAQZ256mik = 17144 |
| 161359 | CEFBS_None, // VPSRAQZ256mikz = 17145 |
| 161360 | CEFBS_None, // VPSRAQZ256ri = 17146 |
| 161361 | CEFBS_None, // VPSRAQZ256rik = 17147 |
| 161362 | CEFBS_None, // VPSRAQZ256rikz = 17148 |
| 161363 | CEFBS_None, // VPSRAQZ256rm = 17149 |
| 161364 | CEFBS_None, // VPSRAQZ256rmk = 17150 |
| 161365 | CEFBS_None, // VPSRAQZ256rmkz = 17151 |
| 161366 | CEFBS_None, // VPSRAQZ256rr = 17152 |
| 161367 | CEFBS_None, // VPSRAQZ256rrk = 17153 |
| 161368 | CEFBS_None, // VPSRAQZ256rrkz = 17154 |
| 161369 | CEFBS_None, // VPSRAQZmbi = 17155 |
| 161370 | CEFBS_None, // VPSRAQZmbik = 17156 |
| 161371 | CEFBS_None, // VPSRAQZmbikz = 17157 |
| 161372 | CEFBS_None, // VPSRAQZmi = 17158 |
| 161373 | CEFBS_None, // VPSRAQZmik = 17159 |
| 161374 | CEFBS_None, // VPSRAQZmikz = 17160 |
| 161375 | CEFBS_None, // VPSRAQZri = 17161 |
| 161376 | CEFBS_None, // VPSRAQZrik = 17162 |
| 161377 | CEFBS_None, // VPSRAQZrikz = 17163 |
| 161378 | CEFBS_None, // VPSRAQZrm = 17164 |
| 161379 | CEFBS_None, // VPSRAQZrmk = 17165 |
| 161380 | CEFBS_None, // VPSRAQZrmkz = 17166 |
| 161381 | CEFBS_None, // VPSRAQZrr = 17167 |
| 161382 | CEFBS_None, // VPSRAQZrrk = 17168 |
| 161383 | CEFBS_None, // VPSRAQZrrkz = 17169 |
| 161384 | CEFBS_None, // VPSRAVDYrm = 17170 |
| 161385 | CEFBS_None, // VPSRAVDYrr = 17171 |
| 161386 | CEFBS_None, // VPSRAVDZ128rm = 17172 |
| 161387 | CEFBS_None, // VPSRAVDZ128rmb = 17173 |
| 161388 | CEFBS_None, // VPSRAVDZ128rmbk = 17174 |
| 161389 | CEFBS_None, // VPSRAVDZ128rmbkz = 17175 |
| 161390 | CEFBS_None, // VPSRAVDZ128rmk = 17176 |
| 161391 | CEFBS_None, // VPSRAVDZ128rmkz = 17177 |
| 161392 | CEFBS_None, // VPSRAVDZ128rr = 17178 |
| 161393 | CEFBS_None, // VPSRAVDZ128rrk = 17179 |
| 161394 | CEFBS_None, // VPSRAVDZ128rrkz = 17180 |
| 161395 | CEFBS_None, // VPSRAVDZ256rm = 17181 |
| 161396 | CEFBS_None, // VPSRAVDZ256rmb = 17182 |
| 161397 | CEFBS_None, // VPSRAVDZ256rmbk = 17183 |
| 161398 | CEFBS_None, // VPSRAVDZ256rmbkz = 17184 |
| 161399 | CEFBS_None, // VPSRAVDZ256rmk = 17185 |
| 161400 | CEFBS_None, // VPSRAVDZ256rmkz = 17186 |
| 161401 | CEFBS_None, // VPSRAVDZ256rr = 17187 |
| 161402 | CEFBS_None, // VPSRAVDZ256rrk = 17188 |
| 161403 | CEFBS_None, // VPSRAVDZ256rrkz = 17189 |
| 161404 | CEFBS_None, // VPSRAVDZrm = 17190 |
| 161405 | CEFBS_None, // VPSRAVDZrmb = 17191 |
| 161406 | CEFBS_None, // VPSRAVDZrmbk = 17192 |
| 161407 | CEFBS_None, // VPSRAVDZrmbkz = 17193 |
| 161408 | CEFBS_None, // VPSRAVDZrmk = 17194 |
| 161409 | CEFBS_None, // VPSRAVDZrmkz = 17195 |
| 161410 | CEFBS_None, // VPSRAVDZrr = 17196 |
| 161411 | CEFBS_None, // VPSRAVDZrrk = 17197 |
| 161412 | CEFBS_None, // VPSRAVDZrrkz = 17198 |
| 161413 | CEFBS_None, // VPSRAVDrm = 17199 |
| 161414 | CEFBS_None, // VPSRAVDrr = 17200 |
| 161415 | CEFBS_None, // VPSRAVQZ128rm = 17201 |
| 161416 | CEFBS_None, // VPSRAVQZ128rmb = 17202 |
| 161417 | CEFBS_None, // VPSRAVQZ128rmbk = 17203 |
| 161418 | CEFBS_None, // VPSRAVQZ128rmbkz = 17204 |
| 161419 | CEFBS_None, // VPSRAVQZ128rmk = 17205 |
| 161420 | CEFBS_None, // VPSRAVQZ128rmkz = 17206 |
| 161421 | CEFBS_None, // VPSRAVQZ128rr = 17207 |
| 161422 | CEFBS_None, // VPSRAVQZ128rrk = 17208 |
| 161423 | CEFBS_None, // VPSRAVQZ128rrkz = 17209 |
| 161424 | CEFBS_None, // VPSRAVQZ256rm = 17210 |
| 161425 | CEFBS_None, // VPSRAVQZ256rmb = 17211 |
| 161426 | CEFBS_None, // VPSRAVQZ256rmbk = 17212 |
| 161427 | CEFBS_None, // VPSRAVQZ256rmbkz = 17213 |
| 161428 | CEFBS_None, // VPSRAVQZ256rmk = 17214 |
| 161429 | CEFBS_None, // VPSRAVQZ256rmkz = 17215 |
| 161430 | CEFBS_None, // VPSRAVQZ256rr = 17216 |
| 161431 | CEFBS_None, // VPSRAVQZ256rrk = 17217 |
| 161432 | CEFBS_None, // VPSRAVQZ256rrkz = 17218 |
| 161433 | CEFBS_None, // VPSRAVQZrm = 17219 |
| 161434 | CEFBS_None, // VPSRAVQZrmb = 17220 |
| 161435 | CEFBS_None, // VPSRAVQZrmbk = 17221 |
| 161436 | CEFBS_None, // VPSRAVQZrmbkz = 17222 |
| 161437 | CEFBS_None, // VPSRAVQZrmk = 17223 |
| 161438 | CEFBS_None, // VPSRAVQZrmkz = 17224 |
| 161439 | CEFBS_None, // VPSRAVQZrr = 17225 |
| 161440 | CEFBS_None, // VPSRAVQZrrk = 17226 |
| 161441 | CEFBS_None, // VPSRAVQZrrkz = 17227 |
| 161442 | CEFBS_None, // VPSRAVWZ128rm = 17228 |
| 161443 | CEFBS_None, // VPSRAVWZ128rmk = 17229 |
| 161444 | CEFBS_None, // VPSRAVWZ128rmkz = 17230 |
| 161445 | CEFBS_None, // VPSRAVWZ128rr = 17231 |
| 161446 | CEFBS_None, // VPSRAVWZ128rrk = 17232 |
| 161447 | CEFBS_None, // VPSRAVWZ128rrkz = 17233 |
| 161448 | CEFBS_None, // VPSRAVWZ256rm = 17234 |
| 161449 | CEFBS_None, // VPSRAVWZ256rmk = 17235 |
| 161450 | CEFBS_None, // VPSRAVWZ256rmkz = 17236 |
| 161451 | CEFBS_None, // VPSRAVWZ256rr = 17237 |
| 161452 | CEFBS_None, // VPSRAVWZ256rrk = 17238 |
| 161453 | CEFBS_None, // VPSRAVWZ256rrkz = 17239 |
| 161454 | CEFBS_None, // VPSRAVWZrm = 17240 |
| 161455 | CEFBS_None, // VPSRAVWZrmk = 17241 |
| 161456 | CEFBS_None, // VPSRAVWZrmkz = 17242 |
| 161457 | CEFBS_None, // VPSRAVWZrr = 17243 |
| 161458 | CEFBS_None, // VPSRAVWZrrk = 17244 |
| 161459 | CEFBS_None, // VPSRAVWZrrkz = 17245 |
| 161460 | CEFBS_None, // VPSRAWYri = 17246 |
| 161461 | CEFBS_None, // VPSRAWYrm = 17247 |
| 161462 | CEFBS_None, // VPSRAWYrr = 17248 |
| 161463 | CEFBS_None, // VPSRAWZ128mi = 17249 |
| 161464 | CEFBS_None, // VPSRAWZ128mik = 17250 |
| 161465 | CEFBS_None, // VPSRAWZ128mikz = 17251 |
| 161466 | CEFBS_None, // VPSRAWZ128ri = 17252 |
| 161467 | CEFBS_None, // VPSRAWZ128rik = 17253 |
| 161468 | CEFBS_None, // VPSRAWZ128rikz = 17254 |
| 161469 | CEFBS_None, // VPSRAWZ128rm = 17255 |
| 161470 | CEFBS_None, // VPSRAWZ128rmk = 17256 |
| 161471 | CEFBS_None, // VPSRAWZ128rmkz = 17257 |
| 161472 | CEFBS_None, // VPSRAWZ128rr = 17258 |
| 161473 | CEFBS_None, // VPSRAWZ128rrk = 17259 |
| 161474 | CEFBS_None, // VPSRAWZ128rrkz = 17260 |
| 161475 | CEFBS_None, // VPSRAWZ256mi = 17261 |
| 161476 | CEFBS_None, // VPSRAWZ256mik = 17262 |
| 161477 | CEFBS_None, // VPSRAWZ256mikz = 17263 |
| 161478 | CEFBS_None, // VPSRAWZ256ri = 17264 |
| 161479 | CEFBS_None, // VPSRAWZ256rik = 17265 |
| 161480 | CEFBS_None, // VPSRAWZ256rikz = 17266 |
| 161481 | CEFBS_None, // VPSRAWZ256rm = 17267 |
| 161482 | CEFBS_None, // VPSRAWZ256rmk = 17268 |
| 161483 | CEFBS_None, // VPSRAWZ256rmkz = 17269 |
| 161484 | CEFBS_None, // VPSRAWZ256rr = 17270 |
| 161485 | CEFBS_None, // VPSRAWZ256rrk = 17271 |
| 161486 | CEFBS_None, // VPSRAWZ256rrkz = 17272 |
| 161487 | CEFBS_None, // VPSRAWZmi = 17273 |
| 161488 | CEFBS_None, // VPSRAWZmik = 17274 |
| 161489 | CEFBS_None, // VPSRAWZmikz = 17275 |
| 161490 | CEFBS_None, // VPSRAWZri = 17276 |
| 161491 | CEFBS_None, // VPSRAWZrik = 17277 |
| 161492 | CEFBS_None, // VPSRAWZrikz = 17278 |
| 161493 | CEFBS_None, // VPSRAWZrm = 17279 |
| 161494 | CEFBS_None, // VPSRAWZrmk = 17280 |
| 161495 | CEFBS_None, // VPSRAWZrmkz = 17281 |
| 161496 | CEFBS_None, // VPSRAWZrr = 17282 |
| 161497 | CEFBS_None, // VPSRAWZrrk = 17283 |
| 161498 | CEFBS_None, // VPSRAWZrrkz = 17284 |
| 161499 | CEFBS_None, // VPSRAWri = 17285 |
| 161500 | CEFBS_None, // VPSRAWrm = 17286 |
| 161501 | CEFBS_None, // VPSRAWrr = 17287 |
| 161502 | CEFBS_None, // VPSRLDQYri = 17288 |
| 161503 | CEFBS_None, // VPSRLDQZ128mi = 17289 |
| 161504 | CEFBS_None, // VPSRLDQZ128ri = 17290 |
| 161505 | CEFBS_None, // VPSRLDQZ256mi = 17291 |
| 161506 | CEFBS_None, // VPSRLDQZ256ri = 17292 |
| 161507 | CEFBS_None, // VPSRLDQZmi = 17293 |
| 161508 | CEFBS_None, // VPSRLDQZri = 17294 |
| 161509 | CEFBS_None, // VPSRLDQri = 17295 |
| 161510 | CEFBS_None, // VPSRLDYri = 17296 |
| 161511 | CEFBS_None, // VPSRLDYrm = 17297 |
| 161512 | CEFBS_None, // VPSRLDYrr = 17298 |
| 161513 | CEFBS_None, // VPSRLDZ128mbi = 17299 |
| 161514 | CEFBS_None, // VPSRLDZ128mbik = 17300 |
| 161515 | CEFBS_None, // VPSRLDZ128mbikz = 17301 |
| 161516 | CEFBS_None, // VPSRLDZ128mi = 17302 |
| 161517 | CEFBS_None, // VPSRLDZ128mik = 17303 |
| 161518 | CEFBS_None, // VPSRLDZ128mikz = 17304 |
| 161519 | CEFBS_None, // VPSRLDZ128ri = 17305 |
| 161520 | CEFBS_None, // VPSRLDZ128rik = 17306 |
| 161521 | CEFBS_None, // VPSRLDZ128rikz = 17307 |
| 161522 | CEFBS_None, // VPSRLDZ128rm = 17308 |
| 161523 | CEFBS_None, // VPSRLDZ128rmk = 17309 |
| 161524 | CEFBS_None, // VPSRLDZ128rmkz = 17310 |
| 161525 | CEFBS_None, // VPSRLDZ128rr = 17311 |
| 161526 | CEFBS_None, // VPSRLDZ128rrk = 17312 |
| 161527 | CEFBS_None, // VPSRLDZ128rrkz = 17313 |
| 161528 | CEFBS_None, // VPSRLDZ256mbi = 17314 |
| 161529 | CEFBS_None, // VPSRLDZ256mbik = 17315 |
| 161530 | CEFBS_None, // VPSRLDZ256mbikz = 17316 |
| 161531 | CEFBS_None, // VPSRLDZ256mi = 17317 |
| 161532 | CEFBS_None, // VPSRLDZ256mik = 17318 |
| 161533 | CEFBS_None, // VPSRLDZ256mikz = 17319 |
| 161534 | CEFBS_None, // VPSRLDZ256ri = 17320 |
| 161535 | CEFBS_None, // VPSRLDZ256rik = 17321 |
| 161536 | CEFBS_None, // VPSRLDZ256rikz = 17322 |
| 161537 | CEFBS_None, // VPSRLDZ256rm = 17323 |
| 161538 | CEFBS_None, // VPSRLDZ256rmk = 17324 |
| 161539 | CEFBS_None, // VPSRLDZ256rmkz = 17325 |
| 161540 | CEFBS_None, // VPSRLDZ256rr = 17326 |
| 161541 | CEFBS_None, // VPSRLDZ256rrk = 17327 |
| 161542 | CEFBS_None, // VPSRLDZ256rrkz = 17328 |
| 161543 | CEFBS_None, // VPSRLDZmbi = 17329 |
| 161544 | CEFBS_None, // VPSRLDZmbik = 17330 |
| 161545 | CEFBS_None, // VPSRLDZmbikz = 17331 |
| 161546 | CEFBS_None, // VPSRLDZmi = 17332 |
| 161547 | CEFBS_None, // VPSRLDZmik = 17333 |
| 161548 | CEFBS_None, // VPSRLDZmikz = 17334 |
| 161549 | CEFBS_None, // VPSRLDZri = 17335 |
| 161550 | CEFBS_None, // VPSRLDZrik = 17336 |
| 161551 | CEFBS_None, // VPSRLDZrikz = 17337 |
| 161552 | CEFBS_None, // VPSRLDZrm = 17338 |
| 161553 | CEFBS_None, // VPSRLDZrmk = 17339 |
| 161554 | CEFBS_None, // VPSRLDZrmkz = 17340 |
| 161555 | CEFBS_None, // VPSRLDZrr = 17341 |
| 161556 | CEFBS_None, // VPSRLDZrrk = 17342 |
| 161557 | CEFBS_None, // VPSRLDZrrkz = 17343 |
| 161558 | CEFBS_None, // VPSRLDri = 17344 |
| 161559 | CEFBS_None, // VPSRLDrm = 17345 |
| 161560 | CEFBS_None, // VPSRLDrr = 17346 |
| 161561 | CEFBS_None, // VPSRLQYri = 17347 |
| 161562 | CEFBS_None, // VPSRLQYrm = 17348 |
| 161563 | CEFBS_None, // VPSRLQYrr = 17349 |
| 161564 | CEFBS_None, // VPSRLQZ128mbi = 17350 |
| 161565 | CEFBS_None, // VPSRLQZ128mbik = 17351 |
| 161566 | CEFBS_None, // VPSRLQZ128mbikz = 17352 |
| 161567 | CEFBS_None, // VPSRLQZ128mi = 17353 |
| 161568 | CEFBS_None, // VPSRLQZ128mik = 17354 |
| 161569 | CEFBS_None, // VPSRLQZ128mikz = 17355 |
| 161570 | CEFBS_None, // VPSRLQZ128ri = 17356 |
| 161571 | CEFBS_None, // VPSRLQZ128rik = 17357 |
| 161572 | CEFBS_None, // VPSRLQZ128rikz = 17358 |
| 161573 | CEFBS_None, // VPSRLQZ128rm = 17359 |
| 161574 | CEFBS_None, // VPSRLQZ128rmk = 17360 |
| 161575 | CEFBS_None, // VPSRLQZ128rmkz = 17361 |
| 161576 | CEFBS_None, // VPSRLQZ128rr = 17362 |
| 161577 | CEFBS_None, // VPSRLQZ128rrk = 17363 |
| 161578 | CEFBS_None, // VPSRLQZ128rrkz = 17364 |
| 161579 | CEFBS_None, // VPSRLQZ256mbi = 17365 |
| 161580 | CEFBS_None, // VPSRLQZ256mbik = 17366 |
| 161581 | CEFBS_None, // VPSRLQZ256mbikz = 17367 |
| 161582 | CEFBS_None, // VPSRLQZ256mi = 17368 |
| 161583 | CEFBS_None, // VPSRLQZ256mik = 17369 |
| 161584 | CEFBS_None, // VPSRLQZ256mikz = 17370 |
| 161585 | CEFBS_None, // VPSRLQZ256ri = 17371 |
| 161586 | CEFBS_None, // VPSRLQZ256rik = 17372 |
| 161587 | CEFBS_None, // VPSRLQZ256rikz = 17373 |
| 161588 | CEFBS_None, // VPSRLQZ256rm = 17374 |
| 161589 | CEFBS_None, // VPSRLQZ256rmk = 17375 |
| 161590 | CEFBS_None, // VPSRLQZ256rmkz = 17376 |
| 161591 | CEFBS_None, // VPSRLQZ256rr = 17377 |
| 161592 | CEFBS_None, // VPSRLQZ256rrk = 17378 |
| 161593 | CEFBS_None, // VPSRLQZ256rrkz = 17379 |
| 161594 | CEFBS_None, // VPSRLQZmbi = 17380 |
| 161595 | CEFBS_None, // VPSRLQZmbik = 17381 |
| 161596 | CEFBS_None, // VPSRLQZmbikz = 17382 |
| 161597 | CEFBS_None, // VPSRLQZmi = 17383 |
| 161598 | CEFBS_None, // VPSRLQZmik = 17384 |
| 161599 | CEFBS_None, // VPSRLQZmikz = 17385 |
| 161600 | CEFBS_None, // VPSRLQZri = 17386 |
| 161601 | CEFBS_None, // VPSRLQZrik = 17387 |
| 161602 | CEFBS_None, // VPSRLQZrikz = 17388 |
| 161603 | CEFBS_None, // VPSRLQZrm = 17389 |
| 161604 | CEFBS_None, // VPSRLQZrmk = 17390 |
| 161605 | CEFBS_None, // VPSRLQZrmkz = 17391 |
| 161606 | CEFBS_None, // VPSRLQZrr = 17392 |
| 161607 | CEFBS_None, // VPSRLQZrrk = 17393 |
| 161608 | CEFBS_None, // VPSRLQZrrkz = 17394 |
| 161609 | CEFBS_None, // VPSRLQri = 17395 |
| 161610 | CEFBS_None, // VPSRLQrm = 17396 |
| 161611 | CEFBS_None, // VPSRLQrr = 17397 |
| 161612 | CEFBS_None, // VPSRLVDYrm = 17398 |
| 161613 | CEFBS_None, // VPSRLVDYrr = 17399 |
| 161614 | CEFBS_None, // VPSRLVDZ128rm = 17400 |
| 161615 | CEFBS_None, // VPSRLVDZ128rmb = 17401 |
| 161616 | CEFBS_None, // VPSRLVDZ128rmbk = 17402 |
| 161617 | CEFBS_None, // VPSRLVDZ128rmbkz = 17403 |
| 161618 | CEFBS_None, // VPSRLVDZ128rmk = 17404 |
| 161619 | CEFBS_None, // VPSRLVDZ128rmkz = 17405 |
| 161620 | CEFBS_None, // VPSRLVDZ128rr = 17406 |
| 161621 | CEFBS_None, // VPSRLVDZ128rrk = 17407 |
| 161622 | CEFBS_None, // VPSRLVDZ128rrkz = 17408 |
| 161623 | CEFBS_None, // VPSRLVDZ256rm = 17409 |
| 161624 | CEFBS_None, // VPSRLVDZ256rmb = 17410 |
| 161625 | CEFBS_None, // VPSRLVDZ256rmbk = 17411 |
| 161626 | CEFBS_None, // VPSRLVDZ256rmbkz = 17412 |
| 161627 | CEFBS_None, // VPSRLVDZ256rmk = 17413 |
| 161628 | CEFBS_None, // VPSRLVDZ256rmkz = 17414 |
| 161629 | CEFBS_None, // VPSRLVDZ256rr = 17415 |
| 161630 | CEFBS_None, // VPSRLVDZ256rrk = 17416 |
| 161631 | CEFBS_None, // VPSRLVDZ256rrkz = 17417 |
| 161632 | CEFBS_None, // VPSRLVDZrm = 17418 |
| 161633 | CEFBS_None, // VPSRLVDZrmb = 17419 |
| 161634 | CEFBS_None, // VPSRLVDZrmbk = 17420 |
| 161635 | CEFBS_None, // VPSRLVDZrmbkz = 17421 |
| 161636 | CEFBS_None, // VPSRLVDZrmk = 17422 |
| 161637 | CEFBS_None, // VPSRLVDZrmkz = 17423 |
| 161638 | CEFBS_None, // VPSRLVDZrr = 17424 |
| 161639 | CEFBS_None, // VPSRLVDZrrk = 17425 |
| 161640 | CEFBS_None, // VPSRLVDZrrkz = 17426 |
| 161641 | CEFBS_None, // VPSRLVDrm = 17427 |
| 161642 | CEFBS_None, // VPSRLVDrr = 17428 |
| 161643 | CEFBS_None, // VPSRLVQYrm = 17429 |
| 161644 | CEFBS_None, // VPSRLVQYrr = 17430 |
| 161645 | CEFBS_None, // VPSRLVQZ128rm = 17431 |
| 161646 | CEFBS_None, // VPSRLVQZ128rmb = 17432 |
| 161647 | CEFBS_None, // VPSRLVQZ128rmbk = 17433 |
| 161648 | CEFBS_None, // VPSRLVQZ128rmbkz = 17434 |
| 161649 | CEFBS_None, // VPSRLVQZ128rmk = 17435 |
| 161650 | CEFBS_None, // VPSRLVQZ128rmkz = 17436 |
| 161651 | CEFBS_None, // VPSRLVQZ128rr = 17437 |
| 161652 | CEFBS_None, // VPSRLVQZ128rrk = 17438 |
| 161653 | CEFBS_None, // VPSRLVQZ128rrkz = 17439 |
| 161654 | CEFBS_None, // VPSRLVQZ256rm = 17440 |
| 161655 | CEFBS_None, // VPSRLVQZ256rmb = 17441 |
| 161656 | CEFBS_None, // VPSRLVQZ256rmbk = 17442 |
| 161657 | CEFBS_None, // VPSRLVQZ256rmbkz = 17443 |
| 161658 | CEFBS_None, // VPSRLVQZ256rmk = 17444 |
| 161659 | CEFBS_None, // VPSRLVQZ256rmkz = 17445 |
| 161660 | CEFBS_None, // VPSRLVQZ256rr = 17446 |
| 161661 | CEFBS_None, // VPSRLVQZ256rrk = 17447 |
| 161662 | CEFBS_None, // VPSRLVQZ256rrkz = 17448 |
| 161663 | CEFBS_None, // VPSRLVQZrm = 17449 |
| 161664 | CEFBS_None, // VPSRLVQZrmb = 17450 |
| 161665 | CEFBS_None, // VPSRLVQZrmbk = 17451 |
| 161666 | CEFBS_None, // VPSRLVQZrmbkz = 17452 |
| 161667 | CEFBS_None, // VPSRLVQZrmk = 17453 |
| 161668 | CEFBS_None, // VPSRLVQZrmkz = 17454 |
| 161669 | CEFBS_None, // VPSRLVQZrr = 17455 |
| 161670 | CEFBS_None, // VPSRLVQZrrk = 17456 |
| 161671 | CEFBS_None, // VPSRLVQZrrkz = 17457 |
| 161672 | CEFBS_None, // VPSRLVQrm = 17458 |
| 161673 | CEFBS_None, // VPSRLVQrr = 17459 |
| 161674 | CEFBS_None, // VPSRLVWZ128rm = 17460 |
| 161675 | CEFBS_None, // VPSRLVWZ128rmk = 17461 |
| 161676 | CEFBS_None, // VPSRLVWZ128rmkz = 17462 |
| 161677 | CEFBS_None, // VPSRLVWZ128rr = 17463 |
| 161678 | CEFBS_None, // VPSRLVWZ128rrk = 17464 |
| 161679 | CEFBS_None, // VPSRLVWZ128rrkz = 17465 |
| 161680 | CEFBS_None, // VPSRLVWZ256rm = 17466 |
| 161681 | CEFBS_None, // VPSRLVWZ256rmk = 17467 |
| 161682 | CEFBS_None, // VPSRLVWZ256rmkz = 17468 |
| 161683 | CEFBS_None, // VPSRLVWZ256rr = 17469 |
| 161684 | CEFBS_None, // VPSRLVWZ256rrk = 17470 |
| 161685 | CEFBS_None, // VPSRLVWZ256rrkz = 17471 |
| 161686 | CEFBS_None, // VPSRLVWZrm = 17472 |
| 161687 | CEFBS_None, // VPSRLVWZrmk = 17473 |
| 161688 | CEFBS_None, // VPSRLVWZrmkz = 17474 |
| 161689 | CEFBS_None, // VPSRLVWZrr = 17475 |
| 161690 | CEFBS_None, // VPSRLVWZrrk = 17476 |
| 161691 | CEFBS_None, // VPSRLVWZrrkz = 17477 |
| 161692 | CEFBS_None, // VPSRLWYri = 17478 |
| 161693 | CEFBS_None, // VPSRLWYrm = 17479 |
| 161694 | CEFBS_None, // VPSRLWYrr = 17480 |
| 161695 | CEFBS_None, // VPSRLWZ128mi = 17481 |
| 161696 | CEFBS_None, // VPSRLWZ128mik = 17482 |
| 161697 | CEFBS_None, // VPSRLWZ128mikz = 17483 |
| 161698 | CEFBS_None, // VPSRLWZ128ri = 17484 |
| 161699 | CEFBS_None, // VPSRLWZ128rik = 17485 |
| 161700 | CEFBS_None, // VPSRLWZ128rikz = 17486 |
| 161701 | CEFBS_None, // VPSRLWZ128rm = 17487 |
| 161702 | CEFBS_None, // VPSRLWZ128rmk = 17488 |
| 161703 | CEFBS_None, // VPSRLWZ128rmkz = 17489 |
| 161704 | CEFBS_None, // VPSRLWZ128rr = 17490 |
| 161705 | CEFBS_None, // VPSRLWZ128rrk = 17491 |
| 161706 | CEFBS_None, // VPSRLWZ128rrkz = 17492 |
| 161707 | CEFBS_None, // VPSRLWZ256mi = 17493 |
| 161708 | CEFBS_None, // VPSRLWZ256mik = 17494 |
| 161709 | CEFBS_None, // VPSRLWZ256mikz = 17495 |
| 161710 | CEFBS_None, // VPSRLWZ256ri = 17496 |
| 161711 | CEFBS_None, // VPSRLWZ256rik = 17497 |
| 161712 | CEFBS_None, // VPSRLWZ256rikz = 17498 |
| 161713 | CEFBS_None, // VPSRLWZ256rm = 17499 |
| 161714 | CEFBS_None, // VPSRLWZ256rmk = 17500 |
| 161715 | CEFBS_None, // VPSRLWZ256rmkz = 17501 |
| 161716 | CEFBS_None, // VPSRLWZ256rr = 17502 |
| 161717 | CEFBS_None, // VPSRLWZ256rrk = 17503 |
| 161718 | CEFBS_None, // VPSRLWZ256rrkz = 17504 |
| 161719 | CEFBS_None, // VPSRLWZmi = 17505 |
| 161720 | CEFBS_None, // VPSRLWZmik = 17506 |
| 161721 | CEFBS_None, // VPSRLWZmikz = 17507 |
| 161722 | CEFBS_None, // VPSRLWZri = 17508 |
| 161723 | CEFBS_None, // VPSRLWZrik = 17509 |
| 161724 | CEFBS_None, // VPSRLWZrikz = 17510 |
| 161725 | CEFBS_None, // VPSRLWZrm = 17511 |
| 161726 | CEFBS_None, // VPSRLWZrmk = 17512 |
| 161727 | CEFBS_None, // VPSRLWZrmkz = 17513 |
| 161728 | CEFBS_None, // VPSRLWZrr = 17514 |
| 161729 | CEFBS_None, // VPSRLWZrrk = 17515 |
| 161730 | CEFBS_None, // VPSRLWZrrkz = 17516 |
| 161731 | CEFBS_None, // VPSRLWri = 17517 |
| 161732 | CEFBS_None, // VPSRLWrm = 17518 |
| 161733 | CEFBS_None, // VPSRLWrr = 17519 |
| 161734 | CEFBS_None, // VPSUBBYrm = 17520 |
| 161735 | CEFBS_None, // VPSUBBYrr = 17521 |
| 161736 | CEFBS_None, // VPSUBBZ128rm = 17522 |
| 161737 | CEFBS_None, // VPSUBBZ128rmk = 17523 |
| 161738 | CEFBS_None, // VPSUBBZ128rmkz = 17524 |
| 161739 | CEFBS_None, // VPSUBBZ128rr = 17525 |
| 161740 | CEFBS_None, // VPSUBBZ128rrk = 17526 |
| 161741 | CEFBS_None, // VPSUBBZ128rrkz = 17527 |
| 161742 | CEFBS_None, // VPSUBBZ256rm = 17528 |
| 161743 | CEFBS_None, // VPSUBBZ256rmk = 17529 |
| 161744 | CEFBS_None, // VPSUBBZ256rmkz = 17530 |
| 161745 | CEFBS_None, // VPSUBBZ256rr = 17531 |
| 161746 | CEFBS_None, // VPSUBBZ256rrk = 17532 |
| 161747 | CEFBS_None, // VPSUBBZ256rrkz = 17533 |
| 161748 | CEFBS_None, // VPSUBBZrm = 17534 |
| 161749 | CEFBS_None, // VPSUBBZrmk = 17535 |
| 161750 | CEFBS_None, // VPSUBBZrmkz = 17536 |
| 161751 | CEFBS_None, // VPSUBBZrr = 17537 |
| 161752 | CEFBS_None, // VPSUBBZrrk = 17538 |
| 161753 | CEFBS_None, // VPSUBBZrrkz = 17539 |
| 161754 | CEFBS_None, // VPSUBBrm = 17540 |
| 161755 | CEFBS_None, // VPSUBBrr = 17541 |
| 161756 | CEFBS_None, // VPSUBDYrm = 17542 |
| 161757 | CEFBS_None, // VPSUBDYrr = 17543 |
| 161758 | CEFBS_None, // VPSUBDZ128rm = 17544 |
| 161759 | CEFBS_None, // VPSUBDZ128rmb = 17545 |
| 161760 | CEFBS_None, // VPSUBDZ128rmbk = 17546 |
| 161761 | CEFBS_None, // VPSUBDZ128rmbkz = 17547 |
| 161762 | CEFBS_None, // VPSUBDZ128rmk = 17548 |
| 161763 | CEFBS_None, // VPSUBDZ128rmkz = 17549 |
| 161764 | CEFBS_None, // VPSUBDZ128rr = 17550 |
| 161765 | CEFBS_None, // VPSUBDZ128rrk = 17551 |
| 161766 | CEFBS_None, // VPSUBDZ128rrkz = 17552 |
| 161767 | CEFBS_None, // VPSUBDZ256rm = 17553 |
| 161768 | CEFBS_None, // VPSUBDZ256rmb = 17554 |
| 161769 | CEFBS_None, // VPSUBDZ256rmbk = 17555 |
| 161770 | CEFBS_None, // VPSUBDZ256rmbkz = 17556 |
| 161771 | CEFBS_None, // VPSUBDZ256rmk = 17557 |
| 161772 | CEFBS_None, // VPSUBDZ256rmkz = 17558 |
| 161773 | CEFBS_None, // VPSUBDZ256rr = 17559 |
| 161774 | CEFBS_None, // VPSUBDZ256rrk = 17560 |
| 161775 | CEFBS_None, // VPSUBDZ256rrkz = 17561 |
| 161776 | CEFBS_None, // VPSUBDZrm = 17562 |
| 161777 | CEFBS_None, // VPSUBDZrmb = 17563 |
| 161778 | CEFBS_None, // VPSUBDZrmbk = 17564 |
| 161779 | CEFBS_None, // VPSUBDZrmbkz = 17565 |
| 161780 | CEFBS_None, // VPSUBDZrmk = 17566 |
| 161781 | CEFBS_None, // VPSUBDZrmkz = 17567 |
| 161782 | CEFBS_None, // VPSUBDZrr = 17568 |
| 161783 | CEFBS_None, // VPSUBDZrrk = 17569 |
| 161784 | CEFBS_None, // VPSUBDZrrkz = 17570 |
| 161785 | CEFBS_None, // VPSUBDrm = 17571 |
| 161786 | CEFBS_None, // VPSUBDrr = 17572 |
| 161787 | CEFBS_None, // VPSUBQYrm = 17573 |
| 161788 | CEFBS_None, // VPSUBQYrr = 17574 |
| 161789 | CEFBS_None, // VPSUBQZ128rm = 17575 |
| 161790 | CEFBS_None, // VPSUBQZ128rmb = 17576 |
| 161791 | CEFBS_None, // VPSUBQZ128rmbk = 17577 |
| 161792 | CEFBS_None, // VPSUBQZ128rmbkz = 17578 |
| 161793 | CEFBS_None, // VPSUBQZ128rmk = 17579 |
| 161794 | CEFBS_None, // VPSUBQZ128rmkz = 17580 |
| 161795 | CEFBS_None, // VPSUBQZ128rr = 17581 |
| 161796 | CEFBS_None, // VPSUBQZ128rrk = 17582 |
| 161797 | CEFBS_None, // VPSUBQZ128rrkz = 17583 |
| 161798 | CEFBS_None, // VPSUBQZ256rm = 17584 |
| 161799 | CEFBS_None, // VPSUBQZ256rmb = 17585 |
| 161800 | CEFBS_None, // VPSUBQZ256rmbk = 17586 |
| 161801 | CEFBS_None, // VPSUBQZ256rmbkz = 17587 |
| 161802 | CEFBS_None, // VPSUBQZ256rmk = 17588 |
| 161803 | CEFBS_None, // VPSUBQZ256rmkz = 17589 |
| 161804 | CEFBS_None, // VPSUBQZ256rr = 17590 |
| 161805 | CEFBS_None, // VPSUBQZ256rrk = 17591 |
| 161806 | CEFBS_None, // VPSUBQZ256rrkz = 17592 |
| 161807 | CEFBS_None, // VPSUBQZrm = 17593 |
| 161808 | CEFBS_None, // VPSUBQZrmb = 17594 |
| 161809 | CEFBS_None, // VPSUBQZrmbk = 17595 |
| 161810 | CEFBS_None, // VPSUBQZrmbkz = 17596 |
| 161811 | CEFBS_None, // VPSUBQZrmk = 17597 |
| 161812 | CEFBS_None, // VPSUBQZrmkz = 17598 |
| 161813 | CEFBS_None, // VPSUBQZrr = 17599 |
| 161814 | CEFBS_None, // VPSUBQZrrk = 17600 |
| 161815 | CEFBS_None, // VPSUBQZrrkz = 17601 |
| 161816 | CEFBS_None, // VPSUBQrm = 17602 |
| 161817 | CEFBS_None, // VPSUBQrr = 17603 |
| 161818 | CEFBS_None, // VPSUBSBYrm = 17604 |
| 161819 | CEFBS_None, // VPSUBSBYrr = 17605 |
| 161820 | CEFBS_None, // VPSUBSBZ128rm = 17606 |
| 161821 | CEFBS_None, // VPSUBSBZ128rmk = 17607 |
| 161822 | CEFBS_None, // VPSUBSBZ128rmkz = 17608 |
| 161823 | CEFBS_None, // VPSUBSBZ128rr = 17609 |
| 161824 | CEFBS_None, // VPSUBSBZ128rrk = 17610 |
| 161825 | CEFBS_None, // VPSUBSBZ128rrkz = 17611 |
| 161826 | CEFBS_None, // VPSUBSBZ256rm = 17612 |
| 161827 | CEFBS_None, // VPSUBSBZ256rmk = 17613 |
| 161828 | CEFBS_None, // VPSUBSBZ256rmkz = 17614 |
| 161829 | CEFBS_None, // VPSUBSBZ256rr = 17615 |
| 161830 | CEFBS_None, // VPSUBSBZ256rrk = 17616 |
| 161831 | CEFBS_None, // VPSUBSBZ256rrkz = 17617 |
| 161832 | CEFBS_None, // VPSUBSBZrm = 17618 |
| 161833 | CEFBS_None, // VPSUBSBZrmk = 17619 |
| 161834 | CEFBS_None, // VPSUBSBZrmkz = 17620 |
| 161835 | CEFBS_None, // VPSUBSBZrr = 17621 |
| 161836 | CEFBS_None, // VPSUBSBZrrk = 17622 |
| 161837 | CEFBS_None, // VPSUBSBZrrkz = 17623 |
| 161838 | CEFBS_None, // VPSUBSBrm = 17624 |
| 161839 | CEFBS_None, // VPSUBSBrr = 17625 |
| 161840 | CEFBS_None, // VPSUBSWYrm = 17626 |
| 161841 | CEFBS_None, // VPSUBSWYrr = 17627 |
| 161842 | CEFBS_None, // VPSUBSWZ128rm = 17628 |
| 161843 | CEFBS_None, // VPSUBSWZ128rmk = 17629 |
| 161844 | CEFBS_None, // VPSUBSWZ128rmkz = 17630 |
| 161845 | CEFBS_None, // VPSUBSWZ128rr = 17631 |
| 161846 | CEFBS_None, // VPSUBSWZ128rrk = 17632 |
| 161847 | CEFBS_None, // VPSUBSWZ128rrkz = 17633 |
| 161848 | CEFBS_None, // VPSUBSWZ256rm = 17634 |
| 161849 | CEFBS_None, // VPSUBSWZ256rmk = 17635 |
| 161850 | CEFBS_None, // VPSUBSWZ256rmkz = 17636 |
| 161851 | CEFBS_None, // VPSUBSWZ256rr = 17637 |
| 161852 | CEFBS_None, // VPSUBSWZ256rrk = 17638 |
| 161853 | CEFBS_None, // VPSUBSWZ256rrkz = 17639 |
| 161854 | CEFBS_None, // VPSUBSWZrm = 17640 |
| 161855 | CEFBS_None, // VPSUBSWZrmk = 17641 |
| 161856 | CEFBS_None, // VPSUBSWZrmkz = 17642 |
| 161857 | CEFBS_None, // VPSUBSWZrr = 17643 |
| 161858 | CEFBS_None, // VPSUBSWZrrk = 17644 |
| 161859 | CEFBS_None, // VPSUBSWZrrkz = 17645 |
| 161860 | CEFBS_None, // VPSUBSWrm = 17646 |
| 161861 | CEFBS_None, // VPSUBSWrr = 17647 |
| 161862 | CEFBS_None, // VPSUBUSBYrm = 17648 |
| 161863 | CEFBS_None, // VPSUBUSBYrr = 17649 |
| 161864 | CEFBS_None, // VPSUBUSBZ128rm = 17650 |
| 161865 | CEFBS_None, // VPSUBUSBZ128rmk = 17651 |
| 161866 | CEFBS_None, // VPSUBUSBZ128rmkz = 17652 |
| 161867 | CEFBS_None, // VPSUBUSBZ128rr = 17653 |
| 161868 | CEFBS_None, // VPSUBUSBZ128rrk = 17654 |
| 161869 | CEFBS_None, // VPSUBUSBZ128rrkz = 17655 |
| 161870 | CEFBS_None, // VPSUBUSBZ256rm = 17656 |
| 161871 | CEFBS_None, // VPSUBUSBZ256rmk = 17657 |
| 161872 | CEFBS_None, // VPSUBUSBZ256rmkz = 17658 |
| 161873 | CEFBS_None, // VPSUBUSBZ256rr = 17659 |
| 161874 | CEFBS_None, // VPSUBUSBZ256rrk = 17660 |
| 161875 | CEFBS_None, // VPSUBUSBZ256rrkz = 17661 |
| 161876 | CEFBS_None, // VPSUBUSBZrm = 17662 |
| 161877 | CEFBS_None, // VPSUBUSBZrmk = 17663 |
| 161878 | CEFBS_None, // VPSUBUSBZrmkz = 17664 |
| 161879 | CEFBS_None, // VPSUBUSBZrr = 17665 |
| 161880 | CEFBS_None, // VPSUBUSBZrrk = 17666 |
| 161881 | CEFBS_None, // VPSUBUSBZrrkz = 17667 |
| 161882 | CEFBS_None, // VPSUBUSBrm = 17668 |
| 161883 | CEFBS_None, // VPSUBUSBrr = 17669 |
| 161884 | CEFBS_None, // VPSUBUSWYrm = 17670 |
| 161885 | CEFBS_None, // VPSUBUSWYrr = 17671 |
| 161886 | CEFBS_None, // VPSUBUSWZ128rm = 17672 |
| 161887 | CEFBS_None, // VPSUBUSWZ128rmk = 17673 |
| 161888 | CEFBS_None, // VPSUBUSWZ128rmkz = 17674 |
| 161889 | CEFBS_None, // VPSUBUSWZ128rr = 17675 |
| 161890 | CEFBS_None, // VPSUBUSWZ128rrk = 17676 |
| 161891 | CEFBS_None, // VPSUBUSWZ128rrkz = 17677 |
| 161892 | CEFBS_None, // VPSUBUSWZ256rm = 17678 |
| 161893 | CEFBS_None, // VPSUBUSWZ256rmk = 17679 |
| 161894 | CEFBS_None, // VPSUBUSWZ256rmkz = 17680 |
| 161895 | CEFBS_None, // VPSUBUSWZ256rr = 17681 |
| 161896 | CEFBS_None, // VPSUBUSWZ256rrk = 17682 |
| 161897 | CEFBS_None, // VPSUBUSWZ256rrkz = 17683 |
| 161898 | CEFBS_None, // VPSUBUSWZrm = 17684 |
| 161899 | CEFBS_None, // VPSUBUSWZrmk = 17685 |
| 161900 | CEFBS_None, // VPSUBUSWZrmkz = 17686 |
| 161901 | CEFBS_None, // VPSUBUSWZrr = 17687 |
| 161902 | CEFBS_None, // VPSUBUSWZrrk = 17688 |
| 161903 | CEFBS_None, // VPSUBUSWZrrkz = 17689 |
| 161904 | CEFBS_None, // VPSUBUSWrm = 17690 |
| 161905 | CEFBS_None, // VPSUBUSWrr = 17691 |
| 161906 | CEFBS_None, // VPSUBWYrm = 17692 |
| 161907 | CEFBS_None, // VPSUBWYrr = 17693 |
| 161908 | CEFBS_None, // VPSUBWZ128rm = 17694 |
| 161909 | CEFBS_None, // VPSUBWZ128rmk = 17695 |
| 161910 | CEFBS_None, // VPSUBWZ128rmkz = 17696 |
| 161911 | CEFBS_None, // VPSUBWZ128rr = 17697 |
| 161912 | CEFBS_None, // VPSUBWZ128rrk = 17698 |
| 161913 | CEFBS_None, // VPSUBWZ128rrkz = 17699 |
| 161914 | CEFBS_None, // VPSUBWZ256rm = 17700 |
| 161915 | CEFBS_None, // VPSUBWZ256rmk = 17701 |
| 161916 | CEFBS_None, // VPSUBWZ256rmkz = 17702 |
| 161917 | CEFBS_None, // VPSUBWZ256rr = 17703 |
| 161918 | CEFBS_None, // VPSUBWZ256rrk = 17704 |
| 161919 | CEFBS_None, // VPSUBWZ256rrkz = 17705 |
| 161920 | CEFBS_None, // VPSUBWZrm = 17706 |
| 161921 | CEFBS_None, // VPSUBWZrmk = 17707 |
| 161922 | CEFBS_None, // VPSUBWZrmkz = 17708 |
| 161923 | CEFBS_None, // VPSUBWZrr = 17709 |
| 161924 | CEFBS_None, // VPSUBWZrrk = 17710 |
| 161925 | CEFBS_None, // VPSUBWZrrkz = 17711 |
| 161926 | CEFBS_None, // VPSUBWrm = 17712 |
| 161927 | CEFBS_None, // VPSUBWrr = 17713 |
| 161928 | CEFBS_None, // VPTERNLOGDZ128rmbi = 17714 |
| 161929 | CEFBS_None, // VPTERNLOGDZ128rmbik = 17715 |
| 161930 | CEFBS_None, // VPTERNLOGDZ128rmbikz = 17716 |
| 161931 | CEFBS_None, // VPTERNLOGDZ128rmi = 17717 |
| 161932 | CEFBS_None, // VPTERNLOGDZ128rmik = 17718 |
| 161933 | CEFBS_None, // VPTERNLOGDZ128rmikz = 17719 |
| 161934 | CEFBS_None, // VPTERNLOGDZ128rri = 17720 |
| 161935 | CEFBS_None, // VPTERNLOGDZ128rrik = 17721 |
| 161936 | CEFBS_None, // VPTERNLOGDZ128rrikz = 17722 |
| 161937 | CEFBS_None, // VPTERNLOGDZ256rmbi = 17723 |
| 161938 | CEFBS_None, // VPTERNLOGDZ256rmbik = 17724 |
| 161939 | CEFBS_None, // VPTERNLOGDZ256rmbikz = 17725 |
| 161940 | CEFBS_None, // VPTERNLOGDZ256rmi = 17726 |
| 161941 | CEFBS_None, // VPTERNLOGDZ256rmik = 17727 |
| 161942 | CEFBS_None, // VPTERNLOGDZ256rmikz = 17728 |
| 161943 | CEFBS_None, // VPTERNLOGDZ256rri = 17729 |
| 161944 | CEFBS_None, // VPTERNLOGDZ256rrik = 17730 |
| 161945 | CEFBS_None, // VPTERNLOGDZ256rrikz = 17731 |
| 161946 | CEFBS_None, // VPTERNLOGDZrmbi = 17732 |
| 161947 | CEFBS_None, // VPTERNLOGDZrmbik = 17733 |
| 161948 | CEFBS_None, // VPTERNLOGDZrmbikz = 17734 |
| 161949 | CEFBS_None, // VPTERNLOGDZrmi = 17735 |
| 161950 | CEFBS_None, // VPTERNLOGDZrmik = 17736 |
| 161951 | CEFBS_None, // VPTERNLOGDZrmikz = 17737 |
| 161952 | CEFBS_None, // VPTERNLOGDZrri = 17738 |
| 161953 | CEFBS_None, // VPTERNLOGDZrrik = 17739 |
| 161954 | CEFBS_None, // VPTERNLOGDZrrikz = 17740 |
| 161955 | CEFBS_None, // VPTERNLOGQZ128rmbi = 17741 |
| 161956 | CEFBS_None, // VPTERNLOGQZ128rmbik = 17742 |
| 161957 | CEFBS_None, // VPTERNLOGQZ128rmbikz = 17743 |
| 161958 | CEFBS_None, // VPTERNLOGQZ128rmi = 17744 |
| 161959 | CEFBS_None, // VPTERNLOGQZ128rmik = 17745 |
| 161960 | CEFBS_None, // VPTERNLOGQZ128rmikz = 17746 |
| 161961 | CEFBS_None, // VPTERNLOGQZ128rri = 17747 |
| 161962 | CEFBS_None, // VPTERNLOGQZ128rrik = 17748 |
| 161963 | CEFBS_None, // VPTERNLOGQZ128rrikz = 17749 |
| 161964 | CEFBS_None, // VPTERNLOGQZ256rmbi = 17750 |
| 161965 | CEFBS_None, // VPTERNLOGQZ256rmbik = 17751 |
| 161966 | CEFBS_None, // VPTERNLOGQZ256rmbikz = 17752 |
| 161967 | CEFBS_None, // VPTERNLOGQZ256rmi = 17753 |
| 161968 | CEFBS_None, // VPTERNLOGQZ256rmik = 17754 |
| 161969 | CEFBS_None, // VPTERNLOGQZ256rmikz = 17755 |
| 161970 | CEFBS_None, // VPTERNLOGQZ256rri = 17756 |
| 161971 | CEFBS_None, // VPTERNLOGQZ256rrik = 17757 |
| 161972 | CEFBS_None, // VPTERNLOGQZ256rrikz = 17758 |
| 161973 | CEFBS_None, // VPTERNLOGQZrmbi = 17759 |
| 161974 | CEFBS_None, // VPTERNLOGQZrmbik = 17760 |
| 161975 | CEFBS_None, // VPTERNLOGQZrmbikz = 17761 |
| 161976 | CEFBS_None, // VPTERNLOGQZrmi = 17762 |
| 161977 | CEFBS_None, // VPTERNLOGQZrmik = 17763 |
| 161978 | CEFBS_None, // VPTERNLOGQZrmikz = 17764 |
| 161979 | CEFBS_None, // VPTERNLOGQZrri = 17765 |
| 161980 | CEFBS_None, // VPTERNLOGQZrrik = 17766 |
| 161981 | CEFBS_None, // VPTERNLOGQZrrikz = 17767 |
| 161982 | CEFBS_None, // VPTESTMBZ128rm = 17768 |
| 161983 | CEFBS_None, // VPTESTMBZ128rmk = 17769 |
| 161984 | CEFBS_None, // VPTESTMBZ128rr = 17770 |
| 161985 | CEFBS_None, // VPTESTMBZ128rrk = 17771 |
| 161986 | CEFBS_None, // VPTESTMBZ256rm = 17772 |
| 161987 | CEFBS_None, // VPTESTMBZ256rmk = 17773 |
| 161988 | CEFBS_None, // VPTESTMBZ256rr = 17774 |
| 161989 | CEFBS_None, // VPTESTMBZ256rrk = 17775 |
| 161990 | CEFBS_None, // VPTESTMBZrm = 17776 |
| 161991 | CEFBS_None, // VPTESTMBZrmk = 17777 |
| 161992 | CEFBS_None, // VPTESTMBZrr = 17778 |
| 161993 | CEFBS_None, // VPTESTMBZrrk = 17779 |
| 161994 | CEFBS_None, // VPTESTMDZ128rm = 17780 |
| 161995 | CEFBS_None, // VPTESTMDZ128rmb = 17781 |
| 161996 | CEFBS_None, // VPTESTMDZ128rmbk = 17782 |
| 161997 | CEFBS_None, // VPTESTMDZ128rmk = 17783 |
| 161998 | CEFBS_None, // VPTESTMDZ128rr = 17784 |
| 161999 | CEFBS_None, // VPTESTMDZ128rrk = 17785 |
| 162000 | CEFBS_None, // VPTESTMDZ256rm = 17786 |
| 162001 | CEFBS_None, // VPTESTMDZ256rmb = 17787 |
| 162002 | CEFBS_None, // VPTESTMDZ256rmbk = 17788 |
| 162003 | CEFBS_None, // VPTESTMDZ256rmk = 17789 |
| 162004 | CEFBS_None, // VPTESTMDZ256rr = 17790 |
| 162005 | CEFBS_None, // VPTESTMDZ256rrk = 17791 |
| 162006 | CEFBS_None, // VPTESTMDZrm = 17792 |
| 162007 | CEFBS_None, // VPTESTMDZrmb = 17793 |
| 162008 | CEFBS_None, // VPTESTMDZrmbk = 17794 |
| 162009 | CEFBS_None, // VPTESTMDZrmk = 17795 |
| 162010 | CEFBS_None, // VPTESTMDZrr = 17796 |
| 162011 | CEFBS_None, // VPTESTMDZrrk = 17797 |
| 162012 | CEFBS_None, // VPTESTMQZ128rm = 17798 |
| 162013 | CEFBS_None, // VPTESTMQZ128rmb = 17799 |
| 162014 | CEFBS_None, // VPTESTMQZ128rmbk = 17800 |
| 162015 | CEFBS_None, // VPTESTMQZ128rmk = 17801 |
| 162016 | CEFBS_None, // VPTESTMQZ128rr = 17802 |
| 162017 | CEFBS_None, // VPTESTMQZ128rrk = 17803 |
| 162018 | CEFBS_None, // VPTESTMQZ256rm = 17804 |
| 162019 | CEFBS_None, // VPTESTMQZ256rmb = 17805 |
| 162020 | CEFBS_None, // VPTESTMQZ256rmbk = 17806 |
| 162021 | CEFBS_None, // VPTESTMQZ256rmk = 17807 |
| 162022 | CEFBS_None, // VPTESTMQZ256rr = 17808 |
| 162023 | CEFBS_None, // VPTESTMQZ256rrk = 17809 |
| 162024 | CEFBS_None, // VPTESTMQZrm = 17810 |
| 162025 | CEFBS_None, // VPTESTMQZrmb = 17811 |
| 162026 | CEFBS_None, // VPTESTMQZrmbk = 17812 |
| 162027 | CEFBS_None, // VPTESTMQZrmk = 17813 |
| 162028 | CEFBS_None, // VPTESTMQZrr = 17814 |
| 162029 | CEFBS_None, // VPTESTMQZrrk = 17815 |
| 162030 | CEFBS_None, // VPTESTMWZ128rm = 17816 |
| 162031 | CEFBS_None, // VPTESTMWZ128rmk = 17817 |
| 162032 | CEFBS_None, // VPTESTMWZ128rr = 17818 |
| 162033 | CEFBS_None, // VPTESTMWZ128rrk = 17819 |
| 162034 | CEFBS_None, // VPTESTMWZ256rm = 17820 |
| 162035 | CEFBS_None, // VPTESTMWZ256rmk = 17821 |
| 162036 | CEFBS_None, // VPTESTMWZ256rr = 17822 |
| 162037 | CEFBS_None, // VPTESTMWZ256rrk = 17823 |
| 162038 | CEFBS_None, // VPTESTMWZrm = 17824 |
| 162039 | CEFBS_None, // VPTESTMWZrmk = 17825 |
| 162040 | CEFBS_None, // VPTESTMWZrr = 17826 |
| 162041 | CEFBS_None, // VPTESTMWZrrk = 17827 |
| 162042 | CEFBS_None, // VPTESTNMBZ128rm = 17828 |
| 162043 | CEFBS_None, // VPTESTNMBZ128rmk = 17829 |
| 162044 | CEFBS_None, // VPTESTNMBZ128rr = 17830 |
| 162045 | CEFBS_None, // VPTESTNMBZ128rrk = 17831 |
| 162046 | CEFBS_None, // VPTESTNMBZ256rm = 17832 |
| 162047 | CEFBS_None, // VPTESTNMBZ256rmk = 17833 |
| 162048 | CEFBS_None, // VPTESTNMBZ256rr = 17834 |
| 162049 | CEFBS_None, // VPTESTNMBZ256rrk = 17835 |
| 162050 | CEFBS_None, // VPTESTNMBZrm = 17836 |
| 162051 | CEFBS_None, // VPTESTNMBZrmk = 17837 |
| 162052 | CEFBS_None, // VPTESTNMBZrr = 17838 |
| 162053 | CEFBS_None, // VPTESTNMBZrrk = 17839 |
| 162054 | CEFBS_None, // VPTESTNMDZ128rm = 17840 |
| 162055 | CEFBS_None, // VPTESTNMDZ128rmb = 17841 |
| 162056 | CEFBS_None, // VPTESTNMDZ128rmbk = 17842 |
| 162057 | CEFBS_None, // VPTESTNMDZ128rmk = 17843 |
| 162058 | CEFBS_None, // VPTESTNMDZ128rr = 17844 |
| 162059 | CEFBS_None, // VPTESTNMDZ128rrk = 17845 |
| 162060 | CEFBS_None, // VPTESTNMDZ256rm = 17846 |
| 162061 | CEFBS_None, // VPTESTNMDZ256rmb = 17847 |
| 162062 | CEFBS_None, // VPTESTNMDZ256rmbk = 17848 |
| 162063 | CEFBS_None, // VPTESTNMDZ256rmk = 17849 |
| 162064 | CEFBS_None, // VPTESTNMDZ256rr = 17850 |
| 162065 | CEFBS_None, // VPTESTNMDZ256rrk = 17851 |
| 162066 | CEFBS_None, // VPTESTNMDZrm = 17852 |
| 162067 | CEFBS_None, // VPTESTNMDZrmb = 17853 |
| 162068 | CEFBS_None, // VPTESTNMDZrmbk = 17854 |
| 162069 | CEFBS_None, // VPTESTNMDZrmk = 17855 |
| 162070 | CEFBS_None, // VPTESTNMDZrr = 17856 |
| 162071 | CEFBS_None, // VPTESTNMDZrrk = 17857 |
| 162072 | CEFBS_None, // VPTESTNMQZ128rm = 17858 |
| 162073 | CEFBS_None, // VPTESTNMQZ128rmb = 17859 |
| 162074 | CEFBS_None, // VPTESTNMQZ128rmbk = 17860 |
| 162075 | CEFBS_None, // VPTESTNMQZ128rmk = 17861 |
| 162076 | CEFBS_None, // VPTESTNMQZ128rr = 17862 |
| 162077 | CEFBS_None, // VPTESTNMQZ128rrk = 17863 |
| 162078 | CEFBS_None, // VPTESTNMQZ256rm = 17864 |
| 162079 | CEFBS_None, // VPTESTNMQZ256rmb = 17865 |
| 162080 | CEFBS_None, // VPTESTNMQZ256rmbk = 17866 |
| 162081 | CEFBS_None, // VPTESTNMQZ256rmk = 17867 |
| 162082 | CEFBS_None, // VPTESTNMQZ256rr = 17868 |
| 162083 | CEFBS_None, // VPTESTNMQZ256rrk = 17869 |
| 162084 | CEFBS_None, // VPTESTNMQZrm = 17870 |
| 162085 | CEFBS_None, // VPTESTNMQZrmb = 17871 |
| 162086 | CEFBS_None, // VPTESTNMQZrmbk = 17872 |
| 162087 | CEFBS_None, // VPTESTNMQZrmk = 17873 |
| 162088 | CEFBS_None, // VPTESTNMQZrr = 17874 |
| 162089 | CEFBS_None, // VPTESTNMQZrrk = 17875 |
| 162090 | CEFBS_None, // VPTESTNMWZ128rm = 17876 |
| 162091 | CEFBS_None, // VPTESTNMWZ128rmk = 17877 |
| 162092 | CEFBS_None, // VPTESTNMWZ128rr = 17878 |
| 162093 | CEFBS_None, // VPTESTNMWZ128rrk = 17879 |
| 162094 | CEFBS_None, // VPTESTNMWZ256rm = 17880 |
| 162095 | CEFBS_None, // VPTESTNMWZ256rmk = 17881 |
| 162096 | CEFBS_None, // VPTESTNMWZ256rr = 17882 |
| 162097 | CEFBS_None, // VPTESTNMWZ256rrk = 17883 |
| 162098 | CEFBS_None, // VPTESTNMWZrm = 17884 |
| 162099 | CEFBS_None, // VPTESTNMWZrmk = 17885 |
| 162100 | CEFBS_None, // VPTESTNMWZrr = 17886 |
| 162101 | CEFBS_None, // VPTESTNMWZrrk = 17887 |
| 162102 | CEFBS_None, // VPTESTYrm = 17888 |
| 162103 | CEFBS_None, // VPTESTYrr = 17889 |
| 162104 | CEFBS_None, // VPTESTrm = 17890 |
| 162105 | CEFBS_None, // VPTESTrr = 17891 |
| 162106 | CEFBS_None, // VPUNPCKHBWYrm = 17892 |
| 162107 | CEFBS_None, // VPUNPCKHBWYrr = 17893 |
| 162108 | CEFBS_None, // VPUNPCKHBWZ128rm = 17894 |
| 162109 | CEFBS_None, // VPUNPCKHBWZ128rmk = 17895 |
| 162110 | CEFBS_None, // VPUNPCKHBWZ128rmkz = 17896 |
| 162111 | CEFBS_None, // VPUNPCKHBWZ128rr = 17897 |
| 162112 | CEFBS_None, // VPUNPCKHBWZ128rrk = 17898 |
| 162113 | CEFBS_None, // VPUNPCKHBWZ128rrkz = 17899 |
| 162114 | CEFBS_None, // VPUNPCKHBWZ256rm = 17900 |
| 162115 | CEFBS_None, // VPUNPCKHBWZ256rmk = 17901 |
| 162116 | CEFBS_None, // VPUNPCKHBWZ256rmkz = 17902 |
| 162117 | CEFBS_None, // VPUNPCKHBWZ256rr = 17903 |
| 162118 | CEFBS_None, // VPUNPCKHBWZ256rrk = 17904 |
| 162119 | CEFBS_None, // VPUNPCKHBWZ256rrkz = 17905 |
| 162120 | CEFBS_None, // VPUNPCKHBWZrm = 17906 |
| 162121 | CEFBS_None, // VPUNPCKHBWZrmk = 17907 |
| 162122 | CEFBS_None, // VPUNPCKHBWZrmkz = 17908 |
| 162123 | CEFBS_None, // VPUNPCKHBWZrr = 17909 |
| 162124 | CEFBS_None, // VPUNPCKHBWZrrk = 17910 |
| 162125 | CEFBS_None, // VPUNPCKHBWZrrkz = 17911 |
| 162126 | CEFBS_None, // VPUNPCKHBWrm = 17912 |
| 162127 | CEFBS_None, // VPUNPCKHBWrr = 17913 |
| 162128 | CEFBS_None, // VPUNPCKHDQYrm = 17914 |
| 162129 | CEFBS_None, // VPUNPCKHDQYrr = 17915 |
| 162130 | CEFBS_None, // VPUNPCKHDQZ128rm = 17916 |
| 162131 | CEFBS_None, // VPUNPCKHDQZ128rmb = 17917 |
| 162132 | CEFBS_None, // VPUNPCKHDQZ128rmbk = 17918 |
| 162133 | CEFBS_None, // VPUNPCKHDQZ128rmbkz = 17919 |
| 162134 | CEFBS_None, // VPUNPCKHDQZ128rmk = 17920 |
| 162135 | CEFBS_None, // VPUNPCKHDQZ128rmkz = 17921 |
| 162136 | CEFBS_None, // VPUNPCKHDQZ128rr = 17922 |
| 162137 | CEFBS_None, // VPUNPCKHDQZ128rrk = 17923 |
| 162138 | CEFBS_None, // VPUNPCKHDQZ128rrkz = 17924 |
| 162139 | CEFBS_None, // VPUNPCKHDQZ256rm = 17925 |
| 162140 | CEFBS_None, // VPUNPCKHDQZ256rmb = 17926 |
| 162141 | CEFBS_None, // VPUNPCKHDQZ256rmbk = 17927 |
| 162142 | CEFBS_None, // VPUNPCKHDQZ256rmbkz = 17928 |
| 162143 | CEFBS_None, // VPUNPCKHDQZ256rmk = 17929 |
| 162144 | CEFBS_None, // VPUNPCKHDQZ256rmkz = 17930 |
| 162145 | CEFBS_None, // VPUNPCKHDQZ256rr = 17931 |
| 162146 | CEFBS_None, // VPUNPCKHDQZ256rrk = 17932 |
| 162147 | CEFBS_None, // VPUNPCKHDQZ256rrkz = 17933 |
| 162148 | CEFBS_None, // VPUNPCKHDQZrm = 17934 |
| 162149 | CEFBS_None, // VPUNPCKHDQZrmb = 17935 |
| 162150 | CEFBS_None, // VPUNPCKHDQZrmbk = 17936 |
| 162151 | CEFBS_None, // VPUNPCKHDQZrmbkz = 17937 |
| 162152 | CEFBS_None, // VPUNPCKHDQZrmk = 17938 |
| 162153 | CEFBS_None, // VPUNPCKHDQZrmkz = 17939 |
| 162154 | CEFBS_None, // VPUNPCKHDQZrr = 17940 |
| 162155 | CEFBS_None, // VPUNPCKHDQZrrk = 17941 |
| 162156 | CEFBS_None, // VPUNPCKHDQZrrkz = 17942 |
| 162157 | CEFBS_None, // VPUNPCKHDQrm = 17943 |
| 162158 | CEFBS_None, // VPUNPCKHDQrr = 17944 |
| 162159 | CEFBS_None, // VPUNPCKHQDQYrm = 17945 |
| 162160 | CEFBS_None, // VPUNPCKHQDQYrr = 17946 |
| 162161 | CEFBS_None, // VPUNPCKHQDQZ128rm = 17947 |
| 162162 | CEFBS_None, // VPUNPCKHQDQZ128rmb = 17948 |
| 162163 | CEFBS_None, // VPUNPCKHQDQZ128rmbk = 17949 |
| 162164 | CEFBS_None, // VPUNPCKHQDQZ128rmbkz = 17950 |
| 162165 | CEFBS_None, // VPUNPCKHQDQZ128rmk = 17951 |
| 162166 | CEFBS_None, // VPUNPCKHQDQZ128rmkz = 17952 |
| 162167 | CEFBS_None, // VPUNPCKHQDQZ128rr = 17953 |
| 162168 | CEFBS_None, // VPUNPCKHQDQZ128rrk = 17954 |
| 162169 | CEFBS_None, // VPUNPCKHQDQZ128rrkz = 17955 |
| 162170 | CEFBS_None, // VPUNPCKHQDQZ256rm = 17956 |
| 162171 | CEFBS_None, // VPUNPCKHQDQZ256rmb = 17957 |
| 162172 | CEFBS_None, // VPUNPCKHQDQZ256rmbk = 17958 |
| 162173 | CEFBS_None, // VPUNPCKHQDQZ256rmbkz = 17959 |
| 162174 | CEFBS_None, // VPUNPCKHQDQZ256rmk = 17960 |
| 162175 | CEFBS_None, // VPUNPCKHQDQZ256rmkz = 17961 |
| 162176 | CEFBS_None, // VPUNPCKHQDQZ256rr = 17962 |
| 162177 | CEFBS_None, // VPUNPCKHQDQZ256rrk = 17963 |
| 162178 | CEFBS_None, // VPUNPCKHQDQZ256rrkz = 17964 |
| 162179 | CEFBS_None, // VPUNPCKHQDQZrm = 17965 |
| 162180 | CEFBS_None, // VPUNPCKHQDQZrmb = 17966 |
| 162181 | CEFBS_None, // VPUNPCKHQDQZrmbk = 17967 |
| 162182 | CEFBS_None, // VPUNPCKHQDQZrmbkz = 17968 |
| 162183 | CEFBS_None, // VPUNPCKHQDQZrmk = 17969 |
| 162184 | CEFBS_None, // VPUNPCKHQDQZrmkz = 17970 |
| 162185 | CEFBS_None, // VPUNPCKHQDQZrr = 17971 |
| 162186 | CEFBS_None, // VPUNPCKHQDQZrrk = 17972 |
| 162187 | CEFBS_None, // VPUNPCKHQDQZrrkz = 17973 |
| 162188 | CEFBS_None, // VPUNPCKHQDQrm = 17974 |
| 162189 | CEFBS_None, // VPUNPCKHQDQrr = 17975 |
| 162190 | CEFBS_None, // VPUNPCKHWDYrm = 17976 |
| 162191 | CEFBS_None, // VPUNPCKHWDYrr = 17977 |
| 162192 | CEFBS_None, // VPUNPCKHWDZ128rm = 17978 |
| 162193 | CEFBS_None, // VPUNPCKHWDZ128rmk = 17979 |
| 162194 | CEFBS_None, // VPUNPCKHWDZ128rmkz = 17980 |
| 162195 | CEFBS_None, // VPUNPCKHWDZ128rr = 17981 |
| 162196 | CEFBS_None, // VPUNPCKHWDZ128rrk = 17982 |
| 162197 | CEFBS_None, // VPUNPCKHWDZ128rrkz = 17983 |
| 162198 | CEFBS_None, // VPUNPCKHWDZ256rm = 17984 |
| 162199 | CEFBS_None, // VPUNPCKHWDZ256rmk = 17985 |
| 162200 | CEFBS_None, // VPUNPCKHWDZ256rmkz = 17986 |
| 162201 | CEFBS_None, // VPUNPCKHWDZ256rr = 17987 |
| 162202 | CEFBS_None, // VPUNPCKHWDZ256rrk = 17988 |
| 162203 | CEFBS_None, // VPUNPCKHWDZ256rrkz = 17989 |
| 162204 | CEFBS_None, // VPUNPCKHWDZrm = 17990 |
| 162205 | CEFBS_None, // VPUNPCKHWDZrmk = 17991 |
| 162206 | CEFBS_None, // VPUNPCKHWDZrmkz = 17992 |
| 162207 | CEFBS_None, // VPUNPCKHWDZrr = 17993 |
| 162208 | CEFBS_None, // VPUNPCKHWDZrrk = 17994 |
| 162209 | CEFBS_None, // VPUNPCKHWDZrrkz = 17995 |
| 162210 | CEFBS_None, // VPUNPCKHWDrm = 17996 |
| 162211 | CEFBS_None, // VPUNPCKHWDrr = 17997 |
| 162212 | CEFBS_None, // VPUNPCKLBWYrm = 17998 |
| 162213 | CEFBS_None, // VPUNPCKLBWYrr = 17999 |
| 162214 | CEFBS_None, // VPUNPCKLBWZ128rm = 18000 |
| 162215 | CEFBS_None, // VPUNPCKLBWZ128rmk = 18001 |
| 162216 | CEFBS_None, // VPUNPCKLBWZ128rmkz = 18002 |
| 162217 | CEFBS_None, // VPUNPCKLBWZ128rr = 18003 |
| 162218 | CEFBS_None, // VPUNPCKLBWZ128rrk = 18004 |
| 162219 | CEFBS_None, // VPUNPCKLBWZ128rrkz = 18005 |
| 162220 | CEFBS_None, // VPUNPCKLBWZ256rm = 18006 |
| 162221 | CEFBS_None, // VPUNPCKLBWZ256rmk = 18007 |
| 162222 | CEFBS_None, // VPUNPCKLBWZ256rmkz = 18008 |
| 162223 | CEFBS_None, // VPUNPCKLBWZ256rr = 18009 |
| 162224 | CEFBS_None, // VPUNPCKLBWZ256rrk = 18010 |
| 162225 | CEFBS_None, // VPUNPCKLBWZ256rrkz = 18011 |
| 162226 | CEFBS_None, // VPUNPCKLBWZrm = 18012 |
| 162227 | CEFBS_None, // VPUNPCKLBWZrmk = 18013 |
| 162228 | CEFBS_None, // VPUNPCKLBWZrmkz = 18014 |
| 162229 | CEFBS_None, // VPUNPCKLBWZrr = 18015 |
| 162230 | CEFBS_None, // VPUNPCKLBWZrrk = 18016 |
| 162231 | CEFBS_None, // VPUNPCKLBWZrrkz = 18017 |
| 162232 | CEFBS_None, // VPUNPCKLBWrm = 18018 |
| 162233 | CEFBS_None, // VPUNPCKLBWrr = 18019 |
| 162234 | CEFBS_None, // VPUNPCKLDQYrm = 18020 |
| 162235 | CEFBS_None, // VPUNPCKLDQYrr = 18021 |
| 162236 | CEFBS_None, // VPUNPCKLDQZ128rm = 18022 |
| 162237 | CEFBS_None, // VPUNPCKLDQZ128rmb = 18023 |
| 162238 | CEFBS_None, // VPUNPCKLDQZ128rmbk = 18024 |
| 162239 | CEFBS_None, // VPUNPCKLDQZ128rmbkz = 18025 |
| 162240 | CEFBS_None, // VPUNPCKLDQZ128rmk = 18026 |
| 162241 | CEFBS_None, // VPUNPCKLDQZ128rmkz = 18027 |
| 162242 | CEFBS_None, // VPUNPCKLDQZ128rr = 18028 |
| 162243 | CEFBS_None, // VPUNPCKLDQZ128rrk = 18029 |
| 162244 | CEFBS_None, // VPUNPCKLDQZ128rrkz = 18030 |
| 162245 | CEFBS_None, // VPUNPCKLDQZ256rm = 18031 |
| 162246 | CEFBS_None, // VPUNPCKLDQZ256rmb = 18032 |
| 162247 | CEFBS_None, // VPUNPCKLDQZ256rmbk = 18033 |
| 162248 | CEFBS_None, // VPUNPCKLDQZ256rmbkz = 18034 |
| 162249 | CEFBS_None, // VPUNPCKLDQZ256rmk = 18035 |
| 162250 | CEFBS_None, // VPUNPCKLDQZ256rmkz = 18036 |
| 162251 | CEFBS_None, // VPUNPCKLDQZ256rr = 18037 |
| 162252 | CEFBS_None, // VPUNPCKLDQZ256rrk = 18038 |
| 162253 | CEFBS_None, // VPUNPCKLDQZ256rrkz = 18039 |
| 162254 | CEFBS_None, // VPUNPCKLDQZrm = 18040 |
| 162255 | CEFBS_None, // VPUNPCKLDQZrmb = 18041 |
| 162256 | CEFBS_None, // VPUNPCKLDQZrmbk = 18042 |
| 162257 | CEFBS_None, // VPUNPCKLDQZrmbkz = 18043 |
| 162258 | CEFBS_None, // VPUNPCKLDQZrmk = 18044 |
| 162259 | CEFBS_None, // VPUNPCKLDQZrmkz = 18045 |
| 162260 | CEFBS_None, // VPUNPCKLDQZrr = 18046 |
| 162261 | CEFBS_None, // VPUNPCKLDQZrrk = 18047 |
| 162262 | CEFBS_None, // VPUNPCKLDQZrrkz = 18048 |
| 162263 | CEFBS_None, // VPUNPCKLDQrm = 18049 |
| 162264 | CEFBS_None, // VPUNPCKLDQrr = 18050 |
| 162265 | CEFBS_None, // VPUNPCKLQDQYrm = 18051 |
| 162266 | CEFBS_None, // VPUNPCKLQDQYrr = 18052 |
| 162267 | CEFBS_None, // VPUNPCKLQDQZ128rm = 18053 |
| 162268 | CEFBS_None, // VPUNPCKLQDQZ128rmb = 18054 |
| 162269 | CEFBS_None, // VPUNPCKLQDQZ128rmbk = 18055 |
| 162270 | CEFBS_None, // VPUNPCKLQDQZ128rmbkz = 18056 |
| 162271 | CEFBS_None, // VPUNPCKLQDQZ128rmk = 18057 |
| 162272 | CEFBS_None, // VPUNPCKLQDQZ128rmkz = 18058 |
| 162273 | CEFBS_None, // VPUNPCKLQDQZ128rr = 18059 |
| 162274 | CEFBS_None, // VPUNPCKLQDQZ128rrk = 18060 |
| 162275 | CEFBS_None, // VPUNPCKLQDQZ128rrkz = 18061 |
| 162276 | CEFBS_None, // VPUNPCKLQDQZ256rm = 18062 |
| 162277 | CEFBS_None, // VPUNPCKLQDQZ256rmb = 18063 |
| 162278 | CEFBS_None, // VPUNPCKLQDQZ256rmbk = 18064 |
| 162279 | CEFBS_None, // VPUNPCKLQDQZ256rmbkz = 18065 |
| 162280 | CEFBS_None, // VPUNPCKLQDQZ256rmk = 18066 |
| 162281 | CEFBS_None, // VPUNPCKLQDQZ256rmkz = 18067 |
| 162282 | CEFBS_None, // VPUNPCKLQDQZ256rr = 18068 |
| 162283 | CEFBS_None, // VPUNPCKLQDQZ256rrk = 18069 |
| 162284 | CEFBS_None, // VPUNPCKLQDQZ256rrkz = 18070 |
| 162285 | CEFBS_None, // VPUNPCKLQDQZrm = 18071 |
| 162286 | CEFBS_None, // VPUNPCKLQDQZrmb = 18072 |
| 162287 | CEFBS_None, // VPUNPCKLQDQZrmbk = 18073 |
| 162288 | CEFBS_None, // VPUNPCKLQDQZrmbkz = 18074 |
| 162289 | CEFBS_None, // VPUNPCKLQDQZrmk = 18075 |
| 162290 | CEFBS_None, // VPUNPCKLQDQZrmkz = 18076 |
| 162291 | CEFBS_None, // VPUNPCKLQDQZrr = 18077 |
| 162292 | CEFBS_None, // VPUNPCKLQDQZrrk = 18078 |
| 162293 | CEFBS_None, // VPUNPCKLQDQZrrkz = 18079 |
| 162294 | CEFBS_None, // VPUNPCKLQDQrm = 18080 |
| 162295 | CEFBS_None, // VPUNPCKLQDQrr = 18081 |
| 162296 | CEFBS_None, // VPUNPCKLWDYrm = 18082 |
| 162297 | CEFBS_None, // VPUNPCKLWDYrr = 18083 |
| 162298 | CEFBS_None, // VPUNPCKLWDZ128rm = 18084 |
| 162299 | CEFBS_None, // VPUNPCKLWDZ128rmk = 18085 |
| 162300 | CEFBS_None, // VPUNPCKLWDZ128rmkz = 18086 |
| 162301 | CEFBS_None, // VPUNPCKLWDZ128rr = 18087 |
| 162302 | CEFBS_None, // VPUNPCKLWDZ128rrk = 18088 |
| 162303 | CEFBS_None, // VPUNPCKLWDZ128rrkz = 18089 |
| 162304 | CEFBS_None, // VPUNPCKLWDZ256rm = 18090 |
| 162305 | CEFBS_None, // VPUNPCKLWDZ256rmk = 18091 |
| 162306 | CEFBS_None, // VPUNPCKLWDZ256rmkz = 18092 |
| 162307 | CEFBS_None, // VPUNPCKLWDZ256rr = 18093 |
| 162308 | CEFBS_None, // VPUNPCKLWDZ256rrk = 18094 |
| 162309 | CEFBS_None, // VPUNPCKLWDZ256rrkz = 18095 |
| 162310 | CEFBS_None, // VPUNPCKLWDZrm = 18096 |
| 162311 | CEFBS_None, // VPUNPCKLWDZrmk = 18097 |
| 162312 | CEFBS_None, // VPUNPCKLWDZrmkz = 18098 |
| 162313 | CEFBS_None, // VPUNPCKLWDZrr = 18099 |
| 162314 | CEFBS_None, // VPUNPCKLWDZrrk = 18100 |
| 162315 | CEFBS_None, // VPUNPCKLWDZrrkz = 18101 |
| 162316 | CEFBS_None, // VPUNPCKLWDrm = 18102 |
| 162317 | CEFBS_None, // VPUNPCKLWDrr = 18103 |
| 162318 | CEFBS_None, // VPXORDZ128rm = 18104 |
| 162319 | CEFBS_None, // VPXORDZ128rmb = 18105 |
| 162320 | CEFBS_None, // VPXORDZ128rmbk = 18106 |
| 162321 | CEFBS_None, // VPXORDZ128rmbkz = 18107 |
| 162322 | CEFBS_None, // VPXORDZ128rmk = 18108 |
| 162323 | CEFBS_None, // VPXORDZ128rmkz = 18109 |
| 162324 | CEFBS_None, // VPXORDZ128rr = 18110 |
| 162325 | CEFBS_None, // VPXORDZ128rrk = 18111 |
| 162326 | CEFBS_None, // VPXORDZ128rrkz = 18112 |
| 162327 | CEFBS_None, // VPXORDZ256rm = 18113 |
| 162328 | CEFBS_None, // VPXORDZ256rmb = 18114 |
| 162329 | CEFBS_None, // VPXORDZ256rmbk = 18115 |
| 162330 | CEFBS_None, // VPXORDZ256rmbkz = 18116 |
| 162331 | CEFBS_None, // VPXORDZ256rmk = 18117 |
| 162332 | CEFBS_None, // VPXORDZ256rmkz = 18118 |
| 162333 | CEFBS_None, // VPXORDZ256rr = 18119 |
| 162334 | CEFBS_None, // VPXORDZ256rrk = 18120 |
| 162335 | CEFBS_None, // VPXORDZ256rrkz = 18121 |
| 162336 | CEFBS_None, // VPXORDZrm = 18122 |
| 162337 | CEFBS_None, // VPXORDZrmb = 18123 |
| 162338 | CEFBS_None, // VPXORDZrmbk = 18124 |
| 162339 | CEFBS_None, // VPXORDZrmbkz = 18125 |
| 162340 | CEFBS_None, // VPXORDZrmk = 18126 |
| 162341 | CEFBS_None, // VPXORDZrmkz = 18127 |
| 162342 | CEFBS_None, // VPXORDZrr = 18128 |
| 162343 | CEFBS_None, // VPXORDZrrk = 18129 |
| 162344 | CEFBS_None, // VPXORDZrrkz = 18130 |
| 162345 | CEFBS_None, // VPXORQZ128rm = 18131 |
| 162346 | CEFBS_None, // VPXORQZ128rmb = 18132 |
| 162347 | CEFBS_None, // VPXORQZ128rmbk = 18133 |
| 162348 | CEFBS_None, // VPXORQZ128rmbkz = 18134 |
| 162349 | CEFBS_None, // VPXORQZ128rmk = 18135 |
| 162350 | CEFBS_None, // VPXORQZ128rmkz = 18136 |
| 162351 | CEFBS_None, // VPXORQZ128rr = 18137 |
| 162352 | CEFBS_None, // VPXORQZ128rrk = 18138 |
| 162353 | CEFBS_None, // VPXORQZ128rrkz = 18139 |
| 162354 | CEFBS_None, // VPXORQZ256rm = 18140 |
| 162355 | CEFBS_None, // VPXORQZ256rmb = 18141 |
| 162356 | CEFBS_None, // VPXORQZ256rmbk = 18142 |
| 162357 | CEFBS_None, // VPXORQZ256rmbkz = 18143 |
| 162358 | CEFBS_None, // VPXORQZ256rmk = 18144 |
| 162359 | CEFBS_None, // VPXORQZ256rmkz = 18145 |
| 162360 | CEFBS_None, // VPXORQZ256rr = 18146 |
| 162361 | CEFBS_None, // VPXORQZ256rrk = 18147 |
| 162362 | CEFBS_None, // VPXORQZ256rrkz = 18148 |
| 162363 | CEFBS_None, // VPXORQZrm = 18149 |
| 162364 | CEFBS_None, // VPXORQZrmb = 18150 |
| 162365 | CEFBS_None, // VPXORQZrmbk = 18151 |
| 162366 | CEFBS_None, // VPXORQZrmbkz = 18152 |
| 162367 | CEFBS_None, // VPXORQZrmk = 18153 |
| 162368 | CEFBS_None, // VPXORQZrmkz = 18154 |
| 162369 | CEFBS_None, // VPXORQZrr = 18155 |
| 162370 | CEFBS_None, // VPXORQZrrk = 18156 |
| 162371 | CEFBS_None, // VPXORQZrrkz = 18157 |
| 162372 | CEFBS_None, // VPXORYrm = 18158 |
| 162373 | CEFBS_None, // VPXORYrr = 18159 |
| 162374 | CEFBS_None, // VPXORrm = 18160 |
| 162375 | CEFBS_None, // VPXORrr = 18161 |
| 162376 | CEFBS_None, // VRANGEPDZ128rmbi = 18162 |
| 162377 | CEFBS_None, // VRANGEPDZ128rmbik = 18163 |
| 162378 | CEFBS_None, // VRANGEPDZ128rmbikz = 18164 |
| 162379 | CEFBS_None, // VRANGEPDZ128rmi = 18165 |
| 162380 | CEFBS_None, // VRANGEPDZ128rmik = 18166 |
| 162381 | CEFBS_None, // VRANGEPDZ128rmikz = 18167 |
| 162382 | CEFBS_None, // VRANGEPDZ128rri = 18168 |
| 162383 | CEFBS_None, // VRANGEPDZ128rrik = 18169 |
| 162384 | CEFBS_None, // VRANGEPDZ128rrikz = 18170 |
| 162385 | CEFBS_None, // VRANGEPDZ256rmbi = 18171 |
| 162386 | CEFBS_None, // VRANGEPDZ256rmbik = 18172 |
| 162387 | CEFBS_None, // VRANGEPDZ256rmbikz = 18173 |
| 162388 | CEFBS_None, // VRANGEPDZ256rmi = 18174 |
| 162389 | CEFBS_None, // VRANGEPDZ256rmik = 18175 |
| 162390 | CEFBS_None, // VRANGEPDZ256rmikz = 18176 |
| 162391 | CEFBS_None, // VRANGEPDZ256rri = 18177 |
| 162392 | CEFBS_None, // VRANGEPDZ256rrik = 18178 |
| 162393 | CEFBS_None, // VRANGEPDZ256rrikz = 18179 |
| 162394 | CEFBS_None, // VRANGEPDZrmbi = 18180 |
| 162395 | CEFBS_None, // VRANGEPDZrmbik = 18181 |
| 162396 | CEFBS_None, // VRANGEPDZrmbikz = 18182 |
| 162397 | CEFBS_None, // VRANGEPDZrmi = 18183 |
| 162398 | CEFBS_None, // VRANGEPDZrmik = 18184 |
| 162399 | CEFBS_None, // VRANGEPDZrmikz = 18185 |
| 162400 | CEFBS_None, // VRANGEPDZrri = 18186 |
| 162401 | CEFBS_None, // VRANGEPDZrrib = 18187 |
| 162402 | CEFBS_None, // VRANGEPDZrribk = 18188 |
| 162403 | CEFBS_None, // VRANGEPDZrribkz = 18189 |
| 162404 | CEFBS_None, // VRANGEPDZrrik = 18190 |
| 162405 | CEFBS_None, // VRANGEPDZrrikz = 18191 |
| 162406 | CEFBS_None, // VRANGEPSZ128rmbi = 18192 |
| 162407 | CEFBS_None, // VRANGEPSZ128rmbik = 18193 |
| 162408 | CEFBS_None, // VRANGEPSZ128rmbikz = 18194 |
| 162409 | CEFBS_None, // VRANGEPSZ128rmi = 18195 |
| 162410 | CEFBS_None, // VRANGEPSZ128rmik = 18196 |
| 162411 | CEFBS_None, // VRANGEPSZ128rmikz = 18197 |
| 162412 | CEFBS_None, // VRANGEPSZ128rri = 18198 |
| 162413 | CEFBS_None, // VRANGEPSZ128rrik = 18199 |
| 162414 | CEFBS_None, // VRANGEPSZ128rrikz = 18200 |
| 162415 | CEFBS_None, // VRANGEPSZ256rmbi = 18201 |
| 162416 | CEFBS_None, // VRANGEPSZ256rmbik = 18202 |
| 162417 | CEFBS_None, // VRANGEPSZ256rmbikz = 18203 |
| 162418 | CEFBS_None, // VRANGEPSZ256rmi = 18204 |
| 162419 | CEFBS_None, // VRANGEPSZ256rmik = 18205 |
| 162420 | CEFBS_None, // VRANGEPSZ256rmikz = 18206 |
| 162421 | CEFBS_None, // VRANGEPSZ256rri = 18207 |
| 162422 | CEFBS_None, // VRANGEPSZ256rrik = 18208 |
| 162423 | CEFBS_None, // VRANGEPSZ256rrikz = 18209 |
| 162424 | CEFBS_None, // VRANGEPSZrmbi = 18210 |
| 162425 | CEFBS_None, // VRANGEPSZrmbik = 18211 |
| 162426 | CEFBS_None, // VRANGEPSZrmbikz = 18212 |
| 162427 | CEFBS_None, // VRANGEPSZrmi = 18213 |
| 162428 | CEFBS_None, // VRANGEPSZrmik = 18214 |
| 162429 | CEFBS_None, // VRANGEPSZrmikz = 18215 |
| 162430 | CEFBS_None, // VRANGEPSZrri = 18216 |
| 162431 | CEFBS_None, // VRANGEPSZrrib = 18217 |
| 162432 | CEFBS_None, // VRANGEPSZrribk = 18218 |
| 162433 | CEFBS_None, // VRANGEPSZrribkz = 18219 |
| 162434 | CEFBS_None, // VRANGEPSZrrik = 18220 |
| 162435 | CEFBS_None, // VRANGEPSZrrikz = 18221 |
| 162436 | CEFBS_None, // VRANGESDZrmi = 18222 |
| 162437 | CEFBS_None, // VRANGESDZrmik = 18223 |
| 162438 | CEFBS_None, // VRANGESDZrmikz = 18224 |
| 162439 | CEFBS_None, // VRANGESDZrri = 18225 |
| 162440 | CEFBS_None, // VRANGESDZrrib = 18226 |
| 162441 | CEFBS_None, // VRANGESDZrribk = 18227 |
| 162442 | CEFBS_None, // VRANGESDZrribkz = 18228 |
| 162443 | CEFBS_None, // VRANGESDZrrik = 18229 |
| 162444 | CEFBS_None, // VRANGESDZrrikz = 18230 |
| 162445 | CEFBS_None, // VRANGESSZrmi = 18231 |
| 162446 | CEFBS_None, // VRANGESSZrmik = 18232 |
| 162447 | CEFBS_None, // VRANGESSZrmikz = 18233 |
| 162448 | CEFBS_None, // VRANGESSZrri = 18234 |
| 162449 | CEFBS_None, // VRANGESSZrrib = 18235 |
| 162450 | CEFBS_None, // VRANGESSZrribk = 18236 |
| 162451 | CEFBS_None, // VRANGESSZrribkz = 18237 |
| 162452 | CEFBS_None, // VRANGESSZrrik = 18238 |
| 162453 | CEFBS_None, // VRANGESSZrrikz = 18239 |
| 162454 | CEFBS_None, // VRCP14PDZ128m = 18240 |
| 162455 | CEFBS_None, // VRCP14PDZ128mb = 18241 |
| 162456 | CEFBS_None, // VRCP14PDZ128mbk = 18242 |
| 162457 | CEFBS_None, // VRCP14PDZ128mbkz = 18243 |
| 162458 | CEFBS_None, // VRCP14PDZ128mk = 18244 |
| 162459 | CEFBS_None, // VRCP14PDZ128mkz = 18245 |
| 162460 | CEFBS_None, // VRCP14PDZ128r = 18246 |
| 162461 | CEFBS_None, // VRCP14PDZ128rk = 18247 |
| 162462 | CEFBS_None, // VRCP14PDZ128rkz = 18248 |
| 162463 | CEFBS_None, // VRCP14PDZ256m = 18249 |
| 162464 | CEFBS_None, // VRCP14PDZ256mb = 18250 |
| 162465 | CEFBS_None, // VRCP14PDZ256mbk = 18251 |
| 162466 | CEFBS_None, // VRCP14PDZ256mbkz = 18252 |
| 162467 | CEFBS_None, // VRCP14PDZ256mk = 18253 |
| 162468 | CEFBS_None, // VRCP14PDZ256mkz = 18254 |
| 162469 | CEFBS_None, // VRCP14PDZ256r = 18255 |
| 162470 | CEFBS_None, // VRCP14PDZ256rk = 18256 |
| 162471 | CEFBS_None, // VRCP14PDZ256rkz = 18257 |
| 162472 | CEFBS_None, // VRCP14PDZm = 18258 |
| 162473 | CEFBS_None, // VRCP14PDZmb = 18259 |
| 162474 | CEFBS_None, // VRCP14PDZmbk = 18260 |
| 162475 | CEFBS_None, // VRCP14PDZmbkz = 18261 |
| 162476 | CEFBS_None, // VRCP14PDZmk = 18262 |
| 162477 | CEFBS_None, // VRCP14PDZmkz = 18263 |
| 162478 | CEFBS_None, // VRCP14PDZr = 18264 |
| 162479 | CEFBS_None, // VRCP14PDZrk = 18265 |
| 162480 | CEFBS_None, // VRCP14PDZrkz = 18266 |
| 162481 | CEFBS_None, // VRCP14PSZ128m = 18267 |
| 162482 | CEFBS_None, // VRCP14PSZ128mb = 18268 |
| 162483 | CEFBS_None, // VRCP14PSZ128mbk = 18269 |
| 162484 | CEFBS_None, // VRCP14PSZ128mbkz = 18270 |
| 162485 | CEFBS_None, // VRCP14PSZ128mk = 18271 |
| 162486 | CEFBS_None, // VRCP14PSZ128mkz = 18272 |
| 162487 | CEFBS_None, // VRCP14PSZ128r = 18273 |
| 162488 | CEFBS_None, // VRCP14PSZ128rk = 18274 |
| 162489 | CEFBS_None, // VRCP14PSZ128rkz = 18275 |
| 162490 | CEFBS_None, // VRCP14PSZ256m = 18276 |
| 162491 | CEFBS_None, // VRCP14PSZ256mb = 18277 |
| 162492 | CEFBS_None, // VRCP14PSZ256mbk = 18278 |
| 162493 | CEFBS_None, // VRCP14PSZ256mbkz = 18279 |
| 162494 | CEFBS_None, // VRCP14PSZ256mk = 18280 |
| 162495 | CEFBS_None, // VRCP14PSZ256mkz = 18281 |
| 162496 | CEFBS_None, // VRCP14PSZ256r = 18282 |
| 162497 | CEFBS_None, // VRCP14PSZ256rk = 18283 |
| 162498 | CEFBS_None, // VRCP14PSZ256rkz = 18284 |
| 162499 | CEFBS_None, // VRCP14PSZm = 18285 |
| 162500 | CEFBS_None, // VRCP14PSZmb = 18286 |
| 162501 | CEFBS_None, // VRCP14PSZmbk = 18287 |
| 162502 | CEFBS_None, // VRCP14PSZmbkz = 18288 |
| 162503 | CEFBS_None, // VRCP14PSZmk = 18289 |
| 162504 | CEFBS_None, // VRCP14PSZmkz = 18290 |
| 162505 | CEFBS_None, // VRCP14PSZr = 18291 |
| 162506 | CEFBS_None, // VRCP14PSZrk = 18292 |
| 162507 | CEFBS_None, // VRCP14PSZrkz = 18293 |
| 162508 | CEFBS_None, // VRCP14SDZrm = 18294 |
| 162509 | CEFBS_None, // VRCP14SDZrmk = 18295 |
| 162510 | CEFBS_None, // VRCP14SDZrmkz = 18296 |
| 162511 | CEFBS_None, // VRCP14SDZrr = 18297 |
| 162512 | CEFBS_None, // VRCP14SDZrrk = 18298 |
| 162513 | CEFBS_None, // VRCP14SDZrrkz = 18299 |
| 162514 | CEFBS_None, // VRCP14SSZrm = 18300 |
| 162515 | CEFBS_None, // VRCP14SSZrmk = 18301 |
| 162516 | CEFBS_None, // VRCP14SSZrmkz = 18302 |
| 162517 | CEFBS_None, // VRCP14SSZrr = 18303 |
| 162518 | CEFBS_None, // VRCP14SSZrrk = 18304 |
| 162519 | CEFBS_None, // VRCP14SSZrrkz = 18305 |
| 162520 | CEFBS_None, // VRCP28PDZm = 18306 |
| 162521 | CEFBS_None, // VRCP28PDZmb = 18307 |
| 162522 | CEFBS_None, // VRCP28PDZmbk = 18308 |
| 162523 | CEFBS_None, // VRCP28PDZmbkz = 18309 |
| 162524 | CEFBS_None, // VRCP28PDZmk = 18310 |
| 162525 | CEFBS_None, // VRCP28PDZmkz = 18311 |
| 162526 | CEFBS_None, // VRCP28PDZr = 18312 |
| 162527 | CEFBS_None, // VRCP28PDZrb = 18313 |
| 162528 | CEFBS_None, // VRCP28PDZrbk = 18314 |
| 162529 | CEFBS_None, // VRCP28PDZrbkz = 18315 |
| 162530 | CEFBS_None, // VRCP28PDZrk = 18316 |
| 162531 | CEFBS_None, // VRCP28PDZrkz = 18317 |
| 162532 | CEFBS_None, // VRCP28PSZm = 18318 |
| 162533 | CEFBS_None, // VRCP28PSZmb = 18319 |
| 162534 | CEFBS_None, // VRCP28PSZmbk = 18320 |
| 162535 | CEFBS_None, // VRCP28PSZmbkz = 18321 |
| 162536 | CEFBS_None, // VRCP28PSZmk = 18322 |
| 162537 | CEFBS_None, // VRCP28PSZmkz = 18323 |
| 162538 | CEFBS_None, // VRCP28PSZr = 18324 |
| 162539 | CEFBS_None, // VRCP28PSZrb = 18325 |
| 162540 | CEFBS_None, // VRCP28PSZrbk = 18326 |
| 162541 | CEFBS_None, // VRCP28PSZrbkz = 18327 |
| 162542 | CEFBS_None, // VRCP28PSZrk = 18328 |
| 162543 | CEFBS_None, // VRCP28PSZrkz = 18329 |
| 162544 | CEFBS_None, // VRCP28SDZm = 18330 |
| 162545 | CEFBS_None, // VRCP28SDZmk = 18331 |
| 162546 | CEFBS_None, // VRCP28SDZmkz = 18332 |
| 162547 | CEFBS_None, // VRCP28SDZr = 18333 |
| 162548 | CEFBS_None, // VRCP28SDZrb = 18334 |
| 162549 | CEFBS_None, // VRCP28SDZrbk = 18335 |
| 162550 | CEFBS_None, // VRCP28SDZrbkz = 18336 |
| 162551 | CEFBS_None, // VRCP28SDZrk = 18337 |
| 162552 | CEFBS_None, // VRCP28SDZrkz = 18338 |
| 162553 | CEFBS_None, // VRCP28SSZm = 18339 |
| 162554 | CEFBS_None, // VRCP28SSZmk = 18340 |
| 162555 | CEFBS_None, // VRCP28SSZmkz = 18341 |
| 162556 | CEFBS_None, // VRCP28SSZr = 18342 |
| 162557 | CEFBS_None, // VRCP28SSZrb = 18343 |
| 162558 | CEFBS_None, // VRCP28SSZrbk = 18344 |
| 162559 | CEFBS_None, // VRCP28SSZrbkz = 18345 |
| 162560 | CEFBS_None, // VRCP28SSZrk = 18346 |
| 162561 | CEFBS_None, // VRCP28SSZrkz = 18347 |
| 162562 | CEFBS_None, // VRCPPHZ128m = 18348 |
| 162563 | CEFBS_None, // VRCPPHZ128mb = 18349 |
| 162564 | CEFBS_None, // VRCPPHZ128mbk = 18350 |
| 162565 | CEFBS_None, // VRCPPHZ128mbkz = 18351 |
| 162566 | CEFBS_None, // VRCPPHZ128mk = 18352 |
| 162567 | CEFBS_None, // VRCPPHZ128mkz = 18353 |
| 162568 | CEFBS_None, // VRCPPHZ128r = 18354 |
| 162569 | CEFBS_None, // VRCPPHZ128rk = 18355 |
| 162570 | CEFBS_None, // VRCPPHZ128rkz = 18356 |
| 162571 | CEFBS_None, // VRCPPHZ256m = 18357 |
| 162572 | CEFBS_None, // VRCPPHZ256mb = 18358 |
| 162573 | CEFBS_None, // VRCPPHZ256mbk = 18359 |
| 162574 | CEFBS_None, // VRCPPHZ256mbkz = 18360 |
| 162575 | CEFBS_None, // VRCPPHZ256mk = 18361 |
| 162576 | CEFBS_None, // VRCPPHZ256mkz = 18362 |
| 162577 | CEFBS_None, // VRCPPHZ256r = 18363 |
| 162578 | CEFBS_None, // VRCPPHZ256rk = 18364 |
| 162579 | CEFBS_None, // VRCPPHZ256rkz = 18365 |
| 162580 | CEFBS_None, // VRCPPHZm = 18366 |
| 162581 | CEFBS_None, // VRCPPHZmb = 18367 |
| 162582 | CEFBS_None, // VRCPPHZmbk = 18368 |
| 162583 | CEFBS_None, // VRCPPHZmbkz = 18369 |
| 162584 | CEFBS_None, // VRCPPHZmk = 18370 |
| 162585 | CEFBS_None, // VRCPPHZmkz = 18371 |
| 162586 | CEFBS_None, // VRCPPHZr = 18372 |
| 162587 | CEFBS_None, // VRCPPHZrk = 18373 |
| 162588 | CEFBS_None, // VRCPPHZrkz = 18374 |
| 162589 | CEFBS_None, // VRCPPSYm = 18375 |
| 162590 | CEFBS_None, // VRCPPSYr = 18376 |
| 162591 | CEFBS_None, // VRCPPSm = 18377 |
| 162592 | CEFBS_None, // VRCPPSr = 18378 |
| 162593 | CEFBS_None, // VRCPSHZrm = 18379 |
| 162594 | CEFBS_None, // VRCPSHZrmk = 18380 |
| 162595 | CEFBS_None, // VRCPSHZrmkz = 18381 |
| 162596 | CEFBS_None, // VRCPSHZrr = 18382 |
| 162597 | CEFBS_None, // VRCPSHZrrk = 18383 |
| 162598 | CEFBS_None, // VRCPSHZrrkz = 18384 |
| 162599 | CEFBS_None, // VRCPSSm = 18385 |
| 162600 | CEFBS_None, // VRCPSSm_Int = 18386 |
| 162601 | CEFBS_None, // VRCPSSr = 18387 |
| 162602 | CEFBS_None, // VRCPSSr_Int = 18388 |
| 162603 | CEFBS_None, // VREDUCEPDZ128rmbi = 18389 |
| 162604 | CEFBS_None, // VREDUCEPDZ128rmbik = 18390 |
| 162605 | CEFBS_None, // VREDUCEPDZ128rmbikz = 18391 |
| 162606 | CEFBS_None, // VREDUCEPDZ128rmi = 18392 |
| 162607 | CEFBS_None, // VREDUCEPDZ128rmik = 18393 |
| 162608 | CEFBS_None, // VREDUCEPDZ128rmikz = 18394 |
| 162609 | CEFBS_None, // VREDUCEPDZ128rri = 18395 |
| 162610 | CEFBS_None, // VREDUCEPDZ128rrik = 18396 |
| 162611 | CEFBS_None, // VREDUCEPDZ128rrikz = 18397 |
| 162612 | CEFBS_None, // VREDUCEPDZ256rmbi = 18398 |
| 162613 | CEFBS_None, // VREDUCEPDZ256rmbik = 18399 |
| 162614 | CEFBS_None, // VREDUCEPDZ256rmbikz = 18400 |
| 162615 | CEFBS_None, // VREDUCEPDZ256rmi = 18401 |
| 162616 | CEFBS_None, // VREDUCEPDZ256rmik = 18402 |
| 162617 | CEFBS_None, // VREDUCEPDZ256rmikz = 18403 |
| 162618 | CEFBS_None, // VREDUCEPDZ256rri = 18404 |
| 162619 | CEFBS_None, // VREDUCEPDZ256rrik = 18405 |
| 162620 | CEFBS_None, // VREDUCEPDZ256rrikz = 18406 |
| 162621 | CEFBS_None, // VREDUCEPDZrmbi = 18407 |
| 162622 | CEFBS_None, // VREDUCEPDZrmbik = 18408 |
| 162623 | CEFBS_None, // VREDUCEPDZrmbikz = 18409 |
| 162624 | CEFBS_None, // VREDUCEPDZrmi = 18410 |
| 162625 | CEFBS_None, // VREDUCEPDZrmik = 18411 |
| 162626 | CEFBS_None, // VREDUCEPDZrmikz = 18412 |
| 162627 | CEFBS_None, // VREDUCEPDZrri = 18413 |
| 162628 | CEFBS_None, // VREDUCEPDZrrib = 18414 |
| 162629 | CEFBS_None, // VREDUCEPDZrribk = 18415 |
| 162630 | CEFBS_None, // VREDUCEPDZrribkz = 18416 |
| 162631 | CEFBS_None, // VREDUCEPDZrrik = 18417 |
| 162632 | CEFBS_None, // VREDUCEPDZrrikz = 18418 |
| 162633 | CEFBS_None, // VREDUCEPHZ128rmbi = 18419 |
| 162634 | CEFBS_None, // VREDUCEPHZ128rmbik = 18420 |
| 162635 | CEFBS_None, // VREDUCEPHZ128rmbikz = 18421 |
| 162636 | CEFBS_None, // VREDUCEPHZ128rmi = 18422 |
| 162637 | CEFBS_None, // VREDUCEPHZ128rmik = 18423 |
| 162638 | CEFBS_None, // VREDUCEPHZ128rmikz = 18424 |
| 162639 | CEFBS_None, // VREDUCEPHZ128rri = 18425 |
| 162640 | CEFBS_None, // VREDUCEPHZ128rrik = 18426 |
| 162641 | CEFBS_None, // VREDUCEPHZ128rrikz = 18427 |
| 162642 | CEFBS_None, // VREDUCEPHZ256rmbi = 18428 |
| 162643 | CEFBS_None, // VREDUCEPHZ256rmbik = 18429 |
| 162644 | CEFBS_None, // VREDUCEPHZ256rmbikz = 18430 |
| 162645 | CEFBS_None, // VREDUCEPHZ256rmi = 18431 |
| 162646 | CEFBS_None, // VREDUCEPHZ256rmik = 18432 |
| 162647 | CEFBS_None, // VREDUCEPHZ256rmikz = 18433 |
| 162648 | CEFBS_None, // VREDUCEPHZ256rri = 18434 |
| 162649 | CEFBS_None, // VREDUCEPHZ256rrik = 18435 |
| 162650 | CEFBS_None, // VREDUCEPHZ256rrikz = 18436 |
| 162651 | CEFBS_None, // VREDUCEPHZrmbi = 18437 |
| 162652 | CEFBS_None, // VREDUCEPHZrmbik = 18438 |
| 162653 | CEFBS_None, // VREDUCEPHZrmbikz = 18439 |
| 162654 | CEFBS_None, // VREDUCEPHZrmi = 18440 |
| 162655 | CEFBS_None, // VREDUCEPHZrmik = 18441 |
| 162656 | CEFBS_None, // VREDUCEPHZrmikz = 18442 |
| 162657 | CEFBS_None, // VREDUCEPHZrri = 18443 |
| 162658 | CEFBS_None, // VREDUCEPHZrrib = 18444 |
| 162659 | CEFBS_None, // VREDUCEPHZrribk = 18445 |
| 162660 | CEFBS_None, // VREDUCEPHZrribkz = 18446 |
| 162661 | CEFBS_None, // VREDUCEPHZrrik = 18447 |
| 162662 | CEFBS_None, // VREDUCEPHZrrikz = 18448 |
| 162663 | CEFBS_None, // VREDUCEPSZ128rmbi = 18449 |
| 162664 | CEFBS_None, // VREDUCEPSZ128rmbik = 18450 |
| 162665 | CEFBS_None, // VREDUCEPSZ128rmbikz = 18451 |
| 162666 | CEFBS_None, // VREDUCEPSZ128rmi = 18452 |
| 162667 | CEFBS_None, // VREDUCEPSZ128rmik = 18453 |
| 162668 | CEFBS_None, // VREDUCEPSZ128rmikz = 18454 |
| 162669 | CEFBS_None, // VREDUCEPSZ128rri = 18455 |
| 162670 | CEFBS_None, // VREDUCEPSZ128rrik = 18456 |
| 162671 | CEFBS_None, // VREDUCEPSZ128rrikz = 18457 |
| 162672 | CEFBS_None, // VREDUCEPSZ256rmbi = 18458 |
| 162673 | CEFBS_None, // VREDUCEPSZ256rmbik = 18459 |
| 162674 | CEFBS_None, // VREDUCEPSZ256rmbikz = 18460 |
| 162675 | CEFBS_None, // VREDUCEPSZ256rmi = 18461 |
| 162676 | CEFBS_None, // VREDUCEPSZ256rmik = 18462 |
| 162677 | CEFBS_None, // VREDUCEPSZ256rmikz = 18463 |
| 162678 | CEFBS_None, // VREDUCEPSZ256rri = 18464 |
| 162679 | CEFBS_None, // VREDUCEPSZ256rrik = 18465 |
| 162680 | CEFBS_None, // VREDUCEPSZ256rrikz = 18466 |
| 162681 | CEFBS_None, // VREDUCEPSZrmbi = 18467 |
| 162682 | CEFBS_None, // VREDUCEPSZrmbik = 18468 |
| 162683 | CEFBS_None, // VREDUCEPSZrmbikz = 18469 |
| 162684 | CEFBS_None, // VREDUCEPSZrmi = 18470 |
| 162685 | CEFBS_None, // VREDUCEPSZrmik = 18471 |
| 162686 | CEFBS_None, // VREDUCEPSZrmikz = 18472 |
| 162687 | CEFBS_None, // VREDUCEPSZrri = 18473 |
| 162688 | CEFBS_None, // VREDUCEPSZrrib = 18474 |
| 162689 | CEFBS_None, // VREDUCEPSZrribk = 18475 |
| 162690 | CEFBS_None, // VREDUCEPSZrribkz = 18476 |
| 162691 | CEFBS_None, // VREDUCEPSZrrik = 18477 |
| 162692 | CEFBS_None, // VREDUCEPSZrrikz = 18478 |
| 162693 | CEFBS_None, // VREDUCESDZrmi = 18479 |
| 162694 | CEFBS_None, // VREDUCESDZrmik = 18480 |
| 162695 | CEFBS_None, // VREDUCESDZrmikz = 18481 |
| 162696 | CEFBS_None, // VREDUCESDZrri = 18482 |
| 162697 | CEFBS_None, // VREDUCESDZrrib = 18483 |
| 162698 | CEFBS_None, // VREDUCESDZrribk = 18484 |
| 162699 | CEFBS_None, // VREDUCESDZrribkz = 18485 |
| 162700 | CEFBS_None, // VREDUCESDZrrik = 18486 |
| 162701 | CEFBS_None, // VREDUCESDZrrikz = 18487 |
| 162702 | CEFBS_None, // VREDUCESHZrmi = 18488 |
| 162703 | CEFBS_None, // VREDUCESHZrmik = 18489 |
| 162704 | CEFBS_None, // VREDUCESHZrmikz = 18490 |
| 162705 | CEFBS_None, // VREDUCESHZrri = 18491 |
| 162706 | CEFBS_None, // VREDUCESHZrrib = 18492 |
| 162707 | CEFBS_None, // VREDUCESHZrribk = 18493 |
| 162708 | CEFBS_None, // VREDUCESHZrribkz = 18494 |
| 162709 | CEFBS_None, // VREDUCESHZrrik = 18495 |
| 162710 | CEFBS_None, // VREDUCESHZrrikz = 18496 |
| 162711 | CEFBS_None, // VREDUCESSZrmi = 18497 |
| 162712 | CEFBS_None, // VREDUCESSZrmik = 18498 |
| 162713 | CEFBS_None, // VREDUCESSZrmikz = 18499 |
| 162714 | CEFBS_None, // VREDUCESSZrri = 18500 |
| 162715 | CEFBS_None, // VREDUCESSZrrib = 18501 |
| 162716 | CEFBS_None, // VREDUCESSZrribk = 18502 |
| 162717 | CEFBS_None, // VREDUCESSZrribkz = 18503 |
| 162718 | CEFBS_None, // VREDUCESSZrrik = 18504 |
| 162719 | CEFBS_None, // VREDUCESSZrrikz = 18505 |
| 162720 | CEFBS_None, // VRNDSCALEPDZ128rmbi = 18506 |
| 162721 | CEFBS_None, // VRNDSCALEPDZ128rmbik = 18507 |
| 162722 | CEFBS_None, // VRNDSCALEPDZ128rmbikz = 18508 |
| 162723 | CEFBS_None, // VRNDSCALEPDZ128rmi = 18509 |
| 162724 | CEFBS_None, // VRNDSCALEPDZ128rmik = 18510 |
| 162725 | CEFBS_None, // VRNDSCALEPDZ128rmikz = 18511 |
| 162726 | CEFBS_None, // VRNDSCALEPDZ128rri = 18512 |
| 162727 | CEFBS_None, // VRNDSCALEPDZ128rrik = 18513 |
| 162728 | CEFBS_None, // VRNDSCALEPDZ128rrikz = 18514 |
| 162729 | CEFBS_None, // VRNDSCALEPDZ256rmbi = 18515 |
| 162730 | CEFBS_None, // VRNDSCALEPDZ256rmbik = 18516 |
| 162731 | CEFBS_None, // VRNDSCALEPDZ256rmbikz = 18517 |
| 162732 | CEFBS_None, // VRNDSCALEPDZ256rmi = 18518 |
| 162733 | CEFBS_None, // VRNDSCALEPDZ256rmik = 18519 |
| 162734 | CEFBS_None, // VRNDSCALEPDZ256rmikz = 18520 |
| 162735 | CEFBS_None, // VRNDSCALEPDZ256rri = 18521 |
| 162736 | CEFBS_None, // VRNDSCALEPDZ256rrik = 18522 |
| 162737 | CEFBS_None, // VRNDSCALEPDZ256rrikz = 18523 |
| 162738 | CEFBS_None, // VRNDSCALEPDZrmbi = 18524 |
| 162739 | CEFBS_None, // VRNDSCALEPDZrmbik = 18525 |
| 162740 | CEFBS_None, // VRNDSCALEPDZrmbikz = 18526 |
| 162741 | CEFBS_None, // VRNDSCALEPDZrmi = 18527 |
| 162742 | CEFBS_None, // VRNDSCALEPDZrmik = 18528 |
| 162743 | CEFBS_None, // VRNDSCALEPDZrmikz = 18529 |
| 162744 | CEFBS_None, // VRNDSCALEPDZrri = 18530 |
| 162745 | CEFBS_None, // VRNDSCALEPDZrrib = 18531 |
| 162746 | CEFBS_None, // VRNDSCALEPDZrribk = 18532 |
| 162747 | CEFBS_None, // VRNDSCALEPDZrribkz = 18533 |
| 162748 | CEFBS_None, // VRNDSCALEPDZrrik = 18534 |
| 162749 | CEFBS_None, // VRNDSCALEPDZrrikz = 18535 |
| 162750 | CEFBS_None, // VRNDSCALEPHZ128rmbi = 18536 |
| 162751 | CEFBS_None, // VRNDSCALEPHZ128rmbik = 18537 |
| 162752 | CEFBS_None, // VRNDSCALEPHZ128rmbikz = 18538 |
| 162753 | CEFBS_None, // VRNDSCALEPHZ128rmi = 18539 |
| 162754 | CEFBS_None, // VRNDSCALEPHZ128rmik = 18540 |
| 162755 | CEFBS_None, // VRNDSCALEPHZ128rmikz = 18541 |
| 162756 | CEFBS_None, // VRNDSCALEPHZ128rri = 18542 |
| 162757 | CEFBS_None, // VRNDSCALEPHZ128rrik = 18543 |
| 162758 | CEFBS_None, // VRNDSCALEPHZ128rrikz = 18544 |
| 162759 | CEFBS_None, // VRNDSCALEPHZ256rmbi = 18545 |
| 162760 | CEFBS_None, // VRNDSCALEPHZ256rmbik = 18546 |
| 162761 | CEFBS_None, // VRNDSCALEPHZ256rmbikz = 18547 |
| 162762 | CEFBS_None, // VRNDSCALEPHZ256rmi = 18548 |
| 162763 | CEFBS_None, // VRNDSCALEPHZ256rmik = 18549 |
| 162764 | CEFBS_None, // VRNDSCALEPHZ256rmikz = 18550 |
| 162765 | CEFBS_None, // VRNDSCALEPHZ256rri = 18551 |
| 162766 | CEFBS_None, // VRNDSCALEPHZ256rrik = 18552 |
| 162767 | CEFBS_None, // VRNDSCALEPHZ256rrikz = 18553 |
| 162768 | CEFBS_None, // VRNDSCALEPHZrmbi = 18554 |
| 162769 | CEFBS_None, // VRNDSCALEPHZrmbik = 18555 |
| 162770 | CEFBS_None, // VRNDSCALEPHZrmbikz = 18556 |
| 162771 | CEFBS_None, // VRNDSCALEPHZrmi = 18557 |
| 162772 | CEFBS_None, // VRNDSCALEPHZrmik = 18558 |
| 162773 | CEFBS_None, // VRNDSCALEPHZrmikz = 18559 |
| 162774 | CEFBS_None, // VRNDSCALEPHZrri = 18560 |
| 162775 | CEFBS_None, // VRNDSCALEPHZrrib = 18561 |
| 162776 | CEFBS_None, // VRNDSCALEPHZrribk = 18562 |
| 162777 | CEFBS_None, // VRNDSCALEPHZrribkz = 18563 |
| 162778 | CEFBS_None, // VRNDSCALEPHZrrik = 18564 |
| 162779 | CEFBS_None, // VRNDSCALEPHZrrikz = 18565 |
| 162780 | CEFBS_None, // VRNDSCALEPSZ128rmbi = 18566 |
| 162781 | CEFBS_None, // VRNDSCALEPSZ128rmbik = 18567 |
| 162782 | CEFBS_None, // VRNDSCALEPSZ128rmbikz = 18568 |
| 162783 | CEFBS_None, // VRNDSCALEPSZ128rmi = 18569 |
| 162784 | CEFBS_None, // VRNDSCALEPSZ128rmik = 18570 |
| 162785 | CEFBS_None, // VRNDSCALEPSZ128rmikz = 18571 |
| 162786 | CEFBS_None, // VRNDSCALEPSZ128rri = 18572 |
| 162787 | CEFBS_None, // VRNDSCALEPSZ128rrik = 18573 |
| 162788 | CEFBS_None, // VRNDSCALEPSZ128rrikz = 18574 |
| 162789 | CEFBS_None, // VRNDSCALEPSZ256rmbi = 18575 |
| 162790 | CEFBS_None, // VRNDSCALEPSZ256rmbik = 18576 |
| 162791 | CEFBS_None, // VRNDSCALEPSZ256rmbikz = 18577 |
| 162792 | CEFBS_None, // VRNDSCALEPSZ256rmi = 18578 |
| 162793 | CEFBS_None, // VRNDSCALEPSZ256rmik = 18579 |
| 162794 | CEFBS_None, // VRNDSCALEPSZ256rmikz = 18580 |
| 162795 | CEFBS_None, // VRNDSCALEPSZ256rri = 18581 |
| 162796 | CEFBS_None, // VRNDSCALEPSZ256rrik = 18582 |
| 162797 | CEFBS_None, // VRNDSCALEPSZ256rrikz = 18583 |
| 162798 | CEFBS_None, // VRNDSCALEPSZrmbi = 18584 |
| 162799 | CEFBS_None, // VRNDSCALEPSZrmbik = 18585 |
| 162800 | CEFBS_None, // VRNDSCALEPSZrmbikz = 18586 |
| 162801 | CEFBS_None, // VRNDSCALEPSZrmi = 18587 |
| 162802 | CEFBS_None, // VRNDSCALEPSZrmik = 18588 |
| 162803 | CEFBS_None, // VRNDSCALEPSZrmikz = 18589 |
| 162804 | CEFBS_None, // VRNDSCALEPSZrri = 18590 |
| 162805 | CEFBS_None, // VRNDSCALEPSZrrib = 18591 |
| 162806 | CEFBS_None, // VRNDSCALEPSZrribk = 18592 |
| 162807 | CEFBS_None, // VRNDSCALEPSZrribkz = 18593 |
| 162808 | CEFBS_None, // VRNDSCALEPSZrrik = 18594 |
| 162809 | CEFBS_None, // VRNDSCALEPSZrrikz = 18595 |
| 162810 | CEFBS_None, // VRNDSCALESDZm = 18596 |
| 162811 | CEFBS_None, // VRNDSCALESDZm_Int = 18597 |
| 162812 | CEFBS_None, // VRNDSCALESDZm_Intk = 18598 |
| 162813 | CEFBS_None, // VRNDSCALESDZm_Intkz = 18599 |
| 162814 | CEFBS_None, // VRNDSCALESDZr = 18600 |
| 162815 | CEFBS_None, // VRNDSCALESDZr_Int = 18601 |
| 162816 | CEFBS_None, // VRNDSCALESDZr_Intk = 18602 |
| 162817 | CEFBS_None, // VRNDSCALESDZr_Intkz = 18603 |
| 162818 | CEFBS_None, // VRNDSCALESDZrb_Int = 18604 |
| 162819 | CEFBS_None, // VRNDSCALESDZrb_Intk = 18605 |
| 162820 | CEFBS_None, // VRNDSCALESDZrb_Intkz = 18606 |
| 162821 | CEFBS_None, // VRNDSCALESHZm = 18607 |
| 162822 | CEFBS_None, // VRNDSCALESHZm_Int = 18608 |
| 162823 | CEFBS_None, // VRNDSCALESHZm_Intk = 18609 |
| 162824 | CEFBS_None, // VRNDSCALESHZm_Intkz = 18610 |
| 162825 | CEFBS_None, // VRNDSCALESHZr = 18611 |
| 162826 | CEFBS_None, // VRNDSCALESHZr_Int = 18612 |
| 162827 | CEFBS_None, // VRNDSCALESHZr_Intk = 18613 |
| 162828 | CEFBS_None, // VRNDSCALESHZr_Intkz = 18614 |
| 162829 | CEFBS_None, // VRNDSCALESHZrb_Int = 18615 |
| 162830 | CEFBS_None, // VRNDSCALESHZrb_Intk = 18616 |
| 162831 | CEFBS_None, // VRNDSCALESHZrb_Intkz = 18617 |
| 162832 | CEFBS_None, // VRNDSCALESSZm = 18618 |
| 162833 | CEFBS_None, // VRNDSCALESSZm_Int = 18619 |
| 162834 | CEFBS_None, // VRNDSCALESSZm_Intk = 18620 |
| 162835 | CEFBS_None, // VRNDSCALESSZm_Intkz = 18621 |
| 162836 | CEFBS_None, // VRNDSCALESSZr = 18622 |
| 162837 | CEFBS_None, // VRNDSCALESSZr_Int = 18623 |
| 162838 | CEFBS_None, // VRNDSCALESSZr_Intk = 18624 |
| 162839 | CEFBS_None, // VRNDSCALESSZr_Intkz = 18625 |
| 162840 | CEFBS_None, // VRNDSCALESSZrb_Int = 18626 |
| 162841 | CEFBS_None, // VRNDSCALESSZrb_Intk = 18627 |
| 162842 | CEFBS_None, // VRNDSCALESSZrb_Intkz = 18628 |
| 162843 | CEFBS_None, // VROUNDPDYmi = 18629 |
| 162844 | CEFBS_None, // VROUNDPDYri = 18630 |
| 162845 | CEFBS_None, // VROUNDPDmi = 18631 |
| 162846 | CEFBS_None, // VROUNDPDri = 18632 |
| 162847 | CEFBS_None, // VROUNDPSYmi = 18633 |
| 162848 | CEFBS_None, // VROUNDPSYri = 18634 |
| 162849 | CEFBS_None, // VROUNDPSmi = 18635 |
| 162850 | CEFBS_None, // VROUNDPSri = 18636 |
| 162851 | CEFBS_None, // VROUNDSDmi = 18637 |
| 162852 | CEFBS_None, // VROUNDSDmi_Int = 18638 |
| 162853 | CEFBS_None, // VROUNDSDri = 18639 |
| 162854 | CEFBS_None, // VROUNDSDri_Int = 18640 |
| 162855 | CEFBS_None, // VROUNDSSmi = 18641 |
| 162856 | CEFBS_None, // VROUNDSSmi_Int = 18642 |
| 162857 | CEFBS_None, // VROUNDSSri = 18643 |
| 162858 | CEFBS_None, // VROUNDSSri_Int = 18644 |
| 162859 | CEFBS_None, // VRSQRT14PDZ128m = 18645 |
| 162860 | CEFBS_None, // VRSQRT14PDZ128mb = 18646 |
| 162861 | CEFBS_None, // VRSQRT14PDZ128mbk = 18647 |
| 162862 | CEFBS_None, // VRSQRT14PDZ128mbkz = 18648 |
| 162863 | CEFBS_None, // VRSQRT14PDZ128mk = 18649 |
| 162864 | CEFBS_None, // VRSQRT14PDZ128mkz = 18650 |
| 162865 | CEFBS_None, // VRSQRT14PDZ128r = 18651 |
| 162866 | CEFBS_None, // VRSQRT14PDZ128rk = 18652 |
| 162867 | CEFBS_None, // VRSQRT14PDZ128rkz = 18653 |
| 162868 | CEFBS_None, // VRSQRT14PDZ256m = 18654 |
| 162869 | CEFBS_None, // VRSQRT14PDZ256mb = 18655 |
| 162870 | CEFBS_None, // VRSQRT14PDZ256mbk = 18656 |
| 162871 | CEFBS_None, // VRSQRT14PDZ256mbkz = 18657 |
| 162872 | CEFBS_None, // VRSQRT14PDZ256mk = 18658 |
| 162873 | CEFBS_None, // VRSQRT14PDZ256mkz = 18659 |
| 162874 | CEFBS_None, // VRSQRT14PDZ256r = 18660 |
| 162875 | CEFBS_None, // VRSQRT14PDZ256rk = 18661 |
| 162876 | CEFBS_None, // VRSQRT14PDZ256rkz = 18662 |
| 162877 | CEFBS_None, // VRSQRT14PDZm = 18663 |
| 162878 | CEFBS_None, // VRSQRT14PDZmb = 18664 |
| 162879 | CEFBS_None, // VRSQRT14PDZmbk = 18665 |
| 162880 | CEFBS_None, // VRSQRT14PDZmbkz = 18666 |
| 162881 | CEFBS_None, // VRSQRT14PDZmk = 18667 |
| 162882 | CEFBS_None, // VRSQRT14PDZmkz = 18668 |
| 162883 | CEFBS_None, // VRSQRT14PDZr = 18669 |
| 162884 | CEFBS_None, // VRSQRT14PDZrk = 18670 |
| 162885 | CEFBS_None, // VRSQRT14PDZrkz = 18671 |
| 162886 | CEFBS_None, // VRSQRT14PSZ128m = 18672 |
| 162887 | CEFBS_None, // VRSQRT14PSZ128mb = 18673 |
| 162888 | CEFBS_None, // VRSQRT14PSZ128mbk = 18674 |
| 162889 | CEFBS_None, // VRSQRT14PSZ128mbkz = 18675 |
| 162890 | CEFBS_None, // VRSQRT14PSZ128mk = 18676 |
| 162891 | CEFBS_None, // VRSQRT14PSZ128mkz = 18677 |
| 162892 | CEFBS_None, // VRSQRT14PSZ128r = 18678 |
| 162893 | CEFBS_None, // VRSQRT14PSZ128rk = 18679 |
| 162894 | CEFBS_None, // VRSQRT14PSZ128rkz = 18680 |
| 162895 | CEFBS_None, // VRSQRT14PSZ256m = 18681 |
| 162896 | CEFBS_None, // VRSQRT14PSZ256mb = 18682 |
| 162897 | CEFBS_None, // VRSQRT14PSZ256mbk = 18683 |
| 162898 | CEFBS_None, // VRSQRT14PSZ256mbkz = 18684 |
| 162899 | CEFBS_None, // VRSQRT14PSZ256mk = 18685 |
| 162900 | CEFBS_None, // VRSQRT14PSZ256mkz = 18686 |
| 162901 | CEFBS_None, // VRSQRT14PSZ256r = 18687 |
| 162902 | CEFBS_None, // VRSQRT14PSZ256rk = 18688 |
| 162903 | CEFBS_None, // VRSQRT14PSZ256rkz = 18689 |
| 162904 | CEFBS_None, // VRSQRT14PSZm = 18690 |
| 162905 | CEFBS_None, // VRSQRT14PSZmb = 18691 |
| 162906 | CEFBS_None, // VRSQRT14PSZmbk = 18692 |
| 162907 | CEFBS_None, // VRSQRT14PSZmbkz = 18693 |
| 162908 | CEFBS_None, // VRSQRT14PSZmk = 18694 |
| 162909 | CEFBS_None, // VRSQRT14PSZmkz = 18695 |
| 162910 | CEFBS_None, // VRSQRT14PSZr = 18696 |
| 162911 | CEFBS_None, // VRSQRT14PSZrk = 18697 |
| 162912 | CEFBS_None, // VRSQRT14PSZrkz = 18698 |
| 162913 | CEFBS_None, // VRSQRT14SDZrm = 18699 |
| 162914 | CEFBS_None, // VRSQRT14SDZrmk = 18700 |
| 162915 | CEFBS_None, // VRSQRT14SDZrmkz = 18701 |
| 162916 | CEFBS_None, // VRSQRT14SDZrr = 18702 |
| 162917 | CEFBS_None, // VRSQRT14SDZrrk = 18703 |
| 162918 | CEFBS_None, // VRSQRT14SDZrrkz = 18704 |
| 162919 | CEFBS_None, // VRSQRT14SSZrm = 18705 |
| 162920 | CEFBS_None, // VRSQRT14SSZrmk = 18706 |
| 162921 | CEFBS_None, // VRSQRT14SSZrmkz = 18707 |
| 162922 | CEFBS_None, // VRSQRT14SSZrr = 18708 |
| 162923 | CEFBS_None, // VRSQRT14SSZrrk = 18709 |
| 162924 | CEFBS_None, // VRSQRT14SSZrrkz = 18710 |
| 162925 | CEFBS_None, // VRSQRT28PDZm = 18711 |
| 162926 | CEFBS_None, // VRSQRT28PDZmb = 18712 |
| 162927 | CEFBS_None, // VRSQRT28PDZmbk = 18713 |
| 162928 | CEFBS_None, // VRSQRT28PDZmbkz = 18714 |
| 162929 | CEFBS_None, // VRSQRT28PDZmk = 18715 |
| 162930 | CEFBS_None, // VRSQRT28PDZmkz = 18716 |
| 162931 | CEFBS_None, // VRSQRT28PDZr = 18717 |
| 162932 | CEFBS_None, // VRSQRT28PDZrb = 18718 |
| 162933 | CEFBS_None, // VRSQRT28PDZrbk = 18719 |
| 162934 | CEFBS_None, // VRSQRT28PDZrbkz = 18720 |
| 162935 | CEFBS_None, // VRSQRT28PDZrk = 18721 |
| 162936 | CEFBS_None, // VRSQRT28PDZrkz = 18722 |
| 162937 | CEFBS_None, // VRSQRT28PSZm = 18723 |
| 162938 | CEFBS_None, // VRSQRT28PSZmb = 18724 |
| 162939 | CEFBS_None, // VRSQRT28PSZmbk = 18725 |
| 162940 | CEFBS_None, // VRSQRT28PSZmbkz = 18726 |
| 162941 | CEFBS_None, // VRSQRT28PSZmk = 18727 |
| 162942 | CEFBS_None, // VRSQRT28PSZmkz = 18728 |
| 162943 | CEFBS_None, // VRSQRT28PSZr = 18729 |
| 162944 | CEFBS_None, // VRSQRT28PSZrb = 18730 |
| 162945 | CEFBS_None, // VRSQRT28PSZrbk = 18731 |
| 162946 | CEFBS_None, // VRSQRT28PSZrbkz = 18732 |
| 162947 | CEFBS_None, // VRSQRT28PSZrk = 18733 |
| 162948 | CEFBS_None, // VRSQRT28PSZrkz = 18734 |
| 162949 | CEFBS_None, // VRSQRT28SDZm = 18735 |
| 162950 | CEFBS_None, // VRSQRT28SDZmk = 18736 |
| 162951 | CEFBS_None, // VRSQRT28SDZmkz = 18737 |
| 162952 | CEFBS_None, // VRSQRT28SDZr = 18738 |
| 162953 | CEFBS_None, // VRSQRT28SDZrb = 18739 |
| 162954 | CEFBS_None, // VRSQRT28SDZrbk = 18740 |
| 162955 | CEFBS_None, // VRSQRT28SDZrbkz = 18741 |
| 162956 | CEFBS_None, // VRSQRT28SDZrk = 18742 |
| 162957 | CEFBS_None, // VRSQRT28SDZrkz = 18743 |
| 162958 | CEFBS_None, // VRSQRT28SSZm = 18744 |
| 162959 | CEFBS_None, // VRSQRT28SSZmk = 18745 |
| 162960 | CEFBS_None, // VRSQRT28SSZmkz = 18746 |
| 162961 | CEFBS_None, // VRSQRT28SSZr = 18747 |
| 162962 | CEFBS_None, // VRSQRT28SSZrb = 18748 |
| 162963 | CEFBS_None, // VRSQRT28SSZrbk = 18749 |
| 162964 | CEFBS_None, // VRSQRT28SSZrbkz = 18750 |
| 162965 | CEFBS_None, // VRSQRT28SSZrk = 18751 |
| 162966 | CEFBS_None, // VRSQRT28SSZrkz = 18752 |
| 162967 | CEFBS_None, // VRSQRTPHZ128m = 18753 |
| 162968 | CEFBS_None, // VRSQRTPHZ128mb = 18754 |
| 162969 | CEFBS_None, // VRSQRTPHZ128mbk = 18755 |
| 162970 | CEFBS_None, // VRSQRTPHZ128mbkz = 18756 |
| 162971 | CEFBS_None, // VRSQRTPHZ128mk = 18757 |
| 162972 | CEFBS_None, // VRSQRTPHZ128mkz = 18758 |
| 162973 | CEFBS_None, // VRSQRTPHZ128r = 18759 |
| 162974 | CEFBS_None, // VRSQRTPHZ128rk = 18760 |
| 162975 | CEFBS_None, // VRSQRTPHZ128rkz = 18761 |
| 162976 | CEFBS_None, // VRSQRTPHZ256m = 18762 |
| 162977 | CEFBS_None, // VRSQRTPHZ256mb = 18763 |
| 162978 | CEFBS_None, // VRSQRTPHZ256mbk = 18764 |
| 162979 | CEFBS_None, // VRSQRTPHZ256mbkz = 18765 |
| 162980 | CEFBS_None, // VRSQRTPHZ256mk = 18766 |
| 162981 | CEFBS_None, // VRSQRTPHZ256mkz = 18767 |
| 162982 | CEFBS_None, // VRSQRTPHZ256r = 18768 |
| 162983 | CEFBS_None, // VRSQRTPHZ256rk = 18769 |
| 162984 | CEFBS_None, // VRSQRTPHZ256rkz = 18770 |
| 162985 | CEFBS_None, // VRSQRTPHZm = 18771 |
| 162986 | CEFBS_None, // VRSQRTPHZmb = 18772 |
| 162987 | CEFBS_None, // VRSQRTPHZmbk = 18773 |
| 162988 | CEFBS_None, // VRSQRTPHZmbkz = 18774 |
| 162989 | CEFBS_None, // VRSQRTPHZmk = 18775 |
| 162990 | CEFBS_None, // VRSQRTPHZmkz = 18776 |
| 162991 | CEFBS_None, // VRSQRTPHZr = 18777 |
| 162992 | CEFBS_None, // VRSQRTPHZrk = 18778 |
| 162993 | CEFBS_None, // VRSQRTPHZrkz = 18779 |
| 162994 | CEFBS_None, // VRSQRTPSYm = 18780 |
| 162995 | CEFBS_None, // VRSQRTPSYr = 18781 |
| 162996 | CEFBS_None, // VRSQRTPSm = 18782 |
| 162997 | CEFBS_None, // VRSQRTPSr = 18783 |
| 162998 | CEFBS_None, // VRSQRTSHZrm = 18784 |
| 162999 | CEFBS_None, // VRSQRTSHZrmk = 18785 |
| 163000 | CEFBS_None, // VRSQRTSHZrmkz = 18786 |
| 163001 | CEFBS_None, // VRSQRTSHZrr = 18787 |
| 163002 | CEFBS_None, // VRSQRTSHZrrk = 18788 |
| 163003 | CEFBS_None, // VRSQRTSHZrrkz = 18789 |
| 163004 | CEFBS_None, // VRSQRTSSm = 18790 |
| 163005 | CEFBS_None, // VRSQRTSSm_Int = 18791 |
| 163006 | CEFBS_None, // VRSQRTSSr = 18792 |
| 163007 | CEFBS_None, // VRSQRTSSr_Int = 18793 |
| 163008 | CEFBS_None, // VSCALEFPDZ128rm = 18794 |
| 163009 | CEFBS_None, // VSCALEFPDZ128rmb = 18795 |
| 163010 | CEFBS_None, // VSCALEFPDZ128rmbk = 18796 |
| 163011 | CEFBS_None, // VSCALEFPDZ128rmbkz = 18797 |
| 163012 | CEFBS_None, // VSCALEFPDZ128rmk = 18798 |
| 163013 | CEFBS_None, // VSCALEFPDZ128rmkz = 18799 |
| 163014 | CEFBS_None, // VSCALEFPDZ128rr = 18800 |
| 163015 | CEFBS_None, // VSCALEFPDZ128rrk = 18801 |
| 163016 | CEFBS_None, // VSCALEFPDZ128rrkz = 18802 |
| 163017 | CEFBS_None, // VSCALEFPDZ256rm = 18803 |
| 163018 | CEFBS_None, // VSCALEFPDZ256rmb = 18804 |
| 163019 | CEFBS_None, // VSCALEFPDZ256rmbk = 18805 |
| 163020 | CEFBS_None, // VSCALEFPDZ256rmbkz = 18806 |
| 163021 | CEFBS_None, // VSCALEFPDZ256rmk = 18807 |
| 163022 | CEFBS_None, // VSCALEFPDZ256rmkz = 18808 |
| 163023 | CEFBS_None, // VSCALEFPDZ256rr = 18809 |
| 163024 | CEFBS_None, // VSCALEFPDZ256rrk = 18810 |
| 163025 | CEFBS_None, // VSCALEFPDZ256rrkz = 18811 |
| 163026 | CEFBS_None, // VSCALEFPDZrm = 18812 |
| 163027 | CEFBS_None, // VSCALEFPDZrmb = 18813 |
| 163028 | CEFBS_None, // VSCALEFPDZrmbk = 18814 |
| 163029 | CEFBS_None, // VSCALEFPDZrmbkz = 18815 |
| 163030 | CEFBS_None, // VSCALEFPDZrmk = 18816 |
| 163031 | CEFBS_None, // VSCALEFPDZrmkz = 18817 |
| 163032 | CEFBS_None, // VSCALEFPDZrr = 18818 |
| 163033 | CEFBS_None, // VSCALEFPDZrrb = 18819 |
| 163034 | CEFBS_None, // VSCALEFPDZrrbk = 18820 |
| 163035 | CEFBS_None, // VSCALEFPDZrrbkz = 18821 |
| 163036 | CEFBS_None, // VSCALEFPDZrrk = 18822 |
| 163037 | CEFBS_None, // VSCALEFPDZrrkz = 18823 |
| 163038 | CEFBS_None, // VSCALEFPHZ128rm = 18824 |
| 163039 | CEFBS_None, // VSCALEFPHZ128rmb = 18825 |
| 163040 | CEFBS_None, // VSCALEFPHZ128rmbk = 18826 |
| 163041 | CEFBS_None, // VSCALEFPHZ128rmbkz = 18827 |
| 163042 | CEFBS_None, // VSCALEFPHZ128rmk = 18828 |
| 163043 | CEFBS_None, // VSCALEFPHZ128rmkz = 18829 |
| 163044 | CEFBS_None, // VSCALEFPHZ128rr = 18830 |
| 163045 | CEFBS_None, // VSCALEFPHZ128rrk = 18831 |
| 163046 | CEFBS_None, // VSCALEFPHZ128rrkz = 18832 |
| 163047 | CEFBS_None, // VSCALEFPHZ256rm = 18833 |
| 163048 | CEFBS_None, // VSCALEFPHZ256rmb = 18834 |
| 163049 | CEFBS_None, // VSCALEFPHZ256rmbk = 18835 |
| 163050 | CEFBS_None, // VSCALEFPHZ256rmbkz = 18836 |
| 163051 | CEFBS_None, // VSCALEFPHZ256rmk = 18837 |
| 163052 | CEFBS_None, // VSCALEFPHZ256rmkz = 18838 |
| 163053 | CEFBS_None, // VSCALEFPHZ256rr = 18839 |
| 163054 | CEFBS_None, // VSCALEFPHZ256rrk = 18840 |
| 163055 | CEFBS_None, // VSCALEFPHZ256rrkz = 18841 |
| 163056 | CEFBS_None, // VSCALEFPHZrm = 18842 |
| 163057 | CEFBS_None, // VSCALEFPHZrmb = 18843 |
| 163058 | CEFBS_None, // VSCALEFPHZrmbk = 18844 |
| 163059 | CEFBS_None, // VSCALEFPHZrmbkz = 18845 |
| 163060 | CEFBS_None, // VSCALEFPHZrmk = 18846 |
| 163061 | CEFBS_None, // VSCALEFPHZrmkz = 18847 |
| 163062 | CEFBS_None, // VSCALEFPHZrr = 18848 |
| 163063 | CEFBS_None, // VSCALEFPHZrrb = 18849 |
| 163064 | CEFBS_None, // VSCALEFPHZrrbk = 18850 |
| 163065 | CEFBS_None, // VSCALEFPHZrrbkz = 18851 |
| 163066 | CEFBS_None, // VSCALEFPHZrrk = 18852 |
| 163067 | CEFBS_None, // VSCALEFPHZrrkz = 18853 |
| 163068 | CEFBS_None, // VSCALEFPSZ128rm = 18854 |
| 163069 | CEFBS_None, // VSCALEFPSZ128rmb = 18855 |
| 163070 | CEFBS_None, // VSCALEFPSZ128rmbk = 18856 |
| 163071 | CEFBS_None, // VSCALEFPSZ128rmbkz = 18857 |
| 163072 | CEFBS_None, // VSCALEFPSZ128rmk = 18858 |
| 163073 | CEFBS_None, // VSCALEFPSZ128rmkz = 18859 |
| 163074 | CEFBS_None, // VSCALEFPSZ128rr = 18860 |
| 163075 | CEFBS_None, // VSCALEFPSZ128rrk = 18861 |
| 163076 | CEFBS_None, // VSCALEFPSZ128rrkz = 18862 |
| 163077 | CEFBS_None, // VSCALEFPSZ256rm = 18863 |
| 163078 | CEFBS_None, // VSCALEFPSZ256rmb = 18864 |
| 163079 | CEFBS_None, // VSCALEFPSZ256rmbk = 18865 |
| 163080 | CEFBS_None, // VSCALEFPSZ256rmbkz = 18866 |
| 163081 | CEFBS_None, // VSCALEFPSZ256rmk = 18867 |
| 163082 | CEFBS_None, // VSCALEFPSZ256rmkz = 18868 |
| 163083 | CEFBS_None, // VSCALEFPSZ256rr = 18869 |
| 163084 | CEFBS_None, // VSCALEFPSZ256rrk = 18870 |
| 163085 | CEFBS_None, // VSCALEFPSZ256rrkz = 18871 |
| 163086 | CEFBS_None, // VSCALEFPSZrm = 18872 |
| 163087 | CEFBS_None, // VSCALEFPSZrmb = 18873 |
| 163088 | CEFBS_None, // VSCALEFPSZrmbk = 18874 |
| 163089 | CEFBS_None, // VSCALEFPSZrmbkz = 18875 |
| 163090 | CEFBS_None, // VSCALEFPSZrmk = 18876 |
| 163091 | CEFBS_None, // VSCALEFPSZrmkz = 18877 |
| 163092 | CEFBS_None, // VSCALEFPSZrr = 18878 |
| 163093 | CEFBS_None, // VSCALEFPSZrrb = 18879 |
| 163094 | CEFBS_None, // VSCALEFPSZrrbk = 18880 |
| 163095 | CEFBS_None, // VSCALEFPSZrrbkz = 18881 |
| 163096 | CEFBS_None, // VSCALEFPSZrrk = 18882 |
| 163097 | CEFBS_None, // VSCALEFPSZrrkz = 18883 |
| 163098 | CEFBS_None, // VSCALEFSDZrm = 18884 |
| 163099 | CEFBS_None, // VSCALEFSDZrmk = 18885 |
| 163100 | CEFBS_None, // VSCALEFSDZrmkz = 18886 |
| 163101 | CEFBS_None, // VSCALEFSDZrr = 18887 |
| 163102 | CEFBS_None, // VSCALEFSDZrrb_Int = 18888 |
| 163103 | CEFBS_None, // VSCALEFSDZrrb_Intk = 18889 |
| 163104 | CEFBS_None, // VSCALEFSDZrrb_Intkz = 18890 |
| 163105 | CEFBS_None, // VSCALEFSDZrrk = 18891 |
| 163106 | CEFBS_None, // VSCALEFSDZrrkz = 18892 |
| 163107 | CEFBS_None, // VSCALEFSHZrm = 18893 |
| 163108 | CEFBS_None, // VSCALEFSHZrmk = 18894 |
| 163109 | CEFBS_None, // VSCALEFSHZrmkz = 18895 |
| 163110 | CEFBS_None, // VSCALEFSHZrr = 18896 |
| 163111 | CEFBS_None, // VSCALEFSHZrrb_Int = 18897 |
| 163112 | CEFBS_None, // VSCALEFSHZrrb_Intk = 18898 |
| 163113 | CEFBS_None, // VSCALEFSHZrrb_Intkz = 18899 |
| 163114 | CEFBS_None, // VSCALEFSHZrrk = 18900 |
| 163115 | CEFBS_None, // VSCALEFSHZrrkz = 18901 |
| 163116 | CEFBS_None, // VSCALEFSSZrm = 18902 |
| 163117 | CEFBS_None, // VSCALEFSSZrmk = 18903 |
| 163118 | CEFBS_None, // VSCALEFSSZrmkz = 18904 |
| 163119 | CEFBS_None, // VSCALEFSSZrr = 18905 |
| 163120 | CEFBS_None, // VSCALEFSSZrrb_Int = 18906 |
| 163121 | CEFBS_None, // VSCALEFSSZrrb_Intk = 18907 |
| 163122 | CEFBS_None, // VSCALEFSSZrrb_Intkz = 18908 |
| 163123 | CEFBS_None, // VSCALEFSSZrrk = 18909 |
| 163124 | CEFBS_None, // VSCALEFSSZrrkz = 18910 |
| 163125 | CEFBS_None, // VSCATTERDPDZ128mr = 18911 |
| 163126 | CEFBS_None, // VSCATTERDPDZ256mr = 18912 |
| 163127 | CEFBS_None, // VSCATTERDPDZmr = 18913 |
| 163128 | CEFBS_None, // VSCATTERDPSZ128mr = 18914 |
| 163129 | CEFBS_None, // VSCATTERDPSZ256mr = 18915 |
| 163130 | CEFBS_None, // VSCATTERDPSZmr = 18916 |
| 163131 | CEFBS_None, // VSCATTERPF0DPDm = 18917 |
| 163132 | CEFBS_None, // VSCATTERPF0DPSm = 18918 |
| 163133 | CEFBS_None, // VSCATTERPF0QPDm = 18919 |
| 163134 | CEFBS_None, // VSCATTERPF0QPSm = 18920 |
| 163135 | CEFBS_None, // VSCATTERPF1DPDm = 18921 |
| 163136 | CEFBS_None, // VSCATTERPF1DPSm = 18922 |
| 163137 | CEFBS_None, // VSCATTERPF1QPDm = 18923 |
| 163138 | CEFBS_None, // VSCATTERPF1QPSm = 18924 |
| 163139 | CEFBS_None, // VSCATTERQPDZ128mr = 18925 |
| 163140 | CEFBS_None, // VSCATTERQPDZ256mr = 18926 |
| 163141 | CEFBS_None, // VSCATTERQPDZmr = 18927 |
| 163142 | CEFBS_None, // VSCATTERQPSZ128mr = 18928 |
| 163143 | CEFBS_None, // VSCATTERQPSZ256mr = 18929 |
| 163144 | CEFBS_None, // VSCATTERQPSZmr = 18930 |
| 163145 | CEFBS_None, // VSHA512MSG1rr = 18931 |
| 163146 | CEFBS_None, // VSHA512MSG2rr = 18932 |
| 163147 | CEFBS_None, // VSHA512RNDS2rr = 18933 |
| 163148 | CEFBS_None, // VSHUFF32X4Z256rmbi = 18934 |
| 163149 | CEFBS_None, // VSHUFF32X4Z256rmbik = 18935 |
| 163150 | CEFBS_None, // VSHUFF32X4Z256rmbikz = 18936 |
| 163151 | CEFBS_None, // VSHUFF32X4Z256rmi = 18937 |
| 163152 | CEFBS_None, // VSHUFF32X4Z256rmik = 18938 |
| 163153 | CEFBS_None, // VSHUFF32X4Z256rmikz = 18939 |
| 163154 | CEFBS_None, // VSHUFF32X4Z256rri = 18940 |
| 163155 | CEFBS_None, // VSHUFF32X4Z256rrik = 18941 |
| 163156 | CEFBS_None, // VSHUFF32X4Z256rrikz = 18942 |
| 163157 | CEFBS_None, // VSHUFF32X4Zrmbi = 18943 |
| 163158 | CEFBS_None, // VSHUFF32X4Zrmbik = 18944 |
| 163159 | CEFBS_None, // VSHUFF32X4Zrmbikz = 18945 |
| 163160 | CEFBS_None, // VSHUFF32X4Zrmi = 18946 |
| 163161 | CEFBS_None, // VSHUFF32X4Zrmik = 18947 |
| 163162 | CEFBS_None, // VSHUFF32X4Zrmikz = 18948 |
| 163163 | CEFBS_None, // VSHUFF32X4Zrri = 18949 |
| 163164 | CEFBS_None, // VSHUFF32X4Zrrik = 18950 |
| 163165 | CEFBS_None, // VSHUFF32X4Zrrikz = 18951 |
| 163166 | CEFBS_None, // VSHUFF64X2Z256rmbi = 18952 |
| 163167 | CEFBS_None, // VSHUFF64X2Z256rmbik = 18953 |
| 163168 | CEFBS_None, // VSHUFF64X2Z256rmbikz = 18954 |
| 163169 | CEFBS_None, // VSHUFF64X2Z256rmi = 18955 |
| 163170 | CEFBS_None, // VSHUFF64X2Z256rmik = 18956 |
| 163171 | CEFBS_None, // VSHUFF64X2Z256rmikz = 18957 |
| 163172 | CEFBS_None, // VSHUFF64X2Z256rri = 18958 |
| 163173 | CEFBS_None, // VSHUFF64X2Z256rrik = 18959 |
| 163174 | CEFBS_None, // VSHUFF64X2Z256rrikz = 18960 |
| 163175 | CEFBS_None, // VSHUFF64X2Zrmbi = 18961 |
| 163176 | CEFBS_None, // VSHUFF64X2Zrmbik = 18962 |
| 163177 | CEFBS_None, // VSHUFF64X2Zrmbikz = 18963 |
| 163178 | CEFBS_None, // VSHUFF64X2Zrmi = 18964 |
| 163179 | CEFBS_None, // VSHUFF64X2Zrmik = 18965 |
| 163180 | CEFBS_None, // VSHUFF64X2Zrmikz = 18966 |
| 163181 | CEFBS_None, // VSHUFF64X2Zrri = 18967 |
| 163182 | CEFBS_None, // VSHUFF64X2Zrrik = 18968 |
| 163183 | CEFBS_None, // VSHUFF64X2Zrrikz = 18969 |
| 163184 | CEFBS_None, // VSHUFI32X4Z256rmbi = 18970 |
| 163185 | CEFBS_None, // VSHUFI32X4Z256rmbik = 18971 |
| 163186 | CEFBS_None, // VSHUFI32X4Z256rmbikz = 18972 |
| 163187 | CEFBS_None, // VSHUFI32X4Z256rmi = 18973 |
| 163188 | CEFBS_None, // VSHUFI32X4Z256rmik = 18974 |
| 163189 | CEFBS_None, // VSHUFI32X4Z256rmikz = 18975 |
| 163190 | CEFBS_None, // VSHUFI32X4Z256rri = 18976 |
| 163191 | CEFBS_None, // VSHUFI32X4Z256rrik = 18977 |
| 163192 | CEFBS_None, // VSHUFI32X4Z256rrikz = 18978 |
| 163193 | CEFBS_None, // VSHUFI32X4Zrmbi = 18979 |
| 163194 | CEFBS_None, // VSHUFI32X4Zrmbik = 18980 |
| 163195 | CEFBS_None, // VSHUFI32X4Zrmbikz = 18981 |
| 163196 | CEFBS_None, // VSHUFI32X4Zrmi = 18982 |
| 163197 | CEFBS_None, // VSHUFI32X4Zrmik = 18983 |
| 163198 | CEFBS_None, // VSHUFI32X4Zrmikz = 18984 |
| 163199 | CEFBS_None, // VSHUFI32X4Zrri = 18985 |
| 163200 | CEFBS_None, // VSHUFI32X4Zrrik = 18986 |
| 163201 | CEFBS_None, // VSHUFI32X4Zrrikz = 18987 |
| 163202 | CEFBS_None, // VSHUFI64X2Z256rmbi = 18988 |
| 163203 | CEFBS_None, // VSHUFI64X2Z256rmbik = 18989 |
| 163204 | CEFBS_None, // VSHUFI64X2Z256rmbikz = 18990 |
| 163205 | CEFBS_None, // VSHUFI64X2Z256rmi = 18991 |
| 163206 | CEFBS_None, // VSHUFI64X2Z256rmik = 18992 |
| 163207 | CEFBS_None, // VSHUFI64X2Z256rmikz = 18993 |
| 163208 | CEFBS_None, // VSHUFI64X2Z256rri = 18994 |
| 163209 | CEFBS_None, // VSHUFI64X2Z256rrik = 18995 |
| 163210 | CEFBS_None, // VSHUFI64X2Z256rrikz = 18996 |
| 163211 | CEFBS_None, // VSHUFI64X2Zrmbi = 18997 |
| 163212 | CEFBS_None, // VSHUFI64X2Zrmbik = 18998 |
| 163213 | CEFBS_None, // VSHUFI64X2Zrmbikz = 18999 |
| 163214 | CEFBS_None, // VSHUFI64X2Zrmi = 19000 |
| 163215 | CEFBS_None, // VSHUFI64X2Zrmik = 19001 |
| 163216 | CEFBS_None, // VSHUFI64X2Zrmikz = 19002 |
| 163217 | CEFBS_None, // VSHUFI64X2Zrri = 19003 |
| 163218 | CEFBS_None, // VSHUFI64X2Zrrik = 19004 |
| 163219 | CEFBS_None, // VSHUFI64X2Zrrikz = 19005 |
| 163220 | CEFBS_None, // VSHUFPDYrmi = 19006 |
| 163221 | CEFBS_None, // VSHUFPDYrri = 19007 |
| 163222 | CEFBS_None, // VSHUFPDZ128rmbi = 19008 |
| 163223 | CEFBS_None, // VSHUFPDZ128rmbik = 19009 |
| 163224 | CEFBS_None, // VSHUFPDZ128rmbikz = 19010 |
| 163225 | CEFBS_None, // VSHUFPDZ128rmi = 19011 |
| 163226 | CEFBS_None, // VSHUFPDZ128rmik = 19012 |
| 163227 | CEFBS_None, // VSHUFPDZ128rmikz = 19013 |
| 163228 | CEFBS_None, // VSHUFPDZ128rri = 19014 |
| 163229 | CEFBS_None, // VSHUFPDZ128rrik = 19015 |
| 163230 | CEFBS_None, // VSHUFPDZ128rrikz = 19016 |
| 163231 | CEFBS_None, // VSHUFPDZ256rmbi = 19017 |
| 163232 | CEFBS_None, // VSHUFPDZ256rmbik = 19018 |
| 163233 | CEFBS_None, // VSHUFPDZ256rmbikz = 19019 |
| 163234 | CEFBS_None, // VSHUFPDZ256rmi = 19020 |
| 163235 | CEFBS_None, // VSHUFPDZ256rmik = 19021 |
| 163236 | CEFBS_None, // VSHUFPDZ256rmikz = 19022 |
| 163237 | CEFBS_None, // VSHUFPDZ256rri = 19023 |
| 163238 | CEFBS_None, // VSHUFPDZ256rrik = 19024 |
| 163239 | CEFBS_None, // VSHUFPDZ256rrikz = 19025 |
| 163240 | CEFBS_None, // VSHUFPDZrmbi = 19026 |
| 163241 | CEFBS_None, // VSHUFPDZrmbik = 19027 |
| 163242 | CEFBS_None, // VSHUFPDZrmbikz = 19028 |
| 163243 | CEFBS_None, // VSHUFPDZrmi = 19029 |
| 163244 | CEFBS_None, // VSHUFPDZrmik = 19030 |
| 163245 | CEFBS_None, // VSHUFPDZrmikz = 19031 |
| 163246 | CEFBS_None, // VSHUFPDZrri = 19032 |
| 163247 | CEFBS_None, // VSHUFPDZrrik = 19033 |
| 163248 | CEFBS_None, // VSHUFPDZrrikz = 19034 |
| 163249 | CEFBS_None, // VSHUFPDrmi = 19035 |
| 163250 | CEFBS_None, // VSHUFPDrri = 19036 |
| 163251 | CEFBS_None, // VSHUFPSYrmi = 19037 |
| 163252 | CEFBS_None, // VSHUFPSYrri = 19038 |
| 163253 | CEFBS_None, // VSHUFPSZ128rmbi = 19039 |
| 163254 | CEFBS_None, // VSHUFPSZ128rmbik = 19040 |
| 163255 | CEFBS_None, // VSHUFPSZ128rmbikz = 19041 |
| 163256 | CEFBS_None, // VSHUFPSZ128rmi = 19042 |
| 163257 | CEFBS_None, // VSHUFPSZ128rmik = 19043 |
| 163258 | CEFBS_None, // VSHUFPSZ128rmikz = 19044 |
| 163259 | CEFBS_None, // VSHUFPSZ128rri = 19045 |
| 163260 | CEFBS_None, // VSHUFPSZ128rrik = 19046 |
| 163261 | CEFBS_None, // VSHUFPSZ128rrikz = 19047 |
| 163262 | CEFBS_None, // VSHUFPSZ256rmbi = 19048 |
| 163263 | CEFBS_None, // VSHUFPSZ256rmbik = 19049 |
| 163264 | CEFBS_None, // VSHUFPSZ256rmbikz = 19050 |
| 163265 | CEFBS_None, // VSHUFPSZ256rmi = 19051 |
| 163266 | CEFBS_None, // VSHUFPSZ256rmik = 19052 |
| 163267 | CEFBS_None, // VSHUFPSZ256rmikz = 19053 |
| 163268 | CEFBS_None, // VSHUFPSZ256rri = 19054 |
| 163269 | CEFBS_None, // VSHUFPSZ256rrik = 19055 |
| 163270 | CEFBS_None, // VSHUFPSZ256rrikz = 19056 |
| 163271 | CEFBS_None, // VSHUFPSZrmbi = 19057 |
| 163272 | CEFBS_None, // VSHUFPSZrmbik = 19058 |
| 163273 | CEFBS_None, // VSHUFPSZrmbikz = 19059 |
| 163274 | CEFBS_None, // VSHUFPSZrmi = 19060 |
| 163275 | CEFBS_None, // VSHUFPSZrmik = 19061 |
| 163276 | CEFBS_None, // VSHUFPSZrmikz = 19062 |
| 163277 | CEFBS_None, // VSHUFPSZrri = 19063 |
| 163278 | CEFBS_None, // VSHUFPSZrrik = 19064 |
| 163279 | CEFBS_None, // VSHUFPSZrrikz = 19065 |
| 163280 | CEFBS_None, // VSHUFPSrmi = 19066 |
| 163281 | CEFBS_None, // VSHUFPSrri = 19067 |
| 163282 | CEFBS_None, // VSM3MSG1rm = 19068 |
| 163283 | CEFBS_None, // VSM3MSG1rr = 19069 |
| 163284 | CEFBS_None, // VSM3MSG2rm = 19070 |
| 163285 | CEFBS_None, // VSM3MSG2rr = 19071 |
| 163286 | CEFBS_None, // VSM3RNDS2rm = 19072 |
| 163287 | CEFBS_None, // VSM3RNDS2rr = 19073 |
| 163288 | CEFBS_None, // VSM4KEY4Yrm = 19074 |
| 163289 | CEFBS_None, // VSM4KEY4Yrr = 19075 |
| 163290 | CEFBS_None, // VSM4KEY4rm = 19076 |
| 163291 | CEFBS_None, // VSM4KEY4rr = 19077 |
| 163292 | CEFBS_None, // VSM4RNDS4Yrm = 19078 |
| 163293 | CEFBS_None, // VSM4RNDS4Yrr = 19079 |
| 163294 | CEFBS_None, // VSM4RNDS4rm = 19080 |
| 163295 | CEFBS_None, // VSM4RNDS4rr = 19081 |
| 163296 | CEFBS_None, // VSQRTPDYm = 19082 |
| 163297 | CEFBS_None, // VSQRTPDYr = 19083 |
| 163298 | CEFBS_None, // VSQRTPDZ128m = 19084 |
| 163299 | CEFBS_None, // VSQRTPDZ128mb = 19085 |
| 163300 | CEFBS_None, // VSQRTPDZ128mbk = 19086 |
| 163301 | CEFBS_None, // VSQRTPDZ128mbkz = 19087 |
| 163302 | CEFBS_None, // VSQRTPDZ128mk = 19088 |
| 163303 | CEFBS_None, // VSQRTPDZ128mkz = 19089 |
| 163304 | CEFBS_None, // VSQRTPDZ128r = 19090 |
| 163305 | CEFBS_None, // VSQRTPDZ128rk = 19091 |
| 163306 | CEFBS_None, // VSQRTPDZ128rkz = 19092 |
| 163307 | CEFBS_None, // VSQRTPDZ256m = 19093 |
| 163308 | CEFBS_None, // VSQRTPDZ256mb = 19094 |
| 163309 | CEFBS_None, // VSQRTPDZ256mbk = 19095 |
| 163310 | CEFBS_None, // VSQRTPDZ256mbkz = 19096 |
| 163311 | CEFBS_None, // VSQRTPDZ256mk = 19097 |
| 163312 | CEFBS_None, // VSQRTPDZ256mkz = 19098 |
| 163313 | CEFBS_None, // VSQRTPDZ256r = 19099 |
| 163314 | CEFBS_None, // VSQRTPDZ256rk = 19100 |
| 163315 | CEFBS_None, // VSQRTPDZ256rkz = 19101 |
| 163316 | CEFBS_None, // VSQRTPDZm = 19102 |
| 163317 | CEFBS_None, // VSQRTPDZmb = 19103 |
| 163318 | CEFBS_None, // VSQRTPDZmbk = 19104 |
| 163319 | CEFBS_None, // VSQRTPDZmbkz = 19105 |
| 163320 | CEFBS_None, // VSQRTPDZmk = 19106 |
| 163321 | CEFBS_None, // VSQRTPDZmkz = 19107 |
| 163322 | CEFBS_None, // VSQRTPDZr = 19108 |
| 163323 | CEFBS_None, // VSQRTPDZrb = 19109 |
| 163324 | CEFBS_None, // VSQRTPDZrbk = 19110 |
| 163325 | CEFBS_None, // VSQRTPDZrbkz = 19111 |
| 163326 | CEFBS_None, // VSQRTPDZrk = 19112 |
| 163327 | CEFBS_None, // VSQRTPDZrkz = 19113 |
| 163328 | CEFBS_None, // VSQRTPDm = 19114 |
| 163329 | CEFBS_None, // VSQRTPDr = 19115 |
| 163330 | CEFBS_None, // VSQRTPHZ128m = 19116 |
| 163331 | CEFBS_None, // VSQRTPHZ128mb = 19117 |
| 163332 | CEFBS_None, // VSQRTPHZ128mbk = 19118 |
| 163333 | CEFBS_None, // VSQRTPHZ128mbkz = 19119 |
| 163334 | CEFBS_None, // VSQRTPHZ128mk = 19120 |
| 163335 | CEFBS_None, // VSQRTPHZ128mkz = 19121 |
| 163336 | CEFBS_None, // VSQRTPHZ128r = 19122 |
| 163337 | CEFBS_None, // VSQRTPHZ128rk = 19123 |
| 163338 | CEFBS_None, // VSQRTPHZ128rkz = 19124 |
| 163339 | CEFBS_None, // VSQRTPHZ256m = 19125 |
| 163340 | CEFBS_None, // VSQRTPHZ256mb = 19126 |
| 163341 | CEFBS_None, // VSQRTPHZ256mbk = 19127 |
| 163342 | CEFBS_None, // VSQRTPHZ256mbkz = 19128 |
| 163343 | CEFBS_None, // VSQRTPHZ256mk = 19129 |
| 163344 | CEFBS_None, // VSQRTPHZ256mkz = 19130 |
| 163345 | CEFBS_None, // VSQRTPHZ256r = 19131 |
| 163346 | CEFBS_None, // VSQRTPHZ256rk = 19132 |
| 163347 | CEFBS_None, // VSQRTPHZ256rkz = 19133 |
| 163348 | CEFBS_None, // VSQRTPHZm = 19134 |
| 163349 | CEFBS_None, // VSQRTPHZmb = 19135 |
| 163350 | CEFBS_None, // VSQRTPHZmbk = 19136 |
| 163351 | CEFBS_None, // VSQRTPHZmbkz = 19137 |
| 163352 | CEFBS_None, // VSQRTPHZmk = 19138 |
| 163353 | CEFBS_None, // VSQRTPHZmkz = 19139 |
| 163354 | CEFBS_None, // VSQRTPHZr = 19140 |
| 163355 | CEFBS_None, // VSQRTPHZrb = 19141 |
| 163356 | CEFBS_None, // VSQRTPHZrbk = 19142 |
| 163357 | CEFBS_None, // VSQRTPHZrbkz = 19143 |
| 163358 | CEFBS_None, // VSQRTPHZrk = 19144 |
| 163359 | CEFBS_None, // VSQRTPHZrkz = 19145 |
| 163360 | CEFBS_None, // VSQRTPSYm = 19146 |
| 163361 | CEFBS_None, // VSQRTPSYr = 19147 |
| 163362 | CEFBS_None, // VSQRTPSZ128m = 19148 |
| 163363 | CEFBS_None, // VSQRTPSZ128mb = 19149 |
| 163364 | CEFBS_None, // VSQRTPSZ128mbk = 19150 |
| 163365 | CEFBS_None, // VSQRTPSZ128mbkz = 19151 |
| 163366 | CEFBS_None, // VSQRTPSZ128mk = 19152 |
| 163367 | CEFBS_None, // VSQRTPSZ128mkz = 19153 |
| 163368 | CEFBS_None, // VSQRTPSZ128r = 19154 |
| 163369 | CEFBS_None, // VSQRTPSZ128rk = 19155 |
| 163370 | CEFBS_None, // VSQRTPSZ128rkz = 19156 |
| 163371 | CEFBS_None, // VSQRTPSZ256m = 19157 |
| 163372 | CEFBS_None, // VSQRTPSZ256mb = 19158 |
| 163373 | CEFBS_None, // VSQRTPSZ256mbk = 19159 |
| 163374 | CEFBS_None, // VSQRTPSZ256mbkz = 19160 |
| 163375 | CEFBS_None, // VSQRTPSZ256mk = 19161 |
| 163376 | CEFBS_None, // VSQRTPSZ256mkz = 19162 |
| 163377 | CEFBS_None, // VSQRTPSZ256r = 19163 |
| 163378 | CEFBS_None, // VSQRTPSZ256rk = 19164 |
| 163379 | CEFBS_None, // VSQRTPSZ256rkz = 19165 |
| 163380 | CEFBS_None, // VSQRTPSZm = 19166 |
| 163381 | CEFBS_None, // VSQRTPSZmb = 19167 |
| 163382 | CEFBS_None, // VSQRTPSZmbk = 19168 |
| 163383 | CEFBS_None, // VSQRTPSZmbkz = 19169 |
| 163384 | CEFBS_None, // VSQRTPSZmk = 19170 |
| 163385 | CEFBS_None, // VSQRTPSZmkz = 19171 |
| 163386 | CEFBS_None, // VSQRTPSZr = 19172 |
| 163387 | CEFBS_None, // VSQRTPSZrb = 19173 |
| 163388 | CEFBS_None, // VSQRTPSZrbk = 19174 |
| 163389 | CEFBS_None, // VSQRTPSZrbkz = 19175 |
| 163390 | CEFBS_None, // VSQRTPSZrk = 19176 |
| 163391 | CEFBS_None, // VSQRTPSZrkz = 19177 |
| 163392 | CEFBS_None, // VSQRTPSm = 19178 |
| 163393 | CEFBS_None, // VSQRTPSr = 19179 |
| 163394 | CEFBS_None, // VSQRTSDZm = 19180 |
| 163395 | CEFBS_None, // VSQRTSDZm_Int = 19181 |
| 163396 | CEFBS_None, // VSQRTSDZm_Intk = 19182 |
| 163397 | CEFBS_None, // VSQRTSDZm_Intkz = 19183 |
| 163398 | CEFBS_None, // VSQRTSDZr = 19184 |
| 163399 | CEFBS_None, // VSQRTSDZr_Int = 19185 |
| 163400 | CEFBS_None, // VSQRTSDZr_Intk = 19186 |
| 163401 | CEFBS_None, // VSQRTSDZr_Intkz = 19187 |
| 163402 | CEFBS_None, // VSQRTSDZrb_Int = 19188 |
| 163403 | CEFBS_None, // VSQRTSDZrb_Intk = 19189 |
| 163404 | CEFBS_None, // VSQRTSDZrb_Intkz = 19190 |
| 163405 | CEFBS_None, // VSQRTSDm = 19191 |
| 163406 | CEFBS_None, // VSQRTSDm_Int = 19192 |
| 163407 | CEFBS_None, // VSQRTSDr = 19193 |
| 163408 | CEFBS_None, // VSQRTSDr_Int = 19194 |
| 163409 | CEFBS_None, // VSQRTSHZm = 19195 |
| 163410 | CEFBS_None, // VSQRTSHZm_Int = 19196 |
| 163411 | CEFBS_None, // VSQRTSHZm_Intk = 19197 |
| 163412 | CEFBS_None, // VSQRTSHZm_Intkz = 19198 |
| 163413 | CEFBS_None, // VSQRTSHZr = 19199 |
| 163414 | CEFBS_None, // VSQRTSHZr_Int = 19200 |
| 163415 | CEFBS_None, // VSQRTSHZr_Intk = 19201 |
| 163416 | CEFBS_None, // VSQRTSHZr_Intkz = 19202 |
| 163417 | CEFBS_None, // VSQRTSHZrb_Int = 19203 |
| 163418 | CEFBS_None, // VSQRTSHZrb_Intk = 19204 |
| 163419 | CEFBS_None, // VSQRTSHZrb_Intkz = 19205 |
| 163420 | CEFBS_None, // VSQRTSSZm = 19206 |
| 163421 | CEFBS_None, // VSQRTSSZm_Int = 19207 |
| 163422 | CEFBS_None, // VSQRTSSZm_Intk = 19208 |
| 163423 | CEFBS_None, // VSQRTSSZm_Intkz = 19209 |
| 163424 | CEFBS_None, // VSQRTSSZr = 19210 |
| 163425 | CEFBS_None, // VSQRTSSZr_Int = 19211 |
| 163426 | CEFBS_None, // VSQRTSSZr_Intk = 19212 |
| 163427 | CEFBS_None, // VSQRTSSZr_Intkz = 19213 |
| 163428 | CEFBS_None, // VSQRTSSZrb_Int = 19214 |
| 163429 | CEFBS_None, // VSQRTSSZrb_Intk = 19215 |
| 163430 | CEFBS_None, // VSQRTSSZrb_Intkz = 19216 |
| 163431 | CEFBS_None, // VSQRTSSm = 19217 |
| 163432 | CEFBS_None, // VSQRTSSm_Int = 19218 |
| 163433 | CEFBS_None, // VSQRTSSr = 19219 |
| 163434 | CEFBS_None, // VSQRTSSr_Int = 19220 |
| 163435 | CEFBS_None, // VSTMXCSR = 19221 |
| 163436 | CEFBS_None, // VSUBPDYrm = 19222 |
| 163437 | CEFBS_None, // VSUBPDYrr = 19223 |
| 163438 | CEFBS_None, // VSUBPDZ128rm = 19224 |
| 163439 | CEFBS_None, // VSUBPDZ128rmb = 19225 |
| 163440 | CEFBS_None, // VSUBPDZ128rmbk = 19226 |
| 163441 | CEFBS_None, // VSUBPDZ128rmbkz = 19227 |
| 163442 | CEFBS_None, // VSUBPDZ128rmk = 19228 |
| 163443 | CEFBS_None, // VSUBPDZ128rmkz = 19229 |
| 163444 | CEFBS_None, // VSUBPDZ128rr = 19230 |
| 163445 | CEFBS_None, // VSUBPDZ128rrk = 19231 |
| 163446 | CEFBS_None, // VSUBPDZ128rrkz = 19232 |
| 163447 | CEFBS_None, // VSUBPDZ256rm = 19233 |
| 163448 | CEFBS_None, // VSUBPDZ256rmb = 19234 |
| 163449 | CEFBS_None, // VSUBPDZ256rmbk = 19235 |
| 163450 | CEFBS_None, // VSUBPDZ256rmbkz = 19236 |
| 163451 | CEFBS_None, // VSUBPDZ256rmk = 19237 |
| 163452 | CEFBS_None, // VSUBPDZ256rmkz = 19238 |
| 163453 | CEFBS_None, // VSUBPDZ256rr = 19239 |
| 163454 | CEFBS_None, // VSUBPDZ256rrk = 19240 |
| 163455 | CEFBS_None, // VSUBPDZ256rrkz = 19241 |
| 163456 | CEFBS_None, // VSUBPDZrm = 19242 |
| 163457 | CEFBS_None, // VSUBPDZrmb = 19243 |
| 163458 | CEFBS_None, // VSUBPDZrmbk = 19244 |
| 163459 | CEFBS_None, // VSUBPDZrmbkz = 19245 |
| 163460 | CEFBS_None, // VSUBPDZrmk = 19246 |
| 163461 | CEFBS_None, // VSUBPDZrmkz = 19247 |
| 163462 | CEFBS_None, // VSUBPDZrr = 19248 |
| 163463 | CEFBS_None, // VSUBPDZrrb = 19249 |
| 163464 | CEFBS_None, // VSUBPDZrrbk = 19250 |
| 163465 | CEFBS_None, // VSUBPDZrrbkz = 19251 |
| 163466 | CEFBS_None, // VSUBPDZrrk = 19252 |
| 163467 | CEFBS_None, // VSUBPDZrrkz = 19253 |
| 163468 | CEFBS_None, // VSUBPDrm = 19254 |
| 163469 | CEFBS_None, // VSUBPDrr = 19255 |
| 163470 | CEFBS_None, // VSUBPHZ128rm = 19256 |
| 163471 | CEFBS_None, // VSUBPHZ128rmb = 19257 |
| 163472 | CEFBS_None, // VSUBPHZ128rmbk = 19258 |
| 163473 | CEFBS_None, // VSUBPHZ128rmbkz = 19259 |
| 163474 | CEFBS_None, // VSUBPHZ128rmk = 19260 |
| 163475 | CEFBS_None, // VSUBPHZ128rmkz = 19261 |
| 163476 | CEFBS_None, // VSUBPHZ128rr = 19262 |
| 163477 | CEFBS_None, // VSUBPHZ128rrk = 19263 |
| 163478 | CEFBS_None, // VSUBPHZ128rrkz = 19264 |
| 163479 | CEFBS_None, // VSUBPHZ256rm = 19265 |
| 163480 | CEFBS_None, // VSUBPHZ256rmb = 19266 |
| 163481 | CEFBS_None, // VSUBPHZ256rmbk = 19267 |
| 163482 | CEFBS_None, // VSUBPHZ256rmbkz = 19268 |
| 163483 | CEFBS_None, // VSUBPHZ256rmk = 19269 |
| 163484 | CEFBS_None, // VSUBPHZ256rmkz = 19270 |
| 163485 | CEFBS_None, // VSUBPHZ256rr = 19271 |
| 163486 | CEFBS_None, // VSUBPHZ256rrk = 19272 |
| 163487 | CEFBS_None, // VSUBPHZ256rrkz = 19273 |
| 163488 | CEFBS_None, // VSUBPHZrm = 19274 |
| 163489 | CEFBS_None, // VSUBPHZrmb = 19275 |
| 163490 | CEFBS_None, // VSUBPHZrmbk = 19276 |
| 163491 | CEFBS_None, // VSUBPHZrmbkz = 19277 |
| 163492 | CEFBS_None, // VSUBPHZrmk = 19278 |
| 163493 | CEFBS_None, // VSUBPHZrmkz = 19279 |
| 163494 | CEFBS_None, // VSUBPHZrr = 19280 |
| 163495 | CEFBS_None, // VSUBPHZrrb = 19281 |
| 163496 | CEFBS_None, // VSUBPHZrrbk = 19282 |
| 163497 | CEFBS_None, // VSUBPHZrrbkz = 19283 |
| 163498 | CEFBS_None, // VSUBPHZrrk = 19284 |
| 163499 | CEFBS_None, // VSUBPHZrrkz = 19285 |
| 163500 | CEFBS_None, // VSUBPSYrm = 19286 |
| 163501 | CEFBS_None, // VSUBPSYrr = 19287 |
| 163502 | CEFBS_None, // VSUBPSZ128rm = 19288 |
| 163503 | CEFBS_None, // VSUBPSZ128rmb = 19289 |
| 163504 | CEFBS_None, // VSUBPSZ128rmbk = 19290 |
| 163505 | CEFBS_None, // VSUBPSZ128rmbkz = 19291 |
| 163506 | CEFBS_None, // VSUBPSZ128rmk = 19292 |
| 163507 | CEFBS_None, // VSUBPSZ128rmkz = 19293 |
| 163508 | CEFBS_None, // VSUBPSZ128rr = 19294 |
| 163509 | CEFBS_None, // VSUBPSZ128rrk = 19295 |
| 163510 | CEFBS_None, // VSUBPSZ128rrkz = 19296 |
| 163511 | CEFBS_None, // VSUBPSZ256rm = 19297 |
| 163512 | CEFBS_None, // VSUBPSZ256rmb = 19298 |
| 163513 | CEFBS_None, // VSUBPSZ256rmbk = 19299 |
| 163514 | CEFBS_None, // VSUBPSZ256rmbkz = 19300 |
| 163515 | CEFBS_None, // VSUBPSZ256rmk = 19301 |
| 163516 | CEFBS_None, // VSUBPSZ256rmkz = 19302 |
| 163517 | CEFBS_None, // VSUBPSZ256rr = 19303 |
| 163518 | CEFBS_None, // VSUBPSZ256rrk = 19304 |
| 163519 | CEFBS_None, // VSUBPSZ256rrkz = 19305 |
| 163520 | CEFBS_None, // VSUBPSZrm = 19306 |
| 163521 | CEFBS_None, // VSUBPSZrmb = 19307 |
| 163522 | CEFBS_None, // VSUBPSZrmbk = 19308 |
| 163523 | CEFBS_None, // VSUBPSZrmbkz = 19309 |
| 163524 | CEFBS_None, // VSUBPSZrmk = 19310 |
| 163525 | CEFBS_None, // VSUBPSZrmkz = 19311 |
| 163526 | CEFBS_None, // VSUBPSZrr = 19312 |
| 163527 | CEFBS_None, // VSUBPSZrrb = 19313 |
| 163528 | CEFBS_None, // VSUBPSZrrbk = 19314 |
| 163529 | CEFBS_None, // VSUBPSZrrbkz = 19315 |
| 163530 | CEFBS_None, // VSUBPSZrrk = 19316 |
| 163531 | CEFBS_None, // VSUBPSZrrkz = 19317 |
| 163532 | CEFBS_None, // VSUBPSrm = 19318 |
| 163533 | CEFBS_None, // VSUBPSrr = 19319 |
| 163534 | CEFBS_None, // VSUBSDZrm = 19320 |
| 163535 | CEFBS_None, // VSUBSDZrm_Int = 19321 |
| 163536 | CEFBS_None, // VSUBSDZrm_Intk = 19322 |
| 163537 | CEFBS_None, // VSUBSDZrm_Intkz = 19323 |
| 163538 | CEFBS_None, // VSUBSDZrr = 19324 |
| 163539 | CEFBS_None, // VSUBSDZrr_Int = 19325 |
| 163540 | CEFBS_None, // VSUBSDZrr_Intk = 19326 |
| 163541 | CEFBS_None, // VSUBSDZrr_Intkz = 19327 |
| 163542 | CEFBS_None, // VSUBSDZrrb_Int = 19328 |
| 163543 | CEFBS_None, // VSUBSDZrrb_Intk = 19329 |
| 163544 | CEFBS_None, // VSUBSDZrrb_Intkz = 19330 |
| 163545 | CEFBS_None, // VSUBSDrm = 19331 |
| 163546 | CEFBS_None, // VSUBSDrm_Int = 19332 |
| 163547 | CEFBS_None, // VSUBSDrr = 19333 |
| 163548 | CEFBS_None, // VSUBSDrr_Int = 19334 |
| 163549 | CEFBS_None, // VSUBSHZrm = 19335 |
| 163550 | CEFBS_None, // VSUBSHZrm_Int = 19336 |
| 163551 | CEFBS_None, // VSUBSHZrm_Intk = 19337 |
| 163552 | CEFBS_None, // VSUBSHZrm_Intkz = 19338 |
| 163553 | CEFBS_None, // VSUBSHZrr = 19339 |
| 163554 | CEFBS_None, // VSUBSHZrr_Int = 19340 |
| 163555 | CEFBS_None, // VSUBSHZrr_Intk = 19341 |
| 163556 | CEFBS_None, // VSUBSHZrr_Intkz = 19342 |
| 163557 | CEFBS_None, // VSUBSHZrrb_Int = 19343 |
| 163558 | CEFBS_None, // VSUBSHZrrb_Intk = 19344 |
| 163559 | CEFBS_None, // VSUBSHZrrb_Intkz = 19345 |
| 163560 | CEFBS_None, // VSUBSSZrm = 19346 |
| 163561 | CEFBS_None, // VSUBSSZrm_Int = 19347 |
| 163562 | CEFBS_None, // VSUBSSZrm_Intk = 19348 |
| 163563 | CEFBS_None, // VSUBSSZrm_Intkz = 19349 |
| 163564 | CEFBS_None, // VSUBSSZrr = 19350 |
| 163565 | CEFBS_None, // VSUBSSZrr_Int = 19351 |
| 163566 | CEFBS_None, // VSUBSSZrr_Intk = 19352 |
| 163567 | CEFBS_None, // VSUBSSZrr_Intkz = 19353 |
| 163568 | CEFBS_None, // VSUBSSZrrb_Int = 19354 |
| 163569 | CEFBS_None, // VSUBSSZrrb_Intk = 19355 |
| 163570 | CEFBS_None, // VSUBSSZrrb_Intkz = 19356 |
| 163571 | CEFBS_None, // VSUBSSrm = 19357 |
| 163572 | CEFBS_None, // VSUBSSrm_Int = 19358 |
| 163573 | CEFBS_None, // VSUBSSrr = 19359 |
| 163574 | CEFBS_None, // VSUBSSrr_Int = 19360 |
| 163575 | CEFBS_None, // VTESTPDYrm = 19361 |
| 163576 | CEFBS_None, // VTESTPDYrr = 19362 |
| 163577 | CEFBS_None, // VTESTPDrm = 19363 |
| 163578 | CEFBS_None, // VTESTPDrr = 19364 |
| 163579 | CEFBS_None, // VTESTPSYrm = 19365 |
| 163580 | CEFBS_None, // VTESTPSYrr = 19366 |
| 163581 | CEFBS_None, // VTESTPSrm = 19367 |
| 163582 | CEFBS_None, // VTESTPSrr = 19368 |
| 163583 | CEFBS_None, // VUCOMISDZrm = 19369 |
| 163584 | CEFBS_None, // VUCOMISDZrm_Int = 19370 |
| 163585 | CEFBS_None, // VUCOMISDZrr = 19371 |
| 163586 | CEFBS_None, // VUCOMISDZrr_Int = 19372 |
| 163587 | CEFBS_None, // VUCOMISDZrrb = 19373 |
| 163588 | CEFBS_None, // VUCOMISDrm = 19374 |
| 163589 | CEFBS_None, // VUCOMISDrm_Int = 19375 |
| 163590 | CEFBS_None, // VUCOMISDrr = 19376 |
| 163591 | CEFBS_None, // VUCOMISDrr_Int = 19377 |
| 163592 | CEFBS_None, // VUCOMISHZrm = 19378 |
| 163593 | CEFBS_None, // VUCOMISHZrm_Int = 19379 |
| 163594 | CEFBS_None, // VUCOMISHZrr = 19380 |
| 163595 | CEFBS_None, // VUCOMISHZrr_Int = 19381 |
| 163596 | CEFBS_None, // VUCOMISHZrrb = 19382 |
| 163597 | CEFBS_None, // VUCOMISSZrm = 19383 |
| 163598 | CEFBS_None, // VUCOMISSZrm_Int = 19384 |
| 163599 | CEFBS_None, // VUCOMISSZrr = 19385 |
| 163600 | CEFBS_None, // VUCOMISSZrr_Int = 19386 |
| 163601 | CEFBS_None, // VUCOMISSZrrb = 19387 |
| 163602 | CEFBS_None, // VUCOMISSrm = 19388 |
| 163603 | CEFBS_None, // VUCOMISSrm_Int = 19389 |
| 163604 | CEFBS_None, // VUCOMISSrr = 19390 |
| 163605 | CEFBS_None, // VUCOMISSrr_Int = 19391 |
| 163606 | CEFBS_None, // VUNPCKHPDYrm = 19392 |
| 163607 | CEFBS_None, // VUNPCKHPDYrr = 19393 |
| 163608 | CEFBS_None, // VUNPCKHPDZ128rm = 19394 |
| 163609 | CEFBS_None, // VUNPCKHPDZ128rmb = 19395 |
| 163610 | CEFBS_None, // VUNPCKHPDZ128rmbk = 19396 |
| 163611 | CEFBS_None, // VUNPCKHPDZ128rmbkz = 19397 |
| 163612 | CEFBS_None, // VUNPCKHPDZ128rmk = 19398 |
| 163613 | CEFBS_None, // VUNPCKHPDZ128rmkz = 19399 |
| 163614 | CEFBS_None, // VUNPCKHPDZ128rr = 19400 |
| 163615 | CEFBS_None, // VUNPCKHPDZ128rrk = 19401 |
| 163616 | CEFBS_None, // VUNPCKHPDZ128rrkz = 19402 |
| 163617 | CEFBS_None, // VUNPCKHPDZ256rm = 19403 |
| 163618 | CEFBS_None, // VUNPCKHPDZ256rmb = 19404 |
| 163619 | CEFBS_None, // VUNPCKHPDZ256rmbk = 19405 |
| 163620 | CEFBS_None, // VUNPCKHPDZ256rmbkz = 19406 |
| 163621 | CEFBS_None, // VUNPCKHPDZ256rmk = 19407 |
| 163622 | CEFBS_None, // VUNPCKHPDZ256rmkz = 19408 |
| 163623 | CEFBS_None, // VUNPCKHPDZ256rr = 19409 |
| 163624 | CEFBS_None, // VUNPCKHPDZ256rrk = 19410 |
| 163625 | CEFBS_None, // VUNPCKHPDZ256rrkz = 19411 |
| 163626 | CEFBS_None, // VUNPCKHPDZrm = 19412 |
| 163627 | CEFBS_None, // VUNPCKHPDZrmb = 19413 |
| 163628 | CEFBS_None, // VUNPCKHPDZrmbk = 19414 |
| 163629 | CEFBS_None, // VUNPCKHPDZrmbkz = 19415 |
| 163630 | CEFBS_None, // VUNPCKHPDZrmk = 19416 |
| 163631 | CEFBS_None, // VUNPCKHPDZrmkz = 19417 |
| 163632 | CEFBS_None, // VUNPCKHPDZrr = 19418 |
| 163633 | CEFBS_None, // VUNPCKHPDZrrk = 19419 |
| 163634 | CEFBS_None, // VUNPCKHPDZrrkz = 19420 |
| 163635 | CEFBS_None, // VUNPCKHPDrm = 19421 |
| 163636 | CEFBS_None, // VUNPCKHPDrr = 19422 |
| 163637 | CEFBS_None, // VUNPCKHPSYrm = 19423 |
| 163638 | CEFBS_None, // VUNPCKHPSYrr = 19424 |
| 163639 | CEFBS_None, // VUNPCKHPSZ128rm = 19425 |
| 163640 | CEFBS_None, // VUNPCKHPSZ128rmb = 19426 |
| 163641 | CEFBS_None, // VUNPCKHPSZ128rmbk = 19427 |
| 163642 | CEFBS_None, // VUNPCKHPSZ128rmbkz = 19428 |
| 163643 | CEFBS_None, // VUNPCKHPSZ128rmk = 19429 |
| 163644 | CEFBS_None, // VUNPCKHPSZ128rmkz = 19430 |
| 163645 | CEFBS_None, // VUNPCKHPSZ128rr = 19431 |
| 163646 | CEFBS_None, // VUNPCKHPSZ128rrk = 19432 |
| 163647 | CEFBS_None, // VUNPCKHPSZ128rrkz = 19433 |
| 163648 | CEFBS_None, // VUNPCKHPSZ256rm = 19434 |
| 163649 | CEFBS_None, // VUNPCKHPSZ256rmb = 19435 |
| 163650 | CEFBS_None, // VUNPCKHPSZ256rmbk = 19436 |
| 163651 | CEFBS_None, // VUNPCKHPSZ256rmbkz = 19437 |
| 163652 | CEFBS_None, // VUNPCKHPSZ256rmk = 19438 |
| 163653 | CEFBS_None, // VUNPCKHPSZ256rmkz = 19439 |
| 163654 | CEFBS_None, // VUNPCKHPSZ256rr = 19440 |
| 163655 | CEFBS_None, // VUNPCKHPSZ256rrk = 19441 |
| 163656 | CEFBS_None, // VUNPCKHPSZ256rrkz = 19442 |
| 163657 | CEFBS_None, // VUNPCKHPSZrm = 19443 |
| 163658 | CEFBS_None, // VUNPCKHPSZrmb = 19444 |
| 163659 | CEFBS_None, // VUNPCKHPSZrmbk = 19445 |
| 163660 | CEFBS_None, // VUNPCKHPSZrmbkz = 19446 |
| 163661 | CEFBS_None, // VUNPCKHPSZrmk = 19447 |
| 163662 | CEFBS_None, // VUNPCKHPSZrmkz = 19448 |
| 163663 | CEFBS_None, // VUNPCKHPSZrr = 19449 |
| 163664 | CEFBS_None, // VUNPCKHPSZrrk = 19450 |
| 163665 | CEFBS_None, // VUNPCKHPSZrrkz = 19451 |
| 163666 | CEFBS_None, // VUNPCKHPSrm = 19452 |
| 163667 | CEFBS_None, // VUNPCKHPSrr = 19453 |
| 163668 | CEFBS_None, // VUNPCKLPDYrm = 19454 |
| 163669 | CEFBS_None, // VUNPCKLPDYrr = 19455 |
| 163670 | CEFBS_None, // VUNPCKLPDZ128rm = 19456 |
| 163671 | CEFBS_None, // VUNPCKLPDZ128rmb = 19457 |
| 163672 | CEFBS_None, // VUNPCKLPDZ128rmbk = 19458 |
| 163673 | CEFBS_None, // VUNPCKLPDZ128rmbkz = 19459 |
| 163674 | CEFBS_None, // VUNPCKLPDZ128rmk = 19460 |
| 163675 | CEFBS_None, // VUNPCKLPDZ128rmkz = 19461 |
| 163676 | CEFBS_None, // VUNPCKLPDZ128rr = 19462 |
| 163677 | CEFBS_None, // VUNPCKLPDZ128rrk = 19463 |
| 163678 | CEFBS_None, // VUNPCKLPDZ128rrkz = 19464 |
| 163679 | CEFBS_None, // VUNPCKLPDZ256rm = 19465 |
| 163680 | CEFBS_None, // VUNPCKLPDZ256rmb = 19466 |
| 163681 | CEFBS_None, // VUNPCKLPDZ256rmbk = 19467 |
| 163682 | CEFBS_None, // VUNPCKLPDZ256rmbkz = 19468 |
| 163683 | CEFBS_None, // VUNPCKLPDZ256rmk = 19469 |
| 163684 | CEFBS_None, // VUNPCKLPDZ256rmkz = 19470 |
| 163685 | CEFBS_None, // VUNPCKLPDZ256rr = 19471 |
| 163686 | CEFBS_None, // VUNPCKLPDZ256rrk = 19472 |
| 163687 | CEFBS_None, // VUNPCKLPDZ256rrkz = 19473 |
| 163688 | CEFBS_None, // VUNPCKLPDZrm = 19474 |
| 163689 | CEFBS_None, // VUNPCKLPDZrmb = 19475 |
| 163690 | CEFBS_None, // VUNPCKLPDZrmbk = 19476 |
| 163691 | CEFBS_None, // VUNPCKLPDZrmbkz = 19477 |
| 163692 | CEFBS_None, // VUNPCKLPDZrmk = 19478 |
| 163693 | CEFBS_None, // VUNPCKLPDZrmkz = 19479 |
| 163694 | CEFBS_None, // VUNPCKLPDZrr = 19480 |
| 163695 | CEFBS_None, // VUNPCKLPDZrrk = 19481 |
| 163696 | CEFBS_None, // VUNPCKLPDZrrkz = 19482 |
| 163697 | CEFBS_None, // VUNPCKLPDrm = 19483 |
| 163698 | CEFBS_None, // VUNPCKLPDrr = 19484 |
| 163699 | CEFBS_None, // VUNPCKLPSYrm = 19485 |
| 163700 | CEFBS_None, // VUNPCKLPSYrr = 19486 |
| 163701 | CEFBS_None, // VUNPCKLPSZ128rm = 19487 |
| 163702 | CEFBS_None, // VUNPCKLPSZ128rmb = 19488 |
| 163703 | CEFBS_None, // VUNPCKLPSZ128rmbk = 19489 |
| 163704 | CEFBS_None, // VUNPCKLPSZ128rmbkz = 19490 |
| 163705 | CEFBS_None, // VUNPCKLPSZ128rmk = 19491 |
| 163706 | CEFBS_None, // VUNPCKLPSZ128rmkz = 19492 |
| 163707 | CEFBS_None, // VUNPCKLPSZ128rr = 19493 |
| 163708 | CEFBS_None, // VUNPCKLPSZ128rrk = 19494 |
| 163709 | CEFBS_None, // VUNPCKLPSZ128rrkz = 19495 |
| 163710 | CEFBS_None, // VUNPCKLPSZ256rm = 19496 |
| 163711 | CEFBS_None, // VUNPCKLPSZ256rmb = 19497 |
| 163712 | CEFBS_None, // VUNPCKLPSZ256rmbk = 19498 |
| 163713 | CEFBS_None, // VUNPCKLPSZ256rmbkz = 19499 |
| 163714 | CEFBS_None, // VUNPCKLPSZ256rmk = 19500 |
| 163715 | CEFBS_None, // VUNPCKLPSZ256rmkz = 19501 |
| 163716 | CEFBS_None, // VUNPCKLPSZ256rr = 19502 |
| 163717 | CEFBS_None, // VUNPCKLPSZ256rrk = 19503 |
| 163718 | CEFBS_None, // VUNPCKLPSZ256rrkz = 19504 |
| 163719 | CEFBS_None, // VUNPCKLPSZrm = 19505 |
| 163720 | CEFBS_None, // VUNPCKLPSZrmb = 19506 |
| 163721 | CEFBS_None, // VUNPCKLPSZrmbk = 19507 |
| 163722 | CEFBS_None, // VUNPCKLPSZrmbkz = 19508 |
| 163723 | CEFBS_None, // VUNPCKLPSZrmk = 19509 |
| 163724 | CEFBS_None, // VUNPCKLPSZrmkz = 19510 |
| 163725 | CEFBS_None, // VUNPCKLPSZrr = 19511 |
| 163726 | CEFBS_None, // VUNPCKLPSZrrk = 19512 |
| 163727 | CEFBS_None, // VUNPCKLPSZrrkz = 19513 |
| 163728 | CEFBS_None, // VUNPCKLPSrm = 19514 |
| 163729 | CEFBS_None, // VUNPCKLPSrr = 19515 |
| 163730 | CEFBS_None, // VXORPDYrm = 19516 |
| 163731 | CEFBS_None, // VXORPDYrr = 19517 |
| 163732 | CEFBS_None, // VXORPDZ128rm = 19518 |
| 163733 | CEFBS_None, // VXORPDZ128rmb = 19519 |
| 163734 | CEFBS_None, // VXORPDZ128rmbk = 19520 |
| 163735 | CEFBS_None, // VXORPDZ128rmbkz = 19521 |
| 163736 | CEFBS_None, // VXORPDZ128rmk = 19522 |
| 163737 | CEFBS_None, // VXORPDZ128rmkz = 19523 |
| 163738 | CEFBS_None, // VXORPDZ128rr = 19524 |
| 163739 | CEFBS_None, // VXORPDZ128rrk = 19525 |
| 163740 | CEFBS_None, // VXORPDZ128rrkz = 19526 |
| 163741 | CEFBS_None, // VXORPDZ256rm = 19527 |
| 163742 | CEFBS_None, // VXORPDZ256rmb = 19528 |
| 163743 | CEFBS_None, // VXORPDZ256rmbk = 19529 |
| 163744 | CEFBS_None, // VXORPDZ256rmbkz = 19530 |
| 163745 | CEFBS_None, // VXORPDZ256rmk = 19531 |
| 163746 | CEFBS_None, // VXORPDZ256rmkz = 19532 |
| 163747 | CEFBS_None, // VXORPDZ256rr = 19533 |
| 163748 | CEFBS_None, // VXORPDZ256rrk = 19534 |
| 163749 | CEFBS_None, // VXORPDZ256rrkz = 19535 |
| 163750 | CEFBS_None, // VXORPDZrm = 19536 |
| 163751 | CEFBS_None, // VXORPDZrmb = 19537 |
| 163752 | CEFBS_None, // VXORPDZrmbk = 19538 |
| 163753 | CEFBS_None, // VXORPDZrmbkz = 19539 |
| 163754 | CEFBS_None, // VXORPDZrmk = 19540 |
| 163755 | CEFBS_None, // VXORPDZrmkz = 19541 |
| 163756 | CEFBS_None, // VXORPDZrr = 19542 |
| 163757 | CEFBS_None, // VXORPDZrrk = 19543 |
| 163758 | CEFBS_None, // VXORPDZrrkz = 19544 |
| 163759 | CEFBS_None, // VXORPDrm = 19545 |
| 163760 | CEFBS_None, // VXORPDrr = 19546 |
| 163761 | CEFBS_None, // VXORPSYrm = 19547 |
| 163762 | CEFBS_None, // VXORPSYrr = 19548 |
| 163763 | CEFBS_None, // VXORPSZ128rm = 19549 |
| 163764 | CEFBS_None, // VXORPSZ128rmb = 19550 |
| 163765 | CEFBS_None, // VXORPSZ128rmbk = 19551 |
| 163766 | CEFBS_None, // VXORPSZ128rmbkz = 19552 |
| 163767 | CEFBS_None, // VXORPSZ128rmk = 19553 |
| 163768 | CEFBS_None, // VXORPSZ128rmkz = 19554 |
| 163769 | CEFBS_None, // VXORPSZ128rr = 19555 |
| 163770 | CEFBS_None, // VXORPSZ128rrk = 19556 |
| 163771 | CEFBS_None, // VXORPSZ128rrkz = 19557 |
| 163772 | CEFBS_None, // VXORPSZ256rm = 19558 |
| 163773 | CEFBS_None, // VXORPSZ256rmb = 19559 |
| 163774 | CEFBS_None, // VXORPSZ256rmbk = 19560 |
| 163775 | CEFBS_None, // VXORPSZ256rmbkz = 19561 |
| 163776 | CEFBS_None, // VXORPSZ256rmk = 19562 |
| 163777 | CEFBS_None, // VXORPSZ256rmkz = 19563 |
| 163778 | CEFBS_None, // VXORPSZ256rr = 19564 |
| 163779 | CEFBS_None, // VXORPSZ256rrk = 19565 |
| 163780 | CEFBS_None, // VXORPSZ256rrkz = 19566 |
| 163781 | CEFBS_None, // VXORPSZrm = 19567 |
| 163782 | CEFBS_None, // VXORPSZrmb = 19568 |
| 163783 | CEFBS_None, // VXORPSZrmbk = 19569 |
| 163784 | CEFBS_None, // VXORPSZrmbkz = 19570 |
| 163785 | CEFBS_None, // VXORPSZrmk = 19571 |
| 163786 | CEFBS_None, // VXORPSZrmkz = 19572 |
| 163787 | CEFBS_None, // VXORPSZrr = 19573 |
| 163788 | CEFBS_None, // VXORPSZrrk = 19574 |
| 163789 | CEFBS_None, // VXORPSZrrkz = 19575 |
| 163790 | CEFBS_None, // VXORPSrm = 19576 |
| 163791 | CEFBS_None, // VXORPSrr = 19577 |
| 163792 | CEFBS_None, // VZEROALL = 19578 |
| 163793 | CEFBS_None, // VZEROUPPER = 19579 |
| 163794 | CEFBS_None, // WAIT = 19580 |
| 163795 | CEFBS_None, // WBINVD = 19581 |
| 163796 | CEFBS_None, // WBNOINVD = 19582 |
| 163797 | CEFBS_In64BitMode, // WRFSBASE = 19583 |
| 163798 | CEFBS_In64BitMode, // WRFSBASE64 = 19584 |
| 163799 | CEFBS_In64BitMode, // WRGSBASE = 19585 |
| 163800 | CEFBS_In64BitMode, // WRGSBASE64 = 19586 |
| 163801 | CEFBS_None, // WRMSR = 19587 |
| 163802 | CEFBS_In64BitMode, // WRMSRLIST = 19588 |
| 163803 | CEFBS_None, // WRMSRNS = 19589 |
| 163804 | CEFBS_None, // WRPKRUr = 19590 |
| 163805 | CEFBS_None, // WRSSD = 19591 |
| 163806 | CEFBS_In64BitMode, // WRSSD_EVEX = 19592 |
| 163807 | CEFBS_None, // WRSSQ = 19593 |
| 163808 | CEFBS_In64BitMode, // WRSSQ_EVEX = 19594 |
| 163809 | CEFBS_None, // WRUSSD = 19595 |
| 163810 | CEFBS_In64BitMode, // WRUSSD_EVEX = 19596 |
| 163811 | CEFBS_None, // WRUSSQ = 19597 |
| 163812 | CEFBS_In64BitMode, // WRUSSQ_EVEX = 19598 |
| 163813 | CEFBS_None, // XABORT = 19599 |
| 163814 | CEFBS_None, // XACQUIRE_PREFIX = 19600 |
| 163815 | CEFBS_None, // XADD16rm = 19601 |
| 163816 | CEFBS_None, // XADD16rr = 19602 |
| 163817 | CEFBS_None, // XADD32rm = 19603 |
| 163818 | CEFBS_None, // XADD32rr = 19604 |
| 163819 | CEFBS_None, // XADD64rm = 19605 |
| 163820 | CEFBS_None, // XADD64rr = 19606 |
| 163821 | CEFBS_None, // XADD8rm = 19607 |
| 163822 | CEFBS_None, // XADD8rr = 19608 |
| 163823 | CEFBS_None, // XAM_F = 19609 |
| 163824 | CEFBS_None, // XAM_Fp32 = 19610 |
| 163825 | CEFBS_None, // XAM_Fp64 = 19611 |
| 163826 | CEFBS_None, // XAM_Fp80 = 19612 |
| 163827 | CEFBS_None, // XBEGIN = 19613 |
| 163828 | CEFBS_None, // XBEGIN_2 = 19614 |
| 163829 | CEFBS_None, // XBEGIN_4 = 19615 |
| 163830 | CEFBS_None, // XCHG16ar = 19616 |
| 163831 | CEFBS_None, // XCHG16rm = 19617 |
| 163832 | CEFBS_None, // XCHG16rr = 19618 |
| 163833 | CEFBS_None, // XCHG32ar = 19619 |
| 163834 | CEFBS_None, // XCHG32rm = 19620 |
| 163835 | CEFBS_None, // XCHG32rr = 19621 |
| 163836 | CEFBS_None, // XCHG64ar = 19622 |
| 163837 | CEFBS_None, // XCHG64rm = 19623 |
| 163838 | CEFBS_None, // XCHG64rr = 19624 |
| 163839 | CEFBS_None, // XCHG8rm = 19625 |
| 163840 | CEFBS_None, // XCHG8rr = 19626 |
| 163841 | CEFBS_None, // XCH_F = 19627 |
| 163842 | CEFBS_None, // XCRYPTCBC = 19628 |
| 163843 | CEFBS_None, // XCRYPTCFB = 19629 |
| 163844 | CEFBS_None, // XCRYPTCTR = 19630 |
| 163845 | CEFBS_None, // XCRYPTECB = 19631 |
| 163846 | CEFBS_None, // XCRYPTOFB = 19632 |
| 163847 | CEFBS_None, // XEND = 19633 |
| 163848 | CEFBS_None, // XGETBV = 19634 |
| 163849 | CEFBS_None, // XLAT = 19635 |
| 163850 | CEFBS_None, // XOR16i16 = 19636 |
| 163851 | CEFBS_None, // XOR16mi = 19637 |
| 163852 | CEFBS_None, // XOR16mi8 = 19638 |
| 163853 | CEFBS_In64BitMode, // XOR16mi8_EVEX = 19639 |
| 163854 | CEFBS_In64BitMode, // XOR16mi8_ND = 19640 |
| 163855 | CEFBS_In64BitMode, // XOR16mi8_NF = 19641 |
| 163856 | CEFBS_In64BitMode, // XOR16mi8_NF_ND = 19642 |
| 163857 | CEFBS_In64BitMode, // XOR16mi_EVEX = 19643 |
| 163858 | CEFBS_In64BitMode, // XOR16mi_ND = 19644 |
| 163859 | CEFBS_In64BitMode, // XOR16mi_NF = 19645 |
| 163860 | CEFBS_In64BitMode, // XOR16mi_NF_ND = 19646 |
| 163861 | CEFBS_None, // XOR16mr = 19647 |
| 163862 | CEFBS_In64BitMode, // XOR16mr_EVEX = 19648 |
| 163863 | CEFBS_In64BitMode, // XOR16mr_ND = 19649 |
| 163864 | CEFBS_In64BitMode, // XOR16mr_NF = 19650 |
| 163865 | CEFBS_In64BitMode, // XOR16mr_NF_ND = 19651 |
| 163866 | CEFBS_None, // XOR16ri = 19652 |
| 163867 | CEFBS_None, // XOR16ri8 = 19653 |
| 163868 | CEFBS_In64BitMode, // XOR16ri8_EVEX = 19654 |
| 163869 | CEFBS_In64BitMode, // XOR16ri8_ND = 19655 |
| 163870 | CEFBS_In64BitMode, // XOR16ri8_NF = 19656 |
| 163871 | CEFBS_In64BitMode, // XOR16ri8_NF_ND = 19657 |
| 163872 | CEFBS_In64BitMode, // XOR16ri_EVEX = 19658 |
| 163873 | CEFBS_In64BitMode, // XOR16ri_ND = 19659 |
| 163874 | CEFBS_In64BitMode, // XOR16ri_NF = 19660 |
| 163875 | CEFBS_In64BitMode, // XOR16ri_NF_ND = 19661 |
| 163876 | CEFBS_None, // XOR16rm = 19662 |
| 163877 | CEFBS_In64BitMode, // XOR16rm_EVEX = 19663 |
| 163878 | CEFBS_In64BitMode, // XOR16rm_ND = 19664 |
| 163879 | CEFBS_In64BitMode, // XOR16rm_NF = 19665 |
| 163880 | CEFBS_In64BitMode, // XOR16rm_NF_ND = 19666 |
| 163881 | CEFBS_None, // XOR16rr = 19667 |
| 163882 | CEFBS_In64BitMode, // XOR16rr_EVEX = 19668 |
| 163883 | CEFBS_In64BitMode, // XOR16rr_EVEX_REV = 19669 |
| 163884 | CEFBS_In64BitMode, // XOR16rr_ND = 19670 |
| 163885 | CEFBS_In64BitMode, // XOR16rr_ND_REV = 19671 |
| 163886 | CEFBS_In64BitMode, // XOR16rr_NF = 19672 |
| 163887 | CEFBS_In64BitMode, // XOR16rr_NF_ND = 19673 |
| 163888 | CEFBS_In64BitMode, // XOR16rr_NF_ND_REV = 19674 |
| 163889 | CEFBS_In64BitMode, // XOR16rr_NF_REV = 19675 |
| 163890 | CEFBS_None, // XOR16rr_REV = 19676 |
| 163891 | CEFBS_None, // XOR32i32 = 19677 |
| 163892 | CEFBS_None, // XOR32mi = 19678 |
| 163893 | CEFBS_None, // XOR32mi8 = 19679 |
| 163894 | CEFBS_In64BitMode, // XOR32mi8_EVEX = 19680 |
| 163895 | CEFBS_In64BitMode, // XOR32mi8_ND = 19681 |
| 163896 | CEFBS_In64BitMode, // XOR32mi8_NF = 19682 |
| 163897 | CEFBS_In64BitMode, // XOR32mi8_NF_ND = 19683 |
| 163898 | CEFBS_In64BitMode, // XOR32mi_EVEX = 19684 |
| 163899 | CEFBS_In64BitMode, // XOR32mi_ND = 19685 |
| 163900 | CEFBS_In64BitMode, // XOR32mi_NF = 19686 |
| 163901 | CEFBS_In64BitMode, // XOR32mi_NF_ND = 19687 |
| 163902 | CEFBS_None, // XOR32mr = 19688 |
| 163903 | CEFBS_In64BitMode, // XOR32mr_EVEX = 19689 |
| 163904 | CEFBS_In64BitMode, // XOR32mr_ND = 19690 |
| 163905 | CEFBS_In64BitMode, // XOR32mr_NF = 19691 |
| 163906 | CEFBS_In64BitMode, // XOR32mr_NF_ND = 19692 |
| 163907 | CEFBS_None, // XOR32ri = 19693 |
| 163908 | CEFBS_None, // XOR32ri8 = 19694 |
| 163909 | CEFBS_In64BitMode, // XOR32ri8_EVEX = 19695 |
| 163910 | CEFBS_In64BitMode, // XOR32ri8_ND = 19696 |
| 163911 | CEFBS_In64BitMode, // XOR32ri8_NF = 19697 |
| 163912 | CEFBS_In64BitMode, // XOR32ri8_NF_ND = 19698 |
| 163913 | CEFBS_In64BitMode, // XOR32ri_EVEX = 19699 |
| 163914 | CEFBS_In64BitMode, // XOR32ri_ND = 19700 |
| 163915 | CEFBS_In64BitMode, // XOR32ri_NF = 19701 |
| 163916 | CEFBS_In64BitMode, // XOR32ri_NF_ND = 19702 |
| 163917 | CEFBS_None, // XOR32rm = 19703 |
| 163918 | CEFBS_In64BitMode, // XOR32rm_EVEX = 19704 |
| 163919 | CEFBS_In64BitMode, // XOR32rm_ND = 19705 |
| 163920 | CEFBS_In64BitMode, // XOR32rm_NF = 19706 |
| 163921 | CEFBS_In64BitMode, // XOR32rm_NF_ND = 19707 |
| 163922 | CEFBS_None, // XOR32rr = 19708 |
| 163923 | CEFBS_In64BitMode, // XOR32rr_EVEX = 19709 |
| 163924 | CEFBS_In64BitMode, // XOR32rr_EVEX_REV = 19710 |
| 163925 | CEFBS_In64BitMode, // XOR32rr_ND = 19711 |
| 163926 | CEFBS_In64BitMode, // XOR32rr_ND_REV = 19712 |
| 163927 | CEFBS_In64BitMode, // XOR32rr_NF = 19713 |
| 163928 | CEFBS_In64BitMode, // XOR32rr_NF_ND = 19714 |
| 163929 | CEFBS_In64BitMode, // XOR32rr_NF_ND_REV = 19715 |
| 163930 | CEFBS_In64BitMode, // XOR32rr_NF_REV = 19716 |
| 163931 | CEFBS_None, // XOR32rr_REV = 19717 |
| 163932 | CEFBS_None, // XOR64i32 = 19718 |
| 163933 | CEFBS_In64BitMode, // XOR64mi32 = 19719 |
| 163934 | CEFBS_In64BitMode, // XOR64mi32_EVEX = 19720 |
| 163935 | CEFBS_In64BitMode, // XOR64mi32_ND = 19721 |
| 163936 | CEFBS_In64BitMode, // XOR64mi32_NF = 19722 |
| 163937 | CEFBS_In64BitMode, // XOR64mi32_NF_ND = 19723 |
| 163938 | CEFBS_In64BitMode, // XOR64mi8 = 19724 |
| 163939 | CEFBS_In64BitMode, // XOR64mi8_EVEX = 19725 |
| 163940 | CEFBS_In64BitMode, // XOR64mi8_ND = 19726 |
| 163941 | CEFBS_In64BitMode, // XOR64mi8_NF = 19727 |
| 163942 | CEFBS_In64BitMode, // XOR64mi8_NF_ND = 19728 |
| 163943 | CEFBS_None, // XOR64mr = 19729 |
| 163944 | CEFBS_In64BitMode, // XOR64mr_EVEX = 19730 |
| 163945 | CEFBS_In64BitMode, // XOR64mr_ND = 19731 |
| 163946 | CEFBS_In64BitMode, // XOR64mr_NF = 19732 |
| 163947 | CEFBS_In64BitMode, // XOR64mr_NF_ND = 19733 |
| 163948 | CEFBS_None, // XOR64ri32 = 19734 |
| 163949 | CEFBS_In64BitMode, // XOR64ri32_EVEX = 19735 |
| 163950 | CEFBS_In64BitMode, // XOR64ri32_ND = 19736 |
| 163951 | CEFBS_In64BitMode, // XOR64ri32_NF = 19737 |
| 163952 | CEFBS_In64BitMode, // XOR64ri32_NF_ND = 19738 |
| 163953 | CEFBS_None, // XOR64ri8 = 19739 |
| 163954 | CEFBS_In64BitMode, // XOR64ri8_EVEX = 19740 |
| 163955 | CEFBS_In64BitMode, // XOR64ri8_ND = 19741 |
| 163956 | CEFBS_In64BitMode, // XOR64ri8_NF = 19742 |
| 163957 | CEFBS_In64BitMode, // XOR64ri8_NF_ND = 19743 |
| 163958 | CEFBS_None, // XOR64rm = 19744 |
| 163959 | CEFBS_In64BitMode, // XOR64rm_EVEX = 19745 |
| 163960 | CEFBS_In64BitMode, // XOR64rm_ND = 19746 |
| 163961 | CEFBS_In64BitMode, // XOR64rm_NF = 19747 |
| 163962 | CEFBS_In64BitMode, // XOR64rm_NF_ND = 19748 |
| 163963 | CEFBS_None, // XOR64rr = 19749 |
| 163964 | CEFBS_In64BitMode, // XOR64rr_EVEX = 19750 |
| 163965 | CEFBS_In64BitMode, // XOR64rr_EVEX_REV = 19751 |
| 163966 | CEFBS_In64BitMode, // XOR64rr_ND = 19752 |
| 163967 | CEFBS_In64BitMode, // XOR64rr_ND_REV = 19753 |
| 163968 | CEFBS_In64BitMode, // XOR64rr_NF = 19754 |
| 163969 | CEFBS_In64BitMode, // XOR64rr_NF_ND = 19755 |
| 163970 | CEFBS_In64BitMode, // XOR64rr_NF_ND_REV = 19756 |
| 163971 | CEFBS_In64BitMode, // XOR64rr_NF_REV = 19757 |
| 163972 | CEFBS_None, // XOR64rr_REV = 19758 |
| 163973 | CEFBS_None, // XOR8i8 = 19759 |
| 163974 | CEFBS_None, // XOR8mi = 19760 |
| 163975 | CEFBS_Not64BitMode, // XOR8mi8 = 19761 |
| 163976 | CEFBS_In64BitMode, // XOR8mi_EVEX = 19762 |
| 163977 | CEFBS_In64BitMode, // XOR8mi_ND = 19763 |
| 163978 | CEFBS_In64BitMode, // XOR8mi_NF = 19764 |
| 163979 | CEFBS_In64BitMode, // XOR8mi_NF_ND = 19765 |
| 163980 | CEFBS_None, // XOR8mr = 19766 |
| 163981 | CEFBS_In64BitMode, // XOR8mr_EVEX = 19767 |
| 163982 | CEFBS_In64BitMode, // XOR8mr_ND = 19768 |
| 163983 | CEFBS_In64BitMode, // XOR8mr_NF = 19769 |
| 163984 | CEFBS_In64BitMode, // XOR8mr_NF_ND = 19770 |
| 163985 | CEFBS_None, // XOR8ri = 19771 |
| 163986 | CEFBS_Not64BitMode, // XOR8ri8 = 19772 |
| 163987 | CEFBS_In64BitMode, // XOR8ri_EVEX = 19773 |
| 163988 | CEFBS_In64BitMode, // XOR8ri_ND = 19774 |
| 163989 | CEFBS_In64BitMode, // XOR8ri_NF = 19775 |
| 163990 | CEFBS_In64BitMode, // XOR8ri_NF_ND = 19776 |
| 163991 | CEFBS_None, // XOR8rm = 19777 |
| 163992 | CEFBS_In64BitMode, // XOR8rm_EVEX = 19778 |
| 163993 | CEFBS_In64BitMode, // XOR8rm_ND = 19779 |
| 163994 | CEFBS_In64BitMode, // XOR8rm_NF = 19780 |
| 163995 | CEFBS_In64BitMode, // XOR8rm_NF_ND = 19781 |
| 163996 | CEFBS_None, // XOR8rr = 19782 |
| 163997 | CEFBS_In64BitMode, // XOR8rr_EVEX = 19783 |
| 163998 | CEFBS_In64BitMode, // XOR8rr_EVEX_REV = 19784 |
| 163999 | CEFBS_In64BitMode, // XOR8rr_ND = 19785 |
| 164000 | CEFBS_In64BitMode, // XOR8rr_ND_REV = 19786 |
| 164001 | CEFBS_In64BitMode, // XOR8rr_NF = 19787 |
| 164002 | CEFBS_In64BitMode, // XOR8rr_NF_ND = 19788 |
| 164003 | CEFBS_In64BitMode, // XOR8rr_NF_ND_REV = 19789 |
| 164004 | CEFBS_In64BitMode, // XOR8rr_NF_REV = 19790 |
| 164005 | CEFBS_None, // XOR8rr_NOREX = 19791 |
| 164006 | CEFBS_None, // XOR8rr_REV = 19792 |
| 164007 | CEFBS_None, // XORPDrm = 19793 |
| 164008 | CEFBS_None, // XORPDrr = 19794 |
| 164009 | CEFBS_None, // XORPSrm = 19795 |
| 164010 | CEFBS_None, // XORPSrr = 19796 |
| 164011 | CEFBS_None, // XRELEASE_PREFIX = 19797 |
| 164012 | CEFBS_None, // XRESLDTRK = 19798 |
| 164013 | CEFBS_None, // XRSTOR = 19799 |
| 164014 | CEFBS_In64BitMode, // XRSTOR64 = 19800 |
| 164015 | CEFBS_None, // XRSTORS = 19801 |
| 164016 | CEFBS_In64BitMode, // XRSTORS64 = 19802 |
| 164017 | CEFBS_None, // XSAVE = 19803 |
| 164018 | CEFBS_In64BitMode, // XSAVE64 = 19804 |
| 164019 | CEFBS_None, // XSAVEC = 19805 |
| 164020 | CEFBS_In64BitMode, // XSAVEC64 = 19806 |
| 164021 | CEFBS_None, // XSAVEOPT = 19807 |
| 164022 | CEFBS_In64BitMode, // XSAVEOPT64 = 19808 |
| 164023 | CEFBS_None, // XSAVES = 19809 |
| 164024 | CEFBS_In64BitMode, // XSAVES64 = 19810 |
| 164025 | CEFBS_None, // XSETBV = 19811 |
| 164026 | CEFBS_None, // XSHA1 = 19812 |
| 164027 | CEFBS_None, // XSHA256 = 19813 |
| 164028 | CEFBS_None, // XSTORE = 19814 |
| 164029 | CEFBS_None, // XSUSLDTRK = 19815 |
| 164030 | CEFBS_None, // XTEST = 19816 |
| 164031 | }; |
| 164032 | |
| 164033 | assert(Opcode < 19817); |
| 164034 | return FeatureBitsets[RequiredFeaturesRefs[Opcode]]; |
| 164035 | } |
| 164036 | |
| 164037 | } // end namespace X86_MC |
| 164038 | } // end namespace llvm |
| 164039 | #endif // GET_COMPUTE_FEATURES |
| 164040 | |
| 164041 | #ifdef GET_AVAILABLE_OPCODE_CHECKER |
| 164042 | #undef GET_AVAILABLE_OPCODE_CHECKER |
| 164043 | namespace llvm { |
| 164044 | namespace X86_MC { |
| 164045 | bool isOpcodeAvailable(unsigned Opcode, const FeatureBitset &Features) { |
| 164046 | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
| 164047 | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
| 164048 | FeatureBitset MissingFeatures = |
| 164049 | (AvailableFeatures & RequiredFeatures) ^ |
| 164050 | RequiredFeatures; |
| 164051 | return !MissingFeatures.any(); |
| 164052 | } |
| 164053 | } // end namespace X86_MC |
| 164054 | } // end namespace llvm |
| 164055 | #endif // GET_AVAILABLE_OPCODE_CHECKER |
| 164056 | |
| 164057 | #ifdef ENABLE_INSTR_PREDICATE_VERIFIER |
| 164058 | #undef ENABLE_INSTR_PREDICATE_VERIFIER |
| 164059 | #include <sstream> |
| 164060 | |
| 164061 | namespace llvm { |
| 164062 | namespace X86_MC { |
| 164063 | |
| 164064 | #ifndef NDEBUG |
| 164065 | static const char *SubtargetFeatureNames[] = { |
| 164066 | "Feature_In16BitMode", |
| 164067 | "Feature_In32BitMode", |
| 164068 | "Feature_In64BitMode", |
| 164069 | "Feature_Not16BitMode", |
| 164070 | "Feature_Not64BitMode", |
| 164071 | nullptr |
| 164072 | }; |
| 164073 | |
| 164074 | #endif // NDEBUG |
| 164075 | |
| 164076 | void verifyInstructionPredicates( |
| 164077 | unsigned Opcode, const FeatureBitset &Features) { |
| 164078 | #ifndef NDEBUG |
| 164079 | FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); |
| 164080 | FeatureBitset RequiredFeatures = computeRequiredFeatures(Opcode); |
| 164081 | FeatureBitset MissingFeatures = |
| 164082 | (AvailableFeatures & RequiredFeatures) ^ |
| 164083 | RequiredFeatures; |
| 164084 | if (MissingFeatures.any()) { |
| 164085 | std::ostringstream Msg; |
| 164086 | Msg << "Attempting to emit "<< &X86InstrNameData[X86InstrNameIndices[Opcode]] |
| 164087 | << " instruction but the "; |
| 164088 | for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i) |
| 164089 | if (MissingFeatures.test(i)) |
| 164090 | Msg << SubtargetFeatureNames[i] << " "; |
| 164091 | Msg << "predicate(s) are not met"; |
| 164092 | report_fatal_error(Msg.str().c_str()); |
| 164093 | } |
| 164094 | #endif // NDEBUG |
| 164095 | } |
| 164096 | } // end namespace X86_MC |
| 164097 | } // end namespace llvm |
| 164098 | #endif // ENABLE_INSTR_PREDICATE_VERIFIER |
| 164099 | |
| 164100 |
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