1 | //===----------------------------------------------------------------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // Automatically generated file, do not edit! |
9 | //===----------------------------------------------------------------------===// |
10 | |
11 | |
12 | // V5 Scalar Instructions. |
13 | |
14 | TARGET_BUILTIN(__builtin_HEXAGON_A2_abs, "ii" , "" , V5) |
15 | TARGET_BUILTIN(__builtin_HEXAGON_A2_absp, "LLiLLi" , "" , V5) |
16 | TARGET_BUILTIN(__builtin_HEXAGON_A2_abssat, "ii" , "" , V5) |
17 | TARGET_BUILTIN(__builtin_HEXAGON_A2_add, "iii" , "" , V5) |
18 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_h16_hh, "iii" , "" , V5) |
19 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_h16_hl, "iii" , "" , V5) |
20 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_h16_lh, "iii" , "" , V5) |
21 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_h16_ll, "iii" , "" , V5) |
22 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_h16_sat_hh, "iii" , "" , V5) |
23 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_h16_sat_hl, "iii" , "" , V5) |
24 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_h16_sat_lh, "iii" , "" , V5) |
25 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_h16_sat_ll, "iii" , "" , V5) |
26 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_l16_hl, "iii" , "" , V5) |
27 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_l16_ll, "iii" , "" , V5) |
28 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_l16_sat_hl, "iii" , "" , V5) |
29 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addh_l16_sat_ll, "iii" , "" , V5) |
30 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addi, "iiIi" , "" , V5) |
31 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addp, "LLiLLiLLi" , "" , V5) |
32 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addpsat, "LLiLLiLLi" , "" , V5) |
33 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addsat, "iii" , "" , V5) |
34 | TARGET_BUILTIN(__builtin_HEXAGON_A2_addsp, "LLiiLLi" , "" , V5) |
35 | TARGET_BUILTIN(__builtin_HEXAGON_A2_and, "iii" , "" , V5) |
36 | TARGET_BUILTIN(__builtin_HEXAGON_A2_andir, "iiIi" , "" , V5) |
37 | TARGET_BUILTIN(__builtin_HEXAGON_A2_andp, "LLiLLiLLi" , "" , V5) |
38 | TARGET_BUILTIN(__builtin_HEXAGON_A2_aslh, "ii" , "" , V5) |
39 | TARGET_BUILTIN(__builtin_HEXAGON_A2_asrh, "ii" , "" , V5) |
40 | TARGET_BUILTIN(__builtin_HEXAGON_A2_combine_hh, "iii" , "" , V5) |
41 | TARGET_BUILTIN(__builtin_HEXAGON_A2_combine_hl, "iii" , "" , V5) |
42 | TARGET_BUILTIN(__builtin_HEXAGON_A2_combine_lh, "iii" , "" , V5) |
43 | TARGET_BUILTIN(__builtin_HEXAGON_A2_combine_ll, "iii" , "" , V5) |
44 | TARGET_BUILTIN(__builtin_HEXAGON_A2_combineii, "LLiIiIi" , "" , V5) |
45 | TARGET_BUILTIN(__builtin_HEXAGON_A2_combinew, "LLiii" , "" , V5) |
46 | TARGET_BUILTIN(__builtin_HEXAGON_A2_max, "iii" , "" , V5) |
47 | TARGET_BUILTIN(__builtin_HEXAGON_A2_maxp, "LLiLLiLLi" , "" , V5) |
48 | TARGET_BUILTIN(__builtin_HEXAGON_A2_maxu, "Uiii" , "" , V5) |
49 | TARGET_BUILTIN(__builtin_HEXAGON_A2_maxup, "ULLiLLiLLi" , "" , V5) |
50 | TARGET_BUILTIN(__builtin_HEXAGON_A2_min, "iii" , "" , V5) |
51 | TARGET_BUILTIN(__builtin_HEXAGON_A2_minp, "LLiLLiLLi" , "" , V5) |
52 | TARGET_BUILTIN(__builtin_HEXAGON_A2_minu, "Uiii" , "" , V5) |
53 | TARGET_BUILTIN(__builtin_HEXAGON_A2_minup, "ULLiLLiLLi" , "" , V5) |
54 | TARGET_BUILTIN(__builtin_HEXAGON_A2_neg, "ii" , "" , V5) |
55 | TARGET_BUILTIN(__builtin_HEXAGON_A2_negp, "LLiLLi" , "" , V5) |
56 | TARGET_BUILTIN(__builtin_HEXAGON_A2_negsat, "ii" , "" , V5) |
57 | TARGET_BUILTIN(__builtin_HEXAGON_A2_not, "ii" , "" , V5) |
58 | TARGET_BUILTIN(__builtin_HEXAGON_A2_notp, "LLiLLi" , "" , V5) |
59 | TARGET_BUILTIN(__builtin_HEXAGON_A2_or, "iii" , "" , V5) |
60 | TARGET_BUILTIN(__builtin_HEXAGON_A2_orir, "iiIi" , "" , V5) |
61 | TARGET_BUILTIN(__builtin_HEXAGON_A2_orp, "LLiLLiLLi" , "" , V5) |
62 | TARGET_BUILTIN(__builtin_HEXAGON_A2_roundsat, "iLLi" , "" , V5) |
63 | TARGET_BUILTIN(__builtin_HEXAGON_A2_sat, "iLLi" , "" , V5) |
64 | TARGET_BUILTIN(__builtin_HEXAGON_A2_satb, "ii" , "" , V5) |
65 | TARGET_BUILTIN(__builtin_HEXAGON_A2_sath, "ii" , "" , V5) |
66 | TARGET_BUILTIN(__builtin_HEXAGON_A2_satub, "ii" , "" , V5) |
67 | TARGET_BUILTIN(__builtin_HEXAGON_A2_satuh, "ii" , "" , V5) |
68 | TARGET_BUILTIN(__builtin_HEXAGON_A2_sub, "iii" , "" , V5) |
69 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_h16_hh, "iii" , "" , V5) |
70 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_h16_hl, "iii" , "" , V5) |
71 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_h16_lh, "iii" , "" , V5) |
72 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_h16_ll, "iii" , "" , V5) |
73 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_h16_sat_hh, "iii" , "" , V5) |
74 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_h16_sat_hl, "iii" , "" , V5) |
75 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_h16_sat_lh, "iii" , "" , V5) |
76 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_h16_sat_ll, "iii" , "" , V5) |
77 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_l16_hl, "iii" , "" , V5) |
78 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_l16_ll, "iii" , "" , V5) |
79 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_l16_sat_hl, "iii" , "" , V5) |
80 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subh_l16_sat_ll, "iii" , "" , V5) |
81 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subp, "LLiLLiLLi" , "" , V5) |
82 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subri, "iIii" , "" , V5) |
83 | TARGET_BUILTIN(__builtin_HEXAGON_A2_subsat, "iii" , "" , V5) |
84 | TARGET_BUILTIN(__builtin_HEXAGON_A2_svaddh, "iii" , "" , V5) |
85 | TARGET_BUILTIN(__builtin_HEXAGON_A2_svaddhs, "iii" , "" , V5) |
86 | TARGET_BUILTIN(__builtin_HEXAGON_A2_svadduhs, "iii" , "" , V5) |
87 | TARGET_BUILTIN(__builtin_HEXAGON_A2_svavgh, "iii" , "" , V5) |
88 | TARGET_BUILTIN(__builtin_HEXAGON_A2_svavghs, "iii" , "" , V5) |
89 | TARGET_BUILTIN(__builtin_HEXAGON_A2_svnavgh, "iii" , "" , V5) |
90 | TARGET_BUILTIN(__builtin_HEXAGON_A2_svsubh, "iii" , "" , V5) |
91 | TARGET_BUILTIN(__builtin_HEXAGON_A2_svsubhs, "iii" , "" , V5) |
92 | TARGET_BUILTIN(__builtin_HEXAGON_A2_svsubuhs, "iii" , "" , V5) |
93 | TARGET_BUILTIN(__builtin_HEXAGON_A2_swiz, "ii" , "" , V5) |
94 | TARGET_BUILTIN(__builtin_HEXAGON_A2_sxtb, "ii" , "" , V5) |
95 | TARGET_BUILTIN(__builtin_HEXAGON_A2_sxth, "ii" , "" , V5) |
96 | TARGET_BUILTIN(__builtin_HEXAGON_A2_sxtw, "LLii" , "" , V5) |
97 | TARGET_BUILTIN(__builtin_HEXAGON_A2_tfr, "ii" , "" , V5) |
98 | TARGET_BUILTIN(__builtin_HEXAGON_A2_tfrih, "iiUIi" , "" , V5) |
99 | TARGET_BUILTIN(__builtin_HEXAGON_A2_tfril, "iiUIi" , "" , V5) |
100 | TARGET_BUILTIN(__builtin_HEXAGON_A2_tfrp, "LLiLLi" , "" , V5) |
101 | TARGET_BUILTIN(__builtin_HEXAGON_A2_tfrpi, "LLiIi" , "" , V5) |
102 | TARGET_BUILTIN(__builtin_HEXAGON_A2_tfrsi, "iIi" , "" , V5) |
103 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vabsh, "LLiLLi" , "" , V5) |
104 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vabshsat, "LLiLLi" , "" , V5) |
105 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vabsw, "LLiLLi" , "" , V5) |
106 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vabswsat, "LLiLLi" , "" , V5) |
107 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vaddb_map, "LLiLLiLLi" , "" , V5) |
108 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vaddh, "LLiLLiLLi" , "" , V5) |
109 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vaddhs, "LLiLLiLLi" , "" , V5) |
110 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vaddub, "LLiLLiLLi" , "" , V5) |
111 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vaddubs, "LLiLLiLLi" , "" , V5) |
112 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vadduhs, "LLiLLiLLi" , "" , V5) |
113 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vaddw, "LLiLLiLLi" , "" , V5) |
114 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vaddws, "LLiLLiLLi" , "" , V5) |
115 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavgh, "LLiLLiLLi" , "" , V5) |
116 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavghcr, "LLiLLiLLi" , "" , V5) |
117 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavghr, "LLiLLiLLi" , "" , V5) |
118 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavgub, "LLiLLiLLi" , "" , V5) |
119 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavgubr, "LLiLLiLLi" , "" , V5) |
120 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavguh, "LLiLLiLLi" , "" , V5) |
121 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavguhr, "LLiLLiLLi" , "" , V5) |
122 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavguw, "LLiLLiLLi" , "" , V5) |
123 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavguwr, "LLiLLiLLi" , "" , V5) |
124 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavgw, "LLiLLiLLi" , "" , V5) |
125 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavgwcr, "LLiLLiLLi" , "" , V5) |
126 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vavgwr, "LLiLLiLLi" , "" , V5) |
127 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vcmpbeq, "iLLiLLi" , "" , V5) |
128 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vcmpbgtu, "iLLiLLi" , "" , V5) |
129 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vcmpheq, "iLLiLLi" , "" , V5) |
130 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vcmphgt, "iLLiLLi" , "" , V5) |
131 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vcmphgtu, "iLLiLLi" , "" , V5) |
132 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vcmpweq, "iLLiLLi" , "" , V5) |
133 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vcmpwgt, "iLLiLLi" , "" , V5) |
134 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vcmpwgtu, "iLLiLLi" , "" , V5) |
135 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vconj, "LLiLLi" , "" , V5) |
136 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vmaxb, "LLiLLiLLi" , "" , V5) |
137 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vmaxh, "LLiLLiLLi" , "" , V5) |
138 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vmaxub, "LLiLLiLLi" , "" , V5) |
139 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vmaxuh, "LLiLLiLLi" , "" , V5) |
140 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vmaxuw, "LLiLLiLLi" , "" , V5) |
141 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vmaxw, "LLiLLiLLi" , "" , V5) |
142 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vminb, "LLiLLiLLi" , "" , V5) |
143 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vminh, "LLiLLiLLi" , "" , V5) |
144 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vminub, "LLiLLiLLi" , "" , V5) |
145 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vminuh, "LLiLLiLLi" , "" , V5) |
146 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vminuw, "LLiLLiLLi" , "" , V5) |
147 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vminw, "LLiLLiLLi" , "" , V5) |
148 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vnavgh, "LLiLLiLLi" , "" , V5) |
149 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vnavghcr, "LLiLLiLLi" , "" , V5) |
150 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vnavghr, "LLiLLiLLi" , "" , V5) |
151 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vnavgw, "LLiLLiLLi" , "" , V5) |
152 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vnavgwcr, "LLiLLiLLi" , "" , V5) |
153 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vnavgwr, "LLiLLiLLi" , "" , V5) |
154 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vraddub, "LLiLLiLLi" , "" , V5) |
155 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vraddub_acc, "LLiLLiLLiLLi" , "" , V5) |
156 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vrsadub, "LLiLLiLLi" , "" , V5) |
157 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vrsadub_acc, "LLiLLiLLiLLi" , "" , V5) |
158 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vsubb_map, "LLiLLiLLi" , "" , V5) |
159 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vsubh, "LLiLLiLLi" , "" , V5) |
160 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vsubhs, "LLiLLiLLi" , "" , V5) |
161 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vsubub, "LLiLLiLLi" , "" , V5) |
162 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vsububs, "LLiLLiLLi" , "" , V5) |
163 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vsubuhs, "LLiLLiLLi" , "" , V5) |
164 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vsubw, "LLiLLiLLi" , "" , V5) |
165 | TARGET_BUILTIN(__builtin_HEXAGON_A2_vsubws, "LLiLLiLLi" , "" , V5) |
166 | TARGET_BUILTIN(__builtin_HEXAGON_A2_xor, "iii" , "" , V5) |
167 | TARGET_BUILTIN(__builtin_HEXAGON_A2_xorp, "LLiLLiLLi" , "" , V5) |
168 | TARGET_BUILTIN(__builtin_HEXAGON_A2_zxtb, "ii" , "" , V5) |
169 | TARGET_BUILTIN(__builtin_HEXAGON_A2_zxth, "ii" , "" , V5) |
170 | TARGET_BUILTIN(__builtin_HEXAGON_A4_andn, "iii" , "" , V5) |
171 | TARGET_BUILTIN(__builtin_HEXAGON_A4_andnp, "LLiLLiLLi" , "" , V5) |
172 | TARGET_BUILTIN(__builtin_HEXAGON_A4_bitsplit, "LLiii" , "" , V5) |
173 | TARGET_BUILTIN(__builtin_HEXAGON_A4_bitspliti, "LLiiUIi" , "" , V5) |
174 | TARGET_BUILTIN(__builtin_HEXAGON_A4_boundscheck, "iiLLi" , "" , V5) |
175 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmpbeq, "iii" , "" , V5) |
176 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmpbeqi, "iiUIi" , "" , V5) |
177 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmpbgt, "iii" , "" , V5) |
178 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmpbgti, "iiIi" , "" , V5) |
179 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmpbgtu, "iii" , "" , V5) |
180 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmpbgtui, "iiUIi" , "" , V5) |
181 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmpheq, "iii" , "" , V5) |
182 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmpheqi, "iiIi" , "" , V5) |
183 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmphgt, "iii" , "" , V5) |
184 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmphgti, "iiIi" , "" , V5) |
185 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmphgtu, "iii" , "" , V5) |
186 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cmphgtui, "iiUIi" , "" , V5) |
187 | TARGET_BUILTIN(__builtin_HEXAGON_A4_combineir, "LLiIii" , "" , V5) |
188 | TARGET_BUILTIN(__builtin_HEXAGON_A4_combineri, "LLiiIi" , "" , V5) |
189 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cround_ri, "iiUIi" , "" , V5) |
190 | TARGET_BUILTIN(__builtin_HEXAGON_A4_cround_rr, "iii" , "" , V5) |
191 | TARGET_BUILTIN(__builtin_HEXAGON_A4_modwrapu, "iii" , "" , V5) |
192 | TARGET_BUILTIN(__builtin_HEXAGON_A4_orn, "iii" , "" , V5) |
193 | TARGET_BUILTIN(__builtin_HEXAGON_A4_ornp, "LLiLLiLLi" , "" , V5) |
194 | TARGET_BUILTIN(__builtin_HEXAGON_A4_rcmpeq, "iii" , "" , V5) |
195 | TARGET_BUILTIN(__builtin_HEXAGON_A4_rcmpeqi, "iiIi" , "" , V5) |
196 | TARGET_BUILTIN(__builtin_HEXAGON_A4_rcmpneq, "iii" , "" , V5) |
197 | TARGET_BUILTIN(__builtin_HEXAGON_A4_rcmpneqi, "iiIi" , "" , V5) |
198 | TARGET_BUILTIN(__builtin_HEXAGON_A4_round_ri, "iiUIi" , "" , V5) |
199 | TARGET_BUILTIN(__builtin_HEXAGON_A4_round_ri_sat, "iiUIi" , "" , V5) |
200 | TARGET_BUILTIN(__builtin_HEXAGON_A4_round_rr, "iii" , "" , V5) |
201 | TARGET_BUILTIN(__builtin_HEXAGON_A4_round_rr_sat, "iii" , "" , V5) |
202 | TARGET_BUILTIN(__builtin_HEXAGON_A4_tlbmatch, "iLLii" , "" , V5) |
203 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmpbeq_any, "iLLiLLi" , "" , V5) |
204 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmpbeqi, "iLLiUIi" , "" , V5) |
205 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmpbgt, "iLLiLLi" , "" , V5) |
206 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmpbgti, "iLLiIi" , "" , V5) |
207 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmpbgtui, "iLLiUIi" , "" , V5) |
208 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmpheqi, "iLLiIi" , "" , V5) |
209 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmphgti, "iLLiIi" , "" , V5) |
210 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmphgtui, "iLLiUIi" , "" , V5) |
211 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmpweqi, "iLLiIi" , "" , V5) |
212 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmpwgti, "iLLiIi" , "" , V5) |
213 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vcmpwgtui, "iLLiUIi" , "" , V5) |
214 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vrmaxh, "LLiLLiLLii" , "" , V5) |
215 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vrmaxuh, "LLiLLiLLii" , "" , V5) |
216 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vrmaxuw, "LLiLLiLLii" , "" , V5) |
217 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vrmaxw, "LLiLLiLLii" , "" , V5) |
218 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vrminh, "LLiLLiLLii" , "" , V5) |
219 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vrminuh, "LLiLLiLLii" , "" , V5) |
220 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vrminuw, "LLiLLiLLii" , "" , V5) |
221 | TARGET_BUILTIN(__builtin_HEXAGON_A4_vrminw, "LLiLLiLLii" , "" , V5) |
222 | TARGET_BUILTIN(__builtin_HEXAGON_A5_vaddhubs, "iLLiLLi" , "" , V5) |
223 | TARGET_BUILTIN(__builtin_HEXAGON_C2_all8, "ii" , "" , V5) |
224 | TARGET_BUILTIN(__builtin_HEXAGON_C2_and, "iii" , "" , V5) |
225 | TARGET_BUILTIN(__builtin_HEXAGON_C2_andn, "iii" , "" , V5) |
226 | TARGET_BUILTIN(__builtin_HEXAGON_C2_any8, "ii" , "" , V5) |
227 | TARGET_BUILTIN(__builtin_HEXAGON_C2_bitsclr, "iii" , "" , V5) |
228 | TARGET_BUILTIN(__builtin_HEXAGON_C2_bitsclri, "iiUIi" , "" , V5) |
229 | TARGET_BUILTIN(__builtin_HEXAGON_C2_bitsset, "iii" , "" , V5) |
230 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpeq, "iii" , "" , V5) |
231 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpeqi, "iiIi" , "" , V5) |
232 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpeqp, "iLLiLLi" , "" , V5) |
233 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpgei, "iiIi" , "" , V5) |
234 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpgeui, "iiUIi" , "" , V5) |
235 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpgt, "iii" , "" , V5) |
236 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpgti, "iiIi" , "" , V5) |
237 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpgtp, "iLLiLLi" , "" , V5) |
238 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpgtu, "iii" , "" , V5) |
239 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpgtui, "iiUIi" , "" , V5) |
240 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpgtup, "iLLiLLi" , "" , V5) |
241 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmplt, "iii" , "" , V5) |
242 | TARGET_BUILTIN(__builtin_HEXAGON_C2_cmpltu, "iii" , "" , V5) |
243 | TARGET_BUILTIN(__builtin_HEXAGON_C2_mask, "LLii" , "" , V5) |
244 | TARGET_BUILTIN(__builtin_HEXAGON_C2_mux, "iiii" , "" , V5) |
245 | TARGET_BUILTIN(__builtin_HEXAGON_C2_muxii, "iiIiIi" , "" , V5) |
246 | TARGET_BUILTIN(__builtin_HEXAGON_C2_muxir, "iiiIi" , "" , V5) |
247 | TARGET_BUILTIN(__builtin_HEXAGON_C2_muxri, "iiIii" , "" , V5) |
248 | TARGET_BUILTIN(__builtin_HEXAGON_C2_not, "ii" , "" , V5) |
249 | TARGET_BUILTIN(__builtin_HEXAGON_C2_or, "iii" , "" , V5) |
250 | TARGET_BUILTIN(__builtin_HEXAGON_C2_orn, "iii" , "" , V5) |
251 | TARGET_BUILTIN(__builtin_HEXAGON_C2_pxfer_map, "ii" , "" , V5) |
252 | TARGET_BUILTIN(__builtin_HEXAGON_C2_tfrpr, "ii" , "" , V5) |
253 | TARGET_BUILTIN(__builtin_HEXAGON_C2_tfrrp, "ii" , "" , V5) |
254 | TARGET_BUILTIN(__builtin_HEXAGON_C2_vitpack, "iii" , "" , V5) |
255 | TARGET_BUILTIN(__builtin_HEXAGON_C2_vmux, "LLiiLLiLLi" , "" , V5) |
256 | TARGET_BUILTIN(__builtin_HEXAGON_C2_xor, "iii" , "" , V5) |
257 | TARGET_BUILTIN(__builtin_HEXAGON_C4_and_and, "iiii" , "" , V5) |
258 | TARGET_BUILTIN(__builtin_HEXAGON_C4_and_andn, "iiii" , "" , V5) |
259 | TARGET_BUILTIN(__builtin_HEXAGON_C4_and_or, "iiii" , "" , V5) |
260 | TARGET_BUILTIN(__builtin_HEXAGON_C4_and_orn, "iiii" , "" , V5) |
261 | TARGET_BUILTIN(__builtin_HEXAGON_C4_cmplte, "iii" , "" , V5) |
262 | TARGET_BUILTIN(__builtin_HEXAGON_C4_cmpltei, "iiIi" , "" , V5) |
263 | TARGET_BUILTIN(__builtin_HEXAGON_C4_cmplteu, "iii" , "" , V5) |
264 | TARGET_BUILTIN(__builtin_HEXAGON_C4_cmplteui, "iiUIi" , "" , V5) |
265 | TARGET_BUILTIN(__builtin_HEXAGON_C4_cmpneq, "iii" , "" , V5) |
266 | TARGET_BUILTIN(__builtin_HEXAGON_C4_cmpneqi, "iiIi" , "" , V5) |
267 | TARGET_BUILTIN(__builtin_HEXAGON_C4_fastcorner9, "iii" , "" , V5) |
268 | TARGET_BUILTIN(__builtin_HEXAGON_C4_fastcorner9_not, "iii" , "" , V5) |
269 | TARGET_BUILTIN(__builtin_HEXAGON_C4_nbitsclr, "iii" , "" , V5) |
270 | TARGET_BUILTIN(__builtin_HEXAGON_C4_nbitsclri, "iiUIi" , "" , V5) |
271 | TARGET_BUILTIN(__builtin_HEXAGON_C4_nbitsset, "iii" , "" , V5) |
272 | TARGET_BUILTIN(__builtin_HEXAGON_C4_or_and, "iiii" , "" , V5) |
273 | TARGET_BUILTIN(__builtin_HEXAGON_C4_or_andn, "iiii" , "" , V5) |
274 | TARGET_BUILTIN(__builtin_HEXAGON_C4_or_or, "iiii" , "" , V5) |
275 | TARGET_BUILTIN(__builtin_HEXAGON_C4_or_orn, "iiii" , "" , V5) |
276 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_d2df, "dLLi" , "" , V5) |
277 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_d2sf, "fLLi" , "" , V5) |
278 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_df2d, "LLid" , "" , V5) |
279 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_df2d_chop, "LLid" , "" , V5) |
280 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_df2sf, "fd" , "" , V5) |
281 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_df2ud, "LLid" , "" , V5) |
282 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_df2ud_chop, "LLid" , "" , V5) |
283 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_df2uw, "id" , "" , V5) |
284 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_df2uw_chop, "id" , "" , V5) |
285 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_df2w, "id" , "" , V5) |
286 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_df2w_chop, "id" , "" , V5) |
287 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_sf2d, "LLif" , "" , V5) |
288 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_sf2d_chop, "LLif" , "" , V5) |
289 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_sf2df, "df" , "" , V5) |
290 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_sf2ud, "LLif" , "" , V5) |
291 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_sf2ud_chop, "LLif" , "" , V5) |
292 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_sf2uw, "if" , "" , V5) |
293 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_sf2uw_chop, "if" , "" , V5) |
294 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_sf2w, "if" , "" , V5) |
295 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_sf2w_chop, "if" , "" , V5) |
296 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_ud2df, "dLLi" , "" , V5) |
297 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_ud2sf, "fLLi" , "" , V5) |
298 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_uw2df, "di" , "" , V5) |
299 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_uw2sf, "fi" , "" , V5) |
300 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_w2df, "di" , "" , V5) |
301 | TARGET_BUILTIN(__builtin_HEXAGON_F2_conv_w2sf, "fi" , "" , V5) |
302 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfclass, "idUIi" , "" , V5) |
303 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfcmpeq, "idd" , "" , V5) |
304 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfcmpge, "idd" , "" , V5) |
305 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfcmpgt, "idd" , "" , V5) |
306 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfcmpuo, "idd" , "" , V5) |
307 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfimm_n, "dUIi" , "" , V5) |
308 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfimm_p, "dUIi" , "" , V5) |
309 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfadd, "fff" , "" , V5) |
310 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfclass, "ifUIi" , "" , V5) |
311 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfcmpeq, "iff" , "" , V5) |
312 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfcmpge, "iff" , "" , V5) |
313 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfcmpgt, "iff" , "" , V5) |
314 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfcmpuo, "iff" , "" , V5) |
315 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sffixupd, "fff" , "" , V5) |
316 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sffixupn, "fff" , "" , V5) |
317 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sffixupr, "ff" , "" , V5) |
318 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sffma, "ffff" , "" , V5) |
319 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sffma_lib, "ffff" , "" , V5) |
320 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sffma_sc, "ffffi" , "" , V5) |
321 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sffms, "ffff" , "" , V5) |
322 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sffms_lib, "ffff" , "" , V5) |
323 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfimm_n, "fUIi" , "" , V5) |
324 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfimm_p, "fUIi" , "" , V5) |
325 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfmax, "fff" , "" , V5) |
326 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfmin, "fff" , "" , V5) |
327 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfmpy, "fff" , "" , V5) |
328 | TARGET_BUILTIN(__builtin_HEXAGON_F2_sfsub, "fff" , "" , V5) |
329 | TARGET_BUILTIN(__builtin_HEXAGON_M2_acci, "iiii" , "" , V5) |
330 | TARGET_BUILTIN(__builtin_HEXAGON_M2_accii, "iiiIi" , "" , V5) |
331 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmaci_s0, "LLiLLiii" , "" , V5) |
332 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmacr_s0, "LLiLLiii" , "" , V5) |
333 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmacs_s0, "LLiLLiii" , "" , V5) |
334 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmacs_s1, "LLiLLiii" , "" , V5) |
335 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmacsc_s0, "LLiLLiii" , "" , V5) |
336 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmacsc_s1, "LLiLLiii" , "" , V5) |
337 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmpyi_s0, "LLiii" , "" , V5) |
338 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmpyr_s0, "LLiii" , "" , V5) |
339 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmpyrs_s0, "iii" , "" , V5) |
340 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmpyrs_s1, "iii" , "" , V5) |
341 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmpyrsc_s0, "iii" , "" , V5) |
342 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmpyrsc_s1, "iii" , "" , V5) |
343 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmpys_s0, "LLiii" , "" , V5) |
344 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmpys_s1, "LLiii" , "" , V5) |
345 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmpysc_s0, "LLiii" , "" , V5) |
346 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cmpysc_s1, "LLiii" , "" , V5) |
347 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cnacs_s0, "LLiLLiii" , "" , V5) |
348 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cnacs_s1, "LLiLLiii" , "" , V5) |
349 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cnacsc_s0, "LLiLLiii" , "" , V5) |
350 | TARGET_BUILTIN(__builtin_HEXAGON_M2_cnacsc_s1, "LLiLLiii" , "" , V5) |
351 | TARGET_BUILTIN(__builtin_HEXAGON_M2_dpmpyss_acc_s0, "LLiLLiii" , "" , V5) |
352 | TARGET_BUILTIN(__builtin_HEXAGON_M2_dpmpyss_nac_s0, "LLiLLiii" , "" , V5) |
353 | TARGET_BUILTIN(__builtin_HEXAGON_M2_dpmpyss_rnd_s0, "iii" , "" , V5) |
354 | TARGET_BUILTIN(__builtin_HEXAGON_M2_dpmpyss_s0, "LLiii" , "" , V5) |
355 | TARGET_BUILTIN(__builtin_HEXAGON_M2_dpmpyuu_acc_s0, "LLiLLiii" , "" , V5) |
356 | TARGET_BUILTIN(__builtin_HEXAGON_M2_dpmpyuu_nac_s0, "LLiLLiii" , "" , V5) |
357 | TARGET_BUILTIN(__builtin_HEXAGON_M2_dpmpyuu_s0, "ULLiii" , "" , V5) |
358 | TARGET_BUILTIN(__builtin_HEXAGON_M2_hmmpyh_rs1, "iii" , "" , V5) |
359 | TARGET_BUILTIN(__builtin_HEXAGON_M2_hmmpyh_s1, "iii" , "" , V5) |
360 | TARGET_BUILTIN(__builtin_HEXAGON_M2_hmmpyl_rs1, "iii" , "" , V5) |
361 | TARGET_BUILTIN(__builtin_HEXAGON_M2_hmmpyl_s1, "iii" , "" , V5) |
362 | TARGET_BUILTIN(__builtin_HEXAGON_M2_maci, "iiii" , "" , V5) |
363 | TARGET_BUILTIN(__builtin_HEXAGON_M2_macsin, "iiiUIi" , "" , V5) |
364 | TARGET_BUILTIN(__builtin_HEXAGON_M2_macsip, "iiiUIi" , "" , V5) |
365 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmachs_rs0, "LLiLLiLLiLLi" , "" , V5) |
366 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmachs_rs1, "LLiLLiLLiLLi" , "" , V5) |
367 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmachs_s0, "LLiLLiLLiLLi" , "" , V5) |
368 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmachs_s1, "LLiLLiLLiLLi" , "" , V5) |
369 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmacls_rs0, "LLiLLiLLiLLi" , "" , V5) |
370 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmacls_rs1, "LLiLLiLLiLLi" , "" , V5) |
371 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmacls_s0, "LLiLLiLLiLLi" , "" , V5) |
372 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmacls_s1, "LLiLLiLLiLLi" , "" , V5) |
373 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmacuhs_rs0, "LLiLLiLLiLLi" , "" , V5) |
374 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmacuhs_rs1, "LLiLLiLLiLLi" , "" , V5) |
375 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmacuhs_s0, "LLiLLiLLiLLi" , "" , V5) |
376 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmacuhs_s1, "LLiLLiLLiLLi" , "" , V5) |
377 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmaculs_rs0, "LLiLLiLLiLLi" , "" , V5) |
378 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmaculs_rs1, "LLiLLiLLiLLi" , "" , V5) |
379 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmaculs_s0, "LLiLLiLLiLLi" , "" , V5) |
380 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmaculs_s1, "LLiLLiLLiLLi" , "" , V5) |
381 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyh_rs0, "LLiLLiLLi" , "" , V5) |
382 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyh_rs1, "LLiLLiLLi" , "" , V5) |
383 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyh_s0, "LLiLLiLLi" , "" , V5) |
384 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyh_s1, "LLiLLiLLi" , "" , V5) |
385 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyl_rs0, "LLiLLiLLi" , "" , V5) |
386 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyl_rs1, "LLiLLiLLi" , "" , V5) |
387 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyl_s0, "LLiLLiLLi" , "" , V5) |
388 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyl_s1, "LLiLLiLLi" , "" , V5) |
389 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyuh_rs0, "LLiLLiLLi" , "" , V5) |
390 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyuh_rs1, "LLiLLiLLi" , "" , V5) |
391 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyuh_s0, "LLiLLiLLi" , "" , V5) |
392 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyuh_s1, "LLiLLiLLi" , "" , V5) |
393 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyul_rs0, "LLiLLiLLi" , "" , V5) |
394 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyul_rs1, "LLiLLiLLi" , "" , V5) |
395 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyul_s0, "LLiLLiLLi" , "" , V5) |
396 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mmpyul_s1, "LLiLLiLLi" , "" , V5) |
397 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_hh_s0, "iiii" , "" , V5) |
398 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_hh_s1, "iiii" , "" , V5) |
399 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_hl_s0, "iiii" , "" , V5) |
400 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_hl_s1, "iiii" , "" , V5) |
401 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_lh_s0, "iiii" , "" , V5) |
402 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_lh_s1, "iiii" , "" , V5) |
403 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_ll_s0, "iiii" , "" , V5) |
404 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_ll_s1, "iiii" , "" , V5) |
405 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_sat_hh_s0, "iiii" , "" , V5) |
406 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_sat_hh_s1, "iiii" , "" , V5) |
407 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_sat_hl_s0, "iiii" , "" , V5) |
408 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_sat_hl_s1, "iiii" , "" , V5) |
409 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_sat_lh_s0, "iiii" , "" , V5) |
410 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_sat_lh_s1, "iiii" , "" , V5) |
411 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_sat_ll_s0, "iiii" , "" , V5) |
412 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_acc_sat_ll_s1, "iiii" , "" , V5) |
413 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_hh_s0, "iii" , "" , V5) |
414 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_hh_s1, "iii" , "" , V5) |
415 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_hl_s0, "iii" , "" , V5) |
416 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_hl_s1, "iii" , "" , V5) |
417 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_lh_s0, "iii" , "" , V5) |
418 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_lh_s1, "iii" , "" , V5) |
419 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_ll_s0, "iii" , "" , V5) |
420 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_ll_s1, "iii" , "" , V5) |
421 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_hh_s0, "iiii" , "" , V5) |
422 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_hh_s1, "iiii" , "" , V5) |
423 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_hl_s0, "iiii" , "" , V5) |
424 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_hl_s1, "iiii" , "" , V5) |
425 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_lh_s0, "iiii" , "" , V5) |
426 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_lh_s1, "iiii" , "" , V5) |
427 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_ll_s0, "iiii" , "" , V5) |
428 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_ll_s1, "iiii" , "" , V5) |
429 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_sat_hh_s0, "iiii" , "" , V5) |
430 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_sat_hh_s1, "iiii" , "" , V5) |
431 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_sat_hl_s0, "iiii" , "" , V5) |
432 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_sat_hl_s1, "iiii" , "" , V5) |
433 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_sat_lh_s0, "iiii" , "" , V5) |
434 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_sat_lh_s1, "iiii" , "" , V5) |
435 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_sat_ll_s0, "iiii" , "" , V5) |
436 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_nac_sat_ll_s1, "iiii" , "" , V5) |
437 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_rnd_hh_s0, "iii" , "" , V5) |
438 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_rnd_hh_s1, "iii" , "" , V5) |
439 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_rnd_hl_s0, "iii" , "" , V5) |
440 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_rnd_hl_s1, "iii" , "" , V5) |
441 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_rnd_lh_s0, "iii" , "" , V5) |
442 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_rnd_lh_s1, "iii" , "" , V5) |
443 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_rnd_ll_s0, "iii" , "" , V5) |
444 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_rnd_ll_s1, "iii" , "" , V5) |
445 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_hh_s0, "iii" , "" , V5) |
446 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_hh_s1, "iii" , "" , V5) |
447 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_hl_s0, "iii" , "" , V5) |
448 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_hl_s1, "iii" , "" , V5) |
449 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_lh_s0, "iii" , "" , V5) |
450 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_lh_s1, "iii" , "" , V5) |
451 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_ll_s0, "iii" , "" , V5) |
452 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_ll_s1, "iii" , "" , V5) |
453 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s0, "iii" , "" , V5) |
454 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_rnd_hh_s1, "iii" , "" , V5) |
455 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s0, "iii" , "" , V5) |
456 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_rnd_hl_s1, "iii" , "" , V5) |
457 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s0, "iii" , "" , V5) |
458 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_rnd_lh_s1, "iii" , "" , V5) |
459 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s0, "iii" , "" , V5) |
460 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_sat_rnd_ll_s1, "iii" , "" , V5) |
461 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_up, "iii" , "" , V5) |
462 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_up_s1, "iii" , "" , V5) |
463 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpy_up_s1_sat, "iii" , "" , V5) |
464 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_acc_hh_s0, "LLiLLiii" , "" , V5) |
465 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_acc_hh_s1, "LLiLLiii" , "" , V5) |
466 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_acc_hl_s0, "LLiLLiii" , "" , V5) |
467 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_acc_hl_s1, "LLiLLiii" , "" , V5) |
468 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_acc_lh_s0, "LLiLLiii" , "" , V5) |
469 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_acc_lh_s1, "LLiLLiii" , "" , V5) |
470 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_acc_ll_s0, "LLiLLiii" , "" , V5) |
471 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_acc_ll_s1, "LLiLLiii" , "" , V5) |
472 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_hh_s0, "LLiii" , "" , V5) |
473 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_hh_s1, "LLiii" , "" , V5) |
474 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_hl_s0, "LLiii" , "" , V5) |
475 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_hl_s1, "LLiii" , "" , V5) |
476 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_lh_s0, "LLiii" , "" , V5) |
477 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_lh_s1, "LLiii" , "" , V5) |
478 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_ll_s0, "LLiii" , "" , V5) |
479 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_ll_s1, "LLiii" , "" , V5) |
480 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_nac_hh_s0, "LLiLLiii" , "" , V5) |
481 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_nac_hh_s1, "LLiLLiii" , "" , V5) |
482 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_nac_hl_s0, "LLiLLiii" , "" , V5) |
483 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_nac_hl_s1, "LLiLLiii" , "" , V5) |
484 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_nac_lh_s0, "LLiLLiii" , "" , V5) |
485 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_nac_lh_s1, "LLiLLiii" , "" , V5) |
486 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_nac_ll_s0, "LLiLLiii" , "" , V5) |
487 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_nac_ll_s1, "LLiLLiii" , "" , V5) |
488 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_rnd_hh_s0, "LLiii" , "" , V5) |
489 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_rnd_hh_s1, "LLiii" , "" , V5) |
490 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_rnd_hl_s0, "LLiii" , "" , V5) |
491 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_rnd_hl_s1, "LLiii" , "" , V5) |
492 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_rnd_lh_s0, "LLiii" , "" , V5) |
493 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_rnd_lh_s1, "LLiii" , "" , V5) |
494 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_rnd_ll_s0, "LLiii" , "" , V5) |
495 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyd_rnd_ll_s1, "LLiii" , "" , V5) |
496 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyi, "iii" , "" , V5) |
497 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpysmi, "iiIi" , "" , V5) |
498 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpysu_up, "iii" , "" , V5) |
499 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_acc_hh_s0, "iiii" , "" , V5) |
500 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_acc_hh_s1, "iiii" , "" , V5) |
501 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_acc_hl_s0, "iiii" , "" , V5) |
502 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_acc_hl_s1, "iiii" , "" , V5) |
503 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_acc_lh_s0, "iiii" , "" , V5) |
504 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_acc_lh_s1, "iiii" , "" , V5) |
505 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_acc_ll_s0, "iiii" , "" , V5) |
506 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_acc_ll_s1, "iiii" , "" , V5) |
507 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_hh_s0, "Uiii" , "" , V5) |
508 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_hh_s1, "Uiii" , "" , V5) |
509 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_hl_s0, "Uiii" , "" , V5) |
510 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_hl_s1, "Uiii" , "" , V5) |
511 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_lh_s0, "Uiii" , "" , V5) |
512 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_lh_s1, "Uiii" , "" , V5) |
513 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_ll_s0, "Uiii" , "" , V5) |
514 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_ll_s1, "Uiii" , "" , V5) |
515 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_nac_hh_s0, "iiii" , "" , V5) |
516 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_nac_hh_s1, "iiii" , "" , V5) |
517 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_nac_hl_s0, "iiii" , "" , V5) |
518 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_nac_hl_s1, "iiii" , "" , V5) |
519 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_nac_lh_s0, "iiii" , "" , V5) |
520 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_nac_lh_s1, "iiii" , "" , V5) |
521 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_nac_ll_s0, "iiii" , "" , V5) |
522 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_nac_ll_s1, "iiii" , "" , V5) |
523 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyu_up, "Uiii" , "" , V5) |
524 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_acc_hh_s0, "LLiLLiii" , "" , V5) |
525 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_acc_hh_s1, "LLiLLiii" , "" , V5) |
526 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_acc_hl_s0, "LLiLLiii" , "" , V5) |
527 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_acc_hl_s1, "LLiLLiii" , "" , V5) |
528 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_acc_lh_s0, "LLiLLiii" , "" , V5) |
529 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_acc_lh_s1, "LLiLLiii" , "" , V5) |
530 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_acc_ll_s0, "LLiLLiii" , "" , V5) |
531 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_acc_ll_s1, "LLiLLiii" , "" , V5) |
532 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_hh_s0, "ULLiii" , "" , V5) |
533 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_hh_s1, "ULLiii" , "" , V5) |
534 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_hl_s0, "ULLiii" , "" , V5) |
535 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_hl_s1, "ULLiii" , "" , V5) |
536 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_lh_s0, "ULLiii" , "" , V5) |
537 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_lh_s1, "ULLiii" , "" , V5) |
538 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_ll_s0, "ULLiii" , "" , V5) |
539 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_ll_s1, "ULLiii" , "" , V5) |
540 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_nac_hh_s0, "LLiLLiii" , "" , V5) |
541 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_nac_hh_s1, "LLiLLiii" , "" , V5) |
542 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_nac_hl_s0, "LLiLLiii" , "" , V5) |
543 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_nac_hl_s1, "LLiLLiii" , "" , V5) |
544 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_nac_lh_s0, "LLiLLiii" , "" , V5) |
545 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_nac_lh_s1, "LLiLLiii" , "" , V5) |
546 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_nac_ll_s0, "LLiLLiii" , "" , V5) |
547 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyud_nac_ll_s1, "LLiLLiii" , "" , V5) |
548 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mpyui, "iii" , "" , V5) |
549 | TARGET_BUILTIN(__builtin_HEXAGON_M2_nacci, "iiii" , "" , V5) |
550 | TARGET_BUILTIN(__builtin_HEXAGON_M2_naccii, "iiiIi" , "" , V5) |
551 | TARGET_BUILTIN(__builtin_HEXAGON_M2_subacc, "iiii" , "" , V5) |
552 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vabsdiffh, "LLiLLiLLi" , "" , V5) |
553 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vabsdiffw, "LLiLLiLLi" , "" , V5) |
554 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vcmac_s0_sat_i, "LLiLLiLLiLLi" , "" , V5) |
555 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vcmac_s0_sat_r, "LLiLLiLLiLLi" , "" , V5) |
556 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vcmpy_s0_sat_i, "LLiLLiLLi" , "" , V5) |
557 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vcmpy_s0_sat_r, "LLiLLiLLi" , "" , V5) |
558 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vcmpy_s1_sat_i, "LLiLLiLLi" , "" , V5) |
559 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vcmpy_s1_sat_r, "LLiLLiLLi" , "" , V5) |
560 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vdmacs_s0, "LLiLLiLLiLLi" , "" , V5) |
561 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vdmacs_s1, "LLiLLiLLiLLi" , "" , V5) |
562 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vdmpyrs_s0, "iLLiLLi" , "" , V5) |
563 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vdmpyrs_s1, "iLLiLLi" , "" , V5) |
564 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vdmpys_s0, "LLiLLiLLi" , "" , V5) |
565 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vdmpys_s1, "LLiLLiLLi" , "" , V5) |
566 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmac2, "LLiLLiii" , "" , V5) |
567 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmac2es, "LLiLLiLLiLLi" , "" , V5) |
568 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmac2es_s0, "LLiLLiLLiLLi" , "" , V5) |
569 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmac2es_s1, "LLiLLiLLiLLi" , "" , V5) |
570 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmac2s_s0, "LLiLLiii" , "" , V5) |
571 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmac2s_s1, "LLiLLiii" , "" , V5) |
572 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmac2su_s0, "LLiLLiii" , "" , V5) |
573 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmac2su_s1, "LLiLLiii" , "" , V5) |
574 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmpy2es_s0, "LLiLLiLLi" , "" , V5) |
575 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmpy2es_s1, "LLiLLiLLi" , "" , V5) |
576 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmpy2s_s0, "LLiii" , "" , V5) |
577 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmpy2s_s0pack, "iii" , "" , V5) |
578 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmpy2s_s1, "LLiii" , "" , V5) |
579 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmpy2s_s1pack, "iii" , "" , V5) |
580 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmpy2su_s0, "LLiii" , "" , V5) |
581 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vmpy2su_s1, "LLiii" , "" , V5) |
582 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vraddh, "iLLiLLi" , "" , V5) |
583 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vradduh, "iLLiLLi" , "" , V5) |
584 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmaci_s0, "LLiLLiLLiLLi" , "" , V5) |
585 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmaci_s0c, "LLiLLiLLiLLi" , "" , V5) |
586 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmacr_s0, "LLiLLiLLiLLi" , "" , V5) |
587 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmacr_s0c, "LLiLLiLLiLLi" , "" , V5) |
588 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmpyi_s0, "LLiLLiLLi" , "" , V5) |
589 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmpyi_s0c, "LLiLLiLLi" , "" , V5) |
590 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmpyr_s0, "LLiLLiLLi" , "" , V5) |
591 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmpyr_s0c, "LLiLLiLLi" , "" , V5) |
592 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmpys_acc_s1, "LLiLLiLLii" , "" , V5) |
593 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmpys_s1, "LLiLLii" , "" , V5) |
594 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrcmpys_s1rp, "iLLii" , "" , V5) |
595 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrmac_s0, "LLiLLiLLiLLi" , "" , V5) |
596 | TARGET_BUILTIN(__builtin_HEXAGON_M2_vrmpy_s0, "LLiLLiLLi" , "" , V5) |
597 | TARGET_BUILTIN(__builtin_HEXAGON_M2_xor_xacc, "iiii" , "" , V5) |
598 | TARGET_BUILTIN(__builtin_HEXAGON_M4_and_and, "iiii" , "" , V5) |
599 | TARGET_BUILTIN(__builtin_HEXAGON_M4_and_andn, "iiii" , "" , V5) |
600 | TARGET_BUILTIN(__builtin_HEXAGON_M4_and_or, "iiii" , "" , V5) |
601 | TARGET_BUILTIN(__builtin_HEXAGON_M4_and_xor, "iiii" , "" , V5) |
602 | TARGET_BUILTIN(__builtin_HEXAGON_M4_cmpyi_wh, "iLLii" , "" , V5) |
603 | TARGET_BUILTIN(__builtin_HEXAGON_M4_cmpyi_whc, "iLLii" , "" , V5) |
604 | TARGET_BUILTIN(__builtin_HEXAGON_M4_cmpyr_wh, "iLLii" , "" , V5) |
605 | TARGET_BUILTIN(__builtin_HEXAGON_M4_cmpyr_whc, "iLLii" , "" , V5) |
606 | TARGET_BUILTIN(__builtin_HEXAGON_M4_mac_up_s1_sat, "iiii" , "" , V5) |
607 | TARGET_BUILTIN(__builtin_HEXAGON_M4_mpyri_addi, "iUIiiUIi" , "" , V5) |
608 | TARGET_BUILTIN(__builtin_HEXAGON_M4_mpyri_addr, "iiiUIi" , "" , V5) |
609 | TARGET_BUILTIN(__builtin_HEXAGON_M4_mpyri_addr_u2, "iiUIii" , "" , V5) |
610 | TARGET_BUILTIN(__builtin_HEXAGON_M4_mpyrr_addi, "iUIiii" , "" , V5) |
611 | TARGET_BUILTIN(__builtin_HEXAGON_M4_mpyrr_addr, "iiii" , "" , V5) |
612 | TARGET_BUILTIN(__builtin_HEXAGON_M4_nac_up_s1_sat, "iiii" , "" , V5) |
613 | TARGET_BUILTIN(__builtin_HEXAGON_M4_or_and, "iiii" , "" , V5) |
614 | TARGET_BUILTIN(__builtin_HEXAGON_M4_or_andn, "iiii" , "" , V5) |
615 | TARGET_BUILTIN(__builtin_HEXAGON_M4_or_or, "iiii" , "" , V5) |
616 | TARGET_BUILTIN(__builtin_HEXAGON_M4_or_xor, "iiii" , "" , V5) |
617 | TARGET_BUILTIN(__builtin_HEXAGON_M4_pmpyw, "LLiii" , "" , V5) |
618 | TARGET_BUILTIN(__builtin_HEXAGON_M4_pmpyw_acc, "LLiLLiii" , "" , V5) |
619 | TARGET_BUILTIN(__builtin_HEXAGON_M4_vpmpyh, "LLiii" , "" , V5) |
620 | TARGET_BUILTIN(__builtin_HEXAGON_M4_vpmpyh_acc, "LLiLLiii" , "" , V5) |
621 | TARGET_BUILTIN(__builtin_HEXAGON_M4_vrmpyeh_acc_s0, "LLiLLiLLiLLi" , "" , V5) |
622 | TARGET_BUILTIN(__builtin_HEXAGON_M4_vrmpyeh_acc_s1, "LLiLLiLLiLLi" , "" , V5) |
623 | TARGET_BUILTIN(__builtin_HEXAGON_M4_vrmpyeh_s0, "LLiLLiLLi" , "" , V5) |
624 | TARGET_BUILTIN(__builtin_HEXAGON_M4_vrmpyeh_s1, "LLiLLiLLi" , "" , V5) |
625 | TARGET_BUILTIN(__builtin_HEXAGON_M4_vrmpyoh_acc_s0, "LLiLLiLLiLLi" , "" , V5) |
626 | TARGET_BUILTIN(__builtin_HEXAGON_M4_vrmpyoh_acc_s1, "LLiLLiLLiLLi" , "" , V5) |
627 | TARGET_BUILTIN(__builtin_HEXAGON_M4_vrmpyoh_s0, "LLiLLiLLi" , "" , V5) |
628 | TARGET_BUILTIN(__builtin_HEXAGON_M4_vrmpyoh_s1, "LLiLLiLLi" , "" , V5) |
629 | TARGET_BUILTIN(__builtin_HEXAGON_M4_xor_and, "iiii" , "" , V5) |
630 | TARGET_BUILTIN(__builtin_HEXAGON_M4_xor_andn, "iiii" , "" , V5) |
631 | TARGET_BUILTIN(__builtin_HEXAGON_M4_xor_or, "iiii" , "" , V5) |
632 | TARGET_BUILTIN(__builtin_HEXAGON_M4_xor_xacc, "LLiLLiLLiLLi" , "" , V5) |
633 | TARGET_BUILTIN(__builtin_HEXAGON_M5_vdmacbsu, "LLiLLiLLiLLi" , "" , V5) |
634 | TARGET_BUILTIN(__builtin_HEXAGON_M5_vdmpybsu, "LLiLLiLLi" , "" , V5) |
635 | TARGET_BUILTIN(__builtin_HEXAGON_M5_vmacbsu, "LLiLLiii" , "" , V5) |
636 | TARGET_BUILTIN(__builtin_HEXAGON_M5_vmacbuu, "LLiLLiii" , "" , V5) |
637 | TARGET_BUILTIN(__builtin_HEXAGON_M5_vmpybsu, "LLiii" , "" , V5) |
638 | TARGET_BUILTIN(__builtin_HEXAGON_M5_vmpybuu, "LLiii" , "" , V5) |
639 | TARGET_BUILTIN(__builtin_HEXAGON_M5_vrmacbsu, "LLiLLiLLiLLi" , "" , V5) |
640 | TARGET_BUILTIN(__builtin_HEXAGON_M5_vrmacbuu, "LLiLLiLLiLLi" , "" , V5) |
641 | TARGET_BUILTIN(__builtin_HEXAGON_M5_vrmpybsu, "LLiLLiLLi" , "" , V5) |
642 | TARGET_BUILTIN(__builtin_HEXAGON_M5_vrmpybuu, "LLiLLiLLi" , "" , V5) |
643 | TARGET_BUILTIN(__builtin_HEXAGON_S2_addasl_rrri, "iiiUIi" , "" , V5) |
644 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_p, "LLiLLiUIi" , "" , V5) |
645 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_p_acc, "LLiLLiLLiUIi" , "" , V5) |
646 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_p_and, "LLiLLiLLiUIi" , "" , V5) |
647 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_p_nac, "LLiLLiLLiUIi" , "" , V5) |
648 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_p_or, "LLiLLiLLiUIi" , "" , V5) |
649 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_p_xacc, "LLiLLiLLiUIi" , "" , V5) |
650 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_r, "iiUIi" , "" , V5) |
651 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_r_acc, "iiiUIi" , "" , V5) |
652 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_r_and, "iiiUIi" , "" , V5) |
653 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_r_nac, "iiiUIi" , "" , V5) |
654 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_r_or, "iiiUIi" , "" , V5) |
655 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_r_sat, "iiUIi" , "" , V5) |
656 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_r_xacc, "iiiUIi" , "" , V5) |
657 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_vh, "LLiLLiUIi" , "" , V5) |
658 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_i_vw, "LLiLLiUIi" , "" , V5) |
659 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_p, "LLiLLii" , "" , V5) |
660 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_p_acc, "LLiLLiLLii" , "" , V5) |
661 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_p_and, "LLiLLiLLii" , "" , V5) |
662 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_p_nac, "LLiLLiLLii" , "" , V5) |
663 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_p_or, "LLiLLiLLii" , "" , V5) |
664 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_p_xor, "LLiLLiLLii" , "" , V5) |
665 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_r, "iii" , "" , V5) |
666 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_r_acc, "iiii" , "" , V5) |
667 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_r_and, "iiii" , "" , V5) |
668 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_r_nac, "iiii" , "" , V5) |
669 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_r_or, "iiii" , "" , V5) |
670 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_r_sat, "iii" , "" , V5) |
671 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_vh, "LLiLLii" , "" , V5) |
672 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asl_r_vw, "LLiLLii" , "" , V5) |
673 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_p, "LLiLLiUIi" , "" , V5) |
674 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_p_acc, "LLiLLiLLiUIi" , "" , V5) |
675 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_p_and, "LLiLLiLLiUIi" , "" , V5) |
676 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_p_nac, "LLiLLiLLiUIi" , "" , V5) |
677 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_p_or, "LLiLLiLLiUIi" , "" , V5) |
678 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_p_rnd, "LLiLLiUIi" , "" , V5) |
679 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_p_rnd_goodsyntax, "LLiLLiUIi" , "" , V5) |
680 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_r, "iiUIi" , "" , V5) |
681 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_r_acc, "iiiUIi" , "" , V5) |
682 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_r_and, "iiiUIi" , "" , V5) |
683 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_r_nac, "iiiUIi" , "" , V5) |
684 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_r_or, "iiiUIi" , "" , V5) |
685 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_r_rnd, "iiUIi" , "" , V5) |
686 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_r_rnd_goodsyntax, "iiUIi" , "" , V5) |
687 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_svw_trun, "iLLiUIi" , "" , V5) |
688 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_vh, "LLiLLiUIi" , "" , V5) |
689 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_i_vw, "LLiLLiUIi" , "" , V5) |
690 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_p, "LLiLLii" , "" , V5) |
691 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_p_acc, "LLiLLiLLii" , "" , V5) |
692 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_p_and, "LLiLLiLLii" , "" , V5) |
693 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_p_nac, "LLiLLiLLii" , "" , V5) |
694 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_p_or, "LLiLLiLLii" , "" , V5) |
695 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_p_xor, "LLiLLiLLii" , "" , V5) |
696 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_r, "iii" , "" , V5) |
697 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_r_acc, "iiii" , "" , V5) |
698 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_r_and, "iiii" , "" , V5) |
699 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_r_nac, "iiii" , "" , V5) |
700 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_r_or, "iiii" , "" , V5) |
701 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_r_sat, "iii" , "" , V5) |
702 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_svw_trun, "iLLii" , "" , V5) |
703 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_vh, "LLiLLii" , "" , V5) |
704 | TARGET_BUILTIN(__builtin_HEXAGON_S2_asr_r_vw, "LLiLLii" , "" , V5) |
705 | TARGET_BUILTIN(__builtin_HEXAGON_S2_brev, "ii" , "" , V5) |
706 | TARGET_BUILTIN(__builtin_HEXAGON_S2_brevp, "LLiLLi" , "" , V5) |
707 | TARGET_BUILTIN(__builtin_HEXAGON_S2_cl0, "ii" , "" , V5) |
708 | TARGET_BUILTIN(__builtin_HEXAGON_S2_cl0p, "iLLi" , "" , V5) |
709 | TARGET_BUILTIN(__builtin_HEXAGON_S2_cl1, "ii" , "" , V5) |
710 | TARGET_BUILTIN(__builtin_HEXAGON_S2_cl1p, "iLLi" , "" , V5) |
711 | TARGET_BUILTIN(__builtin_HEXAGON_S2_clb, "ii" , "" , V5) |
712 | TARGET_BUILTIN(__builtin_HEXAGON_S2_clbnorm, "ii" , "" , V5) |
713 | TARGET_BUILTIN(__builtin_HEXAGON_S2_clbp, "iLLi" , "" , V5) |
714 | TARGET_BUILTIN(__builtin_HEXAGON_S2_clrbit_i, "iiUIi" , "" , V5) |
715 | TARGET_BUILTIN(__builtin_HEXAGON_S2_clrbit_r, "iii" , "" , V5) |
716 | TARGET_BUILTIN(__builtin_HEXAGON_S2_ct0, "ii" , "" , V5) |
717 | TARGET_BUILTIN(__builtin_HEXAGON_S2_ct0p, "iLLi" , "" , V5) |
718 | TARGET_BUILTIN(__builtin_HEXAGON_S2_ct1, "ii" , "" , V5) |
719 | TARGET_BUILTIN(__builtin_HEXAGON_S2_ct1p, "iLLi" , "" , V5) |
720 | TARGET_BUILTIN(__builtin_HEXAGON_S2_deinterleave, "LLiLLi" , "" , V5) |
721 | TARGET_BUILTIN(__builtin_HEXAGON_S2_extractu, "iiUIiUIi" , "" , V5) |
722 | TARGET_BUILTIN(__builtin_HEXAGON_S2_extractu_rp, "iiLLi" , "" , V5) |
723 | TARGET_BUILTIN(__builtin_HEXAGON_S2_extractup, "LLiLLiUIiUIi" , "" , V5) |
724 | TARGET_BUILTIN(__builtin_HEXAGON_S2_extractup_rp, "LLiLLiLLi" , "" , V5) |
725 | TARGET_BUILTIN(__builtin_HEXAGON_S2_insert, "iiiUIiUIi" , "" , V5) |
726 | TARGET_BUILTIN(__builtin_HEXAGON_S2_insert_rp, "iiiLLi" , "" , V5) |
727 | TARGET_BUILTIN(__builtin_HEXAGON_S2_insertp, "LLiLLiLLiUIiUIi" , "" , V5) |
728 | TARGET_BUILTIN(__builtin_HEXAGON_S2_insertp_rp, "LLiLLiLLiLLi" , "" , V5) |
729 | TARGET_BUILTIN(__builtin_HEXAGON_S2_interleave, "LLiLLi" , "" , V5) |
730 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lfsp, "LLiLLiLLi" , "" , V5) |
731 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_p, "LLiLLii" , "" , V5) |
732 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_p_acc, "LLiLLiLLii" , "" , V5) |
733 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_p_and, "LLiLLiLLii" , "" , V5) |
734 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_p_nac, "LLiLLiLLii" , "" , V5) |
735 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_p_or, "LLiLLiLLii" , "" , V5) |
736 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_p_xor, "LLiLLiLLii" , "" , V5) |
737 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_r, "iii" , "" , V5) |
738 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_r_acc, "iiii" , "" , V5) |
739 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_r_and, "iiii" , "" , V5) |
740 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_r_nac, "iiii" , "" , V5) |
741 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_r_or, "iiii" , "" , V5) |
742 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_vh, "LLiLLii" , "" , V5) |
743 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsl_r_vw, "LLiLLii" , "" , V5) |
744 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_p, "LLiLLiUIi" , "" , V5) |
745 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_p_acc, "LLiLLiLLiUIi" , "" , V5) |
746 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_p_and, "LLiLLiLLiUIi" , "" , V5) |
747 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_p_nac, "LLiLLiLLiUIi" , "" , V5) |
748 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_p_or, "LLiLLiLLiUIi" , "" , V5) |
749 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_p_xacc, "LLiLLiLLiUIi" , "" , V5) |
750 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_r, "iiUIi" , "" , V5) |
751 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_r_acc, "iiiUIi" , "" , V5) |
752 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_r_and, "iiiUIi" , "" , V5) |
753 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_r_nac, "iiiUIi" , "" , V5) |
754 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_r_or, "iiiUIi" , "" , V5) |
755 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_r_xacc, "iiiUIi" , "" , V5) |
756 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_vh, "LLiLLiUIi" , "" , V5) |
757 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_i_vw, "LLiLLiUIi" , "" , V5) |
758 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_p, "LLiLLii" , "" , V5) |
759 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_p_acc, "LLiLLiLLii" , "" , V5) |
760 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_p_and, "LLiLLiLLii" , "" , V5) |
761 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_p_nac, "LLiLLiLLii" , "" , V5) |
762 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_p_or, "LLiLLiLLii" , "" , V5) |
763 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_p_xor, "LLiLLiLLii" , "" , V5) |
764 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_r, "iii" , "" , V5) |
765 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_r_acc, "iiii" , "" , V5) |
766 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_r_and, "iiii" , "" , V5) |
767 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_r_nac, "iiii" , "" , V5) |
768 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_r_or, "iiii" , "" , V5) |
769 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_vh, "LLiLLii" , "" , V5) |
770 | TARGET_BUILTIN(__builtin_HEXAGON_S2_lsr_r_vw, "LLiLLii" , "" , V5) |
771 | TARGET_BUILTIN(__builtin_HEXAGON_S2_packhl, "LLiii" , "" , V5) |
772 | TARGET_BUILTIN(__builtin_HEXAGON_S2_parityp, "iLLiLLi" , "" , V5) |
773 | TARGET_BUILTIN(__builtin_HEXAGON_S2_setbit_i, "iiUIi" , "" , V5) |
774 | TARGET_BUILTIN(__builtin_HEXAGON_S2_setbit_r, "iii" , "" , V5) |
775 | TARGET_BUILTIN(__builtin_HEXAGON_S2_shuffeb, "LLiLLiLLi" , "" , V5) |
776 | TARGET_BUILTIN(__builtin_HEXAGON_S2_shuffeh, "LLiLLiLLi" , "" , V5) |
777 | TARGET_BUILTIN(__builtin_HEXAGON_S2_shuffob, "LLiLLiLLi" , "" , V5) |
778 | TARGET_BUILTIN(__builtin_HEXAGON_S2_shuffoh, "LLiLLiLLi" , "" , V5) |
779 | TARGET_BUILTIN(__builtin_HEXAGON_S2_svsathb, "ii" , "" , V5) |
780 | TARGET_BUILTIN(__builtin_HEXAGON_S2_svsathub, "ii" , "" , V5) |
781 | TARGET_BUILTIN(__builtin_HEXAGON_S2_tableidxb_goodsyntax, "iiiUIiUIi" , "" , V5) |
782 | TARGET_BUILTIN(__builtin_HEXAGON_S2_tableidxd_goodsyntax, "iiiUIiUIi" , "" , V5) |
783 | TARGET_BUILTIN(__builtin_HEXAGON_S2_tableidxh_goodsyntax, "iiiUIiUIi" , "" , V5) |
784 | TARGET_BUILTIN(__builtin_HEXAGON_S2_tableidxw_goodsyntax, "iiiUIiUIi" , "" , V5) |
785 | TARGET_BUILTIN(__builtin_HEXAGON_S2_togglebit_i, "iiUIi" , "" , V5) |
786 | TARGET_BUILTIN(__builtin_HEXAGON_S2_togglebit_r, "iii" , "" , V5) |
787 | TARGET_BUILTIN(__builtin_HEXAGON_S2_tstbit_i, "iiUIi" , "" , V5) |
788 | TARGET_BUILTIN(__builtin_HEXAGON_S2_tstbit_r, "iii" , "" , V5) |
789 | TARGET_BUILTIN(__builtin_HEXAGON_S2_valignib, "LLiLLiLLiUIi" , "" , V5) |
790 | TARGET_BUILTIN(__builtin_HEXAGON_S2_valignrb, "LLiLLiLLii" , "" , V5) |
791 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vcnegh, "LLiLLii" , "" , V5) |
792 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vcrotate, "LLiLLii" , "" , V5) |
793 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vrcnegh, "LLiLLiLLii" , "" , V5) |
794 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vrndpackwh, "iLLi" , "" , V5) |
795 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vrndpackwhs, "iLLi" , "" , V5) |
796 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsathb, "iLLi" , "" , V5) |
797 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsathb_nopack, "LLiLLi" , "" , V5) |
798 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsathub, "iLLi" , "" , V5) |
799 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsathub_nopack, "LLiLLi" , "" , V5) |
800 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsatwh, "iLLi" , "" , V5) |
801 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsatwh_nopack, "LLiLLi" , "" , V5) |
802 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsatwuh, "iLLi" , "" , V5) |
803 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsatwuh_nopack, "LLiLLi" , "" , V5) |
804 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsplatrb, "ii" , "" , V5) |
805 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsplatrh, "LLii" , "" , V5) |
806 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vspliceib, "LLiLLiLLiUIi" , "" , V5) |
807 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsplicerb, "LLiLLiLLii" , "" , V5) |
808 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsxtbh, "LLii" , "" , V5) |
809 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vsxthw, "LLii" , "" , V5) |
810 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vtrunehb, "iLLi" , "" , V5) |
811 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vtrunewh, "LLiLLiLLi" , "" , V5) |
812 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vtrunohb, "iLLi" , "" , V5) |
813 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vtrunowh, "LLiLLiLLi" , "" , V5) |
814 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vzxtbh, "LLii" , "" , V5) |
815 | TARGET_BUILTIN(__builtin_HEXAGON_S2_vzxthw, "LLii" , "" , V5) |
816 | TARGET_BUILTIN(__builtin_HEXAGON_S4_addaddi, "iiiIi" , "" , V5) |
817 | TARGET_BUILTIN(__builtin_HEXAGON_S4_addi_asl_ri, "iUIiiUIi" , "" , V5) |
818 | TARGET_BUILTIN(__builtin_HEXAGON_S4_addi_lsr_ri, "iUIiiUIi" , "" , V5) |
819 | TARGET_BUILTIN(__builtin_HEXAGON_S4_andi_asl_ri, "iUIiiUIi" , "" , V5) |
820 | TARGET_BUILTIN(__builtin_HEXAGON_S4_andi_lsr_ri, "iUIiiUIi" , "" , V5) |
821 | TARGET_BUILTIN(__builtin_HEXAGON_S4_clbaddi, "iiIi" , "" , V5) |
822 | TARGET_BUILTIN(__builtin_HEXAGON_S4_clbpaddi, "iLLiIi" , "" , V5) |
823 | TARGET_BUILTIN(__builtin_HEXAGON_S4_clbpnorm, "iLLi" , "" , V5) |
824 | TARGET_BUILTIN(__builtin_HEXAGON_S4_extract, "iiUIiUIi" , "" , V5) |
825 | TARGET_BUILTIN(__builtin_HEXAGON_S4_extract_rp, "iiLLi" , "" , V5) |
826 | TARGET_BUILTIN(__builtin_HEXAGON_S4_extractp, "LLiLLiUIiUIi" , "" , V5) |
827 | TARGET_BUILTIN(__builtin_HEXAGON_S4_extractp_rp, "LLiLLiLLi" , "" , V5) |
828 | TARGET_BUILTIN(__builtin_HEXAGON_S4_lsli, "iIii" , "" , V5) |
829 | TARGET_BUILTIN(__builtin_HEXAGON_S4_ntstbit_i, "iiUIi" , "" , V5) |
830 | TARGET_BUILTIN(__builtin_HEXAGON_S4_ntstbit_r, "iii" , "" , V5) |
831 | TARGET_BUILTIN(__builtin_HEXAGON_S4_or_andi, "iiiIi" , "" , V5) |
832 | TARGET_BUILTIN(__builtin_HEXAGON_S4_or_andix, "iiiIi" , "" , V5) |
833 | TARGET_BUILTIN(__builtin_HEXAGON_S4_or_ori, "iiiIi" , "" , V5) |
834 | TARGET_BUILTIN(__builtin_HEXAGON_S4_ori_asl_ri, "iUIiiUIi" , "" , V5) |
835 | TARGET_BUILTIN(__builtin_HEXAGON_S4_ori_lsr_ri, "iUIiiUIi" , "" , V5) |
836 | TARGET_BUILTIN(__builtin_HEXAGON_S4_parity, "iii" , "" , V5) |
837 | TARGET_BUILTIN(__builtin_HEXAGON_S4_subaddi, "iiIii" , "" , V5) |
838 | TARGET_BUILTIN(__builtin_HEXAGON_S4_subi_asl_ri, "iUIiiUIi" , "" , V5) |
839 | TARGET_BUILTIN(__builtin_HEXAGON_S4_subi_lsr_ri, "iUIiiUIi" , "" , V5) |
840 | TARGET_BUILTIN(__builtin_HEXAGON_S4_vrcrotate, "LLiLLiiUIi" , "" , V5) |
841 | TARGET_BUILTIN(__builtin_HEXAGON_S4_vrcrotate_acc, "LLiLLiLLiiUIi" , "" , V5) |
842 | TARGET_BUILTIN(__builtin_HEXAGON_S4_vxaddsubh, "LLiLLiLLi" , "" , V5) |
843 | TARGET_BUILTIN(__builtin_HEXAGON_S4_vxaddsubhr, "LLiLLiLLi" , "" , V5) |
844 | TARGET_BUILTIN(__builtin_HEXAGON_S4_vxaddsubw, "LLiLLiLLi" , "" , V5) |
845 | TARGET_BUILTIN(__builtin_HEXAGON_S4_vxsubaddh, "LLiLLiLLi" , "" , V5) |
846 | TARGET_BUILTIN(__builtin_HEXAGON_S4_vxsubaddhr, "LLiLLiLLi" , "" , V5) |
847 | TARGET_BUILTIN(__builtin_HEXAGON_S4_vxsubaddw, "LLiLLiLLi" , "" , V5) |
848 | TARGET_BUILTIN(__builtin_HEXAGON_S5_asrhub_rnd_sat_goodsyntax, "iLLiUIi" , "" , V5) |
849 | TARGET_BUILTIN(__builtin_HEXAGON_S5_asrhub_sat, "iLLiUIi" , "" , V5) |
850 | TARGET_BUILTIN(__builtin_HEXAGON_S5_popcountp, "iLLi" , "" , V5) |
851 | TARGET_BUILTIN(__builtin_HEXAGON_S5_vasrhrnd_goodsyntax, "LLiLLiUIi" , "" , V5) |
852 | TARGET_BUILTIN(__builtin_HEXAGON_Y2_dccleana, "vv*" , "" , V5) |
853 | TARGET_BUILTIN(__builtin_HEXAGON_Y2_dccleaninva, "vv*" , "" , V5) |
854 | TARGET_BUILTIN(__builtin_HEXAGON_Y2_dcfetch, "vv*" , "" , V5) |
855 | TARGET_BUILTIN(__builtin_HEXAGON_Y2_dcinva, "vv*" , "" , V5) |
856 | TARGET_BUILTIN(__builtin_HEXAGON_Y2_dczeroa, "vv*" , "" , V5) |
857 | TARGET_BUILTIN(__builtin_HEXAGON_Y4_l2fetch, "vv*i" , "" , V5) |
858 | TARGET_BUILTIN(__builtin_HEXAGON_Y5_l2fetch, "vv*LLi" , "" , V5) |
859 | |
860 | // V60 Scalar Instructions. |
861 | |
862 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_p, "LLiLLiUIi" , "" , V60) |
863 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_p_acc, "LLiLLiLLiUIi" , "" , V60) |
864 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_p_and, "LLiLLiLLiUIi" , "" , V60) |
865 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_p_nac, "LLiLLiLLiUIi" , "" , V60) |
866 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_p_or, "LLiLLiLLiUIi" , "" , V60) |
867 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_p_xacc, "LLiLLiLLiUIi" , "" , V60) |
868 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_r, "iiUIi" , "" , V60) |
869 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_r_acc, "iiiUIi" , "" , V60) |
870 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_r_and, "iiiUIi" , "" , V60) |
871 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_r_nac, "iiiUIi" , "" , V60) |
872 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_r_or, "iiiUIi" , "" , V60) |
873 | TARGET_BUILTIN(__builtin_HEXAGON_S6_rol_i_r_xacc, "iiiUIi" , "" , V60) |
874 | |
875 | // V62 Scalar Instructions. |
876 | |
877 | TARGET_BUILTIN(__builtin_HEXAGON_M6_vabsdiffb, "LLiLLiLLi" , "" , V62) |
878 | TARGET_BUILTIN(__builtin_HEXAGON_M6_vabsdiffub, "LLiLLiLLi" , "" , V62) |
879 | TARGET_BUILTIN(__builtin_HEXAGON_S6_vsplatrbp, "LLii" , "" , V62) |
880 | TARGET_BUILTIN(__builtin_HEXAGON_S6_vtrunehb_ppp, "LLiLLiLLi" , "" , V62) |
881 | TARGET_BUILTIN(__builtin_HEXAGON_S6_vtrunohb_ppp, "LLiLLiLLi" , "" , V62) |
882 | |
883 | // V65 Scalar Instructions. |
884 | |
885 | TARGET_BUILTIN(__builtin_HEXAGON_A6_vcmpbeq_notany, "iLLiLLi" , "" , V65) |
886 | |
887 | // V66 Scalar Instructions. |
888 | |
889 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfadd, "ddd" , "" , V66) |
890 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfsub, "ddd" , "" , V66) |
891 | TARGET_BUILTIN(__builtin_HEXAGON_M2_mnaci, "iiii" , "" , V66) |
892 | TARGET_BUILTIN(__builtin_HEXAGON_S2_mask, "iUIiUIi" , "" , V66) |
893 | |
894 | // V67 Scalar Instructions. |
895 | |
896 | TARGET_BUILTIN(__builtin_HEXAGON_A7_clip, "iiUIi" , "" , "audio" ) |
897 | TARGET_BUILTIN(__builtin_HEXAGON_A7_croundd_ri, "LLiLLiUIi" , "" , "audio" ) |
898 | TARGET_BUILTIN(__builtin_HEXAGON_A7_croundd_rr, "LLiLLii" , "" , "audio" ) |
899 | TARGET_BUILTIN(__builtin_HEXAGON_A7_vclip, "LLiLLiUIi" , "" , "audio" ) |
900 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfmax, "ddd" , "" , V67) |
901 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfmin, "ddd" , "" , V67) |
902 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfmpyfix, "ddd" , "" , V67) |
903 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfmpyhh, "dddd" , "" , V67) |
904 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfmpylh, "dddd" , "" , V67) |
905 | TARGET_BUILTIN(__builtin_HEXAGON_F2_dfmpyll, "ddd" , "" , V67) |
906 | TARGET_BUILTIN(__builtin_HEXAGON_M7_dcmpyiw, "LLiLLiLLi" , "" , "audio" ) |
907 | TARGET_BUILTIN(__builtin_HEXAGON_M7_dcmpyiw_acc, "LLiLLiLLiLLi" , "" , "audio" ) |
908 | TARGET_BUILTIN(__builtin_HEXAGON_M7_dcmpyiwc, "LLiLLiLLi" , "" , "audio" ) |
909 | TARGET_BUILTIN(__builtin_HEXAGON_M7_dcmpyiwc_acc, "LLiLLiLLiLLi" , "" , "audio" ) |
910 | TARGET_BUILTIN(__builtin_HEXAGON_M7_dcmpyrw, "LLiLLiLLi" , "" , "audio" ) |
911 | TARGET_BUILTIN(__builtin_HEXAGON_M7_dcmpyrw_acc, "LLiLLiLLiLLi" , "" , "audio" ) |
912 | TARGET_BUILTIN(__builtin_HEXAGON_M7_dcmpyrwc, "LLiLLiLLi" , "" , "audio" ) |
913 | TARGET_BUILTIN(__builtin_HEXAGON_M7_dcmpyrwc_acc, "LLiLLiLLiLLi" , "" , "audio" ) |
914 | TARGET_BUILTIN(__builtin_HEXAGON_M7_vdmpy, "LLiLLiLLi" , "" , V67) |
915 | TARGET_BUILTIN(__builtin_HEXAGON_M7_vdmpy_acc, "LLiLLiLLiLLi" , "" , V67) |
916 | TARGET_BUILTIN(__builtin_HEXAGON_M7_wcmpyiw, "iLLiLLi" , "" , "audio" ) |
917 | TARGET_BUILTIN(__builtin_HEXAGON_M7_wcmpyiw_rnd, "iLLiLLi" , "" , "audio" ) |
918 | TARGET_BUILTIN(__builtin_HEXAGON_M7_wcmpyiwc, "iLLiLLi" , "" , "audio" ) |
919 | TARGET_BUILTIN(__builtin_HEXAGON_M7_wcmpyiwc_rnd, "iLLiLLi" , "" , "audio" ) |
920 | TARGET_BUILTIN(__builtin_HEXAGON_M7_wcmpyrw, "iLLiLLi" , "" , "audio" ) |
921 | TARGET_BUILTIN(__builtin_HEXAGON_M7_wcmpyrw_rnd, "iLLiLLi" , "" , "audio" ) |
922 | TARGET_BUILTIN(__builtin_HEXAGON_M7_wcmpyrwc, "iLLiLLi" , "" , "audio" ) |
923 | TARGET_BUILTIN(__builtin_HEXAGON_M7_wcmpyrwc_rnd, "iLLiLLi" , "" , "audio" ) |
924 | |
925 | // V68 Scalar Instructions. |
926 | |
927 | TARGET_BUILTIN(__builtin_HEXAGON_Y6_dmlink, "vv*v*" , "" , V68) |
928 | TARGET_BUILTIN(__builtin_HEXAGON_Y6_dmpause, "i" , "" , V68) |
929 | TARGET_BUILTIN(__builtin_HEXAGON_Y6_dmpoll, "i" , "" , V68) |
930 | TARGET_BUILTIN(__builtin_HEXAGON_Y6_dmresume, "vv*" , "" , V68) |
931 | TARGET_BUILTIN(__builtin_HEXAGON_Y6_dmstart, "vv*" , "" , V68) |
932 | TARGET_BUILTIN(__builtin_HEXAGON_Y6_dmwait, "i" , "" , V68) |
933 | |
934 | // V60 HVX Instructions. |
935 | |
936 | TARGET_BUILTIN(__builtin_HEXAGON_V6_extractw, "iV16ii" , "" , HVXV60) |
937 | TARGET_BUILTIN(__builtin_HEXAGON_V6_extractw_128B, "iV32ii" , "" , HVXV60) |
938 | TARGET_BUILTIN(__builtin_HEXAGON_V6_hi, "V16iV32i" , "" , HVXV60) |
939 | TARGET_BUILTIN(__builtin_HEXAGON_V6_hi_128B, "V32iV64i" , "" , HVXV60) |
940 | TARGET_BUILTIN(__builtin_HEXAGON_V6_lo, "V16iV32i" , "" , HVXV60) |
941 | TARGET_BUILTIN(__builtin_HEXAGON_V6_lo_128B, "V32iV64i" , "" , HVXV60) |
942 | TARGET_BUILTIN(__builtin_HEXAGON_V6_lvsplatw, "V16ii" , "" , HVXV60) |
943 | TARGET_BUILTIN(__builtin_HEXAGON_V6_lvsplatw_128B, "V32ii" , "" , HVXV60) |
944 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_and, "V64bV64bV64b" , "" , HVXV60) |
945 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_and_128B, "V128bV128bV128b" , "" , HVXV60) |
946 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_and_n, "V64bV64bV64b" , "" , HVXV60) |
947 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_and_n_128B, "V128bV128bV128b" , "" , HVXV60) |
948 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_not, "V64bV64b" , "" , HVXV60) |
949 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_not_128B, "V128bV128b" , "" , HVXV60) |
950 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_or, "V64bV64bV64b" , "" , HVXV60) |
951 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_or_128B, "V128bV128bV128b" , "" , HVXV60) |
952 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_or_n, "V64bV64bV64b" , "" , HVXV60) |
953 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_or_n_128B, "V128bV128bV128b" , "" , HVXV60) |
954 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_scalar2, "V64bi" , "" , HVXV60) |
955 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_scalar2_128B, "V128bi" , "" , HVXV60) |
956 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_xor, "V64bV64bV64b" , "" , HVXV60) |
957 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_xor_128B, "V128bV128bV128b" , "" , HVXV60) |
958 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vS32b_nqpred_ai, "vV64bv*V16i" , "" , HVXV60) |
959 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vS32b_nqpred_ai_128B, "vV128bv*V32i" , "" , HVXV60) |
960 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai, "vV64bv*V16i" , "" , HVXV60) |
961 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vS32b_nt_nqpred_ai_128B, "vV128bv*V32i" , "" , HVXV60) |
962 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vS32b_nt_qpred_ai, "vV64bv*V16i" , "" , HVXV60) |
963 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vS32b_nt_qpred_ai_128B, "vV128bv*V32i" , "" , HVXV60) |
964 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vS32b_qpred_ai, "vV64bv*V16i" , "" , HVXV60) |
965 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vS32b_qpred_ai_128B, "vV128bv*V32i" , "" , HVXV60) |
966 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsdiffh, "V16iV16iV16i" , "" , HVXV60) |
967 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsdiffh_128B, "V32iV32iV32i" , "" , HVXV60) |
968 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsdiffub, "V16iV16iV16i" , "" , HVXV60) |
969 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsdiffub_128B, "V32iV32iV32i" , "" , HVXV60) |
970 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsdiffuh, "V16iV16iV16i" , "" , HVXV60) |
971 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsdiffuh_128B, "V32iV32iV32i" , "" , HVXV60) |
972 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsdiffw, "V16iV16iV16i" , "" , HVXV60) |
973 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsdiffw_128B, "V32iV32iV32i" , "" , HVXV60) |
974 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsh, "V16iV16i" , "" , HVXV60) |
975 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsh_128B, "V32iV32i" , "" , HVXV60) |
976 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsh_sat, "V16iV16i" , "" , HVXV60) |
977 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsh_sat_128B, "V32iV32i" , "" , HVXV60) |
978 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsw, "V16iV16i" , "" , HVXV60) |
979 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsw_128B, "V32iV32i" , "" , HVXV60) |
980 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsw_sat, "V16iV16i" , "" , HVXV60) |
981 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsw_sat_128B, "V32iV32i" , "" , HVXV60) |
982 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddb, "V16iV16iV16i" , "" , HVXV60) |
983 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddb_128B, "V32iV32iV32i" , "" , HVXV60) |
984 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddb_dv, "V32iV32iV32i" , "" , HVXV60) |
985 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddb_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
986 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddbnq, "V16iV64bV16iV16i" , "" , HVXV60) |
987 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddbnq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
988 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddbq, "V16iV64bV16iV16i" , "" , HVXV60) |
989 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddbq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
990 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddh, "V16iV16iV16i" , "" , HVXV60) |
991 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddh_128B, "V32iV32iV32i" , "" , HVXV60) |
992 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddh_dv, "V32iV32iV32i" , "" , HVXV60) |
993 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddh_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
994 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhnq, "V16iV64bV16iV16i" , "" , HVXV60) |
995 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhnq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
996 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhq, "V16iV64bV16iV16i" , "" , HVXV60) |
997 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
998 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhsat, "V16iV16iV16i" , "" , HVXV60) |
999 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhsat_128B, "V32iV32iV32i" , "" , HVXV60) |
1000 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhsat_dv, "V32iV32iV32i" , "" , HVXV60) |
1001 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhsat_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1002 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhw, "V32iV16iV16i" , "" , HVXV60) |
1003 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhw_128B, "V64iV32iV32i" , "" , HVXV60) |
1004 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddubh, "V32iV16iV16i" , "" , HVXV60) |
1005 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddubh_128B, "V64iV32iV32i" , "" , HVXV60) |
1006 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddubsat, "V16iV16iV16i" , "" , HVXV60) |
1007 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddubsat_128B, "V32iV32iV32i" , "" , HVXV60) |
1008 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddubsat_dv, "V32iV32iV32i" , "" , HVXV60) |
1009 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddubsat_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1010 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduhsat, "V16iV16iV16i" , "" , HVXV60) |
1011 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduhsat_128B, "V32iV32iV32i" , "" , HVXV60) |
1012 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduhsat_dv, "V32iV32iV32i" , "" , HVXV60) |
1013 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduhsat_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1014 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduhw, "V32iV16iV16i" , "" , HVXV60) |
1015 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduhw_128B, "V64iV32iV32i" , "" , HVXV60) |
1016 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddw, "V16iV16iV16i" , "" , HVXV60) |
1017 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddw_128B, "V32iV32iV32i" , "" , HVXV60) |
1018 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddw_dv, "V32iV32iV32i" , "" , HVXV60) |
1019 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddw_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1020 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddwnq, "V16iV64bV16iV16i" , "" , HVXV60) |
1021 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddwnq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
1022 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddwq, "V16iV64bV16iV16i" , "" , HVXV60) |
1023 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddwq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
1024 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddwsat, "V16iV16iV16i" , "" , HVXV60) |
1025 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddwsat_128B, "V32iV32iV32i" , "" , HVXV60) |
1026 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddwsat_dv, "V32iV32iV32i" , "" , HVXV60) |
1027 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddwsat_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1028 | TARGET_BUILTIN(__builtin_HEXAGON_V6_valignb, "V16iV16iV16ii" , "" , HVXV60) |
1029 | TARGET_BUILTIN(__builtin_HEXAGON_V6_valignb_128B, "V32iV32iV32ii" , "" , HVXV60) |
1030 | TARGET_BUILTIN(__builtin_HEXAGON_V6_valignbi, "V16iV16iV16iUIi" , "" , HVXV60) |
1031 | TARGET_BUILTIN(__builtin_HEXAGON_V6_valignbi_128B, "V32iV32iV32iUIi" , "" , HVXV60) |
1032 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vand, "V16iV16iV16i" , "" , HVXV60) |
1033 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vand_128B, "V32iV32iV32i" , "" , HVXV60) |
1034 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandqrt, "V16iV64bi" , "" , HVXV60) |
1035 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandqrt_128B, "V32iV128bi" , "" , HVXV60) |
1036 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandqrt_acc, "V16iV16iV64bi" , "" , HVXV60) |
1037 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandqrt_acc_128B, "V32iV32iV128bi" , "" , HVXV60) |
1038 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandvrt, "V64bV16ii" , "" , HVXV60) |
1039 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandvrt_128B, "V128bV32ii" , "" , HVXV60) |
1040 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandvrt_acc, "V64bV64bV16ii" , "" , HVXV60) |
1041 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandvrt_acc_128B, "V128bV128bV32ii" , "" , HVXV60) |
1042 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslh, "V16iV16ii" , "" , HVXV60) |
1043 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslh_128B, "V32iV32ii" , "" , HVXV60) |
1044 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslhv, "V16iV16iV16i" , "" , HVXV60) |
1045 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslhv_128B, "V32iV32iV32i" , "" , HVXV60) |
1046 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslw, "V16iV16ii" , "" , HVXV60) |
1047 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslw_128B, "V32iV32ii" , "" , HVXV60) |
1048 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslw_acc, "V16iV16iV16ii" , "" , HVXV60) |
1049 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslw_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1050 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslwv, "V16iV16iV16i" , "" , HVXV60) |
1051 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslwv_128B, "V32iV32iV32i" , "" , HVXV60) |
1052 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrh, "V16iV16ii" , "" , HVXV60) |
1053 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrh_128B, "V32iV32ii" , "" , HVXV60) |
1054 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrhbrndsat, "V16iV16iV16ii" , "" , HVXV60) |
1055 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrhbrndsat_128B, "V32iV32iV32ii" , "" , HVXV60) |
1056 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrhubrndsat, "V16iV16iV16ii" , "" , HVXV60) |
1057 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrhubrndsat_128B, "V32iV32iV32ii" , "" , HVXV60) |
1058 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrhubsat, "V16iV16iV16ii" , "" , HVXV60) |
1059 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrhubsat_128B, "V32iV32iV32ii" , "" , HVXV60) |
1060 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrhv, "V16iV16iV16i" , "" , HVXV60) |
1061 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrhv_128B, "V32iV32iV32i" , "" , HVXV60) |
1062 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrw, "V16iV16ii" , "" , HVXV60) |
1063 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrw_128B, "V32iV32ii" , "" , HVXV60) |
1064 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrw_acc, "V16iV16iV16ii" , "" , HVXV60) |
1065 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrw_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1066 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwh, "V16iV16iV16ii" , "" , HVXV60) |
1067 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwh_128B, "V32iV32iV32ii" , "" , HVXV60) |
1068 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwhrndsat, "V16iV16iV16ii" , "" , HVXV60) |
1069 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwhrndsat_128B, "V32iV32iV32ii" , "" , HVXV60) |
1070 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwhsat, "V16iV16iV16ii" , "" , HVXV60) |
1071 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwhsat_128B, "V32iV32iV32ii" , "" , HVXV60) |
1072 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwuhsat, "V16iV16iV16ii" , "" , HVXV60) |
1073 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwuhsat_128B, "V32iV32iV32ii" , "" , HVXV60) |
1074 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwv, "V16iV16iV16i" , "" , HVXV60) |
1075 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwv_128B, "V32iV32iV32i" , "" , HVXV60) |
1076 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vassign, "V16iV16i" , "" , HVXV60) |
1077 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vassign_128B, "V32iV32i" , "" , HVXV60) |
1078 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vassignp, "V32iV32i" , "" , HVXV60) |
1079 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vassignp_128B, "V64iV64i" , "" , HVXV60) |
1080 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgh, "V16iV16iV16i" , "" , HVXV60) |
1081 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgh_128B, "V32iV32iV32i" , "" , HVXV60) |
1082 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavghrnd, "V16iV16iV16i" , "" , HVXV60) |
1083 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavghrnd_128B, "V32iV32iV32i" , "" , HVXV60) |
1084 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgub, "V16iV16iV16i" , "" , HVXV60) |
1085 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgub_128B, "V32iV32iV32i" , "" , HVXV60) |
1086 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgubrnd, "V16iV16iV16i" , "" , HVXV60) |
1087 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgubrnd_128B, "V32iV32iV32i" , "" , HVXV60) |
1088 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavguh, "V16iV16iV16i" , "" , HVXV60) |
1089 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavguh_128B, "V32iV32iV32i" , "" , HVXV60) |
1090 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavguhrnd, "V16iV16iV16i" , "" , HVXV60) |
1091 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavguhrnd_128B, "V32iV32iV32i" , "" , HVXV60) |
1092 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgw, "V16iV16iV16i" , "" , HVXV60) |
1093 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgw_128B, "V32iV32iV32i" , "" , HVXV60) |
1094 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgwrnd, "V16iV16iV16i" , "" , HVXV60) |
1095 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgwrnd_128B, "V32iV32iV32i" , "" , HVXV60) |
1096 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcl0h, "V16iV16i" , "" , HVXV60) |
1097 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcl0h_128B, "V32iV32i" , "" , HVXV60) |
1098 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcl0w, "V16iV16i" , "" , HVXV60) |
1099 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcl0w_128B, "V32iV32i" , "" , HVXV60) |
1100 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcombine, "V32iV16iV16i" , "" , HVXV60) |
1101 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcombine_128B, "V64iV32iV32i" , "" , HVXV60) |
1102 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vd0, "V16i" , "" , HVXV60) |
1103 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vd0_128B, "V32i" , "" , HVXV60) |
1104 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdealb, "V16iV16i" , "" , HVXV60) |
1105 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdealb_128B, "V32iV32i" , "" , HVXV60) |
1106 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdealb4w, "V16iV16iV16i" , "" , HVXV60) |
1107 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdealb4w_128B, "V32iV32iV32i" , "" , HVXV60) |
1108 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdealh, "V16iV16i" , "" , HVXV60) |
1109 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdealh_128B, "V32iV32i" , "" , HVXV60) |
1110 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdealvdd, "V32iV16iV16ii" , "" , HVXV60) |
1111 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdealvdd_128B, "V64iV32iV32ii" , "" , HVXV60) |
1112 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdelta, "V16iV16iV16i" , "" , HVXV60) |
1113 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdelta_128B, "V32iV32iV32i" , "" , HVXV60) |
1114 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpybus, "V16iV16ii" , "" , HVXV60) |
1115 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpybus_128B, "V32iV32ii" , "" , HVXV60) |
1116 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpybus_acc, "V16iV16iV16ii" , "" , HVXV60) |
1117 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpybus_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1118 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpybus_dv, "V32iV32ii" , "" , HVXV60) |
1119 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpybus_dv_128B, "V64iV64ii" , "" , HVXV60) |
1120 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpybus_dv_acc, "V32iV32iV32ii" , "" , HVXV60) |
1121 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpybus_dv_acc_128B, "V64iV64iV64ii" , "" , HVXV60) |
1122 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhb, "V16iV16ii" , "" , HVXV60) |
1123 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhb_128B, "V32iV32ii" , "" , HVXV60) |
1124 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhb_acc, "V16iV16iV16ii" , "" , HVXV60) |
1125 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhb_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1126 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhb_dv, "V32iV32ii" , "" , HVXV60) |
1127 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhb_dv_128B, "V64iV64ii" , "" , HVXV60) |
1128 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhb_dv_acc, "V32iV32iV32ii" , "" , HVXV60) |
1129 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhb_dv_acc_128B, "V64iV64iV64ii" , "" , HVXV60) |
1130 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhisat, "V16iV32ii" , "" , HVXV60) |
1131 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhisat_128B, "V32iV64ii" , "" , HVXV60) |
1132 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhisat_acc, "V16iV16iV32ii" , "" , HVXV60) |
1133 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhisat_acc_128B, "V32iV32iV64ii" , "" , HVXV60) |
1134 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsat, "V16iV16ii" , "" , HVXV60) |
1135 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsat_128B, "V32iV32ii" , "" , HVXV60) |
1136 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsat_acc, "V16iV16iV16ii" , "" , HVXV60) |
1137 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsat_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1138 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsuisat, "V16iV32ii" , "" , HVXV60) |
1139 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsuisat_128B, "V32iV64ii" , "" , HVXV60) |
1140 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsuisat_acc, "V16iV16iV32ii" , "" , HVXV60) |
1141 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsuisat_acc_128B, "V32iV32iV64ii" , "" , HVXV60) |
1142 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsusat, "V16iV16ii" , "" , HVXV60) |
1143 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsusat_128B, "V32iV32ii" , "" , HVXV60) |
1144 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsusat_acc, "V16iV16iV16ii" , "" , HVXV60) |
1145 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhsusat_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1146 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhvsat, "V16iV16iV16i" , "" , HVXV60) |
1147 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhvsat_128B, "V32iV32iV32i" , "" , HVXV60) |
1148 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhvsat_acc, "V16iV16iV16iV16i" , "" , HVXV60) |
1149 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpyhvsat_acc_128B, "V32iV32iV32iV32i" , "" , HVXV60) |
1150 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdsaduh, "V32iV32ii" , "" , HVXV60) |
1151 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdsaduh_128B, "V64iV64ii" , "" , HVXV60) |
1152 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdsaduh_acc, "V32iV32iV32ii" , "" , HVXV60) |
1153 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdsaduh_acc_128B, "V64iV64iV64ii" , "" , HVXV60) |
1154 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqb, "V64bV16iV16i" , "" , HVXV60) |
1155 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqb_128B, "V128bV32iV32i" , "" , HVXV60) |
1156 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqb_and, "V64bV64bV16iV16i" , "" , HVXV60) |
1157 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqb_and_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1158 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqb_or, "V64bV64bV16iV16i" , "" , HVXV60) |
1159 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqb_or_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1160 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqb_xor, "V64bV64bV16iV16i" , "" , HVXV60) |
1161 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqb_xor_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1162 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqh, "V64bV16iV16i" , "" , HVXV60) |
1163 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqh_128B, "V128bV32iV32i" , "" , HVXV60) |
1164 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqh_and, "V64bV64bV16iV16i" , "" , HVXV60) |
1165 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqh_and_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1166 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqh_or, "V64bV64bV16iV16i" , "" , HVXV60) |
1167 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqh_or_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1168 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqh_xor, "V64bV64bV16iV16i" , "" , HVXV60) |
1169 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqh_xor_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1170 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqw, "V64bV16iV16i" , "" , HVXV60) |
1171 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqw_128B, "V128bV32iV32i" , "" , HVXV60) |
1172 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqw_and, "V64bV64bV16iV16i" , "" , HVXV60) |
1173 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqw_and_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1174 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqw_or, "V64bV64bV16iV16i" , "" , HVXV60) |
1175 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqw_or_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1176 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqw_xor, "V64bV64bV16iV16i" , "" , HVXV60) |
1177 | TARGET_BUILTIN(__builtin_HEXAGON_V6_veqw_xor_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1178 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtb, "V64bV16iV16i" , "" , HVXV60) |
1179 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtb_128B, "V128bV32iV32i" , "" , HVXV60) |
1180 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtb_and, "V64bV64bV16iV16i" , "" , HVXV60) |
1181 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtb_and_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1182 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtb_or, "V64bV64bV16iV16i" , "" , HVXV60) |
1183 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtb_or_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1184 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtb_xor, "V64bV64bV16iV16i" , "" , HVXV60) |
1185 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtb_xor_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1186 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgth, "V64bV16iV16i" , "" , HVXV60) |
1187 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgth_128B, "V128bV32iV32i" , "" , HVXV60) |
1188 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgth_and, "V64bV64bV16iV16i" , "" , HVXV60) |
1189 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgth_and_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1190 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgth_or, "V64bV64bV16iV16i" , "" , HVXV60) |
1191 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgth_or_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1192 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgth_xor, "V64bV64bV16iV16i" , "" , HVXV60) |
1193 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgth_xor_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1194 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtub, "V64bV16iV16i" , "" , HVXV60) |
1195 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtub_128B, "V128bV32iV32i" , "" , HVXV60) |
1196 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtub_and, "V64bV64bV16iV16i" , "" , HVXV60) |
1197 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtub_and_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1198 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtub_or, "V64bV64bV16iV16i" , "" , HVXV60) |
1199 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtub_or_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1200 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtub_xor, "V64bV64bV16iV16i" , "" , HVXV60) |
1201 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtub_xor_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1202 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuh, "V64bV16iV16i" , "" , HVXV60) |
1203 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuh_128B, "V128bV32iV32i" , "" , HVXV60) |
1204 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuh_and, "V64bV64bV16iV16i" , "" , HVXV60) |
1205 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuh_and_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1206 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuh_or, "V64bV64bV16iV16i" , "" , HVXV60) |
1207 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuh_or_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1208 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuh_xor, "V64bV64bV16iV16i" , "" , HVXV60) |
1209 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuh_xor_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1210 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuw, "V64bV16iV16i" , "" , HVXV60) |
1211 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuw_128B, "V128bV32iV32i" , "" , HVXV60) |
1212 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuw_and, "V64bV64bV16iV16i" , "" , HVXV60) |
1213 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuw_and_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1214 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuw_or, "V64bV64bV16iV16i" , "" , HVXV60) |
1215 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuw_or_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1216 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuw_xor, "V64bV64bV16iV16i" , "" , HVXV60) |
1217 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtuw_xor_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1218 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtw, "V64bV16iV16i" , "" , HVXV60) |
1219 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtw_128B, "V128bV32iV32i" , "" , HVXV60) |
1220 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtw_and, "V64bV64bV16iV16i" , "" , HVXV60) |
1221 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtw_and_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1222 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtw_or, "V64bV64bV16iV16i" , "" , HVXV60) |
1223 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtw_or_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1224 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtw_xor, "V64bV64bV16iV16i" , "" , HVXV60) |
1225 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtw_xor_128B, "V128bV128bV32iV32i" , "" , HVXV60) |
1226 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vinsertwr, "V16iV16ii" , "" , HVXV60) |
1227 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vinsertwr_128B, "V32iV32ii" , "" , HVXV60) |
1228 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlalignb, "V16iV16iV16ii" , "" , HVXV60) |
1229 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlalignb_128B, "V32iV32iV32ii" , "" , HVXV60) |
1230 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlalignbi, "V16iV16iV16iUIi" , "" , HVXV60) |
1231 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlalignbi_128B, "V32iV32iV32iUIi" , "" , HVXV60) |
1232 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlsrh, "V16iV16ii" , "" , HVXV60) |
1233 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlsrh_128B, "V32iV32ii" , "" , HVXV60) |
1234 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlsrhv, "V16iV16iV16i" , "" , HVXV60) |
1235 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlsrhv_128B, "V32iV32iV32i" , "" , HVXV60) |
1236 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlsrw, "V16iV16ii" , "" , HVXV60) |
1237 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlsrw_128B, "V32iV32ii" , "" , HVXV60) |
1238 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlsrwv, "V16iV16iV16i" , "" , HVXV60) |
1239 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlsrwv_128B, "V32iV32iV32i" , "" , HVXV60) |
1240 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvvb, "V16iV16iV16ii" , "" , HVXV60) |
1241 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvvb_128B, "V32iV32iV32ii" , "" , HVXV60) |
1242 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvvb_oracc, "V16iV16iV16iV16ii" , "" , HVXV60) |
1243 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvvb_oracc_128B, "V32iV32iV32iV32ii" , "" , HVXV60) |
1244 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvwh, "V32iV16iV16ii" , "" , HVXV60) |
1245 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvwh_128B, "V64iV32iV32ii" , "" , HVXV60) |
1246 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvwh_oracc, "V32iV32iV16iV16ii" , "" , HVXV60) |
1247 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvwh_oracc_128B, "V64iV64iV32iV32ii" , "" , HVXV60) |
1248 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaxh, "V16iV16iV16i" , "" , HVXV60) |
1249 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaxh_128B, "V32iV32iV32i" , "" , HVXV60) |
1250 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaxub, "V16iV16iV16i" , "" , HVXV60) |
1251 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaxub_128B, "V32iV32iV32i" , "" , HVXV60) |
1252 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaxuh, "V16iV16iV16i" , "" , HVXV60) |
1253 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaxuh_128B, "V32iV32iV32i" , "" , HVXV60) |
1254 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaxw, "V16iV16iV16i" , "" , HVXV60) |
1255 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaxw_128B, "V32iV32iV32i" , "" , HVXV60) |
1256 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vminh, "V16iV16iV16i" , "" , HVXV60) |
1257 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vminh_128B, "V32iV32iV32i" , "" , HVXV60) |
1258 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vminub, "V16iV16iV16i" , "" , HVXV60) |
1259 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vminub_128B, "V32iV32iV32i" , "" , HVXV60) |
1260 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vminuh, "V16iV16iV16i" , "" , HVXV60) |
1261 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vminuh_128B, "V32iV32iV32i" , "" , HVXV60) |
1262 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vminw, "V16iV16iV16i" , "" , HVXV60) |
1263 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vminw_128B, "V32iV32iV32i" , "" , HVXV60) |
1264 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabus, "V32iV32ii" , "" , HVXV60) |
1265 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabus_128B, "V64iV64ii" , "" , HVXV60) |
1266 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabus_acc, "V32iV32iV32ii" , "" , HVXV60) |
1267 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabus_acc_128B, "V64iV64iV64ii" , "" , HVXV60) |
1268 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabusv, "V32iV32iV32i" , "" , HVXV60) |
1269 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabusv_128B, "V64iV64iV64i" , "" , HVXV60) |
1270 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabuuv, "V32iV32iV32i" , "" , HVXV60) |
1271 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabuuv_128B, "V64iV64iV64i" , "" , HVXV60) |
1272 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpahb, "V32iV32ii" , "" , HVXV60) |
1273 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpahb_128B, "V64iV64ii" , "" , HVXV60) |
1274 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpahb_acc, "V32iV32iV32ii" , "" , HVXV60) |
1275 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpahb_acc_128B, "V64iV64iV64ii" , "" , HVXV60) |
1276 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybus, "V32iV16ii" , "" , HVXV60) |
1277 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybus_128B, "V64iV32ii" , "" , HVXV60) |
1278 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybus_acc, "V32iV32iV16ii" , "" , HVXV60) |
1279 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybus_acc_128B, "V64iV64iV32ii" , "" , HVXV60) |
1280 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybusv, "V32iV16iV16i" , "" , HVXV60) |
1281 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybusv_128B, "V64iV32iV32i" , "" , HVXV60) |
1282 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybusv_acc, "V32iV32iV16iV16i" , "" , HVXV60) |
1283 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybusv_acc_128B, "V64iV64iV32iV32i" , "" , HVXV60) |
1284 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybv, "V32iV16iV16i" , "" , HVXV60) |
1285 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybv_128B, "V64iV32iV32i" , "" , HVXV60) |
1286 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybv_acc, "V32iV32iV16iV16i" , "" , HVXV60) |
1287 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpybv_acc_128B, "V64iV64iV32iV32i" , "" , HVXV60) |
1288 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyewuh, "V16iV16iV16i" , "" , HVXV60) |
1289 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyewuh_128B, "V32iV32iV32i" , "" , HVXV60) |
1290 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyh, "V32iV16ii" , "" , HVXV60) |
1291 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyh_128B, "V64iV32ii" , "" , HVXV60) |
1292 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhsat_acc, "V32iV32iV16ii" , "" , HVXV60) |
1293 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhsat_acc_128B, "V64iV64iV32ii" , "" , HVXV60) |
1294 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhsrs, "V16iV16ii" , "" , HVXV60) |
1295 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhsrs_128B, "V32iV32ii" , "" , HVXV60) |
1296 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhss, "V16iV16ii" , "" , HVXV60) |
1297 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhss_128B, "V32iV32ii" , "" , HVXV60) |
1298 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhus, "V32iV16iV16i" , "" , HVXV60) |
1299 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhus_128B, "V64iV32iV32i" , "" , HVXV60) |
1300 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhus_acc, "V32iV32iV16iV16i" , "" , HVXV60) |
1301 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhus_acc_128B, "V64iV64iV32iV32i" , "" , HVXV60) |
1302 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhv, "V32iV16iV16i" , "" , HVXV60) |
1303 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhv_128B, "V64iV32iV32i" , "" , HVXV60) |
1304 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhv_acc, "V32iV32iV16iV16i" , "" , HVXV60) |
1305 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhv_acc_128B, "V64iV64iV32iV32i" , "" , HVXV60) |
1306 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhvsrs, "V16iV16iV16i" , "" , HVXV60) |
1307 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyhvsrs_128B, "V32iV32iV32i" , "" , HVXV60) |
1308 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyieoh, "V16iV16iV16i" , "" , HVXV60) |
1309 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyieoh_128B, "V32iV32iV32i" , "" , HVXV60) |
1310 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiewh_acc, "V16iV16iV16iV16i" , "" , HVXV60) |
1311 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiewh_acc_128B, "V32iV32iV32iV32i" , "" , HVXV60) |
1312 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiewuh, "V16iV16iV16i" , "" , HVXV60) |
1313 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiewuh_128B, "V32iV32iV32i" , "" , HVXV60) |
1314 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiewuh_acc, "V16iV16iV16iV16i" , "" , HVXV60) |
1315 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiewuh_acc_128B, "V32iV32iV32iV32i" , "" , HVXV60) |
1316 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyih, "V16iV16iV16i" , "" , HVXV60) |
1317 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyih_128B, "V32iV32iV32i" , "" , HVXV60) |
1318 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyih_acc, "V16iV16iV16iV16i" , "" , HVXV60) |
1319 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyih_acc_128B, "V32iV32iV32iV32i" , "" , HVXV60) |
1320 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyihb, "V16iV16ii" , "" , HVXV60) |
1321 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyihb_128B, "V32iV32ii" , "" , HVXV60) |
1322 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyihb_acc, "V16iV16iV16ii" , "" , HVXV60) |
1323 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyihb_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1324 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiowh, "V16iV16iV16i" , "" , HVXV60) |
1325 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiowh_128B, "V32iV32iV32i" , "" , HVXV60) |
1326 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwb, "V16iV16ii" , "" , HVXV60) |
1327 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwb_128B, "V32iV32ii" , "" , HVXV60) |
1328 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwb_acc, "V16iV16iV16ii" , "" , HVXV60) |
1329 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwb_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1330 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwh, "V16iV16ii" , "" , HVXV60) |
1331 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwh_128B, "V32iV32ii" , "" , HVXV60) |
1332 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwh_acc, "V16iV16iV16ii" , "" , HVXV60) |
1333 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwh_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1334 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyowh, "V16iV16iV16i" , "" , HVXV60) |
1335 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyowh_128B, "V32iV32iV32i" , "" , HVXV60) |
1336 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyowh_rnd, "V16iV16iV16i" , "" , HVXV60) |
1337 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyowh_rnd_128B, "V32iV32iV32i" , "" , HVXV60) |
1338 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyowh_rnd_sacc, "V16iV16iV16iV16i" , "" , HVXV60) |
1339 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyowh_rnd_sacc_128B, "V32iV32iV32iV32i" , "" , HVXV60) |
1340 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyowh_sacc, "V16iV16iV16iV16i" , "" , HVXV60) |
1341 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyowh_sacc_128B, "V32iV32iV32iV32i" , "" , HVXV60) |
1342 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyub, "V32iV16ii" , "" , HVXV60) |
1343 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyub_128B, "V64iV32ii" , "" , HVXV60) |
1344 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyub_acc, "V32iV32iV16ii" , "" , HVXV60) |
1345 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyub_acc_128B, "V64iV64iV32ii" , "" , HVXV60) |
1346 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyubv, "V32iV16iV16i" , "" , HVXV60) |
1347 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyubv_128B, "V64iV32iV32i" , "" , HVXV60) |
1348 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyubv_acc, "V32iV32iV16iV16i" , "" , HVXV60) |
1349 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyubv_acc_128B, "V64iV64iV32iV32i" , "" , HVXV60) |
1350 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuh, "V32iV16ii" , "" , HVXV60) |
1351 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuh_128B, "V64iV32ii" , "" , HVXV60) |
1352 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuh_acc, "V32iV32iV16ii" , "" , HVXV60) |
1353 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuh_acc_128B, "V64iV64iV32ii" , "" , HVXV60) |
1354 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhv, "V32iV16iV16i" , "" , HVXV60) |
1355 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhv_128B, "V64iV32iV32i" , "" , HVXV60) |
1356 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhv_acc, "V32iV32iV16iV16i" , "" , HVXV60) |
1357 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhv_acc_128B, "V64iV64iV32iV32i" , "" , HVXV60) |
1358 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmux, "V16iV64bV16iV16i" , "" , HVXV60) |
1359 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmux_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
1360 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnavgh, "V16iV16iV16i" , "" , HVXV60) |
1361 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnavgh_128B, "V32iV32iV32i" , "" , HVXV60) |
1362 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnavgub, "V16iV16iV16i" , "" , HVXV60) |
1363 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnavgub_128B, "V32iV32iV32i" , "" , HVXV60) |
1364 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnavgw, "V16iV16iV16i" , "" , HVXV60) |
1365 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnavgw_128B, "V32iV32iV32i" , "" , HVXV60) |
1366 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnormamth, "V16iV16i" , "" , HVXV60) |
1367 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnormamth_128B, "V32iV32i" , "" , HVXV60) |
1368 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnormamtw, "V16iV16i" , "" , HVXV60) |
1369 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnormamtw_128B, "V32iV32i" , "" , HVXV60) |
1370 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnot, "V16iV16i" , "" , HVXV60) |
1371 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnot_128B, "V32iV32i" , "" , HVXV60) |
1372 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vor, "V16iV16iV16i" , "" , HVXV60) |
1373 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vor_128B, "V32iV32iV32i" , "" , HVXV60) |
1374 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackeb, "V16iV16iV16i" , "" , HVXV60) |
1375 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackeb_128B, "V32iV32iV32i" , "" , HVXV60) |
1376 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackeh, "V16iV16iV16i" , "" , HVXV60) |
1377 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackeh_128B, "V32iV32iV32i" , "" , HVXV60) |
1378 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackhb_sat, "V16iV16iV16i" , "" , HVXV60) |
1379 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackhb_sat_128B, "V32iV32iV32i" , "" , HVXV60) |
1380 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackhub_sat, "V16iV16iV16i" , "" , HVXV60) |
1381 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackhub_sat_128B, "V32iV32iV32i" , "" , HVXV60) |
1382 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackob, "V16iV16iV16i" , "" , HVXV60) |
1383 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackob_128B, "V32iV32iV32i" , "" , HVXV60) |
1384 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackoh, "V16iV16iV16i" , "" , HVXV60) |
1385 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackoh_128B, "V32iV32iV32i" , "" , HVXV60) |
1386 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackwh_sat, "V16iV16iV16i" , "" , HVXV60) |
1387 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackwh_sat_128B, "V32iV32iV32i" , "" , HVXV60) |
1388 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackwuh_sat, "V16iV16iV16i" , "" , HVXV60) |
1389 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpackwuh_sat_128B, "V32iV32iV32i" , "" , HVXV60) |
1390 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpopcounth, "V16iV16i" , "" , HVXV60) |
1391 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vpopcounth_128B, "V32iV32i" , "" , HVXV60) |
1392 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrdelta, "V16iV16iV16i" , "" , HVXV60) |
1393 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrdelta_128B, "V32iV32iV32i" , "" , HVXV60) |
1394 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybus, "V16iV16ii" , "" , HVXV60) |
1395 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybus_128B, "V32iV32ii" , "" , HVXV60) |
1396 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybus_acc, "V16iV16iV16ii" , "" , HVXV60) |
1397 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybus_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1398 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybusi, "V32iV32iiUIi" , "" , HVXV60) |
1399 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybusi_128B, "V64iV64iiUIi" , "" , HVXV60) |
1400 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybusi_acc, "V32iV32iV32iiUIi" , "" , HVXV60) |
1401 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybusi_acc_128B, "V64iV64iV64iiUIi" , "" , HVXV60) |
1402 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybusv, "V16iV16iV16i" , "" , HVXV60) |
1403 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybusv_128B, "V32iV32iV32i" , "" , HVXV60) |
1404 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybusv_acc, "V16iV16iV16iV16i" , "" , HVXV60) |
1405 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybusv_acc_128B, "V32iV32iV32iV32i" , "" , HVXV60) |
1406 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybv, "V16iV16iV16i" , "" , HVXV60) |
1407 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybv_128B, "V32iV32iV32i" , "" , HVXV60) |
1408 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybv_acc, "V16iV16iV16iV16i" , "" , HVXV60) |
1409 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpybv_acc_128B, "V32iV32iV32iV32i" , "" , HVXV60) |
1410 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub, "V16iV16ii" , "" , HVXV60) |
1411 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_128B, "V32iV32ii" , "" , HVXV60) |
1412 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_acc, "V16iV16iV16ii" , "" , HVXV60) |
1413 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyub_acc_128B, "V32iV32iV32ii" , "" , HVXV60) |
1414 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyubi, "V32iV32iiUIi" , "" , HVXV60) |
1415 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyubi_128B, "V64iV64iiUIi" , "" , HVXV60) |
1416 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyubi_acc, "V32iV32iV32iiUIi" , "" , HVXV60) |
1417 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyubi_acc_128B, "V64iV64iV64iiUIi" , "" , HVXV60) |
1418 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyubv, "V16iV16iV16i" , "" , HVXV60) |
1419 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyubv_128B, "V32iV32iV32i" , "" , HVXV60) |
1420 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyubv_acc, "V16iV16iV16iV16i" , "" , HVXV60) |
1421 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrmpyubv_acc_128B, "V32iV32iV32iV32i" , "" , HVXV60) |
1422 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vror, "V16iV16ii" , "" , HVXV60) |
1423 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vror_128B, "V32iV32ii" , "" , HVXV60) |
1424 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vroundhb, "V16iV16iV16i" , "" , HVXV60) |
1425 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vroundhb_128B, "V32iV32iV32i" , "" , HVXV60) |
1426 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vroundhub, "V16iV16iV16i" , "" , HVXV60) |
1427 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vroundhub_128B, "V32iV32iV32i" , "" , HVXV60) |
1428 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vroundwh, "V16iV16iV16i" , "" , HVXV60) |
1429 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vroundwh_128B, "V32iV32iV32i" , "" , HVXV60) |
1430 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vroundwuh, "V16iV16iV16i" , "" , HVXV60) |
1431 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vroundwuh_128B, "V32iV32iV32i" , "" , HVXV60) |
1432 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrsadubi, "V32iV32iiUIi" , "" , HVXV60) |
1433 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrsadubi_128B, "V64iV64iiUIi" , "" , HVXV60) |
1434 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrsadubi_acc, "V32iV32iV32iiUIi" , "" , HVXV60) |
1435 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrsadubi_acc_128B, "V64iV64iV64iiUIi" , "" , HVXV60) |
1436 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsathub, "V16iV16iV16i" , "" , HVXV60) |
1437 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsathub_128B, "V32iV32iV32i" , "" , HVXV60) |
1438 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsatwh, "V16iV16iV16i" , "" , HVXV60) |
1439 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsatwh_128B, "V32iV32iV32i" , "" , HVXV60) |
1440 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsb, "V32iV16i" , "" , HVXV60) |
1441 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsb_128B, "V64iV32i" , "" , HVXV60) |
1442 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsh, "V32iV16i" , "" , HVXV60) |
1443 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsh_128B, "V64iV32i" , "" , HVXV60) |
1444 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshufeh, "V16iV16iV16i" , "" , HVXV60) |
1445 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshufeh_128B, "V32iV32iV32i" , "" , HVXV60) |
1446 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshuffb, "V16iV16i" , "" , HVXV60) |
1447 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshuffb_128B, "V32iV32i" , "" , HVXV60) |
1448 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshuffeb, "V16iV16iV16i" , "" , HVXV60) |
1449 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshuffeb_128B, "V32iV32iV32i" , "" , HVXV60) |
1450 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshuffh, "V16iV16i" , "" , HVXV60) |
1451 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshuffh_128B, "V32iV32i" , "" , HVXV60) |
1452 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshuffob, "V16iV16iV16i" , "" , HVXV60) |
1453 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshuffob_128B, "V32iV32iV32i" , "" , HVXV60) |
1454 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshuffvdd, "V32iV16iV16ii" , "" , HVXV60) |
1455 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshuffvdd_128B, "V64iV32iV32ii" , "" , HVXV60) |
1456 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshufoeb, "V32iV16iV16i" , "" , HVXV60) |
1457 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshufoeb_128B, "V64iV32iV32i" , "" , HVXV60) |
1458 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshufoeh, "V32iV16iV16i" , "" , HVXV60) |
1459 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshufoeh_128B, "V64iV32iV32i" , "" , HVXV60) |
1460 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshufoh, "V16iV16iV16i" , "" , HVXV60) |
1461 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vshufoh_128B, "V32iV32iV32i" , "" , HVXV60) |
1462 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubb, "V16iV16iV16i" , "" , HVXV60) |
1463 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubb_128B, "V32iV32iV32i" , "" , HVXV60) |
1464 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubb_dv, "V32iV32iV32i" , "" , HVXV60) |
1465 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubb_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1466 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubbnq, "V16iV64bV16iV16i" , "" , HVXV60) |
1467 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubbnq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
1468 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubbq, "V16iV64bV16iV16i" , "" , HVXV60) |
1469 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubbq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
1470 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubh, "V16iV16iV16i" , "" , HVXV60) |
1471 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubh_128B, "V32iV32iV32i" , "" , HVXV60) |
1472 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubh_dv, "V32iV32iV32i" , "" , HVXV60) |
1473 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubh_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1474 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubhnq, "V16iV64bV16iV16i" , "" , HVXV60) |
1475 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubhnq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
1476 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubhq, "V16iV64bV16iV16i" , "" , HVXV60) |
1477 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubhq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
1478 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubhsat, "V16iV16iV16i" , "" , HVXV60) |
1479 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubhsat_128B, "V32iV32iV32i" , "" , HVXV60) |
1480 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubhsat_dv, "V32iV32iV32i" , "" , HVXV60) |
1481 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubhsat_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1482 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubhw, "V32iV16iV16i" , "" , HVXV60) |
1483 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubhw_128B, "V64iV32iV32i" , "" , HVXV60) |
1484 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsububh, "V32iV16iV16i" , "" , HVXV60) |
1485 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsububh_128B, "V64iV32iV32i" , "" , HVXV60) |
1486 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsububsat, "V16iV16iV16i" , "" , HVXV60) |
1487 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsububsat_128B, "V32iV32iV32i" , "" , HVXV60) |
1488 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsububsat_dv, "V32iV32iV32i" , "" , HVXV60) |
1489 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsububsat_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1490 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubuhsat, "V16iV16iV16i" , "" , HVXV60) |
1491 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubuhsat_128B, "V32iV32iV32i" , "" , HVXV60) |
1492 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubuhsat_dv, "V32iV32iV32i" , "" , HVXV60) |
1493 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubuhsat_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1494 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubuhw, "V32iV16iV16i" , "" , HVXV60) |
1495 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubuhw_128B, "V64iV32iV32i" , "" , HVXV60) |
1496 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubw, "V16iV16iV16i" , "" , HVXV60) |
1497 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubw_128B, "V32iV32iV32i" , "" , HVXV60) |
1498 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubw_dv, "V32iV32iV32i" , "" , HVXV60) |
1499 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubw_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1500 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubwnq, "V16iV64bV16iV16i" , "" , HVXV60) |
1501 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubwnq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
1502 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubwq, "V16iV64bV16iV16i" , "" , HVXV60) |
1503 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubwq_128B, "V32iV128bV32iV32i" , "" , HVXV60) |
1504 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubwsat, "V16iV16iV16i" , "" , HVXV60) |
1505 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubwsat_128B, "V32iV32iV32i" , "" , HVXV60) |
1506 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubwsat_dv, "V32iV32iV32i" , "" , HVXV60) |
1507 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubwsat_dv_128B, "V64iV64iV64i" , "" , HVXV60) |
1508 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vswap, "V32iV64bV16iV16i" , "" , HVXV60) |
1509 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vswap_128B, "V64iV128bV32iV32i" , "" , HVXV60) |
1510 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpyb, "V32iV32ii" , "" , HVXV60) |
1511 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpyb_128B, "V64iV64ii" , "" , HVXV60) |
1512 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpyb_acc, "V32iV32iV32ii" , "" , HVXV60) |
1513 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpyb_acc_128B, "V64iV64iV64ii" , "" , HVXV60) |
1514 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpybus, "V32iV32ii" , "" , HVXV60) |
1515 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpybus_128B, "V64iV64ii" , "" , HVXV60) |
1516 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpybus_acc, "V32iV32iV32ii" , "" , HVXV60) |
1517 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpybus_acc_128B, "V64iV64iV64ii" , "" , HVXV60) |
1518 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpyhb, "V32iV32ii" , "" , HVXV60) |
1519 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpyhb_128B, "V64iV64ii" , "" , HVXV60) |
1520 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpyhb_acc, "V32iV32iV32ii" , "" , HVXV60) |
1521 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vtmpyhb_acc_128B, "V64iV64iV64ii" , "" , HVXV60) |
1522 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackb, "V32iV16i" , "" , HVXV60) |
1523 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackb_128B, "V64iV32i" , "" , HVXV60) |
1524 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackh, "V32iV16i" , "" , HVXV60) |
1525 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackh_128B, "V64iV32i" , "" , HVXV60) |
1526 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackob, "V32iV32iV16i" , "" , HVXV60) |
1527 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackob_128B, "V64iV64iV32i" , "" , HVXV60) |
1528 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackoh, "V32iV32iV16i" , "" , HVXV60) |
1529 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackoh_128B, "V64iV64iV32i" , "" , HVXV60) |
1530 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackub, "V32iV16i" , "" , HVXV60) |
1531 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackub_128B, "V64iV32i" , "" , HVXV60) |
1532 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackuh, "V32iV16i" , "" , HVXV60) |
1533 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vunpackuh_128B, "V64iV32i" , "" , HVXV60) |
1534 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vxor, "V16iV16iV16i" , "" , HVXV60) |
1535 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vxor_128B, "V32iV32iV32i" , "" , HVXV60) |
1536 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vzb, "V32iV16i" , "" , HVXV60) |
1537 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vzb_128B, "V64iV32i" , "" , HVXV60) |
1538 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vzh, "V32iV16i" , "" , HVXV60) |
1539 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vzh_128B, "V64iV32i" , "" , HVXV60) |
1540 | |
1541 | // V62 HVX Instructions. |
1542 | |
1543 | TARGET_BUILTIN(__builtin_HEXAGON_V6_lvsplatb, "V16ii" , "" , HVXV62) |
1544 | TARGET_BUILTIN(__builtin_HEXAGON_V6_lvsplatb_128B, "V32ii" , "" , HVXV62) |
1545 | TARGET_BUILTIN(__builtin_HEXAGON_V6_lvsplath, "V16ii" , "" , HVXV62) |
1546 | TARGET_BUILTIN(__builtin_HEXAGON_V6_lvsplath_128B, "V32ii" , "" , HVXV62) |
1547 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_scalar2v2, "V64bi" , "" , HVXV62) |
1548 | TARGET_BUILTIN(__builtin_HEXAGON_V6_pred_scalar2v2_128B, "V128bi" , "" , HVXV62) |
1549 | TARGET_BUILTIN(__builtin_HEXAGON_V6_shuffeqh, "V64bV64bV64b" , "" , HVXV62) |
1550 | TARGET_BUILTIN(__builtin_HEXAGON_V6_shuffeqh_128B, "V128bV128bV128b" , "" , HVXV62) |
1551 | TARGET_BUILTIN(__builtin_HEXAGON_V6_shuffeqw, "V64bV64bV64b" , "" , HVXV62) |
1552 | TARGET_BUILTIN(__builtin_HEXAGON_V6_shuffeqw_128B, "V128bV128bV128b" , "" , HVXV62) |
1553 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddbsat, "V16iV16iV16i" , "" , HVXV62) |
1554 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddbsat_128B, "V32iV32iV32i" , "" , HVXV62) |
1555 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddbsat_dv, "V32iV32iV32i" , "" , HVXV62) |
1556 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddbsat_dv_128B, "V64iV64iV64i" , "" , HVXV62) |
1557 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddcarry, "V16iV16iV16iv*" , "" , HVXV62) |
1558 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddcarry_128B, "V32iV32iV32iv*" , "" , HVXV62) |
1559 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddclbh, "V16iV16iV16i" , "" , HVXV62) |
1560 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddclbh_128B, "V32iV32iV32i" , "" , HVXV62) |
1561 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddclbw, "V16iV16iV16i" , "" , HVXV62) |
1562 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddclbw_128B, "V32iV32iV32i" , "" , HVXV62) |
1563 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhw_acc, "V32iV32iV16iV16i" , "" , HVXV62) |
1564 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddhw_acc_128B, "V64iV64iV32iV32i" , "" , HVXV62) |
1565 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddubh_acc, "V32iV32iV16iV16i" , "" , HVXV62) |
1566 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddubh_acc_128B, "V64iV64iV32iV32i" , "" , HVXV62) |
1567 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddububb_sat, "V16iV16iV16i" , "" , HVXV62) |
1568 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddububb_sat_128B, "V32iV32iV32i" , "" , HVXV62) |
1569 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduhw_acc, "V32iV32iV16iV16i" , "" , HVXV62) |
1570 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduhw_acc_128B, "V64iV64iV32iV32i" , "" , HVXV62) |
1571 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduwsat, "V16iV16iV16i" , "" , HVXV62) |
1572 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduwsat_128B, "V32iV32iV32i" , "" , HVXV62) |
1573 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduwsat_dv, "V32iV32iV32i" , "" , HVXV62) |
1574 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadduwsat_dv_128B, "V64iV64iV64i" , "" , HVXV62) |
1575 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandnqrt, "V16iV64bi" , "" , HVXV62) |
1576 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandnqrt_128B, "V32iV128bi" , "" , HVXV62) |
1577 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandnqrt_acc, "V16iV16iV64bi" , "" , HVXV62) |
1578 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandnqrt_acc_128B, "V32iV32iV128bi" , "" , HVXV62) |
1579 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandvnqv, "V16iV64bV16i" , "" , HVXV62) |
1580 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandvnqv_128B, "V32iV128bV32i" , "" , HVXV62) |
1581 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandvqv, "V16iV64bV16i" , "" , HVXV62) |
1582 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vandvqv_128B, "V32iV128bV32i" , "" , HVXV62) |
1583 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrhbsat, "V16iV16iV16ii" , "" , HVXV62) |
1584 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrhbsat_128B, "V32iV32iV32ii" , "" , HVXV62) |
1585 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasruwuhrndsat, "V16iV16iV16ii" , "" , HVXV62) |
1586 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasruwuhrndsat_128B, "V32iV32iV32ii" , "" , HVXV62) |
1587 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwuhrndsat, "V16iV16iV16ii" , "" , HVXV62) |
1588 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrwuhrndsat_128B, "V32iV32iV32ii" , "" , HVXV62) |
1589 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlsrb, "V16iV16ii" , "" , HVXV62) |
1590 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlsrb_128B, "V32iV32ii" , "" , HVXV62) |
1591 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvvb_nm, "V16iV16iV16ii" , "" , HVXV62) |
1592 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvvb_nm_128B, "V32iV32iV32ii" , "" , HVXV62) |
1593 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvvb_oracci, "V16iV16iV16iV16iUIi" , "" , HVXV62) |
1594 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvvb_oracci_128B, "V32iV32iV32iV32iUIi" , "" , HVXV62) |
1595 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvvbi, "V16iV16iV16iUIi" , "" , HVXV62) |
1596 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvvbi_128B, "V32iV32iV32iUIi" , "" , HVXV62) |
1597 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvwh_nm, "V32iV16iV16ii" , "" , HVXV62) |
1598 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvwh_nm_128B, "V64iV32iV32ii" , "" , HVXV62) |
1599 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvwh_oracci, "V32iV32iV16iV16iUIi" , "" , HVXV62) |
1600 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvwh_oracci_128B, "V64iV64iV32iV32iUIi" , "" , HVXV62) |
1601 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvwhi, "V32iV16iV16iUIi" , "" , HVXV62) |
1602 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlutvwhi_128B, "V64iV32iV32iUIi" , "" , HVXV62) |
1603 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaxb, "V16iV16iV16i" , "" , HVXV62) |
1604 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmaxb_128B, "V32iV32iV32i" , "" , HVXV62) |
1605 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vminb, "V16iV16iV16i" , "" , HVXV62) |
1606 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vminb_128B, "V32iV32iV32i" , "" , HVXV62) |
1607 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpauhb, "V32iV32ii" , "" , HVXV62) |
1608 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpauhb_128B, "V64iV64ii" , "" , HVXV62) |
1609 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpauhb_acc, "V32iV32iV32ii" , "" , HVXV62) |
1610 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpauhb_acc_128B, "V64iV64iV64ii" , "" , HVXV62) |
1611 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyewuh_64, "V32iV16iV16i" , "" , HVXV62) |
1612 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyewuh_64_128B, "V64iV32iV32i" , "" , HVXV62) |
1613 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwub, "V16iV16ii" , "" , HVXV62) |
1614 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwub_128B, "V32iV32ii" , "" , HVXV62) |
1615 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwub_acc, "V16iV16iV16ii" , "" , HVXV62) |
1616 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyiwub_acc_128B, "V32iV32iV32ii" , "" , HVXV62) |
1617 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyowh_64_acc, "V32iV32iV16iV16i" , "" , HVXV62) |
1618 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyowh_64_acc_128B, "V64iV64iV32iV32i" , "" , HVXV62) |
1619 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrounduhub, "V16iV16iV16i" , "" , HVXV62) |
1620 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrounduhub_128B, "V32iV32iV32i" , "" , HVXV62) |
1621 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrounduwuh, "V16iV16iV16i" , "" , HVXV62) |
1622 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrounduwuh_128B, "V32iV32iV32i" , "" , HVXV62) |
1623 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsatuwuh, "V16iV16iV16i" , "" , HVXV62) |
1624 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsatuwuh_128B, "V32iV32iV32i" , "" , HVXV62) |
1625 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubbsat, "V16iV16iV16i" , "" , HVXV62) |
1626 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubbsat_128B, "V32iV32iV32i" , "" , HVXV62) |
1627 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubbsat_dv, "V32iV32iV32i" , "" , HVXV62) |
1628 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubbsat_dv_128B, "V64iV64iV64i" , "" , HVXV62) |
1629 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubcarry, "V16iV16iV16iv*" , "" , HVXV62) |
1630 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubcarry_128B, "V32iV32iV32iv*" , "" , HVXV62) |
1631 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubububb_sat, "V16iV16iV16i" , "" , HVXV62) |
1632 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubububb_sat_128B, "V32iV32iV32i" , "" , HVXV62) |
1633 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubuwsat, "V16iV16iV16i" , "" , HVXV62) |
1634 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubuwsat_128B, "V32iV32iV32i" , "" , HVXV62) |
1635 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubuwsat_dv, "V32iV32iV32i" , "" , HVXV62) |
1636 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubuwsat_dv_128B, "V64iV64iV64i" , "" , HVXV62) |
1637 | |
1638 | // V65 HVX Instructions. |
1639 | |
1640 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsb, "V16iV16i" , "" , HVXV65) |
1641 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsb_128B, "V32iV32i" , "" , HVXV65) |
1642 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsb_sat, "V16iV16i" , "" , HVXV65) |
1643 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabsb_sat_128B, "V32iV32i" , "" , HVXV65) |
1644 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslh_acc, "V16iV16iV16ii" , "" , HVXV65) |
1645 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaslh_acc_128B, "V32iV32iV32ii" , "" , HVXV65) |
1646 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrh_acc, "V16iV16iV16ii" , "" , HVXV65) |
1647 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrh_acc_128B, "V32iV32iV32ii" , "" , HVXV65) |
1648 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasruhubrndsat, "V16iV16iV16ii" , "" , HVXV65) |
1649 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasruhubrndsat_128B, "V32iV32iV32ii" , "" , HVXV65) |
1650 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasruhubsat, "V16iV16iV16ii" , "" , HVXV65) |
1651 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasruhubsat_128B, "V32iV32iV32ii" , "" , HVXV65) |
1652 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasruwuhsat, "V16iV16iV16ii" , "" , HVXV65) |
1653 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasruwuhsat_128B, "V32iV32iV32ii" , "" , HVXV65) |
1654 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgb, "V16iV16iV16i" , "" , HVXV65) |
1655 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgb_128B, "V32iV32iV32i" , "" , HVXV65) |
1656 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgbrnd, "V16iV16iV16i" , "" , HVXV65) |
1657 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavgbrnd_128B, "V32iV32iV32i" , "" , HVXV65) |
1658 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavguw, "V16iV16iV16i" , "" , HVXV65) |
1659 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavguw_128B, "V32iV32iV32i" , "" , HVXV65) |
1660 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavguwrnd, "V16iV16iV16i" , "" , HVXV65) |
1661 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vavguwrnd_128B, "V32iV32iV32i" , "" , HVXV65) |
1662 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdd0, "V32i" , "" , HVXV65) |
1663 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdd0_128B, "V64i" , "" , HVXV65) |
1664 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermh, "vv*iiV16i" , "" , HVXV65) |
1665 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermh_128B, "vv*iiV32i" , "" , HVXV65) |
1666 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermhq, "vv*V64biiV16i" , "" , HVXV65) |
1667 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermhq_128B, "vv*V128biiV32i" , "" , HVXV65) |
1668 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermhw, "vv*iiV32i" , "" , HVXV65) |
1669 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermhw_128B, "vv*iiV64i" , "" , HVXV65) |
1670 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermhwq, "vv*V64biiV32i" , "" , HVXV65) |
1671 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermhwq_128B, "vv*V128biiV64i" , "" , HVXV65) |
1672 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermw, "vv*iiV16i" , "" , HVXV65) |
1673 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermw_128B, "vv*iiV32i" , "" , HVXV65) |
1674 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermwq, "vv*V64biiV16i" , "" , HVXV65) |
1675 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgathermwq_128B, "vv*V128biiV32i" , "" , HVXV65) |
1676 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlut4, "V16iV16iLLi" , "" , HVXV65) |
1677 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vlut4_128B, "V32iV32iLLi" , "" , HVXV65) |
1678 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabuu, "V32iV32ii" , "" , HVXV65) |
1679 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabuu_128B, "V64iV64ii" , "" , HVXV65) |
1680 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabuu_acc, "V32iV32iV32ii" , "" , HVXV65) |
1681 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpabuu_acc_128B, "V64iV64iV64ii" , "" , HVXV65) |
1682 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpahhsat, "V16iV16iV16iLLi" , "" , HVXV65) |
1683 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpahhsat_128B, "V32iV32iV32iLLi" , "" , HVXV65) |
1684 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpauhuhsat, "V16iV16iV16iLLi" , "" , HVXV65) |
1685 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpauhuhsat_128B, "V32iV32iV32iLLi" , "" , HVXV65) |
1686 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpsuhuhsat, "V16iV16iV16iLLi" , "" , HVXV65) |
1687 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpsuhuhsat_128B, "V32iV32iV32iLLi" , "" , HVXV65) |
1688 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyh_acc, "V32iV32iV16ii" , "" , HVXV65) |
1689 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyh_acc_128B, "V64iV64iV32ii" , "" , HVXV65) |
1690 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhe, "V16iV16ii" , "" , HVXV65) |
1691 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhe_128B, "V32iV32ii" , "" , HVXV65) |
1692 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhe_acc, "V16iV16iV16ii" , "" , HVXV65) |
1693 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhe_acc_128B, "V32iV32iV32ii" , "" , HVXV65) |
1694 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnavgb, "V16iV16iV16i" , "" , HVXV65) |
1695 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vnavgb_128B, "V32iV32iV32i" , "" , HVXV65) |
1696 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vprefixqb, "V16iV64b" , "" , HVXV65) |
1697 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vprefixqb_128B, "V32iV128b" , "" , HVXV65) |
1698 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vprefixqh, "V16iV64b" , "" , HVXV65) |
1699 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vprefixqh_128B, "V32iV128b" , "" , HVXV65) |
1700 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vprefixqw, "V16iV64b" , "" , HVXV65) |
1701 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vprefixqw_128B, "V32iV128b" , "" , HVXV65) |
1702 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermh, "viiV16iV16i" , "" , HVXV65) |
1703 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermh_128B, "viiV32iV32i" , "" , HVXV65) |
1704 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermh_add, "viiV16iV16i" , "" , HVXV65) |
1705 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermh_add_128B, "viiV32iV32i" , "" , HVXV65) |
1706 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermhq, "vV64biiV16iV16i" , "" , HVXV65) |
1707 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermhq_128B, "vV128biiV32iV32i" , "" , HVXV65) |
1708 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermhw, "viiV32iV16i" , "" , HVXV65) |
1709 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermhw_128B, "viiV64iV32i" , "" , HVXV65) |
1710 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermhw_add, "viiV32iV16i" , "" , HVXV65) |
1711 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermhw_add_128B, "viiV64iV32i" , "" , HVXV65) |
1712 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermhwq, "vV64biiV32iV16i" , "" , HVXV65) |
1713 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermhwq_128B, "vV128biiV64iV32i" , "" , HVXV65) |
1714 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermw, "viiV16iV16i" , "" , HVXV65) |
1715 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermw_128B, "viiV32iV32i" , "" , HVXV65) |
1716 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermw_add, "viiV16iV16i" , "" , HVXV65) |
1717 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermw_add_128B, "viiV32iV32i" , "" , HVXV65) |
1718 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermwq, "vV64biiV16iV16i" , "" , HVXV65) |
1719 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vscattermwq_128B, "vV128biiV32iV32i" , "" , HVXV65) |
1720 | |
1721 | // V66 HVX Instructions. |
1722 | |
1723 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddcarryo, "V16iV16iV16iv*" , "" , HVXV66) |
1724 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddcarryo_128B, "V32iV32iV32iv*" , "" , HVXV66) |
1725 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddcarrysat, "V16iV16iV16iV64b" , "" , HVXV66) |
1726 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vaddcarrysat_128B, "V32iV32iV32iV128b" , "" , HVXV66) |
1727 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasr_into, "V32iV32iV16iV16i" , "" , HVXV66) |
1728 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasr_into_128B, "V64iV64iV32iV32i" , "" , HVXV66) |
1729 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrotr, "V16iV16iV16i" , "" , HVXV66) |
1730 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vrotr_128B, "V32iV32iV32i" , "" , HVXV66) |
1731 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsatdw, "V16iV16iV16i" , "" , HVXV66) |
1732 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsatdw_128B, "V32iV32iV32i" , "" , HVXV66) |
1733 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubcarryo, "V16iV16iV16iv*" , "" , HVXV66) |
1734 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsubcarryo_128B, "V32iV32iV32iv*" , "" , HVXV66) |
1735 | |
1736 | // V68 HVX Instructions. |
1737 | |
1738 | TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyhubs10, "V32iV32iV32iUIi" , "" , HVXV68) |
1739 | TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyhubs10_128B, "V64iV64iV64iUIi" , "" , HVXV68) |
1740 | TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyhubs10_vxx, "V32iV32iV32iV32iUIi" , "" , HVXV68) |
1741 | TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyhubs10_vxx_128B, "V64iV64iV64iV64iUIi" , "" , HVXV68) |
1742 | TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyvubs10, "V32iV32iV32iUIi" , "" , HVXV68) |
1743 | TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyvubs10_128B, "V64iV64iV64iUIi" , "" , HVXV68) |
1744 | TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyvubs10_vxx, "V32iV32iV32iV32iUIi" , "" , HVXV68) |
1745 | TARGET_BUILTIN(__builtin_HEXAGON_V6_v6mpyvubs10_vxx_128B, "V64iV64iV64iV64iUIi" , "" , HVXV68) |
1746 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabs_hf, "V16iV16i" , "" , HVXV68) |
1747 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabs_hf_128B, "V32iV32i" , "" , HVXV68) |
1748 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabs_sf, "V16iV16i" , "" , HVXV68) |
1749 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vabs_sf_128B, "V32iV32i" , "" , HVXV68) |
1750 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_hf, "V16iV16iV16i" , "" , HVXV68) |
1751 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1752 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_hf_hf, "V16iV16iV16i" , "" , HVXV68) |
1753 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_hf_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1754 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf16, "V16iV16iV16i" , "" , HVXV68) |
1755 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf16_128B, "V32iV32iV32i" , "" , HVXV68) |
1756 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf16_mix, "V16iV16iV16i" , "" , HVXV68) |
1757 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf16_mix_128B, "V32iV32iV32i" , "" , HVXV68) |
1758 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf32, "V16iV16iV16i" , "" , HVXV68) |
1759 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf32_128B, "V32iV32iV32i" , "" , HVXV68) |
1760 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf32_mix, "V16iV16iV16i" , "" , HVXV68) |
1761 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_qf32_mix_128B, "V32iV32iV32i" , "" , HVXV68) |
1762 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf, "V16iV16iV16i" , "" , HVXV68) |
1763 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1764 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_hf, "V32iV16iV16i" , "" , HVXV68) |
1765 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_hf_128B, "V64iV32iV32i" , "" , HVXV68) |
1766 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_sf, "V16iV16iV16i" , "" , HVXV68) |
1767 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1768 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vassign_fp, "V16iV16i" , "" , HVXV68) |
1769 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vassign_fp_128B, "V32iV32i" , "" , HVXV68) |
1770 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_qf16, "V16iV16i" , "" , HVXV68) |
1771 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_qf16_128B, "V32iV32i" , "" , HVXV68) |
1772 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_qf32, "V16iV32i" , "" , HVXV68) |
1773 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_qf32_128B, "V32iV64i" , "" , HVXV68) |
1774 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_sf_qf32, "V16iV16i" , "" , HVXV68) |
1775 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_sf_qf32_128B, "V32iV32i" , "" , HVXV68) |
1776 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_b_hf, "V16iV16iV16i" , "" , HVXV68) |
1777 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_b_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1778 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_h_hf, "V16iV16i" , "" , HVXV68) |
1779 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_h_hf_128B, "V32iV32i" , "" , HVXV68) |
1780 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_b, "V32iV16i" , "" , HVXV68) |
1781 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_b_128B, "V64iV32i" , "" , HVXV68) |
1782 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_h, "V16iV16i" , "" , HVXV68) |
1783 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_h_128B, "V32iV32i" , "" , HVXV68) |
1784 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_sf, "V16iV16iV16i" , "" , HVXV68) |
1785 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1786 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_ub, "V32iV16i" , "" , HVXV68) |
1787 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_ub_128B, "V64iV32i" , "" , HVXV68) |
1788 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_uh, "V16iV16i" , "" , HVXV68) |
1789 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_hf_uh_128B, "V32iV32i" , "" , HVXV68) |
1790 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_sf_hf, "V32iV16i" , "" , HVXV68) |
1791 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_sf_hf_128B, "V64iV32i" , "" , HVXV68) |
1792 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_ub_hf, "V16iV16iV16i" , "" , HVXV68) |
1793 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_ub_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1794 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_uh_hf, "V16iV16i" , "" , HVXV68) |
1795 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_uh_hf_128B, "V32iV32i" , "" , HVXV68) |
1796 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpy_sf_hf, "V16iV16iV16i" , "" , HVXV68) |
1797 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpy_sf_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1798 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpy_sf_hf_acc, "V16iV16iV16iV16i" , "" , HVXV68) |
1799 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vdmpy_sf_hf_acc_128B, "V32iV32iV32iV32i" , "" , HVXV68) |
1800 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmax_hf, "V16iV16iV16i" , "" , HVXV68) |
1801 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmax_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1802 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmax_sf, "V16iV16iV16i" , "" , HVXV68) |
1803 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmax_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1804 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmin_hf, "V16iV16iV16i" , "" , HVXV68) |
1805 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmin_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1806 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmin_sf, "V16iV16iV16i" , "" , HVXV68) |
1807 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfmin_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1808 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfneg_hf, "V16iV16i" , "" , HVXV68) |
1809 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfneg_hf_128B, "V32iV32i" , "" , HVXV68) |
1810 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfneg_sf, "V16iV16i" , "" , HVXV68) |
1811 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vfneg_sf_128B, "V32iV32i" , "" , HVXV68) |
1812 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf, "V64bV16iV16i" , "" , HVXV68) |
1813 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_128B, "V128bV32iV32i" , "" , HVXV68) |
1814 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_and, "V64bV64bV16iV16i" , "" , HVXV68) |
1815 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_and_128B, "V128bV128bV32iV32i" , "" , HVXV68) |
1816 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_or, "V64bV64bV16iV16i" , "" , HVXV68) |
1817 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_or_128B, "V128bV128bV32iV32i" , "" , HVXV68) |
1818 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_xor, "V64bV64bV16iV16i" , "" , HVXV68) |
1819 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgthf_xor_128B, "V128bV128bV32iV32i" , "" , HVXV68) |
1820 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf, "V64bV16iV16i" , "" , HVXV68) |
1821 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_128B, "V128bV32iV32i" , "" , HVXV68) |
1822 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_and, "V64bV64bV16iV16i" , "" , HVXV68) |
1823 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_and_128B, "V128bV128bV32iV32i" , "" , HVXV68) |
1824 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_or, "V64bV64bV16iV16i" , "" , HVXV68) |
1825 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_or_128B, "V128bV128bV32iV32i" , "" , HVXV68) |
1826 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_xor, "V64bV64bV16iV16i" , "" , HVXV68) |
1827 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtsf_xor_128B, "V128bV128bV32iV32i" , "" , HVXV68) |
1828 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_hf, "V16iV16iV16i" , "" , HVXV68) |
1829 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1830 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_sf, "V16iV16iV16i" , "" , HVXV68) |
1831 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1832 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_hf, "V16iV16iV16i" , "" , HVXV68) |
1833 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1834 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_sf, "V16iV16iV16i" , "" , HVXV68) |
1835 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1836 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_hf_hf, "V16iV16iV16i" , "" , HVXV68) |
1837 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_hf_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1838 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_hf_hf_acc, "V16iV16iV16iV16i" , "" , HVXV68) |
1839 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_hf_hf_acc_128B, "V32iV32iV32iV32i" , "" , HVXV68) |
1840 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16, "V16iV16iV16i" , "" , HVXV68) |
1841 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16_128B, "V32iV32iV32i" , "" , HVXV68) |
1842 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16_hf, "V16iV16iV16i" , "" , HVXV68) |
1843 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1844 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16_mix_hf, "V16iV16iV16i" , "" , HVXV68) |
1845 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf16_mix_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1846 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32, "V16iV16iV16i" , "" , HVXV68) |
1847 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_128B, "V32iV32iV32i" , "" , HVXV68) |
1848 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_hf, "V32iV16iV16i" , "" , HVXV68) |
1849 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_hf_128B, "V64iV32iV32i" , "" , HVXV68) |
1850 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_mix_hf, "V32iV16iV16i" , "" , HVXV68) |
1851 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_mix_hf_128B, "V64iV32iV32i" , "" , HVXV68) |
1852 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_qf16, "V32iV16iV16i" , "" , HVXV68) |
1853 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_qf16_128B, "V64iV32iV32i" , "" , HVXV68) |
1854 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_sf, "V16iV16iV16i" , "" , HVXV68) |
1855 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_qf32_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1856 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_hf, "V32iV16iV16i" , "" , HVXV68) |
1857 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_hf_128B, "V64iV32iV32i" , "" , HVXV68) |
1858 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_hf_acc, "V32iV32iV16iV16i" , "" , HVXV68) |
1859 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_hf_acc_128B, "V64iV64iV32iV32i" , "" , HVXV68) |
1860 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_sf, "V16iV16iV16i" , "" , HVXV68) |
1861 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1862 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_hf, "V16iV16iV16i" , "" , HVXV68) |
1863 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1864 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_hf_hf, "V16iV16iV16i" , "" , HVXV68) |
1865 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_hf_hf_128B, "V32iV32iV32i" , "" , HVXV68) |
1866 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf16, "V16iV16iV16i" , "" , HVXV68) |
1867 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf16_128B, "V32iV32iV32i" , "" , HVXV68) |
1868 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf16_mix, "V16iV16iV16i" , "" , HVXV68) |
1869 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf16_mix_128B, "V32iV32iV32i" , "" , HVXV68) |
1870 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf32, "V16iV16iV16i" , "" , HVXV68) |
1871 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf32_128B, "V32iV32iV32i" , "" , HVXV68) |
1872 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf32_mix, "V16iV16iV16i" , "" , HVXV68) |
1873 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_qf32_mix_128B, "V32iV32iV32i" , "" , HVXV68) |
1874 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf, "V16iV16iV16i" , "" , HVXV68) |
1875 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1876 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_hf, "V32iV16iV16i" , "" , HVXV68) |
1877 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_hf_128B, "V64iV32iV32i" , "" , HVXV68) |
1878 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_sf, "V16iV16iV16i" , "" , HVXV68) |
1879 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_sf_128B, "V32iV32iV32i" , "" , HVXV68) |
1880 | |
1881 | // V69 HVX Instructions. |
1882 | |
1883 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvuhubrndsat, "V16iV32iV16i" , "" , HVXV69) |
1884 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvuhubrndsat_128B, "V32iV64iV32i" , "" , HVXV69) |
1885 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvuhubsat, "V16iV32iV16i" , "" , HVXV69) |
1886 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvuhubsat_128B, "V32iV64iV32i" , "" , HVXV69) |
1887 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvwuhrndsat, "V16iV32iV16i" , "" , HVXV69) |
1888 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvwuhrndsat_128B, "V32iV64iV32i" , "" , HVXV69) |
1889 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvwuhsat, "V16iV32iV16i" , "" , HVXV69) |
1890 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vasrvwuhsat_128B, "V32iV64iV32i" , "" , HVXV69) |
1891 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhvs, "V16iV16iV16i" , "" , HVXV69) |
1892 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpyuhvs_128B, "V32iV32iV32i" , "" , HVXV69) |
1893 | |
1894 | // V73 HVX Instructions. |
1895 | |
1896 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_bf, "V32iV16iV16i" , "" , HVXV73) |
1897 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vadd_sf_bf_128B, "V64iV32iV32i" , "" , HVXV73) |
1898 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_h_hf, "V16iV16i" , "" , HVXV73) |
1899 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_h_hf_128B, "V32iV32i" , "" , HVXV73) |
1900 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_h, "V16iV16i" , "" , HVXV73) |
1901 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_hf_h_128B, "V32iV32i" , "" , HVXV73) |
1902 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_sf_w, "V16iV16i" , "" , HVXV73) |
1903 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_sf_w_128B, "V32iV32i" , "" , HVXV73) |
1904 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_w_sf, "V16iV16i" , "" , HVXV73) |
1905 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vconv_w_sf_128B, "V32iV32i" , "" , HVXV73) |
1906 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_bf_sf, "V16iV16iV16i" , "" , HVXV73) |
1907 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vcvt_bf_sf_128B, "V32iV32iV32i" , "" , HVXV73) |
1908 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf, "V64bV16iV16i" , "" , HVXV73) |
1909 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_128B, "V128bV32iV32i" , "" , HVXV73) |
1910 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_and, "V64bV64bV16iV16i" , "" , HVXV73) |
1911 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_and_128B, "V128bV128bV32iV32i" , "" , HVXV73) |
1912 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_or, "V64bV64bV16iV16i" , "" , HVXV73) |
1913 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_or_128B, "V128bV128bV32iV32i" , "" , HVXV73) |
1914 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_xor, "V64bV64bV16iV16i" , "" , HVXV73) |
1915 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vgtbf_xor_128B, "V128bV128bV32iV32i" , "" , HVXV73) |
1916 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_bf, "V16iV16iV16i" , "" , HVXV73) |
1917 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmax_bf_128B, "V32iV32iV32i" , "" , HVXV73) |
1918 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_bf, "V16iV16iV16i" , "" , HVXV73) |
1919 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmin_bf_128B, "V32iV32iV32i" , "" , HVXV73) |
1920 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_bf, "V32iV16iV16i" , "" , HVXV73) |
1921 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_bf_128B, "V64iV32iV32i" , "" , HVXV73) |
1922 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_bf_acc, "V32iV32iV16iV16i" , "" , HVXV73) |
1923 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vmpy_sf_bf_acc_128B, "V64iV64iV32iV32i" , "" , HVXV73) |
1924 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_bf, "V32iV16iV16i" , "" , HVXV73) |
1925 | TARGET_BUILTIN(__builtin_HEXAGON_V6_vsub_sf_bf_128B, "V64iV32iV32i" , "" , HVXV73) |
1926 | |