1 | //==-- AArch64TargetMachine.h - Define TargetMachine for AArch64 -*- C++ -*-==// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file declares the AArch64 specific subclass of TargetMachine. |
10 | // |
11 | //===----------------------------------------------------------------------===// |
12 | |
13 | #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H |
14 | #define LLVM_LIB_TARGET_AARCH64_AARCH64TARGETMACHINE_H |
15 | |
16 | #include "AArch64InstrInfo.h" |
17 | #include "AArch64Subtarget.h" |
18 | #include "llvm/IR/DataLayout.h" |
19 | #include "llvm/Target/TargetMachine.h" |
20 | #include <optional> |
21 | |
22 | namespace llvm { |
23 | |
24 | class AArch64TargetMachine : public LLVMTargetMachine { |
25 | protected: |
26 | std::unique_ptr<TargetLoweringObjectFile> TLOF; |
27 | mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap; |
28 | |
29 | public: |
30 | AArch64TargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
31 | StringRef FS, const TargetOptions &Options, |
32 | std::optional<Reloc::Model> RM, |
33 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
34 | bool JIT, bool IsLittleEndian); |
35 | |
36 | ~AArch64TargetMachine() override; |
37 | const AArch64Subtarget *getSubtargetImpl(const Function &F) const override; |
38 | // DO NOT IMPLEMENT: There is no such thing as a valid default subtarget, |
39 | // subtargets are per-function entities based on the target-specific |
40 | // attributes of each function. |
41 | const AArch64Subtarget *getSubtargetImpl() const = delete; |
42 | |
43 | // Pass Pipeline Configuration |
44 | TargetPassConfig *createPassConfig(PassManagerBase &PM) override; |
45 | |
46 | void registerPassBuilderCallbacks(PassBuilder &PB) override; |
47 | |
48 | TargetTransformInfo getTargetTransformInfo(const Function &F) const override; |
49 | |
50 | TargetLoweringObjectFile* getObjFileLowering() const override { |
51 | return TLOF.get(); |
52 | } |
53 | |
54 | MachineFunctionInfo * |
55 | createMachineFunctionInfo(BumpPtrAllocator &Allocator, const Function &F, |
56 | const TargetSubtargetInfo *STI) const override; |
57 | |
58 | yaml::MachineFunctionInfo *createDefaultFuncInfoYAML() const override; |
59 | yaml::MachineFunctionInfo * |
60 | convertFuncInfoToYAML(const MachineFunction &MF) const override; |
61 | bool parseMachineFunctionInfo(const yaml::MachineFunctionInfo &, |
62 | PerFunctionMIParsingState &PFS, |
63 | SMDiagnostic &Error, |
64 | SMRange &SourceRange) const override; |
65 | |
66 | /// Returns true if a cast between SrcAS and DestAS is a noop. |
67 | bool isNoopAddrSpaceCast(unsigned SrcAS, unsigned DestAS) const override { |
68 | // Addrspacecasts are always noops. |
69 | return true; |
70 | } |
71 | |
72 | private: |
73 | bool isLittle; |
74 | }; |
75 | |
76 | // AArch64 little endian target machine. |
77 | // |
78 | class AArch64leTargetMachine : public AArch64TargetMachine { |
79 | virtual void anchor(); |
80 | |
81 | public: |
82 | AArch64leTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
83 | StringRef FS, const TargetOptions &Options, |
84 | std::optional<Reloc::Model> RM, |
85 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
86 | bool JIT); |
87 | }; |
88 | |
89 | // AArch64 big endian target machine. |
90 | // |
91 | class AArch64beTargetMachine : public AArch64TargetMachine { |
92 | virtual void anchor(); |
93 | |
94 | public: |
95 | AArch64beTargetMachine(const Target &T, const Triple &TT, StringRef CPU, |
96 | StringRef FS, const TargetOptions &Options, |
97 | std::optional<Reloc::Model> RM, |
98 | std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, |
99 | bool JIT); |
100 | }; |
101 | |
102 | } // end namespace llvm |
103 | |
104 | #endif |
105 | |