1//===- AMDGPUGlobalISelUtils -------------------------------------*- C++ -*-==//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
10#define LLVM_LIB_TARGET_AMDGPU_AMDGPUGLOBALISELUTILS_H
11
12#include "llvm/CodeGen/Register.h"
13#include <utility>
14
15namespace llvm {
16
17class MachineRegisterInfo;
18class GCNSubtarget;
19class GISelKnownBits;
20class LLT;
21
22namespace AMDGPU {
23
24/// Returns base register and constant offset.
25std::pair<Register, unsigned>
26getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg,
27 GISelKnownBits *KnownBits = nullptr,
28 bool CheckNUW = false);
29}
30}
31
32#endif
33