1 | //===----------------------------------------------------------------------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | |
9 | #ifndef LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H |
10 | #define LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H |
11 | |
12 | #include "llvm/ADT/StringSwitch.h" |
13 | #include <optional> |
14 | |
15 | namespace llvm { |
16 | namespace Hexagon { |
17 | enum class ArchEnum { |
18 | NoArch, |
19 | Generic, |
20 | V5, |
21 | V55, |
22 | V60, |
23 | V62, |
24 | V65, |
25 | V66, |
26 | V67, |
27 | V68, |
28 | V69, |
29 | V71, |
30 | V73 |
31 | }; |
32 | |
33 | inline std::optional<Hexagon::ArchEnum> getCpu(StringRef CPU) { |
34 | return StringSwitch<std::optional<Hexagon::ArchEnum>>(CPU) |
35 | .Case(S: "generic" , Value: Hexagon::ArchEnum::V5) |
36 | .Case(S: "hexagonv5" , Value: Hexagon::ArchEnum::V5) |
37 | .Case(S: "hexagonv55" , Value: Hexagon::ArchEnum::V55) |
38 | .Case(S: "hexagonv60" , Value: Hexagon::ArchEnum::V60) |
39 | .Case(S: "hexagonv62" , Value: Hexagon::ArchEnum::V62) |
40 | .Case(S: "hexagonv65" , Value: Hexagon::ArchEnum::V65) |
41 | .Case(S: "hexagonv66" , Value: Hexagon::ArchEnum::V66) |
42 | .Case(S: "hexagonv67" , Value: Hexagon::ArchEnum::V67) |
43 | .Case(S: "hexagonv67t" , Value: Hexagon::ArchEnum::V67) |
44 | .Case(S: "hexagonv68" , Value: Hexagon::ArchEnum::V68) |
45 | .Case(S: "hexagonv69" , Value: Hexagon::ArchEnum::V69) |
46 | .Case(S: "hexagonv71" , Value: Hexagon::ArchEnum::V71) |
47 | .Case(S: "hexagonv71t" , Value: Hexagon::ArchEnum::V71) |
48 | .Case(S: "hexagonv73" , Value: Hexagon::ArchEnum::V73) |
49 | .Default(Value: std::nullopt); |
50 | } |
51 | } // namespace Hexagon |
52 | } // namespace llvm |
53 | |
54 | #endif // LLVM_LIB_TARGET_HEXAGON_HEXAGONDEPARCH_H |
55 | |