1 | //===-- LanaiTargetTransformInfo.h - Lanai specific TTI ---------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file a TargetTransformInfo::Concept conforming object specific to the |
10 | // Lanai target machine. It uses the target's detailed information to |
11 | // provide more precise answers to certain TTI queries, while letting the |
12 | // target independent and default TTI implementations handle the rest. |
13 | // |
14 | //===----------------------------------------------------------------------===// |
15 | |
16 | #ifndef LLVM_LIB_TARGET_LANAI_LANAITARGETTRANSFORMINFO_H |
17 | #define LLVM_LIB_TARGET_LANAI_LANAITARGETTRANSFORMINFO_H |
18 | |
19 | #include "Lanai.h" |
20 | #include "LanaiSubtarget.h" |
21 | #include "LanaiTargetMachine.h" |
22 | #include "llvm/Analysis/TargetTransformInfo.h" |
23 | #include "llvm/CodeGen/BasicTTIImpl.h" |
24 | #include "llvm/CodeGen/TargetLowering.h" |
25 | #include "llvm/Support/MathExtras.h" |
26 | |
27 | namespace llvm { |
28 | class LanaiTTIImpl : public BasicTTIImplBase<LanaiTTIImpl> { |
29 | typedef BasicTTIImplBase<LanaiTTIImpl> BaseT; |
30 | typedef TargetTransformInfo TTI; |
31 | friend BaseT; |
32 | |
33 | const LanaiSubtarget *ST; |
34 | const LanaiTargetLowering *TLI; |
35 | |
36 | const LanaiSubtarget *getST() const { return ST; } |
37 | const LanaiTargetLowering *getTLI() const { return TLI; } |
38 | |
39 | public: |
40 | explicit LanaiTTIImpl(const LanaiTargetMachine *TM, const Function &F) |
41 | : BaseT(TM, F.getDataLayout()), ST(TM->getSubtargetImpl(F)), |
42 | TLI(ST->getTargetLowering()) {} |
43 | |
44 | bool shouldBuildLookupTables() const { return false; } |
45 | |
46 | TargetTransformInfo::PopcntSupportKind getPopcntSupport(unsigned TyWidth) { |
47 | if (TyWidth == 32) |
48 | return TTI::PSK_FastHardware; |
49 | return TTI::PSK_Software; |
50 | } |
51 | |
52 | InstructionCost getIntImmCost(const APInt &Imm, Type *Ty, |
53 | TTI::TargetCostKind CostKind) { |
54 | assert(Ty->isIntegerTy()); |
55 | unsigned BitSize = Ty->getPrimitiveSizeInBits(); |
56 | // There is no cost model for constants with a bit size of 0. Return |
57 | // TCC_Free here, so that constant hoisting will ignore this constant. |
58 | if (BitSize == 0) |
59 | return TTI::TCC_Free; |
60 | // No cost model for operations on integers larger than 64 bit implemented |
61 | // yet. |
62 | if (BitSize > 64) |
63 | return TTI::TCC_Free; |
64 | |
65 | if (Imm == 0) |
66 | return TTI::TCC_Free; |
67 | if (isInt<16>(x: Imm.getSExtValue())) |
68 | return TTI::TCC_Basic; |
69 | if (isInt<21>(x: Imm.getZExtValue())) |
70 | return TTI::TCC_Basic; |
71 | if (isInt<32>(x: Imm.getSExtValue())) { |
72 | if ((Imm.getSExtValue() & 0xFFFF) == 0) |
73 | return TTI::TCC_Basic; |
74 | return 2 * TTI::TCC_Basic; |
75 | } |
76 | |
77 | return 4 * TTI::TCC_Basic; |
78 | } |
79 | |
80 | InstructionCost getIntImmCostInst(unsigned Opc, unsigned Idx, |
81 | const APInt &Imm, Type *Ty, |
82 | TTI::TargetCostKind CostKind, |
83 | Instruction *Inst = nullptr) { |
84 | return getIntImmCost(Imm, Ty, CostKind); |
85 | } |
86 | |
87 | InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx, |
88 | const APInt &Imm, Type *Ty, |
89 | TTI::TargetCostKind CostKind) { |
90 | return getIntImmCost(Imm, Ty, CostKind); |
91 | } |
92 | |
93 | InstructionCost getArithmeticInstrCost( |
94 | unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind, |
95 | TTI::OperandValueInfo Op1Info = {.Kind: TTI::OK_AnyValue, .Properties: TTI::OP_None}, |
96 | TTI::OperandValueInfo Op2Info = {.Kind: TTI::OK_AnyValue, .Properties: TTI::OP_None}, |
97 | ArrayRef<const Value *> Args = std::nullopt, |
98 | const Instruction *CxtI = nullptr) { |
99 | int ISD = TLI->InstructionOpcodeToISD(Opcode); |
100 | |
101 | switch (ISD) { |
102 | default: |
103 | return BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info: Op1Info, |
104 | Opd2Info: Op2Info); |
105 | case ISD::MUL: |
106 | case ISD::SDIV: |
107 | case ISD::UDIV: |
108 | case ISD::UREM: |
109 | // This increases the cost associated with multiplication and division |
110 | // to 64 times what the baseline arithmetic cost is. The arithmetic |
111 | // instruction cost was arbitrarily chosen to reduce the desirability |
112 | // of emitting arithmetic instructions that are emulated in software. |
113 | // TODO: Investigate the performance impact given specialized lowerings. |
114 | return 64 * BaseT::getArithmeticInstrCost(Opcode, Ty, CostKind, Opd1Info: Op1Info, |
115 | Opd2Info: Op2Info); |
116 | } |
117 | } |
118 | }; |
119 | |
120 | } // end namespace llvm |
121 | |
122 | #endif // LLVM_LIB_TARGET_LANAI_LANAITARGETTRANSFORMINFO_H |
123 | |