1 | //===-- WebAssemblyArgumentMove.cpp - Argument instruction moving ---------===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | /// |
9 | /// \file |
10 | /// This file moves ARGUMENT instructions after ScheduleDAG scheduling. |
11 | /// |
12 | /// Arguments are really live-in registers, however, since we use virtual |
13 | /// registers and LLVM doesn't support live-in virtual registers, we're |
14 | /// currently making do with ARGUMENT instructions which are placed at the top |
15 | /// of the entry block. The trick is to get them to *stay* at the top of the |
16 | /// entry block. |
17 | /// |
18 | /// The ARGUMENTS physical register keeps these instructions pinned in place |
19 | /// during liveness-aware CodeGen passes, however one thing which does not |
20 | /// respect this is the ScheduleDAG scheduler. This pass is therefore run |
21 | /// immediately after that. |
22 | /// |
23 | /// This is all hopefully a temporary solution until we find a better solution |
24 | /// for describing the live-in nature of arguments. |
25 | /// |
26 | //===----------------------------------------------------------------------===// |
27 | |
28 | #include "MCTargetDesc/WebAssemblyMCTargetDesc.h" |
29 | #include "WebAssembly.h" |
30 | #include "WebAssemblyMachineFunctionInfo.h" |
31 | #include "WebAssemblySubtarget.h" |
32 | #include "WebAssemblyUtilities.h" |
33 | #include "llvm/CodeGen/MachineBlockFrequencyInfo.h" |
34 | #include "llvm/CodeGen/MachineRegisterInfo.h" |
35 | #include "llvm/CodeGen/Passes.h" |
36 | #include "llvm/Support/Debug.h" |
37 | #include "llvm/Support/raw_ostream.h" |
38 | using namespace llvm; |
39 | |
40 | #define DEBUG_TYPE "wasm-argument-move" |
41 | |
42 | namespace { |
43 | class WebAssemblyArgumentMove final : public MachineFunctionPass { |
44 | public: |
45 | static char ID; // Pass identification, replacement for typeid |
46 | WebAssemblyArgumentMove() : MachineFunctionPass(ID) {} |
47 | |
48 | StringRef getPassName() const override { return "WebAssembly Argument Move" ; } |
49 | |
50 | void getAnalysisUsage(AnalysisUsage &AU) const override { |
51 | AU.setPreservesCFG(); |
52 | AU.addPreserved<MachineBlockFrequencyInfoWrapperPass>(); |
53 | AU.addPreservedID(ID&: MachineDominatorsID); |
54 | MachineFunctionPass::getAnalysisUsage(AU); |
55 | } |
56 | |
57 | bool runOnMachineFunction(MachineFunction &MF) override; |
58 | }; |
59 | } // end anonymous namespace |
60 | |
61 | char WebAssemblyArgumentMove::ID = 0; |
62 | INITIALIZE_PASS(WebAssemblyArgumentMove, DEBUG_TYPE, |
63 | "Move ARGUMENT instructions for WebAssembly" , false, false) |
64 | |
65 | FunctionPass *llvm::createWebAssemblyArgumentMove() { |
66 | return new WebAssemblyArgumentMove(); |
67 | } |
68 | |
69 | bool WebAssemblyArgumentMove::runOnMachineFunction(MachineFunction &MF) { |
70 | LLVM_DEBUG({ |
71 | dbgs() << "********** Argument Move **********\n" |
72 | << "********** Function: " << MF.getName() << '\n'; |
73 | }); |
74 | |
75 | bool Changed = false; |
76 | MachineBasicBlock &EntryMBB = MF.front(); |
77 | MachineBasicBlock::iterator InsertPt = EntryMBB.end(); |
78 | |
79 | // Look for the first NonArg instruction. |
80 | for (MachineInstr &MI : EntryMBB) { |
81 | if (!WebAssembly::isArgument(Opc: MI.getOpcode())) { |
82 | InsertPt = MI; |
83 | break; |
84 | } |
85 | } |
86 | |
87 | // Now move any argument instructions later in the block |
88 | // to before our first NonArg instruction. |
89 | for (MachineInstr &MI : llvm::make_range(x: InsertPt, y: EntryMBB.end())) { |
90 | if (WebAssembly::isArgument(Opc: MI.getOpcode())) { |
91 | EntryMBB.insert(I: InsertPt, MI: MI.removeFromParent()); |
92 | Changed = true; |
93 | } |
94 | } |
95 | |
96 | return Changed; |
97 | } |
98 | |