1 | //===-- X86SelectionDAGInfo.h - X86 SelectionDAG Info -----------*- C++ -*-===// |
2 | // |
3 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | // See https://llvm.org/LICENSE.txt for license information. |
5 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | // |
7 | //===----------------------------------------------------------------------===// |
8 | // |
9 | // This file defines the X86 subclass for SelectionDAGTargetInfo. |
10 | // |
11 | //===----------------------------------------------------------------------===// |
12 | |
13 | #ifndef LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H |
14 | #define LLVM_LIB_TARGET_X86_X86SELECTIONDAGINFO_H |
15 | |
16 | #include "llvm/CodeGen/SelectionDAGTargetInfo.h" |
17 | |
18 | namespace llvm { |
19 | |
20 | class X86SelectionDAGInfo : public SelectionDAGTargetInfo { |
21 | /// Returns true if it is possible for the base register to conflict with the |
22 | /// given set of clobbers for a memory intrinsic. |
23 | bool isBaseRegConflictPossible(SelectionDAG &DAG, |
24 | ArrayRef<MCPhysReg> ClobberSet) const; |
25 | |
26 | public: |
27 | explicit X86SelectionDAGInfo() = default; |
28 | |
29 | SDValue EmitTargetCodeForMemset(SelectionDAG &DAG, const SDLoc &dl, |
30 | SDValue Chain, SDValue Dst, SDValue Src, |
31 | SDValue Size, Align Alignment, |
32 | bool isVolatile, bool AlwaysInline, |
33 | MachinePointerInfo DstPtrInfo) const override; |
34 | |
35 | SDValue EmitTargetCodeForMemcpy(SelectionDAG &DAG, const SDLoc &dl, |
36 | SDValue Chain, SDValue Dst, SDValue Src, |
37 | SDValue Size, Align Alignment, |
38 | bool isVolatile, bool AlwaysInline, |
39 | MachinePointerInfo DstPtrInfo, |
40 | MachinePointerInfo SrcPtrInfo) const override; |
41 | }; |
42 | |
43 | } |
44 | |
45 | #endif |
46 | |