1//===- X86DisassemblerShared.h - Emitter shared header ----------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#ifndef LLVM_UTILS_TABLEGEN_X86DISASSEMBLERSHARED_H
10#define LLVM_UTILS_TABLEGEN_X86DISASSEMBLERSHARED_H
11
12#include <cstring>
13#include <string>
14
15#include "llvm/Support/X86DisassemblerDecoderCommon.h"
16
17struct InstructionSpecifier {
18 llvm::X86Disassembler::OperandSpecifier
19 operands[llvm::X86Disassembler::X86_MAX_OPERANDS];
20 llvm::X86Disassembler::InstructionContext insnContext;
21 std::string name;
22
23 InstructionSpecifier() {
24 insnContext = llvm::X86Disassembler::IC;
25 name = "";
26 memset(s: operands, c: 0, n: sizeof(operands));
27 }
28};
29
30/// Specifies whether a ModR/M byte is needed and (if so) which
31/// instruction each possible value of the ModR/M byte corresponds to. Once
32/// this information is known, we have narrowed down to a single instruction.
33struct ModRMDecision {
34 uint8_t modrm_type;
35 llvm::X86Disassembler::InstrUID instructionIDs[256];
36};
37
38/// Specifies which set of ModR/M->instruction tables to look at
39/// given a particular opcode.
40struct OpcodeDecision {
41 ModRMDecision modRMDecisions[256];
42};
43
44/// Specifies which opcode->instruction tables to look at given
45/// a particular context (set of attributes). Since there are many possible
46/// contexts, the decoder first uses CONTEXTS_SYM to determine which context
47/// applies given a specific set of attributes. Hence there are only IC_max
48/// entries in this table, rather than 2^(ATTR_max).
49struct ContextDecision {
50 OpcodeDecision opcodeDecisions[llvm::X86Disassembler::IC_max];
51
52 ContextDecision() { memset(s: opcodeDecisions, c: 0, n: sizeof(opcodeDecisions)); }
53};
54
55#endif
56