| 1 | /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |
| 2 | |* *| |
| 3 | |* Register Information Header Fragment *| |
| 4 | |* *| |
| 5 | |* Automatically generated file, do not edit! *| |
| 6 | |* *| |
| 7 | \*===----------------------------------------------------------------------===*/ |
| 8 | |
| 9 | #include "llvm/CodeGen/TargetRegisterInfo.h" |
| 10 | |
| 11 | namespace llvm { |
| 12 | |
| 13 | class AArch64FrameLowering; |
| 14 | |
| 15 | extern const MCRegisterClassStorage<530, 4456, 47344, 25330, 164, 4072> AArch64MCRegisterClassStorage; |
| 16 | |
| 17 | struct AArch64GenRegisterInfo : public TargetRegisterInfo { |
| 18 | explicit AArch64GenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0, |
| 19 | unsigned PC = 0, unsigned HwMode = 0); |
| 20 | unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 21 | unsigned reverseComposeSubRegIndicesImpl(unsigned, unsigned) const override; |
| 22 | LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 23 | LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; |
| 24 | const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override; |
| 25 | const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override; |
| 26 | const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override; |
| 27 | unsigned getRegUnitWeight(MCRegUnit RegUnit) const override; |
| 28 | unsigned getNumRegPressureSets() const override; |
| 29 | const char *getRegPressureSetName(unsigned Idx) const override; |
| 30 | unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override; |
| 31 | const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override; |
| 32 | const int *getRegUnitPressureSets(MCRegUnit RegUnit) const override; |
| 33 | ArrayRef<const char *> getRegMaskNames() const override; |
| 34 | ArrayRef<const uint32_t *> getRegMasks() const override; |
| 35 | bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override; |
| 36 | bool isGeneralPurposeRegisterClass(const TargetRegisterClass *RC) const override; |
| 37 | bool isFixedRegister(const MachineFunction &, MCRegister) const override; |
| 38 | bool isArgumentRegister(const MachineFunction &, MCRegister) const override; |
| 39 | bool isConstantPhysReg(MCRegister PhysReg) const override final; |
| 40 | /// Devirtualized TargetFrameLowering. |
| 41 | static const AArch64FrameLowering *getFrameLowering( |
| 42 | const MachineFunction &MF); |
| 43 | ArrayRef<MCPhysReg> getRawAllocationOrder(const TargetRegisterClass &RC, const MachineFunction &MF, bool Rev) const override; |
| 44 | const TargetRegisterClass *getMinimalPhysRegClass(MCRegister Reg) const override; |
| 45 | }; |
| 46 | |
| 47 | namespace AArch64 { |
| 48 | |
| 49 | // Register classes |
| 50 | static constexpr const TargetRegisterClass &W_HI_DummyRCRegClass = AArch64MCRegisterClassStorage.Classes[0]; |
| 51 | static constexpr const TargetRegisterClass &B_HI_DummyRCRegClass = AArch64MCRegisterClassStorage.Classes[1]; |
| 52 | static constexpr const TargetRegisterClass &D_HI_DummyRCRegClass = AArch64MCRegisterClassStorage.Classes[2]; |
| 53 | static constexpr const TargetRegisterClass &H_HI_DummyRCRegClass = AArch64MCRegisterClassStorage.Classes[3]; |
| 54 | static constexpr const TargetRegisterClass &Q_HI_DummyRCRegClass = AArch64MCRegisterClassStorage.Classes[4]; |
| 55 | static constexpr const TargetRegisterClass &S_HI_DummyRCRegClass = AArch64MCRegisterClassStorage.Classes[5]; |
| 56 | static constexpr const TargetRegisterClass &FPR8RegClass = AArch64MCRegisterClassStorage.Classes[6]; |
| 57 | static constexpr const TargetRegisterClass &FPR16RegClass = AArch64MCRegisterClassStorage.Classes[7]; |
| 58 | static constexpr const TargetRegisterClass &PPRorPNRRegClass = AArch64MCRegisterClassStorage.Classes[8]; |
| 59 | static constexpr const TargetRegisterClass &FPR16_loRegClass = AArch64MCRegisterClassStorage.Classes[9]; |
| 60 | static constexpr const TargetRegisterClass &PNRRegClass = AArch64MCRegisterClassStorage.Classes[10]; |
| 61 | static constexpr const TargetRegisterClass &PPRRegClass = AArch64MCRegisterClassStorage.Classes[11]; |
| 62 | static constexpr const TargetRegisterClass &PNR_3bRegClass = AArch64MCRegisterClassStorage.Classes[12]; |
| 63 | static constexpr const TargetRegisterClass &PNR_p8to15RegClass = AArch64MCRegisterClassStorage.Classes[13]; |
| 64 | static constexpr const TargetRegisterClass &PPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[14]; |
| 65 | static constexpr const TargetRegisterClass &PPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[15]; |
| 66 | static constexpr const TargetRegisterClass &PPR_p8to15RegClass = AArch64MCRegisterClassStorage.Classes[16]; |
| 67 | static constexpr const TargetRegisterClass &PPRMul2_and_PPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[17]; |
| 68 | static constexpr const TargetRegisterClass &PPRMul2_and_PPR_p8to15RegClass = AArch64MCRegisterClassStorage.Classes[18]; |
| 69 | static constexpr const TargetRegisterClass &PPR2RegClass = AArch64MCRegisterClassStorage.Classes[19]; |
| 70 | static constexpr const TargetRegisterClass &PPR2Mul2RegClass = AArch64MCRegisterClassStorage.Classes[20]; |
| 71 | static constexpr const TargetRegisterClass &PPR2_with_psub1_in_PPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[21]; |
| 72 | static constexpr const TargetRegisterClass &PPR2_with_psub1_in_PPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[22]; |
| 73 | static constexpr const TargetRegisterClass &PPR2_with_psub1_in_PPR_p8to15RegClass = AArch64MCRegisterClassStorage.Classes[23]; |
| 74 | static constexpr const TargetRegisterClass &PPR2_with_psub_in_PNR_3bRegClass = AArch64MCRegisterClassStorage.Classes[24]; |
| 75 | static constexpr const TargetRegisterClass &PPR2_with_psub_in_PNR_p8to15RegClass = AArch64MCRegisterClassStorage.Classes[25]; |
| 76 | static constexpr const TargetRegisterClass &PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[26]; |
| 77 | static constexpr const TargetRegisterClass &PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClass = AArch64MCRegisterClassStorage.Classes[27]; |
| 78 | static constexpr const TargetRegisterClass &PPR2Mul2_and_PPR2_with_psub_in_PNR_3bRegClass = AArch64MCRegisterClassStorage.Classes[28]; |
| 79 | static constexpr const TargetRegisterClass &PPR2Mul2_and_PPR2_with_psub_in_PNR_p8to15RegClass = AArch64MCRegisterClassStorage.Classes[29]; |
| 80 | static constexpr const TargetRegisterClass &PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[30]; |
| 81 | static constexpr const TargetRegisterClass &PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClass = AArch64MCRegisterClassStorage.Classes[31]; |
| 82 | static constexpr const TargetRegisterClass &PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[32]; |
| 83 | static constexpr const TargetRegisterClass &PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[33]; |
| 84 | static constexpr const TargetRegisterClass &PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPRMul2_and_PPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[34]; |
| 85 | static constexpr const TargetRegisterClass &PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPRMul2_and_PPR_p8to15RegClass = AArch64MCRegisterClassStorage.Classes[35]; |
| 86 | static constexpr const TargetRegisterClass &PPR2_with_psub_in_PNR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClass = AArch64MCRegisterClassStorage.Classes[36]; |
| 87 | static constexpr const TargetRegisterClass &PPR2_with_psub_in_PNR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[37]; |
| 88 | static constexpr const TargetRegisterClass &GPR32allRegClass = AArch64MCRegisterClassStorage.Classes[38]; |
| 89 | static constexpr const TargetRegisterClass &FPR32RegClass = AArch64MCRegisterClassStorage.Classes[39]; |
| 90 | static constexpr const TargetRegisterClass &GPR32RegClass = AArch64MCRegisterClassStorage.Classes[40]; |
| 91 | static constexpr const TargetRegisterClass &GPR32spRegClass = AArch64MCRegisterClassStorage.Classes[41]; |
| 92 | static constexpr const TargetRegisterClass &GPR32commonRegClass = AArch64MCRegisterClassStorage.Classes[42]; |
| 93 | static constexpr const TargetRegisterClass &FPR32_with_hsub_in_FPR16_loRegClass = AArch64MCRegisterClassStorage.Classes[43]; |
| 94 | static constexpr const TargetRegisterClass &GPR32argRegClass = AArch64MCRegisterClassStorage.Classes[44]; |
| 95 | static constexpr const TargetRegisterClass &MatrixIndexGPR32_12_15RegClass = AArch64MCRegisterClassStorage.Classes[45]; |
| 96 | static constexpr const TargetRegisterClass &MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[46]; |
| 97 | static constexpr const TargetRegisterClass &CCRRegClass = AArch64MCRegisterClassStorage.Classes[47]; |
| 98 | static constexpr const TargetRegisterClass &GPR32sponlyRegClass = AArch64MCRegisterClassStorage.Classes[48]; |
| 99 | static constexpr const TargetRegisterClass &WSeqPairsClassRegClass = AArch64MCRegisterClassStorage.Classes[49]; |
| 100 | static constexpr const TargetRegisterClass &WSeqPairsClass_with_subo32_in_GPR32commonRegClass = AArch64MCRegisterClassStorage.Classes[50]; |
| 101 | static constexpr const TargetRegisterClass &WSeqPairsClass_with_sube32_in_GPR32argRegClass = AArch64MCRegisterClassStorage.Classes[51]; |
| 102 | static constexpr const TargetRegisterClass &WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClass = AArch64MCRegisterClassStorage.Classes[52]; |
| 103 | static constexpr const TargetRegisterClass &WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[53]; |
| 104 | static constexpr const TargetRegisterClass &GPR64allRegClass = AArch64MCRegisterClassStorage.Classes[54]; |
| 105 | static constexpr const TargetRegisterClass &FPR64RegClass = AArch64MCRegisterClassStorage.Classes[55]; |
| 106 | static constexpr const TargetRegisterClass &GPR64RegClass = AArch64MCRegisterClassStorage.Classes[56]; |
| 107 | static constexpr const TargetRegisterClass &GPR64spRegClass = AArch64MCRegisterClassStorage.Classes[57]; |
| 108 | static constexpr const TargetRegisterClass &GPR64commonRegClass = AArch64MCRegisterClassStorage.Classes[58]; |
| 109 | static constexpr const TargetRegisterClass &GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[59]; |
| 110 | static constexpr const TargetRegisterClass &GPR64common_and_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[60]; |
| 111 | static constexpr const TargetRegisterClass &tcGPR64RegClass = AArch64MCRegisterClassStorage.Classes[61]; |
| 112 | static constexpr const TargetRegisterClass &tcGPRnotx16RegClass = AArch64MCRegisterClassStorage.Classes[62]; |
| 113 | static constexpr const TargetRegisterClass &tcGPRnotx16x17RegClass = AArch64MCRegisterClassStorage.Classes[63]; |
| 114 | static constexpr const TargetRegisterClass &FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[64]; |
| 115 | static constexpr const TargetRegisterClass &GPR64argRegClass = AArch64MCRegisterClassStorage.Classes[65]; |
| 116 | static constexpr const TargetRegisterClass &FIXED_REGSRegClass = AArch64MCRegisterClassStorage.Classes[66]; |
| 117 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = AArch64MCRegisterClassStorage.Classes[67]; |
| 118 | static constexpr const TargetRegisterClass &GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[68]; |
| 119 | static constexpr const TargetRegisterClass &FIXED_REGS_with_sub_32RegClass = AArch64MCRegisterClassStorage.Classes[69]; |
| 120 | static constexpr const TargetRegisterClass &tcGPRx16x17RegClass = AArch64MCRegisterClassStorage.Classes[70]; |
| 121 | static constexpr const TargetRegisterClass &FIXED_REGS_and_GPR64RegClass = AArch64MCRegisterClassStorage.Classes[71]; |
| 122 | static constexpr const TargetRegisterClass &GPR64sponlyRegClass = AArch64MCRegisterClassStorage.Classes[72]; |
| 123 | static constexpr const TargetRegisterClass &tcGPRx17RegClass = AArch64MCRegisterClassStorage.Classes[73]; |
| 124 | static constexpr const TargetRegisterClass &DDRegClass = AArch64MCRegisterClassStorage.Classes[74]; |
| 125 | static constexpr const TargetRegisterClass &DD_with_dsub0_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[75]; |
| 126 | static constexpr const TargetRegisterClass &DD_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[76]; |
| 127 | static constexpr const TargetRegisterClass &XSeqPairsClassRegClass = AArch64MCRegisterClassStorage.Classes[77]; |
| 128 | static constexpr const TargetRegisterClass &DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[78]; |
| 129 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_subo64_in_GPR64commonRegClass = AArch64MCRegisterClassStorage.Classes[79]; |
| 130 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_subo64_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[80]; |
| 131 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_sube64_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[81]; |
| 132 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_sube64_in_tcGPR64RegClass = AArch64MCRegisterClassStorage.Classes[82]; |
| 133 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_sube64_in_tcGPRnotx16RegClass = AArch64MCRegisterClassStorage.Classes[83]; |
| 134 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_subo64_in_tcGPR64RegClass = AArch64MCRegisterClassStorage.Classes[84]; |
| 135 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_subo64_in_tcGPRnotx16x17RegClass = AArch64MCRegisterClassStorage.Classes[85]; |
| 136 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_sube64_in_GPR64argRegClass = AArch64MCRegisterClassStorage.Classes[86]; |
| 137 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = AArch64MCRegisterClassStorage.Classes[87]; |
| 138 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_sube64_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[88]; |
| 139 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_sube64_in_tcGPRx16x17RegClass = AArch64MCRegisterClassStorage.Classes[89]; |
| 140 | static constexpr const TargetRegisterClass &XSeqPairsClass_with_subo64_in_FIXED_REGSRegClass = AArch64MCRegisterClassStorage.Classes[90]; |
| 141 | static constexpr const TargetRegisterClass &FPR128RegClass = AArch64MCRegisterClassStorage.Classes[91]; |
| 142 | static constexpr const TargetRegisterClass &ZPRRegClass = AArch64MCRegisterClassStorage.Classes[92]; |
| 143 | static constexpr const TargetRegisterClass &FPR128_loRegClass = AArch64MCRegisterClassStorage.Classes[93]; |
| 144 | static constexpr const TargetRegisterClass &MPR128RegClass = AArch64MCRegisterClassStorage.Classes[94]; |
| 145 | static constexpr const TargetRegisterClass &ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[95]; |
| 146 | static constexpr const TargetRegisterClass &ZPR_4bRegClass = AArch64MCRegisterClassStorage.Classes[96]; |
| 147 | static constexpr const TargetRegisterClass &FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[97]; |
| 148 | static constexpr const TargetRegisterClass &ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[98]; |
| 149 | static constexpr const TargetRegisterClass &ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[99]; |
| 150 | static constexpr const TargetRegisterClass &ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[100]; |
| 151 | static constexpr const TargetRegisterClass &ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[101]; |
| 152 | static constexpr const TargetRegisterClass &ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[102]; |
| 153 | static constexpr const TargetRegisterClass &ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[103]; |
| 154 | static constexpr const TargetRegisterClass &ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[104]; |
| 155 | static constexpr const TargetRegisterClass &ZPRMul2_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[105]; |
| 156 | static constexpr const TargetRegisterClass &ZPRMul2_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[106]; |
| 157 | static constexpr const TargetRegisterClass &ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[107]; |
| 158 | static constexpr const TargetRegisterClass &ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[108]; |
| 159 | static constexpr const TargetRegisterClass &DDDRegClass = AArch64MCRegisterClassStorage.Classes[109]; |
| 160 | static constexpr const TargetRegisterClass &DDD_with_dsub0_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[110]; |
| 161 | static constexpr const TargetRegisterClass &DDD_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[111]; |
| 162 | static constexpr const TargetRegisterClass &DDD_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[112]; |
| 163 | static constexpr const TargetRegisterClass &DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[113]; |
| 164 | static constexpr const TargetRegisterClass &DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[114]; |
| 165 | static constexpr const TargetRegisterClass &DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[115]; |
| 166 | static constexpr const TargetRegisterClass &DDDDRegClass = AArch64MCRegisterClassStorage.Classes[116]; |
| 167 | static constexpr const TargetRegisterClass &DDDD_with_dsub0_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[117]; |
| 168 | static constexpr const TargetRegisterClass &DDDD_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[118]; |
| 169 | static constexpr const TargetRegisterClass &DDDD_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[119]; |
| 170 | static constexpr const TargetRegisterClass &DDDD_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[120]; |
| 171 | static constexpr const TargetRegisterClass &DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[121]; |
| 172 | static constexpr const TargetRegisterClass &DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[122]; |
| 173 | static constexpr const TargetRegisterClass &DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[123]; |
| 174 | static constexpr const TargetRegisterClass &DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[124]; |
| 175 | static constexpr const TargetRegisterClass &DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[125]; |
| 176 | static constexpr const TargetRegisterClass &DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[126]; |
| 177 | static constexpr const TargetRegisterClass &QQRegClass = AArch64MCRegisterClassStorage.Classes[127]; |
| 178 | static constexpr const TargetRegisterClass &ZPR2RegClass = AArch64MCRegisterClassStorage.Classes[128]; |
| 179 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguousRegClass = AArch64MCRegisterClassStorage.Classes[129]; |
| 180 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[130]; |
| 181 | static constexpr const TargetRegisterClass &QQ_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[131]; |
| 182 | static constexpr const TargetRegisterClass &QQ_with_qsub0_in_FPR128_loRegClass = AArch64MCRegisterClassStorage.Classes[132]; |
| 183 | static constexpr const TargetRegisterClass &ZPR2Mul2RegClass = AArch64MCRegisterClassStorage.Classes[133]; |
| 184 | static constexpr const TargetRegisterClass &ZPR2StridedRegClass = AArch64MCRegisterClassStorage.Classes[134]; |
| 185 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_dsub_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[135]; |
| 186 | static constexpr const TargetRegisterClass &ZPR2_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[136]; |
| 187 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[137]; |
| 188 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_loRegClass = AArch64MCRegisterClassStorage.Classes[138]; |
| 189 | static constexpr const TargetRegisterClass &QQ_with_qsub0_in_FPR128_lo_and_QQ_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[139]; |
| 190 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[140]; |
| 191 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[141]; |
| 192 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[142]; |
| 193 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[143]; |
| 194 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[144]; |
| 195 | static constexpr const TargetRegisterClass &QQ_with_qsub0_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[145]; |
| 196 | static constexpr const TargetRegisterClass &QQ_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[146]; |
| 197 | static constexpr const TargetRegisterClass &ZPR2Mul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[147]; |
| 198 | static constexpr const TargetRegisterClass &ZPR2Mul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[148]; |
| 199 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[149]; |
| 200 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[150]; |
| 201 | static constexpr const TargetRegisterClass &ZPR2Strided_with_dsub_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[151]; |
| 202 | static constexpr const TargetRegisterClass &ZPR2Strided_with_zsub0_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[152]; |
| 203 | static constexpr const TargetRegisterClass &ZPR2_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[153]; |
| 204 | static constexpr const TargetRegisterClass &ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[154]; |
| 205 | static constexpr const TargetRegisterClass &ZPR2_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[155]; |
| 206 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[156]; |
| 207 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[157]; |
| 208 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[158]; |
| 209 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[159]; |
| 210 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[160]; |
| 211 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[161]; |
| 212 | static constexpr const TargetRegisterClass &QQ_with_qsub0_in_FPR128_0to7_and_QQ_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[162]; |
| 213 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[163]; |
| 214 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[164]; |
| 215 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[165]; |
| 216 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[166]; |
| 217 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[167]; |
| 218 | static constexpr const TargetRegisterClass &ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[168]; |
| 219 | static constexpr const TargetRegisterClass &ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[169]; |
| 220 | static constexpr const TargetRegisterClass &ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[170]; |
| 221 | static constexpr const TargetRegisterClass &ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[171]; |
| 222 | static constexpr const TargetRegisterClass &ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[172]; |
| 223 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[173]; |
| 224 | static constexpr const TargetRegisterClass &ZPR2Strided_with_zsub0_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[174]; |
| 225 | static constexpr const TargetRegisterClass &ZPR2Strided_with_zsub0_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[175]; |
| 226 | static constexpr const TargetRegisterClass &ZPR2Strided_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[176]; |
| 227 | static constexpr const TargetRegisterClass &ZPR2Strided_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[177]; |
| 228 | static constexpr const TargetRegisterClass &ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[178]; |
| 229 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[179]; |
| 230 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[180]; |
| 231 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[181]; |
| 232 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[182]; |
| 233 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[183]; |
| 234 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[184]; |
| 235 | static constexpr const TargetRegisterClass &ZPR2StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[185]; |
| 236 | static constexpr const TargetRegisterClass &ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[186]; |
| 237 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[187]; |
| 238 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[188]; |
| 239 | static constexpr const TargetRegisterClass &ZPR2Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[189]; |
| 240 | static constexpr const TargetRegisterClass &ZPR2Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[190]; |
| 241 | static constexpr const TargetRegisterClass &ZPR2Strided_with_zsub0_in_ZPRMul2_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[191]; |
| 242 | static constexpr const TargetRegisterClass &ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[192]; |
| 243 | static constexpr const TargetRegisterClass &ZPR2_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[193]; |
| 244 | static constexpr const TargetRegisterClass &ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[194]; |
| 245 | static constexpr const TargetRegisterClass &ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[195]; |
| 246 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[196]; |
| 247 | static constexpr const TargetRegisterClass &ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[197]; |
| 248 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[198]; |
| 249 | static constexpr const TargetRegisterClass &ZPR2Strided_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[199]; |
| 250 | static constexpr const TargetRegisterClass &ZPR2_with_dsub1_in_FPR64_lo_and_ZPR2_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[200]; |
| 251 | static constexpr const TargetRegisterClass &ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[201]; |
| 252 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_0to7_and_ZPR2_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[202]; |
| 253 | static constexpr const TargetRegisterClass &ZPR2_with_zsub_in_FPR128_lo_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[203]; |
| 254 | static constexpr const TargetRegisterClass &MPR64RegClass = AArch64MCRegisterClassStorage.Classes[204]; |
| 255 | static constexpr const TargetRegisterClass &QQQRegClass = AArch64MCRegisterClassStorage.Classes[205]; |
| 256 | static constexpr const TargetRegisterClass &ZPR3RegClass = AArch64MCRegisterClassStorage.Classes[206]; |
| 257 | static constexpr const TargetRegisterClass &QQQ_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[207]; |
| 258 | static constexpr const TargetRegisterClass &QQQ_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[208]; |
| 259 | static constexpr const TargetRegisterClass &QQQ_with_qsub0_in_FPR128_loRegClass = AArch64MCRegisterClassStorage.Classes[209]; |
| 260 | static constexpr const TargetRegisterClass &ZPR3_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[210]; |
| 261 | static constexpr const TargetRegisterClass &ZPR3_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[211]; |
| 262 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass = AArch64MCRegisterClassStorage.Classes[212]; |
| 263 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[213]; |
| 264 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_loRegClass = AArch64MCRegisterClassStorage.Classes[214]; |
| 265 | static constexpr const TargetRegisterClass &QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[215]; |
| 266 | static constexpr const TargetRegisterClass &QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[216]; |
| 267 | static constexpr const TargetRegisterClass &ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[217]; |
| 268 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[218]; |
| 269 | static constexpr const TargetRegisterClass &QQQ_with_qsub0_in_FPR128_lo_and_QQQ_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[219]; |
| 270 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[220]; |
| 271 | static constexpr const TargetRegisterClass &QQQ_with_qsub0_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[221]; |
| 272 | static constexpr const TargetRegisterClass &QQQ_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[222]; |
| 273 | static constexpr const TargetRegisterClass &QQQ_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[223]; |
| 274 | static constexpr const TargetRegisterClass &ZPR3_3bRegClass = AArch64MCRegisterClassStorage.Classes[224]; |
| 275 | static constexpr const TargetRegisterClass &ZPR3_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[225]; |
| 276 | static constexpr const TargetRegisterClass &ZPR3_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[226]; |
| 277 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[227]; |
| 278 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[228]; |
| 279 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[229]; |
| 280 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[230]; |
| 281 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[231]; |
| 282 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[232]; |
| 283 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[233]; |
| 284 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[234]; |
| 285 | static constexpr const TargetRegisterClass &ZPR3_with_zsub2_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[235]; |
| 286 | static constexpr const TargetRegisterClass &ZPR3_with_zsub2_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[236]; |
| 287 | static constexpr const TargetRegisterClass &ZPR3_with_zsub2_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[237]; |
| 288 | static constexpr const TargetRegisterClass &ZPR3_with_zsub2_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[238]; |
| 289 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[239]; |
| 290 | static constexpr const TargetRegisterClass &QQQ_with_dsub1_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[240]; |
| 291 | static constexpr const TargetRegisterClass &QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[241]; |
| 292 | static constexpr const TargetRegisterClass &ZPR3_3b_and_ZPR3_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[242]; |
| 293 | static constexpr const TargetRegisterClass &ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[243]; |
| 294 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[244]; |
| 295 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[245]; |
| 296 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[246]; |
| 297 | static constexpr const TargetRegisterClass &QQQ_with_qsub0_in_FPR128_0to7_and_QQQ_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[247]; |
| 298 | static constexpr const TargetRegisterClass &ZPR3_3b_and_ZPR3_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[248]; |
| 299 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[249]; |
| 300 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[250]; |
| 301 | static constexpr const TargetRegisterClass &ZPR3_3b_and_ZPR3_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[251]; |
| 302 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[252]; |
| 303 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub2_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[253]; |
| 304 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[254]; |
| 305 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[255]; |
| 306 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[256]; |
| 307 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[257]; |
| 308 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[258]; |
| 309 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[259]; |
| 310 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[260]; |
| 311 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[261]; |
| 312 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[262]; |
| 313 | static constexpr const TargetRegisterClass &ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[263]; |
| 314 | static constexpr const TargetRegisterClass &ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[264]; |
| 315 | static constexpr const TargetRegisterClass &ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[265]; |
| 316 | static constexpr const TargetRegisterClass &ZPR3_with_zsub2_in_ZPRMul2_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[266]; |
| 317 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[267]; |
| 318 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[268]; |
| 319 | static constexpr const TargetRegisterClass &ZPR3_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[269]; |
| 320 | static constexpr const TargetRegisterClass &ZPR3_3b_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[270]; |
| 321 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[271]; |
| 322 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[272]; |
| 323 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[273]; |
| 324 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[274]; |
| 325 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[275]; |
| 326 | static constexpr const TargetRegisterClass &ZPR3_3b_and_ZPR3_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[276]; |
| 327 | static constexpr const TargetRegisterClass &ZPR3_3b_and_ZPR3_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[277]; |
| 328 | static constexpr const TargetRegisterClass &ZPR3_3b_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[278]; |
| 329 | static constexpr const TargetRegisterClass &ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[279]; |
| 330 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_in_ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[280]; |
| 331 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[281]; |
| 332 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[282]; |
| 333 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[283]; |
| 334 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[284]; |
| 335 | static constexpr const TargetRegisterClass &ZPR3_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[285]; |
| 336 | static constexpr const TargetRegisterClass &ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[286]; |
| 337 | static constexpr const TargetRegisterClass &ZPR3_with_zsub2_in_ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[287]; |
| 338 | static constexpr const TargetRegisterClass &ZPR3_3b_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[288]; |
| 339 | static constexpr const TargetRegisterClass &ZPR3_3b_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[289]; |
| 340 | static constexpr const TargetRegisterClass &ZPR3_with_dsub1_in_FPR64_lo_and_ZPR3_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[290]; |
| 341 | static constexpr const TargetRegisterClass &ZPR3_with_dsub2_in_FPR64_lo_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[291]; |
| 342 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_in_ZPR_K_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[292]; |
| 343 | static constexpr const TargetRegisterClass &ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[293]; |
| 344 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[294]; |
| 345 | static constexpr const TargetRegisterClass &ZPR3_with_zsub_in_FPR128_lo_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[295]; |
| 346 | static constexpr const TargetRegisterClass &QQQQRegClass = AArch64MCRegisterClassStorage.Classes[296]; |
| 347 | static constexpr const TargetRegisterClass &ZPR4RegClass = AArch64MCRegisterClassStorage.Classes[297]; |
| 348 | static constexpr const TargetRegisterClass &QQQQ_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[298]; |
| 349 | static constexpr const TargetRegisterClass &QQQQ_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[299]; |
| 350 | static constexpr const TargetRegisterClass &QQQQ_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[300]; |
| 351 | static constexpr const TargetRegisterClass &QQQQ_with_qsub0_in_FPR128_loRegClass = AArch64MCRegisterClassStorage.Classes[301]; |
| 352 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguousRegClass = AArch64MCRegisterClassStorage.Classes[302]; |
| 353 | static constexpr const TargetRegisterClass &ZPR4_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[303]; |
| 354 | static constexpr const TargetRegisterClass &ZPR4_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[304]; |
| 355 | static constexpr const TargetRegisterClass &ZPR4_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[305]; |
| 356 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass = AArch64MCRegisterClassStorage.Classes[306]; |
| 357 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[307]; |
| 358 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_loRegClass = AArch64MCRegisterClassStorage.Classes[308]; |
| 359 | static constexpr const TargetRegisterClass &QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[309]; |
| 360 | static constexpr const TargetRegisterClass &QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[310]; |
| 361 | static constexpr const TargetRegisterClass &QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[311]; |
| 362 | static constexpr const TargetRegisterClass &ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[312]; |
| 363 | static constexpr const TargetRegisterClass &ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[313]; |
| 364 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub1_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[314]; |
| 365 | static constexpr const TargetRegisterClass &QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[315]; |
| 366 | static constexpr const TargetRegisterClass &QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[316]; |
| 367 | static constexpr const TargetRegisterClass &ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[317]; |
| 368 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub2_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[318]; |
| 369 | static constexpr const TargetRegisterClass &QQQQ_with_qsub0_in_FPR128_lo_and_QQQQ_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[319]; |
| 370 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_dsub3_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[320]; |
| 371 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[321]; |
| 372 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[322]; |
| 373 | static constexpr const TargetRegisterClass &QQQQ_with_qsub0_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[323]; |
| 374 | static constexpr const TargetRegisterClass &QQQQ_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[324]; |
| 375 | static constexpr const TargetRegisterClass &QQQQ_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[325]; |
| 376 | static constexpr const TargetRegisterClass &QQQQ_with_qsub3_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[326]; |
| 377 | static constexpr const TargetRegisterClass &ZPR4Mul4RegClass = AArch64MCRegisterClassStorage.Classes[327]; |
| 378 | static constexpr const TargetRegisterClass &ZPR4StridedRegClass = AArch64MCRegisterClassStorage.Classes[328]; |
| 379 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_dsub_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[329]; |
| 380 | static constexpr const TargetRegisterClass &ZPR4_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[330]; |
| 381 | static constexpr const TargetRegisterClass &ZPR4_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[331]; |
| 382 | static constexpr const TargetRegisterClass &ZPR4_with_qsub3_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[332]; |
| 383 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[333]; |
| 384 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[334]; |
| 385 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[335]; |
| 386 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[336]; |
| 387 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[337]; |
| 388 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[338]; |
| 389 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[339]; |
| 390 | static constexpr const TargetRegisterClass &ZPR4_with_zsub2_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[340]; |
| 391 | static constexpr const TargetRegisterClass &ZPR4_with_zsub2_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[341]; |
| 392 | static constexpr const TargetRegisterClass &ZPR4_with_zsub2_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[342]; |
| 393 | static constexpr const TargetRegisterClass &ZPR4_with_zsub2_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[343]; |
| 394 | static constexpr const TargetRegisterClass &ZPR4_with_zsub3_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[344]; |
| 395 | static constexpr const TargetRegisterClass &ZPR4_with_zsub3_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[345]; |
| 396 | static constexpr const TargetRegisterClass &ZPR4_with_zsub3_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[346]; |
| 397 | static constexpr const TargetRegisterClass &ZPR4_with_zsub3_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[347]; |
| 398 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[348]; |
| 399 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[349]; |
| 400 | static constexpr const TargetRegisterClass &QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[350]; |
| 401 | static constexpr const TargetRegisterClass &QQQQ_with_dsub2_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[351]; |
| 402 | static constexpr const TargetRegisterClass &QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[352]; |
| 403 | static constexpr const TargetRegisterClass &ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[353]; |
| 404 | static constexpr const TargetRegisterClass &ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[354]; |
| 405 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[355]; |
| 406 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_3b_and_ZPR3_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[356]; |
| 407 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[357]; |
| 408 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_3b_and_ZPR3_with_qsub1_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[358]; |
| 409 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[359]; |
| 410 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[360]; |
| 411 | static constexpr const TargetRegisterClass &QQQQ_with_dsub1_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[361]; |
| 412 | static constexpr const TargetRegisterClass &QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[362]; |
| 413 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[363]; |
| 414 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[364]; |
| 415 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[365]; |
| 416 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[366]; |
| 417 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[367]; |
| 418 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_3b_and_ZPR3_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[368]; |
| 419 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[369]; |
| 420 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_3b_and_ZPR3_with_qsub2_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[370]; |
| 421 | static constexpr const TargetRegisterClass &ZPR4_with_zsub2_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[371]; |
| 422 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[372]; |
| 423 | static constexpr const TargetRegisterClass &QQQQ_with_qsub0_in_FPR128_0to7_and_QQQQ_with_qsub3_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[373]; |
| 424 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[374]; |
| 425 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[375]; |
| 426 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_qsub3_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[376]; |
| 427 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[377]; |
| 428 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul2_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[378]; |
| 429 | static constexpr const TargetRegisterClass &ZPR4Strided_with_dsub_in_FPR64_loRegClass = AArch64MCRegisterClassStorage.Classes[379]; |
| 430 | static constexpr const TargetRegisterClass &ZPR4Strided_with_zsub0_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[380]; |
| 431 | static constexpr const TargetRegisterClass &ZPR4Strided_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[381]; |
| 432 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[382]; |
| 433 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub2_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[383]; |
| 434 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[384]; |
| 435 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[385]; |
| 436 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[386]; |
| 437 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[387]; |
| 438 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[388]; |
| 439 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_3b_and_ZPR3_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[389]; |
| 440 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[390]; |
| 441 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[391]; |
| 442 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[392]; |
| 443 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[393]; |
| 444 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[394]; |
| 445 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[395]; |
| 446 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[396]; |
| 447 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[397]; |
| 448 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[398]; |
| 449 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[399]; |
| 450 | static constexpr const TargetRegisterClass &ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[400]; |
| 451 | static constexpr const TargetRegisterClass &ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[401]; |
| 452 | static constexpr const TargetRegisterClass &ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[402]; |
| 453 | static constexpr const TargetRegisterClass &ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[403]; |
| 454 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[404]; |
| 455 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[405]; |
| 456 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[406]; |
| 457 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR4StridedOrContiguous_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[407]; |
| 458 | static constexpr const TargetRegisterClass &ZPR4StridedOrContiguous_with_zsub0_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[408]; |
| 459 | static constexpr const TargetRegisterClass &ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[409]; |
| 460 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[410]; |
| 461 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[411]; |
| 462 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[412]; |
| 463 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[413]; |
| 464 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_Hi_and_ZPR3_with_zsub2_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[414]; |
| 465 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPRMul2_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[415]; |
| 466 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub_in_FPR128_0to7RegClass = AArch64MCRegisterClassStorage.Classes[416]; |
| 467 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_3b_with_zsub2_in_ZPRMul2_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[417]; |
| 468 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[418]; |
| 469 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Lo_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[419]; |
| 470 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[420]; |
| 471 | static constexpr const TargetRegisterClass &ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[421]; |
| 472 | static constexpr const TargetRegisterClass &ZPR4Strided_with_zsub0_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[422]; |
| 473 | static constexpr const TargetRegisterClass &ZPR4Strided_with_zsub0_in_ZPRMul2_LoRegClass = AArch64MCRegisterClassStorage.Classes[423]; |
| 474 | static constexpr const TargetRegisterClass &ZPR4Strided_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[424]; |
| 475 | static constexpr const TargetRegisterClass &ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[425]; |
| 476 | static constexpr const TargetRegisterClass &ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[426]; |
| 477 | static constexpr const TargetRegisterClass &ZPR4_with_dsub3_in_FPR64_lo_with_zsub0_zsub1_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2RegClass = AArch64MCRegisterClassStorage.Classes[427]; |
| 478 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[428]; |
| 479 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[429]; |
| 480 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[430]; |
| 481 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[431]; |
| 482 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_3b_and_ZPR3_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[432]; |
| 483 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_3b_and_ZPR3_with_zsub1_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[433]; |
| 484 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_3b_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[434]; |
| 485 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[435]; |
| 486 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_3b_and_ZPR3_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[436]; |
| 487 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_3b_and_ZPR3_with_zsub2_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[437]; |
| 488 | static constexpr const TargetRegisterClass &ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[438]; |
| 489 | static constexpr const TargetRegisterClass &ZPR4_with_zsub2_in_ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[439]; |
| 490 | static constexpr const TargetRegisterClass &ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[440]; |
| 491 | static constexpr const TargetRegisterClass &ZPR4_with_zsub3_in_ZPRMul4_and_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[441]; |
| 492 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_0to7_and_ZPR4_with_zsub3_in_ZPRMul2_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[442]; |
| 493 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[443]; |
| 494 | static constexpr const TargetRegisterClass &ZPR4Strided_with_zsub0_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[444]; |
| 495 | static constexpr const TargetRegisterClass &ZPR4Strided_with_zsub0_in_ZPRMul2_Lo_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[445]; |
| 496 | static constexpr const TargetRegisterClass &ZPR4_with_dsub1_in_FPR64_lo_and_ZPR4_with_zsub0_in_ZPR_KRegClass = AArch64MCRegisterClassStorage.Classes[446]; |
| 497 | static constexpr const TargetRegisterClass &ZPR4_with_dsub2_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[447]; |
| 498 | static constexpr const TargetRegisterClass &ZPR4_with_dsub3_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[448]; |
| 499 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_Hi_and_ZPR2_with_zsub0_in_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[449]; |
| 500 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_in_ZPR_K_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[450]; |
| 501 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_with_zsub1_zsub2_in_ZPR2_with_zsub0_in_ZPR_K_and_ZPR2_with_zsub1_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[451]; |
| 502 | static constexpr const TargetRegisterClass &ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_3b_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[452]; |
| 503 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[453]; |
| 504 | static constexpr const TargetRegisterClass &ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_3b_with_zsub2_in_ZPRMul4_and_ZPR_3bRegClass = AArch64MCRegisterClassStorage.Classes[454]; |
| 505 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub1_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[455]; |
| 506 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub2_in_ZPRMul2_HiRegClass = AArch64MCRegisterClassStorage.Classes[456]; |
| 507 | static constexpr const TargetRegisterClass &ZPR4_with_zsub_in_FPR128_lo_and_ZPR4_with_zsub3_in_ZPRMul2_Hi_and_ZPRMul4RegClass = AArch64MCRegisterClassStorage.Classes[457]; |
| 508 | static constexpr const TargetRegisterClass &GPR64x8ClassRegClass = AArch64MCRegisterClassStorage.Classes[458]; |
| 509 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[459]; |
| 510 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[460]; |
| 511 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[461]; |
| 512 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[462]; |
| 513 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[463]; |
| 514 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[464]; |
| 515 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[465]; |
| 516 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass = AArch64MCRegisterClassStorage.Classes[466]; |
| 517 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[467]; |
| 518 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[468]; |
| 519 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[469]; |
| 520 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[470]; |
| 521 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[471]; |
| 522 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[472]; |
| 523 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_tcGPRnotx16RegClass = AArch64MCRegisterClassStorage.Classes[473]; |
| 524 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass = AArch64MCRegisterClassStorage.Classes[474]; |
| 525 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[475]; |
| 526 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[476]; |
| 527 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[477]; |
| 528 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[478]; |
| 529 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[479]; |
| 530 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[480]; |
| 531 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[481]; |
| 532 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[482]; |
| 533 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[483]; |
| 534 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_1_in_tcGPRnotx16x17RegClass = AArch64MCRegisterClassStorage.Classes[484]; |
| 535 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[485]; |
| 536 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[486]; |
| 537 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_tcGPRnotx16RegClass = AArch64MCRegisterClassStorage.Classes[487]; |
| 538 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[488]; |
| 539 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[489]; |
| 540 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[490]; |
| 541 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[491]; |
| 542 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[492]; |
| 543 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[493]; |
| 544 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[494]; |
| 545 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_3_in_tcGPRnotx16x17RegClass = AArch64MCRegisterClassStorage.Classes[495]; |
| 546 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[496]; |
| 547 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[497]; |
| 548 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[498]; |
| 549 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_tcGPRnotx16RegClass = AArch64MCRegisterClassStorage.Classes[499]; |
| 550 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[500]; |
| 551 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[501]; |
| 552 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = AArch64MCRegisterClassStorage.Classes[502]; |
| 553 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_5_in_tcGPRnotx16x17RegClass = AArch64MCRegisterClassStorage.Classes[503]; |
| 554 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_6_in_tcGPRnotx16RegClass = AArch64MCRegisterClassStorage.Classes[504]; |
| 555 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_7_in_tcGPRnotx16x17RegClass = AArch64MCRegisterClassStorage.Classes[505]; |
| 556 | static constexpr const TargetRegisterClass &GPR64x8Class_with_sub_32_in_GPR32argRegClass = AArch64MCRegisterClassStorage.Classes[506]; |
| 557 | static constexpr const TargetRegisterClass &MPR32RegClass = AArch64MCRegisterClassStorage.Classes[507]; |
| 558 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64argRegClass = AArch64MCRegisterClassStorage.Classes[508]; |
| 559 | static constexpr const TargetRegisterClass &GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = AArch64MCRegisterClassStorage.Classes[509]; |
| 560 | static constexpr const TargetRegisterClass &GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[510]; |
| 561 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = AArch64MCRegisterClassStorage.Classes[511]; |
| 562 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[512]; |
| 563 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[513]; |
| 564 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64argRegClass = AArch64MCRegisterClassStorage.Classes[514]; |
| 565 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[515]; |
| 566 | static constexpr const TargetRegisterClass &GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[516]; |
| 567 | static constexpr const TargetRegisterClass &GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[517]; |
| 568 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_0_in_tcGPRx16x17RegClass = AArch64MCRegisterClassStorage.Classes[518]; |
| 569 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[519]; |
| 570 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_2_in_tcGPRx16x17RegClass = AArch64MCRegisterClassStorage.Classes[520]; |
| 571 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = AArch64MCRegisterClassStorage.Classes[521]; |
| 572 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_4_in_tcGPRx16x17RegClass = AArch64MCRegisterClassStorage.Classes[522]; |
| 573 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_6_in_GPR64argRegClass = AArch64MCRegisterClassStorage.Classes[523]; |
| 574 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_6_in_tcGPRx16x17RegClass = AArch64MCRegisterClassStorage.Classes[524]; |
| 575 | static constexpr const TargetRegisterClass &GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClass = AArch64MCRegisterClassStorage.Classes[525]; |
| 576 | static constexpr const TargetRegisterClass &ZTRRegClass = AArch64MCRegisterClassStorage.Classes[526]; |
| 577 | static constexpr const TargetRegisterClass &MPR16RegClass = AArch64MCRegisterClassStorage.Classes[527]; |
| 578 | static constexpr const TargetRegisterClass &MPRRegClass = AArch64MCRegisterClassStorage.Classes[528]; |
| 579 | static constexpr const TargetRegisterClass &MPR8RegClass = AArch64MCRegisterClassStorage.Classes[529]; |
| 580 | |
| 581 | } // namespace AArch64 |
| 582 | |
| 583 | } // namespace llvm |
| 584 | |